From e86af9a60a6165188ec069ea519eeadb1e2ad3cc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 22 Oct 2023 12:31:55 +0100
Subject: [PATCH 0001/1549] 20231021hotfix: replace x_ with err in some places

keymaps weren't being set in keymay.cfg of cbfs, due
to use of x_ in the rom script, and x_ doesn't handle
quotes or spaces in arguments well.

i'm going to remove use of x_ and xx_ (it's in my todo),
for next release.

for now, hot patch the release. i've gone through and
replaced use of x_ with || err, in some places.

not just the keymap.cfg command, but others too. in case
there are more issues we missed.

this commit is being tagged "20231021fix" and i'm using
this tag to re-build the 20231021 release. i'll just
replace the tarballs in rsync and add errata to the news
page announcing the release. all i did was break peoples
umlauts, i didn't brick their machines fortunately!

very minor bug. anyway, x_/xx_ is a great idea, but sh
isn't really designed for that style of programming. i'll
go back to using just || err in the next release.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/mrc.sh        | 14 ++++++----
 include/option.sh     |  8 +++---
 script/build/grub     |  8 +++---
 script/build/roms     | 12 ++++----
 script/update/release | 64 +++++++++++++++++++++++--------------------
 script/vendor/inject  |  3 +-
 6 files changed, 60 insertions(+), 49 deletions(-)

diff --git a/include/mrc.sh b/include/mrc.sh
index 3c6ac24e..e57026a4 100755
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -22,8 +22,8 @@ extract_mrc()
 	extract_coreboot
 	)
 
-	x_ "${cbfstool}" "${appdir}/"coreboot-*.bin extract -n mrc.bin \
-	    -f "${_dest}" -r RO_SECTION
+	"${cbfstool}" "${appdir}/"coreboot-*.bin extract -n mrc.bin \
+	    -f "${_dest}" -r RO_SECTION || err "extract_mrc: cbfstool ${_dest}"
 }
 
 extract_partition()
@@ -40,8 +40,9 @@ extract_partition()
 	START=$(( $( echo ${ROOTP} | cut -f2 -d\ | tr -d "B" ) ))
 	SIZE=$(( $( echo ${ROOTP} | cut -f4 -d\ | tr -d "B" ) ))
 
-	x_ dd if="${FILE}" of="${ROOTFS}" bs=${_bs} \
-	    skip=$(( ${START} / ${_bs} )) count=$(( ${SIZE} / ${_bs} ))
+	dd if="${FILE}" of="${ROOTFS}" bs=${_bs} \
+	    skip=$(( ${START} / ${_bs} )) count=$(( ${SIZE} / ${_bs} )) || \
+	    err "extract_partition, dd ${FILE}, ${ROOTFS}"
 }
 
 extract_shellball()
@@ -58,7 +59,7 @@ extract_coreboot()
 	printf "Extracting coreboot image\n"
 	[ -f "${SHELLBALL}" ] || \
 	    err "extract_coreboot: shellball missing in google cros image"
-	x_ sh "${SHELLBALL}" --unpack "${_unpacked}"
+	sh "${SHELLBALL}" --unpack "${_unpacked}" || err "shellball, ${SHELLBALL}"
 
 	# TODO: audit the f* out of that shellball, for each mrc version.
 	# it has to be updated for each mrc update. we should ideally
@@ -70,5 +71,6 @@ extract_coreboot()
 	_version=$( cat "${_unpacked}/VERSION" | grep BIOS\ version: | \
 	    cut -f2 -d: | tr -d \  )
 
-	x_ cp "${_unpacked}/bios.bin" "coreboot-${_version}.bin"
+	cp "${_unpacked}/bios.bin" "coreboot-${_version}.bin" || \
+	    err "!cp unpacked, ${_unpacked}/bios.bin, coreboot-${_version}.rom"
 }
diff --git a/include/option.sh b/include/option.sh
index 13137104..aa8b844c 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -89,12 +89,12 @@ modify_coreboot_rom()
 		done
 	elif [ "${romtype}" = "i945 laptop" ]; then
 		# for bucts-based installation method from factory bios
-		x_ dd if="${rompath}" of="${tmprom}" bs=1 \
+		dd if="${rompath}" of="${tmprom}" bs=1 \
 		    skip=$(($(stat -c %s "${rompath}") - 0x10000)) \
-		    count=64k
-		x_ dd if="${tmprom}" of="${rompath}" bs=1 \
+		    count=64k || err "modrom 1, dd, ${rompath}"
+		dd if="${tmprom}" of="${rompath}" bs=1 \
 		    seek=$(($(stat -c %s "${rompath}") - 0x20000)) \
-		    count=64k conv=notrunc
+		    count=64k conv=notrunc || err "modrom 2, dd, ${rompath}"
 	fi
 	x_ rm -f "${tmprom}"
 }
diff --git a/script/build/grub b/script/build/grub
index ba0845d3..31fc0084 100755
--- a/script/build/grub
+++ b/script/build/grub
@@ -26,7 +26,7 @@ handle_dependencies()
 	[ -d "src/grub" ] || x_ ./update trees -f grub
 	[ -f "src/grub/grub-mkstandalone" ] || build_grub_utils
 	x_ mkdir -p "${elfdir}"
-	x_ rm -f "${elfdir}/"*
+	rm -f "${elfdir}/"* || err "!rm elf, handle_, ${elfdir}/"
 }
 
 build_grub_utils()
@@ -37,7 +37,7 @@ build_grub_utils()
 	x_ ./bootstrap --gnulib-srcdir=gnulib/ --no-git
 	x_ ./autogen.sh
 	x_ ./configure --with-platform=coreboot
-	x_ make -j$(nproc) FS_PAYLOAD_MODULES=""
+	make -j$(nproc) FS_PAYLOAD_MODULES="" || err "!mk grub utils"
 	)
 }
 
@@ -47,8 +47,8 @@ build_keymap_configs()
 		[ -f "${keylayoutfile}" ] || continue
 		keymap="${keylayoutfile##${grubcfgsdir}/keymap/}"
 		keymap="${keymap%.gkb}"
-		x_ printf "keymap %s\n" "${keymap}" > \
-		    "${elfdir}/keymap_${keymap}.cfg"
+		printf "keymap %s\n" "${keymap}" > \
+		    "${elfdir}/keymap_${keymap}.cfg" || err "!insert keymap"
 	done
 }
 
diff --git a/script/build/roms b/script/build/roms
index 2f7b93da..e8cd1c7f 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -136,7 +136,7 @@ prepare_target()
 	[ "${payload_memtest}" != "y" ] || [ -f "src/${memtest_bin}" ] || \
 		x_ ./update trees -b memtest86plus
 
-	x_ rm -f "${romdir}/"*
+	rm -f "${romdir}/"* || err "!prepare, rm files, ${romdir}"
 
 	build_dependency_grub
 	build_dependency_uboot
@@ -274,15 +274,17 @@ build_grub_roms()
 	if [ "${displaymode}" = "vesafb" ] || \
 	    [ "${displaymode}" = "corebootfb" ]; then
 		backgroundfile="config/grub/background/${grub_background}"
-		x_ "${cbfstool}" "${tmprom}" add -f ${backgroundfile} \
-		    -n background.png -t raw
+		"${cbfstool}" "${tmprom}" add -f ${backgroundfile} \
+		    -n background.png -t raw || err "insert background, ${backgroundfile}"
 	fi
 
 	tmpcfg=$(mktemp -t coreboot_rom.XXXXXXXXXX)
-	x_ printf "set grub_scan_disk=\"%s\"\n" "${grub_scan_disk}" >"${tmpcfg}"
+	printf "set grub_scan_disk=\"%s\"\n" "${grub_scan_disk}" >"${tmpcfg}" \
+	    || err "set grub_scandisk, ${grub_scan_disk}, ${tmpcfg}"
 	[ "${grub_scan_disk}" = "both" ] || \
 	    x_ "${cbfstool}" "${tmprom}" add -f "${tmpcfg}" -n scan.cfg -t raw
-	x_ printf "set timeout=%s\n" "${grub_timeout}" > "${tmpcfg}"
+	printf "set timeout=%s\n" "${grub_timeout}" > "${tmpcfg}" || \
+	    err "set timeout, ${grub_timeout}, ${tmpcfg}"
 	[ -z "${grub_timeout}" ] || x_ "${cbfstool}" "${tmprom}" add \
 	    -f "${tmpcfg}" -n timeout.cfg -t raw
 	x_ rm -f "${tmpcfg}"
diff --git a/script/update/release b/script/update/release
index d9dd9789..3ee99c78 100755
--- a/script/update/release
+++ b/script/update/release
@@ -118,7 +118,8 @@ fetch_trees()
 	for x in config/*/build.list; do
 		[ -f "${x}" ] || continue
 		xp="${x#*/}"; xp="${xp%/*}"
-		[ -L "${xp}" ] || x_ rm -Rf "src/${xp}/${xp}"
+		[ -L "${xp}" ] || rm -Rf "src/${xp}/${xp}" || \
+		    err "!rm -Rf \"src/${xp}/${xp}\""
 	done
 
 	find . -name ".git" -exec rm -Rf {} + || err "${_xm}: rm .git"
@@ -144,20 +145,21 @@ handle_rom_archive()
 {
 	builddir="${1}"
 	romdir="tmp/romdir"
-	x_ rm -Rf "${romdir}"
+	rm -Rf "${romdir}" || err "!rm romdir, handle_rom_archive"
 	target="${builddir##*/}"
 
 	if [ ! -f "config/coreboot/${target}/target.cfg" ]; then
 		# No config, just make a tarball
 		tarball="release/${version}/roms/${relname}_${target}.tar.xz"
-		insert_copying_files "${builddir}"
+		insert_copying_files "${builddir}" || \
+		    err "!insert copy, handle, ${builddir}"
 		mktarball "${builddir}" "${tarball}"
 		return 0
 	fi
 
 	romdir="${romdir}/bin/${target}"
-	x_ mkdir -p "${romdir}"
-	x_ cp "${builddir}/"* "${romdir}"
+	mkdir -p "${romdir}" || err "!mkdir -p romdir, handle_rom_archive"
+	cp "${builddir}/"* "${romdir}" || err "!cp romdir, handle_rom_archive"
 
 	nukerom
 
@@ -166,7 +168,7 @@ handle_rom_archive()
 	insert_version_files "${romdir}" || \
 	    err "mkrom_tarball ${romdir}: versionfile"
 
-	insert_copying_files "${romdir}"
+	insert_copying_files "${romdir}" || err "!insert copy, handle 2, ${romdir}"
 	mkrom_tarball
 }
 
@@ -183,22 +185,24 @@ nukerom()
 		done
 		for romfile in "${romdir}"/*.tmprom; do
 			[ -f "${romfile}" ] || continue
-			x_ mv "${romfile}" "${romfile%.tmprom}.rom"
+			mv "${romfile}" "${romfile%.tmprom}.rom" || \
+			    err "!mv romfile, nukerom"
 		done
 	fi
 
 	# Hash the images before removing vendor files
 	# which "./vendor inject" uses for verification
-	x_ rm -f "${romdir}/vendorhashes"
-	x_ touch "${romdir}/vendorhashes"
+	rm -f "${romdir}/vendorhashes" || err "!rm ${romdir}/vendorhashes"
+	touch "${romdir}/vendorhashes" || err "!touch ${romdir}/vendorhashes"
 	(
-	x_ cd "${romdir}"
-	x_ sha512sum *.rom >> vendorhashes
+	cd "${romdir}" || err "!cd romdir ${romdir}, nukerom"
+	sha512sum *.rom >> vendorhashes || err "!create vendorhashes, nukerom"
 	)
 
 	for romfile in "${romdir}"/*.rom; do
 		[ -f "${romfile}" ] || continue
-		x_ ./vendor inject -r "${romfile}" -b ${target} -n nuke
+		./vendor inject -r "${romfile}" -b ${target} -n nuke || \
+		    err "!vendor inject (nuke) ${romfile}, nukerom"
 	done
 }
 
@@ -206,42 +210,43 @@ strip_ucode()
 {
 	romfile=${1}
 	_newrom_b="${romfile%.rom}_nomicrocode.tmprom"
-	x_ cp "${romfile}" "${_newrom_b}"
+	cp "${romfile}" "${_newrom_b}" || err "!cp romfile ${romfile}, strip_u"
 	microcode_present="y"
 	"${cbfstool}" "${_newrom_b}" remove -n \
 	    cpu_microcode_blob.bin 2>/dev/null || microcode_present="n"
 	[ "${microcode_present}" = "n" ] || return 0
 	printf "REMARK: '%s' already lacks microcode\n" "${romfile}" 1>&2
 	printf "Renaming default ROM file instead.\n" 1>&2
-	x_ mv "${romfile}" "${_newrom_b}"
+	mv "${romfile}" "${_newrom_b}" || err "!mv romfile ${romfile}, strip_u"
 }
 
 insert_copying_files()
 {
-	x_ rm -Rf "${1}/licenses"
-	x_ mkdir -p "${1}/licenses"
+	rm -Rf "${1}/licenses" || return 1
+	mkdir -p "${1}/licenses" || return 1
 	l="${1}/licenses"
 	# copy licenses to rom image archive, for completion
-	x_ cp "src/grub/COPYING" "${l}/COPYING.grub"
-	x_ cp "src/coreboot/default/COPYING" "${l}/COPYING.coreboot"
-	x_ cp -R "src/coreboot/default/LICENSES" "${l}/LICENSES.coreboot"
-	x_ cp "src/seabios/default/COPYING" "${l}/COPYING.coreboot"
-	x_ cp "src/seabios/default/COPYING.LESSER" "${l}/COPYING.LESSER.seabios"
-	x_ cp -R "src/u-boot/default/Licenses" "${l}/COPYING.u-boot"
-	x_ printf "Multiple licenses. Check corresponding %s source archive\n" \
-	    "${projectname}" > "${1}/COPYING"
+	cp "src/grub/COPYING" "${l}/COPYING.grub" || return 1
+	cp "src/coreboot/default/COPYING" "${l}/COPYING.coreboot" || return 1
+	cp -R "src/coreboot/default/LICENSES" "${l}/LICENSES.coreboot" || return 1
+	cp "src/seabios/default/COPYING" "${l}/COPYING.coreboot" || return 1
+	cp "src/seabios/default/COPYING.LESSER" "${l}/COPYING.LESSER.seabios" || return 1
+	cp -R "src/u-boot/default/Licenses" "${l}/COPYING.u-boot" || return 1
+	printf "Multiple licenses. Check corresponding %s source archive\n" \
+	    "${projectname}" > "${1}/COPYING" || return 1
 }
 
 mkrom_tarball()
 {
 	archivename="${relname}_${target##*/}"
 	f="release/${version}/roms/${archivename}"
-	x_ mkdir -p "${f%/*}"
+	mkdir -p "${f%/*}" || err "mkrom_tarball: !mkdir -p ${f%/*}"
 	(
-	x_ cd "${romdir%/bin/${target}}"
+	cd "${romdir%/bin/${target}}" || err "!cd ${romdir%/bin/${target}}"
 	mktarball "bin/${target}" "${archivename}.tar.xz"
 	)
-	x_ mv "${romdir%/bin/${target}}/${archivename}.tar.xz"* "${f%/*}"
+	mv "${romdir%/bin/${target}}/${archivename}.tar.xz"* "${f%/*}" || \
+	    err "!mktarball, rom, ${f%/*}/${romdir%/bin/${target}}/${archivename}.tar.xz"
 
 	printf "Created ROM archive: ${f%/*}/${archivename}.tar.xz"
 }
@@ -258,7 +263,7 @@ mktarball()
 	# preserve timestamps for reproducible tarballs
 	tar_implementation=$(tar --version | head -n1) || :
 
-	[ "${2%/*}" = "${2}" ] || x_ mkdir -p "${2%/*}"
+	[ "${2%/*}" = "${2}" ] || mkdir -p "${2%/*}" || err "mk, !mkdir -p \"${2%/*}\""
 	if [ "${tar_implementation% *}" = "tar (GNU tar)" ]; then
 		tar --sort=name --owner=root:0 --group=root:0 \
 		    --mtime="UTC 2023-10-21" -c "${1}" | xz -T0 -9e > "${2}" || \
@@ -269,7 +274,8 @@ mktarball()
 	fi
 	(
 	[ "${2%/*}" != "${2}" ] && x_ cd "${2%/*}"
-	x_ sha512sum "${2##*/}" > "${2##*/}.sha512"
+	sha512sum "${2##*/}" > "${2##*/}.sha512" || \
+	    err "!sha512sum \"${2##*/}\" > \"${2##*/}.sha512\""
 	)
 }
 
diff --git a/script/vendor/inject b/script/vendor/inject
index 923224d0..db8004e4 100755
--- a/script/vendor/inject
+++ b/script/vendor/inject
@@ -122,7 +122,8 @@ patch_release_roms()
 		[ -f "${x}" ] || continue
 		[ -f "${x%_nomicrocode.rom}.rom" ] || continue
 
-		x_ cp "${x%_nomicrocode.rom}.rom" "${x}"
+		cp "${x%_nomicrocode.rom}.rom" "${x}" || \
+		    err "patch_r: !cp \"${x%_nomicrocode.rom}.rom\" \"${x}\""
 		x_ "${cbfstool}" "${x}" remove -n cpu_microcode_blob.bin
 	done
 

From 8dda0d8654eab05eb2d2a70328ccf95cb322a52b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 22 Oct 2023 15:05:49 +0100
Subject: [PATCH 0002/1549] coreboot/default: don't use github on acpica fetch

github's httpd b0rked the fuck out and i didn't want to wait
for them to fix it (ssl cert error) before i continued a build.

i now host the relevant acpica tarball on libreboot rsync,
mirrored to princeton.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...t-use-github-for-the-acpica-download.patch | 39 +++++++++++++++++++
 1 file changed, 39 insertions(+)
 create mode 100644 config/coreboot/default/patches/0024-don-t-use-github-for-the-acpica-download.patch

diff --git a/config/coreboot/default/patches/0024-don-t-use-github-for-the-acpica-download.patch b/config/coreboot/default/patches/0024-don-t-use-github-for-the-acpica-download.patch
new file mode 100644
index 00000000..5093f011
--- /dev/null
+++ b/config/coreboot/default/patches/0024-don-t-use-github-for-the-acpica-download.patch
@@ -0,0 +1,39 @@
+From cddb709fd01e3e93a7879488d0d4024360e1e3d9 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 22 Oct 2023 15:02:25 +0100
+Subject: [PATCH 1/1] don't use github for the acpica download
+
+i have the tarball from a previous download, and i placed
+it on libreboot rsync, which then got mirrored to princeton.
+
+today, github's ssl cert was b0rking the hell out and i really
+really wanted to finish a build, and didn't want to wait for
+github to fix their httpd.
+
+so i'm now hosting this specific acpica tarball on rsync.
+
+this patch makes that URL be used, instead of the github one.
+
+that's the 2nd time i've had to patch coreboot's acpica download!
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/crossgcc/buildgcc | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index ebc9fcb49a..a857110b4b 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -72,7 +72,7 @@ MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
+ MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
+ GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
+ BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
+-IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
++IASL_BASE_URL="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica"
+ # CLANG toolchain archive locations
+ LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
+ CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
+-- 
+2.39.2
+

From 3b92ac97b6ed2216b5f0a17ff9c015f0d8936514 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sun, 22 Oct 2023 21:51:23 +0300
Subject: [PATCH 0003/1549] arch, fedora38, parabola, void: install
 python-setuptools

gru_bob fails to build without python-setuptools. this isn't a huge issue,
because most users probably have it already as many other python programs
depend on it too. that's probably why no one noticed until now,
when i tried to do this on a fresh artix install uncontaminated by python.

i also sorted and deduplicated the packages with 'sort -u'.
---
 config/dependencies/arch     | 16 ++++++++--------
 config/dependencies/fedora38 | 17 +++++++++--------
 config/dependencies/parabola | 15 +++++++--------
 config/dependencies/void     | 16 ++++++++--------
 4 files changed, 32 insertions(+), 32 deletions(-)
 mode change 100755 => 100644 config/dependencies/arch
 mode change 100755 => 100644 config/dependencies/parabola
 mode change 100755 => 100644 config/dependencies/void

diff --git a/config/dependencies/arch b/config/dependencies/arch
old mode 100755
new mode 100644
index aad0e462..5efa472c
--- a/config/dependencies/arch
+++ b/config/dependencies/arch
@@ -1,11 +1,11 @@
 pkg_add="pacman -S --needed --noconfirm"
 pkglist=" \
-wget git nasm perl-libwww python subversion base-devel sharutils curl parted \
-e2fsprogs unzip arm-none-eabi-gcc base-devel python base-devel perl ncurses \
-doxygen acpica gdb flex bison base-devel git openssl gcc-ada autogen help2man \
-base-devel bison flex ttf-dejavu texinfo rsync python libusb xz gawk \
-device-mapper fuse2 gettext freetype2 base-devel libpciaccess pciutils zlib \
-libftdi base-devel libusb innoextract p7zip unarchiver cmake swig dtc \
-arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib cmake \
+acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
+autogen base-devel bison cmake curl device-mapper doxygen \
+dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \
+help2man innoextract libftdi libpciaccess libusb nasm ncurses openssl p7zip \
+parted pciutils perl perl-libwww python python-setuptools rsync sharutils \
+subversion swig texinfo ttf-dejavu unarchiver unzip wget xz zlib \
 "
-aur_notice="unifont bdf-unifont"
+
+aur_notice="bdf-unifont unifont"
diff --git a/config/dependencies/fedora38 b/config/dependencies/fedora38
index 460335cd..1b9affe3 100755
--- a/config/dependencies/fedora38
+++ b/config/dependencies/fedora38
@@ -1,11 +1,12 @@
 pkg_add="dnf -y install"
 pkglist=" \
-acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-gcc-cs \
-arm-none-eabi-newlib autogen bison bzip2 cmake curl dejavu-fonts-all \
-device-mapper doxygen e2fsprogs flex freetype-devel fuse gawk gcc gcc-gnat \
-gdb gettext gettext-devel git gprbuild help2man innoextract intltool \
-libftdi-devel libselinux-devel libusb1 libusb1-devel nasm ncurses-devel \
-openssl-devel p7zip p7zip-plugins pandoc parted pciutils-devel perl \
-perl-libwww-perl python-unversioned-command python3 rsync sharutils subversion \
-texinfo unar unifont unifont-fonts unifont-ttf-fonts unzip wget xz zlib-devel \
+acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc \
+arm-none-eabi-gcc arm-none-eabi-newlib autogen bison bzip2 cmake curl \
+dejavu-fonts-all device-mapper doxygen e2fsprogs flex freetype-devel fuse \
+gawk gcc gcc-gnat gdb gettext gettext-devel git gprbuild help2man \
+innoextract intltool libftdi-devel libselinux-devel libusb1 libusb1-devel \
+nasm ncurses-devel openssl-devel p7zip p7zip-plugins pandoc parted \
+pciutils-devel perl perl-libwww-perl python-unversioned-command python3 \
+python3-setuptools rsync sharutils subversion texinfo unar unifont \
+unifont-fonts unifont-ttf-fonts unzip wget xz zlib-devel \
 "
diff --git a/config/dependencies/parabola b/config/dependencies/parabola
old mode 100755
new mode 100644
index 36f37838..ab84495a
--- a/config/dependencies/parabola
+++ b/config/dependencies/parabola
@@ -1,11 +1,10 @@
 pkg_add="pacman -S --needed --noconfirm"
 pkglist=" \
-wget git nasm perl-libwww python subversion base-devel sharutils curl parted \
-e2fsprogs unzip arm-none-eabi-gcc base-devel python base-devel perl ncurses \
-doxygen acpica gdb flex bison base-devel git openssl gcc-ada autogen help2man \
-base-devel bison flex ttf-dejavu texinfo rsync python libusb xz gawk \
-device-mapper fuse2 gettext freetype2 base-devel libpciaccess pciutils zlib \
-libftdi base-devel libusb innoextract p7zip unarchiver swig dtc cmake unifont-utils \
-bdf-unifont  \
-arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib cmake \
+acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
+autogen base-devel bdf-unifont bison cmake curl device-mapper doxygen \
+dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \
+help2man innoextract libftdi libpciaccess libusb nasm ncurses openssl p7zip \
+parted pciutils perl perl-libwww python python-setuptools rsync sharutils \
+subversion swig texinfo ttf-dejavu unarchiver unifont-utils unzip wget xz \
+zlib \
 "
diff --git a/config/dependencies/void b/config/dependencies/void
old mode 100755
new mode 100644
index c889accd..4d8d5444
--- a/config/dependencies/void
+++ b/config/dependencies/void
@@ -1,11 +1,11 @@
 pkg_add="xbps-install -y"
 pkglist=" \
-wget git nasm perl-LWP python subversion base-devel sharutils curl parted \
-e2fsprogs unzip cross-arm-none-eabi-gcc base-devel python base-devel perl \
-ncurses doxygen acpica-utils gdb flex bison base-devel git openssl gcc-ada \
-ncurses-devel font-unifont-bdf autogen help2man base-devel bison flex \
-dejavu-fonts-ttf texinfo rsync python3 libusb xz gawk device-mapper fuse gettext \
-gettext-devel freetype  base-devel libpciaccess pciutils zlib libftdi1 \
-base-devel libusb cmake innoextract p7zip unar cross-arm-none-eabi-binutils \
-cross-arm-none-eabi-gcc cross-arm-none-eabi-newlib cross-arm-none-eabi-libstdc++ cmake \
+acpica-utils autogen base-devel bison cmake \
+cross-arm-none-eabi-binutils cross-arm-none-eabi-gcc \
+cross-arm-none-eabi-libstdc++ cross-arm-none-eabi-newlib curl \
+dejavu-fonts-ttf device-mapper doxygen e2fsprogs flexflex font-unifont-bdf \
+freetype fuse gawk gcc-ada gdb gettext gettext-devel git help2man \
+innoextract libftdi1 libpciaccess libusb nasm ncurses ncurses-devel openssl
+p7zip parted pciutils perl perl-LWP python python3 python3-setuptools rsync \
+sharutils subversion texinfo unar unzip wget xz zlib \
 "

From 444f2899e69e9b84fd5428625aa04b00c1341804 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Mon, 23 Oct 2023 18:26:13 +0300
Subject: [PATCH 0004/1549] u-boot: qemu_arm64_12mb: Enable video console

Add my upstream U-Boot series enabling video console support by default
for QEMU ARM virtual machines. Similarly, enable the related config
options for our builds using savedefconfig and olddefconfig.

The resulting ROM can be booted with a command line like:

    qemu-system-aarch64 \
        -machine virt,secure=on,virtualization=on \
        -cpu cortex-a72 -m 1G \
        -serial stdio -device VGA \
        -device qemu-xhci \
        -device usb-kbd -device usb-mouse \
        -bios bin/qemu_arm64_12mb/*.rom

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 ...Bochs-console-buffering-USB-keyboard.patch | 348 ++++++++++++++++++
 config/u-boot/qemu_arm64_12mb/config/default  | 115 +++++-
 2 files changed, 452 insertions(+), 11 deletions(-)
 create mode 100644 config/u-boot/default/patches/0006-arm-qemu-Enable-Bochs-console-buffering-USB-keyboard.patch

diff --git a/config/u-boot/default/patches/0006-arm-qemu-Enable-Bochs-console-buffering-USB-keyboard.patch b/config/u-boot/default/patches/0006-arm-qemu-Enable-Bochs-console-buffering-USB-keyboard.patch
new file mode 100644
index 00000000..7aa4e526
--- /dev/null
+++ b/config/u-boot/default/patches/0006-arm-qemu-Enable-Bochs-console-buffering-USB-keyboard.patch
@@ -0,0 +1,348 @@
+From 2957e8bf43edf8de6e579ce1ed7f95e5bb4a1437 Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Mon, 14 Aug 2023 20:39:41 +0300
+Subject: [PATCH 1/4] arm: qemu: Enable Bochs video support
+
+Commit 716161663ec49 ("riscv: qemu: Enable Bochs video support") enables
+a video console for QEMU RISC-V virtual machines using an emulated Bochs
+VGA card. Similarly, enable it for ARM virtual machines as well.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Bin Meng <bmeng@tinylab.org>
+Link: https://lore.kernel.org/u-boot/20230814173944.288356-2-alpernebiyasak@gmail.com/
+---
+ arch/arm/Kconfig                      | 4 ++++
+ board/emulation/qemu-arm/qemu-arm.env | 3 +++
+ doc/board/emulation/qemu-arm.rst      | 4 ++++
+ 3 files changed, 11 insertions(+)
+
+diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
+index 328e2ddc33af..d96e230e9ee8 100644
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -1036,6 +1036,10 @@ config ARCH_QEMU
+ 	imply DM_RTC
+ 	imply RTC_PL031
+ 	imply OF_HAS_PRIOR_STAGE
++	imply VIDEO
++	imply VIDEO_BOCHS
++	imply SYS_WHITE_ON_BLACK
++	imply SYS_CONSOLE_IS_IN_ENV
+ 
+ config ARCH_RMOBILE
+ 	bool "Renesas ARM SoCs"
+diff --git a/board/emulation/qemu-arm/qemu-arm.env b/board/emulation/qemu-arm/qemu-arm.env
+index e658d5ee7d63..86a99a2e8713 100644
+--- a/board/emulation/qemu-arm/qemu-arm.env
++++ b/board/emulation/qemu-arm/qemu-arm.env
+@@ -2,6 +2,9 @@
+ 
+ /* environment for qemu-arm and qemu-arm64 */
+ 
++stdin=serial
++stdout=serial,vidconsole
++stderr=serial,vidconsole
+ fdt_high=0xffffffff
+ initrd_high=0xffffffff
+ fdt_addr=0x40000000
+diff --git a/doc/board/emulation/qemu-arm.rst b/doc/board/emulation/qemu-arm.rst
+index 7291fa4a3150..c423fce76edd 100644
+--- a/doc/board/emulation/qemu-arm.rst
++++ b/doc/board/emulation/qemu-arm.rst
+@@ -67,6 +67,10 @@ Additional persistent U-Boot environment support can be added as follows:
+ Additional peripherals that have been tested to work in both U-Boot and Linux
+ can be enabled with the following command line parameters:
+ 
++- To add a video console, remove "-nographic" and add e.g.::
++
++    -serial stdio -device VGA
++
+ - To add a Serial ATA disk via an Intel ICH9 AHCI controller, pass e.g.::
+ 
+     -drive if=none,file=disk.img,format=raw,id=mydisk \
+-- 
+2.42.0
+
+
+From 5330bc1c2ad84ba9ecc473f8c24d6e15b366adf9 Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Mon, 14 Aug 2023 20:39:42 +0300
+Subject: [PATCH 2/4] arm: qemu: Enable PRE_CONSOLE_BUFFER
+
+Commit 608b80b5b855 ("riscv: qemu: Enable PRE_CONSOLE_BUFFER") enables
+buffering console messages for QEMU RISC-V virtual machines so those
+printed before the video console is available will still show up on the
+display. Similarly, enable it for ARM virtual machines as well.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
+Reviewed-by: Bin Meng <bmeng@tinylab.org>
+Link: https://lore.kernel.org/u-boot/20230814173944.288356-3-alpernebiyasak@gmail.com/
+---
+ arch/arm/Kconfig                 | 1 +
+ board/emulation/qemu-arm/Kconfig | 4 ++++
+ 2 files changed, 5 insertions(+)
+
+diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
+index d96e230e9ee8..1cc2be55140a 100644
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -1040,6 +1040,7 @@ config ARCH_QEMU
+ 	imply VIDEO_BOCHS
+ 	imply SYS_WHITE_ON_BLACK
+ 	imply SYS_CONSOLE_IS_IN_ENV
++	imply PRE_CONSOLE_BUFFER
+ 
+ config ARCH_RMOBILE
+ 	bool "Renesas ARM SoCs"
+diff --git a/board/emulation/qemu-arm/Kconfig b/board/emulation/qemu-arm/Kconfig
+index ed9949651c4b..09c95413a541 100644
+--- a/board/emulation/qemu-arm/Kconfig
++++ b/board/emulation/qemu-arm/Kconfig
+@@ -12,6 +12,10 @@ config BOARD_SPECIFIC_OPTIONS # dummy
+ 	imply VIRTIO_NET
+ 	imply VIRTIO_BLK
+ 
++config PRE_CON_BUF_ADDR
++	hex
++	default 0x40100000
++
+ endif
+ 
+ if TARGET_QEMU_ARM_64BIT && !TFABOOT
+-- 
+2.42.0
+
+
+From 7f666214855d062dc939ff54a0fa52fbde9f0391 Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Mon, 14 Aug 2023 20:39:43 +0300
+Subject: [PATCH 3/4] arm: qemu: Enable usb keyboard as an input device
+
+Commit 02be57caf730 ("riscv: qemu: Enable usb keyboard as an input
+device") adds PCI xHCI support to QEMU RISC-V virtual machines and
+enables using a USB keyboard as one of the input devices. Similarly,
+enable those for ARM virtual machines as well.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
+Reviewed-by: Bin Meng <bmeng@tinylab.org>
+Link: https://lore.kernel.org/u-boot/20230814173944.288356-4-alpernebiyasak@gmail.com/
+---
+ arch/arm/Kconfig                      | 5 +++++
+ board/emulation/qemu-arm/qemu-arm.c   | 5 +++++
+ board/emulation/qemu-arm/qemu-arm.env | 2 +-
+ configs/qemu_arm64_defconfig          | 2 --
+ configs/qemu_arm_defconfig            | 2 --
+ doc/board/emulation/qemu-arm.rst      | 4 ++++
+ 6 files changed, 15 insertions(+), 5 deletions(-)
+
+diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
+index 1cc2be55140a..4c739bd9bc82 100644
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -1041,6 +1041,11 @@ config ARCH_QEMU
+ 	imply SYS_WHITE_ON_BLACK
+ 	imply SYS_CONSOLE_IS_IN_ENV
+ 	imply PRE_CONSOLE_BUFFER
++	imply USB
++	imply USB_XHCI_HCD
++	imply USB_XHCI_PCI
++	imply USB_KEYBOARD
++	imply CMD_USB
+ 
+ config ARCH_RMOBILE
+ 	bool "Renesas ARM SoCs"
+diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c
+index dfea0d92a3c8..942f1fff5717 100644
+--- a/board/emulation/qemu-arm/qemu-arm.c
++++ b/board/emulation/qemu-arm/qemu-arm.c
+@@ -11,6 +11,7 @@
+ #include <fdtdec.h>
+ #include <init.h>
+ #include <log.h>
++#include <usb.h>
+ #include <virtio_types.h>
+ #include <virtio.h>
+ 
+@@ -114,6 +115,10 @@ int board_late_init(void)
+ 	 */
+ 	virtio_init();
+ 
++	/* start usb so that usb keyboard can be used as input device */
++	if (CONFIG_IS_ENABLED(USB_KEYBOARD))
++		usb_init();
++
+ 	return 0;
+ }
+ 
+diff --git a/board/emulation/qemu-arm/qemu-arm.env b/board/emulation/qemu-arm/qemu-arm.env
+index 86a99a2e8713..fb4adef281ed 100644
+--- a/board/emulation/qemu-arm/qemu-arm.env
++++ b/board/emulation/qemu-arm/qemu-arm.env
+@@ -2,7 +2,7 @@
+ 
+ /* environment for qemu-arm and qemu-arm64 */
+ 
+-stdin=serial
++stdin=serial,usbkbd
+ stdout=serial,vidconsole
+ stderr=serial,vidconsole
+ fdt_high=0xffffffff
+diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig
+index 94bd96678443..f6b8ae530a4a 100644
+--- a/configs/qemu_arm64_defconfig
++++ b/configs/qemu_arm64_defconfig
+@@ -35,7 +35,6 @@ CONFIG_CMD_NVEDIT_EFI=y
+ CONFIG_CMD_DFU=y
+ CONFIG_CMD_MTD=y
+ CONFIG_CMD_PCI=y
+-CONFIG_CMD_USB=y
+ CONFIG_CMD_TPM=y
+ CONFIG_CMD_MTDPARTS=y
+ CONFIG_ENV_IS_IN_FLASH=y
+@@ -68,7 +67,6 @@ CONFIG_SYSRESET=y
+ CONFIG_SYSRESET_CMD_POWEROFF=y
+ CONFIG_SYSRESET_PSCI=y
+ CONFIG_TPM2_MMIO=y
+-CONFIG_USB=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_EHCI_PCI=y
+ CONFIG_TPM=y
+diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig
+index 7cb1e9f037ff..1347b86f34b1 100644
+--- a/configs/qemu_arm_defconfig
++++ b/configs/qemu_arm_defconfig
+@@ -36,7 +36,6 @@ CONFIG_CMD_NVEDIT_EFI=y
+ CONFIG_CMD_DFU=y
+ CONFIG_CMD_MTD=y
+ CONFIG_CMD_PCI=y
+-CONFIG_CMD_USB=y
+ CONFIG_CMD_TPM=y
+ CONFIG_CMD_MTDPARTS=y
+ CONFIG_ENV_IS_IN_FLASH=y
+@@ -69,7 +68,6 @@ CONFIG_SYSRESET=y
+ CONFIG_SYSRESET_CMD_POWEROFF=y
+ CONFIG_SYSRESET_PSCI=y
+ CONFIG_TPM2_MMIO=y
+-CONFIG_USB=y
+ CONFIG_USB_EHCI_HCD=y
+ CONFIG_USB_EHCI_PCI=y
+ CONFIG_TPM=y
+diff --git a/doc/board/emulation/qemu-arm.rst b/doc/board/emulation/qemu-arm.rst
+index c423fce76edd..5481ef6da328 100644
+--- a/doc/board/emulation/qemu-arm.rst
++++ b/doc/board/emulation/qemu-arm.rst
+@@ -84,6 +84,10 @@ can be enabled with the following command line parameters:
+ 
+     -device usb-ehci,id=ehci
+ 
++- To add a USB keyboard attached to an emulated xHCI controller, pass e.g.::
++
++    -device qemu-xhci,id=xhci -device usb-kbd,bus=xhci.0
++
+ - To add an NVMe disk, pass e.g.::
+ 
+     -drive if=none,file=disk.img,id=mydisk -device nvme,drive=mydisk,serial=foo
+-- 
+2.42.0
+
+
+From fcc1b6cb56beaaf90bf80928627a606f33a42c3c Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Mon, 14 Aug 2023 20:39:44 +0300
+Subject: [PATCH 4/4] doc: qemu: arm: Add a section on booting Linux distros
+
+Add an example qemu-system-aarch64 command that can make U-Boot on QEMU
+boot into the Debian Installer, along with resulting console messages
+from U-Boot, based on the existing documentation section for the x86
+version.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Link: https://lore.kernel.org/u-boot/20230814173944.288356-5-alpernebiyasak@gmail.com/
+---
+ doc/board/emulation/qemu-arm.rst | 68 ++++++++++++++++++++++++++++++++
+ 1 file changed, 68 insertions(+)
+
+diff --git a/doc/board/emulation/qemu-arm.rst b/doc/board/emulation/qemu-arm.rst
+index 5481ef6da328..1c91c7f3ac67 100644
+--- a/doc/board/emulation/qemu-arm.rst
++++ b/doc/board/emulation/qemu-arm.rst
+@@ -98,6 +98,74 @@ can be enabled with the following command line parameters:
+ 
+ These have been tested in QEMU 2.9.0 but should work in at least 2.5.0 as well.
+ 
++Booting distros
++---------------
++
++It is possible to install and boot a standard Linux distribution using
++qemu_arm64 by setting up a root disk::
++
++    qemu-img create root.img 20G
++
++then using the installer to install. For example, with Debian 12::
++
++    qemu-system-aarch64 \
++      -machine virt -cpu cortex-a53 -m 4G -smp 4 \
++      -bios u-boot.bin \
++      -serial stdio -device VGA \
++      -nic user,model=virtio-net-pci \
++      -device virtio-rng-pci \
++      -device qemu-xhci,id=xhci \
++      -device usb-kbd -device usb-tablet \
++      -drive if=virtio,file=debian-12.0.0-arm64-netinst.iso,format=raw,readonly=on,media=cdrom \
++      -drive if=virtio,file=root.img,format=raw,media=disk
++
++The output will be something like this::
++
++    U-Boot 2023.10-rc2-00075-gbe8fbe718e35 (Aug 11 2023 - 08:38:49 +0000)
++
++    DRAM:  4 GiB
++    Core:  51 devices, 14 uclasses, devicetree: board
++    Flash: 64 MiB
++    Loading Environment from Flash... *** Warning - bad CRC, using default environment
++
++    In:    serial,usbkbd
++    Out:   serial,vidconsole
++    Err:   serial,vidconsole
++    Bus xhci_pci: Register 8001040 NbrPorts 8
++    Starting the controller
++    USB XHCI 1.00
++    scanning bus xhci_pci for devices... 3 USB Device(s) found
++    Net:   eth0: virtio-net#32
++    Hit any key to stop autoboot:  0
++    Scanning for bootflows in all bootdevs
++    Seq  Method       State   Uclass    Part  Name                      Filename
++    ---  -----------  ------  --------  ----  ------------------------  ----------------
++    Scanning global bootmeth 'efi_mgr':
++    Scanning bootdev 'fw-cfg@9020000.bootdev':
++    fatal: no kernel available
++    scanning bus for devices...
++    Scanning bootdev 'virtio-blk#34.bootdev':
++      0  efi          ready   virtio       2  virtio-blk#34.bootdev.par efi/boot/bootaa64.efi
++    ** Booting bootflow 'virtio-blk#34.bootdev.part_2' with efi
++    Using prior-stage device tree
++    Failed to load EFI variables
++    Error: writing contents
++    ** Unable to write file ubootefi.var **
++    Failed to persist EFI variables
++    Missing TPMv2 device for EFI_TCG_PROTOCOL
++    Booting /efi\boot\bootaa64.efi
++    Error: writing contents
++    ** Unable to write file ubootefi.var **
++    Failed to persist EFI variables
++    Welcome to GRUB!
++
++Standard boot looks through various available devices and finds the virtio
++disks, then boots from the first one. After a second or so the grub menu appears
++and you can work through the installer flow normally.
++
++After the installation, you can boot into the installed system by running QEMU
++again without the drive argument corresponding to the installer CD image.
++
+ Enabling TPMv2 support
+ ----------------------
+ 
+-- 
+2.42.0
+
diff --git a/config/u-boot/qemu_arm64_12mb/config/default b/config/u-boot/qemu_arm64_12mb/config/default
index 982b6889..83c90261 100644
--- a/config/u-boot/qemu_arm64_12mb/config/default
+++ b/config/u-boot/qemu_arm64_12mb/config/default
@@ -188,6 +188,8 @@ CONFIG_SYS_MONITOR_LEN=0
 # CONFIG_TARGET_QEMU_ARM_32BIT is not set
 CONFIG_TARGET_QEMU_ARM_64BIT=y
 CONFIG_ERR_PTR_OFFSET=0x0
+CONFIG_PRE_CON_BUF_ADDR=0x40100000
+CONFIG_PRE_CON_BUF_SZ=4096
 CONFIG_BOOTSTAGE_STASH_ADDR=0
 CONFIG_DEBUG_UART_BASE=0x9000000
 CONFIG_DEBUG_UART_CLOCK=0
@@ -311,6 +313,7 @@ CONFIG_BOOTMETH_DISTRO=y
 CONFIG_BOOTMETH_VBE_REQUEST=y
 CONFIG_BOOTMETH_VBE_SIMPLE=y
 CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
+CONFIG_EXPO=y
 CONFIG_BOOTMETH_SCRIPT=y
 CONFIG_LEGACY_IMAGE_FORMAT=y
 CONFIG_SUPPORT_RAW_INITRD=y
@@ -364,7 +367,8 @@ CONFIG_BOOTDELAY=2
 CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="bootflow scan -lb"
 CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT=""
+CONFIG_PREBOOT="usb start"
+CONFIG_PREBOOT_DEFINED=y
 CONFIG_DEFAULT_FDT_FILE=""
 # CONFIG_SAVE_PREV_BL_FDT_ADDR is not set
 # CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR is not set
@@ -384,15 +388,16 @@ CONFIG_LOGLEVEL=4
 # CONFIG_SILENT_CONSOLE is not set
 # CONFIG_SPL_SILENT_CONSOLE is not set
 # CONFIG_TPL_SILENT_CONSOLE is not set
-# CONFIG_PRE_CONSOLE_BUFFER is not set
+CONFIG_PRE_CONSOLE_BUFFER=y
 CONFIG_CONSOLE_FLUSH_SUPPORT=y
-# CONFIG_CONSOLE_MUX is not set
-# CONFIG_SYS_CONSOLE_IS_IN_ENV is not set
+CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 # CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
+# CONFIG_SYS_CONSOLE_ENV_OVERWRITE is not set
 # CONFIG_SYS_CONSOLE_INFO_QUIET is not set
-# CONFIG_SYS_STDIO_DEREGISTER is not set
+CONFIG_SYS_STDIO_DEREGISTER=y
 # CONFIG_SPL_SYS_STDIO_DEREGISTER is not set
-# CONFIG_SYS_DEVICE_NULLDEV is not set
+CONFIG_SYS_DEVICE_NULLDEV=y
 
 #
 # Logging
@@ -669,11 +674,12 @@ CONFIG_CMD_PXE=y
 # Misc commands
 #
 # CONFIG_CMD_2048 is not set
+# CONFIG_CMD_BMP is not set
 # CONFIG_CMD_BSP is not set
 CONFIG_CMD_BLOCK_CACHE=y
 # CONFIG_CMD_CACHE is not set
 # CONFIG_CMD_CONITRACE is not set
-# CONFIG_CMD_CLS is not set
+CONFIG_CMD_CLS=y
 # CONFIG_CMD_EFIDEBUG is not set
 CONFIG_CMD_EFICONFIG=y
 # CONFIG_CMD_EXCEPTION is not set
@@ -692,6 +698,8 @@ CONFIG_CMD_QFW=y
 # CONFIG_CMD_PSTORE is not set
 # CONFIG_CMD_TERMINAL is not set
 # CONFIG_CMD_UUID is not set
+CONFIG_CMD_VIDCONSOLE=y
+# CONFIG_CMD_SELECT_FONT is not set
 
 #
 # TI specific command line interface
@@ -1023,8 +1031,10 @@ CONFIG_I2C=y
 # CONFIG_SYS_I2C_MV is not set
 # CONFIG_SYS_I2C_MVTWSI is not set
 CONFIG_INPUT=y
-# CONFIG_DM_KEYBOARD is not set
+CONFIG_DM_KEYBOARD=y
+# CONFIG_BUTTON_KEYBOARD is not set
 # CONFIG_CROS_EC_KEYB is not set
+# CONFIG_I8042_KEYB is not set
 # CONFIG_TEGRA_KEYBOARD is not set
 # CONFIG_TWL4030_INPUT is not set
 
@@ -1413,7 +1423,12 @@ CONFIG_DM_USB=y
 # USB Host Controller Drivers
 #
 CONFIG_USB_HOST=y
-# CONFIG_USB_XHCI_HCD is not set
+CONFIG_USB_XHCI_HCD=y
+# CONFIG_USB_XHCI_DWC3 is not set
+# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
+CONFIG_USB_XHCI_PCI=y
+# CONFIG_USB_XHCI_FSL is not set
+# CONFIG_USB_XHCI_BRCM is not set
 CONFIG_USB_EHCI_HCD=y
 # CONFIG_USB_EHCI_MSM is not set
 CONFIG_USB_EHCI_PCI=y
@@ -1425,6 +1440,8 @@ CONFIG_USB_EHCI_PCI=y
 # CONFIG_USB_DWC2 is not set
 # CONFIG_USB_R8A66597_HCD is not set
 # CONFIG_USB_ISP1760 is not set
+# CONFIG_USB_CDNS3 is not set
+# CONFIG_USB_DWC3 is not set
 
 #
 # Legacy MUSB Support
@@ -1452,9 +1469,13 @@ CONFIG_USB_EHCI_PCI=y
 # USB peripherals
 #
 CONFIG_USB_STORAGE=y
-# CONFIG_USB_KEYBOARD is not set
+CONFIG_USB_KEYBOARD=y
 # CONFIG_USB_ONBOARD_HUB is not set
 CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=1000
+CONFIG_USB_KEYBOARD_FN_KEYS=y
+CONFIG_SYS_USB_EVENT_POLL=y
+# CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE is not set
+# CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is not set
 # CONFIG_USB_HOST_ETHER is not set
 # CONFIG_USB_GADGET is not set
 # CONFIG_SPL_USB_GADGET is not set
@@ -1468,7 +1489,79 @@ CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=1000
 #
 # Graphics support
 #
-# CONFIG_VIDEO is not set
+CONFIG_VIDEO=y
+# CONFIG_VIDEO_FONT_4X6 is not set
+CONFIG_VIDEO_FONT_8X16=y
+# CONFIG_VIDEO_FONT_SUN12X22 is not set
+# CONFIG_VIDEO_FONT_16X32 is not set
+CONFIG_VIDEO_LOGO=y
+CONFIG_BACKLIGHT=y
+CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x800000
+# CONFIG_VIDEO_COPY is not set
+# CONFIG_VIDEO_DAMAGE is not set
+# CONFIG_BACKLIGHT_GPIO is not set
+CONFIG_VIDEO_BPP8=y
+CONFIG_VIDEO_BPP16=y
+CONFIG_VIDEO_BPP32=y
+CONFIG_VIDEO_ANSI=y
+# CONFIG_VIDEO_MIPI_DSI is not set
+CONFIG_CONSOLE_NORMAL=y
+# CONFIG_CONSOLE_ROTATION is not set
+# CONFIG_CONSOLE_TRUETYPE is not set
+CONFIG_SYS_WHITE_ON_BLACK=y
+# CONFIG_NO_FB_CLEAR is not set
+CONFIG_PANEL=y
+# CONFIG_PANEL_HX8238D is not set
+
+#
+# TrueType Fonts
+#
+# CONFIG_VIDCONSOLE_AS_LCD is not set
+CONFIG_VIDEO_BOCHS=y
+CONFIG_VIDEO_BOCHS_SIZE_X=1280
+CONFIG_VIDEO_BOCHS_SIZE_Y=1024
+# CONFIG_VIDEO_VESA is not set
+# CONFIG_VIDEO_LCD_ANX9804 is not set
+# CONFIG_ATMEL_LCD_BGR555 is not set
+# CONFIG_VIDEO_BCM2835 is not set
+# CONFIG_VIDEO_LCD_ENDEAVORU is not set
+# CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
+# CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
+# CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
+# CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
+# CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
+# CONFIG_VIDEO_LCD_SSD2828 is not set
+# CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
+# CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
+# CONFIG_VIDEO_MESON is not set
+# CONFIG_VIDEO_MVEBU is not set
+# CONFIG_I2C_EDID is not set
+# CONFIG_DISPLAY is not set
+# CONFIG_ATMEL_HLCD is not set
+# CONFIG_BACKLIGHT_LM3533 is not set
+# CONFIG_AM335X_LCD is not set
+# CONFIG_VIDEO_EXYNOS is not set
+# CONFIG_VIDEO_ROCKCHIP is not set
+# CONFIG_VIDEO_ARM_MALIDP is not set
+# CONFIG_VIDEO_STM32 is not set
+# CONFIG_VIDEO_TIDSS is not set
+# CONFIG_VIDEO_TEGRA124 is not set
+# CONFIG_VIDEO_BRIDGE is not set
+# CONFIG_VIDEO_TEGRA20 is not set
+# CONFIG_TEGRA_BACKLIGHT_PWM is not set
+# CONFIG_VIDEO_MXS is not set
+CONFIG_CONSOLE_SCROLL_LINES=1
+# CONFIG_VIDEO_SIMPLE is not set
+# CONFIG_VIDEO_DT_SIMPLEFB is not set
+# CONFIG_VIDEO_MCDE_SIMPLE is not set
+# CONFIG_OSD is not set
+# CONFIG_VIDEO_REMOVE is not set
+# CONFIG_SPLASH_SCREEN is not set
+CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
+CONFIG_VIDEO_BMP_RLE8=y
+# CONFIG_BMP_16BPP is not set
+# CONFIG_BMP_24BPP is not set
+# CONFIG_BMP_32BPP is not set
 
 #
 # VirtIO Drivers

From 03c830b2e9dd8f0847045700349c69ab40458ad8 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Mon, 23 Oct 2023 19:18:44 +0300
Subject: [PATCH 0005/1549] u-boot: Add qemu_x86_12mb build again

Add a U-Boot build for the qemu_x86_12mb board. The config is a copy of
the upstream "coreboot" defconfig, but with OF_EMBED=y.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 config/coreboot/qemu_x86_12mb/target.cfg   |    1 +
 config/u-boot/qemu_x86_12mb/config/default | 1712 ++++++++++++++++++++
 config/u-boot/qemu_x86_12mb/target.cfg     |    2 +
 3 files changed, 1715 insertions(+)
 create mode 100644 config/u-boot/qemu_x86_12mb/config/default
 create mode 100644 config/u-boot/qemu_x86_12mb/target.cfg

diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg
index d46f30b7..cefa53aa 100644
--- a/config/coreboot/qemu_x86_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_12mb/target.cfg
@@ -5,6 +5,7 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
+payload_uboot="y"
 grub_scan_disk="both"
 vendorfiles="n"
 microcode_required="n"
diff --git a/config/u-boot/qemu_x86_12mb/config/default b/config/u-boot/qemu_x86_12mb/config/default
new file mode 100644
index 00000000..bd4ddebb
--- /dev/null
+++ b/config/u-boot/qemu_x86_12mb/config/default
@@ -0,0 +1,1712 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# U-Boot 2023.10 Configuration
+#
+
+#
+# Compiler: gcc (Debian 13.2.0-5) 13.2.0
+#
+CONFIG_CREATE_ARCH_SYMLINK=y
+CONFIG_SYS_CACHE_SHIFT_6=y
+CONFIG_SYS_CACHELINE_SIZE=64
+CONFIG_LINKER_LIST_ALIGN=8
+# CONFIG_ARC is not set
+# CONFIG_ARM is not set
+# CONFIG_M68K is not set
+# CONFIG_MICROBLAZE is not set
+# CONFIG_MIPS is not set
+# CONFIG_NIOS2 is not set
+# CONFIG_PPC is not set
+# CONFIG_RISCV is not set
+# CONFIG_SANDBOX is not set
+# CONFIG_SH is not set
+CONFIG_X86=y
+# CONFIG_XTENSA is not set
+CONFIG_SYS_ARCH="x86"
+CONFIG_SYS_SOC="coreboot"
+CONFIG_SYS_VENDOR="coreboot"
+CONFIG_SYS_BOARD="coreboot"
+CONFIG_SYS_CONFIG_NAME="coreboot"
+CONFIG_TEXT_BASE=0x1110000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_ENV_SOURCE_FILE=""
+CONFIG_ENV_SIZE=0x1000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="coreboot"
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+# CONFIG_OF_LIBFDT_OVERLAY is not set
+CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
+# CONFIG_DM_RESET is not set
+CONFIG_SYS_MONITOR_LEN=1048576
+CONFIG_ERR_PTR_OFFSET=0x0
+# CONFIG_SPL is not set
+CONFIG_PRE_CON_BUF_ADDR=0x100000
+CONFIG_PRE_CON_BUF_SZ=4096
+CONFIG_BOOTSTAGE_STASH_ADDR=0
+CONFIG_IDENT_STRING=""
+CONFIG_SYS_CLK_FREQ=0
+CONFIG_SYS_MEM_TOP_HIDE=0x0
+CONFIG_SYS_LOAD_ADDR=0x02000000
+CONFIG_BUILD_TARGET=""
+# CONFIG_SYS_PCI_64BIT is not set
+CONFIG_PCI=y
+CONFIG_FWU_NUM_BANKS=2
+CONFIG_FWU_NUM_IMAGES_PER_BANK=2
+
+#
+# x86 architecture
+#
+CONFIG_X86_RUN_32BIT=y
+# CONFIG_X86_RUN_64BIT is not set
+# CONFIG_VENDOR_ADVANTECH is not set
+# CONFIG_VENDOR_CONGATEC is not set
+CONFIG_VENDOR_COREBOOT=y
+# CONFIG_VENDOR_DFI is not set
+# CONFIG_VENDOR_EFI is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_INTEL_MID is not set
+CONFIG_PCIE_ECAM_BASE=0xe0000000
+CONFIG_TARGET_COREBOOT=y
+CONFIG_SYS_CAR_ADDR=0x01920000
+CONFIG_SYS_CAR_SIZE=0x4000
+CONFIG_ROM_TABLE_ADDR=0xf0000
+CONFIG_ROM_TABLE_SIZE=0x10000
+CONFIG_CPU_ADDR_BITS=36
+# CONFIG_DEBUG_UART is not set
+CONFIG_SYS_COREBOOT=y
+CONFIG_X86_TSC_TIMER_FREQ=1000000000
+CONFIG_AHCI=y
+CONFIG_RAMBASE=0x100000
+CONFIG_HPET_ADDRESS=0xfed00000
+# CONFIG_X86_LOAD_FROM_32_BIT is not set
+# CONFIG_HAVE_INTEL_ME is not set
+# CONFIG_X86_RAMTEST is not set
+# CONFIG_USE_HOB is not set
+# CONFIG_HAVE_FSP is not set
+CONFIG_USE_CAR=y
+# CONFIG_HAVE_MRC is not set
+# CONFIG_HAVE_REFCODE is not set
+CONFIG_HAVE_MICROCODE=y
+# CONFIG_SMP is not set
+# CONFIG_HAVE_VGA_BIOS is not set
+# CONFIG_HAVE_ITSS is not set
+# CONFIG_HAVE_ACPI_RESUME is not set
+CONFIG_MAX_PIRQ_LINKS=8
+CONFIG_IRQ_SLOT_COUNT=128
+CONFIG_PCIE_ECAM_SIZE=0x10000000
+CONFIG_I8259_PIC=y
+CONFIG_APIC=y
+CONFIG_I8254_TIMER=y
+# CONFIG_SEABIOS is not set
+# CONFIG_INTEL_CAR_CQOS is not set
+CONFIG_X86_OFFSET_U_BOOT=0x1110000
+# CONFIG_ACPI_GPE is not set
+CONFIG_SA_PCIEX_LENGTH=0x10000000
+CONFIG_COREBOOT_SYSINFO=y
+# CONFIG_OF_BOARD_FIXUP is not set
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_CC_IS_GCC=y
+CONFIG_GCC_VERSION=130200
+CONFIG_CLANG_VERSION=0
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+# CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
+# CONFIG_CC_OPTIMIZE_FOR_DEBUG is not set
+# CONFIG_OPTIMIZE_INLINING is not set
+CONFIG_CC_HAS_ASM_INLINE=y
+# CONFIG_ENV_VARS_UBOOT_CONFIG is not set
+# CONFIG_SYS_BOOT_GET_CMDLINE is not set
+# CONFIG_SYS_BOOT_GET_KBD is not set
+CONFIG_SYS_MALLOC_F=y
+# CONFIG_VALGRIND is not set
+CONFIG_EXPERT=y
+CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y
+# CONFIG_SYS_MALLOC_DEFAULT_TO_INIT is not set
+# CONFIG_TOOLS_DEBUG is not set
+# CONFIG_PHYS_64BIT is not set
+# CONFIG_FDT_64BIT is not set
+# CONFIG_REMAKE_ELF is not set
+# CONFIG_HAS_BOARD_SIZE_LIMIT is not set
+# CONFIG_SYS_CUSTOM_LDSCRIPT is not set
+CONFIG_PLATFORM_ELFENTRY="_start"
+CONFIG_STACK_SIZE=0x1000000
+CONFIG_SYS_SRAM_BASE=0x0
+CONFIG_SYS_SRAM_SIZE=0x0
+# CONFIG_MP is not set
+# CONFIG_API is not set
+
+#
+# Boot options
+#
+
+#
+# Boot images
+#
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_TIMESTAMP=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x0
+CONFIG_FIT_FULL_CHECK=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_SIGNATURE_MAX_SIZE=0x10000000
+# CONFIG_FIT_RSASSA_PSS is not set
+# CONFIG_FIT_CIPHER is not set
+# CONFIG_FIT_VERBOSE is not set
+# CONFIG_FIT_BEST_MATCH is not set
+CONFIG_FIT_PRINT=y
+# CONFIG_SPL_LOAD_FIT_FULL is not set
+CONFIG_PXE_UTILS=y
+CONFIG_BOOTSTD=y
+CONFIG_BOOTSTD_FULL=y
+# CONFIG_BOOTSTD_DEFAULTS is not set
+CONFIG_BOOTSTD_BOOTCOMMAND=y
+CONFIG_BOOTMETH_GLOBAL=y
+CONFIG_BOOTMETH_CROS=y
+CONFIG_BOOTMETH_EXTLINUX=y
+CONFIG_BOOTMETH_EFILOADER=y
+CONFIG_BOOTMETH_VBE=y
+CONFIG_BOOTMETH_VBE_REQUEST=y
+CONFIG_BOOTMETH_VBE_SIMPLE=y
+CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
+CONFIG_EXPO=y
+CONFIG_BOOTMETH_SCRIPT=y
+# CONFIG_LEGACY_IMAGE_FORMAT is not set
+# CONFIG_SUPPORT_RAW_INITRD is not set
+# CONFIG_OF_BOARD_SETUP is not set
+# CONFIG_OF_SYSTEM_SETUP is not set
+# CONFIG_OF_STDOUT_VIA_ALIAS is not set
+CONFIG_HAVE_TEXT_BASE=y
+CONFIG_HAVE_SYS_MONITOR_BASE=y
+CONFIG_SYS_MONITOR_BASE=0x01110000
+# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
+# CONFIG_CHROMEOS is not set
+# CONFIG_CHROMEOS_VBOOT is not set
+# CONFIG_RAMBOOT_PBL is not set
+CONFIG_SYS_BOOT_RAMDISK_HIGH=y
+# CONFIG_DISTRO_DEFAULTS is not set
+
+#
+# Boot timing
+#
+# CONFIG_BOOTSTAGE is not set
+CONFIG_BOOTSTAGE_STASH_SIZE=0x1000
+CONFIG_SHOW_BOOT_PROGRESS=y
+
+#
+# Boot media
+#
+# CONFIG_NAND_BOOT is not set
+# CONFIG_ONENAND_BOOT is not set
+# CONFIG_QSPI_BOOT is not set
+# CONFIG_SATA_BOOT is not set
+# CONFIG_SD_BOOT is not set
+# CONFIG_SD_BOOT_QSPI is not set
+# CONFIG_SPI_BOOT is not set
+
+#
+# Autoboot options
+#
+CONFIG_AUTOBOOT=y
+CONFIG_BOOTDELAY=2
+# CONFIG_AUTOBOOT_KEYED is not set
+# CONFIG_AUTOBOOT_USE_MENUKEY is not set
+# CONFIG_BOOT_RETRY is not set
+
+#
+# Image support
+#
+# CONFIG_IMAGE_PRE_LOAD is not set
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
+# CONFIG_BOOTARGS_SUBST is not set
+# CONFIG_USE_BOOTCOMMAND is not set
+# CONFIG_USE_PREBOOT is not set
+CONFIG_DEFAULT_FDT_FILE=""
+
+#
+# Configuration editor
+#
+# CONFIG_CEDIT is not set
+
+#
+# Console
+#
+CONFIG_MENU=y
+# CONFIG_CONSOLE_RECORD is not set
+# CONFIG_DISABLE_CONSOLE is not set
+CONFIG_LOGLEVEL=4
+# CONFIG_SILENT_CONSOLE is not set
+# CONFIG_SPL_SILENT_CONSOLE is not set
+# CONFIG_TPL_SILENT_CONSOLE is not set
+CONFIG_PRE_CONSOLE_BUFFER=y
+CONFIG_CONSOLE_FLUSH_SUPPORT=y
+CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
+# CONFIG_SYS_CONSOLE_ENV_OVERWRITE is not set
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_SYS_STDIO_DEREGISTER=y
+# CONFIG_SPL_SYS_STDIO_DEREGISTER is not set
+CONFIG_SYS_DEVICE_NULLDEV=y
+
+#
+# Logging
+#
+CONFIG_LOG=y
+CONFIG_LOG_MAX_LEVEL=6
+CONFIG_LOG_DEFAULT_LEVEL=6
+CONFIG_LOG_CONSOLE=y
+# CONFIG_LOGF_FILE is not set
+CONFIG_LOGF_LINE=y
+CONFIG_LOGF_FUNC=y
+CONFIG_LOGF_FUNC_PAD=20
+# CONFIG_LOG_SYSLOG is not set
+# CONFIG_LOG_ERROR_RETURN is not set
+
+#
+# Init options
+#
+# CONFIG_BOARD_TYPES is not set
+CONFIG_DISPLAY_CPUINFO=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+
+#
+# Start-up hooks
+#
+# CONFIG_CYCLIC is not set
+CONFIG_EVENT=y
+CONFIG_EVENT_DYNAMIC=y
+# CONFIG_EVENT_DEBUG is not set
+# CONFIG_ARCH_MISC_INIT is not set
+# CONFIG_BOARD_EARLY_INIT_F is not set
+CONFIG_BOARD_EARLY_INIT_R=y
+# CONFIG_BOARD_POSTCLK_INIT is not set
+# CONFIG_BOARD_LATE_INIT is not set
+# CONFIG_HWCONFIG is not set
+CONFIG_LAST_STAGE_INIT=y
+# CONFIG_MISC_INIT_R is not set
+# CONFIG_SYS_MALLOC_BOOTPARAMS is not set
+# CONFIG_ID_EEPROM is not set
+CONFIG_PCI_INIT_R=y
+# CONFIG_RESET_PHY_R is not set
+
+#
+# Security support
+#
+CONFIG_HASH=y
+# CONFIG_STACKPROTECTOR is not set
+# CONFIG_BOARD_RNG_SEED is not set
+
+#
+# Update support
+#
+# CONFIG_UPDATE_TFTP is not set
+# CONFIG_ANDROID_AB is not set
+
+#
+# Blob list
+#
+# CONFIG_BLOBLIST is not set
+CONFIG_SUPPORT_SPL=y
+CONFIG_SUPPORT_TPL=y
+# CONFIG_TPL is not set
+# CONFIG_VPL is not set
+CONFIG_IMAGE_SIGN_INFO=y
+# CONFIG_FDT_SIMPLEFB is not set
+# CONFIG_BMP is not set
+
+#
+# Command line interface
+#
+CONFIG_CMDLINE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMDLINE_EDITING=y
+# CONFIG_CMDLINE_PS_SUPPORT is not set
+CONFIG_AUTO_COMPLETE=y
+CONFIG_SYS_LONGHELP=y
+CONFIG_SYS_PROMPT="=> "
+CONFIG_SYS_PROMPT_HUSH_PS2="> "
+CONFIG_SYS_MAXARGS=16
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=1044
+CONFIG_SYS_XTRACE=y
+
+#
+# Commands
+#
+
+#
+# Info commands
+#
+CONFIG_CMD_ACPI=y
+CONFIG_CMD_BDI=y
+CONFIG_CMD_BDINFO_EXTRA=y
+# CONFIG_CMD_CONFIG is not set
+CONFIG_CMD_CONSOLE=y
+# CONFIG_CMD_LICENSE is not set
+# CONFIG_CMD_PMC is not set
+
+#
+# Boot commands
+#
+CONFIG_CMD_BOOTD=y
+CONFIG_CMD_BOOTM=y
+CONFIG_CMD_BOOTDEV=y
+CONFIG_CMD_BOOTFLOW=y
+CONFIG_CMD_BOOTFLOW_FULL=y
+CONFIG_CMD_BOOTMETH=y
+CONFIG_BOOTM_EFI=y
+# CONFIG_CMD_BOOTZ is not set
+CONFIG_BOOTM_LINUX=y
+CONFIG_BOOTM_NETBSD=y
+# CONFIG_BOOTM_OPENRTOS is not set
+# CONFIG_BOOTM_OSE is not set
+CONFIG_BOOTM_PLAN9=y
+CONFIG_BOOTM_RTEMS=y
+CONFIG_CMD_VBE=y
+CONFIG_BOOTM_VXWORKS=y
+CONFIG_SYS_BOOTM_LEN=0x1000000
+CONFIG_CMD_BOOTEFI=y
+CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
+# CONFIG_CMD_BOOTEFI_HELLO is not set
+# CONFIG_CMD_BOOTEFI_SELFTEST is not set
+# CONFIG_CMD_BOOTMENU is not set
+# CONFIG_CMD_ADTIMG is not set
+CONFIG_CMD_ELF=y
+CONFIG_CMD_FDT=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RUN=y
+CONFIG_CMD_IMI=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_XIMG=y
+# CONFIG_CMD_XXD is not set
+# CONFIG_CMD_THOR_DOWNLOAD is not set
+CONFIG_CMD_ZBOOT=y
+
+#
+# Environment commands
+#
+# CONFIG_CMD_ASKENV is not set
+CONFIG_CMD_EXPORTENV=y
+CONFIG_CMD_IMPORTENV=y
+CONFIG_CMD_EDITENV=y
+# CONFIG_CMD_GREPENV is not set
+CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_ERASEENV is not set
+CONFIG_CMD_ENV_EXISTS=y
+# CONFIG_CMD_ENV_CALLBACK is not set
+# CONFIG_CMD_ENV_FLAGS is not set
+# CONFIG_CMD_NVEDIT_EFI is not set
+# CONFIG_CMD_NVEDIT_INDIRECT is not set
+# CONFIG_CMD_NVEDIT_INFO is not set
+# CONFIG_CMD_NVEDIT_LOAD is not set
+# CONFIG_CMD_NVEDIT_SELECT is not set
+
+#
+# Memory commands
+#
+# CONFIG_CMD_BINOP is not set
+# CONFIG_CMD_BLOBLIST is not set
+CONFIG_CMD_CRC32=y
+# CONFIG_CRC32_VERIFY is not set
+# CONFIG_CMD_EEPROM is not set
+# CONFIG_LOOPW is not set
+# CONFIG_CMD_MD5SUM is not set
+# CONFIG_CMD_MEMINFO is not set
+CONFIG_CMD_MEMORY=y
+# CONFIG_CMD_MEM_SEARCH is not set
+# CONFIG_CMD_MX_CYCLIC is not set
+CONFIG_CMD_RANDOM=y
+# CONFIG_CMD_MEMTEST is not set
+# CONFIG_CMD_SHA1SUM is not set
+# CONFIG_CMD_STRINGS is not set
+
+#
+# Compression commands
+#
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNLZ4 is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_ZIP is not set
+
+#
+# Device access commands
+#
+# CONFIG_CMD_ARMFLASH is not set
+# CONFIG_CMD_BCB is not set
+# CONFIG_CMD_BIND is not set
+# CONFIG_CMD_CLK is not set
+# CONFIG_CMD_DEMO is not set
+# CONFIG_CMD_DFU is not set
+CONFIG_CMD_DM=y
+# CONFIG_CMD_FPGAD is not set
+# CONFIG_CMD_FUSE is not set
+# CONFIG_CMD_GPIO is not set
+# CONFIG_CMD_GPT is not set
+# CONFIG_RANDOM_UUID is not set
+# CONFIG_CMD_IDE is not set
+CONFIG_CMD_IO=y
+# CONFIG_CMD_IOTRACE is not set
+# CONFIG_CMD_I2C is not set
+CONFIG_CMD_LOADB=y
+# CONFIG_CMD_LOADM is not set
+CONFIG_CMD_LOADS=y
+# CONFIG_LOADS_ECHO is not set
+# CONFIG_CMD_SAVES is not set
+# CONFIG_SYS_LOADS_BAUD_CHANGE is not set
+CONFIG_CMD_LOADXY_TIMEOUT=90
+# CONFIG_CMD_LSBLK is not set
+# CONFIG_CMD_MBR is not set
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_BKOPS_ENABLE is not set
+# CONFIG_CMD_MMC_SWRITE is not set
+# CONFIG_CMD_CLONE is not set
+CONFIG_CMD_NVME=y
+# CONFIG_CMD_OSD is not set
+CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
+# CONFIG_CMD_PCI_MPS is not set
+# CONFIG_CMD_POWEROFF is not set
+# CONFIG_CMD_READ is not set
+# CONFIG_CMD_SATA is not set
+CONFIG_CMD_SCSI=y
+# CONFIG_CMD_SDRAM is not set
+# CONFIG_CMD_TSI148 is not set
+# CONFIG_CMD_UNIVERSE is not set
+CONFIG_CMD_USB=y
+# CONFIG_CMD_USB_SDP is not set
+# CONFIG_CMD_WRITE is not set
+
+#
+# Shell scripting commands
+#
+# CONFIG_CMD_CAT is not set
+CONFIG_CMD_ECHO=y
+CONFIG_CMD_ITEST=y
+CONFIG_CMD_SOURCE=y
+# CONFIG_CMD_SETEXPR is not set
+
+#
+# Android support commands
+#
+CONFIG_CMD_NET=y
+CONFIG_CMD_BOOTP=y
+CONFIG_CMD_DHCP=y
+# CONFIG_BOOTP_MAY_FAIL is not set
+CONFIG_BOOTP_BOOTPATH=y
+# CONFIG_BOOTP_VENDOREX is not set
+CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_BOOTP_DNS=y
+# CONFIG_BOOTP_DNS2 is not set
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
+# CONFIG_BOOTP_PREFER_SERVERIP is not set
+CONFIG_BOOTP_SUBNETMASK=y
+# CONFIG_BOOTP_NISDOMAIN is not set
+# CONFIG_BOOTP_NTPSERVER is not set
+# CONFIG_CMD_PCAP is not set
+CONFIG_BOOTP_VCI_STRING="U-Boot"
+CONFIG_CMD_TFTPBOOT=y
+# CONFIG_CMD_TFTPPUT is not set
+# CONFIG_CMD_TFTPSRV is not set
+CONFIG_NET_TFTP_VARS=y
+# CONFIG_CMD_RARP is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_SYS_DISABLE_AUTOLOAD is not set
+# CONFIG_CMD_WGET is not set
+# CONFIG_CMD_MII is not set
+# CONFIG_CMD_MDIO is not set
+CONFIG_CMD_PING=y
+# CONFIG_CMD_CDP is not set
+# CONFIG_CMD_SNTP is not set
+# CONFIG_CMD_DNS is not set
+# CONFIG_CMD_LINK_LOCAL is not set
+# CONFIG_CMD_ETHSW is not set
+# CONFIG_CMD_PXE is not set
+# CONFIG_CMD_WOL is not set
+
+#
+# Misc commands
+#
+# CONFIG_CMD_2048 is not set
+# CONFIG_CMD_BMP is not set
+# CONFIG_CMD_BSP is not set
+CONFIG_CMD_BLOCK_CACHE=y
+# CONFIG_CMD_CACHE is not set
+# CONFIG_CMD_CONITRACE is not set
+CONFIG_CMD_CLS=y
+# CONFIG_CMD_EFIDEBUG is not set
+CONFIG_CMD_EFICONFIG=y
+# CONFIG_CMD_EXCEPTION is not set
+# CONFIG_CMD_INI is not set
+CONFIG_CMD_DATE=y
+# CONFIG_CMD_RTC is not set
+CONFIG_CMD_TIME=y
+CONFIG_CMD_GETTIME=y
+# CONFIG_CMD_PAUSE is not set
+CONFIG_CMD_SLEEP=y
+# CONFIG_CMD_TIMER is not set
+CONFIG_CMD_SOUND=y
+# CONFIG_CMD_SYSBOOT is not set
+# CONFIG_CMD_QFW is not set
+# CONFIG_CMD_PSTORE is not set
+# CONFIG_CMD_TERMINAL is not set
+# CONFIG_CMD_UUID is not set
+CONFIG_CMD_VIDCONSOLE=y
+# CONFIG_CMD_SELECT_FONT is not set
+
+#
+# TI specific command line interface
+#
+# CONFIG_CMD_DDR3 is not set
+
+#
+# Power commands
+#
+
+#
+# Security commands
+#
+# CONFIG_CMD_AES is not set
+# CONFIG_CMD_BLOB is not set
+# CONFIG_CMD_HASH is not set
+
+#
+# Firmware commands
+#
+
+#
+# Filesystem commands
+#
+# CONFIG_CMD_BTRFS is not set
+CONFIG_CMD_CBFS=y
+# CONFIG_CMD_EROFS is not set
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+# CONFIG_CMD_SQUASHFS is not set
+CONFIG_CMD_FS_GENERIC=y
+# CONFIG_CMD_FS_UUID is not set
+# CONFIG_CMD_JFFS2 is not set
+# CONFIG_CMD_REISER is not set
+# CONFIG_CMD_ZFS is not set
+
+#
+# Debug commands
+#
+CONFIG_CMD_CBSYSINFO=y
+# CONFIG_CMD_DIAG is not set
+# CONFIG_CMD_EVENT is not set
+CONFIG_CMD_IRQ=y
+# CONFIG_CMD_LOG is not set
+# CONFIG_CMD_UBI is not set
+# CONFIG_MMC_SPEED_MODE_SET is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITIONS=y
+CONFIG_MAC_PARTITION=y
+CONFIG_DOS_PARTITION=y
+CONFIG_ISO_PARTITION=y
+# CONFIG_AMIGA_PARTITION is not set
+CONFIG_EFI_PARTITION=y
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=128
+CONFIG_EFI_PARTITION_ENTRIES_OFF=0
+CONFIG_PARTITION_UUIDS=y
+# CONFIG_PARTITION_TYPE_GUID is not set
+CONFIG_SUPPORT_OF_CONTROL=y
+
+#
+# Device Tree Control
+#
+CONFIG_OF_CONTROL=y
+CONFIG_OF_REAL=y
+# CONFIG_OF_LIVE is not set
+# CONFIG_OF_SEPARATE is not set
+CONFIG_OF_EMBED=y
+# CONFIG_OF_BOARD is not set
+# CONFIG_OF_OMIT_DTB is not set
+CONFIG_DEVICE_TREE_INCLUDES=""
+CONFIG_OF_LIST="coreboot"
+# CONFIG_MULTI_DTB_FIT is not set
+CONFIG_OF_TAG_MIGRATE=y
+# CONFIG_OF_DTB_PROPS_REMOVE is not set
+
+#
+# Environment
+#
+CONFIG_ENV_SUPPORT=y
+CONFIG_SAVEENV=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_MIN_ENTRIES=64
+CONFIG_ENV_MAX_ENTRIES=512
+CONFIG_ENV_IS_DEFAULT=y
+CONFIG_ENV_IS_NOWHERE=y
+# CONFIG_ENV_IS_IN_EEPROM is not set
+# CONFIG_ENV_IS_IN_FAT is not set
+# CONFIG_ENV_IS_IN_EXT4 is not set
+# CONFIG_ENV_IS_IN_FLASH is not set
+# CONFIG_ENV_IS_IN_MMC is not set
+# CONFIG_ENV_IS_IN_NAND is not set
+# CONFIG_ENV_IS_IN_NVRAM is not set
+# CONFIG_ENV_IS_IN_ONENAND is not set
+# CONFIG_ENV_IS_IN_REMOTE is not set
+# CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_USE_DEFAULT_ENV_FILE is not set
+# CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set
+# CONFIG_ENV_IMPORT_FDT is not set
+# CONFIG_ENV_APPEND is not set
+# CONFIG_ENV_WRITEABLE_LIST is not set
+# CONFIG_ENV_ACCESS_IGNORE_FORCE is not set
+CONFIG_USE_BOOTFILE=y
+CONFIG_BOOTFILE="bzImage"
+# CONFIG_USE_ETHPRIME is not set
+CONFIG_USE_HOSTNAME=y
+CONFIG_HOSTNAME="x86"
+# CONFIG_VERSION_VARIABLE is not set
+CONFIG_NET=y
+CONFIG_ARP_TIMEOUT=5000
+CONFIG_NET_RETRY_COUNT=5
+# CONFIG_PROT_UDP is not set
+CONFIG_BOOTDEV_ETH=y
+# CONFIG_BOOTP_SEND_HOSTNAME is not set
+# CONFIG_NET_RANDOM_ETHADDR is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_IP_DEFRAG is not set
+# CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set
+CONFIG_TFTP_BLOCKSIZE=1468
+# CONFIG_TFTP_PORT is not set
+CONFIG_TFTP_WINDOWSIZE=1
+CONFIG_TFTP_TSIZE=y
+# CONFIG_SERVERIP_FROM_PROXYDHCP is not set
+CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS=100
+# CONFIG_KEEP_SERVERADDR is not set
+# CONFIG_UDP_CHECKSUM is not set
+# CONFIG_BOOTP_SERVERIP is not set
+CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64
+# CONFIG_USE_GATEWAYIP is not set
+# CONFIG_USE_IPADDR is not set
+# CONFIG_USE_NETMASK is not set
+CONFIG_USE_ROOTPATH=y
+CONFIG_ROOTPATH="/opt/nfsroot"
+# CONFIG_USE_SERVERIP is not set
+# CONFIG_PROT_TCP is not set
+# CONFIG_IPV6 is not set
+CONFIG_SYS_RX_ETH_BUFFER=4
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_DM=y
+CONFIG_DM_WARN=y
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_STATS is not set
+CONFIG_DM_DEVICE_REMOVE=y
+CONFIG_DM_EVENT=y
+CONFIG_DM_STDIO=y
+CONFIG_DM_SEQ_ALIAS=y
+# CONFIG_DM_DMA is not set
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+# CONFIG_DEVRES is not set
+CONFIG_SIMPLE_BUS=y
+# CONFIG_SIMPLE_BUS_CORRECT_RANGE is not set
+CONFIG_OF_TRANSLATE=y
+# CONFIG_TRANSLATION_OFFSET is not set
+CONFIG_DM_DEV_READ_INLINE=y
+# CONFIG_OFNODE_MULTI_TREE is not set
+# CONFIG_ACPIGEN is not set
+# CONFIG_BOUNCE_BUFFER is not set
+# CONFIG_ADC is not set
+# CONFIG_ADC_EXYNOS is not set
+# CONFIG_ADC_SANDBOX is not set
+# CONFIG_SARADC_MESON is not set
+# CONFIG_SARADC_ROCKCHIP is not set
+# CONFIG_ADC_IMX93 is not set
+# CONFIG_SATA is not set
+CONFIG_LIBATA=y
+CONFIG_SCSI_AHCI=y
+
+#
+# SATA/SCSI device support
+#
+CONFIG_AHCI_PCI=y
+# CONFIG_DWC_AHCI is not set
+# CONFIG_DWC_AHSATA is not set
+# CONFIG_MTK_AHCI is not set
+# CONFIG_SUNXI_AHCI is not set
+# CONFIG_AXI is not set
+
+#
+# Bus devices
+#
+CONFIG_BLK=y
+CONFIG_BLOCK_CACHE=y
+# CONFIG_BLKMAP is not set
+# CONFIG_EFI_MEDIA is not set
+# CONFIG_IDE is not set
+# CONFIG_LBA48 is not set
+# CONFIG_SYS_64BIT_LBA is not set
+# CONFIG_BOOTCOUNT_LIMIT is not set
+
+#
+# Button Support
+#
+# CONFIG_BUTTON is not set
+
+#
+# Cache Controller drivers
+#
+# CONFIG_CACHE is not set
+# CONFIG_V5L2_CACHE is not set
+# CONFIG_NCORE_CACHE is not set
+# CONFIG_SIFIVE_CCACHE is not set
+
+#
+# Clock
+#
+# CONFIG_CLK is not set
+# CONFIG_CLK_CCF is not set
+# CONFIG_CLK_RCAR is not set
+# CONFIG_CLK_RCAR_CPG_LIB is not set
+# CONFIG_CPU is not set
+
+#
+# Hardware crypto devices
+#
+# CONFIG_DM_HASH is not set
+# CONFIG_FSL_CAAM is not set
+# CONFIG_SYS_FSL_SEC_BE is not set
+# CONFIG_SYS_FSL_SEC_LE is not set
+# CONFIG_NPCM_AES is not set
+# CONFIG_NPCM_SHA is not set
+# CONFIG_DDR_SPD is not set
+# CONFIG_IMX_SNPS_DDR_PHY is not set
+
+#
+# Demo for driver model
+#
+# CONFIG_DM_DEMO is not set
+
+#
+# DFU support
+#
+
+#
+# DMA Support
+#
+# CONFIG_DMA is not set
+# CONFIG_DMA_LPC32XX is not set
+# CONFIG_TI_EDMA3 is not set
+# CONFIG_DMA_LEGACY is not set
+
+#
+# Extcon Support
+#
+# CONFIG_EXTCON is not set
+
+#
+# Fastboot support
+#
+# CONFIG_UDP_FUNCTION_FASTBOOT is not set
+# CONFIG_TCP_FUNCTION_FASTBOOT is not set
+# CONFIG_FIRMWARE is not set
+# CONFIG_ZYNQMP_FIRMWARE is not set
+# CONFIG_DM_FUZZING_ENGINE is not set
+
+#
+# FPGA support
+#
+# CONFIG_FPGA_ALTERA is not set
+# CONFIG_FPGA_SOCFPGA is not set
+# CONFIG_FPGA_LATTICE is not set
+# CONFIG_FPGA_XILINX is not set
+# CONFIG_DM_FPGA is not set
+# CONFIG_FWU_MDATA is not set
+CONFIG_GPIO=y
+# CONFIG_GPIO_HOG is not set
+# CONFIG_DM_GPIO_LOOKUP_LABEL is not set
+# CONFIG_ALTERA_PIO is not set
+# CONFIG_BCM2835_GPIO is not set
+# CONFIG_DWAPB_GPIO is not set
+# CONFIG_AT91_GPIO is not set
+# CONFIG_ATMEL_PIO4 is not set
+# CONFIG_ASPEED_GPIO is not set
+# CONFIG_DA8XX_GPIO is not set
+# CONFIG_HIKEY_GPIO is not set
+# CONFIG_INTEL_BROADWELL_GPIO is not set
+# CONFIG_INTEL_GPIO is not set
+# CONFIG_INTEL_ICH6_GPIO is not set
+# CONFIG_IMX_RGPIO2P is not set
+# CONFIG_IPROC_GPIO is not set
+# CONFIG_HSDK_CREG_GPIO is not set
+# CONFIG_KIRKWOOD_GPIO is not set
+# CONFIG_LPC32XX_GPIO is not set
+# CONFIG_MCP230XX_GPIO is not set
+# CONFIG_MSM_GPIO is not set
+# CONFIG_MXC_GPIO is not set
+# CONFIG_MXS_GPIO is not set
+# CONFIG_NPCM_GPIO is not set
+# CONFIG_CMD_PCA953X is not set
+# CONFIG_ROCKCHIP_GPIO is not set
+# CONFIG_XILINX_GPIO is not set
+# CONFIG_TCA642X is not set
+# CONFIG_TEGRA_GPIO is not set
+# CONFIG_TEGRA186_GPIO is not set
+# CONFIG_VYBRID_GPIO is not set
+# CONFIG_SIFIVE_GPIO is not set
+# CONFIG_ZYNQ_GPIO is not set
+# CONFIG_DM_74X164 is not set
+# CONFIG_PCA953X is not set
+# CONFIG_MPC8XXX_GPIO is not set
+# CONFIG_MPC8XX_GPIO is not set
+# CONFIG_NX_GPIO is not set
+# CONFIG_NOMADIK_GPIO is not set
+# CONFIG_ZYNQMP_GPIO_MODEPIN is not set
+# CONFIG_SLG7XL45106_I2C_GPO is not set
+# CONFIG_TURRIS_OMNIA_MCU is not set
+# CONFIG_FTGPIO010 is not set
+
+#
+# Hardware Spinlock Support
+#
+# CONFIG_DM_HWSPINLOCK is not set
+CONFIG_I2C=y
+# CONFIG_DM_I2C is not set
+# CONFIG_SYS_I2C_LEGACY is not set
+# CONFIG_SPL_SYS_I2C_LEGACY is not set
+# CONFIG_TPL_SYS_I2C_LEGACY is not set
+# CONFIG_SYS_I2C_FSL is not set
+# CONFIG_SYS_I2C_DW is not set
+# CONFIG_SYS_I2C_IMX_LPI2C is not set
+# CONFIG_SYS_I2C_MTK is not set
+# CONFIG_SYS_I2C_MICROCHIP is not set
+# CONFIG_SYS_I2C_MXC is not set
+# CONFIG_SYS_I2C_NPCM is not set
+# CONFIG_SYS_I2C_SOFT is not set
+# CONFIG_SYS_I2C_MV is not set
+# CONFIG_SYS_I2C_MVTWSI is not set
+CONFIG_INPUT=y
+CONFIG_DM_KEYBOARD=y
+# CONFIG_BUTTON_KEYBOARD is not set
+# CONFIG_CROS_EC_KEYB is not set
+CONFIG_I8042_KEYB=y
+# CONFIG_TEGRA_KEYBOARD is not set
+# CONFIG_TWL4030_INPUT is not set
+
+#
+# IOMMU device drivers
+#
+# CONFIG_IOMMU is not set
+
+#
+# LED Support
+#
+# CONFIG_LED is not set
+# CONFIG_LED_STATUS is not set
+
+#
+# Mailbox Controller Support
+#
+# CONFIG_DM_MAILBOX is not set
+
+#
+# Memory Controller drivers
+#
+# CONFIG_MEMORY is not set
+# CONFIG_ATMEL_EBI is not set
+# CONFIG_MFD_ATMEL_SMC is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MISC is not set
+# CONFIG_NVMEM is not set
+# CONFIG_SPL_NVMEM is not set
+# CONFIG_SMSC_LPC47M is not set
+# CONFIG_SMSC_SIO1007 is not set
+# CONFIG_CROS_EC is not set
+# CONFIG_DS4510 is not set
+# CONFIG_FSL_SEC_MON is not set
+CONFIG_IRQ=y
+# CONFIG_NPCM_HOST is not set
+# CONFIG_NUVOTON_NCT6102D is not set
+# CONFIG_P2SB is not set
+# CONFIG_PWRSEQ is not set
+# CONFIG_PCA9551_LED is not set
+# CONFIG_TEST_DRV is not set
+# CONFIG_USB_HUB_USB251XB is not set
+# CONFIG_TWL4030_LED is not set
+# CONFIG_WINBOND_W83627 is not set
+# CONFIG_FS_LOADER is not set
+
+#
+# MMC Host controller Support
+#
+CONFIG_MMC=y
+CONFIG_MMC_WRITE=y
+# CONFIG_MMC_BROKEN_CD is not set
+CONFIG_DM_MMC=y
+# CONFIG_ARM_PL180_MMCI is not set
+CONFIG_MMC_QUIRKS=y
+CONFIG_SYS_MMC_MAX_BLK_COUNT=65535
+CONFIG_MMC_HW_PARTITIONING=y
+# CONFIG_SUPPORT_EMMC_RPMB is not set
+# CONFIG_SUPPORT_EMMC_BOOT is not set
+# CONFIG_MMC_IO_VOLTAGE is not set
+# CONFIG_MMC_HS400_ES_SUPPORT is not set
+# CONFIG_MMC_HS400_SUPPORT is not set
+# CONFIG_MMC_HS200_SUPPORT is not set
+CONFIG_MMC_VERBOSE=y
+# CONFIG_MMC_TRACE is not set
+# CONFIG_MMC_DW is not set
+# CONFIG_MMC_MXC is not set
+CONFIG_MMC_PCI=y
+# CONFIG_MMC_OMAP_HS is not set
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+# CONFIG_MMC_SDHCI_ADMA is not set
+# CONFIG_MMC_SDHCI_BCMSTB is not set
+# CONFIG_MMC_SDHCI_CADENCE is not set
+# CONFIG_MMC_SDHCI_IPROC is not set
+# CONFIG_MMC_SDHCI_F_SDH30 is not set
+# CONFIG_MMC_SDHCI_KONA is not set
+# CONFIG_MMC_SDHCI_MSM is not set
+# CONFIG_MMC_SDHCI_NPCM is not set
+# CONFIG_MMC_SDHCI_S5P is not set
+# CONFIG_MMC_SDHCI_STI is not set
+# CONFIG_MMC_SDHCI_XENON is not set
+# CONFIG_MMC_SDHCI_TANGIER is not set
+# CONFIG_MMC_SDHCI_ZYNQ is not set
+# CONFIG_MMC_PITON is not set
+# CONFIG_STM32_SDMMC2 is not set
+# CONFIG_FTSDC010 is not set
+# CONFIG_FSL_ESDHC is not set
+# CONFIG_FSL_ESDHC_IMX is not set
+
+#
+# MTD Support
+#
+# CONFIG_MTD is not set
+# CONFIG_DM_MTD is not set
+# CONFIG_MTD_NOR_FLASH is not set
+# CONFIG_FLASH_CFI_DRIVER is not set
+# CONFIG_HBMC_AM654 is not set
+# CONFIG_SAMSUNG_ONENAND is not set
+# CONFIG_USE_SYS_MAX_FLASH_BANKS is not set
+# CONFIG_MTD_RAW_NAND is not set
+
+#
+# SPI Flash Support
+#
+# CONFIG_SPI_FLASH is not set
+
+#
+# UBI support
+#
+# CONFIG_UBI_SILENCE_MSG is not set
+# CONFIG_MTD_UBI is not set
+# CONFIG_NVMXIP is not set
+# CONFIG_NVMXIP_QSPI is not set
+
+#
+# Multiplexer drivers
+#
+# CONFIG_MULTIPLEXER is not set
+# CONFIG_BITBANGMII is not set
+# CONFIG_MV88E6352_SWITCH is not set
+CONFIG_PHYLIB=y
+# CONFIG_PHY_ADDR_ENABLE is not set
+# CONFIG_B53_SWITCH is not set
+# CONFIG_MV88E61XX_SWITCH is not set
+# CONFIG_PHYLIB_10G is not set
+# CONFIG_PHY_ADIN is not set
+# CONFIG_PHY_AQUANTIA is not set
+# CONFIG_PHY_ATHEROS is not set
+# CONFIG_SPL_PHY_ATHEROS is not set
+# CONFIG_PHY_BROADCOM is not set
+# CONFIG_PHY_CORTINA is not set
+# CONFIG_PHY_DAVICOM is not set
+# CONFIG_PHY_ET1011C is not set
+# CONFIG_PHY_LXT is not set
+# CONFIG_PHY_MARVELL is not set
+# CONFIG_PHY_MARVELL_10G is not set
+# CONFIG_PHY_MESON_GXL is not set
+# CONFIG_PHY_MICREL is not set
+# CONFIG_PHY_MOTORCOMM is not set
+# CONFIG_PHY_MSCC is not set
+# CONFIG_PHY_NATSEMI is not set
+# CONFIG_PHY_NXP_C45_TJA11XX is not set
+# CONFIG_PHY_NXP_TJA11XX is not set
+# CONFIG_PHY_REALTEK is not set
+# CONFIG_PHY_SMSC is not set
+# CONFIG_PHY_TERANETICS is not set
+# CONFIG_PHY_TI is not set
+# CONFIG_PHY_TI_DP83867 is not set
+# CONFIG_PHY_TI_DP83869 is not set
+# CONFIG_PHY_TI_GENERIC is not set
+# CONFIG_PHY_VITESSE is not set
+# CONFIG_PHY_XILINX is not set
+# CONFIG_PHY_XILINX_GMII2RGMII is not set
+# CONFIG_PHY_XWAY is not set
+# CONFIG_PHY_ETHERNET_ID is not set
+# CONFIG_PHY_FIXED is not set
+# CONFIG_PHY_NCSI is not set
+# CONFIG_FSL_MEMAC is not set
+CONFIG_PHY_RESET_DELAY=0
+# CONFIG_FSL_PFE is not set
+CONFIG_ETH=y
+CONFIG_DM_ETH=y
+# CONFIG_DM_MDIO is not set
+# CONFIG_DM_ETH_PHY is not set
+CONFIG_NETDEVICES=y
+# CONFIG_PHY_GIGE is not set
+# CONFIG_ALTERA_TSE is not set
+# CONFIG_BCM_SF2_ETH is not set
+# CONFIG_BCMGENET is not set
+# CONFIG_BNXT_ETH is not set
+# CONFIG_CALXEDA_XGMAC is not set
+# CONFIG_DRIVER_DM9000 is not set
+# CONFIG_DWC_ETH_QOS is not set
+CONFIG_E1000=y
+# CONFIG_E1000_NO_NVM is not set
+# CONFIG_E1000_SPI_GENERIC is not set
+# CONFIG_E1000_SPI is not set
+# CONFIG_CMD_E1000 is not set
+# CONFIG_EEPRO100 is not set
+CONFIG_ETH_DESIGNWARE=y
+# CONFIG_ETH_DESIGNWARE_MESON8B is not set
+# CONFIG_ETH_DESIGNWARE_SOCFPGA is not set
+# CONFIG_ETH_DESIGNWARE_S700 is not set
+# CONFIG_DW_ALTDESCRIPTOR is not set
+# CONFIG_ETHOC is not set
+# CONFIG_FTMAC100 is not set
+# CONFIG_FTGMAC100 is not set
+# CONFIG_MCFFEC is not set
+# CONFIG_FSLDMAFEC is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_LITEETH is not set
+# CONFIG_MACB is not set
+# CONFIG_NET_NPCM750 is not set
+CONFIG_PCH_GBE=y
+# CONFIG_RGMII is not set
+# CONFIG_MII is not set
+# CONFIG_RMII is not set
+# CONFIG_PCNET is not set
+# CONFIG_QE_UEC is not set
+# CONFIG_RTL8139 is not set
+CONFIG_RTL8169=y
+# CONFIG_SMC911X is not set
+# CONFIG_SUN7I_GMAC is not set
+# CONFIG_SUN4I_EMAC is not set
+# CONFIG_SUN8I_EMAC is not set
+# CONFIG_SH_ETHER is not set
+# CONFIG_DRIVER_TI_CPSW is not set
+# CONFIG_DRIVER_TI_EMAC is not set
+# CONFIG_DRIVER_TI_KEYSTONE_NET is not set
+# CONFIG_TULIP is not set
+# CONFIG_XILINX_AXIEMAC is not set
+# CONFIG_VSC7385_ENET is not set
+# CONFIG_XILINX_EMACLITE is not set
+# CONFIG_ZYNQ_GEM is not set
+# CONFIG_GMAC_ROCKCHIP is not set
+# CONFIG_TSEC_ENET is not set
+# CONFIG_MEDIATEK_ETH is not set
+# CONFIG_HIGMACV300_ETH is not set
+CONFIG_NVME=y
+# CONFIG_NVME_APPLE is not set
+CONFIG_NVME_PCI=y
+# CONFIG_DM_PCI_COMPAT is not set
+# CONFIG_PCI_PNP is not set
+# CONFIG_PCI_REGION_MULTI_ENTRY is not set
+CONFIG_PCI_CONFIG_HOST_BRIDGE=y
+# CONFIG_PCI_SRIOV is not set
+CONFIG_PCI_ENHANCED_ALLOCATION=y
+# CONFIG_PCI_ARID is not set
+# CONFIG_PCIE_ECAM_GENERIC is not set
+# CONFIG_PCIE_ECAM_SYNQUACER is not set
+# CONFIG_PCI_PHYTIUM is not set
+# CONFIG_PCIE_FSL is not set
+# CONFIG_PCI_MPC85XX is not set
+# CONFIG_PCI_XILINX is not set
+# CONFIG_PCIE_LAYERSCAPE_RC is not set
+# CONFIG_PCIE_LAYERSCAPE_EP is not set
+# CONFIG_PCIE_LAYERSCAPE_GEN4 is not set
+# CONFIG_PCIE_INTEL_FPGA is not set
+# CONFIG_PCIE_IPROC is not set
+# CONFIG_PCI_KEYSTONE is not set
+# CONFIG_PCIE_STARFIVE_JH7110 is not set
+
+#
+# PCI Endpoint
+#
+# CONFIG_PCI_ENDPOINT is not set
+CONFIG_PCH=y
+CONFIG_X86_PCH7=y
+CONFIG_X86_PCH9=y
+
+#
+# PHY Subsystem
+#
+# CONFIG_PHY is not set
+# CONFIG_MIPI_DPHY_HELPERS is not set
+
+#
+# Rockchip PHY driver
+#
+# CONFIG_MVEBU_COMPHY_SUPPORT is not set
+
+#
+# Pin controllers
+#
+# CONFIG_PINCTRL is not set
+CONFIG_POWER=y
+# CONFIG_POWER_LEGACY is not set
+# CONFIG_ACPI_PMC is not set
+
+#
+# Power Domain Support
+#
+# CONFIG_POWER_DOMAIN is not set
+# CONFIG_DM_PMIC is not set
+# CONFIG_PMIC_TPS65217 is not set
+# CONFIG_POWER_TPS65218 is not set
+# CONFIG_POWER_TPS62362 is not set
+# CONFIG_DM_REGULATOR is not set
+# CONFIG_TPS6586X_POWER is not set
+# CONFIG_POWER_MT6323 is not set
+# CONFIG_DM_PWM is not set
+# CONFIG_PWM_IMX is not set
+# CONFIG_PWM_SANDBOX is not set
+# CONFIG_U_QE is not set
+# CONFIG_RAM is not set
+
+#
+# Reboot Mode Support
+#
+# CONFIG_DM_REBOOT_MODE is not set
+
+#
+# Remote Processor drivers
+#
+
+#
+# Reset Controller Support
+#
+# CONFIG_RESET_SCMI is not set
+# CONFIG_DM_RNG is not set
+
+#
+# Real Time Clock
+#
+CONFIG_DM_RTC=y
+# CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set
+# CONFIG_RTC_PCF2127 is not set
+# CONFIG_RTC_DS1307 is not set
+# CONFIG_RTC_DS1337 is not set
+# CONFIG_RTC_DS1338 is not set
+# CONFIG_RTC_DS3231 is not set
+# CONFIG_RTC_EMULATION is not set
+# CONFIG_RTC_ISL1208 is not set
+# CONFIG_RTC_PCF8563 is not set
+# CONFIG_RTC_PT7C4338 is not set
+# CONFIG_RTC_RV3028 is not set
+# CONFIG_RTC_RV3029 is not set
+# CONFIG_RTC_RV8803 is not set
+# CONFIG_RTC_RX8010SJ is not set
+# CONFIG_RTC_RX8025 is not set
+# CONFIG_RTC_PL031 is not set
+# CONFIG_RTC_MV is not set
+# CONFIG_RTC_S35392A is not set
+CONFIG_RTC_MC146818=y
+# CONFIG_RTC_M41T62 is not set
+# CONFIG_RTC_STM32 is not set
+# CONFIG_RTC_ABX80X is not set
+# CONFIG_RTC_HT1380 is not set
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_SERIAL=y
+CONFIG_BAUDRATE=115200
+CONFIG_REQUIRE_SERIAL_CONSOLE=y
+# CONFIG_SPECIFY_CONSOLE_INDEX is not set
+CONFIG_SERIAL_PRESENT=y
+CONFIG_DM_SERIAL=y
+# CONFIG_SERIAL_RX_BUFFER is not set
+# CONFIG_SERIAL_PUTS is not set
+# CONFIG_SERIAL_SEARCH_ALL is not set
+# CONFIG_SERIAL_PROBE_ALL is not set
+# CONFIG_VPL_DM_SERIAL is not set
+# CONFIG_ALTERA_JTAG_UART is not set
+# CONFIG_ALTERA_UART is not set
+# CONFIG_ARC_SERIAL is not set
+# CONFIG_ATMEL_USART is not set
+# CONFIG_BCM6345_SERIAL is not set
+CONFIG_COREBOOT_SERIAL=y
+CONFIG_COREBOOT_SERIAL_FROM_DBG2=y
+# CONFIG_CORTINA_UART is not set
+# CONFIG_FSL_LINFLEXUART is not set
+# CONFIG_FSL_LPUART is not set
+# CONFIG_MVEBU_A3700_UART is not set
+# CONFIG_MCFUART is not set
+# CONFIG_NULLDEV_SERIAL is not set
+CONFIG_SYS_NS16550=y
+CONFIG_NS16550_DYNAMIC=y
+# CONFIG_SYS_NS16550_MEM32 is not set
+# CONFIG_SYS_NS16550_PORT_MAPPED is not set
+# CONFIG_PL01X_SERIAL is not set
+# CONFIG_ROCKCHIP_SERIAL is not set
+# CONFIG_XILINX_UARTLITE is not set
+# CONFIG_MSM_SERIAL is not set
+# CONFIG_MSM_GENI_SERIAL is not set
+# CONFIG_MXS_AUART_SERIAL is not set
+# CONFIG_OMAP_SERIAL is not set
+# CONFIG_SIFIVE_SERIAL is not set
+# CONFIG_ZYNQ_SERIAL is not set
+# CONFIG_MTK_SERIAL is not set
+# CONFIG_MT7620_SERIAL is not set
+# CONFIG_NPCM_SERIAL is not set
+# CONFIG_SMEM is not set
+
+#
+# Sound support
+#
+CONFIG_SOUND=y
+# CONFIG_I2S is not set
+# CONFIG_SOUND_DA7219 is not set
+CONFIG_SOUND_I8254=y
+# CONFIG_SOUND_INTEL_HDA is not set
+# CONFIG_SOUND_IVYBRIDGE is not set
+# CONFIG_SOUND_MAX98357A is not set
+# CONFIG_SOUND_RT5677 is not set
+
+#
+# SOC (System On Chip) specific Drivers
+#
+# CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_TI is not set
+# CONFIG_SPI is not set
+
+#
+# SPMI support
+#
+# CONFIG_SPMI is not set
+# CONFIG_SYSINFO is not set
+
+#
+# System reset device drivers
+#
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_CMD_RESET=y
+# CONFIG_POWEROFF_GPIO is not set
+# CONFIG_SYSRESET_GPIO is not set
+# CONFIG_SYSRESET_SYSCON is not set
+# CONFIG_SYSRESET_WATCHDOG is not set
+# CONFIG_SYSRESET_RESETCTL is not set
+CONFIG_SYSRESET_X86=y
+# CONFIG_SYSRESET_SPL_X86 is not set
+# CONFIG_SYSRESET_TPL_X86 is not set
+# CONFIG_SYSRESET_MPC83XX is not set
+# CONFIG_DM_THERMAL is not set
+
+#
+# Timer Support
+#
+CONFIG_TIMER=y
+# CONFIG_TIMER_EARLY is not set
+# CONFIG_ALTERA_TIMER is not set
+# CONFIG_AST_TIMER is not set
+# CONFIG_ATCPIT100_TIMER is not set
+# CONFIG_ATMEL_PIT_TIMER is not set
+# CONFIG_CADENCE_TTC_TIMER is not set
+# CONFIG_DESIGNWARE_APB_TIMER is not set
+# CONFIG_FTTMR010_TIMER is not set
+# CONFIG_GXP_TIMER is not set
+# CONFIG_MPC83XX_TIMER is not set
+# CONFIG_RENESAS_OSTM_TIMER is not set
+# CONFIG_NOMADIK_MTU_TIMER is not set
+# CONFIG_NPCM_TIMER is not set
+# CONFIG_OMAP_TIMER is not set
+# CONFIG_ORION_TIMER is not set
+# CONFIG_ROCKCHIP_TIMER is not set
+# CONFIG_SP804_TIMER is not set
+# CONFIG_STM32_TIMER is not set
+# CONFIG_TEGRA_TIMER is not set
+CONFIG_X86_TSC_TIMER=y
+CONFIG_X86_TSC_READ_BASE=y
+# CONFIG_MTK_TIMER is not set
+# CONFIG_MCHP_PIT64B_TIMER is not set
+# CONFIG_IMX_GPT_TIMER is not set
+# CONFIG_XILINX_TIMER is not set
+
+#
+# TPM support
+#
+CONFIG_USB=y
+CONFIG_DM_USB=y
+# CONFIG_DM_USB_GADGET is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_HOST=y
+CONFIG_USB_XHCI_HCD=y
+# CONFIG_USB_XHCI_DWC3 is not set
+# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
+CONFIG_USB_XHCI_PCI=y
+# CONFIG_USB_XHCI_FSL is not set
+# CONFIG_USB_XHCI_BRCM is not set
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_MSM is not set
+CONFIG_USB_EHCI_PCI=y
+# CONFIG_USB_EHCI_ZYNQ is not set
+# CONFIG_USB_EHCI_GENERIC is not set
+# CONFIG_USB_EHCI_FSL is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_DWC2 is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_ISP1760 is not set
+# CONFIG_USB_CDNS3 is not set
+# CONFIG_USB_DWC3 is not set
+
+#
+# Legacy MUSB Support
+#
+# CONFIG_USB_MUSB_HCD is not set
+# CONFIG_USB_MUSB_UDC is not set
+
+#
+# MUSB Controller Driver
+#
+# CONFIG_USB_MUSB_HOST is not set
+# CONFIG_USB_MUSB_PIO_ONLY is not set
+
+#
+# USB Phy
+#
+# CONFIG_TWL4030_USB is not set
+# CONFIG_ROCKCHIP_USB2_PHY is not set
+
+#
+# ULPI drivers
+#
+
+#
+# USB peripherals
+#
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+# CONFIG_USB_ONBOARD_HUB is not set
+CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=1000
+CONFIG_USB_KEYBOARD_FN_KEYS=y
+CONFIG_SYS_USB_EVENT_POLL=y
+# CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE is not set
+# CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is not set
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+# CONFIG_USB_ETHER_ASIX88179 is not set
+# CONFIG_USB_ETHER_LAN75XX is not set
+# CONFIG_USB_ETHER_LAN78XX is not set
+# CONFIG_USB_ETHER_MCS7830 is not set
+# CONFIG_USB_ETHER_RTL8152 is not set
+CONFIG_USB_ETHER_SMSC95XX=y
+# CONFIG_USB_GADGET is not set
+# CONFIG_SPL_USB_GADGET is not set
+
+#
+# UFS Host Controller Support
+#
+# CONFIG_UFS is not set
+# CONFIG_TI_J721E_UFS is not set
+
+#
+# Graphics support
+#
+CONFIG_VIDEO=y
+# CONFIG_VIDEO_FONT_4X6 is not set
+CONFIG_VIDEO_FONT_8X16=y
+# CONFIG_VIDEO_FONT_SUN12X22 is not set
+# CONFIG_VIDEO_FONT_16X32 is not set
+CONFIG_VIDEO_LOGO=y
+CONFIG_BACKLIGHT=y
+CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x1000000
+# CONFIG_VIDEO_COPY is not set
+# CONFIG_VIDEO_DAMAGE is not set
+# CONFIG_BACKLIGHT_GPIO is not set
+CONFIG_VIDEO_BPP8=y
+CONFIG_VIDEO_BPP16=y
+CONFIG_VIDEO_BPP32=y
+CONFIG_VIDEO_ANSI=y
+# CONFIG_VIDEO_MIPI_DSI is not set
+CONFIG_CONSOLE_NORMAL=y
+# CONFIG_CONSOLE_ROTATION is not set
+# CONFIG_CONSOLE_TRUETYPE is not set
+CONFIG_SYS_WHITE_ON_BLACK=y
+# CONFIG_NO_FB_CLEAR is not set
+CONFIG_PANEL=y
+CONFIG_SIMPLE_PANEL=y
+# CONFIG_PANEL_HX8238D is not set
+
+#
+# TrueType Fonts
+#
+# CONFIG_VIDCONSOLE_AS_LCD is not set
+# CONFIG_VIDEO_BOCHS is not set
+CONFIG_VIDEO_COREBOOT=y
+# CONFIG_VIDEO_VESA is not set
+# CONFIG_VIDEO_LCD_ANX9804 is not set
+# CONFIG_ATMEL_LCD_BGR555 is not set
+# CONFIG_VIDEO_BCM2835 is not set
+# CONFIG_VIDEO_LCD_ENDEAVORU is not set
+# CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
+# CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
+# CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
+# CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
+# CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
+# CONFIG_VIDEO_LCD_SSD2828 is not set
+# CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
+# CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
+# CONFIG_VIDEO_MESON is not set
+# CONFIG_VIDEO_MVEBU is not set
+# CONFIG_I2C_EDID is not set
+# CONFIG_DISPLAY is not set
+# CONFIG_ATMEL_HLCD is not set
+# CONFIG_BACKLIGHT_LM3533 is not set
+# CONFIG_AM335X_LCD is not set
+# CONFIG_VIDEO_EXYNOS is not set
+# CONFIG_VIDEO_BROADWELL_IGD is not set
+# CONFIG_VIDEO_IVYBRIDGE_IGD is not set
+# CONFIG_VIDEO_ROCKCHIP is not set
+# CONFIG_VIDEO_ARM_MALIDP is not set
+# CONFIG_VIDEO_STM32 is not set
+# CONFIG_VIDEO_TIDSS is not set
+# CONFIG_VIDEO_TEGRA124 is not set
+# CONFIG_VIDEO_BRIDGE is not set
+# CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825 is not set
+# CONFIG_VIDEO_TEGRA20 is not set
+# CONFIG_VIDEO_DSI_TEGRA30 is not set
+# CONFIG_TEGRA_BACKLIGHT_PWM is not set
+# CONFIG_VIDEO_MXS is not set
+# CONFIG_VIDEO_SEPS525 is not set
+CONFIG_CONSOLE_SCROLL_LINES=5
+# CONFIG_VIDEO_SIMPLE is not set
+# CONFIG_VIDEO_DT_SIMPLEFB is not set
+# CONFIG_VIDEO_MCDE_SIMPLE is not set
+# CONFIG_OSD is not set
+# CONFIG_VIDEO_REMOVE is not set
+# CONFIG_SPLASH_SCREEN is not set
+CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
+CONFIG_VIDEO_BMP_RLE8=y
+# CONFIG_BMP_16BPP is not set
+# CONFIG_BMP_24BPP is not set
+# CONFIG_BMP_32BPP is not set
+
+#
+# VirtIO Drivers
+#
+# CONFIG_VIRTIO_MMIO is not set
+# CONFIG_VIRTIO_PCI is not set
+# CONFIG_VIRTIO_PCI_LEGACY is not set
+
+#
+# 1-Wire support
+#
+# CONFIG_W1 is not set
+
+#
+# 1-wire EEPROM support
+#
+# CONFIG_W1_EEPROM is not set
+
+#
+# Watchdog Timer Support
+#
+# CONFIG_WATCHDOG is not set
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
+# CONFIG_IMX_WATCHDOG is not set
+# CONFIG_ULP_WATCHDOG is not set
+# CONFIG_WDT is not set
+# CONFIG_PHYS_TO_BUS is not set
+
+#
+# File systems
+#
+# CONFIG_FS_BTRFS is not set
+CONFIG_FS_CBFS=y
+CONFIG_FS_EXT4=y
+CONFIG_EXT4_WRITE=y
+CONFIG_FS_FAT=y
+CONFIG_FAT_WRITE=y
+CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
+# CONFIG_FS_JFFS2 is not set
+# CONFIG_UBIFS_SILENCE_MSG is not set
+# CONFIG_UBIFS_SILENCE_DEBUG_DUMP is not set
+# CONFIG_FS_CRAMFS is not set
+# CONFIG_YAFFS2 is not set
+# CONFIG_FS_SQUASHFS is not set
+# CONFIG_FS_EROFS is not set
+
+#
+# Library routines
+#
+# CONFIG_ADDR_MAP is not set
+# CONFIG_SYS_TIMER_COUNTS_DOWN is not set
+CONFIG_PHYSMEM=y
+# CONFIG_BCH is not set
+# CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set
+CONFIG_CHARSET=y
+# CONFIG_DYNAMIC_CRC_TABLE is not set
+CONFIG_HAVE_ARCH_IOMAP=y
+CONFIG_HAVE_PRIVATE_LIBGCC=y
+CONFIG_LIB_UUID=y
+CONFIG_PRINTF=y
+CONFIG_SPRINTF=y
+CONFIG_STRTO=y
+CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_SYS_HZ=1000
+# CONFIG_PANIC_HANG is not set
+CONFIG_REGEX=y
+CONFIG_LIB_RAND=y
+# CONFIG_LIB_HW_RAND is not set
+CONFIG_SUPPORT_ACPI=y
+CONFIG_ACPI=y
+# CONFIG_GENERATE_ACPI_TABLE is not set
+# CONFIG_BITREVERSE is not set
+# CONFIG_TRACE is not set
+# CONFIG_CIRCBUF is not set
+CONFIG_CMD_DHRYSTONE=y
+
+#
+# Security support
+#
+# CONFIG_AES is not set
+# CONFIG_ECDSA is not set
+CONFIG_RSA=y
+CONFIG_RSA_VERIFY=y
+# CONFIG_RSA_VERIFY_WITH_PKEY is not set
+CONFIG_RSA_SOFTWARE_EXP=y
+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
+# CONFIG_TPM is not set
+
+#
+# Android Verified Boot
+#
+
+#
+# Hashing Support
+#
+# CONFIG_BLAKE2 is not set
+CONFIG_SHA1=y
+CONFIG_SHA256=y
+# CONFIG_SHA512 is not set
+# CONFIG_SHA384 is not set
+# CONFIG_SHA_HW_ACCEL is not set
+CONFIG_MD5=y
+CONFIG_CRC8=y
+CONFIG_CRC32=y
+
+#
+# Compression Support
+#
+# CONFIG_LZ4 is not set
+# CONFIG_LZMA is not set
+# CONFIG_LZO is not set
+# CONFIG_GZIP is not set
+# CONFIG_ZLIB_UNCOMPRESS is not set
+# CONFIG_BZIP2 is not set
+CONFIG_ZLIB=y
+# CONFIG_ZSTD is not set
+# CONFIG_VPL_LZMA is not set
+# CONFIG_SPL_GZIP is not set
+# CONFIG_ERRNO_STR is not set
+# CONFIG_HEXDUMP is not set
+# CONFIG_GETOPT is not set
+CONFIG_OF_LIBFDT=y
+CONFIG_OF_LIBFDT_ASSUME_MASK=0
+CONFIG_SYS_FDT_PAD=0x3000
+CONFIG_SMBIOS_PARSER=y
+# CONFIG_EFI is not set
+CONFIG_EFI_LOADER=y
+CONFIG_CMD_BOOTEFI_BOOTMGR=y
+CONFIG_EFI_VARIABLE_FILE_STORE=y
+# CONFIG_EFI_VARIABLE_NO_STORE is not set
+# CONFIG_EFI_VARIABLES_PRESEED is not set
+CONFIG_EFI_VAR_BUF_SIZE=65536
+CONFIG_EFI_GET_TIME=y
+# CONFIG_EFI_SET_TIME is not set
+# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
+# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
+# CONFIG_EFI_CAPSULE_ON_DISK is not set
+CONFIG_EFI_CAPSULE_MAX=15
+CONFIG_EFI_DEVICE_PATH_TO_TEXT=y
+CONFIG_EFI_DEVICE_PATH_UTIL=y
+CONFIG_EFI_DT_FIXUP=y
+CONFIG_EFI_LOADER_HII=y
+CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y
+CONFIG_EFI_UNICODE_CAPITALIZATION=y
+CONFIG_EFI_PLATFORM_LANG_CODES="en-US"
+CONFIG_EFI_HAVE_RUNTIME_RESET=y
+CONFIG_EFI_LOAD_FILE2_INITRD=y
+# CONFIG_EFI_SECURE_BOOT is not set
+CONFIG_EFI_ECPT=y
+CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
+# CONFIG_OPTEE_LIB is not set
+# CONFIG_OPTEE_IMAGE is not set
+# CONFIG_BOOTM_OPTEE is not set
+# CONFIG_TEST_FDTDEC is not set
+CONFIG_LIB_DATE=y
+CONFIG_LIB_ELF=y
+CONFIG_LMB=y
+CONFIG_LMB_USE_MAX_REGIONS=y
+CONFIG_LMB_MAX_REGIONS=16
+# CONFIG_PHANDLE_CHECK_SEQ is not set
+
+#
+# FWU Multi Bank Updates
+#
+# CONFIG_POST is not set
+
+#
+# Unit tests
+#
+# CONFIG_UNIT_TEST is not set
+
+#
+# Tools options
+#
+CONFIG_MKIMAGE_DTC_PATH="dtc"
+CONFIG_TOOLS_CRC32=y
+CONFIG_TOOLS_LIBCRYPTO=y
+CONFIG_TOOLS_FIT=y
+CONFIG_TOOLS_FIT_FULL_CHECK=y
+CONFIG_TOOLS_FIT_PRINT=y
+CONFIG_TOOLS_FIT_RSASSA_PSS=y
+CONFIG_TOOLS_FIT_SIGNATURE=y
+CONFIG_TOOLS_FIT_SIGNATURE_MAX_SIZE=0x10000000
+CONFIG_TOOLS_FIT_VERBOSE=y
+CONFIG_TOOLS_MD5=y
+CONFIG_TOOLS_OF_LIBFDT=y
+CONFIG_TOOLS_SHA1=y
+CONFIG_TOOLS_SHA256=y
+CONFIG_TOOLS_SHA384=y
+CONFIG_TOOLS_SHA512=y
+# CONFIG_TOOLS_MKEFICAPSULE is not set
+# CONFIG_FSPI_CONF_HEADER is not set
+# CONFIG_TOOLS_MKFWUMDATA is not set
diff --git a/config/u-boot/qemu_x86_12mb/target.cfg b/config/u-boot/qemu_x86_12mb/target.cfg
new file mode 100644
index 00000000..24b7cb0c
--- /dev/null
+++ b/config/u-boot/qemu_x86_12mb/target.cfg
@@ -0,0 +1,2 @@
+tree="default"
+arch="x86_64"

From 85bc915684cbeb562d8c6fbf81f9e35064ac04f1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 24 Oct 2023 00:14:01 +0100
Subject: [PATCH 0006/1549] build/roms: copy base rom again for u-boot

when building only for u-boot, the current script
works just fine. however, when building for other
payloads in additional to u-boot, the final u-boot
stage fails because other payloads are already
inserted via cbfs.

when we build u-boot, we do that last because we want
u-boot setups to only be u-boot, nothing else.

this patch enables qemu x86 to build properly with
u-boot.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 1 +
 1 file changed, 1 insertion(+)

diff --git a/script/build/roms b/script/build/roms
index e8cd1c7f..37ee0aab 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -232,6 +232,7 @@ build_roms()
 	[ "${payload_grub}" != "y" ] || \
 		x_ build_grub_roms "${cbrom}" "grub"
 	[ "${payload_uboot}" = "y" ] || return 0
+	x_ cp "${_cbrom}" "${cbrom}"
 	build_uboot_roms
 }
 

From df031d422a1c0b76edbea1cdee98796ad3d1392f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 25 Oct 2023 10:38:46 +0100
Subject: [PATCH 0007/1549] use mirrorservice.org for acpica downloads

princeton was down today. kent is probably more reliable.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../patches/0024-don-t-use-github-for-the-acpica-download.patch | 2 +-
 .../0010-coreboot-fam15h-use-new-upstream-for-acpica.patch      | 2 +-
 .../0010-coreboot-fam15h-use-new-upstream-for-acpica.patch      | 2 +-
 .../patches/0027-coreboot-haswell-fix-acpica-downloads.patch    | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/config/coreboot/default/patches/0024-don-t-use-github-for-the-acpica-download.patch b/config/coreboot/default/patches/0024-don-t-use-github-for-the-acpica-download.patch
index 5093f011..2c4c9e5f 100644
--- a/config/coreboot/default/patches/0024-don-t-use-github-for-the-acpica-download.patch
+++ b/config/coreboot/default/patches/0024-don-t-use-github-for-the-acpica-download.patch
@@ -30,7 +30,7 @@ index ebc9fcb49a..a857110b4b 100755
  GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
  BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
 -IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
-+IASL_BASE_URL="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica"
++IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
  # CLANG toolchain archive locations
  LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
  CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
diff --git a/config/coreboot/fam15h_rdimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch b/config/coreboot/fam15h_rdimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
index 6b7e6de0..2f95297d 100644
--- a/config/coreboot/fam15h_rdimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
+++ b/config/coreboot/fam15h_rdimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
@@ -29,7 +29,7 @@ index b75b90a877..e3efa722f1 100755
  BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
  GDB_ARCHIVE="https://ftpmirror.gnu.org/gdb/gdb-${GDB_VERSION}.tar.xz"
 -IASL_ARCHIVE="https://acpica.org/sites/acpica/files/acpica-unix2-${IASL_VERSION}.tar.gz"
-+IASL_ARCHIVE="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
++IASL_ARCHIVE="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
  PYTHON_ARCHIVE="https://www.python.org/ftp/python/${PYTHON_VERSION}/Python-${PYTHON_VERSION}.tar.xz"
  EXPAT_ARCHIVE="https://downloads.sourceforge.net/sourceforge/expat/expat-${EXPAT_VERSION}.tar.bz2"
  # CLANG toolchain archive locations
diff --git a/config/coreboot/fam15h_udimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch b/config/coreboot/fam15h_udimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
index 6b7e6de0..2f95297d 100644
--- a/config/coreboot/fam15h_udimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
+++ b/config/coreboot/fam15h_udimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
@@ -29,7 +29,7 @@ index b75b90a877..e3efa722f1 100755
  BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
  GDB_ARCHIVE="https://ftpmirror.gnu.org/gdb/gdb-${GDB_VERSION}.tar.xz"
 -IASL_ARCHIVE="https://acpica.org/sites/acpica/files/acpica-unix2-${IASL_VERSION}.tar.gz"
-+IASL_ARCHIVE="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
++IASL_ARCHIVE="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
  PYTHON_ARCHIVE="https://www.python.org/ftp/python/${PYTHON_VERSION}/Python-${PYTHON_VERSION}.tar.xz"
  EXPAT_ARCHIVE="https://downloads.sourceforge.net/sourceforge/expat/expat-${EXPAT_VERSION}.tar.bz2"
  # CLANG toolchain archive locations
diff --git a/config/coreboot/haswell/patches/0027-coreboot-haswell-fix-acpica-downloads.patch b/config/coreboot/haswell/patches/0027-coreboot-haswell-fix-acpica-downloads.patch
index 292d60e9..9f22c06d 100644
--- a/config/coreboot/haswell/patches/0027-coreboot-haswell-fix-acpica-downloads.patch
+++ b/config/coreboot/haswell/patches/0027-coreboot-haswell-fix-acpica-downloads.patch
@@ -21,7 +21,7 @@ index 3c4b10cc92..0c4262b7b1 100755
  GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
  BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
 -IASL_ARCHIVE="https://acpica.org/sites/acpica/files/acpica-unix2-${IASL_VERSION}.tar.gz"
-+IASL_ARCHIVE="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
++IASL_ARCHIVE="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
  # CLANG toolchain archive locations
  LLVM_ARCHIVE="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}/llvm-${CLANG_VERSION}.src.tar.xz"
  CLANG_ARCHIVE="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}/clang-${CLANG_VERSION}.src.tar.xz"

From 5f6ba01d414e2d98d7db049347b8c5c5d125ba61 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 25 Oct 2023 11:40:02 +0100
Subject: [PATCH 0008/1549] include/option.sh: fix i945 bootblock copy

it wasn't being copied right

the roms under elf/ were being copied, but not the ones
under bin/ - i need to audit it further

for now, i run modify_coreboot_roms from build/roms
instead of update/trees

so, the ones under elf/ no longer have bootblocks copied.
it's only done in bin/

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/option.sh   | 28 ----------------------------
 script/build/roms   | 28 ++++++++++++++++++++++++++++
 script/update/trees |  1 -
 3 files changed, 28 insertions(+), 29 deletions(-)

diff --git a/include/option.sh b/include/option.sh
index aa8b844c..ed094b5c 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -70,31 +70,3 @@ handle_coreboot_utils()
 		[ -z "${mode}" ] || x_ rm -Rf "cbutils/${1}"
 	done
 }
-
-modify_coreboot_rom()
-{
-	rompath="${codedir}/build/coreboot.rom"
-	[ -f "${rompath}" ] || \
-	    err "modify_coreboot_rom: does not exist: ${rompath}"
-	tmprom="$(mktemp -t rom.XXXXXXXXXX)"
-	x_ rm -f "${tmprom}"
-
-	if [ "${romtype}" = "d8d16sas" ]; then
-		# pike2008 roms hang seabios. an empty rom will override
-		# the built-in one, thus disabling all execution of it
-		x_ touch "${tmprom}"
-		for deviceID in "0072" "3050"; do
-			x_ "${cbfstool}" "${rompath}" add -f "${tmprom}" \
-			    -n "pci1000,${deviceID}.rom" -t raw
-		done
-	elif [ "${romtype}" = "i945 laptop" ]; then
-		# for bucts-based installation method from factory bios
-		dd if="${rompath}" of="${tmprom}" bs=1 \
-		    skip=$(($(stat -c %s "${rompath}") - 0x10000)) \
-		    count=64k || err "modrom 1, dd, ${rompath}"
-		dd if="${tmprom}" of="${rompath}" bs=1 \
-		    seek=$(($(stat -c %s "${rompath}") - 0x20000)) \
-		    count=64k conv=notrunc || err "modrom 2, dd, ${rompath}"
-	fi
-	x_ rm -f "${tmprom}"
-}
diff --git a/script/build/roms b/script/build/roms
index 37ee0aab..f19f7328 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -388,9 +388,37 @@ moverom() {
 
 	[ -d "${newrom%/*}" ] || x_ mkdir -p "${newrom%/*}/"
 	[ "${vendorfiles}" = "n" ] && newrom="${newrom%.rom}_noblobs.rom"
+
+	x_ modify_coreboot_rom
 	x_ cp "${rompath}" "${newrom}"
 }
 
+modify_coreboot_rom()
+{
+	tmpmvrom="$(mktemp -t rom.XXXXXXXXXX)"
+	x_ rm -f "${tmpmvrom}"
+
+	if [ "${romtype}" = "d8d16sas" ]; then
+		# pike2008 roms hang seabios. an empty rom will override
+		# the built-in one, thus disabling all execution of it
+		x_ touch "${tmpmvrom}"
+		for deviceID in "0072" "3050"; do
+			x_ "${cbfstool}" "${rompath}" add -f "${tmpmvrom}" \
+			    -n "pci1000,${deviceID}.rom" -t raw
+		done
+	elif [ "${romtype}" = "i945 laptop" ]; then
+		# for bucts-based installation method from factory bios
+               dd if="${rompath}" of="${tmpmvrom}" bs=1 \
+                   skip=$(($(stat -c %s "${rompath}") - 0x10000)) \
+                   count=64k || err "modrom 1, copy bootblock"
+               dd if="${tmpmvrom}" of="${rompath}" bs=1 \
+                   seek=$(($(stat -c %s "${rompath}") - 0x20000)) count=64k \
+                   conv=notrunc || err "modrom 2, insert new bootblock"
+               x_ rm -f "${tmpmvrom}"
+	fi
+	x_ rm -f "${tmpmvrom}"
+}
+
 usage()
 {
 	cat <<- EOF
diff --git a/script/update/trees b/script/update/trees
index 64958522..a930bed1 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -263,7 +263,6 @@ run_make_command()
 
 copy_elf()
 {
-	[ "${project}" != "coreboot" ] || x_ modify_coreboot_rom
 	while read f; do
 		[ ! -f "${codedir}/$f" ] || \
 			x_ cp "${codedir}/${f}" "${dest_dir}/"

From 83bf23766040d5e1642b8c80d975953c1c34f876 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 28 Oct 2023 21:19:48 +0100
Subject: [PATCH 0009/1549] coreboot/fam15h: don't set microcode_required

the logic for naming coreboot roms is based on whether
cpu_microcode_blob.bin would exist in cbfs, and whether
deletion was therefore successful.

lbmk was naming nomicrocode on fam15h roms on this basis,
but the microcode was being inserted as microcode_amd.bin
and microcode_amd_fam15h.bin

in the recent 20231021 release, the roms were exclusively
labeled _nomicrocode in the rom names, but they do in fact
contain microcode.

i'm fixing it by telling lbmk *not* to delete microcode.
if microcode_required is not set, or it's set to y, then
only roms *with* microcode updates are provided; even if
the rom doesn't actually contain it, lbmk will only label
it _nomicrocode if that setting is set to n.

i'm not bothering to add further complexity to the rom
handling logic, because canoeboot now exists anyway (at
website https://canoeboot.org/) which is my new version
re-implementing the older, inferior version of libreboot

so i'm going to:
1) document this as errata in the release
2) cross reference in the freedom status page
3) if someone still isn't happy, i'll say use canoeboot

job done.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/kcma-d8-rdimm_16mb/target.cfg  | 1 -
 config/coreboot/kcma-d8-rdimm_2mb/target.cfg   | 1 -
 config/coreboot/kcma-d8-udimm_16mb/target.cfg  | 1 -
 config/coreboot/kcma-d8-udimm_2mb/target.cfg   | 1 -
 config/coreboot/kfsn4-dre_1mb/target.cfg       | 1 -
 config/coreboot/kfsn4-dre_2mb/target.cfg       | 1 -
 config/coreboot/kgpe-d16-rdimm_16mb/target.cfg | 1 -
 config/coreboot/kgpe-d16-rdimm_2mb/target.cfg  | 1 -
 config/coreboot/kgpe-d16-udimm_16mb/target.cfg | 1 -
 config/coreboot/kgpe-d16-udimm_2mb/target.cfg  | 1 -
 10 files changed, 10 deletions(-)

diff --git a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
index 2c3c1ce1..dd6fac7c 100644
--- a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
@@ -6,5 +6,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 crossgcc_ada="n"
-microcode_required="n"
 vendorfiles="n"
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
index 2c3c1ce1..dd6fac7c 100644
--- a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
@@ -6,5 +6,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 crossgcc_ada="n"
-microcode_required="n"
 vendorfiles="n"
diff --git a/config/coreboot/kcma-d8-udimm_16mb/target.cfg b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
index 2102dc36..6e4887a4 100644
--- a/config/coreboot/kcma-d8-udimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
@@ -6,5 +6,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 crossgcc_ada="n"
-microcode_required="n"
 vendorfiles="n"
diff --git a/config/coreboot/kcma-d8-udimm_2mb/target.cfg b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
index 2102dc36..6e4887a4 100644
--- a/config/coreboot/kcma-d8-udimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
@@ -6,5 +6,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 crossgcc_ada="n"
-microcode_required="n"
 vendorfiles="n"
diff --git a/config/coreboot/kfsn4-dre_1mb/target.cfg b/config/coreboot/kfsn4-dre_1mb/target.cfg
index d00c45d5..5530255d 100644
--- a/config/coreboot/kfsn4-dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4-dre_1mb/target.cfg
@@ -4,6 +4,5 @@ arch="x86_64"
 payload_seabios="y"
 payload_memtest="y"
 crossgcc_ada="n"
-microcode_required="n"
 vendorfiles="n"
 grub_timeout=10
diff --git a/config/coreboot/kfsn4-dre_2mb/target.cfg b/config/coreboot/kfsn4-dre_2mb/target.cfg
index 5b912388..95ec4944 100644
--- a/config/coreboot/kfsn4-dre_2mb/target.cfg
+++ b/config/coreboot/kfsn4-dre_2mb/target.cfg
@@ -5,6 +5,5 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 crossgcc_ada="n"
-microcode_required="n"
 vendorfiles="n"
 grub_timeout=10
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
index 11a1b4e6..3263842d 100644
--- a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
@@ -5,6 +5,5 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 crossgcc_ada="n"
-microcode_required="n"
 vendorfiles="n"
 grub_timeout=10
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
index 11a1b4e6..3263842d 100644
--- a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
@@ -5,6 +5,5 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 crossgcc_ada="n"
-microcode_required="n"
 vendorfiles="n"
 grub_timeout=10
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
index d370e627..a833cda9 100644
--- a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
@@ -5,6 +5,5 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 crossgcc_ada="n"
-microcode_required="n"
 vendorfiles="n"
 grub_timeout=10
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
index d370e627..a833cda9 100644
--- a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
@@ -5,6 +5,5 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 crossgcc_ada="n"
-microcode_required="n"
 vendorfiles="n"
 grub_timeout=10

From 93458de74a2e403bdd7e7a25d6fdead41d8fa718 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 29 Oct 2023 01:26:54 +0000
Subject: [PATCH 0010/1549] revert coreboot heap size patch

the patch:
https://review.coreboot.org/c/coreboot/+/78270

this has been reverted, because it caused s3 resume
issues on most intel laptops in libreboot.

i was going to merge this instead:
https://review.coreboot.org/c/coreboot/+/78623

however, it's under review, and this doesn't change
to the old behaviour; it keeps the new universal
config, but changes the default

we know the old logic works, so keep that for now.
in fact, the offending patch was only merged to
main in coreboot, one day before i recently
updated coreboot revs in coreboot/default - i used
a 12 october revision, the patch above is 11 october

i then ran "./update trees -u coreboot" which updated
the heap sizes back to the old defaults. this should
fix s3 suspend/resume where it was broken, in the
libreboot 20231021 release - a point release with this
and a few other fixes is planned soon.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../coreboot/d510mo/config/libgfxinit_txtmode |   2 +-
 .../d510mo_16mb/config/libgfxinit_txtmode     |   2 +-
 ...ring-HEAP_SIZE-to-a-common-large-val.patch | 341 ++++++++++++++++++
 .../e6400_4mb/config/libgfxinit_corebootfb    |   2 +-
 .../e6400_4mb/config/libgfxinit_txtmode       |   2 +-
 .../e6430_12mb/config/libgfxinit_corebootfb   |   2 +-
 .../e6430_12mb/config/libgfxinit_txtmode      |   2 +-
 .../g43t-am3/config/libgfxinit_txtmode        |   2 +-
 .../g43t-am3_16mb/config/libgfxinit_txtmode   |   2 +-
 .../ga-g41m-es2l/config/libgfxinit_txtmode    |   2 +-
 .../gru_bob/config/libgfxinit_corebootfb      |   2 +-
 .../gru_kevin/config/libgfxinit_corebootfb    |   2 +-
 .../hp2170p_16mb/config/libgfxinit_corebootfb |   2 +-
 .../hp2170p_16mb/config/libgfxinit_txtmode    |   2 +-
 .../hp2560p_8mb/config/libgfxinit_corebootfb  |   2 +-
 .../hp2560p_8mb/config/libgfxinit_txtmode     |   2 +-
 .../hp2570p_16mb/config/libgfxinit_corebootfb |   2 +-
 .../hp2570p_16mb/config/libgfxinit_txtmode    |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../hp8200sff_4mb/config/libgfxinit_txtmode   |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../hp8200sff_8mb/config/libgfxinit_txtmode   |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../hp8300usdt_16mb/config/libgfxinit_txtmode |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../config/libgfxinit_txtmode                 |   2 +-
 .../hp9470m_16mb/config/libgfxinit_corebootfb |   2 +-
 .../hp9470m_16mb/config/libgfxinit_txtmode    |   2 +-
 .../macbook11/config/libgfxinit_corebootfb    |   2 +-
 .../macbook11/config/libgfxinit_txtmode       |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../macbook11_16mb/config/libgfxinit_txtmode  |   2 +-
 .../macbook21/config/libgfxinit_corebootfb    |   2 +-
 .../macbook21/config/libgfxinit_txtmode       |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../macbook21_16mb/config/libgfxinit_txtmode  |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../qemu_x86_12mb/config/libgfxinit_txtmode   |   2 +-
 .../r400_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../r400_16mb/config/libgfxinit_txtmode       |   2 +-
 .../r400_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../r400_4mb/config/libgfxinit_txtmode        |   2 +-
 .../r400_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../r400_8mb/config/libgfxinit_txtmode        |   2 +-
 .../r500_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../r500_4mb/config/libgfxinit_txtmode        |   2 +-
 .../t1650_12mb/config/libgfxinit_txtmode      |   2 +-
 .../t400_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../t400_16mb/config/libgfxinit_txtmode       |   2 +-
 .../t400_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../t400_4mb/config/libgfxinit_txtmode        |   2 +-
 .../t400_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../t400_8mb/config/libgfxinit_txtmode        |   2 +-
 .../t420_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../t420s_8mb/config/libgfxinit_corebootfb    |   2 +-
 .../t420s_8mb/config/libgfxinit_txtmode       |   2 +-
 .../t430_12mb/config/libgfxinit_corebootfb    |   2 +-
 .../t430_12mb/config/libgfxinit_txtmode       |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../t440pmrc_12mb/config/libgfxinit_txtmode   |   2 +-
 .../t500_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../t500_16mb/config/libgfxinit_txtmode       |   2 +-
 .../t500_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../t500_4mb/config/libgfxinit_txtmode        |   2 +-
 .../t500_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../t500_8mb/config/libgfxinit_txtmode        |   2 +-
 .../t520_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../t520_8mb/config/libgfxinit_txtmode        |   2 +-
 .../t530_12mb/config/libgfxinit_corebootfb    |   2 +-
 .../t530_12mb/config/libgfxinit_txtmode       |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../config/libgfxinit_txtmode                 |   2 +-
 .../t60_intelgpu/config/libgfxinit_corebootfb |   2 +-
 .../t60_intelgpu/config/libgfxinit_txtmode    |   2 +-
 .../w500_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../w500_16mb/config/libgfxinit_txtmode       |   2 +-
 .../w500_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../w500_4mb/config/libgfxinit_txtmode        |   2 +-
 .../w500_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../w500_8mb/config/libgfxinit_txtmode        |   2 +-
 .../w530_12mb/config/libgfxinit_corebootfb    |   2 +-
 .../w530_12mb/config/libgfxinit_txtmode       |   2 +-
 .../w541mrc_12mb/config/libgfxinit_corebootfb |   2 +-
 .../w541mrc_12mb/config/libgfxinit_txtmode    |   2 +-
 .../x200_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../x200_16mb/config/libgfxinit_txtmode       |   2 +-
 .../x200_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../x200_4mb/config/libgfxinit_txtmode        |   2 +-
 .../x200_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../x200_8mb/config/libgfxinit_txtmode        |   2 +-
 .../x220_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../x220_8mb/config/libgfxinit_txtmode        |   2 +-
 .../x230_12mb/config/libgfxinit_corebootfb    |   2 +-
 .../x230_12mb/config/libgfxinit_txtmode       |   2 +-
 .../x230_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../x230_16mb/config/libgfxinit_txtmode       |   2 +-
 .../x230edp_12mb/config/libgfxinit_corebootfb |   2 +-
 .../x230edp_12mb/config/libgfxinit_txtmode    |   2 +-
 .../x230t_12mb/config/libgfxinit_corebootfb   |   2 +-
 .../x230t_12mb/config/libgfxinit_txtmode      |   2 +-
 .../x230t_16mb/config/libgfxinit_corebootfb   |   2 +-
 .../x230t_16mb/config/libgfxinit_txtmode      |   2 +-
 .../x301_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../x301_16mb/config/libgfxinit_txtmode       |   2 +-
 .../x301_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../x301_4mb/config/libgfxinit_txtmode        |   2 +-
 .../x301_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../x301_8mb/config/libgfxinit_txtmode        |   2 +-
 .../coreboot/x60/config/libgfxinit_corebootfb |   2 +-
 config/coreboot/x60/config/libgfxinit_txtmode |   2 +-
 .../x60_16mb/config/libgfxinit_corebootfb     |   2 +-
 .../x60_16mb/config/libgfxinit_txtmode        |   2 +-
 113 files changed, 453 insertions(+), 112 deletions(-)
 create mode 100644 config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch

diff --git a/config/coreboot/d510mo/config/libgfxinit_txtmode b/config/coreboot/d510mo/config/libgfxinit_txtmode
index 6b75d929..906045d8 100644
--- a/config/coreboot/d510mo/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -499,7 +500,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
index 227d426a..0de13433 100644
--- a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -499,7 +500,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch b/config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
new file mode 100644
index 00000000..cca8901f
--- /dev/null
+++ b/config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
@@ -0,0 +1,341 @@
+From f1b5b0051718139cf59ad047d42d1360b8452ec5 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 29 Oct 2023 01:18:50 +0000
+Subject: [PATCH 1/1] Revert "Kconfig: Bring HEAP_SIZE to a common, large
+ value"
+
+This reverts commit 44a48ce7a46c36df69f7b2cf3552bf10fa5f61b6.
+
+NOTE:
+
+this is done instead of merging:
+https://review.coreboot.org/c/coreboot/+/78623
+
+which is still under review for now
+
+the patch i'm reverting is this one:
+https://review.coreboot.org/c/coreboot/+/78270
+
+this was actually only merged the day before i
+updated coreboot revs in lbmk to the 12 october rev,
+so there's no harm in quickly reverting this for now
+
+however, later on, we will rely on the other patch
+---
+ src/Kconfig                                   | 3 ++-
+ src/cpu/qemu-x86/Kconfig                      | 3 +++
+ src/mainboard/sifive/hifive-unleashed/Kconfig | 3 +++
+ src/northbridge/amd/pi/Kconfig                | 4 ++++
+ src/soc/amd/picasso/Kconfig                   | 4 ++++
+ src/soc/amd/stoneyridge/Kconfig               | 4 ++++
+ src/soc/cavium/cn81xx/Kconfig                 | 3 +++
+ src/soc/intel/alderlake/Kconfig               | 5 +++++
+ src/soc/intel/apollolake/Kconfig              | 4 ++++
+ src/soc/intel/cannonlake/Kconfig              | 4 ++++
+ src/soc/intel/elkhartlake/Kconfig             | 4 ++++
+ src/soc/intel/jasperlake/Kconfig              | 4 ++++
+ src/soc/intel/meteorlake/Kconfig              | 5 +++++
+ src/soc/intel/skylake/Kconfig                 | 4 ++++
+ src/soc/intel/tigerlake/Kconfig               | 4 ++++
+ src/soc/intel/xeon_sp/Kconfig                 | 4 ++++
+ src/soc/intel/xeon_sp/cpx/Kconfig             | 4 ++++
+ src/soc/intel/xeon_sp/skx/Kconfig             | 4 ++++
+ src/soc/intel/xeon_sp/spr/Kconfig             | 4 ++++
+ src/soc/qualcomm/ipq40xx/Kconfig              | 4 ++++
+ 20 files changed, 77 insertions(+), 1 deletion(-)
+
+diff --git a/src/Kconfig b/src/Kconfig
+index ae8024089e..1549719dd0 100644
+--- a/src/Kconfig
++++ b/src/Kconfig
+@@ -751,7 +751,8 @@ config RTC
+ 
+ config HEAP_SIZE
+ 	hex
+-	default 0x100000
++	default 0x100000 if FLATTENED_DEVICE_TREE
++	default 0x4000
+ 
+ config STACK_SIZE
+ 	hex
+diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
+index 0fa999e1ac..f3e2c4cea9 100644
+--- a/src/cpu/qemu-x86/Kconfig
++++ b/src/cpu/qemu-x86/Kconfig
+@@ -35,4 +35,7 @@ config MAX_CPUS
+ 	default 32 if SMM_TSEG
+ 	default 4
+ 
++config HEAP_SIZE
++	default 0x8000
++
+ endif
+diff --git a/src/mainboard/sifive/hifive-unleashed/Kconfig b/src/mainboard/sifive/hifive-unleashed/Kconfig
+index 7bc3b0bcbb..7f9300f2a7 100644
+--- a/src/mainboard/sifive/hifive-unleashed/Kconfig
++++ b/src/mainboard/sifive/hifive-unleashed/Kconfig
+@@ -10,6 +10,9 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select FLATTENED_DEVICE_TREE
+ 	select SPI_SDCARD
+ 
++config HEAP_SIZE
++	default 0x10000
++
+ config MAINBOARD_DIR
+ 	default "sifive/hifive-unleashed"
+ 
+diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
+index 4ffe82a15f..4518db149b 100644
+--- a/src/northbridge/amd/pi/Kconfig
++++ b/src/northbridge/amd/pi/Kconfig
+@@ -29,4 +29,8 @@ config HW_MEM_HOLE_SIZEK
+ 	hex
+ 	default 0x200000
+ 
++config HEAP_SIZE
++	hex
++	default 0xc0000
++
+ endif # NORTHBRIDGE_AMD_PI
+diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
+index c33f287067..796fe4eb13 100644
+--- a/src/soc/amd/picasso/Kconfig
++++ b/src/soc/amd/picasso/Kconfig
+@@ -264,6 +264,10 @@ config S3_VGA_ROM_RUN
+ 	bool
+ 	default n
+ 
++config HEAP_SIZE
++	hex
++	default 0xc0000
++
+ config SERIRQ_CONTINUOUS_MODE
+ 	bool
+ 	default n
+diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
+index 6ff135e6a8..9af7455bae 100644
+--- a/src/soc/amd/stoneyridge/Kconfig
++++ b/src/soc/amd/stoneyridge/Kconfig
+@@ -152,6 +152,10 @@ config S3_VGA_ROM_RUN
+ 	bool
+ 	default n
+ 
++config HEAP_SIZE
++	hex
++	default 0xc0000
++
+ config EHCI_BAR
+ 	hex
+ 	default 0xfef00000
+diff --git a/src/soc/cavium/cn81xx/Kconfig b/src/soc/cavium/cn81xx/Kconfig
+index 77ca97202b..368581f8f1 100644
+--- a/src/soc/cavium/cn81xx/Kconfig
++++ b/src/soc/cavium/cn81xx/Kconfig
+@@ -30,6 +30,9 @@ config ARCH_ARMV8_EXTENSION
+ 	int
+ 	default 1
+ 
++config HEAP_SIZE
++	default 0x10000
++
+ config STACK_SIZE
+ 	default 0x2000
+ 
+diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
+index 4b960c1d22..82ec8f263e 100644
+--- a/src/soc/intel/alderlake/Kconfig
++++ b/src/soc/intel/alderlake/Kconfig
+@@ -215,6 +215,11 @@ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000 if BMP_LOGO
++	default 0x10000
++
+ config GFX_GMA_DEFAULT_MMIO
+ 	default 0xaf000000 if MAINBOARD_HAS_EARLY_LIBGFXINIT
+ 
+diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
+index 78ec2987ce..bce935d800 100644
+--- a/src/soc/intel/apollolake/Kconfig
++++ b/src/soc/intel/apollolake/Kconfig
+@@ -252,6 +252,10 @@ config IFWI_FILE_NAME
+ 	help
+ 	  Name of file to store in the IFWI region.
+ 
++config HEAP_SIZE
++	hex
++	default 0x8000
++
+ config MAX_ROOT_PORTS
+ 	int
+ 	default 6
+diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
+index a42a3c365b..80237f9810 100644
+--- a/src/soc/intel/cannonlake/Kconfig
++++ b/src/soc/intel/cannonlake/Kconfig
+@@ -160,6 +160,10 @@ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+ 
++config HEAP_SIZE
++	hex
++	default 0x8000
++
+ config NHLT_DMIC_1CH_16B
+ 	bool
+ 	depends on ACPI_NHLT
+diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
+index 3361c0ddb9..7f1c767379 100644
+--- a/src/soc/intel/elkhartlake/Kconfig
++++ b/src/soc/intel/elkhartlake/Kconfig
+@@ -104,6 +104,10 @@ config IED_REGION_SIZE
+ 	hex
+ 	default 0x0
+ 
++config HEAP_SIZE
++	hex
++	default 0x8000
++
+ config MAX_ROOT_PORTS
+ 	int
+ 	default 7
+diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
+index 3d84991e09..ff5def3263 100644
+--- a/src/soc/intel/jasperlake/Kconfig
++++ b/src/soc/intel/jasperlake/Kconfig
+@@ -106,6 +106,10 @@ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+ 
++config HEAP_SIZE
++	hex
++	default 0x8000
++
+ config MAX_ROOT_PORTS
+ 	int
+ 	default 8
+diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
+index 590e8b80e1..48030a1911 100644
+--- a/src/soc/intel/meteorlake/Kconfig
++++ b/src/soc/intel/meteorlake/Kconfig
+@@ -197,6 +197,11 @@ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000 if BMP_LOGO
++	default 0x10000
++
+ # Intel recommends reserving the PCIe TBT root port resources as below:
+ # - 42 buses
+ # - 194 MiB Non-prefetchable memory
+diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
+index e0df501460..d6a11363ee 100644
+--- a/src/soc/intel/skylake/Kconfig
++++ b/src/soc/intel/skylake/Kconfig
+@@ -151,6 +151,10 @@ config EXCLUDE_NATIVE_SD_INTERFACE
+ 	help
+ 	  If you set this option to n, will not use native SD controller.
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000
++
+ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
+index c07a0d8365..0a4b7bfdb8 100644
+--- a/src/soc/intel/tigerlake/Kconfig
++++ b/src/soc/intel/tigerlake/Kconfig
+@@ -152,6 +152,10 @@ config IED_REGION_SIZE
+ config INTEL_TME
+ 	default n
+ 
++config HEAP_SIZE
++	hex
++	default 0x10000
++
+ config MAX_ROOT_PORTS
+ 	int
+ 	default 24 if SOC_INTEL_TIGERLAKE_PCH_H
+diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
+index e63bee5451..63ced01067 100644
+--- a/src/soc/intel/xeon_sp/Kconfig
++++ b/src/soc/intel/xeon_sp/Kconfig
+@@ -91,6 +91,10 @@ config ECAM_MMCONF_BASE_ADDRESS
+ config ECAM_MMCONF_BUS_NUMBER
+ 	default 256
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000
++
+ config HPET_MIN_TICKS
+ 	hex
+ 	default 0x80
+diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig
+index ac166c3038..f54f7716b6 100644
+--- a/src/soc/intel/xeon_sp/cpx/Kconfig
++++ b/src/soc/intel/xeon_sp/cpx/Kconfig
+@@ -71,6 +71,10 @@ config CPU_MICROCODE_CBFS_LEN
+ 	hex
+ 	default 0x7C00
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000
++
+ config STACK_SIZE
+ 	hex
+ 	default 0x4000
+diff --git a/src/soc/intel/xeon_sp/skx/Kconfig b/src/soc/intel/xeon_sp/skx/Kconfig
+index 5d843878e1..c2c3d4e2e8 100644
+--- a/src/soc/intel/xeon_sp/skx/Kconfig
++++ b/src/soc/intel/xeon_sp/skx/Kconfig
+@@ -55,6 +55,10 @@ config CPU_MICROCODE_CBFS_LEN
+ 	hex
+ 	default 0x7C00
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000
++
+ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig
+index 43b87ade14..b1c4c783b7 100644
+--- a/src/soc/intel/xeon_sp/spr/Kconfig
++++ b/src/soc/intel/xeon_sp/spr/Kconfig
+@@ -79,6 +79,10 @@ config CPU_MICROCODE_CBFS_LEN
+ 	hex
+ 	default 0x8c00
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000
++
+ config STACK_SIZE
+ 	hex
+ 	default 0x4000
+diff --git a/src/soc/qualcomm/ipq40xx/Kconfig b/src/soc/qualcomm/ipq40xx/Kconfig
+index 0ce92731c0..0eabb00752 100644
+--- a/src/soc/qualcomm/ipq40xx/Kconfig
++++ b/src/soc/qualcomm/ipq40xx/Kconfig
+@@ -57,4 +57,8 @@ config SBL_UTIL_PATH
+ 	help
+ 	  Path for utils to combine SBL_ELF and bootblock
+ 
++config HEAP_SIZE
++	hex
++	default 0x8000
++
+ endif
+-- 
+2.39.2
+
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
index 54d627a2..ca0b6f8d 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
@@ -171,6 +171,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -486,7 +487,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
index 15a9719c..b2ee3e81 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
@@ -169,6 +169,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -482,7 +483,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 7dfbf434..4200763e 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -171,6 +171,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -498,7 +499,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index f0876eb6..b349d6e4 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -169,6 +169,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -495,7 +496,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/g43t-am3/config/libgfxinit_txtmode b/config/coreboot/g43t-am3/config/libgfxinit_txtmode
index 68e983d5..70107660 100644
--- a/config/coreboot/g43t-am3/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t-am3/config/libgfxinit_txtmode
@@ -165,6 +165,7 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -473,7 +474,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode b/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
index 3dc407a7..20d12908 100644
--- a/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
@@ -165,6 +165,7 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -473,7 +474,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode b/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
index 62d0ce32..61b25a92 100644
--- a/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
+++ b/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
@@ -172,6 +172,7 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -480,7 +481,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/gru_bob/config/libgfxinit_corebootfb b/config/coreboot/gru_bob/config/libgfxinit_corebootfb
index 7990fb0c..9502be12 100644
--- a/config/coreboot/gru_bob/config/libgfxinit_corebootfb
+++ b/config/coreboot/gru_bob/config/libgfxinit_corebootfb
@@ -675,6 +675,7 @@ CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_DRIVER_TPM_SPI_CHIP=0
 # CONFIG_TPM_MEASURED_BOOT is not set
@@ -864,7 +865,6 @@ CONFIG_ACPI_CUSTOM_MADT=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/gru_kevin/config/libgfxinit_corebootfb b/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
index 61835e76..cf36cf35 100644
--- a/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
+++ b/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
@@ -675,6 +675,7 @@ CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -861,7 +862,6 @@ CONFIG_ACPI_CUSTOM_MADT=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
index 2cf092d6..689ae998 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -545,7 +546,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
index 7e04e304..fbfb8926 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -542,7 +543,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
index ffda7458..55b3d3c5 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
@@ -190,6 +190,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -539,7 +540,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
index ba3d739d..09771a52 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
@@ -188,6 +188,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -536,7 +537,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
index 5afb9946..d09b6d0f 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
@@ -189,6 +189,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -537,7 +538,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
index a83488c4..a980aa21 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
@@ -187,6 +187,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -534,7 +535,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
index 224316e3..12766f42 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
@@ -188,6 +188,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -524,7 +525,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
index d36aa54f..f7f90bee 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
@@ -186,6 +186,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -521,7 +522,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
index f31c3c16..a3133a98 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
@@ -188,6 +188,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -524,7 +525,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
index 5d815947..f5955b65 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
@@ -186,6 +186,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -521,7 +522,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
index 7ea0be8c..f772cc1d 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
@@ -189,6 +189,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -526,7 +527,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
index e29f73b4..6da85d0f 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
@@ -187,6 +187,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -523,7 +524,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
index 4bc7a882..b53d32a4 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
@@ -192,6 +192,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -543,7 +544,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
index 1fd59782..20917409 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
@@ -190,6 +190,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -540,7 +541,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
index 467ac562..f4be5b80 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
@@ -190,6 +190,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -539,7 +540,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
index acc9bad3..9bc78e3e 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
@@ -188,6 +188,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -536,7 +537,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/macbook11/config/libgfxinit_corebootfb b/config/coreboot/macbook11/config/libgfxinit_corebootfb
index e0a13344..2079b949 100644
--- a/config/coreboot/macbook11/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11/config/libgfxinit_corebootfb
@@ -162,6 +162,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -458,7 +459,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/macbook11/config/libgfxinit_txtmode b/config/coreboot/macbook11/config/libgfxinit_txtmode
index a84410d7..8b8162dd 100644
--- a/config/coreboot/macbook11/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11/config/libgfxinit_txtmode
@@ -162,6 +162,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -456,7 +457,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
index 3984fbe0..6a65c773 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
@@ -161,6 +161,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -457,7 +458,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
index 36b30bbd..57f50bd7 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
@@ -161,6 +161,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -455,7 +456,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/macbook21/config/libgfxinit_corebootfb b/config/coreboot/macbook21/config/libgfxinit_corebootfb
index a9d168ae..212570fb 100644
--- a/config/coreboot/macbook21/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21/config/libgfxinit_corebootfb
@@ -162,6 +162,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -458,7 +459,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/macbook21/config/libgfxinit_txtmode b/config/coreboot/macbook21/config/libgfxinit_txtmode
index 68a0e4fa..263be92a 100644
--- a/config/coreboot/macbook21/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21/config/libgfxinit_txtmode
@@ -162,6 +162,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -456,7 +457,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
index 3df9fd72..93617181 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
@@ -161,6 +161,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -457,7 +458,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
index 2e83d090..2e2250f9 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
@@ -161,6 +161,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -455,7 +456,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
index 710cd397..45c86d25 100644
--- a/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
@@ -143,6 +143,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -312,7 +313,6 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_CUSTOM_MADT=y
 CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
index b981db3a..f0b31134 100644
--- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
@@ -162,6 +162,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x8000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -375,7 +376,6 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
index 16e1436b..29ae73a3 100644
--- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
@@ -162,6 +162,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x8000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -371,7 +372,6 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
index c5271b0b..63b44a69 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_txtmode b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
index 98e0fae6..bb19fd9b 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
index d4883280..b7decbd2 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_txtmode b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
index 727283ba..656f107b 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
index b9e16a6a..d49a3972 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_txtmode b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
index 4fdc9128..752834de 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
index 3b3718e3..2a88b6a7 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
@@ -206,6 +206,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -526,7 +527,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_txtmode b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
index f92e0384..d394be0b 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
@@ -204,6 +204,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -522,7 +523,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index 3bee04cd..abdaf78f 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -179,6 +179,7 @@ CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -515,7 +516,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
index 35d681d7..4b4fd04d 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_txtmode b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
index 830fcae4..f2a79cb8 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
index 3b230873..9f386395 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_txtmode b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
index 0fc78146..ead9d8bb 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
index c26d8ea4..7dcbcd15 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_txtmode b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
index a2eb7964..1cd7ff53 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
index 61d34cf8..10d9d386 100644
--- a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
@@ -210,6 +210,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
index e47f4353..fb1594f7 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
@@ -210,6 +210,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -557,7 +558,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
index 83e51edb..b1bc0f86 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
@@ -208,6 +208,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -554,7 +555,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
index 33fe8cd0..ad8cb2ac 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
@@ -210,6 +210,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_txtmode b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
index 444781f2..1137ca48 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
@@ -208,6 +208,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -555,7 +556,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
index 7c0a7503..20dd493d 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -551,7 +552,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
index 69d58c7b..6e4620d4 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -548,7 +549,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
index e334b289..ad2a751d 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_txtmode b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
index 9a39132a..10983d6a 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
index 6845d63e..fddd15a8 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_txtmode b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
index 892c0468..acf00c66 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
index 05daf8b8..e0de6f92 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_txtmode b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
index 74e04190..ec45dea3 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
index b4a1c204..55cb7648 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
@@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_txtmode b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
index 485bfc1b..90668c1a 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -555,7 +556,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
index 0cba59f5..0b85402f 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
@@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -559,7 +560,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_txtmode b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
index 8fd61ca7..03b649eb 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -556,7 +557,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
index 0ed7ed72..1a2d21ec 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
@@ -199,6 +199,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -505,7 +506,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
index e15e9cb3..d12a227e 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
@@ -199,6 +199,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -503,7 +504,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
index 29c1bd04..b9b594af 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
@@ -199,6 +199,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -505,7 +506,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
index 22b2f855..a9ed3cf7 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
@@ -199,6 +199,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -503,7 +504,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
index 04b399b6..c79477f7 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_txtmode b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
index 74878bb3..f23032f0 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
index b3a8f337..bf7c0872 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_txtmode b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
index fdf7f4d0..e0fb23a9 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
index ffde3aa1..567bb2aa 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_txtmode b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
index ae92fb6c..1571ab67 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
index 79233fd6..7dc5db5d 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
@@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -560,7 +561,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_txtmode b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
index 4a43108b..1e4c335c 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -557,7 +558,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
index 619f31ed..deb9247a 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -550,7 +551,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
index 124a9103..583b2030 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -547,7 +548,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
index 29544a99..7689f011 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -530,7 +531,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_txtmode b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
index 9fd51663..3906b3e8 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -526,7 +527,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
index 336abbe0..840fddbf 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -530,7 +531,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_txtmode b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
index 19cc3eb8..934901c2 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -526,7 +527,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
index 5326c12a..e81f2400 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -530,7 +531,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_txtmode b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
index 166f38ce..b4d0c722 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -526,7 +527,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
index b5589592..874065c6 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
@@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_txtmode b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
index a5059dea..7b8dc487 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -555,7 +556,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
index 9f05d7df..cbeec04c 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
@@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_txtmode b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
index 62f356ad..408e9235 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -555,7 +556,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
index 27cc051d..711c54f9 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
@@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_txtmode b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
index 2f6039d0..424bfd01 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -555,7 +556,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
index 9f7a5258..f7383688 100644
--- a/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
@@ -212,6 +212,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode b/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
index 394ed4f9..6238a584 100644
--- a/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
@@ -210,6 +210,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -555,7 +556,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
index d312bce2..d8ce139d 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
@@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
index d0ddb7ce..32bac7d0 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -555,7 +556,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
index 14dbec10..09ab225d 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
@@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
index d3e16674..ae3ea2c1 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -555,7 +556,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
index 421ced71..fe496a15 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -530,7 +531,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_txtmode b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
index ded47d1a..1ea9f8a0 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -526,7 +527,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
index 89e2d000..fe7ce82f 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -530,7 +531,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_txtmode b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
index 13dc0a66..f2b3090c 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -526,7 +527,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
index 8775cbf2..09303210 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -530,7 +531,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_txtmode b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
index 517a6ee9..cadfb78c 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -526,7 +527,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x60/config/libgfxinit_corebootfb b/config/coreboot/x60/config/libgfxinit_corebootfb
index 210e0bdc..ef73cea7 100644
--- a/config/coreboot/x60/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60/config/libgfxinit_corebootfb
@@ -200,6 +200,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -511,7 +512,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x60/config/libgfxinit_txtmode b/config/coreboot/x60/config/libgfxinit_txtmode
index ad17aae1..ec716f1f 100644
--- a/config/coreboot/x60/config/libgfxinit_txtmode
+++ b/config/coreboot/x60/config/libgfxinit_txtmode
@@ -200,6 +200,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -509,7 +510,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
index 9c0a4267..52c5b74c 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
@@ -200,6 +200,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -511,7 +512,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_txtmode b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
index 8d4ece5b..bcf50426 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
@@ -200,6 +200,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -509,7 +510,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console

From 7e6fd7e5b4a87063e962e57ba73a85c28aaeb932 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 29 Oct 2023 01:22:21 +0000
Subject: [PATCH 0011/1549] add lenovo x201 support

note: me6_update_parser needs to be written, similar
to me7_update_parser, to generate the partition
tables within intel me6 on lenovo bios updates.

the current logic in lbmk goes like this:
mkdir -p vendorfiles/cache/

and save your factory dump as:
vendorfiles/cache/x201_factory.rom

the build system has been modified, in such a way
as to support extracting me.bin (which is the full
one) and then neutering from this.

this is done automatically, if the file is present,
but you must first insert that file there, which means
you'll need a dump of the original boot flash on your
thinkpad x201

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../x201_8mb/config/libgfxinit_corebootfb     | 650 ++++++++++++++++++
 .../x201_8mb/config/libgfxinit_txtmode        | 646 +++++++++++++++++
 config/coreboot/x201_8mb/target.cfg           |   8 +
 config/ifd/x201/gbe                           | Bin 0 -> 8192 bytes
 config/ifd/x201/ifd                           | Bin 0 -> 4096 bytes
 config/vendor/sources                         |   6 +
 script/vendor/download                        |  26 +-
 7 files changed, 1331 insertions(+), 5 deletions(-)
 create mode 100644 config/coreboot/x201_8mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/x201_8mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/x201_8mb/target.cfg
 create mode 100644 config/ifd/x201/gbe
 create mode 100644 config/ifd/x201/ifd

diff --git a/config/coreboot/x201_8mb/config/libgfxinit_corebootfb b/config/coreboot/x201_8mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..8fb6cb51
--- /dev/null
+++ b/config/coreboot/x201_8mb/config/libgfxinit_corebootfb
@@ -0,0 +1,650 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_FAMILY="ThinkPad X201"
+CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X201"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/x201"
+CONFIG_VGA_BIOS_ID="8086,0046"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0x7EC000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=4
+CONFIG_ME_CLEANER_ARGS="-S -w EFFS"
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_VBOOT_SLOTS_RW_A=y
+CONFIG_DCACHE_RAM_BASE=0xfefc0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/x201/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/x201/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/x201/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_VBT_DATA_SIZE_KB=8
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X201"
+CONFIG_HAVE_IFD_BIN=y
+# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+CONFIG_BOARD_LENOVO_X201=y
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0018"
+CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_2065X=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_IRONLAKE=y
+
+#
+# Southbridge
+#
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_IBEXPEAK=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_NSC_PC87382=y
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_DRIVERS_LENOVO_WACOM=y
+CONFIG_DIGITIZER_AUTODETECT=y
+# CONFIG_DIGITIZER_PRESENT is not set
+# CONFIG_DIGITIZER_ABSENT is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_NO_UART_ON_SUPERIO=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_EDID=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Ibex_Peak"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/x201_8mb/config/libgfxinit_txtmode b/config/coreboot/x201_8mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..5171a640
--- /dev/null
+++ b/config/coreboot/x201_8mb/config/libgfxinit_txtmode
@@ -0,0 +1,646 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_FAMILY="ThinkPad X201"
+CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X201"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/x201"
+CONFIG_VGA_BIOS_ID="8086,0046"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0x7EC000
+CONFIG_MAX_CPUS=4
+CONFIG_ME_CLEANER_ARGS="-S -w EFFS"
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_VBOOT_SLOTS_RW_A=y
+CONFIG_DCACHE_RAM_BASE=0xfefc0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/x201/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/x201/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/x201/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_VBT_DATA_SIZE_KB=8
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X201"
+CONFIG_HAVE_IFD_BIN=y
+# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+CONFIG_BOARD_LENOVO_X201=y
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0018"
+CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_2065X=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_IRONLAKE=y
+
+#
+# Southbridge
+#
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_IBEXPEAK=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_NSC_PC87382=y
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_DRIVERS_LENOVO_WACOM=y
+CONFIG_DIGITIZER_AUTODETECT=y
+# CONFIG_DIGITIZER_PRESENT is not set
+# CONFIG_DIGITIZER_ABSENT is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_NO_UART_ON_SUPERIO=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_EDID=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Ibex_Peak"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/x201_8mb/target.cfg b/config/coreboot/x201_8mb/target.cfg
new file mode 100644
index 00000000..f5dfa8d8
--- /dev/null
+++ b/config/coreboot/x201_8mb/target.cfg
@@ -0,0 +1,8 @@
+tree="default"
+romtype="normal"
+arch="x86_64"
+payload_grub="y"
+payload_grub_withseabios="y"
+payload_seabios="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/ifd/x201/gbe b/config/ifd/x201/gbe
new file mode 100644
index 0000000000000000000000000000000000000000..1ec7219308716fc2c9bac032c6f8517cc2ac2aa1
GIT binary patch
literal 8192
zcmZ2gyF>q1Ed$5@{|6cV0|C>5|NjpQ1S_r*e<i>G1WfE8l69#D1A_#R!IPrp!0pT-
z%<xKJ?XFh>uYn{4GBiwRVDJN}MF#)>GcYnZ7z?vIfXqe(42=K(zdeYo8o@@WRPHbU
zT5QOm0;I)&v?`F60n$A{njJ{@Lg_vztq!Caf#Rl6+5}1)18F9pxI=<G1Iq<L26jdv
zpmp+KKO<}#d92Lf7G_37z>l(UgaETGro<i|OtDds(GVat1V&z|GwS2f5Eu=C(GVC7
zfzc2c4S~@R7!84e3V~Il{r`aq`axmuX#bzM-r8vYpSW-uRYiIT42pta)Dfd0Fd71*
VAut*OqaiRF0;3@?8UiCC1OQy}gZ2Ob

literal 0
HcmV?d00001

diff --git a/config/ifd/x201/ifd b/config/ifd/x201/ifd
new file mode 100644
index 0000000000000000000000000000000000000000..cac4e5afb1aaedae4e0362896e6615a34e0cf369
GIT binary patch
literal 4096
zcmezW9~DF`{lL$}z{1SNBp{%`z`!8GFo6?DfdQ&Y2oEG7!tkG+nL(I=k%5WfKR*Kl
zvN{kCge4d`IFQ8$3%e=Yzys)HIAD5s0?vjrco`U67+4vmGce4AivbxC%&2}HEPfhw
z$7l$QhQMeDjE2By2#kinXb6mkz-S1JhQMeDjD!$4q#(|~s=%u7-T+EFKxlan1_n_D
RQ3ZuU2p<#{Z@EVMZvYm?UhMz?

literal 0
HcmV?d00001

diff --git a/config/vendor/sources b/config/vendor/sources
index 31d9937e..3fd0a4d3 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -120,3 +120,9 @@
 	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
 	DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
 }
+
+{x201}{
+	DL_hash x201_factory.rom
+	DL_url rom
+	DL_url_bkup rom
+}
diff --git a/script/vendor/download b/script/vendor/download
index 40244fff..12231b39 100755
--- a/script/vendor/download
+++ b/script/vendor/download
@@ -22,7 +22,8 @@ uefiextract="${PWD}/src/uefitool/uefiextract"
 
 eval "$(setvars "" _b _dl EC_url EC_url_bkup EC_hash DL_hash DL_url DL_url_bkup \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
-    E6400_VGA_romname SCH5545EC_DL_url SCH5545EC_DL_url_bkup SCH5545EC_DL_hash)"
+    E6400_VGA_romname SCH5545EC_DL_url SCH5545EC_DL_url_bkup SCH5545EC_DL_hash \
+    is_rom)"
 
 main()
 {
@@ -97,11 +98,18 @@ fetch()
 	[ "${5#/}" = "${5}" ] || err "fetch: absolute path not allowed: '${5}'"
 	_dest="${5##*../}"
 	_dl="${vendir}/cache/${dlsum}"
+	dl_fail=""
 
 	x_ mkdir -p "${_dl%/*}"
 
-	dl_fail="y"
-	vendor_checksum "${dlsum}" "${_dl}" && dl_fail="n"
+	is_rom="n"
+	if [ "${dl}" = "rom" ] || [ "${dl_bkup}" = "rom" ]; then
+		dl_fail="n"
+		is_rom="y"
+	else
+		dl_fail="y"
+		vendor_checksum "${dlsum}" "${_dl}" && dl_fail="n"
+	fi
 	for url in "${dl}" "${dl_bkup}"; do
 		[ "${dl_fail}" = "n" ] && break
 		[ -z "${url}" ] && continue
@@ -137,8 +145,14 @@ mkdirs()
 	mkdir -p "${1%/*}" || err "mkdirs: !mkdir -p ${1%/*}"
 	x_ rm -Rf "${appdir}"
 	x_ mkdir -p "${appdir}/"
-	extract_archive "${_dl}" "${appdir}" || \
-	    [ "${2}" = "extract_e6400vga" ] || err "mkdirs ${1} ${2}: !extract"
+	if [ "${is_rom}" = "y" ]; then
+		cp "${_dl}" "${appdir}" || \
+		    err "mkdirs copyrom ${_dl}: can't copy to appdir"
+	else
+		extract_archive "${_dl}" "${appdir}" || \
+		    [ "${2}" = "extract_e6400vga" ] || \
+		    err "mkdirs ${1} ${2}: !extract"
+	fi
 }
 
 extract_intel_me()
@@ -152,6 +166,7 @@ extract_intel_me()
 	sdir="$(mktemp -d)"
 	mkdir -p "${sdir}" || err "extract_intel_me: !mkdir -p \"${sdir}\""
 	(
+	[ "${cdir#/a}" != "${cdir}" ] && cdir="${cdir#/}"
 	cd "${cdir}" || err "extract_intel_me: !cd \"${cdir}\""
 	for i in *; do
 		[ -f "${_me}" ] && break
@@ -170,6 +185,7 @@ extract_intel_me()
 			continue
 		fi
 		cdir="${1}"
+		[ "${cdir#/a}" != "${cdir}" ] && cdir="${cdir#/}"
 		cd "${cdir}"
 	done
 	)

From 27efbc6f54292807250f126bd0aa16316f3f1cdf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 29 Oct 2023 11:27:02 +0000
Subject: [PATCH 0012/1549] add heci timeout for ibex peak

patch courtesy of denis :)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...k-setup_heci_uma.c-Add-timeouts-when.patch | 77 +++++++++++++++++++
 1 file changed, 77 insertions(+)
 create mode 100644 config/coreboot/default/patches/0026-sb-intel-ibexpeak-setup_heci_uma.c-Add-timeouts-when.patch

diff --git a/config/coreboot/default/patches/0026-sb-intel-ibexpeak-setup_heci_uma.c-Add-timeouts-when.patch b/config/coreboot/default/patches/0026-sb-intel-ibexpeak-setup_heci_uma.c-Add-timeouts-when.patch
new file mode 100644
index 00000000..8bca1b0a
--- /dev/null
+++ b/config/coreboot/default/patches/0026-sb-intel-ibexpeak-setup_heci_uma.c-Add-timeouts-when.patch
@@ -0,0 +1,77 @@
+From 27bf50138af0c5267581f8cc1f80676fb1836572 Mon Sep 17 00:00:00 2001
+From: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
+Date: Mon, 27 Mar 2017 22:05:16 +0200
+Subject: [PATCH 1/1] sb/intel/ibexpeak/setup_heci_uma.c: Add timeouts when
+ waiting for heci
+
+Since until now, the code running on the management engine is:
+- Signed by its manufacturer
+- Proprietary software, without corresponding source code
+It can desirable to run the least ammount possible of such
+code, which is what me_cleaner[1] enables.
+
+It does it by removing partitions of the management engine
+firmwares, however when doing so, the HECI interface might
+not be present anymore.
+
+So it is desirable not to have the RAM initialisation code
+wait forever for the HECI interface to appear.
+
+[1] https://github.com/corna/me_cleaner/
+
+MERGENOTE: Adapted from this patch:
+https://mail.coreboot.org/pipermail/coreboot/2017-March/083798.html
+Author on this version of the patch set to same author as in the
+linked one, with same date set, but the commit message is modified
+to match the new code path. Patch author Denis Carikli, but this
+versions of the patch was rebased from it by Leah Rowe on 29 Oct 2023.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/southbridge/intel/ibexpeak/setup_heci_uma.c | 14 ++++++++------
+ 1 file changed, 8 insertions(+), 6 deletions(-)
+
+diff --git a/src/southbridge/intel/ibexpeak/setup_heci_uma.c b/src/southbridge/intel/ibexpeak/setup_heci_uma.c
+index 572e5e7a76..3a68344d97 100644
+--- a/src/southbridge/intel/ibexpeak/setup_heci_uma.c
++++ b/src/southbridge/intel/ibexpeak/setup_heci_uma.c
+@@ -8,28 +8,30 @@
+ #include <southbridge/intel/ibexpeak/me.h>
+ #include <southbridge/intel/ibexpeak/pch.h>
+ #include <types.h>
++#include <delay.h>
+ 
+ #define HECIDEV PCI_DEV(0, 0x16, 0)
+ 
+-/* FIXME: add timeout.  */
+ static void wait_heci_ready(void)
+ {
+-	while (!(read32(DEFAULT_HECIBAR + 0xc) & 8))	// = 0x8000000c
+-		;
++	int i = 1000*1000;
+ 
++	while (i-- && !(read32(DEFAULT_HECIBAR + 0xc) & 8)) /* = 0x8000000c */
++		udelay(1);
+ 	write32((DEFAULT_HECIBAR + 0x4), (read32(DEFAULT_HECIBAR + 0x4) & ~0x10) | 0xc);
+ }
+ 
+-/* FIXME: add timeout.  */
+ static void wait_heci_cb_avail(int len)
+ {
++	int i = 1000*1000;
++
+ 	union {
+ 		struct mei_csr csr;
+ 		u32 raw;
+ 	} csr;
+ 
+-	while (!(read32(DEFAULT_HECIBAR + 0xc) & 8))
+-		;
++	while (i-- && !(read32(DEFAULT_HECIBAR + 0xc) & 8))
++		udelay(1);
+ 
+ 	do {
+ 		csr.raw = read32(DEFAULT_HECIBAR + 0x4);
+-- 
+2.39.2
+

From 34f5685337bb94751d36786467a0027b526f6346 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 29 Oct 2023 12:06:07 +0000
Subject: [PATCH 0013/1549] fix raminit/coldboot on dell e6400

the patch included in this revision is pulled from:
https://review.coreboot.org/c/coreboot/+/54024/2

contrary to hell's assertion of "not for merge", this does
in fact work nicely on a dell e6400; nicholas chin tested
on e6400 and found that those RCOMP values are the same

nicholas was testing some errant modules that seemed to
fail raminit in coreboot. in some cases, dell e6400 would
regularly fail coldboot even though reboot was ok; this was
therefore the cause of suspicioun for it being raminit-related

with this patch from hell (Angel Pons, but knows as hell
on IRC) it should fix boot issue on Dell Latitude E6400

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...nb-intel-gm45-Make-DDR2-raminit-work.patch | 216 ++++++++++++++++++
 1 file changed, 216 insertions(+)
 create mode 100644 config/coreboot/default/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch

diff --git a/config/coreboot/default/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch b/config/coreboot/default/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch
new file mode 100644
index 00000000..454e3e7b
--- /dev/null
+++ b/config/coreboot/default/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch
@@ -0,0 +1,216 @@
+From e047dc3c95063f27517cd6754e9cbe496ac9313d Mon Sep 17 00:00:00 2001
+From: Angel Pons <th3fanbus@gmail.com>
+Date: Mon, 10 May 2021 22:40:59 +0200
+Subject: [PATCH] [NOT FOR MERGE] nb/intel/gm45: Make DDR2 raminit work
+
+List of changes:
+ - Update some timing and ODT values
+ - Patch RCOMP calibration to better match what MRC binaries do
+ - Replay a hardcoded list of RCOMP codes after RcvEn
+
+This makes raminit work at DDR2-800 speeds and fixes S3 resume as well.
+Tested on Toshiba Satellite A300-1ME with two 2 GiB DDR2-800 SO-DIMMs.
+
+Change-Id: Ibaee524b8ff652ddadd66cb0eb680401b988ff7c
+Signed-off-by: Angel Pons <th3fanbus@gmail.com>
+---
+
+diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
+index f28c6d1..bdf0432 100644
+--- a/src/northbridge/intel/gm45/gm45.h
++++ b/src/northbridge/intel/gm45/gm45.h
+@@ -419,7 +419,7 @@
+ int raminit_read_vco_index(void);
+ u32 raminit_get_rank_addr(unsigned int channel, unsigned int rank);
+ 
+-void raminit_rcomp_calibration(stepping_t stepping);
++void raminit_rcomp_calibration(int ddr_type, stepping_t stepping);
+ void raminit_reset_readwrite_pointers(void);
+ void raminit_receive_enable_calibration(int ddr_type, const timings_t *, const dimminfo_t *);
+ void raminit_write_training(const mem_clock_t, const dimminfo_t *, int s3resume);
+diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
+index ecada7b..2b8c44e 100644
+--- a/src/northbridge/intel/gm45/raminit.c
++++ b/src/northbridge/intel/gm45/raminit.c
+@@ -1049,7 +1049,7 @@
+ 	}
+ 
+ 	/* Perform RCOMP calibration for DDR3. */
+-	raminit_rcomp_calibration(stepping);
++	raminit_rcomp_calibration(spd_type, stepping);
+ 
+ 	/* Run initial RCOMP. */
+ 	mchbar_setbits32(0x418, 1 << 17);
+@@ -1119,7 +1119,7 @@
+ 				reg = (reg & ~(0xf << 10)) | (2 << 10);
+ 			else
+ 				reg = (reg & ~(0xf << 10)) | (3 << 10);
+-			reg = (reg & ~(0x7 <<  5)) | (3 << 5);
++			reg = (reg & ~(0x7 <<  5)) | (2 << 5);
+ 		} else if (timings->mem_clock != MEM_CLOCK_1067MT) {
+ 			reg = (reg & ~(0x7 << 15)) | ((9 - timings->CAS) << 15);
+ 			reg = (reg & ~(0xf << 10)) | ((timings->CAS - 3) << 10);
+@@ -1288,11 +1288,11 @@
+ 		reg = (reg & ~(0xf << (44 - 32))) | (8 << (44 - 32));
+ 		reg = (reg & ~(0xf << (40 - 32))) | (7 << (40 - 32));
+ 		if (timings->mem_clock == MEM_CLOCK_667MT) {
+-			reg = (reg & ~(0xf << (36 - 32))) | (4 << (36 - 32));
+-			reg = (reg & ~(0xf << (32 - 32))) | (4 << (32 - 32));
++			reg = (reg & ~(0xf << (36 - 32))) | (8 << (36 - 32));
++			reg = (reg & ~(0xf << (32 - 32))) | (8 << (32 - 32));
+ 		} else {
+-			reg = (reg & ~(0xf << (36 - 32))) | (5 << (36 - 32));
+-			reg = (reg & ~(0xf << (32 - 32))) | (5 << (32 - 32));
++			reg = (reg & ~(0xf << (36 - 32))) | (9 << (36 - 32));
++			reg = (reg & ~(0xf << (32 - 32))) | (9 << (32 - 32));
+ 		}
+ 		mchbar_write32(CxODT_HIGH(ch), reg);
+ 
+@@ -2217,6 +2217,84 @@
+ 		raminit_write_training(timings->mem_clock, dimms, s3resume);
+ 	}
+ 
++	/*
++	 * Program hardcoded DDR2-800 RCOMP SRAM codes. This must be done
++	 * after receiver enable calibration, otherwise raminit sometimes
++	 * completes with non-working memory.
++	 */
++	mchbar_write32(0x0530, 0x06060005);
++	mchbar_write32(0x0680, 0x06060606);
++	mchbar_write32(0x0684, 0x08070606);
++	mchbar_write32(0x0688, 0x0e0e0c0a);
++	mchbar_write32(0x068c, 0x0e0e0e0e);
++	mchbar_write32(0x0698, 0x06060606);
++	mchbar_write32(0x069c, 0x08070606);
++	mchbar_write32(0x06a0, 0x0c0c0b0a);
++	mchbar_write32(0x06a4, 0x0c0c0c0c);
++
++	mchbar_write32(0x06c0, 0x02020202);
++	mchbar_write32(0x06c4, 0x03020202);
++	mchbar_write32(0x06c8, 0x04040403);
++	mchbar_write32(0x06cc, 0x04040404);
++	mchbar_write32(0x06d8, 0x02020202);
++	mchbar_write32(0x06dc, 0x03020202);
++	mchbar_write32(0x06e0, 0x04040403);
++	mchbar_write32(0x06e4, 0x04040404);
++
++	mchbar_write32(0x0700, 0x02020202);
++	mchbar_write32(0x0704, 0x03020202);
++	mchbar_write32(0x0708, 0x04040403);
++	mchbar_write32(0x070c, 0x04040404);
++	mchbar_write32(0x0718, 0x02020202);
++	mchbar_write32(0x071c, 0x03020202);
++	mchbar_write32(0x0720, 0x04040403);
++	mchbar_write32(0x0724, 0x04040404);
++
++	mchbar_write32(0x0740, 0x02020202);
++	mchbar_write32(0x0744, 0x03020202);
++	mchbar_write32(0x0748, 0x04040403);
++	mchbar_write32(0x074c, 0x04040404);
++	mchbar_write32(0x0758, 0x02020202);
++	mchbar_write32(0x075c, 0x03020202);
++	mchbar_write32(0x0760, 0x04040403);
++	mchbar_write32(0x0764, 0x04040404);
++
++	mchbar_write32(0x0780, 0x06060606);
++	mchbar_write32(0x0784, 0x09070606);
++	mchbar_write32(0x0788, 0x0e0e0c0b);
++	mchbar_write32(0x078c, 0x0e0e0e0e);
++	mchbar_write32(0x0798, 0x06060606);
++	mchbar_write32(0x079c, 0x09070606);
++	mchbar_write32(0x07a0, 0x0d0d0c0b);
++	mchbar_write32(0x07a4, 0x0d0d0d0d);
++
++	mchbar_write32(0x07c0, 0x06060606);
++	mchbar_write32(0x07c4, 0x09070606);
++	mchbar_write32(0x07c8, 0x0e0e0c0b);
++	mchbar_write32(0x07cc, 0x0e0e0e0e);
++	mchbar_write32(0x07d8, 0x06060606);
++	mchbar_write32(0x07dc, 0x09070606);
++	mchbar_write32(0x07e0, 0x0d0d0c0b);
++	mchbar_write32(0x07e4, 0x0d0d0d0d);
++
++	mchbar_write32(0x0840, 0x06060606);
++	mchbar_write32(0x0844, 0x08070606);
++	mchbar_write32(0x0848, 0x0e0e0c0a);
++	mchbar_write32(0x084c, 0x0e0e0e0e);
++	mchbar_write32(0x0858, 0x06060606);
++	mchbar_write32(0x085c, 0x08070606);
++	mchbar_write32(0x0860, 0x0c0c0b0a);
++	mchbar_write32(0x0864, 0x0c0c0c0c);
++
++	mchbar_write32(0x0880, 0x02020202);
++	mchbar_write32(0x0884, 0x03020202);
++	mchbar_write32(0x0888, 0x04040403);
++	mchbar_write32(0x088c, 0x04040404);
++	mchbar_write32(0x0898, 0x02020202);
++	mchbar_write32(0x089c, 0x03020202);
++	mchbar_write32(0x08a0, 0x04040403);
++	mchbar_write32(0x08a4, 0x04040404);
++
+ 	igd_compute_ggc(sysinfo);
+ 
+ 	/* Program final memory map (with real values). */
+diff --git a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
+index aef863f..b74765f 100644
+--- a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
++++ b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
+@@ -161,11 +161,13 @@
+ 		mchbar += 4;
+ 	}
+ }
+-void raminit_rcomp_calibration(const stepping_t stepping) {
++void raminit_rcomp_calibration(int ddr_type, const stepping_t stepping) {
+ 	const int a1step = stepping >= STEPPING_CONVERSION_A1;
+ 
+ 	int i;
+ 
++	char magic_comp[2] = {0};
++
+ 	enum {
+ 		PULL_UP = 0,
+ 		PULL_DOWN = 1,
+@@ -196,6 +198,10 @@
+ 		reg = mchbar_read32(0x518);
+ 		lut_idx[channel][group][PULL_UP] = (reg >> 24) & 0x7f;
+ 		lut_idx[channel][group][PULL_DOWN] = (reg >> 16) & 0x7f;
++		if (i == 1) {
++			magic_comp[0] = (reg >> 8) & 0x3f;
++			magic_comp[1] = (reg >> 0) & 0x3f;
++		}
+ 	}
+ 	/* Cleanup? */
+ 	mchbar_setbits32(0x400, 1 << 3);
+@@ -216,13 +222,19 @@
+ 	for (channel = 0; channel < 2; ++channel) {
+ 		for (group = 0; group < 6; ++group) {
+ 			for (pu_pd = PULL_DOWN; pu_pd >= PULL_UP; --pu_pd) {
+-				lookup_and_write(
+-					a1step,
+-					lut_idx[channel][group][pu_pd] - 7,
+-					ddr3_lookup_schedule[group][pu_pd],
+-					mchbar);
++				if (ddr_type == DDR3) {
++					lookup_and_write(
++						a1step,
++						lut_idx[channel][group][pu_pd] - 7,
++						ddr3_lookup_schedule[group][pu_pd],
++						mchbar);
++				}
+ 				mchbar += 0x0018;
+ 			}
++			if (ddr_type == DDR2) {
++				mchbar_clrsetbits32(mchbar + 0, 0x7f << 24, lut_idx[channel][group][PULL_DOWN] << 24);
++				mchbar_clrsetbits32(mchbar + 4, 0x7f <<  0, lut_idx[channel][group][PULL_UP]   <<  0);
++			}
+ 			mchbar += 0x0010;
+ 			/* Channel B knows only the first two groups. */
+ 			if ((1 == channel) && (1 == group))
+@@ -230,4 +242,7 @@
+ 		}
+ 		mchbar += 0x0040;
+ 	}
++
++	mchbar_clrsetbits32(0x4d0, 0x3f << 26, magic_comp[0] << 26);
++	mchbar_clrsetbits32(0x4d0, 0x3f << 20, magic_comp[1] << 20);
+ }

From 00dd3e4aaf2e40c74112d3f978759b53ce870ef5 Mon Sep 17 00:00:00 2001
From: Federico Braghiroli <federico.braghiroli@gmail.com>
Date: Sun, 29 Oct 2023 16:54:20 +0100
Subject: [PATCH 0014/1549] add intel d945gclf_8mb support based on previous
 libreboot configs

The original motherboard uses a 512kB flash chip size, however
I replaced the original chip with a bigger one (8MB).
---
 .../d945gclf_8mb/config/libgfxinit_txtmode    | 590 ++++++++++++++++++
 config/coreboot/d945gclf_8mb/target.cfg       |   7 +
 2 files changed, 597 insertions(+)
 create mode 100644 config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/d945gclf_8mb/target.cfg

diff --git a/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode b/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..3bc5d2be
--- /dev/null
+++ b/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
@@ -0,0 +1,590 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+CONFIG_VENDOR_INTEL=y
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="D945GCLF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="intel/d945gclf"
+CONFIG_VGA_BIOS_ID="8086,2772"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Intel"
+CONFIG_CBFS_SIZE=0x00800000
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_IRQ_SLOT_COUNT=18
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefc0000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_VBT_DATA_SIZE_KB=8
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_BOARD_INTEL_ADLRVP_P is not set
+# CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
+# CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
+# CONFIG_BOARD_INTEL_ADLRVP_M is not set
+# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
+# CONFIG_BOARD_INTEL_ADLRVP_N is not set
+# CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
+# CONFIG_BOARD_INTEL_ADLRVP_RPL is not set
+# CONFIG_BOARD_INTEL_ADLRVP_RPL_EXT_EC is not set
+# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
+# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
+# CONFIG_BOARD_INTEL_ARCHERCITY_CRB is not set
+# CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
+# CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
+
+#
+# Coffeelake RVP
+#
+# CONFIG_BOARD_INTEL_COFFEELAKE_RVPU is not set
+# CONFIG_BOARD_INTEL_COFFEELAKE_RVP11 is not set
+# CONFIG_BOARD_INTEL_WHISKEYLAKE_RVP is not set
+# CONFIG_BOARD_INTEL_COFFEELAKE_RVP8 is not set
+# CONFIG_BOARD_INTEL_COMETLAKE_RVPU is not set
+# CONFIG_BOARD_INTEL_D510MO is not set
+CONFIG_BOARD_INTEL_D945GCLF=y
+# CONFIG_BOARD_INTEL_DCP847SKE is not set
+# CONFIG_BOARD_INTEL_DG41WV is not set
+# CONFIG_BOARD_INTEL_DG43GT is not set
+# CONFIG_BOARD_INTEL_DQ67SW is not set
+# CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set
+# CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set
+# CONFIG_BOARD_INTEL_GLKRVP is not set
+# CONFIG_BOARD_INTEL_HARCUVAR is not set
+# CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
+# CONFIG_BOARD_INTEL_JASPERLAKE_RVP_EXT_EC is not set
+# CONFIG_BOARD_INTEL_KBLRVP3 is not set
+# CONFIG_BOARD_INTEL_KBLRVP7 is not set
+# CONFIG_BOARD_INTEL_KBLRVP8 is not set
+# CONFIG_BOARD_INTEL_KBLRVP11 is not set
+# CONFIG_BOARD_INTEL_KUNIMITSU is not set
+# CONFIG_BOARD_INTEL_LEAFHILL is not set
+# CONFIG_BOARD_INTEL_MINNOW3 is not set
+# CONFIG_BOARD_INTEL_MTLRVP_P is not set
+# CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
+# CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set
+# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
+# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
+# CONFIG_BOARD_INTEL_STRAGO is not set
+# CONFIG_BOARD_INTEL_TGLRVP_UP3 is not set
+# CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
+# CONFIG_BOARD_INTEL_WTM2 is not set
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_512=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_INTEL_HAS_TOP_SWAP=y
+# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
+CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_106CX=y
+CONFIG_CPU_INTEL_SOCKET_441=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+CONFIG_CPU_MICROCODE_CBFS_NONE=y
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_I945=y
+CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_HPET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_LPC47M15X=y
+
+#
+# Embedded Controllers
+#
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
+CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_EDID=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_NULL=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+CONFIG_HAVE_MP_TABLE=y
+CONFIG_HAVE_PIRQ_TABLE=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_MP_TABLE=y
+CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+# CONFIG_DEBUG_PIRQ is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/d945gclf_8mb/target.cfg b/config/coreboot/d945gclf_8mb/target.cfg
new file mode 100644
index 00000000..92e95815
--- /dev/null
+++ b/config/coreboot/d945gclf_8mb/target.cfg
@@ -0,0 +1,7 @@
+tree="default"
+romtype="normal"
+arch="x86_32"
+payload_grub="n"
+payload_grub_withseabios="n"
+payload_seabios="y"
+payload_memtest="n"

From 9606c68c5b5becfb09da45e027e2398e5ff33dfa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Oct 2023 00:50:36 +0000
Subject: [PATCH 0015/1549] fix grub keyboard init on dell e6400 and e6430

also, enable seabios_withgrub on e6400, but not grubfirst;
right now, we also support dgpu which would brick on
grubfirst. on my tested nvidia model, loading grub from
seabios worked, so i'm going to re-add seabios_grubfirst
functionality like in older libreboot revisions, enabled
selectively on a given target.

e6430 currently only has igpu support anyway, but i've done
the same thing there, in anticipation of future dgpu support.

e6400 and e6430 ec report scancode set 2 with translation
by default, but only actually output scancode set 1

grub is trying to use scancode set 2 without scancode
translation, so the key inputs get messed up

fix it by forcing scancode set 2 with translation, but
only on coreboot; other build targets on GRUB will
retain the same behaviour as before

courtesy goes to Nicholas Chin who inspired me, and
helped me to fix this. tested on Nicholas's E6400
and E6430, and my E6400; Riku also tested it on
non-Dell, as did I (some thinkpads), and all seems OK.

The new behaviour in coreboot GRUB is essentially no
different to that of SeaBIOS, which does the same.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/e6400_4mb/target.cfg          |   1 +
 config/coreboot/e6430_12mb/target.cfg         |   1 +
 ...-coreboot-force-scancodes2-translate.patch | 107 ++++++++++++++++++
 3 files changed, 109 insertions(+)
 create mode 100644 config/grub/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch

diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index b5466aef..4cbaf904 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -5,5 +5,6 @@ payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="y"
+payload_seabios_withgrub="y"
 grub_scan_disk="ahci"
 microcode_required="n"
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index 145aa712..7b790a99 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -4,5 +4,6 @@ arch="x86_64"
 payload_grub="n"
 payload_seabios_withgrub="n"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/grub/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
new file mode 100644
index 00000000..21e8630b
--- /dev/null
+++ b/config/grub/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -0,0 +1,107 @@
+From 96c0bbe5d406b616360a7fce7cee67d7692c0d6d Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 30 Oct 2023 22:19:21 +0000
+Subject: [PATCH 1/1] at_keyboard coreboot: force scancodes2+translate
+
+Scan code set 2 with translation should be assumed in
+every case, as the default starting position.
+
+However, GRUB is trying to detect and use other modes
+such as set 2 without translation, or set 1 without
+translation from set 2; it also detects no-mode and
+assumes mode 1, on really old keyboards.
+
+The current behaviour has been retained, for everything
+except GRUB_MACHINE_COREBOOT; for the latter, scan code
+set 2 with translation is hardcoded, and forced in code.
+
+This is required to make keyboard initialisation work on
+the MEC5035 EC used by the Dell Latitude E6400, when
+running GRUB as a coreboot payload on that laptop. The
+EC reports scancode set 2 with translation when probed,
+but actually only outputs scancode set 1.
+
+Since GRUB is attempting to use it without translation,
+and since the machine reports set 2 with translation,
+but only ever outputs set 1 scancodes, this results in
+wrong keypresses for every key.
+
+This fix fixed that, by forcing set 2 with translation,
+treating it as set 1, but only on coreboot. This is the
+same behaviour used in GNU+Linux systems and SeaBIOS.
+With this change, GRUB keyboard initialisation now works
+just fine on those machines.
+
+This has *also* been tested on other coreboot machines
+running GRUB; several HP EliteBooks, ThinkPads and
+Dell Precision T1650. All seems to work just fine.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/term/at_keyboard.c | 20 ++++++++++++++++++--
+ 1 file changed, 18 insertions(+), 2 deletions(-)
+
+diff --git a/grub-core/term/at_keyboard.c b/grub-core/term/at_keyboard.c
+index f8a129eb7..8207225c2 100644
+--- a/grub-core/term/at_keyboard.c
++++ b/grub-core/term/at_keyboard.c
+@@ -138,6 +138,7 @@ write_mode (int mode)
+   return (i != GRUB_AT_TRIES);
+ }
+ 
++#if !defined (GRUB_MACHINE_COREBOOT)
+ static int
+ query_mode (void)
+ {
+@@ -161,10 +162,12 @@ query_mode (void)
+     return 3;
+   return 0;
+ }
++#endif
+ 
+ static void
+ set_scancodes (void)
+ {
++#if !defined (GRUB_MACHINE_COREBOOT)
+   /* You must have visited computer museum. Keyboard without scancode set
+      knowledge. Assume XT. */
+   if (!grub_keyboard_orig_set)
+@@ -173,20 +176,33 @@ set_scancodes (void)
+       ps2_state.current_set = 1;
+       return;
+     }
++#endif
+ 
+ #if !USE_SCANCODE_SET
+   ps2_state.current_set = 1;
+   return;
+-#else
++#endif
+ 
++#if defined (GRUB_MACHINE_COREBOOT)
++  /* enable translation */
++  grub_keyboard_controller_write (grub_keyboard_controller_orig
++				  & ~KEYBOARD_AT_DISABLE);
++#else
++  /* if not coreboot, disable translation and try mode 2 first, before 1 */
+   grub_keyboard_controller_write (grub_keyboard_controller_orig
+ 				  & ~KEYBOARD_AT_TRANSLATE
+ 				  & ~KEYBOARD_AT_DISABLE);
++#endif
+ 
+   keyboard_controller_wait_until_ready ();
+   grub_outb (KEYBOARD_COMMAND_ENABLE, KEYBOARD_REG_DATA);
+-
+   write_mode (2);
++
++#if defined (GRUB_MACHINE_COREBOOT)
++  /* mode 2 with translation, so make grub treat as set 1 */
++  ps2_state.current_set = 1;
++#else
++  /* if not coreboot, translation isn't set; test 2 and fall back to 1 */
+   ps2_state.current_set = query_mode ();
+   grub_dprintf ("atkeyb", "returned set %d\n", ps2_state.current_set);
+   if (ps2_state.current_set == 2)
+-- 
+2.39.2
+

From 29e9c32e32f8e947f51a3efe375dab3ef8e1987e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Oct 2023 08:11:53 +0000
Subject: [PATCH 0016/1549] coreboot/default: use alternative heap size fix

My previous fix to revert didn't fix S3 on GM45, one
of the platforms reported fixed by 78263; I'm merging
that instead, at patch set 10.

It is referenced by 78815/1 which was split from it,
so merge that too (restores overrides of higher values,
on certain platforms that we don't use yet).

https://review.coreboot.org/c/coreboot/+/78623/10
https://review.coreboot.org/c/coreboot/+/78815/1

Accordingly, update configs to match the new default.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../coreboot/d510mo/config/libgfxinit_txtmode |   2 +-
 .../d510mo_16mb/config/libgfxinit_txtmode     |   2 +-
 ...ring-HEAP_SIZE-to-a-common-large-val.patch | 341 ------------------
 ...-default-HEAP_SIZE-from-1-MiB-to-512.patch |  41 +++
 ...HEAP_SIZE-overrides-greater-than-512.patch |  80 ++++
 .../e6400_4mb/config/libgfxinit_corebootfb    |   2 +-
 .../e6400_4mb/config/libgfxinit_txtmode       |   2 +-
 .../e6430_12mb/config/libgfxinit_corebootfb   |   2 +-
 .../e6430_12mb/config/libgfxinit_txtmode      |   2 +-
 .../g43t-am3/config/libgfxinit_txtmode        |   2 +-
 .../g43t-am3_16mb/config/libgfxinit_txtmode   |   2 +-
 .../ga-g41m-es2l/config/libgfxinit_txtmode    |   2 +-
 .../gru_bob/config/libgfxinit_corebootfb      |   2 +-
 .../gru_kevin/config/libgfxinit_corebootfb    |   2 +-
 .../hp2170p_16mb/config/libgfxinit_corebootfb |   2 +-
 .../hp2170p_16mb/config/libgfxinit_txtmode    |   2 +-
 .../hp2560p_8mb/config/libgfxinit_corebootfb  |   2 +-
 .../hp2560p_8mb/config/libgfxinit_txtmode     |   2 +-
 .../hp2570p_16mb/config/libgfxinit_corebootfb |   2 +-
 .../hp2570p_16mb/config/libgfxinit_txtmode    |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../hp8200sff_4mb/config/libgfxinit_txtmode   |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../hp8200sff_8mb/config/libgfxinit_txtmode   |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../hp8300usdt_16mb/config/libgfxinit_txtmode |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../config/libgfxinit_txtmode                 |   2 +-
 .../hp9470m_16mb/config/libgfxinit_corebootfb |   2 +-
 .../hp9470m_16mb/config/libgfxinit_txtmode    |   2 +-
 .../macbook11/config/libgfxinit_corebootfb    |   2 +-
 .../macbook11/config/libgfxinit_txtmode       |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../macbook11_16mb/config/libgfxinit_txtmode  |   2 +-
 .../macbook21/config/libgfxinit_corebootfb    |   2 +-
 .../macbook21/config/libgfxinit_txtmode       |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../macbook21_16mb/config/libgfxinit_txtmode  |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../qemu_x86_12mb/config/libgfxinit_txtmode   |   2 +-
 .../r400_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../r400_16mb/config/libgfxinit_txtmode       |   2 +-
 .../r400_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../r400_4mb/config/libgfxinit_txtmode        |   2 +-
 .../r400_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../r400_8mb/config/libgfxinit_txtmode        |   2 +-
 .../r500_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../r500_4mb/config/libgfxinit_txtmode        |   2 +-
 .../t1650_12mb/config/libgfxinit_txtmode      |   2 +-
 .../t400_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../t400_16mb/config/libgfxinit_txtmode       |   2 +-
 .../t400_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../t400_4mb/config/libgfxinit_txtmode        |   2 +-
 .../t400_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../t400_8mb/config/libgfxinit_txtmode        |   2 +-
 .../t420_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../t420s_8mb/config/libgfxinit_corebootfb    |   2 +-
 .../t420s_8mb/config/libgfxinit_txtmode       |   2 +-
 .../t430_12mb/config/libgfxinit_corebootfb    |   2 +-
 .../t430_12mb/config/libgfxinit_txtmode       |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../t440pmrc_12mb/config/libgfxinit_txtmode   |   2 +-
 .../t500_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../t500_16mb/config/libgfxinit_txtmode       |   2 +-
 .../t500_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../t500_4mb/config/libgfxinit_txtmode        |   2 +-
 .../t500_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../t500_8mb/config/libgfxinit_txtmode        |   2 +-
 .../t520_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../t520_8mb/config/libgfxinit_txtmode        |   2 +-
 .../t530_12mb/config/libgfxinit_corebootfb    |   2 +-
 .../t530_12mb/config/libgfxinit_txtmode       |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../config/libgfxinit_txtmode                 |   2 +-
 .../t60_intelgpu/config/libgfxinit_corebootfb |   2 +-
 .../t60_intelgpu/config/libgfxinit_txtmode    |   2 +-
 .../w500_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../w500_16mb/config/libgfxinit_txtmode       |   2 +-
 .../w500_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../w500_4mb/config/libgfxinit_txtmode        |   2 +-
 .../w500_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../w500_8mb/config/libgfxinit_txtmode        |   2 +-
 .../w530_12mb/config/libgfxinit_corebootfb    |   2 +-
 .../w530_12mb/config/libgfxinit_txtmode       |   2 +-
 .../w541mrc_12mb/config/libgfxinit_corebootfb |   2 +-
 .../w541mrc_12mb/config/libgfxinit_txtmode    |   2 +-
 .../x200_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../x200_16mb/config/libgfxinit_txtmode       |   2 +-
 .../x200_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../x200_4mb/config/libgfxinit_txtmode        |   2 +-
 .../x200_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../x200_8mb/config/libgfxinit_txtmode        |   2 +-
 .../x201_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../x201_8mb/config/libgfxinit_txtmode        |   2 +-
 .../x220_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../x220_8mb/config/libgfxinit_txtmode        |   2 +-
 .../x230_12mb/config/libgfxinit_corebootfb    |   2 +-
 .../x230_12mb/config/libgfxinit_txtmode       |   2 +-
 .../x230_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../x230_16mb/config/libgfxinit_txtmode       |   2 +-
 .../x230edp_12mb/config/libgfxinit_corebootfb |   2 +-
 .../x230edp_12mb/config/libgfxinit_txtmode    |   2 +-
 .../x230t_12mb/config/libgfxinit_corebootfb   |   2 +-
 .../x230t_12mb/config/libgfxinit_txtmode      |   2 +-
 .../x230t_16mb/config/libgfxinit_corebootfb   |   2 +-
 .../x230t_16mb/config/libgfxinit_txtmode      |   2 +-
 .../x301_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../x301_16mb/config/libgfxinit_txtmode       |   2 +-
 .../x301_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../x301_4mb/config/libgfxinit_txtmode        |   2 +-
 .../x301_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../x301_8mb/config/libgfxinit_txtmode        |   2 +-
 .../coreboot/x60/config/libgfxinit_corebootfb |   2 +-
 config/coreboot/x60/config/libgfxinit_txtmode |   2 +-
 .../x60_16mb/config/libgfxinit_corebootfb     |   2 +-
 .../x60_16mb/config/libgfxinit_txtmode        |   2 +-
 117 files changed, 235 insertions(+), 455 deletions(-)
 delete mode 100644 config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
 create mode 100644 config/coreboot/default/patches/0028-Kconfig-Decrease-default-HEAP_SIZE-from-1-MiB-to-512.patch
 create mode 100644 config/coreboot/default/patches/0029-Kconfig-Restore-HEAP_SIZE-overrides-greater-than-512.patch

diff --git a/config/coreboot/d510mo/config/libgfxinit_txtmode b/config/coreboot/d510mo/config/libgfxinit_txtmode
index 906045d8..0650cfe8 100644
--- a/config/coreboot/d510mo/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo/config/libgfxinit_txtmode
@@ -209,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,6 +247,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x80000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
index 0de13433..490e5bb3 100644
--- a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
@@ -209,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,6 +247,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x80000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch b/config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
deleted file mode 100644
index cca8901f..00000000
--- a/config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
+++ /dev/null
@@ -1,341 +0,0 @@
-From f1b5b0051718139cf59ad047d42d1360b8452ec5 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 29 Oct 2023 01:18:50 +0000
-Subject: [PATCH 1/1] Revert "Kconfig: Bring HEAP_SIZE to a common, large
- value"
-
-This reverts commit 44a48ce7a46c36df69f7b2cf3552bf10fa5f61b6.
-
-NOTE:
-
-this is done instead of merging:
-https://review.coreboot.org/c/coreboot/+/78623
-
-which is still under review for now
-
-the patch i'm reverting is this one:
-https://review.coreboot.org/c/coreboot/+/78270
-
-this was actually only merged the day before i
-updated coreboot revs in lbmk to the 12 october rev,
-so there's no harm in quickly reverting this for now
-
-however, later on, we will rely on the other patch
----
- src/Kconfig                                   | 3 ++-
- src/cpu/qemu-x86/Kconfig                      | 3 +++
- src/mainboard/sifive/hifive-unleashed/Kconfig | 3 +++
- src/northbridge/amd/pi/Kconfig                | 4 ++++
- src/soc/amd/picasso/Kconfig                   | 4 ++++
- src/soc/amd/stoneyridge/Kconfig               | 4 ++++
- src/soc/cavium/cn81xx/Kconfig                 | 3 +++
- src/soc/intel/alderlake/Kconfig               | 5 +++++
- src/soc/intel/apollolake/Kconfig              | 4 ++++
- src/soc/intel/cannonlake/Kconfig              | 4 ++++
- src/soc/intel/elkhartlake/Kconfig             | 4 ++++
- src/soc/intel/jasperlake/Kconfig              | 4 ++++
- src/soc/intel/meteorlake/Kconfig              | 5 +++++
- src/soc/intel/skylake/Kconfig                 | 4 ++++
- src/soc/intel/tigerlake/Kconfig               | 4 ++++
- src/soc/intel/xeon_sp/Kconfig                 | 4 ++++
- src/soc/intel/xeon_sp/cpx/Kconfig             | 4 ++++
- src/soc/intel/xeon_sp/skx/Kconfig             | 4 ++++
- src/soc/intel/xeon_sp/spr/Kconfig             | 4 ++++
- src/soc/qualcomm/ipq40xx/Kconfig              | 4 ++++
- 20 files changed, 77 insertions(+), 1 deletion(-)
-
-diff --git a/src/Kconfig b/src/Kconfig
-index ae8024089e..1549719dd0 100644
---- a/src/Kconfig
-+++ b/src/Kconfig
-@@ -751,7 +751,8 @@ config RTC
- 
- config HEAP_SIZE
- 	hex
--	default 0x100000
-+	default 0x100000 if FLATTENED_DEVICE_TREE
-+	default 0x4000
- 
- config STACK_SIZE
- 	hex
-diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
-index 0fa999e1ac..f3e2c4cea9 100644
---- a/src/cpu/qemu-x86/Kconfig
-+++ b/src/cpu/qemu-x86/Kconfig
-@@ -35,4 +35,7 @@ config MAX_CPUS
- 	default 32 if SMM_TSEG
- 	default 4
- 
-+config HEAP_SIZE
-+	default 0x8000
-+
- endif
-diff --git a/src/mainboard/sifive/hifive-unleashed/Kconfig b/src/mainboard/sifive/hifive-unleashed/Kconfig
-index 7bc3b0bcbb..7f9300f2a7 100644
---- a/src/mainboard/sifive/hifive-unleashed/Kconfig
-+++ b/src/mainboard/sifive/hifive-unleashed/Kconfig
-@@ -10,6 +10,9 @@ config BOARD_SPECIFIC_OPTIONS
- 	select FLATTENED_DEVICE_TREE
- 	select SPI_SDCARD
- 
-+config HEAP_SIZE
-+	default 0x10000
-+
- config MAINBOARD_DIR
- 	default "sifive/hifive-unleashed"
- 
-diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
-index 4ffe82a15f..4518db149b 100644
---- a/src/northbridge/amd/pi/Kconfig
-+++ b/src/northbridge/amd/pi/Kconfig
-@@ -29,4 +29,8 @@ config HW_MEM_HOLE_SIZEK
- 	hex
- 	default 0x200000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0xc0000
-+
- endif # NORTHBRIDGE_AMD_PI
-diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
-index c33f287067..796fe4eb13 100644
---- a/src/soc/amd/picasso/Kconfig
-+++ b/src/soc/amd/picasso/Kconfig
-@@ -264,6 +264,10 @@ config S3_VGA_ROM_RUN
- 	bool
- 	default n
- 
-+config HEAP_SIZE
-+	hex
-+	default 0xc0000
-+
- config SERIRQ_CONTINUOUS_MODE
- 	bool
- 	default n
-diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
-index 6ff135e6a8..9af7455bae 100644
---- a/src/soc/amd/stoneyridge/Kconfig
-+++ b/src/soc/amd/stoneyridge/Kconfig
-@@ -152,6 +152,10 @@ config S3_VGA_ROM_RUN
- 	bool
- 	default n
- 
-+config HEAP_SIZE
-+	hex
-+	default 0xc0000
-+
- config EHCI_BAR
- 	hex
- 	default 0xfef00000
-diff --git a/src/soc/cavium/cn81xx/Kconfig b/src/soc/cavium/cn81xx/Kconfig
-index 77ca97202b..368581f8f1 100644
---- a/src/soc/cavium/cn81xx/Kconfig
-+++ b/src/soc/cavium/cn81xx/Kconfig
-@@ -30,6 +30,9 @@ config ARCH_ARMV8_EXTENSION
- 	int
- 	default 1
- 
-+config HEAP_SIZE
-+	default 0x10000
-+
- config STACK_SIZE
- 	default 0x2000
- 
-diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
-index 4b960c1d22..82ec8f263e 100644
---- a/src/soc/intel/alderlake/Kconfig
-+++ b/src/soc/intel/alderlake/Kconfig
-@@ -215,6 +215,11 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x400000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000 if BMP_LOGO
-+	default 0x10000
-+
- config GFX_GMA_DEFAULT_MMIO
- 	default 0xaf000000 if MAINBOARD_HAS_EARLY_LIBGFXINIT
- 
-diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
-index 78ec2987ce..bce935d800 100644
---- a/src/soc/intel/apollolake/Kconfig
-+++ b/src/soc/intel/apollolake/Kconfig
-@@ -252,6 +252,10 @@ config IFWI_FILE_NAME
- 	help
- 	  Name of file to store in the IFWI region.
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- config MAX_ROOT_PORTS
- 	int
- 	default 6
-diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
-index a42a3c365b..80237f9810 100644
---- a/src/soc/intel/cannonlake/Kconfig
-+++ b/src/soc/intel/cannonlake/Kconfig
-@@ -160,6 +160,10 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x400000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- config NHLT_DMIC_1CH_16B
- 	bool
- 	depends on ACPI_NHLT
-diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
-index 3361c0ddb9..7f1c767379 100644
---- a/src/soc/intel/elkhartlake/Kconfig
-+++ b/src/soc/intel/elkhartlake/Kconfig
-@@ -104,6 +104,10 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x0
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- config MAX_ROOT_PORTS
- 	int
- 	default 7
-diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
-index 3d84991e09..ff5def3263 100644
---- a/src/soc/intel/jasperlake/Kconfig
-+++ b/src/soc/intel/jasperlake/Kconfig
-@@ -106,6 +106,10 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x400000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- config MAX_ROOT_PORTS
- 	int
- 	default 8
-diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
-index 590e8b80e1..48030a1911 100644
---- a/src/soc/intel/meteorlake/Kconfig
-+++ b/src/soc/intel/meteorlake/Kconfig
-@@ -197,6 +197,11 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x400000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000 if BMP_LOGO
-+	default 0x10000
-+
- # Intel recommends reserving the PCIe TBT root port resources as below:
- # - 42 buses
- # - 194 MiB Non-prefetchable memory
-diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
-index e0df501460..d6a11363ee 100644
---- a/src/soc/intel/skylake/Kconfig
-+++ b/src/soc/intel/skylake/Kconfig
-@@ -151,6 +151,10 @@ config EXCLUDE_NATIVE_SD_INTERFACE
- 	help
- 	  If you set this option to n, will not use native SD controller.
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config IED_REGION_SIZE
- 	hex
- 	default 0x400000
-diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
-index c07a0d8365..0a4b7bfdb8 100644
---- a/src/soc/intel/tigerlake/Kconfig
-+++ b/src/soc/intel/tigerlake/Kconfig
-@@ -152,6 +152,10 @@ config IED_REGION_SIZE
- config INTEL_TME
- 	default n
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x10000
-+
- config MAX_ROOT_PORTS
- 	int
- 	default 24 if SOC_INTEL_TIGERLAKE_PCH_H
-diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
-index e63bee5451..63ced01067 100644
---- a/src/soc/intel/xeon_sp/Kconfig
-+++ b/src/soc/intel/xeon_sp/Kconfig
-@@ -91,6 +91,10 @@ config ECAM_MMCONF_BASE_ADDRESS
- config ECAM_MMCONF_BUS_NUMBER
- 	default 256
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config HPET_MIN_TICKS
- 	hex
- 	default 0x80
-diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig
-index ac166c3038..f54f7716b6 100644
---- a/src/soc/intel/xeon_sp/cpx/Kconfig
-+++ b/src/soc/intel/xeon_sp/cpx/Kconfig
-@@ -71,6 +71,10 @@ config CPU_MICROCODE_CBFS_LEN
- 	hex
- 	default 0x7C00
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config STACK_SIZE
- 	hex
- 	default 0x4000
-diff --git a/src/soc/intel/xeon_sp/skx/Kconfig b/src/soc/intel/xeon_sp/skx/Kconfig
-index 5d843878e1..c2c3d4e2e8 100644
---- a/src/soc/intel/xeon_sp/skx/Kconfig
-+++ b/src/soc/intel/xeon_sp/skx/Kconfig
-@@ -55,6 +55,10 @@ config CPU_MICROCODE_CBFS_LEN
- 	hex
- 	default 0x7C00
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config IED_REGION_SIZE
- 	hex
- 	default 0x400000
-diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig
-index 43b87ade14..b1c4c783b7 100644
---- a/src/soc/intel/xeon_sp/spr/Kconfig
-+++ b/src/soc/intel/xeon_sp/spr/Kconfig
-@@ -79,6 +79,10 @@ config CPU_MICROCODE_CBFS_LEN
- 	hex
- 	default 0x8c00
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config STACK_SIZE
- 	hex
- 	default 0x4000
-diff --git a/src/soc/qualcomm/ipq40xx/Kconfig b/src/soc/qualcomm/ipq40xx/Kconfig
-index 0ce92731c0..0eabb00752 100644
---- a/src/soc/qualcomm/ipq40xx/Kconfig
-+++ b/src/soc/qualcomm/ipq40xx/Kconfig
-@@ -57,4 +57,8 @@ config SBL_UTIL_PATH
- 	help
- 	  Path for utils to combine SBL_ELF and bootblock
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- endif
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0028-Kconfig-Decrease-default-HEAP_SIZE-from-1-MiB-to-512.patch b/config/coreboot/default/patches/0028-Kconfig-Decrease-default-HEAP_SIZE-from-1-MiB-to-512.patch
new file mode 100644
index 00000000..31e86e86
--- /dev/null
+++ b/config/coreboot/default/patches/0028-Kconfig-Decrease-default-HEAP_SIZE-from-1-MiB-to-512.patch
@@ -0,0 +1,41 @@
+From 7eda35a9b63d070ede24b32253855ce07c6c7d13 Mon Sep 17 00:00:00 2001
+From: Bill XIE <persmule@hardenedlinux.org>
+Date: Tue, 24 Oct 2023 13:56:16 +0800
+Subject: [PATCH 1/2] Kconfig: Decrease default HEAP_SIZE from 1 MiB to 512 KiB
+
+Commit 44a48ce7a46c ("Kconfig: Bring HEAP_SIZE to a common, large
+value") breaks S3 resume from TSEG stage cache on many platforms,
+including GM45 and Ivy Bridge, so limit it to 512 KiB.
+
+Please test this against other platforms before merging!
+
+Tested: Setting it to 0x80000 results a working S3 resume on Thinkpad
+	X200 and T430, with log in cbmem for S3 resume, while 0xa0000
+	breaks it. coreboot log during failed resume when (HEAP_SIZE
+	>= 0xa0000) cannot be obtained from EHCI debug, while log in
+	cbmem shows that ramstage is failed to be found in TSEG stage
+	cache, as shown in https://ticket.coreboot.org/issues/512 .
+
+Resolves: https://ticket.coreboot.org/issues/512
+Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
+Change-Id: Ib1de1eb8487df5bdf004e544d40667833a291515
+---
+ src/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/Kconfig b/src/Kconfig
+index ae8024089e..6db0736715 100644
+--- a/src/Kconfig
++++ b/src/Kconfig
+@@ -751,7 +751,7 @@ config RTC
+ 
+ config HEAP_SIZE
+ 	hex
+-	default 0x100000
++	default 0x80000
+ 
+ config STACK_SIZE
+ 	hex
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0029-Kconfig-Restore-HEAP_SIZE-overrides-greater-than-512.patch b/config/coreboot/default/patches/0029-Kconfig-Restore-HEAP_SIZE-overrides-greater-than-512.patch
new file mode 100644
index 00000000..2bfd8783
--- /dev/null
+++ b/config/coreboot/default/patches/0029-Kconfig-Restore-HEAP_SIZE-overrides-greater-than-512.patch
@@ -0,0 +1,80 @@
+From 012a72b4acfe19f4456f203f2378f98d00646122 Mon Sep 17 00:00:00 2001
+From: Bill XIE <persmule@hardenedlinux.org>
+Date: Tue, 31 Oct 2023 00:12:02 +0800
+Subject: [PATCH 2/2] Kconfig: Restore HEAP_SIZE overrides greater than 512 KiB
+
+Commit 44a48ce7a46c ("Kconfig: Bring HEAP_SIZE to a common, large
+value") breaks S3 resume from TSEG stage cache on many platforms,
+including GM45 and Ivy Bridge.
+
+Now the default value becomes 512 KiB, but a few platforms have
+greater value before commit 44a48ce7a46c. This commit is to restore
+them.
+
+Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
+Change-Id: I78cd56b0683dd2ef94319a98a720f2da58151626
+---
+ src/Kconfig                     | 1 +
+ src/northbridge/amd/pi/Kconfig  | 4 ++++
+ src/soc/amd/picasso/Kconfig     | 4 ++++
+ src/soc/amd/stoneyridge/Kconfig | 4 ++++
+ 4 files changed, 13 insertions(+)
+
+diff --git a/src/Kconfig b/src/Kconfig
+index 6db0736715..24bd1469e0 100644
+--- a/src/Kconfig
++++ b/src/Kconfig
+@@ -751,6 +751,7 @@ config RTC
+ 
+ config HEAP_SIZE
+ 	hex
++	default 0x100000 if FLATTENED_DEVICE_TREE
+ 	default 0x80000
+ 
+ config STACK_SIZE
+diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
+index 4ffe82a15f..4518db149b 100644
+--- a/src/northbridge/amd/pi/Kconfig
++++ b/src/northbridge/amd/pi/Kconfig
+@@ -29,4 +29,8 @@ config HW_MEM_HOLE_SIZEK
+ 	hex
+ 	default 0x200000
+ 
++config HEAP_SIZE
++	hex
++	default 0xc0000
++
+ endif # NORTHBRIDGE_AMD_PI
+diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
+index c33f287067..796fe4eb13 100644
+--- a/src/soc/amd/picasso/Kconfig
++++ b/src/soc/amd/picasso/Kconfig
+@@ -264,6 +264,10 @@ config S3_VGA_ROM_RUN
+ 	bool
+ 	default n
+ 
++config HEAP_SIZE
++	hex
++	default 0xc0000
++
+ config SERIRQ_CONTINUOUS_MODE
+ 	bool
+ 	default n
+diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
+index 6ff135e6a8..9af7455bae 100644
+--- a/src/soc/amd/stoneyridge/Kconfig
++++ b/src/soc/amd/stoneyridge/Kconfig
+@@ -152,6 +152,10 @@ config S3_VGA_ROM_RUN
+ 	bool
+ 	default n
+ 
++config HEAP_SIZE
++	hex
++	default 0xc0000
++
+ config EHCI_BAR
+ 	hex
+ 	default 0xfef00000
+-- 
+2.39.2
+
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
index ca0b6f8d..3405ba9a 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
@@ -171,7 +171,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -214,6 +213,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 # CONFIG_VGA_BIOS_SECOND is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
index b2ee3e81..6120aa0c 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
@@ -169,7 +169,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -212,6 +211,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 # CONFIG_VGA_BIOS_SECOND is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 4200763e..f72e0f53 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -171,7 +171,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -214,6 +213,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index b349d6e4..58ffa771 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -169,7 +169,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -212,6 +211,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/g43t-am3/config/libgfxinit_txtmode b/config/coreboot/g43t-am3/config/libgfxinit_txtmode
index 70107660..e8426ac9 100644
--- a/config/coreboot/g43t-am3/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t-am3/config/libgfxinit_txtmode
@@ -165,7 +165,6 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -205,6 +204,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode b/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
index 20d12908..cb67f636 100644
--- a/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
@@ -165,7 +165,6 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -205,6 +204,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode b/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
index 61b25a92..c31dd4cc 100644
--- a/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
+++ b/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
@@ -172,7 +172,6 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -212,6 +211,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/gru_bob/config/libgfxinit_corebootfb b/config/coreboot/gru_bob/config/libgfxinit_corebootfb
index 9502be12..8c8ee24c 100644
--- a/config/coreboot/gru_bob/config/libgfxinit_corebootfb
+++ b/config/coreboot/gru_bob/config/libgfxinit_corebootfb
@@ -675,7 +675,6 @@ CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_DRIVER_TPM_SPI_CHIP=0
 # CONFIG_TPM_MEASURED_BOOT is not set
@@ -705,6 +704,7 @@ CONFIG_ROM_SIZE=0x00800000
 # SoC
 #
 CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_ARM64_BL31_EXTERNAL_FILE=""
 CONFIG_ARCH_ARMV8_EXTENSION=0
 CONFIG_STACK_SIZE=0x0
diff --git a/config/coreboot/gru_kevin/config/libgfxinit_corebootfb b/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
index cf36cf35..17ea0504 100644
--- a/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
+++ b/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
@@ -675,7 +675,6 @@ CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -704,6 +703,7 @@ CONFIG_ROM_SIZE=0x00800000
 # SoC
 #
 CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_ARM64_BL31_EXTERNAL_FILE=""
 CONFIG_ARCH_ARMV8_EXTENSION=0
 CONFIG_STACK_SIZE=0x0
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
index 689ae998..44b24c53 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
@@ -193,7 +193,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -237,6 +236,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
index fbfb8926..523487d9 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
@@ -191,7 +191,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -235,6 +234,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
index 55b3d3c5..428ea214 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
@@ -190,7 +190,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -234,6 +233,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
index 09771a52..255a8dc5 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
@@ -188,7 +188,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -232,6 +231,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
index d09b6d0f..8fc885d5 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
@@ -189,7 +189,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -233,6 +232,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
index a980aa21..5cc6f49f 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
@@ -187,7 +187,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -231,6 +230,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
index 12766f42..3e6b75e5 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
@@ -188,7 +188,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -230,6 +229,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
index f7f90bee..e7a8aaa0 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
@@ -186,7 +186,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -228,6 +227,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
index a3133a98..3410065e 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
@@ -188,7 +188,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -230,6 +229,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
index f5955b65..ac3cfc3c 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
@@ -186,7 +186,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -228,6 +227,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
index f772cc1d..1cbf618f 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
@@ -189,7 +189,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -231,6 +230,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
index 6da85d0f..66c6d5ae 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
@@ -187,7 +187,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -229,6 +228,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
index b53d32a4..99bb8a36 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
@@ -192,7 +192,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -236,6 +235,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
index 20917409..0c169dde 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
@@ -190,7 +190,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -234,6 +233,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
index f4be5b80..7b49bc67 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
@@ -190,7 +190,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -234,6 +233,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
index 9bc78e3e..98048758 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
@@ -188,7 +188,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -232,6 +231,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/macbook11/config/libgfxinit_corebootfb b/config/coreboot/macbook11/config/libgfxinit_corebootfb
index 2079b949..8f402931 100644
--- a/config/coreboot/macbook11/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11/config/libgfxinit_corebootfb
@@ -162,7 +162,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -203,6 +202,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/macbook11/config/libgfxinit_txtmode b/config/coreboot/macbook11/config/libgfxinit_txtmode
index 8b8162dd..a0badd72 100644
--- a/config/coreboot/macbook11/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11/config/libgfxinit_txtmode
@@ -162,7 +162,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -203,6 +202,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
index 6a65c773..0b62b399 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
@@ -161,7 +161,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -202,6 +201,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
index 57f50bd7..078c1cc6 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
@@ -161,7 +161,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -202,6 +201,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/macbook21/config/libgfxinit_corebootfb b/config/coreboot/macbook21/config/libgfxinit_corebootfb
index 212570fb..bb354148 100644
--- a/config/coreboot/macbook21/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21/config/libgfxinit_corebootfb
@@ -162,7 +162,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -203,6 +202,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/macbook21/config/libgfxinit_txtmode b/config/coreboot/macbook21/config/libgfxinit_txtmode
index 263be92a..95736716 100644
--- a/config/coreboot/macbook21/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21/config/libgfxinit_txtmode
@@ -162,7 +162,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -203,6 +202,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
index 93617181..8c7a74fd 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
@@ -161,7 +161,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -202,6 +201,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
index 2e2250f9..3a4e8b71 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
@@ -161,7 +161,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -202,6 +201,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
index 45c86d25..a62b7ca4 100644
--- a/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
@@ -143,7 +143,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -171,6 +170,7 @@ CONFIG_ROM_SIZE=0x00c00000
 # SoC
 #
 CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_ARM64_BL31_EXTERNAL_FILE=""
 CONFIG_ARCH_ARMV8_EXTENSION=0
 CONFIG_STACK_SIZE=0x0
diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
index f0b31134..fad4ba90 100644
--- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
@@ -162,7 +162,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x8000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -194,6 +193,7 @@ CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
index 29ae73a3..9424c242 100644
--- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
@@ -162,7 +162,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x8000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -194,6 +193,7 @@ CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
index 63b44a69..29d663db 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_txtmode b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
index bb19fd9b..5297b342 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
index b7decbd2..84221206 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_txtmode b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
index 656f107b..9c85e14c 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
index d49a3972..ea721218 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_txtmode b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
index 752834de..b6c9e8c9 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
index 2a88b6a7..64ce998e 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
@@ -206,7 +206,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,6 +247,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_txtmode b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
index d394be0b..dc0f1999 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
@@ -204,7 +204,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,6 +245,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index abdaf78f..3af81d36 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -179,7 +179,6 @@ CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -221,6 +220,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
index 4b4fd04d..8dae5e14 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_txtmode b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
index f2a79cb8..baffe767 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
index 9f386395..949dca66 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_txtmode b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
index ead9d8bb..36237e81 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
index 7dcbcd15..7a50edcf 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_txtmode b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
index 1cd7ff53..aa329d1c 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
index 10d9d386..8fdc51c0 100644
--- a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
@@ -210,7 +210,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -254,6 +253,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
index fb1594f7..5c2427f8 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
@@ -210,7 +210,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -254,6 +253,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
index b1bc0f86..74c3f515 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
@@ -208,7 +208,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -252,6 +251,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
index ad8cb2ac..b7c7ee66 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
@@ -210,7 +210,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -254,6 +253,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_txtmode b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
index 1137ca48..8f010877 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
@@ -208,7 +208,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -252,6 +251,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
index 20dd493d..985c9673 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -250,6 +249,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
index 6e4620d4..30375c72 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -248,6 +247,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
index ad2a751d..50de0e81 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_txtmode b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
index 10983d6a..10731ef0 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
index fddd15a8..9e3e882f 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_txtmode b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
index acf00c66..2c6e441e 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
index e0de6f92..a0ce9b20 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_txtmode b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
index ec45dea3..72755817 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
index 55cb7648..f46285b3 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
@@ -211,7 +211,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -255,6 +254,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_txtmode b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
index 90668c1a..0accc91c 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
@@ -209,7 +209,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -253,6 +252,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
index 0b85402f..351d73ea 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
@@ -211,7 +211,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -255,6 +254,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_txtmode b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
index 03b649eb..f66e4615 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
@@ -209,7 +209,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -253,6 +252,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
index 1a2d21ec..79f7c0d7 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
@@ -199,7 +199,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -240,6 +239,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
index d12a227e..8a99fe3d 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
@@ -199,7 +199,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -240,6 +239,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
index b9b594af..5bfa3776 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
@@ -199,7 +199,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -240,6 +239,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
index a9ed3cf7..8f25c1ab 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
@@ -199,7 +199,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -240,6 +239,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
index c79477f7..2560e36d 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_txtmode b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
index f23032f0..807b4989 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
index bf7c0872..2083b715 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_txtmode b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
index e0fb23a9..fc603bd6 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
index 567bb2aa..f460cf02 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_txtmode b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
index 1571ab67..33a70a1f 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
index 7dc5db5d..981142a7 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
@@ -211,7 +211,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -255,6 +254,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_txtmode b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
index 1e4c335c..4d3e0cae 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
@@ -209,7 +209,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -253,6 +252,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
index deb9247a..281db751 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -250,6 +249,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
index 583b2030..625a7082 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -248,6 +247,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
index 7689f011..66d976c4 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_txtmode b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
index 3906b3e8..53fe5457 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
index 840fddbf..186ba13a 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_txtmode b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
index 934901c2..7002841a 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
index e81f2400..d26b1cdb 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_txtmode b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
index b4d0c722..6bd53772 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x201_8mb/config/libgfxinit_corebootfb b/config/coreboot/x201_8mb/config/libgfxinit_corebootfb
index 8fb6cb51..825e68ec 100644
--- a/config/coreboot/x201_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x201_8mb/config/libgfxinit_corebootfb
@@ -208,7 +208,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -252,6 +251,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x201_8mb/config/libgfxinit_txtmode b/config/coreboot/x201_8mb/config/libgfxinit_txtmode
index 5171a640..dd7c154a 100644
--- a/config/coreboot/x201_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x201_8mb/config/libgfxinit_txtmode
@@ -206,7 +206,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -250,6 +249,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
index 874065c6..34f6c36e 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
@@ -211,7 +211,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -255,6 +254,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_txtmode b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
index 7b8dc487..e802262f 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
@@ -209,7 +209,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -253,6 +252,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
index cbeec04c..eeefec9e 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
@@ -211,7 +211,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -255,6 +254,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_txtmode b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
index 408e9235..50d1b2c7 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
@@ -209,7 +209,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -253,6 +252,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
index 711c54f9..333a581d 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
@@ -211,7 +211,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -255,6 +254,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_txtmode b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
index 424bfd01..4ee86042 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
@@ -209,7 +209,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -253,6 +252,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
index f7383688..9869ce01 100644
--- a/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
@@ -212,7 +212,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -256,6 +255,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode b/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
index 6238a584..758b2ab9 100644
--- a/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
@@ -210,7 +210,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -254,6 +253,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
index d8ce139d..89b4af02 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
@@ -211,7 +211,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -255,6 +254,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
index 32bac7d0..8ab4dc37 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
@@ -209,7 +209,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -253,6 +252,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
index 09ab225d..0a2e7549 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
@@ -211,7 +211,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -255,6 +254,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
index ae3ea2c1..9c725691 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
@@ -209,7 +209,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -253,6 +252,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
index fe496a15..6e777e04 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_txtmode b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
index 1ea9f8a0..08185a0f 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
index fe7ce82f..1e1176c3 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_txtmode b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
index f2b3090c..dc4a0914 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
index 09303210..0b2c1d7b 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
@@ -207,7 +207,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -249,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_txtmode b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
index cadfb78c..084ea5b7 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
@@ -205,7 +205,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,6 +246,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x60/config/libgfxinit_corebootfb b/config/coreboot/x60/config/libgfxinit_corebootfb
index ef73cea7..a516c441 100644
--- a/config/coreboot/x60/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60/config/libgfxinit_corebootfb
@@ -200,7 +200,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -241,6 +240,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x60/config/libgfxinit_txtmode b/config/coreboot/x60/config/libgfxinit_txtmode
index ec716f1f..b40bbec1 100644
--- a/config/coreboot/x60/config/libgfxinit_txtmode
+++ b/config/coreboot/x60/config/libgfxinit_txtmode
@@ -200,7 +200,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -241,6 +240,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
index 52c5b74c..e2515d21 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
@@ -200,7 +200,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -241,6 +240,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_txtmode b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
index bcf50426..4f892ccc 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
@@ -200,7 +200,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -241,6 +240,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000

From 026d57fff45b4649b5a2548faeea346141f3d6eb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Oct 2023 10:36:16 +0000
Subject: [PATCH 0017/1549] GRUB: don't spew "Unknown key 0xff" in error

Faulty keyboards make GRUB unusable. Normally it happens
when a user plugs in a faulty USB keyboard, but if it's
the laptop keyboard, then GRUB becomes unusable and the
user cannot boot anything.

So, your laptop keyboard is a ticking timebomb if you use
GRUB; with this patch, that's no longer the case.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...outs-don-t-print-Unknown-key-message.patch | 38 +++++++++++++++++++
 1 file changed, 38 insertions(+)
 create mode 100644 config/grub/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch

diff --git a/config/grub/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
new file mode 100644
index 00000000..fbef86a4
--- /dev/null
+++ b/config/grub/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
@@ -0,0 +1,38 @@
+From 0a6abeb40ac4284fbff6ef5958989d561b6290a7 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 31 Oct 2023 10:33:28 +0000
+Subject: [PATCH 1/1] keylayouts: don't print "Unknown key" message
+
+on keyboards with stuck keys, this results in GRUB just
+spewing it repeatedly, preventing use of GRUB.
+
+in such cases, it's still possible to use the keyboard,
+and we should let the user at least boot.
+
+it often appears when people plug in faulty usb keyboards,
+but can appear for laptop keyboards too; one of my e6400
+has stuck keys.
+
+with this patch, grub should be a bit more reliable in
+terms of user experience, when the keyboard is faulty.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/commands/keylayouts.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/grub-core/commands/keylayouts.c b/grub-core/commands/keylayouts.c
+index aa3ba34f2..445fa0601 100644
+--- a/grub-core/commands/keylayouts.c
++++ b/grub-core/commands/keylayouts.c
+@@ -174,7 +174,6 @@ grub_term_map_key (grub_keyboard_key_t code, int status)
+   key = map_key_core (code, status, &alt_gr_consumed);
+ 
+   if (key == 0 || key == GRUB_TERM_SHIFT) {
+-    grub_printf ("Unknown key 0x%x detected\n", code);
+     return GRUB_TERM_NO_KEY;
+   }
+ 
+-- 
+2.39.2
+

From 91faeb8d091070d2eee61934e9e77b03221ba2dc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Oct 2023 18:26:03 +0000
Subject: [PATCH 0018/1549] crank up vram allocation on more intel boards

it's preferable that the vram setting be as high as
feasible, for users. we overlooked this on some
newer platforms that were added, over several
releases. these levels won't offend most users,
and people who want less can always turn it down

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...vram-allocation-on-more-intel-boards.patch | 142 ++++++++++++++++++
 1 file changed, 142 insertions(+)
 create mode 100644 config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch

diff --git a/config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch b/config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
new file mode 100644
index 00000000..afce453d
--- /dev/null
+++ b/config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
@@ -0,0 +1,142 @@
+From 0721e7e984bc83861bce3d47632b717848673749 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 31 Oct 2023 18:24:39 +0000
+Subject: [PATCH 1/1] crank up vram allocation on more intel boards
+
+these were added to libreboot, and it's a policy of
+libreboot to max out the vram settings. this was
+overlooked, in prior revisions and releases.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/mainboard/dell/e6400/cmos.default                | 2 +-
+ src/mainboard/dell/snb_ivb_workstations/cmos.default | 2 +-
+ src/mainboard/hp/compaq_8200_elite_sff/cmos.default  | 2 +-
+ src/mainboard/hp/compaq_elite_8300_usdt/cmos.default | 2 +-
+ src/mainboard/hp/snb_ivb_laptops/cmos.default        | 1 +
+ src/mainboard/lenovo/t420/cmos.default               | 1 +
+ src/mainboard/lenovo/t420s/cmos.default              | 1 +
+ src/mainboard/lenovo/t430/cmos.default               | 1 +
+ src/mainboard/lenovo/t520/cmos.default               | 1 +
+ src/mainboard/lenovo/t530/cmos.default               | 1 +
+ src/mainboard/lenovo/x201/cmos.default               | 1 +
+ src/mainboard/lenovo/x220/cmos.default               | 1 +
+ 12 files changed, 12 insertions(+), 4 deletions(-)
+
+diff --git a/src/mainboard/dell/e6400/cmos.default b/src/mainboard/dell/e6400/cmos.default
+index eeb6f47364..25dfa38cb5 100644
+--- a/src/mainboard/dell/e6400/cmos.default
++++ b/src/mainboard/dell/e6400/cmos.default
+@@ -2,4 +2,4 @@ boot_option=Fallback
+ debug_level=Debug
+ power_on_after_fail=Disable
+ sata_mode=AHCI
+-gfx_uma_size=32M
++gfx_uma_size=256M
+diff --git a/src/mainboard/dell/snb_ivb_workstations/cmos.default b/src/mainboard/dell/snb_ivb_workstations/cmos.default
+index ccc7e64625..7c97b84baf 100644
+--- a/src/mainboard/dell/snb_ivb_workstations/cmos.default
++++ b/src/mainboard/dell/snb_ivb_workstations/cmos.default
+@@ -3,5 +3,5 @@ debug_level=Debug
+ power_on_after_fail=Disable
+ nmi=Enable
+ sata_mode=AHCI
+-gfx_uma_size=128M
++gfx_uma_size=224M
+ fan_full_speed=Disable
+diff --git a/src/mainboard/hp/compaq_8200_elite_sff/cmos.default b/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
+index 6d27a79c66..4517ffc7c2 100644
+--- a/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
++++ b/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
+@@ -3,5 +3,5 @@ debug_level=Debug
+ power_on_after_fail=Enable
+ nmi=Enable
+ sata_mode=AHCI
+-gfx_uma_size=32M
++gfx_uma_size=224M
+ psu_fan_lvl=3
+diff --git a/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default b/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
+index 6f3cec735e..9fc4db2990 100644
+--- a/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
++++ b/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
+@@ -3,4 +3,4 @@ debug_level=Debug
+ power_on_after_fail=Enable
+ nmi=Enable
+ sata_mode=AHCI
+-gfx_uma_size=32M
++gfx_uma_size=224M
+diff --git a/src/mainboard/hp/snb_ivb_laptops/cmos.default b/src/mainboard/hp/snb_ivb_laptops/cmos.default
+index ad822d5043..89418a4cfc 100644
+--- a/src/mainboard/hp/snb_ivb_laptops/cmos.default
++++ b/src/mainboard/hp/snb_ivb_laptops/cmos.default
+@@ -3,3 +3,4 @@ debug_level=Debug
+ power_on_after_fail=Disable
+ nmi=Enable
+ sata_mode=AHCI
++gfx_uma_size=224M
+diff --git a/src/mainboard/lenovo/t420/cmos.default b/src/mainboard/lenovo/t420/cmos.default
+index c011867916..83f590d39d 100644
+--- a/src/mainboard/lenovo/t420/cmos.default
++++ b/src/mainboard/lenovo/t420/cmos.default
+@@ -15,3 +15,4 @@ trackpoint=Enable
+ hybrid_graphics_mode=Integrated Only
+ usb_always_on=Disable
+ me_state=Disabled
++gfx_uma_size=224M
+diff --git a/src/mainboard/lenovo/t420s/cmos.default b/src/mainboard/lenovo/t420s/cmos.default
+index c011867916..83f590d39d 100644
+--- a/src/mainboard/lenovo/t420s/cmos.default
++++ b/src/mainboard/lenovo/t420s/cmos.default
+@@ -15,3 +15,4 @@ trackpoint=Enable
+ hybrid_graphics_mode=Integrated Only
+ usb_always_on=Disable
+ me_state=Disabled
++gfx_uma_size=224M
+diff --git a/src/mainboard/lenovo/t430/cmos.default b/src/mainboard/lenovo/t430/cmos.default
+index 55e1e6c04e..a72108f47e 100644
+--- a/src/mainboard/lenovo/t430/cmos.default
++++ b/src/mainboard/lenovo/t430/cmos.default
+@@ -16,3 +16,4 @@ backlight=Both
+ usb_always_on=Disable
+ hybrid_graphics_mode=Integrated Only
+ me_state=Disabled
++gfx_uma_size=224M
+diff --git a/src/mainboard/lenovo/t520/cmos.default b/src/mainboard/lenovo/t520/cmos.default
+index b66f7034dc..a73ea6e9ee 100644
+--- a/src/mainboard/lenovo/t520/cmos.default
++++ b/src/mainboard/lenovo/t520/cmos.default
+@@ -16,3 +16,4 @@ backlight=Both
+ hybrid_graphics_mode=Integrated Only
+ usb_always_on=Disable
+ me_state=Disabled
++gfx_uma_size=224M
+diff --git a/src/mainboard/lenovo/t530/cmos.default b/src/mainboard/lenovo/t530/cmos.default
+index b66f7034dc..a73ea6e9ee 100644
+--- a/src/mainboard/lenovo/t530/cmos.default
++++ b/src/mainboard/lenovo/t530/cmos.default
+@@ -16,3 +16,4 @@ backlight=Both
+ hybrid_graphics_mode=Integrated Only
+ usb_always_on=Disable
+ me_state=Disabled
++gfx_uma_size=224M
+diff --git a/src/mainboard/lenovo/x201/cmos.default b/src/mainboard/lenovo/x201/cmos.default
+index 2cf484fd5a..46294d91ca 100644
+--- a/src/mainboard/lenovo/x201/cmos.default
++++ b/src/mainboard/lenovo/x201/cmos.default
+@@ -15,3 +15,4 @@ power_management_beeps=Enable
+ low_battery_beep=Enable
+ sata_mode=AHCI
+ usb_always_on=Disable
++gfx_uma_size=128M
+diff --git a/src/mainboard/lenovo/x220/cmos.default b/src/mainboard/lenovo/x220/cmos.default
+index 52f303dfdb..92a2026542 100644
+--- a/src/mainboard/lenovo/x220/cmos.default
++++ b/src/mainboard/lenovo/x220/cmos.default
+@@ -14,3 +14,4 @@ fn_ctrl_swap=Disable
+ sticky_fn=Disable
+ trackpoint=Enable
+ me_state=Disabled
++gfx_uma_size=224M
+-- 
+2.39.2
+

From d218088d8b9164d5349ebcfcc744ea4c48399cc1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Oct 2023 19:02:04 +0000
Subject: [PATCH 0019/1549] coreboot/all: disable TSEG stage cache

this is to work around recent s3 suspend/resume issues

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/d510mo/config/libgfxinit_txtmode              | 4 ++--
 config/coreboot/d510mo_16mb/config/libgfxinit_txtmode         | 4 ++--
 config/coreboot/e6400_4mb/config/libgfxinit_corebootfb        | 4 ++--
 config/coreboot/e6400_4mb/config/libgfxinit_txtmode           | 4 ++--
 config/coreboot/e6430_12mb/config/libgfxinit_corebootfb       | 4 ++--
 config/coreboot/e6430_12mb/config/libgfxinit_txtmode          | 4 ++--
 config/coreboot/g43t-am3/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode       | 4 ++--
 config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode        | 4 ++--
 config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb     | 4 ++--
 config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode        | 4 ++--
 config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb      | 4 ++--
 config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode         | 4 ++--
 config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb     | 4 ++--
 config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode        | 4 ++--
 config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb    | 4 ++--
 config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode       | 4 ++--
 config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb    | 4 ++--
 config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode       | 4 ++--
 config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb  | 4 ++--
 config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode     | 4 ++--
 .../coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb   | 4 ++--
 config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode   | 4 ++--
 config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb     | 4 ++--
 config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode        | 4 ++--
 config/coreboot/macbook11/config/libgfxinit_corebootfb        | 4 ++--
 config/coreboot/macbook11/config/libgfxinit_txtmode           | 4 ++--
 config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb   | 4 ++--
 config/coreboot/macbook11_16mb/config/libgfxinit_txtmode      | 4 ++--
 config/coreboot/macbook21/config/libgfxinit_corebootfb        | 4 ++--
 config/coreboot/macbook21/config/libgfxinit_txtmode           | 4 ++--
 config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb   | 4 ++--
 config/coreboot/macbook21_16mb/config/libgfxinit_txtmode      | 4 ++--
 config/coreboot/r400_16mb/config/libgfxinit_corebootfb        | 4 ++--
 config/coreboot/r400_16mb/config/libgfxinit_txtmode           | 4 ++--
 config/coreboot/r400_4mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/r400_4mb/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/r400_8mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/r400_8mb/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/r500_4mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/r500_4mb/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/t1650_12mb/config/libgfxinit_txtmode          | 4 ++--
 config/coreboot/t400_16mb/config/libgfxinit_corebootfb        | 4 ++--
 config/coreboot/t400_16mb/config/libgfxinit_txtmode           | 4 ++--
 config/coreboot/t400_4mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/t400_4mb/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/t400_8mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/t400_8mb/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/t420_8mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/t420s_8mb/config/libgfxinit_corebootfb        | 4 ++--
 config/coreboot/t420s_8mb/config/libgfxinit_txtmode           | 4 ++--
 config/coreboot/t430_12mb/config/libgfxinit_corebootfb        | 4 ++--
 config/coreboot/t430_12mb/config/libgfxinit_txtmode           | 4 ++--
 config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode  | 4 ++--
 config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb    | 4 ++--
 config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode       | 4 ++--
 config/coreboot/t500_16mb/config/libgfxinit_corebootfb        | 4 ++--
 config/coreboot/t500_16mb/config/libgfxinit_txtmode           | 4 ++--
 config/coreboot/t500_4mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/t500_4mb/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/t500_8mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/t500_8mb/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/t520_8mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/t520_8mb/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/t530_12mb/config/libgfxinit_corebootfb        | 4 ++--
 config/coreboot/t530_12mb/config/libgfxinit_txtmode           | 4 ++--
 .../coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb   | 4 ++--
 config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode   | 4 ++--
 config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb     | 4 ++--
 config/coreboot/t60_intelgpu/config/libgfxinit_txtmode        | 4 ++--
 config/coreboot/w500_16mb/config/libgfxinit_corebootfb        | 4 ++--
 config/coreboot/w500_16mb/config/libgfxinit_txtmode           | 4 ++--
 config/coreboot/w500_4mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/w500_4mb/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/w500_8mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/w500_8mb/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/w530_12mb/config/libgfxinit_corebootfb        | 4 ++--
 config/coreboot/w530_12mb/config/libgfxinit_txtmode           | 4 ++--
 config/coreboot/w541_12mb/config/libgfxinit_txtmode           | 4 ++--
 config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb     | 4 ++--
 config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode        | 4 ++--
 config/coreboot/x200_16mb/config/libgfxinit_corebootfb        | 4 ++--
 config/coreboot/x200_16mb/config/libgfxinit_txtmode           | 4 ++--
 config/coreboot/x200_4mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/x200_4mb/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/x200_8mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/x200_8mb/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/x201_8mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/x201_8mb/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/x220_8mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/x220_8mb/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/x230_12mb/config/libgfxinit_corebootfb        | 4 ++--
 config/coreboot/x230_12mb/config/libgfxinit_txtmode           | 4 ++--
 config/coreboot/x230_16mb/config/libgfxinit_corebootfb        | 4 ++--
 config/coreboot/x230_16mb/config/libgfxinit_txtmode           | 4 ++--
 config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb     | 4 ++--
 config/coreboot/x230edp_12mb/config/libgfxinit_txtmode        | 4 ++--
 config/coreboot/x230t_12mb/config/libgfxinit_corebootfb       | 4 ++--
 config/coreboot/x230t_12mb/config/libgfxinit_txtmode          | 4 ++--
 config/coreboot/x230t_16mb/config/libgfxinit_corebootfb       | 4 ++--
 config/coreboot/x230t_16mb/config/libgfxinit_txtmode          | 4 ++--
 config/coreboot/x301_16mb/config/libgfxinit_corebootfb        | 4 ++--
 config/coreboot/x301_16mb/config/libgfxinit_txtmode           | 4 ++--
 config/coreboot/x301_4mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/x301_4mb/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/x301_8mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/x301_8mb/config/libgfxinit_txtmode            | 4 ++--
 config/coreboot/x60/config/libgfxinit_corebootfb              | 4 ++--
 config/coreboot/x60/config/libgfxinit_txtmode                 | 4 ++--
 config/coreboot/x60_16mb/config/libgfxinit_corebootfb         | 4 ++--
 config/coreboot/x60_16mb/config/libgfxinit_txtmode            | 4 ++--
 111 files changed, 222 insertions(+), 222 deletions(-)

diff --git a/config/coreboot/d510mo/config/libgfxinit_txtmode b/config/coreboot/d510mo/config/libgfxinit_txtmode
index 0650cfe8..443d13f0 100644
--- a/config/coreboot/d510mo/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
index 490e5bb3..b00ded5e 100644
--- a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
index 3405ba9a..c8947a62 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
index 6120aa0c..3cd3385a 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index f72e0f53..d1b2011a 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -31,8 +31,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index 58ffa771..b4b168ea 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -31,8 +31,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/g43t-am3/config/libgfxinit_txtmode b/config/coreboot/g43t-am3/config/libgfxinit_txtmode
index e8426ac9..6a94e085 100644
--- a/config/coreboot/g43t-am3/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t-am3/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode b/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
index cb67f636..1420074c 100644
--- a/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode b/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
index c31dd4cc..8a69da65 100644
--- a/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
+++ b/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
index 44b24c53..785ff993 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
index 523487d9..1f46cb3a 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
index 428ea214..6f0073f0 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
index 255a8dc5..4821013d 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
index 8fc885d5..f56db456 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
index 5cc6f49f..90ffa144 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
index 3e6b75e5..a1fa814f 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
index e7a8aaa0..dd13a9b1 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
index 3410065e..ea3b349c 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
index ac3cfc3c..c1c338e2 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
index 1cbf618f..5212b282 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
@@ -31,8 +31,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
index 66c6d5ae..05ce394c 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
@@ -31,8 +31,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
index 99bb8a36..0ec32d0d 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
index 0c169dde..95ff37c1 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
index 7b49bc67..0c3a5115 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
index 98048758..a916e2db 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/macbook11/config/libgfxinit_corebootfb b/config/coreboot/macbook11/config/libgfxinit_corebootfb
index 8f402931..597e98cf 100644
--- a/config/coreboot/macbook11/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/macbook11/config/libgfxinit_txtmode b/config/coreboot/macbook11/config/libgfxinit_txtmode
index a0badd72..0627cc03 100644
--- a/config/coreboot/macbook11/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
index 0b62b399..6aca3b2f 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
@@ -31,8 +31,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
index 078c1cc6..4e9b3ccd 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
@@ -31,8 +31,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/macbook21/config/libgfxinit_corebootfb b/config/coreboot/macbook21/config/libgfxinit_corebootfb
index bb354148..7e85d93e 100644
--- a/config/coreboot/macbook21/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/macbook21/config/libgfxinit_txtmode b/config/coreboot/macbook21/config/libgfxinit_txtmode
index 95736716..886f6116 100644
--- a/config/coreboot/macbook21/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
index 8c7a74fd..53109f28 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
@@ -31,8 +31,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
index 3a4e8b71..fd30d131 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
@@ -31,8 +31,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
index 29d663db..0a2b1943 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_txtmode b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
index 5297b342..eae6dd3c 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
index 84221206..62d90a2b 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_txtmode b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
index 9c85e14c..522ca862 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
index ea721218..13521245 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_txtmode b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
index b6c9e8c9..551fe334 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
index 64ce998e..170b43bf 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_txtmode b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
index dc0f1999..cd2aecf2 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index 3af81d36..34af7998 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
index 8dae5e14..8eab5815 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_txtmode b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
index baffe767..7b355341 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
index 949dca66..0051b947 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_txtmode b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
index 36237e81..cd016475 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
index 7a50edcf..ac7a1a32 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_txtmode b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
index aa329d1c..3587d694 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
index 8fdc51c0..1f766277 100644
--- a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
index 5c2427f8..3d3574be 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
index 74c3f515..a286261a 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
index b7c7ee66..945022ab 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_txtmode b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
index 8f010877..b77fafa6 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
index 746662e0..967b3b2e 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
@@ -31,8 +31,8 @@ CONFIG_USE_BLOBS=y
 CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
index 985c9673..7ae7e59c 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
@@ -33,8 +33,8 @@ CONFIG_USE_BLOBS=y
 CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
index 30375c72..4f801e5f 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
@@ -33,8 +33,8 @@ CONFIG_USE_BLOBS=y
 CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
index 50de0e81..ea2ace73 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_txtmode b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
index 10731ef0..30a5e362 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
index 9e3e882f..8b786232 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_txtmode b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
index 2c6e441e..0e5f344e 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
index a0ce9b20..c9bb611e 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_txtmode b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
index 72755817..eb91c6dd 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
index f46285b3..267b3479 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_txtmode b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
index 0accc91c..6d38fbb5 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
index 351d73ea..3e690ea4 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_txtmode b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
index f66e4615..57107464 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
index 79f7c0d7..eb29a939 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
index 8a99fe3d..83814bf0 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
index 5bfa3776..d582fb39 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
index 8f25c1ab..67250262 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
index 2560e36d..87e39698 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_txtmode b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
index 807b4989..8a0a9a47 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
index 2083b715..92e5d402 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_txtmode b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
index fc603bd6..db686f41 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
index f460cf02..ef31c4c9 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_txtmode b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
index 33a70a1f..8c0eb8f8 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
index 981142a7..c3f56f6d 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_txtmode b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
index 4d3e0cae..519d5edf 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_txtmode b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
index 8a5f9e45..b3e169d4 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
@@ -31,8 +31,8 @@ CONFIG_USE_BLOBS=y
 CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
index 281db751..b2e209cc 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
@@ -33,8 +33,8 @@ CONFIG_USE_BLOBS=y
 CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
index 625a7082..29056940 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
@@ -33,8 +33,8 @@ CONFIG_USE_BLOBS=y
 CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
index 66d976c4..ffc2ff48 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_txtmode b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
index 53fe5457..6b2e744f 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
index 186ba13a..e4f7c86b 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_txtmode b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
index 7002841a..25164d09 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
index d26b1cdb..af708785 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_txtmode b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
index 6bd53772..6c8005e4 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x201_8mb/config/libgfxinit_corebootfb b/config/coreboot/x201_8mb/config/libgfxinit_corebootfb
index 825e68ec..4edf2956 100644
--- a/config/coreboot/x201_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x201_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x201_8mb/config/libgfxinit_txtmode b/config/coreboot/x201_8mb/config/libgfxinit_txtmode
index dd7c154a..272ecfee 100644
--- a/config/coreboot/x201_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x201_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
index 34f6c36e..c2b68d56 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_txtmode b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
index e802262f..6941e182 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
index eeefec9e..13018a15 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_txtmode b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
index 50d1b2c7..5eefc1ce 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
index 333a581d..9c2cba42 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_txtmode b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
index 4ee86042..a8f24edc 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
index 9869ce01..01652916 100644
--- a/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode b/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
index 758b2ab9..60161691 100644
--- a/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
index 89b4af02..12c13544 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
index 8ab4dc37..c561c813 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
index 0a2e7549..c71e352f 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
index 9c725691..224e6da3 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
index 6e777e04..8c4ddffb 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_txtmode b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
index 08185a0f..8239d38b 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
index 1e1176c3..6d9b34c7 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_txtmode b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
index dc4a0914..05f07392 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
index 0b2c1d7b..9aa28d6f 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_txtmode b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
index 084ea5b7..ca6c741e 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x60/config/libgfxinit_corebootfb b/config/coreboot/x60/config/libgfxinit_corebootfb
index a516c441..375597dc 100644
--- a/config/coreboot/x60/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x60/config/libgfxinit_txtmode b/config/coreboot/x60/config/libgfxinit_txtmode
index b40bbec1..9953c513 100644
--- a/config/coreboot/x60/config/libgfxinit_txtmode
+++ b/config/coreboot/x60/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
index e2515d21..60478d77 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_txtmode b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
index 4f892ccc..2d7d7990 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set

From 1306c9d2e36d1760ebb79020aec305bf5b4bc7ad Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Oct 2023 20:04:40 +0000
Subject: [PATCH 0020/1549] Revert "coreboot/default: use alternative heap size
 fix"

This reverts commit 29e9c32e32f8e947f51a3efe375dab3ef8e1987e.
---
 .../coreboot/d510mo/config/libgfxinit_txtmode |   2 +-
 .../d510mo_16mb/config/libgfxinit_txtmode     |   2 +-
 ...ring-HEAP_SIZE-to-a-common-large-val.patch | 341 ++++++++++++++++++
 ...-default-HEAP_SIZE-from-1-MiB-to-512.patch |  41 ---
 ...HEAP_SIZE-overrides-greater-than-512.patch |  80 ----
 .../e6400_4mb/config/libgfxinit_corebootfb    |   2 +-
 .../e6400_4mb/config/libgfxinit_txtmode       |   2 +-
 .../e6430_12mb/config/libgfxinit_corebootfb   |   2 +-
 .../e6430_12mb/config/libgfxinit_txtmode      |   2 +-
 .../g43t-am3/config/libgfxinit_txtmode        |   2 +-
 .../g43t-am3_16mb/config/libgfxinit_txtmode   |   2 +-
 .../ga-g41m-es2l/config/libgfxinit_txtmode    |   2 +-
 .../gru_bob/config/libgfxinit_corebootfb      |   2 +-
 .../gru_kevin/config/libgfxinit_corebootfb    |   2 +-
 .../hp2170p_16mb/config/libgfxinit_corebootfb |   2 +-
 .../hp2170p_16mb/config/libgfxinit_txtmode    |   2 +-
 .../hp2560p_8mb/config/libgfxinit_corebootfb  |   2 +-
 .../hp2560p_8mb/config/libgfxinit_txtmode     |   2 +-
 .../hp2570p_16mb/config/libgfxinit_corebootfb |   2 +-
 .../hp2570p_16mb/config/libgfxinit_txtmode    |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../hp8200sff_4mb/config/libgfxinit_txtmode   |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../hp8200sff_8mb/config/libgfxinit_txtmode   |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../hp8300usdt_16mb/config/libgfxinit_txtmode |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../config/libgfxinit_txtmode                 |   2 +-
 .../hp9470m_16mb/config/libgfxinit_corebootfb |   2 +-
 .../hp9470m_16mb/config/libgfxinit_txtmode    |   2 +-
 .../macbook11/config/libgfxinit_corebootfb    |   2 +-
 .../macbook11/config/libgfxinit_txtmode       |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../macbook11_16mb/config/libgfxinit_txtmode  |   2 +-
 .../macbook21/config/libgfxinit_corebootfb    |   2 +-
 .../macbook21/config/libgfxinit_txtmode       |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../macbook21_16mb/config/libgfxinit_txtmode  |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../qemu_x86_12mb/config/libgfxinit_txtmode   |   2 +-
 .../r400_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../r400_16mb/config/libgfxinit_txtmode       |   2 +-
 .../r400_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../r400_4mb/config/libgfxinit_txtmode        |   2 +-
 .../r400_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../r400_8mb/config/libgfxinit_txtmode        |   2 +-
 .../r500_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../r500_4mb/config/libgfxinit_txtmode        |   2 +-
 .../t1650_12mb/config/libgfxinit_txtmode      |   2 +-
 .../t400_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../t400_16mb/config/libgfxinit_txtmode       |   2 +-
 .../t400_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../t400_4mb/config/libgfxinit_txtmode        |   2 +-
 .../t400_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../t400_8mb/config/libgfxinit_txtmode        |   2 +-
 .../t420_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../t420s_8mb/config/libgfxinit_corebootfb    |   2 +-
 .../t420s_8mb/config/libgfxinit_txtmode       |   2 +-
 .../t430_12mb/config/libgfxinit_corebootfb    |   2 +-
 .../t430_12mb/config/libgfxinit_txtmode       |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../t440pmrc_12mb/config/libgfxinit_txtmode   |   2 +-
 .../t500_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../t500_16mb/config/libgfxinit_txtmode       |   2 +-
 .../t500_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../t500_4mb/config/libgfxinit_txtmode        |   2 +-
 .../t500_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../t500_8mb/config/libgfxinit_txtmode        |   2 +-
 .../t520_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../t520_8mb/config/libgfxinit_txtmode        |   2 +-
 .../t530_12mb/config/libgfxinit_corebootfb    |   2 +-
 .../t530_12mb/config/libgfxinit_txtmode       |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +-
 .../config/libgfxinit_txtmode                 |   2 +-
 .../t60_intelgpu/config/libgfxinit_corebootfb |   2 +-
 .../t60_intelgpu/config/libgfxinit_txtmode    |   2 +-
 .../w500_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../w500_16mb/config/libgfxinit_txtmode       |   2 +-
 .../w500_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../w500_4mb/config/libgfxinit_txtmode        |   2 +-
 .../w500_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../w500_8mb/config/libgfxinit_txtmode        |   2 +-
 .../w530_12mb/config/libgfxinit_corebootfb    |   2 +-
 .../w530_12mb/config/libgfxinit_txtmode       |   2 +-
 .../w541mrc_12mb/config/libgfxinit_corebootfb |   2 +-
 .../w541mrc_12mb/config/libgfxinit_txtmode    |   2 +-
 .../x200_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../x200_16mb/config/libgfxinit_txtmode       |   2 +-
 .../x200_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../x200_4mb/config/libgfxinit_txtmode        |   2 +-
 .../x200_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../x200_8mb/config/libgfxinit_txtmode        |   2 +-
 .../x201_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../x201_8mb/config/libgfxinit_txtmode        |   2 +-
 .../x220_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../x220_8mb/config/libgfxinit_txtmode        |   2 +-
 .../x230_12mb/config/libgfxinit_corebootfb    |   2 +-
 .../x230_12mb/config/libgfxinit_txtmode       |   2 +-
 .../x230_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../x230_16mb/config/libgfxinit_txtmode       |   2 +-
 .../x230edp_12mb/config/libgfxinit_corebootfb |   2 +-
 .../x230edp_12mb/config/libgfxinit_txtmode    |   2 +-
 .../x230t_12mb/config/libgfxinit_corebootfb   |   2 +-
 .../x230t_12mb/config/libgfxinit_txtmode      |   2 +-
 .../x230t_16mb/config/libgfxinit_corebootfb   |   2 +-
 .../x230t_16mb/config/libgfxinit_txtmode      |   2 +-
 .../x301_16mb/config/libgfxinit_corebootfb    |   2 +-
 .../x301_16mb/config/libgfxinit_txtmode       |   2 +-
 .../x301_4mb/config/libgfxinit_corebootfb     |   2 +-
 .../x301_4mb/config/libgfxinit_txtmode        |   2 +-
 .../x301_8mb/config/libgfxinit_corebootfb     |   2 +-
 .../x301_8mb/config/libgfxinit_txtmode        |   2 +-
 .../coreboot/x60/config/libgfxinit_corebootfb |   2 +-
 config/coreboot/x60/config/libgfxinit_txtmode |   2 +-
 .../x60_16mb/config/libgfxinit_corebootfb     |   2 +-
 .../x60_16mb/config/libgfxinit_txtmode        |   2 +-
 117 files changed, 455 insertions(+), 235 deletions(-)
 create mode 100644 config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
 delete mode 100644 config/coreboot/default/patches/0028-Kconfig-Decrease-default-HEAP_SIZE-from-1-MiB-to-512.patch
 delete mode 100644 config/coreboot/default/patches/0029-Kconfig-Restore-HEAP_SIZE-overrides-greater-than-512.patch

diff --git a/config/coreboot/d510mo/config/libgfxinit_txtmode b/config/coreboot/d510mo/config/libgfxinit_txtmode
index 443d13f0..e57c6ed0 100644
--- a/config/coreboot/d510mo/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,7 +248,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x80000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
index b00ded5e..db50e6a6 100644
--- a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,7 +248,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x80000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch b/config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
new file mode 100644
index 00000000..cca8901f
--- /dev/null
+++ b/config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
@@ -0,0 +1,341 @@
+From f1b5b0051718139cf59ad047d42d1360b8452ec5 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 29 Oct 2023 01:18:50 +0000
+Subject: [PATCH 1/1] Revert "Kconfig: Bring HEAP_SIZE to a common, large
+ value"
+
+This reverts commit 44a48ce7a46c36df69f7b2cf3552bf10fa5f61b6.
+
+NOTE:
+
+this is done instead of merging:
+https://review.coreboot.org/c/coreboot/+/78623
+
+which is still under review for now
+
+the patch i'm reverting is this one:
+https://review.coreboot.org/c/coreboot/+/78270
+
+this was actually only merged the day before i
+updated coreboot revs in lbmk to the 12 october rev,
+so there's no harm in quickly reverting this for now
+
+however, later on, we will rely on the other patch
+---
+ src/Kconfig                                   | 3 ++-
+ src/cpu/qemu-x86/Kconfig                      | 3 +++
+ src/mainboard/sifive/hifive-unleashed/Kconfig | 3 +++
+ src/northbridge/amd/pi/Kconfig                | 4 ++++
+ src/soc/amd/picasso/Kconfig                   | 4 ++++
+ src/soc/amd/stoneyridge/Kconfig               | 4 ++++
+ src/soc/cavium/cn81xx/Kconfig                 | 3 +++
+ src/soc/intel/alderlake/Kconfig               | 5 +++++
+ src/soc/intel/apollolake/Kconfig              | 4 ++++
+ src/soc/intel/cannonlake/Kconfig              | 4 ++++
+ src/soc/intel/elkhartlake/Kconfig             | 4 ++++
+ src/soc/intel/jasperlake/Kconfig              | 4 ++++
+ src/soc/intel/meteorlake/Kconfig              | 5 +++++
+ src/soc/intel/skylake/Kconfig                 | 4 ++++
+ src/soc/intel/tigerlake/Kconfig               | 4 ++++
+ src/soc/intel/xeon_sp/Kconfig                 | 4 ++++
+ src/soc/intel/xeon_sp/cpx/Kconfig             | 4 ++++
+ src/soc/intel/xeon_sp/skx/Kconfig             | 4 ++++
+ src/soc/intel/xeon_sp/spr/Kconfig             | 4 ++++
+ src/soc/qualcomm/ipq40xx/Kconfig              | 4 ++++
+ 20 files changed, 77 insertions(+), 1 deletion(-)
+
+diff --git a/src/Kconfig b/src/Kconfig
+index ae8024089e..1549719dd0 100644
+--- a/src/Kconfig
++++ b/src/Kconfig
+@@ -751,7 +751,8 @@ config RTC
+ 
+ config HEAP_SIZE
+ 	hex
+-	default 0x100000
++	default 0x100000 if FLATTENED_DEVICE_TREE
++	default 0x4000
+ 
+ config STACK_SIZE
+ 	hex
+diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
+index 0fa999e1ac..f3e2c4cea9 100644
+--- a/src/cpu/qemu-x86/Kconfig
++++ b/src/cpu/qemu-x86/Kconfig
+@@ -35,4 +35,7 @@ config MAX_CPUS
+ 	default 32 if SMM_TSEG
+ 	default 4
+ 
++config HEAP_SIZE
++	default 0x8000
++
+ endif
+diff --git a/src/mainboard/sifive/hifive-unleashed/Kconfig b/src/mainboard/sifive/hifive-unleashed/Kconfig
+index 7bc3b0bcbb..7f9300f2a7 100644
+--- a/src/mainboard/sifive/hifive-unleashed/Kconfig
++++ b/src/mainboard/sifive/hifive-unleashed/Kconfig
+@@ -10,6 +10,9 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select FLATTENED_DEVICE_TREE
+ 	select SPI_SDCARD
+ 
++config HEAP_SIZE
++	default 0x10000
++
+ config MAINBOARD_DIR
+ 	default "sifive/hifive-unleashed"
+ 
+diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
+index 4ffe82a15f..4518db149b 100644
+--- a/src/northbridge/amd/pi/Kconfig
++++ b/src/northbridge/amd/pi/Kconfig
+@@ -29,4 +29,8 @@ config HW_MEM_HOLE_SIZEK
+ 	hex
+ 	default 0x200000
+ 
++config HEAP_SIZE
++	hex
++	default 0xc0000
++
+ endif # NORTHBRIDGE_AMD_PI
+diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
+index c33f287067..796fe4eb13 100644
+--- a/src/soc/amd/picasso/Kconfig
++++ b/src/soc/amd/picasso/Kconfig
+@@ -264,6 +264,10 @@ config S3_VGA_ROM_RUN
+ 	bool
+ 	default n
+ 
++config HEAP_SIZE
++	hex
++	default 0xc0000
++
+ config SERIRQ_CONTINUOUS_MODE
+ 	bool
+ 	default n
+diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
+index 6ff135e6a8..9af7455bae 100644
+--- a/src/soc/amd/stoneyridge/Kconfig
++++ b/src/soc/amd/stoneyridge/Kconfig
+@@ -152,6 +152,10 @@ config S3_VGA_ROM_RUN
+ 	bool
+ 	default n
+ 
++config HEAP_SIZE
++	hex
++	default 0xc0000
++
+ config EHCI_BAR
+ 	hex
+ 	default 0xfef00000
+diff --git a/src/soc/cavium/cn81xx/Kconfig b/src/soc/cavium/cn81xx/Kconfig
+index 77ca97202b..368581f8f1 100644
+--- a/src/soc/cavium/cn81xx/Kconfig
++++ b/src/soc/cavium/cn81xx/Kconfig
+@@ -30,6 +30,9 @@ config ARCH_ARMV8_EXTENSION
+ 	int
+ 	default 1
+ 
++config HEAP_SIZE
++	default 0x10000
++
+ config STACK_SIZE
+ 	default 0x2000
+ 
+diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
+index 4b960c1d22..82ec8f263e 100644
+--- a/src/soc/intel/alderlake/Kconfig
++++ b/src/soc/intel/alderlake/Kconfig
+@@ -215,6 +215,11 @@ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000 if BMP_LOGO
++	default 0x10000
++
+ config GFX_GMA_DEFAULT_MMIO
+ 	default 0xaf000000 if MAINBOARD_HAS_EARLY_LIBGFXINIT
+ 
+diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
+index 78ec2987ce..bce935d800 100644
+--- a/src/soc/intel/apollolake/Kconfig
++++ b/src/soc/intel/apollolake/Kconfig
+@@ -252,6 +252,10 @@ config IFWI_FILE_NAME
+ 	help
+ 	  Name of file to store in the IFWI region.
+ 
++config HEAP_SIZE
++	hex
++	default 0x8000
++
+ config MAX_ROOT_PORTS
+ 	int
+ 	default 6
+diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
+index a42a3c365b..80237f9810 100644
+--- a/src/soc/intel/cannonlake/Kconfig
++++ b/src/soc/intel/cannonlake/Kconfig
+@@ -160,6 +160,10 @@ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+ 
++config HEAP_SIZE
++	hex
++	default 0x8000
++
+ config NHLT_DMIC_1CH_16B
+ 	bool
+ 	depends on ACPI_NHLT
+diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
+index 3361c0ddb9..7f1c767379 100644
+--- a/src/soc/intel/elkhartlake/Kconfig
++++ b/src/soc/intel/elkhartlake/Kconfig
+@@ -104,6 +104,10 @@ config IED_REGION_SIZE
+ 	hex
+ 	default 0x0
+ 
++config HEAP_SIZE
++	hex
++	default 0x8000
++
+ config MAX_ROOT_PORTS
+ 	int
+ 	default 7
+diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
+index 3d84991e09..ff5def3263 100644
+--- a/src/soc/intel/jasperlake/Kconfig
++++ b/src/soc/intel/jasperlake/Kconfig
+@@ -106,6 +106,10 @@ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+ 
++config HEAP_SIZE
++	hex
++	default 0x8000
++
+ config MAX_ROOT_PORTS
+ 	int
+ 	default 8
+diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
+index 590e8b80e1..48030a1911 100644
+--- a/src/soc/intel/meteorlake/Kconfig
++++ b/src/soc/intel/meteorlake/Kconfig
+@@ -197,6 +197,11 @@ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000 if BMP_LOGO
++	default 0x10000
++
+ # Intel recommends reserving the PCIe TBT root port resources as below:
+ # - 42 buses
+ # - 194 MiB Non-prefetchable memory
+diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
+index e0df501460..d6a11363ee 100644
+--- a/src/soc/intel/skylake/Kconfig
++++ b/src/soc/intel/skylake/Kconfig
+@@ -151,6 +151,10 @@ config EXCLUDE_NATIVE_SD_INTERFACE
+ 	help
+ 	  If you set this option to n, will not use native SD controller.
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000
++
+ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
+index c07a0d8365..0a4b7bfdb8 100644
+--- a/src/soc/intel/tigerlake/Kconfig
++++ b/src/soc/intel/tigerlake/Kconfig
+@@ -152,6 +152,10 @@ config IED_REGION_SIZE
+ config INTEL_TME
+ 	default n
+ 
++config HEAP_SIZE
++	hex
++	default 0x10000
++
+ config MAX_ROOT_PORTS
+ 	int
+ 	default 24 if SOC_INTEL_TIGERLAKE_PCH_H
+diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
+index e63bee5451..63ced01067 100644
+--- a/src/soc/intel/xeon_sp/Kconfig
++++ b/src/soc/intel/xeon_sp/Kconfig
+@@ -91,6 +91,10 @@ config ECAM_MMCONF_BASE_ADDRESS
+ config ECAM_MMCONF_BUS_NUMBER
+ 	default 256
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000
++
+ config HPET_MIN_TICKS
+ 	hex
+ 	default 0x80
+diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig
+index ac166c3038..f54f7716b6 100644
+--- a/src/soc/intel/xeon_sp/cpx/Kconfig
++++ b/src/soc/intel/xeon_sp/cpx/Kconfig
+@@ -71,6 +71,10 @@ config CPU_MICROCODE_CBFS_LEN
+ 	hex
+ 	default 0x7C00
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000
++
+ config STACK_SIZE
+ 	hex
+ 	default 0x4000
+diff --git a/src/soc/intel/xeon_sp/skx/Kconfig b/src/soc/intel/xeon_sp/skx/Kconfig
+index 5d843878e1..c2c3d4e2e8 100644
+--- a/src/soc/intel/xeon_sp/skx/Kconfig
++++ b/src/soc/intel/xeon_sp/skx/Kconfig
+@@ -55,6 +55,10 @@ config CPU_MICROCODE_CBFS_LEN
+ 	hex
+ 	default 0x7C00
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000
++
+ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig
+index 43b87ade14..b1c4c783b7 100644
+--- a/src/soc/intel/xeon_sp/spr/Kconfig
++++ b/src/soc/intel/xeon_sp/spr/Kconfig
+@@ -79,6 +79,10 @@ config CPU_MICROCODE_CBFS_LEN
+ 	hex
+ 	default 0x8c00
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000
++
+ config STACK_SIZE
+ 	hex
+ 	default 0x4000
+diff --git a/src/soc/qualcomm/ipq40xx/Kconfig b/src/soc/qualcomm/ipq40xx/Kconfig
+index 0ce92731c0..0eabb00752 100644
+--- a/src/soc/qualcomm/ipq40xx/Kconfig
++++ b/src/soc/qualcomm/ipq40xx/Kconfig
+@@ -57,4 +57,8 @@ config SBL_UTIL_PATH
+ 	help
+ 	  Path for utils to combine SBL_ELF and bootblock
+ 
++config HEAP_SIZE
++	hex
++	default 0x8000
++
+ endif
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0028-Kconfig-Decrease-default-HEAP_SIZE-from-1-MiB-to-512.patch b/config/coreboot/default/patches/0028-Kconfig-Decrease-default-HEAP_SIZE-from-1-MiB-to-512.patch
deleted file mode 100644
index 31e86e86..00000000
--- a/config/coreboot/default/patches/0028-Kconfig-Decrease-default-HEAP_SIZE-from-1-MiB-to-512.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From 7eda35a9b63d070ede24b32253855ce07c6c7d13 Mon Sep 17 00:00:00 2001
-From: Bill XIE <persmule@hardenedlinux.org>
-Date: Tue, 24 Oct 2023 13:56:16 +0800
-Subject: [PATCH 1/2] Kconfig: Decrease default HEAP_SIZE from 1 MiB to 512 KiB
-
-Commit 44a48ce7a46c ("Kconfig: Bring HEAP_SIZE to a common, large
-value") breaks S3 resume from TSEG stage cache on many platforms,
-including GM45 and Ivy Bridge, so limit it to 512 KiB.
-
-Please test this against other platforms before merging!
-
-Tested: Setting it to 0x80000 results a working S3 resume on Thinkpad
-	X200 and T430, with log in cbmem for S3 resume, while 0xa0000
-	breaks it. coreboot log during failed resume when (HEAP_SIZE
-	>= 0xa0000) cannot be obtained from EHCI debug, while log in
-	cbmem shows that ramstage is failed to be found in TSEG stage
-	cache, as shown in https://ticket.coreboot.org/issues/512 .
-
-Resolves: https://ticket.coreboot.org/issues/512
-Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
-Change-Id: Ib1de1eb8487df5bdf004e544d40667833a291515
----
- src/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/Kconfig b/src/Kconfig
-index ae8024089e..6db0736715 100644
---- a/src/Kconfig
-+++ b/src/Kconfig
-@@ -751,7 +751,7 @@ config RTC
- 
- config HEAP_SIZE
- 	hex
--	default 0x100000
-+	default 0x80000
- 
- config STACK_SIZE
- 	hex
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0029-Kconfig-Restore-HEAP_SIZE-overrides-greater-than-512.patch b/config/coreboot/default/patches/0029-Kconfig-Restore-HEAP_SIZE-overrides-greater-than-512.patch
deleted file mode 100644
index 2bfd8783..00000000
--- a/config/coreboot/default/patches/0029-Kconfig-Restore-HEAP_SIZE-overrides-greater-than-512.patch
+++ /dev/null
@@ -1,80 +0,0 @@
-From 012a72b4acfe19f4456f203f2378f98d00646122 Mon Sep 17 00:00:00 2001
-From: Bill XIE <persmule@hardenedlinux.org>
-Date: Tue, 31 Oct 2023 00:12:02 +0800
-Subject: [PATCH 2/2] Kconfig: Restore HEAP_SIZE overrides greater than 512 KiB
-
-Commit 44a48ce7a46c ("Kconfig: Bring HEAP_SIZE to a common, large
-value") breaks S3 resume from TSEG stage cache on many platforms,
-including GM45 and Ivy Bridge.
-
-Now the default value becomes 512 KiB, but a few platforms have
-greater value before commit 44a48ce7a46c. This commit is to restore
-them.
-
-Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
-Change-Id: I78cd56b0683dd2ef94319a98a720f2da58151626
----
- src/Kconfig                     | 1 +
- src/northbridge/amd/pi/Kconfig  | 4 ++++
- src/soc/amd/picasso/Kconfig     | 4 ++++
- src/soc/amd/stoneyridge/Kconfig | 4 ++++
- 4 files changed, 13 insertions(+)
-
-diff --git a/src/Kconfig b/src/Kconfig
-index 6db0736715..24bd1469e0 100644
---- a/src/Kconfig
-+++ b/src/Kconfig
-@@ -751,6 +751,7 @@ config RTC
- 
- config HEAP_SIZE
- 	hex
-+	default 0x100000 if FLATTENED_DEVICE_TREE
- 	default 0x80000
- 
- config STACK_SIZE
-diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
-index 4ffe82a15f..4518db149b 100644
---- a/src/northbridge/amd/pi/Kconfig
-+++ b/src/northbridge/amd/pi/Kconfig
-@@ -29,4 +29,8 @@ config HW_MEM_HOLE_SIZEK
- 	hex
- 	default 0x200000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0xc0000
-+
- endif # NORTHBRIDGE_AMD_PI
-diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
-index c33f287067..796fe4eb13 100644
---- a/src/soc/amd/picasso/Kconfig
-+++ b/src/soc/amd/picasso/Kconfig
-@@ -264,6 +264,10 @@ config S3_VGA_ROM_RUN
- 	bool
- 	default n
- 
-+config HEAP_SIZE
-+	hex
-+	default 0xc0000
-+
- config SERIRQ_CONTINUOUS_MODE
- 	bool
- 	default n
-diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
-index 6ff135e6a8..9af7455bae 100644
---- a/src/soc/amd/stoneyridge/Kconfig
-+++ b/src/soc/amd/stoneyridge/Kconfig
-@@ -152,6 +152,10 @@ config S3_VGA_ROM_RUN
- 	bool
- 	default n
- 
-+config HEAP_SIZE
-+	hex
-+	default 0xc0000
-+
- config EHCI_BAR
- 	hex
- 	default 0xfef00000
--- 
-2.39.2
-
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
index c8947a62..d6bbf1cd 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
@@ -171,6 +171,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -213,7 +214,6 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 # CONFIG_VGA_BIOS_SECOND is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
index 3cd3385a..85ccc250 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
@@ -169,6 +169,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -211,7 +212,6 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 # CONFIG_VGA_BIOS_SECOND is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index d1b2011a..96588456 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -171,6 +171,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -213,7 +214,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index b4b168ea..c7e351f0 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -169,6 +169,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -211,7 +212,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/g43t-am3/config/libgfxinit_txtmode b/config/coreboot/g43t-am3/config/libgfxinit_txtmode
index 6a94e085..cefcdfdd 100644
--- a/config/coreboot/g43t-am3/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t-am3/config/libgfxinit_txtmode
@@ -165,6 +165,7 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -204,7 +205,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode b/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
index 1420074c..a18ae41e 100644
--- a/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
@@ -165,6 +165,7 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -204,7 +205,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode b/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
index 8a69da65..0d80d7ff 100644
--- a/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
+++ b/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
@@ -172,6 +172,7 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -211,7 +212,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/gru_bob/config/libgfxinit_corebootfb b/config/coreboot/gru_bob/config/libgfxinit_corebootfb
index 8c8ee24c..9502be12 100644
--- a/config/coreboot/gru_bob/config/libgfxinit_corebootfb
+++ b/config/coreboot/gru_bob/config/libgfxinit_corebootfb
@@ -675,6 +675,7 @@ CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_DRIVER_TPM_SPI_CHIP=0
 # CONFIG_TPM_MEASURED_BOOT is not set
@@ -704,7 +705,6 @@ CONFIG_ROM_SIZE=0x00800000
 # SoC
 #
 CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_ARM64_BL31_EXTERNAL_FILE=""
 CONFIG_ARCH_ARMV8_EXTENSION=0
 CONFIG_STACK_SIZE=0x0
diff --git a/config/coreboot/gru_kevin/config/libgfxinit_corebootfb b/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
index 17ea0504..cf36cf35 100644
--- a/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
+++ b/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
@@ -675,6 +675,7 @@ CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -703,7 +704,6 @@ CONFIG_ROM_SIZE=0x00800000
 # SoC
 #
 CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_ARM64_BL31_EXTERNAL_FILE=""
 CONFIG_ARCH_ARMV8_EXTENSION=0
 CONFIG_STACK_SIZE=0x0
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
index 785ff993..b30eecff 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -236,7 +237,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
index 1f46cb3a..7db931bc 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -234,7 +235,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
index 6f0073f0..9fefa85c 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
@@ -190,6 +190,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -233,7 +234,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
index 4821013d..92f1ac0f 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
@@ -188,6 +188,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -231,7 +232,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
index f56db456..dc5c2510 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
@@ -189,6 +189,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -232,7 +233,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
index 90ffa144..281a5e65 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
@@ -187,6 +187,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -230,7 +231,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
index a1fa814f..b7fa04e9 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
@@ -188,6 +188,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -229,7 +230,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
index dd13a9b1..a5e044ad 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
@@ -186,6 +186,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -227,7 +228,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
index ea3b349c..06fb4fd5 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
@@ -188,6 +188,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -229,7 +230,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
index c1c338e2..3320c6c3 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
@@ -186,6 +186,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -227,7 +228,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
index 5212b282..1f2aafb1 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
@@ -189,6 +189,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -230,7 +231,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
index 05ce394c..c20a75f3 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
@@ -187,6 +187,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -228,7 +229,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
index 0ec32d0d..1cdc018b 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
@@ -192,6 +192,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -235,7 +236,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
index 95ff37c1..1821c118 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
@@ -190,6 +190,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -233,7 +234,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
index 0c3a5115..42e5b236 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
@@ -190,6 +190,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -233,7 +234,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
index a916e2db..d687a382 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
@@ -188,6 +188,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -231,7 +232,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/macbook11/config/libgfxinit_corebootfb b/config/coreboot/macbook11/config/libgfxinit_corebootfb
index 597e98cf..efc4f997 100644
--- a/config/coreboot/macbook11/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11/config/libgfxinit_corebootfb
@@ -162,6 +162,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -202,7 +203,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/macbook11/config/libgfxinit_txtmode b/config/coreboot/macbook11/config/libgfxinit_txtmode
index 0627cc03..740cac57 100644
--- a/config/coreboot/macbook11/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11/config/libgfxinit_txtmode
@@ -162,6 +162,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -202,7 +203,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
index 6aca3b2f..6e5b91a0 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
@@ -161,6 +161,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -201,7 +202,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
index 4e9b3ccd..50f27c8f 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
@@ -161,6 +161,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -201,7 +202,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/macbook21/config/libgfxinit_corebootfb b/config/coreboot/macbook21/config/libgfxinit_corebootfb
index 7e85d93e..dde5c192 100644
--- a/config/coreboot/macbook21/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21/config/libgfxinit_corebootfb
@@ -162,6 +162,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -202,7 +203,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/macbook21/config/libgfxinit_txtmode b/config/coreboot/macbook21/config/libgfxinit_txtmode
index 886f6116..5f99046e 100644
--- a/config/coreboot/macbook21/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21/config/libgfxinit_txtmode
@@ -162,6 +162,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -202,7 +203,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
index 53109f28..08a21f42 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
@@ -161,6 +161,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -201,7 +202,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
index fd30d131..563271e0 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
@@ -161,6 +161,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -201,7 +202,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
index a62b7ca4..45c86d25 100644
--- a/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
@@ -143,6 +143,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -170,7 +171,6 @@ CONFIG_ROM_SIZE=0x00c00000
 # SoC
 #
 CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_ARM64_BL31_EXTERNAL_FILE=""
 CONFIG_ARCH_ARMV8_EXTENSION=0
 CONFIG_STACK_SIZE=0x0
diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
index fad4ba90..f0b31134 100644
--- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
@@ -162,6 +162,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x8000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -193,7 +194,6 @@ CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
index 9424c242..29ae73a3 100644
--- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
@@ -162,6 +162,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x8000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -193,7 +194,6 @@ CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
index 0a2b1943..7ce24630 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_txtmode b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
index eae6dd3c..7b703309 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
index 62d90a2b..8f8b1c5d 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_txtmode b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
index 522ca862..0d68204b 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
index 13521245..95eba440 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_txtmode b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
index 551fe334..819b76ff 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
index 170b43bf..6e811615 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
@@ -206,6 +206,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -247,7 +248,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_txtmode b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
index cd2aecf2..f0acbd72 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
@@ -204,6 +204,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -245,7 +246,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index 34af7998..f1775d76 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -179,6 +179,7 @@ CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -220,7 +221,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
index 8eab5815..684fc19c 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_txtmode b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
index 7b355341..dabfa840 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
index 0051b947..9c6f759b 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_txtmode b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
index cd016475..f300a98f 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
index ac7a1a32..e3a4bd5f 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_txtmode b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
index 3587d694..09108d6e 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
index 1f766277..e05f30c7 100644
--- a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
@@ -210,6 +210,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -253,7 +254,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
index 3d3574be..af588b5b 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
@@ -210,6 +210,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -253,7 +254,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
index a286261a..b1247317 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
@@ -208,6 +208,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -251,7 +252,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
index 945022ab..c89bd740 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
@@ -210,6 +210,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -253,7 +254,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_txtmode b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
index b77fafa6..113ff598 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
@@ -208,6 +208,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -251,7 +252,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
index 7ae7e59c..9e06c261 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -249,7 +250,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
index 4f801e5f..36886f27 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -247,7 +248,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
index ea2ace73..fd455dc1 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_txtmode b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
index 30a5e362..014769e4 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
index 8b786232..63ed793a 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_txtmode b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
index 0e5f344e..fb71d960 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
index c9bb611e..dbeeaa3c 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_txtmode b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
index eb91c6dd..bb45cc11 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
index 267b3479..b2588bdc 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
@@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -254,7 +255,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_txtmode b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
index 6d38fbb5..aa34ce96 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -252,7 +253,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
index 3e690ea4..a9bff67e 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
@@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -254,7 +255,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_txtmode b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
index 57107464..d4a3daad 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -252,7 +253,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
index eb29a939..31ed1809 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
@@ -199,6 +199,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -239,7 +240,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
index 83814bf0..9c80a08c 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
@@ -199,6 +199,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -239,7 +240,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
index d582fb39..1b3e1030 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
@@ -199,6 +199,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -239,7 +240,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
index 67250262..4d7ae5a2 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
@@ -199,6 +199,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -239,7 +240,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
index 87e39698..f9242b2b 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_txtmode b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
index 8a0a9a47..5188d788 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
index 92e5d402..212e4524 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_txtmode b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
index db686f41..b44fd1d6 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
index ef31c4c9..1af2c673 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_txtmode b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
index 8c0eb8f8..1487b029 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
index c3f56f6d..1801f8a9 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
@@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -254,7 +255,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_txtmode b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
index 519d5edf..7d1d1d9a 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -252,7 +253,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
index b2e209cc..57230c83 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -249,7 +250,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
index 29056940..8a651862 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -247,7 +248,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
index ffc2ff48..0eb536c4 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_txtmode b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
index 6b2e744f..7b159fe8 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
index e4f7c86b..d19cffa8 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_txtmode b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
index 25164d09..06353de7 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
index af708785..4637d5ec 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_txtmode b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
index 6c8005e4..7775e712 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x201_8mb/config/libgfxinit_corebootfb b/config/coreboot/x201_8mb/config/libgfxinit_corebootfb
index 4edf2956..dd5586cb 100644
--- a/config/coreboot/x201_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x201_8mb/config/libgfxinit_corebootfb
@@ -208,6 +208,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -251,7 +252,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x201_8mb/config/libgfxinit_txtmode b/config/coreboot/x201_8mb/config/libgfxinit_txtmode
index 272ecfee..e520f8c3 100644
--- a/config/coreboot/x201_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x201_8mb/config/libgfxinit_txtmode
@@ -206,6 +206,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -249,7 +250,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
index c2b68d56..16390f3e 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
@@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -254,7 +255,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_txtmode b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
index 6941e182..6e0420d3 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -252,7 +253,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
index 13018a15..aa4578f5 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
@@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -254,7 +255,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_txtmode b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
index 5eefc1ce..5c2f9de6 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -252,7 +253,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
index 9c2cba42..583ba281 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
@@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -254,7 +255,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_txtmode b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
index a8f24edc..76108ee5 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -252,7 +253,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
index 01652916..49536e31 100644
--- a/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
@@ -212,6 +212,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -255,7 +256,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode b/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
index 60161691..ad729a69 100644
--- a/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
@@ -210,6 +210,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -253,7 +254,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
index 12c13544..587bce57 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
@@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -254,7 +255,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
index c561c813..24bd4939 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -252,7 +253,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
index c71e352f..4b84b31f 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
@@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -254,7 +255,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
index 224e6da3..249108c6 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
@@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -252,7 +253,6 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
index 8c4ddffb..ec5f72bf 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_txtmode b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
index 8239d38b..018b410d 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
index 6d9b34c7..740862ab 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_txtmode b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
index 05f07392..bd786e36 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
index 9aa28d6f..53a9f0ea 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
@@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -248,7 +249,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_txtmode b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
index ca6c741e..8b56e2b3 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
@@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -246,7 +247,6 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x60/config/libgfxinit_corebootfb b/config/coreboot/x60/config/libgfxinit_corebootfb
index 375597dc..0f7191ed 100644
--- a/config/coreboot/x60/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60/config/libgfxinit_corebootfb
@@ -200,6 +200,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -240,7 +241,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x60/config/libgfxinit_txtmode b/config/coreboot/x60/config/libgfxinit_txtmode
index 9953c513..92486e0d 100644
--- a/config/coreboot/x60/config/libgfxinit_txtmode
+++ b/config/coreboot/x60/config/libgfxinit_txtmode
@@ -200,6 +200,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -240,7 +241,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
index 60478d77..48a7aaef 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
@@ -200,6 +200,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -240,7 +241,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_txtmode b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
index 2d7d7990..0980dd01 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
@@ -200,6 +200,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -240,7 +241,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_HEAP_SIZE=0x80000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000

From 42fde8e5749752bed3eef641fb2ca5f8856262e9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Oct 2023 20:13:35 +0000
Subject: [PATCH 0021/1549] update/release: insert fake x201 me.bin

this makes the build work, for releases.

this is not done during regular builds, only releases.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/update/release | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/script/update/release b/script/update/release
index 3ee99c78..21fa8b61 100755
--- a/script/update/release
+++ b/script/update/release
@@ -129,6 +129,12 @@ fetch_trees()
 
 mkrom_images()
 {
+	# fake me.bin to make x201 roms build
+	mkdir -p "vendorfiles/cache/" || \
+	    err "mkvdir: !mkdir -p \"vendorfiles/cache/\""
+	dd if=/dev/zero of="vendorfiles/cache/x201_factory.rom" \
+	    bs=68k count=1 || err "mkvdir: can't make fake x201_factory.rom"
+
 	./build roms all || err "${_xm}: roms-all"
 	./build serprog rp2040 || err "${_xm}: rp2040"
 	./build serprog stm32 || err "${_xm}: stm32"

From 65675a200c821268bbe206d480f4da96567a0334 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Oct 2023 22:04:33 +0000
Subject: [PATCH 0022/1549] build/roms: properly print noblobs rom names

when printing the name of the rom being created, it's
done before the check to rename based on vendorfiles
in target.cfg. this patch fixes that bug.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/build/roms b/script/build/roms
index f19f7328..f4356764 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -384,10 +384,10 @@ moverom() {
 	rompath="${1}"
 	newrom="${2}"
 
+	[ "${vendorfiles}" = "n" ] && newrom="${newrom%.rom}_noblobs.rom"
 	printf "Creating target image: %s\n" "${newrom}"
 
 	[ -d "${newrom%/*}" ] || x_ mkdir -p "${newrom%/*}/"
-	[ "${vendorfiles}" = "n" ] && newrom="${newrom%.rom}_noblobs.rom"
 
 	x_ modify_coreboot_rom
 	x_ cp "${rompath}" "${newrom}"

From ed27ab8a2babccdf4c00ee50e87eff505003c549 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 Nov 2023 05:18:08 +0000
Subject: [PATCH 0023/1549] grub.cfg: use better description in menu entries

more user friendly, especially the GRUB (USB) one

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index fdf5d5fa..8a124062 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -169,13 +169,16 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 	true # Prevent pager requiring to accept each line instead of whole screen
 }
 
-menuentry 'Search ISOLINUX menu (AHCI)  [a]' --hotkey='a' {
-	search_isolinux ahci
+menuentry 'Find and load GRUB config from USB drive  [s]' --hotkey='s' {
+	search_grub usb
 }
-menuentry 'Search ISOLINUX menu (USB)  [u]' --hotkey='u' {
+menuentry 'Find and load ISOLINUX/EXTLINUX from USB drive  [u]' --hotkey='u' {
 	search_isolinux usb
 }
-menuentry 'Search ISOLINUX menu (ATA/IDE)  [d]' --hotkey='d' {
+menuentry 'Find and load ISOLINUX/EXTLINUX menu via AHCI  [a]' --hotkey='a' {
+	search_isolinux ahci
+}
+menuentry 'Find and load ISOLINUX/EXTLINUX menu via ATA/IDE  [d]' --hotkey='d' {
 	search_isolinux ata
 }
 if [ -f (cbfsdisk)/grubtest.cfg ]; then
@@ -186,9 +189,6 @@ menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey=
 	fi
 }
 fi
-menuentry 'Search for GRUB2 configuration on external media  [s]' --hotkey='s' {
-	search_grub usb
-}
 if [ -f (cbfsdisk)/seabios.elf ]; then
 menuentry 'Load SeaBIOS (payload) [b]' --hotkey='b' {
 	set root='cbfsdisk'

From f999349526d13ddb317a9840055458a79b112d77 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 Nov 2023 07:24:51 +0000
Subject: [PATCH 0024/1549] d945gclf: add noblobs/nomicrocode label

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/d945gclf_8mb/target.cfg | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/config/coreboot/d945gclf_8mb/target.cfg b/config/coreboot/d945gclf_8mb/target.cfg
index 92e95815..4b9708e1 100644
--- a/config/coreboot/d945gclf_8mb/target.cfg
+++ b/config/coreboot/d945gclf_8mb/target.cfg
@@ -5,3 +5,5 @@ payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="n"
+vendorfiles="n"
+microcode_required="n"

From dfc5423cad2fc2646d64d69f99a06fc2fd7723c7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 Nov 2023 07:40:13 +0000
Subject: [PATCH 0025/1549] export LC_COLLATE=C and LC_ALL=C

this is to ensure alphanumeric sorting, with
capital letters first; and numbers before letters.

we always relied on this, but until now lbmk would
just assume the host is configured this way.

this fixes a longstanding design flaw in lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/build b/build
index 9ca9de63..8c9f8f9c 100755
--- a/build
+++ b/build
@@ -8,6 +8,9 @@
 [ "x${DEBUG+set}" = 'xset' ] && set -v
 set -u -e
 
+export LC_COLLATE=C
+export LC_ALL=C
+
 . "include/err.sh"
 . "include/option.sh"
 

From 971f651775b761b131218dfc24618eb15bce0dc8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 Nov 2023 08:44:03 +0000
Subject: [PATCH 0026/1549] add 512kb d945gclf config

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../d945gclf_512kb/config/libgfxinit_txtmode  | 591 ++++++++++++++++++
 config/coreboot/d945gclf_512kb/target.cfg     |   9 +
 .../d945gclf_8mb/config/libgfxinit_txtmode    |   7 +-
 3 files changed, 604 insertions(+), 3 deletions(-)
 create mode 100644 config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/d945gclf_512kb/target.cfg

diff --git a/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode b/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..6a027c06
--- /dev/null
+++ b/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode
@@ -0,0 +1,591 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+CONFIG_VENDOR_INTEL=y
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="D945GCLF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="intel/d945gclf"
+CONFIG_VGA_BIOS_ID="8086,2772"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Intel"
+CONFIG_CBFS_SIZE=0x00080000
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_IRQ_SLOT_COUNT=18
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefc0000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_VBT_DATA_SIZE_KB=8
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_BOARD_INTEL_ADLRVP_P is not set
+# CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
+# CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
+# CONFIG_BOARD_INTEL_ADLRVP_M is not set
+# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
+# CONFIG_BOARD_INTEL_ADLRVP_N is not set
+# CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
+# CONFIG_BOARD_INTEL_ADLRVP_RPL is not set
+# CONFIG_BOARD_INTEL_ADLRVP_RPL_EXT_EC is not set
+# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
+# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
+# CONFIG_BOARD_INTEL_ARCHERCITY_CRB is not set
+# CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
+# CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
+
+#
+# Coffeelake RVP
+#
+# CONFIG_BOARD_INTEL_COFFEELAKE_RVPU is not set
+# CONFIG_BOARD_INTEL_COFFEELAKE_RVP11 is not set
+# CONFIG_BOARD_INTEL_WHISKEYLAKE_RVP is not set
+# CONFIG_BOARD_INTEL_COFFEELAKE_RVP8 is not set
+# CONFIG_BOARD_INTEL_COMETLAKE_RVPU is not set
+# CONFIG_BOARD_INTEL_D510MO is not set
+CONFIG_BOARD_INTEL_D945GCLF=y
+# CONFIG_BOARD_INTEL_DCP847SKE is not set
+# CONFIG_BOARD_INTEL_DG41WV is not set
+# CONFIG_BOARD_INTEL_DG43GT is not set
+# CONFIG_BOARD_INTEL_DQ67SW is not set
+# CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set
+# CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set
+# CONFIG_BOARD_INTEL_GLKRVP is not set
+# CONFIG_BOARD_INTEL_HARCUVAR is not set
+# CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
+# CONFIG_BOARD_INTEL_JASPERLAKE_RVP_EXT_EC is not set
+# CONFIG_BOARD_INTEL_KBLRVP3 is not set
+# CONFIG_BOARD_INTEL_KBLRVP7 is not set
+# CONFIG_BOARD_INTEL_KBLRVP8 is not set
+# CONFIG_BOARD_INTEL_KBLRVP11 is not set
+# CONFIG_BOARD_INTEL_KUNIMITSU is not set
+# CONFIG_BOARD_INTEL_LEAFHILL is not set
+# CONFIG_BOARD_INTEL_MINNOW3 is not set
+# CONFIG_BOARD_INTEL_MTLRVP_P is not set
+# CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
+# CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set
+# CONFIG_BOARD_INTEL_SKLSDLBRK is not set
+# CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
+# CONFIG_BOARD_INTEL_STRAGO is not set
+# CONFIG_BOARD_INTEL_TGLRVP_UP3 is not set
+# CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
+# CONFIG_BOARD_INTEL_WTM2 is not set
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_512=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_512=y
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=512
+CONFIG_ROM_SIZE=0x00080000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_INTEL_HAS_TOP_SWAP=y
+# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
+CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_106CX=y
+CONFIG_CPU_INTEL_SOCKET_441=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_I945=y
+CONFIG_NORTHBRIDGE_INTEL_SUBTYPE_I945GC=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_HPET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH7=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_LPC47M15X=y
+
+#
+# Embedded Controllers
+#
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
+CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_EDID=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_NULL=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+CONFIG_HAVE_MP_TABLE=y
+CONFIG_HAVE_PIRQ_TABLE=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_MP_TABLE=y
+CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+# CONFIG_DEBUG_PIRQ is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/d945gclf_512kb/target.cfg b/config/coreboot/d945gclf_512kb/target.cfg
new file mode 100644
index 00000000..4b9708e1
--- /dev/null
+++ b/config/coreboot/d945gclf_512kb/target.cfg
@@ -0,0 +1,9 @@
+tree="default"
+romtype="normal"
+arch="x86_32"
+payload_grub="n"
+payload_grub_withseabios="n"
+payload_seabios="y"
+payload_memtest="n"
+vendorfiles="n"
+microcode_required="n"
diff --git a/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode b/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
index 3bc5d2be..2c59d001 100644
--- a/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
@@ -208,6 +208,7 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_512=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -296,10 +297,11 @@ CONFIG_SMP=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-# CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS is not set
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
 # CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
 # CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-CONFIG_CPU_MICROCODE_CBFS_NONE=y
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
 
 #
 # Northbridge
@@ -492,7 +494,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console

From 82bd87fa160a4f37136ad04a33091b08eb48d829 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 Nov 2023 09:12:56 +0000
Subject: [PATCH 0027/1549] build/roms: re-add SeaGRUB build support

it didn't work in the past, but it does work nowadays;
specifically, it only worked with libgfxinit in the past,
but not on VGA ROMs.

now it does work on VGA ROMs, tested on e6400 and t1650 so
it was enabled there.

in this setup, a special image is provided where SeaBIOS is
the main payload, but it only loads GRUB; nothing else, every.

this is called SeaGRUB. this setup is useful in cases where
the user only has a GPU that lacks libgfxinit support.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/e6400_4mb/target.cfg  |  1 +
 config/coreboot/t1650_12mb/target.cfg |  1 +
 script/build/roms                     | 33 ++++++++++++++++++++++++---
 3 files changed, 32 insertions(+), 3 deletions(-)

diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index 4cbaf904..1a33f4ec 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -6,5 +6,6 @@ payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="y"
 payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
 microcode_required="n"
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index 3b1ace62..d018dba1 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -3,5 +3,6 @@ romtype="normal"
 arch="x86_64"
 payload_seabios="y"
 payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/script/build/roms b/script/build/roms
index f4356764..ff50d9b7 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -21,7 +21,7 @@ kmapdir="config/grub/keymap"
 # Disable all payloads by default.
 # target.cfg files have to specifically enable [a] payload(s)
 pv="payload_grub payload_grub_withseabios payload_seabios payload_memtest"
-pv="${pv} payload_seabios_withgrub payload_uboot memtest_bin"
+pv="${pv} payload_seabios_withgrub payload_seabios_grubonly payload_uboot memtest_bin"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree arch"
 v="${v} grub_timeout ubdir vendorfiles board grub_scan_disk uboot_config"
 eval "$(setvars "n" ${pv})"
@@ -93,6 +93,10 @@ check_target()
 		eval "$(setvars "y" payload_seabios payload_seabios_withgrub)"
 	[ "${payload_seabios_withgrub}" = "y" ] && \
 		payload_seabios="y"
+	if [ "${payload_seabios_grubonly}" = "y" ]; then
+		payload_seabios="y"
+		payload_seabios_withgrub="y"
+	fi
 
 	# The reverse logic must not be applied. If SeaBIOS-with-GRUB works,
 	# that doesn't mean GRUB-withSeaBIOS will. For example, the board
@@ -115,7 +119,8 @@ check_target()
 	[ -z "${_payload}" ] && return 0
 	printf "setting payload to: %s\n" "${_payload}"
 	eval "$(setvars "n" payload_grub payload_memtest payload_seabios \
-	    payload_seabios_withgrub payload_uboot payload_grub_withseabios)"
+	    payload_seabios_withgrub payload_uboot payload_grub_withseabios \
+	    payload_seabios_grubonly)"
 	eval "payload_${_payload}=y"
 }
 
@@ -157,7 +162,8 @@ build_dependency_seabios()
 build_dependency_grub()
 {
 	[ "${payload_grub}" != "y" ] && \
-	    [ "${payload_seabios_withgrub}" != "y" ] && return 0
+	    [ "${payload_seabios_withgrub}" != "y" ] && \
+	    [ "${payload_seabios_grubonly}" != "y" ] && return 0
 
 	rebuild_grub="n"
 	[ -f "${grubelf}" ] || rebuild_grub="y"
@@ -308,6 +314,8 @@ build_grub_roms()
 			newrom="${romdir}/${payload1}_${board}_" && \
 			newrom="${newrom}${initmode}_${keymap}.rom"
 		x_ moverom "${tmpgrubrom}" "${newrom}"
+		[ "${payload_seabios_grubonly}" = "y" ] && \
+			mkSeabiosGrubonlyRom "${tmpgrubrom}" "${newrom}"
 		x_ rm -f "${tmpgrubrom}"
 	done
 }
@@ -349,6 +357,25 @@ mkSeabiosRom() {
 	printf "%s\n" "${tmprom}"
 }
 
+# SeaGRUB configuration
+mkSeabiosGrubonlyRom()
+{
+	_grubrom="${1}"
+	_newrom="${2}"
+
+	tmpbootorder=$(mktemp -t coreboot_rom.XXXXXXXXXX)
+
+	# only load grub, by inserting a custom bootorder file
+	printf "/rom@img/grub2\n" > "${tmpbootorder}" || err "printf bootorder"
+	x_ "${cbfstool}" "${_grubrom}" \
+	    add -f "${tmpbootorder}" -n bootorder -t raw
+	x_ rm -f "${tmpbootorder}"
+
+	x_ "${cbfstool}" "${_grubrom}" add-int -i 0 -n etc/show-boot-menu
+
+	x_ moverom "${_grubrom}" "${_newrom%.rom}_grubonly.rom"
+}
+
 build_uboot_roms()
 {
 	tmprom="$(mkUbootRom "${cbrom}" "fallback/payload")"

From 1f1498be7421ae4500ad0d6d40ca0eefbcf8f1a2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 Nov 2023 10:34:05 +0000
Subject: [PATCH 0028/1549] Libreboot 20231101

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/e6430_12mb/target.cfg          |  6 ++++--
 config/git/www                                 |  2 +-
 ...y-the-name-libreboot-in-the-grub-menu.patch |  2 +-
 include/git.sh                                 |  4 +++-
 script/update/release                          | 18 ++++++++++++------
 script/vendor/inject                           |  4 +++-
 6 files changed, 24 insertions(+), 12 deletions(-)

diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index 7b790a99..1cf0792e 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -2,8 +2,10 @@ tree="default"
 romtype="normal"
 arch="x86_64"
 payload_grub="n"
-payload_seabios_withgrub="n"
+payload_grub_withseabios="n"
 payload_seabios="y"
-payload_seabios_withgrub="y"
 payload_memtest="y"
+payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
+microcode_required="n"
diff --git a/config/git/www b/config/git/www
index 0852ac31..ec9a6fe3 100644
--- a/config/git/www
+++ b/config/git/www
@@ -1,5 +1,5 @@
 {www}{
-	rev: f3001eae5724ef38fe512a378148a2d619a0ff24
+	rev: 6ebb88528e342cae48ee75a6f1bfa1b71002e1c3
 	loc: www
 	url: https://codeberg.org/libreboot/lbwww
 	bkup_url: https://git.disroot.org/libreboot/lbwww
diff --git a/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
index afc786b0..9beae162 100644
--- a/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..31308e16a 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20231021 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20231101 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/include/git.sh b/include/git.sh
index f97e5e61..fa53fed1 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -137,7 +137,9 @@ git_am_patches()
 	for patch in "${patchdir}/"*; do
 		[ -L "${patch}" ] && continue
 		[ -f "${patch}" ] || continue
-		if ! git am "${patch}"; then
+		patchfail="n"
+		git am "${patch}" || patchfail="y"
+		if [ "${patchfail}" = "y" ]; then
 			git am --abort || err  "${sdir}: !git am --abort"
 			err  "!git am ${patch} -> ${sdir}"
 		fi
diff --git a/script/update/release b/script/update/release
index 21fa8b61..4febec81 100755
--- a/script/update/release
+++ b/script/update/release
@@ -95,6 +95,7 @@ build_release()
 	# now test the vendor insert script, using the release archive:
 	(
 	cd "${srcdir}" || err "!cd ${srcdir}"
+	mkfakeroms
 	for vrom in ../roms/*.tar.xz; do
 		[ -f "${vrom}" ] || continue
 		case "${vrom}" in
@@ -129,11 +130,7 @@ fetch_trees()
 
 mkrom_images()
 {
-	# fake me.bin to make x201 roms build
-	mkdir -p "vendorfiles/cache/" || \
-	    err "mkvdir: !mkdir -p \"vendorfiles/cache/\""
-	dd if=/dev/zero of="vendorfiles/cache/x201_factory.rom" \
-	    bs=68k count=1 || err "mkvdir: can't make fake x201_factory.rom"
+	mkfakeroms
 
 	./build roms all || err "${_xm}: roms-all"
 	./build serprog rp2040 || err "${_xm}: rp2040"
@@ -147,6 +144,15 @@ mkrom_images()
 	mv "release/${version}/roms/" ../roms || err "${_xm}: copy roms/"
 }
 
+mkfakeroms()
+{
+	# fake me.bin to make x201 roms build
+	mkdir -p "vendorfiles/x201/" || \
+	    err "mkvdir: !mkdir -p \"vendorfiles/x201/\""
+	dd if=/dev/zero of="vendorfiles/x201/me.bin" \
+	    bs=68k count=1 || err "mkvdir: can't make fake x201 me.bin"
+}
+
 handle_rom_archive()
 {
 	builddir="${1}"
@@ -272,7 +278,7 @@ mktarball()
 	[ "${2%/*}" = "${2}" ] || mkdir -p "${2%/*}" || err "mk, !mkdir -p \"${2%/*}\""
 	if [ "${tar_implementation% *}" = "tar (GNU tar)" ]; then
 		tar --sort=name --owner=root:0 --group=root:0 \
-		    --mtime="UTC 2023-10-21" -c "${1}" | xz -T0 -9e > "${2}" || \
+		    --mtime="UTC 2023-11-01" -c "${1}" | xz -T0 -9e > "${2}" || \
 		    err "mktarball 1, ${1}"
 	else
 		# TODO: reproducible tarballs on non-GNU systems
diff --git a/script/vendor/inject b/script/vendor/inject
index db8004e4..93017cec 100755
--- a/script/vendor/inject
+++ b/script/vendor/inject
@@ -39,7 +39,9 @@ main()
 
 check_board()
 {
-	if ! check_release "${archive}" ; then
+	failcheck="n"
+	check_release "${archive}" || failcheck="y"
+	if [ "${failcheck}" = "y" ]; then
 		[ -f "${rom}" ] || \
 			err "check_board: \"${rom}\" is not a valid path"
 		[ -z "${rom+x}" ] && \

From 922bccf9f394451cabc15615bb9ca827e160b782 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Nov 2023 22:46:16 +0000
Subject: [PATCH 0029/1549] include untitled ssg in releases

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/untitled | 6 ++++++
 1 file changed, 6 insertions(+)
 create mode 100644 config/git/untitled

diff --git a/config/git/untitled b/config/git/untitled
new file mode 100644
index 00000000..2e8f2b52
--- /dev/null
+++ b/config/git/untitled
@@ -0,0 +1,6 @@
+{untitled}{
+	rev: 6941ffefe04375296732565a4628b549eea54a64
+	loc: untitled
+	url: https://codeberg.org/vimuser/untitled
+	bkup_url: https://notabug.org/untitled/untitled
+}

From dd1e15fd0b8033e5cd2066d04cf49af3ac28b2d7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Nov 2023 22:57:55 +0000
Subject: [PATCH 0030/1549] merge untitled with docs, in releases

with this, you can just do:

cd src/docs

./build

the html files would then be available for
publishing, if you wish, or you could set up
a local httpd to view them.

if you have pandoc installed, this will build the
markdown files into html

untitled static site generator is what generates
the html files, from the markdown files, on the
website. it will now also be included in releases.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/docs     | 14 ++++++++++++++
 config/git/untitled |  6 ------
 config/git/www      |  6 ------
 3 files changed, 14 insertions(+), 12 deletions(-)
 create mode 100644 config/git/docs
 delete mode 100644 config/git/untitled
 delete mode 100644 config/git/www

diff --git a/config/git/docs b/config/git/docs
new file mode 100644
index 00000000..1bd8dc3a
--- /dev/null
+++ b/config/git/docs
@@ -0,0 +1,14 @@
+{docs}{
+	rev: 6941ffefe04375296732565a4628b549eea54a64
+	loc: docs
+	url: https://codeberg.org/vimuser/untitled
+	bkup_url: https://notabug.org/untitled/untitled
+	depend: mdfiles
+}
+
+{mdfiles}{
+	rev: 6ebb88528e342cae48ee75a6f1bfa1b71002e1c3
+	loc: docs/www/html
+	url: https://codeberg.org/libreboot/lbwww
+	bkup_url: https://git.disroot.org/libreboot/lbwww
+}
diff --git a/config/git/untitled b/config/git/untitled
deleted file mode 100644
index 2e8f2b52..00000000
--- a/config/git/untitled
+++ /dev/null
@@ -1,6 +0,0 @@
-{untitled}{
-	rev: 6941ffefe04375296732565a4628b549eea54a64
-	loc: untitled
-	url: https://codeberg.org/vimuser/untitled
-	bkup_url: https://notabug.org/untitled/untitled
-}
diff --git a/config/git/www b/config/git/www
deleted file mode 100644
index ec9a6fe3..00000000
--- a/config/git/www
+++ /dev/null
@@ -1,6 +0,0 @@
-{www}{
-	rev: 6ebb88528e342cae48ee75a6f1bfa1b71002e1c3
-	loc: www
-	url: https://codeberg.org/libreboot/lbwww
-	bkup_url: https://git.disroot.org/libreboot/lbwww
-}

From c5fd0069a6edc20020f19c1192b03a7ad827b766 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sat, 4 Nov 2023 16:00:07 -0600
Subject: [PATCH 0031/1549] Enable VBT for E6430

The original E6430 patch included the Intel VBT file, but did not
actually enable it in Kconfig. Update the patch to enable it and
update the E6430 configs.
---
 ...22-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch | 15 ++++++++-------
 .../e6430_12mb/config/libgfxinit_corebootfb       |  1 +
 .../coreboot/e6430_12mb/config/libgfxinit_txtmode |  1 +
 3 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch b/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch
index e38f243d..586992c9 100644
--- a/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch
+++ b/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch
@@ -1,7 +1,7 @@
-From db1cb588b64f17c7ed08201bf1e09ab5393e4b04 Mon Sep 17 00:00:00 2001
+From b37175381a32d9d308b5c1d67e11cdc57a24c820 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sat, 19 Aug 2023 16:19:10 -0600
-Subject: [PATCH 22/22] mb/dell: Add Latitude E6430 (Ivy Bridge)
+Subject: [PATCH] mb/dell: Add Latitude E6430 (Ivy Bridge)
 
 Mainboard is QAL80/LA-7781P (UMA). The dGPU model was not tested.
 This is based on the autoport output with some manual tweaks. The flash
@@ -44,7 +44,7 @@ Unknown/untested:
 Change-Id: I93c6622fc5da1d0d61a5b2c197ac7227d9525908
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
 ---
- src/mainboard/dell/e6430/Kconfig           |  36 ++++
+ src/mainboard/dell/e6430/Kconfig           |  37 ++++
  src/mainboard/dell/e6430/Kconfig.name      |   2 +
  src/mainboard/dell/e6430/Makefile.inc      |   6 +
  src/mainboard/dell/e6430/acpi/ec.asl       |   9 +
@@ -62,7 +62,7 @@ Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
  src/mainboard/dell/e6430/gpio.c            | 192 +++++++++++++++++++++
  src/mainboard/dell/e6430/hda_verb.c        |  33 ++++
  src/mainboard/dell/e6430/mainboard.c       |  21 +++
- 18 files changed, 589 insertions(+)
+ 18 files changed, 590 insertions(+)
  create mode 100644 src/mainboard/dell/e6430/Kconfig
  create mode 100644 src/mainboard/dell/e6430/Kconfig.name
  create mode 100644 src/mainboard/dell/e6430/Makefile.inc
@@ -84,10 +84,10 @@ Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
 
 diff --git a/src/mainboard/dell/e6430/Kconfig b/src/mainboard/dell/e6430/Kconfig
 new file mode 100644
-index 0000000000..3178d12aff
+index 0000000000..ea691aeb4e
 --- /dev/null
 +++ b/src/mainboard/dell/e6430/Kconfig
-@@ -0,0 +1,36 @@
+@@ -0,0 +1,37 @@
 +if BOARD_DELL_LATITUDE_E6430
 +
 +config BOARD_SPECIFIC_OPTIONS
@@ -100,6 +100,7 @@ index 0000000000..3178d12aff
 +	select HAVE_ACPI_TABLES
 +	select HAVE_CMOS_DEFAULT
 +	select HAVE_OPTION_TABLE
++	select INTEL_GMA_HAVE_VBT
 +	select INTEL_INT15
 +	select MAINBOARD_HAS_LIBGFXINIT
 +	select MAINBOARD_USES_IFD_GBE_REGION
@@ -816,5 +817,5 @@ index 0000000000..31e49802fc
 +	.enable_dev = mainboard_enable,
 +};
 -- 
-2.39.2
+2.42.0
 
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 96588456..bd56a6c3 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -394,6 +394,7 @@ CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index c7e351f0..8896ed0f 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -390,6 +390,7 @@ CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000

From f870a2feedca69b65b1d09c5b73cd694b4c26730 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 11:43:39 +0000
Subject: [PATCH 0032/1549] Dell E6430: use ME Soft Temporary Disable

me_state=Disabled in cmos.default

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...-e6430-use-ME-Soft-Temporary-Disable.patch | 30 +++++++++++++++++++
 1 file changed, 30 insertions(+)
 create mode 100644 config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch

diff --git a/config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch b/config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch
new file mode 100644
index 00000000..a2f98404
--- /dev/null
+++ b/config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch
@@ -0,0 +1,30 @@
+From e712efdaf46a09a107c88a273d9b00effb4d977e Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 11:41:41 +0000
+Subject: [PATCH 1/1] dell/e6430: use ME Soft Temporary Disable
+
+i overlooked this. it's set on other boards.
+
+we use me_cleaner anyway, and we set the hap bit, but
+this additional setting takes effect even if the ME
+region is unaltered. it's just another layer of
+disablement, to absolutely ensure Intel ME is not alive
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/mainboard/dell/e6430/cmos.default | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/mainboard/dell/e6430/cmos.default b/src/mainboard/dell/e6430/cmos.default
+index 2a5b30f2b7..279415dfd1 100644
+--- a/src/mainboard/dell/e6430/cmos.default
++++ b/src/mainboard/dell/e6430/cmos.default
+@@ -6,4 +6,4 @@ bluetooth=Enable
+ wwan=Enable
+ wlan=Enable
+ sata_mode=AHCI
+-me_state=Normal
++me_state=Disabled
+-- 
+2.39.2
+

From 742c00331e5a12d1565e75e035f9f345b51914e5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 11:58:19 +0000
Subject: [PATCH 0033/1549] coreboot/dell: move e6400 to new tree, dell

the ddr2 fix broke *ddr3* on gm45 thinkpads in
testing, depending on memory modules. this was
established by removing patches, re-doing
configs etc, on a user's X200 (testing gentoo
and freebsd). the X200 kept randomly rebooting
or having random glitches.

the configs themselves (gm45 thinkpads) will
also be re-done, because i found minor issues
unrelated, but this patch moves dell e6400 to
its own tree. the ddr2 fix is no longer present
in coreboot/default, only coreboot/dell.

i noticed minor differences in gm45 thinkpad
configs, when re-doing the configs, versus
what are currently in lbmk master; for instance,
vbt was not enabled anymore, on thinkpad x200.
modifications to these will be done separately.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...ool-add-nuke-flag-all-0xFF-on-region.patch | 205 +++++++++++
 ...-x200-t400-Revert-cpu-intel-model_10.patch |  47 +++
 ...e-CPUs-don-t-enable-alternative-SMRR.patch | 173 +++++++++
 ...able-01.0-device-in-devicetree-for-d.patch |  28 ++
 ...or-coreboot-images-built-without-a-p.patch |  39 ++
 ...Add-command-to-enable-disable-radios.patch |  61 ++++
 ...-Hook-up-radio-enables-to-option-API.patch |  37 ++
 ...t-use-github-for-the-acpica-download.patch |  39 ++
 ...ring-HEAP_SIZE-to-a-common-large-val.patch | 341 ++++++++++++++++++
 ...nb-intel-gm45-Make-DDR2-raminit-work.patch |   0
 ...vram-allocation-on-more-intel-boards.patch | 142 ++++++++
 config/coreboot/dell/target.cfg               |   4 +
 .../e6400_4mb/config/libgfxinit_corebootfb    |   1 -
 .../e6400_4mb/config/libgfxinit_txtmode       |   1 -
 config/coreboot/e6400_4mb/target.cfg          |   2 +-
 15 files changed, 1117 insertions(+), 3 deletions(-)
 create mode 100644 config/coreboot/dell/patches/0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
 create mode 100644 config/coreboot/dell/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
 create mode 100644 config/coreboot/dell/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
 create mode 100644 config/coreboot/dell/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
 create mode 100644 config/coreboot/dell/patches/0019-Remove-warning-for-coreboot-images-built-without-a-p.patch
 create mode 100644 config/coreboot/dell/patches/0020-ec-dell-mec5035-Add-command-to-enable-disable-radios.patch
 create mode 100644 config/coreboot/dell/patches/0021-ec-dell-mec5035-Hook-up-radio-enables-to-option-API.patch
 create mode 100644 config/coreboot/dell/patches/0024-don-t-use-github-for-the-acpica-download.patch
 create mode 100644 config/coreboot/dell/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
 rename config/coreboot/{default => dell}/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch (100%)
 create mode 100644 config/coreboot/dell/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
 create mode 100644 config/coreboot/dell/target.cfg

diff --git a/config/coreboot/dell/patches/0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/dell/patches/0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
new file mode 100644
index 00000000..6a293287
--- /dev/null
+++ b/config/coreboot/dell/patches/0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -0,0 +1,205 @@
+From 38c76afbea4abfed2976bfbe10977e41f21665b0 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 19 Feb 2023 18:21:43 +0000
+Subject: [PATCH 15/22] util/ifdtool: add --nuke flag (all 0xFF on region)
+
+When this option is used, the region's contents are overwritten
+with all ones (0xFF).
+
+Example:
+
+./ifdtool --nuke gbe coreboot.rom
+./ifdtool --nuke bios coreboot.com
+./ifdtool --nuke me coreboot.com
+
+Rebased since the last revision update in lbmk.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
+ 1 file changed, 83 insertions(+), 31 deletions(-)
+
+diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
+index ddbc0fb91b..7af9235ae3 100644
+--- a/util/ifdtool/ifdtool.c
++++ b/util/ifdtool/ifdtool.c
+@@ -1847,6 +1847,7 @@ static void print_usage(const char *name)
+ 	       "                                         wbg    - Wellsburg\n"
+ 	       "   -S | --setpchstrap                    Write a PCH strap\n"
+ 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
++	       "   -N | --nuke <region>                  Overwrite the specified region with 0xFF (all ones)\n"
+ 	       "   -v | --version:                       print the version\n"
+ 	       "   -h | --help:                          print this help\n\n"
+ 	       "<region> is one of Descriptor, BIOS, ME, GbE, Platform Data, Secondary BIOS, "
+@@ -1854,6 +1855,60 @@ static void print_usage(const char *name)
+ 	       "\n");
+ }
+ 
++static int
++get_region_type_string(const char *region_type_string)
++{
++	if (!strcasecmp("Descriptor", region_type_string))
++		return 0;
++	else if (!strcasecmp("BIOS", region_type_string))
++		return 1;
++	else if (!strcasecmp("ME", region_type_string))
++		return 2;
++	else if (!strcasecmp("GbE", region_type_string))
++		return 3;
++	else if (!strcasecmp("Platform Data", region_type_string))
++		return 4;
++	else if (!strcasecmp("Device Exp1", region_type_string))
++		return 5;
++	else if (!strcasecmp("Secondary BIOS", region_type_string))
++		return 6;
++	else if (!strcasecmp("Reserved", region_type_string))
++		return 7;
++	else if (!strcasecmp("EC", region_type_string))
++		return 8;
++	else if (!strcasecmp("Device Exp2", region_type_string))
++		return 9;
++	else if (!strcasecmp("IE", region_type_string))
++		return 10;
++	else if (!strcasecmp("10GbE_0", region_type_string))
++		return 11;
++	else if (!strcasecmp("10GbE_1", region_type_string))
++		return 12;
++	else if (!strcasecmp("PTT", region_type_string))
++		return 15;
++	return -1;
++}
++
++static void
++nuke(const char *filename, char *image, int size, int region_type)
++{
++	int i;
++	struct region region;
++	const struct frba *frba = find_frba(image, size);
++	if (!frba)
++		exit(EXIT_FAILURE);
++
++	region = get_region(frba, region_type);
++	if (region.size > 0) {
++		for (i = region.base; i <= region.limit; i++) {
++			if ((i + 1) > (size))
++				break;
++			image[i] = 0xFF;
++		}
++		write_image(filename, image, size);
++	}
++}
++
+ int main(int argc, char *argv[])
+ {
+ 	int opt, option_index = 0;
+@@ -1861,6 +1916,7 @@ int main(int argc, char *argv[])
+ 	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
+ 	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
+ 	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
++	int mode_nuke = 0;
+ 	char *region_type_string = NULL, *region_fname = NULL;
+ 	const char *layout_fname = NULL;
+ 	char *new_filename = NULL;
+@@ -1892,6 +1948,7 @@ int main(int argc, char *argv[])
+ 		{"validate", 0, NULL, 't'},
+ 		{"setpchstrap", 1, NULL, 'S'},
+ 		{"newvalue", 1, NULL, 'V'},
++		{"nuke", 1, NULL, 'N'},
+ 		{0, 0, 0, 0}
+ 	};
+ 
+@@ -1941,35 +1998,8 @@ int main(int argc, char *argv[])
+ 			region_fname++;
+ 			// Descriptor, BIOS, ME, GbE, Platform
+ 			// valid type?
+-			if (!strcasecmp("Descriptor", region_type_string))
+-				region_type = 0;
+-			else if (!strcasecmp("BIOS", region_type_string))
+-				region_type = 1;
+-			else if (!strcasecmp("ME", region_type_string))
+-				region_type = 2;
+-			else if (!strcasecmp("GbE", region_type_string))
+-				region_type = 3;
+-			else if (!strcasecmp("Platform Data", region_type_string))
+-				region_type = 4;
+-			else if (!strcasecmp("Device Exp1", region_type_string))
+-				region_type = 5;
+-			else if (!strcasecmp("Secondary BIOS", region_type_string))
+-				region_type = 6;
+-			else if (!strcasecmp("Reserved", region_type_string))
+-				region_type = 7;
+-			else if (!strcasecmp("EC", region_type_string))
+-				region_type = 8;
+-			else if (!strcasecmp("Device Exp2", region_type_string))
+-				region_type = 9;
+-			else if (!strcasecmp("IE", region_type_string))
+-				region_type = 10;
+-			else if (!strcasecmp("10GbE_0", region_type_string))
+-				region_type = 11;
+-			else if (!strcasecmp("10GbE_1", region_type_string))
+-				region_type = 12;
+-			else if (!strcasecmp("PTT", region_type_string))
+-				region_type = 15;
+-			if (region_type == -1) {
++			if ((region_type =
++			    get_region_type_string(region_type_string)) == -1) {
+ 				fprintf(stderr, "No such region type: '%s'\n\n",
+ 					region_type_string);
+ 				fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
+@@ -2135,6 +2165,22 @@ int main(int argc, char *argv[])
+ 		case 't':
+ 			mode_validate = 1;
+ 			break;
++               case 'N':
++                       region_type_string = strdup(optarg);
++                       if (!region_type_string) {
++                               fprintf(stderr, "No region specified\n");
++                               print_usage(argv[0]);
++                               exit(EXIT_FAILURE);
++                       }
++                       if ((region_type =
++                           get_region_type_string(region_type_string)) == -1) {
++                               fprintf(stderr, "No such region type: '%s'\n\n",
++                                       region_type_string);
++                               print_usage(argv[0]);
++                               exit(EXIT_FAILURE);
++                       }
++                       mode_nuke = 1;
++                       break;
+ 		case 'v':
+ 			print_version();
+ 			exit(EXIT_SUCCESS);
+@@ -2150,7 +2196,8 @@ int main(int argc, char *argv[])
+ 
+ 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
+ 			mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
+-			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate) > 1) {
++			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
++			mode_nuke) > 1) {
+ 		fprintf(stderr, "You may not specify more than one mode.\n\n");
+ 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
+ 		exit(EXIT_FAILURE);
+@@ -2158,7 +2205,8 @@ int main(int argc, char *argv[])
+ 
+ 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
+ 			mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
+-			mode_locked + mode_unlocked + mode_density + mode_altmedisable + mode_validate) == 0) {
++			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
++			mode_validate + mode_nuke) == 0) {
+ 		fprintf(stderr, "You need to specify a mode.\n\n");
+ 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
+ 		exit(EXIT_FAILURE);
+@@ -2262,6 +2310,10 @@ int main(int argc, char *argv[])
+ 		write_image(new_filename, image, size);
+ 	}
+ 
++	if (mode_nuke) {
++               nuke(new_filename, image, size, region_type);
++       }
++
+ 	if (mode_altmedisable) {
+ 		struct fpsba *fpsba = find_fpsba(image, size);
+ 		struct fmsba *fmsba = find_fmsba(image, size);
+-- 
+2.39.2
+
diff --git a/config/coreboot/dell/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch b/config/coreboot/dell/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
new file mode 100644
index 00000000..0f9b192d
--- /dev/null
+++ b/config/coreboot/dell/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
@@ -0,0 +1,47 @@
+From 3ec06fa2393995b87af1dbc0387c5d3255d5c0db Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Wed, 1 Dec 2021 02:53:00 +0000
+Subject: [PATCH 16/22] fix speedstep on x200/t400: Revert
+ "cpu/intel/model_1067x: enable PECI"
+
+This reverts commit 70fea013c7ebd6d85a7806748233fcfd76802f5f.
+
+Enabling PECI without microcode updates loaded causes the CPUID feature set
+to become corrupted. And one consequence is broken SpeedStep. At least, that's
+my understanding looking at Intel Errata. This revert is not a fix, because
+upstream is correct (upstream assumes microcode updates). We will simply
+maintain this revert patch in Libreboot, from now on.
+---
+ src/cpu/intel/model_1067x/model_1067x_init.c | 9 ---------
+ 1 file changed, 9 deletions(-)
+
+diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
+index 315e7c36fc..1423fd72bc 100644
+--- a/src/cpu/intel/model_1067x/model_1067x_init.c
++++ b/src/cpu/intel/model_1067x/model_1067x_init.c
+@@ -141,8 +141,6 @@ static void configure_emttm_tables(void)
+ 	wrmsr(MSR_EMTTM_CR_TABLE(5), msr);
+ }
+ 
+-#define IA32_PECI_CTL		0x5a0
+-
+ static void configure_misc(const int eist, const int tm2, const int emttm)
+ {
+ 	msr_t msr;
+@@ -185,13 +183,6 @@ static void configure_misc(const int eist, const int tm2, const int emttm)
+ 		msr.lo |= (1 << 20);	/* Lock Enhanced SpeedStep Enable */
+ 		wrmsr(IA32_MISC_ENABLE, msr);
+ 	}
+-
+-	/* Enable PECI
+-	   WARNING: due to Erratum AW67 described in Intel document #318733
+-	   the microcode must be updated before this MSR is written to. */
+-	msr = rdmsr(IA32_PECI_CTL);
+-	msr.lo |= 1;
+-	wrmsr(IA32_PECI_CTL, msr);
+ }
+ 
+ #define PIC_SENS_CFG	0x1aa
+-- 
+2.39.2
+
diff --git a/config/coreboot/dell/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch b/config/coreboot/dell/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
new file mode 100644
index 00000000..4d7b3421
--- /dev/null
+++ b/config/coreboot/dell/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
@@ -0,0 +1,173 @@
+From fdde15b69bd5c8bf54339adf3581a32fa992a503 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 17 Apr 2023 15:49:57 +0100
+Subject: [PATCH 17/22] GM45-type CPUs: don't enable alternative SMRR
+
+This reverts the changes in coreboot revision:
+df7aecd92643d207feaf7fd840f8835097346644
+
+While this fix is *technically correct*, the one in
+coreboot, it breaks rebooting as tested on several
+GM45 ThinkPads e.g. X200, T400, when microcode
+updates are not applied.
+
+Since November 2022, Libreboot includes microcode
+updates by default, but it tells users how to remove
+it from the ROM (with cbfstool) if they wish.
+
+Well, with Libreboot 20221214, 20230319 and 20230413,
+mitigations present in Libreboot 20220710 (which did
+not have microcode updates) do not exist.
+
+This patch, along with the other patch to remove PECI
+support (which breaks speedstep when microcode updates
+are not applied) have now been re-added to Libreboot.
+
+It is still best to use microcode updates by default.
+These patches in coreboot are not critically urgent,
+and you can use the machines with or without them,
+regardless of ucode.
+
+I'll probably re-write this and the other patch at
+some point, applying the change conditionally upon
+whether or not microcode is applied.
+
+Pragmatism is a good thing. I recommend it.
+---
+ src/cpu/intel/model_1067x/model_1067x_init.c |  4 +++
+ src/cpu/intel/model_1067x/mp_init.c          | 26 --------------------
+ src/cpu/intel/model_106cx/model_106cx_init.c |  4 +++
+ src/cpu/intel/model_6ex/model_6ex_init.c     |  4 +++
+ src/cpu/intel/model_6fx/model_6fx_init.c     |  4 +++
+ 5 files changed, 16 insertions(+), 26 deletions(-)
+
+diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
+index 1423fd72bc..d1f98ca43a 100644
+--- a/src/cpu/intel/model_1067x/model_1067x_init.c
++++ b/src/cpu/intel/model_1067x/model_1067x_init.c
+@@ -8,6 +8,7 @@
+ #include <cpu/x86/cache.h>
+ #include <cpu/x86/name.h>
+ #include <cpu/intel/smm_reloc.h>
++#include <cpu/intel/common/common.h>
+ 
+ #define MSR_BBL_CR_CTL3		0x11e
+ 
+@@ -234,6 +235,9 @@ static void model_1067x_init(struct device *cpu)
+ 	fill_processor_name(processor_name);
+ 	printk(BIOS_INFO, "CPU: %s.\n", processor_name);
+ 
++	/* Set virtualization based on Kconfig option */
++	set_vmx_and_lock();
++
+ 	/* Configure C States */
+ 	configure_c_states(quad);
+ 
+diff --git a/src/cpu/intel/model_1067x/mp_init.c b/src/cpu/intel/model_1067x/mp_init.c
+index bc53214310..72f40f6762 100644
+--- a/src/cpu/intel/model_1067x/mp_init.c
++++ b/src/cpu/intel/model_1067x/mp_init.c
+@@ -43,34 +43,8 @@ static void pre_mp_smm_init(void)
+ 	smm_initialize();
+ }
+ 
+-#define SMRR_SUPPORTED (1 << 11)
+-
+ static void per_cpu_smm_trigger(void)
+ {
+-	msr_t mtrr_cap = rdmsr(MTRR_CAP_MSR);
+-	if (cpu_has_alternative_smrr() && mtrr_cap.lo & SMRR_SUPPORTED) {
+-		set_feature_ctrl_vmx();
+-		msr_t ia32_ft_ctrl = rdmsr(IA32_FEATURE_CONTROL);
+-		/* We don't care if the lock is already setting
+-		   as our smm relocation handler is able to handle
+-		   setups where SMRR is not enabled here. */
+-		if (ia32_ft_ctrl.lo & (1 << 0)) {
+-			/* IA32_FEATURE_CONTROL locked. If we set it again we
+-			   get an illegal instruction. */
+-			printk(BIOS_DEBUG, "IA32_FEATURE_CONTROL already locked\n");
+-			printk(BIOS_DEBUG, "SMRR status: %senabled\n",
+-			       ia32_ft_ctrl.lo & (1 << 3) ? "" : "not ");
+-		} else {
+-			if (!CONFIG(SET_IA32_FC_LOCK_BIT))
+-				printk(BIOS_INFO,
+-				       "Overriding CONFIG(SET_IA32_FC_LOCK_BIT) to enable SMRR\n");
+-			ia32_ft_ctrl.lo |= (1 << 3) | (1 << 0);
+-			wrmsr(IA32_FEATURE_CONTROL, ia32_ft_ctrl);
+-		}
+-	} else {
+-		set_vmx_and_lock();
+-	}
+-
+ 	/* Relocate the SMM handler. */
+ 	smm_relocate();
+ }
+diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
+index 05f5f327cc..0450c2ad83 100644
+--- a/src/cpu/intel/model_106cx/model_106cx_init.c
++++ b/src/cpu/intel/model_106cx/model_106cx_init.c
+@@ -7,6 +7,7 @@
+ #include <cpu/intel/speedstep.h>
+ #include <cpu/x86/cache.h>
+ #include <cpu/x86/name.h>
++#include <cpu/intel/common/common.h>
+ 
+ #define HIGHEST_CLEVEL		3
+ static void configure_c_states(void)
+@@ -66,6 +67,9 @@ static void model_106cx_init(struct device *cpu)
+ 	fill_processor_name(processor_name);
+ 	printk(BIOS_INFO, "CPU: %s.\n", processor_name);
+ 
++	/* Set virtualization based on Kconfig option */
++	set_vmx_and_lock();
++
+ 	/* Configure C States */
+ 	configure_c_states();
+ 
+diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c
+index 5bd1c32815..f3bb08cde3 100644
+--- a/src/cpu/intel/model_6ex/model_6ex_init.c
++++ b/src/cpu/intel/model_6ex/model_6ex_init.c
+@@ -7,6 +7,7 @@
+ #include <cpu/intel/speedstep.h>
+ #include <cpu/x86/cache.h>
+ #include <cpu/x86/name.h>
++#include <cpu/intel/common/common.h>
+ 
+ #define HIGHEST_CLEVEL		3
+ static void configure_c_states(void)
+@@ -105,6 +106,9 @@ static void model_6ex_init(struct device *cpu)
+ 	/* Setup Page Attribute Tables (PAT) */
+ 	// TODO set up PAT
+ 
++	/* Set virtualization based on Kconfig option */
++	set_vmx_and_lock();
++
+ 	/* Configure C States */
+ 	configure_c_states();
+ 
+diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c
+index 535fb8fae7..f7b05facd2 100644
+--- a/src/cpu/intel/model_6fx/model_6fx_init.c
++++ b/src/cpu/intel/model_6fx/model_6fx_init.c
+@@ -7,6 +7,7 @@
+ #include <cpu/intel/speedstep.h>
+ #include <cpu/x86/cache.h>
+ #include <cpu/x86/name.h>
++#include <cpu/intel/common/common.h>
+ 
+ #define HIGHEST_CLEVEL		3
+ static void configure_c_states(void)
+@@ -118,6 +119,9 @@ static void model_6fx_init(struct device *cpu)
+ 	/* Setup Page Attribute Tables (PAT) */
+ 	// TODO set up PAT
+ 
++	/* Set virtualization based on Kconfig option */
++	set_vmx_and_lock();
++
+ 	/* Configure C States */
+ 	configure_c_states();
+ 
+-- 
+2.39.2
+
diff --git a/config/coreboot/dell/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch b/config/coreboot/dell/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
new file mode 100644
index 00000000..04f3bd63
--- /dev/null
+++ b/config/coreboot/dell/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
@@ -0,0 +1,28 @@
+From a65797a9e7e610b1c916cb4d275b72848622c218 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Sat, 6 May 2023 15:53:41 -0600
+Subject: [PATCH 18/22] mb/dell/e6400: Enable 01.0 device in devicetree for
+ dGPU models
+
+Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e6400/devicetree.cb | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/mainboard/dell/e6400/devicetree.cb b/src/mainboard/dell/e6400/devicetree.cb
+index bb954cbd7b..e9f3915d17 100644
+--- a/src/mainboard/dell/e6400/devicetree.cb
++++ b/src/mainboard/dell/e6400/devicetree.cb
+@@ -19,7 +19,7 @@ chip northbridge/intel/gm45
+ 		ops gm45_pci_domain_ops
+ 
+ 		device pci 00.0 on end # host bridge
+-		device pci 01.0 off end
++		device pci 01.0 on end
+ 		device pci 02.0 on end # VGA
+ 		device pci 02.1 on end # Display
+ 		device pci 03.0 on end # ME
+-- 
+2.39.2
+
diff --git a/config/coreboot/dell/patches/0019-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/dell/patches/0019-Remove-warning-for-coreboot-images-built-without-a-p.patch
new file mode 100644
index 00000000..3f21ad02
--- /dev/null
+++ b/config/coreboot/dell/patches/0019-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -0,0 +1,39 @@
+From 7d5452bc3358cf82eea48fde312494bcb4ca8101 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 12 May 2023 19:55:15 -0600
+Subject: [PATCH 19/22] Remove warning for coreboot images built without a
+ payload
+
+I added this in upstream to prevent people from accidentally flashing
+roms without a payload resulting in a no boot situation, but in
+libreboot lbmk handles the payload and thus this warning always comes
+up. This has caused confusion and concern so just patch it out.
+---
+ payloads/Makefile.inc | 13 +------------
+ 1 file changed, 1 insertion(+), 12 deletions(-)
+
+diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc
+index e735443a76..4f1692a873 100644
+--- a/payloads/Makefile.inc
++++ b/payloads/Makefile.inc
+@@ -49,16 +49,5 @@ distclean-payloads:
+ print-repo-info-payloads:
+ 	-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
+ 
+-ifeq ($(CONFIG_PAYLOAD_NONE),y)
+-files_added:: warn_no_payload
+-endif
+-
+-warn_no_payload:
+-	printf "\n\t** WARNING **\n"
+-	printf "coreboot has been built without a payload. Writing\n"
+-	printf "a coreboot image without a payload to your board's\n"
+-	printf "flash chip will result in a non-booting system. You\n"
+-	printf "can use cbfstool to add a payload to the image.\n\n"
+-
+ .PHONY: force-payload coreinfo nvramcui
+-.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
++.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
+-- 
+2.39.2
+
diff --git a/config/coreboot/dell/patches/0020-ec-dell-mec5035-Add-command-to-enable-disable-radios.patch b/config/coreboot/dell/patches/0020-ec-dell-mec5035-Add-command-to-enable-disable-radios.patch
new file mode 100644
index 00000000..2f2cddfe
--- /dev/null
+++ b/config/coreboot/dell/patches/0020-ec-dell-mec5035-Add-command-to-enable-disable-radios.patch
@@ -0,0 +1,61 @@
+From f0db13a15c76c2947eec8919fd121450048914ce Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Sun, 27 Aug 2023 17:36:36 -0600
+Subject: [PATCH 20/22] ec/dell/mec5035: Add command to enable/disable radios
+
+These were determined by sniffing the LPC bus while toggling the
+hardware wireless switch on the Latitude E6400. To differentiate devices
+options in the vendor BIOS to change which radios the switch controlled
+were used.
+
+Change-Id: I173dc197d63cda232dd7ede0cb798ab0a364482b
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/ec/dell/mec5035/mec5035.c | 9 +++++++++
+ src/ec/dell/mec5035/mec5035.h | 8 ++++++++
+ 2 files changed, 17 insertions(+)
+
+diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
+index 8da11e5b1c..e0335a4635 100644
+--- a/src/ec/dell/mec5035/mec5035.c
++++ b/src/ec/dell/mec5035/mec5035.c
+@@ -84,6 +84,15 @@ u8 mec5035_mouse_touchpad(u8 setting)
+ 	return buf[0];
+ }
+ 
++void mec5035_radio_enable(enum mec5035_radio_dev dev, u8 on)
++{
++	/* From LPC traces and userspace testing with other values,
++	   the second byte has to be 2 for an unknown reason. */
++	u8 buf[3] = {dev, 2, on};
++	write_mailbox_regs(buf, 2, 3);
++	ec_command(CMD_RADIO_EN);
++}
++
+ void mec5035_early_init(void)
+ {
+ 	/* If this isn't sent the EC shuts down the system after about 15
+diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
+index e7a05b64d4..16512e2cc2 100644
+--- a/src/ec/dell/mec5035/mec5035.h
++++ b/src/ec/dell/mec5035/mec5035.h
+@@ -16,8 +16,16 @@
+ 
+ #define CMD_CPU_OK	0xc2
+ 
++#define CMD_RADIO_EN	0x2b
++enum mec5035_radio_dev {
++	RADIO_WLAN = 0,
++	RADIO_WWAN = 1,
++	RADIO_WPAN = 2,
++};
++
+ u8 mec5035_mouse_touchpad(u8 setting);
+ void mec5035_cpu_ok(void);
+ void mec5035_early_init(void);
++void mec5035_radio_enable(enum mec5035_radio_dev device, u8 on);
+ 
+ #endif /* _EC_DELL_MEC5035_H_ */
+-- 
+2.39.2
+
diff --git a/config/coreboot/dell/patches/0021-ec-dell-mec5035-Hook-up-radio-enables-to-option-API.patch b/config/coreboot/dell/patches/0021-ec-dell-mec5035-Hook-up-radio-enables-to-option-API.patch
new file mode 100644
index 00000000..d02ad724
--- /dev/null
+++ b/config/coreboot/dell/patches/0021-ec-dell-mec5035-Hook-up-radio-enables-to-option-API.patch
@@ -0,0 +1,37 @@
+From 4537c365dae010645404fdb5d2d4e5f478dede67 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Sun, 27 Aug 2023 19:15:37 -0600
+Subject: [PATCH 21/22] ec/dell/mec5035: Hook up radio enables to option API
+
+Change-Id: I52de5ea3d24b400a93adee7a6207a4439eac61db
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/ec/dell/mec5035/mec5035.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
+index e0335a4635..20a33cc0ad 100644
+--- a/src/ec/dell/mec5035/mec5035.c
++++ b/src/ec/dell/mec5035/mec5035.c
+@@ -4,6 +4,7 @@
+ #include <console/console.h>
+ #include <device/device.h>
+ #include <device/pnp.h>
++#include <option.h>
+ #include <pc80/keyboard.h>
+ #include <stdint.h>
+ #include "mec5035.h"
+@@ -108,6 +109,10 @@ static void mec5035_init(struct device *dev)
+ 	mec5035_mouse_touchpad(TP_PS2_MOUSE);
+ 
+ 	pc_keyboard_init(NO_AUX_DEVICE);
++
++	mec5035_radio_enable(RADIO_WLAN, get_uint_option("wlan", 1));
++	mec5035_radio_enable(RADIO_WWAN, get_uint_option("wwan", 1));
++	mec5035_radio_enable(RADIO_WPAN, get_uint_option("bluetooth", 1));
+ }
+ 
+ static struct device_operations ops = {
+-- 
+2.39.2
+
diff --git a/config/coreboot/dell/patches/0024-don-t-use-github-for-the-acpica-download.patch b/config/coreboot/dell/patches/0024-don-t-use-github-for-the-acpica-download.patch
new file mode 100644
index 00000000..2c4c9e5f
--- /dev/null
+++ b/config/coreboot/dell/patches/0024-don-t-use-github-for-the-acpica-download.patch
@@ -0,0 +1,39 @@
+From cddb709fd01e3e93a7879488d0d4024360e1e3d9 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 22 Oct 2023 15:02:25 +0100
+Subject: [PATCH 1/1] don't use github for the acpica download
+
+i have the tarball from a previous download, and i placed
+it on libreboot rsync, which then got mirrored to princeton.
+
+today, github's ssl cert was b0rking the hell out and i really
+really wanted to finish a build, and didn't want to wait for
+github to fix their httpd.
+
+so i'm now hosting this specific acpica tarball on rsync.
+
+this patch makes that URL be used, instead of the github one.
+
+that's the 2nd time i've had to patch coreboot's acpica download!
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/crossgcc/buildgcc | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index ebc9fcb49a..a857110b4b 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -72,7 +72,7 @@ MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
+ MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
+ GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
+ BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
+-IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
++IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
+ # CLANG toolchain archive locations
+ LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
+ CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
+-- 
+2.39.2
+
diff --git a/config/coreboot/dell/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch b/config/coreboot/dell/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
new file mode 100644
index 00000000..cca8901f
--- /dev/null
+++ b/config/coreboot/dell/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
@@ -0,0 +1,341 @@
+From f1b5b0051718139cf59ad047d42d1360b8452ec5 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 29 Oct 2023 01:18:50 +0000
+Subject: [PATCH 1/1] Revert "Kconfig: Bring HEAP_SIZE to a common, large
+ value"
+
+This reverts commit 44a48ce7a46c36df69f7b2cf3552bf10fa5f61b6.
+
+NOTE:
+
+this is done instead of merging:
+https://review.coreboot.org/c/coreboot/+/78623
+
+which is still under review for now
+
+the patch i'm reverting is this one:
+https://review.coreboot.org/c/coreboot/+/78270
+
+this was actually only merged the day before i
+updated coreboot revs in lbmk to the 12 october rev,
+so there's no harm in quickly reverting this for now
+
+however, later on, we will rely on the other patch
+---
+ src/Kconfig                                   | 3 ++-
+ src/cpu/qemu-x86/Kconfig                      | 3 +++
+ src/mainboard/sifive/hifive-unleashed/Kconfig | 3 +++
+ src/northbridge/amd/pi/Kconfig                | 4 ++++
+ src/soc/amd/picasso/Kconfig                   | 4 ++++
+ src/soc/amd/stoneyridge/Kconfig               | 4 ++++
+ src/soc/cavium/cn81xx/Kconfig                 | 3 +++
+ src/soc/intel/alderlake/Kconfig               | 5 +++++
+ src/soc/intel/apollolake/Kconfig              | 4 ++++
+ src/soc/intel/cannonlake/Kconfig              | 4 ++++
+ src/soc/intel/elkhartlake/Kconfig             | 4 ++++
+ src/soc/intel/jasperlake/Kconfig              | 4 ++++
+ src/soc/intel/meteorlake/Kconfig              | 5 +++++
+ src/soc/intel/skylake/Kconfig                 | 4 ++++
+ src/soc/intel/tigerlake/Kconfig               | 4 ++++
+ src/soc/intel/xeon_sp/Kconfig                 | 4 ++++
+ src/soc/intel/xeon_sp/cpx/Kconfig             | 4 ++++
+ src/soc/intel/xeon_sp/skx/Kconfig             | 4 ++++
+ src/soc/intel/xeon_sp/spr/Kconfig             | 4 ++++
+ src/soc/qualcomm/ipq40xx/Kconfig              | 4 ++++
+ 20 files changed, 77 insertions(+), 1 deletion(-)
+
+diff --git a/src/Kconfig b/src/Kconfig
+index ae8024089e..1549719dd0 100644
+--- a/src/Kconfig
++++ b/src/Kconfig
+@@ -751,7 +751,8 @@ config RTC
+ 
+ config HEAP_SIZE
+ 	hex
+-	default 0x100000
++	default 0x100000 if FLATTENED_DEVICE_TREE
++	default 0x4000
+ 
+ config STACK_SIZE
+ 	hex
+diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
+index 0fa999e1ac..f3e2c4cea9 100644
+--- a/src/cpu/qemu-x86/Kconfig
++++ b/src/cpu/qemu-x86/Kconfig
+@@ -35,4 +35,7 @@ config MAX_CPUS
+ 	default 32 if SMM_TSEG
+ 	default 4
+ 
++config HEAP_SIZE
++	default 0x8000
++
+ endif
+diff --git a/src/mainboard/sifive/hifive-unleashed/Kconfig b/src/mainboard/sifive/hifive-unleashed/Kconfig
+index 7bc3b0bcbb..7f9300f2a7 100644
+--- a/src/mainboard/sifive/hifive-unleashed/Kconfig
++++ b/src/mainboard/sifive/hifive-unleashed/Kconfig
+@@ -10,6 +10,9 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select FLATTENED_DEVICE_TREE
+ 	select SPI_SDCARD
+ 
++config HEAP_SIZE
++	default 0x10000
++
+ config MAINBOARD_DIR
+ 	default "sifive/hifive-unleashed"
+ 
+diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
+index 4ffe82a15f..4518db149b 100644
+--- a/src/northbridge/amd/pi/Kconfig
++++ b/src/northbridge/amd/pi/Kconfig
+@@ -29,4 +29,8 @@ config HW_MEM_HOLE_SIZEK
+ 	hex
+ 	default 0x200000
+ 
++config HEAP_SIZE
++	hex
++	default 0xc0000
++
+ endif # NORTHBRIDGE_AMD_PI
+diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
+index c33f287067..796fe4eb13 100644
+--- a/src/soc/amd/picasso/Kconfig
++++ b/src/soc/amd/picasso/Kconfig
+@@ -264,6 +264,10 @@ config S3_VGA_ROM_RUN
+ 	bool
+ 	default n
+ 
++config HEAP_SIZE
++	hex
++	default 0xc0000
++
+ config SERIRQ_CONTINUOUS_MODE
+ 	bool
+ 	default n
+diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
+index 6ff135e6a8..9af7455bae 100644
+--- a/src/soc/amd/stoneyridge/Kconfig
++++ b/src/soc/amd/stoneyridge/Kconfig
+@@ -152,6 +152,10 @@ config S3_VGA_ROM_RUN
+ 	bool
+ 	default n
+ 
++config HEAP_SIZE
++	hex
++	default 0xc0000
++
+ config EHCI_BAR
+ 	hex
+ 	default 0xfef00000
+diff --git a/src/soc/cavium/cn81xx/Kconfig b/src/soc/cavium/cn81xx/Kconfig
+index 77ca97202b..368581f8f1 100644
+--- a/src/soc/cavium/cn81xx/Kconfig
++++ b/src/soc/cavium/cn81xx/Kconfig
+@@ -30,6 +30,9 @@ config ARCH_ARMV8_EXTENSION
+ 	int
+ 	default 1
+ 
++config HEAP_SIZE
++	default 0x10000
++
+ config STACK_SIZE
+ 	default 0x2000
+ 
+diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
+index 4b960c1d22..82ec8f263e 100644
+--- a/src/soc/intel/alderlake/Kconfig
++++ b/src/soc/intel/alderlake/Kconfig
+@@ -215,6 +215,11 @@ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000 if BMP_LOGO
++	default 0x10000
++
+ config GFX_GMA_DEFAULT_MMIO
+ 	default 0xaf000000 if MAINBOARD_HAS_EARLY_LIBGFXINIT
+ 
+diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
+index 78ec2987ce..bce935d800 100644
+--- a/src/soc/intel/apollolake/Kconfig
++++ b/src/soc/intel/apollolake/Kconfig
+@@ -252,6 +252,10 @@ config IFWI_FILE_NAME
+ 	help
+ 	  Name of file to store in the IFWI region.
+ 
++config HEAP_SIZE
++	hex
++	default 0x8000
++
+ config MAX_ROOT_PORTS
+ 	int
+ 	default 6
+diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
+index a42a3c365b..80237f9810 100644
+--- a/src/soc/intel/cannonlake/Kconfig
++++ b/src/soc/intel/cannonlake/Kconfig
+@@ -160,6 +160,10 @@ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+ 
++config HEAP_SIZE
++	hex
++	default 0x8000
++
+ config NHLT_DMIC_1CH_16B
+ 	bool
+ 	depends on ACPI_NHLT
+diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
+index 3361c0ddb9..7f1c767379 100644
+--- a/src/soc/intel/elkhartlake/Kconfig
++++ b/src/soc/intel/elkhartlake/Kconfig
+@@ -104,6 +104,10 @@ config IED_REGION_SIZE
+ 	hex
+ 	default 0x0
+ 
++config HEAP_SIZE
++	hex
++	default 0x8000
++
+ config MAX_ROOT_PORTS
+ 	int
+ 	default 7
+diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
+index 3d84991e09..ff5def3263 100644
+--- a/src/soc/intel/jasperlake/Kconfig
++++ b/src/soc/intel/jasperlake/Kconfig
+@@ -106,6 +106,10 @@ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+ 
++config HEAP_SIZE
++	hex
++	default 0x8000
++
+ config MAX_ROOT_PORTS
+ 	int
+ 	default 8
+diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
+index 590e8b80e1..48030a1911 100644
+--- a/src/soc/intel/meteorlake/Kconfig
++++ b/src/soc/intel/meteorlake/Kconfig
+@@ -197,6 +197,11 @@ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000 if BMP_LOGO
++	default 0x10000
++
+ # Intel recommends reserving the PCIe TBT root port resources as below:
+ # - 42 buses
+ # - 194 MiB Non-prefetchable memory
+diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
+index e0df501460..d6a11363ee 100644
+--- a/src/soc/intel/skylake/Kconfig
++++ b/src/soc/intel/skylake/Kconfig
+@@ -151,6 +151,10 @@ config EXCLUDE_NATIVE_SD_INTERFACE
+ 	help
+ 	  If you set this option to n, will not use native SD controller.
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000
++
+ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
+index c07a0d8365..0a4b7bfdb8 100644
+--- a/src/soc/intel/tigerlake/Kconfig
++++ b/src/soc/intel/tigerlake/Kconfig
+@@ -152,6 +152,10 @@ config IED_REGION_SIZE
+ config INTEL_TME
+ 	default n
+ 
++config HEAP_SIZE
++	hex
++	default 0x10000
++
+ config MAX_ROOT_PORTS
+ 	int
+ 	default 24 if SOC_INTEL_TIGERLAKE_PCH_H
+diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
+index e63bee5451..63ced01067 100644
+--- a/src/soc/intel/xeon_sp/Kconfig
++++ b/src/soc/intel/xeon_sp/Kconfig
+@@ -91,6 +91,10 @@ config ECAM_MMCONF_BASE_ADDRESS
+ config ECAM_MMCONF_BUS_NUMBER
+ 	default 256
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000
++
+ config HPET_MIN_TICKS
+ 	hex
+ 	default 0x80
+diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig
+index ac166c3038..f54f7716b6 100644
+--- a/src/soc/intel/xeon_sp/cpx/Kconfig
++++ b/src/soc/intel/xeon_sp/cpx/Kconfig
+@@ -71,6 +71,10 @@ config CPU_MICROCODE_CBFS_LEN
+ 	hex
+ 	default 0x7C00
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000
++
+ config STACK_SIZE
+ 	hex
+ 	default 0x4000
+diff --git a/src/soc/intel/xeon_sp/skx/Kconfig b/src/soc/intel/xeon_sp/skx/Kconfig
+index 5d843878e1..c2c3d4e2e8 100644
+--- a/src/soc/intel/xeon_sp/skx/Kconfig
++++ b/src/soc/intel/xeon_sp/skx/Kconfig
+@@ -55,6 +55,10 @@ config CPU_MICROCODE_CBFS_LEN
+ 	hex
+ 	default 0x7C00
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000
++
+ config IED_REGION_SIZE
+ 	hex
+ 	default 0x400000
+diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig
+index 43b87ade14..b1c4c783b7 100644
+--- a/src/soc/intel/xeon_sp/spr/Kconfig
++++ b/src/soc/intel/xeon_sp/spr/Kconfig
+@@ -79,6 +79,10 @@ config CPU_MICROCODE_CBFS_LEN
+ 	hex
+ 	default 0x8c00
+ 
++config HEAP_SIZE
++	hex
++	default 0x80000
++
+ config STACK_SIZE
+ 	hex
+ 	default 0x4000
+diff --git a/src/soc/qualcomm/ipq40xx/Kconfig b/src/soc/qualcomm/ipq40xx/Kconfig
+index 0ce92731c0..0eabb00752 100644
+--- a/src/soc/qualcomm/ipq40xx/Kconfig
++++ b/src/soc/qualcomm/ipq40xx/Kconfig
+@@ -57,4 +57,8 @@ config SBL_UTIL_PATH
+ 	help
+ 	  Path for utils to combine SBL_ELF and bootblock
+ 
++config HEAP_SIZE
++	hex
++	default 0x8000
++
+ endif
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch b/config/coreboot/dell/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch
similarity index 100%
rename from config/coreboot/default/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch
rename to config/coreboot/dell/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch
diff --git a/config/coreboot/dell/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch b/config/coreboot/dell/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
new file mode 100644
index 00000000..afce453d
--- /dev/null
+++ b/config/coreboot/dell/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
@@ -0,0 +1,142 @@
+From 0721e7e984bc83861bce3d47632b717848673749 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 31 Oct 2023 18:24:39 +0000
+Subject: [PATCH 1/1] crank up vram allocation on more intel boards
+
+these were added to libreboot, and it's a policy of
+libreboot to max out the vram settings. this was
+overlooked, in prior revisions and releases.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/mainboard/dell/e6400/cmos.default                | 2 +-
+ src/mainboard/dell/snb_ivb_workstations/cmos.default | 2 +-
+ src/mainboard/hp/compaq_8200_elite_sff/cmos.default  | 2 +-
+ src/mainboard/hp/compaq_elite_8300_usdt/cmos.default | 2 +-
+ src/mainboard/hp/snb_ivb_laptops/cmos.default        | 1 +
+ src/mainboard/lenovo/t420/cmos.default               | 1 +
+ src/mainboard/lenovo/t420s/cmos.default              | 1 +
+ src/mainboard/lenovo/t430/cmos.default               | 1 +
+ src/mainboard/lenovo/t520/cmos.default               | 1 +
+ src/mainboard/lenovo/t530/cmos.default               | 1 +
+ src/mainboard/lenovo/x201/cmos.default               | 1 +
+ src/mainboard/lenovo/x220/cmos.default               | 1 +
+ 12 files changed, 12 insertions(+), 4 deletions(-)
+
+diff --git a/src/mainboard/dell/e6400/cmos.default b/src/mainboard/dell/e6400/cmos.default
+index eeb6f47364..25dfa38cb5 100644
+--- a/src/mainboard/dell/e6400/cmos.default
++++ b/src/mainboard/dell/e6400/cmos.default
+@@ -2,4 +2,4 @@ boot_option=Fallback
+ debug_level=Debug
+ power_on_after_fail=Disable
+ sata_mode=AHCI
+-gfx_uma_size=32M
++gfx_uma_size=256M
+diff --git a/src/mainboard/dell/snb_ivb_workstations/cmos.default b/src/mainboard/dell/snb_ivb_workstations/cmos.default
+index ccc7e64625..7c97b84baf 100644
+--- a/src/mainboard/dell/snb_ivb_workstations/cmos.default
++++ b/src/mainboard/dell/snb_ivb_workstations/cmos.default
+@@ -3,5 +3,5 @@ debug_level=Debug
+ power_on_after_fail=Disable
+ nmi=Enable
+ sata_mode=AHCI
+-gfx_uma_size=128M
++gfx_uma_size=224M
+ fan_full_speed=Disable
+diff --git a/src/mainboard/hp/compaq_8200_elite_sff/cmos.default b/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
+index 6d27a79c66..4517ffc7c2 100644
+--- a/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
++++ b/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
+@@ -3,5 +3,5 @@ debug_level=Debug
+ power_on_after_fail=Enable
+ nmi=Enable
+ sata_mode=AHCI
+-gfx_uma_size=32M
++gfx_uma_size=224M
+ psu_fan_lvl=3
+diff --git a/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default b/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
+index 6f3cec735e..9fc4db2990 100644
+--- a/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
++++ b/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
+@@ -3,4 +3,4 @@ debug_level=Debug
+ power_on_after_fail=Enable
+ nmi=Enable
+ sata_mode=AHCI
+-gfx_uma_size=32M
++gfx_uma_size=224M
+diff --git a/src/mainboard/hp/snb_ivb_laptops/cmos.default b/src/mainboard/hp/snb_ivb_laptops/cmos.default
+index ad822d5043..89418a4cfc 100644
+--- a/src/mainboard/hp/snb_ivb_laptops/cmos.default
++++ b/src/mainboard/hp/snb_ivb_laptops/cmos.default
+@@ -3,3 +3,4 @@ debug_level=Debug
+ power_on_after_fail=Disable
+ nmi=Enable
+ sata_mode=AHCI
++gfx_uma_size=224M
+diff --git a/src/mainboard/lenovo/t420/cmos.default b/src/mainboard/lenovo/t420/cmos.default
+index c011867916..83f590d39d 100644
+--- a/src/mainboard/lenovo/t420/cmos.default
++++ b/src/mainboard/lenovo/t420/cmos.default
+@@ -15,3 +15,4 @@ trackpoint=Enable
+ hybrid_graphics_mode=Integrated Only
+ usb_always_on=Disable
+ me_state=Disabled
++gfx_uma_size=224M
+diff --git a/src/mainboard/lenovo/t420s/cmos.default b/src/mainboard/lenovo/t420s/cmos.default
+index c011867916..83f590d39d 100644
+--- a/src/mainboard/lenovo/t420s/cmos.default
++++ b/src/mainboard/lenovo/t420s/cmos.default
+@@ -15,3 +15,4 @@ trackpoint=Enable
+ hybrid_graphics_mode=Integrated Only
+ usb_always_on=Disable
+ me_state=Disabled
++gfx_uma_size=224M
+diff --git a/src/mainboard/lenovo/t430/cmos.default b/src/mainboard/lenovo/t430/cmos.default
+index 55e1e6c04e..a72108f47e 100644
+--- a/src/mainboard/lenovo/t430/cmos.default
++++ b/src/mainboard/lenovo/t430/cmos.default
+@@ -16,3 +16,4 @@ backlight=Both
+ usb_always_on=Disable
+ hybrid_graphics_mode=Integrated Only
+ me_state=Disabled
++gfx_uma_size=224M
+diff --git a/src/mainboard/lenovo/t520/cmos.default b/src/mainboard/lenovo/t520/cmos.default
+index b66f7034dc..a73ea6e9ee 100644
+--- a/src/mainboard/lenovo/t520/cmos.default
++++ b/src/mainboard/lenovo/t520/cmos.default
+@@ -16,3 +16,4 @@ backlight=Both
+ hybrid_graphics_mode=Integrated Only
+ usb_always_on=Disable
+ me_state=Disabled
++gfx_uma_size=224M
+diff --git a/src/mainboard/lenovo/t530/cmos.default b/src/mainboard/lenovo/t530/cmos.default
+index b66f7034dc..a73ea6e9ee 100644
+--- a/src/mainboard/lenovo/t530/cmos.default
++++ b/src/mainboard/lenovo/t530/cmos.default
+@@ -16,3 +16,4 @@ backlight=Both
+ hybrid_graphics_mode=Integrated Only
+ usb_always_on=Disable
+ me_state=Disabled
++gfx_uma_size=224M
+diff --git a/src/mainboard/lenovo/x201/cmos.default b/src/mainboard/lenovo/x201/cmos.default
+index 2cf484fd5a..46294d91ca 100644
+--- a/src/mainboard/lenovo/x201/cmos.default
++++ b/src/mainboard/lenovo/x201/cmos.default
+@@ -15,3 +15,4 @@ power_management_beeps=Enable
+ low_battery_beep=Enable
+ sata_mode=AHCI
+ usb_always_on=Disable
++gfx_uma_size=128M
+diff --git a/src/mainboard/lenovo/x220/cmos.default b/src/mainboard/lenovo/x220/cmos.default
+index 52f303dfdb..92a2026542 100644
+--- a/src/mainboard/lenovo/x220/cmos.default
++++ b/src/mainboard/lenovo/x220/cmos.default
+@@ -14,3 +14,4 @@ fn_ctrl_swap=Disable
+ sticky_fn=Disable
+ trackpoint=Enable
+ me_state=Disabled
++gfx_uma_size=224M
+-- 
+2.39.2
+
diff --git a/config/coreboot/dell/target.cfg b/config/coreboot/dell/target.cfg
new file mode 100644
index 00000000..678e48c4
--- /dev/null
+++ b/config/coreboot/dell/target.cfg
@@ -0,0 +1,4 @@
+tree="dell"
+romtype="normal"
+rev="d862695f5f432b5c78dada5f16c293a4c3f9fce6"
+arch="x86_64"
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
index d6bbf1cd..b961aef0 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
@@ -133,7 +133,6 @@ CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_BOARD_DELL_E6400=y
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
index 85ccc250..7f2b9822 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
@@ -131,7 +131,6 @@ CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_BOARD_DELL_E6400=y
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index 1a33f4ec..eea2b6f9 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -1,4 +1,4 @@
-tree="default"
+tree="dell"
 romtype="4MiB ICH9 IFD NOR flash"
 arch="x86_64"
 payload_grub="n"

From 72e7d090c9deeba6a8ce27aa4c2e96246ad350f6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 12:58:54 +0000
Subject: [PATCH 0034/1549] coreboot: re-configure gm45 thinkpads from scratch

TSEG Stage Cache enabled again, because disabling it
did not affect S3 in any way.

Many configs have changed, and debug level is set to 7.

In testing with V-T60 on IRC, it wasn't just removal of
the DDR2 patch that I did, but I re-did the configs too,
in exactly the same way I've done them here, when testing
on an X200 to fix boot issues.

Libreboot does not use defconfigs, instead it uses full
configs, and these have to be updated. I normally just
run make-oldconfig on every config, for revision updates.

However, every now and then, we need to re-do them.

Play it safe and re-do every config. I've double- and
triple-checked that the configs are correct.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../r400_16mb/config/libgfxinit_corebootfb    | 46 ++++++++++++++-----
 .../r400_16mb/config/libgfxinit_txtmode       | 46 ++++++++++++++-----
 config/coreboot/r400_16mb/target.cfg          |  2 +-
 .../r400_4mb/config/libgfxinit_corebootfb     | 46 ++++++++++++++-----
 .../r400_4mb/config/libgfxinit_txtmode        | 46 ++++++++++++++-----
 config/coreboot/r400_4mb/target.cfg           |  2 +-
 .../r400_8mb/config/libgfxinit_corebootfb     | 46 ++++++++++++++-----
 .../r400_8mb/config/libgfxinit_txtmode        | 46 ++++++++++++++-----
 config/coreboot/r400_8mb/target.cfg           |  2 +-
 .../r500_4mb/config/libgfxinit_corebootfb     | 46 ++++++++++++++-----
 .../r500_4mb/config/libgfxinit_txtmode        | 46 ++++++++++++++-----
 config/coreboot/r500_4mb/target.cfg           |  2 +-
 .../t400_16mb/config/libgfxinit_corebootfb    | 46 ++++++++++++++-----
 .../t400_16mb/config/libgfxinit_txtmode       | 46 ++++++++++++++-----
 config/coreboot/t400_16mb/target.cfg          |  2 +-
 .../t400_4mb/config/libgfxinit_corebootfb     | 46 ++++++++++++++-----
 .../t400_4mb/config/libgfxinit_txtmode        | 46 ++++++++++++++-----
 config/coreboot/t400_4mb/target.cfg           |  2 +-
 .../t400_8mb/config/libgfxinit_corebootfb     | 46 ++++++++++++++-----
 .../t400_8mb/config/libgfxinit_txtmode        | 46 ++++++++++++++-----
 config/coreboot/t400_8mb/target.cfg           |  2 +-
 .../t500_16mb/config/libgfxinit_corebootfb    | 46 ++++++++++++++-----
 .../t500_16mb/config/libgfxinit_txtmode       | 46 ++++++++++++++-----
 config/coreboot/t500_16mb/target.cfg          |  2 +-
 .../t500_4mb/config/libgfxinit_corebootfb     | 46 ++++++++++++++-----
 .../t500_4mb/config/libgfxinit_txtmode        | 46 ++++++++++++++-----
 config/coreboot/t500_4mb/target.cfg           |  2 +-
 .../t500_8mb/config/libgfxinit_corebootfb     | 46 ++++++++++++++-----
 .../t500_8mb/config/libgfxinit_txtmode        | 46 ++++++++++++++-----
 config/coreboot/t500_8mb/target.cfg           |  2 +-
 .../w500_16mb/config/libgfxinit_corebootfb    | 46 ++++++++++++++-----
 .../w500_16mb/config/libgfxinit_txtmode       | 46 ++++++++++++++-----
 config/coreboot/w500_16mb/target.cfg          |  2 +-
 .../w500_4mb/config/libgfxinit_corebootfb     | 46 ++++++++++++++-----
 .../w500_4mb/config/libgfxinit_txtmode        | 46 ++++++++++++++-----
 config/coreboot/w500_4mb/target.cfg           |  2 +-
 .../w500_8mb/config/libgfxinit_corebootfb     | 46 ++++++++++++++-----
 .../w500_8mb/config/libgfxinit_txtmode        | 46 ++++++++++++++-----
 config/coreboot/w500_8mb/target.cfg           |  2 +-
 .../x200_16mb/config/libgfxinit_corebootfb    | 22 +++++----
 .../x200_16mb/config/libgfxinit_txtmode       | 22 +++++----
 config/coreboot/x200_16mb/target.cfg          |  2 +-
 .../x200_4mb/config/libgfxinit_corebootfb     | 22 +++++----
 .../x200_4mb/config/libgfxinit_txtmode        | 22 +++++----
 config/coreboot/x200_4mb/target.cfg           |  2 +-
 .../x200_8mb/config/libgfxinit_corebootfb     | 22 +++++----
 .../x200_8mb/config/libgfxinit_txtmode        | 22 +++++----
 config/coreboot/x200_8mb/target.cfg           |  2 +-
 .../x301_16mb/config/libgfxinit_corebootfb    | 24 +++++-----
 .../x301_16mb/config/libgfxinit_txtmode       | 24 +++++-----
 config/coreboot/x301_16mb/target.cfg          |  2 +-
 .../x301_4mb/config/libgfxinit_corebootfb     | 24 +++++-----
 .../x301_4mb/config/libgfxinit_txtmode        | 24 +++++-----
 config/coreboot/x301_4mb/target.cfg           |  2 +-
 .../x301_8mb/config/libgfxinit_corebootfb     | 24 +++++-----
 .../x301_8mb/config/libgfxinit_txtmode        | 24 +++++-----
 config/coreboot/x301_8mb/target.cfg           |  2 +-
 57 files changed, 1079 insertions(+), 431 deletions(-)

diff --git a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
index 7ce24630..df0ead8b 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,12 +115,14 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0xFFD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -146,7 +148,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -201,11 +203,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -417,7 +420,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -427,7 +430,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -449,6 +452,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -479,6 +483,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -537,22 +542,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -560,7 +582,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -601,12 +623,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_txtmode b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
index 7b703309..f6fe95fb 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0xFFD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -144,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -199,11 +201,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -413,7 +416,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -423,7 +426,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -445,6 +448,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -475,6 +479,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -533,22 +538,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -556,7 +578,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -597,12 +619,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 4dc11195..58ae8733 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="16MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
index 8f8b1c5d..657a9f20 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,12 +115,14 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x3FD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -146,7 +148,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -201,11 +203,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -417,7 +420,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -427,7 +430,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -449,6 +452,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -479,6 +483,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -537,22 +542,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -560,7 +582,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -601,12 +623,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_txtmode b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
index 0d68204b..4e942182 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x3FD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -144,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -199,11 +201,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -413,7 +416,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -423,7 +426,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -445,6 +448,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -475,6 +479,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -533,22 +538,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -556,7 +578,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -597,12 +619,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index b3b1d1f5..58ae8733 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="4MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
index 95eba440..00fa1541 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,12 +115,14 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -146,7 +148,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -201,11 +203,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -417,7 +420,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -427,7 +430,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -449,6 +452,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -479,6 +483,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -537,22 +542,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -560,7 +582,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -601,12 +623,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_txtmode b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
index 819b76ff..75a40c2c 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -144,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -199,11 +201,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -413,7 +416,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -423,7 +426,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -445,6 +448,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -475,6 +479,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -533,22 +538,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -556,7 +578,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -597,12 +619,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index ffd4bc58..58ae8733 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="8MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
index 6e811615..5ba1745d 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,12 +115,14 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x3FF000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="r500"
@@ -146,7 +148,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd_nogbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
@@ -200,11 +202,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -414,7 +417,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -424,7 +427,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -446,6 +449,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -476,6 +480,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -534,22 +539,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -557,7 +579,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -598,12 +620,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_txtmode b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
index f0acbd72..b3c81a78 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x3FF000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="r500"
@@ -144,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd_nogbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
@@ -198,11 +200,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -410,7 +413,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -420,7 +423,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -442,6 +445,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -472,6 +476,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -530,22 +535,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -553,7 +575,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -594,12 +616,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 5d911f79..58ae8733 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="4MiB ICH9 IFD NOGBE NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
index 684fc19c..c8e373da 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,12 +115,14 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0xFFD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -146,7 +148,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -201,11 +203,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -417,7 +420,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -427,7 +430,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -449,6 +452,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -479,6 +483,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -537,22 +542,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -560,7 +582,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -601,12 +623,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_txtmode b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
index dabfa840..04620176 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0xFFD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -144,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -199,11 +201,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -413,7 +416,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -423,7 +426,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -445,6 +448,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -475,6 +479,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -533,22 +538,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -556,7 +578,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -597,12 +619,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 4dc11195..58ae8733 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="16MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
index 9c6f759b..22d38937 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,12 +115,14 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x3FD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -146,7 +148,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -201,11 +203,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -417,7 +420,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -427,7 +430,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -449,6 +452,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -479,6 +483,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -537,22 +542,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -560,7 +582,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -601,12 +623,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_txtmode b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
index f300a98f..7533c992 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x3FD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -144,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -199,11 +201,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -413,7 +416,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -423,7 +426,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -445,6 +448,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -475,6 +479,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -533,22 +538,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -556,7 +578,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -597,12 +619,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index b3b1d1f5..58ae8733 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="4MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
index e3a4bd5f..0f88b671 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,12 +115,14 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -146,7 +148,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -201,11 +203,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -417,7 +420,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -427,7 +430,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -449,6 +452,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -479,6 +483,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -537,22 +542,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -560,7 +582,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -601,12 +623,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_txtmode b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
index 09108d6e..ad4f8745 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -144,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -199,11 +201,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -413,7 +416,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -423,7 +426,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -445,6 +448,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -475,6 +479,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -533,22 +538,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -556,7 +578,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -597,12 +619,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index ffd4bc58..58ae8733 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="8MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
index fd455dc1..202f3046 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,12 +115,14 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0xFFD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -146,7 +148,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -201,11 +203,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -417,7 +420,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -427,7 +430,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -449,6 +452,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -479,6 +483,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -537,22 +542,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -560,7 +582,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -601,12 +623,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_txtmode b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
index 014769e4..14af4f70 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0xFFD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -144,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -199,11 +201,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -413,7 +416,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -423,7 +426,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -445,6 +448,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -475,6 +479,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -533,22 +538,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -556,7 +578,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -597,12 +619,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 4dc11195..58ae8733 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="16MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
index 63ed793a..6f501f58 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,12 +115,14 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x3FD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -146,7 +148,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -201,11 +203,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -417,7 +420,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -427,7 +430,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -449,6 +452,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -479,6 +483,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -537,22 +542,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -560,7 +582,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -601,12 +623,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_txtmode b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
index fb71d960..17f640ba 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x3FD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -144,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -199,11 +201,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -413,7 +416,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -423,7 +426,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -445,6 +448,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -475,6 +479,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -533,22 +538,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -556,7 +578,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -597,12 +619,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index b3b1d1f5..58ae8733 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="4MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
index dbeeaa3c..e54dfa15 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,12 +115,14 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -146,7 +148,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -201,11 +203,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -417,7 +420,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -427,7 +430,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -449,6 +452,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -479,6 +483,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -537,22 +542,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -560,7 +582,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -601,12 +623,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_txtmode b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
index bb45cc11..8bbfde64 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -144,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -199,11 +201,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -413,7 +416,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -423,7 +426,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -445,6 +448,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -475,6 +479,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -533,22 +538,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -556,7 +578,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -597,12 +619,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index ffd4bc58..58ae8733 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="8MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
index f9242b2b..68109b00 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,12 +115,14 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0xFFD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -146,7 +148,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -201,11 +203,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -417,7 +420,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -427,7 +430,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -449,6 +452,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -479,6 +483,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -537,22 +542,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -560,7 +582,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -601,12 +623,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_txtmode b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
index 5188d788..e076edff 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0xFFD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -144,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -199,11 +201,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -413,7 +416,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -423,7 +426,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -445,6 +448,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -475,6 +479,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -533,22 +538,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -556,7 +578,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -597,12 +619,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 4dc11195..58ae8733 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="16MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
index 212e4524..635da2f2 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,12 +115,14 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x3FD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -146,7 +148,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -201,11 +203,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -417,7 +420,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -427,7 +430,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -449,6 +452,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -479,6 +483,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -537,22 +542,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -560,7 +582,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -601,12 +623,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_txtmode b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
index b44fd1d6..5c818d46 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x3FD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -144,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -199,11 +201,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -413,7 +416,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -423,7 +426,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -445,6 +448,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -475,6 +479,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -533,22 +538,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -556,7 +578,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -597,12 +619,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index b3b1d1f5..58ae8733 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="4MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
index 1af2c673..09fd04ae 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,12 +115,14 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -146,7 +148,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -201,11 +203,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -417,7 +420,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -427,7 +430,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -449,6 +452,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -479,6 +483,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -537,22 +542,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -560,7 +582,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -601,12 +623,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_txtmode b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
index 1487b029..f41fe654 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=4
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
@@ -144,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -199,11 +201,12 @@ CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
@@ -413,7 +416,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -423,7 +426,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -445,6 +448,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -475,6 +479,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -533,22 +538,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -556,7 +578,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -597,12 +619,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index ffd4bc58..58ae8733 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="8MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
index 0eb536c4..a700f31d 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -146,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -414,17 +414,17 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -480,6 +480,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -545,15 +546,15 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -561,7 +562,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -608,6 +609,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_txtmode b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
index 7b159fe8..532bb1b5 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -144,7 +144,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -410,17 +410,17 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -476,6 +476,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -541,15 +542,15 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -557,7 +558,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -604,6 +605,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 4dc11195..58ae8733 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="16MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
index d19cffa8..246d4457 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -146,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -414,17 +414,17 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -480,6 +480,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -545,15 +546,15 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -561,7 +562,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -608,6 +609,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_txtmode b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
index 06353de7..e086e4b1 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -144,7 +144,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -410,17 +410,17 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -476,6 +476,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -541,15 +542,15 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -557,7 +558,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -604,6 +605,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index b3b1d1f5..58ae8733 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="4MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
index 4637d5ec..267d00d1 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -146,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -414,17 +414,17 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -480,6 +480,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -545,15 +546,15 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -561,7 +562,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -608,6 +609,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_txtmode b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
index 7775e712..cfee03e2 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -144,7 +144,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -410,17 +410,17 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -476,6 +476,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -541,15 +542,15 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -557,7 +558,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -604,6 +605,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index ffd4bc58..58ae8733 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="8MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
index ec5f72bf..3748d3a7 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -114,7 +114,7 @@ CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0xffd000
+CONFIG_CBFS_SIZE=0xFFD000
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=2
@@ -146,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -414,17 +414,17 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -480,6 +480,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -545,15 +546,15 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -561,7 +562,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -608,6 +609,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_txtmode b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
index 018b410d..a5c45315 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -114,7 +114,7 @@ CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0xffd000
+CONFIG_CBFS_SIZE=0xFFD000
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
@@ -144,7 +144,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -410,17 +410,17 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -476,6 +476,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -541,15 +542,15 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -557,7 +558,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -604,6 +605,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index 4dc11195..58ae8733 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="16MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
index 740862ab..75f10f2c 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -114,7 +114,7 @@ CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0x3fd000
+CONFIG_CBFS_SIZE=0x3FD000
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=2
@@ -146,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -414,17 +414,17 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -480,6 +480,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -545,15 +546,15 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -561,7 +562,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -608,6 +609,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_txtmode b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
index bd786e36..8f56325f 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -114,7 +114,7 @@ CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0x3fd000
+CONFIG_CBFS_SIZE=0x3FD000
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
@@ -144,7 +144,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -410,17 +410,17 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -476,6 +476,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -541,15 +542,15 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -557,7 +558,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -604,6 +605,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index b3b1d1f5..58ae8733 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="4MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
index 53a9f0ea..4510f76f 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -114,7 +114,7 @@ CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0x7fd000
+CONFIG_CBFS_SIZE=0x7FD000
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=2
@@ -146,7 +146,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -414,17 +414,17 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -480,6 +480,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -545,15 +546,15 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -561,7 +562,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -608,6 +609,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_txtmode b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
index 8b56e2b3..c485f7e4 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -114,7 +114,7 @@ CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0x7fd000
+CONFIG_CBFS_SIZE=0x7FD000
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
@@ -144,7 +144,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
@@ -410,17 +410,17 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
@@ -476,6 +476,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -541,15 +542,15 @@ CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -557,7 +558,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -604,6 +605,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index ffd4bc58..58ae8733 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-romtype="8MiB ICH9 IFD NOR flash"
+romtype="normal"
 arch="x86_64"
 payload_grub="y"
 payload_grub_withseabios="y"

From ab57e7a4889c38b798c53f14d78498140f153893 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 16:29:35 +0000
Subject: [PATCH 0035/1549] grub: don't print prefix errors on the screen

still set grub_errno, and behave the same, but don't
print anything. just carry on execution as normal.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...-missing-prefix-errors-on-the-screen.patch | 102 ++++++++++++++++++
 1 file changed, 102 insertions(+)
 create mode 100644 config/grub/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch

diff --git a/config/grub/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
new file mode 100644
index 00000000..25091d16
--- /dev/null
+++ b/config/grub/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -0,0 +1,102 @@
+From 9e7a651a0f15f2e9dec65a77765c3c4fd97b4165 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 16:14:58 +0000
+Subject: [PATCH 1/1] don't print missing prefix errors on the screen
+
+we do actually set the prefix. this patch modifies
+grub to still set grub_errno and return accordingly,
+so the behaviour is otherwise identical, but it will
+no longer print a warning message on the screen.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/commands/keylayouts.c | 2 +-
+ grub-core/commands/loadenv.c    | 2 +-
+ grub-core/commands/nativedisk.c | 2 +-
+ grub-core/efiemu/main.c         | 3 +--
+ grub-core/font/font.c           | 2 +-
+ grub-core/kern/dl.c             | 2 +-
+ 6 files changed, 6 insertions(+), 7 deletions(-)
+
+diff --git a/grub-core/commands/keylayouts.c b/grub-core/commands/keylayouts.c
+index 445fa0601..00bcf7025 100644
+--- a/grub-core/commands/keylayouts.c
++++ b/grub-core/commands/keylayouts.c
+@@ -211,7 +211,7 @@ grub_cmd_keymap (struct grub_command *cmd __attribute__ ((unused)),
+     {
+       const char *prefix = grub_env_get ("prefix");
+       if (!prefix)
+-	return grub_error (GRUB_ERR_BAD_ARGUMENT, N_("variable `%s' isn't set"), "prefix");
++	return (grub_errno = GRUB_ERR_BAD_ARGUMENT);
+       filename = grub_xasprintf ("%s/layouts/%s.gkb", prefix, argv[0]);
+       if (!filename)
+ 	return grub_errno;
+diff --git a/grub-core/commands/loadenv.c b/grub-core/commands/loadenv.c
+index 166445849..699b39bfa 100644
+--- a/grub-core/commands/loadenv.c
++++ b/grub-core/commands/loadenv.c
+@@ -58,7 +58,7 @@ open_envblk_file (char *filename,
+       prefix = grub_env_get ("prefix");
+       if (! prefix)
+         {
+-          grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++          grub_errno = GRUB_ERR_FILE_NOT_FOUND;
+           return 0;
+         }
+ 
+diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c
+index 580c8d3b0..6806bff9c 100644
+--- a/grub-core/commands/nativedisk.c
++++ b/grub-core/commands/nativedisk.c
+@@ -186,7 +186,7 @@ grub_cmd_nativedisk (grub_command_t cmd __attribute__ ((unused)),
+   prefix = grub_env_get ("prefix");
+ 
+   if (! prefix)
+-    return grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++    return (grub_errno = GRUB_ERR_FILE_NOT_FOUND);
+ 
+   if (prefix)
+     path_prefix = (prefix[0] == '(') ? grub_strchr (prefix, ')') : NULL;
+diff --git a/grub-core/efiemu/main.c b/grub-core/efiemu/main.c
+index e7037f4ed..e5d4dbff1 100644
+--- a/grub-core/efiemu/main.c
++++ b/grub-core/efiemu/main.c
+@@ -231,8 +231,7 @@ grub_efiemu_autocore (void)
+   prefix = grub_env_get ("prefix");
+ 
+   if (! prefix)
+-    return grub_error (GRUB_ERR_FILE_NOT_FOUND,
+-		       N_("variable `%s' isn't set"), "prefix");
++    return (grub_errno = GRUB_ERR_FILE_NOT_FOUND);
+ 
+   suffix = grub_efiemu_get_default_core_name ();
+ 
+diff --git a/grub-core/font/font.c b/grub-core/font/font.c
+index 18de52562..2a0fea6c8 100644
+--- a/grub-core/font/font.c
++++ b/grub-core/font/font.c
+@@ -461,7 +461,7 @@ grub_font_load (const char *filename)
+ 
+ 	  if (!prefix)
+ 	    {
+-	      grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++              grub_errno = GRUB_ERR_FILE_NOT_FOUND;
+ 	      goto fail;
+ 	    }
+ 	  file = try_open_from_prefix (prefix, filename);
+diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
+index 4011e2d15..af3bd00d0 100644
+--- a/grub-core/kern/dl.c
++++ b/grub-core/kern/dl.c
+@@ -758,7 +758,7 @@ grub_dl_load (const char *name)
+     return 0;
+ 
+   if (! grub_dl_dir) {
+-    grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++    grub_errno = GRUB_ERR_FILE_NOT_FOUND;
+     return 0;
+   }
+ 
+-- 
+2.39.2
+

From dd03a87b684d86eaaad572ce24864417c2d869aa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 16:39:48 +0000
Subject: [PATCH 0036/1549] grub: don't print messages if a module isn't found

it can annoy some users, so just silence it. we don't need
a lot of modules so we only have a few, but some distro
grub configs can load modules frivilously.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...on-t-print-error-if-module-not-found.patch | 34 +++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100644 config/grub/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch

diff --git a/config/grub/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch b/config/grub/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
new file mode 100644
index 00000000..f4cf939e
--- /dev/null
+++ b/config/grub/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
@@ -0,0 +1,34 @@
+From 6237c5762edccc1e1fa4746b1d4aa5e8d81e4883 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 16:36:22 +0000
+Subject: [PATCH 1/1] don't print error if module not found
+
+still set grub_errno accordingly, and otherwise
+behave the same. in libreboot, we remove a lot of
+modules but then rely on loading a grub.cfg
+provided by a distro; in almost all cases that works,
+but also in almost all cases, that will try to load
+a module we don't actually need, but then it prints
+a message. this can annoy some users, so silence it.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/kern/dl.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
+index af3bd00d0..21d0cedb1 100644
+--- a/grub-core/kern/dl.c
++++ b/grub-core/kern/dl.c
+@@ -486,7 +486,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
+ 
+   s = grub_dl_find_section (e, ".modname");
+   if (!s)
+-    return grub_error (GRUB_ERR_BAD_MODULE, "no module name found");
++    return (grub_errno = GRUB_ERR_BAD_MODULE);
+ 
+   mod->name = grub_strdup ((char *) e + s->sh_offset);
+   if (! mod->name)
+-- 
+2.39.2
+

From ada4de5f54c87121bfde646238f5be342451b829 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 17:30:33 +0000
Subject: [PATCH 0037/1549] further silence grub prefix errors

it still printed "error: ." on screen, instead
of the prefix message.

now it's silent. it just says:

Welcome to GRUB!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...nt-errors-if-GRUB_ERR_FILE_NOT_FOUND.patch | 31 +++++++++++++++++++
 1 file changed, 31 insertions(+)
 create mode 100644 config/grub/patches/0004-prefix/0003-don-t-print-errors-if-GRUB_ERR_FILE_NOT_FOUND.patch

diff --git a/config/grub/patches/0004-prefix/0003-don-t-print-errors-if-GRUB_ERR_FILE_NOT_FOUND.patch b/config/grub/patches/0004-prefix/0003-don-t-print-errors-if-GRUB_ERR_FILE_NOT_FOUND.patch
new file mode 100644
index 00000000..5ecae825
--- /dev/null
+++ b/config/grub/patches/0004-prefix/0003-don-t-print-errors-if-GRUB_ERR_FILE_NOT_FOUND.patch
@@ -0,0 +1,31 @@
+From f80b344cd3ebd098ba6e63aa1ee97a6223ffe7f0 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 17:25:20 +0000
+Subject: [PATCH 1/1] don't print errors if GRUB_ERR_FILE_NOT_FOUND
+
+this is part two of the quest to kill the prefix
+error message. after i disabled prefix-related
+messages, it still printed "error: ." on screen.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/kern/err.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/grub-core/kern/err.c b/grub-core/kern/err.c
+index 53c734de7..c9488b748 100644
+--- a/grub-core/kern/err.c
++++ b/grub-core/kern/err.c
+@@ -107,7 +107,8 @@ grub_print_error (void)
+     {
+       if (grub_errno != GRUB_ERR_NONE)
+ 	{
+-	  grub_err_printf (_("error: %s.\n"), grub_errmsg);
++          if (grub_errno != GRUB_ERR_FILE_NOT_FOUND)
++	    grub_err_printf (_("error: %s.\n"), grub_errmsg);
+ 	  grub_err_printed_errors++;
+ 	}
+     }
+-- 
+2.39.2
+

From 42392f6fed39eefae7fedca94cb82cb9871d2180 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 19:48:17 +0000
Subject: [PATCH 0038/1549] dell/e6400: set vram to max (256mb)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...ell-e6400-crank-up-vram-to-256MB-max.patch |  23 +++
 ...vram-allocation-on-more-intel-boards.patch | 142 ------------------
 2 files changed, 23 insertions(+), 142 deletions(-)
 create mode 100644 config/coreboot/dell/patches/0028-dell-e6400-crank-up-vram-to-256MB-max.patch
 delete mode 100644 config/coreboot/dell/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch

diff --git a/config/coreboot/dell/patches/0028-dell-e6400-crank-up-vram-to-256MB-max.patch b/config/coreboot/dell/patches/0028-dell-e6400-crank-up-vram-to-256MB-max.patch
new file mode 100644
index 00000000..2c23ab0b
--- /dev/null
+++ b/config/coreboot/dell/patches/0028-dell-e6400-crank-up-vram-to-256MB-max.patch
@@ -0,0 +1,23 @@
+From 1116145917035a92cc92a34e6a914a9506d17680 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Wed, 1 Nov 2023 16:33:11 +0000
+Subject: [PATCH 1/1] dell/e6400: crank up vram to 256MB (max)
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/mainboard/dell/e6400/cmos.default | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/mainboard/dell/e6400/cmos.default b/src/mainboard/dell/e6400/cmos.default
+index eeb6f47364..25dfa38cb5 100644
+--- a/src/mainboard/dell/e6400/cmos.default
++++ b/src/mainboard/dell/e6400/cmos.default
+@@ -2,4 +2,4 @@ boot_option=Fallback
+ debug_level=Debug
+ power_on_after_fail=Disable
+ sata_mode=AHCI
+-gfx_uma_size=32M
++gfx_uma_size=256M
+-- 
+2.39.2
+
diff --git a/config/coreboot/dell/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch b/config/coreboot/dell/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
deleted file mode 100644
index afce453d..00000000
--- a/config/coreboot/dell/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
+++ /dev/null
@@ -1,142 +0,0 @@
-From 0721e7e984bc83861bce3d47632b717848673749 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Tue, 31 Oct 2023 18:24:39 +0000
-Subject: [PATCH 1/1] crank up vram allocation on more intel boards
-
-these were added to libreboot, and it's a policy of
-libreboot to max out the vram settings. this was
-overlooked, in prior revisions and releases.
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- src/mainboard/dell/e6400/cmos.default                | 2 +-
- src/mainboard/dell/snb_ivb_workstations/cmos.default | 2 +-
- src/mainboard/hp/compaq_8200_elite_sff/cmos.default  | 2 +-
- src/mainboard/hp/compaq_elite_8300_usdt/cmos.default | 2 +-
- src/mainboard/hp/snb_ivb_laptops/cmos.default        | 1 +
- src/mainboard/lenovo/t420/cmos.default               | 1 +
- src/mainboard/lenovo/t420s/cmos.default              | 1 +
- src/mainboard/lenovo/t430/cmos.default               | 1 +
- src/mainboard/lenovo/t520/cmos.default               | 1 +
- src/mainboard/lenovo/t530/cmos.default               | 1 +
- src/mainboard/lenovo/x201/cmos.default               | 1 +
- src/mainboard/lenovo/x220/cmos.default               | 1 +
- 12 files changed, 12 insertions(+), 4 deletions(-)
-
-diff --git a/src/mainboard/dell/e6400/cmos.default b/src/mainboard/dell/e6400/cmos.default
-index eeb6f47364..25dfa38cb5 100644
---- a/src/mainboard/dell/e6400/cmos.default
-+++ b/src/mainboard/dell/e6400/cmos.default
-@@ -2,4 +2,4 @@ boot_option=Fallback
- debug_level=Debug
- power_on_after_fail=Disable
- sata_mode=AHCI
--gfx_uma_size=32M
-+gfx_uma_size=256M
-diff --git a/src/mainboard/dell/snb_ivb_workstations/cmos.default b/src/mainboard/dell/snb_ivb_workstations/cmos.default
-index ccc7e64625..7c97b84baf 100644
---- a/src/mainboard/dell/snb_ivb_workstations/cmos.default
-+++ b/src/mainboard/dell/snb_ivb_workstations/cmos.default
-@@ -3,5 +3,5 @@ debug_level=Debug
- power_on_after_fail=Disable
- nmi=Enable
- sata_mode=AHCI
--gfx_uma_size=128M
-+gfx_uma_size=224M
- fan_full_speed=Disable
-diff --git a/src/mainboard/hp/compaq_8200_elite_sff/cmos.default b/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
-index 6d27a79c66..4517ffc7c2 100644
---- a/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
-+++ b/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
-@@ -3,5 +3,5 @@ debug_level=Debug
- power_on_after_fail=Enable
- nmi=Enable
- sata_mode=AHCI
--gfx_uma_size=32M
-+gfx_uma_size=224M
- psu_fan_lvl=3
-diff --git a/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default b/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
-index 6f3cec735e..9fc4db2990 100644
---- a/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
-+++ b/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
-@@ -3,4 +3,4 @@ debug_level=Debug
- power_on_after_fail=Enable
- nmi=Enable
- sata_mode=AHCI
--gfx_uma_size=32M
-+gfx_uma_size=224M
-diff --git a/src/mainboard/hp/snb_ivb_laptops/cmos.default b/src/mainboard/hp/snb_ivb_laptops/cmos.default
-index ad822d5043..89418a4cfc 100644
---- a/src/mainboard/hp/snb_ivb_laptops/cmos.default
-+++ b/src/mainboard/hp/snb_ivb_laptops/cmos.default
-@@ -3,3 +3,4 @@ debug_level=Debug
- power_on_after_fail=Disable
- nmi=Enable
- sata_mode=AHCI
-+gfx_uma_size=224M
-diff --git a/src/mainboard/lenovo/t420/cmos.default b/src/mainboard/lenovo/t420/cmos.default
-index c011867916..83f590d39d 100644
---- a/src/mainboard/lenovo/t420/cmos.default
-+++ b/src/mainboard/lenovo/t420/cmos.default
-@@ -15,3 +15,4 @@ trackpoint=Enable
- hybrid_graphics_mode=Integrated Only
- usb_always_on=Disable
- me_state=Disabled
-+gfx_uma_size=224M
-diff --git a/src/mainboard/lenovo/t420s/cmos.default b/src/mainboard/lenovo/t420s/cmos.default
-index c011867916..83f590d39d 100644
---- a/src/mainboard/lenovo/t420s/cmos.default
-+++ b/src/mainboard/lenovo/t420s/cmos.default
-@@ -15,3 +15,4 @@ trackpoint=Enable
- hybrid_graphics_mode=Integrated Only
- usb_always_on=Disable
- me_state=Disabled
-+gfx_uma_size=224M
-diff --git a/src/mainboard/lenovo/t430/cmos.default b/src/mainboard/lenovo/t430/cmos.default
-index 55e1e6c04e..a72108f47e 100644
---- a/src/mainboard/lenovo/t430/cmos.default
-+++ b/src/mainboard/lenovo/t430/cmos.default
-@@ -16,3 +16,4 @@ backlight=Both
- usb_always_on=Disable
- hybrid_graphics_mode=Integrated Only
- me_state=Disabled
-+gfx_uma_size=224M
-diff --git a/src/mainboard/lenovo/t520/cmos.default b/src/mainboard/lenovo/t520/cmos.default
-index b66f7034dc..a73ea6e9ee 100644
---- a/src/mainboard/lenovo/t520/cmos.default
-+++ b/src/mainboard/lenovo/t520/cmos.default
-@@ -16,3 +16,4 @@ backlight=Both
- hybrid_graphics_mode=Integrated Only
- usb_always_on=Disable
- me_state=Disabled
-+gfx_uma_size=224M
-diff --git a/src/mainboard/lenovo/t530/cmos.default b/src/mainboard/lenovo/t530/cmos.default
-index b66f7034dc..a73ea6e9ee 100644
---- a/src/mainboard/lenovo/t530/cmos.default
-+++ b/src/mainboard/lenovo/t530/cmos.default
-@@ -16,3 +16,4 @@ backlight=Both
- hybrid_graphics_mode=Integrated Only
- usb_always_on=Disable
- me_state=Disabled
-+gfx_uma_size=224M
-diff --git a/src/mainboard/lenovo/x201/cmos.default b/src/mainboard/lenovo/x201/cmos.default
-index 2cf484fd5a..46294d91ca 100644
---- a/src/mainboard/lenovo/x201/cmos.default
-+++ b/src/mainboard/lenovo/x201/cmos.default
-@@ -15,3 +15,4 @@ power_management_beeps=Enable
- low_battery_beep=Enable
- sata_mode=AHCI
- usb_always_on=Disable
-+gfx_uma_size=128M
-diff --git a/src/mainboard/lenovo/x220/cmos.default b/src/mainboard/lenovo/x220/cmos.default
-index 52f303dfdb..92a2026542 100644
---- a/src/mainboard/lenovo/x220/cmos.default
-+++ b/src/mainboard/lenovo/x220/cmos.default
-@@ -14,3 +14,4 @@ fn_ctrl_swap=Disable
- sticky_fn=Disable
- trackpoint=Enable
- me_state=Disabled
-+gfx_uma_size=224M
--- 
-2.39.2
-

From 6e60bfe0b0fe1b9989870ba1f2160e178fcba7a6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 21:25:29 +0000
Subject: [PATCH 0039/1549] Recreate i945 coreboot configs from scratch

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../macbook11/config/libgfxinit_corebootfb    | 52 +++++++++++------
 .../macbook11/config/libgfxinit_txtmode       | 52 +++++++++++------
 .../config/libgfxinit_corebootfb              | 50 +++++++++++------
 .../macbook11_16mb/config/libgfxinit_txtmode  | 50 +++++++++++------
 config/coreboot/macbook11_16mb/target.cfg     |  1 -
 .../macbook21/config/libgfxinit_corebootfb    | 52 +++++++++++------
 .../macbook21/config/libgfxinit_txtmode       | 52 +++++++++++------
 .../config/libgfxinit_corebootfb              | 50 +++++++++++------
 .../macbook21_16mb/config/libgfxinit_txtmode  | 50 +++++++++++------
 .../config/libgfxinit_corebootfb              | 56 ++++++++++++-------
 .../config/libgfxinit_txtmode                 | 56 ++++++++++++-------
 .../t60_intelgpu/config/libgfxinit_corebootfb | 56 ++++++++++++-------
 .../t60_intelgpu/config/libgfxinit_txtmode    | 56 ++++++++++++-------
 .../coreboot/x60/config/libgfxinit_corebootfb | 56 ++++++++++++-------
 config/coreboot/x60/config/libgfxinit_txtmode | 56 ++++++++++++-------
 .../x60_16mb/config/libgfxinit_corebootfb     | 56 ++++++++++++-------
 .../x60_16mb/config/libgfxinit_txtmode        | 56 ++++++++++++-------
 17 files changed, 572 insertions(+), 285 deletions(-)

diff --git a/config/coreboot/macbook11/config/libgfxinit_corebootfb b/config/coreboot/macbook11/config/libgfxinit_corebootfb
index efc4f997..f41ffe35 100644
--- a/config/coreboot/macbook11/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -114,10 +114,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Apple"
 CONFIG_CBFS_SIZE=0x00200000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -142,7 +144,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
@@ -150,16 +152,14 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
@@ -270,7 +270,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -354,9 +354,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -365,7 +362,7 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -386,6 +383,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -408,6 +406,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -466,22 +465,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -489,7 +505,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -531,12 +547,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/macbook11/config/libgfxinit_txtmode b/config/coreboot/macbook11/config/libgfxinit_txtmode
index 740cac57..df93493c 100644
--- a/config/coreboot/macbook11/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -114,10 +114,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Apple"
 CONFIG_CBFS_SIZE=0x00200000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -142,7 +144,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
@@ -150,16 +152,14 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
@@ -270,7 +270,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -352,9 +352,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -363,7 +360,7 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -384,6 +381,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -406,6 +404,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -464,22 +463,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -487,7 +503,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -529,12 +545,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
index 6e5b91a0..9548c226 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
@@ -17,8 +17,9 @@ CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
-CONFIG_OPTION_BACKEND_NONE=y
-# CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_INCLUDE_CONFIG_FILE=y
@@ -31,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -113,10 +114,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Apple"
 CONFIG_CBFS_SIZE=0x01000000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -141,7 +144,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
@@ -149,16 +152,14 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
@@ -269,7 +270,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -353,9 +354,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -364,7 +362,7 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -385,6 +383,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -403,10 +402,11 @@ CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -465,10 +465,27 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
@@ -530,6 +547,7 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
index 50f27c8f..6f2084df 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
@@ -17,8 +17,9 @@ CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
-CONFIG_OPTION_BACKEND_NONE=y
-# CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_INCLUDE_CONFIG_FILE=y
@@ -31,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -113,10 +114,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Apple"
 CONFIG_CBFS_SIZE=0x01000000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -141,7 +144,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
@@ -149,16 +152,14 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
@@ -269,7 +270,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -351,9 +352,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -362,7 +360,7 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -383,6 +381,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -401,10 +400,11 @@ CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -463,10 +463,27 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
@@ -528,6 +545,7 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index 1bbaa8fc..117e160d 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -4,7 +4,6 @@ arch="x86_32"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
-payload_memtest="y"
 grub_scan_disk="ahci"
 microcode_required="n"
 vendorfiles="n"
diff --git a/config/coreboot/macbook21/config/libgfxinit_corebootfb b/config/coreboot/macbook21/config/libgfxinit_corebootfb
index dde5c192..c5eec638 100644
--- a/config/coreboot/macbook21/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -114,10 +114,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Apple"
 CONFIG_CBFS_SIZE=0x00200000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -142,7 +144,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
@@ -150,16 +152,14 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
@@ -270,7 +270,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -354,9 +354,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -365,7 +362,7 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -386,6 +383,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -408,6 +406,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -466,22 +465,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -489,7 +505,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -531,12 +547,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/macbook21/config/libgfxinit_txtmode b/config/coreboot/macbook21/config/libgfxinit_txtmode
index 5f99046e..dbc7b44c 100644
--- a/config/coreboot/macbook21/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -114,10 +114,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Apple"
 CONFIG_CBFS_SIZE=0x00200000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -142,7 +144,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
@@ -150,16 +152,14 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
@@ -270,7 +270,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -352,9 +352,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -363,7 +360,7 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -384,6 +381,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -406,6 +404,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -464,22 +463,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -487,7 +503,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -529,12 +545,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
index 08a21f42..b63ec933 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
@@ -17,8 +17,9 @@ CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
-CONFIG_OPTION_BACKEND_NONE=y
-# CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_INCLUDE_CONFIG_FILE=y
@@ -31,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -113,10 +114,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Apple"
 CONFIG_CBFS_SIZE=0x01000000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -141,7 +144,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
@@ -149,16 +152,14 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
@@ -269,7 +270,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -353,9 +354,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -364,7 +362,7 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -385,6 +383,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -403,10 +402,11 @@ CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -465,10 +465,27 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
@@ -530,6 +547,7 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
index 563271e0..c6945838 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
@@ -17,8 +17,9 @@ CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
-CONFIG_OPTION_BACKEND_NONE=y
-# CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_INCLUDE_CONFIG_FILE=y
@@ -31,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -113,10 +114,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Apple"
 CONFIG_CBFS_SIZE=0x01000000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -141,7 +144,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
@@ -149,16 +152,14 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
@@ -269,7 +270,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -351,9 +352,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -362,7 +360,7 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -383,6 +381,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -401,10 +400,11 @@ CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -463,10 +463,27 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
@@ -528,6 +545,7 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
index 31ed1809..84810003 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x01000000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t60"
@@ -141,7 +143,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
@@ -149,9 +151,6 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
@@ -192,11 +191,12 @@ CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
@@ -307,7 +307,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_TI_PCI1X2X=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -342,8 +342,8 @@ CONFIG_SUPERIO_NSC_PC87384=y
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-# CONFIG_H8_BEEP_ON_DEATH is not set
-# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
@@ -400,9 +400,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -412,7 +409,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -433,6 +430,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -455,6 +453,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -513,22 +512,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -536,7 +552,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -579,12 +595,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
index 9c80a08c..3d654f7c 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x01000000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t60"
@@ -141,7 +143,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
@@ -149,9 +151,6 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
@@ -192,11 +191,12 @@ CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
@@ -307,7 +307,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_TI_PCI1X2X=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -342,8 +342,8 @@ CONFIG_SUPERIO_NSC_PC87384=y
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-# CONFIG_H8_BEEP_ON_DEATH is not set
-# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
@@ -398,9 +398,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -410,7 +407,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -431,6 +428,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -453,6 +451,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -511,22 +510,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -534,7 +550,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -577,12 +593,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
index 1b3e1030..6bfd8b0c 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x00200000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t60"
@@ -141,7 +143,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
@@ -149,9 +151,6 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
@@ -192,11 +191,12 @@ CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
@@ -307,7 +307,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_TI_PCI1X2X=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -342,8 +342,8 @@ CONFIG_SUPERIO_NSC_PC87384=y
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-# CONFIG_H8_BEEP_ON_DEATH is not set
-# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
@@ -400,9 +400,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -412,7 +409,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -433,6 +430,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -455,6 +453,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -513,22 +512,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -536,7 +552,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -579,12 +595,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
index 4d7ae5a2..686090e2 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x00200000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t60"
@@ -141,7 +143,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
@@ -149,9 +151,6 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
@@ -192,11 +191,12 @@ CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
@@ -307,7 +307,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_TI_PCI1X2X=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -342,8 +342,8 @@ CONFIG_SUPERIO_NSC_PC87384=y
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-# CONFIG_H8_BEEP_ON_DEATH is not set
-# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
@@ -398,9 +398,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -410,7 +407,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -431,6 +428,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -453,6 +451,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -511,22 +510,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -534,7 +550,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -577,12 +593,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x60/config/libgfxinit_corebootfb b/config/coreboot/x60/config/libgfxinit_corebootfb
index 0f7191ed..f9916cc0 100644
--- a/config/coreboot/x60/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x00200000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_IRQ_SLOT_COUNT=18
@@ -142,7 +144,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
@@ -150,9 +152,6 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
@@ -193,11 +192,12 @@ CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
@@ -308,7 +308,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_RICOH_RL5C476=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -344,8 +344,8 @@ CONFIG_SUPERIO_NSC_PC87392=y
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-# CONFIG_H8_BEEP_ON_DEATH is not set
-# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
@@ -402,9 +402,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -414,7 +411,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -439,6 +436,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -461,6 +459,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -519,22 +518,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -542,7 +558,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -587,6 +603,7 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
@@ -594,6 +611,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x60/config/libgfxinit_txtmode b/config/coreboot/x60/config/libgfxinit_txtmode
index 92486e0d..059c3079 100644
--- a/config/coreboot/x60/config/libgfxinit_txtmode
+++ b/config/coreboot/x60/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x00200000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_IRQ_SLOT_COUNT=18
@@ -142,7 +144,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
@@ -150,9 +152,6 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
@@ -193,11 +192,12 @@ CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
@@ -308,7 +308,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_RICOH_RL5C476=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -344,8 +344,8 @@ CONFIG_SUPERIO_NSC_PC87392=y
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-# CONFIG_H8_BEEP_ON_DEATH is not set
-# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
@@ -400,9 +400,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -412,7 +409,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -437,6 +434,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -459,6 +457,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -517,22 +516,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -540,7 +556,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -585,6 +601,7 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
@@ -592,6 +609,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
index 48a7aaef..e1a0f282 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x01000000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_IRQ_SLOT_COUNT=18
@@ -142,7 +144,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
@@ -150,9 +152,6 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
@@ -193,11 +192,12 @@ CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
@@ -308,7 +308,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_RICOH_RL5C476=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -344,8 +344,8 @@ CONFIG_SUPERIO_NSC_PC87392=y
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-# CONFIG_H8_BEEP_ON_DEATH is not set
-# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
@@ -402,9 +402,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -414,7 +411,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -439,6 +436,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -461,6 +459,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -519,22 +518,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -542,7 +558,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -587,6 +603,7 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
@@ -594,6 +611,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_txtmode b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
index 0980dd01..28292782 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
@@ -32,8 +32,8 @@ CONFIG_USE_BLOBS=y
 # CONFIG_UBSAN is not set
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x01000000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_IRQ_SLOT_COUNT=18
@@ -142,7 +144,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
@@ -150,9 +152,6 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
@@ -193,11 +192,12 @@ CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x4000
@@ -308,7 +308,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_RICOH_RL5C476=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -344,8 +344,8 @@ CONFIG_SUPERIO_NSC_PC87392=y
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-# CONFIG_H8_BEEP_ON_DEATH is not set
-# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
@@ -400,9 +400,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
@@ -412,7 +409,7 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -437,6 +434,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -459,6 +457,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -517,22 +516,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -540,7 +556,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -585,6 +601,7 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
@@ -592,6 +609,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set

From 80b70d899c0fc5c8d4b5301f67527907e2a76947 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 21:59:52 +0000
Subject: [PATCH 0040/1549] grub: avoid printing empty error messages

this replaces the previous behaviour, which erred
on a specific value of grub_errno, which was a
problem if other types of errors used that value.

due to the way i patch out the prefix error messages,
this new patch ensures that only those errors are
silenced. all other messages will be printed.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ....patch => 0003-don-t-print-empty-error-messages.patch} | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
 rename config/grub/patches/0004-prefix/{0003-don-t-print-errors-if-GRUB_ERR_FILE_NOT_FOUND.patch => 0003-don-t-print-empty-error-messages.patch} (76%)

diff --git a/config/grub/patches/0004-prefix/0003-don-t-print-errors-if-GRUB_ERR_FILE_NOT_FOUND.patch b/config/grub/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
similarity index 76%
rename from config/grub/patches/0004-prefix/0003-don-t-print-errors-if-GRUB_ERR_FILE_NOT_FOUND.patch
rename to config/grub/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
index 5ecae825..25221c9c 100644
--- a/config/grub/patches/0004-prefix/0003-don-t-print-errors-if-GRUB_ERR_FILE_NOT_FOUND.patch
+++ b/config/grub/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
@@ -1,7 +1,7 @@
-From f80b344cd3ebd098ba6e63aa1ee97a6223ffe7f0 Mon Sep 17 00:00:00 2001
+From e5b7ec81421487e71bcaf8b6b5a27f3649a62753 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 17:25:20 +0000
-Subject: [PATCH 1/1] don't print errors if GRUB_ERR_FILE_NOT_FOUND
+Subject: [PATCH 1/1] don't print empty error messages
 
 this is part two of the quest to kill the prefix
 error message. after i disabled prefix-related
@@ -13,7 +13,7 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 2 insertions(+), 1 deletion(-)
 
 diff --git a/grub-core/kern/err.c b/grub-core/kern/err.c
-index 53c734de7..c9488b748 100644
+index 53c734de7..7cac53983 100644
 --- a/grub-core/kern/err.c
 +++ b/grub-core/kern/err.c
 @@ -107,7 +107,8 @@ grub_print_error (void)
@@ -21,7 +21,7 @@ index 53c734de7..c9488b748 100644
        if (grub_errno != GRUB_ERR_NONE)
  	{
 -	  grub_err_printf (_("error: %s.\n"), grub_errmsg);
-+          if (grub_errno != GRUB_ERR_FILE_NOT_FOUND)
++          if (grub_strlen(grub_errmsg) > 0)
 +	    grub_err_printf (_("error: %s.\n"), grub_errmsg);
  	  grub_err_printed_errors++;
  	}

From 9184940f3409c22301763a70fa904d2d196c9f54 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Mon, 6 Nov 2023 01:06:16 +0200
Subject: [PATCH 0041/1549] nvmutil: make install

make install is nice to have. now respects$(PREFIX) as well.

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 util/nvmutil/Makefile | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/util/nvmutil/Makefile b/util/nvmutil/Makefile
index 47ab02fb..f9f72370 100644
--- a/util/nvmutil/Makefile
+++ b/util/nvmutil/Makefile
@@ -1,11 +1,16 @@
 # SPDX-License-Identifier: MIT
 # SPDX-FileCopyrightText: 2022 Leah Rowe <leah@libreboot.org>
+# SPDX-FileCopyrightText: 2023 Riku Viitanen <riku.viitanen@protonmail.com>
 
 CC=cc
 CFLAGS=-Os -Wall -Wextra -Werror -pedantic
+PREFIX?=/usr/bin
 
-all:
+nvm:
 	$(CC) $(CFLAGS) nvmutil.c -o nvm
 
+install: nvm
+	install nvm $(PREFIX)/nvm
+
 clean:
 	rm -f nvm

From 4bdaf39ce782b7fe496c8e2e1ba1713a618d0f7c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 23:21:13 +0000
Subject: [PATCH 0042/1549] use mirrorservice.org for gcc downloads

the gnu.org 302 redirect often fails

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...-mirrorservice.org-for-gcc-downloads.patch | 36 ++++++++++++++
 ...-mirrorservice.org-for-gcc-downloads.patch | 36 ++++++++++++++
 ...-mirrorservire.org-for-gcc-downloads.patch | 47 +++++++++++++++++++
 ...-mirrorservire.org-for-gcc-downloads.patch | 47 +++++++++++++++++++
 ...-mirrorservice.org-for-gcc-downloads.patch | 36 ++++++++++++++
 5 files changed, 202 insertions(+)
 create mode 100644 config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch
 create mode 100644 config/coreboot/dell/patches/0029-use-mirrorservice.org-for-gcc-downloads.patch
 create mode 100644 config/coreboot/fam15h_rdimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
 create mode 100644 config/coreboot/fam15h_udimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
 create mode 100644 config/coreboot/haswell/patches/0028-use-mirrorservice.org-for-gcc-downloads.patch

diff --git a/config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch b/config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch
new file mode 100644
index 00000000..2e653f83
--- /dev/null
+++ b/config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch
@@ -0,0 +1,36 @@
+From 89c47fad6e97fc6a7113ebbdedfcc42ae2b6fc7f Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 22:57:08 +0000
+Subject: [PATCH 1/1] use mirrorservice.org for gcc downloads
+
+the gnu.org 302 redirect often fails
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/crossgcc/buildgcc | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index 87f80ba7f6..b3aad5df7d 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -67,11 +67,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
+ # to the jenkins build as well, or the builder won't download it.
+ 
+ # GCC toolchain archive locations
+-GMP_BASE_URL="https://ftpmirror.gnu.org/gmp"
+-MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
+-MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
+-GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
+-BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
++GMP_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp"
++MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
++MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
++GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
++BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
+ IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
+ # CLANG toolchain archive locations
+ LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
+-- 
+2.39.2
+
diff --git a/config/coreboot/dell/patches/0029-use-mirrorservice.org-for-gcc-downloads.patch b/config/coreboot/dell/patches/0029-use-mirrorservice.org-for-gcc-downloads.patch
new file mode 100644
index 00000000..2e653f83
--- /dev/null
+++ b/config/coreboot/dell/patches/0029-use-mirrorservice.org-for-gcc-downloads.patch
@@ -0,0 +1,36 @@
+From 89c47fad6e97fc6a7113ebbdedfcc42ae2b6fc7f Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 22:57:08 +0000
+Subject: [PATCH 1/1] use mirrorservice.org for gcc downloads
+
+the gnu.org 302 redirect often fails
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/crossgcc/buildgcc | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index 87f80ba7f6..b3aad5df7d 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -67,11 +67,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
+ # to the jenkins build as well, or the builder won't download it.
+ 
+ # GCC toolchain archive locations
+-GMP_BASE_URL="https://ftpmirror.gnu.org/gmp"
+-MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
+-MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
+-GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
+-BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
++GMP_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp"
++MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
++MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
++GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
++BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
+ IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
+ # CLANG toolchain archive locations
+ LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
+-- 
+2.39.2
+
diff --git a/config/coreboot/fam15h_rdimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch b/config/coreboot/fam15h_rdimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
new file mode 100644
index 00000000..bee2d89a
--- /dev/null
+++ b/config/coreboot/fam15h_rdimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
@@ -0,0 +1,47 @@
+From 5358f0adc28bb1300162aa6bcfaa45aea69970d0 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 23:08:43 +0000
+Subject: [PATCH 1/1] use mirrorservire.org for gcc downloads
+
+the gnu.org 302 redirect often fails
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/crossgcc/buildgcc | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index 4b838208bb..438fb5a59f 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -67,12 +67,12 @@ NASM_VERSION=2.14.02
+ # These are sanitized by the jenkins toolchain test builder, so if
+ # a completely new URL is added here, it probably needs to be added
+ # to the jenkins build as well, or the builder won't download it.
+-GMP_ARCHIVE="https://ftpmirror.gnu.org/gmp/gmp-${GMP_VERSION}.tar.xz"
+-MPFR_ARCHIVE="https://ftpmirror.gnu.org/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
+-MPC_ARCHIVE="https://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz"
+-GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
+-BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
+-GDB_ARCHIVE="https://ftpmirror.gnu.org/gdb/gdb-${GDB_VERSION}.tar.xz"
++GMP_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-${GMP_VERSION}.tar.xz"
++MPFR_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
++MPC_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-${MPC_VERSION}.tar.gz"
++GCC_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
++BINUTILS_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
++GDB_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gdb/gdb-${GDB_VERSION}.tar.xz"
+ IASL_ARCHIVE="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
+ PYTHON_ARCHIVE="https://www.python.org/ftp/python/${PYTHON_VERSION}/Python-${PYTHON_VERSION}.tar.xz"
+ EXPAT_ARCHIVE="https://downloads.sourceforge.net/sourceforge/expat/expat-${EXPAT_VERSION}.tar.bz2"
+@@ -81,7 +81,7 @@ LLVM_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/llvm-${CLANG_VERSION}.s
+ CFE_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/cfe-${CLANG_VERSION}.src.tar.xz"
+ CRT_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/compiler-rt-${CLANG_VERSION}.src.tar.xz"
+ CTE_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/clang-tools-extra-${CLANG_VERSION}.src.tar.xz"
+-MAKE_ARCHIVE="https://ftpmirror.gnu.org/make/make-${MAKE_VERSION}.tar.bz2"
++MAKE_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/make/make-${MAKE_VERSION}.tar.bz2"
+ CMAKE_ARCHIVE="https://cmake.org/files/v3.15/cmake-${CMAKE_VERSION}.tar.gz"
+ NASM_ARCHIVE="https://www.nasm.us/pub/nasm/releasebuilds/${NASM_VERSION}/nasm-${NASM_VERSION}.tar.bz2"
+ 
+-- 
+2.39.2
+
diff --git a/config/coreboot/fam15h_udimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch b/config/coreboot/fam15h_udimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
new file mode 100644
index 00000000..bee2d89a
--- /dev/null
+++ b/config/coreboot/fam15h_udimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
@@ -0,0 +1,47 @@
+From 5358f0adc28bb1300162aa6bcfaa45aea69970d0 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 23:08:43 +0000
+Subject: [PATCH 1/1] use mirrorservire.org for gcc downloads
+
+the gnu.org 302 redirect often fails
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/crossgcc/buildgcc | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index 4b838208bb..438fb5a59f 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -67,12 +67,12 @@ NASM_VERSION=2.14.02
+ # These are sanitized by the jenkins toolchain test builder, so if
+ # a completely new URL is added here, it probably needs to be added
+ # to the jenkins build as well, or the builder won't download it.
+-GMP_ARCHIVE="https://ftpmirror.gnu.org/gmp/gmp-${GMP_VERSION}.tar.xz"
+-MPFR_ARCHIVE="https://ftpmirror.gnu.org/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
+-MPC_ARCHIVE="https://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz"
+-GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
+-BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
+-GDB_ARCHIVE="https://ftpmirror.gnu.org/gdb/gdb-${GDB_VERSION}.tar.xz"
++GMP_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-${GMP_VERSION}.tar.xz"
++MPFR_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
++MPC_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-${MPC_VERSION}.tar.gz"
++GCC_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
++BINUTILS_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
++GDB_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gdb/gdb-${GDB_VERSION}.tar.xz"
+ IASL_ARCHIVE="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
+ PYTHON_ARCHIVE="https://www.python.org/ftp/python/${PYTHON_VERSION}/Python-${PYTHON_VERSION}.tar.xz"
+ EXPAT_ARCHIVE="https://downloads.sourceforge.net/sourceforge/expat/expat-${EXPAT_VERSION}.tar.bz2"
+@@ -81,7 +81,7 @@ LLVM_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/llvm-${CLANG_VERSION}.s
+ CFE_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/cfe-${CLANG_VERSION}.src.tar.xz"
+ CRT_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/compiler-rt-${CLANG_VERSION}.src.tar.xz"
+ CTE_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/clang-tools-extra-${CLANG_VERSION}.src.tar.xz"
+-MAKE_ARCHIVE="https://ftpmirror.gnu.org/make/make-${MAKE_VERSION}.tar.bz2"
++MAKE_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/make/make-${MAKE_VERSION}.tar.bz2"
+ CMAKE_ARCHIVE="https://cmake.org/files/v3.15/cmake-${CMAKE_VERSION}.tar.gz"
+ NASM_ARCHIVE="https://www.nasm.us/pub/nasm/releasebuilds/${NASM_VERSION}/nasm-${NASM_VERSION}.tar.bz2"
+ 
+-- 
+2.39.2
+
diff --git a/config/coreboot/haswell/patches/0028-use-mirrorservice.org-for-gcc-downloads.patch b/config/coreboot/haswell/patches/0028-use-mirrorservice.org-for-gcc-downloads.patch
new file mode 100644
index 00000000..0d0a66a1
--- /dev/null
+++ b/config/coreboot/haswell/patches/0028-use-mirrorservice.org-for-gcc-downloads.patch
@@ -0,0 +1,36 @@
+From ca1bd48a87ab46ebfb444b0e092442bf6270ec7a Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 23:19:42 +0000
+Subject: [PATCH 1/1] use mirrorservice.org for gcc downloads
+
+the gnu.org 302 redirect often fails
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/crossgcc/buildgcc | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index d4cc8b2a24..526940acfa 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -47,11 +47,11 @@ NASM_VERSION=2.15.05
+ # These are sanitized by the jenkins toolchain test builder, so if
+ # a completely new URL is added here, it probably needs to be added
+ # to the jenkins build as well, or the builder won't download it.
+-GMP_ARCHIVE="https://ftpmirror.gnu.org/gmp/gmp-${GMP_VERSION}.tar.xz"
+-MPFR_ARCHIVE="https://ftpmirror.gnu.org/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
+-MPC_ARCHIVE="https://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz"
+-GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
+-BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
++GMP_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-${GMP_VERSION}.tar.xz"
++MPFR_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
++MPC_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-${MPC_VERSION}.tar.gz"
++GCC_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
++BINUTILS_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
+ IASL_ARCHIVE="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
+ # CLANG toolchain archive locations
+ LLVM_ARCHIVE="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}/llvm-${CLANG_VERSION}.src.tar.xz"
+-- 
+2.39.2
+

From b295fd409337f4570224c4b8eff91ea956734124 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 23:29:39 +0000
Subject: [PATCH 0043/1549] config/git: merge img files with docs

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/docs | 8 ++++++++
 config/git/img  | 6 ------
 2 files changed, 8 insertions(+), 6 deletions(-)
 delete mode 100644 config/git/img

diff --git a/config/git/docs b/config/git/docs
index 1bd8dc3a..ae097962 100644
--- a/config/git/docs
+++ b/config/git/docs
@@ -11,4 +11,12 @@
 	loc: docs/www/html
 	url: https://codeberg.org/libreboot/lbwww
 	bkup_url: https://git.disroot.org/libreboot/lbwww
+	depend: imgfiles
+}
+
+{imgfiles}{
+	rev: 918c0ba07cf45f07836fa8c312fc51b48db32e0a
+	loc: docs/www/html/img/site
+	url: https://codeberg.org/libreboot/lbwww-img
+	bkup_url: https://git.disroot.org/libreboot/lbwww-img
 }
diff --git a/config/git/img b/config/git/img
deleted file mode 100644
index f8b1f069..00000000
--- a/config/git/img
+++ /dev/null
@@ -1,6 +0,0 @@
-{img}{
-	rev: 918c0ba07cf45f07836fa8c312fc51b48db32e0a
-	loc: img
-	url: https://codeberg.org/libreboot/lbwww-img
-	bkup_url: https://git.disroot.org/libreboot/lbwww-img
-}

From 1c6add41d6c7fce23635046a08a2726b237d0fdd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 23:31:20 +0000
Subject: [PATCH 0044/1549] roll back untitled revision

i haven't updated site.cfg yet

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/docs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/git/docs b/config/git/docs
index ae097962..948c1418 100644
--- a/config/git/docs
+++ b/config/git/docs
@@ -1,5 +1,5 @@
 {docs}{
-	rev: 6941ffefe04375296732565a4628b549eea54a64
+	rev: 06ac864b9a738b5daec3736ddb0fb2f94f127ee0
 	loc: docs
 	url: https://codeberg.org/vimuser/untitled
 	bkup_url: https://notabug.org/untitled/untitled

From 188b4f0dce6e380f7f65c30ed4c9e6362094afd5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 23:34:52 +0000
Subject: [PATCH 0045/1549] put images in the proper place, in releases

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/docs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/git/docs b/config/git/docs
index 948c1418..b7daf642 100644
--- a/config/git/docs
+++ b/config/git/docs
@@ -16,7 +16,7 @@
 
 {imgfiles}{
 	rev: 918c0ba07cf45f07836fa8c312fc51b48db32e0a
-	loc: docs/www/html/img/site
+	loc: docs/www/html/site/img
 	url: https://codeberg.org/libreboot/lbwww-img
 	bkup_url: https://git.disroot.org/libreboot/lbwww-img
 }

From 9be589efbc343525c0ea3d3a89ed93a10aa06e00 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 23:39:08 +0000
Subject: [PATCH 0046/1549] include untitledssg docs in releases

now the docs are complete, in releases. they
contain the libreboot site, libreboot images,
the untitled static site generator and untitled
static site generator documentation.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/docs | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/config/git/docs b/config/git/docs
index b7daf642..4679ad72 100644
--- a/config/git/docs
+++ b/config/git/docs
@@ -4,6 +4,7 @@
 	url: https://codeberg.org/vimuser/untitled
 	bkup_url: https://notabug.org/untitled/untitled
 	depend: mdfiles
+	depend: untitledwww
 }
 
 {mdfiles}{
@@ -20,3 +21,10 @@
 	url: https://codeberg.org/libreboot/lbwww-img
 	bkup_url: https://git.disroot.org/libreboot/lbwww-img
 }
+
+{untitledwww}{
+	rev: 78cdadea40143a7e55b8eae48f4239d31ebb5c16
+	loc: docs/www/untitled
+	url: https://codeberg.org/vimuser/untitled-website
+	bkup_url: https://notabug.org/untitled/untitled-website
+}

From d5a3abdb8079b60b7ef5f408ca9d6788aa90a334 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 23:48:00 +0000
Subject: [PATCH 0047/1549] put docs under docs/ in releases (not src/docs/)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .gitignore            | 1 +
 script/update/release | 1 +
 2 files changed, 2 insertions(+)

diff --git a/.gitignore b/.gitignore
index f743fddb..36ac930c 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,6 +1,7 @@
 *~
 *.o
 /lbmk.err.log
+/docs/
 /cbutils/
 /pciroms/
 /util/dell-flash-unlock/dell_flash_unlock
diff --git a/script/update/release b/script/update/release
index 4febec81..824fce51 100755
--- a/script/update/release
+++ b/script/update/release
@@ -49,6 +49,7 @@ build_release()
 	(
 	cd "${srcdir}" || err "${_xm}: !cd \"${srcdir}\""
 	fetch_trees
+	x_ mv src/docs docs
 	)
 	(
 	cd "${srcdir%/*}" || err "${_xm}: mktarball \"${srcdir}\""

From 931d646df7d660e202293da57db112d7b09c9858 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 Nov 2023 00:55:49 +0000
Subject: [PATCH 0048/1549] Libreboot 20231106

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../0002-say-the-name-libreboot-in-the-grub-menu.patch          | 2 +-
 script/update/release                                           | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 9beae162..2729ed61 100644
--- a/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..31308e16a 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20231101 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20231106 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/script/update/release b/script/update/release
index 824fce51..dcddb44c 100755
--- a/script/update/release
+++ b/script/update/release
@@ -279,7 +279,7 @@ mktarball()
 	[ "${2%/*}" = "${2}" ] || mkdir -p "${2%/*}" || err "mk, !mkdir -p \"${2%/*}\""
 	if [ "${tar_implementation% *}" = "tar (GNU tar)" ]; then
 		tar --sort=name --owner=root:0 --group=root:0 \
-		    --mtime="UTC 2023-11-01" -c "${1}" | xz -T0 -9e > "${2}" || \
+		    --mtime="UTC 2023-11-06" -c "${1}" | xz -T0 -9e > "${2}" || \
 		    err "mktarball 1, ${1}"
 	else
 		# TODO: reproducible tarballs on non-GNU systems

From 8bb9563964c9041fc3d7890610fa2fe6a33bf5d8 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sun, 5 Nov 2023 18:44:41 -0700
Subject: [PATCH 0049/1549] config/ifd: Rename e6430 to dell_ivybridge

This is to support future patches for other Ivy Bridge Dell Latitudes.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 .../e6430_12mb/config/libgfxinit_corebootfb         |   6 +++---
 .../coreboot/e6430_12mb/config/libgfxinit_txtmode   |   6 +++---
 config/ifd/{e6430 => dell_ivybridge}/gbe            | Bin
 config/ifd/{e6430 => dell_ivybridge}/ifd            | Bin
 4 files changed, 6 insertions(+), 6 deletions(-)
 rename config/ifd/{e6430 => dell_ivybridge}/gbe (100%)
 rename config/ifd/{e6430 => dell_ivybridge}/ifd (100%)

diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index bd56a6c3..17c82493 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -148,9 +148,9 @@ CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/e6430/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/e6430/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/e6430/gbe"
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index 8896ed0f..ae163093 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -146,9 +146,9 @@ CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/e6430/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/e6430/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/e6430/gbe"
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
diff --git a/config/ifd/e6430/gbe b/config/ifd/dell_ivybridge/gbe
similarity index 100%
rename from config/ifd/e6430/gbe
rename to config/ifd/dell_ivybridge/gbe
diff --git a/config/ifd/e6430/ifd b/config/ifd/dell_ivybridge/ifd
similarity index 100%
rename from config/ifd/e6430/ifd
rename to config/ifd/dell_ivybridge/ifd

From 36d4c9061917eba8772e188be9cb084bc5877049 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sun, 5 Nov 2023 19:00:26 -0700
Subject: [PATCH 0050/1549] Add Dell Latitude E6530 support

This is pretty much the same as the E6430

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 ...b-dell-Add-Latitude-E6530-Ivy-Bridge.patch | 792 ++++++++++++++++++
 .../e6430_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e6430_12mb/config/libgfxinit_txtmode      |   1 +
 .../e6530_12mb/config/libgfxinit_corebootfb   | 603 +++++++++++++
 .../e6530_12mb/config/libgfxinit_txtmode      | 600 +++++++++++++
 config/coreboot/e6530_12mb/target.cfg         |  11 +
 .../t1650_12mb/config/libgfxinit_txtmode      |   1 +
 config/vendor/sources                         |   2 +-
 8 files changed, 2010 insertions(+), 1 deletion(-)
 create mode 100644 config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
 create mode 100644 config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/e6530_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/e6530_12mb/target.cfg

diff --git a/config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch b/config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
new file mode 100644
index 00000000..babaf559
--- /dev/null
+++ b/config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
@@ -0,0 +1,792 @@
+From 823da59b0bdaeb20d5f22da65e736acaa70b301e Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Sat, 19 Aug 2023 16:19:10 -0600
+Subject: [PATCH] mb/dell: Add Latitude E6530 (Ivy Bridge)
+
+Mainboard is QALA0/LA-7761P (UMA). The dGPU model was not tested.  This
+is based on the autoport output with some manual tweaks. The flash is
+8MiB + 4MiB. It can be internally flashed by sending a command to the
+EC, which causes the EC to pull the FDO pin low and the firmware to skip
+setting up any chipset based write protections. [1] The EC is the SMSC
+MEC5055, which seems to be compatible with the existing MEC5035 code.
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: I93c6622fc5da1d0d61a5b2c197ac7227d9525908
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e6530/Kconfig           |  37 ++++
+ src/mainboard/dell/e6530/Kconfig.name      |   2 +
+ src/mainboard/dell/e6530/Makefile.inc      |   6 +
+ src/mainboard/dell/e6530/acpi/ec.asl       |   9 +
+ src/mainboard/dell/e6530/acpi/platform.asl |  12 ++
+ src/mainboard/dell/e6530/acpi/superio.asl  |   3 +
+ src/mainboard/dell/e6530/acpi_tables.c     |  16 ++
+ src/mainboard/dell/e6530/board_info.txt    |   6 +
+ src/mainboard/dell/e6530/cmos.default      |   9 +
+ src/mainboard/dell/e6530/cmos.layout       |  88 ++++++++++
+ src/mainboard/dell/e6530/data.vbt          | Bin 0 -> 4280 bytes
+ src/mainboard/dell/e6530/devicetree.cb     |  68 ++++++++
+ src/mainboard/dell/e6530/dsdt.asl          |  30 ++++
+ src/mainboard/dell/e6530/early_init.c      |  38 ++++
+ src/mainboard/dell/e6530/gma-mainboard.ads |  20 +++
+ src/mainboard/dell/e6530/gpio.c            | 192 +++++++++++++++++++++
+ src/mainboard/dell/e6530/hda_verb.c        |  33 ++++
+ src/mainboard/dell/e6530/mainboard.c       |  21 +++
+ 18 files changed, 590 insertions(+)
+ create mode 100644 src/mainboard/dell/e6530/Kconfig
+ create mode 100644 src/mainboard/dell/e6530/Kconfig.name
+ create mode 100644 src/mainboard/dell/e6530/Makefile.inc
+ create mode 100644 src/mainboard/dell/e6530/acpi/ec.asl
+ create mode 100644 src/mainboard/dell/e6530/acpi/platform.asl
+ create mode 100644 src/mainboard/dell/e6530/acpi/superio.asl
+ create mode 100644 src/mainboard/dell/e6530/acpi_tables.c
+ create mode 100644 src/mainboard/dell/e6530/board_info.txt
+ create mode 100644 src/mainboard/dell/e6530/cmos.default
+ create mode 100644 src/mainboard/dell/e6530/cmos.layout
+ create mode 100644 src/mainboard/dell/e6530/data.vbt
+ create mode 100644 src/mainboard/dell/e6530/devicetree.cb
+ create mode 100644 src/mainboard/dell/e6530/dsdt.asl
+ create mode 100644 src/mainboard/dell/e6530/early_init.c
+ create mode 100644 src/mainboard/dell/e6530/gma-mainboard.ads
+ create mode 100644 src/mainboard/dell/e6530/gpio.c
+ create mode 100644 src/mainboard/dell/e6530/hda_verb.c
+ create mode 100644 src/mainboard/dell/e6530/mainboard.c
+
+diff --git a/src/mainboard/dell/e6530/Kconfig b/src/mainboard/dell/e6530/Kconfig
+new file mode 100644
+index 0000000000..582adddbd4
+--- /dev/null
++++ b/src/mainboard/dell/e6530/Kconfig
+@@ -0,0 +1,37 @@
++if BOARD_DELL_LATITUDE_E6530
++
++config BOARD_SPECIFIC_OPTIONS
++	def_bool y
++	select BOARD_ROMSIZE_KB_12288
++	select EC_ACPI
++	select EC_DELL_MEC5035
++	select GFX_GMA_PANEL_1_ON_LVDS
++	select HAVE_ACPI_RESUME
++	select HAVE_ACPI_TABLES
++	select HAVE_CMOS_DEFAULT
++	select HAVE_OPTION_TABLE
++	select INTEL_GMA_HAVE_VBT
++	select INTEL_INT15
++	select MAINBOARD_HAS_LIBGFXINIT
++	select MAINBOARD_USES_IFD_GBE_REGION
++	select NORTHBRIDGE_INTEL_SANDYBRIDGE
++	select SERIRQ_CONTINUOUS_MODE
++	select SOUTHBRIDGE_INTEL_C216
++	select SYSTEM_TYPE_LAPTOP
++	select USE_NATIVE_RAMINIT
++
++config MAINBOARD_DIR
++	default "dell/e6530"
++
++config MAINBOARD_PART_NUMBER
++	default "Latitude E6530"
++
++config VGA_BIOS_ID
++	default "8086,0166"
++
++config DRAM_RESET_GATE_GPIO
++	default 60
++
++config USBDEBUG_HCD_INDEX
++	default 2
++endif
+diff --git a/src/mainboard/dell/e6530/Kconfig.name b/src/mainboard/dell/e6530/Kconfig.name
+new file mode 100644
+index 0000000000..01ed76d107
+--- /dev/null
++++ b/src/mainboard/dell/e6530/Kconfig.name
+@@ -0,0 +1,2 @@
++config BOARD_DELL_LATITUDE_E6530
++	bool "Latitude E6530"
+diff --git a/src/mainboard/dell/e6530/Makefile.inc b/src/mainboard/dell/e6530/Makefile.inc
+new file mode 100644
+index 0000000000..ba64e93eb8
+--- /dev/null
++++ b/src/mainboard/dell/e6530/Makefile.inc
+@@ -0,0 +1,6 @@
++# SPDX-License-Identifier: GPL-2.0-only
++bootblock-y += early_init.c
++bootblock-y += gpio.c
++romstage-y += early_init.c
++romstage-y += gpio.c
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/dell/e6530/acpi/ec.asl b/src/mainboard/dell/e6530/acpi/ec.asl
+new file mode 100644
+index 0000000000..0d429410a9
+--- /dev/null
++++ b/src/mainboard/dell/e6530/acpi/ec.asl
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++Device(EC)
++{
++	Name (_HID, EISAID("PNP0C09"))
++	Name (_UID, 0)
++	Name (_GPE, 16)
++/* FIXME: EC support */
++}
+diff --git a/src/mainboard/dell/e6530/acpi/platform.asl b/src/mainboard/dell/e6530/acpi/platform.asl
+new file mode 100644
+index 0000000000..2d24bbd9b9
+--- /dev/null
++++ b/src/mainboard/dell/e6530/acpi/platform.asl
+@@ -0,0 +1,12 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++Method(_WAK, 1)
++{
++	/* FIXME: EC support  */
++	Return(Package() {0, 0})
++}
++
++Method(_PTS,1)
++{
++	/* FIXME: EC support  */
++}
+diff --git a/src/mainboard/dell/e6530/acpi/superio.asl b/src/mainboard/dell/e6530/acpi/superio.asl
+new file mode 100644
+index 0000000000..55b1db5b11
+--- /dev/null
++++ b/src/mainboard/dell/e6530/acpi/superio.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <drivers/pc80/pc/ps2_controller.asl>
+diff --git a/src/mainboard/dell/e6530/acpi_tables.c b/src/mainboard/dell/e6530/acpi_tables.c
+new file mode 100644
+index 0000000000..e2759659bf
+--- /dev/null
++++ b/src/mainboard/dell/e6530/acpi_tables.c
+@@ -0,0 +1,16 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi_gnvs.h>
++#include <soc/nvs.h>
++
++/* FIXME: check this function.  */
++void mainboard_fill_gnvs(struct global_nvs *gnvs)
++{
++	/* The lid is open by default. */
++	gnvs->lids = 1;
++
++	/* Temperature at which OS will shutdown */
++	gnvs->tcrt = 100;
++	/* Temperature at which OS will throttle CPU */
++	gnvs->tpsv = 90;
++}
+diff --git a/src/mainboard/dell/e6530/board_info.txt b/src/mainboard/dell/e6530/board_info.txt
+new file mode 100644
+index 0000000000..4601a4aaba
+--- /dev/null
++++ b/src/mainboard/dell/e6530/board_info.txt
+@@ -0,0 +1,6 @@
++Category: laptop
++ROM package: SOIC-8
++ROM protocol: SPI
++ROM socketed: n
++Flashrom support: y
++Release year: 2012
+diff --git a/src/mainboard/dell/e6530/cmos.default b/src/mainboard/dell/e6530/cmos.default
+new file mode 100644
+index 0000000000..279415dfd1
+--- /dev/null
++++ b/src/mainboard/dell/e6530/cmos.default
+@@ -0,0 +1,9 @@
++boot_option=Fallback
++debug_level=Debug
++power_on_after_fail=Disable
++nmi=Enable
++bluetooth=Enable
++wwan=Enable
++wlan=Enable
++sata_mode=AHCI
++me_state=Disabled
+diff --git a/src/mainboard/dell/e6530/cmos.layout b/src/mainboard/dell/e6530/cmos.layout
+new file mode 100644
+index 0000000000..e85ea4c661
+--- /dev/null
++++ b/src/mainboard/dell/e6530/cmos.layout
+@@ -0,0 +1,88 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++# -----------------------------------------------------------------
++entries
++
++# -----------------------------------------------------------------
++0	120	r	0	reserved_memory
++
++# -----------------------------------------------------------------
++# RTC_BOOT_BYTE (coreboot hardcoded)
++384	1	e	4	boot_option
++388	4	h	0	reboot_counter
++
++# -----------------------------------------------------------------
++# coreboot config options: console
++395	4	e	6	debug_level
++
++#400	8	r	0	reserved for century byte
++
++# coreboot config options: southbridge
++408	1	e	1	nmi
++409	2	e	7	power_on_after_fail
++411     1       e       9       sata_mode
++
++# coreboot config options: EC
++412	1	e	1	bluetooth
++413	1	e	1	wwan
++415	1	e	1	wlan
++
++# coreboot config options: ME
++424	1	e	14	me_state
++425	2	h	0	me_state_prev
++
++# coreboot config options: northbridge
++432	3	e	11	gfx_uma_size
++435	2	e	12	hybrid_graphics_mode
++440	8	h	0	volume
++
++# VBOOT
++448	128	r	0	vbnv
++
++# SandyBridge MRC Scrambler Seed values
++896	32	r	0	mrc_scrambler_seed
++928	32	r	0	mrc_scrambler_seed_s3
++960	16	r	0	mrc_scrambler_seed_chk
++
++# coreboot config options: check sums
++984	16	h	0	check_sum
++
++# -----------------------------------------------------------------
++
++enumerations
++
++#ID	value	text
++1	0	Disable
++1	1	Enable
++2	0	Enable
++2	1	Disable
++4	0	Fallback
++4	1	Normal
++6	0	Emergency
++6	1	Alert
++6	2	Critical
++6	3	Error
++6	4	Warning
++6	5	Notice
++6	6	Info
++6	7	Debug
++6	8	Spew
++7	0	Disable
++7	1	Enable
++7	2	Keep
++9	0	AHCI
++9	1	Compatible
++11	0	32M
++11	1	64M
++11	2	96M
++11	3	128M
++11	4	160M
++11	5	192M
++11	6	224M
++14	0	Normal
++14	1	Disabled
++
++# -----------------------------------------------------------------
++checksums
++
++checksum 392 447 984
+diff --git a/src/mainboard/dell/e6530/data.vbt b/src/mainboard/dell/e6530/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..af64a913d521fe240ce30e114e90fe75d3841bbc
+GIT binary patch
+literal 4280
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+z-LDysYw8J&{-GJKYwEiif07x7u5QsOr5oeA`ZJxDb>p|XdQzvCb>nSaeP1UfY_x~f
+z9bwuRHf|5Ahr{&iu<>+QeI`t=g^e>|^=z1;5o23K?TP5uo%2>aXQWCKr#dH;Qr0*j
+z3LecKKarw5`Xblzd$&H4oP%y&l3egyUc<=<Azs)*u}X^*n$F~s2O<-paSF?q*HB+n
+zqBfj5;J|x@hM`M(QD20jrkwi8`y3l;8qO;#l8A#CMI8Kg9E{ERsT>TGXaGC^5Cz)J
+z4?eb?Kub*nWYdmhV-4?j<o}k#pt-{wK;b3U(B^+`s7-`HYOZOxv<+RG^LulAxKL|9
+z3NH#9{Lg*7U1&gy<zHSG$;LMHby+V=ENlGFVLKjt%kkph7kP1M8|vebT=K5)*E>JW
+zjd{Tu*o*CE*QO)}{_J>haU5zn+1QJ^eBg|d5n5-%|DwS@1+<Mtvat=iZ3BF??pZXh
+zth4PnnWL*s%}k43fbe34>yaZ_2@Kj<UGt)`2G5>K>)nIBR-xB@+1PQ2*c$lV?Z13o
+zbX%CHpm`!1Z4$d28~9k{rfu-0w@xg6{q!u2{)Dm_))4RK$?#7P*t7V+g_9d<V!MD`
+zaj`t-?uy6zsjzp<-IdM6g(XhQX2iF<+p?Kmw6?a+f^VMex*PuetNfqf+4_FpD%8TW
+eZvUbDHC^NLu5~gtzg|!EqSkX2ep9pg!tpEeo1jDh
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/e6530/devicetree.cb b/src/mainboard/dell/e6530/devicetree.cb
+new file mode 100644
+index 0000000000..96eed178c5
+--- /dev/null
++++ b/src/mainboard/dell/e6530/devicetree.cb
+@@ -0,0 +1,68 @@
++chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
++	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
++	register "gpu_cpu_backlight" = "0x00000251"
++	register "gpu_dp_b_hotplug" = "4"
++	register "gpu_dp_c_hotplug" = "4"
++	register "gpu_dp_d_hotplug" = "4"
++	register "gpu_panel_port_select" = "0"
++	register "gpu_panel_power_backlight_off_delay" = "2300"
++	register "gpu_panel_power_backlight_on_delay" = "2300"
++	register "gpu_panel_power_cycle_delay" = "6"
++	register "gpu_panel_power_down_delay" = "400"
++	register "gpu_panel_power_up_delay" = "400"
++	register "gpu_pch_backlight" = "0x13121312"
++
++	device domain 0x0 on
++		subsystemid 0x1028 0x0535 inherit
++
++		device ref host_bridge on end # Host bridge
++		device ref peg10 off end # PEG
++		device ref igd on end # iGPU
++
++		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
++			register "docking_supported" = "1"
++			register "gen1_dec" = "0x007c0681"
++			register "gen2_dec" = "0x005c0921"
++			register "gen3_dec" = "0x003c07e1"
++			register "gen4_dec" = "0x007c0901"
++			register "gpi0_routing" = "2"
++			register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
++			register "pcie_port_coalesce" = "1"
++			register "sata_interface_speed_support" = "0x3"
++			register "sata_port_map" = "0x33"
++			register "spi_lvscc" = "0x2005"
++			register "spi_uvscc" = "0x2005"
++			register "superspeed_capable_ports" = "0x0000000f"
++			register "xhci_overcurrent_mapping" = "0x00000c03"
++			register "xhci_switchable_ports" = "0x0000000f"
++
++			device ref xhci		on end # USB 3.0 Controller
++			device ref mei1		off end # Management Engine Interface 1
++			device ref mei2		off end # Management Engine Interface 2
++			device ref me_ide_r	off end # Management Engine IDE-R
++			device ref me_kt	on end # Management Engine KT
++			device ref gbe		on end # Intel Gigabit Ethernet
++			device ref ehci2	on end # USB2 EHCI #2
++			device ref hda		on end # High Definition Audio
++			device ref pcie_rp1	on end # PCIe Port #1
++			device ref pcie_rp2	on end # PCIe Port #2
++			device ref pcie_rp3	on end # PCIe Port #3
++			device ref pcie_rp4	on end # PCIe Port #4
++			device ref pcie_rp5	off end # PCIe Port #5
++			device ref pcie_rp6	on end # PCIe Port #6
++			device ref pcie_rp7	off end # PCIe Port #7
++			device ref pcie_rp8	off end # PCIe Port #8
++			device ref ehci1	on end # USB2 EHCI #1
++			device ref pci_bridge	off end # PCI bridge
++			device ref lpc		on # LPC bridge
++				chip ec/dell/mec5035
++					device pnp ff.0 on end
++				end
++			end
++			device ref sata1	on end # SATA Controller 1
++			device ref smbus	on end # SMBus
++			device ref sata2	off end # SATA Controller 2
++			device ref thermal	off end # Thermal
++		end
++	end
++end
+diff --git a/src/mainboard/dell/e6530/dsdt.asl b/src/mainboard/dell/e6530/dsdt.asl
+new file mode 100644
+index 0000000000..7d13c55b08
+--- /dev/null
++++ b/src/mainboard/dell/e6530/dsdt.asl
+@@ -0,0 +1,30 @@
++#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
++#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++
++#include <acpi/acpi.h>
++
++DefinitionBlock(
++	"dsdt.aml",
++	"DSDT",
++	ACPI_DSDT_REV_2,
++	OEM_ID,
++	ACPI_TABLE_CREATOR,
++	0x20141018	/* OEM revision */
++)
++{
++	#include <acpi/dsdt_top.asl>
++	#include "acpi/platform.asl"
++	#include <cpu/intel/common/acpi/cpu.asl>
++	#include <southbridge/intel/common/acpi/platform.asl>
++	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
++	#include <southbridge/intel/common/acpi/sleepstates.asl>
++
++	Device (\_SB.PCI0)
++	{
++		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
++		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
++		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
++	}
++}
+diff --git a/src/mainboard/dell/e6530/early_init.c b/src/mainboard/dell/e6530/early_init.c
+new file mode 100644
+index 0000000000..d57f48e7f1
+--- /dev/null
++++ b/src/mainboard/dell/e6530/early_init.c
+@@ -0,0 +1,38 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <northbridge/intel/sandybridge/raminit_native.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++const struct southbridge_usb_port mainboard_usb_ports[] = {
++	{ 1, 1, 0 },
++	{ 1, 1, 0 },
++	{ 1, 1, 1 },
++	{ 1, 1, 1 },
++	{ 1, 1, 2 },
++	{ 1, 1, 2 },
++	{ 1, 0, 3 },
++	{ 1, 1, 3 },
++	{ 1, 1, 4 },
++	{ 1, 1, 4 },
++	{ 1, 1, 5 },
++	{ 1, 1, 5 },
++	{ 1, 2, 6 },
++	{ 1, 2, 6 },
++};
++
++void bootblock_mainboard_early_init(void)
++{
++	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1c0f);
++	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0000);
++	mec5035_early_init();
++}
++
++void mainboard_get_spd(spd_raw_data *spd, bool id_only)
++{
++	read_spd(&spd[0], 0x50, id_only);
++	read_spd(&spd[2], 0x52, id_only);
++}
+diff --git a/src/mainboard/dell/e6530/gma-mainboard.ads b/src/mainboard/dell/e6530/gma-mainboard.ads
+new file mode 100644
+index 0000000000..1310830c8e
+--- /dev/null
++++ b/src/mainboard/dell/e6530/gma-mainboard.ads
+@@ -0,0 +1,20 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (
++      HDMI1, -- mainboard HDMI
++      DP2, -- dock DP
++      DP3, -- dock DP
++      Analog, --mainboard VGA
++      LVDS,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/dell/e6530/gpio.c b/src/mainboard/dell/e6530/gpio.c
+new file mode 100644
+index 0000000000..777570765a
+--- /dev/null
++++ b/src/mainboard/dell/e6530/gpio.c
+@@ -0,0 +1,192 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_GPIO,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_GPIO,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_NATIVE,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio1 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio3 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_OUTPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio28 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++	.gpio30 = GPIO_RESET_RSMRST,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio8 = GPIO_INVERT,
++	.gpio13 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_GPIO,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_OUTPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio45 = GPIO_DIR_OUTPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_INPUT,
++	.gpio51 = GPIO_DIR_INPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio34 = GPIO_LEVEL_HIGH,
++	.gpio45 = GPIO_LEVEL_LOW,
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_GPIO,
++	.gpio71 = GPIO_MODE_GPIO,
++	.gpio72 = GPIO_MODE_NATIVE,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_NATIVE,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio68 = GPIO_DIR_INPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio70 = GPIO_DIR_INPUT,
++	.gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/e6530/hda_verb.c b/src/mainboard/dell/e6530/hda_verb.c
+new file mode 100644
+index 0000000000..9de7e34311
+--- /dev/null
++++ b/src/mainboard/dell/e6530/hda_verb.c
+@@ -0,0 +1,33 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d76df,	/* Codec Vendor / Device ID: IDT */
++	0x10280535,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x10280535),
++	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
++	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++	0x80862806,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/e6530/mainboard.c b/src/mainboard/dell/e6530/mainboard.c
+new file mode 100644
+index 0000000000..31e49802fc
+--- /dev/null
++++ b/src/mainboard/dell/e6530/mainboard.c
+@@ -0,0 +1,21 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/device.h>
++#include <drivers/intel/gma/int15.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++#include <ec/acpi/ec.h>
++#include <console/console.h>
++#include <pc80/keyboard.h>
++
++static void mainboard_enable(struct device *dev)
++{
++
++	/* FIXME: fix these values. */
++	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
++					GMA_INT15_PANEL_FIT_DEFAULT,
++					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
++}
++
++struct chip_operations mainboard_ops = {
++	.enable_dev = mainboard_enable,
++};
+-- 
+2.42.1
+
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 17c82493..316fec4c 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -133,6 +133,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6430=y
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index ae163093..a834e4b6 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -131,6 +131,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6430=y
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..8d183842
--- /dev/null
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,603 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6530"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/e6530"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xBE5000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6530=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_VBT_DATA_SIZE_KB=8
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6530"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+CONFIG_SOUTH_BRIDGE_OPTIONS=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..01e086ef
--- /dev/null
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,600 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6530"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/e6530"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xBE5000
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6530=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_VBT_DATA_SIZE_KB=8
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6530"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+CONFIG_SOUTH_BRIDGE_OPTIONS=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
new file mode 100644
index 00000000..1cf0792e
--- /dev/null
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -0,0 +1,11 @@
+tree="default"
+romtype="normal"
+arch="x86_64"
+payload_grub="n"
+payload_grub_withseabios="n"
+payload_seabios="y"
+payload_memtest="y"
+payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
+grub_scan_disk="ahci"
+microcode_required="n"
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index f1775d76..4737e06c 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -136,6 +136,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 CONFIG_BOARD_DELL_PRECISION_T1650=y
 CONFIG_BOARD_DELL_SNB_IVB_WORKSTATIONS=y
diff --git a/config/vendor/sources b/config/vendor/sources
index 3fd0a4d3..d8e10be3 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -115,7 +115,7 @@
 	E6400_VGA_romname mod_21.bin
 }
 
-{e6430}{
+{e6430 e6530}{
 	DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
 	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
 	DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe

From a02c7e316370409e985fa634fec5a59326e3b4fd Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sun, 5 Nov 2023 20:09:32 -0700
Subject: [PATCH 0051/1549] config/coreboot/e6430_12mb: Fix configs

Fix a few issues with the E6430 configs to make it consistent with
configs for other boards and function as intended.

- Add VBT to CBFS: Although the VBT was enabled at the board level
  Kconfig in a previous commit (CONFIG_INTEL_GMA_HAVE_VBT), the config
  to actually add the VBT to CBFS was still unset.
- Enable the static option table: The old config would always use the
  fallback values hard coded in the coreboot tree, rather than the
  settings in the cmos.default file
- Enable DRAM clear on boot: This was not set previously, even though
  most other boards set this for security.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 .../coreboot/e6430_12mb/config/libgfxinit_corebootfb   | 10 ++++++----
 config/coreboot/e6430_12mb/config/libgfxinit_txtmode   | 10 ++++++----
 2 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index bd56a6c3..843a09e4 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -17,8 +17,9 @@ CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
-CONFIG_OPTION_BACKEND_NONE=y
-# CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_INCLUDE_CONFIG_FILE=y
@@ -125,6 +126,7 @@ CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
@@ -395,7 +397,7 @@ CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
@@ -479,7 +481,7 @@ CONFIG_PCR_RUNTIME_DATA=3
 # Memory initialization
 #
 CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
 # end of Memory initialization
 
 # CONFIG_STM is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index 8896ed0f..580cd6c7 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -17,8 +17,9 @@ CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
-CONFIG_OPTION_BACKEND_NONE=y
-# CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_INCLUDE_CONFIG_FILE=y
@@ -123,6 +124,7 @@ CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
@@ -391,7 +393,7 @@ CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
@@ -476,7 +478,7 @@ CONFIG_PCR_RUNTIME_DATA=3
 # Memory initialization
 #
 CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
 # end of Memory initialization
 
 # CONFIG_STM is not set

From f12f5c3aeef11b43194cb25eb5e395958283c2c9 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Mon, 6 Nov 2023 12:52:46 +0200
Subject: [PATCH 0052/1549] nvmutil: fix makefile

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 util/nvmutil/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/util/nvmutil/Makefile b/util/nvmutil/Makefile
index f9f72370..f25f6dd5 100644
--- a/util/nvmutil/Makefile
+++ b/util/nvmutil/Makefile
@@ -6,7 +6,7 @@ CC=cc
 CFLAGS=-Os -Wall -Wextra -Werror -pedantic
 PREFIX?=/usr/bin
 
-nvm:
+nvm: nvmutil.c
 	$(CC) $(CFLAGS) nvmutil.c -o nvm
 
 install: nvm

From 866087211fddd5b468841fa29b17b65dbd582b7c Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Mon, 6 Nov 2023 13:00:05 +0200
Subject: [PATCH 0053/1549] nvmutil: print usage

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 util/nvmutil/nvmutil.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 0ccfaf32..35abbfae 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: MIT */
 /* SPDX-FileCopyrightText: 2022, 2023 Leah Rowe <leah@libreboot.org> */
+/* SPDX-FileCopyrightText: 2023 Riku Viitanen <riku.viitanen@protonmail.com> */
 
 #include <sys/stat.h>
 
@@ -61,8 +62,16 @@ void (*cmd)(void) = NULL;
 int
 main(int argc, char *argv[])
 {
-	if (argc < 3)
+	if (argc < 3) {
+		fprintf(stderr, "USAGE:\n");
+		fprintf(stderr, " %s FILE dump\n", argv[0]);
+		fprintf(stderr, " %s FILE setmac [MAC]\n", argv[0]);
+		fprintf(stderr, " %s FILE swap\n", argv[0]);
+		fprintf(stderr, " %s FILE copy 0|1\n", argv[0]);
+		fprintf(stderr, " %s FILE brick 0|1\n", argv[0]);
+		fprintf(stderr, " %s FILE setchecksum 0|1\n", argv[0]);
 		err(errno = ECANCELED, "Too few arguments");
+	}
 	flags = (strcmp(COMMAND, "dump") == 0) ? O_RDONLY : flags;
 	filename = argv[1];
 #ifdef __OpenBSD__

From d0d6decb564905c44cb20467e30d6bb3101580b5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 Nov 2023 11:41:27 +0000
Subject: [PATCH 0054/1549] re-add grub modules: f2fs, json, read, scsi, sleep

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/modules.list | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/config/grub/modules.list b/config/grub/modules.list
index c33f3c33..fdd0aaef 100644
--- a/config/grub/modules.list
+++ b/config/grub/modules.list
@@ -39,6 +39,7 @@ ehci \
 eval \
 elf \
 ext2 \
+f2fs \
 gcry_arcfour \
 gcry_blowfish \
 gcry_camellia \
@@ -71,6 +72,7 @@ help \
 iorw \
 iso9660 \
 jpeg \
+json \
 keylayouts \
 keystatus \
 linux \
@@ -112,9 +114,11 @@ png \
 procfs \
 raid5rec \
 raid6rec \
+read \
 reboot \
 regexp \
 romfs \
+scsi \
 search \
 search_fs_file \
 search_fs_uuid \
@@ -124,6 +128,7 @@ syslinuxcfg \
 setpci \
 spkmodem \
 squash4 \
+sleep \
 tar \
 test \
 true \

From c4d90087535617d4fb31ca94803f9426010cfec5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 Nov 2023 11:50:14 +0000
Subject: [PATCH 0055/1549] add grub mods: diskfilter,hashsum,loadenv,setjmp

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/modules.list | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/config/grub/modules.list b/config/grub/modules.list
index fdd0aaef..0557edd3 100644
--- a/config/grub/modules.list
+++ b/config/grub/modules.list
@@ -34,6 +34,7 @@ cpio_be \
 crc64 \
 crypto \
 cryptodisk \
+diskfilter \
 echo \
 ehci \
 eval \
@@ -67,6 +68,7 @@ gfxmenu \
 gfxterm_background \
 gfxterm_menu \
 gzio \
+hashsum \
 halt \
 help \
 iorw \
@@ -77,6 +79,7 @@ keylayouts \
 keystatus \
 linux \
 linux16 \
+loadenv \
 loopback \
 ls \
 lsacpi \
@@ -125,6 +128,7 @@ search_fs_uuid \
 search_label \
 serial \
 syslinuxcfg \
+setjmp \
 setpci \
 spkmodem \
 squash4 \

From f4b2a588e27f1bc8d13ed1f31c68590bd76dcf4f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 8 Nov 2023 06:05:49 +0000
Subject: [PATCH 0056/1549] build: don't generate version/versiondate as root

don't run it directly at the bottom of err.sh,
because otherwise the version and versiondate
files will be generated when running "./build
dependencies distroname" which would then create
these files, but as root because the user runs
that specific command as root.

the rest of lbmk, for any other command, prevents
use of the root account, so running check_project
during "./build dependencies distroname" will cause
the build system to fail (because as non-root user,
the user will run lbmk and it will try to update
those files, and fail because it can't, due to lack
of permissions)

this patch fixes the issue, by only generating those
files if the user is *not* root

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build          | 7 ++++++-
 include/err.sh | 2 --
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/build b/build
index 8c9f8f9c..0d9fcf46 100755
--- a/build
+++ b/build
@@ -43,7 +43,10 @@ main()
 {
 	xx_ id -u 1>/dev/null 2>/dev/null
 	[ $# -lt 1 ] && fail "Too few arguments. Try: ${0} help"
-	[ "${1}" = "dependencies" ] && xx_ install_packages $@ && lbmk_exit 0
+	if [ "${1}" = "dependencies" ]; then
+		xx_ install_packages $@
+		lbmk_exit 0
+	fi
 
 	initialise_command $@ && shift 1
 
@@ -59,6 +62,8 @@ initialise_command()
 {
 	[ "$(id -u)" != "0" ] || fail "this command as root is not permitted"
 
+	check_project
+
 	case "${1}" in
 	help) usage ${0} && lbmk_exit 0 ;;
 	list) items "${buildpath}" && lbmk_exit 0 ;;
diff --git a/include/err.sh b/include/err.sh
index 33246d12..595d6c77 100755
--- a/include/err.sh
+++ b/include/err.sh
@@ -78,5 +78,3 @@ err()
 	printf "ERROR %s: %s\n" "${0}" "${1}" 1>&2
 	exit 1
 }
-
-check_project

From 64f933747021cb783230b9aef367921884ece555 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 8 Nov 2023 06:17:40 +0000
Subject: [PATCH 0057/1549] lbmk: support showing the revision in help text

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 22 ++++++++++++++++++++--
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/build b/build
index 0d9fcf46..6e61c763 100755
--- a/build
+++ b/build
@@ -65,8 +65,15 @@ initialise_command()
 	check_project
 
 	case "${1}" in
-	help) usage ${0} && lbmk_exit 0 ;;
-	list) items "${buildpath}" && lbmk_exit 0 ;;
+	help)
+		usage ${0}
+		lbmk_exit 0 ;;
+	list)
+		items "${buildpath}"
+		lbmk_exit 0 ;;
+	version)
+		mkversion
+		lbmk_exit 0 ;;
 	esac
 	option="${1}"
 }
@@ -116,15 +123,26 @@ usage()
 {
 	progname=${0}
 	cat <<- EOF
+	$(mkversion)
+
 	USAGE:	${progname} <OPTION>
 
 	possible values for 'OPTION':
 	$(items "${buildpath}")
 
+	To know whot ${projectname} version you're on, type:
+	${progname} version
+
 	Refer to ${projectname} documentation for more info.
 	EOF
 }
 
+mkversion()
+{
+	printf "revision: %s %s\n" "${projectname}" "${version}"
+	printf "revision date: %s\n" "$(date -Rud @${versiondate})"
+}
+
 lbmk_exit()
 {
 	tmp_cleanup || err "lbmk_exit: can't rm tmpdir upon exit $1: ${tmpdir}"

From 5af3ae0586ba1f437cecab551ab4fba6fb6bdef1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 8 Nov 2023 06:31:04 +0000
Subject: [PATCH 0058/1549] lbmk: don't use status for unconditional returns

in cases where lbmk must always return from a function,
there are some cases where it relies on non-zero exit
status, which in practise is always the case, but may
change in the future if the relevant part is modified

e.g. do_something && return 0

the proper form is:
do_something
return 0

also do this for unconditional exits

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms      | 15 ++++++++++-----
 script/build/serprog   |  5 ++++-
 script/update/trees    |  7 +++++--
 script/vendor/download |  6 ++++--
 script/vendor/inject   |  6 ++++--
 5 files changed, 27 insertions(+), 12 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index ff50d9b7..a96ad89b 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -31,8 +31,12 @@ main()
 {
 	while [ $# -gt 0 ]; do
 		case ${1} in
-		help) usage && exit 0 ;;
-		list) items config/coreboot && exit 0 ;;
+		help)
+			usage
+			exit 0 ;;
+		list)
+			items config/coreboot || :
+			exit 0 ;;
 		-d) _displaymode="${2}" ;;
 		-p) _payload="${2}" ;;
 		-k) _keyboard="${2}" ;;
@@ -216,10 +220,11 @@ build_target()
 build_roms()
 {
 	cbcfg="${1}"
-	[ ! -f "${cbcfg}" ] && \
+	if [ ! -f "${cbcfg}" ]; then
 		printf "'%s' does not exist. Skipping build for %s %s %s\n" \
-		    "${cbcfg}" "${board}" "${displaymode}" "${initmode}" \
-		    1>&2 && return 0
+		    "${cbcfg}" "${board}" "${displaymode}" "${initmode}" 1>&2
+		return 0
+	fi
 
 	x_ ./update trees -b coreboot ${board}
 
diff --git a/script/build/serprog b/script/build/serprog
index 93ea9302..7f8664a9 100755
--- a/script/build/serprog
+++ b/script/build/serprog
@@ -34,7 +34,10 @@ main()
 	x_ mkdir -p "bin/serprog_${platform}"
 
 	if [ $# -gt 1 ] ; then
-		[ "${2}" = "list" ] && print_boards ${boards_dir} && return 0
+		if [ "${2}" = "list" ]; then
+			print_boards ${boards_dir}
+			return 0
+		fi
 		build_${platform}_rom "${2}"
 	else
 		printf "Building all serprog targets\n"
diff --git a/script/update/trees b/script/update/trees
index a930bed1..bd0fcb61 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -37,8 +37,11 @@ main()
 	[ -z "${_f}" ] && err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
 	[ -z "${project}" ] && err "project name not specified"
 
-	[ -f "config/${project}/build.list" ] && build_targets $@ && return 0
-	build_projects $@
+	if [ -f "config/${project}/build.list" ]; then
+		build_targets $@
+	else
+		build_projects $@
+	fi
 }
 
 build_projects()
diff --git a/script/vendor/download b/script/vendor/download
index 12231b39..4613c2b6 100755
--- a/script/vendor/download
+++ b/script/vendor/download
@@ -140,8 +140,10 @@ vendor_checksum()
 
 mkdirs()
 {
-	[ -f "${1}" ] && \
-		printf "mkdirs ${1} ${2}: already downloaded\n" 1>&2 && return 1
+	if [ -f "${1}" ]; then
+		printf "mkdirs ${1} ${2}: already downloaded\n" 1>&2
+		return 1
+	fi
 	mkdir -p "${1%/*}" || err "mkdirs: !mkdir -p ${1%/*}"
 	x_ rm -Rf "${appdir}"
 	x_ mkdir -p "${appdir}/"
diff --git a/script/vendor/inject b/script/vendor/inject
index 93017cec..088851ca 100755
--- a/script/vendor/inject
+++ b/script/vendor/inject
@@ -14,8 +14,10 @@ eval "$(setvars "" archive rom modifygbe nukemode release new_mac)"
 main()
 {
 	[ $# -lt 1 ] && err "No options specified."
-	[ "${1}" = "listboards" ] && \
-		items config/coreboot && exit 0
+	if [ "${1}" = "listboards" ]; then
+		items config/coreboot || :
+		exit 0
+	fi
 
 	archive="${1}"
 

From 70882902b5d4f0bdc7a627b0bc9b6152bbecaca9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 9 Nov 2023 16:31:40 +0000
Subject: [PATCH 0059/1549] build: set --author when running git init

set it to a generic name:
lbmk <lbmk@libreboot.org>

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/build b/build
index 6e61c763..932c598c 100755
--- a/build
+++ b/build
@@ -106,7 +106,8 @@ git_init()
 
 	git init || fail "${PWD}: cannot initialise Git repository"
 	git add -A . || fail "${PWD}: cannot add files to Git repository"
-	git commit -m "${projectname} ${version}" --date "${cdate}" || \
+	git commit -m "${projectname} ${version}" --date "${cdate}" \
+	    --author="lbmk <lbmk@libreboot.org>" || \
 	    fail "${PWD}: can't commit ${projectname}/${version}, date ${cdate}"
 	git tag -a "${version}" -m "${projectname} ${version}" || \
 	    fail "${PWD}: cannot git-tag ${projectname}/${version}"

From ce1176f521705104ce11c3e322e11fcdb6e8561f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 9 Nov 2023 16:40:36 +0000
Subject: [PATCH 0060/1549] fix typo in help text

say whot?

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build b/build
index 932c598c..736450e6 100755
--- a/build
+++ b/build
@@ -131,7 +131,7 @@ usage()
 	possible values for 'OPTION':
 	$(items "${buildpath}")
 
-	To know whot ${projectname} version you're on, type:
+	To know what ${projectname} version you're on, type:
 	${progname} version
 
 	Refer to ${projectname} documentation for more info.

From 47ef411efb6b669b7befd2a1cf22f999d4521999 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 9 Nov 2023 21:01:56 +0000
Subject: [PATCH 0061/1549] Bump GRUB revision to 8 November 2023 revision

Now the revision is:
64e3cee72ab8f5876abfebb263b5e6cf7c4a9a4e

The old revision was:
e58b870ff926415e23fc386af41ff81b2f588763

With this new revision update, the following patches have
been imported from the upstream GRUB project:

* 64e3cee72 gpt: Add compile time asserts for guid and gpt_partentry sizes
* 7de6fe963 types: Split aligned and packed guids
* 5fc985bfd gpt_partition: Mark grub_gpt_partentry as having natural alignment
* 7ad30299d efi: Deduplicate configuration table search function
* c6cf807fc lsefi: Add missing static qualifier
* a964e359b types: Fix typo
* 3f79e3b15 util/grub-mount: Check file path sanity
* 85e40b36e configure: Make the DJVU_FONT_SOURCE configurable with --with-dejavufont=FILE
* 2d6631d2a configure: Make the Unifont FONT_SOURCE configurable with --with-unifont=FILE
* 07318ee7e fs/xfs: Fix XFS directory extent parsing
* ad7fb8e2e fs/xfs: Incorrect short form directory data boundary check
* 4e10213de Revert "zfsinfo: Correct a check for error allocating memory"
* 4266fd2bb disk/i386/pc/biosdisk: Read up to 63 sectors in LBA mode
* cab04dcda kern/i386/pc/init: Flush cache only on VIA C3 and earlier
* 3c7e84257 fs/btrfs: Zero file data not backed by extents
* 4bcf6f747 kern/ieee1275/init: Restrict high memory in presence of fadump on ppc64
* cf58eca2a tests/util/grub-shell: Enable RNG device to better test stack smashing
* c3bdf263f kern/efi/init: Disable stack smashing protection on grub_efi_init()
* 95963d97f disk/cryptodisk: Add support for LUKS2 in (proc)/luks_script
* 016f14257 disk/cryptodisk: Optimize luks_script_get()
* f7a663c00 term/serial: Ensure proper NULL termination after grub_strncpy()
* a19e47ca4 commands/efi/lsefisystab: Print the UEFI specification revision in human readable form

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/grub | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/git/grub b/config/git/grub
index c34c27b4..4f488dfb 100644
--- a/config/git/grub
+++ b/config/git/grub
@@ -1,5 +1,5 @@
 {grub}{
-	rev: e58b870ff926415e23fc386af41ff81b2f588763
+	rev: 64e3cee72ab8f5876abfebb263b5e6cf7c4a9a4e
 	loc: grub
 	url: git://git.savannah.gnu.org/grub.git
 	bkup_url: https://codeberg.org/libreboot/grub

From 39aad57873b9e6265d089ef7dbb4dc5add5c659f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 13 Nov 2023 22:59:33 +0000
Subject: [PATCH 0062/1549] grub: re-add fat/nt file system modules

apparently some people use fat file systems for /boot
on linux systems

this is apparently a thing

it's ridiculous, but also a thing

a user reported they could not boot their t400 because
of those, because they have such a distro installed
on their machine

apparently it was a gentoo user

i don't really care. re-add 1980s dos file system support.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/modules.list | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/config/grub/modules.list b/config/grub/modules.list
index 0557edd3..40bfd339 100644
--- a/config/grub/modules.list
+++ b/config/grub/modules.list
@@ -38,8 +38,10 @@ diskfilter \
 echo \
 ehci \
 eval \
+exfat \
 elf \
 ext2 \
+fat \
 f2fs \
 gcry_arcfour \
 gcry_blowfish \
@@ -101,6 +103,7 @@ multiboot \
 multiboot2 \
 nativedisk \
 normal \
+ntfs \
 ohci \
 part_bsd \
 part_dfly \

From 83c8248f5595373e9bfd296c0ee4e03bfd93380f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 Nov 2023 17:49:07 +0000
Subject: [PATCH 0063/1549] dependencies/debian: fix libfreetype-dev

install libfreetype-dev, instead of libfreetype6-dev

this still works in debian stable (currently 12.2) but
fixes debian sid, as of 15 November 2023. my test machine
with debian sid could not install libfreetype6-dev, but
could install libfreetype-dev

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/debian | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/dependencies/debian b/config/dependencies/debian
index e49dc78b..b3c78ae2 100755
--- a/config/dependencies/debian
+++ b/config/dependencies/debian
@@ -4,7 +4,7 @@ acpica-tools autoconf autogen automake autopoint autotools-dev bc \
 binutils-arm-none-eabi bison build-essential cmake curl device-tree-compiler \
 doxygen e2fsprogs efitools flex fonts-unifont gawk gcc-arm-linux-gnueabi \
 gcc-arm-none-eabi gdb gettext git gnat help2man innoextract libdevmapper-dev \
-libfdt-dev libfont-freetype-perl libfreetype6-dev libftdi-dev libfuse-dev \
+libfdt-dev libfont-freetype-perl libfreetype-dev libftdi-dev libfuse-dev \
 libgnutls28-dev liblz4-tool liblzma-dev libncurses5-dev libncurses-dev \
 libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev libpython3-dev \
 libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0 libusb-1.0-0-dev \

From 4e00ac003b37e6ad403f2271c821e3d81274395a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 22 Nov 2023 12:18:00 +0000
Subject: [PATCH 0064/1549] revert flashrom back to version 1.2

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/flashrom | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/git/flashrom b/config/git/flashrom
index 64586ed8..2b6fb574 100644
--- a/config/git/flashrom
+++ b/config/git/flashrom
@@ -1,5 +1,5 @@
 {flashrom}{
-	rev: fba29da188b4a3aa8a3cf6f5a3d13c37a5d9e1d7
+	rev: 05c629be2964bcee368c03d805747da15281856d
 	loc: flashrom 
 	url: https://review.coreboot.org/flashrom.git
 	bkup_url: https://github.com/flashrom/flashrom

From 50bfe1cae0d80e86368c23c102366bb444fd3a69 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sat, 2 Dec 2023 18:16:42 +0200
Subject: [PATCH 0065/1549] fix void dependencies typo

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 config/dependencies/void | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/dependencies/void b/config/dependencies/void
index 4d8d5444..f1522cf2 100644
--- a/config/dependencies/void
+++ b/config/dependencies/void
@@ -3,7 +3,7 @@ pkglist=" \
 acpica-utils autogen base-devel bison cmake \
 cross-arm-none-eabi-binutils cross-arm-none-eabi-gcc \
 cross-arm-none-eabi-libstdc++ cross-arm-none-eabi-newlib curl \
-dejavu-fonts-ttf device-mapper doxygen e2fsprogs flexflex font-unifont-bdf \
+dejavu-fonts-ttf device-mapper doxygen e2fsprogs flex font-unifont-bdf \
 freetype fuse gawk gcc-ada gdb gettext gettext-devel git help2man \
 innoextract libftdi1 libpciaccess libusb nasm ncurses ncurses-devel openssl
 p7zip parted pciutils perl perl-LWP python python3 python3-setuptools rsync \

From 01a824318ba4dcdbc65fe4f3ca6d31815c47bfc2 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sat, 2 Dec 2023 20:34:13 +0200
Subject: [PATCH 0066/1549] fix void dependencies: freetype-devel

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 config/dependencies/void | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/config/dependencies/void b/config/dependencies/void
index f1522cf2..039da74f 100644
--- a/config/dependencies/void
+++ b/config/dependencies/void
@@ -4,8 +4,8 @@ acpica-utils autogen base-devel bison cmake \
 cross-arm-none-eabi-binutils cross-arm-none-eabi-gcc \
 cross-arm-none-eabi-libstdc++ cross-arm-none-eabi-newlib curl \
 dejavu-fonts-ttf device-mapper doxygen e2fsprogs flex font-unifont-bdf \
-freetype fuse gawk gcc-ada gdb gettext gettext-devel git help2man \
-innoextract libftdi1 libpciaccess libusb nasm ncurses ncurses-devel openssl
-p7zip parted pciutils perl perl-LWP python python3 python3-setuptools rsync \
-sharutils subversion texinfo unar unzip wget xz zlib \
+freetype freetype-devel fuse gawk gcc-ada gdb gettext gettext-devel git \
+help2man innoextract libftdi1 libpciaccess libusb nasm ncurses \
+ncurses-devel openssl p7zip parted pciutils perl perl-LWP python python3 \
+python3-setuptools rsync sharutils subversion texinfo unar unzip wget xz zlib
 "

From 6d8d2e7538cf0a28e48e24858eea0c063d73f5e8 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sat, 2 Dec 2023 21:38:41 +0200
Subject: [PATCH 0067/1549] fix void dependencies: openssl-devel

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 config/dependencies/void | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/config/dependencies/void b/config/dependencies/void
index 039da74f..0ab258c2 100644
--- a/config/dependencies/void
+++ b/config/dependencies/void
@@ -6,6 +6,7 @@ cross-arm-none-eabi-libstdc++ cross-arm-none-eabi-newlib curl \
 dejavu-fonts-ttf device-mapper doxygen e2fsprogs flex font-unifont-bdf \
 freetype freetype-devel fuse gawk gcc-ada gdb gettext gettext-devel git \
 help2man innoextract libftdi1 libpciaccess libusb nasm ncurses \
-ncurses-devel openssl p7zip parted pciutils perl perl-LWP python python3 \
-python3-setuptools rsync sharutils subversion texinfo unar unzip wget xz zlib
+ncurses-devel openssl openssl-devel p7zip parted pciutils perl perl-LWP \
+python python3 python3-setuptools rsync sharutils subversion texinfo \
+unar unzip wget xz zlib
 "

From 9558e2fce790b044c33c54dfc58780a66e98b770 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 11 Dec 2023 04:59:44 +0000
Subject: [PATCH 0068/1549] improved safety/error handling on multitree git-am

update/trees wasn't correctly returning non-zero status,
even though it was printing an error message, when git-am
failed. this is due to the way subshells work, and it was
overlooked in previous auditing.

additionally: don't directly copy trees to the destination,
instead patch/reset first, then copy only under normal
condition, just as with single-tree projects.

when running build/roms, the script would continue after
a bad git-am, without exit. this patch fixes it in the
most paranoid way possible. i'm now fairly confident that
lbmk will fail gracefully and efficiently, under error
conditions. this should prevent bad image builds.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 30 ++++++++++++++++++++++--------
 1 file changed, 22 insertions(+), 8 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index fa53fed1..49148224 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -4,7 +4,7 @@
 
 # This file is only used by update/project/trees
 
-eval "$(setvars "" _target rev _xm loc url bkup_url depend)"
+eval "$(setvars "" _target rev _xm loc url bkup_url depend patchfail)"
 tmp_git_dir="${PWD}/tmp/gitclone"
 
 fetch_project_trees()
@@ -58,16 +58,27 @@ prepare_new_tree()
 {
 	printf "Creating %s tree %s (%s)\n" "${project}" "${tree}" "${_target}"
 
-	x_ cp -R "src/${project}/${project}" "src/${project}/${tree}"
-	git_reset_rev "src/${project}/${tree}" "${rev}"
+	rm -Rf "${tmp_git_dir%/*}" || \
+	    err "prepare_new_tree ${project}/${tree}: can't rm tmpclone"
+	mkdir "${tmp_git_dir%/*}" || \
+	    err "prepare_new_tree ${project}/${tree}: can't mkdir tmp"
+	cp -R "src/${project}/${project}" "${tmp_git_dir}" || \
+	    err "prepare_new_tree ${project}/${tree}: can't make tmpclone"
+	git_reset_rev "${tmp_git_dir}" "${rev}"
 	(
-	x_ cd "src/${project}/${tree}"
+	cd "${tmp_git_dir}" || \
+	    err "prepare_new_tree ${project}/${tree}: can't cd tmpclone"
 	if [ -f ".gitmodules" ]; then
 		git submodule update --init --checkout || \
 		    err "prepare_new_tree ${project}/${tree}: !submodules"
 	fi
 	)
-	git_am_patches "$PWD/src/$project/$tree" "$PWD/$cfgsdir/$tree/patches"
+	git_am_patches "${tmp_git_dir}" "$PWD/$cfgsdir/$tree/patches" || \
+	    err "prepare_new_tree ${project}/${tree}: patch fail"
+	[ "${patchfail}" = "y" ] && err "PATCH FAIL"
+
+	mv "${tmp_git_dir}" "src/${project}/${tree}" || \
+	    err "prepare_new_tree ${project}/${tree}: can't copy tmpclone"
 }
 
 fetch_project_repo()
@@ -107,7 +118,9 @@ clone_project()
 	    git clone ${bkup_url} "${tmp_git_dir}" || \
 	    err "clone_project: could not download ${project}"
 	git_reset_rev "${tmp_git_dir}" "${rev}"
-	git_am_patches "${tmp_git_dir}" "${PWD}/config/${project}/patches"
+	git_am_patches "${tmp_git_dir}" "${PWD}/config/${project}/patches" \
+	    || err "clone_project ${project} ${loc}: patch fail"
+	[ "${patchfail}" = "y" ] && err "PATCH FAIL"
 
 	x_ rm -Rf "${loc}"
 	[ "${loc}" = "${loc%/*}" ] || x_ mkdir -p ${loc%/*}
@@ -137,17 +150,18 @@ git_am_patches()
 	for patch in "${patchdir}/"*; do
 		[ -L "${patch}" ] && continue
 		[ -f "${patch}" ] || continue
-		patchfail="n"
 		git am "${patch}" || patchfail="y"
 		if [ "${patchfail}" = "y" ]; then
 			git am --abort || err  "${sdir}: !git am --abort"
 			err  "!git am ${patch} -> ${sdir}"
 		fi
 	done
-	)
+	) || err "PATCH FAILURE"
 	for patches in "${patchdir}/"*; do
 		[ -L "${patches}" ] && continue
 		[ ! -d "${patches}" ] && continue
 		git_am_patches "${sdir}" "${patches}"
 	done
+	[ "${patchfail}" = "y" ] && return 1
+	return 0
 }

From 2e779a54951406247197cf21a31c54a36ec1fa06 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 11 Dec 2023 05:21:27 +0000
Subject: [PATCH 0069/1549] handle errors on exits from subshells

most of these are probably redundant, and will never
be called, but lbmk needs to be as safe as possible
under fault conditions. fail early, fail hard.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh         |  4 ++--
 include/mrc.sh         |  2 +-
 script/build/grub      |  2 +-
 script/update/release  | 18 +++++++++---------
 script/update/trees    |  2 +-
 script/vendor/download |  4 ++--
 script/vendor/inject   |  2 +-
 7 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 49148224..811b298a 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -72,7 +72,7 @@ prepare_new_tree()
 		git submodule update --init --checkout || \
 		    err "prepare_new_tree ${project}/${tree}: !submodules"
 	fi
-	)
+	) || err "git submodule update failure"
 	git_am_patches "${tmp_git_dir}" "$PWD/$cfgsdir/$tree/patches" || \
 	    err "prepare_new_tree ${project}/${tree}: patch fail"
 	[ "${patchfail}" = "y" ] && err "PATCH FAIL"
@@ -138,7 +138,7 @@ git_reset_rev()
 		git submodule update --init --checkout || \
 		    err "git_reset_rev ${1}: can't download submodules"
 	fi
-	)
+	) || err "git reset fail"
 }
 
 git_am_patches()
diff --git a/include/mrc.sh b/include/mrc.sh
index e57026a4..929aed7a 100755
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -20,7 +20,7 @@ extract_mrc()
 	extract_partition
 	extract_shellball
 	extract_coreboot
-	)
+	) || err "mrc download/extract failure"
 
 	"${cbfstool}" "${appdir}/"coreboot-*.bin extract -n mrc.bin \
 	    -f "${_dest}" -r RO_SECTION || err "extract_mrc: cbfstool ${_dest}"
diff --git a/script/build/grub b/script/build/grub
index 31fc0084..5fa47c00 100755
--- a/script/build/grub
+++ b/script/build/grub
@@ -38,7 +38,7 @@ build_grub_utils()
 	x_ ./autogen.sh
 	x_ ./configure --with-platform=coreboot
 	make -j$(nproc) FS_PAYLOAD_MODULES="" || err "!mk grub utils"
-	)
+	) || err "grub build error"
 }
 
 build_keymap_configs()
diff --git a/script/update/release b/script/update/release
index dcddb44c..447d93ce 100755
--- a/script/update/release
+++ b/script/update/release
@@ -50,11 +50,11 @@ build_release()
 	cd "${srcdir}" || err "${_xm}: !cd \"${srcdir}\""
 	fetch_trees
 	x_ mv src/docs docs
-	)
+	) || err "can't copy docs"
 	(
 	cd "${srcdir%/*}" || err "${_xm}: mktarball \"${srcdir}\""
 	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || err "${_xm}: mksrc"
-	)
+	) || err "can't create pre-crossgcc src tarball"
 	[ "${mode}" = "src" ] && return 0 # for src mode, xgcc tarballs are
 					  # not included in the src archive
 
@@ -64,7 +64,7 @@ build_release()
 	(
 	cd "${srcdir}" || err "${_xm}: 2 !cd \"${srcdir}\""
 	mkrom_images
-	)
+	) || err "can't build rom images"
 	for _cbd in "${srcdir}/src/coreboot/"*; do
 		[ -d "${_cbd}/util/crossgcc/tarballs" ] || continue
 		_xgccdir="${vdir}/crossgcc/${_cbd##*/}"
@@ -78,7 +78,7 @@ build_release()
 	cd "${srcdir%/*}" || err "${_xm} 2: mktarball \"${srcdir}\""
 	tar -xf "${srcdir##*/}.tar.xz" || err "!extract ${srcdir##*/}.tar.xz"
 	rm -f "${srcdir##*/}.tar.xz" || err "!rm -f ${srcdir##*/}.tar.xz"
-	)
+	) || err "can't extract pre-crossgcc src tarball"
 	for _xgcc in "${vdir}/crossgcc/"*; do
 		[ -d "${_xgcc}" ] || continue
 		mkdir -p "${srcdir}/src/coreboot/${_xgcc##*/}/util/crossgcc/tarballs" || \
@@ -91,7 +91,7 @@ build_release()
 	(
 	cd "${srcdir%/*}" || err "${_xm}: mktarball \"${srcdir}\""
 	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || err "${_xm}: mksrc"
-	)
+	) || err "can't create src tarball with crossgcc"
 
 	# now test the vendor insert script, using the release archive:
 	(
@@ -106,7 +106,7 @@ build_release()
 		    err "TESTFAIL: inject: ${vrom##*/}"
 		continue
 	done
-	)
+	) || err "vendorfile inject test failure"
 
 	rm -Rf "${srcdir}" || err "!rm -Rf ${srcdir}"
 }
@@ -210,7 +210,7 @@ nukerom()
 	(
 	cd "${romdir}" || err "!cd romdir ${romdir}, nukerom"
 	sha512sum *.rom >> vendorhashes || err "!create vendorhashes, nukerom"
-	)
+	) || err "can't create vendor hashes"
 
 	for romfile in "${romdir}"/*.rom; do
 		[ -f "${romfile}" ] || continue
@@ -257,7 +257,7 @@ mkrom_tarball()
 	(
 	cd "${romdir%/bin/${target}}" || err "!cd ${romdir%/bin/${target}}"
 	mktarball "bin/${target}" "${archivename}.tar.xz"
-	)
+	) || err "can't create rom tarball"
 	mv "${romdir%/bin/${target}}/${archivename}.tar.xz"* "${f%/*}" || \
 	    err "!mktarball, rom, ${f%/*}/${romdir%/bin/${target}}/${archivename}.tar.xz"
 
@@ -289,7 +289,7 @@ mktarball()
 	[ "${2%/*}" != "${2}" ] && x_ cd "${2%/*}"
 	sha512sum "${2##*/}" > "${2##*/}.sha512" || \
 	    err "!sha512sum \"${2##*/}\" > \"${2##*/}.sha512\""
-	)
+	) || err "failed to create tarball checksum"
 }
 
 main $@
diff --git a/script/update/trees b/script/update/trees
index bd0fcb61..1719aab9 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -61,7 +61,7 @@ build_projects()
 		x_ cd src/uefitool
 		cmake UEFIExtract/ || [ -f Makefile ] || \
 		    err "build_projects: !cmake UEFIExtract/"
-	)
+	) || err "can't build cmake on uefiextract"
 	fi
 
 	[ "${mode}" = "distclean" ] && mode="clean"
diff --git a/script/vendor/download b/script/vendor/download
index 4613c2b6..eada2e91 100755
--- a/script/vendor/download
+++ b/script/vendor/download
@@ -214,7 +214,7 @@ extract_kbc1126ec()
 	[ -f ec.bin ] || err "extract_kbc1126_ec ${board}: can't extract"
 	"${kbc1126_ec_dump}" ec.bin || \
 	    err "extract_kbc1126_ec ${board}: can't extract ecfw1/2.bin"
-	)
+	) || err "can't extract kbc1126 ec firmware"
 	ec_ex="y"
 	for i in 1 2; do
 		[ -f "${appdir}/ec.bin.fw${i}" ] || ec_ex="n"
@@ -239,7 +239,7 @@ extract_e6400vga()
 	"${e6400_unpack}" bios.bin || printf "TODO: fix dell extract util\n"
 	[ -f "${E6400_VGA_romname}" ] || \
 		err "extract_e6400vga: can't extract vga rom from bios.bin"
-	)
+	) || err "can't extract e6400 vga rom"
 	cp "${appdir}/${E6400_VGA_romname}" "${_dest}" || \
 	    err "extract_e6400vga ${board}: can't copy vga rom to ${_dest}"
 }
diff --git a/script/vendor/inject b/script/vendor/inject
index 088851ca..2e125f4f 100755
--- a/script/vendor/inject
+++ b/script/vendor/inject
@@ -141,7 +141,7 @@ patch_release_roms()
 	    sha512sum --status -c blobhashes || \
 	    sha1sum --status -c blobhashes || \
 	    err "patch_release_roms: ROMs did not match expected hashes"
-	)
+	) || err "can't verify vendor hashes"
 
 	if [ "${modifygbe}" = "true" ]; then
 		for x in "${_tmpdir}"/bin/*/*.rom ; do

From 2e6073f2a7a84a527e32bcd7540d4bee7c758860 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Mon, 11 Dec 2023 23:28:36 +0200
Subject: [PATCH 0070/1549] config/dependencies/debian: add unifont-bin &
 xfonts-unifont

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 config/dependencies/debian | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/dependencies/debian b/config/dependencies/debian
index b3c78ae2..f40d9b0d 100755
--- a/config/dependencies/debian
+++ b/config/dependencies/debian
@@ -11,5 +11,5 @@ libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0 libusb-1.0-0-dev \
 libusb-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted pciutils \
 perl pkg-config python3 python3-distutils python3-pkg-resources python3-pycryptodome \
 python3-pyelftools python3-setuptools python-is-python3 sharutils swig unar \
-unifont unzip uuid-dev wget zlib1g-dev \
+unifont unifont-bin unzip uuid-dev wget xfonts-unifont zlib1g-dev \
 "

From 1eb4df6748f94a08d44c623a56417199b99b371d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 16 Dec 2023 07:56:26 +0000
Subject: [PATCH 0071/1549] fix several shellcheck warnings

lbmk didn't quote certain arguments in commands, or
used ! -z instead of -n, things like that. simple fixes.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/err.sh         | 12 ++++++------
 include/git.sh         |  2 +-
 script/build/grub      |  2 +-
 script/build/roms      |  8 ++++----
 script/build/serprog   | 10 +++++-----
 script/update/release  | 12 ++++++------
 script/update/trees    | 16 ++++++++--------
 script/vendor/download | 12 ++++++------
 script/vendor/inject   | 11 ++++++-----
 9 files changed, 43 insertions(+), 42 deletions(-)

diff --git a/include/err.sh b/include/err.sh
index 595d6c77..3699d6ce 100755
--- a/include/err.sh
+++ b/include/err.sh
@@ -36,23 +36,23 @@ git_err()
 
 check_project()
 {
-	read projectname < projectname || :
+	read -r projectname < projectname || :
 
-	[ ! -f version ] || read version < version || :
+	[ ! -f version ] || read -r version < version || :
 	version_="${version}"
 	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
 	    version="git-$(git rev-parse HEAD 2>&1)" || version="${version_}"
 
-	[ ! -f versiondate ] || read versiondate < versiondate || :
+	[ ! -f versiondate ] || read -r versiondate < versiondate || :
 	versiondate_="${versiondate}"
 	[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
 	    --pretty='%ct' HEAD)" || versiondate="${versiondate_}"
 
-	[ ! -z ${versiondate} ] || fail "Unknown version date" || \
+	[ -n "${versiondate}" ] || fail "Unknown version date" || \
 	    err "Unknown version date"
-	[ ! -z ${version} ] || fail "Unknown version" || \
+	[ -n "${version}" ] || fail "Unknown version" || \
 	    err "Unknown version"
-	[ ! -z ${projectname} ] || fail "Unknown project" || \
+	[ -n "${projectname}" ] || fail "Unknown project" || \
 	    err "Unknown project"
 
 	xx_ printf "%s\n" "${version}" > version || \
diff --git a/include/git.sh b/include/git.sh
index 811b298a..9a73bd92 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -123,7 +123,7 @@ clone_project()
 	[ "${patchfail}" = "y" ] && err "PATCH FAIL"
 
 	x_ rm -Rf "${loc}"
-	[ "${loc}" = "${loc%/*}" ] || x_ mkdir -p ${loc%/*}
+	[ "${loc}" = "${loc%/*}" ] || x_ mkdir -p "${loc%/*}"
 	mv "${tmp_git_dir}" "${loc}" || \
 	    err "clone_project: !mv ${tmp_git_dir} ${loc}"
 }
diff --git a/script/build/grub b/script/build/grub
index 5fa47c00..dc489838 100755
--- a/script/build/grub
+++ b/script/build/grub
@@ -45,7 +45,7 @@ build_keymap_configs()
 {
 	for keylayoutfile in "${grubcfgsdir}/keymap/"*.gkb; do
 		[ -f "${keylayoutfile}" ] || continue
-		keymap="${keylayoutfile##${grubcfgsdir}/keymap/}"
+		keymap="${keylayoutfile##"${grubcfgsdir}/keymap/"}"
 		keymap="${keymap%.gkb}"
 		printf "keymap %s\n" "${keymap}" > \
 		    "${elfdir}/keymap_${keymap}.cfg" || err "!insert keymap"
diff --git a/script/build/roms b/script/build/roms
index a96ad89b..c1bca851 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -64,7 +64,7 @@ main()
 
 	[ -z "${targets}" ] && err "No ROM images were compiled"
 	printf "\nROM images available in these directories:\n"
-	printf "${targets}^^ ROM images available in these directories.\n\n"
+	printf "%s^^ ROM images available in these directories.\n\n" "${targets}"
 
 	printf "DO NOT flash ROM images from elf/ - please use bin/ instead.\n"
 }
@@ -230,7 +230,7 @@ build_roms()
 
 	_cbrom="elf/coreboot_nopayload_DO_NOT_FLASH/${board}/${initmode}_${displaymode}"
 	[ "${initmode}" = "normal" ] && \
-		_cbrom="${_cbrom%_${displaymode}}"
+		_cbrom="${_cbrom%"_${displaymode}"}"
 	_cbrom="${_cbrom}/coreboot.rom"
 	cbrom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 	x_ cp "${_cbrom}" "${cbrom}"
@@ -349,7 +349,7 @@ mkSeabiosRom() {
 
 	x_ cp "${_cbrom}" "${tmprom}"
 	x_ "${cbfstool}" "${tmprom}" add-payload -f "${_seabioself}" \
-	    -n ${_seabios_cbfs_path} -c lzma
+	    -n "${_seabios_cbfs_path}" -c lzma
 	x_ "${cbfstool}" "${tmprom}" add-int -i 3000 -n etc/ps2-keyboard-spinup
 
 	z="2"; [ "${initmode}" = "vgarom" ] && z="0"
@@ -405,7 +405,7 @@ mkUbootRom() {
 
 	x_ cp "${_cbrom}" "${tmprom}"
 	x_ "${cbfstool}" "${tmprom}" add-payload -f "${_ubootelf}" \
-	    -n ${_uboot_cbfs_path} -c lzma
+	    -n "${_uboot_cbfs_path}" -c lzma
 
 	printf "%s\n" "${tmprom}"
 }
diff --git a/script/build/serprog b/script/build/serprog
index 7f8664a9..33319de6 100755
--- a/script/build/serprog
+++ b/script/build/serprog
@@ -50,24 +50,24 @@ main()
 build_rp2040_rom()
 {
 	board=${1}
-	printf "Building pico-serprog for ${board}\n"
+	printf "Building pico-serprog for %s\n" "${board}"
 	x_ cmake -DPICO_BOARD="${board}" -DPICO_SDK_PATH="${pico_sdk_dir}" \
 	    -B "${pico_src_dir}/build" "${pico_src_dir}"
 	x_ cmake --build "${pico_src_dir}/build"
 	x_ mv ${pico_src_dir}/build/pico_serprog.uf2 \
 	   bin/serprog_rp2040/serprog_${board}.uf2
-	printf "output to bin/serprog_rp2040/serprog_${board}.uf2\n"
+	printf "output to bin/serprog_rp2040/serprog_%s.uf2\n" "${board}"
 }
 
 build_stm32_rom()
 {
 	board=${1}
-	printf "Building stm32-vserprog for ${board}\n"
+	printf "Building stm32-vserprog for %s\n" "${board}"
 	x_ make -C ${stm32_src_dir} libopencm3-just-make BOARD=${board}
 	x_ make -C ${stm32_src_dir} BOARD=${board}
 	x_ mv ${stm32_src_dir}/stm32-vserprog.hex \
 	   bin/serprog_stm32/serprog_${board}.hex
-	printf "output to bin/serprog_stm32/serprog_${board}.hex\n"
+	printf "output to bin/serprog_stm32/serprog_%s.hex\n" "${board}"
 }
 
 print_boards()
@@ -78,7 +78,7 @@ print_boards()
 
 list_boards()
 {
-	basename -a -s .h ${1}/*.h
+	basename -a -s .h "${1}/"*.h
 }
 
 main $@
diff --git a/script/update/release b/script/update/release
index 447d93ce..7dafbe32 100755
--- a/script/update/release
+++ b/script/update/release
@@ -209,12 +209,12 @@ nukerom()
 	touch "${romdir}/vendorhashes" || err "!touch ${romdir}/vendorhashes"
 	(
 	cd "${romdir}" || err "!cd romdir ${romdir}, nukerom"
-	sha512sum *.rom >> vendorhashes || err "!create vendorhashes, nukerom"
+	sha512sum ./*.rom >> vendorhashes || err "!create vendorhashes, nukerom"
 	) || err "can't create vendor hashes"
 
 	for romfile in "${romdir}"/*.rom; do
 		[ -f "${romfile}" ] || continue
-		./vendor inject -r "${romfile}" -b ${target} -n nuke || \
+		./vendor inject -r "${romfile}" -b "${target}" -n nuke || \
 		    err "!vendor inject (nuke) ${romfile}, nukerom"
 	done
 }
@@ -255,13 +255,13 @@ mkrom_tarball()
 	f="release/${version}/roms/${archivename}"
 	mkdir -p "${f%/*}" || err "mkrom_tarball: !mkdir -p ${f%/*}"
 	(
-	cd "${romdir%/bin/${target}}" || err "!cd ${romdir%/bin/${target}}"
+	cd "${romdir%"/bin/${target}"}" || err "!cd ${romdir%"/bin/${target}"}"
 	mktarball "bin/${target}" "${archivename}.tar.xz"
 	) || err "can't create rom tarball"
-	mv "${romdir%/bin/${target}}/${archivename}.tar.xz"* "${f%/*}" || \
-	    err "!mktarball, rom, ${f%/*}/${romdir%/bin/${target}}/${archivename}.tar.xz"
+	mv "${romdir%"/bin/${target}"}/${archivename}.tar.xz"* "${f%/*}" || \
+	    err "!mktarball, rom, ${f%/*}/${romdir%"/bin/${target}"}/${archivename}.tar.xz"
 
-	printf "Created ROM archive: ${f%/*}/${archivename}.tar.xz"
+	printf "Created ROM archive: %s" "${f%/*}/${archivename}.tar.xz"
 }
 
 insert_version_files()
diff --git a/script/update/trees b/script/update/trees
index 1719aab9..0810c625 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -99,7 +99,7 @@ handle_targets()
 		target="${x}"
 		printf "Running 'make %s' for project '%s, target '%s''\n" \
 		    "${mode}" "${project}" "${target}"
-		[ "${project}" != "coreboot" ] || [ ! -z ${mode} ] || \
+		[ "${project}" != "coreboot" ] || [ -n "${mode}" ] || \
 			x_ ./vendor download ${target}
 		x_ handle_defconfig
 	done
@@ -121,14 +121,14 @@ handle_defconfig()
 	for y in "${target_dir}/config"/*; do
 		[ -f "${y}" ] || continue
 		config="${y}"
-		config_name="${config#${target_dir}/config/}"
+		config_name="${config#"${target_dir}/config/"}"
 
 		printf "handle/make/config %s %s: handling config %s\n" \
 		    "${project}" "${target}" "${config_name}"
 
-		[ ! -z ${mode} ] || check_config || continue
+		[ -n "${mode}" ] || check_config || continue
 		handle_makefile
-		[ ! -z ${mode} ] || copy_elf
+		[ -n "${mode}" ] || copy_elf
 	done
 }
 
@@ -235,7 +235,7 @@ handle_makefile()
 {
 	x_ make clean -C "${codedir}"
 	x_ cp "${config}" "${codedir}/.config"
-	[ ! -z ${mode} ] || make -C "${codedir}" silentoldconfig || \
+	[ -n "${mode}" ] || make -C "${codedir}" silentoldconfig || \
 	    make -C "${codedir}" oldconfig || :
 
 	run_make_command || err "handle_makefile ${codedir}: no makefile!"
@@ -256,7 +256,7 @@ run_make_command()
 	[ -f "${codedir}/Makefile" ] || [ -f "${codedir}/makefile" ] || \
 	    [ -f "${codedir}/GNUmakefile" ] || return 1
 	[ "${project}" = "coreboot" ] && [ -z "${mode}" ] && \
-		x_ printf "%s\n" "${version%%-*}" >"${codedir}/.coreboot-version"
+		x_ printf "%s\n" "${version%%-*}" >"$codedir/.coreboot-version"
 
 	x_ make ${mode} -j$(nproc) -C "${codedir}"
 
@@ -266,10 +266,10 @@ run_make_command()
 
 copy_elf()
 {
-	while read f; do
+	while read -r f; do
 		[ ! -f "${codedir}/$f" ] || \
 			x_ cp "${codedir}/${f}" "${dest_dir}/"
-	done < ${listfile}
+	done < "${listfile}"
 
 	x_ make clean -C "${codedir}"
 }
diff --git a/script/vendor/download b/script/vendor/download
index eada2e91..9431c441 100755
--- a/script/vendor/download
+++ b/script/vendor/download
@@ -54,7 +54,7 @@ detect_firmware()
 
 build_dependencies()
 {
-	[ -d ${cbdir} ] || \
+	[ -d "${cbdir}" ] || \
 		x_ ./update trees -f coreboot ${cbdir##*/}
 	for d in uefitool biosutilities bios_extract; do
 		[ -d "src/${d}" ] && continue
@@ -132,7 +132,7 @@ fetch()
 
 vendor_checksum()
 {
-	[ "$(sha512sum ${2} | awk '{print $1}')" != "${1}" ] || return 0 
+	[ "$(sha512sum "${2}" | awk '{print $1}')" != "${1}" ] || return 0 
 	printf "Bad checksum for file: %s\n" "${2}" 1>&2
 	rm -f "${2}" || :
 	return 1
@@ -141,7 +141,7 @@ vendor_checksum()
 mkdirs()
 {
 	if [ -f "${1}" ]; then
-		printf "mkdirs ${1} ${2}: already downloaded\n" 1>&2
+		printf "mkdirs %s %s: already downloaded\n" "${1}" "${2}" 1>&2
 		return 1
 	fi
 	mkdir -p "${1%/*}" || err "mkdirs: !mkdir -p ${1%/*}"
@@ -188,7 +188,7 @@ extract_intel_me()
 		fi
 		cdir="${1}"
 		[ "${cdir#/a}" != "${cdir}" ] && cdir="${cdir#/}"
-		cd "${cdir}"
+		cd "${cdir}" || :
 	done
 	)
 	rm -Rf "${sdir}" || err "extract_intel_me: !rm -Rf ${sdir}"
@@ -227,9 +227,9 @@ extract_kbc1126ec()
 
 extract_e6400vga()
 {
-	[ "${E6400_VGA_offset}" = "" ] && \
+	[ -z "${E6400_VGA_offset}" ] && \
 		err "extract_e6400vga: E6400 VGA offset not defined"
-	[ "${E6400_VGA_romname}" = "" ] && \
+	[ -z "${E6400_VGA_romname}" ] && \
 		err "extract_e6400vga: E6400 VGA ROM name not defined"
 	tail -c +${E6400_VGA_offset} "${_dl}" | \
 	    gunzip >"${appdir}/bios.bin" || :
diff --git a/script/vendor/inject b/script/vendor/inject
index 2e125f4f..e740704a 100755
--- a/script/vendor/inject
+++ b/script/vendor/inject
@@ -28,6 +28,7 @@ main()
 		b) board=${OPTARG} ;;
 		m) modifygbe=true
 		   new_mac=${OPTARG} ;;
+		*) : ;;
 		esac
 	done
 
@@ -48,7 +49,7 @@ check_board()
 			err "check_board: \"${rom}\" is not a valid path"
 		[ -z "${rom+x}" ] && \
 			err "check_board: no rom specified"
-		[ ! -z ${board+x} ] || \
+		[ -n "${board+x}" ] || \
 			board=$(detect_board "${rom}")
 	else
 		release="y"
@@ -72,7 +73,7 @@ check_release()
 detect_board()
 {
 	path="${1}"
-	filename=$(basename ${path})
+	filename=$(basename "${path}")
 	case ${filename} in
 	grub_*)
 		board=$(echo "${filename}" | cut -d '_' -f2-3) ;;
@@ -185,12 +186,12 @@ patch_rom()
 		    "${CONFIG_KBC1126_FW1_OFFSET}" && \
 		inject "ecfw2.bin" "$CONFIG_KBC1126_FW2" "raw" \
 		    "${CONFIG_KBC1126_FW2_OFFSET}"
-	[ ! -z "${CONFIG_VGA_BIOS_FILE}" ] && \
-	    [ ! -z "${CONFIG_VGA_BIOS_ID}" ] && \
+	[ -n "${CONFIG_VGA_BIOS_FILE}" ] && \
+	    [ -n "${CONFIG_VGA_BIOS_ID}" ] && \
 		inject "pci${CONFIG_VGA_BIOS_ID}.rom" \
 		    "${CONFIG_VGA_BIOS_FILE}" "optionrom"
 	[ "${CONFIG_INCLUDE_SMSC_SCH5545_EC_FW}" = "y" ] && \
-	    [ ! -z "${CONFIG_SMSC_SCH5545_EC_FW_FILE}" ] && \
+	    [ -n "${CONFIG_SMSC_SCH5545_EC_FW_FILE}" ] && \
 		inject "sch5545_ecfw.bin" "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
 	[ "${modifygbe}" = "true" ] && ! [ "${release}" = "y" ] && \
 		inject "IFD" "${CONFIG_GBE_BIN_PATH}" "GbE"

From 39a3de574a7ae6d6165a660cd7efd9ac6a31a922 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 16 Dec 2023 07:58:13 +0000
Subject: [PATCH 0072/1549] remove DEBUG handling in lbmk (not needed)

all it did was set -v in the shell, which doesn't yield
very useful results. this is a relic of very old design
in the libreboot build system, that is no longer needed.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build                 | 1 -
 script/build/grub     | 1 -
 script/build/roms     | 1 -
 script/build/serprog  | 1 -
 script/update/release | 1 -
 script/update/trees   | 1 -
 6 files changed, 6 deletions(-)

diff --git a/build b/build
index 736450e6..fec3f3c2 100755
--- a/build
+++ b/build
@@ -5,7 +5,6 @@
 # SPDX-FileCopyrightText: 2015, 2016 Klemens Nanni <contact@autoboot.org>
 # SPDX-FileCopyrightText: 2022, Caleb La Grange <thonkpeasant@protonmail.com>
 
-[ "x${DEBUG+set}" = 'xset' ] && set -v
 set -u -e
 
 export LC_COLLATE=C
diff --git a/script/build/grub b/script/build/grub
index dc489838..3313684d 100755
--- a/script/build/grub
+++ b/script/build/grub
@@ -2,7 +2,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 # SPDX-FileCopyrightText: 2014,2015,2020,2021,2023 Leah Rowe <leah@libreboot.org>
 
-[ "x${DEBUG+set}" = 'xset' ] && set -v
 set -u -e
 
 . "include/err.sh"
diff --git a/script/build/roms b/script/build/roms
index c1bca851..229e295f 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -6,7 +6,6 @@
 # SPDX-FileCopyrightText: 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
 # SPDX-FileCopyrightText: 2023 Riku Viitanen <riku.viitanen@protonmail.com>
 
-[ "x${DEBUG+set}" = 'xset' ] && set -v
 set -u -e
 
 . "include/err.sh"
diff --git a/script/build/serprog b/script/build/serprog
index 33319de6..74097dc5 100755
--- a/script/build/serprog
+++ b/script/build/serprog
@@ -2,7 +2,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 # SPDX-FileCopyrightText: 2023 Riku Viitanen <riku.viitanen@protonmail.com>
 
-[ "x${DEBUG+set}" = 'xset' ] && set -v
 set -u -e
 
 . "include/err.sh"
diff --git a/script/update/release b/script/update/release
index 7dafbe32..3abdae3e 100755
--- a/script/update/release
+++ b/script/update/release
@@ -2,7 +2,6 @@
 # SPDX-License-Identifier: MIT
 # SPDX-FileCopyrightText: 2020-2023 Leah Rowe <leah@libreboot.org>
 
-[ "x${DEBUG+set}" = 'xset' ] && set -v
 set -u -e
 
 . "include/err.sh"
diff --git a/script/update/trees b/script/update/trees
index 0810c625..67455a3b 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -4,7 +4,6 @@
 # SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
 # SPDX-FileCopyrightText: 2023 Leah Rowe <leah@libreboot.org>
 
-[ "x${DEBUG+set}" = 'xset' ] && set -v
 set -u -e
 
 . "include/err.sh"

From e6629606ec43e559fbc9896badcd9f05e51b9021 Mon Sep 17 00:00:00 2001
From: risapav <risapav@gmail.com>
Date: Sun, 17 Dec 2023 16:14:23 +0100
Subject: [PATCH 0073/1549] added x220edp_8mb

---
 .../x220edp_8mb/config/libgfxinit_corebootfb  | 661 ++++++++++++++++++
 .../x220edp_8mb/config/libgfxinit_txtmode     | 658 +++++++++++++++++
 config/coreboot/x220edp_8mb/target.cfg        |   8 +
 3 files changed, 1327 insertions(+)
 create mode 100644 config/coreboot/x220edp_8mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/x220edp_8mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/x220edp_8mb/target.cfg

diff --git a/config/coreboot/x220edp_8mb/config/libgfxinit_corebootfb b/config/coreboot/x220edp_8mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..5a23e460
--- /dev/null
+++ b/config/coreboot/x220edp_8mb/config/libgfxinit_corebootfb
@@ -0,0 +1,661 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_FAMILY="ThinkPad X220"
+CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X220"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/x220"
+CONFIG_VGA_BIOS_ID="8086,0126"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0x7E0000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="x220"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/x220_edp/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_VBOOT_SLOTS_RW_A=y
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_VBT_DATA_SIZE_KB=8
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X220"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+CONFIG_BOARD_LENOVO_X220_EDP=y
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
+CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+CONFIG_SOUTH_BRIDGE_OPTIONS=y
+CONFIG_HIDE_MEI_ON_ERROR=y
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+# CONFIG_H8_BEEP_ON_DEATH is not set
+# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_NO_UART_ON_SUPERIO=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_DRIVERS_RICOH_RCE822=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/x220edp_8mb/config/libgfxinit_txtmode b/config/coreboot/x220edp_8mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..c5a02604
--- /dev/null
+++ b/config/coreboot/x220edp_8mb/config/libgfxinit_txtmode
@@ -0,0 +1,658 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_FAMILY="ThinkPad X220"
+CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X220"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/x220"
+CONFIG_VGA_BIOS_ID="8086,0126"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0x7E0000
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="x220"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/x220_edp/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_VBOOT_SLOTS_RW_A=y
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_VBT_DATA_SIZE_KB=8
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X220"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+CONFIG_BOARD_LENOVO_X220=y
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
+CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+CONFIG_SOUTH_BRIDGE_OPTIONS=y
+CONFIG_HIDE_MEI_ON_ERROR=y
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+# CONFIG_H8_BEEP_ON_DEATH is not set
+# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_NO_UART_ON_SUPERIO=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+CONFIG_DRIVERS_RICOH_RCE822=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/x220edp_8mb/target.cfg b/config/coreboot/x220edp_8mb/target.cfg
new file mode 100644
index 00000000..f5dfa8d8
--- /dev/null
+++ b/config/coreboot/x220edp_8mb/target.cfg
@@ -0,0 +1,8 @@
+tree="default"
+romtype="normal"
+arch="x86_64"
+payload_grub="y"
+payload_grub_withseabios="y"
+payload_seabios="y"
+payload_memtest="y"
+grub_scan_disk="ahci"

From 1c337ac740304412fc65354dd6e4bd451077cf27 Mon Sep 17 00:00:00 2001
From: risapav <risapav@gmail.com>
Date: Sun, 17 Dec 2023 16:28:13 +0100
Subject: [PATCH 0074/1549] added x220edp_8mb

---
 config/vendor/sources | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/vendor/sources b/config/vendor/sources
index d8e10be3..932d3e5e 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -15,7 +15,7 @@
 	DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
 }
 
-{x220 x220t t420 t520 t420s}{
+{x220 x220t x220edp t420 t520 t420s}{
 	DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
 	DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
 	DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe

From 15226f9eb31c74b4abacd36c2ba6ad1e194af679 Mon Sep 17 00:00:00 2001
From: risapav <risapav@gmail.com>
Date: Sun, 17 Dec 2023 16:59:41 +0100
Subject: [PATCH 0075/1549] added x220edp_8mb

---
 ...ation-introduced-similar-to-x230_edp.patch | 164 ++++++++++++++++++
 1 file changed, 164 insertions(+)
 create mode 100644 config/coreboot/default/patches/0034-x220_edp-modification-introduced-similar-to-x230_edp.patch

diff --git a/config/coreboot/default/patches/0034-x220_edp-modification-introduced-similar-to-x230_edp.patch b/config/coreboot/default/patches/0034-x220_edp-modification-introduced-similar-to-x230_edp.patch
new file mode 100644
index 00000000..63e5232e
--- /dev/null
+++ b/config/coreboot/default/patches/0034-x220_edp-modification-introduced-similar-to-x230_edp.patch
@@ -0,0 +1,164 @@
+From 38b9e571e5b2a7116b06fb9d99bccd8b03450f9a Mon Sep 17 00:00:00 2001
+From: risapav <risapav@gmail.com>
+Date: Sun, 17 Dec 2023 16:54:07 +0100
+Subject: [PATCH] x220_edp modification introduced, similar to x230_edp
+
+---
+ src/mainboard/lenovo/x220/Kconfig             |  13 ++++++-----
+ src/mainboard/lenovo/x220/Kconfig.name        |   3 +++
+ src/mainboard/lenovo/x220/Makefile.inc        |   6 +++++
+ .../lenovo/x220/variants/x220_edp/data.vbt    | Bin 0 -> 4281 bytes
+ .../x220/variants/x220_edp/gma-mainboard.ads  |  21 ++++++++++++++++++
+ 5 files changed, 38 insertions(+), 5 deletions(-)
+ create mode 100644 src/mainboard/lenovo/x220/variants/x220_edp/data.vbt
+ create mode 100644 src/mainboard/lenovo/x220/variants/x220_edp/gma-mainboard.ads
+
+diff --git a/src/mainboard/lenovo/x220/Kconfig b/src/mainboard/lenovo/x220/Kconfig
+index eeb55b4393..bc73a47df9 100644
+--- a/src/mainboard/lenovo/x220/Kconfig
++++ b/src/mainboard/lenovo/x220/Kconfig
+@@ -1,4 +1,4 @@
+-if BOARD_LENOVO_X220 || BOARD_LENOVO_X220I || BOARD_LENOVO_X1
++if BOARD_LENOVO_X220 || BOARD_LENOVO_X220I || BOARD_LENOVO_X1 || BOARD_LENOVO_X220_EDP
+ 
+ config BOARD_SPECIFIC_OPTIONS
+ 	def_bool y
+@@ -6,7 +6,7 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select DRIVERS_RICOH_RCE822
+ 	select EC_LENOVO_H8
+ 	select EC_LENOVO_PMH7
+-	select GFX_GMA_PANEL_1_ON_LVDS
++	select GFX_GMA_PANEL_1_ON_LVDS if BOARD_LENOVO_X220 || BOARD_LENOVO_X220I || BOARD_LENOVO_X1 
+ 	select H8_HAS_BAT_THRESHOLDS_IMPL
+ 	select HAVE_ACPI_RESUME
+ 	select HAVE_ACPI_TABLES
+@@ -41,19 +41,22 @@ config MAINBOARD_DIR
+ 	default "lenovo/x220"
+ 
+ config VARIANT_DIR
+-	default "x220" if BOARD_LENOVO_X220 || BOARD_LENOVO_X220I
++	default "x220" if BOARD_LENOVO_X220 || BOARD_LENOVO_X220I || BOARD_LENOVO_X220_EDP
+ 	default "x1" if BOARD_LENOVO_X1
+ 
+ config FMDFILE
+ 	default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/vboot-rwa.fmd" if VBOOT
+ 
+ config MAINBOARD_PART_NUMBER
+-	default "ThinkPad X220" if BOARD_LENOVO_X220
++	default "ThinkPad X220" if BOARD_LENOVO_X220 || BOARD_LENOVO_X220_EDP
+ 	default "ThinkPad X220i" if BOARD_LENOVO_X220I
+ 	default "ThinkPad X1" if BOARD_LENOVO_X1
+ 
+ config OVERRIDE_DEVICETREE
+ 	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
++	
++config INTEL_GMA_VBT_FILE
++       default "src/mainboard/\$(MAINBOARDDIR)/variants/x220_edp/data.vbt" if BOARD_LENOVO_X220_EDP	
+ 
+ config USBDEBUG_HCD_INDEX
+ 	int
+@@ -75,4 +78,4 @@ config PS2K_EISAID
+ config PS2M_EISAID
+ 	default "LEN0020"
+ 
+-endif # BOARD_LENOVO_X220 || BOARD_LENOVO_X220I || BOARD_LENOVO_X1
++endif # BOARD_LENOVO_X220 || BOARD_LENOVO_X220I || BOARD_LENOVO_X1 || BOARD_LENOVO_X220_EDP
+diff --git a/src/mainboard/lenovo/x220/Kconfig.name b/src/mainboard/lenovo/x220/Kconfig.name
+index 988ac4fb55..cd501954e0 100644
+--- a/src/mainboard/lenovo/x220/Kconfig.name
++++ b/src/mainboard/lenovo/x220/Kconfig.name
+@@ -6,3 +6,6 @@ config BOARD_LENOVO_X220I
+ 
+ config BOARD_LENOVO_X1
+ 	bool "ThinkPad X1"
++	
++config BOARD_LENOVO_X220_EDP
++	bool "ThinkPad X220 eDP Mod (2K/FHD)"
+diff --git a/src/mainboard/lenovo/x220/Makefile.inc b/src/mainboard/lenovo/x220/Makefile.inc
+index b104bb52a9..052bf17a22 100644
+--- a/src/mainboard/lenovo/x220/Makefile.inc
++++ b/src/mainboard/lenovo/x220/Makefile.inc
+@@ -4,6 +4,12 @@ bootblock-y += variants/$(VARIANT_DIR)/gpio.c
+ romstage-y += variants/$(VARIANT_DIR)/gpio.c
+ romstage-y += variants/$(VARIANT_DIR)/romstage.c
+ 
++
++ifeq ($(CONFIG_BOARD_LENOVO_X220_EDP),y)
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/x220_edp/gma-mainboard.ads
++else
+ ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
++endif
++
+ bootblock-y += early_init.c
+ romstage-y += early_init.c
+diff --git a/src/mainboard/lenovo/x220/variants/x220_edp/data.vbt b/src/mainboard/lenovo/x220/variants/x220_edp/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..13384d45571ff76e592335143d01315e37893186
+GIT binary patch
+literal 4281
+zcmdT`Z)_aZ5&ym0y}P}=-MjTVC6^<yCLz$XvE%h&S*h!)@6LAcg^PXugKH2XcDRE^
+zHNiLuN+i^5TbBk=p_5vr0Ri$CB!v1Q6%yhL5TS}%ZG|E}(5mW(6!8It5AdN?tBP`+
+zx3_i!7V#AnmCow7GdpkI?0YkBW_RywafYVHi@l}UV$Y$8VyQezRd{&CInDRYR4h$Q
+zA08>p6b={56T^4V^SA+LolmX+RUx+79#iSqiP~ars*|P{j#W<|Sw32Qpw?S@B$TK!
+zT%y8#_th3_%L^xJRhpi?y+F#XZ5B@+U98gh$p??rmIq1sVr%N_-*;O-QJ>e_m+#Gc
+zeSJjvzQO*1!F<1Mj*JdZ9IBMcg_+XCI898^NNKt-Jw1A;SiXxYQxjvQVrgb{#5RMi
+z3_rAVdim%B-#tOO;ZDl)3wi>F!IEkCq2;B0R9IZ3DP?n<rfSD)%a7Em`)pG=xClcR
+zfQTY3AQJz|BVh>3(8mm!Gbk$bf{?ofjp)+WX;f0xKuMreM_FPop&M`zu|-4&b{lx}
+z6dXr%nIN^a1Q1g^?g`SApyQo+We^Ju;y^Soa0Kxp0ExE)gG^{(s5wk=5)@Iwe?zpD
+z@%1v$crW@+c=`T;{ewfYIC5a@V7W3iGdp+pJ^l}V_@k99K7NB27i?KEp$JF`50mi@
+zjG1XXrseRG7Qw69ek|x~_*Klqd$9}}jBGpu*K}~RX~1KAld;P%uwb}2&iFCo7mQyT
+zCSGP-Wc-%#2gY9*A29yLh$l?6F>Yks%;;r&gE7oF#P|+lf$=@YNyZt*<BXp%o@K;N
+z;^Rid2d9zA7a?zJayUAk?1cYJsDCEZCq4>N3Nz%%kOxj$xHTH_I6i5-#j$7@-%=}(
+z?1954MnX?xAuk79(<<Tf409Fpx$wEsNX+wNp0De7H-87y*XOlHqw#v9f#_UhUAnlg
+zi_2(JC*w<@<i}S-iI)}-&;1HW$=_hN&+7=v86dSJ5nbA)_y+kbU2PDFE??VVW9GW>
+zSr6;_4gTc~tacpa=As!xD;@CT7xX)U4}W57_`9~2N<i$1-Hq?ZdXRnseAKTSC4vUn
+zvU_KR`>pCP65!^@JyGbYMG6B#@{r1i&qF#431THdvdmK?gb!}@x&d86kH8RtSun)L
+zMg&qo8p@sxlqPr)H*t1i5Xc8fNK*dW_}wA77I--u)J{nAs;))bo<l6#G>8v<p5gy;
+z<c2$V&sxyMI7lIRD=DCSpmMmfaICgCzVKkJ#fR-<sP2F);1(})cA)7k<8|TuBs}RY
+zwKp{#FZ7<eJej>k&YfS^jD1^rM=s>0ytuB(<S=kXYsT9eI1^R*2UrsIpx#)DflmYL
+zcI2=F|Kw{2>VlIOTx;M223I$qhjl3%0pyLp$ECQ*_^UYE{?(M!zFMP3W9I<gN%(cT
+zyvs4>_cUj9w4&M7&s8K0k<cwUM!E2PTu7mct3rr`5sB*7)nZ4R`hWT~<uZuic%Tb%
+z5{?q{&YwfGl9W%nBS~{SNhgx-V@b1~q?eQKTGD(wN&iT?re$ukXwY)YmN{$Dqn7)m
+zWuCX_HOswZnSZhfw(HvFPMeChJ7b&o+O%T3=WKJ;rZ;W(kGA=)O-9Pirp&!5I+$|r
+zNtySj=%*?7xs>@rirz}Oms94I6gg>kPulEG+g%^&e&n+7+xV#SfijjY{5o+C7V}H-
+zZs9PGrN7SK-OZ8YGZ>yr(&i#tdss~q`sQ|0&fnIIOUJ;O2*-=b;v=kW?O}6KsoH4P
+z0smI&%EQn#cd@w$RZTVP=TtP?l7~|?nRTSIQO2qkgO+Z!=3#T$D-XeMvn68}T3Ey8
+zHleye(7mkLXe*JtfA{Q*lj!gc)Wck4IFj|C#q&~HiNmA&>Z|kF4(U<Y;5eIloj)C%
+zP4#WvIv2Sie|71?P3)md%>vj%v~DWNT8*x>a2}rST)i~8vd61DwO!2$JZMNNi6hyH
+z2d_)6&979w%w$-vyatVrqw??t&t%}iZhDAP3%j_I#cGANdzLq>W;J(F=Xwkxxj%^H
+zwQDmn=w}|@-y`RG{*wz0>A(ZGtk~AM=#-fE(LV1uZE98+Nk>UmiyyuJ8?##<Mr{1g
+p(B@uj-Va_SU#<T#GXLCvin_ms#}9BYOE7UKDyX7coWuJX{tbC=%boxL
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/x220/variants/x220_edp/gma-mainboard.ads b/src/mainboard/lenovo/x220/variants/x220_edp/gma-mainboard.ads
+new file mode 100644
+index 0000000000..f7cf0bc264
+--- /dev/null
++++ b/src/mainboard/lenovo/x220/variants/x220_edp/gma-mainboard.ads
+@@ -0,0 +1,21 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (DP1,
++      DP2,
++      DP3,
++      HDMI1,
++      HDMI2,
++      HDMI3,
++      Analog,
++      others => Disabled);
++
++end GMA.Mainboard;
+-- 
+2.40.1
+

From ababbc09f0f22080aae162a5ee035c18652f5019 Mon Sep 17 00:00:00 2001
From: semigel <semigel@noreply.codeberg.org>
Date: Mon, 18 Dec 2023 00:56:48 +0000
Subject: [PATCH 0076/1549] Update config/grub/config/grub.cfg

grub.cfg: add BTRFS subvol support
---
 config/grub/config/grub.cfg | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 8a124062..9439778a 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -46,7 +46,9 @@ fi
 
 function try_user_config {
 	set root="${1}"
-	for dir in boot grub grub2 boot/grub boot/grub2; do
+
+	# The @/... entries are for cases where the BTRFS filesystem is being used
+	for dir in boot grub grub2 boot/grub boot/grub2 @/boot @/grub @/grub2 @/boot/grub @/boot/grub2; do
 		for name in '' osboot_ autoboot_ libreboot_ coreboot_; do
 			if [ -f /"${dir}"/"${name}"grub.cfg ]; then
 				unset superusers

From f481908135470d55124013bb8770148544979712 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sun, 12 Nov 2023 20:14:08 -0700
Subject: [PATCH 0077/1549] README.md: Add references to Open Security Training

The old Open Security Training site had a course called Advanced x86:
BIOS and SMM Internals, which had a set of slides outlining the method
to supress SMIs by changing the GBL_SMI_EN bit. Add a reference to it as
this is where I originally learned of this method.
---
 util/dell-flash-unlock/README.md | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/util/dell-flash-unlock/README.md b/util/dell-flash-unlock/README.md
index ba45ddcc..7d9b4b85 100644
--- a/util/dell-flash-unlock/README.md
+++ b/util/dell-flash-unlock/README.md
@@ -100,3 +100,7 @@ There are other possible protection mechanisms that the firmware can utilize,
 such as Protected Range Register settings, which apply access permissions to
 address ranges of the flash, similar to the IFD. However, the E6400 vendor
 firmware does not utilize these, so they will not be discussed.
+
+## References
+- Open Security Training: Advanced x86: BIOS and SMM Internals - SMI Suppression
+  - https://opensecuritytraining.info/IntroBIOS_files/Day1_XX_Advanced%20x86%20-%20BIOS%20and%20SMM%20Internals%20-%20SMI%20Suppression.pdf

From ca28255db8f18dbcd2db077fb18a6075792ad41c Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sun, 17 Dec 2023 18:02:29 -0700
Subject: [PATCH 0078/1549] README.md: Add instructions for relaxing memory
 permissions

As this utility requires access to /dev/mem, the default protections of
Linux and OpenBSD must be relaxed to allow this. Make a note of this in
the instructions.
---
 util/dell-flash-unlock/README.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/util/dell-flash-unlock/README.md b/util/dell-flash-unlock/README.md
index 7d9b4b85..fd000efc 100644
--- a/util/dell-flash-unlock/README.md
+++ b/util/dell-flash-unlock/README.md
@@ -8,6 +8,8 @@ E6400, which mainly seem to be the Latitude and Precision lines starting from
 around 2008 (E6400 era).
 
 ## TL;DR
+On Linux, ensure you are booting with the `iomem=relaxed` kernel parameter.
+On OpenBSD, ensure you are booting with securelevel set to -1.
 Run `make` to compile the utility, and then run `sudo ./dell_flash_unlock` and
 follow the directions it outputs.
 

From ab59f9128c68508a5c92f6495a2cf1786dbe69ba Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sun, 17 Dec 2023 18:30:53 -0700
Subject: [PATCH 0079/1549] README.md: Add E6500, E6420, and E6530 as supported

---
 util/dell-flash-unlock/README.md | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/util/dell-flash-unlock/README.md b/util/dell-flash-unlock/README.md
index fd000efc..0ade92a6 100644
--- a/util/dell-flash-unlock/README.md
+++ b/util/dell-flash-unlock/README.md
@@ -14,10 +14,10 @@ Run `make` to compile the utility, and then run `sudo ./dell_flash_unlock` and
 follow the directions it outputs.
 
 ## Confirmed supported devices
-- Latitude E6400
-- Latitude E6410
-- Latitude E4310
-- Latitude E6430
+- Latitude E6400, E6500
+- Latitude E6410, E4310
+- Latitude E6420
+- Latitude E6430, E6530
 - Precision M6800
 
 It is likely that any other Latitude/Precision laptops from the same era as

From d207e9bc4594421e2ff405cc0977bf4d876acfdc Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sun, 17 Dec 2023 18:39:55 -0700
Subject: [PATCH 0080/1549] README.md: Add possibly not working systems

These systems have a report that the unlock utility does not work.
Until there are multiple reports of failed unlocks and a technical
determination of why it doesn't work, they will not be listed as
explicitly unsupported.
---
 util/dell-flash-unlock/README.md | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/util/dell-flash-unlock/README.md b/util/dell-flash-unlock/README.md
index 0ade92a6..cbe33dad 100644
--- a/util/dell-flash-unlock/README.md
+++ b/util/dell-flash-unlock/README.md
@@ -24,6 +24,15 @@ It is likely that any other Latitude/Precision laptops from the same era as
 devices specifically mentioned in the above list will work as Dell seems to use
 the same ECs in one generation.
 
+## Tested
+These systems have been tested, but were reported as not working with
+dell-flash-unlock. This could be due to user error, a bug in this utility, or
+the feature not being implemented in Dell's firmware. If you have such a system,
+please test the utility and report whether or not it actually works for you.
+
+- Latitude E6220
+- Latitude E6330
+
 ## Detailed device specific behavior
 - On GM45 era laptops, the expected behavior is that you will run the utility
   for the first time, which will tell the EC to set the descriptor override on

From 20389655e42e62ebf6d96dd106c91fbe74282557 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 18 Dec 2023 02:55:25 +0000
Subject: [PATCH 0081/1549] grub.cfg: try luks2/crypto-lvm before non-crypto

when the user sets up an encrypted machine, grub.cfg
defaults to non-encrypted setups if found, first

this patch reverses the order, deferring to
non-encrypted installations only when encrypted ones
are unavailable

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 32 +++++++++++---------------------
 1 file changed, 11 insertions(+), 21 deletions(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 9439778a..e10cebd7 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -92,28 +92,10 @@ function search_isolinux {
 }
 menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o' {
 
-	if [ "${grub_scan_disk}" != "ata" ]; then
-		search_grub ahci
-	fi
-	if [ "${grub_scan_disk}" != "ahci" ]; then
-		search_grub ata
-	fi
-
-	# grub device enumeration is very slow, so checks are hardcoded
-
-	# TODO: add more strings, based on what distros set up when
-	# the user select auto-partitioning on those installers
 	lvmvol="lvm/grubcrypt-bootvol lvm/grubcrypt-rootvol"
 
 	raidvol="md/0 md/1 md/2 md/3 md/4 md/5 md/6 md/7 md/8 md/9"
 
-	# in practise, doing multiple redundant checks is perfectly fast and
-	# TODO: optimize grub itself, and use */? here for everything
-
-	for vol in ${lvmvol} ${raidvol} ; do
-		try_user_config "${vol}"
-	done
-
 	unset ahcidev
 	unset atadev
 	for i in 11 10 9 8 7 6 5 4 3 2 1 0; do
@@ -135,12 +117,20 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 	set pager=1
 	echo
 
-	# after cryptomount, lvm volumes might be available
-	for vol in ${lvmvol}; do
+	# prefer crypto first (lvm before raid, because lvm
+	# volumes might exist inside luks/luks2)
+	search_grub crypto
+	for vol in ${lvmvol} ${raidvol}; do
 		try_user_config "${vol}"
 	done
 
-	search_grub crypto
+	# non-encrypted next, if crypto wasn't available
+	if [ "${grub_scan_disk}" != "ata" ]; then
+		search_grub ahci
+	fi
+	if [ "${grub_scan_disk}" != "ahci" ]; then
+		search_grub ata
+	fi
 
 	if [ "${grub_scan_disk}" != "ata" ]; then
 		# Last resort, if all else fails

From 49eed9ac46849a2d312d3603901d28ae24deb320 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 18 Dec 2023 04:17:05 +0000
Subject: [PATCH 0082/1549] Revert "grub.cfg: try luks2/crypto-lvm before
 non-crypto"

This reverts commit 20389655e42e62ebf6d96dd106c91fbe74282557.

If the user actually has encryption, but has /boot unencrypted,
this will considerably slow down the boot, so the patch has
been reverted.

The patch was originally meant to favour encrypted /boot
setups, but the old behaviour also still works there.
---
 config/grub/config/grub.cfg | 32 +++++++++++++++++++++-----------
 1 file changed, 21 insertions(+), 11 deletions(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index e10cebd7..9439778a 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -92,10 +92,28 @@ function search_isolinux {
 }
 menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o' {
 
+	if [ "${grub_scan_disk}" != "ata" ]; then
+		search_grub ahci
+	fi
+	if [ "${grub_scan_disk}" != "ahci" ]; then
+		search_grub ata
+	fi
+
+	# grub device enumeration is very slow, so checks are hardcoded
+
+	# TODO: add more strings, based on what distros set up when
+	# the user select auto-partitioning on those installers
 	lvmvol="lvm/grubcrypt-bootvol lvm/grubcrypt-rootvol"
 
 	raidvol="md/0 md/1 md/2 md/3 md/4 md/5 md/6 md/7 md/8 md/9"
 
+	# in practise, doing multiple redundant checks is perfectly fast and
+	# TODO: optimize grub itself, and use */? here for everything
+
+	for vol in ${lvmvol} ${raidvol} ; do
+		try_user_config "${vol}"
+	done
+
 	unset ahcidev
 	unset atadev
 	for i in 11 10 9 8 7 6 5 4 3 2 1 0; do
@@ -117,20 +135,12 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 	set pager=1
 	echo
 
-	# prefer crypto first (lvm before raid, because lvm
-	# volumes might exist inside luks/luks2)
-	search_grub crypto
-	for vol in ${lvmvol} ${raidvol}; do
+	# after cryptomount, lvm volumes might be available
+	for vol in ${lvmvol}; do
 		try_user_config "${vol}"
 	done
 
-	# non-encrypted next, if crypto wasn't available
-	if [ "${grub_scan_disk}" != "ata" ]; then
-		search_grub ahci
-	fi
-	if [ "${grub_scan_disk}" != "ahci" ]; then
-		search_grub ata
-	fi
+	search_grub crypto
 
 	if [ "${grub_scan_disk}" != "ata" ]; then
 		# Last resort, if all else fails

From 2d6e5ca4c41021686601f7701f77c95bce0f8ced Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 18 Dec 2023 05:11:06 +0000
Subject: [PATCH 0083/1549] grub.cfg: scan lvm volumes last

lvm/* is slow to resolve in grub, on some machines,
because grub enumeration is very slow in general.

however, many people will install distros with any
number of lvm configurations, so we should try to
support them.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 9439778a..f6b5a193 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -142,6 +142,10 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 
 	search_grub crypto
 
+	for vol in lvm/* ; do
+		try_user_config "${vol}"
+	done
+
 	if [ "${grub_scan_disk}" != "ata" ]; then
 		# Last resort, if all else fails
 		set root=ahci0,1

From b817001e29605303b6ab95d05b6594a508af8850 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 18 Dec 2023 06:45:56 +0000
Subject: [PATCH 0084/1549] grub.cfg: don't boot linux without a grub.cfg

the fallback code in the main menuentry is
potentially unsafe, depending on user config.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 26 --------------------------
 1 file changed, 26 deletions(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index f6b5a193..69ed35b2 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -146,32 +146,6 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 		try_user_config "${vol}"
 	done
 
-	if [ "${grub_scan_disk}" != "ata" ]; then
-		# Last resort, if all else fails
-		set root=ahci0,1
-		for p in / /boot/; do
-			if [ -f "${p}vmlinuz" ]; then
-				linux ${p}vmlinuz root=/dev/sda1 rw
-				if [ -f "${p}initrd.img" ]; then
-					initrd ${p}initrd.img
-				fi
-			fi
-		done
-	fi
-
-	if [ "${grub_scan_disk}" != "ahci" ]; then
-		# Last resort (for setups that use IDE instead of SATA)
-		set root=ata0,1
-		for p in / /boot/; do
-			if [ -f "${p}vmlinuz" ]; then
-				linux ${p}vmlinuz root=/dev/sda1 rw
-				if [ -f "${p}initrd.img" ]; then
-					initrd ${p}initrd.img
-				fi
-			fi
-		done
-	fi
-
 	true # Prevent pager requiring to accept each line instead of whole screen
 }
 

From eaa1341b9e9e124eab299c25bb33c805771182ad Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 18 Dec 2023 07:46:14 +0000
Subject: [PATCH 0085/1549] grub.cfg syslinux: support ESP and extlinux.conf

the so-called EFI System Partition (ESP) is used
on many UEFI-based setups. some users may be
migrating to libreboot, so let's support it.

on BIOS setups, it would be e.g.
/boot/syslinux/syslinux.conf

on UEFI setups, it would be e.g.

/boot/EFI/syslinux/syslinux.conf

additionally, support scanning for extlinux.conf

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 69ed35b2..36b2bc92 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -71,16 +71,18 @@ function search_grub {
 
 function try_isolinux_config {
 	set root="${1}"
-	for dir in '' /boot; do
+	for dir in '' /boot /EFI; do
 		if [ -f "${dir}"/isolinux/isolinux.cfg ]; then
 			syslinux_configfile -i "${dir}"/isolinux/isolinux.cfg
 		elif [ -f "${dir}"/syslinux/syslinux.cfg ]; then
 			syslinux_configfile -s "${dir}"/syslinux/syslinux.cfg
+		elif [ -f "${dir}"/syslinux/extlinux.conf ]; then
+			syslinux_configfile -s "${dir}"/syslinux/extlinux.conf
 		fi
 	done
 }
 function search_isolinux {
-	echo "\nAttempting to parse isolinux/syslinux config from '${1}' devices"
+	echo "\nAttempting to parse iso/sys/extlinux config from '${1}' devices"
 	for i in 0 1 2 3 4 5 6 7 8 9 10 11; do
 		for part in 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20; do
 			try_isolinux_config "(${1}${i},${part})"

From c4544e04bb533aed2fbbea7eed5e83adac4df434 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 18 Dec 2023 07:58:31 +0000
Subject: [PATCH 0086/1549] grub.cfg: handle extlinux in the default menuentry

isolinux/syslinux/extlinux config files should all work,
using the syslinux parser function in grub

the current behaviour is to only search for grub.cfg,
so extlinux users can't use the default libreboot setup.
with this change, their systems should hopefully work.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 20 ++++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 36b2bc92..60de9ab6 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -92,13 +92,21 @@ function search_isolinux {
 	done
 	echo # Insert newline
 }
+function try_bootcfg {
+	try_user_config "${1}"
+	try_isolinux_config "${1}"
+}
+function search_bootcfg {
+	search_grub "${1}"
+	search_isolinux "${1}"
+}
 menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o' {
 
 	if [ "${grub_scan_disk}" != "ata" ]; then
-		search_grub ahci
+		search_bootcfg ahci
 	fi
 	if [ "${grub_scan_disk}" != "ahci" ]; then
-		search_grub ata
+		search_bootcfg ata
 	fi
 
 	# grub device enumeration is very slow, so checks are hardcoded
@@ -113,7 +121,7 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 	# TODO: optimize grub itself, and use */? here for everything
 
 	for vol in ${lvmvol} ${raidvol} ; do
-		try_user_config "${vol}"
+		try_bootcfg "${vol}"
 	done
 
 	unset ahcidev
@@ -139,13 +147,13 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 
 	# after cryptomount, lvm volumes might be available
 	for vol in ${lvmvol}; do
-		try_user_config "${vol}"
+		try_bootcfg "${vol}"
 	done
 
-	search_grub crypto
+	search_bootcfg crypto
 
 	for vol in lvm/* ; do
-		try_user_config "${vol}"
+		try_bootcfg "${vol}"
 	done
 
 	true # Prevent pager requiring to accept each line instead of whole screen

From 6db94c1a11b7d10b0ba6a654014334859f9d4158 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 18 Dec 2023 08:05:37 +0000
Subject: [PATCH 0087/1549] grub.cfg: merge isolinux/grub usb menuentries

many modern distros use grub in their installer images,
so scan for grub.cfg first.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 60de9ab6..8f97580d 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -159,11 +159,8 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 	true # Prevent pager requiring to accept each line instead of whole screen
 }
 
-menuentry 'Find and load GRUB config from USB drive  [s]' --hotkey='s' {
-	search_grub usb
-}
-menuentry 'Find and load ISOLINUX/EXTLINUX from USB drive  [u]' --hotkey='u' {
-	search_isolinux usb
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on USB  [s]' --hotkey='s' {
+	search_bootcfg usb
 }
 menuentry 'Find and load ISOLINUX/EXTLINUX menu via AHCI  [a]' --hotkey='a' {
 	search_isolinux ahci

From f1d6c143670132cbbf05d2501eca1a8ee5f00b46 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 18 Dec 2023 08:14:06 +0000
Subject: [PATCH 0088/1549] grub.cfg: support grub and extlinux on ata/ahci

there are special menuentries just for loading
configs, without handling luks, lvm and whatnot.
it's intended for users of cd/dvd drives. well,
now we support both extlinux and grub, with this patch.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 8f97580d..cb38d192 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -162,11 +162,11 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on USB  [s]' --hotkey='s' {
 	search_bootcfg usb
 }
-menuentry 'Find and load ISOLINUX/EXTLINUX menu via AHCI  [a]' --hotkey='a' {
-	search_isolinux ahci
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on AHCI  [a]' --hotkey='a' {
+	search_bootcfg ahci
 }
-menuentry 'Find and load ISOLINUX/EXTLINUX menu via ATA/IDE  [d]' --hotkey='d' {
-	search_isolinux ata
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on ATA/IDE  [d]' --hotkey='d' {
+	search_bootcfg ahci
 }
 if [ -f (cbfsdisk)/grubtest.cfg ]; then
 menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey='t' {

From d74c6c711473adecea1156dc6556b8d8e53fcc78 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 18 Dec 2023 08:16:21 +0000
Subject: [PATCH 0089/1549] grub.cfg: scan extlinux/extlinux.conf

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index cb38d192..b0c72afb 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -78,6 +78,8 @@ function try_isolinux_config {
 			syslinux_configfile -s "${dir}"/syslinux/syslinux.cfg
 		elif [ -f "${dir}"/syslinux/extlinux.conf ]; then
 			syslinux_configfile -s "${dir}"/syslinux/extlinux.conf
+		elif [ -f "${dir}"/extlinux/extlinux.conf ]; then
+			syslinux_configfile -s "${dir}"/syslinux/extlinux.conf
 		fi
 	done
 }

From 430918ee78ab9dc5c7d87327d04def1f303e08bc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 18 Dec 2023 08:31:38 +0000
Subject: [PATCH 0090/1549] grub.cfg: handle btrfs subvols for extlinux.conf

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index b0c72afb..fded583f 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -71,7 +71,7 @@ function search_grub {
 
 function try_isolinux_config {
 	set root="${1}"
-	for dir in '' /boot /EFI; do
+	for dir in '' /boot /EFI /@ /@/boot /@/EFI; do
 		if [ -f "${dir}"/isolinux/isolinux.cfg ]; then
 			syslinux_configfile -i "${dir}"/isolinux/isolinux.cfg
 		elif [ -f "${dir}"/syslinux/syslinux.cfg ]; then

From 766bb46c5fbe35353d2fbb1f4574d4c5dd54a262 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 18 Dec 2023 09:59:08 +0000
Subject: [PATCH 0091/1549] grub.cfg: fix path

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index fded583f..f859ba8f 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -79,7 +79,7 @@ function try_isolinux_config {
 		elif [ -f "${dir}"/syslinux/extlinux.conf ]; then
 			syslinux_configfile -s "${dir}"/syslinux/extlinux.conf
 		elif [ -f "${dir}"/extlinux/extlinux.conf ]; then
-			syslinux_configfile -s "${dir}"/syslinux/extlinux.conf
+			syslinux_configfile -s "${dir}"/extlinux/extlinux.conf
 		fi
 	done
 }

From b9f69f26c55e4ead24d8599463d1395aae88c7fb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 18 Dec 2023 10:00:23 +0000
Subject: [PATCH 0092/1549] grub.cfg syslinux: support scanning /boot/EFI/

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index f859ba8f..efc10aa4 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -71,7 +71,7 @@ function search_grub {
 
 function try_isolinux_config {
 	set root="${1}"
-	for dir in '' /boot /EFI /@ /@/boot /@/EFI; do
+	for dir in '' /boot /EFI /boot/EFI /@ /@/boot /@/boot/EFI /@/EFI; do
 		if [ -f "${dir}"/isolinux/isolinux.cfg ]; then
 			syslinux_configfile -i "${dir}"/isolinux/isolinux.cfg
 		elif [ -f "${dir}"/syslinux/syslinux.cfg ]; then

From cbd19d81fd33b444732d05891eccb983b3a790ed Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Dec 2023 02:23:46 +0000
Subject: [PATCH 0093/1549] git.sh fetch_config: simplify tree name check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 9a73bd92..57d8f4f9 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -36,8 +36,8 @@ fetch_config()
 		eval "$(setvars "" rev tree)"
 		_xm="fetch_config ${project}/${_target}"
 		load_target_config "${_target}"
-		[ "${_target}" != "${tree}" ] && _target="${tree}" && continue
-		break
+		[ "${_target}" = "${tree}" ] && break
+		_target="${tree}"
 	done
 }
 

From 578f105d62e088574ff8fecdc5d2e342e69335e7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Dec 2023 02:26:26 +0000
Subject: [PATCH 0094/1549] git.sh git_am_patches: reduce indentation

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 57d8f4f9..7d06479a 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -151,10 +151,9 @@ git_am_patches()
 		[ -L "${patch}" ] && continue
 		[ -f "${patch}" ] || continue
 		git am "${patch}" || patchfail="y"
-		if [ "${patchfail}" = "y" ]; then
-			git am --abort || err  "${sdir}: !git am --abort"
-			err  "!git am ${patch} -> ${sdir}"
-		fi
+		[ "${patchfail}" != "y" ] && continue
+		git am --abort || err  "${sdir}: !git am --abort"
+		err  "!git am ${patch} -> ${sdir}"
 	done
 	) || err "PATCH FAILURE"
 	for patches in "${patchdir}/"*; do

From c75ca20c0a6c6f3d7993d2ee9786d0451df5c6a4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Dec 2023 02:31:44 +0000
Subject: [PATCH 0095/1549] option.sh: don't rely on zero status on printf

this part of the code *must* return. the for loop
afterwards must not be permitted to execute.

it's unlikely that this would ever occur, unless
perhaps the user is using a very buggy sh.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/option.sh | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/include/option.sh b/include/option.sh
index ed094b5c..b6e22ce8 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -20,9 +20,10 @@ eval "$(setvars "" CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
 items()
 {
 	rval=1
-	[ ! -d "${1}" ] && \
-		printf "items: directory '%s' doesn't exist" "${1}" && \
-		    return 1
+	if [ ! -d "${1}" ]; then
+		printf "items: directory '%s' doesn't exist" "${1}"
+		return 1
+	fi
 	for x in "${1}/"*; do
 		# -e used because this is for files *or* directories
 		[ -e "${x}" ] || continue

From 3b7009aafaf1fc81ac7e1256c82dfa8a306a5d4e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Dec 2023 02:32:56 +0000
Subject: [PATCH 0096/1549] option.sh: print error on stderr, not stdout

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/option.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/option.sh b/include/option.sh
index b6e22ce8..976e604e 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -21,7 +21,7 @@ items()
 {
 	rval=1
 	if [ ! -d "${1}" ]; then
-		printf "items: directory '%s' doesn't exist" "${1}"
+		printf "items: directory '%s' doesn't exist" "${1}" 1>&2
 		return 1
 	fi
 	for x in "${1}/"*; do

From f6ebab5702f7a07b39e2b49f1a5f2aac44e09a5d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Dec 2023 02:34:54 +0000
Subject: [PATCH 0097/1549] option.sh scan_config: clean up if/else block

the code wasn't very clear. make it clearer.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/option.sh | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/include/option.sh b/include/option.sh
index 976e604e..a764bc33 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -44,7 +44,10 @@ scan_config()
 	    "${_fail}" "scan_config ${confdir}: Cannot concatenate files"
 	while read -r line ; do
 		set ${line} 1>/dev/null 2>/dev/null || :
-		[ "${1%:}" = "depend" ] && depend="${depend} ${2}" && continue
+		if [ "${1%:}" = "depend" ]; then
+			depend="${depend} ${2}"
+			continue
+		fi
 		eval "${1%:}=\"${2}\""
 	done << EOF
 	$(eval "awk '${awkstr}' \"${revfile}\"")

From 9c00746ba9aa2d42d2ad1b8126ac91bdfb8372d4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Dec 2023 02:45:41 +0000
Subject: [PATCH 0098/1549] update/release: minor cleanup

remove unnecessary "continue" command. it's written
at the end of a for loop, where it'll continue anyway

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/update/release | 1 -
 1 file changed, 1 deletion(-)

diff --git a/script/update/release b/script/update/release
index 3abdae3e..b762b89d 100755
--- a/script/update/release
+++ b/script/update/release
@@ -103,7 +103,6 @@ build_release()
 		esac
 		./vendor inject "${vrom}" || \
 		    err "TESTFAIL: inject: ${vrom##*/}"
-		continue
 	done
 	) || err "vendorfile inject test failure"
 

From 124b5bebd6204c16ec989aee7e8c7f9ff16b086b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Dec 2023 02:51:33 +0000
Subject: [PATCH 0099/1549] build initialise_command: simplify handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 17 +++++++----------
 1 file changed, 7 insertions(+), 10 deletions(-)

diff --git a/build b/build
index fec3f3c2..7a75a36a 100755
--- a/build
+++ b/build
@@ -64,17 +64,14 @@ initialise_command()
 	check_project
 
 	case "${1}" in
-	help)
-		usage ${0}
-		lbmk_exit 0 ;;
-	list)
-		items "${buildpath}"
-		lbmk_exit 0 ;;
-	version)
-		mkversion
-		lbmk_exit 0 ;;
+	help) usage ${0} ;;
+	list) items "${buildpath}" ;;
+	version) mkversion ;;
+	*)
+		option="${1}"
+		return 0 ;;
 	esac
-	option="${1}"
+	lbmk_exit 0
 }
 
 install_packages()

From 7f98ab8e62ba0efd0ec4e027599edd566ac14a07 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Dec 2023 03:53:47 +0000
Subject: [PATCH 0100/1549] git.sh: simplify submodule handling

do not use a subshell. use git -C instead.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 11 +++--------
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 7d06479a..e361cb41 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -65,14 +65,9 @@ prepare_new_tree()
 	cp -R "src/${project}/${project}" "${tmp_git_dir}" || \
 	    err "prepare_new_tree ${project}/${tree}: can't make tmpclone"
 	git_reset_rev "${tmp_git_dir}" "${rev}"
-	(
-	cd "${tmp_git_dir}" || \
-	    err "prepare_new_tree ${project}/${tree}: can't cd tmpclone"
-	if [ -f ".gitmodules" ]; then
-		git submodule update --init --checkout || \
-		    err "prepare_new_tree ${project}/${tree}: !submodules"
-	fi
-	) || err "git submodule update failure"
+	[ ! -f "${tmp_git_dir}/.gitmodules" ] || \
+		git -C "${tmp_git_dir}" submodule update --init --checkout \
+		    || err "prepare_new_tree ${project}/${tree}: !submodules"
 	git_am_patches "${tmp_git_dir}" "$PWD/$cfgsdir/$tree/patches" || \
 	    err "prepare_new_tree ${project}/${tree}: patch fail"
 	[ "${patchfail}" = "y" ] && err "PATCH FAIL"

From b0b4f86b1601c90ae5a9469ad111178943b4a108 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Mon, 18 Dec 2023 21:28:56 +0200
Subject: [PATCH 0101/1549] Add HP EliteBook 8460p

Inside the BIOS update, there's 68SCE and 68SCF variants.
Based on Qubes HCL and browsing linux-hardware.org, these are
Probook 6360b and Elitebook 8460p respectively.

I checked the KBC1126 EC Firmwares within the update file, both
use the exact same firmware images. Following-up will be a very
similar but untested port for 6360b.

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 .../0035-Add-VBT-for-EliteBook-8460p.patch    |  69 ++
 .../config/libgfxinit_corebootfb              | 641 ++++++++++++++++++
 .../config/libgfxinit_txtmode                 | 639 +++++++++++++++++
 config/coreboot/hp8460pintel_8mb/target.cfg   |   9 +
 config/vendor/sources                         |  10 +
 5 files changed, 1368 insertions(+)
 create mode 100644 config/coreboot/default/patches/0035-Add-VBT-for-EliteBook-8460p.patch
 create mode 100644 config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/hp8460pintel_8mb/target.cfg

diff --git a/config/coreboot/default/patches/0035-Add-VBT-for-EliteBook-8460p.patch b/config/coreboot/default/patches/0035-Add-VBT-for-EliteBook-8460p.patch
new file mode 100644
index 00000000..be01bb76
--- /dev/null
+++ b/config/coreboot/default/patches/0035-Add-VBT-for-EliteBook-8460p.patch
@@ -0,0 +1,69 @@
+From 1811aef1046298c490125e1bfc2be4b9cfb69aca Mon Sep 17 00:00:00 2001
+From: Riku Viitanen <riku.viitanen@protonmail.com>
+Date: Tue, 19 Dec 2023 20:15:44 +0200
+Subject: [PATCH] Add VBT for EliteBook 8460p
+
+Extracted from a running system myself. Also sent upstream, of course:
+https://review.coreboot.org/c/coreboot/+/79625
+
+Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
+---
+ src/mainboard/hp/snb_ivb_laptops/Kconfig         |   1 +
+ .../hp/snb_ivb_laptops/variants/8460p/data.vbt   | Bin 0 -> 3985 bytes
+ 2 files changed, 1 insertion(+)
+ create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8460p/data.vbt
+
+diff --git a/src/mainboard/hp/snb_ivb_laptops/Kconfig b/src/mainboard/hp/snb_ivb_laptops/Kconfig
+index 2ef8956caf..f0bd55f64f 100644
+--- a/src/mainboard/hp/snb_ivb_laptops/Kconfig
++++ b/src/mainboard/hp/snb_ivb_laptops/Kconfig
+@@ -54,6 +54,7 @@ config BOARD_HP_8460P
+ 	select BOARD_HP_SNB_IVB_LAPTOPS_COMMON
+ 	select BOARD_ROMSIZE_KB_8192
+ 	select GFX_GMA_PANEL_1_ON_LVDS
++	select INTEL_GMA_HAVE_VBT
+ 	select INTEL_INT15
+ 	select MAINBOARD_HAS_LIBGFXINIT
+ 	select SOUTHBRIDGE_INTEL_BD82X6X
+diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8460p/data.vbt b/src/mainboard/hp/snb_ivb_laptops/variants/8460p/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..61d69494c61c08d93e3404c6f096b098a03d0b3a
+GIT binary patch
+literal 3985
+zcmdT`Z)_A*5TCuhKihY^?R8t=dO$NR1g@o}+XG6eCG7P|X`!^&KQy(0^bfZ{lcTNI
+zR!U;RfsJ5LazsPW5Urmyd_YW0j4?5&iPn%9f{CB_fQdonix^QO0_VKFe}sniA|cA#
+z{NB7bJ3Bk`-pstWvZtXNyZmj9&o*?nG;Z5kxf3x28l2ASqke8{Xld{2Z}fNj`x{!@
+z13T~?SPX-C_iqA(1VL4NTJ5HmkqIO0?JVmW90?sBiVTPL8@O|HXgF+OFwlbjy?c$Y
+z5gD8?LfF-_&5vBA!Wt%r!y#;&JUC=T>M#%<96!+CYz#&wu!jpE*IZfctEygK<<qJ)
+zg|&Bg;l@qtwOU^t;=0x@Y~tVGkTG${Fh<ZHsA>%0Sa@>(15N}+#|}q^_aB%*Z=j4+
+zYFZ_A>(DeA1EZ0#wdfCrv6IV;W2Z50M4mT7YZaz2fJ>re6#xVq<cYc<-19+>1hNFp
+z5_l!BS;4PE2|}X|iUeDA2<gxwL74=t60EdBg#<3JD1yZbP$EI8D`^-41TPa$%*<(I
+zg)a|)E68~WFmp}fEc&?v1tcQ?bW^}of?Oa6z|Q#&O+X7D;6oZ505)O^4wrzbe{nh9
+z(Cp{wo|J${zF3!m=38G=TUW0)G&VJFZw+>K_w@GdjvhVs;<N|uUdY&Gdd{c0f(D=4
+zi=j{S!g0|8r^Q;hD$YWwU4vbAH;fTZ5>7cJxav^h2f`l&Nm60C#9%d{n(z#vnb1kt
+zP1r}6A{-;ULO4U1A)F_CNcfa6OSnq7Mz}$^MYuz-<}k=5*!RHQxFrg-;MAf*lIABU
+zxU6uh45H_f{BtS3DZOwPk2@T2KmLsy;&Ev+|C4^p3bZgnBT?R(leE>Oq8LohyNU7z
+z>`l(&adsIft`jXDf7(aRub?DKP9%dHxj%w!Y&oat7NyaH0v20jeu4Ctslme<Qv5W1
+zd;z%t+9};dtba){)$RiL@u(ugpQ0}}2ZYybeejE|67o(0#oH5WIlNwE-(1sF;CMm{
+zRIDVRA|zOO(X!I?(M@{vC;#qMe&%<oYzBPl=LHCPW@$_@=F-Bq!0t(~9rbfx|Mzbe
+z?;smQvy@2bYN$=;0<<;-`-6icM!0S8ppoTdNi&3sK=;Ec&3&RK;hkG6hqE1^>DpL9
+zf>Zon)ztM4&nmt5Y>LyoMc0Nd`gHwLisSY|%@HxN-g3<m8{dBb8VNBo-)Lkvk1&vn
+zyif#p=qZAjfRK1*K~FvvLT2RQT9(ej6$c~S7EToWKS$ixY?{|i>oRUiCW<wX`;;uy
+z%3cTY_Z(cx)Jn!SGTg(|QN|84e4D8sF!l+<@0t1=WA_-YaH<=eY>N{Or+UcAjymyO
+zr~0vzec{BPo$B9CW|MJ^tZtUsHW?4f>Jgc}EaUsK`kBlw%lNCTigcw>aGj!VrJIz3
+zlZtv=VW$=RNKwC5*tZJ)rKrwawkTIAzh#YDt_#t83NhM9DI(KG^jc(--WFU$ZF#Hd
+zF#0Yh8pG?$UD80Q=^qr+-Y4S$#a_$88fNkks(Y8AH(Hq1U`fVNj}63x229#eAtY?L
+z0T~<Ar9Gh_6lxk4!iEbj01uDJMEue1$I3O-&+En9;ODVy?v*@c^JJxA3OhV5-IY!s
+zo&#nn%~HeMbmJP#+nuc2FJ@uG-1OwxXI2e4vy$`e=Dw1i^BqvEHN}#9;ii?0nSn~C
+zWU~%0tc}eKc#3rmlZA!i!5X7$DpiH3BO5Qg_0gHJiz`S&c{(0!G4sHaXKd5Sc$m+N
+zH_K+ObWE3O!8ewqHHhFeZP4x6Xwb^_*@5Yh=I%)5D|sP;Y-->~^ukd+r@)#T%yXSm
+z2eZ&{(*rX>T%yTZAmc@h^3hz$S~DKz&rM5R)css-rQTba*$WZ!5?)APUpOzybQp+2
+z!GOz^pRs|?du~IPhs{$Xwq_9QZL@SyKA-5fU$aT6@q_%w8CNWVSDR?@TIdG83xW`W
+K3gHa=B>n?bM39pJ
+
+literal 0
+HcmV?d00001
+
+-- 
+2.43.0
+
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..01515397
--- /dev/null
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
@@ -0,0 +1,641 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+CONFIG_VENDOR_HP=y
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="EliteBook 8460p"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
+CONFIG_VGA_BIOS_ID="8086,0116"
+CONFIG_DIMM_MAX=2
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="HP"
+CONFIG_CBFS_SIZE=0x7E9000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="8460p"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_VBT_DATA_SIZE_KB=8
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_BOARD_HP_280_G2 is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
+# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
+# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_2170P is not set
+# CONFIG_BOARD_HP_2560P is not set
+# CONFIG_BOARD_HP_2570P is not set
+# CONFIG_BOARD_HP_2760P is not set
+CONFIG_BOARD_HP_8460P=y
+# CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8770W is not set
+# CONFIG_BOARD_HP_FOLIO_9470M is not set
+# CONFIG_BOARD_HP_PROBOOK_6360B is not set
+# CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
+CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
+CONFIG_EC_HP_KBC1126_GPE=0x16
+CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8460p"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+CONFIG_SOUTH_BRIDGE_OPTIONS=y
+CONFIG_HIDE_MEI_ON_ERROR=y
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_LPC47N217=y
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_HP_KBC1126=y
+
+#
+# Please select the following otherwise your laptop cannot be powered on.
+#
+CONFIG_KBC1126_FIRMWARE=y
+CONFIG_ECFW_PTR_ADDR=0xffffff00
+CONFIG_ECFW_PTR_SIZE=8
+CONFIG_KBC1126_FW1="../../../ec/hp8460p_6360b/ec.bin.fw1"
+CONFIG_KBC1126_FW1_OFFSET=0xfffe8000
+CONFIG_KBC1126_FW2="../../../ec/hp8460p_6360b/ec.bin.fw2"
+CONFIG_KBC1126_FW2_OFFSET=0xfffd0000
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+# CONFIG_INTEL_GMA_HAVE_VBT is not set
+# CONFIG_INTEL_GMA_ADD_VBT is not set
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..0742dec6
--- /dev/null
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
@@ -0,0 +1,639 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+CONFIG_VENDOR_HP=y
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="EliteBook 8460p"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
+CONFIG_VGA_BIOS_ID="8086,0116"
+CONFIG_DIMM_MAX=2
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="HP"
+CONFIG_CBFS_SIZE=0x7E9000
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="8460p"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_VBT_DATA_SIZE_KB=8
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_BOARD_HP_280_G2 is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
+# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
+# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_2170P is not set
+# CONFIG_BOARD_HP_2560P is not set
+# CONFIG_BOARD_HP_2570P is not set
+# CONFIG_BOARD_HP_2760P is not set
+CONFIG_BOARD_HP_8460P=y
+# CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8770W is not set
+# CONFIG_BOARD_HP_FOLIO_9470M is not set
+# CONFIG_BOARD_HP_PROBOOK_6360B is not set
+# CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
+CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
+CONFIG_EC_HP_KBC1126_GPE=0x16
+CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8460p"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+CONFIG_SOUTH_BRIDGE_OPTIONS=y
+CONFIG_HIDE_MEI_ON_ERROR=y
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_LPC47N217=y
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_HP_KBC1126=y
+
+#
+# Please select the following otherwise your laptop cannot be powered on.
+#
+CONFIG_KBC1126_FIRMWARE=y
+CONFIG_ECFW_PTR_ADDR=0xffffff00
+CONFIG_ECFW_PTR_SIZE=8
+CONFIG_KBC1126_FW1="../../../ec/hp8460p_6360b/ec.bin.fw1"
+CONFIG_KBC1126_FW1_OFFSET=0xfffe8000
+CONFIG_KBC1126_FW2="../../../ec/hp8460p_6360b/ec.bin.fw2"
+CONFIG_KBC1126_FW2_OFFSET=0xfffd0000
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_HAVE_LINEAR_FRAMEBUFFER is not set
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# CONFIG_LINEAR_FRAMEBUFFER is not set
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+# CONFIG_INTEL_GMA_HAVE_VBT is not set
+# CONFIG_INTEL_GMA_ADD_VBT is not set
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
new file mode 100644
index 00000000..784e020b
--- /dev/null
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -0,0 +1,9 @@
+tree="default"
+romtype="normal"
+arch="x86_64"
+payload_grub="y"
+payload_grub_withseabios="y"
+payload_seabios="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
+grub_timeout=10
diff --git a/config/vendor/sources b/config/vendor/sources
index 932d3e5e..10545858 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -95,6 +95,16 @@
 	SCH5545EC_DL_hash 18261d0f7f27e9de3b0b5a25019b9a934ef1a61cd3f0140e34f38553695e91e671e227a8fa962774edceab5c7804d13ed9fe1c518c5643c7c8f15632f903a6c4
 }
 
+{hp8460pintel}{
+	DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
+	DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
+	DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
+
+	EC_hash 9be5511d7ba07a376583cbd0b7fa4d7dff87ebc94b78d489fd62a14cb7f61eac99670e6a10ce374fe8e3c4bdafabbd1edce7774c3a482c15c2d4207b74ea49ed
+	EC_url https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85528.exe
+	EC_url_bkup https://web.archive.org/web/20211231004901/https://ftp.ext.hp.com/pub/softpaq/sp85501-86000/sp85528.exe
+}
+
 {hp8470pintel}{
 	DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
 	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe

From dbec5bf3f8d0c7ad96c782001ebfa352285300b1 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 20 Dec 2023 18:13:54 -0700
Subject: [PATCH 0102/1549] config/ifd/xx30: Fix 16_ifd component density and
 count

The component 1 and 2 densities were still set to 8 MiB and 4 MiB
respectively, which is incorrect for 16 MiB only configurations.
Change the component 1 density to 16 MiB so that the address space
gets properly mapped to SPI 1. In addition, change the number of
components field (byte 0x15) to 0x00 to indicate 1 flash chip.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 config/ifd/xx30/16_ifd | Bin 4096 -> 4096 bytes
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/config/ifd/xx30/16_ifd b/config/ifd/xx30/16_ifd
index b3a09fc8cfad736f040a1ae3e0fada00439d2cf9..f5c852a82f64e4565b083b70a2a7c3ec2868785f 100644
GIT binary patch
delta 39
lcmZorXi%6SD#O6S%*G@jq`;`ipv%C(@E-~2ZZtg44*=)*5Q6{!

delta 39
lcmZorXi%6SD#OUa%*G@jq`;`ipv%C(@E-}tY&1O24*=)G5OV+k


From 90ac30b163b47769695ba247b2d5cb7c43226815 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 21 Dec 2023 10:48:07 +0000
Subject: [PATCH 0103/1549] update/trees: simplified crossgcc handling

only call crossgcc for coreboot and u-boot, but use
hostcc for everything else. simplify the checking of
which architecture to compile for. "arch" in target.cfg
files has been modified, to allow further simplification.

without this patch, the logic currently only *barely* avoids
using crossgcc on things like utils, and only works in practise
because, in practise, lbmk only works on x86_64 anyway.

the new logic, as per this patch, is simpler and more robust.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/d510mo/target.cfg             |  2 +-
 config/coreboot/d510mo_16mb/target.cfg        |  2 +-
 config/coreboot/d945gclf_512kb/target.cfg     |  2 +-
 config/coreboot/d945gclf_8mb/target.cfg       |  2 +-
 config/coreboot/default/target.cfg            |  2 +-
 config/coreboot/dell/target.cfg               |  2 +-
 config/coreboot/e6400_4mb/target.cfg          |  2 +-
 config/coreboot/e6430_12mb/target.cfg         |  2 +-
 config/coreboot/e6530_12mb/target.cfg         |  2 +-
 config/coreboot/fam15h_rdimm/target.cfg       |  2 +-
 config/coreboot/fam15h_udimm/target.cfg       |  2 +-
 config/coreboot/g43t-am3/target.cfg           |  2 +-
 config/coreboot/g43t-am3_16mb/target.cfg      |  2 +-
 config/coreboot/ga-g41m-es2l/target.cfg       |  2 +-
 config/coreboot/gru_bob/target.cfg            |  2 +-
 config/coreboot/gru_kevin/target.cfg          |  2 +-
 config/coreboot/haswell/target.cfg            |  2 +-
 config/coreboot/hp2170p_16mb/target.cfg       |  2 +-
 config/coreboot/hp2560p_8mb/target.cfg        |  2 +-
 config/coreboot/hp2570p_16mb/target.cfg       |  2 +-
 config/coreboot/hp8200sff_4mb/target.cfg      |  2 +-
 config/coreboot/hp8200sff_8mb/target.cfg      |  2 +-
 config/coreboot/hp8300usdt_16mb/target.cfg    |  2 +-
 config/coreboot/hp8460pintel_8mb/target.cfg   |  2 +-
 config/coreboot/hp8470pintel_16mb/target.cfg  |  2 +-
 config/coreboot/hp9470m_16mb/target.cfg       |  2 +-
 config/coreboot/kcma-d8-rdimm_16mb/target.cfg |  2 +-
 config/coreboot/kcma-d8-rdimm_2mb/target.cfg  |  2 +-
 config/coreboot/kcma-d8-udimm_16mb/target.cfg |  2 +-
 config/coreboot/kcma-d8-udimm_2mb/target.cfg  |  2 +-
 config/coreboot/kfsn4-dre_1mb/target.cfg      |  2 +-
 config/coreboot/kfsn4-dre_2mb/target.cfg      |  2 +-
 .../coreboot/kgpe-d16-rdimm_16mb/target.cfg   |  2 +-
 config/coreboot/kgpe-d16-rdimm_2mb/target.cfg |  2 +-
 .../coreboot/kgpe-d16-udimm_16mb/target.cfg   |  2 +-
 config/coreboot/kgpe-d16-udimm_2mb/target.cfg |  2 +-
 config/coreboot/macbook11/target.cfg          |  2 +-
 config/coreboot/macbook11_16mb/target.cfg     |  2 +-
 config/coreboot/macbook21/target.cfg          |  2 +-
 config/coreboot/macbook21_16mb/target.cfg     |  2 +-
 config/coreboot/qemu_arm64_12mb/target.cfg    |  2 +-
 config/coreboot/qemu_x86_12mb/target.cfg      |  2 +-
 config/coreboot/r400_16mb/target.cfg          |  2 +-
 config/coreboot/r400_4mb/target.cfg           |  2 +-
 config/coreboot/r400_8mb/target.cfg           |  2 +-
 config/coreboot/r500_4mb/target.cfg           |  2 +-
 config/coreboot/t1650_12mb/target.cfg         |  2 +-
 config/coreboot/t400_16mb/target.cfg          |  2 +-
 config/coreboot/t400_4mb/target.cfg           |  2 +-
 config/coreboot/t400_8mb/target.cfg           |  2 +-
 config/coreboot/t420_8mb/target.cfg           |  2 +-
 config/coreboot/t420s_8mb/target.cfg          |  2 +-
 config/coreboot/t430_12mb/target.cfg          |  2 +-
 config/coreboot/t440plibremrc_12mb/target.cfg |  2 +-
 config/coreboot/t440pmrc_12mb/target.cfg      |  2 +-
 config/coreboot/t500_16mb/target.cfg          |  2 +-
 config/coreboot/t500_4mb/target.cfg           |  2 +-
 config/coreboot/t500_8mb/target.cfg           |  2 +-
 config/coreboot/t520_8mb/target.cfg           |  2 +-
 config/coreboot/t530_12mb/target.cfg          |  2 +-
 config/coreboot/t60_16mb_intelgpu/target.cfg  |  2 +-
 config/coreboot/t60_intelgpu/target.cfg       |  2 +-
 config/coreboot/w500_16mb/target.cfg          |  2 +-
 config/coreboot/w500_4mb/target.cfg           |  2 +-
 config/coreboot/w500_8mb/target.cfg           |  2 +-
 config/coreboot/w530_12mb/target.cfg          |  2 +-
 config/coreboot/w541_12mb/target.cfg          |  2 +-
 config/coreboot/w541mrc_12mb/target.cfg       |  2 +-
 config/coreboot/x200_16mb/target.cfg          |  2 +-
 config/coreboot/x200_4mb/target.cfg           |  2 +-
 config/coreboot/x200_8mb/target.cfg           |  2 +-
 config/coreboot/x201_8mb/target.cfg           |  2 +-
 config/coreboot/x220_8mb/target.cfg           |  2 +-
 config/coreboot/x220edp_8mb/target.cfg        |  2 +-
 config/coreboot/x230_12mb/target.cfg          |  2 +-
 config/coreboot/x230_16mb/target.cfg          |  2 +-
 config/coreboot/x230edp_12mb/target.cfg       |  2 +-
 config/coreboot/x230t_12mb/target.cfg         |  2 +-
 config/coreboot/x230t_16mb/target.cfg         |  2 +-
 config/coreboot/x301_16mb/target.cfg          |  2 +-
 config/coreboot/x301_4mb/target.cfg           |  2 +-
 config/coreboot/x301_8mb/target.cfg           |  2 +-
 config/coreboot/x60/target.cfg                |  2 +-
 config/coreboot/x60_16mb/target.cfg           |  2 +-
 config/seabios/default/target.cfg             |  2 +-
 config/u-boot/default/target.cfg              |  2 +-
 config/u-boot/gru_bob/target.cfg              |  2 +-
 config/u-boot/gru_kevin/target.cfg            |  2 +-
 config/u-boot/qemu_arm64_12mb/target.cfg      |  2 +-
 config/u-boot/qemu_x86_12mb/target.cfg        |  2 +-
 script/update/trees                           | 41 ++++++-------------
 91 files changed, 102 insertions(+), 119 deletions(-)

diff --git a/config/coreboot/d510mo/target.cfg b/config/coreboot/d510mo/target.cfg
index b127411a..2b1d1a7c 100644
--- a/config/coreboot/d510mo/target.cfg
+++ b/config/coreboot/d510mo/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/d510mo_16mb/target.cfg b/config/coreboot/d510mo_16mb/target.cfg
index 1bfff85a..8b1e41ba 100644
--- a/config/coreboot/d510mo_16mb/target.cfg
+++ b/config/coreboot/d510mo_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
diff --git a/config/coreboot/d945gclf_512kb/target.cfg b/config/coreboot/d945gclf_512kb/target.cfg
index 4b9708e1..153cd806 100644
--- a/config/coreboot/d945gclf_512kb/target.cfg
+++ b/config/coreboot/d945gclf_512kb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_32"
+arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/d945gclf_8mb/target.cfg b/config/coreboot/d945gclf_8mb/target.cfg
index 4b9708e1..153cd806 100644
--- a/config/coreboot/d945gclf_8mb/target.cfg
+++ b/config/coreboot/d945gclf_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_32"
+arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/default/target.cfg b/config/coreboot/default/target.cfg
index 076e7555..23f93b09 100644
--- a/config/coreboot/default/target.cfg
+++ b/config/coreboot/default/target.cfg
@@ -1,4 +1,4 @@
 tree="default"
 romtype="normal"
 rev="d862695f5f432b5c78dada5f16c293a4c3f9fce6"
-arch="x86_64"
+arch="i386-elf"
diff --git a/config/coreboot/dell/target.cfg b/config/coreboot/dell/target.cfg
index 678e48c4..19bd68be 100644
--- a/config/coreboot/dell/target.cfg
+++ b/config/coreboot/dell/target.cfg
@@ -1,4 +1,4 @@
 tree="dell"
 romtype="normal"
 rev="d862695f5f432b5c78dada5f16c293a4c3f9fce6"
-arch="x86_64"
+arch="i386-elf"
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index eea2b6f9..2a95482c 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -1,6 +1,6 @@
 tree="dell"
 romtype="4MiB ICH9 IFD NOR flash"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index 1cf0792e..4feb9909 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index 1cf0792e..4feb9909 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/fam15h_rdimm/target.cfg b/config/coreboot/fam15h_rdimm/target.cfg
index 3d5a4dc4..8d1f6a14 100644
--- a/config/coreboot/fam15h_rdimm/target.cfg
+++ b/config/coreboot/fam15h_rdimm/target.cfg
@@ -1,7 +1,7 @@
 tree="fam15h_rdimm"
 romtype="normal"
 rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="n"
diff --git a/config/coreboot/fam15h_udimm/target.cfg b/config/coreboot/fam15h_udimm/target.cfg
index d987c574..0e451af6 100644
--- a/config/coreboot/fam15h_udimm/target.cfg
+++ b/config/coreboot/fam15h_udimm/target.cfg
@@ -1,7 +1,7 @@
 tree="fam15h_udimm"
 romtype="normal"
 rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="n"
diff --git a/config/coreboot/g43t-am3/target.cfg b/config/coreboot/g43t-am3/target.cfg
index ac38a6c7..0308cf27 100644
--- a/config/coreboot/g43t-am3/target.cfg
+++ b/config/coreboot/g43t-am3/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 microcode_required="n"
diff --git a/config/coreboot/g43t-am3_16mb/target.cfg b/config/coreboot/g43t-am3_16mb/target.cfg
index ac38a6c7..0308cf27 100644
--- a/config/coreboot/g43t-am3_16mb/target.cfg
+++ b/config/coreboot/g43t-am3_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 microcode_required="n"
diff --git a/config/coreboot/ga-g41m-es2l/target.cfg b/config/coreboot/ga-g41m-es2l/target.cfg
index 047fced1..350c39d2 100644
--- a/config/coreboot/ga-g41m-es2l/target.cfg
+++ b/config/coreboot/ga-g41m-es2l/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ata"
diff --git a/config/coreboot/gru_bob/target.cfg b/config/coreboot/gru_bob/target.cfg
index 928029cb..10e1e969 100644
--- a/config/coreboot/gru_bob/target.cfg
+++ b/config/coreboot/gru_bob/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="AArch64"
+arch="aarch64-elf"
 payload_uboot="y"
 vendorfiles="n"
 microcode_required="n"
diff --git a/config/coreboot/gru_kevin/target.cfg b/config/coreboot/gru_kevin/target.cfg
index 928029cb..10e1e969 100644
--- a/config/coreboot/gru_kevin/target.cfg
+++ b/config/coreboot/gru_kevin/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="AArch64"
+arch="aarch64-elf"
 payload_uboot="y"
 vendorfiles="n"
 microcode_required="n"
diff --git a/config/coreboot/haswell/target.cfg b/config/coreboot/haswell/target.cfg
index f96c5fc2..e9659265 100644
--- a/config/coreboot/haswell/target.cfg
+++ b/config/coreboot/haswell/target.cfg
@@ -1,4 +1,4 @@
 tree="haswell"
 romtype="normal"
 rev="1411ecf6f0b2c7395bcb96b856dcfdddb1b0c81b"
-arch="x86_64"
+arch="i386-elf"
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index 784e020b..bcdf9466 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index 784e020b..bcdf9466 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index 784e020b..bcdf9466 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 1467dcd2..63112911 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 1467dcd2..63112911 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index 1467dcd2..63112911 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index 784e020b..bcdf9466 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index 784e020b..bcdf9466 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index 784e020b..bcdf9466 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
index dd6fac7c..a71ab92b 100644
--- a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="fam15h_rdimm"
 romtype="d8d16sas"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
index dd6fac7c..a71ab92b 100644
--- a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
@@ -1,6 +1,6 @@
 tree="fam15h_rdimm"
 romtype="d8d16sas"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/kcma-d8-udimm_16mb/target.cfg b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
index 6e4887a4..3f1f7c3e 100644
--- a/config/coreboot/kcma-d8-udimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="fam15h_udimm"
 romtype="d8d16sas"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/kcma-d8-udimm_2mb/target.cfg b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
index 6e4887a4..3f1f7c3e 100644
--- a/config/coreboot/kcma-d8-udimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
@@ -1,6 +1,6 @@
 tree="fam15h_udimm"
 romtype="d8d16sas"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/kfsn4-dre_1mb/target.cfg b/config/coreboot/kfsn4-dre_1mb/target.cfg
index 5530255d..c5cb67b1 100644
--- a/config/coreboot/kfsn4-dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4-dre_1mb/target.cfg
@@ -1,6 +1,6 @@
 tree="fam15h_udimm"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 crossgcc_ada="n"
diff --git a/config/coreboot/kfsn4-dre_2mb/target.cfg b/config/coreboot/kfsn4-dre_2mb/target.cfg
index 95ec4944..debe16fd 100644
--- a/config/coreboot/kfsn4-dre_2mb/target.cfg
+++ b/config/coreboot/kfsn4-dre_2mb/target.cfg
@@ -1,6 +1,6 @@
 tree="fam15h_udimm"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
index 3263842d..883d764f 100644
--- a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="fam15h_rdimm"
 romtype="d8d16sas"
-arch="x86_64"
+arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
index 3263842d..883d764f 100644
--- a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
@@ -1,6 +1,6 @@
 tree="fam15h_rdimm"
 romtype="d8d16sas"
-arch="x86_64"
+arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
index a833cda9..d767dd7e 100644
--- a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="fam15h_udimm"
 romtype="d8d16sas"
-arch="x86_64"
+arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
index a833cda9..d767dd7e 100644
--- a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
@@ -1,6 +1,6 @@
 tree="fam15h_udimm"
 romtype="d8d16sas"
-arch="x86_64"
+arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index 117e160d..ea9074ea 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="i945 laptop"
-arch="x86_32"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index 117e160d..ea9074ea 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="i945 laptop"
-arch="x86_32"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index 135e894b..49a676da 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="i945 laptop"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index 135e894b..49a676da 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="i945 laptop"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/qemu_arm64_12mb/target.cfg b/config/coreboot/qemu_arm64_12mb/target.cfg
index 928029cb..10e1e969 100644
--- a/config/coreboot/qemu_arm64_12mb/target.cfg
+++ b/config/coreboot/qemu_arm64_12mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="AArch64"
+arch="aarch64-elf"
 payload_uboot="y"
 vendorfiles="n"
 microcode_required="n"
diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg
index cefa53aa..a835bc4a 100644
--- a/config/coreboot/qemu_x86_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_12mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index d018dba1..ec12cd4f 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index f5dfa8d8..0337af2c 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index f5dfa8d8..0337af2c 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index f5dfa8d8..0337af2c 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index 39586f15..4b46a5a4 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -1,6 +1,6 @@
 tree="haswell"
 romtype="t440p"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/t440pmrc_12mb/target.cfg b/config/coreboot/t440pmrc_12mb/target.cfg
index f86e6406..aca758d4 100644
--- a/config/coreboot/t440pmrc_12mb/target.cfg
+++ b/config/coreboot/t440pmrc_12mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="t440p"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index f5dfa8d8..0337af2c 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index f5dfa8d8..0337af2c 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 8f4eb55e..3f803f95 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="i945 laptop"
-arch="x86_32"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 8f4eb55e..3f803f95 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="i945 laptop"
-arch="x86_32"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index f5dfa8d8..0337af2c 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index 39586f15..4b46a5a4 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -1,6 +1,6 @@
 tree="haswell"
 romtype="t440p"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/w541mrc_12mb/target.cfg b/config/coreboot/w541mrc_12mb/target.cfg
index f86e6406..aca758d4 100644
--- a/config/coreboot/w541mrc_12mb/target.cfg
+++ b/config/coreboot/w541mrc_12mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="t440p"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x201_8mb/target.cfg b/config/coreboot/x201_8mb/target.cfg
index f5dfa8d8..0337af2c 100644
--- a/config/coreboot/x201_8mb/target.cfg
+++ b/config/coreboot/x201_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index f5dfa8d8..0337af2c 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x220edp_8mb/target.cfg b/config/coreboot/x220edp_8mb/target.cfg
index f5dfa8d8..0337af2c 100644
--- a/config/coreboot/x220edp_8mb/target.cfg
+++ b/config/coreboot/x220edp_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg
index f5dfa8d8..0337af2c 100644
--- a/config/coreboot/x230_12mb/target.cfg
+++ b/config/coreboot/x230_12mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index f5dfa8d8..0337af2c 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x230edp_12mb/target.cfg b/config/coreboot/x230edp_12mb/target.cfg
index f5dfa8d8..0337af2c 100644
--- a/config/coreboot/x230edp_12mb/target.cfg
+++ b/config/coreboot/x230edp_12mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg
index f5dfa8d8..0337af2c 100644
--- a/config/coreboot/x230t_12mb/target.cfg
+++ b/config/coreboot/x230t_12mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index f5dfa8d8..0337af2c 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index 58ae8733..4269b2a5 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="normal"
-arch="x86_64"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 8f4eb55e..3f803f95 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="i945 laptop"
-arch="x86_32"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 8f4eb55e..3f803f95 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 romtype="i945 laptop"
-arch="x86_32"
+arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/seabios/default/target.cfg b/config/seabios/default/target.cfg
index 9e116d13..5d2b3059 100644
--- a/config/seabios/default/target.cfg
+++ b/config/seabios/default/target.cfg
@@ -1,3 +1,3 @@
-arch="x86_32"
+arch="i386-elf"
 tree="default"
 rev="1e1da7a963007d03a4e0e9a9e0ff17990bb1608d"
diff --git a/config/u-boot/default/target.cfg b/config/u-boot/default/target.cfg
index 1eda306f..2938f66e 100644
--- a/config/u-boot/default/target.cfg
+++ b/config/u-boot/default/target.cfg
@@ -1,3 +1,3 @@
 tree="default"
 rev="4459ed60cb1e0562bc5b40405e2b4b9bbf766d57" # v2023.10
-arch="AArch64"
+arch="aarch64-elf"
diff --git a/config/u-boot/gru_bob/target.cfg b/config/u-boot/gru_bob/target.cfg
index 6532f257..5043af7e 100644
--- a/config/u-boot/gru_bob/target.cfg
+++ b/config/u-boot/gru_bob/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-arch="AArch64"
+arch="aarch64-elf"
diff --git a/config/u-boot/gru_kevin/target.cfg b/config/u-boot/gru_kevin/target.cfg
index 6532f257..5043af7e 100644
--- a/config/u-boot/gru_kevin/target.cfg
+++ b/config/u-boot/gru_kevin/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-arch="AArch64"
+arch="aarch64-elf"
diff --git a/config/u-boot/qemu_arm64_12mb/target.cfg b/config/u-boot/qemu_arm64_12mb/target.cfg
index 6532f257..5043af7e 100644
--- a/config/u-boot/qemu_arm64_12mb/target.cfg
+++ b/config/u-boot/qemu_arm64_12mb/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-arch="AArch64"
+arch="aarch64-elf"
diff --git a/config/u-boot/qemu_x86_12mb/target.cfg b/config/u-boot/qemu_x86_12mb/target.cfg
index 24b7cb0c..ccff2e3f 100644
--- a/config/u-boot/qemu_x86_12mb/target.cfg
+++ b/config/u-boot/qemu_x86_12mb/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-arch="x86_64"
+arch="i386-elf"
diff --git a/script/update/trees b/script/update/trees
index 67455a3b..44a63263 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -174,45 +174,28 @@ handle_src_tree()
 # (seabios and grub currently use hostcc, not crossgcc)
 check_cross_compiler()
 {
+	[ "$project" = "u-boot" ] || [ "$project" = "coreboot" ] || return 0
+	[ -z "${arch}" ] && return 0
+
+	_arch="${arch}"
+	[ "${arch}" = "aarch64-elf" ] && _arch="aarch64-elf arm-eabi"
+
 	[ "${crossgcc_ada}" = "y" ] || [ "${crossgcc_ada}" = "n" ] || \
 		crossgcc_ada="y"
 	[ "${crossgcc_ada}" = "y" ] || export BUILD_LANGUAGES=c
 
 	cbdir="src/coreboot/${tree}"
 	[ "${project}" != "coreboot" ] && cbdir="src/coreboot/default"
+	x_ ./update trees -f coreboot ${cbdir#src/coreboot/}
 
-	# only true if not building coreboot:
-	ctarget="${cbdir#src/coreboot/}"
-	[ -d "${cbdir}" ] || x_ ./update trees -f coreboot ${ctarget}
-
-	if [ "${arch}" = "x86_32" ] || [ "${arch}" = "x86_64" ]; then
-		[ -d "${cbdir}/util/crossgcc/xgcc/i386-elf/" ] || \
-			x_ make -C "${cbdir}" crossgcc-i386 CPUS=$(nproc)
-		case "$(uname -m)" in
-			x86*|i*86|amd64) : ;;
-			*) export CROSS_COMPILE=i386-elf- ;;
-		esac
-	elif [ "${arch}" = "ARMv7" ]; then
-		[ -d "${cbdir}/util/crossgcc/xgcc/arm-eabi/" ] || \
-			x_ make -C "${cbdir}" crossgcc-arm CPUS=$(nproc)
-		case "$(uname -m)" in
-			arm|arm32|armv6*|armv7*) : ;;
-			*) export CROSS_COMPILE=arm-eabi- ;;
-		esac
-	elif [ "${arch}" = "AArch64" ]; then
-		[ -d "${cbdir}/util/crossgcc/xgcc/aarch64-elf/" ] || \
-			x_ make -C "${cbdir}" crossgcc-aarch64 CPUS=$(nproc)
-		# aarch64 also needs armv7 toolchain for arm-trusted-firmware
-		[ -d "${cbdir}/util/crossgcc/xgcc/arm-eabi/" ] || \
-			x_ make -C "${cbdir}" crossgcc-arm CPUS=$(nproc)
-		case "$(uname -m)" in
-			arm64|aarch64) : ;;
-			*) export CROSS_COMPILE=aarch64-elf- ;;
-		esac
-	fi
+	for xarch in ${_arch}; do
+		[ -d "${cbdir}/util/crossgcc/xgcc/${xarch}/" ] && continue
+		x_ make -C "${cbdir}" crossgcc-${xarch%-*} CPUS=$(nproc)
+	done
 
 	# we *must* ensure that u-boot's build system uses crossgcc first
 	export PATH="${PWD}/${cbdir}/util/crossgcc/xgcc/bin:$PATH"
+	export CROSS_COMPILE="${_arch% *}-"
 }
 
 check_config()

From 95788059ce607ab77f37d7d9b94a09219ad24a0a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 21 Dec 2023 13:26:26 +0000
Subject: [PATCH 0104/1549] update/trees crossgcc: call err if arch isn't set

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/update/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/update/trees b/script/update/trees
index 44a63263..f046b027 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -175,7 +175,7 @@ handle_src_tree()
 check_cross_compiler()
 {
 	[ "$project" = "u-boot" ] || [ "$project" = "coreboot" ] || return 0
-	[ -z "${arch}" ] && return 0
+	[ -z "${arch}" ] && err "${project}/${tree}: arch isn't set"
 
 	_arch="${arch}"
 	[ "${arch}" = "aarch64-elf" ] && _arch="aarch64-elf arm-eabi"

From 3ccf194169de153350f3c7294ded0e274ed95a42 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 21 Dec 2023 13:46:58 +0000
Subject: [PATCH 0105/1549] update coreboot configs

the x220 edp patch invalidated lots of configs, so
i did: ./update trees -u coreboot

this is the resulting patch

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../hp8460pintel_8mb/config/libgfxinit_corebootfb      |  5 ++---
 .../hp8460pintel_8mb/config/libgfxinit_txtmode         | 10 ++++------
 config/coreboot/r400_16mb/config/libgfxinit_corebootfb |  1 +
 config/coreboot/r400_16mb/config/libgfxinit_txtmode    |  1 +
 config/coreboot/r400_4mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/r400_4mb/config/libgfxinit_txtmode     |  1 +
 config/coreboot/r400_8mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/r400_8mb/config/libgfxinit_txtmode     |  1 +
 config/coreboot/r500_4mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/r500_4mb/config/libgfxinit_txtmode     |  1 +
 config/coreboot/t400_16mb/config/libgfxinit_corebootfb |  1 +
 config/coreboot/t400_16mb/config/libgfxinit_txtmode    |  1 +
 config/coreboot/t400_4mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/t400_4mb/config/libgfxinit_txtmode     |  1 +
 config/coreboot/t400_8mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/t400_8mb/config/libgfxinit_txtmode     |  1 +
 config/coreboot/t420_8mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/t420s_8mb/config/libgfxinit_corebootfb |  1 +
 config/coreboot/t420s_8mb/config/libgfxinit_txtmode    |  1 +
 config/coreboot/t430_12mb/config/libgfxinit_corebootfb |  1 +
 config/coreboot/t430_12mb/config/libgfxinit_txtmode    |  1 +
 .../t440pmrc_12mb/config/libgfxinit_corebootfb         |  1 +
 .../coreboot/t440pmrc_12mb/config/libgfxinit_txtmode   |  1 +
 config/coreboot/t500_16mb/config/libgfxinit_corebootfb |  1 +
 config/coreboot/t500_16mb/config/libgfxinit_txtmode    |  1 +
 config/coreboot/t500_4mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/t500_4mb/config/libgfxinit_txtmode     |  1 +
 config/coreboot/t500_8mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/t500_8mb/config/libgfxinit_txtmode     |  1 +
 config/coreboot/t520_8mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/t520_8mb/config/libgfxinit_txtmode     |  1 +
 config/coreboot/t530_12mb/config/libgfxinit_corebootfb |  1 +
 config/coreboot/t530_12mb/config/libgfxinit_txtmode    |  1 +
 .../t60_16mb_intelgpu/config/libgfxinit_corebootfb     |  1 +
 .../t60_16mb_intelgpu/config/libgfxinit_txtmode        |  1 +
 .../coreboot/t60_intelgpu/config/libgfxinit_corebootfb |  1 +
 config/coreboot/t60_intelgpu/config/libgfxinit_txtmode |  1 +
 config/coreboot/w500_16mb/config/libgfxinit_corebootfb |  1 +
 config/coreboot/w500_16mb/config/libgfxinit_txtmode    |  1 +
 config/coreboot/w500_4mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/w500_4mb/config/libgfxinit_txtmode     |  1 +
 config/coreboot/w500_8mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/w500_8mb/config/libgfxinit_txtmode     |  1 +
 config/coreboot/w530_12mb/config/libgfxinit_corebootfb |  1 +
 config/coreboot/w530_12mb/config/libgfxinit_txtmode    |  1 +
 .../coreboot/w541mrc_12mb/config/libgfxinit_corebootfb |  1 +
 config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode |  1 +
 config/coreboot/x200_16mb/config/libgfxinit_corebootfb |  1 +
 config/coreboot/x200_16mb/config/libgfxinit_txtmode    |  1 +
 config/coreboot/x200_4mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/x200_4mb/config/libgfxinit_txtmode     |  1 +
 config/coreboot/x200_8mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/x200_8mb/config/libgfxinit_txtmode     |  1 +
 config/coreboot/x201_8mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/x201_8mb/config/libgfxinit_txtmode     |  1 +
 config/coreboot/x220_8mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/x220_8mb/config/libgfxinit_txtmode     |  1 +
 config/coreboot/x230_12mb/config/libgfxinit_corebootfb |  1 +
 config/coreboot/x230_12mb/config/libgfxinit_txtmode    |  1 +
 config/coreboot/x230_16mb/config/libgfxinit_corebootfb |  1 +
 config/coreboot/x230_16mb/config/libgfxinit_txtmode    |  1 +
 .../coreboot/x230edp_12mb/config/libgfxinit_corebootfb |  1 +
 config/coreboot/x230edp_12mb/config/libgfxinit_txtmode |  1 +
 .../coreboot/x230t_12mb/config/libgfxinit_corebootfb   |  1 +
 config/coreboot/x230t_12mb/config/libgfxinit_txtmode   |  1 +
 .../coreboot/x230t_16mb/config/libgfxinit_corebootfb   |  1 +
 config/coreboot/x230t_16mb/config/libgfxinit_txtmode   |  1 +
 config/coreboot/x301_16mb/config/libgfxinit_corebootfb |  1 +
 config/coreboot/x301_16mb/config/libgfxinit_txtmode    |  1 +
 config/coreboot/x301_4mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/x301_4mb/config/libgfxinit_txtmode     |  1 +
 config/coreboot/x301_8mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/x301_8mb/config/libgfxinit_txtmode     |  1 +
 config/coreboot/x60/config/libgfxinit_corebootfb       |  1 +
 config/coreboot/x60/config/libgfxinit_txtmode          |  1 +
 config/coreboot/x60_16mb/config/libgfxinit_corebootfb  |  1 +
 config/coreboot/x60_16mb/config/libgfxinit_txtmode     |  1 +
 77 files changed, 81 insertions(+), 9 deletions(-)

diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
index 01515397..d821f953 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
@@ -107,7 +107,7 @@ CONFIG_MAINBOARD_PART_NUMBER="EliteBook 8460p"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
 CONFIG_VGA_BIOS_ID="8086,0116"
-CONFIG_DIMM_MAX=2
+CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
@@ -126,7 +126,6 @@ CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
@@ -425,7 +424,7 @@ CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-# CONFIG_INTEL_GMA_HAVE_VBT is not set
+CONFIG_INTEL_GMA_HAVE_VBT=y
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
index 0742dec6..3ec6e5c0 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
@@ -107,7 +107,7 @@ CONFIG_MAINBOARD_PART_NUMBER="EliteBook 8460p"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
 CONFIG_VGA_BIOS_ID="8086,0116"
-CONFIG_DIMM_MAX=2
+CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
@@ -124,7 +124,6 @@ CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
@@ -388,7 +387,7 @@ CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # Devices
 #
 CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-# CONFIG_HAVE_LINEAR_FRAMEBUFFER is not set
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
 CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
 CONFIG_MAINBOARD_USE_LIBGFXINIT=y
 # CONFIG_VGA_ROM_RUN is not set
@@ -400,8 +399,6 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
-# CONFIG_LINEAR_FRAMEBUFFER is not set
-# CONFIG_BOOTSPLASH is not set
 # end of Display
 
 CONFIG_PCI=y
@@ -423,7 +420,7 @@ CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-# CONFIG_INTEL_GMA_HAVE_VBT is not set
+CONFIG_INTEL_GMA_HAVE_VBT=y
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
@@ -479,6 +476,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 # end of Generic Drivers
 
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
index df0ead8b..25bf6d5d 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_txtmode b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
index f6fe95fb..10800d04 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
index 657a9f20..f0dd5014 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_txtmode b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
index 4e942182..1d2591dc 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
index 00fa1541..620710a5 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_txtmode b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
index 75a40c2c..dc1fe7de 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
index 5ba1745d..2c500c69 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
@@ -192,6 +192,7 @@ CONFIG_BOARD_LENOVO_R500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_txtmode b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
index b3c81a78..1de26278 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
@@ -190,6 +190,7 @@ CONFIG_BOARD_LENOVO_R500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
index c8e373da..3ad8a62e 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_txtmode b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
index 04620176..fb37cd68 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
index 22d38937..bd8ee862 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_txtmode b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
index 7533c992..f102b6b1 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
index 0f88b671..f7eb5c47 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_txtmode b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
index ad4f8745..379e8867 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
index e05f30c7..57e99fe9 100644
--- a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
@@ -194,6 +194,7 @@ CONFIG_BOARD_LENOVO_T420=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
index af588b5b..03f678ab 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
@@ -194,6 +194,7 @@ CONFIG_BOARD_LENOVO_T420S=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
index b1247317..c20e72a2 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
@@ -192,6 +192,7 @@ CONFIG_BOARD_LENOVO_T420S=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
index c89bd740..9324783d 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_txtmode b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
index 113ff598..3d7923e4 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
index 9e06c261..70f21865 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
@@ -189,6 +189,7 @@ CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
index 36886f27..c81d9d10 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
@@ -187,6 +187,7 @@ CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
index 202f3046..25e11da6 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_txtmode b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
index 14af4f70..8da67f7e 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
index 6f501f58..31292a61 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_txtmode b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
index 17f640ba..1d50fe62 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
index e54dfa15..d24f15ff 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_txtmode b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
index 8bbfde64..9c426cdd 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
index b2588bdc..5db2b049 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
@@ -194,6 +194,7 @@ CONFIG_BOARD_LENOVO_T520=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_txtmode b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
index aa34ce96..fa2e61cb 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
@@ -192,6 +192,7 @@ CONFIG_BOARD_LENOVO_T520=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
index a9bff67e..e8991715 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_BOARD_LENOVO_T530=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_txtmode b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
index d4a3daad..83e0524a 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_T530=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
index 84810003..1cbfb098 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
@@ -182,6 +182,7 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
index 3d654f7c..de378e16 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
@@ -182,6 +182,7 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
index 6bfd8b0c..2786bbe6 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
@@ -182,6 +182,7 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
index 686090e2..3a84be7a 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
@@ -182,6 +182,7 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
index 68109b00..2ae22535 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_txtmode b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
index e076edff..9142e709 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
index 635da2f2..265d8112 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_txtmode b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
index 5c818d46..6b4ac162 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
index 09fd04ae..1c9779ef 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_txtmode b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
index f41fe654..60df11b5 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
index 1801f8a9..7f6f48b6 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
@@ -193,6 +193,7 @@ CONFIG_BOARD_LENOVO_W530=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_txtmode b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
index 7d1d1d9a..6ac64749 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_W530=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
index 57230c83..e17a939a 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
@@ -189,6 +189,7 @@ CONFIG_BOARD_LENOVO_THINKPAD_W541=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
index 8a651862..fbfd3d87 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
@@ -187,6 +187,7 @@ CONFIG_BOARD_LENOVO_THINKPAD_W541=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
index a700f31d..c9f7904a 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_txtmode b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
index 532bb1b5..e88aeca6 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
@@ -189,6 +189,7 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
index 246d4457..769741bd 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_txtmode b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
index e086e4b1..49809078 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
@@ -189,6 +189,7 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
index 267d00d1..7eded314 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_txtmode b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
index cfee03e2..f43f136b 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
@@ -189,6 +189,7 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x201_8mb/config/libgfxinit_corebootfb b/config/coreboot/x201_8mb/config/libgfxinit_corebootfb
index dd5586cb..38eedfe1 100644
--- a/config/coreboot/x201_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x201_8mb/config/libgfxinit_corebootfb
@@ -192,6 +192,7 @@ CONFIG_BOARD_LENOVO_X201=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x201_8mb/config/libgfxinit_txtmode b/config/coreboot/x201_8mb/config/libgfxinit_txtmode
index e520f8c3..d471233c 100644
--- a/config/coreboot/x201_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x201_8mb/config/libgfxinit_txtmode
@@ -190,6 +190,7 @@ CONFIG_BOARD_LENOVO_X201=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
index 16390f3e..10c370a5 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
@@ -195,6 +195,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_BOARD_LENOVO_X220=y
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_txtmode b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
index 6e0420d3..8480391a 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
@@ -193,6 +193,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_BOARD_LENOVO_X220=y
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
index aa4578f5..959175d5 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
@@ -194,6 +194,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_txtmode b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
index 5c2f9de6..7fa8f480 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
@@ -192,6 +192,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
index 583ba281..7dba1ea4 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
@@ -194,6 +194,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_txtmode b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
index 76108ee5..80fbf781 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
@@ -192,6 +192,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
index 49536e31..d3c2c1cf 100644
--- a/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
@@ -194,6 +194,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode b/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
index ad729a69..48c7535a 100644
--- a/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
@@ -192,6 +192,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
index 587bce57..da91c066 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
@@ -194,6 +194,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
index 24bd4939..6f8df96e 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
@@ -192,6 +192,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
index 4b84b31f..07fbc2e4 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
@@ -194,6 +194,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
index 249108c6..5dd3420b 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
@@ -192,6 +192,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
index 3748d3a7..65b70c1a 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_txtmode b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
index a5c45315..25b93bf0 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
@@ -189,6 +189,7 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
index 75f10f2c..465a75bf 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_txtmode b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
index 8f56325f..81598fc0 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
@@ -189,6 +189,7 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
index 4510f76f..1d29b9ad 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
@@ -191,6 +191,7 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_txtmode b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
index c485f7e4..f7cf0c2d 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
@@ -189,6 +189,7 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x60/config/libgfxinit_corebootfb b/config/coreboot/x60/config/libgfxinit_corebootfb
index f9916cc0..ba95fbfe 100644
--- a/config/coreboot/x60/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60/config/libgfxinit_corebootfb
@@ -183,6 +183,7 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x60/config/libgfxinit_txtmode b/config/coreboot/x60/config/libgfxinit_txtmode
index 059c3079..02e5fad4 100644
--- a/config/coreboot/x60/config/libgfxinit_txtmode
+++ b/config/coreboot/x60/config/libgfxinit_txtmode
@@ -183,6 +183,7 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
index e1a0f282..7bab148e 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
@@ -183,6 +183,7 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_txtmode b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
index 28292782..8ac47191 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
@@ -183,6 +183,7 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set

From aa4160e3d9aa93ca1f6347f81a2191569339fe5e Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Thu, 21 Dec 2023 16:54:35 +0200
Subject: [PATCH 0106/1549] hp8460pintel: actually enable vbt

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb | 3 ++-
 config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode    | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
index d821f953..bf50439e 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
@@ -126,6 +126,7 @@ CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
@@ -425,7 +426,7 @@ CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
index 3ec6e5c0..188ef1fd 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
@@ -124,6 +124,7 @@ CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
@@ -421,7 +422,7 @@ CONFIG_FIRMWARE_CONNECTION_MANAGER=y
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set

From 1153bc3b6c607c5c941f362c8cd56c4967c02134 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 21 Dec 2023 15:52:03 +0000
Subject: [PATCH 0107/1549] mrc.sh: don't run the shellball. use unzip.

the shellball (for extracting the coreboot rom, to get
at mrc.bin) contains lines that are not posix-friendly.

specifically, the "local" command is used, and this is
not defined for posix sh.

the shellball is essentially just a bunch of shell
functions that compress/decompress the zip file,
containing the firmware update. you can modify the
files and re-run the shellball to recompress, though
lbmk just uses the decompress function.

as pointed out by Nicholas Chin, it is possible to just
run "unzip" directly on the update, to get at bios.bin.

we don't really need all the extra checks performed by
the shellball, so let's just bypass it altogether.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/mrc.sh | 17 ++---------------
 1 file changed, 2 insertions(+), 15 deletions(-)

diff --git a/include/mrc.sh b/include/mrc.sh
index 929aed7a..d4c94e5d 100755
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -22,7 +22,7 @@ extract_mrc()
 	extract_coreboot
 	) || err "mrc download/extract failure"
 
-	"${cbfstool}" "${appdir}/"coreboot-*.bin extract -n mrc.bin \
+	"${cbfstool}" "${appdir}/"bios.bin extract -n mrc.bin \
 	    -f "${_dest}" -r RO_SECTION || err "extract_mrc: cbfstool ${_dest}"
 }
 
@@ -59,18 +59,5 @@ extract_coreboot()
 	printf "Extracting coreboot image\n"
 	[ -f "${SHELLBALL}" ] || \
 	    err "extract_coreboot: shellball missing in google cros image"
-	sh "${SHELLBALL}" --unpack "${_unpacked}" || err "shellball, ${SHELLBALL}"
-
-	# TODO: audit the f* out of that shellball, for each mrc version.
-	# it has to be updated for each mrc update. we should ideally
-	# implement the functionality ourselves.
-
-	[ -f "${_unpacked}/VERSION" ] || \
-	    err "extract_coreboot: VERSION file missing on google coreboot rom"
-
-	_version=$( cat "${_unpacked}/VERSION" | grep BIOS\ version: | \
-	    cut -f2 -d: | tr -d \  )
-
-	cp "${_unpacked}/bios.bin" "coreboot-${_version}.bin" || \
-	    err "!cp unpacked, ${_unpacked}/bios.bin, coreboot-${_version}.rom"
+	x_ unzip "${SHELLBALL}"
 }

From 493ebdfb74a7b0f4a5b23b4bdf80936247a67a47 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 21 Dec 2023 16:16:11 +0000
Subject: [PATCH 0108/1549] mrc.sh: remove redundant extraction logic

the extract_archive function already provides use
of unzip, and works just fine (for mrc.bin extraction)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/mrc.sh | 12 +-----------
 1 file changed, 1 insertion(+), 11 deletions(-)

diff --git a/include/mrc.sh b/include/mrc.sh
index d4c94e5d..9cb64e69 100755
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -19,7 +19,7 @@ extract_mrc()
 	x_ cd "${appdir}"
 	extract_partition
 	extract_shellball
-	extract_coreboot
+	extract_archive "${SHELLBALL}" .
 	) || err "mrc download/extract failure"
 
 	"${cbfstool}" "${appdir}/"bios.bin extract -n mrc.bin \
@@ -51,13 +51,3 @@ extract_shellball()
 	printf "cd /usr/sbin\ndump chromeos-firmwareupdate ${SHELLBALL}\nquit" \
 	    | debugfs "${ROOTFS}" || err "extract_shellball: debugfs"
 }
-
-extract_coreboot()
-{
-	_unpacked=$( mktemp -d )
-
-	printf "Extracting coreboot image\n"
-	[ -f "${SHELLBALL}" ] || \
-	    err "extract_coreboot: shellball missing in google cros image"
-	x_ unzip "${SHELLBALL}"
-}

From 92986f0c421447f74f18ee061a689950af599e86 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 21 Dec 2023 19:03:49 +0000
Subject: [PATCH 0109/1549] build/roms: remove modify_coreboot_rom()

don't handle "romtype" at all, in board target.cfg files

add /dev/null as pike2008 rom on amd boards. this serves
the same purpose, adding them as empty vga roms, to add
an empty rom in cbfs. pike2008 cards cause seabios to hang,
when their oproms are executed, so we insert a fake rom

on i945 thinkpads, use the coreboot config option:
CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK

when set, this enables the same bootblock copy, for use
with bucts. these two cases, namely pike2008 roms and
i945 bootblock copies, no longer need to be handled in code

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/d510mo/target.cfg             |  1 -
 config/coreboot/d510mo_16mb/target.cfg        |  1 -
 config/coreboot/d945gclf_512kb/target.cfg     |  1 -
 config/coreboot/d945gclf_8mb/target.cfg       |  1 -
 config/coreboot/default/target.cfg            |  1 -
 config/coreboot/dell/target.cfg               |  1 -
 config/coreboot/e6400_4mb/target.cfg          |  1 -
 config/coreboot/e6430_12mb/target.cfg         |  1 -
 config/coreboot/e6530_12mb/target.cfg         |  1 -
 config/coreboot/fam15h_rdimm/target.cfg       |  1 -
 config/coreboot/fam15h_udimm/target.cfg       |  1 -
 config/coreboot/g43t-am3/target.cfg           |  1 -
 config/coreboot/g43t-am3_16mb/target.cfg      |  1 -
 config/coreboot/ga-g41m-es2l/target.cfg       |  1 -
 config/coreboot/gru_bob/target.cfg            |  1 -
 config/coreboot/gru_kevin/target.cfg          |  1 -
 config/coreboot/haswell/target.cfg            |  1 -
 config/coreboot/hp2170p_16mb/target.cfg       |  1 -
 config/coreboot/hp2560p_8mb/target.cfg        |  1 -
 config/coreboot/hp2570p_16mb/target.cfg       |  1 -
 config/coreboot/hp8200sff_4mb/target.cfg      |  1 -
 config/coreboot/hp8200sff_8mb/target.cfg      |  1 -
 config/coreboot/hp8300usdt_16mb/target.cfg    |  1 -
 config/coreboot/hp8460pintel_8mb/target.cfg   |  1 -
 config/coreboot/hp8470pintel_16mb/target.cfg  |  1 -
 config/coreboot/hp9470m_16mb/target.cfg       |  1 -
 .../config/libgfxinit_txtmode                 |  7 ++++-
 config/coreboot/kcma-d8-rdimm_16mb/target.cfg |  1 -
 .../config/libgfxinit_txtmode                 |  7 ++++-
 config/coreboot/kcma-d8-rdimm_2mb/target.cfg  |  1 -
 .../config/libgfxinit_txtmode                 |  7 ++++-
 config/coreboot/kcma-d8-udimm_16mb/target.cfg |  1 -
 .../config/libgfxinit_txtmode                 |  7 ++++-
 config/coreboot/kcma-d8-udimm_2mb/target.cfg  |  1 -
 config/coreboot/kfsn4-dre_1mb/target.cfg      |  1 -
 config/coreboot/kfsn4-dre_2mb/target.cfg      |  1 -
 .../config/libgfxinit_txtmode                 |  8 ++++--
 .../coreboot/kgpe-d16-rdimm_16mb/target.cfg   |  1 -
 .../config/libgfxinit_txtmode                 |  8 ++++--
 config/coreboot/kgpe-d16-rdimm_2mb/target.cfg |  1 -
 .../config/libgfxinit_txtmode                 |  8 ++++--
 .../coreboot/kgpe-d16-udimm_16mb/target.cfg   |  1 -
 .../config/libgfxinit_txtmode                 |  8 ++++--
 config/coreboot/kgpe-d16-udimm_2mb/target.cfg |  1 -
 config/coreboot/macbook11/target.cfg          |  1 -
 config/coreboot/macbook11_16mb/target.cfg     |  1 -
 config/coreboot/macbook21/target.cfg          |  1 -
 config/coreboot/macbook21_16mb/target.cfg     |  1 -
 config/coreboot/qemu_arm64_12mb/target.cfg    |  1 -
 config/coreboot/qemu_x86_12mb/target.cfg      |  1 -
 config/coreboot/r400_16mb/target.cfg          |  1 -
 config/coreboot/r400_4mb/target.cfg           |  1 -
 config/coreboot/r400_8mb/target.cfg           |  1 -
 config/coreboot/r500_4mb/target.cfg           |  1 -
 config/coreboot/t1650_12mb/target.cfg         |  1 -
 config/coreboot/t400_16mb/target.cfg          |  1 -
 config/coreboot/t400_4mb/target.cfg           |  1 -
 config/coreboot/t400_8mb/target.cfg           |  1 -
 config/coreboot/t420_8mb/target.cfg           |  1 -
 config/coreboot/t420s_8mb/target.cfg          |  1 -
 config/coreboot/t430_12mb/target.cfg          |  1 -
 config/coreboot/t440plibremrc_12mb/target.cfg |  1 -
 config/coreboot/t440pmrc_12mb/target.cfg      |  1 -
 config/coreboot/t500_16mb/target.cfg          |  1 -
 config/coreboot/t500_4mb/target.cfg           |  1 -
 config/coreboot/t500_8mb/target.cfg           |  1 -
 config/coreboot/t520_8mb/target.cfg           |  1 -
 config/coreboot/t530_12mb/target.cfg          |  1 -
 .../config/libgfxinit_corebootfb              |  2 +-
 .../config/libgfxinit_txtmode                 |  2 +-
 config/coreboot/t60_16mb_intelgpu/target.cfg  |  1 -
 .../t60_intelgpu/config/libgfxinit_corebootfb |  2 +-
 .../t60_intelgpu/config/libgfxinit_txtmode    |  2 +-
 config/coreboot/t60_intelgpu/target.cfg       |  1 -
 config/coreboot/w500_16mb/target.cfg          |  1 -
 config/coreboot/w500_4mb/target.cfg           |  1 -
 config/coreboot/w500_8mb/target.cfg           |  1 -
 config/coreboot/w530_12mb/target.cfg          |  1 -
 config/coreboot/w541_12mb/target.cfg          |  1 -
 config/coreboot/w541mrc_12mb/target.cfg       |  1 -
 config/coreboot/x200_16mb/target.cfg          |  1 -
 config/coreboot/x200_4mb/target.cfg           |  1 -
 config/coreboot/x200_8mb/target.cfg           |  1 -
 config/coreboot/x201_8mb/target.cfg           |  1 -
 config/coreboot/x220_8mb/target.cfg           |  1 -
 config/coreboot/x220edp_8mb/target.cfg        |  1 -
 config/coreboot/x230_12mb/target.cfg          |  1 -
 config/coreboot/x230_16mb/target.cfg          |  1 -
 config/coreboot/x230edp_12mb/target.cfg       |  1 -
 config/coreboot/x230t_12mb/target.cfg         |  1 -
 config/coreboot/x230t_16mb/target.cfg         |  1 -
 config/coreboot/x301_16mb/target.cfg          |  1 -
 config/coreboot/x301_4mb/target.cfg           |  1 -
 config/coreboot/x301_8mb/target.cfg           |  1 -
 .../coreboot/x60/config/libgfxinit_corebootfb |  2 +-
 config/coreboot/x60/config/libgfxinit_txtmode |  2 +-
 config/coreboot/x60/target.cfg                |  1 -
 .../x60_16mb/config/libgfxinit_corebootfb     |  2 +-
 .../x60_16mb/config/libgfxinit_txtmode        |  2 +-
 config/coreboot/x60_16mb/target.cfg           |  1 -
 script/build/roms                             | 28 -------------------
 script/update/trees                           |  3 +-
 script/vendor/download                        |  1 +
 103 files changed, 58 insertions(+), 134 deletions(-)

diff --git a/config/coreboot/d510mo/target.cfg b/config/coreboot/d510mo/target.cfg
index 2b1d1a7c..ca09f0b9 100644
--- a/config/coreboot/d510mo/target.cfg
+++ b/config/coreboot/d510mo/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
diff --git a/config/coreboot/d510mo_16mb/target.cfg b/config/coreboot/d510mo_16mb/target.cfg
index 8b1e41ba..38e21a33 100644
--- a/config/coreboot/d510mo_16mb/target.cfg
+++ b/config/coreboot/d510mo_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
diff --git a/config/coreboot/d945gclf_512kb/target.cfg b/config/coreboot/d945gclf_512kb/target.cfg
index 153cd806..8e8e0428 100644
--- a/config/coreboot/d945gclf_512kb/target.cfg
+++ b/config/coreboot/d945gclf_512kb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
diff --git a/config/coreboot/d945gclf_8mb/target.cfg b/config/coreboot/d945gclf_8mb/target.cfg
index 153cd806..8e8e0428 100644
--- a/config/coreboot/d945gclf_8mb/target.cfg
+++ b/config/coreboot/d945gclf_8mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
diff --git a/config/coreboot/default/target.cfg b/config/coreboot/default/target.cfg
index 23f93b09..19672664 100644
--- a/config/coreboot/default/target.cfg
+++ b/config/coreboot/default/target.cfg
@@ -1,4 +1,3 @@
 tree="default"
-romtype="normal"
 rev="d862695f5f432b5c78dada5f16c293a4c3f9fce6"
 arch="i386-elf"
diff --git a/config/coreboot/dell/target.cfg b/config/coreboot/dell/target.cfg
index 19bd68be..eecaecfd 100644
--- a/config/coreboot/dell/target.cfg
+++ b/config/coreboot/dell/target.cfg
@@ -1,4 +1,3 @@
 tree="dell"
-romtype="normal"
 rev="d862695f5f432b5c78dada5f16c293a4c3f9fce6"
 arch="i386-elf"
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index 2a95482c..a8f122bd 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -1,5 +1,4 @@
 tree="dell"
-romtype="4MiB ICH9 IFD NOR flash"
 arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index 4feb9909..4f3dc92a 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index 4feb9909..4f3dc92a 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
diff --git a/config/coreboot/fam15h_rdimm/target.cfg b/config/coreboot/fam15h_rdimm/target.cfg
index 8d1f6a14..60827616 100644
--- a/config/coreboot/fam15h_rdimm/target.cfg
+++ b/config/coreboot/fam15h_rdimm/target.cfg
@@ -1,5 +1,4 @@
 tree="fam15h_rdimm"
-romtype="normal"
 rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
 arch="i386-elf"
 payload_grub="n"
diff --git a/config/coreboot/fam15h_udimm/target.cfg b/config/coreboot/fam15h_udimm/target.cfg
index 0e451af6..80565e90 100644
--- a/config/coreboot/fam15h_udimm/target.cfg
+++ b/config/coreboot/fam15h_udimm/target.cfg
@@ -1,5 +1,4 @@
 tree="fam15h_udimm"
-romtype="normal"
 rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
 arch="i386-elf"
 payload_grub="n"
diff --git a/config/coreboot/g43t-am3/target.cfg b/config/coreboot/g43t-am3/target.cfg
index 0308cf27..1aa5ccc8 100644
--- a/config/coreboot/g43t-am3/target.cfg
+++ b/config/coreboot/g43t-am3/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
diff --git a/config/coreboot/g43t-am3_16mb/target.cfg b/config/coreboot/g43t-am3_16mb/target.cfg
index 0308cf27..1aa5ccc8 100644
--- a/config/coreboot/g43t-am3_16mb/target.cfg
+++ b/config/coreboot/g43t-am3_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
diff --git a/config/coreboot/ga-g41m-es2l/target.cfg b/config/coreboot/ga-g41m-es2l/target.cfg
index 350c39d2..3672e404 100644
--- a/config/coreboot/ga-g41m-es2l/target.cfg
+++ b/config/coreboot/ga-g41m-es2l/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
diff --git a/config/coreboot/gru_bob/target.cfg b/config/coreboot/gru_bob/target.cfg
index 10e1e969..2b7b0387 100644
--- a/config/coreboot/gru_bob/target.cfg
+++ b/config/coreboot/gru_bob/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="aarch64-elf"
 payload_uboot="y"
 vendorfiles="n"
diff --git a/config/coreboot/gru_kevin/target.cfg b/config/coreboot/gru_kevin/target.cfg
index 10e1e969..2b7b0387 100644
--- a/config/coreboot/gru_kevin/target.cfg
+++ b/config/coreboot/gru_kevin/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="aarch64-elf"
 payload_uboot="y"
 vendorfiles="n"
diff --git a/config/coreboot/haswell/target.cfg b/config/coreboot/haswell/target.cfg
index e9659265..08d2c6e2 100644
--- a/config/coreboot/haswell/target.cfg
+++ b/config/coreboot/haswell/target.cfg
@@ -1,4 +1,3 @@
 tree="haswell"
-romtype="normal"
 rev="1411ecf6f0b2c7395bcb96b856dcfdddb1b0c81b"
 arch="i386-elf"
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index bcdf9466..fdbb4f51 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index bcdf9466..fdbb4f51 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index bcdf9466..fdbb4f51 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 63112911..6433b508 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 63112911..6433b508 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index 63112911..6433b508 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index bcdf9466..fdbb4f51 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index bcdf9466..fdbb4f51 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index bcdf9466..fdbb4f51 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode
index a7fe5603..a501619d 100644
--- a/config/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode
@@ -97,10 +97,12 @@ CONFIG_MAX_PHYSICAL_CPUS=2
 CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
 CONFIG_HT_CHAIN_UNITID_BASE=0x0
 CONFIG_IRQ_SLOT_COUNT=13
+CONFIG_VGA_BIOS_ID="1000,0072"
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_DIMM_SPD_SIZE=256
-# CONFIG_VGA_BIOS is not set
+CONFIG_VGA_BIOS=y
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_VGA_BIOS_FILE="/dev/null"
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
 CONFIG_DEVICETREE="devicetree.cb"
@@ -431,6 +433,9 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 # CONFIG_AZALIA_PLUGIN_SUPPORT is not set
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_VGA_BIOS_DGPU=y
+CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
+CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
 # CONFIG_SOFTWARE_I2C is not set
 
 #
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
index a71ab92b..7c913bdc 100644
--- a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="fam15h_rdimm"
-romtype="d8d16sas"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode
index 972b5096..fc3074e3 100644
--- a/config/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode
@@ -97,10 +97,12 @@ CONFIG_MAX_PHYSICAL_CPUS=2
 CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
 CONFIG_HT_CHAIN_UNITID_BASE=0x0
 CONFIG_IRQ_SLOT_COUNT=13
+CONFIG_VGA_BIOS_ID="1000,0072"
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_DIMM_SPD_SIZE=256
-# CONFIG_VGA_BIOS is not set
+CONFIG_VGA_BIOS=y
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_VGA_BIOS_FILE="/dev/null"
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
 CONFIG_DEVICETREE="devicetree.cb"
@@ -431,6 +433,9 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 # CONFIG_AZALIA_PLUGIN_SUPPORT is not set
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_VGA_BIOS_DGPU=y
+CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
+CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
 # CONFIG_SOFTWARE_I2C is not set
 
 #
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
index a71ab92b..7c913bdc 100644
--- a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
@@ -1,5 +1,4 @@
 tree="fam15h_rdimm"
-romtype="d8d16sas"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode
index a7fe5603..a501619d 100644
--- a/config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode
@@ -97,10 +97,12 @@ CONFIG_MAX_PHYSICAL_CPUS=2
 CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
 CONFIG_HT_CHAIN_UNITID_BASE=0x0
 CONFIG_IRQ_SLOT_COUNT=13
+CONFIG_VGA_BIOS_ID="1000,0072"
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_DIMM_SPD_SIZE=256
-# CONFIG_VGA_BIOS is not set
+CONFIG_VGA_BIOS=y
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_VGA_BIOS_FILE="/dev/null"
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
 CONFIG_DEVICETREE="devicetree.cb"
@@ -431,6 +433,9 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 # CONFIG_AZALIA_PLUGIN_SUPPORT is not set
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_VGA_BIOS_DGPU=y
+CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
+CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
 # CONFIG_SOFTWARE_I2C is not set
 
 #
diff --git a/config/coreboot/kcma-d8-udimm_16mb/target.cfg b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
index 3f1f7c3e..1bb78ad5 100644
--- a/config/coreboot/kcma-d8-udimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="fam15h_udimm"
-romtype="d8d16sas"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode
index 972b5096..fc3074e3 100644
--- a/config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode
@@ -97,10 +97,12 @@ CONFIG_MAX_PHYSICAL_CPUS=2
 CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
 CONFIG_HT_CHAIN_UNITID_BASE=0x0
 CONFIG_IRQ_SLOT_COUNT=13
+CONFIG_VGA_BIOS_ID="1000,0072"
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_DIMM_SPD_SIZE=256
-# CONFIG_VGA_BIOS is not set
+CONFIG_VGA_BIOS=y
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_VGA_BIOS_FILE="/dev/null"
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
 CONFIG_DEVICETREE="devicetree.cb"
@@ -431,6 +433,9 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 # CONFIG_AZALIA_PLUGIN_SUPPORT is not set
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_VGA_BIOS_DGPU=y
+CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
+CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
 # CONFIG_SOFTWARE_I2C is not set
 
 #
diff --git a/config/coreboot/kcma-d8-udimm_2mb/target.cfg b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
index 3f1f7c3e..1bb78ad5 100644
--- a/config/coreboot/kcma-d8-udimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
@@ -1,5 +1,4 @@
 tree="fam15h_udimm"
-romtype="d8d16sas"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/kfsn4-dre_1mb/target.cfg b/config/coreboot/kfsn4-dre_1mb/target.cfg
index c5cb67b1..41b63823 100644
--- a/config/coreboot/kfsn4-dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4-dre_1mb/target.cfg
@@ -1,5 +1,4 @@
 tree="fam15h_udimm"
-romtype="normal"
 arch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
diff --git a/config/coreboot/kfsn4-dre_2mb/target.cfg b/config/coreboot/kfsn4-dre_2mb/target.cfg
index debe16fd..64c45daa 100644
--- a/config/coreboot/kfsn4-dre_2mb/target.cfg
+++ b/config/coreboot/kfsn4-dre_2mb/target.cfg
@@ -1,5 +1,4 @@
 tree="fam15h_udimm"
-romtype="normal"
 arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode
index cd302027..088360b1 100644
--- a/config/coreboot/kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode
@@ -97,11 +97,12 @@ CONFIG_MAX_PHYSICAL_CPUS=4
 CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
 CONFIG_HT_CHAIN_UNITID_BASE=0x0
 CONFIG_IRQ_SLOT_COUNT=13
-CONFIG_VGA_BIOS_ID="1a03,2000"
+CONFIG_VGA_BIOS_ID="1000,0072"
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_DIMM_SPD_SIZE=256
-# CONFIG_VGA_BIOS is not set
+CONFIG_VGA_BIOS=y
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_VGA_BIOS_FILE="/dev/null"
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
 CONFIG_DEVICETREE="devicetree.cb"
@@ -435,6 +436,9 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 # CONFIG_AZALIA_PLUGIN_SUPPORT is not set
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_VGA_BIOS_DGPU=y
+CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
+CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
 # CONFIG_SOFTWARE_I2C is not set
 
 #
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
index 883d764f..d3ab97d1 100644
--- a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="fam15h_rdimm"
-romtype="d8d16sas"
 arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode
index 4ef96238..575501b3 100644
--- a/config/coreboot/kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode
@@ -97,11 +97,12 @@ CONFIG_MAX_PHYSICAL_CPUS=4
 CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
 CONFIG_HT_CHAIN_UNITID_BASE=0x0
 CONFIG_IRQ_SLOT_COUNT=13
-CONFIG_VGA_BIOS_ID="1a03,2000"
+CONFIG_VGA_BIOS_ID="1000,0072"
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_DIMM_SPD_SIZE=256
-# CONFIG_VGA_BIOS is not set
+CONFIG_VGA_BIOS=y
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_VGA_BIOS_FILE="/dev/null"
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
 CONFIG_DEVICETREE="devicetree.cb"
@@ -435,6 +436,9 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 # CONFIG_AZALIA_PLUGIN_SUPPORT is not set
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_VGA_BIOS_DGPU=y
+CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
+CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
 # CONFIG_SOFTWARE_I2C is not set
 
 #
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
index 883d764f..d3ab97d1 100644
--- a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
@@ -1,5 +1,4 @@
 tree="fam15h_rdimm"
-romtype="d8d16sas"
 arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode
index cd302027..088360b1 100644
--- a/config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode
@@ -97,11 +97,12 @@ CONFIG_MAX_PHYSICAL_CPUS=4
 CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
 CONFIG_HT_CHAIN_UNITID_BASE=0x0
 CONFIG_IRQ_SLOT_COUNT=13
-CONFIG_VGA_BIOS_ID="1a03,2000"
+CONFIG_VGA_BIOS_ID="1000,0072"
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_DIMM_SPD_SIZE=256
-# CONFIG_VGA_BIOS is not set
+CONFIG_VGA_BIOS=y
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_VGA_BIOS_FILE="/dev/null"
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
 CONFIG_DEVICETREE="devicetree.cb"
@@ -435,6 +436,9 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 # CONFIG_AZALIA_PLUGIN_SUPPORT is not set
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_VGA_BIOS_DGPU=y
+CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
+CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
 # CONFIG_SOFTWARE_I2C is not set
 
 #
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
index d767dd7e..64c45daa 100644
--- a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="fam15h_udimm"
-romtype="d8d16sas"
 arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode
index 4ef96238..575501b3 100644
--- a/config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode
@@ -97,11 +97,12 @@ CONFIG_MAX_PHYSICAL_CPUS=4
 CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
 CONFIG_HT_CHAIN_UNITID_BASE=0x0
 CONFIG_IRQ_SLOT_COUNT=13
-CONFIG_VGA_BIOS_ID="1a03,2000"
+CONFIG_VGA_BIOS_ID="1000,0072"
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_DIMM_SPD_SIZE=256
-# CONFIG_VGA_BIOS is not set
+CONFIG_VGA_BIOS=y
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_VGA_BIOS_FILE="/dev/null"
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
 CONFIG_DEVICETREE="devicetree.cb"
@@ -435,6 +436,9 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 # CONFIG_AZALIA_PLUGIN_SUPPORT is not set
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_VGA_BIOS_DGPU=y
+CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
+CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
 # CONFIG_SOFTWARE_I2C is not set
 
 #
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
index d767dd7e..64c45daa 100644
--- a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
@@ -1,5 +1,4 @@
 tree="fam15h_udimm"
-romtype="d8d16sas"
 arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index ea9074ea..c883642f 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="i945 laptop"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index ea9074ea..c883642f 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="i945 laptop"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index 49a676da..8d1bf5b8 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="i945 laptop"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index 49a676da..8d1bf5b8 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="i945 laptop"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/qemu_arm64_12mb/target.cfg b/config/coreboot/qemu_arm64_12mb/target.cfg
index 10e1e969..2b7b0387 100644
--- a/config/coreboot/qemu_arm64_12mb/target.cfg
+++ b/config/coreboot/qemu_arm64_12mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="aarch64-elf"
 payload_uboot="y"
 vendorfiles="n"
diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg
index a835bc4a..bc2c6f55 100644
--- a/config/coreboot/qemu_x86_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_12mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index ec12cd4f..e889d1ee 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index 0337af2c..981435d4 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index 0337af2c..981435d4 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index 0337af2c..981435d4 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index 4b46a5a4..33790c67 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -1,5 +1,4 @@
 tree="haswell"
-romtype="t440p"
 arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
diff --git a/config/coreboot/t440pmrc_12mb/target.cfg b/config/coreboot/t440pmrc_12mb/target.cfg
index aca758d4..981435d4 100644
--- a/config/coreboot/t440pmrc_12mb/target.cfg
+++ b/config/coreboot/t440pmrc_12mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="t440p"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index 0337af2c..981435d4 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index 0337af2c..981435d4 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
index 1cbfb098..111a87de 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
@@ -257,7 +257,7 @@ CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
-# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
+CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
index de378e16..49fae1a3 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
@@ -257,7 +257,7 @@ CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
-# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
+CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 3f803f95..0b6bb18c 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="i945 laptop"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
index 2786bbe6..dbbc9efe 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
@@ -257,7 +257,7 @@ CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
-# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
+CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
index 3a84be7a..28821550 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
@@ -257,7 +257,7 @@ CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
-# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
+CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 3f803f95..0b6bb18c 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="i945 laptop"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index 0337af2c..981435d4 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index 4b46a5a4..33790c67 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -1,5 +1,4 @@
 tree="haswell"
-romtype="t440p"
 arch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
diff --git a/config/coreboot/w541mrc_12mb/target.cfg b/config/coreboot/w541mrc_12mb/target.cfg
index aca758d4..981435d4 100644
--- a/config/coreboot/w541mrc_12mb/target.cfg
+++ b/config/coreboot/w541mrc_12mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="t440p"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x201_8mb/target.cfg b/config/coreboot/x201_8mb/target.cfg
index 0337af2c..981435d4 100644
--- a/config/coreboot/x201_8mb/target.cfg
+++ b/config/coreboot/x201_8mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index 0337af2c..981435d4 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x220edp_8mb/target.cfg b/config/coreboot/x220edp_8mb/target.cfg
index 0337af2c..981435d4 100644
--- a/config/coreboot/x220edp_8mb/target.cfg
+++ b/config/coreboot/x220edp_8mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg
index 0337af2c..981435d4 100644
--- a/config/coreboot/x230_12mb/target.cfg
+++ b/config/coreboot/x230_12mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index 0337af2c..981435d4 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x230edp_12mb/target.cfg b/config/coreboot/x230edp_12mb/target.cfg
index 0337af2c..981435d4 100644
--- a/config/coreboot/x230edp_12mb/target.cfg
+++ b/config/coreboot/x230edp_12mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg
index 0337af2c..981435d4 100644
--- a/config/coreboot/x230t_12mb/target.cfg
+++ b/config/coreboot/x230t_12mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index 0337af2c..981435d4 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index 4269b2a5..8d1bf5b8 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="normal"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x60/config/libgfxinit_corebootfb b/config/coreboot/x60/config/libgfxinit_corebootfb
index ba95fbfe..9f75a921 100644
--- a/config/coreboot/x60/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60/config/libgfxinit_corebootfb
@@ -258,7 +258,7 @@ CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
-# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
+CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
diff --git a/config/coreboot/x60/config/libgfxinit_txtmode b/config/coreboot/x60/config/libgfxinit_txtmode
index 02e5fad4..5a3a8a5c 100644
--- a/config/coreboot/x60/config/libgfxinit_txtmode
+++ b/config/coreboot/x60/config/libgfxinit_txtmode
@@ -258,7 +258,7 @@ CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
-# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
+CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 3f803f95..0b6bb18c 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="i945 laptop"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
index 7bab148e..79d79b20 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
@@ -258,7 +258,7 @@ CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
-# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
+CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_txtmode b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
index 8ac47191..51e74dc6 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
@@ -258,7 +258,7 @@ CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
-# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
+CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 3f803f95..0b6bb18c 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -1,5 +1,4 @@
 tree="default"
-romtype="i945 laptop"
 arch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/script/build/roms b/script/build/roms
index 229e295f..39808098 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -419,37 +419,9 @@ moverom() {
 	printf "Creating target image: %s\n" "${newrom}"
 
 	[ -d "${newrom%/*}" ] || x_ mkdir -p "${newrom%/*}/"
-
-	x_ modify_coreboot_rom
 	x_ cp "${rompath}" "${newrom}"
 }
 
-modify_coreboot_rom()
-{
-	tmpmvrom="$(mktemp -t rom.XXXXXXXXXX)"
-	x_ rm -f "${tmpmvrom}"
-
-	if [ "${romtype}" = "d8d16sas" ]; then
-		# pike2008 roms hang seabios. an empty rom will override
-		# the built-in one, thus disabling all execution of it
-		x_ touch "${tmpmvrom}"
-		for deviceID in "0072" "3050"; do
-			x_ "${cbfstool}" "${rompath}" add -f "${tmpmvrom}" \
-			    -n "pci1000,${deviceID}.rom" -t raw
-		done
-	elif [ "${romtype}" = "i945 laptop" ]; then
-		# for bucts-based installation method from factory bios
-               dd if="${rompath}" of="${tmpmvrom}" bs=1 \
-                   skip=$(($(stat -c %s "${rompath}") - 0x10000)) \
-                   count=64k || err "modrom 1, copy bootblock"
-               dd if="${tmpmvrom}" of="${rompath}" bs=1 \
-                   seek=$(($(stat -c %s "${rompath}") - 0x20000)) count=64k \
-                   conv=notrunc || err "modrom 2, insert new bootblock"
-               x_ rm -f "${tmpmvrom}"
-	fi
-	x_ rm -f "${tmpmvrom}"
-}
-
 usage()
 {
 	cat <<- EOF
diff --git a/script/update/trees b/script/update/trees
index f046b027..6e98b370 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -13,7 +13,7 @@ set -u -e
 export LOCALVERSION="-${projectname}-${version%%-*}"
 
 eval "$(setvars "" arch cfgsdir codedir config config_name crossgcc_ada mode \
-    elfdir listfile project romtype target target_dir targets tree _f target1)"
+    elfdir listfile project target target_dir targets tree _f target1)"
 
 main()
 {
@@ -133,7 +133,6 @@ handle_defconfig()
 
 handle_src_tree()
 {
-	romtype="normal"
 	target_dir="${cfgsdir}/${target}"
 
 	if [ "${mode}" = "fetch" ]; then
diff --git a/script/vendor/download b/script/vendor/download
index 9431c441..736d8cc5 100755
--- a/script/vendor/download
+++ b/script/vendor/download
@@ -94,6 +94,7 @@ fetch()
 	dl="${2}"
 	dl_bkup="${3}"
 	dlsum="${4}"
+	[ "${5}" = "/dev/null" ] && return 0
 	[ "${5# }" = "${5}" ] || err "fetch: space not allowed in _dest: '${5}'"
 	[ "${5#/}" = "${5}" ] || err "fetch: absolute path not allowed: '${5}'"
 	_dest="${5##*../}"

From f7fda791ff6467ad9f01b0558375080029a64e7a Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Thu, 21 Dec 2023 22:56:47 +0200
Subject: [PATCH 0110/1549] document hp laptop rom families

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 config/vendor/sources | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/config/vendor/sources b/config/vendor/sources
index 10545858..7787e38a 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -95,6 +95,9 @@
 	SCH5545EC_DL_hash 18261d0f7f27e9de3b0b5a25019b9a934ef1a61cd3f0140e34f38553695e91e671e227a8fa962774edceab5c7804d13ed9fe1c518c5643c7c8f15632f903a6c4
 }
 
+# 68SCF and 68SCE family ROM
+# for 8460p, 8460w, 6460b, 8560p, 6560b, 6360b
+# release notes: https://support.hp.com/soar-attachment/858/col37737-ob-206569-2-ob-206569-2_sp85528_releasedoc.html
 {hp8460pintel}{
 	DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
 	DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
@@ -105,6 +108,9 @@
 	EC_url_bkup https://web.archive.org/web/20211231004901/https://ftp.ext.hp.com/pub/softpaq/sp85501-86000/sp85528.exe
 }
 
+# 68ICE or 68ICF family ROM
+# for 8470p, 8470w, 6470b, 8570p, 6570b
+# release notes: https://support.hp.com/soar-attachment/1021/col43350-ob-229442-2-ob-229442-2_sp96091_releasedoc.html
 {hp8470pintel}{
 	DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
 	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe

From 584c66e9320862f3c0e153e1bab372b2e4293b6c Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Thu, 21 Dec 2023 23:04:21 +0200
Subject: [PATCH 0111/1549] rename hp elitebook ec fw after rom families

this affects 8460p and 8470p only, as the others' updates
aren't common across different boards

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb | 4 ++--
 config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode    | 4 ++--
 .../coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb   | 4 ++--
 config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode   | 4 ++--
 4 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
index bf50439e..bdc5c4f0 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
@@ -346,9 +346,9 @@ CONFIG_EC_HP_KBC1126=y
 CONFIG_KBC1126_FIRMWARE=y
 CONFIG_ECFW_PTR_ADDR=0xffffff00
 CONFIG_ECFW_PTR_SIZE=8
-CONFIG_KBC1126_FW1="../../../ec/hp8460p_6360b/ec.bin.fw1"
+CONFIG_KBC1126_FW1="../../../ec/hp_68sce_68scf/ec.bin.fw1"
 CONFIG_KBC1126_FW1_OFFSET=0xfffe8000
-CONFIG_KBC1126_FW2="../../../ec/hp8460p_6360b/ec.bin.fw2"
+CONFIG_KBC1126_FW2="../../../ec/hp_68sce_68scf/ec.bin.fw2"
 CONFIG_KBC1126_FW2_OFFSET=0xfffd0000
 
 #
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
index 188ef1fd..a62f42d8 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
@@ -344,9 +344,9 @@ CONFIG_EC_HP_KBC1126=y
 CONFIG_KBC1126_FIRMWARE=y
 CONFIG_ECFW_PTR_ADDR=0xffffff00
 CONFIG_ECFW_PTR_SIZE=8
-CONFIG_KBC1126_FW1="../../../ec/hp8460p_6360b/ec.bin.fw1"
+CONFIG_KBC1126_FW1="../../../ec/hp_68sce_68scf/ec.bin.fw1"
 CONFIG_KBC1126_FW1_OFFSET=0xfffe8000
-CONFIG_KBC1126_FW2="../../../ec/hp8460p_6360b/ec.bin.fw2"
+CONFIG_KBC1126_FW2="../../../ec/hp_68sce_68scf/ec.bin.fw2"
 CONFIG_KBC1126_FW2_OFFSET=0xfffd0000
 
 #
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
index 1cdc018b..2bbd2b13 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
@@ -348,9 +348,9 @@ CONFIG_EC_HP_KBC1126=y
 CONFIG_KBC1126_FIRMWARE=y
 CONFIG_ECFW_PTR_ADDR=0xffffff00
 CONFIG_ECFW_PTR_SIZE=8
-CONFIG_KBC1126_FW1="../../../ec/hp8470pintel/ec.bin.fw1"
+CONFIG_KBC1126_FW1="../../../ec/hp_68ice_68icf/ec.bin.fw1"
 CONFIG_KBC1126_FW1_OFFSET=0xfffe8000
-CONFIG_KBC1126_FW2="../../../ec/hp8470pintel/ec.bin.fw2"
+CONFIG_KBC1126_FW2="../../../ec/hp_68ice_68icf/ec.bin.fw2"
 CONFIG_KBC1126_FW2_OFFSET=0xfffd0000
 
 #
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
index 1821c118..938a1c01 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
@@ -346,9 +346,9 @@ CONFIG_EC_HP_KBC1126=y
 CONFIG_KBC1126_FIRMWARE=y
 CONFIG_ECFW_PTR_ADDR=0xffffff00
 CONFIG_ECFW_PTR_SIZE=8
-CONFIG_KBC1126_FW1="../../../ec/hp8470pintel/ec.bin.fw1"
+CONFIG_KBC1126_FW1="../../../ec/hp_68ice_68icf/ec.bin.fw1"
 CONFIG_KBC1126_FW1_OFFSET=0xfffe8000
-CONFIG_KBC1126_FW2="../../../ec/hp8470pintel/ec.bin.fw2"
+CONFIG_KBC1126_FW2="../../../ec/hp_68ice_68icf/ec.bin.fw2"
 CONFIG_KBC1126_FW2_OFFSET=0xfffd0000
 
 #

From 8a87572227f25d5f7bafcfcf01bc69da027b402b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 22 Dec 2023 06:34:14 +0000
Subject: [PATCH 0112/1549] mrc.sh: general code cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/mrc.sh | 28 ++++++++--------------------
 1 file changed, 8 insertions(+), 20 deletions(-)

diff --git a/include/mrc.sh b/include/mrc.sh
index 9cb64e69..11b1abb2 100755
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -4,7 +4,7 @@
 # Modifications in this version are Copyright 2021 and 2023 Leah Rowe.
 # Original copyright detailed in repo: https://review.coreboot.org/coreboot/
 
-eval "$(setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board ROOTFS SHELLBALL)"
+eval "$(setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL)"
 
 extract_mrc()
 {
@@ -12,13 +12,13 @@ extract_mrc()
 	[ -z "${CONFIG_MRC_FILE}" ] && \
 		err "extract_mrc $MRC_hash: CONFIG_MRC_FILE not set"
 
-	ROOTFS="root-a.ext2"
 	SHELLBALL="chromeos-firmwareupdate-${MRC_board}"
 
 	(
 	x_ cd "${appdir}"
-	extract_partition
-	extract_shellball
+	extract_partition "${MRC_url##*/}"
+	printf "cd /usr/sbin\ndump chromeos-firmwareupdate ${SHELLBALL}\nquit" \
+	    | debugfs "root-a.ext2" || err "extract_mrc: can't extract shellball"
 	extract_archive "${SHELLBALL}" .
 	) || err "mrc download/extract failure"
 
@@ -28,26 +28,14 @@ extract_mrc()
 
 extract_partition()
 {
-	NAME="ROOT-A"
-	FILE="${MRC_url##*/}"
-	FILE="${FILE%.zip}"
-	_bs=1024
-
 	printf "Extracting ROOT-A partition\n"
 	ROOTP=$( printf "unit\nB\nprint\nquit\n" | \
-	    parted "${FILE}" 2>/dev/null | grep "${NAME}" )
+	    parted "${1%.zip}" 2>/dev/null | grep "ROOT-A" )
 
 	START=$(( $( echo ${ROOTP} | cut -f2 -d\ | tr -d "B" ) ))
 	SIZE=$(( $( echo ${ROOTP} | cut -f4 -d\ | tr -d "B" ) ))
 
-	dd if="${FILE}" of="${ROOTFS}" bs=${_bs} \
-	    skip=$(( ${START} / ${_bs} )) count=$(( ${SIZE} / ${_bs} )) || \
-	    err "extract_partition, dd ${FILE}, ${ROOTFS}"
-}
-
-extract_shellball()
-{
-	printf "Extracting chromeos-firmwareupdate\n"
-	printf "cd /usr/sbin\ndump chromeos-firmwareupdate ${SHELLBALL}\nquit" \
-	    | debugfs "${ROOTFS}" || err "extract_shellball: debugfs"
+	dd if="${1%.zip}" of="root-a.ext2" bs=1024 \
+	    skip=$(( ${START} / 1024 )) count=$(( ${SIZE} / 1024 )) || \
+	    err "extract_partition, dd ${1%.zip}, root-a.ext2"
 }

From fa25414bab5ca9e487bd265f0709e90e41769c69 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 22 Dec 2023 08:36:23 +0000
Subject: [PATCH 0113/1549] mrc.sh: run debugfs from extract_partition

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/mrc.sh | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/include/mrc.sh b/include/mrc.sh
index 11b1abb2..5ac09792 100755
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -17,8 +17,6 @@ extract_mrc()
 	(
 	x_ cd "${appdir}"
 	extract_partition "${MRC_url##*/}"
-	printf "cd /usr/sbin\ndump chromeos-firmwareupdate ${SHELLBALL}\nquit" \
-	    | debugfs "root-a.ext2" || err "extract_mrc: can't extract shellball"
 	extract_archive "${SHELLBALL}" .
 	) || err "mrc download/extract failure"
 
@@ -38,4 +36,7 @@ extract_partition()
 	dd if="${1%.zip}" of="root-a.ext2" bs=1024 \
 	    skip=$(( ${START} / 1024 )) count=$(( ${SIZE} / 1024 )) || \
 	    err "extract_partition, dd ${1%.zip}, root-a.ext2"
+
+	printf "cd /usr/sbin\ndump chromeos-firmwareupdate ${SHELLBALL}\nquit" \
+	    | debugfs "root-a.ext2" || err "extract_mrc: can't extract shellball"
 }

From ab65ea4c99af4f5569496c58b604ada612a2469a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 22 Dec 2023 09:46:43 +0000
Subject: [PATCH 0114/1549] general code cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh         | 9 ++-------
 include/option.sh      | 6 ++++++
 script/build/roms      | 7 +++----
 script/update/release  | 5 ++---
 script/vendor/download | 3 +--
 script/vendor/inject   | 3 +--
 6 files changed, 15 insertions(+), 18 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index e361cb41..1d63f99c 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -58,10 +58,7 @@ prepare_new_tree()
 {
 	printf "Creating %s tree %s (%s)\n" "${project}" "${tree}" "${_target}"
 
-	rm -Rf "${tmp_git_dir%/*}" || \
-	    err "prepare_new_tree ${project}/${tree}: can't rm tmpclone"
-	mkdir "${tmp_git_dir%/*}" || \
-	    err "prepare_new_tree ${project}/${tree}: can't mkdir tmp"
+	remkdir "${tmp_git_dir%/*}"
 	cp -R "src/${project}/${project}" "${tmp_git_dir}" || \
 	    err "prepare_new_tree ${project}/${tree}: can't make tmpclone"
 	git_reset_rev "${tmp_git_dir}" "${rev}"
@@ -98,9 +95,7 @@ verify_config()
 
 clone_project()
 {
-	rm -Rf "${tmp_git_dir}" || err "clone_project: !rm -Rf ${tmp_git_dir}"
-	mkdir -p "${tmp_git_dir%/*}" || \
-	    err "clone_project: !mkdir -p ${tmp_git_dir%/*}"
+	remkdir "${tmp_git_dir%/}"
 
 	loc="${loc#src/}"
 	loc="src/${loc}"
diff --git a/include/option.sh b/include/option.sh
index a764bc33..44952d09 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -74,3 +74,9 @@ handle_coreboot_utils()
 		[ -z "${mode}" ] || x_ rm -Rf "cbutils/${1}"
 	done
 }
+
+remkdir()
+{
+	rm -Rf "${1}" || err "remkdir: !rm -Rf \"${1}\""
+	mkdir -p "${1}" || err "remkdir: !mkdir -p \"${1}\""
+}
diff --git a/script/build/roms b/script/build/roms
index 39808098..03dce95e 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -164,9 +164,8 @@ build_dependency_seabios()
 
 build_dependency_grub()
 {
-	[ "${payload_grub}" != "y" ] && \
-	    [ "${payload_seabios_withgrub}" != "y" ] && \
-	    [ "${payload_seabios_grubonly}" != "y" ] && return 0
+	[ "$payload_grub" != "y" ] && [ "$payload_seabios_withgrub" != "y" ] \
+	    && [ "${payload_seabios_grubonly}" != "y" ] && return 0
 
 	rebuild_grub="n"
 	[ -f "${grubelf}" ] || rebuild_grub="y"
@@ -418,7 +417,7 @@ moverom() {
 	[ "${vendorfiles}" = "n" ] && newrom="${newrom%.rom}_noblobs.rom"
 	printf "Creating target image: %s\n" "${newrom}"
 
-	[ -d "${newrom%/*}" ] || x_ mkdir -p "${newrom%/*}/"
+	x_ mkdir -p "${newrom%/*}"
 	x_ cp "${rompath}" "${newrom}"
 }
 
diff --git a/script/update/release b/script/update/release
index b762b89d..14878569 100755
--- a/script/update/release
+++ b/script/update/release
@@ -179,7 +179,7 @@ handle_rom_archive()
 	insert_version_files "${romdir}" || \
 	    err "mkrom_tarball ${romdir}: versionfile"
 
-	insert_copying_files "${romdir}" || err "!insert copy, handle 2, ${romdir}"
+	insert_copying_files "$romdir" || err "!insert copy, handle 2, $romdir"
 	mkrom_tarball
 }
 
@@ -233,8 +233,7 @@ strip_ucode()
 
 insert_copying_files()
 {
-	rm -Rf "${1}/licenses" || return 1
-	mkdir -p "${1}/licenses" || return 1
+	remkdir "${1}/licenses"
 	l="${1}/licenses"
 	# copy licenses to rom image archive, for completion
 	cp "src/grub/COPYING" "${l}/COPYING.grub" || return 1
diff --git a/script/vendor/download b/script/vendor/download
index 736d8cc5..7913b558 100755
--- a/script/vendor/download
+++ b/script/vendor/download
@@ -146,8 +146,7 @@ mkdirs()
 		return 1
 	fi
 	mkdir -p "${1%/*}" || err "mkdirs: !mkdir -p ${1%/*}"
-	x_ rm -Rf "${appdir}"
-	x_ mkdir -p "${appdir}/"
+	remkdir "${appdir}"
 	if [ "${is_rom}" = "y" ]; then
 		cp "${_dl}" "${appdir}" || \
 		    err "mkdirs copyrom ${_dl}: can't copy to appdir"
diff --git a/script/vendor/inject b/script/vendor/inject
index e740704a..7ae4fc02 100755
--- a/script/vendor/inject
+++ b/script/vendor/inject
@@ -114,8 +114,7 @@ inject_vendorfiles()
 patch_release_roms()
 {
 	_tmpdir="tmp/romdir"
-	x_ rm -Rf "${_tmpdir}"
-	x_ mkdir -p "${_tmpdir}"
+	remkdir "${_tmpdir}"
 	tar -xf "${archive}" -C "${_tmpdir}" || \
 	    err "patch_release_roms: !tar -xf \"${archive}\" -C \"${_tmpdir}\""
 

From 2f98ca6dabace3569a0ae2ee0a33d901af6547b6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 22 Dec 2023 10:50:17 +0000
Subject: [PATCH 0115/1549] build: simplified TMPDIR handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/build b/build
index 7a75a36a..551e9031 100755
--- a/build
+++ b/build
@@ -18,12 +18,7 @@ eval "$(setvars "" option aur_notice tmpdir)"
 tmpdir_was_set="y"
 set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"
 if [ "${tmpdir_was_set}" = "y" ]; then
-	tmpdir="${TMPDIR##*/}"
-	tmpdir="${TMPDIR%_*}"
-	if [ "${tmpdir}" = "lbmk" ]; then
-		tmpdir=""
-		tmpdir_was_set="n"
-	fi
+	[ "${TMPDIR%_*}" = "/tmp/lbmk" ] || tmpdir_was_set="n"
 fi
 if [ "${tmpdir_was_set}" = "n" ]; then
 	export TMPDIR="/tmp"
@@ -31,8 +26,8 @@ if [ "${tmpdir_was_set}" = "n" ]; then
 	export TMPDIR="${tmpdir}"
 else
 	export TMPDIR="${TMPDIR}"
+	tmpdir="${TMPDIR}"
 fi
-tmpdir="${TMPDIR}"
 
 linkpath="${0}"
 linkname="${linkpath##*/}"

From b111f4840a043a7337937c001e1f82b7af3302f2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 22 Dec 2023 11:29:36 +0000
Subject: [PATCH 0116/1549] build/serprog: general code cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/serprog | 30 ++++++++++++------------------
 1 file changed, 12 insertions(+), 18 deletions(-)

diff --git a/script/build/serprog b/script/build/serprog
index 74097dc5..c961161a 100755
--- a/script/build/serprog
+++ b/script/build/serprog
@@ -1,12 +1,13 @@
 #!/usr/bin/env sh
 # SPDX-License-Identifier: GPL-3.0-or-later
 # SPDX-FileCopyrightText: 2023 Riku Viitanen <riku.viitanen@protonmail.com>
+# SPDX-FileCopyrightText: 2023 Leah Rowe <leah@libreboot.org>
 
 set -u -e
 
 . "include/err.sh"
 
-eval "$(setvars "" platform pico_sdk_dir pico_src_dir stm32_src_dir boards_dir)"
+eval "$(setvars "" pico_sdk_dir pico_src_dir stm32_src_dir boards_dir)"
 
 pico_src_dir=src/pico-serprog
 pico_sdk_dir=src/pico-sdk
@@ -17,31 +18,24 @@ usage="usage: ./build firmware serprog <rp2040|stm32> [board]"
 main()
 {
 	[ -z "${1+x}" ] && err "${usage}"
+	[ "${1}" != "rp2040" ] && [ "${1}" != "stm32" ] && err "${usage}"
 	if [ "${1}" = "rp2040" ]; then
-		platform="rp2040"
 		boards_dir=${pico_sdk_dir}/src/boards/include/boards
-		[ -d "${pico_src_dir}/" ] || \
-			x_ ./update trees -f "pico-serprog"
+		[ -d "$pico_src_dir" ] || x_ ./update trees -f "pico-serprog"
 	elif [ "${1}" = "stm32" ]; then
-		platform="stm32"
 		boards_dir=${stm32_src_dir}/boards
-		[ -d "${stm32_src_dir}/" ] || \
-			x_ ./update trees -f "stm32-vserprog"
-	else
-		err "${usage}"
+		[ -d "$stm32_src_dir" ] || x_ ./update trees -f "stm32-vserprog"
 	fi
-	x_ mkdir -p "bin/serprog_${platform}"
+	x_ mkdir -p "bin/serprog_${1}"
 
-	if [ $# -gt 1 ] ; then
-		if [ "${2}" = "list" ]; then
-			print_boards ${boards_dir}
-			return 0
-		fi
-		build_${platform}_rom "${2}"
+	if [ $# -gt 1 ] && [ "${2}" = "list" ]; then
+		print_boards ${boards_dir}
+	elif [ $# -gt 1 ]; then
+		build_${1}_rom "${2}"
 	else
 		printf "Building all serprog targets\n"
-		list_boards "${boards_dir}" | while read board; do
-			build_${platform}_rom "${board}"
+		list_boards "${boards_dir}" | while read -r board; do
+			build_${1}_rom "${board}"
 		done
 	fi
 }

From b0e5fc9d9c8f648b2b98c48d126cf8e6e828ddd4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 22 Dec 2023 13:05:32 +0000
Subject: [PATCH 0117/1549] lbmk scripts: general code cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh         | 16 +++-------
 include/option.sh      |  3 +-
 script/build/roms      | 65 +++++++++++++++++---------------------
 script/update/trees    | 21 +++++-------
 script/vendor/download | 72 +++++++++++++++++-------------------------
 script/vendor/inject   | 17 ++++------
 6 files changed, 79 insertions(+), 115 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 1d63f99c..274b5f3f 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -120,32 +120,26 @@ clone_project()
 
 git_reset_rev()
 {
-	(
-	cd "${1}" || err "git_reset_rev: !cd ${1}"
-	git reset --hard ${2} || err "!git reset ${1} <- ${2}"
+	git -C "${1}" reset --hard ${2} || err "!git reset ${1} <- ${2}"
 	if [ "${project}" != "coreboot" ] && [ "${project}" != "u-boot" ] && \
-	    [ -f ".gitmodules" ]; then
-		git submodule update --init --checkout || \
+	    [ -f "${1}/.gitmodules" ]; then
+		git -C "${1}" submodule update --init --checkout || \
 		    err "git_reset_rev ${1}: can't download submodules"
 	fi
-	) || err "git reset fail"
 }
 
 git_am_patches()
 {
 	sdir="${1}" # assumed to be absolute path
 	patchdir="${2}" # ditto
-	(
-	cd "${sdir}" || err "git_am_patches: !cd ${sdir}"
 	for patch in "${patchdir}/"*; do
 		[ -L "${patch}" ] && continue
 		[ -f "${patch}" ] || continue
-		git am "${patch}" || patchfail="y"
+		git -C "${sdir}" am "${patch}" || patchfail="y"
 		[ "${patchfail}" != "y" ] && continue
-		git am --abort || err  "${sdir}: !git am --abort"
+		git -C "${sdir}" am --abort || err  "${sdir}: !git am --abort"
 		err  "!git am ${patch} -> ${sdir}"
 	done
-	) || err "PATCH FAILURE"
 	for patches in "${patchdir}/"*; do
 		[ -L "${patches}" ] && continue
 		[ ! -d "${patches}" ] && continue
diff --git a/include/option.sh b/include/option.sh
index 44952d09..c9845a03 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -58,9 +58,8 @@ EOF
 check_defconfig()
 {
 	for x in "${1}"/config/*; do
-		[ -f "${x}" ] && return 0
+		[ -f "${x}" ] && return 1
 	done
-	return 1
 }
 
 handle_coreboot_utils()
diff --git a/script/build/roms b/script/build/roms
index 03dce95e..2926f297 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -19,7 +19,7 @@ kmapdir="config/grub/keymap"
 
 # Disable all payloads by default.
 # target.cfg files have to specifically enable [a] payload(s)
-pv="payload_grub payload_grub_withseabios payload_seabios payload_memtest"
+pv="payload_grub payload_grub_withseabios payload_seabios payload_memtest t"
 pv="${pv} payload_seabios_withgrub payload_seabios_grubonly payload_uboot memtest_bin"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree arch"
 v="${v} grub_timeout ubdir vendorfiles board grub_scan_disk uboot_config"
@@ -63,7 +63,7 @@ main()
 
 	[ -z "${targets}" ] && err "No ROM images were compiled"
 	printf "\nROM images available in these directories:\n"
-	printf "%s^^ ROM images available in these directories.\n\n" "${targets}"
+	printf "%s^^ ROM images available in these directories.\n\n" "$targets"
 
 	printf "DO NOT flash ROM images from elf/ - please use bin/ instead.\n"
 }
@@ -77,29 +77,21 @@ check_target()
 	# Override the above defaults using target.cfg
 	. "${targetdir}/target.cfg"
 
-	[ -z "${grub_scan_disk}" ] && \
-		grub_scan_disk="both"
+	[ -z "${grub_scan_disk}" ] && grub_scan_disk="both"
 	[ "${grub_scan_disk}" != "both" ] && [ "${grub_scan_disk}" != "ata" ] \
 	    && [ "${grub_scan_disk}" != "ahci" ] && \
 		grub_scan_disk="both"
 
-	[ -z "${tree}" ] && \
-		err "Target '${board}' defines no tree. Skipping build."
-	[ -z "${arch}" ] && \
-		err "Target '${board}' defines no arch. Skipping build."
+	[ -z "$arch" ] && err "$board: arch not defined"
+	[ -z "$tree" ] && err "$board: tree not defined"
 
-	[ "${payload_memtest}" != "y" ] && \
-		payload_memtest="n"
-	[ "${payload_grub_withseabios}" = "y" ] && \
-		payload_grub="y"
+	[ "${payload_memtest}" != "y" ] && payload_memtest="n"
+	[ "${payload_grub_withseabios}" = "y" ] && payload_grub="y"
 	[ "${payload_grub_withseabios}" = "y" ] && \
 		eval "$(setvars "y" payload_seabios payload_seabios_withgrub)"
-	[ "${payload_seabios_withgrub}" = "y" ] && \
-		payload_seabios="y"
-	if [ "${payload_seabios_grubonly}" = "y" ]; then
-		payload_seabios="y"
-		payload_seabios_withgrub="y"
-	fi
+	[ "$payload_seabios_withgrub" = "y" ] && payload_seabios="y"
+	[ "$payload_seabios_grubonly" = "y" ] && payload_seabios="y"
+	[ "$payload_seabios_grubonly" = "y" ] && payload_seabios_withgrub="y"
 
 	# The reverse logic must not be applied. If SeaBIOS-with-GRUB works,
 	# that doesn't mean GRUB-withSeaBIOS will. For example, the board
@@ -220,13 +212,14 @@ build_roms()
 	cbcfg="${1}"
 	if [ ! -f "${cbcfg}" ]; then
 		printf "'%s' does not exist. Skipping build for %s %s %s\n" \
-		    "${cbcfg}" "${board}" "${displaymode}" "${initmode}" 1>&2
+		    "$cbcfg" "$board" "$displaymode" "$initmode" 1>&2
 		return 0
 	fi
 
 	x_ ./update trees -b coreboot ${board}
 
-	_cbrom="elf/coreboot_nopayload_DO_NOT_FLASH/${board}/${initmode}_${displaymode}"
+	_cbrom="elf/coreboot_nopayload_DO_NOT_FLASH"
+	_cbrom="${_cbrom}/${board}/${initmode}_${displaymode}"
 	[ "${initmode}" = "normal" ] && \
 		_cbrom="${_cbrom%"_${displaymode}"}"
 	_cbrom="${_cbrom}/coreboot.rom"
@@ -248,10 +241,9 @@ build_roms()
 build_seabios_roms()
 {
 	if [ "${payload_seabios_withgrub}" = "y" ]; then
-		tmprom=$(mktemp -t coreboot_rom.XXXXXXXXXX)
-		x_ cp "${cbrom}" "${tmprom}"
-		x_ build_grub_roms "${tmprom}" "seabios_withgrub"
-		x_ rm -f "${tmprom}"
+		t=$(mktemp -t coreboot_rom.XXXXXXXXXX)
+		x_ cp "${cbrom}" "${t}"
+		x_ build_grub_roms "${t}" "seabios_withgrub"
 	else
 		t=$(mkSeabiosRom "${cbrom}" "fallback/payload") || \
 		    err "build_seabios_roms: cannot build tmprom"
@@ -259,8 +251,8 @@ build_seabios_roms()
 		[ "${initmode}" = "normal" ] && newrom="${romdir}/seabios" \
 			&& newrom="${newrom}_${board}_${initmode}"
 		x_ moverom "${t}" "${newrom}.rom"
-		x_ rm -f "${t}"
 	fi
+	x_ rm -f "${t}"
 }
 
 # Make separate ROM images with GRUB payload, for each supported keymap
@@ -270,11 +262,11 @@ build_grub_roms()
 	payload1="${2}" # allow values: grub, seabios, seabios_withgrub
 
 	grub_cbfs="fallback/payload"
-	[ "${payload1}" = "grub" ] && [ "${payload_grub_withseabios}" = "y" ] \
-		&& x_ mv "$(mkSeabiosRom "${tmprom}" "seabios.elf")" "${tmprom}"
-	[ "${payload1}" != "grub" ] && [ "${payload_seabios_withgrub}" = "y" ] \
+	[ "$payload1" = "grub" ] && [ "$payload_grub_withseabios" = "y" ] \
+		&& x_ mv "$(mkSeabiosRom "$tmprom" "seabios.elf")" "$tmprom"
+	[ "$payload1" != "grub" ] && [ "$payload_seabios_withgrub" = "y" ] \
 		&& grub_cbfs="img/grub2" && \
-		x_ mv "$(mkSeabiosRom "${tmprom}" fallback/payload)" "${tmprom}"
+		x_ mv "$(mkSeabiosRom "$tmprom" fallback/payload)" "$tmprom"
 
 	# we only need insert grub.elf once, for each coreboot config:
 	x_ "${cbfstool}" "${tmprom}" add-payload -f "${grubelf}" \
@@ -285,14 +277,15 @@ build_grub_roms()
 	    [ "${displaymode}" = "corebootfb" ]; then
 		backgroundfile="config/grub/background/${grub_background}"
 		"${cbfstool}" "${tmprom}" add -f ${backgroundfile} \
-		    -n background.png -t raw || err "insert background, ${backgroundfile}"
+		    -n background.png -t raw || \
+		    err "insert background, ${backgroundfile}"
 	fi
 
 	tmpcfg=$(mktemp -t coreboot_rom.XXXXXXXXXX)
-	printf "set grub_scan_disk=\"%s\"\n" "${grub_scan_disk}" >"${tmpcfg}" \
-	    || err "set grub_scandisk, ${grub_scan_disk}, ${tmpcfg}"
+	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" >"$tmpcfg" \
+	    || err "set grub_scandisk, $grub_scan_disk, $tmpcfg"
 	[ "${grub_scan_disk}" = "both" ] || \
-	    x_ "${cbfstool}" "${tmprom}" add -f "${tmpcfg}" -n scan.cfg -t raw
+	    x_ "$cbfstool" "$tmprom" add -f "$tmpcfg" -n scan.cfg -t raw
 	printf "set timeout=%s\n" "${grub_timeout}" > "${tmpcfg}" || \
 	    err "set timeout, ${grub_timeout}, ${tmpcfg}"
 	[ -z "${grub_timeout}" ] || x_ "${cbfstool}" "${tmprom}" add \
@@ -332,7 +325,7 @@ mkGrubRom() {
 
 	tmprom=$(mktemp -t coreboot_rom.XXXXXXXXXX)
 	x_ cp "${_cbrom}" "${tmprom}"
-	x_ "${cbfstool}" "${tmprom}" add -f "${keymapcfg}" -n keymap.cfg -t raw
+	x_ "$cbfstool" "$tmprom" add -f "$keymapcfg" -n keymap.cfg -t raw
 
 	printf "%s\n" "${tmprom}"
 }
@@ -348,7 +341,7 @@ mkSeabiosRom() {
 	x_ cp "${_cbrom}" "${tmprom}"
 	x_ "${cbfstool}" "${tmprom}" add-payload -f "${_seabioself}" \
 	    -n "${_seabios_cbfs_path}" -c lzma
-	x_ "${cbfstool}" "${tmprom}" add-int -i 3000 -n etc/ps2-keyboard-spinup
+	x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
 
 	z="2"; [ "${initmode}" = "vgarom" ] && z="0"
 	x_ "${cbfstool}" "${tmprom}" add-int -i $z -n etc/pci-optionrom-exec
@@ -369,7 +362,7 @@ mkSeabiosGrubonlyRom()
 	tmpbootorder=$(mktemp -t coreboot_rom.XXXXXXXXXX)
 
 	# only load grub, by inserting a custom bootorder file
-	printf "/rom@img/grub2\n" > "${tmpbootorder}" || err "printf bootorder"
+	printf "/rom@img/grub2\n" > "$tmpbootorder" || err "printf bootorder"
 	x_ "${cbfstool}" "${_grubrom}" \
 	    add -f "${tmpbootorder}" -n bootorder -t raw
 	x_ rm -f "${tmpbootorder}"
diff --git a/script/update/trees b/script/update/trees
index 6e98b370..832f27c5 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -36,11 +36,9 @@ main()
 	[ -z "${_f}" ] && err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
 	[ -z "${project}" ] && err "project name not specified"
 
-	if [ -f "config/${project}/build.list" ]; then
-		build_targets $@
-	else
-		build_projects $@
-	fi
+	_cmd="build_projects"
+	[ -f "config/${project}/build.list" ] && _cmd="build_targets"
+	$_cmd $@
 }
 
 build_projects()
@@ -103,7 +101,7 @@ handle_targets()
 		x_ handle_defconfig
 	done
 
-	[ "${target1}" = "utils" ] && [ "${project}" = "coreboot" ] && return 0
+	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
 	[ -z "${mode}" ] || return 0
 	printf "Done! The files are stored under %s/\n\n" "${elfdir}"
 }
@@ -161,10 +159,7 @@ handle_src_tree()
 		x_ ./update trees -f "${project}" "${target}"
 	fi
 
-	[ "${target1}" = "utils" ] && [ "${project}" = "coreboot" ] && return 0
-	[ "$project" != "coreboot" ] && [ "$project" != "u-boot" ] && return 0
-
-	# u-boot and coreboot are both compiled with coreboot's crossgcc
+	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
 	[ -z "${mode}" ] || return 0
 	check_cross_compiler
 }
@@ -199,7 +194,7 @@ check_cross_compiler()
 
 check_config()
 {
-	[ ! -f "${config}" ] && \
+	[ -f "${config}" ] || \
 		err "check_config: ${project}/${target}: configs missing"
 
 	dest_dir="${elfdir}/${target}/${config_name}"
@@ -224,8 +219,8 @@ handle_makefile()
 	if [ -e "${codedir}/.git" ] && [ "${project}" = "u-boot" ] && \
 	    [ "${mode}" = "distclean" ]; then
 		x_ git -C "${codedir}" clean -fdx
-	elif [ "${mode}" = "oldconfig" ] || [ "${mode}" = "olddefconfig" ] || \
-	    [ "${mode}" = "menuconfig" ] || [ "${mode}" = "nconfig" ]; then
+	elif [ "$mode" = "oldconfig" ] || [ "$mode" = "olddefconfig" ] || \
+	    [ "$mode" = "menuconfig" ] || [ "$mode" = "nconfig" ]; then
 		x_ cp "${codedir}/.config" "${config}"
 	elif [ "${mode}" = "savedefconfig" ]; then
 		x_ cp "${codedir}/defconfig" "${config}"
diff --git a/script/vendor/download b/script/vendor/download
index 7913b558..b83ffb48 100755
--- a/script/vendor/download
+++ b/script/vendor/download
@@ -32,7 +32,7 @@ main()
 	boarddir="${cbcfgsdir}/${board}"
 	_b="${board%%_*mb}" # shorthand (avoid duplicating config per rom size)
 
-	check_defconfig "${boarddir}" || exit 0
+	check_defconfig "${boarddir}" && exit 0
 	detect_firmware && exit 0
 	scan_config "${_b}" "config/vendor" "err"
 
@@ -54,16 +54,13 @@ detect_firmware()
 
 build_dependencies()
 {
-	[ -d "${cbdir}" ] || \
-		x_ ./update trees -f coreboot ${cbdir##*/}
+	[ -d "${cbdir}" ] || x_ ./update trees -f coreboot ${cbdir##*/}
 	for d in uefitool biosutilities bios_extract; do
 		[ -d "src/${d}" ] && continue
 		x_ ./update trees -f "${d}"
 	done
-	[ -f "${uefiextract}" ] || \
-		x_ ./update trees -b uefitool
-	[ -f "${kbc1126_ec_dump}" ] || \
-		x_ make -C "${cbdir}/util/kbc1126"
+	[ -f "${uefiextract}" ] || x_ ./update trees -b uefitool
+	[ -f "${kbc1126_ec_dump}" ] || x_ make -C "${cbdir}/util/kbc1126"
 	[ -f "${cbfstool}" ] && [ -f "${ifdtool}" ] && return 0
 	x_ ./update trees -b coreboot utils default
 }
@@ -71,19 +68,17 @@ build_dependencies()
 download_vendorfiles()
 {
 	[ -z "${CONFIG_HAVE_ME_BIN}" ] || \
-		fetch "intel_me" "${DL_url}" "${DL_url_bkup}" "${DL_hash}" \
+		fetch intel_me "$DL_url" "$DL_url_bkup" "$DL_hash" \
 		    "${CONFIG_ME_BIN_PATH}"
 	[ -z "${CONFIG_INCLUDE_SMSC_SCH5545_EC_FW}" ] || \
-		fetch "sch5545ec" "${SCH5545EC_DL_url}" \
-		    "${SCH5545EC_DL_url_bkup}" "${SCH5545EC_DL_hash}" \
-		    "${CONFIG_SMSC_SCH5545_EC_FW_FILE}"
+		fetch sch5545ec "$SCH5545EC_DL_url" "$SCH5545EC_DL_url_bkup" \
+		    "$SCH5545EC_DL_hash" "$CONFIG_SMSC_SCH5545_EC_FW_FILE"
 	[ -z "${CONFIG_KBC1126_FIRMWARE}" ] || \
-		fetch "kbc1126ec" "${EC_url}" "${EC_url_bkup}" "${EC_hash}" \
+		fetch kbc1126ec "$EC_url" "$EC_url_bkup" "$EC_hash" \
 		    "${CONFIG_KBC1126_FW1}"
 	[ -z "${CONFIG_VGA_BIOS_FILE}" ] || \
-		fetch "e6400vga" "${E6400_VGA_DL_url}" \
-		    "${E6400_VGA_DL_url_bkup}" "${E6400_VGA_DL_hash}" \
-		    "${CONFIG_VGA_BIOS_FILE}"
+		fetch "e6400vga" "$E6400_VGA_DL_url" "$E6400_VGA_DL_url_bkup" \
+		    "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
 	[ -z "${CONFIG_HAVE_MRC}" ] && return 0
 	fetch "mrc" "$MRC_url" "$MRC_url_bkup" "$MRC_hash" "$CONFIG_MRC_FILE"
 }
@@ -95,30 +90,27 @@ fetch()
 	dl_bkup="${3}"
 	dlsum="${4}"
 	[ "${5}" = "/dev/null" ] && return 0
-	[ "${5# }" = "${5}" ] || err "fetch: space not allowed in _dest: '${5}'"
-	[ "${5#/}" = "${5}" ] || err "fetch: absolute path not allowed: '${5}'"
+	[ "${5# }" = "$5" ] || err "fetch: space not allowed in _dest: '$5'"
+	[ "${5#/}" = "$5" ] || err "fetch: absolute path not allowed: '$5'"
 	_dest="${5##*../}"
 	_dl="${vendir}/cache/${dlsum}"
-	dl_fail=""
+	eval "$(setvars "n" dl_fail is_rom)"
 
 	x_ mkdir -p "${_dl%/*}"
 
-	is_rom="n"
 	if [ "${dl}" = "rom" ] || [ "${dl_bkup}" = "rom" ]; then
-		dl_fail="n"
 		is_rom="y"
 	else
 		dl_fail="y"
-		vendor_checksum "${dlsum}" "${_dl}" && dl_fail="n"
+		vendor_checksum "${dlsum}" "${_dl}" || dl_fail="n"
 	fi
 	for url in "${dl}" "${dl_bkup}"; do
 		[ "${dl_fail}" = "n" ] && break
 		[ -z "${url}" ] && continue
 		x_ rm -f "${_dl}"
-		curl --location --retry 3 -A "${_ua}" "${url}" -o "${_dl}" || \
-		    wget --tries 3 -U "${_ua}" "${url}" -O "${_dl}" || \
-		    continue
-		vendor_checksum "${dlsum}" "${_dl}" && dl_fail="n"
+		curl --location --retry 3 -A "$_ua" "$url" -o "$_dl" || \
+		    wget --tries 3 -U "$_ua" "$url" -O "$_dl" || continue
+		vendor_checksum "${dlsum}" "${_dl}" || dl_fail="n"
 	done
 	[ "${dl_fail}" = "y" ] && \
 		err "fetch ${dlsum}: matched file unavailable"
@@ -133,16 +125,15 @@ fetch()
 
 vendor_checksum()
 {
-	[ "$(sha512sum "${2}" | awk '{print $1}')" != "${1}" ] || return 0 
-	printf "Bad checksum for file: %s\n" "${2}" 1>&2
-	rm -f "${2}" || :
-	return 1
+	[ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] || return 1
+	printf "Bad checksum for file: %s\n" "$2" 1>&2
+	rm -f "$2" || :
 }
 
 mkdirs()
 {
 	if [ -f "${1}" ]; then
-		printf "mkdirs %s %s: already downloaded\n" "${1}" "${2}" 1>&2
+		printf "mkdirs %s %s: already downloaded\n" "$1" "$2" 1>&2
 		return 1
 	fi
 	mkdir -p "${1%/*}" || err "mkdirs: !mkdir -p ${1%/*}"
@@ -161,8 +152,7 @@ extract_intel_me()
 {
 	_me="${PWD}/${_dest}" # must always be an absolute path
 	cdir="${PWD}/${appdir}" # must always be an absolute path
-	[ $# -gt 0 ] && _me="${1}"
-	[ $# -gt 0 ] && cdir="${2}"
+	[ $# -gt 0 ] && _me="${1}" && cdir="${2}"
 	[ -f "${_me}" ] && return 0
 
 	sdir="$(mktemp -d)"
@@ -196,9 +186,8 @@ extract_intel_me()
 
 extract_archive()
 {
-	innoextract "${1}" -d "${2}" || python "${pfs_extract}" "${1}" -e || \
-	    7z x "${1}" -o"${2}" || unar "${1}" -o "${2}" || \
-	    unzip "${1}" -d "${2}" || return 1
+	innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x "$1" \
+	    -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
 }
 
 extract_kbc1126ec()
@@ -227,12 +216,10 @@ extract_kbc1126ec()
 
 extract_e6400vga()
 {
-	[ -z "${E6400_VGA_offset}" ] && \
-		err "extract_e6400vga: E6400 VGA offset not defined"
-	[ -z "${E6400_VGA_romname}" ] && \
-		err "extract_e6400vga: E6400 VGA ROM name not defined"
-	tail -c +${E6400_VGA_offset} "${_dl}" | \
-	    gunzip >"${appdir}/bios.bin" || :
+	for v in E6400_VGA_offset E6400_VGA_romname; do
+		eval "[ -z \"\$$v\" ] && err \"extract_e6400vga: $v undefined\""
+	done
+	tail -c +$E6400_VGA_offset "$_dl" | gunzip > "$appdir/bios.bin" || :
 	(
 	x_ cd "${appdir}"
 	[ -f "bios.bin" ] || err "extract_e6400vga: can't extract bios.bin"
@@ -247,8 +234,7 @@ extract_e6400vga()
 extract_sch5545ec()
 {
 	# full system ROM (UEFI), to extract with UEFIExtract:
-	_bios="${_dl}_extracted/Firmware"
-	_bios="${_bios}/1 ${dlsum} -- 1 System BIOS vA.28.bin"
+	_bios="${_dl}_extracted/Firmware/1 ${dlsum} -- 1 System BIOS vA.28.bin"
 	# this is the SCH5545 firmware, inside of the extracted UEFI ROM:
 	_sch5545ec_fw="${_bios}.dump/4 7A9354D9-0468-444A-81CE-0BF617D890DF"
 	_sch5545ec_fw="${_sch5545ec_fw}/54 D386BEB8-4B54-4E69-94F5-06091F67E0D3"
diff --git a/script/vendor/inject b/script/vendor/inject
index 7ae4fc02..b4b74bb7 100755
--- a/script/vendor/inject
+++ b/script/vendor/inject
@@ -135,11 +135,9 @@ patch_release_roms()
 	x_ cd "${_tmpdir}/bin/"* # TODO: very dodgy, re-write accordingly
 
 	# NOTE: For compatibility with older rom releases, defer to sha1
-	[ "${nukemode}" = "nuke" ] || \
-	    sha512sum --status -c vendorhashes || \
-	    sha1sum --status -c vendorhashes || \
-	    sha512sum --status -c blobhashes || \
-	    sha1sum --status -c blobhashes || \
+	[ "${nukemode}" = "nuke" ] || sha512sum --status -c vendorhashes || \
+	    sha1sum --status -c vendorhashes || sha512sum --status -c \
+	    blobhashes || sha1sum --status -c blobhashes || \
 	    err "patch_release_roms: ROMs did not match expected hashes"
 	) || err "can't verify vendor hashes"
 
@@ -168,10 +166,10 @@ patch_rom()
 	# may sometimes insert certain vendor files at the wrong offset)
 	# (unless nomicrocode is the only config provided)
 	[ "${rom}" != "${rom%_nomicrocode.rom}.rom" ] && \
-	[ -f "${rom%_nomicrocode.rom}.rom" ] && \
-	[ "${release}" = "y" ] && return 0
+	    [ -f "${rom%_nomicrocode.rom}.rom" ] && \
+	    [ "${release}" = "y" ] && return 0
 
-	x_ check_defconfig "${boarddir}"
+	check_defconfig "$boarddir" && err "patch_rom $boarddir: no configs"
 
 	set -- "${boarddir}/config/"*
 	. "${1}" 2>/dev/null
@@ -185,8 +183,7 @@ patch_rom()
 		    "${CONFIG_KBC1126_FW1_OFFSET}" && \
 		inject "ecfw2.bin" "$CONFIG_KBC1126_FW2" "raw" \
 		    "${CONFIG_KBC1126_FW2_OFFSET}"
-	[ -n "${CONFIG_VGA_BIOS_FILE}" ] && \
-	    [ -n "${CONFIG_VGA_BIOS_ID}" ] && \
+	[ -n "$CONFIG_VGA_BIOS_FILE" ] && [ -n "$CONFIG_VGA_BIOS_ID" ] && \
 		inject "pci${CONFIG_VGA_BIOS_ID}.rom" \
 		    "${CONFIG_VGA_BIOS_FILE}" "optionrom"
 	[ "${CONFIG_INCLUDE_SMSC_SCH5545_EC_FW}" = "y" ] && \

From e8eb52f8d774054c975be61fd79781a2587a66fc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 23 Dec 2023 04:29:50 +0000
Subject: [PATCH 0118/1549] update/release: don't insert crossgcc tarballs

why are we distributing gcc at all?

the coreboot build system downloads it at build time,
and the GNU rsync mirrors aren't going anywhere.

simplify script/update/release by not handling gcc.
this means: release archives will no longer contain gcc.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/update/release | 37 +++----------------------------------
 1 file changed, 3 insertions(+), 34 deletions(-)

diff --git a/script/update/release b/script/update/release
index 14878569..1c018360 100755
--- a/script/update/release
+++ b/script/update/release
@@ -49,48 +49,17 @@ build_release()
 	cd "${srcdir}" || err "${_xm}: !cd \"${srcdir}\""
 	fetch_trees
 	x_ mv src/docs docs
-	) || err "can't copy docs"
+	) || err "can't create release files"
 	(
 	cd "${srcdir%/*}" || err "${_xm}: mktarball \"${srcdir}\""
 	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || err "${_xm}: mksrc"
-	) || err "can't create pre-crossgcc src tarball"
-	[ "${mode}" = "src" ] && return 0 # for src mode, xgcc tarballs are
-					  # not included in the src archive
-
-	# now build roms, then copy crossgcc to src and re-compress
-	# while compressing rom images too.
+	) || err "can't create src tarball"
+	[ "${mode}" = "src" ] && return 0
 
 	(
 	cd "${srcdir}" || err "${_xm}: 2 !cd \"${srcdir}\""
 	mkrom_images
 	) || err "can't build rom images"
-	for _cbd in "${srcdir}/src/coreboot/"*; do
-		[ -d "${_cbd}/util/crossgcc/tarballs" ] || continue
-		_xgccdir="${vdir}/crossgcc/${_cbd##*/}"
-		mkdir -p "${_xgccdir}" || \
-		    err "build_release: !mkdir -p ${_xgccdir}"
-		cp -R "${_cbd}/util/crossgcc/tarballs/"* "${_xgccdir}" || \
-		    err "build_gcc: !copy xgcc ${_cbd}"
-	done
-	rm -Rf "${srcdir}" || err "build_release: !rm -Rf ${srcdir}"
-	(
-	cd "${srcdir%/*}" || err "${_xm} 2: mktarball \"${srcdir}\""
-	tar -xf "${srcdir##*/}.tar.xz" || err "!extract ${srcdir##*/}.tar.xz"
-	rm -f "${srcdir##*/}.tar.xz" || err "!rm -f ${srcdir##*/}.tar.xz"
-	) || err "can't extract pre-crossgcc src tarball"
-	for _xgcc in "${vdir}/crossgcc/"*; do
-		[ -d "${_xgcc}" ] || continue
-		mkdir -p "${srcdir}/src/coreboot/${_xgcc##*/}/util/crossgcc/tarballs" || \
-		    err "!mkdir src/coreboot/${_xgcc##*/}/util/crossgcc/tarballs"
-		mv "${_xgcc}/"* \
-		    "${srcdir}/src/coreboot/${_xgcc##*/}/util/crossgcc/tarballs/" \
-		    || err "!move xgcc tarballs to ${srcdir}/xgcc/${_xgcc##*/}"
-	done
-	rm -Rf "${vdir}/crossgcc" || err "!rm -Rf \"${vdir}/crossgcc\""
-	(
-	cd "${srcdir%/*}" || err "${_xm}: mktarball \"${srcdir}\""
-	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || err "${_xm}: mksrc"
-	) || err "can't create src tarball with crossgcc"
 
 	# now test the vendor insert script, using the release archive:
 	(

From 72cd169ee5ddc435a7742d7a05be1f59756a3aae Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 23 Dec 2023 04:41:25 +0000
Subject: [PATCH 0119/1549] update/release: don't test ./vendor inject

the purpose of script/update/release is not to test the
build system, but to build release archives.

testing of lbmk is done during the course of development.

remove this bloat from the release script. we run the nuke
mode anyway, to scrub blobs from releases, which will more
or less test the logic in that script (the only difference
is that it runs e.g. ifdtool --nuke instead of -i).

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/update/release | 27 +++------------------------
 1 file changed, 3 insertions(+), 24 deletions(-)

diff --git a/script/update/release b/script/update/release
index 1c018360..b9128328 100755
--- a/script/update/release
+++ b/script/update/release
@@ -61,20 +61,6 @@ build_release()
 	mkrom_images
 	) || err "can't build rom images"
 
-	# now test the vendor insert script, using the release archive:
-	(
-	cd "${srcdir}" || err "!cd ${srcdir}"
-	mkfakeroms
-	for vrom in ../roms/*.tar.xz; do
-		[ -f "${vrom}" ] || continue
-		case "${vrom}" in
-		*serprog*) continue ;;
-		esac
-		./vendor inject "${vrom}" || \
-		    err "TESTFAIL: inject: ${vrom##*/}"
-	done
-	) || err "vendorfile inject test failure"
-
 	rm -Rf "${srcdir}" || err "!rm -Rf ${srcdir}"
 }
 
@@ -98,7 +84,9 @@ fetch_trees()
 
 mkrom_images()
 {
-	mkfakeroms
+	x_ mkdir -p "vendorfiles/x201/"
+	dd if=/dev/zero of="vendorfiles/x201/me.bin" \
+	    bs=68k count=1 || err "mkvdir: can't make fake x201 me.bin"
 
 	./build roms all || err "${_xm}: roms-all"
 	./build serprog rp2040 || err "${_xm}: rp2040"
@@ -112,15 +100,6 @@ mkrom_images()
 	mv "release/${version}/roms/" ../roms || err "${_xm}: copy roms/"
 }
 
-mkfakeroms()
-{
-	# fake me.bin to make x201 roms build
-	mkdir -p "vendorfiles/x201/" || \
-	    err "mkvdir: !mkdir -p \"vendorfiles/x201/\""
-	dd if=/dev/zero of="vendorfiles/x201/me.bin" \
-	    bs=68k count=1 || err "mkvdir: can't make fake x201 me.bin"
-}
-
 handle_rom_archive()
 {
 	builddir="${1}"

From f44b99c808ed834dceea1109c34a2f587bb46a06 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 23 Dec 2023 06:54:56 +0000
Subject: [PATCH 0120/1549] don't delete microcode updates in rom images

at present, lbmk can remove microcode updates on images for
a given target, if the target specifies
microcode_required="n" in target.cfg

lbmk then provides images with microcode, and images without,
in a given release. although the user can also remove them
manually, this just makes it a bit more convenient, for those
users who do wish to run without the updates. this functionality
is provided only on those platforms where no-microcode is tested.

well, this behaviour implements a compromise on libreboot policy,
which is to always include microcode updates by default. see:
Binary Blob Reduction Policy

the *canoeboot* project now exists, developed in parallel with
libreboot, and it ships without microcode updates, on the same
targets where lbmk also handled this.

running without microcode updates is foolish, and should not
be encouraged. clean up lbmk by not providing this kludge.

the libreboot documentation will be updated, telling such users
to try canoeboot instead, or to remove the update from a given
libreboot rom - this is still possible, and mitigations such as
PECI disablement on GM45 are still in place (and will be kept),
so that this continues to work well.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/d510mo/target.cfg             |  2 --
 config/coreboot/d510mo_16mb/target.cfg        |  2 --
 config/coreboot/d945gclf_512kb/target.cfg     |  2 --
 config/coreboot/d945gclf_8mb/target.cfg       |  2 --
 config/coreboot/e6400_4mb/target.cfg          |  1 -
 config/coreboot/e6430_12mb/target.cfg         |  1 -
 config/coreboot/e6530_12mb/target.cfg         |  1 -
 config/coreboot/g43t-am3/target.cfg           |  2 --
 config/coreboot/g43t-am3_16mb/target.cfg      |  2 --
 config/coreboot/ga-g41m-es2l/target.cfg       |  2 --
 config/coreboot/gru_bob/target.cfg            |  2 --
 config/coreboot/gru_kevin/target.cfg          |  2 --
 config/coreboot/kcma-d8-rdimm_16mb/target.cfg |  1 -
 config/coreboot/kcma-d8-rdimm_2mb/target.cfg  |  1 -
 config/coreboot/kcma-d8-udimm_16mb/target.cfg |  1 -
 config/coreboot/kcma-d8-udimm_2mb/target.cfg  |  1 -
 config/coreboot/kfsn4-dre_1mb/target.cfg      |  1 -
 config/coreboot/kfsn4-dre_2mb/target.cfg      |  1 -
 .../coreboot/kgpe-d16-rdimm_16mb/target.cfg   |  1 -
 config/coreboot/kgpe-d16-rdimm_2mb/target.cfg |  1 -
 .../coreboot/kgpe-d16-udimm_16mb/target.cfg   |  1 -
 config/coreboot/kgpe-d16-udimm_2mb/target.cfg |  1 -
 config/coreboot/macbook11/target.cfg          |  2 --
 config/coreboot/macbook11_16mb/target.cfg     |  2 --
 config/coreboot/macbook21/target.cfg          |  2 --
 config/coreboot/macbook21_16mb/target.cfg     |  2 --
 config/coreboot/qemu_arm64_12mb/target.cfg    |  2 --
 config/coreboot/qemu_x86_12mb/target.cfg      |  2 --
 config/coreboot/r400_16mb/target.cfg          |  2 --
 config/coreboot/r400_4mb/target.cfg           |  2 --
 config/coreboot/r400_8mb/target.cfg           |  2 --
 config/coreboot/r500_4mb/target.cfg           |  2 --
 config/coreboot/t400_16mb/target.cfg          |  2 --
 config/coreboot/t400_4mb/target.cfg           |  2 --
 config/coreboot/t400_8mb/target.cfg           |  2 --
 config/coreboot/t500_16mb/target.cfg          |  2 --
 config/coreboot/t500_4mb/target.cfg           |  2 --
 config/coreboot/t500_8mb/target.cfg           |  2 --
 config/coreboot/t60_16mb_intelgpu/target.cfg  |  2 --
 config/coreboot/t60_intelgpu/target.cfg       |  2 --
 config/coreboot/w500_16mb/target.cfg          |  2 --
 config/coreboot/w500_4mb/target.cfg           |  2 --
 config/coreboot/w500_8mb/target.cfg           |  2 --
 config/coreboot/x200_16mb/target.cfg          |  2 --
 config/coreboot/x200_4mb/target.cfg           |  2 --
 config/coreboot/x200_8mb/target.cfg           |  2 --
 config/coreboot/x301_16mb/target.cfg          |  2 --
 config/coreboot/x301_4mb/target.cfg           |  2 --
 config/coreboot/x301_8mb/target.cfg           |  2 --
 config/coreboot/x60/target.cfg                |  2 --
 config/coreboot/x60_16mb/target.cfg           |  2 --
 script/build/roms                             | 19 ++++--------
 script/update/release                         | 31 +------------------
 script/vendor/inject                          | 18 -----------
 54 files changed, 7 insertions(+), 150 deletions(-)

diff --git a/config/coreboot/d510mo/target.cfg b/config/coreboot/d510mo/target.cfg
index ca09f0b9..251cae5b 100644
--- a/config/coreboot/d510mo/target.cfg
+++ b/config/coreboot/d510mo/target.cfg
@@ -4,5 +4,3 @@ payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="y"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/d510mo_16mb/target.cfg b/config/coreboot/d510mo_16mb/target.cfg
index 38e21a33..3958f90b 100644
--- a/config/coreboot/d510mo_16mb/target.cfg
+++ b/config/coreboot/d510mo_16mb/target.cfg
@@ -3,5 +3,3 @@ arch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/d945gclf_512kb/target.cfg b/config/coreboot/d945gclf_512kb/target.cfg
index 8e8e0428..4c1ed0b6 100644
--- a/config/coreboot/d945gclf_512kb/target.cfg
+++ b/config/coreboot/d945gclf_512kb/target.cfg
@@ -4,5 +4,3 @@ payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="n"
-vendorfiles="n"
-microcode_required="n"
diff --git a/config/coreboot/d945gclf_8mb/target.cfg b/config/coreboot/d945gclf_8mb/target.cfg
index 8e8e0428..4c1ed0b6 100644
--- a/config/coreboot/d945gclf_8mb/target.cfg
+++ b/config/coreboot/d945gclf_8mb/target.cfg
@@ -4,5 +4,3 @@ payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="n"
-vendorfiles="n"
-microcode_required="n"
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index a8f122bd..46a3425e 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -7,4 +7,3 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-microcode_required="n"
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index 4f3dc92a..ddcf32d4 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -7,4 +7,3 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-microcode_required="n"
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index 4f3dc92a..ddcf32d4 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -7,4 +7,3 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-microcode_required="n"
diff --git a/config/coreboot/g43t-am3/target.cfg b/config/coreboot/g43t-am3/target.cfg
index 1aa5ccc8..db5a46d9 100644
--- a/config/coreboot/g43t-am3/target.cfg
+++ b/config/coreboot/g43t-am3/target.cfg
@@ -2,6 +2,4 @@ tree="default"
 arch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
-microcode_required="n"
-vendorfiles="n"
 grub_timeout=10
diff --git a/config/coreboot/g43t-am3_16mb/target.cfg b/config/coreboot/g43t-am3_16mb/target.cfg
index 1aa5ccc8..db5a46d9 100644
--- a/config/coreboot/g43t-am3_16mb/target.cfg
+++ b/config/coreboot/g43t-am3_16mb/target.cfg
@@ -2,6 +2,4 @@ tree="default"
 arch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
-microcode_required="n"
-vendorfiles="n"
 grub_timeout=10
diff --git a/config/coreboot/ga-g41m-es2l/target.cfg b/config/coreboot/ga-g41m-es2l/target.cfg
index 3672e404..755d23a9 100644
--- a/config/coreboot/ga-g41m-es2l/target.cfg
+++ b/config/coreboot/ga-g41m-es2l/target.cfg
@@ -3,6 +3,4 @@ arch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ata"
-microcode_required="n"
-vendorfiles="n"
 grub_timeout=10
diff --git a/config/coreboot/gru_bob/target.cfg b/config/coreboot/gru_bob/target.cfg
index 2b7b0387..10c4285c 100644
--- a/config/coreboot/gru_bob/target.cfg
+++ b/config/coreboot/gru_bob/target.cfg
@@ -1,5 +1,3 @@
 tree="default"
 arch="aarch64-elf"
 payload_uboot="y"
-vendorfiles="n"
-microcode_required="n"
diff --git a/config/coreboot/gru_kevin/target.cfg b/config/coreboot/gru_kevin/target.cfg
index 2b7b0387..10c4285c 100644
--- a/config/coreboot/gru_kevin/target.cfg
+++ b/config/coreboot/gru_kevin/target.cfg
@@ -1,5 +1,3 @@
 tree="default"
 arch="aarch64-elf"
 payload_uboot="y"
-vendorfiles="n"
-microcode_required="n"
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
index 7c913bdc..1a177eaf 100644
--- a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 crossgcc_ada="n"
-vendorfiles="n"
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
index 7c913bdc..1a177eaf 100644
--- a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 crossgcc_ada="n"
-vendorfiles="n"
diff --git a/config/coreboot/kcma-d8-udimm_16mb/target.cfg b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
index 1bb78ad5..869798fa 100644
--- a/config/coreboot/kcma-d8-udimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 crossgcc_ada="n"
-vendorfiles="n"
diff --git a/config/coreboot/kcma-d8-udimm_2mb/target.cfg b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
index 1bb78ad5..869798fa 100644
--- a/config/coreboot/kcma-d8-udimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 crossgcc_ada="n"
-vendorfiles="n"
diff --git a/config/coreboot/kfsn4-dre_1mb/target.cfg b/config/coreboot/kfsn4-dre_1mb/target.cfg
index 41b63823..375b5894 100644
--- a/config/coreboot/kfsn4-dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4-dre_1mb/target.cfg
@@ -3,5 +3,4 @@ arch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 crossgcc_ada="n"
-vendorfiles="n"
 grub_timeout=10
diff --git a/config/coreboot/kfsn4-dre_2mb/target.cfg b/config/coreboot/kfsn4-dre_2mb/target.cfg
index 64c45daa..f972c863 100644
--- a/config/coreboot/kfsn4-dre_2mb/target.cfg
+++ b/config/coreboot/kfsn4-dre_2mb/target.cfg
@@ -4,5 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 crossgcc_ada="n"
-vendorfiles="n"
 grub_timeout=10
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
index d3ab97d1..f444f22e 100644
--- a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
@@ -4,5 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 crossgcc_ada="n"
-vendorfiles="n"
 grub_timeout=10
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
index d3ab97d1..f444f22e 100644
--- a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
@@ -4,5 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 crossgcc_ada="n"
-vendorfiles="n"
 grub_timeout=10
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
index 64c45daa..f972c863 100644
--- a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
@@ -4,5 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 crossgcc_ada="n"
-vendorfiles="n"
 grub_timeout=10
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
index 64c45daa..f972c863 100644
--- a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
@@ -4,5 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 crossgcc_ada="n"
-vendorfiles="n"
 grub_timeout=10
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index c883642f..78bb05d0 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -4,5 +4,3 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index c883642f..78bb05d0 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -4,5 +4,3 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/qemu_arm64_12mb/target.cfg b/config/coreboot/qemu_arm64_12mb/target.cfg
index 2b7b0387..10c4285c 100644
--- a/config/coreboot/qemu_arm64_12mb/target.cfg
+++ b/config/coreboot/qemu_arm64_12mb/target.cfg
@@ -1,5 +1,3 @@
 tree="default"
 arch="aarch64-elf"
 payload_uboot="y"
-vendorfiles="n"
-microcode_required="n"
diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg
index bc2c6f55..ceda8dd3 100644
--- a/config/coreboot/qemu_x86_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_12mb/target.cfg
@@ -6,5 +6,3 @@ payload_seabios="y"
 payload_memtest="y"
 payload_uboot="y"
 grub_scan_disk="both"
-vendorfiles="n"
-microcode_required="n"
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 0b6bb18c..91aa5f9b 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -4,6 +4,4 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
 grub_background="background1024x768.png"
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 0b6bb18c..91aa5f9b 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -4,6 +4,4 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
 grub_background="background1024x768.png"
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index 8d1bf5b8..981435d4 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 0b6bb18c..91aa5f9b 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -4,6 +4,4 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
 grub_background="background1024x768.png"
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 0b6bb18c..91aa5f9b 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -4,6 +4,4 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
-microcode_required="n"
-vendorfiles="n"
 grub_background="background1024x768.png"
diff --git a/script/build/roms b/script/build/roms
index 2926f297..f72b66b6 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -22,7 +22,7 @@ kmapdir="config/grub/keymap"
 pv="payload_grub payload_grub_withseabios payload_seabios payload_memtest t"
 pv="${pv} payload_seabios_withgrub payload_seabios_grubonly payload_uboot memtest_bin"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree arch"
-v="${v} grub_timeout ubdir vendorfiles board grub_scan_disk uboot_config"
+v="${v} grub_timeout ubdir board grub_scan_disk uboot_config"
 eval "$(setvars "n" ${pv})"
 eval "$(setvars "" ${v} boards _displaymode _payload _keyboard all targets)"
 
@@ -107,8 +107,6 @@ check_target()
 		payload_uboot="n"
 	[ "${payload_uboot}" = "y" ] && [ -z "${uboot_config}" ] && \
 		uboot_config="default"
-	[ "${vendorfiles}" != "n" ] && [ "${vendorfiles}" != "y" ] && \
-		vendorfiles="y"
 
 	# Override all payload directives with cmdline args
 	[ -z "${_payload}" ] && return 0
@@ -401,17 +399,12 @@ mkUbootRom() {
 	printf "%s\n" "${tmprom}"
 }
 
-# it is assumed that no other work will be done on the ROM
-# after calling this function. therefore this function is "final"
-moverom() {
-	rompath="${1}"
-	newrom="${2}"
+moverom()
+{
+	printf "Creating target image: %s\n" "$2"
 
-	[ "${vendorfiles}" = "n" ] && newrom="${newrom%.rom}_noblobs.rom"
-	printf "Creating target image: %s\n" "${newrom}"
-
-	x_ mkdir -p "${newrom%/*}"
-	x_ cp "${rompath}" "${newrom}"
+	x_ mkdir -p "${2%/*}"
+	x_ cp "$1" "$2"
 }
 
 usage()
diff --git a/script/update/release b/script/update/release
index b9128328..76de4ede 100755
--- a/script/update/release
+++ b/script/update/release
@@ -7,8 +7,7 @@ set -u -e
 . "include/err.sh"
 . "include/option.sh"
 
-eval "$(setvars "" vdir relname src_dirname srcdir _xm target romdir \
-    microcode_required mode)"
+eval "$(setvars "" vdir relname src_dirname srcdir _xm target romdir mode)"
 
 main()
 {
@@ -133,21 +132,7 @@ handle_rom_archive()
 
 nukerom()
 {
-	microcode_required="y"
 	. "config/coreboot/${target}/target.cfg"
-	if [ "${microcode_required}" != "y" ] && \
-	    [ "${microcode_required}" != "n" ]; then microcode_required="y"; fi
-	if [ "${microcode_required}" = "n" ]; then
-		for romfile in "${romdir}"/*.rom; do
-			[ -f "${romfile}" ] || continue
-			strip_ucode "${romfile}"
-		done
-		for romfile in "${romdir}"/*.tmprom; do
-			[ -f "${romfile}" ] || continue
-			mv "${romfile}" "${romfile%.tmprom}.rom" || \
-			    err "!mv romfile, nukerom"
-		done
-	fi
 
 	# Hash the images before removing vendor files
 	# which "./vendor inject" uses for verification
@@ -165,20 +150,6 @@ nukerom()
 	done
 }
 
-strip_ucode()
-{
-	romfile=${1}
-	_newrom_b="${romfile%.rom}_nomicrocode.tmprom"
-	cp "${romfile}" "${_newrom_b}" || err "!cp romfile ${romfile}, strip_u"
-	microcode_present="y"
-	"${cbfstool}" "${_newrom_b}" remove -n \
-	    cpu_microcode_blob.bin 2>/dev/null || microcode_present="n"
-	[ "${microcode_present}" = "n" ] || return 0
-	printf "REMARK: '%s' already lacks microcode\n" "${romfile}" 1>&2
-	printf "Renaming default ROM file instead.\n" 1>&2
-	mv "${romfile}" "${_newrom_b}" || err "!mv romfile ${romfile}, strip_u"
-}
-
 insert_copying_files()
 {
 	remkdir "${1}/licenses"
diff --git a/script/vendor/inject b/script/vendor/inject
index b4b74bb7..1f1d0209 100755
--- a/script/vendor/inject
+++ b/script/vendor/inject
@@ -122,14 +122,6 @@ patch_release_roms()
 		printf "patching rom: %s\n" "$x"
 		patch_rom "${x}"
 	done
-	for x in "${_tmpdir}"/bin/*/*_nomicrocode.rom ; do
-		[ -f "${x}" ] || continue
-		[ -f "${x%_nomicrocode.rom}.rom" ] || continue
-
-		cp "${x%_nomicrocode.rom}.rom" "${x}" || \
-		    err "patch_r: !cp \"${x%_nomicrocode.rom}.rom\" \"${x}\""
-		x_ "${cbfstool}" "${x}" remove -n cpu_microcode_blob.bin
-	done
 
 	(
 	x_ cd "${_tmpdir}/bin/"* # TODO: very dodgy, re-write accordingly
@@ -159,16 +151,6 @@ patch_rom()
 {
 	rom="${1}"
 
-	# we don't process no-microcode roms; these are
-	# instead re-created at the end, after re-inserting
-	# on roms with microcode, by copying and then removing,
-	# so that the hashes will match (otherwise, cbfstool
-	# may sometimes insert certain vendor files at the wrong offset)
-	# (unless nomicrocode is the only config provided)
-	[ "${rom}" != "${rom%_nomicrocode.rom}.rom" ] && \
-	    [ -f "${rom%_nomicrocode.rom}.rom" ] && \
-	    [ "${release}" = "y" ] && return 0
-
 	check_defconfig "$boarddir" && err "patch_rom $boarddir: no configs"
 
 	set -- "${boarddir}/config/"*

From 392932797b93fea73531af900bc0015a35fec267 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 23 Dec 2023 07:11:12 +0000
Subject: [PATCH 0121/1549] vendor/inject: fix dodgy error check (cd command)

the x_ function doesn't handle arguments with spaces
well, and this cd command is going to an asterisk, so
it's unknown what the resultant string will be.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/vendor/inject | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/script/vendor/inject b/script/vendor/inject
index 1f1d0209..3f75a9da 100755
--- a/script/vendor/inject
+++ b/script/vendor/inject
@@ -124,7 +124,8 @@ patch_release_roms()
 	done
 
 	(
-	x_ cd "${_tmpdir}/bin/"* # TODO: very dodgy, re-write accordingly
+	cd "${_tmpdir}/bin/"* || \
+	    err "patch_release_roms: !cd ${_tmpdir}/bin/*"
 
 	# NOTE: For compatibility with older rom releases, defer to sha1
 	[ "${nukemode}" = "nuke" ] || sha512sum --status -c vendorhashes || \

From 465077bc4aa0cb0b5806494d67d635a0f7619899 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 23 Dec 2023 07:48:15 +0000
Subject: [PATCH 0122/1549] vendor/download: check whether configs exist first

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/vendor/download | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/script/vendor/download b/script/vendor/download
index b83ffb48..25434318 100755
--- a/script/vendor/download
+++ b/script/vendor/download
@@ -42,6 +42,12 @@ main()
 
 detect_firmware()
 {
+	_cfg_exists="n"
+	for _chk_file in "${boarddir}/config/"*; do
+		[ -f "${_chk_file}" ] && _cfg_exists="y" && break
+	done
+	[ "${_cfg_exists}" = "n" ] && return 1
+
 	set -- "${boarddir}/config/"*
 	. "${1}" 2>/dev/null
 

From aa525142aa872d805d3085819365ce8d51cb93d7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 23 Dec 2023 08:34:55 +0000
Subject: [PATCH 0123/1549] update/trees: fix infinite loop

when make-all is being executed on a coreboot tree,
the "./vendor download target" command is used, where
target is the tree/board name.

that script then checks whether cbfstool and ifdtool
are built, and if they're not, they then call
./update trees -b coreboot utils bla bla bla

in this scenario, project=coreboot and mode="", meaning
make-all, and the same check that checks whether the
vendor download script should be run, is executed,
which in turn then checks cbutils again

fix the infinite loop by checking whether it was coreboot
utils, as opposed to *firmware*, that is to be built, before
running ./vendor download

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/update/trees | 1 +
 1 file changed, 1 insertion(+)

diff --git a/script/update/trees b/script/update/trees
index 832f27c5..47b50dd6 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -97,6 +97,7 @@ handle_targets()
 		printf "Running 'make %s' for project '%s, target '%s''\n" \
 		    "${mode}" "${project}" "${target}"
 		[ "${project}" != "coreboot" ] || [ -n "${mode}" ] || \
+		    [ "${target1}" = "utils" ] || \
 			x_ ./vendor download ${target}
 		x_ handle_defconfig
 	done

From 9d5d98ebaeb6555ed7d50cb566e297ee75ee3c83 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 23 Dec 2023 08:43:42 +0000
Subject: [PATCH 0124/1549] set version/projectname properly

lbmk used to set version/versiondate directly in
err.sh, but now it's handled there by a function,
which is called by the main script.

script/update/release hadn't yet been adapted. the
only change necessary is to call check_project()

script/update/trees also makes use of it

script/build/roms is using "projectname"

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build                 | 2 +-
 include/err.sh        | 2 ++
 script/build/roms     | 2 ++
 script/update/release | 2 ++
 script/update/trees   | 4 ++--
 5 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/build b/build
index 551e9031..e06c1cea 100755
--- a/build
+++ b/build
@@ -45,7 +45,7 @@ main()
 	initialise_command $@ && shift 1
 
 	check_git
-	check_project "fail"
+	check_project
 	git_init
 
 	execute_command $@
diff --git a/include/err.sh b/include/err.sh
index 3699d6ce..6a8afd41 100755
--- a/include/err.sh
+++ b/include/err.sh
@@ -59,6 +59,8 @@ check_project()
 	    x_ printf "%s\n" "${version}" > version
 	xx_ printf "%s\n" "${versiondate}" > versiondate || \
 	    x_ printf "%s\n" "${versiondate}" > versiondate
+
+	export LOCALVERSION="-${projectname}-${version%%-*}"
 }
 
 setvars()
diff --git a/script/build/roms b/script/build/roms
index f72b66b6..066c5b2e 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -28,6 +28,8 @@ eval "$(setvars "" ${v} boards _displaymode _payload _keyboard all targets)"
 
 main()
 {
+	check_project
+
 	while [ $# -gt 0 ]; do
 		case ${1} in
 		help)
diff --git a/script/update/release b/script/update/release
index 76de4ede..c242c9ce 100755
--- a/script/update/release
+++ b/script/update/release
@@ -21,6 +21,8 @@ main()
 		esac
 	done
 
+	check_project
+
 	vdir="${vdir}/${version}"
 	relname="${projectname}-${version}"
 	src_dirname="${relname}_src"
diff --git a/script/update/trees b/script/update/trees
index 47b50dd6..08a86f61 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -10,8 +10,6 @@ set -u -e
 . "include/option.sh"
 . "include/git.sh"
 
-export LOCALVERSION="-${projectname}-${version%%-*}"
-
 eval "$(setvars "" arch cfgsdir codedir config config_name crossgcc_ada mode \
     elfdir listfile project target target_dir targets tree _f target1)"
 
@@ -36,6 +34,8 @@ main()
 	[ -z "${_f}" ] && err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
 	[ -z "${project}" ] && err "project name not specified"
 
+	check_project
+
 	_cmd="build_projects"
 	[ -f "config/${project}/build.list" ] && _cmd="build_targets"
 	$_cmd $@

From d5f8f6572e29dbe68ca8e787cdab3aa55e25eb01 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 23 Dec 2023 09:25:06 +0000
Subject: [PATCH 0125/1549] dell/e6400nvidia_4mb: new configuration (nvidia)

the e6400_4mb target has libgfxinit and (if seabios) vgarom
initialisation, but has issues on the nvidia model, even when
using nomodeset. with this target, e6400nvidia_4mb, only
the vgarom initialisation is used, libgfxinit is disabled.

on nvidia models, this one should work a little bit better.
specifically: nouveau crashes on this machine, with libreboot
installed, but you can use nomodeset. however, when libgfxinit
is also enabled, nomodeset no longer works properly.

so this target disables all video initialisation in coreboot.
only seabios will initialise anything video-related, by
executing the vga option rom.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/e6400nvidia_4mb/config/normal | 558 ++++++++++++++++++
 config/coreboot/e6400nvidia_4mb/target.cfg    |   9 +
 config/vendor/sources                         |   2 +-
 3 files changed, 568 insertions(+), 1 deletion(-)
 create mode 100644 config/coreboot/e6400nvidia_4mb/config/normal
 create mode 100644 config/coreboot/e6400nvidia_4mb/target.cfg

diff --git a/config/coreboot/e6400nvidia_4mb/config/normal b/config/coreboot/e6400nvidia_4mb/config/normal
new file mode 100644
index 00000000..2743c787
--- /dev/null
+++ b/config/coreboot/e6400nvidia_4mb/config/normal
@@ -0,0 +1,558 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/e6400"
+CONFIG_VGA_BIOS_ID="10de,06eb"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x3FD000
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VGA_BIOS=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_BOARD_DELL_E6400=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefc0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_VBT_DATA_SIZE_KB=8
+CONFIG_VGA_BIOS_FILE="../../../pciroms/pci10de,06eb.rom"
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=4096
+CONFIG_ROM_SIZE=0x00400000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_VGA_BIOS_SECOND is not set
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x61254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_SOCKET_P=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_GM45=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_VGA_ROM_RUN_DEFAULT=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+# CONFIG_MAINBOARD_USE_LIBGFXINIT is not set
+# CONFIG_VGA_ROM_RUN is not set
+CONFIG_NO_GFX_INIT=y
+CONFIG_NO_EARLY_GFX_INIT=y
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+# CONFIG_VGA_BIOS_DGPU is not set
+CONFIG_INTEL_GMA_HAVE_VBT=y
+# CONFIG_INTEL_GMA_ADD_VBT is not set
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_EDID=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_NULL=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
new file mode 100644
index 00000000..46a3425e
--- /dev/null
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -0,0 +1,9 @@
+tree="dell"
+arch="i386-elf"
+payload_grub="n"
+payload_grub_withseabios="n"
+payload_seabios="y"
+payload_memtest="y"
+payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
+grub_scan_disk="ahci"
diff --git a/config/vendor/sources b/config/vendor/sources
index 7787e38a..befee301 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -123,7 +123,7 @@
 
 # nvidia vga option rom for dgpu models of Dell Latitude E6400
 # for downloading the nvidia rom to pciroms/pci10de,06eb.rom
-{e6400}{
+{e6400 e6400nvidia}{
 	E6400_VGA_DL_hash 6217d5fce2291d15bb0649fd2faaeb78e4c48962b07a2bea6af60466bfdc5f233af0d077c2c6e71dd96047bdbb1f612324cef0a5e728ba9a9ec5c69a4022cd8d
 	E6400_VGA_DL_url https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe
 	E6400_VGA_DL_url_bkup https://web.archive.org/web/20230506014903/https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe

From 33695a56aefe9e7375cbf3f59e2c51604a8f99a2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 23 Dec 2023 11:43:36 +0000
Subject: [PATCH 0126/1549] build/roms: remove redundant check

cros roms are always using libgfxinit, with a coreboot
framebuffer, so the "normal" initmode is never used.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 2 --
 1 file changed, 2 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index 066c5b2e..8be690aa 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -376,8 +376,6 @@ build_uboot_roms()
 {
 	tmprom="$(mkUbootRom "${cbrom}" "fallback/payload")"
 	newrom="${romdir}/uboot_payload_${board}_${initmode}_${displaymode}.rom"
-	[ "${initmode}" = "normal" ] && \
-		newrom="${romdir}/uboot_payload_${board}_${initmode}.rom"
 	x_ moverom "${tmprom}" "${newrom}"
 	x_ rm -f "${tmprom}"
 }

From a48b3841d7dfadaf6b9c9410b91a4b628996de2f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 23 Dec 2023 12:16:14 +0000
Subject: [PATCH 0127/1549] build/roms: improved error handling for roms

the rom functions print a path to the rom they built,
which is then used, but these are called inside what
are essentially subshells, and we had no error handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 23 ++++++++++++++++-------
 1 file changed, 16 insertions(+), 7 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index 8be690aa..068e063d 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -262,11 +262,18 @@ build_grub_roms()
 	payload1="${2}" # allow values: grub, seabios, seabios_withgrub
 
 	grub_cbfs="fallback/payload"
-	[ "$payload1" = "grub" ] && [ "$payload_grub_withseabios" = "y" ] \
-		&& x_ mv "$(mkSeabiosRom "$tmprom" "seabios.elf")" "$tmprom"
-	[ "$payload1" != "grub" ] && [ "$payload_seabios_withgrub" = "y" ] \
-		&& grub_cbfs="img/grub2" && \
-		x_ mv "$(mkSeabiosRom "$tmprom" fallback/payload)" "$tmprom"
+	if [ "$payload1" = "grub" ] && [ "$payload_grub_withseabios" = "y" ]
+	then
+		_tmpmvrom=$(mkSeabiosRom "$tmprom" "seabios.elf") || \
+		    err "build_grub_roms 1 $board: can't build tmprom"
+		x_ mv "$_tmpmvrom" "$tmprom"
+	elif [ "$payload1" != "grub" ] && [ "$payload_seabios_withgrub" = "y" ]
+	then
+		grub_cbfs="img/grub2"
+		_tmpmvrom=$(mkSeabiosRom "$tmprom" fallback/payload) || \
+		    err "build_grub_roms 2 $board: can't build tmprom"
+		x_ mv "$_tmpmvrom" "$tmprom"
+	fi
 
 	# we only need insert grub.elf once, for each coreboot config:
 	x_ "${cbfstool}" "${tmprom}" add-payload -f "${grubelf}" \
@@ -302,7 +309,8 @@ build_grub_roms()
 		[ -f "${keymapfile}" ] || continue
 		keymap="${keymapfile##*/}"
 		keymap="${keymap%.gkb}"
-		tmpgrubrom="$(mkGrubRom "${keymap}" "${tmprom}")"
+		tmpgrubrom=$(mkGrubRom "${keymap}" "${tmprom}") || \
+		    err "build_grub_roms ${board}: could not create tmprom"
 
 		newrom="${romdir}/${payload1}_${board}_${initmode}_"
 		newrom="${newrom}${displaymode}_${keymap}.rom"
@@ -374,7 +382,8 @@ mkSeabiosGrubonlyRom()
 
 build_uboot_roms()
 {
-	tmprom="$(mkUbootRom "${cbrom}" "fallback/payload")"
+	tmprom=$(mkUbootRom "${cbrom}" "fallback/payload") || \
+	    err "build_uboot_roms $board: could not create tmprom"
 	newrom="${romdir}/uboot_payload_${board}_${initmode}_${displaymode}.rom"
 	x_ moverom "${tmprom}" "${newrom}"
 	x_ rm -f "${tmprom}"

From e0fee7a4375f92f0540d9fc36f1529ab2049dad9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 23 Dec 2023 12:21:29 +0000
Subject: [PATCH 0128/1549] git/pico-serprog: update revision

the new revision sets drive level to 12mA instead
of the default 4mA. 16-20mA is the maximum tolerated
level for data lines, on most flash ICs, so 12mA is
relatively safe.

riku did this a while ago, tested on pico pi.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/pico-serprog | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/git/pico-serprog b/config/git/pico-serprog
index ea630027..59ab1988 100644
--- a/config/git/pico-serprog
+++ b/config/git/pico-serprog
@@ -1,5 +1,5 @@
 {pico-serprog}{
-	rev: c8c16e9c11fe9e5b7230ff358f79de3f1951e1d9
+	rev: f0ad99bdfa84043f6bee581826e876ea1ff0b3ee
 	loc: pico-serprog
 	url: https://codeberg.org/libreboot/pico-serprog
 	bkup_url: https://git.disroot.org/libreboot/pico-serprog

From 25f9d9480fb61e0dd860560d46d8d433565aeb01 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 23 Dec 2023 13:06:30 +0000
Subject: [PATCH 0129/1549] git/pico-serprog: update revision again

riku committed a new patch, that fixes build errors
when PICO_DEFAULT_LED_PIN is not defined, on a given
board. in such cases, riku's new patch just disables
handling of the status LED, but LEDs continue to work
on boards where it is defined.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/pico-serprog | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/git/pico-serprog b/config/git/pico-serprog
index 59ab1988..172e620e 100644
--- a/config/git/pico-serprog
+++ b/config/git/pico-serprog
@@ -1,5 +1,5 @@
 {pico-serprog}{
-	rev: f0ad99bdfa84043f6bee581826e876ea1ff0b3ee
+	rev: 0d49d6fcbe33a5af1bff599be6ff84ddda0bc3fe
 	loc: pico-serprog
 	url: https://codeberg.org/libreboot/pico-serprog
 	bkup_url: https://git.disroot.org/libreboot/pico-serprog

From 655d3cdc881f72d2fdd0797ad92edae2f36ac73e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 23 Dec 2023 16:16:26 +0000
Subject: [PATCH 0130/1549] lbmk scripts: general code cleanup/optimisation

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             | 21 ++++++++-------------
 include/err.sh    | 21 +++++++--------------
 script/build/roms | 40 +++++++++++++++-------------------------
 3 files changed, 30 insertions(+), 52 deletions(-)

diff --git a/build b/build
index e06c1cea..ac6db677 100755
--- a/build
+++ b/build
@@ -37,22 +37,16 @@ main()
 {
 	xx_ id -u 1>/dev/null 2>/dev/null
 	[ $# -lt 1 ] && fail "Too few arguments. Try: ${0} help"
-	if [ "${1}" = "dependencies" ]; then
-		xx_ install_packages $@
-		lbmk_exit 0
-	fi
 
-	initialise_command $@ && shift 1
+	[ "${1}" = "dependencies" ] && xx_ install_packages $@ && lbmk_exit 0
 
-	check_git
-	check_project
-	git_init
-
-	execute_command $@
+	for cmd in initcmd check_git check_project git_init excmd; do
+		eval "${cmd} \$@"
+	done
 	lbmk_exit 0
 }
 
-initialise_command()
+initcmd()
 {
 	[ "$(id -u)" != "0" ] || fail "this command as root is not permitted"
 
@@ -104,11 +98,12 @@ git_init()
 	    fail "${PWD}: cannot git-tag ${projectname}/${version}"
 }
 
-execute_command()
+excmd()
 {
 	lbmkcmd="${buildpath}/${option}"
+	echo "TEST: $lbmkcmd"
 	[ -f "${lbmkcmd}" ] || fail "Invalid command. Run: ${linkpath} help"
-	"${lbmkcmd}" $@ || fail "execute_command: ${lbmkcmd} ${@}"
+	shift 1; "$lbmkcmd" $@ || fail "excmd: ${lbmkcmd} ${@}"
 }
 
 usage()
diff --git a/include/err.sh b/include/err.sh
index 6a8afd41..b7a273a6 100755
--- a/include/err.sh
+++ b/include/err.sh
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: MIT
 # SPDX-FileCopyrightText: 2022, 2023 Leah Rowe <leah@libreboot.org>
 
-version=""; versiondate=""; projectname=""; _nogit=""
+version=""; version_=""; versiondate=""; versiondate_=""; projectname=""; _nogit=""
 
 x_() {
 	[ $# -lt 1 ] || ${@} || err_exit err ${@}
@@ -48,17 +48,11 @@ check_project()
 	[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
 	    --pretty='%ct' HEAD)" || versiondate="${versiondate_}"
 
-	[ -n "${versiondate}" ] || fail "Unknown version date" || \
-	    err "Unknown version date"
-	[ -n "${version}" ] || fail "Unknown version" || \
-	    err "Unknown version"
-	[ -n "${projectname}" ] || fail "Unknown project" || \
-	    err "Unknown project"
-
-	xx_ printf "%s\n" "${version}" > version || \
-	    x_ printf "%s\n" "${version}" > version
-	xx_ printf "%s\n" "${versiondate}" > versiondate || \
-	    x_ printf "%s\n" "${versiondate}" > versiondate
+	for p in projectname version versiondate; do
+		eval "[ -n \"\$$p\" ] || fail \"$p unset\" || err \"$p unset\""
+		p_="x_ printf \"%s\\n\" \"\$$p\" > $p"
+		eval "x$p_ || $p_"
+	done
 
 	export LOCALVERSION="-${projectname}-${version%%-*}"
 }
@@ -67,8 +61,7 @@ setvars()
 {
 	_setvars=""
 	[ $# -lt 2 ] && err "setvars: too few arguments"
-	val="${1}"
-	shift 1
+	val="${1}" && shift 1
 	for var in $@; do
 		_setvars="${var}=\"${val}\"; ${_setvars}"
 	done
diff --git a/script/build/roms b/script/build/roms
index 068e063d..834a2fdd 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -21,7 +21,7 @@ kmapdir="config/grub/keymap"
 # target.cfg files have to specifically enable [a] payload(s)
 pv="payload_grub payload_grub_withseabios payload_seabios payload_memtest t"
 pv="${pv} payload_seabios_withgrub payload_seabios_grubonly payload_uboot memtest_bin"
-v="romdir cbrom initmode displaymode cbcfg targetdir tree arch"
+v="romdir cbrom initmode displaymode cbcfg targetdir tree arch keymaps"
 v="${v} grub_timeout ubdir board grub_scan_disk uboot_config"
 eval "$(setvars "n" ${pv})"
 eval "$(setvars "" ${v} boards _displaymode _payload _keyboard all targets)"
@@ -53,8 +53,7 @@ main()
 	    err "Cannot generate list of boards for building"
 
 	for x in ${boards}; do
-		eval "$(setvars "n" ${pv})"
-		eval "$(setvars "" ${v})"
+		eval "$(setvars "n" ${pv}) $(setvars "" ${v})"
 		grub_background="background1280x800.png"
 		board="${x}"
 		check_target
@@ -65,7 +64,8 @@ main()
 
 	[ -z "${targets}" ] && err "No ROM images were compiled"
 	printf "\nROM images available in these directories:\n"
-	printf "%s^^ ROM images available in these directories.\n\n" "$targets"
+	eval "printf \"${targets}\""
+	printf "^^ ROM images available in these directories.\n\n"
 
 	printf "DO NOT flash ROM images from elf/ - please use bin/ instead.\n"
 }
@@ -127,20 +127,15 @@ prepare_target()
 	cbfstool="cbutils/${tree}/cbfstool"
 	cbrom="${cbdir}/build/coreboot.rom"
 
-	[ -f "${cbfstool}" ] || \
-		x_ ./update trees -b coreboot utils ${tree}
-
-	build_dependency_seabios
+	[ -f "${cbfstool}" ] || x_ ./update trees -b coreboot utils ${tree}
 
 	memtest_bin="memtest86plus/build64/memtest.bin"
 	[ "${payload_memtest}" != "y" ] || [ -f "src/${memtest_bin}" ] || \
 		x_ ./update trees -b memtest86plus
 
-	rm -f "${romdir}/"* || err "!prepare, rm files, ${romdir}"
-
-	build_dependency_grub
-	build_dependency_uboot
-	build_target
+	for bt in dependency_seabios dependency_grub dependency_uboot target; do
+		eval "build_${bt}"
+	done
 }
 
 build_dependency_seabios()
@@ -162,14 +157,15 @@ build_dependency_grub()
 	rebuild_grub="n"
 	[ -f "${grubelf}" ] || rebuild_grub="y"
 	for keymapfile in "${kmapdir}"/*.gkb; do
-		[ "${rebuild_grub}" = "y" ] || break
 		[ -f "${keymapfile}" ] || continue
 
+		keymaps="${keymaps} ${keymapfile}"
 		keymap="${keymapfile##*/}"
 		keymap="${keymap%.gkb}"
 		[ ! -f "elf/grub/keymap_${keymap}.cfg" ] && \
-		    rebuild_grub="y" && break
+		    rebuild_grub="y"
 	done
+	[ -n "${_keyboard}" ] && keymaps="${kmapdir}/${_keyboard}.gkb"
 	[ "${rebuild_grub}" = "y" ] || return 0
 	x_ ./build grub
 }
@@ -189,6 +185,8 @@ build_dependency_uboot()
 
 build_target()
 {
+	rm -f "${romdir}/"* || err "!prepare, rm files, ${romdir}"
+
 	for x in "normal" "vgarom" "libgfxinit"; do
 		initmode="${x}"
 		hmode="vesafb"
@@ -229,10 +227,8 @@ build_roms()
 	[ "${payload_memtest}" != "y" ] || \
 		x_ "${cbfstool}" "${cbrom}" add-payload \
 		    -f "src/${memtest_bin}" -n img/memtest -c lzma
-	[ "${payload_seabios}" = "y" ] && \
-		build_seabios_roms
-	[ "${payload_grub}" != "y" ] || \
-		x_ build_grub_roms "${cbrom}" "grub"
+	[ "${payload_seabios}" = "y" ] && build_seabios_roms
+	[ "${payload_grub}" != "y" ] || x_ build_grub_roms "${cbrom}" "grub"
 	[ "${payload_uboot}" = "y" ] || return 0
 	x_ cp "${_cbrom}" "${cbrom}"
 	build_uboot_roms
@@ -299,12 +295,6 @@ build_grub_roms()
 	    -f "${tmpcfg}" -n timeout.cfg -t raw
 	x_ rm -f "${tmpcfg}"
 
-	keymaps=""
-	for kmapfile in "${kmapdir}"/*; do
-		keymaps="${keymaps} ${kmapfile}"
-	done
-	[ -z "${_keyboard}" ] || keymaps="${kmapdir}/${_keyboard}.gkb"
-
 	for keymapfile in ${keymaps}; do
 		[ -f "${keymapfile}" ] || continue
 		keymap="${keymapfile##*/}"

From 746d9cadda36c1f5028b009543b0ae33dd6b06ff Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 23 Dec 2023 18:02:09 +0000
Subject: [PATCH 0131/1549] build: remove test command

i left this in here during the last change

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 1 -
 1 file changed, 1 deletion(-)

diff --git a/build b/build
index ac6db677..b005a3bb 100755
--- a/build
+++ b/build
@@ -101,7 +101,6 @@ git_init()
 excmd()
 {
 	lbmkcmd="${buildpath}/${option}"
-	echo "TEST: $lbmkcmd"
 	[ -f "${lbmkcmd}" ] || fail "Invalid command. Run: ${linkpath} help"
 	shift 1; "$lbmkcmd" $@ || fail "excmd: ${lbmkcmd} ${@}"
 }

From 38a7aa3196e25627df2d9e089b00421b9194f7b6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 24 Dec 2023 06:02:12 +0000
Subject: [PATCH 0132/1549] build/roms: rename two functions for clarity

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index 834a2fdd..e3378e75 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -56,8 +56,8 @@ main()
 		eval "$(setvars "n" ${pv}) $(setvars "" ${v})"
 		grub_background="background1280x800.png"
 		board="${x}"
-		check_target
-		prepare_target
+		configure_target
+		configure_dependencies
 		[ -d "bin/${board}" ] || continue
 		targets="* bin/${board}\n${targets}"
 	done
@@ -70,7 +70,7 @@ main()
 	printf "DO NOT flash ROM images from elf/ - please use bin/ instead.\n"
 }
 
-check_target()
+configure_target()
 {
 	targetdir="${cfgsdir}/${board}"
 	[ -f "${targetdir}/target.cfg" ] || \
@@ -119,7 +119,7 @@ check_target()
 	eval "payload_${_payload}=y"
 }
 
-prepare_target()
+configure_dependencies()
 {
 	romdir="bin/${board}"
 	cbdir="src/coreboot/${board}"

From b4ab30577ffd2c3b5908b8d599091982acce8f9c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 24 Dec 2023 06:32:19 +0000
Subject: [PATCH 0133/1549] lbmk scripts: general code cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/err.sh        |  2 +-
 script/update/release | 33 +++++++++++++++++++--------------
 script/update/trees   |  5 +++--
 3 files changed, 23 insertions(+), 17 deletions(-)

diff --git a/include/err.sh b/include/err.sh
index b7a273a6..1aeebcbb 100755
--- a/include/err.sh
+++ b/include/err.sh
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: MIT
 # SPDX-FileCopyrightText: 2022, 2023 Leah Rowe <leah@libreboot.org>
 
-version=""; version_=""; versiondate=""; versiondate_=""; projectname=""; _nogit=""
+version=""; versiondate=""; projectname=""; _nogit=""
 
 x_() {
 	[ $# -lt 1 ] || ${@} || err_exit err ${@}
diff --git a/script/update/release b/script/update/release
index c242c9ce..fd20d0ee 100755
--- a/script/update/release
+++ b/script/update/release
@@ -40,7 +40,7 @@ mkvdir()
 {
 	mkdir -p "${vdir}" || err "mkvdir: !mkdir -p \"${vdir}\""
 	git clone . "${srcdir}" || err "mkdir: !gitclone \"${srcdir}\""
-	insert_version_files "${srcdir}" || err "mkvdir ${srcdir}: versionfile"
+	insert_version_files "$srcdir" || err "mkvdir $srcdir: versionfile"
 }
 
 build_release()
@@ -53,7 +53,7 @@ build_release()
 	) || err "can't create release files"
 	(
 	cd "${srcdir%/*}" || err "${_xm}: mktarball \"${srcdir}\""
-	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || err "${_xm}: mksrc"
+	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || err "$_xm: mksrc"
 	) || err "can't create src tarball"
 	[ "${mode}" = "src" ] && return 0
 
@@ -78,8 +78,8 @@ fetch_trees()
 		    err "!rm -Rf \"src/${xp}/${xp}\""
 	done
 
-	find . -name ".git" -exec rm -Rf {} + || err "${_xm}: rm .git"
-	find . -name ".gitmodules" -exec rm -Rf {} + || err "${_xm}: rm .gitmod"
+	find . -name ".git" -exec rm -Rf {} + || err "$_xm: rm .git"
+	find . -name ".gitmodules" -exec rm -Rf {} + || err "$_xm: rm .gitmod"
 	x_ rm -Rf tmp .git
 }
 
@@ -119,7 +119,7 @@ handle_rom_archive()
 
 	romdir="${romdir}/bin/${target}"
 	mkdir -p "${romdir}" || err "!mkdir -p romdir, handle_rom_archive"
-	cp "${builddir}/"* "${romdir}" || err "!cp romdir, handle_rom_archive"
+	cp "$builddir/"* "$romdir" || err "!cp romdir, handle_rom_archive"
 
 	nukerom
 
@@ -128,7 +128,8 @@ handle_rom_archive()
 	insert_version_files "${romdir}" || \
 	    err "mkrom_tarball ${romdir}: versionfile"
 
-	insert_copying_files "$romdir" || err "!insert copy, handle 2, $romdir"
+	insert_copying_files "$romdir" || \
+	    err "!insert copy, handle 2, $romdir"
 	mkrom_tarball
 }
 
@@ -142,7 +143,8 @@ nukerom()
 	touch "${romdir}/vendorhashes" || err "!touch ${romdir}/vendorhashes"
 	(
 	cd "${romdir}" || err "!cd romdir ${romdir}, nukerom"
-	sha512sum ./*.rom >> vendorhashes || err "!create vendorhashes, nukerom"
+	sha512sum ./*.rom >> vendorhashes || \
+	    err "!create vendorhashes, nukerom"
 	) || err "can't create vendor hashes"
 
 	for romfile in "${romdir}"/*.rom; do
@@ -159,9 +161,11 @@ insert_copying_files()
 	# copy licenses to rom image archive, for completion
 	cp "src/grub/COPYING" "${l}/COPYING.grub" || return 1
 	cp "src/coreboot/default/COPYING" "${l}/COPYING.coreboot" || return 1
-	cp -R "src/coreboot/default/LICENSES" "${l}/LICENSES.coreboot" || return 1
+	cp -R "src/coreboot/default/LICENSES" "${l}/LICENSES.coreboot" || \
+	    return 1
 	cp "src/seabios/default/COPYING" "${l}/COPYING.coreboot" || return 1
-	cp "src/seabios/default/COPYING.LESSER" "${l}/COPYING.LESSER.seabios" || return 1
+	cp "src/seabios/default/COPYING.LESSER" "$l/COPYING.LESSER.seabios" \
+	    || return 1
 	cp -R "src/u-boot/default/Licenses" "${l}/COPYING.u-boot" || return 1
 	printf "Multiple licenses. Check corresponding %s source archive\n" \
 	    "${projectname}" > "${1}/COPYING" || return 1
@@ -173,11 +177,11 @@ mkrom_tarball()
 	f="release/${version}/roms/${archivename}"
 	mkdir -p "${f%/*}" || err "mkrom_tarball: !mkdir -p ${f%/*}"
 	(
-	cd "${romdir%"/bin/${target}"}" || err "!cd ${romdir%"/bin/${target}"}"
+	cd "${romdir%"/bin/$target"}" || err "!cd ${romdir%"/bin/$target"}"
 	mktarball "bin/${target}" "${archivename}.tar.xz"
 	) || err "can't create rom tarball"
 	mv "${romdir%"/bin/${target}"}/${archivename}.tar.xz"* "${f%/*}" || \
-	    err "!mktarball, rom, ${f%/*}/${romdir%"/bin/${target}"}/${archivename}.tar.xz"
+	    err "mktar ${f%/*}/${romdir%"/bin/$target"}/$archivename.tar.xz"
 
 	printf "Created ROM archive: %s" "${f%/*}/${archivename}.tar.xz"
 }
@@ -194,14 +198,15 @@ mktarball()
 	# preserve timestamps for reproducible tarballs
 	tar_implementation=$(tar --version | head -n1) || :
 
-	[ "${2%/*}" = "${2}" ] || mkdir -p "${2%/*}" || err "mk, !mkdir -p \"${2%/*}\""
+	[ "${2%/*}" = "${2}" ] || \
+		mkdir -p "${2%/*}" || err "mk, !mkdir -p \"${2%/*}\""
 	if [ "${tar_implementation% *}" = "tar (GNU tar)" ]; then
 		tar --sort=name --owner=root:0 --group=root:0 \
-		    --mtime="UTC 2023-11-06" -c "${1}" | xz -T0 -9e > "${2}" || \
+		    --mtime="UTC 2023-11-06" -c "$1" | xz -T0 -9e > "$2" || \
 		    err "mktarball 1, ${1}"
 	else
 		# TODO: reproducible tarballs on non-GNU systems
-		tar -c "${1}" | xz -T0 -9e > "${2}" || err "mktarball 2, ${1}"
+		tar -c "$1" | xz -T0 -9e > "$2" || err "mktarball 2, $1"
 	fi
 	(
 	[ "${2%/*}" != "${2}" ] && x_ cd "${2%/*}"
diff --git a/script/update/trees b/script/update/trees
index 08a86f61..70fa208e 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -153,7 +153,7 @@ handle_src_tree()
 	if [ ! -d "${codedir}" ]; then
 		if [ "${mode}" = "distclean" ] || \
 		    [ "${mode}" = "crossgcc-clean" ]; then
-			printf "Directory %s doesn't exist; skipping clean\n" \
+			printf "Directory %s missing; skipping clean\n" \
 			    "${codedir}" 1>&2
 			return 1
 		fi
@@ -233,7 +233,8 @@ run_make_command()
 	[ -f "${codedir}/Makefile" ] || [ -f "${codedir}/makefile" ] || \
 	    [ -f "${codedir}/GNUmakefile" ] || return 1
 	[ "${project}" = "coreboot" ] && [ -z "${mode}" ] && \
-		x_ printf "%s\n" "${version%%-*}" >"$codedir/.coreboot-version"
+		x_ printf "%s\n" "${version%%-*}" \
+		    > "${codedir}/.coreboot-version"
 
 	x_ make ${mode} -j$(nproc) -C "${codedir}"
 

From 575332f2219c9e6f435b7ed35bfb2a408de0628c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 24 Dec 2023 08:54:35 +0000
Subject: [PATCH 0134/1549] fix flashrom build error (implicit enum typecast)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...-implicit-typecast-fixes-build-error.patch | 38 +++++++++++++++++++
 1 file changed, 38 insertions(+)
 create mode 100644 config/flashrom/patches/0001-fix-implicit-typecast-fixes-build-error.patch

diff --git a/config/flashrom/patches/0001-fix-implicit-typecast-fixes-build-error.patch b/config/flashrom/patches/0001-fix-implicit-typecast-fixes-build-error.patch
new file mode 100644
index 00000000..f8cf4be2
--- /dev/null
+++ b/config/flashrom/patches/0001-fix-implicit-typecast-fixes-build-error.patch
@@ -0,0 +1,38 @@
+From 2d3124cf3c6c2e2de351fcafc572b19565b1d2a5 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 24 Dec 2023 08:52:55 +0000
+Subject: [PATCH 1/1] fix implicit typecast (fixes build error)
+
+typecasting an enum as (unsigned) should be safe
+
+Change-Id: Ib9d00d39020fef255eb4276bcc7d85c9973caed1
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ libflashrom.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/libflashrom.c b/libflashrom.c
+index 0dec22ee..fb7d22a8 100644
+--- a/libflashrom.c
++++ b/libflashrom.c
+@@ -188,7 +188,7 @@ struct flashrom_board_info *flashrom_supported_boards(void)
+ 		for (; i < boards_known_size; ++i) {
+ 			supported_boards[i].vendor = binfo[i].vendor;
+ 			supported_boards[i].name = binfo[i].name;
+-			supported_boards[i].working = binfo[i].working;
++			supported_boards[i].working = (unsigned) binfo[i].working;
+ 		}
+ 	} else {
+ 		msg_gerr("Memory allocation error!\n");
+@@ -226,7 +226,7 @@ struct flashrom_chipset_info *flashrom_supported_chipsets(void)
+ 			supported_chipsets[i].chipset = chipset[i].device_name;
+ 			supported_chipsets[i].vendor_id = chipset[i].vendor_id;
+ 			supported_chipsets[i].chipset_id = chipset[i].device_id;
+-			supported_chipsets[i].status = chipset[i].status;
++			supported_chipsets[i].status = (unsigned) chipset[i].status;
+ 	  }
+ 	} else {
+ 		msg_gerr("Memory allocation error!\n");
+-- 
+2.39.2
+

From 0aca6332ee5865dbf4717235cbf9f5e8e79dddc3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 24 Dec 2023 09:04:36 +0000
Subject: [PATCH 0135/1549] lbmk scripts: shorter code lines

while seemingly pedantic, this does actually make code
easier to read. mostly just switching to shorthand for
variable names, where no expansions or patterns are used

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build                  |  12 ++--
 include/err.sh         |   2 +-
 include/git.sh         |   9 +--
 include/mrc.sh         |   6 +-
 include/option.sh      |   2 +-
 script/build/roms      |  30 +++++-----
 script/build/serprog   |  10 ++--
 script/update/release  |   2 +-
 script/update/trees    | 133 ++++++++++++++++++++---------------------
 script/vendor/download |  30 +++++-----
 script/vendor/inject   |  20 +++----
 11 files changed, 128 insertions(+), 128 deletions(-)

diff --git a/build b/build
index b005a3bb..214cec30 100755
--- a/build
+++ b/build
@@ -38,7 +38,7 @@ main()
 	xx_ id -u 1>/dev/null 2>/dev/null
 	[ $# -lt 1 ] && fail "Too few arguments. Try: ${0} help"
 
-	[ "${1}" = "dependencies" ] && xx_ install_packages $@ && lbmk_exit 0
+	[ "$1" = "dependencies" ] && xx_ install_packages $@ && lbmk_exit 0
 
 	for cmd in initcmd check_git check_project git_init excmd; do
 		eval "${cmd} \$@"
@@ -78,7 +78,7 @@ install_packages()
 
 	xx_ ${pkg_add} ${pkglist}
 	[ -z "${aur_notice}" ] && return 0
-	printf "You must install AUR packages: %s\n" "${aur_notice}" 1>&2
+	printf "You must install AUR packages: %s\n" "$aur_notice" 1>&2
 }
 
 # release archives contain .gitignore, but not .git.
@@ -93,7 +93,7 @@ git_init()
 	git add -A . || fail "${PWD}: cannot add files to Git repository"
 	git commit -m "${projectname} ${version}" --date "${cdate}" \
 	    --author="lbmk <lbmk@libreboot.org>" || \
-	    fail "${PWD}: can't commit ${projectname}/${version}, date ${cdate}"
+	    fail "$PWD: can't commit ${projectname}/${version}, date $cdate"
 	git tag -a "${version}" -m "${projectname} ${version}" || \
 	    fail "${PWD}: cannot git-tag ${projectname}/${version}"
 }
@@ -125,19 +125,19 @@ usage()
 
 mkversion()
 {
-	printf "revision: %s %s\n" "${projectname}" "${version}"
+	printf "revision: %s %s\n" "$projectname" "$version"
 	printf "revision date: %s\n" "$(date -Rud @${versiondate})"
 }
 
 lbmk_exit()
 {
-	tmp_cleanup || err "lbmk_exit: can't rm tmpdir upon exit $1: ${tmpdir}"
+	tmp_cleanup || err "lbmk_exit: can't rm tmpdir upon exit $1: $tmpdir"
 	exit $1
 }
 
 fail()
 {
-	tmp_cleanup || printf "WARNING: can't rm tmpdir: %s\n" "${tmpdir}" 1>&2
+	tmp_cleanup || printf "WARNING: can't rm tmpdir: %s\n" "$tmpdir" 1>&2
 	err "${1}"
 }
 
diff --git a/include/err.sh b/include/err.sh
index 1aeebcbb..3c596b17 100755
--- a/include/err.sh
+++ b/include/err.sh
@@ -29,7 +29,7 @@ check_git()
 
 git_err()
 {
-	printf "You need to set git name/email, like so:\n%s\n\n" "${1}" 1>&2
+	printf "You need to set git name/email, like so:\n%s\n\n" "$1" 1>&2
 	fail "Git name/email not configured" || \
 	    err "Git name/email not configured"
 }
diff --git a/include/git.sh b/include/git.sh
index 274b5f3f..6184ba0c 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -51,12 +51,13 @@ load_target_config()
 	. "${cfgsdir}/${1}/target.cfg" || \
 	    err "load_target_config ${cfgsdir}/${1}: cannot load config"
 
-	touch "${cfgsdir}/${1}/seen" || err "load_config $cfgsdir/$1: !mk seen"
+	touch "${cfgsdir}/${1}/seen" || \
+	    err "load_config $cfgsdir/$1: !mk seen"
 }
 
 prepare_new_tree()
 {
-	printf "Creating %s tree %s (%s)\n" "${project}" "${tree}" "${_target}"
+	printf "Creating %s tree %s (%s)\n" "$project" "$tree" "$_target"
 
 	remkdir "${tmp_git_dir%/*}"
 	cp -R "src/${project}/${project}" "${tmp_git_dir}" || \
@@ -121,7 +122,7 @@ clone_project()
 git_reset_rev()
 {
 	git -C "${1}" reset --hard ${2} || err "!git reset ${1} <- ${2}"
-	if [ "${project}" != "coreboot" ] && [ "${project}" != "u-boot" ] && \
+	if [ "$project" != "coreboot" ] && [ "$project" != "u-boot" ] && \
 	    [ -f "${1}/.gitmodules" ]; then
 		git -C "${1}" submodule update --init --checkout || \
 		    err "git_reset_rev ${1}: can't download submodules"
@@ -137,7 +138,7 @@ git_am_patches()
 		[ -f "${patch}" ] || continue
 		git -C "${sdir}" am "${patch}" || patchfail="y"
 		[ "${patchfail}" != "y" ] && continue
-		git -C "${sdir}" am --abort || err  "${sdir}: !git am --abort"
+		git -C "$sdir" am --abort || err  "$sdir: !git am --abort"
 		err  "!git am ${patch} -> ${sdir}"
 	done
 	for patches in "${patchdir}/"*; do
diff --git a/include/mrc.sh b/include/mrc.sh
index 5ac09792..6a9b0a12 100755
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -8,7 +8,7 @@ eval "$(setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL)"
 
 extract_mrc()
 {
-	[ -z "${MRC_board}" ] && err "extract_mrc $MRC_hash: MRC_board not set"
+	[ -z "$MRC_board" ] && err "extract_mrc $MRC_hash: MRC_board not set"
 	[ -z "${CONFIG_MRC_FILE}" ] && \
 		err "extract_mrc $MRC_hash: CONFIG_MRC_FILE not set"
 
@@ -21,7 +21,7 @@ extract_mrc()
 	) || err "mrc download/extract failure"
 
 	"${cbfstool}" "${appdir}/"bios.bin extract -n mrc.bin \
-	    -f "${_dest}" -r RO_SECTION || err "extract_mrc: cbfstool ${_dest}"
+	    -f "$_dest" -r RO_SECTION || err "extract_mrc: cbfstool $_dest"
 }
 
 extract_partition()
@@ -38,5 +38,5 @@ extract_partition()
 	    err "extract_partition, dd ${1%.zip}, root-a.ext2"
 
 	printf "cd /usr/sbin\ndump chromeos-firmwareupdate ${SHELLBALL}\nquit" \
-	    | debugfs "root-a.ext2" || err "extract_mrc: can't extract shellball"
+	    | debugfs "root-a.ext2" || err "can't extract shellball"
 }
diff --git a/include/option.sh b/include/option.sh
index c9845a03..31411423 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -52,7 +52,7 @@ scan_config()
 	done << EOF
 	$(eval "awk '${awkstr}' \"${revfile}\"")
 EOF
-	rm -f "${revfile}" || "${_fail}" "scan_config: Cannot remove tmpfile"
+	rm -f "$revfile" || "$_fail" "scan_config: Cannot remove tmpfile"
 }
 
 check_defconfig()
diff --git a/script/build/roms b/script/build/roms
index e3378e75..44e6db14 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -67,7 +67,7 @@ main()
 	eval "printf \"${targets}\""
 	printf "^^ ROM images available in these directories.\n\n"
 
-	printf "DO NOT flash ROM images from elf/ - please use bin/ instead.\n"
+	printf "DO NOT flash images from elf/ - please use bin/ instead.\n"
 }
 
 configure_target()
@@ -80,7 +80,7 @@ configure_target()
 	. "${targetdir}/target.cfg"
 
 	[ -z "${grub_scan_disk}" ] && grub_scan_disk="both"
-	[ "${grub_scan_disk}" != "both" ] && [ "${grub_scan_disk}" != "ata" ] \
+	[ "$grub_scan_disk" != "both" ] && [ "$grub_scan_disk" != "ata" ] \
 	    && [ "${grub_scan_disk}" != "ahci" ] && \
 		grub_scan_disk="both"
 
@@ -98,16 +98,16 @@ configure_target()
 	# The reverse logic must not be applied. If SeaBIOS-with-GRUB works,
 	# that doesn't mean GRUB-withSeaBIOS will. For example, the board
 	# might have a graphics card whose vga rom coreboot doesn't execute
-	[ "${payload_grub}" != "y" ] && [ "${payload_seabios}" != "y" ] && \
+	[ "$payload_grub" != "y" ] && [ "$payload_seabios" != "y" ] && \
 	    [ "${payload_uboot}" != "y" ] && \
 		for configfile in "${targetdir}/config/"*; do
 			[ -e "${configfile}" ] || continue
 			err "target '${board}' defines no payload"
 		done
 
-	[ "${payload_uboot}" != "n" ] && [ "${payload_uboot}" != "y" ] && \
+	[ "$payload_uboot" != "n" ] && [ "$payload_uboot" != "y" ] && \
 		payload_uboot="n"
-	[ "${payload_uboot}" = "y" ] && [ -z "${uboot_config}" ] && \
+	[ "$payload_uboot" = "y" ] && [ -z "$uboot_config" ] && \
 		uboot_config="default"
 
 	# Override all payload directives with cmdline args
@@ -127,7 +127,7 @@ configure_dependencies()
 	cbfstool="cbutils/${tree}/cbfstool"
 	cbrom="${cbdir}/build/coreboot.rom"
 
-	[ -f "${cbfstool}" ] || x_ ./update trees -b coreboot utils ${tree}
+	[ -f "$cbfstool" ] || x_ ./update trees -b coreboot utils $tree
 
 	memtest_bin="memtest86plus/build64/memtest.bin"
 	[ "${payload_memtest}" != "y" ] || [ -f "src/${memtest_bin}" ] || \
@@ -228,7 +228,7 @@ build_roms()
 		x_ "${cbfstool}" "${cbrom}" add-payload \
 		    -f "src/${memtest_bin}" -n img/memtest -c lzma
 	[ "${payload_seabios}" = "y" ] && build_seabios_roms
-	[ "${payload_grub}" != "y" ] || x_ build_grub_roms "${cbrom}" "grub"
+	[ "$payload_grub" != "y" ] || x_ build_grub_roms "$cbrom" "grub"
 	[ "${payload_uboot}" = "y" ] || return 0
 	x_ cp "${_cbrom}" "${cbrom}"
 	build_uboot_roms
@@ -337,15 +337,15 @@ mkSeabiosRom() {
 	tmprom=$(mktemp -t coreboot_rom.XXXXXXXXXX)
 
 	x_ cp "${_cbrom}" "${tmprom}"
-	x_ "${cbfstool}" "${tmprom}" add-payload -f "${_seabioself}" \
+	x_ "$cbfstool" "$tmprom" add-payload -f "$_seabioself" \
 	    -n "${_seabios_cbfs_path}" -c lzma
 	x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
 
-	z="2"; [ "${initmode}" = "vgarom" ] && z="0"
-	x_ "${cbfstool}" "${tmprom}" add-int -i $z -n etc/pci-optionrom-exec
-	x_ "${cbfstool}" "${tmprom}" add-int -i 0 -n etc/optionroms-checksum
-	[ "${initmode}" != "libgfxinit" ] || \
-		x_ "${cbfstool}" "${tmprom}" add -f "${seavgabiosrom}" \
+	z="2"; [ "$initmode" = "vgarom" ] && z="0"
+	x_ "$cbfstool" "$tmprom" add-int -i $z -n etc/pci-optionrom-exec
+	x_ "$cbfstool" "$tmprom" add-int -i 0 -n etc/optionroms-checksum
+	[ "$initmode" != "libgfxinit" ] || \
+		x_ "$cbfstool" "$tmprom" add -f "$seavgabiosrom" \
 		    -n vgaroms/seavgabios.bin -t raw
 
 	printf "%s\n" "${tmprom}"
@@ -387,12 +387,12 @@ mkUbootRom() {
 	_ubdir="elf/u-boot/${board}/${uboot_config}"
 	_ubootelf="${_ubdir}/u-boot.elf"
 	[ -f "${_ubootelf}" ] || _ubootelf="${_ubdir}/u-boot"
-	[ -f "${_ubootelf}" ] || err "mkUbootRom: ${board}: cant find u-boot"
+	[ -f "$_ubootelf" ] || err "mkUbootRom: $board: cant find u-boot"
 
 	tmprom=$(mktemp -t coreboot_rom.XXXXXXXXXX)
 
 	x_ cp "${_cbrom}" "${tmprom}"
-	x_ "${cbfstool}" "${tmprom}" add-payload -f "${_ubootelf}" \
+	x_ "$cbfstool" "$tmprom" add-payload -f "$_ubootelf" \
 	    -n "${_uboot_cbfs_path}" -c lzma
 
 	printf "%s\n" "${tmprom}"
diff --git a/script/build/serprog b/script/build/serprog
index c961161a..28cd70a4 100755
--- a/script/build/serprog
+++ b/script/build/serprog
@@ -18,7 +18,7 @@ usage="usage: ./build firmware serprog <rp2040|stm32> [board]"
 main()
 {
 	[ -z "${1+x}" ] && err "${usage}"
-	[ "${1}" != "rp2040" ] && [ "${1}" != "stm32" ] && err "${usage}"
+	[ "$1" != "rp2040" ] && [ "$1" != "stm32" ] && err "$usage"
 	if [ "${1}" = "rp2040" ]; then
 		boards_dir=${pico_sdk_dir}/src/boards/include/boards
 		[ -d "$pico_src_dir" ] || x_ ./update trees -f "pico-serprog"
@@ -44,23 +44,23 @@ build_rp2040_rom()
 {
 	board=${1}
 	printf "Building pico-serprog for %s\n" "${board}"
-	x_ cmake -DPICO_BOARD="${board}" -DPICO_SDK_PATH="${pico_sdk_dir}" \
+	x_ cmake -DPICO_BOARD="$board" -DPICO_SDK_PATH="$pico_sdk_dir" \
 	    -B "${pico_src_dir}/build" "${pico_src_dir}"
 	x_ cmake --build "${pico_src_dir}/build"
 	x_ mv ${pico_src_dir}/build/pico_serprog.uf2 \
 	   bin/serprog_rp2040/serprog_${board}.uf2
-	printf "output to bin/serprog_rp2040/serprog_%s.uf2\n" "${board}"
+	printf "output to bin/serprog_rp2040/serprog_%s.uf2\n" "$board"
 }
 
 build_stm32_rom()
 {
 	board=${1}
 	printf "Building stm32-vserprog for %s\n" "${board}"
-	x_ make -C ${stm32_src_dir} libopencm3-just-make BOARD=${board}
+	x_ make -C $stm32_src_dir libopencm3-just-make BOARD=$board
 	x_ make -C ${stm32_src_dir} BOARD=${board}
 	x_ mv ${stm32_src_dir}/stm32-vserprog.hex \
 	   bin/serprog_stm32/serprog_${board}.hex
-	printf "output to bin/serprog_stm32/serprog_%s.hex\n" "${board}"
+	printf "output to bin/serprog_stm32/serprog_%s.hex\n" "$board"
 }
 
 print_boards()
diff --git a/script/update/release b/script/update/release
index fd20d0ee..e47aef80 100755
--- a/script/update/release
+++ b/script/update/release
@@ -149,7 +149,7 @@ nukerom()
 
 	for romfile in "${romdir}"/*.rom; do
 		[ -f "${romfile}" ] || continue
-		./vendor inject -r "${romfile}" -b "${target}" -n nuke || \
+		./vendor inject -r "$romfile" -b "$target" -n nuke || \
 		    err "!vendor inject (nuke) ${romfile}, nukerom"
 	done
 }
diff --git a/script/update/trees b/script/update/trees
index 70fa208e..9186ebb1 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -31,8 +31,8 @@ main()
 		esac
 		shift; project="${OPTARG#src/}"; shift
 	done
-	[ -z "${_f}" ] && err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
-	[ -z "${project}" ] && err "project name not specified"
+	[ -z "$_f" ] && err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
+	[ -z "$project" ] && err "project name not specified"
 
 	check_project
 
@@ -43,7 +43,7 @@ main()
 
 build_projects()
 {
-	[ $# -gt 0 ] && x_ ./update trees ${_f} ${@}
+	[ $# -gt 0 ] && x_ ./update trees $_f $@
 
 	if [ "${mode}" = "fetch" ]; then
 		fetch_project_repo
@@ -51,9 +51,9 @@ build_projects()
 	fi
 
 	codedir="src/${project}"
-	[ -d "${codedir}" ] || x_ ./update trees -f "${project}"
+	[ -d "$codedir" ] || x_ ./update trees -f "$project"
 
-	if [ "${project}" = "uefitool" ]; then
+	if [ "$project" = "uefitool" ]; then
 	(
 		x_ cd src/uefitool
 		cmake UEFIExtract/ || [ -f Makefile ] || \
@@ -61,72 +61,72 @@ build_projects()
 	) || err "can't build cmake on uefiextract"
 	fi
 
-	[ "${mode}" = "distclean" ] && mode="clean"
+	[ "$mode" = "distclean" ] && mode="clean"
 	run_make_command || return 0
 }
 
 build_targets()
 {
 	elfdir="elf/${project}"
-	[ "${elfdir}" = "elf/coreboot" ] && \
+	[ "$elfdir" = "elf/coreboot" ] && \
 		elfdir="elf/coreboot_nopayload_DO_NOT_FLASH"
 
 	cfgsdir="config/${project}"
-	[ -d "${cfgsdir}" ] || err "directory, ${cfgsdir}, does not exist"
+	[ -d "$cfgsdir" ] || err "directory, $cfgsdir, does not exist"
 
 	listfile="${cfgsdir}/build.list"
-	[ -f "${listfile}" ] || err "list file, ${listfile}, does not exist"
+	[ -f "$listfile" ] || err "list file, $listfile, does not exist"
 
 	# Build for all targets if no argument is given
-	[ $# -gt 0 ] && target1="${1}"
-	[ "${target1}" = "utils" ] && [ "${project}" = "coreboot" ] && \
+	[ $# -gt 0 ] && target1="$1"
+	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && \
 		shift 1
-	targets=$(items "${cfgsdir}") || \
-	    err "Cannot get options for ${cfgsdir}"
+	targets=$(items "$cfgsdir") || \
+	    err "Cannot get options for $cfgsdir"
 	[ $# -gt 0 ] && targets=$@
 
-	[ -z "${mode}" ] && x_ mkdir -p "${elfdir}/"
+	[ -z "$mode" ] && x_ mkdir -p "$elfdir"
 
 	handle_targets
 }
 
 handle_targets()
 {
-	for x in ${targets}; do
+	for x in $targets; do
 		target="${x}"
 		printf "Running 'make %s' for project '%s, target '%s''\n" \
-		    "${mode}" "${project}" "${target}"
-		[ "${project}" != "coreboot" ] || [ -n "${mode}" ] || \
-		    [ "${target1}" = "utils" ] || \
-			x_ ./vendor download ${target}
+		    "$mode" "$project" "$target"
+		[ "$project" != "coreboot" ] || [ -n "$mode" ] || \
+		    [ "$target1" = "utils" ] || \
+			x_ ./vendor download $target
 		x_ handle_defconfig
 	done
 
 	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
 	[ -z "${mode}" ] || return 0
-	printf "Done! The files are stored under %s/\n\n" "${elfdir}"
+	printf "Done! The files are stored under %s/\n\n" "$elfdir"
 }
 
 handle_defconfig()
 {
-	handle_src_tree "${target}" || return 0
+	handle_src_tree "$target" || return 0
 
-	if [ "${target1}" = "utils" ] && [ "${project}" = "coreboot" ]; then
-		handle_coreboot_utils "${tree}"
+	if [ "$target1" = "utils" ] && [ "$project" = "coreboot" ]; then
+		handle_coreboot_utils "$tree"
 		return 0
 	fi
 
 	for y in "${target_dir}/config"/*; do
-		[ -f "${y}" ] || continue
-		config="${y}"
+		[ -f "$y" ] || continue
+		config="$y"
 		config_name="${config#"${target_dir}/config/"}"
 
 		printf "handle/make/config %s %s: handling config %s\n" \
-		    "${project}" "${target}" "${config_name}"
+		    "$project" "$target" "$config_name"
 
-		[ -n "${mode}" ] || check_config || continue
+		[ -n "$mode" ] || check_config || continue
 		handle_makefile
-		[ -n "${mode}" ] || copy_elf
+		[ -n "$mode" ] || copy_elf
 	done
 }
 
@@ -134,7 +134,7 @@ handle_src_tree()
 {
 	target_dir="${cfgsdir}/${target}"
 
-	if [ "${mode}" = "fetch" ]; then
+	if [ "$mode" = "fetch" ]; then
 		fetch_project_trees
 		return 1
 	fi
@@ -145,23 +145,23 @@ handle_src_tree()
 	. "${target_dir}/target.cfg" || \
 	    err "handle_src_tree ${target_dir}: cannot load target.cfg"
 
-	[ -z "${arch}" ] && err "handle_src_tree $project/$tree: arch unset"
-	[ -z "${tree}" ] && err "handle_src_tree $project/$tree: tree unset"
+	[ -z "$arch" ] && err "handle_src_tree $project/$tree: arch unset"
+	[ -z "$tree" ] && err "handle_src_tree $project/$tree: tree unset"
 
 	codedir="src/${project}/${tree}"
 
-	if [ ! -d "${codedir}" ]; then
-		if [ "${mode}" = "distclean" ] || \
-		    [ "${mode}" = "crossgcc-clean" ]; then
+	if [ ! -d "$codedir" ]; then
+		if [ "$mode" = "distclean" ] || \
+		    [ "$mode" = "crossgcc-clean" ]; then
 			printf "Directory %s missing; skipping clean\n" \
-			    "${codedir}" 1>&2
+			    "$codedir" 1>&2
 			return 1
 		fi
-		x_ ./update trees -f "${project}" "${target}"
+		x_ ./update trees -f "$project" "$target"
 	fi
 
 	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
-	[ -z "${mode}" ] || return 0
+	[ -z "$mode" ] || return 0
 	check_cross_compiler
 }
 
@@ -170,22 +170,21 @@ handle_src_tree()
 check_cross_compiler()
 {
 	[ "$project" = "u-boot" ] || [ "$project" = "coreboot" ] || return 0
-	[ -z "${arch}" ] && err "${project}/${tree}: arch isn't set"
+	[ -z "$arch" ] && err "${project}/${tree}: arch isn't set"
 
-	_arch="${arch}"
-	[ "${arch}" = "aarch64-elf" ] && _arch="aarch64-elf arm-eabi"
+	_arch="$arch"
+	[ "$arch" = "aarch64-elf" ] && _arch="aarch64-elf arm-eabi"
 
-	[ "${crossgcc_ada}" = "y" ] || [ "${crossgcc_ada}" = "n" ] || \
-		crossgcc_ada="y"
-	[ "${crossgcc_ada}" = "y" ] || export BUILD_LANGUAGES=c
+	[ "$crossgcc_ada" = "y" ] || [ "$crossgcc_ada" = "n" ] || crossgcc_ada=y
+	[ "$crossgcc_ada" = "y" ] || export BUILD_LANGUAGES=c
 
 	cbdir="src/coreboot/${tree}"
-	[ "${project}" != "coreboot" ] && cbdir="src/coreboot/default"
+	[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
 	x_ ./update trees -f coreboot ${cbdir#src/coreboot/}
 
-	for xarch in ${_arch}; do
+	for xarch in $_arch; do
 		[ -d "${cbdir}/util/crossgcc/xgcc/${xarch}/" ] && continue
-		x_ make -C "${cbdir}" crossgcc-${xarch%-*} CPUS=$(nproc)
+		x_ make -C "$cbdir" crossgcc-${xarch%-*} CPUS=$(nproc)
 	done
 
 	# we *must* ensure that u-boot's build system uses crossgcc first
@@ -195,36 +194,36 @@ check_cross_compiler()
 
 check_config()
 {
-	[ -f "${config}" ] || \
+	[ -f "$config" ] || \
 		err "check_config: ${project}/${target}: configs missing"
 
 	dest_dir="${elfdir}/${target}/${config_name}"
 	# TODO: very hacky check. do it properly (based on build.list)
 	for elftest in "${dest_dir}"/*; do
-		[ -f "${elftest}" ] || continue
+		[ -f "$elftest" ] || continue
 		printf "Build already exists, so skipping build\n" 1>&2
 		return 1
 	done
-	x_ mkdir -p "${dest_dir}"
+	x_ mkdir -p "$dest_dir"
 }
 
 handle_makefile()
 {
-	x_ make clean -C "${codedir}"
-	x_ cp "${config}" "${codedir}/.config"
-	[ -n "${mode}" ] || make -C "${codedir}" silentoldconfig || \
-	    make -C "${codedir}" oldconfig || :
+	x_ make clean -C "$codedir"
+	x_ cp "$config" "${codedir}/.config"
+	[ -n "$mode" ] || make -C "$codedir" silentoldconfig || \
+	    make -C "$codedir" oldconfig || :
 
-	run_make_command || err "handle_makefile ${codedir}: no makefile!"
+	run_make_command || err "handle_makefile $codedir: no makefile!"
 
-	if [ -e "${codedir}/.git" ] && [ "${project}" = "u-boot" ] && \
-	    [ "${mode}" = "distclean" ]; then
-		x_ git -C "${codedir}" clean -fdx
+	if [ -e "${codedir}/.git" ] && [ "$project" = "u-boot" ] && \
+	    [ "$mode" = "distclean" ]; then
+		x_ git -C "$codedir" clean -fdx
 	elif [ "$mode" = "oldconfig" ] || [ "$mode" = "olddefconfig" ] || \
 	    [ "$mode" = "menuconfig" ] || [ "$mode" = "nconfig" ]; then
-		x_ cp "${codedir}/.config" "${config}"
-	elif [ "${mode}" = "savedefconfig" ]; then
-		x_ cp "${codedir}/defconfig" "${config}"
+		x_ cp "${codedir}/.config" "$config"
+	elif [ "$mode" = "savedefconfig" ]; then
+		x_ cp "${codedir}/defconfig" "$config"
 	fi
 }
 
@@ -232,24 +231,24 @@ run_make_command()
 {
 	[ -f "${codedir}/Makefile" ] || [ -f "${codedir}/makefile" ] || \
 	    [ -f "${codedir}/GNUmakefile" ] || return 1
-	[ "${project}" = "coreboot" ] && [ -z "${mode}" ] && \
+	[ "$project" = "coreboot" ] && [ -z "$mode" ] && \
 		x_ printf "%s\n" "${version%%-*}" \
 		    > "${codedir}/.coreboot-version"
 
-	x_ make ${mode} -j$(nproc) -C "${codedir}"
+	x_ make $mode -j$(nproc) -C "$codedir"
 
-	[ "${mode}" != "clean" ] && return 0
-	make -C "${codedir}" distclean 2>/dev/null || :
+	[ "$mode" != "clean" ] && return 0
+	make -C "$codedir" distclean 2>/dev/null || :
 }
 
 copy_elf()
 {
 	while read -r f; do
 		[ ! -f "${codedir}/$f" ] || \
-			x_ cp "${codedir}/${f}" "${dest_dir}/"
-	done < "${listfile}"
+			x_ cp "${codedir}/${f}" "$dest_dir"
+	done < "$listfile"
 
-	x_ make clean -C "${codedir}"
+	x_ make clean -C "$codedir"
 }
 
 main $@
diff --git a/script/vendor/download b/script/vendor/download
index 25434318..1f96c665 100755
--- a/script/vendor/download
+++ b/script/vendor/download
@@ -30,7 +30,7 @@ main()
 	[ $# -gt 0 ] || err "No argument given"
 	board="${1}"
 	boarddir="${cbcfgsdir}/${board}"
-	_b="${board%%_*mb}" # shorthand (avoid duplicating config per rom size)
+	_b="${board%%_*mb}" # shorthand (no duplication per rom size)
 
 	check_defconfig "${boarddir}" && exit 0
 	detect_firmware && exit 0
@@ -162,28 +162,28 @@ extract_intel_me()
 	[ -f "${_me}" ] && return 0
 
 	sdir="$(mktemp -d)"
-	mkdir -p "${sdir}" || err "extract_intel_me: !mkdir -p \"${sdir}\""
+	mkdir -p "$sdir" || err "extract_intel_me: !mkdir -p \"$sdir\""
 	(
-	[ "${cdir#/a}" != "${cdir}" ] && cdir="${cdir#/}"
-	cd "${cdir}" || err "extract_intel_me: !cd \"${cdir}\""
+	[ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
+	cd "$cdir" || err "extract_intel_me: !cd \"$cdir\""
 	for i in *; do
-		[ -f "${_me}" ] && break
-		[ -L "${i}" ] && continue
-		if [ -f "${i}" ]; then
-			"${mecleaner}" -r -t -O "${sdir}/vendorfile" \
-			    -M "${_me}" "${i}" && break
-			"${mecleaner}" -r -t -O "${_me}" "${i}" && break
-			"${me7updateparser}" -O "${_me}" "${i}" && break
+		[ -f "$_me" ] && break
+		[ -L "$i" ] && continue
+		if [ -f "$i" ]; then
+			"$mecleaner" -r -t -O "${sdir}/vendorfile" \
+			    -M "$_me" "$i" && break
+			"$mecleaner" -r -t -O "$_me" "$i" && break
+			"$me7updateparser" -O "$_me" "$i" && break
 			_7ztest="${_7ztest}a"
-			extract_archive "${i}" "${_7ztest}" || continue
-			extract_intel_me "${_me}" "${cdir}/${_7ztest}"
+			extract_archive "$i" "$_7ztest" || continue
+			extract_intel_me "$_me" "${cdir}/${_7ztest}"
 		elif [ -d "$i" ]; then
-			extract_intel_me "${_me}" "${cdir}/${i}"
+			extract_intel_me "$_me" "${cdir}/${i}"
 		else
 			continue
 		fi
 		cdir="${1}"
-		[ "${cdir#/a}" != "${cdir}" ] && cdir="${cdir#/}"
+		[ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
 		cd "${cdir}" || :
 	done
 	)
diff --git a/script/vendor/inject b/script/vendor/inject
index 3f75a9da..cec19b2e 100755
--- a/script/vendor/inject
+++ b/script/vendor/inject
@@ -37,7 +37,7 @@ main()
 	inject_vendorfiles
 	[ "${nukemode}" = "nuke" ] && return 0
 	printf "Friendly reminder (this is *not* an error message):\n"
-	printf "Please always ensure that the files were inserted correctly.\n"
+	printf "Please ensure that the files were inserted correctly.\n"
 }
 
 check_board()
@@ -96,7 +96,7 @@ build_dependencies()
 	if [ ! -f "${cbfstool}" ] || [ ! -f "${ifdtool}" ]; then
 		x_ ./update trees -b coreboot utils default
 	fi
-	[ -z "${new_mac}" ] || [ -f "${nvmutil}" ] || x_ make -C util/nvmutil
+	[ -z "$new_mac" ] || [ -f "$nvmutil" ] || x_ make -C util/nvmutil
 	[ "${nukemode}" = "nuke" ] && return 0
 	x_ ./vendor download ${board}
 }
@@ -116,7 +116,7 @@ patch_release_roms()
 	_tmpdir="tmp/romdir"
 	remkdir "${_tmpdir}"
 	tar -xf "${archive}" -C "${_tmpdir}" || \
-	    err "patch_release_roms: !tar -xf \"${archive}\" -C \"${_tmpdir}\""
+	    err "patch_release_roms: !tar -xf \"$archive\" -C \"$_tmpdir\""
 
 	for x in "${_tmpdir}"/bin/*/*.rom ; do
 		printf "patching rom: %s\n" "$x"
@@ -208,20 +208,20 @@ inject()
 	fi
 	if [ "${cbfsname}" = "IFD" ]; then
 		if [ "${nukemode}" != "nuke" ]; then
-			"${ifdtool}" -i ${_t}:${_dest} "${rom}" -O "$rom" || \
+			"$ifdtool" -i ${_t}:${_dest} "$rom" -O "$rom" || \
 			    err "inject: can't insert $_t ($dest) into $rom"
 		else
-			"${ifdtool}" --nuke ${_t} "${rom}" -O "${rom}" || \
-			    err "inject ${rom}: can't nuke ${_t} in IFD"
+			"$ifdtool" --nuke $_t "$rom" -O "$rom" || \
+			    err "inject $rom: can't nuke $_t in IFD"
 		fi
 	else
 		if [ "${nukemode}" != "nuke" ]; then
-			"${cbfstool}" "${rom}" add -f "${_dest}" \
-			    -n "${cbfsname}" -t ${_t} ${_offset} || \
+			"$cbfstool" "$rom" add -f "$_dest" \
+			    -n "$cbfsname" -t $_t $_offset || \
 			    err "inject $rom: can't insert $_t file $_dest"
 		else
-			"${cbfstool}" "${rom}" remove -n "${cbfsname}" || \
-			    err "inject $rom: can't remove ${cbfsname}"
+			"$cbfstool" "$rom" remove -n "$cbfsname" || \
+			    err "inject $rom: can't remove $cbfsname"
 		fi
 
 	fi

From 74147ea48a68930da7e2ddc723402cf3c2b175ad Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sun, 24 Dec 2023 00:10:32 +0200
Subject: [PATCH 0136/1549] Add HP 8300 CMT port

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 ...mb-hp-Add-Compaq-Elite-8300-CMT-port.patch | 818 ++++++++++++++++++
 .../config/libgfxinit_corebootfb              | 646 ++++++++++++++
 .../hp8300cmt_16mb/config/libgfxinit_txtmode  | 643 ++++++++++++++
 config/coreboot/hp8300cmt_16mb/target.cfg     |   7 +
 config/vendor/sources                         |   2 +-
 5 files changed, 2115 insertions(+), 1 deletion(-)
 create mode 100644 config/coreboot/default/patches/0036-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
 create mode 100644 config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/hp8300cmt_16mb/target.cfg

diff --git a/config/coreboot/default/patches/0036-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch b/config/coreboot/default/patches/0036-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
new file mode 100644
index 00000000..6ce09e6f
--- /dev/null
+++ b/config/coreboot/default/patches/0036-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
@@ -0,0 +1,818 @@
+From 757b8965ccdd8ecd0eeec33aee3685dd9a33d34e Mon Sep 17 00:00:00 2001
+From: Riku Viitanen <riku.viitanen@protonmail.com>
+Date: Sat, 23 Dec 2023 23:09:46 +0200
+Subject: [PATCH] mb/hp: Add Compaq Elite 8300 CMT port
+
+Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
+---
+ .../hp/compaq_elite_8300_cmt/Kconfig          |  38 ++++
+ .../hp/compaq_elite_8300_cmt/Kconfig.name     |   2 +
+ .../hp/compaq_elite_8300_cmt/Makefile.inc     |   7 +
+ .../hp/compaq_elite_8300_cmt/acpi/ec.asl      |   1 +
+ .../compaq_elite_8300_cmt/acpi/platform.asl   |  10 +
+ .../hp/compaq_elite_8300_cmt/acpi/superio.asl |  29 +++
+ .../hp/compaq_elite_8300_cmt/acpi_tables.c    |  12 ++
+ .../hp/compaq_elite_8300_cmt/board_info.txt   |   5 +
+ .../hp/compaq_elite_8300_cmt/cmos.default     |   7 +
+ .../hp/compaq_elite_8300_cmt/cmos.layout      |  74 +++++++
+ .../hp/compaq_elite_8300_cmt/devicetree.cb    | 161 +++++++++++++++
+ .../hp/compaq_elite_8300_cmt/dsdt.asl         |  26 +++
+ .../hp/compaq_elite_8300_cmt/early_init.c     |  41 ++++
+ .../compaq_elite_8300_cmt/gma-mainboard.ads   |  17 ++
+ src/mainboard/hp/compaq_elite_8300_cmt/gpio.c | 191 ++++++++++++++++++
+ .../hp/compaq_elite_8300_cmt/hda_verb.c       |  33 +++
+ .../hp/compaq_elite_8300_cmt/mainboard.c      |  16 ++
+ 17 files changed, 670 insertions(+)
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/cmos.default
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/gpio.c
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c
+
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
+new file mode 100644
+index 0000000000..d3a5c3b389
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
+@@ -0,0 +1,38 @@
++if BOARD_HP_COMPAQ_ELITE_8300_CMT
++
++config BOARD_SPECIFIC_OPTIONS
++	def_bool y
++	select BOARD_ROMSIZE_KB_16384
++	select HAVE_ACPI_RESUME
++	select HAVE_ACPI_TABLES
++	select HAVE_CMOS_DEFAULT
++	select HAVE_OPTION_TABLE
++	select INTEL_INT15
++	select MAINBOARD_HAS_TPM1
++	select MAINBOARD_HAS_LIBGFXINIT
++	select MAINBOARD_USES_IFD_GBE_REGION
++	select MEMORY_MAPPED_TPM
++	select NORTHBRIDGE_INTEL_SANDYBRIDGE
++	select SERIRQ_CONTINUOUS_MODE
++	select SOUTHBRIDGE_INTEL_C216
++	select SUPERIO_NUVOTON_NPCD378
++	select USE_NATIVE_RAMINIT
++
++config CBFS_SIZE
++	default 0x570000
++
++config MAINBOARD_DIR
++	default "hp/compaq_elite_8300_cmt"
++
++config MAINBOARD_PART_NUMBER
++	default "HP Compaq Elite 8300 CMT"
++
++config VGA_BIOS_ID
++	default "8086,0152"
++
++config DRAM_RESET_GATE_GPIO
++	default 60
++
++config USBDEBUG_HCD_INDEX # FIXME: check this
++	default 2
++endif
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name
+new file mode 100644
+index 0000000000..bd399b1e76
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name
+@@ -0,0 +1,2 @@
++config BOARD_HP_COMPAQ_ELITE_8300_CMT
++	bool "Compaq Elite 8300 CMT"
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc
+new file mode 100644
+index 0000000000..fb492d3583
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc
+@@ -0,0 +1,7 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++bootblock-y += early_init.c
++bootblock-y += gpio.c
++romstage-y += early_init.c
++romstage-y += gpio.c
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl
+new file mode 100644
+index 0000000000..73fa78ef14
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl
+@@ -0,0 +1 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl
+new file mode 100644
+index 0000000000..aff432b6f4
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl
+@@ -0,0 +1,10 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++Method(_WAK, 1)
++{
++	Return(Package() {0, 0})
++}
++
++Method(_PTS, 1)
++{
++}
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl
+new file mode 100644
+index 0000000000..54f8e3fe95
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl
+@@ -0,0 +1,29 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++/* Copied over from compaq_8200_elite_sff/acpi/superio.asl */
++
++#include <superio/nuvoton/npcd378/acpi/superio.asl>
++
++Scope (\_GPE)
++{
++	Method (_L0D, 0, NotSerialized)
++	{
++		Notify (\_SB.PCI0.EHC1, 0x02)
++		Notify (\_SB.PCI0.EHC2, 0x02)
++		//FIXME: Add GBE device
++		//Notify (\_SB.PCI0.GBE, 0x02)
++	}
++
++	Method (_L09, 0, NotSerialized)
++	{
++		Notify (\_SB.PCI0.RP01, 0x02)
++		Notify (\_SB.PCI0.RP02, 0x02)
++		Notify (\_SB.PCI0.RP03, 0x02)
++		Notify (\_SB.PCI0.RP04, 0x02)
++		Notify (\_SB.PCI0.RP05, 0x02)
++		Notify (\_SB.PCI0.RP06, 0x02)
++		Notify (\_SB.PCI0.RP07, 0x02)
++		Notify (\_SB.PCI0.RP08, 0x02)
++		Notify (\_SB.PCI0.PEGP, 0x02)
++	}
++}
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c b/src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c
+new file mode 100644
+index 0000000000..8f4f83b826
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c
+@@ -0,0 +1,12 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi_gnvs.h>
++#include <soc/nvs.h>
++
++void mainboard_fill_gnvs(struct global_nvs *gnvs)
++{
++	/* Temperature at which OS will shutdown */
++	gnvs->tcrt = 100;
++	/* Temperature at which OS will throttle CPU */
++	gnvs->tpsv = 90;
++}
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt b/src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt
+new file mode 100644
+index 0000000000..16c29e82d8
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt
+@@ -0,0 +1,5 @@
++Category: desktop
++ROM protocol: SPI
++ROM socketed: n
++Flashrom support: y
++Release year: 2012
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/cmos.default b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.default
+new file mode 100644
+index 0000000000..6d27a79c66
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.default
+@@ -0,0 +1,7 @@
++boot_option=Fallback
++debug_level=Debug
++power_on_after_fail=Enable
++nmi=Enable
++sata_mode=AHCI
++gfx_uma_size=32M
++psu_fan_lvl=3
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout
+new file mode 100644
+index 0000000000..1fc83b1a55
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout
+@@ -0,0 +1,74 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++# -----------------------------------------------------------------
++entries
++
++# -----------------------------------------------------------------
++0	120	r	0	reserved_memory
++
++# -----------------------------------------------------------------
++# RTC_BOOT_BYTE (coreboot hardcoded)
++384	1	e	4	boot_option
++388	4	h	0	reboot_counter
++
++# -----------------------------------------------------------------
++# coreboot config options: console
++395	4	e	6	debug_level
++400	3	h	0	psu_fan_lvl
++
++# coreboot config options: southbridge
++408	1	e	1	nmi
++409	2	e	7	power_on_after_fail
++
++421	1	e	9	sata_mode
++
++# coreboot config options: northbridge
++432	3	e	11	gfx_uma_size
++
++448	128	r	0	vbnv
++
++# SandyBridge MRC Scrambler Seed values
++896	32	r	0	mrc_scrambler_seed
++928	32	r	0	mrc_scrambler_seed_s3
++960	16	r	0	mrc_scrambler_seed_chk
++
++# coreboot config options: check sums
++984	16	h	0	check_sum
++
++# -----------------------------------------------------------------
++
++enumerations
++
++#ID	value	text
++1	0	Disable
++1	1	Enable
++2	0	Enable
++2	1	Disable
++4	0	Fallback
++4	1	Normal
++6	0	Emergency
++6	1	Alert
++6	2	Critical
++6	3	Error
++6	4	Warning
++6	5	Notice
++6	6	Info
++6	7	Debug
++6	8	Spew
++7	0	Disable
++7	1	Enable
++7	2	Keep
++9	0	AHCI
++9	1	IDE
++11	0	32M
++11	1	64M
++11	2	96M
++11	3	128M
++11	4	160M
++11	5	192M
++11	6	224M
++
++# -----------------------------------------------------------------
++checksums
++
++checksum 392 415 984
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
+new file mode 100644
+index 0000000000..f4efabd792
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
+@@ -0,0 +1,161 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++chip northbridge/intel/sandybridge
++	register "gfx.use_spread_spectrum_clock" = "0"
++	register "gpu_dp_b_hotplug" = "0"
++	register "gpu_dp_c_hotplug" = "0"
++	register "gpu_dp_d_hotplug" = "0"
++	# BTX mainboard: Reversed mapping
++	register "spd_addresses" = "{0x53, 0x52, 0x51, 0x50}"
++	device domain 0 on
++		subsystemid 0x103c 0x3396 inherit
++
++		device ref host_bridge on end # Host bridge Host bridge
++		device ref peg10 on end # PEG
++		device ref igd on end # iGPU
++
++		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
++			register "docking_supported" = "0"
++			register "gen1_dec" = "0x00fc0a01"
++			register "gen2_dec" = "0x00fc0801"
++			register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
++			register "pcie_port_coalesce" = "1"
++			register "sata_interface_speed_support" = "0x3"
++			register "sata_port_map" = "0x1f"
++			register "spi_lvscc" = "0x2005"
++			register "spi_uvscc" = "0x2005"
++			register "superspeed_capable_ports" = "0x0000000f"
++			register "xhci_overcurrent_mapping" = "0x00000c03"
++			register "xhci_switchable_ports" = "0x0000000f"
++
++			device ref xhci on   end # USB 3.0 Controller
++			device ref mei1 off  end # Management Engine Interface 1
++			device ref mei2 off  end
++			device ref me_ide_r off end
++			device ref me_kt off end
++			device ref gbe on    end # Intel Gigabit Ethernet
++			device ref ehci1 on  end # USB2 EHCI #1
++			device ref ehci2 on  end # USB2 EHCI #2
++			device ref hda on    end # High Definition Audio
++			device ref sata1 on  end # SATA Controller 1
++			device ref sata2 off end # SATA Controller 2
++			device ref smbus on  end # SMBus
++
++			device ref pcie_rp1 on end
++			device ref pcie_rp2 on end
++			device ref pcie_rp3 on end
++			device ref pcie_rp4 on end
++			device ref pcie_rp5 on end
++			device ref pcie_rp5 on end
++			device ref pcie_rp7 on end
++			device ref pcie_rp8 on end
++
++			device ref pci_bridge on  end
++			device ref lpc on # LPC bridge
++				chip superio/common # copied from Z220
++					device pnp 2e.ff on # passes SIO base addr to SSDT gen
++						chip superio/nuvoton/npcd378
++							device pnp 2e.0 off end		# Floppy
++							device pnp 2e.1 on		# Parallel port
++								# global
++
++								# serialice: Vendor writes:
++								irq 0x14 = 0x9c
++								irq 0x1c = 0xa8
++								irq 0x1d = 0x08
++								irq 0x22 = 0x3f
++								irq 0x1a = 0xb0
++								# dumped from superiotool:
++								irq 0x1b = 0x1e
++								irq 0x27 = 0x08
++								irq 0x2a = 0x20
++								irq 0x2d = 0x01
++								# parallel port
++								io 0x60 = 0x378
++								irq 0x70 = 0x07
++								drq 0x74 = 0x01
++							end
++							device pnp 2e.2 off		# COM1
++								io 0x60 = 0x2f8
++								irq 0x70 = 3
++							end
++							device pnp 2e.3 on		# COM2, IR
++								io 0x60 = 0x3f8
++								irq 0x70 = 4
++							end
++							device pnp 2e.4 on		# LED control
++								io 0x60 = 0x600
++								# IOBASE[0h] = bit0 LED red / green
++								# IOBASE[0h] = bit1-4 LED PWM duty cycle
++								# IOBASE[1h] = bit6 SWCC
++
++								io 0x62 = 0x610
++								# IOBASE [0h] = GPES
++								# IOBASE [1h] = GPEE
++								# IOBASE [4h:7h] = 32bit upcounter at 1Mhz
++								# IOBASE [8h:bh] = GPS
++								# IOBASE [ch:fh] = GPE
++							end
++							device pnp 2e.5 on		# Mouse
++								irq 0x70 = 0xc
++							end
++							device pnp 2e.6 on		# Keyboard
++								io 0x60 = 0x0060
++								io 0x62 = 0x0064
++								irq 0x70 = 0x01
++								# serialice: Vendor writes:
++								drq 0xf0 = 0x40
++							end
++							device pnp 2e.7 on		#  WDT ?
++								io 0x60 = 0x620
++							end
++							device pnp 2e.8 on		# HWM
++								io 0x60 = 0x800
++								# IOBASE[0h:feh] HWM page
++								# IOBASE[ffh] bit0-bit3 page selector
++
++								drq 0xf0 = 0x20
++								drq 0xf1 = 0x01
++								drq 0xf2 = 0x40
++								drq 0xf3 = 0x01
++
++								drq 0xf4 = 0x66
++								drq 0xf5 = 0x67
++								drq 0xf6 = 0x66
++								drq 0xf7 = 0x01
++							end
++							device pnp 2e.f on		# GPIO OD ?
++								drq 0xf1 = 0x97
++								drq 0xf2 = 0x01
++								drq 0xf5 = 0x08
++								drq 0xfe = 0x80
++							end
++							device pnp 2e.15 on		# BUS ?
++								io 0x60 = 0x0680
++								io 0x62 = 0x0690
++							end
++							device pnp 2e.1c on		# Suspend Control ?
++								io 0x60 = 0x640
++								# writing to IOBASE[5h]
++								#  0x0: Power off
++								#  0x9: Power off and bricked until CMOS battery removed
++							end
++							device pnp 2e.1e on		# GPIO ?
++								io 0x60 = 0x660
++								drq 0xf4 = 0x01
++								# skip the following, as it
++								# looks like remapped registers
++								#drq 0xf5 = 0x06
++								#drq 0xf6 = 0x60
++								#drq 0xfe = 0x03
++							end
++						end
++					end
++				end
++				chip drivers/pc80/tpm
++					device pnp 4e.0 on end          # TPM module
++				end
++			end
++		end
++	end
++end
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl b/src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl
+new file mode 100644
+index 0000000000..e8e2b3a3e5
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl
+@@ -0,0 +1,26 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi.h>
++
++DefinitionBlock(
++	"dsdt.aml",
++	"DSDT",
++	ACPI_DSDT_REV_2,
++	OEM_ID,
++	ACPI_TABLE_CREATOR,
++	0x20141018	/* OEM revision */
++)
++{
++	#include <acpi/dsdt_top.asl>
++	#include "acpi/platform.asl"
++	#include <cpu/intel/common/acpi/cpu.asl>
++	#include <southbridge/intel/common/acpi/platform.asl>
++	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
++	#include <southbridge/intel/common/acpi/sleepstates.asl>
++
++	Device (\_SB.PCI0)
++	{
++		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
++		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
++	}
++}
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c b/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
+new file mode 100644
+index 0000000000..f6b9c0a106
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
+@@ -0,0 +1,41 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <superio/nuvoton/npcd378/npcd378.h>
++#include <superio/nuvoton/common/nuvoton.h>
++#include <northbridge/intel/sandybridge/raminit_native.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2)
++
++const struct southbridge_usb_port mainboard_usb_ports[] = {
++	{ 1, 0, 0 },
++	{ 1, 0, 0 },
++	{ 1, 0, 1 },
++	{ 1, 0, 1 },
++	{ 1, 0, 2 },
++	{ 1, 0, 2 },
++	{ 1, 0, 3 },
++	{ 1, 0, 3 },
++	{ 1, 0, 4 },
++	{ 1, 0, 4 },
++	{ 1, 0, 6 },
++	{ 1, 0, 5 },
++	{ 1, 0, 5 },
++	{ 1, 0, 6 },
++};
++
++void bootblock_mainboard_early_init(void)
++{
++	if (CONFIG(CONSOLE_SERIAL))
++		nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
++}
++
++void mainboard_get_spd(spd_raw_data *spd, bool id_only)
++{
++	/* BTX mainboard: Reversed mapping */
++	read_spd(&spd[3], 0x50, id_only);
++	read_spd(&spd[2], 0x51, id_only);
++	read_spd(&spd[1], 0x52, id_only);
++	read_spd(&spd[0], 0x53, id_only);
++}
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads b/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads
+new file mode 100644
+index 0000000000..686f7d44db
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads
+@@ -0,0 +1,17 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (DP2,
++      HDMI2,
++      Analog,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/gpio.c b/src/mainboard/hp/compaq_elite_8300_cmt/gpio.c
+new file mode 100644
+index 0000000000..2ae852ae51
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/gpio.c
+@@ -0,0 +1,191 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_GPIO,
++	.gpio2 = GPIO_MODE_NATIVE,
++	.gpio3 = GPIO_MODE_NATIVE,
++	.gpio4 = GPIO_MODE_NATIVE,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_GPIO,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_NATIVE,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_NATIVE,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_NATIVE,
++	.gpio31 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio1 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio11 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_OUTPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_OUTPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_OUTPUT,
++	.gpio29 = GPIO_DIR_OUTPUT,
++	.gpio31 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio15 = GPIO_LEVEL_LOW,
++	.gpio17 = GPIO_LEVEL_LOW,
++	.gpio28 = GPIO_LEVEL_LOW,
++	.gpio29 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio1 = GPIO_INVERT,
++	.gpio6 = GPIO_INVERT,
++	.gpio11 = GPIO_INVERT,
++	.gpio13 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_GPIO,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_GPIO,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_NATIVE,
++	.gpio46 = GPIO_MODE_GPIO,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_NATIVE,
++	.gpio52 = GPIO_MODE_NATIVE,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_NATIVE,
++	.gpio61 = GPIO_MODE_GPIO,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio32 = GPIO_DIR_INPUT,
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_INPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio43 = GPIO_DIR_INPUT,
++	.gpio46 = GPIO_DIR_INPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio61 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_GPIO,
++	.gpio71 = GPIO_MODE_GPIO,
++	.gpio72 = GPIO_MODE_GPIO,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_NATIVE,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio68 = GPIO_DIR_INPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio70 = GPIO_DIR_INPUT,
++	.gpio71 = GPIO_DIR_OUTPUT,
++	.gpio72 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++	.gpio71 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c b/src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c
+new file mode 100644
+index 0000000000..a1eafcda68
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c
+@@ -0,0 +1,33 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x10ec0221,	/* Codec Vendor / Device ID: Realtek */
++	0x103c3396,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x103c3396),
++	AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
++	AZALIA_PIN_CFG(0, 0x14, 0x01014020),
++	AZALIA_PIN_CFG(0, 0x17, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
++	AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
++	AZALIA_PIN_CFG(0, 0x1a, 0x02a11c3f),
++	AZALIA_PIN_CFG(0, 0x1b, 0x01813c30),
++	AZALIA_PIN_CFG(0, 0x1d, 0x415901f0),
++	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
++	AZALIA_PIN_CFG(0, 0x21, 0x0221102f),
++
++	0x80862806,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x58560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x58560030),
++
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c b/src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c
+new file mode 100644
+index 0000000000..8dbd95ef96
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c
+@@ -0,0 +1,16 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/device.h>
++#include <drivers/intel/gma/int15.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++static void mainboard_enable(struct device *dev)
++{
++	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE,
++					GMA_INT15_PANEL_FIT_DEFAULT,
++					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
++}
++
++struct chip_operations mainboard_ops = {
++	.enable_dev = mainboard_enable,
++};
+-- 
+2.43.0
+
diff --git a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..6c02a7fa
--- /dev/null
+++ b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
@@ -0,0 +1,646 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+CONFIG_VENDOR_HP=y
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="HP Compaq Elite 8300 CMT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="hp/compaq_elite_8300_cmt"
+CONFIG_VGA_BIOS_ID="8086,0152"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="HP"
+CONFIG_CBFS_SIZE=0xFE0000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_VBT_DATA_SIZE_KB=8
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_BOARD_HP_280_G2 is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
+# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
+# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_2170P is not set
+# CONFIG_BOARD_HP_2560P is not set
+# CONFIG_BOARD_HP_2570P is not set
+# CONFIG_BOARD_HP_2760P is not set
+# CONFIG_BOARD_HP_8460P is not set
+# CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8770W is not set
+# CONFIG_BOARD_HP_FOLIO_9470M is not set
+# CONFIG_BOARD_HP_PROBOOK_6360B is not set
+# CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 CMT"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+CONFIG_SOUTH_BRIDGE_OPTIONS=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_NUVOTON_COMMON_PRE_RAM=y
+CONFIG_SUPERIO_NUVOTON_NPCD378=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+# CONFIG_INTEL_GMA_ADD_VBT is not set
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..5acc48e3
--- /dev/null
+++ b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
@@ -0,0 +1,643 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+CONFIG_VENDOR_HP=y
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="HP Compaq Elite 8300 CMT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="hp/compaq_elite_8300_cmt"
+CONFIG_VGA_BIOS_ID="8086,0152"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="HP"
+CONFIG_CBFS_SIZE=0xFE0000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_VBT_DATA_SIZE_KB=8
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_BOARD_HP_280_G2 is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
+# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
+# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_2170P is not set
+# CONFIG_BOARD_HP_2560P is not set
+# CONFIG_BOARD_HP_2570P is not set
+# CONFIG_BOARD_HP_2760P is not set
+# CONFIG_BOARD_HP_8460P is not set
+# CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8770W is not set
+# CONFIG_BOARD_HP_FOLIO_9470M is not set
+# CONFIG_BOARD_HP_PROBOOK_6360B is not set
+# CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 CMT"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+CONFIG_SOUTH_BRIDGE_OPTIONS=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_NUVOTON_COMMON_PRE_RAM=y
+CONFIG_SUPERIO_NUVOTON_NPCD378=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+# CONFIG_INTEL_GMA_ADD_VBT is not set
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
new file mode 100644
index 00000000..6433b508
--- /dev/null
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -0,0 +1,7 @@
+tree="default"
+arch="i386-elf"
+payload_seabios="y"
+payload_seabios_withgrub="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
+grub_timeout=10
diff --git a/config/vendor/sources b/config/vendor/sources
index befee301..f5a0afc0 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -39,7 +39,7 @@
 	DL_url_bkup https://web.archive.org/web/20220708171920/https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe
 }
 
-{hp8300usdt}{
+{hp8300usdt hp8300cmt}{
 	DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
 	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
 	DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe

From 6752780f46e3747ead538a7a5b62f63fe86ab505 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 25 Dec 2023 18:51:35 +0000
Subject: [PATCH 0137/1549] coreboot: update hp elitebook configs

i had to run make-oldconfig on all of them, because
of the port that riku added the other day. lbmk doesn't
use defconfigs, it uses full configs, so we have to
make sure they're kept in sync

this patch is the result of running the following command
in a fresh clone of lbmk:

./update trees -u coreboot

i should probably switch to defconfigs.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb      | 1 +
 config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode         | 1 +
 config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb       | 1 +
 config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode          | 1 +
 config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb      | 1 +
 config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode         | 1 +
 config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb     | 1 +
 config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode        | 1 +
 config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb     | 1 +
 config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode        | 1 +
 config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb   | 1 +
 config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode      | 1 +
 config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb  | 1 +
 config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode     | 1 +
 config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb | 1 +
 config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode    | 1 +
 config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb      | 1 +
 config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode         | 1 +
 18 files changed, 18 insertions(+)

diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
index b30eecff..4a0ad5ae 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
@@ -159,6 +159,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 # CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
index 7db931bc..abbc3c50 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
@@ -157,6 +157,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 # CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
index 9fefa85c..f04664a1 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
@@ -157,6 +157,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 # CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
index 92f1ac0f..578fca08 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
@@ -155,6 +155,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 # CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
index dc5c2510..60fb4989 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
@@ -156,6 +156,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 # CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
index 281a5e65..1be47e68 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
@@ -154,6 +154,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 # CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
index b7fa04e9..39c63ac9 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
@@ -157,6 +157,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
index a5e044ad..5b1b62c2 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
@@ -155,6 +155,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
index 06fb4fd5..29cee481 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
@@ -157,6 +157,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
index 3320c6c3..a319d43c 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
@@ -155,6 +155,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
index 1f2aafb1..2f3bdb52 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
@@ -157,6 +157,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 # CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
index c20a75f3..13f8d009 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
@@ -155,6 +155,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 # CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
index bdc5c4f0..dfee9e1f 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
@@ -157,6 +157,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 # CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
index a62f42d8..727549be 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
@@ -155,6 +155,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 # CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
index 2bbd2b13..83260b61 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
@@ -158,6 +158,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 # CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
index 938a1c01..151b0060 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
@@ -156,6 +156,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 # CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
index 42e5b236..e54f8e2d 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
@@ -157,6 +157,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 # CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
index d687a382..192bb14f 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
@@ -155,6 +155,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
 # CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set

From eff9130b7ab9ce79338ae6b1ec5c2f18bad5b5ec Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 27 Dec 2023 15:18:21 +0000
Subject: [PATCH 0138/1549] update/trees: further simplify crossgcc handling

arch no longer needs to be set, on multi-tree projects,
and it has been renamed to xarch

the new behaviour is: if xarch is set, treat it as a
list of crossgcc targets and go through the list. set
the first one as the target, for what lbmk builds, but
build all of the defined crossgccc targets

crossgcc_ada is now xlang, and defines which languages
to build, rather than whether to build gcc-gnat

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/d510mo/target.cfg             |  2 +-
 config/coreboot/d510mo_16mb/target.cfg        |  2 +-
 config/coreboot/d945gclf_512kb/target.cfg     |  2 +-
 config/coreboot/d945gclf_8mb/target.cfg       |  2 +-
 config/coreboot/default/target.cfg            |  2 +-
 config/coreboot/dell/target.cfg               |  2 +-
 config/coreboot/e6400_4mb/target.cfg          |  2 +-
 config/coreboot/e6400nvidia_4mb/target.cfg    |  2 +-
 config/coreboot/e6430_12mb/target.cfg         |  2 +-
 config/coreboot/e6530_12mb/target.cfg         |  2 +-
 config/coreboot/fam15h_rdimm/target.cfg       |  4 +--
 config/coreboot/fam15h_udimm/target.cfg       |  4 +--
 config/coreboot/g43t-am3/target.cfg           |  2 +-
 config/coreboot/g43t-am3_16mb/target.cfg      |  2 +-
 config/coreboot/ga-g41m-es2l/target.cfg       |  2 +-
 config/coreboot/gru_bob/target.cfg            |  2 +-
 config/coreboot/gru_kevin/target.cfg          |  2 +-
 config/coreboot/haswell/target.cfg            |  2 +-
 config/coreboot/hp2170p_16mb/target.cfg       |  2 +-
 config/coreboot/hp2560p_8mb/target.cfg        |  2 +-
 config/coreboot/hp2570p_16mb/target.cfg       |  2 +-
 config/coreboot/hp8200sff_4mb/target.cfg      |  2 +-
 config/coreboot/hp8200sff_8mb/target.cfg      |  2 +-
 config/coreboot/hp8300cmt_16mb/target.cfg     |  2 +-
 config/coreboot/hp8300usdt_16mb/target.cfg    |  2 +-
 config/coreboot/hp8460pintel_8mb/target.cfg   |  2 +-
 config/coreboot/hp8470pintel_16mb/target.cfg  |  2 +-
 config/coreboot/hp9470m_16mb/target.cfg       |  2 +-
 config/coreboot/kcma-d8-rdimm_16mb/target.cfg |  4 +--
 config/coreboot/kcma-d8-rdimm_2mb/target.cfg  |  4 +--
 config/coreboot/kcma-d8-udimm_16mb/target.cfg |  4 +--
 config/coreboot/kcma-d8-udimm_2mb/target.cfg  |  4 +--
 config/coreboot/kfsn4-dre_1mb/target.cfg      |  4 +--
 config/coreboot/kfsn4-dre_2mb/target.cfg      |  4 +--
 .../coreboot/kgpe-d16-rdimm_16mb/target.cfg   |  4 +--
 config/coreboot/kgpe-d16-rdimm_2mb/target.cfg |  4 +--
 .../coreboot/kgpe-d16-udimm_16mb/target.cfg   |  4 +--
 config/coreboot/kgpe-d16-udimm_2mb/target.cfg |  4 +--
 config/coreboot/macbook11/target.cfg          |  2 +-
 config/coreboot/macbook11_16mb/target.cfg     |  2 +-
 config/coreboot/macbook21/target.cfg          |  2 +-
 config/coreboot/macbook21_16mb/target.cfg     |  2 +-
 config/coreboot/qemu_arm64_12mb/target.cfg    |  2 +-
 config/coreboot/qemu_x86_12mb/target.cfg      |  2 +-
 config/coreboot/r400_16mb/target.cfg          |  2 +-
 config/coreboot/r400_4mb/target.cfg           |  2 +-
 config/coreboot/r400_8mb/target.cfg           |  2 +-
 config/coreboot/r500_4mb/target.cfg           |  2 +-
 config/coreboot/t1650_12mb/target.cfg         |  2 +-
 config/coreboot/t400_16mb/target.cfg          |  2 +-
 config/coreboot/t400_4mb/target.cfg           |  2 +-
 config/coreboot/t400_8mb/target.cfg           |  2 +-
 config/coreboot/t420_8mb/target.cfg           |  2 +-
 config/coreboot/t420s_8mb/target.cfg          |  2 +-
 config/coreboot/t430_12mb/target.cfg          |  2 +-
 config/coreboot/t440plibremrc_12mb/target.cfg |  2 +-
 config/coreboot/t440pmrc_12mb/target.cfg      |  2 +-
 config/coreboot/t500_16mb/target.cfg          |  2 +-
 config/coreboot/t500_4mb/target.cfg           |  2 +-
 config/coreboot/t500_8mb/target.cfg           |  2 +-
 config/coreboot/t520_8mb/target.cfg           |  2 +-
 config/coreboot/t530_12mb/target.cfg          |  2 +-
 config/coreboot/t60_16mb_intelgpu/target.cfg  |  2 +-
 config/coreboot/t60_intelgpu/target.cfg       |  2 +-
 config/coreboot/w500_16mb/target.cfg          |  2 +-
 config/coreboot/w500_4mb/target.cfg           |  2 +-
 config/coreboot/w500_8mb/target.cfg           |  2 +-
 config/coreboot/w530_12mb/target.cfg          |  2 +-
 config/coreboot/w541_12mb/target.cfg          |  2 +-
 config/coreboot/w541mrc_12mb/target.cfg       |  2 +-
 config/coreboot/x200_16mb/target.cfg          |  2 +-
 config/coreboot/x200_4mb/target.cfg           |  2 +-
 config/coreboot/x200_8mb/target.cfg           |  2 +-
 config/coreboot/x201_8mb/target.cfg           |  2 +-
 config/coreboot/x220_8mb/target.cfg           |  2 +-
 config/coreboot/x220edp_8mb/target.cfg        |  2 +-
 config/coreboot/x230_12mb/target.cfg          |  2 +-
 config/coreboot/x230_16mb/target.cfg          |  2 +-
 config/coreboot/x230edp_12mb/target.cfg       |  2 +-
 config/coreboot/x230t_12mb/target.cfg         |  2 +-
 config/coreboot/x230t_16mb/target.cfg         |  2 +-
 config/coreboot/x301_16mb/target.cfg          |  2 +-
 config/coreboot/x301_4mb/target.cfg           |  2 +-
 config/coreboot/x301_8mb/target.cfg           |  2 +-
 config/coreboot/x60/target.cfg                |  2 +-
 config/coreboot/x60_16mb/target.cfg           |  2 +-
 config/seabios/default/target.cfg             |  1 -
 config/u-boot/default/target.cfg              |  2 +-
 config/u-boot/gru_bob/target.cfg              |  2 +-
 config/u-boot/gru_kevin/target.cfg            |  2 +-
 config/u-boot/qemu_arm64_12mb/target.cfg      |  2 +-
 config/u-boot/qemu_x86_12mb/target.cfg        |  2 +-
 script/build/roms                             |  3 +-
 script/update/trees                           | 33 +++++++------------
 94 files changed, 115 insertions(+), 128 deletions(-)

diff --git a/config/coreboot/d510mo/target.cfg b/config/coreboot/d510mo/target.cfg
index 251cae5b..69c1db41 100644
--- a/config/coreboot/d510mo/target.cfg
+++ b/config/coreboot/d510mo/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/d510mo_16mb/target.cfg b/config/coreboot/d510mo_16mb/target.cfg
index 3958f90b..1e7b56ca 100644
--- a/config/coreboot/d510mo_16mb/target.cfg
+++ b/config/coreboot/d510mo_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
diff --git a/config/coreboot/d945gclf_512kb/target.cfg b/config/coreboot/d945gclf_512kb/target.cfg
index 4c1ed0b6..cfae0b2c 100644
--- a/config/coreboot/d945gclf_512kb/target.cfg
+++ b/config/coreboot/d945gclf_512kb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/d945gclf_8mb/target.cfg b/config/coreboot/d945gclf_8mb/target.cfg
index 4c1ed0b6..cfae0b2c 100644
--- a/config/coreboot/d945gclf_8mb/target.cfg
+++ b/config/coreboot/d945gclf_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/default/target.cfg b/config/coreboot/default/target.cfg
index 19672664..231397bd 100644
--- a/config/coreboot/default/target.cfg
+++ b/config/coreboot/default/target.cfg
@@ -1,3 +1,3 @@
 tree="default"
 rev="d862695f5f432b5c78dada5f16c293a4c3f9fce6"
-arch="i386-elf"
+xarch="i386-elf"
diff --git a/config/coreboot/dell/target.cfg b/config/coreboot/dell/target.cfg
index eecaecfd..d8ec61d6 100644
--- a/config/coreboot/dell/target.cfg
+++ b/config/coreboot/dell/target.cfg
@@ -1,3 +1,3 @@
 tree="dell"
 rev="d862695f5f432b5c78dada5f16c293a4c3f9fce6"
-arch="i386-elf"
+xarch="i386-elf"
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index 46a3425e..3a458ee4 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="dell"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
index 46a3425e..3a458ee4 100644
--- a/config/coreboot/e6400nvidia_4mb/target.cfg
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="dell"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index ddcf32d4..03fd230b 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index ddcf32d4..03fd230b 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/fam15h_rdimm/target.cfg b/config/coreboot/fam15h_rdimm/target.cfg
index 60827616..7d60e76a 100644
--- a/config/coreboot/fam15h_rdimm/target.cfg
+++ b/config/coreboot/fam15h_rdimm/target.cfg
@@ -1,8 +1,8 @@
 tree="fam15h_rdimm"
 rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="n"
 payload_memtest="n"
-crossgcc_ada="n"
+xlang="c"
diff --git a/config/coreboot/fam15h_udimm/target.cfg b/config/coreboot/fam15h_udimm/target.cfg
index 80565e90..6b2d493d 100644
--- a/config/coreboot/fam15h_udimm/target.cfg
+++ b/config/coreboot/fam15h_udimm/target.cfg
@@ -1,8 +1,8 @@
 tree="fam15h_udimm"
 rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="n"
 payload_memtest="n"
-crossgcc_ada="n"
+xlang="c"
diff --git a/config/coreboot/g43t-am3/target.cfg b/config/coreboot/g43t-am3/target.cfg
index db5a46d9..13f2a260 100644
--- a/config/coreboot/g43t-am3/target.cfg
+++ b/config/coreboot/g43t-am3/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grub_timeout=10
diff --git a/config/coreboot/g43t-am3_16mb/target.cfg b/config/coreboot/g43t-am3_16mb/target.cfg
index db5a46d9..13f2a260 100644
--- a/config/coreboot/g43t-am3_16mb/target.cfg
+++ b/config/coreboot/g43t-am3_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grub_timeout=10
diff --git a/config/coreboot/ga-g41m-es2l/target.cfg b/config/coreboot/ga-g41m-es2l/target.cfg
index 755d23a9..ef85da4b 100644
--- a/config/coreboot/ga-g41m-es2l/target.cfg
+++ b/config/coreboot/ga-g41m-es2l/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ata"
diff --git a/config/coreboot/gru_bob/target.cfg b/config/coreboot/gru_bob/target.cfg
index 10c4285c..a7c36159 100644
--- a/config/coreboot/gru_bob/target.cfg
+++ b/config/coreboot/gru_bob/target.cfg
@@ -1,3 +1,3 @@
 tree="default"
-arch="aarch64-elf"
+xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
diff --git a/config/coreboot/gru_kevin/target.cfg b/config/coreboot/gru_kevin/target.cfg
index 10c4285c..a7c36159 100644
--- a/config/coreboot/gru_kevin/target.cfg
+++ b/config/coreboot/gru_kevin/target.cfg
@@ -1,3 +1,3 @@
 tree="default"
-arch="aarch64-elf"
+xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
diff --git a/config/coreboot/haswell/target.cfg b/config/coreboot/haswell/target.cfg
index 08d2c6e2..b3196341 100644
--- a/config/coreboot/haswell/target.cfg
+++ b/config/coreboot/haswell/target.cfg
@@ -1,3 +1,3 @@
 tree="haswell"
 rev="1411ecf6f0b2c7395bcb96b856dcfdddb1b0c81b"
-arch="i386-elf"
+xarch="i386-elf"
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index fdbb4f51..fee132f4 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index fdbb4f51..fee132f4 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index fdbb4f51..fee132f4 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 6433b508..0badb4fb 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 6433b508..0badb4fb 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index 6433b508..0badb4fb 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index 6433b508..0badb4fb 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index fdbb4f51..fee132f4 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index fdbb4f51..fee132f4 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index fdbb4f51..fee132f4 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
index 1a177eaf..d5d37291 100644
--- a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
@@ -1,7 +1,7 @@
 tree="fam15h_rdimm"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
-crossgcc_ada="n"
+xlang="c"
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
index 1a177eaf..d5d37291 100644
--- a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
@@ -1,7 +1,7 @@
 tree="fam15h_rdimm"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
-crossgcc_ada="n"
+xlang="c"
diff --git a/config/coreboot/kcma-d8-udimm_16mb/target.cfg b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
index 869798fa..a8a4a5fc 100644
--- a/config/coreboot/kcma-d8-udimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
@@ -1,7 +1,7 @@
 tree="fam15h_udimm"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
-crossgcc_ada="n"
+xlang="c"
diff --git a/config/coreboot/kcma-d8-udimm_2mb/target.cfg b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
index 869798fa..a8a4a5fc 100644
--- a/config/coreboot/kcma-d8-udimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
@@ -1,7 +1,7 @@
 tree="fam15h_udimm"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
-crossgcc_ada="n"
+xlang="c"
diff --git a/config/coreboot/kfsn4-dre_1mb/target.cfg b/config/coreboot/kfsn4-dre_1mb/target.cfg
index 375b5894..19c57b8d 100644
--- a/config/coreboot/kfsn4-dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4-dre_1mb/target.cfg
@@ -1,6 +1,6 @@
 tree="fam15h_udimm"
-arch="i386-elf"
+xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
-crossgcc_ada="n"
+xlang="c"
 grub_timeout=10
diff --git a/config/coreboot/kfsn4-dre_2mb/target.cfg b/config/coreboot/kfsn4-dre_2mb/target.cfg
index f972c863..9bd20d45 100644
--- a/config/coreboot/kfsn4-dre_2mb/target.cfg
+++ b/config/coreboot/kfsn4-dre_2mb/target.cfg
@@ -1,7 +1,7 @@
 tree="fam15h_udimm"
-arch="i386-elf"
+xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-crossgcc_ada="n"
+xlang="c"
 grub_timeout=10
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
index f444f22e..2867a730 100644
--- a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
@@ -1,7 +1,7 @@
 tree="fam15h_rdimm"
-arch="i386-elf"
+xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-crossgcc_ada="n"
+xlang="c"
 grub_timeout=10
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
index f444f22e..2867a730 100644
--- a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
@@ -1,7 +1,7 @@
 tree="fam15h_rdimm"
-arch="i386-elf"
+xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-crossgcc_ada="n"
+xlang="c"
 grub_timeout=10
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
index f972c863..9bd20d45 100644
--- a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
@@ -1,7 +1,7 @@
 tree="fam15h_udimm"
-arch="i386-elf"
+xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-crossgcc_ada="n"
+xlang="c"
 grub_timeout=10
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
index f972c863..9bd20d45 100644
--- a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
@@ -1,7 +1,7 @@
 tree="fam15h_udimm"
-arch="i386-elf"
+xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-crossgcc_ada="n"
+xlang="c"
 grub_timeout=10
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index 78bb05d0..cc83f2c3 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index 78bb05d0..cc83f2c3 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/qemu_arm64_12mb/target.cfg b/config/coreboot/qemu_arm64_12mb/target.cfg
index 10c4285c..a7c36159 100644
--- a/config/coreboot/qemu_arm64_12mb/target.cfg
+++ b/config/coreboot/qemu_arm64_12mb/target.cfg
@@ -1,3 +1,3 @@
 tree="default"
-arch="aarch64-elf"
+xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg
index ceda8dd3..fc263ecc 100644
--- a/config/coreboot/qemu_x86_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_12mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index e889d1ee..e6d3bec6 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index 33790c67..d36486ab 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -1,5 +1,5 @@
 tree="haswell"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/t440pmrc_12mb/target.cfg b/config/coreboot/t440pmrc_12mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/t440pmrc_12mb/target.cfg
+++ b/config/coreboot/t440pmrc_12mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 91aa5f9b..5316aa6f 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 91aa5f9b..5316aa6f 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index 33790c67..d36486ab 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -1,5 +1,5 @@
 tree="haswell"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
diff --git a/config/coreboot/w541mrc_12mb/target.cfg b/config/coreboot/w541mrc_12mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/w541mrc_12mb/target.cfg
+++ b/config/coreboot/w541mrc_12mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x201_8mb/target.cfg b/config/coreboot/x201_8mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/x201_8mb/target.cfg
+++ b/config/coreboot/x201_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x220edp_8mb/target.cfg b/config/coreboot/x220edp_8mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/x220edp_8mb/target.cfg
+++ b/config/coreboot/x220edp_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/x230_12mb/target.cfg
+++ b/config/coreboot/x230_12mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x230edp_12mb/target.cfg b/config/coreboot/x230edp_12mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/x230edp_12mb/target.cfg
+++ b/config/coreboot/x230edp_12mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/x230t_12mb/target.cfg
+++ b/config/coreboot/x230t_12mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index 981435d4..8688df3f 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 91aa5f9b..5316aa6f 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 91aa5f9b..5316aa6f 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
diff --git a/config/seabios/default/target.cfg b/config/seabios/default/target.cfg
index 5d2b3059..8ab09802 100644
--- a/config/seabios/default/target.cfg
+++ b/config/seabios/default/target.cfg
@@ -1,3 +1,2 @@
-arch="i386-elf"
 tree="default"
 rev="1e1da7a963007d03a4e0e9a9e0ff17990bb1608d"
diff --git a/config/u-boot/default/target.cfg b/config/u-boot/default/target.cfg
index 2938f66e..fdd04865 100644
--- a/config/u-boot/default/target.cfg
+++ b/config/u-boot/default/target.cfg
@@ -1,3 +1,3 @@
 tree="default"
 rev="4459ed60cb1e0562bc5b40405e2b4b9bbf766d57" # v2023.10
-arch="aarch64-elf"
+xarch="aarch64-elf arm-eabi"
diff --git a/config/u-boot/gru_bob/target.cfg b/config/u-boot/gru_bob/target.cfg
index 5043af7e..1633e9df 100644
--- a/config/u-boot/gru_bob/target.cfg
+++ b/config/u-boot/gru_bob/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-arch="aarch64-elf"
+xarch="aarch64-elf arm-eabi"
diff --git a/config/u-boot/gru_kevin/target.cfg b/config/u-boot/gru_kevin/target.cfg
index 5043af7e..1633e9df 100644
--- a/config/u-boot/gru_kevin/target.cfg
+++ b/config/u-boot/gru_kevin/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-arch="aarch64-elf"
+xarch="aarch64-elf arm-eabi"
diff --git a/config/u-boot/qemu_arm64_12mb/target.cfg b/config/u-boot/qemu_arm64_12mb/target.cfg
index 5043af7e..1633e9df 100644
--- a/config/u-boot/qemu_arm64_12mb/target.cfg
+++ b/config/u-boot/qemu_arm64_12mb/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-arch="aarch64-elf"
+xarch="aarch64-elf arm-eabi"
diff --git a/config/u-boot/qemu_x86_12mb/target.cfg b/config/u-boot/qemu_x86_12mb/target.cfg
index ccff2e3f..2c300b24 100644
--- a/config/u-boot/qemu_x86_12mb/target.cfg
+++ b/config/u-boot/qemu_x86_12mb/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-arch="i386-elf"
+xarch="i386-elf"
diff --git a/script/build/roms b/script/build/roms
index 44e6db14..aa32ff35 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -21,7 +21,7 @@ kmapdir="config/grub/keymap"
 # target.cfg files have to specifically enable [a] payload(s)
 pv="payload_grub payload_grub_withseabios payload_seabios payload_memtest t"
 pv="${pv} payload_seabios_withgrub payload_seabios_grubonly payload_uboot memtest_bin"
-v="romdir cbrom initmode displaymode cbcfg targetdir tree arch keymaps"
+v="romdir cbrom initmode displaymode cbcfg targetdir tree keymaps"
 v="${v} grub_timeout ubdir board grub_scan_disk uboot_config"
 eval "$(setvars "n" ${pv})"
 eval "$(setvars "" ${v} boards _displaymode _payload _keyboard all targets)"
@@ -84,7 +84,6 @@ configure_target()
 	    && [ "${grub_scan_disk}" != "ahci" ] && \
 		grub_scan_disk="both"
 
-	[ -z "$arch" ] && err "$board: arch not defined"
 	[ -z "$tree" ] && err "$board: tree not defined"
 
 	[ "${payload_memtest}" != "y" ] && payload_memtest="n"
diff --git a/script/update/trees b/script/update/trees
index 9186ebb1..4c969df7 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -10,7 +10,7 @@ set -u -e
 . "include/option.sh"
 . "include/git.sh"
 
-eval "$(setvars "" arch cfgsdir codedir config config_name crossgcc_ada mode \
+eval "$(setvars "" xarch cfgsdir codedir config config_name xlang mode \
     elfdir listfile project target target_dir targets tree _f target1)"
 
 main()
@@ -140,12 +140,11 @@ handle_src_tree()
 	fi
 
 	x_ mkdir -p "${elfdir}/${target}"
-	eval "$(setvars "" arch tree)"
+	eval "$(setvars "" xarch xlang tree)"
 
 	. "${target_dir}/target.cfg" || \
 	    err "handle_src_tree ${target_dir}: cannot load target.cfg"
 
-	[ -z "$arch" ] && err "handle_src_tree $project/$tree: arch unset"
 	[ -z "$tree" ] && err "handle_src_tree $project/$tree: tree unset"
 
 	codedir="src/${project}/${tree}"
@@ -165,31 +164,21 @@ handle_src_tree()
 	check_cross_compiler
 }
 
-# set up cross-compiler (coreboot crossgcc) for u-boot and coreboot
-# (seabios and grub currently use hostcc, not crossgcc)
 check_cross_compiler()
 {
-	[ "$project" = "u-boot" ] || [ "$project" = "coreboot" ] || return 0
-	[ -z "$arch" ] && err "${project}/${tree}: arch isn't set"
+	for _xarch in $xarch; do
+		cbdir="src/coreboot/${tree}"
+		[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
 
-	_arch="$arch"
-	[ "$arch" = "aarch64-elf" ] && _arch="aarch64-elf arm-eabi"
+		x_ ./update trees -f coreboot ${cbdir#src/coreboot/}
 
-	[ "$crossgcc_ada" = "y" ] || [ "$crossgcc_ada" = "n" ] || crossgcc_ada=y
-	[ "$crossgcc_ada" = "y" ] || export BUILD_LANGUAGES=c
+		export PATH="${PWD}/${cbdir}/util/crossgcc/xgcc/bin:$PATH"
+		export CROSS_COMPILE="${xarch% *}-"
+		[ -n "${xlang}" ] && export BUILD_LANGUAGES="$xlang"
 
-	cbdir="src/coreboot/${tree}"
-	[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
-	x_ ./update trees -f coreboot ${cbdir#src/coreboot/}
-
-	for xarch in $_arch; do
-		[ -d "${cbdir}/util/crossgcc/xgcc/${xarch}/" ] && continue
-		x_ make -C "$cbdir" crossgcc-${xarch%-*} CPUS=$(nproc)
+		[ -d "${cbdir}/util/crossgcc/xgcc/${_xarch}/" ] && continue
+		x_ make -C "$cbdir" crossgcc-${_xarch%-*} CPUS=$(nproc)
 	done
-
-	# we *must* ensure that u-boot's build system uses crossgcc first
-	export PATH="${PWD}/${cbdir}/util/crossgcc/xgcc/bin:$PATH"
-	export CROSS_COMPILE="${_arch% *}-"
 }
 
 check_config()

From 0c1d08d8b1c5757ca10487fb3256741718009ac1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 27 Dec 2023 17:20:55 +0000
Subject: [PATCH 0139/1549] build/serprog: err if basename fails

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/serprog | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/build/serprog b/script/build/serprog
index 28cd70a4..8b003add 100755
--- a/script/build/serprog
+++ b/script/build/serprog
@@ -71,7 +71,7 @@ print_boards()
 
 list_boards()
 {
-	basename -a -s .h "${1}/"*.h
+	basename -a -s .h "${1}/"*.h || err "list_boards $1: can't list boards"
 }
 
 main $@

From bc87b5f67e49c8e51e58a68e0651fd6ed176bb7d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 27 Dec 2023 17:26:37 +0000
Subject: [PATCH 0140/1549] lbmk scripts: general code cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/err.sh      |  1 -
 include/option.sh   |  4 ++--
 script/update/trees | 20 ++++----------------
 3 files changed, 6 insertions(+), 19 deletions(-)

diff --git a/include/err.sh b/include/err.sh
index 3c596b17..cab81d02 100755
--- a/include/err.sh
+++ b/include/err.sh
@@ -53,7 +53,6 @@ check_project()
 		p_="x_ printf \"%s\\n\" \"\$$p\" > $p"
 		eval "x$p_ || $p_"
 	done
-
 	export LOCALVERSION="-${projectname}-${version%%-*}"
 }
 
diff --git a/include/option.sh b/include/option.sh
index 31411423..8367d447 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -46,9 +46,9 @@ scan_config()
 		set ${line} 1>/dev/null 2>/dev/null || :
 		if [ "${1%:}" = "depend" ]; then
 			depend="${depend} ${2}"
-			continue
+		else
+			eval "${1%:}=\"${2}\""
 		fi
-		eval "${1%:}=\"${2}\""
 	done << EOF
 	$(eval "awk '${awkstr}' \"${revfile}\"")
 EOF
diff --git a/script/update/trees b/script/update/trees
index 4c969df7..da42d200 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -44,11 +44,7 @@ main()
 build_projects()
 {
 	[ $# -gt 0 ] && x_ ./update trees $_f $@
-
-	if [ "${mode}" = "fetch" ]; then
-		fetch_project_repo
-		return 0
-	fi
+	[ "$mode" = "fetch" ] && eval "fetch_project_repo; return 0;"
 
 	codedir="src/${project}"
 	[ -d "$codedir" ] || x_ ./update trees -f "$project"
@@ -86,7 +82,6 @@ build_targets()
 	[ $# -gt 0 ] && targets=$@
 
 	[ -z "$mode" ] && x_ mkdir -p "$elfdir"
-
 	handle_targets
 }
 
@@ -111,10 +106,8 @@ handle_defconfig()
 {
 	handle_src_tree "$target" || return 0
 
-	if [ "$target1" = "utils" ] && [ "$project" = "coreboot" ]; then
-		handle_coreboot_utils "$tree"
-		return 0
-	fi
+	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && \
+		eval "handle_coreboot_utils \"$tree\"; return 0"
 
 	for y in "${target_dir}/config"/*; do
 		[ -f "$y" ] || continue
@@ -133,11 +126,7 @@ handle_defconfig()
 handle_src_tree()
 {
 	target_dir="${cfgsdir}/${target}"
-
-	if [ "$mode" = "fetch" ]; then
-		fetch_project_trees
-		return 1
-	fi
+	[ "$mode" = "fetch" ] && eval "fetch_project_trees; return 1;"
 
 	x_ mkdir -p "${elfdir}/${target}"
 	eval "$(setvars "" xarch xlang tree)"
@@ -236,7 +225,6 @@ copy_elf()
 		[ ! -f "${codedir}/$f" ] || \
 			x_ cp "${codedir}/${f}" "$dest_dir"
 	done < "$listfile"
-
 	x_ make clean -C "$codedir"
 }
 

From 4e06779948744b3d7c09b3749ddc06e0b9e73732 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 28 Dec 2023 14:48:11 +0000
Subject: [PATCH 0141/1549] disable u-boot on x86 qemu

it's not well-tested and currently doesn't build

this is for later

remove for now

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/qemu_x86_12mb/target.cfg | 1 -
 1 file changed, 1 deletion(-)

diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg
index fc263ecc..4d03eb4a 100644
--- a/config/coreboot/qemu_x86_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_12mb/target.cfg
@@ -4,5 +4,4 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
-payload_uboot="y"
 grub_scan_disk="both"

From 34ded35fa616a323f582d3e942d7b49ac9beeef4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 28 Dec 2023 16:34:45 +0000
Subject: [PATCH 0142/1549] lbmk scripts: general code cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh        |  6 ++----
 script/build/roms     |  6 ++----
 script/update/release |  3 +--
 script/update/trees   | 10 +++-------
 script/vendor/inject  | 39 +++++++++++----------------------------
 5 files changed, 19 insertions(+), 45 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 6184ba0c..b0ebc937 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -90,8 +90,7 @@ verify_config()
 {
 	[ -z "${rev+x}" ] && err 'verify_config: rev not set'
 	[ -z "${loc+x}" ] && err 'verify_config: loc not set'
-	[ -z "${url+x}" ] && err 'verify_config: url not set'
-	return 0
+	[ -z "${url+x}" ] && err 'verify_config: url not set'; return 0
 }
 
 clone_project()
@@ -146,6 +145,5 @@ git_am_patches()
 		[ ! -d "${patches}" ] && continue
 		git_am_patches "${sdir}" "${patches}"
 	done
-	[ "${patchfail}" = "y" ] && return 1
-	return 0
+	[ "${patchfail}" = "y" ] && return 1; return 0
 }
diff --git a/script/build/roms b/script/build/roms
index aa32ff35..95b697ec 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -165,8 +165,7 @@ build_dependency_grub()
 		    rebuild_grub="y"
 	done
 	[ -n "${_keyboard}" ] && keymaps="${kmapdir}/${_keyboard}.gkb"
-	[ "${rebuild_grub}" = "y" ] || return 0
-	x_ ./build grub
+	[ "${rebuild_grub}" = "y" ] && x_ ./build grub; return 0
 }
 
 build_dependency_uboot()
@@ -179,7 +178,7 @@ build_dependency_uboot()
 	[ ! -f "${ubootelf}" ] && [ -f "${ubdir}/u-boot" ] && \
 		ubootelf="${ubdir}/u-boot"
 	[ -f "${ubootelf}" ] && return 0
-	err "Could not find u-boot build for board, ${board}"
+	err "Can't find u-boot build for board, $board";
 }
 
 build_target()
@@ -365,7 +364,6 @@ mkSeabiosGrubonlyRom()
 	x_ rm -f "${tmpbootorder}"
 
 	x_ "${cbfstool}" "${_grubrom}" add-int -i 0 -n etc/show-boot-menu
-
 	x_ moverom "${_grubrom}" "${_newrom%.rom}_grubonly.rom"
 }
 
diff --git a/script/update/release b/script/update/release
index e47aef80..7e0492f4 100755
--- a/script/update/release
+++ b/script/update/release
@@ -128,8 +128,7 @@ handle_rom_archive()
 	insert_version_files "${romdir}" || \
 	    err "mkrom_tarball ${romdir}: versionfile"
 
-	insert_copying_files "$romdir" || \
-	    err "!insert copy, handle 2, $romdir"
+	insert_copying_files "$romdir" || err "!insert copy, handle 2, $romdir"
 	mkrom_tarball
 }
 
diff --git a/script/update/trees b/script/update/trees
index da42d200..556181ed 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -98,8 +98,7 @@ handle_targets()
 	done
 
 	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
-	[ -z "${mode}" ] || return 0
-	printf "Done! The files are stored under %s/\n\n" "$elfdir"
+	[ -z "${mode}" ] && printf "Done! Check  %s/\n\n" "$elfdir"; return 0
 }
 
 handle_defconfig()
@@ -149,8 +148,7 @@ handle_src_tree()
 	fi
 
 	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
-	[ -z "$mode" ] || return 0
-	check_cross_compiler
+	[ -z "$mode" ] && check_cross_compiler; return 0
 }
 
 check_cross_compiler()
@@ -172,8 +170,7 @@ check_cross_compiler()
 
 check_config()
 {
-	[ -f "$config" ] || \
-		err "check_config: ${project}/${target}: configs missing"
+	[ -f "$config" ] || err "check_config: ${project}/${target}: no config"
 
 	dest_dir="${elfdir}/${target}/${config_name}"
 	# TODO: very hacky check. do it properly (based on build.list)
@@ -214,7 +211,6 @@ run_make_command()
 		    > "${codedir}/.coreboot-version"
 
 	x_ make $mode -j$(nproc) -C "$codedir"
-
 	[ "$mode" != "clean" ] && return 0
 	make -C "$codedir" distclean 2>/dev/null || :
 }
diff --git a/script/vendor/inject b/script/vendor/inject
index cec19b2e..5734b599 100755
--- a/script/vendor/inject
+++ b/script/vendor/inject
@@ -14,10 +14,7 @@ eval "$(setvars "" archive rom modifygbe nukemode release new_mac)"
 main()
 {
 	[ $# -lt 1 ] && err "No options specified."
-	if [ "${1}" = "listboards" ]; then
-		items config/coreboot || :
-		exit 0
-	fi
+	[ "${1}" = "listboards" ] && eval "items config/coreboot || :; exit 0"
 
 	archive="${1}"
 
@@ -45,20 +42,16 @@ check_board()
 	failcheck="n"
 	check_release "${archive}" || failcheck="y"
 	if [ "${failcheck}" = "y" ]; then
-		[ -f "${rom}" ] || \
-			err "check_board: \"${rom}\" is not a valid path"
-		[ -z "${rom+x}" ] && \
-			err "check_board: no rom specified"
-		[ -n "${board+x}" ] || \
-			board=$(detect_board "${rom}")
+		[ -f "$rom" ] || err "check_board \"$rom\": invalid path"
+		[ -z "${rom+x}" ] && err "check_board: no rom specified"
+		[ -n "${board+x}" ] || board=$(detect_board "${rom}")
 	else
 		release="y"
 		board=$(detect_board "${archive}")
 	fi
 
 	boarddir="${cbcfgsdir}/${board}"
-	[ -d "${boarddir}" ] && return 0
-	err "check_board: board ${board} not found"
+	[ -d "$boarddir" ] || err "check_board: board $board missing"; return 0
 }
 
 check_release()
@@ -85,8 +78,7 @@ detect_board()
 	*)
 		err "detect_board $filename: could not detect board type"
 	esac	
-	[ -d "${boarddir}/" ] || \
-		err "detect_board: dir, ${boarddir}, doesn't exist"
+	[ -d "$boarddir" ] || err "detect_board: dir \"$boarddir\" missing"
 	printf "%s\n" "${board}"
 }
 
@@ -97,17 +89,12 @@ build_dependencies()
 		x_ ./update trees -b coreboot utils default
 	fi
 	[ -z "$new_mac" ] || [ -f "$nvmutil" ] || x_ make -C util/nvmutil
-	[ "${nukemode}" = "nuke" ] && return 0
-	x_ ./vendor download ${board}
+	[ "$nukemode" = "nuke" ] || x_ ./vendor download $board; return 0
 }
 
 inject_vendorfiles()
 {
-	if [ "${release}" != "y" ]; then
-		patch_rom "${rom}"
-		return 0
-	fi
-	printf "patching release images\n"
+	[ "${release}" != "y" ] && eval "patch_rom \"$rom\"; return 0"
 	patch_release_roms
 }
 
@@ -134,18 +121,16 @@ patch_release_roms()
 	    err "patch_release_roms: ROMs did not match expected hashes"
 	) || err "can't verify vendor hashes"
 
-	if [ "${modifygbe}" = "true" ]; then
+	[ "${modifygbe}" = "true" ] && \
 		for x in "${_tmpdir}"/bin/*/*.rom ; do
 			modify_gbe "${x}"
 		done
-	fi
 
 	[ -d bin/release ] || x_ mkdir -p bin/release
 	x_ mv "${_tmpdir}"/bin/* bin/release/
+	x_ rm -Rf "${_tmpdir}"
 
 	printf "Success! Your ROMs are in bin/release\n"
-
-	x_ rm -Rf "${_tmpdir}"
 }
 
 patch_rom()
@@ -195,8 +180,7 @@ inject()
 		err "inject_${dl_type}: file missing, ${_dest}"
 
 	[ "$nukemode" = "nuke" ] || \
-		printf "Inserting %s/%s into file: %s\n" \
-		    "${cbfsname}" "${_t}" "$rom"
+		printf "Inserting %s/%s in file: %s\n" "$cbfsname" "$_t" "$rom"
 
 	if [ "${_t}" = "GbE" ]; then
 		x_ mkdir -p tmp
@@ -223,7 +207,6 @@ inject()
 			"$cbfstool" "$rom" remove -n "$cbfsname" || \
 			    err "inject $rom: can't remove $cbfsname"
 		fi
-
 	fi
 }
 

From eb3a8e2b53ab2a81847a154d86e84b7e9fff0bb8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 30 Dec 2023 13:08:29 +0000
Subject: [PATCH 0143/1549] unify script/update/trees and script/build/grub

the script can now also handle autoconf build systems,
whereas this could previously only be done for grub.

with this change, the overall sloccount is also lower

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/option.sh   |  5 ++-
 script/build/grub   | 81 ---------------------------------------------
 script/build/roms   | 44 +++++++++++++++++++++++-
 script/update/trees | 30 ++++++++++++++---
 4 files changed, 73 insertions(+), 87 deletions(-)
 delete mode 100755 script/build/grub

diff --git a/include/option.sh b/include/option.sh
index 8367d447..7c434444 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-3.0-only
 # SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 # SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# SPDX-FileCopyrightText: 2023 Leah Rowe <leah@libreboot.org>
+# SPDX-FileCopyrightText: 2020-2023 Leah Rowe <leah@libreboot.org>
 
 vendir="vendorfiles"
 appdir="${vendir}/app"
@@ -9,6 +9,9 @@ cbdir="src/coreboot/default"
 cbcfgsdir="config/coreboot"
 ifdtool="cbutils/default/ifdtool"
 cbfstool="cbutils/default/cbfstool"
+grubcfgsdir="config/grub"
+layoutdir="/boot/grub/layouts"
+. "${grubcfgsdir}/modules.list"
 
 eval "$(setvars "" CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
     CONFIG_ME_BIN_PATH CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 \
diff --git a/script/build/grub b/script/build/grub
deleted file mode 100755
index 3313684d..00000000
--- a/script/build/grub
+++ /dev/null
@@ -1,81 +0,0 @@
-#!/usr/bin/env sh
-# SPDX-License-Identifier: GPL-3.0-or-later
-# SPDX-FileCopyrightText: 2014,2015,2020,2021,2023 Leah Rowe <leah@libreboot.org>
-
-set -u -e
-
-. "include/err.sh"
-
-elfdir="elf/grub"
-grubcfgsdir="config/grub"
-layoutdir="/boot/grub/layouts"
-
-. "${grubcfgsdir}/modules.list"
-
-main()
-{
-	handle_dependencies
-	build_keymap_configs
-	build_grub_payload
-	printf "GRUB files now available under directory: %s\n" "${elfdir}"
-}
-
-handle_dependencies()
-{
-	[ -d "src/grub" ] || x_ ./update trees -f grub
-	[ -f "src/grub/grub-mkstandalone" ] || build_grub_utils
-	x_ mkdir -p "${elfdir}"
-	rm -f "${elfdir}/"* || err "!rm elf, handle_, ${elfdir}/"
-}
-
-build_grub_utils()
-{
-	(
-	x_ cd "src/grub"
-	[ ! -d Makefile ] || x_ make distclean
-	x_ ./bootstrap --gnulib-srcdir=gnulib/ --no-git
-	x_ ./autogen.sh
-	x_ ./configure --with-platform=coreboot
-	make -j$(nproc) FS_PAYLOAD_MODULES="" || err "!mk grub utils"
-	) || err "grub build error"
-}
-
-build_keymap_configs()
-{
-	for keylayoutfile in "${grubcfgsdir}/keymap/"*.gkb; do
-		[ -f "${keylayoutfile}" ] || continue
-		keymap="${keylayoutfile##"${grubcfgsdir}/keymap/"}"
-		keymap="${keymap%.gkb}"
-		printf "keymap %s\n" "${keymap}" > \
-		    "${elfdir}/keymap_${keymap}.cfg" || err "!insert keymap"
-	done
-}
-
-build_grub_payload()
-{
-	./src/grub/grub-mkstandalone \
-	    --grub-mkimage="src/grub/grub-mkimage" \
-	    -O i386-coreboot \
-	    -o "${elfdir}/grub.elf" \
-	    -d "src/grub/grub-core/" \
-	    --fonts= --themes= --locales=  \
-	    --modules="${grub_modules}" \
-	    --install-modules="${grub_install_modules}" \
-	    "${layoutdir}/colemak.gkb=${grubcfgsdir}/keymap/colemak.gkb" \
-	    "${layoutdir}/deqwertz.gkb=${grubcfgsdir}/keymap/deqwertz.gkb" \
-	    "${layoutdir}/esqwerty.gkb=${grubcfgsdir}/keymap/esqwerty.gkb" \
-	    "${layoutdir}/frazerty.gkb=${grubcfgsdir}/keymap/frazerty.gkb" \
-	    "${layoutdir}/frdvbepo.gkb=${grubcfgsdir}/keymap/frdvbepo.gkb" \
-	    "${layoutdir}/itqwerty.gkb=${grubcfgsdir}/keymap/itqwerty.gkb" \
-	    "${layoutdir}/svenska.gkb=${grubcfgsdir}/keymap/svenska.gkb" \
-	    "${layoutdir}/trqwerty.gkb=${grubcfgsdir}/keymap/trqwerty.gkb" \
-	    "${layoutdir}/ukdvorak.gkb=${grubcfgsdir}/keymap/ukdvorak.gkb" \
-	    "${layoutdir}/ukqwerty.gkb=${grubcfgsdir}/keymap/ukqwerty.gkb" \
-	    "${layoutdir}/usdvorak.gkb=${grubcfgsdir}/keymap/usdvorak.gkb" \
-	    "${layoutdir}/usqwerty.gkb=${grubcfgsdir}/keymap/usqwerty.gkb" \
-	    "/boot/grub/grub.cfg=${grubcfgsdir}/config/grub_memdisk.cfg" \
-	    "/boot/grub/grub_default.cfg=${grubcfgsdir}/config/grub.cfg" || \
-	    err "build_grub_elf: cannot build grub payload (grub-mkstandalone)"
-}
-
-main $@
diff --git a/script/build/roms b/script/build/roms
index 95b697ec..35373594 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -165,7 +165,49 @@ build_dependency_grub()
 		    rebuild_grub="y"
 	done
 	[ -n "${_keyboard}" ] && keymaps="${kmapdir}/${_keyboard}.gkb"
-	[ "${rebuild_grub}" = "y" ] && x_ ./build grub; return 0
+	[ "$rebuild_grub" = "y" ] || return 0
+	x_ ./update trees -b grub
+	remkdir elf/grub
+	build_keymap_configs
+	build_grub_payload
+}
+
+build_keymap_configs()
+{
+	for keylayoutfile in "${grubcfgsdir}/keymap/"*.gkb; do
+		[ -f "${keylayoutfile}" ] || continue
+		keymap="${keylayoutfile##"${grubcfgsdir}/keymap/"}"
+		keymap="${keymap%.gkb}"
+		printf "keymap %s\n" "${keymap}" > \
+		    "elf/grub/keymap_${keymap}.cfg" || err "!insert keymap"
+	done
+}
+
+build_grub_payload()
+{
+	./src/grub/grub-mkstandalone \
+	    --grub-mkimage="src/grub/grub-mkimage" \
+	    -O i386-coreboot \
+	    -o "elf/grub/grub.elf" \
+	    -d "src/grub/grub-core/" \
+	    --fonts= --themes= --locales=  \
+	    --modules="${grub_modules}" \
+	    --install-modules="${grub_install_modules}" \
+	    "${layoutdir}/colemak.gkb=${grubcfgsdir}/keymap/colemak.gkb" \
+	    "${layoutdir}/deqwertz.gkb=${grubcfgsdir}/keymap/deqwertz.gkb" \
+	    "${layoutdir}/esqwerty.gkb=${grubcfgsdir}/keymap/esqwerty.gkb" \
+	    "${layoutdir}/frazerty.gkb=${grubcfgsdir}/keymap/frazerty.gkb" \
+	    "${layoutdir}/frdvbepo.gkb=${grubcfgsdir}/keymap/frdvbepo.gkb" \
+	    "${layoutdir}/itqwerty.gkb=${grubcfgsdir}/keymap/itqwerty.gkb" \
+	    "${layoutdir}/svenska.gkb=${grubcfgsdir}/keymap/svenska.gkb" \
+	    "${layoutdir}/trqwerty.gkb=${grubcfgsdir}/keymap/trqwerty.gkb" \
+	    "${layoutdir}/ukdvorak.gkb=${grubcfgsdir}/keymap/ukdvorak.gkb" \
+	    "${layoutdir}/ukqwerty.gkb=${grubcfgsdir}/keymap/ukqwerty.gkb" \
+	    "${layoutdir}/usdvorak.gkb=${grubcfgsdir}/keymap/usdvorak.gkb" \
+	    "${layoutdir}/usqwerty.gkb=${grubcfgsdir}/keymap/usqwerty.gkb" \
+	    "/boot/grub/grub.cfg=${grubcfgsdir}/config/grub_memdisk.cfg" \
+	    "/boot/grub/grub_default.cfg=${grubcfgsdir}/config/grub.cfg" || \
+	    err "build_grub_elf: cannot build grub payload (grub-mkstandalone)"
 }
 
 build_dependency_uboot()
diff --git a/script/update/trees b/script/update/trees
index 556181ed..9d1e89ff 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -33,6 +33,7 @@ main()
 	done
 	[ -z "$_f" ] && err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
 	[ -z "$project" ] && err "project name not specified"
+	elfdir="elf/${project}"
 
 	check_project
 
@@ -63,7 +64,6 @@ build_projects()
 
 build_targets()
 {
-	elfdir="elf/${project}"
 	[ "$elfdir" = "elf/coreboot" ] && \
 		elfdir="elf/coreboot_nopayload_DO_NOT_FLASH"
 
@@ -204,17 +204,39 @@ handle_makefile()
 
 run_make_command()
 {
-	[ -f "${codedir}/Makefile" ] || [ -f "${codedir}/makefile" ] || \
-	    [ -f "${codedir}/GNUmakefile" ] || return 1
+	[ -z "$mode" ] && check_autoconf "$codedir"
+	check_makefile "$codedir" || return 1
+
 	[ "$project" = "coreboot" ] && [ -z "$mode" ] && \
 		x_ printf "%s\n" "${version%%-*}" \
 		    > "${codedir}/.coreboot-version"
 
-	x_ make $mode -j$(nproc) -C "$codedir"
+	make $mode -j$(nproc) FS_PAYLOAD_MODULES="" -C "$codedir" || \
+	    err "run_make $codedir: !make $mode"
+
 	[ "$mode" != "clean" ] && return 0
 	make -C "$codedir" distclean 2>/dev/null || :
 }
 
+check_autoconf()
+{
+	(
+	_cfgopt=""
+	cd "${codedir}" || err "!cd $codedir"
+	[ "$project" = "grub" ] && _cfgopt="--gnulib-srcdir=gnulib/ --no-git"
+	[ -f "bootstrap" ] && x_ ./bootstrap $_cfgopt
+	[ -f "autogen.sh" ] && x_ ./autogen.sh
+	[ "$project" = "grub" ] && _cfgopt="--with-platform=coreboot"
+	[ -f "configure" ] && x_ ./configure $_cfgopt; return 0
+	) || err "can't bootstrap project: $codedir"
+}
+
+check_makefile()
+{
+	[ -f "${1}/Makefile" ] || [ -f "${1}/makefile" ] || \
+	    [ -f "${1}/GNUmakefile" ] || return 1; return 0
+}
+
 copy_elf()
 {
 	while read -r f; do

From b06155810406513123130e5e2046151a5b6ae890 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 30 Dec 2023 16:03:29 +0000
Subject: [PATCH 0144/1549] update/trees: dont hardcode autoconf/bootstrap arg

at present, the bootstrap and configure script is only
directly executed for grub, because grub is the only
project that uses them in lbmk

however, when i start adding linuxboot support, i will
have to start building a lot of projects, some of which
make use autoconf and bootstrap scripts

e.g.

./bootstrap --foo
./configure --bar

the "bootstrap" script is often used on GNU programs,
because they like to over-engineer absolutely everything

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/target.cfg |  2 ++
 script/update/trees    | 28 ++++++++++++++++++----------
 2 files changed, 20 insertions(+), 10 deletions(-)
 create mode 100644 config/grub/target.cfg

diff --git a/config/grub/target.cfg b/config/grub/target.cfg
new file mode 100644
index 00000000..8242b1fd
--- /dev/null
+++ b/config/grub/target.cfg
@@ -0,0 +1,2 @@
+bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
+autoconfargs="--with-platform=coreboot"
diff --git a/script/update/trees b/script/update/trees
index 9d1e89ff..1c309894 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -11,7 +11,8 @@ set -u -e
 . "include/git.sh"
 
 eval "$(setvars "" xarch cfgsdir codedir config config_name xlang mode \
-    elfdir listfile project target target_dir targets tree _f target1)"
+    elfdir listfile project target target_dir targets tree _f target1 \
+    bootstrapargs autoconfargs)"
 
 main()
 {
@@ -34,6 +35,7 @@ main()
 	[ -z "$_f" ] && err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
 	[ -z "$project" ] && err "project name not specified"
 	elfdir="elf/${project}"
+	cfgsdir="config/${project}"
 
 	check_project
 
@@ -47,6 +49,8 @@ build_projects()
 	[ $# -gt 0 ] && x_ ./update trees $_f $@
 	[ "$mode" = "fetch" ] && eval "fetch_project_repo; return 0;"
 
+	load_target_config "$cfgsdir"
+
 	codedir="src/${project}"
 	[ -d "$codedir" ] || x_ ./update trees -f "$project"
 
@@ -67,7 +71,6 @@ build_targets()
 	[ "$elfdir" = "elf/coreboot" ] && \
 		elfdir="elf/coreboot_nopayload_DO_NOT_FLASH"
 
-	cfgsdir="config/${project}"
 	[ -d "$cfgsdir" ] || err "directory, $cfgsdir, does not exist"
 
 	listfile="${cfgsdir}/build.list"
@@ -127,11 +130,9 @@ handle_src_tree()
 	target_dir="${cfgsdir}/${target}"
 	[ "$mode" = "fetch" ] && eval "fetch_project_trees; return 1;"
 
-	x_ mkdir -p "${elfdir}/${target}"
-	eval "$(setvars "" xarch xlang tree)"
+	load_target_config "$target_dir"
 
-	. "${target_dir}/target.cfg" || \
-	    err "handle_src_tree ${target_dir}: cannot load target.cfg"
+	x_ mkdir -p "${elfdir}/${target}"
 
 	[ -z "$tree" ] && err "handle_src_tree $project/$tree: tree unset"
 
@@ -151,6 +152,15 @@ handle_src_tree()
 	[ -z "$mode" ] && check_cross_compiler; return 0
 }
 
+load_target_config()
+{
+	eval "$(setvars "" xarch xlang tree bootstrapargs autoconfargs)"
+
+	[ -f "${1}/target.cfg" ] || return 0
+	. "${1}/target.cfg" || \
+	    err "load_target_config ${1}: cannot load target.cfg"; return 0
+}
+
 check_cross_compiler()
 {
 	for _xarch in $xarch; do
@@ -223,11 +233,9 @@ check_autoconf()
 	(
 	_cfgopt=""
 	cd "${codedir}" || err "!cd $codedir"
-	[ "$project" = "grub" ] && _cfgopt="--gnulib-srcdir=gnulib/ --no-git"
-	[ -f "bootstrap" ] && x_ ./bootstrap $_cfgopt
+	[ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs
 	[ -f "autogen.sh" ] && x_ ./autogen.sh
-	[ "$project" = "grub" ] && _cfgopt="--with-platform=coreboot"
-	[ -f "configure" ] && x_ ./configure $_cfgopt; return 0
+	[ -f "configure" ] && x_ ./configure $autoconfargs; return 0
 	) || err "can't bootstrap project: $codedir"
 }
 

From 30337b8fa5d1ab909a158924187c3f02d1fc501c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 30 Dec 2023 16:46:49 +0000
Subject: [PATCH 0145/1549] update/trees: avoid namespace clash in function

the logic of the previous commit was correct, but one
of the functions was named the same as another function
used in this file, causing a namespace conflict, and
a build error

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/update/trees | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/script/update/trees b/script/update/trees
index 1c309894..6f4786d9 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -49,7 +49,7 @@ build_projects()
 	[ $# -gt 0 ] && x_ ./update trees $_f $@
 	[ "$mode" = "fetch" ] && eval "fetch_project_repo; return 0;"
 
-	load_target_config "$cfgsdir"
+	load_project_config "$cfgsdir"
 
 	codedir="src/${project}"
 	[ -d "$codedir" ] || x_ ./update trees -f "$project"
@@ -130,7 +130,7 @@ handle_src_tree()
 	target_dir="${cfgsdir}/${target}"
 	[ "$mode" = "fetch" ] && eval "fetch_project_trees; return 1;"
 
-	load_target_config "$target_dir"
+	load_project_config "$target_dir"
 
 	x_ mkdir -p "${elfdir}/${target}"
 
@@ -152,13 +152,13 @@ handle_src_tree()
 	[ -z "$mode" ] && check_cross_compiler; return 0
 }
 
-load_target_config()
+load_project_config()
 {
 	eval "$(setvars "" xarch xlang tree bootstrapargs autoconfargs)"
 
 	[ -f "${1}/target.cfg" ] || return 0
 	. "${1}/target.cfg" || \
-	    err "load_target_config ${1}: cannot load target.cfg"; return 0
+	    err "load_project_config ${1}: cannot load target.cfg"; return 0
 }
 
 check_cross_compiler()

From c6a0e4952eaf005719514da37658f872c7456e3a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 30 Dec 2023 16:52:34 +0000
Subject: [PATCH 0146/1549] update/trees: generic cmake handling

it is no longer hardcoded just to be handled for uefiextract.

it is now defined as cmakedir in target.cfg, for a single or
multi tree project. if multi tree, it is applied to the specific
tree, and has to be defined per tree

the way it works is: as per cmakelist, a project will define
which directory is to be built, and it will then generate
a makefile in the main source tree (the build tree in cmake
language, where the main CMakeLists.txt file exists)

when the makefile has been generated, the project is then treated
like any other project. the way cmake works, if a makefile has
already been generated by it, in a given directory, running it
again will fail and not affect anything; if it fails but the
makefile doesn't exist, then something is wrong, but if the
makefile does exist, then it's all fine and nothing happens

at present, this is only used for uefiextract, which is part
of src/uefitool

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/uefitool/target.cfg |  1 +
 script/update/trees        | 27 ++++++++++++++++-----------
 2 files changed, 17 insertions(+), 11 deletions(-)
 create mode 100644 config/uefitool/target.cfg

diff --git a/config/uefitool/target.cfg b/config/uefitool/target.cfg
new file mode 100644
index 00000000..98d5e03d
--- /dev/null
+++ b/config/uefitool/target.cfg
@@ -0,0 +1 @@
+cmakedir="UEFIExtract"
diff --git a/script/update/trees b/script/update/trees
index 6f4786d9..a12f3ef8 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -12,7 +12,7 @@ set -u -e
 
 eval "$(setvars "" xarch cfgsdir codedir config config_name xlang mode \
     elfdir listfile project target target_dir targets tree _f target1 \
-    bootstrapargs autoconfargs)"
+    bootstrapargs autoconfargs cmakedir)"
 
 main()
 {
@@ -54,14 +54,6 @@ build_projects()
 	codedir="src/${project}"
 	[ -d "$codedir" ] || x_ ./update trees -f "$project"
 
-	if [ "$project" = "uefitool" ]; then
-	(
-		x_ cd src/uefitool
-		cmake UEFIExtract/ || [ -f Makefile ] || \
-		    err "build_projects: !cmake UEFIExtract/"
-	) || err "can't build cmake on uefiextract"
-	fi
-
 	[ "$mode" = "distclean" ] && mode="clean"
 	run_make_command || return 0
 }
@@ -214,6 +206,7 @@ handle_makefile()
 
 run_make_command()
 {
+	check_cmake "$codedir"
 	[ -z "$mode" ] && check_autoconf "$codedir"
 	check_makefile "$codedir" || return 1
 
@@ -228,15 +221,27 @@ run_make_command()
 	make -C "$codedir" distclean 2>/dev/null || :
 }
 
+check_cmake()
+{
+	[ -z "${cmakedir}" ] || \
+		check_makefile "${1}" || \
+		    cmake -B "${1}" "${1}/${cmakedir}" || \
+		    check_makefile "${1}" || \
+		    err "check_cmake ${1}: can't cmake ${cmakedir}"
+	[ -z "${cmakedir}" ] || check_makefile "${1}" || \
+		err "check_cmake ${1}: could not generate Makefile"
+	return 0
+}
+
 check_autoconf()
 {
 	(
 	_cfgopt=""
-	cd "${codedir}" || err "!cd $codedir"
+	cd "${1}" || err "!cd $1"
 	[ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs
 	[ -f "autogen.sh" ] && x_ ./autogen.sh
 	[ -f "configure" ] && x_ ./configure $autoconfargs; return 0
-	) || err "can't bootstrap project: $codedir"
+	) || err "can't bootstrap project: $1"
 }
 
 check_makefile()

From 4c9ee172be1a836ebd31ed32e5f1f0bbb833b52c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 30 Dec 2023 19:25:26 +0000
Subject: [PATCH 0147/1549] update/trees: support custom make/autogen argument

this is now used in grub, for the FS_PAYLOAD_MODULES
option in the make command

lbmk should generalise as much logic as possible. in
some parts of it, logic is hurrently hardcoded, specific
to a given project that lbmk uses, but lbmk is essentially
a source-based package manager, like what you might find
on a small linux distro, so we need to try to
be as generic as possible.

lbmk is the "build system of build systems", so it has to
work generically with as many of them as possible

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/target.cfg | 1 +
 script/update/trees    | 6 +++---
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/config/grub/target.cfg b/config/grub/target.cfg
index 8242b1fd..9b34245e 100644
--- a/config/grub/target.cfg
+++ b/config/grub/target.cfg
@@ -1,2 +1,3 @@
 bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
 autoconfargs="--with-platform=coreboot"
+makeargs="FS_PAYLOAD_MODULES=\"\""
diff --git a/script/update/trees b/script/update/trees
index a12f3ef8..76cfa571 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -12,7 +12,7 @@ set -u -e
 
 eval "$(setvars "" xarch cfgsdir codedir config config_name xlang mode \
     elfdir listfile project target target_dir targets tree _f target1 \
-    bootstrapargs autoconfargs cmakedir)"
+    bootstrapargs autoconfargs cmakedir makeargs autogenargs)"
 
 main()
 {
@@ -214,7 +214,7 @@ run_make_command()
 		x_ printf "%s\n" "${version%%-*}" \
 		    > "${codedir}/.coreboot-version"
 
-	make $mode -j$(nproc) FS_PAYLOAD_MODULES="" -C "$codedir" || \
+	make $mode -j$(nproc) $makeargs -C "$codedir" || \
 	    err "run_make $codedir: !make $mode"
 
 	[ "$mode" != "clean" ] && return 0
@@ -239,7 +239,7 @@ check_autoconf()
 	_cfgopt=""
 	cd "${1}" || err "!cd $1"
 	[ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs
-	[ -f "autogen.sh" ] && x_ ./autogen.sh
+	[ -f "autogen.sh" ] && x_ ./autogen.sh ${autogenargs}
 	[ -f "configure" ] && x_ ./configure $autoconfargs; return 0
 	) || err "can't bootstrap project: $1"
 }

From 5fb6e36f035c78b297a035574444d17c19578b35 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 30 Dec 2023 20:30:24 +0000
Subject: [PATCH 0148/1549] update/trees: clean up the coreboot-version check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/update/trees | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/script/update/trees b/script/update/trees
index 76cfa571..00ba83f1 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -210,9 +210,8 @@ run_make_command()
 	[ -z "$mode" ] && check_autoconf "$codedir"
 	check_makefile "$codedir" || return 1
 
-	[ "$project" = "coreboot" ] && [ -z "$mode" ] && \
-		x_ printf "%s\n" "${version%%-*}" \
-		    > "${codedir}/.coreboot-version"
+	[ "$project" = "coreboot" ] && [ -z "$mode" ] && x_ \
+		printf "%s\n" "${version%%-*}" > "$codedir/.coreboot-version"
 
 	make $mode -j$(nproc) $makeargs -C "$codedir" || \
 	    err "run_make $codedir: !make $mode"

From f3098f566ca89f6d7ebc8e91e2a78e751a7ef924 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 30 Dec 2023 20:30:49 +0000
Subject: [PATCH 0149/1549] git.sh multi-tree: grab submodules *after* patches

right now, if we want to patch a project such that certain
submodules are no tdownloaded, or diffreent submodules are
downloaded, or current ones are downloaded from other
locations, we cannot do this, because we apply submodule
updates *before* applying patches.

therefore, we should change it so that they are applied
*after* installing patches.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index b0ebc937..27c2a3df 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -63,11 +63,11 @@ prepare_new_tree()
 	cp -R "src/${project}/${project}" "${tmp_git_dir}" || \
 	    err "prepare_new_tree ${project}/${tree}: can't make tmpclone"
 	git_reset_rev "${tmp_git_dir}" "${rev}"
+	git_am_patches "${tmp_git_dir}" "$PWD/$cfgsdir/$tree/patches" || \
+	    err "prepare_new_tree ${project}/${tree}: patch fail"
 	[ ! -f "${tmp_git_dir}/.gitmodules" ] || \
 		git -C "${tmp_git_dir}" submodule update --init --checkout \
 		    || err "prepare_new_tree ${project}/${tree}: !submodules"
-	git_am_patches "${tmp_git_dir}" "$PWD/$cfgsdir/$tree/patches" || \
-	    err "prepare_new_tree ${project}/${tree}: patch fail"
 	[ "${patchfail}" = "y" ] && err "PATCH FAIL"
 
 	mv "${tmp_git_dir}" "src/${project}/${tree}" || \

From 11a821637d8a36f4a72001ef8d8c41952f066cc3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 31 Dec 2023 19:57:30 +0000
Subject: [PATCH 0150/1549] Bump GRUB to 2.12 release

Actually, it's 2 commits after 2.12, because there was a
patch added afterwards, fixing a build issue on Gentoo.

These changes are present in GRUB 2.12, relative to the
revision that we previously used on lbmk:

* b835601c7 build: Include grub-core/extra_deps.lst in dist
* 8961305b4 Bump version to 2.13
* 5ca9db22e Release 2.12
* 477a0dbd5 efi: Add support for reproducible builds
* dcc1af5d6 efi: Generate stack protector canary at build time if urandom is available
* e424e945c efi: Initialize canary to non-zero value
* 7c8ae7dcb gfxmenu/gui_image: Fix double free of bitmap
* 63fc253fc commands/acpi: Fix calculation of ACPI tables addresses when processing RSDT and XSDT
* f20123072 libnvpair: Support prefixed nvlist symbol names as found on NetBSD
* a13df3d15 bootstrap: Don't check gettext version
* 6d2aa7ee0 kern/mm: Use %x and cast for displaying sizeof()
* b3d49a697 configure: Add RPATH for freetype on NetBSD
* 52dbf66ea configure: Add *BSD font paths
* 2d6a89980 autogen: Accept python3.10 as a python alternative
* 3d4cb5a43 build: Rename HAVE_LIBZFS to USE_LIBZFS
* e4dbe5cfa gnulib: Tolerate always_inline attribute being ignored
* 31e47cfe2 util/editenv: Don't use %m formatter
* f5905f656 osdep/bsd/hostdisk: Fix NetBSD compilation
* cb1824a87 osdep/generic/blocklist: Fix compilation
* 2f3faf02c disk/diskfilter: Remove unused variable
* 3815acc57 build: Tolerate unused-but-set in generated lexer/bison files
* c129e44e7 loader/i386/bsdXX: Fix loading after unaligned module
* 89fbe0cac grub-core/Makefile.am: Make path to extra_deps.lst relative to $(top_srcdir)/grub-core
* 353beb80c util/grub-install: Move platdir path canonicalization after files were copied to grubdir
* f18a899ab util/grub-mkstandalone: Ensure deterministic tar file creation by sorting contents
* ed74bc376 util/grub-mkstandalone: Ensure stable timestamps for generated images
* 069cc46c9 net/http: Fix gcc-13 errors relating to type signedness
* e7a831963 templates: Reinstate unused version comparison functions with warning
* 3f9eace2d util/grub-install: Delay copying files to {grubdir,platdir} after install_device was validated
* e60015f57 efi: Set shim_lock_enabled even if validation is disabled
* e35683317 docs: Improve bli module documentation
* 57059ccb6 bli: Add explicit dependency on the part_gpt module
* 154dcb1ae build: Allow explicit module dependencies
* 17c68472d kern/ieee1275/init/ppc64: Display upper_mem_limit when debugging
* 5f8e091b6 kern/ieee1275/init/ppc64: Fix a comment
* dc569b077 kern/ieee1275/ieee1275: Display successful memory claims when debugging
* 0ac3d938a loader/powerpc/ieee1275: Use new allocation function for kernel and initrd
* 2a9a8518e kern/ieee1275/cmain/ppc64: Introduce flags to identify KVM and PowerVM
* 679691a13 kern/ieee1275/init/ppc64: Rename regions_claim() to grub_regions_claim()
* d49e86db2 kern/ieee1275/init/ppc64: Add support for alignment requirements
* fe5d5e857 kern/ieee1275/init/ppc64: Return allocated address using context
* ea2c93484 kern/ieee1275/init/ppc64: Decide by request whether to initialize region
* 0bb59fa9a kern/ieee1275/init/ppc64: Introduce a request for regions_claim()
* aa7c13226 fs/xfs: Add large extent counters incompat feature support

Most notable in the above log, that are beneficial to Libreboot
users, are:

aa7c13226 which improves XFS support (large extents), which is default
now on many setups.

ed74bc376 which introduces more stable timestamp generation when using
grub-mkstandalone. this is what lbmk uses to generate grub.elf, whereas
grub previously only implemented this fix on mkimage which we don't use

f18a899ab which ensures deterministic (reproducible) tar file creation
by sorting contents (file names / directories). this is done by sorting
the entries

f5905f656 which improves grub build system reliability on netbsd and
openbsd systems - useful for us because an ambition of lbmk is to port
the build system to run on bsd systems, and we will still want grub -
several other of the changes here are beneficial for BSD aswell, all
or most of them by Vladimir Serbinenko

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/grub | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/git/grub b/config/git/grub
index 4f488dfb..3abec3e4 100644
--- a/config/git/grub
+++ b/config/git/grub
@@ -1,5 +1,5 @@
 {grub}{
-	rev: 64e3cee72ab8f5876abfebb263b5e6cf7c4a9a4e
+	rev: b835601c7639ed1890f2d3db91900a8506011a8e
 	loc: grub
 	url: git://git.savannah.gnu.org/grub.git
 	bkup_url: https://codeberg.org/libreboot/grub

From f4a14bd90853560dcc685b8d06484bcee3ebcbd5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 10:30:19 +0000
Subject: [PATCH 0151/1549] git.sh: clean up git submodule/am handling

unify all of the logic, where git am and submodule is handled

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 29 ++++++++++++++---------------
 1 file changed, 14 insertions(+), 15 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 27c2a3df..01ee1cbb 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -62,12 +62,8 @@ prepare_new_tree()
 	remkdir "${tmp_git_dir%/*}"
 	cp -R "src/${project}/${project}" "${tmp_git_dir}" || \
 	    err "prepare_new_tree ${project}/${tree}: can't make tmpclone"
-	git_reset_rev "${tmp_git_dir}" "${rev}"
-	git_am_patches "${tmp_git_dir}" "$PWD/$cfgsdir/$tree/patches" || \
-	    err "prepare_new_tree ${project}/${tree}: patch fail"
-	[ ! -f "${tmp_git_dir}/.gitmodules" ] || \
-		git -C "${tmp_git_dir}" submodule update --init --checkout \
-		    || err "prepare_new_tree ${project}/${tree}: !submodules"
+	git_patch "$tmp_git_dir" "$PWD/$cfgsdir/$tree/patches"
+	git_submodule_update "${tmp_git_dir}"
 	[ "${patchfail}" = "y" ] && err "PATCH FAIL"
 
 	mv "${tmp_git_dir}" "src/${project}/${tree}" || \
@@ -107,9 +103,7 @@ clone_project()
 	git clone ${url} "${tmp_git_dir}" || \
 	    git clone ${bkup_url} "${tmp_git_dir}" || \
 	    err "clone_project: could not download ${project}"
-	git_reset_rev "${tmp_git_dir}" "${rev}"
-	git_am_patches "${tmp_git_dir}" "${PWD}/config/${project}/patches" \
-	    || err "clone_project ${project} ${loc}: patch fail"
+	git_patch "${tmp_git_dir}" "${PWD}/config/${project}/patches"
 	[ "${patchfail}" = "y" ] && err "PATCH FAIL"
 
 	x_ rm -Rf "${loc}"
@@ -118,14 +112,19 @@ clone_project()
 	    err "clone_project: !mv ${tmp_git_dir} ${loc}"
 }
 
-git_reset_rev()
+git_patch()
 {
-	git -C "${1}" reset --hard ${2} || err "!git reset ${1} <- ${2}"
-	if [ "$project" != "coreboot" ] && [ "$project" != "u-boot" ] && \
-	    [ -f "${1}/.gitmodules" ]; then
+	git -C "${1}" reset --hard ${rev} || err "!git reset ${1} <- ${rev}"
+	[ "$project" != "coreboot" ] && [ "$project" != "u-boot" ] && \
+		git_submodule_update "${1}"
+	git_am_patches "$1" "$2" || err "git_patch $project: patch fail"
+}
+
+git_submodule_update()
+{
+	[ ! -f "${1}/.gitmodules" ] || \
 		git -C "${1}" submodule update --init --checkout || \
-		    err "git_reset_rev ${1}: can't download submodules"
-	fi
+		    err "git_sub ${1}: can't download submodules"; return 0
 }
 
 git_am_patches()

From d819403a0b8fbbfce03774141404d6ffe3feee0e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 11:06:06 +0000
Subject: [PATCH 0152/1549] git.sh: fix regression: patches before submodulse

there isn't really a problem right now, but a desired
and implemented behavioural change was that patches are
to be applied *before* updating submodules. well, the
previous commit reversed this change, under certain
conditions, such that submodules were applied first.
this patch fixes it, so that patches are done first.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 01ee1cbb..1942a53b 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -115,9 +115,9 @@ clone_project()
 git_patch()
 {
 	git -C "${1}" reset --hard ${rev} || err "!git reset ${1} <- ${rev}"
-	[ "$project" != "coreboot" ] && [ "$project" != "u-boot" ] && \
-		git_submodule_update "${1}"
 	git_am_patches "$1" "$2" || err "git_patch $project: patch fail"
+	[ "$project" != "coreboot" ] && [ "$project" != "u-boot" ] && \
+		git_submodule_update "${1}"; return 0
 }
 
 git_submodule_update()

From e6953dc4f0bbae746c536b7dd0b67bc5fa7bc253 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 12:41:43 +0000
Subject: [PATCH 0153/1549] git.sh: clean up handling of tmp_git_dir

delete it once once, and delete it much sooner, right
at the start of script/update/trees main()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh      | 4 ----
 include/option.sh   | 1 +
 script/update/trees | 1 +
 3 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 1942a53b..519ae4d3 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -5,7 +5,6 @@
 # This file is only used by update/project/trees
 
 eval "$(setvars "" _target rev _xm loc url bkup_url depend patchfail)"
-tmp_git_dir="${PWD}/tmp/gitclone"
 
 fetch_project_trees()
 {
@@ -59,7 +58,6 @@ prepare_new_tree()
 {
 	printf "Creating %s tree %s (%s)\n" "$project" "$tree" "$_target"
 
-	remkdir "${tmp_git_dir%/*}"
 	cp -R "src/${project}/${project}" "${tmp_git_dir}" || \
 	    err "prepare_new_tree ${project}/${tree}: can't make tmpclone"
 	git_patch "$tmp_git_dir" "$PWD/$cfgsdir/$tree/patches"
@@ -91,8 +89,6 @@ verify_config()
 
 clone_project()
 {
-	remkdir "${tmp_git_dir%/}"
-
 	loc="${loc#src/}"
 	loc="src/${loc}"
 	if [ -d "${loc}" ]; then
diff --git a/include/option.sh b/include/option.sh
index 7c434444..66b89d4c 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -12,6 +12,7 @@ cbfstool="cbutils/default/cbfstool"
 grubcfgsdir="config/grub"
 layoutdir="/boot/grub/layouts"
 . "${grubcfgsdir}/modules.list"
+tmp_git_dir="${PWD}/tmp/gitclone"
 
 eval "$(setvars "" CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
     CONFIG_ME_BIN_PATH CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 \
diff --git a/script/update/trees b/script/update/trees
index 00ba83f1..fac37ccd 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -37,6 +37,7 @@ main()
 	elfdir="elf/${project}"
 	cfgsdir="config/${project}"
 
+	remkdir "${tmp_git_dir%/*}"
 	check_project
 
 	_cmd="build_projects"

From ce67c99f4070193a0e71906451c61d377601ded6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 14:14:25 +0000
Subject: [PATCH 0154/1549] git.sh cleanup: git am handling (remove patchfail)

the patchfail variable was only needed in the old design,
where git am was being handled inside a subshell, and
also when we did it directly in the target directory
without using a temporary directory. with the current
design, we can just call err() and ditch the tmp repo

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 26 ++++++++------------------
 1 file changed, 8 insertions(+), 18 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 519ae4d3..5c238718 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -4,7 +4,7 @@
 
 # This file is only used by update/project/trees
 
-eval "$(setvars "" _target rev _xm loc url bkup_url depend patchfail)"
+eval "$(setvars "" _target rev _xm loc url bkup_url depend)"
 
 fetch_project_trees()
 {
@@ -62,7 +62,6 @@ prepare_new_tree()
 	    err "prepare_new_tree ${project}/${tree}: can't make tmpclone"
 	git_patch "$tmp_git_dir" "$PWD/$cfgsdir/$tree/patches"
 	git_submodule_update "${tmp_git_dir}"
-	[ "${patchfail}" = "y" ] && err "PATCH FAIL"
 
 	mv "${tmp_git_dir}" "src/${project}/${tree}" || \
 	    err "prepare_new_tree ${project}/${tree}: can't copy tmpclone"
@@ -100,7 +99,6 @@ clone_project()
 	    git clone ${bkup_url} "${tmp_git_dir}" || \
 	    err "clone_project: could not download ${project}"
 	git_patch "${tmp_git_dir}" "${PWD}/config/${project}/patches"
-	[ "${patchfail}" = "y" ] && err "PATCH FAIL"
 
 	x_ rm -Rf "${loc}"
 	[ "${loc}" = "${loc%/*}" ] || x_ mkdir -p "${loc%/*}"
@@ -111,7 +109,7 @@ clone_project()
 git_patch()
 {
 	git -C "${1}" reset --hard ${rev} || err "!git reset ${1} <- ${rev}"
-	git_am_patches "$1" "$2" || err "git_patch $project: patch fail"
+	git_am_patches "$1" "$2" || err "git_patch $project $1 $2: patch fail"
 	[ "$project" != "coreboot" ] && [ "$project" != "u-boot" ] && \
 		git_submodule_update "${1}"; return 0
 }
@@ -125,20 +123,12 @@ git_submodule_update()
 
 git_am_patches()
 {
-	sdir="${1}" # assumed to be absolute path
-	patchdir="${2}" # ditto
-	for patch in "${patchdir}/"*; do
-		[ -L "${patch}" ] && continue
-		[ -f "${patch}" ] || continue
-		git -C "${sdir}" am "${patch}" || patchfail="y"
-		[ "${patchfail}" != "y" ] && continue
-		git -C "$sdir" am --abort || err  "$sdir: !git am --abort"
-		err  "!git am ${patch} -> ${sdir}"
+	for _patch in "$2/"*; do
+		[ -L "$_patch" ] || [ ! -f "$_patch" ] || git -C "$1" am \
+		    "$_patch" || err "git_am $1 $2: !git am $_patch"; continue
 	done
-	for patches in "${patchdir}/"*; do
-		[ -L "${patches}" ] && continue
-		[ ! -d "${patches}" ] && continue
-		git_am_patches "${sdir}" "${patches}"
+	for _patches in "$2/"*; do
+		[ ! -L "$_patches" ] && [ -d "$_patches" ] && \
+			git_am_patches "$1" "$_patches"; continue
 	done
-	[ "${patchfail}" = "y" ] && return 1; return 0
 }

From 48551ced3fea58322e996ca78652ceafb4b9a041 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 15:02:34 +0000
Subject: [PATCH 0155/1549] git.sh: unify am/submodule and tree copying

do it all in a single function!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh      | 42 ++++++++++++++++++++++--------------------
 include/option.sh   |  2 +-
 script/update/trees |  2 +-
 3 files changed, 24 insertions(+), 22 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 5c238718..7e677939 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -58,13 +58,9 @@ prepare_new_tree()
 {
 	printf "Creating %s tree %s (%s)\n" "$project" "$tree" "$_target"
 
-	cp -R "src/${project}/${project}" "${tmp_git_dir}" || \
+	cp -R "src/${project}/${project}" "${tmpgit}" || \
 	    err "prepare_new_tree ${project}/${tree}: can't make tmpclone"
-	git_patch "$tmp_git_dir" "$PWD/$cfgsdir/$tree/patches"
-	git_submodule_update "${tmp_git_dir}"
-
-	mv "${tmp_git_dir}" "src/${project}/${tree}" || \
-	    err "prepare_new_tree ${project}/${tree}: can't copy tmpclone"
+	git_prep "$PWD/$cfgsdir/$tree/patches" "src/$project/$tree" "update"
 }
 
 fetch_project_repo()
@@ -76,7 +72,7 @@ fetch_project_repo()
 	[ -z "${depend}" ] || for d in ${depend} ; do
 		x_ ./update trees -f ${d}
 	done
-	rm -Rf "${tmp_git_dir}" || err "fetch_repo: !rm -Rf ${tmp_git_dir}"
+	rm -Rf "${tmpgit}" || err "fetch_repo: !rm -Rf ${tmpgit}"
 }
 
 verify_config()
@@ -95,23 +91,29 @@ clone_project()
 		return 0
 	fi
 
-	git clone ${url} "${tmp_git_dir}" || \
-	    git clone ${bkup_url} "${tmp_git_dir}" || \
-	    err "clone_project: could not download ${project}"
-	git_patch "${tmp_git_dir}" "${PWD}/config/${project}/patches"
-
-	x_ rm -Rf "${loc}"
-	[ "${loc}" = "${loc%/*}" ] || x_ mkdir -p "${loc%/*}"
-	mv "${tmp_git_dir}" "${loc}" || \
-	    err "clone_project: !mv ${tmp_git_dir} ${loc}"
+	git clone $url "$tmpgit" || git clone $bkup_url "$tmpgit" \
+	    || err "clone_project: could not download ${project}"
+	git_prep "$PWD/config/$project/patches" "$loc"
 }
 
-git_patch()
+git_prep()
 {
-	git -C "${1}" reset --hard ${rev} || err "!git reset ${1} <- ${rev}"
-	git_am_patches "$1" "$2" || err "git_patch $project $1 $2: patch fail"
+	_patchdir="$1"
+	_loc="$2"
+
+	git -C "$tmpgit" reset --hard $rev || \
+	    err "!git -C $_patchdir reset $rev"
+	git_am_patches "$tmpgit" "$_patchdir" || \
+	    err "git_prep $project $_patchdir: patchfail"
+
 	[ "$project" != "coreboot" ] && [ "$project" != "u-boot" ] && \
-		git_submodule_update "${1}"; return 0
+		git_submodule_update "$tmpgit"
+	[ $# -gt 2 ] && git_submodule_update "$tmpgit"	
+
+	rm -Rf "$_loc" || err "git_prep: !rm -Rf $_loc"
+	[ "$_loc" = "${_loc%/*}" ] || x_ mkdir -p "${_loc%/*}"
+	mv "$tmpgit" "$_loc" || \
+	    err "git_prep $project $_patchdir: !mv $tmpgit $_loc"
 }
 
 git_submodule_update()
diff --git a/include/option.sh b/include/option.sh
index 66b89d4c..2136cf4d 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -12,7 +12,7 @@ cbfstool="cbutils/default/cbfstool"
 grubcfgsdir="config/grub"
 layoutdir="/boot/grub/layouts"
 . "${grubcfgsdir}/modules.list"
-tmp_git_dir="${PWD}/tmp/gitclone"
+tmpgit="${PWD}/tmp/gitclone"
 
 eval "$(setvars "" CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
     CONFIG_ME_BIN_PATH CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 \
diff --git a/script/update/trees b/script/update/trees
index fac37ccd..e4db1872 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -37,7 +37,7 @@ main()
 	elfdir="elf/${project}"
 	cfgsdir="config/${project}"
 
-	remkdir "${tmp_git_dir%/*}"
+	remkdir "${tmpgit%/*}"
 	check_project
 
 	_cmd="build_projects"

From 1fcbadb8da52a0ca8924b61a83fa86cc38a1c360 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 15:27:01 +0000
Subject: [PATCH 0156/1549] git.sh: further simplify git_prep

the directory is checked for deletion, but it's already
checked before download, to see whether it already exists.
lbmk already exits with zero status if the directory exists,
so the check is pointless (in this function)

also, general code style/formatting cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 7e677939..d30e90de 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -103,17 +103,14 @@ git_prep()
 
 	git -C "$tmpgit" reset --hard $rev || \
 	    err "!git -C $_patchdir reset $rev"
-	git_am_patches "$tmpgit" "$_patchdir" || \
-	    err "git_prep $project $_patchdir: patchfail"
+	git_am_patches "$tmpgit" "$_patchdir" || err "!am $_loc $_patchdir"
 
 	[ "$project" != "coreboot" ] && [ "$project" != "u-boot" ] && \
 		git_submodule_update "$tmpgit"
 	[ $# -gt 2 ] && git_submodule_update "$tmpgit"	
 
-	rm -Rf "$_loc" || err "git_prep: !rm -Rf $_loc"
 	[ "$_loc" = "${_loc%/*}" ] || x_ mkdir -p "${_loc%/*}"
-	mv "$tmpgit" "$_loc" || \
-	    err "git_prep $project $_patchdir: !mv $tmpgit $_loc"
+	mv "$tmpgit" "$_loc" || err "git_prep: !mv $tmpgit $_loc"
 }
 
 git_submodule_update()

From cea88fa827c00ef13c51c81b0e60c74019591ba3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 16:42:35 +0000
Subject: [PATCH 0157/1549] git.sh: simplify submodule handling in git_prep

u-boot doesn't use submodules, so there's no point in
checking for it. now we can do with just one call to
the git submodule command, for simplicity

also, general code cleanup in this file (minor code
formatting improvements)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 27 ++++++++-------------------
 1 file changed, 8 insertions(+), 19 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index d30e90de..10e63dd6 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -42,16 +42,12 @@ fetch_config()
 
 load_target_config()
 {
-	[ -f "${cfgsdir}/${1}/target.cfg" ] || \
-		err "${_xm} check: target.cfg does not exist"
+	[ -f "$cfgsdir/$1/target.cfg" ] || err "$1: target.cfg missing"
 	[ -f "${cfgsdir}/${1}/seen" ] && \
 		err "${_xm} check: infinite loop in tree definitions"
 
-	. "${cfgsdir}/${1}/target.cfg" || \
-	    err "load_target_config ${cfgsdir}/${1}: cannot load config"
-
-	touch "${cfgsdir}/${1}/seen" || \
-	    err "load_config $cfgsdir/$1: !mk seen"
+	. "$cfgsdir/$1/target.cfg" || err "load_target_config !$cfgsdir/$1"
+	touch "$cfgsdir/$1/seen" || err "load_config $cfgsdir/$1: !mk seen"
 }
 
 prepare_new_tree()
@@ -101,25 +97,18 @@ git_prep()
 	_patchdir="$1"
 	_loc="$2"
 
-	git -C "$tmpgit" reset --hard $rev || \
-	    err "!git -C $_patchdir reset $rev"
+	git -C "$tmpgit" reset --hard $rev || err "git -C $_loc: !reset $rev"
 	git_am_patches "$tmpgit" "$_patchdir" || err "!am $_loc $_patchdir"
 
-	[ "$project" != "coreboot" ] && [ "$project" != "u-boot" ] && \
-		git_submodule_update "$tmpgit"
-	[ $# -gt 2 ] && git_submodule_update "$tmpgit"	
+	if [ "$project" != "coreboot" ] || [ $# -gt 2 ]; then
+		[ ! -f "$tmpgit/.gitmodules" ] || git -C "$tmpgit" submodule \
+		    update --init --checkout || err "git_prep $_loc: !submod"
+	fi
 
 	[ "$_loc" = "${_loc%/*}" ] || x_ mkdir -p "${_loc%/*}"
 	mv "$tmpgit" "$_loc" || err "git_prep: !mv $tmpgit $_loc"
 }
 
-git_submodule_update()
-{
-	[ ! -f "${1}/.gitmodules" ] || \
-		git -C "${1}" submodule update --init --checkout || \
-		    err "git_sub ${1}: can't download submodules"; return 0
-}
-
 git_am_patches()
 {
 	for _patch in "$2/"*; do

From 535c9007fdc3b81fc045fa194e68030ebe86a58e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 17:08:38 +0000
Subject: [PATCH 0158/1549] add copyright 2024 leah rowe to edited files

i forgot to add 2024 on the copyright years, for my
copyright files that i edited on 1 january 2024

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh      | 2 +-
 include/option.sh   | 2 +-
 script/update/trees | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 10e63dd6..14fb2dc1 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
-# SPDX-FileCopyrightText: 2020,2021,2023 Leah Rowe <leah@libreboot.org>
+# SPDX-FileCopyrightText: 2020,2021,2023,2024 Leah Rowe <leah@libreboot.org>
 # SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
 # This file is only used by update/project/trees
diff --git a/include/option.sh b/include/option.sh
index 2136cf4d..c2f4fef5 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-3.0-only
 # SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 # SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# SPDX-FileCopyrightText: 2020-2023 Leah Rowe <leah@libreboot.org>
+# SPDX-FileCopyrightText: 2020-2024 Leah Rowe <leah@libreboot.org>
 
 vendir="vendorfiles"
 appdir="${vendir}/app"
diff --git a/script/update/trees b/script/update/trees
index e4db1872..68e4a9f3 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -2,7 +2,7 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 # SPDX-FileCopyrightText: 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
 # SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# SPDX-FileCopyrightText: 2023 Leah Rowe <leah@libreboot.org>
+# SPDX-FileCopyrightText: 2023-2024 Leah Rowe <leah@libreboot.org>
 
 set -u -e
 

From fcf2b2bb05a5ea232d9a835b92c808de4d21c108 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 17:47:43 +0000
Subject: [PATCH 0159/1549] build/roms: simplify grub dependency check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 30 +++++-------------------------
 1 file changed, 5 insertions(+), 25 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index 35373594..3f90d33b 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -132,7 +132,7 @@ configure_dependencies()
 	[ "${payload_memtest}" != "y" ] || [ -f "src/${memtest_bin}" ] || \
 		x_ ./update trees -b memtest86plus
 
-	for bt in dependency_seabios dependency_grub dependency_uboot target; do
+	for bt in dependency_seabios grub_payload dependency_uboot target; do
 		eval "build_${bt}"
 	done
 }
@@ -148,43 +148,23 @@ build_dependency_seabios()
 	x_ ./update trees -b seabios
 }
 
-build_dependency_grub()
+build_grub_payload()
 {
 	[ "$payload_grub" != "y" ] && [ "$payload_seabios_withgrub" != "y" ] \
 	    && [ "${payload_seabios_grubonly}" != "y" ] && return 0
 
-	rebuild_grub="n"
-	[ -f "${grubelf}" ] || rebuild_grub="y"
 	for keymapfile in "${kmapdir}"/*.gkb; do
 		[ -f "${keymapfile}" ] || continue
 
 		keymaps="${keymaps} ${keymapfile}"
 		keymap="${keymapfile##*/}"
 		keymap="${keymap%.gkb}"
-		[ ! -f "elf/grub/keymap_${keymap}.cfg" ] && \
-		    rebuild_grub="y"
+		[ -f "elf/grub/keymap_$keymap.cfg" ] || printf "keymap %s\n" \
+		    "$keymap" > "elf/grub/keymap_$keymap.cfg" || err "!key"; :
 	done
 	[ -n "${_keyboard}" ] && keymaps="${kmapdir}/${_keyboard}.gkb"
-	[ "$rebuild_grub" = "y" ] || return 0
-	x_ ./update trees -b grub
-	remkdir elf/grub
-	build_keymap_configs
-	build_grub_payload
-}
+	[ -f "src/grub/grub-mkstandalone" ] || x_ ./update trees -b grub
 
-build_keymap_configs()
-{
-	for keylayoutfile in "${grubcfgsdir}/keymap/"*.gkb; do
-		[ -f "${keylayoutfile}" ] || continue
-		keymap="${keylayoutfile##"${grubcfgsdir}/keymap/"}"
-		keymap="${keymap%.gkb}"
-		printf "keymap %s\n" "${keymap}" > \
-		    "elf/grub/keymap_${keymap}.cfg" || err "!insert keymap"
-	done
-}
-
-build_grub_payload()
-{
 	./src/grub/grub-mkstandalone \
 	    --grub-mkimage="src/grub/grub-mkimage" \
 	    -O i386-coreboot \

From 042c7877e91032c46220609c8e8ab9df2f109ee3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 17:52:23 +0000
Subject: [PATCH 0160/1549] build/roms: simplify seabios dependency check

the update/trees script checks this binary itself, before
deciding whether to recompile/compile, so we don't need
to do such checks here.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 14 ++------------
 1 file changed, 2 insertions(+), 12 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index 3f90d33b..6825ff00 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -132,22 +132,12 @@ configure_dependencies()
 	[ "${payload_memtest}" != "y" ] || [ -f "src/${memtest_bin}" ] || \
 		x_ ./update trees -b memtest86plus
 
-	for bt in dependency_seabios grub_payload dependency_uboot target; do
+	[ "$payload_seabios" = "y" ] && x_ ./update trees -b seabios
+	for bt in grub_payload dependency_uboot target; do
 		eval "build_${bt}"
 	done
 }
 
-build_dependency_seabios()
-{
-	[ "${payload_seabios}" = "y" ] || return 0
-	[ -f "${seavgabiosrom}" ] && \
-	    [ -f elf/seabios/default/libgfxinit/bios.bin.elf ] && \
-	    [ -f elf/seabios/default/vgarom/bios.bin.elf ] && \
-	    [ -f elf/seabios/default/normal/bios.bin.elf ] && return 0
-
-	x_ ./update trees -b seabios
-}
-
 build_grub_payload()
 {
 	[ "$payload_grub" != "y" ] && [ "$payload_seabios_withgrub" != "y" ] \

From 62a5f5438504bef7e190eae8aa6ee775ec9e801e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 17:57:35 +0000
Subject: [PATCH 0161/1549] build/roms: rename payload functions for clarity

they are functions that build payloads, so name them as
such. don't call them "dependencies" functions

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index 6825ff00..66e7039d 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -1,6 +1,6 @@
 #!/usr/bin/env sh
 # SPDX-License-Identifier: GPL-3.0-or-later
-# SPDX-FileCopyrightText: 2014-2016,2020,2021,2023 Leah Rowe <leah@libreboot.org>
+# SPDX-FileCopyrightText: 2014-2016,2020,2021,2023,2024 Leah Rowe <leah@libreboot.org>
 # SPDX-FileCopyrightText: 2021,2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
 # SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 # SPDX-FileCopyrightText: 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
@@ -57,7 +57,7 @@ main()
 		grub_background="background1280x800.png"
 		board="${x}"
 		configure_target
-		configure_dependencies
+		build_payloads
 		[ -d "bin/${board}" ] || continue
 		targets="* bin/${board}\n${targets}"
 	done
@@ -118,7 +118,7 @@ configure_target()
 	eval "payload_${_payload}=y"
 }
 
-configure_dependencies()
+build_payloads()
 {
 	romdir="bin/${board}"
 	cbdir="src/coreboot/${board}"
@@ -180,7 +180,7 @@ build_grub_payload()
 	    err "build_grub_elf: cannot build grub payload (grub-mkstandalone)"
 }
 
-build_dependency_uboot()
+build_uboot_payload()
 {
 	[ "${payload_uboot}" = "y" ] || return 0
 

From 2d7e7306ff3213fee6f7a6178d6c135a3a41ec84 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 18:00:53 +0000
Subject: [PATCH 0162/1549] build/roms: rename more functions for clarity

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index 66e7039d..cf4404cc 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -58,6 +58,7 @@ main()
 		board="${x}"
 		configure_target
 		build_payloads
+		build_target_mainboard
 		[ -d "bin/${board}" ] || continue
 		targets="* bin/${board}\n${targets}"
 	done
@@ -133,7 +134,7 @@ build_payloads()
 		x_ ./update trees -b memtest86plus
 
 	[ "$payload_seabios" = "y" ] && x_ ./update trees -b seabios
-	for bt in grub_payload dependency_uboot target; do
+	for bt in grub_payload dependency_uboot; do
 		eval "build_${bt}"
 	done
 }
@@ -193,7 +194,7 @@ build_uboot_payload()
 	err "Can't find u-boot build for board, $board";
 }
 
-build_target()
+build_target_mainboard()
 {
 	rm -f "${romdir}/"* || err "!prepare, rm files, ${romdir}"
 

From a7f58abb5a4540fbc7c48e1b9f91283d8ca59df7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 18:08:05 +0000
Subject: [PATCH 0163/1549] fix oversight in previous commit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/build/roms b/script/build/roms
index cf4404cc..69eb2f15 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -134,7 +134,7 @@ build_payloads()
 		x_ ./update trees -b memtest86plus
 
 	[ "$payload_seabios" = "y" ] && x_ ./update trees -b seabios
-	for bt in grub_payload dependency_uboot; do
+	for bt in grub_payload uboot_payload; do
 		eval "build_${bt}"
 	done
 }

From 3b66a5bbfbd9f1099a15d27753d2904643522255 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 19:06:01 +0000
Subject: [PATCH 0164/1549] git.cfg: simplified revision checking

it only needs to be checked before git reset

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 12 +++---------
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 14fb2dc1..d1e9389b 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -11,7 +11,6 @@ fetch_project_trees()
 	_target="${target}"
 	[ -d "src/${project}/${project}" ] || fetch_from_upstream
 	fetch_config
-	[ -z "${rev}" ] && err "fetch_project_trees $target: undefined rev"
 	if [ -d "src/${project}/${tree}" ]; then
 		printf "download/%s %s (%s): exists\n" \
 		    "${project}" "${tree}" "${_target}" 1>&2
@@ -62,7 +61,8 @@ prepare_new_tree()
 fetch_project_repo()
 {
 	scan_config "${project}" "config/git" "err"
-	verify_config
+	[ -z "${loc+x}" ] && err "fetch_project_repo $project: loc not set"
+	[ -z "${url+x}" ] && err "fetch_project_repo $project: url not set"
 
 	clone_project
 	[ -z "${depend}" ] || for d in ${depend} ; do
@@ -71,13 +71,6 @@ fetch_project_repo()
 	rm -Rf "${tmpgit}" || err "fetch_repo: !rm -Rf ${tmpgit}"
 }
 
-verify_config()
-{
-	[ -z "${rev+x}" ] && err 'verify_config: rev not set'
-	[ -z "${loc+x}" ] && err 'verify_config: loc not set'
-	[ -z "${url+x}" ] && err 'verify_config: url not set'; return 0
-}
-
 clone_project()
 {
 	loc="${loc#src/}"
@@ -97,6 +90,7 @@ git_prep()
 	_patchdir="$1"
 	_loc="$2"
 
+	[ -z "${rev+x}" ] && err "git_prep $_loc: rev not set"
 	git -C "$tmpgit" reset --hard $rev || err "git -C $_loc: !reset $rev"
 	git_am_patches "$tmpgit" "$_patchdir" || err "!am $_loc $_patchdir"
 

From 0e955f1e709baa88705853ab6097fccc726e2d79 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 19:09:45 +0000
Subject: [PATCH 0165/1549] build/roms: create elf/grub if non-existent

i overlooked this during previous re-factoring

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/script/build/roms b/script/build/roms
index 69eb2f15..825e43e3 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -144,6 +144,8 @@ build_grub_payload()
 	[ "$payload_grub" != "y" ] && [ "$payload_seabios_withgrub" != "y" ] \
 	    && [ "${payload_seabios_grubonly}" != "y" ] && return 0
 
+	x_ mkdir -p elf/grub
+
 	for keymapfile in "${kmapdir}"/*.gkb; do
 		[ -f "${keymapfile}" ] || continue
 

From 4870e84e711fe152c4d86c8e8d566d6d4059cf43 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 21:57:27 +0000
Subject: [PATCH 0166/1549] build/roms: don't needlessly re-build grub.elf

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/script/build/roms b/script/build/roms
index 825e43e3..f69ff134 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -156,6 +156,7 @@ build_grub_payload()
 		    "$keymap" > "elf/grub/keymap_$keymap.cfg" || err "!key"; :
 	done
 	[ -n "${_keyboard}" ] && keymaps="${kmapdir}/${_keyboard}.gkb"
+	[ -f "$grubelf" ] && return 0
 	[ -f "src/grub/grub-mkstandalone" ] || x_ ./update trees -b grub
 
 	./src/grub/grub-mkstandalone \
@@ -180,7 +181,7 @@ build_grub_payload()
 	    "${layoutdir}/usqwerty.gkb=${grubcfgsdir}/keymap/usqwerty.gkb" \
 	    "/boot/grub/grub.cfg=${grubcfgsdir}/config/grub_memdisk.cfg" \
 	    "/boot/grub/grub_default.cfg=${grubcfgsdir}/config/grub.cfg" || \
-	    err "build_grub_elf: cannot build grub payload (grub-mkstandalone)"
+	    err "could not generate grub.elf"
 }
 
 build_uboot_payload()

From 0b0812182989b4df540b29f91c5fc7af8d19b12c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 22:04:58 +0000
Subject: [PATCH 0167/1549] build/roms: remove unused variable

the kmapdir variable is only used once, and just
the string makes it obvious what this is for

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index f69ff134..422a1135 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -15,7 +15,6 @@ seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 grub_background="background1280x800.png"
 grubelf="elf/grub/grub.elf"
 cfgsdir="config/coreboot"
-kmapdir="config/grub/keymap"
 
 # Disable all payloads by default.
 # target.cfg files have to specifically enable [a] payload(s)
@@ -146,7 +145,7 @@ build_grub_payload()
 
 	x_ mkdir -p elf/grub
 
-	for keymapfile in "${kmapdir}"/*.gkb; do
+	for keymapfile in config/grub/keymap/*.gkb; do
 		[ -f "${keymapfile}" ] || continue
 
 		keymaps="${keymaps} ${keymapfile}"

From f5b04fa505d60384fc090682a24438a3e52db640 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jan 2024 22:11:29 +0000
Subject: [PATCH 0168/1549] build/roms: tidy up payload configuration handling

the eval for loop is overkill

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index 422a1135..a369d0e8 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -133,16 +133,14 @@ build_payloads()
 		x_ ./update trees -b memtest86plus
 
 	[ "$payload_seabios" = "y" ] && x_ ./update trees -b seabios
-	for bt in grub_payload uboot_payload; do
-		eval "build_${bt}"
-	done
+	if [ "$payload_grub" = "y" ] || [ "$payload_seabios_withgrub" = "y" ] \
+	    || [ "$payload_seabios_grubonly" = "y" ]; then build_grub_payload
+	fi
+	[ "${payload_uboot}" = "y" ] && build_uboot_payload; return 0
 }
 
 build_grub_payload()
 {
-	[ "$payload_grub" != "y" ] && [ "$payload_seabios_withgrub" != "y" ] \
-	    && [ "${payload_seabios_grubonly}" != "y" ] && return 0
-
 	x_ mkdir -p elf/grub
 
 	for keymapfile in config/grub/keymap/*.gkb; do
@@ -185,8 +183,6 @@ build_grub_payload()
 
 build_uboot_payload()
 {
-	[ "${payload_uboot}" = "y" ] || return 0
-
 	x_ ./update trees -b u-boot ${board}
 	ubdir="elf/u-boot/${board}/${uboot_config}"
 	ubootelf="${ubdir}/u-boot.elf"

From d2de03cefa67e69fc3cc4eb75ebdbf34e1da71d5 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 5 Jan 2024 13:39:49 -0700
Subject: [PATCH 0169/1549] README.md: List E6520, E5530, and M4800 as
 supported

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 util/dell-flash-unlock/README.md | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/util/dell-flash-unlock/README.md b/util/dell-flash-unlock/README.md
index cbe33dad..fee2f20b 100644
--- a/util/dell-flash-unlock/README.md
+++ b/util/dell-flash-unlock/README.md
@@ -16,9 +16,9 @@ follow the directions it outputs.
 ## Confirmed supported devices
 - Latitude E6400, E6500
 - Latitude E6410, E4310
-- Latitude E6420
-- Latitude E6430, E6530
-- Precision M6800
+- Latitude E6420, E6520
+- Latitude E6430, E6530, E5530
+- Precision M6800, M5800
 
 It is likely that any other Latitude/Precision laptops from the same era as
 devices specifically mentioned in the above list will work as Dell seems to use

From 051b17f4fe3bf6cd87624433746d4d57b09b0613 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 5 Jan 2024 14:38:47 -0700
Subject: [PATCH 0170/1549] README.md: Add notes about iopl and AC adapter
 requirement

In order for the EC to maintain the state of whether or not to set the
flash descriptor override across a power cycle, the AC adapter must be
connected, as the system leaves the voltage rail that the EC uses
powered under this condition. Without this, the utility may fail,
continually asking the user to power off and on.

On Linux, CONFIG_X86_IOPL_IOPERM must be set for the kernel, or else the
iopl call will error with "Function not implemented". Make a note of
this in case a user runs into this issue.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 util/dell-flash-unlock/README.md | 24 ++++++++++++++++++++----
 1 file changed, 20 insertions(+), 4 deletions(-)

diff --git a/util/dell-flash-unlock/README.md b/util/dell-flash-unlock/README.md
index fee2f20b..f46394bf 100644
--- a/util/dell-flash-unlock/README.md
+++ b/util/dell-flash-unlock/README.md
@@ -8,10 +8,26 @@ E6400, which mainly seem to be the Latitude and Precision lines starting from
 around 2008 (E6400 era).
 
 ## TL;DR
-On Linux, ensure you are booting with the `iomem=relaxed` kernel parameter.
-On OpenBSD, ensure you are booting with securelevel set to -1.
-Run `make` to compile the utility, and then run `sudo ./dell_flash_unlock` and
-follow the directions it outputs.
+
+### Linux specific
+- On Linux, ensure you are booting with the `iomem=relaxed` kernel parameter.
+- If you get a "Function not implemented" error, ensure that your kernel has
+  "CONFIG_X86_IOPL_IOPERM" set to "y". Here are several common locations for
+  the config and how to check them:
+  - `zcat /proc/config.gz | grep IOPL`
+  - `grep IOPL /boot/config`
+  - `grep IOPL /boot/config-$(uname -r)`
+  If it says it is not set, then you will need to install or compile a kernel
+  with that option set.
+
+### OpenBSD
+- On OpenBSD, ensure you are booting with securelevel set to -1.
+
+### General
+Make sure an AC adapter is plugged into your system
+
+Run `make` to compile the utility, and then run `./dell_flash_unlock` with
+root/superuser permissions and follow the directions it outputs.
 
 ## Confirmed supported devices
 - Latitude E6400, E6500

From bdd32a5c7f20ef7b91c784f180388b875c625bcb Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 5 Jan 2024 14:52:03 -0700
Subject: [PATCH 0171/1549] README.md: Add Latitude E7270 as supported

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 util/dell-flash-unlock/README.md | 1 +
 1 file changed, 1 insertion(+)

diff --git a/util/dell-flash-unlock/README.md b/util/dell-flash-unlock/README.md
index f46394bf..f7b6ae33 100644
--- a/util/dell-flash-unlock/README.md
+++ b/util/dell-flash-unlock/README.md
@@ -34,6 +34,7 @@ root/superuser permissions and follow the directions it outputs.
 - Latitude E6410, E4310
 - Latitude E6420, E6520
 - Latitude E6430, E6530, E5530
+- Latitude E7240
 - Precision M6800, M5800
 
 It is likely that any other Latitude/Precision laptops from the same era as

From 401c0882aaec059eab62b5ce467d3efbc1472d1f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 7 Jan 2024 13:25:33 +0000
Subject: [PATCH 0172/1549] NEW MAINBOARD: HP EliteBook 820 G2

This is of Broadwell platform, one generation above Haswell.

Of note: this uses HP Sure Start. Although the flash is 16MB,
our CBFS section (and IFD configuration) assumes 12MB flash,
so the final 4MB will be left unflashed on installation,
after blanking the private flash. The coreboot documents have
more information about this.

Some minor design changes in lbmk were made, to accomodate
this port:

Support for extracting refcode binaries added (pulled from
Google recovery images). The refcode file is an ELF that
initialises the MRC and the PCH. It is also responsible for
enabling or disabling the Intel GbE device, where Google
does not enable it, but lbmk modifies it per the instructions
on the coreboot documentation, so as to enable Intel GbE.

Google's recovery image stores the refcode as a stage file,
but coreboot changed the format (for CBFS files) after 4.13
so coreboot 4.13's cbfstool is used to extract refcode. This
realisation made me also change the script logic to use a
cbfstool and ifdtool version matching the coreboot tree, for
all parts of lbmk, whereas lbmk previously used only the
default tree for cbfstool/ifdtool, on insertion and deletion
of vendor files - it was 81dc20e744 that broke extraction of
refcode on google's recovery images, where google used an older
version of cbfstool to insert the files in their coreboot ROMs.
A further backported patch has been added, copying coreboot
revision f22f408956 which is a build fix from Nico Huber.

Iru Cai submitted an ACPI bugfix after the revision lbmk
currently uses, for coreboot/default, and this fix is
needed for rebooting to work on Linux 6.1 or higher. This
patch has been backported to lbmk, while it still uses the
same October 2023 revision of coreboot.

Broadwell MRC is inserted at the same offset as Haswell,
so I didn't need to tweak that.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...ake-use-of-spurious-null-termination.patch |  56 ++
 config/coreboot/coreboot413/target.cfg        |   3 +
 ...book_820_g2-do-not-set-EC-SLPT-on-S5.patch |  34 +
 .../patches/0029-ifdtool-nuke-option.patch    | 194 ++++++
 .../hp820g2_12mb/config/libgfxinit_corebootfb | 622 ++++++++++++++++++
 .../hp820g2_12mb/config/libgfxinit_txtmode    | 619 +++++++++++++++++
 config/coreboot/hp820g2_12mb/target.cfg       |   7 +
 config/ifd/hp820g2/1.bin                      |   1 +
 config/ifd/hp820g2/12_ifd                     | Bin 0 -> 4096 bytes
 config/ifd/hp820g2/gbe                        | Bin 0 -> 8192 bytes
 config/vendor/sources                         |  12 +
 include/mrc.sh                                |  41 +-
 include/option.sh                             |   3 +-
 script/vendor/download                        |  32 +-
 script/vendor/inject                          |  30 +-
 15 files changed, 1638 insertions(+), 16 deletions(-)
 create mode 100644 config/coreboot/coreboot413/patches/0001-cbfstool-Make-use-of-spurious-null-termination.patch
 create mode 100644 config/coreboot/coreboot413/target.cfg
 create mode 100644 config/coreboot/default/patches/0037-mb-hp-elitebook_820_g2-do-not-set-EC-SLPT-on-S5.patch
 create mode 100644 config/coreboot/haswell/patches/0029-ifdtool-nuke-option.patch
 create mode 100644 config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/hp820g2_12mb/target.cfg
 create mode 100644 config/ifd/hp820g2/1.bin
 create mode 100644 config/ifd/hp820g2/12_ifd
 create mode 100644 config/ifd/hp820g2/gbe

diff --git a/config/coreboot/coreboot413/patches/0001-cbfstool-Make-use-of-spurious-null-termination.patch b/config/coreboot/coreboot413/patches/0001-cbfstool-Make-use-of-spurious-null-termination.patch
new file mode 100644
index 00000000..dfc684e1
--- /dev/null
+++ b/config/coreboot/coreboot413/patches/0001-cbfstool-Make-use-of-spurious-null-termination.patch
@@ -0,0 +1,56 @@
+From f22f408956bf02609a96b7d72fb3321da159bfc6 Mon Sep 17 00:00:00 2001
+From: Nico Huber <nico.huber@secunet.com>
+Date: Tue, 22 Jun 2021 13:49:44 +0000
+Subject: [PATCH 1/1] cbfstool: Make use of spurious null-termination
+
+The null-termination of `filetypes` was added after the code was
+written, obviously resulting in NULL dereferences. As some more
+code has grown around the termination, it's hard to revert the
+regression, so let's update the code that still used the array
+length.
+
+This fixes commit 7f5f9331d1 (util/cbfstool: fix buffer over-read)
+which actually did fix something, but only one path while it broke
+two others. We should be careful with fixes, they can always break
+something else. Especially when a dumb tool triggered the patching
+it seems likely that fewer people looked into related code.
+
+Change-Id: If2ece1f5ad62952ed2e57769702e318ba5468f0c
+Signed-off-by: Nico Huber <nico.huber@secunet.com>
+Reviewed-on: https://review.coreboot.org/c/coreboot/+/55763
+Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
+Reviewed-by: Julius Werner <jwerner@chromium.org>
+---
+ util/cbfstool/common.c | 8 ++++----
+ 1 file changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
+index e2ed38ffc4..539d0baccf 100644
+--- a/util/cbfstool/common.c
++++ b/util/cbfstool/common.c
+@@ -168,10 +168,10 @@ void print_supported_architectures(void)
+ 
+ void print_supported_filetypes(void)
+ {
+-	int i, number = ARRAY_SIZE(filetypes);
++	int i;
+ 
+-	for (i=0; i<number; i++) {
+-		printf(" %s%c", filetypes[i].name, (i==(number-1))?'\n':',');
++	for (i=0; filetypes[i].name; i++) {
++		printf(" %s%c", filetypes[i].name, filetypes[i + 1].name ? ',' : '\n');
+ 		if ((i%8) == 7)
+ 			printf("\n");
+ 	}
+@@ -180,7 +180,7 @@ void print_supported_filetypes(void)
+ uint64_t intfiletype(const char *name)
+ {
+ 	size_t i;
+-	for (i = 0; i < (sizeof(filetypes) / sizeof(struct typedesc_t)); i++)
++	for (i = 0; filetypes[i].name; i++)
+ 		if (strcmp(filetypes[i].name, name) == 0)
+ 			return filetypes[i].type;
+ 	return -1;
+-- 
+2.39.2
+
diff --git a/config/coreboot/coreboot413/target.cfg b/config/coreboot/coreboot413/target.cfg
new file mode 100644
index 00000000..2d366a9e
--- /dev/null
+++ b/config/coreboot/coreboot413/target.cfg
@@ -0,0 +1,3 @@
+tree="coreboot413"
+rev="5c186c6777c9438ff4681929c9c25c98dee28bef"
+xarch="i386-elf"
diff --git a/config/coreboot/default/patches/0037-mb-hp-elitebook_820_g2-do-not-set-EC-SLPT-on-S5.patch b/config/coreboot/default/patches/0037-mb-hp-elitebook_820_g2-do-not-set-EC-SLPT-on-S5.patch
new file mode 100644
index 00000000..bc584ffe
--- /dev/null
+++ b/config/coreboot/default/patches/0037-mb-hp-elitebook_820_g2-do-not-set-EC-SLPT-on-S5.patch
@@ -0,0 +1,34 @@
+From 6202669b8e8f50837448e2d4c482671abf72f648 Mon Sep 17 00:00:00 2001
+From: Iru Cai <mytbk920423@gmail.com>
+Date: Sun, 5 Nov 2023 17:12:43 +0800
+Subject: [PATCH 1/1] mb/hp/elitebook_820_g2: do not set EC SLPT on S5
+
+Setting EC SLPT bit in S5 will make HP EliteBook 820 G2
+fail to reboot under Linux 6.1 and later kernel versions.
+
+Change-Id: I48f5a35cd78db3b32d9f76cb8e266c738da34e7c
+Signed-off-by: Iru Cai <mytbk920423@gmail.com>
+Reviewed-on: https://review.coreboot.org/c/coreboot/+/78907
+Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
+Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
+---
+ src/mainboard/hp/elitebook_820_g2/acpi/platform.asl | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/src/mainboard/hp/elitebook_820_g2/acpi/platform.asl b/src/mainboard/hp/elitebook_820_g2/acpi/platform.asl
+index 8023ae826c..d17f575c40 100644
+--- a/src/mainboard/hp/elitebook_820_g2/acpi/platform.asl
++++ b/src/mainboard/hp/elitebook_820_g2/acpi/platform.asl
+@@ -10,5 +10,8 @@ Method(_WAK,1)
+ 
+ Method(_PTS,1)
+ {
+-	\_SB.PCI0.LPCB.EC0.SLPT = Arg0
++	If (Arg0 != 5)
++	{
++		\_SB.PCI0.LPCB.EC0.SLPT = Arg0
++	}
+ }
+-- 
+2.39.2
+
diff --git a/config/coreboot/haswell/patches/0029-ifdtool-nuke-option.patch b/config/coreboot/haswell/patches/0029-ifdtool-nuke-option.patch
new file mode 100644
index 00000000..18d6a21e
--- /dev/null
+++ b/config/coreboot/haswell/patches/0029-ifdtool-nuke-option.patch
@@ -0,0 +1,194 @@
+From 6f94e9aa38a5d6589b1a64642dfcb5ccbf90b8d3 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 9 Jan 2024 01:53:54 +0000
+Subject: [PATCH 1/1] ifdtool nuke option
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
+ 1 file changed, 83 insertions(+), 31 deletions(-)
+
+diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
+index e97efcc206..ee27e7f2e6 100644
+--- a/util/ifdtool/ifdtool.c
++++ b/util/ifdtool/ifdtool.c
+@@ -1711,6 +1711,7 @@ static void print_usage(const char *name)
+ 	       "                                         tgl    - Tiger Lake\n"
+ 	       "   -S | --setpchstrap                    Write a PCH strap\n"
+ 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
++	       "   -N | --nuke <region>                  Overwrite the specified region with 0xFF (all ones)\n"
+ 	       "   -v | --version:                       print the version\n"
+ 	       "   -h | --help:                          print this help\n\n"
+ 	       "<region> is one of Descriptor, BIOS, ME, GbE, Platform Data, Secondary BIOS, "
+@@ -1718,6 +1719,60 @@ static void print_usage(const char *name)
+ 	       "\n");
+ }
+ 
++static int
++get_region_type_string(const char *region_type_string)
++{
++	if (!strcasecmp("Descriptor", region_type_string))
++		return 0;
++	else if (!strcasecmp("BIOS", region_type_string))
++		return 1;
++	else if (!strcasecmp("ME", region_type_string))
++		return 2;
++	else if (!strcasecmp("GbE", region_type_string))
++		return 3;
++	else if (!strcasecmp("Platform Data", region_type_string))
++		return 4;
++	else if (!strcasecmp("Device Exp1", region_type_string))
++		return 5;
++	else if (!strcasecmp("Secondary BIOS", region_type_string))
++		return 6;
++	else if (!strcasecmp("Reserved", region_type_string))
++		return 7;
++	else if (!strcasecmp("EC", region_type_string))
++		return 8;
++	else if (!strcasecmp("Device Exp2", region_type_string))
++		return 9;
++	else if (!strcasecmp("IE", region_type_string))
++		return 10;
++	else if (!strcasecmp("10GbE_0", region_type_string))
++		return 11;
++	else if (!strcasecmp("10GbE_1", region_type_string))
++		return 12;
++	else if (!strcasecmp("PTT", region_type_string))
++		return 15;
++	return -1;
++}
++
++static void
++nuke(const char *filename, char *image, int size, int region_type)
++{
++	int i;
++	region_t region;
++	const frba_t *frba = find_frba(image, size);
++	if (!frba)
++		exit(EXIT_FAILURE);
++
++	region = get_region(frba, region_type);
++	if (region.size > 0) {
++		for (i = region.base; i <= region.limit; i++) {
++			if ((i + 1) > (size))
++				break;
++			image[i] = 0xFF;
++		}
++		write_image(filename, image, size);
++	}
++}
++
+ int main(int argc, char *argv[])
+ {
+ 	int opt, option_index = 0;
+@@ -1725,6 +1780,7 @@ int main(int argc, char *argv[])
+ 	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
+ 	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
+ 	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0;
++	int mode_nuke = 0;
+ 	char *region_type_string = NULL, *region_fname = NULL;
+ 	const char *layout_fname = NULL;
+ 	char *new_filename = NULL;
+@@ -1755,6 +1811,7 @@ int main(int argc, char *argv[])
+ 		{"validate", 0, NULL, 't'},
+ 		{"setpchstrap", 1, NULL, 'S'},
+ 		{"newvalue", 1, NULL, 'V'},
++		{"nuke", 1, NULL, 'N'},
+ 		{0, 0, 0, 0}
+ 	};
+ 
+@@ -1795,35 +1852,8 @@ int main(int argc, char *argv[])
+ 			region_fname++;
+ 			// Descriptor, BIOS, ME, GbE, Platform
+ 			// valid type?
+-			if (!strcasecmp("Descriptor", region_type_string))
+-				region_type = 0;
+-			else if (!strcasecmp("BIOS", region_type_string))
+-				region_type = 1;
+-			else if (!strcasecmp("ME", region_type_string))
+-				region_type = 2;
+-			else if (!strcasecmp("GbE", region_type_string))
+-				region_type = 3;
+-			else if (!strcasecmp("Platform Data", region_type_string))
+-				region_type = 4;
+-			else if (!strcasecmp("Device Exp1", region_type_string))
+-				region_type = 5;
+-			else if (!strcasecmp("Secondary BIOS", region_type_string))
+-				region_type = 6;
+-			else if (!strcasecmp("Reserved", region_type_string))
+-				region_type = 7;
+-			else if (!strcasecmp("EC", region_type_string))
+-				region_type = 8;
+-			else if (!strcasecmp("Device Exp2", region_type_string))
+-				region_type = 9;
+-			else if (!strcasecmp("IE", region_type_string))
+-				region_type = 10;
+-			else if (!strcasecmp("10GbE_0", region_type_string))
+-				region_type = 11;
+-			else if (!strcasecmp("10GbE_1", region_type_string))
+-				region_type = 12;
+-			else if (!strcasecmp("PTT", region_type_string))
+-				region_type = 15;
+-			if (region_type == -1) {
++			if ((region_type =
++			    get_region_type_string(region_type_string)) == -1) {
+ 				fprintf(stderr, "No such region type: '%s'\n\n",
+ 					region_type_string);
+ 				print_usage(argv[0]);
+@@ -1988,6 +2018,22 @@ int main(int argc, char *argv[])
+ 		case 't':
+ 			mode_validate = 1;
+ 			break;
++               case 'N':
++                       region_type_string = strdup(optarg);
++                       if (!region_type_string) {
++                               fprintf(stderr, "No region specified\n");
++                               print_usage(argv[0]);
++                               exit(EXIT_FAILURE);
++                       }
++                       if ((region_type =
++                           get_region_type_string(region_type_string)) == -1) {
++                               fprintf(stderr, "No such region type: '%s'\n\n",
++                                       region_type_string);
++                               print_usage(argv[0]);
++                               exit(EXIT_FAILURE);
++                       }
++                       mode_nuke = 1;
++                       break;
+ 		case 'v':
+ 			print_version();
+ 			exit(EXIT_SUCCESS);
+@@ -2003,7 +2049,8 @@ int main(int argc, char *argv[])
+ 
+ 	if ((mode_dump + mode_layout + mode_extract + mode_inject + mode_setstrap +
+ 		mode_newlayout + (mode_spifreq | mode_em100 | mode_unlocked |
+-		 mode_locked) + mode_altmedisable + mode_validate) > 1) {
++		 mode_locked) + mode_altmedisable + mode_validate +
++		 mode_nuke) > 1) {
+ 		fprintf(stderr, "You may not specify more than one mode.\n\n");
+ 		print_usage(argv[0]);
+ 		exit(EXIT_FAILURE);
+@@ -2011,7 +2058,8 @@ int main(int argc, char *argv[])
+ 
+ 	if ((mode_dump + mode_layout + mode_extract + mode_inject + mode_setstrap +
+ 	     mode_newlayout + mode_spifreq + mode_em100 + mode_locked +
+-	     mode_unlocked + mode_density + mode_altmedisable + mode_validate) == 0) {
++	     mode_unlocked + mode_density + mode_altmedisable +
++	     mode_validate + mode_nuke) == 0) {
+ 		fprintf(stderr, "You need to specify a mode.\n\n");
+ 		print_usage(argv[0]);
+ 		exit(EXIT_FAILURE);
+@@ -2109,6 +2157,10 @@ int main(int argc, char *argv[])
+ 		write_image(new_filename, image, size);
+ 	}
+ 
++	if (mode_nuke) {
++               nuke(new_filename, image, size, region_type);
++	}
++
+ 	if (mode_altmedisable) {
+ 		fpsba_t *fpsba = find_fpsba(image, size);
+ 		fmsba_t *fmsba = find_fmsba(image, size);
+-- 
+2.39.2
+
diff --git a/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb b/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..1d0ec358
--- /dev/null
+++ b/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,622 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+CONFIG_VENDOR_HP=y
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="EliteBook 820 G2"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="hp/elitebook_820_g2"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="HP"
+CONFIG_CBFS_SIZE=0xbdc000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/hp820g2/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/hp820g2/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/hp820g2/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_PCIEXP_AER=y
+CONFIG_VBT_DATA_SIZE_KB=8
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_BOARD_HP_280_G2 is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
+CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
+# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_2170P is not set
+# CONFIG_BOARD_HP_2560P is not set
+# CONFIG_BOARD_HP_2570P is not set
+# CONFIG_BOARD_HP_2760P is not set
+# CONFIG_BOARD_HP_8460P is not set
+# CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8770W is not set
+# CONFIG_BOARD_HP_FOLIO_9470M is not set
+# CONFIG_BOARD_HP_PROBOOK_6360B is not set
+# CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
+CONFIG_EC_HP_KBC1126_GPE=0x6
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_EHCI_BAR=0xd8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
+CONFIG_MRC_BIN_ADDRESS=0xfffa0000
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HAVE_REFCODE_BLOB=y
+CONFIG_REFCODE_BLOB_FILE="../../../mrc/broadwell/refcode"
+CONFIG_SOC_INTEL_BROADWELL=y
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_INTEL_LYNXPOINT_LP=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_HP_KBC1126=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_PC80_SYSTEM=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_IOAPIC=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_REG_SCRIPT=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode b/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..6770e71f
--- /dev/null
+++ b/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,619 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+CONFIG_VENDOR_HP=y
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="EliteBook 820 G2"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="hp/elitebook_820_g2"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="HP"
+CONFIG_CBFS_SIZE=0xbdc000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/hp820g2/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/hp820g2/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/hp820g2/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_PCIEXP_AER=y
+CONFIG_VBT_DATA_SIZE_KB=8
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_BOARD_HP_280_G2 is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
+CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
+# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_2170P is not set
+# CONFIG_BOARD_HP_2560P is not set
+# CONFIG_BOARD_HP_2570P is not set
+# CONFIG_BOARD_HP_2760P is not set
+# CONFIG_BOARD_HP_8460P is not set
+# CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8770W is not set
+# CONFIG_BOARD_HP_FOLIO_9470M is not set
+# CONFIG_BOARD_HP_PROBOOK_6360B is not set
+# CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
+CONFIG_EC_HP_KBC1126_GPE=0x6
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_EHCI_BAR=0xd8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
+CONFIG_MRC_BIN_ADDRESS=0xfffa0000
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HAVE_REFCODE_BLOB=y
+CONFIG_REFCODE_BLOB_FILE="../../../mrc/broadwell/refcode"
+CONFIG_SOC_INTEL_BROADWELL=y
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_INTEL_LYNXPOINT_LP=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_HP_KBC1126=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_PC80_SYSTEM=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_IOAPIC=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_REG_SCRIPT=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
new file mode 100644
index 00000000..8688df3f
--- /dev/null
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -0,0 +1,7 @@
+tree="default"
+xarch="i386-elf"
+payload_grub="y"
+payload_grub_withseabios="y"
+payload_seabios="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/ifd/hp820g2/1.bin b/config/ifd/hp820g2/1.bin
new file mode 100644
index 00000000..6b2aaa76
--- /dev/null
+++ b/config/ifd/hp820g2/1.bin
@@ -0,0 +1 @@
+

\ No newline at end of file
diff --git a/config/ifd/hp820g2/12_ifd b/config/ifd/hp820g2/12_ifd
new file mode 100644
index 0000000000000000000000000000000000000000..471237f5b4ec95a9ddbf2104f85a40ea2d1451fa
GIT binary patch
literal 4096
zcmezW9~DF`{lL%6z{1SNBp|B5sK|gS`~SZy!-Nz?r-ZfJcOE$ol4Ae@6^8%Z%nZs5
zj0{W+|M?jh{?|h>SRSP2|9=Ta4i0p)1_OV=Z3Tw^j0`Lwe}Dkf!xIn&64}7PV$f1>
zfMGhr(U~w|Ssks&y2BD+E)!G`X2@Xh7qM;tIh|Owqv}ROU^E0qLtr!nMnhmU1V%$(
zGz3ONU^E1VRtPBUl3-v}U{yGzAi?0O;HvQ6L4rY5K~+Jf03v<@${$+3BG0w=xkmdw
E0Bem-cK`qY

literal 0
HcmV?d00001

diff --git a/config/ifd/hp820g2/gbe b/config/ifd/hp820g2/gbe
new file mode 100644
index 0000000000000000000000000000000000000000..0de5ce95592c808eeb955c3dcae84acd63dbd895
GIT binary patch
literal 8192
zcmcb&m&eh?k&)y7e-#E0_zwh!1)`K}1Qv;c_)P3T;sEPX4Fd)-Ad4r7&w<OCLzr=q
z=-OS2L>Gfe5Q~AKp@G4#jRT|ys6}A`h|vecjLZ(EqU;VJb5Q{U)Bpb_^&n-K0HLxW
zL7suZLx8~nNV8lNWMDQD0xAcxw-_+UFc>nh0clPk%?_jmfHW77mH^T`P?{G?GyXMT
z(3xY%;IqwuffXo^uwj%n8UiCX1TuqLm>DrM;HU^%2r%2C2>`i!cre9AMMgt_)DRfC
zrO&9(M?+vV1V%$(Gz3ONU^D~<A_VS@_WuVW*hlRg4S_)s0;BzZ;(BYN{eR-ZX;c;I
eAuuQkf>B3|hQMeDjE2By2#kinXb6m$5C8x?rGw4@

literal 0
HcmV?d00001

diff --git a/config/vendor/sources b/config/vendor/sources
index f5a0afc0..fec16d51 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -33,6 +33,18 @@
 	MRC_board peppy
 }
 
+{hp820g2}{
+	DL_hash 1ac05a3e4f46426eeb77f89c4aca25ed1ad64479d8fcba6a3ab63a944512bacbc5d148cc7b9c4ff4b8c90a1fb1de4776e46f14aca8021900e0df37246aa0b717
+	DL_url https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe
+	DL_url_bkup https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe
+	MRC_url https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip
+	MRC_url_bkup https://web.archive.org/web/20220310155922/https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip
+	MRC_hash 3ff1599c52539f0707a07a8664a84ce51cd3fed1569df4bb7aa6722fc8dec0af1754250333b6ca1a9794d970a4de7b29a5cf2499f5b61e4c3eab64d1314aaea9
+	MRC_board samus
+	MRC_refcode_cbtree coreboot413
+	MRC_refcode_gbe 131253
+}
+
 {hp8200sff}{
 	DL_hash 8fcb691bf84dc1feefc3c84f7cc59eadaabb200477bb3ecba1b050f23f133b0a8c2539015a523f676544c2dff64599bcba7e844e8c31757b90d70bb4485b5664
 	DL_url https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe
diff --git a/include/mrc.sh b/include/mrc.sh
index 6a9b0a12..32c68a83 100755
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -1,11 +1,25 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 # Logic based on util/chromeos/crosfirmware.sh in coreboot cfc26ce278.
-# Modifications in this version are Copyright 2021 and 2023 Leah Rowe.
+# Modifications in this version are Copyright 2021, 2023 and 2024 Leah Rowe.
 # Original copyright detailed in repo: https://review.coreboot.org/coreboot/
 
 eval "$(setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL)"
 
+extract_ref()
+{
+	# refcode needed on broadwell, but not needed on haswell
+
+	# we check mrc twice, because each check only verifies one file,
+	# but refcode is downloaded alongside mrc. in cases where lbmk
+	# erred, downloading only mrc, we must ensure downloading refcode
+	[ -n "$CONFIG_MRC_FILE" ] || \
+		err "extract_ref $board: CONFIG_MRC_FILE not defined"
+
+	# the extract_mrc function actually downloads the refcode
+	fetch "mrc" "$MRC_url" "$MRC_url_bkup" "$MRC_hash" "$CONFIG_MRC_FILE"
+}
+
 extract_mrc()
 {
 	[ -z "$MRC_board" ] && err "extract_mrc $MRC_hash: MRC_board not set"
@@ -22,6 +36,8 @@ extract_mrc()
 
 	"${cbfstool}" "${appdir}/"bios.bin extract -n mrc.bin \
 	    -f "$_dest" -r RO_SECTION || err "extract_mrc: cbfstool $_dest"
+
+	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && extract_refcode; return 0
 }
 
 extract_partition()
@@ -40,3 +56,26 @@ extract_partition()
 	printf "cd /usr/sbin\ndump chromeos-firmwareupdate ${SHELLBALL}\nquit" \
 	    | debugfs "root-a.ext2" || err "can't extract shellball"
 }
+
+extract_refcode()
+{
+	_refdest="${CONFIG_REFCODE_BLOB_FILE##*../}"
+	[ -f "$_refdest" ] && return 0
+
+	# cbfstool changed the attributes scheme for stage files,
+	# incompatible with older versions before coreboot 4.14,
+	# so we need coreboot 4.13 cbfstool for certain refcode files
+	[ -n "$cbfstoolref" ] || \
+		err "extract_refcode $board: MRC_refcode_cbtree not set"
+	mkdir -p "${_refdest%/*}" || \
+	    err "extract_refcode $board: !mkdir -p ${_refdest%/*}"
+
+	"$cbfstoolref" "$appdir/bios.bin" extract \
+	    -m x86 -n fallback/refcode -f "$_refdest" -r RO_SECTION \
+	    || err "extract_refcode $board: !cbfstoolref $_refdest"
+
+	# enable the Intel GbE device, if told by offset MRC_refcode_gbe
+	[ -z "$MRC_refcode_gbe" ] || dd if="config/ifd/hp820g2/1.bin" \
+	    of="$_refdest" bs=1 seek=$MRC_refcode_gbe count=1 conv=notrunc || \
+	    err "extract_refcode $_refdest: byte $MRC_refcode_gbe"; return 0
+}
diff --git a/include/option.sh b/include/option.sh
index c2f4fef5..2284fb0b 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -19,7 +19,8 @@ eval "$(setvars "" CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
     CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW2_OFFSET \
     CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_GBE_BIN_PATH \
     CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE \
-    CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE _dest board boarddir)"
+    CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE _dest board boarddir \
+    CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE)"
 
 items()
 {
diff --git a/script/vendor/download b/script/vendor/download
index 1f96c665..592c14bc 100755
--- a/script/vendor/download
+++ b/script/vendor/download
@@ -2,7 +2,7 @@
 # SPDX-License-Identifier: GPL-3.0-only
 # SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 # SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# SPDX-FileCopyrightText: 2023 Leah Rowe <leah@libreboot.org>
+# SPDX-FileCopyrightText: 2023-2024 Leah Rowe <leah@libreboot.org>
 
 . "include/err.sh"
 . "include/option.sh"
@@ -14,16 +14,15 @@ _ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
 _7ztest="a"
 
 e6400_unpack="${PWD}/src/bios_extract/dell_inspiron_1100_unpacker.py"
-kbc1126_ec_dump="${PWD}/${cbdir}/util/kbc1126/kbc1126_ec_dump"
 me7updateparser="${PWD}/util/me7_update_parser/me7_update_parser.py"
-mecleaner="${PWD}/${cbdir}/util/me_cleaner/me_cleaner.py"
 pfs_extract="${PWD}/src/biosutilities/Dell_PFS_Extract.py"
 uefiextract="${PWD}/src/uefitool/uefiextract"
 
 eval "$(setvars "" _b _dl EC_url EC_url_bkup EC_hash DL_hash DL_url DL_url_bkup \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
     E6400_VGA_romname SCH5545EC_DL_url SCH5545EC_DL_url_bkup SCH5545EC_DL_hash \
-    is_rom)"
+    is_rom tree mecleaner kbc1126_ec_dump MRC_refcode_cbtree cbfstoolref \
+    MRC_refcode_gbe)"
 
 main()
 {
@@ -50,6 +49,13 @@ detect_firmware()
 
 	set -- "${boarddir}/config/"*
 	. "${1}" 2>/dev/null
+	. "${boarddir}/target.cfg" 2>/dev/null
+	[ -z "$tree" ] && err "detect_firmware $boarddir: tree undefined"
+	cbdir="src/coreboot/$tree"
+	cbfstool="cbutils/$tree/cbfstool"
+
+	mecleaner="${PWD}/${cbdir}/util/me_cleaner/me_cleaner.py"
+	kbc1126_ec_dump="${PWD}/${cbdir}/util/kbc1126/kbc1126_ec_dump"
 
 	for c in CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
 	    CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW; do
@@ -66,9 +72,14 @@ build_dependencies()
 		x_ ./update trees -f "${d}"
 	done
 	[ -f "${uefiextract}" ] || x_ ./update trees -b uefitool
-	[ -f "${kbc1126_ec_dump}" ] || x_ make -C "${cbdir}/util/kbc1126"
+	[ ! -d "${kbc1126_ec_dump%/*}" ] || [ -f "${kbc1126_ec_dump}" ] || x_ \
+	    make -C "${cbdir}/util/kbc1126"
+	[ -n "$MRC_refcode_cbtree" ] && \
+		cbfstoolref="cbutils/$MRC_refcode_cbtree/cbfstool"
+	[ -z "$cbfstoolref" ] || [ -f "$cbfstoolref" ] || \
+	    x_ ./update trees -b coreboot utils $MRC_refcode_cbtree
 	[ -f "${cbfstool}" ] && [ -f "${ifdtool}" ] && return 0
-	x_ ./update trees -b coreboot utils default
+	x_ ./update trees -b coreboot utils $tree
 }
 
 download_vendorfiles()
@@ -87,6 +98,10 @@ download_vendorfiles()
 		    "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
 	[ -z "${CONFIG_HAVE_MRC}" ] && return 0
 	fetch "mrc" "$MRC_url" "$MRC_url_bkup" "$MRC_hash" "$CONFIG_MRC_FILE"
+
+	# in case only mrc downloaded before, in a pair of mrc/refcode:
+	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && fetch "ref" "$MRC_url" \
+	    "$MRC_url_bkup" "$MRC_hash" "$CONFIG_REFCODE_BLOB_FILE"; return 0
 }
 
 fetch()
@@ -156,6 +171,9 @@ mkdirs()
 
 extract_intel_me()
 {
+	[ ! -f "$mecleaner" ] && \
+		err "extract_intel_me $cbdir: me_cleaner missing"
+
 	_me="${PWD}/${_dest}" # must always be an absolute path
 	cdir="${PWD}/${appdir}" # must always be an absolute path
 	[ $# -gt 0 ] && _me="${1}" && cdir="${2}"
@@ -198,6 +216,8 @@ extract_archive()
 
 extract_kbc1126ec()
 {
+	[ ! -f "$kbc1126_ec_dump" ] && \
+		err "extract_kbc1126ec $cbdir: kbc1126_ec_dump missing"
 	(
 	x_ cd "${appdir}/"
 	mv Rompaq/68*.BIN ec.bin || :
diff --git a/script/vendor/inject b/script/vendor/inject
index 5734b599..2f55e166 100755
--- a/script/vendor/inject
+++ b/script/vendor/inject
@@ -2,14 +2,14 @@
 # SPDX-License-Identifier: GPL-3.0-only
 # SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 # SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# SPDX-FileCopyrightText: 2023 Leah Rowe <leah@libreboot.org>
+# SPDX-FileCopyrightText: 2023-2024 Leah Rowe <leah@libreboot.org>
 
 . "include/err.sh"
 . "include/option.sh"
 
 nvmutil="util/nvmutil/nvm"
 
-eval "$(setvars "" archive rom modifygbe nukemode release new_mac)"
+eval "$(setvars "" archive rom modifygbe nukemode release new_mac tree)"
 
 main()
 {
@@ -51,7 +51,11 @@ check_board()
 	fi
 
 	boarddir="${cbcfgsdir}/${board}"
-	[ -d "$boarddir" ] || err "check_board: board $board missing"; return 0
+	[ -d "$boarddir" ] || err "check_board: board $board missing"
+	[ -f "$boarddir/target.cfg" ] || \
+		err "check_board $board: target.cfg missing"
+	. "$boarddir/target.cfg" 2>/dev/null
+	[ -z "$tree" ] && err "check_board $board: tree undefined"; return 0
 }
 
 check_release()
@@ -84,9 +88,12 @@ detect_board()
 
 build_dependencies()
 {
-	[ -d "${cbdir}" ] || x_ ./update trees -f coreboot default
+	cbdir="src/coreboot/$tree"
+	cbfstool="cbutils/$tree/cbfstool"
+	ifdtool="cbutils/$tree/ifdtool"
+	[ -d "${cbdir}" ] || x_ ./update trees -f coreboot $tree
 	if [ ! -f "${cbfstool}" ] || [ ! -f "${ifdtool}" ]; then
-		x_ ./update trees -b coreboot utils default
+		x_ ./update trees -b coreboot utils $tree
 	fi
 	[ -z "$new_mac" ] || [ -f "$nvmutil" ] || x_ make -C util/nvmutil
 	[ "$nukemode" = "nuke" ] || x_ ./vendor download $board; return 0
@@ -144,6 +151,8 @@ patch_rom()
 
 	[ "$CONFIG_HAVE_MRC" = "y" ] && \
 		inject "mrc.bin" "${CONFIG_MRC_FILE}" "mrc" "0xfffa0000"
+	[ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && \
+		inject "fallback/refcode" "$CONFIG_REFCODE_BLOB_FILE" "stage"
 	[ "${CONFIG_HAVE_ME_BIN}" = "y" ] && \
 		inject "IFD" "${CONFIG_ME_BIN_PATH}" "me"
 	[ "${CONFIG_KBC1126_FIRMWARE}" = "y" ] && \
@@ -200,9 +209,14 @@ inject()
 		fi
 	else
 		if [ "${nukemode}" != "nuke" ]; then
-			"$cbfstool" "$rom" add -f "$_dest" \
-			    -n "$cbfsname" -t $_t $_offset || \
-			    err "inject $rom: can't insert $_t file $_dest"
+			if [ "$_t" = "stage" ]; then # broadwell refcode
+				"$cbfstool" "$rom" add-stage -f "$_dest" \
+				    -n "$cbfsname" -t stage -c lzma
+			else
+				"$cbfstool" "$rom" add -f "$_dest" \
+				    -n "$cbfsname" -t $_t $_offset || \
+				    err "$rom: can't insert $_t file $_dest"
+			fi
 		else
 			"$cbfstool" "$rom" remove -n "$cbfsname" || \
 			    err "inject $rom: can't remove $cbfsname"

From 09bed9a4c3257dbf9b4d59975db0071472ed67eb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 12 Jan 2024 16:08:56 +0000
Subject: [PATCH 0173/1549] REMOVE MAINBOARD: lenovo x201

with neutered ME, fan control fails. while there are
ways to mitigate it, many users will not, and will
likely see their system overheat, which is very
dangerous.

this bug (failed fan control on neutered ME) only
affects arrandale machines such as lenovo x201.
the newer machines are not affected by this.

other arrandale machines will probably not be added
to libreboot because of this, or they will be subject
to further testing.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../x201_8mb/config/libgfxinit_corebootfb     | 651 ------------------
 .../x201_8mb/config/libgfxinit_txtmode        | 647 -----------------
 config/coreboot/x201_8mb/target.cfg           |   7 -
 config/ifd/x201/gbe                           | Bin 8192 -> 0 bytes
 config/ifd/x201/ifd                           | Bin 4096 -> 0 bytes
 config/vendor/sources                         |   6 -
 script/update/release                         |   4 -
 script/vendor/download                        |  24 +-
 8 files changed, 7 insertions(+), 1332 deletions(-)
 delete mode 100644 config/coreboot/x201_8mb/config/libgfxinit_corebootfb
 delete mode 100644 config/coreboot/x201_8mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/x201_8mb/target.cfg
 delete mode 100644 config/ifd/x201/gbe
 delete mode 100644 config/ifd/x201/ifd

diff --git a/config/coreboot/x201_8mb/config/libgfxinit_corebootfb b/config/coreboot/x201_8mb/config/libgfxinit_corebootfb
deleted file mode 100644
index 38eedfe1..00000000
--- a/config/coreboot/x201_8mb/config/libgfxinit_corebootfb
+++ /dev/null
@@ -1,651 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_FAMILY="ThinkPad X201"
-CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X201"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/x201"
-CONFIG_VGA_BIOS_ID="8086,0046"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0x7EC000
-CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
-CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
-CONFIG_MAX_CPUS=4
-CONFIG_ME_CLEANER_ARGS="-S -w EFFS"
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_DRAM_RESET_GATE_GPIO=10
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=256
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_VBOOT_SLOTS_RW_A=y
-CONFIG_DCACHE_RAM_BASE=0xfefc0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/x201/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/x201/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/x201/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X201"
-CONFIG_HAVE_IFD_BIN=y
-# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-CONFIG_BOARD_LENOVO_X201=y
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0018"
-CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_8192=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_8192=y
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=8192
-CONFIG_ROM_SIZE=0x00800000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_MODEL_2065X=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_MICROCODE_UPDATE_PRE_RAM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_IRONLAKE=y
-
-#
-# Southbridge
-#
-# CONFIG_HIDE_MEI_ON_ERROR is not set
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_IBEXPEAK=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-CONFIG_SUPERIO_NSC_PC87382=y
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-CONFIG_LINEAR_FRAMEBUFFER=y
-# CONFIG_BOOTSPLASH is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x10000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_DRIVERS_LENOVO_WACOM=y
-CONFIG_DIGITIZER_AUTODETECT=y
-# CONFIG_DIGITIZER_PRESENT is not set
-# CONFIG_DIGITIZER_ABSENT is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_NO_UART_ON_SUPERIO=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_EDID=y
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Ironlake"
-CONFIG_GFX_GMA_PCH="Ibex_Peak"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_VGA=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_RAM_SETUP=y
-# CONFIG_DEBUG_RAM_SETUP is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/x201_8mb/config/libgfxinit_txtmode b/config/coreboot/x201_8mb/config/libgfxinit_txtmode
deleted file mode 100644
index d471233c..00000000
--- a/config/coreboot/x201_8mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,647 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_FAMILY="ThinkPad X201"
-CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X201"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/x201"
-CONFIG_VGA_BIOS_ID="8086,0046"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0x7EC000
-CONFIG_MAX_CPUS=4
-CONFIG_ME_CLEANER_ARGS="-S -w EFFS"
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_DRAM_RESET_GATE_GPIO=10
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=256
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_VBOOT_SLOTS_RW_A=y
-CONFIG_DCACHE_RAM_BASE=0xfefc0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/x201/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/x201/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/x201/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X201"
-CONFIG_HAVE_IFD_BIN=y
-# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-CONFIG_BOARD_LENOVO_X201=y
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0018"
-CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_8192=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_8192=y
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=8192
-CONFIG_ROM_SIZE=0x00800000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_MODEL_2065X=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_MICROCODE_UPDATE_PRE_RAM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_IRONLAKE=y
-
-#
-# Southbridge
-#
-# CONFIG_HIDE_MEI_ON_ERROR is not set
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_IBEXPEAK=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-CONFIG_SUPERIO_NSC_PC87382=y
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x10000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_DRIVERS_LENOVO_WACOM=y
-CONFIG_DIGITIZER_AUTODETECT=y
-# CONFIG_DIGITIZER_PRESENT is not set
-# CONFIG_DIGITIZER_ABSENT is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_NO_UART_ON_SUPERIO=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_EDID=y
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Ironlake"
-CONFIG_GFX_GMA_PCH="Ibex_Peak"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_VGA=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_RAM_SETUP=y
-# CONFIG_DEBUG_RAM_SETUP is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/x201_8mb/target.cfg b/config/coreboot/x201_8mb/target.cfg
deleted file mode 100644
index 8688df3f..00000000
--- a/config/coreboot/x201_8mb/target.cfg
+++ /dev/null
@@ -1,7 +0,0 @@
-tree="default"
-xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
-payload_seabios="y"
-payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/ifd/x201/gbe b/config/ifd/x201/gbe
deleted file mode 100644
index 1ec7219308716fc2c9bac032c6f8517cc2ac2aa1..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 8192
zcmZ2gyF>q1Ed$5@{|6cV0|C>5|NjpQ1S_r*e<i>G1WfE8l69#D1A_#R!IPrp!0pT-
z%<xKJ?XFh>uYn{4GBiwRVDJN}MF#)>GcYnZ7z?vIfXqe(42=K(zdeYo8o@@WRPHbU
zT5QOm0;I)&v?`F60n$A{njJ{@Lg_vztq!Caf#Rl6+5}1)18F9pxI=<G1Iq<L26jdv
zpmp+KKO<}#d92Lf7G_37z>l(UgaETGro<i|OtDds(GVat1V&z|GwS2f5Eu=C(GVC7
zfzc2c4S~@R7!84e3V~Il{r`aq`axmuX#bzM-r8vYpSW-uRYiIT42pta)Dfd0Fd71*
VAut*OqaiRF0;3@?8UiCC1OQy}gZ2Ob

diff --git a/config/ifd/x201/ifd b/config/ifd/x201/ifd
deleted file mode 100644
index cac4e5afb1aaedae4e0362896e6615a34e0cf369..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 4096
zcmezW9~DF`{lL$}z{1SNBp{%`z`!8GFo6?DfdQ&Y2oEG7!tkG+nL(I=k%5WfKR*Kl
zvN{kCge4d`IFQ8$3%e=Yzys)HIAD5s0?vjrco`U67+4vmGce4AivbxC%&2}HEPfhw
z$7l$QhQMeDjE2By2#kinXb6mkz-S1JhQMeDjD!$4q#(|~s=%u7-T+EFKxlan1_n_D
RQ3ZuU2p<#{Z@EVMZvYm?UhMz?

diff --git a/config/vendor/sources b/config/vendor/sources
index fec16d51..da30b05c 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -148,9 +148,3 @@
 	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
 	DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
 }
-
-{x201}{
-	DL_hash x201_factory.rom
-	DL_url rom
-	DL_url_bkup rom
-}
diff --git a/script/update/release b/script/update/release
index 7e0492f4..fa557477 100755
--- a/script/update/release
+++ b/script/update/release
@@ -85,10 +85,6 @@ fetch_trees()
 
 mkrom_images()
 {
-	x_ mkdir -p "vendorfiles/x201/"
-	dd if=/dev/zero of="vendorfiles/x201/me.bin" \
-	    bs=68k count=1 || err "mkvdir: can't make fake x201 me.bin"
-
 	./build roms all || err "${_xm}: roms-all"
 	./build serprog rp2040 || err "${_xm}: rp2040"
 	./build serprog stm32 || err "${_xm}: stm32"
diff --git a/script/vendor/download b/script/vendor/download
index 592c14bc..42cb16ab 100755
--- a/script/vendor/download
+++ b/script/vendor/download
@@ -21,8 +21,7 @@ uefiextract="${PWD}/src/uefitool/uefiextract"
 eval "$(setvars "" _b _dl EC_url EC_url_bkup EC_hash DL_hash DL_url DL_url_bkup \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
     E6400_VGA_romname SCH5545EC_DL_url SCH5545EC_DL_url_bkup SCH5545EC_DL_hash \
-    is_rom tree mecleaner kbc1126_ec_dump MRC_refcode_cbtree cbfstoolref \
-    MRC_refcode_gbe)"
+    tree mecleaner kbc1126_ec_dump MRC_refcode_cbtree cbfstoolref MRC_refcode_gbe)"
 
 main()
 {
@@ -115,16 +114,12 @@ fetch()
 	[ "${5#/}" = "$5" ] || err "fetch: absolute path not allowed: '$5'"
 	_dest="${5##*../}"
 	_dl="${vendir}/cache/${dlsum}"
-	eval "$(setvars "n" dl_fail is_rom)"
+	dl_fail="n"
 
 	x_ mkdir -p "${_dl%/*}"
 
-	if [ "${dl}" = "rom" ] || [ "${dl_bkup}" = "rom" ]; then
-		is_rom="y"
-	else
-		dl_fail="y"
-		vendor_checksum "${dlsum}" "${_dl}" || dl_fail="n"
-	fi
+	dl_fail="y"
+	vendor_checksum "${dlsum}" "${_dl}" || dl_fail="n"
 	for url in "${dl}" "${dl_bkup}"; do
 		[ "${dl_fail}" = "n" ] && break
 		[ -z "${url}" ] && continue
@@ -159,14 +154,9 @@ mkdirs()
 	fi
 	mkdir -p "${1%/*}" || err "mkdirs: !mkdir -p ${1%/*}"
 	remkdir "${appdir}"
-	if [ "${is_rom}" = "y" ]; then
-		cp "${_dl}" "${appdir}" || \
-		    err "mkdirs copyrom ${_dl}: can't copy to appdir"
-	else
-		extract_archive "${_dl}" "${appdir}" || \
-		    [ "${2}" = "extract_e6400vga" ] || \
-		    err "mkdirs ${1} ${2}: !extract"
-	fi
+	extract_archive "${_dl}" "${appdir}" || \
+	    [ "${2}" = "extract_e6400vga" ] || \
+	    err "mkdirs ${1} ${2}: !extract"
 }
 
 extract_intel_me()

From 59096d8d7ca8c51f57e36302899e9aa84629e02d Mon Sep 17 00:00:00 2001
From: William Goodspeed <goodspeed@anche.no>
Date: Sun, 14 Jan 2024 14:12:12 +0800
Subject: [PATCH 0174/1549] config/dependencies/trisquel: replaced package from
 ttf-unifont to fonts-unifont

ttf-unifont no longer exists on trisquel aramo.
---
Package: fonts-unifont
Breaks: ttf-unifont (<< 1:13.0.02-1)
Replaces: ttf-unifont (<< 1:13.0.02-1)
---
Signed-off-by: William Goodspeed <goodspeed@anche.no>
---
 config/dependencies/trisquel | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)
 mode change 120000 => 100755 config/dependencies/trisquel

diff --git a/config/dependencies/trisquel b/config/dependencies/trisquel
deleted file mode 120000
index 16c11fa4..00000000
--- a/config/dependencies/trisquel
+++ /dev/null
@@ -1 +0,0 @@
-ubuntu2004
\ No newline at end of file
diff --git a/config/dependencies/trisquel b/config/dependencies/trisquel
new file mode 100755
index 00000000..93e7dd5a
--- /dev/null
+++ b/config/dependencies/trisquel
@@ -0,0 +1,14 @@
+pkg_add="apt-get -y install"
+pkglist=" \
+autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \
+bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \
+flex gawk gcc-arm-linux-gnueabi gcc-arm-none-eabi gdb gettext git gnat help2man \
+innoextract libdevmapper-dev libfdt-dev libfont-freetype-perl libfreetype6-dev \
+libftdi-dev libfuse-dev libgnutls28-dev liblz4-tool liblzma-dev libncurses5-dev \
+libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev \
+libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \
+libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \
+pciutils perl pkg-config python3 python3-distutils python3-pkg-resources \
+python3-pycryptodome python3-pyelftools python3-setuptools python-is-python3 \
+sharutils swig fonts-unifont unar unifont unzip uuid-dev wget zlib1g-dev \
+"

From d44c9551c5e7456c2caa4a2815d33ff978dc55ef Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jan 2024 19:32:54 +0000
Subject: [PATCH 0175/1549] build/roms: regression fix: uninitialised variable

the "kmapdir" variable was removed in an earlier audit,
but was overlooked for -k because that option was untested.

rather than initialise the variable, re-use grubcfgsdir.
this fix enables e.g. "-k usdvorak" to work again.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/build/roms b/script/build/roms
index a369d0e8..8278a9ab 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -152,7 +152,7 @@ build_grub_payload()
 		[ -f "elf/grub/keymap_$keymap.cfg" ] || printf "keymap %s\n" \
 		    "$keymap" > "elf/grub/keymap_$keymap.cfg" || err "!key"; :
 	done
-	[ -n "${_keyboard}" ] && keymaps="${kmapdir}/${_keyboard}.gkb"
+	[ -n "$_keyboard" ] && keymaps="${grubcfgsdir}/keymap/${_keyboard}.gkb"
 	[ -f "$grubelf" ] && return 0
 	[ -f "src/grub/grub-mkstandalone" ] || x_ ./update trees -b grub
 

From df007d22ec801679b5e8f43ee861b78515518ce2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jan 2024 23:22:22 +0000
Subject: [PATCH 0176/1549] build/roms: err if -k layout doesn't exist

if the user defines a layout that doesn't exist, throw
an error in lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/script/build/roms b/script/build/roms
index 8278a9ab..d1d4e71a 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -152,6 +152,8 @@ build_grub_payload()
 		[ -f "elf/grub/keymap_$keymap.cfg" ] || printf "keymap %s\n" \
 		    "$keymap" > "elf/grub/keymap_$keymap.cfg" || err "!key"; :
 	done
+	[ -z "$_keyboard" ] || [ -f "$grubcfgsdir/keymap/$_keyboard.gkb" ] && \
+		err "build_grub_payload: $_keyboard layout not defined"
 	[ -n "$_keyboard" ] && keymaps="${grubcfgsdir}/keymap/${_keyboard}.gkb"
 	[ -f "$grubelf" ] && return 0
 	[ -f "src/grub/grub-mkstandalone" ] || x_ ./update trees -b grub

From 37817e6bcb7c7272d7c70c3afe89a5b3b2604824 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jan 2024 23:54:53 +0000
Subject: [PATCH 0177/1549] GRUB: insert only 1 keymap per board, in cbfs

There is no need to add multiple keymap files, because
GRUB can load keymaps from CBFS. The current build logic
is designed to avoid building multiple GRUB binaries,
which are expensive computationally because each one
would then have to be compressed for each board.

This patch provides the best of both worlds: less space
used in flash like in the old lbmk design (1 keymap per
board), but retaining the current build speeds and therefore
not re-introducing the slowness of lbmk's previous GRUB
build logic.

The grub.cfg file has been modified, accordingly. It now
only loads a keymap.gkb file from CBFS, by default. It does
this, only if that file exists; if not, GRUB already defaults
to US Qwerty layout anyway.

ALSO: compress all keymap gkb files with xz -6

GRUB automatically decompresses files when accessed.
This results in about 2KB of flash space saved in CBFS.

Here is real-world data, showing the increased flash space:

< fallback/payload               0x3eb80    simple elf     548821 none
< keymap.cfg                     0xc4bc0    raw                16 none
< (empty)                        0xc4c00    null         11633316 none
---
> fallback/payload               0x3eb80    simple elf     546787 none
> keymap.gkb                     0xc43c0    raw               344 none
> (empty)                        0xc4540    null         11635044 none

This was taken by diffing the cbfstool "print" output,
both before and after. The *after* result is with this change.
11633316. In this example, 1728 bytes have been saved. Therefore,
with compression taken into account, this patch saves about 1.7KB
of space in CBFS.

This change means that lbmk can now scale to support hundreds
of keymaps, without increasing the amount of flash space used,
in each given image. Since the keymap files are compressed in
lbmk.git, in advance, we spend no additional time on compression
at build time. The resulting change in build speed in negligible.

Adding your own keymap.gkb file was already possible, for changing
the keymap in libreboot images, if you didn't want to change the
memdisk (and thus re-compile grub.elf). Now, this is the default
behaviour, and the only way to do it. It's much more efficient.

The original keymap files can be restored, by running unxz.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg     |   4 ----
 config/grub/keymap/colemak.gkb  | Bin 2572 -> 488 bytes
 config/grub/keymap/deqwertz.gkb | Bin 2572 -> 508 bytes
 config/grub/keymap/esqwerty.gkb | Bin 2572 -> 492 bytes
 config/grub/keymap/frazerty.gkb | Bin 2572 -> 496 bytes
 config/grub/keymap/frdvbepo.gkb | Bin 2572 -> 516 bytes
 config/grub/keymap/itqwerty.gkb | Bin 2572 -> 488 bytes
 config/grub/keymap/svenska.gkb  | Bin 2572 -> 488 bytes
 config/grub/keymap/trqwerty.gkb | Bin 2572 -> 476 bytes
 config/grub/keymap/ukdvorak.gkb | Bin 2572 -> 372 bytes
 config/grub/keymap/ukqwerty.gkb | Bin 2572 -> 488 bytes
 config/grub/keymap/usdvorak.gkb | Bin 2572 -> 364 bytes
 config/grub/keymap/usqwerty.gkb | Bin 2572 -> 344 bytes
 script/build/roms               |  39 +++++---------------------------
 14 files changed, 6 insertions(+), 37 deletions(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index efc10aa4..17576b5f 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -38,10 +38,6 @@ fi
 
 if [ -f (cbfsdisk)/keymap.gkb ]; then
 	keymap (cbfsdisk)/keymap.gkb
-elif [ -f (cbfsdisk)/keymap.cfg ]; then
-	source (cbfsdisk)/keymap.cfg
-else
-	keymap usqwerty
 fi
 
 function try_user_config {
diff --git a/config/grub/keymap/colemak.gkb b/config/grub/keymap/colemak.gkb
index 6756bd73386195bce8cf4a7c705de99757965861..d357816b50acc08714eef9d7ab2eaa9838124bb2 100644
GIT binary patch
literal 488
zcmV<E0T=%LH+ooF000E$*0e?f03iVu0001VFXf})3JU?HT>vALhTy*%@4+yQ934V)
zc7K>%b^cHRs4aXPs$|T%Pmm4_Bb&wf94+vUie)hTQm1?fvGe|zQakgE*sdHL5Den^
zhHlOF6Bmfe?X@IojBYhKdqLC9e&w8RzqvXZ{70f1i`g>~7xX*aK#IE1mdFe4Clllk
zBU_IrWl+(mu3S|pgXy7v_p@n~(qq$SgPQJvn!egyh0i|X)|MG3CBSRtA@j9GwP4fA
z*#KBhl`#~hua&oh&VQRx5>Gc1q!NfGr#13?T@euz(fg`hYhqE0hHf>oUgc#iVMKI-
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z!vP!vfjN*YmVuTSj$MOq>`J)t8YW9&DCwF8zJrT>L2qVmFaMyfpP!N~5goE$qX7Ep
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zbl%4!7aVyROt-LuDWd%<W}d@Bof+SFwIlNfRRt3?(w;)z(`wz@7;OLm00011z7zfE
eYf_Q`0l@=|6aWA-Vd3Jj#Ao{g000001X)^zSK+|`

literal 2572
zcmc)LM~f6e7zW^J=mzzq=s{6o%{k}nu3-(UtGni$bIuumiUBX`LG+{^L`--P6fq#8
zhzSpZA_hdn=W}LYQ4hNp=YwaerlzaAdg`5?%9_~~Rps-mo8<nk<%U+UlAWw!7pqvu
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zT*qf0^ncRQ`&Rrbf6a|Qa?BYn6BU{J#OFd^^Lsz9L`TVADu1c`rSg}`Un+m8{H5}j
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ztm8fp3jN}`qK%TjO#U+Y%j7SUzfArz`OD-llfO*<GWpBoFU!x$zcwU)|N8%J$n!7m
Lt<?2DpMSpqN3yOc

diff --git a/config/grub/keymap/deqwertz.gkb b/config/grub/keymap/deqwertz.gkb
index a0c8e5ae7c4f1c525cfd1a4b0b5bdcea697e3620..4928d026c7e7690fef70958720c3537616ac5000 100644
GIT binary patch
literal 508
zcmV<Y0R#U1H+ooF000E$*0e?f03iVu0001VFXf})3JU?bT>vALhTy*%@4+yQ934V)
zc7K>%b^S+Fh7N3Oib&ic#h*zSvYKD(_7_y*xhff%!#`GO00FR@2i;Mht?RnF%o^5~
zz{^L6lcT-V0^JM><(v6gkvzg`Tt!Rs_p=U)FpV#B#TwSUvx=RXU#pzTwfOMydgA7S
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zw8a^t^r(*aow3lW#o&jniY;httBocV*5$$0dd^r7Ne;aP#8FEbQWvF^9LZk~en~TK
z^dMVxSc+2FzQ{F{XG4(*q<OI2TeoL$W&m73!e0(Mnul_0DsFUXVjm$1GyIPzEW=gg
zo0@Cwn==fvC~M=8V31!t&et!X<@#e?y@xe6J~|m(zQqmFzNkZXITPf4Ev&)(P6-4Y
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literal 2572
zcmc)L$8Qv87zf}PF(W~4h#V-1wI;#TB(wlFHegc>*p9L3HI#r!g+S=_PoUh9fCNNQ
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Dtfi(7

diff --git a/config/grub/keymap/esqwerty.gkb b/config/grub/keymap/esqwerty.gkb
index 18bb537fc7f88847e2ca6e68849458d876e7d92a..6ce76330ac495792e36e48cac4c3fc83b6cb4362 100644
GIT binary patch
literal 492
zcmV<I0TcfHH+ooF000E$*0e?f03iVu0001VFXf})3JU?NT>vALhTy*%@4+yQ934V)
zc7K>%b^S+Fh7N3Oib&ic#h*zSvYKD(_7_y*xhff%!#`GO00FG?TU#L!t?RnF%o^5~
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literal 2572
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diff --git a/config/grub/keymap/frazerty.gkb b/config/grub/keymap/frazerty.gkb
index c048cec53d614ba498fd861eec2612c4d561de29..f8455154577c956d970b245aa378efd8d8cccf30 100644
GIT binary patch
literal 496
zcmV<M0T2HDH+ooF000E$*0e?f03iVu0001VFXf})3JU?QT>vALhTy*%@4+yQ934W&
z1izSFZDvZLqiUI)1v0S2Z`}CTP*YL(MpHZhtkwf|gQCwd&bfJ22$&@57Jo4~)z#P*
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literal 2572
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diff --git a/config/grub/keymap/frdvbepo.gkb b/config/grub/keymap/frdvbepo.gkb
index c90b37cfc392a3fe994a261283ad773a6ffb81b7..2070260730280097f306953e24a8ccefea0e0783 100644
GIT binary patch
literal 516
zcmV+f0{i{_H+ooF000E$*0e?f03iVu0001VFXf})3JU?lT>vALhTy*%@4+yQ934V)
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literal 2572
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Gzv@5x&#rO+

diff --git a/config/grub/keymap/itqwerty.gkb b/config/grub/keymap/itqwerty.gkb
index f247cd1737a26b9ac72f29026b39af8d807d2284..db10a54cc64d717cd47e36b9fcb5e357ca1ca011 100644
GIT binary patch
literal 488
zcmV<E0T=%LH+ooF000E$*0e?f03iVu0001VFXf})3JU?HT>vALhTy*%@4+yQ934V)
zc7K>%b^S+Fh7N3Oib&ic#h*zSvYKD(_7_y*xhff%!#`GO00FG?TU#L!t?RnF%o^5~
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ez>o<50l@=|6aWA-Vd3Jj#Ao{g000001X)@cPw7Db

literal 2572
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zk~rXki}?J!sWj0;Ie34`XXcrCo@Zv-`Ofp!G|aEAt6E&&KKZj&IklQKtYsbR*}z6N
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diff --git a/config/grub/keymap/svenska.gkb b/config/grub/keymap/svenska.gkb
index ec627db257d9822c617c75e12cabe1e30144f571..75ca762d2c99825c44cb743b1ba322dc6b0da7a5 100644
GIT binary patch
literal 488
zcmV<E0T=%LH+ooF000E$*0e?f03iVu0001VFXf})3JU?JT>vALhTy*%@4+yQ934V)
zc7K>%b^S+Fh7N3Oib&ic#h*zSvYKD(_7_y*xhff%!#`GO00FG?TU#L!t?RnF%o^5~
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literal 2572
zcmc)L$&*c290%}s%e__D*-<T3uQfV4h$)EHb4#O}o=hD&hQyG>EQZ8T`4fVF00~Mc
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diff --git a/config/grub/keymap/trqwerty.gkb b/config/grub/keymap/trqwerty.gkb
index 090454e904dbacd381682c2adce74a89b8003d84..452100d52b0106f613cad66686c0583eab7615cf 100644
GIT binary patch
literal 476
zcmV<20VDqXH+ooF000E$*0e?f03iVu0001VFXf})3JU?8T>vALhTy*%@4+yQ934V)
zc7K>%b^S+Fh7N3Oib&g}Zip6b)v;e%==%bfo{WLaV_8I=4Moq=#N1d37d11oPVTxO
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literal 2572
zcmc)LM~_Wm7zglk;+(|z1Vp=fXY@A8j55kFjNV7@z1R2%z5+s`M3f*IEwQn)5*8#9
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zzk1_X|DMxX{)+Xl#e6<5i1qJ^&u-{N{$3k*Ed5;nB6F9Be4OVtcX-HZxh&7$E!%EV
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diff --git a/config/grub/keymap/ukdvorak.gkb b/config/grub/keymap/ukdvorak.gkb
index c793cae8babc2585bb92e05dfe2431b2fe0303a6..76b9e380ec3dabf72cecbdf5f72bb9a54928f2d6 100644
GIT binary patch
literal 372
zcmV-)0gL|qH+ooF000E$*0e?f03iVu0001VFXf})3JU=-T>vALhTy*%@4+yQ934V)
zc7s6J6c(Pl^m{_)<NNn*HxJ0aY33=<C^QWIl5Wh>g)&?UaSti3;7|lGF*48+Y2L_m
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Sh(oBc#Ao{g000001X)_4`ko{J

literal 2572
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diff --git a/config/grub/keymap/ukqwerty.gkb b/config/grub/keymap/ukqwerty.gkb
index 8e5ff299702b7ca0d4e2cc8965b8295a52ec6b63..5f513d85fd1f8e334ebd47ec0ce27e491dadf631 100644
GIT binary patch
literal 488
zcmV<E0T=%LH+ooF000E$*0e?f03iVu0001VFXf})3JU?HT>vALhTy*%@4+yQ934V)
zc7K>%b^S+Fh7N3Oib&ic#h*zSvYKD(_7_y*xhff%!#`GO00FG?TU#L!t?RnF%o^5~
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literal 2572
zcmd7T$!|?z7zf~U;+zCKJA&la(3<C2TWt+RODQ##n&)|*#h+mK3lPK*F$6L1tnFB_
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diff --git a/config/grub/keymap/usdvorak.gkb b/config/grub/keymap/usdvorak.gkb
index 41301efd4ff08e29a3b4121d2efd6ac0eedc51a7..ef88232c4ea0562f36290c137f88ffdc56119f7d 100644
GIT binary patch
literal 364
zcmV-y0h9jyH+ooF000E$*0e?f03iVu0001VFXf})3JU=&T>vALhTy*%@4+yQ934V)
zc7s6J6c(Pl^m{_)<NNn*HxJ0aY33=<C^QWIl5Wh>g)&?UaSti3;7|lGF*48+Y2L_m
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zeHf~likWX{Wx0*dR;yhU_#9~1RgDV9e7*ESG1MWJG@`{*26gme={^X_5qrsJ2Xr5t
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K000001X)^9>7n-k

literal 2572
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diff --git a/config/grub/keymap/usqwerty.gkb b/config/grub/keymap/usqwerty.gkb
index 5fb78d33aaee1870060f642837c0a6c1b0b85297..0ea130f2d7f4814f91fcdbc5a0d235bbbbcef9e2 100644
GIT binary patch
literal 344
zcmV-e0jK``H+ooF000E$*0e?f03iVu0001VFXf})3JU=kT>vALhTy*%@4+yQ934V)
zc7K>%b^S+Fh7N3Oib&ic#h*zSvYKD(_7_y*xhff%!#`GO00FG?TU#L!t?RnF%o^5~
zz{^L6lcTy~xoJjjxKT#}6iNxuhqA5}wBqd5wn;W}yYqZTYec>y2BusqHf+D#0t96&
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qZAI73asUA5TNyg&7jHiR0ki^)6aWD6)NX{a#Ao{g000001X)@eDw@&&

literal 2572
zcmdtjS5FjC7=U3;a!#WD1#j%VH&p5_=z@R?iwM{$_TIbk*Z4bqKFJcIUMyZX319MT
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zM?P_!6P)A}r#VA6XF10)VvSqb#Adc}m_Dv^lb9Ryu$Ma=;s{5H>FN63)k`1!3@}KI
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z+K*UARa0}}IztR|fr~U4VU$aZG0p^+X)?(aEvC7`3|E<Dj(M)Jok4c8i{0E}4{`tY
zv7fkqzxQ|BZ*gxw^Ocw{oM#8$i2K;j05SSY`b+vt`b+vt`b+vt`b+vt`b+vt`b#TE
zt$eooi*N1zV!PA+I(gROeDS=*nya2zM^&@n!iy}i%m#Y@W&LISW&LISW&LISW&LIS
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diff --git a/script/build/roms b/script/build/roms
index d1d4e71a..9e7c69ee 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -147,12 +147,8 @@ build_grub_payload()
 		[ -f "${keymapfile}" ] || continue
 
 		keymaps="${keymaps} ${keymapfile}"
-		keymap="${keymapfile##*/}"
-		keymap="${keymap%.gkb}"
-		[ -f "elf/grub/keymap_$keymap.cfg" ] || printf "keymap %s\n" \
-		    "$keymap" > "elf/grub/keymap_$keymap.cfg" || err "!key"; :
 	done
-	[ -z "$_keyboard" ] || [ -f "$grubcfgsdir/keymap/$_keyboard.gkb" ] && \
+	[ -z "$_keyboard" ] || [ -f "$grubcfgsdir/keymap/$_keyboard.gkb" ] || \
 		err "build_grub_payload: $_keyboard layout not defined"
 	[ -n "$_keyboard" ] && keymaps="${grubcfgsdir}/keymap/${_keyboard}.gkb"
 	[ -f "$grubelf" ] && return 0
@@ -166,18 +162,6 @@ build_grub_payload()
 	    --fonts= --themes= --locales=  \
 	    --modules="${grub_modules}" \
 	    --install-modules="${grub_install_modules}" \
-	    "${layoutdir}/colemak.gkb=${grubcfgsdir}/keymap/colemak.gkb" \
-	    "${layoutdir}/deqwertz.gkb=${grubcfgsdir}/keymap/deqwertz.gkb" \
-	    "${layoutdir}/esqwerty.gkb=${grubcfgsdir}/keymap/esqwerty.gkb" \
-	    "${layoutdir}/frazerty.gkb=${grubcfgsdir}/keymap/frazerty.gkb" \
-	    "${layoutdir}/frdvbepo.gkb=${grubcfgsdir}/keymap/frdvbepo.gkb" \
-	    "${layoutdir}/itqwerty.gkb=${grubcfgsdir}/keymap/itqwerty.gkb" \
-	    "${layoutdir}/svenska.gkb=${grubcfgsdir}/keymap/svenska.gkb" \
-	    "${layoutdir}/trqwerty.gkb=${grubcfgsdir}/keymap/trqwerty.gkb" \
-	    "${layoutdir}/ukdvorak.gkb=${grubcfgsdir}/keymap/ukdvorak.gkb" \
-	    "${layoutdir}/ukqwerty.gkb=${grubcfgsdir}/keymap/ukqwerty.gkb" \
-	    "${layoutdir}/usdvorak.gkb=${grubcfgsdir}/keymap/usdvorak.gkb" \
-	    "${layoutdir}/usqwerty.gkb=${grubcfgsdir}/keymap/usqwerty.gkb" \
 	    "/boot/grub/grub.cfg=${grubcfgsdir}/config/grub_memdisk.cfg" \
 	    "/boot/grub/grub_default.cfg=${grubcfgsdir}/config/grub.cfg" || \
 	    err "could not generate grub.elf"
@@ -310,8 +294,11 @@ build_grub_roms()
 		[ -f "${keymapfile}" ] || continue
 		keymap="${keymapfile##*/}"
 		keymap="${keymap%.gkb}"
-		tmpgrubrom=$(mkGrubRom "${keymap}" "${tmprom}") || \
-		    err "build_grub_roms ${board}: could not create tmprom"
+
+		tmpgrubrom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
+		x_ cp "${tmprom}" "${tmpgrubrom}"
+		x_ "$cbfstool" "$tmpgrubrom" add -f "$keymapfile" \
+		    -n keymap.gkb -t raw
 
 		newrom="${romdir}/${payload1}_${board}_${initmode}_"
 		newrom="${newrom}${displaymode}_${keymap}.rom"
@@ -325,20 +312,6 @@ build_grub_roms()
 	done
 }
 
-# make a rom in /tmp/ and then print the path of that ROM
-mkGrubRom() {
-	_keymap="${1}"
-	_cbrom="${2}"
-
-	keymapcfg="elf/grub/keymap_${_keymap}.cfg"
-
-	tmprom=$(mktemp -t coreboot_rom.XXXXXXXXXX)
-	x_ cp "${_cbrom}" "${tmprom}"
-	x_ "$cbfstool" "$tmprom" add -f "$keymapcfg" -n keymap.cfg -t raw
-
-	printf "%s\n" "${tmprom}"
-}
-
 # make a rom in /tmp/ and then print the path of that ROM
 mkSeabiosRom() {
 	_cbrom="${1}" # rom to insert seabios in. will not be touched

From 33e25a3355318e15e24401ac986df62db1e58336 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 20 Jan 2024 18:54:53 +0000
Subject: [PATCH 0178/1549] dependencies/arch: add pandoc to dependencies

pandoc is required by the grub build system, when
running autoconf at the start of the build process

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/arch     | 4 ++--
 config/dependencies/parabola | 6 +++---
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/config/dependencies/arch b/config/dependencies/arch
index 5efa472c..c0635d41 100644
--- a/config/dependencies/arch
+++ b/config/dependencies/arch
@@ -4,8 +4,8 @@ acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
 autogen base-devel bison cmake curl device-mapper doxygen \
 dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \
 help2man innoextract libftdi libpciaccess libusb nasm ncurses openssl p7zip \
-parted pciutils perl perl-libwww python python-setuptools rsync sharutils \
-subversion swig texinfo ttf-dejavu unarchiver unzip wget xz zlib \
+pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
+sharutils subversion swig texinfo ttf-dejavu unarchiver unzip wget xz zlib \
 "
 
 aur_notice="bdf-unifont unifont"
diff --git a/config/dependencies/parabola b/config/dependencies/parabola
index ab84495a..8a1550de 100644
--- a/config/dependencies/parabola
+++ b/config/dependencies/parabola
@@ -4,7 +4,7 @@ acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
 autogen base-devel bdf-unifont bison cmake curl device-mapper doxygen \
 dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \
 help2man innoextract libftdi libpciaccess libusb nasm ncurses openssl p7zip \
-parted pciutils perl perl-libwww python python-setuptools rsync sharutils \
-subversion swig texinfo ttf-dejavu unarchiver unifont-utils unzip wget xz \
-zlib \
+pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
+sharutils subversion swig texinfo ttf-dejavu unarchiver unifont-utils unzip \
+wget xz zlib \
 "

From 1d971fcdc94c2496df3b1cc0026561b731adc6e6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Jan 2024 00:18:35 +0000
Subject: [PATCH 0179/1549] grub: use --disable-werror on ./configure

work around build issues on very bleeding edge distros

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/target.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/grub/target.cfg b/config/grub/target.cfg
index 9b34245e..af23ce6c 100644
--- a/config/grub/target.cfg
+++ b/config/grub/target.cfg
@@ -1,3 +1,3 @@
-bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
+bootstrapargs="--gnulib-srcdir=gnulib/ --no-git --disable-werror"
 autoconfargs="--with-platform=coreboot"
 makeargs="FS_PAYLOAD_MODULES=\"\""

From b71d4fd0165d7db9ad595fa8a806add68ba514d5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Jan 2024 00:20:51 +0000
Subject: [PATCH 0180/1549] coreboot/fam15h: disable -Werror on binutils 2.32

work around newer build issues, on very bleeding edge distros

(disable treating warnings as errors)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...n-t-treat-binutil-warnings-as-errors.patch | 35 +++++++++++++++++++
 ...n-t-treat-binutil-warnings-as-errors.patch | 35 +++++++++++++++++++
 2 files changed, 70 insertions(+)
 create mode 100644 config/coreboot/fam15h_rdimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch
 create mode 100644 config/coreboot/fam15h_udimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch

diff --git a/config/coreboot/fam15h_rdimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch b/config/coreboot/fam15h_rdimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch
new file mode 100644
index 00000000..c767968b
--- /dev/null
+++ b/config/coreboot/fam15h_rdimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch
@@ -0,0 +1,35 @@
+From 5ec265deac0da077c9b1e23fc52abe1b5f0696b5 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sat, 13 Jan 2024 14:57:46 +0000
+Subject: [PATCH 1/1] buildgcc: don't treat binutil warnings as errors
+
+binutils 2.32 has too many build warnings on modern toolchains,
+and newer gcc versions are much more pedantic about warnings,
+treating them as errors by default.
+
+instead of patching binutils like before, just let the warnings
+persist. the warnings are benign. a user on gnuboot irc had serious
+issues building binutils 2.32 specifically, on current gentoo as
+of 13 January 2024. this patch mitigates those warning messages.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/crossgcc/buildgcc | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index 505cd7484c..6f1953e68d 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -719,7 +719,7 @@ build_BINUTILS() {
+ 		--disable-werror --disable-nls --enable-lto --enable-gold \
+ 		--enable-interwork --enable-multilib \
+ 		--enable-plugins --enable-multilibs \
+-		CFLAGS="$HOSTCFLAGS" \
++		CFLAGS="$HOSTCFLAGS -Wno-error -w" \
+ 		CXXFLAGS="$HOSTCFLAGS" \
+ 		|| touch .failed
+ 	# shellcheck disable=SC2086
+-- 
+2.39.2
+
diff --git a/config/coreboot/fam15h_udimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch b/config/coreboot/fam15h_udimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch
new file mode 100644
index 00000000..c767968b
--- /dev/null
+++ b/config/coreboot/fam15h_udimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch
@@ -0,0 +1,35 @@
+From 5ec265deac0da077c9b1e23fc52abe1b5f0696b5 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sat, 13 Jan 2024 14:57:46 +0000
+Subject: [PATCH 1/1] buildgcc: don't treat binutil warnings as errors
+
+binutils 2.32 has too many build warnings on modern toolchains,
+and newer gcc versions are much more pedantic about warnings,
+treating them as errors by default.
+
+instead of patching binutils like before, just let the warnings
+persist. the warnings are benign. a user on gnuboot irc had serious
+issues building binutils 2.32 specifically, on current gentoo as
+of 13 January 2024. this patch mitigates those warning messages.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/crossgcc/buildgcc | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index 505cd7484c..6f1953e68d 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -719,7 +719,7 @@ build_BINUTILS() {
+ 		--disable-werror --disable-nls --enable-lto --enable-gold \
+ 		--enable-interwork --enable-multilib \
+ 		--enable-plugins --enable-multilibs \
+-		CFLAGS="$HOSTCFLAGS" \
++		CFLAGS="$HOSTCFLAGS -Wno-error -w" \
+ 		CXXFLAGS="$HOSTCFLAGS" \
+ 		|| touch .failed
+ 	# shellcheck disable=SC2086
+-- 
+2.39.2
+

From e329b365db03cf77a5f0e3650aebb17e0c68e944 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Jan 2024 05:43:11 +0000
Subject: [PATCH 0181/1549] grub/target.cfg: move --disable-werror

i meant to push it in configure args, not bootstrap

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/target.cfg | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/grub/target.cfg b/config/grub/target.cfg
index af23ce6c..2aaeb559 100644
--- a/config/grub/target.cfg
+++ b/config/grub/target.cfg
@@ -1,3 +1,3 @@
-bootstrapargs="--gnulib-srcdir=gnulib/ --no-git --disable-werror"
-autoconfargs="--with-platform=coreboot"
+bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
+autoconfargs="--with-platform=coreboot --disable-werror"
 makeargs="FS_PAYLOAD_MODULES=\"\""

From 9877eb09684332e4cc2843f6f47af0276143b8e1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Jan 2024 05:52:32 +0000
Subject: [PATCH 0182/1549] coreboot/*/target.cfg: don't define xarch

it's defined per board

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/coreboot413/target.cfg  | 1 -
 config/coreboot/default/target.cfg      | 1 -
 config/coreboot/dell/target.cfg         | 1 -
 config/coreboot/fam15h_rdimm/target.cfg | 1 -
 config/coreboot/fam15h_udimm/target.cfg | 1 -
 5 files changed, 5 deletions(-)

diff --git a/config/coreboot/coreboot413/target.cfg b/config/coreboot/coreboot413/target.cfg
index 2d366a9e..5c2823e3 100644
--- a/config/coreboot/coreboot413/target.cfg
+++ b/config/coreboot/coreboot413/target.cfg
@@ -1,3 +1,2 @@
 tree="coreboot413"
 rev="5c186c6777c9438ff4681929c9c25c98dee28bef"
-xarch="i386-elf"
diff --git a/config/coreboot/default/target.cfg b/config/coreboot/default/target.cfg
index 231397bd..bf29716e 100644
--- a/config/coreboot/default/target.cfg
+++ b/config/coreboot/default/target.cfg
@@ -1,3 +1,2 @@
 tree="default"
 rev="d862695f5f432b5c78dada5f16c293a4c3f9fce6"
-xarch="i386-elf"
diff --git a/config/coreboot/dell/target.cfg b/config/coreboot/dell/target.cfg
index d8ec61d6..f1918b99 100644
--- a/config/coreboot/dell/target.cfg
+++ b/config/coreboot/dell/target.cfg
@@ -1,3 +1,2 @@
 tree="dell"
 rev="d862695f5f432b5c78dada5f16c293a4c3f9fce6"
-xarch="i386-elf"
diff --git a/config/coreboot/fam15h_rdimm/target.cfg b/config/coreboot/fam15h_rdimm/target.cfg
index 7d60e76a..9b99ec9e 100644
--- a/config/coreboot/fam15h_rdimm/target.cfg
+++ b/config/coreboot/fam15h_rdimm/target.cfg
@@ -1,6 +1,5 @@
 tree="fam15h_rdimm"
 rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
-xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="n"
diff --git a/config/coreboot/fam15h_udimm/target.cfg b/config/coreboot/fam15h_udimm/target.cfg
index 6b2d493d..b9950814 100644
--- a/config/coreboot/fam15h_udimm/target.cfg
+++ b/config/coreboot/fam15h_udimm/target.cfg
@@ -1,6 +1,5 @@
 tree="fam15h_udimm"
 rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
-xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="n"

From c6d243af93794f868b8e518c92edc3fd5e0a69ba Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Jan 2024 05:55:54 +0000
Subject: [PATCH 0183/1549] u-boot: don't define xarch in default

it's only needed for each board

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/u-boot/default/target.cfg | 1 -
 1 file changed, 1 deletion(-)

diff --git a/config/u-boot/default/target.cfg b/config/u-boot/default/target.cfg
index fdd04865..cdbb5216 100644
--- a/config/u-boot/default/target.cfg
+++ b/config/u-boot/default/target.cfg
@@ -1,3 +1,2 @@
 tree="default"
 rev="4459ed60cb1e0562bc5b40405e2b4b9bbf766d57" # v2023.10
-xarch="aarch64-elf arm-eabi"

From 8a9c70f2f6d8035279b8fe183ea6ad92b79392b1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Jan 2024 05:58:37 +0000
Subject: [PATCH 0184/1549] allow multitree projects to define xgcc tree

let them specific it, rather than falling back
to coreboot/default (can also be used for coreboot boards)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/u-boot/gru_bob/target.cfg         | 1 +
 config/u-boot/gru_kevin/target.cfg       | 1 +
 config/u-boot/qemu_arm64_12mb/target.cfg | 1 +
 config/u-boot/qemu_x86_12mb/target.cfg   | 1 +
 script/update/trees                      | 3 ++-
 5 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/config/u-boot/gru_bob/target.cfg b/config/u-boot/gru_bob/target.cfg
index 1633e9df..f7d4d7d9 100644
--- a/config/u-boot/gru_bob/target.cfg
+++ b/config/u-boot/gru_bob/target.cfg
@@ -1,2 +1,3 @@
 tree="default"
+xtree="default"
 xarch="aarch64-elf arm-eabi"
diff --git a/config/u-boot/gru_kevin/target.cfg b/config/u-boot/gru_kevin/target.cfg
index 1633e9df..f7d4d7d9 100644
--- a/config/u-boot/gru_kevin/target.cfg
+++ b/config/u-boot/gru_kevin/target.cfg
@@ -1,2 +1,3 @@
 tree="default"
+xtree="default"
 xarch="aarch64-elf arm-eabi"
diff --git a/config/u-boot/qemu_arm64_12mb/target.cfg b/config/u-boot/qemu_arm64_12mb/target.cfg
index 1633e9df..f7d4d7d9 100644
--- a/config/u-boot/qemu_arm64_12mb/target.cfg
+++ b/config/u-boot/qemu_arm64_12mb/target.cfg
@@ -1,2 +1,3 @@
 tree="default"
+xtree="default"
 xarch="aarch64-elf arm-eabi"
diff --git a/config/u-boot/qemu_x86_12mb/target.cfg b/config/u-boot/qemu_x86_12mb/target.cfg
index 2c300b24..216c7bdc 100644
--- a/config/u-boot/qemu_x86_12mb/target.cfg
+++ b/config/u-boot/qemu_x86_12mb/target.cfg
@@ -1,2 +1,3 @@
 tree="default"
+xtree="default"
 xarch="i386-elf"
diff --git a/script/update/trees b/script/update/trees
index 68e4a9f3..fa812f54 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -12,7 +12,7 @@ set -u -e
 
 eval "$(setvars "" xarch cfgsdir codedir config config_name xlang mode \
     elfdir listfile project target target_dir targets tree _f target1 \
-    bootstrapargs autoconfargs cmakedir makeargs autogenargs)"
+    bootstrapargs autoconfargs cmakedir makeargs autogenargs xtree)"
 
 main()
 {
@@ -159,6 +159,7 @@ check_cross_compiler()
 	for _xarch in $xarch; do
 		cbdir="src/coreboot/${tree}"
 		[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
+		[ -n "$xtree" ] && cbdir="src/coreboot/$xtree"
 
 		x_ ./update trees -f coreboot ${cbdir#src/coreboot/}
 

From 8f3d3eada9afd9ecc19d180aa2899062435501b6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Jan 2024 06:26:23 +0000
Subject: [PATCH 0185/1549] re-use crossgcc builds on the coreboot trees

don't build crossgcc twice, especially if two coreboot
trees use the same revision!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/dell/target.cfg         |  1 +
 config/coreboot/fam15h_udimm/target.cfg |  1 +
 include/git.sh                          | 13 ++++++++++++-
 3 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/config/coreboot/dell/target.cfg b/config/coreboot/dell/target.cfg
index f1918b99..32ee7ff1 100644
--- a/config/coreboot/dell/target.cfg
+++ b/config/coreboot/dell/target.cfg
@@ -1,2 +1,3 @@
 tree="dell"
+xtree="default"
 rev="d862695f5f432b5c78dada5f16c293a4c3f9fce6"
diff --git a/config/coreboot/fam15h_udimm/target.cfg b/config/coreboot/fam15h_udimm/target.cfg
index b9950814..77c6799d 100644
--- a/config/coreboot/fam15h_udimm/target.cfg
+++ b/config/coreboot/fam15h_udimm/target.cfg
@@ -1,4 +1,5 @@
 tree="fam15h_udimm"
+xtree="fam15h_rdimm"
 rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
 payload_grub="n"
 payload_grub_withseabios="n"
diff --git a/include/git.sh b/include/git.sh
index d1e9389b..7840671f 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -4,7 +4,7 @@
 
 # This file is only used by update/project/trees
 
-eval "$(setvars "" _target rev _xm loc url bkup_url depend)"
+eval "$(setvars "" _target rev _xm loc url bkup_url depend xtree)"
 
 fetch_project_trees()
 {
@@ -97,10 +97,21 @@ git_prep()
 	if [ "$project" != "coreboot" ] || [ $# -gt 2 ]; then
 		[ ! -f "$tmpgit/.gitmodules" ] || git -C "$tmpgit" submodule \
 		    update --init --checkout || err "git_prep $_loc: !submod"
+		if [ "$project" = "coreboot" ] && [ -n "$xtree" ] && \
+		    [ "$xtree" != "$tree" ]; then
+			(
+			cd "$tmpgit/util" || err "prep $_loc: !cd $tmpgit/util"
+			rm -Rf crossgcc || err "prep $_loc: !rm xgcc"
+			ln -s "../../$xtree/util/crossgcc" crossgcc || \
+			    err "prep $_loc: can't create xgcc symlink"
+			) || err "prep $_loc: can't create xgcc symlink"
+		fi
 	fi
 
 	[ "$_loc" = "${_loc%/*}" ] || x_ mkdir -p "${_loc%/*}"
 	mv "$tmpgit" "$_loc" || err "git_prep: !mv $tmpgit $_loc"
+	[ -n "$xtree" ] && [ ! -d "src/coreboot/$xtree" ] && \
+		x_ ./update project trees -f coreboot "$xtree"; return 0
 }
 
 git_am_patches()

From 3e7e0c7d4881a187f82404beb34a2cd014a409f8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Jan 2024 12:59:02 +0000
Subject: [PATCH 0186/1549] git.sh: support downloading dependency trees

a tree can specify:

tree_depend="treename"

this will make the other tree be downloaded. this is
used for coreboot trees, to ensure that dependency
trees are downloaded, because trees can now re-use
crossgcc from other trees.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/dell/target.cfg         | 1 +
 config/coreboot/fam15h_udimm/target.cfg | 1 +
 include/git.sh                          | 4 +++-
 3 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/config/coreboot/dell/target.cfg b/config/coreboot/dell/target.cfg
index 32ee7ff1..8b2e2277 100644
--- a/config/coreboot/dell/target.cfg
+++ b/config/coreboot/dell/target.cfg
@@ -1,3 +1,4 @@
 tree="dell"
+tree_depend="default"
 xtree="default"
 rev="d862695f5f432b5c78dada5f16c293a4c3f9fce6"
diff --git a/config/coreboot/fam15h_udimm/target.cfg b/config/coreboot/fam15h_udimm/target.cfg
index 77c6799d..06aa17af 100644
--- a/config/coreboot/fam15h_udimm/target.cfg
+++ b/config/coreboot/fam15h_udimm/target.cfg
@@ -1,4 +1,5 @@
 tree="fam15h_udimm"
+tree_depend="fam15h_rdimm"
 xtree="fam15h_rdimm"
 rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
 payload_grub="n"
diff --git a/include/git.sh b/include/git.sh
index 7840671f..164d7891 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -4,7 +4,7 @@
 
 # This file is only used by update/project/trees
 
-eval "$(setvars "" _target rev _xm loc url bkup_url depend xtree)"
+eval "$(setvars "" _target rev _xm loc url bkup_url depend tree_depend xtree)"
 
 fetch_project_trees()
 {
@@ -37,6 +37,8 @@ fetch_config()
 		[ "${_target}" = "${tree}" ] && break
 		_target="${tree}"
 	done
+	[ -n "$tree_depend" ] && [ "$tree_depend" != "$tree" ] && \
+		x_ update trees -f "$project" "$tree_depend"; return 0
 }
 
 load_target_config()

From c996118294ec51e31c4485019af6c5fda66f2f99 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Jan 2024 15:50:21 +0000
Subject: [PATCH 0187/1549] git.sh: fix bad call to ./update

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/git.sh b/include/git.sh
index 164d7891..b19e02b6 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -38,7 +38,7 @@ fetch_config()
 		_target="${tree}"
 	done
 	[ -n "$tree_depend" ] && [ "$tree_depend" != "$tree" ] && \
-		x_ update trees -f "$project" "$tree_depend"; return 0
+		x_ ./update trees -f "$project" "$tree_depend"; return 0
 }
 
 load_target_config()

From a225e4d5d946b85c2d0acdf12f0da94ee5d02242 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Jan 2024 20:32:59 +0000
Subject: [PATCH 0188/1549] fix amd mainboard configs

in a build test, canoeboot 0.1 builds, but master doesn't,
and neither does lbmk. i changed a few of them when doing
the crossgcc build optimisation patches.

i'm just copying the configs from there. unlike in the
canoeboot version of this patch, i've re-enabled microcode
updates in these lbmk configs.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/fam15h_rdimm/target.cfg                |  5 -----
 config/coreboot/fam15h_udimm/target.cfg                |  6 ------
 .../kcma-d8-rdimm_16mb/config/libgfxinit_txtmode       |  3 ++-
 .../kcma-d8-rdimm_2mb/config/libgfxinit_txtmode        |  3 ++-
 .../kcma-d8-udimm_16mb/config/libgfxinit_txtmode       |  3 ++-
 .../kcma-d8-udimm_2mb/config/libgfxinit_txtmode        |  3 ++-
 .../coreboot/kfsn4-dre_1mb/config/libgfxinit_txtmode   | 10 ++++++++--
 .../coreboot/kfsn4-dre_2mb/config/libgfxinit_txtmode   | 10 ++++++++--
 .../kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode      |  3 ++-
 .../kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode       |  3 ++-
 .../kgpe-d16-udimm_16mb/config/libgfxinit_txtmode      |  3 ++-
 .../kgpe-d16-udimm_2mb/config/libgfxinit_txtmode       |  3 ++-
 12 files changed, 32 insertions(+), 23 deletions(-)

diff --git a/config/coreboot/fam15h_rdimm/target.cfg b/config/coreboot/fam15h_rdimm/target.cfg
index 9b99ec9e..7ca0c217 100644
--- a/config/coreboot/fam15h_rdimm/target.cfg
+++ b/config/coreboot/fam15h_rdimm/target.cfg
@@ -1,7 +1,2 @@
 tree="fam15h_rdimm"
 rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
-payload_grub="n"
-payload_grub_withseabios="n"
-payload_seabios="n"
-payload_memtest="n"
-xlang="c"
diff --git a/config/coreboot/fam15h_udimm/target.cfg b/config/coreboot/fam15h_udimm/target.cfg
index 06aa17af..06c40595 100644
--- a/config/coreboot/fam15h_udimm/target.cfg
+++ b/config/coreboot/fam15h_udimm/target.cfg
@@ -1,9 +1,3 @@
 tree="fam15h_udimm"
 tree_depend="fam15h_rdimm"
-xtree="fam15h_rdimm"
 rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
-payload_grub="n"
-payload_grub_withseabios="n"
-payload_seabios="n"
-payload_memtest="n"
-xlang="c"
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode
index a501619d..e5c58008 100644
--- a/config/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode
@@ -21,7 +21,8 @@ CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-# CONFIG_USE_BLOBS is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
 # CONFIG_COVERAGE is not set
 # CONFIG_UBSAN is not set
 CONFIG_NO_RELOCATABLE_RAMSTAGE=y
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode
index fc3074e3..19da9a2c 100644
--- a/config/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode
@@ -21,7 +21,8 @@ CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-# CONFIG_USE_BLOBS is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
 # CONFIG_COVERAGE is not set
 # CONFIG_UBSAN is not set
 CONFIG_NO_RELOCATABLE_RAMSTAGE=y
diff --git a/config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode
index a501619d..e5c58008 100644
--- a/config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode
@@ -21,7 +21,8 @@ CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-# CONFIG_USE_BLOBS is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
 # CONFIG_COVERAGE is not set
 # CONFIG_UBSAN is not set
 CONFIG_NO_RELOCATABLE_RAMSTAGE=y
diff --git a/config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode
index fc3074e3..19da9a2c 100644
--- a/config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode
@@ -21,7 +21,8 @@ CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-# CONFIG_USE_BLOBS is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
 # CONFIG_COVERAGE is not set
 # CONFIG_UBSAN is not set
 CONFIG_NO_RELOCATABLE_RAMSTAGE=y
diff --git a/config/coreboot/kfsn4-dre_1mb/config/libgfxinit_txtmode b/config/coreboot/kfsn4-dre_1mb/config/libgfxinit_txtmode
index 04ad7691..32d61412 100644
--- a/config/coreboot/kfsn4-dre_1mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kfsn4-dre_1mb/config/libgfxinit_txtmode
@@ -21,7 +21,8 @@ CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-# CONFIG_USE_BLOBS is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
 # CONFIG_COVERAGE is not set
 # CONFIG_UBSAN is not set
 CONFIG_NO_RELOCATABLE_RAMSTAGE=y
@@ -97,10 +98,12 @@ CONFIG_MAX_PHYSICAL_CPUS=2
 CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
 CONFIG_HT_CHAIN_UNITID_BASE=0x0
 CONFIG_IRQ_SLOT_COUNT=13
+CONFIG_VGA_BIOS_ID="1000,0072"
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_DIMM_SPD_SIZE=256
-# CONFIG_VGA_BIOS is not set
+CONFIG_VGA_BIOS=y
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_VGA_BIOS_FILE="/dev/null"
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
 CONFIG_DEVICETREE="devicetree.cb"
@@ -427,6 +430,9 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 # CONFIG_AZALIA_PLUGIN_SUPPORT is not set
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_VGA_BIOS_DGPU=y
+CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
+CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
 # CONFIG_SOFTWARE_I2C is not set
 
 #
diff --git a/config/coreboot/kfsn4-dre_2mb/config/libgfxinit_txtmode b/config/coreboot/kfsn4-dre_2mb/config/libgfxinit_txtmode
index 47e292e3..6c7cc560 100644
--- a/config/coreboot/kfsn4-dre_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kfsn4-dre_2mb/config/libgfxinit_txtmode
@@ -21,7 +21,8 @@ CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-# CONFIG_USE_BLOBS is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
 # CONFIG_COVERAGE is not set
 # CONFIG_UBSAN is not set
 CONFIG_NO_RELOCATABLE_RAMSTAGE=y
@@ -97,10 +98,12 @@ CONFIG_MAX_PHYSICAL_CPUS=2
 CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
 CONFIG_HT_CHAIN_UNITID_BASE=0x0
 CONFIG_IRQ_SLOT_COUNT=13
+CONFIG_VGA_BIOS_ID="1000,0072"
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_DIMM_SPD_SIZE=256
-# CONFIG_VGA_BIOS is not set
+CONFIG_VGA_BIOS=y
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+CONFIG_VGA_BIOS_FILE="/dev/null"
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
 CONFIG_DEVICETREE="devicetree.cb"
@@ -427,6 +430,9 @@ CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 # CONFIG_AZALIA_PLUGIN_SUPPORT is not set
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_VGA_BIOS_DGPU=y
+CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
+CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
 # CONFIG_SOFTWARE_I2C is not set
 
 #
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode
index 088360b1..765025d2 100644
--- a/config/coreboot/kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode
@@ -21,7 +21,8 @@ CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-# CONFIG_USE_BLOBS is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
 # CONFIG_COVERAGE is not set
 # CONFIG_UBSAN is not set
 CONFIG_NO_RELOCATABLE_RAMSTAGE=y
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode
index 575501b3..c203474a 100644
--- a/config/coreboot/kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode
@@ -21,7 +21,8 @@ CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-# CONFIG_USE_BLOBS is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
 # CONFIG_COVERAGE is not set
 # CONFIG_UBSAN is not set
 CONFIG_NO_RELOCATABLE_RAMSTAGE=y
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode
index 088360b1..765025d2 100644
--- a/config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode
@@ -21,7 +21,8 @@ CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-# CONFIG_USE_BLOBS is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
 # CONFIG_COVERAGE is not set
 # CONFIG_UBSAN is not set
 CONFIG_NO_RELOCATABLE_RAMSTAGE=y
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode
index 575501b3..c203474a 100644
--- a/config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode
@@ -21,7 +21,8 @@ CONFIG_COMPRESS_RAMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-# CONFIG_USE_BLOBS is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
 # CONFIG_COVERAGE is not set
 # CONFIG_UBSAN is not set
 CONFIG_NO_RELOCATABLE_RAMSTAGE=y

From 435441d04b2482da6cddd34e988e9173331a9616 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Jan 2024 22:05:41 +0000
Subject: [PATCH 0189/1549] update/release: generate changelogs

use the git log, as follows:

git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' --abbrev-commit

this creates a nice, uniform list of changes.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/update/release | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/script/update/release b/script/update/release
index fa557477..6182bd1c 100755
--- a/script/update/release
+++ b/script/update/release
@@ -51,6 +51,11 @@ build_release()
 	fetch_trees
 	x_ mv src/docs docs
 	) || err "can't create release files"
+
+	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
+	    --abbrev-commit > "${srcdir}/CHANGELOG" || \
+	    err "build_release $srcdir: couldn't generate changelog"
+
 	(
 	cd "${srcdir%/*}" || err "${_xm}: mktarball \"${srcdir}\""
 	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || err "$_xm: mksrc"

From f72a72af96d9a7e957a966360d7eb0217a9aa4fb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Jan 2024 22:11:00 +0000
Subject: [PATCH 0190/1549] don't download projects on release archives

the changelog file is only present in releases, so
use the presence of this file for the test.

someone who wants to fetch projects within a release
archive can simply use the git repo, or delete the file.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/update/trees | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/script/update/trees b/script/update/trees
index fa812f54..100f5f15 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -48,7 +48,9 @@ main()
 build_projects()
 {
 	[ $# -gt 0 ] && x_ ./update trees $_f $@
-	[ "$mode" = "fetch" ] && eval "fetch_project_repo; return 0;"
+
+	[ "$mode" = "fetch" ] && [ ! -f "CHANGELOG" ] && \
+		eval "fetch_project_repo; return 0;"
 
 	load_project_config "$cfgsdir"
 
@@ -121,7 +123,8 @@ handle_defconfig()
 handle_src_tree()
 {
 	target_dir="${cfgsdir}/${target}"
-	[ "$mode" = "fetch" ] && eval "fetch_project_trees; return 1;"
+	[ "$mode" = "fetch" ] && [ ! -f "CHANGELOG" ] && \
+		eval "fetch_project_trees; return 1;"
 
 	load_project_config "$target_dir"
 

From dcf7da9a654b5b891cafadb80583882dfbee9d4a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Jan 2024 22:16:09 +0000
Subject: [PATCH 0191/1549] coreboot/fam15h_udimm: define xtree

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/fam15h_udimm/target.cfg | 1 +
 1 file changed, 1 insertion(+)

diff --git a/config/coreboot/fam15h_udimm/target.cfg b/config/coreboot/fam15h_udimm/target.cfg
index 06c40595..c3c76603 100644
--- a/config/coreboot/fam15h_udimm/target.cfg
+++ b/config/coreboot/fam15h_udimm/target.cfg
@@ -1,3 +1,4 @@
 tree="fam15h_udimm"
 tree_depend="fam15h_rdimm"
+xtree="fam15h_rdimm"
 rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"

From 8b4a4f79f61c8cb7d176ba13eb69bd6eb526aec7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Jan 2024 22:19:04 +0000
Subject: [PATCH 0192/1549] fam15h boards: define xtree

these should be using the rdimm tree for crossgcc,
so define it explicitly. the build system creates
a symlink too, but it's still best that we use it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/kcma-d8-udimm_16mb/target.cfg  | 1 +
 config/coreboot/kcma-d8-udimm_2mb/target.cfg   | 1 +
 config/coreboot/kgpe-d16-udimm_16mb/target.cfg | 1 +
 config/coreboot/kgpe-d16-udimm_2mb/target.cfg  | 1 +
 4 files changed, 4 insertions(+)

diff --git a/config/coreboot/kcma-d8-udimm_16mb/target.cfg b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
index a8a4a5fc..35354c26 100644
--- a/config/coreboot/kcma-d8-udimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
@@ -1,4 +1,5 @@
 tree="fam15h_udimm"
+xtree="fam15h_rdimm"
 xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/kcma-d8-udimm_2mb/target.cfg b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
index a8a4a5fc..35354c26 100644
--- a/config/coreboot/kcma-d8-udimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
@@ -1,4 +1,5 @@
 tree="fam15h_udimm"
+xtree="fam15h_rdimm"
 xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
index 9bd20d45..5b4010d8 100644
--- a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
@@ -1,4 +1,5 @@
 tree="fam15h_udimm"
+xtree="fam15h_rdimm"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
index 9bd20d45..5b4010d8 100644
--- a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
@@ -1,4 +1,5 @@
 tree="fam15h_udimm"
+xtree="fam15h_rdimm"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"

From ece5463109721347c2008b7791907ac4d6825588 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 23 Jan 2024 20:25:08 +0000
Subject: [PATCH 0193/1549] script/vendor/inject: remove erroneous check

the boarddir variable is only set *after* detect_board
is run, and is in fact checked after that. this check,
removed by this patch, is too early and causes lbmk
to exit with error states. this patch fixes the error.

the error was that lbmk was then searching for a file
that is at an empty path.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/vendor/inject | 1 -
 1 file changed, 1 deletion(-)

diff --git a/script/vendor/inject b/script/vendor/inject
index 2f55e166..4ac2753f 100755
--- a/script/vendor/inject
+++ b/script/vendor/inject
@@ -82,7 +82,6 @@ detect_board()
 	*)
 		err "detect_board $filename: could not detect board type"
 	esac	
-	[ -d "$boarddir" ] || err "detect_board: dir \"$boarddir\" missing"
 	printf "%s\n" "${board}"
 }
 

From 4a6dc5553f2a15542f730ca735fb8bf95fb8f49b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 25 Jan 2024 15:24:02 +0000
Subject: [PATCH 0194/1549] coreboot/default: update coreboot to January 2024

Base revision changed to:

commit b6cbfa977f63d57d5d6b9e9f7c1cef30162f575a
Author: Morris Hsu <morris-hsu@quanta.corp-partner.google.com>
Date:   Fri Jan 5 16:48:17 2024 +0800

    mb/google/dedede/var/metaknight:Add fw_config probe for multi codec
    and amplifier

Of note:

Several out-of-tree ports have been adjusted to use the new SPD config
style, where it is defined in devicetree. I manually updated the E6530
patch myself, based on the update that Nicholas did on E6430 (Nicholas
will later update the E6530 patch himself, and I'll re-merge the patch).

Several upstream patches now exist in this revision, that we were able
to remove from lbmk.

The heap size patch was reverted upstream, as we did, but see:
https://review.coreboot.org/c/coreboot/+/80023
https://review.coreboot.org/c/coreboot/+/79525
Although we still disable the TSEG Stage Cache, ivy/sandy/haswell should
be reliable on S3 now (leaving TSEG Stage Cache disabled, for now, anyway).

Also included in upstream now:

commit 29030d0f3dad2ec6b86000dfe2c8e951ae80bf94
Author: Bill Xie <persmule@hardenedlinux.org>
Date:   Sat Oct 7 01:32:51 2023 +0800

    drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume

Further patches from upstream:

commit 432e92688eca0e85cbaebca3232f65936b305a98
Author: Bill Xie <persmule@hardenedlinux.org>
Date:   Fri Nov 3 12:34:01 2023 +0800

    drivers/pc80/rtc/option.c: Reset only CMOS range covered by checksum

This should fix S3 on GM45 thinkpads.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../coreboot/d510mo/config/libgfxinit_txtmode |  32 +-
 .../d510mo_16mb/config/libgfxinit_txtmode     |  32 +-
 .../d945gclf_512kb/config/libgfxinit_txtmode  |  32 +-
 .../d945gclf_8mb/config/libgfxinit_txtmode    |  32 +-
 ...Set-default-VRAM-to-64MiB-instead-of.patch |   4 +-
 ...d-c3-and-clockgen-to-apple-macbook21.patch |   4 +-
 ...-Video-RAM-changed-to-default-previo.patch |   4 +-
 ...64MiB-VRAM-the-default-in-cmos.defau.patch |   4 +-
 ...0-set-VRAM-to-256MiB-VRAM-by-default.patch |   4 +-
 ...o-x200-set-VRAM-to-256MiB-by-default.patch |   4 +-
 ...m-es2l-set-VRAM-to-256MiB-by-default.patch |   4 +-
 ...3t-am3-set-VRAM-to-256MiB-by-default.patch |   4 +-
 ...09-lenovo-t400-Enable-all-SATA-ports.patch |   4 +-
 ...ovo-X230-patch-gfx_uma_size-224M-by-.patch |   4 +-
 ...et-me_state-Disabled-in-cmos.default.patch |   4 +-
 ...e-Disabled-on-all-cmos.default-files.patch |   4 +-
 ...13-lenovo-x230-introduce-FHD-variant.patch |  12 +-
 ...the-data.vbt-path-for-the-EDP-varian.patch |   4 +-
 ...ool-add-nuke-flag-all-0xFF-on-region.patch | 140 ++++---
 ...-x200-t400-Revert-cpu-intel-model_10.patch |   4 +-
 ...e-CPUs-don-t-enable-alternative-SMRR.patch |   4 +-
 ...able-01.0-device-in-devicetree-for-d.patch |   4 +-
 ...or-coreboot-images-built-without-a-p.patch |  16 +-
 ...Add-command-to-enable-disable-radios.patch |  61 ----
 ...-dell-Add-Latitude-E6430-Ivy-Bridge.patch} | 139 +++----
 ...able-coreboot-related-BL31-features.patch} |  18 +-
 ...-Hook-up-radio-enables-to-option-API.patch |  37 --
 ...-use-github-for-the-acpica-download.patch} |   6 +-
 ...ram-allocation-on-more-intel-boards.patch} |   4 +-
 ...e6430-use-ME-Soft-Temporary-Disable.patch} |   4 +-
 ...ring-HEAP_SIZE-to-a-common-large-val.patch | 341 ------------------
 ...mirrorservice.org-for-gcc-downloads.patch} |   6 +-
 ...-dell-Add-Latitude-E6530-Ivy-Bridge.patch} |   6 +-
 ...k-setup_heci_uma.c-Add-timeouts-when.patch |  77 ----
 ...se-dell-e6530-to-newer-coreboot-code.patch | 145 ++++++++
 ...-disable-the-ME-device-in-devicetree.patch |  54 +++
 ...tion-introduced-similar-to-x230_edp.patch} |  14 +-
 ...b-hp-Add-Compaq-Elite-8300-CMT-port.patch} |  97 +++--
 .../0035-Add-VBT-for-EliteBook-8460p.patch    |  69 ----
 ...book_820_g2-do-not-set-EC-SLPT-on-S5.patch |  34 --
 config/coreboot/default/target.cfg            |   2 +-
 .../e6430_12mb/config/libgfxinit_corebootfb   |  33 +-
 .../e6430_12mb/config/libgfxinit_txtmode      |  33 +-
 .../e6530_12mb/config/libgfxinit_corebootfb   |  33 +-
 .../e6530_12mb/config/libgfxinit_txtmode      |  33 +-
 .../g43t-am3/config/libgfxinit_txtmode        |  31 +-
 .../g43t-am3_16mb/config/libgfxinit_txtmode   |  31 +-
 .../ga-g41m-es2l/config/libgfxinit_txtmode    |  31 +-
 .../gru_bob/config/libgfxinit_corebootfb      |  82 +++--
 .../gru_kevin/config/libgfxinit_corebootfb    |  82 +++--
 .../hp2170p_16mb/config/libgfxinit_corebootfb |  37 +-
 .../hp2170p_16mb/config/libgfxinit_txtmode    |  37 +-
 .../hp2560p_8mb/config/libgfxinit_corebootfb  |  37 +-
 .../hp2560p_8mb/config/libgfxinit_txtmode     |  37 +-
 .../hp2570p_16mb/config/libgfxinit_corebootfb |  33 +-
 .../hp2570p_16mb/config/libgfxinit_txtmode    |  33 +-
 .../config/libgfxinit_corebootfb              |  37 +-
 .../hp8200sff_4mb/config/libgfxinit_txtmode   |  37 +-
 .../config/libgfxinit_corebootfb              |  37 +-
 .../hp8200sff_8mb/config/libgfxinit_txtmode   |  37 +-
 .../hp820g2_12mb/config/libgfxinit_corebootfb |  33 +-
 .../hp820g2_12mb/config/libgfxinit_txtmode    |  33 +-
 .../config/libgfxinit_corebootfb              |  34 +-
 .../hp8300cmt_16mb/config/libgfxinit_txtmode  |  34 +-
 .../config/libgfxinit_corebootfb              |  34 +-
 .../hp8300usdt_16mb/config/libgfxinit_txtmode |  34 +-
 .../config/libgfxinit_corebootfb              |  37 +-
 .../config/libgfxinit_txtmode                 |  37 +-
 .../config/libgfxinit_corebootfb              |  33 +-
 .../config/libgfxinit_txtmode                 |  33 +-
 .../hp9470m_16mb/config/libgfxinit_corebootfb |  37 +-
 .../hp9470m_16mb/config/libgfxinit_txtmode    |  37 +-
 .../macbook11/config/libgfxinit_corebootfb    |  27 +-
 .../macbook11/config/libgfxinit_txtmode       |  27 +-
 .../config/libgfxinit_corebootfb              |  27 +-
 .../macbook11_16mb/config/libgfxinit_txtmode  |  27 +-
 .../macbook21/config/libgfxinit_corebootfb    |  27 +-
 .../macbook21/config/libgfxinit_txtmode       |  27 +-
 .../config/libgfxinit_corebootfb              |  27 +-
 .../macbook21_16mb/config/libgfxinit_txtmode  |  27 +-
 .../config/libgfxinit_corebootfb              |  20 +-
 .../config/libgfxinit_corebootfb              |  23 +-
 .../qemu_x86_12mb/config/libgfxinit_txtmode   |  23 +-
 .../r400_16mb/config/libgfxinit_corebootfb    |  31 +-
 .../r400_16mb/config/libgfxinit_txtmode       |  31 +-
 .../r400_4mb/config/libgfxinit_corebootfb     |  31 +-
 .../r400_4mb/config/libgfxinit_txtmode        |  31 +-
 .../r400_8mb/config/libgfxinit_corebootfb     |  31 +-
 .../r400_8mb/config/libgfxinit_txtmode        |  31 +-
 .../r500_4mb/config/libgfxinit_corebootfb     |  31 +-
 .../r500_4mb/config/libgfxinit_txtmode        |  31 +-
 .../t1650_12mb/config/libgfxinit_txtmode      |  33 +-
 .../t400_16mb/config/libgfxinit_corebootfb    |  31 +-
 .../t400_16mb/config/libgfxinit_txtmode       |  31 +-
 .../t400_4mb/config/libgfxinit_corebootfb     |  31 +-
 .../t400_4mb/config/libgfxinit_txtmode        |  31 +-
 .../t400_8mb/config/libgfxinit_corebootfb     |  31 +-
 .../t400_8mb/config/libgfxinit_txtmode        |  31 +-
 .../t420_8mb/config/libgfxinit_corebootfb     |  33 +-
 .../t420s_8mb/config/libgfxinit_corebootfb    |  33 +-
 .../t420s_8mb/config/libgfxinit_txtmode       |  33 +-
 .../t430_12mb/config/libgfxinit_corebootfb    |  33 +-
 .../t430_12mb/config/libgfxinit_txtmode       |  33 +-
 .../config/libgfxinit_corebootfb              |  31 +-
 .../t440pmrc_12mb/config/libgfxinit_txtmode   |  31 +-
 .../t500_16mb/config/libgfxinit_corebootfb    |  31 +-
 .../t500_16mb/config/libgfxinit_txtmode       |  31 +-
 .../t500_4mb/config/libgfxinit_corebootfb     |  31 +-
 .../t500_4mb/config/libgfxinit_txtmode        |  31 +-
 .../t500_8mb/config/libgfxinit_corebootfb     |  31 +-
 .../t500_8mb/config/libgfxinit_txtmode        |  31 +-
 .../t520_8mb/config/libgfxinit_corebootfb     |  33 +-
 .../t520_8mb/config/libgfxinit_txtmode        |  33 +-
 .../t530_12mb/config/libgfxinit_corebootfb    |  33 +-
 .../t530_12mb/config/libgfxinit_txtmode       |  33 +-
 .../config/libgfxinit_corebootfb              |  31 +-
 .../config/libgfxinit_txtmode                 |  31 +-
 .../t60_intelgpu/config/libgfxinit_corebootfb |  31 +-
 .../t60_intelgpu/config/libgfxinit_txtmode    |  31 +-
 .../w500_16mb/config/libgfxinit_corebootfb    |  31 +-
 .../w500_16mb/config/libgfxinit_txtmode       |  31 +-
 .../w500_4mb/config/libgfxinit_corebootfb     |  31 +-
 .../w500_4mb/config/libgfxinit_txtmode        |  31 +-
 .../w500_8mb/config/libgfxinit_corebootfb     |  31 +-
 .../w500_8mb/config/libgfxinit_txtmode        |  31 +-
 .../w530_12mb/config/libgfxinit_corebootfb    |  33 +-
 .../w530_12mb/config/libgfxinit_txtmode       |  33 +-
 .../w541mrc_12mb/config/libgfxinit_corebootfb |  31 +-
 .../w541mrc_12mb/config/libgfxinit_txtmode    |  31 +-
 .../x200_16mb/config/libgfxinit_corebootfb    |  31 +-
 .../x200_16mb/config/libgfxinit_txtmode       |  31 +-
 .../x200_4mb/config/libgfxinit_corebootfb     |  31 +-
 .../x200_4mb/config/libgfxinit_txtmode        |  31 +-
 .../x200_8mb/config/libgfxinit_corebootfb     |  31 +-
 .../x200_8mb/config/libgfxinit_txtmode        |  31 +-
 .../x220_8mb/config/libgfxinit_corebootfb     |  33 +-
 .../x220_8mb/config/libgfxinit_txtmode        |  33 +-
 .../x220edp_8mb/config/libgfxinit_corebootfb  |  33 +-
 .../x220edp_8mb/config/libgfxinit_txtmode     |  33 +-
 .../x230_12mb/config/libgfxinit_corebootfb    |  33 +-
 .../x230_12mb/config/libgfxinit_txtmode       |  33 +-
 .../x230_16mb/config/libgfxinit_corebootfb    |  33 +-
 .../x230_16mb/config/libgfxinit_txtmode       |  33 +-
 .../x230edp_12mb/config/libgfxinit_corebootfb |  33 +-
 .../x230edp_12mb/config/libgfxinit_txtmode    |  33 +-
 .../x230t_12mb/config/libgfxinit_corebootfb   |  33 +-
 .../x230t_12mb/config/libgfxinit_txtmode      |  33 +-
 .../x230t_16mb/config/libgfxinit_corebootfb   |  33 +-
 .../x230t_16mb/config/libgfxinit_txtmode      |  33 +-
 .../x301_16mb/config/libgfxinit_corebootfb    |  31 +-
 .../x301_16mb/config/libgfxinit_txtmode       |  31 +-
 .../x301_4mb/config/libgfxinit_corebootfb     |  31 +-
 .../x301_4mb/config/libgfxinit_txtmode        |  31 +-
 .../x301_8mb/config/libgfxinit_corebootfb     |  31 +-
 .../x301_8mb/config/libgfxinit_txtmode        |  31 +-
 .../coreboot/x60/config/libgfxinit_corebootfb |  31 +-
 config/coreboot/x60/config/libgfxinit_txtmode |  31 +-
 .../x60_16mb/config/libgfxinit_corebootfb     |  31 +-
 .../x60_16mb/config/libgfxinit_txtmode        |  31 +-
 159 files changed, 3259 insertions(+), 2072 deletions(-)
 delete mode 100644 config/coreboot/default/patches/0020-ec-dell-mec5035-Add-command-to-enable-disable-radios.patch
 rename config/coreboot/default/patches/{0022-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch => 0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch} (89%)
 rename config/coreboot/default/patches/{0023-HACK-Disable-coreboot-related-BL31-features.patch => 0021-HACK-Disable-coreboot-related-BL31-features.patch} (59%)
 delete mode 100644 config/coreboot/default/patches/0021-ec-dell-mec5035-Hook-up-radio-enables-to-option-API.patch
 rename config/coreboot/default/patches/{0024-don-t-use-github-for-the-acpica-download.patch => 0022-don-t-use-github-for-the-acpica-download.patch} (89%)
 rename config/coreboot/default/patches/{0030-crank-up-vram-allocation-on-more-intel-boards.patch => 0023-crank-up-vram-allocation-on-more-intel-boards.patch} (97%)
 rename config/coreboot/default/patches/{0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch => 0024-dell-e6430-use-ME-Soft-Temporary-Disable.patch} (86%)
 delete mode 100644 config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
 rename config/coreboot/default/patches/{0032-use-mirrorservice.org-for-gcc-downloads.patch => 0025-use-mirrorservice.org-for-gcc-downloads.patch} (89%)
 rename config/coreboot/default/patches/{0033-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch => 0026-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch} (99%)
 delete mode 100644 config/coreboot/default/patches/0026-sb-intel-ibexpeak-setup_heci_uma.c-Add-timeouts-when.patch
 create mode 100644 config/coreboot/default/patches/0027-rebase-dell-e6530-to-newer-coreboot-code.patch
 create mode 100644 config/coreboot/default/patches/0028-dell-e6-30-disable-the-ME-device-in-devicetree.patch
 rename config/coreboot/default/patches/{0034-x220_edp-modification-introduced-similar-to-x230_edp.patch => 0029-x220_edp-modification-introduced-similar-to-x230_edp.patch} (94%)
 rename config/coreboot/default/patches/{0036-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch => 0030-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch} (87%)
 delete mode 100644 config/coreboot/default/patches/0035-Add-VBT-for-EliteBook-8460p.patch
 delete mode 100644 config/coreboot/default/patches/0037-mb-hp-elitebook_820_g2-do-not-set-EC-SLPT-on-S5.patch

diff --git a/config/coreboot/d510mo/config/libgfxinit_txtmode b/config/coreboot/d510mo/config/libgfxinit_txtmode
index e57c6ed0..3ae29835 100644
--- a/config/coreboot/d510mo/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -129,6 +130,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -141,7 +144,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -189,6 +191,7 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_MINNOW3 is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
+# CONFIG_BOARD_INTEL_MTLRVP4ES_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set
 # CONFIG_BOARD_INTEL_SKLSDLBRK is not set
 # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
@@ -201,15 +204,12 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -223,6 +223,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=1024
@@ -248,6 +249,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x80000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,17 +258,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -355,6 +358,8 @@ CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -386,7 +391,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x10000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -397,8 +402,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -428,6 +431,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -442,6 +446,10 @@ CONFIG_DRIVERS_I2C_CK505=y
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
@@ -473,6 +481,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -500,6 +509,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -563,6 +573,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
index db50e6a6..d2ec2b67 100644
--- a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -129,6 +130,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -141,7 +144,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -189,6 +191,7 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_MINNOW3 is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
+# CONFIG_BOARD_INTEL_MTLRVP4ES_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set
 # CONFIG_BOARD_INTEL_SKLSDLBRK is not set
 # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
@@ -201,15 +204,12 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -223,6 +223,7 @@ CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -248,6 +249,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x80000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,17 +258,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -355,6 +358,8 @@ CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -386,7 +391,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x10000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -397,8 +402,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -428,6 +431,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -442,6 +446,10 @@ CONFIG_DRIVERS_I2C_CK505=y
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
@@ -473,6 +481,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -500,6 +509,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -563,6 +573,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode b/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode
index 6a027c06..6d2bcb8f 100644
--- a/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode
+++ b/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -130,6 +131,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -142,7 +145,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -190,6 +192,7 @@ CONFIG_BOARD_INTEL_D945GCLF=y
 # CONFIG_BOARD_INTEL_MINNOW3 is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
+# CONFIG_BOARD_INTEL_MTLRVP4ES_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set
 # CONFIG_BOARD_INTEL_SKLSDLBRK is not set
 # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
@@ -199,8 +202,6 @@ CONFIG_BOARD_INTEL_D945GCLF=y
 # CONFIG_BOARD_INTEL_WTM2 is not set
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
@@ -208,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_512=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -222,6 +222,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_512=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=512
@@ -247,6 +248,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -255,17 +257,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -354,6 +357,8 @@ CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -385,7 +390,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -393,8 +398,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -423,6 +426,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -436,6 +440,10 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
@@ -467,6 +475,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -494,6 +503,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -561,6 +571,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode b/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
index 2c59d001..1c7566ec 100644
--- a/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -130,6 +131,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -142,7 +145,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -190,6 +192,7 @@ CONFIG_BOARD_INTEL_D945GCLF=y
 # CONFIG_BOARD_INTEL_MINNOW3 is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
+# CONFIG_BOARD_INTEL_MTLRVP4ES_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set
 # CONFIG_BOARD_INTEL_SKLSDLBRK is not set
 # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
@@ -199,8 +202,6 @@ CONFIG_BOARD_INTEL_D945GCLF=y
 # CONFIG_BOARD_INTEL_WTM2 is not set
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
@@ -208,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_512=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -222,6 +222,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -247,6 +248,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -255,17 +257,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -354,6 +357,8 @@ CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -385,7 +390,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -393,8 +398,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -423,6 +426,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -436,6 +440,10 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
@@ -467,6 +475,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -494,6 +503,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -561,6 +571,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch b/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
index c494390e..d2bae2e4 100644
--- a/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
+++ b/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
@@ -1,7 +1,7 @@
-From e8f5f6c372152c7deddd3080954d0f4fdd39ae2b Mon Sep 17 00:00:00 2001
+From 1195c954a3b6822e5e843067251c0c80c9520eab Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@retroboot.org>
 Date: Fri, 19 Mar 2021 05:54:58 +0000
-Subject: [PATCH 01/22] apple/macbook21: Set default VRAM to 64MiB instead of
+Subject: [PATCH 01/30] apple/macbook21: Set default VRAM to 64MiB instead of
  8MiB
 
 ---
diff --git a/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch b/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
index bf36faea..8cd272ec 100644
--- a/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
+++ b/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
@@ -1,7 +1,7 @@
-From fdd756a8217548981a1eb62e504cc37371c9fd51 Mon Sep 17 00:00:00 2001
+From 50a52cea2b43e6e407b456c082e908c7d29e090b Mon Sep 17 00:00:00 2001
 From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
 Date: Wed, 27 Oct 2021 13:36:01 +0200
-Subject: [PATCH 02/22] add c3 and clockgen to apple/macbook21
+Subject: [PATCH 02/30] add c3 and clockgen to apple/macbook21
 
 ---
  src/mainboard/apple/macbook21/Kconfig       |  1 +
diff --git a/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch b/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
index 98943d72..34e12a6b 100644
--- a/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
+++ b/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
@@ -1,7 +1,7 @@
-From c8332a8bac4986afec6c639f55c5876f83e50b76 Mon Sep 17 00:00:00 2001
+From ca4cd66f411247395a323e5ea1abf09e83057827 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@osboot.org>
 Date: Sun, 3 Jan 2021 03:34:01 +0000
-Subject: [PATCH 03/22] lenovo/x60: 64MiB Video RAM changed to default
+Subject: [PATCH 03/30] lenovo/x60: 64MiB Video RAM changed to default
  (previously it was 8MiB)
 
 ---
diff --git a/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch b/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
index 0f1f7b1b..ee90dd63 100644
--- a/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
+++ b/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
@@ -1,7 +1,7 @@
-From 2e3ad35c24a86cb3109f4e5139b9ffba931eb80b Mon Sep 17 00:00:00 2001
+From eca0f4a3a4d6907e92b948547a362ca0ac3fc382 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@osboot.org>
 Date: Mon, 22 Feb 2021 22:16:59 +0000
-Subject: [PATCH 04/22] lenovo/t60: make 64MiB VRAM the default in cmos.default
+Subject: [PATCH 04/30] lenovo/t60: make 64MiB VRAM the default in cmos.default
 
 ---
  src/mainboard/lenovo/t60/cmos.default | 2 +-
diff --git a/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch b/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch
index 0818f1f8..35d74c75 100644
--- a/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch
+++ b/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch
@@ -1,7 +1,7 @@
-From 5fc03fbf8c7fa30588dab93c76b5532ce03b1610 Mon Sep 17 00:00:00 2001
+From 2eae87815675aebd472b6042777fe51279be4550 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:10:33 +0100
-Subject: [PATCH 05/22] lenovo/t400: set VRAM to 256MiB VRAM by default
+Subject: [PATCH 05/30] lenovo/t400: set VRAM to 256MiB VRAM by default
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
diff --git a/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch b/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch
index cbb00058..cc6abb00 100644
--- a/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch
+++ b/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch
@@ -1,7 +1,7 @@
-From 93f607fed477b3e63b7929808937436ac2898b34 Mon Sep 17 00:00:00 2001
+From f6b4913a5eca619b745d5ccea9af022a54fb185b Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:11:59 +0100
-Subject: [PATCH 06/22] lenovo/x200: set VRAM to 256MiB by default
+Subject: [PATCH 06/30] lenovo/x200: set VRAM to 256MiB by default
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
diff --git a/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch b/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch
index bea37df8..c4840ecc 100644
--- a/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch
+++ b/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch
@@ -1,7 +1,7 @@
-From 9faa780b2ac45bc1bf61aa252364ee3158c4cb10 Mon Sep 17 00:00:00 2001
+From a3a0969075163be413f968b03671aa5d8662672a Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:18:26 +0100
-Subject: [PATCH 07/22] gigabyte/ga-g41m-es2l: set VRAM to 256MiB by default
+Subject: [PATCH 07/30] gigabyte/ga-g41m-es2l: set VRAM to 256MiB by default
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
diff --git a/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch b/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch
index 949ea696..19977870 100644
--- a/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch
+++ b/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch
@@ -1,7 +1,7 @@
-From f1c59cd67446303a5cdf9107461247a63f894de3 Mon Sep 17 00:00:00 2001
+From 223ac17617b3a0c08925abbbe42d0d003e144a28 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:21:39 +0100
-Subject: [PATCH 08/22] acer/g43t-am3: set VRAM to 256MiB by default
+Subject: [PATCH 08/30] acer/g43t-am3: set VRAM to 256MiB by default
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
diff --git a/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch b/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch
index 9d901c45..332b870e 100644
--- a/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch
+++ b/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch
@@ -1,7 +1,7 @@
-From 75858ba200a2a5835bca0af9b5f508a52ed978de Mon Sep 17 00:00:00 2001
+From 80ebbfef42454ea0911e5fc3858103d905987ed8 Mon Sep 17 00:00:00 2001
 From: persmule <persmule@gmail.com>
 Date: Sun, 31 Oct 2021 23:33:26 +0000
-Subject: [PATCH 09/22] lenovo/t400: Enable all SATA ports
+Subject: [PATCH 09/30] lenovo/t400: Enable all SATA ports
 
 There are 2 SATA ports on the chassis of t400(s), but at least one dock for
 t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
diff --git a/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch b/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch
index 297dd223..12917ed8 100644
--- a/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch
+++ b/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch
@@ -1,7 +1,7 @@
-From 2c103a71a37eb4db9d33928b2371a682ca04e65f Mon Sep 17 00:00:00 2001
+From 318a97c284f8d5030100476a32516ddc9e51603d Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 20 Dec 2021 01:29:31 +0000
-Subject: [PATCH 10/22] coreboot: Add Lenovo X230 patch: gfx_uma_size 224M by
+Subject: [PATCH 10/30] coreboot: Add Lenovo X230 patch: gfx_uma_size 224M by
  default
 
 ---
diff --git a/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch b/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
index 2fe4460d..dc3a33ca 100644
--- a/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
+++ b/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
@@ -1,7 +1,7 @@
-From 040f15039fa59d70cd54b8fff5d947e155666aa1 Mon Sep 17 00:00:00 2001
+From 47afbe8b94edd1ff58c1daf0bda020e6afac35f4 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 3 Jan 2022 19:06:22 +0000
-Subject: [PATCH 11/22] lenovo/x230: set me_state=Disabled in cmos.default
+Subject: [PATCH 11/30] lenovo/x230: set me_state=Disabled in cmos.default
 
 I only recently found out about this. It's possible to use me_cleaner to
 do the same thing, but some people might just flash coreboot and not do
diff --git a/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch b/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch
index b0dba3ba..49f4db9b 100644
--- a/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch
+++ b/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch
@@ -1,7 +1,7 @@
-From 81febff42c66bd53e44176f14b651339b503a9f3 Mon Sep 17 00:00:00 2001
+From 531ef34ece796f38cb8a13a54856e46e79842e29 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Wed, 2 Mar 2022 21:50:01 +0000
-Subject: [PATCH 12/22] set me_state=Disabled on all cmos.default files!
+Subject: [PATCH 12/30] set me_state=Disabled on all cmos.default files!
 
 yeah. why the hell isn't this the default
 
diff --git a/config/coreboot/default/patches/0013-lenovo-x230-introduce-FHD-variant.patch b/config/coreboot/default/patches/0013-lenovo-x230-introduce-FHD-variant.patch
index c940c9e1..a3810417 100644
--- a/config/coreboot/default/patches/0013-lenovo-x230-introduce-FHD-variant.patch
+++ b/config/coreboot/default/patches/0013-lenovo-x230-introduce-FHD-variant.patch
@@ -1,7 +1,7 @@
-From c73269315626678c191ea494338581abdc417f21 Mon Sep 17 00:00:00 2001
+From 7b9003f98c7c685b2fe56781f3b0916018037b72 Mon Sep 17 00:00:00 2001
 From: Alexander Couzens <lynxis@fe80.eu>
 Date: Sat, 19 Mar 2022 13:42:33 +0000
-Subject: [PATCH 13/22] lenovo/x230: introduce FHD variant
+Subject: [PATCH 13/30] lenovo/x230: introduce FHD variant
 
 There is a modification for the x230 which uses the 2nd DP from the dock
 as the integrated panel's connection, which allows using a custom eDP
@@ -36,7 +36,7 @@ Signed-off-by: Felix Singer <felixsinger@posteo.net>
 ---
  src/mainboard/lenovo/x230/Kconfig             |  15 ++++++++-----
  src/mainboard/lenovo/x230/Kconfig.name        |   3 +++
- src/mainboard/lenovo/x230/Makefile.inc        |   5 +++++
+ src/mainboard/lenovo/x230/Makefile.mk         |   5 +++++
  .../lenovo/x230/variants/x230_edp/data.vbt    | Bin 0 -> 4281 bytes
  .../x230/variants/x230_edp/gma-mainboard.ads  |  21 ++++++++++++++++++
  5 files changed, 38 insertions(+), 6 deletions(-)
@@ -111,10 +111,10 @@ index 1a01436879..e7290a12dd 100644
 +
 +config BOARD_LENOVO_X230_EDP
 +	bool "ThinkPad X230 eDP Mod (2K/FHD)"
-diff --git a/src/mainboard/lenovo/x230/Makefile.inc b/src/mainboard/lenovo/x230/Makefile.inc
+diff --git a/src/mainboard/lenovo/x230/Makefile.mk b/src/mainboard/lenovo/x230/Makefile.mk
 index 8e801f145d..6e6f9f90b9 100644
---- a/src/mainboard/lenovo/x230/Makefile.inc
-+++ b/src/mainboard/lenovo/x230/Makefile.inc
+--- a/src/mainboard/lenovo/x230/Makefile.mk
++++ b/src/mainboard/lenovo/x230/Makefile.mk
 @@ -5,4 +5,9 @@ bootblock-y += variants/$(VARIANT_DIR)/gpio.c
  romstage-y += variants/$(VARIANT_DIR)/early_init.c
  romstage-y += variants/$(VARIANT_DIR)/gpio.c
diff --git a/config/coreboot/default/patches/0014-lenovo-x230-fix-the-data.vbt-path-for-the-EDP-varian.patch b/config/coreboot/default/patches/0014-lenovo-x230-fix-the-data.vbt-path-for-the-EDP-varian.patch
index 83f99148..f439f2e7 100644
--- a/config/coreboot/default/patches/0014-lenovo-x230-fix-the-data.vbt-path-for-the-EDP-varian.patch
+++ b/config/coreboot/default/patches/0014-lenovo-x230-fix-the-data.vbt-path-for-the-EDP-varian.patch
@@ -1,7 +1,7 @@
-From c32229e3f82c00abb2bee4d0f7ddf33d4c7a04dc Mon Sep 17 00:00:00 2001
+From 9959fe252cceca7005b63e3313f7f95114f1f93c Mon Sep 17 00:00:00 2001
 From: Alexei Sorokin <sor.alexei@meowr.ru>
 Date: Sun, 27 Nov 2022 18:36:26 +0300
-Subject: [PATCH 14/22] lenovo/x230: fix the data.vbt path for the EDP variant
+Subject: [PATCH 14/30] lenovo/x230: fix the data.vbt path for the EDP variant
 
 ---
  src/mainboard/lenovo/x230/Kconfig | 2 +-
diff --git a/config/coreboot/default/patches/0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/default/patches/0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
index 6a293287..a71324db 100644
--- a/config/coreboot/default/patches/0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ b/config/coreboot/default/patches/0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -1,7 +1,7 @@
-From 38c76afbea4abfed2976bfbe10977e41f21665b0 Mon Sep 17 00:00:00 2001
+From 158b79e6057e071d039619f617c112d31fb13f64 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 15/22] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 15/30] util/ifdtool: add --nuke flag (all 0xFF on region)
 
 When this option is used, the region's contents are overwritten
 with all ones (0xFF).
@@ -16,91 +16,91 @@ Rebased since the last revision update in lbmk.
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
- util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
- 1 file changed, 83 insertions(+), 31 deletions(-)
+ util/ifdtool/ifdtool.c | 112 +++++++++++++++++++++++++++++------------
+ 1 file changed, 81 insertions(+), 31 deletions(-)
 
 diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index ddbc0fb91b..7af9235ae3 100644
+index 191b3216de..38132b4a28 100644
 --- a/util/ifdtool/ifdtool.c
 +++ b/util/ifdtool/ifdtool.c
-@@ -1847,6 +1847,7 @@ static void print_usage(const char *name)
+@@ -1942,6 +1942,7 @@ static void print_usage(const char *name)
+ 	       "                                         tgl    - Tiger Lake\n"
  	       "                                         wbg    - Wellsburg\n"
  	       "   -S | --setpchstrap                    Write a PCH strap\n"
- 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
 +	       "   -N | --nuke <region>                  Overwrite the specified region with 0xFF (all ones)\n"
+ 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
  	       "   -v | --version:                       print the version\n"
  	       "   -h | --help:                          print this help\n\n"
- 	       "<region> is one of Descriptor, BIOS, ME, GbE, Platform Data, Secondary BIOS, "
-@@ -1854,6 +1855,60 @@ static void print_usage(const char *name)
+@@ -1950,6 +1951,60 @@ static void print_usage(const char *name)
  	       "\n");
  }
  
 +static int
 +get_region_type_string(const char *region_type_string)
 +{
-+	if (!strcasecmp("Descriptor", region_type_string))
-+		return 0;
-+	else if (!strcasecmp("BIOS", region_type_string))
-+		return 1;
-+	else if (!strcasecmp("ME", region_type_string))
-+		return 2;
-+	else if (!strcasecmp("GbE", region_type_string))
-+		return 3;
-+	else if (!strcasecmp("Platform Data", region_type_string))
-+		return 4;
-+	else if (!strcasecmp("Device Exp1", region_type_string))
-+		return 5;
-+	else if (!strcasecmp("Secondary BIOS", region_type_string))
-+		return 6;
-+	else if (!strcasecmp("Reserved", region_type_string))
-+		return 7;
-+	else if (!strcasecmp("EC", region_type_string))
-+		return 8;
-+	else if (!strcasecmp("Device Exp2", region_type_string))
-+		return 9;
-+	else if (!strcasecmp("IE", region_type_string))
-+		return 10;
-+	else if (!strcasecmp("10GbE_0", region_type_string))
-+		return 11;
-+	else if (!strcasecmp("10GbE_1", region_type_string))
-+		return 12;
-+	else if (!strcasecmp("PTT", region_type_string))
-+		return 15;
-+	return -1;
++       if (!strcasecmp("Descriptor", region_type_string))
++               return 0;
++       else if (!strcasecmp("BIOS", region_type_string))
++               return 1;
++       else if (!strcasecmp("ME", region_type_string))
++               return 2;
++       else if (!strcasecmp("GbE", region_type_string))
++               return 3;
++       else if (!strcasecmp("Platform Data", region_type_string))
++               return 4;
++       else if (!strcasecmp("Device Exp1", region_type_string))
++               return 5;
++       else if (!strcasecmp("Secondary BIOS", region_type_string))
++               return 6;
++       else if (!strcasecmp("Reserved", region_type_string))
++               return 7;
++       else if (!strcasecmp("EC", region_type_string))
++               return 8;
++       else if (!strcasecmp("Device Exp2", region_type_string))
++               return 9;
++       else if (!strcasecmp("IE", region_type_string))
++               return 10;
++       else if (!strcasecmp("10GbE_0", region_type_string))
++               return 11;
++       else if (!strcasecmp("10GbE_1", region_type_string))
++               return 12;
++       else if (!strcasecmp("PTT", region_type_string))
++               return 15;
++       return -1;
 +}
 +
 +static void
 +nuke(const char *filename, char *image, int size, int region_type)
 +{
-+	int i;
-+	struct region region;
-+	const struct frba *frba = find_frba(image, size);
-+	if (!frba)
-+		exit(EXIT_FAILURE);
++       int i;
++       struct region region;
++       const struct frba *frba = find_frba(image, size);
++       if (!frba)
++               exit(EXIT_FAILURE);
 +
-+	region = get_region(frba, region_type);
-+	if (region.size > 0) {
-+		for (i = region.base; i <= region.limit; i++) {
-+			if ((i + 1) > (size))
-+				break;
-+			image[i] = 0xFF;
-+		}
-+		write_image(filename, image, size);
-+	}
++       region = get_region(frba, region_type);
++       if (region.size > 0) {
++               for (i = region.base; i <= region.limit; i++) {
++                       if ((i + 1) > (size))
++                               break;
++                       image[i] = 0xFF;
++               }
++               write_image(filename, image, size);
++       }
 +}
 +
  int main(int argc, char *argv[])
  {
  	int opt, option_index = 0;
-@@ -1861,6 +1916,7 @@ int main(int argc, char *argv[])
+@@ -1957,6 +2012,7 @@ int main(int argc, char *argv[])
  	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
  	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
  	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
 +	int mode_nuke = 0;
+ 	int mode_gpr0_disable = 0;
  	char *region_type_string = NULL, *region_fname = NULL;
  	const char *layout_fname = NULL;
- 	char *new_filename = NULL;
-@@ -1892,6 +1948,7 @@ int main(int argc, char *argv[])
+@@ -1990,6 +2046,7 @@ int main(int argc, char *argv[])
  		{"validate", 0, NULL, 't'},
  		{"setpchstrap", 1, NULL, 'S'},
  		{"newvalue", 1, NULL, 'V'},
@@ -108,7 +108,7 @@ index ddbc0fb91b..7af9235ae3 100644
  		{0, 0, 0, 0}
  	};
  
-@@ -1941,35 +1998,8 @@ int main(int argc, char *argv[])
+@@ -2039,35 +2096,8 @@ int main(int argc, char *argv[])
  			region_fname++;
  			// Descriptor, BIOS, ME, GbE, Platform
  			// valid type?
@@ -141,12 +141,12 @@ index ddbc0fb91b..7af9235ae3 100644
 -			else if (!strcasecmp("PTT", region_type_string))
 -				region_type = 15;
 -			if (region_type == -1) {
-+			if ((region_type =
-+			    get_region_type_string(region_type_string)) == -1) {
++                       if ((region_type =
++                           get_region_type_string(region_type_string)) == -1) {
  				fprintf(stderr, "No such region type: '%s'\n\n",
  					region_type_string);
  				fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
-@@ -2135,6 +2165,22 @@ int main(int argc, char *argv[])
+@@ -2236,6 +2266,22 @@ int main(int argc, char *argv[])
  		case 't':
  			mode_validate = 1;
  			break;
@@ -169,31 +169,29 @@ index ddbc0fb91b..7af9235ae3 100644
  		case 'v':
  			print_version();
  			exit(EXIT_SUCCESS);
-@@ -2150,7 +2196,8 @@ int main(int argc, char *argv[])
- 
+@@ -2252,7 +2298,7 @@ int main(int argc, char *argv[])
  	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
  			mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
--			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate) > 1) {
-+			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
-+			mode_nuke) > 1) {
+ 			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
+-			mode_gpr0_disable) > 1) {
++			mode_gpr0_disable + mode_nuke) > 1) {
  		fprintf(stderr, "You may not specify more than one mode.\n\n");
  		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
  		exit(EXIT_FAILURE);
-@@ -2158,7 +2205,8 @@ int main(int argc, char *argv[])
- 
+@@ -2261,7 +2307,7 @@ int main(int argc, char *argv[])
  	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
  			mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
--			mode_locked + mode_unlocked + mode_density + mode_altmedisable + mode_validate) == 0) {
-+			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
-+			mode_validate + mode_nuke) == 0) {
+ 			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
+-			mode_validate + mode_gpr0_disable) == 0) {
++			mode_validate + mode_gpr0_disable + mode_nuke) == 0) {
  		fprintf(stderr, "You need to specify a mode.\n\n");
  		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
  		exit(EXIT_FAILURE);
-@@ -2262,6 +2310,10 @@ int main(int argc, char *argv[])
+@@ -2368,6 +2414,10 @@ int main(int argc, char *argv[])
  		write_image(new_filename, image, size);
  	}
  
-+	if (mode_nuke) {
++       if (mode_nuke) {
 +               nuke(new_filename, image, size, region_type);
 +       }
 +
diff --git a/config/coreboot/default/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch b/config/coreboot/default/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
index 0f9b192d..279fdad1 100644
--- a/config/coreboot/default/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
+++ b/config/coreboot/default/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
@@ -1,7 +1,7 @@
-From 3ec06fa2393995b87af1dbc0387c5d3255d5c0db Mon Sep 17 00:00:00 2001
+From bb83e857a2e7b6ecb7cb476ba65019b14e68dc34 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Wed, 1 Dec 2021 02:53:00 +0000
-Subject: [PATCH 16/22] fix speedstep on x200/t400: Revert
+Subject: [PATCH 16/30] fix speedstep on x200/t400: Revert
  "cpu/intel/model_1067x: enable PECI"
 
 This reverts commit 70fea013c7ebd6d85a7806748233fcfd76802f5f.
diff --git a/config/coreboot/default/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch b/config/coreboot/default/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
index 4d7b3421..4e5f5089 100644
--- a/config/coreboot/default/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
+++ b/config/coreboot/default/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
@@ -1,7 +1,7 @@
-From fdde15b69bd5c8bf54339adf3581a32fa992a503 Mon Sep 17 00:00:00 2001
+From 8a94f38398b8fa554fa4ae53ecb88a372df634fd Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 17 Apr 2023 15:49:57 +0100
-Subject: [PATCH 17/22] GM45-type CPUs: don't enable alternative SMRR
+Subject: [PATCH 17/30] GM45-type CPUs: don't enable alternative SMRR
 
 This reverts the changes in coreboot revision:
 df7aecd92643d207feaf7fd840f8835097346644
diff --git a/config/coreboot/default/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch b/config/coreboot/default/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
index 04f3bd63..bfc9231a 100644
--- a/config/coreboot/default/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
+++ b/config/coreboot/default/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
@@ -1,7 +1,7 @@
-From a65797a9e7e610b1c916cb4d275b72848622c218 Mon Sep 17 00:00:00 2001
+From 2b899f40ce5d728faa7c1da23c3348435b7ac9cb Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sat, 6 May 2023 15:53:41 -0600
-Subject: [PATCH 18/22] mb/dell/e6400: Enable 01.0 device in devicetree for
+Subject: [PATCH 18/30] mb/dell/e6400: Enable 01.0 device in devicetree for
  dGPU models
 
 Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
diff --git a/config/coreboot/default/patches/0019-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/default/patches/0019-Remove-warning-for-coreboot-images-built-without-a-p.patch
index 3f21ad02..090f2629 100644
--- a/config/coreboot/default/patches/0019-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ b/config/coreboot/default/patches/0019-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -1,7 +1,7 @@
-From 7d5452bc3358cf82eea48fde312494bcb4ca8101 Mon Sep 17 00:00:00 2001
+From 2ccd3e71730004c3ffbed178087cb778c170079e Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 19/22] Remove warning for coreboot images built without a
+Subject: [PATCH 19/30] Remove warning for coreboot images built without a
  payload
 
 I added this in upstream to prevent people from accidentally flashing
@@ -9,19 +9,19 @@ roms without a payload resulting in a no boot situation, but in
 libreboot lbmk handles the payload and thus this warning always comes
 up. This has caused confusion and concern so just patch it out.
 ---
- payloads/Makefile.inc | 13 +------------
+ payloads/Makefile.mk | 13 +------------
  1 file changed, 1 insertion(+), 12 deletions(-)
 
-diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc
-index e735443a76..4f1692a873 100644
---- a/payloads/Makefile.inc
-+++ b/payloads/Makefile.inc
+diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
+index a2336aa876..4f1692a873 100644
+--- a/payloads/Makefile.mk
++++ b/payloads/Makefile.mk
 @@ -49,16 +49,5 @@ distclean-payloads:
  print-repo-info-payloads:
  	-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
  
 -ifeq ($(CONFIG_PAYLOAD_NONE),y)
--files_added:: warn_no_payload
+-show_notices:: warn_no_payload
 -endif
 -
 -warn_no_payload:
diff --git a/config/coreboot/default/patches/0020-ec-dell-mec5035-Add-command-to-enable-disable-radios.patch b/config/coreboot/default/patches/0020-ec-dell-mec5035-Add-command-to-enable-disable-radios.patch
deleted file mode 100644
index 2f2cddfe..00000000
--- a/config/coreboot/default/patches/0020-ec-dell-mec5035-Add-command-to-enable-disable-radios.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From f0db13a15c76c2947eec8919fd121450048914ce Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sun, 27 Aug 2023 17:36:36 -0600
-Subject: [PATCH 20/22] ec/dell/mec5035: Add command to enable/disable radios
-
-These were determined by sniffing the LPC bus while toggling the
-hardware wireless switch on the Latitude E6400. To differentiate devices
-options in the vendor BIOS to change which radios the switch controlled
-were used.
-
-Change-Id: I173dc197d63cda232dd7ede0cb798ab0a364482b
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/ec/dell/mec5035/mec5035.c | 9 +++++++++
- src/ec/dell/mec5035/mec5035.h | 8 ++++++++
- 2 files changed, 17 insertions(+)
-
-diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
-index 8da11e5b1c..e0335a4635 100644
---- a/src/ec/dell/mec5035/mec5035.c
-+++ b/src/ec/dell/mec5035/mec5035.c
-@@ -84,6 +84,15 @@ u8 mec5035_mouse_touchpad(u8 setting)
- 	return buf[0];
- }
- 
-+void mec5035_radio_enable(enum mec5035_radio_dev dev, u8 on)
-+{
-+	/* From LPC traces and userspace testing with other values,
-+	   the second byte has to be 2 for an unknown reason. */
-+	u8 buf[3] = {dev, 2, on};
-+	write_mailbox_regs(buf, 2, 3);
-+	ec_command(CMD_RADIO_EN);
-+}
-+
- void mec5035_early_init(void)
- {
- 	/* If this isn't sent the EC shuts down the system after about 15
-diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
-index e7a05b64d4..16512e2cc2 100644
---- a/src/ec/dell/mec5035/mec5035.h
-+++ b/src/ec/dell/mec5035/mec5035.h
-@@ -16,8 +16,16 @@
- 
- #define CMD_CPU_OK	0xc2
- 
-+#define CMD_RADIO_EN	0x2b
-+enum mec5035_radio_dev {
-+	RADIO_WLAN = 0,
-+	RADIO_WWAN = 1,
-+	RADIO_WPAN = 2,
-+};
-+
- u8 mec5035_mouse_touchpad(u8 setting);
- void mec5035_cpu_ok(void);
- void mec5035_early_init(void);
-+void mec5035_radio_enable(enum mec5035_radio_dev device, u8 on);
- 
- #endif /* _EC_DELL_MEC5035_H_ */
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch b/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch
similarity index 89%
rename from config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch
rename to config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch
index 586992c9..c182ce8c 100644
--- a/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch
+++ b/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch
@@ -1,14 +1,14 @@
-From b37175381a32d9d308b5c1d67e11cdc57a24c820 Mon Sep 17 00:00:00 2001
+From a49df0307455d6d8b7a9efb9f4639b72be1b64d4 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sat, 19 Aug 2023 16:19:10 -0600
-Subject: [PATCH] mb/dell: Add Latitude E6430 (Ivy Bridge)
+Subject: [PATCH 20/30] mb/dell: Add Latitude E6430 (Ivy Bridge)
 
-Mainboard is QAL80/LA-7781P (UMA). The dGPU model was not tested.
-This is based on the autoport output with some manual tweaks. The flash
-is 8MiB + 4MiB, and is fairly easily accessed by removing the keyboard.
-It can also be internally flashed by sending a command to the EC, which
+Mainboard is QAL80/LA-7781P (UMA). The dGPU model was not tested. This
+is based on the autoport output with some manual tweaks. The flash is
+8MiB + 4MiB, and is fairly easily accessed by removing the keyboard. It
+can also be internally flashed by sending a command to the EC, which
 causes the EC to pull the FDO pin low and the firmware to skip setting
-up any chipset based write protections. [1] The EC is the SMSC MEC5055,
+up any chipset based write protections [1]. The EC is the SMSC MEC5055,
 which seems to be compatible with the existing MEC5035 code.
 
 Working:
@@ -24,27 +24,29 @@ Working:
 - mPCIe WiFi
 - SeaBIOS 1.16.2
 - edk2 (MrChromebox' fork, uefipayload_202306)
-- Internal flashing
+- Internal flashing using dell-flash-unlock
 
 Not working:
-- S3 suspend: It seems like the EC also controls the DRAM reset gate so
-  there may be a command that needs to be implemented for this
-- Physical Wireless switch
-- Battery reporting
-- Brightness hotkeys
+- S3 suspend: Possibly EC related
+- Physical wireless switch - this triggers an SMI handler in the vendor
+  firmware which sends commands to the EC to enable/disable wireless
+  devices
+- Battery reporting - needs ACPI code for the EC
+- Brightness hotkeys - probably EC related
 
 Unknown/untested:
 - Dock
 - eSATA
 - TPM
 - dGPU on non-UMA model
+- Bluetooth module (not included on my system)
 
-[1] https://github.com/nic3-14159/e6400-flash-unlock
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
 
 Change-Id: I93c6622fc5da1d0d61a5b2c197ac7227d9525908
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
 ---
- src/mainboard/dell/e6430/Kconfig           |  37 ++++
+ src/mainboard/dell/e6430/Kconfig           |  44 +++++
  src/mainboard/dell/e6430/Kconfig.name      |   2 +
  src/mainboard/dell/e6430/Makefile.inc      |   6 +
  src/mainboard/dell/e6430/acpi/ec.asl       |   9 +
@@ -55,14 +57,14 @@ Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
  src/mainboard/dell/e6430/cmos.default      |   9 +
  src/mainboard/dell/e6430/cmos.layout       |  88 ++++++++++
  src/mainboard/dell/e6430/data.vbt          | Bin 0 -> 6144 bytes
- src/mainboard/dell/e6430/devicetree.cb     |  68 ++++++++
+ src/mainboard/dell/e6430/devicetree.cb     |  70 ++++++++
  src/mainboard/dell/e6430/dsdt.asl          |  30 ++++
- src/mainboard/dell/e6430/early_init.c      |  38 ++++
+ src/mainboard/dell/e6430/early_init.c      |  32 ++++
  src/mainboard/dell/e6430/gma-mainboard.ads |  20 +++
  src/mainboard/dell/e6430/gpio.c            | 192 +++++++++++++++++++++
  src/mainboard/dell/e6430/hda_verb.c        |  33 ++++
  src/mainboard/dell/e6430/mainboard.c       |  21 +++
- 18 files changed, 590 insertions(+)
+ 18 files changed, 593 insertions(+)
  create mode 100644 src/mainboard/dell/e6430/Kconfig
  create mode 100644 src/mainboard/dell/e6430/Kconfig.name
  create mode 100644 src/mainboard/dell/e6430/Makefile.inc
@@ -84,10 +86,10 @@ Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
 
 diff --git a/src/mainboard/dell/e6430/Kconfig b/src/mainboard/dell/e6430/Kconfig
 new file mode 100644
-index 0000000000..ea691aeb4e
+index 0000000000..e4c799803e
 --- /dev/null
 +++ b/src/mainboard/dell/e6430/Kconfig
-@@ -0,0 +1,37 @@
+@@ -0,0 +1,44 @@
 +if BOARD_DELL_LATITUDE_E6430
 +
 +config BOARD_SPECIFIC_OPTIONS
@@ -110,20 +112,27 @@ index 0000000000..ea691aeb4e
 +	select SYSTEM_TYPE_LAPTOP
 +	select USE_NATIVE_RAMINIT
 +
++config DRAM_RESET_GATE_GPIO
++	default 60
++
 +config MAINBOARD_DIR
 +	default "dell/e6430"
 +
 +config MAINBOARD_PART_NUMBER
 +	default "Latitude E6430"
 +
-+config VGA_BIOS_ID
-+	default "8086,0166"
++config PS2K_EISAID
++	default "DLLK0534"
 +
-+config DRAM_RESET_GATE_GPIO
-+	default 60
++config PS2M_EISAID
++	default "DLL0534"
 +
 +config USBDEBUG_HCD_INDEX
 +	default 2
++
++config VGA_BIOS_ID
++	default "8086,0166"
++
 +endif
 diff --git a/src/mainboard/dell/e6430/Kconfig.name b/src/mainboard/dell/e6430/Kconfig.name
 new file mode 100644
@@ -238,7 +247,7 @@ index 0000000000..2a5b30f2b7
 +me_state=Normal
 diff --git a/src/mainboard/dell/e6430/cmos.layout b/src/mainboard/dell/e6430/cmos.layout
 new file mode 100644
-index 0000000000..e85ea4c661
+index 0000000000..1aa7e77bce
 --- /dev/null
 +++ b/src/mainboard/dell/e6430/cmos.layout
 @@ -0,0 +1,88 @@
@@ -269,7 +278,7 @@ index 0000000000..e85ea4c661
 +# coreboot config options: EC
 +412	1	e	1	bluetooth
 +413	1	e	1	wwan
-+415	1	e	1	wlan
++414	1	e	1	wlan
 +
 +# coreboot config options: ME
 +424	1	e	14	me_state
@@ -374,10 +383,10 @@ HcmV?d00001
 
 diff --git a/src/mainboard/dell/e6430/devicetree.cb b/src/mainboard/dell/e6430/devicetree.cb
 new file mode 100644
-index 0000000000..56dd9e5fe2
+index 0000000000..054b01c5ac
 --- /dev/null
 +++ b/src/mainboard/dell/e6430/devicetree.cb
-@@ -0,0 +1,68 @@
+@@ -0,0 +1,70 @@
 +chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
 +	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
 +	register "gpu_cpu_backlight" = "0x00001312"
@@ -392,19 +401,21 @@ index 0000000000..56dd9e5fe2
 +	register "gpu_panel_power_up_delay" = "400"
 +	register "gpu_pch_backlight" = "0x13121312"
 +
++	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
++
 +	device domain 0x0 on
 +		subsystemid 0x1028 0x0534 inherit
 +
-+		device ref host_bridge on end # Host bridge
-+		device ref peg10 off end # PEG
-+		device ref igd on end # iGPU
++		device ref host_bridge on end
++		device ref peg10 off end
++		device ref igd on end
 +
 +		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
 +			register "docking_supported" = "1"
 +			register "gen1_dec" = "0x007c0681"
 +			register "gen2_dec" = "0x005c0921"
 +			register "gen3_dec" = "0x003c07e1"
-+			register "gen4_dec" = "0x007c0901"
++			register "gen4_dec" = "0x00000911" # Ports 0x910/0x911 for EC
 +			register "gpi0_routing" = "2"
 +			register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
 +			register "pcie_port_coalesce" = "1"
@@ -416,33 +427,33 @@ index 0000000000..56dd9e5fe2
 +			register "xhci_overcurrent_mapping" = "0x00000c03"
 +			register "xhci_switchable_ports" = "0x0000000f"
 +
-+			device ref xhci		on end # USB 3.0 Controller
-+			device ref mei1		on end # Management Engine Interface 1
-+			device ref mei2		off end # Management Engine Interface 2
-+			device ref me_ide_r	off end # Management Engine IDE-R
-+			device ref me_kt	on end # Management Engine KT
-+			device ref gbe		on end # Intel Gigabit Ethernet
-+			device ref ehci2	on end # USB2 EHCI #2
-+			device ref hda		on end # High Definition Audio
-+			device ref pcie_rp1	on end # PCIe Port #1
-+			device ref pcie_rp2	on end # PCIe Port #2
-+			device ref pcie_rp3	on end # PCIe Port #3
-+			device ref pcie_rp4	on end # PCIe Port #4
-+			device ref pcie_rp5	off end # PCIe Port #5
-+			device ref pcie_rp6	on end # PCIe Port #6
-+			device ref pcie_rp7	off end # PCIe Port #7
-+			device ref pcie_rp8	off end # PCIe Port #8
-+			device ref ehci1	on end # USB2 EHCI #1
-+			device ref pci_bridge	off end # PCI bridge
-+			device ref lpc		on # LPC bridge
++			device ref xhci		on end
++			device ref mei1		on end
++			device ref mei2		off end
++			device ref me_ide_r	off end
++			device ref me_kt	on end
++			device ref gbe		on end
++			device ref ehci2	on end
++			device ref hda		on end
++			device ref pcie_rp1	on end # WWAN Slot
++			device ref pcie_rp2	on end # SLAN Slot
++			device ref pcie_rp3	on end # ExpressCard
++			device ref pcie_rp4	on end # E-Module (optical bay)
++			device ref pcie_rp5	on end # Extra Half Mini PCIe slot
++			device ref pcie_rp6	on end # SD/MMC Card Reader
++			device ref pcie_rp7	off end
++			device ref pcie_rp8	off end
++			device ref ehci1	on end
++			device ref pci_bridge	off end
++			device ref lpc		on
 +				chip ec/dell/mec5035
 +					device pnp ff.0 on end
 +				end
 +			end
-+			device ref sata1	on end # SATA Controller 1
-+			device ref smbus	on end # SMBus
-+			device ref sata2	off end # SATA Controller 2
-+			device ref thermal	off end # Thermal
++			device ref sata1	on end
++			device ref smbus	on end
++			device ref sata2	off end
++			device ref thermal	off end
 +		end
 +	end
 +end
@@ -484,17 +495,16 @@ index 0000000000..7d13c55b08
 +}
 diff --git a/src/mainboard/dell/e6430/early_init.c b/src/mainboard/dell/e6430/early_init.c
 new file mode 100644
-index 0000000000..7944157f59
+index 0000000000..d882c3d78b
 --- /dev/null
 +++ b/src/mainboard/dell/e6430/early_init.c
-@@ -0,0 +1,38 @@
+@@ -0,0 +1,32 @@
 +/* SPDX-License-Identifier: GPL-2.0-only */
 +
 +
 +#include <bootblock_common.h>
 +#include <device/pci_ops.h>
 +#include <ec/dell/mec5035/mec5035.h>
-+#include <northbridge/intel/sandybridge/raminit_native.h>
 +#include <southbridge/intel/bd82x6x/pch.h>
 +
 +const struct southbridge_usb_port mainboard_usb_ports[] = {
@@ -516,16 +526,11 @@ index 0000000000..7944157f59
 +
 +void bootblock_mainboard_early_init(void)
 +{
-+	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1c0f);
-+	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0000);
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++			| COMB_LPC_EN | COMA_LPC_EN);
 +	mec5035_early_init();
 +}
-+
-+void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-+{
-+	read_spd(&spd[0], 0x50, id_only);
-+	read_spd(&spd[2], 0x52, id_only);
-+}
 diff --git a/src/mainboard/dell/e6430/gma-mainboard.ads b/src/mainboard/dell/e6430/gma-mainboard.ads
 new file mode 100644
 index 0000000000..1310830c8e
@@ -817,5 +822,5 @@ index 0000000000..31e49802fc
 +	.enable_dev = mainboard_enable,
 +};
 -- 
-2.42.0
+2.39.2
 
diff --git a/config/coreboot/default/patches/0023-HACK-Disable-coreboot-related-BL31-features.patch b/config/coreboot/default/patches/0021-HACK-Disable-coreboot-related-BL31-features.patch
similarity index 59%
rename from config/coreboot/default/patches/0023-HACK-Disable-coreboot-related-BL31-features.patch
rename to config/coreboot/default/patches/0021-HACK-Disable-coreboot-related-BL31-features.patch
index d179a05a..40e1ccee 100644
--- a/config/coreboot/default/patches/0023-HACK-Disable-coreboot-related-BL31-features.patch
+++ b/config/coreboot/default/patches/0021-HACK-Disable-coreboot-related-BL31-features.patch
@@ -1,19 +1,19 @@
-From 9f52555eac217623ad2edc72492f9ded6a5b538d Mon Sep 17 00:00:00 2001
+From 70262a5f4bf801814d68f8778ea89b5cd8ef8f9a Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Thu, 22 Jun 2023 16:44:27 +0300
-Subject: [PATCH] HACK: Disable coreboot related BL31 features
+Subject: [PATCH 21/30] HACK: Disable coreboot related BL31 features
 
 I don't know why, but removing this BL31 make argument lets gru-kevin
 power off properly when shut down from Linux. Needs investigation.
 ---
- src/arch/arm64/Makefile.inc | 3 ---
+ src/arch/arm64/Makefile.mk | 3 ---
  1 file changed, 3 deletions(-)
 
-diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc
-index 6b49743633c3..e1982d92cc5c 100644
---- a/src/arch/arm64/Makefile.inc
-+++ b/src/arch/arm64/Makefile.inc
-@@ -158,9 +158,6 @@ BL31_MAKEARGS += LOG_LEVEL=40
+diff --git a/src/arch/arm64/Makefile.mk b/src/arch/arm64/Makefile.mk
+index 538d254ace..18e451d63c 100644
+--- a/src/arch/arm64/Makefile.mk
++++ b/src/arch/arm64/Makefile.mk
+@@ -159,9 +159,6 @@ BL31_MAKEARGS += LOG_LEVEL=40
  # Always enable crash reporting, even on a release build
  BL31_MAKEARGS += CRASH_REPORTING=1
  
@@ -24,5 +24,5 @@ index 6b49743633c3..e1982d92cc5c 100644
  BL31_MAKEARGS += BUILD_PLAT="$(BL31_BUILD)"
  
 -- 
-2.40.1
+2.39.2
 
diff --git a/config/coreboot/default/patches/0021-ec-dell-mec5035-Hook-up-radio-enables-to-option-API.patch b/config/coreboot/default/patches/0021-ec-dell-mec5035-Hook-up-radio-enables-to-option-API.patch
deleted file mode 100644
index d02ad724..00000000
--- a/config/coreboot/default/patches/0021-ec-dell-mec5035-Hook-up-radio-enables-to-option-API.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 4537c365dae010645404fdb5d2d4e5f478dede67 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sun, 27 Aug 2023 19:15:37 -0600
-Subject: [PATCH 21/22] ec/dell/mec5035: Hook up radio enables to option API
-
-Change-Id: I52de5ea3d24b400a93adee7a6207a4439eac61db
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/ec/dell/mec5035/mec5035.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
-index e0335a4635..20a33cc0ad 100644
---- a/src/ec/dell/mec5035/mec5035.c
-+++ b/src/ec/dell/mec5035/mec5035.c
-@@ -4,6 +4,7 @@
- #include <console/console.h>
- #include <device/device.h>
- #include <device/pnp.h>
-+#include <option.h>
- #include <pc80/keyboard.h>
- #include <stdint.h>
- #include "mec5035.h"
-@@ -108,6 +109,10 @@ static void mec5035_init(struct device *dev)
- 	mec5035_mouse_touchpad(TP_PS2_MOUSE);
- 
- 	pc_keyboard_init(NO_AUX_DEVICE);
-+
-+	mec5035_radio_enable(RADIO_WLAN, get_uint_option("wlan", 1));
-+	mec5035_radio_enable(RADIO_WWAN, get_uint_option("wwan", 1));
-+	mec5035_radio_enable(RADIO_WPAN, get_uint_option("bluetooth", 1));
- }
- 
- static struct device_operations ops = {
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0024-don-t-use-github-for-the-acpica-download.patch b/config/coreboot/default/patches/0022-don-t-use-github-for-the-acpica-download.patch
similarity index 89%
rename from config/coreboot/default/patches/0024-don-t-use-github-for-the-acpica-download.patch
rename to config/coreboot/default/patches/0022-don-t-use-github-for-the-acpica-download.patch
index 2c4c9e5f..f66909c6 100644
--- a/config/coreboot/default/patches/0024-don-t-use-github-for-the-acpica-download.patch
+++ b/config/coreboot/default/patches/0022-don-t-use-github-for-the-acpica-download.patch
@@ -1,7 +1,7 @@
-From cddb709fd01e3e93a7879488d0d4024360e1e3d9 Mon Sep 17 00:00:00 2001
+From 536a1dd349f590cbefccac7e7364cafcdaec9600 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 22 Oct 2023 15:02:25 +0100
-Subject: [PATCH 1/1] don't use github for the acpica download
+Subject: [PATCH 22/30] don't use github for the acpica download
 
 i have the tarball from a previous download, and i placed
 it on libreboot rsync, which then got mirrored to princeton.
@@ -22,7 +22,7 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index ebc9fcb49a..a857110b4b 100755
+index 23a5caf2bb..36565a906c 100755
 --- a/util/crossgcc/buildgcc
 +++ b/util/crossgcc/buildgcc
 @@ -72,7 +72,7 @@ MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
diff --git a/config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch b/config/coreboot/default/patches/0023-crank-up-vram-allocation-on-more-intel-boards.patch
similarity index 97%
rename from config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
rename to config/coreboot/default/patches/0023-crank-up-vram-allocation-on-more-intel-boards.patch
index afce453d..7701babf 100644
--- a/config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
+++ b/config/coreboot/default/patches/0023-crank-up-vram-allocation-on-more-intel-boards.patch
@@ -1,7 +1,7 @@
-From 0721e7e984bc83861bce3d47632b717848673749 Mon Sep 17 00:00:00 2001
+From ad812d008d570c1655bff13a9026f39a9efdcbc9 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 31 Oct 2023 18:24:39 +0000
-Subject: [PATCH 1/1] crank up vram allocation on more intel boards
+Subject: [PATCH 23/30] crank up vram allocation on more intel boards
 
 these were added to libreboot, and it's a policy of
 libreboot to max out the vram settings. this was
diff --git a/config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch b/config/coreboot/default/patches/0024-dell-e6430-use-ME-Soft-Temporary-Disable.patch
similarity index 86%
rename from config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch
rename to config/coreboot/default/patches/0024-dell-e6430-use-ME-Soft-Temporary-Disable.patch
index a2f98404..79ee4b6c 100644
--- a/config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch
+++ b/config/coreboot/default/patches/0024-dell-e6430-use-ME-Soft-Temporary-Disable.patch
@@ -1,7 +1,7 @@
-From e712efdaf46a09a107c88a273d9b00effb4d977e Mon Sep 17 00:00:00 2001
+From a9ab864aee1be7a03926443ddc94e4c5012719ba Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 11:41:41 +0000
-Subject: [PATCH 1/1] dell/e6430: use ME Soft Temporary Disable
+Subject: [PATCH 24/30] dell/e6430: use ME Soft Temporary Disable
 
 i overlooked this. it's set on other boards.
 
diff --git a/config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch b/config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
deleted file mode 100644
index cca8901f..00000000
--- a/config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
+++ /dev/null
@@ -1,341 +0,0 @@
-From f1b5b0051718139cf59ad047d42d1360b8452ec5 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 29 Oct 2023 01:18:50 +0000
-Subject: [PATCH 1/1] Revert "Kconfig: Bring HEAP_SIZE to a common, large
- value"
-
-This reverts commit 44a48ce7a46c36df69f7b2cf3552bf10fa5f61b6.
-
-NOTE:
-
-this is done instead of merging:
-https://review.coreboot.org/c/coreboot/+/78623
-
-which is still under review for now
-
-the patch i'm reverting is this one:
-https://review.coreboot.org/c/coreboot/+/78270
-
-this was actually only merged the day before i
-updated coreboot revs in lbmk to the 12 october rev,
-so there's no harm in quickly reverting this for now
-
-however, later on, we will rely on the other patch
----
- src/Kconfig                                   | 3 ++-
- src/cpu/qemu-x86/Kconfig                      | 3 +++
- src/mainboard/sifive/hifive-unleashed/Kconfig | 3 +++
- src/northbridge/amd/pi/Kconfig                | 4 ++++
- src/soc/amd/picasso/Kconfig                   | 4 ++++
- src/soc/amd/stoneyridge/Kconfig               | 4 ++++
- src/soc/cavium/cn81xx/Kconfig                 | 3 +++
- src/soc/intel/alderlake/Kconfig               | 5 +++++
- src/soc/intel/apollolake/Kconfig              | 4 ++++
- src/soc/intel/cannonlake/Kconfig              | 4 ++++
- src/soc/intel/elkhartlake/Kconfig             | 4 ++++
- src/soc/intel/jasperlake/Kconfig              | 4 ++++
- src/soc/intel/meteorlake/Kconfig              | 5 +++++
- src/soc/intel/skylake/Kconfig                 | 4 ++++
- src/soc/intel/tigerlake/Kconfig               | 4 ++++
- src/soc/intel/xeon_sp/Kconfig                 | 4 ++++
- src/soc/intel/xeon_sp/cpx/Kconfig             | 4 ++++
- src/soc/intel/xeon_sp/skx/Kconfig             | 4 ++++
- src/soc/intel/xeon_sp/spr/Kconfig             | 4 ++++
- src/soc/qualcomm/ipq40xx/Kconfig              | 4 ++++
- 20 files changed, 77 insertions(+), 1 deletion(-)
-
-diff --git a/src/Kconfig b/src/Kconfig
-index ae8024089e..1549719dd0 100644
---- a/src/Kconfig
-+++ b/src/Kconfig
-@@ -751,7 +751,8 @@ config RTC
- 
- config HEAP_SIZE
- 	hex
--	default 0x100000
-+	default 0x100000 if FLATTENED_DEVICE_TREE
-+	default 0x4000
- 
- config STACK_SIZE
- 	hex
-diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
-index 0fa999e1ac..f3e2c4cea9 100644
---- a/src/cpu/qemu-x86/Kconfig
-+++ b/src/cpu/qemu-x86/Kconfig
-@@ -35,4 +35,7 @@ config MAX_CPUS
- 	default 32 if SMM_TSEG
- 	default 4
- 
-+config HEAP_SIZE
-+	default 0x8000
-+
- endif
-diff --git a/src/mainboard/sifive/hifive-unleashed/Kconfig b/src/mainboard/sifive/hifive-unleashed/Kconfig
-index 7bc3b0bcbb..7f9300f2a7 100644
---- a/src/mainboard/sifive/hifive-unleashed/Kconfig
-+++ b/src/mainboard/sifive/hifive-unleashed/Kconfig
-@@ -10,6 +10,9 @@ config BOARD_SPECIFIC_OPTIONS
- 	select FLATTENED_DEVICE_TREE
- 	select SPI_SDCARD
- 
-+config HEAP_SIZE
-+	default 0x10000
-+
- config MAINBOARD_DIR
- 	default "sifive/hifive-unleashed"
- 
-diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
-index 4ffe82a15f..4518db149b 100644
---- a/src/northbridge/amd/pi/Kconfig
-+++ b/src/northbridge/amd/pi/Kconfig
-@@ -29,4 +29,8 @@ config HW_MEM_HOLE_SIZEK
- 	hex
- 	default 0x200000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0xc0000
-+
- endif # NORTHBRIDGE_AMD_PI
-diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
-index c33f287067..796fe4eb13 100644
---- a/src/soc/amd/picasso/Kconfig
-+++ b/src/soc/amd/picasso/Kconfig
-@@ -264,6 +264,10 @@ config S3_VGA_ROM_RUN
- 	bool
- 	default n
- 
-+config HEAP_SIZE
-+	hex
-+	default 0xc0000
-+
- config SERIRQ_CONTINUOUS_MODE
- 	bool
- 	default n
-diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
-index 6ff135e6a8..9af7455bae 100644
---- a/src/soc/amd/stoneyridge/Kconfig
-+++ b/src/soc/amd/stoneyridge/Kconfig
-@@ -152,6 +152,10 @@ config S3_VGA_ROM_RUN
- 	bool
- 	default n
- 
-+config HEAP_SIZE
-+	hex
-+	default 0xc0000
-+
- config EHCI_BAR
- 	hex
- 	default 0xfef00000
-diff --git a/src/soc/cavium/cn81xx/Kconfig b/src/soc/cavium/cn81xx/Kconfig
-index 77ca97202b..368581f8f1 100644
---- a/src/soc/cavium/cn81xx/Kconfig
-+++ b/src/soc/cavium/cn81xx/Kconfig
-@@ -30,6 +30,9 @@ config ARCH_ARMV8_EXTENSION
- 	int
- 	default 1
- 
-+config HEAP_SIZE
-+	default 0x10000
-+
- config STACK_SIZE
- 	default 0x2000
- 
-diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
-index 4b960c1d22..82ec8f263e 100644
---- a/src/soc/intel/alderlake/Kconfig
-+++ b/src/soc/intel/alderlake/Kconfig
-@@ -215,6 +215,11 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x400000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000 if BMP_LOGO
-+	default 0x10000
-+
- config GFX_GMA_DEFAULT_MMIO
- 	default 0xaf000000 if MAINBOARD_HAS_EARLY_LIBGFXINIT
- 
-diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
-index 78ec2987ce..bce935d800 100644
---- a/src/soc/intel/apollolake/Kconfig
-+++ b/src/soc/intel/apollolake/Kconfig
-@@ -252,6 +252,10 @@ config IFWI_FILE_NAME
- 	help
- 	  Name of file to store in the IFWI region.
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- config MAX_ROOT_PORTS
- 	int
- 	default 6
-diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
-index a42a3c365b..80237f9810 100644
---- a/src/soc/intel/cannonlake/Kconfig
-+++ b/src/soc/intel/cannonlake/Kconfig
-@@ -160,6 +160,10 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x400000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- config NHLT_DMIC_1CH_16B
- 	bool
- 	depends on ACPI_NHLT
-diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
-index 3361c0ddb9..7f1c767379 100644
---- a/src/soc/intel/elkhartlake/Kconfig
-+++ b/src/soc/intel/elkhartlake/Kconfig
-@@ -104,6 +104,10 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x0
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- config MAX_ROOT_PORTS
- 	int
- 	default 7
-diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
-index 3d84991e09..ff5def3263 100644
---- a/src/soc/intel/jasperlake/Kconfig
-+++ b/src/soc/intel/jasperlake/Kconfig
-@@ -106,6 +106,10 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x400000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- config MAX_ROOT_PORTS
- 	int
- 	default 8
-diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
-index 590e8b80e1..48030a1911 100644
---- a/src/soc/intel/meteorlake/Kconfig
-+++ b/src/soc/intel/meteorlake/Kconfig
-@@ -197,6 +197,11 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x400000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000 if BMP_LOGO
-+	default 0x10000
-+
- # Intel recommends reserving the PCIe TBT root port resources as below:
- # - 42 buses
- # - 194 MiB Non-prefetchable memory
-diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
-index e0df501460..d6a11363ee 100644
---- a/src/soc/intel/skylake/Kconfig
-+++ b/src/soc/intel/skylake/Kconfig
-@@ -151,6 +151,10 @@ config EXCLUDE_NATIVE_SD_INTERFACE
- 	help
- 	  If you set this option to n, will not use native SD controller.
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config IED_REGION_SIZE
- 	hex
- 	default 0x400000
-diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
-index c07a0d8365..0a4b7bfdb8 100644
---- a/src/soc/intel/tigerlake/Kconfig
-+++ b/src/soc/intel/tigerlake/Kconfig
-@@ -152,6 +152,10 @@ config IED_REGION_SIZE
- config INTEL_TME
- 	default n
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x10000
-+
- config MAX_ROOT_PORTS
- 	int
- 	default 24 if SOC_INTEL_TIGERLAKE_PCH_H
-diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
-index e63bee5451..63ced01067 100644
---- a/src/soc/intel/xeon_sp/Kconfig
-+++ b/src/soc/intel/xeon_sp/Kconfig
-@@ -91,6 +91,10 @@ config ECAM_MMCONF_BASE_ADDRESS
- config ECAM_MMCONF_BUS_NUMBER
- 	default 256
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config HPET_MIN_TICKS
- 	hex
- 	default 0x80
-diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig
-index ac166c3038..f54f7716b6 100644
---- a/src/soc/intel/xeon_sp/cpx/Kconfig
-+++ b/src/soc/intel/xeon_sp/cpx/Kconfig
-@@ -71,6 +71,10 @@ config CPU_MICROCODE_CBFS_LEN
- 	hex
- 	default 0x7C00
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config STACK_SIZE
- 	hex
- 	default 0x4000
-diff --git a/src/soc/intel/xeon_sp/skx/Kconfig b/src/soc/intel/xeon_sp/skx/Kconfig
-index 5d843878e1..c2c3d4e2e8 100644
---- a/src/soc/intel/xeon_sp/skx/Kconfig
-+++ b/src/soc/intel/xeon_sp/skx/Kconfig
-@@ -55,6 +55,10 @@ config CPU_MICROCODE_CBFS_LEN
- 	hex
- 	default 0x7C00
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config IED_REGION_SIZE
- 	hex
- 	default 0x400000
-diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig
-index 43b87ade14..b1c4c783b7 100644
---- a/src/soc/intel/xeon_sp/spr/Kconfig
-+++ b/src/soc/intel/xeon_sp/spr/Kconfig
-@@ -79,6 +79,10 @@ config CPU_MICROCODE_CBFS_LEN
- 	hex
- 	default 0x8c00
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config STACK_SIZE
- 	hex
- 	default 0x4000
-diff --git a/src/soc/qualcomm/ipq40xx/Kconfig b/src/soc/qualcomm/ipq40xx/Kconfig
-index 0ce92731c0..0eabb00752 100644
---- a/src/soc/qualcomm/ipq40xx/Kconfig
-+++ b/src/soc/qualcomm/ipq40xx/Kconfig
-@@ -57,4 +57,8 @@ config SBL_UTIL_PATH
- 	help
- 	  Path for utils to combine SBL_ELF and bootblock
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- endif
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch b/config/coreboot/default/patches/0025-use-mirrorservice.org-for-gcc-downloads.patch
similarity index 89%
rename from config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch
rename to config/coreboot/default/patches/0025-use-mirrorservice.org-for-gcc-downloads.patch
index 2e653f83..8275d6c5 100644
--- a/config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch
+++ b/config/coreboot/default/patches/0025-use-mirrorservice.org-for-gcc-downloads.patch
@@ -1,7 +1,7 @@
-From 89c47fad6e97fc6a7113ebbdedfcc42ae2b6fc7f Mon Sep 17 00:00:00 2001
+From 936a8f113772c93d7501e7133159ab4e23436222 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 22:57:08 +0000
-Subject: [PATCH 1/1] use mirrorservice.org for gcc downloads
+Subject: [PATCH 25/30] use mirrorservice.org for gcc downloads
 
 the gnu.org 302 redirect often fails
 
@@ -11,7 +11,7 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 5 insertions(+), 5 deletions(-)
 
 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 87f80ba7f6..b3aad5df7d 100755
+index 36565a906c..4d4ca06113 100755
 --- a/util/crossgcc/buildgcc
 +++ b/util/crossgcc/buildgcc
 @@ -67,11 +67,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
diff --git a/config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch b/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
similarity index 99%
rename from config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
rename to config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
index babaf559..33d743f1 100644
--- a/config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
+++ b/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
@@ -1,7 +1,7 @@
-From 823da59b0bdaeb20d5f22da65e736acaa70b301e Mon Sep 17 00:00:00 2001
+From 973783a989cdcb7b77029e369156c81eefe8cc67 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sat, 19 Aug 2023 16:19:10 -0600
-Subject: [PATCH] mb/dell: Add Latitude E6530 (Ivy Bridge)
+Subject: [PATCH 26/30] mb/dell: Add Latitude E6530 (Ivy Bridge)
 
 Mainboard is QALA0/LA-7761P (UMA). The dGPU model was not tested.  This
 is based on the autoport output with some manual tweaks. The flash is
@@ -788,5 +788,5 @@ index 0000000000..31e49802fc
 +	.enable_dev = mainboard_enable,
 +};
 -- 
-2.42.1
+2.39.2
 
diff --git a/config/coreboot/default/patches/0026-sb-intel-ibexpeak-setup_heci_uma.c-Add-timeouts-when.patch b/config/coreboot/default/patches/0026-sb-intel-ibexpeak-setup_heci_uma.c-Add-timeouts-when.patch
deleted file mode 100644
index 8bca1b0a..00000000
--- a/config/coreboot/default/patches/0026-sb-intel-ibexpeak-setup_heci_uma.c-Add-timeouts-when.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 27bf50138af0c5267581f8cc1f80676fb1836572 Mon Sep 17 00:00:00 2001
-From: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
-Date: Mon, 27 Mar 2017 22:05:16 +0200
-Subject: [PATCH 1/1] sb/intel/ibexpeak/setup_heci_uma.c: Add timeouts when
- waiting for heci
-
-Since until now, the code running on the management engine is:
-- Signed by its manufacturer
-- Proprietary software, without corresponding source code
-It can desirable to run the least ammount possible of such
-code, which is what me_cleaner[1] enables.
-
-It does it by removing partitions of the management engine
-firmwares, however when doing so, the HECI interface might
-not be present anymore.
-
-So it is desirable not to have the RAM initialisation code
-wait forever for the HECI interface to appear.
-
-[1] https://github.com/corna/me_cleaner/
-
-MERGENOTE: Adapted from this patch:
-https://mail.coreboot.org/pipermail/coreboot/2017-March/083798.html
-Author on this version of the patch set to same author as in the
-linked one, with same date set, but the commit message is modified
-to match the new code path. Patch author Denis Carikli, but this
-versions of the patch was rebased from it by Leah Rowe on 29 Oct 2023.
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- src/southbridge/intel/ibexpeak/setup_heci_uma.c | 14 ++++++++------
- 1 file changed, 8 insertions(+), 6 deletions(-)
-
-diff --git a/src/southbridge/intel/ibexpeak/setup_heci_uma.c b/src/southbridge/intel/ibexpeak/setup_heci_uma.c
-index 572e5e7a76..3a68344d97 100644
---- a/src/southbridge/intel/ibexpeak/setup_heci_uma.c
-+++ b/src/southbridge/intel/ibexpeak/setup_heci_uma.c
-@@ -8,28 +8,30 @@
- #include <southbridge/intel/ibexpeak/me.h>
- #include <southbridge/intel/ibexpeak/pch.h>
- #include <types.h>
-+#include <delay.h>
- 
- #define HECIDEV PCI_DEV(0, 0x16, 0)
- 
--/* FIXME: add timeout.  */
- static void wait_heci_ready(void)
- {
--	while (!(read32(DEFAULT_HECIBAR + 0xc) & 8))	// = 0x8000000c
--		;
-+	int i = 1000*1000;
- 
-+	while (i-- && !(read32(DEFAULT_HECIBAR + 0xc) & 8)) /* = 0x8000000c */
-+		udelay(1);
- 	write32((DEFAULT_HECIBAR + 0x4), (read32(DEFAULT_HECIBAR + 0x4) & ~0x10) | 0xc);
- }
- 
--/* FIXME: add timeout.  */
- static void wait_heci_cb_avail(int len)
- {
-+	int i = 1000*1000;
-+
- 	union {
- 		struct mei_csr csr;
- 		u32 raw;
- 	} csr;
- 
--	while (!(read32(DEFAULT_HECIBAR + 0xc) & 8))
--		;
-+	while (i-- && !(read32(DEFAULT_HECIBAR + 0xc) & 8))
-+		udelay(1);
- 
- 	do {
- 		csr.raw = read32(DEFAULT_HECIBAR + 0x4);
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0027-rebase-dell-e6530-to-newer-coreboot-code.patch b/config/coreboot/default/patches/0027-rebase-dell-e6530-to-newer-coreboot-code.patch
new file mode 100644
index 00000000..c5d67ae8
--- /dev/null
+++ b/config/coreboot/default/patches/0027-rebase-dell-e6530-to-newer-coreboot-code.patch
@@ -0,0 +1,145 @@
+From 88652afd52b0a8e0fc8bb1656e59d8ae4796d847 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Thu, 25 Jan 2024 14:30:03 +0000
+Subject: [PATCH 27/30] rebase dell/e6530 to newer coreboot code
+
+i diffed nicholas's current e6430 patch, versus the old one,
+prior to this revision update in lbmk, also cross referencing
+the original e6430 and e6530 patches, diffing them, and the
+result in this patch. most notably, spd data is now defined in
+the devicetree, instead of early_init.c as per:
+
+commit 45e4ab4a660cb7ce312f2d11a153f2d9ef4158da
+Author: Keith Hui <buurin@gmail.com>
+Date:   Sat Jul 22 12:49:05 2023 -0400
+    mb/*: Update SPD mapping for sandybridge boards
+
+This should work fine. Will test after this builds.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/dell/e6530/Kconfig       | 15 +++++++++++----
+ src/mainboard/dell/e6530/cmos.layout   |  2 +-
+ src/mainboard/dell/e6530/devicetree.cb |  8 +++++---
+ src/mainboard/dell/e6530/early_init.c  | 12 +++---------
+ 4 files changed, 20 insertions(+), 17 deletions(-)
+
+diff --git a/src/mainboard/dell/e6530/Kconfig b/src/mainboard/dell/e6530/Kconfig
+index 582adddbd4..a104566890 100644
+--- a/src/mainboard/dell/e6530/Kconfig
++++ b/src/mainboard/dell/e6530/Kconfig
+@@ -20,18 +20,25 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select SYSTEM_TYPE_LAPTOP
+ 	select USE_NATIVE_RAMINIT
+ 
++config DRAM_RESET_GATE_GPIO
++	default 60
++
+ config MAINBOARD_DIR
+ 	default "dell/e6530"
+ 
+ config MAINBOARD_PART_NUMBER
+ 	default "Latitude E6530"
+ 
+-config VGA_BIOS_ID
+-	default "8086,0166"
++config PS2K_EISAID
++	default "DLLK0534"
+ 
+-config DRAM_RESET_GATE_GPIO
+-	default 60
++config PS2M_EISAID
++	default "DLL0534"
+ 
+ config USBDEBUG_HCD_INDEX
+ 	default 2
++
++config VGA_BIOS_ID
++	default "8086,0166"
++
+ endif
+diff --git a/src/mainboard/dell/e6530/cmos.layout b/src/mainboard/dell/e6530/cmos.layout
+index e85ea4c661..1aa7e77bce 100644
+--- a/src/mainboard/dell/e6530/cmos.layout
++++ b/src/mainboard/dell/e6530/cmos.layout
+@@ -25,7 +25,7 @@ entries
+ # coreboot config options: EC
+ 412	1	e	1	bluetooth
+ 413	1	e	1	wwan
+-415	1	e	1	wlan
++414	1	e	1	wlan
+ 
+ # coreboot config options: ME
+ 424	1	e	14	me_state
+diff --git a/src/mainboard/dell/e6530/devicetree.cb b/src/mainboard/dell/e6530/devicetree.cb
+index 96eed178c5..37135bcf0f 100644
+--- a/src/mainboard/dell/e6530/devicetree.cb
++++ b/src/mainboard/dell/e6530/devicetree.cb
+@@ -12,6 +12,8 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
+ 	register "gpu_panel_power_up_delay" = "400"
+ 	register "gpu_pch_backlight" = "0x13121312"
+ 
++	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
++
+ 	device domain 0x0 on
+ 		subsystemid 0x1028 0x0535 inherit
+ 
+@@ -24,7 +26,7 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
+ 			register "gen1_dec" = "0x007c0681"
+ 			register "gen2_dec" = "0x005c0921"
+ 			register "gen3_dec" = "0x003c07e1"
+-			register "gen4_dec" = "0x007c0901"
++			register "gen4_dec" = "0x00000911" # Ports 0x910/0x911 for EC
+ 			register "gpi0_routing" = "2"
+ 			register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
+ 			register "pcie_port_coalesce" = "1"
+@@ -37,7 +39,7 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
+ 			register "xhci_switchable_ports" = "0x0000000f"
+ 
+ 			device ref xhci		on end # USB 3.0 Controller
+-			device ref mei1		off end # Management Engine Interface 1
++			device ref mei1		on end # Management Engine Interface 1
+ 			device ref mei2		off end # Management Engine Interface 2
+ 			device ref me_ide_r	off end # Management Engine IDE-R
+ 			device ref me_kt	on end # Management Engine KT
+@@ -48,7 +50,7 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
+ 			device ref pcie_rp2	on end # PCIe Port #2
+ 			device ref pcie_rp3	on end # PCIe Port #3
+ 			device ref pcie_rp4	on end # PCIe Port #4
+-			device ref pcie_rp5	off end # PCIe Port #5
++			device ref pcie_rp5	on end # PCIe Port #5
+ 			device ref pcie_rp6	on end # PCIe Port #6
+ 			device ref pcie_rp7	off end # PCIe Port #7
+ 			device ref pcie_rp8	off end # PCIe Port #8
+diff --git a/src/mainboard/dell/e6530/early_init.c b/src/mainboard/dell/e6530/early_init.c
+index d57f48e7f1..2b40f6963f 100644
+--- a/src/mainboard/dell/e6530/early_init.c
++++ b/src/mainboard/dell/e6530/early_init.c
+@@ -4,7 +4,6 @@
+ #include <bootblock_common.h>
+ #include <device/pci_ops.h>
+ #include <ec/dell/mec5035/mec5035.h>
+-#include <northbridge/intel/sandybridge/raminit_native.h>
+ #include <southbridge/intel/bd82x6x/pch.h>
+ 
+ const struct southbridge_usb_port mainboard_usb_ports[] = {
+@@ -26,13 +25,8 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
+ 
+ void bootblock_mainboard_early_init(void)
+ {
+-	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1c0f);
+-	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0000);
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++			| COMB_LPC_EN | COMA_LPC_EN);
+ 	mec5035_early_init();
+ }
+-
+-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
+-{
+-	read_spd(&spd[0], 0x50, id_only);
+-	read_spd(&spd[2], 0x52, id_only);
+-}
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0028-dell-e6-30-disable-the-ME-device-in-devicetree.patch b/config/coreboot/default/patches/0028-dell-e6-30-disable-the-ME-device-in-devicetree.patch
new file mode 100644
index 00000000..fa7ab40d
--- /dev/null
+++ b/config/coreboot/default/patches/0028-dell-e6-30-disable-the-ME-device-in-devicetree.patch
@@ -0,0 +1,54 @@
+From 8705b719573d2159adde10af9c6a4d8806b7d27b Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Thu, 25 Jan 2024 14:37:30 +0000
+Subject: [PATCH 28/30] dell/e6*30: disable the ME device in devicetree
+
+we neuter anyway. disabling it in devicetree will prevent linux
+from ever trying to use it or load a driver for it, and thus
+might prevent benign error messages from appearing in dmesg.
+
+this change was suggested by nicholas when asked on irc.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/dell/e6430/devicetree.cb | 4 ++--
+ src/mainboard/dell/e6530/devicetree.cb | 4 ++--
+ 2 files changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/src/mainboard/dell/e6430/devicetree.cb b/src/mainboard/dell/e6430/devicetree.cb
+index 054b01c5ac..2b8574c984 100644
+--- a/src/mainboard/dell/e6430/devicetree.cb
++++ b/src/mainboard/dell/e6430/devicetree.cb
+@@ -39,10 +39,10 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
+ 			register "xhci_switchable_ports" = "0x0000000f"
+ 
+ 			device ref xhci		on end
+-			device ref mei1		on end
++			device ref mei1		off end
+ 			device ref mei2		off end
+ 			device ref me_ide_r	off end
+-			device ref me_kt	on end
++			device ref me_kt	off end
+ 			device ref gbe		on end
+ 			device ref ehci2	on end
+ 			device ref hda		on end
+diff --git a/src/mainboard/dell/e6530/devicetree.cb b/src/mainboard/dell/e6530/devicetree.cb
+index 37135bcf0f..010200bb6d 100644
+--- a/src/mainboard/dell/e6530/devicetree.cb
++++ b/src/mainboard/dell/e6530/devicetree.cb
+@@ -39,10 +39,10 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
+ 			register "xhci_switchable_ports" = "0x0000000f"
+ 
+ 			device ref xhci		on end # USB 3.0 Controller
+-			device ref mei1		on end # Management Engine Interface 1
++			device ref mei1		off end # Management Engine Interface 1
+ 			device ref mei2		off end # Management Engine Interface 2
+ 			device ref me_ide_r	off end # Management Engine IDE-R
+-			device ref me_kt	on end # Management Engine KT
++			device ref me_kt	off end # Management Engine KT
+ 			device ref gbe		on end # Intel Gigabit Ethernet
+ 			device ref ehci2	on end # USB2 EHCI #2
+ 			device ref hda		on end # High Definition Audio
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0034-x220_edp-modification-introduced-similar-to-x230_edp.patch b/config/coreboot/default/patches/0029-x220_edp-modification-introduced-similar-to-x230_edp.patch
similarity index 94%
rename from config/coreboot/default/patches/0034-x220_edp-modification-introduced-similar-to-x230_edp.patch
rename to config/coreboot/default/patches/0029-x220_edp-modification-introduced-similar-to-x230_edp.patch
index 63e5232e..e0d39892 100644
--- a/config/coreboot/default/patches/0034-x220_edp-modification-introduced-similar-to-x230_edp.patch
+++ b/config/coreboot/default/patches/0029-x220_edp-modification-introduced-similar-to-x230_edp.patch
@@ -1,12 +1,12 @@
-From 38b9e571e5b2a7116b06fb9d99bccd8b03450f9a Mon Sep 17 00:00:00 2001
+From f07ed32c36978327709a113967ec40e5ba8d828e Mon Sep 17 00:00:00 2001
 From: risapav <risapav@gmail.com>
 Date: Sun, 17 Dec 2023 16:54:07 +0100
-Subject: [PATCH] x220_edp modification introduced, similar to x230_edp
+Subject: [PATCH 29/30] x220_edp modification introduced, similar to x230_edp
 
 ---
  src/mainboard/lenovo/x220/Kconfig             |  13 ++++++-----
  src/mainboard/lenovo/x220/Kconfig.name        |   3 +++
- src/mainboard/lenovo/x220/Makefile.inc        |   6 +++++
+ src/mainboard/lenovo/x220/Makefile.mk         |   6 +++++
  .../lenovo/x220/variants/x220_edp/data.vbt    | Bin 0 -> 4281 bytes
  .../x220/variants/x220_edp/gma-mainboard.ads  |  21 ++++++++++++++++++
  5 files changed, 38 insertions(+), 5 deletions(-)
@@ -74,10 +74,10 @@ index 988ac4fb55..cd501954e0 100644
 +	
 +config BOARD_LENOVO_X220_EDP
 +	bool "ThinkPad X220 eDP Mod (2K/FHD)"
-diff --git a/src/mainboard/lenovo/x220/Makefile.inc b/src/mainboard/lenovo/x220/Makefile.inc
+diff --git a/src/mainboard/lenovo/x220/Makefile.mk b/src/mainboard/lenovo/x220/Makefile.mk
 index b104bb52a9..052bf17a22 100644
---- a/src/mainboard/lenovo/x220/Makefile.inc
-+++ b/src/mainboard/lenovo/x220/Makefile.inc
+--- a/src/mainboard/lenovo/x220/Makefile.mk
++++ b/src/mainboard/lenovo/x220/Makefile.mk
 @@ -4,6 +4,12 @@ bootblock-y += variants/$(VARIANT_DIR)/gpio.c
  romstage-y += variants/$(VARIANT_DIR)/gpio.c
  romstage-y += variants/$(VARIANT_DIR)/romstage.c
@@ -160,5 +160,5 @@ index 0000000000..f7cf0bc264
 +
 +end GMA.Mainboard;
 -- 
-2.40.1
+2.39.2
 
diff --git a/config/coreboot/default/patches/0036-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch b/config/coreboot/default/patches/0030-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
similarity index 87%
rename from config/coreboot/default/patches/0036-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
rename to config/coreboot/default/patches/0030-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
index 6ce09e6f..e0af8372 100644
--- a/config/coreboot/default/patches/0036-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
+++ b/config/coreboot/default/patches/0030-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
@@ -1,11 +1,36 @@
-From 757b8965ccdd8ecd0eeec33aee3685dd9a33d34e Mon Sep 17 00:00:00 2001
+From 4e0b62e6f0977cf922b1947955538ddca63bb954 Mon Sep 17 00:00:00 2001
 From: Riku Viitanen <riku.viitanen@protonmail.com>
-Date: Sat, 23 Dec 2023 23:09:46 +0200
-Subject: [PATCH] mb/hp: Add Compaq Elite 8300 CMT port
+Date: Sat, 23 Dec 2023 19:02:10 +0200
+Subject: [PATCH 30/30] mb/hp: Add Compaq Elite 8300 CMT port
 
+Based on autoport and Z220 SuperIO code.
+
+With SeaBIOS and Nouveau on Debian, only nomodeset works with GTX 780
+(must use proprietary driver instead).
+
+Tested by xilynx / spot_ on #libreboot:
+- i3-3220, native raminit 2x2GB, M378B5773DH0-CH9 + MT8JTF25664AZ-1G6M1
+- Celeron G1620, native raminit 1x4GB, MT8JTF51264AZ-1G6E1
+- Booting Debian with Linux 6.1.0-16-amd64 via SeaBIOS
+- All SATA ports
+- Audio: internal speaker, headphone and microphone plugs
+- Rebooting
+- S3 suspend and wake
+- libgfxinit: VGA, DisplayPort
+- Ethernet
+- Super I/O: fan speeds stay in control
+- GPU in PEG slot
+
+Untested:
+- EHCI debugging
+- Other PCI/PCIe slots
+- PS/2
+- Serial, parallel ports
+
+Change-Id: Ie6ec60d2f4ee50d5e3fa2847c19fa4cf0ab73363
 Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
 ---
- .../hp/compaq_elite_8300_cmt/Kconfig          |  38 ++++
+ .../hp/compaq_elite_8300_cmt/Kconfig          |  39 ++++
  .../hp/compaq_elite_8300_cmt/Kconfig.name     |   2 +
  .../hp/compaq_elite_8300_cmt/Makefile.inc     |   7 +
  .../hp/compaq_elite_8300_cmt/acpi/ec.asl      |   1 +
@@ -15,14 +40,15 @@ Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
  .../hp/compaq_elite_8300_cmt/board_info.txt   |   5 +
  .../hp/compaq_elite_8300_cmt/cmos.default     |   7 +
  .../hp/compaq_elite_8300_cmt/cmos.layout      |  74 +++++++
+ .../hp/compaq_elite_8300_cmt/data.vbt         | Bin 0 -> 3902 bytes
  .../hp/compaq_elite_8300_cmt/devicetree.cb    | 161 +++++++++++++++
  .../hp/compaq_elite_8300_cmt/dsdt.asl         |  26 +++
- .../hp/compaq_elite_8300_cmt/early_init.c     |  41 ++++
+ .../hp/compaq_elite_8300_cmt/early_init.c     |  31 +++
  .../compaq_elite_8300_cmt/gma-mainboard.ads   |  17 ++
  src/mainboard/hp/compaq_elite_8300_cmt/gpio.c | 191 ++++++++++++++++++
  .../hp/compaq_elite_8300_cmt/hda_verb.c       |  33 +++
  .../hp/compaq_elite_8300_cmt/mainboard.c      |  16 ++
- 17 files changed, 670 insertions(+)
+ 18 files changed, 661 insertions(+)
  create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
  create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name
  create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc
@@ -33,6 +59,7 @@ Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
  create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt
  create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/cmos.default
  create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/data.vbt
  create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
  create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl
  create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
@@ -43,10 +70,10 @@ Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
 
 diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
 new file mode 100644
-index 0000000000..d3a5c3b389
+index 0000000000..d2bfd35dc4
 --- /dev/null
 +++ b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
-@@ -0,0 +1,38 @@
+@@ -0,0 +1,39 @@
 +if BOARD_HP_COMPAQ_ELITE_8300_CMT
 +
 +config BOARD_SPECIFIC_OPTIONS
@@ -56,6 +83,7 @@ index 0000000000..d3a5c3b389
 +	select HAVE_ACPI_TABLES
 +	select HAVE_CMOS_DEFAULT
 +	select HAVE_OPTION_TABLE
++	select INTEL_GMA_HAVE_VBT
 +	select INTEL_INT15
 +	select MAINBOARD_HAS_TPM1
 +	select MAINBOARD_HAS_LIBGFXINIT
@@ -286,6 +314,43 @@ index 0000000000..1fc83b1a55
 +checksums
 +
 +checksum 392 415 984
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/data.vbt b/src/mainboard/hp/compaq_elite_8300_cmt/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..ba627e152b65d779a80529d3811ec4d21c1b1e54
+GIT binary patch
+literal 3902
+zcmdT{U2GIp6h5;vvp;uc+U>N$b}h{<64)*MnJ%?9P1V_-)?HZIZFkwM#K;zQp(Lf0
+z<tLDc9kdaQ30aLnL^K;s2=dhMWTFo|nZ_7XjUmSPK!^{95W@p8ks#}tpO&8zIx!OQ
+zPQE$ko;~;Lz2}~D=XOmtlA-CLNM|A&X^#!0H)V!X1yJCH+Hrg@ZIQ%qdRr`<32%!e
+zhohV5IamQTwRf%o6o9FhLR}l4OH3XpP6S4SG(9$1II_L8yRfU+nK)!=G!;$I@QxkD
+ziDGH&K(Rp6*_Xmpr<F+L;O>b69XhyYd$H6<buRR#UELiUx+zsQbar)jhLo-lr6HwH
+z>Fo<WE0Nehba-<rkql=N!$Wj<l*SV2a5_D(Ig)&trbdV3iAW+d5R-_pl<3~6Bc<KD
+z#t+ayG>9yU(vE~()R;1j?k!Dq(D1|r9o2pI)6wGoV(Cz^&><0>;1cWR7zP*~YL5XE
+z{3`?=k6Yy2an&85Zl2-7jM~D`7^g}MH^6WOPE9askfBLVUBl5fj(Wi%F%Ax(<(|k=
+zUH4c9hXO|5?0UW22lb}G1;Fb@mzSZ8u5fTU59si@;V}EXTQ}(rl%Wn?F&a92X)&+>
+zPTj@>Ls7r4(ffK2={zn6t_hS-cTaC$zZ!`R#y2KYqnT`O>nqx^H{P7_!|gKQVi}A&
+z)G!L9*Z>@59dMlOh4owoes{Vd<dPwV$RfrOM_mMtBi==PggB45i1-TeHR314Rm63~
+z9|&+0AczJ;Ga`TpA^H)6h!kQgqJWr0I1j?@szU?Z5NsM_$vRVlmxGf*(9T-+vzFa+
+z!`K`kmJ}>$kl1)tt1cJZseb2!YSsO`J_8jQ^hAhROmRyl4au@8tDixs`{k^Dwd%=Z
+zH-yjQdy~%q^YKY<!Z~QsaFSLvP<_4(KebAii%moAUIzzXdbGph$OYv=h6VegT-HIX
+zhmBa>th;}v$r!Z-pnAN<1I)+#R``=|huU|*W1ew~tpBFsG0q;_jCFT6Ulxt*TNv8#
+z2{`>`$JM`Jd{F+EzpU7VIlvml?AFW1Xv$0tKyom(Ej2b-oERG0Q?%Jx8HYk6s9{*E
+z_)hegWIm-8PLF`1DpU2QrTKj4;VUElwQBD4f+hZ<s%)PPsp_Q#i!T5@)2taxv1ghG
+z<B&&<DI4jDn$!FOh>Zbggj@JDLYbjpK69X2PaAVr^Xn{6e+%<?63)ABGAHVvOwA0G
+zop-g`)B~42TA5y1<#p#*n`4^oSOPu_>i&oRk>LBlzUQG|c;s(9<VO#^<&i}~RuI}x
+z<RL<GguYJXG9hOOy+q_62>FFjhafiyq*<UbLCy*!FVMFH`LsYj73iEG|16MS1xiG@
+zNhE7UniS<%MKUhZlcHP^$pw+li}F>GTo<V<$!jFiA<>K^@07@tL{CZbd5K(<q}Cgp
+z=D5OWb(o)+1@4lFyO?u`hP=smQS!Cx@SCx8`ItCXGEp|?Se~I$OQ9>*L<3rb71Ew*
+zhn0l-*|a>v(n`=1+Du-&m2f&k|07qiv~u)9FuttfVcu_x;V>QXdsXjZ?db(%oNhK5
+zme#7yVBD-k)j4Zp4ohoWFJ0rv5wpCVNbYROUKoL9Ww31Rg%2ZHHV$2!ik&#T)={qH
+z{mrUEty8JFXPPS;w@^`Y*;z%PU#m>bK7$Oci}}Epjc<@x;b&~*!<k@Zeq?5~lKODv
+zA_EJ8u45$aFet6+Tz;mY_(sgz72qmZ5DkWZn3D#BWHRv7#wxD)p^~C26;X-mqrjL$
+z8S4>Op}BgEe0X$iI{Gx<zTS2<*M4^|Sg17^@EYY@zAl0)<Ta?zd%bn~D02?r)iu%P
+wm+F7xwtgQt<KA_UyAYqlTkT_cS089?Pr=)R7|a9^*a9j1U$>1p1;4R>1E3jwQUCw|
+
+literal 0
+HcmV?d00001
+
 diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
 new file mode 100644
 index 0000000000..f4efabd792
@@ -487,16 +552,15 @@ index 0000000000..e8e2b3a3e5
 +}
 diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c b/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
 new file mode 100644
-index 0000000000..f6b9c0a106
+index 0000000000..99b7891c70
 --- /dev/null
 +++ b/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
-@@ -0,0 +1,41 @@
+@@ -0,0 +1,31 @@
 +/* SPDX-License-Identifier: GPL-2.0-only */
 +
 +#include <bootblock_common.h>
 +#include <superio/nuvoton/npcd378/npcd378.h>
 +#include <superio/nuvoton/common/nuvoton.h>
-+#include <northbridge/intel/sandybridge/raminit_native.h>
 +#include <southbridge/intel/bd82x6x/pch.h>
 +
 +#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2)
@@ -523,15 +587,6 @@ index 0000000000..f6b9c0a106
 +	if (CONFIG(CONSOLE_SERIAL))
 +		nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 +}
-+
-+void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-+{
-+	/* BTX mainboard: Reversed mapping */
-+	read_spd(&spd[3], 0x50, id_only);
-+	read_spd(&spd[2], 0x51, id_only);
-+	read_spd(&spd[1], 0x52, id_only);
-+	read_spd(&spd[0], 0x53, id_only);
-+}
 diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads b/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads
 new file mode 100644
 index 0000000000..686f7d44db
@@ -814,5 +869,5 @@ index 0000000000..8dbd95ef96
 +	.enable_dev = mainboard_enable,
 +};
 -- 
-2.43.0
+2.39.2
 
diff --git a/config/coreboot/default/patches/0035-Add-VBT-for-EliteBook-8460p.patch b/config/coreboot/default/patches/0035-Add-VBT-for-EliteBook-8460p.patch
deleted file mode 100644
index be01bb76..00000000
--- a/config/coreboot/default/patches/0035-Add-VBT-for-EliteBook-8460p.patch
+++ /dev/null
@@ -1,69 +0,0 @@
-From 1811aef1046298c490125e1bfc2be4b9cfb69aca Mon Sep 17 00:00:00 2001
-From: Riku Viitanen <riku.viitanen@protonmail.com>
-Date: Tue, 19 Dec 2023 20:15:44 +0200
-Subject: [PATCH] Add VBT for EliteBook 8460p
-
-Extracted from a running system myself. Also sent upstream, of course:
-https://review.coreboot.org/c/coreboot/+/79625
-
-Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
----
- src/mainboard/hp/snb_ivb_laptops/Kconfig         |   1 +
- .../hp/snb_ivb_laptops/variants/8460p/data.vbt   | Bin 0 -> 3985 bytes
- 2 files changed, 1 insertion(+)
- create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8460p/data.vbt
-
-diff --git a/src/mainboard/hp/snb_ivb_laptops/Kconfig b/src/mainboard/hp/snb_ivb_laptops/Kconfig
-index 2ef8956caf..f0bd55f64f 100644
---- a/src/mainboard/hp/snb_ivb_laptops/Kconfig
-+++ b/src/mainboard/hp/snb_ivb_laptops/Kconfig
-@@ -54,6 +54,7 @@ config BOARD_HP_8460P
- 	select BOARD_HP_SNB_IVB_LAPTOPS_COMMON
- 	select BOARD_ROMSIZE_KB_8192
- 	select GFX_GMA_PANEL_1_ON_LVDS
-+	select INTEL_GMA_HAVE_VBT
- 	select INTEL_INT15
- 	select MAINBOARD_HAS_LIBGFXINIT
- 	select SOUTHBRIDGE_INTEL_BD82X6X
-diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8460p/data.vbt b/src/mainboard/hp/snb_ivb_laptops/variants/8460p/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..61d69494c61c08d93e3404c6f096b098a03d0b3a
-GIT binary patch
-literal 3985
-zcmdT`Z)_A*5TCuhKihY^?R8t=dO$NR1g@o}+XG6eCG7P|X`!^&KQy(0^bfZ{lcTNI
-zR!U;RfsJ5LazsPW5Urmyd_YW0j4?5&iPn%9f{CB_fQdonix^QO0_VKFe}sniA|cA#
-z{NB7bJ3Bk`-pstWvZtXNyZmj9&o*?nG;Z5kxf3x28l2ASqke8{Xld{2Z}fNj`x{!@
-z13T~?SPX-C_iqA(1VL4NTJ5HmkqIO0?JVmW90?sBiVTPL8@O|HXgF+OFwlbjy?c$Y
-z5gD8?LfF-_&5vBA!Wt%r!y#;&JUC=T>M#%<96!+CYz#&wu!jpE*IZfctEygK<<qJ)
-zg|&Bg;l@qtwOU^t;=0x@Y~tVGkTG${Fh<ZHsA>%0Sa@>(15N}+#|}q^_aB%*Z=j4+
-zYFZ_A>(DeA1EZ0#wdfCrv6IV;W2Z50M4mT7YZaz2fJ>re6#xVq<cYc<-19+>1hNFp
-z5_l!BS;4PE2|}X|iUeDA2<gxwL74=t60EdBg#<3JD1yZbP$EI8D`^-41TPa$%*<(I
-zg)a|)E68~WFmp}fEc&?v1tcQ?bW^}of?Oa6z|Q#&O+X7D;6oZ505)O^4wrzbe{nh9
-z(Cp{wo|J${zF3!m=38G=TUW0)G&VJFZw+>K_w@GdjvhVs;<N|uUdY&Gdd{c0f(D=4
-zi=j{S!g0|8r^Q;hD$YWwU4vbAH;fTZ5>7cJxav^h2f`l&Nm60C#9%d{n(z#vnb1kt
-zP1r}6A{-;ULO4U1A)F_CNcfa6OSnq7Mz}$^MYuz-<}k=5*!RHQxFrg-;MAf*lIABU
-zxU6uh45H_f{BtS3DZOwPk2@T2KmLsy;&Ev+|C4^p3bZgnBT?R(leE>Oq8LohyNU7z
-z>`l(&adsIft`jXDf7(aRub?DKP9%dHxj%w!Y&oat7NyaH0v20jeu4Ctslme<Qv5W1
-zd;z%t+9};dtba){)$RiL@u(ugpQ0}}2ZYybeejE|67o(0#oH5WIlNwE-(1sF;CMm{
-zRIDVRA|zOO(X!I?(M@{vC;#qMe&%<oYzBPl=LHCPW@$_@=F-Bq!0t(~9rbfx|Mzbe
-z?;smQvy@2bYN$=;0<<;-`-6icM!0S8ppoTdNi&3sK=;Ec&3&RK;hkG6hqE1^>DpL9
-zf>Zon)ztM4&nmt5Y>LyoMc0Nd`gHwLisSY|%@HxN-g3<m8{dBb8VNBo-)Lkvk1&vn
-zyif#p=qZAjfRK1*K~FvvLT2RQT9(ej6$c~S7EToWKS$ixY?{|i>oRUiCW<wX`;;uy
-z%3cTY_Z(cx)Jn!SGTg(|QN|84e4D8sF!l+<@0t1=WA_-YaH<=eY>N{Or+UcAjymyO
-zr~0vzec{BPo$B9CW|MJ^tZtUsHW?4f>Jgc}EaUsK`kBlw%lNCTigcw>aGj!VrJIz3
-zlZtv=VW$=RNKwC5*tZJ)rKrwawkTIAzh#YDt_#t83NhM9DI(KG^jc(--WFU$ZF#Hd
-zF#0Yh8pG?$UD80Q=^qr+-Y4S$#a_$88fNkks(Y8AH(Hq1U`fVNj}63x229#eAtY?L
-z0T~<Ar9Gh_6lxk4!iEbj01uDJMEue1$I3O-&+En9;ODVy?v*@c^JJxA3OhV5-IY!s
-zo&#nn%~HeMbmJP#+nuc2FJ@uG-1OwxXI2e4vy$`e=Dw1i^BqvEHN}#9;ii?0nSn~C
-zWU~%0tc}eKc#3rmlZA!i!5X7$DpiH3BO5Qg_0gHJiz`S&c{(0!G4sHaXKd5Sc$m+N
-zH_K+ObWE3O!8ewqHHhFeZP4x6Xwb^_*@5Yh=I%)5D|sP;Y-->~^ukd+r@)#T%yXSm
-z2eZ&{(*rX>T%yTZAmc@h^3hz$S~DKz&rM5R)css-rQTba*$WZ!5?)APUpOzybQp+2
-z!GOz^pRs|?du~IPhs{$Xwq_9QZL@SyKA-5fU$aT6@q_%w8CNWVSDR?@TIdG83xW`W
-K3gHa=B>n?bM39pJ
-
-literal 0
-HcmV?d00001
-
--- 
-2.43.0
-
diff --git a/config/coreboot/default/patches/0037-mb-hp-elitebook_820_g2-do-not-set-EC-SLPT-on-S5.patch b/config/coreboot/default/patches/0037-mb-hp-elitebook_820_g2-do-not-set-EC-SLPT-on-S5.patch
deleted file mode 100644
index bc584ffe..00000000
--- a/config/coreboot/default/patches/0037-mb-hp-elitebook_820_g2-do-not-set-EC-SLPT-on-S5.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 6202669b8e8f50837448e2d4c482671abf72f648 Mon Sep 17 00:00:00 2001
-From: Iru Cai <mytbk920423@gmail.com>
-Date: Sun, 5 Nov 2023 17:12:43 +0800
-Subject: [PATCH 1/1] mb/hp/elitebook_820_g2: do not set EC SLPT on S5
-
-Setting EC SLPT bit in S5 will make HP EliteBook 820 G2
-fail to reboot under Linux 6.1 and later kernel versions.
-
-Change-Id: I48f5a35cd78db3b32d9f76cb8e266c738da34e7c
-Signed-off-by: Iru Cai <mytbk920423@gmail.com>
-Reviewed-on: https://review.coreboot.org/c/coreboot/+/78907
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
----
- src/mainboard/hp/elitebook_820_g2/acpi/platform.asl | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
-
-diff --git a/src/mainboard/hp/elitebook_820_g2/acpi/platform.asl b/src/mainboard/hp/elitebook_820_g2/acpi/platform.asl
-index 8023ae826c..d17f575c40 100644
---- a/src/mainboard/hp/elitebook_820_g2/acpi/platform.asl
-+++ b/src/mainboard/hp/elitebook_820_g2/acpi/platform.asl
-@@ -10,5 +10,8 @@ Method(_WAK,1)
- 
- Method(_PTS,1)
- {
--	\_SB.PCI0.LPCB.EC0.SLPT = Arg0
-+	If (Arg0 != 5)
-+	{
-+		\_SB.PCI0.LPCB.EC0.SLPT = Arg0
-+	}
- }
--- 
-2.39.2
-
diff --git a/config/coreboot/default/target.cfg b/config/coreboot/default/target.cfg
index bf29716e..a70633c4 100644
--- a/config/coreboot/default/target.cfg
+++ b/config/coreboot/default/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-rev="d862695f5f432b5c78dada5f16c293a4c3f9fce6"
+rev="b6cbfa977f63d57d5d6b9e9f7c1cef30162f575a"
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 0eafce41..8416f2ef 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -138,6 +139,8 @@ CONFIG_BOARD_DELL_LATITUDE_E6430=y
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="DLLK0534"
+CONFIG_PS2M_EISAID="DLL0534"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,7 +158,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,8 +167,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -174,7 +174,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -188,6 +187,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -218,6 +218,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -227,15 +228,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -284,8 +286,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -346,6 +348,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -381,7 +385,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -392,8 +396,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -424,6 +426,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -437,6 +440,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -475,6 +482,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -503,6 +511,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -566,6 +575,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index 5eb4b7d9..4614c7fd 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_BOARD_DELL_LATITUDE_E6430=y
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="DLLK0534"
+CONFIG_PS2M_EISAID="DLL0534"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,7 +156,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,8 +165,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -172,7 +172,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -186,6 +185,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -216,6 +216,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -225,15 +226,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -282,8 +284,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -344,6 +346,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -377,7 +381,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -388,8 +392,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -420,6 +422,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -433,6 +436,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -472,6 +479,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -500,6 +508,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -563,6 +572,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index 8d183842..f730ef20 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -138,6 +139,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_BOARD_DELL_LATITUDE_E6530=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="DLLK0534"
+CONFIG_PS2M_EISAID="DLL0534"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,7 +158,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,8 +167,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -174,7 +174,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -188,6 +187,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -218,6 +218,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -227,15 +228,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -284,8 +286,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -346,6 +348,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -381,7 +385,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -392,8 +396,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -424,6 +426,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -437,6 +440,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -475,6 +482,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -503,6 +511,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -566,6 +575,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index 01e086ef..9230658a 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_BOARD_DELL_LATITUDE_E6530=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="DLLK0534"
+CONFIG_PS2M_EISAID="DLL0534"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,7 +156,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,8 +165,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -172,7 +172,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -186,6 +185,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -216,6 +216,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -225,15 +226,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -282,8 +284,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -344,6 +346,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -377,7 +381,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -388,8 +392,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -420,6 +422,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -433,6 +436,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -472,6 +479,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -500,6 +508,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -563,6 +572,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/g43t-am3/config/libgfxinit_txtmode b/config/coreboot/g43t-am3/config/libgfxinit_txtmode
index cefcdfdd..3ce6d330 100644
--- a/config/coreboot/g43t-am3/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t-am3/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -131,6 +132,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -145,7 +148,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -155,8 +157,6 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3"
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -165,7 +165,6 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -179,6 +178,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -205,6 +205,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -213,14 +214,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -320,6 +322,8 @@ CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -353,7 +357,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x10000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -364,8 +368,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -398,6 +400,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -411,6 +414,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 CONFIG_DRIVERS_I2C_CK505=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="G45"
@@ -448,6 +455,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -474,6 +482,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -537,6 +546,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode b/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
index a18ae41e..60a4aa7b 100644
--- a/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -131,6 +132,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -145,7 +148,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -155,8 +157,6 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3"
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -165,7 +165,6 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -179,6 +178,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -205,6 +205,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -213,14 +214,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -320,6 +322,8 @@ CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -353,7 +357,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x10000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -364,8 +368,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -398,6 +400,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -411,6 +414,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 CONFIG_DRIVERS_I2C_CK505=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="G45"
@@ -448,6 +455,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -474,6 +482,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -537,6 +546,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode b/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
index 0d80d7ff..5f0fb156 100644
--- a/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
+++ b/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -129,6 +130,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,7 +156,6 @@ CONFIG_BOARD_GIGABYTE_GA_G41M_ES2L=y
 # CONFIG_BOARD_GIGABYTE_GA_H61M_DS2V is not set
 # CONFIG_BOARD_GIGABYTE_GA_H61MA_D3V is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -162,8 +164,6 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="GA-G41M-ES2L"
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -172,7 +172,6 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -186,6 +185,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=1024
@@ -212,6 +212,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -220,17 +221,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -326,6 +328,8 @@ CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -359,7 +363,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x10000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -370,8 +374,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -406,6 +408,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -417,6 +420,10 @@ CONFIG_HAVE_USBDEBUG=y
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="G45"
@@ -454,6 +461,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -481,6 +489,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -544,6 +553,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/gru_bob/config/libgfxinit_corebootfb b/config/coreboot/gru_bob/config/libgfxinit_corebootfb
index 9502be12..3425806c 100644
--- a/config/coreboot/gru_bob/config/libgfxinit_corebootfb
+++ b/config/coreboot/gru_bob/config/libgfxinit_corebootfb
@@ -21,6 +21,7 @@ CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_COMPRESS_PRERAM_STAGES=y
 CONFIG_COMPRESS_BOOTBLOCK=y
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 # CONFIG_COLLECT_TIMESTAMPS is not set
 # CONFIG_USE_BLOBS is not set
@@ -118,6 +119,8 @@ CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=1
 CONFIG_CONSOLE_SERIAL_UART_ADDRESS=0xFF1A0000
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_MEMLAYOUT_LD_FILE="src/soc/rockchip/rk3399/memlayout.ld"
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_WINBOND=y
@@ -148,6 +151,11 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_TRICKY is not set
 # CONFIG_BOARD_GOOGLE_ZAKO is not set
 
+#
+# Brox
+#
+# CONFIG_BOARD_GOOGLE_BROX is not set
+
 #
 # Brya
 #
@@ -183,7 +191,6 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_OSIRIS is not set
 # CONFIG_BOARD_GOOGLE_PIRRHA is not set
 # CONFIG_BOARD_GOOGLE_PRIMUS is not set
-# CONFIG_BOARD_GOOGLE_PRIMUS4ES is not set
 # CONFIG_BOARD_GOOGLE_PUJJO is not set
 # CONFIG_BOARD_GOOGLE_QUANDISO is not set
 # CONFIG_BOARD_GOOGLE_REDRIX is not set
@@ -202,6 +209,8 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_ZYDRON is not set
 # CONFIG_BOARD_GOOGLE_NOKRIS is not set
 # CONFIG_BOARD_GOOGLE_DOCHI is not set
+# CONFIG_BOARD_GOOGLE_ANRAGGAR is not set
+# CONFIG_BOARD_GOOGLE_XOL is not set
 
 #
 # Butterfly
@@ -229,6 +238,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_KRABBY is not set
 # CONFIG_BOARD_GOOGLE_TENTACRUEL is not set
 # CONFIG_BOARD_GOOGLE_MAGIKARP is not set
+# CONFIG_BOARD_GOOGLE_CHINCHOU is not set
 
 #
 # Staryu
@@ -288,6 +298,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_TARANZA is not set
 # CONFIG_BOARD_GOOGLE_BOXY is not set
 # CONFIG_BOARD_GOOGLE_DEXI is not set
+# CONFIG_BOARD_GOOGLE_DITA is not set
 
 #
 # Drallion
@@ -320,6 +331,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # Geralt
 #
 # CONFIG_BOARD_GOOGLE_GERALT is not set
+# CONFIG_BOARD_GOOGLE_CIRI is not set
 
 #
 # Glados
@@ -345,9 +357,9 @@ CONFIG_BOARD_GOOGLE_BOB=y
 #
 # Guybrush
 #
+# CONFIG_BOARD_GOOGLE_DEWATT is not set
 # CONFIG_BOARD_GOOGLE_GUYBRUSH is not set
 # CONFIG_BOARD_GOOGLE_NIPPERKIN is not set
-# CONFIG_BOARD_GOOGLE_DEWATT is not set
 
 #
 # Hatch
@@ -367,10 +379,15 @@ CONFIG_BOARD_GOOGLE_BOB=y
 #
 # Herobrine
 #
-
-#
-# (Herobrine requires 'Allow QC blobs repository')
-#
+# CONFIG_BOARD_GOOGLE_HEROBRINE is not set
+# CONFIG_BOARD_GOOGLE_HEROBRINE_REV0 is not set
+# CONFIG_BOARD_GOOGLE_SENOR is not set
+# CONFIG_BOARD_GOOGLE_PIGLIN is not set
+# CONFIG_BOARD_GOOGLE_HOGLIN is not set
+# CONFIG_BOARD_GOOGLE_VILLAGER is not set
+# CONFIG_BOARD_GOOGLE_EVOKER is not set
+# CONFIG_BOARD_GOOGLE_ZOGLIN is not set
+# CONFIG_BOARD_GOOGLE_ZOMBIE is not set
 
 #
 # Jecht
@@ -551,6 +568,8 @@ CONFIG_BOARD_GOOGLE_BOB=y
 # CONFIG_BOARD_GOOGLE_REX_EC_ISH is not set
 # CONFIG_BOARD_GOOGLE_OVIS is not set
 # CONFIG_BOARD_GOOGLE_OVIS4ES is not set
+# CONFIG_BOARD_GOOGLE_DEKU is not set
+# CONFIG_BOARD_GOOGLE_DEKU4ES is not set
 # CONFIG_BOARD_GOOGLE_REX4ES is not set
 # CONFIG_BOARD_GOOGLE_REX4ES_EC_ISH is not set
 
@@ -563,11 +582,11 @@ CONFIG_BOARD_GOOGLE_BOB=y
 #
 # Skyrim
 #
+# CONFIG_BOARD_GOOGLE_CRYSTALDRIFT is not set
+# CONFIG_BOARD_GOOGLE_FROSTFLOW is not set
+# CONFIG_BOARD_GOOGLE_MARKARTH is not set
 # CONFIG_BOARD_GOOGLE_SKYRIM is not set
 # CONFIG_BOARD_GOOGLE_WINTERHOLD is not set
-# CONFIG_BOARD_GOOGLE_FROSTFLOW is not set
-# CONFIG_BOARD_GOOGLE_CRYSTALDRIFT is not set
-# CONFIG_BOARD_GOOGLE_MARKARTH is not set
 
 #
 # Slippy
@@ -595,10 +614,19 @@ CONFIG_BOARD_GOOGLE_BOB=y
 #
 # Trogdor
 #
-
-#
-# (Trogdor requires 'Allow QC blobs repository')
-#
+# CONFIG_BOARD_GOOGLE_BUBS is not set
+# CONFIG_BOARD_GOOGLE_COACHZ is not set
+# CONFIG_BOARD_GOOGLE_GELARSHIE is not set
+# CONFIG_BOARD_GOOGLE_HOMESTAR is not set
+# CONFIG_BOARD_GOOGLE_KINGOFTOWN is not set
+# CONFIG_BOARD_GOOGLE_LAZOR is not set
+# CONFIG_BOARD_GOOGLE_MARZIPAN is not set
+# CONFIG_BOARD_GOOGLE_MRBLAND is not set
+# CONFIG_BOARD_GOOGLE_PAZQUEL is not set
+# CONFIG_BOARD_GOOGLE_POMPOM is not set
+# CONFIG_BOARD_GOOGLE_QUACKINGSTICK is not set
+# CONFIG_BOARD_GOOGLE_WORMDINGLER is not set
+# CONFIG_BOARD_GOOGLE_TROGDOR is not set
 
 #
 # Veyron
@@ -645,22 +673,21 @@ CONFIG_BOARD_GOOGLE_BOB=y
 #
 # Zork
 #
-# CONFIG_BOARD_GOOGLE_DALBOZ is not set
-# CONFIG_BOARD_GOOGLE_VILBOZ is not set
-# CONFIG_BOARD_GOOGLE_EZKINIL is not set
-# CONFIG_BOARD_GOOGLE_MORPHIUS is not set
-# CONFIG_BOARD_GOOGLE_TREMBYLE is not set
 # CONFIG_BOARD_GOOGLE_BERKNIP is not set
-# CONFIG_BOARD_GOOGLE_WOOMAX is not set
+# CONFIG_BOARD_GOOGLE_DALBOZ is not set
 # CONFIG_BOARD_GOOGLE_DIRINBOZ is not set
-# CONFIG_BOARD_GOOGLE_SHUBOZ is not set
+# CONFIG_BOARD_GOOGLE_EZKINIL is not set
 # CONFIG_BOARD_GOOGLE_GUMBOZ is not set
+# CONFIG_BOARD_GOOGLE_MORPHIUS is not set
+# CONFIG_BOARD_GOOGLE_SHUBOZ is not set
+# CONFIG_BOARD_GOOGLE_TREMBYLE is not set
+# CONFIG_BOARD_GOOGLE_VILBOZ is not set
+# CONFIG_BOARD_GOOGLE_WOOMAX is not set
 CONFIG_DRIVER_TPM_SPI_BUS=0x0
 CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS=0x5
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_DRIVER_TPM_I2C_BUS=0x0
 CONFIG_DRIVER_TPM_I2C_ADDR=0x20
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_PMIC_BUS=-1
 CONFIG_BOARD_GOOGLE_GRU_COMMON=y
 CONFIG_GRU_HAS_TPM2=y
@@ -670,12 +697,9 @@ CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME=""
 CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US=0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_DRIVER_TPM_SPI_CHIP=0
 # CONFIG_TPM_MEASURED_BOOT is not set
@@ -691,6 +715,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -712,6 +737,7 @@ CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION=y
 CONFIG_GENERIC_UDELAY=y
 CONFIG_SOC_ROCKCHIP_RK3399=y
 CONFIG_RK3399_SPREAD_SPECTRUM_DDR=y
@@ -782,8 +808,6 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
 # end of Display
 
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
@@ -845,6 +869,7 @@ CONFIG_MAINBOARD_HAS_TPM2=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -865,6 +890,7 @@ CONFIG_ACPI_CUSTOM_MADT=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -923,6 +949,10 @@ CONFIG_PAYLOAD_NONE=y
 # CPU Debug Settings
 #
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/gru_kevin/config/libgfxinit_corebootfb b/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
index cf36cf35..0b836026 100644
--- a/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
+++ b/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
@@ -21,6 +21,7 @@ CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_COMPRESS_PRERAM_STAGES=y
 CONFIG_COMPRESS_BOOTBLOCK=y
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 # CONFIG_COLLECT_TIMESTAMPS is not set
 # CONFIG_USE_BLOBS is not set
@@ -118,6 +119,8 @@ CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=1
 CONFIG_CONSOLE_SERIAL_UART_ADDRESS=0xFF1A0000
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_MEMLAYOUT_LD_FILE="src/soc/rockchip/rk3399/memlayout.ld"
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_WINBOND=y
@@ -148,6 +151,11 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_TRICKY is not set
 # CONFIG_BOARD_GOOGLE_ZAKO is not set
 
+#
+# Brox
+#
+# CONFIG_BOARD_GOOGLE_BROX is not set
+
 #
 # Brya
 #
@@ -183,7 +191,6 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_OSIRIS is not set
 # CONFIG_BOARD_GOOGLE_PIRRHA is not set
 # CONFIG_BOARD_GOOGLE_PRIMUS is not set
-# CONFIG_BOARD_GOOGLE_PRIMUS4ES is not set
 # CONFIG_BOARD_GOOGLE_PUJJO is not set
 # CONFIG_BOARD_GOOGLE_QUANDISO is not set
 # CONFIG_BOARD_GOOGLE_REDRIX is not set
@@ -202,6 +209,8 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_ZYDRON is not set
 # CONFIG_BOARD_GOOGLE_NOKRIS is not set
 # CONFIG_BOARD_GOOGLE_DOCHI is not set
+# CONFIG_BOARD_GOOGLE_ANRAGGAR is not set
+# CONFIG_BOARD_GOOGLE_XOL is not set
 
 #
 # Butterfly
@@ -229,6 +238,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_KRABBY is not set
 # CONFIG_BOARD_GOOGLE_TENTACRUEL is not set
 # CONFIG_BOARD_GOOGLE_MAGIKARP is not set
+# CONFIG_BOARD_GOOGLE_CHINCHOU is not set
 
 #
 # Staryu
@@ -288,6 +298,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_TARANZA is not set
 # CONFIG_BOARD_GOOGLE_BOXY is not set
 # CONFIG_BOARD_GOOGLE_DEXI is not set
+# CONFIG_BOARD_GOOGLE_DITA is not set
 
 #
 # Drallion
@@ -320,6 +331,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # Geralt
 #
 # CONFIG_BOARD_GOOGLE_GERALT is not set
+# CONFIG_BOARD_GOOGLE_CIRI is not set
 
 #
 # Glados
@@ -345,9 +357,9 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
 #
 # Guybrush
 #
+# CONFIG_BOARD_GOOGLE_DEWATT is not set
 # CONFIG_BOARD_GOOGLE_GUYBRUSH is not set
 # CONFIG_BOARD_GOOGLE_NIPPERKIN is not set
-# CONFIG_BOARD_GOOGLE_DEWATT is not set
 
 #
 # Hatch
@@ -367,10 +379,15 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
 #
 # Herobrine
 #
-
-#
-# (Herobrine requires 'Allow QC blobs repository')
-#
+# CONFIG_BOARD_GOOGLE_HEROBRINE is not set
+# CONFIG_BOARD_GOOGLE_HEROBRINE_REV0 is not set
+# CONFIG_BOARD_GOOGLE_SENOR is not set
+# CONFIG_BOARD_GOOGLE_PIGLIN is not set
+# CONFIG_BOARD_GOOGLE_HOGLIN is not set
+# CONFIG_BOARD_GOOGLE_VILLAGER is not set
+# CONFIG_BOARD_GOOGLE_EVOKER is not set
+# CONFIG_BOARD_GOOGLE_ZOGLIN is not set
+# CONFIG_BOARD_GOOGLE_ZOMBIE is not set
 
 #
 # Jecht
@@ -551,6 +568,8 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
 # CONFIG_BOARD_GOOGLE_REX_EC_ISH is not set
 # CONFIG_BOARD_GOOGLE_OVIS is not set
 # CONFIG_BOARD_GOOGLE_OVIS4ES is not set
+# CONFIG_BOARD_GOOGLE_DEKU is not set
+# CONFIG_BOARD_GOOGLE_DEKU4ES is not set
 # CONFIG_BOARD_GOOGLE_REX4ES is not set
 # CONFIG_BOARD_GOOGLE_REX4ES_EC_ISH is not set
 
@@ -563,11 +582,11 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
 #
 # Skyrim
 #
+# CONFIG_BOARD_GOOGLE_CRYSTALDRIFT is not set
+# CONFIG_BOARD_GOOGLE_FROSTFLOW is not set
+# CONFIG_BOARD_GOOGLE_MARKARTH is not set
 # CONFIG_BOARD_GOOGLE_SKYRIM is not set
 # CONFIG_BOARD_GOOGLE_WINTERHOLD is not set
-# CONFIG_BOARD_GOOGLE_FROSTFLOW is not set
-# CONFIG_BOARD_GOOGLE_CRYSTALDRIFT is not set
-# CONFIG_BOARD_GOOGLE_MARKARTH is not set
 
 #
 # Slippy
@@ -595,10 +614,19 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
 #
 # Trogdor
 #
-
-#
-# (Trogdor requires 'Allow QC blobs repository')
-#
+# CONFIG_BOARD_GOOGLE_BUBS is not set
+# CONFIG_BOARD_GOOGLE_COACHZ is not set
+# CONFIG_BOARD_GOOGLE_GELARSHIE is not set
+# CONFIG_BOARD_GOOGLE_HOMESTAR is not set
+# CONFIG_BOARD_GOOGLE_KINGOFTOWN is not set
+# CONFIG_BOARD_GOOGLE_LAZOR is not set
+# CONFIG_BOARD_GOOGLE_MARZIPAN is not set
+# CONFIG_BOARD_GOOGLE_MRBLAND is not set
+# CONFIG_BOARD_GOOGLE_PAZQUEL is not set
+# CONFIG_BOARD_GOOGLE_POMPOM is not set
+# CONFIG_BOARD_GOOGLE_QUACKINGSTICK is not set
+# CONFIG_BOARD_GOOGLE_WORMDINGLER is not set
+# CONFIG_BOARD_GOOGLE_TROGDOR is not set
 
 #
 # Veyron
@@ -645,22 +673,21 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
 #
 # Zork
 #
-# CONFIG_BOARD_GOOGLE_DALBOZ is not set
-# CONFIG_BOARD_GOOGLE_VILBOZ is not set
-# CONFIG_BOARD_GOOGLE_EZKINIL is not set
-# CONFIG_BOARD_GOOGLE_MORPHIUS is not set
-# CONFIG_BOARD_GOOGLE_TREMBYLE is not set
 # CONFIG_BOARD_GOOGLE_BERKNIP is not set
-# CONFIG_BOARD_GOOGLE_WOOMAX is not set
+# CONFIG_BOARD_GOOGLE_DALBOZ is not set
 # CONFIG_BOARD_GOOGLE_DIRINBOZ is not set
-# CONFIG_BOARD_GOOGLE_SHUBOZ is not set
+# CONFIG_BOARD_GOOGLE_EZKINIL is not set
 # CONFIG_BOARD_GOOGLE_GUMBOZ is not set
+# CONFIG_BOARD_GOOGLE_MORPHIUS is not set
+# CONFIG_BOARD_GOOGLE_SHUBOZ is not set
+# CONFIG_BOARD_GOOGLE_TREMBYLE is not set
+# CONFIG_BOARD_GOOGLE_VILBOZ is not set
+# CONFIG_BOARD_GOOGLE_WOOMAX is not set
 CONFIG_DRIVER_TPM_SPI_BUS=0x0
 CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS=0x5
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_DRIVER_TPM_I2C_BUS=0x0
 CONFIG_DRIVER_TPM_I2C_ADDR=0x20
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_PMIC_BUS=-1
 CONFIG_BOARD_GOOGLE_GRU_COMMON=y
 # CONFIG_GRU_HAS_TPM2 is not set
@@ -670,12 +697,9 @@ CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME=""
 CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US=0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -690,6 +714,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -711,6 +736,7 @@ CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION=y
 CONFIG_GENERIC_UDELAY=y
 CONFIG_SOC_ROCKCHIP_RK3399=y
 # CONFIG_RK3399_SPREAD_SPECTRUM_DDR is not set
@@ -781,8 +807,6 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
 # end of Display
 
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
@@ -842,6 +866,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -862,6 +887,7 @@ CONFIG_ACPI_CUSTOM_MADT=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -920,6 +946,10 @@ CONFIG_PAYLOAD_NONE=y
 # CPU Debug Settings
 #
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
index 4a0ad5ae..ad9444f5 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_USBDEBUG_HCD_INDEX=0
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,7 +156,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +165,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_BOARD_HP_2170P=y
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -173,8 +177,6 @@ CONFIG_BOARD_HP_2170P=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
@@ -184,8 +186,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -194,7 +194,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -209,6 +208,7 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -239,6 +239,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -248,15 +249,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -305,8 +307,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -378,6 +380,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -413,7 +417,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -424,8 +428,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -456,6 +458,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
@@ -472,6 +475,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -518,6 +525,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -547,6 +555,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -627,6 +636,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
index abbc3c50..93005606 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_USBDEBUG_HCD_INDEX=0
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +163,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_BOARD_HP_2170P=y
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -171,8 +175,6 @@ CONFIG_BOARD_HP_2170P=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
@@ -182,8 +184,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -192,7 +192,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -207,6 +206,7 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -237,6 +237,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -246,15 +247,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -303,8 +305,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -376,6 +378,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -409,7 +413,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -420,8 +424,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -452,6 +454,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
@@ -468,6 +471,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -515,6 +522,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -544,6 +552,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -624,6 +633,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
index f04664a1..aedd4b3f 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +163,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 CONFIG_BOARD_HP_2560P=y
 # CONFIG_BOARD_HP_2570P is not set
@@ -171,8 +175,6 @@ CONFIG_BOARD_HP_2560P=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
@@ -182,8 +184,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -191,7 +191,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -206,6 +205,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -236,6 +236,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -245,15 +246,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -302,8 +304,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -374,6 +376,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -409,7 +413,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -420,8 +424,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -452,6 +454,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 # CONFIG_DRIVERS_UART_OXPCIE is not set
@@ -467,6 +470,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -512,6 +519,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -541,6 +549,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -604,6 +613,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
index 578fca08..5db9e2d8 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -132,6 +133,8 @@ CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -149,7 +152,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -159,6 +161,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 CONFIG_BOARD_HP_2560P=y
 # CONFIG_BOARD_HP_2570P is not set
@@ -169,8 +173,6 @@ CONFIG_BOARD_HP_2560P=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
@@ -180,8 +182,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -189,7 +189,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -204,6 +203,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -234,6 +234,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -243,15 +244,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -300,8 +302,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -372,6 +374,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -405,7 +409,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -416,8 +420,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -448,6 +450,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 # CONFIG_DRIVERS_UART_OXPCIE is not set
@@ -463,6 +466,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -509,6 +516,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -538,6 +546,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -601,6 +610,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
index 60fb4989..3d8a1f28 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -133,6 +134,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -160,6 +162,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 CONFIG_BOARD_HP_2570P=y
@@ -170,8 +174,6 @@ CONFIG_BOARD_HP_2570P=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
@@ -181,8 +183,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -190,7 +190,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -205,6 +204,7 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -235,6 +235,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -244,15 +245,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -301,8 +303,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -373,6 +375,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -408,7 +412,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -419,8 +423,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -450,6 +452,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 # CONFIG_DRIVERS_UART_OXPCIE is not set
@@ -510,6 +513,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -539,6 +543,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -602,6 +607,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
index 1be47e68..287cb941 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -131,6 +132,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -148,7 +151,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -158,6 +160,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 CONFIG_BOARD_HP_2570P=y
@@ -168,8 +172,6 @@ CONFIG_BOARD_HP_2570P=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
@@ -179,8 +181,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -188,7 +188,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -203,6 +202,7 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -233,6 +233,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -242,15 +243,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -299,8 +301,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -371,6 +373,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -404,7 +408,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -415,8 +419,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -446,6 +448,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 # CONFIG_DRIVERS_UART_OXPCIE is not set
@@ -507,6 +510,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -536,6 +540,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -599,6 +604,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
index 39c63ac9..1ab5aa8b 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd_4mb"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +163,8 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -171,16 +175,12 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -189,7 +189,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -204,6 +203,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -232,6 +232,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -241,15 +242,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -298,8 +300,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -360,6 +362,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -395,7 +399,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -406,8 +410,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -438,6 +440,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 # CONFIG_DRIVERS_UART_OXPCIE is not set
@@ -453,6 +456,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Ironlake"
@@ -497,6 +504,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -526,6 +534,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -589,6 +598,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
index 5b1b62c2..cab744e2 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -132,6 +133,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -149,7 +152,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd_4mb"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -159,6 +161,8 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -169,16 +173,12 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -187,7 +187,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -202,6 +201,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -230,6 +230,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -239,15 +240,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -296,8 +298,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -358,6 +360,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -391,7 +395,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -402,8 +406,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -434,6 +436,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 # CONFIG_DRIVERS_UART_OXPCIE is not set
@@ -449,6 +452,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Ironlake"
@@ -494,6 +501,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -523,6 +531,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -586,6 +595,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
index 29cee481..3ea66709 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +163,8 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -171,16 +175,12 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -189,7 +189,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -204,6 +203,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -232,6 +232,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -241,15 +242,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -298,8 +300,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -360,6 +362,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -395,7 +399,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -406,8 +410,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -438,6 +440,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 # CONFIG_DRIVERS_UART_OXPCIE is not set
@@ -453,6 +456,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Ironlake"
@@ -497,6 +504,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -526,6 +534,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -589,6 +598,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
index a319d43c..1b7bc08c 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -132,6 +133,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -149,7 +152,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -159,6 +161,8 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -169,16 +173,12 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -187,7 +187,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -202,6 +201,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -230,6 +230,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -239,15 +240,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -296,8 +298,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -358,6 +360,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -391,7 +395,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -402,8 +406,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -434,6 +436,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 # CONFIG_DRIVERS_UART_OXPCIE is not set
@@ -449,6 +452,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Ironlake"
@@ -494,6 +501,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -523,6 +531,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -586,6 +595,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb b/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
index 1d0ec358..0f9ff5fa 100644
--- a/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
@@ -20,6 +20,7 @@ CONFIG_ARCH_SUPPORTS_CLANG=y
 CONFIG_OPTION_BACKEND_NONE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -131,6 +132,8 @@ CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -149,7 +152,6 @@ CONFIG_ME_BIN_PATH="../../../vendorfiles/hp820g2/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp820g2/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_PCIEXP_AER=y
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -159,6 +161,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -169,14 +173,10 @@ CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_EC_HP_KBC1126_GPE=0x6
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2"
 CONFIG_HAVE_IFD_BIN=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -186,7 +186,6 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -201,6 +200,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -230,6 +230,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xd8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -239,6 +240,7 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HAVE_MRC=y
 CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
 CONFIG_MRC_BIN_ADDRESS=0xfffa0000
@@ -253,9 +255,9 @@ CONFIG_INTEL_LYNXPOINT_LP=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -343,6 +345,8 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_POSTCAR_STAGE=y
 CONFIG_BOOTBLOCK_SIMPLE=y
@@ -377,7 +381,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -385,8 +389,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -416,6 +418,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
@@ -431,6 +434,10 @@ CONFIG_HAVE_USBDEBUG=y
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Haswell"
@@ -476,6 +483,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -506,6 +514,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -585,6 +594,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode b/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
index 6770e71f..f56083f7 100644
--- a/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
@@ -20,6 +20,7 @@ CONFIG_ARCH_SUPPORTS_CLANG=y
 CONFIG_OPTION_BACKEND_NONE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -129,6 +130,8 @@ CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -147,7 +150,6 @@ CONFIG_ME_BIN_PATH="../../../vendorfiles/hp820g2/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp820g2/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_PCIEXP_AER=y
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -157,6 +159,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -167,14 +171,10 @@ CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_EC_HP_KBC1126_GPE=0x6
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2"
 CONFIG_HAVE_IFD_BIN=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -184,7 +184,6 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -199,6 +198,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -228,6 +228,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xd8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -237,6 +238,7 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HAVE_MRC=y
 CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
 CONFIG_MRC_BIN_ADDRESS=0xfffa0000
@@ -251,9 +253,9 @@ CONFIG_INTEL_LYNXPOINT_LP=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -341,6 +343,8 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_POSTCAR_STAGE=y
 CONFIG_BOOTBLOCK_SIMPLE=y
@@ -373,7 +377,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -381,8 +385,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -412,6 +414,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
@@ -427,6 +430,10 @@ CONFIG_HAVE_USBDEBUG=y
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Haswell"
@@ -473,6 +480,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -503,6 +511,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -582,6 +591,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
index 6c02a7fa..13154ed9 100644
--- a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
@@ -21,6 +21,7 @@ CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +163,8 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -171,16 +175,12 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 CMT"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -190,7 +190,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -205,6 +204,7 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -233,6 +233,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -242,15 +243,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -299,8 +301,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -361,6 +363,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -396,7 +400,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -407,11 +411,10 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
@@ -438,6 +441,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
@@ -499,6 +503,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -528,6 +533,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -608,6 +614,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
index 5acc48e3..3de59bb9 100644
--- a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
@@ -21,6 +21,7 @@ CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -132,6 +133,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -149,7 +152,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -159,6 +161,8 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -169,16 +173,12 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 CMT"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -188,7 +188,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -203,6 +202,7 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -231,6 +231,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -240,15 +241,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -297,8 +299,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -359,6 +361,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -392,7 +396,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -403,11 +407,10 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
@@ -434,6 +437,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
@@ -496,6 +500,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -525,6 +530,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -605,6 +611,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
index 2f3bdb52..9f3257b5 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
@@ -21,6 +21,7 @@ CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +163,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -171,16 +175,12 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 USDT"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -190,7 +190,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -205,6 +204,7 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -233,6 +233,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -242,15 +243,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -299,8 +301,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -361,6 +363,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -396,7 +400,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -407,11 +411,10 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
@@ -438,6 +441,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
@@ -499,6 +503,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -528,6 +533,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -608,6 +614,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
index 13f8d009..95b9ea4f 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
@@ -21,6 +21,7 @@ CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -132,6 +133,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -149,7 +152,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -159,6 +161,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -169,16 +173,12 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 USDT"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -188,7 +188,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -203,6 +202,7 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -231,6 +231,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -240,15 +241,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -297,8 +299,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -359,6 +361,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -392,7 +396,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -403,11 +407,10 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
@@ -434,6 +437,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
@@ -496,6 +500,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -525,6 +530,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -605,6 +611,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
index dfee9e1f..68187d98 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +163,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -171,8 +175,6 @@ CONFIG_BOARD_HP_8460P=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
@@ -182,8 +184,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -191,7 +191,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -206,6 +205,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -236,6 +236,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -245,15 +246,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -302,8 +304,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -375,6 +377,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -410,7 +414,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -421,8 +425,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -453,6 +455,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 # CONFIG_DRIVERS_UART_OXPCIE is not set
@@ -468,6 +471,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -513,6 +520,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -542,6 +550,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -605,6 +614,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
index 727549be..5279a13d 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -132,6 +133,8 @@ CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -149,7 +152,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -159,6 +161,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -169,8 +173,6 @@ CONFIG_BOARD_HP_8460P=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
@@ -180,8 +182,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -189,7 +189,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -204,6 +203,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -234,6 +234,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -243,15 +244,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -300,8 +302,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -373,6 +375,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -406,7 +410,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -417,8 +421,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -449,6 +451,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 # CONFIG_DRIVERS_UART_OXPCIE is not set
@@ -464,6 +467,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -510,6 +517,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -539,6 +547,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -602,6 +611,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
index 83260b61..d6d98e01 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -135,6 +136,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -162,6 +164,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -172,8 +176,6 @@ CONFIG_BOARD_HP_8470P=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
@@ -183,8 +185,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -193,7 +193,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -208,6 +207,7 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -238,6 +238,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -247,15 +248,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -304,8 +306,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -377,6 +379,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -412,7 +416,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -423,8 +427,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -454,6 +456,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
@@ -516,6 +519,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -545,6 +549,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -625,6 +630,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
index 151b0060..43ea2290 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -133,6 +134,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -160,6 +162,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -170,8 +174,6 @@ CONFIG_BOARD_HP_8470P=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
@@ -181,8 +183,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -191,7 +191,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -206,6 +205,7 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -236,6 +236,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -245,15 +246,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -302,8 +304,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -375,6 +377,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -408,7 +412,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -419,8 +423,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -450,6 +452,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
@@ -513,6 +516,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -542,6 +546,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -622,6 +627,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
index e54f8e2d..dedb4c63 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_USBDEBUG_HCD_INDEX=0
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +163,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -171,8 +175,6 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_BOARD_HP_FOLIO_9470M=y
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
@@ -182,8 +184,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -191,7 +191,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -206,6 +205,7 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -236,6 +236,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -245,15 +246,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -302,8 +304,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -374,6 +376,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -409,7 +413,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -420,8 +424,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -452,6 +454,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 # CONFIG_DRIVERS_UART_OXPCIE is not set
@@ -467,6 +470,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -512,6 +519,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -541,6 +549,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -604,6 +613,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
index 192bb14f..33beb4e7 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -132,6 +133,8 @@ CONFIG_USBDEBUG_HCD_INDEX=0
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -149,7 +152,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -159,6 +161,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
 # CONFIG_BOARD_HP_2560P is not set
 # CONFIG_BOARD_HP_2570P is not set
@@ -169,8 +173,6 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_BOARD_HP_FOLIO_9470M=y
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
-# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
-# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
@@ -180,8 +182,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
@@ -189,7 +189,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
@@ -204,6 +203,7 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -234,6 +234,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -243,15 +244,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -300,8 +302,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -372,6 +374,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -405,7 +409,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -416,8 +420,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -448,6 +450,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 # CONFIG_DRIVERS_UART_OXPCIE is not set
@@ -463,6 +466,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -509,6 +516,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -538,6 +546,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -601,6 +610,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/macbook11/config/libgfxinit_corebootfb b/config/coreboot/macbook11/config/libgfxinit_corebootfb
index f41ffe35..17efec62 100644
--- a/config/coreboot/macbook11/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -146,14 +149,11 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
@@ -162,7 +162,6 @@ CONFIG_D3COLD_SUPPORT=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -176,6 +175,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -203,6 +203,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -211,17 +212,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -311,6 +313,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -346,7 +350,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -354,8 +358,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -383,6 +385,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -431,6 +434,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -458,6 +462,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -540,6 +545,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/macbook11/config/libgfxinit_txtmode b/config/coreboot/macbook11/config/libgfxinit_txtmode
index df93493c..da70f85a 100644
--- a/config/coreboot/macbook11/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -146,14 +149,11 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
@@ -162,7 +162,6 @@ CONFIG_D3COLD_SUPPORT=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -176,6 +175,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -203,6 +203,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -211,17 +212,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -311,6 +313,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -344,7 +348,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -352,8 +356,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -381,6 +383,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -429,6 +432,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -456,6 +460,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -538,6 +543,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
index 9548c226..8dc8524d 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -146,14 +149,11 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
@@ -162,7 +162,6 @@ CONFIG_D3COLD_SUPPORT=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -176,6 +175,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -203,6 +203,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -211,17 +212,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -311,6 +313,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -346,7 +350,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -354,8 +358,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -383,6 +385,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -431,6 +434,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -458,6 +462,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -540,6 +545,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
index 6f2084df..2dee7106 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -146,14 +149,11 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
@@ -162,7 +162,6 @@ CONFIG_D3COLD_SUPPORT=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -176,6 +175,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -203,6 +203,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -211,17 +212,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -311,6 +313,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -344,7 +348,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -352,8 +356,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -381,6 +383,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -429,6 +432,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -456,6 +460,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -538,6 +543,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/macbook21/config/libgfxinit_corebootfb b/config/coreboot/macbook21/config/libgfxinit_corebootfb
index c5eec638..ca8b079b 100644
--- a/config/coreboot/macbook21/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -146,14 +149,11 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
@@ -162,7 +162,6 @@ CONFIG_D3COLD_SUPPORT=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -176,6 +175,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -203,6 +203,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -211,17 +212,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -311,6 +313,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -346,7 +350,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -354,8 +358,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -383,6 +385,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -431,6 +434,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -458,6 +462,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -540,6 +545,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/macbook21/config/libgfxinit_txtmode b/config/coreboot/macbook21/config/libgfxinit_txtmode
index dbc7b44c..db019922 100644
--- a/config/coreboot/macbook21/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -146,14 +149,11 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
@@ -162,7 +162,6 @@ CONFIG_D3COLD_SUPPORT=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -176,6 +175,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -203,6 +203,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -211,17 +212,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -311,6 +313,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -344,7 +348,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -352,8 +356,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -381,6 +383,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -429,6 +432,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -456,6 +460,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -538,6 +543,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
index b63ec933..06889a94 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -146,14 +149,11 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
@@ -162,7 +162,6 @@ CONFIG_D3COLD_SUPPORT=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -176,6 +175,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -203,6 +203,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -211,17 +212,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -311,6 +313,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -346,7 +350,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -354,8 +358,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -383,6 +385,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -431,6 +434,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -458,6 +462,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -540,6 +545,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
index c6945838..9e9ec4f9 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -146,14 +149,11 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
@@ -162,7 +162,6 @@ CONFIG_D3COLD_SUPPORT=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -176,6 +175,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -203,6 +203,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -211,17 +212,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -311,6 +313,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -344,7 +348,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -352,8 +356,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -381,6 +383,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -429,6 +432,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -456,6 +460,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -538,6 +543,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
index 45c86d25..8c435502 100644
--- a/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
@@ -20,6 +20,7 @@ CONFIG_OPTION_BACKEND_NONE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_COMPRESS_PRERAM_STAGES=y
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 # CONFIG_COLLECT_TIMESTAMPS is not set
 CONFIG_USE_BLOBS=y
@@ -118,6 +119,8 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DRAM_SIZE_MB=261120
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_BOARD_EMULATION_QEMU_AARCH64=y
 # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
 # CONFIG_BOARD_EMULATION_QEMU_X86_I440FX is not set
@@ -133,17 +136,13 @@ CONFIG_MEMLAYOUT_LD_FILE="src/mainboard/emulation/qemu-aarch64/memlayout.ld"
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -157,6 +156,7 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -178,10 +178,11 @@ CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION=y
 CONFIG_GENERIC_UDELAY=y
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -245,8 +246,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -297,6 +296,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -313,6 +313,7 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_CUSTOM_MADT=y
 CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -372,6 +373,10 @@ CONFIG_PAYLOAD_NONE=y
 # CPU Debug Settings
 #
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -390,6 +395,7 @@ CONFIG_PAYLOAD_NONE=y
 
 CONFIG_MISSING_BOARD_RESET=y
 CONFIG_DECOMPRESS_OFAST=y
+CONFIG_PROBE_RAM=y
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_NO_XIP_EARLY_STAGES=y
diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
index f0b31134..81e94a21 100644
--- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -131,6 +132,8 @@ CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 # CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set
 # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
 CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
@@ -148,21 +151,17 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x8000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -176,6 +175,7 @@ CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -194,6 +194,7 @@ CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
@@ -201,10 +202,11 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -254,6 +256,8 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -296,8 +300,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -353,6 +355,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -376,6 +379,7 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -456,6 +460,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -476,6 +484,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+CONFIG_PROBE_RAM=y
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
index 29ae73a3..c5a77eb2 100644
--- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -131,6 +132,8 @@ CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 # CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set
 # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
 CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
@@ -148,21 +151,17 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x8000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -176,6 +175,7 @@ CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -194,6 +194,7 @@ CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
@@ -201,10 +202,11 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -254,6 +256,8 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -294,8 +298,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -349,6 +351,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -372,6 +375,7 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -452,6 +456,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -472,6 +480,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+CONFIG_PROBE_RAM=y
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
index 25bf6d5d..d0b3833f 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -211,7 +211,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -225,6 +224,7 @@ CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -253,6 +253,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,14 +262,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -376,6 +378,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -411,7 +415,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -422,8 +426,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -453,6 +455,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -469,6 +472,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -509,6 +516,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -536,6 +544,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -617,6 +626,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_txtmode b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
index 10800d04..06ae932d 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -209,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -223,6 +222,7 @@ CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -251,6 +251,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -259,14 +260,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -374,6 +376,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -407,7 +411,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -418,8 +422,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -449,6 +451,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -465,6 +468,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -505,6 +512,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -532,6 +540,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -613,6 +622,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
index f0dd5014..dfe2b496 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -211,7 +211,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -225,6 +224,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -253,6 +253,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,14 +262,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -376,6 +378,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -411,7 +415,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -422,8 +426,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -453,6 +455,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -469,6 +472,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -509,6 +516,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -536,6 +544,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -617,6 +626,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_txtmode b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
index 1d2591dc..6ec26a81 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -209,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -223,6 +222,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -251,6 +251,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -259,14 +260,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -374,6 +376,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -407,7 +411,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -418,8 +422,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -449,6 +451,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -465,6 +468,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -505,6 +512,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -532,6 +540,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -613,6 +622,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
index 620710a5..c18a4e8c 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -211,7 +211,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -225,6 +224,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -253,6 +253,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,14 +262,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -376,6 +378,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -411,7 +415,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -422,8 +426,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -453,6 +455,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -469,6 +472,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -509,6 +516,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -536,6 +544,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -617,6 +626,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_txtmode b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
index dc1fe7de..ac0b262b 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -209,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -223,6 +222,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -251,6 +251,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -259,14 +260,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -374,6 +376,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -407,7 +411,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -418,8 +422,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -449,6 +451,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -465,6 +468,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -505,6 +512,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -532,6 +540,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -613,6 +622,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
index 2c500c69..aa31b675 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd_nogbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -199,8 +201,6 @@ CONFIG_BOARD_LENOVO_R500=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -210,7 +210,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -224,6 +223,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -252,6 +252,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,14 +261,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -373,6 +375,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -408,7 +412,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -419,8 +423,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -450,6 +452,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -466,6 +469,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -506,6 +513,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -533,6 +541,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -614,6 +623,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_txtmode b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
index 1de26278..fa51741a 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -149,7 +152,6 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd_nogbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -197,8 +199,6 @@ CONFIG_BOARD_LENOVO_R500=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -208,7 +208,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -222,6 +221,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -250,6 +250,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,14 +259,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -371,6 +373,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -404,7 +408,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -415,8 +419,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -446,6 +448,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -462,6 +465,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -502,6 +509,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -529,6 +537,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -610,6 +619,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index 4737e06c..d980a8c2 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -139,6 +140,8 @@ CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 CONFIG_BOARD_DELL_PRECISION_T1650=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_BOARD_DELL_SNB_IVB_WORKSTATIONS=y
 CONFIG_INCLUDE_SMSC_SCH5545_EC_FW=y
 CONFIG_SMSC_SCH5545_EC_FW_FILE="../../../vendorfiles/t1650/sch5545ec.bin"
@@ -159,7 +162,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/t1650/12_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/t1650/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/t1650/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -169,8 +171,6 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -180,7 +180,6 @@ CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -195,6 +194,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -223,6 +223,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -232,15 +233,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -289,8 +291,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -350,6 +352,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -383,7 +387,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -394,8 +398,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -426,6 +428,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
@@ -442,6 +445,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Ironlake"
@@ -488,6 +495,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -517,6 +525,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -597,6 +606,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
index 3ad8a62e..25668253 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -211,7 +211,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -225,6 +224,7 @@ CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -253,6 +253,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,14 +262,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -376,6 +378,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -411,7 +415,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -422,8 +426,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -453,6 +455,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -469,6 +472,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -509,6 +516,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -536,6 +544,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -617,6 +626,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_txtmode b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
index fb37cd68..921bda4c 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -209,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -223,6 +222,7 @@ CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -251,6 +251,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -259,14 +260,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -374,6 +376,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -407,7 +411,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -418,8 +422,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -449,6 +451,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -465,6 +468,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -505,6 +512,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -532,6 +540,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -613,6 +622,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
index bd8ee862..29cb073c 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -211,7 +211,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -225,6 +224,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -253,6 +253,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,14 +262,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -376,6 +378,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -411,7 +415,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -422,8 +426,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -453,6 +455,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -469,6 +472,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -509,6 +516,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -536,6 +544,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -617,6 +626,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_txtmode b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
index f102b6b1..551265f7 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -209,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -223,6 +222,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -251,6 +251,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -259,14 +260,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -374,6 +376,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -407,7 +411,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -418,8 +422,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -449,6 +451,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -465,6 +468,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -505,6 +512,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -532,6 +540,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -613,6 +622,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
index f7eb5c47..b1a2f829 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -211,7 +211,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -225,6 +224,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -253,6 +253,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,14 +262,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -376,6 +378,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -411,7 +415,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -422,8 +426,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -453,6 +455,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -469,6 +472,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -509,6 +516,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -536,6 +544,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -617,6 +626,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_txtmode b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
index 379e8867..52a322dd 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -209,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -223,6 +222,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -251,6 +251,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -259,14 +260,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -374,6 +376,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -407,7 +411,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -418,8 +422,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -449,6 +451,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -465,6 +468,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -505,6 +512,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -532,6 +540,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -613,6 +622,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
index 57e99fe9..8cbabbf6 100644
--- a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -135,6 +136,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,7 +156,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -201,8 +203,6 @@ CONFIG_BOARD_LENOVO_T420=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -211,7 +211,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -226,6 +225,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -256,6 +256,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -265,15 +266,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -322,8 +324,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -390,6 +392,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -425,7 +429,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -436,8 +440,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -468,6 +470,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -484,6 +487,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -531,6 +538,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -560,6 +568,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -624,6 +633,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
index 03f678ab..9ada1ffe 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -135,6 +136,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,7 +156,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -201,8 +203,6 @@ CONFIG_BOARD_LENOVO_T420S=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -211,7 +211,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -226,6 +225,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -256,6 +256,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -265,15 +266,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -322,8 +324,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -390,6 +392,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -425,7 +429,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -436,8 +440,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -468,6 +470,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -484,6 +487,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -530,6 +537,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -559,6 +567,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -623,6 +632,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
index c20e72a2..ba2f64a0 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -133,6 +134,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -199,8 +201,6 @@ CONFIG_BOARD_LENOVO_T420S=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -209,7 +209,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -224,6 +223,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -254,6 +254,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -263,15 +264,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -320,8 +322,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -388,6 +390,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -421,7 +425,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -432,8 +436,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -464,6 +466,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -480,6 +483,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -527,6 +534,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -556,6 +564,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -620,6 +629,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
index 9324783d..af6b1569 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -135,6 +136,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -201,8 +203,6 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -211,7 +211,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -226,6 +225,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -256,6 +256,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -265,15 +266,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -322,8 +324,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -390,6 +392,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -425,7 +429,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -436,8 +440,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -468,6 +470,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -484,6 +487,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -531,6 +538,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -560,6 +568,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -624,6 +633,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_txtmode b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
index 3d7923e4..1277a19b 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -133,6 +134,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -199,8 +201,6 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -209,7 +209,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -224,6 +223,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -254,6 +254,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -263,15 +264,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -320,8 +322,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -388,6 +390,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -421,7 +425,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -432,8 +436,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -464,6 +466,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -480,6 +483,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -528,6 +535,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -557,6 +565,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -621,6 +630,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
index 70f21865..f2067194 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -132,6 +133,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0036"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -197,8 +199,6 @@ CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0036"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
@@ -208,7 +208,6 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -223,6 +222,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -252,6 +252,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,19 +262,20 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HAVE_MRC=y
 CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -385,6 +387,8 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -420,7 +424,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -428,8 +432,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -460,6 +462,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
@@ -478,6 +481,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 CONFIG_INTEL_DDI=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Haswell"
@@ -523,6 +530,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -553,6 +561,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -612,6 +621,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
index c81d9d10..9fa0abac 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -130,6 +131,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0036"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -149,7 +152,6 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -195,8 +197,6 @@ CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0036"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
@@ -206,7 +206,6 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -221,6 +220,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -250,6 +250,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -259,19 +260,20 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HAVE_MRC=y
 CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -383,6 +385,8 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -416,7 +420,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -424,8 +428,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -456,6 +458,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
@@ -474,6 +477,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 CONFIG_INTEL_DDI=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Haswell"
@@ -520,6 +527,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -550,6 +558,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -609,6 +618,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
index 25e11da6..98052d20 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -211,7 +211,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -225,6 +224,7 @@ CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -253,6 +253,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,14 +262,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -376,6 +378,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -411,7 +415,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -422,8 +426,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -453,6 +455,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -469,6 +472,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -509,6 +516,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -536,6 +544,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -617,6 +626,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_txtmode b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
index 8da67f7e..b545fe6f 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -209,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -223,6 +222,7 @@ CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -251,6 +251,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -259,14 +260,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -374,6 +376,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -407,7 +411,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -418,8 +422,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -449,6 +451,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -465,6 +468,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -505,6 +512,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -532,6 +540,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -613,6 +622,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
index 31292a61..3a0a094b 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -211,7 +211,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -225,6 +224,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -253,6 +253,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,14 +262,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -376,6 +378,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -411,7 +415,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -422,8 +426,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -453,6 +455,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -469,6 +472,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -509,6 +516,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -536,6 +544,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -617,6 +626,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_txtmode b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
index 1d50fe62..e6b4b8d7 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -209,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -223,6 +222,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -251,6 +251,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -259,14 +260,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -374,6 +376,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -407,7 +411,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -418,8 +422,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -449,6 +451,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -465,6 +468,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -505,6 +512,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -532,6 +540,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -613,6 +622,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
index d24f15ff..d7e09d36 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -211,7 +211,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -225,6 +224,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -253,6 +253,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,14 +262,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -376,6 +378,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -411,7 +415,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -422,8 +426,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -453,6 +455,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -469,6 +472,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -509,6 +516,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -536,6 +544,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -617,6 +626,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_txtmode b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
index 9c426cdd..387e103e 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -209,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -223,6 +222,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -251,6 +251,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -259,14 +260,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -374,6 +376,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -407,7 +411,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -418,8 +422,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -449,6 +451,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -465,6 +468,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -505,6 +512,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -532,6 +540,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -613,6 +622,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
index 5db2b049..886a7ee6 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -135,6 +136,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,7 +156,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -201,8 +203,6 @@ CONFIG_BOARD_LENOVO_T520=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_BOARD_LENOVO_BASEBOARD_T520=y
@@ -212,7 +212,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -227,6 +226,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -257,6 +257,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -266,15 +267,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -323,8 +325,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -391,6 +393,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -426,7 +430,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -437,8 +441,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -469,6 +471,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -485,6 +488,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -531,6 +538,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -560,6 +568,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -624,6 +633,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_txtmode b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
index fa2e61cb..df7b0b68 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -133,6 +134,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -199,8 +201,6 @@ CONFIG_BOARD_LENOVO_T520=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_BOARD_LENOVO_BASEBOARD_T520=y
@@ -210,7 +210,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -225,6 +224,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -255,6 +255,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -264,15 +265,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -321,8 +323,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -389,6 +391,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -422,7 +426,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -433,8 +437,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -465,6 +467,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -481,6 +484,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -528,6 +535,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -557,6 +565,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -621,6 +630,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
index e8991715..6b3e4eee 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -135,6 +136,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -201,8 +203,6 @@ CONFIG_BOARD_LENOVO_T530=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_BOARD_LENOVO_BASEBOARD_T530=y
@@ -212,7 +212,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -227,6 +226,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -257,6 +257,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -266,15 +267,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -323,8 +325,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -391,6 +393,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -426,7 +430,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -437,8 +441,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -469,6 +471,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -485,6 +488,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -532,6 +539,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -561,6 +569,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -625,6 +634,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_txtmode b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
index 83e0524a..14b0bc33 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -133,6 +134,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -199,8 +201,6 @@ CONFIG_BOARD_LENOVO_T530=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_BOARD_LENOVO_BASEBOARD_T530=y
@@ -210,7 +210,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -225,6 +224,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -255,6 +255,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -264,15 +265,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -321,8 +323,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -389,6 +391,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -422,7 +426,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -433,8 +437,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -465,6 +467,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -481,6 +484,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -529,6 +536,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -558,6 +566,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -622,6 +631,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
index 111a87de..64ef081d 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -133,6 +134,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -145,7 +148,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -189,8 +191,6 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -200,7 +200,6 @@ CONFIG_D3COLD_SUPPORT=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -214,6 +213,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -241,6 +241,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -249,17 +250,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -358,6 +360,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -393,7 +397,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -401,8 +405,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -431,6 +433,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -447,6 +450,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
@@ -479,6 +486,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -506,6 +514,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -589,6 +598,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
index 49fae1a3..a04bafeb 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -133,6 +134,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -145,7 +148,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -189,8 +191,6 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -200,7 +200,6 @@ CONFIG_D3COLD_SUPPORT=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -214,6 +213,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -241,6 +241,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -249,17 +250,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -358,6 +360,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -391,7 +395,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -399,8 +403,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -429,6 +431,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -445,6 +448,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
@@ -477,6 +484,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -504,6 +512,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -587,6 +596,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
index dbbc9efe..0916331f 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -133,6 +134,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -145,7 +148,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -189,8 +191,6 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -200,7 +200,6 @@ CONFIG_D3COLD_SUPPORT=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -214,6 +213,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -241,6 +241,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -249,17 +250,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -358,6 +360,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -393,7 +397,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -401,8 +405,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -431,6 +433,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -447,6 +450,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
@@ -479,6 +486,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -506,6 +514,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -589,6 +598,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
index 28821550..b41b4286 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -133,6 +134,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -145,7 +148,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -189,8 +191,6 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -200,7 +200,6 @@ CONFIG_D3COLD_SUPPORT=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -214,6 +213,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -241,6 +241,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -249,17 +250,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -358,6 +360,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -391,7 +395,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -399,8 +403,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -429,6 +431,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -445,6 +448,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
@@ -477,6 +484,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -504,6 +512,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -587,6 +596,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
index 2ae22535..f7e6b528 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -211,7 +211,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -225,6 +224,7 @@ CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -253,6 +253,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,14 +262,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -376,6 +378,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -411,7 +415,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -422,8 +426,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -453,6 +455,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -469,6 +472,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -509,6 +516,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -536,6 +544,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -617,6 +626,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_txtmode b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
index 9142e709..c9d9ca70 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -209,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -223,6 +222,7 @@ CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -251,6 +251,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -259,14 +260,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -374,6 +376,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -407,7 +411,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -418,8 +422,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -449,6 +451,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -465,6 +468,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -505,6 +512,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -532,6 +540,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -613,6 +622,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
index 265d8112..4aab04bf 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -211,7 +211,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -225,6 +224,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -253,6 +253,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,14 +262,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -376,6 +378,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -411,7 +415,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -422,8 +426,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -453,6 +455,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -469,6 +472,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -509,6 +516,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -536,6 +544,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -617,6 +626,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_txtmode b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
index 6b4ac162..2cbbd0f4 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -209,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -223,6 +222,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -251,6 +251,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -259,14 +260,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -374,6 +376,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -407,7 +411,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -418,8 +422,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -449,6 +451,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -465,6 +468,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -505,6 +512,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -532,6 +540,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -613,6 +622,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
index 1c9779ef..b23b693b 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -211,7 +211,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -225,6 +224,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -253,6 +253,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,14 +262,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -376,6 +378,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -411,7 +415,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -422,8 +426,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -453,6 +455,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -469,6 +472,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -509,6 +516,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -536,6 +544,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -617,6 +626,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_txtmode b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
index 60df11b5..5214b715 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
@@ -209,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -223,6 +222,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -251,6 +251,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -259,14 +260,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -374,6 +376,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -407,7 +411,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -418,8 +422,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -449,6 +451,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -465,6 +468,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -505,6 +512,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -532,6 +540,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -613,6 +622,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
index 7f6f48b6..1d42dd5d 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -135,6 +136,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -201,8 +203,6 @@ CONFIG_BOARD_LENOVO_W530=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_BOARD_LENOVO_BASEBOARD_T530=y
@@ -212,7 +212,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -227,6 +226,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -257,6 +257,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -266,15 +267,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -323,8 +325,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -391,6 +393,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -426,7 +430,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -437,8 +441,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -469,6 +471,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -485,6 +488,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -533,6 +540,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -562,6 +570,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -626,6 +635,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_txtmode b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
index 6ac64749..632d8dfc 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -133,6 +134,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -199,8 +201,6 @@ CONFIG_BOARD_LENOVO_W530=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_BOARD_LENOVO_BASEBOARD_T530=y
@@ -210,7 +210,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -225,6 +224,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -255,6 +255,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -264,15 +265,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -321,8 +323,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 # CONFIG_HIDE_MEI_ON_ERROR is not set
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -389,6 +391,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -422,7 +426,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -433,8 +437,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -465,6 +467,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -481,6 +484,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -530,6 +537,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -559,6 +567,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -623,6 +632,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
index e17a939a..314dbbc9 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -132,6 +133,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN004A"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -197,8 +199,6 @@ CONFIG_BOARD_LENOVO_THINKPAD_W541=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN004A"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
 CONFIG_D3COLD_SUPPORT=y
@@ -208,7 +208,6 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -223,6 +222,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -252,6 +252,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,19 +262,20 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HAVE_MRC=y
 CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -385,6 +387,8 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -420,7 +424,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -428,8 +432,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -460,6 +462,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
@@ -477,6 +480,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_DDI=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Haswell"
@@ -522,6 +529,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -552,6 +560,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -611,6 +620,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
index fbfd3d87..8f09ec77 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -130,6 +131,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN004A"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -149,7 +152,6 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -195,8 +197,6 @@ CONFIG_BOARD_LENOVO_THINKPAD_W541=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN004A"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
 CONFIG_D3COLD_SUPPORT=y
@@ -206,7 +206,6 @@ CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -221,6 +220,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -250,6 +250,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -259,19 +260,20 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HAVE_MRC=y
 CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -383,6 +385,8 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -416,7 +420,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -424,8 +428,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -456,6 +458,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
@@ -473,6 +476,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_DDI=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Haswell"
@@ -519,6 +526,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -549,6 +557,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -608,6 +617,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
index c9f7904a..8dc3aca4 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -208,7 +208,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -222,6 +221,7 @@ CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -250,6 +250,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,14 +259,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -370,6 +372,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -405,7 +409,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -416,8 +420,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -451,6 +453,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_NO_UART_ON_SUPERIO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -467,6 +470,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -506,6 +513,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -533,6 +541,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -597,6 +606,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_txtmode b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
index e88aeca6..49d18531 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -132,6 +133,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -148,7 +151,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -196,8 +198,6 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -206,7 +206,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -220,6 +219,7 @@ CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -248,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,14 +257,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -368,6 +370,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -401,7 +405,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -412,8 +416,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -447,6 +449,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_NO_UART_ON_SUPERIO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -463,6 +466,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -502,6 +509,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -529,6 +537,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -593,6 +602,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
index 769741bd..f8a6f3fd 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -208,7 +208,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -222,6 +221,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -250,6 +250,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,14 +259,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -370,6 +372,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -405,7 +409,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -416,8 +420,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -451,6 +453,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_NO_UART_ON_SUPERIO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -467,6 +470,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -506,6 +513,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -533,6 +541,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -597,6 +606,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_txtmode b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
index 49809078..fd808241 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -132,6 +133,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -148,7 +151,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -196,8 +198,6 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -206,7 +206,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -220,6 +219,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -248,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,14 +257,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -368,6 +370,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -401,7 +405,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -412,8 +416,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -447,6 +449,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_NO_UART_ON_SUPERIO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -463,6 +466,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -502,6 +509,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -529,6 +537,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -593,6 +602,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
index 7eded314..7640b94c 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -208,7 +208,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -222,6 +221,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -250,6 +250,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,14 +259,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -370,6 +372,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -405,7 +409,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -416,8 +420,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -451,6 +453,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_NO_UART_ON_SUPERIO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -467,6 +470,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -506,6 +513,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -533,6 +541,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -597,6 +606,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_txtmode b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
index f43f136b..394ba67d 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -132,6 +133,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -148,7 +151,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -196,8 +198,6 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -206,7 +206,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -220,6 +219,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -248,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,14 +257,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -368,6 +370,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -401,7 +405,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -412,8 +416,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -447,6 +449,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_NO_UART_ON_SUPERIO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -463,6 +466,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -502,6 +509,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -529,6 +537,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -593,6 +602,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
index 10c370a5..c7eb54fc 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,7 +157,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -202,8 +204,6 @@ CONFIG_BOARD_LENOVO_X220=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -212,7 +212,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -227,6 +226,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -257,6 +257,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -266,15 +267,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -323,8 +325,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -391,6 +393,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -426,7 +430,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -437,8 +441,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -469,6 +471,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -485,6 +488,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -531,6 +538,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -560,6 +568,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -624,6 +633,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_txtmode b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
index 8480391a..7d29db4c 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_X220=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -210,7 +210,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -225,6 +224,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -255,6 +255,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -264,15 +265,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -321,8 +323,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -389,6 +391,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -422,7 +426,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -433,8 +437,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -465,6 +467,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -481,6 +484,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -528,6 +535,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -557,6 +565,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -621,6 +630,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x220edp_8mb/config/libgfxinit_corebootfb b/config/coreboot/x220edp_8mb/config/libgfxinit_corebootfb
index 5a23e460..b9567e49 100644
--- a/config/coreboot/x220edp_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x220edp_8mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,7 +157,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -202,8 +204,6 @@ CONFIG_BOARD_LENOVO_X220_EDP=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
@@ -213,7 +213,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -228,6 +227,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -258,6 +258,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -267,15 +268,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -324,8 +326,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -392,6 +394,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -427,7 +431,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -438,8 +442,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -470,6 +472,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -486,6 +489,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Ironlake"
@@ -531,6 +538,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -560,6 +568,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -624,6 +633,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x220edp_8mb/config/libgfxinit_txtmode b/config/coreboot/x220edp_8mb/config/libgfxinit_txtmode
index c5a02604..b373ffa3 100644
--- a/config/coreboot/x220edp_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x220edp_8mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,7 +155,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_X220=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -210,7 +210,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -225,6 +224,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -255,6 +255,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -264,15 +265,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -321,8 +323,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -389,6 +391,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -422,7 +426,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -433,8 +437,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -465,6 +467,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -481,6 +484,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -528,6 +535,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -557,6 +565,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -621,6 +630,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
index 959175d5..b5957386 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,7 +156,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -202,8 +204,6 @@ CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -212,7 +212,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -227,6 +226,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -257,6 +257,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -266,15 +267,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -323,8 +325,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -391,6 +393,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -426,7 +430,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -437,8 +441,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -469,6 +471,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -485,6 +488,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -531,6 +538,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -560,6 +568,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -624,6 +633,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_txtmode b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
index 7fa8f480..ce252c9a 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -210,7 +210,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -225,6 +224,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -255,6 +255,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -264,15 +265,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -321,8 +323,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -389,6 +391,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -422,7 +426,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -433,8 +437,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -465,6 +467,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -481,6 +484,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -528,6 +535,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -557,6 +565,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -621,6 +630,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
index 7dba1ea4..062652de 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,7 +156,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -202,8 +204,6 @@ CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -212,7 +212,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -227,6 +226,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -257,6 +257,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -266,15 +267,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -323,8 +325,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -391,6 +393,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -426,7 +430,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -437,8 +441,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -469,6 +471,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -485,6 +488,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -531,6 +538,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -560,6 +568,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -624,6 +633,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_txtmode b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
index 80fbf781..c538774f 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -210,7 +210,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -225,6 +224,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -255,6 +255,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -264,15 +265,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -321,8 +323,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -389,6 +391,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -422,7 +426,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -433,8 +437,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -465,6 +467,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -481,6 +484,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -528,6 +535,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -557,6 +565,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -621,6 +630,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
index d3c2c1cf..bc1883de 100644
--- a/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,7 +156,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -202,8 +204,6 @@ CONFIG_BOARD_LENOVO_X230_EDP=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
@@ -213,7 +213,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -228,6 +227,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -258,6 +258,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -267,15 +268,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -324,8 +326,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -392,6 +394,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -427,7 +431,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -438,8 +442,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -470,6 +472,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -486,6 +489,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Ironlake"
@@ -531,6 +538,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -560,6 +568,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -624,6 +633,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode b/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
index 48c7535a..899d3e6b 100644
--- a/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_X230_EDP=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
@@ -211,7 +211,6 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -226,6 +225,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -256,6 +256,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -265,15 +266,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -322,8 +324,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -390,6 +392,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -423,7 +427,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -434,8 +438,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -466,6 +468,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -482,6 +485,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Ironlake"
@@ -528,6 +535,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -557,6 +565,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -621,6 +630,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
index da91c066..80ed9c78 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,7 +156,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -202,8 +204,6 @@ CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -212,7 +212,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -227,6 +226,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -257,6 +257,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -266,15 +267,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -323,8 +325,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -391,6 +393,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -426,7 +430,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -437,8 +441,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -469,6 +471,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -485,6 +488,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -531,6 +538,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -560,6 +568,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -624,6 +633,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
index 6f8df96e..1d90b98c 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -210,7 +210,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -225,6 +224,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -255,6 +255,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -264,15 +265,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -321,8 +323,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -389,6 +391,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -422,7 +426,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -433,8 +437,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -465,6 +467,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -481,6 +484,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -528,6 +535,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -557,6 +565,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -621,6 +630,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
index 07fbc2e4..e9d559ed 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -136,6 +137,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,7 +156,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -202,8 +204,6 @@ CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -212,7 +212,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -227,6 +226,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -257,6 +257,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -266,15 +267,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -323,8 +325,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -391,6 +393,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -426,7 +430,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -437,8 +441,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -469,6 +471,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -485,6 +488,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -531,6 +538,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -560,6 +568,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -624,6 +633,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
index 5dd3420b..3033d446 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -210,7 +210,6 @@ CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -225,6 +224,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -255,6 +255,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -264,15 +265,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -321,8 +323,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y
 #
 # Southbridge
 #
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
 CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
 CONFIG_HIDE_MEI_ON_ERROR=y
 CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
@@ -389,6 +391,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -422,7 +426,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -433,8 +437,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -465,6 +467,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
 CONFIG_NO_UART_ON_SUPERIO=y
@@ -481,6 +484,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -528,6 +535,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -557,6 +565,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -621,6 +630,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
index 65b70c1a..d5ec9e74 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -208,7 +208,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -222,6 +221,7 @@ CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -250,6 +250,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,14 +259,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -370,6 +372,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -405,7 +409,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -416,8 +420,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -451,6 +453,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_NO_UART_ON_SUPERIO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -467,6 +470,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -506,6 +513,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -533,6 +541,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -597,6 +606,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_txtmode b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
index 25b93bf0..4fbdc435 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -132,6 +133,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -148,7 +151,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -196,8 +198,6 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -206,7 +206,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -220,6 +219,7 @@ CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -248,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,14 +257,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -368,6 +370,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -401,7 +405,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -412,8 +416,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -447,6 +449,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_NO_UART_ON_SUPERIO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -463,6 +466,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -502,6 +509,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -529,6 +537,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -593,6 +602,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
index 465a75bf..94403e77 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -208,7 +208,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -222,6 +221,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -250,6 +250,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,14 +259,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -370,6 +372,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -405,7 +409,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -416,8 +420,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -451,6 +453,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_NO_UART_ON_SUPERIO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -467,6 +470,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -506,6 +513,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -533,6 +541,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -597,6 +606,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_txtmode b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
index 81598fc0..b1867a46 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -132,6 +133,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -148,7 +151,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -196,8 +198,6 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -206,7 +206,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -220,6 +219,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -248,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,14 +257,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -368,6 +370,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -401,7 +405,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -412,8 +416,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -447,6 +449,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_NO_UART_ON_SUPERIO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -463,6 +466,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -502,6 +509,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -529,6 +537,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -593,6 +602,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
index 1d29b9ad..b1f49efd 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -134,6 +135,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,7 +153,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -198,8 +200,6 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -208,7 +208,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -222,6 +221,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -250,6 +250,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,14 +259,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -370,6 +372,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -405,7 +409,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -416,8 +420,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -451,6 +453,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_NO_UART_ON_SUPERIO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -467,6 +470,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -506,6 +513,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -533,6 +541,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -597,6 +606,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_txtmode b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
index f7cf0c2d..31bad0d1 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -132,6 +133,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -148,7 +151,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -196,8 +198,6 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
@@ -206,7 +206,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -220,6 +219,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=8192
@@ -248,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,14 +257,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -368,6 +370,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -401,7 +405,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -412,8 +416,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x800
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -447,6 +449,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_NO_UART_ON_SUPERIO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -463,6 +466,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -502,6 +509,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -529,6 +537,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -593,6 +602,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x60/config/libgfxinit_corebootfb b/config/coreboot/x60/config/libgfxinit_corebootfb
index 9f75a921..da9884e7 100644
--- a/config/coreboot/x60/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -133,6 +134,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -146,7 +149,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -190,8 +192,6 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 CONFIG_BOARD_LENOVO_X60=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -201,7 +201,6 @@ CONFIG_D3COLD_SUPPORT=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -215,6 +214,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -242,6 +242,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -250,17 +251,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -360,6 +362,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -395,7 +399,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -403,8 +407,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -437,6 +439,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -453,6 +456,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
@@ -485,6 +492,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -512,6 +520,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -597,6 +606,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x60/config/libgfxinit_txtmode b/config/coreboot/x60/config/libgfxinit_txtmode
index 5a3a8a5c..218e23f4 100644
--- a/config/coreboot/x60/config/libgfxinit_txtmode
+++ b/config/coreboot/x60/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -133,6 +134,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -146,7 +149,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -190,8 +192,6 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 CONFIG_BOARD_LENOVO_X60=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -201,7 +201,6 @@ CONFIG_D3COLD_SUPPORT=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -215,6 +214,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -242,6 +242,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -250,17 +251,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -360,6 +362,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -393,7 +397,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -401,8 +405,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -435,6 +437,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -451,6 +454,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
@@ -483,6 +490,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -510,6 +518,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -595,6 +604,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
index 79d79b20..68b98d98 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -133,6 +134,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -146,7 +149,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -190,8 +192,6 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 CONFIG_BOARD_LENOVO_X60=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -201,7 +201,6 @@ CONFIG_D3COLD_SUPPORT=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -215,6 +214,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -242,6 +242,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -250,17 +251,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -360,6 +362,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -395,7 +399,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -403,8 +407,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -437,6 +439,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -453,6 +456,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
@@ -485,6 +492,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -512,6 +520,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -597,6 +606,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_txtmode b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
index 51e74dc6..f6883deb 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -133,6 +134,8 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -146,7 +149,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -190,8 +192,6 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 CONFIG_BOARD_LENOVO_X60=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
@@ -201,7 +201,6 @@ CONFIG_D3COLD_SUPPORT=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -215,6 +214,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -242,6 +242,7 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -250,17 +251,18 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -360,6 +362,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -393,7 +397,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -401,8 +405,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -435,6 +437,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -451,6 +454,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
@@ -483,6 +490,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -510,6 +518,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -595,6 +604,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #

From 614c5efa6550a0c1935965848a2b86382bf6c67a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 25 Jan 2024 15:58:29 +0000
Subject: [PATCH 0195/1549] update coreboot/dell to same rev as default

re-use the same patches, and drop the same patches.

this tree uses hell's special ddr2 fix, which we apply
for the dell latitude e6400.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...ol-add-nuke-flag-all-0xFF-on-region.patch} | 140 ++++---
 ...x200-t400-Revert-cpu-intel-model_10.patch} |   4 +-
 ...-CPUs-don-t-enable-alternative-SMRR.patch} |   4 +-
 ...ble-01.0-device-in-devicetree-for-d.patch} |   6 +-
 ...r-coreboot-images-built-without-a-p.patch} |  16 +-
 ...-use-github-for-the-acpica-download.patch} |   6 +-
 ...mirrorservice.org-for-gcc-downloads.patch} |   6 +-
 ...b-intel-gm45-Make-DDR2-raminit-work.patch} |  35 +-
 ...ll-e6400-crank-up-vram-to-256MB-max.patch} |   4 +-
 ...Add-command-to-enable-disable-radios.patch |  61 ----
 ...-Hook-up-radio-enables-to-option-API.patch |  37 --
 ...ring-HEAP_SIZE-to-a-common-large-val.patch | 341 ------------------
 config/coreboot/dell/target.cfg               |   2 +-
 .../e6400_4mb/config/libgfxinit_corebootfb    |  27 +-
 .../e6400_4mb/config/libgfxinit_txtmode       |  27 +-
 config/coreboot/e6400nvidia_4mb/config/normal |  23 +-
 16 files changed, 170 insertions(+), 569 deletions(-)
 rename config/coreboot/dell/patches/{0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch => 0001-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch} (61%)
 rename config/coreboot/dell/patches/{0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch => 0002-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch} (92%)
 rename config/coreboot/dell/patches/{0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch => 0003-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch} (97%)
 rename config/coreboot/dell/patches/{0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch => 0004-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch} (83%)
 rename config/coreboot/dell/patches/{0019-Remove-warning-for-coreboot-images-built-without-a-p.patch => 0005-Remove-warning-for-coreboot-images-built-without-a-p.patch} (75%)
 rename config/coreboot/dell/patches/{0024-don-t-use-github-for-the-acpica-download.patch => 0006-don-t-use-github-for-the-acpica-download.patch} (89%)
 rename config/coreboot/dell/patches/{0029-use-mirrorservice.org-for-gcc-downloads.patch => 0007-use-mirrorservice.org-for-gcc-downloads.patch} (89%)
 rename config/coreboot/dell/patches/{0027-nb-intel-gm45-Make-DDR2-raminit-work.patch => 0008-nb-intel-gm45-Make-DDR2-raminit-work.patch} (85%)
 rename config/coreboot/dell/patches/{0028-dell-e6400-crank-up-vram-to-256MB-max.patch => 0009-dell-e6400-crank-up-vram-to-256MB-max.patch} (82%)
 delete mode 100644 config/coreboot/dell/patches/0020-ec-dell-mec5035-Add-command-to-enable-disable-radios.patch
 delete mode 100644 config/coreboot/dell/patches/0021-ec-dell-mec5035-Hook-up-radio-enables-to-option-API.patch
 delete mode 100644 config/coreboot/dell/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch

diff --git a/config/coreboot/dell/patches/0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/dell/patches/0001-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
similarity index 61%
rename from config/coreboot/dell/patches/0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
rename to config/coreboot/dell/patches/0001-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
index 6a293287..cb1effa7 100644
--- a/config/coreboot/dell/patches/0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ b/config/coreboot/dell/patches/0001-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -1,7 +1,7 @@
-From 38c76afbea4abfed2976bfbe10977e41f21665b0 Mon Sep 17 00:00:00 2001
+From 4fbd327df271d613d4a56a36eafd88d9d642ec6b Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 15/22] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 1/9] util/ifdtool: add --nuke flag (all 0xFF on region)
 
 When this option is used, the region's contents are overwritten
 with all ones (0xFF).
@@ -16,91 +16,91 @@ Rebased since the last revision update in lbmk.
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
- util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
- 1 file changed, 83 insertions(+), 31 deletions(-)
+ util/ifdtool/ifdtool.c | 112 +++++++++++++++++++++++++++++------------
+ 1 file changed, 81 insertions(+), 31 deletions(-)
 
 diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index ddbc0fb91b..7af9235ae3 100644
+index 191b3216de..38132b4a28 100644
 --- a/util/ifdtool/ifdtool.c
 +++ b/util/ifdtool/ifdtool.c
-@@ -1847,6 +1847,7 @@ static void print_usage(const char *name)
+@@ -1942,6 +1942,7 @@ static void print_usage(const char *name)
+ 	       "                                         tgl    - Tiger Lake\n"
  	       "                                         wbg    - Wellsburg\n"
  	       "   -S | --setpchstrap                    Write a PCH strap\n"
- 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
 +	       "   -N | --nuke <region>                  Overwrite the specified region with 0xFF (all ones)\n"
+ 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
  	       "   -v | --version:                       print the version\n"
  	       "   -h | --help:                          print this help\n\n"
- 	       "<region> is one of Descriptor, BIOS, ME, GbE, Platform Data, Secondary BIOS, "
-@@ -1854,6 +1855,60 @@ static void print_usage(const char *name)
+@@ -1950,6 +1951,60 @@ static void print_usage(const char *name)
  	       "\n");
  }
  
 +static int
 +get_region_type_string(const char *region_type_string)
 +{
-+	if (!strcasecmp("Descriptor", region_type_string))
-+		return 0;
-+	else if (!strcasecmp("BIOS", region_type_string))
-+		return 1;
-+	else if (!strcasecmp("ME", region_type_string))
-+		return 2;
-+	else if (!strcasecmp("GbE", region_type_string))
-+		return 3;
-+	else if (!strcasecmp("Platform Data", region_type_string))
-+		return 4;
-+	else if (!strcasecmp("Device Exp1", region_type_string))
-+		return 5;
-+	else if (!strcasecmp("Secondary BIOS", region_type_string))
-+		return 6;
-+	else if (!strcasecmp("Reserved", region_type_string))
-+		return 7;
-+	else if (!strcasecmp("EC", region_type_string))
-+		return 8;
-+	else if (!strcasecmp("Device Exp2", region_type_string))
-+		return 9;
-+	else if (!strcasecmp("IE", region_type_string))
-+		return 10;
-+	else if (!strcasecmp("10GbE_0", region_type_string))
-+		return 11;
-+	else if (!strcasecmp("10GbE_1", region_type_string))
-+		return 12;
-+	else if (!strcasecmp("PTT", region_type_string))
-+		return 15;
-+	return -1;
++       if (!strcasecmp("Descriptor", region_type_string))
++               return 0;
++       else if (!strcasecmp("BIOS", region_type_string))
++               return 1;
++       else if (!strcasecmp("ME", region_type_string))
++               return 2;
++       else if (!strcasecmp("GbE", region_type_string))
++               return 3;
++       else if (!strcasecmp("Platform Data", region_type_string))
++               return 4;
++       else if (!strcasecmp("Device Exp1", region_type_string))
++               return 5;
++       else if (!strcasecmp("Secondary BIOS", region_type_string))
++               return 6;
++       else if (!strcasecmp("Reserved", region_type_string))
++               return 7;
++       else if (!strcasecmp("EC", region_type_string))
++               return 8;
++       else if (!strcasecmp("Device Exp2", region_type_string))
++               return 9;
++       else if (!strcasecmp("IE", region_type_string))
++               return 10;
++       else if (!strcasecmp("10GbE_0", region_type_string))
++               return 11;
++       else if (!strcasecmp("10GbE_1", region_type_string))
++               return 12;
++       else if (!strcasecmp("PTT", region_type_string))
++               return 15;
++       return -1;
 +}
 +
 +static void
 +nuke(const char *filename, char *image, int size, int region_type)
 +{
-+	int i;
-+	struct region region;
-+	const struct frba *frba = find_frba(image, size);
-+	if (!frba)
-+		exit(EXIT_FAILURE);
++       int i;
++       struct region region;
++       const struct frba *frba = find_frba(image, size);
++       if (!frba)
++               exit(EXIT_FAILURE);
 +
-+	region = get_region(frba, region_type);
-+	if (region.size > 0) {
-+		for (i = region.base; i <= region.limit; i++) {
-+			if ((i + 1) > (size))
-+				break;
-+			image[i] = 0xFF;
-+		}
-+		write_image(filename, image, size);
-+	}
++       region = get_region(frba, region_type);
++       if (region.size > 0) {
++               for (i = region.base; i <= region.limit; i++) {
++                       if ((i + 1) > (size))
++                               break;
++                       image[i] = 0xFF;
++               }
++               write_image(filename, image, size);
++       }
 +}
 +
  int main(int argc, char *argv[])
  {
  	int opt, option_index = 0;
-@@ -1861,6 +1916,7 @@ int main(int argc, char *argv[])
+@@ -1957,6 +2012,7 @@ int main(int argc, char *argv[])
  	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
  	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
  	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
 +	int mode_nuke = 0;
+ 	int mode_gpr0_disable = 0;
  	char *region_type_string = NULL, *region_fname = NULL;
  	const char *layout_fname = NULL;
- 	char *new_filename = NULL;
-@@ -1892,6 +1948,7 @@ int main(int argc, char *argv[])
+@@ -1990,6 +2046,7 @@ int main(int argc, char *argv[])
  		{"validate", 0, NULL, 't'},
  		{"setpchstrap", 1, NULL, 'S'},
  		{"newvalue", 1, NULL, 'V'},
@@ -108,7 +108,7 @@ index ddbc0fb91b..7af9235ae3 100644
  		{0, 0, 0, 0}
  	};
  
-@@ -1941,35 +1998,8 @@ int main(int argc, char *argv[])
+@@ -2039,35 +2096,8 @@ int main(int argc, char *argv[])
  			region_fname++;
  			// Descriptor, BIOS, ME, GbE, Platform
  			// valid type?
@@ -141,12 +141,12 @@ index ddbc0fb91b..7af9235ae3 100644
 -			else if (!strcasecmp("PTT", region_type_string))
 -				region_type = 15;
 -			if (region_type == -1) {
-+			if ((region_type =
-+			    get_region_type_string(region_type_string)) == -1) {
++                       if ((region_type =
++                           get_region_type_string(region_type_string)) == -1) {
  				fprintf(stderr, "No such region type: '%s'\n\n",
  					region_type_string);
  				fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
-@@ -2135,6 +2165,22 @@ int main(int argc, char *argv[])
+@@ -2236,6 +2266,22 @@ int main(int argc, char *argv[])
  		case 't':
  			mode_validate = 1;
  			break;
@@ -169,31 +169,29 @@ index ddbc0fb91b..7af9235ae3 100644
  		case 'v':
  			print_version();
  			exit(EXIT_SUCCESS);
-@@ -2150,7 +2196,8 @@ int main(int argc, char *argv[])
- 
+@@ -2252,7 +2298,7 @@ int main(int argc, char *argv[])
  	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
  			mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
--			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate) > 1) {
-+			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
-+			mode_nuke) > 1) {
+ 			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
+-			mode_gpr0_disable) > 1) {
++			mode_gpr0_disable + mode_nuke) > 1) {
  		fprintf(stderr, "You may not specify more than one mode.\n\n");
  		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
  		exit(EXIT_FAILURE);
-@@ -2158,7 +2205,8 @@ int main(int argc, char *argv[])
- 
+@@ -2261,7 +2307,7 @@ int main(int argc, char *argv[])
  	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
  			mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
--			mode_locked + mode_unlocked + mode_density + mode_altmedisable + mode_validate) == 0) {
-+			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
-+			mode_validate + mode_nuke) == 0) {
+ 			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
+-			mode_validate + mode_gpr0_disable) == 0) {
++			mode_validate + mode_gpr0_disable + mode_nuke) == 0) {
  		fprintf(stderr, "You need to specify a mode.\n\n");
  		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
  		exit(EXIT_FAILURE);
-@@ -2262,6 +2310,10 @@ int main(int argc, char *argv[])
+@@ -2368,6 +2414,10 @@ int main(int argc, char *argv[])
  		write_image(new_filename, image, size);
  	}
  
-+	if (mode_nuke) {
++       if (mode_nuke) {
 +               nuke(new_filename, image, size, region_type);
 +       }
 +
diff --git a/config/coreboot/dell/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch b/config/coreboot/dell/patches/0002-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
similarity index 92%
rename from config/coreboot/dell/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
rename to config/coreboot/dell/patches/0002-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
index 0f9b192d..b0ac4e67 100644
--- a/config/coreboot/dell/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
+++ b/config/coreboot/dell/patches/0002-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
@@ -1,7 +1,7 @@
-From 3ec06fa2393995b87af1dbc0387c5d3255d5c0db Mon Sep 17 00:00:00 2001
+From 362e86f89b3980699e7e794df9b98018397fe2d8 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Wed, 1 Dec 2021 02:53:00 +0000
-Subject: [PATCH 16/22] fix speedstep on x200/t400: Revert
+Subject: [PATCH 2/9] fix speedstep on x200/t400: Revert
  "cpu/intel/model_1067x: enable PECI"
 
 This reverts commit 70fea013c7ebd6d85a7806748233fcfd76802f5f.
diff --git a/config/coreboot/dell/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch b/config/coreboot/dell/patches/0003-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
similarity index 97%
rename from config/coreboot/dell/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
rename to config/coreboot/dell/patches/0003-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
index 4d7b3421..3193ed97 100644
--- a/config/coreboot/dell/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
+++ b/config/coreboot/dell/patches/0003-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
@@ -1,7 +1,7 @@
-From fdde15b69bd5c8bf54339adf3581a32fa992a503 Mon Sep 17 00:00:00 2001
+From 883455573f07551eaf2b12ab80bedcd2b4904a17 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 17 Apr 2023 15:49:57 +0100
-Subject: [PATCH 17/22] GM45-type CPUs: don't enable alternative SMRR
+Subject: [PATCH 3/9] GM45-type CPUs: don't enable alternative SMRR
 
 This reverts the changes in coreboot revision:
 df7aecd92643d207feaf7fd840f8835097346644
diff --git a/config/coreboot/dell/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch b/config/coreboot/dell/patches/0004-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
similarity index 83%
rename from config/coreboot/dell/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
rename to config/coreboot/dell/patches/0004-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
index 04f3bd63..c9b41c79 100644
--- a/config/coreboot/dell/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
+++ b/config/coreboot/dell/patches/0004-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
@@ -1,8 +1,8 @@
-From a65797a9e7e610b1c916cb4d275b72848622c218 Mon Sep 17 00:00:00 2001
+From 458fe39e9cd2536cfa8671427e6f557396143339 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sat, 6 May 2023 15:53:41 -0600
-Subject: [PATCH 18/22] mb/dell/e6400: Enable 01.0 device in devicetree for
- dGPU models
+Subject: [PATCH 4/9] mb/dell/e6400: Enable 01.0 device in devicetree for dGPU
+ models
 
 Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
diff --git a/config/coreboot/dell/patches/0019-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/dell/patches/0005-Remove-warning-for-coreboot-images-built-without-a-p.patch
similarity index 75%
rename from config/coreboot/dell/patches/0019-Remove-warning-for-coreboot-images-built-without-a-p.patch
rename to config/coreboot/dell/patches/0005-Remove-warning-for-coreboot-images-built-without-a-p.patch
index 3f21ad02..546bad7f 100644
--- a/config/coreboot/dell/patches/0019-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ b/config/coreboot/dell/patches/0005-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -1,7 +1,7 @@
-From 7d5452bc3358cf82eea48fde312494bcb4ca8101 Mon Sep 17 00:00:00 2001
+From de4eeaf6d44cb05c60c0b0d54b43cdb88686b998 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 19/22] Remove warning for coreboot images built without a
+Subject: [PATCH 5/9] Remove warning for coreboot images built without a
  payload
 
 I added this in upstream to prevent people from accidentally flashing
@@ -9,19 +9,19 @@ roms without a payload resulting in a no boot situation, but in
 libreboot lbmk handles the payload and thus this warning always comes
 up. This has caused confusion and concern so just patch it out.
 ---
- payloads/Makefile.inc | 13 +------------
+ payloads/Makefile.mk | 13 +------------
  1 file changed, 1 insertion(+), 12 deletions(-)
 
-diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc
-index e735443a76..4f1692a873 100644
---- a/payloads/Makefile.inc
-+++ b/payloads/Makefile.inc
+diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
+index a2336aa876..4f1692a873 100644
+--- a/payloads/Makefile.mk
++++ b/payloads/Makefile.mk
 @@ -49,16 +49,5 @@ distclean-payloads:
  print-repo-info-payloads:
  	-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
  
 -ifeq ($(CONFIG_PAYLOAD_NONE),y)
--files_added:: warn_no_payload
+-show_notices:: warn_no_payload
 -endif
 -
 -warn_no_payload:
diff --git a/config/coreboot/dell/patches/0024-don-t-use-github-for-the-acpica-download.patch b/config/coreboot/dell/patches/0006-don-t-use-github-for-the-acpica-download.patch
similarity index 89%
rename from config/coreboot/dell/patches/0024-don-t-use-github-for-the-acpica-download.patch
rename to config/coreboot/dell/patches/0006-don-t-use-github-for-the-acpica-download.patch
index 2c4c9e5f..3ee38c29 100644
--- a/config/coreboot/dell/patches/0024-don-t-use-github-for-the-acpica-download.patch
+++ b/config/coreboot/dell/patches/0006-don-t-use-github-for-the-acpica-download.patch
@@ -1,7 +1,7 @@
-From cddb709fd01e3e93a7879488d0d4024360e1e3d9 Mon Sep 17 00:00:00 2001
+From 261454e47783b973b088e9dbea47bda02758dcb4 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 22 Oct 2023 15:02:25 +0100
-Subject: [PATCH 1/1] don't use github for the acpica download
+Subject: [PATCH 6/9] don't use github for the acpica download
 
 i have the tarball from a previous download, and i placed
 it on libreboot rsync, which then got mirrored to princeton.
@@ -22,7 +22,7 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index ebc9fcb49a..a857110b4b 100755
+index 23a5caf2bb..36565a906c 100755
 --- a/util/crossgcc/buildgcc
 +++ b/util/crossgcc/buildgcc
 @@ -72,7 +72,7 @@ MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
diff --git a/config/coreboot/dell/patches/0029-use-mirrorservice.org-for-gcc-downloads.patch b/config/coreboot/dell/patches/0007-use-mirrorservice.org-for-gcc-downloads.patch
similarity index 89%
rename from config/coreboot/dell/patches/0029-use-mirrorservice.org-for-gcc-downloads.patch
rename to config/coreboot/dell/patches/0007-use-mirrorservice.org-for-gcc-downloads.patch
index 2e653f83..ff481081 100644
--- a/config/coreboot/dell/patches/0029-use-mirrorservice.org-for-gcc-downloads.patch
+++ b/config/coreboot/dell/patches/0007-use-mirrorservice.org-for-gcc-downloads.patch
@@ -1,7 +1,7 @@
-From 89c47fad6e97fc6a7113ebbdedfcc42ae2b6fc7f Mon Sep 17 00:00:00 2001
+From 622daa7c46de01530de60a7be32c8b9e48b356fd Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 22:57:08 +0000
-Subject: [PATCH 1/1] use mirrorservice.org for gcc downloads
+Subject: [PATCH 7/9] use mirrorservice.org for gcc downloads
 
 the gnu.org 302 redirect often fails
 
@@ -11,7 +11,7 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 5 insertions(+), 5 deletions(-)
 
 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 87f80ba7f6..b3aad5df7d 100755
+index 36565a906c..4d4ca06113 100755
 --- a/util/crossgcc/buildgcc
 +++ b/util/crossgcc/buildgcc
 @@ -67,11 +67,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
diff --git a/config/coreboot/dell/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch b/config/coreboot/dell/patches/0008-nb-intel-gm45-Make-DDR2-raminit-work.patch
similarity index 85%
rename from config/coreboot/dell/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch
rename to config/coreboot/dell/patches/0008-nb-intel-gm45-Make-DDR2-raminit-work.patch
index 454e3e7b..8de8060f 100644
--- a/config/coreboot/dell/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch
+++ b/config/coreboot/dell/patches/0008-nb-intel-gm45-Make-DDR2-raminit-work.patch
@@ -1,7 +1,7 @@
-From e047dc3c95063f27517cd6754e9cbe496ac9313d Mon Sep 17 00:00:00 2001
+From f26df5dff7be4b0c9d8dced1cf6ed07472a174c7 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Mon, 10 May 2021 22:40:59 +0200
-Subject: [PATCH] [NOT FOR MERGE] nb/intel/gm45: Make DDR2 raminit work
+Subject: [PATCH 8/9] nb/intel/gm45: Make DDR2 raminit work
 
 List of changes:
  - Update some timing and ODT values
@@ -14,12 +14,16 @@ Tested on Toshiba Satellite A300-1ME with two 2 GiB DDR2-800 SO-DIMMs.
 Change-Id: Ibaee524b8ff652ddadd66cb0eb680401b988ff7c
 Signed-off-by: Angel Pons <th3fanbus@gmail.com>
 ---
+ src/northbridge/intel/gm45/gm45.h             |  2 +-
+ src/northbridge/intel/gm45/raminit.c          | 90 +++++++++++++++++--
+ .../intel/gm45/raminit_rcomp_calibration.c    | 27 ++++--
+ 3 files changed, 106 insertions(+), 13 deletions(-)
 
 diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
-index f28c6d1..bdf0432 100644
+index d929533d92..997f8a0e5a 100644
 --- a/src/northbridge/intel/gm45/gm45.h
 +++ b/src/northbridge/intel/gm45/gm45.h
-@@ -419,7 +419,7 @@
+@@ -419,7 +419,7 @@ void igd_compute_ggc(sysinfo_t *const sysinfo);
  int raminit_read_vco_index(void);
  u32 raminit_get_rank_addr(unsigned int channel, unsigned int rank);
  
@@ -29,10 +33,10 @@ index f28c6d1..bdf0432 100644
  void raminit_receive_enable_calibration(int ddr_type, const timings_t *, const dimminfo_t *);
  void raminit_write_training(const mem_clock_t, const dimminfo_t *, int s3resume);
 diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
-index ecada7b..2b8c44e 100644
+index b7e013959a..df8f46fbbc 100644
 --- a/src/northbridge/intel/gm45/raminit.c
 +++ b/src/northbridge/intel/gm45/raminit.c
-@@ -1049,7 +1049,7 @@
+@@ -1047,7 +1047,7 @@ static void rcomp_initialization(const int spd_type, const stepping_t stepping,
  	}
  
  	/* Perform RCOMP calibration for DDR3. */
@@ -41,7 +45,7 @@ index ecada7b..2b8c44e 100644
  
  	/* Run initial RCOMP. */
  	mchbar_setbits32(0x418, 1 << 17);
-@@ -1119,7 +1119,7 @@
+@@ -1117,7 +1117,7 @@ static void dram_program_timings(const int spd_type, const timings_t *const timi
  				reg = (reg & ~(0xf << 10)) | (2 << 10);
  			else
  				reg = (reg & ~(0xf << 10)) | (3 << 10);
@@ -50,7 +54,7 @@ index ecada7b..2b8c44e 100644
  		} else if (timings->mem_clock != MEM_CLOCK_1067MT) {
  			reg = (reg & ~(0x7 << 15)) | ((9 - timings->CAS) << 15);
  			reg = (reg & ~(0xf << 10)) | ((timings->CAS - 3) << 10);
-@@ -1288,11 +1288,11 @@
+@@ -1286,11 +1286,11 @@ static void ddr2_odt_setup(const timings_t *const timings, const int sff)
  		reg = (reg & ~(0xf << (44 - 32))) | (8 << (44 - 32));
  		reg = (reg & ~(0xf << (40 - 32))) | (7 << (40 - 32));
  		if (timings->mem_clock == MEM_CLOCK_667MT) {
@@ -66,7 +70,7 @@ index ecada7b..2b8c44e 100644
  		}
  		mchbar_write32(CxODT_HIGH(ch), reg);
  
-@@ -2217,6 +2217,84 @@
+@@ -2209,6 +2209,84 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
  		raminit_write_training(timings->mem_clock, dimms, s3resume);
  	}
  
@@ -152,10 +156,10 @@ index ecada7b..2b8c44e 100644
  
  	/* Program final memory map (with real values). */
 diff --git a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
-index aef863f..b74765f 100644
+index aef863f05a..b74765fd9c 100644
 --- a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
 +++ b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
-@@ -161,11 +161,13 @@
+@@ -161,11 +161,13 @@ static void lookup_and_write(const int a1step,
  		mchbar += 4;
  	}
  }
@@ -170,7 +174,7 @@ index aef863f..b74765f 100644
  	enum {
  		PULL_UP = 0,
  		PULL_DOWN = 1,
-@@ -196,6 +198,10 @@
+@@ -196,6 +198,10 @@ void raminit_rcomp_calibration(const stepping_t stepping) {
  		reg = mchbar_read32(0x518);
  		lut_idx[channel][group][PULL_UP] = (reg >> 24) & 0x7f;
  		lut_idx[channel][group][PULL_DOWN] = (reg >> 16) & 0x7f;
@@ -181,7 +185,7 @@ index aef863f..b74765f 100644
  	}
  	/* Cleanup? */
  	mchbar_setbits32(0x400, 1 << 3);
-@@ -216,13 +222,19 @@
+@@ -216,13 +222,19 @@ void raminit_rcomp_calibration(const stepping_t stepping) {
  	for (channel = 0; channel < 2; ++channel) {
  		for (group = 0; group < 6; ++group) {
  			for (pu_pd = PULL_DOWN; pu_pd >= PULL_UP; --pu_pd) {
@@ -206,7 +210,7 @@ index aef863f..b74765f 100644
  			mchbar += 0x0010;
  			/* Channel B knows only the first two groups. */
  			if ((1 == channel) && (1 == group))
-@@ -230,4 +242,7 @@
+@@ -230,4 +242,7 @@ void raminit_rcomp_calibration(const stepping_t stepping) {
  		}
  		mchbar += 0x0040;
  	}
@@ -214,3 +218,6 @@ index aef863f..b74765f 100644
 +	mchbar_clrsetbits32(0x4d0, 0x3f << 26, magic_comp[0] << 26);
 +	mchbar_clrsetbits32(0x4d0, 0x3f << 20, magic_comp[1] << 20);
  }
+-- 
+2.39.2
+
diff --git a/config/coreboot/dell/patches/0028-dell-e6400-crank-up-vram-to-256MB-max.patch b/config/coreboot/dell/patches/0009-dell-e6400-crank-up-vram-to-256MB-max.patch
similarity index 82%
rename from config/coreboot/dell/patches/0028-dell-e6400-crank-up-vram-to-256MB-max.patch
rename to config/coreboot/dell/patches/0009-dell-e6400-crank-up-vram-to-256MB-max.patch
index 2c23ab0b..8d48bfd9 100644
--- a/config/coreboot/dell/patches/0028-dell-e6400-crank-up-vram-to-256MB-max.patch
+++ b/config/coreboot/dell/patches/0009-dell-e6400-crank-up-vram-to-256MB-max.patch
@@ -1,7 +1,7 @@
-From 1116145917035a92cc92a34e6a914a9506d17680 Mon Sep 17 00:00:00 2001
+From f318da0563ecb2386ac368e04bad88a8aacbc83d Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Wed, 1 Nov 2023 16:33:11 +0000
-Subject: [PATCH 1/1] dell/e6400: crank up vram to 256MB (max)
+Subject: [PATCH 9/9] dell/e6400: crank up vram to 256MB (max)
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
diff --git a/config/coreboot/dell/patches/0020-ec-dell-mec5035-Add-command-to-enable-disable-radios.patch b/config/coreboot/dell/patches/0020-ec-dell-mec5035-Add-command-to-enable-disable-radios.patch
deleted file mode 100644
index 2f2cddfe..00000000
--- a/config/coreboot/dell/patches/0020-ec-dell-mec5035-Add-command-to-enable-disable-radios.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From f0db13a15c76c2947eec8919fd121450048914ce Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sun, 27 Aug 2023 17:36:36 -0600
-Subject: [PATCH 20/22] ec/dell/mec5035: Add command to enable/disable radios
-
-These were determined by sniffing the LPC bus while toggling the
-hardware wireless switch on the Latitude E6400. To differentiate devices
-options in the vendor BIOS to change which radios the switch controlled
-were used.
-
-Change-Id: I173dc197d63cda232dd7ede0cb798ab0a364482b
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/ec/dell/mec5035/mec5035.c | 9 +++++++++
- src/ec/dell/mec5035/mec5035.h | 8 ++++++++
- 2 files changed, 17 insertions(+)
-
-diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
-index 8da11e5b1c..e0335a4635 100644
---- a/src/ec/dell/mec5035/mec5035.c
-+++ b/src/ec/dell/mec5035/mec5035.c
-@@ -84,6 +84,15 @@ u8 mec5035_mouse_touchpad(u8 setting)
- 	return buf[0];
- }
- 
-+void mec5035_radio_enable(enum mec5035_radio_dev dev, u8 on)
-+{
-+	/* From LPC traces and userspace testing with other values,
-+	   the second byte has to be 2 for an unknown reason. */
-+	u8 buf[3] = {dev, 2, on};
-+	write_mailbox_regs(buf, 2, 3);
-+	ec_command(CMD_RADIO_EN);
-+}
-+
- void mec5035_early_init(void)
- {
- 	/* If this isn't sent the EC shuts down the system after about 15
-diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
-index e7a05b64d4..16512e2cc2 100644
---- a/src/ec/dell/mec5035/mec5035.h
-+++ b/src/ec/dell/mec5035/mec5035.h
-@@ -16,8 +16,16 @@
- 
- #define CMD_CPU_OK	0xc2
- 
-+#define CMD_RADIO_EN	0x2b
-+enum mec5035_radio_dev {
-+	RADIO_WLAN = 0,
-+	RADIO_WWAN = 1,
-+	RADIO_WPAN = 2,
-+};
-+
- u8 mec5035_mouse_touchpad(u8 setting);
- void mec5035_cpu_ok(void);
- void mec5035_early_init(void);
-+void mec5035_radio_enable(enum mec5035_radio_dev device, u8 on);
- 
- #endif /* _EC_DELL_MEC5035_H_ */
--- 
-2.39.2
-
diff --git a/config/coreboot/dell/patches/0021-ec-dell-mec5035-Hook-up-radio-enables-to-option-API.patch b/config/coreboot/dell/patches/0021-ec-dell-mec5035-Hook-up-radio-enables-to-option-API.patch
deleted file mode 100644
index d02ad724..00000000
--- a/config/coreboot/dell/patches/0021-ec-dell-mec5035-Hook-up-radio-enables-to-option-API.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 4537c365dae010645404fdb5d2d4e5f478dede67 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sun, 27 Aug 2023 19:15:37 -0600
-Subject: [PATCH 21/22] ec/dell/mec5035: Hook up radio enables to option API
-
-Change-Id: I52de5ea3d24b400a93adee7a6207a4439eac61db
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/ec/dell/mec5035/mec5035.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
-index e0335a4635..20a33cc0ad 100644
---- a/src/ec/dell/mec5035/mec5035.c
-+++ b/src/ec/dell/mec5035/mec5035.c
-@@ -4,6 +4,7 @@
- #include <console/console.h>
- #include <device/device.h>
- #include <device/pnp.h>
-+#include <option.h>
- #include <pc80/keyboard.h>
- #include <stdint.h>
- #include "mec5035.h"
-@@ -108,6 +109,10 @@ static void mec5035_init(struct device *dev)
- 	mec5035_mouse_touchpad(TP_PS2_MOUSE);
- 
- 	pc_keyboard_init(NO_AUX_DEVICE);
-+
-+	mec5035_radio_enable(RADIO_WLAN, get_uint_option("wlan", 1));
-+	mec5035_radio_enable(RADIO_WWAN, get_uint_option("wwan", 1));
-+	mec5035_radio_enable(RADIO_WPAN, get_uint_option("bluetooth", 1));
- }
- 
- static struct device_operations ops = {
--- 
-2.39.2
-
diff --git a/config/coreboot/dell/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch b/config/coreboot/dell/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
deleted file mode 100644
index cca8901f..00000000
--- a/config/coreboot/dell/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
+++ /dev/null
@@ -1,341 +0,0 @@
-From f1b5b0051718139cf59ad047d42d1360b8452ec5 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 29 Oct 2023 01:18:50 +0000
-Subject: [PATCH 1/1] Revert "Kconfig: Bring HEAP_SIZE to a common, large
- value"
-
-This reverts commit 44a48ce7a46c36df69f7b2cf3552bf10fa5f61b6.
-
-NOTE:
-
-this is done instead of merging:
-https://review.coreboot.org/c/coreboot/+/78623
-
-which is still under review for now
-
-the patch i'm reverting is this one:
-https://review.coreboot.org/c/coreboot/+/78270
-
-this was actually only merged the day before i
-updated coreboot revs in lbmk to the 12 october rev,
-so there's no harm in quickly reverting this for now
-
-however, later on, we will rely on the other patch
----
- src/Kconfig                                   | 3 ++-
- src/cpu/qemu-x86/Kconfig                      | 3 +++
- src/mainboard/sifive/hifive-unleashed/Kconfig | 3 +++
- src/northbridge/amd/pi/Kconfig                | 4 ++++
- src/soc/amd/picasso/Kconfig                   | 4 ++++
- src/soc/amd/stoneyridge/Kconfig               | 4 ++++
- src/soc/cavium/cn81xx/Kconfig                 | 3 +++
- src/soc/intel/alderlake/Kconfig               | 5 +++++
- src/soc/intel/apollolake/Kconfig              | 4 ++++
- src/soc/intel/cannonlake/Kconfig              | 4 ++++
- src/soc/intel/elkhartlake/Kconfig             | 4 ++++
- src/soc/intel/jasperlake/Kconfig              | 4 ++++
- src/soc/intel/meteorlake/Kconfig              | 5 +++++
- src/soc/intel/skylake/Kconfig                 | 4 ++++
- src/soc/intel/tigerlake/Kconfig               | 4 ++++
- src/soc/intel/xeon_sp/Kconfig                 | 4 ++++
- src/soc/intel/xeon_sp/cpx/Kconfig             | 4 ++++
- src/soc/intel/xeon_sp/skx/Kconfig             | 4 ++++
- src/soc/intel/xeon_sp/spr/Kconfig             | 4 ++++
- src/soc/qualcomm/ipq40xx/Kconfig              | 4 ++++
- 20 files changed, 77 insertions(+), 1 deletion(-)
-
-diff --git a/src/Kconfig b/src/Kconfig
-index ae8024089e..1549719dd0 100644
---- a/src/Kconfig
-+++ b/src/Kconfig
-@@ -751,7 +751,8 @@ config RTC
- 
- config HEAP_SIZE
- 	hex
--	default 0x100000
-+	default 0x100000 if FLATTENED_DEVICE_TREE
-+	default 0x4000
- 
- config STACK_SIZE
- 	hex
-diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
-index 0fa999e1ac..f3e2c4cea9 100644
---- a/src/cpu/qemu-x86/Kconfig
-+++ b/src/cpu/qemu-x86/Kconfig
-@@ -35,4 +35,7 @@ config MAX_CPUS
- 	default 32 if SMM_TSEG
- 	default 4
- 
-+config HEAP_SIZE
-+	default 0x8000
-+
- endif
-diff --git a/src/mainboard/sifive/hifive-unleashed/Kconfig b/src/mainboard/sifive/hifive-unleashed/Kconfig
-index 7bc3b0bcbb..7f9300f2a7 100644
---- a/src/mainboard/sifive/hifive-unleashed/Kconfig
-+++ b/src/mainboard/sifive/hifive-unleashed/Kconfig
-@@ -10,6 +10,9 @@ config BOARD_SPECIFIC_OPTIONS
- 	select FLATTENED_DEVICE_TREE
- 	select SPI_SDCARD
- 
-+config HEAP_SIZE
-+	default 0x10000
-+
- config MAINBOARD_DIR
- 	default "sifive/hifive-unleashed"
- 
-diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
-index 4ffe82a15f..4518db149b 100644
---- a/src/northbridge/amd/pi/Kconfig
-+++ b/src/northbridge/amd/pi/Kconfig
-@@ -29,4 +29,8 @@ config HW_MEM_HOLE_SIZEK
- 	hex
- 	default 0x200000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0xc0000
-+
- endif # NORTHBRIDGE_AMD_PI
-diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
-index c33f287067..796fe4eb13 100644
---- a/src/soc/amd/picasso/Kconfig
-+++ b/src/soc/amd/picasso/Kconfig
-@@ -264,6 +264,10 @@ config S3_VGA_ROM_RUN
- 	bool
- 	default n
- 
-+config HEAP_SIZE
-+	hex
-+	default 0xc0000
-+
- config SERIRQ_CONTINUOUS_MODE
- 	bool
- 	default n
-diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
-index 6ff135e6a8..9af7455bae 100644
---- a/src/soc/amd/stoneyridge/Kconfig
-+++ b/src/soc/amd/stoneyridge/Kconfig
-@@ -152,6 +152,10 @@ config S3_VGA_ROM_RUN
- 	bool
- 	default n
- 
-+config HEAP_SIZE
-+	hex
-+	default 0xc0000
-+
- config EHCI_BAR
- 	hex
- 	default 0xfef00000
-diff --git a/src/soc/cavium/cn81xx/Kconfig b/src/soc/cavium/cn81xx/Kconfig
-index 77ca97202b..368581f8f1 100644
---- a/src/soc/cavium/cn81xx/Kconfig
-+++ b/src/soc/cavium/cn81xx/Kconfig
-@@ -30,6 +30,9 @@ config ARCH_ARMV8_EXTENSION
- 	int
- 	default 1
- 
-+config HEAP_SIZE
-+	default 0x10000
-+
- config STACK_SIZE
- 	default 0x2000
- 
-diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
-index 4b960c1d22..82ec8f263e 100644
---- a/src/soc/intel/alderlake/Kconfig
-+++ b/src/soc/intel/alderlake/Kconfig
-@@ -215,6 +215,11 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x400000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000 if BMP_LOGO
-+	default 0x10000
-+
- config GFX_GMA_DEFAULT_MMIO
- 	default 0xaf000000 if MAINBOARD_HAS_EARLY_LIBGFXINIT
- 
-diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
-index 78ec2987ce..bce935d800 100644
---- a/src/soc/intel/apollolake/Kconfig
-+++ b/src/soc/intel/apollolake/Kconfig
-@@ -252,6 +252,10 @@ config IFWI_FILE_NAME
- 	help
- 	  Name of file to store in the IFWI region.
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- config MAX_ROOT_PORTS
- 	int
- 	default 6
-diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
-index a42a3c365b..80237f9810 100644
---- a/src/soc/intel/cannonlake/Kconfig
-+++ b/src/soc/intel/cannonlake/Kconfig
-@@ -160,6 +160,10 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x400000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- config NHLT_DMIC_1CH_16B
- 	bool
- 	depends on ACPI_NHLT
-diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
-index 3361c0ddb9..7f1c767379 100644
---- a/src/soc/intel/elkhartlake/Kconfig
-+++ b/src/soc/intel/elkhartlake/Kconfig
-@@ -104,6 +104,10 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x0
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- config MAX_ROOT_PORTS
- 	int
- 	default 7
-diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
-index 3d84991e09..ff5def3263 100644
---- a/src/soc/intel/jasperlake/Kconfig
-+++ b/src/soc/intel/jasperlake/Kconfig
-@@ -106,6 +106,10 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x400000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- config MAX_ROOT_PORTS
- 	int
- 	default 8
-diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
-index 590e8b80e1..48030a1911 100644
---- a/src/soc/intel/meteorlake/Kconfig
-+++ b/src/soc/intel/meteorlake/Kconfig
-@@ -197,6 +197,11 @@ config IED_REGION_SIZE
- 	hex
- 	default 0x400000
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000 if BMP_LOGO
-+	default 0x10000
-+
- # Intel recommends reserving the PCIe TBT root port resources as below:
- # - 42 buses
- # - 194 MiB Non-prefetchable memory
-diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
-index e0df501460..d6a11363ee 100644
---- a/src/soc/intel/skylake/Kconfig
-+++ b/src/soc/intel/skylake/Kconfig
-@@ -151,6 +151,10 @@ config EXCLUDE_NATIVE_SD_INTERFACE
- 	help
- 	  If you set this option to n, will not use native SD controller.
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config IED_REGION_SIZE
- 	hex
- 	default 0x400000
-diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
-index c07a0d8365..0a4b7bfdb8 100644
---- a/src/soc/intel/tigerlake/Kconfig
-+++ b/src/soc/intel/tigerlake/Kconfig
-@@ -152,6 +152,10 @@ config IED_REGION_SIZE
- config INTEL_TME
- 	default n
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x10000
-+
- config MAX_ROOT_PORTS
- 	int
- 	default 24 if SOC_INTEL_TIGERLAKE_PCH_H
-diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
-index e63bee5451..63ced01067 100644
---- a/src/soc/intel/xeon_sp/Kconfig
-+++ b/src/soc/intel/xeon_sp/Kconfig
-@@ -91,6 +91,10 @@ config ECAM_MMCONF_BASE_ADDRESS
- config ECAM_MMCONF_BUS_NUMBER
- 	default 256
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config HPET_MIN_TICKS
- 	hex
- 	default 0x80
-diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig
-index ac166c3038..f54f7716b6 100644
---- a/src/soc/intel/xeon_sp/cpx/Kconfig
-+++ b/src/soc/intel/xeon_sp/cpx/Kconfig
-@@ -71,6 +71,10 @@ config CPU_MICROCODE_CBFS_LEN
- 	hex
- 	default 0x7C00
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config STACK_SIZE
- 	hex
- 	default 0x4000
-diff --git a/src/soc/intel/xeon_sp/skx/Kconfig b/src/soc/intel/xeon_sp/skx/Kconfig
-index 5d843878e1..c2c3d4e2e8 100644
---- a/src/soc/intel/xeon_sp/skx/Kconfig
-+++ b/src/soc/intel/xeon_sp/skx/Kconfig
-@@ -55,6 +55,10 @@ config CPU_MICROCODE_CBFS_LEN
- 	hex
- 	default 0x7C00
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config IED_REGION_SIZE
- 	hex
- 	default 0x400000
-diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig
-index 43b87ade14..b1c4c783b7 100644
---- a/src/soc/intel/xeon_sp/spr/Kconfig
-+++ b/src/soc/intel/xeon_sp/spr/Kconfig
-@@ -79,6 +79,10 @@ config CPU_MICROCODE_CBFS_LEN
- 	hex
- 	default 0x8c00
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x80000
-+
- config STACK_SIZE
- 	hex
- 	default 0x4000
-diff --git a/src/soc/qualcomm/ipq40xx/Kconfig b/src/soc/qualcomm/ipq40xx/Kconfig
-index 0ce92731c0..0eabb00752 100644
---- a/src/soc/qualcomm/ipq40xx/Kconfig
-+++ b/src/soc/qualcomm/ipq40xx/Kconfig
-@@ -57,4 +57,8 @@ config SBL_UTIL_PATH
- 	help
- 	  Path for utils to combine SBL_ELF and bootblock
- 
-+config HEAP_SIZE
-+	hex
-+	default 0x8000
-+
- endif
--- 
-2.39.2
-
diff --git a/config/coreboot/dell/target.cfg b/config/coreboot/dell/target.cfg
index 8b2e2277..45176407 100644
--- a/config/coreboot/dell/target.cfg
+++ b/config/coreboot/dell/target.cfg
@@ -1,4 +1,4 @@
 tree="dell"
 tree_depend="default"
 xtree="default"
-rev="d862695f5f432b5c78dada5f16c293a4c3f9fce6"
+rev="b6cbfa977f63d57d5d6b9e9f7c1cef30162f575a"
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
index b961aef0..fcdde6b2 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -150,7 +151,6 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_VGA_BIOS_FILE="../../../pciroms/pci10de,06eb.rom"
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -170,7 +170,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -184,6 +183,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -213,6 +213,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 # CONFIG_VGA_BIOS_SECOND is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -221,14 +222,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -327,6 +329,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -363,7 +367,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -374,8 +378,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -406,6 +408,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -421,6 +424,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -459,6 +466,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -486,6 +494,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -549,6 +558,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
index 7f2b9822..e253feb0 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -148,7 +149,6 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_VGA_BIOS_FILE="../../../pciroms/pci10de,06eb.rom"
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -168,7 +168,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -182,6 +181,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -211,6 +211,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 # CONFIG_VGA_BIOS_SECOND is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -219,14 +220,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -325,6 +327,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -359,7 +363,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -370,8 +374,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -402,6 +404,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -417,6 +420,10 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
 CONFIG_GFX_GMA_DYN_CPU=y
@@ -455,6 +462,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -482,6 +490,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -545,6 +554,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
diff --git a/config/coreboot/e6400nvidia_4mb/config/normal b/config/coreboot/e6400nvidia_4mb/config/normal
index 2743c787..4593f32a 100644
--- a/config/coreboot/e6400nvidia_4mb/config/normal
+++ b/config/coreboot/e6400nvidia_4mb/config/normal
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -147,7 +148,6 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_VGA_BIOS_FILE="../../../pciroms/pci10de,06eb.rom"
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -166,7 +166,6 @@ CONFIG_D3COLD_SUPPORT=y
 # CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -180,6 +179,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=4096
@@ -209,6 +209,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_EXP_X86_64_SUPPORT is not set
 # CONFIG_VGA_BIOS_SECOND is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -217,14 +218,15 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 
 #
 # CPU
@@ -323,6 +325,8 @@ CONFIG_HAVE_EXP_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -347,7 +351,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -358,8 +362,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -390,6 +392,7 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -437,6 +440,7 @@ CONFIG_NO_TPM=y
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
 CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
@@ -464,6 +468,7 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -527,6 +532,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #

From 0a24b2e612e5dbd5edabc5ce2001dd92f47b9776 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 25 Jan 2024 18:39:19 +0000
Subject: [PATCH 0196/1549] dell/e6*30: use generic PS2K/PS2M EISAID strings

CONFIG_PS2M_EISAID. this is a a string used for the
identifier on the mouse, in ACPI.

CONFIG_PS2K_EISAID this is used for the keyboard.

IASL comes back with this build error:

dsdt.asl   1884:   Name(_HID, EISAID("DLLK0534"))
Error    6045 -                              ^ EISAID string must be of the form "UUUXXXX" (3 uppercase, 4 hex digits) (DLLK0534)

Change DLLK0534 back to PNP0303 and
change DLL0534 back to PNP0F13. These are generic identifiers
for PS/2 keyboard and mouse. Any generic driver will work with
the onboard mouse/keyboard on these machines. They do not need
to be changed. These are the default values anyway. Just leave
them explicitly defined to the default values, for now; if these
options are not set, coreboot will default to these values.

This shouldn't break anything for the users. I've reported this
to Nicholas Chin, author of those patches. Libreboot imported
the new versions of E6430/E6530 board patches in the coreboot
revision update, but the new (technically correct) values broke
IASL, so I've decided to use the old values for now.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../patches/0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch  | 4 ++--
 .../0027-rebase-dell-e6530-to-newer-coreboot-code.patch       | 4 ++--
 config/coreboot/e6430_12mb/config/libgfxinit_corebootfb       | 4 ++--
 config/coreboot/e6430_12mb/config/libgfxinit_txtmode          | 4 ++--
 config/coreboot/e6530_12mb/config/libgfxinit_corebootfb       | 4 ++--
 config/coreboot/e6530_12mb/config/libgfxinit_txtmode          | 4 ++--
 6 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch b/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch
index c182ce8c..fecaf88a 100644
--- a/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch
+++ b/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch
@@ -122,10 +122,10 @@ index 0000000000..e4c799803e
 +	default "Latitude E6430"
 +
 +config PS2K_EISAID
-+	default "DLLK0534"
++	default "PNP0303"
 +
 +config PS2M_EISAID
-+	default "DLL0534"
++	default "PNP0F13"
 +
 +config USBDEBUG_HCD_INDEX
 +	default 2
diff --git a/config/coreboot/default/patches/0027-rebase-dell-e6530-to-newer-coreboot-code.patch b/config/coreboot/default/patches/0027-rebase-dell-e6530-to-newer-coreboot-code.patch
index c5d67ae8..130984fb 100644
--- a/config/coreboot/default/patches/0027-rebase-dell-e6530-to-newer-coreboot-code.patch
+++ b/config/coreboot/default/patches/0027-rebase-dell-e6530-to-newer-coreboot-code.patch
@@ -44,12 +44,12 @@ index 582adddbd4..a104566890 100644
 -config VGA_BIOS_ID
 -	default "8086,0166"
 +config PS2K_EISAID
-+	default "DLLK0534"
++	default "PNP0303"
  
 -config DRAM_RESET_GATE_GPIO
 -	default 60
 +config PS2M_EISAID
-+	default "DLL0534"
++	default "PNP0F13"
  
  config USBDEBUG_HCD_INDEX
  	default 2
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 8416f2ef..3254c612 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -139,8 +139,8 @@ CONFIG_BOARD_DELL_LATITUDE_E6430=y
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="DLLK0534"
-CONFIG_PS2M_EISAID="DLL0534"
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index 4614c7fd..c76f2a2f 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -137,8 +137,8 @@ CONFIG_BOARD_DELL_LATITUDE_E6430=y
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="DLLK0534"
-CONFIG_PS2M_EISAID="DLL0534"
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index f730ef20..55e49b43 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -139,8 +139,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_BOARD_DELL_LATITUDE_E6530=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="DLLK0534"
-CONFIG_PS2M_EISAID="DLL0534"
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index 9230658a..f4a09759 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -137,8 +137,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_BOARD_DELL_LATITUDE_E6530=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="DLLK0534"
-CONFIG_PS2M_EISAID="DLL0534"
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"

From e5ebaa856465448ca35b7b2e43b23820b6707eb0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 25 Jan 2024 22:03:06 +0000
Subject: [PATCH 0197/1549] update config/git/docs to latest revs

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/docs | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/config/git/docs b/config/git/docs
index 4679ad72..c408423a 100644
--- a/config/git/docs
+++ b/config/git/docs
@@ -1,5 +1,5 @@
 {docs}{
-	rev: 06ac864b9a738b5daec3736ddb0fb2f94f127ee0
+	rev: 693a4f811d321d81f685a5822caf8d639e778832
 	loc: docs
 	url: https://codeberg.org/vimuser/untitled
 	bkup_url: https://notabug.org/untitled/untitled
@@ -8,7 +8,7 @@
 }
 
 {mdfiles}{
-	rev: 6ebb88528e342cae48ee75a6f1bfa1b71002e1c3
+	rev: 660d9d87c7424c3311d535e6bb6bbeba66bcacbc
 	loc: docs/www/html
 	url: https://codeberg.org/libreboot/lbwww
 	bkup_url: https://git.disroot.org/libreboot/lbwww
@@ -16,14 +16,14 @@
 }
 
 {imgfiles}{
-	rev: 918c0ba07cf45f07836fa8c312fc51b48db32e0a
+	rev: 54aee63ca18400f8de667ab16146f88f47a05488
 	loc: docs/www/html/site/img
 	url: https://codeberg.org/libreboot/lbwww-img
 	bkup_url: https://git.disroot.org/libreboot/lbwww-img
 }
 
 {untitledwww}{
-	rev: 78cdadea40143a7e55b8eae48f4239d31ebb5c16
+	rev: d8e2043c1512eb1171c274559ce82e8093ef393f
 	loc: docs/www/untitled
 	url: https://codeberg.org/vimuser/untitled-website
 	bkup_url: https://notabug.org/untitled/untitled-website

From 39688ebee6b5d734aaef41a3e61edc80007db001 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 26 Jan 2024 09:28:14 +0000
Subject: [PATCH 0198/1549] update/trees: reset xtree/tree_depend before build

in some cases, the build system was needlessly, and sometimes
erroneously, creating crossgcc symlinks, which then caused an
issue, namely:

in lbmk release builds, dell e6400 is build before fam15h boards,
and it sets xtree, but fam15h_rdimm doesn't, and later this would
cause fam15h_rdimm boards to use xtree="default" (because they don't
set xtree), causing the newer toolchain to be used on coreboot 4.11.

this patch fixes the issue. quite a simple problem, actually.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/update/trees | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/script/update/trees b/script/update/trees
index 100f5f15..51ea821c 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -150,7 +150,8 @@ handle_src_tree()
 
 load_project_config()
 {
-	eval "$(setvars "" xarch xlang tree bootstrapargs autoconfargs)"
+	eval "$(setvars "" xarch xlang tree bootstrapargs autoconfargs \
+	    xtree tree_depend)"
 
 	[ -f "${1}/target.cfg" ] || return 0
 	. "${1}/target.cfg" || \

From 9071160c7a52bd9eda406bb5c5e450aeca541a31 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 26 Jan 2024 11:15:23 +0000
Subject: [PATCH 0199/1549] git.sh: also reset xtree/tree_depend here

it's still necessary here, to prevent the same bug
identified in the previous patch.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/git.sh b/include/git.sh
index b19e02b6..1fb8046d 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -30,6 +30,7 @@ fetch_from_upstream()
 fetch_config()
 {
 	rm -f "${cfgsdir}/"*/seen || err "fetch_config ${cfgsdir}: !rm seen"
+	eval "$(setvars "" xtree tree_depend)"
 	while true; do
 		eval "$(setvars "" rev tree)"
 		_xm="fetch_config ${project}/${_target}"
@@ -62,6 +63,8 @@ prepare_new_tree()
 
 fetch_project_repo()
 {
+	eval "$(setvars "" xtree tree_depend)"
+
 	scan_config "${project}" "config/git" "err"
 	[ -z "${loc+x}" ] && err "fetch_project_repo $project: loc not set"
 	[ -z "${url+x}" ] && err "fetch_project_repo $project: url not set"

From 7f0ca5455a43fd711787adce0de880212b9159d0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 25 Jan 2024 22:05:17 +0000
Subject: [PATCH 0200/1549] Libreboot 20240126

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../0002-say-the-name-libreboot-in-the-grub-menu.patch          | 2 +-
 script/update/release                                           | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 2729ed61..29f5d3c1 100644
--- a/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..31308e16a 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20231106 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20240126 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/script/update/release b/script/update/release
index 6182bd1c..26592787 100755
--- a/script/update/release
+++ b/script/update/release
@@ -202,7 +202,7 @@ mktarball()
 		mkdir -p "${2%/*}" || err "mk, !mkdir -p \"${2%/*}\""
 	if [ "${tar_implementation% *}" = "tar (GNU tar)" ]; then
 		tar --sort=name --owner=root:0 --group=root:0 \
-		    --mtime="UTC 2023-11-06" -c "$1" | xz -T0 -9e > "$2" || \
+		    --mtime="UTC 2024-01-26" -c "$1" | xz -T0 -9e > "$2" || \
 		    err "mktarball 1, ${1}"
 	else
 		# TODO: reproducible tarballs on non-GNU systems

From af82d67183bbcc7223f61d9d72016bdd3277a614 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Jan 2024 21:34:21 +0000
Subject: [PATCH 0201/1549] config/git: use flashprog instead of flashrom

Nico Huber is the rightful project lead. I do not support
the coup that occured within the flashrom project. Nico
has always been of great service to the Libreboot project,
by virtue of his work on both coreboot and flashrom.

Nico Huber was unfairly removed from the flashrom project
infrastructure, due to unfounded accusations hurled at him
by flashrom's new project lead. The accusations are unfounded
because no evidence was given.

Use Nico Huber's fork, named flashprog. We will work with
flashprog from now on.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/flashprog | 6 ++++++
 config/git/flashrom  | 6 ------
 2 files changed, 6 insertions(+), 6 deletions(-)
 create mode 100644 config/git/flashprog
 delete mode 100644 config/git/flashrom

diff --git a/config/git/flashprog b/config/git/flashprog
new file mode 100644
index 00000000..12105361
--- /dev/null
+++ b/config/git/flashprog
@@ -0,0 +1,6 @@
+{flashprog}{
+	rev: ddb6d926783d4f9cbee04c7392718ed8f89daa0e
+	loc: flashprog
+	url: https://review.sourcearcade.org/flashprog
+	bkup_url: https://github.com/SourceArcade/flashprog.git
+}
diff --git a/config/git/flashrom b/config/git/flashrom
deleted file mode 100644
index 2b6fb574..00000000
--- a/config/git/flashrom
+++ /dev/null
@@ -1,6 +0,0 @@
-{flashrom}{
-	rev: 05c629be2964bcee368c03d805747da15281856d
-	loc: flashrom 
-	url: https://review.coreboot.org/flashrom.git
-	bkup_url: https://github.com/flashrom/flashrom
-}

From 4131981c0afb054a2db106cfc7956aa60c9dcaea Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Jan 2024 21:47:30 +0000
Subject: [PATCH 0202/1549] update debian dependencies for flashprog

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/debian | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/config/dependencies/debian b/config/dependencies/debian
index f40d9b0d..33902f19 100755
--- a/config/dependencies/debian
+++ b/config/dependencies/debian
@@ -4,9 +4,9 @@ acpica-tools autoconf autogen automake autopoint autotools-dev bc \
 binutils-arm-none-eabi bison build-essential cmake curl device-tree-compiler \
 doxygen e2fsprogs efitools flex fonts-unifont gawk gcc-arm-linux-gnueabi \
 gcc-arm-none-eabi gdb gettext git gnat help2man innoextract libdevmapper-dev \
-libfdt-dev libfont-freetype-perl libfreetype-dev libftdi-dev libfuse-dev \
-libgnutls28-dev liblz4-tool liblzma-dev libncurses5-dev libncurses-dev \
-libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev libpython3-dev \
+libfdt-dev libfont-freetype-perl libfreetype-dev libftdi-dev libftdi1-dev libfuse-dev \
+libjaylink-dev libgnutls28-dev libgpiod-dev liblz4-tool liblzma-dev libncurses5-dev
+libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev libpython3-dev \
 libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0 libusb-1.0-0-dev \
 libusb-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted pciutils \
 perl pkg-config python3 python3-distutils python3-pkg-resources python3-pycryptodome \

From e8523864354e80960eaceb2aa618a2ab3ddca1b8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Jan 2024 21:51:37 +0000
Subject: [PATCH 0203/1549] update trisquel dependencies for flashprog

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/trisquel | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/config/dependencies/trisquel b/config/dependencies/trisquel
index 93e7dd5a..1ae9a80b 100755
--- a/config/dependencies/trisquel
+++ b/config/dependencies/trisquel
@@ -4,7 +4,8 @@ autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \
 bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \
 flex gawk gcc-arm-linux-gnueabi gcc-arm-none-eabi gdb gettext git gnat help2man \
 innoextract libdevmapper-dev libfdt-dev libfont-freetype-perl libfreetype6-dev \
-libftdi-dev libfuse-dev libgnutls28-dev liblz4-tool liblzma-dev libncurses5-dev \
+libftdi-dev libfuse-dev libgnutls28-dev libgpiod-dev libjaylink-dev liblz4-tool \
+liblzma-dev libncurses5-dev \
 libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev \
 libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \
 libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \

From 182a029f0cbae405ea310576b391b953456af49d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Jan 2024 22:05:08 +0000
Subject: [PATCH 0204/1549] update arch dependencies for flashprog

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/arch | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/config/dependencies/arch b/config/dependencies/arch
index c0635d41..cfe69ac7 100644
--- a/config/dependencies/arch
+++ b/config/dependencies/arch
@@ -3,7 +3,8 @@ pkglist=" \
 acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
 autogen base-devel bison cmake curl device-mapper doxygen \
 dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \
-help2man innoextract libftdi libpciaccess libusb nasm ncurses openssl p7zip \
+help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \
+ncurses openssl p7zip \
 pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
 sharutils subversion swig texinfo ttf-dejavu unarchiver unzip wget xz zlib \
 "

From 36ddd6f6580a9e9db6e93d57f5b0d5811578be16 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Jan 2024 22:06:06 +0000
Subject: [PATCH 0205/1549] update parabola dependencies for flashprog

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/parabola | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/config/dependencies/parabola b/config/dependencies/parabola
index 8a1550de..27dd59c4 100644
--- a/config/dependencies/parabola
+++ b/config/dependencies/parabola
@@ -3,7 +3,8 @@ pkglist=" \
 acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
 autogen base-devel bdf-unifont bison cmake curl device-mapper doxygen \
 dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \
-help2man innoextract libftdi libpciaccess libusb nasm ncurses openssl p7zip \
+help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \
+ncurses openssl p7zip \
 pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
 sharutils subversion swig texinfo ttf-dejavu unarchiver unifont-utils unzip \
 wget xz zlib \

From 77770f5ad8d1cbe7aa505d4933230e65739e1b20 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Jan 2024 22:37:39 +0000
Subject: [PATCH 0206/1549] remove remaining flashrom remnants (use flashprog)

we use flashprog now!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 README.md                                     |  2 +-
 ...-implicit-typecast-fixes-build-error.patch | 38 -------------------
 util/dell-flash-unlock/README.md              |  8 ++--
 3 files changed, 5 insertions(+), 43 deletions(-)
 delete mode 100644 config/flashrom/patches/0001-fix-implicit-typecast-fixes-build-error.patch

diff --git a/README.md b/README.md
index 94c8824b..df1945ca 100644
--- a/README.md
+++ b/README.md
@@ -81,7 +81,7 @@ automating much of the coreboot image creation and customization.
 Secondly, the project produces documentation aimed at non-technical users.
 Thirdly, the project attempts to provide excellent user support via IRC.
 
-Libreboot already comes with a payload (GRUB), flashrom and other
+Libreboot already comes with a payload (GRUB), flashprog and other
 needed parts. Everything is fully integrated, in a way where most of
 the complicated steps that are otherwise required, are instead done
 for the user in advance.
diff --git a/config/flashrom/patches/0001-fix-implicit-typecast-fixes-build-error.patch b/config/flashrom/patches/0001-fix-implicit-typecast-fixes-build-error.patch
deleted file mode 100644
index f8cf4be2..00000000
--- a/config/flashrom/patches/0001-fix-implicit-typecast-fixes-build-error.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 2d3124cf3c6c2e2de351fcafc572b19565b1d2a5 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 24 Dec 2023 08:52:55 +0000
-Subject: [PATCH 1/1] fix implicit typecast (fixes build error)
-
-typecasting an enum as (unsigned) should be safe
-
-Change-Id: Ib9d00d39020fef255eb4276bcc7d85c9973caed1
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- libflashrom.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/libflashrom.c b/libflashrom.c
-index 0dec22ee..fb7d22a8 100644
---- a/libflashrom.c
-+++ b/libflashrom.c
-@@ -188,7 +188,7 @@ struct flashrom_board_info *flashrom_supported_boards(void)
- 		for (; i < boards_known_size; ++i) {
- 			supported_boards[i].vendor = binfo[i].vendor;
- 			supported_boards[i].name = binfo[i].name;
--			supported_boards[i].working = binfo[i].working;
-+			supported_boards[i].working = (unsigned) binfo[i].working;
- 		}
- 	} else {
- 		msg_gerr("Memory allocation error!\n");
-@@ -226,7 +226,7 @@ struct flashrom_chipset_info *flashrom_supported_chipsets(void)
- 			supported_chipsets[i].chipset = chipset[i].device_name;
- 			supported_chipsets[i].vendor_id = chipset[i].vendor_id;
- 			supported_chipsets[i].chipset_id = chipset[i].device_id;
--			supported_chipsets[i].status = chipset[i].status;
-+			supported_chipsets[i].status = (unsigned) chipset[i].status;
- 	  }
- 	} else {
- 		msg_gerr("Memory allocation error!\n");
--- 
-2.39.2
-
diff --git a/util/dell-flash-unlock/README.md b/util/dell-flash-unlock/README.md
index f7b6ae33..9c7d292c 100644
--- a/util/dell-flash-unlock/README.md
+++ b/util/dell-flash-unlock/README.md
@@ -1,6 +1,6 @@
 # Dell Laptop Internal Flashing
 
-This utility allows you to use flashrom's internal programmer to program the
+This utility allows you to use flashprog's internal programmer to program the
 entire BIOS flash chip from software while still running the original Dell
 BIOS, which normally restricts software writes to the flash chip. It seems like
 this works on any Dell laptop that has an EC similar to the SMSC MEC5035 on the
@@ -55,7 +55,7 @@ please test the utility and report whether or not it actually works for you.
   for the first time, which will tell the EC to set the descriptor override on
   the next boot. Then you will need to shut down the system, after which the
   system will automatically boot up. You should then re-run the utility to
-  disable SMM, after which you can run flashrom. Finally, you should run the
+  disable SMM, after which you can run flashprog. Finally, you should run the
   utility a third time to reenable SMM so that shutdown works properly
   afterwards.
 - On 1st Generation Intel Core systems such as the E6410 and newer, run the
@@ -78,7 +78,7 @@ each region of the flash, which are enforced by the chipset.
 
 On the Latitude E6400, the host has read-only access to the IFD, no access to
 the ME region, and read-write access to the PD, GBE, and BIOS regions. In order
-for flashrom to write to the entire flash internally, the host needs full
+for flashprog to write to the entire flash internally, the host needs full
 permissions to all of these regions. Since the IFD is read only, we cannot
 change these permissions unless we directly access the chip using an external
 programmer, which defeats the purpose of internal flashing.
@@ -107,7 +107,7 @@ that the BIOSWE bit was never set to 1.  Unfortunately, the BLE bit cannot be
 set back to 0 once it is set to 1, so this functionality cannot be disabled
 after it is first enabled by the BIOS.
 
-Older versions of the E6400 BIOS did not set the BLE bit, allowing flashrom to
+Older versions of the E6400 BIOS did not set the BLE bit, allowing flashprog to
 flash the entire flash chip internally after only setting the descriptor
 override. However, more recent versions do set it, so we may have hit a dead
 end unless we force downgrade to an older version (though there is a more

From 112d2a4e696d319a52fa1b4bebd790b31e58c30e Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sun, 28 Jan 2024 02:01:36 +0200
Subject: [PATCH 0207/1549] flashprog: apply the good old MX25 workaround

---
 .../0001-Workaround-for-MX25-chips.patch      | 87 +++++++++++++++++++
 1 file changed, 87 insertions(+)
 create mode 100644 config/flashprog/patches/0001-Workaround-for-MX25-chips.patch

diff --git a/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch b/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch
new file mode 100644
index 00000000..b4fd904b
--- /dev/null
+++ b/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch
@@ -0,0 +1,87 @@
+From 294433aeac82764ea22caf0c17b05cf4127aaa19 Mon Sep 17 00:00:00 2001
+From: consts <grudnevkv@gmail.com>
+Date: Fri, 2 Mar 2018 07:03:37 +0000
+Subject: [PATCH] Workaround for MX25 chips
+
+TEST: In-system programming a ThinkPad X200 using a clip and
+pico-serprog works now. It just doesn't without this hack.
+
+Chip: MX25L6405D
+
+Tested-by: Riku Viitanen <riku.viitanen@protonmail.com>
+Change-Id: I43a306b67862b59c1dcd02729e189f3bf73f481b
+---
+ cli_classic.c        | 5 +++++
+ include/programmer.h | 1 +
+ spi.c                | 9 +++++++++
+ 3 files changed, 15 insertions(+)
+
+diff --git a/cli_classic.c b/cli_classic.c
+index 1ffe4dd..3b50d23 100644
+--- a/cli_classic.c
++++ b/cli_classic.c
+@@ -67,6 +67,7 @@ static void cli_classic_usage(const char *name)
+ 	       " -o | --output <logfile>            log output to <logfile>\n"
+ 	       "      --flash-contents <ref-file>   assume flash contents to be <ref-file>\n"
+ 	       " -L | --list-supported              print supported devices\n"
++	       " -m | --workaround-mx               keep flash busy before sending command\n"
+ #if CONFIG_PRINT_WIKI == 1
+ 	       " -z | --list-supported-wiki         print supported devices in wiki syntax\n"
+ #endif
+@@ -290,6 +291,7 @@ int main(int argc, char *argv[])
+ 		{"help",		0, NULL, 'h'},
+ 		{"version",		0, NULL, 'R'},
+ 		{"output",		1, NULL, 'o'},
++		{"workaround-mx", 	0, NULL, 'm'},
+ 		{NULL,			0, NULL, 0},
+ 	};
+ 
+@@ -506,6 +508,9 @@ int main(int argc, char *argv[])
+ 				cli_classic_abort_usage("No log filename specified.\n");
+ 			}
+ 			break;
++		case 'm': /* --workaround-mx */
++			workaround_mx = 1;
++			break;
+ 		default:
+ 			cli_classic_abort_usage(NULL);
+ 			break;
+diff --git a/include/programmer.h b/include/programmer.h
+index 4fee2ef..7e78598 100644
+--- a/include/programmer.h
++++ b/include/programmer.h
+@@ -355,6 +355,7 @@ enum ich_chipset {
+ 	CHIPSET_GEMINI_LAKE,
+ 	CHIPSET_ELKHART_LAKE,
+ };
++extern int workaround_mx; /* workaround for MX25* chips, makes flash operations more reliable, less failures */
+ 
+ /* ichspi.c */
+ #if CONFIG_INTERNAL == 1
+diff --git a/spi.c b/spi.c
+index 6e61f53..f8f5d11 100644
+--- a/spi.c
++++ b/spi.c
+@@ -26,10 +26,19 @@
+ #include "programmer.h"
+ #include "spi.h"
+ 
++int workaround_mx; /* Make operations with MX25* chips more reliable */
++
+ int spi_send_command(const struct flashctx *flash, unsigned int writecnt,
+ 		     unsigned int readcnt, const unsigned char *writearr,
+ 		     unsigned char *readarr)
+ {
++	if (workaround_mx) {
++		const unsigned char cmd[JEDEC_READ_OUTSIZE] = {JEDEC_READ, 0, 0, 0};
++		unsigned char buf[256];
++		/* keep flash busy for some time, keep CS warm before sending actual command */
++		flash->mst->spi.command(flash, sizeof(cmd), sizeof(buf), cmd, buf);
++	}
++	/* actual command */
+ 	return flash->mst->spi.command(flash, writecnt, readcnt, writearr,
+ 				       readarr);
+ }
+-- 
+2.43.0
+

From 0c8fa2011a4dbc1773d37e4adc4ff41e2431c639 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Jan 2024 02:09:32 +0000
Subject: [PATCH 0208/1549] update pico-serprog to Riku's new revision

Riku introduced three new patches:

* Add support for multiple chip selects. This allows you to
  control multiple chips from the same clip, on systems with
  dual flash setups, at least theoretically.
* Enable pull-up on unused chip selects - pull them high so
  that chips you connect that to are deactivated while flashing
  the target chip. This could be used on thinkpad W541 for
  instance, where miso/mosi have 0ohm between them via the two
  flash ICs. You could pull the other chip select high.
* Documentation for the above, in the pico-serprog readme.

This goes in tandem with a patch from Riku, present in the
recently integrated flashprog project, namely:

commit ddb6d926783d4f9cbee04c7392718ed8f89daa0e
Author: Riku Viitanen <riku.viitanen@protonmail.com>
Date:   Mon Jan 15 19:15:49 2024 +0200

    serprog: Add support for multiple SPI chip selects

This functionality will therefore be present in the next
release of Libreboot.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/pico-serprog | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/git/pico-serprog b/config/git/pico-serprog
index 172e620e..fcf34847 100644
--- a/config/git/pico-serprog
+++ b/config/git/pico-serprog
@@ -1,5 +1,5 @@
 {pico-serprog}{
-	rev: 0d49d6fcbe33a5af1bff599be6ff84ddda0bc3fe
+	rev: 377d9f2d528745158dd8af190bc19ed77ffa7778
 	loc: pico-serprog
 	url: https://codeberg.org/libreboot/pico-serprog
 	bkup_url: https://git.disroot.org/libreboot/pico-serprog

From b2d8e1184dfaecf18036d5ed5e556a6eb89b9d8d Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sat, 3 Feb 2024 22:55:18 +0000
Subject: [PATCH 0209/1549] import dell optiplex 7020/9020 patch from gerrit

coreboot gerrit patch 55232, patchset 31

the actual board will be enabled in a follow-up patch.
merging the patch on its own first is better practise,
to run ./update trees -u coreboot

this way, there won't be a revision that breaks builds,
due to the idiosyncratic nature of coreboot configuration.

Signed-off-by: Leah Rowe <info@minifree.org>
---
 ...d-OptiPlex-7020-9020-port_cb55232_31.patch | 923 ++++++++++++++++++
 .../e6430_12mb/config/libgfxinit_corebootfb   |   2 +
 .../e6430_12mb/config/libgfxinit_txtmode      |   2 +
 .../e6530_12mb/config/libgfxinit_corebootfb   |   2 +
 .../e6530_12mb/config/libgfxinit_txtmode      |   2 +
 .../t1650_12mb/config/libgfxinit_txtmode      |   2 +
 6 files changed, 933 insertions(+)
 create mode 100644 config/coreboot/default/patches/0031-mb-dell-Add-OptiPlex-7020-9020-port_cb55232_31.patch

diff --git a/config/coreboot/default/patches/0031-mb-dell-Add-OptiPlex-7020-9020-port_cb55232_31.patch b/config/coreboot/default/patches/0031-mb-dell-Add-OptiPlex-7020-9020-port_cb55232_31.patch
new file mode 100644
index 00000000..3b4d8004
--- /dev/null
+++ b/config/coreboot/default/patches/0031-mb-dell-Add-OptiPlex-7020-9020-port_cb55232_31.patch
@@ -0,0 +1,923 @@
+From 38a713eb071dd9c1b7d5092ce686537e5d9266f5 Mon Sep 17 00:00:00 2001
+From: Mate Kukri <kukri.mate@gmail.com>
+Date: Mon, 4 Dec 2023 21:34:18 +0000
+Subject: [PATCH 1/1] mb/dell: Add OptiPlex 7020/9020 port
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The OptiPlex 7020 and 9020 use physically identical motherboards.
+
+Each model comes in the following form factors:
+- 7020: SFF, MT
+- 9020: USFF (not currently supported), SFF, MT
+
+(7020 SFF) Boots Linux and Windows 10:
+- Tested with an i3-4160 and i5-4460
+- DRAM init works using the MRC (4G, 4G+4G)
+- iGPU init works using libgfxinit (VGA, 2x DP)
+- PCIe 16x: tested, ok
+- PCIe 4x: tested, ok
+- All USB2 and USB3 ports work
+- SMSC SCH5555 Super I/O: serial works, PS/2 untested
+- Audio: back and front output works, internal speaker works,
+         mic inputs untested
+- Ethernet: tested, works
+
+(9020 MT)
+- Tested by Michael Büchler (thanks for the overridetree)
+
+Change-Id: Ie7c7089f443aef9890711c4412209bceb1f1e96a
+Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
+---
+ src/mainboard/dell/optiplex_9020/Kconfig      |  34 +++
+ src/mainboard/dell/optiplex_9020/Kconfig.name |  11 +
+ src/mainboard/dell/optiplex_9020/Makefile.inc |   5 +
+ src/mainboard/dell/optiplex_9020/acpi/ec.asl  |   3 +
+ .../dell/optiplex_9020/acpi/platform.asl      |  11 +
+ .../dell/optiplex_9020/acpi/superio.asl       |   3 +
+ .../dell/optiplex_9020/board_info.txt         |   8 +
+ src/mainboard/dell/optiplex_9020/bootblock.c  | 116 ++++++++++
+ src/mainboard/dell/optiplex_9020/cmos.default |   4 +
+ src/mainboard/dell/optiplex_9020/cmos.layout  |  58 +++++
+ src/mainboard/dell/optiplex_9020/data.vbt     | Bin 0 -> 4409 bytes
+ .../dell/optiplex_9020/devicetree.cb          |  80 +++++++
+ src/mainboard/dell/optiplex_9020/dsdt.asl     |  25 ++
+ .../dell/optiplex_9020/gma-mainboard.ads      |  18 ++
+ src/mainboard/dell/optiplex_9020/gpio.c       | 217 ++++++++++++++++++
+ src/mainboard/dell/optiplex_9020/hda_verb.c   |  27 +++
+ src/mainboard/dell/optiplex_9020/mainboard.c  |  15 ++
+ .../dell/optiplex_9020/overridetree_mt.cb     |  10 +
+ src/mainboard/dell/optiplex_9020/romstage.c   |  53 +++++
+ 19 files changed, 698 insertions(+)
+ create mode 100644 src/mainboard/dell/optiplex_9020/Kconfig
+ create mode 100644 src/mainboard/dell/optiplex_9020/Kconfig.name
+ create mode 100644 src/mainboard/dell/optiplex_9020/Makefile.inc
+ create mode 100644 src/mainboard/dell/optiplex_9020/acpi/ec.asl
+ create mode 100644 src/mainboard/dell/optiplex_9020/acpi/platform.asl
+ create mode 100644 src/mainboard/dell/optiplex_9020/acpi/superio.asl
+ create mode 100644 src/mainboard/dell/optiplex_9020/board_info.txt
+ create mode 100644 src/mainboard/dell/optiplex_9020/bootblock.c
+ create mode 100644 src/mainboard/dell/optiplex_9020/cmos.default
+ create mode 100644 src/mainboard/dell/optiplex_9020/cmos.layout
+ create mode 100644 src/mainboard/dell/optiplex_9020/data.vbt
+ create mode 100644 src/mainboard/dell/optiplex_9020/devicetree.cb
+ create mode 100644 src/mainboard/dell/optiplex_9020/dsdt.asl
+ create mode 100644 src/mainboard/dell/optiplex_9020/gma-mainboard.ads
+ create mode 100644 src/mainboard/dell/optiplex_9020/gpio.c
+ create mode 100644 src/mainboard/dell/optiplex_9020/hda_verb.c
+ create mode 100644 src/mainboard/dell/optiplex_9020/mainboard.c
+ create mode 100644 src/mainboard/dell/optiplex_9020/overridetree_mt.cb
+ create mode 100644 src/mainboard/dell/optiplex_9020/romstage.c
+
+diff --git a/src/mainboard/dell/optiplex_9020/Kconfig b/src/mainboard/dell/optiplex_9020/Kconfig
+new file mode 100644
+index 0000000000..774a72f161
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/Kconfig
+@@ -0,0 +1,34 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++if BOARD_DELL_OPTIPLEX_9020_SFF || BOARD_DELL_OPTIPLEX_9020_MT
++
++config BOARD_SPECIFIC_OPTIONS
++	def_bool y
++	select BOARD_ROMSIZE_KB_12288
++	select HAVE_ACPI_RESUME
++	select HAVE_ACPI_TABLES
++	select HAVE_OPTION_TABLE
++	select HAVE_CMOS_DEFAULT
++	select INTEL_GMA_HAVE_VBT
++	select INTEL_INT15
++	select MAINBOARD_HAS_LIBGFXINIT
++	select MAINBOARD_USES_IFD_GBE_REGION
++	select NORTHBRIDGE_INTEL_HASWELL
++	select SERIRQ_CONTINUOUS_MODE
++	select SOUTHBRIDGE_INTEL_LYNXPOINT
++	select SUPERIO_SMSC_SCH555x
++
++config CBFS_SIZE
++	default 0x600000
++
++config MAINBOARD_DIR
++	default "dell/optiplex_9020"
++
++config MAINBOARD_PART_NUMBER
++	default "OptiPlex 7020/9020 SFF" if BOARD_DELL_OPTIPLEX_9020_SFF
++	default "OptiPlex 7020/9020 MT" if BOARD_DELL_OPTIPLEX_9020_MT
++
++config OVERRIDE_DEVICETREE
++	default "overridetree_mt.cb" if BOARD_DELL_OPTIPLEX_9020_MT
++
++endif
+diff --git a/src/mainboard/dell/optiplex_9020/Kconfig.name b/src/mainboard/dell/optiplex_9020/Kconfig.name
+new file mode 100644
+index 0000000000..c25c330a44
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/Kconfig.name
+@@ -0,0 +1,11 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++config BOARD_DELL_OPTIPLEX_9020_SFF
++	bool "OptiPlex 7020/9020 SFF"
++	help
++	  The 7020 SFF and 9020 SFF mainboards are physically identical.
++
++config BOARD_DELL_OPTIPLEX_9020_MT
++	bool "OptiPlex 7020/9020 MT"
++	help
++	  The 7020 MT and 9020 MT mainboards are physically identical.
+diff --git a/src/mainboard/dell/optiplex_9020/Makefile.inc b/src/mainboard/dell/optiplex_9020/Makefile.inc
+new file mode 100644
+index 0000000000..6ca2f2afaa
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/Makefile.inc
+@@ -0,0 +1,5 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++romstage-y += gpio.c
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
++bootblock-y += bootblock.c
+diff --git a/src/mainboard/dell/optiplex_9020/acpi/ec.asl b/src/mainboard/dell/optiplex_9020/acpi/ec.asl
+new file mode 100644
+index 0000000000..16990d45f4
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/acpi/ec.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: CC-PDDC */
++
++/* Please update the license if adding licensable material. */
+diff --git a/src/mainboard/dell/optiplex_9020/acpi/platform.asl b/src/mainboard/dell/optiplex_9020/acpi/platform.asl
+new file mode 100644
+index 0000000000..cda7682e3e
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/acpi/platform.asl
+@@ -0,0 +1,11 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++Method(_WAK, 1)
++{
++	Return(Package() { 0, 0 })
++}
++
++Method(_PTS, 1)
++{
++
++}
+diff --git a/src/mainboard/dell/optiplex_9020/acpi/superio.asl b/src/mainboard/dell/optiplex_9020/acpi/superio.asl
+new file mode 100644
+index 0000000000..16990d45f4
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/acpi/superio.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: CC-PDDC */
++
++/* Please update the license if adding licensable material. */
+diff --git a/src/mainboard/dell/optiplex_9020/board_info.txt b/src/mainboard/dell/optiplex_9020/board_info.txt
+new file mode 100644
+index 0000000000..e30cf9c41f
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/board_info.txt
+@@ -0,0 +1,8 @@
++Vendor name: Dell Inc.
++Board name: OptiPlex 7020/9020
++Release year: 2014
++Category: desktop
++ROM package: SOIC-8
++ROM protocol: SPI
++ROM socketed: n
++Flashrom support: y
+diff --git a/src/mainboard/dell/optiplex_9020/bootblock.c b/src/mainboard/dell/optiplex_9020/bootblock.c
+new file mode 100644
+index 0000000000..2837cf9cf1
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/bootblock.c
+@@ -0,0 +1,116 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <arch/io.h>
++#include <device/pnp_ops.h>
++#include <superio/smsc/sch555x/sch555x.h>
++#include <southbridge/intel/lynxpoint/pch.h>
++
++static void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val)
++{
++	// Clear EC-to-Host mailbox
++	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
++	outb(tmp, SCH555x_EMI_IOBASE + 1);
++
++	// Send address and value to the EC
++	sch555x_emi_write16(0, (addr1 * 2) | 0x101);
++	sch555x_emi_write32(4, val | (addr2 << 16));
++
++	// Wait for acknowledgement message from EC
++	outb(1, SCH555x_EMI_IOBASE);
++	size_t timeout = 0;
++	do {} while (++timeout < 0xfff && (inb(SCH555x_EMI_IOBASE + 1) & 1) == 0);
++}
++
++struct ec_init_entry {
++	uint16_t addr;
++	uint8_t val;
++};
++
++static void ec_init(void)
++{
++	/*
++	 * Tables from CORE_PEI
++	 */
++
++	static const struct ec_init_entry init_table1[] = {
++		{0x08cc, 0x11}, {0x08d0, 0x11}, {0x088c, 0x10}, {0x0890, 0x10},
++		{0x0894, 0x10}, {0x0898, 0x12}, {0x089c, 0x12}, {0x08a0, 0x10},
++		{0x08a4, 0x12}, {0x08a8, 0x10}, {0x0820, 0x12}, {0x0824, 0x12},
++		{0x0878, 0x12}, {0x0880, 0x12}, {0x0884, 0x12}, {0x08e0, 0x12},
++		{0x08e4, 0x12}, {0x083c, 0x10}, {0x0840, 0x10}, {0x0844, 0x10},
++		{0x0848, 0x10}, {0x084c, 0x10}, {0x0850, 0x10}, {0x0814, 0x11},
++	};
++
++	for (size_t i = 0; i < ARRAY_SIZE(init_table1); ++i)
++		ec_write(2, init_table1[i].addr, init_table1[i].val);
++
++	static const struct ec_init_entry init_table2[] = {
++		{0x0005, 0x33}, {0x0018, 0x2f}, {0x0019, 0x2f}, {0x001a, 0x2f},
++		{0x0083, 0xbb}, {0x0085, 0xd9}, {0x0086, 0x2c}, {0x008a, 0x34},
++		{0x008b, 0x60}, {0x0090, 0x5e}, {0x0091, 0x5e}, {0x0092, 0x86},
++		{0x0096, 0xa4}, {0x0097, 0xa4}, {0x0098, 0xa4}, {0x009b, 0xa4},
++		{0x00a0, 0x0a}, {0x00a1, 0x0a}, {0x00ae, 0x7c}, {0x00af, 0x7c},
++		{0x00b0, 0x9e}, {0x00b3, 0x7c}, {0x00b6, 0x08}, {0x00b7, 0x08},
++		{0x00ea, 0x64}, {0x00ef, 0xff}, {0x00f8, 0x15}, {0x00f9, 0x00},
++		{0x00f0, 0x30}, {0x00fd, 0x01}, {0x01a1, 0x00}, {0x01a2, 0x00},
++		{0x01b1, 0x08}, {0x01be, 0x90}, {0x0280, 0x24}, {0x0281, 0x13},
++		{0x0282, 0x03}, {0x0283, 0x0a}, {0x0284, 0x80}, {0x0285, 0x03},
++		{0x0288, 0x80}, {0x0289, 0x0c}, {0x028a, 0x03}, {0x028b, 0x0a},
++		{0x028c, 0x80}, {0x028d, 0x03}, {0x0040, 0x01},
++	};
++
++	for (size_t i = 0; i < ARRAY_SIZE(init_table2); ++i)
++		ec_write(1, init_table2[i].addr, init_table2[i].val);
++
++	/*
++	 * Table from PeiHwmInit
++	 */
++
++	static const struct ec_init_entry hwm_init_table[] = {
++		{0x02fc, 0xa0}, {0x02fd, 0x32}, {0x0005, 0x77}, {0x0019, 0x2f},
++		{0x001a, 0x2f}, {0x008a, 0x33}, {0x008b, 0x33}, {0x008c, 0x33},
++		{0x00ba, 0x10}, {0x00d1, 0xff}, {0x00d6, 0xff}, {0x00db, 0xff},
++		{0x0048, 0x00}, {0x0049, 0x00}, {0x007a, 0x00}, {0x007b, 0x00},
++		{0x007c, 0x00}, {0x0080, 0x00}, {0x0081, 0x00}, {0x0082, 0x00},
++		{0x0083, 0xbb}, {0x0084, 0xb0}, {0x01a1, 0x88}, {0x01a4, 0x80},
++		{0x0088, 0x00}, {0x0089, 0x00}, {0x00a0, 0x02}, {0x00a1, 0x02},
++		{0x00a2, 0x02}, {0x00a4, 0x04}, {0x00a5, 0x04}, {0x00a6, 0x04},
++		{0x00ab, 0x00}, {0x00ad, 0x3f}, {0x00b7, 0x07}, {0x0062, 0x50},
++		{0x0000, 0x46}, {0x0000, 0x50}, {0x0000, 0x46}, {0x0000, 0x50},
++		{0x0000, 0x46}, {0x0000, 0x98}, {0x0059, 0x98}, {0x0061, 0x7c},
++		{0x01bc, 0x00}, {0x01bd, 0x00}, {0x01bb, 0x00}, {0x0085, 0xdd},
++		{0x0086, 0xdd}, {0x0087, 0x07}, {0x0090, 0x82}, {0x0091, 0x5e},
++		{0x0095, 0x5d}, {0x0096, 0xa9}, {0x0097, 0x00}, {0x009b, 0x00},
++		{0x00ae, 0x86}, {0x00af, 0x86}, {0x00b3, 0x67}, {0x00c4, 0xff},
++		{0x00c5, 0xff}, {0x00c9, 0xff}, {0x0040, 0x01}, {0x02fc, 0x00},
++		{0x02b3, 0x9a}, {0x02b4, 0x05}, {0x02cc, 0x01}, {0x02d0, 0x4c},
++		{0x02d2, 0x01}, {0x02db, 0x01}, {0x006f, 0x01}, {0x0070, 0x02},
++		{0x0071, 0x03}, {0x018b, 0x03}, {0x018c, 0x03},
++	};
++
++	for (size_t i = 0; i < ARRAY_SIZE(hwm_init_table); ++i)
++		ec_write(1, hwm_init_table[i].addr, hwm_init_table[i].val);
++}
++
++#define SCH555x_IOBASE	0x2e
++#define GLOBAL_DEV	PNP_DEV(SCH555x_IOBASE, SCH555x_LDN_GLOBAL)
++#define SERIAL_DEV	PNP_DEV(SCH555x_IOBASE, SCH555x_LDN_UART1)
++
++void mainboard_config_superio(void)
++{
++	// Super I/O early init will map Runtime and EMI registers
++	sch555x_early_init(GLOBAL_DEV);
++
++	// Changes LED color among a few other things (extracted from Dell's FW)
++	outb(0x01, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_STS);
++	outb(0x00, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_EN);
++	outb(0x18, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_EN1);
++	outb(0x01, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_UNK1);
++	outb(0x0f, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_LED);
++
++	// Magic EC init
++	ec_init();
++
++	// Magic EC init is needed for UART1 initialization to work
++	sch555x_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
++}
+diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
+new file mode 100644
+index 0000000000..b159660aa8
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/cmos.default
+@@ -0,0 +1,4 @@
++boot_option=Fallback
++debug_level=Debug
++nmi=Disable
++power_on_after_fail=Disable
+diff --git a/src/mainboard/dell/optiplex_9020/cmos.layout b/src/mainboard/dell/optiplex_9020/cmos.layout
+new file mode 100644
+index 0000000000..c9ba76c78f
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/cmos.layout
+@@ -0,0 +1,58 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++# -----------------------------------------------------------------
++entries
++
++# -----------------------------------------------------------------
++0	120	r	0	reserved_memory
++
++# -----------------------------------------------------------------
++# RTC_BOOT_BYTE (coreboot hardcoded)
++384	1	e	3	boot_option
++388	4	h	0	reboot_counter
++
++# -----------------------------------------------------------------
++# coreboot config options: console
++395	4	e	4	debug_level
++
++#400	8	r	0	reserved for century byte
++
++# coreboot config options: southbridge
++408	1	e	1	nmi
++409	2	e	5	power_on_after_fail
++
++# coreboot config options: check sums
++984	16	h	0	check_sum
++
++# -----------------------------------------------------------------
++
++enumerations
++
++#ID	value	text
++1	0	Disable
++1	1	Enable
++
++2	0	Enable
++2	1	Disable
++
++3	0	Fallback
++3	1	Normal
++
++4	0	Emergency
++4	1	Alert
++4	2	Critical
++4	3	Error
++4	4	Warning
++4	5	Notice
++4	6	Info
++4	7	Debug
++4	8	Spew
++
++5	0	Disable
++5	1	Enable
++5	2	Keep
++
++# -----------------------------------------------------------------
++checksums
++
++checksum 392 415 984
+diff --git a/src/mainboard/dell/optiplex_9020/data.vbt b/src/mainboard/dell/optiplex_9020/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..1779f3b8d1018ba0aae480103b145bd7b6dd6187
+GIT binary patch
+literal 4409
+zcmdT{T}&KR6h8B_yR)-1!!lr9XiE<T5h_au1f&hdSy<_UtKG6lH%+yR*`>u$pi5g@
+zP3)>@YHE~+rqQIfO&U!#QHhDMkD3^5qG|e|_!FbV_|P=QG{y&G)b-q%VY>waTYnNg
+zlQZY%p84*%_nv!argpGv03)IJ_Pe7|bSMP|Y$`oQ_r=uJyEVQm92yAi>WXgdz6a04
+zD)5&6aRng7aW^T=MoU}o*#7ireSZT+;@h#UsjZ1Q4>q^r@OTD8dxst!AG;&CDL8Oo
+z^uXRm#BdDb@opR+9u95~SuwW<QzMfTqeF)qF*csrKZ)H~hheKJ9Bag}aojteN>8Tu
+zlb(JA9~v1O%8aBZS%1O)#VHqfy2mFDXGV7K*^l+z4cKBBMzF<bZbmC*>>kfdG+}6T
+z6#H4sB=%D$nS<$6lPaq+z<VHx902D6&lA9LzqdfOh#}ETa^{d^Qa3IULMDVoxLYjf
+zv_SO(uW~#!R!i{VA*TVEBzVEHO|WbbVKxbVzx(ZS+aUqD7$Jw01c2!TeBcCl0o=?F
+z28TS8$Zmu%>jW^<CJybs=4~hTnz>lR#jfi;e=$Iyv50HHXlZTl*xYG$g?l1>(OCb$
+zU}DG4>=REuHB||}y?K34mZfn9c;qU`2=#DU;Ndl)1MU?sz-wNFPrQEkmiQ;)T^<R}
+zdUSY)_#@&kiGTFS@Cz|7$)FHd5Z4d~iSHopC5{t6K)joHAMs<vPZPgD{1Wk5;x~xj
+zC4QgyW8%+<za@4bfZuX_7Ccs_S<aEAwgkTj&o@B!q~ky7_`O%{^_3mzbL0|(U(%J!
+zc|7n(?qUFPIq6Q8fk_B7y<FHqia0WANkND?_5ev%QVGY-<-AEUTj=`t?()a1=55O5
+z{_mRaBdE^OAe?=LY&@K6Vl9(-%92(Xz`HWb2jrieR~917`}6Ye2PkFGM<<PdozIAn
+z^~{K!pyf`h0{p_snin|Dy#pS02chH`c=HRG@BbfDysjI9Dy8GmAziVGdEP8P1@20r
+zBqq#pp3aSG?5Z($i{C%72adbj0IKXTPv?C2Liz8vth$FvMX=5WiS0s*j42Hu+7sIq
+z8yZWG-Z!*2U8Hey1X2}XhM>*}9BsG30>%b-aT^$>F;QlFs?KdZG`Fp?&P=>G?}^-H
+z8V}91nC5%)o<Kdc9}(=yRN9ZYz<R5Y#!XvQOq$z%Cn**6PyxTvRRPl+f_+_}SCoA<
+za@Vv<hO&AVF3|ye$@4RJwCumBv5E4paIqMm<F?cxfHmzf>&;H%+*-esTyM8m72{dk
+zN_}yhSK?iwVn0WBiCk!kp>joHDlbZb@-S0HiL0(nDpFM`l;n%Xd2HQIg5o*w(&Ie1
+zXo(bBhcHASlm}+e6jDvD2&s06<%&>b5^ABIR?)PhL=q;MUUIqs5lZ+1pe5A$068bG
+zYk1wEhT|Z7B_sHB-6yZ{VV6%I@W~JQaLT8j@X2R<_@Ph#!Y6;{LrKvq6}eWyK1JWD
+z$ioUgr|72?`J93m6@5;TuPEqO_4TUUsA9jWr&M`N#p9~}sw&T@IIHTHRrx0s1Dd`;
+zlUp_1q3NTVd{D!an*OFHpV#mkO~0ziziR4+t74X)<Fci+?Wnk=j6%hk;1x^$%=t;W
+zN^Yg4Uc8pHADlgcLV{lz;Y<lab7BqFXUpvws%k&N(?Ss`Sx<+!GQ!KP+0;bGI<u<0
+z4SuHz074M#Hw&c+7DDH;qgZ?(u>Ea)e<*`45Lgb&Bj~FK_ryRq5ZmCESNs5##`izi
+zWl>%<LQf28jJj3r(DnvHaKF`A!KQ&LD-NM<^&lbC85n4V#QQeF4>b${%1!r_HHzg|
+zb7P%(J~^e(e?Sd9{<%GhPj7S-3+AEyh&WB(;<TE@je=%!#d%nM6pIdgs~&vU<?vS!
+ztaC^yZYGz`LA7!K7Z$M=S1RF53~x3RqnkZtSM@aQ$D;QIzd0M&*AX-mLFdJ1%|nTW
+zKu4H+<*IHlA(@4;q~A}wijjptb-`A1OTqCOFSJ6vTQS-lW>Em~L_u66jOlR9ZUEZ|
+zMhC-jAj9!85eeUR&5CZpNVwUt>909-|5kF?Ve@Y58TNJV5CLGmjb)HGdJ22pR+!su
+z`@ntQ1&|Z3+xNb&p(?Li{yzJDS)dq4FZ3_c3(;&nw}2XNf@gau=U)2uzaL_df=2EH
+PTo#&U0FLJAf1&;f?(g8r
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/optiplex_9020/devicetree.cb b/src/mainboard/dell/optiplex_9020/devicetree.cb
+new file mode 100644
+index 0000000000..c0b17a15ff
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/devicetree.cb
+@@ -0,0 +1,80 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++chip northbridge/intel/haswell
++	# This mainboard has VGA
++	register "gpu_ddi_e_connected" = "1"
++
++	chip cpu/intel/haswell
++		device cpu_cluster 0 on ops haswell_cpu_bus_ops end
++	end
++
++	device domain 0 on
++		ops haswell_pci_domain_ops
++
++		subsystemid 0x1028 0x05a5 inherit
++
++		device pci 00.0 on  end					# Host bridge
++		device pci 01.0 on  end					# PCIe graphics
++		device pci 02.0 on  end					# VGA controller
++		device pci 03.0 on  end					# Mini-HD audio
++
++		chip southbridge/intel/lynxpoint
++			register "gen1_dec" = "0x007c0a01"
++			register "gen2_dec" = "0x007c0901"
++			register "gen3_dec" = "0x003c07e1"
++			register "gen4_dec" = "0x001c0901"
++			register "sata_port_map" = "0x33"
++
++			device pci 14.0 on  end				# xHCI controller
++			device pci 16.0 on  end				# Management Engine interface 1
++			device pci 16.1 off end				# Management Engine interface 2
++			device pci 16.2 off end				# Management Engine IDE-R
++			device pci 16.3 on  end				# Management Engine KT
++			device pci 19.0 on      			# Intel Gigabit Ethernet
++				subsystemid 0x1028 0x05a4
++			end
++			device pci 1a.0 on  end				# EHCI controller #2
++			device pci 1b.0 on  end				# HD audio controller
++			device pci 1c.0 off end
++			device pci 1c.1 off end
++			device pci 1c.2 off end
++			device pci 1c.3 off end
++			device pci 1c.4 on  end				# PCIe 4x slot
++			device pci 1c.5 off end
++			device pci 1c.6 off end
++			device pci 1c.7 off end
++			device pci 1d.0 on  end				# EHCI controller #1
++			device pci 1f.0 on				# LPC bridge
++				chip superio/smsc/sch555x
++					device pnp 2e.0 on		# EMI
++						io 0x60 = 0xa00
++					end
++					device pnp 2e.1 on		# 8042
++						io 0x60 = 0x60
++						irq 0x0f = 0
++						irq 0x70 = 1
++						irq 0x72 = 12
++					end
++					device pnp 2e.7 on		# UART1
++						io 0x60 = 0x3f8
++						irq 0x0f = 2
++						irq 0x70 = 4
++					end
++					device pnp 2e.8 off end 	# UART2
++					device pnp 2e.c on		# LPC interface
++						io 0x60 = 0x2e
++					end
++					device pnp 2e.a on		# Runtime registers
++						io 0x60 = 0xa40
++					end
++					device pnp 2e.b  off end	# Floppy Controller
++					device pnp 2e.11 off end	# Parallel Port
++				end
++			end
++			device pci 1f.2 on  end				# SATA controller 1
++			device pci 1f.3 on  end				# SMBus
++			device pci 1f.5 off end				# SATA controller 2
++			device pci 1f.6 off end				# Thermal
++		end
++	end
++end
+diff --git a/src/mainboard/dell/optiplex_9020/dsdt.asl b/src/mainboard/dell/optiplex_9020/dsdt.asl
+new file mode 100644
+index 0000000000..7ec1e9775a
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/dsdt.asl
+@@ -0,0 +1,25 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi.h>
++DefinitionBlock(
++	"dsdt.aml",
++	"DSDT",
++	ACPI_DSDT_REV_2,
++	OEM_ID,
++	ACPI_TABLE_CREATOR,
++	0x20181031	/* OEM Revision */
++)
++{
++	#include <acpi/dsdt_top.asl>
++	#include "acpi/platform.asl"
++	#include <southbridge/intel/common/acpi/platform.asl>
++	#include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
++	#include <southbridge/intel/common/acpi/sleepstates.asl>
++	#include <cpu/intel/common/acpi/cpu.asl>
++
++	Device (\_SB.PCI0)
++	{
++		#include <northbridge/intel/haswell/acpi/hostbridge.asl>
++		#include <southbridge/intel/lynxpoint/acpi/pch.asl>
++	}
++}
+diff --git a/src/mainboard/dell/optiplex_9020/gma-mainboard.ads b/src/mainboard/dell/optiplex_9020/gma-mainboard.ads
+new file mode 100644
+index 0000000000..173f2f1d0d
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/gma-mainboard.ads
+@@ -0,0 +1,18 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (DP1,
++      DP2,
++      DP3,
++      Analog,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/dell/optiplex_9020/gpio.c b/src/mainboard/dell/optiplex_9020/gpio.c
+new file mode 100644
+index 0000000000..48b7707e2c
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/gpio.c
+@@ -0,0 +1,217 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_GPIO,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_GPIO,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_GPIO,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_GPIO,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_NATIVE,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_NATIVE,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_NATIVE,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_GPIO,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_GPIO,
++	.gpio26 = GPIO_MODE_GPIO,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_NATIVE,
++	.gpio30 = GPIO_MODE_NATIVE,
++	.gpio31 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio1 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio3 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio5 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio11 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_OUTPUT,
++	.gpio15 = GPIO_DIR_OUTPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_OUTPUT,
++	.gpio23 = GPIO_DIR_OUTPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio25 = GPIO_DIR_OUTPUT,
++	.gpio26 = GPIO_DIR_OUTPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_OUTPUT,
++	.gpio31 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio13 = GPIO_LEVEL_LOW,
++	.gpio15 = GPIO_LEVEL_HIGH,
++	.gpio22 = GPIO_LEVEL_HIGH,
++	.gpio23 = GPIO_LEVEL_HIGH,
++	.gpio25 = GPIO_LEVEL_HIGH,
++	.gpio26 = GPIO_LEVEL_HIGH,
++	.gpio28 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++	.gpio18 = GPIO_BLINK,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio8 = GPIO_INVERT,
++	.gpio9 = GPIO_INVERT,
++	.gpio11 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++	.gpio26 = GPIO_RESET_RSMRST,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_GPIO,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_NATIVE,
++	.gpio37 = GPIO_MODE_NATIVE,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_GPIO,
++	.gpio45 = GPIO_MODE_GPIO,
++	.gpio46 = GPIO_MODE_GPIO,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_GPIO,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_GPIO,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_GPIO,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio32 = GPIO_DIR_INPUT,
++	.gpio33 = GPIO_DIR_OUTPUT,
++	.gpio34 = GPIO_DIR_OUTPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio44 = GPIO_DIR_INPUT,
++	.gpio45 = GPIO_DIR_OUTPUT,
++	.gpio46 = GPIO_DIR_INPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_INPUT,
++	.gpio50 = GPIO_DIR_OUTPUT,
++	.gpio51 = GPIO_DIR_OUTPUT,
++	.gpio52 = GPIO_DIR_OUTPUT,
++	.gpio53 = GPIO_DIR_OUTPUT,
++	.gpio54 = GPIO_DIR_OUTPUT,
++	.gpio55 = GPIO_DIR_OUTPUT,
++	.gpio57 = GPIO_DIR_OUTPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio33 = GPIO_LEVEL_HIGH,
++	.gpio34 = GPIO_LEVEL_HIGH,
++	.gpio45 = GPIO_LEVEL_LOW,
++	.gpio50 = GPIO_LEVEL_HIGH,
++	.gpio51 = GPIO_LEVEL_HIGH,
++	.gpio52 = GPIO_LEVEL_HIGH,
++	.gpio53 = GPIO_LEVEL_HIGH,
++	.gpio54 = GPIO_LEVEL_HIGH,
++	.gpio55 = GPIO_LEVEL_HIGH,
++	.gpio57 = GPIO_LEVEL_HIGH,
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_GPIO,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_GPIO,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_NATIVE,
++	.gpio71 = GPIO_MODE_NATIVE,
++	.gpio72 = GPIO_MODE_GPIO,
++	.gpio73 = GPIO_MODE_GPIO,
++	.gpio74 = GPIO_MODE_GPIO,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio64 = GPIO_DIR_OUTPUT,
++	.gpio66 = GPIO_DIR_OUTPUT,
++	.gpio68 = GPIO_DIR_INPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio72 = GPIO_DIR_OUTPUT,
++	.gpio73 = GPIO_DIR_INPUT,
++	.gpio74 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++	.gpio64 = GPIO_LEVEL_HIGH,
++	.gpio66 = GPIO_LEVEL_HIGH,
++	.gpio72 = GPIO_LEVEL_HIGH,
++	.gpio74 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 =	{
++		.mode = &pch_gpio_set1_mode,
++		.direction = &pch_gpio_set1_direction,
++		.level = &pch_gpio_set1_level,
++		.blink = &pch_gpio_set1_blink,
++		.invert = &pch_gpio_set1_invert,
++		.reset = &pch_gpio_set1_reset,
++	},
++	.set2 =	{
++		.mode = &pch_gpio_set2_mode,
++		.direction = &pch_gpio_set2_direction,
++		.level = &pch_gpio_set2_level,
++		.reset = &pch_gpio_set2_reset,
++	},
++	.set3 =	{
++		.mode = &pch_gpio_set3_mode,
++		.direction = &pch_gpio_set3_direction,
++		.level = &pch_gpio_set3_level,
++		.reset = &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/optiplex_9020/hda_verb.c b/src/mainboard/dell/optiplex_9020/hda_verb.c
+new file mode 100644
+index 0000000000..df43ade3e6
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/hda_verb.c
+@@ -0,0 +1,27 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <stdint.h>
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x10ec0280, /* Realtek ALC3220 */
++	0x102805a5, /* Subsystem ID */
++	13,	 /* Number of entries */
++	AZALIA_SUBVENDOR(0, 0x102805a5),
++	AZALIA_PIN_CFG(0, 0x12, 0x4008c000),
++	AZALIA_PIN_CFG(0, 0x13, 0x411111f0),
++	AZALIA_PIN_CFG(0, 0x14, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x15, 0x0221401f),
++	AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
++	AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
++	AZALIA_PIN_CFG(0, 0x18, 0x01a13040),
++	AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
++	AZALIA_PIN_CFG(0, 0x1a, 0x02a19030),
++	AZALIA_PIN_CFG(0, 0x1b, 0x01014020),
++	AZALIA_PIN_CFG(0, 0x1d, 0x40400001),
++	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
++};
++
++const u32 pc_beep_verbs[] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/optiplex_9020/mainboard.c b/src/mainboard/dell/optiplex_9020/mainboard.c
+new file mode 100644
+index 0000000000..c834fea5d3
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/mainboard.c
+@@ -0,0 +1,15 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/device.h>
++#include <drivers/intel/gma/int15.h>
++
++static void mainboard_enable(struct device *dev)
++{
++	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE,
++					GMA_INT15_PANEL_FIT_DEFAULT,
++					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
++}
++
++struct chip_operations mainboard_ops = {
++	.enable_dev = mainboard_enable,
++};
+diff --git a/src/mainboard/dell/optiplex_9020/overridetree_mt.cb b/src/mainboard/dell/optiplex_9020/overridetree_mt.cb
+new file mode 100644
+index 0000000000..90205c2d68
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/overridetree_mt.cb
+@@ -0,0 +1,10 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++chip northbridge/intel/haswell
++	device domain 0 on
++		chip southbridge/intel/lynxpoint
++			device pci 1c.1 on  end	# PCI (via XIO2001 bridge)
++			device pci 1c.2 on  end	# PCIe 1x slot
++		end
++	end
++end
+diff --git a/src/mainboard/dell/optiplex_9020/romstage.c b/src/mainboard/dell/optiplex_9020/romstage.c
+new file mode 100644
+index 0000000000..2b9cdaa5fd
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/romstage.c
+@@ -0,0 +1,53 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <northbridge/intel/haswell/haswell.h>
++#include <northbridge/intel/haswell/raminit.h>
++#include <southbridge/intel/lynxpoint/pch.h>
++
++void mainboard_config_rcba(void)
++{
++	RCBA16(D31IR) = DIR_ROUTE(PIRQA, PIRQC, PIRQD, PIRQA);
++	RCBA16(D29IR) = DIR_ROUTE(PIRQC, PIRQA, PIRQD, PIRQH);
++	RCBA16(D28IR) = DIR_ROUTE(PIRQD, PIRQC, PIRQB, PIRQA);
++	RCBA16(D27IR) = DIR_ROUTE(PIRQD, PIRQC, PIRQB, PIRQG);
++	RCBA16(D26IR) = DIR_ROUTE(PIRQD, PIRQC, PIRQF, PIRQA);
++	RCBA16(D25IR) = DIR_ROUTE(PIRQH, PIRQG, PIRQF, PIRQE);
++	RCBA16(D22IR) = DIR_ROUTE(PIRQB, PIRQC, PIRQD, PIRQA);
++	RCBA16(D20IR) = DIR_ROUTE(PIRQD, PIRQC, PIRQB, PIRQA);
++}
++
++void mb_get_spd_map(struct spd_info *spdi)
++{
++	spdi->addresses[0] = 0x50;
++	spdi->addresses[1] = 0x51;
++	spdi->addresses[2] = 0x52;
++	spdi->addresses[3] = 0x53;
++}
++
++const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS] = {
++	/* Length, Enable, OCn#, Location */
++	{0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP},
++	{0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP},
++	{0x0040, 1, 1, USB_PORT_BACK_PANEL},
++	{0x0040, 1, 2, USB_PORT_BACK_PANEL},
++	{0x0040, 1, 3, USB_PORT_BACK_PANEL},
++	{0x0040, 1, 3, USB_PORT_BACK_PANEL},
++	{0x0040, 1, 0, USB_PORT_BACK_PANEL},
++	{0x0040, 1, 0, USB_PORT_BACK_PANEL},
++	{0x0040, 1, 4, USB_PORT_BACK_PANEL},
++	{0x0040, 1, 4, USB_PORT_BACK_PANEL},
++	{0x0040, 1, 5, USB_PORT_BACK_PANEL},
++	{0x0040, 1, 5, USB_PORT_BACK_PANEL},
++	{0x0040, 1, 6, USB_PORT_BACK_PANEL},
++	{0x0040, 1, 7, USB_PORT_BACK_PANEL},
++};
++
++const struct usb3_port_config mainboard_usb3_ports[MAX_USB3_PORTS] = {
++	/* Enable, OCn# */
++	{1, 6},
++	{1, 7},
++	{0, USB_OC_PIN_SKIP},
++	{0, USB_OC_PIN_SKIP},
++	{1, 1},
++	{1, 2},
++};
+-- 
+2.39.2
+
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 3254c612..a5ea58fb 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -137,6 +137,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6430=y
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 CONFIG_PS2K_EISAID="PNP0303"
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index c76f2a2f..5be6c754 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -135,6 +135,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6430=y
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 CONFIG_PS2K_EISAID="PNP0303"
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index 55e49b43..c6bcaa39 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -137,6 +137,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6530=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 CONFIG_PS2K_EISAID="PNP0303"
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index f4a09759..05c1ec3a 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -135,6 +135,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6530=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 CONFIG_PS2K_EISAID="PNP0303"
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index d980a8c2..ee568972 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -138,6 +138,8 @@ CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 CONFIG_BOARD_DELL_PRECISION_T1650=y
 CONFIG_PS2K_EISAID="PNP0303"

From dfad11f350f81527431e53facfa002e2acad5361 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sun, 4 Feb 2024 00:18:20 +0000
Subject: [PATCH 0210/1549] NEW BOARD: Dell OptiPlex 9020 MT (and 7020 MT)

Specifically the MT versions. The SFF versions will
be added separately, in a later commit.

See: https://review.coreboot.org/c/coreboot/+/55232
This patch has been added, from patchset 31. It still
has some unresolved issues, on that patchset, but
it should boot. See commit message there.

Of note: I've enabled PCI REBAR, though it's unknown
whether it will work (some comments there about it though,
on that gerrit page).

I've also set CBFS size to 8MB, not the full size of
the BIOS region; this is required on the T440p which
uses the same mrc.bin file, to get S3 working.

TSEG stage cache disabled, as on other Haswell boards.

The setup: SeaBIOS-only as first payload, but with GRUB
enabled as secondary payload. The _grubonly setup has
been enabled here. This way, the config will work on
iGPU and dGPU setups without issue.

Signed-off-by: Leah Rowe <info@minifree.org>
---
 .../config/libgfxinit_corebootfb              | 632 ++++++++++++++++++
 .../dell9020mt_12mb/config/libgfxinit_txtmode | 629 +++++++++++++++++
 config/coreboot/dell9020mt_12mb/target.cfg    |   7 +
 config/ifd/dell9020mt/12_ifd                  | Bin 0 -> 4096 bytes
 config/ifd/dell9020mt/gbe                     | Bin 0 -> 8192 bytes
 config/vendor/sources                         |   2 +-
 6 files changed, 1269 insertions(+), 1 deletion(-)
 create mode 100644 config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/dell9020mt_12mb/target.cfg
 create mode 100644 config/ifd/dell9020mt/12_ifd
 create mode 100644 config/ifd/dell9020mt/gbe

diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..9eda4205
--- /dev/null
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,632 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=29
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_EHCI_BAR=0xe8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+# CONFIG_USE_BROADWELL_MRC is not set
+CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..8cb7fecf
--- /dev/null
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,629 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=29
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_EHCI_BAR=0xe8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+# CONFIG_USE_BROADWELL_MRC is not set
+CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020mt_12mb/target.cfg b/config/coreboot/dell9020mt_12mb/target.cfg
new file mode 100644
index 00000000..e6d3bec6
--- /dev/null
+++ b/config/coreboot/dell9020mt_12mb/target.cfg
@@ -0,0 +1,7 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/ifd/dell9020mt/12_ifd b/config/ifd/dell9020mt/12_ifd
new file mode 100644
index 0000000000000000000000000000000000000000..d1479e35ed88d15f3f166e237888cc5fd91aafff
GIT binary patch
literal 4096
zcmezW9~DF`{lL%6$imFVBp|B5sK|gS`~SZQ!-Nz?r-ZfJcOE$ol4Ae@pek-=1_cI2
z1}298{0t2L>!BDd4^s30zXT%(2fA5<fxqaw0K<Pq1{RP%K!EAt2?zs;?D2N^(7<qj
zVLHR@sW4$iAfwJ%0z?6Q4FNDi27|wdbpy!d#Ht-tHyQ$?Aut*OqaiRF0;3@?8Umvs
zFd71*AuzN;K;E5!K~zChLEfDaOv@OEF|aDID##Q-XoW%ueMmu!!BxRk;ZPieR@em*
z->>S$z^TBg@ZLd;K~+Ij;e7&>hMIE%DlYE<u}8*09BMv<Rw#tfhZMxY<}2)i@ZUR#
kL(PNIP<<z$;)fI@!0O*SNI=y==o3&rIk9lxY_#tK0KSI3Q2+n{

literal 0
HcmV?d00001

diff --git a/config/ifd/dell9020mt/gbe b/config/ifd/dell9020mt/gbe
new file mode 100644
index 0000000000000000000000000000000000000000..aed6737de3940f31912ce53e0f098ce51119d76d
GIT binary patch
literal 8192
zcmb2!?|b{=Jw}fI|F1A8F)%dz2ZF-_OIS4otV9`rfQcPMvM$vyV2}qgcs_GDa5-}b
zGg^tR-DM>TAwevl)&>T@HV%+#pcaJ%AO_F>|3K2gNR-_HWG*UTVEq4|RTZQR6ChMN
zB*-(cTohzz0MZN|0t^R$v<8Pb7{@b6FmN!4GsLq<!1*3fJ_FFXEL#j1WEcz?*nl)A
zkY)$c0zjGzNJ{`|9w^NVr5XPkFzC%OWboN$z`zQWN4R46vND5Pm>Dr6U{nMx1ek5n
z1c2N<JeXpmBBLQdY6uM9(q+_VqaiRF0;3@?8UmvsFd71*Aut*OgDnK)M*IH^qy2wU
vdn_YQ{b>Jx<i$C?d_36dgi-g5hQMeDjE2By2#kinXb6mkz-R~z-w*%*qasFl

literal 0
HcmV?d00001

diff --git a/config/vendor/sources b/config/vendor/sources
index da30b05c..a45ec37f 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -23,7 +23,7 @@
 
 # NOTE: google's manifest for archives containing mrc.bin, used here:
 # https://web.archive.org/web/20210211071412/https://dl.google.com/dl/edgedl/chromeos/recovery/recovery.conf
-{t440pmrc w541mrc t440plibremrc w541}{
+{t440pmrc w541mrc t440plibremrc w541 dell9020mt}{
 	DL_hash f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998
 	DL_url https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
 	DL_url_bkup https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe

From 8e2e9735fe032c6f3229e44113ae6440b56b5400 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sun, 4 Feb 2024 02:16:26 +0000
Subject: [PATCH 0211/1549] add vga-only 9020 config

on a dgpu setup, igpu was still in use, when tested
by a user. do separate roms that don't enable anything
vga in coreboot, relying instead only on seabios to
execute a vga rom. these roms will only work if you
have a graphics card.

Signed-off-by: Leah Rowe <info@minifree.org>
---
 .../coreboot/dell9020mtvga_12mb/config/normal | 600 ++++++++++++++++++
 config/coreboot/dell9020mtvga_12mb/target.cfg |   7 +
 config/vendor/sources                         |   2 +-
 3 files changed, 608 insertions(+), 1 deletion(-)
 create mode 100644 config/coreboot/dell9020mtvga_12mb/config/normal
 create mode 100644 config/coreboot/dell9020mtvga_12mb/target.cfg

diff --git a/config/coreboot/dell9020mtvga_12mb/config/normal b/config/coreboot/dell9020mtvga_12mb/config/normal
new file mode 100644
index 00000000..cbc76dc5
--- /dev/null
+++ b/config/coreboot/dell9020mtvga_12mb/config/normal
@@ -0,0 +1,600 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_EHCI_BAR=0xe8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+# CONFIG_USE_BROADWELL_MRC is not set
+CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+# CONFIG_MAINBOARD_USE_LIBGFXINIT is not set
+# CONFIG_VGA_ROM_RUN is not set
+CONFIG_NO_GFX_INIT=y
+CONFIG_NO_EARLY_GFX_INIT=y
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+# CONFIG_INTEL_GMA_ADD_VBT is not set
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020mtvga_12mb/target.cfg b/config/coreboot/dell9020mtvga_12mb/target.cfg
new file mode 100644
index 00000000..e6d3bec6
--- /dev/null
+++ b/config/coreboot/dell9020mtvga_12mb/target.cfg
@@ -0,0 +1,7 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/vendor/sources b/config/vendor/sources
index a45ec37f..87604506 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -23,7 +23,7 @@
 
 # NOTE: google's manifest for archives containing mrc.bin, used here:
 # https://web.archive.org/web/20210211071412/https://dl.google.com/dl/edgedl/chromeos/recovery/recovery.conf
-{t440pmrc w541mrc t440plibremrc w541 dell9020mt}{
+{t440pmrc w541mrc t440plibremrc w541 dell9020mt dell9020mtvga}{
 	DL_hash f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998
 	DL_url https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
 	DL_url_bkup https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe

From 617f2b88fd5774196b9b6f74ec67eb48b2418213 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 26 Jan 2024 10:54:29 -0700
Subject: [PATCH 0212/1549] config: Add Dell Latitude E6420

Tested by Martin Dawson.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 ...dell-Add-Latitude-E6420-Sandy-Bridge.patch | 774 ++++++++++++++++++
 .../e6420_10mb/config/libgfxinit_corebootfb   | 617 ++++++++++++++
 .../e6420_10mb/config/libgfxinit_txtmode      | 614 ++++++++++++++
 config/coreboot/e6420_10mb/target.cfg         |  11 +
 .../e6430_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e6430_12mb/config/libgfxinit_txtmode      |   1 +
 .../e6530_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e6530_12mb/config/libgfxinit_txtmode      |   1 +
 .../t1650_12mb/config/libgfxinit_txtmode      |   1 +
 config/ifd/dell_sandybridge/gbe               | Bin 0 -> 8192 bytes
 config/ifd/dell_sandybridge/ifd               | Bin 0 -> 4096 bytes
 config/vendor/sources                         |   6 +
 12 files changed, 2027 insertions(+)
 create mode 100644 config/coreboot/default/patches/0031-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
 create mode 100644 config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/e6420_10mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/e6420_10mb/target.cfg
 create mode 100644 config/ifd/dell_sandybridge/gbe
 create mode 100644 config/ifd/dell_sandybridge/ifd

diff --git a/config/coreboot/default/patches/0031-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch b/config/coreboot/default/patches/0031-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
new file mode 100644
index 00000000..ddfc6571
--- /dev/null
+++ b/config/coreboot/default/patches/0031-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
@@ -0,0 +1,774 @@
+From 41002e64c92e90903fa591c4a8a1cc0108833743 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Sun, 26 Nov 2023 17:08:52 -0700
+Subject: [PATCH] mb/dell: Add Latitude E6420 (Sandy Bridge)
+
+Change-Id: Ic48d9ea58172a5b13958c8afebcb19c8929c4394
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e6420/Kconfig           |  38 ++++
+ src/mainboard/dell/e6420/Kconfig.name      |   2 +
+ src/mainboard/dell/e6420/Makefile.inc      |   6 +
+ src/mainboard/dell/e6420/acpi/ec.asl       |   9 +
+ src/mainboard/dell/e6420/acpi/platform.asl |  12 ++
+ src/mainboard/dell/e6420/acpi/superio.asl  |   3 +
+ src/mainboard/dell/e6420/acpi_tables.c     |  16 ++
+ src/mainboard/dell/e6420/board_info.txt    |   6 +
+ src/mainboard/dell/e6420/cmos.default      |   9 +
+ src/mainboard/dell/e6420/cmos.layout       |  88 ++++++++++
+ src/mainboard/dell/e6420/data.vbt          | Bin 0 -> 6144 bytes
+ src/mainboard/dell/e6420/devicetree.cb     |  66 +++++++
+ src/mainboard/dell/e6420/dsdt.asl          |  30 ++++
+ src/mainboard/dell/e6420/early_init.c      |  32 ++++
+ src/mainboard/dell/e6420/gma-mainboard.ads |  20 +++
+ src/mainboard/dell/e6420/gpio.c            | 191 +++++++++++++++++++++
+ src/mainboard/dell/e6420/hda_verb.c        |  33 ++++
+ src/mainboard/dell/e6420/mainboard.c       |  21 +++
+ 18 files changed, 582 insertions(+)
+ create mode 100644 src/mainboard/dell/e6420/Kconfig
+ create mode 100644 src/mainboard/dell/e6420/Kconfig.name
+ create mode 100644 src/mainboard/dell/e6420/Makefile.inc
+ create mode 100644 src/mainboard/dell/e6420/acpi/ec.asl
+ create mode 100644 src/mainboard/dell/e6420/acpi/platform.asl
+ create mode 100644 src/mainboard/dell/e6420/acpi/superio.asl
+ create mode 100644 src/mainboard/dell/e6420/acpi_tables.c
+ create mode 100644 src/mainboard/dell/e6420/board_info.txt
+ create mode 100644 src/mainboard/dell/e6420/cmos.default
+ create mode 100644 src/mainboard/dell/e6420/cmos.layout
+ create mode 100644 src/mainboard/dell/e6420/data.vbt
+ create mode 100644 src/mainboard/dell/e6420/devicetree.cb
+ create mode 100644 src/mainboard/dell/e6420/dsdt.asl
+ create mode 100644 src/mainboard/dell/e6420/early_init.c
+ create mode 100644 src/mainboard/dell/e6420/gma-mainboard.ads
+ create mode 100644 src/mainboard/dell/e6420/gpio.c
+ create mode 100644 src/mainboard/dell/e6420/hda_verb.c
+ create mode 100644 src/mainboard/dell/e6420/mainboard.c
+
+diff --git a/src/mainboard/dell/e6420/Kconfig b/src/mainboard/dell/e6420/Kconfig
+new file mode 100644
+index 0000000000..cff62bf70c
+--- /dev/null
++++ b/src/mainboard/dell/e6420/Kconfig
+@@ -0,0 +1,38 @@
++if BOARD_DELL_LATITUDE_E6420
++
++config BOARD_SPECIFIC_OPTIONS
++	def_bool y
++	select BOARD_ROMSIZE_KB_10240
++	select EC_ACPI
++	select EC_DELL_MEC5035
++	select GFX_GMA_PANEL_1_ON_LVDS
++	select HAVE_ACPI_RESUME
++	select HAVE_ACPI_TABLES
++	select HAVE_CMOS_DEFAULT
++	select HAVE_OPTION_TABLE
++	select INTEL_GMA_HAVE_VBT
++	select INTEL_INT15
++	select MAINBOARD_HAS_LIBGFXINIT
++	select MAINBOARD_USES_IFD_GBE_REGION
++	select NORTHBRIDGE_INTEL_SANDYBRIDGE
++	select SERIRQ_CONTINUOUS_MODE
++	select SOUTHBRIDGE_INTEL_BD82X6X
++	select SYSTEM_TYPE_LAPTOP
++	select USE_NATIVE_RAMINIT
++
++config DRAM_RESET_GATE_GPIO
++	default 60
++
++config MAINBOARD_DIR
++	default "dell/e6420"
++
++config MAINBOARD_PART_NUMBER
++	default "Latitude E6420"
++
++config USBDEBUG_HCD_INDEX
++	default 2
++
++config VGA_BIOS_ID
++	default "8086,0126"
++
++endif # BOARD_DELL_LATITUDE_E6420
+diff --git a/src/mainboard/dell/e6420/Kconfig.name b/src/mainboard/dell/e6420/Kconfig.name
+new file mode 100644
+index 0000000000..1722891e7b
+--- /dev/null
++++ b/src/mainboard/dell/e6420/Kconfig.name
+@@ -0,0 +1,2 @@
++config BOARD_DELL_LATITUDE_E6420
++	bool "Latitude E6420"
+diff --git a/src/mainboard/dell/e6420/Makefile.inc b/src/mainboard/dell/e6420/Makefile.inc
+new file mode 100644
+index 0000000000..ba64e93eb8
+--- /dev/null
++++ b/src/mainboard/dell/e6420/Makefile.inc
+@@ -0,0 +1,6 @@
++# SPDX-License-Identifier: GPL-2.0-only
++bootblock-y += early_init.c
++bootblock-y += gpio.c
++romstage-y += early_init.c
++romstage-y += gpio.c
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/dell/e6420/acpi/ec.asl b/src/mainboard/dell/e6420/acpi/ec.asl
+new file mode 100644
+index 0000000000..0d429410a9
+--- /dev/null
++++ b/src/mainboard/dell/e6420/acpi/ec.asl
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++Device(EC)
++{
++	Name (_HID, EISAID("PNP0C09"))
++	Name (_UID, 0)
++	Name (_GPE, 16)
++/* FIXME: EC support */
++}
+diff --git a/src/mainboard/dell/e6420/acpi/platform.asl b/src/mainboard/dell/e6420/acpi/platform.asl
+new file mode 100644
+index 0000000000..2d24bbd9b9
+--- /dev/null
++++ b/src/mainboard/dell/e6420/acpi/platform.asl
+@@ -0,0 +1,12 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++Method(_WAK, 1)
++{
++	/* FIXME: EC support  */
++	Return(Package() {0, 0})
++}
++
++Method(_PTS,1)
++{
++	/* FIXME: EC support  */
++}
+diff --git a/src/mainboard/dell/e6420/acpi/superio.asl b/src/mainboard/dell/e6420/acpi/superio.asl
+new file mode 100644
+index 0000000000..55b1db5b11
+--- /dev/null
++++ b/src/mainboard/dell/e6420/acpi/superio.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <drivers/pc80/pc/ps2_controller.asl>
+diff --git a/src/mainboard/dell/e6420/acpi_tables.c b/src/mainboard/dell/e6420/acpi_tables.c
+new file mode 100644
+index 0000000000..e2759659bf
+--- /dev/null
++++ b/src/mainboard/dell/e6420/acpi_tables.c
+@@ -0,0 +1,16 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi_gnvs.h>
++#include <soc/nvs.h>
++
++/* FIXME: check this function.  */
++void mainboard_fill_gnvs(struct global_nvs *gnvs)
++{
++	/* The lid is open by default. */
++	gnvs->lids = 1;
++
++	/* Temperature at which OS will shutdown */
++	gnvs->tcrt = 100;
++	/* Temperature at which OS will throttle CPU */
++	gnvs->tpsv = 90;
++}
+diff --git a/src/mainboard/dell/e6420/board_info.txt b/src/mainboard/dell/e6420/board_info.txt
+new file mode 100644
+index 0000000000..34d5ad9e0b
+--- /dev/null
++++ b/src/mainboard/dell/e6420/board_info.txt
+@@ -0,0 +1,6 @@
++Category: laptop
++ROM package: SOIC-8
++ROM protocol: SPI
++ROM socketed: n
++Flashrom support: y
++Release year: 2011
+diff --git a/src/mainboard/dell/e6420/cmos.default b/src/mainboard/dell/e6420/cmos.default
+new file mode 100644
+index 0000000000..279415dfd1
+--- /dev/null
++++ b/src/mainboard/dell/e6420/cmos.default
+@@ -0,0 +1,9 @@
++boot_option=Fallback
++debug_level=Debug
++power_on_after_fail=Disable
++nmi=Enable
++bluetooth=Enable
++wwan=Enable
++wlan=Enable
++sata_mode=AHCI
++me_state=Disabled
+diff --git a/src/mainboard/dell/e6420/cmos.layout b/src/mainboard/dell/e6420/cmos.layout
+new file mode 100644
+index 0000000000..1aa7e77bce
+--- /dev/null
++++ b/src/mainboard/dell/e6420/cmos.layout
+@@ -0,0 +1,88 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++# -----------------------------------------------------------------
++entries
++
++# -----------------------------------------------------------------
++0	120	r	0	reserved_memory
++
++# -----------------------------------------------------------------
++# RTC_BOOT_BYTE (coreboot hardcoded)
++384	1	e	4	boot_option
++388	4	h	0	reboot_counter
++
++# -----------------------------------------------------------------
++# coreboot config options: console
++395	4	e	6	debug_level
++
++#400	8	r	0	reserved for century byte
++
++# coreboot config options: southbridge
++408	1	e	1	nmi
++409	2	e	7	power_on_after_fail
++411     1       e       9       sata_mode
++
++# coreboot config options: EC
++412	1	e	1	bluetooth
++413	1	e	1	wwan
++414	1	e	1	wlan
++
++# coreboot config options: ME
++424	1	e	14	me_state
++425	2	h	0	me_state_prev
++
++# coreboot config options: northbridge
++432	3	e	11	gfx_uma_size
++435	2	e	12	hybrid_graphics_mode
++440	8	h	0	volume
++
++# VBOOT
++448	128	r	0	vbnv
++
++# SandyBridge MRC Scrambler Seed values
++896	32	r	0	mrc_scrambler_seed
++928	32	r	0	mrc_scrambler_seed_s3
++960	16	r	0	mrc_scrambler_seed_chk
++
++# coreboot config options: check sums
++984	16	h	0	check_sum
++
++# -----------------------------------------------------------------
++
++enumerations
++
++#ID	value	text
++1	0	Disable
++1	1	Enable
++2	0	Enable
++2	1	Disable
++4	0	Fallback
++4	1	Normal
++6	0	Emergency
++6	1	Alert
++6	2	Critical
++6	3	Error
++6	4	Warning
++6	5	Notice
++6	6	Info
++6	7	Debug
++6	8	Spew
++7	0	Disable
++7	1	Enable
++7	2	Keep
++9	0	AHCI
++9	1	Compatible
++11	0	32M
++11	1	64M
++11	2	96M
++11	3	128M
++11	4	160M
++11	5	192M
++11	6	224M
++14	0	Normal
++14	1	Disabled
++
++# -----------------------------------------------------------------
++checksums
++
++checksum 392 447 984
+diff --git a/src/mainboard/dell/e6420/data.vbt b/src/mainboard/dell/e6420/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..d3662eea1bc78b60be6d0bd2cc38bb46b654afbd
+GIT binary patch
+literal 6144
+zcmeHKeQZ-z6hE);wSBvNZ|mO1=*HLC2BQN8uVX6{N9eY)75ORymb$R8!YYuAZEgeE
+zKk|S@Fen*n41W-viAF;r%)~^EkpLz-B{2q##)LmGAtoY;7*Qhv_1yPbw$TC$2}G0K
+z=6Ao&x#ym9?z!i_&TOh(kLzky2cN8MTpny#R<;VU4Rkn?rBIz(YL~BBw<%b&zGhSH
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+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/e6420/devicetree.cb b/src/mainboard/dell/e6420/devicetree.cb
+new file mode 100644
+index 0000000000..f9259f7175
+--- /dev/null
++++ b/src/mainboard/dell/e6420/devicetree.cb
+@@ -0,0 +1,66 @@
++chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
++	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
++	register "gpu_cpu_backlight" = "0x0000054f"
++	register "gpu_dp_b_hotplug" = "4"
++	register "gpu_dp_c_hotplug" = "4"
++	register "gpu_dp_d_hotplug" = "4"
++	register "gpu_panel_port_select" = "0"
++	register "gpu_panel_power_backlight_off_delay" = "2300"
++	register "gpu_panel_power_backlight_on_delay" = "2300"
++	register "gpu_panel_power_cycle_delay" = "6"
++	register "gpu_panel_power_down_delay" = "400"
++	register "gpu_panel_power_up_delay" = "400"
++	register "gpu_pch_backlight" = "0x13121312"
++
++	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
++
++	device domain 0x0 on
++		subsystemid 0x1028 0x0493 inherit
++
++		device ref host_bridge on end # Host bridge
++		device ref peg10 on end # PEG
++		device ref igd on end # iGPU
++
++		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
++			register "docking_supported" = "1"
++			register "gen1_dec" = "0x007c0681"
++			register "gen2_dec" = "0x007c0901"
++			register "gen3_dec" = "0x003c07e1"
++			register "gen4_dec" = "0x001c0901"
++			register "gpi0_routing" = "2"
++			register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
++			register "pcie_port_coalesce" = "1"
++			register "sata_interface_speed_support" = "0x3"
++			register "sata_port_map" = "0x3b"
++			register "spi_lvscc" = "0x2005"
++			register "spi_uvscc" = "0x2005"
++
++			device ref mei1		off end
++			device ref mei2		off end
++			device ref me_ide_r	off end
++			device ref me_kt	off end
++			device ref gbe		on end
++			device ref ehci2	on end
++			device ref hda		on end
++			device ref pcie_rp1	on end
++			device ref pcie_rp2	on end
++			device ref pcie_rp3	on end
++			device ref pcie_rp4	on end
++			device ref pcie_rp5	off end
++			device ref pcie_rp6	on end
++			device ref pcie_rp7	off end
++			device ref pcie_rp8	off end
++			device ref ehci1	on end
++			device ref pci_bridge	off end
++			device ref lpc		on
++				chip ec/dell/mec5035
++					device pnp ff.0 on end
++				end
++			end
++			device ref sata1 on end
++			device ref smbus on end
++			device ref sata2 off end
++			device ref thermal off end
++		end
++	end
++end
+diff --git a/src/mainboard/dell/e6420/dsdt.asl b/src/mainboard/dell/e6420/dsdt.asl
+new file mode 100644
+index 0000000000..7d13c55b08
+--- /dev/null
++++ b/src/mainboard/dell/e6420/dsdt.asl
+@@ -0,0 +1,30 @@
++#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
++#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++
++#include <acpi/acpi.h>
++
++DefinitionBlock(
++	"dsdt.aml",
++	"DSDT",
++	ACPI_DSDT_REV_2,
++	OEM_ID,
++	ACPI_TABLE_CREATOR,
++	0x20141018	/* OEM revision */
++)
++{
++	#include <acpi/dsdt_top.asl>
++	#include "acpi/platform.asl"
++	#include <cpu/intel/common/acpi/cpu.asl>
++	#include <southbridge/intel/common/acpi/platform.asl>
++	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
++	#include <southbridge/intel/common/acpi/sleepstates.asl>
++
++	Device (\_SB.PCI0)
++	{
++		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
++		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
++		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
++	}
++}
+diff --git a/src/mainboard/dell/e6420/early_init.c b/src/mainboard/dell/e6420/early_init.c
+new file mode 100644
+index 0000000000..0682441ed6
+--- /dev/null
++++ b/src/mainboard/dell/e6420/early_init.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++const struct southbridge_usb_port mainboard_usb_ports[] = {
++	{ 1, 1, 0 },
++	{ 1, 1, 0 },
++	{ 1, 1, 1 },
++	{ 1, 1, 1 },
++	{ 1, 0, 2 },
++	{ 1, 1, 2 },
++	{ 1, 1, 3 },
++	{ 1, 1, 3 },
++	{ 1, 1, 5 },
++	{ 1, 1, 5 },
++	{ 1, 1, 7 },
++	{ 1, 1, 6 },
++	{ 1, 0, 6 },
++	{ 1, 0, 7 },
++};
++
++void bootblock_mainboard_early_init(void)
++{
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++			| COMB_LPC_EN | COMA_LPC_EN);
++	mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/e6420/gma-mainboard.ads b/src/mainboard/dell/e6420/gma-mainboard.ads
+new file mode 100644
+index 0000000000..2a16f44360
+--- /dev/null
++++ b/src/mainboard/dell/e6420/gma-mainboard.ads
+@@ -0,0 +1,20 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (
++      HDMI1, -- mainboard HDMI
++      DP2, -- dock DP
++      DP3, -- dock DP
++      Analog, -- mainboard VGA
++      LVDS,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/dell/e6420/gpio.c b/src/mainboard/dell/e6420/gpio.c
+new file mode 100644
+index 0000000000..943c743f48
+--- /dev/null
++++ b/src/mainboard/dell/e6420/gpio.c
+@@ -0,0 +1,191 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_NATIVE,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_NATIVE,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_GPIO,
++	.gpio31 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_INPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++	.gpio30 = GPIO_DIR_OUTPUT,
++	.gpio31 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio30 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio8 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_GPIO,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_OUTPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio45 = GPIO_DIR_OUTPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_OUTPUT,
++	.gpio51 = GPIO_DIR_INPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio34 = GPIO_LEVEL_HIGH,
++	.gpio45 = GPIO_LEVEL_LOW,
++	.gpio49 = GPIO_LEVEL_LOW,
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_GPIO,
++	.gpio71 = GPIO_MODE_GPIO,
++	.gpio72 = GPIO_MODE_NATIVE,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_NATIVE,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio68 = GPIO_DIR_INPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio70 = GPIO_DIR_INPUT,
++	.gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/e6420/hda_verb.c b/src/mainboard/dell/e6420/hda_verb.c
+new file mode 100644
+index 0000000000..b3803b7c65
+--- /dev/null
++++ b/src/mainboard/dell/e6420/hda_verb.c
+@@ -0,0 +1,33 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
++	0x10280493,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x10280493),
++	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
++	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++	0x80862805,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/e6420/mainboard.c b/src/mainboard/dell/e6420/mainboard.c
+new file mode 100644
+index 0000000000..31e49802fc
+--- /dev/null
++++ b/src/mainboard/dell/e6420/mainboard.c
+@@ -0,0 +1,21 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/device.h>
++#include <drivers/intel/gma/int15.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++#include <ec/acpi/ec.h>
++#include <console/console.h>
++#include <pc80/keyboard.h>
++
++static void mainboard_enable(struct device *dev)
++{
++
++	/* FIXME: fix these values. */
++	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
++					GMA_INT15_PANEL_FIT_DEFAULT,
++					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
++}
++
++struct chip_operations mainboard_ops = {
++	.enable_dev = mainboard_enable,
++};
+-- 
+2.43.0
+
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..9aeb40dd
--- /dev/null
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
@@ -0,0 +1,617 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6420"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/e6420"
+CONFIG_VGA_BIOS_ID="8086,0126"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x9E8000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6420=y
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6420"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=10240
+CONFIG_ROM_SIZE=0x00a00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..f0342bf1
--- /dev/null
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
@@ -0,0 +1,614 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6420"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/e6420"
+CONFIG_VGA_BIOS_ID="8086,0126"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x9E8000
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6420=y
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6420"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=10240
+CONFIG_ROM_SIZE=0x00a00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
new file mode 100644
index 00000000..1cf0792e
--- /dev/null
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -0,0 +1,11 @@
+tree="default"
+romtype="normal"
+arch="x86_64"
+payload_grub="n"
+payload_grub_withseabios="n"
+payload_seabios="y"
+payload_memtest="y"
+payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
+grub_scan_disk="ahci"
+microcode_required="n"
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 3254c612..0bad10a5 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -135,6 +135,7 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6430=y
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index c76f2a2f..47adf172 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -133,6 +133,7 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6430=y
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index 55e49b43..a7cf1248 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -135,6 +135,7 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6530=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index f4a09759..8d2ea409 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -133,6 +133,7 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6530=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index d980a8c2..dd4308be 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -136,6 +136,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
diff --git a/config/ifd/dell_sandybridge/gbe b/config/ifd/dell_sandybridge/gbe
new file mode 100644
index 0000000000000000000000000000000000000000..27bdfab1c7fe598d0a7ec3f41b5b27ada96f44db
GIT binary patch
literal 8192
zcmeI#v1$TA5C-7?_6%NOanUS7Ac&Phn$yHY0)Y#u0%D;rU@Q0zZXu}yK7(amAf&TR
z6C|(TON20)wGliEEi4ZHJ=j_1W|!rIJDBy$vN8QdB(lN;a8HTIGM*Qjv9Zu$ihe#@
zG!v9{QMy5T{Tx*SW8XiF4R!X9*19)`{%ho`H(UGyA_$PyZ84S1Kp?XC+mvOdZLzsc
zaA8`w>-r0{aIdkdv8(Y)<K?W4-rzw`Xd@lfQ20KF(}=GaF0%OPRP<d<Z^E%pU_6|K
zLB^knU4ig%Hv@c@vN>ibaIC<-?~*wRP=Epypa2CZKmiJzLSW7Q{}imbIg|bWVci=0
e|HGVEb-X}seipna1t>rP3Q&Lo6re!v1^xl~a-5t1

literal 0
HcmV?d00001

diff --git a/config/ifd/dell_sandybridge/ifd b/config/ifd/dell_sandybridge/ifd
new file mode 100644
index 0000000000000000000000000000000000000000..0647ca62edd02c825f16600f8b40ee9b0582eaf7
GIT binary patch
literal 4096
zcmeH~F$%&!5JmrPq9h7N#HdBUv9Ph)BSZxC27<T91w_1qcmgkxGFW&63k&fCdV^@3
zEn;aS3X@|0<}o{)d0q1S{aNnsfumffs+%oR0}KI_E7~yr69FFcV%tORJLp0|BM;u|
zfqD&a-JbHia-Uz>Z%$1wP{kCBVu8LMUs+z(4VVMQ*x|e_^VNjk^fP{Co=?A{nBdbh
zQZEL?fEW-1Vn7Ut0Wly3#K3<TxS0?Ys?g1JY<4+g%VW!9=9Dm}ggGV5Gh&_*^Ng7H
lry3!J)SoHNIbIprdn0>qWNiP`_D^m9l=(MoUPkio^8hXQ;EVtO

literal 0
HcmV?d00001

diff --git a/config/vendor/sources b/config/vendor/sources
index da30b05c..da11de95 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -143,6 +143,12 @@
 	E6400_VGA_romname mod_21.bin
 }
 
+{e6420}{
+	DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
+	DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
+	DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
+}
+
 {e6430 e6530}{
 	DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
 	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe

From a5bfbe4d10be6ea659a68e8ecff5475497c0fffa Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 31 Jan 2024 22:26:08 -0700
Subject: [PATCH 0213/1549] config: Add Dell Latitude E6520

Tested by Martin Dawson.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 ...dell-Add-Latitude-E6520-Sandy-Bridge.patch | 773 ++++++++++++++++++
 .../e6420_10mb/config/libgfxinit_corebootfb   |   1 +
 .../e6420_10mb/config/libgfxinit_txtmode      |   1 +
 .../e6430_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e6430_12mb/config/libgfxinit_txtmode      |   1 +
 .../e6520_10mb/config/libgfxinit_corebootfb   | 618 ++++++++++++++
 .../e6520_10mb/config/libgfxinit_txtmode      | 615 ++++++++++++++
 config/coreboot/e6520_10mb/target.cfg         |  11 +
 .../e6530_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e6530_12mb/config/libgfxinit_txtmode      |   1 +
 .../t1650_12mb/config/libgfxinit_txtmode      |   1 +
 config/vendor/sources                         |   2 +-
 12 files changed, 2025 insertions(+), 1 deletion(-)
 create mode 100644 config/coreboot/default/patches/0032-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
 create mode 100644 config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/e6520_10mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/e6520_10mb/target.cfg

diff --git a/config/coreboot/default/patches/0032-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch b/config/coreboot/default/patches/0032-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
new file mode 100644
index 00000000..39782376
--- /dev/null
+++ b/config/coreboot/default/patches/0032-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
@@ -0,0 +1,773 @@
+From 5e8bff81220d4d0f663feed443e4594b76e442bf Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Wed, 31 Jan 2024 22:07:25 -0700
+Subject: [PATCH] mb/dell: Add Latitude E6520 (Sandy Bridge)
+
+Change-Id: Ibdd40cc15642b8d404159d5962670ccc4167a9ec
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e6520/Kconfig           |  38 +++++
+ src/mainboard/dell/e6520/Kconfig.name      |   2 +
+ src/mainboard/dell/e6520/Makefile.inc      |   6 +
+ src/mainboard/dell/e6520/acpi/ec.asl       |   9 +
+ src/mainboard/dell/e6520/acpi/platform.asl |  12 ++
+ src/mainboard/dell/e6520/acpi/superio.asl  |   3 +
+ src/mainboard/dell/e6520/acpi_tables.c     |  16 ++
+ src/mainboard/dell/e6520/board_info.txt    |   6 +
+ src/mainboard/dell/e6520/cmos.default      |   9 +
+ src/mainboard/dell/e6520/cmos.layout       |  88 ++++++++++
+ src/mainboard/dell/e6520/data.vbt          | Bin 0 -> 6144 bytes
+ src/mainboard/dell/e6520/devicetree.cb     |  66 +++++++
+ src/mainboard/dell/e6520/dsdt.asl          |  30 ++++
+ src/mainboard/dell/e6520/early_init.c      |  32 ++++
+ src/mainboard/dell/e6520/gma-mainboard.ads |  20 +++
+ src/mainboard/dell/e6520/gpio.c            | 190 +++++++++++++++++++++
+ src/mainboard/dell/e6520/hda_verb.c        |  33 ++++
+ src/mainboard/dell/e6520/mainboard.c       |  21 +++
+ 18 files changed, 581 insertions(+)
+ create mode 100644 src/mainboard/dell/e6520/Kconfig
+ create mode 100644 src/mainboard/dell/e6520/Kconfig.name
+ create mode 100644 src/mainboard/dell/e6520/Makefile.inc
+ create mode 100644 src/mainboard/dell/e6520/acpi/ec.asl
+ create mode 100644 src/mainboard/dell/e6520/acpi/platform.asl
+ create mode 100644 src/mainboard/dell/e6520/acpi/superio.asl
+ create mode 100644 src/mainboard/dell/e6520/acpi_tables.c
+ create mode 100644 src/mainboard/dell/e6520/board_info.txt
+ create mode 100644 src/mainboard/dell/e6520/cmos.default
+ create mode 100644 src/mainboard/dell/e6520/cmos.layout
+ create mode 100644 src/mainboard/dell/e6520/data.vbt
+ create mode 100644 src/mainboard/dell/e6520/devicetree.cb
+ create mode 100644 src/mainboard/dell/e6520/dsdt.asl
+ create mode 100644 src/mainboard/dell/e6520/early_init.c
+ create mode 100644 src/mainboard/dell/e6520/gma-mainboard.ads
+ create mode 100644 src/mainboard/dell/e6520/gpio.c
+ create mode 100644 src/mainboard/dell/e6520/hda_verb.c
+ create mode 100644 src/mainboard/dell/e6520/mainboard.c
+
+diff --git a/src/mainboard/dell/e6520/Kconfig b/src/mainboard/dell/e6520/Kconfig
+new file mode 100644
+index 0000000000..db9f25b4ac
+--- /dev/null
++++ b/src/mainboard/dell/e6520/Kconfig
+@@ -0,0 +1,38 @@
++if BOARD_DELL_LATITUDE_E6520
++
++config BOARD_SPECIFIC_OPTIONS
++	def_bool y
++	select BOARD_ROMSIZE_KB_10240
++	select EC_ACPI
++	select EC_DELL_MEC5035
++	select GFX_GMA_PANEL_1_ON_LVDS
++	select HAVE_ACPI_RESUME
++	select HAVE_ACPI_TABLES
++	select HAVE_CMOS_DEFAULT
++	select HAVE_OPTION_TABLE
++	select INTEL_GMA_HAVE_VBT
++	select INTEL_INT15
++	select MAINBOARD_HAS_LIBGFXINIT
++	select MAINBOARD_USES_IFD_GBE_REGION
++	select NORTHBRIDGE_INTEL_SANDYBRIDGE
++	select SERIRQ_CONTINUOUS_MODE
++	select SOUTHBRIDGE_INTEL_BD82X6X
++	select SYSTEM_TYPE_LAPTOP
++	select USE_NATIVE_RAMINIT
++
++config DRAM_RESET_GATE_GPIO
++	default 60
++
++config MAINBOARD_DIR
++	default "dell/e6520"
++
++config MAINBOARD_PART_NUMBER
++	default "Latitude E6520"
++
++config USBDEBUG_HCD_INDEX
++	default 2
++
++config VGA_BIOS_ID
++	default "8086,0116"
++
++endif # BOARD_DELL_LATITUDE_E6520
+diff --git a/src/mainboard/dell/e6520/Kconfig.name b/src/mainboard/dell/e6520/Kconfig.name
+new file mode 100644
+index 0000000000..25968e80e5
+--- /dev/null
++++ b/src/mainboard/dell/e6520/Kconfig.name
+@@ -0,0 +1,2 @@
++config BOARD_DELL_LATITUDE_E6520
++	bool "Latitude E6520"
+diff --git a/src/mainboard/dell/e6520/Makefile.inc b/src/mainboard/dell/e6520/Makefile.inc
+new file mode 100644
+index 0000000000..ba64e93eb8
+--- /dev/null
++++ b/src/mainboard/dell/e6520/Makefile.inc
+@@ -0,0 +1,6 @@
++# SPDX-License-Identifier: GPL-2.0-only
++bootblock-y += early_init.c
++bootblock-y += gpio.c
++romstage-y += early_init.c
++romstage-y += gpio.c
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/dell/e6520/acpi/ec.asl b/src/mainboard/dell/e6520/acpi/ec.asl
+new file mode 100644
+index 0000000000..0d429410a9
+--- /dev/null
++++ b/src/mainboard/dell/e6520/acpi/ec.asl
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++Device(EC)
++{
++	Name (_HID, EISAID("PNP0C09"))
++	Name (_UID, 0)
++	Name (_GPE, 16)
++/* FIXME: EC support */
++}
+diff --git a/src/mainboard/dell/e6520/acpi/platform.asl b/src/mainboard/dell/e6520/acpi/platform.asl
+new file mode 100644
+index 0000000000..2d24bbd9b9
+--- /dev/null
++++ b/src/mainboard/dell/e6520/acpi/platform.asl
+@@ -0,0 +1,12 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++Method(_WAK, 1)
++{
++	/* FIXME: EC support  */
++	Return(Package() {0, 0})
++}
++
++Method(_PTS,1)
++{
++	/* FIXME: EC support  */
++}
+diff --git a/src/mainboard/dell/e6520/acpi/superio.asl b/src/mainboard/dell/e6520/acpi/superio.asl
+new file mode 100644
+index 0000000000..55b1db5b11
+--- /dev/null
++++ b/src/mainboard/dell/e6520/acpi/superio.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <drivers/pc80/pc/ps2_controller.asl>
+diff --git a/src/mainboard/dell/e6520/acpi_tables.c b/src/mainboard/dell/e6520/acpi_tables.c
+new file mode 100644
+index 0000000000..e2759659bf
+--- /dev/null
++++ b/src/mainboard/dell/e6520/acpi_tables.c
+@@ -0,0 +1,16 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi_gnvs.h>
++#include <soc/nvs.h>
++
++/* FIXME: check this function.  */
++void mainboard_fill_gnvs(struct global_nvs *gnvs)
++{
++	/* The lid is open by default. */
++	gnvs->lids = 1;
++
++	/* Temperature at which OS will shutdown */
++	gnvs->tcrt = 100;
++	/* Temperature at which OS will throttle CPU */
++	gnvs->tpsv = 90;
++}
+diff --git a/src/mainboard/dell/e6520/board_info.txt b/src/mainboard/dell/e6520/board_info.txt
+new file mode 100644
+index 0000000000..34d5ad9e0b
+--- /dev/null
++++ b/src/mainboard/dell/e6520/board_info.txt
+@@ -0,0 +1,6 @@
++Category: laptop
++ROM package: SOIC-8
++ROM protocol: SPI
++ROM socketed: n
++Flashrom support: y
++Release year: 2011
+diff --git a/src/mainboard/dell/e6520/cmos.default b/src/mainboard/dell/e6520/cmos.default
+new file mode 100644
+index 0000000000..279415dfd1
+--- /dev/null
++++ b/src/mainboard/dell/e6520/cmos.default
+@@ -0,0 +1,9 @@
++boot_option=Fallback
++debug_level=Debug
++power_on_after_fail=Disable
++nmi=Enable
++bluetooth=Enable
++wwan=Enable
++wlan=Enable
++sata_mode=AHCI
++me_state=Disabled
+diff --git a/src/mainboard/dell/e6520/cmos.layout b/src/mainboard/dell/e6520/cmos.layout
+new file mode 100644
+index 0000000000..1aa7e77bce
+--- /dev/null
++++ b/src/mainboard/dell/e6520/cmos.layout
+@@ -0,0 +1,88 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++# -----------------------------------------------------------------
++entries
++
++# -----------------------------------------------------------------
++0	120	r	0	reserved_memory
++
++# -----------------------------------------------------------------
++# RTC_BOOT_BYTE (coreboot hardcoded)
++384	1	e	4	boot_option
++388	4	h	0	reboot_counter
++
++# -----------------------------------------------------------------
++# coreboot config options: console
++395	4	e	6	debug_level
++
++#400	8	r	0	reserved for century byte
++
++# coreboot config options: southbridge
++408	1	e	1	nmi
++409	2	e	7	power_on_after_fail
++411     1       e       9       sata_mode
++
++# coreboot config options: EC
++412	1	e	1	bluetooth
++413	1	e	1	wwan
++414	1	e	1	wlan
++
++# coreboot config options: ME
++424	1	e	14	me_state
++425	2	h	0	me_state_prev
++
++# coreboot config options: northbridge
++432	3	e	11	gfx_uma_size
++435	2	e	12	hybrid_graphics_mode
++440	8	h	0	volume
++
++# VBOOT
++448	128	r	0	vbnv
++
++# SandyBridge MRC Scrambler Seed values
++896	32	r	0	mrc_scrambler_seed
++928	32	r	0	mrc_scrambler_seed_s3
++960	16	r	0	mrc_scrambler_seed_chk
++
++# coreboot config options: check sums
++984	16	h	0	check_sum
++
++# -----------------------------------------------------------------
++
++enumerations
++
++#ID	value	text
++1	0	Disable
++1	1	Enable
++2	0	Enable
++2	1	Disable
++4	0	Fallback
++4	1	Normal
++6	0	Emergency
++6	1	Alert
++6	2	Critical
++6	3	Error
++6	4	Warning
++6	5	Notice
++6	6	Info
++6	7	Debug
++6	8	Spew
++7	0	Disable
++7	1	Enable
++7	2	Keep
++9	0	AHCI
++9	1	Compatible
++11	0	32M
++11	1	64M
++11	2	96M
++11	3	128M
++11	4	160M
++11	5	192M
++11	6	224M
++14	0	Normal
++14	1	Disabled
++
++# -----------------------------------------------------------------
++checksums
++
++checksum 392 447 984
+diff --git a/src/mainboard/dell/e6520/data.vbt b/src/mainboard/dell/e6520/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..0ef16ee7cb482d2cb91ea80c3f419759355f7ba0
+GIT binary patch
+literal 6144
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+z-jp>o1ffJNommZ4?=TIPlePIw0hgQ706f*tBC`#pg>9&zRHe>J2%RxBTrOc6Adh9E
+ziJr`?VQH!N!_GkoKaoq|+3$^Ae0#sUxXlmM1Huq~g<=Ls?ILv+nQcH%PQedGOlH=Q
+z77rMcJlH4Mkc#U2(IDv>rsm1aHpsdL_RdT^i_ACcQUMIJcSus}*(?CIiy^#^=t=g1
+z+*^Zbh30&^#_bKclSy9pL$<B~pK8m*sLpIdnHM@W$nA7Ea@Z`x27K?aNK<@lCW(2L
+zb@kB3H8kKy4W3Hu)NN|kd!DL^o#iR9a{QYV-Wl&r&hmIFX{ezkIV<4zFiVUQ@K>ao
+z00DnFy~Uek!JRwhVX!of0)$Sa*X^S~LMQH0<E(UUx}L=|;Kgw(r(4q=nD)T52c|tR
+O?SW|zOncy=dEg(6JAK&z
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/e6520/devicetree.cb b/src/mainboard/dell/e6520/devicetree.cb
+new file mode 100644
+index 0000000000..cfba8ef4e7
+--- /dev/null
++++ b/src/mainboard/dell/e6520/devicetree.cb
+@@ -0,0 +1,66 @@
++chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
++	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
++	register "gpu_cpu_backlight" = "0x00001312"
++	register "gpu_dp_b_hotplug" = "4"
++	register "gpu_dp_c_hotplug" = "4"
++	register "gpu_dp_d_hotplug" = "4"
++	register "gpu_panel_port_select" = "0"
++	register "gpu_panel_power_backlight_off_delay" = "2300"
++	register "gpu_panel_power_backlight_on_delay" = "2300"
++	register "gpu_panel_power_cycle_delay" = "6"
++	register "gpu_panel_power_down_delay" = "400"
++	register "gpu_panel_power_up_delay" = "400"
++	register "gpu_pch_backlight" = "0x13121312"
++
++	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
++
++	device domain 0x0 on
++		subsystemid 0x1028 0x0494 inherit
++
++		device ref host_bridge on end # Host bridge
++		device ref peg10 on end # PEG
++		device ref igd on end # iGPU
++
++		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
++			register "docking_supported" = "1"
++			register "gen1_dec" = "0x007c0681"
++			register "gen2_dec" = "0x007c0901"
++			register "gen3_dec" = "0x003c07e1"
++			register "gen4_dec" = "0x001c0901"
++			register "gpi0_routing" = "2"
++			register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
++			register "pcie_port_coalesce" = "1"
++			register "sata_interface_speed_support" = "0x3"
++			register "sata_port_map" = "0x3b"
++			register "spi_lvscc" = "0x2005"
++			register "spi_uvscc" = "0x2005"
++
++			device ref mei1		off end
++			device ref mei2		off end
++			device ref me_ide_r	off end
++			device ref me_kt	off end
++			device ref gbe		on end
++			device ref ehci2	on end
++			device ref hda		on end
++			device ref pcie_rp1	on end
++			device ref pcie_rp2	on end
++			device ref pcie_rp3	on end
++			device ref pcie_rp4	on end
++			device ref pcie_rp5	off end
++			device ref pcie_rp6	on end
++			device ref pcie_rp7	off end
++			device ref pcie_rp8	off end
++			device ref ehci1	on end
++			device ref pci_bridge	off end
++			device ref lpc		on
++				chip ec/dell/mec5035
++					device pnp ff.0 on end
++				end
++			end
++			device ref sata1 on end
++			device ref smbus on end
++			device ref sata2 off end
++			device ref thermal off end
++		end
++	end
++end
+diff --git a/src/mainboard/dell/e6520/dsdt.asl b/src/mainboard/dell/e6520/dsdt.asl
+new file mode 100644
+index 0000000000..7d13c55b08
+--- /dev/null
++++ b/src/mainboard/dell/e6520/dsdt.asl
+@@ -0,0 +1,30 @@
++#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
++#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++
++#include <acpi/acpi.h>
++
++DefinitionBlock(
++	"dsdt.aml",
++	"DSDT",
++	ACPI_DSDT_REV_2,
++	OEM_ID,
++	ACPI_TABLE_CREATOR,
++	0x20141018	/* OEM revision */
++)
++{
++	#include <acpi/dsdt_top.asl>
++	#include "acpi/platform.asl"
++	#include <cpu/intel/common/acpi/cpu.asl>
++	#include <southbridge/intel/common/acpi/platform.asl>
++	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
++	#include <southbridge/intel/common/acpi/sleepstates.asl>
++
++	Device (\_SB.PCI0)
++	{
++		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
++		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
++		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
++	}
++}
+diff --git a/src/mainboard/dell/e6520/early_init.c b/src/mainboard/dell/e6520/early_init.c
+new file mode 100644
+index 0000000000..2a37091df6
+--- /dev/null
++++ b/src/mainboard/dell/e6520/early_init.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++const struct southbridge_usb_port mainboard_usb_ports[] = {
++	{ 1, 1, 0 },
++	{ 1, 1, 0 },
++	{ 1, 1, 1 },
++	{ 1, 1, 1 },
++	{ 1, 0, 2 },
++	{ 1, 1, 2 },
++	{ 1, 0, 3 },
++	{ 1, 0, 3 },
++	{ 1, 1, 5 },
++	{ 1, 1, 5 },
++	{ 1, 1, 7 },
++	{ 1, 1, 6 },
++	{ 1, 0, 6 },
++	{ 1, 0, 7 },
++};
++
++void bootblock_mainboard_early_init(void)
++{
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++			| COMB_LPC_EN | COMA_LPC_EN);
++	mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/e6520/gma-mainboard.ads b/src/mainboard/dell/e6520/gma-mainboard.ads
+new file mode 100644
+index 0000000000..2a16f44360
+--- /dev/null
++++ b/src/mainboard/dell/e6520/gma-mainboard.ads
+@@ -0,0 +1,20 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (
++      HDMI1, -- mainboard HDMI
++      DP2, -- dock DP
++      DP3, -- dock DP
++      Analog, -- mainboard VGA
++      LVDS,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/dell/e6520/gpio.c b/src/mainboard/dell/e6520/gpio.c
+new file mode 100644
+index 0000000000..61f01816c4
+--- /dev/null
++++ b/src/mainboard/dell/e6520/gpio.c
+@@ -0,0 +1,190 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_NATIVE,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_NATIVE,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_GPIO,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_INPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++	.gpio30 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio30 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio8 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_GPIO,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_OUTPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio45 = GPIO_DIR_OUTPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_OUTPUT,
++	.gpio51 = GPIO_DIR_INPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio34 = GPIO_LEVEL_HIGH,
++	.gpio45 = GPIO_LEVEL_LOW,
++	.gpio49 = GPIO_LEVEL_LOW,
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_GPIO,
++	.gpio71 = GPIO_MODE_GPIO,
++	.gpio72 = GPIO_MODE_NATIVE,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_NATIVE,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio68 = GPIO_DIR_INPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio70 = GPIO_DIR_INPUT,
++	.gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/e6520/hda_verb.c b/src/mainboard/dell/e6520/hda_verb.c
+new file mode 100644
+index 0000000000..d33eb3b4c5
+--- /dev/null
++++ b/src/mainboard/dell/e6520/hda_verb.c
+@@ -0,0 +1,33 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
++	0x10280494,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x10280494),
++	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++	AZALIA_PIN_CFG(0, 0x11, 0x400000f2),
++	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++	0x80862805,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/e6520/mainboard.c b/src/mainboard/dell/e6520/mainboard.c
+new file mode 100644
+index 0000000000..31e49802fc
+--- /dev/null
++++ b/src/mainboard/dell/e6520/mainboard.c
+@@ -0,0 +1,21 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/device.h>
++#include <drivers/intel/gma/int15.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++#include <ec/acpi/ec.h>
++#include <console/console.h>
++#include <pc80/keyboard.h>
++
++static void mainboard_enable(struct device *dev)
++{
++
++	/* FIXME: fix these values. */
++	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
++					GMA_INT15_PANEL_FIT_DEFAULT,
++					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
++}
++
++struct chip_operations mainboard_ops = {
++	.enable_dev = mainboard_enable,
++};
+-- 
+2.43.0
+
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
index 9aeb40dd..57e434a5 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
@@ -137,6 +137,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6420=y
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
index f0342bf1..c3085fc5 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
@@ -135,6 +135,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6420=y
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 0bad10a5..f7c48cd9 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -137,6 +137,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6430=y
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index 47adf172..982e19c9 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -135,6 +135,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6430=y
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..41f7e58b
--- /dev/null
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
@@ -0,0 +1,618 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6520"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/e6520"
+CONFIG_VGA_BIOS_ID="8086,0116"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x9E8000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6520=y
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6520"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=10240
+CONFIG_ROM_SIZE=0x00a00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..fed3fbce
--- /dev/null
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
@@ -0,0 +1,615 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6520"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/e6520"
+CONFIG_VGA_BIOS_ID="8086,0116"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x9E8000
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6520=y
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6520"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=10240
+CONFIG_ROM_SIZE=0x00a00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
new file mode 100644
index 00000000..1cf0792e
--- /dev/null
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -0,0 +1,11 @@
+tree="default"
+romtype="normal"
+arch="x86_64"
+payload_grub="n"
+payload_grub_withseabios="n"
+payload_seabios="y"
+payload_memtest="y"
+payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
+grub_scan_disk="ahci"
+microcode_required="n"
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index a7cf1248..f695d764 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -137,6 +137,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6530=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index 8d2ea409..1cc2013b 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -135,6 +135,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6530=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index dd4308be..62b14ebf 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -138,6 +138,7 @@ CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 CONFIG_BOARD_DELL_PRECISION_T1650=y
diff --git a/config/vendor/sources b/config/vendor/sources
index da11de95..7bce5ca7 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -143,7 +143,7 @@
 	E6400_VGA_romname mod_21.bin
 }
 
-{e6420}{
+{e6420 e6520}{
 	DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
 	DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
 	DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe

From eee22447a7e20d7584bcad046534600fb0515c74 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Thu, 1 Feb 2024 07:10:38 -0700
Subject: [PATCH 0214/1549] config: Add Dell Latitude E5530

Tested by Martin Dawson.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 ...b-dell-Add-Latitude-E5530-Ivy-Bridge.patch | 780 ++++++++++++++++++
 .../e5530_12mb/config/libgfxinit_corebootfb   | 616 ++++++++++++++
 .../e5530_12mb/config/libgfxinit_txtmode      | 613 ++++++++++++++
 config/coreboot/e5530_12mb/target.cfg         |   9 +
 .../e6420_10mb/config/libgfxinit_corebootfb   |   1 +
 .../e6420_10mb/config/libgfxinit_txtmode      |   1 +
 .../e6430_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e6430_12mb/config/libgfxinit_txtmode      |   1 +
 .../e6520_10mb/config/libgfxinit_corebootfb   |   1 +
 .../e6520_10mb/config/libgfxinit_txtmode      |   1 +
 .../e6530_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e6530_12mb/config/libgfxinit_txtmode      |   1 +
 .../t1650_12mb/config/libgfxinit_txtmode      |   1 +
 config/vendor/sources                         |   2 +-
 14 files changed, 2028 insertions(+), 1 deletion(-)
 create mode 100644 config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
 create mode 100644 config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/e5530_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/e5530_12mb/target.cfg

diff --git a/config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch b/config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
new file mode 100644
index 00000000..9a1bea26
--- /dev/null
+++ b/config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
@@ -0,0 +1,780 @@
+From 86911e57c556389eed386bc23d5e87dd520afec9 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Wed, 31 Jan 2024 22:57:07 -0700
+Subject: [PATCH] mb/dell: Add Latitude E5530 (Ivy Bridge)
+
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e5530/Kconfig           |  37 ++++
+ src/mainboard/dell/e5530/Kconfig.name      |   2 +
+ src/mainboard/dell/e5530/Makefile.inc      |   6 +
+ src/mainboard/dell/e5530/acpi/ec.asl       |   9 +
+ src/mainboard/dell/e5530/acpi/platform.asl |  12 ++
+ src/mainboard/dell/e5530/acpi/superio.asl  |   3 +
+ src/mainboard/dell/e5530/acpi_tables.c     |  16 ++
+ src/mainboard/dell/e5530/board_info.txt    |   6 +
+ src/mainboard/dell/e5530/cmos.default      |   9 +
+ src/mainboard/dell/e5530/cmos.layout       |  88 ++++++++++
+ src/mainboard/dell/e5530/data.vbt          | Bin 0 -> 6144 bytes
+ src/mainboard/dell/e5530/devicetree.cb     |  70 ++++++++
+ src/mainboard/dell/e5530/dsdt.asl          |  30 ++++
+ src/mainboard/dell/e5530/early_init.c      |  32 ++++
+ src/mainboard/dell/e5530/gma-mainboard.ads |  20 +++
+ src/mainboard/dell/e5530/gpio.c            | 194 +++++++++++++++++++++
+ src/mainboard/dell/e5530/hda_verb.c        |  33 ++++
+ src/mainboard/dell/e5530/mainboard.c       |  21 +++
+ 18 files changed, 588 insertions(+)
+ create mode 100644 src/mainboard/dell/e5530/Kconfig
+ create mode 100644 src/mainboard/dell/e5530/Kconfig.name
+ create mode 100644 src/mainboard/dell/e5530/Makefile.inc
+ create mode 100644 src/mainboard/dell/e5530/acpi/ec.asl
+ create mode 100644 src/mainboard/dell/e5530/acpi/platform.asl
+ create mode 100644 src/mainboard/dell/e5530/acpi/superio.asl
+ create mode 100644 src/mainboard/dell/e5530/acpi_tables.c
+ create mode 100644 src/mainboard/dell/e5530/board_info.txt
+ create mode 100644 src/mainboard/dell/e5530/cmos.default
+ create mode 100644 src/mainboard/dell/e5530/cmos.layout
+ create mode 100644 src/mainboard/dell/e5530/data.vbt
+ create mode 100644 src/mainboard/dell/e5530/devicetree.cb
+ create mode 100644 src/mainboard/dell/e5530/dsdt.asl
+ create mode 100644 src/mainboard/dell/e5530/early_init.c
+ create mode 100644 src/mainboard/dell/e5530/gma-mainboard.ads
+ create mode 100644 src/mainboard/dell/e5530/gpio.c
+ create mode 100644 src/mainboard/dell/e5530/hda_verb.c
+ create mode 100644 src/mainboard/dell/e5530/mainboard.c
+
+diff --git a/src/mainboard/dell/e5530/Kconfig b/src/mainboard/dell/e5530/Kconfig
+new file mode 100644
+index 0000000000..3faae4ee50
+--- /dev/null
++++ b/src/mainboard/dell/e5530/Kconfig
+@@ -0,0 +1,37 @@
++if BOARD_DELL_LATITUDE_E5530
++
++config BOARD_SPECIFIC_OPTIONS
++	def_bool y
++	select BOARD_ROMSIZE_KB_12288
++	select EC_ACPI
++	select EC_DELL_MEC5035
++	select GFX_GMA_PANEL_1_ON_LVDS
++	select HAVE_ACPI_RESUME
++	select HAVE_ACPI_TABLES
++	select HAVE_CMOS_DEFAULT
++	select HAVE_OPTION_TABLE
++	select INTEL_GMA_HAVE_VBT
++	select INTEL_INT15
++	select MAINBOARD_HAS_LIBGFXINIT
++	select NORTHBRIDGE_INTEL_SANDYBRIDGE
++	select SERIRQ_CONTINUOUS_MODE
++	select SOUTHBRIDGE_INTEL_C216
++	select SYSTEM_TYPE_LAPTOP
++	select USE_NATIVE_RAMINIT
++
++config DRAM_RESET_GATE_GPIO
++	default 60
++
++config MAINBOARD_DIR
++	default "dell/e5530"
++
++config MAINBOARD_PART_NUMBER
++	default "Latitude E5530"
++
++config USBDEBUG_HCD_INDEX
++	default 2
++
++config VGA_BIOS_ID
++	default "8086,0166"
++
++endif # BOARD_DELL_LATITUDE_E5530
+diff --git a/src/mainboard/dell/e5530/Kconfig.name b/src/mainboard/dell/e5530/Kconfig.name
+new file mode 100644
+index 0000000000..775963204a
+--- /dev/null
++++ b/src/mainboard/dell/e5530/Kconfig.name
+@@ -0,0 +1,2 @@
++config BOARD_DELL_LATITUDE_E5530
++	bool "Latitude E5530"
+diff --git a/src/mainboard/dell/e5530/Makefile.inc b/src/mainboard/dell/e5530/Makefile.inc
+new file mode 100644
+index 0000000000..ba64e93eb8
+--- /dev/null
++++ b/src/mainboard/dell/e5530/Makefile.inc
+@@ -0,0 +1,6 @@
++# SPDX-License-Identifier: GPL-2.0-only
++bootblock-y += early_init.c
++bootblock-y += gpio.c
++romstage-y += early_init.c
++romstage-y += gpio.c
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/dell/e5530/acpi/ec.asl b/src/mainboard/dell/e5530/acpi/ec.asl
+new file mode 100644
+index 0000000000..0d429410a9
+--- /dev/null
++++ b/src/mainboard/dell/e5530/acpi/ec.asl
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++Device(EC)
++{
++	Name (_HID, EISAID("PNP0C09"))
++	Name (_UID, 0)
++	Name (_GPE, 16)
++/* FIXME: EC support */
++}
+diff --git a/src/mainboard/dell/e5530/acpi/platform.asl b/src/mainboard/dell/e5530/acpi/platform.asl
+new file mode 100644
+index 0000000000..2d24bbd9b9
+--- /dev/null
++++ b/src/mainboard/dell/e5530/acpi/platform.asl
+@@ -0,0 +1,12 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++Method(_WAK, 1)
++{
++	/* FIXME: EC support  */
++	Return(Package() {0, 0})
++}
++
++Method(_PTS,1)
++{
++	/* FIXME: EC support  */
++}
+diff --git a/src/mainboard/dell/e5530/acpi/superio.asl b/src/mainboard/dell/e5530/acpi/superio.asl
+new file mode 100644
+index 0000000000..55b1db5b11
+--- /dev/null
++++ b/src/mainboard/dell/e5530/acpi/superio.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <drivers/pc80/pc/ps2_controller.asl>
+diff --git a/src/mainboard/dell/e5530/acpi_tables.c b/src/mainboard/dell/e5530/acpi_tables.c
+new file mode 100644
+index 0000000000..e2759659bf
+--- /dev/null
++++ b/src/mainboard/dell/e5530/acpi_tables.c
+@@ -0,0 +1,16 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi_gnvs.h>
++#include <soc/nvs.h>
++
++/* FIXME: check this function.  */
++void mainboard_fill_gnvs(struct global_nvs *gnvs)
++{
++	/* The lid is open by default. */
++	gnvs->lids = 1;
++
++	/* Temperature at which OS will shutdown */
++	gnvs->tcrt = 100;
++	/* Temperature at which OS will throttle CPU */
++	gnvs->tpsv = 90;
++}
+diff --git a/src/mainboard/dell/e5530/board_info.txt b/src/mainboard/dell/e5530/board_info.txt
+new file mode 100644
+index 0000000000..4601a4aaba
+--- /dev/null
++++ b/src/mainboard/dell/e5530/board_info.txt
+@@ -0,0 +1,6 @@
++Category: laptop
++ROM package: SOIC-8
++ROM protocol: SPI
++ROM socketed: n
++Flashrom support: y
++Release year: 2012
+diff --git a/src/mainboard/dell/e5530/cmos.default b/src/mainboard/dell/e5530/cmos.default
+new file mode 100644
+index 0000000000..279415dfd1
+--- /dev/null
++++ b/src/mainboard/dell/e5530/cmos.default
+@@ -0,0 +1,9 @@
++boot_option=Fallback
++debug_level=Debug
++power_on_after_fail=Disable
++nmi=Enable
++bluetooth=Enable
++wwan=Enable
++wlan=Enable
++sata_mode=AHCI
++me_state=Disabled
+diff --git a/src/mainboard/dell/e5530/cmos.layout b/src/mainboard/dell/e5530/cmos.layout
+new file mode 100644
+index 0000000000..1aa7e77bce
+--- /dev/null
++++ b/src/mainboard/dell/e5530/cmos.layout
+@@ -0,0 +1,88 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++# -----------------------------------------------------------------
++entries
++
++# -----------------------------------------------------------------
++0	120	r	0	reserved_memory
++
++# -----------------------------------------------------------------
++# RTC_BOOT_BYTE (coreboot hardcoded)
++384	1	e	4	boot_option
++388	4	h	0	reboot_counter
++
++# -----------------------------------------------------------------
++# coreboot config options: console
++395	4	e	6	debug_level
++
++#400	8	r	0	reserved for century byte
++
++# coreboot config options: southbridge
++408	1	e	1	nmi
++409	2	e	7	power_on_after_fail
++411     1       e       9       sata_mode
++
++# coreboot config options: EC
++412	1	e	1	bluetooth
++413	1	e	1	wwan
++414	1	e	1	wlan
++
++# coreboot config options: ME
++424	1	e	14	me_state
++425	2	h	0	me_state_prev
++
++# coreboot config options: northbridge
++432	3	e	11	gfx_uma_size
++435	2	e	12	hybrid_graphics_mode
++440	8	h	0	volume
++
++# VBOOT
++448	128	r	0	vbnv
++
++# SandyBridge MRC Scrambler Seed values
++896	32	r	0	mrc_scrambler_seed
++928	32	r	0	mrc_scrambler_seed_s3
++960	16	r	0	mrc_scrambler_seed_chk
++
++# coreboot config options: check sums
++984	16	h	0	check_sum
++
++# -----------------------------------------------------------------
++
++enumerations
++
++#ID	value	text
++1	0	Disable
++1	1	Enable
++2	0	Enable
++2	1	Disable
++4	0	Fallback
++4	1	Normal
++6	0	Emergency
++6	1	Alert
++6	2	Critical
++6	3	Error
++6	4	Warning
++6	5	Notice
++6	6	Info
++6	7	Debug
++6	8	Spew
++7	0	Disable
++7	1	Enable
++7	2	Keep
++9	0	AHCI
++9	1	Compatible
++11	0	32M
++11	1	64M
++11	2	96M
++11	3	128M
++11	4	160M
++11	5	192M
++11	6	224M
++14	0	Normal
++14	1	Disabled
++
++# -----------------------------------------------------------------
++checksums
++
++checksum 392 447 984
+diff --git a/src/mainboard/dell/e5530/data.vbt b/src/mainboard/dell/e5530/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..3c54b70be7856a6420d001112d7f17f8bab46ed3
+GIT binary patch
+literal 6144
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+zkph}GhP}~YR?roT!61GqzQ?gBsuv3jY}UXbmr|alv^VxUqbz5<`5=!hhpaa*7DK~4
+zP4ad6dhH!>nYpc4{J&G-w{UiWo$zXnTz{tAq0|?c_`QJ7pKmCwIpe7Uix$P?9}v*1
+z(aVR6OkMkQ6oM}*UC@j78!~>7=OZCVYXeu|u0SiI4}w$uw6&0P09LF%Hp}O&IA3gl
+z4@ap0NfAe+q(ZVm{Bwe*Do~kbCc$Q!x7b3Sk9tLgVmsR<Q4H=9Nl;mmf2xpY<*d*-
+z`yI_BR#`La=Oxxt#qgS`3pER^nh^CZ%*qlq2N9@uSAtz-C7AhduB_U|{>#oOrY`tq
+z%|?L!zRd2-$V6^@$H<Mj3MXf#F<J+^8%<X2{tnmQTI*aK*ageBrm9^|<Ked3j_s;%
+zva<(Dob)BOwdcj8Z67UhYUAjbk==Of9W#D7k!DJobLx$$fXD_wuZyD&Kk-$EIY~S`
+zan1ANbFUW8hZ0pUw5)y??*}!;chdgq|0X5;s;m`@YdY{zs4z#z8e;13T6b4tC7gy$
+zTwszEQhk0!U$`3=Qi)ZbY^*|bAyvF>@ml^iaX;uzoVB3JA(|h9tcNKXHdA43N0|18
+z&3$2QE=)(l=6qQDAWT1oO-<KoblR+&{kk@!)1A8ch^`&b>2=+FU)Mg<35IDJ+8Tp;
+z40F)Xt}$rVFdsLxLk7KRn4cKhmj<a3vp%A&kI>eLd38j)HbM_Y%!3i_aD?8An8za8
+z@d(AD=Gv&%5;e{}p%i?_q(T*^IwzEx*Eu1wKHV9=lVUvjqv!B@cWER!2fe%`IqO?q
+z!=Wf4kzGUaLX8`m#*P^uL?%M#6qc9Qu(YT|ZMb#7UzCc_(DkQYEG<G&Q*QkX`CS`I
+z8cwQnl8A#CMH~W79L&{2*Jof_MD5t{bPTAszWUa20yPzD=*wW8)wHSu?avDhffu^!
+zL>Q#%k_O0@^DN5S@MXi$D;acJ>#cTV-(U@Offv4ACp4hO4$Ll!WO)s3P4=t9vpWBC
+zSckhlcD?xUuX=Gx96Dx{IsQ23r&;o1*+^Cp2RA3nd$A-RIHP2Q7uitC>c67FIR*5}
+zB3a%B!?6K=TJ$W+SJv@*9Lms{mTvWmU4Zanj_Z*lSqOGISzYp?yawOqLhVhRt#-E6
+zd)YW~h&meh-5prIE}Cr&7f?MMi&cqTt_^%Fa?>k(=`9jVoIf@}{g+WX#TpWuc+!2v
+zPG^>A|NZ2GlGsKdGqN{7>Fr7+Hc_^3z}uBhC4?nzOQ*!QyVugGjkK_~$bvtfY`h79
+z9rOI3;Mt}9)_G{zXTAPw`8T@6=Ut0r9R5;0#Zy|#8F;v4^UAmqft3iXL|`QXD-l?U
+Jz~2*rUjdP?m;3+#
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/e5530/devicetree.cb b/src/mainboard/dell/e5530/devicetree.cb
+new file mode 100644
+index 0000000000..2af748cf27
+--- /dev/null
++++ b/src/mainboard/dell/e5530/devicetree.cb
+@@ -0,0 +1,70 @@
++chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
++	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
++	register "gpu_cpu_backlight" = "0x00000000"
++	register "gpu_dp_b_hotplug" = "4"
++	register "gpu_dp_c_hotplug" = "4"
++	register "gpu_dp_d_hotplug" = "4"
++	register "gpu_panel_port_select" = "0"
++	register "gpu_panel_power_backlight_off_delay" = "2300"
++	register "gpu_panel_power_backlight_on_delay" = "2300"
++	register "gpu_panel_power_cycle_delay" = "6"
++	register "gpu_panel_power_down_delay" = "400"
++	register "gpu_panel_power_up_delay" = "400"
++	register "gpu_pch_backlight" = "0x03d003d0"
++
++	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
++
++	device domain 0x0 on
++		subsystemid 0x1028 0x053d inherit
++
++		device ref host_bridge on end
++		device ref peg10 off end
++		device ref igd on end
++
++		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
++			register "docking_supported" = "1"
++			register "gen1_dec" = "0x007c0681"
++			register "gen2_dec" = "0x005c0921"
++			register "gen3_dec" = "0x003c07e1"
++			register "gen4_dec" = "0x00000911" # Ports 0x910/0x911 for EC
++			register "gpi0_routing" = "2"
++			register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
++			register "pcie_port_coalesce" = "1"
++			register "sata_interface_speed_support" = "0x3"
++			register "sata_port_map" = "0x33"
++			register "spi_lvscc" = "0x2005"
++			register "spi_uvscc" = "0x2005"
++			register "superspeed_capable_ports" = "0x0000000f"
++			register "xhci_overcurrent_mapping" = "0x00000c03"
++			register "xhci_switchable_ports" = "0x0000000f"
++
++			device ref xhci		on end
++			device ref mei1		off end
++			device ref mei2		off end
++			device ref me_ide_r	off end
++			device ref me_kt	off end
++			device ref gbe		off end
++			device ref ehci2	on end
++			device ref hda		on end
++			device ref pcie_rp1	on end # WWAN Slot
++			device ref pcie_rp2	on end # SLAN Slot
++			device ref pcie_rp3	on end # ExpressCard
++			device ref pcie_rp4	off end
++			device ref pcie_rp5	on end # Extra Half Mini PCIe slot
++			device ref pcie_rp6	on end # SD/MMC Card Reader
++			device ref pcie_rp7	on end # BCM5761 Ethernet
++			device ref pcie_rp8	off end
++			device ref ehci1	on end
++			device ref pci_bridge	off end
++			device ref lpc		on
++				chip ec/dell/mec5035
++					device pnp ff.0 on end
++				end
++			end
++			device ref sata1	on end
++			device ref smbus	on end
++			device ref sata2	off end
++			device ref thermal	off end
++		end
++	end
++end
+diff --git a/src/mainboard/dell/e5530/dsdt.asl b/src/mainboard/dell/e5530/dsdt.asl
+new file mode 100644
+index 0000000000..7d13c55b08
+--- /dev/null
++++ b/src/mainboard/dell/e5530/dsdt.asl
+@@ -0,0 +1,30 @@
++#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
++#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++
++#include <acpi/acpi.h>
++
++DefinitionBlock(
++	"dsdt.aml",
++	"DSDT",
++	ACPI_DSDT_REV_2,
++	OEM_ID,
++	ACPI_TABLE_CREATOR,
++	0x20141018	/* OEM revision */
++)
++{
++	#include <acpi/dsdt_top.asl>
++	#include "acpi/platform.asl"
++	#include <cpu/intel/common/acpi/cpu.asl>
++	#include <southbridge/intel/common/acpi/platform.asl>
++	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
++	#include <southbridge/intel/common/acpi/sleepstates.asl>
++
++	Device (\_SB.PCI0)
++	{
++		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
++		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
++		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
++	}
++}
+diff --git a/src/mainboard/dell/e5530/early_init.c b/src/mainboard/dell/e5530/early_init.c
+new file mode 100644
+index 0000000000..00fd5f6795
+--- /dev/null
++++ b/src/mainboard/dell/e5530/early_init.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++const struct southbridge_usb_port mainboard_usb_ports[] = {
++	{ 1, 1, 0 },
++	{ 1, 1, 0 },
++	{ 1, 1, 1 },
++	{ 1, 1, 1 },
++	{ 1, 1, 2 },
++	{ 1, 1, 2 },
++	{ 1, 1, 3 },
++	{ 1, 0, 3 },
++	{ 1, 2, 4 },
++	{ 1, 1, 4 },
++	{ 1, 1, 5 },
++	{ 1, 1, 5 },
++	{ 1, 0, 6 },
++	{ 1, 1, 6 },
++};
++
++void bootblock_mainboard_early_init(void)
++{
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++			| COMB_LPC_EN | COMA_LPC_EN);
++	mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/e5530/gma-mainboard.ads b/src/mainboard/dell/e5530/gma-mainboard.ads
+new file mode 100644
+index 0000000000..1310830c8e
+--- /dev/null
++++ b/src/mainboard/dell/e5530/gma-mainboard.ads
+@@ -0,0 +1,20 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (
++      HDMI1, -- mainboard HDMI
++      DP2, -- dock DP
++      DP3, -- dock DP
++      Analog, --mainboard VGA
++      LVDS,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/dell/e5530/gpio.c b/src/mainboard/dell/e5530/gpio.c
+new file mode 100644
+index 0000000000..0599f13921
+--- /dev/null
++++ b/src/mainboard/dell/e5530/gpio.c
+@@ -0,0 +1,194 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_GPIO,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_GPIO,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_GPIO,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_NATIVE,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio1 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio3 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio12 = GPIO_DIR_OUTPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_OUTPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio12 = GPIO_LEVEL_HIGH,
++	.gpio28 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++	.gpio30 = GPIO_RESET_RSMRST,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio8 = GPIO_INVERT,
++	.gpio13 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_GPIO,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_GPIO,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_INPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio45 = GPIO_DIR_INPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_INPUT,
++	.gpio51 = GPIO_DIR_INPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio53 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_GPIO,
++	.gpio71 = GPIO_MODE_GPIO,
++	.gpio72 = GPIO_MODE_NATIVE,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_GPIO,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio68 = GPIO_DIR_INPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio70 = GPIO_DIR_INPUT,
++	.gpio71 = GPIO_DIR_INPUT,
++	.gpio74 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/e5530/hda_verb.c b/src/mainboard/dell/e5530/hda_verb.c
+new file mode 100644
+index 0000000000..4c7c36ee05
+--- /dev/null
++++ b/src/mainboard/dell/e5530/hda_verb.c
+@@ -0,0 +1,33 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d76df,	/* Codec Vendor / Device ID: IDT */
++	0x1028053d,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x1028053d),
++	AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++	AZALIA_PIN_CFG(0, 0x11, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0xd5a301a0),
++
++	0x80862806,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/e5530/mainboard.c b/src/mainboard/dell/e5530/mainboard.c
+new file mode 100644
+index 0000000000..31e49802fc
+--- /dev/null
++++ b/src/mainboard/dell/e5530/mainboard.c
+@@ -0,0 +1,21 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/device.h>
++#include <drivers/intel/gma/int15.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++#include <ec/acpi/ec.h>
++#include <console/console.h>
++#include <pc80/keyboard.h>
++
++static void mainboard_enable(struct device *dev)
++{
++
++	/* FIXME: fix these values. */
++	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
++					GMA_INT15_PANEL_FIT_DEFAULT,
++					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
++}
++
++struct chip_operations mainboard_ops = {
++	.enable_dev = mainboard_enable,
++};
+-- 
+2.43.0
+
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..1bf88b65
--- /dev/null
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,616 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E5530"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/e5530"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xBE7000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_BOARD_DELL_LATITUDE_E5530=y
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd_nogbe"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5530"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..b15a06c7
--- /dev/null
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,613 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E5530"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/e5530"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xBE7000
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_BOARD_DELL_LATITUDE_E5530=y
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd_nogbe"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5530"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
new file mode 100644
index 00000000..03fd230b
--- /dev/null
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -0,0 +1,9 @@
+tree="default"
+xarch="i386-elf"
+payload_grub="n"
+payload_grub_withseabios="n"
+payload_seabios="y"
+payload_memtest="y"
+payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
index 57e434a5..1701589e 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6420=y
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
index c3085fc5..67750ba2 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6420=y
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index f7c48cd9..633f48b8 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6430=y
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index 982e19c9..b48b374f 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6430=y
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
index 41f7e58b..78de7b77 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
index fed3fbce..b6941c95 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index f695d764..1734b26f 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index 1cc2013b..a2cf29bd 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index 62b14ebf..cf9d166b 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -135,6 +135,7 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
diff --git a/config/vendor/sources b/config/vendor/sources
index 7bce5ca7..bd5aedbc 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -149,7 +149,7 @@
 	DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
 }
 
-{e6430 e6530}{
+{e6430 e6530 e5530}{
 	DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
 	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
 	DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe

From abe33ce0ba1839f0bfa2d0cbfedca816c476fb86 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Wed, 7 Feb 2024 00:16:18 +0000
Subject: [PATCH 0215/1549] support making u-boot-only tarballs in releases

./update release -m u-boot

if someone just wants to make u-boot, they can
use this and it tars up all the trees.

Signed-off-by: Leah Rowe <info@minifree.org>
---
 script/update/release | 19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/script/update/release b/script/update/release
index 26592787..b1ab8a29 100755
--- a/script/update/release
+++ b/script/update/release
@@ -25,6 +25,7 @@ main()
 
 	vdir="${vdir}/${version}"
 	relname="${projectname}-${version}"
+	[ "${mode}" = "u-boot" ] && relname="u-boot-for-${relname}"
 	src_dirname="${relname}_src"
 	srcdir="${vdir}/${src_dirname}"
 
@@ -49,7 +50,7 @@ build_release()
 	(
 	cd "${srcdir}" || err "${_xm}: !cd \"${srcdir}\""
 	fetch_trees
-	x_ mv src/docs docs
+	[ "${mode}" = "u-boot" ] || x_ mv src/docs docs
 	) || err "can't create release files"
 
 	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
@@ -57,10 +58,19 @@ build_release()
 	    err "build_release $srcdir: couldn't generate changelog"
 
 	(
-	cd "${srcdir%/*}" || err "${_xm}: mktarball \"${srcdir}\""
-	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || err "$_xm: mksrc"
+	if [ "${mode}" = "u-boot" ]; then
+		cd "${srcdir}/src/" || err "${_xm}: mktarball \"${srcdir}\""
+		mktarball u-boot "../../${srcdir##*/}.tar.xz" || \
+		    err "$_xm: mksrc"
+		# make a src archive containing only u-boot
+	else
+		cd "${srcdir%/*}" || err "${_xm}: mktarball \"${srcdir}\""
+		mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || \
+		    err "$_xm: mksrc"
+	fi
 	) || err "can't create src tarball"
 	[ "${mode}" = "src" ] && return 0
+	[ "${mode}" = "u-boot" ] && return 0
 
 	(
 	cd "${srcdir}" || err "${_xm}: 2 !cd \"${srcdir}\""
@@ -73,9 +83,12 @@ build_release()
 fetch_trees()
 {
 	for x in config/git/*; do
+		[ "${mode}" = "u-boot" ] && break
 		[ ! -f "${x}" ] || ./update trees -f "${x#config/git/}" || \
 		    err "${_xm}: fetch ${x#config/git/}"
 	done
+	[ "${mode}" = "u-boot" ] && x_ ./update trees -f u-boot
+
 	for x in config/*/build.list; do
 		[ -f "${x}" ] || continue
 		xp="${x#*/}"; xp="${xp%/*}"

From 91792c0c330a3dcfc04ba78a279fb2c55ed5092c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 Feb 2024 13:03:46 +0000
Subject: [PATCH 0216/1549] update coreboot configs

this was done automatically by running:

./update trees -u coreboot

this has to be done when adding patches for now board ports,
because of the way lbmk and also coreboot's build systems work.

the configs just have to be re-generated to include a line
that says the entry for the newly added boards isn't set. look
at the diff of this commit as an example.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb | 3 +++
 config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode    | 3 +++
 config/coreboot/dell9020mtvga_12mb/config/normal             | 3 +++
 config/coreboot/e5530_12mb/config/libgfxinit_corebootfb      | 2 ++
 config/coreboot/e5530_12mb/config/libgfxinit_txtmode         | 2 ++
 config/coreboot/e6420_10mb/config/libgfxinit_corebootfb      | 2 ++
 config/coreboot/e6420_10mb/config/libgfxinit_txtmode         | 2 ++
 config/coreboot/e6520_10mb/config/libgfxinit_corebootfb      | 2 ++
 config/coreboot/e6520_10mb/config/libgfxinit_txtmode         | 2 ++
 9 files changed, 21 insertions(+)

diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
index 9eda4205..baf06da8 100644
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
@@ -135,8 +135,11 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
index 8cb7fecf..9fab3c82 100644
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
@@ -133,8 +133,11 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
diff --git a/config/coreboot/dell9020mtvga_12mb/config/normal b/config/coreboot/dell9020mtvga_12mb/config/normal
index cbc76dc5..56246965 100644
--- a/config/coreboot/dell9020mtvga_12mb/config/normal
+++ b/config/coreboot/dell9020mtvga_12mb/config/normal
@@ -132,8 +132,11 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
index 1bf88b65..2020f782 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
@@ -140,6 +140,8 @@ CONFIG_BOARD_DELL_LATITUDE_E5530=y
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 CONFIG_PS2K_EISAID="PNP0303"
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
index b15a06c7..fa6e674f 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
@@ -138,6 +138,8 @@ CONFIG_BOARD_DELL_LATITUDE_E5530=y
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 CONFIG_PS2K_EISAID="PNP0303"
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
index 1701589e..32f725ee 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
@@ -140,6 +140,8 @@ CONFIG_BOARD_DELL_LATITUDE_E6420=y
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 CONFIG_PS2K_EISAID="PNP0303"
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
index 67750ba2..ea1dbf5b 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
@@ -138,6 +138,8 @@ CONFIG_BOARD_DELL_LATITUDE_E6420=y
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 CONFIG_PS2K_EISAID="PNP0303"
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
index 78de7b77..80feff08 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
@@ -140,6 +140,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6520=y
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 CONFIG_PS2K_EISAID="PNP0303"
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
index b6941c95..bcced3ee 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
@@ -138,6 +138,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6520=y
 # CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 CONFIG_PS2K_EISAID="PNP0303"

From 0e3a5759bfe811059d91733b040d1d6e21cbfff4 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Wed, 7 Feb 2024 21:03:52 +0200
Subject: [PATCH 0217/1549] update revision: pico-serprog

should fix https://codeberg.org/libreboot/lbmk/issues/182

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 config/git/pico-serprog | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/git/pico-serprog b/config/git/pico-serprog
index fcf34847..9500e3c3 100644
--- a/config/git/pico-serprog
+++ b/config/git/pico-serprog
@@ -1,5 +1,5 @@
 {pico-serprog}{
-	rev: 377d9f2d528745158dd8af190bc19ed77ffa7778
+	rev: 3d573a01c4b8f69fb0474f95d2627db824d26e46
 	loc: pico-serprog
 	url: https://codeberg.org/libreboot/pico-serprog
 	bkup_url: https://git.disroot.org/libreboot/pico-serprog

From a8435c4fd74c4e8ffb4532433d5b4eeace9ebb3a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 8 Feb 2024 04:44:19 +0000
Subject: [PATCH 0218/1549] remove coreboot/dell9020mtvga_12mb

keep dell9020mt_12mb

dell9020mtvga_12mb doesn't actually work (was tried for
running a graphics card on its own, with no igpu init)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../coreboot/dell9020mtvga_12mb/config/normal | 603 ------------------
 config/coreboot/dell9020mtvga_12mb/target.cfg |   7 -
 2 files changed, 610 deletions(-)
 delete mode 100644 config/coreboot/dell9020mtvga_12mb/config/normal
 delete mode 100644 config/coreboot/dell9020mtvga_12mb/target.cfg

diff --git a/config/coreboot/dell9020mtvga_12mb/config/normal b/config/coreboot/dell9020mtvga_12mb/config/normal
deleted file mode 100644
index 56246965..00000000
--- a/config/coreboot/dell9020mtvga_12mb/config/normal
+++ /dev/null
@@ -1,603 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-CONFIG_VENDOR_DELL=y
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
-CONFIG_VGA_BIOS_ID="8086,0166"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="Dell Inc."
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
-# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
-# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xe8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-# CONFIG_USE_BROADWELL_MRC is not set
-CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-CONFIG_SUPERIO_SMSC_SCH555x=y
-
-#
-# Embedded Controllers
-#
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-# CONFIG_MAINBOARD_USE_LIBGFXINIT is not set
-# CONFIG_VGA_ROM_RUN is not set
-CONFIG_NO_GFX_INIT=y
-CONFIG_NO_EARLY_GFX_INIT=y
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020mtvga_12mb/target.cfg b/config/coreboot/dell9020mtvga_12mb/target.cfg
deleted file mode 100644
index e6d3bec6..00000000
--- a/config/coreboot/dell9020mtvga_12mb/target.cfg
+++ /dev/null
@@ -1,7 +0,0 @@
-tree="default"
-xarch="i386-elf"
-payload_seabios="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
-payload_memtest="y"
-grub_scan_disk="ahci"

From 0693349133af783491e40a6b0a617fdad81bb103 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 8 Feb 2024 04:53:05 +0000
Subject: [PATCH 0219/1549] coreboot/dell9020mt: disable pcie rebar

i enabled it but it's buggy according to comments on gerrit.

disable for now. dgpu didn't work anyway, even with it turned
off, when i had this tested.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb | 3 +--
 config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode    | 3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
index baf06da8..7fc1d59a 100644
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
@@ -166,7 +166,6 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
-CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=29
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -393,7 +392,7 @@ CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
 CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
index 9fab3c82..7b226448 100644
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
@@ -164,7 +164,6 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
-CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=29
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -389,7 +388,7 @@ CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
 CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000

From 381cb119cc6e16ac12279f69c75f60c0cf6e1629 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 7 Feb 2024 10:42:27 -0700
Subject: [PATCH 0220/1549] config/coreboot/default/patches : Renumber E6420,
 E6520, E5530 patches

The OptiPlex 9020/7020 port was merged first and was numbered 31.
Increment the numbering of the Latitude patches to reflect this.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 ...e.patch => 0032-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch} | 0
 ...e.patch => 0033-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch} | 0
 ...dge.patch => 0034-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch} | 0
 3 files changed, 0 insertions(+), 0 deletions(-)
 rename config/coreboot/default/patches/{0031-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch => 0032-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch} (100%)
 rename config/coreboot/default/patches/{0032-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch => 0033-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch} (100%)
 rename config/coreboot/default/patches/{0033-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch => 0034-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch} (100%)

diff --git a/config/coreboot/default/patches/0031-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch b/config/coreboot/default/patches/0032-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
similarity index 100%
rename from config/coreboot/default/patches/0031-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
rename to config/coreboot/default/patches/0032-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
diff --git a/config/coreboot/default/patches/0032-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch b/config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
similarity index 100%
rename from config/coreboot/default/patches/0032-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
rename to config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
diff --git a/config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch b/config/coreboot/default/patches/0034-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
similarity index 100%
rename from config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
rename to config/coreboot/default/patches/0034-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch

From aadfa6bb496ea5746d4459bd037d2a241dfb2d97 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 7 Feb 2024 10:50:35 -0700
Subject: [PATCH 0221/1549] config: Add Dell Latitude E5520

Tested by Minimum_Baseball_629 on Reddit

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 ...-dell-Add-Latitude-E5520-Sandybridge.patch | 775 ++++++++++++++++++
 .../config/libgfxinit_corebootfb              |   1 +
 .../dell9020mt_12mb/config/libgfxinit_txtmode |   1 +
 .../e5520_6mb/config/libgfxinit_corebootfb    | 619 ++++++++++++++
 .../e5520_6mb/config/libgfxinit_txtmode       | 616 ++++++++++++++
 config/coreboot/e5520_6mb/target.cfg          |  11 +
 .../e5530_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e5530_12mb/config/libgfxinit_txtmode      |   1 +
 .../e6420_10mb/config/libgfxinit_corebootfb   |   1 +
 .../e6420_10mb/config/libgfxinit_txtmode      |   1 +
 .../e6430_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e6430_12mb/config/libgfxinit_txtmode      |   1 +
 .../e6520_10mb/config/libgfxinit_corebootfb   |   1 +
 .../e6520_10mb/config/libgfxinit_txtmode      |   1 +
 .../e6530_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e6530_12mb/config/libgfxinit_txtmode      |   1 +
 .../t1650_12mb/config/libgfxinit_txtmode      |   1 +
 config/ifd/dell_sandybridge/6_ifd_nogbe       | Bin 0 -> 4096 bytes
 config/vendor/sources                         |   2 +-
 19 files changed, 2035 insertions(+), 1 deletion(-)
 create mode 100644 config/coreboot/default/patches/0035-mb-dell-Add-Latitude-E5520-Sandybridge.patch
 create mode 100644 config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/e5520_6mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/e5520_6mb/target.cfg
 create mode 100644 config/ifd/dell_sandybridge/6_ifd_nogbe

diff --git a/config/coreboot/default/patches/0035-mb-dell-Add-Latitude-E5520-Sandybridge.patch b/config/coreboot/default/patches/0035-mb-dell-Add-Latitude-E5520-Sandybridge.patch
new file mode 100644
index 00000000..1ca4b950
--- /dev/null
+++ b/config/coreboot/default/patches/0035-mb-dell-Add-Latitude-E5520-Sandybridge.patch
@@ -0,0 +1,775 @@
+From 7c7ce2087e1ff5f0eedb65793254163d01be3056 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Wed, 7 Feb 2024 10:23:38 -0700
+Subject: [PATCH] mb/dell: Add Latitude E5520 (Sandybridge)
+
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e5520/Kconfig           |  37 ++++
+ src/mainboard/dell/e5520/Kconfig.name      |   2 +
+ src/mainboard/dell/e5520/Makefile.inc      |   5 +
+ src/mainboard/dell/e5520/acpi/ec.asl       |   9 +
+ src/mainboard/dell/e5520/acpi/platform.asl |  12 ++
+ src/mainboard/dell/e5520/acpi/superio.asl  |   3 +
+ src/mainboard/dell/e5520/acpi_tables.c     |  16 ++
+ src/mainboard/dell/e5520/board_info.txt    |   6 +
+ src/mainboard/dell/e5520/cmos.default      |   9 +
+ src/mainboard/dell/e5520/cmos.layout       |  88 ++++++++++
+ src/mainboard/dell/e5520/data.vbt          | Bin 0 -> 6144 bytes
+ src/mainboard/dell/e5520/devicetree.cb     |  66 +++++++
+ src/mainboard/dell/e5520/dsdt.asl          |  30 ++++
+ src/mainboard/dell/e5520/early_init.c      |  32 ++++
+ src/mainboard/dell/e5520/gma-mainboard.ads |  20 +++
+ src/mainboard/dell/e5520/gpio.c            | 195 +++++++++++++++++++++
+ src/mainboard/dell/e5520/hda_verb.c        |  33 ++++
+ src/mainboard/dell/e5520/mainboard.c       |  21 +++
+ 18 files changed, 584 insertions(+)
+ create mode 100644 src/mainboard/dell/e5520/Kconfig
+ create mode 100644 src/mainboard/dell/e5520/Kconfig.name
+ create mode 100644 src/mainboard/dell/e5520/Makefile.inc
+ create mode 100644 src/mainboard/dell/e5520/acpi/ec.asl
+ create mode 100644 src/mainboard/dell/e5520/acpi/platform.asl
+ create mode 100644 src/mainboard/dell/e5520/acpi/superio.asl
+ create mode 100644 src/mainboard/dell/e5520/acpi_tables.c
+ create mode 100644 src/mainboard/dell/e5520/board_info.txt
+ create mode 100644 src/mainboard/dell/e5520/cmos.default
+ create mode 100644 src/mainboard/dell/e5520/cmos.layout
+ create mode 100644 src/mainboard/dell/e5520/data.vbt
+ create mode 100644 src/mainboard/dell/e5520/devicetree.cb
+ create mode 100644 src/mainboard/dell/e5520/dsdt.asl
+ create mode 100644 src/mainboard/dell/e5520/early_init.c
+ create mode 100644 src/mainboard/dell/e5520/gma-mainboard.ads
+ create mode 100644 src/mainboard/dell/e5520/gpio.c
+ create mode 100644 src/mainboard/dell/e5520/hda_verb.c
+ create mode 100644 src/mainboard/dell/e5520/mainboard.c
+
+diff --git a/src/mainboard/dell/e5520/Kconfig b/src/mainboard/dell/e5520/Kconfig
+new file mode 100644
+index 0000000000..213c54cf5c
+--- /dev/null
++++ b/src/mainboard/dell/e5520/Kconfig
+@@ -0,0 +1,37 @@
++if BOARD_DELL_LATITUDE_E5520
++
++config BOARD_SPECIFIC_OPTIONS
++	def_bool y
++	select BOARD_ROMSIZE_KB_6144
++	select EC_ACPI
++	select EC_DELL_MEC5035
++	select GFX_GMA_PANEL_1_ON_LVDS
++	select HAVE_ACPI_RESUME
++	select HAVE_ACPI_TABLES
++	select HAVE_CMOS_DEFAULT
++	select HAVE_OPTION_TABLE
++	select INTEL_GMA_HAVE_VBT
++	select INTEL_INT15
++	select MAINBOARD_HAS_LIBGFXINIT
++	select NORTHBRIDGE_INTEL_SANDYBRIDGE
++	select SERIRQ_CONTINUOUS_MODE
++	select SOUTHBRIDGE_INTEL_BD82X6X
++	select SYSTEM_TYPE_LAPTOP
++	select USE_NATIVE_RAMINIT
++
++config DRAM_RESET_GATE_GPIO
++	default 60
++
++config MAINBOARD_DIR
++	default "dell/e5520"
++
++config MAINBOARD_PART_NUMBER
++	default "Latitude E5520"
++
++config USBDEBUG_HCD_INDEX
++	default 2
++
++config VGA_BIOS_ID
++	default "8086,0126"
++
++endif # BOARD_DELL_LATITUDE_E5520
+diff --git a/src/mainboard/dell/e5520/Kconfig.name b/src/mainboard/dell/e5520/Kconfig.name
+new file mode 100644
+index 0000000000..c88913e8b3
+--- /dev/null
++++ b/src/mainboard/dell/e5520/Kconfig.name
+@@ -0,0 +1,2 @@
++config BOARD_DELL_LATITUDE_E5520
++	bool "Latitude E5520"
+diff --git a/src/mainboard/dell/e5520/Makefile.inc b/src/mainboard/dell/e5520/Makefile.inc
+new file mode 100644
+index 0000000000..18391d8b18
+--- /dev/null
++++ b/src/mainboard/dell/e5520/Makefile.inc
+@@ -0,0 +1,5 @@
++bootblock-y += early_init.c
++bootblock-y += gpio.c
++romstage-y += early_init.c
++romstage-y += gpio.c
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/dell/e5520/acpi/ec.asl b/src/mainboard/dell/e5520/acpi/ec.asl
+new file mode 100644
+index 0000000000..0d429410a9
+--- /dev/null
++++ b/src/mainboard/dell/e5520/acpi/ec.asl
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++Device(EC)
++{
++	Name (_HID, EISAID("PNP0C09"))
++	Name (_UID, 0)
++	Name (_GPE, 16)
++/* FIXME: EC support */
++}
+diff --git a/src/mainboard/dell/e5520/acpi/platform.asl b/src/mainboard/dell/e5520/acpi/platform.asl
+new file mode 100644
+index 0000000000..2d24bbd9b9
+--- /dev/null
++++ b/src/mainboard/dell/e5520/acpi/platform.asl
+@@ -0,0 +1,12 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++Method(_WAK, 1)
++{
++	/* FIXME: EC support  */
++	Return(Package() {0, 0})
++}
++
++Method(_PTS,1)
++{
++	/* FIXME: EC support  */
++}
+diff --git a/src/mainboard/dell/e5520/acpi/superio.asl b/src/mainboard/dell/e5520/acpi/superio.asl
+new file mode 100644
+index 0000000000..55b1db5b11
+--- /dev/null
++++ b/src/mainboard/dell/e5520/acpi/superio.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <drivers/pc80/pc/ps2_controller.asl>
+diff --git a/src/mainboard/dell/e5520/acpi_tables.c b/src/mainboard/dell/e5520/acpi_tables.c
+new file mode 100644
+index 0000000000..e2759659bf
+--- /dev/null
++++ b/src/mainboard/dell/e5520/acpi_tables.c
+@@ -0,0 +1,16 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi_gnvs.h>
++#include <soc/nvs.h>
++
++/* FIXME: check this function.  */
++void mainboard_fill_gnvs(struct global_nvs *gnvs)
++{
++	/* The lid is open by default. */
++	gnvs->lids = 1;
++
++	/* Temperature at which OS will shutdown */
++	gnvs->tcrt = 100;
++	/* Temperature at which OS will throttle CPU */
++	gnvs->tpsv = 90;
++}
+diff --git a/src/mainboard/dell/e5520/board_info.txt b/src/mainboard/dell/e5520/board_info.txt
+new file mode 100644
+index 0000000000..34d5ad9e0b
+--- /dev/null
++++ b/src/mainboard/dell/e5520/board_info.txt
+@@ -0,0 +1,6 @@
++Category: laptop
++ROM package: SOIC-8
++ROM protocol: SPI
++ROM socketed: n
++Flashrom support: y
++Release year: 2011
+diff --git a/src/mainboard/dell/e5520/cmos.default b/src/mainboard/dell/e5520/cmos.default
+new file mode 100644
+index 0000000000..279415dfd1
+--- /dev/null
++++ b/src/mainboard/dell/e5520/cmos.default
+@@ -0,0 +1,9 @@
++boot_option=Fallback
++debug_level=Debug
++power_on_after_fail=Disable
++nmi=Enable
++bluetooth=Enable
++wwan=Enable
++wlan=Enable
++sata_mode=AHCI
++me_state=Disabled
+diff --git a/src/mainboard/dell/e5520/cmos.layout b/src/mainboard/dell/e5520/cmos.layout
+new file mode 100644
+index 0000000000..1aa7e77bce
+--- /dev/null
++++ b/src/mainboard/dell/e5520/cmos.layout
+@@ -0,0 +1,88 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++# -----------------------------------------------------------------
++entries
++
++# -----------------------------------------------------------------
++0	120	r	0	reserved_memory
++
++# -----------------------------------------------------------------
++# RTC_BOOT_BYTE (coreboot hardcoded)
++384	1	e	4	boot_option
++388	4	h	0	reboot_counter
++
++# -----------------------------------------------------------------
++# coreboot config options: console
++395	4	e	6	debug_level
++
++#400	8	r	0	reserved for century byte
++
++# coreboot config options: southbridge
++408	1	e	1	nmi
++409	2	e	7	power_on_after_fail
++411     1       e       9       sata_mode
++
++# coreboot config options: EC
++412	1	e	1	bluetooth
++413	1	e	1	wwan
++414	1	e	1	wlan
++
++# coreboot config options: ME
++424	1	e	14	me_state
++425	2	h	0	me_state_prev
++
++# coreboot config options: northbridge
++432	3	e	11	gfx_uma_size
++435	2	e	12	hybrid_graphics_mode
++440	8	h	0	volume
++
++# VBOOT
++448	128	r	0	vbnv
++
++# SandyBridge MRC Scrambler Seed values
++896	32	r	0	mrc_scrambler_seed
++928	32	r	0	mrc_scrambler_seed_s3
++960	16	r	0	mrc_scrambler_seed_chk
++
++# coreboot config options: check sums
++984	16	h	0	check_sum
++
++# -----------------------------------------------------------------
++
++enumerations
++
++#ID	value	text
++1	0	Disable
++1	1	Enable
++2	0	Enable
++2	1	Disable
++4	0	Fallback
++4	1	Normal
++6	0	Emergency
++6	1	Alert
++6	2	Critical
++6	3	Error
++6	4	Warning
++6	5	Notice
++6	6	Info
++6	7	Debug
++6	8	Spew
++7	0	Disable
++7	1	Enable
++7	2	Keep
++9	0	AHCI
++9	1	Compatible
++11	0	32M
++11	1	64M
++11	2	96M
++11	3	128M
++11	4	160M
++11	5	192M
++11	6	224M
++14	0	Normal
++14	1	Disabled
++
++# -----------------------------------------------------------------
++checksums
++
++checksum 392 447 984
+diff --git a/src/mainboard/dell/e5520/data.vbt b/src/mainboard/dell/e5520/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..b511e75262e37fa123d674e9a7b21a8dfe427729
+GIT binary patch
+literal 6144
+zcmeHKZ){Ul6hE);wSBvNZ|mL$bmQOM2BTvXUI!}^N9ejTij1vnu+)Wx6<c9(Y_%K6
+zzOV-@f<ehpWB5RHBpMBgG7}RuMuM2=l*E{6G$wq&gqTQ3#E2RZsOP@dvW*rP7>Fjj
+z&F`Lj?>YC}bI(2Z+}C+6zKyiGrosQXuW7A+&1%<rN+Y1ck(}dLrx)Ma#^x>lnvFGE
+zeD#gB>*#Tq4&j^|7Xcz1r^pp*)g#T}u1Me3ct>Pgls5Qi3!6e2W0%`a-Ic|3efWuR
+zXJ@#}wJyGMTXTcY<%@TBKh@(3hP$Gjv}E}rx-%9D_eLXhYe!c&-VyDg-Cdo1>Biji
+zNNsnlFW#|jdoOj?mZ43m>cVO%UE9@*E7x|%V~c4`XD4l9GCi~@+7pfMibfX8L?!^I
+zc~Rg1I5SxH1DAEZ0{jA41jrJBh#-l;b6^%g7QrThRe)&%tQH_!ggOD7A_PRRgGuI0
+z0zi=n#rCB66d-sO$M~^6wgeb$2fH1|0R`v}xUiWCU`4SF;Dyh&j|mK&6WJWJ&Pq9I
+zVgmFQfh+)vE}(KWwHA|Oh3fSkss|;2E(2i}s1?gRRV%8!K7U={vHD=s#+Fd)W^M1j
+z{R4$??VSvEWpgT=vCM&1-U$bI6CB~IV3Z$$Vv7o!EDnev4j~R(MHsazZ~^fLLKGF4
+zEfQFOa3dZ?1Q1P#&4?!vyAk^k&m&$z3?WV+-b0*1j37o4=MX<3E+eiYge(Ht2umAW
+zOPDmU>UL{flI9u|@JtVvfp#o8ek?VfVV9YP5(%pnZX~{PKq4WoWGmV8t$=Ri@{zLQ
+zNYYt4<$0Ry&qIoG;7s-t333)Nu8opN{NG!)&!I@eO(cVx8vBVEBvotJ7%yNl$7iQ_
+zI=xk30+V$ff`F6<wRoF(TK%j9nsr#H23umU%)_7jNOl%*FPU567qbg;4gtp711nj2
+z#+kHw`v4|5cA+`UMIvAl;slnH1nl0v=xH<al>1}ljxDE1dcda^&!do|r^eJkI?aC-
+zEQMSfm?<w*Unzumkj_w5>VYL6W4=aCiy4rk%xq~5LV?bi|GL2$G7li<%c7yd;6T34
+zQBN5huZ3~6`ChGkpb$Bg5ITb#2iK-qs|1`=sl6Dhn(Lj&8Agt?S{sTDmmtRj7Jm_1
+zFnt{w&FdFkWS3bl>OeL?eO+*i{)9G!cSI-InGt|U0eEYmRCOHm7|I;#LO8ksRIeJ#
+zGe+jTwPg4C4TYuN(9zULV3k+hI$YuPo=%N8oZ#u_4S!3Xelt6N0BmuC`hCNeg+&97
+z6*!>)uHvr%2004GZv?!_-y&|TRmil=9D%Q`1aXBsnD^gov3*UZI34&1_vn(B=T4kZ
+z_A>ClXVIBNaS^hd&^DrU6VgZMYeadMkdFxcktn|ra-Gl;n^I{bt86rCQ=YMry*B!$
+zP5ID9KDE)GZOY#^VwPyRq^y+48j0?ZlzxdkC()CV@`*&wO7vGr;qjA3rb}gIwM-gi
+zx>HsT$mEDj-<OpyWb%zn|B@A3Hkp<!FT5;hrt_SZiy?*wDaIu{h>%Ir=@rh7)SR;b
+zAEWQGv_X1)wq0y5Ha0c~&psIsln<Hiu3;#Lf;%*eI<@?p8cfMJV(IYi8q$NA#iS8`
+z_~|4t4b^wtMSAeFST^F8-Tm<zu8D&j^8=&I4;I}Im>aeSK~X8*^Z9SE44_`P#KIUL
+zf6^N2f>5HCPWM3N+f0MyWOV^kz~!-wVc4MRXOY>4Jsxd1RyBKEMzNf{RKhesKFdbq
+zJ(*d<l2Y#n?E?~iBA39P?~Pr2d#}5=#Sfl-VGzGUF$4U2KcqCIVlwkC(&7PQk_X!a
+z8}3Jgq-&U*Co|h1>l)ZQGyW_x->i#;FvQ*=Nv&nG0N5@D@jjv_Q}K}6MP?1A6`JGe
+zDwj9pN+x;T4>`I9e5x(uqdK#OGB31ikk@Xv=dxLb4fx(;ktX@rOb~M~?dYQQYiPia
+z8r;jUQ?sd2@3||-cb2Eb%JFYfxHsONoaJ^eqoKN{<g9?-%`7oWz+aJS0tEc!^d@hD
+z1-I{%hr!Y?0uVZpUbl__37xn@jkD6Z>3SATgBQlEoN7&ZV9Eni9+>jLln16fFy(=V
+H=7E0zE^L4Z
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/e5520/devicetree.cb b/src/mainboard/dell/e5520/devicetree.cb
+new file mode 100644
+index 0000000000..bef96ac14c
+--- /dev/null
++++ b/src/mainboard/dell/e5520/devicetree.cb
+@@ -0,0 +1,66 @@
++chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
++	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
++	register "gpu_cpu_backlight" = "0x00000218"
++	register "gpu_dp_b_hotplug" = "4"
++	register "gpu_dp_c_hotplug" = "4"
++	register "gpu_dp_d_hotplug" = "4"
++	register "gpu_panel_port_select" = "0"
++	register "gpu_panel_power_backlight_off_delay" = "2300"
++	register "gpu_panel_power_backlight_on_delay" = "2300"
++	register "gpu_panel_power_cycle_delay" = "6"
++	register "gpu_panel_power_down_delay" = "400"
++	register "gpu_panel_power_up_delay" = "400"
++	register "gpu_pch_backlight" = "0x13121312"
++
++	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
++
++	device domain 0x0 on
++		subsystemid 0x1028 0x049a inherit
++
++		device ref host_bridge on end # Host bridge
++		device ref peg10 on end # PEG
++		device ref igd on end # iGPU
++
++		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
++			register "docking_supported" = "1"
++			register "gen1_dec" = "0x007c0681"
++			register "gen2_dec" = "0x007c0901"
++			register "gen3_dec" = "0x003c07e1"
++			register "gen4_dec" = "0x001c0901"
++			register "gpi0_routing" = "2"
++			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 1, 0 }"
++			register "pcie_port_coalesce" = "1"
++			register "sata_interface_speed_support" = "0x3"
++			register "sata_port_map" = "0x3b"
++			register "spi_lvscc" = "0x2005"
++			register "spi_uvscc" = "0x2005"
++
++			device ref mei1		off end
++			device ref mei2		off end
++			device ref me_ide_r	off end
++			device ref me_kt	off end
++			device ref gbe		off end
++			device ref ehci2	on end
++			device ref hda		on end
++			device ref pcie_rp1	on end
++			device ref pcie_rp2	on end
++			device ref pcie_rp3	on end
++			device ref pcie_rp4	off end
++			device ref pcie_rp5	on end
++			device ref pcie_rp6	on end
++			device ref pcie_rp7	on end
++			device ref pcie_rp8	off end
++			device ref ehci1	on end
++			device ref pci_bridge	off end
++			device ref lpc		on
++				chip ec/dell/mec5035
++					device pnp ff.0 on end
++				end
++			end
++			device ref sata1 on end
++			device ref smbus on end
++			device ref sata2 off end
++			device ref thermal off end
++		end
++	end
++end
+diff --git a/src/mainboard/dell/e5520/dsdt.asl b/src/mainboard/dell/e5520/dsdt.asl
+new file mode 100644
+index 0000000000..7d13c55b08
+--- /dev/null
++++ b/src/mainboard/dell/e5520/dsdt.asl
+@@ -0,0 +1,30 @@
++#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
++#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++
++#include <acpi/acpi.h>
++
++DefinitionBlock(
++	"dsdt.aml",
++	"DSDT",
++	ACPI_DSDT_REV_2,
++	OEM_ID,
++	ACPI_TABLE_CREATOR,
++	0x20141018	/* OEM revision */
++)
++{
++	#include <acpi/dsdt_top.asl>
++	#include "acpi/platform.asl"
++	#include <cpu/intel/common/acpi/cpu.asl>
++	#include <southbridge/intel/common/acpi/platform.asl>
++	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
++	#include <southbridge/intel/common/acpi/sleepstates.asl>
++
++	Device (\_SB.PCI0)
++	{
++		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
++		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
++		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
++	}
++}
+diff --git a/src/mainboard/dell/e5520/early_init.c b/src/mainboard/dell/e5520/early_init.c
+new file mode 100644
+index 0000000000..7297921546
+--- /dev/null
++++ b/src/mainboard/dell/e5520/early_init.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++const struct southbridge_usb_port mainboard_usb_ports[] = {
++	{ 1, 1, 0 },
++	{ 1, 1, 0 },
++	{ 1, 1, 1 },
++	{ 1, 1, 1 },
++	{ 1, 1, 2 },
++	{ 1, 1, 2 },
++	{ 1, 1, 3 },
++	{ 1, 1, 3 },
++	{ 1, 1, 5 },
++	{ 1, 1, 5 },
++	{ 1, 1, 7 },
++	{ 1, 1, 6 },
++	{ 1, 1, 6 },
++	{ 1, 1, 7 },
++};
++
++void bootblock_mainboard_early_init(void)
++{
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++			| COMB_LPC_EN | COMA_LPC_EN);
++	mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/e5520/gma-mainboard.ads b/src/mainboard/dell/e5520/gma-mainboard.ads
+new file mode 100644
+index 0000000000..2a16f44360
+--- /dev/null
++++ b/src/mainboard/dell/e5520/gma-mainboard.ads
+@@ -0,0 +1,20 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (
++      HDMI1, -- mainboard HDMI
++      DP2, -- dock DP
++      DP3, -- dock DP
++      Analog, -- mainboard VGA
++      LVDS,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/dell/e5520/gpio.c b/src/mainboard/dell/e5520/gpio.c
+new file mode 100644
+index 0000000000..f76b93d9f0
+--- /dev/null
++++ b/src/mainboard/dell/e5520/gpio.c
+@@ -0,0 +1,195 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_NATIVE,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_GPIO,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_GPIO,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_NATIVE,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_GPIO,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio3 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio12 = GPIO_DIR_OUTPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_INPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++	.gpio30 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio12 = GPIO_LEVEL_HIGH,
++	.gpio30 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio8 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_NATIVE,
++	.gpio46 = GPIO_MODE_GPIO,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_NATIVE,
++	.gpio50 = GPIO_MODE_GPIO,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_GPIO,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_GPIO,
++	.gpio56 = GPIO_MODE_GPIO,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_OUTPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_OUTPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio46 = GPIO_DIR_OUTPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio50 = GPIO_DIR_OUTPUT,
++	.gpio51 = GPIO_DIR_OUTPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio53 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio55 = GPIO_DIR_OUTPUT,
++	.gpio56 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio34 = GPIO_LEVEL_LOW,
++	.gpio37 = GPIO_LEVEL_LOW,
++	.gpio46 = GPIO_LEVEL_HIGH,
++	.gpio50 = GPIO_LEVEL_HIGH,
++	.gpio51 = GPIO_LEVEL_LOW,
++	.gpio55 = GPIO_LEVEL_LOW,
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_NATIVE,
++	.gpio69 = GPIO_MODE_NATIVE,
++	.gpio70 = GPIO_MODE_NATIVE,
++	.gpio71 = GPIO_MODE_NATIVE,
++	.gpio72 = GPIO_MODE_NATIVE,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_GPIO,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio74 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/e5520/hda_verb.c b/src/mainboard/dell/e5520/hda_verb.c
+new file mode 100644
+index 0000000000..e2efee3646
+--- /dev/null
++++ b/src/mainboard/dell/e5520/hda_verb.c
+@@ -0,0 +1,33 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
++	0x1028049a,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x1028049a),
++	AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++	AZALIA_PIN_CFG(0, 0x11, 0xd5a301a0),
++	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++	0x80862805,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/e5520/mainboard.c b/src/mainboard/dell/e5520/mainboard.c
+new file mode 100644
+index 0000000000..31e49802fc
+--- /dev/null
++++ b/src/mainboard/dell/e5520/mainboard.c
+@@ -0,0 +1,21 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/device.h>
++#include <drivers/intel/gma/int15.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++#include <ec/acpi/ec.h>
++#include <console/console.h>
++#include <pc80/keyboard.h>
++
++static void mainboard_enable(struct device *dev)
++{
++
++	/* FIXME: fix these values. */
++	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
++					GMA_INT15_PANEL_FIT_DEFAULT,
++					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
++}
++
++struct chip_operations mainboard_ops = {
++	.enable_dev = mainboard_enable,
++};
+-- 
+2.43.0
+
diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
index 7fc1d59a..3cbdbdd9 100644
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
@@ -135,6 +135,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
index 7b226448..e8b3d64f 100644
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
@@ -133,6 +133,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..5276c108
--- /dev/null
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
@@ -0,0 +1,619 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E5520"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/e5520"
+CONFIG_VGA_BIOS_ID="8086,0126"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x5ea000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_BOARD_DELL_LATITUDE_E5520=y
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5520"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=6144
+CONFIG_ROM_SIZE=0x00600000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..29148416
--- /dev/null
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
@@ -0,0 +1,616 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E5520"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/e5520"
+CONFIG_VGA_BIOS_ID="8086,0126"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x5ea000
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_BOARD_DELL_LATITUDE_E5520=y
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5520"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=6144
+CONFIG_ROM_SIZE=0x00600000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
new file mode 100644
index 00000000..1cf0792e
--- /dev/null
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -0,0 +1,11 @@
+tree="default"
+romtype="normal"
+arch="x86_64"
+payload_grub="n"
+payload_grub_withseabios="n"
+payload_seabios="y"
+payload_memtest="y"
+payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
+grub_scan_disk="ahci"
+microcode_required="n"
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
index 2020f782..a93401db 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 CONFIG_BOARD_DELL_LATITUDE_E5530=y
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
index fa6e674f..e42a9972 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 CONFIG_BOARD_DELL_LATITUDE_E5530=y
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
index 32f725ee..d3cc4360 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6420=y
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
index ea1dbf5b..5766398d 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_LATITUDE_E6420=y
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index b44ba752..b7a11ae9 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index d43a36ea..694f1eab 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
index 80feff08..28214b76 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
index bcced3ee..31c9df68 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index b3bda195..6344db92 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index 294afc15..59f22da1 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index 205a12a5..b88ef084 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -135,6 +135,7 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
diff --git a/config/ifd/dell_sandybridge/6_ifd_nogbe b/config/ifd/dell_sandybridge/6_ifd_nogbe
new file mode 100644
index 0000000000000000000000000000000000000000..c0cff8bae0488b931653e2b91a42f912c2749f56
GIT binary patch
literal 4096
zcmeH~F$%&k6o&uQR;mt)P!%ckIk-6G1X2;y8wlQ_HxMr&9>7a<EDoN)Rd1j-sEsc}
z+?+(=1(KJ1JYMp?EoJ#WHpfT1rhKpNb-JWR7z1!KhR}@)0UmR+?V$`5B9uwR%yb6O
zY68ALP+{ocpV{s%6t<P=Vr>@ScIN1;+W`868TP=z!I;kZRH=CD`DdE@;31}i57Hz>
z42S_SAO^&M7!U(uKn#e1KQwUH5dsS6u6s82Ii{AUmZ!`qV@?@!%9t0#yddTUF;5mA
lB8n(kRzE@$S9rzP-W%I{V{Pl_wtjBw=ghyM_BxTj&lBS6;Ftga

literal 0
HcmV?d00001

diff --git a/config/vendor/sources b/config/vendor/sources
index f4ec2842..ffdd2810 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -143,7 +143,7 @@
 	E6400_VGA_romname mod_21.bin
 }
 
-{e6420 e6520}{
+{e5520 e6420 e6520}{
 	DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
 	DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
 	DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe

From 4a9fca57f377349ee03cdf51afcc90ab2910a698 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sun, 11 Feb 2024 19:13:36 +0200
Subject: [PATCH 0222/1549] Patch SeaBIOS: Add MXM support

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 ...1-romfile-implement-a-generic-loader.patch |  86 ++++++++
 ...ionroms-implement-mxm-3.0-interrupts.patch | 188 ++++++++++++++++++
 2 files changed, 274 insertions(+)
 create mode 100644 config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
 create mode 100644 config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch

diff --git a/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch b/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
new file mode 100644
index 00000000..f0682c11
--- /dev/null
+++ b/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
@@ -0,0 +1,86 @@
+From 2aff8adc1dcd1315877fdb4ac4ef5e649c5b7d11 Mon Sep 17 00:00:00 2001
+From: Riku Viitanen <riku.viitanen@protonmail.com>
+Date: Sat, 10 Feb 2024 21:23:33 +0200
+Subject: [PATCH 1/2] romfile: implement a generic loader
+
+romfile_loadfile_g:
+Based on romfile_loadfile but more flexible. User has to supply pointer
+to a malloc function and the number of trailing padding bytes. Thus, any
+memory region may be used.
+
+romfile_loadfile:
+It is now a wrapper around romfile_loadfile_g. Functionality is the same.
+
+Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
+---
+ src/romfile.c | 25 ++++++++++++++++++++-----
+ src/romfile.h |  2 ++
+ 2 files changed, 22 insertions(+), 5 deletions(-)
+
+diff --git a/src/romfile.c b/src/romfile.c
+index b598274e..8bf95713 100644
+--- a/src/romfile.c
++++ b/src/romfile.c
+@@ -47,10 +47,12 @@ romfile_find(const char *name)
+     return __romfile_findprefix(name, strlen(name) + 1, NULL);
+ }
+ 
+-// Helper function to find, malloc_tmphigh, and copy a romfile.  This
+-// function adds a trailing zero to the malloc'd copy.
++// Generic function to find romfile, malloc (using provided function
++// pointer), and copy a romfile. add_len specifies how many additional
++// trailing bytes to reserve. The extra bytes will not be initialised.
+ void *
+-romfile_loadfile(const char *name, int *psize)
++romfile_loadfile_g(const char *name, int *psize,
++                   void *(*malloc_fn)(), int add_len)
+ {
+     struct romfile_s *file = romfile_find(name);
+     if (!file)
+@@ -60,7 +62,7 @@ romfile_loadfile(const char *name, int *psize)
+     if (!filesize)
+         return NULL;
+ 
+-    char *data = malloc_tmphigh(filesize+1);
++    char *data = malloc_fn(filesize+add_len);
+     if (!data) {
+         warn_noalloc();
+         return NULL;
+@@ -74,7 +76,20 @@ romfile_loadfile(const char *name, int *psize)
+     }
+     if (psize)
+         *psize = filesize;
+-    data[filesize] = '\0';
++
++    return data;
++}
++
++// Helper function to find, malloc_tmphigh, and copy a romfile.  This
++// function adds a trailing zero to the malloc'd copy.
++void *
++romfile_loadfile(const char *name, int *psize)
++{
++    char *data = romfile_loadfile_g(name, psize, &malloc_tmphigh, 1);
++    if (!data)
++        return NULL;
++
++    data[*psize] = '\0';
+     return data;
+ }
+ 
+diff --git a/src/romfile.h b/src/romfile.h
+index 3e0f8200..a320a5bc 100644
+--- a/src/romfile.h
++++ b/src/romfile.h
+@@ -13,6 +13,8 @@ struct romfile_s {
+ void romfile_add(struct romfile_s *file);
+ struct romfile_s *romfile_findprefix(const char *prefix, struct romfile_s *prev);
+ struct romfile_s *romfile_find(const char *name);
++void *romfile_loadfile_g(const char *name, int *psize,
++                         void *(*malloc_fn)(), int add_len);
+ void *romfile_loadfile(const char *name, int *psize);
+ u64 romfile_loadint(const char *name, u64 defval);
+ 
+-- 
+2.43.0
+
diff --git a/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch b/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch
new file mode 100644
index 00000000..f05a34c2
--- /dev/null
+++ b/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch
@@ -0,0 +1,188 @@
+From 1e7c443d069ef817c4e699bd6675efff4ebddb86 Mon Sep 17 00:00:00 2001
+From: Riku Viitanen <riku.viitanen@protonmail.com>
+Date: Sat, 10 Feb 2024 21:38:17 +0200
+Subject: [PATCH 2/2] vgahooks, optionroms: implement mxm 3.0 interrupts
+
+VGAROMs on MXM graphics cards need certain int15h functions present.
+
+Tested on a HP EliteBook 8560w with coreboot and Quadro 2000M. A warning
+is displayed for 30 seconds and performance is nerfed:
+
+	ERROR: Valid MXM Structure not found.
+	POST halted for 30 seconds, P-state limited to P10...
+
+This patch implements the minimum required on this system (and implemented
+by the OEM BIOS): functions 0 and 1.
+
+These functions are specific to the MXM 3.0 Software Specification,
+earlier versions are not implemented due to lack of hardware. Documentation
+for versions 2.1 and 3.0 can be found freely online.
+
+Functions aren't specific to mainboards or GPUs (though some mainboards
+could need more functions implemented). The structure is
+mainboard-specific and is read from romfile "mxm-30-sis".
+
+It can be extracted from vendor BIOS by running those same interrupts.
+I wrote a tool to do it on Linux: https://codeberg.org/Riku_V/mxmdump/
+
+Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
+---
+ src/optionroms.c |  9 +++++++
+ src/vgahooks.c   | 69 ++++++++++++++++++++++++++++++++++++++++++++++++
+ src/vgahooks.h   |  9 +++++++
+ 3 files changed, 87 insertions(+)
+ create mode 100644 src/vgahooks.h
+
+diff --git a/src/optionroms.c b/src/optionroms.c
+index e906ab97..fcce7900 100644
+--- a/src/optionroms.c
++++ b/src/optionroms.c
+@@ -22,6 +22,7 @@
+ #include "string.h" // memset
+ #include "util.h" // get_pnp_offset
+ #include "tcgbios.h" // tpm_*
++#include "vgahooks.h" // MXM30SIS
+ 
+ static int EnforceChecksum, S3ResumeVga, RunPCIroms;
+ 
+@@ -463,6 +464,14 @@ vgarom_setup(void)
+     RunPCIroms = romfile_loadint("etc/pci-optionrom-exec", 2);
+     ScreenAndDebug = romfile_loadint("etc/screen-and-debug", 1);
+ 
++    // Load MXM 3.0 System Information Structure
++    void *mxm_sis = romfile_loadfile_g("mxm-30-sis", NULL, &malloc_low, 0);
++    if (mxm_sis) {
++        MXM30SIS = (u32)mxm_sis;
++    } else {
++        MXM30SIS = 0;
++    }
++
+     // Clear option rom memory
+     memset((void*)BUILD_ROM_START, 0, rom_get_max() - BUILD_ROM_START);
+ 
+diff --git a/src/vgahooks.c b/src/vgahooks.c
+index 1f149532..a94840b2 100644
+--- a/src/vgahooks.c
++++ b/src/vgahooks.c
+@@ -18,8 +18,10 @@
+ #define VH_VIA 1
+ #define VH_INTEL 2
+ #define VH_SMI 3
++#define VH_MXM 4
+ 
+ int VGAHookHandlerType VARFSEG;
++u32 MXM30SIS VARFSEG;
+ 
+ static void
+ handle_155fXX(struct bregs *regs)
+@@ -59,6 +61,7 @@ via_155f02(struct bregs *regs)
+     dprintf(1, "Warning: VGA TV/CRT output type is hardcoded\n");
+ }
+ 
++
+ static void
+ via_155f18(struct bregs *regs)
+ {
+@@ -296,6 +299,69 @@ winent_mb6047_setup(struct pci_device *pci)
+     SmiBootDisplay = 0x02;
+ }
+ 
++/****************************************************************
++ * MXM VGA hooks
++ ****************************************************************/
++
++// Function 0: Return Specification Support Level
++static void
++mxm_V30_F00(struct bregs *regs)
++{
++    regs->ax = 0x005f; // Success
++    regs->bl = 0x30; // MXM 3.0
++    regs->cx = 0x0003; // Supported Functions
++    set_success(regs);
++}
++
++// Function 1: Return a Pointer to the MXM Structure
++static void
++mxm_V30_F01(struct bregs *regs)
++{
++    switch (regs->cx) {
++    case 0x0030:
++        regs->ax = 0x005f; // Success
++        regs->es = GET_GLOBAL(MXM30SIS)/16;
++        regs->di = GET_GLOBAL(MXM30SIS)%16;
++        set_success(regs);
++        break;
++    default:
++        handle_155fXX(regs);
++        break;
++    }
++}
++
++static void
++mxm_V30(struct bregs *regs)
++{
++    switch (regs->bx) {
++    case 0xff00: mxm_V30_F00(regs); break;
++    case 0xff01: mxm_V30_F01(regs); break;
++    default:   handle_155fXX(regs); break;
++    }
++}
++
++static void
++mxm_155f80(struct bregs *regs)
++{
++    // TODO: implement other versions, like 2.1
++    mxm_V30(regs);
++}
++
++static void
++mxm_155f(struct bregs *regs)
++{
++    switch (regs->al) {
++    case 0x80: mxm_155f80(regs); break;
++    default:   handle_155fXX(regs); break;
++    }
++}
++
++void
++mxm_setup(void)
++{
++    VGAHookHandlerType = VH_MXM;
++}
++
+ /****************************************************************
+  * Entry and setup
+  ****************************************************************/
+@@ -313,6 +379,7 @@ handle_155f(struct bregs *regs)
+     switch (htype) {
+     case VH_VIA:   via_155f(regs); break;
+     case VH_INTEL: intel_155f(regs); break;
++    case VH_MXM:   mxm_155f(regs); break;
+     default:       handle_155fXX(regs); break;
+     }
+ }
+@@ -352,4 +419,6 @@ vgahook_setup(struct pci_device *pci)
+         via_setup(pci);
+     else if (pci->vendor == PCI_VENDOR_ID_INTEL)
+         intel_setup(pci);
++    else if (GET_GLOBAL(MXM30SIS))
++        mxm_setup();
+ }
+diff --git a/src/vgahooks.h b/src/vgahooks.h
+new file mode 100644
+index 00000000..f0c203af
+--- /dev/null
++++ b/src/vgahooks.h
+@@ -0,0 +1,9 @@
++#ifndef __VGAHOOKS_H
++#define __VGAHOOKS_H
++
++#include "types.h" // u32
++
++extern u32 MXM30SIS;
++
++
++#endif // vgahooks.h
+-- 
+2.43.0
+

From b7bc713babd065cbdd5f1eb4f2322b52f684588e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 11 Feb 2024 19:27:40 +0000
Subject: [PATCH 0223/1549] update pico-serprog to new revision

this merges the fix from:
https://codeberg.org/libreboot/pico-serprog/pulls/1

however, PRs are not to be sent there. riku merged it in
his repository, and i pulled it in the mirror hosted
on libreboot codeberg

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/pico-serprog | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/git/pico-serprog b/config/git/pico-serprog
index 9500e3c3..6d46566b 100644
--- a/config/git/pico-serprog
+++ b/config/git/pico-serprog
@@ -1,5 +1,5 @@
 {pico-serprog}{
-	rev: 3d573a01c4b8f69fb0474f95d2627db824d26e46
+	rev: e75e3a20e63269a5e3189bc2e49a6a81d45a636a
 	loc: pico-serprog
 	url: https://codeberg.org/libreboot/pico-serprog
 	bkup_url: https://git.disroot.org/libreboot/pico-serprog

From f9ed92e4d2809f3b1ee5dceef92f4f15673b41c1 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Mon, 12 Feb 2024 01:09:41 +0200
Subject: [PATCH 0224/1549] Add HP EliteBook 8560w

Iru Cai's port from Gerrit:
https://review.coreboot.org/c/coreboot/+/39398

Now with the proper MXM structure, which removes the 30 second POST
delay. Tested with i7-2670QM, Quadro 2000M and 32GB RAM.

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 ...ook-8560w-as-an-HP-Sandy-Ivy-Bridge-.patch | 1556 +++++++++++++++++
 ...-Add-MXM-System-Infomation-Structure.patch |   41 +
 config/coreboot/hp8560w_8mb/config/normal     |  642 +++++++
 config/coreboot/hp8560w_8mb/target.cfg        |    7 +
 config/vendor/sources                         |   13 +
 5 files changed, 2259 insertions(+)
 create mode 100644 config/coreboot/default/patches/0034-mb-hp-Add-Elitebook-8560w-as-an-HP-Sandy-Ivy-Bridge-.patch
 create mode 100644 config/coreboot/default/patches/0035-hp8560w-Add-MXM-System-Infomation-Structure.patch
 create mode 100644 config/coreboot/hp8560w_8mb/config/normal
 create mode 100644 config/coreboot/hp8560w_8mb/target.cfg

diff --git a/config/coreboot/default/patches/0034-mb-hp-Add-Elitebook-8560w-as-an-HP-Sandy-Ivy-Bridge-.patch b/config/coreboot/default/patches/0034-mb-hp-Add-Elitebook-8560w-as-an-HP-Sandy-Ivy-Bridge-.patch
new file mode 100644
index 00000000..458c3723
--- /dev/null
+++ b/config/coreboot/default/patches/0034-mb-hp-Add-Elitebook-8560w-as-an-HP-Sandy-Ivy-Bridge-.patch
@@ -0,0 +1,1556 @@
+From dac71d8ed89f1f1d295157aa62c678e35a320222 Mon Sep 17 00:00:00 2001
+From: Iru Cai <mytbk920423@gmail.com>
+Date: Tue, 5 Mar 2019 16:27:36 +0800
+Subject: [PATCH] mb/hp: Add Elitebook 8560w as an HP Sandy/Ivy Bridge laptop
+ variant
+
+Change-Id: I15181792b1efa45a2a94d78e43c6257da1acf950
+Signed-off-by: Iru Cai <mytbk920423@gmail.com>
+---
+ Documentation/mainboard/hp/8560w.md           |  82 +++++++
+ Documentation/mainboard/hp/8560w_flash.webp   | Bin 0 -> 51432 bytes
+ Documentation/mainboard/index.md              |   1 +
+ src/mainboard/hp/snb_ivb_laptops/Kconfig      |  10 +-
+ src/mainboard/hp/snb_ivb_laptops/Kconfig.name |   3 +
+ .../variants/8560w/board_info.txt             |   7 +
+ .../variants/8560w/early_init.c               |  36 +++
+ .../hp/snb_ivb_laptops/variants/8560w/gpio.c  | 224 ++++++++++++++++++
+ .../snb_ivb_laptops/variants/8560w/hda_verb.c |  25 ++
+ .../variants/8560w/overridetree.cb            |  51 ++++
+ 10 files changed, 438 insertions(+), 1 deletion(-)
+ create mode 100644 Documentation/mainboard/hp/8560w.md
+ create mode 100644 Documentation/mainboard/hp/8560w_flash.webp
+ create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt
+ create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c
+ create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
+ create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c
+ create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb
+
+diff --git a/Documentation/mainboard/hp/8560w.md b/Documentation/mainboard/hp/8560w.md
+new file mode 100644
+index 0000000000..cc35a0be1f
+--- /dev/null
++++ b/Documentation/mainboard/hp/8560w.md
+@@ -0,0 +1,82 @@
++# HP EliteBook 8560w
++
++This page describes how to run coreboot on the [HP EliteBook 8560w].
++
++## Required proprietary blobs
++
++- Intel Firmware Descriptor, ME and GbE firmware
++- EC: please read [HP Laptops with KBC1126 Embedded Controller](hp_kbc1126_laptops)
++
++## Flashing instructions
++
++HP EliteBook 8560w has an 8MiB SOIC-8 flash chip on the bottom of the
++mainboard. You just need to remove the service cover, and use an SOIC-8
++clip to read and flash the chip.
++
++![8560w_chip_location](8560w_flash.webp)
++
++```eval_rst
+++---------------------+------------+
++| Type                | Value      |
+++=====================+============+
++| Socketed flash      | no         |
+++---------------------+------------+
++| Model               | MX25L6406E |
+++---------------------+------------+
++| Size                | 8 MiB      |
+++---------------------+------------+
++| Package             | SOIC-8     |
+++---------------------+------------+
++| Write protection    | no         |
+++---------------------+------------+
++| Dual BIOS feature   | no         |
+++---------------------+------------+
++| In circuit flashing | yes        |
+++---------------------+------------+
++| Internal flashing   | yes        |
+++---------------------+------------+
++```
++
++## Untested
++
++- mainboards with 4 memory slots
++
++## Working
++
++- i7-2720QM, 8G+8G
++- Arch Linux boot from SeaBIOS payload
++- EHCI debug: the port is beside the eSATA port
++- SATA
++- eSATA
++- USB2 and USB3
++- keyboard
++- Gigabit Ethernet
++- WLAN
++- WWAN
++- VGA and DisplayPort
++- audio
++- EC ACPI
++- Using `me_cleaner`
++- dock: PS/2 keyboard, USB, DisplayPort
++- TPM
++- S3 suspend/resume
++
++## Technology
++
++```eval_rst
+++------------------+--------------------------------------------------+
++| Northbridge      | :doc:`../../northbridge/intel/sandybridge/index` |
+++------------------+--------------------------------------------------+
++| Southbridge      | bd82x6x                                          |
+++------------------+--------------------------------------------------+
++| CPU              | model_206ax                                      |
+++------------------+--------------------------------------------------+
++| Super I/O        | SMSC LPC47n217                                   |
+++------------------+--------------------------------------------------+
++| EC               | SMSC KBC1126                                     |
+++------------------+--------------------------------------------------+
++| Coprocessor      | Intel Management Engine                          |
+++------------------+--------------------------------------------------+
++```
++
++[HP EliteBook 8560w]: https://support.hp.com/us-en/product/hp-elitebook-8560w-mobile-workstation/5071171
+diff --git a/Documentation/mainboard/hp/8560w_flash.webp b/Documentation/mainboard/hp/8560w_flash.webp
+new file mode 100644
+index 0000000000000000000000000000000000000000..b8295bc6e920a4c59c4282e419200569672e8267
+GIT binary patch
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+G|JeY!zvB4-
+
+literal 0
+HcmV?d00001
+
+diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md
+index 519d88873c..a6be27ae09 100644
+--- a/Documentation/mainboard/index.md
++++ b/Documentation/mainboard/index.md
+@@ -84,6 +84,7 @@ The boards in this section are not real mainboards, but emulators.
+ - [HP Sure Start](hp/hp_sure_start.md)
+ - [EliteBook 2170p](hp/2170p.md)
+ - [EliteBook 2560p](hp/2560p.md)
++- [EliteBook 8560w](hp/8560w.md)
+ - [EliteBook 8760w](hp/8760w.md)
+ - [EliteBook Folio 9480m](hp/folio_9480m.md)
+ - [EliteBook 820 G2](hp/elitebook_820_g2.md)
+diff --git a/src/mainboard/hp/snb_ivb_laptops/Kconfig b/src/mainboard/hp/snb_ivb_laptops/Kconfig
+index f0bd55f64f..f180bca87f 100644
+--- a/src/mainboard/hp/snb_ivb_laptops/Kconfig
++++ b/src/mainboard/hp/snb_ivb_laptops/Kconfig
+@@ -69,6 +69,12 @@ config BOARD_HP_8470P
+ 	select SOUTHBRIDGE_INTEL_C216
+ 	select SUPERIO_SMSC_LPC47N217
+ 
++config BOARD_HP_8560W
++	select BOARD_HP_SNB_IVB_LAPTOPS_COMMON
++	select BOARD_ROMSIZE_KB_8192
++	select SOUTHBRIDGE_INTEL_BD82X6X
++	select SUPERIO_SMSC_LPC47N217
++
+ config BOARD_HP_8770W
+ 	select BOARD_HP_SNB_IVB_LAPTOPS_COMMON
+ 	select BOARD_ROMSIZE_KB_16384
+@@ -118,6 +124,7 @@ config VARIANT_DIR
+ 	default "2760p"          if BOARD_HP_2760P
+ 	default "8460p"          if BOARD_HP_8460P
+ 	default "8470p"          if BOARD_HP_8470P
++	default "8560w"          if BOARD_HP_8560W
+ 	default "8770w"          if BOARD_HP_8770W
+ 	default "folio_9470m"    if BOARD_HP_FOLIO_9470M
+ 	default "probook_6360b"  if BOARD_HP_PROBOOK_6360B
+@@ -130,6 +137,7 @@ config MAINBOARD_PART_NUMBER
+ 	default "EliteBook 2760p"          if BOARD_HP_2760P
+ 	default "EliteBook 8460p"          if BOARD_HP_8460P
+ 	default "EliteBook 8470p"          if BOARD_HP_8470P
++	default "EliteBook 8560w"          if BOARD_HP_8560W
+ 	default "EliteBook 8770w"          if BOARD_HP_8770W
+ 	default "EliteBook Folio 9470m"    if BOARD_HP_FOLIO_9470M
+ 	default "ProBook 6360b"            if BOARD_HP_PROBOOK_6360B
+@@ -146,7 +154,7 @@ config VGA_BIOS_ID
+ config USBDEBUG_HCD_INDEX
+ 	int
+ 	default 0 if BOARD_HP_2170P || BOARD_HP_FOLIO_9470M
+-	default 1 if BOARD_HP_2560P || BOARD_HP_2760P || BOARD_HP_8460P
++	default 1 if BOARD_HP_2560P || BOARD_HP_2760P || BOARD_HP_8460P || BOARD_HP_8560W
+ 	default 2 if BOARD_HP_2570P || BOARD_HP_8470P || BOARD_HP_8770W
+ 	default 1 if BOARD_HP_PROBOOK_6360B # FIXME: check this
+ 	default 2 if BOARD_HP_REVOLVE_810_G1 # FIXME: check this
+diff --git a/src/mainboard/hp/snb_ivb_laptops/Kconfig.name b/src/mainboard/hp/snb_ivb_laptops/Kconfig.name
+index f72e0f622a..fdd1b93bd7 100644
+--- a/src/mainboard/hp/snb_ivb_laptops/Kconfig.name
++++ b/src/mainboard/hp/snb_ivb_laptops/Kconfig.name
+@@ -18,6 +18,9 @@ config BOARD_HP_8460P
+ config BOARD_HP_8470P
+ 	bool "EliteBook 8470p"
+ 
++config BOARD_HP_8560W
++	bool "EliteBook 8560w"
++
+ config BOARD_HP_8770W
+ 	bool "EliteBook 8770w"
+ 
+diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt
+new file mode 100644
+index 0000000000..558e904a94
+--- /dev/null
++++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt
+@@ -0,0 +1,7 @@
++Category: laptop
++Board URL: https://support.hp.com/us-en/product/hp-elitebook-8560w-mobile-workstation/5071171
++ROM package: SOIC-8
++ROM protocol: SPI
++ROM socketed: n
++Flashrom support: y
++Release year: 2011
+diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c
+new file mode 100644
+index 0000000000..20c4b68911
+--- /dev/null
++++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c
+@@ -0,0 +1,36 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <bootblock_common.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++#include <superio/smsc/lpc47n217/lpc47n217.h>
++#include <ec/hp/kbc1126/ec.h>
++
++#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1)
++
++const struct southbridge_usb_port mainboard_usb_ports[] = {
++	{ 1, 1, 0 }, /* USB0 */
++	{ 1, 1, 0 }, /* USB1 */
++	{ 1, 1, 1 }, /* eSATA */
++	{ 1, 1, 1 }, /* camera */
++	{ 0, 0, 2 },
++	{ 1, 0, 2 }, /* bluetooth */
++	{ 0, 0, 3 },
++	{ 1, 0, 3 },
++	{ 0, 1, 4 },
++	{ 1, 1, 4 }, /* WWAN */
++	{ 1, 0, 5 },
++	{ 1, 0, 5 }, /* dock */
++	{ 1, 0, 6 },
++	{ 1, 0, 6 },
++};
++
++void bootblock_mainboard_early_init(void)
++{
++	lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
++	kbc1126_enter_conf();
++	kbc1126_mailbox_init();
++	kbc1126_kbc_init();
++	kbc1126_ec_init();
++	kbc1126_pm1_init();
++	kbc1126_exit_conf();
++}
+diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
+new file mode 100644
+index 0000000000..560d668d6f
+--- /dev/null
++++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
+@@ -0,0 +1,224 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_GPIO,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_GPIO,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_GPIO,
++	.gpio11 = GPIO_MODE_GPIO,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_GPIO,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_NATIVE,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_OUTPUT,
++	.gpio1 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio3 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio10 = GPIO_DIR_INPUT,
++	.gpio11 = GPIO_DIR_OUTPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_OUTPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_OUTPUT,
++	.gpio23 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_OUTPUT,
++	.gpio27 = GPIO_DIR_OUTPUT,
++	.gpio28 = GPIO_DIR_OUTPUT,
++	.gpio29 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio0 = GPIO_LEVEL_LOW,
++	.gpio11 = GPIO_LEVEL_LOW,
++	.gpio17 = GPIO_LEVEL_HIGH,
++	.gpio22 = GPIO_LEVEL_HIGH,
++	.gpio24 = GPIO_LEVEL_HIGH,
++	.gpio27 = GPIO_LEVEL_LOW,
++	.gpio28 = GPIO_LEVEL_LOW,
++	.gpio29 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++	.gpio24 = GPIO_RESET_RSMRST,
++	.gpio30 = GPIO_RESET_RSMRST,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio1 = GPIO_INVERT,
++	.gpio3 = GPIO_INVERT,
++	.gpio6 = GPIO_INVERT,
++	.gpio7 = GPIO_INVERT,
++	.gpio10 = GPIO_INVERT,
++	.gpio13 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_NATIVE,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_GPIO,
++	.gpio45 = GPIO_MODE_NATIVE,
++	.gpio46 = GPIO_MODE_GPIO,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_GPIO,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_GPIO,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_GPIO,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_GPIO,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_OUTPUT,
++	.gpio34 = GPIO_DIR_INPUT,
++	.gpio35 = GPIO_DIR_OUTPUT,
++	.gpio37 = GPIO_DIR_OUTPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio44 = GPIO_DIR_INPUT,
++	.gpio46 = GPIO_DIR_INPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_OUTPUT,
++	.gpio50 = GPIO_DIR_INPUT,
++	.gpio51 = GPIO_DIR_INPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio53 = GPIO_DIR_OUTPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio55 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_OUTPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++	.gpio61 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio33 = GPIO_LEVEL_LOW,
++	.gpio35 = GPIO_LEVEL_LOW,
++	.gpio37 = GPIO_LEVEL_LOW,
++	.gpio49 = GPIO_LEVEL_LOW,
++	.gpio53 = GPIO_LEVEL_HIGH,
++	.gpio57 = GPIO_LEVEL_LOW,
++	.gpio60 = GPIO_LEVEL_HIGH,
++	.gpio61 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_GPIO,
++	.gpio71 = GPIO_MODE_GPIO,
++	.gpio72 = GPIO_MODE_GPIO,
++	.gpio73 = GPIO_MODE_GPIO,
++	.gpio74 = GPIO_MODE_GPIO,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio68 = GPIO_DIR_OUTPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio70 = GPIO_DIR_OUTPUT,
++	.gpio71 = GPIO_DIR_OUTPUT,
++	.gpio72 = GPIO_DIR_OUTPUT,
++	.gpio73 = GPIO_DIR_OUTPUT,
++	.gpio74 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++	.gpio68 = GPIO_LEVEL_HIGH,
++	.gpio70 = GPIO_LEVEL_HIGH,
++	.gpio71 = GPIO_LEVEL_HIGH,
++	.gpio72 = GPIO_LEVEL_LOW,
++	.gpio73 = GPIO_LEVEL_HIGH,
++	.gpio74 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c
+new file mode 100644
+index 0000000000..2f5469fc84
+--- /dev/null
++++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c
+@@ -0,0 +1,25 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d7605, /* Codec Vendor / Device ID: IDT */
++	0x103c1631, /* Subsystem ID */
++
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x103c1631),
++	AZALIA_PIN_CFG(0, 0x0a, 0x40f000f0),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0421401f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x04a11020),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x40f000f0),
++	AZALIA_PIN_CFG(0, 0x0f, 0x40f000f0),
++	AZALIA_PIN_CFG(0, 0x10, 0x40f000f0),
++	AZALIA_PIN_CFG(0, 0x11, 0x90a60130),
++	AZALIA_PIN_CFG(0, 0x1f, 0x40f000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0x40f000f0),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb
+new file mode 100644
+index 0000000000..4264270ad0
+--- /dev/null
++++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb
+@@ -0,0 +1,51 @@
++# SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++	register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}"
++	device domain 0 on
++		subsystemid 0x103c 0x1631 inherit
++		device pci 01.0 on end # PCIe Bridge for discrete graphics
++		device pci 02.0 off end # Internal graphics
++
++		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
++			register "docking_supported" = "0"
++			register "gen1_dec" = "0x007c0201"
++			register "gen2_dec" = "0x000c0101"
++			register "gen3_dec" = "0x00fcfe01"
++			register "gen4_dec" = "0x000402e9"
++			register "gpi6_routing" = "2"
++			register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
++			# HDD(0), ODD(1), eSATA(4)
++			register "sata_port_map" = "0x3b"
++
++			device pci 1c.0 on  end # PCIe Port #1, WWAN
++			device pci 1c.1 on  end # PCIe Port #2, ExpressCard
++			device pci 1c.2 on  end # PCIe Port #3, SD/MMC
++			device pci 1c.3 on  end # PCIe Port #4, WLAN
++			device pci 1c.4 off end # PCIe Port #5
++			device pci 1c.5 off end # PCIe Port #6
++			device pci 1c.6 off end # PCIe Port #7
++			device pci 1c.7 on  end # PCIe Port #8, NEC USB 3.0 Host Controller
++			device pci 1f.0 on	# LPC bridge
++				chip ec/hp/kbc1126
++					register "ec_data_port" = "0x60"
++					register "ec_cmd_port"  = "0x64"
++					register "ec_ctrl_reg"  = "0xca"
++					register "ec_fan_ctrl_value" = "0x6b"
++					device pnp ff.1 off end
++				end
++				chip superio/smsc/lpc47n217
++					device pnp 4e.3 on	# Parallel
++						io  0x60 = 0x378
++						irq 0x70 = 7
++					end
++					device pnp 4e.4 on	# COM1
++						io  0x60 = 0x3f8
++						irq 0x70 = 4
++					end
++					device pnp 4e.5 off end	# COM2
++				end
++			end
++		end
++	end
++end
+-- 
+2.43.0
+
diff --git a/config/coreboot/default/patches/0035-hp8560w-Add-MXM-System-Infomation-Structure.patch b/config/coreboot/default/patches/0035-hp8560w-Add-MXM-System-Infomation-Structure.patch
new file mode 100644
index 00000000..68ccb801
--- /dev/null
+++ b/config/coreboot/default/patches/0035-hp8560w-Add-MXM-System-Infomation-Structure.patch
@@ -0,0 +1,41 @@
+From b2cf0657a2058118baf6f4ec96e356de3c9e493e Mon Sep 17 00:00:00 2001
+From: Riku Viitanen <riku.viitanen@protonmail.com>
+Date: Sun, 11 Feb 2024 19:02:20 +0200
+Subject: [PATCH] hp8560w: Add MXM System Infomation Structure
+
+Change-Id: I45b421f2d7baf8ca8dedbd3b1ab1e38392b6219b
+Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
+---
+ src/mainboard/hp/snb_ivb_laptops/Makefile.mk      |   6 ++++++
+ .../hp/snb_ivb_laptops/variants/8560w/mxm-30-sis  | Bin 0 -> 129 bytes
+ 2 files changed, 6 insertions(+)
+ create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/mxm-30-sis
+
+diff --git a/src/mainboard/hp/snb_ivb_laptops/Makefile.mk b/src/mainboard/hp/snb_ivb_laptops/Makefile.mk
+index c007bb68cd..7950abbc4e 100644
+--- a/src/mainboard/hp/snb_ivb_laptops/Makefile.mk
++++ b/src/mainboard/hp/snb_ivb_laptops/Makefile.mk
+@@ -9,3 +9,9 @@ ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainb
+ 
+ # FIXME: Other variants with same size onboard RAM may exist.
+ SPD_SOURCES = hynix_4g
++
++ifeq ($(CONFIG_BOARD_HP_8560W),y)
++cbfs-files-y += mxm-30-sis
++mxm-30-sis-file := variants/$(VARIANT_DIR)/mxm-30-sis
++mxm-30-sis-type := raw
++endif
+diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/mxm-30-sis b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/mxm-30-sis
+new file mode 100644
+index 0000000000000000000000000000000000000000..7e4e245a50d8d5d36ddb22e3b1aed3fa87a2f57d
+GIT binary patch
+literal 129
+zcmeZ`@Qr6?sAMn@-0}aX9Rou`%?mKiz;Fq|&xF!hw;=rNM_^h3Dy{$(SAdE$zF=lx
+o@?l{RW{6;7W}LwIl$Vj2apDSgHUS2PJFE;0Kxqas5d=FN0HAs+0RR91
+
+literal 0
+HcmV?d00001
+
+-- 
+2.43.1
+
diff --git a/config/coreboot/hp8560w_8mb/config/normal b/config/coreboot/hp8560w_8mb/config/normal
new file mode 100644
index 00000000..d3e4d52d
--- /dev/null
+++ b/config/coreboot/hp8560w_8mb/config/normal
@@ -0,0 +1,642 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+CONFIG_VENDOR_HP=y
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="EliteBook 8560w"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
+CONFIG_VGA_BIOS_ID="8086,0116"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="HP"
+CONFIG_CBFS_SIZE=0x7E9000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="8560w"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_BOARD_HP_280_G2 is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
+# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
+# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
+# CONFIG_BOARD_HP_2170P is not set
+# CONFIG_BOARD_HP_2560P is not set
+# CONFIG_BOARD_HP_2570P is not set
+# CONFIG_BOARD_HP_2760P is not set
+# CONFIG_BOARD_HP_8460P is not set
+# CONFIG_BOARD_HP_8470P is not set
+CONFIG_BOARD_HP_8560W=y
+# CONFIG_BOARD_HP_8770W is not set
+# CONFIG_BOARD_HP_FOLIO_9470M is not set
+# CONFIG_BOARD_HP_PROBOOK_6360B is not set
+# CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
+CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
+CONFIG_EC_HP_KBC1126_GPE=0x16
+CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8560w"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+CONFIG_HIDE_MEI_ON_ERROR=y
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_LPC47N217=y
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_HP_KBC1126=y
+
+#
+# Please select the following otherwise your laptop cannot be powered on.
+#
+CONFIG_KBC1126_FIRMWARE=y
+CONFIG_ECFW_PTR_ADDR=0xffffff00
+CONFIG_ECFW_PTR_SIZE=8
+CONFIG_KBC1126_FW1="../../../ec/hp8560w/ec.bin.fw1"
+CONFIG_KBC1126_FW1_OFFSET=0xfffe8000
+CONFIG_KBC1126_FW2="../../../ec/hp8560w/ec.bin.fw2"
+CONFIG_KBC1126_FW2_OFFSET=0xfffd0000
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+# CONFIG_VGA_ROM_RUN is not set
+CONFIG_NO_GFX_INIT=y
+CONFIG_NO_EARLY_GFX_INIT=y
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+# CONFIG_INTEL_GMA_ADD_VBT is not set
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg
new file mode 100644
index 00000000..ae56c735
--- /dev/null
+++ b/config/coreboot/hp8560w_8mb/target.cfg
@@ -0,0 +1,7 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
+grub_timeout=10
diff --git a/config/vendor/sources b/config/vendor/sources
index f4ec2842..b4b806cb 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -120,6 +120,19 @@
 	EC_url_bkup https://web.archive.org/web/20211231004901/https://ftp.ext.hp.com/pub/softpaq/sp85501-86000/sp85528.exe
 }
 
+# 68SVD family ROM
+# for 8560w
+# release notes: https://support.hp.com/soar-attachment/519/col44309-ob-185196-2-ob-185196-2_sp78085_releasedoc.html
+{hp8560w}{
+	DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
+	DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
+	DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
+
+	EC_hash 8e2bc5dca1a1cf0cfc1ac9df74eb6fda333f8ae560019f8182a49d3a716d72938f6cde4aa5ee56942def08207d3ef95706653bd238768fd029da43e9a4fbcc67
+	EC_url https://ftp.hp.com/pub/softpaq/sp78001-78500/sp78085.exe
+	EC_url_bkup https://web.archive.org/web/20230402085323/https://ftp.hp.com/pub/softpaq/sp78001-78500/sp78085.exe
+}
+
 # 68ICE or 68ICF family ROM
 # for 8470p, 8470w, 6470b, 8570p, 6570b
 # release notes: https://support.hp.com/soar-attachment/1021/col43350-ob-229442-2-ob-229442-2_sp96091_releasedoc.html

From 0add5571c053737289bddb33f84a7e187d5bbca1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 Feb 2024 13:59:23 +0000
Subject: [PATCH 0225/1549] NEW BOARD: dell 9020 optiplex sff

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              | 635 ++++++++++++++++++
 .../config/libgfxinit_txtmode                 | 632 +++++++++++++++++
 config/coreboot/dell9020sff_12mb/target.cfg   |   7 +
 config/vendor/sources                         |   2 +-
 4 files changed, 1275 insertions(+), 1 deletion(-)
 create mode 100644 config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/dell9020sff_12mb/target.cfg

diff --git a/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..4c82008a
--- /dev/null
+++ b/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,635 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 SFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_EHCI_BAR=0xe8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+# CONFIG_USE_BROADWELL_MRC is not set
+CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..5b11bd10
--- /dev/null
+++ b/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,632 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 SFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_EHCI_BAR=0xe8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+# CONFIG_USE_BROADWELL_MRC is not set
+CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020sff_12mb/target.cfg b/config/coreboot/dell9020sff_12mb/target.cfg
new file mode 100644
index 00000000..e6d3bec6
--- /dev/null
+++ b/config/coreboot/dell9020sff_12mb/target.cfg
@@ -0,0 +1,7 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/vendor/sources b/config/vendor/sources
index 9a3556d0..628ca52c 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -23,7 +23,7 @@
 
 # NOTE: google's manifest for archives containing mrc.bin, used here:
 # https://web.archive.org/web/20210211071412/https://dl.google.com/dl/edgedl/chromeos/recovery/recovery.conf
-{t440pmrc w541mrc t440plibremrc w541 dell9020mt dell9020mtvga}{
+{t440pmrc w541mrc t440plibremrc w541 dell9020mt dell9020sff_12mb}{
 	DL_hash f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998
 	DL_url https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
 	DL_url_bkup https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe

From 4680d1540f45db1878cb6157d720f3c4a41b93b3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 Feb 2024 14:07:08 +0000
Subject: [PATCH 0226/1549] ./update trees -u coreboot

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb      | 1 +
 config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode         | 1 +
 config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb       | 1 +
 config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode          | 1 +
 config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb      | 1 +
 config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode         | 1 +
 config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb     | 1 +
 config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode        | 1 +
 config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb     | 1 +
 config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode        | 1 +
 config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb      | 1 +
 config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode         | 1 +
 config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb    | 1 +
 config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode       | 1 +
 config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb   | 1 +
 config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode      | 1 +
 config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb  | 1 +
 config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode     | 1 +
 config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb | 1 +
 config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode    | 1 +
 config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb      | 1 +
 config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode         | 1 +
 22 files changed, 22 insertions(+)

diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
index ad9444f5..bb4340b1 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
@@ -173,6 +173,7 @@ CONFIG_BOARD_HP_2170P=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
index 93005606..c590be38 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
@@ -171,6 +171,7 @@ CONFIG_BOARD_HP_2170P=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
index aedd4b3f..0bfb67e3 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
@@ -171,6 +171,7 @@ CONFIG_BOARD_HP_2560P=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
index 5db9e2d8..c4d9a3f9 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
@@ -169,6 +169,7 @@ CONFIG_BOARD_HP_2560P=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
index 3d8a1f28..83ad2690 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
@@ -170,6 +170,7 @@ CONFIG_BOARD_HP_2570P=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
index 287cb941..3e14d81a 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
@@ -168,6 +168,7 @@ CONFIG_BOARD_HP_2570P=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
index 1ab5aa8b..340efb5e 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
@@ -171,6 +171,7 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
index cab744e2..4b0f5922 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
@@ -169,6 +169,7 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
index 3ea66709..0bcfdd0e 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
@@ -171,6 +171,7 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
index 1b7bc08c..2fa0b57f 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
@@ -169,6 +169,7 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb b/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
index 0f9ff5fa..6c0c06ec 100644
--- a/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
@@ -169,6 +169,7 @@ CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode b/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
index f56083f7..705dcf0f 100644
--- a/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
@@ -167,6 +167,7 @@ CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
index 13154ed9..6af76c78 100644
--- a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
@@ -171,6 +171,7 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
index 3de59bb9..83a7aaa5 100644
--- a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
@@ -169,6 +169,7 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
index 9f3257b5..02f9e183 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
@@ -171,6 +171,7 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
index 95b9ea4f..dea032d1 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
@@ -169,6 +169,7 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
index 68187d98..cedf4e2e 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
@@ -171,6 +171,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_2760P is not set
 CONFIG_BOARD_HP_8460P=y
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
index 5279a13d..9da024f0 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
@@ -169,6 +169,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_2760P is not set
 CONFIG_BOARD_HP_8460P=y
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
index d6d98e01..b1f48be0 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
@@ -172,6 +172,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 CONFIG_BOARD_HP_8470P=y
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
index 43ea2290..21243c8d 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
@@ -170,6 +170,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 CONFIG_BOARD_HP_8470P=y
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
index dedb4c63..0e09f0ea 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
@@ -171,6 +171,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 CONFIG_BOARD_HP_FOLIO_9470M=y
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
index 33beb4e7..d3217fdd 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
@@ -169,6 +169,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_2760P is not set
 # CONFIG_BOARD_HP_8460P is not set
 # CONFIG_BOARD_HP_8470P is not set
+# CONFIG_BOARD_HP_8560W is not set
 # CONFIG_BOARD_HP_8770W is not set
 CONFIG_BOARD_HP_FOLIO_9470M=y
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set

From 75c9a2b1eec810cc1b01735fa02e3dbcc11f84f8 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Tue, 20 Feb 2024 17:04:39 -0700
Subject: [PATCH 0227/1549] config/ifd/dell_ivybridge: Add ifd_nogbe

This is required by the Latitude E5530, which uses a Broadcom NIC
instead of the Intel ones. The original port was missing this file.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 config/ifd/dell_ivybridge/ifd_nogbe | Bin 0 -> 4096 bytes
 1 file changed, 0 insertions(+), 0 deletions(-)
 create mode 100644 config/ifd/dell_ivybridge/ifd_nogbe

diff --git a/config/ifd/dell_ivybridge/ifd_nogbe b/config/ifd/dell_ivybridge/ifd_nogbe
new file mode 100644
index 0000000000000000000000000000000000000000..584d8e216edf7dfaa2dc4a2371bef25302a6c328
GIT binary patch
literal 4096
zcmezW9~DF`{lL%6$il?NBp{@~sK}toz`%g4LWW^N3Q&lFfde8AVoEan=VoM(VE8W&
z6a!%-0OEnL1S1CrlJKBmHeFNT;AaH+A{<08Fg!Q`p^?Z2HU@(u42}%b85pJ_2{YIo
zhVYnx)S&SYi4FnzfJ7~$%11+BGz3ONU^E0qLtr!nMnhmU1V%$(Gz5l72)s8CWnfic
zRd{b82BpQpv_c_7T%iymen<hrKcoQTL)6K;F)@fLh$_gtGeT$&1~4rHHCF~|u8aZH
m++9#}cR|ci*aZ=P?*Mg&1JoT3Fn7T8L1<bA>wTTkz7GI0sow|y

literal 0
HcmV?d00001


From 53544ff3ebb519c60dafbd0c584ee3637ec20bda Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 22 Feb 2024 16:25:46 +0000
Subject: [PATCH 0228/1549] disable hiding peg from mrc on dell 9020

makes graphics cards work

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb  | 2 +-
 config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode     | 2 +-
 config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb | 2 +-
 config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode    | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
index 3cbdbdd9..1925ed68 100644
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
@@ -288,7 +288,7 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
 CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
 # CONFIG_USE_NATIVE_RAMINIT is not set
 # CONFIG_USE_BROADWELL_MRC is not set
-CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
+# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
 
 #
 # Southbridge
diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
index e8b3d64f..ffca5b39 100644
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
@@ -286,7 +286,7 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
 CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
 # CONFIG_USE_NATIVE_RAMINIT is not set
 # CONFIG_USE_BROADWELL_MRC is not set
-CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
+# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
 
 #
 # Southbridge
diff --git a/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
index 4c82008a..ada13b04 100644
--- a/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
@@ -288,7 +288,7 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
 CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
 # CONFIG_USE_NATIVE_RAMINIT is not set
 # CONFIG_USE_BROADWELL_MRC is not set
-CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
+# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
 
 #
 # Southbridge
diff --git a/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
index 5b11bd10..d6279c26 100644
--- a/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
@@ -286,7 +286,7 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
 CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
 # CONFIG_USE_NATIVE_RAMINIT is not set
 # CONFIG_USE_BROADWELL_MRC is not set
-CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
+# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
 
 #
 # Southbridge

From 35e5464a5dd74f1f5933087d33056684a93e1acc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 23 Feb 2024 12:30:41 +0000
Subject: [PATCH 0229/1549] config/vendor: fix entry for 9020sff

the current entry is fine, but it would then not support
other configs of different flash sizes, unless they are
explicitly defined.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/vendor/sources | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/vendor/sources b/config/vendor/sources
index 628ca52c..f60ad862 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -23,7 +23,7 @@
 
 # NOTE: google's manifest for archives containing mrc.bin, used here:
 # https://web.archive.org/web/20210211071412/https://dl.google.com/dl/edgedl/chromeos/recovery/recovery.conf
-{t440pmrc w541mrc t440plibremrc w541 dell9020mt dell9020sff_12mb}{
+{t440pmrc w541mrc t440plibremrc w541 dell9020mt dell9020sff}{
 	DL_hash f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998
 	DL_url https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
 	DL_url_bkup https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe

From d4d259938776094550d470d10955ae9b24c7f98f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 25 Feb 2024 12:53:16 +0000
Subject: [PATCH 0230/1549] Libreboot 20240225

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../0002-say-the-name-libreboot-in-the-grub-menu.patch          | 2 +-
 script/update/release                                           | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 29f5d3c1..8cea919d 100644
--- a/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..31308e16a 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20240126 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20240225 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/script/update/release b/script/update/release
index b1ab8a29..357840c2 100755
--- a/script/update/release
+++ b/script/update/release
@@ -215,7 +215,7 @@ mktarball()
 		mkdir -p "${2%/*}" || err "mk, !mkdir -p \"${2%/*}\""
 	if [ "${tar_implementation% *}" = "tar (GNU tar)" ]; then
 		tar --sort=name --owner=root:0 --group=root:0 \
-		    --mtime="UTC 2024-01-26" -c "$1" | xz -T0 -9e > "$2" || \
+		    --mtime="UTC 2024-02-25" -c "$1" | xz -T0 -9e > "$2" || \
 		    err "mktarball 1, ${1}"
 	else
 		# TODO: reproducible tarballs on non-GNU systems

From db074b785ccbca67bf3de54ac4414fb72f1cdf8f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 27 Feb 2024 18:52:31 +0000
Subject: [PATCH 0231/1549] enable serial console on fam15h boards

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_txtmode                 | 36 +++++++++++++++----
 .../config/libgfxinit_txtmode                 | 36 +++++++++++++++----
 .../config/libgfxinit_txtmode                 | 36 +++++++++++++++----
 .../config/libgfxinit_txtmode                 | 36 +++++++++++++++----
 .../kfsn4-dre_1mb/config/libgfxinit_txtmode   | 36 +++++++++++++++----
 .../kfsn4-dre_2mb/config/libgfxinit_txtmode   | 36 +++++++++++++++----
 .../config/libgfxinit_txtmode                 | 36 +++++++++++++++----
 .../config/libgfxinit_txtmode                 | 36 +++++++++++++++----
 .../config/libgfxinit_txtmode                 | 36 +++++++++++++++----
 .../config/libgfxinit_txtmode                 | 36 +++++++++++++++----
 10 files changed, 290 insertions(+), 70 deletions(-)

diff --git a/config/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode
index e5c58008..39cfe811 100644
--- a/config/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode
@@ -91,6 +91,7 @@ CONFIG_MAINBOARD_DIR="asus/kcma-d8"
 CONFIG_MAINBOARD_PART_NUMBER="KCMA-D8"
 CONFIG_MAX_CPUS=16
 CONFIG_CBFS_SIZE=0x1000000
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_MAINBOARD_VENDOR="ASUS"
 CONFIG_APIC_ID_OFFSET=0x0
 CONFIG_HW_MEM_HOLE_SIZEK=0x100000
@@ -152,10 +153,11 @@ CONFIG_POST_DEVICE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_DIMM_MAX=4
+CONFIG_TTYS0_LCS=3
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KCMA-D8"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 # CONFIG_USBDEBUG is not set
 CONFIG_MAINBOARD_VERSION="1.0"
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
@@ -220,6 +222,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_PCIEXP_CLK_PM=y
+CONFIG_TTYS0_BASE=0x3f8
 CONFIG_HPET_MIN_TICKS=0x14
 CONFIG_UART_PCI_ADDR=0x0
 # CONFIG_SOC_MEDIATEK_MT8173 is not set
@@ -468,6 +471,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
 # CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
 # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
 # CONFIG_NO_UART_ON_SUPERIO is not set
 # CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
 # CONFIG_UART_OVERRIDE_REFCLK is not set
@@ -559,29 +564,45 @@ CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 # Console
 #
 CONFIG_SQUELCH_EARLY_SMP=y
+CONFIG_CONSOLE_SERIAL=y
+
+#
+# I/O mapped, 8250-compatible
+#
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_BAUD=115200
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
 # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-# CONFIG_HWBASE_DEBUG_CB is not set
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
 CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
 CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
@@ -651,6 +672,7 @@ CONFIG_HAVE_DEBUG_CAR=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode
index 19da9a2c..7949bcfd 100644
--- a/config/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode
@@ -91,6 +91,7 @@ CONFIG_MAINBOARD_DIR="asus/kcma-d8"
 CONFIG_MAINBOARD_PART_NUMBER="KCMA-D8"
 CONFIG_MAX_CPUS=16
 CONFIG_CBFS_SIZE=0x200000
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_MAINBOARD_VENDOR="ASUS"
 CONFIG_APIC_ID_OFFSET=0x0
 CONFIG_HW_MEM_HOLE_SIZEK=0x100000
@@ -152,10 +153,11 @@ CONFIG_POST_DEVICE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_DIMM_MAX=4
+CONFIG_TTYS0_LCS=3
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KCMA-D8"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 # CONFIG_USBDEBUG is not set
 CONFIG_MAINBOARD_VERSION="1.0"
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
@@ -220,6 +222,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_PCIEXP_CLK_PM=y
+CONFIG_TTYS0_BASE=0x3f8
 CONFIG_HPET_MIN_TICKS=0x14
 CONFIG_UART_PCI_ADDR=0x0
 # CONFIG_SOC_MEDIATEK_MT8173 is not set
@@ -468,6 +471,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
 # CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
 # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
 # CONFIG_NO_UART_ON_SUPERIO is not set
 # CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
 # CONFIG_UART_OVERRIDE_REFCLK is not set
@@ -559,29 +564,45 @@ CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 # Console
 #
 CONFIG_SQUELCH_EARLY_SMP=y
+CONFIG_CONSOLE_SERIAL=y
+
+#
+# I/O mapped, 8250-compatible
+#
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_BAUD=115200
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
 # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-# CONFIG_HWBASE_DEBUG_CB is not set
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
 CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
 CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
@@ -651,6 +672,7 @@ CONFIG_HAVE_DEBUG_CAR=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
diff --git a/config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode
index e5c58008..39cfe811 100644
--- a/config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode
@@ -91,6 +91,7 @@ CONFIG_MAINBOARD_DIR="asus/kcma-d8"
 CONFIG_MAINBOARD_PART_NUMBER="KCMA-D8"
 CONFIG_MAX_CPUS=16
 CONFIG_CBFS_SIZE=0x1000000
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_MAINBOARD_VENDOR="ASUS"
 CONFIG_APIC_ID_OFFSET=0x0
 CONFIG_HW_MEM_HOLE_SIZEK=0x100000
@@ -152,10 +153,11 @@ CONFIG_POST_DEVICE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_DIMM_MAX=4
+CONFIG_TTYS0_LCS=3
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KCMA-D8"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 # CONFIG_USBDEBUG is not set
 CONFIG_MAINBOARD_VERSION="1.0"
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
@@ -220,6 +222,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_PCIEXP_CLK_PM=y
+CONFIG_TTYS0_BASE=0x3f8
 CONFIG_HPET_MIN_TICKS=0x14
 CONFIG_UART_PCI_ADDR=0x0
 # CONFIG_SOC_MEDIATEK_MT8173 is not set
@@ -468,6 +471,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
 # CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
 # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
 # CONFIG_NO_UART_ON_SUPERIO is not set
 # CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
 # CONFIG_UART_OVERRIDE_REFCLK is not set
@@ -559,29 +564,45 @@ CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 # Console
 #
 CONFIG_SQUELCH_EARLY_SMP=y
+CONFIG_CONSOLE_SERIAL=y
+
+#
+# I/O mapped, 8250-compatible
+#
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_BAUD=115200
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
 # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-# CONFIG_HWBASE_DEBUG_CB is not set
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
 CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
 CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
@@ -651,6 +672,7 @@ CONFIG_HAVE_DEBUG_CAR=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
diff --git a/config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode
index 19da9a2c..7949bcfd 100644
--- a/config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode
@@ -91,6 +91,7 @@ CONFIG_MAINBOARD_DIR="asus/kcma-d8"
 CONFIG_MAINBOARD_PART_NUMBER="KCMA-D8"
 CONFIG_MAX_CPUS=16
 CONFIG_CBFS_SIZE=0x200000
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_MAINBOARD_VENDOR="ASUS"
 CONFIG_APIC_ID_OFFSET=0x0
 CONFIG_HW_MEM_HOLE_SIZEK=0x100000
@@ -152,10 +153,11 @@ CONFIG_POST_DEVICE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_DIMM_MAX=4
+CONFIG_TTYS0_LCS=3
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KCMA-D8"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 # CONFIG_USBDEBUG is not set
 CONFIG_MAINBOARD_VERSION="1.0"
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
@@ -220,6 +222,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_PCIEXP_CLK_PM=y
+CONFIG_TTYS0_BASE=0x3f8
 CONFIG_HPET_MIN_TICKS=0x14
 CONFIG_UART_PCI_ADDR=0x0
 # CONFIG_SOC_MEDIATEK_MT8173 is not set
@@ -468,6 +471,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
 # CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
 # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
 # CONFIG_NO_UART_ON_SUPERIO is not set
 # CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
 # CONFIG_UART_OVERRIDE_REFCLK is not set
@@ -559,29 +564,45 @@ CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 # Console
 #
 CONFIG_SQUELCH_EARLY_SMP=y
+CONFIG_CONSOLE_SERIAL=y
+
+#
+# I/O mapped, 8250-compatible
+#
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_BAUD=115200
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
 # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-# CONFIG_HWBASE_DEBUG_CB is not set
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
 CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
 CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
@@ -651,6 +672,7 @@ CONFIG_HAVE_DEBUG_CAR=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
diff --git a/config/coreboot/kfsn4-dre_1mb/config/libgfxinit_txtmode b/config/coreboot/kfsn4-dre_1mb/config/libgfxinit_txtmode
index 32d61412..b538c0f9 100644
--- a/config/coreboot/kfsn4-dre_1mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kfsn4-dre_1mb/config/libgfxinit_txtmode
@@ -91,6 +91,7 @@ CONFIG_MAINBOARD_DIR="asus/kfsn4-dre"
 CONFIG_MAINBOARD_PART_NUMBER="KFSN4-DRE"
 CONFIG_MAX_CPUS=12
 CONFIG_CBFS_SIZE=0x100000
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_MAINBOARD_VENDOR="ASUS"
 CONFIG_APIC_ID_OFFSET=0x0
 CONFIG_HW_MEM_HOLE_SIZEK=0x100000
@@ -150,10 +151,11 @@ CONFIG_FMDFILE=""
 CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
 CONFIG_POST_DEVICE=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_DIMM_MAX=4
+CONFIG_TTYS0_LCS=3
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KFSN4-DRE"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 # CONFIG_USBDEBUG is not set
 CONFIG_MAINBOARD_VERSION="1.0"
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
@@ -216,6 +218,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_PCIEXP_CLK_PM=y
+CONFIG_TTYS0_BASE=0x3f8
 CONFIG_HPET_MIN_TICKS=0xfa
 CONFIG_UART_PCI_ADDR=0x0
 # CONFIG_SOC_MEDIATEK_MT8173 is not set
@@ -450,6 +453,8 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_SPI_FLASH is not set
 # CONFIG_SPI_SDCARD is not set
 # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
 # CONFIG_NO_UART_ON_SUPERIO is not set
 # CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
 # CONFIG_UART_OVERRIDE_REFCLK is not set
@@ -541,29 +546,45 @@ CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 # Console
 #
 CONFIG_SQUELCH_EARLY_SMP=y
+CONFIG_CONSOLE_SERIAL=y
+
+#
+# I/O mapped, 8250-compatible
+#
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_BAUD=115200
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
 # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-# CONFIG_HWBASE_DEBUG_CB is not set
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
 # CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
 # CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
@@ -633,6 +654,7 @@ CONFIG_HAVE_DEBUG_CAR=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
diff --git a/config/coreboot/kfsn4-dre_2mb/config/libgfxinit_txtmode b/config/coreboot/kfsn4-dre_2mb/config/libgfxinit_txtmode
index 6c7cc560..a5329039 100644
--- a/config/coreboot/kfsn4-dre_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kfsn4-dre_2mb/config/libgfxinit_txtmode
@@ -91,6 +91,7 @@ CONFIG_MAINBOARD_DIR="asus/kfsn4-dre"
 CONFIG_MAINBOARD_PART_NUMBER="KFSN4-DRE"
 CONFIG_MAX_CPUS=12
 CONFIG_CBFS_SIZE=0x200000
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_MAINBOARD_VENDOR="ASUS"
 CONFIG_APIC_ID_OFFSET=0x0
 CONFIG_HW_MEM_HOLE_SIZEK=0x100000
@@ -150,10 +151,11 @@ CONFIG_FMDFILE=""
 CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
 CONFIG_POST_DEVICE=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_DIMM_MAX=4
+CONFIG_TTYS0_LCS=3
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KFSN4-DRE"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 # CONFIG_USBDEBUG is not set
 CONFIG_MAINBOARD_VERSION="1.0"
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
@@ -216,6 +218,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_PCIEXP_CLK_PM=y
+CONFIG_TTYS0_BASE=0x3f8
 CONFIG_HPET_MIN_TICKS=0xfa
 CONFIG_UART_PCI_ADDR=0x0
 # CONFIG_SOC_MEDIATEK_MT8173 is not set
@@ -450,6 +453,8 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_SPI_FLASH is not set
 # CONFIG_SPI_SDCARD is not set
 # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
 # CONFIG_NO_UART_ON_SUPERIO is not set
 # CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
 # CONFIG_UART_OVERRIDE_REFCLK is not set
@@ -541,29 +546,45 @@ CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 # Console
 #
 CONFIG_SQUELCH_EARLY_SMP=y
+CONFIG_CONSOLE_SERIAL=y
+
+#
+# I/O mapped, 8250-compatible
+#
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_BAUD=115200
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
 # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-# CONFIG_HWBASE_DEBUG_CB is not set
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
 # CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
 # CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
@@ -633,6 +654,7 @@ CONFIG_HAVE_DEBUG_CAR=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode
index 765025d2..c29a71f8 100644
--- a/config/coreboot/kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode
@@ -91,6 +91,7 @@ CONFIG_MAINBOARD_DIR="asus/kgpe-d16"
 CONFIG_MAINBOARD_PART_NUMBER="KGPE-D16"
 CONFIG_MAX_CPUS=32
 CONFIG_CBFS_SIZE=0x1000000
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_MAINBOARD_VENDOR="ASUS"
 CONFIG_APIC_ID_OFFSET=0x0
 CONFIG_HW_MEM_HOLE_SIZEK=0x100000
@@ -152,11 +153,12 @@ CONFIG_POST_DEVICE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_DIMM_MAX=4
 CONFIG_TPM_PIRQ=0x0
+CONFIG_TTYS0_LCS=3
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KGPE-D16"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 # CONFIG_USBDEBUG is not set
 CONFIG_IPMI_KCS_REGISTER_SPACING=1
 CONFIG_IPMI_FRU_SINGLE_RW_SZ=16
@@ -223,6 +225,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_PCIEXP_CLK_PM=y
+CONFIG_TTYS0_BASE=0x3f8
 CONFIG_HPET_MIN_TICKS=0x14
 CONFIG_UART_PCI_ADDR=0x0
 # CONFIG_SOC_MEDIATEK_MT8173 is not set
@@ -472,6 +475,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
 # CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
 # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
 # CONFIG_NO_UART_ON_SUPERIO is not set
 # CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
 # CONFIG_UART_OVERRIDE_REFCLK is not set
@@ -567,29 +572,45 @@ CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 # Console
 #
 CONFIG_SQUELCH_EARLY_SMP=y
+CONFIG_CONSOLE_SERIAL=y
+
+#
+# I/O mapped, 8250-compatible
+#
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_BAUD=115200
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
 # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-# CONFIG_HWBASE_DEBUG_CB is not set
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
 CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
 CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
@@ -659,6 +680,7 @@ CONFIG_HAVE_DEBUG_CAR=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode
index c203474a..060966a5 100644
--- a/config/coreboot/kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode
@@ -91,6 +91,7 @@ CONFIG_MAINBOARD_DIR="asus/kgpe-d16"
 CONFIG_MAINBOARD_PART_NUMBER="KGPE-D16"
 CONFIG_MAX_CPUS=32
 CONFIG_CBFS_SIZE=0x200000
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_MAINBOARD_VENDOR="ASUS"
 CONFIG_APIC_ID_OFFSET=0x0
 CONFIG_HW_MEM_HOLE_SIZEK=0x100000
@@ -152,11 +153,12 @@ CONFIG_POST_DEVICE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_DIMM_MAX=4
 CONFIG_TPM_PIRQ=0x0
+CONFIG_TTYS0_LCS=3
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KGPE-D16"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 # CONFIG_USBDEBUG is not set
 CONFIG_IPMI_KCS_REGISTER_SPACING=1
 CONFIG_IPMI_FRU_SINGLE_RW_SZ=16
@@ -223,6 +225,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_PCIEXP_CLK_PM=y
+CONFIG_TTYS0_BASE=0x3f8
 CONFIG_HPET_MIN_TICKS=0x14
 CONFIG_UART_PCI_ADDR=0x0
 # CONFIG_SOC_MEDIATEK_MT8173 is not set
@@ -472,6 +475,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
 # CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
 # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
 # CONFIG_NO_UART_ON_SUPERIO is not set
 # CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
 # CONFIG_UART_OVERRIDE_REFCLK is not set
@@ -567,29 +572,45 @@ CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 # Console
 #
 CONFIG_SQUELCH_EARLY_SMP=y
+CONFIG_CONSOLE_SERIAL=y
+
+#
+# I/O mapped, 8250-compatible
+#
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_BAUD=115200
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
 # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-# CONFIG_HWBASE_DEBUG_CB is not set
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
 CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
 CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
@@ -659,6 +680,7 @@ CONFIG_HAVE_DEBUG_CAR=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode
index 765025d2..c29a71f8 100644
--- a/config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode
@@ -91,6 +91,7 @@ CONFIG_MAINBOARD_DIR="asus/kgpe-d16"
 CONFIG_MAINBOARD_PART_NUMBER="KGPE-D16"
 CONFIG_MAX_CPUS=32
 CONFIG_CBFS_SIZE=0x1000000
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_MAINBOARD_VENDOR="ASUS"
 CONFIG_APIC_ID_OFFSET=0x0
 CONFIG_HW_MEM_HOLE_SIZEK=0x100000
@@ -152,11 +153,12 @@ CONFIG_POST_DEVICE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_DIMM_MAX=4
 CONFIG_TPM_PIRQ=0x0
+CONFIG_TTYS0_LCS=3
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KGPE-D16"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 # CONFIG_USBDEBUG is not set
 CONFIG_IPMI_KCS_REGISTER_SPACING=1
 CONFIG_IPMI_FRU_SINGLE_RW_SZ=16
@@ -223,6 +225,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_PCIEXP_CLK_PM=y
+CONFIG_TTYS0_BASE=0x3f8
 CONFIG_HPET_MIN_TICKS=0x14
 CONFIG_UART_PCI_ADDR=0x0
 # CONFIG_SOC_MEDIATEK_MT8173 is not set
@@ -472,6 +475,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
 # CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
 # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
 # CONFIG_NO_UART_ON_SUPERIO is not set
 # CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
 # CONFIG_UART_OVERRIDE_REFCLK is not set
@@ -567,29 +572,45 @@ CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 # Console
 #
 CONFIG_SQUELCH_EARLY_SMP=y
+CONFIG_CONSOLE_SERIAL=y
+
+#
+# I/O mapped, 8250-compatible
+#
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_BAUD=115200
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
 # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-# CONFIG_HWBASE_DEBUG_CB is not set
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
 CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
 CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
@@ -659,6 +680,7 @@ CONFIG_HAVE_DEBUG_CAR=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode
index c203474a..060966a5 100644
--- a/config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode
@@ -91,6 +91,7 @@ CONFIG_MAINBOARD_DIR="asus/kgpe-d16"
 CONFIG_MAINBOARD_PART_NUMBER="KGPE-D16"
 CONFIG_MAX_CPUS=32
 CONFIG_CBFS_SIZE=0x200000
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_MAINBOARD_VENDOR="ASUS"
 CONFIG_APIC_ID_OFFSET=0x0
 CONFIG_HW_MEM_HOLE_SIZEK=0x100000
@@ -152,11 +153,12 @@ CONFIG_POST_DEVICE=y
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_DIMM_MAX=4
 CONFIG_TPM_PIRQ=0x0
+CONFIG_TTYS0_LCS=3
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KGPE-D16"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 # CONFIG_USBDEBUG is not set
 CONFIG_IPMI_KCS_REGISTER_SPACING=1
 CONFIG_IPMI_FRU_SINGLE_RW_SZ=16
@@ -223,6 +225,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_PCIEXP_CLK_PM=y
+CONFIG_TTYS0_BASE=0x3f8
 CONFIG_HPET_MIN_TICKS=0x14
 CONFIG_UART_PCI_ADDR=0x0
 # CONFIG_SOC_MEDIATEK_MT8173 is not set
@@ -472,6 +475,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
 # CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
 # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
 # CONFIG_NO_UART_ON_SUPERIO is not set
 # CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
 # CONFIG_UART_OVERRIDE_REFCLK is not set
@@ -567,29 +572,45 @@ CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 # Console
 #
 CONFIG_SQUELCH_EARLY_SMP=y
+CONFIG_CONSOLE_SERIAL=y
+
+#
+# I/O mapped, 8250-compatible
+#
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_BAUD=115200
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
 # CONFIG_CMOS_POST is not set
 CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
 # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-# CONFIG_HWBASE_DEBUG_CB is not set
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
 CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
 CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
@@ -659,6 +680,7 @@ CONFIG_HAVE_DEBUG_CAR=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y

From 944cafa2306c1cd519c1599d249ae81b237fdfda Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 2 Mar 2024 22:55:29 +0000
Subject: [PATCH 0232/1549] coreboot/haswell: make IOMMU a runtime option

It is now possible to disable the IOMMU on Haswell
boards, by doing this on your ROM image:

./nvramtool -C libreboot.rom -w iommu=Disable

To enable it again, do this:

./nvramtool -C libreboot.rom -w iommu=Enable

If not specified, the default behaviour is *on*.
A follow-up patch will turn IOMMU *off* by default,
on Dell OptiPlex 9020 SFF/MT, by setting it as such
in cmos.default. This is to make graphics cards work
properly to work around a bug when it's turned on.

Leaving the IOMMU enabled is recommended, if it works.
It works in most cases, including on 9020 SFF/MT when
using the Intel GPU without a graphics card inserted.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...-haswell-make-IOMMU-a-runtime-option.patch | 292 ++++++++++++++++++
 1 file changed, 292 insertions(+)
 create mode 100644 config/coreboot/default/patches/0036-nb-intel-haswell-make-IOMMU-a-runtime-option.patch

diff --git a/config/coreboot/default/patches/0036-nb-intel-haswell-make-IOMMU-a-runtime-option.patch b/config/coreboot/default/patches/0036-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
new file mode 100644
index 00000000..8401e8b8
--- /dev/null
+++ b/config/coreboot/default/patches/0036-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
@@ -0,0 +1,292 @@
+From 7c755b4502ea007f2216ea76f2ed734452def883 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sat, 2 Mar 2024 22:51:09 +0000
+Subject: [PATCH 1/2] nb/intel/haswell: make IOMMU a runtime option
+
+When I tested graphics cards on a coreboot port for Dell
+OptiPlex 9020 SFF, I could not use a graphics card unless
+I set iommu=off on the Linux cmdline.
+
+Coreboot's current behaviour is to check whether the CPU
+has vt-d support and, if it does, initialise the IOMMU.
+
+This patch maintains the current behaviour by default, but
+allows the user to turn *off* the IOMMU, even if vt-d is
+supported by the host CPU.
+
+If iommu=Disable is specified, the check will not be
+performed, and the IOMMU will be left disabled. This option
+has been added to all current Haswell boards, though it is
+recommended to leave the IOMMU turned on in most setups.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/asrock/b85m_pro4/cmos.default    | 1 +
+ src/mainboard/asrock/b85m_pro4/cmos.layout     | 3 +++
+ src/mainboard/asrock/h81m-hds/cmos.default     | 1 +
+ src/mainboard/asrock/h81m-hds/cmos.layout      | 6 ++++++
+ src/mainboard/dell/optiplex_9020/cmos.default  | 1 +
+ src/mainboard/dell/optiplex_9020/cmos.layout   | 6 ++++++
+ src/mainboard/google/beltino/cmos.layout       | 5 +++++
+ src/mainboard/google/slippy/cmos.layout        | 5 +++++
+ src/mainboard/intel/baskingridge/cmos.layout   | 4 ++++
+ src/mainboard/lenovo/haswell/cmos.default      | 1 +
+ src/mainboard/lenovo/haswell/cmos.layout       | 3 +++
+ src/mainboard/supermicro/x10slm-f/cmos.default | 1 +
+ src/mainboard/supermicro/x10slm-f/cmos.layout  | 6 ++++++
+ src/northbridge/intel/haswell/early_init.c     | 5 +++++
+ 14 files changed, 48 insertions(+)
+
+diff --git a/src/mainboard/asrock/b85m_pro4/cmos.default b/src/mainboard/asrock/b85m_pro4/cmos.default
+index c51001c03c..1c5c17f841 100644
+--- a/src/mainboard/asrock/b85m_pro4/cmos.default
++++ b/src/mainboard/asrock/b85m_pro4/cmos.default
+@@ -2,3 +2,4 @@ boot_option=Fallback
+ debug_level=Debug
+ nmi=Enable
+ power_on_after_fail=Disable
++iommu=Enable
+diff --git a/src/mainboard/asrock/b85m_pro4/cmos.layout b/src/mainboard/asrock/b85m_pro4/cmos.layout
+index efdc333fc2..c9883ea71d 100644
+--- a/src/mainboard/asrock/b85m_pro4/cmos.layout
++++ b/src/mainboard/asrock/b85m_pro4/cmos.layout
+@@ -11,6 +11,7 @@
+ 	395	4	e	4	debug_level
+ 	408	1	e	1	nmi
+ 	409	2	e	5	power_on_after_fail
++	412	1	e	6	iommu
+ 	984	16	h	0	check_sum
+ # -----------------------------------------------------------------
+ 
+@@ -38,6 +39,8 @@
+ 	5	0	Disable
+ 	5	1	Enable
+ 	5	2	Keep
++	6	0	Disable
++	6	1	Enable
+ # -----------------------------------------------------------------
+ 
+ # -----------------------------------------------------------------
+diff --git a/src/mainboard/asrock/h81m-hds/cmos.default b/src/mainboard/asrock/h81m-hds/cmos.default
+index c51001c03c..1c5c17f841 100644
+--- a/src/mainboard/asrock/h81m-hds/cmos.default
++++ b/src/mainboard/asrock/h81m-hds/cmos.default
+@@ -2,3 +2,4 @@ boot_option=Fallback
+ debug_level=Debug
+ nmi=Enable
+ power_on_after_fail=Disable
++iommu=Enable
+diff --git a/src/mainboard/asrock/h81m-hds/cmos.layout b/src/mainboard/asrock/h81m-hds/cmos.layout
+index c9ba76c78f..95ee3d36fb 100644
+--- a/src/mainboard/asrock/h81m-hds/cmos.layout
++++ b/src/mainboard/asrock/h81m-hds/cmos.layout
+@@ -21,6 +21,9 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	5	power_on_after_fail
+ 
++# enable or disable iommu
++412	1	e	6	iommu
++
+ # coreboot config options: check sums
+ 984	16	h	0	check_sum
+ 
+@@ -52,6 +55,9 @@ enumerations
+ 5	1	Enable
+ 5	2	Keep
+ 
++6	0	Disable
++6	1	Enable
++
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
+index b159660aa8..8253570f19 100644
+--- a/src/mainboard/dell/optiplex_9020/cmos.default
++++ b/src/mainboard/dell/optiplex_9020/cmos.default
+@@ -2,3 +2,4 @@ boot_option=Fallback
+ debug_level=Debug
+ nmi=Disable
+ power_on_after_fail=Disable
++iommu=Enable
+diff --git a/src/mainboard/dell/optiplex_9020/cmos.layout b/src/mainboard/dell/optiplex_9020/cmos.layout
+index c9ba76c78f..72ff9c4bee 100644
+--- a/src/mainboard/dell/optiplex_9020/cmos.layout
++++ b/src/mainboard/dell/optiplex_9020/cmos.layout
+@@ -21,6 +21,9 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	5	power_on_after_fail
+ 
++# turn iommu on or off
++412	1	e	6	iommu
++
+ # coreboot config options: check sums
+ 984	16	h	0	check_sum
+ 
+@@ -52,6 +55,9 @@ enumerations
+ 5	1	Enable
+ 5	2	Keep
+ 
++6	0	Disable
++6	1	Enable
++
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/mainboard/google/beltino/cmos.layout b/src/mainboard/google/beltino/cmos.layout
+index 78d44c1415..c143979ae1 100644
+--- a/src/mainboard/google/beltino/cmos.layout
++++ b/src/mainboard/google/beltino/cmos.layout
+@@ -19,6 +19,9 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	7	power_on_after_fail
+ 
++# enable or disable iommu
++412	1	e	8	iommu
++
+ # coreboot config options: bootloader
+ #Used by ChromeOS:
+ 416	128	r	0	vbnv
+@@ -47,6 +50,8 @@ enumerations
+ 7	0	Disable
+ 7	1	Enable
+ 7	2	Keep
++8	0	Disable
++8	1	Enable
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/mainboard/google/slippy/cmos.layout b/src/mainboard/google/slippy/cmos.layout
+index 78d44c1415..c143979ae1 100644
+--- a/src/mainboard/google/slippy/cmos.layout
++++ b/src/mainboard/google/slippy/cmos.layout
+@@ -19,6 +19,9 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	7	power_on_after_fail
+ 
++# enable or disable iommu
++412	1	e	8	iommu
++
+ # coreboot config options: bootloader
+ #Used by ChromeOS:
+ 416	128	r	0	vbnv
+@@ -47,6 +50,8 @@ enumerations
+ 7	0	Disable
+ 7	1	Enable
+ 7	2	Keep
++8	0	Disable
++8	1	Enable
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/mainboard/intel/baskingridge/cmos.layout b/src/mainboard/intel/baskingridge/cmos.layout
+index 78d44c1415..f2c602f541 100644
+--- a/src/mainboard/intel/baskingridge/cmos.layout
++++ b/src/mainboard/intel/baskingridge/cmos.layout
+@@ -19,6 +19,8 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	7	power_on_after_fail
+ 
++412	1	e	8	iommu
++
+ # coreboot config options: bootloader
+ #Used by ChromeOS:
+ 416	128	r	0	vbnv
+@@ -47,6 +49,8 @@ enumerations
+ 7	0	Disable
+ 7	1	Enable
+ 7	2	Keep
++8	0	Disable
++8	1	Enable
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/mainboard/lenovo/haswell/cmos.default b/src/mainboard/lenovo/haswell/cmos.default
+index bb8626d48b..051658d757 100644
+--- a/src/mainboard/lenovo/haswell/cmos.default
++++ b/src/mainboard/lenovo/haswell/cmos.default
+@@ -12,3 +12,4 @@ trackpoint=Enable
+ backlight=Keyboard
+ enable_dual_graphics=Disable
+ usb_always_on=Disable
++iommu=Enable
+diff --git a/src/mainboard/lenovo/haswell/cmos.layout b/src/mainboard/lenovo/haswell/cmos.layout
+index 27915d3ab7..59df76b64c 100644
+--- a/src/mainboard/lenovo/haswell/cmos.layout
++++ b/src/mainboard/lenovo/haswell/cmos.layout
+@@ -23,6 +23,7 @@ entries
+ 
+ # coreboot config options: EC
+ 411	1	e	8	first_battery
++413	1	e	14	iommu
+ 415	1	e	1	wlan
+ 416	1	e	1	trackpoint
+ 417	1	e	1	fn_ctrl_swap
+@@ -72,6 +73,8 @@ enumerations
+ 13	0	Disable
+ 13	1	AC and battery
+ 13	2	AC only
++14	0	Disable
++14	1	Enable
+ 
+ # -----------------------------------------------------------------
+ checksums
+diff --git a/src/mainboard/supermicro/x10slm-f/cmos.default b/src/mainboard/supermicro/x10slm-f/cmos.default
+index f4047147f7..eea2c36b88 100644
+--- a/src/mainboard/supermicro/x10slm-f/cmos.default
++++ b/src/mainboard/supermicro/x10slm-f/cmos.default
+@@ -3,3 +3,4 @@ debug_level=Debug
+ nmi=Enable
+ power_on_after_fail=Keep
+ hide_ast2400=Disable
++iommu=Enable
+diff --git a/src/mainboard/supermicro/x10slm-f/cmos.layout b/src/mainboard/supermicro/x10slm-f/cmos.layout
+index 38ba87aa45..24d39e97ee 100644
+--- a/src/mainboard/supermicro/x10slm-f/cmos.layout
++++ b/src/mainboard/supermicro/x10slm-f/cmos.layout
+@@ -21,6 +21,9 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	5	power_on_after_fail
+ 
++# enable or disable iommu
++412	1	e	6	iommu
++
+ # coreboot config options: mainboard
+ 416	1	e	1	hide_ast2400
+ 
+@@ -55,6 +58,9 @@ enumerations
+ 5	1	Enable
+ 5	2	Keep
+ 
++6	0	Disable
++6	1	Enable
++
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c
+index e47deb5da6..1a7e0b1076 100644
+--- a/src/northbridge/intel/haswell/early_init.c
++++ b/src/northbridge/intel/haswell/early_init.c
+@@ -5,6 +5,7 @@
+ #include <device/mmio.h>
+ #include <device/pci_def.h>
+ #include <device/pci_ops.h>
++#include <option.h>
+ 
+ #include "haswell.h"
+ 
+@@ -157,6 +158,10 @@ static void haswell_setup_misc(void)
+ static void haswell_setup_iommu(void)
+ {
+ 	const u32 capid0_a = pci_read_config32(HOST_BRIDGE, CAPID0_A);
++	u8 enable_iommu = get_uint_option("iommu", 1);
++
++	if (!enable_iommu)
++		return;
+ 
+ 	if (capid0_a & VTD_DISABLE)
+ 		return;
+-- 
+2.39.2
+

From 665840b2b9b296fe50fe4fa78b4ffda072c1033b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 2 Mar 2024 23:02:52 +0000
Subject: [PATCH 0233/1549] coreboot/dell9020*_12mb: Disable IOMMU by default

Needed to make graphics cards work. Turn it on if you're using
only the Intel GPU.

With IOMMU *enabled*, graphics cards do not work reliably at all.
The cause still needs to be investigated, but the symptoms are
graphical corruption on the screen, and Xorg usually crashes.
In some cases (on some cards), TTYs can still be used; the payload
can still be used reliably, on a graphics card, but Xorg fails to
work properly.

This could be a bug in Linux drivers, instead of anything that
coreboot does (not yet tested in factory BIOS).

Leaving it off by default will ensure reliable operation on all
setups, whether an iGPU or dGPU is used.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...tiplex_9020-Disable-IOMMU-by-default.patch | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)
 create mode 100644 config/coreboot/default/patches/0037-dell-optiplex_9020-Disable-IOMMU-by-default.patch

diff --git a/config/coreboot/default/patches/0037-dell-optiplex_9020-Disable-IOMMU-by-default.patch b/config/coreboot/default/patches/0037-dell-optiplex_9020-Disable-IOMMU-by-default.patch
new file mode 100644
index 00000000..c8cde72e
--- /dev/null
+++ b/config/coreboot/default/patches/0037-dell-optiplex_9020-Disable-IOMMU-by-default.patch
@@ -0,0 +1,29 @@
+From 61041d49b94236400e836b8ea518d3a064b95c4e Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sat, 2 Mar 2024 23:00:09 +0000
+Subject: [PATCH 2/2] dell/optiplex_9020: Disable IOMMU by default
+
+Needed to make graphics cards work. Turning it on is
+recommended if only using iGPU, otherwise leave it off
+by default. The IOMMU is extremely buggy when a graphics
+card is used. Leaving it off by default will ensure that
+the default ROM images in Libreboot will work on any setup.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/dell/optiplex_9020/cmos.default | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
+index 8253570f19..7bccc80e51 100644
+--- a/src/mainboard/dell/optiplex_9020/cmos.default
++++ b/src/mainboard/dell/optiplex_9020/cmos.default
+@@ -2,4 +2,4 @@ boot_option=Fallback
+ debug_level=Debug
+ nmi=Disable
+ power_on_after_fail=Disable
+-iommu=Enable
++iommu=Disable
+-- 
+2.39.2
+

From 036bf2c69a64c7a3bfdcfde3139ae2285e790a5b Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Mon, 4 Mar 2024 18:17:21 -0700
Subject: [PATCH 0234/1549] config: Add Dell Latitude E5420

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 ...dell-Add-Latitude-E5420-Sandy-Bridge.patch | 774 ++++++++++++++++++
 .../config/libgfxinit_corebootfb              |   1 +
 .../dell9020mt_12mb/config/libgfxinit_txtmode |   1 +
 .../config/libgfxinit_corebootfb              |   1 +
 .../config/libgfxinit_txtmode                 |   1 +
 .../e5420_6mb/config/libgfxinit_corebootfb    | 620 ++++++++++++++
 .../e5420_6mb/config/libgfxinit_txtmode       | 617 ++++++++++++++
 config/coreboot/e5420_6mb/target.cfg          |  11 +
 .../e5520_6mb/config/libgfxinit_corebootfb    |   1 +
 .../e5520_6mb/config/libgfxinit_txtmode       |   1 +
 .../e5530_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e5530_12mb/config/libgfxinit_txtmode      |   1 +
 .../e6420_10mb/config/libgfxinit_corebootfb   |   1 +
 .../e6420_10mb/config/libgfxinit_txtmode      |   1 +
 .../e6430_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e6430_12mb/config/libgfxinit_txtmode      |   1 +
 .../e6520_10mb/config/libgfxinit_corebootfb   |   1 +
 .../e6520_10mb/config/libgfxinit_txtmode      |   1 +
 .../e6530_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e6530_12mb/config/libgfxinit_txtmode      |   1 +
 .../t1650_12mb/config/libgfxinit_txtmode      |   1 +
 config/vendor/sources                         |   2 +-
 22 files changed, 2040 insertions(+), 1 deletion(-)
 create mode 100644 config/coreboot/default/patches/0038-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
 create mode 100644 config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/e5420_6mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/e5420_6mb/target.cfg

diff --git a/config/coreboot/default/patches/0038-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch b/config/coreboot/default/patches/0038-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
new file mode 100644
index 00000000..11f95a63
--- /dev/null
+++ b/config/coreboot/default/patches/0038-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
@@ -0,0 +1,774 @@
+From 7dd58c8b301404a8bafee25a1e97a8a5d614b3d6 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Mon, 4 Mar 2024 18:05:43 -0700
+Subject: [PATCH] mb/dell: Add Latitude E5420 (Sandy Bridge)
+
+---
+ src/mainboard/dell/e5420/Kconfig           |  37 ++++
+ src/mainboard/dell/e5420/Kconfig.name      |   2 +
+ src/mainboard/dell/e5420/Makefile.mk       |   5 +
+ src/mainboard/dell/e5420/acpi/ec.asl       |   9 +
+ src/mainboard/dell/e5420/acpi/platform.asl |  12 ++
+ src/mainboard/dell/e5420/acpi/superio.asl  |   3 +
+ src/mainboard/dell/e5420/acpi_tables.c     |  16 ++
+ src/mainboard/dell/e5420/board_info.txt    |   6 +
+ src/mainboard/dell/e5420/cmos.default      |   9 +
+ src/mainboard/dell/e5420/cmos.layout       |  88 ++++++++++
+ src/mainboard/dell/e5420/data.vbt          | Bin 0 -> 6144 bytes
+ src/mainboard/dell/e5420/devicetree.cb     |  66 +++++++
+ src/mainboard/dell/e5420/dsdt.asl          |  30 ++++
+ src/mainboard/dell/e5420/early_init.c      |  32 ++++
+ src/mainboard/dell/e5420/gma-mainboard.ads |  20 +++
+ src/mainboard/dell/e5420/gpio.c            | 195 +++++++++++++++++++++
+ src/mainboard/dell/e5420/hda_verb.c        |  33 ++++
+ src/mainboard/dell/e5420/mainboard.c       |  21 +++
+ 18 files changed, 584 insertions(+)
+ create mode 100644 src/mainboard/dell/e5420/Kconfig
+ create mode 100644 src/mainboard/dell/e5420/Kconfig.name
+ create mode 100644 src/mainboard/dell/e5420/Makefile.mk
+ create mode 100644 src/mainboard/dell/e5420/acpi/ec.asl
+ create mode 100644 src/mainboard/dell/e5420/acpi/platform.asl
+ create mode 100644 src/mainboard/dell/e5420/acpi/superio.asl
+ create mode 100644 src/mainboard/dell/e5420/acpi_tables.c
+ create mode 100644 src/mainboard/dell/e5420/board_info.txt
+ create mode 100644 src/mainboard/dell/e5420/cmos.default
+ create mode 100644 src/mainboard/dell/e5420/cmos.layout
+ create mode 100755 src/mainboard/dell/e5420/data.vbt
+ create mode 100644 src/mainboard/dell/e5420/devicetree.cb
+ create mode 100644 src/mainboard/dell/e5420/dsdt.asl
+ create mode 100644 src/mainboard/dell/e5420/early_init.c
+ create mode 100644 src/mainboard/dell/e5420/gma-mainboard.ads
+ create mode 100644 src/mainboard/dell/e5420/gpio.c
+ create mode 100644 src/mainboard/dell/e5420/hda_verb.c
+ create mode 100644 src/mainboard/dell/e5420/mainboard.c
+
+diff --git a/src/mainboard/dell/e5420/Kconfig b/src/mainboard/dell/e5420/Kconfig
+new file mode 100644
+index 0000000000..f4385045ae
+--- /dev/null
++++ b/src/mainboard/dell/e5420/Kconfig
+@@ -0,0 +1,37 @@
++if BOARD_DELL_LATITUDE_E5420
++
++config BOARD_SPECIFIC_OPTIONS
++	def_bool y
++	select BOARD_ROMSIZE_KB_6144
++	select EC_ACPI
++	select EC_DELL_MEC5035
++	select GFX_GMA_PANEL_1_ON_LVDS
++	select HAVE_ACPI_RESUME
++	select HAVE_ACPI_TABLES
++	select HAVE_CMOS_DEFAULT
++	select HAVE_OPTION_TABLE
++	select INTEL_GMA_HAVE_VBT
++	select INTEL_INT15
++	select MAINBOARD_HAS_LIBGFXINIT
++	select NORTHBRIDGE_INTEL_SANDYBRIDGE
++	select SERIRQ_CONTINUOUS_MODE
++	select SOUTHBRIDGE_INTEL_BD82X6X
++	select SYSTEM_TYPE_LAPTOP
++	select USE_NATIVE_RAMINIT
++
++config DRAM_RESET_GATE_GPIO
++	default 60
++
++config MAINBOARD_DIR
++	default "dell/e5420"
++
++config MAINBOARD_PART_NUMBER
++	default "Latitude E5420"
++
++config USBDEBUG_HCD_INDEX
++	default 2
++
++config VGA_BIOS_ID
++	default "8086,0116"
++
++endif # BOARD_DELL_LATITUDE_E5420
+diff --git a/src/mainboard/dell/e5420/Kconfig.name b/src/mainboard/dell/e5420/Kconfig.name
+new file mode 100644
+index 0000000000..eb495fb705
+--- /dev/null
++++ b/src/mainboard/dell/e5420/Kconfig.name
+@@ -0,0 +1,2 @@
++config BOARD_DELL_LATITUDE_E5420
++	bool "Latitude E5420"
+diff --git a/src/mainboard/dell/e5420/Makefile.mk b/src/mainboard/dell/e5420/Makefile.mk
+new file mode 100644
+index 0000000000..18391d8b18
+--- /dev/null
++++ b/src/mainboard/dell/e5420/Makefile.mk
+@@ -0,0 +1,5 @@
++bootblock-y += early_init.c
++bootblock-y += gpio.c
++romstage-y += early_init.c
++romstage-y += gpio.c
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/dell/e5420/acpi/ec.asl b/src/mainboard/dell/e5420/acpi/ec.asl
+new file mode 100644
+index 0000000000..0d429410a9
+--- /dev/null
++++ b/src/mainboard/dell/e5420/acpi/ec.asl
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++Device(EC)
++{
++	Name (_HID, EISAID("PNP0C09"))
++	Name (_UID, 0)
++	Name (_GPE, 16)
++/* FIXME: EC support */
++}
+diff --git a/src/mainboard/dell/e5420/acpi/platform.asl b/src/mainboard/dell/e5420/acpi/platform.asl
+new file mode 100644
+index 0000000000..2d24bbd9b9
+--- /dev/null
++++ b/src/mainboard/dell/e5420/acpi/platform.asl
+@@ -0,0 +1,12 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++Method(_WAK, 1)
++{
++	/* FIXME: EC support  */
++	Return(Package() {0, 0})
++}
++
++Method(_PTS,1)
++{
++	/* FIXME: EC support  */
++}
+diff --git a/src/mainboard/dell/e5420/acpi/superio.asl b/src/mainboard/dell/e5420/acpi/superio.asl
+new file mode 100644
+index 0000000000..55b1db5b11
+--- /dev/null
++++ b/src/mainboard/dell/e5420/acpi/superio.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <drivers/pc80/pc/ps2_controller.asl>
+diff --git a/src/mainboard/dell/e5420/acpi_tables.c b/src/mainboard/dell/e5420/acpi_tables.c
+new file mode 100644
+index 0000000000..e2759659bf
+--- /dev/null
++++ b/src/mainboard/dell/e5420/acpi_tables.c
+@@ -0,0 +1,16 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi_gnvs.h>
++#include <soc/nvs.h>
++
++/* FIXME: check this function.  */
++void mainboard_fill_gnvs(struct global_nvs *gnvs)
++{
++	/* The lid is open by default. */
++	gnvs->lids = 1;
++
++	/* Temperature at which OS will shutdown */
++	gnvs->tcrt = 100;
++	/* Temperature at which OS will throttle CPU */
++	gnvs->tpsv = 90;
++}
+diff --git a/src/mainboard/dell/e5420/board_info.txt b/src/mainboard/dell/e5420/board_info.txt
+new file mode 100644
+index 0000000000..34d5ad9e0b
+--- /dev/null
++++ b/src/mainboard/dell/e5420/board_info.txt
+@@ -0,0 +1,6 @@
++Category: laptop
++ROM package: SOIC-8
++ROM protocol: SPI
++ROM socketed: n
++Flashrom support: y
++Release year: 2011
+diff --git a/src/mainboard/dell/e5420/cmos.default b/src/mainboard/dell/e5420/cmos.default
+new file mode 100644
+index 0000000000..279415dfd1
+--- /dev/null
++++ b/src/mainboard/dell/e5420/cmos.default
+@@ -0,0 +1,9 @@
++boot_option=Fallback
++debug_level=Debug
++power_on_after_fail=Disable
++nmi=Enable
++bluetooth=Enable
++wwan=Enable
++wlan=Enable
++sata_mode=AHCI
++me_state=Disabled
+diff --git a/src/mainboard/dell/e5420/cmos.layout b/src/mainboard/dell/e5420/cmos.layout
+new file mode 100644
+index 0000000000..1aa7e77bce
+--- /dev/null
++++ b/src/mainboard/dell/e5420/cmos.layout
+@@ -0,0 +1,88 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++# -----------------------------------------------------------------
++entries
++
++# -----------------------------------------------------------------
++0	120	r	0	reserved_memory
++
++# -----------------------------------------------------------------
++# RTC_BOOT_BYTE (coreboot hardcoded)
++384	1	e	4	boot_option
++388	4	h	0	reboot_counter
++
++# -----------------------------------------------------------------
++# coreboot config options: console
++395	4	e	6	debug_level
++
++#400	8	r	0	reserved for century byte
++
++# coreboot config options: southbridge
++408	1	e	1	nmi
++409	2	e	7	power_on_after_fail
++411     1       e       9       sata_mode
++
++# coreboot config options: EC
++412	1	e	1	bluetooth
++413	1	e	1	wwan
++414	1	e	1	wlan
++
++# coreboot config options: ME
++424	1	e	14	me_state
++425	2	h	0	me_state_prev
++
++# coreboot config options: northbridge
++432	3	e	11	gfx_uma_size
++435	2	e	12	hybrid_graphics_mode
++440	8	h	0	volume
++
++# VBOOT
++448	128	r	0	vbnv
++
++# SandyBridge MRC Scrambler Seed values
++896	32	r	0	mrc_scrambler_seed
++928	32	r	0	mrc_scrambler_seed_s3
++960	16	r	0	mrc_scrambler_seed_chk
++
++# coreboot config options: check sums
++984	16	h	0	check_sum
++
++# -----------------------------------------------------------------
++
++enumerations
++
++#ID	value	text
++1	0	Disable
++1	1	Enable
++2	0	Enable
++2	1	Disable
++4	0	Fallback
++4	1	Normal
++6	0	Emergency
++6	1	Alert
++6	2	Critical
++6	3	Error
++6	4	Warning
++6	5	Notice
++6	6	Info
++6	7	Debug
++6	8	Spew
++7	0	Disable
++7	1	Enable
++7	2	Keep
++9	0	AHCI
++9	1	Compatible
++11	0	32M
++11	1	64M
++11	2	96M
++11	3	128M
++11	4	160M
++11	5	192M
++11	6	224M
++14	0	Normal
++14	1	Disabled
++
++# -----------------------------------------------------------------
++checksums
++
++checksum 392 447 984
+diff --git a/src/mainboard/dell/e5420/data.vbt b/src/mainboard/dell/e5420/data.vbt
+new file mode 100755
+index 0000000000000000000000000000000000000000..98b82fe6110fd295b5749041ec7f8c084ace5f57
+GIT binary patch
+literal 6144
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+z31FHG)7?qk5g>e?=ER{f^&}W<0k@mxff(?6+Stw+s6y%k1mM$cLk#^FWWI*9bE1GY
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+z$#$~YiXtY*GpHp#@FvHJ1UnBD*H%d+{_j24XE4nmBa*?5mOWiold28s3}>*}<HaeO
+z+1|-8g2)FCfkDZIdb-Ub);z0#;XEbPfGe?A72!{DAUg|$m+Z~(i@h9j4gtm611ni(
+z#u>ACcP}M4exU`*MKVwl5+t6JBpTkmm}xWflKUe~7}`!#%z#gAo{NxUrpDAndYktu
+zI0}VLU`J7^xmF1AFiz5S^uzp*DPI$%$qq!(ikh0kP+(GKzF|@N?Y%_#Vp@M+xHr$F
+z=%+18z`-fT%z)9-TS$~Dh@2yeN7!UIt0h`fWxUu`JvA_ra*8P48l%7KR0&c1;0R75
+z4f0oz(xQ3MWqz5>qW5M4tZWExHs8<H(e1G@4km@5wEzOOP^x<l`YmA|eKs6j3wl8B
+z%C%;uygh%<#kGZ{fymL+OlV0!-*T!V5IB>X@p!@CBU=7e{5^Jl{s7by`po-AJqM2l
+znk(=^0bHkF0rUw7)^7j;$=_UIs8`6P6b-;vPDZ#U9L)W1_PAYRDP9k~;5$stt5ZiV
+zD0>;i-?OlYY2}P9WVnfGos4xee2r=EGWHR}ADH$VV>cO=xU?!4TjIi)OMBYI_PX#b
+zm-eBHed5BOT-x6*W>;{IqAga~G6lCQT93k>Q}CpsomJR*1%FjEkv?fuT%c-8RklXO
+zU8;6KWk*zeU)4TW+1D!mrE0EhHZfbBeN{4S7X@Pig%};A99QTdA~wZruL*8y?K!jP
+zG5R*k=);S}Zn<T;W!Mxt`(!+z7_r@3LVpf|FESauM&4}+wqzXfba-zG>A}on(uzNF
+zyu>BcjA})C@bg%<;+Eh2;Sz4heFFCbZ@C{FrXMIbYzu>?Bi-|vZ}JSFU%JA>7$7et
+z0Yo%CnOVZm#ZA}4kWZOn15};h5*#OM3b+6vHzgruMP>=5MNJK1y42{YgveP-!j%#(
+z0rGe@8t%!=66Ti%K4|Gx=o7gFp83wQ;+s3H7+r^SKlpp3KKcr!3@|n;NCH_=qL=3T
+zq3WH?en`b+W-HR-fnrhw*9aZ%M}lHX7@H?E>!6wv_&YQFEHdA$%Z1R--yub>=c@p?
+z6@7Fc$&>sAxwiz{BE$1kb$K9Co=ozlA973y^i(^BM|EZ$$^y`0KyHiMJ%O*XbfEX1
+ziZaH>W(1pWL0bo|T!x__N$^$DpmxI=bL6WUK3JGyn?rw-qC4ZA$yGjIB}N(=ldD2O
+zAJ@bxp<qR-3lIv<!P~SE8r*#_Ckl?$0|1fZ>2>n}u*mUIYFd>}O_wuwBD^r9<#=!0
+X1LGbT_rSOZ#yv3ZfpHH!G!Og(1Xg~J
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/e5420/devicetree.cb b/src/mainboard/dell/e5420/devicetree.cb
+new file mode 100644
+index 0000000000..f26413557d
+--- /dev/null
++++ b/src/mainboard/dell/e5420/devicetree.cb
+@@ -0,0 +1,66 @@
++chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
++	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
++	register "gpu_cpu_backlight" = "0x00000c31"
++	register "gpu_dp_b_hotplug" = "4"
++	register "gpu_dp_c_hotplug" = "4"
++	register "gpu_dp_d_hotplug" = "4"
++	register "gpu_panel_port_select" = "0"
++	register "gpu_panel_power_backlight_off_delay" = "2300"
++	register "gpu_panel_power_backlight_on_delay" = "2300"
++	register "gpu_panel_power_cycle_delay" = "6"
++	register "gpu_panel_power_down_delay" = "400"
++	register "gpu_panel_power_up_delay" = "400"
++	register "gpu_pch_backlight" = "0x13121312"
++
++	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
++
++	device domain 0x0 on
++		subsystemid 0x1028 0x049b inherit
++
++		device ref host_bridge on end # Host bridge
++		device ref peg10 on end # PEG
++		device ref igd on end # iGPU
++
++		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
++			register "docking_supported" = "1"
++			register "gen1_dec" = "0x007c0681"
++			register "gen2_dec" = "0x007c0901"
++			register "gen3_dec" = "0x003c07e1"
++			register "gen4_dec" = "0x001c0901"
++			register "gpi0_routing" = "2"
++			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 1, 0 }"
++			register "pcie_port_coalesce" = "1"
++			register "sata_interface_speed_support" = "0x3"
++			register "sata_port_map" = "0x3b"
++			register "spi_lvscc" = "0x2005"
++			register "spi_uvscc" = "0x2005"
++
++			device ref mei1		off end
++			device ref mei2		off end
++			device ref me_ide_r	off end
++			device ref me_kt	off end
++			device ref gbe		off end
++			device ref ehci2	on end
++			device ref hda		on end
++			device ref pcie_rp1	on end
++			device ref pcie_rp2	on end
++			device ref pcie_rp3	on end
++			device ref pcie_rp4	off end
++			device ref pcie_rp5	on end
++			device ref pcie_rp6	on end
++			device ref pcie_rp7	on end
++			device ref pcie_rp8	off end
++			device ref ehci1	on end
++			device ref pci_bridge	off end
++			device ref lpc		on
++				chip ec/dell/mec5035
++					device pnp ff.0 on end
++				end
++			end
++			device ref sata1 on end
++			device ref smbus on end
++			device ref sata2 off end
++			device ref thermal off end
++		end
++	end
++end
+diff --git a/src/mainboard/dell/e5420/dsdt.asl b/src/mainboard/dell/e5420/dsdt.asl
+new file mode 100644
+index 0000000000..7d13c55b08
+--- /dev/null
++++ b/src/mainboard/dell/e5420/dsdt.asl
+@@ -0,0 +1,30 @@
++#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
++#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++
++#include <acpi/acpi.h>
++
++DefinitionBlock(
++	"dsdt.aml",
++	"DSDT",
++	ACPI_DSDT_REV_2,
++	OEM_ID,
++	ACPI_TABLE_CREATOR,
++	0x20141018	/* OEM revision */
++)
++{
++	#include <acpi/dsdt_top.asl>
++	#include "acpi/platform.asl"
++	#include <cpu/intel/common/acpi/cpu.asl>
++	#include <southbridge/intel/common/acpi/platform.asl>
++	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
++	#include <southbridge/intel/common/acpi/sleepstates.asl>
++
++	Device (\_SB.PCI0)
++	{
++		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
++		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
++		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
++	}
++}
+diff --git a/src/mainboard/dell/e5420/early_init.c b/src/mainboard/dell/e5420/early_init.c
+new file mode 100644
+index 0000000000..7297921546
+--- /dev/null
++++ b/src/mainboard/dell/e5420/early_init.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++const struct southbridge_usb_port mainboard_usb_ports[] = {
++	{ 1, 1, 0 },
++	{ 1, 1, 0 },
++	{ 1, 1, 1 },
++	{ 1, 1, 1 },
++	{ 1, 1, 2 },
++	{ 1, 1, 2 },
++	{ 1, 1, 3 },
++	{ 1, 1, 3 },
++	{ 1, 1, 5 },
++	{ 1, 1, 5 },
++	{ 1, 1, 7 },
++	{ 1, 1, 6 },
++	{ 1, 1, 6 },
++	{ 1, 1, 7 },
++};
++
++void bootblock_mainboard_early_init(void)
++{
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++			| COMB_LPC_EN | COMA_LPC_EN);
++	mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/e5420/gma-mainboard.ads b/src/mainboard/dell/e5420/gma-mainboard.ads
+new file mode 100644
+index 0000000000..2a16f44360
+--- /dev/null
++++ b/src/mainboard/dell/e5420/gma-mainboard.ads
+@@ -0,0 +1,20 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (
++      HDMI1, -- mainboard HDMI
++      DP2, -- dock DP
++      DP3, -- dock DP
++      Analog, -- mainboard VGA
++      LVDS,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/dell/e5420/gpio.c b/src/mainboard/dell/e5420/gpio.c
+new file mode 100644
+index 0000000000..f76b93d9f0
+--- /dev/null
++++ b/src/mainboard/dell/e5420/gpio.c
+@@ -0,0 +1,195 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_NATIVE,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_GPIO,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_GPIO,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_NATIVE,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_GPIO,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio3 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio12 = GPIO_DIR_OUTPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_INPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++	.gpio30 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio12 = GPIO_LEVEL_HIGH,
++	.gpio30 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio8 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_NATIVE,
++	.gpio46 = GPIO_MODE_GPIO,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_NATIVE,
++	.gpio50 = GPIO_MODE_GPIO,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_GPIO,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_GPIO,
++	.gpio56 = GPIO_MODE_GPIO,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_OUTPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_OUTPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio46 = GPIO_DIR_OUTPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio50 = GPIO_DIR_OUTPUT,
++	.gpio51 = GPIO_DIR_OUTPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio53 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio55 = GPIO_DIR_OUTPUT,
++	.gpio56 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio34 = GPIO_LEVEL_LOW,
++	.gpio37 = GPIO_LEVEL_LOW,
++	.gpio46 = GPIO_LEVEL_HIGH,
++	.gpio50 = GPIO_LEVEL_HIGH,
++	.gpio51 = GPIO_LEVEL_LOW,
++	.gpio55 = GPIO_LEVEL_LOW,
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_NATIVE,
++	.gpio69 = GPIO_MODE_NATIVE,
++	.gpio70 = GPIO_MODE_NATIVE,
++	.gpio71 = GPIO_MODE_NATIVE,
++	.gpio72 = GPIO_MODE_NATIVE,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_GPIO,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio74 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/e5420/hda_verb.c b/src/mainboard/dell/e5420/hda_verb.c
+new file mode 100644
+index 0000000000..70e7c2e79a
+--- /dev/null
++++ b/src/mainboard/dell/e5420/hda_verb.c
+@@ -0,0 +1,33 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
++	0x1028049b,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x1028049b),
++	AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++	AZALIA_PIN_CFG(0, 0x11, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0xd5a30130),
++
++	0x80862805,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/e5420/mainboard.c b/src/mainboard/dell/e5420/mainboard.c
+new file mode 100644
+index 0000000000..31e49802fc
+--- /dev/null
++++ b/src/mainboard/dell/e5420/mainboard.c
+@@ -0,0 +1,21 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/device.h>
++#include <drivers/intel/gma/int15.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++#include <ec/acpi/ec.h>
++#include <console/console.h>
++#include <pc80/keyboard.h>
++
++static void mainboard_enable(struct device *dev)
++{
++
++	/* FIXME: fix these values. */
++	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
++					GMA_INT15_PANEL_FIT_DEFAULT,
++					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
++}
++
++struct chip_operations mainboard_ops = {
++	.enable_dev = mainboard_enable,
++};
+-- 
+2.44.0
+
diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
index 1925ed68..ea4cfb53 100644
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
@@ -135,6 +135,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
index ffca5b39..c52eae4c 100644
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
@@ -133,6 +133,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
index ada13b04..26202d3a 100644
--- a/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
@@ -135,6 +135,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
index d6279c26..0cceca51 100644
--- a/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
@@ -133,6 +133,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..9abe57a3
--- /dev/null
+++ b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
@@ -0,0 +1,620 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E5420"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/e5420"
+CONFIG_VGA_BIOS_ID="8086,0116"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x5ea000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_BOARD_DELL_LATITUDE_E5420=y
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5420"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=6144
+CONFIG_ROM_SIZE=0x00600000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..5606a017
--- /dev/null
+++ b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
@@ -0,0 +1,617 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E5420"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/e5420"
+CONFIG_VGA_BIOS_ID="8086,0116"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x5ea000
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_BOARD_DELL_LATITUDE_E5420=y
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5420"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=6144
+CONFIG_ROM_SIZE=0x00600000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
new file mode 100644
index 00000000..1cf0792e
--- /dev/null
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -0,0 +1,11 @@
+tree="default"
+romtype="normal"
+arch="x86_64"
+payload_grub="n"
+payload_grub_withseabios="n"
+payload_seabios="y"
+payload_memtest="y"
+payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
+grub_scan_disk="ahci"
+microcode_required="n"
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
index 5276c108..e57da732 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 CONFIG_BOARD_DELL_LATITUDE_E5520=y
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
index 29148416..b9c2cd0a 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 CONFIG_BOARD_DELL_LATITUDE_E5520=y
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
index a93401db..7f4cdc8b 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 CONFIG_BOARD_DELL_LATITUDE_E5530=y
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
index e42a9972..4e1303a4 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 CONFIG_BOARD_DELL_LATITUDE_E5530=y
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
index d3cc4360..5bdd1843 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
index 5766398d..b7aafbaa 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index b7a11ae9..7d1fd1ed 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index 694f1eab..fe8d8105 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
index 28214b76..7b3385ff 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
index 31c9df68..c5195de0 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index 6344db92..3824cd7e 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index 59f22da1..7bcc0d08 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index b88ef084..3128736d 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -135,6 +135,7 @@ CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
diff --git a/config/vendor/sources b/config/vendor/sources
index f60ad862..b87953e8 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -156,7 +156,7 @@
 	E6400_VGA_romname mod_21.bin
 }
 
-{e5520 e6420 e6520}{
+{e5420 e5520 e6420 e6520}{
 	DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
 	DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
 	DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe

From 98caceb1ce7893e725a3d5d9ef9b9d6b45f91250 Mon Sep 17 00:00:00 2001
From: Leo Heitmann Ruiz <eo@noreply.codeberg.org>
Date: Tue, 5 Mar 2024 20:33:17 +0000
Subject: [PATCH 0235/1549] Use proper autolink

---
 README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.md b/README.md
index df1945ca..7f73a3e2 100644
--- a/README.md
+++ b/README.md
@@ -111,7 +111,7 @@ written in Markdown and hosted in a [separate
 repository](https://codeberg.org/libreboot/lbwww) where you can send patches.
 
 Any and all development discussion and user support are all done on the IRC
-channel. More information is on https://libreboot.org/contact.html.
+channel. More information is on <https://libreboot.org/contact.html>.
 
 LICENSE FOR THIS README
 =======================

From e119ffa54d32bba49ab16db565680a0e386cdeb6 Mon Sep 17 00:00:00 2001
From: linear cannon <dev@linear.network>
Date: Sat, 16 Mar 2024 01:33:10 -0400
Subject: [PATCH 0236/1549] dell-flash-unlock: add NetBSD support

---
 util/dell-flash-unlock/Makefile    |  3 +++
 util/dell-flash-unlock/README.md   |  4 ++--
 util/dell-flash-unlock/accessors.c | 32 +++++++++++++++++++++++++++---
 3 files changed, 34 insertions(+), 5 deletions(-)

diff --git a/util/dell-flash-unlock/Makefile b/util/dell-flash-unlock/Makefile
index fae52dea..aee07167 100644
--- a/util/dell-flash-unlock/Makefile
+++ b/util/dell-flash-unlock/Makefile
@@ -6,6 +6,9 @@ CFLAGS=-Wall -Wextra -Werror -O2 -pedantic
 ifeq ($(shell uname), OpenBSD)
 	CFLAGS += -l$(shell uname -p)
 endif
+ifeq ($(shell uname), NetBSD)
+	CFLAGS += -l$(shell uname -p)
+endif
 SRCS=dell_flash_unlock.c accessors.c
 
 all: $(SRCS) accessors.h
diff --git a/util/dell-flash-unlock/README.md b/util/dell-flash-unlock/README.md
index 9c7d292c..aca01743 100644
--- a/util/dell-flash-unlock/README.md
+++ b/util/dell-flash-unlock/README.md
@@ -20,8 +20,8 @@ around 2008 (E6400 era).
   If it says it is not set, then you will need to install or compile a kernel
   with that option set.
 
-### OpenBSD
-- On OpenBSD, ensure you are booting with securelevel set to -1.
+### OpenBSD/NetBSD
+- On OpenBSD/NetBSD, ensure you are booting with securelevel set to -1.
 
 ### General
 Make sure an AC adapter is plugged into your system
diff --git a/util/dell-flash-unlock/accessors.c b/util/dell-flash-unlock/accessors.c
index 6fca2817..a35f8139 100644
--- a/util/dell-flash-unlock/accessors.c
+++ b/util/dell-flash-unlock/accessors.c
@@ -5,15 +5,15 @@
 #include <sys/io.h>
 #endif
 
-#if defined(__OpenBSD__)
-#include <machine/sysarch.h>
+#if defined(__OpenBSD__) || defined(__NetBSD__)
 #include <sys/types.h>
+#include <machine/sysarch.h>
 #if defined(__amd64__)
 #include <amd64/pio.h>
 #elif defined(__i386__)
 #include <i386/pio.h>
 #endif /* __i386__ */
-#endif /* __OpenBSD__ */
+#endif /* __OpenBSD__ || __NetBSD__ */
 
 #include <errno.h>
 
@@ -42,6 +42,9 @@ sys_outb(unsigned int port, uint8_t data)
 	#if defined(__OpenBSD__)
 	outb(port, data);
 	#endif
+	#if defined(__NetBSD__)
+	__asm__ volatile ( "outb %b0, %w1" : : "a"(data), "d"(port) : "memory");
+	#endif
 }
 
 void
@@ -53,6 +56,9 @@ sys_outl(unsigned int port, uint32_t data)
 	#if defined(__OpenBSD__)
 	outl(port, data);
 	#endif
+	#if defined(__NetBSD__)
+	__asm__ volatile ( "outl %0, %w1" : : "a"(data), "d"(port) : "memory");
+	#endif
 }
 
 uint8_t
@@ -61,6 +67,12 @@ sys_inb(unsigned int port)
 	#if defined(__linux__) || defined (__OpenBSD__)
 	return inb(port);
 	#endif
+
+	#if defined(__NetBSD__)
+	uint8_t retval;
+	__asm__ volatile("inb %w1, %b0" : "=a" (retval) : "d" (port) : "memory");
+	return retval;
+	#endif
 	return 0;
 }
 
@@ -70,6 +82,11 @@ sys_inl(unsigned int port)
 	#if defined(__linux__) || defined (__OpenBSD__)
 	return inl(port);
 	#endif
+	#if defined(__NetBSD__)
+	int retval;
+	__asm__ volatile("inl %w1, %0" : "=a" (retval) : "d" (port) : "memory");
+	return retval;
+	#endif
 	return 0;
 }
 
@@ -86,6 +103,15 @@ sys_iopl(int level)
 	return amd64_iopl(level);
 #endif /* __amd64__ */
 #endif /* __OpenBSD__ */
+
+#if defined(__NetBSD__)
+#if defined(__i386__)
+	return i386_iopl(level);
+#elif defined(__amd64__)
+	return x86_64_iopl(level);
+#endif /* __amd64__ */
+#endif /* __NetBSD__ */
+
 	errno = ENOSYS;
 	return -1;
 }

From 8cba237086dfbb312a5913bb75eef4f6046aeae5 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Mon, 18 Mar 2024 10:45:05 -0600
Subject: [PATCH 0237/1549] util: Import autoport with Haswell patches

This is a copy of coreboot's autoport utility, with a patch applied to
support Haswell/Lynx Point platforms. That patch is currently in review
on coreboot's Gerrit.

https://review.coreboot.org/c/coreboot/+/30890

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 util/autoport/azalia.go            |  67 +++
 util/autoport/bd82x6x.go           | 337 +++++++++++
 util/autoport/description.md       |   1 +
 util/autoport/ec_fixme.go          |  91 +++
 util/autoport/ec_lenovo.go         | 245 ++++++++
 util/autoport/ec_none.go           |  24 +
 util/autoport/go.mod               |   1 +
 util/autoport/gpio_common.go       | 113 ++++
 util/autoport/haswell.go           | 139 +++++
 util/autoport/log_maker.go         | 190 ++++++
 util/autoport/log_reader.go        | 417 +++++++++++++
 util/autoport/lynxpoint.go         | 490 +++++++++++++++
 util/autoport/lynxpoint_lp_gpio.go | 252 ++++++++
 util/autoport/main.go              | 915 +++++++++++++++++++++++++++++
 util/autoport/rce823.go            |  39 ++
 util/autoport/readme.md            | 457 ++++++++++++++
 util/autoport/root.go              |  47 ++
 util/autoport/sandybridge.go       |  93 +++
 18 files changed, 3918 insertions(+)
 create mode 100644 util/autoport/azalia.go
 create mode 100644 util/autoport/bd82x6x.go
 create mode 100644 util/autoport/description.md
 create mode 100644 util/autoport/ec_fixme.go
 create mode 100644 util/autoport/ec_lenovo.go
 create mode 100644 util/autoport/ec_none.go
 create mode 100644 util/autoport/go.mod
 create mode 100644 util/autoport/gpio_common.go
 create mode 100644 util/autoport/haswell.go
 create mode 100644 util/autoport/log_maker.go
 create mode 100644 util/autoport/log_reader.go
 create mode 100644 util/autoport/lynxpoint.go
 create mode 100644 util/autoport/lynxpoint_lp_gpio.go
 create mode 100644 util/autoport/main.go
 create mode 100644 util/autoport/rce823.go
 create mode 100644 util/autoport/readme.md
 create mode 100644 util/autoport/root.go
 create mode 100644 util/autoport/sandybridge.go

diff --git a/util/autoport/azalia.go b/util/autoport/azalia.go
new file mode 100644
index 00000000..6dd78b1e
--- /dev/null
+++ b/util/autoport/azalia.go
@@ -0,0 +1,67 @@
+package main
+
+import (
+	"fmt"
+	"sort"
+)
+
+type azalia struct {
+}
+
+func (i azalia) Scan(ctx Context, addr PCIDevData) {
+	az := Create(ctx, "hda_verb.c")
+	defer az.Close()
+
+	Add_gpl(az)
+	az.WriteString(
+		`#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+`)
+
+	for _, codec := range ctx.InfoSource.GetAzaliaCodecs() {
+		fmt.Fprintf(az, "\t0x%08x,\t/* Codec Vendor / Device ID: %s */\n",
+			codec.VendorID, codec.Name)
+		fmt.Fprintf(az, "\t0x%08x,\t/* Subsystem ID */\n",
+			codec.SubsystemID)
+		fmt.Fprintf(az, "\t%d,\t\t/* Number of 4 dword sets */\n",
+			len(codec.PinConfig)+1)
+		fmt.Fprintf(az, "\tAZALIA_SUBVENDOR(%d, 0x%08x),\n",
+			codec.CodecNo, codec.SubsystemID)
+
+		keys := []int{}
+		for nid, _ := range codec.PinConfig {
+			keys = append(keys, nid)
+		}
+
+		sort.Ints(keys)
+
+		for _, nid := range keys {
+			fmt.Fprintf(az, "\tAZALIA_PIN_CFG(%d, 0x%02x, 0x%08x),\n",
+				codec.CodecNo, nid, codec.PinConfig[nid])
+		}
+		az.WriteString("\n");
+	}
+
+	az.WriteString(
+		`};
+
+const u32 pc_beep_verbs[0] = {};
+
+AZALIA_ARRAY_SIZES;
+`)
+
+	PutPCIDev(addr, "")
+}
+
+func init() {
+	/* I82801GX/I945 */
+	RegisterPCI(0x8086, 0x27d8, azalia{})
+	/* BD82X6X/sandybridge */
+	RegisterPCI(0x8086, 0x1c20, azalia{})
+	/* C216/ivybridge */
+	RegisterPCI(0x8086, 0x1e20, azalia{})
+	/* Lynx Point */
+	RegisterPCI(0x8086, 0x8c20, azalia{})
+	RegisterPCI(0x8086, 0x9c20, azalia{})
+}
diff --git a/util/autoport/bd82x6x.go b/util/autoport/bd82x6x.go
new file mode 100644
index 00000000..8c418e30
--- /dev/null
+++ b/util/autoport/bd82x6x.go
@@ -0,0 +1,337 @@
+package main
+
+import "fmt"
+
+type bd82x6x struct {
+	variant string
+	node    *DevTreeNode
+}
+
+func IsPCIeHotplug(ctx Context, port int) bool {
+	portDev, ok := PCIMap[PCIAddr{Bus: 0, Dev: 0x1c, Func: port}]
+	if !ok {
+		return false
+	}
+	return (portDev.ConfigDump[0xdb] & (1 << 6)) != 0
+}
+
+func ich9GetFlashSize(ctx Context) {
+	inteltool := ctx.InfoSource.GetInteltool()
+	switch (inteltool.RCBA[0x3410] >> 10) & 3 {
+	/* SPI. All boards I've seen with sandy/ivy use SPI.  */
+	case 3:
+		ROMProtocol = "SPI"
+		highflkb := uint32(0)
+		for reg := uint16(0); reg < 5; reg++ {
+			fl := (inteltool.RCBA[0x3854+4*reg] >> 16) & 0x1fff
+			flkb := (fl + 1) << 2
+			if flkb > highflkb {
+				highflkb = flkb
+			}
+		}
+		ROMSizeKB = int(highflkb)
+		/* Shared with ME. Flashrom is unable to handle it.  */
+		FlashROMSupport = "n"
+	}
+}
+
+func (b bd82x6x) GetGPIOHeader() string {
+	return "southbridge/intel/bd82x6x/pch.h"
+}
+
+func (b bd82x6x) EnableGPE(in int) {
+	b.node.Registers[fmt.Sprintf("gpi%d_routing", in)] = "2"
+}
+
+func (b bd82x6x) EncodeGPE(in int) int {
+	return in + 0x10
+}
+
+func (b bd82x6x) DecodeGPE(in int) int {
+	return in - 0x10
+}
+
+func (b bd82x6x) NeedRouteGPIOManually() {
+	b.node.Comment += ", FIXME: set gpiX_routing for EC support"
+}
+
+func (b bd82x6x) Scan(ctx Context, addr PCIDevData) {
+
+	SouthBridge = &b
+
+	inteltool := ctx.InfoSource.GetInteltool()
+	GPIO(ctx, inteltool)
+
+	KconfigBool["SOUTHBRIDGE_INTEL_"+b.variant] = true
+	KconfigBool["SERIRQ_CONTINUOUS_MODE"] = true
+	KconfigInt["USBDEBUG_HCD_INDEX"] = 2
+	KconfigComment["USBDEBUG_HCD_INDEX"] = "FIXME: check this"
+	dmi := ctx.InfoSource.GetDMI()
+	if dmi.Vendor == "LENOVO" {
+		KconfigInt["DRAM_RESET_GATE_GPIO"] = 10
+	} else {
+		KconfigInt["DRAM_RESET_GATE_GPIO"] = 60
+	}
+	KconfigComment["DRAM_RESET_GATE_GPIO"] = "FIXME: check this"
+
+	ich9GetFlashSize(ctx)
+
+	DSDTDefines = append(DSDTDefines,
+		DSDTDefine{
+			Key:   "BRIGHTNESS_UP",
+			Value: "\\_SB.PCI0.GFX0.INCB",
+		},
+		DSDTDefine{
+			Key:   "BRIGHTNESS_DOWN",
+			Value: "\\_SB.PCI0.GFX0.DECB",
+		})
+
+	/* SPI init */
+	MainboardIncludes = append(MainboardIncludes, "southbridge/intel/bd82x6x/pch.h")
+
+	FADT := ctx.InfoSource.GetACPI()["FACP"]
+
+	pcieHotplugMap := "{ "
+
+	for port := 0; port < 7; port++ {
+		if IsPCIeHotplug(ctx, port) {
+			pcieHotplugMap += "1, "
+		} else {
+			pcieHotplugMap += "0, "
+		}
+	}
+
+	if IsPCIeHotplug(ctx, 7) {
+		pcieHotplugMap += "1 }"
+	} else {
+		pcieHotplugMap += "0 }"
+	}
+
+	cur := DevTreeNode{
+		Chip:    "southbridge/intel/bd82x6x",
+		Comment: "Intel Series 6 Cougar Point PCH",
+
+		Registers: map[string]string{
+			"sata_interface_speed_support": "0x3",
+			"gen1_dec":                     FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x84:0x88]),
+			"gen2_dec":                     FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x88:0x8c]),
+			"gen3_dec":                     FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x8c:0x90]),
+			"gen4_dec":                     FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x90:0x94]),
+			"pcie_port_coalesce":           "1",
+			"pcie_hotplug_map":             pcieHotplugMap,
+
+			"sata_port_map": fmt.Sprintf("0x%x", PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 2}].ConfigDump[0x92]&0x3f),
+
+			"docking_supported": (FormatBool((FADT[113] & (1 << 1)) != 0)),
+			"spi_uvscc":         fmt.Sprintf("0x%x", inteltool.RCBA[0x38c8]),
+			"spi_lvscc":         fmt.Sprintf("0x%x", inteltool.RCBA[0x38c4]&^(1<<23)),
+		},
+		PCISlots: []PCISlot{
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x14, Func: 0}, writeEmpty: false, alias: "xhci", additionalComment: "USB 3.0 Controller"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 0}, writeEmpty: true, alias: "mei1", additionalComment: "Management Engine Interface 1"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 1}, writeEmpty: true, alias: "mei2", additionalComment: "Management Engine Interface 2"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 2}, writeEmpty: true, alias: "me_ide_r", additionalComment: "Management Engine IDE-R"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 3}, writeEmpty: true, alias: "me_kt", additionalComment: "Management Engine KT"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x19, Func: 0}, writeEmpty: true, alias: "gbe", additionalComment: "Intel Gigabit Ethernet"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1a, Func: 0}, writeEmpty: true, alias: "ehci2", additionalComment: "USB2 EHCI #2"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1b, Func: 0}, writeEmpty: true, alias: "hda", additionalComment: "High Definition Audio"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 0}, writeEmpty: true, alias: "pcie_rp1", additionalComment: "PCIe Port #1"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 1}, writeEmpty: true, alias: "pcie_rp2", additionalComment: "PCIe Port #2"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 2}, writeEmpty: true, alias: "pcie_rp3", additionalComment: "PCIe Port #3"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 3}, writeEmpty: true, alias: "pcie_rp4", additionalComment: "PCIe Port #4"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 4}, writeEmpty: true, alias: "pcie_rp5", additionalComment: "PCIe Port #5"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 5}, writeEmpty: true, alias: "pcie_rp6", additionalComment: "PCIe Port #6"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 6}, writeEmpty: true, alias: "pcie_rp7", additionalComment: "PCIe Port #7"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 7}, writeEmpty: true, alias: "pcie_rp8", additionalComment: "PCIe Port #8"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1d, Func: 0}, writeEmpty: true, alias: "ehci1", additionalComment: "USB2 EHCI #1"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1e, Func: 0}, writeEmpty: true, alias: "pci_bridge", additionalComment: "PCI bridge"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 0}, writeEmpty: true, alias: "lpc", additionalComment: "LPC bridge"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 2}, writeEmpty: true, alias: "sata1", additionalComment: "SATA Controller 1"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 3}, writeEmpty: true, alias: "smbus", additionalComment: "SMBus"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 5}, writeEmpty: true, alias: "sata2", additionalComment: "SATA Controller 2"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 6}, writeEmpty: true, alias: "thermal", additionalComment: "Thermal"},
+		},
+	}
+
+	b.node = &cur
+
+	xhciDev, ok := PCIMap[PCIAddr{Bus: 0, Dev: 0x14, Func: 0}]
+
+	if ok {
+		cur.Registers["xhci_switchable_ports"] = FormatHexLE32(xhciDev.ConfigDump[0xd4:0xd8])
+		cur.Registers["superspeed_capable_ports"] = FormatHexLE32(xhciDev.ConfigDump[0xdc:0xe0])
+		cur.Registers["xhci_overcurrent_mapping"] = FormatHexLE32(xhciDev.ConfigDump[0xc0:0xc4])
+	}
+
+	PutPCIChip(addr, cur)
+	PutPCIDevParent(addr, "", "lpc")
+
+	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
+		File: "southbridge/intel/common/acpi/platform.asl",
+	})
+	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
+		File: "southbridge/intel/bd82x6x/acpi/globalnvs.asl",
+	})
+	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
+		File: "southbridge/intel/common/acpi/sleepstates.asl",
+	})
+	DSDTPCI0Includes = append(DSDTPCI0Includes, DSDTInclude{
+		File: "southbridge/intel/bd82x6x/acpi/pch.asl",
+	})
+
+	AddBootBlockFile("early_init.c", "")
+	AddROMStageFile("early_init.c", "")
+
+	sb := Create(ctx, "early_init.c")
+	defer sb.Close()
+	Add_gpl(sb)
+
+	sb.WriteString(`
+#include <bootblock_common.h>
+#include <device/pci_ops.h>
+#include <northbridge/intel/sandybridge/raminit_native.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+
+`)
+	sb.WriteString("const struct southbridge_usb_port mainboard_usb_ports[] = {\n")
+
+	currentMap := map[uint32]int{
+		0x20000153: 0,
+		0x20000f57: 1,
+		0x2000055b: 2,
+		0x20000f51: 3,
+		0x2000094a: 4,
+		0x2000035f: 5,
+		0x20000f53: 6,
+		0x20000357: 7,
+		0x20000353: 8,
+	}
+
+	for port := uint(0); port < 14; port++ {
+		var pinmask uint32
+		OCPin := -1
+		if port < 8 {
+			pinmask = inteltool.RCBA[0x35a0]
+		} else {
+			pinmask = inteltool.RCBA[0x35a4]
+		}
+		for pin := uint(0); pin < 4; pin++ {
+			if ((pinmask >> ((port % 8) + 8*pin)) & 1) != 0 {
+				OCPin = int(pin)
+				if port >= 8 {
+					OCPin += 4
+				}
+			}
+		}
+		current, ok := currentMap[inteltool.RCBA[uint16(0x3500+4*port)]]
+		comment := ""
+		if !ok {
+			comment = fmt.Sprintf("// FIXME: Unknown current: RCBA(0x%x)=0x%x", 0x3500+4*port, uint16(0x3500+4*port))
+		}
+		fmt.Fprintf(sb, "\t{ %d, %d, %d }, %s\n",
+			((inteltool.RCBA[0x359c]>>port)&1)^1,
+			current,
+			OCPin,
+			comment)
+	}
+	sb.WriteString("};\n")
+
+	guessedMap := GuessSPDMap(ctx)
+
+	sb.WriteString(`
+void bootblock_mainboard_early_init(void)
+{
+`)
+	RestorePCI16Simple(sb, addr, 0x82)
+
+	RestorePCI16Simple(sb, addr, 0x80)
+
+	sb.WriteString(`}
+
+/* FIXME: Put proper SPD map here. */
+void mainboard_get_spd(spd_raw_data *spd, bool id_only)
+{
+`)
+	for i, spd := range guessedMap {
+		fmt.Fprintf(sb, "\tread_spd(&spd[%d], 0x%02x, id_only);\n", i, spd)
+	}
+	sb.WriteString("}\n")
+
+	gnvs := Create(ctx, "acpi_tables.c")
+	defer gnvs.Close()
+
+	Add_gpl(gnvs)
+	gnvs.WriteString(`#include <acpi/acpi_gnvs.h>
+#include <soc/nvs.h>
+
+/* FIXME: check this function.  */
+void mainboard_fill_gnvs(struct global_nvs *gnvs)
+{
+	/* The lid is open by default. */
+	gnvs->lids = 1;
+
+	/* Temperature at which OS will shutdown */
+	gnvs->tcrt = 100;
+	/* Temperature at which OS will throttle CPU */
+	gnvs->tpsv = 90;
+}
+`)
+}
+
+func init() {
+	/* BD82X6X LPC */
+	for id := 0x1c40; id <= 0x1c5f; id++ {
+		RegisterPCI(0x8086, uint16(id), bd82x6x{variant: "BD82X6X"})
+	}
+
+	/* C216 LPC */
+	for id := 0x1e41; id <= 0x1e5f; id++ {
+		RegisterPCI(0x8086, uint16(id), bd82x6x{variant: "C216"})
+	}
+
+	/* PCIe bridge */
+	for _, id := range []uint16{
+		0x1c10, 0x1c12, 0x1c14, 0x1c16,
+		0x1c18, 0x1c1a, 0x1c1c, 0x1c1e,
+		0x1e10, 0x1e12, 0x1e14, 0x1e16,
+		0x1e18, 0x1e1a, 0x1e1c, 0x1e1e,
+		0x1e25, 0x244e, 0x2448,
+	} {
+		RegisterPCI(0x8086, id, GenericPCI{})
+	}
+
+	/* SMBus controller  */
+	RegisterPCI(0x8086, 0x1c22, GenericPCI{MissingParent: "smbus"})
+	RegisterPCI(0x8086, 0x1e22, GenericPCI{MissingParent: "smbus"})
+
+	/* SATA */
+	for _, id := range []uint16{
+		0x1c00, 0x1c01, 0x1c02, 0x1c03,
+		0x1e00, 0x1e01, 0x1e02, 0x1e03,
+	} {
+		RegisterPCI(0x8086, id, GenericPCI{})
+	}
+
+	/* EHCI */
+	for _, id := range []uint16{
+		0x1c26, 0x1c2d, 0x1e26, 0x1e2d,
+	} {
+		RegisterPCI(0x8086, id, GenericPCI{})
+	}
+
+	/* XHCI */
+	RegisterPCI(0x8086, 0x1e31, GenericPCI{})
+
+	/* ME and children */
+	for _, id := range []uint16{
+		0x1c3a, 0x1c3b, 0x1c3c, 0x1c3d,
+		0x1e3a, 0x1e3b, 0x1e3c, 0x1e3d,
+	} {
+		RegisterPCI(0x8086, id, GenericPCI{})
+	}
+
+	/* Ethernet */
+	RegisterPCI(0x8086, 0x1502, GenericPCI{})
+	RegisterPCI(0x8086, 0x1503, GenericPCI{})
+
+}
diff --git a/util/autoport/description.md b/util/autoport/description.md
new file mode 100644
index 00000000..9a0e8d43
--- /dev/null
+++ b/util/autoport/description.md
@@ -0,0 +1 @@
+Automated porting coreboot to Sandy Bridge/Ivy Bridge platforms `Go`
diff --git a/util/autoport/ec_fixme.go b/util/autoport/ec_fixme.go
new file mode 100644
index 00000000..54f78ab4
--- /dev/null
+++ b/util/autoport/ec_fixme.go
@@ -0,0 +1,91 @@
+package main
+
+import "fmt"
+
+func FIXMEEC(ctx Context) {
+	ap := Create(ctx, "acpi/platform.asl")
+	defer ap.Close()
+
+	hasKeyboard := ctx.InfoSource.HasPS2()
+
+	sbGPE := GuessECGPE(ctx)
+	var GPEUnsure bool
+	if sbGPE < 0 {
+		sbGPE = SouthBridge.EncodeGPE(1)
+		GPEUnsure = true
+		SouthBridge.NeedRouteGPIOManually()
+	} else {
+		GPEUnsure = false
+		SouthBridge.EnableGPE(SouthBridge.DecodeGPE(sbGPE))
+	}
+
+	Add_gpl(ap)
+	ap.WriteString(
+		`Method(_WAK, 1)
+{
+	/* FIXME: EC support  */
+	Return(Package() {0, 0})
+}
+
+Method(_PTS,1)
+{
+	/* FIXME: EC support  */
+}
+`)
+
+	ecs := ctx.InfoSource.GetEC()
+	MainboardIncludes = append(MainboardIncludes, "ec/acpi/ec.h")
+	MainboardIncludes = append(MainboardIncludes, "console/console.h")
+
+	MainboardInit +=
+		`	/* FIXME: trim this down or remove if necessary */
+	{
+		int i;
+		const u8 dmp[256] = {`
+	for i := 0; i < 0x100; i++ {
+		if (i & 0xf) == 0 {
+			MainboardInit += fmt.Sprintf("\n\t\t\t/* %02x */ ", i)
+		}
+		MainboardInit += fmt.Sprintf("0x%02x,", ecs[i])
+		if (i & 0xf) != 0xf {
+			MainboardInit += " "
+		}
+	}
+	MainboardInit += "\n\t\t};\n"
+	MainboardInit += `
+		printk(BIOS_DEBUG, "Replaying EC dump ...");
+		for (i = 0; i < 256; i++)
+			ec_write (i, dmp[i]);
+		printk(BIOS_DEBUG, "done\n");
+	}
+`
+
+	KconfigBool["EC_ACPI"] = true
+	si := Create(ctx, "acpi/superio.asl")
+	defer si.Close()
+
+	if hasKeyboard {
+		Add_gpl(si)
+		si.WriteString("#include <drivers/pc80/pc/ps2_controller.asl>\n")
+		MainboardInit += fmt.Sprintf("\tpc_keyboard_init(NO_AUX_DEVICE);\n")
+		MainboardIncludes = append(MainboardIncludes, "pc80/keyboard.h")
+	}
+
+	ec := Create(ctx, "acpi/ec.asl")
+	defer ec.Close()
+
+	Add_gpl(ec)
+	ec.WriteString(`Device(EC)
+{
+	Name (_HID, EISAID("PNP0C09"))
+	Name (_UID, 0)
+`)
+	if GPEUnsure {
+		ec.WriteString("\t/* FIXME: Set GPE  */\n")
+		ec.WriteString("\t/* Name (_GPE, ?)  */\n")
+	} else {
+		fmt.Fprintf(ec, "\tName (_GPE, %d)\n", sbGPE)
+	}
+	ec.WriteString("/* FIXME: EC support */\n")
+	ec.WriteString("}\n")
+}
diff --git a/util/autoport/ec_lenovo.go b/util/autoport/ec_lenovo.go
new file mode 100644
index 00000000..a34960ff
--- /dev/null
+++ b/util/autoport/ec_lenovo.go
@@ -0,0 +1,245 @@
+package main
+
+import "fmt"
+
+func LenovoEC(ctx Context) {
+	ap := Create(ctx, "acpi/platform.asl")
+	defer ap.Close()
+
+	wakeGPE := 13
+
+	sbGPE := GuessECGPE(ctx)
+	var GPE int
+	var GPEUnsure bool
+	if sbGPE < 0 {
+		sbGPE = SouthBridge.EncodeGPE(1)
+		GPE = 1
+		GPEUnsure = true
+		SouthBridge.NeedRouteGPIOManually()
+	} else {
+		GPE = SouthBridge.DecodeGPE(sbGPE)
+		GPEUnsure = false
+	}
+
+	SouthBridge.EnableGPE(wakeGPE)
+	SouthBridge.EnableGPE(GPE)
+
+	GPEDefine := DSDTDefine{
+		Key: "THINKPAD_EC_GPE",
+	}
+
+	GPEDefine.Value = fmt.Sprintf("%d", sbGPE)
+	if GPEUnsure {
+		GPEDefine.Comment = "FIXME: Check this"
+	}
+
+	DSDTDefines = append(DSDTDefines,
+		DSDTDefine{
+			Key:   "EC_LENOVO_H8_ME_WORKAROUND",
+			Value: "1",
+		}, GPEDefine)
+
+	Add_gpl(ap)
+	ap.WriteString(
+		`Method(_WAK, 1)
+{
+	/* ME may not be up yet. */
+	Store(0, \_TZ.MEB1)
+	Store(0, \_TZ.MEB2)
+	Return(Package() {0, 0})
+}
+
+Method(_PTS,1)
+{
+	\_SB.PCI0.LPCB.EC.RADI(0)
+}
+`)
+
+	si := Create(ctx, "acpi/superio.asl")
+	defer si.Close()
+
+	Add_gpl(si)
+	si.WriteString("#include <drivers/pc80/pc/ps2_controller.asl>\n")
+
+	/* FIXME:XX Move this to ec/lenovo.  */
+	smi := Create(ctx, "smihandler.c")
+	defer smi.Close()
+
+	AddSMMFile("smihandler.c", "")
+
+	Add_gpl(smi)
+	smi.WriteString(
+		`#include <arch/io.h>
+#include <console/console.h>
+#include <cpu/x86/smm.h>
+#include <ec/acpi/ec.h>
+#include <ec/lenovo/h8/h8.h>
+#include <delay.h>
+#include <` + SouthBridge.GetGPIOHeader() + ">\n\n")
+
+	if GPEUnsure {
+		smi.WriteString("/* FIXME: check this */\n")
+	}
+	fmt.Fprintf(smi, "#define GPE_EC_SCI	%d\n", GPE)
+
+	smi.WriteString("/* FIXME: check this */\n")
+	fmt.Fprintf(smi, "#define GPE_EC_WAKE	%d\n", wakeGPE)
+
+	smi.WriteString(`
+static void mainboard_smi_handle_ec_sci(void)
+{
+	u8 status = inb(EC_SC);
+	u8 event;
+
+	if (!(status & EC_SCI_EVT))
+		return;
+
+	event = ec_query();
+	printk(BIOS_DEBUG, "EC event %#02x\n", event);
+}
+
+void mainboard_smi_gpi(u32 gpi_sts)
+{
+	if (gpi_sts & (1 << GPE_EC_SCI))
+		mainboard_smi_handle_ec_sci();
+}
+
+int mainboard_smi_apmc(u8 data)
+{
+	switch (data) {
+	case APM_CNT_ACPI_ENABLE:
+		/* use 0x1600/0x1604 to prevent races with userspace */
+		ec_set_ports(0x1604, 0x1600);
+		/* route EC_SCI to SCI */
+		gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI);
+		/* discard all events, and enable attention */
+		ec_write(0x80, 0x01);
+		break;
+	case APM_CNT_ACPI_DISABLE:
+		/* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
+		   provide a EC query function */
+		ec_set_ports(0x66, 0x62);
+		/* route EC_SCI to SMI */
+		gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI);
+		/* discard all events, and enable attention */
+		ec_write(0x80, 0x01);
+		break;
+	default:
+		break;
+	}
+	return 0;
+}
+
+void mainboard_smi_sleep(u8 slp_typ)
+{
+	if (slp_typ == 3) {
+		u8 ec_wake = ec_read(0x32);
+		/* If EC wake events are enabled, enable wake on EC WAKE GPE. */
+		if (ec_wake & 0x14) {
+			/* Redirect EC WAKE GPE to SCI. */
+			gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
+		}
+	}
+}
+`)
+
+	ec := Create(ctx, "acpi/ec.asl")
+	defer ec.Close()
+
+	Add_gpl(ec)
+	ec.WriteString("#include <ec/lenovo/h8/acpi/ec.asl>\n")
+
+	KconfigBool["EC_LENOVO_PMH7"] = true
+	KconfigBool["EC_LENOVO_H8"] = true
+
+	pmh := DevTreeNode{
+		Chip: "ec/lenovo/pmh7",
+		Registers: map[string]string{
+			"backlight_enable":  "true",
+			"dock_event_enable": "true",
+		},
+		Children: []DevTreeNode{
+			DevTreeNode{
+				Chip:    "pnp",
+				Comment: "dummy",
+				Dev:     0xff,
+				Func:    1,
+			},
+		},
+	}
+	PutChip("lpc", pmh)
+
+	ecs := ctx.InfoSource.GetEC()
+	h8 := DevTreeNode{
+		Chip: "ec/lenovo/h8",
+		Children: []DevTreeNode{
+			DevTreeNode{
+				Chip:    "pnp",
+				Comment: "dummy",
+				Dev:     0xff,
+				Func:    2,
+				IOs: map[uint16]uint16{
+					0x60: 0x62,
+					0x62: 0x66,
+					0x64: 0x1600,
+					0x66: 0x1604,
+				},
+			},
+		},
+		Comment: "FIXME: has_keyboard_backlight, has_power_management_beeps, has_uwb",
+		Registers: map[string]string{
+			"config0":   FormatHex8(ecs[0]),
+			"config1":   FormatHex8(ecs[1]),
+			"config2":   FormatHex8(ecs[2]),
+			"config3":   FormatHex8(ecs[3]),
+			"beepmask0": FormatHex8(ecs[4]),
+			"beepmask1": FormatHex8(ecs[5]),
+		},
+	}
+	for i := 0; i < 0x10; i++ {
+		if ecs[0x10+i] != 0 {
+			h8.Registers[fmt.Sprintf("event%x_enable", i)] = FormatHex8(ecs[0x10+i])
+		}
+	}
+	PutChip("lpc", h8)
+
+	eeprom := DevTreeNode{
+		Chip:    "drivers/i2c/at24rf08c",
+		Comment: "eeprom, 8 virtual devices, same chip",
+		Children: []DevTreeNode{
+			DevTreeNode{
+				Chip: "i2c",
+				Dev:  0x54,
+			},
+			DevTreeNode{
+				Chip: "i2c",
+				Dev:  0x55,
+			},
+			DevTreeNode{
+				Chip: "i2c",
+				Dev:  0x56,
+			},
+			DevTreeNode{
+				Chip: "i2c",
+				Dev:  0x57,
+			},
+			DevTreeNode{
+				Chip: "i2c",
+				Dev:  0x5c,
+			},
+			DevTreeNode{
+				Chip: "i2c",
+				Dev:  0x5d,
+			},
+			DevTreeNode{
+				Chip: "i2c",
+				Dev:  0x5e,
+			},
+			DevTreeNode{
+				Chip: "i2c",
+				Dev:  0x5f,
+			},
+		},
+	}
+	PutChip("smbus", eeprom)
+}
diff --git a/util/autoport/ec_none.go b/util/autoport/ec_none.go
new file mode 100644
index 00000000..bcb61bf0
--- /dev/null
+++ b/util/autoport/ec_none.go
@@ -0,0 +1,24 @@
+package main
+
+func NoEC(ctx Context) {
+	ap := Create(ctx, "acpi/platform.asl")
+	defer ap.Close()
+
+	Add_gpl(ap)
+	ap.WriteString(
+		`Method(_WAK, 1)
+{
+	Return(Package() {0, 0})
+}
+
+Method(_PTS, 1)
+{
+}
+`)
+
+	si := Create(ctx, "acpi/superio.asl")
+	defer si.Close()
+
+	ec := Create(ctx, "acpi/ec.asl")
+	defer ec.Close()
+}
diff --git a/util/autoport/go.mod b/util/autoport/go.mod
new file mode 100644
index 00000000..55a89cc9
--- /dev/null
+++ b/util/autoport/go.mod
@@ -0,0 +1 @@
+module autoport
diff --git a/util/autoport/gpio_common.go b/util/autoport/gpio_common.go
new file mode 100644
index 00000000..a869dce4
--- /dev/null
+++ b/util/autoport/gpio_common.go
@@ -0,0 +1,113 @@
+/* code to generate common GPIO code for Intel 6/7/8 Series Chipset */
+
+package main
+
+import (
+	"fmt"
+	"os"
+)
+
+func writeGPIOSet(ctx Context, sb *os.File,
+	val uint32, set uint, partno int, constraint uint32) {
+
+	max := uint(32)
+	if set == 3 {
+		max = 12
+	}
+
+	bits := [6][2]string{
+		{"GPIO_MODE_NATIVE", "GPIO_MODE_GPIO"},
+		{"GPIO_DIR_OUTPUT", "GPIO_DIR_INPUT"},
+		{"GPIO_LEVEL_LOW", "GPIO_LEVEL_HIGH"},
+		{"GPIO_RESET_PWROK", "GPIO_RESET_RSMRST"},
+		{"GPIO_NO_INVERT", "GPIO_INVERT"},
+		{"GPIO_NO_BLINK", "GPIO_BLINK"},
+	}
+
+	for i := uint(0); i < max; i++ {
+		if (constraint>>i)&1 == 1 {
+			fmt.Fprintf(sb, "	.gpio%d = %s,\n",
+				(set-1)*32+i,
+				bits[partno][(val>>i)&1])
+		}
+	}
+}
+
+func GPIO(ctx Context, inteltool InteltoolData) {
+	var constraint uint32
+	gpio := Create(ctx, "gpio.c")
+	defer gpio.Close()
+
+	AddBootBlockFile("gpio.c", "")
+	AddROMStageFile("gpio.c", "")
+
+	Add_gpl(gpio)
+	gpio.WriteString("#include <southbridge/intel/common/gpio.h>\n\n")
+
+	addresses := [3][6]int{
+		{0x00, 0x04, 0x0c, 0x60, 0x2c, 0x18},
+		{0x30, 0x34, 0x38, 0x64, -1, -1},
+		{0x40, 0x44, 0x48, 0x68, -1, -1},
+	}
+
+	for set := 1; set <= 3; set++ {
+		for partno, part := range []string{"mode", "direction", "level", "reset", "invert", "blink"} {
+			addr := addresses[set-1][partno]
+			if addr < 0 {
+				continue
+			}
+			fmt.Fprintf(gpio, "static const struct pch_gpio_set%d pch_gpio_set%d_%s = {\n",
+				set, set, part)
+
+			constraint = 0xffffffff
+			switch part {
+			case "direction":
+				/* Ignored on native mode */
+				constraint = inteltool.GPIO[uint16(addresses[set-1][0])]
+			case "level":
+				/* Level doesn't matter for input */
+				constraint = inteltool.GPIO[uint16(addresses[set-1][0])]
+				constraint &^= inteltool.GPIO[uint16(addresses[set-1][1])]
+			case "reset":
+				/* Only show reset */
+				constraint = inteltool.GPIO[uint16(addresses[set-1][3])]
+			case "invert":
+				/* Only on input and only show inverted GPIO */
+				constraint = inteltool.GPIO[uint16(addresses[set-1][0])]
+				constraint &= inteltool.GPIO[uint16(addresses[set-1][1])]
+				constraint &= inteltool.GPIO[uint16(addresses[set-1][4])]
+			case "blink":
+				/* Only on output and only show blinking GPIO */
+				constraint = inteltool.GPIO[uint16(addresses[set-1][0])]
+				constraint &^= inteltool.GPIO[uint16(addresses[set-1][1])]
+				constraint &= inteltool.GPIO[uint16(addresses[set-1][5])]
+			}
+			writeGPIOSet(ctx, gpio, inteltool.GPIO[uint16(addr)], uint(set), partno, constraint)
+			gpio.WriteString("};\n\n")
+		}
+	}
+
+	gpio.WriteString(`const struct pch_gpio_map mainboard_gpio_map = {
+	.set1 = {
+		.mode		= &pch_gpio_set1_mode,
+		.direction	= &pch_gpio_set1_direction,
+		.level		= &pch_gpio_set1_level,
+		.blink		= &pch_gpio_set1_blink,
+		.invert		= &pch_gpio_set1_invert,
+		.reset		= &pch_gpio_set1_reset,
+	},
+	.set2 = {
+		.mode		= &pch_gpio_set2_mode,
+		.direction	= &pch_gpio_set2_direction,
+		.level		= &pch_gpio_set2_level,
+		.reset		= &pch_gpio_set2_reset,
+	},
+	.set3 = {
+		.mode		= &pch_gpio_set3_mode,
+		.direction	= &pch_gpio_set3_direction,
+		.level		= &pch_gpio_set3_level,
+		.reset		= &pch_gpio_set3_reset,
+	},
+};
+`)
+}
diff --git a/util/autoport/haswell.go b/util/autoport/haswell.go
new file mode 100644
index 00000000..645b197a
--- /dev/null
+++ b/util/autoport/haswell.go
@@ -0,0 +1,139 @@
+package main
+
+import "fmt"
+
+type haswellmc struct {
+	variant string
+}
+
+func divceil(a uint32, b uint32) uint32 {
+	return (a + b - 1) / b
+}
+
+func getPanelCfg(inteltool InteltoolData, isULT bool) string {
+	var refclk uint32
+	var pwm_hz uint32
+
+	if isULT {
+		refclk = 24000000
+	} else {
+		refclk = 135000000
+	}
+	if (inteltool.IGD[0xc8254] >> 16) != 0 {
+		pwm_hz = refclk / 128 / (inteltool.IGD[0xc8254] >> 16)
+	} else {
+		pwm_hz = 0
+	}
+
+	gpu_panel_power_up_delay := (inteltool.IGD[0xc7208] >> 16) & 0x1fff
+	gpu_panel_power_backlight_on_delay := inteltool.IGD[0xc7208] & 0x1fff
+	gpu_panel_power_down_delay := (inteltool.IGD[0xc720c] >> 16) & 0x1fff
+	gpu_panel_power_backlight_off_delay := inteltool.IGD[0xc720c] & 0x1fff
+	gpu_panel_power_cycle_delay := inteltool.IGD[0xc7210] & 0x1f
+
+	return fmt.Sprintf(`{
+		.up_delay_ms		= %3d,
+		.down_delay_ms		= %3d,
+		.cycle_delay_ms		= %3d,
+		.backlight_on_delay_ms	= %3d,
+		.backlight_off_delay_ms	= %3d,
+		.backlight_pwm_hz	= %3d,
+	}`,
+		divceil(gpu_panel_power_up_delay, 10),
+		divceil(gpu_panel_power_down_delay, 10),
+		(gpu_panel_power_cycle_delay-1)*100,
+		divceil(gpu_panel_power_backlight_on_delay, 10),
+		divceil(gpu_panel_power_backlight_off_delay, 10),
+		pwm_hz)
+}
+
+func (i haswellmc) Scan(ctx Context, addr PCIDevData) {
+	inteltool := ctx.InfoSource.GetInteltool()
+
+	isULT := (i.variant == "ULT")
+	DevTree = DevTreeNode{
+		Chip:          "northbridge/intel/haswell",
+		MissingParent: "northbridge",
+		Comment:       "FIXME: check ec_present, usb_xhci_on_resume, gfx",
+		Registers: map[string]string{
+			"gpu_dp_b_hotplug":    FormatInt32((inteltool.IGD[0xc4030] >> 2) & 7),
+			"gpu_dp_c_hotplug":    FormatInt32((inteltool.IGD[0xc4030] >> 10) & 7),
+			"gpu_dp_d_hotplug":    FormatInt32((inteltool.IGD[0xc4030] >> 18) & 7),
+			"panel_cfg":           getPanelCfg(inteltool, isULT),
+			"gpu_ddi_e_connected": FormatBool(((inteltool.IGD[0x64000] >> 4) & 1) == 0),
+			"ec_present":          "false",
+			"usb_xhci_on_resume":  "false",
+			/* FIXME:XX hardcoded.  */
+			"gfx": "GMA_STATIC_DISPLAYS(0)",
+		},
+		Children: []DevTreeNode{
+			{
+				Chip: "cpu/intel/haswell",
+				Children: []DevTreeNode{
+					{
+						Chip: "cpu_cluster",
+						Dev:  0,
+						Ops:  "haswell_cpu_bus_ops",
+					},
+				},
+			},
+
+			{
+				Chip:          "domain",
+				Dev:           0,
+				Ops:           "haswell_pci_domain_ops",
+				PCIController: true,
+				ChildPCIBus:   0,
+				PCISlots: []PCISlot{
+					PCISlot{PCIAddr: PCIAddr{Dev: 0x0, Func: 0}, writeEmpty: true, additionalComment: i.variant},
+					PCISlot{PCIAddr: PCIAddr{Dev: 0x1, Func: 0}, writeEmpty: !isULT, additionalComment: "PCIe Bridge for discrete graphics"},
+					PCISlot{PCIAddr: PCIAddr{Dev: 0x2, Func: 0}, writeEmpty: true, additionalComment: "Internal graphics"},
+					PCISlot{PCIAddr: PCIAddr{Dev: 0x3, Func: 0}, writeEmpty: true, additionalComment: "Mini-HD audio"},
+				},
+			},
+		},
+	}
+
+	if isULT {
+		DevTree.Registers["dq_pins_interleaved"] = FormatBool(((inteltool.MCHBAR[0x2008] >> 10) & 1) == 0)
+	}
+
+	PutPCIDev(addr, "Host bridge")
+
+	KconfigBool["NORTHBRIDGE_INTEL_HASWELL"] = true
+	KconfigBool["HAVE_ACPI_TABLES"] = true
+	KconfigBool["HAVE_ACPI_RESUME"] = true
+
+	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
+		File: "cpu/intel/common/acpi/cpu.asl",
+	})
+
+	DSDTPCI0Includes = append(DSDTPCI0Includes, DSDTInclude{
+		File: "northbridge/intel/haswell/acpi/hostbridge.asl",
+	}, DSDTInclude{
+		File:    "drivers/intel/gma/acpi/default_brightness_levels.asl",
+		Comment: "FIXME: remove this if the board doesn't have backlight",
+	})
+}
+
+func init() {
+	RegisterPCI(0x8086, 0x0c00, haswellmc{variant: "Desktop"})
+	RegisterPCI(0x8086, 0x0c04, haswellmc{variant: "Mobile"})
+	RegisterPCI(0x8086, 0x0a04, haswellmc{variant: "ULT"})
+	RegisterPCI(0x8086, 0x0c08, haswellmc{variant: "Server"})
+	RegisterPCI(0x8086, 0x0d00, haswellmc{variant: "Crystal Well Desktop"})
+	RegisterPCI(0x8086, 0x0d04, haswellmc{variant: "Crystal Well Mobile"})
+	RegisterPCI(0x8086, 0x0d08, haswellmc{variant: "Crystal Well Server"})
+	for _, id := range []uint16{
+		0x0402, 0x0412, 0x0422, /* Desktop */
+		0x0406, 0x0416, 0x0426, /* Mobile */
+		0x040a, 0x041a, 0x042a, /* Server */
+		0x0a06, 0x0a16, 0x0a26, /* ULT */
+		0x0d16, 0x0d22, 0x0d26, 0x0d36, /* Mobile 4+3, GT3e */
+	} {
+		RegisterPCI(0x8086, id, GenericVGA{GenericPCI{Comment: "VGA controller"}})
+	}
+	/* CPU HD Audio */
+	RegisterPCI(0x8086, 0x0a0c, GenericPCI{})
+	RegisterPCI(0x8086, 0x0c0c, GenericPCI{})
+}
diff --git a/util/autoport/log_maker.go b/util/autoport/log_maker.go
new file mode 100644
index 00000000..2a524d38
--- /dev/null
+++ b/util/autoport/log_maker.go
@@ -0,0 +1,190 @@
+package main
+
+import (
+	"errors"
+	"fmt"
+	"io"
+	"io/ioutil"
+	"log"
+	"os"
+	"os/exec"
+	"strings"
+	"bytes"
+)
+
+func TryRunAndSave(output string, name string, arg []string) error {
+	cmd := exec.Command(name, arg...)
+
+	f, err := os.Create(output)
+	if err != nil {
+		log.Fatal(err)
+	}
+
+	cmd.Stdout = f
+	cmd.Stderr = f
+
+	err = cmd.Start()
+	if err != nil {
+		return err
+	}
+	cmd.Wait()
+	return nil
+}
+
+func RunAndSave(output string, name string, arg ...string) {
+	err := TryRunAndSave(output, name, arg)
+	if err == nil {
+		return
+	}
+	idx := strings.LastIndex(name, "/")
+	relname := name
+	if idx >= 0 {
+		relname = name[idx+1:]
+	}
+	relname = "./" + relname
+	err = TryRunAndSave(output, relname, arg)
+	if err != nil {
+		log.Fatal(err)
+	}
+}
+
+const MAXPROMPTRETRY = 3
+
+func PromptUser(prompt string, opts []string) (match string, err error) {
+	for i := 1; i < MAXPROMPTRETRY; i++ {
+		fmt.Printf("%s. (%s) Default:%s\n", prompt,
+		           strings.Join(opts, "/"), opts[0])
+		var usrInput string
+		fmt.Scanln(&usrInput)
+
+		// Check for default entry
+		if usrInput == "" {
+			match = opts[0]
+			return
+		}
+
+		for _, opt := range opts {
+			if opt == usrInput {
+				match = opt
+				return
+			}
+		}
+	}
+	err = errors.New("max retries exceeded")
+	fmt.Fprintln(os.Stderr, "ERROR: max retries exceeded")
+	return
+}
+
+func MakeHDALogs(outDir string, cardName string) {
+	SysDir := "/sys/class/sound/" + cardName + "/"
+	files, _ := ioutil.ReadDir(SysDir)
+	for _, f := range files {
+		if (strings.HasPrefix(f.Name(), "hw") || strings.HasPrefix(f.Name(), "hdaudio")) && f.IsDir() {
+			in, err := os.Open(SysDir + f.Name() + "/init_pin_configs")
+			defer in.Close()
+			if err != nil {
+				log.Fatal(err)
+			}
+			out, err := os.Create(outDir + "/pin_" + strings.Replace(f.Name(), "hdaudio", "hw", -1))
+			if err != nil {
+				log.Fatal(err)
+			}
+			defer out.Close()
+			io.Copy(out, in)
+		}
+	}
+
+	ProcDir := "/proc/asound/" + cardName + "/"
+	files, _ = ioutil.ReadDir(ProcDir)
+	for _, f := range files {
+		if strings.HasPrefix(f.Name(), "codec#") && !f.IsDir() {
+			in, err := os.Open(ProcDir + f.Name())
+			defer in.Close()
+			if err != nil {
+				log.Fatal(err)
+			}
+			out, err := os.Create(outDir + "/" + f.Name())
+			if err != nil {
+				log.Fatal(err)
+			}
+			defer out.Close()
+			io.Copy(out, in)
+		}
+	}
+}
+
+func MakeLogs(outDir string) {
+	os.MkdirAll(outDir, 0700)
+	RunAndSave(outDir+"/lspci.log", "lspci", "-nnvvvxxxx")
+	RunAndSave(outDir+"/dmidecode.log", "dmidecode")
+	RunAndSave(outDir+"/acpidump.log", "acpidump")
+
+	inteltoolArgs := "-a"
+	opt, err := PromptUser("WARNING: The following tool MAY cause your system to hang when it attempts "+
+		"to probe for graphics registers.  Having the graphics registers will help create a better port. "+
+		"Should autoport probe these registers?",
+		[]string{"y", "yes", "n", "no"})
+
+	// Continue even if there is an error
+
+	switch opt {
+	case "y", "yes":
+		inteltoolArgs += "f"
+	}
+
+	RunAndSave(outDir+"/inteltool.log", "../inteltool/inteltool", inteltoolArgs)
+	RunAndSave(outDir+"/ectool.log", "../ectool/ectool", "-pd")
+	RunAndSave(outDir+"/superiotool.log", "../superiotool/superiotool", "-ade")
+
+	SysSound := "/sys/class/sound/"
+	card := ""
+	cards, _ := ioutil.ReadDir(SysSound)
+	for _, f := range cards {
+		if strings.HasPrefix(f.Name(), "card") {
+			cid, err := ioutil.ReadFile(SysSound + f.Name() + "/id")
+			if err == nil && bytes.Equal(cid, []byte("PCH\n")) {
+				fmt.Fprintln(os.Stderr, "PCH sound card is", f.Name())
+				card = f.Name()
+			}
+		}
+	}
+
+	if card != "" {
+		MakeHDALogs(outDir, card)
+	} else {
+		fmt.Fprintln(os.Stderr, "HDAudio not found on PCH.")
+	}
+
+	for _, fname := range []string{"cpuinfo", "ioports"} {
+		in, err := os.Open("/proc/" + fname)
+		defer in.Close()
+		if err != nil {
+			log.Fatal(err)
+		}
+		out, err := os.Create(outDir + "/" + fname + ".log")
+		if err != nil {
+			log.Fatal(err)
+		}
+		defer out.Close()
+		io.Copy(out, in)
+	}
+
+	out, err := os.Create(outDir + "/input_bustypes.log")
+	if err != nil {
+		log.Fatal(err)
+	}
+	defer out.Close()
+
+	ClassInputDir := "/sys/class/input/"
+	files, _ := ioutil.ReadDir(ClassInputDir)
+	for _, f := range files {
+		if strings.HasPrefix(f.Name(), "input") && !f.Mode().IsRegular() { /* Allow both dirs and symlinks.  */
+			in, err := os.Open(ClassInputDir + f.Name() + "/id/bustype")
+			defer in.Close()
+			if err != nil {
+				log.Fatal(err)
+			}
+			io.Copy(out, in)
+		}
+	}
+}
diff --git a/util/autoport/log_reader.go b/util/autoport/log_reader.go
new file mode 100644
index 00000000..b0518d25
--- /dev/null
+++ b/util/autoport/log_reader.go
@@ -0,0 +1,417 @@
+package main
+
+import (
+	"bufio"
+	"flag"
+	"fmt"
+	"log"
+	"os"
+	"regexp"
+	"strconv"
+	"strings"
+)
+
+type LogDevReader struct {
+	InputDirectory string
+	ACPITables     map[string][]byte
+	EC             []byte
+}
+
+func isXDigit(x uint8) bool {
+	if x >= '0' && x <= '9' {
+		return true
+	}
+	if x >= 'a' && x <= 'f' {
+		return true
+	}
+	if x >= 'A' && x <= 'F' {
+		return true
+	}
+	return false
+}
+
+type HexLine struct {
+	length uint
+	values [16]byte
+	start  uint
+}
+
+func (l *LogDevReader) ReadHexLine(line string) (hex HexLine) {
+	hex.start = 0
+	line = strings.Trim(line, " ")
+	fmt.Sscanf(line, "%x:", &hex.start)
+	ll, _ := fmt.Sscanf(line, "%x: %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x", &hex.start,
+		&hex.values[0], &hex.values[1], &hex.values[2],
+		&hex.values[3], &hex.values[4], &hex.values[5],
+		&hex.values[6], &hex.values[7], &hex.values[8],
+		&hex.values[9], &hex.values[10], &hex.values[11],
+		&hex.values[12], &hex.values[13], &hex.values[14],
+		&hex.values[15])
+	hex.length = uint(ll - 1)
+	return
+}
+
+func (l *LogDevReader) AssignHexLine(inp string, target []byte) []byte {
+	hex := l.ReadHexLine(inp)
+	if hex.start+hex.length > uint(len(target)) {
+		target = target[0 : hex.start+hex.length]
+	}
+	copy(target[hex.start:hex.start+hex.length], hex.values[0:hex.length])
+	return target
+}
+
+func (l *LogDevReader) GetEC() []byte {
+	if l.EC != nil {
+		return l.EC
+	}
+	l.EC = make([]byte, 0x100, 0x100)
+
+	file, err := os.Open(l.InputDirectory + "/ectool.log")
+	if err != nil {
+		log.Fatal(err)
+	}
+	defer file.Close()
+
+	scanner := bufio.NewScanner(file)
+
+	for scanner.Scan() {
+		line := scanner.Text()
+		if len(line) > 7 && isXDigit(line[0]) && isXDigit(line[1]) && line[2] == ':' {
+			l.EC = l.AssignHexLine(line, l.EC)
+		}
+	}
+
+	if err := scanner.Err(); err != nil {
+		log.Fatal(err)
+	}
+
+	return l.EC
+}
+
+func (l *LogDevReader) GetACPI() (Tables map[string][]byte) {
+	if l.ACPITables != nil {
+		return l.ACPITables
+	}
+	l.ACPITables = Tables
+
+	file, err := os.Open(l.InputDirectory + "/acpidump.log")
+	if err != nil {
+		log.Fatal(err)
+	}
+	defer file.Close()
+
+	scanner := bufio.NewScanner(file)
+
+	Tables = map[string][]byte{}
+
+	curTable := ""
+	for scanner.Scan() {
+		line := scanner.Text()
+		/* Only supports ACPI tables up to 0x100000 in size, FIXME if needed */
+		is_hexline, _ := regexp.MatchString(" *[0-9A-Fa-f]{4,5}: ", line)
+		switch {
+		case len(line) >= 6 && line[5] == '@':
+			curTable = line[0:4]
+			Tables[curTable] = make([]byte, 0, 0x100000)
+		case is_hexline:
+			Tables[curTable] = l.AssignHexLine(line, Tables[curTable])
+		}
+	}
+
+	if err := scanner.Err(); err != nil {
+		log.Fatal(err)
+	}
+
+	return
+}
+
+func (l *LogDevReader) GetPCIList() (PCIList []PCIDevData) {
+	file, err := os.Open(l.InputDirectory + "/lspci.log")
+	if err != nil {
+		log.Fatal(err)
+	}
+	defer file.Close()
+
+	scanner := bufio.NewScanner(file)
+
+	PCIList = []PCIDevData{}
+
+	for scanner.Scan() {
+		line := scanner.Text()
+		switch {
+		case !(len(line) < 7 || !isXDigit(line[0]) || !isXDigit(line[1]) || line[2] != ':' || !isXDigit(line[3]) || !isXDigit(line[4]) || line[5] != '.' || !isXDigit(line[6])):
+			cur := PCIDevData{}
+			fmt.Sscanf(line, "%x:%x.%x", &cur.Bus, &cur.Dev, &cur.Func)
+			lc := strings.LastIndex(line, ":")
+			li := strings.LastIndex(line[0:lc], "[")
+			if li < 0 {
+				continue
+			}
+			ven := 0
+			dev := 0
+			fmt.Sscanf(line[li+1:], "%x:%x", &ven, &dev)
+			cur.PCIDevID = uint16(dev)
+			cur.PCIVenID = uint16(ven)
+			cur.ConfigDump = make([]byte, 0x100, 0x1000)
+			PCIList = append(PCIList, cur)
+		case len(line) > 7 && isXDigit(line[0]) && line[1] == '0' && line[2] == ':':
+			start := 0
+			fmt.Sscanf(line, "%x:", &start)
+			cur := &PCIList[len(PCIList)-1]
+			cur.ConfigDump = l.AssignHexLine(line, cur.ConfigDump)
+		}
+	}
+
+	if err := scanner.Err(); err != nil {
+		log.Fatal(err)
+	}
+
+	return
+}
+
+func (l *LogDevReader) GetInteltool() (ret InteltoolData) {
+	file, err := os.Open(l.InputDirectory + "/inteltool.log")
+	if err != nil {
+		log.Fatal(err)
+	}
+	defer file.Close()
+
+	scanner := bufio.NewScanner(file)
+	paragraph := ""
+	ret.GPIO = map[uint16]uint32{}
+	ret.RCBA = map[uint16]uint32{}
+	ret.IOBP = map[uint32]uint32{}
+	ret.IGD = map[uint32]uint32{}
+	ret.MCHBAR = map[uint16]uint32{}
+	ret.PMBASE = map[uint16]uint32{}
+	for scanner.Scan() {
+		line := scanner.Text()
+		switch {
+		case len(line) > 7 && line[0] == '0' && line[1] == 'x' && line[6] == ':' && paragraph == "RCBA":
+			addr, value := 0, 0
+			fmt.Sscanf(line, "0x%x: 0x%x", &addr, &value)
+			ret.RCBA[uint16(addr)] = uint32(value)
+		case len(line) > 11 && line[0] == '0' && line[1] == 'x' && line[10] == ':' && paragraph == "IOBP":
+			addr, value := 0, 0
+			fmt.Sscanf(line, "0x%x: 0x%x", &addr, &value)
+			ret.IOBP[uint32(addr)] = uint32(value)
+		case len(line) > 9 && line[0] == '0' && line[1] == 'x' && line[8] == ':' && paragraph == "IGD":
+			addr, value := 0, 0
+			fmt.Sscanf(line, "0x%x: 0x%x", &addr, &value)
+			ret.IGD[uint32(addr)] = uint32(value)
+		case len(line) > 7 && line[0] == '0' && line[1] == 'x' && line[6] == ':' && paragraph == "MCHBAR":
+			addr, value := 0, 0
+			fmt.Sscanf(line, "0x%x: 0x%x", &addr, &value)
+			ret.MCHBAR[uint16(addr)] = uint32(value)
+		case strings.Contains(line, "DEFAULT"):
+			continue
+		case strings.Contains(line, "DIFF"):
+			continue
+		case strings.HasPrefix(line, "gpiobase"):
+			addr, value := 0, 0
+			fmt.Sscanf(line, "gpiobase+0x%x: 0x%x", &addr, &value)
+			ret.GPIO[uint16(addr)] = uint32(value)
+		case strings.HasPrefix(line, "pmbase"):
+			addr, value := 0, 0
+			fmt.Sscanf(line, "pmbase+0x%x: 0x%x", &addr, &value)
+			ret.PMBASE[uint16(addr)] = uint32(value)
+		case strings.HasPrefix(line, "============="):
+			paragraph = strings.Trim(line, "= ")
+		}
+	}
+
+	if err := scanner.Err(); err != nil {
+		log.Fatal(err)
+	}
+	return
+}
+
+func (l *LogDevReader) GetDMI() (ret DMIData) {
+	file, err := os.Open(l.InputDirectory + "/dmidecode.log")
+	if err != nil {
+		log.Fatal(err)
+	}
+	defer file.Close()
+
+	scanner := bufio.NewScanner(file)
+	paragraph := ""
+	for scanner.Scan() {
+		line := scanner.Text()
+		if !strings.HasPrefix(line, "\t") {
+			paragraph = strings.TrimSpace(line)
+			continue
+		}
+		idx := strings.Index(line, ":")
+		if idx < 0 {
+			continue
+		}
+		name := strings.TrimSpace(line[0:idx])
+		value := strings.TrimSpace(line[idx+1:])
+		switch paragraph + ":" + name {
+		case "System Information:Manufacturer":
+			ret.Vendor = value
+		case "System Information:Product Name":
+			ret.Model = value
+		case "System Information:Version":
+			ret.Version = value
+		case "Chassis Information:Type":
+			ret.IsLaptop = (value == "Notebook" || value == "Laptop")
+		}
+	}
+
+	if err := scanner.Err(); err != nil {
+		log.Fatal(err)
+	}
+	return
+}
+
+func (l *LogDevReader) GetAzaliaCodecs() (ret []AzaliaCodec) {
+	cardno := -1
+	for i := 0; i < 10; i++ {
+		pin, err := os.Open(l.InputDirectory + "/pin_hwC" + strconv.Itoa(i) + "D0")
+		if err == nil {
+			pin.Close()
+			cardno = i
+			break
+		}
+	}
+	if cardno == -1 {
+		return
+	}
+	for codecno := 0; codecno < 10; codecno++ {
+		cur := AzaliaCodec{CodecNo: codecno, PinConfig: map[int]uint32{}}
+		codec, err := os.Open(l.InputDirectory + "/codec#" + strconv.Itoa(codecno))
+		if err != nil {
+			continue
+		}
+		defer codec.Close()
+		pin, err := os.Open(l.InputDirectory + "/pin_hwC" + strconv.Itoa(cardno) +
+			"D" + strconv.Itoa(codecno))
+		if err != nil {
+			continue
+		}
+		defer pin.Close()
+
+		scanner := bufio.NewScanner(codec)
+		for scanner.Scan() {
+			line := scanner.Text()
+			if strings.HasPrefix(line, "Codec:") {
+				fmt.Sscanf(line, "Codec: %s", &cur.Name)
+				continue
+			}
+			if strings.HasPrefix(line, "Vendor Id:") {
+				fmt.Sscanf(line, "Vendor Id: 0x%x", &cur.VendorID)
+				continue
+			}
+			if strings.HasPrefix(line, "Subsystem Id:") {
+				fmt.Sscanf(line, "Subsystem Id: 0x%x", &cur.SubsystemID)
+				continue
+			}
+		}
+
+		scanner = bufio.NewScanner(pin)
+		for scanner.Scan() {
+			line := scanner.Text()
+			addr := 0
+			val := uint32(0)
+			fmt.Sscanf(line, "0x%x 0x%x", &addr, &val)
+			cur.PinConfig[addr] = val
+		}
+		ret = append(ret, cur)
+	}
+	return
+}
+
+func (l *LogDevReader) GetIOPorts() []IOPorts {
+	file, err := os.Open(l.InputDirectory + "/ioports.log")
+	if err != nil {
+		log.Fatal(err)
+	}
+	defer file.Close()
+	scanner := bufio.NewScanner(file)
+	ret := make([]IOPorts, 0, 100)
+	for scanner.Scan() {
+		line := scanner.Text()
+		el := IOPorts{}
+		fmt.Sscanf(line, " %x-%x : %s", &el.Start, &el.End, &el.Usage)
+		ret = append(ret, el)
+	}
+
+	if err := scanner.Err(); err != nil {
+		log.Fatal(err)
+	}
+	return ret
+
+}
+
+func (l *LogDevReader) GetCPUModel() (ret []uint32) {
+	file, err := os.Open(l.InputDirectory + "/cpuinfo.log")
+	if err != nil {
+		log.Fatal(err)
+	}
+	defer file.Close()
+
+	scanner := bufio.NewScanner(file)
+	ret = make([]uint32, 0, 100)
+	proc := 0
+	for scanner.Scan() {
+		line := scanner.Text()
+		sep := strings.Index(line, ":")
+		if sep < 0 {
+			continue
+		}
+		key := strings.TrimSpace(line[0:sep])
+		val := strings.TrimSpace(line[sep+1:])
+
+		if key == "processor" {
+			proc, _ := strconv.Atoi(val)
+			if len(ret) <= proc {
+				ret = ret[0 : proc+1]
+			}
+			continue
+		}
+		if key == "cpu family" {
+			family, _ := strconv.Atoi(val)
+			ret[proc] |= uint32(((family & 0xf) << 8) | ((family & 0xff0) << 16))
+		}
+		if key == "model" {
+			model, _ := strconv.Atoi(val)
+			ret[proc] |= uint32(((model & 0xf) << 4) | ((model & 0xf0) << 12))
+		}
+		if key == "stepping" {
+			stepping, _ := strconv.Atoi(val)
+			ret[proc] |= uint32(stepping & 0xf)
+		}
+	}
+
+	if err := scanner.Err(); err != nil {
+		log.Fatal(err)
+	}
+	return
+}
+
+func (l *LogDevReader) HasPS2() bool {
+	file, err := os.Open(l.InputDirectory + "/input_bustypes.log")
+	if err != nil {
+		log.Fatal(err)
+	}
+	defer file.Close()
+	scanner := bufio.NewScanner(file)
+	for scanner.Scan() {
+		line := scanner.Text()
+		if strings.Index(line, "0011") >= 0 {
+			return true
+		}
+	}
+	return false
+}
+
+var FlagLogInput = flag.String("input_log", ".", "Input log directory")
+var FlagLogMkLogs = flag.Bool("make_logs", false, "Dump logs")
+
+func MakeLogReader() *LogDevReader {
+	if *FlagLogMkLogs {
+		MakeLogs(*FlagLogInput)
+	}
+	return &LogDevReader{InputDirectory: *FlagLogInput}
+}
diff --git a/util/autoport/lynxpoint.go b/util/autoport/lynxpoint.go
new file mode 100644
index 00000000..98a1ca82
--- /dev/null
+++ b/util/autoport/lynxpoint.go
@@ -0,0 +1,490 @@
+package main
+
+import "fmt"
+
+type LPVariant int
+
+const (
+	LYNX_POINT_MOBILE LPVariant = iota
+	LYNX_POINT_DESKTOP
+	LYNX_POINT_SERVER
+	LYNX_POINT_ULT
+)
+
+type lynxpoint struct {
+	variant LPVariant
+	node    *DevTreeNode
+}
+
+func lpPchGetFlashSize(ctx Context) {
+	inteltool := ctx.InfoSource.GetInteltool()
+	/* In LP PCH, Boot BIOS Straps field in GCS has only one bit.  */
+	switch (inteltool.RCBA[0x3410] >> 10) & 1 {
+	case 0:
+		ROMProtocol = "SPI"
+		highflkb := uint32(0)
+		for reg := uint16(0); reg < 5; reg++ {
+			fl := (inteltool.RCBA[0x3854+4*reg] >> 16) & 0x1fff
+			flkb := (fl + 1) << 2
+			if flkb > highflkb {
+				highflkb = flkb
+			}
+		}
+		ROMSizeKB = int(highflkb)
+		FlashROMSupport = "y"
+	}
+}
+
+func (b lynxpoint) GetGPIOHeader() string {
+	return "southbridge/intel/lynxpoint/pch.h"
+}
+
+func (b lynxpoint) EnableGPE(in int) {
+	if b.variant != LYNX_POINT_ULT {
+		b.node.Registers[fmt.Sprintf("gpi%d_routing", in)] = "2"
+	}
+}
+
+func (b lynxpoint) EncodeGPE(in int) int {
+	return in + 0x10
+}
+
+func (b lynxpoint) DecodeGPE(in int) int {
+	return in - 0x10
+}
+
+func (b lynxpoint) NeedRouteGPIOManually() {
+	b.node.Comment += ", FIXME: set gpiX_routing for EC support"
+}
+
+func GetLptDesktopEHCISetting(loc_param uint32, txamp uint32) (string, int) {
+	var port_pos string
+	var port_length int
+
+	if loc_param == 4 {
+		port_pos = "USB_PORT_BACK_PANEL"
+		if txamp <= 2 {
+			port_length = 0x40
+		} else if txamp >= 4 {
+			port_length = 0x140
+		} else {
+			port_length = 0x110
+		}
+	} else {
+		port_pos = "USB_PORT_FLEX"
+		port_length = 0x40
+	}
+	return port_pos, port_length
+}
+
+func GetLptMobileEHCISetting(loc_param uint32, txamp uint32) (string, int) {
+	var port_pos string
+	var port_length int
+
+	if loc_param == 4 {
+		port_pos = "USB_PORT_DOCK"
+		if txamp <= 1 {
+			port_length = 0x40
+		} else {
+			port_length = 0x80
+		}
+	} else if loc_param == 6 {
+		/* not internal, not dock, port_length >= 0x70 */
+		port_pos = "USB_PORT_BACK_PANEL"
+		if txamp <= 2 {
+			port_length = 0x80
+		} else {
+			port_length = 0x110
+		}
+	} else {
+		port_pos = "USB_PORT_BACK_PANEL"
+		port_length = 0x40
+	}
+	return port_pos, port_length
+}
+
+func GetLptLPEHCISetting(loc_param uint32, txamp uint32) (string, int) {
+	var port_pos string
+	var port_length int
+
+	if loc_param == 6 {
+		/* back panel or mini pcie, length >= 0x70 */
+		port_pos = "USB_PORT_MINI_PCIE"
+		if txamp <= 2 {
+			port_length = 0x80
+		} else {
+			port_length = 0x110
+		}
+	} else if loc_param == 4 {
+		port_pos = "USB_PORT_DOCK"
+		if txamp <= 1 {
+			port_length = 0x40
+		} else {
+			port_length = 0x80
+		}
+	} else {
+		port_pos = "USB_PORT_BACK_PANEL"
+		port_length = 0x40
+	}
+	return port_pos, port_length
+}
+
+func (b lynxpoint) Scan(ctx Context, addr PCIDevData) {
+
+	SouthBridge = &b
+
+	inteltool := ctx.InfoSource.GetInteltool()
+
+	isULT := (b.variant == LYNX_POINT_ULT)
+
+	if isULT {
+		Lynxpoint_LP_GPIO(ctx, inteltool)
+	} else {
+		GPIO(ctx, inteltool)
+	}
+
+	KconfigBool["SOUTHBRIDGE_INTEL_LYNXPOINT"] = true
+	if isULT {
+		KconfigBool["INTEL_LYNXPOINT_LP"] = true
+	}
+	KconfigBool["SERIRQ_CONTINUOUS_MODE"] = true
+	if isULT {
+		KconfigInt["USBDEBUG_HCD_INDEX"] = 1
+	} else {
+		KconfigInt["USBDEBUG_HCD_INDEX"] = 2
+		KconfigComment["USBDEBUG_HCD_INDEX"] = "FIXME: check this"
+	}
+
+	if isULT {
+		lpPchGetFlashSize(ctx)
+	} else {
+		ich9GetFlashSize(ctx)
+	}
+
+	FADT := ctx.InfoSource.GetACPI()["FACP"]
+
+	sp0dtle_data := (inteltool.IOBP[0xea002750] >> 24) & 0xf
+	sp0dtle_edge := (inteltool.IOBP[0xea002754] >> 16) & 0xf
+	sp1dtle_data := (inteltool.IOBP[0xea002550] >> 24) & 0xf
+	sp1dtle_edge := (inteltool.IOBP[0xea002554] >> 16) & 0xf
+
+	if sp0dtle_data != sp0dtle_edge {
+		fmt.Printf("Different SATA Gen3 port0 DTLE data and edge values are used.\n")
+	}
+
+	if sp1dtle_data != sp1dtle_edge {
+		fmt.Printf("Different SATA Gen3 port1 DTLE data and edge values are used.\n")
+	}
+
+	cur := DevTreeNode{
+		Chip:    "southbridge/intel/lynxpoint",
+		Comment: "Intel Series 8 Lynx Point PCH",
+
+		/* alt_gp_smi_en is not generated because coreboot doesn't use SMI like OEM firmware */
+		Registers: map[string]string{
+			"gen1_dec":             FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x84:0x88]),
+			"gen2_dec":             FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x88:0x8c]),
+			"gen3_dec":             FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x8c:0x90]),
+			"gen4_dec":             FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x90:0x94]),
+			"sata_port_map":        fmt.Sprintf("0x%x", PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 2}].ConfigDump[0x92]&0x3f),
+			"docking_supported":    (FormatBool((FADT[113] & (1 << 1)) != 0)),
+			"sata_port0_gen3_dtle": fmt.Sprintf("0x%x", sp0dtle_data),
+			"sata_port1_gen3_dtle": fmt.Sprintf("0x%x", sp1dtle_data),
+		},
+		PCISlots: []PCISlot{
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x13, Func: 0}, writeEmpty: isULT, additionalComment: "Smart Sound Audio DSP"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x14, Func: 0}, writeEmpty: true, additionalComment: "xHCI Controller"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 0}, writeEmpty: isULT, additionalComment: "Serial I/O DMA"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 1}, writeEmpty: isULT, additionalComment: "I2C0"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 2}, writeEmpty: isULT, additionalComment: "I2C1"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 3}, writeEmpty: isULT, additionalComment: "GSPI0"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 4}, writeEmpty: isULT, additionalComment: "GSPI1"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 5}, writeEmpty: isULT, additionalComment: "UART0"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 6}, writeEmpty: isULT, additionalComment: "UART1"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 0}, writeEmpty: true, additionalComment: "Management Engine Interface 1"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 1}, writeEmpty: true, additionalComment: "Management Engine Interface 2"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 2}, writeEmpty: true, additionalComment: "Management Engine IDE-R"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 3}, writeEmpty: true, additionalComment: "Management Engine KT"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x17, Func: 0}, writeEmpty: isULT, additionalComment: "SDIO"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x19, Func: 0}, writeEmpty: true, additionalComment: "Intel Gigabit Ethernet"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1a, Func: 0}, writeEmpty: !isULT, additionalComment: "USB2 EHCI #2"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1b, Func: 0}, writeEmpty: true, additionalComment: "High Definition Audio"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 0}, writeEmpty: true, additionalComment: "PCIe Port #1"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 1}, writeEmpty: true, additionalComment: "PCIe Port #2"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 2}, writeEmpty: true, additionalComment: "PCIe Port #3"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 3}, writeEmpty: true, additionalComment: "PCIe Port #4"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 4}, writeEmpty: true, additionalComment: "PCIe Port #5"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 5}, writeEmpty: true, additionalComment: "PCIe Port #6"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 6}, writeEmpty: !isULT, additionalComment: "PCIe Port #7"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 7}, writeEmpty: !isULT, additionalComment: "PCIe Port #8"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1d, Func: 0}, writeEmpty: true, additionalComment: "USB2 EHCI #1"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 0}, writeEmpty: true, additionalComment: "LPC bridge"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 2}, writeEmpty: true, additionalComment: "SATA Controller (AHCI)"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 3}, writeEmpty: true, additionalComment: "SMBus"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 5}, writeEmpty: !isULT, additionalComment: "SATA Controller (Legacy)"},
+			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 6}, writeEmpty: true, additionalComment: "Thermal"},
+		},
+	}
+
+	if isULT {
+		cur.Registers["gpe0_en_1"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x90])
+		cur.Registers["gpe0_en_2"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x94])
+		cur.Registers["gpe0_en_3"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x98])
+		cur.Registers["gpe0_en_4"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x9c])
+	} else {
+		cur.Registers["gpe0_en_1"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x28])
+		cur.Registers["gpe0_en_2"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x2c])
+	}
+
+	b.node = &cur
+
+	PutPCIChip(addr, cur)
+	PutPCIDevParent(addr, "", "lpc")
+
+	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
+		File: "southbridge/intel/common/acpi/platform.asl",
+	})
+	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
+		File:    "southbridge/intel/lynxpoint/acpi/globalnvs.asl",
+		Comment: "global NVS and variables",
+	})
+	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
+		File: "southbridge/intel/common/acpi/sleepstates.asl",
+	})
+	DSDTPCI0Includes = append(DSDTPCI0Includes, DSDTInclude{
+		File: "southbridge/intel/lynxpoint/acpi/pch.asl",
+	})
+
+	AddBootBlockFile("bootblock.c", "")
+	bb := Create(ctx, "bootblock.c")
+	defer bb.Close()
+	Add_gpl(bb)
+	bb.WriteString(`#include <southbridge/intel/lynxpoint/pch.h>
+
+/* FIXME: remove this if not needed */
+void mainboard_config_superio(void)
+{
+}
+`)
+
+	sb := Create(ctx, "romstage.c")
+	defer sb.Close()
+	Add_gpl(sb)
+	sb.WriteString(`#include <stdint.h>
+#include <northbridge/intel/haswell/haswell.h>
+#include <northbridge/intel/haswell/raminit.h>
+#include <southbridge/intel/lynxpoint/pch.h>
+
+void mainboard_config_rcba(void)
+{
+}
+
+/* FIXME: called after romstage_common, remove it if not used */
+void mb_late_romstage_setup(void)
+{
+}
+
+void mb_get_spd_map(struct spd_info *spdi)
+{
+	/* FIXME: check this */
+	spdi->addresses[0] = 0x50;
+	spdi->addresses[1] = 0x51;
+	spdi->addresses[2] = 0x52;
+	spdi->addresses[3] = 0x53;
+}
+
+const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS] = {
+	/* FIXME: Length and Location are computed from IOBP values, may be inaccurate */
+	/* Length, Enable, OCn#, Location */
+`)
+
+	pdo1 := PCIMap[PCIAddr{Bus: 0, Dev: 0x1d, Func: 0}].ConfigDump[0x64]
+	ocmap1 := PCIMap[PCIAddr{Bus: 0, Dev: 0x1d, Func: 0}].ConfigDump[0x74:0x78]
+
+	var pdo2 uint8
+	var ocmap2 []uint8
+	var nPorts uint
+	if isULT {
+		nPorts = 8
+	} else {
+		pdo2 = PCIMap[PCIAddr{Bus: 0, Dev: 0x1a, Func: 0}].ConfigDump[0x64]
+		ocmap2 = PCIMap[PCIAddr{Bus: 0, Dev: 0x1a, Func: 0}].ConfigDump[0x74:0x78]
+		nPorts = 14
+	}
+
+	xusb2pr := GetLE16(PCIMap[PCIAddr{Bus: 0, Dev: 0x14, Func: 0}].ConfigDump[0xd0:0xd4])
+
+	for port := uint(0); port < nPorts; port++ {
+		var port_oc int = -1
+		var port_pos string
+		var port_disable uint8
+
+		if port < 8 {
+			port_disable = ((pdo1 >> port) & (uint8(xusb2pr>>port) ^ 1)) & 1
+			for oc := 0; oc < 4; oc++ {
+				if (ocmap1[oc] & (1 << port)) != 0 {
+					port_oc = oc
+					break
+				}
+			}
+		} else {
+			port_disable = ((pdo2 >> (port - 8)) & (uint8(xusb2pr>>port) ^ 1)) & 1
+			for oc := 0; oc < 4; oc++ {
+				if (ocmap2[oc] & (1 << (port - 8))) != 0 {
+					port_oc = oc + 4
+					break
+				}
+			}
+		}
+
+		/* get USB2 port length and location from IOBP */
+		port_iobp := inteltool.IOBP[0xe5004100+uint32(port)*0x100]
+		loc_param := (port_iobp >> 8) & 7
+		txamp := (port_iobp >> 11) & 7
+		var port_length int
+
+		if isULT {
+			port_pos, port_length = GetLptLPEHCISetting(loc_param, txamp)
+		} else if b.variant == LYNX_POINT_MOBILE {
+			port_pos, port_length = GetLptMobileEHCISetting(loc_param, txamp)
+		} else { /* desktop or server */
+			port_pos, port_length = GetLptDesktopEHCISetting(loc_param, txamp)
+		}
+
+		if port_disable == 1 {
+			port_pos = "USB_PORT_SKIP"
+		}
+
+		if port_oc == -1 {
+			fmt.Fprintf(sb, "\t{ 0x%04x, %d, USB_OC_PIN_SKIP, %s },\n",
+				port_length, (port_disable ^ 1), port_pos)
+		} else {
+			fmt.Fprintf(sb, "\t{ 0x%04x, %d, %d, %s },\n",
+				port_length, (port_disable ^ 1), port_oc, port_pos)
+		}
+	}
+
+	sb.WriteString(`};
+
+const struct usb3_port_config mainboard_usb3_ports[MAX_USB3_PORTS] = {
+`)
+
+	xpdo := PCIMap[PCIAddr{Bus: 0, Dev: 0x14, Func: 0}].ConfigDump[0xe8]
+	u3ocm := PCIMap[PCIAddr{Bus: 0, Dev: 0x14, Func: 0}].ConfigDump[0xc8:0xd0]
+
+	if !isULT {
+		nPorts = 6
+	} else {
+		nPorts = 4
+	}
+
+	for port := uint(0); port < nPorts; port++ {
+		var port_oc int = -1
+		port_disable := (xpdo >> port) & 1
+		for oc := 0; oc < 8; oc++ {
+			if (u3ocm[oc] & (1 << port)) != 0 {
+				port_oc = oc
+				break
+			}
+		}
+		if port_oc == -1 {
+			fmt.Fprintf(sb, "\t{ %d, USB_OC_PIN_SKIP },\n",
+				(port_disable ^ 1))
+		} else {
+			fmt.Fprintf(sb, "\t{ %d, %d },\n",
+				(port_disable ^ 1), port_oc)
+		}
+	}
+
+	sb.WriteString(`};
+`)
+
+}
+
+func init() {
+	for _, id := range []uint16{
+		0x8c41, 0x8c49, 0x8c4b, 0x8c4f,
+	} {
+		RegisterPCI(0x8086, uint16(id), lynxpoint{variant: LYNX_POINT_MOBILE})
+	}
+
+	for _, id := range []uint16{
+		0x8c42, 0x8c44, 0x8c46, 0x8c4a,
+		0x8c4c, 0x8c4e, 0x8c50, 0x8c5c,
+	} {
+		RegisterPCI(0x8086, uint16(id), lynxpoint{variant: LYNX_POINT_DESKTOP})
+	}
+
+	for _, id := range []uint16{
+		0x8c52, 0x8c54, 0x8c56,
+	} {
+		RegisterPCI(0x8086, uint16(id), lynxpoint{variant: LYNX_POINT_SERVER})
+	}
+
+	for _, id := range []uint16{
+		0x9c41, 0x9c43, 0x9c45,
+	} {
+		RegisterPCI(0x8086, uint16(id), lynxpoint{variant: LYNX_POINT_ULT})
+	}
+
+	/* PCIe bridge */
+	for _, id := range []uint16{
+		0x8c10, 0x8c12, 0x8c14, 0x8c16, 0x8c18, 0x8c1a, 0x8c1c, 0x8c1e,
+		0x9c10, 0x9c12, 0x9c14, 0x9c16, 0x9c18, 0x9c1a,
+	} {
+		RegisterPCI(0x8086, id, GenericPCI{})
+	}
+
+	/* SMBus controller  */
+	RegisterPCI(0x8086, 0x8c22, GenericPCI{MissingParent: "smbus"})
+	RegisterPCI(0x8086, 0x9c22, GenericPCI{MissingParent: "smbus"})
+
+	/* SATA */
+	for _, id := range []uint16{
+		0x8c00, 0x8c02, 0x8c04, 0x8c06, 0x8c08, 0x8c0e,
+		0x8c01, 0x8c03, 0x8c05, 0x8c07, 0x8c09, 0x8c0f,
+		0x9c03, 0x9c05, 0x9c07, 0x9c0f,
+	} {
+		RegisterPCI(0x8086, id, GenericPCI{})
+	}
+
+	/* EHCI */
+	for _, id := range []uint16{
+		0x9c26, 0x8c26, 0x8c2d,
+	} {
+		RegisterPCI(0x8086, id, GenericPCI{})
+	}
+
+	/* XHCI */
+	RegisterPCI(0x8086, 0x8c31, GenericPCI{})
+	RegisterPCI(0x8086, 0x9c31, GenericPCI{})
+
+	/* ME and children */
+	for _, id := range []uint16{
+		0x8c3a, 0x8c3b, 0x8c3c, 0x8c3d,
+		0x9c3a, 0x9c3b, 0x9c3c, 0x9c3d,
+	} {
+		RegisterPCI(0x8086, id, GenericPCI{})
+	}
+
+	/* Ethernet */
+	RegisterPCI(0x8086, 0x8c33, GenericPCI{})
+
+	/* Thermal */
+	RegisterPCI(0x8086, 0x8c24, GenericPCI{})
+	RegisterPCI(0x8086, 0x9c24, GenericPCI{})
+
+	/* LAN Controller on LP PCH (if EEPROM has 0x0000/0xffff in DID) */
+	RegisterPCI(0x8086, 0x155a, GenericPCI{})
+
+	/* SDIO */
+	RegisterPCI(0x8086, 0x9c35, GenericPCI{})
+
+	/* Smart Sound Technology Controller */
+	RegisterPCI(0x8086, 0x9c36, GenericPCI{})
+
+	/* Serial I/O */
+	for id := uint16(0x9c60); id <= 0x9c66; id++ {
+		RegisterPCI(0x8086, id, GenericPCI{})
+	}
+}
diff --git a/util/autoport/lynxpoint_lp_gpio.go b/util/autoport/lynxpoint_lp_gpio.go
new file mode 100644
index 00000000..fbc1686a
--- /dev/null
+++ b/util/autoport/lynxpoint_lp_gpio.go
@@ -0,0 +1,252 @@
+package main
+
+import (
+	"fmt"
+	"os"
+	"strings"
+)
+
+const (
+	PIRQI = 0
+	PIRQJ = 1
+	PIRQK = 2
+	PIRQL = 3
+	PIRQM = 4
+	PIRQN = 5
+	PIRQO = 6
+	PIRQP = 7
+	PIRQQ = 8
+	PIRQR = 9
+	PIRQS = 10
+	PIRQT = 11
+	PIRQU = 12
+	PIRQV = 13
+	PIRQW = 14
+	PIRQX = 15
+)
+
+/* from sb/intel/lynxpoint/lp_gpio.c */
+func lp_gpio_to_pirq(gpioNum uint16) int {
+	switch gpioNum {
+	case 8:
+		return PIRQI
+	case 9:
+		return PIRQJ
+	case 10:
+		return PIRQK
+	case 13:
+		return PIRQL
+	case 14:
+		return PIRQM
+	case 45:
+		return PIRQN
+	case 46:
+		return PIRQO
+	case 47:
+		return PIRQP
+	case 48:
+		return PIRQQ
+	case 49:
+		return PIRQR
+	case 50:
+		return PIRQS
+	case 51:
+		return PIRQT
+	case 52:
+		return PIRQU
+	case 53:
+		return PIRQV
+	case 54:
+		return PIRQW
+	case 55:
+		return PIRQX
+	default:
+		return -1
+	}
+}
+
+func conf0str(conf0 uint32) string {
+	if (conf0 & 1) == 0 {
+		return "GPIO_MODE_NATIVE"
+	} else {
+		s := []string{"GPIO_MODE_GPIO"}
+		var gpio_output bool
+		if ((conf0 >> 2) & 1) == 1 {
+			s = append(s, "GPIO_DIR_INPUT")
+			gpio_output = false
+		} else {
+			s = append(s, "GPIO_DIR_OUTPUT")
+			gpio_output = true
+		}
+		if ((conf0 >> 3) & 1) == 1 {
+			s = append(s, "GPIO_INVERT")
+		}
+		if ((conf0 >> 4) & 1) == 1 {
+			s = append(s, "GPIO_IRQ_LEVEL")
+		}
+		if gpio_output {
+			if ((conf0 >> 31) & 1) == 1 {
+				s = append(s, "GPO_LEVEL_HIGH")
+			} else {
+				s = append(s, "GPO_LEVEL_LOW")
+			}
+		}
+		return strings.Join(s, " | ")
+	}
+}
+
+func lpgpio_preset(conf0 uint32, owner uint32, route uint32, irqen uint32, pirq uint32) string {
+	if conf0 == 0xd { /* 0b1101: MODE_GPIO | INPUT | INVERT */
+		if owner == 0 { /* OWNER_ACPI */
+			if irqen == 0 && pirq == 0 {
+				if route == 0 { /* SCI */
+					return "GPIO_ACPI_SCI"
+				} else {
+					return "GPIO_ACPI_SMI"
+				}
+			}
+			return ""
+		} else { /* OWNER_GPIO */
+			if route == 0 && irqen == 0 && pirq != 0 {
+				return "GPIO_INPUT_INVERT"
+			}
+			return ""
+		}
+	}
+
+	if conf0 == 0x5 && owner == 1 { /* 0b101: MODE_GPIO | INPUT, OWNER_GPIO */
+		if route == 0 && irqen == 0 {
+			if pirq == 1 {
+				return "GPIO_PIRQ"
+			} else {
+				return "GPIO_INPUT"
+			}
+		}
+		return ""
+	}
+
+	if owner == 1 && irqen == 1 {
+		if route == 0 && pirq == 0 {
+			if conf0 == 0x5 { /* 0b00101 */
+				return "GPIO_IRQ_EDGE"
+			}
+			if conf0 == 0x15 { /* 0b10101 */
+				return "GPIO_IRQ_LEVEL"
+			}
+		}
+		return ""
+	}
+	return ""
+}
+
+func gpio_str(conf0 uint32, conf1 uint32, owner uint32, route uint32, irqen uint32, reset uint32, blink uint32, pirq uint32) string {
+	s := []string{}
+	s = append(s, fmt.Sprintf(".conf0 = %s", conf0str(conf0)))
+	if conf1 != 0 {
+		s = append(s, fmt.Sprintf(".conf1 = 0x%x", conf1))
+	}
+	if owner != 0 {
+		s = append(s, ".owner = GPIO_OWNER_GPIO")
+	}
+	if route != 0 {
+		s = append(s, ".route = GPIO_ROUTE_SMI")
+	}
+	if irqen != 0 {
+		s = append(s, ".irqen = GPIO_IRQ_ENABLE")
+	}
+	if reset != 0 {
+		s = append(s, ".reset = GPIO_RESET_RSMRST")
+	}
+	if blink != 0 {
+		s = append(s, ".blink = GPO_BLINK")
+	}
+	if pirq != 0 {
+		s = append(s, ".pirq = GPIO_PIRQ_APIC_ROUTE")
+	}
+	return strings.Join(s, ", ")
+}
+
+/* start addresses of GPIO registers */
+const (
+	GPIO_OWN        = 0x0
+	GPIPIRQ2IOXAPIC = 0x10
+	GPO_BLINK       = 0x18
+	GPI_ROUT        = 0x30
+	GP_RST_SEL      = 0x60
+	GPI_IE          = 0x90
+	GPnCONFIGA      = 0x100
+	GPnCONFIGB      = 0x104
+)
+
+func PrintLPGPIO(gpio *os.File, inteltool InteltoolData) {
+	for gpioNum := uint16(0); gpioNum <= 94; gpioNum++ {
+		if gpioNum < 10 {
+			fmt.Fprintf(gpio, "\t[%d]  = ", gpioNum)
+		} else {
+			fmt.Fprintf(gpio, "\t[%d] = ", gpioNum)
+		}
+		conf0 := inteltool.GPIO[GPnCONFIGA+gpioNum*8]
+		conf1 := inteltool.GPIO[GPnCONFIGB+gpioNum*8]
+		set := gpioNum / 32
+		bit := gpioNum % 32
+		/* owner only effective in GPIO mode */
+		owner := (inteltool.GPIO[GPIO_OWN+set*4] >> bit) & 1
+		route := (inteltool.GPIO[GPI_ROUT+set*4] >> bit) & 1
+		irqen := (inteltool.GPIO[GPI_IE+set*4] >> bit) & 1
+		reset := (inteltool.GPIO[GP_RST_SEL+set*4] >> bit) & 1
+		var blink, pirq uint32
+		/* blink only effective in GPIO output mode */
+		if set == 0 {
+			blink = (inteltool.GPIO[GPO_BLINK] >> bit) & 1
+		} else {
+			blink = 0
+		}
+		irqset := lp_gpio_to_pirq(gpioNum)
+		if irqset >= 0 {
+			pirq = (inteltool.GPIO[GPIPIRQ2IOXAPIC] >> uint(irqset)) & 1
+		} else {
+			pirq = 0
+		}
+
+		if (conf0 & 1) == 0 {
+			fmt.Fprintf(gpio, "LP_GPIO_NATIVE,\n")
+		} else if (conf0 & 4) == 0 {
+			/* configured as output */
+			if ((conf0 >> 31) & 1) == 0 {
+				fmt.Fprintf(gpio, "LP_GPIO_OUT_LOW,\n")
+			} else {
+				fmt.Fprintf(gpio, "LP_GPIO_OUT_HIGH,\n")
+			}
+		} else if (conf1 & 4) != 0 {
+			/* configured as input and sensing disabled */
+			fmt.Fprintf(gpio, "LP_GPIO_UNUSED,\n")
+		} else {
+			is_preset := false
+			if conf1 == 0 && reset == 0 && blink == 0 {
+				preset := lpgpio_preset(conf0, owner, route, irqen, pirq)
+				if preset != "" {
+					fmt.Fprintf(gpio, "LP_%s,\n", preset)
+					is_preset = true
+				}
+			}
+			if !is_preset {
+				fmt.Fprintf(gpio, "{ %s },\n", gpio_str(conf0, conf1, owner, route, irqen, reset, blink, pirq))
+			}
+		}
+	}
+}
+
+func Lynxpoint_LP_GPIO(ctx Context, inteltool InteltoolData) {
+	gpio := Create(ctx, "gpio.c")
+	defer gpio.Close()
+
+	AddROMStageFile("gpio.c", "")
+
+	Add_gpl(gpio)
+	gpio.WriteString(`#include <southbridge/intel/lynxpoint/lp_gpio.h>
+
+const struct pch_lp_gpio_map mainboard_lp_gpio_map[] = {
+`)
+	PrintLPGPIO(gpio, inteltool)
+	gpio.WriteString("\tLP_GPIO_END\n};\n")
+}
diff --git a/util/autoport/main.go b/util/autoport/main.go
new file mode 100644
index 00000000..3a2f0617
--- /dev/null
+++ b/util/autoport/main.go
@@ -0,0 +1,915 @@
+/* This is just an experiment. Full automatic porting
+   is probably not possible but a lot can be automated. */
+package main
+
+import (
+	"bytes"
+	"flag"
+	"fmt"
+	"log"
+	"os"
+	"sort"
+	"strings"
+)
+
+type PCIAddr struct {
+	Bus  int
+	Dev  int
+	Func int
+}
+
+type PCIDevData struct {
+	PCIAddr
+	PCIVenID   uint16
+	PCIDevID   uint16
+	ConfigDump []uint8
+}
+
+type PCIDevice interface {
+	Scan(ctx Context, addr PCIDevData)
+}
+
+type InteltoolData struct {
+	GPIO   map[uint16]uint32
+	RCBA   map[uint16]uint32
+	IOBP   map[uint32]uint32
+	IGD    map[uint32]uint32
+	MCHBAR map[uint16]uint32
+	PMBASE map[uint16]uint32
+}
+
+type DMIData struct {
+	Vendor   string
+	Model    string
+	Version  string
+	IsLaptop bool
+}
+
+type AzaliaCodec struct {
+	Name        string
+	VendorID    uint32
+	SubsystemID uint32
+	CodecNo     int
+	PinConfig   map[int]uint32
+}
+
+type DevReader interface {
+	GetPCIList() []PCIDevData
+	GetDMI() DMIData
+	GetInteltool() InteltoolData
+	GetAzaliaCodecs() []AzaliaCodec
+	GetACPI() map[string][]byte
+	GetCPUModel() []uint32
+	GetEC() []byte
+	GetIOPorts() []IOPorts
+	HasPS2() bool
+}
+
+type IOPorts struct {
+	Start uint16
+	End   uint16
+	Usage string
+}
+
+type SouthBridger interface {
+	GetGPIOHeader() string
+	EncodeGPE(int) int
+	DecodeGPE(int) int
+	EnableGPE(int)
+	NeedRouteGPIOManually()
+}
+
+var SouthBridge SouthBridger
+var BootBlockFiles map[string]string = map[string]string{}
+var ROMStageFiles map[string]string = map[string]string{}
+var RAMStageFiles map[string]string = map[string]string{}
+var SMMFiles map[string]string = map[string]string{}
+var MainboardInit string
+var MainboardEnable string
+var MainboardIncludes []string
+
+type Context struct {
+	MoboID        string
+	KconfigName   string
+	Vendor        string
+	Model         string
+	BaseDirectory string
+	InfoSource    DevReader
+	SaneVendor    string
+}
+
+type IOAPICIRQ struct {
+	APICID int
+	IRQNO  [4]int
+}
+
+var IOAPICIRQs map[PCIAddr]IOAPICIRQ = map[PCIAddr]IOAPICIRQ{}
+var KconfigBool map[string]bool = map[string]bool{}
+var KconfigComment map[string]string = map[string]string{}
+var KconfigString map[string]string = map[string]string{}
+var KconfigHex map[string]uint32 = map[string]uint32{}
+var KconfigInt map[string]int = map[string]int{}
+var ROMSizeKB = 0
+var ROMProtocol = ""
+var FlashROMSupport = ""
+
+func GetLE16(inp []byte) uint16 {
+	return uint16(inp[0]) | (uint16(inp[1]) << 8)
+}
+
+func FormatHexLE16(inp []byte) string {
+	return fmt.Sprintf("0x%04x", GetLE16(inp))
+}
+
+func FormatHex32(u uint32) string {
+	return fmt.Sprintf("0x%08x", u)
+}
+
+func FormatHex8(u uint8) string {
+	return fmt.Sprintf("0x%02x", u)
+}
+
+func FormatInt32(u uint32) string {
+	return fmt.Sprintf("%d", u)
+}
+
+func FormatHexLE32(d []uint8) string {
+	u := uint32(d[0]) | (uint32(d[1]) << 8) | (uint32(d[2]) << 16) | (uint32(d[3]) << 24)
+	return FormatHex32(u)
+}
+
+func FormatBool(inp bool) string {
+	if inp {
+		return "1"
+	} else {
+		return "0"
+	}
+}
+
+func sanitize(inp string) string {
+	result := strings.ToLower(inp)
+	result = strings.Replace(result, " ", "_", -1)
+	result = strings.Replace(result, ",", "_", -1)
+	result = strings.Replace(result, "-", "_", -1)
+	for strings.HasSuffix(result, ".") {
+		result = result[0 : len(result)-1]
+	}
+	return result
+}
+
+func AddBootBlockFile(Name string, Condition string) {
+	BootBlockFiles[Name] = Condition
+}
+
+func AddROMStageFile(Name string, Condition string) {
+	ROMStageFiles[Name] = Condition
+}
+
+func AddRAMStageFile(Name string, Condition string) {
+	RAMStageFiles[Name] = Condition
+}
+
+func AddSMMFile(Name string, Condition string) {
+	SMMFiles[Name] = Condition
+}
+
+func IsIOPortUsedBy(ctx Context, port uint16, name string) bool {
+	for _, io := range ctx.InfoSource.GetIOPorts() {
+		if io.Start <= port && port <= io.End && io.Usage == name {
+			return true
+		}
+	}
+	return false
+}
+
+var FlagOutDir = flag.String("coreboot_dir", ".", "Resulting coreboot directory")
+
+func writeMF(mf *os.File, files map[string]string, category string) {
+	keys := []string{}
+	for file, _ := range files {
+		keys = append(keys, file)
+	}
+
+	sort.Strings(keys)
+
+	for _, file := range keys {
+		condition := files[file]
+		if condition == "" {
+			fmt.Fprintf(mf, "%s-y += %s\n", category, file)
+		} else {
+			fmt.Fprintf(mf, "%s-$(%s) += %s\n", category, condition, file)
+		}
+	}
+}
+
+func Create(ctx Context, name string) *os.File {
+	li := strings.LastIndex(name, "/")
+	if li > 0 {
+		os.MkdirAll(ctx.BaseDirectory+"/"+name[0:li], 0700)
+	}
+	mf, err := os.Create(ctx.BaseDirectory + "/" + name)
+	if err != nil {
+		log.Fatal(err)
+	}
+	return mf
+}
+
+func Add_gpl(f *os.File) {
+	fmt.Fprintln(f, "/* SPDX-License-Identifier: GPL-2.0-only */")
+	fmt.Fprintln(f)
+}
+
+func RestorePCI16Simple(f *os.File, pcidev PCIDevData, addr uint16) {
+	fmt.Fprintf(f, "	pci_write_config16(PCI_DEV(%d, 0x%02x, %d), 0x%02x, 0x%02x%02x);\n",
+		pcidev.Bus, pcidev.Dev, pcidev.Func, addr,
+		pcidev.ConfigDump[addr+1],
+		pcidev.ConfigDump[addr])
+}
+
+func RestorePCI32Simple(f *os.File, pcidev PCIDevData, addr uint16) {
+	fmt.Fprintf(f, "	pci_write_config32(PCI_DEV(%d, 0x%02x, %d), 0x%02x, 0x%02x%02x%02x%02x);\n",
+		pcidev.Bus, pcidev.Dev, pcidev.Func, addr,
+		pcidev.ConfigDump[addr+3],
+		pcidev.ConfigDump[addr+2],
+		pcidev.ConfigDump[addr+1],
+		pcidev.ConfigDump[addr])
+}
+
+func RestoreRCBA32(f *os.File, inteltool InteltoolData, addr uint16) {
+	fmt.Fprintf(f, "\tRCBA32(0x%04x) = 0x%08x;\n", addr, inteltool.RCBA[addr])
+}
+
+type PCISlot struct {
+	PCIAddr
+	alias             string
+	additionalComment string
+	writeEmpty        bool
+}
+
+type DevTreeNode struct {
+	Bus           int
+	Dev           int
+	Func          int
+	Disabled      bool
+	Registers     map[string]string
+	IOs           map[uint16]uint16
+	Children      []DevTreeNode
+	PCISlots      []PCISlot
+	PCIController bool
+	ChildPCIBus   int
+	MissingParent string
+	SubVendor     uint16
+	SubSystem     uint16
+	Chip          string
+	Ops           string
+	Comment       string
+}
+
+var DevTree DevTreeNode
+var MissingChildren map[string][]DevTreeNode = map[string][]DevTreeNode{}
+var unmatchedPCIChips map[PCIAddr]DevTreeNode = map[PCIAddr]DevTreeNode{}
+var unmatchedPCIDevices map[PCIAddr]DevTreeNode = map[PCIAddr]DevTreeNode{}
+
+func Offset(dt *os.File, offset int) {
+	for i := 0; i < offset; i++ {
+		fmt.Fprintf(dt, "\t")
+	}
+}
+
+func MatchDev(dev *DevTreeNode) {
+	for idx := range dev.Children {
+		MatchDev(&dev.Children[idx])
+	}
+
+	for _, slot := range dev.PCISlots {
+		slotChip, ok := unmatchedPCIChips[slot.PCIAddr]
+
+		if !ok {
+			continue
+		}
+
+		if slot.additionalComment != "" && slotChip.Comment != "" {
+			slotChip.Comment = slot.additionalComment + " " + slotChip.Comment
+		} else {
+			slotChip.Comment = slot.additionalComment + slotChip.Comment
+		}
+
+		delete(unmatchedPCIChips, slot.PCIAddr)
+		MatchDev(&slotChip)
+		dev.Children = append(dev.Children, slotChip)
+	}
+
+	if dev.PCIController {
+		for slot, slotDev := range unmatchedPCIChips {
+			if slot.Bus == dev.ChildPCIBus {
+				delete(unmatchedPCIChips, slot)
+				MatchDev(&slotDev)
+				dev.Children = append(dev.Children, slotDev)
+			}
+		}
+	}
+
+	for _, slot := range dev.PCISlots {
+		slotDev, ok := unmatchedPCIDevices[slot.PCIAddr]
+		if !ok {
+			if slot.writeEmpty {
+				dev.Children = append(dev.Children,
+					DevTreeNode{
+						Registers: map[string]string{},
+						Chip:      "pci",
+						Bus:       slot.Bus,
+						Dev:       slot.Dev,
+						Func:      slot.Func,
+						Comment:   slot.additionalComment,
+						Disabled:  true,
+					},
+				)
+			}
+			continue
+		}
+
+		if slot.additionalComment != "" && slotDev.Comment != "" {
+			slotDev.Comment = slot.additionalComment + " " + slotDev.Comment
+		} else {
+			slotDev.Comment = slot.additionalComment + slotDev.Comment
+		}
+
+		MatchDev(&slotDev)
+		dev.Children = append(dev.Children, slotDev)
+		delete(unmatchedPCIDevices, slot.PCIAddr)
+	}
+
+	if dev.MissingParent != "" {
+		for _, child := range MissingChildren[dev.MissingParent] {
+			MatchDev(&child)
+			dev.Children = append(dev.Children, child)
+		}
+		delete(MissingChildren, dev.MissingParent)
+	}
+
+	if dev.PCIController {
+		for slot, slotDev := range unmatchedPCIDevices {
+			if slot.Bus == dev.ChildPCIBus {
+				MatchDev(&slotDev)
+				dev.Children = append(dev.Children, slotDev)
+				delete(unmatchedPCIDevices, slot)
+			}
+		}
+	}
+}
+
+func writeOn(dt *os.File, dev DevTreeNode) {
+	if dev.Disabled {
+		fmt.Fprintf(dt, "off")
+	} else {
+		fmt.Fprintf(dt, "on")
+	}
+}
+
+func WriteDev(dt *os.File, offset int, alias string, dev DevTreeNode) {
+	Offset(dt, offset)
+	switch dev.Chip {
+	case "cpu_cluster", "lapic", "domain", "ioapic":
+		fmt.Fprintf(dt, "device %s 0x%x ", dev.Chip, dev.Dev)
+		writeOn(dt, dev)
+	case "pci", "pnp":
+		if alias != "" {
+			fmt.Fprintf(dt, "device ref %s ", alias)
+		} else {
+			fmt.Fprintf(dt, "device %s %02x.%x ", dev.Chip, dev.Dev, dev.Func)
+		}
+		writeOn(dt, dev)
+	case "i2c":
+		fmt.Fprintf(dt, "device %s %02x ", dev.Chip, dev.Dev)
+		writeOn(dt, dev)
+	default:
+		fmt.Fprintf(dt, "chip %s", dev.Chip)
+	}
+	if dev.Comment != "" {
+		fmt.Fprintf(dt, " # %s", dev.Comment)
+	}
+	fmt.Fprintf(dt, "\n")
+	if dev.Ops != "" {
+		Offset(dt, offset+1)
+		fmt.Fprintf(dt, "ops %s\n", dev.Ops)
+	}
+	if dev.Chip == "pci" && dev.SubSystem != 0 && dev.SubVendor != 0 {
+		Offset(dt, offset+1)
+		fmt.Fprintf(dt, "subsystemid 0x%04x 0x%04x\n", dev.SubVendor, dev.SubSystem)
+	}
+
+	ioapic, ok := IOAPICIRQs[PCIAddr{Bus: dev.Bus, Dev: dev.Dev, Func: dev.Func}]
+	if dev.Chip == "pci" && ok {
+		for pin, irq := range ioapic.IRQNO {
+			if irq != 0 {
+				Offset(dt, offset+1)
+				fmt.Fprintf(dt, "ioapic_irq %d INT%c 0x%x\n", ioapic.APICID, 'A'+pin, irq)
+			}
+		}
+	}
+
+	keys := []string{}
+	for reg, _ := range dev.Registers {
+		keys = append(keys, reg)
+	}
+
+	sort.Strings(keys)
+
+	for _, reg := range keys {
+		val := dev.Registers[reg]
+		Offset(dt, offset+1)
+		fmt.Fprintf(dt, "register \"%s\" = \"%s\"\n", reg, val)
+	}
+
+	ios := []int{}
+	for reg, _ := range dev.IOs {
+		ios = append(ios, int(reg))
+	}
+
+	sort.Ints(ios)
+
+	for _, reg := range ios {
+		val := dev.IOs[uint16(reg)]
+		Offset(dt, offset+1)
+		fmt.Fprintf(dt, "io 0x%x = 0x%x\n", reg, val)
+	}
+
+	for _, child := range dev.Children {
+		alias = ""
+		for _, slot := range dev.PCISlots {
+			if slot.PCIAddr.Bus == child.Bus &&
+				slot.PCIAddr.Dev == child.Dev && slot.PCIAddr.Func == child.Func {
+				alias = slot.alias
+			}
+		}
+		WriteDev(dt, offset+1, alias, child)
+	}
+
+	Offset(dt, offset)
+	fmt.Fprintf(dt, "end\n")
+}
+
+func PutChip(domain string, cur DevTreeNode) {
+	MissingChildren[domain] = append(MissingChildren[domain], cur)
+}
+
+func PutPCIChip(addr PCIDevData, cur DevTreeNode) {
+	unmatchedPCIChips[addr.PCIAddr] = cur
+}
+
+func PutPCIDevParent(addr PCIDevData, comment string, parent string) {
+	cur := DevTreeNode{
+		Registers:     map[string]string{},
+		Chip:          "pci",
+		Bus:           addr.Bus,
+		Dev:           addr.Dev,
+		Func:          addr.Func,
+		MissingParent: parent,
+		Comment:       comment,
+	}
+	if addr.ConfigDump[0xa] == 0x04 && addr.ConfigDump[0xb] == 0x06 {
+		cur.PCIController = true
+		cur.ChildPCIBus = int(addr.ConfigDump[0x19])
+
+		loopCtr := 0
+		for capPtr := addr.ConfigDump[0x34]; capPtr != 0; capPtr = addr.ConfigDump[capPtr+1] {
+			/* Avoid hangs. There are only 0x100 different possible values for capPtr.
+			   If we iterate longer than that, we're in endless loop. */
+			loopCtr++
+			if loopCtr > 0x100 {
+				break
+			}
+			if addr.ConfigDump[capPtr] == 0x0d {
+				cur.SubVendor = GetLE16(addr.ConfigDump[capPtr+4 : capPtr+6])
+				cur.SubSystem = GetLE16(addr.ConfigDump[capPtr+6 : capPtr+8])
+			}
+		}
+	} else {
+		cur.SubVendor = GetLE16(addr.ConfigDump[0x2c:0x2e])
+		cur.SubSystem = GetLE16(addr.ConfigDump[0x2e:0x30])
+	}
+	unmatchedPCIDevices[addr.PCIAddr] = cur
+}
+
+func PutPCIDev(addr PCIDevData, comment string) {
+	PutPCIDevParent(addr, comment, "")
+}
+
+type GenericPCI struct {
+	Comment       string
+	Bus0Subdiv    string
+	MissingParent string
+}
+
+type GenericVGA struct {
+	GenericPCI
+}
+
+type DSDTInclude struct {
+	Comment string
+	File    string
+}
+
+type DSDTDefine struct {
+	Key     string
+	Comment string
+	Value   string
+}
+
+var DSDTIncludes []DSDTInclude
+var DSDTPCI0Includes []DSDTInclude
+var DSDTDefines []DSDTDefine
+
+func (g GenericPCI) Scan(ctx Context, addr PCIDevData) {
+	PutPCIDevParent(addr, g.Comment, g.MissingParent)
+}
+
+var IGDEnabled bool = false
+
+func (g GenericVGA) Scan(ctx Context, addr PCIDevData) {
+	KconfigString["VGA_BIOS_ID"] = fmt.Sprintf("%04x,%04x",
+		addr.PCIVenID,
+		addr.PCIDevID)
+	PutPCIDevParent(addr, g.Comment, g.MissingParent)
+	IGDEnabled = true
+}
+
+func makeKconfigName(ctx Context) {
+	kn := Create(ctx, "Kconfig.name")
+	defer kn.Close()
+
+	fmt.Fprintf(kn, "config %s\n\tbool \"%s\"\n", ctx.KconfigName, ctx.Model)
+}
+
+func makeComment(name string) string {
+	cmt, ok := KconfigComment[name]
+	if !ok {
+		return ""
+	}
+	return " # " + cmt
+}
+
+func makeKconfig(ctx Context) {
+	kc := Create(ctx, "Kconfig")
+	defer kc.Close()
+
+	fmt.Fprintf(kc, "if %s\n\n", ctx.KconfigName)
+
+	fmt.Fprintf(kc, "config BOARD_SPECIFIC_OPTIONS\n\tdef_bool y\n")
+	keys := []string{}
+	for name, val := range KconfigBool {
+		if val {
+			keys = append(keys, name)
+		}
+	}
+
+	sort.Strings(keys)
+
+	for _, name := range keys {
+		fmt.Fprintf(kc, "\tselect %s%s\n", name, makeComment(name))
+	}
+
+	keys = nil
+	for name, val := range KconfigBool {
+		if !val {
+			keys = append(keys, name)
+		}
+	}
+
+	sort.Strings(keys)
+
+	for _, name := range keys {
+		fmt.Fprintf(kc, `
+config %s%s
+	bool
+	default n
+`, name, makeComment(name))
+	}
+
+	keys = nil
+	for name, _ := range KconfigString {
+		keys = append(keys, name)
+	}
+
+	sort.Strings(keys)
+
+	for _, name := range keys {
+		fmt.Fprintf(kc, `
+config %s%s
+	string
+	default "%s"
+`, name, makeComment(name), KconfigString[name])
+	}
+
+	keys = nil
+	for name, _ := range KconfigHex {
+		keys = append(keys, name)
+	}
+
+	sort.Strings(keys)
+
+	for _, name := range keys {
+		fmt.Fprintf(kc, `
+config %s%s
+	hex
+	default 0x%x
+`, name, makeComment(name), KconfigHex[name])
+	}
+
+	keys = nil
+	for name, _ := range KconfigInt {
+		keys = append(keys, name)
+	}
+
+	sort.Strings(keys)
+
+	for _, name := range keys {
+		fmt.Fprintf(kc, `
+config %s%s
+	int
+	default %d
+`, name, makeComment(name), KconfigInt[name])
+	}
+
+	fmt.Fprintf(kc, "endif\n")
+}
+
+const MoboDir = "/src/mainboard/"
+
+func makeVendor(ctx Context) {
+	vendor := ctx.Vendor
+	vendorSane := ctx.SaneVendor
+	vendorDir := *FlagOutDir + MoboDir + vendorSane
+	vendorUpper := strings.ToUpper(vendorSane)
+	kconfig := vendorDir + "/Kconfig"
+	if _, err := os.Stat(kconfig); os.IsNotExist(err) {
+		f, err := os.Create(kconfig)
+		if err != nil {
+			log.Fatal(err)
+		}
+		defer f.Close()
+		f.WriteString(`if VENDOR_` + vendorUpper + `
+
+choice
+	prompt "Mainboard model"
+
+source "src/mainboard/` + vendorSane + `/*/Kconfig.name"
+
+endchoice
+
+source "src/mainboard/` + vendorSane + `/*/Kconfig"
+
+config MAINBOARD_VENDOR
+	string
+	default "` + vendor + `"
+
+endif # VENDOR_` + vendorUpper + "\n")
+	}
+	kconfigName := vendorDir + "/Kconfig.name"
+	if _, err := os.Stat(kconfigName); os.IsNotExist(err) {
+		f, err := os.Create(kconfigName)
+		if err != nil {
+			log.Fatal(err)
+		}
+		defer f.Close()
+		f.WriteString(`config VENDOR_` + vendorUpper + `
+	bool "` + vendor + `"
+`)
+	}
+
+}
+
+func GuessECGPE(ctx Context) int {
+	/* FIXME:XX Use iasl -d and/or better parsing  */
+	dsdt := ctx.InfoSource.GetACPI()["DSDT"]
+	idx := bytes.Index(dsdt, []byte{0x08, '_', 'G', 'P', 'E', 0x0a}) /* Name (_GPE, byte).  */
+	if idx > 0 {
+		return int(dsdt[idx+6])
+	}
+	return -1
+}
+
+func GuessSPDMap(ctx Context) []uint8 {
+	dmi := ctx.InfoSource.GetDMI()
+
+	if dmi.Vendor == "LENOVO" {
+		return []uint8{0x50, 0x52, 0x51, 0x53}
+	}
+	return []uint8{0x50, 0x51, 0x52, 0x53}
+}
+
+func main() {
+	flag.Parse()
+
+	ctx := Context{}
+
+	ctx.InfoSource = MakeLogReader()
+
+	dmi := ctx.InfoSource.GetDMI()
+
+	ctx.Vendor = dmi.Vendor
+
+	if dmi.Vendor == "LENOVO" {
+		ctx.Model = dmi.Version
+	} else {
+		ctx.Model = dmi.Model
+	}
+
+	if dmi.IsLaptop {
+		KconfigBool["SYSTEM_TYPE_LAPTOP"] = true
+	}
+	ctx.SaneVendor = sanitize(ctx.Vendor)
+	for {
+		last := ctx.SaneVendor
+		for _, suf := range []string{"_inc", "_co", "_corp"} {
+			ctx.SaneVendor = strings.TrimSuffix(ctx.SaneVendor, suf)
+		}
+		if last == ctx.SaneVendor {
+			break
+		}
+	}
+	ctx.MoboID = ctx.SaneVendor + "/" + sanitize(ctx.Model)
+	ctx.KconfigName = "BOARD_" + strings.ToUpper(ctx.SaneVendor+"_"+sanitize(ctx.Model))
+	ctx.BaseDirectory = *FlagOutDir + MoboDir + ctx.MoboID
+	KconfigString["MAINBOARD_DIR"] = ctx.MoboID
+	KconfigString["MAINBOARD_PART_NUMBER"] = ctx.Model
+
+	os.MkdirAll(ctx.BaseDirectory, 0700)
+
+	makeVendor(ctx)
+
+	ScanRoot(ctx)
+
+	if IGDEnabled {
+		KconfigBool["MAINBOARD_HAS_LIBGFXINIT"] = true
+		KconfigComment["MAINBOARD_HAS_LIBGFXINIT"] = "FIXME: check this"
+		AddRAMStageFile("gma-mainboard.ads", "CONFIG_MAINBOARD_USE_LIBGFXINIT")
+	}
+
+	if len(BootBlockFiles) > 0 || len(ROMStageFiles) > 0 || len(RAMStageFiles) > 0 || len(SMMFiles) > 0 {
+		mf := Create(ctx, "Makefile.mk")
+		defer mf.Close()
+		writeMF(mf, BootBlockFiles, "bootblock")
+		writeMF(mf, ROMStageFiles, "romstage")
+		writeMF(mf, RAMStageFiles, "ramstage")
+		writeMF(mf, SMMFiles, "smm")
+	}
+
+	devtree := Create(ctx, "devicetree.cb")
+	defer devtree.Close()
+
+	MatchDev(&DevTree)
+	WriteDev(devtree, 0, "", DevTree)
+
+	if MainboardInit != "" || MainboardEnable != "" || MainboardIncludes != nil {
+		mainboard := Create(ctx, "mainboard.c")
+		defer mainboard.Close()
+		Add_gpl(mainboard)
+		mainboard.WriteString("#include <device/device.h>\n")
+		for _, include := range MainboardIncludes {
+			mainboard.WriteString("#include <" + include + ">\n")
+		}
+		mainboard.WriteString("\n")
+		if MainboardInit != "" {
+			mainboard.WriteString(`static void mainboard_init(struct device *dev)
+{
+` + MainboardInit + "}\n\n")
+		}
+		if MainboardInit != "" || MainboardEnable != "" {
+			mainboard.WriteString("static void mainboard_enable(struct device *dev)\n{\n")
+			if MainboardInit != "" {
+				mainboard.WriteString("\tdev->ops->init = mainboard_init;\n\n")
+			}
+			mainboard.WriteString(MainboardEnable)
+			mainboard.WriteString("}\n\n")
+			mainboard.WriteString(`struct chip_operations mainboard_ops = {
+	.enable_dev = mainboard_enable,
+};
+`)
+		}
+	}
+
+	bi := Create(ctx, "board_info.txt")
+	defer bi.Close()
+
+	fixme := ""
+
+	if dmi.IsLaptop {
+		bi.WriteString("Category: laptop\n")
+	} else {
+		bi.WriteString("Category: desktop\n")
+		fixme += "check category, "
+	}
+
+	missing := "ROM package, ROM socketed"
+
+	if ROMProtocol != "" {
+		fmt.Fprintf(bi, "ROM protocol: %s\n", ROMProtocol)
+	} else {
+		missing += ", ROM protocol"
+	}
+
+	if FlashROMSupport != "" {
+		fmt.Fprintf(bi, "Flashrom support: %s\n", FlashROMSupport)
+	} else {
+		missing += ", Flashrom support"
+	}
+
+	missing += ", Release year"
+
+	if fixme != "" {
+		fmt.Fprintf(bi, "FIXME: %s, put %s\n", fixme, missing)
+	} else {
+		fmt.Fprintf(bi, "FIXME: put %s\n", missing)
+	}
+
+	if ROMSizeKB == 0 {
+		KconfigBool["BOARD_ROMSIZE_KB_2048"] = true
+		KconfigComment["BOARD_ROMSIZE_KB_2048"] = "FIXME: correct this"
+	} else {
+		KconfigBool[fmt.Sprintf("BOARD_ROMSIZE_KB_%d", ROMSizeKB)] = true
+	}
+
+	makeKconfig(ctx)
+	makeKconfigName(ctx)
+
+	dsdt := Create(ctx, "dsdt.asl")
+	defer dsdt.Close()
+
+	for _, define := range DSDTDefines {
+		if define.Comment != "" {
+			fmt.Fprintf(dsdt, "\t/* %s. */\n", define.Comment)
+		}
+		dsdt.WriteString("#define " + define.Key + " " + define.Value + "\n")
+	}
+
+	Add_gpl(dsdt)
+	dsdt.WriteString(
+		`
+#include <acpi/acpi.h>
+
+DefinitionBlock(
+	"dsdt.aml",
+	"DSDT",
+	ACPI_DSDT_REV_2,
+	OEM_ID,
+	ACPI_TABLE_CREATOR,
+	0x20141018	/* OEM revision */
+)
+{
+	#include <acpi/dsdt_top.asl>
+	#include "acpi/platform.asl"
+`)
+
+	for _, x := range DSDTIncludes {
+		if x.Comment != "" {
+			fmt.Fprintf(dsdt, "\t/* %s. */\n", x.Comment)
+		}
+		fmt.Fprintf(dsdt, "\t#include <%s>\n", x.File)
+	}
+
+	dsdt.WriteString(`
+	Device (\_SB.PCI0)
+	{
+`)
+	for _, x := range DSDTPCI0Includes {
+		if x.Comment != "" {
+			fmt.Fprintf(dsdt, "\t/* %s. */\n", x.Comment)
+		}
+		fmt.Fprintf(dsdt, "\t\t#include <%s>\n", x.File)
+	}
+	dsdt.WriteString(
+		`	}
+}
+`)
+
+	if IGDEnabled {
+		gma := Create(ctx, "gma-mainboard.ads")
+		defer gma.Close()
+
+		gma.WriteString(`-- SPDX-License-Identifier: GPL-2.0-or-later
+
+with HW.GFX.GMA;
+with HW.GFX.GMA.Display_Probing;
+
+use HW.GFX.GMA;
+use HW.GFX.GMA.Display_Probing;
+
+private package GMA.Mainboard is
+
+   -- FIXME: check this
+   ports : constant Port_List :=
+     (DP1,
+      DP2,
+      DP3,
+      HDMI1,
+      HDMI2,
+      HDMI3,
+      Analog,
+      LVDS,
+      eDP);
+
+end GMA.Mainboard;
+`)
+	}
+}
diff --git a/util/autoport/rce823.go b/util/autoport/rce823.go
new file mode 100644
index 00000000..7c921093
--- /dev/null
+++ b/util/autoport/rce823.go
@@ -0,0 +1,39 @@
+package main
+
+import "fmt"
+
+type rce823 struct {
+	variant string
+}
+
+func (r rce823) Scan(ctx Context, addr PCIDevData) {
+	if addr.Dev == 0 && addr.Func == 0 {
+		cur := DevTreeNode{
+			Chip:    "drivers/ricoh/rce822",
+			Comment: "Ricoh cardreader",
+			Registers: map[string]string{
+
+				"sdwppol":      fmt.Sprintf("%d", (addr.ConfigDump[0xfb]&2)>>1),
+				"disable_mask": fmt.Sprintf("0x%x", addr.ConfigDump[0xcb]),
+			},
+			PCISlots: []PCISlot{
+				PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 0}, writeEmpty: false},
+				PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 1}, writeEmpty: false},
+				PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 2}, writeEmpty: false},
+				PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 3}, writeEmpty: false},
+				PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 4}, writeEmpty: false},
+				PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 5}, writeEmpty: false},
+				PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 6}, writeEmpty: false},
+				PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 7}, writeEmpty: false},
+			},
+		}
+		PutPCIChip(addr, cur)
+	}
+	PutPCIDev(addr, "Ricoh SD card reader")
+	KconfigBool["DRIVERS_RICOH_RCE822"] = true
+}
+
+func init() {
+	RegisterPCI(0x1180, 0xe822, rce823{})
+	RegisterPCI(0x1180, 0xe823, rce823{})
+}
diff --git a/util/autoport/readme.md b/util/autoport/readme.md
new file mode 100644
index 00000000..b546120f
--- /dev/null
+++ b/util/autoport/readme.md
@@ -0,0 +1,457 @@
+# Porting coreboot using autoport
+
+## Supported platforms
+
+### Chipset
+For any Sandy Bridge or Ivy Bridge platform the generated result should
+be bootable, possibly with minor fixes.
+
+### EC / SuperIO
+EC support is likely to work on Intel-based thinkpads. Other laptops are
+likely to miss EC support. SuperIO support on desktops is more likely to
+work out of the box than any EC.
+
+## How to use autoport
+
+Enable as many devices as possible in the firmware setup of your system.
+This is useful to detect as many devices as possible and make the port
+more complete, as disabled devices cannot be detected.
+
+Boot into target machine under any Linux-based distribution and install
+the following tools on it:
+* `gcc`
+* `golang`
+* `lspci`
+* `dmidecode`
+* `acpidump` (part of `acpica` on some distros)
+
+Clone the coreboot tree and `cd` into it. For more detailed steps, refer
+to Rookie Guide, Lesson 1. Afterwards, run these commands:
+
+		cd util/ectool
+		make
+		cd ../inteltool
+		make
+		cd ../superiotool
+		make
+		cd ../autoport
+		go build
+		sudo ./autoport --input_log=logs --make_logs --coreboot_dir=../..
+
+	Note: in case you have problems getting gcc and golang on the target
+	machine, you can compile the utilities on another computer and copy
+	the binaries to the target machine. You will still need the other
+	listed programs on the target machine, but you may place them in the
+	same directory as autoport.
+
+Check for unknown detected PCI devices, e.g.:
+
+		Unknown PCI device 8086:0085, assuming removable
+
+If autoport says `assuming removable`, you are fine. If it doesn't,
+you may want to add the relevant PCI IDs to autoport. Run `lspci -nn`
+and check which device this is using the PCI ID. Devices which are not
+part of the chipset, such as GPUs or network cards, can be considered
+removable, whereas devices inside the CPU or the PCH such as integrated
+GPUs and bus controllers (SATA, USB, LPC, SMBus...) are non-removable.
+
+Your board has now been added to the tree. However, do not flash it
+in its current state. It can brick your machine. Instead, keep this
+new port and the logs from `util/autoport/logs` somewhere safe. The
+following steps will back up your current firmware, which is always
+recommended, since coreboot may not boot on the first try.
+
+Disassemble your computer and find the flash chip(s). Since there could be
+more than one, this guide will refer to "flash chips" as one or more chips.
+Refer to <https://flashrom.org/Technology> as a reference. The flash chip is
+usually in a `SOIC-8` (2x4 pins, 200mil) or `SOIC-16` (2x8 pins) package. As
+it can be seen on flashrom's wiki, the former package is like any other 8-pin
+chip on the mainboard, but it is slightly larger. The latter package is much
+easier to locate. Always make sure it is a flash chip by looking up what its
+model, printed on it, refers to.
+
+There may be a smaller flash chip for the EC on some laptops, and other chips
+such as network cards may use similar flash chips. These should be left as-is.
+If in doubt, ask!
+
+Once located, use an external flasher to read the flash chips with `flashrom -r`.
+Verify with `flashrom -v` several times that reading is consistent. If it is not,
+troubleshoot your flashing setup. Save the results somewhere safe, preferably on
+media that cannot be easily overwritten and on several devices. You may need this
+later. The write process erases the flash chips first, and erased data on a flash
+chip is lost for a very long time, usually forever!
+
+Compile coreboot for your ported mainboard with some console enabled. The most
+common ones are EHCI debug, serial port and SPI flash console as a last resort.
+If your system is a laptop and has a dedicated video card, you may need to add
+a video BIOS (VBIOS) to coreboot to be able to see any video output. Desktop
+video cards, as well as some MXM video cards, have this VBIOS on a flash chip
+on the card's PCB, so this step is not necessary for them.
+
+Flash coreboot on the machine. On recent Intel chipsets, the flash space is split
+in several regions. Only the one known as "BIOS region" should be flashed. If
+there is only one flash chip present, this is best done by adding the `--ifd`
+and `-i bios` parameters flashrom has (from v1.0 onwards) to specify what flash
+descriptor region it should operate on. If the ME (Management Engine) region is
+not readable, which is the case on most systems, use the `--noverify-all`
+parameter as well.
+
+For systems with two flash chips, this is not so easy. It is probably better to
+ask in coreboot or flashrom communication channels, such as via IRC or on the
+mailing lists.
+
+Once flashed, try to boot. Anything is possible. If a log is generated, save it
+and use it to address any issues. See the next section for useful information.
+Find all the sections marked with `FIXME` and correct them.
+
+Send your work to review.coreboot.org. I mean it, your effort is very appreciated.
+Refer to Rookie Guide, Lesson 2 for instructions on how to submit a patch.
+
+## Manual fixes
+### SPD
+In order to initialize the RAM memory, coreboot needs to know its timings, which vary between
+modules. Socketed RAM has a small EEPROM chip, which is accessible via SMBus and contains the
+timing data. This data is usually known as SPD. Unfortunately, the SMBus addresses may not
+correlate with the RAM slots and cannot always be detected automatically. The address map is
+encoded in function `mainboard_get_spd` in `romstage.c`. By default, autoport uses the most
+common map `0x50, 0x51, 0x52, 0x53` on everything except for Lenovo systems, which are known
+to use `0x50, 0x52, 0x51, 0x53`. To detect the correct memory map, the easiest way is to boot
+on the vendor firmware with just one module in channel 0, slot 0, and check the SMBus address
+the EEPROM has. Under Linux, you can use these commands to see what is on SMBus:
+
+	$ sudo modprobe i2c-dev
+	$ sudo modprobe i2c-i801
+	$ sudo i2cdetect -l
+	i2c-0	i2c		i915 gmbus ssc				I2C adapter
+	i2c-1	i2c		i915 gmbus vga				I2C adapter
+	i2c-2	i2c		i915 gmbus panel			I2C adapter
+	i2c-3	i2c		i915 gmbus dpc				I2C adapter
+	i2c-4	i2c		i915 gmbus dpb				I2C adapter
+	i2c-5	i2c		i915 gmbus dpd				I2C adapter
+	i2c-6	i2c		DPDDC-B					I2C adapter
+	i2c-7	i2c		DPDDC-C					I2C adapter
+	i2c-8	i2c		DPDDC-D					I2C adapter
+	i2c-9	smbus		SMBus I801 adapter at 0400		SMBus adapter
+
+	$ sudo i2cdetect 9
+	WARNING! This program can confuse your I2C bus, cause data loss and worse!
+	I will probe file /dev/i2c-9.
+	I will probe address range 0x03-0x77.
+	Continue? [Y/n] y
+	     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
+	00:          -- -- -- -- -- 08 -- -- -- -- -- -- --
+	10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
+	20: -- -- -- -- 24 -- -- -- -- -- -- -- -- -- -- --
+	30: 30 31 -- -- -- -- -- -- -- -- -- -- -- -- -- --
+	40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
+	50: 50 -- -- -- 54 55 56 57 -- -- -- -- 5c 5d 5e 5f
+	60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
+	70: -- -- -- -- -- -- -- --
+
+Make sure to replace the `9` on the last command with the bus number for SMBus on
+your system. Here, there is a module at address `0x50`. Since only one module was
+installed on the first slot of the first channel, we know the first position of
+the SPD array must be `0x50`. After testing all the slots, your `mainboard_get_spd`
+should look similar to this:
+
+	void mainboard_get_spd(spd_raw_data *spd) {
+		read_spd(&spd[0], 0x50);
+		read_spd(&spd[1], 0x51);
+		read_spd(&spd[2], 0x52);
+		read_spd(&spd[3], 0x53);
+	}
+
+Note that there should be one line per memory slot on the mainboard.
+
+Note: slot labelling may be missing or unreliable. Use `inteltool` to see
+which slots have modules in them.
+
+This procedure is ideal, if your RAM is socketed. If you have soldered RAM,
+remove any socketed memory modules and check if any EEPROM appears on SMBus.
+If this is the case, you can proceed as if the RAM was socketed. However,
+you may have to guess some entries if there multiple EEPROMs appear.
+
+Most of the time, soldered RAM does not have an EEPROM. Instead, the SPD data is
+inside the main flash chip where the firmware is. If this is the case, you need
+to generate the SPD data to use with coreboot. Look at `inteltool.log`. There
+should be something like this:
+
+	/* SPD matching current mode:  */
+	/* CH0S0  */
+	00: 92 11 0b 03 04 00 00 09 03 52 01 08 0a 00 80 00
+	10: 6e 78 6e 32 6e 11 18 81 20 08 3c 3c 00 f0 00 00
+	20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 65 00
+	40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6d 17
+	80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	/* CH1S0  */
+	00: 92 11 0b 03 04 00 00 09 03 52 01 08 0a 00 80 00
+	10: 6e 78 6e 32 6e 11 18 81 20 08 3c 3c 00 f0 00 00
+	20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 65 00
+	40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6d 17
+	80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+
+This is not a full-fledged SPD dump, as it only lists
+the currently-used speed configuration, and lacks info
+such as a serial number, vendor and model. Use `xxd`
+to create a binary file with this SPD data:
+
+	$ cat | xxd -r > spd.bin  <<EOF
+	00: 92 11 0b 03 04 00 00 09 03 52 01 08 0a 00 80 00
+	10: 6e 78 6e 32 6e 11 18 81 20 08 3c 3c 00 f0 00 00
+	20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 65 00
+	40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6d 17
+	80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+	EOF (press Ctrl + D)
+
+Then, move the generated file into your mainboard's directory
+and hook it up to the build system by adding the following
+lines to `Makefile.mk`:
+
+	cbfs-files-y += spd.bin
+	spd.bin-file := spd.bin
+	spd.bin-type := raw
+
+Now we need coreboot to use this SPD file. The following example
+shows a hybrid configuration, in which one module is soldered and
+the other one is socketed:
+
+	void mainboard_get_spd(spd_raw_data *spd)
+	{
+		void *spd_file;
+		size_t spd_file_len = 0;
+		/* C0S0 is a soldered RAM with no real SPD. Use stored SPD. */
+		spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_RAW,
+						 &spd_file_len);
+		if (spd_file && spd_file_len >= 128)
+			memcpy(&spd[0], spd_file, 128);
+
+		/* C1S0 is a physical slot. */
+		read_spd(&spd[2], 0x52);
+	}
+
+If several slots are soldered there are two ways to handle them:
+
+* If all use the same SPD data, use the same file for all the slots. Do
+  not forget to copy the data on all the array elements that need it.
+* If they use different data, use several files.
+
+If memory initialization is not working, in particular write training (timB)
+on DIMM's second rank fails, try enabling rank 1 mirroring, which can't be
+detected by inteltool. It is described by SPD field "Address Mapping from Edge
+Connector to DRAM", byte `63` (`0x3f`). Bit 0 describes Rank 1 Mapping,
+0 = standard, 1 = mirrored; set it to 1. Bits 1-7 are reserved.
+
+### `board_info.txt`
+
+`board_info.txt` is a text file used in the board status page to list all
+the supported boards and their specifications. Most of the information
+cannot be detected by autoport. Common entries are:
+
+* `ROM package`, `ROM protocol` and `ROM socketed`:
+  These refer to the flash chips you found earlier. You can visit
+  <https://flashrom.org/Technology> for more information.
+
+* `Release year`: Use the power of Internet to find that information.
+* `Category`: This describes the type of mainboard you have.
+  Valid categories are:
+  * `desktop`. Desktops and workstations.
+  * `server`. Servers.
+  * `laptop`. Laptops, notebooks and netbooks.
+  * `half`. Embedded / PC/104 / Half-size boards.
+  * `mini`. Mini-ITX / Micro-ITX / Nano-ITX
+  * `settop`. Set-top-boxes / Thin clients.
+  * `eval`. Development / Evaluation Boards.
+  * `sbc`. Single-Board computer.
+  * `emulation`: Virtual machines and emulators. May require especial care
+                 as they often behave differently from real counterparts.
+  * `misc`. Anything not fitting the categories above. Not recommended.
+
+* `Flashrom support`: This means whether the internal programmer is usable.
+  If flashing coreboot internally works, this should be set to `y`. Else,
+  feel free to investigate why it is not working.
+
+### `USBDEBUG_HCD_INDEX`
+
+Which controller the most easily accessible USB debug port is. On Intel,
+1 is for `00:1d.0` and 2 is for `00:1a.0` (yes, it's reversed). Refer to
+<https://www.coreboot.org/EHCI_Debug_Port> for more info.
+
+If you are able to use EHCI debug without setting the HCD index manually,
+this is correct.
+
+### `BOARD_ROMSIZE_KB_2048`
+
+This parameter refers to the total size of the flash chips coreboot will be in.
+This value must be correct for S3 resume to work properly. This parameter also
+defines the size of the generated coreboot image, but that is not a major issue
+since tools like `dd` can be used to cut fragments of a coreboot image to flash
+on smaller chips.
+
+This should be detected automatically, but it may not be detected properly in
+some cases. If it was not detected, put the correct total size here to serve
+as a sane default when configuring coreboot.
+
+### `DRAM_RESET_GATE_GPIO`
+
+When the computer is suspended to RAM (ACPI S3), the RAM reset signal must not
+reach the RAM modules. Otherwise, the computer will not resume and any opened
+programs will be lost. This is done by powering down a MOSFET, which disconnects
+the reset signal from the RAM modules. Most manufacturers put this gate on GPIO
+60 but Lenovo is known to put it on GPIO 10. If suspending and resuming works,
+this value is correct. This can also be determined from the board's schematics.
+
+## GNVS
+
+`mainboard_fill_gnvs` sets values in GNVS, which then ACPI makes use of for
+various power-related functions. Normally, there is no need to modify it
+on laptops (desktops have no "lid"!) but it makes sense to proofread it.
+
+## `gfx.ndid` and `gfx.did`
+
+Those describe which video outputs are declared in ACPI tables.
+Normally, there is no need to have these values, but if you miss some
+non-standard video output, you can declare it there. Bit 31 is set to
+indicate the presence of the output. Byte 1 is the type and byte 0 is
+used for disambigution so that ID composed of byte 1 and 0 is unique.
+
+Types are:
+* 1 = VGA
+* 2 = TV
+* 3 = DVI
+* 4 = LCD
+
+## `c*_acpower` and `c*_battery`
+
+Which mwait states to match to which ACPI levels. Normally, there is no
+need to modify anything unless your device has very special power saving
+requirements.
+
+## `install_intel_vga_int15_handler`
+
+This is used with the Intel VGA BIOS, which is not the default option.
+It is more error-prone than open-source graphics initialization, so do
+not bother with this until your mainboard boots. This is a function
+which takes four parameters:
+1.  Which type of LCD panel is connected.
+2.  Panel fit.
+3.  Boot display.
+4.  Display type.
+
+Refer to `src/drivers/intel/gma/int15.h` to see which values can be used.
+For desktops, there is no LCD panel directly connected to the Intel GPU,
+so the first parameter should be `GMA_INT15_ACTIVE_LFP_NONE`. On other
+mainboards, it depends.
+
+## CMOS options
+
+Due to the poor state of CMOS support in coreboot, autoport does not
+support it and this probably won't change until the format in the tree
+improves. If you really care about CMOS options:
+
+* Create files `cmos.layout` and `cmos.default`
+* Enable `HAVE_OPTION_TABLE` and `HAVE_CMOS_DEFAULT` in `Kconfig`
+
+## EC (lenovo)
+
+You need to set `has_keyboard_backlight` (backlit keyboard like X230),
+`has_power_management_beeps` (optional beeps when e.g. plugging the cord
+in) and `has_uwb` (third MiniPCIe slot) in accordance to functions available
+on your machine
+
+In rare cases autoport is unable to detect GPE. You can detect it from
+dmesg or ACPI tables. Look for line in dmesg like
+
+	ACPI: EC: GPE = 0x11, I/O: command/status = 0x66, data = 0x62
+
+This means that GPE is `0x11` in ACPI notation. This is the correct
+value for `THINKPAD_EC_GPE`. To get the correct value for `GPE_EC_SCI`
+you need to substract `0x10`, so value for it is `1`.
+
+The pin used to wake the machine from EC is guessed. If your machine doesn't
+wake on lid open and pressing of Fn, change `GPE_EC_WAKE`.
+
+Keep `GPE_EC_WAKE` and `GPE_EC_SCI` in sync with `gpi*_routing`.
+`gpi*_routing` matching `GPE_EC_WAKE` or `GPE_EC_SCI` is set to `2`
+and all others are absent.
+
+If your dock has LPC wires or needs some special treatement you may
+need to add codes to initialize the dock and support code to
+DSDT. See the `init_dock()` for `x60`, `x200` or `x201`.
+
+## EC (generic laptop)
+
+Almost any laptop has an embedded controller. In a nutshell, it's a
+small, low-powered computer designed to be used on laptops. Exact
+functionality differs between machines. Its main functions include:
+
+* Control of power and rfkill to different component
+* Keyboard (PS/2) interface implementation
+* Battery, AC, LID and thermal information exporting
+* Hotkey support
+
+autoport automatically attempts to restore the dumped config but it
+may or may not work and may even lead to a hang or powerdown. If your
+machine stops at `Replaying EC dump ...` try commenting EC replay out
+
+autoport tries to detect if machine has PS/2 interface and if so calls
+`pc_keyboard_init` and exports relevant ACPI objects. If detection fails
+you may have to add them yourself
+
+ACPI methods `_PTS` (prepare to sleep) and `_WAK` (wake) are executed
+when transitioning to sleep or wake state respectively. You may need to
+add power-related calls there to either shutdown some components or to
+add a workaround to stop giving OS thermal info until next refresh.
+
+For exporting the battery/AC/LID/hotkey/thermal info you need to write
+`acpi/ec.asl`. For an easy example look into `apple/macbook21` or
+`packardbell/ms2290`. For information about needed methods consult
+relevant ACPI specs. Tracing which EC events can be done using
+[dynamic debug](https://wiki.ubuntu.com/Kernel/Reference/ACPITricksAndTips)
+
+EC GPE needs to be routed to SCI in order for OS in order to receive
+EC events like "hotkey X pressed" or "AC plugged". autoport attempts
+to detect GPE but in rare cases may fail. You can detect it from
+dmesg or ACPI tables. Look for line in dmesg like
+
+	ACPI: EC: GPE = 0x11, I/O: command/status = 0x66, data = 0x62
+
+This means that GPE is `0x11` in ACPI notation. This is the correct
+value for `_GPE`.
+
+Keep GPE in sync with `gpi*_routing`.
+`gpi*_routing` matching `GPE - 0x10` is set to `2`
+and all others are absent. If EC has separate wake pin
+then this GPE needs to be routed as well
diff --git a/util/autoport/root.go b/util/autoport/root.go
new file mode 100644
index 00000000..7e9e8145
--- /dev/null
+++ b/util/autoport/root.go
@@ -0,0 +1,47 @@
+package main
+
+import "fmt"
+import "os"
+
+var supportedPCIDevices map[uint32]PCIDevice = map[uint32]PCIDevice{}
+var PCIMap map[PCIAddr]PCIDevData = map[PCIAddr]PCIDevData{}
+
+func ScanRoot(ctx Context) {
+	for _, pciDev := range ctx.InfoSource.GetPCIList() {
+		PCIMap[pciDev.PCIAddr] = pciDev
+	}
+	for _, pciDev := range ctx.InfoSource.GetPCIList() {
+		vendevid := (uint32(pciDev.PCIDevID) << 16) | uint32(pciDev.PCIVenID)
+
+		dev, ok := supportedPCIDevices[vendevid]
+		if !ok {
+			if pciDev.PCIAddr.Bus != 0 {
+				fmt.Printf("Unknown PCI device %04x:%04x, assuming removable\n",
+					pciDev.PCIVenID, pciDev.PCIDevID)
+				continue
+			}
+			fmt.Printf("Unsupported PCI device %04x:%04x\n",
+				pciDev.PCIVenID, pciDev.PCIDevID)
+			dev = GenericPCI{Comment: fmt.Sprintf("Unsupported PCI device %04x:%04x",
+				pciDev.PCIVenID, pciDev.PCIDevID)}
+		}
+		dev.Scan(ctx, pciDev)
+	}
+	if SouthBridge == nil {
+		fmt.Println("Could not detect southbridge. Aborting!")
+		os.Exit(1)
+	}
+	dmi := ctx.InfoSource.GetDMI()
+	if !dmi.IsLaptop {
+		NoEC(ctx)
+	} else if dmi.Vendor == "LENOVO" {
+		LenovoEC(ctx)
+	} else {
+		FIXMEEC(ctx)
+	}
+}
+
+func RegisterPCI(VenID uint16, DevID uint16, dev PCIDevice) {
+	vendevid := (uint32(DevID) << 16) | uint32(VenID)
+	supportedPCIDevices[vendevid] = dev
+}
diff --git a/util/autoport/sandybridge.go b/util/autoport/sandybridge.go
new file mode 100644
index 00000000..bd7f0f0c
--- /dev/null
+++ b/util/autoport/sandybridge.go
@@ -0,0 +1,93 @@
+package main
+
+import "fmt"
+
+type sandybridgemc struct {
+}
+
+func (i sandybridgemc) Scan(ctx Context, addr PCIDevData) {
+	inteltool := ctx.InfoSource.GetInteltool()
+
+	/* FIXME:XX Move this somewhere else.  */
+	MainboardIncludes = append(MainboardIncludes, "drivers/intel/gma/int15.h")
+	MainboardEnable += (`	/* FIXME: fix these values. */
+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
+					GMA_INT15_PANEL_FIT_DEFAULT,
+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
+`)
+
+	DevTree = DevTreeNode{
+		Chip:          "northbridge/intel/sandybridge",
+		MissingParent: "northbridge",
+		Comment:       "FIXME: GPU registers may not always apply.",
+		Registers: map[string]string{
+			"gpu_dp_b_hotplug":                    FormatInt32((inteltool.IGD[0xc4030] >> 2) & 7),
+			"gpu_dp_c_hotplug":                    FormatInt32((inteltool.IGD[0xc4030] >> 10) & 7),
+			"gpu_dp_d_hotplug":                    FormatInt32((inteltool.IGD[0xc4030] >> 18) & 7),
+			"gpu_panel_port_select":               FormatInt32((inteltool.IGD[0xc7208] >> 30) & 3),
+			"gpu_panel_power_up_delay":            FormatInt32((inteltool.IGD[0xc7208] >> 16) & 0x1fff),
+			"gpu_panel_power_backlight_on_delay":  FormatInt32(inteltool.IGD[0xc7208] & 0x1fff),
+			"gpu_panel_power_down_delay":          FormatInt32((inteltool.IGD[0xc720c] >> 16) & 0x1fff),
+			"gpu_panel_power_backlight_off_delay": FormatInt32(inteltool.IGD[0xc720c] & 0x1fff),
+			"gpu_panel_power_cycle_delay":         FormatInt32(inteltool.IGD[0xc7210] & 0xff),
+			"gpu_cpu_backlight":                   FormatHex32(inteltool.IGD[0x48254]),
+			"gpu_pch_backlight":                   FormatHex32((inteltool.IGD[0xc8254] >> 16) * 0x10001),
+			"gfx": fmt.Sprintf("GMA_STATIC_DISPLAYS(%d)", (inteltool.IGD[0xc6200] >> 12) & 1),
+		},
+		Children: []DevTreeNode{
+			{
+				Chip:          "domain",
+				Dev:           0,
+				PCIController: true,
+				ChildPCIBus:   0,
+				PCISlots: []PCISlot{
+					PCISlot{PCIAddr: PCIAddr{Dev: 0x0, Func: 0}, writeEmpty: true, alias: "host_bridge", additionalComment: "Host bridge"},
+					PCISlot{PCIAddr: PCIAddr{Dev: 0x1, Func: 0}, writeEmpty: true, alias: "peg10", additionalComment: "PEG"},
+					PCISlot{PCIAddr: PCIAddr{Dev: 0x2, Func: 0}, writeEmpty: true, alias: "igd", additionalComment: "iGPU"},
+				},
+			},
+		},
+	}
+
+	PutPCIDev(addr, "Host bridge")
+
+	/* FIXME:XX some configs are unsupported.  */
+	KconfigBool["NORTHBRIDGE_INTEL_SANDYBRIDGE"] = true
+	KconfigBool["USE_NATIVE_RAMINIT"] = true
+	KconfigBool["INTEL_INT15"] = true
+	KconfigBool["HAVE_ACPI_TABLES"] = true
+	KconfigBool["HAVE_ACPI_RESUME"] = true
+
+	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
+		File: "cpu/intel/common/acpi/cpu.asl",
+	})
+
+	DSDTPCI0Includes = append(DSDTPCI0Includes, DSDTInclude{
+		File: "northbridge/intel/sandybridge/acpi/sandybridge.asl",
+	}, DSDTInclude{
+		File: "drivers/intel/gma/acpi/default_brightness_levels.asl",
+	})
+}
+
+func init() {
+	RegisterPCI(0x8086, 0x0100, sandybridgemc{})
+	RegisterPCI(0x8086, 0x0104, sandybridgemc{})
+	RegisterPCI(0x8086, 0x0150, sandybridgemc{})
+	RegisterPCI(0x8086, 0x0154, sandybridgemc{})
+	RegisterPCI(0x8086, 0x0158, sandybridgemc{})
+	for _, id := range []uint16{
+		0x0102, 0x0106, 0x010a,
+		0x0112, 0x0116, 0x0122, 0x0126,
+		0x0152, 0x0156, 0x0162, 0x0166,
+	} {
+		RegisterPCI(0x8086, id, GenericVGA{GenericPCI{}})
+	}
+
+	/* PCIe bridge */
+	for _, id := range []uint16{
+		0x0101, 0x0105, 0x0109, 0x010d,
+		0x0151, 0x0155, 0x0159, 0x015d,
+	} {
+		RegisterPCI(0x8086, id, GenericPCI{})
+	}
+}

From 6ebab10caa5be6fc1cfd244e745851687d4bd70d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 27 Mar 2024 01:19:39 +0000
Subject: [PATCH 0238/1549] safer, simpler error handling in lbmk

in shell scripts, a function named the same as a program included in
the $PATH will override that program. for example, you could make a
function called ls() and this would override the standand "ls".

in lbmk, a part of it was first trying to run the "fail" command,
deferring to "err", because some scripts call fail() which does
some minor cleanup before calling err.

in most cases, fail() is not defined, and it's possible that the user
could have a program called "fail" in their $PATH, the behaviour of
which we could not determine, and it could have disastrous effects.

lbmk error handling has been re-engineered in such a way that the
err function is defined in a variable, which defaults to err_ which
calls err_, so defined under include/err.sh.

in functions that require cleanup prior to error handling, a fail()
function is still defined, and err is overridden, thus:

err="fail"

this change has made xx_() obsolete, so now only x_ is used. the x_
function is a wrapper that can be used to run a command and exit with
non-zero status (from lbmk) if the command fails. the xx_ command
did the same thing, but called fail() which would have called err();
now everything is $err

example:

	rm -f "$filename" || err "could not delete file"

this would now be:

	rm -f "$filename" || $err "could not delete file"

overriding of err= must be done *after* including err.sh. for
example:

err="fail"
. "include/err.sh"

^ this is wrong. instead, one must do:

. "include/err.sh"
err="fail"

this is because err is set as a global variable under err.sh

the new error handling is much cleaner, and safer. it also reduces
the chance of mistakes such as: calling err when you meant to
call fail. this is because the standard way is now to call $err,
so you set err="fail" at the top of the script and all is well.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build                  | 33 +++++++--------
 include/err.sh         | 25 ++++--------
 include/git.sh         | 42 +++++++++----------
 include/mrc.sh         | 22 +++++-----
 include/option.sh      |  9 ++---
 script/build/roms      | 36 ++++++++---------
 script/build/serprog   |  6 +--
 script/update/release  | 92 +++++++++++++++++++++---------------------
 script/update/trees    | 30 +++++++-------
 script/vendor/download | 54 ++++++++++++-------------
 script/vendor/inject   | 44 ++++++++++----------
 11 files changed, 191 insertions(+), 202 deletions(-)

diff --git a/build b/build
index 214cec30..38d1694c 100755
--- a/build
+++ b/build
@@ -14,6 +14,7 @@ export LC_ALL=C
 . "include/option.sh"
 
 eval "$(setvars "" option aur_notice tmpdir)"
+err="fail"
 
 tmpdir_was_set="y"
 set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"
@@ -35,10 +36,10 @@ buildpath="./script/${linkname}"
 
 main()
 {
-	xx_ id -u 1>/dev/null 2>/dev/null
-	[ $# -lt 1 ] && fail "Too few arguments. Try: ${0} help"
+	x_ id -u 1>/dev/null 2>/dev/null
+	[ $# -lt 1 ] && $err "Too few arguments. Try: ${0} help"
 
-	[ "$1" = "dependencies" ] && xx_ install_packages $@ && lbmk_exit 0
+	[ "$1" = "dependencies" ] && x_ install_packages $@ && lbmk_exit 0
 
 	for cmd in initcmd check_git check_project git_init excmd; do
 		eval "${cmd} \$@"
@@ -48,7 +49,7 @@ main()
 
 initcmd()
 {
-	[ "$(id -u)" != "0" ] || fail "this command as root is not permitted"
+	[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
 
 	check_project
 
@@ -69,14 +70,14 @@ install_packages()
 		printf "You must specify a distro, namely:\n" 1>&2
 		printf "Look at files under config/dependencies/\n" 1>&2
 		printf "Example: ./build dependencies debian\n" 1>&2
-		fail "install_packages: target not specified"
+		$err "install_packages: target not specified"
 	fi
 
-	[ -f "config/dependencies/${2}" ] || fail "Unsupported target"
+	[ -f "config/dependencies/${2}" ] || $err "Unsupported target"
 
 	. "config/dependencies/${2}"
 
-	xx_ ${pkg_add} ${pkglist}
+	x_ ${pkg_add} ${pkglist}
 	[ -z "${aur_notice}" ] && return 0
 	printf "You must install AUR packages: %s\n" "$aur_notice" 1>&2
 }
@@ -85,24 +86,24 @@ install_packages()
 # lbmk can be run from lbmk.git, or an archive.
 git_init()
 {
-	[ -L ".git" ] && fail "Reference .git is a symlink"
+	[ -L ".git" ] && $err "Reference .git is a symlink"
 	[ -e ".git" ] && return 0
 	eval "$(setvars "$(date -Rd @${versiondate})" cdate _nogit)"
 
-	git init || fail "${PWD}: cannot initialise Git repository"
-	git add -A . || fail "${PWD}: cannot add files to Git repository"
+	git init || $err "${PWD}: cannot initialise Git repository"
+	git add -A . || $err "${PWD}: cannot add files to Git repository"
 	git commit -m "${projectname} ${version}" --date "${cdate}" \
 	    --author="lbmk <lbmk@libreboot.org>" || \
-	    fail "$PWD: can't commit ${projectname}/${version}, date $cdate"
+	    $err "$PWD: can't commit ${projectname}/${version}, date $cdate"
 	git tag -a "${version}" -m "${projectname} ${version}" || \
-	    fail "${PWD}: cannot git-tag ${projectname}/${version}"
+	    $err "${PWD}: cannot git-tag ${projectname}/${version}"
 }
 
 excmd()
 {
 	lbmkcmd="${buildpath}/${option}"
-	[ -f "${lbmkcmd}" ] || fail "Invalid command. Run: ${linkpath} help"
-	shift 1; "$lbmkcmd" $@ || fail "excmd: ${lbmkcmd} ${@}"
+	[ -f "${lbmkcmd}" ] || $err "Invalid command. Run: ${linkpath} help"
+	shift 1; "$lbmkcmd" $@ || $err "excmd: ${lbmkcmd} ${@}"
 }
 
 usage()
@@ -131,14 +132,14 @@ mkversion()
 
 lbmk_exit()
 {
-	tmp_cleanup || err "lbmk_exit: can't rm tmpdir upon exit $1: $tmpdir"
+	tmp_cleanup || err_ "lbmk_exit: can't rm tmpdir upon exit $1: $tmpdir"
 	exit $1
 }
 
 fail()
 {
 	tmp_cleanup || printf "WARNING: can't rm tmpdir: %s\n" "$tmpdir" 1>&2
-	err "${1}"
+	err_ "${1}"
 }
 
 tmp_cleanup()
diff --git a/include/err.sh b/include/err.sh
index cab81d02..5b66c999 100755
--- a/include/err.sh
+++ b/include/err.sh
@@ -2,19 +2,10 @@
 # SPDX-FileCopyrightText: 2022, 2023 Leah Rowe <leah@libreboot.org>
 
 version=""; versiondate=""; projectname=""; _nogit=""
+err="err_"
 
 x_() {
-	[ $# -lt 1 ] || ${@} || err_exit err ${@}
-}
-xx_() {
-	[ $# -lt 1 ] || ${@} || err_exit fail ${@}
-}
-
-err_exit()
-{
-	_fail="${1}" && shift 1
-	echo "Non-zero exit: $@"
-	$_fail "Unhandled error"
+	[ $# -lt 1 ] || ${@} || $err "Unhandled non-zero exit: $@"; return 0
 }
 
 check_git()
@@ -30,8 +21,7 @@ check_git()
 git_err()
 {
 	printf "You need to set git name/email, like so:\n%s\n\n" "$1" 1>&2
-	fail "Git name/email not configured" || \
-	    err "Git name/email not configured"
+	$err "Git name/email not configured"
 }
 
 check_project()
@@ -49,9 +39,8 @@ check_project()
 	    --pretty='%ct' HEAD)" || versiondate="${versiondate_}"
 
 	for p in projectname version versiondate; do
-		eval "[ -n \"\$$p\" ] || fail \"$p unset\" || err \"$p unset\""
-		p_="x_ printf \"%s\\n\" \"\$$p\" > $p"
-		eval "x$p_ || $p_"
+		eval "[ -n \"\$$p\" ] || $err \"$p unset\""
+		eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
 	done
 	export LOCALVERSION="-${projectname}-${version%%-*}"
 }
@@ -59,7 +48,7 @@ check_project()
 setvars()
 {
 	_setvars=""
-	[ $# -lt 2 ] && err "setvars: too few arguments"
+	[ $# -lt 2 ] && $err "setvars: too few arguments"
 	val="${1}" && shift 1
 	for var in $@; do
 		_setvars="${var}=\"${val}\"; ${_setvars}"
@@ -67,7 +56,7 @@ setvars()
 	printf "%s\n" "${_setvars% }"
 }
 
-err()
+err_()
 {
 	printf "ERROR %s: %s\n" "${0}" "${1}" 1>&2
 	exit 1
diff --git a/include/git.sh b/include/git.sh
index 1fb8046d..5c456706 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -29,7 +29,7 @@ fetch_from_upstream()
 
 fetch_config()
 {
-	rm -f "${cfgsdir}/"*/seen || err "fetch_config ${cfgsdir}: !rm seen"
+	rm -f "${cfgsdir}/"*/seen || $err "fetch_config ${cfgsdir}: !rm seen"
 	eval "$(setvars "" xtree tree_depend)"
 	while true; do
 		eval "$(setvars "" rev tree)"
@@ -44,12 +44,12 @@ fetch_config()
 
 load_target_config()
 {
-	[ -f "$cfgsdir/$1/target.cfg" ] || err "$1: target.cfg missing"
+	[ -f "$cfgsdir/$1/target.cfg" ] || $err "$1: target.cfg missing"
 	[ -f "${cfgsdir}/${1}/seen" ] && \
-		err "${_xm} check: infinite loop in tree definitions"
+		$err "${_xm} check: infinite loop in tree definitions"
 
-	. "$cfgsdir/$1/target.cfg" || err "load_target_config !$cfgsdir/$1"
-	touch "$cfgsdir/$1/seen" || err "load_config $cfgsdir/$1: !mk seen"
+	. "$cfgsdir/$1/target.cfg" || $err "load_target_config !$cfgsdir/$1"
+	touch "$cfgsdir/$1/seen" || $err "load_config $cfgsdir/$1: !mk seen"
 }
 
 prepare_new_tree()
@@ -57,7 +57,7 @@ prepare_new_tree()
 	printf "Creating %s tree %s (%s)\n" "$project" "$tree" "$_target"
 
 	cp -R "src/${project}/${project}" "${tmpgit}" || \
-	    err "prepare_new_tree ${project}/${tree}: can't make tmpclone"
+	    $err "prepare_new_tree ${project}/${tree}: can't make tmpclone"
 	git_prep "$PWD/$cfgsdir/$tree/patches" "src/$project/$tree" "update"
 }
 
@@ -65,15 +65,15 @@ fetch_project_repo()
 {
 	eval "$(setvars "" xtree tree_depend)"
 
-	scan_config "${project}" "config/git" "err"
-	[ -z "${loc+x}" ] && err "fetch_project_repo $project: loc not set"
-	[ -z "${url+x}" ] && err "fetch_project_repo $project: url not set"
+	scan_config "${project}" "config/git"
+	[ -z "${loc+x}" ] && $err "fetch_project_repo $project: loc not set"
+	[ -z "${url+x}" ] && $err "fetch_project_repo $project: url not set"
 
 	clone_project
 	[ -z "${depend}" ] || for d in ${depend} ; do
 		x_ ./update trees -f ${d}
 	done
-	rm -Rf "${tmpgit}" || err "fetch_repo: !rm -Rf ${tmpgit}"
+	rm -Rf "${tmpgit}" || $err "fetch_repo: !rm -Rf ${tmpgit}"
 }
 
 clone_project()
@@ -86,7 +86,7 @@ clone_project()
 	fi
 
 	git clone $url "$tmpgit" || git clone $bkup_url "$tmpgit" \
-	    || err "clone_project: could not download ${project}"
+	    || $err "clone_project: could not download ${project}"
 	git_prep "$PWD/config/$project/patches" "$loc"
 }
 
@@ -95,26 +95,26 @@ git_prep()
 	_patchdir="$1"
 	_loc="$2"
 
-	[ -z "${rev+x}" ] && err "git_prep $_loc: rev not set"
-	git -C "$tmpgit" reset --hard $rev || err "git -C $_loc: !reset $rev"
-	git_am_patches "$tmpgit" "$_patchdir" || err "!am $_loc $_patchdir"
+	[ -z "${rev+x}" ] && $err "git_prep $_loc: rev not set"
+	git -C "$tmpgit" reset --hard $rev || $err "git -C $_loc: !reset $rev"
+	git_am_patches "$tmpgit" "$_patchdir" || $err "!am $_loc $_patchdir"
 
 	if [ "$project" != "coreboot" ] || [ $# -gt 2 ]; then
 		[ ! -f "$tmpgit/.gitmodules" ] || git -C "$tmpgit" submodule \
-		    update --init --checkout || err "git_prep $_loc: !submod"
+		    update --init --checkout || $err "git_prep $_loc: !submod"
 		if [ "$project" = "coreboot" ] && [ -n "$xtree" ] && \
 		    [ "$xtree" != "$tree" ]; then
 			(
-			cd "$tmpgit/util" || err "prep $_loc: !cd $tmpgit/util"
-			rm -Rf crossgcc || err "prep $_loc: !rm xgcc"
+			cd "$tmpgit/util" || $err "prep $_loc: !cd $tmpgit/util"
+			rm -Rf crossgcc || $err "prep $_loc: !rm xgcc"
 			ln -s "../../$xtree/util/crossgcc" crossgcc || \
-			    err "prep $_loc: can't create xgcc symlink"
-			) || err "prep $_loc: can't create xgcc symlink"
+			    $err "prep $_loc: can't create xgcc symlink"
+			) || $err "prep $_loc: can't create xgcc symlink"
 		fi
 	fi
 
 	[ "$_loc" = "${_loc%/*}" ] || x_ mkdir -p "${_loc%/*}"
-	mv "$tmpgit" "$_loc" || err "git_prep: !mv $tmpgit $_loc"
+	mv "$tmpgit" "$_loc" || $err "git_prep: !mv $tmpgit $_loc"
 	[ -n "$xtree" ] && [ ! -d "src/coreboot/$xtree" ] && \
 		x_ ./update project trees -f coreboot "$xtree"; return 0
 }
@@ -123,7 +123,7 @@ git_am_patches()
 {
 	for _patch in "$2/"*; do
 		[ -L "$_patch" ] || [ ! -f "$_patch" ] || git -C "$1" am \
-		    "$_patch" || err "git_am $1 $2: !git am $_patch"; continue
+		    "$_patch" || $err "git_am $1 $2: !git am $_patch"; continue
 	done
 	for _patches in "$2/"*; do
 		[ ! -L "$_patches" ] && [ -d "$_patches" ] && \
diff --git a/include/mrc.sh b/include/mrc.sh
index 32c68a83..901a3c3b 100755
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -14,7 +14,7 @@ extract_ref()
 	# but refcode is downloaded alongside mrc. in cases where lbmk
 	# erred, downloading only mrc, we must ensure downloading refcode
 	[ -n "$CONFIG_MRC_FILE" ] || \
-		err "extract_ref $board: CONFIG_MRC_FILE not defined"
+		$err "extract_ref $board: CONFIG_MRC_FILE not defined"
 
 	# the extract_mrc function actually downloads the refcode
 	fetch "mrc" "$MRC_url" "$MRC_url_bkup" "$MRC_hash" "$CONFIG_MRC_FILE"
@@ -22,9 +22,9 @@ extract_ref()
 
 extract_mrc()
 {
-	[ -z "$MRC_board" ] && err "extract_mrc $MRC_hash: MRC_board not set"
+	[ -z "$MRC_board" ] && $err "extract_mrc $MRC_hash: MRC_board not set"
 	[ -z "${CONFIG_MRC_FILE}" ] && \
-		err "extract_mrc $MRC_hash: CONFIG_MRC_FILE not set"
+		$err "extract_mrc $MRC_hash: CONFIG_MRC_FILE not set"
 
 	SHELLBALL="chromeos-firmwareupdate-${MRC_board}"
 
@@ -32,10 +32,10 @@ extract_mrc()
 	x_ cd "${appdir}"
 	extract_partition "${MRC_url##*/}"
 	extract_archive "${SHELLBALL}" .
-	) || err "mrc download/extract failure"
+	) || $err "mrc download/extract failure"
 
 	"${cbfstool}" "${appdir}/"bios.bin extract -n mrc.bin \
-	    -f "$_dest" -r RO_SECTION || err "extract_mrc: cbfstool $_dest"
+	    -f "$_dest" -r RO_SECTION || $err "extract_mrc: cbfstool $_dest"
 
 	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && extract_refcode; return 0
 }
@@ -51,10 +51,10 @@ extract_partition()
 
 	dd if="${1%.zip}" of="root-a.ext2" bs=1024 \
 	    skip=$(( ${START} / 1024 )) count=$(( ${SIZE} / 1024 )) || \
-	    err "extract_partition, dd ${1%.zip}, root-a.ext2"
+	    $err "extract_partition, dd ${1%.zip}, root-a.ext2"
 
 	printf "cd /usr/sbin\ndump chromeos-firmwareupdate ${SHELLBALL}\nquit" \
-	    | debugfs "root-a.ext2" || err "can't extract shellball"
+	    | debugfs "root-a.ext2" || $err "can't extract shellball"
 }
 
 extract_refcode()
@@ -66,16 +66,16 @@ extract_refcode()
 	# incompatible with older versions before coreboot 4.14,
 	# so we need coreboot 4.13 cbfstool for certain refcode files
 	[ -n "$cbfstoolref" ] || \
-		err "extract_refcode $board: MRC_refcode_cbtree not set"
+		$err "extract_refcode $board: MRC_refcode_cbtree not set"
 	mkdir -p "${_refdest%/*}" || \
-	    err "extract_refcode $board: !mkdir -p ${_refdest%/*}"
+	    $err "extract_refcode $board: !mkdir -p ${_refdest%/*}"
 
 	"$cbfstoolref" "$appdir/bios.bin" extract \
 	    -m x86 -n fallback/refcode -f "$_refdest" -r RO_SECTION \
-	    || err "extract_refcode $board: !cbfstoolref $_refdest"
+	    || $err "extract_refcode $board: !cbfstoolref $_refdest"
 
 	# enable the Intel GbE device, if told by offset MRC_refcode_gbe
 	[ -z "$MRC_refcode_gbe" ] || dd if="config/ifd/hp820g2/1.bin" \
 	    of="$_refdest" bs=1 seek=$MRC_refcode_gbe count=1 conv=notrunc || \
-	    err "extract_refcode $_refdest: byte $MRC_refcode_gbe"; return 0
+	    $err "extract_refcode $_refdest: byte $MRC_refcode_gbe"; return 0
 }
diff --git a/include/option.sh b/include/option.sh
index 2284fb0b..64442d15 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -43,10 +43,9 @@ scan_config()
 {
 	awkstr=" /\{.*${1}.*}{/ {flag=1;next} /\}/{flag=0} flag { print }"
 	confdir="${2}"
-	_fail="${3}"
 	revfile="$(mktemp -t sources.XXXXXXXXXX)"
 	cat "${confdir}/"* > "${revfile}" || \
-	    "${_fail}" "scan_config ${confdir}: Cannot concatenate files"
+	    $err "scan_config ${confdir}: Cannot concatenate files"
 	while read -r line ; do
 		set ${line} 1>/dev/null 2>/dev/null || :
 		if [ "${1%:}" = "depend" ]; then
@@ -57,7 +56,7 @@ scan_config()
 	done << EOF
 	$(eval "awk '${awkstr}' \"${revfile}\"")
 EOF
-	rm -f "$revfile" || "$_fail" "scan_config: Cannot remove tmpfile"
+	rm -f "$revfile" || $err "scan_config: Cannot remove tmpfile"
 }
 
 check_defconfig()
@@ -81,6 +80,6 @@ handle_coreboot_utils()
 
 remkdir()
 {
-	rm -Rf "${1}" || err "remkdir: !rm -Rf \"${1}\""
-	mkdir -p "${1}" || err "remkdir: !mkdir -p \"${1}\""
+	rm -Rf "${1}" || $err "remkdir: !rm -Rf \"${1}\""
+	mkdir -p "${1}" || $err "remkdir: !mkdir -p \"${1}\""
 }
diff --git a/script/build/roms b/script/build/roms
index 9e7c69ee..a90e1daa 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -49,7 +49,7 @@ main()
 	done
 
 	[ "${all}" != "y" ] || boards=$(items config/coreboot) || \
-	    err "Cannot generate list of boards for building"
+	    $err "Cannot generate list of boards for building"
 
 	for x in ${boards}; do
 		eval "$(setvars "n" ${pv}) $(setvars "" ${v})"
@@ -62,7 +62,7 @@ main()
 		targets="* bin/${board}\n${targets}"
 	done
 
-	[ -z "${targets}" ] && err "No ROM images were compiled"
+	[ -z "${targets}" ] && $err "No ROM images were compiled"
 	printf "\nROM images available in these directories:\n"
 	eval "printf \"${targets}\""
 	printf "^^ ROM images available in these directories.\n\n"
@@ -74,7 +74,7 @@ configure_target()
 {
 	targetdir="${cfgsdir}/${board}"
 	[ -f "${targetdir}/target.cfg" ] || \
-		err "Missing target.cfg for target: ${board}"
+		$err "Missing target.cfg for target: ${board}"
 
 	# Override the above defaults using target.cfg
 	. "${targetdir}/target.cfg"
@@ -84,7 +84,7 @@ configure_target()
 	    && [ "${grub_scan_disk}" != "ahci" ] && \
 		grub_scan_disk="both"
 
-	[ -z "$tree" ] && err "$board: tree not defined"
+	[ -z "$tree" ] && $err "$board: tree not defined"
 
 	[ "${payload_memtest}" != "y" ] && payload_memtest="n"
 	[ "${payload_grub_withseabios}" = "y" ] && payload_grub="y"
@@ -101,7 +101,7 @@ configure_target()
 	    [ "${payload_uboot}" != "y" ] && \
 		for configfile in "${targetdir}/config/"*; do
 			[ -e "${configfile}" ] || continue
-			err "target '${board}' defines no payload"
+			$err "target '${board}' defines no payload"
 		done
 
 	[ "$payload_uboot" != "n" ] && [ "$payload_uboot" != "y" ] && \
@@ -149,7 +149,7 @@ build_grub_payload()
 		keymaps="${keymaps} ${keymapfile}"
 	done
 	[ -z "$_keyboard" ] || [ -f "$grubcfgsdir/keymap/$_keyboard.gkb" ] || \
-		err "build_grub_payload: $_keyboard layout not defined"
+		$err "build_grub_payload: $_keyboard layout not defined"
 	[ -n "$_keyboard" ] && keymaps="${grubcfgsdir}/keymap/${_keyboard}.gkb"
 	[ -f "$grubelf" ] && return 0
 	[ -f "src/grub/grub-mkstandalone" ] || x_ ./update trees -b grub
@@ -164,7 +164,7 @@ build_grub_payload()
 	    --install-modules="${grub_install_modules}" \
 	    "/boot/grub/grub.cfg=${grubcfgsdir}/config/grub_memdisk.cfg" \
 	    "/boot/grub/grub_default.cfg=${grubcfgsdir}/config/grub.cfg" || \
-	    err "could not generate grub.elf"
+	    $err "could not generate grub.elf"
 }
 
 build_uboot_payload()
@@ -175,12 +175,12 @@ build_uboot_payload()
 	[ ! -f "${ubootelf}" ] && [ -f "${ubdir}/u-boot" ] && \
 		ubootelf="${ubdir}/u-boot"
 	[ -f "${ubootelf}" ] && return 0
-	err "Can't find u-boot build for board, $board";
+	$err "Can't find u-boot build for board, $board";
 }
 
 build_target_mainboard()
 {
-	rm -f "${romdir}/"* || err "!prepare, rm files, ${romdir}"
+	rm -f "${romdir}/"* || $err "!prepare, rm files, ${romdir}"
 
 	for x in "normal" "vgarom" "libgfxinit"; do
 		initmode="${x}"
@@ -237,7 +237,7 @@ build_seabios_roms()
 		x_ build_grub_roms "${t}" "seabios_withgrub"
 	else
 		t=$(mkSeabiosRom "${cbrom}" "fallback/payload") || \
-		    err "build_seabios_roms: cannot build tmprom"
+		    $err "build_seabios_roms: cannot build tmprom"
 		newrom="${romdir}/seabios_${board}_${initmode}_${displaymode}"
 		[ "${initmode}" = "normal" ] && newrom="${romdir}/seabios" \
 			&& newrom="${newrom}_${board}_${initmode}"
@@ -256,13 +256,13 @@ build_grub_roms()
 	if [ "$payload1" = "grub" ] && [ "$payload_grub_withseabios" = "y" ]
 	then
 		_tmpmvrom=$(mkSeabiosRom "$tmprom" "seabios.elf") || \
-		    err "build_grub_roms 1 $board: can't build tmprom"
+		    $err "build_grub_roms 1 $board: can't build tmprom"
 		x_ mv "$_tmpmvrom" "$tmprom"
 	elif [ "$payload1" != "grub" ] && [ "$payload_seabios_withgrub" = "y" ]
 	then
 		grub_cbfs="img/grub2"
 		_tmpmvrom=$(mkSeabiosRom "$tmprom" fallback/payload) || \
-		    err "build_grub_roms 2 $board: can't build tmprom"
+		    $err "build_grub_roms 2 $board: can't build tmprom"
 		x_ mv "$_tmpmvrom" "$tmprom"
 	fi
 
@@ -276,16 +276,16 @@ build_grub_roms()
 		backgroundfile="config/grub/background/${grub_background}"
 		"${cbfstool}" "${tmprom}" add -f ${backgroundfile} \
 		    -n background.png -t raw || \
-		    err "insert background, ${backgroundfile}"
+		    $err "insert background, ${backgroundfile}"
 	fi
 
 	tmpcfg=$(mktemp -t coreboot_rom.XXXXXXXXXX)
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" >"$tmpcfg" \
-	    || err "set grub_scandisk, $grub_scan_disk, $tmpcfg"
+	    || $err "set grub_scandisk, $grub_scan_disk, $tmpcfg"
 	[ "${grub_scan_disk}" = "both" ] || \
 	    x_ "$cbfstool" "$tmprom" add -f "$tmpcfg" -n scan.cfg -t raw
 	printf "set timeout=%s\n" "${grub_timeout}" > "${tmpcfg}" || \
-	    err "set timeout, ${grub_timeout}, ${tmpcfg}"
+	    $err "set timeout, ${grub_timeout}, ${tmpcfg}"
 	[ -z "${grub_timeout}" ] || x_ "${cbfstool}" "${tmprom}" add \
 	    -f "${tmpcfg}" -n timeout.cfg -t raw
 	x_ rm -f "${tmpcfg}"
@@ -344,7 +344,7 @@ mkSeabiosGrubonlyRom()
 	tmpbootorder=$(mktemp -t coreboot_rom.XXXXXXXXXX)
 
 	# only load grub, by inserting a custom bootorder file
-	printf "/rom@img/grub2\n" > "$tmpbootorder" || err "printf bootorder"
+	printf "/rom@img/grub2\n" > "$tmpbootorder" || $err "printf bootorder"
 	x_ "${cbfstool}" "${_grubrom}" \
 	    add -f "${tmpbootorder}" -n bootorder -t raw
 	x_ rm -f "${tmpbootorder}"
@@ -356,7 +356,7 @@ mkSeabiosGrubonlyRom()
 build_uboot_roms()
 {
 	tmprom=$(mkUbootRom "${cbrom}" "fallback/payload") || \
-	    err "build_uboot_roms $board: could not create tmprom"
+	    $err "build_uboot_roms $board: could not create tmprom"
 	newrom="${romdir}/uboot_payload_${board}_${initmode}_${displaymode}.rom"
 	x_ moverom "${tmprom}" "${newrom}"
 	x_ rm -f "${tmprom}"
@@ -370,7 +370,7 @@ mkUbootRom() {
 	_ubdir="elf/u-boot/${board}/${uboot_config}"
 	_ubootelf="${_ubdir}/u-boot.elf"
 	[ -f "${_ubootelf}" ] || _ubootelf="${_ubdir}/u-boot"
-	[ -f "$_ubootelf" ] || err "mkUbootRom: $board: cant find u-boot"
+	[ -f "$_ubootelf" ] || $err "mkUbootRom: $board: cant find u-boot"
 
 	tmprom=$(mktemp -t coreboot_rom.XXXXXXXXXX)
 
diff --git a/script/build/serprog b/script/build/serprog
index 8b003add..ea2c02bf 100755
--- a/script/build/serprog
+++ b/script/build/serprog
@@ -17,8 +17,8 @@ usage="usage: ./build firmware serprog <rp2040|stm32> [board]"
 
 main()
 {
-	[ -z "${1+x}" ] && err "${usage}"
-	[ "$1" != "rp2040" ] && [ "$1" != "stm32" ] && err "$usage"
+	[ -z "${1+x}" ] && $err "${usage}"
+	[ "$1" != "rp2040" ] && [ "$1" != "stm32" ] && $err "$usage"
 	if [ "${1}" = "rp2040" ]; then
 		boards_dir=${pico_sdk_dir}/src/boards/include/boards
 		[ -d "$pico_src_dir" ] || x_ ./update trees -f "pico-serprog"
@@ -71,7 +71,7 @@ print_boards()
 
 list_boards()
 {
-	basename -a -s .h "${1}/"*.h || err "list_boards $1: can't list boards"
+	basename -a -s .h "${1}/"*.h || $err "list_boards $1: can't list boards"
 }
 
 main $@
diff --git a/script/update/release b/script/update/release
index 357840c2..c4101b5a 100755
--- a/script/update/release
+++ b/script/update/release
@@ -13,11 +13,11 @@ main()
 {
 	vdir="release"
 	while getopts d:m: option; do
-		[ -z "${OPTARG}" ] && err "Empty argument not allowed"
+		[ -z "${OPTARG}" ] && $err "Empty argument not allowed"
 		case "${option}" in
 		d) vdir="${OPTARG}" ;;
 		m) mode="${OPTARG}" ;;
-		*) err "Invalid option" ;;
+		*) $err "Invalid option" ;;
 		esac
 	done
 
@@ -29,7 +29,7 @@ main()
 	src_dirname="${relname}_src"
 	srcdir="${vdir}/${src_dirname}"
 
-	[ -e "${vdir}" ] && err "already exists: \"${vdir}\""
+	[ -e "${vdir}" ] && $err "already exists: \"${vdir}\""
 
 	mkvdir
 	build_release
@@ -39,45 +39,45 @@ main()
 
 mkvdir()
 {
-	mkdir -p "${vdir}" || err "mkvdir: !mkdir -p \"${vdir}\""
-	git clone . "${srcdir}" || err "mkdir: !gitclone \"${srcdir}\""
-	insert_version_files "$srcdir" || err "mkvdir $srcdir: versionfile"
+	mkdir -p "${vdir}" || $err "mkvdir: !mkdir -p \"${vdir}\""
+	git clone . "${srcdir}" || $err "mkdir: !gitclone \"${srcdir}\""
+	insert_version_files "$srcdir" || $err "mkvdir $srcdir: versionfile"
 }
 
 build_release()
 {
 	_xm="build_release ${vdir}"
 	(
-	cd "${srcdir}" || err "${_xm}: !cd \"${srcdir}\""
+	cd "${srcdir}" || $err "${_xm}: !cd \"${srcdir}\""
 	fetch_trees
 	[ "${mode}" = "u-boot" ] || x_ mv src/docs docs
-	) || err "can't create release files"
+	) || $err "can't create release files"
 
 	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
 	    --abbrev-commit > "${srcdir}/CHANGELOG" || \
-	    err "build_release $srcdir: couldn't generate changelog"
+	    $err "build_release $srcdir: couldn't generate changelog"
 
 	(
 	if [ "${mode}" = "u-boot" ]; then
-		cd "${srcdir}/src/" || err "${_xm}: mktarball \"${srcdir}\""
+		cd "${srcdir}/src/" || $err "${_xm}: mktarball \"${srcdir}\""
 		mktarball u-boot "../../${srcdir##*/}.tar.xz" || \
-		    err "$_xm: mksrc"
+		    $err "$_xm: mksrc"
 		# make a src archive containing only u-boot
 	else
-		cd "${srcdir%/*}" || err "${_xm}: mktarball \"${srcdir}\""
+		cd "${srcdir%/*}" || $err "${_xm}: mktarball \"${srcdir}\""
 		mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || \
-		    err "$_xm: mksrc"
+		    $err "$_xm: mksrc"
 	fi
-	) || err "can't create src tarball"
+	) || $err "can't create src tarball"
 	[ "${mode}" = "src" ] && return 0
 	[ "${mode}" = "u-boot" ] && return 0
 
 	(
-	cd "${srcdir}" || err "${_xm}: 2 !cd \"${srcdir}\""
+	cd "${srcdir}" || $err "${_xm}: 2 !cd \"${srcdir}\""
 	mkrom_images
-	) || err "can't build rom images"
+	) || $err "can't build rom images"
 
-	rm -Rf "${srcdir}" || err "!rm -Rf ${srcdir}"
+	rm -Rf "${srcdir}" || $err "!rm -Rf ${srcdir}"
 }
 
 fetch_trees()
@@ -85,7 +85,7 @@ fetch_trees()
 	for x in config/git/*; do
 		[ "${mode}" = "u-boot" ] && break
 		[ ! -f "${x}" ] || ./update trees -f "${x#config/git/}" || \
-		    err "${_xm}: fetch ${x#config/git/}"
+		    $err "${_xm}: fetch ${x#config/git/}"
 	done
 	[ "${mode}" = "u-boot" ] && x_ ./update trees -f u-boot
 
@@ -93,56 +93,56 @@ fetch_trees()
 		[ -f "${x}" ] || continue
 		xp="${x#*/}"; xp="${xp%/*}"
 		[ -L "${xp}" ] || rm -Rf "src/${xp}/${xp}" || \
-		    err "!rm -Rf \"src/${xp}/${xp}\""
+		    $err "!rm -Rf \"src/${xp}/${xp}\""
 	done
 
-	find . -name ".git" -exec rm -Rf {} + || err "$_xm: rm .git"
-	find . -name ".gitmodules" -exec rm -Rf {} + || err "$_xm: rm .gitmod"
+	find . -name ".git" -exec rm -Rf {} + || $err "$_xm: rm .git"
+	find . -name ".gitmodules" -exec rm -Rf {} + || $err "$_xm: rm .gitmod"
 	x_ rm -Rf tmp .git
 }
 
 mkrom_images()
 {
-	./build roms all || err "${_xm}: roms-all"
-	./build serprog rp2040 || err "${_xm}: rp2040"
-	./build serprog stm32 || err "${_xm}: stm32"
+	./build roms all || $err "${_xm}: roms-all"
+	./build serprog rp2040 || $err "${_xm}: rp2040"
+	./build serprog stm32 || $err "${_xm}: stm32"
 
 	for rombuild in bin/*; do
 		[ -d "${rombuild}" ] || continue
 		handle_rom_archive "${rombuild}"
 	done
 
-	mv "release/${version}/roms/" ../roms || err "${_xm}: copy roms/"
+	mv "release/${version}/roms/" ../roms || $err "${_xm}: copy roms/"
 }
 
 handle_rom_archive()
 {
 	builddir="${1}"
 	romdir="tmp/romdir"
-	rm -Rf "${romdir}" || err "!rm romdir, handle_rom_archive"
+	rm -Rf "${romdir}" || $err "!rm romdir, handle_rom_archive"
 	target="${builddir##*/}"
 
 	if [ ! -f "config/coreboot/${target}/target.cfg" ]; then
 		# No config, just make a tarball
 		tarball="release/${version}/roms/${relname}_${target}.tar.xz"
 		insert_copying_files "${builddir}" || \
-		    err "!insert copy, handle, ${builddir}"
+		    $err "!insert copy, handle, ${builddir}"
 		mktarball "${builddir}" "${tarball}"
 		return 0
 	fi
 
 	romdir="${romdir}/bin/${target}"
-	mkdir -p "${romdir}" || err "!mkdir -p romdir, handle_rom_archive"
-	cp "$builddir/"* "$romdir" || err "!cp romdir, handle_rom_archive"
+	mkdir -p "${romdir}" || $err "!mkdir -p romdir, handle_rom_archive"
+	cp "$builddir/"* "$romdir" || $err "!cp romdir, handle_rom_archive"
 
 	nukerom
 
 	printf "Generating release/%s/roms/%s-%s_%s.tar.xz\n" \
 	    "${version}" "${projectname}" "${version}" "${target##*/}"
 	insert_version_files "${romdir}" || \
-	    err "mkrom_tarball ${romdir}: versionfile"
+	    $err "mkrom_tarball ${romdir}: versionfile"
 
-	insert_copying_files "$romdir" || err "!insert copy, handle 2, $romdir"
+	insert_copying_files "$romdir" || $err "!insert copy, handle 2, $romdir"
 	mkrom_tarball
 }
 
@@ -152,18 +152,18 @@ nukerom()
 
 	# Hash the images before removing vendor files
 	# which "./vendor inject" uses for verification
-	rm -f "${romdir}/vendorhashes" || err "!rm ${romdir}/vendorhashes"
-	touch "${romdir}/vendorhashes" || err "!touch ${romdir}/vendorhashes"
+	rm -f "${romdir}/vendorhashes" || $err "!rm ${romdir}/vendorhashes"
+	touch "${romdir}/vendorhashes" || $err "!touch ${romdir}/vendorhashes"
 	(
-	cd "${romdir}" || err "!cd romdir ${romdir}, nukerom"
+	cd "${romdir}" || $err "!cd romdir ${romdir}, nukerom"
 	sha512sum ./*.rom >> vendorhashes || \
-	    err "!create vendorhashes, nukerom"
-	) || err "can't create vendor hashes"
+	    $err "!create vendorhashes, nukerom"
+	) || $err "can't create vendor hashes"
 
 	for romfile in "${romdir}"/*.rom; do
 		[ -f "${romfile}" ] || continue
 		./vendor inject -r "$romfile" -b "$target" -n nuke || \
-		    err "!vendor inject (nuke) ${romfile}, nukerom"
+		    $err "!vendor inject (nuke) ${romfile}, nukerom"
 	done
 }
 
@@ -188,13 +188,13 @@ mkrom_tarball()
 {
 	archivename="${relname}_${target##*/}"
 	f="release/${version}/roms/${archivename}"
-	mkdir -p "${f%/*}" || err "mkrom_tarball: !mkdir -p ${f%/*}"
+	mkdir -p "${f%/*}" || $err "mkrom_tarball: !mkdir -p ${f%/*}"
 	(
-	cd "${romdir%"/bin/$target"}" || err "!cd ${romdir%"/bin/$target"}"
+	cd "${romdir%"/bin/$target"}" || $err "!cd ${romdir%"/bin/$target"}"
 	mktarball "bin/${target}" "${archivename}.tar.xz"
-	) || err "can't create rom tarball"
+	) || $err "can't create rom tarball"
 	mv "${romdir%"/bin/${target}"}/${archivename}.tar.xz"* "${f%/*}" || \
-	    err "mktar ${f%/*}/${romdir%"/bin/$target"}/$archivename.tar.xz"
+	    $err "mktar ${f%/*}/${romdir%"/bin/$target"}/$archivename.tar.xz"
 
 	printf "Created ROM archive: %s" "${f%/*}/${archivename}.tar.xz"
 }
@@ -212,20 +212,20 @@ mktarball()
 	tar_implementation=$(tar --version | head -n1) || :
 
 	[ "${2%/*}" = "${2}" ] || \
-		mkdir -p "${2%/*}" || err "mk, !mkdir -p \"${2%/*}\""
+		mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
 	if [ "${tar_implementation% *}" = "tar (GNU tar)" ]; then
 		tar --sort=name --owner=root:0 --group=root:0 \
 		    --mtime="UTC 2024-02-25" -c "$1" | xz -T0 -9e > "$2" || \
-		    err "mktarball 1, ${1}"
+		    $err "mktarball 1, ${1}"
 	else
 		# TODO: reproducible tarballs on non-GNU systems
-		tar -c "$1" | xz -T0 -9e > "$2" || err "mktarball 2, $1"
+		tar -c "$1" | xz -T0 -9e > "$2" || $err "mktarball 2, $1"
 	fi
 	(
 	[ "${2%/*}" != "${2}" ] && x_ cd "${2%/*}"
 	sha512sum "${2##*/}" > "${2##*/}.sha512" || \
-	    err "!sha512sum \"${2##*/}\" > \"${2##*/}.sha512\""
-	) || err "failed to create tarball checksum"
+	    $err "!sha512sum \"${2##*/}\" > \"${2##*/}.sha512\""
+	) || $err "failed to create tarball checksum"
 }
 
 main $@
diff --git a/script/update/trees b/script/update/trees
index 51ea821c..40ff1878 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -28,12 +28,12 @@ main()
 		-s) mode="savedefconfig" ;;
 		-l) mode="olddefconfig" ;;
 		-n) mode="nconfig" ;;
-		*) err "Invalid option" ;;
+		*) $err "Invalid option" ;;
 		esac
 		shift; project="${OPTARG#src/}"; shift
 	done
-	[ -z "$_f" ] && err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
-	[ -z "$project" ] && err "project name not specified"
+	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
+	[ -z "$project" ] && $err "project name not specified"
 	elfdir="elf/${project}"
 	cfgsdir="config/${project}"
 
@@ -66,17 +66,17 @@ build_targets()
 	[ "$elfdir" = "elf/coreboot" ] && \
 		elfdir="elf/coreboot_nopayload_DO_NOT_FLASH"
 
-	[ -d "$cfgsdir" ] || err "directory, $cfgsdir, does not exist"
+	[ -d "$cfgsdir" ] || $err "directory, $cfgsdir, does not exist"
 
 	listfile="${cfgsdir}/build.list"
-	[ -f "$listfile" ] || err "list file, $listfile, does not exist"
+	[ -f "$listfile" ] || $err "list file, $listfile, does not exist"
 
 	# Build for all targets if no argument is given
 	[ $# -gt 0 ] && target1="$1"
 	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && \
 		shift 1
 	targets=$(items "$cfgsdir") || \
-	    err "Cannot get options for $cfgsdir"
+	    $err "Cannot get options for $cfgsdir"
 	[ $# -gt 0 ] && targets=$@
 
 	[ -z "$mode" ] && x_ mkdir -p "$elfdir"
@@ -130,7 +130,7 @@ handle_src_tree()
 
 	x_ mkdir -p "${elfdir}/${target}"
 
-	[ -z "$tree" ] && err "handle_src_tree $project/$tree: tree unset"
+	[ -z "$tree" ] && $err "handle_src_tree $project/$tree: tree unset"
 
 	codedir="src/${project}/${tree}"
 
@@ -155,7 +155,7 @@ load_project_config()
 
 	[ -f "${1}/target.cfg" ] || return 0
 	. "${1}/target.cfg" || \
-	    err "load_project_config ${1}: cannot load target.cfg"; return 0
+	    $err "load_project_config ${1}: cannot load target.cfg"; return 0
 }
 
 check_cross_compiler()
@@ -178,7 +178,7 @@ check_cross_compiler()
 
 check_config()
 {
-	[ -f "$config" ] || err "check_config: ${project}/${target}: no config"
+	[ -f "$config" ] || $err "check_config: ${project}/${target}: no config"
 
 	dest_dir="${elfdir}/${target}/${config_name}"
 	# TODO: very hacky check. do it properly (based on build.list)
@@ -197,7 +197,7 @@ handle_makefile()
 	[ -n "$mode" ] || make -C "$codedir" silentoldconfig || \
 	    make -C "$codedir" oldconfig || :
 
-	run_make_command || err "handle_makefile $codedir: no makefile!"
+	run_make_command || $err "handle_makefile $codedir: no makefile!"
 
 	if [ -e "${codedir}/.git" ] && [ "$project" = "u-boot" ] && \
 	    [ "$mode" = "distclean" ]; then
@@ -220,7 +220,7 @@ run_make_command()
 		printf "%s\n" "${version%%-*}" > "$codedir/.coreboot-version"
 
 	make $mode -j$(nproc) $makeargs -C "$codedir" || \
-	    err "run_make $codedir: !make $mode"
+	    $err "run_make $codedir: !make $mode"
 
 	[ "$mode" != "clean" ] && return 0
 	make -C "$codedir" distclean 2>/dev/null || :
@@ -232,9 +232,9 @@ check_cmake()
 		check_makefile "${1}" || \
 		    cmake -B "${1}" "${1}/${cmakedir}" || \
 		    check_makefile "${1}" || \
-		    err "check_cmake ${1}: can't cmake ${cmakedir}"
+		    $err "check_cmake ${1}: can't cmake ${cmakedir}"
 	[ -z "${cmakedir}" ] || check_makefile "${1}" || \
-		err "check_cmake ${1}: could not generate Makefile"
+		$err "check_cmake ${1}: could not generate Makefile"
 	return 0
 }
 
@@ -242,11 +242,11 @@ check_autoconf()
 {
 	(
 	_cfgopt=""
-	cd "${1}" || err "!cd $1"
+	cd "${1}" || $err "!cd $1"
 	[ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs
 	[ -f "autogen.sh" ] && x_ ./autogen.sh ${autogenargs}
 	[ -f "configure" ] && x_ ./configure $autoconfargs; return 0
-	) || err "can't bootstrap project: $1"
+	) || $err "can't bootstrap project: $1"
 }
 
 check_makefile()
diff --git a/script/vendor/download b/script/vendor/download
index 42cb16ab..b40810cc 100755
--- a/script/vendor/download
+++ b/script/vendor/download
@@ -25,14 +25,14 @@ eval "$(setvars "" _b _dl EC_url EC_url_bkup EC_hash DL_hash DL_url DL_url_bkup
 
 main()
 {
-	[ $# -gt 0 ] || err "No argument given"
+	[ $# -gt 0 ] || $err "No argument given"
 	board="${1}"
 	boarddir="${cbcfgsdir}/${board}"
 	_b="${board%%_*mb}" # shorthand (no duplication per rom size)
 
 	check_defconfig "${boarddir}" && exit 0
 	detect_firmware && exit 0
-	scan_config "${_b}" "config/vendor" "err"
+	scan_config "${_b}" "config/vendor"
 
 	build_dependencies
 	download_vendorfiles
@@ -49,7 +49,7 @@ detect_firmware()
 	set -- "${boarddir}/config/"*
 	. "${1}" 2>/dev/null
 	. "${boarddir}/target.cfg" 2>/dev/null
-	[ -z "$tree" ] && err "detect_firmware $boarddir: tree undefined"
+	[ -z "$tree" ] && $err "detect_firmware $boarddir: tree undefined"
 	cbdir="src/coreboot/$tree"
 	cbfstool="cbutils/$tree/cbfstool"
 
@@ -110,8 +110,8 @@ fetch()
 	dl_bkup="${3}"
 	dlsum="${4}"
 	[ "${5}" = "/dev/null" ] && return 0
-	[ "${5# }" = "$5" ] || err "fetch: space not allowed in _dest: '$5'"
-	[ "${5#/}" = "$5" ] || err "fetch: absolute path not allowed: '$5'"
+	[ "${5# }" = "$5" ] || $err "fetch: space not allowed in _dest: '$5'"
+	[ "${5#/}" = "$5" ] || $err "fetch: absolute path not allowed: '$5'"
 	_dest="${5##*../}"
 	_dl="${vendir}/cache/${dlsum}"
 	dl_fail="n"
@@ -129,14 +129,14 @@ fetch()
 		vendor_checksum "${dlsum}" "${_dl}" || dl_fail="n"
 	done
 	[ "${dl_fail}" = "y" ] && \
-		err "fetch ${dlsum}: matched file unavailable"
+		$err "fetch ${dlsum}: matched file unavailable"
 
 	x_ rm -Rf "${_dl}_extracted"
 	mkdirs "${_dest}" "extract_${dl_type}" || return 0
 	eval "extract_${dl_type}"
 
 	[ -f "${_dest}" ] && return 0
-	err "extract_${dl_type} (fetch): missing file: '${_dest}'"
+	$err "extract_${dl_type} (fetch): missing file: '${_dest}'"
 }
 
 vendor_checksum()
@@ -152,17 +152,17 @@ mkdirs()
 		printf "mkdirs %s %s: already downloaded\n" "$1" "$2" 1>&2
 		return 1
 	fi
-	mkdir -p "${1%/*}" || err "mkdirs: !mkdir -p ${1%/*}"
+	mkdir -p "${1%/*}" || $err "mkdirs: !mkdir -p ${1%/*}"
 	remkdir "${appdir}"
 	extract_archive "${_dl}" "${appdir}" || \
 	    [ "${2}" = "extract_e6400vga" ] || \
-	    err "mkdirs ${1} ${2}: !extract"
+	    $err "mkdirs ${1} ${2}: !extract"
 }
 
 extract_intel_me()
 {
 	[ ! -f "$mecleaner" ] && \
-		err "extract_intel_me $cbdir: me_cleaner missing"
+		$err "extract_intel_me $cbdir: me_cleaner missing"
 
 	_me="${PWD}/${_dest}" # must always be an absolute path
 	cdir="${PWD}/${appdir}" # must always be an absolute path
@@ -170,10 +170,10 @@ extract_intel_me()
 	[ -f "${_me}" ] && return 0
 
 	sdir="$(mktemp -d)"
-	mkdir -p "$sdir" || err "extract_intel_me: !mkdir -p \"$sdir\""
+	mkdir -p "$sdir" || $err "extract_intel_me: !mkdir -p \"$sdir\""
 	(
 	[ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
-	cd "$cdir" || err "extract_intel_me: !cd \"$cdir\""
+	cd "$cdir" || $err "extract_intel_me: !cd \"$cdir\""
 	for i in *; do
 		[ -f "$_me" ] && break
 		[ -L "$i" ] && continue
@@ -195,7 +195,7 @@ extract_intel_me()
 		cd "${cdir}" || :
 	done
 	)
-	rm -Rf "${sdir}" || err "extract_intel_me: !rm -Rf ${sdir}"
+	rm -Rf "${sdir}" || $err "extract_intel_me: !rm -Rf ${sdir}"
 }
 
 extract_archive()
@@ -207,44 +207,44 @@ extract_archive()
 extract_kbc1126ec()
 {
 	[ ! -f "$kbc1126_ec_dump" ] && \
-		err "extract_kbc1126ec $cbdir: kbc1126_ec_dump missing"
+		$err "extract_kbc1126ec $cbdir: kbc1126_ec_dump missing"
 	(
 	x_ cd "${appdir}/"
 	mv Rompaq/68*.BIN ec.bin || :
 	if [ ! -f ec.bin ]; then
 		unar -D ROM.CAB Rom.bin || unar -D Rom.CAB Rom.bin || \
-		    unar -D 68*.CAB Rom.bin || err "can't extract Rom.bin"
+		    unar -D 68*.CAB Rom.bin || $err "can't extract Rom.bin"
 		x_ mv Rom.bin ec.bin
 	fi
-	[ -f ec.bin ] || err "extract_kbc1126_ec ${board}: can't extract"
+	[ -f ec.bin ] || $err "extract_kbc1126_ec ${board}: can't extract"
 	"${kbc1126_ec_dump}" ec.bin || \
-	    err "extract_kbc1126_ec ${board}: can't extract ecfw1/2.bin"
-	) || err "can't extract kbc1126 ec firmware"
+	    $err "extract_kbc1126_ec ${board}: can't extract ecfw1/2.bin"
+	) || $err "can't extract kbc1126 ec firmware"
 	ec_ex="y"
 	for i in 1 2; do
 		[ -f "${appdir}/ec.bin.fw${i}" ] || ec_ex="n"
 	done
 	[ "${ec_ex}" = "y" ] || \
-	    err "extract_kbc1126_ec ${board}: didn't extract ecfw1/2.bin"
+	    $err "extract_kbc1126_ec ${board}: didn't extract ecfw1/2.bin"
 	cp "${appdir}/"ec.bin.fw* "${_dest%/*}/" || \
-	    err "extract_kbc1126_ec ${board}: can't copy ec binaries"
+	    $err "extract_kbc1126_ec ${board}: can't copy ec binaries"
 }
 
 extract_e6400vga()
 {
 	for v in E6400_VGA_offset E6400_VGA_romname; do
-		eval "[ -z \"\$$v\" ] && err \"extract_e6400vga: $v undefined\""
+		eval "[ -z \"\$$v\" ] && $err \"extract_e6400vga: $v undefined\""
 	done
 	tail -c +$E6400_VGA_offset "$_dl" | gunzip > "$appdir/bios.bin" || :
 	(
 	x_ cd "${appdir}"
-	[ -f "bios.bin" ] || err "extract_e6400vga: can't extract bios.bin"
+	[ -f "bios.bin" ] || $err "extract_e6400vga: can't extract bios.bin"
 	"${e6400_unpack}" bios.bin || printf "TODO: fix dell extract util\n"
 	[ -f "${E6400_VGA_romname}" ] || \
-		err "extract_e6400vga: can't extract vga rom from bios.bin"
-	) || err "can't extract e6400 vga rom"
+		$err "extract_e6400vga: can't extract vga rom from bios.bin"
+	) || $err "can't extract e6400 vga rom"
 	cp "${appdir}/${E6400_VGA_romname}" "${_dest}" || \
-	    err "extract_e6400vga ${board}: can't copy vga rom to ${_dest}"
+	    $err "extract_e6400vga ${board}: can't copy vga rom to ${_dest}"
 }
 
 extract_sch5545ec()
@@ -258,9 +258,9 @@ extract_sch5545ec()
 
 	# this makes the file defined by _sch5545ec_fw available to copy
 	"${uefiextract}" "${_bios}" || \
-	    err "extract_sch5545ec: cannot extract from uefi image"
+	    $err "extract_sch5545ec: cannot extract from uefi image"
 	cp "${_sch5545ec_fw}" "${_dest}" || \
-	    err "extract_sch5545ec: cannot copy sch5545ec firmware file"
+	    $err "extract_sch5545ec: cannot copy sch5545ec firmware file"
 }
 
 main $@
diff --git a/script/vendor/inject b/script/vendor/inject
index 4ac2753f..dc12d7b5 100755
--- a/script/vendor/inject
+++ b/script/vendor/inject
@@ -13,7 +13,7 @@ eval "$(setvars "" archive rom modifygbe nukemode release new_mac tree)"
 
 main()
 {
-	[ $# -lt 1 ] && err "No options specified."
+	[ $# -lt 1 ] && $err "No options specified."
 	[ "${1}" = "listboards" ] && eval "items config/coreboot || :; exit 0"
 
 	archive="${1}"
@@ -42,8 +42,8 @@ check_board()
 	failcheck="n"
 	check_release "${archive}" || failcheck="y"
 	if [ "${failcheck}" = "y" ]; then
-		[ -f "$rom" ] || err "check_board \"$rom\": invalid path"
-		[ -z "${rom+x}" ] && err "check_board: no rom specified"
+		[ -f "$rom" ] || $err "check_board \"$rom\": invalid path"
+		[ -z "${rom+x}" ] && $err "check_board: no rom specified"
 		[ -n "${board+x}" ] || board=$(detect_board "${rom}")
 	else
 		release="y"
@@ -51,11 +51,11 @@ check_board()
 	fi
 
 	boarddir="${cbcfgsdir}/${board}"
-	[ -d "$boarddir" ] || err "check_board: board $board missing"
+	[ -d "$boarddir" ] || $err "check_board: board $board missing"
 	[ -f "$boarddir/target.cfg" ] || \
-		err "check_board $board: target.cfg missing"
+		$err "check_board $board: target.cfg missing"
 	. "$boarddir/target.cfg" 2>/dev/null
-	[ -z "$tree" ] && err "check_board $board: tree undefined"; return 0
+	[ -z "$tree" ] && $err "check_board $board: tree undefined"; return 0
 }
 
 check_release()
@@ -80,7 +80,7 @@ detect_board()
 		_stripped_prefix=${filename#*_}
 		board="${_stripped_prefix%.tar.xz}" ;;
 	*)
-		err "detect_board $filename: could not detect board type"
+		$err "detect_board $filename: could not detect board type"
 	esac	
 	printf "%s\n" "${board}"
 }
@@ -109,7 +109,7 @@ patch_release_roms()
 	_tmpdir="tmp/romdir"
 	remkdir "${_tmpdir}"
 	tar -xf "${archive}" -C "${_tmpdir}" || \
-	    err "patch_release_roms: !tar -xf \"$archive\" -C \"$_tmpdir\""
+	    $err "patch_release_roms: !tar -xf \"$archive\" -C \"$_tmpdir\""
 
 	for x in "${_tmpdir}"/bin/*/*.rom ; do
 		printf "patching rom: %s\n" "$x"
@@ -118,14 +118,14 @@ patch_release_roms()
 
 	(
 	cd "${_tmpdir}/bin/"* || \
-	    err "patch_release_roms: !cd ${_tmpdir}/bin/*"
+	    $err "patch_release_roms: !cd ${_tmpdir}/bin/*"
 
 	# NOTE: For compatibility with older rom releases, defer to sha1
 	[ "${nukemode}" = "nuke" ] || sha512sum --status -c vendorhashes || \
 	    sha1sum --status -c vendorhashes || sha512sum --status -c \
 	    blobhashes || sha1sum --status -c blobhashes || \
-	    err "patch_release_roms: ROMs did not match expected hashes"
-	) || err "can't verify vendor hashes"
+	    $err "patch_release_roms: ROMs did not match expected hashes"
+	) || $err "can't verify vendor hashes"
 
 	[ "${modifygbe}" = "true" ] && \
 		for x in "${_tmpdir}"/bin/*/*.rom ; do
@@ -143,7 +143,7 @@ patch_rom()
 {
 	rom="${1}"
 
-	check_defconfig "$boarddir" && err "patch_rom $boarddir: no configs"
+	check_defconfig "$boarddir" && $err "patch_rom $boarddir: no configs"
 
 	set -- "${boarddir}/config/"*
 	. "${1}" 2>/dev/null
@@ -174,18 +174,18 @@ patch_rom()
 inject()
 {
 	[ $# -lt 3 ] && \
-		err "inject $@, $rom: usage: inject name path type (offset)"
+		$err "inject $@, $rom: usage: inject name path type (offset)"
 
 	eval "$(setvars "" cbfsname _dest _t _offset)"
 	cbfsname="${1}"
 	_dest="${2##*../}"
 	_t="${3}"
 	[ $# -gt 3 ] && _offset="-b ${4}" && [ -z "${4}" ] && \
-	    err "inject $@, $rom: offset passed, but empty (not defined)"
+	    $err "inject $@, $rom: offset passed, but empty (not defined)"
 
-	[ -z "${_dest}" ] && err "inject $@, ${rom}: empty destination path"
+	[ -z "${_dest}" ] && $err "inject $@, ${rom}: empty destination path"
 	[ ! -f "${_dest}" ] && [ "${nukemode}" != "nuke" ] && \
-		err "inject_${dl_type}: file missing, ${_dest}"
+		$err "inject_${dl_type}: file missing, ${_dest}"
 
 	[ "$nukemode" = "nuke" ] || \
 		printf "Inserting %s/%s in file: %s\n" "$cbfsname" "$_t" "$rom"
@@ -193,18 +193,18 @@ inject()
 	if [ "${_t}" = "GbE" ]; then
 		x_ mkdir -p tmp
 		cp "${_dest}" "tmp/gbe.bin" || \
-		    err "inject: !cp \"${_dest}\" \"tmp/gbe.bin\""
+		    $err "inject: !cp \"${_dest}\" \"tmp/gbe.bin\""
 		_dest="tmp/gbe.bin"
 		"${nvmutil}" "${_dest}" setmac "${new_mac}" || \
-		    err "inject ${_dest}: can't change mac address"
+		    $err "inject ${_dest}: can't change mac address"
 	fi
 	if [ "${cbfsname}" = "IFD" ]; then
 		if [ "${nukemode}" != "nuke" ]; then
 			"$ifdtool" -i ${_t}:${_dest} "$rom" -O "$rom" || \
-			    err "inject: can't insert $_t ($dest) into $rom"
+			    $err "inject: can't insert $_t ($dest) into $rom"
 		else
 			"$ifdtool" --nuke $_t "$rom" -O "$rom" || \
-			    err "inject $rom: can't nuke $_t in IFD"
+			    $err "inject $rom: can't nuke $_t in IFD"
 		fi
 	else
 		if [ "${nukemode}" != "nuke" ]; then
@@ -214,11 +214,11 @@ inject()
 			else
 				"$cbfstool" "$rom" add -f "$_dest" \
 				    -n "$cbfsname" -t $_t $_offset || \
-				    err "$rom: can't insert $_t file $_dest"
+				    $err "$rom: can't insert $_t file $_dest"
 			fi
 		else
 			"$cbfstool" "$rom" remove -n "$cbfsname" || \
-			    err "inject $rom: can't remove $cbfsname"
+			    $err "inject $rom: can't remove $cbfsname"
 		fi
 	fi
 }

From 332778973c3bca867dd2aa608b89a017a2e44b77 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 27 Mar 2024 07:14:47 +0000
Subject: [PATCH 0239/1549] allow users to specify number of build threads

lbmk otherwise uses nproc to set the number of build threads,
in these places:

* generic make commands in script/update/trees
* crossgcc make command in script/update/trees

the -T0 option is also used in script/update/release, when running
tar.

with this change, you can do:

export LBMK_THREADS=x

where x is the number of threads. when you then run
lbmk, your chosen number of threads will override
the default. this may be useful on a host that does
not have a lot of memory.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/option.sh     | 8 ++++++++
 script/update/release | 7 ++++---
 script/update/trees   | 4 ++--
 3 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/include/option.sh b/include/option.sh
index 64442d15..8fc80aaa 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -22,6 +22,14 @@ eval "$(setvars "" CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
     CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE _dest board boarddir \
     CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE)"
 
+threads=
+set | grep LBMK_THREADS 1>/dev/null 2>/dev/null || threads=$(nproc) || :
+[ -z "$threads" ] && threads=$LBMK_THREADS
+[ -z "$threads" ] && threads=1 # LBMK_THREADS not set, and nproc failed
+
+expr "X$threads" : "X-\{0,1\}[0123456789][0123456789]*$" \
+    1>/dev/null 2>/dev/null || threads=1 # user specified a non-integer
+
 items()
 {
 	rval=1
diff --git a/script/update/release b/script/update/release
index c4101b5a..25ada9da 100755
--- a/script/update/release
+++ b/script/update/release
@@ -215,11 +215,12 @@ mktarball()
 		mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
 	if [ "${tar_implementation% *}" = "tar (GNU tar)" ]; then
 		tar --sort=name --owner=root:0 --group=root:0 \
-		    --mtime="UTC 2024-02-25" -c "$1" | xz -T0 -9e > "$2" || \
-		    $err "mktarball 1, ${1}"
+		    --mtime="UTC 2024-02-25" -c "$1" | xz -T$threads -9e \
+		    > "$2" || $err "mktarball 1, ${1}"
 	else
 		# TODO: reproducible tarballs on non-GNU systems
-		tar -c "$1" | xz -T0 -9e > "$2" || $err "mktarball 2, $1"
+		tar -c "$1" | xz -T$threads -9e > "$2" || \
+		    $err "mktarball 2, $1"
 	fi
 	(
 	[ "${2%/*}" != "${2}" ] && x_ cd "${2%/*}"
diff --git a/script/update/trees b/script/update/trees
index 40ff1878..ac5743be 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -172,7 +172,7 @@ check_cross_compiler()
 		[ -n "${xlang}" ] && export BUILD_LANGUAGES="$xlang"
 
 		[ -d "${cbdir}/util/crossgcc/xgcc/${_xarch}/" ] && continue
-		x_ make -C "$cbdir" crossgcc-${_xarch%-*} CPUS=$(nproc)
+		x_ make -C "$cbdir" crossgcc-${_xarch%-*} CPUS=$threads
 	done
 }
 
@@ -219,7 +219,7 @@ run_make_command()
 	[ "$project" = "coreboot" ] && [ -z "$mode" ] && x_ \
 		printf "%s\n" "${version%%-*}" > "$codedir/.coreboot-version"
 
-	make $mode -j$(nproc) $makeargs -C "$codedir" || \
+	make $mode -j$threads $makeargs -C "$codedir" || \
 	    $err "run_make $codedir: !make $mode"
 
 	[ "$mode" != "clean" ] && return 0

From 5cb17795c647407ae36db82dbd03f7a3ed978735 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 30 Mar 2024 06:06:09 +0000
Subject: [PATCH 0240/1549] fix sata slots on dell 9020 sff and mt

3rd sata slot (of 3) broken on 9020 sff, and the 3rd and 4th (of 4)
slots are broken on 9020 mt

this patch fixes them on both, so that all ports work properly

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...x-sata-ports-on-dell-9020-sff-and-mt.patch | 66 +++++++++++++++++++
 1 file changed, 66 insertions(+)
 create mode 100644 config/coreboot/default/patches/0039-fix-sata-ports-on-dell-9020-sff-and-mt.patch

diff --git a/config/coreboot/default/patches/0039-fix-sata-ports-on-dell-9020-sff-and-mt.patch b/config/coreboot/default/patches/0039-fix-sata-ports-on-dell-9020-sff-and-mt.patch
new file mode 100644
index 00000000..f4c3939c
--- /dev/null
+++ b/config/coreboot/default/patches/0039-fix-sata-ports-on-dell-9020-sff-and-mt.patch
@@ -0,0 +1,66 @@
+From 4889f08306f1530211dcc6f6a4e999c6cc72f3ac Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sat, 30 Mar 2024 05:57:54 +0000
+Subject: [PATCH 1/1] fix sata ports on dell 9020 sff and mt
+
+mate kukri has a patch under review on coreboot that sets
+sata port map to 0x7 on sff and 0xf on mt.
+
+see: intel 8 series pch datasheet, section 13.1.35
+
+basically, the 6 least significant bits enable the sata
+slots; 1 for enable and 0 for disable. there can be up
+to 6 ports. least significant bit is port 0, then next
+is port 1, and so on.
+
+coreboot currently enables ports 0, 1, 4 and 5, making this
+value 0x33 (converted to binary: 00110011). sff has ports
+0, 1 and 2 wired, so mate changed that to 0x7 (00000111).
+
+on mt, the blue ports are ports 0 and 1, but the two white
+ports don't work, but coreboot enables 4 and 5; it is
+likely that the blue ports are in fact 0 and 1, and the
+white ports are 2 and 3, but we've not tested this!
+
+it could be that the blue ports are ports 4 and 5, and
+the white ports are 2 and 3! we have not yet determined
+this, but mate set it to 0xf, meaning ports 0 1 2 and 3
+are enabled, in his patch under review. the chance that
+it's 2, 3, 4 and 5 on the board is unlikely, but it is
+theoretically possible and has not been confirmed.
+
+therefore, for now, i will set the value to 0x3f, which
+in binary is 00111111, thus enabling all 6 slots. the two
+that aren't physically wired don't really matter. enabling
+ports (from the pch) that electrically aren't there and
+then powering on is electrically equivalent to those ports
+being actually being wired, but with no devices plugged
+into them. therefore, 0x3f is an effective shotgun fix.
+
+i'll remove this patch and use mate's fix when the latter
+has been tested on MT; it has already been tested on SFF.
+
+this patch fixes the 3rd sata slot on 9020 sff, and the 3rd
+and 4th sata slots on 9020 MT
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/dell/optiplex_9020/devicetree.cb | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/mainboard/dell/optiplex_9020/devicetree.cb b/src/mainboard/dell/optiplex_9020/devicetree.cb
+index c0b17a15ff..7bfa6736a6 100644
+--- a/src/mainboard/dell/optiplex_9020/devicetree.cb
++++ b/src/mainboard/dell/optiplex_9020/devicetree.cb
+@@ -23,7 +23,7 @@ chip northbridge/intel/haswell
+ 			register "gen2_dec" = "0x007c0901"
+ 			register "gen3_dec" = "0x003c07e1"
+ 			register "gen4_dec" = "0x001c0901"
+-			register "sata_port_map" = "0x33"
++			register "sata_port_map" = "0x3f"
+ 
+ 			device pci 14.0 on  end				# xHCI controller
+ 			device pci 16.0 on  end				# Management Engine interface 1
+-- 
+2.39.2
+

From f7283fa10dad76f20ec4ed2841dbbbb00ee9c865 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 5 Apr 2024 23:44:06 +0100
Subject: [PATCH 0241/1549] grub xhci support

see:

https://github.com/9elements/grub/commits/xhci-module-upstreaming-squash_v4/

grub only supports xhci on bios/uefi targets, but not coreboot.
some newer machines don't have ps/2 controllers, and boot in a
way where ehci isn't available at startup; the controller can't
be used by ehci code, there must be xhci support.

the code is from Patrick Rudolph working on behalf of 9elements.
the code was also sent here for review:

https://lists.gnu.org/archive/html/grub-devel/2020-12/msg00111.html

however, upstream never merged these patches. libreboot will have
to maintain these from now on. the patches have been rebased for
use with grub 2.12.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/modules.list                      |    1 +
 ...b-Parse-SuperSpeed-companion-descrip.patch |  245 ++
 .../0002-usb-Add-enum-for-xHCI.patch          |   29 +
 ...rans-Set-default-maximum-packet-size.patch |   33 +
 ...b-Add-function-pointer-for-attach-de.patch |  121 +
 ...b-usbhub-Add-new-private-fields-for-.patch |   77 +
 ...6-grub-core-bus-usb-Add-xhci-support.patch | 2814 +++++++++++++++++
 ...b-usbhub-Add-xHCI-non-root-hub-suppo.patch |  127 +
 .../0008-Fix-compilation-on-x86_64.patch      |   90 +
 9 files changed, 3537 insertions(+)
 create mode 100644 config/grub/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
 create mode 100644 config/grub/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch
 create mode 100644 config/grub/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch
 create mode 100644 config/grub/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
 create mode 100644 config/grub/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
 create mode 100644 config/grub/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch
 create mode 100644 config/grub/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
 create mode 100644 config/grub/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch

diff --git a/config/grub/modules.list b/config/grub/modules.list
index 40bfd339..f3768adb 100644
--- a/config/grub/modules.list
+++ b/config/grub/modules.list
@@ -36,6 +36,7 @@ crypto \
 cryptodisk \
 diskfilter \
 echo \
+xhci \
 ehci \
 eval \
 exfat \
diff --git a/config/grub/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch b/config/grub/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
new file mode 100644
index 00000000..f533269f
--- /dev/null
+++ b/config/grub/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
@@ -0,0 +1,245 @@
+From 90c9011f2e0350a97e3df44b0fc6dd022e04c276 Mon Sep 17 00:00:00 2001
+From: Patrick Rudolph <patrick.rudolph@9elements.com>
+Date: Sun, 15 Nov 2020 19:00:27 +0100
+Subject: [PATCH 1/8] grub-core/bus/usb: Parse SuperSpeed companion descriptors
+
+Parse the SS_ENDPOINT_COMPANION descriptor, which is only present on USB 3.0
+capable devices and xHCI controllers. Make the descendp an array of pointers
+to the endpoint descriptor as it's no longer an continous array.
+
+Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
+---
+ grub-core/bus/usb/serial/common.c |  2 +-
+ grub-core/bus/usb/usb.c           | 44 +++++++++++++++++++------------
+ grub-core/bus/usb/usbhub.c        | 22 ++++++++++++----
+ grub-core/commands/usbtest.c      |  2 +-
+ grub-core/disk/usbms.c            |  2 +-
+ grub-core/term/usb_keyboard.c     |  2 +-
+ include/grub/usb.h                |  2 +-
+ include/grub/usbdesc.h            | 11 +++++++-
+ 8 files changed, 59 insertions(+), 28 deletions(-)
+
+diff --git a/grub-core/bus/usb/serial/common.c b/grub-core/bus/usb/serial/common.c
+index e9c995a0a..fc847d66d 100644
+--- a/grub-core/bus/usb/serial/common.c
++++ b/grub-core/bus/usb/serial/common.c
+@@ -72,7 +72,7 @@ grub_usbserial_attach (grub_usb_device_t usbdev, int configno, int interfno,
+   for (j = 0; j < interf->endpointcnt; j++)
+     {
+       struct grub_usb_desc_endp *endp;
+-      endp = &usbdev->config[0].interf[interfno].descendp[j];
++      endp = usbdev->config[0].interf[interfno].descendp[j];
+ 
+       if ((endp->endp_addr & 128) && (endp->attrib & 3) == 2
+ 	  && (in_endp == GRUB_USB_SERIAL_ENDPOINT_LAST_MATCHING
+diff --git a/grub-core/bus/usb/usb.c b/grub-core/bus/usb/usb.c
+index 7bd49d201..e578af793 100644
+--- a/grub-core/bus/usb/usb.c
++++ b/grub-core/bus/usb/usb.c
+@@ -118,7 +118,7 @@ grub_usb_device_initialize (grub_usb_device_t dev)
+   struct grub_usb_desc_device *descdev;
+   struct grub_usb_desc_config config;
+   grub_usb_err_t err;
+-  int i;
++  int i, j;
+ 
+   /* First we have to read first 8 bytes only and determine
+    * max. size of packet */
+@@ -152,6 +152,7 @@ grub_usb_device_initialize (grub_usb_device_t dev)
+       int currif;
+       char *data;
+       struct grub_usb_desc *desc;
++      struct grub_usb_desc_endp *endp;
+ 
+       /* First just read the first 4 bytes of the configuration
+ 	 descriptor, after that it is known how many bytes really have
+@@ -201,24 +202,27 @@ grub_usb_device_initialize (grub_usb_device_t dev)
+ 	    = (struct grub_usb_desc_if *) &data[pos];
+ 	  pos += dev->config[i].interf[currif].descif->length;
+ 
++    dev->config[i].interf[currif].descendp = grub_malloc (
++            dev->config[i].interf[currif].descif->endpointcnt *
++            sizeof(struct grub_usb_desc_endp));
++
++    j = 0;
+ 	  while (pos < config.totallen)
+             {
+               desc = (struct grub_usb_desc *)&data[pos];
+-              if (desc->type == GRUB_USB_DESCRIPTOR_ENDPOINT)
+-                break;
+-              if (!desc->length)
+-                {
+-                  err = GRUB_USB_ERR_BADDEVICE;
+-                  goto fail;
+-                }
+-              pos += desc->length;
+-            }
+-
+-	  /* Point to the first endpoint.  */
+-	  dev->config[i].interf[currif].descendp
+-	    = (struct grub_usb_desc_endp *) &data[pos];
+-	  pos += (sizeof (struct grub_usb_desc_endp)
+-		  * dev->config[i].interf[currif].descif->endpointcnt);
++              if (desc->type == GRUB_USB_DESCRIPTOR_ENDPOINT) {
++                endp = (struct grub_usb_desc_endp *) &data[pos];
++                dev->config[i].interf[currif].descendp[j++] = endp;
++                pos += desc->length;
++              } else {
++                if (!desc->length)
++                  {
++                    err = GRUB_USB_ERR_BADDEVICE;
++                    goto fail;
++                  }
++                pos += desc->length;
++             }
++	  }
+ 	}
+     }
+ 
+@@ -226,8 +230,14 @@ grub_usb_device_initialize (grub_usb_device_t dev)
+ 
+  fail:
+ 
+-  for (i = 0; i < GRUB_USB_MAX_CONF; i++)
++  for (i = 0; i < GRUB_USB_MAX_CONF; i++) {
++    int currif;
++
++    for (currif = 0; currif < dev->config[i].descconf->numif; currif++)
++      grub_free (dev->config[i].interf[currif].descendp);
++
+     grub_free (dev->config[i].descconf);
++  }
+ 
+   return err;
+ }
+diff --git a/grub-core/bus/usb/usbhub.c b/grub-core/bus/usb/usbhub.c
+index f5608e330..2ae29cba1 100644
+--- a/grub-core/bus/usb/usbhub.c
++++ b/grub-core/bus/usb/usbhub.c
+@@ -82,8 +82,14 @@ grub_usb_hub_add_dev (grub_usb_controller_t controller,
+   if (i == GRUB_USBHUB_MAX_DEVICES)
+     {
+       grub_error (GRUB_ERR_IO, "can't assign address to USB device");
+-      for (i = 0; i < GRUB_USB_MAX_CONF; i++)
+-        grub_free (dev->config[i].descconf);
++      for (i = 0; i < GRUB_USB_MAX_CONF; i++) {
++	int currif;
++
++	for (currif = 0; currif < dev->config[i].descconf->numif; currif++)
++	  grub_free (dev->config[i].interf[currif].descendp);
++
++	grub_free (dev->config[i].descconf);
++      }
+       grub_free (dev);
+       return NULL;
+     }
+@@ -96,8 +102,14 @@ grub_usb_hub_add_dev (grub_usb_controller_t controller,
+ 			      i, 0, 0, NULL);
+   if (err)
+     {
+-      for (i = 0; i < GRUB_USB_MAX_CONF; i++)
+-        grub_free (dev->config[i].descconf);
++      for (i = 0; i < GRUB_USB_MAX_CONF; i++) {
++	int currif;
++
++	for (currif = 0; currif < dev->config[i].descconf->numif; currif++)
++	  grub_free (dev->config[i].interf[currif].descendp);
++
++	grub_free (dev->config[i].descconf);
++      }
+       grub_free (dev);
+       return NULL;
+     }
+@@ -176,7 +188,7 @@ grub_usb_add_hub (grub_usb_device_t dev)
+        i++)
+     {
+       struct grub_usb_desc_endp *endp = NULL;
+-      endp = &dev->config[0].interf[0].descendp[i];
++      endp = dev->config[0].interf[0].descendp[i];
+ 
+       if ((endp->endp_addr & 128) && grub_usb_get_ep_type(endp)
+ 	  == GRUB_USB_EP_INTERRUPT)
+diff --git a/grub-core/commands/usbtest.c b/grub-core/commands/usbtest.c
+index 2c6d93fe6..55a657635 100644
+--- a/grub-core/commands/usbtest.c
++++ b/grub-core/commands/usbtest.c
+@@ -185,7 +185,7 @@ usb_iterate (grub_usb_device_t dev, void *data __attribute__ ((unused)))
+       for (j = 0; j < interf->endpointcnt; j++)
+ 	{
+ 	  struct grub_usb_desc_endp *endp;
+-	  endp = &dev->config[0].interf[i].descendp[j];
++	  endp = dev->config[0].interf[i].descendp[j];
+ 
+ 	  grub_printf ("Endpoint #%d: %s, max packed size: %d, transfer type: %s, latency: %d\n",
+ 		       endp->endp_addr & 15,
+diff --git a/grub-core/disk/usbms.c b/grub-core/disk/usbms.c
+index b81e3ad9d..b1512dc12 100644
+--- a/grub-core/disk/usbms.c
++++ b/grub-core/disk/usbms.c
+@@ -184,7 +184,7 @@ grub_usbms_attach (grub_usb_device_t usbdev, int configno, int interfno)
+   for (j = 0; j < interf->endpointcnt; j++)
+     {
+       struct grub_usb_desc_endp *endp;
+-      endp = &usbdev->config[0].interf[interfno].descendp[j];
++      endp = usbdev->config[0].interf[interfno].descendp[j];
+ 
+       if ((endp->endp_addr & 128) && (endp->attrib & 3) == 2)
+ 	/* Bulk IN endpoint.  */
+diff --git a/grub-core/term/usb_keyboard.c b/grub-core/term/usb_keyboard.c
+index 7322d8dff..d590979f5 100644
+--- a/grub-core/term/usb_keyboard.c
++++ b/grub-core/term/usb_keyboard.c
+@@ -175,7 +175,7 @@ grub_usb_keyboard_attach (grub_usb_device_t usbdev, int configno, int interfno)
+   for (j = 0; j < usbdev->config[configno].interf[interfno].descif->endpointcnt;
+        j++)
+     {
+-      endp = &usbdev->config[configno].interf[interfno].descendp[j];
++      endp = usbdev->config[configno].interf[interfno].descendp[j];
+ 
+       if ((endp->endp_addr & 128) && grub_usb_get_ep_type(endp)
+ 	  == GRUB_USB_EP_INTERRUPT)
+diff --git a/include/grub/usb.h b/include/grub/usb.h
+index 0f346af12..688c11f6d 100644
+--- a/include/grub/usb.h
++++ b/include/grub/usb.h
+@@ -153,7 +153,7 @@ struct grub_usb_interface
+ {
+   struct grub_usb_desc_if *descif;
+ 
+-  struct grub_usb_desc_endp *descendp;
++  struct grub_usb_desc_endp **descendp;
+ 
+   /* A driver is handling this interface. Do we need to support multiple drivers
+      for single interface?
+diff --git a/include/grub/usbdesc.h b/include/grub/usbdesc.h
+index aac5ab05a..bb2ab2e27 100644
+--- a/include/grub/usbdesc.h
++++ b/include/grub/usbdesc.h
+@@ -29,7 +29,8 @@ typedef enum {
+   GRUB_USB_DESCRIPTOR_INTERFACE,
+   GRUB_USB_DESCRIPTOR_ENDPOINT,
+   GRUB_USB_DESCRIPTOR_DEBUG = 10,
+-  GRUB_USB_DESCRIPTOR_HUB = 0x29
++  GRUB_USB_DESCRIPTOR_HUB = 0x29,
++  GRUB_USB_DESCRIPTOR_SS_ENDPOINT_COMPANION = 0x30
+ } grub_usb_descriptor_t;
+ 
+ struct grub_usb_desc
+@@ -105,6 +106,14 @@ struct grub_usb_desc_endp
+   grub_uint8_t interval;
+ } GRUB_PACKED;
+ 
++struct grub_usb_desc_ssep {
++  grub_uint8_t  length;
++  grub_uint8_t  type;
++  grub_uint8_t  maxburst;
++  grub_uint8_t  attrib;
++  grub_uint16_t interval;
++} GRUB_PACKED;
++
+ struct grub_usb_desc_str
+ {
+   grub_uint8_t length;
+-- 
+2.39.2
+
diff --git a/config/grub/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch b/config/grub/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch
new file mode 100644
index 00000000..d61da615
--- /dev/null
+++ b/config/grub/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch
@@ -0,0 +1,29 @@
+From e111983ca5e2a52bfe2bdc5cd639b06bb2f7902d Mon Sep 17 00:00:00 2001
+From: Patrick Rudolph <patrick.rudolph@9elements.com>
+Date: Sun, 15 Nov 2020 19:47:06 +0100
+Subject: [PATCH 2/8] usb: Add enum for xHCI
+
+Will be used in future patches.
+
+Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
+---
+ include/grub/usb.h | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/include/grub/usb.h b/include/grub/usb.h
+index 688c11f6d..ea6ee8c2c 100644
+--- a/include/grub/usb.h
++++ b/include/grub/usb.h
+@@ -51,7 +51,8 @@ typedef enum
+     GRUB_USB_SPEED_NONE,
+     GRUB_USB_SPEED_LOW,
+     GRUB_USB_SPEED_FULL,
+-    GRUB_USB_SPEED_HIGH
++    GRUB_USB_SPEED_HIGH,
++    GRUB_USB_SPEED_SUPER
+   } grub_usb_speed_t;
+ 
+ typedef int (*grub_usb_iterate_hook_t) (grub_usb_device_t dev, void *data);
+-- 
+2.39.2
+
diff --git a/config/grub/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch b/config/grub/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch
new file mode 100644
index 00000000..70e73ca2
--- /dev/null
+++ b/config/grub/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch
@@ -0,0 +1,33 @@
+From 3e25c83a1d1c6e149c7e9f0660ddadb2beca2476 Mon Sep 17 00:00:00 2001
+From: Patrick Rudolph <patrick.rudolph@9elements.com>
+Date: Sun, 15 Nov 2020 19:48:03 +0100
+Subject: [PATCH 3/8] usbtrans: Set default maximum packet size
+
+Set the maximum packet size to 512 for SuperSpeed devices.
+
+Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
+---
+ grub-core/bus/usb/usbtrans.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/grub-core/bus/usb/usbtrans.c b/grub-core/bus/usb/usbtrans.c
+index c5680b33a..c1080bb33 100644
+--- a/grub-core/bus/usb/usbtrans.c
++++ b/grub-core/bus/usb/usbtrans.c
+@@ -128,8 +128,12 @@ grub_usb_control_msg (grub_usb_device_t dev,
+   setupdata_addr = grub_dma_get_phys (setupdata_chunk);
+ 
+   /* Determine the maximum packet size.  */
+-  if (dev->descdev.maxsize0)
++  if (dev->descdev.maxsize0 && dev->speed != GRUB_USB_SPEED_SUPER)
+     max = dev->descdev.maxsize0;
++  else if (dev->descdev.maxsize0 && dev->speed == GRUB_USB_SPEED_SUPER)
++    max = 1UL << dev->descdev.maxsize0;
++  else if (dev->speed == GRUB_USB_SPEED_SUPER)
++    max = 512;
+   else
+     max = 64;
+ 
+-- 
+2.39.2
+
diff --git a/config/grub/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch b/config/grub/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
new file mode 100644
index 00000000..a090e0ea
--- /dev/null
+++ b/config/grub/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
@@ -0,0 +1,121 @@
+From 89701aba00caa81bb566ab10da0c89264393be30 Mon Sep 17 00:00:00 2001
+From: Patrick Rudolph <patrick.rudolph@9elements.com>
+Date: Sun, 15 Nov 2020 19:51:42 +0100
+Subject: [PATCH 4/8] grub-core/bus/usb: Add function pointer for attach/detach
+ events
+
+The xHCI code needs to be called for attaching or detaching a device.
+Introduce two functions pointers and call it from the USB hub code.
+
+Will be used in future commits, currently this doesn't change any functionality.
+
+Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
+---
+ grub-core/bus/usb/ehci.c   |  2 ++
+ grub-core/bus/usb/ohci.c   |  2 ++
+ grub-core/bus/usb/uhci.c   |  2 ++
+ grub-core/bus/usb/usbhub.c | 19 +++++++++++++++++++
+ include/grub/usb.h         |  4 ++++
+ 5 files changed, 29 insertions(+)
+
+diff --git a/grub-core/bus/usb/ehci.c b/grub-core/bus/usb/ehci.c
+index 9abebc6bd..953b851c0 100644
+--- a/grub-core/bus/usb/ehci.c
++++ b/grub-core/bus/usb/ehci.c
+@@ -1812,6 +1812,8 @@ static struct grub_usb_controller_dev usb_controller = {
+   .hubports = grub_ehci_hubports,
+   .portstatus = grub_ehci_portstatus,
+   .detect_dev = grub_ehci_detect_dev,
++  .attach_dev = NULL,
++  .detach_dev = NULL,
+   /* estimated max. count of TDs for one bulk transfer */
+   .max_bulk_tds = GRUB_EHCI_N_TD * 3 / 4
+ };
+diff --git a/grub-core/bus/usb/ohci.c b/grub-core/bus/usb/ohci.c
+index 5363a61f6..7a3f3e154 100644
+--- a/grub-core/bus/usb/ohci.c
++++ b/grub-core/bus/usb/ohci.c
+@@ -1440,6 +1440,8 @@ static struct grub_usb_controller_dev usb_controller =
+   .hubports = grub_ohci_hubports,
+   .portstatus = grub_ohci_portstatus,
+   .detect_dev = grub_ohci_detect_dev,
++  .attach_dev = NULL,
++  .detach_dev = NULL,
+   /* estimated max. count of TDs for one bulk transfer */
+   .max_bulk_tds = GRUB_OHCI_TDS * 3 / 4
+ };
+diff --git a/grub-core/bus/usb/uhci.c b/grub-core/bus/usb/uhci.c
+index 0fdea4c1e..03c4605b2 100644
+--- a/grub-core/bus/usb/uhci.c
++++ b/grub-core/bus/usb/uhci.c
+@@ -845,6 +845,8 @@ static struct grub_usb_controller_dev usb_controller =
+   .hubports = grub_uhci_hubports,
+   .portstatus = grub_uhci_portstatus,
+   .detect_dev = grub_uhci_detect_dev,
++  .attach_dev = NULL,
++  .detach_dev = NULL,
+   /* estimated max. count of TDs for one bulk transfer */
+   .max_bulk_tds = N_TD * 3 / 4
+ };
+diff --git a/grub-core/bus/usb/usbhub.c b/grub-core/bus/usb/usbhub.c
+index 2ae29cba1..8e963e84b 100644
+--- a/grub-core/bus/usb/usbhub.c
++++ b/grub-core/bus/usb/usbhub.c
+@@ -66,6 +66,15 @@ grub_usb_hub_add_dev (grub_usb_controller_t controller,
+   dev->split_hubport = split_hubport;
+   dev->split_hubaddr = split_hubaddr;
+ 
++  if (controller->dev->attach_dev) {
++    err = controller->dev->attach_dev (controller, dev);
++    if (err)
++      {
++	grub_free (dev);
++	return NULL;
++      }
++  }
++
+   err = grub_usb_device_initialize (dev);
+   if (err)
+     {
+@@ -405,6 +414,8 @@ static void
+ detach_device (grub_usb_device_t dev)
+ {
+   unsigned i;
++  grub_usb_err_t err;
++
+   int k;
+   if (!dev)
+     return;
+@@ -425,6 +436,14 @@ detach_device (grub_usb_device_t dev)
+ 	  if (inter && inter->detach_hook)
+ 	    inter->detach_hook (dev, i, k);
+ 	}
++  if (dev->controller.dev->detach_dev) {
++    err = dev->controller.dev->detach_dev (&dev->controller, dev);
++    if (err)
++      {
++	// XXX
++      }
++  }
++
+   grub_usb_devs[dev->addr] = 0;
+ }
+ 
+diff --git a/include/grub/usb.h b/include/grub/usb.h
+index ea6ee8c2c..4dd179db2 100644
+--- a/include/grub/usb.h
++++ b/include/grub/usb.h
+@@ -126,6 +126,10 @@ struct grub_usb_controller_dev
+ 
+   grub_usb_speed_t (*detect_dev) (grub_usb_controller_t dev, int port, int *changed);
+ 
++  grub_usb_err_t (*attach_dev) (grub_usb_controller_t ctrl, grub_usb_device_t dev);
++
++  grub_usb_err_t (*detach_dev) (grub_usb_controller_t ctrl, grub_usb_device_t dev);
++
+   /* Per controller flag - port reset pending, don't do another reset */
+   grub_uint64_t pending_reset;
+ 
+-- 
+2.39.2
+
diff --git a/config/grub/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch b/config/grub/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
new file mode 100644
index 00000000..7d69c3a6
--- /dev/null
+++ b/config/grub/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
@@ -0,0 +1,77 @@
+From 5e5d74a4531770258e21dedd45c33f1a9d3afa6b Mon Sep 17 00:00:00 2001
+From: Patrick Rudolph <patrick.rudolph@9elements.com>
+Date: Sun, 15 Nov 2020 19:54:40 +0100
+Subject: [PATCH 5/8] grub-core/bus/usb/usbhub: Add new private fields for xHCI
+ controller
+
+Store the root port number, the route, consisting out of the port ID
+in each nibble, and a pointer to driver private data.
+
+Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
+---
+ grub-core/bus/usb/usbhub.c | 11 ++++++++---
+ include/grub/usb.h         |  5 +++++
+ 2 files changed, 13 insertions(+), 3 deletions(-)
+
+diff --git a/grub-core/bus/usb/usbhub.c b/grub-core/bus/usb/usbhub.c
+index 8e963e84b..b4b3a1a61 100644
+--- a/grub-core/bus/usb/usbhub.c
++++ b/grub-core/bus/usb/usbhub.c
+@@ -49,7 +49,9 @@ static grub_usb_controller_dev_t grub_usb_list;
+ static grub_usb_device_t
+ grub_usb_hub_add_dev (grub_usb_controller_t controller,
+                       grub_usb_speed_t speed,
+-                      int split_hubport, int split_hubaddr)
++                      int split_hubport, int split_hubaddr,
++                      int root_portno,
++                      grub_uint32_t route)
+ {
+   grub_usb_device_t dev;
+   int i;
+@@ -65,6 +67,8 @@ grub_usb_hub_add_dev (grub_usb_controller_t controller,
+   dev->speed = speed;
+   dev->split_hubport = split_hubport;
+   dev->split_hubaddr = split_hubaddr;
++  dev->root_port = root_portno;
++  dev->route = route;
+ 
+   if (controller->dev->attach_dev) {
+     err = controller->dev->attach_dev (controller, dev);
+@@ -245,7 +249,7 @@ attach_root_port (struct grub_usb_hub *hub, int portno,
+      and full/low speed device connected to OHCI/UHCI needs not
+      transaction translation - e.g. hubport and hubaddr should be
+      always none (zero) for any device connected to any root hub. */
+-  dev = grub_usb_hub_add_dev (hub->controller, speed, 0, 0);
++  dev = grub_usb_hub_add_dev (hub->controller, speed, 0, 0, portno, 0);
+   hub->controller->dev->pending_reset = 0;
+   npending--;
+   if (! dev)
+@@ -676,7 +680,8 @@ poll_nonroot_hub (grub_usb_device_t dev)
+ 
+ 	      /* Add the device and assign a device address to it.  */
+ 	      next_dev = grub_usb_hub_add_dev (&dev->controller, speed,
+-					       split_hubport, split_hubaddr);
++					       split_hubport, split_hubaddr, dev->root_port,
++					       dev->route << 4 | (i & 0xf));
+ 	      if (dev->controller.dev->pending_reset)
+ 		{
+ 		  dev->controller.dev->pending_reset = 0;
+diff --git a/include/grub/usb.h b/include/grub/usb.h
+index 4dd179db2..609faf7d0 100644
+--- a/include/grub/usb.h
++++ b/include/grub/usb.h
+@@ -237,6 +237,11 @@ struct grub_usb_device
+   int split_hubport;
+ 
+   int split_hubaddr;
++
++  /* xHCI specific information */
++  int root_port;
++  grub_uint32_t route;
++  void *xhci_priv;
+ };
+ 
+ 
+-- 
+2.39.2
+
diff --git a/config/grub/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch b/config/grub/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch
new file mode 100644
index 00000000..11df42d8
--- /dev/null
+++ b/config/grub/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch
@@ -0,0 +1,2814 @@
+From fe3a0bce527e059e9121eb5ad2c3cc099f07a4bf Mon Sep 17 00:00:00 2001
+From: Patrick Rudolph <patrick.rudolph@9elements.com>
+Date: Sun, 15 Nov 2020 19:59:25 +0100
+Subject: [PATCH 6/8] grub-core/bus/usb: Add xhci support
+
+Add support for xHCI USB controllers.
+The code is based on seabios implementation, but has been heavily
+modified to match grubs internals.
+
+Changes done in version 2:
+* Code cleanup
+* Code style fixes
+* Don't leak memory buffers
+* Compile without warnings
+* Add more defines
+* Add more helper functions
+* Don't assume a 1:1 virtual to physical mapping
+* Flush cachelines after writing buffers
+* Don't use hardcoded page size
+* Proper scratchpad register setup
+* xHCI bios ownership handoff
+
+Changes done in version 3:
+* Fixed a race condition detecting events, which doesn't appear on
+  qemu based xHCI controllers
+* Don't accidently disable USB3.0 devices after first command
+* Support arbitrary protocol speed IDs
+* Coding style cleanup
+
+Tested:
+* Qemu system x86_64
+  * virtual USB HID keyboard (usb-kbd)
+  * virtual USB HID mass storage (usb-storage)
+* init Supermicro X11SSH-F
+  * iKVM HID keyboard
+  * USB3 HID mass storage (controller root port)
+  * USB HID keyboard
+
+TODO:
+  * Test on more hardware
+  * Test on USB3 hubs
+  * Support for USB 3.1 and USB 3.2 controllers
+
+Tested on qemu using coreboot and grub as payload:
+
+qemu-system-x86_64 -M q35 -bios $firmware -device qemu-xhci,id=xhci -accel kvm -m 1024M \
+	-device usb-storage,drive=thumbdrive,bus=xhci.0,port=3 \
+	-drive if=none,format=raw,id=thumbdrive,file=ubuntu-20.04.1-desktop-amd64.iso \
+	-device usb-kbd,bus=xhci.0
+
+Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
+Signed-off-by: sylv <sylv@sylv.io>
+---
+ Makefile.am                  |    2 +-
+ grub-core/Makefile.core.def  |    7 +
+ grub-core/bus/usb/xhci-pci.c |  195 +++
+ grub-core/bus/usb/xhci.c     | 2496 ++++++++++++++++++++++++++++++++++
+ include/grub/usb.h           |    4 +
+ 5 files changed, 2703 insertions(+), 1 deletion(-)
+ create mode 100644 grub-core/bus/usb/xhci-pci.c
+ create mode 100644 grub-core/bus/usb/xhci.c
+
+diff --git a/Makefile.am b/Makefile.am
+index 43635d5ff..65016f856 100644
+--- a/Makefile.am
++++ b/Makefile.am
+@@ -434,7 +434,7 @@ if COND_i386_coreboot
+ FS_PAYLOAD_MODULES ?= $(shell cat grub-core/fs.lst)
+ default_payload.elf: grub-mkstandalone grub-mkimage FORCE
+ 	test -f $@ && rm $@ || true
+-	pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
++	pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata xhci ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
+ endif
+ 
+ endif
+diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
+index fb6078a34..64c3806ab 100644
+--- a/grub-core/Makefile.core.def
++++ b/grub-core/Makefile.core.def
+@@ -667,6 +667,13 @@ module = {
+   enable = arm_coreboot;
+ };
+ 
++module = {
++  name = xhci;
++  common = bus/usb/xhci.c;
++  pci = bus/usb/xhci-pci.c;
++  enable = pci;
++};
++
+ module = {
+   name = pci;
+   common = bus/pci.c;
+diff --git a/grub-core/bus/usb/xhci-pci.c b/grub-core/bus/usb/xhci-pci.c
+new file mode 100644
+index 000000000..a5bd3c97d
+--- /dev/null
++++ b/grub-core/bus/usb/xhci-pci.c
+@@ -0,0 +1,195 @@
++/* xhci.c - XHCI Support.  */
++/*
++ *  GRUB  --  GRand Unified Bootloader
++ *  Copyright (C) 2020 9elements Cyber Security
++ *
++ *  GRUB is free software: you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License as published by
++ *  the Free Software Foundation, either version 3 of the License, or
++ *  (at your option) any later version.
++ *
++ *  GRUB is distributed in the hope that it will be useful,
++ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *  GNU General Public License for more details.
++ *
++ *  You should have received a copy of the GNU General Public License
++ *  along with GRUB.  If not, see <http://www.gnu.org/licenses/>.
++ */
++
++#include <grub/pci.h>
++#include <grub/cpu/pci.h>
++#include <grub/cs5536.h>
++#include <grub/misc.h>
++#include <grub/mm.h>
++#include <grub/time.h>
++#include <grub/usb.h>
++
++#define GRUB_XHCI_PCI_SBRN_REG  0x60
++#define GRUB_XHCI_ADDR_MEM_MASK	(~0xff)
++
++/* USBLEGSUP bits and related OS OWNED byte offset */
++enum
++{
++  GRUB_XHCI_BIOS_OWNED = (1 << 16),
++  GRUB_XHCI_OS_OWNED = (1 << 24)
++};
++
++/* PCI iteration function... */
++static int
++grub_xhci_pci_iter (grub_pci_device_t dev, grub_pci_id_t pciid,
++		    void *data __attribute__ ((unused)))
++{
++  volatile grub_uint32_t *regs;
++  grub_uint32_t base, base_h;
++  grub_uint32_t eecp_offset;
++  grub_uint32_t usblegsup = 0;
++  grub_uint64_t maxtime;
++  grub_uint32_t interf;
++  grub_uint32_t subclass;
++  grub_uint32_t class;
++  grub_uint8_t release;
++  grub_uint32_t class_code;
++
++  grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: begin\n");
++
++  if (pciid == GRUB_CS5536_PCIID)
++    {
++	grub_dprintf ("xhci", "CS5536 not supported\n");
++	return 0;
++    }
++  else
++    {
++      grub_pci_address_t addr;
++      addr = grub_pci_make_address (dev, GRUB_PCI_REG_CLASS);
++      class_code = grub_pci_read (addr) >> 8;
++      interf = class_code & 0xFF;
++      subclass = (class_code >> 8) & 0xFF;
++      class = class_code >> 16;
++
++      /* If this is not an XHCI controller, just return.  */
++      if (class != 0x0c || subclass != 0x03 || interf != 0x30)
++	return 0;
++
++      grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: class OK\n");
++
++      /* Check Serial Bus Release Number */
++      addr = grub_pci_make_address (dev, GRUB_XHCI_PCI_SBRN_REG);
++      release = grub_pci_read_byte (addr);
++      if (release != 0x30)
++	{
++	  grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: Wrong SBRN: %0x\n",
++			release);
++	  return 0;
++	}
++      grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: bus rev. num. OK\n");
++
++      /* Determine XHCI XHCC registers base address.  */
++      addr = grub_pci_make_address (dev, GRUB_PCI_REG_ADDRESS_REG0);
++      base = grub_pci_read (addr);
++      addr = grub_pci_make_address (dev, GRUB_PCI_REG_ADDRESS_REG1);
++      base_h = grub_pci_read (addr);
++      /* Stop if registers are mapped above 4G - GRUB does not currently
++       * work with registers mapped above 4G */
++      if (((base & GRUB_PCI_ADDR_MEM_TYPE_MASK) != GRUB_PCI_ADDR_MEM_TYPE_32)
++	  && (base_h != 0))
++	{
++	  grub_dprintf ("xhci",
++			"XHCI grub_xhci_pci_iter: registers above 4G are not supported\n");
++	  return 0;
++	}
++      base &= GRUB_PCI_ADDR_MEM_MASK;
++      if (!base)
++	{
++	  grub_dprintf ("xhci",
++			"XHCI: XHCI is not mapped\n");
++	  return 0;
++	}
++
++      /* Set bus master - needed for coreboot, VMware, broken BIOSes etc. */
++      addr = grub_pci_make_address (dev, GRUB_PCI_REG_COMMAND);
++      grub_pci_write_word(addr,
++			  GRUB_PCI_COMMAND_MEM_ENABLED
++			  | GRUB_PCI_COMMAND_BUS_MASTER
++			  | grub_pci_read_word(addr));
++
++      grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: 32-bit XHCI OK\n");
++    }
++
++  grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: iobase of XHCC: %08x\n",
++		(base & GRUB_XHCI_ADDR_MEM_MASK));
++
++  regs = grub_pci_device_map_range (dev,
++				    (base & GRUB_XHCI_ADDR_MEM_MASK),
++				    0x100);
++
++  /* Is there EECP ? */
++  eecp_offset = (grub_le_to_cpu32 (regs[2]) >> 8) & 0xff;
++
++    /* Determine and change ownership. */
++  /* EECP offset valid in HCCPARAMS */
++  /* Ownership can be changed via EECP only */
++  if (pciid != GRUB_CS5536_PCIID && eecp_offset >= 0x40)
++    {
++      grub_pci_address_t pciaddr_eecp;
++      pciaddr_eecp = grub_pci_make_address (dev, eecp_offset);
++
++      usblegsup = grub_pci_read (pciaddr_eecp);
++      if (usblegsup & GRUB_XHCI_BIOS_OWNED)
++	{
++	  grub_boot_time ("Taking ownership of XHCI controller");
++	  grub_dprintf ("xhci",
++			"XHCI grub_xhci_pci_iter: XHCI owned by: BIOS\n");
++	  /* Ownership change - set OS_OWNED bit */
++	  grub_pci_write (pciaddr_eecp, usblegsup | GRUB_XHCI_OS_OWNED);
++	  /* Ensure PCI register is written */
++	  grub_pci_read (pciaddr_eecp);
++
++	  /* Wait for finish of ownership change, XHCI specification
++	   * doesn't say how long it can take... */
++	  maxtime = grub_get_time_ms () + 1000;
++	  while ((grub_pci_read (pciaddr_eecp) & GRUB_XHCI_BIOS_OWNED)
++		 && (grub_get_time_ms () < maxtime));
++	  if (grub_pci_read (pciaddr_eecp) & GRUB_XHCI_BIOS_OWNED)
++	    {
++	      grub_dprintf ("xhci",
++			    "XHCI grub_xhci_pci_iter: XHCI change ownership timeout");
++	      /* Change ownership in "hard way" - reset BIOS ownership */
++	      grub_pci_write (pciaddr_eecp, GRUB_XHCI_OS_OWNED);
++	      /* Ensure PCI register is written */
++	      grub_pci_read (pciaddr_eecp);
++	    }
++	}
++      else if (usblegsup & GRUB_XHCI_OS_OWNED)
++	/* XXX: What to do in this case - nothing ? Can it happen ? */
++	grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: XHCI owned by: OS\n");
++      else
++	{
++	  grub_dprintf ("xhci",
++			"XHCI grub_Xhci_pci_iter: XHCI owned by: NONE\n");
++	  /* XXX: What to do in this case ? Can it happen ?
++	   * Is code below correct ? */
++	  /* Ownership change - set OS_OWNED bit */
++	  grub_pci_write (pciaddr_eecp, GRUB_XHCI_OS_OWNED);
++	  /* Ensure PCI register is written */
++	  grub_pci_read (pciaddr_eecp);
++	}
++
++      /* Disable SMI, just to be sure.  */
++      pciaddr_eecp = grub_pci_make_address (dev, eecp_offset + 4);
++      grub_pci_write (pciaddr_eecp, 0);
++      /* Ensure PCI register is written */
++      grub_pci_read (pciaddr_eecp);
++    }
++
++  grub_dprintf ("xhci", "inithw: XHCI grub_xhci_pci_iter: ownership OK\n");
++
++  grub_xhci_init_device (regs);
++  return 0;
++}
++
++void
++grub_xhci_pci_scan (void)
++{
++  grub_pci_iterate (grub_xhci_pci_iter, NULL);
++}
+diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c
+new file mode 100644
+index 000000000..f4591ffb5
+--- /dev/null
++++ b/grub-core/bus/usb/xhci.c
+@@ -0,0 +1,2496 @@
++/* xhci.c - XHCI Support.  */
++/*
++ *  GRUB  --  GRand Unified Bootloader
++ *  Copyright (C) 2020 9elements Cyber Security
++ *
++ *  GRUB is free software: you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License as published by
++ *  the Free Software Foundation, either version 3 of the License, or
++ *  (at your option) any later version.
++ *
++ *  GRUB is distributed in the hope that it will be useful,
++ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *  GNU General Public License for more details.
++ *
++ *  You should have received a copy of the GNU General Public License
++ *  along with GRUB.  If not, see <http://www.gnu.org/licenses/>.
++ *
++ * Big parts of this software are inspired by seabios XHCI implementation
++ * Released under LGPLv3. Credits to:
++ *
++ * Copyright (C) 2013  Gerd Hoffmann <kraxel@redhat.com>
++ * Copyright (C) 2014  Kevin O'Connor <kevin@koconnor.net>
++ */
++
++#include <grub/dl.h>
++#include <grub/err.h>
++#include <grub/mm.h>
++#include <grub/usb.h>
++#include <grub/usbtrans.h>
++#include <grub/misc.h>
++#include <grub/time.h>
++#include <grub/loader.h>
++#include <grub/disk.h>
++#include <grub/dma.h>
++#include <grub/cache.h>
++#include <grub/i386/cpuid.h>
++
++GRUB_MOD_LICENSE ("GPLv3+");
++
++/* This simple GRUB implementation of XHCI driver */
++/* Based on the specification
++ * "eXtensible Host Controller Interface for Universal Serial Bus" Revision 1.2
++ */
++
++
++#define xhci_get_field(data, field)	     \
++    (((data) >> field##_SHIFT) & field##_MASK)
++#define XHCI_PORTSC_PLS_MASK     0xf
++#define XHCI_PORTSC_PLS_SHIFT    5
++#define XHCI_PORTSC_SPEED_MASK   0xf
++#define XHCI_PORTSC_SPEED_SHIFT  10
++
++enum
++{
++  XHCI_USB_FULLSPEED = 1,
++  XHCI_USB_LOWSPEED,
++  XHCI_USB_HIGHSPEED,
++  XHCI_USB_SUPERSPEED
++};
++
++/* Chapter 5.3 Host Controller Capability Registers */
++struct grub_xhci_caps {
++    grub_uint8_t  caplength;
++    grub_uint8_t  reserved_01;
++    grub_uint16_t hciversion;
++    grub_uint32_t hcsparams1;
++    grub_uint32_t hcsparams2;
++    grub_uint32_t hcsparams3;
++    grub_uint32_t hccparams;
++    grub_uint32_t dboff;
++    grub_uint32_t rtsoff;
++    grub_uint32_t hccparams2;
++} GRUB_PACKED;
++
++/* extended capabilities */
++struct grub_xhci_xcap {
++    grub_uint32_t cap;
++    grub_uint32_t data[];
++} GRUB_PACKED;
++
++#define XHCI_CAP_LEGACY_SUPPORT 1
++#define XHCI_CAP_SUPPORTED_PROTOCOL 2
++
++struct xhci_portmap {
++    grub_uint8_t start;
++    grub_uint8_t count;
++} GRUB_PACKED;
++
++struct grub_xhci_op {
++    grub_uint32_t usbcmd;
++    grub_uint32_t usbsts;
++    grub_uint32_t pagesize;
++    grub_uint32_t reserved_01[2];
++    grub_uint32_t dnctl;
++    grub_uint32_t crcr_low;
++    grub_uint32_t crcr_high;
++    grub_uint32_t reserved_02[4];
++    grub_uint32_t dcbaap_low;
++    grub_uint32_t dcbaap_high;
++    grub_uint32_t config;
++} GRUB_PACKED;
++
++enum
++{
++  GRUB_XHCI_CMD_RS = (1<<0),
++  GRUB_XHCI_CMD_HCRST = (1<<1),
++  GRUB_XHCI_CMD_INTE = (1<<2),
++  GRUB_XHCI_CMD_HSEE = (1<<3),
++  GRUB_XHCI_CMD_LHCRST = (1<<7),
++  GRUB_XHCI_CMD_CSS = (1<<8),
++  GRUB_XHCI_CMD_CRS = (1<<9),
++  GRUB_XHCI_CMD_EWE = (1<<10),
++  GRUB_XHCI_CMD_EU3S = (1<<11)
++};
++
++enum
++{
++  GRUB_XHCI_STS_HCH = (1<<0),
++  GRUB_XHCI_STS_HSE = (1<<2),
++  GRUB_XHCI_STS_EINT = (1<<3),
++  GRUB_XHCI_STS_PCD = (1<<4),
++  GRUB_XHCI_STS_SSS = (1<<8),
++  GRUB_XHCI_STS_RSS = (1<<9),
++  GRUB_XHCI_STS_SRE = (1<<10),
++  GRUB_XHCI_STS_CNR = (1<<11),
++  GRUB_XHCI_STS_HCE = (1<<12)
++};
++
++
++/* Port Registers Offset */
++#define GRUB_XHCI_PR_OFFSET 0x400
++/* Interrupter Registers Offset */
++#define GRUB_XHCI_IR_OFFSET 0x20
++
++/* Port Status and Control registers offsets */
++
++/* Chapter 6 Data Structures */
++#define ALIGN_SPBA 64
++#define ALIGN_DCBAA 64
++#define ALIGN_CMD_RING_SEG 64
++#define ALIGN_EVT_RING_SEG 64
++#define ALIGN_EVT_RING_TABLE 64
++#define ALIGN_TRB 16
++#define ALIGN_INCTX 64
++#define ALIGN_SLOTCTX 32
++
++#define BOUNDARY_RING 0x10000
++
++enum
++{
++  GRUB_XHCI_PORTSC_CCS = (1<<0),
++  GRUB_XHCI_PORTSC_PED = (1<<1),
++  GRUB_XHCI_PORTSC_OCA = (1<<3),
++  GRUB_XHCI_PORTSC_PR = (1<<4),
++  GRUB_XHCI_PORTSC_PP = (1<<9),
++  GRUB_XHCI_PORTSC_SPEED_FULL = (1<<10),
++  GRUB_XHCI_PORTSC_SPEED_LOW = (2<<10),
++  GRUB_XHCI_PORTSC_SPEED_HIGH = (3<<10),
++  GRUB_XHCI_PORTSC_SPEED_SUPER = (4<<10),
++  GRUB_XHCI_PORTSC_LWS = (1<<16),
++  GRUB_XHCI_PORTSC_CSC = (1<<17),
++  GRUB_XHCI_PORTSC_PEC = (1<<18),
++  GRUB_XHCI_PORTSC_WRC = (1<<19),
++  GRUB_XHCI_PORTSC_OCC = (1<<20),
++  GRUB_XHCI_PORTSC_PRC = (1<<21),
++  GRUB_XHCI_PORTSC_PLC = (1<<22),
++  GRUB_XHCI_PORTSC_CEC = (1<<23),
++  GRUB_XHCI_PORTSC_CAS = (1<<24),
++  GRUB_XHCI_PORTSC_WCE = (1<<25),
++  GRUB_XHCI_PORTSC_WDE = (1<<26),
++  GRUB_XHCI_PORTSC_WOE = (1<<27),
++  GRUB_XHCI_PORTSC_DR = (1<<30),
++  GRUB_XHCI_PORTSC_WPR = (1<<31)
++};
++
++/* XHCI memory data structs */
++#define GRUB_XHCI_MAX_ENDPOINTS 32
++
++#define GRUB_XHCI_RING_ITEMS 128
++#define GRUB_XHCI_RING_SIZE (GRUB_XHCI_RING_ITEMS*sizeof(struct grub_xhci_trb))
++/*
++ *  xhci_ring structs are allocated with XHCI_RING_SIZE alignment,
++ *  then we can get it from a trb pointer (provided by evt ring).
++ */
++#define XHCI_RING(_trb)	  \
++    ((struct grub_xhci_ring*)((grub_uint32_t)(_trb) & ~(GRUB_XHCI_RING_SIZE-1)))
++
++/* slot context */
++struct grub_xhci_slotctx {
++  grub_uint32_t ctx[4];
++  grub_uint32_t reserved_01[4];
++} GRUB_PACKED;
++
++/* endpoint context */
++struct grub_xhci_epctx {
++  grub_uint32_t ctx[2];
++  grub_uint32_t deq_low;
++  grub_uint32_t deq_high;
++  grub_uint32_t length;
++  grub_uint32_t reserved_01[3];
++} GRUB_PACKED;
++
++/* device context array element */
++struct grub_xhci_devlist {
++  grub_uint32_t ptr_low;
++  grub_uint32_t ptr_high;
++} GRUB_PACKED;
++
++/* input context */
++struct grub_xhci_inctx {
++  grub_uint32_t del;
++  grub_uint32_t add;
++  grub_uint32_t reserved_01[6];
++} GRUB_PACKED;
++
++/* transfer block (ring element) */
++struct grub_xhci_trb {
++  grub_uint32_t ptr_low;
++  grub_uint32_t ptr_high;
++  grub_uint32_t status;
++  grub_uint32_t control;
++} GRUB_PACKED;
++
++#define TRB_C	       (1<<0)
++#define TRB_TYPE_SHIFT	  10
++#define TRB_TYPE_MASK       0x3f
++#define TRB_TYPE(t)	 (((t) >> TRB_TYPE_SHIFT) & TRB_TYPE_MASK)
++
++#define TRB_EV_ED	   (1<<2)
++
++#define TRB_TR_ENT	  (1<<1)
++#define TRB_TR_ISP	  (1<<2)
++#define TRB_TR_NS	   (1<<3)
++#define TRB_TR_CH	   (1<<4)
++#define TRB_TR_IOC	  (1<<5)
++#define TRB_TR_IDT	  (1<<6)
++#define TRB_TR_TBC_SHIFT	7
++#define TRB_TR_TBC_MASK     0x3
++#define TRB_TR_BEI	  (1<<9)
++#define TRB_TR_TLBPC_SHIFT      16
++#define TRB_TR_TLBPC_MASK   0xf
++#define TRB_TR_FRAMEID_SHIFT    20
++#define TRB_TR_FRAMEID_MASK 0x7ff
++#define TRB_TR_SIA	  (1<<31)
++
++#define TRB_TR_DIR	  (1<<16)
++
++#define TRB_CR_SLOTID_SHIFT     24
++#define TRB_CR_SLOTID_MASK  0xff
++#define TRB_CR_EPID_SHIFT       16
++#define TRB_CR_EPID_MASK    0x1f
++
++#define TRB_CR_BSR	  (1<<9)
++#define TRB_CR_DC	   (1<<9)
++
++#define TRB_LK_TC	   (1<<1)
++
++#define TRB_INTR_SHIFT	  22
++#define TRB_INTR_MASK       0x3ff
++#define TRB_INTR(t)	 (((t).status >> TRB_INTR_SHIFT) & TRB_INTR_MASK)
++
++typedef enum TRBType {
++    TRB_RESERVED = 0,
++    TR_NORMAL,
++    TR_SETUP,
++    TR_DATA,
++    TR_STATUS,
++    TR_ISOCH,
++    TR_LINK,
++    TR_EVDATA,
++    TR_NOOP,
++    CR_ENABLE_SLOT,
++    CR_DISABLE_SLOT,
++    CR_ADDRESS_DEVICE,
++    CR_CONFIGURE_ENDPOINT,
++    CR_EVALUATE_CONTEXT,
++    CR_RESET_ENDPOINT,
++    CR_STOP_ENDPOINT,
++    CR_SET_TR_DEQUEUE,
++    CR_RESET_DEVICE,
++    CR_FORCE_EVENT,
++    CR_NEGOTIATE_BW,
++    CR_SET_LATENCY_TOLERANCE,
++    CR_GET_PORT_BANDWIDTH,
++    CR_FORCE_HEADER,
++    CR_NOOP,
++    ER_TRANSFER = 32,
++    ER_COMMAND_COMPLETE,
++    ER_PORT_STATUS_CHANGE,
++    ER_BANDWIDTH_REQUEST,
++    ER_DOORBELL,
++    ER_HOST_CONTROLLER,
++    ER_DEVICE_NOTIFICATION,
++    ER_MFINDEX_WRAP,
++} TRBType;
++
++typedef enum TRBCCode {
++    CC_INVALID = 0,
++    CC_SUCCESS,
++    CC_DATA_BUFFER_ERROR,
++    CC_BABBLE_DETECTED,
++    CC_USB_TRANSACTION_ERROR,
++    CC_TRB_ERROR,
++    CC_STALL_ERROR,
++    CC_RESOURCE_ERROR,
++    CC_BANDWIDTH_ERROR,
++    CC_NO_SLOTS_ERROR,
++    CC_INVALID_STREAM_TYPE_ERROR,
++    CC_SLOT_NOT_ENABLED_ERROR,
++    CC_EP_NOT_ENABLED_ERROR,
++    CC_SHORT_PACKET,
++    CC_RING_UNDERRUN,
++    CC_RING_OVERRUN,
++    CC_VF_ER_FULL,
++    CC_PARAMETER_ERROR,
++    CC_BANDWIDTH_OVERRUN,
++    CC_CONTEXT_STATE_ERROR,
++    CC_NO_PING_RESPONSE_ERROR,
++    CC_EVENT_RING_FULL_ERROR,
++    CC_INCOMPATIBLE_DEVICE_ERROR,
++    CC_MISSED_SERVICE_ERROR,
++    CC_COMMAND_RING_STOPPED,
++    CC_COMMAND_ABORTED,
++    CC_STOPPED,
++    CC_STOPPED_LENGTH_INVALID,
++    CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR = 29,
++    CC_ISOCH_BUFFER_OVERRUN = 31,
++    CC_EVENT_LOST_ERROR,
++    CC_UNDEFINED_ERROR,
++    CC_INVALID_STREAM_ID_ERROR,
++    CC_SECONDARY_BANDWIDTH_ERROR,
++    CC_SPLIT_TRANSACTION_ERROR
++} TRBCCode;
++
++enum {
++    PLS_U0	      =  0,
++    PLS_U1	      =  1,
++    PLS_U2	      =  2,
++    PLS_U3	      =  3,
++    PLS_DISABLED	=  4,
++    PLS_RX_DETECT       =  5,
++    PLS_INACTIVE	=  6,
++    PLS_POLLING	 =  7,
++    PLS_RECOVERY	=  8,
++    PLS_HOT_RESET       =  9,
++    PLS_COMPILANCE_MODE = 10,
++    PLS_TEST_MODE       = 11,
++    PLS_RESUME	  = 15,
++};
++
++/* event ring segment */
++struct grub_xhci_er_seg {
++  grub_uint32_t ptr_low;
++  grub_uint32_t ptr_high;
++  grub_uint32_t size;
++  grub_uint32_t reserved_01;
++} GRUB_PACKED;
++
++struct grub_xhci_ring {
++    struct grub_xhci_trb      ring[GRUB_XHCI_RING_ITEMS];
++    struct grub_xhci_trb      evt;
++    grub_uint32_t	     eidx;
++    grub_uint32_t	     nidx;
++    grub_uint32_t	     cs;
++};
++
++/* port registers */
++struct grub_xhci_pr {
++    grub_uint32_t portsc;
++    grub_uint32_t portpmsc;
++    grub_uint32_t portli;
++    grub_uint32_t reserved_01;
++} GRUB_PACKED;
++
++/* doorbell registers */
++struct grub_xhci_db {
++    grub_uint32_t doorbell;
++} GRUB_PACKED;
++
++/* runtime registers */
++struct grub_xhci_rts {
++    grub_uint32_t mfindex;
++} GRUB_PACKED;
++
++/* interrupter registers */
++struct grub_xhci_ir {
++    grub_uint32_t iman;
++    grub_uint32_t imod;
++    grub_uint32_t erstsz;
++    grub_uint32_t reserved_01;
++    grub_uint32_t erstba_low;
++    grub_uint32_t erstba_high;
++    grub_uint32_t erdp_low;
++    grub_uint32_t erdp_high;
++} GRUB_PACKED;
++
++struct grub_xhci_psid {
++	grub_uint8_t id;
++	grub_uint8_t psie;
++	grub_uint16_t psim;
++	grub_uint64_t bitrate;
++	grub_usb_speed_t grub_usb_speed;
++};
++
++struct grub_xhci_psids {
++	grub_uint8_t major;
++	grub_uint8_t minor;
++	struct grub_xhci_psid psids[16];
++};
++
++struct grub_xhci
++{
++  grub_uint8_t shutdown; /* 1 if preparing shutdown of controller */
++  /* xhci registers */
++  volatile struct grub_xhci_caps *caps;	/* Capability registers */
++  volatile struct grub_xhci_op *op;	/* Operational registers */
++  volatile struct grub_xhci_pr *pr;	/* Port Registers */
++  volatile struct grub_xhci_db *db;	/* doorbell */
++  volatile struct grub_xhci_ir *ir;	/* Interrupt Registers */
++  /* devinfo */
++  grub_uint32_t xcap;
++  grub_uint32_t ports;
++  grub_uint32_t slots;
++  grub_uint8_t flag64;
++  grub_uint16_t spb;
++  grub_uint32_t pagesize;
++  struct xhci_portmap usb2;
++  struct xhci_portmap usb3;
++  struct grub_xhci_psids *psids;
++  /* xhci data structures */
++  struct grub_pci_dma_chunk *devs_dma;
++  volatile struct grub_xhci_devlist *devs;
++  struct grub_pci_dma_chunk *cmds_dma;
++  volatile struct grub_xhci_ring *cmds;
++  struct grub_pci_dma_chunk *evts_dma;
++  volatile struct grub_xhci_ring *evts;
++  struct grub_pci_dma_chunk *eseg_dma;
++  volatile struct grub_xhci_er_seg *eseg;
++  struct grub_pci_dma_chunk *spba_dma;
++  struct grub_pci_dma_chunk *spad_dma;
++
++  struct grub_xhci *next;
++};
++
++struct grub_xhci_priv {
++  grub_uint8_t                    slotid;
++  grub_uint32_t                   max_packet;
++  struct grub_pci_dma_chunk       *enpoint_trbs_dma[32];
++  volatile struct grub_xhci_ring  *enpoint_trbs[32];
++  struct grub_pci_dma_chunk       *slotctx_dma;
++};
++
++struct grub_xhci_port {
++  grub_uint32_t portsc;
++  grub_uint32_t portpmsc;
++  grub_uint32_t portli;
++  grub_uint32_t reserved_01;
++};
++
++struct grub_xhci_transfer_controller_data {
++  grub_uint32_t transfer_size;
++};
++
++static struct grub_xhci *xhci;
++
++/****************************************************************
++ * general access functions
++ ****************************************************************/
++
++static inline void
++grub_xhci_write32(volatile void *addr, grub_uint32_t val) {
++    *(volatile grub_uint32_t *)addr = val;
++}
++static inline void
++grub_xhci_write16(volatile void *addr, grub_uint16_t val) {
++    *(volatile grub_uint16_t *)addr = val;
++}
++static inline void
++grub_xhci_write8(void *addr, grub_uint8_t val) {
++    *(volatile grub_uint8_t *)addr = val;
++}
++
++static inline grub_uint32_t
++grub_xhci_read32(volatile void *addr) {
++  return grub_le_to_cpu32 (*((volatile grub_uint32_t *)addr));
++}
++
++static inline grub_uint16_t
++grub_xhci_read16(volatile void *addr) {
++  return grub_le_to_cpu16 (*((volatile grub_uint32_t *)addr));
++}
++static inline grub_uint8_t
++grub_xhci_read8(volatile void *addr) {
++  return (*((volatile grub_uint32_t *)addr));
++}
++
++static inline grub_uint32_t
++grub_xhci_port_read (struct grub_xhci *x, grub_uint32_t port)
++{
++  return grub_xhci_read32(&x->pr[port].portsc);
++}
++
++static inline void
++grub_xhci_port_write (struct grub_xhci *x, grub_uint32_t port,
++		      grub_uint32_t and_mask, grub_uint32_t or_mask)
++{
++  grub_uint32_t reg = grub_xhci_port_read(x, port);
++  reg &= and_mask;
++  reg |= or_mask;
++
++  grub_xhci_write32(&x->pr[port].portsc, reg);
++}
++
++/****************************************************************
++ * xhci status and support functions
++ ****************************************************************/
++
++static grub_uint32_t xhci_get_pagesize(struct grub_xhci *x)
++{
++  /* Chapter 5.4.3 Page Size Register (PAGESIZE) */
++  for (grub_uint8_t i = 0; i < 16; i++)
++    {
++      if (grub_xhci_read32(&x->op->pagesize) & (1 << i))
++	return 1 << (12 + i);
++    }
++  return 0;
++}
++
++static grub_uint8_t xhci_is_halted(struct grub_xhci *x)
++{
++  return !!(grub_xhci_read32(&x->op->usbsts) & 1);
++}
++
++/* Just for debugging */
++static void xhci_check_status(struct grub_xhci *x)
++{
++  grub_uint32_t reg;
++
++  reg = grub_xhci_read32(&x->op->usbsts);
++  if (reg & 1)
++    grub_dprintf("xhci", "%s: xHCI halted\n", __func__);
++  if (reg & 2)
++    grub_dprintf("xhci", "%s: Host system error detected\n", __func__);
++  if (reg & (1 << 12))
++    grub_dprintf("xhci", "%s: Internal error detected\n", __func__);
++  reg = grub_xhci_read32(&x->op->crcr_low);
++  if (reg & (1 << 3))
++    grub_dprintf("xhci", "%s: Command ring running\n", __func__);
++}
++
++/* xhci_memalign_dma32 allocates DMA memory satisfying alignment and boundary
++ * requirements without wasting to much memory */
++static struct grub_pci_dma_chunk *
++xhci_memalign_dma32(grub_size_t align,
++		    grub_size_t size,
++		    grub_size_t boundary)
++{
++	struct grub_pci_dma_chunk *tmp;
++	const grub_uint32_t mask = boundary - 1;
++	grub_uint32_t start, end;
++
++	/* Allocate some memory and check if it doesn't cross boundary */
++	tmp = grub_memalign_dma32(align, size);
++	start = grub_dma_get_phys(tmp);
++	end = start + size - 1;
++	if ((start & mask) == (end & mask))
++		return tmp;
++	/* Buffer isn't usable, allocate bigger one */
++	grub_dma_free(tmp);
++
++	return grub_memalign_dma32(boundary, size);
++}
++
++/****************************************************************
++ * helper functions for in context DMA buffer
++ ****************************************************************/
++
++static int
++grub_xhci_inctx_size(struct grub_xhci *x)
++{
++  const grub_uint8_t cnt = GRUB_XHCI_MAX_ENDPOINTS + 1;
++  return (sizeof(struct grub_xhci_inctx) * cnt) << x->flag64;
++}
++
++static void
++grub_xhci_inctx_sync_dma_caches(struct grub_xhci *x, struct grub_pci_dma_chunk *inctx)
++{
++  grub_arch_sync_dma_caches(inctx, grub_xhci_inctx_size(x));
++}
++
++static struct grub_pci_dma_chunk *
++grub_xhci_alloc_inctx(struct grub_xhci *x, int maxepid,
++		      struct grub_usb_device *dev)
++{
++  int size = grub_xhci_inctx_size(x);
++  struct grub_pci_dma_chunk *dma = xhci_memalign_dma32(ALIGN_INCTX, size,
++						       x->pagesize);
++  if (!dma)
++    return NULL;
++
++  volatile struct grub_xhci_inctx *in = grub_dma_get_virt(dma);
++  grub_memset((void *)in, 0, size);
++
++  struct grub_xhci_slotctx *slot = (void*)&in[1 << x->flag64];
++  slot->ctx[0]    |= maxepid << 27; /* context entries */
++  grub_dprintf("xhci", "%s: speed=%d root_port=%d\n", __func__, dev->speed, dev->root_port);
++  switch (dev->speed) {
++    case GRUB_USB_SPEED_FULL:
++      slot->ctx[0]    |= XHCI_USB_FULLSPEED << 20;
++      break;
++    case GRUB_USB_SPEED_HIGH:
++     slot->ctx[0]     |= XHCI_USB_HIGHSPEED << 20;
++      break;
++    case GRUB_USB_SPEED_LOW:
++      slot->ctx[0]    |= XHCI_USB_LOWSPEED << 20;
++      break;
++    case GRUB_USB_SPEED_SUPER:
++      slot->ctx[0]    |= XHCI_USB_SUPERSPEED << 20;
++      break;
++    case GRUB_USB_SPEED_NONE:
++      slot->ctx[0]    |= 0 << 20;
++      break;
++  }
++
++  /* Route is greater zero on devices that are connected to a non root hub */
++  if (dev->route)
++    {
++      /* FIXME: Implement this code for non SuperSpeed hub devices */
++    }
++  slot->ctx[0]    |= dev->route;
++  slot->ctx[1]    |= (dev->root_port+1) << 16;
++
++  grub_arch_sync_dma_caches(in, size);
++
++  return dma;
++}
++
++/****************************************************************
++ * xHCI event processing
++ ****************************************************************/
++
++/* Dequeue events on the XHCI event ring generated by the hardware */
++static void xhci_process_events(struct grub_xhci *x)
++{
++    volatile struct grub_xhci_ring *evts = x->evts;
++    /* XXX invalidate caches */
++
++    for (;;) {
++	/* check for event */
++	grub_uint32_t nidx = grub_xhci_read32(&evts->nidx);
++	grub_uint32_t cs = grub_xhci_read32(&evts->cs);
++	volatile struct grub_xhci_trb *etrb = evts->ring + nidx;
++	grub_uint32_t control = grub_xhci_read32(&etrb->control);
++	if ((control & TRB_C) != (cs ? 1 : 0))
++	    return;
++
++	/* process event */
++	grub_uint32_t evt_type = TRB_TYPE(control);
++	grub_uint32_t evt_cc = (grub_xhci_read32(&etrb->status) >> 24) & 0xff;
++
++	switch (evt_type)
++	  {
++	    case ER_TRANSFER:
++	    case ER_COMMAND_COMPLETE:
++	      {
++		struct grub_xhci_trb  *rtrb = (void*)grub_xhci_read32(&etrb->ptr_low);
++		struct grub_xhci_ring *ring = XHCI_RING(rtrb);
++		volatile struct grub_xhci_trb  *evt = &ring->evt;
++		grub_uint32_t eidx = rtrb - ring->ring + 1;
++		grub_dprintf("xhci", "%s: ring %p [trb %p, evt %p, type %d, eidx %d, cc %d]\n",
++			      __func__, ring, rtrb, evt, evt_type, eidx, evt_cc);
++		*evt = *etrb;
++		grub_xhci_write32(&ring->eidx, eidx);
++		break;
++	      }
++	    case ER_PORT_STATUS_CHANGE:
++	      {
++		/* Nothing to do here. grub_xhci_detect_dev will handle it */
++		break;
++	      }
++	    default:
++	      {
++		grub_dprintf("xhci", "%s: unknown event, type %d, cc %d\n",
++			      __func__, evt_type, evt_cc);
++		break;
++	      }
++	}
++
++	/* move ring index, notify xhci */
++	nidx++;
++	if (nidx == GRUB_XHCI_RING_ITEMS)
++	  {
++	    nidx = 0;
++	    cs = cs ? 0 : 1;
++	    grub_xhci_write32(&evts->cs, cs);
++	  }
++	grub_xhci_write32(&evts->nidx, nidx);
++	volatile struct grub_xhci_ir *ir = x->ir;
++	grub_uint32_t erdp = (grub_uint32_t)(evts->ring + nidx);
++	grub_xhci_write32(&ir->erdp_low, erdp);
++	grub_xhci_write32(&ir->erdp_high, 0);
++    }
++}
++
++/****************************************************************
++ * TRB handling
++ ****************************************************************/
++
++/* Signal the hardware to process events on a TRB ring */
++static void xhci_doorbell(struct grub_xhci *x, grub_uint32_t slotid, grub_uint32_t value)
++{
++  xhci_check_status(x);
++  grub_dprintf("xhci", "%s: slotid %d, epid %d\n", __func__, slotid, value);
++  grub_xhci_write32(&x->db[slotid].doorbell, value);
++}
++
++/* Check if a ring has any pending TRBs */
++static int xhci_ring_busy(volatile struct grub_xhci_ring *ring)
++{
++  grub_uint32_t eidx = grub_xhci_read32(&ring->eidx);
++  grub_uint32_t nidx = grub_xhci_read32(&ring->nidx);
++
++  return (eidx != nidx);
++}
++
++/* Returns free space in ring */
++static int xhci_ring_free_space(volatile struct grub_xhci_ring *ring)
++{
++  grub_uint32_t eidx = grub_xhci_read32(&ring->eidx);
++  grub_uint32_t nidx = grub_xhci_read32(&ring->nidx);
++
++  /* nidx is never 0, so reduce ring buffer size by one */
++  return (eidx > nidx) ? eidx-nidx
++		: (ARRAY_SIZE(ring->ring) - 1) - nidx + eidx;
++}
++
++/* Check if a ring is full */
++static int xhci_ring_full(volatile struct grub_xhci_ring *ring)
++{
++  /* Might need to insert one link TRB */
++  return xhci_ring_free_space(ring) <= 1;
++}
++
++/* Check if a ring is almost full */
++static int xhci_ring_almost_full(volatile struct grub_xhci_ring *ring)
++{
++  /* Might need to insert one link TRB */
++  return xhci_ring_free_space(ring) <= 2;
++}
++
++/* Wait for a ring to empty (all TRBs processed by hardware) */
++static int xhci_event_wait(struct grub_xhci *x,
++			   volatile struct grub_xhci_ring *ring,
++			   grub_uint32_t timeout)
++{
++    grub_uint32_t end = grub_get_time_ms () + timeout;
++
++    for (;;)
++      {
++	xhci_check_status(x);
++	xhci_process_events(x);
++	if (!xhci_ring_busy(ring))
++	  {
++	    grub_uint32_t status = ring->evt.status;
++	    return (status >> 24) & 0xff;
++	  }
++	if (grub_get_time_ms () > end)
++	  {
++	    xhci_check_status(x);
++	    grub_dprintf("xhci", "%s: Timeout waiting for event\n", __func__);
++	    return -1;
++	  }
++      }
++}
++
++/* Add a TRB to the given ring, either regular or inline */
++static void xhci_trb_fill(volatile struct grub_xhci_ring *ring,
++			  grub_uint64_t ptr, grub_uint32_t xferlen,
++			  grub_uint32_t flags)
++{
++  volatile struct grub_xhci_trb *dst = &ring->ring[ring->nidx];
++  dst->ptr_low = ptr & 0xffffffff;
++  dst->ptr_high = ptr >> 32;
++  dst->status = xferlen;
++  dst->control = flags | (ring->cs ? TRB_C : 0);
++
++  grub_arch_sync_dma_caches(dst, sizeof(ring->ring[0]));
++}
++
++/*
++ * Queue a TRB onto a ring.
++ *
++ * The caller must pass a pointer to the data in physical address-space or the
++ * data itself (but no more than 8 bytes) in data_or_addr. Inline data must have
++ * the flag TRB_TR_IDT set.
++ */
++static void xhci_trb_queue(volatile struct grub_xhci_ring *ring,
++			   grub_uint64_t data_or_addr,
++			   grub_uint32_t xferlen, grub_uint32_t flags)
++{
++  grub_dprintf("xhci", "%s: ring %p data %llx len %d flags 0x%x remain 0x%x\n", __func__,
++      ring, data_or_addr, xferlen & 0x1ffff, flags, xferlen >> 17);
++
++  if (xhci_ring_full(ring))
++    {
++      grub_dprintf("xhci", "%s: ERROR: ring %p is full, discarding TRB\n",
++	__func__, ring);
++      return;
++    }
++
++  if (ring->nidx >= ARRAY_SIZE(ring->ring) - 1)
++    {
++      /* Reset to command buffer pointer to the first element */
++      xhci_trb_fill(ring, (grub_addr_t)ring->ring, 0, (TR_LINK << 10) | TRB_LK_TC);
++      ring->nidx = 0;
++      ring->cs ^= 1;
++      grub_dprintf("xhci", "%s: ring %p [linked]\n", __func__, ring);
++    }
++
++  xhci_trb_fill(ring, data_or_addr, xferlen, flags);
++  ring->nidx++;
++  grub_dprintf("xhci", "%s: ring %p [nidx %d, len %d]\n",
++	       __func__, ring, ring->nidx, xferlen);
++}
++
++/*
++ * Queue a TRB onto a ring and flush it if necessary.
++ *
++ * The caller must pass a pointer to the data in physical address-space or the
++ * data itself (but no more than 8 bytes) in data_or_addr. Inline data must have
++ * the flag TRB_TR_IDT set.
++ */
++static int xhci_trb_queue_and_flush(struct grub_xhci *x,
++				    grub_uint32_t slotid,
++				    grub_uint32_t epid,
++				    volatile struct grub_xhci_ring *ring,
++				    grub_uint64_t data_or_addr,
++				    grub_uint32_t xferlen, grub_uint32_t flags)
++{
++  grub_uint8_t submit = 0;
++  if (xhci_ring_almost_full(ring))
++    {
++      grub_dprintf("xhci", "%s: almost full e %d n %d\n", __func__, ring->eidx, ring->nidx);
++      flags |= TRB_TR_IOC;
++      submit = 1;
++    }
++  /* Note: xhci_trb_queue might queue on or two elements, if the end of the TRB
++   * has been reached. The caller must account for that when filling the TRB. */
++  xhci_trb_queue(ring, data_or_addr, xferlen, flags);
++  /* Submit if less no free slot is remaining, we might need an additional
++   * one on the next call to this function. */
++  if (submit)
++    {
++      xhci_doorbell(x, slotid, epid);
++      int rc = xhci_event_wait(x, ring, 1000);
++      grub_dprintf("xhci", "%s: xhci_event_wait = %d\n", __func__, rc);
++      return rc;
++    }
++  return 0;
++}
++
++/****************************************************************
++ * xHCI command functions
++ ****************************************************************/
++
++/* Submit a command to the xHCI command TRB */
++static int xhci_cmd_submit(struct grub_xhci *x,
++			   struct grub_pci_dma_chunk *inctx_dma,
++			   grub_uint32_t flags)
++{
++  volatile struct grub_xhci_inctx *inctx;
++  /* Don't submit if halted, it will fail */
++  if (xhci_is_halted(x))
++    return -1;
++
++  if (inctx_dma)
++    {
++      grub_xhci_inctx_sync_dma_caches(x, inctx_dma);
++
++      inctx = grub_dma_get_virt(inctx_dma);
++
++      struct grub_xhci_slotctx *slot = (void*)&inctx[1 << x->flag64];
++      grub_uint32_t port = ((slot->ctx[1] >> 16) & 0xff) - 1;
++      grub_uint32_t portsc = grub_xhci_port_read(x, port);
++      if (!(portsc & GRUB_XHCI_PORTSC_CCS))
++	{
++	  grub_dprintf("xhci", "%s: root port %d no longer connected\n",
++	    __func__, port);
++	  return -1;
++	}
++      xhci_trb_queue(x->cmds, grub_dma_get_phys(inctx_dma), 0, flags);
++    }
++    else
++    {
++      xhci_trb_queue(x->cmds, 0, 0, flags);
++    }
++
++    xhci_doorbell(x, 0, 0);
++    int rc = xhci_event_wait(x, x->cmds, 1000);
++    grub_dprintf("xhci", "%s: xhci_event_wait = %d\n", __func__, rc);
++
++    return rc;
++}
++
++static int xhci_cmd_enable_slot(struct grub_xhci *x)
++{
++  grub_uint32_t flags = 0;
++  flags |= (CR_ENABLE_SLOT << 10);
++
++  grub_dprintf("xhci", "%s:\n", __func__);
++  int cc = xhci_cmd_submit(x, NULL, flags);
++  if (cc != CC_SUCCESS)
++      return -1;
++  grub_dprintf("xhci", "%s: %p\n", __func__, &x->cmds->evt.control);
++  grub_dprintf("xhci", "%s: %x\n", __func__, grub_xhci_read32(&x->cmds->evt.control));
++
++  return (grub_xhci_read32(&x->cmds->evt.control) >> 24) & 0xff;
++}
++
++static int xhci_cmd_disable_slot(struct grub_xhci *x, grub_uint32_t slotid)
++{
++  grub_uint32_t flags = 0;
++  flags |= (CR_DISABLE_SLOT << 10);
++  flags |= (slotid << 24);
++
++  grub_dprintf("xhci", "%s: slotid %d\n", __func__, slotid);
++  return xhci_cmd_submit(x, NULL, flags);
++}
++
++static int xhci_cmd_stop_endpoint(struct grub_xhci *x, grub_uint32_t slotid
++				       , grub_uint32_t epid
++				       , grub_uint32_t suspend)
++{
++  grub_uint32_t flags = 0;
++  flags |= (CR_STOP_ENDPOINT << 10);
++  flags |= (epid << 16);
++  flags |= (suspend << 23) ;
++  flags |= (slotid << 24);
++
++  return xhci_cmd_submit(x, NULL, flags);
++}
++
++static int xhci_cmd_reset_endpoint(struct grub_xhci *x, grub_uint32_t slotid
++				       , grub_uint32_t epid
++				       , grub_uint32_t preserve)
++{
++  grub_uint32_t flags = 0;
++  flags |= (preserve << 9);
++  flags |= (CR_RESET_ENDPOINT << 10);
++  flags |= (epid << 16);
++  flags |= (slotid << 24);
++
++  return xhci_cmd_submit(x, NULL, flags);
++}
++
++static int xhci_cmd_set_dequeue_pointer(struct grub_xhci *x, grub_uint32_t slotid
++				       , grub_uint32_t epid
++				       , grub_addr_t tr_deque_pointer)
++{
++  grub_uint32_t flags = 0;
++  flags |= (CR_SET_TR_DEQUEUE << 10);
++  flags |= (epid << 16);
++  flags |= (slotid << 24);
++
++  xhci_trb_queue(x->cmds, tr_deque_pointer, 0, flags);
++
++  xhci_doorbell(x, 0, 0);
++  int rc = xhci_event_wait(x, x->cmds, 1000);
++  grub_dprintf("xhci", "%s: xhci_event_wait = %d\n", __func__, rc);
++
++  return rc;
++}
++
++static int xhci_cmd_address_device(struct grub_xhci *x, grub_uint32_t slotid,
++				   struct grub_pci_dma_chunk *inctx_dma)
++{
++  grub_uint32_t flags = 0;
++  flags |= (CR_ADDRESS_DEVICE << 10);
++  flags |= (slotid << 24);
++
++  grub_dprintf("xhci", "%s: slotid %d\n", __func__, slotid);
++  return xhci_cmd_submit(x, inctx_dma, flags);
++}
++
++static int xhci_cmd_configure_endpoint(struct grub_xhci *x, grub_uint32_t slotid,
++				       struct grub_pci_dma_chunk *inctx_dma)
++{
++  grub_uint32_t flags = 0;
++  flags |= (CR_CONFIGURE_ENDPOINT << 10);
++  flags |= (slotid << 24);
++
++  grub_dprintf("xhci", "%s: slotid %d\n", __func__, slotid);
++  return xhci_cmd_submit(x, inctx_dma, flags);
++}
++
++static int xhci_cmd_evaluate_context(struct grub_xhci *x, grub_uint32_t slotid,
++				     struct grub_pci_dma_chunk *inctx_dma)
++{
++  grub_uint32_t flags = 0;
++  flags |= (CR_EVALUATE_CONTEXT << 10);
++  flags |= (slotid << 24);
++
++  grub_dprintf("xhci", "%s: slotid %d\n", __func__, slotid);
++  return xhci_cmd_submit(x, inctx_dma, flags);
++}
++
++/****************************************************************
++ * xHCI host controller initialization
++ ****************************************************************/
++
++static grub_usb_err_t
++grub_xhci_reset (struct grub_xhci *x)
++{
++  grub_uint32_t reg;
++  grub_uint32_t end;
++
++  reg = grub_xhci_read32(&x->op->usbcmd);
++  if (reg & GRUB_XHCI_CMD_RS)
++    {
++      reg &= ~GRUB_XHCI_CMD_RS;
++      grub_xhci_write32(&x->op->usbcmd, reg);
++
++      end = grub_get_time_ms () + 32;
++      while (grub_xhci_read32(&x->op->usbcmd) & GRUB_XHCI_STS_HCH)
++	{
++	  if (grub_get_time_ms () > end)
++	      return GRUB_USB_ERR_TIMEOUT;
++
++	  grub_millisleep(1);
++	}
++    }
++
++  grub_dprintf("xhci", "grub_xhci_reset: resetting HC\n");
++  grub_xhci_write32(&x->op->usbcmd, GRUB_XHCI_CMD_HCRST);
++
++  /* Wait for device to complete reset and be enabled */
++  end = grub_get_time_ms () + 100;
++  while (grub_xhci_read32(&x->op->usbcmd) & GRUB_XHCI_CMD_HCRST)
++    {
++      if (grub_get_time_ms () > end)
++	  return GRUB_USB_ERR_TIMEOUT;
++
++      grub_millisleep(1);
++    }
++
++  /* Wait for device to complete reset and be enabled */
++  end = grub_get_time_ms () + 100;
++  while (grub_xhci_read32(&x->op->usbsts) & GRUB_XHCI_STS_CNR)
++    {
++      if (grub_get_time_ms () > end)
++	  return GRUB_USB_ERR_TIMEOUT;
++
++      grub_millisleep(1);
++    }
++
++  grub_xhci_write32(&x->op->config, x->slots);
++  grub_xhci_write32(&x->op->dcbaap_low, grub_dma_get_phys(x->devs_dma));
++  grub_xhci_write32(&x->op->dcbaap_high, 0);
++  grub_xhci_write32(&x->op->crcr_low, grub_dma_get_phys(x->cmds_dma)| 1);
++  grub_xhci_write32(&x->op->crcr_high, 0);
++  x->cmds->cs = 1;
++
++  grub_arch_sync_dma_caches(x->cmds, sizeof(*x->cmds));
++
++  x->eseg->ptr_low = grub_dma_get_phys(x->evts_dma);
++  x->eseg->ptr_high = 0;
++  x->eseg->size = GRUB_XHCI_RING_ITEMS;
++
++  grub_arch_sync_dma_caches(x->eseg, sizeof(*x->eseg));
++
++  grub_xhci_write32(&x->ir->erstsz, 1);
++  grub_xhci_write32(&x->ir->erdp_low, grub_dma_get_phys(x->evts_dma));
++  grub_xhci_write32(&x->ir->erdp_high, 0);
++  grub_xhci_write32(&x->ir->erstba_low, grub_dma_get_phys(x->eseg_dma));
++  grub_xhci_write32(&x->ir->erstba_high, 0);
++  x->evts->cs = 1;
++
++  grub_arch_sync_dma_caches(x->evts, sizeof(*x->eseg));
++
++  xhci_check_status(x);
++
++  grub_dprintf ("xhci", "XHCI OP COMMAND: %08x\n",
++		grub_xhci_read32 (&x->op->usbcmd));
++  grub_dprintf ("xhci", "XHCI OP STATUS: %08x\n",
++		grub_xhci_read32 (&x->op->usbsts));
++  grub_dprintf ("xhci", "XHCI OP PAGESIZE: %08x\n",
++		grub_xhci_read32 (&x->op->pagesize));
++  grub_dprintf ("xhci", "XHCI OP DNCTRL: %08x\n",
++		grub_xhci_read32 (&x->op->dnctl));
++  grub_dprintf ("xhci", "XHCI OP CRCR_LOW: %08x\n",
++		grub_xhci_read32 (&x->op->crcr_low));
++  grub_dprintf ("xhci", "XHCI OP CRCR_HIGH: %08x\n",
++		grub_xhci_read32 (&x->op->crcr_high));
++  grub_dprintf ("xhci", "XHCI OP DCBAAP_LOW: %08x\n",
++		grub_xhci_read32 (&x->op->dcbaap_low));
++  grub_dprintf ("xhci", "XHCI OP DCBAAP_HIGH: %08x\n",
++		grub_xhci_read32 (&x->op->dcbaap_high));
++  grub_dprintf ("xhci", "XHCI OP CONFIG: %08x\n",
++		grub_xhci_read32 (&x->op->config));
++  grub_dprintf ("xhci", "XHCI IR ERSTSZ: %08x\n",
++		grub_xhci_read32 (&x->ir->erstsz));
++  grub_dprintf ("xhci", "XHCI IR ERDP: %08x\n",
++		grub_xhci_read32 (&x->ir->erdp_low));
++  grub_dprintf ("xhci", "XHCI IR ERSTBA: %08x\n",
++		grub_xhci_read32 (&x->ir->erstba_low));
++
++  xhci_check_status(x);
++
++  return GRUB_USB_ERR_NONE;
++}
++
++static grub_usb_err_t
++grub_xhci_request_legacy_handoff(volatile struct grub_xhci_xcap *xcap)
++{
++  grub_uint32_t end;
++
++  end = grub_get_time_ms () + 10;
++  for (;;)
++    {
++      grub_uint32_t cap = grub_xhci_read32(&xcap->cap);
++      if (cap & (1 << 16))
++	grub_xhci_write32(&xcap->cap, cap | (1 << 24));
++      else
++        break;
++
++      if (grub_get_time_ms () > end)
++	{
++	  grub_dprintf ("xhci","ERROR: %s TIMEOUT\n", __func__);
++	  return GRUB_USB_ERR_TIMEOUT;
++	}
++      grub_millisleep(1);
++    }
++  return GRUB_USB_ERR_NONE;
++}
++
++static void
++grub_xhci_fill_default_speed_mapping(struct grub_xhci_psids *ids)
++{
++	/* Chapter 7.2.2.1.1 "Default USB Speed ID Mapping" */
++	ids->psids[0].id = 1;
++	ids->psids[0].psie = 2;
++	ids->psids[0].psim = 12;
++	ids->psids[1].id = 2;
++	ids->psids[1].psie = 1;
++	ids->psids[1].psim = 1500;
++	ids->psids[2].id = 3;
++	ids->psids[2].psie = 2;
++	ids->psids[2].psim = 480;
++	ids->psids[3].id = 4;
++	ids->psids[3].psie = 3;
++	ids->psids[3].psim = 5;
++	ids->psids[4].id = 5;
++	ids->psids[4].psie = 3;
++	ids->psids[4].psim = 10;
++	ids->psids[5].id = 6;
++	ids->psids[5].psie = 3;
++	ids->psids[5].psim = 10;
++	ids->psids[6].id = 7;
++	ids->psids[6].psie = 3;
++	ids->psids[6].psim = 20;
++}
++
++static void
++grub_xhci_calc_speed_mapping(struct grub_xhci_psids *ids)
++{
++  const grub_uint64_t mult[4] = {1ULL, 1000ULL, 1000000ULL, 1000000000ULL};
++
++  for (grub_uint8_t i = 0; i < 16; i++)
++    {
++      if (ids->psids[i].id == 0)
++	continue;
++      ids->psids[i].bitrate = mult[ids->psids[i].psie & 3] * (grub_uint64_t)ids->psids[i].psim;
++      if (ids->psids[i].bitrate < 12000000ULL)
++	ids->psids[i].grub_usb_speed = GRUB_USB_SPEED_LOW;
++      else if (ids->psids[i].bitrate < 480000000ULL)
++	ids->psids[i].grub_usb_speed = GRUB_USB_SPEED_FULL;
++      else if (ids->psids[i].bitrate > 1200000000ULL)
++	ids->psids[i].grub_usb_speed = GRUB_USB_SPEED_SUPER;
++      else
++	ids->psids[i].grub_usb_speed = GRUB_USB_SPEED_HIGH;
++    }
++}
++
++
++/* PCI iteration function... */
++void
++grub_xhci_init_device (volatile void *regs)
++{
++  struct grub_xhci *x;
++  grub_uint32_t hcs1, hcc, reg;
++
++  /* Allocate memory for the controller and fill basic values. */
++  x = grub_zalloc (sizeof (*x));
++  if (!x)
++    {
++      grub_dprintf("xhci", "Failed to allocate memory\n");
++      return;
++    }
++  x->caps = (volatile struct grub_xhci_caps *) regs;
++  x->op = (volatile struct grub_xhci_op *) (((grub_uint8_t *)regs) +
++      grub_xhci_read8(&x->caps->caplength));
++  x->pr = (volatile struct grub_xhci_pr *) (((grub_uint8_t *)x->op) +
++      GRUB_XHCI_PR_OFFSET);
++  x->db = (volatile struct grub_xhci_db *) (((grub_uint8_t *)regs) +
++      grub_xhci_read32(&x->caps->dboff));
++  x->ir = (volatile struct grub_xhci_ir *) (((grub_uint8_t *)regs) +
++		  grub_xhci_read32(&x->caps->rtsoff) + GRUB_XHCI_IR_OFFSET);
++
++  grub_dprintf ("xhci", "XHCI init: CAPLENGTH: 0x%02x\n",
++		grub_xhci_read8 (&x->caps->caplength));
++  grub_dprintf ("xhci", "XHCI init: HCIVERSION: 0x%04x\n",
++		grub_xhci_read16 (&x->caps->hciversion));
++  grub_dprintf ("xhci", "XHCI init: HCSPARAMS1: 0x%08x\n",
++		grub_xhci_read32 (&x->caps->hcsparams1));
++  grub_dprintf ("xhci", "XHCI init: HCSPARAMS2: 0x%08x\n",
++		grub_xhci_read32 (&x->caps->hcsparams2));
++  grub_dprintf ("xhci", "XHCI init: HCSPARAMS3: 0x%08x\n",
++		grub_xhci_read32 (&x->caps->hcsparams3));
++  grub_dprintf ("xhci", "XHCI init: HCCPARAMS: 0x%08x\n",
++		grub_xhci_read32 (&x->caps->hcsparams3));
++  grub_dprintf ("xhci", "XHCI init: DBOFF: 0x%08x\n",
++		grub_xhci_read32 (&x->caps->dboff));
++  grub_dprintf ("xhci", "XHCI init: RTOFF: 0x%08x\n",
++		grub_xhci_read32 (&x->caps->rtsoff));
++
++  hcs1 = grub_xhci_read32(&x->caps->hcsparams1);
++  hcc = grub_xhci_read32(&x->caps->hccparams);
++  x->ports = (grub_uint32_t) ((hcs1 >> 24) & 0xff);
++  x->slots = (grub_uint32_t) (hcs1	 & 0xff);
++  x->xcap  = (grub_uint32_t) ((hcc >> 16) & 0xffff) * sizeof(grub_uint32_t);
++  x->flag64 = (grub_uint8_t) ((hcc & 0x04) ? 1 : 0);
++  grub_dprintf("xhci", "XHCI init: %d ports, %d slots, %d byte contexts\n"
++	       , x->ports, x->slots, x->flag64 ? 64 : 32);
++
++  x->psids = grub_zalloc (sizeof (struct grub_xhci_psids) * x->ports);
++  if (x->xcap)
++    {
++      grub_uint32_t off;
++      volatile grub_uint8_t *addr = (grub_uint8_t *) x->caps + x->xcap;
++      do
++	{
++	  volatile struct grub_xhci_xcap *xcap = (void *)addr;
++	  grub_uint32_t ports, name, cap = grub_xhci_read32(&xcap->cap);
++	  switch (cap & 0xff) {
++	    case XHCI_CAP_LEGACY_SUPPORT:
++	      {
++		if (grub_xhci_request_legacy_handoff(xcap) != GRUB_USB_ERR_NONE)
++		  {
++		    grub_dprintf("xhci", "XHCI init: Failed to get xHCI ownership\n");
++		    goto fail;
++		  }
++	        break;
++	      }
++	    case XHCI_CAP_SUPPORTED_PROTOCOL:
++	      {
++		name  = grub_xhci_read32(&xcap->data[0]);
++		ports = grub_xhci_read32(&xcap->data[1]);
++		const grub_uint8_t major = (cap >> 24) & 0xff;
++		const grub_uint8_t minor = (cap >> 16) & 0xff;
++		const grub_uint8_t psic = (ports >> 28) & 0xf;
++		const grub_uint8_t count = (ports >> 8) & 0xff;
++		const grub_uint8_t start = (ports >> 0) & 0xff;
++		grub_dprintf("xhci", "XHCI init: protocol %c%c%c%c %x.%02x"
++				", %d ports (offset %d), def %x, psic %d\n"
++				, (name >>  0) & 0xff
++				, (name >>  8) & 0xff
++				, (name >> 16) & 0xff
++				, (name >> 24) & 0xff
++				, major, minor
++				, count, start
++				, ports >> 16
++				, psic);
++		if (name == 0x20425355 /* "USB " */)
++		  {
++		    if (major == 2)
++		      {
++			x->usb2.start = start;
++			x->usb2.count = count;
++		      }
++		    else if (major == 3)
++		      {
++			x->usb3.start = start;
++			x->usb3.count = count;
++		      }
++
++		    for (grub_uint32_t p = start - 1; p < start + count - 1UL; p++)
++		      {
++			x->psids[p].major = major;
++			x->psids[p].minor = minor;
++			grub_xhci_fill_default_speed_mapping(&x->psids[p]);
++			for (grub_uint8_t i = 0; i < psic; i++)
++			  {
++			    grub_uint32_t psid = grub_xhci_read32(&xcap->data[3 + i]);
++			    x->psids[p].psids[i].id = (psid >> 0) & 0xf;
++			    x->psids[p].psids[i].psie = (psid >> 4) & 0x3;
++			    x->psids[p].psids[i].psim = (psid >> 16) & 0xfffff;
++			  }
++			grub_xhci_calc_speed_mapping(&x->psids[p]);
++		      }
++		  }
++
++		break;
++	      }
++	    default:
++	      {
++	        grub_dprintf("xhci", "XHCI    extcap 0x%x @ %p\n", cap & 0xff, addr);
++	        break;
++	      }
++	  }
++	off = (cap >> 8) & 0xff;
++	addr += off << 2;
++	}
++      while (off > 0);
++    }
++
++  x->pagesize = xhci_get_pagesize(x);
++  grub_dprintf("xhci", "XHCI init: Minimum supported page size 0x%x\n",
++	       x->pagesize);
++
++  /* Chapter 6.1 Device Context Base Address Array */
++  x->devs_dma = xhci_memalign_dma32(ALIGN_DCBAA,
++				    sizeof(*x->devs) * (x->slots + 1),
++				    x->pagesize);
++  if (!x->devs_dma)
++      goto fail;
++  x->devs = grub_dma_get_virt(x->devs_dma);
++  grub_memset((void *)x->devs, 0, sizeof(*x->devs) * (x->slots + 1));
++  grub_arch_sync_dma_caches(x->devs, sizeof(*x->devs) * (x->slots + 1));
++  grub_dprintf ("xhci", "XHCI init: device memory %p (%x)\n",
++		grub_dma_get_virt(x->devs_dma),
++		grub_dma_get_phys(x->devs_dma));
++
++  /* Chapter 6.5 Event Ring Segment Table */
++  x->eseg_dma = xhci_memalign_dma32(ALIGN_EVT_RING_TABLE, sizeof(*x->eseg), 0);
++  if (!x->eseg_dma)
++      goto fail;
++  x->eseg = grub_dma_get_virt(x->eseg_dma);
++  grub_memset((void *)x->eseg, 0, sizeof(*x->eseg));
++  grub_arch_sync_dma_caches(x->eseg, sizeof(*x->eseg));
++  grub_dprintf ("xhci", "XHCI init: event ring table memory %p (%x)\n",
++		grub_dma_get_virt(x->eseg_dma),
++		grub_dma_get_phys(x->eseg_dma));
++
++  x->cmds_dma = xhci_memalign_dma32(ALIGN_CMD_RING_SEG, sizeof(*x->cmds),
++				    BOUNDARY_RING);
++  if (!x->cmds_dma)
++      goto fail;
++  x->cmds = grub_dma_get_virt(x->cmds_dma);
++  grub_memset((void *)x->cmds, 0, sizeof(*x->cmds));
++  grub_arch_sync_dma_caches(x->cmds, sizeof(*x->cmds));
++  grub_dprintf ("xhci", "XHCI init: command ring memory %p (%x)\n",
++		grub_dma_get_virt(x->cmds_dma),
++		grub_dma_get_phys(x->cmds_dma));
++
++  x->evts_dma = xhci_memalign_dma32(ALIGN_EVT_RING_SEG, sizeof(*x->evts),
++				    BOUNDARY_RING);
++  if (!x->evts_dma)
++      goto fail;
++  x->evts = grub_dma_get_virt(x->evts_dma);
++  grub_memset((void *)x->evts, 0, sizeof(*x->evts));
++  grub_arch_sync_dma_caches(x->evts, sizeof(*x->evts));
++  grub_dprintf ("xhci", "XHCI init: event ring memory %p (%x)\n",
++		grub_dma_get_virt(x->evts_dma),
++		grub_dma_get_phys(x->evts_dma));
++
++  /* Chapter 4.20 Scratchpad Buffers */
++  reg = grub_xhci_read32(&x->caps->hcsparams2);
++  x->spb = (reg >> 21 & 0x1f) << 5 | reg >> 27;
++  if (x->spb)
++    {
++      volatile grub_uint64_t *spba;
++      grub_dprintf("xhci", "XHCI init: set up %d scratch pad buffers\n",
++		   x->spb);
++      x->spba_dma = xhci_memalign_dma32(ALIGN_SPBA, sizeof(*spba) * x->spb,
++					x->pagesize);
++      if (!x->spba_dma)
++	goto fail;
++
++      x->spad_dma = xhci_memalign_dma32(x->pagesize, x->pagesize * x->spb,
++					x->pagesize);
++      if (!x->spad_dma)
++	{
++	  grub_dma_free(x->spba_dma);
++	  goto fail;
++	}
++
++      spba = grub_dma_get_virt(x->spba_dma);
++      for (grub_uint32_t i = 0; i < x->spb; i++)
++	spba[i] = (grub_addr_t)grub_dma_get_phys(x->spad_dma) + (i * x->pagesize);
++      grub_arch_sync_dma_caches(x->spba_dma, sizeof(*spba) * x->spb);
++
++      x->devs[0].ptr_low = grub_dma_get_phys(x->spba_dma);
++      x->devs[0].ptr_high = 0;
++      grub_arch_sync_dma_caches(x->devs_dma, sizeof(x->devs[0]));
++      grub_dprintf ("xhci", "XHCI init: Allocated %d scratch buffers of size 0x%x\n",
++		    x->spb, x->pagesize);
++    }
++
++  grub_xhci_reset(x);
++
++  /* Set the running bit */
++  reg = grub_xhci_read32 (&x->op->usbcmd);
++  reg |= GRUB_XHCI_CMD_RS;
++  grub_xhci_write32 (&x->op->usbcmd, reg);
++
++
++  /* Link to xhci now that initialisation is successful.  */
++  x->next = xhci;
++  xhci = x;
++
++  return;
++
++fail:
++  grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: FAILED!\n");
++  if (x)
++    {
++      if (x->devs_dma)
++	grub_dma_free (x->devs_dma);
++      if (x->eseg_dma)
++	grub_dma_free (x->eseg_dma);
++      if (x->cmds_dma)
++	grub_dma_free (x->cmds_dma);
++      if (x->evts_dma)
++	grub_dma_free (x->evts_dma);
++      if (x->spad_dma)
++	grub_dma_free (x->spad_dma);
++      if (x->spba_dma)
++	grub_dma_free (x->spba_dma);
++    }
++  grub_free (x);
++
++  return;
++}
++
++static int
++grub_xhci_iterate (grub_usb_controller_iterate_hook_t hook, void *hook_data)
++{
++  struct grub_xhci *x;
++  struct grub_usb_controller dev;
++
++  for (x = xhci; x; x = x->next)
++    {
++      dev.data = x;
++      if (hook (&dev, hook_data))
++	return 1;
++    }
++
++  return 0;
++}
++
++/****************************************************************
++ * xHCI maintainance functions 
++ ****************************************************************/
++
++static grub_usb_err_t
++grub_xhci_update_hub_portcount (struct grub_xhci *x,
++				grub_usb_transfer_t transfer,
++				grub_uint32_t slotid)
++{
++  struct grub_pci_dma_chunk *in_dma;
++  volatile struct grub_xhci_slotctx *hdslot;
++  grub_uint32_t epid = 0;
++
++  if (!transfer || !transfer->dev || !transfer->dev->nports)
++    return GRUB_USB_ERR_NONE;
++
++  hdslot = grub_dma_phys2virt(x->devs[slotid].ptr_low, x->devs_dma);
++  if ((hdslot->ctx[3] >> 27) == 3)
++    /* Already configured */
++    return 0;
++
++  grub_dprintf("xhci", "%s: updating hub config to %d ports\n", __func__,
++	       transfer->dev->nports);
++
++  xhci_check_status(x);
++
++  /* Allocate input context and initialize endpoint info. */
++  in_dma = grub_xhci_alloc_inctx(x, epid, transfer->dev);
++  if (!in_dma)
++    return GRUB_USB_ERR_INTERNAL;
++  volatile struct grub_xhci_inctx *in = grub_dma_get_virt(in_dma);
++
++  in->add = (1 << epid);
++
++  struct grub_xhci_epctx *ep = (void*)&in[(epid+1) << x->flag64];
++  ep->ctx[0]   |= 1 << 26;
++  ep->ctx[1]   |= transfer->dev->nports << 24;
++
++  int cc = xhci_cmd_configure_endpoint(x, slotid, in_dma);
++  grub_dma_free(in_dma);
++
++  if (cc != CC_SUCCESS)
++    {
++      grub_dprintf("xhci", "%s: reconf ctl endpoint: failed (cc %d)\n",
++		   __func__, cc);
++      return GRUB_USB_ERR_BADDEVICE;
++    }
++
++  return GRUB_USB_ERR_NONE;
++}
++
++static grub_usb_err_t
++grub_xhci_update_max_paket_size (struct grub_xhci *x,
++				 grub_usb_transfer_t transfer,
++				 grub_uint32_t slotid,
++				 grub_uint32_t max_packet)
++{
++  struct grub_pci_dma_chunk *in_dma;
++  grub_uint32_t epid = 1;
++
++  if (!transfer || !transfer->dev || !max_packet)
++    return GRUB_USB_ERR_NONE;
++
++  grub_dprintf("xhci", "%s: updating max packet size to 0x%x\n", __func__,
++	       max_packet);
++
++  xhci_check_status(x);
++
++  /* Allocate input context and initialize endpoint info. */
++  in_dma = grub_xhci_alloc_inctx(x, epid, transfer->dev);
++  if (!in_dma)
++    return GRUB_USB_ERR_INTERNAL;
++  volatile struct grub_xhci_inctx *in = grub_dma_get_virt(in_dma);
++  in->add = (1 << epid);
++
++  struct grub_xhci_epctx *ep = (void*)&in[(epid+1) << x->flag64];
++  ep->ctx[1]   |= max_packet << 16;
++
++  int cc = xhci_cmd_evaluate_context(x, slotid, in_dma);
++  grub_dma_free(in_dma);
++
++  if (cc != CC_SUCCESS)
++    {
++      grub_dprintf("xhci", "%s: reconf ctl endpoint: failed (cc %d)\n",
++		   __func__, cc);
++      return GRUB_USB_ERR_BADDEVICE;
++    }
++
++  return GRUB_USB_ERR_NONE;
++}
++
++/****************************************************************
++ * xHCI endpoint enablement functions
++ ****************************************************************/
++
++static grub_usb_err_t
++grub_xhci_prepare_endpoint (struct grub_xhci *x,
++			    struct grub_usb_device *dev,
++			    grub_uint8_t endpoint,
++			    grub_transfer_type_t dir,
++			    grub_transaction_type_t type,
++			    grub_uint32_t maxpaket,
++			    struct grub_xhci_priv *priv)
++{
++  grub_uint32_t epid;
++  struct grub_pci_dma_chunk *reqs_dma;
++  struct grub_pci_dma_chunk *in_dma;
++  volatile struct grub_xhci_ring *reqs;
++  volatile struct grub_xhci_slotctx *slotctx;
++
++  if (!x || !priv)
++    return GRUB_USB_ERR_INTERNAL;
++
++  xhci_check_status(x);
++
++  if (endpoint == 0)
++    {
++      epid = 1;
++    }
++  else
++    {
++      epid = (endpoint & 0x0f) * 2;
++      epid += (dir == GRUB_USB_TRANSFER_TYPE_IN) ? 1 : 0;
++    }
++  grub_dprintf("xhci", "%s: epid %d\n", __func__, epid);
++
++  /* Test if already prepared */
++  if (priv->slotid > 0 && priv->enpoint_trbs[epid] != NULL)
++    return GRUB_USB_ERR_NONE;
++
++  /* Allocate DMA buffer as endpoint cmd TRB */
++  reqs_dma = xhci_memalign_dma32(ALIGN_TRB, sizeof(*reqs),
++				 BOUNDARY_RING);
++  if (!reqs_dma)
++    return GRUB_USB_ERR_INTERNAL;
++  reqs = grub_dma_get_virt(reqs_dma);
++  grub_memset((void *)reqs, 0, sizeof(*reqs));
++  reqs->cs = 1;
++
++  grub_arch_sync_dma_caches(reqs, sizeof(*reqs));
++
++  /* Allocate input context and initialize endpoint info. */
++  in_dma = grub_xhci_alloc_inctx(x, epid, dev);
++  if (!in_dma)
++    {
++      grub_dma_free(reqs_dma);
++      return GRUB_USB_ERR_INTERNAL;
++    }
++  volatile struct grub_xhci_inctx *in = grub_dma_get_virt(in_dma);
++  in->add = 0x01 | (1 << epid);
++
++  struct grub_xhci_epctx *ep = (void*)&in[(epid+1) << x->flag64];
++  switch (type)
++    {
++      case GRUB_USB_TRANSACTION_TYPE_CONTROL:
++        ep->ctx[1]   |= 0 << 3;
++        break;
++      case GRUB_USB_TRANSACTION_TYPE_BULK:
++        ep->ctx[1]   |= 2 << 3;
++        break;
++    }
++  if (dir == GRUB_USB_TRANSFER_TYPE_IN
++      || type== GRUB_USB_TRANSACTION_TYPE_CONTROL)
++      ep->ctx[1] |= 1 << 5;
++  ep->ctx[1]   |= maxpaket << 16;
++  ep->deq_low  = grub_dma_get_phys(reqs_dma);
++  ep->deq_low  |= 1;	 /* dcs */
++  ep->length   = maxpaket;
++
++  grub_dprintf("xhci", "%s: ring %p, epid %d, max %d\n", __func__,
++	       reqs, epid, maxpaket);
++  if (epid == 1 || priv->slotid == 0) {
++    /* Enable slot. */
++    int slotid = xhci_cmd_enable_slot(x);
++    if (slotid < 0)
++      {
++	grub_dprintf("xhci", "%s: enable slot: failed\n", __func__);
++	grub_dma_free(reqs_dma);
++	grub_dma_free(in_dma);
++	return GRUB_USB_ERR_BADDEVICE;
++      }
++    grub_dprintf("xhci", "%s: get slot %d assigned\n", __func__, slotid);
++
++    grub_uint32_t size = (sizeof(struct grub_xhci_slotctx) * GRUB_XHCI_MAX_ENDPOINTS) << x->flag64;
++
++    /* Allocate memory for the device specific slot context */
++    priv->slotctx_dma = xhci_memalign_dma32(ALIGN_SLOTCTX, size,
++					    x->pagesize);
++    if (!priv->slotctx_dma)
++      {
++	grub_dprintf("xhci", "%s: grub_memalign_dma32 failed\n", __func__);
++	grub_dma_free(reqs_dma);
++	grub_dma_free(in_dma);
++	return GRUB_USB_ERR_INTERNAL;
++      }
++    slotctx = grub_dma_get_virt(priv->slotctx_dma);
++
++    grub_dprintf("xhci", "%s: enable slot: got slotid %d\n", __func__, slotid);
++    grub_memset((void *)slotctx, 0, size);
++    grub_arch_sync_dma_caches(slotctx, size);
++
++    x->devs[slotid].ptr_low = grub_dma_get_phys(priv->slotctx_dma);
++    x->devs[slotid].ptr_high = 0;
++    grub_arch_sync_dma_caches(&x->devs[slotid], sizeof(x->devs[0]));
++
++    /* Send set_address command. */
++    int cc = xhci_cmd_address_device(x, slotid, in_dma);
++    if (cc != CC_SUCCESS)
++      {
++	grub_dprintf("xhci","%s: address device: failed (cc %d)\n", __func__, cc);
++	cc = xhci_cmd_disable_slot(x, slotid);
++	if (cc != CC_SUCCESS) {
++	    grub_dprintf("xhci", "%s: disable failed (cc %d)\n", __func__, cc);
++	} else {
++	  x->devs[slotid].ptr_low = 0;
++	  x->devs[slotid].ptr_high = 0;
++	  grub_arch_sync_dma_caches(&x->devs[slotid], sizeof(x->devs[0]));
++	}
++	grub_dma_free(priv->slotctx_dma);
++	grub_dma_free(reqs_dma);
++	grub_dma_free(in_dma);
++	return GRUB_USB_ERR_BADDEVICE;
++      }
++    priv->enpoint_trbs[epid] = reqs;
++    priv->enpoint_trbs_dma[epid] = reqs_dma;
++    priv->slotid = slotid;
++    priv->max_packet = 0;
++  }
++  if (epid != 1)
++    {
++	/* Send configure command. */
++	int cc = xhci_cmd_configure_endpoint(x, priv->slotid, in_dma);
++	if (cc != CC_SUCCESS)
++	  {
++	    grub_dprintf("xhci", "%s: configure endpoint: failed (cc %d)\n",
++			 __func__, cc);
++	    grub_dma_free(reqs_dma);
++	    grub_dma_free(in_dma);
++	    return GRUB_USB_ERR_BADDEVICE;
++	  }
++      priv->enpoint_trbs[epid] = reqs;
++      priv->enpoint_trbs_dma[epid] = reqs_dma;
++    }
++
++  grub_dprintf("xhci", "%s: done\n", __func__);
++  grub_dma_free(in_dma);
++
++  return GRUB_USB_ERR_NONE;
++}
++
++
++/****************************************************************
++ * xHCI transfer helper functions
++ ****************************************************************/
++
++static grub_usb_err_t
++grub_xhci_usb_to_grub_err (unsigned char status)
++{
++  if (status != CC_SUCCESS)
++    grub_dprintf("xhci", "%s: xfer failed (cc %d)\n", __func__, status);
++  else
++    grub_dprintf("xhci", "%s: xfer done   (cc %d)\n", __func__, status);
++
++  if (status == CC_BABBLE_DETECTED)
++    return GRUB_USB_ERR_BABBLE;
++  else if (status == CC_DATA_BUFFER_ERROR)
++    return GRUB_USB_ERR_DATA;
++  else if (status == CC_STALL_ERROR)
++    return GRUB_USB_ERR_STALL;
++  else if (status != CC_SUCCESS)
++    return GRUB_USB_ERR_NAK;
++
++  return GRUB_USB_ERR_NONE;
++}
++
++static int
++grub_xhci_transfer_is_zlp(grub_usb_transfer_t transfer, int idx)
++{
++  if (idx >= transfer->transcnt)
++    return 0;
++
++  grub_usb_transaction_t tr = &transfer->transactions[idx];
++
++  return (tr->size == 0) &&
++    ((tr->pid == GRUB_USB_TRANSFER_TYPE_OUT) ||
++    (tr->pid == GRUB_USB_TRANSFER_TYPE_IN));
++}
++
++static int
++grub_xhci_transfer_is_last(grub_usb_transfer_t transfer, int idx)
++{
++    return (idx + 1) == transfer->transcnt;
++}
++
++static int
++grub_xhci_transfer_is_data(grub_usb_transfer_t transfer, int idx)
++{
++  grub_usb_transaction_t tr;
++
++  if (idx >= transfer->transcnt)
++    return 0;
++
++  tr = &transfer->transactions[idx];
++  if (tr->size == 0 ||
++      (tr->pid == GRUB_USB_TRANSFER_TYPE_SETUP))
++    return 0;
++
++  /* If there's are no DATA pakets before it's a DATA paket */
++  for (int i = idx - 1; i >= 0; i--)
++    {
++      tr = &transfer->transactions[i];
++      if (tr->size > 0 &&
++	  ((tr->pid == GRUB_USB_TRANSFER_TYPE_OUT) ||
++	  (tr->pid == GRUB_USB_TRANSFER_TYPE_IN)))
++	    return 0;
++    }
++  return 1;
++}
++
++static int
++grub_xhci_transfer_is_in(grub_usb_transfer_t transfer, int idx)
++{
++  grub_usb_transaction_t tr;
++
++  if (idx >= transfer->transcnt)
++    return 0;
++
++  tr = &transfer->transactions[idx];
++
++  return tr->pid == GRUB_USB_TRANSFER_TYPE_IN;
++}
++
++static int
++grub_xhci_transfer_is_normal(grub_usb_transfer_t transfer, int idx)
++{
++  grub_usb_transaction_t tr;
++
++  if (idx >= transfer->transcnt)
++    return 0;
++
++  tr = &transfer->transactions[idx];
++  if (tr->size == 0 ||
++      (tr->pid == GRUB_USB_TRANSFER_TYPE_SETUP))
++    return 0;
++
++  /* If there's at least one DATA paket before it's a normal */
++  for (int i = idx - 1; i >= 0; i--)
++    {
++      tr = &transfer->transactions[i];
++      if (tr->size > 0 &&
++	  ((tr->pid == GRUB_USB_TRANSFER_TYPE_OUT) ||
++	  (tr->pid == GRUB_USB_TRANSFER_TYPE_IN)))
++	    return 1;
++
++    }
++  return 0;
++}
++
++static int
++grub_xhci_transfer_next_is_normal(grub_usb_transfer_t transfer, int idx)
++{
++  return grub_xhci_transfer_is_normal(transfer, idx + 1);
++}
++
++static int
++grub_xhci_transfer_next_is_in(grub_usb_transfer_t transfer, int idx)
++{
++  return grub_xhci_transfer_is_in(transfer, idx + 1);
++}
++
++static grub_uint8_t grub_xhci_epid_from_transfer(grub_usb_transfer_t transfer)
++{
++  grub_uint8_t epid;
++
++  if (transfer->endpoint == 0) {
++      epid = 1;
++  } else {
++    epid = (transfer->endpoint & 0x0f) * 2;
++    epid += (transfer->dir == GRUB_USB_TRANSFER_TYPE_IN) ? 1 : 0;
++  }
++  return epid;
++}
++
++/****************************************************************
++ * xHCI transfer functions
++ ****************************************************************/
++
++static grub_usb_err_t
++grub_xhci_setup_transfer (grub_usb_controller_t dev,
++			  grub_usb_transfer_t transfer)
++{
++  struct grub_xhci_transfer_controller_data *cdata;
++  struct grub_xhci *x = (struct grub_xhci *) dev->data;
++  grub_uint8_t epid;
++  grub_usb_err_t err;
++  volatile struct grub_xhci_ring *reqs;
++  int rc;
++  struct grub_xhci_priv *priv;
++
++   xhci_check_status(x);
++
++  if (!dev || !transfer || !transfer->dev || !transfer->dev->xhci_priv)
++    return GRUB_USB_ERR_INTERNAL;
++
++  priv = transfer->dev->xhci_priv;
++  err = grub_xhci_prepare_endpoint(x, transfer->dev,
++				   transfer->endpoint,
++				   transfer->dir,
++				   transfer->type,
++				   transfer->max,
++				   priv);
++
++  if (err != GRUB_USB_ERR_NONE)
++    return err;
++
++  epid = grub_xhci_epid_from_transfer(transfer);
++
++  /* Update the max packet size once descdev.maxsize0 is valid */
++  if (epid == 1 &&
++      (priv->max_packet == 0) &&
++      (transfer->dev->descdev.maxsize0 > 0))
++    {
++      if (transfer->dev->speed == GRUB_USB_SPEED_SUPER)
++        priv->max_packet = 1UL << transfer->dev->descdev.maxsize0;
++      else
++        priv->max_packet = transfer->dev->descdev.maxsize0;
++      err = grub_xhci_update_max_paket_size(x, transfer, priv->slotid, priv->max_packet);
++      if (err != GRUB_USB_ERR_NONE)
++        {
++          grub_dprintf("xhci", "%s: Updating max paket size failed\n", __func__);
++          return err;
++        }
++    }
++  if (epid == 1 &&
++      transfer->dev->descdev.class == 9 &&
++      transfer->dev->nports > 0)
++    {
++      err = grub_xhci_update_hub_portcount(x, transfer, priv->slotid);
++      if (err != GRUB_USB_ERR_NONE)
++        {
++          grub_dprintf("xhci", "%s: Updating max paket size failed\n", __func__);
++          return err;
++        }
++    }
++
++  /* Allocate private data for the transfer */
++  cdata = grub_zalloc(sizeof(*cdata));
++  if (!cdata)
++    return GRUB_USB_ERR_INTERNAL;
++
++  reqs = priv->enpoint_trbs[epid];
++
++  transfer->controller_data = cdata;
++
++  /* Now queue the transfer onto the TRB */
++  if (transfer->type == GRUB_USB_TRANSACTION_TYPE_CONTROL)
++  {
++    volatile struct grub_usb_packet_setup *setupdata;
++    setupdata = (void *)transfer->transactions[0].data;
++    grub_dprintf("xhci", "%s: CONTROLL TRANS req %d\n", __func__, setupdata->request);
++    grub_dprintf("xhci", "%s: CONTROLL TRANS length %d\n", __func__, setupdata->length);
++
++    if (setupdata && setupdata->request == GRUB_USB_REQ_SET_ADDRESS)
++      return GRUB_USB_ERR_NONE;
++
++    if (transfer->transcnt < 2)
++      return GRUB_USB_ERR_INTERNAL;
++
++    for (int i = 0; i < transfer->transcnt; i++)
++      {
++	grub_uint32_t flags = 0;
++	grub_uint64_t inline_data;
++	grub_usb_transaction_t tr = &transfer->transactions[i];
++
++	switch (tr->pid)
++	  {
++	    case GRUB_USB_TRANSFER_TYPE_SETUP:
++	      {
++		grub_dprintf("xhci", "%s: SETUP PKG\n", __func__);
++		grub_dprintf("xhci", "%s: transfer->size %d\n", __func__, transfer->size);
++		grub_dprintf("xhci", "%s: tr->size %d SETUP PKG\n", __func__, tr->size);
++
++		flags |= (TR_SETUP << 10);
++		flags |= TRB_TR_IDT;
++
++		if (transfer->size > 0)
++		  {
++		    if (grub_xhci_transfer_next_is_in(transfer, i))
++		      flags |= (3 << 16); /* TRT IN */
++		    else
++		      flags |= (2 << 16); /* TRT OUT */
++		  }
++		break;
++	      }
++	    case GRUB_USB_TRANSFER_TYPE_OUT:
++	      {
++		grub_dprintf("xhci", "%s: OUT PKG\n", __func__);
++		cdata->transfer_size += tr->size;
++		break;
++	      }
++	    case GRUB_USB_TRANSFER_TYPE_IN:
++	      {
++		grub_dprintf("xhci", "%s: IN PKG\n", __func__);
++		cdata->transfer_size += tr->size;
++		flags |= TRB_TR_DIR;
++		break;
++	      }
++	  }
++
++	if (grub_xhci_transfer_is_normal(transfer, i))
++	  flags |= (TR_NORMAL << 10);
++	else if (grub_xhci_transfer_is_data(transfer, i))
++	  flags |= (TR_DATA << 10);
++	else if (grub_xhci_transfer_is_zlp(transfer, i))
++	  flags |= (TR_STATUS << 10);
++
++	if (grub_xhci_transfer_next_is_normal(transfer, i))
++	  flags |= TRB_TR_CH;
++
++	if (grub_xhci_transfer_is_last(transfer, i))
++	  flags |= TRB_TR_IOC;
++
++	/* Assume the ring has enough free space for all TRBs */
++	if (flags & TRB_TR_IDT && tr->size <= (int)sizeof(inline_data))
++	  {
++	    grub_memcpy(&inline_data, (void *)tr->data, tr->size);
++	    xhci_trb_queue(reqs, inline_data, tr->size, flags);
++	  }
++	else
++	  {
++	    xhci_trb_queue(reqs, tr->data, tr->size, flags);
++	  }
++      }
++  }
++  else if (transfer->type == GRUB_USB_TRANSACTION_TYPE_BULK)
++    {
++      for (int i = 0; i < transfer->transcnt; i++)
++	{
++	  grub_uint32_t flags = (TR_NORMAL << 10);
++	  grub_usb_transaction_t tr = &transfer->transactions[i];
++	  switch (tr->pid)
++	    {
++	      case GRUB_USB_TRANSFER_TYPE_OUT:
++		{
++		  grub_dprintf("xhci", "%s: OUT PKG\n", __func__);
++		  cdata->transfer_size += tr->size;
++		  break;
++		}
++	      case GRUB_USB_TRANSFER_TYPE_IN:
++		{
++		  grub_dprintf("xhci", "%s: IN PKG\n", __func__);
++		  cdata->transfer_size += tr->size;
++		  flags |= TRB_TR_DIR;
++		  break;
++		}
++		case GRUB_USB_TRANSFER_TYPE_SETUP:
++		  break;
++	    }
++	  if (grub_xhci_transfer_is_last(transfer, i))
++	    flags |= TRB_TR_IOC;
++
++	  /* The ring might be to small, submit while adding new entries */
++	  rc = xhci_trb_queue_and_flush(x, priv->slotid, epid,
++				  reqs, tr->data, tr->size, flags);
++	  if (rc < 0)
++	    return GRUB_USB_ERR_TIMEOUT;
++	  else if (rc > 1)
++	    return grub_xhci_usb_to_grub_err(rc);
++
++	}
++    }
++  xhci_doorbell(x, priv->slotid, epid);
++
++  return GRUB_USB_ERR_NONE;
++}
++
++static grub_usb_err_t
++grub_xhci_check_transfer (grub_usb_controller_t dev,
++			  grub_usb_transfer_t transfer, grub_size_t * actual)
++{
++  grub_uint32_t status;
++  grub_uint32_t remaining;
++  grub_uint8_t epid;
++  volatile struct grub_xhci_ring *reqs;
++  grub_usb_err_t err;
++  int rc;
++
++  if (!dev->data || !transfer->controller_data || !transfer->dev ||
++      !transfer->dev->xhci_priv)
++    return GRUB_USB_ERR_INTERNAL;
++
++
++  struct grub_xhci_priv *priv = transfer->dev->xhci_priv;
++  struct grub_xhci *x = (struct grub_xhci *) dev->data;
++  struct grub_xhci_transfer_controller_data *cdata =
++    transfer->controller_data;
++
++  xhci_check_status(x);
++  xhci_process_events(x);
++
++  epid = grub_xhci_epid_from_transfer(transfer);
++
++  reqs = priv->enpoint_trbs[epid];
++
++  /* XXX: invalidate caches */
++
++  /* Get current status from event ring buffer */
++  status = (reqs->evt.status>> 24) & 0xff;
++  remaining = reqs->evt.status & 0xffffff;
++
++  if (status != CC_STOPPED_LENGTH_INVALID)
++      *actual = cdata->transfer_size - remaining;
++  else
++    *actual = 0;
++
++  if (xhci_ring_busy(reqs))
++      return GRUB_USB_ERR_WAIT;
++
++  grub_free(cdata);
++
++  grub_dprintf("xhci", "%s: xfer done\n", __func__);
++
++  err = grub_xhci_usb_to_grub_err(status);
++  if (err != GRUB_USB_ERR_NONE)
++    {
++      if (status == CC_STALL_ERROR)
++	{
++	  /* Clear the stall by resetting the endpoint */
++	  rc = xhci_cmd_reset_endpoint(x, priv->slotid, epid, 1);
++
++	  if (rc < 0)
++	    return GRUB_USB_ERR_TIMEOUT;
++
++	  return GRUB_USB_ERR_STALL;
++	}
++      else if (remaining > 0)
++	{
++	  return GRUB_USB_ERR_DATA;
++	}
++    }
++
++  return err;
++}
++
++static grub_usb_err_t
++grub_xhci_cancel_transfer (grub_usb_controller_t dev,
++			grub_usb_transfer_t transfer)
++{
++  grub_uint8_t epid;
++  volatile struct grub_xhci_ring *reqs;
++  struct grub_pci_dma_chunk *enpoint_trbs_dma;
++  grub_addr_t deque_pointer;
++  int rc;
++
++  if (!dev->data || !transfer->controller_data || !transfer->dev ||
++      !transfer->dev->xhci_priv)
++      return GRUB_USB_ERR_INTERNAL;
++
++  struct grub_xhci *x = (struct grub_xhci *) dev->data;
++  struct grub_xhci_transfer_controller_data *cdata =
++    transfer->controller_data;
++  struct grub_xhci_priv *priv = transfer->dev->xhci_priv;
++
++  epid = grub_xhci_epid_from_transfer(transfer);
++
++  enpoint_trbs_dma = priv->enpoint_trbs_dma[epid];
++  reqs = priv->enpoint_trbs[epid];
++
++  /* Abort current command */
++  rc = xhci_cmd_stop_endpoint(x, priv->slotid, epid, 0);
++  if (rc < 0)
++    return GRUB_USB_ERR_TIMEOUT;
++
++  /* Reset state */
++  reqs->nidx = 0;
++  reqs->eidx = 0;
++  reqs->cs = 1;
++
++  grub_arch_sync_dma_caches(reqs, sizeof(*reqs));
++
++  /* Reset the dequeue pointer to the begging of the TRB */
++  deque_pointer = grub_dma_get_phys(enpoint_trbs_dma);
++  rc = xhci_cmd_set_dequeue_pointer(x, priv->slotid, epid, deque_pointer| 1 );
++  if (rc < 0)
++    return GRUB_USB_ERR_TIMEOUT;
++
++  reqs->evt.ptr_low = 0;
++  reqs->evt.ptr_high = 0;
++  reqs->evt.control = 0;
++  reqs->evt.status = 0;
++
++  grub_arch_sync_dma_caches(reqs, sizeof(*reqs));
++
++  /* Restart ring buffer processing */
++  xhci_doorbell(x, priv->slotid, epid);
++
++  grub_free (cdata);
++
++  return GRUB_USB_ERR_NONE;
++}
++
++/****************************************************************
++ * xHCI port status functions
++ ****************************************************************/
++
++static int
++grub_xhci_hubports (grub_usb_controller_t dev)
++{
++  struct grub_xhci *x = (struct grub_xhci *) dev->data;
++  grub_uint32_t portinfo;
++
++  portinfo = x->ports;
++  grub_dprintf ("xhci", "root hub ports=%d\n", portinfo);
++  return portinfo;
++}
++
++static grub_usb_err_t
++grub_xhci_portstatus (grub_usb_controller_t dev,
++			  unsigned int port, unsigned int enable)
++{
++  struct grub_xhci *x = (struct grub_xhci *) dev->data;
++  grub_uint32_t portsc, pls;
++  grub_uint32_t end;
++
++  portsc = grub_xhci_port_read(x, port);
++  pls = xhci_get_field(portsc, XHCI_PORTSC_PLS);
++
++  grub_dprintf("xhci", "grub_xhci_portstatus port #%d: 0x%08x,%s%s pls %d enable %d\n",
++	       port, portsc,
++	       (portsc & GRUB_XHCI_PORTSC_PP)  ? " powered," : "",
++	       (portsc & GRUB_XHCI_PORTSC_PED) ? " enabled," : "",
++	       pls, enable);
++  xhci_check_status(x);
++
++  if ((enable && (portsc & GRUB_XHCI_PORTSC_PED)) ||
++      (!enable && !(portsc & GRUB_XHCI_PORTSC_PED)))
++    return GRUB_USB_ERR_NONE;
++
++  if (!enable)
++    {
++      /* Disable port */
++      grub_xhci_port_write(x, port, ~0, GRUB_XHCI_PORTSC_PED);
++      return GRUB_USB_ERR_NONE;
++    }
++
++  grub_dprintf ("xhci", "portstatus: XHCI STATUS: %08x\n",
++		grub_xhci_read32(&x->op->usbsts));
++  grub_dprintf ("xhci",
++		"portstatus: begin, iobase=%p, port=%d, status=0x%08x\n",
++		x->caps, port, portsc);
++
++  switch (pls)
++    {
++      case PLS_U0:
++	/* A USB3 port - controller automatically performs reset */
++	break;
++      case PLS_POLLING:
++	/* A USB2 port - perform device reset */
++	grub_xhci_port_write(x, port, ~GRUB_XHCI_PORTSC_PED, GRUB_XHCI_PORTSC_PR);
++	break;
++      default:
++        return GRUB_USB_ERR_NONE;
++    }
++
++  /* Wait for device to complete reset and be enabled */
++  end = grub_get_time_ms () + 100;
++  for (;;)
++    {
++      portsc = grub_xhci_port_read(x, port);
++      if (!(portsc & GRUB_XHCI_PORTSC_CCS))
++	{
++	  /* Device disconnected during reset */
++	  grub_dprintf ("xhci","ERROR: %s device disconnected\n", __func__);
++	  return GRUB_USB_ERR_BADDEVICE;
++	}
++      if (portsc & GRUB_XHCI_PORTSC_PED)
++	  /* Reset complete */
++	  break;
++      if (grub_get_time_ms () > end)
++	{
++	  grub_dprintf ("xhci","ERROR: %s TIMEOUT\n", __func__);
++	  return GRUB_USB_ERR_TIMEOUT;
++	}
++    }
++  xhci_check_status(x);
++
++  return GRUB_USB_ERR_NONE;
++}
++
++/****************************************************************
++ * xHCI detect device functions
++ ****************************************************************/
++
++static grub_usb_speed_t
++grub_xhci_detect_dev (grub_usb_controller_t dev, int port, int *changed)
++{
++  struct grub_xhci *x = (struct grub_xhci *) dev->data;
++  grub_uint32_t portsc, speed;
++
++  *changed = 0;
++  grub_dprintf("xhci", "%s: dev=%p USB%d_%d port %d\n", __func__, dev,
++	       x->psids[port-1].major, x->psids[port-1].minor, port);
++
++  /* On shutdown advertise all ports as disconnected. This will trigger
++   * a gracefull detatch. */
++  if (x->shutdown)
++    {
++      *changed = 1;
++      return GRUB_USB_SPEED_NONE;
++    }
++
++  /* Don't advertise new devices, connecting will fail if halted */
++  if (xhci_is_halted(x))
++    return GRUB_USB_SPEED_NONE;
++
++  portsc = grub_xhci_port_read(x, port);
++  speed = xhci_get_field(portsc, XHCI_PORTSC_SPEED);
++  grub_uint8_t pls = xhci_get_field(portsc, XHCI_PORTSC_PLS);
++
++  grub_dprintf("xhci", "grub_xhci_portstatus port #%d: 0x%08x,%s%s pls %d\n",
++	       port, portsc,
++	       (portsc & GRUB_XHCI_PORTSC_PP)  ? " powered," : "",
++	       (portsc & GRUB_XHCI_PORTSC_PED) ? " enabled," : "",
++	       pls);
++
++  /* Connect Status Change bit - it detects change of connection */
++  if (portsc & GRUB_XHCI_PORTSC_CSC)
++    {
++      *changed = 1;
++
++      grub_xhci_port_write(x, port, ~GRUB_XHCI_PORTSC_PED, GRUB_XHCI_PORTSC_CSC);
++    }
++
++  if (!(portsc & GRUB_XHCI_PORTSC_CCS))
++    return GRUB_USB_SPEED_NONE;
++
++  for (grub_uint8_t i = 0; i < 16 && x->psids[port-1].psids[i].id > 0; i++)
++    {
++      if (x->psids[port-1].psids[i].id == speed)
++        {
++	  grub_dprintf("xhci", "%s: grub_usb_speed = %d\n", __func__,
++		       x->psids[port-1].psids[i].grub_usb_speed );
++	  return x->psids[port-1].psids[i].grub_usb_speed;
++	}
++    }
++
++  return GRUB_USB_SPEED_NONE;
++}
++
++/****************************************************************
++ * xHCI attach/detach functions
++ ****************************************************************/
++
++static grub_usb_err_t
++grub_xhci_attach_dev (grub_usb_controller_t ctrl, grub_usb_device_t dev)
++{
++  struct grub_xhci *x = (struct grub_xhci *) ctrl->data;
++  grub_usb_err_t err;
++  grub_uint32_t max;
++
++  grub_dprintf("xhci", "%s: dev=%p\n", __func__, dev);
++
++  if (!dev || !x)
++    return GRUB_USB_ERR_INTERNAL;
++
++  dev->xhci_priv = grub_zalloc (sizeof (struct grub_xhci_priv));
++  if (!dev->xhci_priv)
++    return GRUB_USB_ERR_INTERNAL;
++
++
++  switch (dev->speed)
++    {
++      case GRUB_USB_SPEED_LOW:
++	{
++	  max = 8;
++	  break;
++	}
++      case GRUB_USB_SPEED_FULL:
++      case GRUB_USB_SPEED_HIGH:
++	{
++	  max = 64;
++	  break;
++	}
++      case GRUB_USB_SPEED_SUPER:
++	{
++	  max = 512;
++	  break;
++	}
++      default:
++      case GRUB_USB_SPEED_NONE:
++	{
++	  max = 0;
++	}
++    }
++
++  /* Assign a slot, assign an address and configure endpoint 0 */
++  err = grub_xhci_prepare_endpoint(x, dev,
++				  0,
++				  0,
++				  GRUB_USB_TRANSACTION_TYPE_CONTROL,
++				  max,
++				  dev->xhci_priv);
++
++  return err;
++}
++
++static grub_usb_err_t
++grub_xhci_detach_dev (grub_usb_controller_t ctrl, grub_usb_device_t dev)
++{
++  struct grub_xhci *x = (struct grub_xhci *) ctrl->data;
++  struct grub_xhci_priv *priv;
++  int cc = CC_SUCCESS;
++
++  grub_dprintf("xhci", "%s: dev=%p\n", __func__, dev);
++
++  if (!dev)
++    return GRUB_USB_ERR_INTERNAL;
++
++  if (dev->xhci_priv)
++    {
++      priv = dev->xhci_priv;
++      /* Stop endpoints and free ring buffer */
++      for (int i = 0; i < GRUB_XHCI_MAX_ENDPOINTS; i++)
++	{
++	  if (priv->enpoint_trbs[i] != NULL)
++	    {
++	      cc = xhci_cmd_stop_endpoint(x, priv->slotid, i, 1);
++	      if (cc != CC_SUCCESS)
++		grub_dprintf("xhci", "Failed to disable EP%d on slot %d\n", i,
++			     priv->slotid);
++
++	      grub_dprintf("xhci", "grub_dma_free[%d]\n", i);
++
++	      grub_dma_free(priv->enpoint_trbs_dma[i]);
++	      priv->enpoint_trbs[i] = NULL;
++	      priv->enpoint_trbs_dma[i] = NULL;
++	    }
++	}
++
++      cc = xhci_cmd_disable_slot(x, priv->slotid);
++      if (cc == CC_SUCCESS)
++	{
++	  if (priv->slotctx_dma)
++	    grub_dma_free(priv->slotctx_dma);
++	  x->devs[priv->slotid].ptr_low = 0;
++	  x->devs[priv->slotid].ptr_high = 0;
++	  grub_arch_sync_dma_caches(&x->devs[priv->slotid], sizeof(x->devs[0]));
++	}
++	else
++	  grub_dprintf("xhci", "Failed to disable slot %d\n", priv->slotid);
++
++      grub_free(dev->xhci_priv);
++    }
++
++  dev->xhci_priv = NULL;
++
++  if (cc != CC_SUCCESS)
++    return GRUB_USB_ERR_BADDEVICE;
++  return GRUB_USB_ERR_NONE;
++}
++
++/****************************************************************
++ * xHCI terminate functions
++ ****************************************************************/
++
++static void
++grub_xhci_halt(struct grub_xhci *x)
++{
++  grub_uint32_t reg;
++
++  /* Halt the command ring */
++  reg = grub_xhci_read32(&x->op->crcr_low);
++  grub_xhci_write32(&x->op->crcr_low, reg | 4);
++
++  int rc = xhci_event_wait(x, x->cmds, 100);
++  grub_dprintf("xhci", "%s: xhci_event_wait = %d\n", __func__, rc);
++  if (rc < 0)
++    return;
++
++  /* Stop the controller */
++  reg = grub_xhci_read32(&x->op->usbcmd);
++  if (reg & GRUB_XHCI_CMD_RS)
++    {
++      reg &= ~GRUB_XHCI_CMD_RS;
++      grub_xhci_write32(&x->op->usbcmd, reg);
++    }
++
++  return;
++}
++
++static grub_err_t
++grub_xhci_fini_hw (int noreturn __attribute__ ((unused)))
++{
++  struct grub_xhci *x;
++
++  /* We should disable all XHCI HW to prevent any DMA access etc. */
++  for (x = xhci; x; x = x->next)
++    {
++      x->shutdown = 1;
++
++      /* Gracefully detach active devices */
++      grub_usb_poll_devices(0);
++
++      /* Check if xHCI is halted and halt it if not */
++      grub_xhci_halt (x);
++
++      /* Reset xHCI */
++      if (grub_xhci_reset (x) != GRUB_USB_ERR_NONE)
++	return GRUB_ERR_BAD_DEVICE;
++    }
++
++  return GRUB_ERR_NONE;
++}
++
++static struct grub_usb_controller_dev usb_controller = {
++  .name = "xhci",
++  .iterate = grub_xhci_iterate,
++  .setup_transfer = grub_xhci_setup_transfer,
++  .check_transfer = grub_xhci_check_transfer,
++  .cancel_transfer = grub_xhci_cancel_transfer,
++  .hubports = grub_xhci_hubports,
++  .portstatus = grub_xhci_portstatus,
++  .detect_dev = grub_xhci_detect_dev,
++  .attach_dev = grub_xhci_attach_dev,
++  .detach_dev = grub_xhci_detach_dev,
++  /* estimated max. count of TDs for one bulk transfer */
++  .max_bulk_tds = GRUB_XHCI_RING_ITEMS - 3
++};
++
++GRUB_MOD_INIT (xhci)
++{
++  grub_stop_disk_firmware ();
++
++  grub_boot_time ("Initing XHCI hardware");
++  grub_xhci_pci_scan ();
++  grub_boot_time ("Registering XHCI driver");
++  grub_usb_controller_dev_register (&usb_controller);
++  grub_boot_time ("XHCI driver registered");
++}
++
++GRUB_MOD_FINI (xhci)
++{
++  grub_xhci_fini_hw (0);
++  grub_usb_controller_dev_unregister (&usb_controller);
++}
+diff --git a/include/grub/usb.h b/include/grub/usb.h
+index 609faf7d0..eb71fa1c7 100644
+--- a/include/grub/usb.h
++++ b/include/grub/usb.h
+@@ -338,6 +338,10 @@ grub_usb_cancel_transfer (grub_usb_transfer_t trans);
+ void
+ grub_ehci_init_device (volatile void *regs);
+ void
++grub_xhci_init_device (volatile void *regs);
++void
+ grub_ehci_pci_scan (void);
++void
++grub_xhci_pci_scan (void);
+ 
+ #endif /* GRUB_USB_H */
+-- 
+2.39.2
+
diff --git a/config/grub/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch b/config/grub/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
new file mode 100644
index 00000000..a37bbd6b
--- /dev/null
+++ b/config/grub/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
@@ -0,0 +1,127 @@
+From 2a2c64f6ea62337c1263a70f6ca9a9bade66b78b Mon Sep 17 00:00:00 2001
+From: Patrick Rudolph <patrick.rudolph@9elements.com>
+Date: Thu, 3 Dec 2020 13:44:55 +0100
+Subject: [PATCH 7/8] grub-core/bus/usb/usbhub: Add xHCI non root hub support
+
+Tested on Intel PCH C246, the USB3 hub can be configured by grub.
+
+Issues:
+* USB3 devices connected behind that hub are sometimes not detected.
+
+Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
+---
+ grub-core/bus/usb/usbhub.c | 38 +++++++++++++++++++++++++++++++++-----
+ include/grub/usbdesc.h     |  1 +
+ include/grub/usbtrans.h    |  4 ++++
+ 3 files changed, 38 insertions(+), 5 deletions(-)
+
+diff --git a/grub-core/bus/usb/usbhub.c b/grub-core/bus/usb/usbhub.c
+index b4b3a1a61..e96505aa9 100644
+--- a/grub-core/bus/usb/usbhub.c
++++ b/grub-core/bus/usb/usbhub.c
+@@ -148,19 +148,32 @@ grub_usb_hub_add_dev (grub_usb_controller_t controller,
+   return dev;
+ }
+ 
+-
++static grub_usb_err_t
++grub_usb_set_hub_depth(grub_usb_device_t dev, grub_uint8_t depth)
++{
++  return grub_usb_control_msg (dev, (GRUB_USB_REQTYPE_OUT
++			            | GRUB_USB_REQTYPE_CLASS
++			            | GRUB_USB_REQTYPE_TARGET_DEV),
++			      GRUB_USB_HUB_REQ_SET_HUB_DEPTH, depth,
++			      0, 0, NULL);
++}
++
+ static grub_usb_err_t
+ grub_usb_add_hub (grub_usb_device_t dev)
+ {
+   struct grub_usb_usb_hubdesc hubdesc;
+   grub_usb_err_t err;
++  grub_uint16_t req;
+   int i;
+ 
++  req = (dev->speed == GRUB_USB_SPEED_SUPER) ? GRUB_USB_DESCRIPTOR_SS_HUB :
++    GRUB_USB_DESCRIPTOR_HUB;
++
+   err = grub_usb_control_msg (dev, (GRUB_USB_REQTYPE_IN
+ 	  		            | GRUB_USB_REQTYPE_CLASS
+ 			            | GRUB_USB_REQTYPE_TARGET_DEV),
+-                              GRUB_USB_REQ_GET_DESCRIPTOR,
+-			      (GRUB_USB_DESCRIPTOR_HUB << 8) | 0,
++			      GRUB_USB_REQ_GET_DESCRIPTOR,
++			      (req << 8) | 0,
+ 			      0, sizeof (hubdesc), (char *) &hubdesc);
+   if (err)
+     return err;
+@@ -183,6 +196,19 @@ grub_usb_add_hub (grub_usb_device_t dev)
+       return GRUB_USB_ERR_INTERNAL;
+     }
+ 
++  if (dev->speed == GRUB_USB_SPEED_SUPER)
++    {
++      grub_uint8_t depth;
++      grub_uint32_t route;
++      /* Depth maximum value is 5, but root hubs doesn't count */
++      for (depth = 0, route = dev->route; (route & 0xf) > 0; route >>= 4)
++	depth++;
++
++      err = grub_usb_set_hub_depth(dev, depth);
++      if (err)
++        return err;
++    }
++
+   /* Power on all Hub ports.  */
+   for (i = 1; i <= hubdesc.portcnt; i++)
+     {
+@@ -637,7 +663,9 @@ poll_nonroot_hub (grub_usb_device_t dev)
+ 	      int split_hubaddr = 0;
+ 
+ 	      /* Determine the device speed.  */
+-	      if (status & GRUB_USB_HUB_STATUS_PORT_LOWSPEED)
++	      if (dev->speed == GRUB_USB_SPEED_SUPER)
++	        speed = GRUB_USB_SPEED_SUPER;
++	      else if (status & GRUB_USB_HUB_STATUS_PORT_LOWSPEED)
+ 		speed = GRUB_USB_SPEED_LOW;
+ 	      else
+ 		{
+@@ -651,7 +679,7 @@ poll_nonroot_hub (grub_usb_device_t dev)
+ 	      grub_millisleep (10);
+ 
+               /* Find correct values for SPLIT hubport and hubaddr */
+-	      if (speed == GRUB_USB_SPEED_HIGH)
++	      if (speed == GRUB_USB_SPEED_HIGH || speed == GRUB_USB_SPEED_SUPER)
+ 	        {
+ 		  /* HIGH speed device needs not transaction translation */
+ 		  split_hubport = 0;
+diff --git a/include/grub/usbdesc.h b/include/grub/usbdesc.h
+index bb2ab2e27..1697aa465 100644
+--- a/include/grub/usbdesc.h
++++ b/include/grub/usbdesc.h
+@@ -30,6 +30,7 @@ typedef enum {
+   GRUB_USB_DESCRIPTOR_ENDPOINT,
+   GRUB_USB_DESCRIPTOR_DEBUG = 10,
+   GRUB_USB_DESCRIPTOR_HUB = 0x29,
++  GRUB_USB_DESCRIPTOR_SS_HUB = 0x2a,
+   GRUB_USB_DESCRIPTOR_SS_ENDPOINT_COMPANION = 0x30
+ } grub_usb_descriptor_t;
+ 
+diff --git a/include/grub/usbtrans.h b/include/grub/usbtrans.h
+index 039ebed65..d6c3f71dc 100644
+--- a/include/grub/usbtrans.h
++++ b/include/grub/usbtrans.h
+@@ -110,6 +110,10 @@ enum
+     GRUB_USB_REQ_SET_INTERFACE = 0x0B,
+     GRUB_USB_REQ_SYNC_FRAME = 0x0C
+   };
++enum
++  {
++    GRUB_USB_HUB_REQ_SET_HUB_DEPTH = 0x0C,
++  };
+ 
+ #define GRUB_USB_FEATURE_ENDP_HALT	0x00
+ #define GRUB_USB_FEATURE_DEV_REMOTE_WU	0x01
+-- 
+2.39.2
+
diff --git a/config/grub/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch b/config/grub/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch
new file mode 100644
index 00000000..af79c3d0
--- /dev/null
+++ b/config/grub/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch
@@ -0,0 +1,90 @@
+From 871d768f8c5c960cb0d9761a9028b16882e1a7d3 Mon Sep 17 00:00:00 2001
+From: Patrick Rudolph <patrick.rudolph@9elements.com>
+Date: Wed, 24 Feb 2021 08:25:41 +0100
+Subject: [PATCH 8/8] Fix compilation on x86_64
+
+Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
+---
+ grub-core/bus/usb/xhci.c | 24 ++++++++++++++++--------
+ 1 file changed, 16 insertions(+), 8 deletions(-)
+
+diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c
+index f4591ffb5..3495bb919 100644
+--- a/grub-core/bus/usb/xhci.c
++++ b/grub-core/bus/usb/xhci.c
+@@ -184,7 +184,7 @@ enum
+  *  then we can get it from a trb pointer (provided by evt ring).
+  */
+ #define XHCI_RING(_trb)	  \
+-    ((struct grub_xhci_ring*)((grub_uint32_t)(_trb) & ~(GRUB_XHCI_RING_SIZE-1)))
++    ((struct grub_xhci_ring*)((grub_addr_t)(_trb) & ~(GRUB_XHCI_RING_SIZE-1)))
+ 
+ /* slot context */
+ struct grub_xhci_slotctx {
+@@ -495,6 +495,14 @@ grub_xhci_read8(volatile void *addr) {
+   return (*((volatile grub_uint32_t *)addr));
+ }
+ 
++static inline void *
++grub_xhci_read_etrb_ptr(volatile struct grub_xhci_trb *trb) {
++  grub_uint64_t tmp;
++  tmp = (grub_uint64_t)grub_xhci_read32(&trb->ptr_low);
++  tmp |= ((grub_uint64_t)grub_xhci_read32(&trb->ptr_high)) << 32;
++  return (void *)(grub_addr_t)tmp;
++}
++
+ static inline grub_uint32_t
+ grub_xhci_port_read (struct grub_xhci *x, grub_uint32_t port)
+ {
+@@ -664,7 +672,7 @@ static void xhci_process_events(struct grub_xhci *x)
+ 	    case ER_TRANSFER:
+ 	    case ER_COMMAND_COMPLETE:
+ 	      {
+-		struct grub_xhci_trb  *rtrb = (void*)grub_xhci_read32(&etrb->ptr_low);
++		struct grub_xhci_trb  *rtrb = grub_xhci_read_etrb_ptr(etrb);
+ 		struct grub_xhci_ring *ring = XHCI_RING(rtrb);
+ 		volatile struct grub_xhci_trb  *evt = &ring->evt;
+ 		grub_uint32_t eidx = rtrb - ring->ring + 1;
+@@ -697,9 +705,9 @@ static void xhci_process_events(struct grub_xhci *x)
+ 	  }
+ 	grub_xhci_write32(&evts->nidx, nidx);
+ 	volatile struct grub_xhci_ir *ir = x->ir;
+-	grub_uint32_t erdp = (grub_uint32_t)(evts->ring + nidx);
+-	grub_xhci_write32(&ir->erdp_low, erdp);
+-	grub_xhci_write32(&ir->erdp_high, 0);
++	grub_uint64_t erdp = (grub_addr_t)(void *)(&evts->ring[nidx]);
++	grub_xhci_write32(&ir->erdp_low, erdp & 0xffffffff);
++	grub_xhci_write32(&ir->erdp_high, erdp >> 32);
+     }
+ }
+ 
+@@ -800,7 +808,7 @@ static void xhci_trb_queue(volatile struct grub_xhci_ring *ring,
+ 			   grub_uint32_t xferlen, grub_uint32_t flags)
+ {
+   grub_dprintf("xhci", "%s: ring %p data %llx len %d flags 0x%x remain 0x%x\n", __func__,
+-      ring, data_or_addr, xferlen & 0x1ffff, flags, xferlen >> 17);
++      ring, (unsigned long long)data_or_addr, xferlen & 0x1ffff, flags, xferlen >> 17);
+ 
+   if (xhci_ring_full(ring))
+     {
+@@ -1907,7 +1915,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev,
+   if (transfer->type == GRUB_USB_TRANSACTION_TYPE_CONTROL)
+   {
+     volatile struct grub_usb_packet_setup *setupdata;
+-    setupdata = (void *)transfer->transactions[0].data;
++    setupdata = (void *)(grub_addr_t)transfer->transactions[0].data;
+     grub_dprintf("xhci", "%s: CONTROLL TRANS req %d\n", __func__, setupdata->request);
+     grub_dprintf("xhci", "%s: CONTROLL TRANS length %d\n", __func__, setupdata->length);
+ 
+@@ -1974,7 +1982,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev,
+ 	/* Assume the ring has enough free space for all TRBs */
+ 	if (flags & TRB_TR_IDT && tr->size <= (int)sizeof(inline_data))
+ 	  {
+-	    grub_memcpy(&inline_data, (void *)tr->data, tr->size);
++	    grub_memcpy(&inline_data, (void *)(grub_addr_t)tr->data, tr->size);
+ 	    xhci_trb_queue(reqs, inline_data, tr->size, flags);
+ 	  }
+ 	else
+-- 
+2.39.2
+

From 4134a883d0d8dd4020f2ddca7416e0b9f82b8843 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 5 Apr 2024 23:53:03 +0100
Subject: [PATCH 0242/1549] add 9020 sff/mt targets that use broadwell mrc

broadwell mrc has better peg handling and can support 16gb
modules on broadwell machines - the blob can be used on haswell
machines too, instead of haswell mrc, and it might support 16gb
modules on these machines (not yet tested, but using broadwell
mrc does at least boot as reliably as haswell mrc anyway)

one little quirk with haswell mrc is that it actually handles
vga decode, disabling the igpu entirely, when a dgpu is used.
the broadwell mrc enables both GPUs and does not handle vga
decoding, so we must handle this the usual way; my patch for
this was merged upstream and i'm also adding it to libreboot,
which currently uses an older coreboot revision. this is needed
for dgpu to work. see patch:

0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch

broadwell mrc may also make dealing with nvidia optimus setups
more reliable, on laptops that have nvidia GPUs, but this patch
does not add bmrc configs for t440p/w541

NOTE: on t440p/w541 laptops with nvidia graphics, the video output
is wired to intel but rendering can be offloaded to nvidia. in this
setup, we want vga decode to be done on intel, so i've set these
configs to enable CONFIG_ONBOARD_VGA_IS_PRIMARY (set it to y)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...swell-Disable-iGPU-when-dGPU-is-used.patch |  54 ++
 ...Fully-disable-iGPU-when-dGPU-is-used.patch |  51 ++
 .../config/libgfxinit_corebootfb              | 636 ++++++++++++++++++
 .../config/libgfxinit_txtmode                 | 633 +++++++++++++++++
 .../coreboot/dell9020mtbmrc_12mb/target.cfg   |   7 +
 .../config/libgfxinit_corebootfb              | 636 ++++++++++++++++++
 .../config/libgfxinit_txtmode                 | 633 +++++++++++++++++
 .../coreboot/dell9020sffbmrc_12mb/target.cfg  |   7 +
 .../config/libgfxinit_corebootfb              |   2 +-
 .../t440pmrc_12mb/config/libgfxinit_txtmode   |   2 +-
 .../w541mrc_12mb/config/libgfxinit_corebootfb |   2 +-
 .../w541mrc_12mb/config/libgfxinit_txtmode    |   2 +-
 config/vendor/sources                         |  13 +
 13 files changed, 2674 insertions(+), 4 deletions(-)
 create mode 100644 config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch
 create mode 100644 config/coreboot/default/patches/0041-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
 create mode 100644 config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/dell9020mtbmrc_12mb/target.cfg
 create mode 100644 config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/dell9020sffbmrc_12mb/target.cfg

diff --git a/config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch b/config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch
new file mode 100644
index 00000000..7a02d902
--- /dev/null
+++ b/config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch
@@ -0,0 +1,54 @@
+From c6ce9c635e6576c86c546177c3d770dec2f3c9ae Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Fri, 23 Feb 2024 13:33:31 +0000
+Subject: [PATCH 1/1] nb/haswell: Disable iGPU when dGPU is used
+
+This is usually is handled by Haswell mrc.bin, disabling VGA
+decode on the iGPU when a dGPU is installed. However, Broadwell
+mrc.bin does not, so the iGPU and dGPU are both enabled.
+
+This patch disables legacy VGA cycles for iGPU, under such
+conditions. It has been tested on Broadwell mrc.bin when
+using a graphics card on Dell OptiPlex 9020 SFF (currently
+under review at this time of writing, submitted by Mate
+Kukri).
+
+This patch has also been tested when Haswell mrc.bin is used,
+and there are seemingly no breaking changes caused by it.
+
+Change-Id: I1df0a3aa42f8475b7741007bf3e28c2e089d916b
+Signed-off-by: Leah Rowe <info@minifree.org>
+Reviewed-on: https://review.coreboot.org/c/coreboot/+/80717
+Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
+Reviewed-by: Nico Huber <nico.h@gmx.de>
+---
+ src/northbridge/intel/haswell/gma.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
+index 6e6948b70f..48a0ba54c7 100644
+--- a/src/northbridge/intel/haswell/gma.c
++++ b/src/northbridge/intel/haswell/gma.c
+@@ -461,12 +461,19 @@ static void gma_generate_ssdt(const struct device *dev)
+ 	drivers_intel_gma_displays_ssdt_generate(&chip->gfx);
+ }
+ 
++static void gma_func0_disable(struct device *dev)
++{
++	/* Disable VGA decode */
++	pci_or_config16(pcidev_on_root(0, 0), GGC, 1 << 1);
++}
++
+ static struct device_operations gma_func0_ops = {
+ 	.read_resources		= pci_dev_read_resources,
+ 	.set_resources		= pci_dev_set_resources,
+ 	.enable_resources	= pci_dev_enable_resources,
+ 	.init			= gma_func0_init,
+ 	.acpi_fill_ssdt		= gma_generate_ssdt,
++	.vga_disable            = gma_func0_disable,
+ 	.ops_pci		= &pci_dev_ops_pci,
+ };
+ 
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0041-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch b/config/coreboot/default/patches/0041-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
new file mode 100644
index 00000000..bc8fd55c
--- /dev/null
+++ b/config/coreboot/default/patches/0041-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
@@ -0,0 +1,51 @@
+From 0801b3ba8a0ce0109e30d27f405c912d5d705e9c Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sat, 6 Apr 2024 01:22:47 +0100
+Subject: [PATCH 1/1] nb/haswell: Fully disable iGPU when dGPU is used
+
+My earlier patch disabled decode *and* disabled the iGPU itself, but
+a subsequent revision disabled only VGA decode. Upon revisiting, I
+found that, actually, yes, you also need to disable the iGPU entirely.
+
+Tested on Dell 9020 SFF using broadwell MRC, with both iGPU and dGPU.
+With this patch, the iGPU is completely disabled when you install a
+graphics card, but the iGPU is available to use when no graphics card
+is present.
+
+For more context, see:
+
+Author: Leah Rowe <info@minifree.org>
+Date:   Fri Feb 23 13:33:31 2024 +0000
+
+    nb/haswell: Disable iGPU when dGPU is used
+
+And look at the Gerrit comments:
+
+https://review.coreboot.org/c/coreboot/+/80717/
+
+So, my original submission on change 80717 was actually correct.
+This patch fixes the issue. I tested on iGPU and dGPU, with both
+broadwell and haswell mrc.bin.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/northbridge/intel/haswell/gma.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
+index 48a0ba54c7..f0b848852d 100644
+--- a/src/northbridge/intel/haswell/gma.c
++++ b/src/northbridge/intel/haswell/gma.c
+@@ -465,6 +465,9 @@ static void gma_func0_disable(struct device *dev)
+ {
+ 	/* Disable VGA decode */
+ 	pci_or_config16(pcidev_on_root(0, 0), GGC, 1 << 1);
++
++	/* Required or else the graphics card doesn't work */
++	dev->enabled = 0;
+ }
+ 
+ static struct device_operations gma_func0_ops = {
+-- 
+2.39.2
+
diff --git a/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..953901cd
--- /dev/null
+++ b/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,636 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_EHCI_BAR=0xd8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+CONFIG_USE_BROADWELL_MRC=y
+# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..682c9e99
--- /dev/null
+++ b/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,633 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_EHCI_BAR=0xd8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+CONFIG_USE_BROADWELL_MRC=y
+# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020mtbmrc_12mb/target.cfg b/config/coreboot/dell9020mtbmrc_12mb/target.cfg
new file mode 100644
index 00000000..e6d3bec6
--- /dev/null
+++ b/config/coreboot/dell9020mtbmrc_12mb/target.cfg
@@ -0,0 +1,7 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..c4995430
--- /dev/null
+++ b/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,636 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 SFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_EHCI_BAR=0xd8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+CONFIG_USE_BROADWELL_MRC=y
+# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..dc3d337d
--- /dev/null
+++ b/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,633 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 SFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_EHCI_BAR=0xd8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+CONFIG_USE_BROADWELL_MRC=y
+# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020sffbmrc_12mb/target.cfg b/config/coreboot/dell9020sffbmrc_12mb/target.cfg
new file mode 100644
index 00000000..e6d3bec6
--- /dev/null
+++ b/config/coreboot/dell9020sffbmrc_12mb/target.cfg
@@ -0,0 +1,7 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
index f2067194..d7124b0f 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
@@ -119,7 +119,7 @@ CONFIG_CBFS_SIZE=0x800000
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t440p"
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
index 9fa0abac..fc7db117 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
@@ -117,7 +117,7 @@ CONFIG_NO_POST=y
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x800000
 CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t440p"
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
index 314dbbc9..3f0cf31a 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
@@ -119,7 +119,7 @@ CONFIG_CBFS_SIZE=0x800000
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="w541"
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
index 8f09ec77..e0d0c538 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
@@ -117,7 +117,7 @@ CONFIG_NO_POST=y
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x800000
 CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="w541"
diff --git a/config/vendor/sources b/config/vendor/sources
index b87953e8..ba59a994 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -21,6 +21,18 @@
 	DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
 }
 
+# haswell boards, but use broadwell mrc.bin. uses me9 and
+# the broadwell mrc, but without broadwell refcode
+{dell9020sffbmrc dell9020mtbmrc}{
+	DL_hash f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998
+	DL_url https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
+	DL_url_bkup https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
+	MRC_url https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip
+	MRC_url_bkup https://web.archive.org/web/20220310155922/https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip
+	MRC_hash 3ff1599c52539f0707a07a8664a84ce51cd3fed1569df4bb7aa6722fc8dec0af1754250333b6ca1a9794d970a4de7b29a5cf2499f5b61e4c3eab64d1314aaea9
+	MRC_board samus
+}
+
 # NOTE: google's manifest for archives containing mrc.bin, used here:
 # https://web.archive.org/web/20210211071412/https://dl.google.com/dl/edgedl/chromeos/recovery/recovery.conf
 {t440pmrc w541mrc t440plibremrc w541 dell9020mt dell9020sff}{
@@ -33,6 +45,7 @@
 	MRC_board peppy
 }
 
+# broadwell mrc, and use me10 plus broadwell refcode
 {hp820g2}{
 	DL_hash 1ac05a3e4f46426eeb77f89c4aca25ed1ad64479d8fcba6a3ab63a944512bacbc5d148cc7b9c4ff4b8c90a1fb1de4776e46f14aca8021900e0df37246aa0b717
 	DL_url https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe

From e9c591a5547f48b2fce3337a502e87da6833d6d5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 6 Apr 2024 02:09:04 +0100
Subject: [PATCH 0243/1549] add t440p/w541 configs using broadwell mrc

broadwell mrc enables both igpu and dgpu to be enabled
at any given time. if the onboard (intel) gpu is set as
primary, the logic to disable it is not executed within
coreboot; instead, the igpu is used for vga decode.

on some t440p/w541 thinkpads, both an intel and nvidia
gpu are present. in this setup, the intel gpu must be
used for vga, and all output, but rendering can be
offloaded to the nvidia gpu (nvidia optimus).

optimus would never work on haswell mrc.bin, because it
always disables the igpu when a dgpu is present, so a hack
exists in coreboot that hides the dgpu from mrc, so that the
igpu remains enabled. broadwell mrc doesn't do this, so the
option to hide PEG devices has been disabled in these
configs.

the broadwell mrc has better peg device handling, and can
support 16gb modules on broadwell hardware; it may well
support these modules on haswell hardware too, though ddr3
sodimms are very hard to find (and expensive). (and currently
untested, with this patch)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              | 659 ++++++++++++++++++
 .../t440pbmrc_12mb/config/libgfxinit_txtmode  | 656 +++++++++++++++++
 config/coreboot/t440pbmrc_12mb/target.cfg     |   7 +
 .../config/libgfxinit_corebootfb              | 659 ++++++++++++++++++
 .../w541bmrc_12mb/config/libgfxinit_txtmode   | 656 +++++++++++++++++
 config/coreboot/w541bmrc_12mb/target.cfg      |   7 +
 config/vendor/sources                         |   2 +-
 7 files changed, 2645 insertions(+), 1 deletion(-)
 create mode 100644 config/coreboot/t440pbmrc_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/t440pbmrc_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/t440pbmrc_12mb/target.cfg
 create mode 100644 config/coreboot/w541bmrc_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/w541bmrc_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/w541bmrc_12mb/target.cfg

diff --git a/config/coreboot/t440pbmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440pbmrc_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..5026c68e
--- /dev/null
+++ b/config/coreboot/t440pbmrc_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,659 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_FAMILY="ThinkPad T440p"
+CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T440p"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/haswell"
+CONFIG_VGA_BIOS_ID="8086,0416"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+CONFIG_NO_POST=y
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
+CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="t440p"
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0036"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
+# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
+CONFIG_VBOOT_SLOTS_RW_AB=y
+CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_EHCI_BAR=0xd8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+CONFIG_USE_BROADWELL_MRC=y
+# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_NO_UART_ON_SUPERIO=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+CONFIG_HWBASE_DEBUG_NULL=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t440pbmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440pbmrc_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..a6b1bf70
--- /dev/null
+++ b/config/coreboot/t440pbmrc_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,656 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_FAMILY="ThinkPad T440p"
+CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T440p"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/haswell"
+CONFIG_VGA_BIOS_ID="8086,0416"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+CONFIG_NO_POST=y
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_MAX_CPUS=8
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
+CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="t440p"
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0036"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
+# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
+CONFIG_VBOOT_SLOTS_RW_AB=y
+CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_EHCI_BAR=0xd8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+CONFIG_USE_BROADWELL_MRC=y
+# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_NO_UART_ON_SUPERIO=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+CONFIG_HWBASE_DEBUG_NULL=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t440pbmrc_12mb/target.cfg b/config/coreboot/t440pbmrc_12mb/target.cfg
new file mode 100644
index 00000000..8688df3f
--- /dev/null
+++ b/config/coreboot/t440pbmrc_12mb/target.cfg
@@ -0,0 +1,7 @@
+tree="default"
+xarch="i386-elf"
+payload_grub="y"
+payload_grub_withseabios="y"
+payload_seabios="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/w541bmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541bmrc_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..a5342fbb
--- /dev/null
+++ b/config/coreboot/w541bmrc_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,659 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_FAMILY="ThinkPad W541"
+CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W541"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/haswell"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+CONFIG_NO_POST=y
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
+CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="w541"
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN004A"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541"
+CONFIG_HAVE_IFD_BIN=y
+# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+CONFIG_BOARD_LENOVO_THINKPAD_W541=y
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
+CONFIG_VBOOT_SLOTS_RW_AB=y
+CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_EHCI_BAR=0xd8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+CONFIG_USE_BROADWELL_MRC=y
+# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_NO_UART_ON_SUPERIO=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/w541bmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/w541bmrc_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..60686a0f
--- /dev/null
+++ b/config/coreboot/w541bmrc_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,656 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_FAMILY="ThinkPad W541"
+CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W541"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/haswell"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+CONFIG_NO_POST=y
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_MAX_CPUS=8
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
+CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="w541"
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN004A"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541"
+CONFIG_HAVE_IFD_BIN=y
+# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+CONFIG_BOARD_LENOVO_THINKPAD_W541=y
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X220_EDP is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
+CONFIG_VBOOT_SLOTS_RW_AB=y
+CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_EHCI_BAR=0xd8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+CONFIG_USE_BROADWELL_MRC=y
+# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_NO_UART_ON_SUPERIO=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/w541bmrc_12mb/target.cfg b/config/coreboot/w541bmrc_12mb/target.cfg
new file mode 100644
index 00000000..8688df3f
--- /dev/null
+++ b/config/coreboot/w541bmrc_12mb/target.cfg
@@ -0,0 +1,7 @@
+tree="default"
+xarch="i386-elf"
+payload_grub="y"
+payload_grub_withseabios="y"
+payload_seabios="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/vendor/sources b/config/vendor/sources
index ba59a994..2d54bd44 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -23,7 +23,7 @@
 
 # haswell boards, but use broadwell mrc.bin. uses me9 and
 # the broadwell mrc, but without broadwell refcode
-{dell9020sffbmrc dell9020mtbmrc}{
+{dell9020sffbmrc dell9020mtbmrc t440pbmrc w541bmrc}{
 	DL_hash f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998
 	DL_url https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
 	DL_url_bkup https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe

From 831954899c2080a9d0e3e34932afa55b25bc8fdc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 6 Apr 2024 16:00:57 +0100
Subject: [PATCH 0244/1549] enable grub payload on libremrc w541/t440p

the grub payload was previously disabled, because the libre
mrc code sets up xhci rather than ehci, and grub did not have
xhci support (not natively).

libreboot now has xhci support in the grub payload, so enable
grub on these configurations.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/t440plibremrc_12mb/target.cfg | 5 +++--
 config/coreboot/w541_12mb/target.cfg          | 5 +++--
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index d36486ab..8bb575a9 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -1,6 +1,7 @@
 tree="haswell"
 xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
+payload_grub="y"
+payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index d36486ab..8bb575a9 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -1,6 +1,7 @@
 tree="haswell"
 xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
+payload_grub="y"
+payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
+grub_scan_disk="ahci"

From 6da91df6b9473628b02f4d5a1e0a801a49a2e6da Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 7 Apr 2024 03:45:32 +0100
Subject: [PATCH 0245/1549] add mate's patch for 9020 sff/mt fan controls

see:

https://review.coreboot.org/c/coreboot/+/81529

what i've merged is patchset 4. i had to rebase it slightly,
because the libreboot version has the iommu toggle on cmos
configs, which are files that mate's patch also changes,
leading to merge conflict.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ..._9020-Implement-late-HWM-initializat.patch | 594 ++++++++++++++++++
 1 file changed, 594 insertions(+)
 create mode 100644 config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch

diff --git a/config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch b/config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
new file mode 100644
index 00000000..f6bd1940
--- /dev/null
+++ b/config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
@@ -0,0 +1,594 @@
+From f6340f3fe21e948ba94d0429467882c2fb90b77e Mon Sep 17 00:00:00 2001
+From: Mate Kukri <kukri.mate@gmail.com>
+Date: Sat, 6 Apr 2024 23:25:15 +0100
+Subject: [PATCH 1/1] mb/dell/optiplex_9020: Implement late HWM initialization
+
+There are 4 different chassis types specified by vendor firmware, each
+with a slightly different HWM configuration.
+
+The chassis type to use is determined at runtime by reading a set of
+4 PCH GPIOs: 70, 38, 17, and 0.
+
+Additionally vendor firmware also provides an option to run the fans at
+full speed. This is substituted with a coreboot nvram option in this
+implementation.
+
+This was tested to make fan control work on my OptiPlex 7020 SFF.
+
+NOTE: This is superficially similar to the OptiPlex 9010's SCH5545
+however the OptiPlex 9020's SCH5555 does not use externally
+programmed EC firmware.
+
+Change-Id: Ibdccd3fc7364e03e84ca606592928410624eed43
+Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
+---
+ src/mainboard/dell/optiplex_9020/Makefile.inc |   3 +-
+ src/mainboard/dell/optiplex_9020/bootblock.c  |  25 +-
+ src/mainboard/dell/optiplex_9020/cmos.default |   1 +
+ src/mainboard/dell/optiplex_9020/cmos.layout  |   5 +-
+ src/mainboard/dell/optiplex_9020/mainboard.c  | 382 ++++++++++++++++++
+ src/mainboard/dell/optiplex_9020/sch5555_ec.c |  54 +++
+ src/mainboard/dell/optiplex_9020/sch5555_ec.h |   7 +
+ 7 files changed, 455 insertions(+), 22 deletions(-)
+ create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.c
+ create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.h
+
+diff --git a/src/mainboard/dell/optiplex_9020/Makefile.inc b/src/mainboard/dell/optiplex_9020/Makefile.inc
+index 6ca2f2afaa..08e2e53577 100644
+--- a/src/mainboard/dell/optiplex_9020/Makefile.inc
++++ b/src/mainboard/dell/optiplex_9020/Makefile.inc
+@@ -2,4 +2,5 @@
+ 
+ romstage-y += gpio.c
+ ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+-bootblock-y += bootblock.c
++ramstage-y += sch5555_ec.c
++bootblock-y += bootblock.c sch5555_ec.c
+diff --git a/src/mainboard/dell/optiplex_9020/bootblock.c b/src/mainboard/dell/optiplex_9020/bootblock.c
+index 2837cf9cf1..e5e759273e 100644
+--- a/src/mainboard/dell/optiplex_9020/bootblock.c
++++ b/src/mainboard/dell/optiplex_9020/bootblock.c
+@@ -4,29 +4,14 @@
+ #include <device/pnp_ops.h>
+ #include <superio/smsc/sch555x/sch555x.h>
+ #include <southbridge/intel/lynxpoint/pch.h>
+-
+-static void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val)
+-{
+-	// Clear EC-to-Host mailbox
+-	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
+-	outb(tmp, SCH555x_EMI_IOBASE + 1);
+-
+-	// Send address and value to the EC
+-	sch555x_emi_write16(0, (addr1 * 2) | 0x101);
+-	sch555x_emi_write32(4, val | (addr2 << 16));
+-
+-	// Wait for acknowledgement message from EC
+-	outb(1, SCH555x_EMI_IOBASE);
+-	size_t timeout = 0;
+-	do {} while (++timeout < 0xfff && (inb(SCH555x_EMI_IOBASE + 1) & 1) == 0);
+-}
++#include "sch5555_ec.h"
+ 
+ struct ec_init_entry {
+ 	uint16_t addr;
+ 	uint8_t val;
+ };
+ 
+-static void ec_init(void)
++static void bootblock_ec_init(void)
+ {
+ 	/*
+ 	 * Tables from CORE_PEI
+@@ -108,9 +93,9 @@ void mainboard_config_superio(void)
+ 	outb(0x01, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_UNK1);
+ 	outb(0x0f, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_LED);
+ 
+-	// Magic EC init
+-	ec_init();
++	// Perform bootblock EC initialization
++	bootblock_ec_init();
+ 
+-	// Magic EC init is needed for UART1 initialization to work
++	// Bootblock EC initialization is required for UART1 to work
+ 	sch555x_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ }
+diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
+index 7bccc80e51..1909abcb9f 100644
+--- a/src/mainboard/dell/optiplex_9020/cmos.default
++++ b/src/mainboard/dell/optiplex_9020/cmos.default
+@@ -3,3 +3,4 @@ debug_level=Debug
+ nmi=Disable
+ power_on_after_fail=Disable
+ iommu=Disable
++fan_full_speed=Disable
+diff --git a/src/mainboard/dell/optiplex_9020/cmos.layout b/src/mainboard/dell/optiplex_9020/cmos.layout
+index 72ff9c4bee..4a1496a878 100644
+--- a/src/mainboard/dell/optiplex_9020/cmos.layout
++++ b/src/mainboard/dell/optiplex_9020/cmos.layout
+@@ -22,7 +22,10 @@ entries
+ 409	2	e	5	power_on_after_fail
+ 
+ # turn iommu on or off
+-412	1	e	6	iommu
++411	1	e	6	iommu
++
++# coreboot config options: EC
++412	1	e	1	fan_full_speed
+ 
+ # coreboot config options: check sums
+ 984	16	h	0	check_sum
+diff --git a/src/mainboard/dell/optiplex_9020/mainboard.c b/src/mainboard/dell/optiplex_9020/mainboard.c
+index c834fea5d3..10b8aaca0e 100644
+--- a/src/mainboard/dell/optiplex_9020/mainboard.c
++++ b/src/mainboard/dell/optiplex_9020/mainboard.c
+@@ -1,7 +1,12 @@
+ /* SPDX-License-Identifier: GPL-2.0-only */
+ 
++#include <bootstate.h>
++#include <cpu/x86/msr.h>
+ #include <device/device.h>
+ #include <drivers/intel/gma/int15.h>
++#include <option.h>
++#include <southbridge/intel/lynxpoint/lp_gpio.h>
++#include "sch5555_ec.h"
+ 
+ static void mainboard_enable(struct device *dev)
+ {
+@@ -13,3 +18,380 @@ static void mainboard_enable(struct device *dev)
+ struct chip_operations mainboard_ops = {
+ 	.enable_dev = mainboard_enable,
+ };
++
++#define HWM_TAB_ADD_TEMP_TARGET 1
++#define HWM_TAB_PKG_POWER_ANY	0xffff
++
++struct hwm_tab_entry {
++	uint16_t addr;
++	uint8_t val;
++	uint8_t flags;
++	uint16_t pkg_power;
++};
++
++struct hwm_tab_entry HWM_TAB3[] = {
++	{ 0x005, 0x33, 0, 0xffff },
++	{ 0x018, 0x2f, 0, 0xffff },
++	{ 0x019, 0x2f, 0, 0xffff },
++	{ 0x01a, 0x2f, 0, 0xffff },
++	{ 0x080, 0x00, 0, 0xffff },
++	{ 0x081, 0x00, 0, 0xffff },
++	{ 0x083, 0xbb, 0, 0xffff },
++	{ 0x085, 0x8a, 0, 0x0010 },
++	{ 0x086, 0x4c, 0, 0x0010 },
++	{ 0x08a, 0x66, 0, 0x0010 },
++	{ 0x08b, 0x5b, 0, 0x0010 },
++	{ 0x090, 0x65, 0, 0xffff },
++	{ 0x091, 0x70, 0, 0xffff },
++	{ 0x092, 0x86, 0, 0xffff },
++	{ 0x096, 0xa4, 0, 0xffff },
++	{ 0x097, 0xa4, 0, 0xffff },
++	{ 0x098, 0xa4, 0, 0xffff },
++	{ 0x09b, 0xa4, 0, 0xffff },
++	{ 0x0a0, 0x0e, 0, 0xffff },
++	{ 0x0a1, 0x0e, 0, 0xffff },
++	{ 0x0ae, 0x7c, 0, 0xffff },
++	{ 0x0af, 0x86, 0, 0xffff },
++	{ 0x0b0, 0x9a, 0, 0xffff },
++	{ 0x0b3, 0x9a, 0, 0xffff },
++	{ 0x0b6, 0x08, 0, 0xffff },
++	{ 0x0b7, 0x08, 0, 0xffff },
++	{ 0x0ea, 0x64, 0, 0x0020 },
++	{ 0x0ea, 0x5c, 0, 0x0010 },
++	{ 0x0ef, 0xff, 0, 0xffff },
++	{ 0x0f8, 0x15, 0, 0xffff },
++	{ 0x0f9, 0x00, 0, 0xffff },
++	{ 0x0f0, 0x30, 0, 0xffff },
++	{ 0x0fd, 0x01, 0, 0xffff },
++	{ 0x1a1, 0x00, 0, 0xffff },
++	{ 0x1a2, 0x00, 0, 0xffff },
++	{ 0x1b1, 0x08, 0, 0xffff },
++	{ 0x1be, 0x99, 0, 0xffff },
++	{ 0x280, 0xa0, 0, 0x0010 },
++	{ 0x281, 0x0f, 0, 0x0010 },
++	{ 0x282, 0x03, 0, 0xffff },
++	{ 0x283, 0x0a, 0, 0xffff },
++	{ 0x284, 0x80, 0, 0xffff },
++	{ 0x285, 0x03, 0, 0xffff },
++	{ 0x288, 0x68, 0, 0x0010 },
++	{ 0x289, 0x10, 0, 0x0010 },
++	{ 0x28a, 0x03, 0, 0xffff },
++	{ 0x28b, 0x0a, 0, 0xffff },
++	{ 0x28c, 0x80, 0, 0xffff },
++	{ 0x28d, 0x03, 0, 0xffff },
++};
++
++struct hwm_tab_entry HWM_TAB4[] = {
++	{ 0x005, 0x33, 0, 0xffff },
++	{ 0x018, 0x2f, 0, 0xffff },
++	{ 0x019, 0x2f, 0, 0xffff },
++	{ 0x01a, 0x2f, 0, 0xffff },
++	{ 0x080, 0x00, 0, 0xffff },
++	{ 0x081, 0x00, 0, 0xffff },
++	{ 0x083, 0xbb, 0, 0xffff },
++	{ 0x085, 0x99, 0, 0x0020 },
++	{ 0x085, 0xad, 0, 0x0010 },
++	{ 0x086, 0x1c, 0, 0xffff },
++	{ 0x08a, 0x39, 0, 0x0020 },
++	{ 0x08a, 0x41, 0, 0x0010 },
++	{ 0x08b, 0x76, 0, 0x0020 },
++	{ 0x08b, 0x8b, 0, 0x0010 },
++	{ 0x090, 0x5e, 0, 0xffff },
++	{ 0x091, 0x5e, 0, 0xffff },
++	{ 0x092, 0x86, 0, 0xffff },
++	{ 0x096, 0xa4, 0, 0xffff },
++	{ 0x097, 0xa4, 0, 0xffff },
++	{ 0x098, 0xa4, 0, 0xffff },
++	{ 0x09b, 0xa4, 0, 0xffff },
++	{ 0x0a0, 0x0a, 0, 0xffff },
++	{ 0x0a1, 0x0a, 0, 0xffff },
++	{ 0x0ae, 0x7c, 0, 0xffff },
++	{ 0x0af, 0x7c, 0, 0xffff },
++	{ 0x0b0, 0x9a, 0, 0xffff },
++	{ 0x0b3, 0x7c, 0, 0xffff },
++	{ 0x0b6, 0x08, 0, 0xffff },
++	{ 0x0b7, 0x08, 0, 0xffff },
++	{ 0x0ea, 0x64, 0, 0x0020 },
++	{ 0x0ea, 0x5c, 0, 0x0010 },
++	{ 0x0ef, 0xff, 0, 0xffff },
++	{ 0x0f8, 0x15, 0, 0xffff },
++	{ 0x0f9, 0x00, 0, 0xffff },
++	{ 0x0f0, 0x30, 0, 0xffff },
++	{ 0x0fd, 0x01, 0, 0xffff },
++	{ 0x1a1, 0x00, 0, 0xffff },
++	{ 0x1a2, 0x00, 0, 0xffff },
++	{ 0x1b1, 0x08, 0, 0xffff },
++	{ 0x1be, 0x90, 0, 0xffff },
++	{ 0x280, 0x94, 0, 0x0020 },
++	{ 0x281, 0x11, 0, 0x0020 },
++	{ 0x280, 0x94, 0, 0x0010 },
++	{ 0x281, 0x11, 0, 0x0010 },
++	{ 0x282, 0x03, 0, 0xffff },
++	{ 0x283, 0x0a, 0, 0xffff },
++	{ 0x284, 0x80, 0, 0xffff },
++	{ 0x285, 0x03, 0, 0xffff },
++	{ 0x288, 0x28, 0, 0x0020 },
++	{ 0x289, 0x0a, 0, 0x0020 },
++	{ 0x288, 0x28, 0, 0x0010 },
++	{ 0x289, 0x0a, 0, 0x0010 },
++	{ 0x28a, 0x03, 0, 0xffff },
++	{ 0x28b, 0x0a, 0, 0xffff },
++	{ 0x28c, 0x80, 0, 0xffff },
++	{ 0x28d, 0x03, 0, 0xffff },
++};
++
++struct hwm_tab_entry HWM_TAB5[] = {
++	{ 0x005, 0x33, 0, 0xffff },
++	{ 0x018, 0x2f, 0, 0xffff },
++	{ 0x019, 0x2f, 0, 0xffff },
++	{ 0x01a, 0x2f, 0, 0xffff },
++	{ 0x080, 0x00, 0, 0xffff },
++	{ 0x081, 0x00, 0, 0xffff },
++	{ 0x083, 0xbb, 0, 0xffff },
++	{ 0x085, 0x66, 0, 0x0020 },
++	{ 0x085, 0x5d, 0, 0x0010 },
++	{ 0x086, 0x1c, 0, 0xffff },
++	{ 0x08a, 0x39, 0, 0x0020 },
++	{ 0x08a, 0x41, 0, 0x0010 },
++	{ 0x08b, 0x76, 0, 0x0020 },
++	{ 0x08b, 0x80, 0, 0x0010 },
++	{ 0x090, 0x5d, 0, 0x0020 },
++	{ 0x090, 0x5e, 0, 0x0010 },
++	{ 0x091, 0x5e, 0, 0xffff },
++	{ 0x092, 0x86, 0, 0xffff },
++	{ 0x096, 0xa4, 0, 0xffff },
++	{ 0x097, 0xa4, 0, 0xffff },
++	{ 0x098, 0xa3, 0, 0x0020 },
++	{ 0x098, 0xa4, 0, 0x0010 },
++	{ 0x09b, 0xa4, 0, 0xffff },
++	{ 0x0a0, 0x08, 0, 0xffff },
++	{ 0x0a1, 0x0a, 0, 0xffff },
++	{ 0x0ae, 0x7c, 0, 0xffff },
++	{ 0x0af, 0x7c, 0, 0xffff },
++	{ 0x0b0, 0x9a, 0, 0xffff },
++	{ 0x0b3, 0x7c, 0, 0xffff },
++	{ 0x0b6, 0x08, 0, 0xffff },
++	{ 0x0b7, 0x08, 0, 0xffff },
++	{ 0x0ea, 0x64, 0, 0x0020 },
++	{ 0x0ea, 0x5c, 0, 0x0010 },
++	{ 0x0ef, 0xff, 0, 0xffff },
++	{ 0x0f8, 0x15, 0, 0xffff },
++	{ 0x0f9, 0x00, 0, 0xffff },
++	{ 0x0f0, 0x30, 0, 0xffff },
++	{ 0x0fd, 0x01, 0, 0xffff },
++	{ 0x1a1, 0x00, 0, 0xffff },
++	{ 0x1a2, 0x00, 0, 0xffff },
++	{ 0x1b1, 0x08, 0, 0xffff },
++	{ 0x1be, 0x98, 0, 0x0020 },
++	{ 0x1be, 0x90, 0, 0x0010 },
++	{ 0x280, 0x94, 0, 0x0020 },
++	{ 0x281, 0x11, 0, 0x0020 },
++	{ 0x280, 0x94, 0, 0x0010 },
++	{ 0x281, 0x11, 0, 0x0010 },
++	{ 0x282, 0x03, 0, 0xffff },
++	{ 0x283, 0x0a, 0, 0xffff },
++	{ 0x284, 0x80, 0, 0xffff },
++	{ 0x285, 0x03, 0, 0xffff },
++	{ 0x288, 0x28, 0, 0x0020 },
++	{ 0x289, 0x0a, 0, 0x0020 },
++	{ 0x288, 0x28, 0, 0x0010 },
++	{ 0x289, 0x0a, 0, 0x0010 },
++	{ 0x28a, 0x03, 0, 0xffff },
++	{ 0x28b, 0x0a, 0, 0xffff },
++	{ 0x28c, 0x80, 0, 0xffff },
++	{ 0x28d, 0x03, 0, 0xffff },
++};
++
++struct hwm_tab_entry HWM_TAB6[] = {
++	{ 0x005, 0x33, 0, 0xffff },
++	{ 0x018, 0x2f, 0, 0xffff },
++	{ 0x019, 0x2f, 0, 0xffff },
++	{ 0x01a, 0x2f, 0, 0xffff },
++	{ 0x080, 0x00, 0, 0xffff },
++	{ 0x081, 0x00, 0, 0xffff },
++	{ 0x083, 0xbb, 0, 0xffff },
++	{ 0x085, 0x98, 0, 0xffff },
++	{ 0x086, 0x3c, 0, 0xffff },
++	{ 0x08a, 0x39, 0, 0x0020 },
++	{ 0x08a, 0x3d, 0, 0x0010 },
++	{ 0x08b, 0x44, 0, 0x0020 },
++	{ 0x08b, 0x51, 0, 0x0010 },
++	{ 0x090, 0x61, 0, 0xffff },
++	{ 0x091, 0x6d, 0, 0xffff },
++	{ 0x092, 0x86, 0, 0xffff },
++	{ 0x096, 0xa4, 0, 0xffff },
++	{ 0x097, 0xa4, 0, 0xffff },
++	{ 0x098, 0x9f, 0, 0x0020 },
++	{ 0x098, 0xa4, 0, 0x0010 },
++	{ 0x09b, 0xa4, 0, 0xffff },
++	{ 0x0a0, 0x0e, 0, 0xffff },
++	{ 0x0a1, 0x0e, 0, 0xffff },
++	{ 0x0ae, 0x7c, 0, 0xffff },
++	{ 0x0af, 0x7c, 0, 0xffff },
++	{ 0x0b0, 0x9b, 0, 0x0020 },
++	{ 0x0b0, 0x98, 0, 0x0010 },
++	{ 0x0b3, 0x9a, 0, 0xffff },
++	{ 0x0b6, 0x08, 0, 0xffff },
++	{ 0x0b7, 0x08, 0, 0xffff },
++	{ 0x0ea, 0x64, 0, 0x0020 },
++	{ 0x0ea, 0x5c, 0, 0x0010 },
++	{ 0x0ef, 0xff, 0, 0xffff },
++	{ 0x0f8, 0x15, 0, 0xffff },
++	{ 0x0f9, 0x00, 0, 0xffff },
++	{ 0x0f0, 0x30, 0, 0xffff },
++	{ 0x0fd, 0x01, 0, 0xffff },
++	{ 0x1a1, 0x00, 0, 0xffff },
++	{ 0x1a2, 0x00, 0, 0xffff },
++	{ 0x1b1, 0x08, 0, 0xffff },
++	{ 0x1be, 0x9a, 0, 0x0020 },
++	{ 0x1be, 0x96, 0, 0x0010 },
++	{ 0x280, 0x94, 0, 0x0020 },
++	{ 0x281, 0x11, 0, 0x0020 },
++	{ 0x280, 0x94, 0, 0x0010 },
++	{ 0x281, 0x11, 0, 0x0010 },
++	{ 0x282, 0x03, 0, 0xffff },
++	{ 0x283, 0x0a, 0, 0xffff },
++	{ 0x284, 0x80, 0, 0xffff },
++	{ 0x285, 0x03, 0, 0xffff },
++	{ 0x288, 0x94, 0, 0x0020 },
++	{ 0x289, 0x11, 0, 0x0020 },
++	{ 0x288, 0x94, 0, 0x0010 },
++	{ 0x289, 0x11, 0, 0x0010 },
++	{ 0x28a, 0x03, 0, 0xffff },
++	{ 0x28b, 0x0a, 0, 0xffff },
++	{ 0x28c, 0x80, 0, 0xffff },
++	{ 0x28d, 0x03, 0, 0xffff },
++};
++
++static uint8_t get_chassis_type(void)
++{
++	uint8_t gpio_chassis_type;
++
++	// Read chassis type from GPIO
++	gpio_chassis_type = get_gpio(70) << 3 | get_gpio(38) << 2 |
++			    get_gpio(17) << 1 | get_gpio(0);
++
++	printk(BIOS_DEBUG, "GPIO chassis type = %#x\n", gpio_chassis_type);
++
++	// Turn it into internal chassis index
++	switch (gpio_chassis_type) {
++	case 0x08:
++	case 0x0a:
++		return 4;
++	case 0x0b:
++		return 3;
++	case 0x0c:
++		return 5;
++	case 0x0d: // SFF
++	case 0x0e:
++	case 0x0f:
++		return 6;
++	default:
++		die("Unknown GPIO chassis type\n");
++	}
++
++}
++
++static uint8_t get_temp_target(void)
++{
++	uint8_t val = rdmsr(0x1a2).lo >> 8 & 0xff;
++	if (!val)
++		val = 20;
++	return 0x95 - val;
++}
++
++static uint16_t get_pkg_power(void)
++{
++	uint8_t rapl_power_unit = rdmsr(0x606).lo & 0xf;
++	if (rapl_power_unit)
++		rapl_power_unit = 2 << (rapl_power_unit - 1);
++	uint16_t pkg_power_info = rdmsr(0x614).lo & 0x7fff;
++	if (pkg_power_info / rapl_power_unit > 0x41)
++		return 32;
++	else
++		return 16;
++}
++
++static void apply_hwm_tab(struct hwm_tab_entry *arr, size_t size)
++{
++	uint8_t temp_target = get_temp_target();
++	uint16_t pkg_power = get_pkg_power();
++
++	printk(BIOS_DEBUG, "Temp target = %#x\n", temp_target);
++	printk(BIOS_DEBUG, "Package power = %#x\n", pkg_power);
++
++	for (size_t i = 0; i < size; ++i) {
++		// Skip entry if it doesn't apply for this package power
++		if (arr[i].pkg_power != pkg_power &&
++		    arr[i].pkg_power != HWM_TAB_PKG_POWER_ANY)
++			continue;
++
++		uint8_t val = arr[i].val;
++
++		// Add temp target to value if requested (current tables never do)
++		if (arr[i].flags & HWM_TAB_ADD_TEMP_TARGET)
++			val += temp_target;
++
++		// Perform write
++		ec_write(1, arr[i].addr, val);
++
++	}
++}
++
++static void sch5555_ec_hwm_init(void *arg)
++{
++	uint8_t chassis_type, saved_2fc;
++
++	printk(BIOS_DEBUG, "OptiPlex 9020 late HWM init\n");
++
++	saved_2fc = ec_read(1, 0x2fc);
++	ec_write(1, 0x2fc, 0xa0);
++	ec_write(1, 0x2fd, 0x32);
++
++	// Apply HWM table based on chassis type
++	chassis_type = get_chassis_type();
++	printk(BIOS_DEBUG, "Chassis type = %#x\n", chassis_type);
++	switch (chassis_type) {
++	case 3:
++		apply_hwm_tab(HWM_TAB3, ARRAY_SIZE(HWM_TAB3));
++		break;
++	case 4:
++		apply_hwm_tab(HWM_TAB4, ARRAY_SIZE(HWM_TAB4));
++		break;
++	case 5:
++		apply_hwm_tab(HWM_TAB5, ARRAY_SIZE(HWM_TAB5));
++		break;
++	case 6:
++		apply_hwm_tab(HWM_TAB6, ARRAY_SIZE(HWM_TAB6));
++		break;
++	default:
++		die("Unknown chassis type\n");
++	}
++
++	if (CONFIG_MAX_CPUS > 2) {
++		ec_write(1, 0x9e, 0x30);
++		ec_write(1, 0xeb, ec_read(1, 0xea));
++	}
++
++	ec_write(1, 0x2fc, saved_2fc);
++
++	// Apply full speed fan config if requested
++	if (get_uint_option("fan_full_speed", 0)) {
++		printk(BIOS_DEBUG, "Setting full fan speed\n");
++		ec_write(1, 0x80, 0x60 | ec_read(1, 0x80));
++		ec_write(1, 0x81, 0x60 | ec_read(1, 0x81));
++	}
++
++	ec_read(1, 0xb8);
++
++	if ((chassis_type == 4 || chassis_type == 5) && ec_read(1, 0x26) == 0) {
++		ec_write(1, 0xa0, ec_read(1, 0xa0) & 0xfb);
++		ec_write(1, 0xa1, ec_read(1, 0xa1) & 0xfb);
++		ec_write(1, 0xa2, ec_read(1, 0xa2) & 0xfb);
++		ec_write(1, 0x8a, 0x99);
++		ec_write(1, 0x8b, 0x47);
++		ec_write(1, 0x8c, 0x91);
++	}
++}
++
++BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL);
+diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.c b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
+new file mode 100644
+index 0000000000..92244da9ab
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
+@@ -0,0 +1,54 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <arch/io.h>
++#include <device/pnp_ops.h>
++#include <superio/smsc/sch555x/sch555x.h>
++#include "sch5555_ec.h"
++
++uint8_t ec_read(uint8_t addr1, uint16_t addr2)
++{
++	// clear ec-to-host mailbox
++	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
++	outb(tmp, SCH555x_EMI_IOBASE + 1);
++
++	// send address
++	outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
++	outw((addr1 * 2) | 0x100, SCH555x_EMI_IOBASE + 4);
++
++	outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
++	outl(addr2 << 16, SCH555x_EMI_IOBASE + 4);
++
++	// send message to ec
++	outb(1, SCH555x_EMI_IOBASE);
++
++	// wait for ack
++	for (size_t timeout = 0; timeout < 0xfff; ++timeout)
++		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
++			break;
++
++	// read result
++	outw(4 | 0x8000, SCH555x_EMI_IOBASE + 2);
++	return inb(SCH555x_EMI_IOBASE + 4);
++}
++
++void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val)
++{
++	// clear ec-to-host mailbox
++	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
++	outb(tmp, SCH555x_EMI_IOBASE + 1);
++
++	// send address and value
++	outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
++	outw((addr1 * 2) | 0x101, SCH555x_EMI_IOBASE + 4);
++
++	outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
++	outl(val | (addr2 << 16), SCH555x_EMI_IOBASE + 4);
++
++	// send message to ec
++	outb(1, SCH555x_EMI_IOBASE);
++
++	// wait for ack
++	for (size_t timeout = 0; timeout < 0xfff; ++timeout)
++		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
++			break;
++}
+diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.h b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
+new file mode 100644
+index 0000000000..6e703ff865
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
+@@ -0,0 +1,7 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#pragma once
++
++uint8_t ec_read(uint8_t addr1, uint16_t addr2);
++
++void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val);
+-- 
+2.39.2
+

From 9e3b217cfdce5e32c6c6d6e1c79786555ee4eb1c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 20 Apr 2024 21:50:56 +0100
Subject: [PATCH 0246/1549] update coreboot/haswell (NRI)

the t440p/w541 configs were re-done from scratch, because
the coreboot revisions are nearly two years apart.

i also added corebootfb configs.

hell updated their patchset. this patchset uses the following patch:

https://review.coreboot.org/c/coreboot/+/81948/1

it uses this, along with parent patches in the haswell nri patch series

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...-clamp.h-Add-more-clamping-functions.patch |  54 --
 ...=> 0001-haswell-NRI-Initialise-MPLL.patch} |  34 +-
 ...l-NRI-Post-process-selected-timings.patch} |  24 +-
 ...-Introduce-option-to-not-use-MRC.bin.patch | 143 ----
 ...l-NRI-Configure-initial-MC-settings.patch} |  32 +-
 ...aswell-lynxpoint-Add-native-DMI-init.patch | 615 --------------
 ...NRI-Add-timings-refresh-programming.patch} |  12 +-
 ...l-lynxpoint-Add-native-early-ME-init.patch | 148 ----
 ...0005-haswell-NRI-Program-memory-map.patch} |  16 +-
 ...-intel-lynxpoint-Add-native-USB-init.patch | 783 -----------------
 ...l-NRI-Add-DDR3-JEDEC-reset-and-init.patch} |  54 +-
 ...el-lynxpoint-Add-native-thermal-init.patch | 128 ---
 ...-haswell-NRI-Add-pre-training-steps.patch} |  34 +-
 ...-intel-lynxpoint-Add-native-PCH-init.patch | 785 ------------------
 ...swell-NRI-Add-REUT-I-O-test-library.patch} |  36 +-
 ...swell-Add-native-raminit-scaffolding.patch | 407 ---------
 ...well-NRI-Add-range-tracking-library.patch} |  12 +-
 ...-nri-Only-do-CPU-replacement-check-o.patch |  57 --
 ...l-NRI-Add-library-to-change-margins.patch} |  20 +-
 .../0010-haswell-NRI-Collect-SPD-info.patch   | 344 --------
 ...0011-haswell-NRI-Add-RcvEn-training.patch} |  16 +-
 ...-NRI-Add-function-to-change-margins.patch} |  12 +-
 ...3-haswell-NRI-Add-read-MPR-training.patch} |  29 +-
 ...0014-haswell-NRI-Add-write-leveling.patch} |  31 +-
 ...haswell-NRI-Add-final-raminit-steps.patch} |  26 +-
 ...Haswell-NRI-Implement-fast-boot-path.patch | 722 ++++++++++++++++
 ...I-Do-sense-amplifier-offset-training.patch | 476 +++++++++++
 ...r-coreboot-images-built-without-a-p.patch} |  19 +-
 ...-mirrorservice.org-for-gcc-downloads.patch |  36 +
 ...ool-add-nuke-flag-all-0xFF-on-region.patch | 204 +++++
 ...oreboot-haswell-fix-acpica-downloads.patch |  30 -
 ...-mirrorservice.org-for-gcc-downloads.patch |  36 -
 .../patches/0029-ifdtool-nuke-option.patch    | 194 -----
 config/coreboot/haswell/target.cfg            |   2 +-
 .../config/libgfxinit_corebootfb              | 668 +++++++++++++++
 .../config/libgfxinit_txtmode                 | 182 ++--
 .../w541_12mb/config/libgfxinit_corebootfb    | 667 +++++++++++++++
 .../w541_12mb/config/libgfxinit_txtmode       | 161 ++--
 38 files changed, 3164 insertions(+), 4085 deletions(-)
 delete mode 100644 config/coreboot/haswell/patches/0001-commonlib-clamp.h-Add-more-clamping-functions.patch
 rename config/coreboot/haswell/patches/{0011-haswell-NRI-Initialise-MPLL.patch => 0001-haswell-NRI-Initialise-MPLL.patch} (92%)
 rename config/coreboot/haswell/patches/{0012-haswell-NRI-Post-process-selected-timings.patch => 0002-haswell-NRI-Post-process-selected-timings.patch} (92%)
 delete mode 100644 config/coreboot/haswell/patches/0002-nb-intel-haswell-Introduce-option-to-not-use-MRC.bin.patch
 rename config/coreboot/haswell/patches/{0013-haswell-NRI-Configure-initial-MC-settings.patch => 0003-haswell-NRI-Configure-initial-MC-settings.patch} (98%)
 delete mode 100644 config/coreboot/haswell/patches/0003-haswell-lynxpoint-Add-native-DMI-init.patch
 rename config/coreboot/haswell/patches/{0014-haswell-NRI-Add-timings-refresh-programming.patch => 0004-haswell-NRI-Add-timings-refresh-programming.patch} (98%)
 delete mode 100644 config/coreboot/haswell/patches/0004-haswell-lynxpoint-Add-native-early-ME-init.patch
 rename config/coreboot/haswell/patches/{0015-haswell-NRI-Program-memory-map.patch => 0005-haswell-NRI-Program-memory-map.patch} (95%)
 delete mode 100644 config/coreboot/haswell/patches/0005-sb-intel-lynxpoint-Add-native-USB-init.patch
 rename config/coreboot/haswell/patches/{0016-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch => 0006-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch} (95%)
 delete mode 100644 config/coreboot/haswell/patches/0006-sb-intel-lynxpoint-Add-native-thermal-init.patch
 rename config/coreboot/haswell/patches/{0017-haswell-NRI-Add-pre-training-steps.patch => 0007-haswell-NRI-Add-pre-training-steps.patch} (93%)
 delete mode 100644 config/coreboot/haswell/patches/0007-sb-intel-lynxpoint-Add-native-PCH-init.patch
 rename config/coreboot/haswell/patches/{0018-haswell-NRI-Add-REUT-I-O-test-library.patch => 0008-haswell-NRI-Add-REUT-I-O-test-library.patch} (97%)
 delete mode 100644 config/coreboot/haswell/patches/0008-nb-intel-haswell-Add-native-raminit-scaffolding.patch
 rename config/coreboot/haswell/patches/{0019-haswell-NRI-Add-range-tracking-library.patch => 0009-haswell-NRI-Add-range-tracking-library.patch} (94%)
 delete mode 100644 config/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch
 rename config/coreboot/haswell/patches/{0020-haswell-NRI-Add-library-to-change-margins.patch => 0010-haswell-NRI-Add-library-to-change-margins.patch} (94%)
 delete mode 100644 config/coreboot/haswell/patches/0010-haswell-NRI-Collect-SPD-info.patch
 rename config/coreboot/haswell/patches/{0021-haswell-NRI-Add-RcvEn-training.patch => 0011-haswell-NRI-Add-RcvEn-training.patch} (98%)
 rename config/coreboot/haswell/patches/{0022-haswell-NRI-Add-function-to-change-margins.patch => 0012-haswell-NRI-Add-function-to-change-margins.patch} (96%)
 rename config/coreboot/haswell/patches/{0023-haswell-NRI-Add-read-MPR-training.patch => 0013-haswell-NRI-Add-read-MPR-training.patch} (93%)
 rename config/coreboot/haswell/patches/{0024-haswell-NRI-Add-write-leveling.patch => 0014-haswell-NRI-Add-write-leveling.patch} (96%)
 rename config/coreboot/haswell/patches/{0025-haswell-NRI-Add-final-raminit-steps.patch => 0015-haswell-NRI-Add-final-raminit-steps.patch} (96%)
 create mode 100644 config/coreboot/haswell/patches/0016-Haswell-NRI-Implement-fast-boot-path.patch
 create mode 100644 config/coreboot/haswell/patches/0017-haswell-NRI-Do-sense-amplifier-offset-training.patch
 rename config/coreboot/haswell/patches/{0026-Remove-warning-for-coreboot-images-built-without-a-p.patch => 0018-Remove-warning-for-coreboot-images-built-without-a-p.patch} (74%)
 create mode 100644 config/coreboot/haswell/patches/0019-use-mirrorservice.org-for-gcc-downloads.patch
 create mode 100644 config/coreboot/haswell/patches/0020-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
 delete mode 100644 config/coreboot/haswell/patches/0027-coreboot-haswell-fix-acpica-downloads.patch
 delete mode 100644 config/coreboot/haswell/patches/0028-use-mirrorservice.org-for-gcc-downloads.patch
 delete mode 100644 config/coreboot/haswell/patches/0029-ifdtool-nuke-option.patch
 create mode 100644 config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/w541_12mb/config/libgfxinit_corebootfb

diff --git a/config/coreboot/haswell/patches/0001-commonlib-clamp.h-Add-more-clamping-functions.patch b/config/coreboot/haswell/patches/0001-commonlib-clamp.h-Add-more-clamping-functions.patch
deleted file mode 100644
index 96e4c14d..00000000
--- a/config/coreboot/haswell/patches/0001-commonlib-clamp.h-Add-more-clamping-functions.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From dd58f5e9108bc596c93071705d2b53233d13ade6 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sat, 7 May 2022 20:36:10 +0200
-Subject: [PATCH 01/26] commonlib/clamp.h: Add more clamping functions
-
-Add more clamping functions that work with different types.
-
-Change-Id: I14cf335d5a54f769f8fd9184450957e876affd6b
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- src/commonlib/include/commonlib/clamp.h | 26 +++++++++++++++++--------
- 1 file changed, 18 insertions(+), 8 deletions(-)
-
-diff --git a/src/commonlib/include/commonlib/clamp.h b/src/commonlib/include/commonlib/clamp.h
-index e01a107ed4..526185195c 100644
---- a/src/commonlib/include/commonlib/clamp.h
-+++ b/src/commonlib/include/commonlib/clamp.h
-@@ -8,15 +8,25 @@
- /*
-  * Clamp a value, so that it is between a lower and an upper bound.
-  */
--static inline u32 clamp_u32(const u32 min, const u32 val, const u32 max)
--{
--	if (val > max)
--		return max;
-+#define __MAKE_CLAMP_FUNC(type) \
-+	static inline type clamp_##type(const type min, const type val, const type max) \
-+	{				\
-+		if (val > max)		\
-+			return max;	\
-+		if (val < min)		\
-+			return min;	\
-+		return val;		\
-+	}				\
- 
--	if (val < min)
--		return min;
-+__MAKE_CLAMP_FUNC(s8)	/* clamp_s8  */
-+__MAKE_CLAMP_FUNC(u8)	/* clamp_u8  */
-+__MAKE_CLAMP_FUNC(s16)	/* clamp_s16 */
-+__MAKE_CLAMP_FUNC(u16)	/* clamp_u16 */
-+__MAKE_CLAMP_FUNC(s32)	/* clamp_s32 */
-+__MAKE_CLAMP_FUNC(u32)	/* clamp_u32 */
-+__MAKE_CLAMP_FUNC(s64)	/* clamp_s64 */
-+__MAKE_CLAMP_FUNC(u64)	/* clamp_u64 */
- 
--	return val;
--}
-+#undef __MAKE_CLAMP_FUNC
- 
- #endif /* COMMONLIB_CLAMP_H */
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0011-haswell-NRI-Initialise-MPLL.patch b/config/coreboot/haswell/patches/0001-haswell-NRI-Initialise-MPLL.patch
similarity index 92%
rename from config/coreboot/haswell/patches/0011-haswell-NRI-Initialise-MPLL.patch
rename to config/coreboot/haswell/patches/0001-haswell-NRI-Initialise-MPLL.patch
index 1fec2e38..0de1a4ec 100644
--- a/config/coreboot/haswell/patches/0011-haswell-NRI-Initialise-MPLL.patch
+++ b/config/coreboot/haswell/patches/0001-haswell-NRI-Initialise-MPLL.patch
@@ -1,7 +1,7 @@
-From 77a89d55ab7a715dc20c34a6edacaaf781b56087 Mon Sep 17 00:00:00 2001
+From cce5392f272b0acc493f47f9b5ca3cf90ce901e8 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
-Date: Sat, 7 May 2022 14:36:10 +0200
-Subject: [PATCH 11/26] haswell NRI: Initialise MPLL
+Date: Thu, 11 Apr 2024 17:25:07 +0200
+Subject: [PATCH 01/20] haswell NRI: Initialise MPLL
 
 Add code to initialise the MPLL (Memory PLL). The procedure is similar
 to the one for Sandy/Ivy Bridge, but it is not worth factoring out.
@@ -9,20 +9,20 @@ to the one for Sandy/Ivy Bridge, but it is not worth factoring out.
 Change-Id: I978c352de68f6d8cecc76f4ae3c12daaf4be9ed6
 Signed-off-by: Angel Pons <th3fanbus@gmail.com>
 ---
- .../intel/haswell/native_raminit/Makefile.inc |   2 +
+ .../intel/haswell/native_raminit/Makefile.mk  |   2 +
  .../intel/haswell/native_raminit/init_mpll.c  | 210 ++++++++++++++++++
  .../haswell/native_raminit/io_comp_control.c  |  22 ++
- .../haswell/native_raminit/raminit_main.c     |   1 +
+ .../haswell/native_raminit/raminit_main.c     |   3 +-
  .../haswell/native_raminit/raminit_native.h   |  11 +
  .../intel/haswell/registers/mchbar.h          |   3 +
- 6 files changed, 249 insertions(+)
+ 6 files changed, 250 insertions(+), 1 deletion(-)
  create mode 100644 src/northbridge/intel/haswell/native_raminit/init_mpll.c
  create mode 100644 src/northbridge/intel/haswell/native_raminit/io_comp_control.c
 
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 index ebf7abc6ec..c125d84f0b 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+--- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
++++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 @@ -1,5 +1,7 @@
  ## SPDX-License-Identifier: GPL-2.0-or-later
  
@@ -33,13 +33,13 @@ index ebf7abc6ec..c125d84f0b 100644
  romstage-y += spd_bitmunching.c
 diff --git a/src/northbridge/intel/haswell/native_raminit/init_mpll.c b/src/northbridge/intel/haswell/native_raminit/init_mpll.c
 new file mode 100644
-index 0000000000..2faa183724
+index 0000000000..1f3f2c29a9
 --- /dev/null
 +++ b/src/northbridge/intel/haswell/native_raminit/init_mpll.c
 @@ -0,0 +1,210 @@
 +/* SPDX-License-Identifier: GPL-2.0-or-later */
 +
-+#include <commonlib/clamp.h>
++#include <commonlib/bsd/clamp.h>
 +#include <console/console.h>
 +#include <delay.h>
 +#include <device/pci_ops.h>
@@ -249,13 +249,13 @@ index 0000000000..2faa183724
 +}
 diff --git a/src/northbridge/intel/haswell/native_raminit/io_comp_control.c b/src/northbridge/intel/haswell/native_raminit/io_comp_control.c
 new file mode 100644
-index 0000000000..7e96c08938
+index 0000000000..d45b608dd3
 --- /dev/null
 +++ b/src/northbridge/intel/haswell/native_raminit/io_comp_control.c
 @@ -0,0 +1,22 @@
 +/* SPDX-License-Identifier: GPL-2.0-or-later */
 +
-+#include <commonlib/clamp.h>
++#include <commonlib/bsd/clamp.h>
 +#include <console/console.h>
 +#include <northbridge/intel/haswell/haswell.h>
 +#include <timer.h>
@@ -276,13 +276,15 @@ index 0000000000..7e96c08938
 +	return RAMINIT_STATUS_POLL_TIMEOUT;
 +}
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 2d2cfa48bb..09545422c0 100644
+index 19ec5859ac..bf745e943f 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -21,6 +21,7 @@ struct task_entry {
+@@ -19,7 +19,8 @@ struct task_entry {
+ };
  
  static const struct task_entry cold_boot[] = {
- 	{ collect_spd_info,                                       true, "PROCSPD",    },
+-	{ collect_spd_info,           true, "PROCSPD",    },
++	{ collect_spd_info,                                       true, "PROCSPD",    },
 +	{ initialise_mpll,                                        true, "INITMPLL",   },
  };
  
diff --git a/config/coreboot/haswell/patches/0012-haswell-NRI-Post-process-selected-timings.patch b/config/coreboot/haswell/patches/0002-haswell-NRI-Post-process-selected-timings.patch
similarity index 92%
rename from config/coreboot/haswell/patches/0012-haswell-NRI-Post-process-selected-timings.patch
rename to config/coreboot/haswell/patches/0002-haswell-NRI-Post-process-selected-timings.patch
index e38f8e57..0cc95cdd 100644
--- a/config/coreboot/haswell/patches/0012-haswell-NRI-Post-process-selected-timings.patch
+++ b/config/coreboot/haswell/patches/0002-haswell-NRI-Post-process-selected-timings.patch
@@ -1,7 +1,7 @@
-From faabed9ca8974b2e7192c55b59a9d28d75e72df6 Mon Sep 17 00:00:00 2001
+From 42b21fdce8c8bade53d9d86515f88b0665a4c1b1 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 16:29:55 +0200
-Subject: [PATCH 12/26] haswell NRI: Post-process selected timings
+Subject: [PATCH 02/20] haswell NRI: Post-process selected timings
 
 Once the MPLL has been initialised, convert the timings from the SPD to
 be in DCLKs, which is what the hardware expects. In addition, calculate
@@ -10,7 +10,7 @@ the values for tREFI and tXP.
 Change-Id: Id02caf858f75b9e08016762b3aefda282b274386
 Signed-off-by: Angel Pons <th3fanbus@gmail.com>
 ---
- .../intel/haswell/native_raminit/Makefile.inc |   1 +
+ .../intel/haswell/native_raminit/Makefile.mk  |   1 +
  .../haswell/native_raminit/lookup_timings.c   |  62 +++++++++++
  .../haswell/native_raminit/raminit_main.c     |   1 +
  .../haswell/native_raminit/raminit_native.h   |   8 ++
@@ -18,10 +18,10 @@ Signed-off-by: Angel Pons <th3fanbus@gmail.com>
  5 files changed, 172 insertions(+)
  create mode 100644 src/northbridge/intel/haswell/native_raminit/lookup_timings.c
 
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 index c125d84f0b..2769e0bbb4 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+--- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
++++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 @@ -1,5 +1,6 @@
  ## SPDX-License-Identifier: GPL-2.0-or-later
  
@@ -31,13 +31,13 @@ index c125d84f0b..2769e0bbb4 100644
  romstage-y += raminit_main.c
 diff --git a/src/northbridge/intel/haswell/native_raminit/lookup_timings.c b/src/northbridge/intel/haswell/native_raminit/lookup_timings.c
 new file mode 100644
-index 0000000000..038686c844
+index 0000000000..8b81c7c341
 --- /dev/null
 +++ b/src/northbridge/intel/haswell/native_raminit/lookup_timings.c
 @@ -0,0 +1,62 @@
 +/* SPDX-License-Identifier: GPL-2.0-or-later */
 +
-+#include <commonlib/clamp.h>
++#include <commonlib/bsd/clamp.h>
 +#include <types.h>
 +
 +#include "raminit_native.h"
@@ -98,10 +98,10 @@ index 0000000000..038686c844
 +	return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut));
 +}
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 09545422c0..5f2be980d4 100644
+index bf745e943f..2fea658415 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -22,6 +22,7 @@ struct task_entry {
+@@ -21,6 +21,7 @@ struct task_entry {
  static const struct task_entry cold_boot[] = {
  	{ collect_spd_info,                                       true, "PROCSPD",    },
  	{ initialise_mpll,                                        true, "INITMPLL",   },
@@ -137,7 +137,7 @@ index a54581abc7..01e5ed1bd6 100644
 +
  #endif
 diff --git a/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c b/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c
-index dbe02c72d0..becbea0725 100644
+index 2dab8504c4..7d98341a7e 100644
 --- a/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c
 +++ b/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c
 @@ -204,3 +204,103 @@ enum raminit_status collect_spd_info(struct sysinfo *ctrl)
@@ -221,7 +221,7 @@ index dbe02c72d0..becbea0725 100644
 +	 */
 +
 +	/* tCK is special */
-+	printk(BIOS_DEBUG, "Selected tCK          : %u ns\n", ctrl->tCK / 256);
++	printk(BIOS_DEBUG, "Selected tCK          : %u ps\n", ctrl->tCK * 1000 / 256);
 +
 +	/* Primary timings */
 +	printk(BIOS_DEBUG, "Selected tAA          : %uT\n", ctrl->tAA);
diff --git a/config/coreboot/haswell/patches/0002-nb-intel-haswell-Introduce-option-to-not-use-MRC.bin.patch b/config/coreboot/haswell/patches/0002-nb-intel-haswell-Introduce-option-to-not-use-MRC.bin.patch
deleted file mode 100644
index 35d5c89e..00000000
--- a/config/coreboot/haswell/patches/0002-nb-intel-haswell-Introduce-option-to-not-use-MRC.bin.patch
+++ /dev/null
@@ -1,143 +0,0 @@
-From c07391821c32cafea950574b85468f5b3284b6df Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Fri, 6 May 2022 21:12:14 +0200
-Subject: [PATCH 02/26] nb/intel/haswell: Introduce option to not use MRC.bin
-
-Introduce the `USE_NATIVE_RAMINIT` Kconfig option, which should allow
-booting coreboot on Haswell mainboards without the need of the closed
-source MRC.bin. For now, this option does not work at all; the needed
-magic will be implemented in subsequent commits. Add a config file to
-make sure the newly-introduced option gets build-tested.
-
-Change-Id: I46c77586f9b5771624082e07c60c205e578edd8e
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- configs/config.asrock_b85m_pro4.native_raminit    |  5 +++++
- src/northbridge/intel/haswell/Kconfig             | 13 +++++++++++++
- src/northbridge/intel/haswell/Makefile.inc        |  7 ++++++-
- .../intel/haswell/native_raminit/Makefile.inc     |  3 +++
- .../intel/haswell/native_raminit/raminit_native.c | 15 +++++++++++++++
- 5 files changed, 42 insertions(+), 1 deletion(-)
- create mode 100644 configs/config.asrock_b85m_pro4.native_raminit
- create mode 100644 src/northbridge/intel/haswell/native_raminit/Makefile.inc
- create mode 100644 src/northbridge/intel/haswell/native_raminit/raminit_native.c
-
-diff --git a/configs/config.asrock_b85m_pro4.native_raminit b/configs/config.asrock_b85m_pro4.native_raminit
-new file mode 100644
-index 0000000000..2de538926f
---- /dev/null
-+++ b/configs/config.asrock_b85m_pro4.native_raminit
-@@ -0,0 +1,5 @@
-+# Configuration used to build-test native raminit
-+CONFIG_VENDOR_ASROCK=y
-+CONFIG_BOARD_ASROCK_B85M_PRO4=y
-+CONFIG_USE_NATIVE_RAMINIT=y
-+CONFIG_DEBUG_RAM_SETUP=y
-diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
-index 50acb09a91..b659bf6d98 100644
---- a/src/northbridge/intel/haswell/Kconfig
-+++ b/src/northbridge/intel/haswell/Kconfig
-@@ -9,6 +9,14 @@ config NORTHBRIDGE_INTEL_HASWELL
- 
- if NORTHBRIDGE_INTEL_HASWELL
- 
-+config USE_NATIVE_RAMINIT
-+	bool "[NOT WORKING] Use native raminit"
-+	default n
-+	select HAVE_DEBUG_RAM_SETUP
-+	help
-+	  Select if you want to use coreboot implementation of raminit rather than
-+	  MRC.bin. Currently incomplete and does not boot.
-+
- config HASWELL_VBOOT_IN_BOOTBLOCK
- 	depends on VBOOT
- 	bool "Start verstage in bootblock"
-@@ -45,6 +53,7 @@ config DCACHE_RAM_BASE
- 
- config DCACHE_RAM_SIZE
- 	hex
-+	default 0x40000 if USE_NATIVE_RAMINIT
- 	default 0x10000
- 	help
- 	  The size of the cache-as-ram region required during bootblock
-@@ -53,12 +62,14 @@ config DCACHE_RAM_SIZE
- 
- config DCACHE_RAM_MRC_VAR_SIZE
- 	hex
-+	default 0x0 if USE_NATIVE_RAMINIT
- 	default 0x30000
- 	help
- 	  The amount of cache-as-ram region required by the reference code.
- 
- config DCACHE_BSP_STACK_SIZE
- 	hex
-+	default 0x20000 if USE_NATIVE_RAMINIT
- 	default 0x2000
- 	help
- 	  The amount of anticipated stack usage in CAR by bootblock and
-@@ -66,6 +77,7 @@ config DCACHE_BSP_STACK_SIZE
- 
- config HAVE_MRC
- 	bool "Add a System Agent binary"
-+	depends on !USE_NATIVE_RAMINIT
- 	help
- 	  Select this option to add a System Agent binary to
- 	  the resulting coreboot image.
-@@ -82,6 +94,7 @@ config MRC_FILE
- 
- config HASWELL_HIDE_PEG_FROM_MRC
- 	bool "Hide PEG devices from MRC to work around hardcoded MRC behavior"
-+	depends on !USE_NATIVE_RAMINIT
- 	default y
- 	help
- 	  If set, hides all PEG devices from MRC. This allows the iGPU
-diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc
-index 2d1532be05..329f1f7ffe 100644
---- a/src/northbridge/intel/haswell/Makefile.inc
-+++ b/src/northbridge/intel/haswell/Makefile.inc
-@@ -19,6 +19,11 @@ romstage-y += report_platform.c
- 
- postcar-y += memmap.c
- 
--subdirs-y += haswell_mrc
-+ifeq ($(CONFIG_USE_NATIVE_RAMINIT),y)
-+subdirs-y  += native_raminit
-+
-+else
-+subdirs-y  += haswell_mrc
-+endif
- 
- endif
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-new file mode 100644
-index 0000000000..8cfb4fb33e
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-@@ -0,0 +1,3 @@
-+## SPDX-License-Identifier: GPL-2.0-or-later
-+
-+romstage-y += raminit_native.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-new file mode 100644
-index 0000000000..1aafdf8659
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-@@ -0,0 +1,15 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <console/console.h>
-+#include <northbridge/intel/haswell/raminit.h>
-+
-+void perform_raminit(const int s3resume)
-+{
-+	/*
-+	 * See, this function's name is a lie. There are more things to
-+	 * do that memory initialisation, but they are relatively easy.
-+	 */
-+
-+	/** TODO: Implement the required magic **/
-+	die("NATIVE RAMINIT: More Magic (tm) required.\n");
-+}
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0013-haswell-NRI-Configure-initial-MC-settings.patch b/config/coreboot/haswell/patches/0003-haswell-NRI-Configure-initial-MC-settings.patch
similarity index 98%
rename from config/coreboot/haswell/patches/0013-haswell-NRI-Configure-initial-MC-settings.patch
rename to config/coreboot/haswell/patches/0003-haswell-NRI-Configure-initial-MC-settings.patch
index b1c33328..f44eb029 100644
--- a/config/coreboot/haswell/patches/0013-haswell-NRI-Configure-initial-MC-settings.patch
+++ b/config/coreboot/haswell/patches/0003-haswell-NRI-Configure-initial-MC-settings.patch
@@ -1,7 +1,7 @@
-From 1b0b17d85256193de825fa7ff0e04767c818f2fc Mon Sep 17 00:00:00 2001
+From 574f4965976b56f98a825dea71e919fefb2c8547 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 17:22:07 +0200
-Subject: [PATCH 13/26] haswell NRI: Configure initial MC settings
+Subject: [PATCH 03/20] haswell NRI: Configure initial MC settings
 
 Program initial memory controller settings. Many of these values will be
 adjusted later during training.
@@ -9,7 +9,7 @@ adjusted later during training.
 Change-Id: If33846b51cb1bab5d0458fe626e13afb1bdc900e
 Signed-off-by: Angel Pons <th3fanbus@gmail.com>
 ---
- .../intel/haswell/native_raminit/Makefile.inc |   2 +
+ .../intel/haswell/native_raminit/Makefile.mk  |   2 +
  .../haswell/native_raminit/configure_mc.c     | 822 ++++++++++++++++++
  .../haswell/native_raminit/raminit_main.c     |   2 +
  .../haswell/native_raminit/raminit_native.h   | 101 +++
@@ -21,10 +21,10 @@ Signed-off-by: Angel Pons <th3fanbus@gmail.com>
  create mode 100644 src/northbridge/intel/haswell/native_raminit/reg_structs.h
  create mode 100644 src/northbridge/intel/haswell/native_raminit/timings_refresh.c
 
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 index 2769e0bbb4..fc55277a65 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+--- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
++++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 @@ -1,8 +1,10 @@
  ## SPDX-License-Identifier: GPL-2.0-or-later
  
@@ -38,14 +38,14 @@ index 2769e0bbb4..fc55277a65 100644
 +romstage-y += timings_refresh.c
 diff --git a/src/northbridge/intel/haswell/native_raminit/configure_mc.c b/src/northbridge/intel/haswell/native_raminit/configure_mc.c
 new file mode 100644
-index 0000000000..2a667b075b
+index 0000000000..88249725a7
 --- /dev/null
 +++ b/src/northbridge/intel/haswell/native_raminit/configure_mc.c
 @@ -0,0 +1,822 @@
 +/* SPDX-License-Identifier: GPL-2.0-or-later */
 +
 +#include <assert.h>
-+#include <commonlib/clamp.h>
++#include <commonlib/bsd/clamp.h>
 +#include <console/console.h>
 +#include <delay.h>
 +#include <lib.h>
@@ -131,22 +131,22 @@ index 0000000000..2a667b075b
 +
 +static const uint8_t rxb_trad[2][5][4] = {
 +	{	/* Vdd low */
-+		/*  1067 MHz,     1333 MHz,     1600 MHz,     1867 MHz,     2133 MHz, */
++		/* 1067 MT/s,    1333 MT/s,    1600 MT/s,    1867 MT/s,    2133 MT/s, */
 +		{4, 3, 3, 2}, {4, 4, 3, 2}, {5, 4, 3, 3}, {5, 4, 4, 3}, {5, 4, 4, 3},
 +	},
 +	{	/* Vdd hi */
-+		/*  1067 MHz,     1333 MHz,     1600 MHz,     1867 MHz,     2133 MHz, */
++		/* 1067 MT/s,    1333 MT/s,    1600 MT/s,    1867 MT/s,    2133 MT/s, */
 +		{4, 3, 3, 2}, {4, 4, 3, 2}, {5, 4, 3, 3}, {5, 4, 4, 3}, {4, 4, 3, 3},
 +	},
 +};
 +
 +static const uint8_t rxb_ultx[2][3][4] = {
 +	{	/* Vdd low */
-+		/*  1067 MHz,     1333 MHz,     1600 MHz, */
++		/* 1067 MT/s,    1333 MT/s,    1600 MT/s, */
 +		{5, 6, 6, 5}, {5, 6, 6, 5}, {4, 6, 6, 6},
 +	},
 +	{	/* Vdd hi */
-+		/*  1067 MHz,     1333 MHz,     1600 MHz, */
++		/* 1067 MT/s,    1333 MT/s,    1600 MT/s, */
 +		{7, 6, 6, 5}, {7, 6, 6, 5}, {7, 6, 6, 6},
 +	},
 +};
@@ -277,7 +277,7 @@ index 0000000000..2a667b075b
 +	const int16_t coding[] = {0, -125, -62, -31, 250, 125, 62, 31};
 +	*best_a = 0;
 +	*best_b = 0;
-+	int16_t	best_err = slope;
++	int16_t best_err = slope;
 +	for (uint8_t b = 0; b < ARRAY_SIZE(coding); b++) {
 +		for (uint8_t a = b; a < ARRAY_SIZE(coding); a++) {
 +			int16_t	error = slope - (coding[a] + coding[b]);
@@ -865,10 +865,10 @@ index 0000000000..2a667b075b
 +	return RAMINIT_STATUS_SUCCESS;
 +}
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 5f2be980d4..3a773cfa19 100644
+index 2fea658415..fcc981ad04 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -23,6 +23,7 @@ static const struct task_entry cold_boot[] = {
+@@ -22,6 +22,7 @@ static const struct task_entry cold_boot[] = {
  	{ collect_spd_info,                                       true, "PROCSPD",    },
  	{ initialise_mpll,                                        true, "INITMPLL",   },
  	{ convert_timings,                                        true, "CONVTIM",    },
@@ -876,7 +876,7 @@ index 5f2be980d4..3a773cfa19 100644
  };
  
  /* Return a generic stepping value to make stepping checks simpler */
-@@ -54,6 +55,7 @@ static void initialize_ctrl(struct sysinfo *ctrl)
+@@ -53,6 +54,7 @@ static void initialize_ctrl(struct sysinfo *ctrl)
  
  	ctrl->cpu = cpu_get_cpuid();
  	ctrl->stepping = get_stepping(ctrl->cpu);
diff --git a/config/coreboot/haswell/patches/0003-haswell-lynxpoint-Add-native-DMI-init.patch b/config/coreboot/haswell/patches/0003-haswell-lynxpoint-Add-native-DMI-init.patch
deleted file mode 100644
index 4e70407c..00000000
--- a/config/coreboot/haswell/patches/0003-haswell-lynxpoint-Add-native-DMI-init.patch
+++ /dev/null
@@ -1,615 +0,0 @@
-From 6ec71c6df97eded010e96c4ea2bd37cc6a13849d Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Fri, 6 May 2022 21:56:48 +0200
-Subject: [PATCH 03/26] haswell/lynxpoint: Add native DMI init
-
-Implement native DMI init for Haswell and Lynx Point. This is only
-needed on non-ULT platforms, and only when MRC.bin is not used.
-
-TEST=Verify DMI initialises correctly on Asrock B85M Pro4.
-
-Change-Id: I5fb1a2adc4ffbf0ebbf0d2d3a444055c53765faa
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- src/northbridge/intel/haswell/Makefile.inc    |   1 +
- src/northbridge/intel/haswell/early_dmi.c     |  96 ++++++++++++
- src/northbridge/intel/haswell/early_pcie.c    | 121 ++++++++++++++
- src/northbridge/intel/haswell/haswell.h       |   3 +
- .../haswell/native_raminit/raminit_native.c   |  15 ++
- src/northbridge/intel/haswell/vcu_mailbox.c   | 147 ++++++++++++++++++
- src/northbridge/intel/haswell/vcu_mailbox.h   |  16 ++
- src/southbridge/intel/lynxpoint/Makefile.inc  |   2 +
- .../intel/lynxpoint/early_pch_native.c        |  52 +++++++
- src/southbridge/intel/lynxpoint/pch.h         |  20 ++-
- 10 files changed, 472 insertions(+), 1 deletion(-)
- create mode 100644 src/northbridge/intel/haswell/early_dmi.c
- create mode 100644 src/northbridge/intel/haswell/early_pcie.c
- create mode 100644 src/northbridge/intel/haswell/vcu_mailbox.c
- create mode 100644 src/northbridge/intel/haswell/vcu_mailbox.h
- create mode 100644 src/southbridge/intel/lynxpoint/early_pch_native.c
-
-diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc
-index 329f1f7ffe..df0b097296 100644
---- a/src/northbridge/intel/haswell/Makefile.inc
-+++ b/src/northbridge/intel/haswell/Makefile.inc
-@@ -20,6 +20,7 @@ romstage-y += report_platform.c
- postcar-y += memmap.c
- 
- ifeq ($(CONFIG_USE_NATIVE_RAMINIT),y)
-+romstage-y += early_dmi.c early_pcie.c vcu_mailbox.c
- subdirs-y  += native_raminit
- 
- else
-diff --git a/src/northbridge/intel/haswell/early_dmi.c b/src/northbridge/intel/haswell/early_dmi.c
-new file mode 100644
-index 0000000000..9941242fd5
---- /dev/null
-+++ b/src/northbridge/intel/haswell/early_dmi.c
-@@ -0,0 +1,96 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <console/console.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <southbridge/intel/lynxpoint/pch.h>
-+#include <types.h>
-+
-+static void dmi_print_link_status(int loglevel)
-+{
-+	const uint16_t dmilsts = dmibar_read16(DMILSTS);
-+	printk(loglevel, "DMI: Running at Gen%u x%u\n", dmilsts & 0xf, dmilsts >> 4 & 0x1f);
-+}
-+
-+#define RETRAIN	(1 << 5)
-+
-+#define LTRN	(1 << 11)
-+
-+static void dmi_setup_physical_layer(void)
-+{
-+	/* Program DMI AFE settings, which are needed for DMI to work */
-+	peg_dmi_recipe(false, 0);
-+
-+	/* Additional DMI programming steps */
-+	dmibar_setbits32(0x258, 1 << 29);
-+	dmibar_clrsetbits32(0x208, 0x7ff, 0x6b5);
-+	dmibar_clrsetbits32(0x22c, 0xffff, 0x2020);
-+
-+	/* Write SA reference code version */
-+	dmibar_write32(0x71c, 0x0000000f);
-+	dmibar_write32(0x720, 0x01060200);
-+
-+	/* We also have to bring up the PCH side of the DMI link */
-+	pch_dmi_setup_physical_layer();
-+
-+	/* Write-once settings */
-+	dmibar_clrsetbits32(DMILCAP, 0x3f00f, 2 << 0);
-+
-+	printk(BIOS_DEBUG, "Retraining DMI at Gen2 speeds...\n");
-+	dmi_print_link_status(BIOS_DEBUG);
-+
-+	/* Retrain link */
-+	dmibar_setbits16(DMILCTL, RETRAIN);
-+	do {} while (dmibar_read16(DMILSTS) & LTRN);
-+	dmi_print_link_status(BIOS_DEBUG);
-+
-+	/* Retrain link again for DMI Gen2 speeds */
-+	dmibar_setbits16(DMILCTL, RETRAIN);
-+	do {} while (dmibar_read16(DMILSTS) & LTRN);
-+	dmi_print_link_status(BIOS_INFO);
-+}
-+
-+#define VC_ACTIVE	(1U << 31)
-+
-+#define VCNEGPND	(1 << 1)
-+
-+#define DMI_VC_CFG(vcid, tcmap)	(VC_ACTIVE | ((vcid) << 24) | (tcmap))
-+
-+static void dmi_tc_vc_mapping(void)
-+{
-+	printk(BIOS_DEBUG, "Programming SA  DMI VC/TC mappings...\n");
-+
-+	if (CONFIG(INTEL_LYNXPOINT_LP))
-+		dmibar_setbits8(0xa78, 1 << 1);
-+
-+	/* Each TC is mapped to one and only one VC */
-+	const u32 vc0 = DMI_VC_CFG(0, (1 << 6) | (1 << 5) | (1 << 4) | (1 << 3) | (1 << 0));
-+	const u32 vc1 = DMI_VC_CFG(1, (1 << 1));
-+	const u32 vcp = DMI_VC_CFG(2, (1 << 2));
-+	const u32 vcm = DMI_VC_CFG(7, (1 << 7));
-+	dmibar_write32(DMIVC0RCTL, vc0);
-+	dmibar_write32(DMIVC1RCTL, vc1);
-+	dmibar_write32(DMIVCPRCTL, vcp);
-+	dmibar_write32(DMIVCMRCTL, vcm);
-+
-+	/* Set Extended VC Count (EVCC) to 1 if VC1 is active */
-+	dmibar_clrsetbits8(DMIPVCCAP1, 7, !!(vc1 & VC_ACTIVE));
-+
-+	/*
-+	 * We also have to program the PCH side of the DMI link. Since both ends
-+	 * must use the same Virtual Channel settings, we pass them as arguments.
-+	 */
-+	pch_dmi_tc_vc_mapping(vc0, vc1, vcp, vcm);
-+
-+	printk(BIOS_DEBUG, "Waiting for SA  DMI VC negotiation... ");
-+	do {} while (dmibar_read16(DMIVC0RSTS) & VCNEGPND);
-+	do {} while (dmibar_read16(DMIVC1RSTS) & VCNEGPND);
-+	do {} while (dmibar_read16(DMIVCPRSTS) & VCNEGPND);
-+	do {} while (dmibar_read16(DMIVCMRSTS) & VCNEGPND);
-+	printk(BIOS_DEBUG, "done!\n");
-+}
-+
-+void dmi_early_init(void)
-+{
-+	dmi_setup_physical_layer();
-+	dmi_tc_vc_mapping();
-+}
-diff --git a/src/northbridge/intel/haswell/early_pcie.c b/src/northbridge/intel/haswell/early_pcie.c
-new file mode 100644
-index 0000000000..d3940e3fac
---- /dev/null
-+++ b/src/northbridge/intel/haswell/early_pcie.c
-@@ -0,0 +1,121 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <console/console.h>
-+#include <device/pci_def.h>
-+#include <device/pci_mmio_cfg.h>
-+#include <device/pci_ops.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <northbridge/intel/haswell/vcu_mailbox.h>
-+#include <types.h>
-+
-+#define PEG_DEV(func)		PCI_DEV(0, 1, func)
-+
-+#define MAX_PEG_FUNC		3
-+
-+static void peg_dmi_unset_and_set_mask_pcicfg(
-+	volatile union pci_bank *const bank,
-+	const uint32_t offset,
-+	const uint32_t unset_mask,
-+	const uint32_t set_mask,
-+	const uint32_t shift,
-+	const bool valid)
-+{
-+	if (!valid)
-+		return;
-+
-+	volatile uint32_t *const addr = &bank->reg32[offset / sizeof(uint32_t)];
-+	clrsetbits32(addr, unset_mask << shift, set_mask << shift);
-+}
-+
-+static void peg_dmi_unset_and_set_mask_common(
-+	const bool is_peg,
-+	const uint32_t offset,
-+	const uint32_t unset,
-+	const uint32_t set,
-+	const uint32_t shift,
-+	const bool valid)
-+{
-+	const uint32_t unset_mask = unset << shift;
-+	const uint32_t   set_mask =   set << shift;
-+	if (is_peg) {
-+		for (uint8_t i = 0; i < MAX_PEG_FUNC; i++)
-+			pci_update_config32(PEG_DEV(i), offset, ~unset_mask, set_mask);
-+	} else {
-+		dmibar_clrsetbits32(offset, unset_mask, set_mask);
-+	}
-+}
-+
-+static void peg_dmi_unset_and_set_mask_vcu_mmio(
-+	const uint32_t addr,
-+	const uint32_t unset_mask,
-+	const uint32_t set_mask,
-+	const uint32_t shift,
-+	const bool valid)
-+{
-+	if (!valid)
-+		return;
-+
-+	vcu_update_mmio(addr, ~(unset_mask << shift), set_mask << shift);
-+}
-+
-+#define BUNDLE_STEP	0x20
-+
-+static void *const dmibar = (void *)(uintptr_t)CONFIG_FIXED_DMIBAR_MMIO_BASE;
-+
-+void peg_dmi_recipe(const bool is_peg, const pci_devfn_t dev)
-+{
-+	const bool always = true;
-+	const bool is_dmi = !is_peg;
-+
-+	/* Treat DMIBAR and PEG devices the same way */
-+	volatile union pci_bank *const bank = is_peg ? pci_map_bus(dev) : dmibar;
-+
-+	const size_t bundles = (is_peg ? 8 : 2) * BUNDLE_STEP;
-+
-+	for (size_t i = 0; i < bundles; i += BUNDLE_STEP) {
-+		/* These are actually per-lane */
-+		peg_dmi_unset_and_set_mask_pcicfg(bank, 0xa00 + i, 0x1f, 0x0c,  0, always);
-+		peg_dmi_unset_and_set_mask_pcicfg(bank, 0xa10 + i, 0x1f, 0x0c,  0, always);
-+	}
-+
-+	for (size_t i = 0; i < bundles; i += BUNDLE_STEP)
-+		peg_dmi_unset_and_set_mask_pcicfg(bank, 0x904 + i, 0x1f, 0x02,  0, is_peg);
-+
-+	for (size_t i = 0; i < bundles; i += BUNDLE_STEP)
-+		peg_dmi_unset_and_set_mask_pcicfg(bank, 0x904 + i, 0x1f, 0x03,  5, is_peg);
-+
-+	for (size_t i = 0; i < bundles; i += BUNDLE_STEP)
-+		peg_dmi_unset_and_set_mask_pcicfg(bank, 0x90c + i, 0x3f, 0x09,  5, always);
-+
-+	for (size_t i = 0; i < bundles; i += BUNDLE_STEP)
-+		peg_dmi_unset_and_set_mask_pcicfg(bank, 0x90c + i, 0x0f, 0x05, 21, is_peg);
-+
-+	for (size_t i = 0; i < bundles; i += BUNDLE_STEP)
-+		peg_dmi_unset_and_set_mask_pcicfg(bank, 0x910 + i, 0x0f, 0x08,  6, is_peg);
-+
-+	for (size_t i = 0; i < bundles; i += BUNDLE_STEP)
-+		peg_dmi_unset_and_set_mask_pcicfg(bank, 0x910 + i, 0x0f, 0x00, 10, always);
-+
-+	for (size_t i = 0; i < bundles; i += BUNDLE_STEP)
-+		peg_dmi_unset_and_set_mask_pcicfg(bank, 0x910 + i, 0x07, 0x00, 18, always);
-+
-+	peg_dmi_unset_and_set_mask_vcu_mmio(0x0c008001, 0x1f, 0x03, 25, is_peg);
-+	peg_dmi_unset_and_set_mask_vcu_mmio(0x0c0c8001, 0x3f, 0x00, 23, is_dmi);
-+
-+	peg_dmi_unset_and_set_mask_pcicfg(bank, 0xc28, 0x1f, 0x13, 18, always);
-+
-+	peg_dmi_unset_and_set_mask_common(is_peg, 0xc38, 0x01, 0x00,  6, always);
-+	peg_dmi_unset_and_set_mask_common(is_peg, 0x260, 0x03, 0x02,  0, always);
-+
-+	for (size_t i = 0; i < bundles; i += BUNDLE_STEP)
-+		peg_dmi_unset_and_set_mask_pcicfg(bank, 0x900 + i, 0x03, 0x00, 26, always);
-+
-+	for (size_t i = 0; i < bundles; i += BUNDLE_STEP)
-+		peg_dmi_unset_and_set_mask_pcicfg(bank, 0x904 + i, 0x03, 0x03, 10, always);
-+
-+	for (size_t i = 0; i < bundles; i += BUNDLE_STEP)
-+		peg_dmi_unset_and_set_mask_pcicfg(bank, 0x90c + i, 0x1f, 0x07, 25, is_peg);
-+
-+	for (size_t i = 0; i < bundles; i += BUNDLE_STEP)
-+		peg_dmi_unset_and_set_mask_pcicfg(bank, 0x91c + i, 0x07, 0x05, 27, is_peg);
-+}
-diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h
-index 1b29f6baf0..30b4abd0a7 100644
---- a/src/northbridge/intel/haswell/haswell.h
-+++ b/src/northbridge/intel/haswell/haswell.h
-@@ -34,6 +34,9 @@ void haswell_early_initialization(void);
- void haswell_late_initialization(void);
- void haswell_unhide_peg(void);
- 
-+void dmi_early_init(void);
-+void peg_dmi_recipe(const bool is_peg, const pci_devfn_t dev);
-+
- void report_platform_info(void);
- 
- struct acpi_rsdp;
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-index 1aafdf8659..0938e026e3 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-@@ -1,7 +1,19 @@
- /* SPDX-License-Identifier: GPL-2.0-or-later */
- 
- #include <console/console.h>
-+#include <northbridge/intel/haswell/haswell.h>
- #include <northbridge/intel/haswell/raminit.h>
-+#include <types.h>
-+
-+static bool early_init_native(int s3resume)
-+{
-+	printk(BIOS_DEBUG, "Starting native platform initialisation\n");
-+
-+	if (!CONFIG(INTEL_LYNXPOINT_LP))
-+		dmi_early_init();
-+
-+	return false;
-+}
- 
- void perform_raminit(const int s3resume)
- {
-@@ -9,6 +21,9 @@ void perform_raminit(const int s3resume)
- 	 * See, this function's name is a lie. There are more things to
- 	 * do that memory initialisation, but they are relatively easy.
- 	 */
-+	const bool cpu_replaced = early_init_native(s3resume);
-+
-+	(void)cpu_replaced;
- 
- 	/** TODO: Implement the required magic **/
- 	die("NATIVE RAMINIT: More Magic (tm) required.\n");
-diff --git a/src/northbridge/intel/haswell/vcu_mailbox.c b/src/northbridge/intel/haswell/vcu_mailbox.c
-new file mode 100644
-index 0000000000..aead144023
---- /dev/null
-+++ b/src/northbridge/intel/haswell/vcu_mailbox.c
-@@ -0,0 +1,147 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <assert.h>
-+#include <console/console.h>
-+#include <delay.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <northbridge/intel/haswell/vcu_mailbox.h>
-+#include <stdint.h>
-+
-+/*
-+ * This is a library for the VCU (Validation Control Unit) mailbox. This
-+ * mailbox is primarily used to adjust some magic PCIe tuning parameters.
-+ *
-+ * There are two revisions of the VCU mailbox. Rev1 is specific to Haswell
-+ * stepping A0, and all other steppings use Rev2. Haswell stepping A0 CPUs
-+ * are early Engineering Samples with undocumented errata, and most likely
-+ * need special microcode updates to boot. Thus, the code does not support
-+ * VCU mailbox Rev1, because no one should need it anymore.
-+ */
-+
-+#define VCU_MAILBOX_INTERFACE	0x6c00
-+#define VCU_MAILBOX_DATA	0x6c04
-+
-+#define VCU_RUN_BUSY		(1 << 31)
-+
-+enum vcu_opcode {
-+	VCU_OPCODE_READ_VCU_API_VER_ID	= 0x01,
-+	VCU_OPCODE_OPEN_SEQ		= 0x02,
-+	VCU_OPCODE_CLOSE_SEQ		= 0x03,
-+	VCU_OPCODE_READ_DATA		= 0x07,
-+	VCU_OPCODE_WRITE_DATA		= 0x08,
-+	VCU_OPCODE_READ_CSR		= 0x13,
-+	VCU_OPCODE_WRITE_CSR		= 0x14,
-+	VCU_OPCODE_READ_MMIO		= 0x15,
-+	VCU_OPCODE_WRITE_MMIO		= 0x16,
-+};
-+
-+enum vcu_sequence {
-+	SEQ_ID_READ_CSR		= 0x1,
-+	SEQ_ID_WRITE_CSR	= 0x2,
-+	SEQ_ID_READ_MMIO	= 0x3,
-+	SEQ_ID_WRITE_MMIO	= 0x4,
-+};
-+
-+#define VCU_RESPONSE_MASK		0xffff
-+#define VCU_RESPONSE_SUCCESS		0x40
-+#define VCU_RESPONSE_BUSY		0x80
-+#define VCU_RESPONSE_THREAD_UNAVAILABLE	0x82
-+#define VCU_RESPONSE_ILLEGAL		0x90
-+
-+/* FIXME: Use timer API */
-+static void send_vcu_command(const enum vcu_opcode opcode, const uint32_t data)
-+{
-+	for (unsigned int i = 0; i < 10; i++) {
-+		mchbar_write32(VCU_MAILBOX_DATA, data);
-+		mchbar_write32(VCU_MAILBOX_INTERFACE, opcode | VCU_RUN_BUSY);
-+		uint32_t vcu_interface;
-+		for (unsigned int j = 0; j < 100; j++) {
-+			vcu_interface = mchbar_read32(VCU_MAILBOX_INTERFACE);
-+			if (!(vcu_interface & VCU_RUN_BUSY))
-+				break;
-+
-+			udelay(10);
-+		}
-+		if (vcu_interface & VCU_RUN_BUSY)
-+			continue;
-+
-+		if ((vcu_interface & VCU_RESPONSE_MASK) == VCU_RESPONSE_SUCCESS)
-+			return;
-+	}
-+	printk(BIOS_ERR, "VCU: Failed to send command\n");
-+}
-+
-+static enum vcu_opcode get_register_opcode(enum vcu_sequence seq)
-+{
-+	switch (seq) {
-+	case SEQ_ID_READ_CSR:
-+		return VCU_OPCODE_READ_CSR;
-+	case SEQ_ID_WRITE_CSR:
-+		return VCU_OPCODE_WRITE_CSR;
-+	case SEQ_ID_READ_MMIO:
-+		return VCU_OPCODE_READ_MMIO;
-+	case SEQ_ID_WRITE_MMIO:
-+		return VCU_OPCODE_WRITE_MMIO;
-+	default:
-+		return dead_code_t(enum vcu_opcode);
-+	}
-+}
-+
-+static enum vcu_opcode get_data_opcode(enum vcu_sequence seq)
-+{
-+	switch (seq) {
-+	case SEQ_ID_READ_CSR:
-+	case SEQ_ID_READ_MMIO:
-+		return VCU_OPCODE_READ_DATA;
-+	case SEQ_ID_WRITE_CSR:
-+	case SEQ_ID_WRITE_MMIO:
-+		return VCU_OPCODE_WRITE_DATA;
-+	default:
-+		return dead_code_t(enum vcu_opcode);
-+	}
-+}
-+
-+static uint32_t send_vcu_sequence(uint32_t addr, enum vcu_sequence seq, uint32_t wr_data)
-+{
-+	send_vcu_command(VCU_OPCODE_OPEN_SEQ, seq);
-+
-+	send_vcu_command(get_register_opcode(seq), addr);
-+
-+	send_vcu_command(get_data_opcode(seq), wr_data);
-+
-+	const uint32_t rd_data = mchbar_read32(VCU_MAILBOX_DATA);
-+
-+	send_vcu_command(VCU_OPCODE_CLOSE_SEQ, seq);
-+
-+	return rd_data;
-+}
-+
-+uint32_t vcu_read_csr(uint32_t addr)
-+{
-+	return send_vcu_sequence(addr, SEQ_ID_READ_CSR, 0);
-+}
-+
-+void vcu_write_csr(uint32_t addr, uint32_t data)
-+{
-+	send_vcu_sequence(addr, SEQ_ID_WRITE_CSR, data);
-+}
-+
-+void vcu_update_csr(uint32_t addr, uint32_t andvalue, uint32_t orvalue)
-+{
-+	vcu_write_csr(addr, (vcu_read_csr(addr) & andvalue) | orvalue);
-+}
-+
-+uint32_t vcu_read_mmio(uint32_t addr)
-+{
-+	return send_vcu_sequence(addr, SEQ_ID_READ_MMIO, 0);
-+}
-+
-+void vcu_write_mmio(uint32_t addr, uint32_t data)
-+{
-+	send_vcu_sequence(addr, SEQ_ID_WRITE_MMIO, data);
-+}
-+
-+void vcu_update_mmio(uint32_t addr, uint32_t andvalue, uint32_t orvalue)
-+{
-+	vcu_write_mmio(addr, (vcu_read_mmio(addr) & andvalue) | orvalue);
-+}
-diff --git a/src/northbridge/intel/haswell/vcu_mailbox.h b/src/northbridge/intel/haswell/vcu_mailbox.h
-new file mode 100644
-index 0000000000..ba0a62e486
---- /dev/null
-+++ b/src/northbridge/intel/haswell/vcu_mailbox.h
-@@ -0,0 +1,16 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#ifndef HASWELL_VCU_MAILBOX_H
-+#define HASWELL_VCU_MAILBOX_H
-+
-+#include <stdint.h>
-+
-+uint32_t vcu_read_csr(uint32_t addr);
-+void vcu_write_csr(uint32_t addr, uint32_t data);
-+void vcu_update_csr(uint32_t addr, uint32_t andvalue, uint32_t orvalue);
-+
-+uint32_t vcu_read_mmio(uint32_t addr);
-+void vcu_write_mmio(uint32_t addr, uint32_t data);
-+void vcu_update_mmio(uint32_t addr, uint32_t andvalue, uint32_t orvalue);
-+
-+#endif /* HASWELL_VCU_MAILBOX_H */
-diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc
-index 02022d348d..b8503ac8bc 100644
---- a/src/southbridge/intel/lynxpoint/Makefile.inc
-+++ b/src/southbridge/intel/lynxpoint/Makefile.inc
-@@ -37,6 +37,8 @@ bootblock-y += early_pch.c
- romstage-y += early_usb.c early_me.c me_status.c early_pch.c
- romstage-y += pmutil.c
- 
-+romstage-$(CONFIG_USE_NATIVE_RAMINIT) += early_pch_native.c
-+
- ifeq ($(CONFIG_INTEL_LYNXPOINT_LP),y)
- romstage-y += lp_gpio.c
- ramstage-y += lp_gpio.c
-diff --git a/src/southbridge/intel/lynxpoint/early_pch_native.c b/src/southbridge/intel/lynxpoint/early_pch_native.c
-new file mode 100644
-index 0000000000..c28ddfcf5d
---- /dev/null
-+++ b/src/southbridge/intel/lynxpoint/early_pch_native.c
-@@ -0,0 +1,52 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <console/console.h>
-+#include <device/pci_ops.h>
-+#include <southbridge/intel/lynxpoint/pch.h>
-+#include <types.h>
-+
-+void pch_dmi_setup_physical_layer(void)
-+{
-+	/* FIXME: We need to make sure the SA supports Gen2 as well */
-+	if ((RCBA32(0x21a4) & 0x0f) == 0x02) {
-+		/* Set Gen 2 Common Clock N_FTS */
-+		RCBA32_AND_OR(0x2340, ~0x00ff0000, 0x3a << 16);
-+
-+		/* Set Target Link Speed to DMI Gen2 */
-+		RCBA8_AND_OR(DLCTL2, ~0x07, 0x02);
-+	}
-+}
-+
-+#define VC_ACTIVE	(1U << 31)
-+
-+#define VCNEGPND	(1 << 1)
-+
-+void pch_dmi_tc_vc_mapping(const u32 vc0, const u32 vc1, const u32 vcp, const u32 vcm)
-+{
-+	printk(BIOS_DEBUG, "Programming PCH DMI VC/TC mappings...\n");
-+
-+	RCBA32_AND_OR(CIR0050, ~(0xf << 20), 2 << 20);
-+	if (vcp & VC_ACTIVE)
-+		RCBA32_OR(CIR0050, 1 << 19 | 1 << 17);
-+
-+	RCBA32(CIR0050);	/* Posted Write */
-+
-+	/* Use the same virtual channel mapping on both ends of the DMI link */
-+	RCBA32(V0CTL) = vc0;
-+	RCBA32(V1CTL) = vc1;
-+	RCBA32(V1CTL);		/* Posted Write */
-+	RCBA32(VPCTL) = vcp;
-+	RCBA32(VPCTL);		/* Posted Write */
-+	RCBA32(VMCTL) = vcm;
-+
-+	/* Lock the registers */
-+	RCBA32_OR(CIR0050, 1U << 31);
-+	RCBA32(CIR0050);	/* Posted Write */
-+
-+	printk(BIOS_DEBUG, "Waiting for PCH DMI VC negotiation... ");
-+	do {} while (RCBA16(V0STS) & VCNEGPND);
-+	do {} while (RCBA16(V1STS) & VCNEGPND);
-+	do {} while (RCBA16(VPSTS) & VCNEGPND);
-+	do {} while (RCBA16(VMSTS) & VCNEGPND);
-+	printk(BIOS_DEBUG, "done!\n");
-+}
-diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
-index 7d9fc6d6af..b5e0c2a830 100644
---- a/src/southbridge/intel/lynxpoint/pch.h
-+++ b/src/southbridge/intel/lynxpoint/pch.h
-@@ -113,6 +113,9 @@ enum pch_platform_type {
- 	PCH_TYPE_ULT	 = 5,
- };
- 
-+void pch_dmi_setup_physical_layer(void);
-+void pch_dmi_tc_vc_mapping(u32 vc0, u32 vc1, u32 vcp, u32 vcm);
-+
- void usb_ehci_sleep_prepare(pci_devfn_t dev, u8 slp_typ);
- void usb_ehci_disable(pci_devfn_t dev);
- void usb_xhci_sleep_prepare(pci_devfn_t dev, u8 slp_typ);
-@@ -406,9 +409,10 @@ void mainboard_config_rcba(void);
- 
- /* Southbridge IO BARs */
- 
-+#define PMBASE			0x40
- #define GPIOBASE		0x48
- 
--#define PMBASE		0x40
-+#define CIR0050		0x0050	/* 32bit */
- 
- #define RPC		0x0400	/* 32bit */
- #define RPFN		0x0404	/* 32bit */
-@@ -431,6 +435,20 @@ void mainboard_config_rcba(void);
- #define IOTR2		0x1e90	/* 64bit */
- #define IOTR3		0x1e98	/* 64bit */
- 
-+#define V0CTL		0x2014	/* 32bit */
-+#define V0STS		0x201a	/* 16bit */
-+
-+#define V1CTL		0x2020	/* 32bit */
-+#define V1STS		0x2026	/* 16bit */
-+
-+#define VPCTL		0x2030	/* 32bit */
-+#define VPSTS		0x2038	/* 16bit */
-+
-+#define VMCTL		0x2040	/* 32bit */
-+#define VMSTS		0x2048	/* 16bit */
-+
-+#define DLCTL2		0x21b0
-+
- #define TCTL		0x3000	/*  8bit */
- 
- #define NOINT		0
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0014-haswell-NRI-Add-timings-refresh-programming.patch b/config/coreboot/haswell/patches/0004-haswell-NRI-Add-timings-refresh-programming.patch
similarity index 98%
rename from config/coreboot/haswell/patches/0014-haswell-NRI-Add-timings-refresh-programming.patch
rename to config/coreboot/haswell/patches/0004-haswell-NRI-Add-timings-refresh-programming.patch
index 1b88f350..74c21227 100644
--- a/config/coreboot/haswell/patches/0014-haswell-NRI-Add-timings-refresh-programming.patch
+++ b/config/coreboot/haswell/patches/0004-haswell-NRI-Add-timings-refresh-programming.patch
@@ -1,7 +1,7 @@
-From b64d728bfe7c8ee44af252338257e95d87864659 Mon Sep 17 00:00:00 2001
+From d94843c7c0e25cb6da4040b845556034fdb0e2c3 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 20:59:58 +0200
-Subject: [PATCH 14/26] haswell NRI: Add timings/refresh programming
+Subject: [PATCH 04/20] haswell NRI: Add timings/refresh programming
 
 Program the registers with timing and refresh parameters.
 
@@ -16,7 +16,7 @@ Signed-off-by: Angel Pons <th3fanbus@gmail.com>
  5 files changed, 452 insertions(+), 2 deletions(-)
 
 diff --git a/src/northbridge/intel/haswell/native_raminit/lookup_timings.c b/src/northbridge/intel/haswell/native_raminit/lookup_timings.c
-index 038686c844..afe2c615d2 100644
+index 8b81c7c341..b8d6c1ef40 100644
 --- a/src/northbridge/intel/haswell/native_raminit/lookup_timings.c
 +++ b/src/northbridge/intel/haswell/native_raminit/lookup_timings.c
 @@ -60,3 +60,105 @@ uint32_t get_tXP(const uint32_t mem_clock_mhz)
@@ -262,14 +262,14 @@ index d11cda4b3d..70487e1640 100644
  	struct __packed {
  		uint32_t enable_cmd_limit :  1; // Bits  0:0
 diff --git a/src/northbridge/intel/haswell/native_raminit/timings_refresh.c b/src/northbridge/intel/haswell/native_raminit/timings_refresh.c
-index a9d960f31b..20a05b359b 100644
+index a9d960f31b..54fee0121d 100644
 --- a/src/northbridge/intel/haswell/native_raminit/timings_refresh.c
 +++ b/src/northbridge/intel/haswell/native_raminit/timings_refresh.c
 @@ -1,13 +1,242 @@
  /* SPDX-License-Identifier: GPL-2.0-or-later */
  
 +#include <assert.h>
-+#include <commonlib/clamp.h>
++#include <commonlib/bsd/clamp.h>
 +#include <console/console.h>
 +#include <delay.h>
 +#include <device/pci_ops.h>
@@ -458,7 +458,7 @@ index a9d960f31b..20a05b359b 100644
  {
 -	/** TODO: Stub **/
 +	if (ctrl->lpddr)
-+		die("%s: Missing support for LPDDR\n");
++		die("%s: Missing support for LPDDR\n", __func__);
 +
 +	const uint8_t odt_stretch = get_odt_stretch(ctrl);
 +	const union tc_bank_reg tc_bank = make_tc_bank(ctrl);
diff --git a/config/coreboot/haswell/patches/0004-haswell-lynxpoint-Add-native-early-ME-init.patch b/config/coreboot/haswell/patches/0004-haswell-lynxpoint-Add-native-early-ME-init.patch
deleted file mode 100644
index 28dbc02a..00000000
--- a/config/coreboot/haswell/patches/0004-haswell-lynxpoint-Add-native-early-ME-init.patch
+++ /dev/null
@@ -1,148 +0,0 @@
-From 98142e01fc8ebb3b762974e9e4de75e7f5c073b4 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Fri, 6 May 2022 22:18:21 +0200
-Subject: [PATCH 04/26] haswell/lynxpoint: Add native early ME init
-
-Implement native early ME init for Lynx Point. This is only needed when
-MRC.bin is not used.
-
-Change-Id: If416e2078f139f26b4742c564b70e018725bf003
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../haswell/native_raminit/raminit_native.c   | 17 ++++++++++-
- src/southbridge/intel/lynxpoint/early_me.c    | 30 ++++++++++++++++++-
- src/southbridge/intel/lynxpoint/me.h          |  7 +++--
- 3 files changed, 50 insertions(+), 4 deletions(-)
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-index 0938e026e3..6a002548c1 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-@@ -1,18 +1,24 @@
- /* SPDX-License-Identifier: GPL-2.0-or-later */
- 
- #include <console/console.h>
-+#include <delay.h>
- #include <northbridge/intel/haswell/haswell.h>
- #include <northbridge/intel/haswell/raminit.h>
-+#include <southbridge/intel/lynxpoint/me.h>
- #include <types.h>
- 
- static bool early_init_native(int s3resume)
- {
- 	printk(BIOS_DEBUG, "Starting native platform initialisation\n");
- 
-+	intel_early_me_init();
-+	/** TODO: CPU replacement check must be skipped in warm boots and S3 resumes **/
-+	const bool cpu_replaced = !s3resume && intel_early_me_cpu_replacement_check();
-+
- 	if (!CONFIG(INTEL_LYNXPOINT_LP))
- 		dmi_early_init();
- 
--	return false;
-+	return cpu_replaced;
- }
- 
- void perform_raminit(const int s3resume)
-@@ -25,6 +31,15 @@ void perform_raminit(const int s3resume)
- 
- 	(void)cpu_replaced;
- 
-+	/** TODO: Move after raminit */
-+	if (intel_early_me_uma_size() > 0) {
-+		/** TODO: Update status once raminit is implemented **/
-+		uint8_t me_status = ME_INIT_STATUS_ERROR;
-+		intel_early_me_init_done(me_status);
-+	}
-+
-+	intel_early_me_status();
-+
- 	/** TODO: Implement the required magic **/
- 	die("NATIVE RAMINIT: More Magic (tm) required.\n");
- }
-diff --git a/src/southbridge/intel/lynxpoint/early_me.c b/src/southbridge/intel/lynxpoint/early_me.c
-index 947c570e16..07013c5539 100644
---- a/src/southbridge/intel/lynxpoint/early_me.c
-+++ b/src/southbridge/intel/lynxpoint/early_me.c
-@@ -1,11 +1,12 @@
- /* SPDX-License-Identifier: GPL-2.0-only */
- 
- #include <arch/io.h>
-+#include <cf9_reset.h>
- #include <device/pci_ops.h>
- #include <console/console.h>
- #include <delay.h>
- #include <halt.h>
--
-+#include <timer.h>
- #include "me.h"
- #include "pch.h"
- 
-@@ -60,6 +61,33 @@ int intel_early_me_init(void)
- 	return 0;
- }
- 
-+bool intel_early_me_cpu_replacement_check(void)
-+{
-+	printk(BIOS_DEBUG, "ME: Checking whether CPU was replaced... ");
-+
-+	struct stopwatch timer;
-+	stopwatch_init_msecs_expire(&timer, 50);
-+
-+	union me_hfs2 hfs2;
-+	do {
-+		hfs2.raw = pci_read_config32(PCH_ME_DEV, PCI_ME_HFS2);
-+		if (stopwatch_expired(&timer)) {
-+			/* Assume CPU was replaced just in case */
-+			printk(BIOS_DEBUG, "timed out, assuming CPU was replaced\n");
-+			return true;
-+		}
-+		udelay(ME_DELAY);
-+	} while (!hfs2.cpu_replaced_valid);
-+
-+	if (hfs2.warm_reset_request) {
-+		printk(BIOS_DEBUG, "warm reset needed for dynamic fusing\n");
-+		system_reset();
-+	}
-+
-+	printk(BIOS_DEBUG, "%sreplaced\n", hfs2.cpu_replaced_sts ? "" : "not ");
-+	return hfs2.cpu_replaced_sts;
-+}
-+
- int intel_early_me_uma_size(void)
- {
- 	union me_uma uma = { .raw = pci_read_config32(PCH_ME_DEV, PCI_ME_UMA) };
-diff --git a/src/southbridge/intel/lynxpoint/me.h b/src/southbridge/intel/lynxpoint/me.h
-index fe8b0260c4..6990322651 100644
---- a/src/southbridge/intel/lynxpoint/me.h
-+++ b/src/southbridge/intel/lynxpoint/me.h
-@@ -177,14 +177,16 @@ union me_did {
- union me_hfs2 {
- 	struct __packed {
- 		u32 bist_in_progress: 1;
--		u32 reserved1: 2;
-+		u32 icc_prog_sts: 2;
- 		u32 invoke_mebx: 1;
- 		u32 cpu_replaced_sts: 1;
- 		u32 mbp_rdy: 1;
- 		u32 mfs_failure: 1;
- 		u32 warm_reset_request: 1;
- 		u32 cpu_replaced_valid: 1;
--		u32 reserved2: 4;
-+		u32 reserved: 2;
-+		u32 fw_upd_ipu: 1;
-+		u32 reserved2: 1;
- 		u32 mbp_cleared: 1;
- 		u32 reserved3: 2;
- 		u32 current_state: 8;
-@@ -338,6 +340,7 @@ void intel_me_status(union me_hfs hfs, union me_hfs2 hfs2);
- 
- void intel_early_me_status(void);
- int intel_early_me_init(void);
-+bool intel_early_me_cpu_replacement_check(void);
- int intel_early_me_uma_size(void);
- int intel_early_me_init_done(u8 status);
- 
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0015-haswell-NRI-Program-memory-map.patch b/config/coreboot/haswell/patches/0005-haswell-NRI-Program-memory-map.patch
similarity index 95%
rename from config/coreboot/haswell/patches/0015-haswell-NRI-Program-memory-map.patch
rename to config/coreboot/haswell/patches/0005-haswell-NRI-Program-memory-map.patch
index ad8527b2..e095417c 100644
--- a/config/coreboot/haswell/patches/0015-haswell-NRI-Program-memory-map.patch
+++ b/config/coreboot/haswell/patches/0005-haswell-NRI-Program-memory-map.patch
@@ -1,7 +1,7 @@
-From 89ff35083af68d1b24c1633886202ecc153af67d Mon Sep 17 00:00:00 2001
+From b872fb9fc10d1789989072b8533b797152e6cb54 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 21:24:50 +0200
-Subject: [PATCH 15/26] haswell NRI: Program memory map
+Subject: [PATCH 05/20] haswell NRI: Program memory map
 
 This is very similar to Sandy/Ivy Bridge, except that there's several
 registers to program in GDXCBAR. One of these GDXCBAR registers has a
@@ -12,7 +12,7 @@ bit was the only reason why native raminit did not work.
 Change-Id: I3af73a018a7ba948701a542e661e7fefd57591fe
 Signed-off-by: Angel Pons <th3fanbus@gmail.com>
 ---
- .../intel/haswell/native_raminit/Makefile.inc |   1 +
+ .../intel/haswell/native_raminit/Makefile.mk  |   1 +
  .../intel/haswell/native_raminit/memory_map.c | 183 ++++++++++++++++++
  .../haswell/native_raminit/raminit_main.c     |   1 +
  .../haswell/native_raminit/raminit_native.h   |   1 +
@@ -20,10 +20,10 @@ Signed-off-by: Angel Pons <th3fanbus@gmail.com>
  5 files changed, 188 insertions(+)
  create mode 100644 src/northbridge/intel/haswell/native_raminit/memory_map.c
 
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 index fc55277a65..37d527e972 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+--- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
++++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 @@ -4,6 +4,7 @@ romstage-y += configure_mc.c
  romstage-y += lookup_timings.c
  romstage-y += init_mpll.c
@@ -222,10 +222,10 @@ index 0000000000..e3aded2b37
 +	return 0;
 +}
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 3a773cfa19..136a8ba989 100644
+index fcc981ad04..559dfc3a4e 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -24,6 +24,7 @@ static const struct task_entry cold_boot[] = {
+@@ -23,6 +23,7 @@ static const struct task_entry cold_boot[] = {
  	{ initialise_mpll,                                        true, "INITMPLL",   },
  	{ convert_timings,                                        true, "CONVTIM",    },
  	{ configure_mc,                                           true, "CONFMC",     },
diff --git a/config/coreboot/haswell/patches/0005-sb-intel-lynxpoint-Add-native-USB-init.patch b/config/coreboot/haswell/patches/0005-sb-intel-lynxpoint-Add-native-USB-init.patch
deleted file mode 100644
index d9c2570b..00000000
--- a/config/coreboot/haswell/patches/0005-sb-intel-lynxpoint-Add-native-USB-init.patch
+++ /dev/null
@@ -1,783 +0,0 @@
-From 9bfb8614dbf1d9800ef8251cb3d839bcdbe5577f Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Fri, 6 May 2022 23:17:39 +0200
-Subject: [PATCH 05/26] sb/intel/lynxpoint: Add native USB init
-
-Implement native USB initialisation for Lynx Point. This is only needed
-when MRC.bin is not used.
-
-TO DO: Figure out how to deal with the FIXME's and TODO's lying around.
-
-Change-Id: Ie0fbeeca7b1ca1557173772d733fd2fa27703373
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../haswell/native_raminit/raminit_native.c   |   3 +
- src/southbridge/intel/lynxpoint/Makefile.inc  |   2 +-
- src/southbridge/intel/lynxpoint/early_usb.c   |  11 -
- .../intel/lynxpoint/early_usb_native.c        | 584 ++++++++++++++++++
- src/southbridge/intel/lynxpoint/pch.h         |  49 ++
- 5 files changed, 637 insertions(+), 12 deletions(-)
- create mode 100644 src/southbridge/intel/lynxpoint/early_usb_native.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-index 6a002548c1..ef61d4ee09 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-@@ -5,6 +5,7 @@
- #include <northbridge/intel/haswell/haswell.h>
- #include <northbridge/intel/haswell/raminit.h>
- #include <southbridge/intel/lynxpoint/me.h>
-+#include <southbridge/intel/lynxpoint/pch.h>
- #include <types.h>
- 
- static bool early_init_native(int s3resume)
-@@ -15,6 +16,8 @@ static bool early_init_native(int s3resume)
- 	/** TODO: CPU replacement check must be skipped in warm boots and S3 resumes **/
- 	const bool cpu_replaced = !s3resume && intel_early_me_cpu_replacement_check();
- 
-+	early_usb_init();
-+
- 	if (!CONFIG(INTEL_LYNXPOINT_LP))
- 		dmi_early_init();
- 
-diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc
-index b8503ac8bc..0e1f2fe4eb 100644
---- a/src/southbridge/intel/lynxpoint/Makefile.inc
-+++ b/src/southbridge/intel/lynxpoint/Makefile.inc
-@@ -37,7 +37,7 @@ bootblock-y += early_pch.c
- romstage-y += early_usb.c early_me.c me_status.c early_pch.c
- romstage-y += pmutil.c
- 
--romstage-$(CONFIG_USE_NATIVE_RAMINIT) += early_pch_native.c
-+romstage-$(CONFIG_USE_NATIVE_RAMINIT) += early_pch_native.c early_usb_native.c iobp.c
- 
- ifeq ($(CONFIG_INTEL_LYNXPOINT_LP),y)
- romstage-y += lp_gpio.c
-diff --git a/src/southbridge/intel/lynxpoint/early_usb.c b/src/southbridge/intel/lynxpoint/early_usb.c
-index a753681ce0..52e8ac17f8 100644
---- a/src/southbridge/intel/lynxpoint/early_usb.c
-+++ b/src/southbridge/intel/lynxpoint/early_usb.c
-@@ -4,17 +4,6 @@
- #include <device/pci_def.h>
- #include "pch.h"
- 
--/* HCD_INDEX == 2 selects 0:1a.0 (PCH_EHCI2), any other index
-- * selects 0:1d.0 (PCH_EHCI1) for usbdebug use.
-- */
--#if CONFIG_USBDEBUG_HCD_INDEX != 2
--#define PCH_EHCI1_TEMP_BAR0 CONFIG_EHCI_BAR
--#define PCH_EHCI2_TEMP_BAR0 (PCH_EHCI1_TEMP_BAR0 + 0x400)
--#else
--#define PCH_EHCI2_TEMP_BAR0 CONFIG_EHCI_BAR
--#define PCH_EHCI1_TEMP_BAR0 (PCH_EHCI2_TEMP_BAR0 + 0x400)
--#endif
--
- /*
-  * Setup USB controller MMIO BAR to prevent the
-  * reference code from resetting the controller.
-diff --git a/src/southbridge/intel/lynxpoint/early_usb_native.c b/src/southbridge/intel/lynxpoint/early_usb_native.c
-new file mode 100644
-index 0000000000..cb6f6ee8e6
---- /dev/null
-+++ b/src/southbridge/intel/lynxpoint/early_usb_native.c
-@@ -0,0 +1,584 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <console/console.h>
-+#include <delay.h>
-+#include <device/mmio.h>
-+#include <device/pci_def.h>
-+#include <device/pci_ops.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <northbridge/intel/haswell/raminit.h>
-+#include <southbridge/intel/lynxpoint/iobp.h>
-+#include <southbridge/intel/lynxpoint/pch.h>
-+#include <timer.h>
-+#include <types.h>
-+
-+static unsigned int is_usbr_enabled(void)
-+{
-+	return !!(pci_read_config32(PCH_XHCI_DEV, XHCI_USB3FUS) & BIT(5));
-+}
-+
-+static char *const xhci_bar = (char *)PCH_XHCI_TEMP_BAR0;
-+
-+static void ehci_hcs_init(const pci_devfn_t dev, const uintptr_t ehci_bar)
-+{
-+	pci_write_config32(dev, PCI_BASE_ADDRESS_0, ehci_bar);
-+
-+	/** FIXME: Determine whether Bus Master is required (or clean it up afterwards) **/
-+	pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
-+
-+	char *const mem_bar = (char *)ehci_bar;
-+
-+	/**
-+	 * Shared EHCI/XHCI ports w/a.
-+	 * This step is required when some of the ports are routed to EHCI
-+	 * and other ports are routed XHCI at the same time.
-+	 *
-+	 * FIXME: Under which conditions should this be done?
-+	 */
-+	pci_and_config16(dev, 0x78, ~0x03);
-+
-+	/* Skip reset if usbdebug is enabled */
-+	if (!CONFIG(USBDEBUG_IN_PRE_RAM))
-+		setbits32(mem_bar + EHCI_USB_CMD, EHCI_USB_CMD_HCRESET);
-+
-+	/* 2: Configure number of controllers and ports */
-+	pci_or_config16(dev, EHCI_ACCESS_CNTL, ACCESS_CNTL_ENABLE);
-+	clrsetbits32(mem_bar + EHCI_HCS_PARAMS, 0xf << 12, 0);
-+	clrsetbits32(mem_bar + EHCI_HCS_PARAMS, 0xf <<  0, 2 + is_usbr_enabled());
-+	pci_and_config16(dev, EHCI_ACCESS_CNTL, ~ACCESS_CNTL_ENABLE);
-+
-+	pci_or_config16(dev, 0x78, BIT(2));
-+	pci_or_config16(dev, 0x7c, BIT(14) | BIT(7));
-+	pci_update_config32(dev, 0x8c, ~(0xf << 8), (4 << 8));
-+	pci_update_config32(dev, 0x8c, ~BIT(26), BIT(17));
-+}
-+
-+static inline unsigned int physical_port_count(void)
-+{
-+	return MAX_USB2_PORTS;
-+}
-+
-+static unsigned int hs_port_count(void)
-+{
-+	/** TODO: Apparently, WPT-LP has 10 USB2 ports **/
-+	if (CONFIG(INTEL_LYNXPOINT_LP))
-+		return 8;
-+
-+	switch ((pci_read_config32(PCH_XHCI_DEV, XHCI_USB3FUS) >> 1) & 3) {
-+	case 3:
-+		return 8;
-+	case 2:
-+		return 10;
-+	case 1:
-+		return 12;
-+	case 0:
-+	default:
-+		return 14;
-+	}
-+}
-+
-+static unsigned int ss_port_count(void)
-+{
-+	if (CONFIG(INTEL_LYNXPOINT_LP))
-+		return 4;
-+
-+	switch ((pci_read_config32(PCH_XHCI_DEV, XHCI_USB3FUS) >> 3) & 3) {
-+	case 3:
-+		return 0;
-+	case 2:
-+		return 2;
-+	case 1:
-+		return 4;
-+	case 0:
-+	default:
-+		return 6;
-+	}
-+}
-+
-+static void common_ehci_hcs_init(void)
-+{
-+	const bool is_lp = CONFIG(INTEL_LYNXPOINT_LP);
-+
-+	ehci_hcs_init(PCH_EHCI1_DEV, PCH_EHCI1_TEMP_BAR0);
-+	if (!is_lp)
-+		ehci_hcs_init(PCH_EHCI2_DEV, PCH_EHCI2_TEMP_BAR0);
-+
-+	pch_iobp_update(0xe5007f04, 0, 0x00004481);
-+
-+	for (unsigned int port = 0; port < physical_port_count(); port++)
-+		pch_iobp_update(0xe500400f + port * 0x100, ~(1 << 0), 0 << 0);
-+
-+	pch_iobp_update(0xe5007f14, ~(3 << 19), (3 << 19));
-+
-+	if (is_lp)
-+		pch_iobp_update(0xe5007f02, ~(3 << 22), (0 << 22));
-+}
-+
-+static void xhci_open_memory_space(void)
-+{
-+	/** FIXME: Determine whether Bus Master is required (or clean it up afterwards) **/
-+	pci_write_config32(PCH_XHCI_DEV, PCI_BASE_ADDRESS_0, (uintptr_t)xhci_bar);
-+	pci_or_config16(PCH_XHCI_DEV, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
-+}
-+
-+static void xhci_close_memory_space(void)
-+{
-+	pci_and_config16(PCH_XHCI_DEV, PCI_COMMAND, ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY));
-+	pci_write_config32(PCH_XHCI_DEV, PCI_BASE_ADDRESS_0, 0);
-+}
-+
-+static void common_xhci_hc_init(void)
-+{
-+	const bool is_lp = CONFIG(INTEL_LYNXPOINT_LP);
-+
-+	if (!is_lp) {
-+		const unsigned int max_ports = 15 + ss_port_count();
-+		clrsetbits32(xhci_bar + XHCI_HCS_PARAMS_1, 0xf << 28, max_ports << 28);
-+	}
-+
-+	clrsetbits32(xhci_bar + XHCI_HCS_PARAMS_3, 0xffff << 16 | 0xff, 0x200 << 16 | 0x0a);
-+	clrsetbits32(xhci_bar + XHCI_HCC_PARAMS, BIT(5), BIT(10) | BIT(9));
-+
-+	if (!is_lp)
-+		clrsetbits32(xhci_bar + 0x8008, BIT(19), 0);
-+
-+	if (is_lp)
-+		clrsetbits32(xhci_bar + 0x8058, BIT(8), BIT(16));
-+	else
-+		clrsetbits32(xhci_bar + 0x8058, BIT(8), BIT(16) | BIT(20));
-+
-+	clrsetbits32(xhci_bar + 0x8060, 0, BIT(25) | BIT(18));
-+	clrsetbits32(xhci_bar + 0x8090, 0, BIT(14) | BIT(8));
-+	clrsetbits32(xhci_bar + 0x8094, 0, BIT(23) | BIT(21) | BIT(14));
-+	clrsetbits32(xhci_bar + 0x80e0, BIT(16), BIT(6));
-+	clrsetbits32(xhci_bar + 0x80ec, (7 << 12) | (7 << 9), (0 << 12) | (6 << 9));
-+	clrsetbits32(xhci_bar + 0x80f0, BIT(20), 0);
-+
-+	if (is_lp)
-+		clrsetbits32(xhci_bar + 0x80fc, 0, BIT(25));
-+
-+	if (is_lp)
-+		clrsetbits32(xhci_bar + 0x8110, BIT(8) | BIT(2), BIT(20) | BIT(11));
-+	else
-+		clrsetbits32(xhci_bar + 0x8110, BIT(2), BIT(20) | BIT(11));
-+
-+	if (is_lp)
-+		write32(xhci_bar + 0x8140, 0xff00f03c);
-+	else
-+		write32(xhci_bar + 0x8140, 0xff03c132);
-+
-+	if (is_lp)
-+		clrsetbits32(xhci_bar + 0x8154, BIT(21), BIT(13));
-+	else
-+		clrsetbits32(xhci_bar + 0x8154, BIT(21) | BIT(13), 0);
-+
-+	clrsetbits32(xhci_bar + 0x8154, BIT(3), 0);
-+
-+	if (is_lp) {
-+		clrsetbits32(xhci_bar + 0x8164, 0, BIT(1) | BIT(0));
-+		write32(xhci_bar + 0x8174, 0x01400c0a);
-+		write32(xhci_bar + 0x817c, 0x033200a3);
-+		write32(xhci_bar + 0x8180, 0x00cb0028);
-+		write32(xhci_bar + 0x8184, 0x0064001e);
-+	}
-+
-+	/*
-+	 * Note: Register at offset 0x44 is 32-bit, but bit 31 is write-once.
-+	 * We use these weird partial accesses here to avoid locking bit 31.
-+	 */
-+	pci_or_config16(PCH_XHCI_DEV, 0x44, BIT(15) | BIT(14) | BIT(10) | BIT(0));
-+	pci_or_config8(PCH_XHCI_DEV, 0x44 + 2, 0x0f);
-+
-+	/* LPT-LP >= B0 */
-+	if (is_lp)
-+		clrsetbits32(xhci_bar + 0x8188, 0, BIT(26) | BIT(24));
-+
-+	/* LPT-H >= C0 */
-+	if (!is_lp)
-+		clrsetbits32(xhci_bar + 0x8188, 0, BIT(24));
-+}
-+
-+static inline bool is_mem_sr(void)
-+{
-+	return pci_read_config16(PCH_LPC_DEV, GEN_PMCON_2) & GEN_PMCON_2_MEM_SR;
-+}
-+
-+static bool should_restore_xhci_smart_auto(void)
-+{
-+	if (!is_mem_sr())
-+		return false;
-+
-+	return pci_read_config32(PCH_LPC_DEV, PMIR) & PMIR_XHCI_SMART_AUTO;
-+}
-+
-+enum usb_port_route {
-+	ROUTE_TO_EHCI,
-+	ROUTE_TO_XHCI,
-+};
-+
-+/* Returns whether port reset was successful */
-+static bool reset_usb2_ports(const unsigned int ehci_ports)
-+{
-+	for (unsigned int port = 0; port < ehci_ports; port++) {
-+		/* Initiate port reset for all USB2 ports */
-+		clrsetbits32(
-+			xhci_bar + XHCI_USB2_PORTSC(port),
-+			XHCI_USB2_PORTSC_PED,
-+			XHCI_USB2_PORTSC_PR);
-+	}
-+	/* Poll for port reset bit to be cleared or time out at 100ms */
-+	struct stopwatch timer;
-+	stopwatch_init_msecs_expire(&timer, 100);
-+	uint32_t reg32;
-+	do {
-+		reg32 = 0;
-+		for (unsigned int port = 0; port < ehci_ports; port++)
-+			reg32 |= read32(xhci_bar + XHCI_USB2_PORTSC(port));
-+
-+		reg32 &= XHCI_USB2_PORTSC_PR;
-+		if (!reg32) {
-+			const long elapsed_time = stopwatch_duration_usecs(&timer);
-+			printk(BIOS_DEBUG, "%s: took %lu usecs\n", __func__, elapsed_time);
-+			return true;
-+		}
-+		/* Reference code has a 10 ms delay here, but a smaller delay works too */
-+		udelay(100);
-+	} while (!stopwatch_expired(&timer));
-+	printk(BIOS_ERR, "%s: timed out\n", __func__);
-+	return !reg32;
-+}
-+
-+/* Returns whether warm reset was successful */
-+static bool warm_reset_usb3_ports(const unsigned int xhci_ports)
-+{
-+	for (unsigned int port = 0; port < xhci_ports; port++) {
-+		/* Initiate warm reset for all USB3 ports */
-+		clrsetbits32(
-+			xhci_bar + XHCI_USB3_PORTSC(port),
-+			XHCI_USB3_PORTSC_PED,
-+			XHCI_USB3_PORTSC_WPR);
-+	}
-+	/* Poll for port reset bit to be cleared or time out at 100ms */
-+	struct stopwatch timer;
-+	stopwatch_init_msecs_expire(&timer, 100);
-+	uint32_t reg32;
-+	do {
-+		reg32 = 0;
-+		for (unsigned int port = 0; port < xhci_ports; port++)
-+			reg32 |= read32(xhci_bar + XHCI_USB3_PORTSC(port));
-+
-+		reg32 &= XHCI_USB3_PORTSC_PR;
-+		if (!reg32) {
-+			const long elapsed_time = stopwatch_duration_usecs(&timer);
-+			printk(BIOS_DEBUG, "%s: took %lu usecs\n", __func__, elapsed_time);
-+			return true;
-+		}
-+		/* Reference code has a 10 ms delay here, but a smaller delay works too */
-+		udelay(100);
-+	} while (!stopwatch_expired(&timer));
-+	printk(BIOS_ERR, "%s: timed out\n", __func__);
-+	return !reg32;
-+}
-+
-+static void perform_xhci_ehci_switching_flow(const enum usb_port_route usb_route)
-+{
-+	const pci_devfn_t dev = PCH_XHCI_DEV;
-+
-+	const unsigned int ehci_ports = hs_port_count() + is_usbr_enabled();
-+	const unsigned int xhci_ports = ss_port_count();
-+
-+	const uint32_t ehci_mask = BIT(ehci_ports) - 1;
-+	const uint32_t xhci_mask = BIT(xhci_ports) - 1;
-+
-+	/** TODO: Handle USBr port? How, though? **/
-+	pci_update_config32(dev, XHCI_USB2PRM, ~XHCI_USB2PR_HCSEL, ehci_mask);
-+	pci_update_config32(dev, XHCI_USB3PRM, ~XHCI_USB3PR_SSEN,  xhci_mask);
-+
-+	/*
-+	 * Workaround for USB2PR / USB3PR value not surviving warm reset.
-+	 * Restore USB Port Routing registers if OS HC Switch driver has been executed.
-+	 */
-+	if (should_restore_xhci_smart_auto()) {
-+		/** FIXME: Derive values from mainboard code instead? **/
-+		pci_update_config32(dev, XHCI_USB2PR, ~XHCI_USB2PR_HCSEL, ehci_mask);
-+		pci_update_config32(dev, XHCI_USB3PR, ~XHCI_USB3PR_SSEN,  xhci_mask);
-+	}
-+
-+	/* Later stages shouldn't need the value of this bit */
-+	pci_and_config32(PCH_LPC_DEV, PMIR, ~PMIR_XHCI_SMART_AUTO);
-+
-+	/**
-+	 * FIXME: Things here depend on the chosen routing mode.
-+	 *        For now, implement both functions.
-+	 */
-+
-+	/* Route to EHCI if xHCI disabled or auto mode */
-+	if (usb_route == ROUTE_TO_EHCI) {
-+		if (!reset_usb2_ports(ehci_ports))
-+			printk(BIOS_ERR, "USB2 port reset timed out\n");
-+
-+		pci_and_config32(dev, XHCI_USB2PR, ~XHCI_USB2PR_HCSEL);
-+
-+		for (unsigned int port = 0; port < ehci_ports; port++) {
-+			clrsetbits32(
-+				xhci_bar + XHCI_USB2_PORTSC(port),
-+				XHCI_USB2_PORTSC_PED,
-+				XHCI_USB2_PORTSC_CHST);
-+		}
-+
-+		if (!warm_reset_usb3_ports(xhci_ports))
-+			printk(BIOS_ERR, "USB3 warm reset timed out\n");
-+
-+		/* FIXME: BWG says this should be inside the warm reset function */
-+		pci_and_config32(dev, XHCI_USB3PR, ~XHCI_USB3PR_SSEN);
-+
-+		for (unsigned int port = 0; port < ehci_ports; port++) {
-+			clrsetbits32(
-+				xhci_bar + XHCI_USB3_PORTSC(port),
-+				XHCI_USB3_PORTSC_PED,
-+				XHCI_USB3_PORTSC_CHST);
-+		}
-+
-+		setbits32(xhci_bar + XHCI_USBCMD, BIT(0));
-+		clrbits32(xhci_bar + XHCI_USBCMD, BIT(0));
-+	}
-+
-+	/* Route to xHCI if xHCI enabled */
-+	if (usb_route == ROUTE_TO_XHCI) {
-+		if (is_mem_sr()) {
-+			if (!warm_reset_usb3_ports(xhci_ports))
-+				printk(BIOS_ERR, "USB3 warm reset timed out\n");
-+		}
-+
-+		const uint32_t xhci_port_mask = pci_read_config32(dev, XHCI_USB3PRM) & 0x3f;
-+		pci_update_config32(dev, XHCI_USB3PR, ~XHCI_USB3PR_SSEN, xhci_port_mask);
-+
-+		const uint32_t ehci_port_mask = pci_read_config32(dev, XHCI_USB2PRM) & 0x7fff;
-+		pci_update_config32(dev, XHCI_USB2PR, ~XHCI_USB2PR_HCSEL, ehci_port_mask);
-+	}
-+}
-+
-+/* Do not shift in this macro, as it can cause undefined behaviour for bad port/oc values */
-+#define PORT_TO_OC_SHIFT(port, oc)	((oc) * 8 + (port))
-+
-+/* Avoid shifting into undefined behaviour */
-+static inline bool shift_ok(const int shift)
-+{
-+	return shift >= 0 && shift < 32;
-+}
-+
-+static void usb_overcurrent_mapping(void)
-+{
-+	const bool is_lp = CONFIG(INTEL_LYNXPOINT_LP);
-+
-+	uint32_t ehci_1_ocmap = 0;
-+	uint32_t ehci_2_ocmap = 0;
-+	uint32_t xhci_1_ocmap = 0;
-+	uint32_t xhci_2_ocmap = 0;
-+
-+	/*
-+	 * EHCI
-+	 */
-+	for (unsigned int idx = 0; idx < physical_port_count(); idx++) {
-+		const struct usb2_port_config *const port = &mainboard_usb2_ports[idx];
-+		printk(BIOS_DEBUG, "USB2 port %u => ", idx);
-+		if (!port->enable) {
-+			printk(BIOS_DEBUG, "disabled\n");
-+			continue;
-+		}
-+		const unsigned short oc_pin = port->oc_pin;
-+		if (oc_pin == USB_OC_PIN_SKIP) {
-+			printk(BIOS_DEBUG, "not mapped to OC pin\n");
-+			continue;
-+		}
-+		/* Ports 0 .. 7 => OC 0 .. 3 */
-+		if (idx < 8 && oc_pin <= 3) {
-+			const int shift = PORT_TO_OC_SHIFT(idx, oc_pin);
-+			if (shift_ok(shift)) {
-+				printk(BIOS_DEBUG, "mapped to OC pin %u\n", oc_pin);
-+				ehci_1_ocmap |= 1 << shift;
-+				continue;
-+			}
-+		}
-+		/* Ports 8 .. 13 => OC 4 .. 7 (LPT-H only) */
-+		if (!is_lp && idx >= 8 && oc_pin >= 4) {
-+			const int shift = PORT_TO_OC_SHIFT(idx, oc_pin - 4);
-+			if (shift_ok(shift)) {
-+				printk(BIOS_DEBUG, "mapped to OC pin %u\n", oc_pin);
-+				ehci_2_ocmap |= 1 << shift;
-+				continue;
-+			}
-+		}
-+		printk(BIOS_ERR, "Invalid OC pin %u for USB2 port %u\n", oc_pin, idx);
-+	}
-+	printk(BIOS_DEBUG, "\n");
-+	pci_write_config32(PCH_EHCI1_DEV, EHCI_OCMAP, ehci_1_ocmap);
-+	if (!is_lp)
-+		pci_write_config32(PCH_EHCI2_DEV, EHCI_OCMAP, ehci_2_ocmap);
-+
-+	/*
-+	 * xHCI
-+	 */
-+	for (unsigned int idx = 0; idx < ss_port_count(); idx++) {
-+		const struct usb3_port_config *const port = &mainboard_usb3_ports[idx];
-+		printk(BIOS_DEBUG, "USB3 port %u => ", idx);
-+		if (!port->enable) {
-+			printk(BIOS_DEBUG, "disabled\n");
-+			continue;
-+		}
-+		const unsigned short oc_pin = port->oc_pin;
-+		if (oc_pin == USB_OC_PIN_SKIP) {
-+			printk(BIOS_DEBUG, "not mapped to OC pin\n");
-+			continue;
-+		}
-+		/* Ports 0 .. 5 => OC 0 .. 3 */
-+		if (oc_pin <= 3) {
-+			const int shift = PORT_TO_OC_SHIFT(idx, oc_pin);
-+			if (shift_ok(shift)) {
-+				printk(BIOS_DEBUG, "mapped to OC pin %u\n", oc_pin);
-+				xhci_1_ocmap |= 1 << shift;
-+				continue;
-+			}
-+		}
-+		/* Ports 0 .. 5 => OC 4 .. 7 (LPT-H only) */
-+		if (!is_lp && oc_pin >= 4) {
-+			const int shift = PORT_TO_OC_SHIFT(idx, oc_pin - 4);
-+			if (shift_ok(shift)) {
-+				printk(BIOS_DEBUG, "mapped to OC pin %u\n", oc_pin);
-+				xhci_2_ocmap |= 1 << shift;
-+				continue;
-+			}
-+		}
-+		printk(BIOS_ERR, "Invalid OC pin %u for USB3 port %u\n", oc_pin, idx);
-+	}
-+	printk(BIOS_DEBUG, "\n");
-+	pci_write_config32(PCH_XHCI_DEV, XHCI_U2OCM1, ehci_1_ocmap);
-+	pci_write_config32(PCH_XHCI_DEV, XHCI_U3OCM1, xhci_1_ocmap);
-+	if (!is_lp) {
-+		pci_write_config32(PCH_XHCI_DEV, XHCI_U2OCM2, ehci_2_ocmap);
-+		pci_write_config32(PCH_XHCI_DEV, XHCI_U3OCM2, xhci_2_ocmap);
-+	}
-+}
-+
-+static uint8_t get_ehci_tune_param_1(const struct usb2_port_config *const port)
-+{
-+	const bool is_lp = CONFIG(INTEL_LYNXPOINT_LP);
-+
-+	const enum pch_platform_type plat_type = get_pch_platform_type();
-+	const enum usb2_port_location location = port->location;
-+	const uint16_t length = port->length;
-+	if (!is_lp) {
-+		if (plat_type == PCH_TYPE_DESKTOP) {
-+			if (location == USB_PORT_BACK_PANEL)
-+				return 4; /* Back Panel */
-+			else
-+				return 3; /* Front Panel */
-+
-+		} else if (plat_type == PCH_TYPE_MOBILE) {
-+			if (location == USB_PORT_INTERNAL)
-+				return 5; /* Internal Topology */
-+			else if (location == USB_PORT_DOCK)
-+				return 4; /* Dock */
-+			else if (length < 0x70)
-+				return 5; /* Back Panel, less than 7" */
-+			else
-+				return 6; /* Back Panel, 7" or more */
-+		}
-+	} else {
-+		if (location == USB_PORT_BACK_PANEL || location == USB_PORT_MINI_PCIE) {
-+			if (length < 0x70)
-+				return 5; /* Back Panel, less than 7" */
-+			else
-+				return 6; /* Back Panel, 7" or more */
-+		} else if (location == USB_PORT_DOCK) {
-+			return 4; /* Dock */
-+		} else {
-+			return 5; /* Internal Topology */
-+		}
-+	}
-+	printk(BIOS_ERR, "%s: Unhandled case\n", __func__);
-+	return 0;
-+}
-+
-+static uint8_t get_ehci_tune_param_2(const struct usb2_port_config *const port)
-+{
-+	const bool is_lp = CONFIG(INTEL_LYNXPOINT_LP);
-+
-+	const enum pch_platform_type plat_type = get_pch_platform_type();
-+	const enum usb2_port_location location = port->location;
-+	const uint16_t length = port->length;
-+	if (!is_lp) {
-+		if (plat_type == PCH_TYPE_DESKTOP) {
-+			if (location == USB_PORT_BACK_PANEL) {
-+				if (length < 0x80)
-+					return 2; /* Back Panel, less than 8" */
-+				else if (length < 0x130)
-+					return 3; /* Back Panel, 8"-13" */
-+				else
-+					return 4; /* Back Panel, 13" or more */
-+			} else {
-+				return 2; /* Front Panel */
-+			}
-+
-+		} else if (plat_type == PCH_TYPE_MOBILE) {
-+			if (location == USB_PORT_INTERNAL) {
-+				return 2; /* Internal Topology */
-+			} else if (location == USB_PORT_DOCK) {
-+				if (length < 0x50)
-+					return 1; /* Dock, less than 5" */
-+				else
-+					return 2; /* Dock, 5" or more */
-+			} else {
-+				if (length < 0x100)
-+					return 2; /* Back Panel, less than 10" */
-+				else
-+					return 3; /* Back Panel, 10" or more */
-+			}
-+		}
-+	} else {
-+		if (location == USB_PORT_BACK_PANEL || location == USB_PORT_MINI_PCIE) {
-+			if (length < 0x100)
-+				return 2; /* Back Panel, less than 10" */
-+			else
-+				return 3; /* Back Panel, 10" or more */
-+		} else if (location == USB_PORT_DOCK) {
-+			if (length < 0x50)
-+				return 1; /* Dock, less than 5" */
-+			else
-+				return 2; /* Dock, 5" or more */
-+		} else {
-+			return 2; /* Internal Topology */
-+		}
-+	}
-+	printk(BIOS_ERR, "%s: Unhandled case\n", __func__);
-+	return 0;
-+}
-+
-+static void program_ehci_port_length(void)
-+{
-+	for (unsigned int port = 0; port < physical_port_count(); port++) {
-+		if (!mainboard_usb2_ports[port].enable)
-+			continue;
-+		const uint32_t addr = 0xe5004000 + (port + 1) * 0x100;
-+		const uint8_t param_1 = get_ehci_tune_param_1(&mainboard_usb2_ports[port]);
-+		const uint8_t param_2 = get_ehci_tune_param_2(&mainboard_usb2_ports[port]);
-+		pch_iobp_update(addr, ~0x7f00, param_2 << 11 | param_1 << 8);
-+	}
-+}
-+
-+void early_usb_init(void)
-+{
-+	/** TODO: Make this configurable? How do the modes affect usbdebug? **/
-+	const enum usb_port_route usb_route = ROUTE_TO_XHCI;
-+	///(pd->boot_mode == 2 && pd->usb_xhci_on_resume) ? ROUTE_TO_XHCI : ROUTE_TO_EHCI;
-+
-+	common_ehci_hcs_init();
-+	xhci_open_memory_space();
-+	common_xhci_hc_init();
-+	perform_xhci_ehci_switching_flow(usb_route);
-+	usb_overcurrent_mapping();
-+	program_ehci_port_length();
-+	/** FIXME: USB per port control is missing, is it needed? **/
-+	xhci_close_memory_space();
-+	/** TODO: Close EHCI memory space? **/
-+}
-diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
-index b5e0c2a830..ad983d86cf 100644
---- a/src/southbridge/intel/lynxpoint/pch.h
-+++ b/src/southbridge/intel/lynxpoint/pch.h
-@@ -115,6 +115,7 @@ enum pch_platform_type {
- 
- void pch_dmi_setup_physical_layer(void);
- void pch_dmi_tc_vc_mapping(u32 vc0, u32 vc1, u32 vcp, u32 vcm);
-+void early_usb_init(void);
- 
- void usb_ehci_sleep_prepare(pci_devfn_t dev, u8 slp_typ);
- void usb_ehci_disable(pci_devfn_t dev);
-@@ -202,6 +203,8 @@ void mainboard_config_rcba(void);
- #define GEN_PMCON_1		0xa0
- #define  SMI_LOCK		(1 << 4)
- #define GEN_PMCON_2		0xa2
-+#define  GEN_PMCON_2_DISB	(1 << 7)
-+#define  GEN_PMCON_2_MEM_SR	(1 << 5)
- #define  SYSTEM_RESET_STS	(1 << 4)
- #define  THERMTRIP_STS		(1 << 3)
- #define  SYSPWR_FLR		(1 << 1)
-@@ -215,6 +218,7 @@ void mainboard_config_rcba(void);
- #define PMIR			0xac
- #define  PMIR_CF9LOCK		(1 << 31)
- #define  PMIR_CF9GR		(1 << 20)
-+#define  PMIR_XHCI_SMART_AUTO	(1 << 16) /* c.f. LPT BWG or WPT-LP BIOS spec */
- 
- /* GEN_PMCON_3 bits */
- #define RTC_BATTERY_DEAD	(1 << 2)
-@@ -282,6 +286,20 @@ void mainboard_config_rcba(void);
- #define SATA_DTLE_DATA_SHIFT	24
- #define SATA_DTLE_EDGE_SHIFT	16
- 
-+/*
-+ * HCD_INDEX == 2 selects 0:1a.0 (PCH_EHCI2), any other index
-+ * selects 0:1d.0 (PCH_EHCI1) for usbdebug use.
-+ */
-+#if CONFIG_USBDEBUG_HCD_INDEX != 2
-+#define PCH_EHCI1_TEMP_BAR0 CONFIG_EHCI_BAR
-+#define PCH_EHCI2_TEMP_BAR0 (PCH_EHCI1_TEMP_BAR0 + 0x400)
-+#else
-+#define PCH_EHCI2_TEMP_BAR0 CONFIG_EHCI_BAR
-+#define PCH_EHCI1_TEMP_BAR0 (PCH_EHCI2_TEMP_BAR0 + 0x400)
-+#endif
-+
-+#define PCH_XHCI_TEMP_BAR0	0xe8100000
-+
- /* EHCI PCI Registers */
- #define EHCI_PWR_CTL_STS	0x54
- #define  PWR_CTL_SET_MASK	0x3
-@@ -289,10 +307,15 @@ void mainboard_config_rcba(void);
- #define  PWR_CTL_SET_D3		0x3
- #define  PWR_CTL_ENABLE_PME	(1 << 8)
- #define  PWR_CTL_STATUS_PME	(1 << 15)
-+#define EHCI_OCMAP		0x74
-+#define EHCI_ACCESS_CNTL	0x80
-+#define  ACCESS_CNTL_ENABLE	(1 << 0)
- 
- /* EHCI Memory Registers */
-+#define EHCI_HCS_PARAMS		0x04
- #define EHCI_USB_CMD		0x20
- #define  EHCI_USB_CMD_RUN	(1 << 0)
-+#define  EHCI_USB_CMD_HCRESET	(1 << 1)
- #define  EHCI_USB_CMD_PSE	(1 << 4)
- #define  EHCI_USB_CMD_ASE	(1 << 5)
- #define EHCI_PORTSC(port)	(0x64 + (port) * 4)
-@@ -301,6 +324,10 @@ void mainboard_config_rcba(void);
- 
- /* XHCI PCI Registers */
- #define XHCI_PWR_CTL_STS	0x74
-+#define XHCI_U2OCM1		0xc0
-+#define XHCI_U2OCM2		0xc4
-+#define XHCI_U3OCM1		0xc8
-+#define XHCI_U3OCM2		0xcc
- #define XHCI_USB2PR		0xd0
- #define XHCI_USB2PRM		0xd4
- #define  XHCI_USB2PR_HCSEL	0x7fff
-@@ -313,6 +340,27 @@ void mainboard_config_rcba(void);
- #define XHCI_USB3PDO		0xe8
- 
- /* XHCI Memory Registers */
-+#define XHCI_HCS_PARAMS_1	0x04
-+#define XHCI_HCS_PARAMS_2	0x08
-+#define XHCI_HCS_PARAMS_3	0x0c
-+#define XHCI_HCC_PARAMS		0x10
-+#define XHCI_USBCMD		0x80
-+#define XHCI_USB2_PORTSC(port)	(0x480 + ((port) * 0x10))
-+#define  XHCI_USB2_PORTSC_WPR	(1 << 31)	/* Warm Port Reset */
-+#define  XHCI_USB2_PORTSC_CEC	(1 << 23)	/* Port Config Error Change */
-+#define  XHCI_USB2_PORTSC_PLC	(1 << 22)	/* Port Link State Change */
-+#define  XHCI_USB2_PORTSC_PRC	(1 << 21)	/* Port Reset Change */
-+#define  XHCI_USB2_PORTSC_OCC	(1 << 20)	/* Over-current Change */
-+#define  XHCI_USB2_PORTSC_WRC	(1 << 19)	/* Warm Port Reset Change */
-+#define  XHCI_USB2_PORTSC_PEC	(1 << 18)	/* Port Enabled Disabled Change */
-+#define  XHCI_USB2_PORTSC_CSC	(1 << 17)	/* Connect Status Change */
-+#define  XHCI_USB2_PORTSC_CHST	(0x7f << 17)
-+#define  XHCI_USB2_PORTSC_LWS	(1 << 16)	/* Port Link State Write Strobe */
-+#define  XHCI_USB2_PORTSC_PP	(1 <<  9)
-+#define  XHCI_USB2_PORTSC_PR	(1 <<  4)	/* Port Reset */
-+#define  XHCI_USB2_PORTSC_PED	(1 <<  1)	/* Port Enable/Disabled */
-+#define  XHCI_USB2_PORTSC_CCS	(1 <<  0)	/* Current Connect Status */
-+
- #define XHCI_USB3_PORTSC(port)	((pch_is_lp() ? 0x510 : 0x570) + ((port) * 0x10))
- #define  XHCI_USB3_PORTSC_CHST	(0x7f << 17)
- #define  XHCI_USB3_PORTSC_WCE	(1 << 25)	/* Wake on Connect */
-@@ -320,6 +368,7 @@ void mainboard_config_rcba(void);
- #define  XHCI_USB3_PORTSC_WOE	(1 << 27)	/* Wake on Overcurrent */
- #define  XHCI_USB3_PORTSC_WRC	(1 << 19)	/* Warm Reset Complete */
- #define  XHCI_USB3_PORTSC_LWS	(1 << 16)	/* Link Write Strobe */
-+#define  XHCI_USB3_PORTSC_PR	(1 << 4)	/* Port Reset */
- #define  XHCI_USB3_PORTSC_PED	(1 << 1)	/* Port Enabled/Disabled */
- #define  XHCI_USB3_PORTSC_WPR	(1 << 31)	/* Warm Port Reset */
- #define  XHCI_USB3_PORTSC_PLS	(0xf << 5)	/* Port Link State */
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0016-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch b/config/coreboot/haswell/patches/0006-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
similarity index 95%
rename from config/coreboot/haswell/patches/0016-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
rename to config/coreboot/haswell/patches/0006-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
index c321d239..ea46364f 100644
--- a/config/coreboot/haswell/patches/0016-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
+++ b/config/coreboot/haswell/patches/0006-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
@@ -1,7 +1,7 @@
-From d24def01ec15f41a48331ef1e236270b2df90b84 Mon Sep 17 00:00:00 2001
+From 1ea9b05694da7ee61d49d9cd2b7e533a98e42321 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 21:49:40 +0200
-Subject: [PATCH 16/26] haswell NRI: Add DDR3 JEDEC reset and init
+Subject: [PATCH 06/20] haswell NRI: Add DDR3 JEDEC reset and init
 
 Implement JEDEC reset and init sequence for DDR3. The MRS commands are
 issued through the REUT (Robust Electrical Unified Testing) hardware.
@@ -9,25 +9,25 @@ issued through the REUT (Robust Electrical Unified Testing) hardware.
 Change-Id: I2a0c066537021b587599228086727cb1e041bff5
 Signed-off-by: Angel Pons <th3fanbus@gmail.com>
 ---
- .../intel/haswell/native_raminit/Makefile.inc |   3 +
+ .../intel/haswell/native_raminit/Makefile.mk  |   3 +
  .../intel/haswell/native_raminit/ddr3.c       | 217 ++++++++++++++++++
  .../haswell/native_raminit/io_comp_control.c  |  19 ++
  .../haswell/native_raminit/jedec_reset.c      | 120 ++++++++++
  .../haswell/native_raminit/raminit_main.c     |   2 +
- .../haswell/native_raminit/raminit_native.h   | 101 ++++++++
+ .../haswell/native_raminit/raminit_native.h   |  99 ++++++++
  .../haswell/native_raminit/reg_structs.h      | 154 +++++++++++++
  .../intel/haswell/native_raminit/reut.c       | 196 ++++++++++++++++
  .../intel/haswell/registers/mchbar.h          |  21 ++
  src/southbridge/intel/lynxpoint/pch.h         |   2 +
- 10 files changed, 835 insertions(+)
+ 10 files changed, 833 insertions(+)
  create mode 100644 src/northbridge/intel/haswell/native_raminit/ddr3.c
  create mode 100644 src/northbridge/intel/haswell/native_raminit/jedec_reset.c
  create mode 100644 src/northbridge/intel/haswell/native_raminit/reut.c
 
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 index 37d527e972..e9212df9e6 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+--- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
++++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 @@ -1,11 +1,14 @@
  ## SPDX-License-Identifier: GPL-2.0-or-later
  
@@ -267,7 +267,7 @@ index 0000000000..6ddb11488b
 +	return reut_issue_zq(ctrl, ctrl->chanmap, ZQ_INIT);
 +}
 diff --git a/src/northbridge/intel/haswell/native_raminit/io_comp_control.c b/src/northbridge/intel/haswell/native_raminit/io_comp_control.c
-index 7e96c08938..ad8c848e57 100644
+index d45b608dd3..8a55fd81b2 100644
 --- a/src/northbridge/intel/haswell/native_raminit/io_comp_control.c
 +++ b/src/northbridge/intel/haswell/native_raminit/io_comp_control.c
 @@ -8,6 +8,25 @@
@@ -423,10 +423,10 @@ index 0000000000..de0f676758
 +	return status;
 +}
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 136a8ba989..73ff180b8c 100644
+index 559dfc3a4e..94b268468c 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -25,6 +25,7 @@ static const struct task_entry cold_boot[] = {
+@@ -24,6 +24,7 @@ static const struct task_entry cold_boot[] = {
  	{ convert_timings,                                        true, "CONVTIM",    },
  	{ configure_mc,                                           true, "CONFMC",     },
  	{ configure_memory_map,                                   true, "MEMMAP",     },
@@ -434,7 +434,7 @@ index 136a8ba989..73ff180b8c 100644
  };
  
  /* Return a generic stepping value to make stepping checks simpler */
-@@ -58,6 +59,7 @@ static void initialize_ctrl(struct sysinfo *ctrl)
+@@ -57,6 +58,7 @@ static void initialize_ctrl(struct sysinfo *ctrl)
  	ctrl->stepping = get_stepping(ctrl->cpu);
  	ctrl->vdd_mv = is_hsw_ult() ? 1350 : 1500; /** FIXME: Hardcoded, does it matter? **/
  	ctrl->dq_pins_interleaved = cfg->dq_pins_interleaved;
@@ -443,7 +443,7 @@ index 136a8ba989..73ff180b8c 100644
  }
  
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 4763b25e8d..e3cf4254a0 100644
+index 4763b25e8d..4bc2a4955f 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 @@ -27,6 +27,30 @@
@@ -498,25 +498,23 @@ index 4763b25e8d..e3cf4254a0 100644
  	union tc_bank_rank_c_reg tc_bankrank_c[NUM_CHANNELS];
  	union tc_bank_rank_d_reg tc_bankrank_d[NUM_CHANNELS];
 +
-+	uint16_t mr0[NUM_CHANNELS][NUM_SLOTRANKS];
-+	uint16_t mr1[NUM_CHANNELS][NUM_SLOTRANKS];
-+	uint16_t mr2[NUM_CHANNELS][NUM_SLOTRANKS];
-+	uint16_t mr3[NUM_CHANNELS][NUM_SLOTRANKS];
++	uint16_t mr0[NUM_CHANNELS][NUM_SLOTS];
++	uint16_t mr1[NUM_CHANNELS][NUM_SLOTS];
++	uint16_t mr2[NUM_CHANNELS][NUM_SLOTS];
++	uint16_t mr3[NUM_CHANNELS][NUM_SLOTS];
  };
  
  static inline bool is_hsw_ult(void)
-@@ -196,6 +227,55 @@ static inline void clear_data_offset_train_all(struct sysinfo *ctrl)
+@@ -196,6 +227,53 @@ static inline void clear_data_offset_train_all(struct sysinfo *ctrl)
  	memset(ctrl->data_offset_train, 0, sizeof(ctrl->data_offset_train));
  }
  
 +/* Number of ticks to wait in units of 69.841279 ns (citation needed) */
 +static inline void tick_delay(const uint32_t delay)
 +{
-+	volatile uint32_t junk;
-+
 +	/* Just perform reads to a random register */
 +	for (uint32_t start = 0; start <= delay; start++)
-+		junk = mchbar_read32(REUT_ERR_DATA_STATUS);
++		mchbar_read32(REUT_ERR_DATA_STATUS);
 +}
 +
 +/*
@@ -561,7 +559,7 @@ index 4763b25e8d..e3cf4254a0 100644
  void raminit_main(enum raminit_boot_mode bootmode);
  
  enum raminit_status collect_spd_info(struct sysinfo *ctrl);
-@@ -203,6 +283,7 @@ enum raminit_status initialise_mpll(struct sysinfo *ctrl);
+@@ -203,6 +281,7 @@ enum raminit_status initialise_mpll(struct sysinfo *ctrl);
  enum raminit_status convert_timings(struct sysinfo *ctrl);
  enum raminit_status configure_mc(struct sysinfo *ctrl);
  enum raminit_status configure_memory_map(struct sysinfo *ctrl);
@@ -569,7 +567,7 @@ index 4763b25e8d..e3cf4254a0 100644
  
  void configure_timings(struct sysinfo *ctrl);
  void configure_refresh(struct sysinfo *ctrl);
-@@ -215,8 +296,28 @@ uint32_t get_tXS_offset(uint32_t mem_clock_mhz);
+@@ -215,8 +294,28 @@ uint32_t get_tXS_offset(uint32_t mem_clock_mhz);
  uint32_t get_tZQOPER(uint32_t mem_clock_mhz, bool lpddr);
  uint32_t get_tZQCS(uint32_t mem_clock_mhz, bool lpddr);
  
@@ -779,7 +777,7 @@ index 70487e1640..9929f617fe 100644
  	struct __packed {
 diff --git a/src/northbridge/intel/haswell/native_raminit/reut.c b/src/northbridge/intel/haswell/native_raminit/reut.c
 new file mode 100644
-index 0000000000..c55cdd9c7e
+index 0000000000..31019f74a1
 --- /dev/null
 +++ b/src/northbridge/intel/haswell/native_raminit/reut.c
 @@ -0,0 +1,196 @@
@@ -938,9 +936,9 @@ index 0000000000..c55cdd9c7e
 +{
 +	/** TODO: Issuing ZQ commands differs for LPDDR **/
 +	if (ctrl->lpddr)
-+		die("%s: LPDDR not yet supported in ZQ calibration\n");
++		die("%s: LPDDR not yet supported in ZQ calibration\n", __func__);
 +
-+	uint8_t opcode; /* NOTE: Only used for LPDDR */
++	__maybe_unused uint8_t opcode; /* NOTE: Only used for LPDDR */
 +	uint16_t zq = 0;
 +	switch (zq_type) {
 +	case ZQ_INIT:
@@ -958,7 +956,7 @@ index 0000000000..c55cdd9c7e
 +		opcode = 0xc3;
 +		break;
 +	default:
-+		die("%s: ZQ type %u is invalid\n", zq_type);
++		die("%s: ZQ type %u is invalid\n", __func__, zq_type);
 +	}
 +
 +	/* ZQCS on single-channel needs a longer delay */
@@ -1021,7 +1019,7 @@ index 2acc5cbbc8..4fc78a7f43 100644
  
  /* MCDECS */
 diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
-index 74b4d50017..16bef5032a 100644
+index 07f4b9dc16..5b3696347c 100644
 --- a/src/southbridge/intel/lynxpoint/pch.h
 +++ b/src/southbridge/intel/lynxpoint/pch.h
 @@ -586,6 +586,8 @@ void mainboard_config_rcba(void);
diff --git a/config/coreboot/haswell/patches/0006-sb-intel-lynxpoint-Add-native-thermal-init.patch b/config/coreboot/haswell/patches/0006-sb-intel-lynxpoint-Add-native-thermal-init.patch
deleted file mode 100644
index 157d2999..00000000
--- a/config/coreboot/haswell/patches/0006-sb-intel-lynxpoint-Add-native-thermal-init.patch
+++ /dev/null
@@ -1,128 +0,0 @@
-From 92be49d8422b4bc1c89bb49535f4dc6a01d47295 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Fri, 6 May 2022 23:22:11 +0200
-Subject: [PATCH 06/26] sb/intel/lynxpoint: Add native thermal init
-
-Implement native thermal initialisation for Lynx Point. This is only
-needed when MRC.bin is not used.
-
-Change-Id: I4a67a3092d0c2e56bfdacb513a899ef838193cbd
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../haswell/native_raminit/raminit_native.c   |  1 +
- src/southbridge/intel/lynxpoint/Makefile.inc  |  2 +-
- src/southbridge/intel/lynxpoint/pch.h         |  1 +
- src/southbridge/intel/lynxpoint/thermal.c     | 64 +++++++++++++++++++
- 4 files changed, 67 insertions(+), 1 deletion(-)
- create mode 100644 src/southbridge/intel/lynxpoint/thermal.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-index ef61d4ee09..dd1f1ec14e 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-@@ -16,6 +16,7 @@ static bool early_init_native(int s3resume)
- 	/** TODO: CPU replacement check must be skipped in warm boots and S3 resumes **/
- 	const bool cpu_replaced = !s3resume && intel_early_me_cpu_replacement_check();
- 
-+	early_thermal_init();
- 	early_usb_init();
- 
- 	if (!CONFIG(INTEL_LYNXPOINT_LP))
-diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc
-index 0e1f2fe4eb..a9a9b153d6 100644
---- a/src/southbridge/intel/lynxpoint/Makefile.inc
-+++ b/src/southbridge/intel/lynxpoint/Makefile.inc
-@@ -37,7 +37,7 @@ bootblock-y += early_pch.c
- romstage-y += early_usb.c early_me.c me_status.c early_pch.c
- romstage-y += pmutil.c
- 
--romstage-$(CONFIG_USE_NATIVE_RAMINIT) += early_pch_native.c early_usb_native.c iobp.c
-+romstage-$(CONFIG_USE_NATIVE_RAMINIT) += early_pch_native.c early_usb_native.c iobp.c thermal.c
- 
- ifeq ($(CONFIG_INTEL_LYNXPOINT_LP),y)
- romstage-y += lp_gpio.c
-diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
-index ad983d86cf..38a9349220 100644
---- a/src/southbridge/intel/lynxpoint/pch.h
-+++ b/src/southbridge/intel/lynxpoint/pch.h
-@@ -116,6 +116,7 @@ enum pch_platform_type {
- void pch_dmi_setup_physical_layer(void);
- void pch_dmi_tc_vc_mapping(u32 vc0, u32 vc1, u32 vcp, u32 vcm);
- void early_usb_init(void);
-+void early_thermal_init(void);
- 
- void usb_ehci_sleep_prepare(pci_devfn_t dev, u8 slp_typ);
- void usb_ehci_disable(pci_devfn_t dev);
-diff --git a/src/southbridge/intel/lynxpoint/thermal.c b/src/southbridge/intel/lynxpoint/thermal.c
-new file mode 100644
-index 0000000000..e71969ea0c
---- /dev/null
-+++ b/src/southbridge/intel/lynxpoint/thermal.c
-@@ -0,0 +1,64 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <device/mmio.h>
-+#include <device/pci_ops.h>
-+#include <southbridge/intel/lynxpoint/pch.h>
-+#include <types.h>
-+
-+#define TBARB_TEMP 0x40000000
-+
-+#define THERMAL_DEV PCI_DEV(0, 0x1f, 6)
-+
-+/* Early thermal init, it may need to be done prior to giving ME its memory */
-+void early_thermal_init(void)
-+{
-+	/* Program address for temporary BAR */
-+	pci_write_config32(THERMAL_DEV, 0x40, TBARB_TEMP);
-+	pci_write_config32(THERMAL_DEV, 0x44, 0);
-+
-+	/* Activate temporary BAR */
-+	pci_or_config32(THERMAL_DEV, 0x40, 1);
-+
-+	/*
-+	 * BWG section 17.3.1 says:
-+	 *
-+	 * ### Initializing Lynx Point Thermal Sensors ###
-+	 *
-+	 * The System BIOS must perform the following steps to initialize the Lynx
-+	 * Point thermal subsystem device, D31:F6. The System BIOS is required to
-+	 * repeat this process on a resume from Sx. BIOS may enable any or all of
-+	 * the registers below based on OEM's platform configuration. Intel does
-+	 * not recommend a value on some of the registers, since each platform has
-+	 * different temperature trip points and one may enable a trip to cause an
-+	 * SMI while another platform would cause an interrupt instead.
-+	 *
-+	 * The recommended flow for enabling thermal sensor is by setting up various
-+	 * temperature trip points first, followed by enabling the desired trip
-+	 * alert method and then enable the actual sensors from TSEL registers.
-+	 * If this flow is not followed, software will need to take special care
-+	 * to handle false events during setting up those registers.
-+	 */
-+
-+	/* Step 1: Program CTT */
-+	write16p(TBARB_TEMP + 0x10, 0x0154);
-+
-+	/* Step 2: Clear trip status from TSS and TAS */
-+	write8p(TBARB_TEMP + 0x06, 0xff);
-+	write8p(TBARB_TEMP + 0x80, 0xff);
-+
-+	/* Step 3: Program TSGPEN and TSPIEN to zero */
-+	write8p(TBARB_TEMP + 0x84, 0x00);
-+	write8p(TBARB_TEMP + 0x82, 0x00);
-+
-+	/*
-+	 * Step 4: If thermal reporting to an EC over SMBus is supported,
-+	 *         then write 0x01 to TSREL, else leave at default.
-+	 */
-+	write8p(TBARB_TEMP + 0x0a, 0x01);
-+
-+	/* Disable temporary BAR */
-+	pci_and_config32(THERMAL_DEV, 0x40, ~1);
-+
-+	/* Clear temporary BAR address */
-+	pci_write_config32(THERMAL_DEV, 0x40, 0);
-+}
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0017-haswell-NRI-Add-pre-training-steps.patch b/config/coreboot/haswell/patches/0007-haswell-NRI-Add-pre-training-steps.patch
similarity index 93%
rename from config/coreboot/haswell/patches/0017-haswell-NRI-Add-pre-training-steps.patch
rename to config/coreboot/haswell/patches/0007-haswell-NRI-Add-pre-training-steps.patch
index e4cea123..8b73df88 100644
--- a/config/coreboot/haswell/patches/0017-haswell-NRI-Add-pre-training-steps.patch
+++ b/config/coreboot/haswell/patches/0007-haswell-NRI-Add-pre-training-steps.patch
@@ -1,7 +1,7 @@
-From 42e43eb210bbb172af8e5ad064326c4570be8654 Mon Sep 17 00:00:00 2001
+From 936d432822fcd9aa2f018444cdc89e48e6d257d5 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 23:12:18 +0200
-Subject: [PATCH 17/26] haswell NRI: Add pre-training steps
+Subject: [PATCH 07/20] haswell NRI: Add pre-training steps
 
 Implement pre-training steps, which consist of enabling ECC I/O and
 filling the WDB (Write Data Buffer, stores test patterns) through a
@@ -10,19 +10,19 @@ magic LDAT port.
 Change-Id: Ie2e09e3b218c4569ed8de5c5e1b05d491032e0f1
 Signed-off-by: Angel Pons <th3fanbus@gmail.com>
 ---
- .../intel/haswell/native_raminit/Makefile.inc |   1 +
- .../haswell/native_raminit/raminit_main.c     |  34 ++++
+ .../intel/haswell/native_raminit/Makefile.mk  |   1 +
+ .../haswell/native_raminit/raminit_main.c     |  35 ++++
  .../haswell/native_raminit/raminit_native.h   |  24 +++
  .../haswell/native_raminit/reg_structs.h      |  45 +++++
  .../intel/haswell/native_raminit/setup_wdb.c  | 159 ++++++++++++++++++
  .../intel/haswell/registers/mchbar.h          |   9 +
- 6 files changed, 272 insertions(+)
+ 6 files changed, 273 insertions(+)
  create mode 100644 src/northbridge/intel/haswell/native_raminit/setup_wdb.c
 
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 index e9212df9e6..8d7d4e4db0 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+--- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
++++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 @@ -10,5 +10,6 @@ romstage-y += memory_map.c
  romstage-y += raminit_main.c
  romstage-y += raminit_native.c
@@ -31,10 +31,18 @@ index e9212df9e6..8d7d4e4db0 100644
  romstage-y += spd_bitmunching.c
  romstage-y += timings_refresh.c
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 73ff180b8c..5e4674957d 100644
+index 94b268468c..5e4674957d 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -13,6 +13,39 @@
+@@ -3,6 +3,7 @@
+ #include <assert.h>
+ #include <console/console.h>
+ #include <cpu/intel/haswell/haswell.h>
++#include <delay.h>
+ #include <device/pci_ops.h>
+ #include <northbridge/intel/haswell/chip.h>
+ #include <northbridge/intel/haswell/haswell.h>
+@@ -12,6 +13,39 @@
  
  #include "raminit_native.h"
  
@@ -74,7 +82,7 @@ index 73ff180b8c..5e4674957d 100644
  struct task_entry {
  	enum raminit_status (*task)(struct sysinfo *);
  	bool is_enabled;
-@@ -26,6 +59,7 @@ static const struct task_entry cold_boot[] = {
+@@ -25,6 +59,7 @@ static const struct task_entry cold_boot[] = {
  	{ configure_mc,                                           true, "CONFMC",     },
  	{ configure_memory_map,                                   true, "MEMMAP",     },
  	{ do_jedec_init,                                          true, "JEDECINIT",  },
@@ -83,7 +91,7 @@ index 73ff180b8c..5e4674957d 100644
  
  /* Return a generic stepping value to make stepping checks simpler */
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index e3cf4254a0..f29c2ec366 100644
+index 4bc2a4955f..1971b44b66 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 @@ -35,6 +35,13 @@
@@ -100,7 +108,7 @@ index e3cf4254a0..f29c2ec366 100644
  /* ZQ calibration types */
  enum {
  	ZQ_INIT,	/* DDR3: ZQCL with tZQinit, LPDDR3: ZQ Init  with tZQinit  */
-@@ -318,6 +325,23 @@ void reut_issue_mrs_all(
+@@ -316,6 +323,23 @@ void reut_issue_mrs_all(
  
  enum raminit_status reut_issue_zq(struct sysinfo *ctrl, uint8_t chanmask, uint8_t zq_type);
  
diff --git a/config/coreboot/haswell/patches/0007-sb-intel-lynxpoint-Add-native-PCH-init.patch b/config/coreboot/haswell/patches/0007-sb-intel-lynxpoint-Add-native-PCH-init.patch
deleted file mode 100644
index 74427f5d..00000000
--- a/config/coreboot/haswell/patches/0007-sb-intel-lynxpoint-Add-native-PCH-init.patch
+++ /dev/null
@@ -1,785 +0,0 @@
-From 7378cb4fefc87b9a096bb14820a44f26f3a628f5 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Fri, 6 May 2022 23:43:46 +0200
-Subject: [PATCH 07/26] sb/intel/lynxpoint: Add native PCH init
-
-Implement native PCH initialisation for Lynx Point. This is only needed
-when MRC.bin is not used.
-
-Change-Id: I36867bdc8b20000e44ff9d0d7b2c0d63952bd561
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../haswell/native_raminit/raminit_native.c   |   3 +-
- src/southbridge/intel/lynxpoint/Makefile.inc  |   1 +
- .../intel/lynxpoint/early_pch_native.c        | 123 +++++++++
- .../intel/lynxpoint/hsio/Makefile.inc         |   8 +
- src/southbridge/intel/lynxpoint/hsio/common.c |  52 ++++
- src/southbridge/intel/lynxpoint/hsio/hsio.h   |  46 ++++
- .../intel/lynxpoint/hsio/lpt_h_cx.c           | 244 ++++++++++++++++++
- .../intel/lynxpoint/hsio/lpt_lp_bx.c          | 180 +++++++++++++
- src/southbridge/intel/lynxpoint/pch.h         |   6 +
- 9 files changed, 661 insertions(+), 2 deletions(-)
- create mode 100644 src/southbridge/intel/lynxpoint/hsio/Makefile.inc
- create mode 100644 src/southbridge/intel/lynxpoint/hsio/common.c
- create mode 100644 src/southbridge/intel/lynxpoint/hsio/hsio.h
- create mode 100644 src/southbridge/intel/lynxpoint/hsio/lpt_h_cx.c
- create mode 100644 src/southbridge/intel/lynxpoint/hsio/lpt_lp_bx.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-index dd1f1ec14e..b6efb6b40d 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-@@ -16,8 +16,7 @@ static bool early_init_native(int s3resume)
- 	/** TODO: CPU replacement check must be skipped in warm boots and S3 resumes **/
- 	const bool cpu_replaced = !s3resume && intel_early_me_cpu_replacement_check();
- 
--	early_thermal_init();
--	early_usb_init();
-+	early_pch_init_native(s3resume);
- 
- 	if (!CONFIG(INTEL_LYNXPOINT_LP))
- 		dmi_early_init();
-diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc
-index a9a9b153d6..63243ecc86 100644
---- a/src/southbridge/intel/lynxpoint/Makefile.inc
-+++ b/src/southbridge/intel/lynxpoint/Makefile.inc
-@@ -38,6 +38,7 @@ romstage-y += early_usb.c early_me.c me_status.c early_pch.c
- romstage-y += pmutil.c
- 
- romstage-$(CONFIG_USE_NATIVE_RAMINIT) += early_pch_native.c early_usb_native.c iobp.c thermal.c
-+subdirs-$(CONFIG_USE_NATIVE_RAMINIT) += hsio
- 
- ifeq ($(CONFIG_INTEL_LYNXPOINT_LP),y)
- romstage-y += lp_gpio.c
-diff --git a/src/southbridge/intel/lynxpoint/early_pch_native.c b/src/southbridge/intel/lynxpoint/early_pch_native.c
-index c28ddfcf5d..421821fa5d 100644
---- a/src/southbridge/intel/lynxpoint/early_pch_native.c
-+++ b/src/southbridge/intel/lynxpoint/early_pch_native.c
-@@ -1,10 +1,133 @@
- /* SPDX-License-Identifier: GPL-2.0-or-later */
- 
- #include <console/console.h>
-+#include <device/pci_def.h>
- #include <device/pci_ops.h>
-+#include <southbridge/intel/lynxpoint/hsio/hsio.h>
- #include <southbridge/intel/lynxpoint/pch.h>
- #include <types.h>
- 
-+static void early_sata_init(const uint8_t pch_revision)
-+{
-+	const bool is_mobile = get_pch_platform_type() != PCH_TYPE_DESKTOP;
-+
-+	const uint8_t lane_owner = pci_read_config8(PCI_DEV(0, 0x1c, 0), 0x410);
-+	printk(BIOS_DEBUG, "HSIO lane owner: 0x%02x\n", lane_owner);
-+
-+	/* BWG Step 2 */
-+	pci_update_config32(PCH_SATA_DEV, SATA_SCLKG, ~0x1ff, 0x183);
-+
-+	/* BWG Step 3: Set OOB Retry Mode */
-+	pci_or_config16(PCH_SATA_DEV, SATA_PCS, 1 << 15);
-+
-+	/* BWG Step 4: Program the SATA mPHY tables */
-+	if (pch_is_lp()) {
-+		if (pch_revision >= LPT_LP_STEP_B0 && pch_revision <= LPT_LP_STEP_B2) {
-+			program_hsio_sata_lpt_lp_bx(is_mobile);
-+		} else {
-+			printk(BIOS_ERR, "Unsupported PCH-LP stepping 0x%02x\n", pch_revision);
-+		}
-+	} else {
-+		if (pch_revision >= LPT_H_STEP_C0) {
-+			program_hsio_sata_lpt_h_cx(is_mobile);
-+		} else {
-+			printk(BIOS_ERR, "Unsupported PCH-H stepping 0x%02x\n", pch_revision);
-+		}
-+	}
-+
-+	/** FIXME: Program SATA RxEq tables **/
-+
-+	/* BWG Step 5 */
-+	/** FIXME: Only for desktop and mobile (skip this on workstation and server) **/
-+	pci_or_config32(PCH_SATA_DEV, 0x98, BIT(22));
-+
-+	/* BWG Step 6 */
-+	pci_or_config32(PCH_SATA_DEV, 0x98, BIT(19));
-+
-+	/* BWG Step 7 */
-+	pci_update_config32(PCH_SATA_DEV, 0x98, ~(0x3f << 7), 0x04 << 7);
-+
-+	/* BWG Step 8 */
-+	pci_or_config32(PCH_SATA_DEV, 0x98, BIT(20));
-+
-+	/* BWG Step 9 */
-+	pci_update_config32(PCH_SATA_DEV, 0x98, ~(3 << 5), 1 << 5);
-+
-+	/* BWG Step 10 */
-+	pci_or_config32(PCH_SATA_DEV, 0x98, BIT(18));
-+
-+	/* Enable SATA ports */
-+	uint8_t sata_pcs = 0;
-+	if (CONFIG(INTEL_LYNXPOINT_LP)) {
-+		for (uint8_t i = 0; i < 4; i++) {
-+			if ((lane_owner & BIT(7 - i)) == 0) {
-+				sata_pcs |= BIT(i);
-+			}
-+		}
-+	} else {
-+		sata_pcs |= 0x0f;
-+		for (uint8_t i = 4; i < 6; i++) {
-+			if ((lane_owner & BIT(i)) == 0) {
-+				sata_pcs |= BIT(i);
-+			}
-+		}
-+	}
-+	printk(BIOS_DEBUG, "SATA port enables: 0x%02x\n", sata_pcs);
-+	pci_or_config8(PCH_SATA_DEV, SATA_PCS, sata_pcs);
-+}
-+
-+void early_pch_init_native(int s3resume)
-+{
-+	const uint8_t pch_revision = pci_read_config8(PCH_LPC_DEV, PCI_REVISION_ID);
-+
-+	RCBA16(DISPBDF) = 0x0010;
-+	RCBA32_OR(FD2, PCH_ENABLE_DBDF);
-+
-+	/** FIXME: Check GEN_PMCON_3 and handle RTC failure? **/
-+
-+	RCBA32(PRSTS) = BIT(4);
-+
-+	early_sata_init(pch_revision);
-+
-+	pci_or_config8(PCH_LPC_DEV, 0xa6, 1 << 1);
-+	pci_and_config8(PCH_LPC_DEV, 0xdc, ~(1 << 5 | 1 << 1));
-+
-+	/** TODO: Send GET HSIO VER and update ChipsetInit table? Is it needed? **/
-+
-+	/** FIXME: GbE handling? **/
-+
-+	pci_update_config32(PCH_LPC_DEV, 0xac, ~(1 << 20), 0);
-+
-+	for (uint8_t i = 0; i < 8; i++)
-+		pci_update_config32(PCI_DEV(0, 0x1c, i), 0x338, ~(1 << 26), 0);
-+
-+	pci_update_config8(PCI_DEV(0, 0x1c, 0), 0xf4, ~(3 << 5), 1 << 7);
-+
-+	pci_update_config8(PCI_DEV(0, 26, 0), 0x88, ~(1 << 2), 0);
-+	pci_update_config8(PCI_DEV(0, 29, 0), 0x88, ~(1 << 2), 0);
-+
-+	/** FIXME: Disable SATA2 device? **/
-+
-+	if (pch_is_lp()) {
-+		if (pch_revision >= LPT_LP_STEP_B0 && pch_revision <= LPT_LP_STEP_B2) {
-+			program_hsio_xhci_lpt_lp_bx();
-+			program_hsio_igbe_lpt_lp_bx();
-+		} else {
-+			printk(BIOS_ERR, "Unsupported PCH-LP stepping 0x%02x\n", pch_revision);
-+		}
-+	} else {
-+		if (pch_revision >= LPT_H_STEP_C0) {
-+			program_hsio_xhci_lpt_h_cx();
-+			program_hsio_igbe_lpt_h_cx();
-+		} else {
-+			printk(BIOS_ERR, "Unsupported PCH-H stepping 0x%02x\n", pch_revision);
-+		}
-+	}
-+
-+	early_thermal_init();
-+	early_usb_init();
-+}
-+
- void pch_dmi_setup_physical_layer(void)
- {
- 	/* FIXME: We need to make sure the SA supports Gen2 as well */
-diff --git a/src/southbridge/intel/lynxpoint/hsio/Makefile.inc b/src/southbridge/intel/lynxpoint/hsio/Makefile.inc
-new file mode 100644
-index 0000000000..6b74997511
---- /dev/null
-+++ b/src/southbridge/intel/lynxpoint/hsio/Makefile.inc
-@@ -0,0 +1,8 @@
-+## SPDX-License-Identifier: GPL-2.0-or-later
-+
-+romstage-y += common.c
-+ifeq ($(CONFIG_INTEL_LYNXPOINT_LP),y)
-+romstage-y += lpt_lp_bx.c
-+else
-+romstage-y += lpt_h_cx.c
-+endif
-diff --git a/src/southbridge/intel/lynxpoint/hsio/common.c b/src/southbridge/intel/lynxpoint/hsio/common.c
-new file mode 100644
-index 0000000000..9935ca347a
---- /dev/null
-+++ b/src/southbridge/intel/lynxpoint/hsio/common.c
-@@ -0,0 +1,52 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <device/pci_ops.h>
-+#include <southbridge/intel/lynxpoint/hsio/hsio.h>
-+#include <types.h>
-+
-+/*
-+ * FIXME: Ask Intel whether all lanes need to be programmed as specified
-+ * in the PCH BWG. If not, make separate tables and only check this once.
-+ */
-+void hsio_sata_shared_update(const uint32_t addr, const uint32_t and, const uint32_t or)
-+{
-+	const uint8_t lane_owner = pci_read_config8(PCI_DEV(0, 0x1c, 0), 0x410);
-+
-+	if ((addr & 0xfe00) == 0x2000 && (lane_owner & (1 << 4)))
-+		return;
-+
-+	if ((addr & 0xfe00) == 0x2200 && (lane_owner & (1 << 5)))
-+		return;
-+
-+	if (CONFIG(INTEL_LYNXPOINT_LP)) {
-+		if ((addr & 0xfe00) == 0x2400 && (lane_owner & (1 << 6)))
-+			return;
-+
-+		if ((addr & 0xfe00) == 0x2600 && (lane_owner & (1 << 7)))
-+			return;
-+	}
-+	hsio_update(addr, and, or);
-+}
-+
-+/*
-+ * FIXME: Ask Intel whether all lanes need to be programmed as specified
-+ * in the PCH BWG. If not, make separate tables and only check this once.
-+ */
-+void hsio_xhci_shared_update(const uint32_t addr, const uint32_t and, const uint32_t or)
-+{
-+	const uint8_t lane_owner = pci_read_config8(PCI_DEV(0, 0x1c, 0), 0x410);
-+	if (CONFIG(INTEL_LYNXPOINT_LP)) {
-+		if ((addr & 0xfe00) == 0x2400 && ((lane_owner >> 0) & 3) != 2)
-+			return;
-+
-+		if ((addr & 0xfe00) == 0x2600 && ((lane_owner >> 2) & 3) != 2)
-+			return;
-+	} else {
-+		if ((addr & 0xfe00) == 0x2c00 && ((lane_owner >> 2) & 3) != 2)
-+			return;
-+
-+		if ((addr & 0xfe00) == 0x2e00 && ((lane_owner >> 0) & 3) != 2)
-+			return;
-+	}
-+	hsio_update(addr, and, or);
-+}
-diff --git a/src/southbridge/intel/lynxpoint/hsio/hsio.h b/src/southbridge/intel/lynxpoint/hsio/hsio.h
-new file mode 100644
-index 0000000000..689ef4a05b
---- /dev/null
-+++ b/src/southbridge/intel/lynxpoint/hsio/hsio.h
-@@ -0,0 +1,46 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#ifndef SOUTHBRIDGE_INTEL_LYNXPOINT_HSIO_H
-+#define SOUTHBRIDGE_INTEL_LYNXPOINT_HSIO_H
-+
-+#include <southbridge/intel/lynxpoint/iobp.h>
-+#include <types.h>
-+
-+struct hsio_table_row {
-+	uint32_t addr;
-+	uint32_t and;
-+	uint32_t or;
-+};
-+
-+static inline void hsio_update(const uint32_t addr, const uint32_t and, const uint32_t or)
-+{
-+	pch_iobp_update(addr, and, or);
-+}
-+
-+static inline void hsio_update_row(const struct hsio_table_row row)
-+{
-+	hsio_update(row.addr, row.and, row.or);
-+}
-+
-+void hsio_xhci_shared_update(const uint32_t addr, const uint32_t and, const uint32_t or);
-+void hsio_sata_shared_update(const uint32_t addr, const uint32_t and, const uint32_t or);
-+
-+static inline void hsio_sata_shared_update_row(const struct hsio_table_row row)
-+{
-+	hsio_sata_shared_update(row.addr, row.and, row.or);
-+}
-+
-+static inline void hsio_xhci_shared_update_row(const struct hsio_table_row row)
-+{
-+	hsio_xhci_shared_update(row.addr, row.and, row.or);
-+}
-+
-+void program_hsio_sata_lpt_h_cx(const bool is_mobile);
-+void program_hsio_xhci_lpt_h_cx(void);
-+void program_hsio_igbe_lpt_h_cx(void);
-+
-+void program_hsio_sata_lpt_lp_bx(const bool is_mobile);
-+void program_hsio_xhci_lpt_lp_bx(void);
-+void program_hsio_igbe_lpt_lp_bx(void);
-+
-+#endif
-diff --git a/src/southbridge/intel/lynxpoint/hsio/lpt_h_cx.c b/src/southbridge/intel/lynxpoint/hsio/lpt_h_cx.c
-new file mode 100644
-index 0000000000..b5dd402742
---- /dev/null
-+++ b/src/southbridge/intel/lynxpoint/hsio/lpt_h_cx.c
-@@ -0,0 +1,244 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <device/pci_ops.h>
-+#include <southbridge/intel/lynxpoint/hsio/hsio.h>
-+#include <types.h>
-+
-+const struct hsio_table_row hsio_sata_shared_lpt_h_cx[] = {
-+	{ 0xea002008, ~0xfffc6108, 0xea6c6108 },
-+	{ 0xea002208, ~0xfffc6108, 0xea6c6108 },
-+	{ 0xea002038, ~0x3f00000f, 0x0700000d },
-+	{ 0xea002238, ~0x3f00000f, 0x0700000d },
-+	{ 0xea00202c, ~0x00020f00, 0x00020100 },
-+	{ 0xea00222c, ~0x00020f00, 0x00020100 },
-+	{ 0xea002040, ~0x1f000000, 0x01000000 },
-+	{ 0xea002240, ~0x1f000000, 0x01000000 },
-+	{ 0xea002010, ~0xffff0000, 0x0d510000 },
-+	{ 0xea002210, ~0xffff0000, 0x0d510000 },
-+	{ 0xea002018, ~0xffff0300, 0x38250100 },
-+	{ 0xea002218, ~0xffff0300, 0x38250100 },
-+	{ 0xea002000, ~0xcf030000, 0xcf030000 },
-+	{ 0xea002200, ~0xcf030000, 0xcf030000 },
-+	{ 0xea002028, ~0xff1f0000, 0x580e0000 },
-+	{ 0xea002228, ~0xff1f0000, 0x580e0000 },
-+	{ 0xea00201c, ~0x00007c00, 0x00002400 },
-+	{ 0xea00221c, ~0x00007c00, 0x00002400 },
-+	{ 0xea00208c, ~0x00ff0000, 0x00800000 },
-+	{ 0xea00228c, ~0x00ff0000, 0x00800000 },
-+	{ 0xea0020a4, ~0x0030ff00, 0x00308300 },
-+	{ 0xea0022a4, ~0x0030ff00, 0x00308300 },
-+	{ 0xea0020ac, ~0x00000030, 0x00000020 },
-+	{ 0xea0022ac, ~0x00000030, 0x00000020 },
-+	{ 0xea002140, ~0x00ffffff, 0x00140718 },
-+	{ 0xea002340, ~0x00ffffff, 0x00140718 },
-+	{ 0xea002144, ~0x00ffffff, 0x00140998 },
-+	{ 0xea002344, ~0x00ffffff, 0x00140998 },
-+	{ 0xea002148, ~0x00ffffff, 0x00140998 },
-+	{ 0xea002348, ~0x00ffffff, 0x00140998 },
-+	{ 0xea00217c, ~0x03000000, 0x03000000 },
-+	{ 0xea00237c, ~0x03000000, 0x03000000 },
-+	{ 0xea002178, ~0x00001f00, 0x00001800 },
-+	{ 0xea002378, ~0x00001f00, 0x00001800 },
-+	{ 0xea00210c, ~0x0038000f, 0x00000005 },
-+	{ 0xea00230c, ~0x0038000f, 0x00000005 },
-+};
-+
-+const struct hsio_table_row hsio_sata_lpt_h_cx[] = {
-+	{ 0xea008008, ~0xff000000, 0x1c000000 },
-+	{ 0xea002408, ~0xfffc6108, 0xea6c6108 },
-+	{ 0xea002608, ~0xfffc6108, 0xea6c6108 },
-+	{ 0xea000808, ~0xfffc6108, 0xea6c6108 },
-+	{ 0xea000a08, ~0xfffc6108, 0xea6c6108 },
-+	{ 0xea002438, ~0x3f00000f, 0x0700000d },
-+	{ 0xea002638, ~0x3f00000f, 0x0700000d },
-+	{ 0xea000838, ~0x3f00000f, 0x0700000d },
-+	{ 0xea000a38, ~0x3f00000f, 0x0700000d },
-+	{ 0xea002440, ~0x1f000000, 0x01000000 },
-+	{ 0xea002640, ~0x1f000000, 0x01000000 },
-+	{ 0xea000840, ~0x1f000000, 0x01000000 },
-+	{ 0xea000a40, ~0x1f000000, 0x01000000 },
-+	{ 0xea002410, ~0xffff0000, 0x0d510000 },
-+	{ 0xea002610, ~0xffff0000, 0x0d510000 },
-+	{ 0xea000810, ~0xffff0000, 0x0d510000 },
-+	{ 0xea000a10, ~0xffff0000, 0x0d510000 },
-+	{ 0xea00242c, ~0x00020800, 0x00020000 },
-+	{ 0xea00262c, ~0x00020800, 0x00020000 },
-+	{ 0xea00082c, ~0x00020800, 0x00020000 },
-+	{ 0xea000a2c, ~0x00020800, 0x00020000 },
-+	{ 0xea002418, ~0xffff0300, 0x38250100 },
-+	{ 0xea002618, ~0xffff0300, 0x38250100 },
-+	{ 0xea000818, ~0xffff0300, 0x38250100 },
-+	{ 0xea000a18, ~0xffff0300, 0x38250100 },
-+	{ 0xea002400, ~0xcf030000, 0xcf030000 },
-+	{ 0xea002600, ~0xcf030000, 0xcf030000 },
-+	{ 0xea000800, ~0xcf030000, 0xcf030000 },
-+	{ 0xea000a00, ~0xcf030000, 0xcf030000 },
-+	{ 0xea002428, ~0xff1f0000, 0x580e0000 },
-+	{ 0xea002628, ~0xff1f0000, 0x580e0000 },
-+	{ 0xea000828, ~0xff1f0000, 0x580e0000 },
-+	{ 0xea000a28, ~0xff1f0000, 0x580e0000 },
-+	{ 0xea00241c, ~0x00007c00, 0x00002400 },
-+	{ 0xea00261c, ~0x00007c00, 0x00002400 },
-+	{ 0xea00081c, ~0x00007c00, 0x00002400 },
-+	{ 0xea000a1c, ~0x00007c00, 0x00002400 },
-+	{ 0xea00248c, ~0x00ff0000, 0x00800000 },
-+	{ 0xea00268c, ~0x00ff0000, 0x00800000 },
-+	{ 0xea00088c, ~0x00ff0000, 0x00800000 },
-+	{ 0xea000a8c, ~0x00ff0000, 0x00800000 },
-+	{ 0xea0024a4, ~0x0030ff00, 0x00308300 },
-+	{ 0xea0026a4, ~0x0030ff00, 0x00308300 },
-+	{ 0xea0008a4, ~0x0030ff00, 0x00308300 },
-+	{ 0xea000aa4, ~0x0030ff00, 0x00308300 },
-+	{ 0xea0024ac, ~0x00000030, 0x00000020 },
-+	{ 0xea0026ac, ~0x00000030, 0x00000020 },
-+	{ 0xea0008ac, ~0x00000030, 0x00000020 },
-+	{ 0xea000aac, ~0x00000030, 0x00000020 },
-+	{ 0xea002540, ~0x00ffffff, 0x00140718 },
-+	{ 0xea002740, ~0x00ffffff, 0x00140718 },
-+	{ 0xea000940, ~0x00ffffff, 0x00140718 },
-+	{ 0xea000b40, ~0x00ffffff, 0x00140718 },
-+	{ 0xea002544, ~0x00ffffff, 0x00140998 },
-+	{ 0xea002744, ~0x00ffffff, 0x00140998 },
-+	{ 0xea000944, ~0x00ffffff, 0x00140998 },
-+	{ 0xea000b44, ~0x00ffffff, 0x00140998 },
-+	{ 0xea002548, ~0x00ffffff, 0x00140998 },
-+	{ 0xea002748, ~0x00ffffff, 0x00140998 },
-+	{ 0xea000948, ~0x00ffffff, 0x00140998 },
-+	{ 0xea000b48, ~0x00ffffff, 0x00140998 },
-+	{ 0xea00257c, ~0x03000000, 0x03000000 },
-+	{ 0xea00277c, ~0x03000000, 0x03000000 },
-+	{ 0xea00097c, ~0x03000000, 0x03000000 },
-+	{ 0xea000b7c, ~0x03000000, 0x03000000 },
-+	{ 0xea002578, ~0x00001f00, 0x00001800 },
-+	{ 0xea002778, ~0x00001f00, 0x00001800 },
-+	{ 0xea000978, ~0x00001f00, 0x00001800 },
-+	{ 0xea000b78, ~0x00001f00, 0x00001800 },
-+	{ 0xea00250c, ~0x0038000f, 0x00000005 },
-+	{ 0xea00270c, ~0x0038000f, 0x00000005 },
-+	{ 0xea00090c, ~0x0038000f, 0x00000005 },
-+	{ 0xea000b0c, ~0x0038000f, 0x00000005 },
-+};
-+
-+const struct hsio_table_row hsio_xhci_shared_lpt_h_cx[] = {
-+	{ 0xe9002c2c, ~0x00000700, 0x00000100 },
-+	{ 0xe9002e2c, ~0x00000700, 0x00000100 },
-+	{ 0xe9002dcc, ~0x00001407, 0x00001407 },
-+	{ 0xe9002fcc, ~0x00001407, 0x00001407 },
-+	{ 0xe9002d68, ~0x01000f3c, 0x00000a28 },
-+	{ 0xe9002f68, ~0x01000f3c, 0x00000a28 },
-+	{ 0xe9002d6c, ~0x000000ff, 0x0000003f },
-+	{ 0xe9002f6c, ~0x000000ff, 0x0000003f },
-+	{ 0xe9002d4c, ~0x00ffff00, 0x00120500 },
-+	{ 0xe9002f4c, ~0x00ffff00, 0x00120500 },
-+	{ 0xe9002d14, ~0x38000700, 0x00000100 },
-+	{ 0xe9002f14, ~0x38000700, 0x00000100 },
-+	{ 0xe9002d64, ~0x0000f000, 0x00005000 },
-+	{ 0xe9002f64, ~0x0000f000, 0x00005000 },
-+	{ 0xe9002d70, ~0x00000018, 0x00000000 },
-+	{ 0xe9002f70, ~0x00000018, 0x00000000 },
-+	{ 0xe9002c38, ~0x3f00000f, 0x0700000b },
-+	{ 0xe9002e38, ~0x3f00000f, 0x0700000b },
-+	{ 0xe9002d40, ~0x00800000, 0x00000000 },
-+	{ 0xe9002f40, ~0x00800000, 0x00000000 },
-+};
-+
-+const struct hsio_table_row hsio_xhci_lpt_h_cx[] = {
-+	{ 0xe90031cc, ~0x00001407, 0x00001407 },
-+	{ 0xe90033cc, ~0x00001407, 0x00001407 },
-+	{ 0xe90015cc, ~0x00001407, 0x00001407 },
-+	{ 0xe90017cc, ~0x00001407, 0x00001407 },
-+	{ 0xe9003168, ~0x01000f3c, 0x00000a28 },
-+	{ 0xe9003368, ~0x01000f3c, 0x00000a28 },
-+	{ 0xe9001568, ~0x01000f3c, 0x00000a28 },
-+	{ 0xe9001768, ~0x01000f3c, 0x00000a28 },
-+	{ 0xe900316c, ~0x000000ff, 0x0000003f },
-+	{ 0xe900336c, ~0x000000ff, 0x0000003f },
-+	{ 0xe900156c, ~0x000000ff, 0x0000003f },
-+	{ 0xe900176c, ~0x000000ff, 0x0000003f },
-+	{ 0xe900314c, ~0x00ffff00, 0x00120500 },
-+	{ 0xe900334c, ~0x00ffff00, 0x00120500 },
-+	{ 0xe900154c, ~0x00ffff00, 0x00120500 },
-+	{ 0xe900174c, ~0x00ffff00, 0x00120500 },
-+	{ 0xe9003114, ~0x38000700, 0x00000100 },
-+	{ 0xe9003314, ~0x38000700, 0x00000100 },
-+	{ 0xe9001514, ~0x38000700, 0x00000100 },
-+	{ 0xe9001714, ~0x38000700, 0x00000100 },
-+	{ 0xe9003164, ~0x0000f000, 0x00005000 },
-+	{ 0xe9003364, ~0x0000f000, 0x00005000 },
-+	{ 0xe9001564, ~0x0000f000, 0x00005000 },
-+	{ 0xe9001764, ~0x0000f000, 0x00005000 },
-+	{ 0xe9003170, ~0x00000018, 0x00000000 },
-+	{ 0xe9003370, ~0x00000018, 0x00000000 },
-+	{ 0xe9001570, ~0x00000018, 0x00000000 },
-+	{ 0xe9001770, ~0x00000018, 0x00000000 },
-+	{ 0xe9003038, ~0x3f00000f, 0x0700000b },
-+	{ 0xe9003238, ~0x3f00000f, 0x0700000b },
-+	{ 0xe9001438, ~0x3f00000f, 0x0700000b },
-+	{ 0xe9001638, ~0x3f00000f, 0x0700000b },
-+	{ 0xe9003140, ~0x00800000, 0x00000000 },
-+	{ 0xe9003340, ~0x00800000, 0x00000000 },
-+	{ 0xe9001540, ~0x00800000, 0x00000000 },
-+	{ 0xe9001740, ~0x00800000, 0x00000000 },
-+};
-+
-+void program_hsio_sata_lpt_h_cx(const bool is_mobile)
-+{
-+	const struct hsio_table_row *pch_hsio_table;
-+	size_t len;
-+
-+	pch_hsio_table = hsio_sata_lpt_h_cx;
-+	len = ARRAY_SIZE(hsio_sata_lpt_h_cx);
-+	for (size_t i = 0; i < len; i++)
-+		hsio_update_row(pch_hsio_table[i]);
-+
-+	pch_hsio_table = hsio_sata_shared_lpt_h_cx;
-+	len = ARRAY_SIZE(hsio_sata_shared_lpt_h_cx);
-+	for (size_t i = 0; i < len; i++)
-+		hsio_sata_shared_update_row(pch_hsio_table[i]);
-+
-+	const uint32_t hsio_sata_value = is_mobile ? 0x00004c5a : 0x00003e67;
-+
-+	hsio_update(0xea002490, ~0x0000ffff, hsio_sata_value);
-+	hsio_update(0xea002690, ~0x0000ffff, hsio_sata_value);
-+	hsio_update(0xea000890, ~0x0000ffff, hsio_sata_value);
-+	hsio_update(0xea000a90, ~0x0000ffff, hsio_sata_value);
-+
-+	hsio_sata_shared_update(0xea002090, ~0x0000ffff, hsio_sata_value);
-+	hsio_sata_shared_update(0xea002290, ~0x0000ffff, hsio_sata_value);
-+}
-+
-+void program_hsio_xhci_lpt_h_cx(void)
-+{
-+	const struct hsio_table_row *pch_hsio_table;
-+	size_t len;
-+
-+	pch_hsio_table = hsio_xhci_lpt_h_cx;
-+	len = ARRAY_SIZE(hsio_xhci_lpt_h_cx);
-+
-+	for (size_t i = 0; i < len; i++)
-+		hsio_update_row(pch_hsio_table[i]);
-+
-+	pch_hsio_table = hsio_xhci_shared_lpt_h_cx;
-+	len = ARRAY_SIZE(hsio_xhci_shared_lpt_h_cx);
-+
-+	for (size_t i = 0; i < len; i++)
-+		hsio_xhci_shared_update_row(pch_hsio_table[i]);
-+}
-+
-+void program_hsio_igbe_lpt_h_cx(void)
-+{
-+	const uint32_t strpfusecfg1 = pci_read_config32(PCI_DEV(0, 0x1c, 0), 0xfc);
-+	if (!(strpfusecfg1 & (1 << 19)))
-+		return;
-+
-+	const uint8_t gbe_port = (strpfusecfg1 >> 16) & 0x7;
-+	const uint8_t lane_owner = pci_read_config8(PCI_DEV(0, 0x1c, 0), 0x410);
-+	if (gbe_port == 0 && ((lane_owner >> 0) & 3) != 1)
-+		return;
-+
-+	if (gbe_port == 1 && ((lane_owner >> 2) & 3) != 1)
-+		return;
-+
-+	const uint32_t gbe_hsio_base = 0xe900 << 16 | (0x2e - 2 * gbe_port) << 8;
-+	hsio_update(gbe_hsio_base + 0x08, ~0xf0000100, 0xe0000100);
-+}
-diff --git a/src/southbridge/intel/lynxpoint/hsio/lpt_lp_bx.c b/src/southbridge/intel/lynxpoint/hsio/lpt_lp_bx.c
-new file mode 100644
-index 0000000000..24679e791a
---- /dev/null
-+++ b/src/southbridge/intel/lynxpoint/hsio/lpt_lp_bx.c
-@@ -0,0 +1,180 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <device/pci_ops.h>
-+#include <southbridge/intel/lynxpoint/iobp.h>
-+#include <southbridge/intel/lynxpoint/hsio/hsio.h>
-+#include <types.h>
-+
-+const struct hsio_table_row hsio_sata_shared_lpt_lp_bx[] = {
-+	{ 0xea008008, ~0xff000000, 0x1c000000 },
-+	{ 0xea002008, ~0xfffc6108, 0xea6c6108 },
-+	{ 0xea002208, ~0xfffc6108, 0xea6c6108 },
-+	{ 0xea002408, ~0xfffc6108, 0xea6c6108 },
-+	{ 0xea002608, ~0xfffc6108, 0xea6c6108 },
-+	{ 0xea002038, ~0x0000000f, 0x0000000d },
-+	{ 0xea002238, ~0x0000000f, 0x0000000d },
-+	{ 0xea002438, ~0x0000000f, 0x0000000d },
-+	{ 0xea002638, ~0x0000000f, 0x0000000d },
-+	{ 0xea00202c, ~0x00020f00, 0x00020100 },
-+	{ 0xea00222c, ~0x00020f00, 0x00020100 },
-+	{ 0xea00242c, ~0x00020f00, 0x00020100 },
-+	{ 0xea00262c, ~0x00020f00, 0x00020100 },
-+	{ 0xea002040, ~0x1f000000, 0x01000000 },
-+	{ 0xea002240, ~0x1f000000, 0x01000000 },
-+	{ 0xea002440, ~0x1f000000, 0x01000000 },
-+	{ 0xea002640, ~0x1f000000, 0x01000000 },
-+	{ 0xea002010, ~0xffff0000, 0x55510000 },
-+	{ 0xea002210, ~0xffff0000, 0x55510000 },
-+	{ 0xea002410, ~0xffff0000, 0x55510000 },
-+	{ 0xea002610, ~0xffff0000, 0x55510000 },
-+	{ 0xea002140, ~0x00ffffff, 0x00140718 },
-+	{ 0xea002340, ~0x00ffffff, 0x00140718 },
-+	{ 0xea002540, ~0x00ffffff, 0x00140718 },
-+	{ 0xea002740, ~0x00ffffff, 0x00140718 },
-+	{ 0xea002144, ~0x00ffffff, 0x00140998 },
-+	{ 0xea002344, ~0x00ffffff, 0x00140998 },
-+	{ 0xea002544, ~0x00ffffff, 0x00140998 },
-+	{ 0xea002744, ~0x00ffffff, 0x00140998 },
-+	{ 0xea002148, ~0x00ffffff, 0x00140998 },
-+	{ 0xea002348, ~0x00ffffff, 0x00140998 },
-+	{ 0xea002548, ~0x00ffffff, 0x00140998 },
-+	{ 0xea002748, ~0x00ffffff, 0x00140998 },
-+	{ 0xea00217c, ~0x03000000, 0x03000000 },
-+	{ 0xea00237c, ~0x03000000, 0x03000000 },
-+	{ 0xea00257c, ~0x03000000, 0x03000000 },
-+	{ 0xea00277c, ~0x03000000, 0x03000000 },
-+	{ 0xea00208c, ~0x00ff0000, 0x00800000 },
-+	{ 0xea00228c, ~0x00ff0000, 0x00800000 },
-+	{ 0xea00248c, ~0x00ff0000, 0x00800000 },
-+	{ 0xea00268c, ~0x00ff0000, 0x00800000 },
-+	{ 0xea0020a4, ~0x0030ff00, 0x00308300 },
-+	{ 0xea0022a4, ~0x0030ff00, 0x00308300 },
-+	{ 0xea0024a4, ~0x0030ff00, 0x00308300 },
-+	{ 0xea0026a4, ~0x0030ff00, 0x00308300 },
-+	{ 0xea0020ac, ~0x00000030, 0x00000020 },
-+	{ 0xea0022ac, ~0x00000030, 0x00000020 },
-+	{ 0xea0024ac, ~0x00000030, 0x00000020 },
-+	{ 0xea0026ac, ~0x00000030, 0x00000020 },
-+	{ 0xea002018, ~0xffff0300, 0x38250100 },
-+	{ 0xea002218, ~0xffff0300, 0x38250100 },
-+	{ 0xea002418, ~0xffff0300, 0x38250100 },
-+	{ 0xea002618, ~0xffff0300, 0x38250100 },
-+	{ 0xea002000, ~0xcf030000, 0xcf030000 },
-+	{ 0xea002200, ~0xcf030000, 0xcf030000 },
-+	{ 0xea002400, ~0xcf030000, 0xcf030000 },
-+	{ 0xea002600, ~0xcf030000, 0xcf030000 },
-+	{ 0xea002028, ~0xff1f0000, 0x580e0000 },
-+	{ 0xea002228, ~0xff1f0000, 0x580e0000 },
-+	{ 0xea002428, ~0xff1f0000, 0x580e0000 },
-+	{ 0xea002628, ~0xff1f0000, 0x580e0000 },
-+	{ 0xea00201c, ~0x00007c00, 0x00002400 },
-+	{ 0xea00221c, ~0x00007c00, 0x00002400 },
-+	{ 0xea00241c, ~0x00007c00, 0x00002400 },
-+	{ 0xea00261c, ~0x00007c00, 0x00002400 },
-+	{ 0xea002178, ~0x00001f00, 0x00001800 },
-+	{ 0xea002378, ~0x00001f00, 0x00001800 },
-+	{ 0xea002578, ~0x00001f00, 0x00001800 },
-+	{ 0xea002778, ~0x00001f00, 0x00001800 },
-+	{ 0xea00210c, ~0x0038000f, 0x00000005 },
-+	{ 0xea00230c, ~0x0038000f, 0x00000005 },
-+	{ 0xea00250c, ~0x0038000f, 0x00000005 },
-+	{ 0xea00270c, ~0x0038000f, 0x00000005 },
-+};
-+
-+const struct hsio_table_row hsio_xhci_shared_lpt_lp_bx[] = {
-+	{ 0xe90025cc, ~0x00001407, 0x00001407 },
-+	{ 0xe90027cc, ~0x00001407, 0x00001407 },
-+	{ 0xe9002568, ~0x01000f3c, 0x00000a28 },
-+	{ 0xe9002768, ~0x01000f3c, 0x00000a28 },
-+	{ 0xe900242c, ~0x00000700, 0x00000100 },
-+	{ 0xe900262c, ~0x00000700, 0x00000100 },
-+	{ 0xe900256c, ~0x000000ff, 0x0000003f },
-+	{ 0xe900276c, ~0x000000ff, 0x0000003f },
-+	{ 0xe900254c, ~0x00ffff00, 0x00120500 },
-+	{ 0xe900274c, ~0x00ffff00, 0x00120500 },
-+	{ 0xe9002564, ~0x0000f000, 0x00005000 },
-+	{ 0xe9002764, ~0x0000f000, 0x00005000 },
-+	{ 0xe9002570, ~0x00000018, 0x00000000 },
-+	{ 0xe9002770, ~0x00000018, 0x00000000 },
-+	{ 0xe9002514, ~0x38000700, 0x00000100 },
-+	{ 0xe9002714, ~0x38000700, 0x00000100 },
-+	{ 0xe9002438, ~0x0000000f, 0x0000000b },
-+	{ 0xe9002638, ~0x0000000f, 0x0000000b },
-+	{ 0xe9002414, ~0x0000fe00, 0x00006600 },
-+	{ 0xe9002614, ~0x0000fe00, 0x00006600 },
-+	{ 0xe9002540, ~0x00800000, 0x00000000 },
-+	{ 0xe9002740, ~0x00800000, 0x00000000 },
-+};
-+
-+const struct hsio_table_row hsio_xhci_lpt_lp_bx[] = {
-+	{ 0xe90021cc, ~0x00001407, 0x00001407 },
-+	{ 0xe90023cc, ~0x00001407, 0x00001407 },
-+	{ 0xe9002168, ~0x01000f3c, 0x00000a28 },
-+	{ 0xe9002368, ~0x01000f3c, 0x00000a28 },
-+	{ 0xe900216c, ~0x000000ff, 0x0000003f },
-+	{ 0xe900236c, ~0x000000ff, 0x0000003f },
-+	{ 0xe900214c, ~0x00ffff00, 0x00120500 },
-+	{ 0xe900234c, ~0x00ffff00, 0x00120500 },
-+	{ 0xe9002164, ~0x0000f000, 0x00005000 },
-+	{ 0xe9002364, ~0x0000f000, 0x00005000 },
-+	{ 0xe9002170, ~0x00000018, 0x00000000 },
-+	{ 0xe9002370, ~0x00000018, 0x00000000 },
-+	{ 0xe9002114, ~0x38000700, 0x00000100 },
-+	{ 0xe9002314, ~0x38000700, 0x00000100 },
-+	{ 0xe9002038, ~0x0000000f, 0x0000000b },
-+	{ 0xe9002238, ~0x0000000f, 0x0000000b },
-+	{ 0xe9002014, ~0x0000fe00, 0x00006600 },
-+	{ 0xe9002214, ~0x0000fe00, 0x00006600 },
-+	{ 0xe9002140, ~0x00800000, 0x00000000 },
-+	{ 0xe9002340, ~0x00800000, 0x00000000 },
-+};
-+
-+void program_hsio_sata_lpt_lp_bx(const bool is_mobile)
-+{
-+	const struct hsio_table_row *pch_hsio_table;
-+	size_t len;
-+
-+	pch_hsio_table = hsio_sata_shared_lpt_lp_bx;
-+	len = ARRAY_SIZE(hsio_sata_shared_lpt_lp_bx);
-+	for (size_t i = 0; i < len; i++)
-+		hsio_sata_shared_update_row(pch_hsio_table[i]);
-+
-+	const uint32_t hsio_sata_value = is_mobile ? 0x00004c5a : 0x00003e67;
-+
-+	hsio_sata_shared_update(0xea002090, ~0x0000ffff, hsio_sata_value);
-+	hsio_sata_shared_update(0xea002290, ~0x0000ffff, hsio_sata_value);
-+	hsio_sata_shared_update(0xea002490, ~0x0000ffff, hsio_sata_value);
-+	hsio_sata_shared_update(0xea002690, ~0x0000ffff, hsio_sata_value);
-+}
-+
-+void program_hsio_xhci_lpt_lp_bx(void)
-+{
-+	const struct hsio_table_row *pch_hsio_table;
-+	size_t len;
-+
-+	pch_hsio_table = hsio_xhci_lpt_lp_bx;
-+	len = ARRAY_SIZE(hsio_xhci_lpt_lp_bx);
-+
-+	for (size_t i = 0; i < len; i++)
-+		hsio_update_row(pch_hsio_table[i]);
-+
-+	pch_hsio_table = hsio_xhci_shared_lpt_lp_bx;
-+	len = ARRAY_SIZE(hsio_xhci_shared_lpt_lp_bx);
-+
-+	for (size_t i = 0; i < len; i++)
-+		hsio_xhci_shared_update_row(pch_hsio_table[i]);
-+}
-+
-+void program_hsio_igbe_lpt_lp_bx(void)
-+{
-+	const uint32_t strpfusecfg1 = pci_read_config32(PCI_DEV(0, 0x1c, 0), 0xfc);
-+	if (!(strpfusecfg1 & (1 << 19)))
-+		return;
-+
-+	const uint8_t gbe_port = (strpfusecfg1 >> 16) & 0x7;
-+	if (gbe_port > 5)
-+		return;
-+
-+	const uint32_t gbe_hsio_base = 0xe900 << 16 | (0x08 + 2 * gbe_port) << 8;
-+	hsio_update(gbe_hsio_base + 0x08, ~0xf0000100, 0xe0000100);
-+}
-diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
-index 38a9349220..74b4d50017 100644
---- a/src/southbridge/intel/lynxpoint/pch.h
-+++ b/src/southbridge/intel/lynxpoint/pch.h
-@@ -117,6 +117,7 @@ void pch_dmi_setup_physical_layer(void);
- void pch_dmi_tc_vc_mapping(u32 vc0, u32 vc1, u32 vcp, u32 vcm);
- void early_usb_init(void);
- void early_thermal_init(void);
-+void early_pch_init_native(int s3resume);
- 
- void usb_ehci_sleep_prepare(pci_devfn_t dev, u8 slp_typ);
- void usb_ehci_disable(pci_devfn_t dev);
-@@ -271,6 +272,10 @@ void mainboard_config_rcba(void);
- #define   IDE_DECODE_ENABLE	(1 << 15)
- #define IDE_TIM_SEC		0x42	/* IDE timings, secondary */
- 
-+#define SATA_MAP		0x90
-+#define SATA_PCS		0x92
-+#define SATA_SCLKG		0x94
-+
- #define SATA_SIRI		0xa0 /* SATA Indexed Register Index */
- #define SATA_SIRD		0xa4 /* SATA Indexed Register Data */
- #define SATA_SP			0xd0 /* Scratchpad */
-@@ -580,6 +585,7 @@ void mainboard_config_rcba(void);
- #define D19IR		0x3168	/* 16bit */
- #define ACPIIRQEN	0x31e0	/* 32bit */
- #define OIC		0x31fe	/* 16bit */
-+#define PRSTS		0x3310	/* 32bit */
- #define PMSYNC_CONFIG	0x33c4	/* 32bit */
- #define PMSYNC_CONFIG2	0x33cc	/* 32bit */
- #define SOFT_RESET_CTRL 0x38f4
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0018-haswell-NRI-Add-REUT-I-O-test-library.patch b/config/coreboot/haswell/patches/0008-haswell-NRI-Add-REUT-I-O-test-library.patch
similarity index 97%
rename from config/coreboot/haswell/patches/0018-haswell-NRI-Add-REUT-I-O-test-library.patch
rename to config/coreboot/haswell/patches/0008-haswell-NRI-Add-REUT-I-O-test-library.patch
index 5df22ed3..2225f18c 100644
--- a/config/coreboot/haswell/patches/0018-haswell-NRI-Add-REUT-I-O-test-library.patch
+++ b/config/coreboot/haswell/patches/0008-haswell-NRI-Add-REUT-I-O-test-library.patch
@@ -1,25 +1,25 @@
-From f4dd460d609276de7cb7db91f145a404451a2301 Mon Sep 17 00:00:00 2001
+From 49a7ef2401922a8492ba577a43235bcfba7ea822 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 00:11:29 +0200
-Subject: [PATCH 18/26] haswell NRI: Add REUT I/O test library
+Subject: [PATCH 08/20] haswell NRI: Add REUT I/O test library
 
 Implement a library to run I/O tests using the REUT hardware.
 
 Change-Id: Id7b207cd0a3989ddd23c88c6b1f0cfa79d2c861f
 Signed-off-by: Angel Pons <th3fanbus@gmail.com>
 ---
- .../intel/haswell/native_raminit/Makefile.inc |   1 +
+ .../intel/haswell/native_raminit/Makefile.mk  |   1 +
  .../haswell/native_raminit/raminit_native.h   | 110 +++
  .../haswell/native_raminit/reg_structs.h      | 121 +++
- .../intel/haswell/native_raminit/testing_io.c | 742 ++++++++++++++++++
+ .../intel/haswell/native_raminit/testing_io.c | 744 ++++++++++++++++++
  .../intel/haswell/registers/mchbar.h          |  30 +
- 5 files changed, 1004 insertions(+)
+ 5 files changed, 1006 insertions(+)
  create mode 100644 src/northbridge/intel/haswell/native_raminit/testing_io.c
 
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 index 8d7d4e4db0..6e1b365602 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+--- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
++++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 @@ -12,4 +12,5 @@ romstage-y += raminit_native.c
  romstage-y += reut.c
  romstage-y += setup_wdb.c
@@ -27,7 +27,7 @@ index 8d7d4e4db0..6e1b365602 100644
 +romstage-y += testing_io.c
  romstage-y += timings_refresh.c
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index f29c2ec366..56df36ca8d 100644
+index 1971b44b66..7f19fde4cc 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 @@ -58,6 +58,88 @@ enum {
@@ -120,9 +120,9 @@ index f29c2ec366..56df36ca8d 100644
  	CT_ITERATION_CLOCK = 0,
  	CT_ITERATION_CMD_NORTH,
 @@ -199,6 +281,10 @@ struct sysinfo {
- 	uint16_t mr1[NUM_CHANNELS][NUM_SLOTRANKS];
- 	uint16_t mr2[NUM_CHANNELS][NUM_SLOTRANKS];
- 	uint16_t mr3[NUM_CHANNELS][NUM_SLOTRANKS];
+ 	uint16_t mr1[NUM_CHANNELS][NUM_SLOTS];
+ 	uint16_t mr2[NUM_CHANNELS][NUM_SLOTS];
+ 	uint16_t mr3[NUM_CHANNELS][NUM_SLOTS];
 +
 +	uint8_t dq_pat;
 +
@@ -130,7 +130,7 @@ index f29c2ec366..56df36ca8d 100644
  };
  
  static inline bool is_hsw_ult(void)
-@@ -342,6 +428,30 @@ void write_wdb_va_pat(
+@@ -340,6 +426,30 @@ void write_wdb_va_pat(
  void program_wdb_lfsr(const struct sysinfo *ctrl, bool cleanup);
  void setup_wdb(const struct sysinfo *ctrl);
  
@@ -309,10 +309,10 @@ index 7aa8d8c8b2..b943259b91 100644
  		uint32_t start_test    :  1; // Bits  0:0
 diff --git a/src/northbridge/intel/haswell/native_raminit/testing_io.c b/src/northbridge/intel/haswell/native_raminit/testing_io.c
 new file mode 100644
-index 0000000000..7716fc4285
+index 0000000000..2632c238f8
 --- /dev/null
 +++ b/src/northbridge/intel/haswell/native_raminit/testing_io.c
-@@ -0,0 +1,742 @@
+@@ -0,0 +1,744 @@
 +/* SPDX-License-Identifier: GPL-2.0-or-later */
 +
 +#include <console/console.h>
@@ -535,8 +535,10 @@ index 0000000000..7716fc4285
 +	const uint8_t en_cadb,
 +	const uint8_t subseq_wait)
 +{
-+	if (!chanmask)
-+		die("\n%s: invalid chanmask\n", __func__, chanmask);
++	if (!chanmask) {
++		printk(BIOS_ERR, "\n%s: chanmask is invalid\n", __func__);
++		return;
++	}
 +
 +	/*
 +	 * Prepare variables needed for both channels.
diff --git a/config/coreboot/haswell/patches/0008-nb-intel-haswell-Add-native-raminit-scaffolding.patch b/config/coreboot/haswell/patches/0008-nb-intel-haswell-Add-native-raminit-scaffolding.patch
deleted file mode 100644
index 6df828eb..00000000
--- a/config/coreboot/haswell/patches/0008-nb-intel-haswell-Add-native-raminit-scaffolding.patch
+++ /dev/null
@@ -1,407 +0,0 @@
-From 46cdec8cbce15ca11ad9a49a3ee415a78f781997 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sat, 7 May 2022 00:26:10 +0200
-Subject: [PATCH 08/26] nb/intel/haswell: Add native raminit scaffolding
-
-Implement some scaffolding for Haswell native raminit, like bootmode
-selection, handling of MRC cache and CPU detection.
-
-Change-Id: Icd96649fa045ea7f0f32ae9bfe1e60498d93975b
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/Makefile.inc |   1 +
- .../haswell/native_raminit/raminit_main.c     | 104 ++++++++++
- .../haswell/native_raminit/raminit_native.c   | 189 +++++++++++++++++-
- .../haswell/native_raminit/raminit_native.h   |  34 ++++
- 4 files changed, 322 insertions(+), 6 deletions(-)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/raminit_main.c
- create mode 100644 src/northbridge/intel/haswell/native_raminit/raminit_native.h
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-index 8cfb4fb33e..90af951c5a 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-@@ -1,3 +1,4 @@
- ## SPDX-License-Identifier: GPL-2.0-or-later
- 
-+romstage-y += raminit_main.c
- romstage-y += raminit_native.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-new file mode 100644
-index 0000000000..9b42c25b40
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -0,0 +1,104 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <assert.h>
-+#include <console/console.h>
-+#include <cpu/intel/haswell/haswell.h>
-+#include <delay.h>
-+#include <device/pci_ops.h>
-+#include <northbridge/intel/haswell/chip.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <northbridge/intel/haswell/raminit.h>
-+#include <string.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+
-+struct task_entry {
-+	enum raminit_status (*task)(struct sysinfo *);
-+	bool is_enabled;
-+	const char *name;
-+};
-+
-+static const struct task_entry cold_boot[] = {
-+};
-+
-+/* Return a generic stepping value to make stepping checks simpler */
-+static enum generic_stepping get_stepping(const uint32_t cpuid)
-+{
-+	switch (cpuid) {
-+	case CPUID_HASWELL_A0:
-+		die("Haswell stepping A0 is not supported\n");
-+	case CPUID_HASWELL_B0:
-+	case CPUID_HASWELL_ULT_B0:
-+	case CPUID_CRYSTALWELL_B0:
-+		return STEPPING_B0;
-+	case CPUID_HASWELL_C0:
-+	case CPUID_HASWELL_ULT_C0:
-+	case CPUID_CRYSTALWELL_C0:
-+		return STEPPING_C0;
-+	default:
-+		/** TODO: Add Broadwell support someday **/
-+		die("Unknown CPUID 0x%x\n", cpuid);
-+	}
-+}
-+
-+static void initialize_ctrl(struct sysinfo *ctrl)
-+{
-+	const struct northbridge_intel_haswell_config *cfg = config_of_soc();
-+	const enum raminit_boot_mode bootmode = ctrl->bootmode;
-+
-+	memset(ctrl, 0, sizeof(*ctrl));
-+
-+	ctrl->cpu = cpu_get_cpuid();
-+	ctrl->stepping = get_stepping(ctrl->cpu);
-+	ctrl->dq_pins_interleaved = cfg->dq_pins_interleaved;
-+	ctrl->bootmode = bootmode;
-+}
-+
-+static enum raminit_status try_raminit(struct sysinfo *ctrl)
-+{
-+	const struct task_entry *const schedule = cold_boot;
-+	const size_t length = ARRAY_SIZE(cold_boot);
-+
-+	enum raminit_status status = RAMINIT_STATUS_UNSPECIFIED_ERROR;
-+
-+	for (size_t i = 0; i < length; i++) {
-+		const struct task_entry *const entry = &schedule[i];
-+		assert(entry);
-+		assert(entry->name);
-+		if (!entry->is_enabled)
-+			continue;
-+
-+		assert(entry->task);
-+		printk(RAM_DEBUG, "\nExecuting raminit task %s\n", entry->name);
-+		status = entry->task(ctrl);
-+		printk(RAM_DEBUG, "\n");
-+		if (status) {
-+			printk(BIOS_ERR, "raminit failed on step %s\n", entry->name);
-+			break;
-+		}
-+	}
-+
-+	return status;
-+}
-+
-+void raminit_main(const enum raminit_boot_mode bootmode)
-+{
-+	/*
-+	 * The mighty_ctrl struct. Will happily nuke the pre-RAM stack
-+	 * if left unattended. Make it static and pass pointers to it.
-+	 */
-+	static struct sysinfo mighty_ctrl;
-+
-+	mighty_ctrl.bootmode = bootmode;
-+	initialize_ctrl(&mighty_ctrl);
-+
-+	/** TODO: Try more than once **/
-+	enum raminit_status status = try_raminit(&mighty_ctrl);
-+
-+	if (status != RAMINIT_STATUS_SUCCESS)
-+		die("Memory initialization was met with utmost failure and misery\n");
-+
-+	/** TODO: Implement the required magic **/
-+	die("NATIVE RAMINIT: More Magic (tm) required.\n");
-+}
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-index b6efb6b40d..0869db3902 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-@@ -1,13 +1,45 @@
- /* SPDX-License-Identifier: GPL-2.0-or-later */
- 
-+#include <arch/cpu.h>
-+#include <assert.h>
-+#include <cbmem.h>
-+#include <cf9_reset.h>
- #include <console/console.h>
-+#include <cpu/x86/msr.h>
- #include <delay.h>
-+#include <device/pci_ops.h>
-+#include <mrc_cache.h>
- #include <northbridge/intel/haswell/haswell.h>
- #include <northbridge/intel/haswell/raminit.h>
- #include <southbridge/intel/lynxpoint/me.h>
- #include <southbridge/intel/lynxpoint/pch.h>
- #include <types.h>
- 
-+#include "raminit_native.h"
-+
-+static void wait_txt_clear(void)
-+{
-+	const struct cpuid_result cpuid = cpuid_ext(1, 0);
-+
-+	/* Check if TXT is supported */
-+	if (!(cpuid.ecx & BIT(6)))
-+		return;
-+
-+	/* Some TXT public bit */
-+	if (!(read32p(0xfed30010) & 1))
-+		return;
-+
-+	/* Wait for TXT clear */
-+	do {} while (!(read8p(0xfed40000) & (1 << 7)));
-+}
-+
-+static enum raminit_boot_mode get_boot_mode(void)
-+{
-+	const uint16_t pmcon_2 = pci_read_config16(PCH_LPC_DEV, GEN_PMCON_2);
-+	const uint16_t bitmask = GEN_PMCON_2_DISB | GEN_PMCON_2_MEM_SR;
-+	return (pmcon_2 & bitmask) == bitmask ? BOOTMODE_WARM : BOOTMODE_COLD;
-+}
-+
- static bool early_init_native(int s3resume)
- {
- 	printk(BIOS_DEBUG, "Starting native platform initialisation\n");
-@@ -24,6 +56,120 @@ static bool early_init_native(int s3resume)
- 	return cpu_replaced;
- }
- 
-+#define MRC_CACHE_VERSION 1
-+
-+struct mrc_data {
-+	const void *buffer;
-+	size_t buffer_len;
-+};
-+
-+static void save_mrc_data(struct mrc_data *md)
-+{
-+	mrc_cache_stash_data(MRC_TRAINING_DATA, MRC_CACHE_VERSION, md->buffer, md->buffer_len);
-+}
-+
-+static struct mrc_data prepare_mrc_cache(void)
-+{
-+	struct mrc_data md = {0};
-+	md.buffer = mrc_cache_current_mmap_leak(MRC_TRAINING_DATA,
-+						MRC_CACHE_VERSION,
-+						&md.buffer_len);
-+	return md;
-+}
-+
-+static const char *const bm_names[] = {
-+	"BOOTMODE_COLD",
-+	"BOOTMODE_WARM",
-+	"BOOTMODE_S3",
-+	"BOOTMODE_FAST",
-+};
-+
-+static void clear_disb(void)
-+{
-+	pci_and_config16(PCH_LPC_DEV, GEN_PMCON_2, ~GEN_PMCON_2_DISB);
-+}
-+
-+static void raminit_reset(void)
-+{
-+	clear_disb();
-+	system_reset();
-+}
-+
-+static enum raminit_boot_mode do_actual_raminit(
-+	struct mrc_data *md,
-+	const bool s3resume,
-+	const bool cpu_replaced,
-+	const enum raminit_boot_mode orig_bootmode)
-+{
-+	enum raminit_boot_mode bootmode = orig_bootmode;
-+
-+	bool save_data_valid = md->buffer && md->buffer_len == USHRT_MAX; /** TODO: sizeof() **/
-+
-+	if (s3resume) {
-+		if (bootmode == BOOTMODE_COLD) {
-+			printk(BIOS_EMERG, "Memory may not be in self-refresh for S3 resume\n");
-+			printk(BIOS_EMERG, "S3 resume and cold boot are mutually exclusive\n");
-+			raminit_reset();
-+		}
-+		/* Only a true mad hatter would replace a CPU in S3 */
-+		if (cpu_replaced) {
-+			printk(BIOS_EMERG, "Oh no, CPU was replaced during S3\n");
-+			/*
-+			 * No reason to continue, memory consistency is most likely lost
-+			 * and ME will probably request a reset through DID response too.
-+			 */
-+			/** TODO: Figure out why past self commented this out **/
-+			//raminit_reset();
-+		}
-+		bootmode = BOOTMODE_S3;
-+		if (!save_data_valid) {
-+			printk(BIOS_EMERG, "No training data, S3 resume is impossible\n");
-+			/* Failed S3 resume, reset to come up cleanly */
-+			raminit_reset();
-+		}
-+	}
-+	if (!s3resume && cpu_replaced) {
-+		printk(BIOS_NOTICE, "CPU was replaced, forcing a cold boot\n");
-+		/*
-+		 * Looks like the ME will get angry if raminit takes too long.
-+		 * It will report that the CPU has been replaced on next boot.
-+		 * Try to continue anyway. This should not happen in most cases.
-+		 */
-+		/** TODO: Figure out why past self commented this out **/
-+		//save_data_valid = false;
-+	}
-+	if (bootmode == BOOTMODE_COLD) {
-+		/* If possible, promote to a fast boot */
-+		if (save_data_valid)
-+			bootmode = BOOTMODE_FAST;
-+
-+		clear_disb();
-+	} else if (bootmode == BOOTMODE_WARM) {
-+		/* If a warm reset happened before raminit is done, force a cold boot */
-+		if (mchbar_read32(SSKPD) == 0 && mchbar_read32(SSKPD + 4) == 0) {
-+			printk(BIOS_NOTICE, "Warm reset occurred early in cold boot\n");
-+			save_data_valid = false;
-+		}
-+		if (!save_data_valid)
-+			bootmode = BOOTMODE_COLD;
-+	}
-+	assert(save_data_valid != (bootmode == BOOTMODE_COLD));
-+	if (save_data_valid) {
-+		printk(BIOS_INFO, "Using cached memory parameters\n");
-+		die("RAMINIT: Fast boot is not yet implemented\n");
-+	}
-+	printk(RAM_DEBUG, "Initial bootmode: %s\n", bm_names[orig_bootmode]);
-+	printk(RAM_DEBUG, "Current bootmode: %s\n", bm_names[bootmode]);
-+
-+	/*
-+	 * And now, the actual memory initialization thing.
-+	 */
-+	printk(RAM_DEBUG, "\nStarting native raminit\n");
-+	raminit_main(bootmode);
-+
-+	return bootmode;
-+}
-+
- void perform_raminit(const int s3resume)
- {
- 	/*
-@@ -32,17 +178,48 @@ void perform_raminit(const int s3resume)
- 	 */
- 	const bool cpu_replaced = early_init_native(s3resume);
- 
--	(void)cpu_replaced;
-+	wait_txt_clear();
-+	wrmsr(0x2e6, (msr_t) {.lo = 0, .hi = 0});
-+
-+	const enum raminit_boot_mode orig_bootmode = get_boot_mode();
-+
-+	struct mrc_data md = prepare_mrc_cache();
-+
-+	const enum raminit_boot_mode bootmode =
-+			do_actual_raminit(&md, s3resume, cpu_replaced, orig_bootmode);
-+
-+	/** TODO: report_memory_config **/
- 
--	/** TODO: Move after raminit */
- 	if (intel_early_me_uma_size() > 0) {
--		/** TODO: Update status once raminit is implemented **/
--		uint8_t me_status = ME_INIT_STATUS_ERROR;
-+		/*
-+		 * The 'other' success value is to report loss of memory
-+		 * consistency to ME if warm boot was downgraded to cold.
-+		 */
-+		uint8_t me_status;
-+		if (BOOTMODE_WARM == orig_bootmode && BOOTMODE_COLD == bootmode)
-+			me_status = ME_INIT_STATUS_SUCCESS_OTHER;
-+		else
-+			me_status = ME_INIT_STATUS_SUCCESS;
-+
-+		/** TODO: Remove this once raminit is implemented **/
-+		me_status = ME_INIT_STATUS_ERROR;
- 		intel_early_me_init_done(me_status);
- 	}
- 
-+	post_code(0x3b);
-+
- 	intel_early_me_status();
- 
--	/** TODO: Implement the required magic **/
--	die("NATIVE RAMINIT: More Magic (tm) required.\n");
-+	const bool cbmem_was_initted = !cbmem_recovery(s3resume);
-+	if (s3resume && !cbmem_was_initted) {
-+		/* Failed S3 resume, reset to come up cleanly */
-+		printk(BIOS_CRIT, "Failed to recover CBMEM in S3 resume.\n");
-+		system_reset();
-+	}
-+
-+	/* Save training data on non-S3 resumes */
-+	if (!s3resume)
-+		save_mrc_data(&md);
-+
-+	/** TODO: setup_sdram_meminfo **/
- }
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-new file mode 100644
-index 0000000000..885f0184f4
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -0,0 +1,34 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#ifndef HASWELL_RAMINIT_NATIVE_H
-+#define HASWELL_RAMINIT_NATIVE_H
-+
-+enum raminit_boot_mode {
-+	BOOTMODE_COLD,
-+	BOOTMODE_WARM,
-+	BOOTMODE_S3,
-+	BOOTMODE_FAST,
-+};
-+
-+enum raminit_status {
-+	RAMINIT_STATUS_SUCCESS = 0,
-+	RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
-+};
-+
-+enum generic_stepping {
-+	STEPPING_A0 = 1,
-+	STEPPING_B0 = 2,
-+	STEPPING_C0 = 3,
-+};
-+
-+struct sysinfo {
-+	enum raminit_boot_mode bootmode;
-+	enum generic_stepping stepping;
-+	uint32_t cpu;		/* CPUID value */
-+
-+	bool dq_pins_interleaved;
-+};
-+
-+void raminit_main(enum raminit_boot_mode bootmode);
-+
-+#endif
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0019-haswell-NRI-Add-range-tracking-library.patch b/config/coreboot/haswell/patches/0009-haswell-NRI-Add-range-tracking-library.patch
similarity index 94%
rename from config/coreboot/haswell/patches/0019-haswell-NRI-Add-range-tracking-library.patch
rename to config/coreboot/haswell/patches/0009-haswell-NRI-Add-range-tracking-library.patch
index f433b043..9c3fe1c9 100644
--- a/config/coreboot/haswell/patches/0019-haswell-NRI-Add-range-tracking-library.patch
+++ b/config/coreboot/haswell/patches/0009-haswell-NRI-Add-range-tracking-library.patch
@@ -1,7 +1,7 @@
-From 9fba0468e75877cbda62f5eaeef1946d6489a8f9 Mon Sep 17 00:00:00 2001
+From 7f5c3f8c6c8960d1c374b9c95821c19f230fa34f Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 00:56:00 +0200
-Subject: [PATCH 19/26] haswell NRI: Add range tracking library
+Subject: [PATCH 09/20] haswell NRI: Add range tracking library
 
 Implement a small library used to keep track of passing ranges. This
 will be used by 1D training algorithms when margining some parameter.
@@ -9,17 +9,17 @@ will be used by 1D training algorithms when margining some parameter.
 Change-Id: I8718e85165160afd7c0c8e730b5ce6c9c00f8a60
 Signed-off-by: Angel Pons <th3fanbus@gmail.com>
 ---
- .../intel/haswell/native_raminit/Makefile.inc |   1 +
+ .../intel/haswell/native_raminit/Makefile.mk  |   1 +
  .../intel/haswell/native_raminit/ranges.c     | 109 ++++++++++++++++++
  .../intel/haswell/native_raminit/ranges.h     |  68 +++++++++++
  3 files changed, 178 insertions(+)
  create mode 100644 src/northbridge/intel/haswell/native_raminit/ranges.c
  create mode 100644 src/northbridge/intel/haswell/native_raminit/ranges.h
 
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 index 6e1b365602..2da950771d 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+--- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
++++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 @@ -9,6 +9,7 @@ romstage-y += io_comp_control.c
  romstage-y += memory_map.c
  romstage-y += raminit_main.c
diff --git a/config/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch b/config/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch
deleted file mode 100644
index 07525d18..00000000
--- a/config/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 731216aef3129ae27ad5adc7266cb8a58090c9fc Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sun, 26 Jun 2022 10:32:12 +0200
-Subject: [PATCH 09/26] nb/intel/haswell/nri: Only do CPU replacement check on
- cold boots
-
-CPU replacement check should only be done on cold boots.
-
-Change-Id: I98efa105f4df755b23febe12dd7b356787847852
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/raminit_native.c   | 13 ++++++-------
- 1 file changed, 6 insertions(+), 7 deletions(-)
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-index 0869db3902..bd9bc8e692 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-@@ -40,15 +40,14 @@ static enum raminit_boot_mode get_boot_mode(void)
- 	return (pmcon_2 & bitmask) == bitmask ? BOOTMODE_WARM : BOOTMODE_COLD;
- }
- 
--static bool early_init_native(int s3resume)
-+static bool early_init_native(enum raminit_boot_mode bootmode)
- {
- 	printk(BIOS_DEBUG, "Starting native platform initialisation\n");
- 
- 	intel_early_me_init();
--	/** TODO: CPU replacement check must be skipped in warm boots and S3 resumes **/
--	const bool cpu_replaced = !s3resume && intel_early_me_cpu_replacement_check();
-+	bool cpu_replaced = bootmode == BOOTMODE_COLD && intel_early_me_cpu_replacement_check();
- 
--	early_pch_init_native(s3resume);
-+	early_pch_init_native(bootmode == BOOTMODE_S3);
- 
- 	if (!CONFIG(INTEL_LYNXPOINT_LP))
- 		dmi_early_init();
-@@ -176,13 +175,13 @@ void perform_raminit(const int s3resume)
- 	 * See, this function's name is a lie. There are more things to
- 	 * do that memory initialisation, but they are relatively easy.
- 	 */
--	const bool cpu_replaced = early_init_native(s3resume);
-+	const enum raminit_boot_mode orig_bootmode = get_boot_mode();
-+
-+	const bool cpu_replaced = early_init_native(s3resume ? BOOTMODE_S3 : orig_bootmode);
- 
- 	wait_txt_clear();
- 	wrmsr(0x2e6, (msr_t) {.lo = 0, .hi = 0});
- 
--	const enum raminit_boot_mode orig_bootmode = get_boot_mode();
--
- 	struct mrc_data md = prepare_mrc_cache();
- 
- 	const enum raminit_boot_mode bootmode =
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0020-haswell-NRI-Add-library-to-change-margins.patch b/config/coreboot/haswell/patches/0010-haswell-NRI-Add-library-to-change-margins.patch
similarity index 94%
rename from config/coreboot/haswell/patches/0020-haswell-NRI-Add-library-to-change-margins.patch
rename to config/coreboot/haswell/patches/0010-haswell-NRI-Add-library-to-change-margins.patch
index 30926494..622fac5a 100644
--- a/config/coreboot/haswell/patches/0020-haswell-NRI-Add-library-to-change-margins.patch
+++ b/config/coreboot/haswell/patches/0010-haswell-NRI-Add-library-to-change-margins.patch
@@ -1,24 +1,24 @@
-From 54cfbe4cf53d16f747bfcfadd20445a0f5f1e5db Mon Sep 17 00:00:00 2001
+From 8ad18cc335f60a78f47ab9e5a7994f6075b6a176 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 01:11:03 +0200
-Subject: [PATCH 20/26] haswell NRI: Add library to change margins
+Subject: [PATCH 10/20] haswell NRI: Add library to change margins
 
 Implement a library to change Rx/Tx margins. It will be expanded later.
 
 Change-Id: I0b55aba428d8b4d4e16d2fbdec57235ce3ce8adf
 Signed-off-by: Angel Pons <th3fanbus@gmail.com>
 ---
- .../intel/haswell/native_raminit/Makefile.inc |   1 +
+ .../intel/haswell/native_raminit/Makefile.mk  |   1 +
  .../haswell/native_raminit/change_margin.c    | 154 ++++++++++++++++++
  .../haswell/native_raminit/raminit_native.h   |  50 ++++++
  .../intel/haswell/registers/mchbar.h          |   9 +
  4 files changed, 214 insertions(+)
  create mode 100644 src/northbridge/intel/haswell/native_raminit/change_margin.c
 
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 index 2da950771d..ebe9e9b762 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+--- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
++++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 @@ -1,5 +1,6 @@
  ## SPDX-License-Identifier: GPL-2.0-or-later
  
@@ -28,13 +28,13 @@ index 2da950771d..ebe9e9b762 100644
  romstage-y += jedec_reset.c
 diff --git a/src/northbridge/intel/haswell/native_raminit/change_margin.c b/src/northbridge/intel/haswell/native_raminit/change_margin.c
 new file mode 100644
-index 0000000000..12da59580f
+index 0000000000..055c666eee
 --- /dev/null
 +++ b/src/northbridge/intel/haswell/native_raminit/change_margin.c
 @@ -0,0 +1,154 @@
 +/* SPDX-License-Identifier: GPL-2.0-or-later */
 +
-+#include <commonlib/clamp.h>
++#include <commonlib/bsd/clamp.h>
 +#include <console/console.h>
 +#include <delay.h>
 +#include <northbridge/intel/haswell/haswell.h>
@@ -187,7 +187,7 @@ index 0000000000..12da59580f
 +	mchbar_write32(reg, ddr_data_control_0.raw);
 +}
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 56df36ca8d..7c1a786780 100644
+index 7f19fde4cc..906b3143b9 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 @@ -117,6 +117,30 @@ enum test_stop {
@@ -221,7 +221,7 @@ index 56df36ca8d..7c1a786780 100644
  struct wdb_pat {
  	uint32_t start_ptr;	/* Starting pointer in WDB */
  	uint32_t stop_ptr;	/* Stopping pointer in WDB */
-@@ -452,6 +476,32 @@ uint8_t select_reut_ranks(struct sysinfo *ctrl, uint8_t channel, uint8_t rankmas
+@@ -450,6 +474,32 @@ uint8_t select_reut_ranks(struct sysinfo *ctrl, uint8_t channel, uint8_t rankmas
  void run_mpr_io_test(bool clear_errors);
  uint8_t run_io_test(struct sysinfo *ctrl, uint8_t chanmask, uint8_t dq_pat, bool clear_errors);
  
diff --git a/config/coreboot/haswell/patches/0010-haswell-NRI-Collect-SPD-info.patch b/config/coreboot/haswell/patches/0010-haswell-NRI-Collect-SPD-info.patch
deleted file mode 100644
index 4c2a2670..00000000
--- a/config/coreboot/haswell/patches/0010-haswell-NRI-Collect-SPD-info.patch
+++ /dev/null
@@ -1,344 +0,0 @@
-From 354969af4361bcc7dc240ef5871d169728f7f0cc Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sat, 7 May 2022 13:48:53 +0200
-Subject: [PATCH 10/26] haswell NRI: Collect SPD info
-
-Collect SPD data from DIMMs and memory-down, and find the common
-supported settings.
-
-Change-Id: I4e6a1408a638a463ecae37a447cfed1d6556e44a
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/Makefile.inc |   1 +
- .../haswell/native_raminit/raminit_main.c     |   1 +
- .../haswell/native_raminit/raminit_native.h   |  57 +++++
- .../haswell/native_raminit/spd_bitmunching.c  | 206 ++++++++++++++++++
- 4 files changed, 265 insertions(+)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-index 90af951c5a..ebf7abc6ec 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-@@ -2,3 +2,4 @@
- 
- romstage-y += raminit_main.c
- romstage-y += raminit_native.c
-+romstage-y += spd_bitmunching.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 9b42c25b40..2d2cfa48bb 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -20,6 +20,7 @@ struct task_entry {
- };
- 
- static const struct task_entry cold_boot[] = {
-+	{ collect_spd_info,                                       true, "PROCSPD",    },
- };
- 
- /* Return a generic stepping value to make stepping checks simpler */
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 885f0184f4..1a0793947e 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -3,6 +3,15 @@
- #ifndef HASWELL_RAMINIT_NATIVE_H
- #define HASWELL_RAMINIT_NATIVE_H
- 
-+#include <device/dram/ddr3.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+
-+#define SPD_LEN 256
-+
-+/* 8 data lanes + 1 ECC lane */
-+#define NUM_LANES		9
-+#define NUM_LANES_NO_ECC	8
-+
- enum raminit_boot_mode {
- 	BOOTMODE_COLD,
- 	BOOTMODE_WARM,
-@@ -12,6 +21,8 @@ enum raminit_boot_mode {
- 
- enum raminit_status {
- 	RAMINIT_STATUS_SUCCESS = 0,
-+	RAMINIT_STATUS_NO_MEMORY_INSTALLED,
-+	RAMINIT_STATUS_UNSUPPORTED_MEMORY,
- 	RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
- };
- 
-@@ -21,14 +32,60 @@ enum generic_stepping {
- 	STEPPING_C0 = 3,
- };
- 
-+struct raminit_dimm_info {
-+	spd_raw_data raw_spd;
-+	struct dimm_attr_ddr3_st data;
-+	uint8_t spd_addr;
-+	bool valid;
-+};
-+
- struct sysinfo {
- 	enum raminit_boot_mode bootmode;
- 	enum generic_stepping stepping;
- 	uint32_t cpu;		/* CPUID value */
- 
- 	bool dq_pins_interleaved;
-+
-+	/** TODO: ECC support untested **/
-+	bool is_ecc;
-+
-+	/**
-+	 * FIXME: LPDDR support is incomplete. The largest chunks are missing,
-+	 * but some LPDDR-specific variations in algorithms have been handled.
-+	 * LPDDR-specific functions have stubs which will halt upon execution.
-+	 */
-+	bool lpddr;
-+
-+	struct raminit_dimm_info dimms[NUM_CHANNELS][NUM_SLOTS];
-+	union dimm_flags_ddr3_st flags;
-+	uint16_t cas_supported;
-+
-+	/* Except for tCK, everything is eventually stored in DCLKs */
-+	uint32_t tCK;
-+	uint32_t tAA;			/* Also known as tCL */
-+	uint32_t tWR;
-+	uint32_t tRCD;
-+	uint32_t tRRD;
-+	uint32_t tRP;
-+	uint32_t tRAS;
-+	uint32_t tRC;
-+	uint32_t tRFC;
-+	uint32_t tWTR;
-+	uint32_t tRTP;
-+	uint32_t tFAW;
-+	uint32_t tCWL;
-+	uint32_t tCMD;
-+
-+	uint8_t lanes;			/* 8 or 9 */
-+	uint8_t chanmap;
-+	uint8_t dpc[NUM_CHANNELS];	/* DIMMs per channel */
-+	uint8_t rankmap[NUM_CHANNELS];
-+	uint8_t rank_mirrored[NUM_CHANNELS];
-+	uint32_t channel_size_mb[NUM_CHANNELS];
- };
- 
- void raminit_main(enum raminit_boot_mode bootmode);
- 
-+enum raminit_status collect_spd_info(struct sysinfo *ctrl);
-+
- #endif
-diff --git a/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c b/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c
-new file mode 100644
-index 0000000000..dbe02c72d0
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c
-@@ -0,0 +1,206 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <cbfs.h>
-+#include <commonlib/clamp.h>
-+#include <console/console.h>
-+#include <device/dram/ddr3.h>
-+#include <device/smbus_host.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <northbridge/intel/haswell/raminit.h>
-+#include <string.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+
-+static const uint8_t *get_spd_data_from_cbfs(struct spd_info *spdi)
-+{
-+	if (!CONFIG(HAVE_SPD_IN_CBFS))
-+		return NULL;
-+
-+	printk(RAM_DEBUG, "SPD index %u\n", spdi->spd_index);
-+
-+	size_t spd_file_len;
-+	uint8_t *spd_file = cbfs_map("spd.bin", &spd_file_len);
-+
-+	if (!spd_file) {
-+		printk(BIOS_ERR, "SPD data not found in CBFS\n");
-+		return NULL;
-+	}
-+
-+	if (spd_file_len < ((spdi->spd_index + 1) * SPD_LEN)) {
-+		printk(BIOS_ERR, "SPD index override to 0 - old hardware?\n");
-+		spdi->spd_index = 0;
-+	}
-+
-+	if (spd_file_len < SPD_LEN) {
-+		printk(BIOS_ERR, "Invalid SPD data in CBFS\n");
-+		return NULL;
-+	}
-+
-+	return spd_file + (spdi->spd_index * SPD_LEN);
-+}
-+
-+static void get_spd_for_dimm(struct raminit_dimm_info *const dimm, const uint8_t *cbfs_spd)
-+{
-+	if (dimm->spd_addr == SPD_MEMORY_DOWN) {
-+		if (cbfs_spd) {
-+			memcpy(dimm->raw_spd, cbfs_spd, SPD_LEN);
-+			dimm->valid = true;
-+			printk(RAM_DEBUG, "memory-down\n");
-+			return;
-+		} else {
-+			printk(RAM_DEBUG, "memory-down but no CBFS SPD data, ignoring\n");
-+			return;
-+		}
-+	}
-+	printk(RAM_DEBUG, "slotted ");
-+	const uint8_t spd_mem_type = smbus_read_byte(dimm->spd_addr, SPD_MEMORY_TYPE);
-+	if (spd_mem_type != SPD_MEMORY_TYPE_SDRAM_DDR3) {
-+		printk(RAM_DEBUG, "and not DDR3, ignoring\n");
-+		return;
-+	}
-+	printk(RAM_DEBUG, "and DDR3\n");
-+	if (i2c_eeprom_read(dimm->spd_addr, 0, SPD_LEN, dimm->raw_spd) != SPD_LEN) {
-+		printk(BIOS_WARNING, "I2C block read failed, trying SMBus byte reads\n");
-+		for (uint32_t i = 0; i < SPD_LEN; i++)
-+			dimm->raw_spd[i] = smbus_read_byte(dimm->spd_addr, i);
-+	}
-+	dimm->valid = true;
-+}
-+
-+static void get_spd_data(struct sysinfo *ctrl)
-+{
-+	struct spd_info spdi = {0};
-+	mb_get_spd_map(&spdi);
-+	const uint8_t *cbfs_spd = get_spd_data_from_cbfs(&spdi);
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) {
-+			struct raminit_dimm_info *const dimm = &ctrl->dimms[channel][slot];
-+			dimm->spd_addr = spdi.addresses[channel + channel + slot];
-+			if (!dimm->spd_addr)
-+				continue;
-+
-+			printk(RAM_DEBUG, "CH%uS%u is ", channel, slot);
-+			get_spd_for_dimm(dimm, cbfs_spd);
-+		}
-+	}
-+}
-+
-+static void decode_spd(struct raminit_dimm_info *const dimm)
-+{
-+	/** TODO: Hook up somewhere, and handle lack of XMP data **/
-+	const bool enable_xmp = false;
-+	memset(&dimm->data, 0, sizeof(dimm->data));
-+	if (enable_xmp)
-+		spd_xmp_decode_ddr3(&dimm->data, dimm->raw_spd, DDR3_XMP_PROFILE_1);
-+	else
-+		spd_decode_ddr3(&dimm->data, dimm->raw_spd);
-+
-+	if (CONFIG(DEBUG_RAM_SETUP))
-+		dram_print_spd_ddr3(&dimm->data);
-+}
-+
-+static enum raminit_status find_common_spd_parameters(struct sysinfo *ctrl)
-+{
-+	ctrl->cas_supported = 0xffff;
-+	ctrl->flags.raw = 0xffffffff;
-+
-+	ctrl->tCK  = 0;
-+	ctrl->tAA  = 0;
-+	ctrl->tWR  = 0;
-+	ctrl->tRCD = 0;
-+	ctrl->tRRD = 0;
-+	ctrl->tRP  = 0;
-+	ctrl->tRAS = 0;
-+	ctrl->tRC  = 0;
-+	ctrl->tRFC = 0;
-+	ctrl->tWTR = 0;
-+	ctrl->tRTP = 0;
-+	ctrl->tFAW = 0;
-+	ctrl->tCWL = 0;
-+	ctrl->tCMD = 0;
-+	ctrl->chanmap = 0;
-+
-+	bool yes_ecc = false;
-+	bool not_ecc = false;
-+
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		ctrl->dpc[channel] = 0;
-+		ctrl->rankmap[channel] = 0;
-+		ctrl->rank_mirrored[channel] = 0;
-+		ctrl->channel_size_mb[channel] = 0;
-+		for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) {
-+			struct raminit_dimm_info *const dimm = &ctrl->dimms[channel][slot];
-+			if (!dimm->valid)
-+				continue;
-+
-+			printk(RAM_DEBUG, "\nCH%uS%u SPD:\n", channel, slot);
-+			decode_spd(dimm);
-+
-+			ctrl->chanmap |= BIT(channel);
-+			ctrl->dpc[channel]++;
-+			ctrl->channel_size_mb[channel] += dimm->data.size_mb;
-+
-+			/* The first rank of a populated slot is always present */
-+			const uint8_t rank = slot + slot;
-+			assert(dimm->data.ranks);
-+			ctrl->rankmap[channel] |= (BIT(dimm->data.ranks) - 1) << rank;
-+
-+			if (dimm->data.flags.pins_mirrored)
-+				ctrl->rank_mirrored[channel] |= BIT(rank + 1);
-+
-+			/* Find common settings */
-+			ctrl->cas_supported &= dimm->data.cas_supported;
-+			ctrl->flags.raw &= dimm->data.flags.raw;
-+			ctrl->tCK  = MAX(ctrl->tCK,  dimm->data.tCK);
-+			ctrl->tAA  = MAX(ctrl->tAA,  dimm->data.tAA);
-+			ctrl->tWR  = MAX(ctrl->tWR,  dimm->data.tWR);
-+			ctrl->tRCD = MAX(ctrl->tRCD, dimm->data.tRCD);
-+			ctrl->tRRD = MAX(ctrl->tRRD, dimm->data.tRRD);
-+			ctrl->tRP  = MAX(ctrl->tRP,  dimm->data.tRP);
-+			ctrl->tRAS = MAX(ctrl->tRAS, dimm->data.tRAS);
-+			ctrl->tRC  = MAX(ctrl->tRC,  dimm->data.tRC);
-+			ctrl->tRFC = MAX(ctrl->tRFC, dimm->data.tRFC);
-+			ctrl->tWTR = MAX(ctrl->tWTR, dimm->data.tWTR);
-+			ctrl->tRTP = MAX(ctrl->tRTP, dimm->data.tRTP);
-+			ctrl->tFAW = MAX(ctrl->tFAW, dimm->data.tFAW);
-+			ctrl->tCWL = MAX(ctrl->tCWL, dimm->data.tCWL);
-+			ctrl->tCMD = MAX(ctrl->tCMD, dimm->data.tCMD);
-+
-+			yes_ecc |=  dimm->data.flags.is_ecc;
-+			not_ecc |= !dimm->data.flags.is_ecc;
-+		}
-+	}
-+
-+	if (!ctrl->chanmap) {
-+		printk(BIOS_ERR, "No DIMMs were found\n");
-+		return RAMINIT_STATUS_NO_MEMORY_INSTALLED;
-+	}
-+	if (!ctrl->cas_supported) {
-+		printk(BIOS_ERR, "Could not resolve common CAS latency\n");
-+		return RAMINIT_STATUS_UNSUPPORTED_MEMORY;
-+	}
-+	/** TODO: Properly handle ECC support and ECC forced **/
-+	if (yes_ecc && not_ecc) {
-+		/** TODO: Test if the ECC DIMMs can be operated as non-ECC DIMMs **/
-+		printk(BIOS_ERR, "Both ECC and non-ECC DIMMs present, this is unsupported\n");
-+		return RAMINIT_STATUS_UNSUPPORTED_MEMORY;
-+	}
-+	if (yes_ecc)
-+		ctrl->lanes = NUM_LANES;
-+	else
-+		ctrl->lanes = NUM_LANES_NO_ECC;
-+
-+	ctrl->is_ecc = yes_ecc;
-+
-+	/** TODO: Complete LPDDR support **/
-+	ctrl->lpddr = false;
-+
-+	return RAMINIT_STATUS_SUCCESS;
-+}
-+
-+enum raminit_status collect_spd_info(struct sysinfo *ctrl)
-+{
-+	get_spd_data(ctrl);
-+	return find_common_spd_parameters(ctrl);
-+}
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0021-haswell-NRI-Add-RcvEn-training.patch b/config/coreboot/haswell/patches/0011-haswell-NRI-Add-RcvEn-training.patch
similarity index 98%
rename from config/coreboot/haswell/patches/0021-haswell-NRI-Add-RcvEn-training.patch
rename to config/coreboot/haswell/patches/0011-haswell-NRI-Add-RcvEn-training.patch
index 9139a67e..4815be9a 100644
--- a/config/coreboot/haswell/patches/0021-haswell-NRI-Add-RcvEn-training.patch
+++ b/config/coreboot/haswell/patches/0011-haswell-NRI-Add-RcvEn-training.patch
@@ -1,14 +1,14 @@
-From ac8843553af34855d0331554c03280e66c4ea582 Mon Sep 17 00:00:00 2001
+From 4254a9ff03658d7a6f1a4e32cfe4c65dbfc072f8 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 00:05:41 +0200
-Subject: [PATCH 21/26] haswell NRI: Add RcvEn training
+Subject: [PATCH 11/20] haswell NRI: Add RcvEn training
 
 Implement the RcvEn (Receive Enable) calibration procedure.
 
 Change-Id: Ifbfa520f3e0486c56d0988ce67af2ddb9cf29888
 Signed-off-by: Angel Pons <th3fanbus@gmail.com>
 ---
- .../intel/haswell/native_raminit/Makefile.inc |   1 +
+ .../intel/haswell/native_raminit/Makefile.mk  |   1 +
  .../haswell/native_raminit/raminit_main.c     |   1 +
  .../haswell/native_raminit/raminit_native.h   |  14 +
  .../haswell/native_raminit/reg_structs.h      |  13 +
@@ -17,10 +17,10 @@ Signed-off-by: Angel Pons <th3fanbus@gmail.com>
  6 files changed, 593 insertions(+)
  create mode 100644 src/northbridge/intel/haswell/native_raminit/train_receive_enable.c
 
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 index ebe9e9b762..e2fbfb4211 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+--- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
++++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 @@ -16,3 +16,4 @@ romstage-y += setup_wdb.c
  romstage-y += spd_bitmunching.c
  romstage-y += testing_io.c
@@ -39,7 +39,7 @@ index 5e4674957d..7d444659c3 100644
  
  /* Return a generic stepping value to make stepping checks simpler */
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 7c1a786780..a36ebfacd1 100644
+index 906b3143b9..b4e8c7de5a 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 @@ -42,6 +42,9 @@
@@ -83,7 +83,7 @@ index 7c1a786780..a36ebfacd1 100644
  /* Number of ticks to wait in units of 69.841279 ns (citation needed) */
  static inline void tick_delay(const uint32_t delay)
  {
-@@ -401,6 +414,7 @@ enum raminit_status convert_timings(struct sysinfo *ctrl);
+@@ -399,6 +412,7 @@ enum raminit_status convert_timings(struct sysinfo *ctrl);
  enum raminit_status configure_mc(struct sysinfo *ctrl);
  enum raminit_status configure_memory_map(struct sysinfo *ctrl);
  enum raminit_status do_jedec_init(struct sysinfo *ctrl);
diff --git a/config/coreboot/haswell/patches/0022-haswell-NRI-Add-function-to-change-margins.patch b/config/coreboot/haswell/patches/0012-haswell-NRI-Add-function-to-change-margins.patch
similarity index 96%
rename from config/coreboot/haswell/patches/0022-haswell-NRI-Add-function-to-change-margins.patch
rename to config/coreboot/haswell/patches/0012-haswell-NRI-Add-function-to-change-margins.patch
index 2e6de17c..f4f5161e 100644
--- a/config/coreboot/haswell/patches/0022-haswell-NRI-Add-function-to-change-margins.patch
+++ b/config/coreboot/haswell/patches/0012-haswell-NRI-Add-function-to-change-margins.patch
@@ -1,7 +1,7 @@
-From 8c3874195c0fc1af9d0b84611496689da1c19d8c Mon Sep 17 00:00:00 2001
+From c24b26594bfab47a8709ed7fb5cb77307fb73a53 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 11:58:59 +0200
-Subject: [PATCH 22/26] haswell NRI: Add function to change margins
+Subject: [PATCH 12/20] haswell NRI: Add function to change margins
 
 Implement a function to change margin parameters. Haswell provides a
 register to apply an offset to margin parameters during training, so
@@ -19,14 +19,14 @@ Signed-off-by: Angel Pons <th3fanbus@gmail.com>
  4 files changed, 188 insertions(+)
 
 diff --git a/src/northbridge/intel/haswell/native_raminit/change_margin.c b/src/northbridge/intel/haswell/native_raminit/change_margin.c
-index 12da59580f..4ba9cfa5c6 100644
+index 055c666eee..299c44a6b0 100644
 --- a/src/northbridge/intel/haswell/native_raminit/change_margin.c
 +++ b/src/northbridge/intel/haswell/native_raminit/change_margin.c
 @@ -1,5 +1,6 @@
  /* SPDX-License-Identifier: GPL-2.0-or-later */
  
 +#include <assert.h>
- #include <commonlib/clamp.h>
+ #include <commonlib/bsd/clamp.h>
  #include <console/console.h>
  #include <delay.h>
 @@ -152,3 +153,138 @@ void download_regfile(
@@ -169,7 +169,7 @@ index 12da59580f..4ba9cfa5c6 100644
 +	change_margin(ctrl, param, value0, true, 0, rank, 0, update_ctrl, regfile);
 +}
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index a36ebfacd1..500fc28909 100644
+index b4e8c7de5a..5242b16f28 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 @@ -35,6 +35,18 @@
@@ -206,7 +206,7 @@ index a36ebfacd1..500fc28909 100644
  /* ZQ calibration types */
  enum {
  	ZQ_INIT,	/* DDR3: ZQCL with tZQinit, LPDDR3: ZQ Init  with tZQinit  */
-@@ -516,6 +536,25 @@ void download_regfile(
+@@ -514,6 +534,25 @@ void download_regfile(
  	bool read_rf_rd,
  	bool read_rf_wr);
  
diff --git a/config/coreboot/haswell/patches/0023-haswell-NRI-Add-read-MPR-training.patch b/config/coreboot/haswell/patches/0013-haswell-NRI-Add-read-MPR-training.patch
similarity index 93%
rename from config/coreboot/haswell/patches/0023-haswell-NRI-Add-read-MPR-training.patch
rename to config/coreboot/haswell/patches/0013-haswell-NRI-Add-read-MPR-training.patch
index b13eb2db..5f154bcc 100644
--- a/config/coreboot/haswell/patches/0023-haswell-NRI-Add-read-MPR-training.patch
+++ b/config/coreboot/haswell/patches/0013-haswell-NRI-Add-read-MPR-training.patch
@@ -1,25 +1,25 @@
-From 6781cec818501f7afd6ee26464fd4556ac3068cb Mon Sep 17 00:00:00 2001
+From e263f0d2e9d6d016d603342651da261bbcb6af1f Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 11:35:49 +0200
-Subject: [PATCH 23/26] haswell NRI: Add read MPR training
+Subject: [PATCH 13/20] haswell NRI: Add read MPR training
 
 Implement read training using DDR3 MPR (Multi-Purpose Register).
 
 Change-Id: Id17cb2c4c399ac9bcc937b595b58f863c152461b
 Signed-off-by: Angel Pons <th3fanbus@gmail.com>
 ---
- .../intel/haswell/native_raminit/Makefile.inc |   1 +
+ .../intel/haswell/native_raminit/Makefile.mk  |   1 +
  .../haswell/native_raminit/raminit_main.c     |   1 +
  .../haswell/native_raminit/raminit_native.h   |   4 +
- .../haswell/native_raminit/train_read_mpr.c   | 240 ++++++++++++++++++
+ .../haswell/native_raminit/train_read_mpr.c   | 241 ++++++++++++++++++
  .../intel/haswell/registers/mchbar.h          |   2 +-
- 5 files changed, 247 insertions(+), 1 deletion(-)
+ 5 files changed, 248 insertions(+), 1 deletion(-)
  create mode 100644 src/northbridge/intel/haswell/native_raminit/train_read_mpr.c
 
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 index e2fbfb4211..c442be0728 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+--- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
++++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 @@ -16,4 +16,5 @@ romstage-y += setup_wdb.c
  romstage-y += spd_bitmunching.c
  romstage-y += testing_io.c
@@ -39,7 +39,7 @@ index 7d444659c3..264d1468f5 100644
  
  /* Return a generic stepping value to make stepping checks simpler */
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 500fc28909..a7551ad63c 100644
+index 5242b16f28..49e9214656 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 @@ -27,6 +27,8 @@
@@ -59,7 +59,7 @@ index 500fc28909..a7551ad63c 100644
  	RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
  };
  
-@@ -435,6 +438,7 @@ enum raminit_status configure_mc(struct sysinfo *ctrl);
+@@ -433,6 +436,7 @@ enum raminit_status configure_mc(struct sysinfo *ctrl);
  enum raminit_status configure_memory_map(struct sysinfo *ctrl);
  enum raminit_status do_jedec_init(struct sysinfo *ctrl);
  enum raminit_status train_receive_enable(struct sysinfo *ctrl);
@@ -69,13 +69,13 @@ index 500fc28909..a7551ad63c 100644
  void configure_refresh(struct sysinfo *ctrl);
 diff --git a/src/northbridge/intel/haswell/native_raminit/train_read_mpr.c b/src/northbridge/intel/haswell/native_raminit/train_read_mpr.c
 new file mode 100644
-index 0000000000..0225e1a384
+index 0000000000..ade1e36148
 --- /dev/null
 +++ b/src/northbridge/intel/haswell/native_raminit/train_read_mpr.c
-@@ -0,0 +1,240 @@
+@@ -0,0 +1,241 @@
 +/* SPDX-License-Identifier: GPL-2.0-or-later */
 +
-+#include <commonlib/clamp.h>
++#include <commonlib/bsd/clamp.h>
 +#include <console/console.h>
 +#include <delay.h>
 +#include <northbridge/intel/haswell/haswell.h>
@@ -206,7 +206,8 @@ index 0000000000..0225e1a384
 +		for (dqs_delay = RMPR_START; dqs_delay < RMPR_STOP; dqs_delay += RMPR_STEP) {
 +			printk(RMPR_PLOT, "% 5d", dqs_delay);
 +			const enum regfile_mode regfile = REG_FILE_USE_START;
-+			change_1d_margin_multicast(ctrl, RdT, dqs_delay, 0, false, regfile);
++			/* Looks like MRC uses rank 0 here, but it feels wrong */
++			change_1d_margin_multicast(ctrl, RdT, dqs_delay, rank, false, regfile);
 +			for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
 +				if (!rank_in_ch(ctrl, rank, channel))
 +					continue;
diff --git a/config/coreboot/haswell/patches/0024-haswell-NRI-Add-write-leveling.patch b/config/coreboot/haswell/patches/0014-haswell-NRI-Add-write-leveling.patch
similarity index 96%
rename from config/coreboot/haswell/patches/0024-haswell-NRI-Add-write-leveling.patch
rename to config/coreboot/haswell/patches/0014-haswell-NRI-Add-write-leveling.patch
index 59e9af9d..5a96cd1f 100644
--- a/config/coreboot/haswell/patches/0024-haswell-NRI-Add-write-leveling.patch
+++ b/config/coreboot/haswell/patches/0014-haswell-NRI-Add-write-leveling.patch
@@ -1,7 +1,7 @@
-From 20fe4fa852d3e13851a01b51dc984ec5976c864e Mon Sep 17 00:00:00 2001
+From bebe0b74bede64b03aa1e3781310ef539465627b Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 12:56:04 +0200
-Subject: [PATCH 24/26] haswell NRI: Add write leveling
+Subject: [PATCH 14/20] haswell NRI: Add write leveling
 
 Implement JEDEC write leveling, which is done in two steps. The first
 step uses the JEDEC procedure to do "fine" write leveling, i.e. align
@@ -11,18 +11,18 @@ read-write test to correct "coarse" cycle errors.
 Change-Id: I27678523fe22c38173a688e2a4751c259a20f009
 Signed-off-by: Angel Pons <th3fanbus@gmail.com>
 ---
- .../intel/haswell/native_raminit/Makefile.inc |   1 +
+ .../intel/haswell/native_raminit/Makefile.mk  |   1 +
  .../haswell/native_raminit/raminit_main.c     |   1 +
  .../haswell/native_raminit/raminit_native.h   |  10 +
- .../train_jedec_write_leveling.c              | 580 ++++++++++++++++++
+ .../train_jedec_write_leveling.c              | 581 ++++++++++++++++++
  .../intel/haswell/registers/mchbar.h          |   2 +
- 5 files changed, 594 insertions(+)
+ 5 files changed, 595 insertions(+)
  create mode 100644 src/northbridge/intel/haswell/native_raminit/train_jedec_write_leveling.c
 
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 index c442be0728..40c2f5e014 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+--- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
++++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 @@ -16,5 +16,6 @@ romstage-y += setup_wdb.c
  romstage-y += spd_bitmunching.c
  romstage-y += testing_io.c
@@ -43,7 +43,7 @@ index 264d1468f5..1ff23be615 100644
  
  /* Return a generic stepping value to make stepping checks simpler */
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index a7551ad63c..666b233c45 100644
+index 49e9214656..86d89f2120 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 @@ -59,6 +59,9 @@
@@ -76,7 +76,7 @@ index a7551ad63c..666b233c45 100644
  /* Number of ticks to wait in units of 69.841279 ns (citation needed) */
  static inline void tick_delay(const uint32_t delay)
  {
-@@ -439,6 +448,7 @@ enum raminit_status configure_memory_map(struct sysinfo *ctrl);
+@@ -437,6 +446,7 @@ enum raminit_status configure_memory_map(struct sysinfo *ctrl);
  enum raminit_status do_jedec_init(struct sysinfo *ctrl);
  enum raminit_status train_receive_enable(struct sysinfo *ctrl);
  enum raminit_status train_read_mpr(struct sysinfo *ctrl);
@@ -86,10 +86,10 @@ index a7551ad63c..666b233c45 100644
  void configure_refresh(struct sysinfo *ctrl);
 diff --git a/src/northbridge/intel/haswell/native_raminit/train_jedec_write_leveling.c b/src/northbridge/intel/haswell/native_raminit/train_jedec_write_leveling.c
 new file mode 100644
-index 0000000000..1ba28a3bd4
+index 0000000000..ef6483e2bd
 --- /dev/null
 +++ b/src/northbridge/intel/haswell/native_raminit/train_jedec_write_leveling.c
-@@ -0,0 +1,580 @@
+@@ -0,0 +1,581 @@
 +/* SPDX-License-Identifier: GPL-2.0-or-later */
 +
 +#include <assert.h>
@@ -106,7 +106,8 @@ index 0000000000..1ba28a3bd4
 +
 +static void reset_dram_dll(struct sysinfo *ctrl, const uint8_t channel, const uint8_t rank)
 +{
-+	reut_issue_mrs(ctrl, channel, BIT(rank), 0, ctrl->mr0[channel][rank] | MR0_DLL_RESET);
++	const uint16_t mr0reg = ctrl->mr0[channel][rank / 2];
++	reut_issue_mrs(ctrl, channel, BIT(rank), 0, mr0reg | MR0_DLL_RESET);
 +}
 +
 +static void program_wdb_pattern(struct sysinfo *ctrl, const bool invert)
@@ -463,7 +464,7 @@ index 0000000000..1ba28a3bd4
 +				continue;
 +
 +			/** TODO: Differs for LPDDR **/
-+			uint16_t mr1reg = ctrl->mr1[channel][rank];
++			uint16_t mr1reg = ctrl->mr1[channel][rank / 2];
 +			mr1reg &= ~MR1_QOFF_ENABLE;
 +			mr1reg |= MR1_WL_ENABLE;
 +			if (is_hsw_ult()) {
@@ -605,7 +606,7 @@ index 0000000000..1ba28a3bd4
 +			mchbar_write32(REUT_ch_MISC_ODT_CTRL(channel), 0);
 +
 +			/** TODO: Differs for LPDDR **/
-+			const uint16_t mr1reg = ctrl->mr1[channel][rank] | MR1_QOFF_ENABLE;
++			const uint16_t mr1reg = ctrl->mr1[channel][rank / 2] | MR1_QOFF_ENABLE;
 +			reut_issue_mrs(ctrl, channel, BIT(rank), 1, mr1reg);
 +
 +			printk(BIOS_DEBUG, "\nC%u.R%u:  LftEdge Width\n", channel, rank);
diff --git a/config/coreboot/haswell/patches/0025-haswell-NRI-Add-final-raminit-steps.patch b/config/coreboot/haswell/patches/0015-haswell-NRI-Add-final-raminit-steps.patch
similarity index 96%
rename from config/coreboot/haswell/patches/0025-haswell-NRI-Add-final-raminit-steps.patch
rename to config/coreboot/haswell/patches/0015-haswell-NRI-Add-final-raminit-steps.patch
index d15ea5d1..3626bf6d 100644
--- a/config/coreboot/haswell/patches/0025-haswell-NRI-Add-final-raminit-steps.patch
+++ b/config/coreboot/haswell/patches/0015-haswell-NRI-Add-final-raminit-steps.patch
@@ -1,7 +1,7 @@
-From d041b14f3af69db5f4598c84e3f53c9cd572ffb5 Mon Sep 17 00:00:00 2001
+From eba8680d618db95028e3f984f25881df0e67abf7 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 14:29:05 +0200
-Subject: [PATCH 25/26] haswell NRI: Add final raminit steps
+Subject: [PATCH 15/20] haswell NRI: Add final raminit steps
 
 Implement the remaining raminit steps. Although many training steps are
 missing, this is enough to boot on the Asrock B85M Pro4.
@@ -10,7 +10,7 @@ Change-Id: I94f3b65f0218d4da4fda4d84592dfd91f77f8f21
 Signed-off-by: Angel Pons <th3fanbus@gmail.com>
 ---
  src/northbridge/intel/haswell/Kconfig         |   4 +-
- .../intel/haswell/native_raminit/Makefile.inc |   1 +
+ .../intel/haswell/native_raminit/Makefile.mk  |   1 +
  .../haswell/native_raminit/activate_mc.c      | 388 ++++++++++++++++++
  .../haswell/native_raminit/raminit_main.c     |   5 +-
  .../haswell/native_raminit/raminit_native.c   |   5 +-
@@ -21,10 +21,10 @@ Signed-off-by: Angel Pons <th3fanbus@gmail.com>
  create mode 100644 src/northbridge/intel/haswell/native_raminit/activate_mc.c
 
 diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
-index b659bf6d98..61f2a3c64c 100644
+index 4b83a25bc1..c6ab27184e 100644
 --- a/src/northbridge/intel/haswell/Kconfig
 +++ b/src/northbridge/intel/haswell/Kconfig
-@@ -10,12 +10,12 @@ config NORTHBRIDGE_INTEL_HASWELL
+@@ -11,12 +11,12 @@ config NORTHBRIDGE_INTEL_HASWELL
  if NORTHBRIDGE_INTEL_HASWELL
  
  config USE_NATIVE_RAMINIT
@@ -39,10 +39,10 @@ index b659bf6d98..61f2a3c64c 100644
  
  config HASWELL_VBOOT_IN_BOOTBLOCK
  	depends on VBOOT
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 index 40c2f5e014..d97da72890 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.inc
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
+--- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
++++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
 @@ -1,5 +1,6 @@
  ## SPDX-License-Identifier: GPL-2.0-or-later
  
@@ -466,10 +466,10 @@ index 1ff23be615..3a65fb01fb 100644
 -	die("NATIVE RAMINIT: More Magic (tm) required.\n");
  }
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-index bd9bc8e692..1ea729b23d 100644
+index 2fed93de5b..5f7ceec222 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-@@ -200,8 +200,6 @@ void perform_raminit(const int s3resume)
+@@ -199,8 +199,6 @@ void perform_raminit(const int s3resume)
  		else
  			me_status = ME_INIT_STATUS_SUCCESS;
  
@@ -478,7 +478,7 @@ index bd9bc8e692..1ea729b23d 100644
  		intel_early_me_init_done(me_status);
  	}
  
-@@ -217,7 +215,8 @@ void perform_raminit(const int s3resume)
+@@ -214,7 +212,8 @@ void perform_raminit(const int s3resume)
  	}
  
  	/* Save training data on non-S3 resumes */
@@ -489,10 +489,10 @@ index bd9bc8e692..1ea729b23d 100644
  
  	/** TODO: setup_sdram_meminfo **/
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 666b233c45..98e39cb76e 100644
+index 86d89f2120..9bab57b518 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -449,6 +449,8 @@ enum raminit_status do_jedec_init(struct sysinfo *ctrl);
+@@ -447,6 +447,8 @@ enum raminit_status do_jedec_init(struct sysinfo *ctrl);
  enum raminit_status train_receive_enable(struct sysinfo *ctrl);
  enum raminit_status train_read_mpr(struct sysinfo *ctrl);
  enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl);
diff --git a/config/coreboot/haswell/patches/0016-Haswell-NRI-Implement-fast-boot-path.patch b/config/coreboot/haswell/patches/0016-Haswell-NRI-Implement-fast-boot-path.patch
new file mode 100644
index 00000000..c2fd8b60
--- /dev/null
+++ b/config/coreboot/haswell/patches/0016-Haswell-NRI-Implement-fast-boot-path.patch
@@ -0,0 +1,722 @@
+From c7d6a901edf648f0f02dd2053337bcf3a319e49b Mon Sep 17 00:00:00 2001
+From: Angel Pons <th3fanbus@gmail.com>
+Date: Sat, 13 Apr 2024 01:16:30 +0200
+Subject: [PATCH 16/20] Haswell NRI: Implement fast boot path
+
+When the memory configuration hasn't changed, there is no need to do
+full memory training. Instead, boot firmware can use saved training
+data to reinitialise the memory controller and memory.
+
+Unlike native RAM init for other platforms, Haswell does not save the
+main structure (the "mighty ctrl" struct) to flash. Instead, separate
+structures define the data to be saved, which can be smaller than the
+main structure.
+
+This makes S3 suspend and resume work: RAM contents MUST be preserved
+for a S3 resume to succeed, but RAM training destroys RAM contents.
+
+Change-Id: I06f6cd39ceecdca104fae89159f28e85cf7ff4e6
+Signed-off-by: Angel Pons <th3fanbus@gmail.com>
+---
+ .../intel/haswell/native_raminit/Makefile.mk  |   1 +
+ .../haswell/native_raminit/activate_mc.c      |  17 +
+ .../intel/haswell/native_raminit/ddr3.c       |  41 ++
+ .../haswell/native_raminit/raminit_main.c     |  34 +-
+ .../haswell/native_raminit/raminit_native.c   |  30 +-
+ .../haswell/native_raminit/raminit_native.h   |  18 +
+ .../haswell/native_raminit/save_restore.c     | 387 ++++++++++++++++++
+ 7 files changed, 504 insertions(+), 24 deletions(-)
+ create mode 100644 src/northbridge/intel/haswell/native_raminit/save_restore.c
+
+diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
+index d97da72890..8fdd17c542 100644
+--- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
++++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
+@@ -13,6 +13,7 @@ romstage-y += raminit_main.c
+ romstage-y += raminit_native.c
+ romstage-y += ranges.c
+ romstage-y += reut.c
++romstage-y += save_restore.c
+ romstage-y += setup_wdb.c
+ romstage-y += spd_bitmunching.c
+ romstage-y += testing_io.c
+diff --git a/src/northbridge/intel/haswell/native_raminit/activate_mc.c b/src/northbridge/intel/haswell/native_raminit/activate_mc.c
+index 78a7ad27ef..0b3eb917da 100644
+--- a/src/northbridge/intel/haswell/native_raminit/activate_mc.c
++++ b/src/northbridge/intel/haswell/native_raminit/activate_mc.c
+@@ -333,6 +333,23 @@ enum raminit_status activate_mc(struct sysinfo *ctrl)
+ 	return RAMINIT_STATUS_SUCCESS;
+ }
+ 
++enum raminit_status normal_state(struct sysinfo *ctrl)
++{
++	/* Enable periodic COMP */
++	mchbar_write32(M_COMP, (union pcu_comp_reg) {
++		.comp_interval = COMP_INT,
++	}.raw);
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		if (!does_ch_exist(ctrl, channel))
++			continue;
++
++		/* Set MC to normal mode and clean the ODT and CKE */
++		mchbar_write32(REUT_ch_SEQ_CFG(channel), REUT_MODE_NOP << 12);
++	}
++	power_down_config(ctrl);
++	return RAMINIT_STATUS_SUCCESS;
++}
++
+ static void mc_lockdown(void)
+ {
+ 	/* Lock memory controller registers */
+diff --git a/src/northbridge/intel/haswell/native_raminit/ddr3.c b/src/northbridge/intel/haswell/native_raminit/ddr3.c
+index 6ddb11488b..9b6368edb1 100644
+--- a/src/northbridge/intel/haswell/native_raminit/ddr3.c
++++ b/src/northbridge/intel/haswell/native_raminit/ddr3.c
+@@ -2,6 +2,7 @@
+ 
+ #include <assert.h>
+ #include <console/console.h>
++#include <delay.h>
+ #include <northbridge/intel/haswell/haswell.h>
+ #include <types.h>
+ 
+@@ -215,3 +216,43 @@ enum raminit_status ddr3_jedec_init(struct sysinfo *ctrl)
+ 	ddr3_program_mr0(ctrl, 1);
+ 	return reut_issue_zq(ctrl, ctrl->chanmap, ZQ_INIT);
+ }
++
++enum raminit_status exit_selfrefresh(struct sysinfo *ctrl)
++{
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		if (!does_ch_exist(ctrl, channel))
++			continue;
++
++		/* Fields in ctrl aren't populated on a warm boot */
++		union ddr_data_control_0_reg data_control_0 = {
++			.raw = mchbar_read32(DQ_CONTROL_0(channel, 0)),
++		};
++		data_control_0.read_rf_rd = 1;
++		for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
++			if (!rank_in_ch(ctrl, rank, channel))
++				continue;
++
++			data_control_0.read_rf_rank = rank;
++			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
++		}
++	}
++
++	/* Time needed to stabilize the DCLK (~6 us) */
++	udelay(6);
++
++	/* Pull the DIMMs out of self refresh by asserting CKE high */
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		const union reut_misc_cke_ctrl_reg reut_misc_cke_ctrl = {
++			.cke_on = ctrl->rankmap[channel],
++		};
++		mchbar_write32(REUT_ch_MISC_CKE_CTRL(channel), reut_misc_cke_ctrl.raw);
++	}
++	mchbar_write32(REUT_MISC_ODT_CTRL, 0);
++
++	const enum raminit_status status = reut_issue_zq(ctrl, ctrl->chanmap, ZQ_LONG);
++	if (status) {
++		/* ZQCL errors don't seem to be a fatal problem here */
++		printk(BIOS_ERR, "ZQ Long failed during S3 resume or warm reset flow\n");
++	}
++	return RAMINIT_STATUS_SUCCESS;
++}
+diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
+index 3a65fb01fb..056dde1adc 100644
+--- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
++++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
+@@ -64,6 +64,22 @@ static const struct task_entry cold_boot[] = {
+ 	{ train_read_mpr,                                         true, "RDMPRT",     },
+ 	{ train_jedec_write_leveling,                             true, "JWRL",       },
+ 	{ activate_mc,                                            true, "ACTIVATE",   },
++	{ save_training_values,                                   true, "SAVE_TRAIN", },
++	{ save_non_training,                                      true, "SAVE_NONT",  },
++	{ raminit_done,                                           true, "RAMINITEND", },
++};
++
++static const struct task_entry fast_boot[] = {
++	{ collect_spd_info,                                       true, "PROCSPD",    },
++	{ restore_non_training,                                   true, "RST_NONT",   },
++	{ initialise_mpll,                                        true, "INITMPLL",   },
++	{ configure_mc,                                           true, "CONFMC",     },
++	{ configure_memory_map,                                   true, "MEMMAP",     },
++	{ do_jedec_init,                                          true, "JEDECINIT",  },
++	{ pre_training,                                           true, "PRETRAIN",   },
++	{ restore_training_values,                                true, "RST_TRAIN",  },
++	{ exit_selfrefresh,                                       true, "EXIT_SR",    },
++	{ normal_state,                                           true, "NORMALMODE", },
+ 	{ raminit_done,                                           true, "RAMINITEND", },
+ };
+ 
+@@ -102,11 +118,11 @@ static void initialize_ctrl(struct sysinfo *ctrl)
+ 	ctrl->bootmode = bootmode;
+ }
+ 
+-static enum raminit_status try_raminit(struct sysinfo *ctrl)
++static enum raminit_status try_raminit(
++	struct sysinfo *ctrl,
++	const struct task_entry *const schedule,
++	const size_t length)
+ {
+-	const struct task_entry *const schedule = cold_boot;
+-	const size_t length = ARRAY_SIZE(cold_boot);
+-
+ 	enum raminit_status status = RAMINIT_STATUS_UNSPECIFIED_ERROR;
+ 
+ 	for (size_t i = 0; i < length; i++) {
+@@ -140,8 +156,16 @@ void raminit_main(const enum raminit_boot_mode bootmode)
+ 	mighty_ctrl.bootmode = bootmode;
+ 	initialize_ctrl(&mighty_ctrl);
+ 
++	enum raminit_status status = RAMINIT_STATUS_UNSPECIFIED_ERROR;
++
++	if (bootmode != BOOTMODE_COLD) {
++		status = try_raminit(&mighty_ctrl, fast_boot, ARRAY_SIZE(fast_boot));
++		if (status == RAMINIT_STATUS_SUCCESS)
++			return;
++	}
++
+ 	/** TODO: Try more than once **/
+-	enum raminit_status status = try_raminit(&mighty_ctrl);
++	status = try_raminit(&mighty_ctrl, cold_boot, ARRAY_SIZE(cold_boot));
+ 
+ 	if (status != RAMINIT_STATUS_SUCCESS)
+ 		die("Memory initialization was met with utmost failure and misery\n");
+diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
+index 5f7ceec222..3ad8ce29e7 100644
+--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c
++++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
+@@ -54,23 +54,17 @@ static bool early_init_native(enum raminit_boot_mode bootmode)
+ 	return cpu_replaced;
+ }
+ 
+-#define MRC_CACHE_VERSION 1
+-
+-struct mrc_data {
+-	const void *buffer;
+-	size_t buffer_len;
+-};
+-
+-static void save_mrc_data(struct mrc_data *md)
++static void save_mrc_data(void)
+ {
+-	mrc_cache_stash_data(MRC_TRAINING_DATA, MRC_CACHE_VERSION, md->buffer, md->buffer_len);
++	mrc_cache_stash_data(MRC_TRAINING_DATA, reg_frame_rev(),
++			     reg_frame_ptr(), reg_frame_size());
+ }
+ 
+ static struct mrc_data prepare_mrc_cache(void)
+ {
+ 	struct mrc_data md = {0};
+ 	md.buffer = mrc_cache_current_mmap_leak(MRC_TRAINING_DATA,
+-						MRC_CACHE_VERSION,
++						reg_frame_rev(),
+ 						&md.buffer_len);
+ 	return md;
+ }
+@@ -94,14 +88,15 @@ static void raminit_reset(void)
+ }
+ 
+ static enum raminit_boot_mode do_actual_raminit(
+-	struct mrc_data *md,
+ 	const bool s3resume,
+ 	const bool cpu_replaced,
+ 	const enum raminit_boot_mode orig_bootmode)
+ {
++	struct mrc_data md = prepare_mrc_cache();
++
+ 	enum raminit_boot_mode bootmode = orig_bootmode;
+ 
+-	bool save_data_valid = md->buffer && md->buffer_len == USHRT_MAX; /** TODO: sizeof() **/
++	bool save_data_valid = md.buffer && md.buffer_len == reg_frame_size();
+ 
+ 	if (s3resume) {
+ 		if (bootmode == BOOTMODE_COLD) {
+@@ -154,7 +149,7 @@ static enum raminit_boot_mode do_actual_raminit(
+ 	assert(save_data_valid != (bootmode == BOOTMODE_COLD));
+ 	if (save_data_valid) {
+ 		printk(BIOS_INFO, "Using cached memory parameters\n");
+-		die("RAMINIT: Fast boot is not yet implemented\n");
++		memcpy(reg_frame_ptr(), md.buffer, reg_frame_size());
+ 	}
+ 	printk(RAM_DEBUG, "Initial bootmode: %s\n", bm_names[orig_bootmode]);
+ 	printk(RAM_DEBUG, "Current bootmode: %s\n", bm_names[bootmode]);
+@@ -181,10 +176,8 @@ void perform_raminit(const int s3resume)
+ 	wait_txt_clear();
+ 	wrmsr(0x2e6, (msr_t) {.lo = 0, .hi = 0});
+ 
+-	struct mrc_data md = prepare_mrc_cache();
+-
+ 	const enum raminit_boot_mode bootmode =
+-			do_actual_raminit(&md, s3resume, cpu_replaced, orig_bootmode);
++			do_actual_raminit(s3resume, cpu_replaced, orig_bootmode);
+ 
+ 	/** TODO: report_memory_config **/
+ 
+@@ -212,9 +205,8 @@ void perform_raminit(const int s3resume)
+ 	}
+ 
+ 	/* Save training data on non-S3 resumes */
+-	/** TODO: Enable this once training data is populated **/
+-	if (0 && !s3resume)
+-		save_mrc_data(&md);
++	if (!s3resume)
++		save_mrc_data();
+ 
+ 	/** TODO: setup_sdram_meminfo **/
+ }
+diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+index 9bab57b518..0750904aec 100644
+--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
++++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+@@ -169,6 +169,8 @@ enum regfile_mode {
+ 	REG_FILE_USE_CURRENT,	/* Used when changing parameters after the test */
+ };
+ 
++struct register_save_frame;
++
+ struct wdb_pat {
+ 	uint32_t start_ptr;	/* Starting pointer in WDB */
+ 	uint32_t stop_ptr;	/* Stopping pointer in WDB */
+@@ -219,6 +221,7 @@ enum raminit_status {
+ 	RAMINIT_STATUS_RCVEN_FAILURE,
+ 	RAMINIT_STATUS_RMPR_FAILURE,
+ 	RAMINIT_STATUS_JWRL_FAILURE,
++	RAMINIT_STATUS_INVALID_CACHE,
+ 	RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
+ };
+ 
+@@ -228,6 +231,11 @@ enum generic_stepping {
+ 	STEPPING_C0 = 3,
+ };
+ 
++struct mrc_data {
++	const void *buffer;
++	size_t buffer_len;
++};
++
+ struct raminit_dimm_info {
+ 	spd_raw_data raw_spd;
+ 	struct dimm_attr_ddr3_st data;
+@@ -447,12 +455,22 @@ enum raminit_status do_jedec_init(struct sysinfo *ctrl);
+ enum raminit_status train_receive_enable(struct sysinfo *ctrl);
+ enum raminit_status train_read_mpr(struct sysinfo *ctrl);
+ enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl);
++enum raminit_status save_training_values(struct sysinfo *ctrl);
++enum raminit_status restore_training_values(struct sysinfo *ctrl);
++enum raminit_status save_non_training(struct sysinfo *ctrl);
++enum raminit_status restore_non_training(struct sysinfo *ctrl);
++enum raminit_status exit_selfrefresh(struct sysinfo *ctrl);
++enum raminit_status normal_state(struct sysinfo *ctrl);
+ enum raminit_status activate_mc(struct sysinfo *ctrl);
+ enum raminit_status raminit_done(struct sysinfo *ctrl);
+ 
+ void configure_timings(struct sysinfo *ctrl);
+ void configure_refresh(struct sysinfo *ctrl);
+ 
++struct register_save_frame *reg_frame_ptr(void);
++size_t reg_frame_size(void);
++uint32_t reg_frame_rev(void);
++
+ uint32_t get_tCKE(uint32_t mem_clock_mhz, bool lpddr);
+ uint32_t get_tXPDLL(uint32_t mem_clock_mhz);
+ uint32_t get_tAONPD(uint32_t mem_clock_mhz);
+diff --git a/src/northbridge/intel/haswell/native_raminit/save_restore.c b/src/northbridge/intel/haswell/native_raminit/save_restore.c
+new file mode 100644
+index 0000000000..f1f50e3ff8
+--- /dev/null
++++ b/src/northbridge/intel/haswell/native_raminit/save_restore.c
+@@ -0,0 +1,387 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <assert.h>
++#include <console/console.h>
++#include <northbridge/intel/haswell/haswell.h>
++#include <types.h>
++
++#include "raminit_native.h"
++
++uint32_t reg_frame_rev(void)
++{
++	/*
++	 * Equivalent to MRC_CACHE_REVISION, but hidden via abstraction.
++	 * The structures that get saved to flash are contained within
++	 * this translation unit, so changes outside this file shouldn't
++	 * require invalidating the cache.
++	 */
++	return 1;
++}
++
++struct register_save {
++	uint16_t lower;
++	uint16_t upper;
++};
++
++/** TODO: Haswell DDRIO aliases writes: 0x80 .. 0xff => 0x00 .. 0x7f **/
++static const struct register_save ddrio_per_byte_list[] = {
++	{0x0000, 0x003c}, /* 16 registers */
++//	{0x0048, 0x0084}, /* 16 registers */	/** TODO: BDW support **/
++	{0x0048, 0x004c}, /*  2 registers */
++	{0x005c, 0x0078}, /*  8 registers */
++};
++#define DDRIO_PER_BYTE_REGISTER_COUNT	(16 + 2 + 8)
++
++static const struct register_save ddrio_per_ch_list[] = {
++	/* CKE */
++	{0x1204, 0x1208}, /* 2 registers */
++	{0x1214, 0x121c}, /* 3 registers */
++	/* CMD North */
++	{0x1404, 0x140c}, /* 3 registers */
++	/* CLK */
++	{0x1808, 0x1810}, /* 3 registers */
++	/* CMD South */
++	{0x1a04, 0x1a0c}, /* 3 registers */
++	/* CTL */
++	{0x1c14, 0x1c1c}, /* 3 registers */
++};
++#define DDRIO_PER_CH_REGISTER_COUNT	(2 + 3 * 5)
++
++static const struct register_save ddrio_common_list[] = {
++	{0x2000, 0x2008}, /* 3 registers */
++	{0x3a14, 0x3a1c}, /* 3 registers */
++	{0x3a24, 0x3a24}, /* 1 registers */
++};
++
++#define DDRIO_COMMON_REGISTER_COUNT	(3 + 3 + 1)
++
++static const struct register_save mcmain_per_ch_list[] = {
++	{0x4000, 0x4014}, /* 6 registers */
++	{0x4024, 0x4028}, /* 2 registers */
++	{0x40d0, 0x40d0}, /* 1 registers */
++	{0x4220, 0x4224}, /* 2 registers */
++	{0x4294, 0x4294}, /* 1 registers */
++	{0x429c, 0x42a0}, /* 2 registers */
++	{0x42ec, 0x42fc}, /* 5 registers */
++	{0x4328, 0x4328}, /* 1 registers */
++	{0x438c, 0x4390}, /* 2 registers */
++};
++#define MCMAIN_PER_CH_REGISTER_COUNT	(6 + 2 + 1 + 2 + 1 + 2 + 5 + 1 + 2)
++
++static const struct register_save misc_common_list[] = {
++	{0x5884, 0x5888}, /*  2 registers */
++	{0x5890, 0x589c}, /*  4 registers */
++	{0x58a4, 0x58a4}, /*  1 registers */
++	{0x58d0, 0x58e4}, /*  6 registers */
++	{0x5880, 0x5880}, /*  1 registers */
++	{0x5000, 0x50dc}, /* 56 registers */
++	{0x59b8, 0x59b8}  /*  1 registers */
++};
++#define MISC_COMMON_REGISTER_COUNT	(2 + 4 + 1 + 6 + 1 + 56 + 1)
++
++struct save_params {
++	bool is_initialised;
++
++	/* Memory base frequency, either 100 or 133 MHz */
++	uint8_t base_freq;
++
++	/* Multiplier */
++	uint32_t multiplier;
++
++	/* Memory clock in MHz */
++	uint32_t mem_clock_mhz;
++
++	/* Memory clock in femtoseconds */
++	uint32_t mem_clock_fs;
++
++	/* Quadrature clock in picoseconds */
++	uint16_t qclkps;
++
++	/* Bitfield of supported CAS latencies */
++	uint16_t cas_supported;
++
++	/* CPUID value */
++	uint32_t cpu;
++
++	/* Cached CPU stepping value */
++	uint8_t stepping;
++
++	uint16_t vdd_mv;
++
++	union dimm_flags_ddr3_st flags;
++
++	/* Except for tCK, everything is stored in DCLKs */
++	uint32_t tCK;
++	uint32_t tAA;
++	uint32_t tWR;
++	uint32_t tRCD;
++	uint32_t tRRD;
++	uint32_t tRP;
++	uint32_t tRAS;
++	uint32_t tRC;
++	uint32_t tRFC;
++	uint32_t tWTR;
++	uint32_t tRTP;
++	uint32_t tFAW;
++	uint32_t tCWL;
++	uint32_t tCMD;
++
++	uint32_t tREFI;
++	uint32_t tXP;
++
++	uint8_t lpddr_cke_rank_map[NUM_CHANNELS];
++
++	struct raminit_dimm_info dimms[NUM_CHANNELS][NUM_SLOTS];
++
++	uint8_t chanmap;
++
++	uint32_t channel_size_mb[NUM_CHANNELS];
++
++	/* DIMMs per channel */
++	uint8_t dpc[NUM_CHANNELS];
++
++	uint8_t rankmap[NUM_CHANNELS];
++
++	/* Whether a rank is mirrored or not (only rank 1 of each DIMM can be) */
++	uint8_t rank_mirrored[NUM_CHANNELS];
++
++	/*
++	 * FIXME: LPDDR support is incomplete. The largest chunks are missing,
++	 * but some LPDDR-specific variations in algorithms have been handled.
++	 * LPDDR-specific functions have stubs which will halt upon execution.
++	 */
++	bool lpddr;
++
++	uint8_t lanes;
++
++	/* FIXME: ECC support missing */
++	bool is_ecc;
++};
++
++struct register_save_frame {
++	uint32_t ddrio_per_byte[NUM_CHANNELS][NUM_LANES][DDRIO_PER_BYTE_REGISTER_COUNT];
++	uint32_t ddrio_per_ch[NUM_CHANNELS][DDRIO_PER_CH_REGISTER_COUNT];
++	uint32_t ddrio_common[DDRIO_COMMON_REGISTER_COUNT];
++	uint32_t mcmain_per_ch[NUM_CHANNELS][MCMAIN_PER_CH_REGISTER_COUNT];
++	uint32_t misc_common[MISC_COMMON_REGISTER_COUNT];
++	struct save_params params;
++};
++
++struct register_save_frame *reg_frame_ptr(void)
++{
++	/* The chonky register save frame struct, used for fast boot and S3 resume */
++	static struct register_save_frame register_frame = { 0 };
++	return &register_frame;
++}
++
++size_t reg_frame_size(void)
++{
++	return sizeof(struct register_save_frame);
++}
++
++typedef void (*reg_func_t)(const uint16_t offset, uint32_t *const value);
++
++static void save_value(const uint16_t offset, uint32_t *const value)
++{
++	*value = mchbar_read32(offset);
++}
++
++static void restore_value(const uint16_t offset, uint32_t *const value)
++{
++	mchbar_write32(offset, *value);
++}
++
++static void save_restore(
++	uint32_t *reg_frame,
++	const uint16_t g_offset,
++	const struct register_save *reg_save_list,
++	const size_t reg_save_length,
++	reg_func_t handle_reg)
++{
++	for (size_t i = 0; i < reg_save_length; i++) {
++		const struct register_save *entry = &reg_save_list[i];
++		for (uint16_t offset = entry->lower; offset <= entry->upper; offset += 4) {
++			handle_reg(offset + g_offset, reg_frame++);
++		}
++	}
++}
++
++static void save_restore_all(struct register_save_frame *reg_frame, reg_func_t handle_reg)
++{
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		for (uint8_t byte = 0; byte < NUM_LANES; byte++) {
++			const uint16_t g_offset = _DDRIO_C_R_B(0, channel, 0, byte);
++			save_restore(
++				reg_frame->ddrio_per_byte[channel][byte],
++				g_offset,
++				ddrio_per_byte_list,
++				ARRAY_SIZE(ddrio_per_byte_list),
++				handle_reg);
++		}
++	}
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		const uint16_t g_offset = _DDRIO_C_R_B(0, channel, 0, 0);
++		save_restore(
++			reg_frame->ddrio_per_ch[channel],
++			g_offset,
++			ddrio_per_ch_list,
++			ARRAY_SIZE(ddrio_per_ch_list),
++			handle_reg);
++	}
++	save_restore(
++		reg_frame->ddrio_common,
++		0,
++		ddrio_common_list,
++		ARRAY_SIZE(ddrio_common_list),
++		handle_reg);
++
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		const uint16_t g_offset = _MCMAIN_C(0, channel);
++		save_restore(
++			reg_frame->mcmain_per_ch[channel],
++			g_offset,
++			mcmain_per_ch_list,
++			ARRAY_SIZE(mcmain_per_ch_list),
++			handle_reg);
++	}
++	save_restore(
++		reg_frame->misc_common,
++		0,
++		misc_common_list,
++		ARRAY_SIZE(misc_common_list),
++		handle_reg);
++}
++
++enum raminit_status save_training_values(struct sysinfo *ctrl)
++{
++	save_restore_all(reg_frame_ptr(), save_value);
++	return RAMINIT_STATUS_SUCCESS;
++}
++
++enum raminit_status restore_training_values(struct sysinfo *ctrl)
++{
++	save_restore_all(reg_frame_ptr(), restore_value);
++	return RAMINIT_STATUS_SUCCESS;
++}
++
++enum raminit_status save_non_training(struct sysinfo *ctrl)
++{
++	struct register_save_frame *reg_frame = reg_frame_ptr();
++	struct save_params *params = &reg_frame->params;
++
++	params->is_initialised = true;
++
++	params->base_freq     = ctrl->base_freq;
++	params->multiplier    = ctrl->multiplier;
++	params->mem_clock_mhz = ctrl->mem_clock_mhz;
++	params->mem_clock_fs  = ctrl->mem_clock_fs;
++	params->qclkps        = ctrl->qclkps;
++	params->cas_supported = ctrl->cas_supported;
++	params->cpu           = ctrl->cpu;
++	params->stepping      = ctrl->stepping;
++	params->vdd_mv        = ctrl->vdd_mv;
++	params->flags         = ctrl->flags;
++
++	params->tCK       = ctrl->tCK;
++	params->tAA       = ctrl->tAA;
++	params->tWR       = ctrl->tWR;
++	params->tRCD      = ctrl->tRCD;
++	params->tRRD      = ctrl->tRRD;
++	params->tRP       = ctrl->tRP;
++	params->tRAS      = ctrl->tRAS;
++	params->tRC       = ctrl->tRC;
++	params->tRFC      = ctrl->tRFC;
++	params->tWTR      = ctrl->tWTR;
++	params->tRTP      = ctrl->tRTP;
++	params->tFAW      = ctrl->tFAW;
++	params->tCWL      = ctrl->tCWL;
++	params->tCMD      = ctrl->tCMD;
++	params->tREFI     = ctrl->tREFI;
++	params->tXP       = ctrl->tXP;
++
++	params->chanmap = ctrl->chanmap;
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		params->lpddr_cke_rank_map[channel] = ctrl->lpddr_cke_rank_map[channel];
++		for (uint8_t slot = 0; slot < NUM_SLOTS; slot++)
++			params->dimms[channel][slot] = ctrl->dimms[channel][slot];
++	}
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		params->dpc[channel] = ctrl->dpc[channel];
++		params->rankmap[channel] = ctrl->rankmap[channel];
++		params->rank_mirrored[channel] = ctrl->rank_mirrored[channel];
++		params->channel_size_mb[channel] = ctrl->channel_size_mb[channel];
++	}
++	params->lpddr = ctrl->lpddr;
++	params->lanes = ctrl->lanes;
++	params->is_ecc = ctrl->is_ecc;
++	return RAMINIT_STATUS_SUCCESS;
++}
++
++#define RAMINIT_COMPARE(_s1, _s2) \
++	((sizeof(_s1) == sizeof(_s2)) && !memcmp(_s1, _s2, sizeof(_s1)))
++
++enum raminit_status restore_non_training(struct sysinfo *ctrl)
++{
++	struct register_save_frame *reg_frame = reg_frame_ptr();
++	struct save_params *params = &reg_frame->params;
++
++	if (!params->is_initialised) {
++		printk(BIOS_WARNING, "Cannot fast boot: saved data is invalid\n");
++		return RAMINIT_STATUS_INVALID_CACHE;
++	}
++
++	if (!RAMINIT_COMPARE(ctrl->dimms, params->dimms)) {
++		printk(BIOS_WARNING, "Cannot fast boot: DIMMs have changed\n");
++		return RAMINIT_STATUS_INVALID_CACHE;
++	}
++
++	if (ctrl->cpu != params->cpu) {
++		printk(BIOS_WARNING, "Cannot fast boot: CPU has changed\n");
++		return RAMINIT_STATUS_INVALID_CACHE;
++	}
++
++	ctrl->base_freq     = params->base_freq;
++	ctrl->multiplier    = params->multiplier;
++	ctrl->mem_clock_mhz = params->mem_clock_mhz;
++	ctrl->mem_clock_fs  = params->mem_clock_fs;
++	ctrl->qclkps        = params->qclkps;
++	ctrl->cas_supported = params->cas_supported;
++	ctrl->cpu           = params->cpu;
++	ctrl->stepping      = params->stepping;
++	ctrl->vdd_mv        = params->vdd_mv;
++	ctrl->flags         = params->flags;
++
++	ctrl->tCK       = params->tCK;
++	ctrl->tAA       = params->tAA;
++	ctrl->tWR       = params->tWR;
++	ctrl->tRCD      = params->tRCD;
++	ctrl->tRRD      = params->tRRD;
++	ctrl->tRP       = params->tRP;
++	ctrl->tRAS      = params->tRAS;
++	ctrl->tRC       = params->tRC;
++	ctrl->tRFC      = params->tRFC;
++	ctrl->tWTR      = params->tWTR;
++	ctrl->tRTP      = params->tRTP;
++	ctrl->tFAW      = params->tFAW;
++	ctrl->tCWL      = params->tCWL;
++	ctrl->tCMD      = params->tCMD;
++	ctrl->tREFI     = params->tREFI;
++	ctrl->tXP       = params->tXP;
++
++	ctrl->chanmap = params->chanmap;
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		ctrl->lpddr_cke_rank_map[channel] = params->lpddr_cke_rank_map[channel];
++		for (uint8_t slot = 0; slot < NUM_SLOTS; slot++)
++			ctrl->dimms[channel][slot] = params->dimms[channel][slot];
++	}
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		ctrl->dpc[channel] = params->dpc[channel];
++		ctrl->rankmap[channel] = params->rankmap[channel];
++		ctrl->rank_mirrored[channel] = params->rank_mirrored[channel];
++		ctrl->channel_size_mb[channel] = params->channel_size_mb[channel];
++	}
++	ctrl->lpddr = params->lpddr;
++	ctrl->lanes = params->lanes;
++	ctrl->is_ecc = params->is_ecc;
++	return RAMINIT_STATUS_SUCCESS;
++}
+-- 
+2.39.2
+
diff --git a/config/coreboot/haswell/patches/0017-haswell-NRI-Do-sense-amplifier-offset-training.patch b/config/coreboot/haswell/patches/0017-haswell-NRI-Do-sense-amplifier-offset-training.patch
new file mode 100644
index 00000000..846fe9a3
--- /dev/null
+++ b/config/coreboot/haswell/patches/0017-haswell-NRI-Do-sense-amplifier-offset-training.patch
@@ -0,0 +1,476 @@
+From be58501141aa97aa544b670e566cd6cf6797c18e Mon Sep 17 00:00:00 2001
+From: Angel Pons <th3fanbus@gmail.com>
+Date: Wed, 17 Apr 2024 13:20:32 +0200
+Subject: [PATCH 17/20] haswell NRI: Do sense amplifier offset training
+
+Quoting Wikipedia:
+
+  A sense amplifier is a circuit that is used to amplify and detect
+  small signals in electronic systems. It is commonly used in memory
+  circuits, such as dynamic random access memory (DRAM), to read and
+  amplify the weak signals stored in memory cells.
+
+In this case, we're calibrating the sense amplifiers in the memory
+controller. This training procedure uses a magic "sense amp offset
+cancel" mode of the DDRIO to observe the sampled logic levels, and
+sweeps Vref to find the low-high transition for each bit lane. The
+procedure consists of two stages: the first stage centers per-byte
+Vref (to ensure per-bit Vref offsets are as small as possible) and
+the second stage centers per-bit Vref.
+
+Because this procedure uses the "sense amp offset cancel" mode, it
+does not rely on DRAM being trained. It is assumed that the memory
+controller simply makes sense amp output levels observable via the
+`DDR_DATA_TRAIN_FEEDBACK` register and that the memory bus is idle
+during this training step (so the lane voltage is Vdd / 2).
+
+Note: This procedure will need to be adapted for Broadwell because
+it has per-rank per-bit RxVref registers, whereas Haswell only has
+a single per-bit RxVref register for all ranks.
+
+Change-Id: Ia07db68763f90e9701c8a376e01279ada8dbbe07
+Signed-off-by: Angel Pons <th3fanbus@gmail.com>
+---
+ .../intel/haswell/native_raminit/Makefile.mk  |   1 +
+ .../haswell/native_raminit/raminit_main.c     |   1 +
+ .../haswell/native_raminit/raminit_native.h   |  12 +
+ .../native_raminit/train_sense_amp_offset.c   | 341 ++++++++++++++++++
+ .../intel/haswell/registers/mchbar.h          |   2 +
+ 5 files changed, 357 insertions(+)
+ create mode 100644 src/northbridge/intel/haswell/native_raminit/train_sense_amp_offset.c
+
+diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
+index 8fdd17c542..4bd668a2d6 100644
+--- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
++++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
+@@ -21,3 +21,4 @@ romstage-y += timings_refresh.c
+ romstage-y += train_jedec_write_leveling.c
+ romstage-y += train_read_mpr.c
+ romstage-y += train_receive_enable.c
++romstage-y += train_sense_amp_offset.c
+diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
+index 056dde1adc..ce637e2d03 100644
+--- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
++++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
+@@ -60,6 +60,7 @@ static const struct task_entry cold_boot[] = {
+ 	{ configure_memory_map,                                   true, "MEMMAP",     },
+ 	{ do_jedec_init,                                          true, "JEDECINIT",  },
+ 	{ pre_training,                                           true, "PRETRAIN",   },
++	{ train_sense_amp_offset,                                 true, "SOT",        },
+ 	{ train_receive_enable,                                   true, "RCVET",      },
+ 	{ train_read_mpr,                                         true, "RDMPRT",     },
+ 	{ train_jedec_write_leveling,                             true, "JWRL",       },
+diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+index 0750904aec..95ccd0a8b3 100644
+--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
++++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+@@ -22,6 +22,8 @@
+ #define NUM_LANES		9
+ #define NUM_LANES_NO_ECC	8
+ 
++#define NUM_BITS		8
++
+ #define COMP_INT		10
+ 
+ /* Always use 12 legs for emphasis (not trained) */
+@@ -218,6 +220,7 @@ enum raminit_status {
+ 	RAMINIT_STATUS_MPLL_INIT_FAILURE,
+ 	RAMINIT_STATUS_POLL_TIMEOUT,
+ 	RAMINIT_STATUS_REUT_ERROR,
++	RAMINIT_STATUS_SAMP_OFFSET_FAILURE,
+ 	RAMINIT_STATUS_RCVEN_FAILURE,
+ 	RAMINIT_STATUS_RMPR_FAILURE,
+ 	RAMINIT_STATUS_JWRL_FAILURE,
+@@ -243,6 +246,12 @@ struct raminit_dimm_info {
+ 	bool valid;
+ };
+ 
++struct vref_margin {
++	uint8_t low;
++	uint8_t center;
++	uint8_t high;
++};
++
+ struct sysinfo {
+ 	enum raminit_boot_mode bootmode;
+ 	enum generic_stepping stepping;
+@@ -330,6 +339,8 @@ struct sysinfo {
+ 	uint8_t rxdqsn[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES];
+ 	int8_t  rxvref[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES];
+ 
++	struct vref_margin rxdqvrefpb[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES][NUM_BITS];
++
+ 	uint8_t clk_pi_code[NUM_CHANNELS][NUM_SLOTRANKS];
+ 	uint8_t ctl_pi_code[NUM_CHANNELS][NUM_SLOTRANKS];
+ 	uint8_t cke_pi_code[NUM_CHANNELS][NUM_SLOTRANKS];
+@@ -452,6 +463,7 @@ enum raminit_status convert_timings(struct sysinfo *ctrl);
+ enum raminit_status configure_mc(struct sysinfo *ctrl);
+ enum raminit_status configure_memory_map(struct sysinfo *ctrl);
+ enum raminit_status do_jedec_init(struct sysinfo *ctrl);
++enum raminit_status train_sense_amp_offset(struct sysinfo *ctrl);
+ enum raminit_status train_receive_enable(struct sysinfo *ctrl);
+ enum raminit_status train_read_mpr(struct sysinfo *ctrl);
+ enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl);
+diff --git a/src/northbridge/intel/haswell/native_raminit/train_sense_amp_offset.c b/src/northbridge/intel/haswell/native_raminit/train_sense_amp_offset.c
+new file mode 100644
+index 0000000000..d4f199fefb
+--- /dev/null
++++ b/src/northbridge/intel/haswell/native_raminit/train_sense_amp_offset.c
+@@ -0,0 +1,341 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <assert.h>
++#include <commonlib/bsd/clamp.h>
++#include <console/console.h>
++#include <delay.h>
++#include <lib.h>
++#include <types.h>
++
++#include "raminit_native.h"
++
++#define VREF_OFFSET_PLOT	RAM_DEBUG
++#define SAMP_OFFSET_PLOT	RAM_DEBUG
++
++struct vref_train_data {
++	int8_t best_sum;
++	int8_t best_vref;
++	int8_t sum_bits;
++	uint8_t high_mask;
++	uint8_t low_mask;
++};
++
++static enum raminit_status train_vref_offset(struct sysinfo *ctrl)
++{
++	const int8_t vref_start = -15;
++	const int8_t vref_stop  = 15;
++	const struct vref_train_data initial_vref_values = {
++		.best_sum  = -NUM_LANES,
++		.best_vref = 0,
++		.high_mask = 0,
++		.low_mask  = 0xff,
++	};
++	struct vref_train_data vref_data[NUM_CHANNELS][NUM_LANES];
++
++	printk(VREF_OFFSET_PLOT, "Plot of sum_bits across Vref settings\nChannel");
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		if (!does_ch_exist(ctrl, channel))
++			continue;
++
++		printk(VREF_OFFSET_PLOT, "\t%u\t\t", channel);
++	}
++
++	printk(VREF_OFFSET_PLOT, "\nByte");
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		if (!does_ch_exist(ctrl, channel))
++			continue;
++
++		printk(VREF_OFFSET_PLOT, "\t");
++		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
++			printk(VREF_OFFSET_PLOT, "%u ", byte);
++			vref_data[channel][byte] = initial_vref_values;
++			union ddr_data_control_2_reg data_control_2 = {
++				.raw = ctrl->dq_control_2[channel][byte],
++			};
++			data_control_2.force_bias_on = 1;
++			data_control_2.force_rx_on   = 1;
++			mchbar_write32(DQ_CONTROL_2(channel, byte), data_control_2.raw);
++		}
++	}
++
++	/* Sweep through Vref settings and find point SampOffset of +/- 7 passes */
++	printk(VREF_OFFSET_PLOT, "\n1/2 Vref");
++	for (int8_t vref = vref_start; vref <= vref_stop; vref++) {
++		printk(VREF_OFFSET_PLOT, "\n% 3d", vref);
++
++		/*
++		 * To perform this test, enable offset cancel mode and enable ODT.
++		 * Check results and update variables. Ideal result is all zeroes.
++		 * Clear offset cancel mode at end of test to write RX_OFFSET_VDQ.
++		 */
++		change_1d_margin_multicast(ctrl, RdV, vref, 0, false, REG_FILE_USE_RANK);
++
++		/* Program settings for Vref and SampOffset = 7 (8 + 7) */
++		mchbar_write32(DDR_DATA_RX_OFFSET_VDQ, 0xffffffff);
++		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++			if (!does_ch_exist(ctrl, channel))
++				continue;
++
++			/* Propagate delay values (without a read command) */
++			union ddr_data_control_0_reg data_control_0 = {
++				.raw = ctrl->dq_control_0[channel],
++			};
++			data_control_0.read_rf_rd      = 1;
++			data_control_0.read_rf_wr      = 0;
++			data_control_0.read_rf_rank    = 0;
++			data_control_0.force_odt_on    = 1;
++			data_control_0.samp_train_mode = 1;
++			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
++			udelay(1);
++			data_control_0.samp_train_mode = 0;
++			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
++			for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
++				const uint8_t feedback = get_data_train_feedback(channel, byte);
++				struct vref_train_data *curr_data = &vref_data[channel][byte];
++				curr_data->low_mask &= feedback;
++				curr_data->sum_bits = -popcnt(feedback);
++			}
++		}
++
++		/* Program settings for Vref and SampOffset = -7 (8 - 7) */
++		mchbar_write32(DDR_DATA_RX_OFFSET_VDQ, 0x11111111);
++		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++			if (!does_ch_exist(ctrl, channel))
++				continue;
++
++			/* Propagate delay values (without a read command) */
++			union ddr_data_control_0_reg data_control_0 = {
++				.raw = ctrl->dq_control_0[channel],
++			};
++			data_control_0.read_rf_rd      = 1;
++			data_control_0.read_rf_wr      = 0;
++			data_control_0.read_rf_rank    = 0;
++			data_control_0.force_odt_on    = 1;
++			data_control_0.samp_train_mode = 1;
++			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
++			udelay(1);
++			data_control_0.samp_train_mode = 0;
++			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
++			printk(VREF_OFFSET_PLOT, "\t");
++			for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
++				const uint8_t feedback = get_data_train_feedback(channel, byte);
++				struct vref_train_data *curr_data = &vref_data[channel][byte];
++				curr_data->high_mask |= feedback;
++				curr_data->sum_bits += popcnt(feedback);
++				printk(VREF_OFFSET_PLOT, "%d ", curr_data->sum_bits);
++				if (curr_data->sum_bits > curr_data->best_sum) {
++					curr_data->best_sum  = curr_data->sum_bits;
++					curr_data->best_vref = vref;
++					ctrl->rxvref[channel][0][byte] = vref;
++				} else if (curr_data->sum_bits == curr_data->best_sum) {
++					curr_data->best_vref = vref;
++				}
++			}
++		}
++	}
++	printk(BIOS_DEBUG, "\n\nHi-Lo (XOR):");
++	enum raminit_status status = RAMINIT_STATUS_SUCCESS;
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		if (!does_ch_exist(ctrl, channel))
++			continue;
++
++		printk(BIOS_DEBUG, "\n  C%u:", channel);
++		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
++			struct vref_train_data *const curr_data = &vref_data[channel][byte];
++			const uint8_t bit_xor = curr_data->high_mask ^ curr_data->low_mask;
++			printk(BIOS_DEBUG, "\t0x%02x", bit_xor);
++			if (bit_xor == 0xff)
++				continue;
++
++			/* Report an error if any bit did not change */
++			status = RAMINIT_STATUS_SAMP_OFFSET_FAILURE;
++		}
++	}
++	if (status)
++		printk(BIOS_ERR, "\nUnexpected bit error in Vref offset training\n");
++
++	printk(BIOS_DEBUG, "\n\nRdVref:");
++	change_1d_margin_multicast(ctrl, RdV, 0, 0, false, REG_FILE_USE_RANK);
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		if (!does_ch_exist(ctrl, channel))
++			continue;
++
++		printk(BIOS_DEBUG, "\n  C%u:", channel);
++		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
++			struct vref_train_data *const curr_data = &vref_data[channel][byte];
++			const int8_t vref_width =
++				curr_data->best_vref - ctrl->rxvref[channel][0][byte];
++
++			/*
++			 * Step size for Rx Vref in DATA_OFFSET_TRAIN is about 3.9 mV
++			 * whereas Rx Vref step size in RX_TRAIN_RANK is about 7.8 mV
++			 */
++			int8_t vref = ctrl->rxvref[channel][0][byte] + vref_width / 2;
++			if (vref < 0)
++				vref--;
++			else
++				vref++;
++
++			for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
++				if (!rank_in_ch(ctrl, rank, channel))
++					continue;
++
++				ctrl->rxvref[channel][rank][byte] = vref / 2;
++				update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0);
++			}
++			printk(BIOS_DEBUG, "\t% 4d", ctrl->rxvref[channel][0][byte]);
++		}
++	}
++	printk(BIOS_DEBUG, "\n\n");
++	return status;
++}
++
++/**
++ * LPDDR has an additional bit for DQS per each byte.
++ *
++ * TODO: The DQS value must be written into Data Control 2.
++ */
++#define NUM_OFFSET_TRAIN_BITS	(NUM_BITS + 1)
++
++#define PLOT_CH_SPACE		"  "
++
++struct samp_train_data {
++	uint8_t first_zero;
++	uint8_t last_one;
++};
++
++static void train_samp_offset(struct sysinfo *ctrl)
++{
++	const uint8_t max_train_bits = ctrl->lpddr ? NUM_OFFSET_TRAIN_BITS : NUM_BITS;
++
++	struct samp_train_data samp_data[NUM_CHANNELS][NUM_LANES][NUM_OFFSET_TRAIN_BITS] = {0};
++
++	printk(BIOS_DEBUG, "Channel ");
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		if (!does_ch_exist(ctrl, channel))
++			continue;
++
++		printk(BIOS_DEBUG, "%u ", channel); /* Same length as PLOT_CH_SPACE */
++		for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
++			printk(BIOS_DEBUG, "        %s ", ctrl->lpddr ? " " : "");
++	}
++	printk(BIOS_DEBUG, "\nByte    ");
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		if (!does_ch_exist(ctrl, channel))
++			continue;
++
++		for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
++			printk(BIOS_DEBUG, "%u       %s ", byte, ctrl->lpddr ? " " : "");
++
++		printk(BIOS_DEBUG, PLOT_CH_SPACE);
++	}
++	printk(SAMP_OFFSET_PLOT, "\nBits    ");
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
++			printk(SAMP_OFFSET_PLOT, "01234567%s ", ctrl->lpddr ? "S" : "");
++
++		printk(SAMP_OFFSET_PLOT, PLOT_CH_SPACE);
++	}
++	printk(SAMP_OFFSET_PLOT, "\n SAmp\n");
++	for (uint8_t samp_offset = 1; samp_offset <= 15; samp_offset++) {
++		printk(SAMP_OFFSET_PLOT, "% 5d\t", samp_offset);
++
++		uint32_t rx_offset_vdq = 0;
++		for (uint8_t bit = 0; bit < NUM_BITS; bit++) {
++			rx_offset_vdq += samp_offset << (4 * bit);
++		}
++		mchbar_write32(DDR_DATA_RX_OFFSET_VDQ, rx_offset_vdq);
++		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++			if (!does_ch_exist(ctrl, channel))
++				continue;
++
++			/* Propagate delay values (without a read command) */
++			union ddr_data_control_0_reg data_control_0 = {
++				.raw = ctrl->dq_control_0[channel],
++			};
++			data_control_0.read_rf_rd      = 1;
++			data_control_0.read_rf_wr      = 0;
++			data_control_0.read_rf_rank    = 0;
++			data_control_0.force_odt_on    = 1;
++			data_control_0.samp_train_mode = 1;
++			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
++			udelay(1);
++			for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
++				const uint32_t feedback =
++					get_data_train_feedback(channel, byte);
++
++				for (uint8_t bit = 0; bit < max_train_bits; bit++) {
++					struct samp_train_data *const curr_data =
++							&samp_data[channel][byte][bit];
++					const bool result = feedback & BIT(bit);
++					if (result) {
++						curr_data->last_one = samp_offset;
++					} else if (curr_data->first_zero == 0) {
++						curr_data->first_zero = samp_offset;
++					}
++					printk(SAMP_OFFSET_PLOT, result ? "." : "#");
++				}
++				printk(SAMP_OFFSET_PLOT, " ");
++			}
++			printk(SAMP_OFFSET_PLOT, PLOT_CH_SPACE);
++			data_control_0.samp_train_mode = 0;
++			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
++		}
++		printk(SAMP_OFFSET_PLOT, "\n");
++	}
++	printk(BIOS_DEBUG, "\nBitSAmp ");
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		if (!does_ch_exist(ctrl, channel))
++			continue;
++
++		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
++			uint32_t rx_offset_vdq = 0;
++			for (uint8_t bit = 0; bit < max_train_bits; bit++) {
++				struct samp_train_data *const curr_data =
++						&samp_data[channel][byte][bit];
++
++				uint8_t vref = curr_data->first_zero + curr_data->last_one;
++				vref = clamp_u8(0, vref / 2, 15);
++				/*
++				 * Check for saturation conditions to make sure
++				 * we are as close as possible to Vdd/2 (750 mV).
++				 */
++				if (curr_data->first_zero == 0)
++					vref = 15;
++				if (curr_data->last_one == 0)
++					vref = 0;
++
++				ctrl->rxdqvrefpb[channel][0][byte][bit].center = vref;
++				rx_offset_vdq += vref & 0xf << (4 * bit);
++				printk(BIOS_DEBUG, "%x", vref);
++			}
++			mchbar_write32(RX_OFFSET_VDQ(channel, byte), rx_offset_vdq);
++			printk(BIOS_DEBUG, " ");
++			download_regfile(ctrl, channel, 1, 0, REG_FILE_USE_RANK, 0, 1, 0);
++		}
++		printk(BIOS_DEBUG, PLOT_CH_SPACE);
++	}
++	printk(BIOS_DEBUG, "\n");
++}
++
++enum raminit_status train_sense_amp_offset(struct sysinfo *ctrl)
++{
++	printk(BIOS_DEBUG, "Stage 1: Vref offset training\n");
++	const enum raminit_status status = train_vref_offset(ctrl);
++
++	printk(BIOS_DEBUG, "Stage 2: Samp offset training\n");
++	train_samp_offset(ctrl);
++
++	/* Clean up after test */
++	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
++		if (!does_ch_exist(ctrl, channel))
++			continue;
++
++		mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), ctrl->dq_control_0[channel]);
++		for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
++			mchbar_write32(DQ_CONTROL_2(channel, byte),
++				ctrl->dq_control_2[channel][byte]);
++	}
++	io_reset();
++	return status;
++}
+diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h
+index 49a215aa71..1a168a3fc8 100644
+--- a/src/northbridge/intel/haswell/registers/mchbar.h
++++ b/src/northbridge/intel/haswell/registers/mchbar.h
+@@ -18,6 +18,8 @@
+ #define RX_TRAIN_ch_r_b(ch, rank, byte)		_DDRIO_C_R_B(0x0000, ch, rank, byte)
+ #define TX_TRAIN_ch_r_b(ch, rank, byte)		_DDRIO_C_R_B(0x0020, ch, rank, byte)
+ 
++#define RX_OFFSET_VDQ(ch, byte)			_DDRIO_C_R_B(0x004c, ch, 0, byte)
++
+ #define DDR_DATA_TRAIN_FEEDBACK(ch, byte)	_DDRIO_C_R_B(0x0054, ch, 0, byte)
+ 
+ #define DQ_CONTROL_1(ch, byte)			_DDRIO_C_R_B(0x0060, ch, 0, byte)
+-- 
+2.39.2
+
diff --git a/config/coreboot/haswell/patches/0026-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/haswell/patches/0018-Remove-warning-for-coreboot-images-built-without-a-p.patch
similarity index 74%
rename from config/coreboot/haswell/patches/0026-Remove-warning-for-coreboot-images-built-without-a-p.patch
rename to config/coreboot/haswell/patches/0018-Remove-warning-for-coreboot-images-built-without-a-p.patch
index 547c6392..34309242 100644
--- a/config/coreboot/haswell/patches/0026-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ b/config/coreboot/haswell/patches/0018-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -1,26 +1,27 @@
-From 1ce4f118b024a6367382b46016781f30fe622e3e Mon Sep 17 00:00:00 2001
+From c25dcd8ac80598939edffd011df0fd9ba3d8a1a8 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH] Remove warning for coreboot images built without a payload
+Subject: [PATCH 18/20] Remove warning for coreboot images built without a
+ payload
 
 I added this in upstream to prevent people from accidentally flashing
 roms without a payload resulting in a no boot situation, but in
 libreboot lbmk handles the payload and thus this warning always comes
 up. This has caused confusion and concern so just patch it out.
 ---
- payloads/Makefile.inc | 13 +------------
+ payloads/Makefile.mk | 13 +------------
  1 file changed, 1 insertion(+), 12 deletions(-)
 
-diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc
-index e735443a76..4f1692a873 100644
---- a/payloads/Makefile.inc
-+++ b/payloads/Makefile.inc
+diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
+index a2336aa876..4f1692a873 100644
+--- a/payloads/Makefile.mk
++++ b/payloads/Makefile.mk
 @@ -49,16 +49,5 @@ distclean-payloads:
  print-repo-info-payloads:
  	-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
  
 -ifeq ($(CONFIG_PAYLOAD_NONE),y)
--files_added:: warn_no_payload
+-show_notices:: warn_no_payload
 -endif
 -
 -warn_no_payload:
@@ -34,5 +35,5 @@ index e735443a76..4f1692a873 100644
 -.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
 +.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
 -- 
-2.40.1
+2.39.2
 
diff --git a/config/coreboot/haswell/patches/0019-use-mirrorservice.org-for-gcc-downloads.patch b/config/coreboot/haswell/patches/0019-use-mirrorservice.org-for-gcc-downloads.patch
new file mode 100644
index 00000000..e197b3f3
--- /dev/null
+++ b/config/coreboot/haswell/patches/0019-use-mirrorservice.org-for-gcc-downloads.patch
@@ -0,0 +1,36 @@
+From 081890bab8d454247b6f7e9cb209f46159c45c8b Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 23:19:42 +0000
+Subject: [PATCH 19/20] use mirrorservice.org for gcc downloads
+
+the gnu.org 302 redirect often fails
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/crossgcc/buildgcc | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index 0a0462e2f6..6ae201239d 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -69,11 +69,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
+ # to the jenkins build as well, or the builder won't download it.
+ 
+ # GCC toolchain archive locations
+-GMP_BASE_URL="https://ftpmirror.gnu.org/gmp"
+-MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
+-MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
+-GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
+-BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
++GMP_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp"
++MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
++MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
++GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
++BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
+ IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
+ # CLANG toolchain archive locations
+ LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
+-- 
+2.39.2
+
diff --git a/config/coreboot/haswell/patches/0020-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/haswell/patches/0020-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
new file mode 100644
index 00000000..60490608
--- /dev/null
+++ b/config/coreboot/haswell/patches/0020-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -0,0 +1,204 @@
+From 1a4f454e05b613cb080cdd063dd3efb1fdbb748b Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 19 Feb 2023 18:21:43 +0000
+Subject: [PATCH 20/20] util/ifdtool: add --nuke flag (all 0xFF on region)
+
+When this option is used, the region's contents are overwritten
+with all ones (0xFF).
+
+Example:
+
+./ifdtool --nuke gbe coreboot.rom
+./ifdtool --nuke bios coreboot.com
+./ifdtool --nuke me coreboot.com
+
+Rebased since the last revision update in lbmk.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/ifdtool/ifdtool.c | 113 ++++++++++++++++++++++++++++++-----------
+ 1 file changed, 82 insertions(+), 31 deletions(-)
+
+diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
+index 516570e0a3..1638e1710e 100644
+--- a/util/ifdtool/ifdtool.c
++++ b/util/ifdtool/ifdtool.c
+@@ -2143,6 +2143,7 @@ static void print_usage(const char *name)
+ 	       "                                         tgl    - Tiger Lake\n"
+ 	       "                                         wbg    - Wellsburg\n"
+ 	       "   -S | --setpchstrap                    Write a PCH strap\n"
++	       "   -N | --nuke <region>                  Overwrite the specified region with 0xFF (all ones)\n"
+ 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
+ 	       "   -v | --version:                       print the version\n"
+ 	       "   -h | --help:                          print this help\n\n"
+@@ -2151,6 +2152,60 @@ static void print_usage(const char *name)
+ 	       "\n");
+ }
+ 
++static int
++get_region_type_string(const char *region_type_string)
++{
++       if (!strcasecmp("Descriptor", region_type_string))
++               return 0;
++       else if (!strcasecmp("BIOS", region_type_string))
++               return 1;
++       else if (!strcasecmp("ME", region_type_string))
++               return 2;
++       else if (!strcasecmp("GbE", region_type_string))
++               return 3;
++       else if (!strcasecmp("Platform Data", region_type_string))
++               return 4;
++       else if (!strcasecmp("Device Exp1", region_type_string))
++               return 5;
++       else if (!strcasecmp("Secondary BIOS", region_type_string))
++               return 6;
++       else if (!strcasecmp("Reserved", region_type_string))
++               return 7;
++       else if (!strcasecmp("EC", region_type_string))
++               return 8;
++       else if (!strcasecmp("Device Exp2", region_type_string))
++               return 9;
++       else if (!strcasecmp("IE", region_type_string))
++               return 10;
++       else if (!strcasecmp("10GbE_0", region_type_string))
++               return 11;
++       else if (!strcasecmp("10GbE_1", region_type_string))
++               return 12;
++       else if (!strcasecmp("PTT", region_type_string))
++               return 15;
++       return -1;
++}
++
++static void
++nuke(const char *filename, char *image, int size, int region_type)
++{
++       int i;
++       struct region region;
++       const struct frba *frba = find_frba(image, size);
++       if (!frba)
++               exit(EXIT_FAILURE);
++
++       region = get_region(frba, region_type);
++       if (region.size > 0) {
++               for (i = region.base; i <= region.limit; i++) {
++                       if ((i + 1) > (size))
++                               break;
++                       image[i] = 0xFF;
++               }
++               write_image(filename, image, size);
++       }
++}
++
+ int main(int argc, char *argv[])
+ {
+ 	int opt, option_index = 0;
+@@ -2158,6 +2213,7 @@ int main(int argc, char *argv[])
+ 	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
+ 	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
+ 	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
++	int mode_nuke = 0;
+ 	int mode_gpr0_disable = 0, mode_gpr0_enable = 0;
+ 	char *region_type_string = NULL, *region_fname = NULL;
+ 	const char *layout_fname = NULL;
+@@ -2192,6 +2248,7 @@ int main(int argc, char *argv[])
+ 		{"validate", 0, NULL, 't'},
+ 		{"setpchstrap", 1, NULL, 'S'},
+ 		{"newvalue", 1, NULL, 'V'},
++		{"nuke", 1, NULL, 'N'},
+ 		{0, 0, 0, 0}
+ 	};
+ 
+@@ -2241,35 +2298,8 @@ int main(int argc, char *argv[])
+ 			region_fname++;
+ 			// Descriptor, BIOS, ME, GbE, Platform
+ 			// valid type?
+-			if (!strcasecmp("Descriptor", region_type_string))
+-				region_type = 0;
+-			else if (!strcasecmp("BIOS", region_type_string))
+-				region_type = 1;
+-			else if (!strcasecmp("ME", region_type_string))
+-				region_type = 2;
+-			else if (!strcasecmp("GbE", region_type_string))
+-				region_type = 3;
+-			else if (!strcasecmp("Platform Data", region_type_string))
+-				region_type = 4;
+-			else if (!strcasecmp("Device Exp1", region_type_string))
+-				region_type = 5;
+-			else if (!strcasecmp("Secondary BIOS", region_type_string))
+-				region_type = 6;
+-			else if (!strcasecmp("Reserved", region_type_string))
+-				region_type = 7;
+-			else if (!strcasecmp("EC", region_type_string))
+-				region_type = 8;
+-			else if (!strcasecmp("Device Exp2", region_type_string))
+-				region_type = 9;
+-			else if (!strcasecmp("IE", region_type_string))
+-				region_type = 10;
+-			else if (!strcasecmp("10GbE_0", region_type_string))
+-				region_type = 11;
+-			else if (!strcasecmp("10GbE_1", region_type_string))
+-				region_type = 12;
+-			else if (!strcasecmp("PTT", region_type_string))
+-				region_type = 15;
+-			if (region_type == -1) {
++			if ((region_type =
++			    get_region_type_string(region_type_string)) == -1) {
+ 				fprintf(stderr, "No such region type: '%s'\n\n",
+ 					region_type_string);
+ 				fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
+@@ -2441,6 +2471,22 @@ int main(int argc, char *argv[])
+ 		case 't':
+ 			mode_validate = 1;
+ 			break;
++               case 'N':
++                       region_type_string = strdup(optarg);
++                       if (!region_type_string) {
++                               fprintf(stderr, "No region specified\n");
++                               print_usage(argv[0]);
++                               exit(EXIT_FAILURE);
++                       }
++                       if ((region_type =
++                           get_region_type_string(region_type_string)) == -1) {
++                               fprintf(stderr, "No such region type: '%s'\n\n",
++                                       region_type_string);
++                               print_usage(argv[0]);
++                               exit(EXIT_FAILURE);
++                       }
++                       mode_nuke = 1;
++                       break;
+ 		case 'v':
+ 			print_version();
+ 			exit(EXIT_SUCCESS);
+@@ -2457,7 +2503,7 @@ int main(int argc, char *argv[])
+ 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
+ 			mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
+ 			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
+-			(mode_gpr0_disable | mode_gpr0_enable)) > 1) {
++			(mode_gpr0_disable | mode_gpr0_enable) + mode_nuke) > 1) {
+ 		fprintf(stderr, "You may not specify more than one mode.\n\n");
+ 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
+ 		exit(EXIT_FAILURE);
+@@ -2466,7 +2512,8 @@ int main(int argc, char *argv[])
+ 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
+ 			mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
+ 			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
+-			mode_validate + (mode_gpr0_disable | mode_gpr0_enable)) == 0) {
++			mode_validate + (mode_gpr0_disable | mode_gpr0_enable) +
++			mode_nuke) == 0) {
+ 		fprintf(stderr, "You need to specify a mode.\n\n");
+ 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
+ 		exit(EXIT_FAILURE);
+@@ -2576,6 +2623,10 @@ int main(int argc, char *argv[])
+ 		write_image(new_filename, image, size);
+ 	}
+ 
++	if (mode_nuke) {
++		nuke(new_filename, image, size, region_type);
++	}
++
+ 	if (mode_altmedisable) {
+ 		struct fpsba *fpsba = find_fpsba(image, size);
+ 		struct fmsba *fmsba = find_fmsba(image, size);
+-- 
+2.39.2
+
diff --git a/config/coreboot/haswell/patches/0027-coreboot-haswell-fix-acpica-downloads.patch b/config/coreboot/haswell/patches/0027-coreboot-haswell-fix-acpica-downloads.patch
deleted file mode 100644
index 9f22c06d..00000000
--- a/config/coreboot/haswell/patches/0027-coreboot-haswell-fix-acpica-downloads.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 29c1116ebd5879568010a8386e4838294a78b408 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 16 Jul 2023 03:48:23 +0100
-Subject: [PATCH 1/1] coreboot/haswell: fix acpica downloads
-
-the upstream link died. i now host the relevant acpica
-tarball myself, on libreboot rsync. this patch makes
-coreboot crossgcc use that
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 3c4b10cc92..0c4262b7b1 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -52,7 +52,7 @@ MPFR_ARCHIVE="https://ftpmirror.gnu.org/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
- MPC_ARCHIVE="https://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz"
- GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
- BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
--IASL_ARCHIVE="https://acpica.org/sites/acpica/files/acpica-unix2-${IASL_VERSION}.tar.gz"
-+IASL_ARCHIVE="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
- # CLANG toolchain archive locations
- LLVM_ARCHIVE="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}/llvm-${CLANG_VERSION}.src.tar.xz"
- CLANG_ARCHIVE="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}/clang-${CLANG_VERSION}.src.tar.xz"
--- 
-2.40.1
-
diff --git a/config/coreboot/haswell/patches/0028-use-mirrorservice.org-for-gcc-downloads.patch b/config/coreboot/haswell/patches/0028-use-mirrorservice.org-for-gcc-downloads.patch
deleted file mode 100644
index 0d0a66a1..00000000
--- a/config/coreboot/haswell/patches/0028-use-mirrorservice.org-for-gcc-downloads.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From ca1bd48a87ab46ebfb444b0e092442bf6270ec7a Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 5 Nov 2023 23:19:42 +0000
-Subject: [PATCH 1/1] use mirrorservice.org for gcc downloads
-
-the gnu.org 302 redirect often fails
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index d4cc8b2a24..526940acfa 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -47,11 +47,11 @@ NASM_VERSION=2.15.05
- # These are sanitized by the jenkins toolchain test builder, so if
- # a completely new URL is added here, it probably needs to be added
- # to the jenkins build as well, or the builder won't download it.
--GMP_ARCHIVE="https://ftpmirror.gnu.org/gmp/gmp-${GMP_VERSION}.tar.xz"
--MPFR_ARCHIVE="https://ftpmirror.gnu.org/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
--MPC_ARCHIVE="https://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz"
--GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
--BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
-+GMP_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-${GMP_VERSION}.tar.xz"
-+MPFR_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
-+MPC_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-${MPC_VERSION}.tar.gz"
-+GCC_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
-+BINUTILS_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
- IASL_ARCHIVE="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
- # CLANG toolchain archive locations
- LLVM_ARCHIVE="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}/llvm-${CLANG_VERSION}.src.tar.xz"
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0029-ifdtool-nuke-option.patch b/config/coreboot/haswell/patches/0029-ifdtool-nuke-option.patch
deleted file mode 100644
index 18d6a21e..00000000
--- a/config/coreboot/haswell/patches/0029-ifdtool-nuke-option.patch
+++ /dev/null
@@ -1,194 +0,0 @@
-From 6f94e9aa38a5d6589b1a64642dfcb5ccbf90b8d3 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Tue, 9 Jan 2024 01:53:54 +0000
-Subject: [PATCH 1/1] ifdtool nuke option
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
- 1 file changed, 83 insertions(+), 31 deletions(-)
-
-diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index e97efcc206..ee27e7f2e6 100644
---- a/util/ifdtool/ifdtool.c
-+++ b/util/ifdtool/ifdtool.c
-@@ -1711,6 +1711,7 @@ static void print_usage(const char *name)
- 	       "                                         tgl    - Tiger Lake\n"
- 	       "   -S | --setpchstrap                    Write a PCH strap\n"
- 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
-+	       "   -N | --nuke <region>                  Overwrite the specified region with 0xFF (all ones)\n"
- 	       "   -v | --version:                       print the version\n"
- 	       "   -h | --help:                          print this help\n\n"
- 	       "<region> is one of Descriptor, BIOS, ME, GbE, Platform Data, Secondary BIOS, "
-@@ -1718,6 +1719,60 @@ static void print_usage(const char *name)
- 	       "\n");
- }
- 
-+static int
-+get_region_type_string(const char *region_type_string)
-+{
-+	if (!strcasecmp("Descriptor", region_type_string))
-+		return 0;
-+	else if (!strcasecmp("BIOS", region_type_string))
-+		return 1;
-+	else if (!strcasecmp("ME", region_type_string))
-+		return 2;
-+	else if (!strcasecmp("GbE", region_type_string))
-+		return 3;
-+	else if (!strcasecmp("Platform Data", region_type_string))
-+		return 4;
-+	else if (!strcasecmp("Device Exp1", region_type_string))
-+		return 5;
-+	else if (!strcasecmp("Secondary BIOS", region_type_string))
-+		return 6;
-+	else if (!strcasecmp("Reserved", region_type_string))
-+		return 7;
-+	else if (!strcasecmp("EC", region_type_string))
-+		return 8;
-+	else if (!strcasecmp("Device Exp2", region_type_string))
-+		return 9;
-+	else if (!strcasecmp("IE", region_type_string))
-+		return 10;
-+	else if (!strcasecmp("10GbE_0", region_type_string))
-+		return 11;
-+	else if (!strcasecmp("10GbE_1", region_type_string))
-+		return 12;
-+	else if (!strcasecmp("PTT", region_type_string))
-+		return 15;
-+	return -1;
-+}
-+
-+static void
-+nuke(const char *filename, char *image, int size, int region_type)
-+{
-+	int i;
-+	region_t region;
-+	const frba_t *frba = find_frba(image, size);
-+	if (!frba)
-+		exit(EXIT_FAILURE);
-+
-+	region = get_region(frba, region_type);
-+	if (region.size > 0) {
-+		for (i = region.base; i <= region.limit; i++) {
-+			if ((i + 1) > (size))
-+				break;
-+			image[i] = 0xFF;
-+		}
-+		write_image(filename, image, size);
-+	}
-+}
-+
- int main(int argc, char *argv[])
- {
- 	int opt, option_index = 0;
-@@ -1725,6 +1780,7 @@ int main(int argc, char *argv[])
- 	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
- 	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
- 	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0;
-+	int mode_nuke = 0;
- 	char *region_type_string = NULL, *region_fname = NULL;
- 	const char *layout_fname = NULL;
- 	char *new_filename = NULL;
-@@ -1755,6 +1811,7 @@ int main(int argc, char *argv[])
- 		{"validate", 0, NULL, 't'},
- 		{"setpchstrap", 1, NULL, 'S'},
- 		{"newvalue", 1, NULL, 'V'},
-+		{"nuke", 1, NULL, 'N'},
- 		{0, 0, 0, 0}
- 	};
- 
-@@ -1795,35 +1852,8 @@ int main(int argc, char *argv[])
- 			region_fname++;
- 			// Descriptor, BIOS, ME, GbE, Platform
- 			// valid type?
--			if (!strcasecmp("Descriptor", region_type_string))
--				region_type = 0;
--			else if (!strcasecmp("BIOS", region_type_string))
--				region_type = 1;
--			else if (!strcasecmp("ME", region_type_string))
--				region_type = 2;
--			else if (!strcasecmp("GbE", region_type_string))
--				region_type = 3;
--			else if (!strcasecmp("Platform Data", region_type_string))
--				region_type = 4;
--			else if (!strcasecmp("Device Exp1", region_type_string))
--				region_type = 5;
--			else if (!strcasecmp("Secondary BIOS", region_type_string))
--				region_type = 6;
--			else if (!strcasecmp("Reserved", region_type_string))
--				region_type = 7;
--			else if (!strcasecmp("EC", region_type_string))
--				region_type = 8;
--			else if (!strcasecmp("Device Exp2", region_type_string))
--				region_type = 9;
--			else if (!strcasecmp("IE", region_type_string))
--				region_type = 10;
--			else if (!strcasecmp("10GbE_0", region_type_string))
--				region_type = 11;
--			else if (!strcasecmp("10GbE_1", region_type_string))
--				region_type = 12;
--			else if (!strcasecmp("PTT", region_type_string))
--				region_type = 15;
--			if (region_type == -1) {
-+			if ((region_type =
-+			    get_region_type_string(region_type_string)) == -1) {
- 				fprintf(stderr, "No such region type: '%s'\n\n",
- 					region_type_string);
- 				print_usage(argv[0]);
-@@ -1988,6 +2018,22 @@ int main(int argc, char *argv[])
- 		case 't':
- 			mode_validate = 1;
- 			break;
-+               case 'N':
-+                       region_type_string = strdup(optarg);
-+                       if (!region_type_string) {
-+                               fprintf(stderr, "No region specified\n");
-+                               print_usage(argv[0]);
-+                               exit(EXIT_FAILURE);
-+                       }
-+                       if ((region_type =
-+                           get_region_type_string(region_type_string)) == -1) {
-+                               fprintf(stderr, "No such region type: '%s'\n\n",
-+                                       region_type_string);
-+                               print_usage(argv[0]);
-+                               exit(EXIT_FAILURE);
-+                       }
-+                       mode_nuke = 1;
-+                       break;
- 		case 'v':
- 			print_version();
- 			exit(EXIT_SUCCESS);
-@@ -2003,7 +2049,8 @@ int main(int argc, char *argv[])
- 
- 	if ((mode_dump + mode_layout + mode_extract + mode_inject + mode_setstrap +
- 		mode_newlayout + (mode_spifreq | mode_em100 | mode_unlocked |
--		 mode_locked) + mode_altmedisable + mode_validate) > 1) {
-+		 mode_locked) + mode_altmedisable + mode_validate +
-+		 mode_nuke) > 1) {
- 		fprintf(stderr, "You may not specify more than one mode.\n\n");
- 		print_usage(argv[0]);
- 		exit(EXIT_FAILURE);
-@@ -2011,7 +2058,8 @@ int main(int argc, char *argv[])
- 
- 	if ((mode_dump + mode_layout + mode_extract + mode_inject + mode_setstrap +
- 	     mode_newlayout + mode_spifreq + mode_em100 + mode_locked +
--	     mode_unlocked + mode_density + mode_altmedisable + mode_validate) == 0) {
-+	     mode_unlocked + mode_density + mode_altmedisable +
-+	     mode_validate + mode_nuke) == 0) {
- 		fprintf(stderr, "You need to specify a mode.\n\n");
- 		print_usage(argv[0]);
- 		exit(EXIT_FAILURE);
-@@ -2109,6 +2157,10 @@ int main(int argc, char *argv[])
- 		write_image(new_filename, image, size);
- 	}
- 
-+	if (mode_nuke) {
-+               nuke(new_filename, image, size, region_type);
-+	}
-+
- 	if (mode_altmedisable) {
- 		fpsba_t *fpsba = find_fpsba(image, size);
- 		fmsba_t *fmsba = find_fmsba(image, size);
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/target.cfg b/config/coreboot/haswell/target.cfg
index b3196341..a38399e4 100644
--- a/config/coreboot/haswell/target.cfg
+++ b/config/coreboot/haswell/target.cfg
@@ -1,3 +1,3 @@
 tree="haswell"
-rev="1411ecf6f0b2c7395bcb96b856dcfdddb1b0c81b"
+rev="b7341da19133991efd29880849bdaab29a6e243d"
 xarch="i386-elf"
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..58daa6a1
--- /dev/null
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,668 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_FAMILY="ThinkPad T440p"
+CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T440p"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/haswell"
+CONFIG_VGA_BIOS_ID="8086,0416"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0xBE0000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="t440p"
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x20000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
+# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
+CONFIG_VBOOT_SLOTS_RW_AB=y
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0036"
+CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xe8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+CONFIG_USE_NATIVE_RAMINIT=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
+CONFIG_H8_HAS_LEDLOGO=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_NO_UART_ON_SUPERIO=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
index 967b3b2e..89a4925b 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -14,12 +13,15 @@ CONFIG_COMPILER_GCC=y
 CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,6 +38,12 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
 # end of General setup
 
 #
@@ -53,30 +61,28 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BAP is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
 # CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_ELMEX is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_JETWAY is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_LIPPERT is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -91,7 +97,6 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
 # CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
 # CONFIG_VENDOR_SIEMENS is not set
 # CONFIG_VENDOR_SIFIVE is not set
 # CONFIG_VENDOR_STARLABS is not set
@@ -111,31 +116,30 @@ CONFIG_FMDFILE=""
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0xBE0000
 CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-# CONFIG_VBOOT is not set
-CONFIG_VBOOT_VBNV_OFFSET=0x2a
-CONFIG_VARIANT_DIR="t440p"
 CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="t440p"
+CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xff7c0000
 CONFIG_DCACHE_RAM_SIZE=0x40000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x20000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
@@ -148,15 +152,16 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p"
 CONFIG_HAVE_IFD_BIN=y
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-# CONFIG_BOARD_LENOVO_G505S is not set
 CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -177,6 +182,7 @@ CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -188,6 +194,7 @@ CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
 CONFIG_VBOOT_SLOTS_RW_AB=y
@@ -195,11 +202,16 @@ CONFIG_PS2K_EISAID="LEN0071"
 CONFIG_PS2M_EISAID="LEN0036"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -212,6 +224,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -233,7 +246,6 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
 #
 # SoC
 #
-CONFIG_ARCH_ALL_STAGES_X86=y
 CONFIG_CHIPSET_DEVICETREE=""
 CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
@@ -241,34 +253,34 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_CPU_SPECIFIC_OPTIONS=y
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xe8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
 CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
-CONFIG_UART_PCI_ADDR=0x0
-CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
 
 #
 # CPU
 #
 CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_SSE2=y
 CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -277,7 +289,6 @@ CONFIG_SET_MSR_AESNI_LOCK_BIT=y
 CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
 CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
 CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_MICROCODE_UPDATE_PRE_RAM=y
 CONFIG_PARALLEL_MP=y
 CONFIG_XAPIC_ONLY=y
 # CONFIG_X2APIC_ONLY is not set
@@ -286,14 +297,13 @@ CONFIG_XAPIC_ONLY=y
 CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
-CONFIG_SMM_STUB_STACK_SIZE=0x400
-CONFIG_CPU_INFO_V2=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
+CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
 CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
 CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
@@ -310,9 +320,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 #
 # Southbridge
 #
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_PCIEXP_HOTPLUG=y
+# CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
 CONFIG_FINALIZE_USB_ROUTE_XHCI=y
@@ -328,12 +336,12 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
 CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
 # CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
 CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
 CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
 CONFIG_RCBA_LENGTH=0x4000
@@ -347,11 +355,13 @@ CONFIG_RCBA_LENGTH=0x4000
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-# CONFIG_H8_BEEP_ON_DEATH is not set
-# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
 CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
+CONFIG_H8_HAS_LEDLOGO=y
 CONFIG_EC_LENOVO_PMH7=y
 
 #
@@ -374,8 +384,10 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_NUM_IPI_STARTS=2
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -385,6 +397,7 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -396,6 +409,7 @@ CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
 CONFIG_MAINBOARD_USE_LIBGFXINIT=y
 # CONFIG_VGA_ROM_RUN is not set
 # CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
 
 #
 # Display
@@ -407,17 +421,14 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
 CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -425,7 +436,8 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATOR_V4=y
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
 # end of Devices
 
 #
@@ -435,21 +447,19 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
-CONFIG_MRC_STASH_TO_CBMEM=y
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 # CONFIG_SPI_FLASH_NO_FAST_READ is not set
 CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
@@ -460,28 +470,35 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_DDI=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Haswell"
 CONFIG_GFX_GMA_PCH="Lynx_Point"
 CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
 CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -509,7 +526,11 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
 # CONFIG_TPM_RDRESP_NEED_DELAY is not set
-# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -531,6 +552,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -548,17 +572,18 @@ CONFIG_SQUELCH_EARLY_SMP=y
 CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_EM100PRO_SPI_CONSOLE is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -566,7 +591,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -580,6 +605,7 @@ CONFIG_USE_WATCHDOG_ON_BOOT=y
 # System tables
 #
 CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -587,32 +613,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # Payload
 #
 CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BOOTBOOT is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_SEAGRUB is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_GRUB2_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_SEABIOS_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-# CONFIG_COREDOOM_SECONDARY_PAYLOAD is not set
-# end of Secondary Payloads
 # end of Payload
 
 #
@@ -624,6 +624,10 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -637,13 +641,14 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_SMI is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
 CONFIG_HAVE_EM100_SUPPORT=y
 # CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_RAMSTAGE_ADA=y
@@ -651,6 +656,7 @@ CONFIG_RAMSTAGE_LIBHWBASE=y
 CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..15e93305
--- /dev/null
+++ b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,667 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_FAMILY="ThinkPad W541"
+CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W541"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/haswell"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0xBE0000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="w541"
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x20000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541"
+CONFIG_HAVE_IFD_BIN=y
+# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+CONFIG_BOARD_LENOVO_THINKPAD_W541=y
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
+CONFIG_VBOOT_SLOTS_RW_AB=y
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN004A"
+CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xe8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+CONFIG_USE_NATIVE_RAMINIT=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
+CONFIG_H8_HAS_LEDLOGO=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_NO_UART_ON_SUPERIO=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_txtmode b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
index b3e169d4..2c0dddb9 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -14,12 +13,15 @@ CONFIG_COMPILER_GCC=y
 CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -31,11 +33,17 @@ CONFIG_USE_BLOBS=y
 CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
 # end of General setup
 
 #
@@ -53,30 +61,28 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BAP is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
 # CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_ELMEX is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_JETWAY is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_LIPPERT is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -91,7 +97,6 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
 # CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
 # CONFIG_VENDOR_SIEMENS is not set
 # CONFIG_VENDOR_SIFIVE is not set
 # CONFIG_VENDOR_STARLABS is not set
@@ -111,31 +116,30 @@ CONFIG_FMDFILE=""
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0xBE0000
 CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-# CONFIG_VBOOT is not set
-CONFIG_VBOOT_VBNV_OFFSET=0x2a
-CONFIG_VARIANT_DIR="w541"
 CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="w541"
+CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xff7c0000
 CONFIG_DCACHE_RAM_SIZE=0x40000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x20000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
@@ -148,12 +152,16 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541"
 CONFIG_HAVE_IFD_BIN=y
-# CONFIG_BOARD_LENOVO_G505S is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 CONFIG_BOARD_LENOVO_THINKPAD_W541=y
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -174,6 +182,7 @@ CONFIG_BOARD_LENOVO_THINKPAD_W541=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -185,6 +194,7 @@ CONFIG_BOARD_LENOVO_THINKPAD_W541=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
 CONFIG_VBOOT_SLOTS_RW_AB=y
@@ -192,11 +202,16 @@ CONFIG_PS2K_EISAID="LEN0071"
 CONFIG_PS2M_EISAID="LEN004A"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -209,6 +224,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -230,7 +246,6 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
 #
 # SoC
 #
-CONFIG_ARCH_ALL_STAGES_X86=y
 CONFIG_CHIPSET_DEVICETREE=""
 CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
@@ -238,34 +253,34 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_CPU_SPECIFIC_OPTIONS=y
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xe8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
 CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
-CONFIG_UART_PCI_ADDR=0x0
-CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
 
 #
 # CPU
 #
 CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_SSE2=y
 CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -274,7 +289,6 @@ CONFIG_SET_MSR_AESNI_LOCK_BIT=y
 CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
 CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
 CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_MICROCODE_UPDATE_PRE_RAM=y
 CONFIG_PARALLEL_MP=y
 CONFIG_XAPIC_ONLY=y
 # CONFIG_X2APIC_ONLY is not set
@@ -283,14 +297,13 @@ CONFIG_XAPIC_ONLY=y
 CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
-CONFIG_SMM_STUB_STACK_SIZE=0x400
-CONFIG_CPU_INFO_V2=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
+CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
 CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
 CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
@@ -307,8 +320,6 @@ CONFIG_USE_NATIVE_RAMINIT=y
 #
 # Southbridge
 #
-CONFIG_SOUTH_BRIDGE_OPTIONS=y
-CONFIG_HPET_MIN_TICKS=0x80
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
@@ -325,12 +336,12 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
 CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
 CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
 # CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
 CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
 CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
 CONFIG_RCBA_LENGTH=0x4000
@@ -347,8 +358,10 @@ CONFIG_EC_LENOVO_H8=y
 CONFIG_H8_BEEP_ON_DEATH=y
 CONFIG_H8_FLASH_LEDS_ON_DEATH=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
 CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
+CONFIG_H8_HAS_LEDLOGO=y
 CONFIG_EC_LENOVO_PMH7=y
 
 #
@@ -371,8 +384,10 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_NUM_IPI_STARTS=2
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -382,6 +397,7 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -393,6 +409,7 @@ CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
 CONFIG_MAINBOARD_USE_LIBGFXINIT=y
 # CONFIG_VGA_ROM_RUN is not set
 # CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
 
 #
 # Display
@@ -404,14 +421,14 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
 CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -419,7 +436,8 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATOR_V4=y
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
 # end of Devices
 
 #
@@ -429,21 +447,19 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
-CONFIG_MRC_STASH_TO_CBMEM=y
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 # CONFIG_SPI_FLASH_NO_FAST_READ is not set
 CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
@@ -454,27 +470,34 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_DDI=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Haswell"
 CONFIG_GFX_GMA_PCH="Lynx_Point"
 CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
 CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -502,7 +525,11 @@ CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
 # CONFIG_TPM_RDRESP_NEED_DELAY is not set
-# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -524,6 +551,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -541,6 +571,7 @@ CONFIG_SQUELCH_EARLY_SMP=y
 CONFIG_CONSOLE_CBMEM=y
 # CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_EM100PRO_SPI_CONSOLE is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
 CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
@@ -573,6 +604,7 @@ CONFIG_USE_WATCHDOG_ON_BOOT=y
 # System tables
 #
 CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -580,32 +612,6 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # Payload
 #
 CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BOOTBOOT is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_SEAGRUB is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_GRUB2_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_SEABIOS_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-# CONFIG_COREDOOM_SECONDARY_PAYLOAD is not set
-# end of Secondary Payloads
 # end of Payload
 
 #
@@ -617,6 +623,10 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -630,7 +640,6 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_SMI is not set
 # CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
@@ -638,6 +647,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_ADA_CODE is not set
 CONFIG_HAVE_EM100_SUPPORT=y
 # CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_RAMSTAGE_ADA=y
@@ -645,6 +655,7 @@ CONFIG_RAMSTAGE_LIBHWBASE=y
 CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y

From ac7ce93005ca7d8eccec5052d2e459514af70f39 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 20 Apr 2024 22:22:22 +0100
Subject: [PATCH 0247/1549] add 9020sff/mt configs using haswell NRI

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              | 627 ++++++++++++++++++
 .../config/libgfxinit_txtmode                 | 624 +++++++++++++++++
 .../coreboot/dell9020mt-nri_12mb/target.cfg   |   7 +
 .../config/libgfxinit_corebootfb              | 627 ++++++++++++++++++
 .../config/libgfxinit_txtmode                 | 624 +++++++++++++++++
 .../coreboot/dell9020sff-nri_12mb/target.cfg  |   7 +
 ...-haswell-make-IOMMU-a-runtime-option.patch | 292 ++++++++
 ...tiplex_9020-Disable-IOMMU-by-default.patch |  29 +
 ..._9020-Implement-late-HWM-initializat.patch | 594 +++++++++++++++++
 ...Fully-disable-iGPU-when-dGPU-is-used.patch |  51 ++
 config/vendor/sources                         |   2 +-
 11 files changed, 3483 insertions(+), 1 deletion(-)
 create mode 100644 config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/dell9020mt-nri_12mb/target.cfg
 create mode 100644 config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/dell9020sff-nri_12mb/target.cfg
 create mode 100644 config/coreboot/haswell/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
 create mode 100644 config/coreboot/haswell/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch
 create mode 100644 config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
 create mode 100644 config/coreboot/haswell/patches/0024-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch

diff --git a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..d587473c
--- /dev/null
+++ b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,627 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+CONFIG_UTIL_GENPARSER=y
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x20000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xe8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+CONFIG_USE_NATIVE_RAMINIT=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..fb415885
--- /dev/null
+++ b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,624 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+CONFIG_UTIL_GENPARSER=y
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x20000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xe8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+CONFIG_USE_NATIVE_RAMINIT=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020mt-nri_12mb/target.cfg b/config/coreboot/dell9020mt-nri_12mb/target.cfg
new file mode 100644
index 00000000..37d8f553
--- /dev/null
+++ b/config/coreboot/dell9020mt-nri_12mb/target.cfg
@@ -0,0 +1,7 @@
+tree="haswell"
+xarch="i386-elf"
+payload_seabios="y"
+payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..7bfe30a2
--- /dev/null
+++ b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,627 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 SFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x20000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xe8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+CONFIG_USE_NATIVE_RAMINIT=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..c976b093
--- /dev/null
+++ b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,624 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 SFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x20000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xe8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+CONFIG_USE_NATIVE_RAMINIT=y
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020sff-nri_12mb/target.cfg b/config/coreboot/dell9020sff-nri_12mb/target.cfg
new file mode 100644
index 00000000..37d8f553
--- /dev/null
+++ b/config/coreboot/dell9020sff-nri_12mb/target.cfg
@@ -0,0 +1,7 @@
+tree="haswell"
+xarch="i386-elf"
+payload_seabios="y"
+payload_seabios_withgrub="y"
+payload_seabios_grubonly="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/haswell/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch b/config/coreboot/haswell/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
new file mode 100644
index 00000000..81b8e839
--- /dev/null
+++ b/config/coreboot/haswell/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
@@ -0,0 +1,292 @@
+From d97b865a2210e70583e8bf5ee3a73d3c131b29c1 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sat, 2 Mar 2024 22:51:09 +0000
+Subject: [PATCH 1/4] nb/intel/haswell: make IOMMU a runtime option
+
+When I tested graphics cards on a coreboot port for Dell
+OptiPlex 9020 SFF, I could not use a graphics card unless
+I set iommu=off on the Linux cmdline.
+
+Coreboot's current behaviour is to check whether the CPU
+has vt-d support and, if it does, initialise the IOMMU.
+
+This patch maintains the current behaviour by default, but
+allows the user to turn *off* the IOMMU, even if vt-d is
+supported by the host CPU.
+
+If iommu=Disable is specified, the check will not be
+performed, and the IOMMU will be left disabled. This option
+has been added to all current Haswell boards, though it is
+recommended to leave the IOMMU turned on in most setups.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/asrock/b85m_pro4/cmos.default    | 1 +
+ src/mainboard/asrock/b85m_pro4/cmos.layout     | 3 +++
+ src/mainboard/asrock/h81m-hds/cmos.default     | 1 +
+ src/mainboard/asrock/h81m-hds/cmos.layout      | 6 ++++++
+ src/mainboard/dell/optiplex_9020/cmos.default  | 1 +
+ src/mainboard/dell/optiplex_9020/cmos.layout   | 6 ++++++
+ src/mainboard/google/beltino/cmos.layout       | 5 +++++
+ src/mainboard/google/slippy/cmos.layout        | 5 +++++
+ src/mainboard/intel/baskingridge/cmos.layout   | 4 ++++
+ src/mainboard/lenovo/haswell/cmos.default      | 1 +
+ src/mainboard/lenovo/haswell/cmos.layout       | 3 +++
+ src/mainboard/supermicro/x10slm-f/cmos.default | 1 +
+ src/mainboard/supermicro/x10slm-f/cmos.layout  | 6 ++++++
+ src/northbridge/intel/haswell/early_init.c     | 5 +++++
+ 14 files changed, 48 insertions(+)
+
+diff --git a/src/mainboard/asrock/b85m_pro4/cmos.default b/src/mainboard/asrock/b85m_pro4/cmos.default
+index 01bf20ad16..dfc8b80fb0 100644
+--- a/src/mainboard/asrock/b85m_pro4/cmos.default
++++ b/src/mainboard/asrock/b85m_pro4/cmos.default
+@@ -4,3 +4,4 @@ boot_option=Fallback
+ debug_level=Debug
+ nmi=Enable
+ power_on_after_fail=Disable
++iommu=Enable
+diff --git a/src/mainboard/asrock/b85m_pro4/cmos.layout b/src/mainboard/asrock/b85m_pro4/cmos.layout
+index efdc333fc2..c9883ea71d 100644
+--- a/src/mainboard/asrock/b85m_pro4/cmos.layout
++++ b/src/mainboard/asrock/b85m_pro4/cmos.layout
+@@ -11,6 +11,7 @@
+ 	395	4	e	4	debug_level
+ 	408	1	e	1	nmi
+ 	409	2	e	5	power_on_after_fail
++	412	1	e	6	iommu
+ 	984	16	h	0	check_sum
+ # -----------------------------------------------------------------
+ 
+@@ -38,6 +39,8 @@
+ 	5	0	Disable
+ 	5	1	Enable
+ 	5	2	Keep
++	6	0	Disable
++	6	1	Enable
+ # -----------------------------------------------------------------
+ 
+ # -----------------------------------------------------------------
+diff --git a/src/mainboard/asrock/h81m-hds/cmos.default b/src/mainboard/asrock/h81m-hds/cmos.default
+index 01bf20ad16..dfc8b80fb0 100644
+--- a/src/mainboard/asrock/h81m-hds/cmos.default
++++ b/src/mainboard/asrock/h81m-hds/cmos.default
+@@ -4,3 +4,4 @@ boot_option=Fallback
+ debug_level=Debug
+ nmi=Enable
+ power_on_after_fail=Disable
++iommu=Enable
+diff --git a/src/mainboard/asrock/h81m-hds/cmos.layout b/src/mainboard/asrock/h81m-hds/cmos.layout
+index c9ba76c78f..95ee3d36fb 100644
+--- a/src/mainboard/asrock/h81m-hds/cmos.layout
++++ b/src/mainboard/asrock/h81m-hds/cmos.layout
+@@ -21,6 +21,9 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	5	power_on_after_fail
+ 
++# enable or disable iommu
++412	1	e	6	iommu
++
+ # coreboot config options: check sums
+ 984	16	h	0	check_sum
+ 
+@@ -52,6 +55,9 @@ enumerations
+ 5	1	Enable
+ 5	2	Keep
+ 
++6	0	Disable
++6	1	Enable
++
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
+index cd4046f1ab..c974022472 100644
+--- a/src/mainboard/dell/optiplex_9020/cmos.default
++++ b/src/mainboard/dell/optiplex_9020/cmos.default
+@@ -3,3 +3,4 @@ boot_option=Fallback
+ debug_level=Debug
+ nmi=Disable
+ power_on_after_fail=Disable
++iommu=Enable
+diff --git a/src/mainboard/dell/optiplex_9020/cmos.layout b/src/mainboard/dell/optiplex_9020/cmos.layout
+index c9ba76c78f..72ff9c4bee 100644
+--- a/src/mainboard/dell/optiplex_9020/cmos.layout
++++ b/src/mainboard/dell/optiplex_9020/cmos.layout
+@@ -21,6 +21,9 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	5	power_on_after_fail
+ 
++# turn iommu on or off
++412	1	e	6	iommu
++
+ # coreboot config options: check sums
+ 984	16	h	0	check_sum
+ 
+@@ -52,6 +55,9 @@ enumerations
+ 5	1	Enable
+ 5	2	Keep
+ 
++6	0	Disable
++6	1	Enable
++
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/mainboard/google/beltino/cmos.layout b/src/mainboard/google/beltino/cmos.layout
+index 78d44c1415..c143979ae1 100644
+--- a/src/mainboard/google/beltino/cmos.layout
++++ b/src/mainboard/google/beltino/cmos.layout
+@@ -19,6 +19,9 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	7	power_on_after_fail
+ 
++# enable or disable iommu
++412	1	e	8	iommu
++
+ # coreboot config options: bootloader
+ #Used by ChromeOS:
+ 416	128	r	0	vbnv
+@@ -47,6 +50,8 @@ enumerations
+ 7	0	Disable
+ 7	1	Enable
+ 7	2	Keep
++8	0	Disable
++8	1	Enable
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/mainboard/google/slippy/cmos.layout b/src/mainboard/google/slippy/cmos.layout
+index 78d44c1415..c143979ae1 100644
+--- a/src/mainboard/google/slippy/cmos.layout
++++ b/src/mainboard/google/slippy/cmos.layout
+@@ -19,6 +19,9 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	7	power_on_after_fail
+ 
++# enable or disable iommu
++412	1	e	8	iommu
++
+ # coreboot config options: bootloader
+ #Used by ChromeOS:
+ 416	128	r	0	vbnv
+@@ -47,6 +50,8 @@ enumerations
+ 7	0	Disable
+ 7	1	Enable
+ 7	2	Keep
++8	0	Disable
++8	1	Enable
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/mainboard/intel/baskingridge/cmos.layout b/src/mainboard/intel/baskingridge/cmos.layout
+index 78d44c1415..f2c602f541 100644
+--- a/src/mainboard/intel/baskingridge/cmos.layout
++++ b/src/mainboard/intel/baskingridge/cmos.layout
+@@ -19,6 +19,8 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	7	power_on_after_fail
+ 
++412	1	e	8	iommu
++
+ # coreboot config options: bootloader
+ #Used by ChromeOS:
+ 416	128	r	0	vbnv
+@@ -47,6 +49,8 @@ enumerations
+ 7	0	Disable
+ 7	1	Enable
+ 7	2	Keep
++8	0	Disable
++8	1	Enable
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/mainboard/lenovo/haswell/cmos.default b/src/mainboard/lenovo/haswell/cmos.default
+index 08db97c5a9..cc6b363cd9 100644
+--- a/src/mainboard/lenovo/haswell/cmos.default
++++ b/src/mainboard/lenovo/haswell/cmos.default
+@@ -14,3 +14,4 @@ trackpoint=Enable
+ backlight=Keyboard
+ enable_dual_graphics=Disable
+ usb_always_on=Disable
++iommu=Enable
+diff --git a/src/mainboard/lenovo/haswell/cmos.layout b/src/mainboard/lenovo/haswell/cmos.layout
+index 27915d3ab7..59df76b64c 100644
+--- a/src/mainboard/lenovo/haswell/cmos.layout
++++ b/src/mainboard/lenovo/haswell/cmos.layout
+@@ -23,6 +23,7 @@ entries
+ 
+ # coreboot config options: EC
+ 411	1	e	8	first_battery
++413	1	e	14	iommu
+ 415	1	e	1	wlan
+ 416	1	e	1	trackpoint
+ 417	1	e	1	fn_ctrl_swap
+@@ -72,6 +73,8 @@ enumerations
+ 13	0	Disable
+ 13	1	AC and battery
+ 13	2	AC only
++14	0	Disable
++14	1	Enable
+ 
+ # -----------------------------------------------------------------
+ checksums
+diff --git a/src/mainboard/supermicro/x10slm-f/cmos.default b/src/mainboard/supermicro/x10slm-f/cmos.default
+index 7ce38fb5d7..6049e7938a 100644
+--- a/src/mainboard/supermicro/x10slm-f/cmos.default
++++ b/src/mainboard/supermicro/x10slm-f/cmos.default
+@@ -5,3 +5,4 @@ debug_level=Debug
+ nmi=Enable
+ power_on_after_fail=Keep
+ hide_ast2400=Disable
++iommu=Enable
+diff --git a/src/mainboard/supermicro/x10slm-f/cmos.layout b/src/mainboard/supermicro/x10slm-f/cmos.layout
+index 38ba87aa45..24d39e97ee 100644
+--- a/src/mainboard/supermicro/x10slm-f/cmos.layout
++++ b/src/mainboard/supermicro/x10slm-f/cmos.layout
+@@ -21,6 +21,9 @@ entries
+ 408	1	e	1	nmi
+ 409	2	e	5	power_on_after_fail
+ 
++# enable or disable iommu
++412	1	e	6	iommu
++
+ # coreboot config options: mainboard
+ 416	1	e	1	hide_ast2400
+ 
+@@ -55,6 +58,9 @@ enumerations
+ 5	1	Enable
+ 5	2	Keep
+ 
++6	0	Disable
++6	1	Enable
++
+ # -----------------------------------------------------------------
+ checksums
+ 
+diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c
+index e47deb5da6..1a7e0b1076 100644
+--- a/src/northbridge/intel/haswell/early_init.c
++++ b/src/northbridge/intel/haswell/early_init.c
+@@ -5,6 +5,7 @@
+ #include <device/mmio.h>
+ #include <device/pci_def.h>
+ #include <device/pci_ops.h>
++#include <option.h>
+ 
+ #include "haswell.h"
+ 
+@@ -157,6 +158,10 @@ static void haswell_setup_misc(void)
+ static void haswell_setup_iommu(void)
+ {
+ 	const u32 capid0_a = pci_read_config32(HOST_BRIDGE, CAPID0_A);
++	u8 enable_iommu = get_uint_option("iommu", 1);
++
++	if (!enable_iommu)
++		return;
+ 
+ 	if (capid0_a & VTD_DISABLE)
+ 		return;
+-- 
+2.39.2
+
diff --git a/config/coreboot/haswell/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch b/config/coreboot/haswell/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch
new file mode 100644
index 00000000..fbb40293
--- /dev/null
+++ b/config/coreboot/haswell/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch
@@ -0,0 +1,29 @@
+From 153ca1a43c2c978fa2b2b82d988b0f838953cfb9 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sat, 2 Mar 2024 23:00:09 +0000
+Subject: [PATCH 2/4] dell/optiplex_9020: Disable IOMMU by default
+
+Needed to make graphics cards work. Turning it on is
+recommended if only using iGPU, otherwise leave it off
+by default. The IOMMU is extremely buggy when a graphics
+card is used. Leaving it off by default will ensure that
+the default ROM images in Libreboot will work on any setup.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/dell/optiplex_9020/cmos.default | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
+index c974022472..a0acd7b6bb 100644
+--- a/src/mainboard/dell/optiplex_9020/cmos.default
++++ b/src/mainboard/dell/optiplex_9020/cmos.default
+@@ -3,4 +3,4 @@ boot_option=Fallback
+ debug_level=Debug
+ nmi=Disable
+ power_on_after_fail=Disable
+-iommu=Enable
++iommu=Disable
+-- 
+2.39.2
+
diff --git a/config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch b/config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
new file mode 100644
index 00000000..527c18d3
--- /dev/null
+++ b/config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
@@ -0,0 +1,594 @@
+From 08bae51a77c2c92fefef79e9c9b6ff963b3812cc Mon Sep 17 00:00:00 2001
+From: Mate Kukri <kukri.mate@gmail.com>
+Date: Sat, 6 Apr 2024 23:25:15 +0100
+Subject: [PATCH 3/4] mb/dell/optiplex_9020: Implement late HWM initialization
+
+There are 4 different chassis types specified by vendor firmware, each
+with a slightly different HWM configuration.
+
+The chassis type to use is determined at runtime by reading a set of
+4 PCH GPIOs: 70, 38, 17, and 0.
+
+Additionally vendor firmware also provides an option to run the fans at
+full speed. This is substituted with a coreboot nvram option in this
+implementation.
+
+This was tested to make fan control work on my OptiPlex 7020 SFF.
+
+NOTE: This is superficially similar to the OptiPlex 9010's SCH5545
+however the OptiPlex 9020's SCH5555 does not use externally
+programmed EC firmware.
+
+Change-Id: Ibdccd3fc7364e03e84ca606592928410624eed43
+Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
+---
+ src/mainboard/dell/optiplex_9020/Makefile.mk  |   3 +-
+ src/mainboard/dell/optiplex_9020/bootblock.c  |  25 +-
+ src/mainboard/dell/optiplex_9020/cmos.default |   1 +
+ src/mainboard/dell/optiplex_9020/cmos.layout  |   5 +-
+ src/mainboard/dell/optiplex_9020/mainboard.c  | 382 ++++++++++++++++++
+ src/mainboard/dell/optiplex_9020/sch5555_ec.c |  54 +++
+ src/mainboard/dell/optiplex_9020/sch5555_ec.h |   7 +
+ 7 files changed, 455 insertions(+), 22 deletions(-)
+ create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.c
+ create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.h
+
+diff --git a/src/mainboard/dell/optiplex_9020/Makefile.mk b/src/mainboard/dell/optiplex_9020/Makefile.mk
+index 6ca2f2afaa..08e2e53577 100644
+--- a/src/mainboard/dell/optiplex_9020/Makefile.mk
++++ b/src/mainboard/dell/optiplex_9020/Makefile.mk
+@@ -2,4 +2,5 @@
+ 
+ romstage-y += gpio.c
+ ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+-bootblock-y += bootblock.c
++ramstage-y += sch5555_ec.c
++bootblock-y += bootblock.c sch5555_ec.c
+diff --git a/src/mainboard/dell/optiplex_9020/bootblock.c b/src/mainboard/dell/optiplex_9020/bootblock.c
+index 2837cf9cf1..e5e759273e 100644
+--- a/src/mainboard/dell/optiplex_9020/bootblock.c
++++ b/src/mainboard/dell/optiplex_9020/bootblock.c
+@@ -4,29 +4,14 @@
+ #include <device/pnp_ops.h>
+ #include <superio/smsc/sch555x/sch555x.h>
+ #include <southbridge/intel/lynxpoint/pch.h>
+-
+-static void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val)
+-{
+-	// Clear EC-to-Host mailbox
+-	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
+-	outb(tmp, SCH555x_EMI_IOBASE + 1);
+-
+-	// Send address and value to the EC
+-	sch555x_emi_write16(0, (addr1 * 2) | 0x101);
+-	sch555x_emi_write32(4, val | (addr2 << 16));
+-
+-	// Wait for acknowledgement message from EC
+-	outb(1, SCH555x_EMI_IOBASE);
+-	size_t timeout = 0;
+-	do {} while (++timeout < 0xfff && (inb(SCH555x_EMI_IOBASE + 1) & 1) == 0);
+-}
++#include "sch5555_ec.h"
+ 
+ struct ec_init_entry {
+ 	uint16_t addr;
+ 	uint8_t val;
+ };
+ 
+-static void ec_init(void)
++static void bootblock_ec_init(void)
+ {
+ 	/*
+ 	 * Tables from CORE_PEI
+@@ -108,9 +93,9 @@ void mainboard_config_superio(void)
+ 	outb(0x01, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_UNK1);
+ 	outb(0x0f, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_LED);
+ 
+-	// Magic EC init
+-	ec_init();
++	// Perform bootblock EC initialization
++	bootblock_ec_init();
+ 
+-	// Magic EC init is needed for UART1 initialization to work
++	// Bootblock EC initialization is required for UART1 to work
+ 	sch555x_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+ }
+diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
+index a0acd7b6bb..9e02534c16 100644
+--- a/src/mainboard/dell/optiplex_9020/cmos.default
++++ b/src/mainboard/dell/optiplex_9020/cmos.default
+@@ -4,3 +4,4 @@ debug_level=Debug
+ nmi=Disable
+ power_on_after_fail=Disable
+ iommu=Disable
++fan_full_speed=Disable
+diff --git a/src/mainboard/dell/optiplex_9020/cmos.layout b/src/mainboard/dell/optiplex_9020/cmos.layout
+index 72ff9c4bee..4a1496a878 100644
+--- a/src/mainboard/dell/optiplex_9020/cmos.layout
++++ b/src/mainboard/dell/optiplex_9020/cmos.layout
+@@ -22,7 +22,10 @@ entries
+ 409	2	e	5	power_on_after_fail
+ 
+ # turn iommu on or off
+-412	1	e	6	iommu
++411	1	e	6	iommu
++
++# coreboot config options: EC
++412	1	e	1	fan_full_speed
+ 
+ # coreboot config options: check sums
+ 984	16	h	0	check_sum
+diff --git a/src/mainboard/dell/optiplex_9020/mainboard.c b/src/mainboard/dell/optiplex_9020/mainboard.c
+index c834fea5d3..10b8aaca0e 100644
+--- a/src/mainboard/dell/optiplex_9020/mainboard.c
++++ b/src/mainboard/dell/optiplex_9020/mainboard.c
+@@ -1,7 +1,12 @@
+ /* SPDX-License-Identifier: GPL-2.0-only */
+ 
++#include <bootstate.h>
++#include <cpu/x86/msr.h>
+ #include <device/device.h>
+ #include <drivers/intel/gma/int15.h>
++#include <option.h>
++#include <southbridge/intel/lynxpoint/lp_gpio.h>
++#include "sch5555_ec.h"
+ 
+ static void mainboard_enable(struct device *dev)
+ {
+@@ -13,3 +18,380 @@ static void mainboard_enable(struct device *dev)
+ struct chip_operations mainboard_ops = {
+ 	.enable_dev = mainboard_enable,
+ };
++
++#define HWM_TAB_ADD_TEMP_TARGET 1
++#define HWM_TAB_PKG_POWER_ANY	0xffff
++
++struct hwm_tab_entry {
++	uint16_t addr;
++	uint8_t val;
++	uint8_t flags;
++	uint16_t pkg_power;
++};
++
++struct hwm_tab_entry HWM_TAB3[] = {
++	{ 0x005, 0x33, 0, 0xffff },
++	{ 0x018, 0x2f, 0, 0xffff },
++	{ 0x019, 0x2f, 0, 0xffff },
++	{ 0x01a, 0x2f, 0, 0xffff },
++	{ 0x080, 0x00, 0, 0xffff },
++	{ 0x081, 0x00, 0, 0xffff },
++	{ 0x083, 0xbb, 0, 0xffff },
++	{ 0x085, 0x8a, 0, 0x0010 },
++	{ 0x086, 0x4c, 0, 0x0010 },
++	{ 0x08a, 0x66, 0, 0x0010 },
++	{ 0x08b, 0x5b, 0, 0x0010 },
++	{ 0x090, 0x65, 0, 0xffff },
++	{ 0x091, 0x70, 0, 0xffff },
++	{ 0x092, 0x86, 0, 0xffff },
++	{ 0x096, 0xa4, 0, 0xffff },
++	{ 0x097, 0xa4, 0, 0xffff },
++	{ 0x098, 0xa4, 0, 0xffff },
++	{ 0x09b, 0xa4, 0, 0xffff },
++	{ 0x0a0, 0x0e, 0, 0xffff },
++	{ 0x0a1, 0x0e, 0, 0xffff },
++	{ 0x0ae, 0x7c, 0, 0xffff },
++	{ 0x0af, 0x86, 0, 0xffff },
++	{ 0x0b0, 0x9a, 0, 0xffff },
++	{ 0x0b3, 0x9a, 0, 0xffff },
++	{ 0x0b6, 0x08, 0, 0xffff },
++	{ 0x0b7, 0x08, 0, 0xffff },
++	{ 0x0ea, 0x64, 0, 0x0020 },
++	{ 0x0ea, 0x5c, 0, 0x0010 },
++	{ 0x0ef, 0xff, 0, 0xffff },
++	{ 0x0f8, 0x15, 0, 0xffff },
++	{ 0x0f9, 0x00, 0, 0xffff },
++	{ 0x0f0, 0x30, 0, 0xffff },
++	{ 0x0fd, 0x01, 0, 0xffff },
++	{ 0x1a1, 0x00, 0, 0xffff },
++	{ 0x1a2, 0x00, 0, 0xffff },
++	{ 0x1b1, 0x08, 0, 0xffff },
++	{ 0x1be, 0x99, 0, 0xffff },
++	{ 0x280, 0xa0, 0, 0x0010 },
++	{ 0x281, 0x0f, 0, 0x0010 },
++	{ 0x282, 0x03, 0, 0xffff },
++	{ 0x283, 0x0a, 0, 0xffff },
++	{ 0x284, 0x80, 0, 0xffff },
++	{ 0x285, 0x03, 0, 0xffff },
++	{ 0x288, 0x68, 0, 0x0010 },
++	{ 0x289, 0x10, 0, 0x0010 },
++	{ 0x28a, 0x03, 0, 0xffff },
++	{ 0x28b, 0x0a, 0, 0xffff },
++	{ 0x28c, 0x80, 0, 0xffff },
++	{ 0x28d, 0x03, 0, 0xffff },
++};
++
++struct hwm_tab_entry HWM_TAB4[] = {
++	{ 0x005, 0x33, 0, 0xffff },
++	{ 0x018, 0x2f, 0, 0xffff },
++	{ 0x019, 0x2f, 0, 0xffff },
++	{ 0x01a, 0x2f, 0, 0xffff },
++	{ 0x080, 0x00, 0, 0xffff },
++	{ 0x081, 0x00, 0, 0xffff },
++	{ 0x083, 0xbb, 0, 0xffff },
++	{ 0x085, 0x99, 0, 0x0020 },
++	{ 0x085, 0xad, 0, 0x0010 },
++	{ 0x086, 0x1c, 0, 0xffff },
++	{ 0x08a, 0x39, 0, 0x0020 },
++	{ 0x08a, 0x41, 0, 0x0010 },
++	{ 0x08b, 0x76, 0, 0x0020 },
++	{ 0x08b, 0x8b, 0, 0x0010 },
++	{ 0x090, 0x5e, 0, 0xffff },
++	{ 0x091, 0x5e, 0, 0xffff },
++	{ 0x092, 0x86, 0, 0xffff },
++	{ 0x096, 0xa4, 0, 0xffff },
++	{ 0x097, 0xa4, 0, 0xffff },
++	{ 0x098, 0xa4, 0, 0xffff },
++	{ 0x09b, 0xa4, 0, 0xffff },
++	{ 0x0a0, 0x0a, 0, 0xffff },
++	{ 0x0a1, 0x0a, 0, 0xffff },
++	{ 0x0ae, 0x7c, 0, 0xffff },
++	{ 0x0af, 0x7c, 0, 0xffff },
++	{ 0x0b0, 0x9a, 0, 0xffff },
++	{ 0x0b3, 0x7c, 0, 0xffff },
++	{ 0x0b6, 0x08, 0, 0xffff },
++	{ 0x0b7, 0x08, 0, 0xffff },
++	{ 0x0ea, 0x64, 0, 0x0020 },
++	{ 0x0ea, 0x5c, 0, 0x0010 },
++	{ 0x0ef, 0xff, 0, 0xffff },
++	{ 0x0f8, 0x15, 0, 0xffff },
++	{ 0x0f9, 0x00, 0, 0xffff },
++	{ 0x0f0, 0x30, 0, 0xffff },
++	{ 0x0fd, 0x01, 0, 0xffff },
++	{ 0x1a1, 0x00, 0, 0xffff },
++	{ 0x1a2, 0x00, 0, 0xffff },
++	{ 0x1b1, 0x08, 0, 0xffff },
++	{ 0x1be, 0x90, 0, 0xffff },
++	{ 0x280, 0x94, 0, 0x0020 },
++	{ 0x281, 0x11, 0, 0x0020 },
++	{ 0x280, 0x94, 0, 0x0010 },
++	{ 0x281, 0x11, 0, 0x0010 },
++	{ 0x282, 0x03, 0, 0xffff },
++	{ 0x283, 0x0a, 0, 0xffff },
++	{ 0x284, 0x80, 0, 0xffff },
++	{ 0x285, 0x03, 0, 0xffff },
++	{ 0x288, 0x28, 0, 0x0020 },
++	{ 0x289, 0x0a, 0, 0x0020 },
++	{ 0x288, 0x28, 0, 0x0010 },
++	{ 0x289, 0x0a, 0, 0x0010 },
++	{ 0x28a, 0x03, 0, 0xffff },
++	{ 0x28b, 0x0a, 0, 0xffff },
++	{ 0x28c, 0x80, 0, 0xffff },
++	{ 0x28d, 0x03, 0, 0xffff },
++};
++
++struct hwm_tab_entry HWM_TAB5[] = {
++	{ 0x005, 0x33, 0, 0xffff },
++	{ 0x018, 0x2f, 0, 0xffff },
++	{ 0x019, 0x2f, 0, 0xffff },
++	{ 0x01a, 0x2f, 0, 0xffff },
++	{ 0x080, 0x00, 0, 0xffff },
++	{ 0x081, 0x00, 0, 0xffff },
++	{ 0x083, 0xbb, 0, 0xffff },
++	{ 0x085, 0x66, 0, 0x0020 },
++	{ 0x085, 0x5d, 0, 0x0010 },
++	{ 0x086, 0x1c, 0, 0xffff },
++	{ 0x08a, 0x39, 0, 0x0020 },
++	{ 0x08a, 0x41, 0, 0x0010 },
++	{ 0x08b, 0x76, 0, 0x0020 },
++	{ 0x08b, 0x80, 0, 0x0010 },
++	{ 0x090, 0x5d, 0, 0x0020 },
++	{ 0x090, 0x5e, 0, 0x0010 },
++	{ 0x091, 0x5e, 0, 0xffff },
++	{ 0x092, 0x86, 0, 0xffff },
++	{ 0x096, 0xa4, 0, 0xffff },
++	{ 0x097, 0xa4, 0, 0xffff },
++	{ 0x098, 0xa3, 0, 0x0020 },
++	{ 0x098, 0xa4, 0, 0x0010 },
++	{ 0x09b, 0xa4, 0, 0xffff },
++	{ 0x0a0, 0x08, 0, 0xffff },
++	{ 0x0a1, 0x0a, 0, 0xffff },
++	{ 0x0ae, 0x7c, 0, 0xffff },
++	{ 0x0af, 0x7c, 0, 0xffff },
++	{ 0x0b0, 0x9a, 0, 0xffff },
++	{ 0x0b3, 0x7c, 0, 0xffff },
++	{ 0x0b6, 0x08, 0, 0xffff },
++	{ 0x0b7, 0x08, 0, 0xffff },
++	{ 0x0ea, 0x64, 0, 0x0020 },
++	{ 0x0ea, 0x5c, 0, 0x0010 },
++	{ 0x0ef, 0xff, 0, 0xffff },
++	{ 0x0f8, 0x15, 0, 0xffff },
++	{ 0x0f9, 0x00, 0, 0xffff },
++	{ 0x0f0, 0x30, 0, 0xffff },
++	{ 0x0fd, 0x01, 0, 0xffff },
++	{ 0x1a1, 0x00, 0, 0xffff },
++	{ 0x1a2, 0x00, 0, 0xffff },
++	{ 0x1b1, 0x08, 0, 0xffff },
++	{ 0x1be, 0x98, 0, 0x0020 },
++	{ 0x1be, 0x90, 0, 0x0010 },
++	{ 0x280, 0x94, 0, 0x0020 },
++	{ 0x281, 0x11, 0, 0x0020 },
++	{ 0x280, 0x94, 0, 0x0010 },
++	{ 0x281, 0x11, 0, 0x0010 },
++	{ 0x282, 0x03, 0, 0xffff },
++	{ 0x283, 0x0a, 0, 0xffff },
++	{ 0x284, 0x80, 0, 0xffff },
++	{ 0x285, 0x03, 0, 0xffff },
++	{ 0x288, 0x28, 0, 0x0020 },
++	{ 0x289, 0x0a, 0, 0x0020 },
++	{ 0x288, 0x28, 0, 0x0010 },
++	{ 0x289, 0x0a, 0, 0x0010 },
++	{ 0x28a, 0x03, 0, 0xffff },
++	{ 0x28b, 0x0a, 0, 0xffff },
++	{ 0x28c, 0x80, 0, 0xffff },
++	{ 0x28d, 0x03, 0, 0xffff },
++};
++
++struct hwm_tab_entry HWM_TAB6[] = {
++	{ 0x005, 0x33, 0, 0xffff },
++	{ 0x018, 0x2f, 0, 0xffff },
++	{ 0x019, 0x2f, 0, 0xffff },
++	{ 0x01a, 0x2f, 0, 0xffff },
++	{ 0x080, 0x00, 0, 0xffff },
++	{ 0x081, 0x00, 0, 0xffff },
++	{ 0x083, 0xbb, 0, 0xffff },
++	{ 0x085, 0x98, 0, 0xffff },
++	{ 0x086, 0x3c, 0, 0xffff },
++	{ 0x08a, 0x39, 0, 0x0020 },
++	{ 0x08a, 0x3d, 0, 0x0010 },
++	{ 0x08b, 0x44, 0, 0x0020 },
++	{ 0x08b, 0x51, 0, 0x0010 },
++	{ 0x090, 0x61, 0, 0xffff },
++	{ 0x091, 0x6d, 0, 0xffff },
++	{ 0x092, 0x86, 0, 0xffff },
++	{ 0x096, 0xa4, 0, 0xffff },
++	{ 0x097, 0xa4, 0, 0xffff },
++	{ 0x098, 0x9f, 0, 0x0020 },
++	{ 0x098, 0xa4, 0, 0x0010 },
++	{ 0x09b, 0xa4, 0, 0xffff },
++	{ 0x0a0, 0x0e, 0, 0xffff },
++	{ 0x0a1, 0x0e, 0, 0xffff },
++	{ 0x0ae, 0x7c, 0, 0xffff },
++	{ 0x0af, 0x7c, 0, 0xffff },
++	{ 0x0b0, 0x9b, 0, 0x0020 },
++	{ 0x0b0, 0x98, 0, 0x0010 },
++	{ 0x0b3, 0x9a, 0, 0xffff },
++	{ 0x0b6, 0x08, 0, 0xffff },
++	{ 0x0b7, 0x08, 0, 0xffff },
++	{ 0x0ea, 0x64, 0, 0x0020 },
++	{ 0x0ea, 0x5c, 0, 0x0010 },
++	{ 0x0ef, 0xff, 0, 0xffff },
++	{ 0x0f8, 0x15, 0, 0xffff },
++	{ 0x0f9, 0x00, 0, 0xffff },
++	{ 0x0f0, 0x30, 0, 0xffff },
++	{ 0x0fd, 0x01, 0, 0xffff },
++	{ 0x1a1, 0x00, 0, 0xffff },
++	{ 0x1a2, 0x00, 0, 0xffff },
++	{ 0x1b1, 0x08, 0, 0xffff },
++	{ 0x1be, 0x9a, 0, 0x0020 },
++	{ 0x1be, 0x96, 0, 0x0010 },
++	{ 0x280, 0x94, 0, 0x0020 },
++	{ 0x281, 0x11, 0, 0x0020 },
++	{ 0x280, 0x94, 0, 0x0010 },
++	{ 0x281, 0x11, 0, 0x0010 },
++	{ 0x282, 0x03, 0, 0xffff },
++	{ 0x283, 0x0a, 0, 0xffff },
++	{ 0x284, 0x80, 0, 0xffff },
++	{ 0x285, 0x03, 0, 0xffff },
++	{ 0x288, 0x94, 0, 0x0020 },
++	{ 0x289, 0x11, 0, 0x0020 },
++	{ 0x288, 0x94, 0, 0x0010 },
++	{ 0x289, 0x11, 0, 0x0010 },
++	{ 0x28a, 0x03, 0, 0xffff },
++	{ 0x28b, 0x0a, 0, 0xffff },
++	{ 0x28c, 0x80, 0, 0xffff },
++	{ 0x28d, 0x03, 0, 0xffff },
++};
++
++static uint8_t get_chassis_type(void)
++{
++	uint8_t gpio_chassis_type;
++
++	// Read chassis type from GPIO
++	gpio_chassis_type = get_gpio(70) << 3 | get_gpio(38) << 2 |
++			    get_gpio(17) << 1 | get_gpio(0);
++
++	printk(BIOS_DEBUG, "GPIO chassis type = %#x\n", gpio_chassis_type);
++
++	// Turn it into internal chassis index
++	switch (gpio_chassis_type) {
++	case 0x08:
++	case 0x0a:
++		return 4;
++	case 0x0b:
++		return 3;
++	case 0x0c:
++		return 5;
++	case 0x0d: // SFF
++	case 0x0e:
++	case 0x0f:
++		return 6;
++	default:
++		die("Unknown GPIO chassis type\n");
++	}
++
++}
++
++static uint8_t get_temp_target(void)
++{
++	uint8_t val = rdmsr(0x1a2).lo >> 8 & 0xff;
++	if (!val)
++		val = 20;
++	return 0x95 - val;
++}
++
++static uint16_t get_pkg_power(void)
++{
++	uint8_t rapl_power_unit = rdmsr(0x606).lo & 0xf;
++	if (rapl_power_unit)
++		rapl_power_unit = 2 << (rapl_power_unit - 1);
++	uint16_t pkg_power_info = rdmsr(0x614).lo & 0x7fff;
++	if (pkg_power_info / rapl_power_unit > 0x41)
++		return 32;
++	else
++		return 16;
++}
++
++static void apply_hwm_tab(struct hwm_tab_entry *arr, size_t size)
++{
++	uint8_t temp_target = get_temp_target();
++	uint16_t pkg_power = get_pkg_power();
++
++	printk(BIOS_DEBUG, "Temp target = %#x\n", temp_target);
++	printk(BIOS_DEBUG, "Package power = %#x\n", pkg_power);
++
++	for (size_t i = 0; i < size; ++i) {
++		// Skip entry if it doesn't apply for this package power
++		if (arr[i].pkg_power != pkg_power &&
++		    arr[i].pkg_power != HWM_TAB_PKG_POWER_ANY)
++			continue;
++
++		uint8_t val = arr[i].val;
++
++		// Add temp target to value if requested (current tables never do)
++		if (arr[i].flags & HWM_TAB_ADD_TEMP_TARGET)
++			val += temp_target;
++
++		// Perform write
++		ec_write(1, arr[i].addr, val);
++
++	}
++}
++
++static void sch5555_ec_hwm_init(void *arg)
++{
++	uint8_t chassis_type, saved_2fc;
++
++	printk(BIOS_DEBUG, "OptiPlex 9020 late HWM init\n");
++
++	saved_2fc = ec_read(1, 0x2fc);
++	ec_write(1, 0x2fc, 0xa0);
++	ec_write(1, 0x2fd, 0x32);
++
++	// Apply HWM table based on chassis type
++	chassis_type = get_chassis_type();
++	printk(BIOS_DEBUG, "Chassis type = %#x\n", chassis_type);
++	switch (chassis_type) {
++	case 3:
++		apply_hwm_tab(HWM_TAB3, ARRAY_SIZE(HWM_TAB3));
++		break;
++	case 4:
++		apply_hwm_tab(HWM_TAB4, ARRAY_SIZE(HWM_TAB4));
++		break;
++	case 5:
++		apply_hwm_tab(HWM_TAB5, ARRAY_SIZE(HWM_TAB5));
++		break;
++	case 6:
++		apply_hwm_tab(HWM_TAB6, ARRAY_SIZE(HWM_TAB6));
++		break;
++	default:
++		die("Unknown chassis type\n");
++	}
++
++	if (CONFIG_MAX_CPUS > 2) {
++		ec_write(1, 0x9e, 0x30);
++		ec_write(1, 0xeb, ec_read(1, 0xea));
++	}
++
++	ec_write(1, 0x2fc, saved_2fc);
++
++	// Apply full speed fan config if requested
++	if (get_uint_option("fan_full_speed", 0)) {
++		printk(BIOS_DEBUG, "Setting full fan speed\n");
++		ec_write(1, 0x80, 0x60 | ec_read(1, 0x80));
++		ec_write(1, 0x81, 0x60 | ec_read(1, 0x81));
++	}
++
++	ec_read(1, 0xb8);
++
++	if ((chassis_type == 4 || chassis_type == 5) && ec_read(1, 0x26) == 0) {
++		ec_write(1, 0xa0, ec_read(1, 0xa0) & 0xfb);
++		ec_write(1, 0xa1, ec_read(1, 0xa1) & 0xfb);
++		ec_write(1, 0xa2, ec_read(1, 0xa2) & 0xfb);
++		ec_write(1, 0x8a, 0x99);
++		ec_write(1, 0x8b, 0x47);
++		ec_write(1, 0x8c, 0x91);
++	}
++}
++
++BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL);
+diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.c b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
+new file mode 100644
+index 0000000000..92244da9ab
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
+@@ -0,0 +1,54 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <arch/io.h>
++#include <device/pnp_ops.h>
++#include <superio/smsc/sch555x/sch555x.h>
++#include "sch5555_ec.h"
++
++uint8_t ec_read(uint8_t addr1, uint16_t addr2)
++{
++	// clear ec-to-host mailbox
++	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
++	outb(tmp, SCH555x_EMI_IOBASE + 1);
++
++	// send address
++	outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
++	outw((addr1 * 2) | 0x100, SCH555x_EMI_IOBASE + 4);
++
++	outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
++	outl(addr2 << 16, SCH555x_EMI_IOBASE + 4);
++
++	// send message to ec
++	outb(1, SCH555x_EMI_IOBASE);
++
++	// wait for ack
++	for (size_t timeout = 0; timeout < 0xfff; ++timeout)
++		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
++			break;
++
++	// read result
++	outw(4 | 0x8000, SCH555x_EMI_IOBASE + 2);
++	return inb(SCH555x_EMI_IOBASE + 4);
++}
++
++void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val)
++{
++	// clear ec-to-host mailbox
++	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
++	outb(tmp, SCH555x_EMI_IOBASE + 1);
++
++	// send address and value
++	outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
++	outw((addr1 * 2) | 0x101, SCH555x_EMI_IOBASE + 4);
++
++	outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
++	outl(val | (addr2 << 16), SCH555x_EMI_IOBASE + 4);
++
++	// send message to ec
++	outb(1, SCH555x_EMI_IOBASE);
++
++	// wait for ack
++	for (size_t timeout = 0; timeout < 0xfff; ++timeout)
++		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
++			break;
++}
+diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.h b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
+new file mode 100644
+index 0000000000..6e703ff865
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
+@@ -0,0 +1,7 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#pragma once
++
++uint8_t ec_read(uint8_t addr1, uint16_t addr2);
++
++void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val);
+-- 
+2.39.2
+
diff --git a/config/coreboot/haswell/patches/0024-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch b/config/coreboot/haswell/patches/0024-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
new file mode 100644
index 00000000..fb112f8c
--- /dev/null
+++ b/config/coreboot/haswell/patches/0024-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
@@ -0,0 +1,51 @@
+From ae494dc1b1dde92ec42390b85ced0ffe816f5110 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sat, 6 Apr 2024 01:22:47 +0100
+Subject: [PATCH 4/4] nb/haswell: Fully disable iGPU when dGPU is used
+
+My earlier patch disabled decode *and* disabled the iGPU itself, but
+a subsequent revision disabled only VGA decode. Upon revisiting, I
+found that, actually, yes, you also need to disable the iGPU entirely.
+
+Tested on Dell 9020 SFF using broadwell MRC, with both iGPU and dGPU.
+With this patch, the iGPU is completely disabled when you install a
+graphics card, but the iGPU is available to use when no graphics card
+is present.
+
+For more context, see:
+
+Author: Leah Rowe <info@minifree.org>
+Date:   Fri Feb 23 13:33:31 2024 +0000
+
+    nb/haswell: Disable iGPU when dGPU is used
+
+And look at the Gerrit comments:
+
+https://review.coreboot.org/c/coreboot/+/80717/
+
+So, my original submission on change 80717 was actually correct.
+This patch fixes the issue. I tested on iGPU and dGPU, with both
+broadwell and haswell mrc.bin.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/northbridge/intel/haswell/gma.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
+index 9e9f9804f5..526a51aff0 100644
+--- a/src/northbridge/intel/haswell/gma.c
++++ b/src/northbridge/intel/haswell/gma.c
+@@ -464,6 +464,9 @@ static void gma_func0_disable(struct device *dev)
+ {
+ 	/* Disable VGA decode */
+ 	pci_or_config16(pcidev_on_root(0, 0), GGC, 1 << 1);
++
++	/* Required or else the graphics card doesn't work */
++	dev->enabled = 0;
+ }
+ 
+ static struct device_operations gma_func0_ops = {
+-- 
+2.39.2
+
diff --git a/config/vendor/sources b/config/vendor/sources
index 2d54bd44..2653c877 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -35,7 +35,7 @@
 
 # NOTE: google's manifest for archives containing mrc.bin, used here:
 # https://web.archive.org/web/20210211071412/https://dl.google.com/dl/edgedl/chromeos/recovery/recovery.conf
-{t440pmrc w541mrc t440plibremrc w541 dell9020mt dell9020sff}{
+{t440pmrc w541mrc t440plibremrc w541 dell9020mt dell9020sff dell9020sff-nri dell9020mt-nri}{
 	DL_hash f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998
 	DL_url https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
 	DL_url_bkup https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe

From c557e9e0e10c7661f40c5fd47c8e3b514e1f6562 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Apr 2024 01:52:29 +0100
Subject: [PATCH 0248/1549] haswell nri: set 8MB CBFS on thinkpads (fix S3)

hell added a patch fixing S3 on haswell NRI, but it seems
you still need to set 8MB CBFS size as with the MRC

tested on a t440p. S3 now works on haswell NRI.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb | 2 +-
 config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode    | 2 +-
 config/coreboot/w541_12mb/config/libgfxinit_corebootfb          | 2 +-
 config/coreboot/w541_12mb/config/libgfxinit_txtmode             | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
index 58daa6a1..dd614202 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
@@ -114,7 +114,7 @@ CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0xBE0000
+CONFIG_CBFS_SIZE=0x800000
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=8
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
index 89a4925b..a0dce901 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
@@ -114,7 +114,7 @@ CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0xBE0000
+CONFIG_CBFS_SIZE=0x800000
 CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
index 15e93305..c9a45666 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
@@ -114,7 +114,7 @@ CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0xBE0000
+CONFIG_CBFS_SIZE=0x800000
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=8
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_txtmode b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
index 2c0dddb9..e5b2e1f8 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
@@ -114,7 +114,7 @@ CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0xBE0000
+CONFIG_CBFS_SIZE=0x800000
 CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y

From 523f1df9bf0fbb13ca8124bf0cf692700bbb94da Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Apr 2024 03:16:43 +0100
Subject: [PATCH 0249/1549] w541 libremrc: disable tseg stage cache

a hangover from earlier days, but i still disable it. i forgot
to do so on this config, when updating the nri code. do it now.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/w541_12mb/config/libgfxinit_corebootfb | 4 ++--
 config/coreboot/w541_12mb/config/libgfxinit_txtmode    | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
index c9a45666..ae155585 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
@@ -33,8 +33,8 @@ CONFIG_USE_BLOBS=y
 CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_txtmode b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
index e5b2e1f8..9a891434 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
@@ -33,8 +33,8 @@ CONFIG_USE_BLOBS=y
 CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
 CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 # CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
 # CONFIG_FW_CONFIG is not set

From f5035e327a3a2b7ac1550dd0882b66c8834fe1d8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Apr 2024 21:55:57 +0100
Subject: [PATCH 0250/1549] 9020 sff/mt: fix bad gpio read on hwm patch

sff happened to work, but mt would not boot with the patch,
because it called die() on unknown chassis type, and the gpio
happened to have a bad value in the old patch, because it wasn't
reading the right gpio.

i tested the fix on the old patch, but then decided to use
mate's new patch because instead of calling die(), it simply
boots with fan control disabled (max fan speed in that case),
if this happens again.

mt and sff have both been tested with this new version of the
patch. both of them boot, and they both have proper fan control.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ..._9020-Implement-late-HWM-initializat.patch | 64 ++++++++++--------
 ..._9020-Implement-late-HWM-initializat.patch | 66 +++++++++++--------
 2 files changed, 73 insertions(+), 57 deletions(-)

diff --git a/config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch b/config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
index f6bd1940..37353e20 100644
--- a/config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
+++ b/config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
@@ -1,13 +1,13 @@
-From f6340f3fe21e948ba94d0429467882c2fb90b77e Mon Sep 17 00:00:00 2001
+From c58e0fea2a4e591e5ecd8a1f376c3b3af0fbb306 Mon Sep 17 00:00:00 2001
 From: Mate Kukri <kukri.mate@gmail.com>
-Date: Sat, 6 Apr 2024 23:25:15 +0100
+Date: Thu, 18 Apr 2024 20:28:45 +0100
 Subject: [PATCH 1/1] mb/dell/optiplex_9020: Implement late HWM initialization
 
 There are 4 different chassis types specified by vendor firmware, each
 with a slightly different HWM configuration.
 
 The chassis type to use is determined at runtime by reading a set of
-4 PCH GPIOs: 70, 38, 17, and 0.
+4 PCH GPIOs: 70, 38, 17, and 1.
 
 Additionally vendor firmware also provides an option to run the fans at
 full speed. This is substituted with a coreboot nvram option in this
@@ -26,10 +26,10 @@ Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
  src/mainboard/dell/optiplex_9020/bootblock.c  |  25 +-
  src/mainboard/dell/optiplex_9020/cmos.default |   1 +
  src/mainboard/dell/optiplex_9020/cmos.layout  |   5 +-
- src/mainboard/dell/optiplex_9020/mainboard.c  | 382 ++++++++++++++++++
+ src/mainboard/dell/optiplex_9020/mainboard.c  | 387 ++++++++++++++++++
  src/mainboard/dell/optiplex_9020/sch5555_ec.c |  54 +++
- src/mainboard/dell/optiplex_9020/sch5555_ec.h |   7 +
- 7 files changed, 455 insertions(+), 22 deletions(-)
+ src/mainboard/dell/optiplex_9020/sch5555_ec.h |  10 +
+ 7 files changed, 463 insertions(+), 22 deletions(-)
  create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.c
  create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.h
 
@@ -119,7 +119,7 @@ index 72ff9c4bee..4a1496a878 100644
  # coreboot config options: check sums
  984	16	h	0	check_sum
 diff --git a/src/mainboard/dell/optiplex_9020/mainboard.c b/src/mainboard/dell/optiplex_9020/mainboard.c
-index c834fea5d3..10b8aaca0e 100644
+index c834fea5d3..0b7829c736 100644
 --- a/src/mainboard/dell/optiplex_9020/mainboard.c
 +++ b/src/mainboard/dell/optiplex_9020/mainboard.c
 @@ -1,7 +1,12 @@
@@ -130,18 +130,19 @@ index c834fea5d3..10b8aaca0e 100644
  #include <device/device.h>
  #include <drivers/intel/gma/int15.h>
 +#include <option.h>
-+#include <southbridge/intel/lynxpoint/lp_gpio.h>
++#include <southbridge/intel/common/gpio.h>
 +#include "sch5555_ec.h"
  
  static void mainboard_enable(struct device *dev)
  {
-@@ -13,3 +18,380 @@ static void mainboard_enable(struct device *dev)
+@@ -13,3 +18,385 @@ static void mainboard_enable(struct device *dev)
  struct chip_operations mainboard_ops = {
  	.enable_dev = mainboard_enable,
  };
 +
-+#define HWM_TAB_ADD_TEMP_TARGET 1
++#define HWM_TAB_ADD_TEMP_TARGET	1
 +#define HWM_TAB_PKG_POWER_ANY	0xffff
++#define CHASSIS_TYPE_UNKNOWN	0xff
 +
 +struct hwm_tab_entry {
 +	uint16_t addr;
@@ -390,7 +391,7 @@ index c834fea5d3..10b8aaca0e 100644
 +
 +	// Read chassis type from GPIO
 +	gpio_chassis_type = get_gpio(70) << 3 | get_gpio(38) << 2 |
-+			    get_gpio(17) << 1 | get_gpio(0);
++			    get_gpio(17) << 1 | get_gpio(1);
 +
 +	printk(BIOS_DEBUG, "GPIO chassis type = %#x\n", gpio_chassis_type);
 +
@@ -408,7 +409,7 @@ index c834fea5d3..10b8aaca0e 100644
 +	case 0x0f:
 +		return 6;
 +	default:
-+		die("Unknown GPIO chassis type\n");
++		return CHASSIS_TYPE_UNKNOWN;
 +	}
 +
 +}
@@ -469,9 +470,15 @@ index c834fea5d3..10b8aaca0e 100644
 +	ec_write(1, 0x2fc, 0xa0);
 +	ec_write(1, 0x2fd, 0x32);
 +
-+	// Apply HWM table based on chassis type
 +	chassis_type = get_chassis_type();
-+	printk(BIOS_DEBUG, "Chassis type = %#x\n", chassis_type);
++
++	if (chassis_type != CHASSIS_TYPE_UNKNOWN) {
++		printk(BIOS_DEBUG, "Chassis type = %#x\n", chassis_type);
++	} else {
++		printk(BIOS_DEBUG, "WARNING: Unknown chassis type\n");
++	}
++
++	// Apply HWM table based on chassis type
 +	switch (chassis_type) {
 +	case 3:
 +		apply_hwm_tab(HWM_TAB3, ARRAY_SIZE(HWM_TAB3));
@@ -485,19 +492,17 @@ index c834fea5d3..10b8aaca0e 100644
 +	case 6:
 +		apply_hwm_tab(HWM_TAB6, ARRAY_SIZE(HWM_TAB6));
 +		break;
-+	default:
-+		die("Unknown chassis type\n");
 +	}
 +
-+	if (CONFIG_MAX_CPUS > 2) {
-+		ec_write(1, 0x9e, 0x30);
-+		ec_write(1, 0xeb, ec_read(1, 0xea));
-+	}
++	// NOTE: vendor firmware applies these when "max core address" > 2
++	// i think this is always the case
++	ec_write(1, 0x9e, 0x30);
++	ec_write(1, 0xeb, ec_read(1, 0xea));
 +
 +	ec_write(1, 0x2fc, saved_2fc);
 +
-+	// Apply full speed fan config if requested
-+	if (get_uint_option("fan_full_speed", 0)) {
++	// Apply full speed fan config if requested or if the chassis type is unknown
++	if (chassis_type == CHASSIS_TYPE_UNKNOWN || get_uint_option("fan_full_speed", 0)) {
 +		printk(BIOS_DEBUG, "Setting full fan speed\n");
 +		ec_write(1, 0x80, 0x60 | ec_read(1, 0x80));
 +		ec_write(1, 0x81, 0x60 | ec_read(1, 0x81));
@@ -518,7 +523,7 @@ index c834fea5d3..10b8aaca0e 100644
 +BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL);
 diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.c b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
 new file mode 100644
-index 0000000000..92244da9ab
+index 0000000000..a1067ac063
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
 @@ -0,0 +1,54 @@
@@ -546,7 +551,7 @@ index 0000000000..92244da9ab
 +	outb(1, SCH555x_EMI_IOBASE);
 +
 +	// wait for ack
-+	for (size_t timeout = 0; timeout < 0xfff; ++timeout)
++	for (size_t retry = 0; retry < 0xfff; ++retry)
 +		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
 +			break;
 +
@@ -572,23 +577,26 @@ index 0000000000..92244da9ab
 +	outb(1, SCH555x_EMI_IOBASE);
 +
 +	// wait for ack
-+	for (size_t timeout = 0; timeout < 0xfff; ++timeout)
++	for (size_t retry = 0; retry < 0xfff; ++retry)
 +		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
 +			break;
 +}
 diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.h b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
 new file mode 100644
-index 0000000000..6e703ff865
+index 0000000000..7e399e8e74
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
-@@ -0,0 +1,7 @@
+@@ -0,0 +1,10 @@
 +/* SPDX-License-Identifier: GPL-2.0-only */
 +
-+#pragma once
++#ifndef __SCH5555_EC_H__
++#define __SCH5555_EC_H__
 +
 +uint8_t ec_read(uint8_t addr1, uint16_t addr2);
 +
 +void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val);
++
++#endif
 -- 
 2.39.2
 
diff --git a/config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch b/config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
index 527c18d3..e2db6a17 100644
--- a/config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
+++ b/config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
@@ -1,13 +1,13 @@
-From 08bae51a77c2c92fefef79e9c9b6ff963b3812cc Mon Sep 17 00:00:00 2001
+From 05cc767d1398f91533e87db5ceaa0aabb7918425 Mon Sep 17 00:00:00 2001
 From: Mate Kukri <kukri.mate@gmail.com>
-Date: Sat, 6 Apr 2024 23:25:15 +0100
-Subject: [PATCH 3/4] mb/dell/optiplex_9020: Implement late HWM initialization
+Date: Thu, 18 Apr 2024 20:28:45 +0100
+Subject: [PATCH 1/1] mb/dell/optiplex_9020: Implement late HWM initialization
 
 There are 4 different chassis types specified by vendor firmware, each
 with a slightly different HWM configuration.
 
 The chassis type to use is determined at runtime by reading a set of
-4 PCH GPIOs: 70, 38, 17, and 0.
+4 PCH GPIOs: 70, 38, 17, and 1.
 
 Additionally vendor firmware also provides an option to run the fans at
 full speed. This is substituted with a coreboot nvram option in this
@@ -26,10 +26,10 @@ Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
  src/mainboard/dell/optiplex_9020/bootblock.c  |  25 +-
  src/mainboard/dell/optiplex_9020/cmos.default |   1 +
  src/mainboard/dell/optiplex_9020/cmos.layout  |   5 +-
- src/mainboard/dell/optiplex_9020/mainboard.c  | 382 ++++++++++++++++++
+ src/mainboard/dell/optiplex_9020/mainboard.c  | 387 ++++++++++++++++++
  src/mainboard/dell/optiplex_9020/sch5555_ec.c |  54 +++
- src/mainboard/dell/optiplex_9020/sch5555_ec.h |   7 +
- 7 files changed, 455 insertions(+), 22 deletions(-)
+ src/mainboard/dell/optiplex_9020/sch5555_ec.h |  10 +
+ 7 files changed, 463 insertions(+), 22 deletions(-)
  create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.c
  create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.h
 
@@ -119,7 +119,7 @@ index 72ff9c4bee..4a1496a878 100644
  # coreboot config options: check sums
  984	16	h	0	check_sum
 diff --git a/src/mainboard/dell/optiplex_9020/mainboard.c b/src/mainboard/dell/optiplex_9020/mainboard.c
-index c834fea5d3..10b8aaca0e 100644
+index c834fea5d3..0b7829c736 100644
 --- a/src/mainboard/dell/optiplex_9020/mainboard.c
 +++ b/src/mainboard/dell/optiplex_9020/mainboard.c
 @@ -1,7 +1,12 @@
@@ -130,18 +130,19 @@ index c834fea5d3..10b8aaca0e 100644
  #include <device/device.h>
  #include <drivers/intel/gma/int15.h>
 +#include <option.h>
-+#include <southbridge/intel/lynxpoint/lp_gpio.h>
++#include <southbridge/intel/common/gpio.h>
 +#include "sch5555_ec.h"
  
  static void mainboard_enable(struct device *dev)
  {
-@@ -13,3 +18,380 @@ static void mainboard_enable(struct device *dev)
+@@ -13,3 +18,385 @@ static void mainboard_enable(struct device *dev)
  struct chip_operations mainboard_ops = {
  	.enable_dev = mainboard_enable,
  };
 +
-+#define HWM_TAB_ADD_TEMP_TARGET 1
++#define HWM_TAB_ADD_TEMP_TARGET	1
 +#define HWM_TAB_PKG_POWER_ANY	0xffff
++#define CHASSIS_TYPE_UNKNOWN	0xff
 +
 +struct hwm_tab_entry {
 +	uint16_t addr;
@@ -390,7 +391,7 @@ index c834fea5d3..10b8aaca0e 100644
 +
 +	// Read chassis type from GPIO
 +	gpio_chassis_type = get_gpio(70) << 3 | get_gpio(38) << 2 |
-+			    get_gpio(17) << 1 | get_gpio(0);
++			    get_gpio(17) << 1 | get_gpio(1);
 +
 +	printk(BIOS_DEBUG, "GPIO chassis type = %#x\n", gpio_chassis_type);
 +
@@ -408,7 +409,7 @@ index c834fea5d3..10b8aaca0e 100644
 +	case 0x0f:
 +		return 6;
 +	default:
-+		die("Unknown GPIO chassis type\n");
++		return CHASSIS_TYPE_UNKNOWN;
 +	}
 +
 +}
@@ -469,9 +470,15 @@ index c834fea5d3..10b8aaca0e 100644
 +	ec_write(1, 0x2fc, 0xa0);
 +	ec_write(1, 0x2fd, 0x32);
 +
-+	// Apply HWM table based on chassis type
 +	chassis_type = get_chassis_type();
-+	printk(BIOS_DEBUG, "Chassis type = %#x\n", chassis_type);
++
++	if (chassis_type != CHASSIS_TYPE_UNKNOWN) {
++		printk(BIOS_DEBUG, "Chassis type = %#x\n", chassis_type);
++	} else {
++		printk(BIOS_DEBUG, "WARNING: Unknown chassis type\n");
++	}
++
++	// Apply HWM table based on chassis type
 +	switch (chassis_type) {
 +	case 3:
 +		apply_hwm_tab(HWM_TAB3, ARRAY_SIZE(HWM_TAB3));
@@ -485,19 +492,17 @@ index c834fea5d3..10b8aaca0e 100644
 +	case 6:
 +		apply_hwm_tab(HWM_TAB6, ARRAY_SIZE(HWM_TAB6));
 +		break;
-+	default:
-+		die("Unknown chassis type\n");
 +	}
 +
-+	if (CONFIG_MAX_CPUS > 2) {
-+		ec_write(1, 0x9e, 0x30);
-+		ec_write(1, 0xeb, ec_read(1, 0xea));
-+	}
++	// NOTE: vendor firmware applies these when "max core address" > 2
++	// i think this is always the case
++	ec_write(1, 0x9e, 0x30);
++	ec_write(1, 0xeb, ec_read(1, 0xea));
 +
 +	ec_write(1, 0x2fc, saved_2fc);
 +
-+	// Apply full speed fan config if requested
-+	if (get_uint_option("fan_full_speed", 0)) {
++	// Apply full speed fan config if requested or if the chassis type is unknown
++	if (chassis_type == CHASSIS_TYPE_UNKNOWN || get_uint_option("fan_full_speed", 0)) {
 +		printk(BIOS_DEBUG, "Setting full fan speed\n");
 +		ec_write(1, 0x80, 0x60 | ec_read(1, 0x80));
 +		ec_write(1, 0x81, 0x60 | ec_read(1, 0x81));
@@ -518,7 +523,7 @@ index c834fea5d3..10b8aaca0e 100644
 +BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL);
 diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.c b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
 new file mode 100644
-index 0000000000..92244da9ab
+index 0000000000..a1067ac063
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
 @@ -0,0 +1,54 @@
@@ -546,7 +551,7 @@ index 0000000000..92244da9ab
 +	outb(1, SCH555x_EMI_IOBASE);
 +
 +	// wait for ack
-+	for (size_t timeout = 0; timeout < 0xfff; ++timeout)
++	for (size_t retry = 0; retry < 0xfff; ++retry)
 +		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
 +			break;
 +
@@ -572,23 +577,26 @@ index 0000000000..92244da9ab
 +	outb(1, SCH555x_EMI_IOBASE);
 +
 +	// wait for ack
-+	for (size_t timeout = 0; timeout < 0xfff; ++timeout)
++	for (size_t retry = 0; retry < 0xfff; ++retry)
 +		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
 +			break;
 +}
 diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.h b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
 new file mode 100644
-index 0000000000..6e703ff865
+index 0000000000..7e399e8e74
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
-@@ -0,0 +1,7 @@
+@@ -0,0 +1,10 @@
 +/* SPDX-License-Identifier: GPL-2.0-only */
 +
-+#pragma once
++#ifndef __SCH5555_EC_H__
++#define __SCH5555_EC_H__
 +
 +uint8_t ec_read(uint8_t addr1, uint16_t addr2);
 +
 +void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val);
++
++#endif
 -- 
 2.39.2
 

From ed0678ae2e9b58b3eb9a7606816e21ad8798192e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 24 Apr 2024 05:27:27 +0100
Subject: [PATCH 0251/1549] haswell: only provide NRI-based ROMs in releases

release="n" is set in target.cfg on haswell build targets
that use mrc.bin

script/update/release exports LBMK_RELEASE="y"

script/build/roms skips building a given target if release="n"
in target.cfg *and* LBMK_RELEASE="y"

you could also do the export yourself before running ./build roms,
for example:

export LBMK_RELEASE="y"
./build roms all

This would skip these ROM images. The native haswell raminit is
now stable enough in my testing, that I wish to delete the MRC-based
targets. This is in line with Libreboot's Binary Blob Reduction Policy,
which states: if a blob can be avoided, it should be avoided.

The problem is that users often run the inject script in *lbmk* from
Git, instead of from the src release archive. I forsee some users
running this on modern lbmk with older release images. If the mrc-based
target isn't there, the user may use an NRI-based target name, and
think it works; they will insert without MRC. I foresaw this ages
ago, which is why Caleb and I ensured that the script checks hashes,
and hashes are included in releases.

Therefore: for the time being, keep the MRC-based configs in lbmk
but do not include images for them in releases. This can be done
indefinitely, but I'll probably remove those configs entirely at
some point.

On the following boards, Libreboot now will *only* provide NRI-based
ROM images for the following machines:

* Dell OptiPlex 9020 SFF
* Dell OptiPlex 9020 MT
* Lenovo ThinkPad T440p
* Lenovo ThinkPad W541/W540

I now recommend exclusive use of NRI-based images, on Haswell
hardware. It's stable enough in my testing, and now supports S3.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build                                           | 2 ++
 config/coreboot/dell9020mt_12mb/target.cfg      | 1 +
 config/coreboot/dell9020mtbmrc_12mb/target.cfg  | 1 +
 config/coreboot/dell9020sff_12mb/target.cfg     | 1 +
 config/coreboot/dell9020sffbmrc_12mb/target.cfg | 1 +
 config/coreboot/t440pbmrc_12mb/target.cfg       | 1 +
 config/coreboot/t440pmrc_12mb/target.cfg        | 1 +
 config/coreboot/w541bmrc_12mb/target.cfg        | 1 +
 config/coreboot/w541mrc_12mb/target.cfg         | 1 +
 include/err.sh                                  | 7 +++++++
 script/build/roms                               | 9 ++++++++-
 script/update/release                           | 2 ++
 12 files changed, 27 insertions(+), 1 deletion(-)

diff --git a/build b/build
index 38d1694c..14353245 100755
--- a/build
+++ b/build
@@ -13,6 +13,8 @@ export LC_ALL=C
 . "include/err.sh"
 . "include/option.sh"
 
+export LBMK_RELEASE="$lbmk_release"
+
 eval "$(setvars "" option aur_notice tmpdir)"
 err="fail"
 
diff --git a/config/coreboot/dell9020mt_12mb/target.cfg b/config/coreboot/dell9020mt_12mb/target.cfg
index e6d3bec6..0da057a9 100644
--- a/config/coreboot/dell9020mt_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
diff --git a/config/coreboot/dell9020mtbmrc_12mb/target.cfg b/config/coreboot/dell9020mtbmrc_12mb/target.cfg
index e6d3bec6..0da057a9 100644
--- a/config/coreboot/dell9020mtbmrc_12mb/target.cfg
+++ b/config/coreboot/dell9020mtbmrc_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
diff --git a/config/coreboot/dell9020sff_12mb/target.cfg b/config/coreboot/dell9020sff_12mb/target.cfg
index e6d3bec6..0da057a9 100644
--- a/config/coreboot/dell9020sff_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
diff --git a/config/coreboot/dell9020sffbmrc_12mb/target.cfg b/config/coreboot/dell9020sffbmrc_12mb/target.cfg
index e6d3bec6..0da057a9 100644
--- a/config/coreboot/dell9020sffbmrc_12mb/target.cfg
+++ b/config/coreboot/dell9020sffbmrc_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
diff --git a/config/coreboot/t440pbmrc_12mb/target.cfg b/config/coreboot/t440pbmrc_12mb/target.cfg
index 8688df3f..06f3025c 100644
--- a/config/coreboot/t440pbmrc_12mb/target.cfg
+++ b/config/coreboot/t440pbmrc_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
diff --git a/config/coreboot/t440pmrc_12mb/target.cfg b/config/coreboot/t440pmrc_12mb/target.cfg
index 8688df3f..06f3025c 100644
--- a/config/coreboot/t440pmrc_12mb/target.cfg
+++ b/config/coreboot/t440pmrc_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
diff --git a/config/coreboot/w541bmrc_12mb/target.cfg b/config/coreboot/w541bmrc_12mb/target.cfg
index 8688df3f..06f3025c 100644
--- a/config/coreboot/w541bmrc_12mb/target.cfg
+++ b/config/coreboot/w541bmrc_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
diff --git a/config/coreboot/w541mrc_12mb/target.cfg b/config/coreboot/w541mrc_12mb/target.cfg
index 8688df3f..06f3025c 100644
--- a/config/coreboot/w541mrc_12mb/target.cfg
+++ b/config/coreboot/w541mrc_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
diff --git a/include/err.sh b/include/err.sh
index 5b66c999..3cadf042 100755
--- a/include/err.sh
+++ b/include/err.sh
@@ -4,6 +4,13 @@
 version=""; versiondate=""; projectname=""; _nogit=""
 err="err_"
 
+# if "y": a coreboot target won't be built if target.cfg says release="n"
+# (this is used to exclude certain build targets from releases)
+lbmk_release=
+set | grep LBMK_RELEASE 1>/dev/null 2>/dev/null || lbmk_release="n" || :
+[ -z "$lbmk_release" ] && lbmk_release="$LBMK_RELEASE"
+[ "$lbmk_release" = "n" ] || [ "$lbmk_release" = "y" ] || lbmk_release="n"
+
 x_() {
 	[ $# -lt 1 ] || ${@} || $err "Unhandled non-zero exit: $@"; return 0
 }
diff --git a/script/build/roms b/script/build/roms
index a90e1daa..2510b1fd 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -20,7 +20,7 @@ cfgsdir="config/coreboot"
 # target.cfg files have to specifically enable [a] payload(s)
 pv="payload_grub payload_grub_withseabios payload_seabios payload_memtest t"
 pv="${pv} payload_seabios_withgrub payload_seabios_grubonly payload_uboot memtest_bin"
-v="romdir cbrom initmode displaymode cbcfg targetdir tree keymaps"
+v="romdir cbrom initmode displaymode cbcfg targetdir tree keymaps release"
 v="${v} grub_timeout ubdir board grub_scan_disk uboot_config"
 eval "$(setvars "n" ${pv})"
 eval "$(setvars "" ${v} boards _displaymode _payload _keyboard all targets)"
@@ -56,6 +56,13 @@ main()
 		grub_background="background1280x800.png"
 		board="${x}"
 		configure_target
+
+		# exclude certain targets from the release
+		if [ "$release" = "n" ] && [ "$lbmk_release" = "y" ]; then
+			printf "Skipping target: %s\n" "$x"
+			continue
+		fi
+
 		build_payloads
 		build_target_mainboard
 		[ -d "bin/${board}" ] || continue
diff --git a/script/update/release b/script/update/release
index 25ada9da..e8eff300 100755
--- a/script/update/release
+++ b/script/update/release
@@ -9,6 +9,8 @@ set -u -e
 
 eval "$(setvars "" vdir relname src_dirname srcdir _xm target romdir mode)"
 
+export LBMK_RELEASE="y"
+
 main()
 {
 	vdir="release"

From 02e4c0b28e348face651b273fd39b32618ebf17f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 25 Apr 2024 12:45:28 +0100
Subject: [PATCH 0252/1549] hp820g2: allow building, but don't do release ROMs

at present, the inject scripts compress refcode in a way
that is not reproducible, so there's no way to verify
that the firmware is correct, via checksum verification,
when injecting vendor code on release images

the lack of reproducibility in recompression will have to be
addressed, but the issue is that lbmk does not provide its own
sources for compression utilities, instead opting to use the
system's own compression utility

so the solution might be for lbmk not to use the host's utility,
and compile its own, or insert the refcode uncompressed. for now,
simply disable the hp 820 g2 target in libreboot releases

this uses the same logic recently implemented for excluding
mrc-based haswell images in libreboot releases

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/hp820g2_12mb/target.cfg | 1 +
 1 file changed, 1 insertion(+)

diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index 8688df3f..06f3025c 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"

From f5f2c58a0e06d629b28e2dfb14c5dcf169626568 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 25 Apr 2024 19:03:43 +0100
Subject: [PATCH 0253/1549] build/roms: add missing deletion of tmp file

the temporary rom per build was not being deleted after
finishing the current target. this adds up in /tmp during
large builds, when building for many targets. fix this!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/script/build/roms b/script/build/roms
index 2510b1fd..5fdc05c9 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -201,7 +201,8 @@ build_target_mainboard()
 			    [ "$displaymode" != "txtmode" ] && continue
 			cbcfg="${targetdir}/config/${initmode}_${displaymode}"
 			[ "${initmode}" = "normal" ] && cbcfg="${cbcfg%_*}"
-			build_roms "${cbcfg}"	
+			build_roms "${cbcfg}"
+			x_ rm -f "$cbrom"
 		done
 	done
 }

From 08859bb4a56b282cb566c262bd591d7271308ef3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 25 Apr 2024 19:08:53 +0100
Subject: [PATCH 0254/1549] lbmk: export TMPDIR from err.sh, not build

lbmk sets TMPDIR to /tmp, and then creates a tmpdir, then
exports *that* as the value of TMPDIR. this unified TMPDIR
location then contains all subsequent files and directories,
when any script or program makes use of /tmp, via mktemp. at
least, that's the theory!

in practise, because it was only being properly exported from
the main build scripts, subscripts that are then called were
not exporting it, at least that is my assumption because in
some cases, i found that the coreboot build system was leaving
errant files behind outside of our own TMPDIR, and that build
system did not seem to be setting TMPDIR itself; more debugging
is needed.

anyway: use the exact same logic, but do it from err.sh. since
err.sh is included from every lbmk script, that means it will
always be exported when running every single part of lbmk. this
should reduce the chance that mktemp creates files and directories
outside of our custom TMPDIR location.

this is because in lbmk, we mitigate unhandled tmpdirs/files by
unifying it in the manner described, then deleting the entire
TMPDIR on exit from the main lbmk parent process (the main
script that the user called from, which is always the "build"
file).

in lbmk, effort is made to clean up temporary files properly,
without relying on this catch-all, but we can't rely on that.
the catch-all should also be as robust as possible.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build          | 16 +---------------
 include/err.sh | 16 +++++++++++++++-
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/build b/build
index 14353245..dbcd6939 100755
--- a/build
+++ b/build
@@ -15,23 +15,9 @@ export LC_ALL=C
 
 export LBMK_RELEASE="$lbmk_release"
 
-eval "$(setvars "" option aur_notice tmpdir)"
+eval "$(setvars "" option aur_notice)"
 err="fail"
 
-tmpdir_was_set="y"
-set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"
-if [ "${tmpdir_was_set}" = "y" ]; then
-	[ "${TMPDIR%_*}" = "/tmp/lbmk" ] || tmpdir_was_set="n"
-fi
-if [ "${tmpdir_was_set}" = "n" ]; then
-	export TMPDIR="/tmp"
-	tmpdir="$(mktemp -d -t lbmk_XXXXXXXX)"
-	export TMPDIR="${tmpdir}"
-else
-	export TMPDIR="${TMPDIR}"
-	tmpdir="${TMPDIR}"
-fi
-
 linkpath="${0}"
 linkname="${linkpath##*/}"
 buildpath="./script/${linkname}"
diff --git a/include/err.sh b/include/err.sh
index 3cadf042..7a6d3fe5 100755
--- a/include/err.sh
+++ b/include/err.sh
@@ -2,7 +2,7 @@
 # SPDX-FileCopyrightText: 2022, 2023 Leah Rowe <leah@libreboot.org>
 
 version=""; versiondate=""; projectname=""; _nogit=""
-err="err_"
+err="err_"; tmpdir=""
 
 # if "y": a coreboot target won't be built if target.cfg says release="n"
 # (this is used to exclude certain build targets from releases)
@@ -11,6 +11,20 @@ set | grep LBMK_RELEASE 1>/dev/null 2>/dev/null || lbmk_release="n" || :
 [ -z "$lbmk_release" ] && lbmk_release="$LBMK_RELEASE"
 [ "$lbmk_release" = "n" ] || [ "$lbmk_release" = "y" ] || lbmk_release="n"
 
+tmpdir_was_set="y"
+set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"
+if [ "${tmpdir_was_set}" = "y" ]; then
+	[ "${TMPDIR%_*}" = "/tmp/lbmk" ] || tmpdir_was_set="n"
+fi
+if [ "${tmpdir_was_set}" = "n" ]; then
+	export TMPDIR="/tmp"
+	tmpdir="$(mktemp -d -t lbmk_XXXXXXXX)"
+	export TMPDIR="${tmpdir}"
+else
+	export TMPDIR="${TMPDIR}"
+	tmpdir="${TMPDIR}"
+fi
+
 x_() {
 	[ $# -lt 1 ] || ${@} || $err "Unhandled non-zero exit: $@"; return 0
 }

From 2d7debd33c2f42bfe6296d4b72a0710e3039bbd4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 25 Apr 2024 20:18:01 +0100
Subject: [PATCH 0255/1549] 9020 sff/mt: add tpm enable patch from mate kukri

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...x_9020-Add-support-for-TPM1.2-device.patch | 49 +++++++++++++++++++
 .../config/libgfxinit_corebootfb              |  6 +++
 .../config/libgfxinit_txtmode                 |  6 +++
 .../config/libgfxinit_corebootfb              |  6 +++
 .../dell9020mt_12mb/config/libgfxinit_txtmode |  6 +++
 .../config/libgfxinit_corebootfb              |  6 +++
 .../config/libgfxinit_txtmode                 |  6 +++
 .../config/libgfxinit_corebootfb              |  6 +++
 .../config/libgfxinit_txtmode                 |  6 +++
 .../config/libgfxinit_corebootfb              |  6 +++
 .../config/libgfxinit_txtmode                 |  6 +++
 .../config/libgfxinit_corebootfb              |  6 +++
 .../config/libgfxinit_txtmode                 |  6 +++
 ...x_9020-Add-support-for-TPM1.2-device.patch | 49 +++++++++++++++++++
 14 files changed, 170 insertions(+)
 create mode 100644 config/coreboot/default/patches/0043-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
 create mode 100644 config/coreboot/haswell/patches/0025-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch

diff --git a/config/coreboot/default/patches/0043-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch b/config/coreboot/default/patches/0043-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
new file mode 100644
index 00000000..556e8e07
--- /dev/null
+++ b/config/coreboot/default/patches/0043-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
@@ -0,0 +1,49 @@
+From cd3c553a313a26494e5dc31ff8323c3a919f190a Mon Sep 17 00:00:00 2001
+From: Mate Kukri <kukri.mate@gmail.com>
+Date: Wed, 10 Apr 2024 20:31:35 +0100
+Subject: [PATCH 1/1] mb/dell/optiplex_9020: Add support for TPM1.2 device
+
+These machines come with a TPM1.2 device by default. It is somewhat
+obsolete these days, but there is no harm in enabling it.
+
+Change-Id: Iec05321862aed58695c256b00494e5953219786d
+Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
+Reviewed-on: https://review.coreboot.org/c/coreboot/+/81827
+Reviewed-by: Angel Pons <th3fanbus@gmail.com>
+Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
+---
+ src/mainboard/dell/optiplex_9020/Kconfig       | 2 ++
+ src/mainboard/dell/optiplex_9020/devicetree.cb | 3 +++
+ 2 files changed, 5 insertions(+)
+
+diff --git a/src/mainboard/dell/optiplex_9020/Kconfig b/src/mainboard/dell/optiplex_9020/Kconfig
+index 774a72f161..296938aa8d 100644
+--- a/src/mainboard/dell/optiplex_9020/Kconfig
++++ b/src/mainboard/dell/optiplex_9020/Kconfig
+@@ -12,7 +12,9 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select INTEL_GMA_HAVE_VBT
+ 	select INTEL_INT15
+ 	select MAINBOARD_HAS_LIBGFXINIT
++	select MAINBOARD_HAS_TPM1
+ 	select MAINBOARD_USES_IFD_GBE_REGION
++	select MEMORY_MAPPED_TPM
+ 	select NORTHBRIDGE_INTEL_HASWELL
+ 	select SERIRQ_CONTINUOUS_MODE
+ 	select SOUTHBRIDGE_INTEL_LYNXPOINT
+diff --git a/src/mainboard/dell/optiplex_9020/devicetree.cb b/src/mainboard/dell/optiplex_9020/devicetree.cb
+index 7bfa6736a6..e5cbd64127 100644
+--- a/src/mainboard/dell/optiplex_9020/devicetree.cb
++++ b/src/mainboard/dell/optiplex_9020/devicetree.cb
+@@ -70,6 +70,9 @@ chip northbridge/intel/haswell
+ 					device pnp 2e.b  off end	# Floppy Controller
+ 					device pnp 2e.11 off end	# Parallel Port
+ 				end
++				chip drivers/pc80/tpm
++					device pnp 0c31.0 on end
++				end
+ 			end
+ 			device pci 1f.2 on  end				# SATA controller 1
+ 			device pci 1f.3 on  end				# SMBus
+-- 
+2.39.2
+
diff --git a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb
index d587473c..afbe83aa 100644
--- a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
@@ -447,6 +448,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
 CONFIG_DRIVERS_MTK_WIFI=y
@@ -471,6 +474,9 @@ CONFIG_DRIVERS_MTK_WIFI=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
diff --git a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode
index fb415885..b649afff 100644
--- a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
@@ -443,6 +444,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
@@ -468,6 +471,9 @@ CONFIG_DRIVERS_MTK_WIFI=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
index ea4cfb53..d3b7d221 100644
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
@@ -135,6 +135,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
@@ -458,6 +459,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
@@ -481,6 +484,9 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
index c52eae4c..cf9eec5f 100644
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
@@ -133,6 +133,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
@@ -454,6 +455,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
@@ -478,6 +481,9 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
diff --git a/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb
index 953901cd..85952b07 100644
--- a/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb
@@ -135,6 +135,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
@@ -458,6 +459,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
@@ -481,6 +484,9 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
diff --git a/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode
index 682c9e99..adb1ba55 100644
--- a/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode
@@ -133,6 +133,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
@@ -454,6 +455,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
@@ -478,6 +481,9 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
diff --git a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb
index 7bfe30a2..22b153fa 100644
--- a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb
@@ -134,6 +134,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
@@ -447,6 +448,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
 CONFIG_DRIVERS_MTK_WIFI=y
@@ -471,6 +474,9 @@ CONFIG_DRIVERS_MTK_WIFI=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
diff --git a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode
index c976b093..935c29bf 100644
--- a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode
@@ -132,6 +132,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
@@ -443,6 +444,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
@@ -468,6 +471,9 @@ CONFIG_DRIVERS_MTK_WIFI=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
diff --git a/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
index 26202d3a..9909153c 100644
--- a/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
@@ -135,6 +135,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
@@ -458,6 +459,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
@@ -481,6 +484,9 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
diff --git a/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
index 0cceca51..5d7b424b 100644
--- a/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
@@ -133,6 +133,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
@@ -454,6 +455,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
@@ -478,6 +481,9 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
diff --git a/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb
index c4995430..df48538d 100644
--- a/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb
@@ -135,6 +135,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
@@ -458,6 +459,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
@@ -481,6 +484,9 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
diff --git a/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode
index dc3d337d..297aa07b 100644
--- a/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode
@@ -133,6 +133,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
@@ -454,6 +455,8 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
@@ -478,6 +481,9 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+# CONFIG_TPM1 is not set
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
diff --git a/config/coreboot/haswell/patches/0025-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch b/config/coreboot/haswell/patches/0025-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
new file mode 100644
index 00000000..52147426
--- /dev/null
+++ b/config/coreboot/haswell/patches/0025-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
@@ -0,0 +1,49 @@
+From 355536155898e649fa50277136ccd2df53a52bb1 Mon Sep 17 00:00:00 2001
+From: Mate Kukri <kukri.mate@gmail.com>
+Date: Wed, 10 Apr 2024 20:31:35 +0100
+Subject: [PATCH 1/1] mb/dell/optiplex_9020: Add support for TPM1.2 device
+
+These machines come with a TPM1.2 device by default. It is somewhat
+obsolete these days, but there is no harm in enabling it.
+
+Change-Id: Iec05321862aed58695c256b00494e5953219786d
+Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
+Reviewed-on: https://review.coreboot.org/c/coreboot/+/81827
+Reviewed-by: Angel Pons <th3fanbus@gmail.com>
+Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
+---
+ src/mainboard/dell/optiplex_9020/Kconfig       | 2 ++
+ src/mainboard/dell/optiplex_9020/devicetree.cb | 3 +++
+ 2 files changed, 5 insertions(+)
+
+diff --git a/src/mainboard/dell/optiplex_9020/Kconfig b/src/mainboard/dell/optiplex_9020/Kconfig
+index 2de4a9abd6..38c3281e70 100644
+--- a/src/mainboard/dell/optiplex_9020/Kconfig
++++ b/src/mainboard/dell/optiplex_9020/Kconfig
+@@ -12,7 +12,9 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select INTEL_GMA_HAVE_VBT
+ 	select INTEL_INT15
+ 	select MAINBOARD_HAS_LIBGFXINIT
++	select MAINBOARD_HAS_TPM1
+ 	select MAINBOARD_USES_IFD_GBE_REGION
++	select MEMORY_MAPPED_TPM
+ 	select NORTHBRIDGE_INTEL_HASWELL
+ 	select SERIRQ_CONTINUOUS_MODE
+ 	select SOUTHBRIDGE_INTEL_LYNXPOINT
+diff --git a/src/mainboard/dell/optiplex_9020/devicetree.cb b/src/mainboard/dell/optiplex_9020/devicetree.cb
+index dce5869478..841285bb9c 100644
+--- a/src/mainboard/dell/optiplex_9020/devicetree.cb
++++ b/src/mainboard/dell/optiplex_9020/devicetree.cb
+@@ -70,6 +70,9 @@ chip northbridge/intel/haswell
+ 					device pnp 2e.b  off end	# Floppy Controller
+ 					device pnp 2e.11 off end	# Parallel Port
+ 				end
++				chip drivers/pc80/tpm
++					device pnp 0c31.0 on end
++				end
+ 			end
+ 			device pci 1f.2 on  end				# SATA controller 1
+ 			device pci 1f.3 on  end				# SMBus
+-- 
+2.39.2
+

From ddfe71a366469f090d859d1e97b57ee184f6ba25 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 26 Apr 2024 05:10:12 +0100
Subject: [PATCH 0256/1549] 9020 sff/mt: actually enable the TPM (by default)

i added mkukri's patch but didn't enable it. this was intentional.

this patch enables tpm by default, on all 9020 sff/mt targets.

most users probably won't need it, but enabling it won't hurt.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../dell9020mt-nri_12mb/config/libgfxinit_corebootfb  | 11 +++++++++--
 .../dell9020mt-nri_12mb/config/libgfxinit_txtmode     | 11 +++++++++--
 .../dell9020mt_12mb/config/libgfxinit_corebootfb      | 11 +++++++++--
 .../dell9020mt_12mb/config/libgfxinit_txtmode         | 11 +++++++++--
 .../dell9020mtbmrc_12mb/config/libgfxinit_corebootfb  | 11 +++++++++--
 .../dell9020mtbmrc_12mb/config/libgfxinit_txtmode     | 11 +++++++++--
 .../dell9020sff-nri_12mb/config/libgfxinit_corebootfb | 11 +++++++++--
 .../dell9020sff-nri_12mb/config/libgfxinit_txtmode    | 11 +++++++++--
 .../dell9020sff_12mb/config/libgfxinit_corebootfb     | 11 +++++++++--
 .../dell9020sff_12mb/config/libgfxinit_txtmode        | 11 +++++++++--
 .../dell9020sffbmrc_12mb/config/libgfxinit_corebootfb | 11 +++++++++--
 .../dell9020sffbmrc_12mb/config/libgfxinit_txtmode    | 11 +++++++++--
 12 files changed, 108 insertions(+), 24 deletions(-)

diff --git a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb
index afbe83aa..509e784e 100644
--- a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb
@@ -178,6 +178,7 @@ CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -418,6 +419,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -473,9 +476,12 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
-CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
 # CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
@@ -491,6 +497,7 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
 # end of Memory initialization
 
+# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode
index b649afff..428bed87 100644
--- a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode
@@ -176,6 +176,7 @@ CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -414,6 +415,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -470,9 +473,12 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
-CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
 # CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
@@ -488,6 +494,7 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
 # end of Memory initialization
 
+# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
index d3b7d221..2fbd5982 100644
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
@@ -185,6 +185,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -429,6 +430,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -483,9 +486,12 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
 # CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
@@ -501,6 +507,7 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
 # end of Memory initialization
 
+# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
index cf9eec5f..c92a7c7c 100644
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
@@ -183,6 +183,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -425,6 +426,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -480,9 +483,12 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
 # CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
@@ -498,6 +504,7 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
 # end of Memory initialization
 
+# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb
index 85952b07..2878f894 100644
--- a/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb
@@ -185,6 +185,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -429,6 +430,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -483,9 +486,12 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
 # CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
@@ -501,6 +507,7 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
 # end of Memory initialization
 
+# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode
index adb1ba55..35bbcf5b 100644
--- a/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode
@@ -183,6 +183,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -425,6 +426,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -480,9 +483,12 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
 # CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
@@ -498,6 +504,7 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
 # end of Memory initialization
 
+# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb
index 22b153fa..ac1d9f16 100644
--- a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb
@@ -178,6 +178,7 @@ CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -418,6 +419,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -473,9 +476,12 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
-CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
 # CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
@@ -491,6 +497,7 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
 # end of Memory initialization
 
+# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode
index 935c29bf..179af9cc 100644
--- a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode
@@ -176,6 +176,7 @@ CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -414,6 +415,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -470,9 +473,12 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
-CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
 # CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
@@ -488,6 +494,7 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
 # end of Memory initialization
 
+# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
index 9909153c..65d9ddf2 100644
--- a/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
@@ -185,6 +185,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -429,6 +430,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -483,9 +486,12 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
 # CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
@@ -501,6 +507,7 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
 # end of Memory initialization
 
+# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
index 5d7b424b..127c034d 100644
--- a/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
@@ -183,6 +183,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -425,6 +426,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -480,9 +483,12 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
 # CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
@@ -498,6 +504,7 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
 # end of Memory initialization
 
+# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb
index df48538d..f544407a 100644
--- a/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb
@@ -185,6 +185,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -429,6 +430,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -483,9 +486,12 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
 # CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
@@ -501,6 +507,7 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
 # end of Memory initialization
 
+# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode
index 297aa07b..0586764c 100644
--- a/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode
@@ -183,6 +183,7 @@ CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_EC_GPE_SCI=0x50
+# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -425,6 +426,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
@@ -480,9 +483,12 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
 # CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
@@ -498,6 +504,7 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
 # end of Memory initialization
 
+# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y

From a5082de43cd7fd86491722a7637cf4eec838d6e3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 26 Apr 2024 05:12:04 +0100
Subject: [PATCH 0257/1549] GRUB: bump to today's latest revision

GRUB has not pushed many patches to master since the recent 2.12
release, but there are a number of interesting fixes.

libreboot is doing a release soon. bump to latest grub revision.

Some of the new patches in GRUB are interesting:

XFS fixes:

"fs/xfs: Handle non-continuous data blocks in directory extents"
68dd65cfdaad08b1f8ec01b84949b0bf88bc0d8c
Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=2254370
Apparently, XFS could not boot in some reports, though this was
likely with BIOS or UEFI GRUB; no such reports were made to libreboot

"gfxmenu/view: Resolve false grub_errno disrupting boot process"
39c927df66c7ca62d97905d1385054ac9ce67209

"util/grub-fstest: Add a new command zfs-bootfs"
28c4405208cfb6e2cea737f6cbaf17e631bac6cd

The gnulib revision does not need to be updated at this time.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/grub | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/git/grub b/config/git/grub
index 3abec3e4..b52fa0fb 100644
--- a/config/git/grub
+++ b/config/git/grub
@@ -1,5 +1,5 @@
 {grub}{
-	rev: b835601c7639ed1890f2d3db91900a8506011a8e
+	rev: 8719cc2040368d43ab2de0b6e1b850b2c9cfc5b7
 	loc: grub
 	url: git://git.savannah.gnu.org/grub.git
 	bkup_url: https://codeberg.org/libreboot/grub

From 64177dbb8e7ff9ca9c7ad847c137398f6a67cfcf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 26 Apr 2024 08:20:19 +0100
Subject: [PATCH 0258/1549] exports variables from err.sh, not build

LC_COLLATE and LBMK_RELEASE are important variables. we want
to make sure that these are seen by everything.

since err.sh is included from all scripts, doing it there will
accomplish just that.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build          | 5 -----
 include/err.sh | 4 ++++
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/build b/build
index dbcd6939..277390fd 100755
--- a/build
+++ b/build
@@ -7,14 +7,9 @@
 
 set -u -e
 
-export LC_COLLATE=C
-export LC_ALL=C
-
 . "include/err.sh"
 . "include/option.sh"
 
-export LBMK_RELEASE="$lbmk_release"
-
 eval "$(setvars "" option aur_notice)"
 err="fail"
 
diff --git a/include/err.sh b/include/err.sh
index 7a6d3fe5..d4f8700b 100755
--- a/include/err.sh
+++ b/include/err.sh
@@ -1,6 +1,9 @@
 # SPDX-License-Identifier: MIT
 # SPDX-FileCopyrightText: 2022, 2023 Leah Rowe <leah@libreboot.org>
 
+export LC_COLLATE=C
+export LC_ALL=C
+
 version=""; versiondate=""; projectname=""; _nogit=""
 err="err_"; tmpdir=""
 
@@ -10,6 +13,7 @@ lbmk_release=
 set | grep LBMK_RELEASE 1>/dev/null 2>/dev/null || lbmk_release="n" || :
 [ -z "$lbmk_release" ] && lbmk_release="$LBMK_RELEASE"
 [ "$lbmk_release" = "n" ] || [ "$lbmk_release" = "y" ] || lbmk_release="n"
+export LBMK_RELEASE="$lbmk_release"
 
 tmpdir_was_set="y"
 set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"

From a2f423535840382d72bfa1ae1e1cb5c06e4f8604 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 26 Apr 2024 09:37:01 +0100
Subject: [PATCH 0259/1549] i945: switch boards to 20230625 coreboot revision

On T60 with Libreboot 20231106 and the GRUB payload, a user
reported this error in GRUB when a battery was connected:

"alloc magic is broken at 0x7b1aedf0: 0"

This error disappears when a battery is not connected, or
when using Libreboot 20230625. The issue has persisted
through to LIbreboot 20240225 and after, and I believe the
issue will be somewhere in coreboot, not in GRUB itself.

For now, switch i945 laptops (X60, T60, Macbook2,1) back to
the February 2023 coreboot revision used in Libreboot 20230625.

A bisect can be done before the next Libreboot release, ETA
May 2024, if time permits. Otherwise, this revert should solve
the problem for now, at least so far as Libreboot is concerned.

The following coreboot patches have been backported:

    commit 29030d0f3dad2ec6b86000dfe2c8e951ae80bf94
    Author: Bill Xie <persmule@hardenedlinux.org>
    Date:   Sat Oct 7 01:32:51 2023 +0800

        drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume

    Further patches from upstream:

    commit 432e92688eca0e85cbaebca3232f65936b305a98
    Author: Bill Xie <persmule@hardenedlinux.org>
    Date:   Fri Nov 3 12:34:01 2023 +0800

        drivers/pc80/rtc/option.c: Reset only CMOS range covered by checksum

These patches fixed S3 on GM45 machines, though it will be useful on
the i945 machines aswell.

The reason I'm doing it this way it is because I don't have a battery
for my X60 or T60, and my T60 isn't in a very good state either,
so I can't reproduce the error myself yet.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...Set-default-VRAM-to-64MiB-instead-of.patch |  23 ++++
 ...d-c3-and-clockgen-to-apple-macbook21.patch |  68 +++++++++
 ...-Video-RAM-changed-to-default-previo.patch |  23 ++++
 ...64MiB-VRAM-the-default-in-cmos.defau.patch |  22 +++
 ...use-mirrorservice-for-gnu-toolchains.patch |  34 +++++
 ...-option.c-Stop-resetting-CMOS-during.patch |  56 ++++++++
 ...-option.c-Reset-only-CMOS-range-cove.patch |  51 +++++++
 ...or-coreboot-images-built-without-a-p.patch |  38 ++++++
 config/coreboot/i945/target.cfg               |   2 +
 .../macbook11/config/libgfxinit_corebootfb    | 116 ++++++----------
 .../macbook11/config/libgfxinit_txtmode       | 116 ++++++----------
 config/coreboot/macbook11/target.cfg          |   2 +-
 .../config/libgfxinit_corebootfb              | 114 ++++++----------
 .../macbook11_16mb/config/libgfxinit_txtmode  | 114 ++++++----------
 config/coreboot/macbook11_16mb/target.cfg     |   2 +-
 .../macbook21/config/libgfxinit_corebootfb    | 116 ++++++----------
 .../macbook21/config/libgfxinit_txtmode       | 116 ++++++----------
 config/coreboot/macbook21/target.cfg          |   2 +-
 .../config/libgfxinit_corebootfb              | 114 ++++++----------
 .../macbook21_16mb/config/libgfxinit_txtmode  | 114 ++++++----------
 config/coreboot/macbook21_16mb/target.cfg     |   2 +-
 .../config/libgfxinit_corebootfb              | 128 ++++++-----------
 .../config/libgfxinit_txtmode                 | 128 ++++++-----------
 config/coreboot/t60_16mb_intelgpu/target.cfg  |   2 +-
 .../t60_intelgpu/config/libgfxinit_corebootfb | 128 ++++++-----------
 .../t60_intelgpu/config/libgfxinit_txtmode    | 128 ++++++-----------
 config/coreboot/t60_intelgpu/target.cfg       |   2 +-
 .../coreboot/x60/config/libgfxinit_corebootfb | 129 ++++++------------
 config/coreboot/x60/config/libgfxinit_txtmode | 129 ++++++------------
 config/coreboot/x60/target.cfg                |   2 +-
 .../x60_16mb/config/libgfxinit_corebootfb     | 129 ++++++------------
 .../x60_16mb/config/libgfxinit_txtmode        | 129 ++++++------------
 config/coreboot/x60_16mb/target.cfg           |   2 +-
 33 files changed, 973 insertions(+), 1308 deletions(-)
 create mode 100644 config/coreboot/i945/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
 create mode 100644 config/coreboot/i945/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
 create mode 100644 config/coreboot/i945/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
 create mode 100644 config/coreboot/i945/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
 create mode 100644 config/coreboot/i945/patches/0005-buildgcc-use-mirrorservice-for-gnu-toolchains.patch
 create mode 100644 config/coreboot/i945/patches/0006-drivers-pc80-rtc-option.c-Stop-resetting-CMOS-during.patch
 create mode 100644 config/coreboot/i945/patches/0007-drivers-pc80-rtc-option.c-Reset-only-CMOS-range-cove.patch
 create mode 100644 config/coreboot/i945/patches/0022-Remove-warning-for-coreboot-images-built-without-a-p.patch
 create mode 100644 config/coreboot/i945/target.cfg

diff --git a/config/coreboot/i945/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch b/config/coreboot/i945/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
new file mode 100644
index 00000000..a06a5058
--- /dev/null
+++ b/config/coreboot/i945/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
@@ -0,0 +1,23 @@
+From 4c5971a6fcf7e948f7df4d0ce2ab0751060cb2ca Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@retroboot.org>
+Date: Fri, 19 Mar 2021 05:54:58 +0000
+Subject: [PATCH 01/18] apple/macbook21: Set default VRAM to 64MiB instead of
+ 8MiB
+
+---
+ src/mainboard/apple/macbook21/cmos.default | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/mainboard/apple/macbook21/cmos.default b/src/mainboard/apple/macbook21/cmos.default
+index cf1bc4566e..dc0df3b6d6 100644
+--- a/src/mainboard/apple/macbook21/cmos.default
++++ b/src/mainboard/apple/macbook21/cmos.default
+@@ -5,4 +5,4 @@ boot_devices=''
+ boot_default=0x40
+ cmos_defaults_loaded=Yes
+ lpt=Enable
+-gfx_uma_size=8M
++gfx_uma_size=64M
+-- 
+2.39.2
+
diff --git a/config/coreboot/i945/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch b/config/coreboot/i945/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
new file mode 100644
index 00000000..57c32ec7
--- /dev/null
+++ b/config/coreboot/i945/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
@@ -0,0 +1,68 @@
+From ff523fd40649b72512b0f1253701509d83ca4a8d Mon Sep 17 00:00:00 2001
+From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
+Date: Wed, 27 Oct 2021 13:36:01 +0200
+Subject: [PATCH 02/18] add c3 and clockgen to apple/macbook21
+
+---
+ src/mainboard/apple/macbook21/Kconfig       |  1 +
+ src/mainboard/apple/macbook21/cstates.c     | 13 +++++++++++++
+ src/mainboard/apple/macbook21/devicetree.cb |  6 ++++++
+ 3 files changed, 20 insertions(+)
+
+diff --git a/src/mainboard/apple/macbook21/Kconfig b/src/mainboard/apple/macbook21/Kconfig
+index 5f5ffde588..27377b737c 100644
+--- a/src/mainboard/apple/macbook21/Kconfig
++++ b/src/mainboard/apple/macbook21/Kconfig
+@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select HAVE_ACPI_TABLES
+ 	select HAVE_ACPI_RESUME
+ 	select I945_LVDS
++	select DRIVERS_I2C_CK505
+ 
+ config MAINBOARD_DIR
+ 	default "apple/macbook21"
+diff --git a/src/mainboard/apple/macbook21/cstates.c b/src/mainboard/apple/macbook21/cstates.c
+index 13d06f0839..88b8669c61 100644
+--- a/src/mainboard/apple/macbook21/cstates.c
++++ b/src/mainboard/apple/macbook21/cstates.c
+@@ -29,6 +29,19 @@ static const acpi_cstate_t cst_entries[] = {
+ 			.addrh = 0,
+ 		}
+ 	},
++	{
++		.ctype = 3,
++		.latency = 17,
++		.power = 250,
++		.resource = {
++			.space_id = ACPI_ADDRESS_SPACE_FIXED,
++			.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
++			.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
++			.access_size = ACPI_ACCESS_SIZE_UNDEFINED,
++			.addrl = 0x20,
++			.addrh = 0,
++		}
++	},
+ };
+ 
+ int get_cst_entries(const acpi_cstate_t **entries)
+diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb
+index dd701da7ed..5587c48d1f 100644
+--- a/src/mainboard/apple/macbook21/devicetree.cb
++++ b/src/mainboard/apple/macbook21/devicetree.cb
+@@ -100,7 +100,13 @@ chip northbridge/intel/i945
+ 			end
+ 			device pci 1f.3 on # SMBUS
+ 				subsystemid 0x8086 0x7270
++				chip drivers/i2c/ck505
++					register "mask" = "{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }"
++					register "regs" = "{ 0x77, 0x77, 0x2d, 0x00, 0x21, 0x10, 0x3b, 0x06, 0x07, 0x0f, 0xf0, 0x01, 0x1e, 0x7f, 0x80, 0x80, 0x10, 0x08, 0x04, 0x01 }"
++					device i2c 69 on end
++				end
+ 			end
++
+ 		end
+ 	end
+ end
+-- 
+2.39.2
+
diff --git a/config/coreboot/i945/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch b/config/coreboot/i945/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
new file mode 100644
index 00000000..d8ca5b1f
--- /dev/null
+++ b/config/coreboot/i945/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
@@ -0,0 +1,23 @@
+From fe79712702002bf2044227d6c3cef7ae022e3539 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@osboot.org>
+Date: Sun, 3 Jan 2021 03:34:01 +0000
+Subject: [PATCH 03/18] lenovo/x60: 64MiB Video RAM changed to default
+ (previously it was 8MiB)
+
+---
+ src/mainboard/lenovo/x60/cmos.default | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/mainboard/lenovo/x60/cmos.default b/src/mainboard/lenovo/x60/cmos.default
+index 5c3576d1f3..88170a1aab 100644
+--- a/src/mainboard/lenovo/x60/cmos.default
++++ b/src/mainboard/lenovo/x60/cmos.default
+@@ -15,4 +15,4 @@ trackpoint=Enable
+ sticky_fn=Disable
+ power_management_beeps=Enable
+ low_battery_beep=Enable
+-gfx_uma_size=8M
++gfx_uma_size=64M
+-- 
+2.39.2
+
diff --git a/config/coreboot/i945/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch b/config/coreboot/i945/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
new file mode 100644
index 00000000..630e68a6
--- /dev/null
+++ b/config/coreboot/i945/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
@@ -0,0 +1,22 @@
+From 79440902866bdafeec651476a5a0e51d42b43b21 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@osboot.org>
+Date: Mon, 22 Feb 2021 22:16:59 +0000
+Subject: [PATCH 04/18] lenovo/t60: make 64MiB VRAM the default in cmos.default
+
+---
+ src/mainboard/lenovo/t60/cmos.default | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/mainboard/lenovo/t60/cmos.default b/src/mainboard/lenovo/t60/cmos.default
+index af865f16da..7f03157df7 100644
+--- a/src/mainboard/lenovo/t60/cmos.default
++++ b/src/mainboard/lenovo/t60/cmos.default
+@@ -15,4 +15,4 @@ trackpoint=Enable
+ sticky_fn=Disable
+ power_management_beeps=Enable
+ low_battery_beep=Enable
+-gfx_uma_size=8M
++gfx_uma_size=64M
+-- 
+2.39.2
+
diff --git a/config/coreboot/i945/patches/0005-buildgcc-use-mirrorservice-for-gnu-toolchains.patch b/config/coreboot/i945/patches/0005-buildgcc-use-mirrorservice-for-gnu-toolchains.patch
new file mode 100644
index 00000000..dcb28780
--- /dev/null
+++ b/config/coreboot/i945/patches/0005-buildgcc-use-mirrorservice-for-gnu-toolchains.patch
@@ -0,0 +1,34 @@
+From 5d8fc92948782e9837b26ee8cdfaa88f41fce174 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Fri, 26 Apr 2024 09:16:57 +0100
+Subject: [PATCH 1/1] buildgcc: use mirrorservice for gnu toolchains
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ util/crossgcc/buildgcc | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index 0de27ed6e8..0faea86894 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -66,11 +66,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
+ # to the jenkins build as well, or the builder won't download it.
+ 
+ # GCC toolchain archive locations
+-GMP_BASE_URL="https://ftpmirror.gnu.org/gmp"
+-MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
+-MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
+-GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
+-BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
++GMP_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp"
++MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
++MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
++GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
++BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
+ IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
+ # CLANG toolchain archive locations
+ LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
+-- 
+2.39.2
+
diff --git a/config/coreboot/i945/patches/0006-drivers-pc80-rtc-option.c-Stop-resetting-CMOS-during.patch b/config/coreboot/i945/patches/0006-drivers-pc80-rtc-option.c-Stop-resetting-CMOS-during.patch
new file mode 100644
index 00000000..e11e33da
--- /dev/null
+++ b/config/coreboot/i945/patches/0006-drivers-pc80-rtc-option.c-Stop-resetting-CMOS-during.patch
@@ -0,0 +1,56 @@
+From 412f1d68c610f69384b156f09f0b326af984b7cc Mon Sep 17 00:00:00 2001
+From: Bill XIE <persmule@hardenedlinux.org>
+Date: Sat, 7 Oct 2023 01:32:51 +0800
+Subject: [PATCH 1/2] drivers/pc80/rtc/option.c: Stop resetting CMOS during s3
+ resume
+
+After commit e12b313844da ("drivers/pc80/rtc/option.c: Allow CMOS
+defaults to extend to bank 1"), Thinkpad X200 with
+CONFIG(STATIC_OPTION_TABLE) can no longer resume from s3 (detected via
+bisect).
+
+Further inspection shows that DRAM training result of GM45 is stored
+in CMOS above 128 bytes in raminit_read_write_training.c, for s3 resume
+to restore, but it will be erased by sanitize_cmos(), which now clears
+both bank 0 and bank 1, leaving only "untrained" result restored, so s3
+resume will fail.
+
+However, resetting CMOS seems unnecessary during s3 resume. Now,
+cmos_need_reset will be negated when acpi_is_wakeup_s3() returns true.
+
+Tested: Thinkpad X200 with CONFIG(STATIC_OPTION_TABLE) can resume from
+	s3 again with these changes.
+
+Change-Id: I533e83f3b95f327b0e24f4d750f8812325b7770b
+Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
+Reviewed-on: https://review.coreboot.org/c/coreboot/+/78288
+Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
+Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
+---
+ src/drivers/pc80/rtc/option.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/src/drivers/pc80/rtc/option.c b/src/drivers/pc80/rtc/option.c
+index e8e2345133..e6cfa175ad 100644
+--- a/src/drivers/pc80/rtc/option.c
++++ b/src/drivers/pc80/rtc/option.c
+@@ -1,5 +1,6 @@
+ /* SPDX-License-Identifier: GPL-2.0-only */
+ 
++#include <acpi/acpi.h>
+ #include <console/console.h>
+ #include <string.h>
+ #include <cbfs.h>
+@@ -200,7 +201,8 @@ void sanitize_cmos(void)
+ {
+ 	const unsigned char *cmos_default;
+ 	const bool cmos_need_reset =
+-		CONFIG(STATIC_OPTION_TABLE) || cmos_error() || !cmos_lb_cks_valid();
++		(CONFIG(STATIC_OPTION_TABLE) || cmos_error() || !cmos_lb_cks_valid())
++		&& !acpi_is_wakeup_s3();
+ 	size_t length = 128;
+ 	size_t i;
+ 
+-- 
+2.39.2
+
diff --git a/config/coreboot/i945/patches/0007-drivers-pc80-rtc-option.c-Reset-only-CMOS-range-cove.patch b/config/coreboot/i945/patches/0007-drivers-pc80-rtc-option.c-Reset-only-CMOS-range-cove.patch
new file mode 100644
index 00000000..1a614db7
--- /dev/null
+++ b/config/coreboot/i945/patches/0007-drivers-pc80-rtc-option.c-Reset-only-CMOS-range-cove.patch
@@ -0,0 +1,51 @@
+From 0bc5a67f926e193a429cce4028fb382c49fa08f8 Mon Sep 17 00:00:00 2001
+From: Bill XIE <persmule@hardenedlinux.org>
+Date: Fri, 3 Nov 2023 12:34:01 +0800
+Subject: [PATCH 2/2] drivers/pc80/rtc/option.c: Reset only CMOS range covered
+ by checksum
+
+Proposed in the comment of commit 29030d0f3dad
+("drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume"),
+during sanitize_cmos(), only reset CMOS range covered by checksum and
+the checksum itself from the file cmos.default in CBFS, in order to
+prevent other runtime data in CMOS (e.g. the DRAM training data on
+GM45 platforms for s3 resume) being erased.
+
+Tested: cherry-pick this commit before commit 44a48ce7a46c ("Kconfig:
+	Bring HEAP_SIZE to a common, large value"), which is already
+	before my commit 29030d0f3dad , Thinkpad X200 with
+	CONFIG(STATIC_OPTION_TABLE) can resume from s3 again,
+	indicating that DRAM training data are no longer erased.
+
+Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
+Co-authored-by: Jonathon Hall <jonathon.hall@puri.sm>
+Change-Id: I872bf5f41422bc3424cd8631e932aaae2ae82f7a
+Reviewed-on: https://review.coreboot.org/c/coreboot/+/78906
+Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
+Reviewed-by: Nico Huber <nico.h@gmx.de>
+Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
+---
+ src/drivers/pc80/rtc/option.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/src/drivers/pc80/rtc/option.c b/src/drivers/pc80/rtc/option.c
+index e6cfa175ad..cb18e14ae9 100644
+--- a/src/drivers/pc80/rtc/option.c
++++ b/src/drivers/pc80/rtc/option.c
+@@ -213,8 +213,12 @@ void sanitize_cmos(void)
+ 			return;
+ 
+ 		u8 control_state = cmos_disable_rtc();
+-		for (i = 14; i < MIN(128, length); i++)
++		/* Copy checked range and the checksum from the default */
++		for (i = LB_CKS_RANGE_START; i < MIN(LB_CKS_RANGE_END + 1, length); i++)
+ 			cmos_write_inner(cmos_default[i], i);
++		/* CMOS checksum takes 2 bytes */
++		cmos_write_inner(cmos_default[LB_CKS_LOC], LB_CKS_LOC);
++		cmos_write_inner(cmos_default[LB_CKS_LOC + 1], LB_CKS_LOC + 1);
+ 		cmos_restore_rtc(control_state);
+ 	}
+ }
+-- 
+2.39.2
+
diff --git a/config/coreboot/i945/patches/0022-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/i945/patches/0022-Remove-warning-for-coreboot-images-built-without-a-p.patch
new file mode 100644
index 00000000..547c6392
--- /dev/null
+++ b/config/coreboot/i945/patches/0022-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -0,0 +1,38 @@
+From 1ce4f118b024a6367382b46016781f30fe622e3e Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 12 May 2023 19:55:15 -0600
+Subject: [PATCH] Remove warning for coreboot images built without a payload
+
+I added this in upstream to prevent people from accidentally flashing
+roms without a payload resulting in a no boot situation, but in
+libreboot lbmk handles the payload and thus this warning always comes
+up. This has caused confusion and concern so just patch it out.
+---
+ payloads/Makefile.inc | 13 +------------
+ 1 file changed, 1 insertion(+), 12 deletions(-)
+
+diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc
+index e735443a76..4f1692a873 100644
+--- a/payloads/Makefile.inc
++++ b/payloads/Makefile.inc
+@@ -49,16 +49,5 @@ distclean-payloads:
+ print-repo-info-payloads:
+ 	-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
+ 
+-ifeq ($(CONFIG_PAYLOAD_NONE),y)
+-files_added:: warn_no_payload
+-endif
+-
+-warn_no_payload:
+-	printf "\n\t** WARNING **\n"
+-	printf "coreboot has been built without a payload. Writing\n"
+-	printf "a coreboot image without a payload to your board's\n"
+-	printf "flash chip will result in a non-booting system. You\n"
+-	printf "can use cbfstool to add a payload to the image.\n\n"
+-
+ .PHONY: force-payload coreinfo nvramcui
+-.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
++.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
+-- 
+2.40.1
+
diff --git a/config/coreboot/i945/target.cfg b/config/coreboot/i945/target.cfg
new file mode 100644
index 00000000..16a4de7d
--- /dev/null
+++ b/config/coreboot/i945/target.cfg
@@ -0,0 +1,2 @@
+tree="i945"
+rev="e70bc423f9a2e1d13827f2703efe1f9c72549f20"
diff --git a/config/coreboot/macbook11/config/libgfxinit_corebootfb b/config/coreboot/macbook11/config/libgfxinit_corebootfb
index 17efec62..1fe47062 100644
--- a/config/coreboot/macbook11/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11/config/libgfxinit_corebootfb
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -63,7 +62,6 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
@@ -77,9 +75,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -115,12 +111,10 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Apple"
 CONFIG_CBFS_SIZE=0x00200000
-CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -135,33 +129,30 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+# CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -175,7 +166,6 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -203,23 +193,22 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
+CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -230,6 +219,7 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -247,12 +237,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
+CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
+CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -272,7 +263,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -310,11 +301,8 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -324,7 +312,6 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -350,7 +337,8 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -358,13 +346,22 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -382,11 +379,11 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_DRIVERS_UART=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -402,14 +399,13 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -431,11 +427,6 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -455,14 +446,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -470,39 +457,22 @@ CONFIG_HEAP_SIZE=0x100000
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -510,7 +480,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
+CONFIG_HWBASE_DEBUG_NULL=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -526,7 +496,6 @@ CONFIG_HAVE_MP_TABLE=y
 #
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -545,10 +514,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
-#
-# Vendorcode Debug Settings
-#
-
 #
 # BLOB Debug Settings
 #
@@ -556,19 +521,16 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook11/config/libgfxinit_txtmode b/config/coreboot/macbook11/config/libgfxinit_txtmode
index da70f85a..5779bb7f 100644
--- a/config/coreboot/macbook11/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11/config/libgfxinit_txtmode
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -63,7 +62,6 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
@@ -77,9 +75,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -115,12 +111,10 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Apple"
 CONFIG_CBFS_SIZE=0x00200000
-CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -135,33 +129,30 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+# CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -175,7 +166,6 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -203,23 +193,22 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
+CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -230,6 +219,7 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -247,12 +237,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
+CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
+CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -272,7 +263,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -310,11 +301,8 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -324,7 +312,6 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -348,7 +335,8 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -356,13 +344,22 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -380,11 +377,11 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_DRIVERS_UART=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -400,14 +397,13 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -429,11 +425,6 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -453,14 +444,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -468,39 +455,22 @@ CONFIG_HEAP_SIZE=0x100000
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -508,7 +478,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
+CONFIG_HWBASE_DEBUG_NULL=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -524,7 +494,6 @@ CONFIG_HAVE_MP_TABLE=y
 #
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -543,10 +512,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
-#
-# Vendorcode Debug Settings
-#
-
 #
 # BLOB Debug Settings
 #
@@ -554,19 +519,16 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index cc83f2c3..dcf5d1de 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -1,4 +1,4 @@
-tree="default"
+tree="i945"
 xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
index 8dc8524d..634f287c 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
@@ -17,12 +17,10 @@ CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -63,7 +61,6 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
@@ -77,9 +74,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -115,12 +110,10 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Apple"
 CONFIG_CBFS_SIZE=0x01000000
-CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -135,33 +128,30 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+# CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -175,7 +165,6 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -203,23 +192,22 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
+CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -230,6 +218,7 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -247,12 +236,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
+CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
+CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -272,7 +262,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -310,11 +300,8 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -324,7 +311,6 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -350,7 +336,8 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -358,13 +345,22 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -382,11 +378,11 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_DRIVERS_UART=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -402,14 +398,13 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -431,11 +426,6 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -455,14 +445,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -470,27 +456,10 @@ CONFIG_HEAP_SIZE=0x100000
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
@@ -526,7 +495,6 @@ CONFIG_HAVE_MP_TABLE=y
 #
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -545,10 +513,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
-#
-# Vendorcode Debug Settings
-#
-
 #
 # BLOB Debug Settings
 #
@@ -556,7 +520,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
@@ -568,7 +531,6 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
index 2dee7106..6549df1b 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
@@ -17,12 +17,10 @@ CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -63,7 +61,6 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
@@ -77,9 +74,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -115,12 +110,10 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Apple"
 CONFIG_CBFS_SIZE=0x01000000
-CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -135,33 +128,30 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+# CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -175,7 +165,6 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -203,23 +192,22 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
+CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -230,6 +218,7 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -247,12 +236,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
+CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
+CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -272,7 +262,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -310,11 +300,8 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -324,7 +311,6 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -348,7 +334,8 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -356,13 +343,22 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -380,11 +376,11 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_DRIVERS_UART=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -400,14 +396,13 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -429,11 +424,6 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -453,14 +443,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -468,27 +454,10 @@ CONFIG_HEAP_SIZE=0x100000
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
@@ -524,7 +493,6 @@ CONFIG_HAVE_MP_TABLE=y
 #
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -543,10 +511,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
-#
-# Vendorcode Debug Settings
-#
-
 #
 # BLOB Debug Settings
 #
@@ -554,7 +518,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
@@ -566,7 +529,6 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index cc83f2c3..dcf5d1de 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -1,4 +1,4 @@
-tree="default"
+tree="i945"
 xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/macbook21/config/libgfxinit_corebootfb b/config/coreboot/macbook21/config/libgfxinit_corebootfb
index ca8b079b..900e1b32 100644
--- a/config/coreboot/macbook21/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21/config/libgfxinit_corebootfb
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -63,7 +62,6 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
@@ -77,9 +75,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -115,12 +111,10 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Apple"
 CONFIG_CBFS_SIZE=0x00200000
-CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -135,33 +129,30 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+# CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -175,7 +166,6 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -203,23 +193,22 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
+CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -230,6 +219,7 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -247,12 +237,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
+CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
+CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -272,7 +263,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -310,11 +301,8 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -324,7 +312,6 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -350,7 +337,8 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -358,13 +346,22 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -382,11 +379,11 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_DRIVERS_UART=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -402,14 +399,13 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -431,11 +427,6 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -455,14 +446,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -470,39 +457,22 @@ CONFIG_HEAP_SIZE=0x100000
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -510,7 +480,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
+CONFIG_HWBASE_DEBUG_NULL=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -526,7 +496,6 @@ CONFIG_HAVE_MP_TABLE=y
 #
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -545,10 +514,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
-#
-# Vendorcode Debug Settings
-#
-
 #
 # BLOB Debug Settings
 #
@@ -556,19 +521,16 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook21/config/libgfxinit_txtmode b/config/coreboot/macbook21/config/libgfxinit_txtmode
index db019922..49cde773 100644
--- a/config/coreboot/macbook21/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21/config/libgfxinit_txtmode
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -63,7 +62,6 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
@@ -77,9 +75,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -115,12 +111,10 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Apple"
 CONFIG_CBFS_SIZE=0x00200000
-CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -135,33 +129,30 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+# CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -175,7 +166,6 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -203,23 +193,22 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
+CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -230,6 +219,7 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -247,12 +237,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
+CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
+CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -272,7 +263,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -310,11 +301,8 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -324,7 +312,6 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -348,7 +335,8 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -356,13 +344,22 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -380,11 +377,11 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_DRIVERS_UART=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -400,14 +397,13 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -429,11 +425,6 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -453,14 +444,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -468,39 +455,22 @@ CONFIG_HEAP_SIZE=0x100000
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -508,7 +478,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
+CONFIG_HWBASE_DEBUG_NULL=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -524,7 +494,6 @@ CONFIG_HAVE_MP_TABLE=y
 #
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -543,10 +512,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
-#
-# Vendorcode Debug Settings
-#
-
 #
 # BLOB Debug Settings
 #
@@ -554,19 +519,16 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index 8688df3f..bb56ec25 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -1,4 +1,4 @@
-tree="default"
+tree="i945"
 xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
index 06889a94..70287afc 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
@@ -17,12 +17,10 @@ CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -63,7 +61,6 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
@@ -77,9 +74,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -115,12 +110,10 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Apple"
 CONFIG_CBFS_SIZE=0x01000000
-CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -135,33 +128,30 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+# CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -175,7 +165,6 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -203,23 +192,22 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
+CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -230,6 +218,7 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -247,12 +236,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
+CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
+CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -272,7 +262,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -310,11 +300,8 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -324,7 +311,6 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -350,7 +336,8 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -358,13 +345,22 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -382,11 +378,11 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_DRIVERS_UART=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -402,14 +398,13 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -431,11 +426,6 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -455,14 +445,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -470,27 +456,10 @@ CONFIG_HEAP_SIZE=0x100000
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
@@ -526,7 +495,6 @@ CONFIG_HAVE_MP_TABLE=y
 #
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -545,10 +513,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
-#
-# Vendorcode Debug Settings
-#
-
 #
 # BLOB Debug Settings
 #
@@ -556,7 +520,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
@@ -568,7 +531,6 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
index 9e9ec4f9..e9712d24 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
@@ -17,12 +17,10 @@ CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -63,7 +61,6 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
@@ -77,9 +74,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -115,12 +110,10 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="Apple"
 CONFIG_CBFS_SIZE=0x01000000
-CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -135,33 +128,30 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+# CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -175,7 +165,6 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -203,23 +192,22 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
+CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -230,6 +218,7 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -247,12 +236,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
+CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
+CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -272,7 +262,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
@@ -310,11 +300,8 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -324,7 +311,6 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -348,7 +334,8 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -356,13 +343,22 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -380,11 +376,11 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_DRIVERS_UART=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -400,14 +396,13 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -429,11 +424,6 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -453,14 +443,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -468,27 +454,10 @@ CONFIG_HEAP_SIZE=0x100000
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
@@ -524,7 +493,6 @@ CONFIG_HAVE_MP_TABLE=y
 #
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -543,10 +511,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
-#
-# Vendorcode Debug Settings
-#
-
 #
 # BLOB Debug Settings
 #
@@ -554,7 +518,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
@@ -566,7 +529,6 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index 8688df3f..bb56ec25 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -1,4 +1,4 @@
-tree="default"
+tree="i945"
 xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
index 64ef081d..7867f6dd 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -63,7 +62,6 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
@@ -77,9 +75,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -116,12 +112,10 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x01000000
-CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t60"
@@ -134,25 +128,22 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="IBM0057"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
@@ -184,22 +175,20 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+# CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -213,7 +202,6 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -241,26 +229,25 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
+CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
-CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
+# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 
 #
@@ -268,6 +255,7 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -285,12 +273,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
+CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
+CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -310,7 +299,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_TI_PCI1X2X=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -345,8 +334,8 @@ CONFIG_SUPERIO_NSC_PC87384=y
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_BEEP_ON_DEATH is not set
+# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
@@ -357,11 +346,8 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -371,7 +357,6 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -397,7 +382,8 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -405,6 +391,11 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -412,7 +403,11 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -430,11 +425,11 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_DRIVERS_UART=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -450,18 +445,13 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -483,11 +473,6 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -507,14 +492,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -522,39 +503,22 @@ CONFIG_HEAP_SIZE=0x100000
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -562,7 +526,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
+CONFIG_HWBASE_DEBUG_NULL=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -579,7 +543,6 @@ CONFIG_HAVE_MP_TABLE=y
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
-CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -598,10 +561,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
-#
-# Vendorcode Debug Settings
-#
-
 #
 # BLOB Debug Settings
 #
@@ -609,19 +568,16 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
index a04bafeb..aee059ba 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -63,7 +62,6 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
@@ -77,9 +75,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -116,12 +112,10 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x01000000
-CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t60"
@@ -134,25 +128,22 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="IBM0057"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
@@ -184,22 +175,20 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+# CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -213,7 +202,6 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -241,26 +229,25 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
+CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
-CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
+# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 
 #
@@ -268,6 +255,7 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -285,12 +273,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
+CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
+CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -310,7 +299,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_TI_PCI1X2X=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -345,8 +334,8 @@ CONFIG_SUPERIO_NSC_PC87384=y
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_BEEP_ON_DEATH is not set
+# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
@@ -357,11 +346,8 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -371,7 +357,6 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -395,7 +380,8 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -403,6 +389,11 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -410,7 +401,11 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -428,11 +423,11 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_DRIVERS_UART=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -448,18 +443,13 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -481,11 +471,6 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -505,14 +490,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -520,39 +501,22 @@ CONFIG_HEAP_SIZE=0x100000
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -560,7 +524,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
+CONFIG_HWBASE_DEBUG_NULL=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -577,7 +541,6 @@ CONFIG_HAVE_MP_TABLE=y
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
-CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -596,10 +559,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
-#
-# Vendorcode Debug Settings
-#
-
 #
 # BLOB Debug Settings
 #
@@ -607,19 +566,16 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 5316aa6f..2daf00f7 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -1,4 +1,4 @@
-tree="default"
+tree="i945"
 xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
index 0916331f..b42d92e7 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -63,7 +62,6 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
@@ -77,9 +75,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -116,12 +112,10 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x00200000
-CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t60"
@@ -134,25 +128,22 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="IBM0057"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
@@ -184,22 +175,20 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+# CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -213,7 +202,6 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -241,26 +229,25 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
+CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
-CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
+# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 
 #
@@ -268,6 +255,7 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -285,12 +273,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
+CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
+CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -310,7 +299,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_TI_PCI1X2X=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -345,8 +334,8 @@ CONFIG_SUPERIO_NSC_PC87384=y
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_BEEP_ON_DEATH is not set
+# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
@@ -357,11 +346,8 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -371,7 +357,6 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -397,7 +382,8 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -405,6 +391,11 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -412,7 +403,11 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -430,11 +425,11 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_DRIVERS_UART=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -450,18 +445,13 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -483,11 +473,6 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -507,14 +492,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -522,39 +503,22 @@ CONFIG_HEAP_SIZE=0x100000
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -562,7 +526,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
+CONFIG_HWBASE_DEBUG_NULL=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -579,7 +543,6 @@ CONFIG_HAVE_MP_TABLE=y
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
-CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -598,10 +561,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
-#
-# Vendorcode Debug Settings
-#
-
 #
 # BLOB Debug Settings
 #
@@ -609,19 +568,16 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
index b41b4286..1fc2ab3c 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -63,7 +62,6 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
@@ -77,9 +75,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -116,12 +112,10 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x00200000
-CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t60"
@@ -134,25 +128,22 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="IBM0057"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
@@ -184,22 +175,20 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+# CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -213,7 +202,6 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -241,26 +229,25 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
+CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
-CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
+# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 
 #
@@ -268,6 +255,7 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -285,12 +273,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
+CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
+CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -310,7 +299,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_TI_PCI1X2X=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -345,8 +334,8 @@ CONFIG_SUPERIO_NSC_PC87384=y
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_BEEP_ON_DEATH is not set
+# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
@@ -357,11 +346,8 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -371,7 +357,6 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -395,7 +380,8 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -403,6 +389,11 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -410,7 +401,11 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -428,11 +423,11 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_DRIVERS_UART=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -448,18 +443,13 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -481,11 +471,6 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -505,14 +490,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -520,39 +501,22 @@ CONFIG_HEAP_SIZE=0x100000
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -560,7 +524,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
+CONFIG_HWBASE_DEBUG_NULL=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -577,7 +541,6 @@ CONFIG_HAVE_MP_TABLE=y
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
-CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -596,10 +559,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
-#
-# Vendorcode Debug Settings
-#
-
 #
 # BLOB Debug Settings
 #
@@ -607,19 +566,16 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 5316aa6f..2daf00f7 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -1,4 +1,4 @@
-tree="default"
+tree="i945"
 xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x60/config/libgfxinit_corebootfb b/config/coreboot/x60/config/libgfxinit_corebootfb
index da9884e7..8197735b 100644
--- a/config/coreboot/x60/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60/config/libgfxinit_corebootfb
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -63,7 +62,6 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
@@ -77,9 +75,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -116,14 +112,13 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x00200000
-CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
+CONFIG_VBOOT_VBNV_OFFSET=0x76
 CONFIG_IRQ_SLOT_COUNT=18
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
@@ -134,26 +129,23 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="IBM3780"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
@@ -185,22 +177,20 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 CONFIG_BOARD_LENOVO_X60=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+# CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -214,7 +204,6 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -242,26 +231,25 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
+CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
-CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
+# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 
 #
@@ -269,6 +257,7 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -286,12 +275,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
+CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
+CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -311,7 +301,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_RICOH_RL5C476=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -347,8 +337,8 @@ CONFIG_SUPERIO_NSC_PC87392=y
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_BEEP_ON_DEATH is not set
+# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
@@ -359,11 +349,8 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -373,7 +360,6 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -399,7 +385,8 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -407,6 +394,11 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -414,7 +406,11 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -436,11 +432,11 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_DRIVERS_UART=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -456,18 +452,13 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -489,11 +480,6 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -513,14 +499,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -528,39 +510,22 @@ CONFIG_HEAP_SIZE=0x100000
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -568,7 +533,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
+CONFIG_HWBASE_DEBUG_NULL=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -587,7 +552,6 @@ CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_PIRQ_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
-CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -606,10 +570,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
-#
-# Vendorcode Debug Settings
-#
-
 #
 # BLOB Debug Settings
 #
@@ -617,7 +577,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
@@ -625,12 +584,10 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/x60/config/libgfxinit_txtmode b/config/coreboot/x60/config/libgfxinit_txtmode
index 218e23f4..9ac40a02 100644
--- a/config/coreboot/x60/config/libgfxinit_txtmode
+++ b/config/coreboot/x60/config/libgfxinit_txtmode
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -63,7 +62,6 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
@@ -77,9 +75,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -116,14 +112,13 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x00200000
-CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
+CONFIG_VBOOT_VBNV_OFFSET=0x76
 CONFIG_IRQ_SLOT_COUNT=18
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
@@ -134,26 +129,23 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="IBM3780"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
@@ -185,22 +177,20 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 CONFIG_BOARD_LENOVO_X60=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+# CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -214,7 +204,6 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -242,26 +231,25 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
+CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
-CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
+# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 
 #
@@ -269,6 +257,7 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -286,12 +275,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
+CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
+CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -311,7 +301,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_RICOH_RL5C476=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -347,8 +337,8 @@ CONFIG_SUPERIO_NSC_PC87392=y
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_BEEP_ON_DEATH is not set
+# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
@@ -359,11 +349,8 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -373,7 +360,6 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -397,7 +383,8 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -405,6 +392,11 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -412,7 +404,11 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -434,11 +430,11 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_DRIVERS_UART=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -454,18 +450,13 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -487,11 +478,6 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -511,14 +497,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -526,39 +508,22 @@ CONFIG_HEAP_SIZE=0x100000
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -566,7 +531,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
+CONFIG_HWBASE_DEBUG_NULL=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -585,7 +550,6 @@ CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_PIRQ_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
-CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -604,10 +568,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
-#
-# Vendorcode Debug Settings
-#
-
 #
 # BLOB Debug Settings
 #
@@ -615,7 +575,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
@@ -623,12 +582,10 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 5316aa6f..2daf00f7 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -1,4 +1,4 @@
-tree="default"
+tree="i945"
 xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
index 68b98d98..fc3a4402 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -63,7 +62,6 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
@@ -77,9 +75,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -116,14 +112,13 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x01000000
-CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
+CONFIG_VBOOT_VBNV_OFFSET=0x76
 CONFIG_IRQ_SLOT_COUNT=18
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
@@ -134,26 +129,23 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="IBM3780"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
@@ -185,22 +177,20 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 CONFIG_BOARD_LENOVO_X60=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+# CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -214,7 +204,6 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -242,26 +231,25 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
+CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
-CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
+# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 
 #
@@ -269,6 +257,7 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -286,12 +275,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
+CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
+CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -311,7 +301,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_RICOH_RL5C476=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -347,8 +337,8 @@ CONFIG_SUPERIO_NSC_PC87392=y
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_BEEP_ON_DEATH is not set
+# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
@@ -359,11 +349,8 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -373,7 +360,6 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -399,7 +385,8 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -407,6 +394,11 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -414,7 +406,11 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -436,11 +432,11 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_DRIVERS_UART=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -456,18 +452,13 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -489,11 +480,6 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -513,14 +499,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -528,39 +510,22 @@ CONFIG_HEAP_SIZE=0x100000
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -568,7 +533,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
+CONFIG_HWBASE_DEBUG_NULL=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -587,7 +552,6 @@ CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_PIRQ_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
-CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -606,10 +570,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
-#
-# Vendorcode Debug Settings
-#
-
 #
 # BLOB Debug Settings
 #
@@ -617,7 +577,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
@@ -625,12 +584,10 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_txtmode b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
index f6883deb..c4049565 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
@@ -22,7 +22,6 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -63,7 +62,6 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
@@ -77,9 +75,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -116,14 +112,13 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x01000000
-CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
+CONFIG_VBOOT_VBNV_OFFSET=0x76
 CONFIG_IRQ_SLOT_COUNT=18
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
@@ -134,26 +129,23 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="IBM3780"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
@@ -185,22 +177,20 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 CONFIG_BOARD_LENOVO_X60=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_DEBUG_SMI is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+# CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x4000
 CONFIG_EC_GPE_SCI=0x50
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -214,7 +204,6 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -242,26 +231,25 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
 CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
+CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
-CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y
+# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
 CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 
 #
@@ -269,6 +257,7 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -286,12 +275,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
+CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
+CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -311,7 +301,7 @@ CONFIG_I945_LVDS=y
 #
 # Southbridge
 #
-# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_PCIEXP_HOTPLUG=y
 CONFIG_SOUTHBRIDGE_INTEL_I82801GX=y
 CONFIG_SOUTHBRIDGE_RICOH_RL5C476=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
@@ -347,8 +337,8 @@ CONFIG_SUPERIO_NSC_PC87392=y
 #
 CONFIG_EC_ACPI=y
 CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_BEEP_ON_DEATH is not set
+# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
@@ -359,11 +349,8 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -373,7 +360,6 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
 # end of Chipset
 
 #
@@ -397,7 +383,8 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -405,6 +392,11 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
 CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
 # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+CONFIG_FIRMWARE_CONNECTION_MANAGER=y
+# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -412,7 +404,11 @@ CONFIG_INTEL_GMA_HAVE_VBT=y
 CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_NO_DDR5=y
+CONFIG_NO_LPDDR4=y
+CONFIG_NO_DDR4=y
+CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -434,11 +430,11 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_DRIVERS_UART=y
+CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -454,18 +450,13 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
 # end of Generic Drivers
 
 #
@@ -487,11 +478,6 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -511,14 +497,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -526,39 +508,22 @@ CONFIG_HEAP_SIZE=0x100000
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -566,7 +531,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
+CONFIG_HWBASE_DEBUG_NULL=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -585,7 +550,6 @@ CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_PIRQ_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
-CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -604,10 +568,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
-#
-# Vendorcode Debug Settings
-#
-
 #
 # BLOB Debug Settings
 #
@@ -615,7 +575,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
@@ -623,12 +582,10 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 5316aa6f..2daf00f7 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -1,4 +1,4 @@
-tree="default"
+tree="i945"
 xarch="i386-elf"
 payload_grub="y"
 payload_grub_withseabios="y"

From ce7fd754a3d831c563a8589f1cc35e55ce027814 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 26 Apr 2024 19:41:00 +0100
Subject: [PATCH 0260/1549] build/roms: report status when building images

export LBMK_VERSION_TYPE=x
x can be: stable, unstable

in target.cfg files, specify:
status=x
x can be: stable, unstable, broken, untested
if unset, lbmk defaults to "unknown"

if LBMK_VERSION_TYPE is set, no confirmation is asked
if the given target matches what's set (but what's set
in that environmental variable can only be stable or
unstable)

if LBMK_RELEASE="y", no confirmation is asked, unless
the target is something other than stable/unstable

"unstable" means it works, but has a few non-breaking
bugs, e.g. broken s3 on dell e6400

whereas, if raminit regularly fails or it is so absolutely
unreliable as to be unusable, then the board should be
declared "broken"

untested means: it has not been tested

With this change, it should now be easier to track whether
a given board is tested, in preparation for releases. When
working on trees/boards, status can be set for targets.

Also: in the board directory, you can add a "warn.txt" file
which will display a message. For example, if a board has a
particular quirk to watch out for, write that there. The message
will be printed during the build process, to stdout.

If status is anything *other* than stable, or it is unstable
but LBMK_VERSION_TYPE is not set to "unstable", and not building
a release, a confirmation is passed.

If the board is not specified as stable or unstable, during
a release build, the build is skipped and the ROM is not
provided in that release; this is in *addition* to
release="n" or release="y" that can be set in target.cfg,
which will skip the release build for that target if "n"

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/d510mo/target.cfg             |  1 +
 config/coreboot/d510mo_16mb/target.cfg        |  1 +
 config/coreboot/d945gclf_512kb/target.cfg     |  1 +
 config/coreboot/d945gclf_8mb/target.cfg       |  1 +
 .../coreboot/dell9020mt-nri_12mb/target.cfg   |  1 +
 config/coreboot/dell9020mt_12mb/target.cfg    |  1 +
 .../coreboot/dell9020mtbmrc_12mb/target.cfg   |  1 +
 .../coreboot/dell9020sff-nri_12mb/target.cfg  |  1 +
 config/coreboot/dell9020sff_12mb/target.cfg   |  1 +
 .../coreboot/dell9020sffbmrc_12mb/target.cfg  |  1 +
 config/coreboot/e5420_6mb/target.cfg          |  1 +
 config/coreboot/e5520_6mb/target.cfg          |  1 +
 config/coreboot/e5530_12mb/target.cfg         |  1 +
 config/coreboot/e6400_4mb/target.cfg          |  1 +
 config/coreboot/e6400_4mb/warn.txt            |  1 +
 config/coreboot/e6400nvidia_4mb/target.cfg    |  1 +
 config/coreboot/e6400nvidia_4mb/warn.txt      |  2 +
 config/coreboot/e6420_10mb/target.cfg         |  1 +
 config/coreboot/e6430_12mb/target.cfg         |  1 +
 config/coreboot/e6520_10mb/target.cfg         |  1 +
 config/coreboot/e6530_12mb/target.cfg         |  1 +
 config/coreboot/g43t-am3/target.cfg           |  1 +
 config/coreboot/g43t-am3_16mb/target.cfg      |  1 +
 config/coreboot/ga-g41m-es2l/target.cfg       |  1 +
 config/coreboot/gru_bob/target.cfg            |  1 +
 config/coreboot/gru_kevin/target.cfg          |  1 +
 config/coreboot/hp2170p_16mb/target.cfg       |  1 +
 config/coreboot/hp2560p_8mb/target.cfg        |  1 +
 config/coreboot/hp2570p_16mb/target.cfg       |  1 +
 config/coreboot/hp8200sff_4mb/target.cfg      |  1 +
 config/coreboot/hp8200sff_8mb/target.cfg      |  1 +
 config/coreboot/hp820g2_12mb/target.cfg       |  1 +
 config/coreboot/hp8300cmt_16mb/target.cfg     |  1 +
 config/coreboot/hp8300usdt_16mb/target.cfg    |  1 +
 config/coreboot/hp8460pintel_8mb/target.cfg   |  1 +
 config/coreboot/hp8470pintel_16mb/target.cfg  |  1 +
 config/coreboot/hp8560w_8mb/target.cfg        |  1 +
 config/coreboot/hp9470m_16mb/target.cfg       |  1 +
 config/coreboot/kcma-d8-rdimm_16mb/target.cfg |  1 +
 config/coreboot/kcma-d8-rdimm_2mb/target.cfg  |  1 +
 config/coreboot/kcma-d8-udimm_16mb/target.cfg |  1 +
 config/coreboot/kcma-d8-udimm_2mb/target.cfg  |  1 +
 config/coreboot/kfsn4-dre_1mb/target.cfg      |  1 +
 config/coreboot/kfsn4-dre_2mb/target.cfg      |  1 +
 .../coreboot/kgpe-d16-rdimm_16mb/target.cfg   |  1 +
 config/coreboot/kgpe-d16-rdimm_2mb/target.cfg |  1 +
 .../coreboot/kgpe-d16-udimm_16mb/target.cfg   |  1 +
 config/coreboot/kgpe-d16-udimm_2mb/target.cfg |  1 +
 config/coreboot/macbook11/target.cfg          |  1 +
 config/coreboot/macbook11_16mb/target.cfg     |  1 +
 config/coreboot/macbook21/target.cfg          |  1 +
 config/coreboot/macbook21_16mb/target.cfg     |  1 +
 config/coreboot/qemu_arm64_12mb/target.cfg    |  1 +
 config/coreboot/qemu_x86_12mb/target.cfg      |  1 +
 config/coreboot/r400_16mb/target.cfg          |  1 +
 config/coreboot/r400_4mb/target.cfg           |  1 +
 config/coreboot/r400_8mb/target.cfg           |  1 +
 config/coreboot/r500_4mb/target.cfg           |  1 +
 config/coreboot/t1650_12mb/target.cfg         |  1 +
 config/coreboot/t400_16mb/target.cfg          |  1 +
 config/coreboot/t400_4mb/target.cfg           |  1 +
 config/coreboot/t400_8mb/target.cfg           |  1 +
 config/coreboot/t420_8mb/target.cfg           |  1 +
 config/coreboot/t420s_8mb/target.cfg          |  1 +
 config/coreboot/t430_12mb/target.cfg          |  1 +
 config/coreboot/t440pbmrc_12mb/target.cfg     |  1 +
 config/coreboot/t440plibremrc_12mb/target.cfg |  1 +
 config/coreboot/t440pmrc_12mb/target.cfg      |  1 +
 config/coreboot/t500_16mb/target.cfg          |  1 +
 config/coreboot/t500_4mb/target.cfg           |  1 +
 config/coreboot/t500_8mb/target.cfg           |  1 +
 config/coreboot/t520_8mb/target.cfg           |  1 +
 config/coreboot/t530_12mb/target.cfg          |  1 +
 config/coreboot/t60_16mb_intelgpu/target.cfg  |  1 +
 config/coreboot/t60_intelgpu/target.cfg       |  1 +
 config/coreboot/w500_16mb/target.cfg          |  1 +
 config/coreboot/w500_4mb/target.cfg           |  1 +
 config/coreboot/w500_8mb/target.cfg           |  1 +
 config/coreboot/w530_12mb/target.cfg          |  1 +
 config/coreboot/w541_12mb/target.cfg          |  1 +
 config/coreboot/w541bmrc_12mb/target.cfg      |  1 +
 config/coreboot/w541mrc_12mb/target.cfg       |  1 +
 config/coreboot/x200_16mb/target.cfg          |  1 +
 config/coreboot/x200_4mb/target.cfg           |  1 +
 config/coreboot/x200_8mb/target.cfg           |  1 +
 config/coreboot/x220_8mb/target.cfg           |  1 +
 config/coreboot/x220edp_8mb/target.cfg        |  1 +
 config/coreboot/x220edp_8mb/warn.txt          |  1 +
 config/coreboot/x230_12mb/target.cfg          |  1 +
 config/coreboot/x230_12mb/warn.txt            |  1 +
 config/coreboot/x230_16mb/target.cfg          |  1 +
 config/coreboot/x230edp_12mb/target.cfg       |  1 +
 config/coreboot/x230t_12mb/target.cfg         |  1 +
 config/coreboot/x230t_16mb/target.cfg         |  1 +
 config/coreboot/x301_16mb/target.cfg          |  1 +
 config/coreboot/x301_4mb/target.cfg           |  1 +
 config/coreboot/x301_8mb/target.cfg           |  1 +
 config/coreboot/x60/target.cfg                |  1 +
 config/coreboot/x60_16mb/target.cfg           |  1 +
 include/err.sh                                | 13 +++-
 script/build/roms                             | 66 +++++++++++++++++--
 101 files changed, 172 insertions(+), 7 deletions(-)
 create mode 100644 config/coreboot/e6400_4mb/warn.txt
 create mode 100644 config/coreboot/e6400nvidia_4mb/warn.txt
 create mode 100644 config/coreboot/x220edp_8mb/warn.txt
 create mode 100644 config/coreboot/x230_12mb/warn.txt

diff --git a/config/coreboot/d510mo/target.cfg b/config/coreboot/d510mo/target.cfg
index 69c1db41..f07fee9a 100644
--- a/config/coreboot/d510mo/target.cfg
+++ b/config/coreboot/d510mo/target.cfg
@@ -4,3 +4,4 @@ payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="y"
+status="untested"
diff --git a/config/coreboot/d510mo_16mb/target.cfg b/config/coreboot/d510mo_16mb/target.cfg
index 1e7b56ca..a99b11f0 100644
--- a/config/coreboot/d510mo_16mb/target.cfg
+++ b/config/coreboot/d510mo_16mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+status="untested"
diff --git a/config/coreboot/d945gclf_512kb/target.cfg b/config/coreboot/d945gclf_512kb/target.cfg
index cfae0b2c..5899fae2 100644
--- a/config/coreboot/d945gclf_512kb/target.cfg
+++ b/config/coreboot/d945gclf_512kb/target.cfg
@@ -4,3 +4,4 @@ payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="n"
+status="untested"
diff --git a/config/coreboot/d945gclf_8mb/target.cfg b/config/coreboot/d945gclf_8mb/target.cfg
index cfae0b2c..5899fae2 100644
--- a/config/coreboot/d945gclf_8mb/target.cfg
+++ b/config/coreboot/d945gclf_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="n"
+status="untested"
diff --git a/config/coreboot/dell9020mt-nri_12mb/target.cfg b/config/coreboot/dell9020mt-nri_12mb/target.cfg
index 37d8f553..bc4053d4 100644
--- a/config/coreboot/dell9020mt-nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt-nri_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="stable"
diff --git a/config/coreboot/dell9020mt_12mb/target.cfg b/config/coreboot/dell9020mt_12mb/target.cfg
index 0da057a9..a3acd5fb 100644
--- a/config/coreboot/dell9020mt_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_12mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
+status="stable"
diff --git a/config/coreboot/dell9020mtbmrc_12mb/target.cfg b/config/coreboot/dell9020mtbmrc_12mb/target.cfg
index 0da057a9..a3acd5fb 100644
--- a/config/coreboot/dell9020mtbmrc_12mb/target.cfg
+++ b/config/coreboot/dell9020mtbmrc_12mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
+status="stable"
diff --git a/config/coreboot/dell9020sff-nri_12mb/target.cfg b/config/coreboot/dell9020sff-nri_12mb/target.cfg
index 37d8f553..bc4053d4 100644
--- a/config/coreboot/dell9020sff-nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff-nri_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="stable"
diff --git a/config/coreboot/dell9020sff_12mb/target.cfg b/config/coreboot/dell9020sff_12mb/target.cfg
index 0da057a9..a3acd5fb 100644
--- a/config/coreboot/dell9020sff_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_12mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
+status="stable"
diff --git a/config/coreboot/dell9020sffbmrc_12mb/target.cfg b/config/coreboot/dell9020sffbmrc_12mb/target.cfg
index 0da057a9..a3acd5fb 100644
--- a/config/coreboot/dell9020sffbmrc_12mb/target.cfg
+++ b/config/coreboot/dell9020sffbmrc_12mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
+status="stable"
diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index 1cf0792e..70be0ab9 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -9,3 +9,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
 microcode_required="n"
+status="untested"
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index 1cf0792e..70be0ab9 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -9,3 +9,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
 microcode_required="n"
+status="untested"
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index 03fd230b..e2375ad4 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -7,3 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index 3a458ee4..d1ea26ad 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -7,3 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
+status="unstable" # broken s3
diff --git a/config/coreboot/e6400_4mb/warn.txt b/config/coreboot/e6400_4mb/warn.txt
new file mode 100644
index 00000000..95b8ebbf
--- /dev/null
+++ b/config/coreboot/e6400_4mb/warn.txt
@@ -0,0 +1 @@
+broken s3 resume/suspend, no battery indicator/status
diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
index 3a458ee4..d1026eed 100644
--- a/config/coreboot/e6400nvidia_4mb/target.cfg
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -7,3 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
+status="unstable" # s3, nvidia+nouveau
diff --git a/config/coreboot/e6400nvidia_4mb/warn.txt b/config/coreboot/e6400nvidia_4mb/warn.txt
new file mode 100644
index 00000000..a604fc87
--- /dev/null
+++ b/config/coreboot/e6400nvidia_4mb/warn.txt
@@ -0,0 +1,2 @@
+broken s3 resume/suspend, no battery indicator/status.
+nouveau crashes xorg under linux (can use nomodeset)
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index 1cf0792e..70be0ab9 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -9,3 +9,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
 microcode_required="n"
+status="untested"
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index 03fd230b..e2375ad4 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -7,3 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index 1cf0792e..70be0ab9 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -9,3 +9,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
 microcode_required="n"
+status="untested"
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index 03fd230b..e2375ad4 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -7,3 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/g43t-am3/target.cfg b/config/coreboot/g43t-am3/target.cfg
index 13f2a260..af80482f 100644
--- a/config/coreboot/g43t-am3/target.cfg
+++ b/config/coreboot/g43t-am3/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/g43t-am3_16mb/target.cfg b/config/coreboot/g43t-am3_16mb/target.cfg
index 13f2a260..af80482f 100644
--- a/config/coreboot/g43t-am3_16mb/target.cfg
+++ b/config/coreboot/g43t-am3_16mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/ga-g41m-es2l/target.cfg b/config/coreboot/ga-g41m-es2l/target.cfg
index ef85da4b..9fc566d8 100644
--- a/config/coreboot/ga-g41m-es2l/target.cfg
+++ b/config/coreboot/ga-g41m-es2l/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ata"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/gru_bob/target.cfg b/config/coreboot/gru_bob/target.cfg
index a7c36159..3ff37611 100644
--- a/config/coreboot/gru_bob/target.cfg
+++ b/config/coreboot/gru_bob/target.cfg
@@ -1,3 +1,4 @@
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
+status="untested"
diff --git a/config/coreboot/gru_kevin/target.cfg b/config/coreboot/gru_kevin/target.cfg
index a7c36159..3ff37611 100644
--- a/config/coreboot/gru_kevin/target.cfg
+++ b/config/coreboot/gru_kevin/target.cfg
@@ -1,3 +1,4 @@
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
+status="untested"
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index fee132f4..1b9e33f0 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index fee132f4..1b9e33f0 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index fee132f4..1b9e33f0 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 0badb4fb..12afcd76 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 0badb4fb..12afcd76 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index 06f3025c..e19a0d14 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
+status="stable"
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index 0badb4fb..12afcd76 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index 0badb4fb..12afcd76 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index fee132f4..1b9e33f0 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index fee132f4..1b9e33f0 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg
index ae56c735..a352b46d 100644
--- a/config/coreboot/hp8560w_8mb/target.cfg
+++ b/config/coreboot/hp8560w_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
+status="unstable"
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index fee132f4..1b9e33f0 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
index d5d37291..c618cc13 100644
--- a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
+status="untested"
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
index d5d37291..c618cc13 100644
--- a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
+status="untested"
diff --git a/config/coreboot/kcma-d8-udimm_16mb/target.cfg b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
index 35354c26..37d16a2a 100644
--- a/config/coreboot/kcma-d8-udimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
@@ -6,3 +6,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
+status="untested"
diff --git a/config/coreboot/kcma-d8-udimm_2mb/target.cfg b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
index 35354c26..37d16a2a 100644
--- a/config/coreboot/kcma-d8-udimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
@@ -6,3 +6,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
+status="untested"
diff --git a/config/coreboot/kfsn4-dre_1mb/target.cfg b/config/coreboot/kfsn4-dre_1mb/target.cfg
index 19c57b8d..15f35ccd 100644
--- a/config/coreboot/kfsn4-dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4-dre_1mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/kfsn4-dre_2mb/target.cfg b/config/coreboot/kfsn4-dre_2mb/target.cfg
index 9bd20d45..e65a5e9c 100644
--- a/config/coreboot/kfsn4-dre_2mb/target.cfg
+++ b/config/coreboot/kfsn4-dre_2mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
index 2867a730..e074689c 100644
--- a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
index 2867a730..e074689c 100644
--- a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
index 5b4010d8..1e128ae9 100644
--- a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
index 5b4010d8..1e128ae9 100644
--- a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
+status="untested"
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index dcf5d1de..404e0129 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -4,3 +4,4 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index dcf5d1de..404e0129 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index bb56ec25..e9eab4e9 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index bb56ec25..e9eab4e9 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/qemu_arm64_12mb/target.cfg b/config/coreboot/qemu_arm64_12mb/target.cfg
index a7c36159..3ff37611 100644
--- a/config/coreboot/qemu_arm64_12mb/target.cfg
+++ b/config/coreboot/qemu_arm64_12mb/target.cfg
@@ -1,3 +1,4 @@
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
+status="untested"
diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg
index 4d03eb4a..d92fda66 100644
--- a/config/coreboot/qemu_x86_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="both"
+status="untested"
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index e6d3bec6..6333672b 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/t440pbmrc_12mb/target.cfg b/config/coreboot/t440pbmrc_12mb/target.cfg
index 06f3025c..e19a0d14 100644
--- a/config/coreboot/t440pbmrc_12mb/target.cfg
+++ b/config/coreboot/t440pbmrc_12mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
+status="stable"
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index 8bb575a9..0efb19ed 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="stable"
diff --git a/config/coreboot/t440pmrc_12mb/target.cfg b/config/coreboot/t440pmrc_12mb/target.cfg
index 06f3025c..e19a0d14 100644
--- a/config/coreboot/t440pmrc_12mb/target.cfg
+++ b/config/coreboot/t440pmrc_12mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
+status="stable"
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 2daf00f7..6a6d833a 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
+status="untested"
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 2daf00f7..6a6d833a 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
+status="untested"
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index 8bb575a9..0efb19ed 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="stable"
diff --git a/config/coreboot/w541bmrc_12mb/target.cfg b/config/coreboot/w541bmrc_12mb/target.cfg
index 06f3025c..e19a0d14 100644
--- a/config/coreboot/w541bmrc_12mb/target.cfg
+++ b/config/coreboot/w541bmrc_12mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
+status="stable"
diff --git a/config/coreboot/w541mrc_12mb/target.cfg b/config/coreboot/w541mrc_12mb/target.cfg
index 06f3025c..e19a0d14 100644
--- a/config/coreboot/w541mrc_12mb/target.cfg
+++ b/config/coreboot/w541mrc_12mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
+status="stable"
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/x220edp_8mb/target.cfg b/config/coreboot/x220edp_8mb/target.cfg
index 8688df3f..529581bd 100644
--- a/config/coreboot/x220edp_8mb/target.cfg
+++ b/config/coreboot/x220edp_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="broken" # TODO: VCC3P patch
diff --git a/config/coreboot/x220edp_8mb/warn.txt b/config/coreboot/x220edp_8mb/warn.txt
new file mode 100644
index 00000000..a153edeb
--- /dev/null
+++ b/config/coreboot/x220edp_8mb/warn.txt
@@ -0,0 +1 @@
+TODO: VCC3P patch
diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg
index 8688df3f..f16a94a4 100644
--- a/config/coreboot/x230_12mb/target.cfg
+++ b/config/coreboot/x230_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="stable"
diff --git a/config/coreboot/x230_12mb/warn.txt b/config/coreboot/x230_12mb/warn.txt
new file mode 100644
index 00000000..a153edeb
--- /dev/null
+++ b/config/coreboot/x230_12mb/warn.txt
@@ -0,0 +1 @@
+TODO: VCC3P patch
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/x230edp_12mb/target.cfg b/config/coreboot/x230edp_12mb/target.cfg
index 8688df3f..529581bd 100644
--- a/config/coreboot/x230edp_12mb/target.cfg
+++ b/config/coreboot/x230edp_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="broken" # TODO: VCC3P patch
diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg
index 8688df3f..f16a94a4 100644
--- a/config/coreboot/x230t_12mb/target.cfg
+++ b/config/coreboot/x230t_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="stable"
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index 8688df3f..6c267eca 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+status="untested"
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 2daf00f7..6a6d833a 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
+status="untested"
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 2daf00f7..6a6d833a 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
+status="untested"
diff --git a/include/err.sh b/include/err.sh
index d4f8700b..097d4230 100755
--- a/include/err.sh
+++ b/include/err.sh
@@ -5,7 +5,7 @@ export LC_COLLATE=C
 export LC_ALL=C
 
 version=""; versiondate=""; projectname=""; _nogit=""
-err="err_"; tmpdir=""
+err="err_"; tmpdir=""; release_type=""
 
 # if "y": a coreboot target won't be built if target.cfg says release="n"
 # (this is used to exclude certain build targets from releases)
@@ -15,6 +15,17 @@ set | grep LBMK_RELEASE 1>/dev/null 2>/dev/null || lbmk_release="n" || :
 [ "$lbmk_release" = "n" ] || [ "$lbmk_release" = "y" ] || lbmk_release="n"
 export LBMK_RELEASE="$lbmk_release"
 
+# valid values:
+# empty / not set
+# value: stable
+# value: unstable
+# e.g. export LBMK_VERSION_TYPE=stable
+set | grep LBMK_VERSION_TYPE 1>/dev/null 2>/dev/null && \
+    release_type="$LBMK_VERSION_TYPE"
+[ -z "$release_type" ] || [ "$release_type" = "stable" ] || \
+    [ "$release_type" = "unstable" ] || release_type=""
+export LBMK_VERSION_TYPE="$release_type"
+
 tmpdir_was_set="y"
 set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"
 if [ "${tmpdir_was_set}" = "y" ]; then
diff --git a/script/build/roms b/script/build/roms
index 5fdc05c9..2269e714 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -21,9 +21,10 @@ cfgsdir="config/coreboot"
 pv="payload_grub payload_grub_withseabios payload_seabios payload_memtest t"
 pv="${pv} payload_seabios_withgrub payload_seabios_grubonly payload_uboot memtest_bin"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree keymaps release"
-v="${v} grub_timeout ubdir board grub_scan_disk uboot_config"
+v="${v} grub_timeout ubdir board grub_scan_disk uboot_config status"
 eval "$(setvars "n" ${pv})"
-eval "$(setvars "" ${v} boards _displaymode _payload _keyboard all targets)"
+eval "$(setvars "" ${v} boards _displaymode _payload _keyboard all targets \
+    skipped)"
 
 main()
 {
@@ -55,20 +56,31 @@ main()
 		eval "$(setvars "n" ${pv}) $(setvars "" ${v})"
 		grub_background="background1280x800.png"
 		board="${x}"
+
 		configure_target
+		[ "$board" = "$tree" ] && \
+			return 1
+
+		handle_status
 
 		# exclude certain targets from the release
-		if [ "$release" = "n" ] && [ "$lbmk_release" = "y" ]; then
-			printf "Skipping target: %s\n" "$x"
-			continue
-		fi
+		skip_board && \
+		    printf "Skip target %s(%s)\n" "$board" "$status" && \
+		    skipped="* $board($status)\n$skipped" && continue
 
 		build_payloads
 		build_target_mainboard
+
 		[ -d "bin/${board}" ] || continue
 		targets="* bin/${board}\n${targets}"
 	done
 
+	if [ -n "$skipped" ]; then	
+		printf "\nThese targets were skipped:\n"
+		eval "printf \"${skipped}\""
+		printf "^^ These targets were skipped.\n\n"
+	fi
+
 	[ -z "${targets}" ] && $err "No ROM images were compiled"
 	printf "\nROM images available in these directories:\n"
 	eval "printf \"${targets}\""
@@ -125,6 +137,48 @@ configure_target()
 	eval "payload_${_payload}=y"
 }
 
+handle_status()
+{
+	[ "$status" = "stable" ] || [ "$status" = "unstable" ] || \
+	    [ "$status" = "broken" ] || [ "$status" = "untested" ] || \
+		status="unknown"
+
+	printf "Handling target: %s (status=%s)\n" "$board" "$status"
+
+	[ "$status" = "broken" ] && release="n"
+	[ "$status" = "unknown" ] && release="n"
+	[ "$status" = "untested" ] && release="n"
+
+	[ "$status" != "stable" ] && [ "$status" != "$release_type" ] && \
+		printf "WARNING: %s not marked stable (status=%s):\n\n" \
+		    "$board" "$status"; return 0
+}
+
+skip_board()
+{
+	[ "$release" = "n" ] && [ "$lbmk_release" = "y" ] && \
+		return 0
+	[ -n "$release_type" ] && [ "$status" = "$release_type" ] && \
+		return 1
+
+	if [ "$lbmk_release" != "y" ] && [ "$status" != "stable" ] && \
+	    [ "$status" != "$release_type" ]; then
+		if [ -f "$targetdir/warn.txt" ]; then
+			printf "Regarding board '%s' (status '%s'):\n" \
+			    "$board" "$status"
+			cat -u "$targetdir/warn.txt" || \
+			    $err "!cat $targetdir/warn.txt"
+		fi
+		while true; do
+			printf "Board %s has status '%s'. Skip? [y/n]" \
+			    "$board" "$status"
+			read -r skip
+			[ "$skip" = "y" ] && return 0
+			[ "$skip" = "n" ] && return 1; continue
+		done
+	fi; return 1
+}
+
 build_payloads()
 {
 	romdir="bin/${board}"

From b6014a65acc786bee37590214c6af46d554d19a0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 26 Apr 2024 21:10:06 +0100
Subject: [PATCH 0261/1549] erroneous return

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/build/roms b/script/build/roms
index 2269e714..1d36ad8a 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -59,7 +59,7 @@ main()
 
 		configure_target
 		[ "$board" = "$tree" ] && \
-			return 1
+			continue
 
 		handle_status
 

From d88783b7341656c26186e967425cf33341841dee Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 26 Apr 2024 21:23:09 +0100
Subject: [PATCH 0262/1549] build/roms: let "list" specify status types

for example:

./build roms list

this will list every now, still. same behaviour. now see:

./build roms list stable

this will list all stable roms

./build roms list untested

this lists untested roms. but wait!

./build roms list untested broken unstable

./build roms list broken unstable

yes. it works this way. now you can use lbmk to easily
see what rom status are, during maintenance.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 38 +++++++++++++++++++++++++++++++++-----
 1 file changed, 33 insertions(+), 5 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index 1d36ad8a..03310315 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -24,20 +24,33 @@ v="romdir cbrom initmode displaymode cbcfg targetdir tree keymaps release"
 v="${v} grub_timeout ubdir board grub_scan_disk uboot_config status"
 eval "$(setvars "n" ${pv})"
 eval "$(setvars "" ${v} boards _displaymode _payload _keyboard all targets \
-    skipped)"
+    skipped listboards list_type)"
 
 main()
 {
 	check_project
 
 	while [ $# -gt 0 ]; do
+
+		if [ "$listboards" = "y" ]; then
+			[ "$1" = "stable" ] || [ "$1" = "unstable" ] || \
+			    [ "$1" = "broken" ] || [ "$1" = "untested" ] || \
+			    [ "$1" = "unknown" ] || \
+				$err "invalid list type '$1'"
+			list_type="$list_type $1"
+			list_type="${list_type# }"
+			shift 1; continue
+		fi
+
 		case ${1} in
 		help)
 			usage
 			exit 0 ;;
 		list)
-			items config/coreboot || :
-			exit 0 ;;
+			boards=$(items config/coreboot) || \
+			    $err "Cannot generate list of boards for list"
+			listboards="y"
+			shift 1; continue ;;
 		-d) _displaymode="${2}" ;;
 		-p) _payload="${2}" ;;
 		-k) _keyboard="${2}" ;;
@@ -49,6 +62,9 @@ main()
 		shift 2
 	done
 
+	[ "$listboards" = "y" ] && [ -z "$list_type" ] && \
+		list_type="stable unstable broken untested unknown"
+
 	[ "${all}" != "y" ] || boards=$(items config/coreboot) || \
 	    $err "Cannot generate list of boards for building"
 
@@ -63,6 +79,14 @@ main()
 
 		handle_status
 
+		if [ "$listboards" = "y" ]; then
+			for _list_type in $list_type; do
+				[ "$status" != "$_list_type" ] && continue
+				printf "%s\n" "$board"
+			done
+			continue
+		fi
+
 		# exclude certain targets from the release
 		skip_board && \
 		    printf "Skip target %s(%s)\n" "$board" "$status" && \
@@ -75,6 +99,8 @@ main()
 		targets="* bin/${board}\n${targets}"
 	done
 
+	[ "$listboards" = "y" ] && return 0
+
 	if [ -n "$skipped" ]; then	
 		printf "\nThese targets were skipped:\n"
 		eval "printf \"${skipped}\""
@@ -143,13 +169,15 @@ handle_status()
 	    [ "$status" = "broken" ] || [ "$status" = "untested" ] || \
 		status="unknown"
 
-	printf "Handling target: %s (status=%s)\n" "$board" "$status"
+	[ "$listboards" != "y" ] && \
+		printf "Handling target: %s (status=%s)\n" "$board" "$status"
 
 	[ "$status" = "broken" ] && release="n"
 	[ "$status" = "unknown" ] && release="n"
 	[ "$status" = "untested" ] && release="n"
 
-	[ "$status" != "stable" ] && [ "$status" != "$release_type" ] && \
+	[ "$listboards" != "y" ] && \
+	    [ "$status" != "stable" ] && [ "$status" != "$release_type" ] && \
 		printf "WARNING: %s not marked stable (status=%s):\n\n" \
 		    "$board" "$status"; return 0
 }

From c0b4ba2eeadc5bdc6c7b10251561ecf1a9c72a7b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 26 Apr 2024 23:32:10 +0100
Subject: [PATCH 0263/1549] build/roms: update help, pertaining to status

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index 03310315..ea7ef62c 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -497,8 +497,23 @@ usage()
 		./build roms x200_8mb x60
 		./build roms x60 -p grub -d corebootfb -k usqwerty
 
-	possible values for 'target':
-	$(items "config/coreboot")
+	to see possible values for 'target':
+
+		./build roms list
+
+	to see targets of only a given status (stable, unstable,
+	broken, untested and unknown), try e.g.
+
+		./build roms list stable
+		./build roms list unstable untested
+		./build roms list unknown
+		./build roms list broken
+		./build roms list broken stable
+
+	the value is set in target.cfg for each board. if status
+	is unitialised, it defaults to "unknown". only stable/unstable
+	targets are permitted in releases; broken, untested and
+	unknown are not allowed, but are accessible via normal building
 
 	Refer to the ${projectname} documentation for more information.
 	EOF

From b99ebe05514609ba8ee7cf33d128ee3efb7fd803 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Apr 2024 06:08:07 +0100
Subject: [PATCH 0264/1549] kcma-d8/kgpe-d16: mark as tested(unstable)

raminit has never been fully reliable on this board, and so
this board has never been stable. so, now that lbmk specifies
such status per board, mark these boards as such.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/kcma-d8-rdimm_16mb/target.cfg  | 2 +-
 config/coreboot/kcma-d8-rdimm_16mb/warn.txt    | 1 +
 config/coreboot/kcma-d8-rdimm_2mb/target.cfg   | 2 +-
 config/coreboot/kcma-d8-rdimm_2mb/warn.txt     | 1 +
 config/coreboot/kcma-d8-udimm_16mb/target.cfg  | 2 +-
 config/coreboot/kcma-d8-udimm_16mb/warn.txt    | 1 +
 config/coreboot/kcma-d8-udimm_2mb/target.cfg   | 2 +-
 config/coreboot/kcma-d8-udimm_2mb/warn.txt     | 1 +
 config/coreboot/kgpe-d16-rdimm_16mb/target.cfg | 2 +-
 config/coreboot/kgpe-d16-rdimm_16mb/warn.txt   | 1 +
 config/coreboot/kgpe-d16-rdimm_2mb/target.cfg  | 2 +-
 config/coreboot/kgpe-d16-rdimm_2mb/warn.txt    | 1 +
 config/coreboot/kgpe-d16-udimm_16mb/target.cfg | 2 +-
 config/coreboot/kgpe-d16-udimm_16mb/warn.txt   | 1 +
 config/coreboot/kgpe-d16-udimm_2mb/target.cfg  | 2 +-
 config/coreboot/kgpe-d16-udimm_2mb/warn.txt    | 1 +
 16 files changed, 16 insertions(+), 8 deletions(-)
 create mode 100644 config/coreboot/kcma-d8-rdimm_16mb/warn.txt
 create mode 100644 config/coreboot/kcma-d8-rdimm_2mb/warn.txt
 create mode 100644 config/coreboot/kcma-d8-udimm_16mb/warn.txt
 create mode 100644 config/coreboot/kcma-d8-udimm_2mb/warn.txt
 create mode 100644 config/coreboot/kgpe-d16-rdimm_16mb/warn.txt
 create mode 100644 config/coreboot/kgpe-d16-rdimm_2mb/warn.txt
 create mode 100644 config/coreboot/kgpe-d16-udimm_16mb/warn.txt
 create mode 100644 config/coreboot/kgpe-d16-udimm_2mb/warn.txt

diff --git a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
index c618cc13..3d0185e9 100644
--- a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/warn.txt b/config/coreboot/kcma-d8-rdimm_16mb/warn.txt
new file mode 100644
index 00000000..639ecd41
--- /dev/null
+++ b/config/coreboot/kcma-d8-rdimm_16mb/warn.txt
@@ -0,0 +1 @@
+raminit has always been unreliable on this board; ymmv
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
index c618cc13..3d0185e9 100644
--- a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/warn.txt b/config/coreboot/kcma-d8-rdimm_2mb/warn.txt
new file mode 100644
index 00000000..639ecd41
--- /dev/null
+++ b/config/coreboot/kcma-d8-rdimm_2mb/warn.txt
@@ -0,0 +1 @@
+raminit has always been unreliable on this board; ymmv
diff --git a/config/coreboot/kcma-d8-udimm_16mb/target.cfg b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
index 37d16a2a..2c3bc306 100644
--- a/config/coreboot/kcma-d8-udimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/kcma-d8-udimm_16mb/warn.txt b/config/coreboot/kcma-d8-udimm_16mb/warn.txt
new file mode 100644
index 00000000..639ecd41
--- /dev/null
+++ b/config/coreboot/kcma-d8-udimm_16mb/warn.txt
@@ -0,0 +1 @@
+raminit has always been unreliable on this board; ymmv
diff --git a/config/coreboot/kcma-d8-udimm_2mb/target.cfg b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
index 37d16a2a..2c3bc306 100644
--- a/config/coreboot/kcma-d8-udimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
@@ -6,4 +6,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/kcma-d8-udimm_2mb/warn.txt b/config/coreboot/kcma-d8-udimm_2mb/warn.txt
new file mode 100644
index 00000000..639ecd41
--- /dev/null
+++ b/config/coreboot/kcma-d8-udimm_2mb/warn.txt
@@ -0,0 +1 @@
+raminit has always been unreliable on this board; ymmv
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
index e074689c..f469e6fe 100644
--- a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
-status="untested"
+status="unstable"
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/warn.txt b/config/coreboot/kgpe-d16-rdimm_16mb/warn.txt
new file mode 100644
index 00000000..639ecd41
--- /dev/null
+++ b/config/coreboot/kgpe-d16-rdimm_16mb/warn.txt
@@ -0,0 +1 @@
+raminit has always been unreliable on this board; ymmv
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
index e074689c..f469e6fe 100644
--- a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
-status="untested"
+status="unstable"
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/warn.txt b/config/coreboot/kgpe-d16-rdimm_2mb/warn.txt
new file mode 100644
index 00000000..639ecd41
--- /dev/null
+++ b/config/coreboot/kgpe-d16-rdimm_2mb/warn.txt
@@ -0,0 +1 @@
+raminit has always been unreliable on this board; ymmv
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
index 1e128ae9..298d1f20 100644
--- a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
-status="untested"
+status="unstable"
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/warn.txt b/config/coreboot/kgpe-d16-udimm_16mb/warn.txt
new file mode 100644
index 00000000..639ecd41
--- /dev/null
+++ b/config/coreboot/kgpe-d16-udimm_16mb/warn.txt
@@ -0,0 +1 @@
+raminit has always been unreliable on this board; ymmv
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
index 1e128ae9..298d1f20 100644
--- a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
-status="untested"
+status="unstable"
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/warn.txt b/config/coreboot/kgpe-d16-udimm_2mb/warn.txt
new file mode 100644
index 00000000..639ecd41
--- /dev/null
+++ b/config/coreboot/kgpe-d16-udimm_2mb/warn.txt
@@ -0,0 +1 @@
+raminit has always been unreliable on this board; ymmv

From 5218bfb0c81e9b9b6fd7fff69c8816cb69abbf78 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Apr 2024 14:49:14 +0100
Subject: [PATCH 0265/1549] declare gm45 thinkpads stable for release

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/r400_16mb/target.cfg | 2 +-
 config/coreboot/r400_4mb/target.cfg  | 2 +-
 config/coreboot/r400_8mb/target.cfg  | 2 +-
 config/coreboot/r500_4mb/target.cfg  | 2 +-
 config/coreboot/t400_16mb/target.cfg | 2 +-
 config/coreboot/t400_4mb/target.cfg  | 2 +-
 config/coreboot/t400_8mb/target.cfg  | 2 +-
 config/coreboot/t500_16mb/target.cfg | 2 +-
 config/coreboot/t500_4mb/target.cfg  | 2 +-
 config/coreboot/t500_8mb/target.cfg  | 2 +-
 config/coreboot/w500_16mb/target.cfg | 2 +-
 config/coreboot/w500_4mb/target.cfg  | 2 +-
 config/coreboot/w500_8mb/target.cfg  | 2 +-
 config/coreboot/x200_16mb/target.cfg | 2 +-
 config/coreboot/x200_4mb/target.cfg  | 2 +-
 config/coreboot/x200_8mb/target.cfg  | 2 +-
 16 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"

From 1fd9ba9ae0fe50a57c8bada531850af9ad22dc1c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Apr 2024 14:51:59 +0100
Subject: [PATCH 0266/1549] declare ivy/sandy thinkpads stable for release

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/t420_8mb/target.cfg   | 2 +-
 config/coreboot/t420s_8mb/target.cfg  | 2 +-
 config/coreboot/t430_12mb/target.cfg  | 2 +-
 config/coreboot/t520_8mb/target.cfg   | 2 +-
 config/coreboot/t530_12mb/target.cfg  | 2 +-
 config/coreboot/w530_12mb/target.cfg  | 2 +-
 config/coreboot/x220_8mb/target.cfg   | 2 +-
 config/coreboot/x230_16mb/target.cfg  | 2 +-
 config/coreboot/x230t_16mb/target.cfg | 2 +-
 9 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index 6c267eca..f16a94a4 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"

From e761922542264629d7035735ea7b3e31f7a9ee74 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Apr 2024 15:01:31 +0100
Subject: [PATCH 0267/1549] Set status=unstable on dell latitudes

also warn about issues, in a warn.txt file for each.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/e5420_6mb/target.cfg     | 2 +-
 config/coreboot/e5420_6mb/warn.txt       | 1 +
 config/coreboot/e5520_6mb/target.cfg     | 2 +-
 config/coreboot/e5520_6mb/warn.txt       | 1 +
 config/coreboot/e5530_12mb/target.cfg    | 2 +-
 config/coreboot/e5530_12mb/warn.txt      | 1 +
 config/coreboot/e6400_4mb/warn.txt       | 4 +++-
 config/coreboot/e6400nvidia_4mb/warn.txt | 5 +++--
 config/coreboot/e6420_10mb/target.cfg    | 2 +-
 config/coreboot/e6420_10mb/warn.txt      | 1 +
 config/coreboot/e6430_12mb/target.cfg    | 2 +-
 config/coreboot/e6430_12mb/warn.txt      | 1 +
 config/coreboot/e6520_10mb/target.cfg    | 2 +-
 config/coreboot/e6520_10mb/warn.txt      | 1 +
 config/coreboot/e6530_12mb/target.cfg    | 2 +-
 config/coreboot/e6530_12mb/warn.txt      | 1 +
 16 files changed, 20 insertions(+), 10 deletions(-)
 create mode 100644 config/coreboot/e5420_6mb/warn.txt
 create mode 100644 config/coreboot/e5520_6mb/warn.txt
 create mode 100644 config/coreboot/e5530_12mb/warn.txt
 create mode 100644 config/coreboot/e6420_10mb/warn.txt
 create mode 100644 config/coreboot/e6430_12mb/warn.txt
 create mode 100644 config/coreboot/e6520_10mb/warn.txt
 create mode 100644 config/coreboot/e6530_12mb/warn.txt

diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index 70be0ab9..153d4d2d 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -9,4 +9,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
 microcode_required="n"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/e5420_6mb/warn.txt b/config/coreboot/e5420_6mb/warn.txt
new file mode 100644
index 00000000..57d05e6a
--- /dev/null
+++ b/config/coreboot/e5420_6mb/warn.txt
@@ -0,0 +1 @@
+Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index 70be0ab9..153d4d2d 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -9,4 +9,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
 microcode_required="n"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/e5520_6mb/warn.txt b/config/coreboot/e5520_6mb/warn.txt
new file mode 100644
index 00000000..57d05e6a
--- /dev/null
+++ b/config/coreboot/e5520_6mb/warn.txt
@@ -0,0 +1 @@
+Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index e2375ad4..e48db5e5 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/e5530_12mb/warn.txt b/config/coreboot/e5530_12mb/warn.txt
new file mode 100644
index 00000000..57d05e6a
--- /dev/null
+++ b/config/coreboot/e5530_12mb/warn.txt
@@ -0,0 +1 @@
+Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e6400_4mb/warn.txt b/config/coreboot/e6400_4mb/warn.txt
index 95b8ebbf..30e61da5 100644
--- a/config/coreboot/e6400_4mb/warn.txt
+++ b/config/coreboot/e6400_4mb/warn.txt
@@ -1 +1,3 @@
-broken s3 resume/suspend, no battery indicator/status
+Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
+
+If you have the nvidia gpu variant, please use e6400nvidia_4mb instead.
diff --git a/config/coreboot/e6400nvidia_4mb/warn.txt b/config/coreboot/e6400nvidia_4mb/warn.txt
index a604fc87..5b2e4a00 100644
--- a/config/coreboot/e6400nvidia_4mb/warn.txt
+++ b/config/coreboot/e6400nvidia_4mb/warn.txt
@@ -1,2 +1,3 @@
-broken s3 resume/suspend, no battery indicator/status.
-nouveau crashes xorg under linux (can use nomodeset)
+Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
+
+Nvidia GPU on this model doesn't work when you try xorg; xorg will hang. Use "nomodeset" under Linux, when booting. On BSD, the nv driver works ok but can get very slow-slideshow-y when dragging windows, yet rendered video will usually run smooth; use a tiling window manager on BSD systems, or again use software rendering.
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index 70be0ab9..153d4d2d 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -9,4 +9,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
 microcode_required="n"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/e6420_10mb/warn.txt b/config/coreboot/e6420_10mb/warn.txt
new file mode 100644
index 00000000..57d05e6a
--- /dev/null
+++ b/config/coreboot/e6420_10mb/warn.txt
@@ -0,0 +1 @@
+Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index e2375ad4..e48db5e5 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/e6430_12mb/warn.txt b/config/coreboot/e6430_12mb/warn.txt
new file mode 100644
index 00000000..57d05e6a
--- /dev/null
+++ b/config/coreboot/e6430_12mb/warn.txt
@@ -0,0 +1 @@
+Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index 70be0ab9..153d4d2d 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -9,4 +9,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
 microcode_required="n"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/e6520_10mb/warn.txt b/config/coreboot/e6520_10mb/warn.txt
new file mode 100644
index 00000000..57d05e6a
--- /dev/null
+++ b/config/coreboot/e6520_10mb/warn.txt
@@ -0,0 +1 @@
+Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index e2375ad4..e48db5e5 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/e6530_12mb/warn.txt b/config/coreboot/e6530_12mb/warn.txt
new file mode 100644
index 00000000..57d05e6a
--- /dev/null
+++ b/config/coreboot/e6530_12mb/warn.txt
@@ -0,0 +1 @@
+Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.

From 3ace925e916a1277f6f4ade03282d34d7968d6f1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Apr 2024 15:25:43 +0100
Subject: [PATCH 0268/1549] update more board statuses before release

what's left to properly test are pineview/x4x/i945 and
some of the ivy/sandy elitebooks/hp workstations

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/gru_bob/target.cfg         | 2 +-
 config/coreboot/gru_bob/warn.txt           | 1 +
 config/coreboot/gru_kevin/target.cfg       | 2 +-
 config/coreboot/gru_kevin/warn.txt         | 1 +
 config/coreboot/kfsn4-dre_1mb/target.cfg   | 2 +-
 config/coreboot/kfsn4-dre_2mb/target.cfg   | 2 +-
 config/coreboot/qemu_arm64_12mb/target.cfg | 2 +-
 config/coreboot/qemu_x86_12mb/target.cfg   | 2 +-
 config/coreboot/t1650_12mb/target.cfg      | 2 +-
 9 files changed, 9 insertions(+), 7 deletions(-)
 create mode 100644 config/coreboot/gru_bob/warn.txt
 create mode 100644 config/coreboot/gru_kevin/warn.txt

diff --git a/config/coreboot/gru_bob/target.cfg b/config/coreboot/gru_bob/target.cfg
index 3ff37611..c6ad9102 100644
--- a/config/coreboot/gru_bob/target.cfg
+++ b/config/coreboot/gru_bob/target.cfg
@@ -1,4 +1,4 @@
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/gru_bob/warn.txt b/config/coreboot/gru_bob/warn.txt
new file mode 100644
index 00000000..1dcc4e7d
--- /dev/null
+++ b/config/coreboot/gru_bob/warn.txt
@@ -0,0 +1 @@
+Incomplete UEFI implementation but should boot most distros fine. Debian Bookworm installed and the first 1GB or so of the partition got corrupted. Leave the first 2GB or so unpartitioned, when installing any distro.
diff --git a/config/coreboot/gru_kevin/target.cfg b/config/coreboot/gru_kevin/target.cfg
index 3ff37611..c6ad9102 100644
--- a/config/coreboot/gru_kevin/target.cfg
+++ b/config/coreboot/gru_kevin/target.cfg
@@ -1,4 +1,4 @@
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/gru_kevin/warn.txt b/config/coreboot/gru_kevin/warn.txt
new file mode 100644
index 00000000..1dcc4e7d
--- /dev/null
+++ b/config/coreboot/gru_kevin/warn.txt
@@ -0,0 +1 @@
+Incomplete UEFI implementation but should boot most distros fine. Debian Bookworm installed and the first 1GB or so of the partition got corrupted. Leave the first 2GB or so unpartitioned, when installing any distro.
diff --git a/config/coreboot/kfsn4-dre_1mb/target.cfg b/config/coreboot/kfsn4-dre_1mb/target.cfg
index 15f35ccd..e5b66b38 100644
--- a/config/coreboot/kfsn4-dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4-dre_1mb/target.cfg
@@ -4,4 +4,4 @@ payload_seabios="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
-status="untested"
+status="stable"
diff --git a/config/coreboot/kfsn4-dre_2mb/target.cfg b/config/coreboot/kfsn4-dre_2mb/target.cfg
index e65a5e9c..8f4e6a81 100644
--- a/config/coreboot/kfsn4-dre_2mb/target.cfg
+++ b/config/coreboot/kfsn4-dre_2mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
-status="untested"
+status="stable"
diff --git a/config/coreboot/qemu_arm64_12mb/target.cfg b/config/coreboot/qemu_arm64_12mb/target.cfg
index 3ff37611..86283f7a 100644
--- a/config/coreboot/qemu_arm64_12mb/target.cfg
+++ b/config/coreboot/qemu_arm64_12mb/target.cfg
@@ -1,4 +1,4 @@
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
-status="untested"
+status="stable"
diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg
index d92fda66..dba2c61e 100644
--- a/config/coreboot/qemu_x86_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_12mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="both"
-status="untested"
+status="stable"
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index 6333672b..b0abee49 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="stable"

From ad7e3966b9884dc3a5cff116d33cc27b0d775d27 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Apr 2024 15:45:49 +0100
Subject: [PATCH 0269/1549] update 9020 sff/mt release status

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/dell9020mt-nri_12mb/target.cfg  | 2 +-
 config/coreboot/dell9020mt-nri_12mb/warn.txt    | 1 +
 config/coreboot/dell9020mt_12mb/target.cfg      | 2 +-
 config/coreboot/dell9020mt_12mb/warn.txt        | 1 +
 config/coreboot/dell9020mtbmrc_12mb/target.cfg  | 2 +-
 config/coreboot/dell9020mtbmrc_12mb/warn.txt    | 1 +
 config/coreboot/dell9020sff-nri_12mb/target.cfg | 2 +-
 config/coreboot/dell9020sff-nri_12mb/warn.txt   | 1 +
 config/coreboot/dell9020sff_12mb/target.cfg     | 2 +-
 config/coreboot/dell9020sff_12mb/warn.txt       | 1 +
 config/coreboot/dell9020sffbmrc_12mb/target.cfg | 2 +-
 config/coreboot/dell9020sffbmrc_12mb/warn.txt   | 1 +
 12 files changed, 12 insertions(+), 6 deletions(-)
 create mode 100644 config/coreboot/dell9020mt-nri_12mb/warn.txt
 create mode 100644 config/coreboot/dell9020mt_12mb/warn.txt
 create mode 100644 config/coreboot/dell9020mtbmrc_12mb/warn.txt
 create mode 100644 config/coreboot/dell9020sff-nri_12mb/warn.txt
 create mode 100644 config/coreboot/dell9020sff_12mb/warn.txt
 create mode 100644 config/coreboot/dell9020sffbmrc_12mb/warn.txt

diff --git a/config/coreboot/dell9020mt-nri_12mb/target.cfg b/config/coreboot/dell9020mt-nri_12mb/target.cfg
index bc4053d4..bb76392a 100644
--- a/config/coreboot/dell9020mt-nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt-nri_12mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
+status="unstable"
diff --git a/config/coreboot/dell9020mt-nri_12mb/warn.txt b/config/coreboot/dell9020mt-nri_12mb/warn.txt
new file mode 100644
index 00000000..fe1aa7f9
--- /dev/null
+++ b/config/coreboot/dell9020mt-nri_12mb/warn.txt
@@ -0,0 +1 @@
+Completely stable with graphics, but IOMMU disabled by default; graphics cards only work with IOMMU turned off. Intel graphics works fine with IOMMU turned on. IOMMU is needed for Qubes to work properly. To turn on IOMMU, do this to your ROM before flashing (ONLY do this if using Intel graphics): ./nvramtool -C libreboot.rom -w iommu=Enable
diff --git a/config/coreboot/dell9020mt_12mb/target.cfg b/config/coreboot/dell9020mt_12mb/target.cfg
index a3acd5fb..ac0b1792 100644
--- a/config/coreboot/dell9020mt_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_12mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="stable"
+status="unstable"
diff --git a/config/coreboot/dell9020mt_12mb/warn.txt b/config/coreboot/dell9020mt_12mb/warn.txt
new file mode 100644
index 00000000..fe1aa7f9
--- /dev/null
+++ b/config/coreboot/dell9020mt_12mb/warn.txt
@@ -0,0 +1 @@
+Completely stable with graphics, but IOMMU disabled by default; graphics cards only work with IOMMU turned off. Intel graphics works fine with IOMMU turned on. IOMMU is needed for Qubes to work properly. To turn on IOMMU, do this to your ROM before flashing (ONLY do this if using Intel graphics): ./nvramtool -C libreboot.rom -w iommu=Enable
diff --git a/config/coreboot/dell9020mtbmrc_12mb/target.cfg b/config/coreboot/dell9020mtbmrc_12mb/target.cfg
index a3acd5fb..ac0b1792 100644
--- a/config/coreboot/dell9020mtbmrc_12mb/target.cfg
+++ b/config/coreboot/dell9020mtbmrc_12mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="stable"
+status="unstable"
diff --git a/config/coreboot/dell9020mtbmrc_12mb/warn.txt b/config/coreboot/dell9020mtbmrc_12mb/warn.txt
new file mode 100644
index 00000000..fe1aa7f9
--- /dev/null
+++ b/config/coreboot/dell9020mtbmrc_12mb/warn.txt
@@ -0,0 +1 @@
+Completely stable with graphics, but IOMMU disabled by default; graphics cards only work with IOMMU turned off. Intel graphics works fine with IOMMU turned on. IOMMU is needed for Qubes to work properly. To turn on IOMMU, do this to your ROM before flashing (ONLY do this if using Intel graphics): ./nvramtool -C libreboot.rom -w iommu=Enable
diff --git a/config/coreboot/dell9020sff-nri_12mb/target.cfg b/config/coreboot/dell9020sff-nri_12mb/target.cfg
index bc4053d4..bb76392a 100644
--- a/config/coreboot/dell9020sff-nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff-nri_12mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
+status="unstable"
diff --git a/config/coreboot/dell9020sff-nri_12mb/warn.txt b/config/coreboot/dell9020sff-nri_12mb/warn.txt
new file mode 100644
index 00000000..fe1aa7f9
--- /dev/null
+++ b/config/coreboot/dell9020sff-nri_12mb/warn.txt
@@ -0,0 +1 @@
+Completely stable with graphics, but IOMMU disabled by default; graphics cards only work with IOMMU turned off. Intel graphics works fine with IOMMU turned on. IOMMU is needed for Qubes to work properly. To turn on IOMMU, do this to your ROM before flashing (ONLY do this if using Intel graphics): ./nvramtool -C libreboot.rom -w iommu=Enable
diff --git a/config/coreboot/dell9020sff_12mb/target.cfg b/config/coreboot/dell9020sff_12mb/target.cfg
index a3acd5fb..ac0b1792 100644
--- a/config/coreboot/dell9020sff_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_12mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="stable"
+status="unstable"
diff --git a/config/coreboot/dell9020sff_12mb/warn.txt b/config/coreboot/dell9020sff_12mb/warn.txt
new file mode 100644
index 00000000..fe1aa7f9
--- /dev/null
+++ b/config/coreboot/dell9020sff_12mb/warn.txt
@@ -0,0 +1 @@
+Completely stable with graphics, but IOMMU disabled by default; graphics cards only work with IOMMU turned off. Intel graphics works fine with IOMMU turned on. IOMMU is needed for Qubes to work properly. To turn on IOMMU, do this to your ROM before flashing (ONLY do this if using Intel graphics): ./nvramtool -C libreboot.rom -w iommu=Enable
diff --git a/config/coreboot/dell9020sffbmrc_12mb/target.cfg b/config/coreboot/dell9020sffbmrc_12mb/target.cfg
index a3acd5fb..ac0b1792 100644
--- a/config/coreboot/dell9020sffbmrc_12mb/target.cfg
+++ b/config/coreboot/dell9020sffbmrc_12mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="stable"
+status="unstable"
diff --git a/config/coreboot/dell9020sffbmrc_12mb/warn.txt b/config/coreboot/dell9020sffbmrc_12mb/warn.txt
new file mode 100644
index 00000000..fe1aa7f9
--- /dev/null
+++ b/config/coreboot/dell9020sffbmrc_12mb/warn.txt
@@ -0,0 +1 @@
+Completely stable with graphics, but IOMMU disabled by default; graphics cards only work with IOMMU turned off. Intel graphics works fine with IOMMU turned on. IOMMU is needed for Qubes to work properly. To turn on IOMMU, do this to your ROM before flashing (ONLY do this if using Intel graphics): ./nvramtool -C libreboot.rom -w iommu=Enable

From 6c4f07b35071923b4b7cf66f9064108a67d28855 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Apr 2024 16:46:31 +0100
Subject: [PATCH 0270/1549] allow disabling status checks during builds

export LBMK_STATUS=n

if not set, the status checks and confirmation dialogs
persist. if set to y they persist.

if you set it to n, all checks are disabled, so e.g.:

./build roms all

this would once again build all targets, regardless
of status. this is if you want the old behaviour.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/err.sh    | 9 ++++++++-
 script/build/roms | 2 +-
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/include/err.sh b/include/err.sh
index 097d4230..0b1c3e70 100755
--- a/include/err.sh
+++ b/include/err.sh
@@ -5,7 +5,7 @@ export LC_COLLATE=C
 export LC_ALL=C
 
 version=""; versiondate=""; projectname=""; _nogit=""
-err="err_"; tmpdir=""; release_type=""
+err="err_"; tmpdir=""; release_type=""; lbmk_status=""
 
 # if "y": a coreboot target won't be built if target.cfg says release="n"
 # (this is used to exclude certain build targets from releases)
@@ -26,6 +26,13 @@ set | grep LBMK_VERSION_TYPE 1>/dev/null 2>/dev/null && \
     [ "$release_type" = "unstable" ] || release_type=""
 export LBMK_VERSION_TYPE="$release_type"
 
+# if set to n via export, status checks will be skipped during
+# all builds, and all targets will be built regardless of status.
+# this replicates the old behaviour of lbmk, prior to the checks.
+set | grep LBMK_STATUS 1>/dev/null 2>/dev/null && lbmk_status="$LBMK_STATUS"
+[ "$lbmk_status" = "y" ] || [ "$lbmk_status" = "n" ] || lbmk_status="y"
+export LBMK_STATUS="$lbmk_status"
+
 tmpdir_was_set="y"
 set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"
 if [ "${tmpdir_was_set}" = "y" ]; then
diff --git a/script/build/roms b/script/build/roms
index ea7ef62c..08b9c92a 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -190,7 +190,7 @@ skip_board()
 		return 1
 
 	if [ "$lbmk_release" != "y" ] && [ "$status" != "stable" ] && \
-	    [ "$status" != "$release_type" ]; then
+	    [ "$status" != "$release_type" ] && [ "$lbmk_status" = "y" ]; then
 		if [ -f "$targetdir/warn.txt" ]; then
 			printf "Regarding board '%s' (status '%s'):\n" \
 			    "$board" "$status"

From f22305fbf585a4d16109ad44b24739228ae5b503 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Apr 2024 17:01:38 +0100
Subject: [PATCH 0271/1549] update macbook21/x60/t60 status

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/macbook11/target.cfg         | 2 +-
 config/coreboot/macbook11/warn.txt           | 1 +
 config/coreboot/macbook11_16mb/target.cfg    | 2 +-
 config/coreboot/macbook11_16mb/warn.txt      | 1 +
 config/coreboot/macbook21/target.cfg         | 2 +-
 config/coreboot/macbook21/warn.txt           | 1 +
 config/coreboot/macbook21_16mb/target.cfg    | 2 +-
 config/coreboot/macbook21_16mb/warn.txt      | 1 +
 config/coreboot/t60_16mb_intelgpu/target.cfg | 2 +-
 config/coreboot/t60_16mb_intelgpu/warn.txt   | 1 +
 config/coreboot/t60_intelgpu/target.cfg      | 2 +-
 config/coreboot/t60_intelgpu/warn.txt        | 1 +
 config/coreboot/x60/target.cfg               | 2 +-
 config/coreboot/x60/warn.txt                 | 1 +
 config/coreboot/x60_16mb/target.cfg          | 2 +-
 config/coreboot/x60_16mb/warn.txt            | 1 +
 16 files changed, 16 insertions(+), 8 deletions(-)
 create mode 100644 config/coreboot/macbook11/warn.txt
 create mode 100644 config/coreboot/macbook11_16mb/warn.txt
 create mode 100644 config/coreboot/macbook21/warn.txt
 create mode 100644 config/coreboot/macbook21_16mb/warn.txt
 create mode 100644 config/coreboot/t60_16mb_intelgpu/warn.txt
 create mode 100644 config/coreboot/t60_intelgpu/warn.txt
 create mode 100644 config/coreboot/x60/warn.txt
 create mode 100644 config/coreboot/x60_16mb/warn.txt

diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index 404e0129..3c06a458 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -4,4 +4,4 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/macbook11/warn.txt b/config/coreboot/macbook11/warn.txt
new file mode 100644
index 00000000..5bffd9da
--- /dev/null
+++ b/config/coreboot/macbook11/warn.txt
@@ -0,0 +1 @@
+Presumably fully stable, but see lbmk issue 179: https://codeberg.org/libreboot/lbmk/issues/179 - T60 on just battery power had the error in GRUB: alloc magic is broken at 0x7b1aedf0: 0 ----- the rev for Libreboot 2024050x is set to the LB 202306235 rev (February 2023) for now. I still think the users with that issue, and there weren't that many, just had bad RAM. GRUB shows that error on bad RAM, and I've seen it in that case on other machines too. So this machine is most likely fully stable, but I'm marking it unstable until we know fully what we're dealing with.
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index 404e0129..3c06a458 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -4,4 +4,4 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/macbook11_16mb/warn.txt b/config/coreboot/macbook11_16mb/warn.txt
new file mode 100644
index 00000000..5bffd9da
--- /dev/null
+++ b/config/coreboot/macbook11_16mb/warn.txt
@@ -0,0 +1 @@
+Presumably fully stable, but see lbmk issue 179: https://codeberg.org/libreboot/lbmk/issues/179 - T60 on just battery power had the error in GRUB: alloc magic is broken at 0x7b1aedf0: 0 ----- the rev for Libreboot 2024050x is set to the LB 202306235 rev (February 2023) for now. I still think the users with that issue, and there weren't that many, just had bad RAM. GRUB shows that error on bad RAM, and I've seen it in that case on other machines too. So this machine is most likely fully stable, but I'm marking it unstable until we know fully what we're dealing with.
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index e9eab4e9..b4feb4de 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/macbook21/warn.txt b/config/coreboot/macbook21/warn.txt
new file mode 100644
index 00000000..5bffd9da
--- /dev/null
+++ b/config/coreboot/macbook21/warn.txt
@@ -0,0 +1 @@
+Presumably fully stable, but see lbmk issue 179: https://codeberg.org/libreboot/lbmk/issues/179 - T60 on just battery power had the error in GRUB: alloc magic is broken at 0x7b1aedf0: 0 ----- the rev for Libreboot 2024050x is set to the LB 202306235 rev (February 2023) for now. I still think the users with that issue, and there weren't that many, just had bad RAM. GRUB shows that error on bad RAM, and I've seen it in that case on other machines too. So this machine is most likely fully stable, but I'm marking it unstable until we know fully what we're dealing with.
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index e9eab4e9..b4feb4de 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/macbook21_16mb/warn.txt b/config/coreboot/macbook21_16mb/warn.txt
new file mode 100644
index 00000000..5bffd9da
--- /dev/null
+++ b/config/coreboot/macbook21_16mb/warn.txt
@@ -0,0 +1 @@
+Presumably fully stable, but see lbmk issue 179: https://codeberg.org/libreboot/lbmk/issues/179 - T60 on just battery power had the error in GRUB: alloc magic is broken at 0x7b1aedf0: 0 ----- the rev for Libreboot 2024050x is set to the LB 202306235 rev (February 2023) for now. I still think the users with that issue, and there weren't that many, just had bad RAM. GRUB shows that error on bad RAM, and I've seen it in that case on other machines too. So this machine is most likely fully stable, but I'm marking it unstable until we know fully what we're dealing with.
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 6a6d833a..004ba1b0 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/t60_16mb_intelgpu/warn.txt b/config/coreboot/t60_16mb_intelgpu/warn.txt
new file mode 100644
index 00000000..5bffd9da
--- /dev/null
+++ b/config/coreboot/t60_16mb_intelgpu/warn.txt
@@ -0,0 +1 @@
+Presumably fully stable, but see lbmk issue 179: https://codeberg.org/libreboot/lbmk/issues/179 - T60 on just battery power had the error in GRUB: alloc magic is broken at 0x7b1aedf0: 0 ----- the rev for Libreboot 2024050x is set to the LB 202306235 rev (February 2023) for now. I still think the users with that issue, and there weren't that many, just had bad RAM. GRUB shows that error on bad RAM, and I've seen it in that case on other machines too. So this machine is most likely fully stable, but I'm marking it unstable until we know fully what we're dealing with.
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 6a6d833a..004ba1b0 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/t60_intelgpu/warn.txt b/config/coreboot/t60_intelgpu/warn.txt
new file mode 100644
index 00000000..5bffd9da
--- /dev/null
+++ b/config/coreboot/t60_intelgpu/warn.txt
@@ -0,0 +1 @@
+Presumably fully stable, but see lbmk issue 179: https://codeberg.org/libreboot/lbmk/issues/179 - T60 on just battery power had the error in GRUB: alloc magic is broken at 0x7b1aedf0: 0 ----- the rev for Libreboot 2024050x is set to the LB 202306235 rev (February 2023) for now. I still think the users with that issue, and there weren't that many, just had bad RAM. GRUB shows that error on bad RAM, and I've seen it in that case on other machines too. So this machine is most likely fully stable, but I'm marking it unstable until we know fully what we're dealing with.
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 6a6d833a..004ba1b0 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/x60/warn.txt b/config/coreboot/x60/warn.txt
new file mode 100644
index 00000000..5bffd9da
--- /dev/null
+++ b/config/coreboot/x60/warn.txt
@@ -0,0 +1 @@
+Presumably fully stable, but see lbmk issue 179: https://codeberg.org/libreboot/lbmk/issues/179 - T60 on just battery power had the error in GRUB: alloc magic is broken at 0x7b1aedf0: 0 ----- the rev for Libreboot 2024050x is set to the LB 202306235 rev (February 2023) for now. I still think the users with that issue, and there weren't that many, just had bad RAM. GRUB shows that error on bad RAM, and I've seen it in that case on other machines too. So this machine is most likely fully stable, but I'm marking it unstable until we know fully what we're dealing with.
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 6a6d833a..004ba1b0 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
-status="untested"
+status="unstable"
diff --git a/config/coreboot/x60_16mb/warn.txt b/config/coreboot/x60_16mb/warn.txt
new file mode 100644
index 00000000..5bffd9da
--- /dev/null
+++ b/config/coreboot/x60_16mb/warn.txt
@@ -0,0 +1 @@
+Presumably fully stable, but see lbmk issue 179: https://codeberg.org/libreboot/lbmk/issues/179 - T60 on just battery power had the error in GRUB: alloc magic is broken at 0x7b1aedf0: 0 ----- the rev for Libreboot 2024050x is set to the LB 202306235 rev (February 2023) for now. I still think the users with that issue, and there weren't that many, just had bad RAM. GRUB shows that error on bad RAM, and I've seen it in that case on other machines too. So this machine is most likely fully stable, but I'm marking it unstable until we know fully what we're dealing with.

From e614f90638ffda7dd9cd2634d856aa40e96d2010 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Apr 2024 18:50:49 +0100
Subject: [PATCH 0272/1549] build/roms: tell the user how to ignore status

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/script/build/roms b/script/build/roms
index 08b9c92a..b14213b9 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -197,6 +197,8 @@ skip_board()
 			cat -u "$targetdir/warn.txt" || \
 			    $err "!cat $targetdir/warn.txt"
 		fi
+		printf "\nTo disable this dialog when building, do:\n"
+		printf "export LBMK_STATUS=n\n\n"
 		while true; do
 			printf "Board %s has status '%s'. Skip? [y/n]" \
 			    "$board" "$status"

From 714d4b3ed3aba68421128f4558f6a493c96a014a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 27 Apr 2024 22:42:12 +0100
Subject: [PATCH 0273/1549] update/release: disable status checking

just to ensure that nothing goes wrong. we don't rely on
the status variable for releases, because there is another
variable, release, that target.cfg files declare, e.g.

release="n"
release="y"

you can just omit the variable, because it defaults to y, so
you only need declare it when it needs to be "n"

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/update/release | 1 +
 1 file changed, 1 insertion(+)

diff --git a/script/update/release b/script/update/release
index e8eff300..d7b7d108 100755
--- a/script/update/release
+++ b/script/update/release
@@ -10,6 +10,7 @@ set -u -e
 eval "$(setvars "" vdir relname src_dirname srcdir _xm target romdir mode)"
 
 export LBMK_RELEASE="y"
+export LBMK_STATUS="n"
 
 main()
 {

From d923d31451673651ba39eb634e733d38976f20a8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Apr 2024 02:02:15 +0100
Subject: [PATCH 0274/1549] use mirrorservice.org for iasl downloads

github is unreliable. i host these files myself.

coreboot uses intel.com again now in the latest revisions, and
intel broke it before. i'm going to start backing up the acpica
releases onto my rsync server from now on, and keep patching
coreboot to use my files.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...mirrorservice.org-for-iasl-downloads.patch | 28 +++++++++++++++++++
 ...mirrorservice.org-for-iasl-downloads.patch | 28 +++++++++++++++++++
 2 files changed, 56 insertions(+)
 create mode 100644 config/coreboot/haswell/patches/0026-use-mirrorservice.org-for-iasl-downloads.patch
 create mode 100644 config/coreboot/i945/patches/0023-use-mirrorservice.org-for-iasl-downloads.patch

diff --git a/config/coreboot/haswell/patches/0026-use-mirrorservice.org-for-iasl-downloads.patch b/config/coreboot/haswell/patches/0026-use-mirrorservice.org-for-iasl-downloads.patch
new file mode 100644
index 00000000..f9981abd
--- /dev/null
+++ b/config/coreboot/haswell/patches/0026-use-mirrorservice.org-for-iasl-downloads.patch
@@ -0,0 +1,28 @@
+From ed30cca924fa576dd5b69ce4a348b5a1466a8db1 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sun, 28 Apr 2024 01:57:46 +0100
+Subject: [PATCH 1/1] use mirrorservice.org for iasl downloads
+
+github is unreliable. i mirror these files myself.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ util/crossgcc/buildgcc | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index 6ae201239d..a8433a25e5 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -74,7 +74,7 @@ MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
+ MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
+ GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
+ BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
+-IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
++IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
+ # CLANG toolchain archive locations
+ LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
+ CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
+-- 
+2.39.2
+
diff --git a/config/coreboot/i945/patches/0023-use-mirrorservice.org-for-iasl-downloads.patch b/config/coreboot/i945/patches/0023-use-mirrorservice.org-for-iasl-downloads.patch
new file mode 100644
index 00000000..012d8dab
--- /dev/null
+++ b/config/coreboot/i945/patches/0023-use-mirrorservice.org-for-iasl-downloads.patch
@@ -0,0 +1,28 @@
+From 781ab8407d08a5fdb7fbc2c239e684def7380b15 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sun, 28 Apr 2024 01:59:30 +0100
+Subject: [PATCH 1/1] use mirrorservice.org for iasl downloads
+
+github is unreliable. i mirror these files myself.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ util/crossgcc/buildgcc | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index 0faea86894..6779a20425 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -71,7 +71,7 @@ MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
+ MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
+ GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
+ BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
+-IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
++IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
+ # CLANG toolchain archive locations
+ LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
+ CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
+-- 
+2.39.2
+

From a5c7cc1a0be949077d3e68fc2228ca9e1e02c5b4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Apr 2024 03:27:54 +0100
Subject: [PATCH 0275/1549] fix target.cfg files on dell latitudes

some latitudes still used the old style for variables
in target.cfg, specifically arch="x86_64" - lbmk used to
then check that on a big if/else and translate it to the
correct target name for crossgcc, e.g. i386-elf, arm-eabi

now it just puts the arch directly, in a new variable:
xarch

change arch="x86_64" to xarch="i386-elf" in these files.
also remove a few obsolete variables. should build now.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/e5420_6mb/target.cfg  | 4 +---
 config/coreboot/e5520_6mb/target.cfg  | 4 +---
 config/coreboot/e6420_10mb/target.cfg | 4 +---
 config/coreboot/e6520_10mb/target.cfg | 4 +---
 4 files changed, 4 insertions(+), 12 deletions(-)

diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index 153d4d2d..e48db5e5 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -1,6 +1,5 @@
 tree="default"
-romtype="normal"
-arch="x86_64"
+xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
@@ -8,5 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-microcode_required="n"
 status="unstable"
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index 153d4d2d..e48db5e5 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -1,6 +1,5 @@
 tree="default"
-romtype="normal"
-arch="x86_64"
+xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
@@ -8,5 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-microcode_required="n"
 status="unstable"
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index 153d4d2d..e48db5e5 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -1,6 +1,5 @@
 tree="default"
-romtype="normal"
-arch="x86_64"
+xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
@@ -8,5 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-microcode_required="n"
 status="unstable"
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index 153d4d2d..e48db5e5 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -1,6 +1,5 @@
 tree="default"
-romtype="normal"
-arch="x86_64"
+xarch="i386-elf"
 payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
@@ -8,5 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-microcode_required="n"
 status="unstable"

From 71f8e6530a9c33748a26a2c4f68f84a3ec6badbd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Apr 2024 17:24:41 +0100
Subject: [PATCH 0276/1549] eDP configs (x230/x220): don't release

set to release="n" for now until the eDP targets
are fixed.

the regular non-eDP targets are stable, and will be
released.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/x220edp_8mb/target.cfg  | 1 +
 config/coreboot/x230edp_12mb/target.cfg | 1 +
 2 files changed, 2 insertions(+)

diff --git a/config/coreboot/x220edp_8mb/target.cfg b/config/coreboot/x220edp_8mb/target.cfg
index 529581bd..cd477e6f 100644
--- a/config/coreboot/x220edp_8mb/target.cfg
+++ b/config/coreboot/x220edp_8mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 status="broken" # TODO: VCC3P patch
+release="n"
diff --git a/config/coreboot/x230edp_12mb/target.cfg b/config/coreboot/x230edp_12mb/target.cfg
index 529581bd..cd477e6f 100644
--- a/config/coreboot/x230edp_12mb/target.cfg
+++ b/config/coreboot/x230edp_12mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 status="broken" # TODO: VCC3P patch
+release="n"

From 55204dc4449456c6a11ed19f530b7673143450a5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Apr 2024 17:31:16 +0100
Subject: [PATCH 0277/1549] option.sh: don't use nproc (not portable)

export LBMK_THREADS=x

where x is an integer. this is already supported for
setting the number of build threads, but if not set
it uses nproc.

openbsd doesn't have nproc. default to 1 thread.

now you MUST set threads. e.g. in linux do:

export LBMK_THREADS=$(nproc)

preliminary work is being done to make lbmk run
on openbsd!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/option.sh | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/include/option.sh b/include/option.sh
index 8fc80aaa..eb792775 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -23,13 +23,14 @@ eval "$(setvars "" CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
     CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE)"
 
 threads=
-set | grep LBMK_THREADS 1>/dev/null 2>/dev/null || threads=$(nproc) || :
-[ -z "$threads" ] && threads=$LBMK_THREADS
-[ -z "$threads" ] && threads=1 # LBMK_THREADS not set, and nproc failed
+set | grep LBMK_THREADS 1>/dev/null 2>/dev/null && threads="$LBMK_THREADS"
+[ -z "$threads" ] && threads=1
 
 expr "X$threads" : "X-\{0,1\}[0123456789][0123456789]*$" \
     1>/dev/null 2>/dev/null || threads=1 # user specified a non-integer
 
+export LBMK_THREADS="$threads"
+
 items()
 {
 	rval=1

From a88a8281df1d3688bb772578a3dd7d7cc1af1091 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Apr 2024 19:28:02 +0100
Subject: [PATCH 0278/1549] update/trees: simplified defconfig copying

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/update/trees | 16 +++++++---------
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/script/update/trees b/script/update/trees
index ac5743be..af80d99a 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -199,15 +199,13 @@ handle_makefile()
 
 	run_make_command || $err "handle_makefile $codedir: no makefile!"
 
-	if [ -e "${codedir}/.git" ] && [ "$project" = "u-boot" ] && \
-	    [ "$mode" = "distclean" ]; then
-		x_ git -C "$codedir" clean -fdx
-	elif [ "$mode" = "oldconfig" ] || [ "$mode" = "olddefconfig" ] || \
-	    [ "$mode" = "menuconfig" ] || [ "$mode" = "nconfig" ]; then
-		x_ cp "${codedir}/.config" "$config"
-	elif [ "$mode" = "savedefconfig" ]; then
-		x_ cp "${codedir}/defconfig" "$config"
-	fi
+	_copy=".config"
+	[ "$mode" = "savedefconfig" ] && _copy="defconfig"
+	[ "${mode%config}" = "$mode" ] || x_ cp "$codedir/$_copy" "$config"
+
+	[ -e "${codedir}/.git" ] && [ "$project" = "u-boot" ] && \
+	    [ "$mode" = "distclean" ] && \
+		x_ git -C "$codedir" clean -fdx; return 0
 }
 
 run_make_command()

From 515185a7f5f4ec75392c33737ddb9160fa28070e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Apr 2024 19:56:25 +0100
Subject: [PATCH 0279/1549] build/roms: support SeaGRUB *with menu enabled*

This is useful on desktops, where you want GRUB to
automatically start, but you still want access to the
GRUB menu, in the case where you rely on SeaBIOS to
execute the VGA ROM inside your graphics card.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index b14213b9..853bbea6 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -398,8 +398,10 @@ build_grub_roms()
 			newrom="${romdir}/${payload1}_${board}_" && \
 			newrom="${newrom}${initmode}_${keymap}.rom"
 		x_ moverom "${tmpgrubrom}" "${newrom}"
-		[ "${payload_seabios_grubonly}" = "y" ] && \
+		if [ "${payload_seabios_grubonly}" = "y" ]; then
+			mkSeagrubRom "${tmpgrubrom}" "${newrom}"
 			mkSeabiosGrubonlyRom "${tmpgrubrom}" "${newrom}"
+		fi
 		x_ rm -f "${tmpgrubrom}"
 	done
 }
@@ -428,7 +430,7 @@ mkSeabiosRom() {
 }
 
 # SeaGRUB configuration
-mkSeabiosGrubonlyRom()
+mkSeagrubRom()
 {
 	_grubrom="${1}"
 	_newrom="${2}"
@@ -441,7 +443,17 @@ mkSeabiosGrubonlyRom()
 	    add -f "${tmpbootorder}" -n bootorder -t raw
 	x_ rm -f "${tmpbootorder}"
 
+	x_ moverom "${_grubrom}" "${_newrom%.rom}_grubfirst.rom"
+}
+
+# SeaGRUB, and disable the SeaBIOS menu (grub only)
+mkSeabiosGrubonlyRom()
+{
+	_grubrom="${1}"
+	_newrom="${2}"
+
 	x_ "${cbfstool}" "${_grubrom}" add-int -i 0 -n etc/show-boot-menu
+
 	x_ moverom "${_grubrom}" "${_newrom%.rom}_grubonly.rom"
 }
 

From 230f68fd8f9c4178051635f52df9ccf9700cd30d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Apr 2024 20:21:35 +0100
Subject: [PATCH 0280/1549] build/roms: simplified seagrub handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/bootorder |  1 +
 script/build/roms     | 36 ++++++------------------------------
 2 files changed, 7 insertions(+), 30 deletions(-)
 create mode 100644 config/grub/bootorder

diff --git a/config/grub/bootorder b/config/grub/bootorder
new file mode 100644
index 00000000..b33e1295
--- /dev/null
+++ b/config/grub/bootorder
@@ -0,0 +1 @@
+/rom@img/grub2
diff --git a/script/build/roms b/script/build/roms
index 853bbea6..1c427b69 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -399,8 +399,12 @@ build_grub_roms()
 			newrom="${newrom}${initmode}_${keymap}.rom"
 		x_ moverom "${tmpgrubrom}" "${newrom}"
 		if [ "${payload_seabios_grubonly}" = "y" ]; then
-			mkSeagrubRom "${tmpgrubrom}" "${newrom}"
-			mkSeabiosGrubonlyRom "${tmpgrubrom}" "${newrom}"
+			x_ "$cbfstool" "$tmpgrubrom" add \
+			    -f "config/grub/bootorder" -n bootorder -t raw
+			x_ moverom "$tmpgrubrom" "${newrom%.rom}_grubfirst.rom"
+			x_ "$cbfstool" "$tmpgrubrom" add-int -i 0 \
+			    -n etc/show-boot-menu
+			x_ moverom "$tmpgrubrom" "${newrom%.rom}_grubonly.rom"
 		fi
 		x_ rm -f "${tmpgrubrom}"
 	done
@@ -429,34 +433,6 @@ mkSeabiosRom() {
 	printf "%s\n" "${tmprom}"
 }
 
-# SeaGRUB configuration
-mkSeagrubRom()
-{
-	_grubrom="${1}"
-	_newrom="${2}"
-
-	tmpbootorder=$(mktemp -t coreboot_rom.XXXXXXXXXX)
-
-	# only load grub, by inserting a custom bootorder file
-	printf "/rom@img/grub2\n" > "$tmpbootorder" || $err "printf bootorder"
-	x_ "${cbfstool}" "${_grubrom}" \
-	    add -f "${tmpbootorder}" -n bootorder -t raw
-	x_ rm -f "${tmpbootorder}"
-
-	x_ moverom "${_grubrom}" "${_newrom%.rom}_grubfirst.rom"
-}
-
-# SeaGRUB, and disable the SeaBIOS menu (grub only)
-mkSeabiosGrubonlyRom()
-{
-	_grubrom="${1}"
-	_newrom="${2}"
-
-	x_ "${cbfstool}" "${_grubrom}" add-int -i 0 -n etc/show-boot-menu
-
-	x_ moverom "${_grubrom}" "${_newrom%.rom}_grubonly.rom"
-}
-
 build_uboot_roms()
 {
 	tmprom=$(mkUbootRom "${cbrom}" "fallback/payload") || \

From 91927760db296596af3946327319625c17c1afa5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Apr 2024 20:33:38 +0100
Subject: [PATCH 0281/1549] build/roms: simplified status handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/err.sh    | 13 +------------
 script/build/roms | 30 ++++++------------------------
 2 files changed, 7 insertions(+), 36 deletions(-)

diff --git a/include/err.sh b/include/err.sh
index 0b1c3e70..a94275f3 100755
--- a/include/err.sh
+++ b/include/err.sh
@@ -5,7 +5,7 @@ export LC_COLLATE=C
 export LC_ALL=C
 
 version=""; versiondate=""; projectname=""; _nogit=""
-err="err_"; tmpdir=""; release_type=""; lbmk_status=""
+err="err_"; tmpdir=""; lbmk_status=""
 
 # if "y": a coreboot target won't be built if target.cfg says release="n"
 # (this is used to exclude certain build targets from releases)
@@ -15,17 +15,6 @@ set | grep LBMK_RELEASE 1>/dev/null 2>/dev/null || lbmk_release="n" || :
 [ "$lbmk_release" = "n" ] || [ "$lbmk_release" = "y" ] || lbmk_release="n"
 export LBMK_RELEASE="$lbmk_release"
 
-# valid values:
-# empty / not set
-# value: stable
-# value: unstable
-# e.g. export LBMK_VERSION_TYPE=stable
-set | grep LBMK_VERSION_TYPE 1>/dev/null 2>/dev/null && \
-    release_type="$LBMK_VERSION_TYPE"
-[ -z "$release_type" ] || [ "$release_type" = "stable" ] || \
-    [ "$release_type" = "unstable" ] || release_type=""
-export LBMK_VERSION_TYPE="$release_type"
-
 # if set to n via export, status checks will be skipped during
 # all builds, and all targets will be built regardless of status.
 # this replicates the old behaviour of lbmk, prior to the checks.
diff --git a/script/build/roms b/script/build/roms
index 1c427b69..b84fd3b1 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -72,13 +72,12 @@ main()
 		eval "$(setvars "n" ${pv}) $(setvars "" ${v})"
 		grub_background="background1280x800.png"
 		board="${x}"
+		status="unknown"
 
 		configure_target
 		[ "$board" = "$tree" ] && \
 			continue
 
-		handle_status
-
 		if [ "$listboards" = "y" ]; then
 			for _list_type in $list_type; do
 				[ "$status" != "$_list_type" ] && continue
@@ -163,34 +162,17 @@ configure_target()
 	eval "payload_${_payload}=y"
 }
 
-handle_status()
-{
-	[ "$status" = "stable" ] || [ "$status" = "unstable" ] || \
-	    [ "$status" = "broken" ] || [ "$status" = "untested" ] || \
-		status="unknown"
-
-	[ "$listboards" != "y" ] && \
-		printf "Handling target: %s (status=%s)\n" "$board" "$status"
-
-	[ "$status" = "broken" ] && release="n"
-	[ "$status" = "unknown" ] && release="n"
-	[ "$status" = "untested" ] && release="n"
-
-	[ "$listboards" != "y" ] && \
-	    [ "$status" != "stable" ] && [ "$status" != "$release_type" ] && \
-		printf "WARNING: %s not marked stable (status=%s):\n\n" \
-		    "$board" "$status"; return 0
-}
-
 skip_board()
 {
+	[ "$listboards" != "y" ] && [ "$status" != "stable" ] && \
+		printf "WARNING: %s not stable (status=%s):\n\n" \
+		    "$board" "$status"
+
 	[ "$release" = "n" ] && [ "$lbmk_release" = "y" ] && \
 		return 0
-	[ -n "$release_type" ] && [ "$status" = "$release_type" ] && \
-		return 1
 
 	if [ "$lbmk_release" != "y" ] && [ "$status" != "stable" ] && \
-	    [ "$status" != "$release_type" ] && [ "$lbmk_status" = "y" ]; then
+	    [ "$lbmk_status" = "y" ]; then
 		if [ -f "$targetdir/warn.txt" ]; then
 			printf "Regarding board '%s' (status '%s'):\n" \
 			    "$board" "$status"

From 0e2c56be4133eb4be62ad3eaa7490573a24ab2fd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Apr 2024 20:40:41 +0100
Subject: [PATCH 0282/1549] build/roms: reduce indentation in skip_board()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 40 ++++++++++++++++++++--------------------
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index b84fd3b1..f41f812b 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -168,27 +168,27 @@ skip_board()
 		printf "WARNING: %s not stable (status=%s):\n\n" \
 		    "$board" "$status"
 
-	[ "$release" = "n" ] && [ "$lbmk_release" = "y" ] && \
-		return 0
+	[ "$lbmk_release" = "y" ] && [ "$release" = "n" ] && return 0
+	[ "$lbmk_release" = "y" ] && [ "$status" = "broken" ] && return 0
 
-	if [ "$lbmk_release" != "y" ] && [ "$status" != "stable" ] && \
-	    [ "$lbmk_status" = "y" ]; then
-		if [ -f "$targetdir/warn.txt" ]; then
-			printf "Regarding board '%s' (status '%s'):\n" \
-			    "$board" "$status"
-			cat -u "$targetdir/warn.txt" || \
-			    $err "!cat $targetdir/warn.txt"
-		fi
-		printf "\nTo disable this dialog when building, do:\n"
-		printf "export LBMK_STATUS=n\n\n"
-		while true; do
-			printf "Board %s has status '%s'. Skip? [y/n]" \
-			    "$board" "$status"
-			read -r skip
-			[ "$skip" = "y" ] && return 0
-			[ "$skip" = "n" ] && return 1; continue
-		done
-	fi; return 1
+	[ "$lbmk_status" = "y" ] || return 1
+	[ "$status" = "stable" ] && return 1
+
+	if [ -f "$targetdir/warn.txt" ]; then
+		printf "Regarding board '%s' (status '%s'):\n" \
+		    "$board" "$status"
+		cat -u "$targetdir/warn.txt" || \
+		    $err "!cat $targetdir/warn.txt"
+	fi
+	printf "\nTo disable this dialog when building, do:\n"
+	printf "export LBMK_STATUS=n\n\n"
+	while true; do
+		printf "Board %s has status '%s'. Skip? [y/n]" \
+		    "$board" "$status"
+		read -r skip
+		[ "$skip" = "y" ] && return 0
+		[ "$skip" = "n" ] && return 1; continue
+	done
 }
 
 build_payloads()

From dbe259ef6568a423354c37b7c2264bc9dcfd8d3d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Apr 2024 20:42:37 +0100
Subject: [PATCH 0283/1549] build/roms: always display warnings

(even if status=stable)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index f41f812b..1353ca18 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -168,18 +168,18 @@ skip_board()
 		printf "WARNING: %s not stable (status=%s):\n\n" \
 		    "$board" "$status"
 
-	[ "$lbmk_release" = "y" ] && [ "$release" = "n" ] && return 0
-	[ "$lbmk_release" = "y" ] && [ "$status" = "broken" ] && return 0
-
-	[ "$lbmk_status" = "y" ] || return 1
-	[ "$status" = "stable" ] && return 1
-
-	if [ -f "$targetdir/warn.txt" ]; then
+	if [ -f "$targetdir/warn.txt" ] && [ "$listboards" != "y" ]; then
 		printf "Regarding board '%s' (status '%s'):\n" \
 		    "$board" "$status"
 		cat -u "$targetdir/warn.txt" || \
 		    $err "!cat $targetdir/warn.txt"
 	fi
+
+	[ "$lbmk_release" = "y" ] && [ "$release" = "n" ] && return 0
+	[ "$lbmk_release" = "y" ] && [ "$status" = "broken" ] && return 0
+	[ "$lbmk_status" = "y" ] || return 1
+	[ "$status" = "stable" ] && return 1
+
 	printf "\nTo disable this dialog when building, do:\n"
 	printf "export LBMK_STATUS=n\n\n"
 	while true; do

From 5003e02bb2cd7cededa85d13abbc7c6e720d7b56 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Apr 2024 20:47:59 +0100
Subject: [PATCH 0284/1549] build/roms: if release, allow all non-broken roms

this includes untested roms

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/build/roms b/script/build/roms
index 1353ca18..b8aab271 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -176,7 +176,7 @@ skip_board()
 	fi
 
 	[ "$lbmk_release" = "y" ] && [ "$release" = "n" ] && return 0
-	[ "$lbmk_release" = "y" ] && [ "$status" = "broken" ] && return 0
+	[ "$lbmk_release" = "y" ] && [ "$status" != "broken" ] && return 1
 	[ "$lbmk_status" = "y" ] || return 1
 	[ "$status" = "stable" ] && return 1
 

From b737a24c903ff75475fc7ac8a2f80901fb0acfcb Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sun, 28 Apr 2024 14:55:47 -0600
Subject: [PATCH 0285/1549] dell-flash-unlock: Remove memory clobber from
 inline assembly

The x86 port IO instructions do not access memory so it is not
needed in the clobber list.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 util/dell-flash-unlock/accessors.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/util/dell-flash-unlock/accessors.c b/util/dell-flash-unlock/accessors.c
index a35f8139..a5f936c8 100644
--- a/util/dell-flash-unlock/accessors.c
+++ b/util/dell-flash-unlock/accessors.c
@@ -43,7 +43,7 @@ sys_outb(unsigned int port, uint8_t data)
 	outb(port, data);
 	#endif
 	#if defined(__NetBSD__)
-	__asm__ volatile ( "outb %b0, %w1" : : "a"(data), "d"(port) : "memory");
+	__asm__ volatile ("outb %b0, %w1" : : "a"(data), "d"(port));
 	#endif
 }
 
@@ -57,7 +57,7 @@ sys_outl(unsigned int port, uint32_t data)
 	outl(port, data);
 	#endif
 	#if defined(__NetBSD__)
-	__asm__ volatile ( "outl %0, %w1" : : "a"(data), "d"(port) : "memory");
+	__asm__ volatile ("outl %0, %w1" : : "a"(data), "d"(port));
 	#endif
 }
 
@@ -70,7 +70,7 @@ sys_inb(unsigned int port)
 
 	#if defined(__NetBSD__)
 	uint8_t retval;
-	__asm__ volatile("inb %w1, %b0" : "=a" (retval) : "d" (port) : "memory");
+	__asm__ volatile ("inb %w1, %b0" : "=a" (retval) : "d" (port));
 	return retval;
 	#endif
 	return 0;
@@ -84,7 +84,7 @@ sys_inl(unsigned int port)
 	#endif
 	#if defined(__NetBSD__)
 	int retval;
-	__asm__ volatile("inl %w1, %0" : "=a" (retval) : "d" (port) : "memory");
+	__asm__ volatile ("inl %w1, %0" : "=a" (retval) : "d" (port));
 	return retval;
 	#endif
 	return 0;

From 6fe2482fdf035abf4bfb076801aef314fe70776c Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sun, 28 Apr 2024 15:16:19 -0600
Subject: [PATCH 0286/1549] dell-flash-unlock: Remove unnecessary includes for
 NetBSD

The pio.h header, although present on NetBSD, is not necessary, as it
only declares x86 port IO inx()/outx() functions which are not actually
implemented.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 util/dell-flash-unlock/accessors.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/util/dell-flash-unlock/accessors.c b/util/dell-flash-unlock/accessors.c
index a5f936c8..a8541e28 100644
--- a/util/dell-flash-unlock/accessors.c
+++ b/util/dell-flash-unlock/accessors.c
@@ -8,12 +8,15 @@
 #if defined(__OpenBSD__) || defined(__NetBSD__)
 #include <sys/types.h>
 #include <machine/sysarch.h>
+#endif /* __OpenBSD__ || __NetBSD__ */
+
+#if defined(__OpenBSD__)
 #if defined(__amd64__)
 #include <amd64/pio.h>
 #elif defined(__i386__)
 #include <i386/pio.h>
 #endif /* __i386__ */
-#endif /* __OpenBSD__ || __NetBSD__ */
+#endif /* __OpenBSD__ */
 
 #include <errno.h>
 

From 310378c9e584aa8ad37266a1d7a0f07640574a49 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 29 Apr 2024 00:25:39 +0100
Subject: [PATCH 0287/1549] build/roms: simplified list handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 11 ++---------
 1 file changed, 2 insertions(+), 9 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index b8aab271..1ed64004 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -33,10 +33,6 @@ main()
 	while [ $# -gt 0 ]; do
 
 		if [ "$listboards" = "y" ]; then
-			[ "$1" = "stable" ] || [ "$1" = "unstable" ] || \
-			    [ "$1" = "broken" ] || [ "$1" = "untested" ] || \
-			    [ "$1" = "unknown" ] || \
-				$err "invalid list type '$1'"
 			list_type="$list_type $1"
 			list_type="${list_type# }"
 			shift 1; continue
@@ -62,9 +58,6 @@ main()
 		shift 2
 	done
 
-	[ "$listboards" = "y" ] && [ -z "$list_type" ] && \
-		list_type="stable unstable broken untested unknown"
-
 	[ "${all}" != "y" ] || boards=$(items config/coreboot) || \
 	    $err "Cannot generate list of boards for building"
 
@@ -79,11 +72,11 @@ main()
 			continue
 
 		if [ "$listboards" = "y" ]; then
+			[ -z "$list_type" ] && printf "%s\n" "$board"
 			for _list_type in $list_type; do
 				[ "$status" != "$_list_type" ] && continue
 				printf "%s\n" "$board"
-			done
-			continue
+			done; continue
 		fi
 
 		# exclude certain targets from the release

From 3e86b3ab731fdf086c653d791f92ff7094bbb798 Mon Sep 17 00:00:00 2001
From: livio <livio@codeberg.org>
Date: Mon, 29 Apr 2024 14:39:47 +0200
Subject: [PATCH 0288/1549] Implemented failsafe options at boot and inside
 menus for enabling/disabling serial, spkmodem and gfxterm

---
 config/grub/config/grub.cfg | 65 ++++++++++++++++++++++++++++++++-----
 1 file changed, 57 insertions(+), 8 deletions(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 17576b5f..a433000e 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -14,17 +14,36 @@ terminal_input --append at_keyboard
 terminal_input --append usb_keyboard
 terminal_output --append cbmemc
 
-gfxpayload=keep
-terminal_output --append gfxterm
+# User interface overrides wherever "keystatus" is supported
+# Keep SHIFT key pressed before powering on to disable graphics
+if keystatus --shift; then
+	terminal_output --append vga_text
+else
+	gfxpayload=keep
+	terminal_output --append gfxterm
 
-if [ -f (cbfsdisk)/background.png ]; then
-	insmod png
-	background_image (cbfsdisk)/background.png
-elif [ -f (cbfsdisk)/background.jpg ]; then
-	insmod jpeg
-	background_image (cbfsdisk)/background.jpg
+	if [ -f (cbfsdisk)/background.png ]; then
+		insmod png
+		background_image (cbfsdisk)/background.png
+	elif [ -f (cbfsdisk)/background.jpg ]; then
+		insmod jpeg
+		background_image (cbfsdisk)/background.jpg
+	fi
 fi
 
+# Keep CTRL pressed to enable default serial terminal (COM1 or the like)
+if keystatus --ctrl; then
+	serial
+	terminal_input --append serial
+	terminal_output --append serial
+fi
+
+# Keep ALT pressed to enable spkmodem
+if keystatus --alt; then
+	terminal_output --append spkmodem
+fi
+
+
 set default="0"
 if [ -f (cbfsdisk)/timeout.cfg ]; then
 	source (cbfsdisk)/timeout.cfg
@@ -198,3 +217,33 @@ menuentry 'Load MemTest86+  [m]' --hotkey='m' {
 	chainloader /img/memtest
 }
 fi
+
+submenu 'Other  [z]' --hotkey='z' {
+	menuentry 'Enable default serial terminal  [s]' --hotkey='s'  {
+		serial
+		terminal_input --append serial
+		terminal_output --append serial
+	}
+
+	menuentry 'Disable default serial terminal' {
+		terminal_input --remove serial
+		terminal_output --remove serial
+	}
+
+	menuentry 'Enable gfxterm' {
+		terminal_output --append gfxterm
+		terminal_output --remove vga_text
+	}
+	menuentry 'Disable gfxterm  [g]' --hotkey='g'  {
+		terminal_output --remove gfxterm
+		terminal_output --append vga_text
+	}
+
+	menuentry 'Enable spkmodem  [a]' --hotkey='a' {
+		terminal_output --append spkmodem
+	}
+
+	menuentry 'Disable spkmodem  [z]' --hotkey='z' {
+		terminal_output --remove spkmodem
+	}
+}
\ No newline at end of file

From 7e7c3c235deabf058f75ec6c8b0a5e81335ec71a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 May 2024 00:36:28 +0100
Subject: [PATCH 0289/1549] mark i945 machines as stable for release

the previous issue was tested, and can no longer be reproduced

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/macbook11/target.cfg         | 2 +-
 config/coreboot/macbook11/warn.txt           | 1 -
 config/coreboot/macbook11_16mb/target.cfg    | 2 +-
 config/coreboot/macbook11_16mb/warn.txt      | 1 -
 config/coreboot/macbook21/target.cfg         | 2 +-
 config/coreboot/macbook21/warn.txt           | 1 -
 config/coreboot/macbook21_16mb/target.cfg    | 2 +-
 config/coreboot/macbook21_16mb/warn.txt      | 1 -
 config/coreboot/t60_16mb_intelgpu/target.cfg | 2 +-
 config/coreboot/t60_16mb_intelgpu/warn.txt   | 1 -
 config/coreboot/t60_intelgpu/target.cfg      | 2 +-
 config/coreboot/t60_intelgpu/warn.txt        | 1 -
 config/coreboot/x60/target.cfg               | 2 +-
 config/coreboot/x60/warn.txt                 | 1 -
 config/coreboot/x60_16mb/target.cfg          | 2 +-
 config/coreboot/x60_16mb/warn.txt            | 1 -
 16 files changed, 8 insertions(+), 16 deletions(-)
 delete mode 100644 config/coreboot/macbook11/warn.txt
 delete mode 100644 config/coreboot/macbook11_16mb/warn.txt
 delete mode 100644 config/coreboot/macbook21/warn.txt
 delete mode 100644 config/coreboot/macbook21_16mb/warn.txt
 delete mode 100644 config/coreboot/t60_16mb_intelgpu/warn.txt
 delete mode 100644 config/coreboot/t60_intelgpu/warn.txt
 delete mode 100644 config/coreboot/x60/warn.txt
 delete mode 100644 config/coreboot/x60_16mb/warn.txt

diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index 3c06a458..38046653 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -4,4 +4,4 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/macbook11/warn.txt b/config/coreboot/macbook11/warn.txt
deleted file mode 100644
index 5bffd9da..00000000
--- a/config/coreboot/macbook11/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Presumably fully stable, but see lbmk issue 179: https://codeberg.org/libreboot/lbmk/issues/179 - T60 on just battery power had the error in GRUB: alloc magic is broken at 0x7b1aedf0: 0 ----- the rev for Libreboot 2024050x is set to the LB 202306235 rev (February 2023) for now. I still think the users with that issue, and there weren't that many, just had bad RAM. GRUB shows that error on bad RAM, and I've seen it in that case on other machines too. So this machine is most likely fully stable, but I'm marking it unstable until we know fully what we're dealing with.
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index 3c06a458..38046653 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -4,4 +4,4 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/macbook11_16mb/warn.txt b/config/coreboot/macbook11_16mb/warn.txt
deleted file mode 100644
index 5bffd9da..00000000
--- a/config/coreboot/macbook11_16mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Presumably fully stable, but see lbmk issue 179: https://codeberg.org/libreboot/lbmk/issues/179 - T60 on just battery power had the error in GRUB: alloc magic is broken at 0x7b1aedf0: 0 ----- the rev for Libreboot 2024050x is set to the LB 202306235 rev (February 2023) for now. I still think the users with that issue, and there weren't that many, just had bad RAM. GRUB shows that error on bad RAM, and I've seen it in that case on other machines too. So this machine is most likely fully stable, but I'm marking it unstable until we know fully what we're dealing with.
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index b4feb4de..27d71b5a 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/macbook21/warn.txt b/config/coreboot/macbook21/warn.txt
deleted file mode 100644
index 5bffd9da..00000000
--- a/config/coreboot/macbook21/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Presumably fully stable, but see lbmk issue 179: https://codeberg.org/libreboot/lbmk/issues/179 - T60 on just battery power had the error in GRUB: alloc magic is broken at 0x7b1aedf0: 0 ----- the rev for Libreboot 2024050x is set to the LB 202306235 rev (February 2023) for now. I still think the users with that issue, and there weren't that many, just had bad RAM. GRUB shows that error on bad RAM, and I've seen it in that case on other machines too. So this machine is most likely fully stable, but I'm marking it unstable until we know fully what we're dealing with.
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index b4feb4de..27d71b5a 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/macbook21_16mb/warn.txt b/config/coreboot/macbook21_16mb/warn.txt
deleted file mode 100644
index 5bffd9da..00000000
--- a/config/coreboot/macbook21_16mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Presumably fully stable, but see lbmk issue 179: https://codeberg.org/libreboot/lbmk/issues/179 - T60 on just battery power had the error in GRUB: alloc magic is broken at 0x7b1aedf0: 0 ----- the rev for Libreboot 2024050x is set to the LB 202306235 rev (February 2023) for now. I still think the users with that issue, and there weren't that many, just had bad RAM. GRUB shows that error on bad RAM, and I've seen it in that case on other machines too. So this machine is most likely fully stable, but I'm marking it unstable until we know fully what we're dealing with.
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 004ba1b0..bb3decba 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/t60_16mb_intelgpu/warn.txt b/config/coreboot/t60_16mb_intelgpu/warn.txt
deleted file mode 100644
index 5bffd9da..00000000
--- a/config/coreboot/t60_16mb_intelgpu/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Presumably fully stable, but see lbmk issue 179: https://codeberg.org/libreboot/lbmk/issues/179 - T60 on just battery power had the error in GRUB: alloc magic is broken at 0x7b1aedf0: 0 ----- the rev for Libreboot 2024050x is set to the LB 202306235 rev (February 2023) for now. I still think the users with that issue, and there weren't that many, just had bad RAM. GRUB shows that error on bad RAM, and I've seen it in that case on other machines too. So this machine is most likely fully stable, but I'm marking it unstable until we know fully what we're dealing with.
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 004ba1b0..bb3decba 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/t60_intelgpu/warn.txt b/config/coreboot/t60_intelgpu/warn.txt
deleted file mode 100644
index 5bffd9da..00000000
--- a/config/coreboot/t60_intelgpu/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Presumably fully stable, but see lbmk issue 179: https://codeberg.org/libreboot/lbmk/issues/179 - T60 on just battery power had the error in GRUB: alloc magic is broken at 0x7b1aedf0: 0 ----- the rev for Libreboot 2024050x is set to the LB 202306235 rev (February 2023) for now. I still think the users with that issue, and there weren't that many, just had bad RAM. GRUB shows that error on bad RAM, and I've seen it in that case on other machines too. So this machine is most likely fully stable, but I'm marking it unstable until we know fully what we're dealing with.
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 004ba1b0..bb3decba 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/x60/warn.txt b/config/coreboot/x60/warn.txt
deleted file mode 100644
index 5bffd9da..00000000
--- a/config/coreboot/x60/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Presumably fully stable, but see lbmk issue 179: https://codeberg.org/libreboot/lbmk/issues/179 - T60 on just battery power had the error in GRUB: alloc magic is broken at 0x7b1aedf0: 0 ----- the rev for Libreboot 2024050x is set to the LB 202306235 rev (February 2023) for now. I still think the users with that issue, and there weren't that many, just had bad RAM. GRUB shows that error on bad RAM, and I've seen it in that case on other machines too. So this machine is most likely fully stable, but I'm marking it unstable until we know fully what we're dealing with.
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 004ba1b0..bb3decba 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/x60_16mb/warn.txt b/config/coreboot/x60_16mb/warn.txt
deleted file mode 100644
index 5bffd9da..00000000
--- a/config/coreboot/x60_16mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Presumably fully stable, but see lbmk issue 179: https://codeberg.org/libreboot/lbmk/issues/179 - T60 on just battery power had the error in GRUB: alloc magic is broken at 0x7b1aedf0: 0 ----- the rev for Libreboot 2024050x is set to the LB 202306235 rev (February 2023) for now. I still think the users with that issue, and there weren't that many, just had bad RAM. GRUB shows that error on bad RAM, and I've seen it in that case on other machines too. So this machine is most likely fully stable, but I'm marking it unstable until we know fully what we're dealing with.

From df5e321648f53ffa3c7d8ec2428deddb3e58a8d3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 May 2024 05:56:42 +0100
Subject: [PATCH 0290/1549] set dell latitudes stable for release

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/e5420_6mb/target.cfg  | 2 +-
 config/coreboot/e5520_6mb/target.cfg  | 2 +-
 config/coreboot/e5530_12mb/target.cfg | 2 +-
 config/coreboot/e6400_4mb/target.cfg  | 2 +-
 config/coreboot/e6420_10mb/target.cfg | 2 +-
 config/coreboot/e6430_12mb/target.cfg | 2 +-
 config/coreboot/e6520_10mb/target.cfg | 2 +-
 config/coreboot/e6530_12mb/target.cfg | 2 +-
 8 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index e48db5e5..a0cfb47e 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index e48db5e5..a0cfb47e 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index e48db5e5..a0cfb47e 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index d1ea26ad..fb7c7bfb 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable" # broken s3
+status="stable" # broken s3
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index e48db5e5..a0cfb47e 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index e48db5e5..a0cfb47e 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index e48db5e5..a0cfb47e 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index e48db5e5..a0cfb47e 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"

From 50f6943ccd71c0249915c17e993bcb5c3341d5d3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 May 2024 05:59:31 +0100
Subject: [PATCH 0291/1549] set gru bob/kevin stable for release

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/gru_bob/target.cfg   | 2 +-
 config/coreboot/gru_kevin/target.cfg | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/coreboot/gru_bob/target.cfg b/config/coreboot/gru_bob/target.cfg
index c6ad9102..86283f7a 100644
--- a/config/coreboot/gru_bob/target.cfg
+++ b/config/coreboot/gru_bob/target.cfg
@@ -1,4 +1,4 @@
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/gru_kevin/target.cfg b/config/coreboot/gru_kevin/target.cfg
index c6ad9102..86283f7a 100644
--- a/config/coreboot/gru_kevin/target.cfg
+++ b/config/coreboot/gru_kevin/target.cfg
@@ -1,4 +1,4 @@
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
-status="unstable"
+status="stable"

From 6dfd8c707052dfcd90d87342e4793ccde7084450 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 May 2024 06:12:50 +0100
Subject: [PATCH 0292/1549] update release status for HP machines

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/hp2170p_16mb/target.cfg      | 2 +-
 config/coreboot/hp2170p_16mb/warn.txt        | 1 +
 config/coreboot/hp2560p_8mb/target.cfg       | 2 +-
 config/coreboot/hp2560p_8mb/warn.txt         | 1 +
 config/coreboot/hp2570p_16mb/target.cfg      | 2 +-
 config/coreboot/hp2570p_16mb/warn.txt        | 1 +
 config/coreboot/hp8200sff_4mb/target.cfg     | 2 +-
 config/coreboot/hp8200sff_4mb/warn.txt       | 1 +
 config/coreboot/hp8200sff_8mb/target.cfg     | 2 +-
 config/coreboot/hp8200sff_8mb/warn.txt       | 1 +
 config/coreboot/hp820g2_12mb/warn.txt        | 1 +
 config/coreboot/hp8300cmt_16mb/target.cfg    | 2 +-
 config/coreboot/hp8300cmt_16mb/warn.txt      | 1 +
 config/coreboot/hp8300usdt_16mb/target.cfg   | 2 +-
 config/coreboot/hp8300usdt_16mb/warn.txt     | 1 +
 config/coreboot/hp8460pintel_8mb/target.cfg  | 2 +-
 config/coreboot/hp8460pintel_8mb/warn.txt    | 1 +
 config/coreboot/hp8470pintel_16mb/target.cfg | 2 +-
 config/coreboot/hp8470pintel_16mb/warn.txt   | 1 +
 config/coreboot/hp8560w_8mb/warn.txt         | 1 +
 config/coreboot/hp9470m_16mb/target.cfg      | 2 +-
 config/coreboot/hp9470m_16mb/warn.txt        | 1 +
 22 files changed, 22 insertions(+), 10 deletions(-)
 create mode 100644 config/coreboot/hp2170p_16mb/warn.txt
 create mode 100644 config/coreboot/hp2560p_8mb/warn.txt
 create mode 100644 config/coreboot/hp2570p_16mb/warn.txt
 create mode 100644 config/coreboot/hp8200sff_4mb/warn.txt
 create mode 100644 config/coreboot/hp8200sff_8mb/warn.txt
 create mode 100644 config/coreboot/hp820g2_12mb/warn.txt
 create mode 100644 config/coreboot/hp8300cmt_16mb/warn.txt
 create mode 100644 config/coreboot/hp8300usdt_16mb/warn.txt
 create mode 100644 config/coreboot/hp8460pintel_8mb/warn.txt
 create mode 100644 config/coreboot/hp8470pintel_16mb/warn.txt
 create mode 100644 config/coreboot/hp8560w_8mb/warn.txt
 create mode 100644 config/coreboot/hp9470m_16mb/warn.txt

diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index 1b9e33f0..e6f295cf 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="untested"
+status="unstable"
diff --git a/config/coreboot/hp2170p_16mb/warn.txt b/config/coreboot/hp2170p_16mb/warn.txt
new file mode 100644
index 00000000..68f0b1fe
--- /dev/null
+++ b/config/coreboot/hp2170p_16mb/warn.txt
@@ -0,0 +1 @@
+HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index 1b9e33f0..e6f295cf 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="untested"
+status="unstable"
diff --git a/config/coreboot/hp2560p_8mb/warn.txt b/config/coreboot/hp2560p_8mb/warn.txt
new file mode 100644
index 00000000..68f0b1fe
--- /dev/null
+++ b/config/coreboot/hp2560p_8mb/warn.txt
@@ -0,0 +1 @@
+HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index 1b9e33f0..e6f295cf 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="untested"
+status="unstable"
diff --git a/config/coreboot/hp2570p_16mb/warn.txt b/config/coreboot/hp2570p_16mb/warn.txt
new file mode 100644
index 00000000..68f0b1fe
--- /dev/null
+++ b/config/coreboot/hp2570p_16mb/warn.txt
@@ -0,0 +1 @@
+HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 12afcd76..01583d37 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="untested"
+status="unstable"
diff --git a/config/coreboot/hp8200sff_4mb/warn.txt b/config/coreboot/hp8200sff_4mb/warn.txt
new file mode 100644
index 00000000..68f0b1fe
--- /dev/null
+++ b/config/coreboot/hp8200sff_4mb/warn.txt
@@ -0,0 +1 @@
+HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 12afcd76..01583d37 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="untested"
+status="unstable"
diff --git a/config/coreboot/hp8200sff_8mb/warn.txt b/config/coreboot/hp8200sff_8mb/warn.txt
new file mode 100644
index 00000000..68f0b1fe
--- /dev/null
+++ b/config/coreboot/hp8200sff_8mb/warn.txt
@@ -0,0 +1 @@
+HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp820g2_12mb/warn.txt b/config/coreboot/hp820g2_12mb/warn.txt
new file mode 100644
index 00000000..68f0b1fe
--- /dev/null
+++ b/config/coreboot/hp820g2_12mb/warn.txt
@@ -0,0 +1 @@
+HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index 12afcd76..01583d37 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="untested"
+status="unstable"
diff --git a/config/coreboot/hp8300cmt_16mb/warn.txt b/config/coreboot/hp8300cmt_16mb/warn.txt
new file mode 100644
index 00000000..68f0b1fe
--- /dev/null
+++ b/config/coreboot/hp8300cmt_16mb/warn.txt
@@ -0,0 +1 @@
+HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index 12afcd76..01583d37 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="untested"
+status="unstable"
diff --git a/config/coreboot/hp8300usdt_16mb/warn.txt b/config/coreboot/hp8300usdt_16mb/warn.txt
new file mode 100644
index 00000000..68f0b1fe
--- /dev/null
+++ b/config/coreboot/hp8300usdt_16mb/warn.txt
@@ -0,0 +1 @@
+HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index 1b9e33f0..e6f295cf 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="untested"
+status="unstable"
diff --git a/config/coreboot/hp8460pintel_8mb/warn.txt b/config/coreboot/hp8460pintel_8mb/warn.txt
new file mode 100644
index 00000000..68f0b1fe
--- /dev/null
+++ b/config/coreboot/hp8460pintel_8mb/warn.txt
@@ -0,0 +1 @@
+HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index 1b9e33f0..e6f295cf 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="untested"
+status="unstable"
diff --git a/config/coreboot/hp8470pintel_16mb/warn.txt b/config/coreboot/hp8470pintel_16mb/warn.txt
new file mode 100644
index 00000000..68f0b1fe
--- /dev/null
+++ b/config/coreboot/hp8470pintel_16mb/warn.txt
@@ -0,0 +1 @@
+HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp8560w_8mb/warn.txt b/config/coreboot/hp8560w_8mb/warn.txt
new file mode 100644
index 00000000..68f0b1fe
--- /dev/null
+++ b/config/coreboot/hp8560w_8mb/warn.txt
@@ -0,0 +1 @@
+HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index 1b9e33f0..e6f295cf 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="untested"
+status="unstable"
diff --git a/config/coreboot/hp9470m_16mb/warn.txt b/config/coreboot/hp9470m_16mb/warn.txt
new file mode 100644
index 00000000..68f0b1fe
--- /dev/null
+++ b/config/coreboot/hp9470m_16mb/warn.txt
@@ -0,0 +1 @@
+HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.

From 5c3d81fff9f90b19f09c95fae43eacff10ab932e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 May 2024 06:29:09 +0100
Subject: [PATCH 0293/1549] correct dell latitude status for release

it should be marked unstable, though these machines
are basically reliable; they have certain missing features
and quirky behaviour so it's important not to over-sell it

mark it as unstable, on all of the dell latitudes

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/e5420_6mb/target.cfg  | 2 +-
 config/coreboot/e5520_6mb/target.cfg  | 2 +-
 config/coreboot/e5530_12mb/target.cfg | 2 +-
 config/coreboot/e6400_4mb/target.cfg  | 2 +-
 config/coreboot/e6420_10mb/target.cfg | 2 +-
 config/coreboot/e6430_12mb/target.cfg | 2 +-
 config/coreboot/e6520_10mb/target.cfg | 2 +-
 config/coreboot/e6530_12mb/target.cfg | 2 +-
 8 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index a0cfb47e..e48db5e5 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable"
+status="unstable"
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index a0cfb47e..e48db5e5 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable"
+status="unstable"
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index a0cfb47e..e48db5e5 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable"
+status="unstable"
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index fb7c7bfb..d1ea26ad 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable" # broken s3
+status="unstable" # broken s3
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index a0cfb47e..e48db5e5 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable"
+status="unstable"
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index a0cfb47e..e48db5e5 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable"
+status="unstable"
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index a0cfb47e..e48db5e5 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable"
+status="unstable"
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index a0cfb47e..e48db5e5 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable"
+status="unstable"

From b4d27d0cc6e212ec05fe05a8f2b233138ec5b9de Mon Sep 17 00:00:00 2001
From: livio <livio@codeberg.org>
Date: Wed, 1 May 2024 11:06:27 +0200
Subject: [PATCH 0294/1549] Fixed boot selection menu

---
 config/grub/config/grub.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 17576b5f..d8ad7d02 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -164,7 +164,7 @@ menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on AHCI  [a]' --hotkey='a'
 	search_bootcfg ahci
 }
 menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on ATA/IDE  [d]' --hotkey='d' {
-	search_bootcfg ahci
+	search_bootcfg ata
 }
 if [ -f (cbfsdisk)/grubtest.cfg ]; then
 menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey='t' {

From d654a3e5edf8c8bf63a72f2ca68428f19f28ef1b Mon Sep 17 00:00:00 2001
From: livio <livio@codeberg.org>
Date: Wed, 1 May 2024 11:17:59 +0200
Subject: [PATCH 0295/1549] Fixed QEMU x86 target's SMBIOS informations

---
 config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
index 81e94a21..6aa7a4b8 100644
--- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
@@ -113,7 +113,7 @@ CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_MAINBOARD_VENDOR="QEMU"
 CONFIG_CBFS_SIZE=0xBE0000
 CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=4
@@ -127,7 +127,7 @@ CONFIG_VBOOT_VBNV_OFFSET=0x2c
 CONFIG_IRQ_SLOT_COUNT=6
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="QEMU"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
@@ -152,7 +152,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230"
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000

From 707d7ce7d094ea40555119f045efee84f1d9cbad Mon Sep 17 00:00:00 2001
From: livio <livio@codeberg.org>
Date: Wed, 1 May 2024 11:20:46 +0200
Subject: [PATCH 0296/1549] Fixed QEMU x86 target's SMBIOS informations

---
 config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
index c5a77eb2..91435206 100644
--- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
@@ -113,7 +113,7 @@ CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_MAINBOARD_VENDOR="QEMU"
 CONFIG_CBFS_SIZE=0xBE0000
 CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=4
@@ -127,7 +127,7 @@ CONFIG_VBOOT_VBNV_OFFSET=0x2c
 CONFIG_IRQ_SLOT_COUNT=6
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="QEMU"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
@@ -152,7 +152,7 @@ CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230"
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000

From 355dffb7089707efd8ebe75b1652cec44a06f317 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 1 May 2024 20:09:50 -0600
Subject: [PATCH 0297/1549] dell_flash_unlock: Fix ec_set_fdo() signature

Set argument list as void.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 util/dell-flash-unlock/dell_flash_unlock.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/util/dell-flash-unlock/dell_flash_unlock.c b/util/dell-flash-unlock/dell_flash_unlock.c
index 174a1c92..6118b0d4 100644
--- a/util/dell-flash-unlock/dell_flash_unlock.c
+++ b/util/dell-flash-unlock/dell_flash_unlock.c
@@ -15,7 +15,7 @@
 
 int get_fdo_status(void);
 int check_lpc_decode(void);
-void ec_set_fdo();
+void ec_set_fdo(void);
 void write_ec_reg(uint8_t index, uint8_t data);
 void send_ec_cmd(uint8_t cmd);
 int wait_ec(void);
@@ -141,7 +141,7 @@ check_lpc_decode(void)
 }
 
 void
-ec_set_fdo()
+ec_set_fdo(void)
 {
 	/* EC FDO command arguments for reference:
 	 * 0 = Query EC FDO status

From 61dbaf9463034fb893ca8f5131681bdd54ec5472 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 1 May 2024 20:10:43 -0600
Subject: [PATCH 0298/1549] dell_flash_unlock: Set iopl level back to 0 when
 done

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 util/dell-flash-unlock/dell_flash_unlock.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/util/dell-flash-unlock/dell_flash_unlock.c b/util/dell-flash-unlock/dell_flash_unlock.c
index 6118b0d4..d59f5d5b 100644
--- a/util/dell-flash-unlock/dell_flash_unlock.c
+++ b/util/dell-flash-unlock/dell_flash_unlock.c
@@ -96,6 +96,7 @@ main(int argc, char *argv[])
 				"You can now shutdown the system.\n");
 		}
 	}
+	sys_iopl(0);
 	return errno;
 }
 

From 5e2e761142085f60c85f19895d985a58a6f5ee0f Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 1 May 2024 20:11:14 -0600
Subject: [PATCH 0299/1549] dell_flash_unlock: Add support for FreeBSD

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 util/dell-flash-unlock/accessors.c | 39 +++++++++++++++++++++++++++---
 1 file changed, 35 insertions(+), 4 deletions(-)

diff --git a/util/dell-flash-unlock/accessors.c b/util/dell-flash-unlock/accessors.c
index a8541e28..0a5df760 100644
--- a/util/dell-flash-unlock/accessors.c
+++ b/util/dell-flash-unlock/accessors.c
@@ -18,6 +18,13 @@
 #endif /* __i386__ */
 #endif /* __OpenBSD__ */
 
+#if defined(__FreeBSD__)
+#include <fcntl.h>
+#include <sys/types.h>
+#include <machine/cpufunc.h>
+#include <unistd.h>
+#endif /* __FreeBSD__ */
+
 #include <errno.h>
 
 #include "accessors.h"
@@ -42,7 +49,7 @@ sys_outb(unsigned int port, uint8_t data)
 	#if defined(__linux__)
 	outb(data, port);
 	#endif
-	#if defined(__OpenBSD__)
+	#if defined(__OpenBSD__) || defined(__FreeBSD__)
 	outb(port, data);
 	#endif
 	#if defined(__NetBSD__)
@@ -56,7 +63,7 @@ sys_outl(unsigned int port, uint32_t data)
 	#if defined(__linux__)
 	outl(data, port);
 	#endif
-	#if defined(__OpenBSD__)
+	#if defined(__OpenBSD__) || defined(__FreeBSD__)
 	outl(port, data);
 	#endif
 	#if defined(__NetBSD__)
@@ -67,7 +74,8 @@ sys_outl(unsigned int port, uint32_t data)
 uint8_t
 sys_inb(unsigned int port)
 {
-	#if defined(__linux__) || defined (__OpenBSD__)
+	#if defined(__linux__) || defined (__OpenBSD__) \
+		|| defined(__FreeBSD__)
 	return inb(port);
 	#endif
 
@@ -82,7 +90,8 @@ sys_inb(unsigned int port)
 uint32_t
 sys_inl(unsigned int port)
 {
-	#if defined(__linux__) || defined (__OpenBSD__)
+	#if defined(__linux__) || defined (__OpenBSD__) \
+		|| defined(__FreeBSD__)
 	return inl(port);
 	#endif
 	#if defined(__NetBSD__)
@@ -115,6 +124,28 @@ sys_iopl(int level)
 #endif /* __amd64__ */
 #endif /* __NetBSD__ */
 
+#if defined(__FreeBSD__)
+	/* Refer to io(4) manual page. This assumes the legacy behavior
+	 * where opening /dev/io raises the IOPL of the process */
+	static int io_fd = -1;
+
+	/* Requesting privileged access */
+	if (level > 0) {
+		if (io_fd == -1) {
+			io_fd = open("/dev/io", O_RDONLY);
+			return (io_fd == -1) ? -1 : 0;
+		}
+	/* Lowering access to lowest level */
+	} else if (level == 0 && io_fd != -1) {
+		if (close(io_fd) == -1) {
+			return -1;
+		} else {
+			io_fd = -1;
+		}
+	}
+	return 0;
+#endif /* __FreeBSD__ */
+
 	errno = ENOSYS;
 	return -1;
 }

From 61f66a46eab2480d45b14a14889e082678daaa80 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 1 May 2024 20:20:24 -0600
Subject: [PATCH 0300/1549] dell-flash-unlock: Update README for BSD

Add FreeBSD to the README as it is now supported. Make a note about
using gmake instead of make as the makefile currently uses GNU
extensions to determine build flags based on the OS.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 util/dell-flash-unlock/README.md | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/util/dell-flash-unlock/README.md b/util/dell-flash-unlock/README.md
index aca01743..e179e77c 100644
--- a/util/dell-flash-unlock/README.md
+++ b/util/dell-flash-unlock/README.md
@@ -20,14 +20,17 @@ around 2008 (E6400 era).
   If it says it is not set, then you will need to install or compile a kernel
   with that option set.
 
-### OpenBSD/NetBSD
-- On OpenBSD/NetBSD, ensure you are booting with securelevel set to -1.
+### OpenBSD/NetBSD/FreeBSD
+- The makefile is not currently compatible with POSIX make; install and use GNU
+  Make (gmake) to build dell-flash-unlock instead of make
+- On OpenBSD/NetBSD/FreeBSD, ensure you are booting with securelevel set to -1.
 
 ### General
 Make sure an AC adapter is plugged into your system
 
-Run `make` to compile the utility, and then run `./dell_flash_unlock` with
-root/superuser permissions and follow the directions it outputs.
+Run `make` (or `gmake` on BSD) to compile the utility, and then run
+`./dell_flash_unlock` with root/superuser permissions and follow the directions
+it outputs.
 
 ## Confirmed supported devices
 - Latitude E6400, E6500

From a5cb63764b9984f8e99275b00bd9d5d974a88d1e Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 1 May 2024 21:39:13 -0600
Subject: [PATCH 0301/1549] dell-flash-unlock: Remove dependency on GNU Make

Use shell scripting in the recipe instead of GNU make's
conditional syntax. This allows the Makefile to work with
the default implementations of make on the BSDs.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 util/dell-flash-unlock/Makefile  | 12 +++++-------
 util/dell-flash-unlock/README.md |  7 ++-----
 2 files changed, 7 insertions(+), 12 deletions(-)

diff --git a/util/dell-flash-unlock/Makefile b/util/dell-flash-unlock/Makefile
index aee07167..8528c10e 100644
--- a/util/dell-flash-unlock/Makefile
+++ b/util/dell-flash-unlock/Makefile
@@ -3,16 +3,14 @@
 
 CC=cc
 CFLAGS=-Wall -Wextra -Werror -O2 -pedantic
-ifeq ($(shell uname), OpenBSD)
-	CFLAGS += -l$(shell uname -p)
-endif
-ifeq ($(shell uname), NetBSD)
-	CFLAGS += -l$(shell uname -p)
-endif
 SRCS=dell_flash_unlock.c accessors.c
 
 all: $(SRCS) accessors.h
-	$(CC) $(CFLAGS) $(SRCS) -o dell_flash_unlock
+	CFLAGS="$(CFLAGS)"; \
+	if [ $$(uname) = OpenBSD ] || [ $$(uname) = NetBSD ]; then \
+		CFLAGS="$$CFLAGS -l$$(uname -p)"; \
+	fi; \
+	$(CC) $$CFLAGS $(SRCS) -o dell_flash_unlock
 
 clean:
 	rm -f dell_flash_unlock
diff --git a/util/dell-flash-unlock/README.md b/util/dell-flash-unlock/README.md
index e179e77c..7333f63e 100644
--- a/util/dell-flash-unlock/README.md
+++ b/util/dell-flash-unlock/README.md
@@ -21,16 +21,13 @@ around 2008 (E6400 era).
   with that option set.
 
 ### OpenBSD/NetBSD/FreeBSD
-- The makefile is not currently compatible with POSIX make; install and use GNU
-  Make (gmake) to build dell-flash-unlock instead of make
 - On OpenBSD/NetBSD/FreeBSD, ensure you are booting with securelevel set to -1.
 
 ### General
 Make sure an AC adapter is plugged into your system
 
-Run `make` (or `gmake` on BSD) to compile the utility, and then run
-`./dell_flash_unlock` with root/superuser permissions and follow the directions
-it outputs.
+Run `make` to compile the utility, and then run `./dell_flash_unlock` with
+root/superuser permissions and follow the directions it outputs.
 
 ## Confirmed supported devices
 - Latitude E6400, E6500

From 7db2ae0bd2064db5398e3c47cdfe2b399664ef17 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 May 2024 07:11:43 +0100
Subject: [PATCH 0302/1549] update/release: say when an archive is being made

without this change, the user might think lbmk crashed

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/update/release | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/script/update/release b/script/update/release
index d7b7d108..bdada97a 100755
--- a/script/update/release
+++ b/script/update/release
@@ -1,6 +1,6 @@
 #!/usr/bin/env sh
 # SPDX-License-Identifier: MIT
-# SPDX-FileCopyrightText: 2020-2023 Leah Rowe <leah@libreboot.org>
+# SPDX-FileCopyrightText: 2020-2024 Leah Rowe <leah@libreboot.org>
 
 set -u -e
 
@@ -216,6 +216,7 @@ mktarball()
 
 	[ "${2%/*}" = "${2}" ] || \
 		mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
+	printf "\nCreating archive: %s\n\n" "$2"
 	if [ "${tar_implementation% *}" = "tar (GNU tar)" ]; then
 		tar --sort=name --owner=root:0 --group=root:0 \
 		    --mtime="UTC 2024-02-25" -c "$1" | xz -T$threads -9e \

From 9caff26332ae2c0c5c49ebb4d9946237c1419561 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 May 2024 07:13:54 +0100
Subject: [PATCH 0303/1549] err.sh: update copyright info

i added a few changes during this year so far, 2024

update the copyright years

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/err.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/err.sh b/include/err.sh
index a94275f3..a25effe6 100755
--- a/include/err.sh
+++ b/include/err.sh
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: MIT
-# SPDX-FileCopyrightText: 2022, 2023 Leah Rowe <leah@libreboot.org>
+# SPDX-FileCopyrightText: 2022, 2024 Leah Rowe <leah@libreboot.org>
 
 export LC_COLLATE=C
 export LC_ALL=C

From 748b20721587793ec296875e41eb8cd02904a693 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 May 2024 13:57:35 +0100
Subject: [PATCH 0304/1549] mark x4x boards ready for release

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/g43t-am3/target.cfg      | 2 +-
 config/coreboot/g43t-am3_16mb/target.cfg | 3 ++-
 config/coreboot/ga-g41m-es2l/target.cfg  | 2 +-
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/config/coreboot/g43t-am3/target.cfg b/config/coreboot/g43t-am3/target.cfg
index af80482f..21b6872f 100644
--- a/config/coreboot/g43t-am3/target.cfg
+++ b/config/coreboot/g43t-am3/target.cfg
@@ -3,4 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grub_timeout=10
-status="untested"
+status="stable"
diff --git a/config/coreboot/g43t-am3_16mb/target.cfg b/config/coreboot/g43t-am3_16mb/target.cfg
index af80482f..01cd4d07 100644
--- a/config/coreboot/g43t-am3_16mb/target.cfg
+++ b/config/coreboot/g43t-am3_16mb/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grub_timeout=10
-status="untested"
+status="stable"
+release="n"
diff --git a/config/coreboot/ga-g41m-es2l/target.cfg b/config/coreboot/ga-g41m-es2l/target.cfg
index 9fc566d8..dc53b74a 100644
--- a/config/coreboot/ga-g41m-es2l/target.cfg
+++ b/config/coreboot/ga-g41m-es2l/target.cfg
@@ -4,4 +4,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ata"
 grub_timeout=10
-status="untested"
+status="stable"

From 64ae2ddd331528fb1231ced3d641f5c0a4a780c9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 May 2024 14:02:02 +0100
Subject: [PATCH 0305/1549] update/release: purge test/lib/strlcat.c in u-boot

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/update/release | 1 +
 1 file changed, 1 insertion(+)

diff --git a/script/update/release b/script/update/release
index bdada97a..fcee49e7 100755
--- a/script/update/release
+++ b/script/update/release
@@ -185,6 +185,7 @@ insert_copying_files()
 	cp -R "src/u-boot/default/Licenses" "${l}/COPYING.u-boot" || return 1
 	printf "Multiple licenses. Check corresponding %s source archive\n" \
 	    "${projectname}" > "${1}/COPYING" || return 1
+	rm -f src/u-boot/*/test/lib/strlcat.c || return 1
 }
 
 mkrom_tarball()

From 2d207c547cdfba50d9c376197f95ad892432a697 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 May 2024 14:27:50 +0100
Subject: [PATCH 0306/1549] coreboot/x301: set release=n (will re-test)

was reported broken on canoeboot 0.1, which uses 2021
coreboot. we use much newer coreboot now in libreboot, but
still, better be cautious. set to release=n.

i'll set status and remove release=n if it works on testing

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/x301_16mb/target.cfg | 1 +
 config/coreboot/x301_4mb/target.cfg  | 1 +
 config/coreboot/x301_8mb/target.cfg  | 1 +
 3 files changed, 3 insertions(+)

diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index 6c267eca..0867e005 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 status="untested"
+release="n"
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index 6c267eca..0867e005 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 status="untested"
+release="n"
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index 6c267eca..0867e005 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 status="untested"
+release="n"

From 6e7b5c0b2422ce1852d402122403270f04d7cef1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 May 2024 18:24:04 +0100
Subject: [PATCH 0307/1549] Enable WiFi on HP EliteBook 8560w (GPIO config)

angel pons said how to fix it. more info in the patch.

works perfectly. i still see that scancode in dmesg and i guess
i have to assign it to some function that sets software rfkill

hw rfkill is no longer set. it's unblocked, and i can use wifi.

just in time for the libreboot release.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../patches/0044-hp-8560w-turn-on-wifi.patch  | 47 +++++++++++++++++++
 1 file changed, 47 insertions(+)
 create mode 100644 config/coreboot/default/patches/0044-hp-8560w-turn-on-wifi.patch

diff --git a/config/coreboot/default/patches/0044-hp-8560w-turn-on-wifi.patch b/config/coreboot/default/patches/0044-hp-8560w-turn-on-wifi.patch
new file mode 100644
index 00000000..bb4a7b47
--- /dev/null
+++ b/config/coreboot/default/patches/0044-hp-8560w-turn-on-wifi.patch
@@ -0,0 +1,47 @@
+From 4ccef4fffd98071c339cb4135e2d8c805e554378 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Fri, 3 May 2024 17:45:52 +0100
+Subject: [PATCH 1/1] hp/8560w: turn on wifi
+
+according to angel pons, this gpio is WLAN_TRN_OFF#
+and setting it high will make wifi work. testing with
+this change as suggested by angel. see:
+
+https://review.coreboot.org/c/coreboot/+/39398/4/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c#158
+
+if it makes it into a libreboot release, you can assume
+the fix works. right now we have this problem:
+
+https://codeberg.org/libreboot/lbmk/issues/201
+
+Riku reported:
+
+[  333.890080] atkbd serio0: Unknown key pressed (translated set 2, code 0xf8 on isa0060/serio0).
+[  333.890102] atkbd serio0: Use 'setkeycodes e078 <keycode>' to make it known.
+[  334.104069] atkbd serio0: Unknown key released (translated set 2, code 0xf8 on isa0060/serio0).
+[  334.104090] atkbd serio0: Use 'setkeycodes e078 <keycode>' to make it known.
+
+The wifi stays to hardblocked in rfkill. When the wireless button
+is pressed, nothing changes except for these lines in dmesg.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
+index 560d668d6f..10cd11ce48 100644
+--- a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
++++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
+@@ -155,7 +155,7 @@ static const struct pch_gpio_set2 pch_gpio_set2_level = {
+ 	.gpio37 = GPIO_LEVEL_LOW,
+ 	.gpio49 = GPIO_LEVEL_LOW,
+ 	.gpio53 = GPIO_LEVEL_HIGH,
+-	.gpio57 = GPIO_LEVEL_LOW,
++	.gpio57 = GPIO_LEVEL_HIGH,
+ 	.gpio60 = GPIO_LEVEL_HIGH,
+ 	.gpio61 = GPIO_LEVEL_HIGH,
+ };
+-- 
+2.39.2
+

From b379186a5c56b842161e4a08dfe5a65e5a912755 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 May 2024 19:38:06 +0100
Subject: [PATCH 0308/1549] update hp machines to status=stable for release

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/hp2170p_16mb/target.cfg      | 2 +-
 config/coreboot/hp2170p_16mb/warn.txt        | 1 -
 config/coreboot/hp2560p_8mb/target.cfg       | 2 +-
 config/coreboot/hp2560p_8mb/warn.txt         | 1 -
 config/coreboot/hp2570p_16mb/target.cfg      | 2 +-
 config/coreboot/hp2570p_16mb/warn.txt        | 1 -
 config/coreboot/hp8200sff_4mb/target.cfg     | 2 +-
 config/coreboot/hp8200sff_4mb/warn.txt       | 1 -
 config/coreboot/hp8200sff_8mb/target.cfg     | 2 +-
 config/coreboot/hp8200sff_8mb/warn.txt       | 1 -
 config/coreboot/hp820g2_12mb/warn.txt        | 1 -
 config/coreboot/hp8300cmt_16mb/target.cfg    | 2 +-
 config/coreboot/hp8300cmt_16mb/warn.txt      | 1 -
 config/coreboot/hp8300usdt_16mb/target.cfg   | 2 +-
 config/coreboot/hp8300usdt_16mb/warn.txt     | 1 -
 config/coreboot/hp8460pintel_8mb/target.cfg  | 2 +-
 config/coreboot/hp8460pintel_8mb/warn.txt    | 1 -
 config/coreboot/hp8470pintel_16mb/target.cfg | 2 +-
 config/coreboot/hp8470pintel_16mb/warn.txt   | 1 -
 config/coreboot/hp8560w_8mb/target.cfg       | 2 +-
 config/coreboot/hp8560w_8mb/warn.txt         | 1 -
 config/coreboot/hp9470m_16mb/target.cfg      | 2 +-
 config/coreboot/hp9470m_16mb/warn.txt        | 1 -
 23 files changed, 11 insertions(+), 23 deletions(-)
 delete mode 100644 config/coreboot/hp2170p_16mb/warn.txt
 delete mode 100644 config/coreboot/hp2560p_8mb/warn.txt
 delete mode 100644 config/coreboot/hp2570p_16mb/warn.txt
 delete mode 100644 config/coreboot/hp8200sff_4mb/warn.txt
 delete mode 100644 config/coreboot/hp8200sff_8mb/warn.txt
 delete mode 100644 config/coreboot/hp820g2_12mb/warn.txt
 delete mode 100644 config/coreboot/hp8300cmt_16mb/warn.txt
 delete mode 100644 config/coreboot/hp8300usdt_16mb/warn.txt
 delete mode 100644 config/coreboot/hp8460pintel_8mb/warn.txt
 delete mode 100644 config/coreboot/hp8470pintel_16mb/warn.txt
 delete mode 100644 config/coreboot/hp8560w_8mb/warn.txt
 delete mode 100644 config/coreboot/hp9470m_16mb/warn.txt

diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index e6f295cf..5cdb7116 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="unstable"
+status="stable"
diff --git a/config/coreboot/hp2170p_16mb/warn.txt b/config/coreboot/hp2170p_16mb/warn.txt
deleted file mode 100644
index 68f0b1fe..00000000
--- a/config/coreboot/hp2170p_16mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index e6f295cf..5cdb7116 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="unstable"
+status="stable"
diff --git a/config/coreboot/hp2560p_8mb/warn.txt b/config/coreboot/hp2560p_8mb/warn.txt
deleted file mode 100644
index 68f0b1fe..00000000
--- a/config/coreboot/hp2560p_8mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index e6f295cf..5cdb7116 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="unstable"
+status="stable"
diff --git a/config/coreboot/hp2570p_16mb/warn.txt b/config/coreboot/hp2570p_16mb/warn.txt
deleted file mode 100644
index 68f0b1fe..00000000
--- a/config/coreboot/hp2570p_16mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 01583d37..04510c57 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="unstable"
+status="stable"
diff --git a/config/coreboot/hp8200sff_4mb/warn.txt b/config/coreboot/hp8200sff_4mb/warn.txt
deleted file mode 100644
index 68f0b1fe..00000000
--- a/config/coreboot/hp8200sff_4mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 01583d37..04510c57 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="unstable"
+status="stable"
diff --git a/config/coreboot/hp8200sff_8mb/warn.txt b/config/coreboot/hp8200sff_8mb/warn.txt
deleted file mode 100644
index 68f0b1fe..00000000
--- a/config/coreboot/hp8200sff_8mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp820g2_12mb/warn.txt b/config/coreboot/hp820g2_12mb/warn.txt
deleted file mode 100644
index 68f0b1fe..00000000
--- a/config/coreboot/hp820g2_12mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index 01583d37..04510c57 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="unstable"
+status="stable"
diff --git a/config/coreboot/hp8300cmt_16mb/warn.txt b/config/coreboot/hp8300cmt_16mb/warn.txt
deleted file mode 100644
index 68f0b1fe..00000000
--- a/config/coreboot/hp8300cmt_16mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index 01583d37..04510c57 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="unstable"
+status="stable"
diff --git a/config/coreboot/hp8300usdt_16mb/warn.txt b/config/coreboot/hp8300usdt_16mb/warn.txt
deleted file mode 100644
index 68f0b1fe..00000000
--- a/config/coreboot/hp8300usdt_16mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index e6f295cf..5cdb7116 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="unstable"
+status="stable"
diff --git a/config/coreboot/hp8460pintel_8mb/warn.txt b/config/coreboot/hp8460pintel_8mb/warn.txt
deleted file mode 100644
index 68f0b1fe..00000000
--- a/config/coreboot/hp8460pintel_8mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index e6f295cf..5cdb7116 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="unstable"
+status="stable"
diff --git a/config/coreboot/hp8470pintel_16mb/warn.txt b/config/coreboot/hp8470pintel_16mb/warn.txt
deleted file mode 100644
index 68f0b1fe..00000000
--- a/config/coreboot/hp8470pintel_16mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg
index a352b46d..ea96b084 100644
--- a/config/coreboot/hp8560w_8mb/target.cfg
+++ b/config/coreboot/hp8560w_8mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="unstable"
+status="stable"
diff --git a/config/coreboot/hp8560w_8mb/warn.txt b/config/coreboot/hp8560w_8mb/warn.txt
deleted file mode 100644
index 68f0b1fe..00000000
--- a/config/coreboot/hp8560w_8mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index e6f295cf..5cdb7116 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="unstable"
+status="stable"
diff --git a/config/coreboot/hp9470m_16mb/warn.txt b/config/coreboot/hp9470m_16mb/warn.txt
deleted file mode 100644
index 68f0b1fe..00000000
--- a/config/coreboot/hp9470m_16mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-HP EliteBook 8560w has broken wifi. See issue https://codeberg.org/libreboot/lbmk/issues/201 - may affect other HP machines so setting them as unstable. The machines should otherwise boot reliably and you can use them - if wifi doesn't work, you can use a usb wifi dongle or, on HP desktops, use an add-on wifi card.

From 780e03fe1e6222d353f56d14b003efc70dc4e975 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 May 2024 23:00:27 +0100
Subject: [PATCH 0309/1549] remove x220edp/x230edp (keep regular x220/x230)

nitrocaster boards are hard to find nowadays and i'm not
comfortable supporting the knockoff chinese gear; quality
varies greatly, and i can't know how reliable they are.

nitrocaster has been out of business so it's just not
viable to support this mod anymore. in fact, keeping the
eDP-based targets is a liability to libreboot.

regular x220/x230 (non-eDP-modded) are retained. the eDP
modkit from nitrocaster let you use eDP screens instead
of lvds, on thinkpad x220 and x230, letting you use
higher resolution screens.

older lbmk revs can still be used, if you happen to come
across one of these boards. i only recommend using the
official nitrocaster board, if youcan find one unused.

ymmv with the chinese gear. better just use an unmodded
x230 or get a different machine.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...13-lenovo-x230-introduce-FHD-variant.patch | 198 -----
 ...the-data.vbt-path-for-the-EDP-varian.patch |  25 -
 ...ation-introduced-similar-to-x230_edp.patch | 164 -----
 .../r400_16mb/config/libgfxinit_corebootfb    |   2 -
 .../r400_16mb/config/libgfxinit_txtmode       |   2 -
 .../r400_4mb/config/libgfxinit_corebootfb     |   2 -
 .../r400_4mb/config/libgfxinit_txtmode        |   2 -
 .../r400_8mb/config/libgfxinit_corebootfb     |   2 -
 .../r400_8mb/config/libgfxinit_txtmode        |   2 -
 .../r500_4mb/config/libgfxinit_corebootfb     |   2 -
 .../r500_4mb/config/libgfxinit_txtmode        |   2 -
 .../t400_16mb/config/libgfxinit_corebootfb    |   2 -
 .../t400_16mb/config/libgfxinit_txtmode       |   2 -
 .../t400_4mb/config/libgfxinit_corebootfb     |   2 -
 .../t400_4mb/config/libgfxinit_txtmode        |   2 -
 .../t400_8mb/config/libgfxinit_corebootfb     |   2 -
 .../t400_8mb/config/libgfxinit_txtmode        |   2 -
 .../t420_8mb/config/libgfxinit_corebootfb     |   2 -
 .../t420s_8mb/config/libgfxinit_corebootfb    |   2 -
 .../t420s_8mb/config/libgfxinit_txtmode       |   2 -
 .../t430_12mb/config/libgfxinit_corebootfb    |   2 -
 .../t430_12mb/config/libgfxinit_txtmode       |   2 -
 .../config/libgfxinit_corebootfb              |   2 -
 .../t440pbmrc_12mb/config/libgfxinit_txtmode  |   2 -
 .../config/libgfxinit_corebootfb              |   2 -
 .../t440pmrc_12mb/config/libgfxinit_txtmode   |   2 -
 .../t500_16mb/config/libgfxinit_corebootfb    |   2 -
 .../t500_16mb/config/libgfxinit_txtmode       |   2 -
 .../t500_4mb/config/libgfxinit_corebootfb     |   2 -
 .../t500_4mb/config/libgfxinit_txtmode        |   2 -
 .../t500_8mb/config/libgfxinit_corebootfb     |   2 -
 .../t500_8mb/config/libgfxinit_txtmode        |   2 -
 .../t520_8mb/config/libgfxinit_corebootfb     |   2 -
 .../t520_8mb/config/libgfxinit_txtmode        |   2 -
 .../t530_12mb/config/libgfxinit_corebootfb    |   2 -
 .../t530_12mb/config/libgfxinit_txtmode       |   2 -
 .../w500_16mb/config/libgfxinit_corebootfb    |   2 -
 .../w500_16mb/config/libgfxinit_txtmode       |   2 -
 .../w500_4mb/config/libgfxinit_corebootfb     |   2 -
 .../w500_4mb/config/libgfxinit_txtmode        |   2 -
 .../w500_8mb/config/libgfxinit_corebootfb     |   2 -
 .../w500_8mb/config/libgfxinit_txtmode        |   2 -
 .../w530_12mb/config/libgfxinit_corebootfb    |   2 -
 .../w530_12mb/config/libgfxinit_txtmode       |   2 -
 .../config/libgfxinit_corebootfb              |   2 -
 .../w541bmrc_12mb/config/libgfxinit_txtmode   |   2 -
 .../w541mrc_12mb/config/libgfxinit_corebootfb |   2 -
 .../w541mrc_12mb/config/libgfxinit_txtmode    |   2 -
 .../x200_16mb/config/libgfxinit_corebootfb    |   2 -
 .../x200_16mb/config/libgfxinit_txtmode       |   2 -
 .../x200_4mb/config/libgfxinit_corebootfb     |   2 -
 .../x200_4mb/config/libgfxinit_txtmode        |   2 -
 .../x200_8mb/config/libgfxinit_corebootfb     |   2 -
 .../x200_8mb/config/libgfxinit_txtmode        |   2 -
 .../x220_8mb/config/libgfxinit_corebootfb     |   2 -
 .../x220_8mb/config/libgfxinit_txtmode        |   2 -
 .../x220edp_8mb/config/libgfxinit_corebootfb  | 674 ------------------
 .../x220edp_8mb/config/libgfxinit_txtmode     | 671 -----------------
 config/coreboot/x220edp_8mb/target.cfg        |   9 -
 config/coreboot/x220edp_8mb/warn.txt          |   1 -
 .../x230_12mb/config/libgfxinit_corebootfb    |   2 -
 .../x230_12mb/config/libgfxinit_txtmode       |   2 -
 .../x230_16mb/config/libgfxinit_corebootfb    |   2 -
 .../x230_16mb/config/libgfxinit_txtmode       |   2 -
 .../x230edp_12mb/config/libgfxinit_corebootfb | 673 -----------------
 .../x230edp_12mb/config/libgfxinit_txtmode    | 670 -----------------
 config/coreboot/x230edp_12mb/target.cfg       |   9 -
 .../x230t_12mb/config/libgfxinit_corebootfb   |   2 -
 .../x230t_12mb/config/libgfxinit_txtmode      |   2 -
 .../x230t_16mb/config/libgfxinit_corebootfb   |   2 -
 .../x230t_16mb/config/libgfxinit_txtmode      |   2 -
 .../x301_16mb/config/libgfxinit_corebootfb    |   2 -
 .../x301_16mb/config/libgfxinit_txtmode       |   2 -
 .../x301_4mb/config/libgfxinit_corebootfb     |   2 -
 .../x301_4mb/config/libgfxinit_txtmode        |   2 -
 .../x301_8mb/config/libgfxinit_corebootfb     |   2 -
 .../x301_8mb/config/libgfxinit_txtmode        |   2 -
 config/vendor/sources                         |   4 +-
 78 files changed, 2 insertions(+), 3230 deletions(-)
 delete mode 100644 config/coreboot/default/patches/0013-lenovo-x230-introduce-FHD-variant.patch
 delete mode 100644 config/coreboot/default/patches/0014-lenovo-x230-fix-the-data.vbt-path-for-the-EDP-varian.patch
 delete mode 100644 config/coreboot/default/patches/0029-x220_edp-modification-introduced-similar-to-x230_edp.patch
 delete mode 100644 config/coreboot/x220edp_8mb/config/libgfxinit_corebootfb
 delete mode 100644 config/coreboot/x220edp_8mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/x220edp_8mb/target.cfg
 delete mode 100644 config/coreboot/x220edp_8mb/warn.txt
 delete mode 100644 config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
 delete mode 100644 config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/x230edp_12mb/target.cfg

diff --git a/config/coreboot/default/patches/0013-lenovo-x230-introduce-FHD-variant.patch b/config/coreboot/default/patches/0013-lenovo-x230-introduce-FHD-variant.patch
deleted file mode 100644
index a3810417..00000000
--- a/config/coreboot/default/patches/0013-lenovo-x230-introduce-FHD-variant.patch
+++ /dev/null
@@ -1,198 +0,0 @@
-From 7b9003f98c7c685b2fe56781f3b0916018037b72 Mon Sep 17 00:00:00 2001
-From: Alexander Couzens <lynxis@fe80.eu>
-Date: Sat, 19 Mar 2022 13:42:33 +0000
-Subject: [PATCH 13/30] lenovo/x230: introduce FHD variant
-
-There is a modification for the x230 which uses the 2nd DP from the dock
-as the integrated panel's connection, which allows using a custom eDP
-panel instead of the stock LVDS display.
-
-There are several adapter boards present on the market and all of them
-uses the same method of enabling the custom eDP panel.
-
-To make this work with coreboot, the internal LVDS connector should be
-disabled in libgfxinit. The VBT has been modified as well, which allows
-brightness controls to work out of the box.
-
-The modifications done to the VBT are:
-- Remove the LVDS port entry.
-- Move the DP-3 (which is the 2nd DP on the dock) entry to the first
-  position on the list.
-- Set the DP-3 as internally connected.
-
-This has been reported to work with the following panels:
-- LP125WF2-SPB4 (1920*1080, 12.5")
-- LQ125T1JW02 (2560*1440, 12.5")
-- LQ133M1JW21 (1920*1080, 13.3")
-- LTN133HL10-201 (1920*1080, 13.3")
-- B133HAN04.6 (1920*1080, 13.3")
-- B133QAN02.0 (2560*1600, 13.3")
-
-Other eDP panels not on this list should work as well.
-
-Change-Id: I0355d39a61956792e69bccd5274cfc2749d72bf0
-Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
-Signed-off-by: Felix Singer <felixsinger@posteo.net>
----
- src/mainboard/lenovo/x230/Kconfig             |  15 ++++++++-----
- src/mainboard/lenovo/x230/Kconfig.name        |   3 +++
- src/mainboard/lenovo/x230/Makefile.mk         |   5 +++++
- .../lenovo/x230/variants/x230_edp/data.vbt    | Bin 0 -> 4281 bytes
- .../x230/variants/x230_edp/gma-mainboard.ads  |  21 ++++++++++++++++++
- 5 files changed, 38 insertions(+), 6 deletions(-)
- create mode 100644 src/mainboard/lenovo/x230/variants/x230_edp/data.vbt
- create mode 100644 src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads
-
-diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig
-index 279095629b..acfd0ed561 100644
---- a/src/mainboard/lenovo/x230/Kconfig
-+++ b/src/mainboard/lenovo/x230/Kconfig
-@@ -1,4 +1,4 @@
--if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230S
-+if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230S || BOARD_LENOVO_X230_EDP
- 
- config BOARD_SPECIFIC_OPTIONS
- 	def_bool y
-@@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS
- 	select H8_HAS_BAT_THRESHOLDS_IMPL
- 	select H8_HAS_PRIMARY_FN_KEYS if BOARD_LENOVO_X230S
- 	select NO_UART_ON_SUPERIO
--	select BOARD_ROMSIZE_KB_12288 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
-+	select BOARD_ROMSIZE_KB_12288 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230_EDP
- 	select BOARD_ROMSIZE_KB_16384 if BOARD_LENOVO_X230S
- 	select HAVE_ACPI_TABLES
- 	select HAVE_OPTION_TABLE
-@@ -20,7 +20,7 @@ config BOARD_SPECIFIC_OPTIONS
- 	select INTEL_INT15
- 	select DRIVERS_RICOH_RCE822
- 	select MEMORY_MAPPED_TPM
--	select MAINBOARD_HAS_TPM1 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
-+	select MAINBOARD_HAS_TPM1 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230_EDP
- 	select MAINBOARD_HAS_LIBGFXINIT
- 	select GFX_GMA_PANEL_1_ON_LVDS if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
- 	select INTEL_GMA_HAVE_VBT
-@@ -47,17 +47,20 @@ config MAINBOARD_DIR
- 	default "lenovo/x230"
- 
- config VARIANT_DIR
--	default "x230" if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
-+	default "x230" if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230_EDP
- 	default "x230s" if BOARD_LENOVO_X230S
- 
- config MAINBOARD_PART_NUMBER
--	default "ThinkPad X230" if BOARD_LENOVO_X230
-+	default "ThinkPad X230" if BOARD_LENOVO_X230 || BOARD_LENOVO_X230_EDP
- 	default "ThinkPad X230t" if BOARD_LENOVO_X230T
- 	default "ThinkPad X230s" if BOARD_LENOVO_X230S
- 
- config OVERRIDE_DEVICETREE
- 	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
- 
-+config INTEL_GMA_VBT_FILE
-+	default "variants/x230_edp/data.vbt" if BOARD_LENOVO_X230_EDP
-+
- config USBDEBUG_HCD_INDEX
- 	int
- 	default 2
-@@ -79,4 +82,4 @@ config PS2M_EISAID
- config THINKPADEC_HKEY_EISAID
- 	default "LEN0068"
- 
--endif # BOARD_LENOVO_X230 || BOARD_LENOVO_X230T ||  BOARD_LENOVO_X230S
-+endif # BOARD_LENOVO_X230 || BOARD_LENOVO_X230T ||  BOARD_LENOVO_X230S || BOARD_LENOVO_X230_EDP
-diff --git a/src/mainboard/lenovo/x230/Kconfig.name b/src/mainboard/lenovo/x230/Kconfig.name
-index 1a01436879..e7290a12dd 100644
---- a/src/mainboard/lenovo/x230/Kconfig.name
-+++ b/src/mainboard/lenovo/x230/Kconfig.name
-@@ -6,3 +6,6 @@ config BOARD_LENOVO_X230T
- 
- config BOARD_LENOVO_X230S
- 	bool "ThinkPad X230s"
-+
-+config BOARD_LENOVO_X230_EDP
-+	bool "ThinkPad X230 eDP Mod (2K/FHD)"
-diff --git a/src/mainboard/lenovo/x230/Makefile.mk b/src/mainboard/lenovo/x230/Makefile.mk
-index 8e801f145d..6e6f9f90b9 100644
---- a/src/mainboard/lenovo/x230/Makefile.mk
-+++ b/src/mainboard/lenovo/x230/Makefile.mk
-@@ -5,4 +5,9 @@ bootblock-y += variants/$(VARIANT_DIR)/gpio.c
- romstage-y += variants/$(VARIANT_DIR)/early_init.c
- romstage-y += variants/$(VARIANT_DIR)/gpio.c
- ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
-+
-+ifeq ($(CONFIG_BOARD_LENOVO_X230_EDP),y)
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/x230_edp/gma-mainboard.ads
-+else
- ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
-+endif
-diff --git a/src/mainboard/lenovo/x230/variants/x230_edp/data.vbt b/src/mainboard/lenovo/x230/variants/x230_edp/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..13384d45571ff76e592335143d01315e37893186
-GIT binary patch
-literal 4281
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-z2d_)6&979w%w$-vyatVrqw??t&t%}iZhDAP3%j_I#cGANdzLq>W;J(F=Xwkxxj%^H
-zwQDmn=w}|@-y`RG{*wz0>A(ZGtk~AM=#-fE(LV1uZE98+Nk>UmiyyuJ8?##<Mr{1g
-p(B@uj-Va_SU#<T#GXLCvin_ms#}9BYOE7UKDyX7coWuJX{tbC=%boxL
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads b/src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads
-new file mode 100644
-index 0000000000..f7cf0bc264
---- /dev/null
-+++ b/src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads
-@@ -0,0 +1,21 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+   ports : constant Port_List :=
-+     (DP1,
-+      DP2,
-+      DP3,
-+      HDMI1,
-+      HDMI2,
-+      HDMI3,
-+      Analog,
-+      others => Disabled);
-+
-+end GMA.Mainboard;
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0014-lenovo-x230-fix-the-data.vbt-path-for-the-EDP-varian.patch b/config/coreboot/default/patches/0014-lenovo-x230-fix-the-data.vbt-path-for-the-EDP-varian.patch
deleted file mode 100644
index f439f2e7..00000000
--- a/config/coreboot/default/patches/0014-lenovo-x230-fix-the-data.vbt-path-for-the-EDP-varian.patch
+++ /dev/null
@@ -1,25 +0,0 @@
-From 9959fe252cceca7005b63e3313f7f95114f1f93c Mon Sep 17 00:00:00 2001
-From: Alexei Sorokin <sor.alexei@meowr.ru>
-Date: Sun, 27 Nov 2022 18:36:26 +0300
-Subject: [PATCH 14/30] lenovo/x230: fix the data.vbt path for the EDP variant
-
----
- src/mainboard/lenovo/x230/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig
-index acfd0ed561..34108c3c04 100644
---- a/src/mainboard/lenovo/x230/Kconfig
-+++ b/src/mainboard/lenovo/x230/Kconfig
-@@ -59,7 +59,7 @@ config OVERRIDE_DEVICETREE
- 	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
- 
- config INTEL_GMA_VBT_FILE
--	default "variants/x230_edp/data.vbt" if BOARD_LENOVO_X230_EDP
-+       default "src/mainboard/\$(MAINBOARDDIR)/variants/x230_edp/data.vbt" if BOARD_LENOVO_X230_EDP
- 
- config USBDEBUG_HCD_INDEX
- 	int
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0029-x220_edp-modification-introduced-similar-to-x230_edp.patch b/config/coreboot/default/patches/0029-x220_edp-modification-introduced-similar-to-x230_edp.patch
deleted file mode 100644
index e0d39892..00000000
--- a/config/coreboot/default/patches/0029-x220_edp-modification-introduced-similar-to-x230_edp.patch
+++ /dev/null
@@ -1,164 +0,0 @@
-From f07ed32c36978327709a113967ec40e5ba8d828e Mon Sep 17 00:00:00 2001
-From: risapav <risapav@gmail.com>
-Date: Sun, 17 Dec 2023 16:54:07 +0100
-Subject: [PATCH 29/30] x220_edp modification introduced, similar to x230_edp
-
----
- src/mainboard/lenovo/x220/Kconfig             |  13 ++++++-----
- src/mainboard/lenovo/x220/Kconfig.name        |   3 +++
- src/mainboard/lenovo/x220/Makefile.mk         |   6 +++++
- .../lenovo/x220/variants/x220_edp/data.vbt    | Bin 0 -> 4281 bytes
- .../x220/variants/x220_edp/gma-mainboard.ads  |  21 ++++++++++++++++++
- 5 files changed, 38 insertions(+), 5 deletions(-)
- create mode 100644 src/mainboard/lenovo/x220/variants/x220_edp/data.vbt
- create mode 100644 src/mainboard/lenovo/x220/variants/x220_edp/gma-mainboard.ads
-
-diff --git a/src/mainboard/lenovo/x220/Kconfig b/src/mainboard/lenovo/x220/Kconfig
-index eeb55b4393..bc73a47df9 100644
---- a/src/mainboard/lenovo/x220/Kconfig
-+++ b/src/mainboard/lenovo/x220/Kconfig
-@@ -1,4 +1,4 @@
--if BOARD_LENOVO_X220 || BOARD_LENOVO_X220I || BOARD_LENOVO_X1
-+if BOARD_LENOVO_X220 || BOARD_LENOVO_X220I || BOARD_LENOVO_X1 || BOARD_LENOVO_X220_EDP
- 
- config BOARD_SPECIFIC_OPTIONS
- 	def_bool y
-@@ -6,7 +6,7 @@ config BOARD_SPECIFIC_OPTIONS
- 	select DRIVERS_RICOH_RCE822
- 	select EC_LENOVO_H8
- 	select EC_LENOVO_PMH7
--	select GFX_GMA_PANEL_1_ON_LVDS
-+	select GFX_GMA_PANEL_1_ON_LVDS if BOARD_LENOVO_X220 || BOARD_LENOVO_X220I || BOARD_LENOVO_X1 
- 	select H8_HAS_BAT_THRESHOLDS_IMPL
- 	select HAVE_ACPI_RESUME
- 	select HAVE_ACPI_TABLES
-@@ -41,19 +41,22 @@ config MAINBOARD_DIR
- 	default "lenovo/x220"
- 
- config VARIANT_DIR
--	default "x220" if BOARD_LENOVO_X220 || BOARD_LENOVO_X220I
-+	default "x220" if BOARD_LENOVO_X220 || BOARD_LENOVO_X220I || BOARD_LENOVO_X220_EDP
- 	default "x1" if BOARD_LENOVO_X1
- 
- config FMDFILE
- 	default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/vboot-rwa.fmd" if VBOOT
- 
- config MAINBOARD_PART_NUMBER
--	default "ThinkPad X220" if BOARD_LENOVO_X220
-+	default "ThinkPad X220" if BOARD_LENOVO_X220 || BOARD_LENOVO_X220_EDP
- 	default "ThinkPad X220i" if BOARD_LENOVO_X220I
- 	default "ThinkPad X1" if BOARD_LENOVO_X1
- 
- config OVERRIDE_DEVICETREE
- 	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
-+	
-+config INTEL_GMA_VBT_FILE
-+       default "src/mainboard/\$(MAINBOARDDIR)/variants/x220_edp/data.vbt" if BOARD_LENOVO_X220_EDP	
- 
- config USBDEBUG_HCD_INDEX
- 	int
-@@ -75,4 +78,4 @@ config PS2K_EISAID
- config PS2M_EISAID
- 	default "LEN0020"
- 
--endif # BOARD_LENOVO_X220 || BOARD_LENOVO_X220I || BOARD_LENOVO_X1
-+endif # BOARD_LENOVO_X220 || BOARD_LENOVO_X220I || BOARD_LENOVO_X1 || BOARD_LENOVO_X220_EDP
-diff --git a/src/mainboard/lenovo/x220/Kconfig.name b/src/mainboard/lenovo/x220/Kconfig.name
-index 988ac4fb55..cd501954e0 100644
---- a/src/mainboard/lenovo/x220/Kconfig.name
-+++ b/src/mainboard/lenovo/x220/Kconfig.name
-@@ -6,3 +6,6 @@ config BOARD_LENOVO_X220I
- 
- config BOARD_LENOVO_X1
- 	bool "ThinkPad X1"
-+	
-+config BOARD_LENOVO_X220_EDP
-+	bool "ThinkPad X220 eDP Mod (2K/FHD)"
-diff --git a/src/mainboard/lenovo/x220/Makefile.mk b/src/mainboard/lenovo/x220/Makefile.mk
-index b104bb52a9..052bf17a22 100644
---- a/src/mainboard/lenovo/x220/Makefile.mk
-+++ b/src/mainboard/lenovo/x220/Makefile.mk
-@@ -4,6 +4,12 @@ bootblock-y += variants/$(VARIANT_DIR)/gpio.c
- romstage-y += variants/$(VARIANT_DIR)/gpio.c
- romstage-y += variants/$(VARIANT_DIR)/romstage.c
- 
-+
-+ifeq ($(CONFIG_BOARD_LENOVO_X220_EDP),y)
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/x220_edp/gma-mainboard.ads
-+else
- ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-+endif
-+
- bootblock-y += early_init.c
- romstage-y += early_init.c
-diff --git a/src/mainboard/lenovo/x220/variants/x220_edp/data.vbt b/src/mainboard/lenovo/x220/variants/x220_edp/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..13384d45571ff76e592335143d01315e37893186
-GIT binary patch
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-z0smI&%EQn#cd@w$RZTVP=TtP?l7~|?nRTSIQO2qkgO+Z!=3#T$D-XeMvn68}T3Ey8
-zHleye(7mkLXe*JtfA{Q*lj!gc)Wck4IFj|C#q&~HiNmA&>Z|kF4(U<Y;5eIloj)C%
-zP4#WvIv2Sie|71?P3)md%>vj%v~DWNT8*x>a2}rST)i~8vd61DwO!2$JZMNNi6hyH
-z2d_)6&979w%w$-vyatVrqw??t&t%}iZhDAP3%j_I#cGANdzLq>W;J(F=Xwkxxj%^H
-zwQDmn=w}|@-y`RG{*wz0>A(ZGtk~AM=#-fE(LV1uZE98+Nk>UmiyyuJ8?##<Mr{1g
-p(B@uj-Va_SU#<T#GXLCvin_ms#}9BYOE7UKDyX7coWuJX{tbC=%boxL
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/lenovo/x220/variants/x220_edp/gma-mainboard.ads b/src/mainboard/lenovo/x220/variants/x220_edp/gma-mainboard.ads
-new file mode 100644
-index 0000000000..f7cf0bc264
---- /dev/null
-+++ b/src/mainboard/lenovo/x220/variants/x220_edp/gma-mainboard.ads
-@@ -0,0 +1,21 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+   ports : constant Port_List :=
-+     (DP1,
-+      DP2,
-+      DP3,
-+      HDMI1,
-+      HDMI2,
-+      HDMI3,
-+      Analog,
-+      others => Disabled);
-+
-+end GMA.Mainboard;
--- 
-2.39.2
-
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
index d0b3833f..3215ca68 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
@@ -195,11 +195,9 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_txtmode b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
index 06ae932d..4b6b5e6f 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
index dfe2b496..cd0beb97 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
@@ -195,11 +195,9 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_txtmode b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
index 6ec26a81..37c7462d 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
index c18a4e8c..665468d9 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
@@ -195,11 +195,9 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_txtmode b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
index ac0b262b..5b6f8870 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
index aa31b675..1b500abb 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
@@ -194,11 +194,9 @@ CONFIG_BOARD_LENOVO_R500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_txtmode b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
index fa51741a..5ec9de19 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
@@ -192,11 +192,9 @@ CONFIG_BOARD_LENOVO_R500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
index 25668253..4c3fe7d9 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
@@ -195,11 +195,9 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_txtmode b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
index 921bda4c..e5ef8b70 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
index 29cb073c..598ee337 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
@@ -195,11 +195,9 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_txtmode b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
index 551265f7..30f21fc1 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
index b1a2f829..5e198ab7 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
@@ -195,11 +195,9 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_txtmode b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
index 52a322dd..1aa474d7 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
index 8cbabbf6..2a5b9aca 100644
--- a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
@@ -196,11 +196,9 @@ CONFIG_BOARD_LENOVO_T420=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
index 9ada1ffe..bfe34d36 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
@@ -196,11 +196,9 @@ CONFIG_BOARD_LENOVO_T420S=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
index ba2f64a0..b1cfe169 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
@@ -194,11 +194,9 @@ CONFIG_BOARD_LENOVO_T420S=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
index af6b1569..a293e1dd 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
@@ -195,11 +195,9 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_txtmode b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
index 1277a19b..bbd70386 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
diff --git a/config/coreboot/t440pbmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440pbmrc_12mb/config/libgfxinit_corebootfb
index 5026c68e..0074fb6c 100644
--- a/config/coreboot/t440pbmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440pbmrc_12mb/config/libgfxinit_corebootfb
@@ -191,11 +191,9 @@ CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
 CONFIG_VBOOT_SLOTS_RW_AB=y
diff --git a/config/coreboot/t440pbmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440pbmrc_12mb/config/libgfxinit_txtmode
index a6b1bf70..0c7e6141 100644
--- a/config/coreboot/t440pbmrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440pbmrc_12mb/config/libgfxinit_txtmode
@@ -189,11 +189,9 @@ CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
 CONFIG_VBOOT_SLOTS_RW_AB=y
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
index d7124b0f..6bf1dca1 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
@@ -191,11 +191,9 @@ CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
 CONFIG_VBOOT_SLOTS_RW_AB=y
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
index fc7db117..861a5d5e 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
@@ -189,11 +189,9 @@ CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
 CONFIG_VBOOT_SLOTS_RW_AB=y
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
index 98052d20..4b1d2147 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
@@ -195,11 +195,9 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_txtmode b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
index b545fe6f..243d6bf0 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
index 3a0a094b..7704b0e0 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
@@ -195,11 +195,9 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_txtmode b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
index e6b4b8d7..5b5b323c 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
index d7e09d36..dcac539e 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
@@ -195,11 +195,9 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_txtmode b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
index 387e103e..081b6a0a 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
index 886a7ee6..bc3ef394 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
@@ -196,11 +196,9 @@ CONFIG_BOARD_LENOVO_T520=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_txtmode b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
index df7b0b68..8c8a6145 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
@@ -194,11 +194,9 @@ CONFIG_BOARD_LENOVO_T520=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
index 6b3e4eee..0d3a372a 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
@@ -195,11 +195,9 @@ CONFIG_BOARD_LENOVO_T530=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_txtmode b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
index 14b0bc33..fc8c903f 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_T530=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
index f7e6b528..cc011456 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
@@ -195,11 +195,9 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_txtmode b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
index c9d9ca70..d63b87ea 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
index 4aab04bf..7b1a2903 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
@@ -195,11 +195,9 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_txtmode b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
index 2cbbd0f4..53e1a547 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
index b23b693b..1e44e5c2 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
@@ -195,11 +195,9 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_txtmode b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
index 5214b715..d7066e43 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
index 1d42dd5d..16127d90 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
@@ -195,11 +195,9 @@ CONFIG_BOARD_LENOVO_W530=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_txtmode b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
index 632d8dfc..13cfb5d9 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_W530=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
diff --git a/config/coreboot/w541bmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541bmrc_12mb/config/libgfxinit_corebootfb
index a5342fbb..05de6472 100644
--- a/config/coreboot/w541bmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541bmrc_12mb/config/libgfxinit_corebootfb
@@ -191,11 +191,9 @@ CONFIG_BOARD_LENOVO_THINKPAD_W541=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
 CONFIG_VBOOT_SLOTS_RW_AB=y
diff --git a/config/coreboot/w541bmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/w541bmrc_12mb/config/libgfxinit_txtmode
index 60686a0f..88f676c2 100644
--- a/config/coreboot/w541bmrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541bmrc_12mb/config/libgfxinit_txtmode
@@ -189,11 +189,9 @@ CONFIG_BOARD_LENOVO_THINKPAD_W541=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
 CONFIG_VBOOT_SLOTS_RW_AB=y
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
index 3f0cf31a..119ad89f 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
@@ -191,11 +191,9 @@ CONFIG_BOARD_LENOVO_THINKPAD_W541=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
 CONFIG_VBOOT_SLOTS_RW_AB=y
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
index e0d0c538..f04da340 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
@@ -189,11 +189,9 @@ CONFIG_BOARD_LENOVO_THINKPAD_W541=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
 CONFIG_VBOOT_SLOTS_RW_AB=y
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
index 8dc3aca4..6dcc4bca 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_txtmode b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
index 49d18531..a7c23af7 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
@@ -191,11 +191,9 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
index f8a6f3fd..b522fff3 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_txtmode b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
index fd808241..e7d4a538 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
@@ -191,11 +191,9 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
index 7640b94c..12e8cb6e 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_txtmode b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
index 394ba67d..ca608667 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
@@ -191,11 +191,9 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
index c7eb54fc..3aaac0c4 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
@@ -197,11 +197,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_BOARD_LENOVO_X220=y
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_txtmode b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
index 7d29db4c..0e679481 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
@@ -195,11 +195,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_BOARD_LENOVO_X220=y
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/x220edp_8mb/config/libgfxinit_corebootfb b/config/coreboot/x220edp_8mb/config/libgfxinit_corebootfb
deleted file mode 100644
index b9567e49..00000000
--- a/config/coreboot/x220edp_8mb/config/libgfxinit_corebootfb
+++ /dev/null
@@ -1,674 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_FAMILY="ThinkPad X220"
-CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X220"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/x220"
-CONFIG_VGA_BIOS_ID="8086,0126"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0x7E0000
-CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
-CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_VARIANT_DIR="x220"
-CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_DRAM_RESET_GATE_GPIO=10
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/x220_edp/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_VBOOT_SLOTS_RW_A=y
-CONFIG_DCACHE_RAM_BASE=0xfefe0000
-CONFIG_DCACHE_RAM_SIZE=0x20000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
-CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X220"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-CONFIG_BOARD_LENOVO_X220_EDP=y
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_8192=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_8192=y
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=8192
-CONFIG_ROM_SIZE=0x00800000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_MODEL_206AX=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_MICROCODE_UPDATE_PRE_RAM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_USE_NATIVE_RAMINIT=y
-CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
-# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
-# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
-# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
-# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
-CONFIG_RAMINIT_ENABLE_ECC=y
-
-#
-# Southbridge
-#
-CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
-CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_HIDE_MEI_ON_ERROR=y
-CONFIG_PCIEXP_HOTPLUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-# CONFIG_H8_BEEP_ON_DEATH is not set
-# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-CONFIG_LINEAR_FRAMEBUFFER=y
-# CONFIG_BOOTSPLASH is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_NO_UART_ON_SUPERIO=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Ironlake"
-CONFIG_GFX_GMA_PCH="Cougar_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_DRIVERS_RICOH_RCE822=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_RAM_SETUP=y
-# CONFIG_DEBUG_RAM_SETUP is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/x220edp_8mb/config/libgfxinit_txtmode b/config/coreboot/x220edp_8mb/config/libgfxinit_txtmode
deleted file mode 100644
index b373ffa3..00000000
--- a/config/coreboot/x220edp_8mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,671 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_FAMILY="ThinkPad X220"
-CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X220"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/x220"
-CONFIG_VGA_BIOS_ID="8086,0126"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0x7E0000
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_VARIANT_DIR="x220"
-CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_DRAM_RESET_GATE_GPIO=10
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/x220_edp/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_VBOOT_SLOTS_RW_A=y
-CONFIG_DCACHE_RAM_BASE=0xfefe0000
-CONFIG_DCACHE_RAM_SIZE=0x20000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
-CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X220"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-CONFIG_BOARD_LENOVO_X220=y
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
-# CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_8192=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_8192=y
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=8192
-CONFIG_ROM_SIZE=0x00800000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_MODEL_206AX=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_MICROCODE_UPDATE_PRE_RAM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_USE_NATIVE_RAMINIT=y
-CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
-# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
-# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
-# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
-# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
-CONFIG_RAMINIT_ENABLE_ECC=y
-
-#
-# Southbridge
-#
-CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
-CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_HIDE_MEI_ON_ERROR=y
-CONFIG_PCIEXP_HOTPLUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-# CONFIG_H8_BEEP_ON_DEATH is not set
-# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_NO_UART_ON_SUPERIO=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Ironlake"
-CONFIG_GFX_GMA_PCH="Cougar_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_VGA=y
-CONFIG_DRIVERS_RICOH_RCE822=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_RAM_SETUP=y
-# CONFIG_DEBUG_RAM_SETUP is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/x220edp_8mb/target.cfg b/config/coreboot/x220edp_8mb/target.cfg
deleted file mode 100644
index cd477e6f..00000000
--- a/config/coreboot/x220edp_8mb/target.cfg
+++ /dev/null
@@ -1,9 +0,0 @@
-tree="default"
-xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
-payload_seabios="y"
-payload_memtest="y"
-grub_scan_disk="ahci"
-status="broken" # TODO: VCC3P patch
-release="n"
diff --git a/config/coreboot/x220edp_8mb/warn.txt b/config/coreboot/x220edp_8mb/warn.txt
deleted file mode 100644
index a153edeb..00000000
--- a/config/coreboot/x220edp_8mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-TODO: VCC3P patch
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
index b5957386..72e1d756 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
@@ -196,11 +196,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_txtmode b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
index ce252c9a..d8fa1e98 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
@@ -194,11 +194,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
index 062652de..2de1cb4a 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
@@ -196,11 +196,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_txtmode b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
index c538774f..daaae9f4 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
@@ -194,11 +194,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
diff --git a/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
deleted file mode 100644
index bc1883de..00000000
--- a/config/coreboot/x230edp_12mb/config/libgfxinit_corebootfb
+++ /dev/null
@@ -1,673 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_FAMILY="ThinkPad X230"
-CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/x230"
-CONFIG_VGA_BIOS_ID="8086,0166"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0xBE0000
-CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
-CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_VARIANT_DIR="x230"
-CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_DRAM_RESET_GATE_GPIO=10
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/x230_edp/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xfefe0000
-CONFIG_DCACHE_RAM_SIZE=0x20000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
-CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-CONFIG_BOARD_LENOVO_X230_EDP=y
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_MODEL_206AX=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_MICROCODE_UPDATE_PRE_RAM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_USE_NATIVE_RAMINIT=y
-CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
-# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
-# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
-# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
-# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
-CONFIG_RAMINIT_ENABLE_ECC=y
-
-#
-# Southbridge
-#
-CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
-CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_HIDE_MEI_ON_ERROR=y
-CONFIG_PCIEXP_HOTPLUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-# CONFIG_H8_BEEP_ON_DEATH is not set
-# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-CONFIG_LINEAR_FRAMEBUFFER=y
-# CONFIG_BOOTSPLASH is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_NO_UART_ON_SUPERIO=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Ironlake"
-CONFIG_GFX_GMA_PCH="Cougar_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_DRIVERS_RICOH_RCE822=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_RAM_SETUP=y
-# CONFIG_DEBUG_RAM_SETUP is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode b/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
deleted file mode 100644
index 899d3e6b..00000000
--- a/config/coreboot/x230edp_12mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,670 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_FAMILY="ThinkPad X230"
-CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/x230"
-CONFIG_VGA_BIOS_ID="8086,0166"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0xBE0000
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_VARIANT_DIR="x230"
-CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_DRAM_RESET_GATE_GPIO=10
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/x230_edp/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xfefe0000
-CONFIG_DCACHE_RAM_SIZE=0x20000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
-CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_PCIEXP_HOTPLUG_BUSES=8
-CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-CONFIG_BOARD_LENOVO_X230_EDP=y
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
-CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_EHCI_BAR=0xfef00000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_MODEL_206AX=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_MICROCODE_UPDATE_PRE_RAM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_USE_NATIVE_RAMINIT=y
-CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
-# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
-# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
-# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
-# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
-CONFIG_RAMINIT_ENABLE_ECC=y
-
-#
-# Southbridge
-#
-CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
-CONFIG_SOUTHBRIDGE_INTEL_C216=y
-CONFIG_HIDE_MEI_ON_ERROR=y
-CONFIG_PCIEXP_HOTPLUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-# CONFIG_H8_BEEP_ON_DEATH is not set
-# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
-# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
-CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_NO_UART_ON_SUPERIO=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Ironlake"
-CONFIG_GFX_GMA_PCH="Cougar_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_VGA=y
-CONFIG_DRIVERS_RICOH_RCE822=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_RAM_SETUP=y
-# CONFIG_DEBUG_RAM_SETUP is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/x230edp_12mb/target.cfg b/config/coreboot/x230edp_12mb/target.cfg
deleted file mode 100644
index cd477e6f..00000000
--- a/config/coreboot/x230edp_12mb/target.cfg
+++ /dev/null
@@ -1,9 +0,0 @@
-tree="default"
-xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
-payload_seabios="y"
-payload_memtest="y"
-grub_scan_disk="ahci"
-status="broken" # TODO: VCC3P patch
-release="n"
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
index 80ed9c78..ca11d165 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
@@ -196,11 +196,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
index 1d90b98c..bad2ecd6 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
@@ -194,11 +194,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
index e9d559ed..c98c70d5 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
@@ -196,11 +196,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
index 3033d446..c0d848d0 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
@@ -194,11 +194,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
index d5ec9e74..61fedae8 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_txtmode b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
index 4fbdc435..d5c24416 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
@@ -191,11 +191,9 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
index 94403e77..02a910d7 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_txtmode b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
index b1867a46..f6652cfc 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
@@ -191,11 +191,9 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
index b1f49efd..d800eed3 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
@@ -193,11 +193,9 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_txtmode b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
index 31bad0d1..ef88107c 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
@@ -191,11 +191,9 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X220 is not set
 # CONFIG_BOARD_LENOVO_X220I is not set
 # CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X220_EDP is not set
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
diff --git a/config/vendor/sources b/config/vendor/sources
index 2653c877..516077c5 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -9,13 +9,13 @@
 # where previously we used 160-bit SHA-1 algorithm; SHA-1 is not secure,
 # having demonstrated collisions, so we have switched to using sha512sum
 
-{x230 x230t x230i x230edp t430 t530 w530}{
+{x230 x230t x230i t430 t530 w530}{
 	DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
 	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
 	DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
 }
 
-{x220 x220t x220edp t420 t520 t420s}{
+{x220 x220t t420 t520 t420s}{
 	DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
 	DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
 	DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe

From 67ddd3f2f675bc1f15e737e0d694fb245dde7715 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 3 May 2024 16:35:00 -0600
Subject: [PATCH 0310/1549] coreboot/default: Add patches to fix S3 on SNB/IVB
 Latitudes

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 ...l-mec5035-Add-S3-suspend-SMI-handler.patch | 117 +++++++++++++++
 ...S3-SMI-handler-for-SNB-IVB-Latitudes.patch | 133 ++++++++++++++++++
 2 files changed, 250 insertions(+)
 create mode 100644 config/coreboot/default/patches/0045-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
 create mode 100644 config/coreboot/default/patches/0046-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch

diff --git a/config/coreboot/default/patches/0045-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch b/config/coreboot/default/patches/0045-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
new file mode 100644
index 00000000..97f14314
--- /dev/null
+++ b/config/coreboot/default/patches/0045-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
@@ -0,0 +1,117 @@
+From a8c4f7004ea1c9b8268a87dd0b700c250ec4747d Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 3 May 2024 11:03:32 -0600
+Subject: [PATCH] ec/dell/mec5035: Add S3 suspend SMI handler
+
+Change-Id: I655868aba46911d128f6c24f410dc6fdf83f3070
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/ec/dell/mec5035/Makefile.mk  |  1 +
+ src/ec/dell/mec5035/mec5035.c    | 14 ++++++++++++++
+ src/ec/dell/mec5035/mec5035.h    | 19 +++++++++++++++++++
+ src/ec/dell/mec5035/smihandler.c | 17 +++++++++++++++++
+ 4 files changed, 51 insertions(+)
+ create mode 100644 src/ec/dell/mec5035/smihandler.c
+
+diff --git a/src/ec/dell/mec5035/Makefile.mk b/src/ec/dell/mec5035/Makefile.mk
+index 4ebdd811f9..be557e4599 100644
+--- a/src/ec/dell/mec5035/Makefile.mk
++++ b/src/ec/dell/mec5035/Makefile.mk
+@@ -5,5 +5,6 @@ ifeq ($(CONFIG_EC_DELL_MEC5035),y)
+ bootblock-y += mec5035.c
+ romstage-y += mec5035.c
+ ramstage-y += mec5035.c
++smm-y += mec5035.c smihandler.c
+ 
+ endif
+diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
+index 68b6b2f7fb..33bf046634 100644
+--- a/src/ec/dell/mec5035/mec5035.c
++++ b/src/ec/dell/mec5035/mec5035.c
+@@ -94,6 +94,20 @@ void mec5035_control_radio(enum ec_radio_dev dev, enum ec_radio_state state)
+ 	ec_command(CMD_RADIO_CTRL);
+ }
+ 
++void mec5035_sleep_enable(void)
++{
++	u8 buf[SLEEP_EN_NUM_ARGS] = {3, 0};
++	write_mailbox_regs(buf, 2, SLEEP_EN_NUM_ARGS);
++	ec_command(CMD_SLEEP_ENABLE);
++}
++
++void mec5035_change_wake(u8 source, enum ec_wake_change change)
++{
++	u8 buf[ACPI_WAKEUP_NUM_ARGS] = {change, source, 0, 0x40};
++	write_mailbox_regs(buf, 2, ACPI_WAKEUP_NUM_ARGS);
++	ec_command(CMD_ACPI_WAKEUP_CHANGE);
++}
++
+ void mec5035_early_init(void)
+ {
+ 	/* If this isn't sent the EC shuts down the system after about 15
+diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
+index fa15a9d621..069616fbc5 100644
+--- a/src/ec/dell/mec5035/mec5035.h
++++ b/src/ec/dell/mec5035/mec5035.h
+@@ -4,6 +4,7 @@
+ #define _EC_DELL_MEC5035_H_
+ 
+ #include <stdint.h>
++#include <types.h>
+ 
+ #define NUM_REGISTERS	32
+ 
+@@ -29,9 +30,27 @@ enum ec_radio_state {
+ 	RADIO_ON
+ };
+ 
++#define CMD_ACPI_WAKEUP_CHANGE 0x4a
++#define ACPI_WAKEUP_NUM_ARGS 4
++enum ec_wake_change {
++	WAKE_OFF = 0,
++	WAKE_ON
++};
++enum ec_acpi_wake_events {
++	EC_ACPI_WAKE_PWRB = BIT(0),     /* Wake up by power button */
++	EC_ACPI_WAKE_LID = BIT(1),      /* Wake up by lid switch */
++	EC_ACPI_WAKE_RTC = BIT(5),      /* Wake up by RTC */
++};
++
++#define CMD_SLEEP_ENABLE 0x64
++#define SLEEP_EN_NUM_ARGS 2
++
+ u8 mec5035_mouse_touchpad(u8 setting);
+ void mec5035_cpu_ok(void);
+ void mec5035_early_init(void);
+ void mec5035_control_radio(enum ec_radio_dev device, enum ec_radio_state state);
++void mec5035_sleep(int slp_type);
++void mec5035_change_wake(u8 source, enum ec_wake_change change);
++void mec5035_sleep_enable(void);
+ 
+ #endif /* _EC_DELL_MEC5035_H_ */
+diff --git a/src/ec/dell/mec5035/smihandler.c b/src/ec/dell/mec5035/smihandler.c
+new file mode 100644
+index 0000000000..1db834773d
+--- /dev/null
++++ b/src/ec/dell/mec5035/smihandler.c
+@@ -0,0 +1,17 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi.h>
++#include <console/console.h>
++#include <ec/acpi/ec.h>
++#include "mec5035.h"
++
++void mec5035_sleep(int slp_type)
++{
++	switch (slp_type) {
++	case ACPI_S3:
++		/* System does not yet resume properly if woken by lid */
++		mec5035_change_wake(EC_ACPI_WAKE_LID, WAKE_OFF);
++		mec5035_sleep_enable();
++		break;
++	}
++}
+-- 
+2.44.0
+
diff --git a/config/coreboot/default/patches/0046-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch b/config/coreboot/default/patches/0046-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch
new file mode 100644
index 00000000..34d92278
--- /dev/null
+++ b/config/coreboot/default/patches/0046-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch
@@ -0,0 +1,133 @@
+From 9ff35368733c5e5a852ebd6295f262710553913b Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 3 May 2024 16:31:12 -0600
+Subject: [PATCH] mb/dell/: Add S3 SMI handler for SNB/IVB Latitudes
+
+This should fix S3 suspend on these systems
+
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e5420/smihandler.c | 9 +++++++++
+ src/mainboard/dell/e5520/smihandler.c | 9 +++++++++
+ src/mainboard/dell/e5530/smihandler.c | 9 +++++++++
+ src/mainboard/dell/e6420/smihandler.c | 9 +++++++++
+ src/mainboard/dell/e6430/smihandler.c | 9 +++++++++
+ src/mainboard/dell/e6520/smihandler.c | 9 +++++++++
+ src/mainboard/dell/e6530/smihandler.c | 9 +++++++++
+ 7 files changed, 63 insertions(+)
+ create mode 100644 src/mainboard/dell/e5420/smihandler.c
+ create mode 100644 src/mainboard/dell/e5520/smihandler.c
+ create mode 100644 src/mainboard/dell/e5530/smihandler.c
+ create mode 100644 src/mainboard/dell/e6420/smihandler.c
+ create mode 100644 src/mainboard/dell/e6430/smihandler.c
+ create mode 100644 src/mainboard/dell/e6520/smihandler.c
+ create mode 100644 src/mainboard/dell/e6530/smihandler.c
+
+diff --git a/src/mainboard/dell/e5420/smihandler.c b/src/mainboard/dell/e5420/smihandler.c
+new file mode 100644
+index 0000000000..334d7b1a5f
+--- /dev/null
++++ b/src/mainboard/dell/e5420/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++	mec5035_sleep(slp_typ);
++}
+diff --git a/src/mainboard/dell/e5520/smihandler.c b/src/mainboard/dell/e5520/smihandler.c
+new file mode 100644
+index 0000000000..334d7b1a5f
+--- /dev/null
++++ b/src/mainboard/dell/e5520/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++	mec5035_sleep(slp_typ);
++}
+diff --git a/src/mainboard/dell/e5530/smihandler.c b/src/mainboard/dell/e5530/smihandler.c
+new file mode 100644
+index 0000000000..334d7b1a5f
+--- /dev/null
++++ b/src/mainboard/dell/e5530/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++	mec5035_sleep(slp_typ);
++}
+diff --git a/src/mainboard/dell/e6420/smihandler.c b/src/mainboard/dell/e6420/smihandler.c
+new file mode 100644
+index 0000000000..334d7b1a5f
+--- /dev/null
++++ b/src/mainboard/dell/e6420/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++	mec5035_sleep(slp_typ);
++}
+diff --git a/src/mainboard/dell/e6430/smihandler.c b/src/mainboard/dell/e6430/smihandler.c
+new file mode 100644
+index 0000000000..334d7b1a5f
+--- /dev/null
++++ b/src/mainboard/dell/e6430/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++	mec5035_sleep(slp_typ);
++}
+diff --git a/src/mainboard/dell/e6520/smihandler.c b/src/mainboard/dell/e6520/smihandler.c
+new file mode 100644
+index 0000000000..334d7b1a5f
+--- /dev/null
++++ b/src/mainboard/dell/e6520/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++	mec5035_sleep(slp_typ);
++}
+diff --git a/src/mainboard/dell/e6530/smihandler.c b/src/mainboard/dell/e6530/smihandler.c
+new file mode 100644
+index 0000000000..334d7b1a5f
+--- /dev/null
++++ b/src/mainboard/dell/e6530/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++	mec5035_sleep(slp_typ);
++}
+-- 
+2.44.0
+

From a9bc6b254b319c69c16e339ec352ea7be10be626 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 May 2024 00:09:45 +0100
Subject: [PATCH 0311/1549] mark lenovo x301 as stable for release

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/x301_16mb/target.cfg | 3 +--
 config/coreboot/x301_4mb/target.cfg  | 3 +--
 config/coreboot/x301_8mb/target.cfg  | 3 +--
 3 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index 0867e005..f16a94a4 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -5,5 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
-release="n"
+status="stable"
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index 0867e005..f16a94a4 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -5,5 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
-release="n"
+status="stable"
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index 0867e005..f16a94a4 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -5,5 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="untested"
-release="n"
+status="stable"

From d839bfa1ed489dfc72e46341375322ecbfe5769a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 May 2024 00:14:41 +0100
Subject: [PATCH 0312/1549] mark 9020 sff/mt stable for release

i initially decided to say unstable, but the default
configuration is reliable; the only caveat is that if
you enable IOMMU, you must only be using intel graphics.

this is already documented in warn.txt files, and on
the website, so it's more than ok to call this stable.

i use one of these myself as my daily driver and it's
rock solid. i haven't had any problems with it. i also
sell these to people with libreboot. no problems.

mark it as stable, ready for a full release.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/dell9020mt-nri_12mb/target.cfg  | 2 +-
 config/coreboot/dell9020mt_12mb/target.cfg      | 2 +-
 config/coreboot/dell9020mtbmrc_12mb/target.cfg  | 2 +-
 config/coreboot/dell9020sff-nri_12mb/target.cfg | 2 +-
 config/coreboot/dell9020sff_12mb/target.cfg     | 2 +-
 config/coreboot/dell9020sffbmrc_12mb/target.cfg | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/config/coreboot/dell9020mt-nri_12mb/target.cfg b/config/coreboot/dell9020mt-nri_12mb/target.cfg
index bb76392a..bc4053d4 100644
--- a/config/coreboot/dell9020mt-nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt-nri_12mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/dell9020mt_12mb/target.cfg b/config/coreboot/dell9020mt_12mb/target.cfg
index ac0b1792..a3acd5fb 100644
--- a/config/coreboot/dell9020mt_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_12mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/dell9020mtbmrc_12mb/target.cfg b/config/coreboot/dell9020mtbmrc_12mb/target.cfg
index ac0b1792..a3acd5fb 100644
--- a/config/coreboot/dell9020mtbmrc_12mb/target.cfg
+++ b/config/coreboot/dell9020mtbmrc_12mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/dell9020sff-nri_12mb/target.cfg b/config/coreboot/dell9020sff-nri_12mb/target.cfg
index bb76392a..bc4053d4 100644
--- a/config/coreboot/dell9020sff-nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff-nri_12mb/target.cfg
@@ -5,4 +5,4 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/dell9020sff_12mb/target.cfg b/config/coreboot/dell9020sff_12mb/target.cfg
index ac0b1792..a3acd5fb 100644
--- a/config/coreboot/dell9020sff_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_12mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/dell9020sffbmrc_12mb/target.cfg b/config/coreboot/dell9020sffbmrc_12mb/target.cfg
index ac0b1792..a3acd5fb 100644
--- a/config/coreboot/dell9020sffbmrc_12mb/target.cfg
+++ b/config/coreboot/dell9020sffbmrc_12mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="unstable"
+status="stable"

From 985870297dd7aa89cb29b4c9b6e9ece82c4355c3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 May 2024 00:24:27 +0100
Subject: [PATCH 0313/1549] deprecate MRC 9020MT/SFF (NRI 9020 is default now)

NRI is libre raminit

MRC is binary blob raminit

the libre raminit is stable enough now that it's default

the MRC-based targets will be removed in a future release

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/dell9020mt_12mb/target.cfg      | 2 +-
 config/coreboot/dell9020mt_12mb/warn.txt        | 9 +++++++++
 config/coreboot/dell9020mtbmrc_12mb/target.cfg  | 2 +-
 config/coreboot/dell9020mtbmrc_12mb/warn.txt    | 9 +++++++++
 config/coreboot/dell9020sff_12mb/target.cfg     | 2 +-
 config/coreboot/dell9020sff_12mb/warn.txt       | 9 +++++++++
 config/coreboot/dell9020sffbmrc_12mb/target.cfg | 2 +-
 config/coreboot/dell9020sffbmrc_12mb/warn.txt   | 9 +++++++++
 8 files changed, 40 insertions(+), 4 deletions(-)

diff --git a/config/coreboot/dell9020mt_12mb/target.cfg b/config/coreboot/dell9020mt_12mb/target.cfg
index a3acd5fb..0141f142 100644
--- a/config/coreboot/dell9020mt_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_12mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="stable"
+status="deprecated"
diff --git a/config/coreboot/dell9020mt_12mb/warn.txt b/config/coreboot/dell9020mt_12mb/warn.txt
index fe1aa7f9..6c262da4 100644
--- a/config/coreboot/dell9020mt_12mb/warn.txt
+++ b/config/coreboot/dell9020mt_12mb/warn.txt
@@ -1 +1,10 @@
 Completely stable with graphics, but IOMMU disabled by default; graphics cards only work with IOMMU turned off. Intel graphics works fine with IOMMU turned on. IOMMU is needed for Qubes to work properly. To turn on IOMMU, do this to your ROM before flashing (ONLY do this if using Intel graphics): ./nvramtool -C libreboot.rom -w iommu=Enable
+
+*This* target uses Intel MRC (a binary blob) for memory controller initialisation.
+If you want *libre* initialisation (recommended), use the *nri* targets instead,
+e.g. dell9020sff-nri_12mb or dell9020mt-nri_12mb
+
+These MRC-based targets will be *removed* in a future Libreboot release. It is
+strongly recommended that you use the NRI-based targets (Native RAM initialisation).
+
+This version uses Haswell MRC, which is compatible with the machine.
diff --git a/config/coreboot/dell9020mtbmrc_12mb/target.cfg b/config/coreboot/dell9020mtbmrc_12mb/target.cfg
index a3acd5fb..0141f142 100644
--- a/config/coreboot/dell9020mtbmrc_12mb/target.cfg
+++ b/config/coreboot/dell9020mtbmrc_12mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="stable"
+status="deprecated"
diff --git a/config/coreboot/dell9020mtbmrc_12mb/warn.txt b/config/coreboot/dell9020mtbmrc_12mb/warn.txt
index fe1aa7f9..21be619a 100644
--- a/config/coreboot/dell9020mtbmrc_12mb/warn.txt
+++ b/config/coreboot/dell9020mtbmrc_12mb/warn.txt
@@ -1 +1,10 @@
 Completely stable with graphics, but IOMMU disabled by default; graphics cards only work with IOMMU turned off. Intel graphics works fine with IOMMU turned on. IOMMU is needed for Qubes to work properly. To turn on IOMMU, do this to your ROM before flashing (ONLY do this if using Intel graphics): ./nvramtool -C libreboot.rom -w iommu=Enable
+
+*This* target uses Intel MRC (a binary blob) for memory controller initialisation.
+If you want *libre* initialisation (recommended), use the *nri* targets instead,
+e.g. dell9020sff-nri_12mb or dell9020mt-nri_12mb
+
+These MRC-based targets will be *removed* in a future Libreboot release. It is
+strongly recommended that you use the NRI-based targets (Native RAM initialisation).
+
+This version uses Broadwell MRC, which is compatible on Haswell machines.
diff --git a/config/coreboot/dell9020sff_12mb/target.cfg b/config/coreboot/dell9020sff_12mb/target.cfg
index a3acd5fb..0141f142 100644
--- a/config/coreboot/dell9020sff_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_12mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="stable"
+status="deprecated"
diff --git a/config/coreboot/dell9020sff_12mb/warn.txt b/config/coreboot/dell9020sff_12mb/warn.txt
index fe1aa7f9..6c262da4 100644
--- a/config/coreboot/dell9020sff_12mb/warn.txt
+++ b/config/coreboot/dell9020sff_12mb/warn.txt
@@ -1 +1,10 @@
 Completely stable with graphics, but IOMMU disabled by default; graphics cards only work with IOMMU turned off. Intel graphics works fine with IOMMU turned on. IOMMU is needed for Qubes to work properly. To turn on IOMMU, do this to your ROM before flashing (ONLY do this if using Intel graphics): ./nvramtool -C libreboot.rom -w iommu=Enable
+
+*This* target uses Intel MRC (a binary blob) for memory controller initialisation.
+If you want *libre* initialisation (recommended), use the *nri* targets instead,
+e.g. dell9020sff-nri_12mb or dell9020mt-nri_12mb
+
+These MRC-based targets will be *removed* in a future Libreboot release. It is
+strongly recommended that you use the NRI-based targets (Native RAM initialisation).
+
+This version uses Haswell MRC, which is compatible with the machine.
diff --git a/config/coreboot/dell9020sffbmrc_12mb/target.cfg b/config/coreboot/dell9020sffbmrc_12mb/target.cfg
index a3acd5fb..0141f142 100644
--- a/config/coreboot/dell9020sffbmrc_12mb/target.cfg
+++ b/config/coreboot/dell9020sffbmrc_12mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="stable"
+status="deprecated"
diff --git a/config/coreboot/dell9020sffbmrc_12mb/warn.txt b/config/coreboot/dell9020sffbmrc_12mb/warn.txt
index fe1aa7f9..21be619a 100644
--- a/config/coreboot/dell9020sffbmrc_12mb/warn.txt
+++ b/config/coreboot/dell9020sffbmrc_12mb/warn.txt
@@ -1 +1,10 @@
 Completely stable with graphics, but IOMMU disabled by default; graphics cards only work with IOMMU turned off. Intel graphics works fine with IOMMU turned on. IOMMU is needed for Qubes to work properly. To turn on IOMMU, do this to your ROM before flashing (ONLY do this if using Intel graphics): ./nvramtool -C libreboot.rom -w iommu=Enable
+
+*This* target uses Intel MRC (a binary blob) for memory controller initialisation.
+If you want *libre* initialisation (recommended), use the *nri* targets instead,
+e.g. dell9020sff-nri_12mb or dell9020mt-nri_12mb
+
+These MRC-based targets will be *removed* in a future Libreboot release. It is
+strongly recommended that you use the NRI-based targets (Native RAM initialisation).
+
+This version uses Broadwell MRC, which is compatible on Haswell machines.

From d9c0346a003d6a149e8759bb224daa720b7254ea Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 May 2024 00:26:52 +0100
Subject: [PATCH 0314/1549] build/roms: more useful status warnings

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index 1ed64004..0b10e78a 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -157,12 +157,15 @@ configure_target()
 
 skip_board()
 {
-	[ "$listboards" != "y" ] && [ "$status" != "stable" ] && \
-		printf "WARNING: %s not stable (status=%s):\n\n" \
+	if [ "$listboards" != "y" ] && [ "$status" != "stable" ]; then
+		printf "\n\n\t!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n"
+		printf "\t__WARNING: %s has status '%s'__\n" \
 		    "$board" "$status"
+		printf "\t!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n\n"
+	fi
 
 	if [ -f "$targetdir/warn.txt" ] && [ "$listboards" != "y" ]; then
-		printf "Regarding board '%s' (status '%s'):\n" \
+		printf "Regarding target '%s' (status '%s'):\n\n" \
 		    "$board" "$status"
 		cat -u "$targetdir/warn.txt" || \
 		    $err "!cat $targetdir/warn.txt"
@@ -176,7 +179,7 @@ skip_board()
 	printf "\nTo disable this dialog when building, do:\n"
 	printf "export LBMK_STATUS=n\n\n"
 	while true; do
-		printf "Board %s has status '%s'. Skip? [y/n]" \
+		printf "Board %s has status '%s'. Skip? [y/n] " \
 		    "$board" "$status"
 		read -r skip
 		[ "$skip" = "y" ] && return 0

From 7e799e1f16d671b58eb0b1fdbe06069fc175608c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 May 2024 04:13:53 +0100
Subject: [PATCH 0315/1549] nb/haswell: lock policy regs when disabling IOMMU

Angel Pons told me I should do it. See comments here:
https://review.coreboot.org/c/coreboot/+/81016

I see no harm in complying with the request. I'll merge
this into the main patch at a later date and try to
get this upstreamed.

Just a reminder: on Optiplex 9020 variants, Xorg locks up
under Linux when tested with a graphics card; disabling
IOMMU works around the issue. Intel graphics work just fine
with IOMMU turned on. Libreboot disables IOMMU by default,
on the 9020, so that users can install graphics cards easily.

I'm pretty sure this is the correct way to do it. The machine
still seems to boot, in this configuration.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...ock-policy-regs-when-disabling-IOMMU.patch | 55 +++++++++++++++++++
 ...ock-policy-regs-when-disabling-IOMMU.patch | 55 +++++++++++++++++++
 2 files changed, 110 insertions(+)
 create mode 100644 config/coreboot/default/patches/0047-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
 create mode 100644 config/coreboot/haswell/patches/0027-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch

diff --git a/config/coreboot/default/patches/0047-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch b/config/coreboot/default/patches/0047-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
new file mode 100644
index 00000000..a7af707e
--- /dev/null
+++ b/config/coreboot/default/patches/0047-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
@@ -0,0 +1,55 @@
+From fa4f05e39744eb4c4606f940b8acc7fd053b11d4 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sat, 4 May 2024 02:00:53 +0100
+Subject: [PATCH 1/1] nb/haswell: lock policy regs when disabling IOMMU
+
+Angel Pons told me I should do it. See comments here:
+https://review.coreboot.org/c/coreboot/+/81016
+
+I see no harm in complying with the request. I'll merge
+this into the main patch at a later date and try to
+get this upstreamed.
+
+Just a reminder: on Optiplex 9020 variants, Xorg locks up
+under Linux when tested with a graphics card; disabling
+IOMMU works around the issue. Intel graphics work just fine
+with IOMMU turned on. Libreboot disables IOMMU by default,
+on the 9020, so that users can install graphics cards easily.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/northbridge/intel/haswell/early_init.c | 15 +++++++--------
+ 1 file changed, 7 insertions(+), 8 deletions(-)
+
+diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c
+index 1a7e0b1076..e9506ee830 100644
+--- a/src/northbridge/intel/haswell/early_init.c
++++ b/src/northbridge/intel/haswell/early_init.c
+@@ -160,17 +160,16 @@ static void haswell_setup_iommu(void)
+ 	const u32 capid0_a = pci_read_config32(HOST_BRIDGE, CAPID0_A);
+ 	u8 enable_iommu = get_uint_option("iommu", 1);
+ 
+-	if (!enable_iommu)
+-		return;
+-
+ 	if (capid0_a & VTD_DISABLE)
+ 		return;
+ 
+-	/* Setup BARs: zeroize top 32 bits; set enable bit */
+-	mchbar_write32(GFXVTBAR + 4, GFXVT_BASE_ADDRESS >> 32);
+-	mchbar_write32(GFXVTBAR + 0, GFXVT_BASE_ADDRESS | 1);
+-	mchbar_write32(VTVC0BAR + 4, VTVC0_BASE_ADDRESS >> 32);
+-	mchbar_write32(VTVC0BAR + 0, VTVC0_BASE_ADDRESS | 1);
++	if (enable_iommu) {
++		/* Setup BARs: zeroize top 32 bits; set enable bit */
++		mchbar_write32(GFXVTBAR + 4, GFXVT_BASE_ADDRESS >> 32);
++		mchbar_write32(GFXVTBAR + 0, GFXVT_BASE_ADDRESS | 1);
++		mchbar_write32(VTVC0BAR + 4, VTVC0_BASE_ADDRESS >> 32);
++		mchbar_write32(VTVC0BAR + 0, VTVC0_BASE_ADDRESS | 1);
++	}
+ 
+ 	/* Set L3HIT2PEND_DIS, lock GFXVTBAR policy config registers */
+ 	u32 reg32;
+-- 
+2.39.2
+
diff --git a/config/coreboot/haswell/patches/0027-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch b/config/coreboot/haswell/patches/0027-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
new file mode 100644
index 00000000..9b6020a2
--- /dev/null
+++ b/config/coreboot/haswell/patches/0027-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
@@ -0,0 +1,55 @@
+From b75d9e385137b3b561fc7220c04f742817d319b2 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sat, 4 May 2024 02:00:53 +0100
+Subject: [PATCH 1/1] nb/haswell: lock policy regs when disabling IOMMU
+
+Angel Pons told me I should do it. See comments here:
+https://review.coreboot.org/c/coreboot/+/81016
+
+I see no harm in complying with the request. I'll merge
+this into the main patch at a later date and try to
+get this upstreamed.
+
+Just a reminder: on Optiplex 9020 variants, Xorg locks up
+under Linux when tested with a graphics card; disabling
+IOMMU works around the issue. Intel graphics work just fine
+with IOMMU turned on. Libreboot disables IOMMU by default,
+on the 9020, so that users can install graphics cards easily.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/northbridge/intel/haswell/early_init.c | 15 +++++++--------
+ 1 file changed, 7 insertions(+), 8 deletions(-)
+
+diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c
+index 1a7e0b1076..e9506ee830 100644
+--- a/src/northbridge/intel/haswell/early_init.c
++++ b/src/northbridge/intel/haswell/early_init.c
+@@ -160,17 +160,16 @@ static void haswell_setup_iommu(void)
+ 	const u32 capid0_a = pci_read_config32(HOST_BRIDGE, CAPID0_A);
+ 	u8 enable_iommu = get_uint_option("iommu", 1);
+ 
+-	if (!enable_iommu)
+-		return;
+-
+ 	if (capid0_a & VTD_DISABLE)
+ 		return;
+ 
+-	/* Setup BARs: zeroize top 32 bits; set enable bit */
+-	mchbar_write32(GFXVTBAR + 4, GFXVT_BASE_ADDRESS >> 32);
+-	mchbar_write32(GFXVTBAR + 0, GFXVT_BASE_ADDRESS | 1);
+-	mchbar_write32(VTVC0BAR + 4, VTVC0_BASE_ADDRESS >> 32);
+-	mchbar_write32(VTVC0BAR + 0, VTVC0_BASE_ADDRESS | 1);
++	if (enable_iommu) {
++		/* Setup BARs: zeroize top 32 bits; set enable bit */
++		mchbar_write32(GFXVTBAR + 4, GFXVT_BASE_ADDRESS >> 32);
++		mchbar_write32(GFXVTBAR + 0, GFXVT_BASE_ADDRESS | 1);
++		mchbar_write32(VTVC0BAR + 4, VTVC0_BASE_ADDRESS >> 32);
++		mchbar_write32(VTVC0BAR + 0, VTVC0_BASE_ADDRESS | 1);
++	}
+ 
+ 	/* Set L3HIT2PEND_DIS, lock GFXVTBAR policy config registers */
+ 	u32 reg32;
+-- 
+2.39.2
+

From 7a955a4c728169f5d09aa95cb173db19e52b3b0d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 May 2024 04:52:02 +0100
Subject: [PATCH 0316/1549] d510mo and d945gclf: disable for release

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/d510mo/target.cfg         | 1 +
 config/coreboot/d510mo/warn.txt           | 1 +
 config/coreboot/d510mo_16mb/target.cfg    | 1 +
 config/coreboot/d510mo_16mb/warn.txt      | 1 +
 config/coreboot/d945gclf_512kb/target.cfg | 1 +
 config/coreboot/d945gclf_512kb/warn.txt   | 1 +
 config/coreboot/d945gclf_8mb/target.cfg   | 1 +
 config/coreboot/d945gclf_8mb/warn.txt     | 1 +
 8 files changed, 8 insertions(+)
 create mode 100644 config/coreboot/d510mo/warn.txt
 create mode 100644 config/coreboot/d510mo_16mb/warn.txt
 create mode 100644 config/coreboot/d945gclf_512kb/warn.txt
 create mode 100644 config/coreboot/d945gclf_8mb/warn.txt

diff --git a/config/coreboot/d510mo/target.cfg b/config/coreboot/d510mo/target.cfg
index f07fee9a..5c15f467 100644
--- a/config/coreboot/d510mo/target.cfg
+++ b/config/coreboot/d510mo/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="y"
 status="untested"
+release="n"
diff --git a/config/coreboot/d510mo/warn.txt b/config/coreboot/d510mo/warn.txt
new file mode 100644
index 00000000..7e2498a1
--- /dev/null
+++ b/config/coreboot/d510mo/warn.txt
@@ -0,0 +1 @@
+this board has never been stable, and has not been tested in Libreboot 20240504 so no ROM images included for it in that release
diff --git a/config/coreboot/d510mo_16mb/target.cfg b/config/coreboot/d510mo_16mb/target.cfg
index a99b11f0..82e52183 100644
--- a/config/coreboot/d510mo_16mb/target.cfg
+++ b/config/coreboot/d510mo_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 status="untested"
+release="n"
diff --git a/config/coreboot/d510mo_16mb/warn.txt b/config/coreboot/d510mo_16mb/warn.txt
new file mode 100644
index 00000000..7e2498a1
--- /dev/null
+++ b/config/coreboot/d510mo_16mb/warn.txt
@@ -0,0 +1 @@
+this board has never been stable, and has not been tested in Libreboot 20240504 so no ROM images included for it in that release
diff --git a/config/coreboot/d945gclf_512kb/target.cfg b/config/coreboot/d945gclf_512kb/target.cfg
index 5899fae2..2c2cf673 100644
--- a/config/coreboot/d945gclf_512kb/target.cfg
+++ b/config/coreboot/d945gclf_512kb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="n"
 status="untested"
+release="n"
diff --git a/config/coreboot/d945gclf_512kb/warn.txt b/config/coreboot/d945gclf_512kb/warn.txt
new file mode 100644
index 00000000..7e2498a1
--- /dev/null
+++ b/config/coreboot/d945gclf_512kb/warn.txt
@@ -0,0 +1 @@
+this board has never been stable, and has not been tested in Libreboot 20240504 so no ROM images included for it in that release
diff --git a/config/coreboot/d945gclf_8mb/target.cfg b/config/coreboot/d945gclf_8mb/target.cfg
index 5899fae2..2c2cf673 100644
--- a/config/coreboot/d945gclf_8mb/target.cfg
+++ b/config/coreboot/d945gclf_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="n"
 status="untested"
+release="n"
diff --git a/config/coreboot/d945gclf_8mb/warn.txt b/config/coreboot/d945gclf_8mb/warn.txt
new file mode 100644
index 00000000..7e2498a1
--- /dev/null
+++ b/config/coreboot/d945gclf_8mb/warn.txt
@@ -0,0 +1 @@
+this board has never been stable, and has not been tested in Libreboot 20240504 so no ROM images included for it in that release

From 5bf25eac05c0d081aeb7390ffa8529b044b62bf9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 May 2024 04:58:20 +0100
Subject: [PATCH 0317/1549] coreboot: update latitude release status

working s3 means i'm happy to mark it as being stable.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/e5420_6mb/target.cfg       | 2 +-
 config/coreboot/e5420_6mb/warn.txt         | 2 +-
 config/coreboot/e5520_6mb/target.cfg       | 2 +-
 config/coreboot/e5520_6mb/warn.txt         | 2 +-
 config/coreboot/e5530_12mb/target.cfg      | 2 +-
 config/coreboot/e5530_12mb/warn.txt        | 2 +-
 config/coreboot/e6400_4mb/target.cfg       | 2 +-
 config/coreboot/e6400_4mb/warn.txt         | 2 +-
 config/coreboot/e6400nvidia_4mb/target.cfg | 2 +-
 config/coreboot/e6400nvidia_4mb/warn.txt   | 2 +-
 config/coreboot/e6420_10mb/target.cfg      | 2 +-
 config/coreboot/e6420_10mb/warn.txt        | 2 +-
 config/coreboot/e6430_12mb/target.cfg      | 2 +-
 config/coreboot/e6430_12mb/warn.txt        | 2 +-
 config/coreboot/e6520_10mb/target.cfg      | 2 +-
 config/coreboot/e6520_10mb/warn.txt        | 2 +-
 config/coreboot/e6530_12mb/target.cfg      | 2 +-
 config/coreboot/e6530_12mb/warn.txt        | 2 +-
 18 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index e48db5e5..a0cfb47e 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/e5420_6mb/warn.txt b/config/coreboot/e5420_6mb/warn.txt
index 57d05e6a..4709a005 100644
--- a/config/coreboot/e5420_6mb/warn.txt
+++ b/config/coreboot/e5420_6mb/warn.txt
@@ -1 +1 @@
-Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
+Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index e48db5e5..a0cfb47e 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/e5520_6mb/warn.txt b/config/coreboot/e5520_6mb/warn.txt
index 57d05e6a..4709a005 100644
--- a/config/coreboot/e5520_6mb/warn.txt
+++ b/config/coreboot/e5520_6mb/warn.txt
@@ -1 +1 @@
-Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
+Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index e48db5e5..a0cfb47e 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/e5530_12mb/warn.txt b/config/coreboot/e5530_12mb/warn.txt
index 57d05e6a..4709a005 100644
--- a/config/coreboot/e5530_12mb/warn.txt
+++ b/config/coreboot/e5530_12mb/warn.txt
@@ -1 +1 @@
-Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
+Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index d1ea26ad..fb7c7bfb 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable" # broken s3
+status="stable" # broken s3
diff --git a/config/coreboot/e6400_4mb/warn.txt b/config/coreboot/e6400_4mb/warn.txt
index 30e61da5..9545476b 100644
--- a/config/coreboot/e6400_4mb/warn.txt
+++ b/config/coreboot/e6400_4mb/warn.txt
@@ -1,3 +1,3 @@
-Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
+Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
 
 If you have the nvidia gpu variant, please use e6400nvidia_4mb instead.
diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
index d1026eed..a1a8caf1 100644
--- a/config/coreboot/e6400nvidia_4mb/target.cfg
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable" # s3, nvidia+nouveau
+status="stable" # s3, nvidia+nouveau
diff --git a/config/coreboot/e6400nvidia_4mb/warn.txt b/config/coreboot/e6400nvidia_4mb/warn.txt
index 5b2e4a00..34f4bdf2 100644
--- a/config/coreboot/e6400nvidia_4mb/warn.txt
+++ b/config/coreboot/e6400nvidia_4mb/warn.txt
@@ -1,3 +1,3 @@
-Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
+Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
 
 Nvidia GPU on this model doesn't work when you try xorg; xorg will hang. Use "nomodeset" under Linux, when booting. On BSD, the nv driver works ok but can get very slow-slideshow-y when dragging windows, yet rendered video will usually run smooth; use a tiling window manager on BSD systems, or again use software rendering.
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index e48db5e5..a0cfb47e 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/e6420_10mb/warn.txt b/config/coreboot/e6420_10mb/warn.txt
index 57d05e6a..4709a005 100644
--- a/config/coreboot/e6420_10mb/warn.txt
+++ b/config/coreboot/e6420_10mb/warn.txt
@@ -1 +1 @@
-Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
+Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index e48db5e5..a0cfb47e 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/e6430_12mb/warn.txt b/config/coreboot/e6430_12mb/warn.txt
index 57d05e6a..4709a005 100644
--- a/config/coreboot/e6430_12mb/warn.txt
+++ b/config/coreboot/e6430_12mb/warn.txt
@@ -1 +1 @@
-Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
+Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index e48db5e5..a0cfb47e 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/e6520_10mb/warn.txt b/config/coreboot/e6520_10mb/warn.txt
index 57d05e6a..4709a005 100644
--- a/config/coreboot/e6520_10mb/warn.txt
+++ b/config/coreboot/e6520_10mb/warn.txt
@@ -1 +1 @@
-Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
+Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index e48db5e5..a0cfb47e 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="unstable"
+status="stable"
diff --git a/config/coreboot/e6530_12mb/warn.txt b/config/coreboot/e6530_12mb/warn.txt
index 57d05e6a..4709a005 100644
--- a/config/coreboot/e6530_12mb/warn.txt
+++ b/config/coreboot/e6530_12mb/warn.txt
@@ -1 +1 @@
-Battery indicator not working yet. S3 suspend/resume may be broken. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
+Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.

From d3aeb2c79f5effd0bc842a131ac9d9f57daf99db Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 May 2024 06:22:32 +0100
Subject: [PATCH 0318/1549] config/git: importer newer documentation

I'm on a schedule here and don't have time to do the
release changelog before actually compiling the release.
I'm pushing the release changelog / news announcement
*while the release is building*. Therefore, the actual
release archive will contain Libreboot documentation, but
from the lbwww revision just before the release announcement.

(a changelog file is still generated from Git, and included
in releases)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/docs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/git/docs b/config/git/docs
index c408423a..c6b7a387 100644
--- a/config/git/docs
+++ b/config/git/docs
@@ -8,7 +8,7 @@
 }
 
 {mdfiles}{
-	rev: 660d9d87c7424c3311d535e6bb6bbeba66bcacbc
+	rev: 20fd775c855428ecff647a42823746863fd57efe
 	loc: docs/www/html
 	url: https://codeberg.org/libreboot/lbwww
 	bkup_url: https://git.disroot.org/libreboot/lbwww
@@ -16,7 +16,7 @@
 }
 
 {imgfiles}{
-	rev: 54aee63ca18400f8de667ab16146f88f47a05488
+	rev: 625bb7535d388a235bec47a8ce822cda10b53692
 	loc: docs/www/html/site/img
 	url: https://codeberg.org/libreboot/lbwww-img
 	bkup_url: https://git.disroot.org/libreboot/lbwww-img

From ae9e73890fa915511464d781ae3109fabd9def0e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 May 2024 06:25:42 +0100
Subject: [PATCH 0319/1549] Libreboot 20240504 release

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../0002-say-the-name-libreboot-in-the-grub-menu.patch          | 2 +-
 script/update/release                                           | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 8cea919d..6ff97979 100644
--- a/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..31308e16a 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20240225 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20240504 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/script/update/release b/script/update/release
index fcee49e7..405fdc28 100755
--- a/script/update/release
+++ b/script/update/release
@@ -220,7 +220,7 @@ mktarball()
 	printf "\nCreating archive: %s\n\n" "$2"
 	if [ "${tar_implementation% *}" = "tar (GNU tar)" ]; then
 		tar --sort=name --owner=root:0 --group=root:0 \
-		    --mtime="UTC 2024-02-25" -c "$1" | xz -T$threads -9e \
+		    --mtime="UTC 2024-05-04" -c "$1" | xz -T$threads -9e \
 		    > "$2" || $err "mktarball 1, ${1}"
 	else
 		# TODO: reproducible tarballs on non-GNU systems

From d13d930804a8854b3b170a06f891ecb0e3cc136d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 May 2024 04:41:51 +0100
Subject: [PATCH 0320/1549] build/roms: allow searching status by mismatch

for example:

./build roms list stable

this lists all images that are marked "stable"

now:

./build roms list _stable

this lists all images that are *not* marked stable

this will help me keep track during development

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index 0b10e78a..0e292243 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -74,8 +74,16 @@ main()
 		if [ "$listboards" = "y" ]; then
 			[ -z "$list_type" ] && printf "%s\n" "$board"
 			for _list_type in $list_type; do
-				[ "$status" != "$_list_type" ] && continue
-				printf "%s\n" "$board"
+				if [ "${_list_type#_}" = "$_list_type" ]; then
+					[ "$status" != "$_list_type" ] && \
+						continue
+					printf "%s\n" "$board"
+				else
+					[ "$status" = "${_list_type#_}" ] && \
+						continue
+					printf "%s\n" "$board"
+					break
+				fi
 			done; continue
 		fi
 

From 2fcbff68fc79112a06a76933c1d5fdb167c259b3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 May 2024 05:09:23 +0100
Subject: [PATCH 0321/1549] build/roms: split up main()

it's starting to get a big big, so break it up

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 81 +++++++++++++++++++++++++++--------------------
 1 file changed, 46 insertions(+), 35 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index 0e292243..3d5a3f5c 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -62,41 +62,7 @@ main()
 	    $err "Cannot generate list of boards for building"
 
 	for x in ${boards}; do
-		eval "$(setvars "n" ${pv}) $(setvars "" ${v})"
-		grub_background="background1280x800.png"
-		board="${x}"
-		status="unknown"
-
-		configure_target
-		[ "$board" = "$tree" ] && \
-			continue
-
-		if [ "$listboards" = "y" ]; then
-			[ -z "$list_type" ] && printf "%s\n" "$board"
-			for _list_type in $list_type; do
-				if [ "${_list_type#_}" = "$_list_type" ]; then
-					[ "$status" != "$_list_type" ] && \
-						continue
-					printf "%s\n" "$board"
-				else
-					[ "$status" = "${_list_type#_}" ] && \
-						continue
-					printf "%s\n" "$board"
-					break
-				fi
-			done; continue
-		fi
-
-		# exclude certain targets from the release
-		skip_board && \
-		    printf "Skip target %s(%s)\n" "$board" "$status" && \
-		    skipped="* $board($status)\n$skipped" && continue
-
-		build_payloads
-		build_target_mainboard
-
-		[ -d "bin/${board}" ] || continue
-		targets="* bin/${board}\n${targets}"
+		handle_target
 	done
 
 	[ "$listboards" = "y" ] && return 0
@@ -115,6 +81,31 @@ main()
 	printf "DO NOT flash images from elf/ - please use bin/ instead.\n"
 }
 
+handle_target()
+{
+	eval "$(setvars "n" ${pv}) $(setvars "" ${v})"
+	grub_background="background1280x800.png"
+	board="${x}"
+	status="unknown"
+
+	configure_target
+	[ "$board" = "$tree" ] && \
+		return 0
+
+	print_target_name && return 0
+
+	# exclude certain targets from the release
+	skip_board && \
+	    printf "Skip target %s(%s)\n" "$board" "$status" && \
+	    skipped="* $board($status)\n$skipped" && return 0
+
+	build_payloads
+	build_target_mainboard
+
+	[ -d "bin/${board}" ] || return 0
+	targets="* bin/${board}\n${targets}"
+}
+
 configure_target()
 {
 	targetdir="${cfgsdir}/${board}"
@@ -163,6 +154,26 @@ configure_target()
 	eval "payload_${_payload}=y"
 }
 
+print_target_name()
+{
+	[ "$listboards" = "y" ] || return 1
+
+	[ -z "$list_type" ] && printf "%s\n" "$board"
+
+	for _list_type in $list_type; do
+		if [ "${_list_type#_}" = "$_list_type" ]; then
+			[ "$status" != "$_list_type" ] && \
+				continue
+			printf "%s\n" "$board"
+			break
+		elif [ "$status" != "${_list_type#_}" ]; then
+			printf "%s\n" "$board"
+			break
+		fi
+	done
+	return 0
+}
+
 skip_board()
 {
 	if [ "$listboards" != "y" ] && [ "$status" != "stable" ]; then

From 580a5559480153f4b3e1983ccdce8e5a2c82c68d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 May 2024 05:18:12 +0100
Subject: [PATCH 0322/1549] build/roms: don't use exit status from skip_board

the printf could potentially return non-zero, which might
make the script not skip a given target

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index 3d5a3f5c..81ecd879 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -95,9 +95,11 @@ handle_target()
 	print_target_name && return 0
 
 	# exclude certain targets from the release
-	skip_board && \
-	    printf "Skip target %s(%s)\n" "$board" "$status" && \
-	    skipped="* $board($status)\n$skipped" && return 0
+	if skip_board; then
+		printf "Skip target %s(%s)\n" "$board" "$status"
+		skipped="* $board($status)\n$skipped"
+		return 0
+	fi
 
 	build_payloads
 	build_target_mainboard

From aa5937edd52a80a5385b8feb4275e5f005fb92d9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 May 2024 05:28:06 +0100
Subject: [PATCH 0323/1549] build/roms: don't rely on x in handle_target

x is part of the for loop in main() and may or not
still be available from handle_target, depending on
your implementation of sh, but this should not be assumed

do it properly

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/script/build/roms b/script/build/roms
index 81ecd879..032c0a57 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -62,7 +62,7 @@ main()
 	    $err "Cannot generate list of boards for building"
 
 	for x in ${boards}; do
-		handle_target
+		handle_target "$x"
 	done
 
 	[ "$listboards" = "y" ] && return 0
@@ -85,7 +85,7 @@ handle_target()
 {
 	eval "$(setvars "n" ${pv}) $(setvars "" ${v})"
 	grub_background="background1280x800.png"
-	board="${x}"
+	board="$1"
 	status="unknown"
 
 	configure_target

From 58400fc4a5b2a8e9d7eecffe3d9097db43599c5d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 May 2024 16:13:13 +0100
Subject: [PATCH 0324/1549] err.sh: correct copyright info

i replaced 2022, 2023 with 2022, 2024 when updating
the years, as per modifications, but the 2023 copyright
doesn't become invalidated

change it to 2022-2024 instead, which is correct

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/err.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/err.sh b/include/err.sh
index a25effe6..66338337 100755
--- a/include/err.sh
+++ b/include/err.sh
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: MIT
-# SPDX-FileCopyrightText: 2022, 2024 Leah Rowe <leah@libreboot.org>
+# SPDX-FileCopyrightText: 2022-2024 Leah Rowe <leah@libreboot.org>
 
 export LC_COLLATE=C
 export LC_ALL=C

From 5e4009b539b0c1bbb14eea8f8cd892d3933c3355 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 May 2024 22:54:55 +0100
Subject: [PATCH 0325/1549] merge include/err.sh with include/option.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build                  |   1 -
 include/err.sh         |  95 --------------------------------------
 include/option.sh      | 101 ++++++++++++++++++++++++++++++++++++++---
 script/build/roms      |   1 -
 script/build/serprog   |   2 +-
 script/update/release  |   1 -
 script/update/trees    |   1 -
 script/vendor/download |   1 -
 script/vendor/inject   |   1 -
 9 files changed, 95 insertions(+), 109 deletions(-)
 delete mode 100755 include/err.sh

diff --git a/build b/build
index 277390fd..4c6a2916 100755
--- a/build
+++ b/build
@@ -7,7 +7,6 @@
 
 set -u -e
 
-. "include/err.sh"
 . "include/option.sh"
 
 eval "$(setvars "" option aur_notice)"
diff --git a/include/err.sh b/include/err.sh
deleted file mode 100755
index 66338337..00000000
--- a/include/err.sh
+++ /dev/null
@@ -1,95 +0,0 @@
-# SPDX-License-Identifier: MIT
-# SPDX-FileCopyrightText: 2022-2024 Leah Rowe <leah@libreboot.org>
-
-export LC_COLLATE=C
-export LC_ALL=C
-
-version=""; versiondate=""; projectname=""; _nogit=""
-err="err_"; tmpdir=""; lbmk_status=""
-
-# if "y": a coreboot target won't be built if target.cfg says release="n"
-# (this is used to exclude certain build targets from releases)
-lbmk_release=
-set | grep LBMK_RELEASE 1>/dev/null 2>/dev/null || lbmk_release="n" || :
-[ -z "$lbmk_release" ] && lbmk_release="$LBMK_RELEASE"
-[ "$lbmk_release" = "n" ] || [ "$lbmk_release" = "y" ] || lbmk_release="n"
-export LBMK_RELEASE="$lbmk_release"
-
-# if set to n via export, status checks will be skipped during
-# all builds, and all targets will be built regardless of status.
-# this replicates the old behaviour of lbmk, prior to the checks.
-set | grep LBMK_STATUS 1>/dev/null 2>/dev/null && lbmk_status="$LBMK_STATUS"
-[ "$lbmk_status" = "y" ] || [ "$lbmk_status" = "n" ] || lbmk_status="y"
-export LBMK_STATUS="$lbmk_status"
-
-tmpdir_was_set="y"
-set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"
-if [ "${tmpdir_was_set}" = "y" ]; then
-	[ "${TMPDIR%_*}" = "/tmp/lbmk" ] || tmpdir_was_set="n"
-fi
-if [ "${tmpdir_was_set}" = "n" ]; then
-	export TMPDIR="/tmp"
-	tmpdir="$(mktemp -d -t lbmk_XXXXXXXX)"
-	export TMPDIR="${tmpdir}"
-else
-	export TMPDIR="${TMPDIR}"
-	tmpdir="${TMPDIR}"
-fi
-
-x_() {
-	[ $# -lt 1 ] || ${@} || $err "Unhandled non-zero exit: $@"; return 0
-}
-
-check_git()
-{
-	which git 1>/dev/null 2>/dev/null || \
-	    git_err "git not installed. please install git-scm."
-	git config --global user.name 1>/dev/null 2>/dev/null || \
-	    git_err "git config --global user.name \"John Doe\""
-	git config --global user.email 1>/dev/null 2>/dev/null || \
-	    git_err "git config --global user.email \"john.doe@example.com\""
-}
-
-git_err()
-{
-	printf "You need to set git name/email, like so:\n%s\n\n" "$1" 1>&2
-	$err "Git name/email not configured"
-}
-
-check_project()
-{
-	read -r projectname < projectname || :
-
-	[ ! -f version ] || read -r version < version || :
-	version_="${version}"
-	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
-	    version="git-$(git rev-parse HEAD 2>&1)" || version="${version_}"
-
-	[ ! -f versiondate ] || read -r versiondate < versiondate || :
-	versiondate_="${versiondate}"
-	[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
-	    --pretty='%ct' HEAD)" || versiondate="${versiondate_}"
-
-	for p in projectname version versiondate; do
-		eval "[ -n \"\$$p\" ] || $err \"$p unset\""
-		eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
-	done
-	export LOCALVERSION="-${projectname}-${version%%-*}"
-}
-
-setvars()
-{
-	_setvars=""
-	[ $# -lt 2 ] && $err "setvars: too few arguments"
-	val="${1}" && shift 1
-	for var in $@; do
-		_setvars="${var}=\"${val}\"; ${_setvars}"
-	done
-	printf "%s\n" "${_setvars% }"
-}
-
-err_()
-{
-	printf "ERROR %s: %s\n" "${0}" "${1}" 1>&2
-	exit 1
-}
diff --git a/include/option.sh b/include/option.sh
index eb792775..a117958d 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -3,6 +3,10 @@
 # SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
 # SPDX-FileCopyrightText: 2020-2024 Leah Rowe <leah@libreboot.org>
 
+export LC_COLLATE=C
+export LC_ALL=C
+
+tmpdir_was_set="y"
 vendir="vendorfiles"
 appdir="${vendir}/app"
 cbdir="src/coreboot/default"
@@ -13,22 +17,64 @@ grubcfgsdir="config/grub"
 layoutdir="/boot/grub/layouts"
 . "${grubcfgsdir}/modules.list"
 tmpgit="${PWD}/tmp/gitclone"
+err="err_"
 
+err_()
+{
+	printf "ERROR %s: %s\n" "${0}" "${1}" 1>&2
+	exit 1
+}
+
+setvars()
+{
+	_setvars=""
+	[ $# -lt 2 ] && $err "setvars: too few arguments"
+	val="${1}" && shift 1
+	for var in $@; do
+		_setvars="${var}=\"${val}\"; ${_setvars}"
+	done
+	printf "%s\n" "${_setvars% }"
+}
 eval "$(setvars "" CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
-    CONFIG_ME_BIN_PATH CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 \
+    CONFIG_ME_BIN_PATH CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 _nogit \
     CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW2_OFFSET \
-    CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_GBE_BIN_PATH \
+    CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_GBE_BIN_PATH tmpdir \
     CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE \
-    CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE _dest board boarddir \
-    CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE)"
+    CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE _dest board boarddir lbmk_release \
+    CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE lbmk_status threads \
+    version versiondate projectname)"
+
+# if "y": a coreboot target won't be built if target.cfg says release="n"
+# (this is used to exclude certain build targets from releases)
+set | grep LBMK_RELEASE 1>/dev/null 2>/dev/null || lbmk_release="n" || :
+[ -z "$lbmk_release" ] && lbmk_release="$LBMK_RELEASE"
+[ "$lbmk_release" = "n" ] || [ "$lbmk_release" = "y" ] || lbmk_release="n"
+export LBMK_RELEASE="$lbmk_release"
+
+# if set to n via export, status checks will be skipped during
+# all builds, and all targets will be built regardless of status.
+# this replicates the old behaviour of lbmk, prior to the checks.
+set | grep LBMK_STATUS 1>/dev/null 2>/dev/null && lbmk_status="$LBMK_STATUS"
+[ "$lbmk_status" = "y" ] || [ "$lbmk_status" = "n" ] || lbmk_status="y"
+export LBMK_STATUS="$lbmk_status"
+
+set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"
+if [ "${tmpdir_was_set}" = "y" ]; then
+	[ "${TMPDIR%_*}" = "/tmp/lbmk" ] || tmpdir_was_set="n"
+fi
+if [ "${tmpdir_was_set}" = "n" ]; then
+	export TMPDIR="/tmp"
+	tmpdir="$(mktemp -d -t lbmk_XXXXXXXX)"
+	export TMPDIR="${tmpdir}"
+else
+	export TMPDIR="${TMPDIR}"
+	tmpdir="${TMPDIR}"
+fi
 
-threads=
 set | grep LBMK_THREADS 1>/dev/null 2>/dev/null && threads="$LBMK_THREADS"
 [ -z "$threads" ] && threads=1
-
 expr "X$threads" : "X-\{0,1\}[0123456789][0123456789]*$" \
     1>/dev/null 2>/dev/null || threads=1 # user specified a non-integer
-
 export LBMK_THREADS="$threads"
 
 items()
@@ -92,3 +138,44 @@ remkdir()
 	rm -Rf "${1}" || $err "remkdir: !rm -Rf \"${1}\""
 	mkdir -p "${1}" || $err "remkdir: !mkdir -p \"${1}\""
 }
+
+x_() {
+	[ $# -lt 1 ] || ${@} || $err "Unhandled non-zero exit: $@"; return 0
+}
+
+check_git()
+{
+	which git 1>/dev/null 2>/dev/null || \
+	    git_err "git not installed. please install git-scm."
+	git config --global user.name 1>/dev/null 2>/dev/null || \
+	    git_err "git config --global user.name \"John Doe\""
+	git config --global user.email 1>/dev/null 2>/dev/null || \
+	    git_err "git config --global user.email \"john.doe@example.com\""
+}
+
+git_err()
+{
+	printf "You need to set git name/email, like so:\n%s\n\n" "$1" 1>&2
+	$err "Git name/email not configured"
+}
+
+check_project()
+{
+	read -r projectname < projectname || :
+
+	[ ! -f version ] || read -r version < version || :
+	version_="${version}"
+	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
+	    version="git-$(git rev-parse HEAD 2>&1)" || version="${version_}"
+
+	[ ! -f versiondate ] || read -r versiondate < versiondate || :
+	versiondate_="${versiondate}"
+	[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
+	    --pretty='%ct' HEAD)" || versiondate="${versiondate_}"
+
+	for p in projectname version versiondate; do
+		eval "[ -n \"\$$p\" ] || $err \"$p unset\""
+		eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
+	done
+	export LOCALVERSION="-${projectname}-${version%%-*}"
+}
diff --git a/script/build/roms b/script/build/roms
index 032c0a57..6049848f 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -8,7 +8,6 @@
 
 set -u -e
 
-. "include/err.sh"
 . "include/option.sh"
 
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
diff --git a/script/build/serprog b/script/build/serprog
index ea2c02bf..b830f26d 100755
--- a/script/build/serprog
+++ b/script/build/serprog
@@ -5,7 +5,7 @@
 
 set -u -e
 
-. "include/err.sh"
+. "include/option.sh"
 
 eval "$(setvars "" pico_sdk_dir pico_src_dir stm32_src_dir boards_dir)"
 
diff --git a/script/update/release b/script/update/release
index 405fdc28..aebe6fbf 100755
--- a/script/update/release
+++ b/script/update/release
@@ -4,7 +4,6 @@
 
 set -u -e
 
-. "include/err.sh"
 . "include/option.sh"
 
 eval "$(setvars "" vdir relname src_dirname srcdir _xm target romdir mode)"
diff --git a/script/update/trees b/script/update/trees
index af80d99a..615fbbf2 100755
--- a/script/update/trees
+++ b/script/update/trees
@@ -6,7 +6,6 @@
 
 set -u -e
 
-. "include/err.sh"
 . "include/option.sh"
 . "include/git.sh"
 
diff --git a/script/vendor/download b/script/vendor/download
index b40810cc..6f1fdbbf 100755
--- a/script/vendor/download
+++ b/script/vendor/download
@@ -4,7 +4,6 @@
 # SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
 # SPDX-FileCopyrightText: 2023-2024 Leah Rowe <leah@libreboot.org>
 
-. "include/err.sh"
 . "include/option.sh"
 . "include/mrc.sh"
 
diff --git a/script/vendor/inject b/script/vendor/inject
index dc12d7b5..9b6b52ea 100755
--- a/script/vendor/inject
+++ b/script/vendor/inject
@@ -4,7 +4,6 @@
 # SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
 # SPDX-FileCopyrightText: 2023-2024 Leah Rowe <leah@libreboot.org>
 
-. "include/err.sh"
 . "include/option.sh"
 
 nvmutil="util/nvmutil/nvm"

From 297af7e6d3dbf17791bffb1ede55e990b313fa0b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 9 May 2024 13:03:35 +0100
Subject: [PATCH 0326/1549] build/roms: remove unnecessary command

there is no need to return 0 at the end of a function.

sh does that anyway

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 1 -
 1 file changed, 1 deletion(-)

diff --git a/script/build/roms b/script/build/roms
index 6049848f..3e8b77be 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -172,7 +172,6 @@ print_target_name()
 			break
 		fi
 	done
-	return 0
 }
 
 skip_board()

From e3cb3a4072ffc2d3db9c9363d5b2ebd58adbdfb7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 9 May 2024 13:52:49 +0100
Subject: [PATCH 0327/1549] merge script/build/serprog with script/build/roms

previous command:

./build serprog

now it is:

./build roms serprog

after that, it's the same arguments e.g.

./build roms serprog stm32
./build roms serprog rp2040

further cleanup to commence

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms     | 90 ++++++++++++++++++++++++++++++++++++++-----
 script/build/serprog  | 77 ------------------------------------
 script/update/release |  4 +-
 3 files changed, 82 insertions(+), 89 deletions(-)
 delete mode 100755 script/build/serprog

diff --git a/script/build/roms b/script/build/roms
index 3e8b77be..4be00f85 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -10,10 +10,14 @@ set -u -e
 
 . "include/option.sh"
 
+serprog_usage="usage: ./build roms serprog <rp2040|stm32> [board]"
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 grub_background="background1280x800.png"
 grubelf="elf/grub/grub.elf"
 cfgsdir="config/coreboot"
+pico_src_dir="src/pico-serprog"
+pico_sdk_dir="src/pico-sdk"
+stm32_src_dir="src/stm32-vserprog"
 
 # Disable all payloads by default.
 # target.cfg files have to specifically enable [a] payload(s)
@@ -21,16 +25,15 @@ pv="payload_grub payload_grub_withseabios payload_seabios payload_memtest t"
 pv="${pv} payload_seabios_withgrub payload_seabios_grubonly payload_uboot memtest_bin"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree keymaps release"
 v="${v} grub_timeout ubdir board grub_scan_disk uboot_config status"
-eval "$(setvars "n" ${pv})"
+eval "$(setvars "n" ${pv} serprog)"
 eval "$(setvars "" ${v} boards _displaymode _payload _keyboard all targets \
-    skipped listboards list_type)"
+    skipped listboards list_type serprog_boards_dir)"
 
 main()
 {
 	check_project
 
 	while [ $# -gt 0 ]; do
-
 		if [ "$listboards" = "y" ]; then
 			list_type="$list_type $1"
 			list_type="${list_type# }"
@@ -46,6 +49,9 @@ main()
 			    $err "Cannot generate list of boards for list"
 			listboards="y"
 			shift 1; continue ;;
+		serprog)
+			serprog="y"
+			shift 1; break ;;
 		-d) _displaymode="${2}" ;;
 		-p) _payload="${2}" ;;
 		-k) _keyboard="${2}" ;;
@@ -57,12 +63,16 @@ main()
 		shift 2
 	done
 
-	[ "${all}" != "y" ] || boards=$(items config/coreboot) || \
-	    $err "Cannot generate list of boards for building"
-
-	for x in ${boards}; do
-		handle_target "$x"
-	done
+	if [ "$serprog" = "y" ]; then
+		handle_serprog $@
+		return 0
+	else
+		[ "${all}" != "y" ] || boards=$(items config/coreboot) || \
+			$err "Cannot generate list of boards for building"
+		for x in ${boards}; do
+			handle_coreboot_target "$x"
+		done
+	fi
 
 	[ "$listboards" = "y" ] && return 0
 
@@ -80,7 +90,67 @@ main()
 	printf "DO NOT flash images from elf/ - please use bin/ instead.\n"
 }
 
-handle_target()
+handle_serprog()
+{
+	[ -z "${1+x}" ] && $err "${serprog_usage}"
+	[ "$1" != "rp2040" ] && [ "$1" != "stm32" ] && $err "$serprog_usage"
+	if [ "${1}" = "rp2040" ]; then
+		serprog_boards_dir=${pico_sdk_dir}/src/boards/include/boards
+		[ -d "$pico_src_dir" ] || x_ ./update trees -f "pico-serprog"
+	elif [ "${1}" = "stm32" ]; then
+		serprog_boards_dir=${stm32_src_dir}/boards
+		[ -d "$stm32_src_dir" ] || x_ ./update trees -f "stm32-vserprog"
+	fi
+	x_ mkdir -p "bin/serprog_${1}"
+
+	if [ $# -gt 1 ] && [ "${2}" = "list" ]; then
+		print_serprog_boards ${serprog_boards_dir}
+	elif [ $# -gt 1 ]; then
+		build_${1}_rom "${2}"
+	else
+		printf "Building all serprog targets\n"
+		list_serprog_boards "${serprog_boards_dir}" | \
+			while read -r board; do
+				build_${1}_rom "${board}"
+			done
+	fi
+}
+
+build_rp2040_rom()
+{
+	board=${1}
+	printf "Building pico-serprog for %s\n" "${board}"
+	x_ cmake -DPICO_BOARD="$board" -DPICO_SDK_PATH="$pico_sdk_dir" \
+	    -B "${pico_src_dir}/build" "${pico_src_dir}"
+	x_ cmake --build "${pico_src_dir}/build"
+	x_ mv ${pico_src_dir}/build/pico_serprog.uf2 \
+	   bin/serprog_rp2040/serprog_${board}.uf2
+	printf "output to bin/serprog_rp2040/serprog_%s.uf2\n" "$board"
+}
+
+build_stm32_rom()
+{
+	board=${1}
+	printf "Building stm32-vserprog for %s\n" "${board}"
+	x_ make -C $stm32_src_dir libopencm3-just-make BOARD=$board
+	x_ make -C ${stm32_src_dir} BOARD=${board}
+	x_ mv ${stm32_src_dir}/stm32-vserprog.hex \
+	   bin/serprog_stm32/serprog_${board}.hex
+	printf "output to bin/serprog_stm32/serprog_%s.hex\n" "$board"
+}
+
+print_serprog_boards()
+{
+	printf "Available boards:\n"
+	list_serprog_boards "${1}"
+}
+
+list_serprog_boards()
+{
+	basename -a -s .h "${1}/"*.h || $err "list_boards $1: can't list boards"
+}
+
+handle_coreboot_target()
 {
 	eval "$(setvars "n" ${pv}) $(setvars "" ${v})"
 	grub_background="background1280x800.png"
diff --git a/script/build/serprog b/script/build/serprog
deleted file mode 100755
index b830f26d..00000000
--- a/script/build/serprog
+++ /dev/null
@@ -1,77 +0,0 @@
-#!/usr/bin/env sh
-# SPDX-License-Identifier: GPL-3.0-or-later
-# SPDX-FileCopyrightText: 2023 Riku Viitanen <riku.viitanen@protonmail.com>
-# SPDX-FileCopyrightText: 2023 Leah Rowe <leah@libreboot.org>
-
-set -u -e
-
-. "include/option.sh"
-
-eval "$(setvars "" pico_sdk_dir pico_src_dir stm32_src_dir boards_dir)"
-
-pico_src_dir=src/pico-serprog
-pico_sdk_dir=src/pico-sdk
-stm32_src_dir=src/stm32-vserprog
-
-usage="usage: ./build firmware serprog <rp2040|stm32> [board]"
-
-main()
-{
-	[ -z "${1+x}" ] && $err "${usage}"
-	[ "$1" != "rp2040" ] && [ "$1" != "stm32" ] && $err "$usage"
-	if [ "${1}" = "rp2040" ]; then
-		boards_dir=${pico_sdk_dir}/src/boards/include/boards
-		[ -d "$pico_src_dir" ] || x_ ./update trees -f "pico-serprog"
-	elif [ "${1}" = "stm32" ]; then
-		boards_dir=${stm32_src_dir}/boards
-		[ -d "$stm32_src_dir" ] || x_ ./update trees -f "stm32-vserprog"
-	fi
-	x_ mkdir -p "bin/serprog_${1}"
-
-	if [ $# -gt 1 ] && [ "${2}" = "list" ]; then
-		print_boards ${boards_dir}
-	elif [ $# -gt 1 ]; then
-		build_${1}_rom "${2}"
-	else
-		printf "Building all serprog targets\n"
-		list_boards "${boards_dir}" | while read -r board; do
-			build_${1}_rom "${board}"
-		done
-	fi
-}
-
-build_rp2040_rom()
-{
-	board=${1}
-	printf "Building pico-serprog for %s\n" "${board}"
-	x_ cmake -DPICO_BOARD="$board" -DPICO_SDK_PATH="$pico_sdk_dir" \
-	    -B "${pico_src_dir}/build" "${pico_src_dir}"
-	x_ cmake --build "${pico_src_dir}/build"
-	x_ mv ${pico_src_dir}/build/pico_serprog.uf2 \
-	   bin/serprog_rp2040/serprog_${board}.uf2
-	printf "output to bin/serprog_rp2040/serprog_%s.uf2\n" "$board"
-}
-
-build_stm32_rom()
-{
-	board=${1}
-	printf "Building stm32-vserprog for %s\n" "${board}"
-	x_ make -C $stm32_src_dir libopencm3-just-make BOARD=$board
-	x_ make -C ${stm32_src_dir} BOARD=${board}
-	x_ mv ${stm32_src_dir}/stm32-vserprog.hex \
-	   bin/serprog_stm32/serprog_${board}.hex
-	printf "output to bin/serprog_stm32/serprog_%s.hex\n" "$board"
-}
-
-print_boards()
-{
-	printf "Available boards:\n"
-	list_boards "${1}"
-}
-
-list_boards()
-{
-	basename -a -s .h "${1}/"*.h || $err "list_boards $1: can't list boards"
-}
-
-main $@
diff --git a/script/update/release b/script/update/release
index aebe6fbf..c78b5fce 100755
--- a/script/update/release
+++ b/script/update/release
@@ -106,8 +106,8 @@ fetch_trees()
 mkrom_images()
 {
 	./build roms all || $err "${_xm}: roms-all"
-	./build serprog rp2040 || $err "${_xm}: rp2040"
-	./build serprog stm32 || $err "${_xm}: stm32"
+	./build roms serprog rp2040 || $err "${_xm}: rp2040"
+	./build roms serprog stm32 || $err "${_xm}: stm32"
 
 	for rombuild in bin/*; do
 		[ -d "${rombuild}" ] || continue

From 38aaaecf6b8aa9b58f56dff930139e070b1649dc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 9 May 2024 13:56:35 +0100
Subject: [PATCH 0328/1549] build/roms: print serprog help

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/build/roms | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/script/build/roms b/script/build/roms
index 4be00f85..0525091b 100755
--- a/script/build/roms
+++ b/script/build/roms
@@ -558,6 +558,9 @@ usage()
 
 		./build roms list
 
+	Can also build serprog images:
+	${serprog_usage}		
+
 	to see targets of only a given status (stable, unstable,
 	broken, untested and unknown), try e.g.
 

From fb8d0c86c44ba98cc770222edcb18f0a492aa37a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 9 May 2024 14:31:43 +0100
Subject: [PATCH 0329/1549] build: exit if not running from lbmk directory

there's no portable(posix) way to check when running
from a symlink to lbmk in the current work directory

for example:

ln -s lbmk/build lbmktest
./lbmktest roms list

this would pass the new test, and first try to
include option.sh. in practise, the user probably  doesn't
happen to have include/option.sh in their current path

i can use readlink here, but again not portable

the current check will suffice. it also works when
the symlink is called from $PATH

e.g. /usr/bin/lbmktest exists and you do:
lbmktest roms list

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/build b/build
index 4c6a2916..59bd78d8 100755
--- a/build
+++ b/build
@@ -7,6 +7,11 @@
 
 set -u -e
 
+if [ "./${0##*/}" != "${0}" ]; then
+	printf "You must run this in the lbmk work directory.\n" 1>&2
+	exit 1
+fi
+
 . "include/option.sh"
 
 eval "$(setvars "" option aur_notice)"

From 052414c0ca9c965abc2181491344aa27bc4501f4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 9 May 2024 14:48:14 +0100
Subject: [PATCH 0330/1549] build: further prevent non-lbmk-work-directory

this is a follow-up to the previous commit

again, there's no posix way to check the path to the
file at argument 0, because readlink (utility) isn't
defined in posix (the C function is defined, but not
the utility included on many unices)

check whether "build" (file) exists, and whether it
is a symlink; if the latter, then we are definitely
not in the lbmk work directory!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build b/build
index 59bd78d8..1c78f280 100755
--- a/build
+++ b/build
@@ -7,7 +7,7 @@
 
 set -u -e
 
-if [ "./${0##*/}" != "${0}" ]; then
+if [ "./${0##*/}" != "${0}" ] || [ ! -f "build" ] || [ -L "build" ]; then
 	printf "You must run this in the lbmk work directory.\n" 1>&2
 	exit 1
 fi

From e1ea5dd0fdfa017f05a5a828ae6091145b349578 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Fri, 10 May 2024 05:48:57 +0100
Subject: [PATCH 0331/1549] bump seabios to
 e5f2e4c69643bc3cd385306a9e5d29e11578148c

changes upstream, relative to the previous revision:

* e5f2e4c6 pciinit: don't misalign large BARs
* 731c88d5 stdvgaio: Only read/write one color palette entry at a time
* c5a361c0 stdvga: Add stdvga_set_vertical_size() helper function
* 22c91412 stdvga: Rename stdvga_get_vde() to stdvga_get_vertical_size()
* 549463db stdvga: Rename stdvga_set_scan_lines() to stdvga_set_character_height()
* c67914ac stdvga: Rename stdvga_set_text_block_specifier() to stdvga_set_font_location()
* aa94925d stdvga: Rework stdvga palette index paging interface functions
* 8de51a5a stdvga: Rename stdvga_toggle_intensity() to stdvga_set_palette_blinking()
* 96c7781f stdvga: Add comments to interface functions in stdvga.c
* 2996819f stdvga: Rename CGA palette functions
* 91368088 stdvgamodes: Improve naming of dac palette tables
* 70f43981 stdvgamodes: No need to store pelmask in vga_modes[]
* 1588fd14 vgasrc: Rename vgahw_get_linesize() to vgahw_minimum_linelength()
* d73e18bb vgasrc: Use curmode_g instead of vmode_g when mode is the current video mode
* 192e23b7 vbe: implement function 09h (get/set palette data)
* 3722c21d vgasrc: round up save/restore size
* 5d87ff25 vbe: Add VBE 2.0+ OemData field to struct vbe_info
* 163fd9f0 fix smbios blob length overflow
* 82faf1d5 Add LBA 64bit support for reads beyond 2TB.
* 3f082f38 Add AHCI Power ON + ICC_ACTIVE into port setup code
* 3ae88886 esp-scsi: terminate DMA transfer when ESP data transfer completes
* a6ed6b70 limit address space used for pci devices.

Signed-off-by: Leah Rowe <info@minifree.org>
---
 config/seabios/default/target.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/seabios/default/target.cfg b/config/seabios/default/target.cfg
index 8ab09802..bc7cc9fc 100644
--- a/config/seabios/default/target.cfg
+++ b/config/seabios/default/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-rev="1e1da7a963007d03a4e0e9a9e0ff17990bb1608d"
+rev="e5f2e4c69643bc3cd385306a9e5d29e11578148c"

From 5f63b594fa3b0f111518f1e292bfb7163bec8be9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 11 May 2024 03:52:52 +0100
Subject: [PATCH 0332/1549] merge script/update/release into build

the main script isn't that big, and since the main
purpose of lbmk is geared toward the releases, it
makes sense to reduce the number of scripts by
merging into the main one

the way this works, "./update release" still works
afterward

so, the way lbmk is used shall remain unchanged

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build                 | 231 ++++++++++++++++++++++++++++++++++++++++-
 script/update/release | 236 ------------------------------------------
 2 files changed, 229 insertions(+), 238 deletions(-)
 delete mode 100755 script/update/release

diff --git a/build b/build
index 1c78f280..884d69de 100755
--- a/build
+++ b/build
@@ -1,6 +1,6 @@
 #!/usr/bin/env sh
 # SPDX-License-Identifier: GPL-3.0-or-later
-# SPDX-FileCopyrightText: 2014,2015,2020,2021,2023 Leah Rowe <leah@libreboot.org>
+# SPDX-FileCopyrightText: 2014,2015,2020-2024 Leah Rowe <leah@libreboot.org>
 # SPDX-FileCopyrightText: 2015 Patrick "P. J." McDermott <pj@pehjota.net>
 # SPDX-FileCopyrightText: 2015, 2016 Klemens Nanni <contact@autoboot.org>
 # SPDX-FileCopyrightText: 2022, Caleb La Grange <thonkpeasant@protonmail.com>
@@ -14,7 +14,8 @@ fi
 
 . "include/option.sh"
 
-eval "$(setvars "" option aur_notice)"
+eval "$(setvars "" option aur_notice vdir relname src_dirname srcdir _xm \
+    target romdir mode)"
 err="fail"
 
 linkpath="${0}"
@@ -44,6 +45,7 @@ initcmd()
 	help) usage ${0} ;;
 	list) items "${buildpath}" ;;
 	version) mkversion ;;
+	release) shift 1; mkrelease $@ ;;
 	*)
 		option="${1}"
 		return 0 ;;
@@ -111,6 +113,231 @@ usage()
 	EOF
 }
 
+mkrelease()
+{
+	export LBMK_RELEASE="y"
+	export LBMK_STATUS="n"
+
+	vdir="release"
+	while getopts d:m: option; do
+		[ -z "${OPTARG}" ] && $err "Empty argument not allowed"
+		case "${option}" in
+		d) vdir="${OPTARG}" ;;
+		m) mode="${OPTARG}" ;;
+		*) $err "Invalid option" ;;
+		esac
+	done
+
+	check_project
+
+	vdir="${vdir}/${version}"
+	relname="${projectname}-${version}"
+	[ "${mode}" = "u-boot" ] && relname="u-boot-for-${relname}"
+	src_dirname="${relname}_src"
+	srcdir="${vdir}/${src_dirname}"
+
+	[ -e "${vdir}" ] && $err "already exists: \"${vdir}\""
+
+	mkvdir
+	build_release
+
+	printf "DONE! Check release files under %s\n" "${vdir}"
+}
+
+mkvdir()
+{
+	mkdir -p "${vdir}" || $err "mkvdir: !mkdir -p \"${vdir}\""
+	git clone . "${srcdir}" || $err "mkdir: !gitclone \"${srcdir}\""
+	insert_version_files "$srcdir" || $err "mkvdir $srcdir: versionfile"
+}
+
+build_release()
+{
+	_xm="build_release ${vdir}"
+	(
+	cd "${srcdir}" || $err "${_xm}: !cd \"${srcdir}\""
+	fetch_trees
+	[ "${mode}" = "u-boot" ] || x_ mv src/docs docs
+	) || $err "can't create release files"
+
+	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
+	    --abbrev-commit > "${srcdir}/CHANGELOG" || \
+	    $err "build_release $srcdir: couldn't generate changelog"
+
+	(
+	if [ "${mode}" = "u-boot" ]; then
+		cd "${srcdir}/src/" || $err "${_xm}: mktarball \"${srcdir}\""
+		mktarball u-boot "../../${srcdir##*/}.tar.xz" || \
+		    $err "$_xm: mksrc"
+		# make a src archive containing only u-boot
+	else
+		cd "${srcdir%/*}" || $err "${_xm}: mktarball \"${srcdir}\""
+		mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || \
+		    $err "$_xm: mksrc"
+	fi
+	) || $err "can't create src tarball"
+	[ "${mode}" = "src" ] && return 0
+	[ "${mode}" = "u-boot" ] && return 0
+
+	(
+	cd "${srcdir}" || $err "${_xm}: 2 !cd \"${srcdir}\""
+	mkrom_images
+	) || $err "can't build rom images"
+
+	rm -Rf "${srcdir}" || $err "!rm -Rf ${srcdir}"
+}
+
+fetch_trees()
+{
+	for x in config/git/*; do
+		[ "${mode}" = "u-boot" ] && break
+		[ ! -f "${x}" ] || ./update trees -f "${x#config/git/}" || \
+		    $err "${_xm}: fetch ${x#config/git/}"
+	done
+	[ "${mode}" = "u-boot" ] && x_ ./update trees -f u-boot
+
+	for x in config/*/build.list; do
+		[ -f "${x}" ] || continue
+		xp="${x#*/}"; xp="${xp%/*}"
+		[ -L "${xp}" ] || rm -Rf "src/${xp}/${xp}" || \
+		    $err "!rm -Rf \"src/${xp}/${xp}\""
+	done
+
+	find . -name ".git" -exec rm -Rf {} + || $err "$_xm: rm .git"
+	find . -name ".gitmodules" -exec rm -Rf {} + || $err "$_xm: rm .gitmod"
+	x_ rm -Rf tmp .git
+}
+
+mkrom_images()
+{
+	./build roms all || $err "${_xm}: roms-all"
+	./build roms serprog rp2040 || $err "${_xm}: rp2040"
+	./build roms serprog stm32 || $err "${_xm}: stm32"
+
+	for rombuild in bin/*; do
+		[ -d "${rombuild}" ] || continue
+		handle_rom_archive "${rombuild}"
+	done
+
+	mv "release/${version}/roms/" ../roms || $err "${_xm}: copy roms/"
+}
+
+handle_rom_archive()
+{
+	builddir="${1}"
+	romdir="tmp/romdir"
+	rm -Rf "${romdir}" || $err "!rm romdir, handle_rom_archive"
+	target="${builddir##*/}"
+
+	if [ ! -f "config/coreboot/${target}/target.cfg" ]; then
+		# No config, just make a tarball
+		tarball="release/${version}/roms/${relname}_${target}.tar.xz"
+		insert_copying_files "${builddir}" || \
+		    $err "!insert copy, handle, ${builddir}"
+		mktarball "${builddir}" "${tarball}"
+		return 0
+	fi
+
+	romdir="${romdir}/bin/${target}"
+	mkdir -p "${romdir}" || $err "!mkdir -p romdir, handle_rom_archive"
+	cp "$builddir/"* "$romdir" || $err "!cp romdir, handle_rom_archive"
+
+	nukerom
+
+	printf "Generating release/%s/roms/%s-%s_%s.tar.xz\n" \
+	    "${version}" "${projectname}" "${version}" "${target##*/}"
+	insert_version_files "${romdir}" || \
+	    $err "mkrom_tarball ${romdir}: versionfile"
+
+	insert_copying_files "$romdir" || $err "!insert copy, handle 2, $romdir"
+	mkrom_tarball
+}
+
+nukerom()
+{
+	. "config/coreboot/${target}/target.cfg"
+
+	# Hash the images before removing vendor files
+	# which "./vendor inject" uses for verification
+	rm -f "${romdir}/vendorhashes" || $err "!rm ${romdir}/vendorhashes"
+	touch "${romdir}/vendorhashes" || $err "!touch ${romdir}/vendorhashes"
+	(
+	cd "${romdir}" || $err "!cd romdir ${romdir}, nukerom"
+	sha512sum ./*.rom >> vendorhashes || \
+	    $err "!create vendorhashes, nukerom"
+	) || $err "can't create vendor hashes"
+
+	for romfile in "${romdir}"/*.rom; do
+		[ -f "${romfile}" ] || continue
+		./vendor inject -r "$romfile" -b "$target" -n nuke || \
+		    $err "!vendor inject (nuke) ${romfile}, nukerom"
+	done
+}
+
+insert_copying_files()
+{
+	remkdir "${1}/licenses"
+	l="${1}/licenses"
+	# copy licenses to rom image archive, for completion
+	cp "src/grub/COPYING" "${l}/COPYING.grub" || return 1
+	cp "src/coreboot/default/COPYING" "${l}/COPYING.coreboot" || return 1
+	cp -R "src/coreboot/default/LICENSES" "${l}/LICENSES.coreboot" || \
+	    return 1
+	cp "src/seabios/default/COPYING" "${l}/COPYING.coreboot" || return 1
+	cp "src/seabios/default/COPYING.LESSER" "$l/COPYING.LESSER.seabios" \
+	    || return 1
+	cp -R "src/u-boot/default/Licenses" "${l}/COPYING.u-boot" || return 1
+	printf "Multiple licenses. Check corresponding %s source archive\n" \
+	    "${projectname}" > "${1}/COPYING" || return 1
+	rm -f src/u-boot/*/test/lib/strlcat.c || return 1
+}
+
+mkrom_tarball()
+{
+	archivename="${relname}_${target##*/}"
+	f="release/${version}/roms/${archivename}"
+	mkdir -p "${f%/*}" || $err "mkrom_tarball: !mkdir -p ${f%/*}"
+	(
+	cd "${romdir%"/bin/$target"}" || $err "!cd ${romdir%"/bin/$target"}"
+	mktarball "bin/${target}" "${archivename}.tar.xz"
+	) || $err "can't create rom tarball"
+	mv "${romdir%"/bin/${target}"}/${archivename}.tar.xz"* "${f%/*}" || \
+	    $err "mktar ${f%/*}/${romdir%"/bin/$target"}/$archivename.tar.xz"
+
+	printf "Created ROM archive: %s" "${f%/*}/${archivename}.tar.xz"
+}
+
+insert_version_files()
+{
+	printf "%s\n" "${version}" > "${1}/version" || return 1
+	printf "%s\n" "${versiondate}" > "${1}/versiondate" || return 1
+	printf "%s\n" "${projectname}" > "${1}/projectname" || return 1
+}
+
+mktarball()
+{
+	# preserve timestamps for reproducible tarballs
+	tar_implementation=$(tar --version | head -n1) || :
+
+	[ "${2%/*}" = "${2}" ] || \
+		mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
+	printf "\nCreating archive: %s\n\n" "$2"
+	if [ "${tar_implementation% *}" = "tar (GNU tar)" ]; then
+		tar --sort=name --owner=root:0 --group=root:0 \
+		    --mtime="UTC 2024-05-04" -c "$1" | xz -T$threads -9e \
+		    > "$2" || $err "mktarball 1, ${1}"
+	else
+		# TODO: reproducible tarballs on non-GNU systems
+		tar -c "$1" | xz -T$threads -9e > "$2" || \
+		    $err "mktarball 2, $1"
+	fi
+	(
+	[ "${2%/*}" != "${2}" ] && x_ cd "${2%/*}"
+	sha512sum "${2##*/}" > "${2##*/}.sha512" || \
+	    $err "!sha512sum \"${2##*/}\" > \"${2##*/}.sha512\""
+	) || $err "failed to create tarball checksum"
+}
+
 mkversion()
 {
 	printf "revision: %s %s\n" "$projectname" "$version"
diff --git a/script/update/release b/script/update/release
deleted file mode 100755
index c78b5fce..00000000
--- a/script/update/release
+++ /dev/null
@@ -1,236 +0,0 @@
-#!/usr/bin/env sh
-# SPDX-License-Identifier: MIT
-# SPDX-FileCopyrightText: 2020-2024 Leah Rowe <leah@libreboot.org>
-
-set -u -e
-
-. "include/option.sh"
-
-eval "$(setvars "" vdir relname src_dirname srcdir _xm target romdir mode)"
-
-export LBMK_RELEASE="y"
-export LBMK_STATUS="n"
-
-main()
-{
-	vdir="release"
-	while getopts d:m: option; do
-		[ -z "${OPTARG}" ] && $err "Empty argument not allowed"
-		case "${option}" in
-		d) vdir="${OPTARG}" ;;
-		m) mode="${OPTARG}" ;;
-		*) $err "Invalid option" ;;
-		esac
-	done
-
-	check_project
-
-	vdir="${vdir}/${version}"
-	relname="${projectname}-${version}"
-	[ "${mode}" = "u-boot" ] && relname="u-boot-for-${relname}"
-	src_dirname="${relname}_src"
-	srcdir="${vdir}/${src_dirname}"
-
-	[ -e "${vdir}" ] && $err "already exists: \"${vdir}\""
-
-	mkvdir
-	build_release
-
-	printf "DONE! Check release files under %s\n" "${vdir}"
-}
-
-mkvdir()
-{
-	mkdir -p "${vdir}" || $err "mkvdir: !mkdir -p \"${vdir}\""
-	git clone . "${srcdir}" || $err "mkdir: !gitclone \"${srcdir}\""
-	insert_version_files "$srcdir" || $err "mkvdir $srcdir: versionfile"
-}
-
-build_release()
-{
-	_xm="build_release ${vdir}"
-	(
-	cd "${srcdir}" || $err "${_xm}: !cd \"${srcdir}\""
-	fetch_trees
-	[ "${mode}" = "u-boot" ] || x_ mv src/docs docs
-	) || $err "can't create release files"
-
-	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
-	    --abbrev-commit > "${srcdir}/CHANGELOG" || \
-	    $err "build_release $srcdir: couldn't generate changelog"
-
-	(
-	if [ "${mode}" = "u-boot" ]; then
-		cd "${srcdir}/src/" || $err "${_xm}: mktarball \"${srcdir}\""
-		mktarball u-boot "../../${srcdir##*/}.tar.xz" || \
-		    $err "$_xm: mksrc"
-		# make a src archive containing only u-boot
-	else
-		cd "${srcdir%/*}" || $err "${_xm}: mktarball \"${srcdir}\""
-		mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || \
-		    $err "$_xm: mksrc"
-	fi
-	) || $err "can't create src tarball"
-	[ "${mode}" = "src" ] && return 0
-	[ "${mode}" = "u-boot" ] && return 0
-
-	(
-	cd "${srcdir}" || $err "${_xm}: 2 !cd \"${srcdir}\""
-	mkrom_images
-	) || $err "can't build rom images"
-
-	rm -Rf "${srcdir}" || $err "!rm -Rf ${srcdir}"
-}
-
-fetch_trees()
-{
-	for x in config/git/*; do
-		[ "${mode}" = "u-boot" ] && break
-		[ ! -f "${x}" ] || ./update trees -f "${x#config/git/}" || \
-		    $err "${_xm}: fetch ${x#config/git/}"
-	done
-	[ "${mode}" = "u-boot" ] && x_ ./update trees -f u-boot
-
-	for x in config/*/build.list; do
-		[ -f "${x}" ] || continue
-		xp="${x#*/}"; xp="${xp%/*}"
-		[ -L "${xp}" ] || rm -Rf "src/${xp}/${xp}" || \
-		    $err "!rm -Rf \"src/${xp}/${xp}\""
-	done
-
-	find . -name ".git" -exec rm -Rf {} + || $err "$_xm: rm .git"
-	find . -name ".gitmodules" -exec rm -Rf {} + || $err "$_xm: rm .gitmod"
-	x_ rm -Rf tmp .git
-}
-
-mkrom_images()
-{
-	./build roms all || $err "${_xm}: roms-all"
-	./build roms serprog rp2040 || $err "${_xm}: rp2040"
-	./build roms serprog stm32 || $err "${_xm}: stm32"
-
-	for rombuild in bin/*; do
-		[ -d "${rombuild}" ] || continue
-		handle_rom_archive "${rombuild}"
-	done
-
-	mv "release/${version}/roms/" ../roms || $err "${_xm}: copy roms/"
-}
-
-handle_rom_archive()
-{
-	builddir="${1}"
-	romdir="tmp/romdir"
-	rm -Rf "${romdir}" || $err "!rm romdir, handle_rom_archive"
-	target="${builddir##*/}"
-
-	if [ ! -f "config/coreboot/${target}/target.cfg" ]; then
-		# No config, just make a tarball
-		tarball="release/${version}/roms/${relname}_${target}.tar.xz"
-		insert_copying_files "${builddir}" || \
-		    $err "!insert copy, handle, ${builddir}"
-		mktarball "${builddir}" "${tarball}"
-		return 0
-	fi
-
-	romdir="${romdir}/bin/${target}"
-	mkdir -p "${romdir}" || $err "!mkdir -p romdir, handle_rom_archive"
-	cp "$builddir/"* "$romdir" || $err "!cp romdir, handle_rom_archive"
-
-	nukerom
-
-	printf "Generating release/%s/roms/%s-%s_%s.tar.xz\n" \
-	    "${version}" "${projectname}" "${version}" "${target##*/}"
-	insert_version_files "${romdir}" || \
-	    $err "mkrom_tarball ${romdir}: versionfile"
-
-	insert_copying_files "$romdir" || $err "!insert copy, handle 2, $romdir"
-	mkrom_tarball
-}
-
-nukerom()
-{
-	. "config/coreboot/${target}/target.cfg"
-
-	# Hash the images before removing vendor files
-	# which "./vendor inject" uses for verification
-	rm -f "${romdir}/vendorhashes" || $err "!rm ${romdir}/vendorhashes"
-	touch "${romdir}/vendorhashes" || $err "!touch ${romdir}/vendorhashes"
-	(
-	cd "${romdir}" || $err "!cd romdir ${romdir}, nukerom"
-	sha512sum ./*.rom >> vendorhashes || \
-	    $err "!create vendorhashes, nukerom"
-	) || $err "can't create vendor hashes"
-
-	for romfile in "${romdir}"/*.rom; do
-		[ -f "${romfile}" ] || continue
-		./vendor inject -r "$romfile" -b "$target" -n nuke || \
-		    $err "!vendor inject (nuke) ${romfile}, nukerom"
-	done
-}
-
-insert_copying_files()
-{
-	remkdir "${1}/licenses"
-	l="${1}/licenses"
-	# copy licenses to rom image archive, for completion
-	cp "src/grub/COPYING" "${l}/COPYING.grub" || return 1
-	cp "src/coreboot/default/COPYING" "${l}/COPYING.coreboot" || return 1
-	cp -R "src/coreboot/default/LICENSES" "${l}/LICENSES.coreboot" || \
-	    return 1
-	cp "src/seabios/default/COPYING" "${l}/COPYING.coreboot" || return 1
-	cp "src/seabios/default/COPYING.LESSER" "$l/COPYING.LESSER.seabios" \
-	    || return 1
-	cp -R "src/u-boot/default/Licenses" "${l}/COPYING.u-boot" || return 1
-	printf "Multiple licenses. Check corresponding %s source archive\n" \
-	    "${projectname}" > "${1}/COPYING" || return 1
-	rm -f src/u-boot/*/test/lib/strlcat.c || return 1
-}
-
-mkrom_tarball()
-{
-	archivename="${relname}_${target##*/}"
-	f="release/${version}/roms/${archivename}"
-	mkdir -p "${f%/*}" || $err "mkrom_tarball: !mkdir -p ${f%/*}"
-	(
-	cd "${romdir%"/bin/$target"}" || $err "!cd ${romdir%"/bin/$target"}"
-	mktarball "bin/${target}" "${archivename}.tar.xz"
-	) || $err "can't create rom tarball"
-	mv "${romdir%"/bin/${target}"}/${archivename}.tar.xz"* "${f%/*}" || \
-	    $err "mktar ${f%/*}/${romdir%"/bin/$target"}/$archivename.tar.xz"
-
-	printf "Created ROM archive: %s" "${f%/*}/${archivename}.tar.xz"
-}
-
-insert_version_files()
-{
-	printf "%s\n" "${version}" > "${1}/version" || return 1
-	printf "%s\n" "${versiondate}" > "${1}/versiondate" || return 1
-	printf "%s\n" "${projectname}" > "${1}/projectname" || return 1
-}
-
-mktarball()
-{
-	# preserve timestamps for reproducible tarballs
-	tar_implementation=$(tar --version | head -n1) || :
-
-	[ "${2%/*}" = "${2}" ] || \
-		mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
-	printf "\nCreating archive: %s\n\n" "$2"
-	if [ "${tar_implementation% *}" = "tar (GNU tar)" ]; then
-		tar --sort=name --owner=root:0 --group=root:0 \
-		    --mtime="UTC 2024-05-04" -c "$1" | xz -T$threads -9e \
-		    > "$2" || $err "mktarball 1, ${1}"
-	else
-		# TODO: reproducible tarballs on non-GNU systems
-		tar -c "$1" | xz -T$threads -9e > "$2" || \
-		    $err "mktarball 2, $1"
-	fi
-	(
-	[ "${2%/*}" != "${2}" ] && x_ cd "${2%/*}"
-	sha512sum "${2##*/}" > "${2##*/}.sha512" || \
-	    $err "!sha512sum \"${2##*/}\" > \"${2##*/}.sha512\""
-	) || $err "failed to create tarball checksum"
-}
-
-main $@

From c8fb24bb7bd0918c4c684c13a3b2946ba67439eb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 11 May 2024 05:17:41 +0100
Subject: [PATCH 0333/1549] build: print usage for special commands

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/build b/build
index 884d69de..3854f3e5 100755
--- a/build
+++ b/build
@@ -106,6 +106,11 @@ usage()
 	possible values for 'OPTION':
 	$(items "${buildpath}")
 
+	Special commands (consult $projectname documentation):
+	./update release
+	./build dependencies distroname
+	(replace distroname with a filename from config/dependencies/)
+
 	To know what ${projectname} version you're on, type:
 	${progname} version
 

From 029291e5495bf679cb36a7500b73ff9fa1dfff35 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 11 May 2024 05:33:43 +0100
Subject: [PATCH 0334/1549] merge script/vendor/* into include/vendor.sh

stub it from the main build script

the commands remain identical:
./vendor download arguments_here
./vendor inject arguments_here

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build                                       |   7 +
 script/vendor/download => include/vendor.sh | 235 ++++++++++++++++++-
 script/vendor/inject                        | 238 --------------------
 3 files changed, 231 insertions(+), 249 deletions(-)
 rename script/vendor/download => include/vendor.sh (56%)
 delete mode 100755 script/vendor/inject

diff --git a/build b/build
index 3854f3e5..60877d8e 100755
--- a/build
+++ b/build
@@ -13,6 +13,8 @@ if [ "./${0##*/}" != "${0}" ] || [ ! -f "build" ] || [ -L "build" ]; then
 fi
 
 . "include/option.sh"
+. "include/vendor.sh"
+. "include/mrc.sh"
 
 eval "$(setvars "" option aur_notice vdir relname src_dirname srcdir _xm \
     target romdir mode)"
@@ -46,10 +48,13 @@ initcmd()
 	list) items "${buildpath}" ;;
 	version) mkversion ;;
 	release) shift 1; mkrelease $@ ;;
+	inject) shift 1; vendor_inject $@ ;;
+	download) shift 1; vendor_download $@ ;;
 	*)
 		option="${1}"
 		return 0 ;;
 	esac
+	set -u -e # some commands disable them. turn them on!
 	lbmk_exit 0
 }
 
@@ -107,6 +112,8 @@ usage()
 	$(items "${buildpath}")
 
 	Special commands (consult $projectname documentation):
+	./vendor inject
+	./vendor download
 	./update release
 	./build dependencies distroname
 	(replace distroname with a filename from config/dependencies/)
diff --git a/script/vendor/download b/include/vendor.sh
similarity index 56%
rename from script/vendor/download
rename to include/vendor.sh
index 6f1fdbbf..a987c4aa 100755
--- a/script/vendor/download
+++ b/include/vendor.sh
@@ -1,14 +1,8 @@
-#!/usr/bin/env sh
 # SPDX-License-Identifier: GPL-3.0-only
 # SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 # SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
 # SPDX-FileCopyrightText: 2023-2024 Leah Rowe <leah@libreboot.org>
 
-. "include/option.sh"
-. "include/mrc.sh"
-
-export PATH="${PATH}:/sbin"
-
 _ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
 _7ztest="a"
 
@@ -16,14 +10,19 @@ e6400_unpack="${PWD}/src/bios_extract/dell_inspiron_1100_unpacker.py"
 me7updateparser="${PWD}/util/me7_update_parser/me7_update_parser.py"
 pfs_extract="${PWD}/src/biosutilities/Dell_PFS_Extract.py"
 uefiextract="${PWD}/src/uefitool/uefiextract"
+nvmutil="util/nvmutil/nvm"
 
 eval "$(setvars "" _b _dl EC_url EC_url_bkup EC_hash DL_hash DL_url DL_url_bkup \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
     E6400_VGA_romname SCH5545EC_DL_url SCH5545EC_DL_url_bkup SCH5545EC_DL_hash \
-    tree mecleaner kbc1126_ec_dump MRC_refcode_cbtree cbfstoolref MRC_refcode_gbe)"
+    tree mecleaner kbc1126_ec_dump MRC_refcode_cbtree MRC_refcode_gbe new_mac \
+    cbfstoolref release nukemode modifygbe rom archive)"
 
-main()
+vendor_download()
 {
+	set +u +e
+	export PATH="${PATH}:/sbin"
+
 	[ $# -gt 0 ] || $err "No argument given"
 	board="${1}"
 	boarddir="${cbcfgsdir}/${board}"
@@ -33,7 +32,7 @@ main()
 	detect_firmware && exit 0
 	scan_config "${_b}" "config/vendor"
 
-	build_dependencies
+	build_dependencies_download
 	download_vendorfiles
 }
 
@@ -48,6 +47,7 @@ detect_firmware()
 	set -- "${boarddir}/config/"*
 	. "${1}" 2>/dev/null
 	. "${boarddir}/target.cfg" 2>/dev/null
+
 	[ -z "$tree" ] && $err "detect_firmware $boarddir: tree undefined"
 	cbdir="src/coreboot/$tree"
 	cbfstool="cbutils/$tree/cbfstool"
@@ -62,7 +62,7 @@ detect_firmware()
 	printf "Vendor files not needed for: %s\n" "${board}" 1>&2
 }
 
-build_dependencies()
+build_dependencies_download()
 {
 	[ -d "${cbdir}" ] || x_ ./update trees -f coreboot ${cbdir##*/}
 	for d in uefitool biosutilities bios_extract; do
@@ -169,6 +169,7 @@ extract_intel_me()
 	[ -f "${_me}" ] && return 0
 
 	sdir="$(mktemp -d)"
+	[ -z "$sdir" ] && return 0
 	mkdir -p "$sdir" || $err "extract_intel_me: !mkdir -p \"$sdir\""
 	(
 	[ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
@@ -262,4 +263,216 @@ extract_sch5545ec()
 	    $err "extract_sch5545ec: cannot copy sch5545ec firmware file"
 }
 
-main $@
+vendor_inject()
+{
+	set +u +e
+
+	[ $# -lt 1 ] && $err "No options specified."
+	[ "${1}" = "listboards" ] && eval "items config/coreboot || :; exit 0"
+
+	archive="${1}"
+
+	while getopts n:r:b:m: option; do
+		case "${option}" in
+		n) nukemode="${OPTARG}" ;;
+		r) rom=${OPTARG} ;;
+		b) board=${OPTARG} ;;
+		m) modifygbe=true
+		   new_mac=${OPTARG} ;;
+		*) : ;;
+		esac
+	done
+
+	check_board
+	build_dependencies_inject
+	inject_vendorfiles
+	[ "${nukemode}" = "nuke" ] && return 0
+	printf "Friendly reminder (this is *not* an error message):\n"
+	printf "Please ensure that the files were inserted correctly.\n"
+}
+
+check_board()
+{
+	failcheck="n"
+	check_release "${archive}" || failcheck="y"
+	if [ "${failcheck}" = "y" ]; then
+		[ -f "$rom" ] || $err "check_board \"$rom\": invalid path"
+		[ -z "${rom+x}" ] && $err "check_board: no rom specified"
+		[ -n "${board+x}" ] || board=$(detect_board "${rom}")
+	else
+		release="y"
+		board=$(detect_board "${archive}")
+	fi
+
+	boarddir="${cbcfgsdir}/${board}"
+	[ -d "$boarddir" ] || $err "check_board: board $board missing"
+	[ -f "$boarddir/target.cfg" ] || \
+		$err "check_board $board: target.cfg missing"
+	. "$boarddir/target.cfg" 2>/dev/null
+	[ -z "$tree" ] && $err "check_board $board: tree undefined"; return 0
+}
+
+check_release()
+{
+	[ -f "${archive}" ] || return 1
+	[ "${archive##*.}" = "xz" ] || return 1
+	printf "%s\n" "Release archive ${archive} detected"
+}
+
+# This function tries to determine the board from the filename of the rom.
+# It will only succeed if the filename is not changed from the build/download
+detect_board()
+{
+	path="${1}"
+	filename=$(basename "${path}")
+	case ${filename} in
+	grub_*)
+		board=$(echo "${filename}" | cut -d '_' -f2-3) ;;
+	seabios_withgrub_*)
+		board=$(echo "${filename}" | cut -d '_' -f3-4) ;;
+	*.tar.xz)
+		_stripped_prefix=${filename#*_}
+		board="${_stripped_prefix%.tar.xz}" ;;
+	*)
+		$err "detect_board $filename: could not detect board type"
+	esac
+	printf "%s\n" "${board}"
+}
+
+build_dependencies_inject()
+{
+	cbdir="src/coreboot/$tree"
+	cbfstool="cbutils/$tree/cbfstool"
+	ifdtool="cbutils/$tree/ifdtool"
+	[ -d "${cbdir}" ] || x_ ./update trees -f coreboot $tree
+	if [ ! -f "${cbfstool}" ] || [ ! -f "${ifdtool}" ]; then
+		x_ ./update trees -b coreboot utils $tree
+	fi
+	[ -z "$new_mac" ] || [ -f "$nvmutil" ] || x_ make -C util/nvmutil
+	[ "$nukemode" = "nuke" ] || x_ ./vendor download $board; return 0
+}
+
+inject_vendorfiles()
+{
+	[ "${release}" != "y" ] && eval "patch_rom \"$rom\"; return 0"
+	patch_release_roms
+}
+
+patch_release_roms()
+{
+	_tmpdir="tmp/romdir"
+	remkdir "${_tmpdir}"
+	tar -xf "${archive}" -C "${_tmpdir}" || \
+	    $err "patch_release_roms: !tar -xf \"$archive\" -C \"$_tmpdir\""
+
+	for x in "${_tmpdir}"/bin/*/*.rom ; do
+		printf "patching rom: %s\n" "$x"
+		patch_rom "${x}"
+	done
+
+	(
+	cd "${_tmpdir}/bin/"* || \
+	    $err "patch_release_roms: !cd ${_tmpdir}/bin/*"
+
+	# NOTE: For compatibility with older rom releases, defer to sha1
+	[ "${nukemode}" = "nuke" ] || sha512sum --status -c vendorhashes || \
+	    sha1sum --status -c vendorhashes || sha512sum --status -c \
+	    blobhashes || sha1sum --status -c blobhashes || \
+	    $err "patch_release_roms: ROMs did not match expected hashes"
+	) || $err "can't verify vendor hashes"
+
+	[ "${modifygbe}" = "true" ] && \
+		for x in "${_tmpdir}"/bin/*/*.rom ; do
+			modify_gbe "${x}"
+		done
+
+	[ -d bin/release ] || x_ mkdir -p bin/release
+	x_ mv "${_tmpdir}"/bin/* bin/release/
+	x_ rm -Rf "${_tmpdir}"
+
+	printf "Success! Your ROMs are in bin/release\n"
+}
+
+patch_rom()
+{
+	rom="${1}"
+
+	check_defconfig "$boarddir" && $err "patch_rom $boarddir: no configs"
+
+	set -- "${boarddir}/config/"*
+	. "${1}" 2>/dev/null
+
+	[ "$CONFIG_HAVE_MRC" = "y" ] && \
+		inject "mrc.bin" "${CONFIG_MRC_FILE}" "mrc" "0xfffa0000"
+	[ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && \
+		inject "fallback/refcode" "$CONFIG_REFCODE_BLOB_FILE" "stage"
+	[ "${CONFIG_HAVE_ME_BIN}" = "y" ] && \
+		inject "IFD" "${CONFIG_ME_BIN_PATH}" "me"
+	[ "${CONFIG_KBC1126_FIRMWARE}" = "y" ] && \
+		inject "ecfw1.bin" "$CONFIG_KBC1126_FW1" "raw" \
+		    "${CONFIG_KBC1126_FW1_OFFSET}" && \
+		inject "ecfw2.bin" "$CONFIG_KBC1126_FW2" "raw" \
+		    "${CONFIG_KBC1126_FW2_OFFSET}"
+	[ -n "$CONFIG_VGA_BIOS_FILE" ] && [ -n "$CONFIG_VGA_BIOS_ID" ] && \
+		inject "pci${CONFIG_VGA_BIOS_ID}.rom" \
+		    "${CONFIG_VGA_BIOS_FILE}" "optionrom"
+	[ "${CONFIG_INCLUDE_SMSC_SCH5545_EC_FW}" = "y" ] && \
+	    [ -n "${CONFIG_SMSC_SCH5545_EC_FW_FILE}" ] && \
+		inject "sch5545_ecfw.bin" "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
+	[ "${modifygbe}" = "true" ] && ! [ "${release}" = "y" ] && \
+		inject "IFD" "${CONFIG_GBE_BIN_PATH}" "GbE"
+
+	printf "ROM image successfully patched: %s\n" "${rom}"
+}
+
+inject()
+{
+	[ $# -lt 3 ] && \
+		$err "inject $@, $rom: usage: inject name path type (offset)"
+
+	eval "$(setvars "" cbfsname _dest _t _offset)"
+	cbfsname="${1}"
+	_dest="${2##*../}"
+	_t="${3}"
+	[ $# -gt 3 ] && _offset="-b ${4}" && [ -z "${4}" ] && \
+	    $err "inject $@, $rom: offset passed, but empty (not defined)"
+
+	[ -z "${_dest}" ] && $err "inject $@, ${rom}: empty destination path"
+	[ ! -f "${_dest}" ] && [ "${nukemode}" != "nuke" ] && \
+		$err "inject_${dl_type}: file missing, ${_dest}"
+
+	[ "$nukemode" = "nuke" ] || \
+		printf "Inserting %s/%s in file: %s\n" "$cbfsname" "$_t" "$rom"
+
+	if [ "${_t}" = "GbE" ]; then
+		x_ mkdir -p tmp
+		cp "${_dest}" "tmp/gbe.bin" || \
+		    $err "inject: !cp \"${_dest}\" \"tmp/gbe.bin\""
+		_dest="tmp/gbe.bin"
+		"${nvmutil}" "${_dest}" setmac "${new_mac}" || \
+		    $err "inject ${_dest}: can't change mac address"
+	fi
+	if [ "${cbfsname}" = "IFD" ]; then
+		if [ "${nukemode}" != "nuke" ]; then
+			"$ifdtool" -i ${_t}:${_dest} "$rom" -O "$rom" || \
+			    $err "inject: can't insert $_t ($dest) into $rom"
+		else
+			"$ifdtool" --nuke $_t "$rom" -O "$rom" || \
+			    $err "inject $rom: can't nuke $_t in IFD"
+		fi
+	else
+		if [ "${nukemode}" != "nuke" ]; then
+			if [ "$_t" = "stage" ]; then # broadwell refcode
+				"$cbfstool" "$rom" add-stage -f "$_dest" \
+				    -n "$cbfsname" -t stage -c lzma
+			else
+				"$cbfstool" "$rom" add -f "$_dest" \
+				    -n "$cbfsname" -t $_t $_offset || \
+				    $err "$rom: can't insert $_t file $_dest"
+			fi
+		else
+			"$cbfstool" "$rom" remove -n "$cbfsname" || \
+			    $err "inject $rom: can't remove $cbfsname"
+		fi
+	fi
+}
diff --git a/script/vendor/inject b/script/vendor/inject
deleted file mode 100755
index 9b6b52ea..00000000
--- a/script/vendor/inject
+++ /dev/null
@@ -1,238 +0,0 @@
-#!/usr/bin/env sh
-# SPDX-License-Identifier: GPL-3.0-only
-# SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
-# SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# SPDX-FileCopyrightText: 2023-2024 Leah Rowe <leah@libreboot.org>
-
-. "include/option.sh"
-
-nvmutil="util/nvmutil/nvm"
-
-eval "$(setvars "" archive rom modifygbe nukemode release new_mac tree)"
-
-main()
-{
-	[ $# -lt 1 ] && $err "No options specified."
-	[ "${1}" = "listboards" ] && eval "items config/coreboot || :; exit 0"
-
-	archive="${1}"
-
-	while getopts n:r:b:m: option; do
-		case "${option}" in
-		n) nukemode="${OPTARG}" ;;
-		r) rom=${OPTARG} ;;
-		b) board=${OPTARG} ;;
-		m) modifygbe=true
-		   new_mac=${OPTARG} ;;
-		*) : ;;
-		esac
-	done
-
-	check_board
-	build_dependencies
-	inject_vendorfiles
-	[ "${nukemode}" = "nuke" ] && return 0
-	printf "Friendly reminder (this is *not* an error message):\n"
-	printf "Please ensure that the files were inserted correctly.\n"
-}
-
-check_board()
-{
-	failcheck="n"
-	check_release "${archive}" || failcheck="y"
-	if [ "${failcheck}" = "y" ]; then
-		[ -f "$rom" ] || $err "check_board \"$rom\": invalid path"
-		[ -z "${rom+x}" ] && $err "check_board: no rom specified"
-		[ -n "${board+x}" ] || board=$(detect_board "${rom}")
-	else
-		release="y"
-		board=$(detect_board "${archive}")
-	fi
-
-	boarddir="${cbcfgsdir}/${board}"
-	[ -d "$boarddir" ] || $err "check_board: board $board missing"
-	[ -f "$boarddir/target.cfg" ] || \
-		$err "check_board $board: target.cfg missing"
-	. "$boarddir/target.cfg" 2>/dev/null
-	[ -z "$tree" ] && $err "check_board $board: tree undefined"; return 0
-}
-
-check_release()
-{
-	[ -f "${archive}" ] || return 1
-	[ "${archive##*.}" = "xz" ] || return 1
-	printf "%s\n" "Release archive ${archive} detected"
-}
-
-# This function tries to determine the board from the filename of the rom.
-# It will only succeed if the filename is not changed from the build/download
-detect_board()
-{
-	path="${1}"
-	filename=$(basename "${path}")
-	case ${filename} in
-	grub_*)
-		board=$(echo "${filename}" | cut -d '_' -f2-3) ;;
-	seabios_withgrub_*)
-		board=$(echo "${filename}" | cut -d '_' -f3-4) ;;
-	*.tar.xz)
-		_stripped_prefix=${filename#*_}
-		board="${_stripped_prefix%.tar.xz}" ;;
-	*)
-		$err "detect_board $filename: could not detect board type"
-	esac	
-	printf "%s\n" "${board}"
-}
-
-build_dependencies()
-{
-	cbdir="src/coreboot/$tree"
-	cbfstool="cbutils/$tree/cbfstool"
-	ifdtool="cbutils/$tree/ifdtool"
-	[ -d "${cbdir}" ] || x_ ./update trees -f coreboot $tree
-	if [ ! -f "${cbfstool}" ] || [ ! -f "${ifdtool}" ]; then
-		x_ ./update trees -b coreboot utils $tree
-	fi
-	[ -z "$new_mac" ] || [ -f "$nvmutil" ] || x_ make -C util/nvmutil
-	[ "$nukemode" = "nuke" ] || x_ ./vendor download $board; return 0
-}
-
-inject_vendorfiles()
-{
-	[ "${release}" != "y" ] && eval "patch_rom \"$rom\"; return 0"
-	patch_release_roms
-}
-
-patch_release_roms()
-{
-	_tmpdir="tmp/romdir"
-	remkdir "${_tmpdir}"
-	tar -xf "${archive}" -C "${_tmpdir}" || \
-	    $err "patch_release_roms: !tar -xf \"$archive\" -C \"$_tmpdir\""
-
-	for x in "${_tmpdir}"/bin/*/*.rom ; do
-		printf "patching rom: %s\n" "$x"
-		patch_rom "${x}"
-	done
-
-	(
-	cd "${_tmpdir}/bin/"* || \
-	    $err "patch_release_roms: !cd ${_tmpdir}/bin/*"
-
-	# NOTE: For compatibility with older rom releases, defer to sha1
-	[ "${nukemode}" = "nuke" ] || sha512sum --status -c vendorhashes || \
-	    sha1sum --status -c vendorhashes || sha512sum --status -c \
-	    blobhashes || sha1sum --status -c blobhashes || \
-	    $err "patch_release_roms: ROMs did not match expected hashes"
-	) || $err "can't verify vendor hashes"
-
-	[ "${modifygbe}" = "true" ] && \
-		for x in "${_tmpdir}"/bin/*/*.rom ; do
-			modify_gbe "${x}"
-		done
-
-	[ -d bin/release ] || x_ mkdir -p bin/release
-	x_ mv "${_tmpdir}"/bin/* bin/release/
-	x_ rm -Rf "${_tmpdir}"
-
-	printf "Success! Your ROMs are in bin/release\n"
-}
-
-patch_rom()
-{
-	rom="${1}"
-
-	check_defconfig "$boarddir" && $err "patch_rom $boarddir: no configs"
-
-	set -- "${boarddir}/config/"*
-	. "${1}" 2>/dev/null
-
-	[ "$CONFIG_HAVE_MRC" = "y" ] && \
-		inject "mrc.bin" "${CONFIG_MRC_FILE}" "mrc" "0xfffa0000"
-	[ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && \
-		inject "fallback/refcode" "$CONFIG_REFCODE_BLOB_FILE" "stage"
-	[ "${CONFIG_HAVE_ME_BIN}" = "y" ] && \
-		inject "IFD" "${CONFIG_ME_BIN_PATH}" "me"
-	[ "${CONFIG_KBC1126_FIRMWARE}" = "y" ] && \
-		inject "ecfw1.bin" "$CONFIG_KBC1126_FW1" "raw" \
-		    "${CONFIG_KBC1126_FW1_OFFSET}" && \
-		inject "ecfw2.bin" "$CONFIG_KBC1126_FW2" "raw" \
-		    "${CONFIG_KBC1126_FW2_OFFSET}"
-	[ -n "$CONFIG_VGA_BIOS_FILE" ] && [ -n "$CONFIG_VGA_BIOS_ID" ] && \
-		inject "pci${CONFIG_VGA_BIOS_ID}.rom" \
-		    "${CONFIG_VGA_BIOS_FILE}" "optionrom"
-	[ "${CONFIG_INCLUDE_SMSC_SCH5545_EC_FW}" = "y" ] && \
-	    [ -n "${CONFIG_SMSC_SCH5545_EC_FW_FILE}" ] && \
-		inject "sch5545_ecfw.bin" "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
-	[ "${modifygbe}" = "true" ] && ! [ "${release}" = "y" ] && \
-		inject "IFD" "${CONFIG_GBE_BIN_PATH}" "GbE"
-
-	printf "ROM image successfully patched: %s\n" "${rom}"
-}
-
-inject()
-{
-	[ $# -lt 3 ] && \
-		$err "inject $@, $rom: usage: inject name path type (offset)"
-
-	eval "$(setvars "" cbfsname _dest _t _offset)"
-	cbfsname="${1}"
-	_dest="${2##*../}"
-	_t="${3}"
-	[ $# -gt 3 ] && _offset="-b ${4}" && [ -z "${4}" ] && \
-	    $err "inject $@, $rom: offset passed, but empty (not defined)"
-
-	[ -z "${_dest}" ] && $err "inject $@, ${rom}: empty destination path"
-	[ ! -f "${_dest}" ] && [ "${nukemode}" != "nuke" ] && \
-		$err "inject_${dl_type}: file missing, ${_dest}"
-
-	[ "$nukemode" = "nuke" ] || \
-		printf "Inserting %s/%s in file: %s\n" "$cbfsname" "$_t" "$rom"
-
-	if [ "${_t}" = "GbE" ]; then
-		x_ mkdir -p tmp
-		cp "${_dest}" "tmp/gbe.bin" || \
-		    $err "inject: !cp \"${_dest}\" \"tmp/gbe.bin\""
-		_dest="tmp/gbe.bin"
-		"${nvmutil}" "${_dest}" setmac "${new_mac}" || \
-		    $err "inject ${_dest}: can't change mac address"
-	fi
-	if [ "${cbfsname}" = "IFD" ]; then
-		if [ "${nukemode}" != "nuke" ]; then
-			"$ifdtool" -i ${_t}:${_dest} "$rom" -O "$rom" || \
-			    $err "inject: can't insert $_t ($dest) into $rom"
-		else
-			"$ifdtool" --nuke $_t "$rom" -O "$rom" || \
-			    $err "inject $rom: can't nuke $_t in IFD"
-		fi
-	else
-		if [ "${nukemode}" != "nuke" ]; then
-			if [ "$_t" = "stage" ]; then # broadwell refcode
-				"$cbfstool" "$rom" add-stage -f "$_dest" \
-				    -n "$cbfsname" -t stage -c lzma
-			else
-				"$cbfstool" "$rom" add -f "$_dest" \
-				    -n "$cbfsname" -t $_t $_offset || \
-				    $err "$rom: can't insert $_t file $_dest"
-			fi
-		else
-			"$cbfstool" "$rom" remove -n "$cbfsname" || \
-			    $err "inject $rom: can't remove $cbfsname"
-		fi
-	fi
-}
-
-usage()
-{
-	cat <<- EOF
-	USAGE: ./vendor inject -r [rom path] -b [boardname] -m [macaddress]
-	Example: ./vendor inject -r x230_12mb.rom -b x230_12mb
-
-	Adding a macadress to the gbe is optional.
-	If the [-m] parameter is left blank, the gbe will not be touched.
-
-	Type './vendor inject listboards' to get a list of valid boards
-	EOF
-}
-
-main $@

From d7ce26dc23ccd797bd4cb904c378ee6dc701f42b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 11 May 2024 06:22:56 +0100
Subject: [PATCH 0335/1549] move script/*/* to script/

there are only two scripts under script/ now, and there
probably won't be many more. lbmk's design has simplified
to such a degree that the two-level directory structure is
no longer necessary.

the existing command structure has not changed. for example:

./build roms list
./update trees -f coreboot default

these will still work, but the symlinks to "build" are now
strictly for backwards compatibility; they may be removed
at a later date, but i'll keep the current design for now.

this also leads to a quirk, for example:

./build roms all
./update roms all

these now do the exact same thing, whereas "./update roms all"
would have previously been an invalid command.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build                     | 16 +++++++---------
 script/{build => }/roms   |  0
 script/{update => }/trees |  0
 3 files changed, 7 insertions(+), 9 deletions(-)
 rename script/{build => }/roms (100%)
 rename script/{update => }/trees (100%)

diff --git a/build b/build
index 60877d8e..71620308 100755
--- a/build
+++ b/build
@@ -16,13 +16,12 @@ fi
 . "include/vendor.sh"
 . "include/mrc.sh"
 
-eval "$(setvars "" option aur_notice vdir relname src_dirname srcdir _xm \
-    target romdir mode)"
+eval "$(setvars "" script_path aur_notice vdir relname src_dirname srcdir \
+    _xm target romdir mode)"
 err="fail"
 
 linkpath="${0}"
 linkname="${linkpath##*/}"
-buildpath="./script/${linkname}"
 
 main()
 {
@@ -45,13 +44,13 @@ initcmd()
 
 	case "${1}" in
 	help) usage ${0} ;;
-	list) items "${buildpath}" ;;
+	list) items "script" ;;
 	version) mkversion ;;
 	release) shift 1; mkrelease $@ ;;
 	inject) shift 1; vendor_inject $@ ;;
 	download) shift 1; vendor_download $@ ;;
 	*)
-		option="${1}"
+		script_path="script/${1}"
 		return 0 ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
@@ -95,9 +94,8 @@ git_init()
 
 excmd()
 {
-	lbmkcmd="${buildpath}/${option}"
-	[ -f "${lbmkcmd}" ] || $err "Invalid command. Run: ${linkpath} help"
-	shift 1; "$lbmkcmd" $@ || $err "excmd: ${lbmkcmd} ${@}"
+	[ -f "${script_path}" ] || $err "Bad command. Run: ${linkpath} help"
+	shift 1; "$script_path" $@ || $err "excmd: ${script_path} ${@}"
 }
 
 usage()
@@ -109,7 +107,7 @@ usage()
 	USAGE:	${progname} <OPTION>
 
 	possible values for 'OPTION':
-	$(items "${buildpath}")
+	$(items "script")
 
 	Special commands (consult $projectname documentation):
 	./vendor inject
diff --git a/script/build/roms b/script/roms
similarity index 100%
rename from script/build/roms
rename to script/roms
diff --git a/script/update/trees b/script/trees
similarity index 100%
rename from script/update/trees
rename to script/trees

From 8ba0fd834ddd6269c0cc286e298c5bf864adb0ca Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 11 May 2024 07:01:39 +0100
Subject: [PATCH 0336/1549] git.sh: remove errant comment

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 5c456706..04143540 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -2,8 +2,6 @@
 # SPDX-FileCopyrightText: 2020,2021,2023,2024 Leah Rowe <leah@libreboot.org>
 # SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
-# This file is only used by update/project/trees
-
 eval "$(setvars "" _target rev _xm loc url bkup_url depend tree_depend xtree)"
 
 fetch_project_trees()

From 05fbd392982344cf8f6743a59ba3817ab2771704 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 11 May 2024 18:53:12 +0100
Subject: [PATCH 0337/1549] remove all status checks. only handle release.

the release variable is all we need, turning a target on
or off for a given release.

the status checks were prone to bugs, and unnecessary; it
also broke certain benchmark scripts.

it's better to keep the lbmk logic simpler. board status
will be moved to the documentation instead.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build                                         |  1 -
 config/coreboot/d510mo/target.cfg             |  1 -
 config/coreboot/d510mo/warn.txt               |  1 -
 config/coreboot/d510mo_16mb/target.cfg        |  1 -
 config/coreboot/d510mo_16mb/warn.txt          |  1 -
 config/coreboot/d945gclf_512kb/target.cfg     |  1 -
 config/coreboot/d945gclf_512kb/warn.txt       |  1 -
 config/coreboot/d945gclf_8mb/target.cfg       |  1 -
 config/coreboot/d945gclf_8mb/warn.txt         |  1 -
 .../coreboot/dell9020mt-nri_12mb/target.cfg   |  1 -
 config/coreboot/dell9020mt-nri_12mb/warn.txt  |  1 -
 config/coreboot/dell9020mt_12mb/target.cfg    |  1 -
 config/coreboot/dell9020mt_12mb/warn.txt      | 10 ---
 .../coreboot/dell9020mtbmrc_12mb/target.cfg   |  1 -
 config/coreboot/dell9020mtbmrc_12mb/warn.txt  | 10 ---
 .../coreboot/dell9020sff-nri_12mb/target.cfg  |  1 -
 config/coreboot/dell9020sff-nri_12mb/warn.txt |  1 -
 config/coreboot/dell9020sff_12mb/target.cfg   |  1 -
 config/coreboot/dell9020sff_12mb/warn.txt     | 10 ---
 .../coreboot/dell9020sffbmrc_12mb/target.cfg  |  1 -
 config/coreboot/dell9020sffbmrc_12mb/warn.txt | 10 ---
 config/coreboot/e5420_6mb/target.cfg          |  1 -
 config/coreboot/e5420_6mb/warn.txt            |  1 -
 config/coreboot/e5520_6mb/target.cfg          |  1 -
 config/coreboot/e5520_6mb/warn.txt            |  1 -
 config/coreboot/e5530_12mb/target.cfg         |  1 -
 config/coreboot/e5530_12mb/warn.txt           |  1 -
 config/coreboot/e6400_4mb/target.cfg          |  1 -
 config/coreboot/e6400_4mb/warn.txt            |  3 -
 config/coreboot/e6400nvidia_4mb/target.cfg    |  1 -
 config/coreboot/e6400nvidia_4mb/warn.txt      |  3 -
 config/coreboot/e6420_10mb/target.cfg         |  1 -
 config/coreboot/e6420_10mb/warn.txt           |  1 -
 config/coreboot/e6430_12mb/target.cfg         |  1 -
 config/coreboot/e6430_12mb/warn.txt           |  1 -
 config/coreboot/e6520_10mb/target.cfg         |  1 -
 config/coreboot/e6520_10mb/warn.txt           |  1 -
 config/coreboot/e6530_12mb/target.cfg         |  1 -
 config/coreboot/e6530_12mb/warn.txt           |  1 -
 config/coreboot/g43t-am3/target.cfg           |  1 -
 config/coreboot/g43t-am3_16mb/target.cfg      |  1 -
 config/coreboot/ga-g41m-es2l/target.cfg       |  1 -
 config/coreboot/gru_bob/target.cfg            |  1 -
 config/coreboot/gru_bob/warn.txt              |  1 -
 config/coreboot/gru_kevin/target.cfg          |  1 -
 config/coreboot/gru_kevin/warn.txt            |  1 -
 config/coreboot/hp2170p_16mb/target.cfg       |  1 -
 config/coreboot/hp2560p_8mb/target.cfg        |  1 -
 config/coreboot/hp2570p_16mb/target.cfg       |  1 -
 config/coreboot/hp8200sff_4mb/target.cfg      |  1 -
 config/coreboot/hp8200sff_8mb/target.cfg      |  1 -
 config/coreboot/hp820g2_12mb/target.cfg       |  1 -
 config/coreboot/hp8300cmt_16mb/target.cfg     |  1 -
 config/coreboot/hp8300usdt_16mb/target.cfg    |  1 -
 config/coreboot/hp8460pintel_8mb/target.cfg   |  1 -
 config/coreboot/hp8470pintel_16mb/target.cfg  |  1 -
 config/coreboot/hp8560w_8mb/target.cfg        |  1 -
 config/coreboot/hp9470m_16mb/target.cfg       |  1 -
 config/coreboot/kcma-d8-rdimm_16mb/target.cfg |  1 -
 config/coreboot/kcma-d8-rdimm_16mb/warn.txt   |  1 -
 config/coreboot/kcma-d8-rdimm_2mb/target.cfg  |  1 -
 config/coreboot/kcma-d8-rdimm_2mb/warn.txt    |  1 -
 config/coreboot/kcma-d8-udimm_16mb/target.cfg |  1 -
 config/coreboot/kcma-d8-udimm_16mb/warn.txt   |  1 -
 config/coreboot/kcma-d8-udimm_2mb/target.cfg  |  1 -
 config/coreboot/kcma-d8-udimm_2mb/warn.txt    |  1 -
 config/coreboot/kfsn4-dre_1mb/target.cfg      |  1 -
 config/coreboot/kfsn4-dre_2mb/target.cfg      |  1 -
 .../coreboot/kgpe-d16-rdimm_16mb/target.cfg   |  1 -
 config/coreboot/kgpe-d16-rdimm_16mb/warn.txt  |  1 -
 config/coreboot/kgpe-d16-rdimm_2mb/target.cfg |  1 -
 config/coreboot/kgpe-d16-rdimm_2mb/warn.txt   |  1 -
 .../coreboot/kgpe-d16-udimm_16mb/target.cfg   |  1 -
 config/coreboot/kgpe-d16-udimm_16mb/warn.txt  |  1 -
 config/coreboot/kgpe-d16-udimm_2mb/target.cfg |  1 -
 config/coreboot/kgpe-d16-udimm_2mb/warn.txt   |  1 -
 config/coreboot/macbook11/target.cfg          |  1 -
 config/coreboot/macbook11_16mb/target.cfg     |  1 -
 config/coreboot/macbook21/target.cfg          |  1 -
 config/coreboot/macbook21_16mb/target.cfg     |  1 -
 config/coreboot/qemu_arm64_12mb/target.cfg    |  1 -
 config/coreboot/qemu_x86_12mb/target.cfg      |  1 -
 config/coreboot/r400_16mb/target.cfg          |  1 -
 config/coreboot/r400_4mb/target.cfg           |  1 -
 config/coreboot/r400_8mb/target.cfg           |  1 -
 config/coreboot/r500_4mb/target.cfg           |  1 -
 config/coreboot/t1650_12mb/target.cfg         |  1 -
 config/coreboot/t400_16mb/target.cfg          |  1 -
 config/coreboot/t400_4mb/target.cfg           |  1 -
 config/coreboot/t400_8mb/target.cfg           |  1 -
 config/coreboot/t420_8mb/target.cfg           |  1 -
 config/coreboot/t420s_8mb/target.cfg          |  1 -
 config/coreboot/t430_12mb/target.cfg          |  1 -
 config/coreboot/t440pbmrc_12mb/target.cfg     |  1 -
 config/coreboot/t440plibremrc_12mb/target.cfg |  1 -
 config/coreboot/t440pmrc_12mb/target.cfg      |  1 -
 config/coreboot/t500_16mb/target.cfg          |  1 -
 config/coreboot/t500_4mb/target.cfg           |  1 -
 config/coreboot/t500_8mb/target.cfg           |  1 -
 config/coreboot/t520_8mb/target.cfg           |  1 -
 config/coreboot/t530_12mb/target.cfg          |  1 -
 config/coreboot/t60_16mb_intelgpu/target.cfg  |  1 -
 config/coreboot/t60_intelgpu/target.cfg       |  1 -
 config/coreboot/w500_16mb/target.cfg          |  1 -
 config/coreboot/w500_4mb/target.cfg           |  1 -
 config/coreboot/w500_8mb/target.cfg           |  1 -
 config/coreboot/w530_12mb/target.cfg          |  1 -
 config/coreboot/w541_12mb/target.cfg          |  1 -
 config/coreboot/w541bmrc_12mb/target.cfg      |  1 -
 config/coreboot/w541mrc_12mb/target.cfg       |  1 -
 config/coreboot/x200_16mb/target.cfg          |  1 -
 config/coreboot/x200_4mb/target.cfg           |  1 -
 config/coreboot/x200_8mb/target.cfg           |  1 -
 config/coreboot/x220_8mb/target.cfg           |  1 -
 config/coreboot/x230_12mb/target.cfg          |  1 -
 config/coreboot/x230_12mb/warn.txt            |  1 -
 config/coreboot/x230_16mb/target.cfg          |  1 -
 config/coreboot/x230t_12mb/target.cfg         |  1 -
 config/coreboot/x230t_16mb/target.cfg         |  1 -
 config/coreboot/x301_16mb/target.cfg          |  1 -
 config/coreboot/x301_4mb/target.cfg           |  1 -
 config/coreboot/x301_8mb/target.cfg           |  1 -
 config/coreboot/x60/target.cfg                |  1 -
 config/coreboot/x60_16mb/target.cfg           |  1 -
 include/option.sh                             | 16 +---
 script/roms                                   | 88 ++-----------------
 126 files changed, 11 insertions(+), 257 deletions(-)
 delete mode 100644 config/coreboot/d510mo/warn.txt
 delete mode 100644 config/coreboot/d510mo_16mb/warn.txt
 delete mode 100644 config/coreboot/d945gclf_512kb/warn.txt
 delete mode 100644 config/coreboot/d945gclf_8mb/warn.txt
 delete mode 100644 config/coreboot/dell9020mt-nri_12mb/warn.txt
 delete mode 100644 config/coreboot/dell9020mt_12mb/warn.txt
 delete mode 100644 config/coreboot/dell9020mtbmrc_12mb/warn.txt
 delete mode 100644 config/coreboot/dell9020sff-nri_12mb/warn.txt
 delete mode 100644 config/coreboot/dell9020sff_12mb/warn.txt
 delete mode 100644 config/coreboot/dell9020sffbmrc_12mb/warn.txt
 delete mode 100644 config/coreboot/e5420_6mb/warn.txt
 delete mode 100644 config/coreboot/e5520_6mb/warn.txt
 delete mode 100644 config/coreboot/e5530_12mb/warn.txt
 delete mode 100644 config/coreboot/e6400_4mb/warn.txt
 delete mode 100644 config/coreboot/e6400nvidia_4mb/warn.txt
 delete mode 100644 config/coreboot/e6420_10mb/warn.txt
 delete mode 100644 config/coreboot/e6430_12mb/warn.txt
 delete mode 100644 config/coreboot/e6520_10mb/warn.txt
 delete mode 100644 config/coreboot/e6530_12mb/warn.txt
 delete mode 100644 config/coreboot/gru_bob/warn.txt
 delete mode 100644 config/coreboot/gru_kevin/warn.txt
 delete mode 100644 config/coreboot/kcma-d8-rdimm_16mb/warn.txt
 delete mode 100644 config/coreboot/kcma-d8-rdimm_2mb/warn.txt
 delete mode 100644 config/coreboot/kcma-d8-udimm_16mb/warn.txt
 delete mode 100644 config/coreboot/kcma-d8-udimm_2mb/warn.txt
 delete mode 100644 config/coreboot/kgpe-d16-rdimm_16mb/warn.txt
 delete mode 100644 config/coreboot/kgpe-d16-rdimm_2mb/warn.txt
 delete mode 100644 config/coreboot/kgpe-d16-udimm_16mb/warn.txt
 delete mode 100644 config/coreboot/kgpe-d16-udimm_2mb/warn.txt
 delete mode 100644 config/coreboot/x230_12mb/warn.txt

diff --git a/build b/build
index 71620308..27989990 100755
--- a/build
+++ b/build
@@ -126,7 +126,6 @@ usage()
 mkrelease()
 {
 	export LBMK_RELEASE="y"
-	export LBMK_STATUS="n"
 
 	vdir="release"
 	while getopts d:m: option; do
diff --git a/config/coreboot/d510mo/target.cfg b/config/coreboot/d510mo/target.cfg
index 5c15f467..65330b75 100644
--- a/config/coreboot/d510mo/target.cfg
+++ b/config/coreboot/d510mo/target.cfg
@@ -4,5 +4,4 @@ payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="y"
-status="untested"
 release="n"
diff --git a/config/coreboot/d510mo/warn.txt b/config/coreboot/d510mo/warn.txt
deleted file mode 100644
index 7e2498a1..00000000
--- a/config/coreboot/d510mo/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-this board has never been stable, and has not been tested in Libreboot 20240504 so no ROM images included for it in that release
diff --git a/config/coreboot/d510mo_16mb/target.cfg b/config/coreboot/d510mo_16mb/target.cfg
index 82e52183..ef75af4a 100644
--- a/config/coreboot/d510mo_16mb/target.cfg
+++ b/config/coreboot/d510mo_16mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-status="untested"
 release="n"
diff --git a/config/coreboot/d510mo_16mb/warn.txt b/config/coreboot/d510mo_16mb/warn.txt
deleted file mode 100644
index 7e2498a1..00000000
--- a/config/coreboot/d510mo_16mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-this board has never been stable, and has not been tested in Libreboot 20240504 so no ROM images included for it in that release
diff --git a/config/coreboot/d945gclf_512kb/target.cfg b/config/coreboot/d945gclf_512kb/target.cfg
index 2c2cf673..5843b4e7 100644
--- a/config/coreboot/d945gclf_512kb/target.cfg
+++ b/config/coreboot/d945gclf_512kb/target.cfg
@@ -4,5 +4,4 @@ payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="n"
-status="untested"
 release="n"
diff --git a/config/coreboot/d945gclf_512kb/warn.txt b/config/coreboot/d945gclf_512kb/warn.txt
deleted file mode 100644
index 7e2498a1..00000000
--- a/config/coreboot/d945gclf_512kb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-this board has never been stable, and has not been tested in Libreboot 20240504 so no ROM images included for it in that release
diff --git a/config/coreboot/d945gclf_8mb/target.cfg b/config/coreboot/d945gclf_8mb/target.cfg
index 2c2cf673..5843b4e7 100644
--- a/config/coreboot/d945gclf_8mb/target.cfg
+++ b/config/coreboot/d945gclf_8mb/target.cfg
@@ -4,5 +4,4 @@ payload_grub="n"
 payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="n"
-status="untested"
 release="n"
diff --git a/config/coreboot/d945gclf_8mb/warn.txt b/config/coreboot/d945gclf_8mb/warn.txt
deleted file mode 100644
index 7e2498a1..00000000
--- a/config/coreboot/d945gclf_8mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-this board has never been stable, and has not been tested in Libreboot 20240504 so no ROM images included for it in that release
diff --git a/config/coreboot/dell9020mt-nri_12mb/target.cfg b/config/coreboot/dell9020mt-nri_12mb/target.cfg
index bc4053d4..37d8f553 100644
--- a/config/coreboot/dell9020mt-nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt-nri_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/dell9020mt-nri_12mb/warn.txt b/config/coreboot/dell9020mt-nri_12mb/warn.txt
deleted file mode 100644
index fe1aa7f9..00000000
--- a/config/coreboot/dell9020mt-nri_12mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Completely stable with graphics, but IOMMU disabled by default; graphics cards only work with IOMMU turned off. Intel graphics works fine with IOMMU turned on. IOMMU is needed for Qubes to work properly. To turn on IOMMU, do this to your ROM before flashing (ONLY do this if using Intel graphics): ./nvramtool -C libreboot.rom -w iommu=Enable
diff --git a/config/coreboot/dell9020mt_12mb/target.cfg b/config/coreboot/dell9020mt_12mb/target.cfg
index 0141f142..0da057a9 100644
--- a/config/coreboot/dell9020mt_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_12mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="deprecated"
diff --git a/config/coreboot/dell9020mt_12mb/warn.txt b/config/coreboot/dell9020mt_12mb/warn.txt
deleted file mode 100644
index 6c262da4..00000000
--- a/config/coreboot/dell9020mt_12mb/warn.txt
+++ /dev/null
@@ -1,10 +0,0 @@
-Completely stable with graphics, but IOMMU disabled by default; graphics cards only work with IOMMU turned off. Intel graphics works fine with IOMMU turned on. IOMMU is needed for Qubes to work properly. To turn on IOMMU, do this to your ROM before flashing (ONLY do this if using Intel graphics): ./nvramtool -C libreboot.rom -w iommu=Enable
-
-*This* target uses Intel MRC (a binary blob) for memory controller initialisation.
-If you want *libre* initialisation (recommended), use the *nri* targets instead,
-e.g. dell9020sff-nri_12mb or dell9020mt-nri_12mb
-
-These MRC-based targets will be *removed* in a future Libreboot release. It is
-strongly recommended that you use the NRI-based targets (Native RAM initialisation).
-
-This version uses Haswell MRC, which is compatible with the machine.
diff --git a/config/coreboot/dell9020mtbmrc_12mb/target.cfg b/config/coreboot/dell9020mtbmrc_12mb/target.cfg
index 0141f142..0da057a9 100644
--- a/config/coreboot/dell9020mtbmrc_12mb/target.cfg
+++ b/config/coreboot/dell9020mtbmrc_12mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="deprecated"
diff --git a/config/coreboot/dell9020mtbmrc_12mb/warn.txt b/config/coreboot/dell9020mtbmrc_12mb/warn.txt
deleted file mode 100644
index 21be619a..00000000
--- a/config/coreboot/dell9020mtbmrc_12mb/warn.txt
+++ /dev/null
@@ -1,10 +0,0 @@
-Completely stable with graphics, but IOMMU disabled by default; graphics cards only work with IOMMU turned off. Intel graphics works fine with IOMMU turned on. IOMMU is needed for Qubes to work properly. To turn on IOMMU, do this to your ROM before flashing (ONLY do this if using Intel graphics): ./nvramtool -C libreboot.rom -w iommu=Enable
-
-*This* target uses Intel MRC (a binary blob) for memory controller initialisation.
-If you want *libre* initialisation (recommended), use the *nri* targets instead,
-e.g. dell9020sff-nri_12mb or dell9020mt-nri_12mb
-
-These MRC-based targets will be *removed* in a future Libreboot release. It is
-strongly recommended that you use the NRI-based targets (Native RAM initialisation).
-
-This version uses Broadwell MRC, which is compatible on Haswell machines.
diff --git a/config/coreboot/dell9020sff-nri_12mb/target.cfg b/config/coreboot/dell9020sff-nri_12mb/target.cfg
index bc4053d4..37d8f553 100644
--- a/config/coreboot/dell9020sff-nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff-nri_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/dell9020sff-nri_12mb/warn.txt b/config/coreboot/dell9020sff-nri_12mb/warn.txt
deleted file mode 100644
index fe1aa7f9..00000000
--- a/config/coreboot/dell9020sff-nri_12mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Completely stable with graphics, but IOMMU disabled by default; graphics cards only work with IOMMU turned off. Intel graphics works fine with IOMMU turned on. IOMMU is needed for Qubes to work properly. To turn on IOMMU, do this to your ROM before flashing (ONLY do this if using Intel graphics): ./nvramtool -C libreboot.rom -w iommu=Enable
diff --git a/config/coreboot/dell9020sff_12mb/target.cfg b/config/coreboot/dell9020sff_12mb/target.cfg
index 0141f142..0da057a9 100644
--- a/config/coreboot/dell9020sff_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_12mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="deprecated"
diff --git a/config/coreboot/dell9020sff_12mb/warn.txt b/config/coreboot/dell9020sff_12mb/warn.txt
deleted file mode 100644
index 6c262da4..00000000
--- a/config/coreboot/dell9020sff_12mb/warn.txt
+++ /dev/null
@@ -1,10 +0,0 @@
-Completely stable with graphics, but IOMMU disabled by default; graphics cards only work with IOMMU turned off. Intel graphics works fine with IOMMU turned on. IOMMU is needed for Qubes to work properly. To turn on IOMMU, do this to your ROM before flashing (ONLY do this if using Intel graphics): ./nvramtool -C libreboot.rom -w iommu=Enable
-
-*This* target uses Intel MRC (a binary blob) for memory controller initialisation.
-If you want *libre* initialisation (recommended), use the *nri* targets instead,
-e.g. dell9020sff-nri_12mb or dell9020mt-nri_12mb
-
-These MRC-based targets will be *removed* in a future Libreboot release. It is
-strongly recommended that you use the NRI-based targets (Native RAM initialisation).
-
-This version uses Haswell MRC, which is compatible with the machine.
diff --git a/config/coreboot/dell9020sffbmrc_12mb/target.cfg b/config/coreboot/dell9020sffbmrc_12mb/target.cfg
index 0141f142..0da057a9 100644
--- a/config/coreboot/dell9020sffbmrc_12mb/target.cfg
+++ b/config/coreboot/dell9020sffbmrc_12mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="deprecated"
diff --git a/config/coreboot/dell9020sffbmrc_12mb/warn.txt b/config/coreboot/dell9020sffbmrc_12mb/warn.txt
deleted file mode 100644
index 21be619a..00000000
--- a/config/coreboot/dell9020sffbmrc_12mb/warn.txt
+++ /dev/null
@@ -1,10 +0,0 @@
-Completely stable with graphics, but IOMMU disabled by default; graphics cards only work with IOMMU turned off. Intel graphics works fine with IOMMU turned on. IOMMU is needed for Qubes to work properly. To turn on IOMMU, do this to your ROM before flashing (ONLY do this if using Intel graphics): ./nvramtool -C libreboot.rom -w iommu=Enable
-
-*This* target uses Intel MRC (a binary blob) for memory controller initialisation.
-If you want *libre* initialisation (recommended), use the *nri* targets instead,
-e.g. dell9020sff-nri_12mb or dell9020mt-nri_12mb
-
-These MRC-based targets will be *removed* in a future Libreboot release. It is
-strongly recommended that you use the NRI-based targets (Native RAM initialisation).
-
-This version uses Broadwell MRC, which is compatible on Haswell machines.
diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index a0cfb47e..03fd230b 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -7,4 +7,3 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/e5420_6mb/warn.txt b/config/coreboot/e5420_6mb/warn.txt
deleted file mode 100644
index 4709a005..00000000
--- a/config/coreboot/e5420_6mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index a0cfb47e..03fd230b 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -7,4 +7,3 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/e5520_6mb/warn.txt b/config/coreboot/e5520_6mb/warn.txt
deleted file mode 100644
index 4709a005..00000000
--- a/config/coreboot/e5520_6mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index a0cfb47e..03fd230b 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -7,4 +7,3 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/e5530_12mb/warn.txt b/config/coreboot/e5530_12mb/warn.txt
deleted file mode 100644
index 4709a005..00000000
--- a/config/coreboot/e5530_12mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index fb7c7bfb..3a458ee4 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -7,4 +7,3 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable" # broken s3
diff --git a/config/coreboot/e6400_4mb/warn.txt b/config/coreboot/e6400_4mb/warn.txt
deleted file mode 100644
index 9545476b..00000000
--- a/config/coreboot/e6400_4mb/warn.txt
+++ /dev/null
@@ -1,3 +0,0 @@
-Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
-
-If you have the nvidia gpu variant, please use e6400nvidia_4mb instead.
diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
index a1a8caf1..3a458ee4 100644
--- a/config/coreboot/e6400nvidia_4mb/target.cfg
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -7,4 +7,3 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable" # s3, nvidia+nouveau
diff --git a/config/coreboot/e6400nvidia_4mb/warn.txt b/config/coreboot/e6400nvidia_4mb/warn.txt
deleted file mode 100644
index 34f4bdf2..00000000
--- a/config/coreboot/e6400nvidia_4mb/warn.txt
+++ /dev/null
@@ -1,3 +0,0 @@
-Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
-
-Nvidia GPU on this model doesn't work when you try xorg; xorg will hang. Use "nomodeset" under Linux, when booting. On BSD, the nv driver works ok but can get very slow-slideshow-y when dragging windows, yet rendered video will usually run smooth; use a tiling window manager on BSD systems, or again use software rendering.
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index a0cfb47e..03fd230b 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -7,4 +7,3 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/e6420_10mb/warn.txt b/config/coreboot/e6420_10mb/warn.txt
deleted file mode 100644
index 4709a005..00000000
--- a/config/coreboot/e6420_10mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index a0cfb47e..03fd230b 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -7,4 +7,3 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/e6430_12mb/warn.txt b/config/coreboot/e6430_12mb/warn.txt
deleted file mode 100644
index 4709a005..00000000
--- a/config/coreboot/e6430_12mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index a0cfb47e..03fd230b 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -7,4 +7,3 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/e6520_10mb/warn.txt b/config/coreboot/e6520_10mb/warn.txt
deleted file mode 100644
index 4709a005..00000000
--- a/config/coreboot/e6520_10mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index a0cfb47e..03fd230b 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -7,4 +7,3 @@ payload_memtest="y"
 payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/e6530_12mb/warn.txt b/config/coreboot/e6530_12mb/warn.txt
deleted file mode 100644
index 4709a005..00000000
--- a/config/coreboot/e6530_12mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Battery indicator not working yet. May shut down instead of throttle on high CPU temperature; use the intel_pstate driver to cap speeds, and monitor performance via CPU stress test and lm-sensors/xsensors utility, before using the machine regularly.
diff --git a/config/coreboot/g43t-am3/target.cfg b/config/coreboot/g43t-am3/target.cfg
index 21b6872f..13f2a260 100644
--- a/config/coreboot/g43t-am3/target.cfg
+++ b/config/coreboot/g43t-am3/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grub_timeout=10
-status="stable"
diff --git a/config/coreboot/g43t-am3_16mb/target.cfg b/config/coreboot/g43t-am3_16mb/target.cfg
index 01cd4d07..bbe8a9fb 100644
--- a/config/coreboot/g43t-am3_16mb/target.cfg
+++ b/config/coreboot/g43t-am3_16mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grub_timeout=10
-status="stable"
 release="n"
diff --git a/config/coreboot/ga-g41m-es2l/target.cfg b/config/coreboot/ga-g41m-es2l/target.cfg
index dc53b74a..ef85da4b 100644
--- a/config/coreboot/ga-g41m-es2l/target.cfg
+++ b/config/coreboot/ga-g41m-es2l/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ata"
 grub_timeout=10
-status="stable"
diff --git a/config/coreboot/gru_bob/target.cfg b/config/coreboot/gru_bob/target.cfg
index 86283f7a..a7c36159 100644
--- a/config/coreboot/gru_bob/target.cfg
+++ b/config/coreboot/gru_bob/target.cfg
@@ -1,4 +1,3 @@
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
-status="stable"
diff --git a/config/coreboot/gru_bob/warn.txt b/config/coreboot/gru_bob/warn.txt
deleted file mode 100644
index 1dcc4e7d..00000000
--- a/config/coreboot/gru_bob/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Incomplete UEFI implementation but should boot most distros fine. Debian Bookworm installed and the first 1GB or so of the partition got corrupted. Leave the first 2GB or so unpartitioned, when installing any distro.
diff --git a/config/coreboot/gru_kevin/target.cfg b/config/coreboot/gru_kevin/target.cfg
index 86283f7a..a7c36159 100644
--- a/config/coreboot/gru_kevin/target.cfg
+++ b/config/coreboot/gru_kevin/target.cfg
@@ -1,4 +1,3 @@
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
-status="stable"
diff --git a/config/coreboot/gru_kevin/warn.txt b/config/coreboot/gru_kevin/warn.txt
deleted file mode 100644
index 1dcc4e7d..00000000
--- a/config/coreboot/gru_kevin/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-Incomplete UEFI implementation but should boot most distros fine. Debian Bookworm installed and the first 1GB or so of the partition got corrupted. Leave the first 2GB or so unpartitioned, when installing any distro.
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index 5cdb7116..fee132f4 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="stable"
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index 5cdb7116..fee132f4 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="stable"
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index 5cdb7116..fee132f4 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="stable"
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 04510c57..0badb4fb 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -5,4 +5,3 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="stable"
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 04510c57..0badb4fb 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="stable"
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index e19a0d14..06f3025c 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="stable"
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index 04510c57..0badb4fb 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="stable"
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index 04510c57..0badb4fb 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="stable"
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index 5cdb7116..fee132f4 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="stable"
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index 5cdb7116..fee132f4 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="stable"
diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg
index ea96b084..ae56c735 100644
--- a/config/coreboot/hp8560w_8mb/target.cfg
+++ b/config/coreboot/hp8560w_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="stable"
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index 5cdb7116..fee132f4 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
-status="stable"
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
index 3d0185e9..d5d37291 100644
--- a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
-status="unstable"
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/warn.txt b/config/coreboot/kcma-d8-rdimm_16mb/warn.txt
deleted file mode 100644
index 639ecd41..00000000
--- a/config/coreboot/kcma-d8-rdimm_16mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-raminit has always been unreliable on this board; ymmv
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
index 3d0185e9..d5d37291 100644
--- a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
-status="unstable"
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/warn.txt b/config/coreboot/kcma-d8-rdimm_2mb/warn.txt
deleted file mode 100644
index 639ecd41..00000000
--- a/config/coreboot/kcma-d8-rdimm_2mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-raminit has always been unreliable on this board; ymmv
diff --git a/config/coreboot/kcma-d8-udimm_16mb/target.cfg b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
index 2c3bc306..35354c26 100644
--- a/config/coreboot/kcma-d8-udimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
@@ -6,4 +6,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
-status="unstable"
diff --git a/config/coreboot/kcma-d8-udimm_16mb/warn.txt b/config/coreboot/kcma-d8-udimm_16mb/warn.txt
deleted file mode 100644
index 639ecd41..00000000
--- a/config/coreboot/kcma-d8-udimm_16mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-raminit has always been unreliable on this board; ymmv
diff --git a/config/coreboot/kcma-d8-udimm_2mb/target.cfg b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
index 2c3bc306..35354c26 100644
--- a/config/coreboot/kcma-d8-udimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
@@ -6,4 +6,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
-status="unstable"
diff --git a/config/coreboot/kcma-d8-udimm_2mb/warn.txt b/config/coreboot/kcma-d8-udimm_2mb/warn.txt
deleted file mode 100644
index 639ecd41..00000000
--- a/config/coreboot/kcma-d8-udimm_2mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-raminit has always been unreliable on this board; ymmv
diff --git a/config/coreboot/kfsn4-dre_1mb/target.cfg b/config/coreboot/kfsn4-dre_1mb/target.cfg
index e5b66b38..19c57b8d 100644
--- a/config/coreboot/kfsn4-dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4-dre_1mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
-status="stable"
diff --git a/config/coreboot/kfsn4-dre_2mb/target.cfg b/config/coreboot/kfsn4-dre_2mb/target.cfg
index 8f4e6a81..9bd20d45 100644
--- a/config/coreboot/kfsn4-dre_2mb/target.cfg
+++ b/config/coreboot/kfsn4-dre_2mb/target.cfg
@@ -5,4 +5,3 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
-status="stable"
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
index f469e6fe..2867a730 100644
--- a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
-status="unstable"
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/warn.txt b/config/coreboot/kgpe-d16-rdimm_16mb/warn.txt
deleted file mode 100644
index 639ecd41..00000000
--- a/config/coreboot/kgpe-d16-rdimm_16mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-raminit has always been unreliable on this board; ymmv
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
index f469e6fe..2867a730 100644
--- a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
@@ -5,4 +5,3 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
-status="unstable"
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/warn.txt b/config/coreboot/kgpe-d16-rdimm_2mb/warn.txt
deleted file mode 100644
index 639ecd41..00000000
--- a/config/coreboot/kgpe-d16-rdimm_2mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-raminit has always been unreliable on this board; ymmv
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
index 298d1f20..5b4010d8 100644
--- a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
-status="unstable"
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/warn.txt b/config/coreboot/kgpe-d16-udimm_16mb/warn.txt
deleted file mode 100644
index 639ecd41..00000000
--- a/config/coreboot/kgpe-d16-udimm_16mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-raminit has always been unreliable on this board; ymmv
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
index 298d1f20..5b4010d8 100644
--- a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
-status="unstable"
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/warn.txt b/config/coreboot/kgpe-d16-udimm_2mb/warn.txt
deleted file mode 100644
index 639ecd41..00000000
--- a/config/coreboot/kgpe-d16-udimm_2mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-raminit has always been unreliable on this board; ymmv
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index 38046653..dcf5d1de 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -4,4 +4,3 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index 38046653..dcf5d1de 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -4,4 +4,3 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index 27d71b5a..bb56ec25 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index 27d71b5a..bb56ec25 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/qemu_arm64_12mb/target.cfg b/config/coreboot/qemu_arm64_12mb/target.cfg
index 86283f7a..a7c36159 100644
--- a/config/coreboot/qemu_arm64_12mb/target.cfg
+++ b/config/coreboot/qemu_arm64_12mb/target.cfg
@@ -1,4 +1,3 @@
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
-status="stable"
diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg
index dba2c61e..4d03eb4a 100644
--- a/config/coreboot/qemu_x86_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="both"
-status="stable"
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index b0abee49..e6d3bec6 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_seabios_withgrub="y"
 payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/t440pbmrc_12mb/target.cfg b/config/coreboot/t440pbmrc_12mb/target.cfg
index e19a0d14..06f3025c 100644
--- a/config/coreboot/t440pbmrc_12mb/target.cfg
+++ b/config/coreboot/t440pbmrc_12mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="stable"
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index 0efb19ed..8bb575a9 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/t440pmrc_12mb/target.cfg b/config/coreboot/t440pmrc_12mb/target.cfg
index e19a0d14..06f3025c 100644
--- a/config/coreboot/t440pmrc_12mb/target.cfg
+++ b/config/coreboot/t440pmrc_12mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="stable"
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index bb3decba..2daf00f7 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
-status="stable"
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index bb3decba..2daf00f7 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
-status="stable"
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index 0efb19ed..8bb575a9 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/w541bmrc_12mb/target.cfg b/config/coreboot/w541bmrc_12mb/target.cfg
index e19a0d14..06f3025c 100644
--- a/config/coreboot/w541bmrc_12mb/target.cfg
+++ b/config/coreboot/w541bmrc_12mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="stable"
diff --git a/config/coreboot/w541mrc_12mb/target.cfg b/config/coreboot/w541mrc_12mb/target.cfg
index e19a0d14..06f3025c 100644
--- a/config/coreboot/w541mrc_12mb/target.cfg
+++ b/config/coreboot/w541mrc_12mb/target.cfg
@@ -6,4 +6,3 @@ payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
-status="stable"
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/x230_12mb/target.cfg
+++ b/config/coreboot/x230_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/x230_12mb/warn.txt b/config/coreboot/x230_12mb/warn.txt
deleted file mode 100644
index a153edeb..00000000
--- a/config/coreboot/x230_12mb/warn.txt
+++ /dev/null
@@ -1 +0,0 @@
-TODO: VCC3P patch
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/x230t_12mb/target.cfg
+++ b/config/coreboot/x230t_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index f16a94a4..8688df3f 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-status="stable"
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index bb3decba..2daf00f7 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
-status="stable"
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index bb3decba..2daf00f7 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
-status="stable"
diff --git a/include/option.sh b/include/option.sh
index a117958d..b79c34f4 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -36,13 +36,12 @@ setvars()
 	printf "%s\n" "${_setvars% }"
 }
 eval "$(setvars "" CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
-    CONFIG_ME_BIN_PATH CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 _nogit \
+    CONFIG_ME_BIN_PATH CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 versiondate \
     CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW2_OFFSET \
-    CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_GBE_BIN_PATH tmpdir \
-    CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE \
+    CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_GBE_BIN_PATH tmpdir _nogit \
+    CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE version \
     CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE _dest board boarddir lbmk_release \
-    CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE lbmk_status threads \
-    version versiondate projectname)"
+    CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE threads projectname)"
 
 # if "y": a coreboot target won't be built if target.cfg says release="n"
 # (this is used to exclude certain build targets from releases)
@@ -51,13 +50,6 @@ set | grep LBMK_RELEASE 1>/dev/null 2>/dev/null || lbmk_release="n" || :
 [ "$lbmk_release" = "n" ] || [ "$lbmk_release" = "y" ] || lbmk_release="n"
 export LBMK_RELEASE="$lbmk_release"
 
-# if set to n via export, status checks will be skipped during
-# all builds, and all targets will be built regardless of status.
-# this replicates the old behaviour of lbmk, prior to the checks.
-set | grep LBMK_STATUS 1>/dev/null 2>/dev/null && lbmk_status="$LBMK_STATUS"
-[ "$lbmk_status" = "y" ] || [ "$lbmk_status" = "n" ] || lbmk_status="y"
-export LBMK_STATUS="$lbmk_status"
-
 set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"
 if [ "${tmpdir_was_set}" = "y" ]; then
 	[ "${TMPDIR%_*}" = "/tmp/lbmk" ] || tmpdir_was_set="n"
diff --git a/script/roms b/script/roms
index 0525091b..ce7e52f2 100755
--- a/script/roms
+++ b/script/roms
@@ -24,31 +24,23 @@ stm32_src_dir="src/stm32-vserprog"
 pv="payload_grub payload_grub_withseabios payload_seabios payload_memtest t"
 pv="${pv} payload_seabios_withgrub payload_seabios_grubonly payload_uboot memtest_bin"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree keymaps release"
-v="${v} grub_timeout ubdir board grub_scan_disk uboot_config status"
+v="${v} grub_timeout ubdir board grub_scan_disk uboot_config"
 eval "$(setvars "n" ${pv} serprog)"
 eval "$(setvars "" ${v} boards _displaymode _payload _keyboard all targets \
-    skipped listboards list_type serprog_boards_dir)"
+    serprog_boards_dir)"
 
 main()
 {
 	check_project
 
 	while [ $# -gt 0 ]; do
-		if [ "$listboards" = "y" ]; then
-			list_type="$list_type $1"
-			list_type="${list_type# }"
-			shift 1; continue
-		fi
-
 		case ${1} in
 		help)
 			usage
 			exit 0 ;;
 		list)
-			boards=$(items config/coreboot) || \
-			    $err "Cannot generate list of boards for list"
-			listboards="y"
-			shift 1; continue ;;
+			x_ items config/coreboot
+			return 0 ;;
 		serprog)
 			serprog="y"
 			shift 1; break ;;
@@ -74,14 +66,6 @@ main()
 		done
 	fi
 
-	[ "$listboards" = "y" ] && return 0
-
-	if [ -n "$skipped" ]; then	
-		printf "\nThese targets were skipped:\n"
-		eval "printf \"${skipped}\""
-		printf "^^ These targets were skipped.\n\n"
-	fi
-
 	[ -z "${targets}" ] && $err "No ROM images were compiled"
 	printf "\nROM images available in these directories:\n"
 	eval "printf \"${targets}\""
@@ -155,18 +139,11 @@ handle_coreboot_target()
 	eval "$(setvars "n" ${pv}) $(setvars "" ${v})"
 	grub_background="background1280x800.png"
 	board="$1"
-	status="unknown"
 
 	configure_target
-	[ "$board" = "$tree" ] && \
-		return 0
-
-	print_target_name && return 0
-
-	# exclude certain targets from the release
-	if skip_board; then
-		printf "Skip target %s(%s)\n" "$board" "$status"
-		skipped="* $board($status)\n$skipped"
+	[ "$board" = "$tree" ] && return 0
+	if [ "$lbmk_release" = "y" ] && [ "$release" = "n" ]; then
+		printf "Target '%s' disabled for release.\n" "$board"
 		return 0
 	fi
 
@@ -225,57 +202,6 @@ configure_target()
 	eval "payload_${_payload}=y"
 }
 
-print_target_name()
-{
-	[ "$listboards" = "y" ] || return 1
-
-	[ -z "$list_type" ] && printf "%s\n" "$board"
-
-	for _list_type in $list_type; do
-		if [ "${_list_type#_}" = "$_list_type" ]; then
-			[ "$status" != "$_list_type" ] && \
-				continue
-			printf "%s\n" "$board"
-			break
-		elif [ "$status" != "${_list_type#_}" ]; then
-			printf "%s\n" "$board"
-			break
-		fi
-	done
-}
-
-skip_board()
-{
-	if [ "$listboards" != "y" ] && [ "$status" != "stable" ]; then
-		printf "\n\n\t!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n"
-		printf "\t__WARNING: %s has status '%s'__\n" \
-		    "$board" "$status"
-		printf "\t!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n\n"
-	fi
-
-	if [ -f "$targetdir/warn.txt" ] && [ "$listboards" != "y" ]; then
-		printf "Regarding target '%s' (status '%s'):\n\n" \
-		    "$board" "$status"
-		cat -u "$targetdir/warn.txt" || \
-		    $err "!cat $targetdir/warn.txt"
-	fi
-
-	[ "$lbmk_release" = "y" ] && [ "$release" = "n" ] && return 0
-	[ "$lbmk_release" = "y" ] && [ "$status" != "broken" ] && return 1
-	[ "$lbmk_status" = "y" ] || return 1
-	[ "$status" = "stable" ] && return 1
-
-	printf "\nTo disable this dialog when building, do:\n"
-	printf "export LBMK_STATUS=n\n\n"
-	while true; do
-		printf "Board %s has status '%s'. Skip? [y/n] " \
-		    "$board" "$status"
-		read -r skip
-		[ "$skip" = "y" ] && return 0
-		[ "$skip" = "n" ] && return 1; continue
-	done
-}
-
 build_payloads()
 {
 	romdir="bin/${board}"

From cc33974150d275140fced9cfa4b8e901b0552074 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 11 May 2024 19:03:26 +0100
Subject: [PATCH 0338/1549] remove haswell mrc blob (libre raminit stable now)

broadwell mrc is retained, because it's needed on 820 g2

it's no longer needed on haswell, because nri is stable. nri
is short for "native ram initialisation", and libreboot provides
this for: thinkpad t440p, thinkpad w541, dell optiplex 9020 mt,
and dell optiplex 9020 sff

remove, in line with libreboot's binary blob reduction policy

previous revisions, prior to the recent release, stated that
it would be retained for compatibility, but it's really not
right to retain it, because doing so violates libreboot's policy

the recent release excluded mrc-based rom images for haswell
machines, providing only those rom images that use the libre
raminit, while retaining support for mrc in the build system, so
that users could still run the lbmk inject script on older release
roms that use mrc

again: libreboot's binary blob reduction policy is very clear:

https://libreboot.org/news/policy.html

it is a policy that can be summarised, thus:

if a blob can be avoided, it must be avoided.

therefore, we will avoid the Haswell MRC raminit blob

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              | 649 -----------------
 .../dell9020mt_12mb/config/libgfxinit_txtmode | 646 -----------------
 config/coreboot/dell9020mt_12mb/target.cfg    |   8 -
 .../config/libgfxinit_corebootfb              | 649 -----------------
 .../config/libgfxinit_txtmode                 | 646 -----------------
 .../coreboot/dell9020mtbmrc_12mb/target.cfg   |   8 -
 .../config/libgfxinit_corebootfb              | 649 -----------------
 .../config/libgfxinit_txtmode                 | 646 -----------------
 config/coreboot/dell9020sff_12mb/target.cfg   |   8 -
 .../config/libgfxinit_corebootfb              | 649 -----------------
 .../config/libgfxinit_txtmode                 | 646 -----------------
 .../coreboot/dell9020sffbmrc_12mb/target.cfg  |   8 -
 .../config/libgfxinit_corebootfb              | 657 ------------------
 .../t440pbmrc_12mb/config/libgfxinit_txtmode  | 654 -----------------
 config/coreboot/t440pbmrc_12mb/target.cfg     |   8 -
 .../config/libgfxinit_corebootfb              | 657 ------------------
 .../t440pmrc_12mb/config/libgfxinit_txtmode   | 654 -----------------
 config/coreboot/t440pmrc_12mb/target.cfg      |   8 -
 .../config/libgfxinit_corebootfb              | 657 ------------------
 .../w541bmrc_12mb/config/libgfxinit_txtmode   | 654 -----------------
 config/coreboot/w541bmrc_12mb/target.cfg      |   8 -
 .../w541mrc_12mb/config/libgfxinit_corebootfb | 657 ------------------
 .../w541mrc_12mb/config/libgfxinit_txtmode    | 654 -----------------
 config/coreboot/w541mrc_12mb/target.cfg       |   8 -
 config/vendor/sources                         |  18 +-
 include/mrc.sh                                |   2 -
 include/vendor.sh                             |   4 -
 27 files changed, 1 insertion(+), 10511 deletions(-)
 delete mode 100644 config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
 delete mode 100644 config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/dell9020mt_12mb/target.cfg
 delete mode 100644 config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb
 delete mode 100644 config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/dell9020mtbmrc_12mb/target.cfg
 delete mode 100644 config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
 delete mode 100644 config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/dell9020sff_12mb/target.cfg
 delete mode 100644 config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb
 delete mode 100644 config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/dell9020sffbmrc_12mb/target.cfg
 delete mode 100644 config/coreboot/t440pbmrc_12mb/config/libgfxinit_corebootfb
 delete mode 100644 config/coreboot/t440pbmrc_12mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/t440pbmrc_12mb/target.cfg
 delete mode 100644 config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
 delete mode 100644 config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/t440pmrc_12mb/target.cfg
 delete mode 100644 config/coreboot/w541bmrc_12mb/config/libgfxinit_corebootfb
 delete mode 100644 config/coreboot/w541bmrc_12mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/w541bmrc_12mb/target.cfg
 delete mode 100644 config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
 delete mode 100644 config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/w541mrc_12mb/target.cfg

diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
deleted file mode 100644
index 2fbd5982..00000000
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_corebootfb
+++ /dev/null
@@ -1,649 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-CONFIG_VENDOR_DELL=y
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
-CONFIG_VGA_BIOS_ID="8086,0166"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="Dell Inc."
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
-CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
-# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
-# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xe8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-# CONFIG_USE_BROADWELL_MRC is not set
-# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-CONFIG_SUPERIO_SMSC_SCH555x=y
-
-#
-# Embedded Controllers
-#
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-CONFIG_LINEAR_FRAMEBUFFER=y
-# CONFIG_BOOTSPLASH is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Haswell"
-CONFIG_GFX_GMA_PCH="Lynx_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
deleted file mode 100644
index c92a7c7c..00000000
--- a/config/coreboot/dell9020mt_12mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,646 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-CONFIG_VENDOR_DELL=y
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
-CONFIG_VGA_BIOS_ID="8086,0166"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="Dell Inc."
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
-# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
-# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xe8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-# CONFIG_USE_BROADWELL_MRC is not set
-# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-CONFIG_SUPERIO_SMSC_SCH555x=y
-
-#
-# Embedded Controllers
-#
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Haswell"
-CONFIG_GFX_GMA_PCH="Lynx_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_VGA=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020mt_12mb/target.cfg b/config/coreboot/dell9020mt_12mb/target.cfg
deleted file mode 100644
index 0da057a9..00000000
--- a/config/coreboot/dell9020mt_12mb/target.cfg
+++ /dev/null
@@ -1,8 +0,0 @@
-tree="default"
-xarch="i386-elf"
-payload_seabios="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
-payload_memtest="y"
-grub_scan_disk="ahci"
-release="n"
diff --git a/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb
deleted file mode 100644
index 2878f894..00000000
--- a/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_corebootfb
+++ /dev/null
@@ -1,649 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-CONFIG_VENDOR_DELL=y
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
-CONFIG_VGA_BIOS_ID="8086,0166"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="Dell Inc."
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
-CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
-# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
-# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xd8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-CONFIG_USE_BROADWELL_MRC=y
-# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-CONFIG_SUPERIO_SMSC_SCH555x=y
-
-#
-# Embedded Controllers
-#
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-CONFIG_LINEAR_FRAMEBUFFER=y
-# CONFIG_BOOTSPLASH is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Haswell"
-CONFIG_GFX_GMA_PCH="Lynx_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode
deleted file mode 100644
index 35bbcf5b..00000000
--- a/config/coreboot/dell9020mtbmrc_12mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,646 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-CONFIG_VENDOR_DELL=y
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
-CONFIG_VGA_BIOS_ID="8086,0166"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="Dell Inc."
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
-# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
-# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xd8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-CONFIG_USE_BROADWELL_MRC=y
-# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-CONFIG_SUPERIO_SMSC_SCH555x=y
-
-#
-# Embedded Controllers
-#
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Haswell"
-CONFIG_GFX_GMA_PCH="Lynx_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_VGA=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020mtbmrc_12mb/target.cfg b/config/coreboot/dell9020mtbmrc_12mb/target.cfg
deleted file mode 100644
index 0da057a9..00000000
--- a/config/coreboot/dell9020mtbmrc_12mb/target.cfg
+++ /dev/null
@@ -1,8 +0,0 @@
-tree="default"
-xarch="i386-elf"
-payload_seabios="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
-payload_memtest="y"
-grub_scan_disk="ahci"
-release="n"
diff --git a/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
deleted file mode 100644
index 65d9ddf2..00000000
--- a/config/coreboot/dell9020sff_12mb/config/libgfxinit_corebootfb
+++ /dev/null
@@ -1,649 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-CONFIG_VENDOR_DELL=y
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 SFF"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
-CONFIG_VGA_BIOS_ID="8086,0166"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="Dell Inc."
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
-CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
-# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xe8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-# CONFIG_USE_BROADWELL_MRC is not set
-# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-CONFIG_SUPERIO_SMSC_SCH555x=y
-
-#
-# Embedded Controllers
-#
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-CONFIG_LINEAR_FRAMEBUFFER=y
-# CONFIG_BOOTSPLASH is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Haswell"
-CONFIG_GFX_GMA_PCH="Lynx_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
deleted file mode 100644
index 127c034d..00000000
--- a/config/coreboot/dell9020sff_12mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,646 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-CONFIG_VENDOR_DELL=y
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 SFF"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
-CONFIG_VGA_BIOS_ID="8086,0166"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="Dell Inc."
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
-# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xe8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-# CONFIG_USE_BROADWELL_MRC is not set
-# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-CONFIG_SUPERIO_SMSC_SCH555x=y
-
-#
-# Embedded Controllers
-#
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Haswell"
-CONFIG_GFX_GMA_PCH="Lynx_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_VGA=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020sff_12mb/target.cfg b/config/coreboot/dell9020sff_12mb/target.cfg
deleted file mode 100644
index 0da057a9..00000000
--- a/config/coreboot/dell9020sff_12mb/target.cfg
+++ /dev/null
@@ -1,8 +0,0 @@
-tree="default"
-xarch="i386-elf"
-payload_seabios="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
-payload_memtest="y"
-grub_scan_disk="ahci"
-release="n"
diff --git a/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb
deleted file mode 100644
index f544407a..00000000
--- a/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_corebootfb
+++ /dev/null
@@ -1,649 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-CONFIG_VENDOR_DELL=y
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 SFF"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
-CONFIG_VGA_BIOS_ID="8086,0166"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="Dell Inc."
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
-CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
-# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xd8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-CONFIG_USE_BROADWELL_MRC=y
-# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-CONFIG_SUPERIO_SMSC_SCH555x=y
-
-#
-# Embedded Controllers
-#
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-CONFIG_LINEAR_FRAMEBUFFER=y
-# CONFIG_BOOTSPLASH is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Haswell"
-CONFIG_GFX_GMA_PCH="Lynx_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode
deleted file mode 100644
index 0586764c..00000000
--- a/config/coreboot/dell9020sffbmrc_12mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,646 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-CONFIG_VENDOR_DELL=y
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 SFF"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
-CONFIG_VGA_BIOS_ID="8086,0166"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="Dell Inc."
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
-# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_TTYS0_BAUD=115200
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xd8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-CONFIG_USE_BROADWELL_MRC=y
-# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-CONFIG_SUPERIO_SMSC_SCH555x=y
-
-#
-# Embedded Controllers
-#
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Haswell"
-CONFIG_GFX_GMA_PCH="Lynx_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_VGA=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell9020sffbmrc_12mb/target.cfg b/config/coreboot/dell9020sffbmrc_12mb/target.cfg
deleted file mode 100644
index 0da057a9..00000000
--- a/config/coreboot/dell9020sffbmrc_12mb/target.cfg
+++ /dev/null
@@ -1,8 +0,0 @@
-tree="default"
-xarch="i386-elf"
-payload_seabios="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
-payload_memtest="y"
-grub_scan_disk="ahci"
-release="n"
diff --git a/config/coreboot/t440pbmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440pbmrc_12mb/config/libgfxinit_corebootfb
deleted file mode 100644
index 0074fb6c..00000000
--- a/config/coreboot/t440pbmrc_12mb/config/libgfxinit_corebootfb
+++ /dev/null
@@ -1,657 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_MAINBOARD_FAMILY="ThinkPad T440p"
-CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T440p"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/haswell"
-CONFIG_VGA_BIOS_ID="8086,0416"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-CONFIG_NO_POST=y
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
-CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
-CONFIG_MAX_CPUS=8
-CONFIG_ONBOARD_VGA_IS_PRIMARY=y
-CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_VARIANT_DIR="t440p"
-CONFIG_OVERRIDE_DEVICETREE=""
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0036"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
-# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
-CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xd8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-CONFIG_USE_BROADWELL_MRC=y
-# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-CONFIG_LINEAR_FRAMEBUFFER=y
-# CONFIG_BOOTSPLASH is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_NO_UART_ON_SUPERIO=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Haswell"
-CONFIG_GFX_GMA_PCH="Lynx_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-CONFIG_HWBASE_DEBUG_NULL=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t440pbmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440pbmrc_12mb/config/libgfxinit_txtmode
deleted file mode 100644
index 0c7e6141..00000000
--- a/config/coreboot/t440pbmrc_12mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,654 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_MAINBOARD_FAMILY="ThinkPad T440p"
-CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T440p"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/haswell"
-CONFIG_VGA_BIOS_ID="8086,0416"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-CONFIG_NO_POST=y
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_MAX_CPUS=8
-CONFIG_ONBOARD_VGA_IS_PRIMARY=y
-CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_VARIANT_DIR="t440p"
-CONFIG_OVERRIDE_DEVICETREE=""
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0036"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
-# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
-CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xd8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-CONFIG_USE_BROADWELL_MRC=y
-# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_NO_UART_ON_SUPERIO=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Haswell"
-CONFIG_GFX_GMA_PCH="Lynx_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_VGA=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-CONFIG_HWBASE_DEBUG_NULL=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t440pbmrc_12mb/target.cfg b/config/coreboot/t440pbmrc_12mb/target.cfg
deleted file mode 100644
index 06f3025c..00000000
--- a/config/coreboot/t440pbmrc_12mb/target.cfg
+++ /dev/null
@@ -1,8 +0,0 @@
-tree="default"
-xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
-payload_seabios="y"
-payload_memtest="y"
-grub_scan_disk="ahci"
-release="n"
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
deleted file mode 100644
index 6bf1dca1..00000000
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
+++ /dev/null
@@ -1,657 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_MAINBOARD_FAMILY="ThinkPad T440p"
-CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T440p"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/haswell"
-CONFIG_VGA_BIOS_ID="8086,0416"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-CONFIG_NO_POST=y
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
-CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
-CONFIG_MAX_CPUS=8
-CONFIG_ONBOARD_VGA_IS_PRIMARY=y
-CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_VARIANT_DIR="t440p"
-CONFIG_OVERRIDE_DEVICETREE=""
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0036"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
-# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
-CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xe8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-# CONFIG_USE_BROADWELL_MRC is not set
-CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-CONFIG_LINEAR_FRAMEBUFFER=y
-# CONFIG_BOOTSPLASH is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_NO_UART_ON_SUPERIO=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Haswell"
-CONFIG_GFX_GMA_PCH="Lynx_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-CONFIG_HWBASE_DEBUG_NULL=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
deleted file mode 100644
index 861a5d5e..00000000
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,654 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_MAINBOARD_FAMILY="ThinkPad T440p"
-CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T440p"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/haswell"
-CONFIG_VGA_BIOS_ID="8086,0416"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-CONFIG_NO_POST=y
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_MAX_CPUS=8
-CONFIG_ONBOARD_VGA_IS_PRIMARY=y
-CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_VARIANT_DIR="t440p"
-CONFIG_OVERRIDE_DEVICETREE=""
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0036"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p"
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
-# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
-CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xe8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-# CONFIG_USE_BROADWELL_MRC is not set
-CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_NO_UART_ON_SUPERIO=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Haswell"
-CONFIG_GFX_GMA_PCH="Lynx_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_VGA=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-CONFIG_HWBASE_DEBUG_NULL=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t440pmrc_12mb/target.cfg b/config/coreboot/t440pmrc_12mb/target.cfg
deleted file mode 100644
index 06f3025c..00000000
--- a/config/coreboot/t440pmrc_12mb/target.cfg
+++ /dev/null
@@ -1,8 +0,0 @@
-tree="default"
-xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
-payload_seabios="y"
-payload_memtest="y"
-grub_scan_disk="ahci"
-release="n"
diff --git a/config/coreboot/w541bmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541bmrc_12mb/config/libgfxinit_corebootfb
deleted file mode 100644
index 05de6472..00000000
--- a/config/coreboot/w541bmrc_12mb/config/libgfxinit_corebootfb
+++ /dev/null
@@ -1,657 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_MAINBOARD_FAMILY="ThinkPad W541"
-CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W541"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/haswell"
-CONFIG_VGA_BIOS_ID="8086,0166"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-CONFIG_NO_POST=y
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
-CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
-CONFIG_MAX_CPUS=8
-CONFIG_ONBOARD_VGA_IS_PRIMARY=y
-CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_VARIANT_DIR="w541"
-CONFIG_OVERRIDE_DEVICETREE=""
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN004A"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541"
-CONFIG_HAVE_IFD_BIN=y
-# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
-CONFIG_BOARD_LENOVO_THINKPAD_W541=y
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
-CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xd8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-CONFIG_USE_BROADWELL_MRC=y
-# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-CONFIG_LINEAR_FRAMEBUFFER=y
-# CONFIG_BOOTSPLASH is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_NO_UART_ON_SUPERIO=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Haswell"
-CONFIG_GFX_GMA_PCH="Lynx_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/w541bmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/w541bmrc_12mb/config/libgfxinit_txtmode
deleted file mode 100644
index 88f676c2..00000000
--- a/config/coreboot/w541bmrc_12mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,654 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_MAINBOARD_FAMILY="ThinkPad W541"
-CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W541"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/haswell"
-CONFIG_VGA_BIOS_ID="8086,0166"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-CONFIG_NO_POST=y
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_MAX_CPUS=8
-CONFIG_ONBOARD_VGA_IS_PRIMARY=y
-CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_VARIANT_DIR="w541"
-CONFIG_OVERRIDE_DEVICETREE=""
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN004A"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541"
-CONFIG_HAVE_IFD_BIN=y
-# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
-CONFIG_BOARD_LENOVO_THINKPAD_W541=y
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
-CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xd8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-CONFIG_USE_BROADWELL_MRC=y
-# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_NO_UART_ON_SUPERIO=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Haswell"
-CONFIG_GFX_GMA_PCH="Lynx_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_VGA=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/w541bmrc_12mb/target.cfg b/config/coreboot/w541bmrc_12mb/target.cfg
deleted file mode 100644
index 06f3025c..00000000
--- a/config/coreboot/w541bmrc_12mb/target.cfg
+++ /dev/null
@@ -1,8 +0,0 @@
-tree="default"
-xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
-payload_seabios="y"
-payload_memtest="y"
-grub_scan_disk="ahci"
-release="n"
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
deleted file mode 100644
index 119ad89f..00000000
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
+++ /dev/null
@@ -1,657 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_MAINBOARD_FAMILY="ThinkPad W541"
-CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W541"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/haswell"
-CONFIG_VGA_BIOS_ID="8086,0166"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-CONFIG_NO_POST=y
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
-CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
-CONFIG_MAX_CPUS=8
-CONFIG_ONBOARD_VGA_IS_PRIMARY=y
-CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_VARIANT_DIR="w541"
-CONFIG_OVERRIDE_DEVICETREE=""
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN004A"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541"
-CONFIG_HAVE_IFD_BIN=y
-# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
-CONFIG_BOARD_LENOVO_THINKPAD_W541=y
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
-CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xe8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-# CONFIG_USE_BROADWELL_MRC is not set
-CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-CONFIG_LINEAR_FRAMEBUFFER=y
-# CONFIG_BOOTSPLASH is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_NO_UART_ON_SUPERIO=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Haswell"
-CONFIG_GFX_GMA_PCH="Lynx_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
deleted file mode 100644
index f04da340..00000000
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,654 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-CONFIG_NO_STAGE_CACHE=y
-# CONFIG_TSEG_STAGE_CACHE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_UP is not set
-CONFIG_MAINBOARD_FAMILY="ThinkPad W541"
-CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W541"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/haswell"
-CONFIG_VGA_BIOS_ID="8086,0166"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_FMDFILE=""
-CONFIG_NO_POST=y
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0x800000
-CONFIG_MAX_CPUS=8
-CONFIG_ONBOARD_VGA_IS_PRIMARY=y
-CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
-# CONFIG_VBOOT is not set
-CONFIG_VARIANT_DIR="w541"
-CONFIG_OVERRIDE_DEVICETREE=""
-# CONFIG_VGA_BIOS is not set
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN004A"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-CONFIG_DCACHE_RAM_BASE=0xff7c0000
-CONFIG_DCACHE_RAM_SIZE=0x10000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_ENABLE_DDR_2X_REFRESH is not set
-CONFIG_PCIEXP_AER=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541"
-CONFIG_HAVE_IFD_BIN=y
-# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
-CONFIG_BOARD_LENOVO_THINKPAD_W541=y
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
-CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_EC_GPE_SCI=0x50
-# CONFIG_TPM_MEASURED_BOOT is not set
-CONFIG_BOARD_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_12288=y
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=12288
-CONFIG_ROM_SIZE=0x00c00000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE=""
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x100000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_SERIRQ_CONTINUOUS_MODE=y
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_EHCI_BAR=0xe8000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
-CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
-CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
-CONFIG_HPET_MIN_TICKS=0x80
-CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
-CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
-CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_DISABLE_ME_PCI=y
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_CBFS_CACHE_ALIGN=8
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_HASWELL=y
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
-CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
-# CONFIG_USE_NATIVE_RAMINIT is not set
-# CONFIG_USE_BROADWELL_MRC is not set
-CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
-CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_INTEL_CHIPSET_LOCKDOWN=y
-CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x04000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_USE_DDR3=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-# CONFIG_MRC_SETTINGS_PROTECT is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_ISSI=y
-CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
-CONFIG_NO_UART_ON_SUPERIO=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_USBDEBUG is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_INTEL_DDI=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Haswell"
-CONFIG_GFX_GMA_PCH="Lynx_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_VGA=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_WIFI_GENERIC=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-# CONFIG_NO_TPM is not set
-CONFIG_TPM1=y
-CONFIG_TPM=y
-CONFIG_MAINBOARD_HAS_TPM1=y
-# CONFIG_TPM_DEACTIVATE is not set
-# CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
-# end of Memory initialization
-
-# CONFIG_INTEL_TXT is not set
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_EM100PRO_SPI_CONSOLE is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_USE_WATCHDOG_ON_BOOT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/w541mrc_12mb/target.cfg b/config/coreboot/w541mrc_12mb/target.cfg
deleted file mode 100644
index 06f3025c..00000000
--- a/config/coreboot/w541mrc_12mb/target.cfg
+++ /dev/null
@@ -1,8 +0,0 @@
-tree="default"
-xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
-payload_seabios="y"
-payload_memtest="y"
-grub_scan_disk="ahci"
-release="n"
diff --git a/config/vendor/sources b/config/vendor/sources
index 516077c5..12bd6d8b 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -21,28 +21,12 @@
 	DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
 }
 
-# haswell boards, but use broadwell mrc.bin. uses me9 and
-# the broadwell mrc, but without broadwell refcode
-{dell9020sffbmrc dell9020mtbmrc t440pbmrc w541bmrc}{
-	DL_hash f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998
-	DL_url https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
-	DL_url_bkup https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
-	MRC_url https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip
-	MRC_url_bkup https://web.archive.org/web/20220310155922/https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip
-	MRC_hash 3ff1599c52539f0707a07a8664a84ce51cd3fed1569df4bb7aa6722fc8dec0af1754250333b6ca1a9794d970a4de7b29a5cf2499f5b61e4c3eab64d1314aaea9
-	MRC_board samus
-}
-
 # NOTE: google's manifest for archives containing mrc.bin, used here:
 # https://web.archive.org/web/20210211071412/https://dl.google.com/dl/edgedl/chromeos/recovery/recovery.conf
-{t440pmrc w541mrc t440plibremrc w541 dell9020mt dell9020sff dell9020sff-nri dell9020mt-nri}{
+{t440plibremrc w541 dell9020sff-nri dell9020mt-nri}{
 	DL_hash f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998
 	DL_url https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
 	DL_url_bkup https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
-	MRC_url https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_12239.92.0_peppy_recovery_stable-channel_mp-v3.bin.zip
-	MRC_url_bkup https://web.archive.org/web/20200516070928/https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_12239.92.0_peppy_recovery_stable-channel_mp-v3.bin.zip
-	MRC_hash 340a1cd41136a3ba0de9d306db0e65f51640a2efe63aee9934f326b276adc1af0a2df80c0731c5a749161ec32546909eedfa8ba95801faeb5dcfe1aa4e0840c7
-	MRC_board peppy
 }
 
 # broadwell mrc, and use me10 plus broadwell refcode
diff --git a/include/mrc.sh b/include/mrc.sh
index 901a3c3b..eb85e473 100755
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -8,8 +8,6 @@ eval "$(setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL)"
 
 extract_ref()
 {
-	# refcode needed on broadwell, but not needed on haswell
-
 	# we check mrc twice, because each check only verifies one file,
 	# but refcode is downloaded alongside mrc. in cases where lbmk
 	# erred, downloading only mrc, we must ensure downloading refcode
diff --git a/include/vendor.sh b/include/vendor.sh
index a987c4aa..1904de8e 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -96,10 +96,6 @@ download_vendorfiles()
 		    "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
 	[ -z "${CONFIG_HAVE_MRC}" ] && return 0
 	fetch "mrc" "$MRC_url" "$MRC_url_bkup" "$MRC_hash" "$CONFIG_MRC_FILE"
-
-	# in case only mrc downloaded before, in a pair of mrc/refcode:
-	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && fetch "ref" "$MRC_url" \
-	    "$MRC_url_bkup" "$MRC_hash" "$CONFIG_REFCODE_BLOB_FILE"; return 0
 }
 
 fetch()

From f66ceef6f2692ec7d48bd21ecff41de3909555fd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 11 May 2024 22:14:04 +0100
Subject: [PATCH 0339/1549] print two line breaks before confirming release

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build b/build
index 27989990..9917cd03 100755
--- a/build
+++ b/build
@@ -150,7 +150,7 @@ mkrelease()
 	mkvdir
 	build_release
 
-	printf "DONE! Check release files under %s\n" "${vdir}"
+	printf "\n\nDONE! Check release files under %s\n" "${vdir}"
 }
 
 mkvdir()

From 03fae0cf88c46da5063ce0a3695afd1a7a563872 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 11 May 2024 22:48:51 +0100
Subject: [PATCH 0340/1549] mrc.sh: remove redundant function extract_ref()

extract_ref() is no longer used

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/mrc.sh | 12 ------------
 1 file changed, 12 deletions(-)

diff --git a/include/mrc.sh b/include/mrc.sh
index eb85e473..62d30a70 100755
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -6,18 +6,6 @@
 
 eval "$(setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL)"
 
-extract_ref()
-{
-	# we check mrc twice, because each check only verifies one file,
-	# but refcode is downloaded alongside mrc. in cases where lbmk
-	# erred, downloading only mrc, we must ensure downloading refcode
-	[ -n "$CONFIG_MRC_FILE" ] || \
-		$err "extract_ref $board: CONFIG_MRC_FILE not defined"
-
-	# the extract_mrc function actually downloads the refcode
-	fetch "mrc" "$MRC_url" "$MRC_url_bkup" "$MRC_hash" "$CONFIG_MRC_FILE"
-}
-
 extract_mrc()
 {
 	[ -z "$MRC_board" ] && $err "extract_mrc $MRC_hash: MRC_board not set"

From 190495d2e51e8fac710e53e6b3bc7afc3de74277 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 12 May 2024 04:15:01 +0100
Subject: [PATCH 0341/1549] disable x301 for next release (for now)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/x301_16mb/target.cfg | 1 +
 config/coreboot/x301_4mb/target.cfg  | 1 +
 config/coreboot/x301_8mb/target.cfg  | 1 +
 3 files changed, 3 insertions(+)

diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index 8688df3f..06f3025c 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index 8688df3f..06f3025c 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index 8688df3f..06f3025c 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+release="n"

From 1ce7e339769c4fd38ce5a3818e5b5835a867422a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 14 May 2024 23:17:22 +0100
Subject: [PATCH 0342/1549] move rom tarball creation to script/roms

export LBMK_RELEASE="y"

if this is done, the tarball is created instead
of a directory, and the rom images are nuked using
./vendor inject with the nuke option, inserting the
correct version files; the rom directory is deleted

now the release script logic simple renames existing
tarballs. the benefit of this change is fewer lines of
code, and now lbmk doesn't use an insane amount of disk
space when building a *lot* of release images (the
uncompressed directories are deleted after each build)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             | 123 ++--------------------------------------------
 include/option.sh |  38 ++++++++++++++
 script/roms       |  29 ++++++++---
 3 files changed, 65 insertions(+), 125 deletions(-)

diff --git a/build b/build
index 9917cd03..41154704 100755
--- a/build
+++ b/build
@@ -223,130 +223,15 @@ mkrom_images()
 	./build roms serprog rp2040 || $err "${_xm}: rp2040"
 	./build roms serprog stm32 || $err "${_xm}: stm32"
 
-	for rombuild in bin/*; do
-		[ -d "${rombuild}" ] || continue
-		handle_rom_archive "${rombuild}"
+	for rombuild in bin/*.tar.xz; do
+		[ -f "${rombuild}" ] || continue
+		tarball="release/$version/roms/${relname}_${rombuild##*/}"
+		mv "$rombuild" "$tarball" || $err "Cannot create $tarball"
 	done
 
 	mv "release/${version}/roms/" ../roms || $err "${_xm}: copy roms/"
 }
 
-handle_rom_archive()
-{
-	builddir="${1}"
-	romdir="tmp/romdir"
-	rm -Rf "${romdir}" || $err "!rm romdir, handle_rom_archive"
-	target="${builddir##*/}"
-
-	if [ ! -f "config/coreboot/${target}/target.cfg" ]; then
-		# No config, just make a tarball
-		tarball="release/${version}/roms/${relname}_${target}.tar.xz"
-		insert_copying_files "${builddir}" || \
-		    $err "!insert copy, handle, ${builddir}"
-		mktarball "${builddir}" "${tarball}"
-		return 0
-	fi
-
-	romdir="${romdir}/bin/${target}"
-	mkdir -p "${romdir}" || $err "!mkdir -p romdir, handle_rom_archive"
-	cp "$builddir/"* "$romdir" || $err "!cp romdir, handle_rom_archive"
-
-	nukerom
-
-	printf "Generating release/%s/roms/%s-%s_%s.tar.xz\n" \
-	    "${version}" "${projectname}" "${version}" "${target##*/}"
-	insert_version_files "${romdir}" || \
-	    $err "mkrom_tarball ${romdir}: versionfile"
-
-	insert_copying_files "$romdir" || $err "!insert copy, handle 2, $romdir"
-	mkrom_tarball
-}
-
-nukerom()
-{
-	. "config/coreboot/${target}/target.cfg"
-
-	# Hash the images before removing vendor files
-	# which "./vendor inject" uses for verification
-	rm -f "${romdir}/vendorhashes" || $err "!rm ${romdir}/vendorhashes"
-	touch "${romdir}/vendorhashes" || $err "!touch ${romdir}/vendorhashes"
-	(
-	cd "${romdir}" || $err "!cd romdir ${romdir}, nukerom"
-	sha512sum ./*.rom >> vendorhashes || \
-	    $err "!create vendorhashes, nukerom"
-	) || $err "can't create vendor hashes"
-
-	for romfile in "${romdir}"/*.rom; do
-		[ -f "${romfile}" ] || continue
-		./vendor inject -r "$romfile" -b "$target" -n nuke || \
-		    $err "!vendor inject (nuke) ${romfile}, nukerom"
-	done
-}
-
-insert_copying_files()
-{
-	remkdir "${1}/licenses"
-	l="${1}/licenses"
-	# copy licenses to rom image archive, for completion
-	cp "src/grub/COPYING" "${l}/COPYING.grub" || return 1
-	cp "src/coreboot/default/COPYING" "${l}/COPYING.coreboot" || return 1
-	cp -R "src/coreboot/default/LICENSES" "${l}/LICENSES.coreboot" || \
-	    return 1
-	cp "src/seabios/default/COPYING" "${l}/COPYING.coreboot" || return 1
-	cp "src/seabios/default/COPYING.LESSER" "$l/COPYING.LESSER.seabios" \
-	    || return 1
-	cp -R "src/u-boot/default/Licenses" "${l}/COPYING.u-boot" || return 1
-	printf "Multiple licenses. Check corresponding %s source archive\n" \
-	    "${projectname}" > "${1}/COPYING" || return 1
-	rm -f src/u-boot/*/test/lib/strlcat.c || return 1
-}
-
-mkrom_tarball()
-{
-	archivename="${relname}_${target##*/}"
-	f="release/${version}/roms/${archivename}"
-	mkdir -p "${f%/*}" || $err "mkrom_tarball: !mkdir -p ${f%/*}"
-	(
-	cd "${romdir%"/bin/$target"}" || $err "!cd ${romdir%"/bin/$target"}"
-	mktarball "bin/${target}" "${archivename}.tar.xz"
-	) || $err "can't create rom tarball"
-	mv "${romdir%"/bin/${target}"}/${archivename}.tar.xz"* "${f%/*}" || \
-	    $err "mktar ${f%/*}/${romdir%"/bin/$target"}/$archivename.tar.xz"
-
-	printf "Created ROM archive: %s" "${f%/*}/${archivename}.tar.xz"
-}
-
-insert_version_files()
-{
-	printf "%s\n" "${version}" > "${1}/version" || return 1
-	printf "%s\n" "${versiondate}" > "${1}/versiondate" || return 1
-	printf "%s\n" "${projectname}" > "${1}/projectname" || return 1
-}
-
-mktarball()
-{
-	# preserve timestamps for reproducible tarballs
-	tar_implementation=$(tar --version | head -n1) || :
-
-	[ "${2%/*}" = "${2}" ] || \
-		mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
-	printf "\nCreating archive: %s\n\n" "$2"
-	if [ "${tar_implementation% *}" = "tar (GNU tar)" ]; then
-		tar --sort=name --owner=root:0 --group=root:0 \
-		    --mtime="UTC 2024-05-04" -c "$1" | xz -T$threads -9e \
-		    > "$2" || $err "mktarball 1, ${1}"
-	else
-		# TODO: reproducible tarballs on non-GNU systems
-		tar -c "$1" | xz -T$threads -9e > "$2" || \
-		    $err "mktarball 2, $1"
-	fi
-	(
-	[ "${2%/*}" != "${2}" ] && x_ cd "${2%/*}"
-	sha512sum "${2##*/}" > "${2##*/}.sha512" || \
-	    $err "!sha512sum \"${2##*/}\" > \"${2##*/}.sha512\""
-	) || $err "failed to create tarball checksum"
-}
-
 mkversion()
 {
 	printf "revision: %s %s\n" "$projectname" "$version"
diff --git a/include/option.sh b/include/option.sh
index b79c34f4..b974c630 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -171,3 +171,41 @@ check_project()
 	done
 	export LOCALVERSION="-${projectname}-${version%%-*}"
 }
+
+mktar_release()
+{
+	x_ insert_version_files "$1"
+	mktarball "$1" "${1}.tar.xz"
+	x_ rm -Rf "$1"
+}
+
+mktarball()
+{
+	# preserve timestamps for reproducible tarballs
+	tar_implementation=$(tar --version | head -n1) || :
+
+	[ "${2%/*}" = "${2}" ] || \
+		mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
+	printf "\nCreating archive: %s\n\n" "$2"
+	if [ "${tar_implementation% *}" = "tar (GNU tar)" ]; then
+		tar --sort=name --owner=root:0 --group=root:0 \
+		    --mtime="UTC 2024-05-04" -c "$1" | xz -T$threads -9e \
+		    > "$2" || $err "mktarball 1, ${1}"
+	else
+		# TODO: reproducible tarballs on non-GNU systems
+		tar -c "$1" | xz -T$threads -9e > "$2" || \
+		    $err "mktarball 2, $1"
+	fi
+	(
+	[ "${2%/*}" != "${2}" ] && x_ cd "${2%/*}"
+	sha512sum "${2##*/}" > "${2##*/}.sha512" || \
+	    $err "!sha512sum \"${2##*/}\" > \"${2##*/}.sha512\""
+	) || $err "failed to create tarball checksum"
+}
+
+insert_version_files()
+{
+	printf "%s\n" "${version}" > "${1}/version" || return 1
+	printf "%s\n" "${versiondate}" > "${1}/versiondate" || return 1
+	printf "%s\n" "${projectname}" > "${1}/projectname" || return 1
+}
diff --git a/script/roms b/script/roms
index ce7e52f2..b48bb7a0 100755
--- a/script/roms
+++ b/script/roms
@@ -66,11 +66,16 @@ main()
 		done
 	fi
 
-	[ -z "${targets}" ] && $err "No ROM images were compiled"
-	printf "\nROM images available in these directories:\n"
-	eval "printf \"${targets}\""
-	printf "^^ ROM images available in these directories.\n\n"
+	bstr="directories"
+	[ "$lbmk_release" = "y" ] && bstr="tarballs"
 
+	[ -z "${targets}" ] && $err "No ROM images were compiled"
+	printf "\nROM images available in these %s:\n" "$bstr"
+	eval "printf \"${targets}\""
+	printf "^^ ROM images available in these %s.\n\n" "$bstr"
+
+	[ "$lbmk_release" = "y" ] && \
+		printf "Always run the inject command on release images!\n"
 	printf "DO NOT flash images from elf/ - please use bin/ instead.\n"
 }
 
@@ -89,6 +94,7 @@ handle_serprog()
 
 	if [ $# -gt 1 ] && [ "${2}" = "list" ]; then
 		print_serprog_boards ${serprog_boards_dir}
+		return 0
 	elif [ $# -gt 1 ]; then
 		build_${1}_rom "${2}"
 	else
@@ -98,6 +104,8 @@ handle_serprog()
 				build_${1}_rom "${board}"
 			done
 	fi
+
+	[ "$lbmk_release" = "y" ] && mktar_release "bin/serprog_$1"; return 0
 }
 
 build_rp2040_rom()
@@ -151,7 +159,9 @@ handle_coreboot_target()
 	build_target_mainboard
 
 	[ -d "bin/${board}" ] || return 0
-	targets="* bin/${board}\n${targets}"
+	[ "$lbmk_release" = "y" ] || targets="* bin/${board}\n${targets}"
+	[ "$lbmk_release" = "y" ] && targets="* bin/$board.tar.xz\n$targets"
+	[ "$lbmk_release" = "y" ] && mktar_release "bin/$board"; return 0
 }
 
 configure_target()
@@ -264,7 +274,7 @@ build_uboot_payload()
 
 build_target_mainboard()
 {
-	rm -f "${romdir}/"* || $err "!prepare, rm files, ${romdir}"
+	x_ rm -Rf "${romdir}"
 
 	for x in "normal" "vgarom" "libgfxinit"; do
 		initmode="${x}"
@@ -460,6 +470,13 @@ moverom()
 
 	x_ mkdir -p "${2%/*}"
 	x_ cp "$1" "$2"
+	[ "$lbmk_release" = "y" ] || return 0
+
+	(
+	cd "${2%/*}" || $err "moverom, !cd \"${2%/*}\""
+	sha512sum ./"${2##*/}" >> vendorhashes || $err "!$2 vendorhashes"
+	) || $err "Cannot create checksum for '$2'"
+	x_ ./vendor inject -r "${2}" -b "$board" -n nuke
 }
 
 usage()

From 08c9f94a1abbff54d601f31519b70cdda7074ec4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 00:37:12 +0100
Subject: [PATCH 0343/1549] unified sha512sum creation for tarballs

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/option.sh | 11 ++++++++---
 script/roms       |  5 +----
 2 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/include/option.sh b/include/option.sh
index b974c630..c42327d4 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -196,10 +196,15 @@ mktarball()
 		tar -c "$1" | xz -T$threads -9e > "$2" || \
 		    $err "mktarball 2, $1"
 	fi
+	mksha512sum "${2}" "${2##*/}.sha512"
+}
+
+mksha512sum()
+{
 	(
-	[ "${2%/*}" != "${2}" ] && x_ cd "${2%/*}"
-	sha512sum "${2##*/}" > "${2##*/}.sha512" || \
-	    $err "!sha512sum \"${2##*/}\" > \"${2##*/}.sha512\""
+	[ "${1%/*}" != "${1}" ] && x_ cd "${1%/*}"
+	sha512sum ./"${1##*/}" >> "${2}" || \
+	    $err "!sha512sum \"${1}\" > \"${2}\""
 	) || $err "failed to create tarball checksum"
 }
 
diff --git a/script/roms b/script/roms
index b48bb7a0..2908dc3a 100755
--- a/script/roms
+++ b/script/roms
@@ -472,10 +472,7 @@ moverom()
 	x_ cp "$1" "$2"
 	[ "$lbmk_release" = "y" ] || return 0
 
-	(
-	cd "${2%/*}" || $err "moverom, !cd \"${2%/*}\""
-	sha512sum ./"${2##*/}" >> vendorhashes || $err "!$2 vendorhashes"
-	) || $err "Cannot create checksum for '$2'"
+	mksha512sum "${2}" "vendorhashes"
 	x_ ./vendor inject -r "${2}" -b "$board" -n nuke
 }
 

From 267c13cca73f23edb32a1fa7bff153d39aed9f45 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 00:42:27 +0100
Subject: [PATCH 0344/1549] cleanup: remove mkvdir

this function is not needed, because it's only called
once and it's very small.

furthermore: insert_version_files does ntot need to be called here,
because they same files are generated immediately afterward when
running that version of lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/build b/build
index 41154704..01166982 100755
--- a/build
+++ b/build
@@ -146,20 +146,14 @@ mkrelease()
 	srcdir="${vdir}/${src_dirname}"
 
 	[ -e "${vdir}" ] && $err "already exists: \"${vdir}\""
+	mkdir -p "${vdir}" || $err "mkvdir: !mkdir -p \"${vdir}\""
+	git clone . "${srcdir}" || $err "mkdir: !gitclone \"${srcdir}\""
 
-	mkvdir
 	build_release
 
 	printf "\n\nDONE! Check release files under %s\n" "${vdir}"
 }
 
-mkvdir()
-{
-	mkdir -p "${vdir}" || $err "mkvdir: !mkdir -p \"${vdir}\""
-	git clone . "${srcdir}" || $err "mkdir: !gitclone \"${srcdir}\""
-	insert_version_files "$srcdir" || $err "mkvdir $srcdir: versionfile"
-}
-
 build_release()
 {
 	_xm="build_release ${vdir}"

From f0b604fc9591c1679c9470f747abcf471fddb162 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 00:45:01 +0100
Subject: [PATCH 0345/1549] option.sh: remove insert_version_files()

it's only called once, from this file, within a small
function, and the function itself is very small.

remove, and put the contents of the function in the
calling function.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/option.sh | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/include/option.sh b/include/option.sh
index c42327d4..eea50101 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -174,7 +174,10 @@ check_project()
 
 mktar_release()
 {
-	x_ insert_version_files "$1"
+	printf "%s\n" "${version}" > "${1}/version" || return 1
+	printf "%s\n" "${versiondate}" > "${1}/versiondate" || return 1
+	printf "%s\n" "${projectname}" > "${1}/projectname" || return 1
+
 	mktarball "$1" "${1}.tar.xz"
 	x_ rm -Rf "$1"
 }
@@ -207,10 +210,3 @@ mksha512sum()
 	    $err "!sha512sum \"${1}\" > \"${2}\""
 	) || $err "failed to create tarball checksum"
 }
-
-insert_version_files()
-{
-	printf "%s\n" "${version}" > "${1}/version" || return 1
-	printf "%s\n" "${versiondate}" > "${1}/versiondate" || return 1
-	printf "%s\n" "${projectname}" > "${1}/projectname" || return 1
-}

From 36d45474c0ddde8da030f8a482829c9379b8097a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 00:48:08 +0100
Subject: [PATCH 0346/1549] option.sh: don't bother checking for GNU tar

releases aren't reproducible anyway. we were
using options available in gnu tar for this.

it will be revisited at a later date. however, the next
time this is done, we will use another method because
there are in fact portable ways to create tarballs
reproducibly, documented on reproducible-builds.org

to be revisited, at a later date. for now, remove bloat.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/option.sh | 14 ++------------
 1 file changed, 2 insertions(+), 12 deletions(-)

diff --git a/include/option.sh b/include/option.sh
index eea50101..f5b07b49 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -184,21 +184,11 @@ mktar_release()
 
 mktarball()
 {
-	# preserve timestamps for reproducible tarballs
-	tar_implementation=$(tar --version | head -n1) || :
-
 	[ "${2%/*}" = "${2}" ] || \
 		mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
 	printf "\nCreating archive: %s\n\n" "$2"
-	if [ "${tar_implementation% *}" = "tar (GNU tar)" ]; then
-		tar --sort=name --owner=root:0 --group=root:0 \
-		    --mtime="UTC 2024-05-04" -c "$1" | xz -T$threads -9e \
-		    > "$2" || $err "mktarball 1, ${1}"
-	else
-		# TODO: reproducible tarballs on non-GNU systems
-		tar -c "$1" | xz -T$threads -9e > "$2" || \
-		    $err "mktarball 2, $1"
-	fi
+	tar -c "$1" | xz -T$threads -9e > "$2" || \
+	    $err "mktarball 2, $1"
 	mksha512sum "${2}" "${2##*/}.sha512"
 }
 

From 189b70ddcb2c7b69a93b3b74b801ba588ccb60ef Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 01:23:22 +0100
Subject: [PATCH 0347/1549] build/roms: create full release tarball name

set relname from option.sh under check_project()

now the release logic simply has to move a directory

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             | 13 ++-----------
 include/option.sh |  7 +++++--
 script/roms       |  3 ++-
 3 files changed, 9 insertions(+), 14 deletions(-)

diff --git a/build b/build
index 01166982..aa6d99dc 100755
--- a/build
+++ b/build
@@ -16,8 +16,7 @@ fi
 . "include/vendor.sh"
 . "include/mrc.sh"
 
-eval "$(setvars "" script_path aur_notice vdir relname src_dirname srcdir \
-    _xm target romdir mode)"
+eval "$(setvars "" script_path aur_notice vdir src_dirname srcdir _xm mode)"
 err="fail"
 
 linkpath="${0}"
@@ -140,7 +139,6 @@ mkrelease()
 	check_project
 
 	vdir="${vdir}/${version}"
-	relname="${projectname}-${version}"
 	[ "${mode}" = "u-boot" ] && relname="u-boot-for-${relname}"
 	src_dirname="${relname}_src"
 	srcdir="${vdir}/${src_dirname}"
@@ -216,14 +214,7 @@ mkrom_images()
 	./build roms all || $err "${_xm}: roms-all"
 	./build roms serprog rp2040 || $err "${_xm}: rp2040"
 	./build roms serprog stm32 || $err "${_xm}: stm32"
-
-	for rombuild in bin/*.tar.xz; do
-		[ -f "${rombuild}" ] || continue
-		tarball="release/$version/roms/${relname}_${rombuild##*/}"
-		mv "$rombuild" "$tarball" || $err "Cannot create $tarball"
-	done
-
-	mv "release/${version}/roms/" ../roms || $err "${_xm}: copy roms/"
+	x_ mv bin ../roms
 }
 
 mkversion()
diff --git a/include/option.sh b/include/option.sh
index f5b07b49..7303287d 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -41,7 +41,8 @@ eval "$(setvars "" CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
     CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_GBE_BIN_PATH tmpdir _nogit \
     CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE version \
     CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE _dest board boarddir lbmk_release \
-    CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE threads projectname)"
+    CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE threads projectname \
+    relname)"
 
 # if "y": a coreboot target won't be built if target.cfg says release="n"
 # (this is used to exclude certain build targets from releases)
@@ -169,6 +170,8 @@ check_project()
 		eval "[ -n \"\$$p\" ] || $err \"$p unset\""
 		eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
 	done
+
+	relname="${projectname}-${version}"
 	export LOCALVERSION="-${projectname}-${version%%-*}"
 }
 
@@ -178,7 +181,7 @@ mktar_release()
 	printf "%s\n" "${versiondate}" > "${1}/versiondate" || return 1
 	printf "%s\n" "${projectname}" > "${1}/projectname" || return 1
 
-	mktarball "$1" "${1}.tar.xz"
+	mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz"
 	x_ rm -Rf "$1"
 }
 
diff --git a/script/roms b/script/roms
index 2908dc3a..2d07fa44 100755
--- a/script/roms
+++ b/script/roms
@@ -160,7 +160,8 @@ handle_coreboot_target()
 
 	[ -d "bin/${board}" ] || return 0
 	[ "$lbmk_release" = "y" ] || targets="* bin/${board}\n${targets}"
-	[ "$lbmk_release" = "y" ] && targets="* bin/$board.tar.xz\n$targets"
+	[ "$lbmk_release" = "y" ] && \
+		targets="* bin/${relname}_$board.tar.xz\n$targets"
 	[ "$lbmk_release" = "y" ] && mktar_release "bin/$board"; return 0
 }
 

From 4135ce5e27492c9dba542f2ca8b620b6c1a4e858 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 01:32:15 +0100
Subject: [PATCH 0348/1549] build: use same tarball name on uboot-only release

it's a rarely used feature, not currently used by the
libreboot project itself

remove unnecessary bloat

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 13 +++----------
 1 file changed, 3 insertions(+), 10 deletions(-)

diff --git a/build b/build
index aa6d99dc..ab896706 100755
--- a/build
+++ b/build
@@ -166,16 +166,9 @@ build_release()
 	    $err "build_release $srcdir: couldn't generate changelog"
 
 	(
-	if [ "${mode}" = "u-boot" ]; then
-		cd "${srcdir}/src/" || $err "${_xm}: mktarball \"${srcdir}\""
-		mktarball u-boot "../../${srcdir##*/}.tar.xz" || \
-		    $err "$_xm: mksrc"
-		# make a src archive containing only u-boot
-	else
-		cd "${srcdir%/*}" || $err "${_xm}: mktarball \"${srcdir}\""
-		mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || \
-		    $err "$_xm: mksrc"
-	fi
+	cd "${srcdir%/*}" || $err "${_xm}: mktarball \"${srcdir}\""
+	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || \
+	    $err "$_xm: mksrc"
 	) || $err "can't create src tarball"
 	[ "${mode}" = "src" ] && return 0
 	[ "${mode}" = "u-boot" ] && return 0

From c149cbb8843b9c1af45e8ebb3ecafb764dc8d529 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 01:41:19 +0100
Subject: [PATCH 0349/1549] build: remove mkrom_images

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 13 ++++---------
 1 file changed, 4 insertions(+), 9 deletions(-)

diff --git a/build b/build
index ab896706..71fa9d74 100755
--- a/build
+++ b/build
@@ -175,7 +175,10 @@ build_release()
 
 	(
 	cd "${srcdir}" || $err "${_xm}: 2 !cd \"${srcdir}\""
-	mkrom_images
+	./build roms all || $err "${_xm}: roms-all"
+	./build roms serprog rp2040 || $err "${_xm}: rp2040"
+	./build roms serprog stm32 || $err "${_xm}: stm32"
+	x_ mv bin ../roms
 	) || $err "can't build rom images"
 
 	rm -Rf "${srcdir}" || $err "!rm -Rf ${srcdir}"
@@ -202,14 +205,6 @@ fetch_trees()
 	x_ rm -Rf tmp .git
 }
 
-mkrom_images()
-{
-	./build roms all || $err "${_xm}: roms-all"
-	./build roms serprog rp2040 || $err "${_xm}: rp2040"
-	./build roms serprog stm32 || $err "${_xm}: stm32"
-	x_ mv bin ../roms
-}
-
 mkversion()
 {
 	printf "revision: %s %s\n" "$projectname" "$version"

From e5ffb2afe6ca7cab8982d204709a612ac92090ab Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 02:33:35 +0100
Subject: [PATCH 0350/1549] rm src/u-boot/*/test/lib/strlcat.c in u-boot

i accidentally removed this in a previous commit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 1 +
 1 file changed, 1 insertion(+)

diff --git a/build b/build
index 71fa9d74..dbc6494f 100755
--- a/build
+++ b/build
@@ -200,6 +200,7 @@ fetch_trees()
 		    $err "!rm -Rf \"src/${xp}/${xp}\""
 	done
 
+	rm -f src/u-boot/*/test/lib/strlcat.c || $err "$_xm: rm strlcat"
 	find . -name ".git" -exec rm -Rf {} + || $err "$_xm: rm .git"
 	find . -name ".gitmodules" -exec rm -Rf {} + || $err "$_xm: rm .gitmod"
 	x_ rm -Rf tmp .git

From a40a61292df7dba44bab271c50776643c8f19b82 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 02:36:24 +0100
Subject: [PATCH 0351/1549] build/roms: clean up tarball handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/script/roms b/script/roms
index 2d07fa44..48eba1d5 100755
--- a/script/roms
+++ b/script/roms
@@ -160,9 +160,10 @@ handle_coreboot_target()
 
 	[ -d "bin/${board}" ] || return 0
 	[ "$lbmk_release" = "y" ] || targets="* bin/${board}\n${targets}"
-	[ "$lbmk_release" = "y" ] && \
-		targets="* bin/${relname}_$board.tar.xz\n$targets"
-	[ "$lbmk_release" = "y" ] && mktar_release "bin/$board"; return 0
+	[ "$lbmk_release" = "y" ] || return 0
+
+	targets="* bin/${relname}_$board.tar.xz\n$targets"
+	mktar_release "bin/$board"
 }
 
 configure_target()

From 39df62301d90257f384aaf931d012e4495aaf1c2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 02:49:30 +0100
Subject: [PATCH 0352/1549] build: delete mkversion() (just print relname)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/build b/build
index dbc6494f..aefaadad 100755
--- a/build
+++ b/build
@@ -44,7 +44,7 @@ initcmd()
 	case "${1}" in
 	help) usage ${0} ;;
 	list) items "script" ;;
-	version) mkversion ;;
+	version) printf "%s\n" "$relname" ;;
 	release) shift 1; mkrelease $@ ;;
 	inject) shift 1; vendor_inject $@ ;;
 	download) shift 1; vendor_download $@ ;;
@@ -101,7 +101,7 @@ usage()
 {
 	progname=${0}
 	cat <<- EOF
-	$(mkversion)
+	$relname
 
 	USAGE:	${progname} <OPTION>
 
@@ -206,12 +206,6 @@ fetch_trees()
 	x_ rm -Rf tmp .git
 }
 
-mkversion()
-{
-	printf "revision: %s %s\n" "$projectname" "$version"
-	printf "revision date: %s\n" "$(date -Rud @${versiondate})"
-}
-
 lbmk_exit()
 {
 	tmp_cleanup || err_ "lbmk_exit: can't rm tmpdir upon exit $1: $tmpdir"

From ee2bf0d25aafeb97379ec4b35fd6308fb07d8051 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 02:56:58 +0100
Subject: [PATCH 0353/1549] build: simplify deletions in fetch_trees()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/build b/build
index aefaadad..33b8ded4 100755
--- a/build
+++ b/build
@@ -200,10 +200,9 @@ fetch_trees()
 		    $err "!rm -Rf \"src/${xp}/${xp}\""
 	done
 
-	rm -f src/u-boot/*/test/lib/strlcat.c || $err "$_xm: rm strlcat"
 	find . -name ".git" -exec rm -Rf {} + || $err "$_xm: rm .git"
 	find . -name ".gitmodules" -exec rm -Rf {} + || $err "$_xm: rm .gitmod"
-	x_ rm -Rf tmp .git
+	rm -Rf tmp .git src/u-boot/*/test/lib/strlcat.c || $err "$_xm !rm"
 }
 
 lbmk_exit()

From e281966f2278802d3d59e386a1e5456e0e8b368d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 03:01:25 +0100
Subject: [PATCH 0354/1549] remove check_project() (always set variables)

in lbmk, we call check_project() to set variables
such as projectname, version, version date

this is unnecessary, because all main scripts use
this functionality anyway

do it by default

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             |  6 +-----
 include/option.sh | 47 ++++++++++++++++++++---------------------------
 script/roms       |  2 --
 script/trees      |  1 -
 4 files changed, 21 insertions(+), 35 deletions(-)

diff --git a/build b/build
index 33b8ded4..027360a8 100755
--- a/build
+++ b/build
@@ -29,7 +29,7 @@ main()
 
 	[ "$1" = "dependencies" ] && x_ install_packages $@ && lbmk_exit 0
 
-	for cmd in initcmd check_git check_project git_init excmd; do
+	for cmd in initcmd check_git git_init excmd; do
 		eval "${cmd} \$@"
 	done
 	lbmk_exit 0
@@ -39,8 +39,6 @@ initcmd()
 {
 	[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
 
-	check_project
-
 	case "${1}" in
 	help) usage ${0} ;;
 	list) items "script" ;;
@@ -136,8 +134,6 @@ mkrelease()
 		esac
 	done
 
-	check_project
-
 	vdir="${vdir}/${version}"
 	[ "${mode}" = "u-boot" ] && relname="u-boot-for-${relname}"
 	src_dirname="${relname}_src"
diff --git a/include/option.sh b/include/option.sh
index 7303287d..986e0883 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -70,6 +70,26 @@ expr "X$threads" : "X-\{0,1\}[0123456789][0123456789]*$" \
     1>/dev/null 2>/dev/null || threads=1 # user specified a non-integer
 export LBMK_THREADS="$threads"
 
+x_() {
+	[ $# -lt 1 ] || ${@} || $err "Unhandled non-zero exit: $@"; return 0
+}
+
+read -r projectname < projectname || :
+[ ! -f version ] || read -r version < version || :
+version_="${version}"
+[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
+    version="git-$(git rev-parse HEAD 2>&1)" || version="${version_}"
+[ ! -f versiondate ] || read -r versiondate < versiondate || :
+versiondate_="${versiondate}"
+[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
+    --pretty='%ct' HEAD)" || versiondate="${versiondate_}"
+for p in projectname version versiondate; do
+	eval "[ -n \"\$$p\" ] || $err \"$p unset\""
+	eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
+done
+relname="${projectname}-${version}"
+export LOCALVERSION="-${projectname}-${version%%-*}"
+
 items()
 {
 	rval=1
@@ -132,10 +152,6 @@ remkdir()
 	mkdir -p "${1}" || $err "remkdir: !mkdir -p \"${1}\""
 }
 
-x_() {
-	[ $# -lt 1 ] || ${@} || $err "Unhandled non-zero exit: $@"; return 0
-}
-
 check_git()
 {
 	which git 1>/dev/null 2>/dev/null || \
@@ -152,29 +168,6 @@ git_err()
 	$err "Git name/email not configured"
 }
 
-check_project()
-{
-	read -r projectname < projectname || :
-
-	[ ! -f version ] || read -r version < version || :
-	version_="${version}"
-	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
-	    version="git-$(git rev-parse HEAD 2>&1)" || version="${version_}"
-
-	[ ! -f versiondate ] || read -r versiondate < versiondate || :
-	versiondate_="${versiondate}"
-	[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
-	    --pretty='%ct' HEAD)" || versiondate="${versiondate_}"
-
-	for p in projectname version versiondate; do
-		eval "[ -n \"\$$p\" ] || $err \"$p unset\""
-		eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
-	done
-
-	relname="${projectname}-${version}"
-	export LOCALVERSION="-${projectname}-${version%%-*}"
-}
-
 mktar_release()
 {
 	printf "%s\n" "${version}" > "${1}/version" || return 1
diff --git a/script/roms b/script/roms
index 48eba1d5..6891d2f5 100755
--- a/script/roms
+++ b/script/roms
@@ -31,8 +31,6 @@ eval "$(setvars "" ${v} boards _displaymode _payload _keyboard all targets \
 
 main()
 {
-	check_project
-
 	while [ $# -gt 0 ]; do
 		case ${1} in
 		help)
diff --git a/script/trees b/script/trees
index 615fbbf2..3b126e56 100755
--- a/script/trees
+++ b/script/trees
@@ -37,7 +37,6 @@ main()
 	cfgsdir="config/${project}"
 
 	remkdir "${tmpgit%/*}"
-	check_project
 
 	_cmd="build_projects"
 	[ -f "config/${project}/build.list" ] && _cmd="build_targets"

From 5c3fb9a4f887b8fb767f40cb12fcc097ac12d110 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 03:10:25 +0100
Subject: [PATCH 0355/1549] build: use utc+0 when initialising git repo dates

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build b/build
index 027360a8..708e89ae 100755
--- a/build
+++ b/build
@@ -78,7 +78,7 @@ git_init()
 {
 	[ -L ".git" ] && $err "Reference .git is a symlink"
 	[ -e ".git" ] && return 0
-	eval "$(setvars "$(date -Rd @${versiondate})" cdate _nogit)"
+	eval "$(setvars "$(date -Rud @${versiondate})" cdate _nogit)"
 
 	git init || $err "${PWD}: cannot initialise Git repository"
 	git add -A . || $err "${PWD}: cannot add files to Git repository"

From 914ff1ad12487eac7a65f885fc24cc00f0073b29 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 03:19:32 +0100
Subject: [PATCH 0356/1549] ./build release: don't do u-boot-only archives

it's a pointless feature, initially added just to one-up
gnuboot and only intended for canoeboot, to provide u-boot
tarballs with deblobbing. this was done, because the parabola
build system has certain limitations so the idea is to provide
them with tarballs. but why? they can just fix their build system...

delete this bloat from lbmk. we only need to provide full sources,
and rom images.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/build b/build
index 708e89ae..4dec3734 100755
--- a/build
+++ b/build
@@ -135,7 +135,6 @@ mkrelease()
 	done
 
 	vdir="${vdir}/${version}"
-	[ "${mode}" = "u-boot" ] && relname="u-boot-for-${relname}"
 	src_dirname="${relname}_src"
 	srcdir="${vdir}/${src_dirname}"
 
@@ -154,7 +153,7 @@ build_release()
 	(
 	cd "${srcdir}" || $err "${_xm}: !cd \"${srcdir}\""
 	fetch_trees
-	[ "${mode}" = "u-boot" ] || x_ mv src/docs docs
+	x_ mv src/docs docs
 	) || $err "can't create release files"
 
 	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
@@ -167,7 +166,6 @@ build_release()
 	    $err "$_xm: mksrc"
 	) || $err "can't create src tarball"
 	[ "${mode}" = "src" ] && return 0
-	[ "${mode}" = "u-boot" ] && return 0
 
 	(
 	cd "${srcdir}" || $err "${_xm}: 2 !cd \"${srcdir}\""
@@ -183,11 +181,9 @@ build_release()
 fetch_trees()
 {
 	for x in config/git/*; do
-		[ "${mode}" = "u-boot" ] && break
 		[ ! -f "${x}" ] || ./update trees -f "${x#config/git/}" || \
 		    $err "${_xm}: fetch ${x#config/git/}"
 	done
-	[ "${mode}" = "u-boot" ] && x_ ./update trees -f u-boot
 
 	for x in config/*/build.list; do
 		[ -f "${x}" ] || continue

From 8e05399d9114efc422e75bfc477887013c6840df Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 03:39:28 +0100
Subject: [PATCH 0357/1549] build: simplified downloads in fetch_trees()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/build b/build
index 4dec3734..6d720f86 100755
--- a/build
+++ b/build
@@ -180,9 +180,8 @@ build_release()
 
 fetch_trees()
 {
-	for x in config/git/*; do
-		[ ! -f "${x}" ] || ./update trees -f "${x#config/git/}" || \
-		    $err "${_xm}: fetch ${x#config/git/}"
+	for x in $(items config/git); do
+		./update trees -f "$x" || $err "$_xm: fetch $x"
 	done
 
 	for x in config/*/build.list; do

From 350857fff3e4300dad38c8b322188517dd7cb0da Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 03:53:26 +0100
Subject: [PATCH 0358/1549] build: simplify for loop in fetch_trees()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/build b/build
index 6d720f86..15389d7f 100755
--- a/build
+++ b/build
@@ -185,10 +185,8 @@ fetch_trees()
 	done
 
 	for x in config/*/build.list; do
-		[ -f "${x}" ] || continue
-		xp="${x#*/}"; xp="${xp%/*}"
-		[ -L "${xp}" ] || rm -Rf "src/${xp}/${xp}" || \
-		    $err "!rm -Rf \"src/${xp}/${xp}\""
+		[ -f "$x" ] && xp="${x#*/}" && xp="${xp%/*}"
+		[ ! -f "$x" ] || [ -L "$xp" ] || x_ rm -Rf "src/$xp/$xp"
 	done
 
 	find . -name ".git" -exec rm -Rf {} + || $err "$_xm: rm .git"

From 313c4c01e0ec22eb2c2872baa4a116428d136339 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 03:55:44 +0100
Subject: [PATCH 0359/1549] build: define "xp" in the global variables

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build b/build
index 15389d7f..3a345e11 100755
--- a/build
+++ b/build
@@ -16,7 +16,7 @@ fi
 . "include/vendor.sh"
 . "include/mrc.sh"
 
-eval "$(setvars "" script_path aur_notice vdir src_dirname srcdir _xm mode)"
+eval "$(setvars "" script_path aur_notice vdir src_dirname srcdir _xm mode xp)"
 err="fail"
 
 linkpath="${0}"

From c6ba0a0e9b297606e89bd82655e48c40ac01becc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 04:02:48 +0100
Subject: [PATCH 0360/1549] option.sh: delete check_git()

it's only used from main() in the main build script,
and it's very small, as is main()

therefore, move the logic into main()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             |  9 ++++++++-
 include/option.sh | 10 ----------
 2 files changed, 8 insertions(+), 11 deletions(-)

diff --git a/build b/build
index 3a345e11..2d95a500 100755
--- a/build
+++ b/build
@@ -29,7 +29,14 @@ main()
 
 	[ "$1" = "dependencies" ] && x_ install_packages $@ && lbmk_exit 0
 
-	for cmd in initcmd check_git git_init excmd; do
+	which git 1>/dev/null 2>/dev/null || \
+	    git_err "git not installed. please install git-scm."
+	git config --global user.name 1>/dev/null 2>/dev/null || \
+	    git_err "git config --global user.name \"John Doe\""
+	git config --global user.email 1>/dev/null 2>/dev/null || \
+	    git_err "git config --global user.email \"john.doe@example.com\""
+
+	for cmd in initcmd git_init excmd; do
 		eval "${cmd} \$@"
 	done
 	lbmk_exit 0
diff --git a/include/option.sh b/include/option.sh
index 986e0883..26867772 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -152,16 +152,6 @@ remkdir()
 	mkdir -p "${1}" || $err "remkdir: !mkdir -p \"${1}\""
 }
 
-check_git()
-{
-	which git 1>/dev/null 2>/dev/null || \
-	    git_err "git not installed. please install git-scm."
-	git config --global user.name 1>/dev/null 2>/dev/null || \
-	    git_err "git config --global user.name \"John Doe\""
-	git config --global user.email 1>/dev/null 2>/dev/null || \
-	    git_err "git config --global user.email \"john.doe@example.com\""
-}
-
 git_err()
 {
 	printf "You need to set git name/email, like so:\n%s\n\n" "$1" 1>&2

From 885fcebd81052bfb39a8889988045584870aa760 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 15 May 2024 04:30:42 +0100
Subject: [PATCH 0361/1549] remove help commands (user should read docs)

i always say, code should never document itself.

that's what documentation is for. the releases
contain documentation under docs/ but the git
repository does not; for that, use the website.

(in practise, lbmk usually needs internet anyway)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build       | 31 ++-----------------------------
 script/roms | 51 ++-------------------------------------------------
 2 files changed, 4 insertions(+), 78 deletions(-)

diff --git a/build b/build
index 2d95a500..61836eb5 100755
--- a/build
+++ b/build
@@ -25,7 +25,7 @@ linkname="${linkpath##*/}"
 main()
 {
 	x_ id -u 1>/dev/null 2>/dev/null
-	[ $# -lt 1 ] && $err "Too few arguments. Try: ${0} help"
+	[ $# -lt 1 ] && $err "Check $projectname documentation for help."
 
 	[ "$1" = "dependencies" ] && x_ install_packages $@ && lbmk_exit 0
 
@@ -47,8 +47,6 @@ initcmd()
 	[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
 
 	case "${1}" in
-	help) usage ${0} ;;
-	list) items "script" ;;
 	version) printf "%s\n" "$relname" ;;
 	release) shift 1; mkrelease $@ ;;
 	inject) shift 1; vendor_inject $@ ;;
@@ -98,35 +96,10 @@ git_init()
 
 excmd()
 {
-	[ -f "${script_path}" ] || $err "Bad command. Run: ${linkpath} help"
+	[ -f "${script_path}" ] || $err "Bad command. Check $projectname docs."
 	shift 1; "$script_path" $@ || $err "excmd: ${script_path} ${@}"
 }
 
-usage()
-{
-	progname=${0}
-	cat <<- EOF
-	$relname
-
-	USAGE:	${progname} <OPTION>
-
-	possible values for 'OPTION':
-	$(items "script")
-
-	Special commands (consult $projectname documentation):
-	./vendor inject
-	./vendor download
-	./update release
-	./build dependencies distroname
-	(replace distroname with a filename from config/dependencies/)
-
-	To know what ${projectname} version you're on, type:
-	${progname} version
-
-	Refer to ${projectname} documentation for more info.
-	EOF
-}
-
 mkrelease()
 {
 	export LBMK_RELEASE="y"
diff --git a/script/roms b/script/roms
index 6891d2f5..ac3d28ef 100755
--- a/script/roms
+++ b/script/roms
@@ -10,7 +10,6 @@ set -u -e
 
 . "include/option.sh"
 
-serprog_usage="usage: ./build roms serprog <rp2040|stm32> [board]"
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 grub_background="background1280x800.png"
 grubelf="elf/grub/grub.elf"
@@ -33,9 +32,6 @@ main()
 {
 	while [ $# -gt 0 ]; do
 		case ${1} in
-		help)
-			usage
-			exit 0 ;;
 		list)
 			x_ items config/coreboot
 			return 0 ;;
@@ -79,8 +75,8 @@ main()
 
 handle_serprog()
 {
-	[ -z "${1+x}" ] && $err "${serprog_usage}"
-	[ "$1" != "rp2040" ] && [ "$1" != "stm32" ] && $err "$serprog_usage"
+	[ -z "${1+x}" ] && $err "bad command. Check $projectname docs."
+	[ "$1" != "rp2040" ] && [ "$1" != "stm32" ] && $err "bad command"
 	if [ "${1}" = "rp2040" ]; then
 		serprog_boards_dir=${pico_sdk_dir}/src/boards/include/boards
 		[ -d "$pico_src_dir" ] || x_ ./update trees -f "pico-serprog"
@@ -476,47 +472,4 @@ moverom()
 	x_ ./vendor inject -r "${2}" -b "$board" -n nuke
 }
 
-usage()
-{
-	cat <<- EOF
-	USAGE:	./build roms targetname
-	To build *all* boards, do this: ./build roms all
-	To list *all* boards, do this: ./build roms list
-	
-	Optional Flags:
-	-d: displaymode
-	-p: payload
-	-k: keyboard layout
-
-	Example commands:
-
-		./build roms x60
-		./build roms x200_8mb x60
-		./build roms x60 -p grub -d corebootfb -k usqwerty
-
-	to see possible values for 'target':
-
-		./build roms list
-
-	Can also build serprog images:
-	${serprog_usage}		
-
-	to see targets of only a given status (stable, unstable,
-	broken, untested and unknown), try e.g.
-
-		./build roms list stable
-		./build roms list unstable untested
-		./build roms list unknown
-		./build roms list broken
-		./build roms list broken stable
-
-	the value is set in target.cfg for each board. if status
-	is unitialised, it defaults to "unknown". only stable/unstable
-	targets are permitted in releases; broken, untested and
-	unknown are not allowed, but are accessible via normal building
-
-	Refer to the ${projectname} documentation for more information.
-	EOF
-}
-
 main $@

From 839ef680cd8f25650d8fb59a3e6fe6bf3f84786b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 16 May 2024 03:56:52 +0100
Subject: [PATCH 0362/1549] lbmk: allow easier sync with cbmk

an equivalent change has been made in cbmk.

certain lbmk-specific variable names have been made
generic, with certain functions and other variables
moved around.

i maintain sync between libreboot and canoeboot, where
both projects can have the same behaviours, and most of
the merge conflicts have to do with variable names
containing "LBMK", "lbmk", "cbmk" or "CBMK", or
indeed "canoeboot" and "libreboot"

LBMK/lbmk/CBMK/cbmk variables between canoeboot and
libreboot now contain the string XBMK/xbmk

it should now be *much* easier to merge build system
changes between lbmk and cbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             | 18 +++++++++---------
 include/option.sh | 28 ++++++++++------------------
 include/vendor.sh | 14 +++++++++++---
 script/roms       | 14 +++++++-------
 4 files changed, 37 insertions(+), 37 deletions(-)

diff --git a/build b/build
index 61836eb5..b6311846 100755
--- a/build
+++ b/build
@@ -8,7 +8,7 @@
 set -u -e
 
 if [ "./${0##*/}" != "${0}" ] || [ ! -f "build" ] || [ -L "build" ]; then
-	printf "You must run this in the lbmk work directory.\n" 1>&2
+	printf "You must run this in the proper work directory.\n" 1>&2
 	exit 1
 fi
 
@@ -27,7 +27,7 @@ main()
 	x_ id -u 1>/dev/null 2>/dev/null
 	[ $# -lt 1 ] && $err "Check $projectname documentation for help."
 
-	[ "$1" = "dependencies" ] && x_ install_packages $@ && lbmk_exit 0
+	[ "$1" = "dependencies" ] && x_ install_packages $@ && xbmk_exit 0
 
 	which git 1>/dev/null 2>/dev/null || \
 	    git_err "git not installed. please install git-scm."
@@ -39,7 +39,7 @@ main()
 	for cmd in initcmd git_init excmd; do
 		eval "${cmd} \$@"
 	done
-	lbmk_exit 0
+	xbmk_exit 0
 }
 
 initcmd()
@@ -56,7 +56,7 @@ initcmd()
 		return 0 ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
-	lbmk_exit 0
+	xbmk_exit 0
 }
 
 install_packages()
@@ -78,7 +78,7 @@ install_packages()
 }
 
 # release archives contain .gitignore, but not .git.
-# lbmk can be run from lbmk.git, or an archive.
+# xbmk can be run from xbmk.git, or an archive.
 git_init()
 {
 	[ -L ".git" ] && $err "Reference .git is a symlink"
@@ -88,7 +88,7 @@ git_init()
 	git init || $err "${PWD}: cannot initialise Git repository"
 	git add -A . || $err "${PWD}: cannot add files to Git repository"
 	git commit -m "${projectname} ${version}" --date "${cdate}" \
-	    --author="lbmk <lbmk@libreboot.org>" || \
+	    --author="xbmk <xbmk@example.com>" || \
 	    $err "$PWD: can't commit ${projectname}/${version}, date $cdate"
 	git tag -a "${version}" -m "${projectname} ${version}" || \
 	    $err "${PWD}: cannot git-tag ${projectname}/${version}"
@@ -102,7 +102,7 @@ excmd()
 
 mkrelease()
 {
-	export LBMK_RELEASE="y"
+	export XBMK_RELEASE="y"
 
 	vdir="release"
 	while getopts d:m: option; do
@@ -174,9 +174,9 @@ fetch_trees()
 	rm -Rf tmp .git src/u-boot/*/test/lib/strlcat.c || $err "$_xm !rm"
 }
 
-lbmk_exit()
+xbmk_exit()
 {
-	tmp_cleanup || err_ "lbmk_exit: can't rm tmpdir upon exit $1: $tmpdir"
+	tmp_cleanup || err_ "xbmk_exit: can't rm tmpdir upon exit $1: $tmpdir"
 	exit $1
 }
 
diff --git a/include/option.sh b/include/option.sh
index 26867772..b2e94a6a 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -7,8 +7,6 @@ export LC_COLLATE=C
 export LC_ALL=C
 
 tmpdir_was_set="y"
-vendir="vendorfiles"
-appdir="${vendir}/app"
 cbdir="src/coreboot/default"
 cbcfgsdir="config/coreboot"
 ifdtool="cbutils/default/ifdtool"
@@ -35,40 +33,34 @@ setvars()
 	done
 	printf "%s\n" "${_setvars% }"
 }
-eval "$(setvars "" CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
-    CONFIG_ME_BIN_PATH CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 versiondate \
-    CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW2_OFFSET \
-    CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_GBE_BIN_PATH tmpdir _nogit \
-    CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE version \
-    CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE _dest board boarddir lbmk_release \
-    CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE threads projectname \
-    relname)"
+eval "$(setvars "" versiondate tmpdir _nogit version board boarddir \
+    xbmk_release threads projectname relname)"
 
 # if "y": a coreboot target won't be built if target.cfg says release="n"
 # (this is used to exclude certain build targets from releases)
-set | grep LBMK_RELEASE 1>/dev/null 2>/dev/null || lbmk_release="n" || :
-[ -z "$lbmk_release" ] && lbmk_release="$LBMK_RELEASE"
-[ "$lbmk_release" = "n" ] || [ "$lbmk_release" = "y" ] || lbmk_release="n"
-export LBMK_RELEASE="$lbmk_release"
+set | grep XBMK_RELEASE 1>/dev/null 2>/dev/null || xbmk_release="n" || :
+[ -z "$xbmk_release" ] && xbmk_release="$XBMK_RELEASE"
+[ "$xbmk_release" = "n" ] || [ "$xbmk_release" = "y" ] || xbmk_release="n"
+export XBMK_RELEASE="$xbmk_release"
 
 set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"
 if [ "${tmpdir_was_set}" = "y" ]; then
-	[ "${TMPDIR%_*}" = "/tmp/lbmk" ] || tmpdir_was_set="n"
+	[ "${TMPDIR%_*}" = "/tmp/xbmk" ] || tmpdir_was_set="n"
 fi
 if [ "${tmpdir_was_set}" = "n" ]; then
 	export TMPDIR="/tmp"
-	tmpdir="$(mktemp -d -t lbmk_XXXXXXXX)"
+	tmpdir="$(mktemp -d -t xbmk_XXXXXXXX)"
 	export TMPDIR="${tmpdir}"
 else
 	export TMPDIR="${TMPDIR}"
 	tmpdir="${TMPDIR}"
 fi
 
-set | grep LBMK_THREADS 1>/dev/null 2>/dev/null && threads="$LBMK_THREADS"
+set | grep XBMK_THREADS 1>/dev/null 2>/dev/null && threads="$XBMK_THREADS"
 [ -z "$threads" ] && threads=1
 expr "X$threads" : "X-\{0,1\}[0123456789][0123456789]*$" \
     1>/dev/null 2>/dev/null || threads=1 # user specified a non-integer
-export LBMK_THREADS="$threads"
+export XBMK_THREADS="$threads"
 
 x_() {
 	[ $# -lt 1 ] || ${@} || $err "Unhandled non-zero exit: $@"; return 0
diff --git a/include/vendor.sh b/include/vendor.sh
index 1904de8e..3fdb7225 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -11,12 +11,20 @@ me7updateparser="${PWD}/util/me7_update_parser/me7_update_parser.py"
 pfs_extract="${PWD}/src/biosutilities/Dell_PFS_Extract.py"
 uefiextract="${PWD}/src/uefitool/uefiextract"
 nvmutil="util/nvmutil/nvm"
+vendir="vendorfiles"
+appdir="${vendir}/app"
 
-eval "$(setvars "" _b _dl EC_url EC_url_bkup EC_hash DL_hash DL_url DL_url_bkup \
+eval "$(setvars "" _b EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
     E6400_VGA_romname SCH5545EC_DL_url SCH5545EC_DL_url_bkup SCH5545EC_DL_hash \
-    tree mecleaner kbc1126_ec_dump MRC_refcode_cbtree MRC_refcode_gbe new_mac \
-    cbfstoolref release nukemode modifygbe rom archive)"
+    mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl CONFIG_HAVE_MRC \
+    CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_ME_BIN archive EC_url modifygbe \
+    CONFIG_ME_BIN_PATH CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 _dest tree \
+    CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW2_OFFSET rom \
+    CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_GBE_BIN_PATH release DL_url \
+    CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE nukemode \
+    CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB cbfstoolref \
+    CONFIG_REFCODE_BLOB_FILE)"
 
 vendor_download()
 {
diff --git a/script/roms b/script/roms
index ac3d28ef..7c181c36 100755
--- a/script/roms
+++ b/script/roms
@@ -61,14 +61,14 @@ main()
 	fi
 
 	bstr="directories"
-	[ "$lbmk_release" = "y" ] && bstr="tarballs"
+	[ "$xbmk_release" = "y" ] && bstr="tarballs"
 
 	[ -z "${targets}" ] && $err "No ROM images were compiled"
 	printf "\nROM images available in these %s:\n" "$bstr"
 	eval "printf \"${targets}\""
 	printf "^^ ROM images available in these %s.\n\n" "$bstr"
 
-	[ "$lbmk_release" = "y" ] && \
+	[ "$xbmk_release" = "y" ] && \
 		printf "Always run the inject command on release images!\n"
 	printf "DO NOT flash images from elf/ - please use bin/ instead.\n"
 }
@@ -99,7 +99,7 @@ handle_serprog()
 			done
 	fi
 
-	[ "$lbmk_release" = "y" ] && mktar_release "bin/serprog_$1"; return 0
+	[ "$xbmk_release" = "y" ] && mktar_release "bin/serprog_$1"; return 0
 }
 
 build_rp2040_rom()
@@ -144,7 +144,7 @@ handle_coreboot_target()
 
 	configure_target
 	[ "$board" = "$tree" ] && return 0
-	if [ "$lbmk_release" = "y" ] && [ "$release" = "n" ]; then
+	if [ "$xbmk_release" = "y" ] && [ "$release" = "n" ]; then
 		printf "Target '%s' disabled for release.\n" "$board"
 		return 0
 	fi
@@ -153,8 +153,8 @@ handle_coreboot_target()
 	build_target_mainboard
 
 	[ -d "bin/${board}" ] || return 0
-	[ "$lbmk_release" = "y" ] || targets="* bin/${board}\n${targets}"
-	[ "$lbmk_release" = "y" ] || return 0
+	[ "$xbmk_release" = "y" ] || targets="* bin/${board}\n${targets}"
+	[ "$xbmk_release" = "y" ] || return 0
 
 	targets="* bin/${relname}_$board.tar.xz\n$targets"
 	mktar_release "bin/$board"
@@ -466,7 +466,7 @@ moverom()
 
 	x_ mkdir -p "${2%/*}"
 	x_ cp "$1" "$2"
-	[ "$lbmk_release" = "y" ] || return 0
+	[ "$xbmk_release" = "y" ] || return 0
 
 	mksha512sum "${2}" "vendorhashes"
 	x_ ./vendor inject -r "${2}" -b "$board" -n nuke

From b76a70c3f916b9fdb0b63fd2bd0ac48d3d36d0b9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 16 May 2024 11:11:25 +0100
Subject: [PATCH 0363/1549] build: don't make script_path a global variable

this allows a mild cleanup of the code (reduction by 1 line)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/build b/build
index b6311846..4c98e901 100755
--- a/build
+++ b/build
@@ -16,7 +16,7 @@ fi
 . "include/vendor.sh"
 . "include/mrc.sh"
 
-eval "$(setvars "" script_path aur_notice vdir src_dirname srcdir _xm mode xp)"
+eval "$(setvars "" aur_notice vdir src_dirname srcdir _xm mode xp)"
 err="fail"
 
 linkpath="${0}"
@@ -51,9 +51,7 @@ initcmd()
 	release) shift 1; mkrelease $@ ;;
 	inject) shift 1; vendor_inject $@ ;;
 	download) shift 1; vendor_download $@ ;;
-	*)
-		script_path="script/${1}"
-		return 0 ;;
+	*) return 0 ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
 	xbmk_exit 0
@@ -96,8 +94,9 @@ git_init()
 
 excmd()
 {
-	[ -f "${script_path}" ] || $err "Bad command. Check $projectname docs."
-	shift 1; "$script_path" $@ || $err "excmd: ${script_path} ${@}"
+	spath="script/${1}"
+	[ -f "${spath}" ] || $err "Bad command. Check $projectname docs."
+	shift 1; "$spath" $@ || $err "excmd: ${spath} ${@}"
 }
 
 mkrelease()

From 5702f5a4dce161f631c4e0c2204d360290f8dfb4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 16 May 2024 11:23:22 +0100
Subject: [PATCH 0364/1549] build: remove excmd() and simplify main()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 17 +++++++----------
 1 file changed, 7 insertions(+), 10 deletions(-)

diff --git a/build b/build
index 4c98e901..d4d5e520 100755
--- a/build
+++ b/build
@@ -26,6 +26,7 @@ main()
 {
 	x_ id -u 1>/dev/null 2>/dev/null
 	[ $# -lt 1 ] && $err "Check $projectname documentation for help."
+	spath="script/$1"
 
 	[ "$1" = "dependencies" ] && x_ install_packages $@ && xbmk_exit 0
 
@@ -36,9 +37,12 @@ main()
 	git config --global user.email 1>/dev/null 2>/dev/null || \
 	    git_err "git config --global user.email \"john.doe@example.com\""
 
-	for cmd in initcmd git_init excmd; do
-		eval "${cmd} \$@"
-	done
+	initcmd $@
+	git_init
+
+	[ -f "${spath}" ] || $err "Bad command. Check $projectname docs."
+	shift 1; "$spath" $@ || $err "excmd: ${spath} ${@}"
+
 	xbmk_exit 0
 }
 
@@ -92,13 +96,6 @@ git_init()
 	    $err "${PWD}: cannot git-tag ${projectname}/${version}"
 }
 
-excmd()
-{
-	spath="script/${1}"
-	[ -f "${spath}" ] || $err "Bad command. Check $projectname docs."
-	shift 1; "$spath" $@ || $err "excmd: ${spath} ${@}"
-}
-
 mkrelease()
 {
 	export XBMK_RELEASE="y"

From 4ea843a4903a618f216e7f5aa8306f67afd327c6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 16 May 2024 11:29:57 +0100
Subject: [PATCH 0365/1549] build: initialise git first (before commands)

when running the inject logic, we should still initialise
the git repository because these commands make use of the
coreboot build system which requires git.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build b/build
index d4d5e520..a48e3061 100755
--- a/build
+++ b/build
@@ -36,9 +36,9 @@ main()
 	    git_err "git config --global user.name \"John Doe\""
 	git config --global user.email 1>/dev/null 2>/dev/null || \
 	    git_err "git config --global user.email \"john.doe@example.com\""
+	git_init
 
 	initcmd $@
-	git_init
 
 	[ -f "${spath}" ] || $err "Bad command. Check $projectname docs."
 	shift 1; "$spath" $@ || $err "excmd: ${spath} ${@}"

From dd851caac9078b621bc03f59f7735bcbbd2e9fb1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 16 May 2024 11:34:31 +0100
Subject: [PATCH 0366/1549] build: remove initcmd() and simplify main()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 14 +++-----------
 1 file changed, 3 insertions(+), 11 deletions(-)

diff --git a/build b/build
index a48e3061..565d0ffa 100755
--- a/build
+++ b/build
@@ -38,16 +38,6 @@ main()
 	    git_err "git config --global user.email \"john.doe@example.com\""
 	git_init
 
-	initcmd $@
-
-	[ -f "${spath}" ] || $err "Bad command. Check $projectname docs."
-	shift 1; "$spath" $@ || $err "excmd: ${spath} ${@}"
-
-	xbmk_exit 0
-}
-
-initcmd()
-{
 	[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
 
 	case "${1}" in
@@ -55,7 +45,9 @@ initcmd()
 	release) shift 1; mkrelease $@ ;;
 	inject) shift 1; vendor_inject $@ ;;
 	download) shift 1; vendor_download $@ ;;
-	*) return 0 ;;
+	*)
+		[ -f "${spath}" ] || $err "Bad command. Check docs."
+		shift 1; "$spath" $@ || $err "excmd: ${spath} ${@}" ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
 	xbmk_exit 0

From f8e3ca3b2246efb5e525bd8f45adafe6a93ed8a0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 18 May 2024 04:53:31 +0100
Subject: [PATCH 0367/1549] git.sh: Remove .git if XBMK_RELEASE=y

The build system already deletes .git in all source
directories for each given release, but does so at
the very end; it still does, but now it is deleted
one by one per project, to save space during very
large builds (release sizes vary wildly, depending
on how many trees exist for coreboot basically).

If you're building entirely in tmpfs (as I do), this
could be a problem if you have lots of .git/ directories.

This change reduces disk usage, or in the above example,
memory usage when running the build system from tmpfs.

This complements another recent change, where ROM images
are compressed per target during release builds, rather
than all at the very end of the process. It is part of a
series of optimisations, to reduce the memory and disk
usage of the build system, and to reduce I/O wastage
in general.

This change will not be the last of such changes!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             | 3 +--
 include/git.sh    | 2 ++
 include/option.sh | 9 +++++++++
 3 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/build b/build
index 565d0ffa..fdb47947 100755
--- a/build
+++ b/build
@@ -157,8 +157,7 @@ fetch_trees()
 		[ ! -f "$x" ] || [ -L "$xp" ] || x_ rm -Rf "src/$xp/$xp"
 	done
 
-	find . -name ".git" -exec rm -Rf {} + || $err "$_xm: rm .git"
-	find . -name ".gitmodules" -exec rm -Rf {} + || $err "$_xm: rm .gitmod"
+	rmgit .
 	rm -Rf tmp .git src/u-boot/*/test/lib/strlcat.c || $err "$_xm !rm"
 }
 
diff --git a/include/git.sh b/include/git.sh
index 04143540..bc818b19 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -111,6 +111,8 @@ git_prep()
 		fi
 	fi
 
+	[ "$xbmk_release" = "y" ] && rmgit "$tmpgit"
+
 	[ "$_loc" = "${_loc%/*}" ] || x_ mkdir -p "${_loc%/*}"
 	mv "$tmpgit" "$_loc" || $err "git_prep: !mv $tmpgit $_loc"
 	[ -n "$xtree" ] && [ ! -d "src/coreboot/$xtree" ] && \
diff --git a/include/option.sh b/include/option.sh
index b2e94a6a..1114611b 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -178,3 +178,12 @@ mksha512sum()
 	    $err "!sha512sum \"${1}\" > \"${2}\""
 	) || $err "failed to create tarball checksum"
 }
+
+rmgit()
+{
+	(
+	cd "$1" || $err "!cd gitrepo $1"
+	find . -name ".git" -exec rm -Rf {} + || $err "!rm .git $1"
+	find . -name ".gitmodules" -exec rm -Rf {} + || $err "!rm .gitmod $1"
+	) || $err "Cannot remove .git/.gitmodules in $1"
+}

From 32923f56082210b4cdaca5f8bbc4f99cea5343f9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 18 May 2024 11:14:39 +0100
Subject: [PATCH 0368/1549] vendor.sh: simplify defconfig check

re-use check_defconfig from option.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 3fdb7225..19228cf1 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -46,10 +46,8 @@ vendor_download()
 
 detect_firmware()
 {
-	_cfg_exists="n"
-	for _chk_file in "${boarddir}/config/"*; do
-		[ -f "${_chk_file}" ] && _cfg_exists="y" && break
-	done
+	_cfg_exists="y"
+	check_defconfig "$boarddir" && _cfg_exists="n"
 	[ "${_cfg_exists}" = "n" ] && return 1
 
 	set -- "${boarddir}/config/"*

From 3f73f3d0b4faa50ff5cf02c2c7dbb113722fe9d7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 18 May 2024 11:20:14 +0100
Subject: [PATCH 0369/1549] vendor.sh: remove redundant check

we literally do this check twice, in immediate succession.

avoid wasted i/o

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 19228cf1..af441449 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -46,10 +46,6 @@ vendor_download()
 
 detect_firmware()
 {
-	_cfg_exists="y"
-	check_defconfig "$boarddir" && _cfg_exists="n"
-	[ "${_cfg_exists}" = "n" ] && return 1
-
 	set -- "${boarddir}/config/"*
 	. "${1}" 2>/dev/null
 	. "${boarddir}/target.cfg" 2>/dev/null

From bb7255c34ba807955b6f64cacb1e1dced4bea4bd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 18 May 2024 11:25:28 +0100
Subject: [PATCH 0370/1549] vendor.sh: print an error upon ill-defined target

previously, it was attempting to load the configs and silently
failing. we must provide feedback to the user.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/vendor.sh b/include/vendor.sh
index af441449..8992995f 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -36,6 +36,8 @@ vendor_download()
 	boarddir="${cbcfgsdir}/${board}"
 	_b="${board%%_*mb}" # shorthand (no duplication per rom size)
 
+	[ -d "$boarddir" ] || $err "Target '$board' not defined."
+
 	check_defconfig "${boarddir}" && exit 0
 	detect_firmware && exit 0
 	scan_config "${_b}" "config/vendor"

From 53b394f583cb0e2afce22cd759d4100a9a8a588f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 18 May 2024 19:28:15 +0100
Subject: [PATCH 0371/1549] vendor.sh: move config checks to detect_firmware

they will later be removed, as part of unification against
other files that perform the same tasks

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 8992995f..eb250a6f 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -36,9 +36,6 @@ vendor_download()
 	boarddir="${cbcfgsdir}/${board}"
 	_b="${board%%_*mb}" # shorthand (no duplication per rom size)
 
-	[ -d "$boarddir" ] || $err "Target '$board' not defined."
-
-	check_defconfig "${boarddir}" && exit 0
 	detect_firmware && exit 0
 	scan_config "${_b}" "config/vendor"
 
@@ -48,6 +45,9 @@ vendor_download()
 
 detect_firmware()
 {
+	[ -d "$boarddir" ] || $err "Target '$board' not defined."
+	check_defconfig "${boarddir}" && exit 0
+
 	set -- "${boarddir}/config/"*
 	. "${1}" 2>/dev/null
 	. "${boarddir}/target.cfg" 2>/dev/null

From 8418ea9ab2dbcf13ebbfa23cd620a1bf108a24f3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 18 May 2024 19:44:44 +0100
Subject: [PATCH 0372/1549] vendor.sh: greatly simplified config handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/option.sh | 2 +-
 include/vendor.sh | 5 +----
 2 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/include/option.sh b/include/option.sh
index 1114611b..3d9f4536 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -122,7 +122,7 @@ EOF
 check_defconfig()
 {
 	for x in "${1}"/config/*; do
-		[ -f "${x}" ] && return 1
+		[ -f "${x}" ] && printf "%s\n" "$x" && return 1
 	done
 }
 
diff --git a/include/vendor.sh b/include/vendor.sh
index eb250a6f..06b10fc7 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -46,10 +46,7 @@ vendor_download()
 detect_firmware()
 {
 	[ -d "$boarddir" ] || $err "Target '$board' not defined."
-	check_defconfig "${boarddir}" && exit 0
-
-	set -- "${boarddir}/config/"*
-	. "${1}" 2>/dev/null
+	. "$(check_defconfig "${boarddir}")" 2>/dev/null || exit 0
 	. "${boarddir}/target.cfg" 2>/dev/null
 
 	[ -z "$tree" ] && $err "detect_firmware $boarddir: tree undefined"

From 5b5dccd630611922f8d57a27d4f09ae7cf7cde87 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 18 May 2024 19:51:40 +0100
Subject: [PATCH 0373/1549] vendor.sh: further simplify config handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/option.sh | 1 +
 include/vendor.sh | 5 +----
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/include/option.sh b/include/option.sh
index 3d9f4536..45066166 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -121,6 +121,7 @@ EOF
 
 check_defconfig()
 {
+	[ -d "$1" ] || $err "Target '$1' not defined."
 	for x in "${1}"/config/*; do
 		[ -f "${x}" ] && printf "%s\n" "$x" && return 1
 	done
diff --git a/include/vendor.sh b/include/vendor.sh
index 06b10fc7..5ab04221 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -394,10 +394,7 @@ patch_rom()
 {
 	rom="${1}"
 
-	check_defconfig "$boarddir" && $err "patch_rom $boarddir: no configs"
-
-	set -- "${boarddir}/config/"*
-	. "${1}" 2>/dev/null
+	. "$(check_defconfig "${boarddir}")" 2>/dev/null || exit 0
 
 	[ "$CONFIG_HAVE_MRC" = "y" ] && \
 		inject "mrc.bin" "${CONFIG_MRC_FILE}" "mrc" "0xfffa0000"

From 21a7efaa95898f71e3de0850aae294309daac31d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 18 May 2024 22:13:20 +0100
Subject: [PATCH 0374/1549] build/roms: simplified config payload checks

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/script/roms b/script/roms
index 7c181c36..d969d86e 100755
--- a/script/roms
+++ b/script/roms
@@ -188,11 +188,8 @@ configure_target()
 	# that doesn't mean GRUB-withSeaBIOS will. For example, the board
 	# might have a graphics card whose vga rom coreboot doesn't execute
 	[ "$payload_grub" != "y" ] && [ "$payload_seabios" != "y" ] && \
-	    [ "${payload_uboot}" != "y" ] && \
-		for configfile in "${targetdir}/config/"*; do
-			[ -e "${configfile}" ] || continue
-			$err "target '${board}' defines no payload"
-		done
+	    [ "${payload_uboot}" != "y" ] && ! check_defconfig "$targetdir" \
+		&& $err "target '$board' defines no payload"
 
 	[ "$payload_uboot" != "n" ] && [ "$payload_uboot" != "y" ] && \
 		payload_uboot="n"

From 998f30ad4d58d176429e47feafbbf6b709c27f1d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 18 May 2024 22:17:12 +0100
Subject: [PATCH 0375/1549] build/roms: simplify serprog list command

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/script/roms b/script/roms
index d969d86e..292193e9 100755
--- a/script/roms
+++ b/script/roms
@@ -87,7 +87,7 @@ handle_serprog()
 	x_ mkdir -p "bin/serprog_${1}"
 
 	if [ $# -gt 1 ] && [ "${2}" = "list" ]; then
-		print_serprog_boards ${serprog_boards_dir}
+		list_serprog_boards ${serprog_boards_dir}
 		return 0
 	elif [ $# -gt 1 ]; then
 		build_${1}_rom "${2}"
@@ -125,12 +125,6 @@ build_stm32_rom()
 	printf "output to bin/serprog_stm32/serprog_%s.hex\n" "$board"
 }
 
-print_serprog_boards()
-{
-	printf "Available boards:\n"
-	list_serprog_boards "${1}"
-}
-
 list_serprog_boards()
 {
 	basename -a -s .h "${1}/"*.h || $err "list_boards $1: can't list boards"

From 8d723d14989873c247b21f71a92ba7d2843b4a27 Mon Sep 17 00:00:00 2001
From: samuraikid <samuraikid@noreply.codeberg.org>
Date: Sat, 18 May 2024 22:05:27 +0000
Subject: [PATCH 0376/1549] Add pt qwerty keymap to lbmk

Signed-off-by: samuraikid <samuraikid@noreply.codeberg.org>
---
 config/grub/keymap/ptqwerty.gkb | Bin 0 -> 492 bytes
 1 file changed, 0 insertions(+), 0 deletions(-)
 create mode 100644 config/grub/keymap/ptqwerty.gkb

diff --git a/config/grub/keymap/ptqwerty.gkb b/config/grub/keymap/ptqwerty.gkb
new file mode 100644
index 0000000000000000000000000000000000000000..5d9b453e3140d1f08f8b88a49f1f792e358d55fb
GIT binary patch
literal 492
zcmV<I0TcfHH+ooF000E$*0e?f03iVu0001VFXf})3JU?LT>vALhTy*%@4+yQ934V)
zc7K>%b^S+Fh7N3Oib&ic#h*zSvYKD(_7_y*xhff%!#`GO00FG?TU#L!t?RnF%o^5~
zz{^L6lcTx=Mr}t|jaE^=W}cWeRLc@gRB>Xg@+yPD3uCx?3eS+x!BxO&C(oYK5{oC|
zIrO-}pa&=g-|tV=i!OdrihrYvZDbx`REDKWDXu?MS|C!4YZGUK*(vudD127y?}lLO
z1nPrKOsSb)c9N?LCabbp6US`y_7Dc4DpMPfIKJ1rm2iwp?a_a2LQGW~2m%8V^pl>b
z_Wpi~;`hm+wg|=1e|AP>+%0(%GF;4aHnZB9mT4vI;k}UjM{GNVBTATQa?hL`7dB(W
zT|Gy0JiIJu9~tV|f)K%}7Jt6`)}qPlNN@_0ON%+JUrJ=o`;Ckr3ChQ`BvP2=%xU-3
zu1i~0P+ih8p{}Qp!T+r=rxIakQ_2d0+Hu%hbfeX8^^QH@krB&FOfty*+S~X8PO7H|
z3mzZdTSq1!(7}hPd%WeCFmEs?+*B8H#0a?TZO%r7O=jNpoCUF^MR*6De*gOb0000^
i_JW^I-av-{0mTE16aWAvBXD`K#Ao{g000001X)@-+T^YP

literal 0
HcmV?d00001


From b40118ae59b2a48d7287bdcebd2314b0184d4806 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 19 May 2024 06:30:32 +0100
Subject: [PATCH 0377/1549] minor code cleanup in the build system

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build        |  2 --
 script/roms  | 30 +++++++++---------------------
 script/trees |  3 +--
 3 files changed, 10 insertions(+), 25 deletions(-)

diff --git a/build b/build
index fdb47947..1cb93f84 100755
--- a/build
+++ b/build
@@ -151,12 +151,10 @@ fetch_trees()
 	for x in $(items config/git); do
 		./update trees -f "$x" || $err "$_xm: fetch $x"
 	done
-
 	for x in config/*/build.list; do
 		[ -f "$x" ] && xp="${x#*/}" && xp="${xp%/*}"
 		[ ! -f "$x" ] || [ -L "$xp" ] || x_ rm -Rf "src/$xp/$xp"
 	done
-
 	rmgit .
 	rm -Rf tmp .git src/u-boot/*/test/lib/strlcat.c || $err "$_xm !rm"
 }
diff --git a/script/roms b/script/roms
index 292193e9..66d6134d 100755
--- a/script/roms
+++ b/script/roms
@@ -148,10 +148,8 @@ handle_coreboot_target()
 
 	[ -d "bin/${board}" ] || return 0
 	[ "$xbmk_release" = "y" ] || targets="* bin/${board}\n${targets}"
-	[ "$xbmk_release" = "y" ] || return 0
-
-	targets="* bin/${relname}_$board.tar.xz\n$targets"
-	mktar_release "bin/$board"
+	[ "$xbmk_release" = "y" ] && mktar_release "bin/$board" && \
+	targets="* bin/${relname}_$board.tar.xz\n$targets"; return 0
 }
 
 configure_target()
@@ -179,8 +177,7 @@ configure_target()
 	[ "$payload_seabios_grubonly" = "y" ] && payload_seabios_withgrub="y"
 
 	# The reverse logic must not be applied. If SeaBIOS-with-GRUB works,
-	# that doesn't mean GRUB-withSeaBIOS will. For example, the board
-	# might have a graphics card whose vga rom coreboot doesn't execute
+	# that doesn't mean GRUB-with-SeaBIOS will, e.g. VGA ROM execution
 	[ "$payload_grub" != "y" ] && [ "$payload_seabios" != "y" ] && \
 	    [ "${payload_uboot}" != "y" ] && ! check_defconfig "$targetdir" \
 		&& $err "target '$board' defines no payload"
@@ -192,7 +189,6 @@ configure_target()
 
 	# Override all payload directives with cmdline args
 	[ -z "${_payload}" ] && return 0
-	printf "setting payload to: %s\n" "${_payload}"
 	eval "$(setvars "n" payload_grub payload_memtest payload_seabios \
 	    payload_seabios_withgrub payload_uboot payload_grub_withseabios \
 	    payload_seabios_grubonly)"
@@ -235,13 +231,9 @@ build_grub_payload()
 	[ -f "$grubelf" ] && return 0
 	[ -f "src/grub/grub-mkstandalone" ] || x_ ./update trees -b grub
 
-	./src/grub/grub-mkstandalone \
-	    --grub-mkimage="src/grub/grub-mkimage" \
-	    -O i386-coreboot \
-	    -o "elf/grub/grub.elf" \
-	    -d "src/grub/grub-core/" \
-	    --fonts= --themes= --locales=  \
-	    --modules="${grub_modules}" \
+	./src/grub/grub-mkstandalone --grub-mkimage="src/grub/grub-mkimage" \
+	    -O i386-coreboot -o "elf/grub/grub.elf" -d "src/grub/grub-core/" \
+	    --fonts= --themes= --locales=  --modules="${grub_modules}" \
 	    --install-modules="${grub_install_modules}" \
 	    "/boot/grub/grub.cfg=${grubcfgsdir}/config/grub_memdisk.cfg" \
 	    "/boot/grub/grub_default.cfg=${grubcfgsdir}/config/grub.cfg" || \
@@ -255,8 +247,7 @@ build_uboot_payload()
 	ubootelf="${ubdir}/u-boot.elf"
 	[ ! -f "${ubootelf}" ] && [ -f "${ubdir}/u-boot" ] && \
 		ubootelf="${ubdir}/u-boot"
-	[ -f "${ubootelf}" ] && return 0
-	$err "Can't find u-boot build for board, $board";
+	[ -f "${ubootelf}" ] || $err "$board: Can't find u-boot"; return 0
 }
 
 build_target_mainboard()
@@ -281,7 +272,6 @@ build_target_mainboard()
 	done
 }
 
-# Main ROM building function. This calls all other functions below
 build_roms()
 {
 	cbcfg="${1}"
@@ -457,10 +447,8 @@ moverom()
 
 	x_ mkdir -p "${2%/*}"
 	x_ cp "$1" "$2"
-	[ "$xbmk_release" = "y" ] || return 0
-
-	mksha512sum "${2}" "vendorhashes"
-	x_ ./vendor inject -r "${2}" -b "$board" -n nuke
+	[ "$xbmk_release" = "y" ] && mksha512sum "${2}" "vendorhashes" && \
+	x_ ./vendor inject -r "${2}" -b "$board" -n nuke; return 0
 }
 
 main $@
diff --git a/script/trees b/script/trees
index 3b126e56..f2b988f1 100755
--- a/script/trees
+++ b/script/trees
@@ -230,8 +230,7 @@ check_cmake()
 		    check_makefile "${1}" || \
 		    $err "check_cmake ${1}: can't cmake ${cmakedir}"
 	[ -z "${cmakedir}" ] || check_makefile "${1}" || \
-		$err "check_cmake ${1}: could not generate Makefile"
-	return 0
+		$err "check_cmake ${1}: can't generate Makefile"; return 0
 }
 
 check_autoconf()

From cc7ed6926b2bf53468320e32c236f269838178fb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 19 May 2024 06:43:37 +0100
Subject: [PATCH 0378/1549] build/roms: rename moverom to copyrom

it copies, it doesn't move, so name it right

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build       |  2 --
 script/roms | 12 ++++++------
 2 files changed, 6 insertions(+), 8 deletions(-)

diff --git a/build b/build
index 1cb93f84..aa892d0e 100755
--- a/build
+++ b/build
@@ -71,8 +71,6 @@ install_packages()
 	printf "You must install AUR packages: %s\n" "$aur_notice" 1>&2
 }
 
-# release archives contain .gitignore, but not .git.
-# xbmk can be run from xbmk.git, or an archive.
 git_init()
 {
 	[ -L ".git" ] && $err "Reference .git is a symlink"
diff --git a/script/roms b/script/roms
index 66d6134d..e18bdf17 100755
--- a/script/roms
+++ b/script/roms
@@ -313,7 +313,7 @@ build_seabios_roms()
 		newrom="${romdir}/seabios_${board}_${initmode}_${displaymode}"
 		[ "${initmode}" = "normal" ] && newrom="${romdir}/seabios" \
 			&& newrom="${newrom}_${board}_${initmode}"
-		x_ moverom "${t}" "${newrom}.rom"
+		x_ copyrom "${t}" "${newrom}.rom"
 	fi
 	x_ rm -f "${t}"
 }
@@ -377,14 +377,14 @@ build_grub_roms()
 		[ "${initmode}" = "normal" ] && \
 			newrom="${romdir}/${payload1}_${board}_" && \
 			newrom="${newrom}${initmode}_${keymap}.rom"
-		x_ moverom "${tmpgrubrom}" "${newrom}"
+		x_ copyrom "${tmpgrubrom}" "${newrom}"
 		if [ "${payload_seabios_grubonly}" = "y" ]; then
 			x_ "$cbfstool" "$tmpgrubrom" add \
 			    -f "config/grub/bootorder" -n bootorder -t raw
-			x_ moverom "$tmpgrubrom" "${newrom%.rom}_grubfirst.rom"
+			x_ copyrom "$tmpgrubrom" "${newrom%.rom}_grubfirst.rom"
 			x_ "$cbfstool" "$tmpgrubrom" add-int -i 0 \
 			    -n etc/show-boot-menu
-			x_ moverom "$tmpgrubrom" "${newrom%.rom}_grubonly.rom"
+			x_ copyrom "$tmpgrubrom" "${newrom%.rom}_grubonly.rom"
 		fi
 		x_ rm -f "${tmpgrubrom}"
 	done
@@ -418,7 +418,7 @@ build_uboot_roms()
 	tmprom=$(mkUbootRom "${cbrom}" "fallback/payload") || \
 	    $err "build_uboot_roms $board: could not create tmprom"
 	newrom="${romdir}/uboot_payload_${board}_${initmode}_${displaymode}.rom"
-	x_ moverom "${tmprom}" "${newrom}"
+	x_ copyrom "${tmprom}" "${newrom}"
 	x_ rm -f "${tmprom}"
 }
 
@@ -441,7 +441,7 @@ mkUbootRom() {
 	printf "%s\n" "${tmprom}"
 }
 
-moverom()
+copyrom()
 {
 	printf "Creating target image: %s\n" "$2"
 

From 1fe9c4b8991f3bff7532fd85f4fd9ece73044236 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 19 May 2024 06:45:38 +0100
Subject: [PATCH 0379/1549] option.sh: mktar_release to mkrom_tarball

that's all it's used for, to compress the rom images

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/option.sh | 2 +-
 script/roms       | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/option.sh b/include/option.sh
index 45066166..8e50a932 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -151,7 +151,7 @@ git_err()
 	$err "Git name/email not configured"
 }
 
-mktar_release()
+mkrom_tarball()
 {
 	printf "%s\n" "${version}" > "${1}/version" || return 1
 	printf "%s\n" "${versiondate}" > "${1}/versiondate" || return 1
diff --git a/script/roms b/script/roms
index e18bdf17..07b205e4 100755
--- a/script/roms
+++ b/script/roms
@@ -99,7 +99,7 @@ handle_serprog()
 			done
 	fi
 
-	[ "$xbmk_release" = "y" ] && mktar_release "bin/serprog_$1"; return 0
+	[ "$xbmk_release" = "y" ] && mkrom_tarball "bin/serprog_$1"; return 0
 }
 
 build_rp2040_rom()
@@ -148,7 +148,7 @@ handle_coreboot_target()
 
 	[ -d "bin/${board}" ] || return 0
 	[ "$xbmk_release" = "y" ] || targets="* bin/${board}\n${targets}"
-	[ "$xbmk_release" = "y" ] && mktar_release "bin/$board" && \
+	[ "$xbmk_release" = "y" ] && mkrom_tarball "bin/$board" && \
 	targets="* bin/${relname}_$board.tar.xz\n$targets"; return 0
 }
 

From 71baf65351ff93ef3d6177ae274d7c1d62727035 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 19 May 2024 06:51:20 +0100
Subject: [PATCH 0380/1549] option.sh: don't return 1 in mkrom_tarball

one of the calling functions relies on the return value
to be always 0, so these error conditions in mkrom_tarball
have been altered to cause an *exit* (non-zero) instead.

in practise, the commands in question were printf commands
run after tho directory they output to had been created,
so write access would probably not be an issue.

nonetheless, technically correct is the best kind of correct.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/option.sh | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/option.sh b/include/option.sh
index 8e50a932..bfeb9eb3 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -153,9 +153,9 @@ git_err()
 
 mkrom_tarball()
 {
-	printf "%s\n" "${version}" > "${1}/version" || return 1
-	printf "%s\n" "${versiondate}" > "${1}/versiondate" || return 1
-	printf "%s\n" "${projectname}" > "${1}/projectname" || return 1
+	printf "%s\n" "${version}" > "${1}/version" || $err "$1 !version"
+	printf "%s\n" "${versiondate}" > "${1}/versiondate" || $err "$1 !vdate"
+	printf "%s\n" "${projectname}" > "${1}/projectname" || $err "$1 !pname"
 
 	mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz"
 	x_ rm -Rf "$1"

From 5b8928c7c9bc3916f67f377f47d6f87039df179f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 19 May 2024 07:50:24 +0100
Subject: [PATCH 0381/1549] git.sh: remove fetch_from_upstream()

the function is very small and only called once,
from fetch_project_trees()

merge it into fetch_project_trees()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 11 ++---------
 1 file changed, 2 insertions(+), 9 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index bc818b19..5111d09a 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -7,7 +7,8 @@ eval "$(setvars "" _target rev _xm loc url bkup_url depend tree_depend xtree)"
 fetch_project_trees()
 {
 	_target="${target}"
-	[ -d "src/${project}/${project}" ] || fetch_from_upstream
+	[ ! -d "src/${project}/${project}" ] && x_ mkdir -p "src/${project}" \
+	    && fetch_project_repo "${project}"
 	fetch_config
 	if [ -d "src/${project}/${tree}" ]; then
 		printf "download/%s %s (%s): exists\n" \
@@ -17,14 +18,6 @@ fetch_project_trees()
 	prepare_new_tree
 }
 
-fetch_from_upstream()
-{
-	[ -d "src/${project}/${project}" ] && return 0
-
-	x_ mkdir -p "src/${project}"
-	fetch_project_repo "${project}"
-}
-
 fetch_config()
 {
 	rm -f "${cfgsdir}/"*/seen || $err "fetch_config ${cfgsdir}: !rm seen"

From aadccc591bb57091ee645f2db0d63cc53e397906 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 19 May 2024 08:14:57 +0100
Subject: [PATCH 0382/1549] more minor cleanup in the build system

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 21 ++++++---------------
 1 file changed, 6 insertions(+), 15 deletions(-)

diff --git a/build b/build
index aa892d0e..b28ce954 100755
--- a/build
+++ b/build
@@ -28,7 +28,7 @@ main()
 	[ $# -lt 1 ] && $err "Check $projectname documentation for help."
 	spath="script/$1"
 
-	[ "$1" = "dependencies" ] && x_ install_packages $@ && xbmk_exit 0
+	[ "$1" = "dependencies" ] && x_ install_packages $@ && return 0
 
 	which git 1>/dev/null 2>/dev/null || \
 	    git_err "git not installed. please install git-scm."
@@ -50,7 +50,6 @@ main()
 		shift 1; "$spath" $@ || $err "excmd: ${spath} ${@}" ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
-	xbmk_exit 0
 }
 
 install_packages()
@@ -66,9 +65,8 @@ install_packages()
 
 	. "config/dependencies/${2}"
 
-	x_ ${pkg_add} ${pkglist}
-	[ -z "${aur_notice}" ] && return 0
-	printf "You must install AUR packages: %s\n" "$aur_notice" 1>&2
+	x_ $pkg_add $pkglist && [ -n "$aur_notice" ] && \
+	printf "Please install AUR packages: %s\n" "$aur_notice" 1>&2; return 0
 }
 
 git_init()
@@ -123,13 +121,11 @@ build_release()
 	) || $err "can't create release files"
 
 	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
-	    --abbrev-commit > "${srcdir}/CHANGELOG" || \
-	    $err "build_release $srcdir: couldn't generate changelog"
+	    --abbrev-commit > "${srcdir}/CHANGELOG" || $err "!gitlog $srcdir"
 
 	(
 	cd "${srcdir%/*}" || $err "${_xm}: mktarball \"${srcdir}\""
-	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || \
-	    $err "$_xm: mksrc"
+	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || $err "$_xm: mksrc"
 	) || $err "can't create src tarball"
 	[ "${mode}" = "src" ] && return 0
 
@@ -157,12 +153,6 @@ fetch_trees()
 	rm -Rf tmp .git src/u-boot/*/test/lib/strlcat.c || $err "$_xm !rm"
 }
 
-xbmk_exit()
-{
-	tmp_cleanup || err_ "xbmk_exit: can't rm tmpdir upon exit $1: $tmpdir"
-	exit $1
-}
-
 fail()
 {
 	tmp_cleanup || printf "WARNING: can't rm tmpdir: %s\n" "$tmpdir" 1>&2
@@ -176,3 +166,4 @@ tmp_cleanup()
 }
 
 main $@
+tmp_cleanup || err_ "can't rm tmpdir upon non-zero exit: $tmpdir"

From 245b4eb21d10532aab86d9dea722d4986a2a074c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 19 May 2024 22:43:52 +0100
Subject: [PATCH 0383/1549] build/roms: skip target if config/ dir missing

fixes a regression when running ./build roms all

now it should work again

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/script/roms b/script/roms
index 07b205e4..b375d939 100755
--- a/script/roms
+++ b/script/roms
@@ -56,7 +56,9 @@ main()
 		[ "${all}" != "y" ] || boards=$(items config/coreboot) || \
 			$err "Cannot generate list of boards for building"
 		for x in ${boards}; do
-			handle_coreboot_target "$x"
+			[ -d "config/coreboot/$x/config" ] && \
+				handle_coreboot_target "$x" && continue
+			printf "No configs for %s; skipping\n" "$x"
 		done
 	fi
 
@@ -179,8 +181,8 @@ configure_target()
 	# The reverse logic must not be applied. If SeaBIOS-with-GRUB works,
 	# that doesn't mean GRUB-with-SeaBIOS will, e.g. VGA ROM execution
 	[ "$payload_grub" != "y" ] && [ "$payload_seabios" != "y" ] && \
-	    [ "${payload_uboot}" != "y" ] && ! check_defconfig "$targetdir" \
-		&& $err "target '$board' defines no payload"
+	    [ "${payload_uboot}" != "y" ] && \
+		$err "target '$board' defines no payload"
 
 	[ "$payload_uboot" != "n" ] && [ "$payload_uboot" != "y" ] && \
 		payload_uboot="n"

From 00e00a18d0a04a024fe909dbf452f25e5d272776 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 19 May 2024 23:04:37 +0100
Subject: [PATCH 0384/1549] git.sh: don't delete .git if src/project/project

otherwise, "./update release" will epicly fail

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/git.sh b/include/git.sh
index 5111d09a..d737fd1c 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -104,7 +104,9 @@ git_prep()
 		fi
 	fi
 
-	[ "$xbmk_release" = "y" ] && rmgit "$tmpgit"
+	[ "$xbmk_release" = "y" ] && [ "$_loc" != "src/$project/$project" ] \
+	    && rmgit "$tmpgit"
+
 
 	[ "$_loc" = "${_loc%/*}" ] || x_ mkdir -p "${_loc%/*}"
 	mv "$tmpgit" "$_loc" || $err "git_prep: !mv $tmpgit $_loc"

From 1e54db29897786ff49b8ff228ed0b2fbdd8b70dc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 20 May 2024 00:10:27 +0100
Subject: [PATCH 0385/1549] git.sh: allow patching submodules

for single-tree project (e.g. flashprog):
config/submodule/PROJECT/MODNAME/patches

for multi-tree project (e.g. coreboot):
config/submodule/PROJECT/TREE/MODNAME/patches

MODNAME is e.g.:
3rdparty/vboot directory in coreboot: would become vboot
(the submodule codepath is filtered to up to the final slash)

another example:
submodire src dir 3rdparty/foo/bar
MODNAME would be "bar"

Add whatever patches you like to a given submodule.

An example patch is included in this commit.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../vboot/patches/0001-test-patch.patch       | 26 +++++++++++++++++++
 include/git.sh                                | 21 +++++++++++++++
 2 files changed, 47 insertions(+)
 create mode 100644 config/submodule/coreboot/default/vboot/patches/0001-test-patch.patch

diff --git a/config/submodule/coreboot/default/vboot/patches/0001-test-patch.patch b/config/submodule/coreboot/default/vboot/patches/0001-test-patch.patch
new file mode 100644
index 00000000..66428b56
--- /dev/null
+++ b/config/submodule/coreboot/default/vboot/patches/0001-test-patch.patch
@@ -0,0 +1,26 @@
+From 68f99140dda455a4f4e9d73df6d7b0a504494e95 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sun, 19 May 2024 23:35:52 +0100
+Subject: [PATCH 1/1] test patch
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ Makefile | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/Makefile b/Makefile
+index 4cb265b2..ef29489f 100644
+--- a/Makefile
++++ b/Makefile
+@@ -2,6 +2,8 @@
+ # Use of this source code is governed by a BSD-style license that can be
+ # found in the LICENSE file.
+ 
++# test
++
+ # This Makefile normally builds in a 'build' subdir, but use
+ #
+ #    make BUILD=<dir>
+-- 
+2.39.2
+
diff --git a/include/git.sh b/include/git.sh
index d737fd1c..91ccf179 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -93,6 +93,9 @@ git_prep()
 	if [ "$project" != "coreboot" ] || [ $# -gt 2 ]; then
 		[ ! -f "$tmpgit/.gitmodules" ] || git -C "$tmpgit" submodule \
 		    update --init --checkout || $err "git_prep $_loc: !submod"
+
+		patch_submodules
+
 		if [ "$project" = "coreboot" ] && [ -n "$xtree" ] && \
 		    [ "$xtree" != "$tree" ]; then
 			(
@@ -114,6 +117,24 @@ git_prep()
 		x_ ./update project trees -f coreboot "$xtree"; return 0
 }
 
+patch_submodules()
+{
+	moddir="${PWD}/config/submodule/$project"
+	[ -n "$tree" ] && moddir="$moddir/$tree"
+	[ -d "$moddir" ] || return 0
+
+	git -C "$tmpgit" submodule status | awk '{print $2}' > \
+	    "$tmpdir/modules" || $err "$moddir: cannot list submodules"
+
+	while read -r modsrcdir; do
+		modname="${modsrcdir##*/}"
+		modpatchdir="$moddir/$modname/patches"
+		[ -d "$modpatchdir" ] || continue
+
+		git_am_patches "$tmpgit/$modsrcdir" "$modpatchdir"
+	done < "$tmpdir/modules"
+}
+
 git_am_patches()
 {
 	for _patch in "$2/"*; do

From 8629873a6043067affc137be275b7aa69cb1f10c Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Mon, 20 May 2024 10:46:25 -0600
Subject: [PATCH 0386/1549] Fix E6400 display issue with 1440 x 900 panel

The E6400 uses a 100 MHz reference clock on DPLL_REF_SSCLK, whereas
libgfxinit assumed that the reference was always 96 MHz. The frequency
difference caused by a 100 MHz reference with PLL config values
calculated assuming a 96 MHz reference were not significant enough to
cause noticable issues with the more common 1280 x 800 panels, but are
enough to matter for the 1440 x 900 panels which use a higher pixel
clock. This only affected the pre-OS graphics environment provided by
libgfxinit, as Linux drivers would determine the reference clock
frequency based on data in the VBT.

Fix this by making the reference clock frequency in libgfxinit
configurable for GM45 based on a new coreboot Kconfig, which is set to
100 MHz for the E6400.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 ...e-100-MHz-reference-clock-for-displa.patch | 36 ++++++++++++++++
 .../e6400_4mb/config/libgfxinit_corebootfb    |  1 +
 .../e6400_4mb/config/libgfxinit_txtmode       |  1 +
 config/coreboot/e6400nvidia_4mb/config/normal |  1 +
 ...lls.adb-Make-reference-clock-frequen.patch | 42 +++++++++++++++++++
 5 files changed, 81 insertions(+)
 create mode 100644 config/coreboot/dell/patches/0010-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
 create mode 100644 config/submodule/coreboot/dell/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch

diff --git a/config/coreboot/dell/patches/0010-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch b/config/coreboot/dell/patches/0010-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
new file mode 100644
index 00000000..7f85d0ed
--- /dev/null
+++ b/config/coreboot/dell/patches/0010-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
@@ -0,0 +1,36 @@
+From c35d431a0f1b326b18cd5bbb7d1d49e67d3309bd Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Mon, 20 May 2024 10:24:16 -0600
+Subject: [PATCH] mb/dell/e6400: Use 100 MHz reference clock for display
+
+The E6400 uses a 100 MHz reference clock for spread spectrum support on
+LVDS, whereas libgfxinit previously assumed a 96 MHz input clock. For
+the more common 1280 x 800 display panels, the numerical error was not
+large enough to cause noticable issues, but the actual pixel clock
+frequency derived from a 100 MHz reference using PLL configs calculated
+assuming a 96 MHz reference was not close enough for 1440 x 900 panels,
+which require a much higher pixel clock. This resulted in a garbled
+display in the pre-OS graphics environment provided by libgfxinit.
+
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e6400/Kconfig | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/src/mainboard/dell/e6400/Kconfig b/src/mainboard/dell/e6400/Kconfig
+index 034de4be2b..4cb16af697 100644
+--- a/src/mainboard/dell/e6400/Kconfig
++++ b/src/mainboard/dell/e6400/Kconfig
+@@ -17,6 +17,9 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select INTEL_GMA_HAVE_VBT
+ 	select EC_DELL_MEC5035
+ 
++config INTEL_GMA_DPLL_REF_FREQ
++	default 100000000
++
+ config MAINBOARD_DIR
+ 	default "dell/e6400"
+ 
+-- 
+2.45.1
+
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
index fcdde6b2..e61318e4 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
@@ -136,6 +136,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
index e253feb0..8e0b0131 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
@@ -134,6 +134,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/e6400nvidia_4mb/config/normal b/config/coreboot/e6400nvidia_4mb/config/normal
index 4593f32a..8cf79154 100644
--- a/config/coreboot/e6400nvidia_4mb/config/normal
+++ b/config/coreboot/e6400nvidia_4mb/config/normal
@@ -133,6 +133,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/submodule/coreboot/dell/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch b/config/submodule/coreboot/dell/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
new file mode 100644
index 00000000..6ead9518
--- /dev/null
+++ b/config/submodule/coreboot/dell/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
@@ -0,0 +1,42 @@
+From 2c29f01a18d0a104bcc4f785e3901de584d02d7e Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Mon, 20 May 2024 10:10:03 -0600
+Subject: [PATCH] g45/hw-gfx-gma-plls.adb: Make reference clock frequency
+ configurable
+
+Instead of assuming a 96 MHz reference clock frequency, use the value
+specified by the new INTEL_GMA_DPLL_REF_FREQ Kconfig. This defaults to
+96 MHz to preserve the existing behavior. An example of where this is
+needed is the DPLL_REF_SSCLK input, which will typically be 100 MHz
+to support LVDS spread spectrum clocking.
+
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ common/g45/hw-gfx-gma-plls.adb | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/common/g45/hw-gfx-gma-plls.adb b/common/g45/hw-gfx-gma-plls.adb
+index 67242f2..1aee576 100644
+--- a/common/g45/hw-gfx-gma-plls.adb
++++ b/common/g45/hw-gfx-gma-plls.adb
+@@ -12,6 +12,8 @@
+ -- GNU General Public License for more details.
+ --
+ 
++with CB.Config
++
+ with HW.Time;
+ with HW.GFX.GMA.Config;
+ with HW.GFX.GMA.Registers;
+@@ -460,7 +462,7 @@ is
+               (Display           => Port_Cfg.Display,
+                Target_Dotclock   => Target_Clock,
+                -- should be, but doesn't has to be always the same:
+-               Reference_Clock   => 96_000_000,
++               Reference_Clock   => CB.Config.INTEL_GMA_DPLL_REF_FREQ,
+                Best_Clock        => Clk,
+                Valid             => Success);
+          else
+-- 
+2.45.1
+

From abe6717c332238e46fd56195b645cdb024f2db90 Mon Sep 17 00:00:00 2001
From: Mate Kukri <km@mkukri.xyz>
Date: Mon, 20 May 2024 20:48:44 +0100
Subject: [PATCH 0387/1549] Add NVMe support to GRUB2 payload

Tested on OptiPlex 3050 (via injecting grub2.elf into WIP coreboot
port).
---
 config/grub/config/grub.cfg                   |   45 +-
 config/grub/modules.list                      |    1 +
 ...-native-NVMe-driver-based-on-SeaBIOS.patch | 1074 +++++++++++++++++
 3 files changed, 1113 insertions(+), 7 deletions(-)
 create mode 100644 config/grub/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 3bbd2ecc..6b36d90b 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -76,10 +76,20 @@ function search_grub {
 	echo -n "Attempting to load grub.cfg from '${1}' devices"
 	for i in 0 1 2 3 4 5 6 7 8 9 10 11; do
 		for part in 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20; do
-			try_user_config "(${1}${i},${part})"
+			if [ "${1}" != "nvme" ]; then
+				try_user_config "(${1}${i},${part})"
+			else
+				# TODO: do we care about other namesapces
+				try_user_config "(nvme${i}n1,${part})"
+			fi
 		done
-		# raw devices e.g. (ahci0) instead of (ahci0,1)
-		try_user_config "(${1}${i})"
+		if [ "${1}" != "nvme" ]; then
+			# raw devices e.g. (ahci0) instead of (ahci0,1)
+			try_user_config "(${1}${i})"
+		else
+			# TODO: do we care about other namesapces
+			try_user_config "(nvme${i}n1)"
+		fi
 	done
 	echo # Insert newline
 }
@@ -102,10 +112,20 @@ function search_isolinux {
 	echo "\nAttempting to parse iso/sys/extlinux config from '${1}' devices"
 	for i in 0 1 2 3 4 5 6 7 8 9 10 11; do
 		for part in 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20; do
-			try_isolinux_config "(${1}${i},${part})"
+			if [ "${1}" != "nvme" ]; then
+				try_isolinux_config "(${1}${i},${part})"
+			else
+				# TODO: see above
+				try_isolinux_config "(nvme${i}n1,${part})"
+			fi
 		done
-		# raw devices e.g. (usb0) instead of (usb0,1)
-		try_isolinux_config "(${1}${i})"
+		if [ "${1}" != "nvme" ]; then
+			# raw devices e.g. (usb0) instead of (usb0,1)
+			try_isolinux_config "(${1}${i})"
+		else
+			# TODO: do we care about other namesapces
+			try_isolinux_config "(nvme${i}n1)"
+		fi
 	done
 	echo # Insert newline
 }
@@ -125,6 +145,9 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 	if [ "${grub_scan_disk}" != "ahci" ]; then
 		search_bootcfg ata
 	fi
+	if [ "${grub_scan_disk}" != "nvme" ]; then
+		search_bootcfg nvme
+	fi
 
 	# grub device enumeration is very slow, so checks are hardcoded
 
@@ -143,6 +166,7 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 
 	unset ahcidev
 	unset atadev
+	unset nvmedev
 	for i in 11 10 9 8 7 6 5 4 3 2 1 0; do
 		for part in 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1; do
 			if [ "${grub_scan_disk}" != "ata" ]; then
@@ -151,6 +175,10 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 			if [ "${grub_scan_disk}" != "ahci" ]; then
 				atadev="(ata${i},${part}) ${atadev}"
 			fi
+			if [ "${grub_scan_disk}" != "nvme" ]; then
+				# TODO: do we care about other namesapces
+				nvmedev="(nvme${i}n1,${part}) ${nvmedev}"
+			fi
 		done
 	done
 
@@ -185,6 +213,9 @@ menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on AHCI  [a]' --hotkey='a'
 menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on ATA/IDE  [d]' --hotkey='d' {
 	search_bootcfg ata
 }
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on NVMe  [e]' --hotkey='e' {
+	search_bootcfg nvme
+}
 if [ -f (cbfsdisk)/grubtest.cfg ]; then
 menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey='t' {
 	set root='(cbfsdisk)'
@@ -246,4 +277,4 @@ submenu 'Other  [z]' --hotkey='z' {
 	menuentry 'Disable spkmodem  [z]' --hotkey='z' {
 		terminal_output --remove spkmodem
 	}
-}
\ No newline at end of file
+}
diff --git a/config/grub/modules.list b/config/grub/modules.list
index f3768adb..5943a9ae 100644
--- a/config/grub/modules.list
+++ b/config/grub/modules.list
@@ -105,6 +105,7 @@ multiboot2 \
 nativedisk \
 normal \
 ntfs \
+nvme \
 ohci \
 part_bsd \
 part_dfly \
diff --git a/config/grub/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
new file mode 100644
index 00000000..b00611a0
--- /dev/null
+++ b/config/grub/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
@@ -0,0 +1,1074 @@
+From ef9d61ae9ed490301adf9ee064a9fc1190069d81 Mon Sep 17 00:00:00 2001
+From: Mate Kukri <km@mkukri.xyz>
+Date: Mon, 20 May 2024 11:43:35 +0100
+Subject: Add native NVMe driver based on SeaBIOS
+
+Tested to successfully boot Debian on QEMU and OptiPlex 3050.
+
+Signed-off-by: Mate Kukri <km@mkukri.xyz>
+---
+ Makefile.am                     |   2 +-
+ grub-core/Makefile.core.def     |   6 +
+ grub-core/commands/nativedisk.c |   1 +
+ grub-core/disk/nvme-int.h       | 208 +++++++++
+ grub-core/disk/nvme.c           | 781 ++++++++++++++++++++++++++++++++
+ include/grub/disk.h             |   1 +
+ 6 files changed, 998 insertions(+), 1 deletion(-)
+ create mode 100644 grub-core/disk/nvme-int.h
+ create mode 100644 grub-core/disk/nvme.c
+
+diff --git a/Makefile.am b/Makefile.am
+index 65016f856..7bc0866ba 100644
+--- a/Makefile.am
++++ b/Makefile.am
+@@ -434,7 +434,7 @@ if COND_i386_coreboot
+ FS_PAYLOAD_MODULES ?= $(shell cat grub-core/fs.lst)
+ default_payload.elf: grub-mkstandalone grub-mkimage FORCE
+ 	test -f $@ && rm $@ || true
+-	pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata xhci ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
++	pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata nvme xhci ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
+ endif
+ 
+ endif
+diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
+index ea782666d..0f893369a 100644
+--- a/grub-core/Makefile.core.def
++++ b/grub-core/Makefile.core.def
+@@ -2602,3 +2602,9 @@ module = {
+   efi = commands/bli.c;
+   enable = efi;
+ };
++
++module = {
++  name = nvme;
++  common = disk/nvme.c;
++  enable = pci;
++};
+diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c
+index 580c8d3b0..a2c766fbd 100644
+--- a/grub-core/commands/nativedisk.c
++++ b/grub-core/commands/nativedisk.c
+@@ -78,6 +78,7 @@ get_uuid (const char *name, char **uuid, int getnative)
+     case GRUB_DISK_DEVICE_ATA_ID:
+     case GRUB_DISK_DEVICE_SCSI_ID:
+     case GRUB_DISK_DEVICE_XEN:
++    case GRUB_DISK_DEVICE_NVME_ID:
+       if (getnative)
+ 	break;
+       /* FALLTHROUGH */
+diff --git a/grub-core/disk/nvme-int.h b/grub-core/disk/nvme-int.h
+new file mode 100644
+index 000000000..1295b58aa
+--- /dev/null
++++ b/grub-core/disk/nvme-int.h
+@@ -0,0 +1,208 @@
++// NVMe datastructures and constants
++//
++// Copyright 2017 Amazon.com, Inc. or its affiliates.
++//
++// This file may be distributed under the terms of the GNU LGPLv3 license.
++
++#ifndef __NVME_INT_H
++#define __NVME_INT_H
++
++#include <grub/types.h>
++
++/* Data structures */
++
++/* The register file of a NVMe host controller. This struct follows the naming
++   scheme in the NVMe specification. */
++struct nvme_reg {
++    grub_uint64_t cap;                    /* controller capabilities */
++    grub_uint32_t vs;                     /* version */
++    grub_uint32_t intms;                  /* interrupt mask set */
++    grub_uint32_t intmc;                  /* interrupt mask clear */
++    grub_uint32_t cc;                     /* controller configuration */
++    grub_uint32_t _res0;
++    grub_uint32_t csts;                   /* controller status */
++    grub_uint32_t _res1;
++    grub_uint32_t aqa;                    /* admin queue attributes */
++    grub_uint64_t asq;                    /* admin submission queue base address */
++    grub_uint64_t acq;                    /* admin completion queue base address */
++};
++
++/* Submission queue entry */
++struct nvme_sqe {
++    union {
++        grub_uint32_t dword[16];
++        struct {
++            grub_uint32_t cdw0;           /* Command DWORD 0 */
++            grub_uint32_t nsid;           /* Namespace ID */
++            grub_uint64_t _res0;
++            grub_uint64_t mptr;           /* metadata ptr */
++
++            grub_uint64_t dptr_prp1;
++            grub_uint64_t dptr_prp2;
++        };
++    };
++};
++
++/* Completion queue entry */
++struct nvme_cqe {
++    union {
++        grub_uint32_t dword[4];
++        struct {
++            grub_uint32_t cdw0;
++            grub_uint32_t _res0;
++            grub_uint16_t sq_head;
++            grub_uint16_t sq_id;
++            grub_uint16_t cid;
++            grub_uint16_t status;
++        };
++    };
++};
++
++/* The common part of every submission or completion queue. */
++struct nvme_queue {
++    grub_uint32_t *dbl;                   /* doorbell */
++    grub_uint16_t mask;                   /* length - 1 */
++};
++
++struct nvme_cq {
++    struct nvme_queue common;
++    struct nvme_cqe *cqe;
++
++    /* We have read upto (but not including) this entry in the queue. */
++    grub_uint16_t head;
++
++    /* The current phase bit the controller uses to indicate that it has written
++       a new entry. This is inverted after each wrap. */
++    unsigned phase : 1;
++};
++
++struct nvme_sq {
++    struct nvme_queue common;
++    struct nvme_sqe *sqe;
++
++    /* Corresponding completion queue. We only support a single SQ per CQ. */
++    struct nvme_cq *cq;
++
++    /* The last entry the controller has fetched. */
++    grub_uint16_t head;
++
++    /* The last value we have written to the tail doorbell. */
++    grub_uint16_t tail;
++};
++
++struct nvme_ctrl {
++    grub_pci_device_t pci;
++    struct nvme_reg volatile *reg;
++
++    grub_uint32_t ctrlnum;
++
++    grub_uint32_t doorbell_stride;        /* in bytes */
++
++    struct nvme_sq admin_sq;
++    struct nvme_cq admin_cq;
++
++    grub_uint32_t ns_count;
++
++    struct nvme_sq io_sq;
++    struct nvme_cq io_cq;
++};
++
++struct nvme_namespace {
++    struct nvme_namespace *next;
++    struct nvme_namespace **prev;
++
++    char *devname;
++
++    grub_uint32_t nsnum;
++
++    struct nvme_ctrl *ctrl;
++
++    grub_uint32_t ns_id;
++
++    grub_uint64_t lba_count;              /* The total amount of sectors. */
++
++    grub_uint32_t block_size;
++    grub_uint32_t metadata_size;
++    grub_uint32_t max_req_size;
++};
++
++/* Data structures for NVMe admin identify commands */
++
++struct nvme_identify_ctrl {
++    grub_uint16_t vid;
++    grub_uint16_t ssvid;
++    char sn[20];
++    char mn[40];
++    char fr[8];
++
++    grub_uint8_t rab;
++    grub_uint8_t ieee[3];
++    grub_uint8_t cmic;
++    grub_uint8_t mdts;
++
++    char _boring[516 - 78];
++
++    grub_uint32_t nn;                     /* number of namespaces */
++};
++
++struct nvme_identify_ns_list {
++    grub_uint32_t ns_id[1024];
++};
++
++struct nvme_lba_format {
++    grub_uint16_t ms;
++    grub_uint8_t  lbads;
++    grub_uint8_t  rp;
++};
++
++struct nvme_identify_ns {
++    grub_uint64_t nsze;
++    grub_uint64_t ncap;
++    grub_uint64_t nuse;
++    grub_uint8_t  nsfeat;
++    grub_uint8_t  nlbaf;
++    grub_uint8_t  flbas;
++
++    char _boring[128 - 27];
++
++    struct nvme_lba_format lbaf[16];
++};
++
++union nvme_identify {
++    struct nvme_identify_ns      ns;
++    struct nvme_identify_ctrl    ctrl;
++    struct nvme_identify_ns_list ns_list;
++};
++
++/* NVMe constants */
++
++#define NVME_CAP_CSS_NVME (1ULL << 37)
++
++#define NVME_CSTS_FATAL   (1U <<  1)
++#define NVME_CSTS_RDY     (1U <<  0)
++
++#define NVME_CC_EN        (1U <<  0)
++
++#define NVME_SQE_OPC_ADMIN_CREATE_IO_SQ 1U
++#define NVME_SQE_OPC_ADMIN_CREATE_IO_CQ 5U
++#define NVME_SQE_OPC_ADMIN_IDENTIFY     6U
++
++#define NVME_SQE_OPC_IO_WRITE 1U
++#define NVME_SQE_OPC_IO_READ  2U
++
++#define NVME_ADMIN_IDENTIFY_CNS_ID_NS       0U
++#define NVME_ADMIN_IDENTIFY_CNS_ID_CTRL     1U
++#define NVME_ADMIN_IDENTIFY_CNS_GET_NS_LIST 2U
++
++#define NVME_CQE_DW3_P (1U << 16)
++
++#define NVME_PAGE_SIZE 4096
++#define NVME_PAGE_MASK ~(NVME_PAGE_SIZE - 1)
++
++/* Length for the queue entries. */
++#define NVME_SQE_SIZE_LOG 6
++#define NVME_CQE_SIZE_LOG 4
++
++#endif
++
++/* EOF */
+diff --git a/grub-core/disk/nvme.c b/grub-core/disk/nvme.c
+new file mode 100644
+index 000000000..093237c70
+--- /dev/null
++++ b/grub-core/disk/nvme.c
+@@ -0,0 +1,781 @@
++// Low level NVMe disk access
++//
++// Based on SeaBIOS NVMe driver - Copyright 2017 Amazon.com, Inc. or its affiliates.
++// Port to GRUB2 done by Mate Kukri
++//
++// This file may be distributed under the terms of the GNU LGPLv3 license.
++
++#include <grub/disk.h>
++#include <grub/dl.h>
++#include <grub/pci.h>
++#include "nvme-int.h"
++
++GRUB_MOD_LICENSE ("GPLv3"); /* LGPLv3 in reality but it is GPLv3 compatible */
++
++static grub_uint32_t grub_nvme_ctrlcnt;
++static grub_uint32_t grub_nvme_nscnt;
++
++static struct nvme_namespace *grub_nvme_namespaces;
++
++// Page aligned "dma bounce buffer" of size NVME_PAGE_SIZE
++static void *nvme_dma_buffer;
++
++static void *
++zalloc_page_aligned(grub_uint32_t size)
++{
++    void *res = grub_memalign(NVME_PAGE_SIZE, size);
++    if (res) grub_memset(res, 0, size);
++    return res;
++}
++
++static void
++nvme_init_queue_common(struct nvme_ctrl *ctrl, struct nvme_queue *q, grub_uint16_t q_idx,
++                       grub_uint16_t length)
++{
++    grub_memset(q, 0, sizeof(*q));
++    q->dbl = (grub_uint32_t *)((char *)ctrl->reg + 0x1000 + q_idx * ctrl->doorbell_stride);
++    grub_dprintf("nvme", " q %p q_idx %u dbl %p\n", q, q_idx, q->dbl);
++    q->mask = length - 1;
++}
++
++static int
++nvme_init_sq(struct nvme_ctrl *ctrl, struct nvme_sq *sq, grub_uint16_t q_idx, grub_uint16_t length,
++             struct nvme_cq *cq)
++{
++    nvme_init_queue_common(ctrl, &sq->common, q_idx, length);
++    sq->sqe = zalloc_page_aligned(sizeof(*sq->sqe) * length);
++
++    if (!sq->sqe) {
++        return -1;
++    }
++
++    grub_dprintf("nvme", "sq %p q_idx %u sqe %p\n", sq, q_idx, sq->sqe);
++    sq->cq   = cq;
++    sq->head = 0;
++    sq->tail = 0;
++
++    return 0;
++}
++
++static int
++nvme_init_cq(struct nvme_ctrl *ctrl, struct nvme_cq *cq, grub_uint16_t q_idx, grub_uint16_t length)
++{
++    nvme_init_queue_common(ctrl, &cq->common, q_idx, length);
++    cq->cqe = zalloc_page_aligned(sizeof(*cq->cqe) * length);
++    if (!cq->cqe) {
++        return -1;
++    }
++
++    cq->head = 0;
++
++    /* All CQE phase bits are initialized to zero. This means initially we wait
++       for the host controller to set these to 1. */
++    cq->phase = 1;
++
++    return 0;
++}
++
++static int
++nvme_poll_cq(struct nvme_cq *cq)
++{
++    grub_uint32_t dw3 = *(volatile grub_uint32_t *) &cq->cqe[cq->head].dword[3];
++    return (!!(dw3 & NVME_CQE_DW3_P) == cq->phase);
++}
++
++static int
++nvme_is_cqe_success(struct nvme_cqe const *cqe)
++{
++    return ((cqe->status >> 1) & 0xFF) == 0;
++}
++
++static struct nvme_cqe
++nvme_error_cqe(void)
++{
++    struct nvme_cqe r;
++
++    /* 0xFF is a vendor specific status code != success. Should be okay for
++       indicating failure. */
++    grub_memset(&r, 0xFF, sizeof(r));
++    return r;
++}
++
++static struct nvme_cqe
++nvme_consume_cqe(struct nvme_sq *sq)
++{
++    struct nvme_cq *cq = sq->cq;
++
++    if (!nvme_poll_cq(cq)) {
++        /* Cannot consume a completion queue entry, if there is none ready. */
++        return nvme_error_cqe();
++    }
++
++    struct nvme_cqe *cqe = &cq->cqe[cq->head];
++    grub_uint16_t cq_next_head = (cq->head + 1) & cq->common.mask;
++    grub_dprintf("nvme", "cq %p head %u -> %u\n", cq, cq->head, cq_next_head);
++    if (cq_next_head < cq->head) {
++        grub_dprintf("nvme", "cq %p wrap\n", cq);
++        cq->phase = ~cq->phase;
++    }
++    cq->head = cq_next_head;
++
++    /* Update the submission queue head. */
++    if (cqe->sq_head != sq->head) {
++        sq->head = cqe->sq_head;
++        grub_dprintf("nvme", "sq %p advanced to %u\n", sq, cqe->sq_head);
++    }
++
++    /* Tell the controller that we consumed the completion. */
++    *(volatile grub_uint32_t *) cq->common.dbl = cq->head;
++
++    return *cqe;
++}
++
++static struct nvme_cqe
++nvme_wait(struct nvme_sq *sq)
++{
++    // static const unsigned nvme_timeout = 5000 /* ms */;
++    // grub_uint32_t to = timer_calc(nvme_timeout);
++    while (!nvme_poll_cq(sq->cq)) {
++        /* FIXME
++        yield();
++
++        if (timer_check(to)) {
++            warn_timeout();
++            return nvme_error_cqe();
++        }*/
++    }
++
++    return nvme_consume_cqe(sq);
++}
++
++/* Returns the next submission queue entry (or NULL if the queue is full). It
++   also fills out Command Dword 0 and clears the rest. */
++static struct nvme_sqe *
++nvme_get_next_sqe(struct nvme_sq *sq, grub_uint8_t opc, void *metadata, void *data, void *data2)
++{
++    if (((sq->head + 1) & sq->common.mask) == sq->tail) {
++        grub_dprintf("nvme", "submission queue is full\n");
++        return NULL;
++    }
++
++    struct nvme_sqe *sqe = &sq->sqe[sq->tail];
++    grub_dprintf("nvme", "sq %p next_sqe %u\n", sq, sq->tail);
++
++    grub_memset(sqe, 0, sizeof(*sqe));
++    sqe->cdw0 = opc | (sq->tail << 16 /* CID */);
++    sqe->mptr = (grub_uint32_t)metadata;
++    sqe->dptr_prp1 = (grub_uint32_t)data;
++    sqe->dptr_prp2 = (grub_uint32_t)data2;
++
++    return sqe;
++}
++
++/* Call this after you've filled out an sqe that you've got from nvme_get_next_sqe. */
++static void
++nvme_commit_sqe(struct nvme_sq *sq)
++{
++    grub_dprintf("nvme", "sq %p commit_sqe %u\n", sq, sq->tail);
++    sq->tail = (sq->tail + 1) & sq->common.mask;
++    *(volatile grub_uint32_t *) sq->common.dbl = sq->tail;
++}
++
++/* Perform an identify command on the admin queue and return the resulting
++   buffer. This may be a NULL pointer, if something failed. This function
++   cannot be used after initialization, because it uses buffers in tmp zone. */
++static union nvme_identify *
++nvme_admin_identify(struct nvme_ctrl *ctrl, grub_uint8_t cns, grub_uint32_t nsid)
++{
++    union nvme_identify *identify_buf = zalloc_page_aligned(4096);
++    if (!identify_buf)
++        return NULL;
++
++    struct nvme_sqe *cmd_identify;
++    cmd_identify = nvme_get_next_sqe(&ctrl->admin_sq,
++                                     NVME_SQE_OPC_ADMIN_IDENTIFY, NULL,
++                                     identify_buf, NULL);
++    if (!cmd_identify)
++        goto error;
++
++    cmd_identify->nsid = nsid;
++    cmd_identify->dword[10] = cns;
++
++    nvme_commit_sqe(&ctrl->admin_sq);
++
++    struct nvme_cqe cqe = nvme_wait(&ctrl->admin_sq);
++
++    if (!nvme_is_cqe_success(&cqe)) {
++        goto error;
++    }
++
++    return identify_buf;
++ error:
++    grub_free(identify_buf);
++    return NULL;
++}
++
++static struct nvme_identify_ctrl *
++nvme_admin_identify_ctrl(struct nvme_ctrl *ctrl)
++{
++    return &nvme_admin_identify(ctrl, NVME_ADMIN_IDENTIFY_CNS_ID_CTRL, 0)->ctrl;
++}
++
++static struct nvme_identify_ns *
++nvme_admin_identify_ns(struct nvme_ctrl *ctrl, grub_uint32_t ns_id)
++{
++    return &nvme_admin_identify(ctrl, NVME_ADMIN_IDENTIFY_CNS_ID_NS,
++                                ns_id)->ns;
++}
++
++static void
++nvme_probe_ns(struct nvme_ctrl *ctrl, grub_uint32_t ns_idx, grub_uint8_t mdts)
++{
++    grub_uint32_t ns_id = ns_idx + 1;
++
++    struct nvme_identify_ns *id = nvme_admin_identify_ns(ctrl, ns_id);
++    if (!id) {
++        grub_dprintf("nvme", "NVMe couldn't identify namespace %u.\n", ns_id);
++        goto free_buffer;
++    }
++
++    grub_uint8_t current_lba_format = id->flbas & 0xF;
++    if (current_lba_format > id->nlbaf) {
++        grub_dprintf("nvme", "NVMe NS %u: current LBA format %u is beyond what the "
++                " namespace supports (%u)?\n",
++                ns_id, current_lba_format, id->nlbaf + 1);
++        goto free_buffer;
++    }
++
++    if (!id->nsze) {
++        grub_dprintf("nvme", "NVMe NS %u is inactive.\n", ns_id);
++        goto free_buffer;
++    }
++
++    if (!nvme_dma_buffer) {
++        nvme_dma_buffer = zalloc_page_aligned(NVME_PAGE_SIZE);
++        if (!nvme_dma_buffer) {
++            goto free_buffer;
++        }
++    }
++
++    struct nvme_namespace *ns = grub_malloc(sizeof(*ns));
++    if (!ns) {
++        goto free_buffer;
++    }
++    grub_memset(ns, 0, sizeof(*ns));
++    ns->ctrl  = ctrl;
++    ns->ns_id = ns_id;
++    ns->lba_count = id->nsze;
++
++    struct nvme_lba_format *fmt = &id->lbaf[current_lba_format];
++
++    ns->block_size    = 1U << fmt->lbads;
++    ns->metadata_size = fmt->ms;
++
++    if (ns->block_size > NVME_PAGE_SIZE) {
++        /* If we see devices that trigger this path, we need to increase our
++           buffer size. */
++        grub_free(ns);
++        goto free_buffer;
++    }
++
++    if (mdts) {
++        ns->max_req_size = ((1U << mdts) * NVME_PAGE_SIZE) / ns->block_size;
++        grub_dprintf("nvme", "NVME NS %u max request size: %d sectors\n",
++                ns_id, ns->max_req_size);
++    } else {
++        ns->max_req_size = -1U;
++    }
++
++    ns->devname = grub_xasprintf("nvme%un%u", ctrl->ctrlnum, ns_id);
++    ns->nsnum = grub_nvme_nscnt++;
++
++    grub_list_push (GRUB_AS_LIST_P (&grub_nvme_namespaces), GRUB_AS_LIST (ns));
++
++free_buffer:
++    grub_free(id);
++}
++
++
++/* Release memory allocated for a completion queue */
++static void
++nvme_destroy_cq(struct nvme_cq *cq)
++{
++    grub_free(cq->cqe);
++    cq->cqe = NULL;
++}
++
++/* Release memory allocated for a submission queue */
++static void
++nvme_destroy_sq(struct nvme_sq *sq)
++{
++    grub_free(sq->sqe);
++    sq->sqe = NULL;
++}
++
++/* Returns 0 on success. */
++static int
++nvme_create_io_cq(struct nvme_ctrl *ctrl, struct nvme_cq *cq, grub_uint16_t q_idx)
++{
++    int rc;
++    struct nvme_sqe *cmd_create_cq;
++    grub_uint32_t length = 1 + (ctrl->reg->cap & 0xffff);
++    if (length > NVME_PAGE_SIZE / sizeof(struct nvme_cqe))
++        length = NVME_PAGE_SIZE / sizeof(struct nvme_cqe);
++
++    rc = nvme_init_cq(ctrl, cq, q_idx, length);
++    if (rc) {
++        goto err;
++    }
++
++    cmd_create_cq = nvme_get_next_sqe(&ctrl->admin_sq,
++                                      NVME_SQE_OPC_ADMIN_CREATE_IO_CQ, NULL,
++                                      cq->cqe, NULL);
++    if (!cmd_create_cq) {
++        goto err_destroy_cq;
++    }
++
++    cmd_create_cq->dword[10] = (cq->common.mask << 16) | (q_idx >> 1);
++    cmd_create_cq->dword[11] = 1 /* physically contiguous */;
++
++    nvme_commit_sqe(&ctrl->admin_sq);
++
++    struct nvme_cqe cqe = nvme_wait(&ctrl->admin_sq);
++
++    if (!nvme_is_cqe_success(&cqe)) {
++        grub_dprintf("nvme", "create io cq failed: %08x %08x %08x %08x\n",
++                cqe.dword[0], cqe.dword[1], cqe.dword[2], cqe.dword[3]);
++
++        goto err_destroy_cq;
++    }
++
++    return 0;
++
++err_destroy_cq:
++    nvme_destroy_cq(cq);
++err:
++    return -1;
++}
++
++/* Returns 0 on success. */
++static int
++nvme_create_io_sq(struct nvme_ctrl *ctrl, struct nvme_sq *sq, grub_uint16_t q_idx, struct nvme_cq *cq)
++{
++    int rc;
++    struct nvme_sqe *cmd_create_sq;
++    grub_uint32_t length = 1 + (ctrl->reg->cap & 0xffff);
++    if (length > NVME_PAGE_SIZE / sizeof(struct nvme_cqe))
++        length = NVME_PAGE_SIZE / sizeof(struct nvme_cqe);
++
++    rc = nvme_init_sq(ctrl, sq, q_idx, length, cq);
++    if (rc) {
++        goto err;
++    }
++
++    cmd_create_sq = nvme_get_next_sqe(&ctrl->admin_sq,
++                                      NVME_SQE_OPC_ADMIN_CREATE_IO_SQ, NULL,
++                                      sq->sqe, NULL);
++    if (!cmd_create_sq) {
++        goto err_destroy_sq;
++    }
++
++    cmd_create_sq->dword[10] = (sq->common.mask << 16) | (q_idx >> 1);
++    cmd_create_sq->dword[11] = (q_idx >> 1) << 16 | 1 /* contiguous */;
++    grub_dprintf("nvme", "sq %p create dword10 %08x dword11 %08x\n", sq,
++            cmd_create_sq->dword[10], cmd_create_sq->dword[11]);
++
++    nvme_commit_sqe(&ctrl->admin_sq);
++
++    struct nvme_cqe cqe = nvme_wait(&ctrl->admin_sq);
++
++    if (!nvme_is_cqe_success(&cqe)) {
++        grub_dprintf("nvme", "create io sq failed: %08x %08x %08x %08x\n",
++                cqe.dword[0], cqe.dword[1], cqe.dword[2], cqe.dword[3]);
++        goto err_destroy_sq;
++    }
++
++    return 0;
++
++err_destroy_sq:
++    nvme_destroy_sq(sq);
++err:
++    return -1;
++}
++
++/* Reads count sectors into buf. The buffer cannot cross page boundaries. */
++static int
++nvme_io_xfer(struct nvme_namespace *ns, grub_uint64_t lba, void *prp1, void *prp2,
++             grub_uint16_t count, int write)
++{
++    if (((grub_uint32_t)prp1 & 0x3) || ((grub_uint32_t)prp2 & 0x3)) {
++        /* Buffer is misaligned */
++        return -1;
++    }
++
++    struct nvme_sqe *io_read = nvme_get_next_sqe(&ns->ctrl->io_sq,
++                                                 write ? NVME_SQE_OPC_IO_WRITE
++                                                       : NVME_SQE_OPC_IO_READ,
++                                                 NULL, prp1, prp2);
++    io_read->nsid = ns->ns_id;
++    io_read->dword[10] = (grub_uint32_t)lba;
++    io_read->dword[11] = (grub_uint32_t)(lba >> 32);
++    io_read->dword[12] = (1U << 31 /* limited retry */) | (count - 1);
++
++    nvme_commit_sqe(&ns->ctrl->io_sq);
++
++    struct nvme_cqe cqe = nvme_wait(&ns->ctrl->io_sq);
++
++    if (!nvme_is_cqe_success(&cqe)) {
++        grub_dprintf("nvme", "read io: %08x %08x %08x %08x\n",
++                cqe.dword[0], cqe.dword[1], cqe.dword[2], cqe.dword[3]);
++
++        return -1;
++    }
++
++    grub_dprintf("nvme", "ns %u %s lba %llu+%u\n", ns->ns_id, write ? "write" : "read",
++            lba, count);
++    return count;
++}
++
++// Transfer up to one page of data using the internal dma bounce buffer
++static int
++nvme_bounce_xfer(struct nvme_namespace *ns, grub_uint64_t lba, void *buf, grub_uint16_t count,
++                 int write)
++{
++    grub_uint16_t const max_blocks = NVME_PAGE_SIZE / ns->block_size;
++    grub_uint16_t blocks = count < max_blocks ? count : max_blocks;
++
++    if (write)
++        grub_memcpy(nvme_dma_buffer, buf, blocks * ns->block_size);
++
++    int res = nvme_io_xfer(ns, lba, nvme_dma_buffer, NULL, blocks, write);
++
++    if (!write && res >= 0)
++        grub_memcpy(buf, nvme_dma_buffer, res * ns->block_size);
++
++    return res;
++}
++
++#define NVME_MAX_PRPL_ENTRIES 15 /* Allows requests up to 64kb */
++
++// Transfer data using page list (if applicable)
++static int
++nvme_prpl_xfer(struct nvme_namespace *ns, grub_uint64_t lba, void *buf, grub_uint16_t count,
++               int write)
++{
++    grub_uint32_t base = (long)buf;
++    grub_int32_t size;
++
++    if (count > ns->max_req_size)
++        count = ns->max_req_size;
++
++    size = count * ns->block_size;
++    /* Special case for transfers that fit into PRP1, but are unaligned */
++    if (((size + (base & ~NVME_PAGE_MASK)) <= NVME_PAGE_SIZE))
++        goto single;
++
++    /* Every request has to be page aligned */
++    if (base & ~NVME_PAGE_MASK)
++        goto bounce;
++
++    /* Make sure a full block fits into the last chunk */
++    if (size & (ns->block_size - 1ULL))
++        goto bounce;
++
++    /* Build PRP list if we need to describe more than 2 pages */
++    if ((ns->block_size * count) > (NVME_PAGE_SIZE * 2)) {
++        grub_uint32_t prpl_len = 0;
++        grub_uint64_t *prpl = nvme_dma_buffer;
++        int first_page = 1;
++        for (; size > 0; base += NVME_PAGE_SIZE, size -= NVME_PAGE_SIZE) {
++            if (first_page) {
++                /* First page is special */
++                first_page = 0;
++                continue;
++            }
++            if (prpl_len >= NVME_MAX_PRPL_ENTRIES)
++                goto bounce;
++            prpl[prpl_len++] = base;
++        }
++        return nvme_io_xfer(ns, lba, buf, prpl, count, write);
++    }
++
++    /* Directly embed the 2nd page if we only need 2 pages */
++    if ((ns->block_size * count) > NVME_PAGE_SIZE)
++        return nvme_io_xfer(ns, lba, buf, (char *) buf + NVME_PAGE_SIZE, count, write);
++
++single:
++    /* One page is enough, don't expose anything else */
++    return nvme_io_xfer(ns, lba, buf, NULL, count, write);
++
++bounce:
++    /* Use bounce buffer to make transfer */
++    return nvme_bounce_xfer(ns, lba, buf, count, write);
++}
++
++static int
++nvme_create_io_queues(struct nvme_ctrl *ctrl)
++{
++    if (nvme_create_io_cq(ctrl, &ctrl->io_cq, 3))
++        goto err;
++
++    if (nvme_create_io_sq(ctrl, &ctrl->io_sq, 2, &ctrl->io_cq))
++        goto err_free_cq;
++
++    return 0;
++
++ err_free_cq:
++    nvme_destroy_cq(&ctrl->io_cq);
++ err:
++    return -1;
++}
++
++/* Waits for CSTS.RDY to match rdy. Returns 0 on success. */
++static int
++nvme_wait_csts_rdy(struct nvme_ctrl *ctrl, unsigned rdy)
++{
++    // grub_uint32_t const max_to = 500 /* ms */ * ((ctrl->reg->cap >> 24) & 0xFFU);
++    // grub_uint32_t to = timer_calc(max_to);
++    grub_uint32_t csts;
++
++    while (rdy != ((csts = ctrl->reg->csts) & NVME_CSTS_RDY)) {
++        // FIXME
++        //yield();
++
++        if (csts & NVME_CSTS_FATAL) {
++            grub_dprintf("nvme", "NVMe fatal error during controller shutdown\n");
++            return -1;
++        }
++
++        /*
++        if (timer_check(to)) {
++            warn_timeout();
++            return -1;
++        }*/
++    }
++
++    return 0;
++}
++
++/* Returns 0 on success. */
++static int grub_nvme_controller_enable(struct nvme_ctrl *ctrl)
++{
++    grub_pci_address_t addr;
++    int rc;
++
++    addr = grub_pci_make_address (ctrl->pci, GRUB_PCI_REG_COMMAND);
++    grub_pci_write_word (addr, grub_pci_read_word (addr) | GRUB_PCI_COMMAND_BUS_MASTER);
++
++    /* Turn the controller off. */
++    ctrl->reg->cc = 0;
++    if (nvme_wait_csts_rdy(ctrl, 0)) {
++        grub_dprintf("nvme", "NVMe fatal error during controller shutdown\n");
++        return -1;
++    }
++
++    ctrl->doorbell_stride = 4U << ((ctrl->reg->cap >> 32) & 0xF);
++
++    rc = nvme_init_cq(ctrl, &ctrl->admin_cq, 1,
++                      NVME_PAGE_SIZE / sizeof(struct nvme_cqe));
++    if (rc) {
++        return -1;
++    }
++
++    rc = nvme_init_sq(ctrl, &ctrl->admin_sq, 0,
++                      NVME_PAGE_SIZE / sizeof(struct nvme_sqe), &ctrl->admin_cq);
++    if (rc) {
++        goto err_destroy_admin_cq;
++    }
++
++    ctrl->reg->aqa = ctrl->admin_cq.common.mask << 16
++        | ctrl->admin_sq.common.mask;
++
++    ctrl->reg->asq = (grub_uint32_t)ctrl->admin_sq.sqe;
++    ctrl->reg->acq = (grub_uint32_t)ctrl->admin_cq.cqe;
++
++    grub_dprintf("nvme", "  admin submission queue: %p\n", ctrl->admin_sq.sqe);
++    grub_dprintf("nvme", "  admin completion queue: %p\n", ctrl->admin_cq.cqe);
++
++    ctrl->reg->cc = NVME_CC_EN | (NVME_CQE_SIZE_LOG << 20)
++        | (NVME_SQE_SIZE_LOG << 16 /* IOSQES */);
++
++    if (nvme_wait_csts_rdy(ctrl, 1)) {
++        grub_dprintf("nvme", "NVMe fatal error while enabling controller\n");
++        goto err_destroy_admin_sq;
++    }
++
++    /* The admin queue is set up and the controller is ready. Let's figure out
++       what namespaces we have. */
++
++    struct nvme_identify_ctrl *identify = nvme_admin_identify_ctrl(ctrl);
++
++    if (!identify) {
++        grub_dprintf("nvme", "NVMe couldn't identify controller.\n");
++        goto err_destroy_admin_sq;
++    }
++
++    grub_dprintf("nvme", "NVMe has %u namespace%s.\n",
++            identify->nn, (identify->nn == 1) ? "" : "s");
++
++    ctrl->ns_count = identify->nn;
++    grub_uint8_t mdts = identify->mdts;
++    grub_free(identify);
++
++    if ((ctrl->ns_count == 0) || nvme_create_io_queues(ctrl)) {
++        /* No point to continue, if the controller says it doesn't have
++           namespaces or we couldn't create I/O queues. */
++        goto err_destroy_admin_sq;
++    }
++
++    /* Give the controller a global number */
++    ctrl->ctrlnum = grub_nvme_ctrlcnt++;
++
++    /* Populate namespace IDs */
++    for (grub_uint32_t ns_idx = 0; ns_idx < ctrl->ns_count; ns_idx++) {
++        nvme_probe_ns(ctrl, ns_idx, mdts);
++    }
++
++    grub_dprintf("nvme", "NVMe initialization complete!\n");
++    return 0;
++
++ err_destroy_admin_sq:
++    nvme_destroy_sq(&ctrl->admin_sq);
++ err_destroy_admin_cq:
++    nvme_destroy_cq(&ctrl->admin_cq);
++    return -1;
++}
++
++static int grub_nvme_pci_probe(grub_pci_device_t dev, grub_pci_id_t pciid __attribute__ ((unused)), void *data __attribute__ ((unused)))
++{
++    grub_pci_address_t addr;
++    grub_uint32_t class, bar, version;
++    struct nvme_reg volatile *reg;
++
++    class = grub_pci_read (grub_pci_make_address (dev, GRUB_PCI_REG_CLASS));
++    if (class >> 16 != 0x0108)
++        return 0;
++    if ((class >> 8 & 0xff) != 2) { /* as of NVM 1.0e */
++        grub_dprintf("nvme", "Found incompatble NVMe: prog-if=%02x\n", class >> 8 & 0xff);
++        return 0;
++    }
++
++    bar = grub_pci_read (grub_pci_make_address (dev, GRUB_PCI_REG_ADDRESS_REG0));
++    reg = grub_pci_device_map_range (dev, bar & GRUB_PCI_ADDR_MEM_MASK, sizeof (*reg));
++
++    addr = grub_pci_make_address (dev, GRUB_PCI_REG_COMMAND);
++    grub_pci_write_word (addr, grub_pci_read_word (addr) | GRUB_PCI_COMMAND_MEM_ENABLED);
++
++    version = reg->vs;
++    grub_dprintf("nvme", "Found NVMe controller with version %u.%u.%u.\n", version >> 16, (version >> 8) & 0xFF, version & 0xFF);
++    grub_dprintf("nvme", "  Capabilities %016llx\n", reg->cap);
++
++    if (~reg->cap & NVME_CAP_CSS_NVME) {
++        grub_dprintf("nvme", "Controller doesn't speak NVMe command set. Skipping.\n");
++        goto err;
++    }
++
++    struct nvme_ctrl *ctrl = grub_malloc(sizeof(*ctrl));
++    if (!ctrl)
++        goto err;
++
++    grub_memset(ctrl, 0, sizeof(*ctrl));
++
++    ctrl->reg = reg;
++    ctrl->pci = dev;
++
++    if (grub_nvme_controller_enable(ctrl))
++        goto err_free_ctrl;
++
++    return 0;
++
++ err_free_ctrl:
++    grub_free(ctrl);
++ err:
++    grub_dprintf("nvme", "Failed to enable NVMe controller.\n");
++    return 0;
++}
++
++static int
++grub_nvme_iterate (grub_disk_dev_iterate_hook_t hook, void *hook_data, grub_disk_pull_t pull)
++{
++  struct nvme_namespace *ns;
++
++  if (pull != GRUB_DISK_PULL_NONE)
++    return 0;
++
++  FOR_LIST_ELEMENTS(ns, grub_nvme_namespaces)
++    if (hook (ns->devname, hook_data))
++      return 1;
++
++  return 0;
++}
++
++static grub_err_t
++grub_nvme_open (const char *name __attribute ((unused)), grub_disk_t disk __attribute ((unused)))
++{
++  struct nvme_namespace *ns;
++
++  FOR_LIST_ELEMENTS(ns, grub_nvme_namespaces)
++    if (grub_strcmp (ns->devname, name) == 0)
++      break;
++
++  if (! ns)
++    return grub_error (GRUB_ERR_UNKNOWN_DEVICE, "can't open device");
++
++  disk->total_sectors = ns->lba_count;
++  disk->max_agglomerate = ns->max_req_size;
++
++  disk->id = ns->nsnum; /* global id of the namespace */
++
++  disk->data = ns;
++
++  return 0;
++}
++
++static grub_err_t
++nvme_readwrite(struct nvme_namespace *ns, grub_disk_addr_t sector, grub_size_t num_sectors, char *buf, int write)
++{
++    for (int i = 0; i < num_sectors;) {
++        grub_uint16_t blocks_remaining = num_sectors - i;
++        char *op_buf = buf + i * ns->block_size;
++        int blocks = nvme_prpl_xfer(ns, sector + i, op_buf, blocks_remaining, write);
++        if (blocks < 0)
++            return GRUB_ERR_IO;
++        i += blocks;
++    }
++    return GRUB_ERR_NONE;
++}
++
++static grub_err_t
++grub_nvme_read (grub_disk_t disk, grub_disk_addr_t sector, grub_size_t num_sectors, char *buf)
++{
++  return nvme_readwrite((struct nvme_namespace *) disk->data, sector, num_sectors, buf, 0);
++}
++
++static grub_err_t
++grub_nvme_write (grub_disk_t disk, grub_disk_addr_t sector, grub_size_t num_sectors, const char *buf)
++{
++  return nvme_readwrite((struct nvme_namespace *) disk->data, sector, num_sectors, buf, 1);
++}
++
++static struct grub_disk_dev grub_nvme_dev =
++  {
++    .name = "nvme",
++    .id = GRUB_DISK_DEVICE_NVME_ID,
++    .disk_iterate = grub_nvme_iterate,
++    .disk_open = grub_nvme_open,
++    .disk_read = grub_nvme_read,
++    .disk_write = grub_nvme_write,
++    .next = 0
++  };
++
++GRUB_MOD_INIT(nvme)
++{
++  grub_stop_disk_firmware ();
++  grub_pci_iterate (grub_nvme_pci_probe, NULL);
++  grub_disk_dev_register (&grub_nvme_dev);
++}
++
++GRUB_MOD_FINI(nvme)
++{
++  grub_disk_dev_unregister (&grub_nvme_dev);
++}
+diff --git a/include/grub/disk.h b/include/grub/disk.h
+index fbf23df7f..186e76f0b 100644
+--- a/include/grub/disk.h
++++ b/include/grub/disk.h
+@@ -52,6 +52,7 @@ enum grub_disk_dev_id
+     GRUB_DISK_DEVICE_UBOOTDISK_ID,
+     GRUB_DISK_DEVICE_XEN,
+     GRUB_DISK_DEVICE_OBDISK_ID,
++    GRUB_DISK_DEVICE_NVME_ID
+   };
+ 
+ struct grub_disk;
+-- 
+2.39.2
+

From 835e5ad0e8c4394c7564ad7c92eff862edbabdbf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 21 May 2024 18:09:41 +0100
Subject: [PATCH 0388/1549] git.sh: fix invalid command in git_prep()

"./update project trees" is a leftover from the
old build system design, prior to audits.

this particular call is for when xtree is defined,
which means that a given tree must rely on the given
coreboot tree defined by xtree. the "xtree" tree is
downloaded, so that its crossgcc builds can be re-used
to save time when building targets across many trees.

this is because trees often use identical crossgcc builds.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/git.sh b/include/git.sh
index 91ccf179..934976eb 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -114,7 +114,7 @@ git_prep()
 	[ "$_loc" = "${_loc%/*}" ] || x_ mkdir -p "${_loc%/*}"
 	mv "$tmpgit" "$_loc" || $err "git_prep: !mv $tmpgit $_loc"
 	[ -n "$xtree" ] && [ ! -d "src/coreboot/$xtree" ] && \
-		x_ ./update project trees -f coreboot "$xtree"; return 0
+		x_ ./update trees -f coreboot "$xtree"; return 0
 }
 
 patch_submodules()

From 77ebd050107d367389e3a38e80b8c8eacb647194 Mon Sep 17 00:00:00 2001
From: Mate Kukri <km@mkukri.xyz>
Date: Tue, 21 May 2024 19:46:34 +0100
Subject: [PATCH 0389/1549] Also try unlocking encrypted volume on NVMe

---
 config/grub/config/grub.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 6b36d90b..4f459b4c 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -184,7 +184,7 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 
 	set pager=0
 	echo -n "Attempting to unlock encrypted volumes"
-	for dev in ${ahcidev} ${atadev} ${lvmvol} ${raidvol}; do
+	for dev in ${ahcidev} ${atadev} ${nvmedev} ${lvmvol} ${raidvol}; do
 		if cryptomount "${dev}" ; then break ; fi
 	done
 	set pager=1

From e5a5935d8d99dccf66067b5e907d1df81b4a15c4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 21 May 2024 23:32:18 +0100
Subject: [PATCH 0390/1549] fix building coreboot images on i686 hosts

firstly, memtest86+ is currently not cross compiled and
relies on 64-bit headers (x86_64 only). a 32-bit distro
is unlikely to be able to build 64-bit binaries.

secondly: vboot throws a build error due to -Werror when
building on 32-bit hosts. we rely on vboot code to build
cbfstool, so turn off -Werror on vboot

that's all. 32-bit hosts are not recommended; it is assumed
that you are building on an x86_64 host. work will go into
the build system at a later date to make it more portable,
by cross compiling everything, but this should fix 32-bit
for now.

there are some x60/t60 users who still want to build roms,
so let's allow them that possibility.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../0001-don-t-treat-warnings-as-errors.patch | 26 ++++++++++++++
 .../0001-don-t-treat-warnings-as-errors.patch | 35 +++++++++++++++++++
 .../vboot/patches/0001-test-patch.patch       | 26 --------------
 .../0001-don-t-treat-warnings-as-errors.patch | 35 +++++++++++++++++++
 .../0001-don-t-treat-warnings-as-errors.patch | 26 ++++++++++++++
 .../0001-don-t-treat-warnings-as-errors.patch | 26 ++++++++++++++
 .../0001-don-t-treat-warnings-as-errors.patch | 35 +++++++++++++++++++
 .../0001-don-t-treat-warnings-as-errors.patch | 35 +++++++++++++++++++
 script/roms                                   |  2 ++
 9 files changed, 220 insertions(+), 26 deletions(-)
 create mode 100644 config/submodule/coreboot/coreboot413/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
 create mode 100644 config/submodule/coreboot/default/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
 delete mode 100644 config/submodule/coreboot/default/vboot/patches/0001-test-patch.patch
 create mode 100644 config/submodule/coreboot/dell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
 create mode 100644 config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
 create mode 100644 config/submodule/coreboot/fam15h_udimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
 create mode 100644 config/submodule/coreboot/haswell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
 create mode 100644 config/submodule/coreboot/i945/vboot/patches/0001-don-t-treat-warnings-as-errors.patch

diff --git a/config/submodule/coreboot/coreboot413/vboot/patches/0001-don-t-treat-warnings-as-errors.patch b/config/submodule/coreboot/coreboot413/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
new file mode 100644
index 00000000..eb491a37
--- /dev/null
+++ b/config/submodule/coreboot/coreboot413/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
@@ -0,0 +1,26 @@
+From 49569081d248e6eea3d4fb8a2cfb70154d9fd91f Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 21 May 2024 23:14:51 +0100
+Subject: [PATCH 1/1] don't treat warnings as errors
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/Makefile b/Makefile
+index 8f1bd148..67a282ee 100644
+--- a/Makefile
++++ b/Makefile
+@@ -124,7 +124,7 @@ endif
+ # Provide default CC and CFLAGS for firmware builds; if you have any -D flags,
+ # please add them after this point (e.g., -DVBOOT_DEBUG).
+ DEBUG_FLAGS := $(if ${DEBUG},-g -O0,-g -Os)
+-WERROR := -Werror
++WERROR := -Wno-error -w
+ FIRMWARE_FLAGS := -nostdinc -ffreestanding -fno-builtin -fno-stack-protector
+ COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
+ 	-Wundef -Wmissing-prototypes -Wno-trigraphs -Wredundant-decls -Wshadow \
+-- 
+2.39.2
+
diff --git a/config/submodule/coreboot/default/vboot/patches/0001-don-t-treat-warnings-as-errors.patch b/config/submodule/coreboot/default/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
new file mode 100644
index 00000000..9e14dc7d
--- /dev/null
+++ b/config/submodule/coreboot/default/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
@@ -0,0 +1,35 @@
+From d94300a671688746f2fb3d77eefa631a3ed90306 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sun, 19 May 2024 23:35:52 +0100
+Subject: [PATCH 1/1] don't treat warnings as errors
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ Makefile | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/Makefile b/Makefile
+index 4cb265b2..4ba8b2da 100644
+--- a/Makefile
++++ b/Makefile
+@@ -114,7 +114,7 @@ endif
+ # Provide default CC and CFLAGS for firmware builds; if you have any -D flags,
+ # please add them after this point (e.g., -DVBOOT_DEBUG).
+ DEBUG_FLAGS := $(if $(filter-out 0,${DEBUG}),-g -Og,-g -Os)
+-WERROR := -Werror
++WERROR := -Wno-error -w
+ FIRMWARE_FLAGS := -nostdinc -ffreestanding -fno-builtin -fno-stack-protector
+ COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
+ 	-Wundef -Wmissing-prototypes -Wno-trigraphs -Wredundant-decls -Wshadow \
+@@ -128,7 +128,7 @@ COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
+ # returns: $(1) if compiler was successful, empty string otherwise
+ test_ccflag = $(shell \
+ 	printf "$(2)\nvoid _start(void) {}\n" | \
+-	$(CC) -nostdlib -Werror $(1) -xc -c - -o /dev/null \
++	$(CC) -nostdlib -Wno-error -w $(1) -xc -c - -o /dev/null \
+ 	>/dev/null 2>&1 && echo "$(1)")
+ 
+ COMMON_FLAGS += $(call test_ccflag,-Wimplicit-fallthrough)
+-- 
+2.39.2
+
diff --git a/config/submodule/coreboot/default/vboot/patches/0001-test-patch.patch b/config/submodule/coreboot/default/vboot/patches/0001-test-patch.patch
deleted file mode 100644
index 66428b56..00000000
--- a/config/submodule/coreboot/default/vboot/patches/0001-test-patch.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 68f99140dda455a4f4e9d73df6d7b0a504494e95 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sun, 19 May 2024 23:35:52 +0100
-Subject: [PATCH 1/1] test patch
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- Makefile | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/Makefile b/Makefile
-index 4cb265b2..ef29489f 100644
---- a/Makefile
-+++ b/Makefile
-@@ -2,6 +2,8 @@
- # Use of this source code is governed by a BSD-style license that can be
- # found in the LICENSE file.
- 
-+# test
-+
- # This Makefile normally builds in a 'build' subdir, but use
- #
- #    make BUILD=<dir>
--- 
-2.39.2
-
diff --git a/config/submodule/coreboot/dell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch b/config/submodule/coreboot/dell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
new file mode 100644
index 00000000..1e6fdc35
--- /dev/null
+++ b/config/submodule/coreboot/dell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
@@ -0,0 +1,35 @@
+From 191089826bbfe710bf40e494d3e1014537e35a31 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 21 May 2024 23:19:08 +0100
+Subject: [PATCH 1/1] don't treat warnings as errors
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ Makefile | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/Makefile b/Makefile
+index 4cb265b2..4ba8b2da 100644
+--- a/Makefile
++++ b/Makefile
+@@ -114,7 +114,7 @@ endif
+ # Provide default CC and CFLAGS for firmware builds; if you have any -D flags,
+ # please add them after this point (e.g., -DVBOOT_DEBUG).
+ DEBUG_FLAGS := $(if $(filter-out 0,${DEBUG}),-g -Og,-g -Os)
+-WERROR := -Werror
++WERROR := -Wno-error -w
+ FIRMWARE_FLAGS := -nostdinc -ffreestanding -fno-builtin -fno-stack-protector
+ COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
+ 	-Wundef -Wmissing-prototypes -Wno-trigraphs -Wredundant-decls -Wshadow \
+@@ -128,7 +128,7 @@ COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
+ # returns: $(1) if compiler was successful, empty string otherwise
+ test_ccflag = $(shell \
+ 	printf "$(2)\nvoid _start(void) {}\n" | \
+-	$(CC) -nostdlib -Werror $(1) -xc -c - -o /dev/null \
++	$(CC) -nostdlib -Wno-error -w $(1) -xc -c - -o /dev/null \
+ 	>/dev/null 2>&1 && echo "$(1)")
+ 
+ COMMON_FLAGS += $(call test_ccflag,-Wimplicit-fallthrough)
+-- 
+2.39.2
+
diff --git a/config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch b/config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
new file mode 100644
index 00000000..7e569082
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
@@ -0,0 +1,26 @@
+From ba16c0fe8236bd511e879693527993ce8ce3668b Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 21 May 2024 23:19:38 +0100
+Subject: [PATCH 1/1] don't treat warnings as errors
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/Makefile b/Makefile
+index 0539e8d7..5d8c240c 100644
+--- a/Makefile
++++ b/Makefile
+@@ -136,7 +136,7 @@ endif
+ #
+ # Flag ordering: arch, then -f, then -m, then -W
+ DEBUG_FLAGS := $(if ${DEBUG},-g -O0,-g -Os)
+-WERROR := -Werror
++WERROR := -Wno-error -w
+ FIRMWARE_FLAGS := -nostdinc -ffreestanding -fno-builtin -fno-stack-protector
+ COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
+ 	-Wundef -Wmissing-prototypes -Wno-trigraphs -Wredundant-decls -Wshadow \
+-- 
+2.39.2
+
diff --git a/config/submodule/coreboot/fam15h_udimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch b/config/submodule/coreboot/fam15h_udimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
new file mode 100644
index 00000000..1dbf6c13
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_udimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
@@ -0,0 +1,26 @@
+From 2c5c8d9a5c999a5eedd9f17acb0bd3924524657d Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 21 May 2024 23:21:14 +0100
+Subject: [PATCH 1/1] don't treat warnings as errors
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/Makefile b/Makefile
+index 0539e8d7..5d8c240c 100644
+--- a/Makefile
++++ b/Makefile
+@@ -136,7 +136,7 @@ endif
+ #
+ # Flag ordering: arch, then -f, then -m, then -W
+ DEBUG_FLAGS := $(if ${DEBUG},-g -O0,-g -Os)
+-WERROR := -Werror
++WERROR := -Wno-error -w
+ FIRMWARE_FLAGS := -nostdinc -ffreestanding -fno-builtin -fno-stack-protector
+ COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
+ 	-Wundef -Wmissing-prototypes -Wno-trigraphs -Wredundant-decls -Wshadow \
+-- 
+2.39.2
+
diff --git a/config/submodule/coreboot/haswell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch b/config/submodule/coreboot/haswell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
new file mode 100644
index 00000000..73d796c8
--- /dev/null
+++ b/config/submodule/coreboot/haswell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
@@ -0,0 +1,35 @@
+From dd263a01c6f1b63fc12a2a3e96e87a8cee8d987c Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 21 May 2024 23:21:49 +0100
+Subject: [PATCH 1/1] don't treat warnings as errors
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ Makefile | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/Makefile b/Makefile
+index e3739dc0..a11dccbd 100644
+--- a/Makefile
++++ b/Makefile
+@@ -112,7 +112,7 @@ endif
+ # Provide default CC and CFLAGS for firmware builds; if you have any -D flags,
+ # please add them after this point (e.g., -DVBOOT_DEBUG).
+ DEBUG_FLAGS := $(if $(filter-out 0,${DEBUG}),-g -Og,-g -Os)
+-WERROR := -Werror
++WERROR := -Wno-error -w
+ FIRMWARE_FLAGS := -nostdinc -ffreestanding -fno-builtin -fno-stack-protector
+ COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
+ 	-Wundef -Wmissing-prototypes -Wno-trigraphs -Wredundant-decls -Wshadow \
+@@ -126,7 +126,7 @@ COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
+ # returns: $(1) if compiler was successful, empty string otherwise
+ test_ccflag = $(shell \
+ 	printf "$(2)\nvoid _start(void) {}\n" | \
+-	$(CC) -nostdlib -Werror $(1) -xc -c - -o /dev/null \
++	$(CC) -nostdlib -Wno-error -w $(1) -xc -c - -o /dev/null \
+ 	>/dev/null 2>&1 && echo "$(1)")
+ 
+ COMMON_FLAGS += $(call test_ccflag,-Wimplicit-fallthrough)
+-- 
+2.39.2
+
diff --git a/config/submodule/coreboot/i945/vboot/patches/0001-don-t-treat-warnings-as-errors.patch b/config/submodule/coreboot/i945/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
new file mode 100644
index 00000000..91f2eee8
--- /dev/null
+++ b/config/submodule/coreboot/i945/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
@@ -0,0 +1,35 @@
+From 59c393f2a928770c2d397bc93d388543c2d94dab Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 21 May 2024 23:22:50 +0100
+Subject: [PATCH 1/1] don't treat warnings as errors
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ Makefile | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/Makefile b/Makefile
+index a4390522..d2ec9aa3 100644
+--- a/Makefile
++++ b/Makefile
+@@ -125,7 +125,7 @@ endif
+ # Provide default CC and CFLAGS for firmware builds; if you have any -D flags,
+ # please add them after this point (e.g., -DVBOOT_DEBUG).
+ DEBUG_FLAGS := $(if $(filter-out 0,${DEBUG}),-g -Og,-g -Os)
+-WERROR := -Werror
++WERROR := -Wno-error -w
+ FIRMWARE_FLAGS := -nostdinc -ffreestanding -fno-builtin -fno-stack-protector
+ COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
+ 	-Wundef -Wmissing-prototypes -Wno-trigraphs -Wredundant-decls -Wshadow \
+@@ -162,7 +162,7 @@ CFLAGS += -std=gnu11
+ # returns: $(1) if compiler was successful, empty string otherwise
+ test_ccflag = $(shell \
+ 	printf "$(2)\nvoid _start(void) {}\n" | \
+-	$(CC) -nostdlib -Werror $(1) -xc -c - -o /dev/null \
++	$(CC) -nostdlib -Wno-error -w $(1) -xc -c - -o /dev/null \
+ 	>/dev/null 2>&1 && echo "$(1)")
+ 
+ COMMON_FLAGS += $(call test_ccflag,-Wimplicit-fallthrough)
+-- 
+2.39.2
+
diff --git a/script/roms b/script/roms
index b375d939..c1a1b8bc 100755
--- a/script/roms
+++ b/script/roms
@@ -171,6 +171,8 @@ configure_target()
 	[ -z "$tree" ] && $err "$board: tree not defined"
 
 	[ "${payload_memtest}" != "y" ] && payload_memtest="n"
+	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"
+
 	[ "${payload_grub_withseabios}" = "y" ] && payload_grub="y"
 	[ "${payload_grub_withseabios}" = "y" ] && \
 		eval "$(setvars "y" payload_seabios payload_seabios_withgrub)"

From 9f50e362281d7419db0fed8df828977a985059fa Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Tue, 21 May 2024 18:47:04 -0600
Subject: [PATCH 0391/1549] Fix E6400 display reference clock patches

The ones I submitted before seem to have been outdated ones
that don't actually build properly.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 ...e-100-MHz-reference-clock-for-displa.patch | 22 ++++++++++++++++---
 ...lls.adb-Make-reference-clock-frequen.patch |  2 +-
 2 files changed, 20 insertions(+), 4 deletions(-)

diff --git a/config/coreboot/dell/patches/0010-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch b/config/coreboot/dell/patches/0010-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
index 7f85d0ed..f64743a5 100644
--- a/config/coreboot/dell/patches/0010-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
+++ b/config/coreboot/dell/patches/0010-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
@@ -1,4 +1,4 @@
-From c35d431a0f1b326b18cd5bbb7d1d49e67d3309bd Mon Sep 17 00:00:00 2001
+From 6f4968919cf4e801caacf8392492457b79efa9c6 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 20 May 2024 10:24:16 -0600
 Subject: [PATCH] mb/dell/e6400: Use 100 MHz reference clock for display
@@ -14,8 +14,9 @@ display in the pre-OS graphics environment provided by libgfxinit.
 
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
 ---
- src/mainboard/dell/e6400/Kconfig | 3 +++
- 1 file changed, 3 insertions(+)
+ src/mainboard/dell/e6400/Kconfig   | 3 +++
+ src/northbridge/intel/gm45/Kconfig | 4 ++++
+ 2 files changed, 7 insertions(+)
 
 diff --git a/src/mainboard/dell/e6400/Kconfig b/src/mainboard/dell/e6400/Kconfig
 index 034de4be2b..4cb16af697 100644
@@ -31,6 +32,21 @@ index 034de4be2b..4cb16af697 100644
  config MAINBOARD_DIR
  	default "dell/e6400"
  
+diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
+index 2a266b9771..2432c9d78e 100644
+--- a/src/northbridge/intel/gm45/Kconfig
++++ b/src/northbridge/intel/gm45/Kconfig
+@@ -13,6 +13,10 @@ config NORTHBRIDGE_INTEL_GM45
+ 
+ if NORTHBRIDGE_INTEL_GM45
+ 
++config INTEL_GMA_DPLL_REF_FREQ
++	int
++	default 96000000
++
+ config VBOOT
+ 	select VBOOT_STARTS_IN_BOOTBLOCK
+ 
 -- 
 2.45.1
 
diff --git a/config/submodule/coreboot/dell/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch b/config/submodule/coreboot/dell/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
index 6ead9518..bb772461 100644
--- a/config/submodule/coreboot/dell/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
+++ b/config/submodule/coreboot/dell/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
@@ -23,7 +23,7 @@ index 67242f2..1aee576 100644
  -- GNU General Public License for more details.
  --
  
-+with CB.Config
++with CB.Config;
 +
  with HW.Time;
  with HW.GFX.GMA.Config;

From 079afb5bd35a1150277fcff6ffeced964b9133f1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 22 May 2024 02:15:39 +0100
Subject: [PATCH 0392/1549] add CHANGELOG to .gitignore

we want ./update release to work in release archives.

under the current logic, CHANGELOG would be cloned into
release/, thus breaking ./update trees -f

fix it by adding the file to .gitignore

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .gitignore | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.gitignore b/.gitignore
index 36ac930c..9feb2d2a 100644
--- a/.gitignore
+++ b/.gitignore
@@ -29,3 +29,4 @@
 /mrc/
 /util/nvmutil/nvm
 /src/
+/CHANGELOG

From c148fa53dfeb831d05e4c9030a290a09051060cb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 22 May 2024 15:53:15 +0100
Subject: [PATCH 0393/1549] git.sh: remove variable not meaningfully used

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 934976eb..c28a02ad 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -127,8 +127,7 @@ patch_submodules()
 	    "$tmpdir/modules" || $err "$moddir: cannot list submodules"
 
 	while read -r modsrcdir; do
-		modname="${modsrcdir##*/}"
-		modpatchdir="$moddir/$modname/patches"
+		modpatchdir="$moddir/${modsrcdir##*/}/patches"
 		[ -d "$modpatchdir" ] || continue
 
 		git_am_patches "$tmpgit/$modsrcdir" "$modpatchdir"

From dae10dd48210fe26e79d5eea4e625c3041300e29 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 22 May 2024 15:53:37 +0100
Subject: [PATCH 0394/1549] git.sh: remove meaningless check

in the function that immediately follows, it
starts two for loops that check every item in
that directory, using the asterisk wildcard.

if the directory does not exist, then the for
loop will simply break on first pass.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index c28a02ad..46371f90 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -128,8 +128,6 @@ patch_submodules()
 
 	while read -r modsrcdir; do
 		modpatchdir="$moddir/${modsrcdir##*/}/patches"
-		[ -d "$modpatchdir" ] || continue
-
 		git_am_patches "$tmpgit/$modsrcdir" "$modpatchdir"
 	done < "$tmpdir/modules"
 }

From fc3b0ba8bf706e3ddb9f0826477d2d200c06c1e7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 22 May 2024 15:56:35 +0100
Subject: [PATCH 0395/1549] git.sh: shorter variable names

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 46371f90..686eb496 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -119,16 +119,15 @@ git_prep()
 
 patch_submodules()
 {
-	moddir="${PWD}/config/submodule/$project"
-	[ -n "$tree" ] && moddir="$moddir/$tree"
-	[ -d "$moddir" ] || return 0
+	mdir="${PWD}/config/submodule/$project"
+	[ -n "$tree" ] && mdir="$mdir/$tree"
+	[ -d "$mdir" ] || return 0
 
 	git -C "$tmpgit" submodule status | awk '{print $2}' > \
-	    "$tmpdir/modules" || $err "$moddir: cannot list submodules"
+	    "$tmpdir/modules" || $err "$mdir: cannot list submodules"
 
-	while read -r modsrcdir; do
-		modpatchdir="$moddir/${modsrcdir##*/}/patches"
-		git_am_patches "$tmpgit/$modsrcdir" "$modpatchdir"
+	while read -r msrcdir; do
+		git_am_patches "$tmpgit/$msrcdir" "$mdir/${msrcdir##*/}/patches"
 	done < "$tmpdir/modules"
 }
 

From 0014269604fb7c34f42a02e00ff40d5b64c88a83 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 22 May 2024 15:57:47 +0100
Subject: [PATCH 0396/1549] git.sh: remove another meaningless check

again, the directory in question is simply used
in a for loop using asterisk (git_am_patches) and
the for loop simply won't iterate if either the
directory doesn't exist or it contains no items.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/git.sh b/include/git.sh
index 686eb496..04119cae 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -121,7 +121,6 @@ patch_submodules()
 {
 	mdir="${PWD}/config/submodule/$project"
 	[ -n "$tree" ] && mdir="$mdir/$tree"
-	[ -d "$mdir" ] || return 0
 
 	git -C "$tmpgit" submodule status | awk '{print $2}' > \
 	    "$tmpdir/modules" || $err "$mdir: cannot list submodules"

From aa4faf0815b9f3ea839982540599305dd93873af Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 22 May 2024 16:03:28 +0100
Subject: [PATCH 0397/1549] git.sh: remove errant line break

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/git.sh b/include/git.sh
index 04119cae..a77314d6 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -110,7 +110,6 @@ git_prep()
 	[ "$xbmk_release" = "y" ] && [ "$_loc" != "src/$project/$project" ] \
 	    && rmgit "$tmpgit"
 
-
 	[ "$_loc" = "${_loc%/*}" ] || x_ mkdir -p "${_loc%/*}"
 	mv "$tmpgit" "$_loc" || $err "git_prep: !mv $tmpgit $_loc"
 	[ -n "$xtree" ] && [ ! -d "src/coreboot/$xtree" ] && \

From a41633306a66aa7f718561c0c178409a6e7be029 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 22 May 2024 17:59:42 +0100
Subject: [PATCH 0398/1549] git.sh: split submodule handling to new function

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 31 ++++++++++++++++++-------------
 1 file changed, 18 insertions(+), 13 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index a77314d6..9809f377 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -91,20 +91,17 @@ git_prep()
 	git_am_patches "$tmpgit" "$_patchdir" || $err "!am $_loc $_patchdir"
 
 	if [ "$project" != "coreboot" ] || [ $# -gt 2 ]; then
-		[ ! -f "$tmpgit/.gitmodules" ] || git -C "$tmpgit" submodule \
-		    update --init --checkout || $err "git_prep $_loc: !submod"
+		prep_submodules "$_loc"
+	fi
 
-		patch_submodules
-
-		if [ "$project" = "coreboot" ] && [ -n "$xtree" ] && \
-		    [ "$xtree" != "$tree" ]; then
-			(
-			cd "$tmpgit/util" || $err "prep $_loc: !cd $tmpgit/util"
-			rm -Rf crossgcc || $err "prep $_loc: !rm xgcc"
-			ln -s "../../$xtree/util/crossgcc" crossgcc || \
-			    $err "prep $_loc: can't create xgcc symlink"
-			) || $err "prep $_loc: can't create xgcc symlink"
-		fi
+	if [ "$project" = "coreboot" ] && [ -n "$xtree" ] && \
+	    [ "$xtree" != "$tree" ] && [ $# -gt 2 ]; then
+		(
+		cd "$tmpgit/util" || $err "prep $1: !cd $tmpgit/util"
+		rm -Rf crossgcc || $err "prep $1: !rm xgcc"
+		ln -s "../../$xtree/util/crossgcc" crossgcc || \
+		    $err "prep $1: can't create xgcc symlink"
+		) || $err "prep $1: can't create xgcc symlink"
 	fi
 
 	[ "$xbmk_release" = "y" ] && [ "$_loc" != "src/$project/$project" ] \
@@ -116,6 +113,14 @@ git_prep()
 		x_ ./update trees -f coreboot "$xtree"; return 0
 }
 
+prep_submodules()
+{
+	[ ! -f "$tmpgit/.gitmodules" ] || git -C "$tmpgit" submodule \
+	    update --init --checkout || $err "git_prep $1: !submod"
+
+	patch_submodules
+}
+
 patch_submodules()
 {
 	mdir="${PWD}/config/submodule/$project"

From c3e1aa343a0451cd8ab764cdb64b9958ff782884 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 22 May 2024 18:01:39 +0100
Subject: [PATCH 0399/1549] git.sh: merge patch_submodules in prep_submodules

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 9809f377..26720757 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -118,11 +118,6 @@ prep_submodules()
 	[ ! -f "$tmpgit/.gitmodules" ] || git -C "$tmpgit" submodule \
 	    update --init --checkout || $err "git_prep $1: !submod"
 
-	patch_submodules
-}
-
-patch_submodules()
-{
 	mdir="${PWD}/config/submodule/$project"
 	[ -n "$tree" ] && mdir="$mdir/$tree"
 

From d774987697824c489ce97e7664e92aeeaffd94be Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 22 May 2024 18:03:48 +0100
Subject: [PATCH 0400/1549] git.sh: skip submodules if .gitmodules missing

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 26720757..cd4d788f 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -115,8 +115,8 @@ git_prep()
 
 prep_submodules()
 {
-	[ ! -f "$tmpgit/.gitmodules" ] || git -C "$tmpgit" submodule \
-	    update --init --checkout || $err "git_prep $1: !submod"
+	[ -f "$tmpgit/.gitmodules" ] || return 0
+	git -C "$tmpgit" submodule update --init --checkout || $err "$1: !mod"
 
 	mdir="${PWD}/config/submodule/$project"
 	[ -n "$tree" ] && mdir="$mdir/$tree"

From 73a2d99102afe63bb0fe26a3d7abfa33bd0fbc01 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 22 May 2024 18:50:42 +0100
Subject: [PATCH 0401/1549] git.sh: move xgcc linking to a new function

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 20 +++++++++++---------
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index cd4d788f..3b3aeb32 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -94,15 +94,8 @@ git_prep()
 		prep_submodules "$_loc"
 	fi
 
-	if [ "$project" = "coreboot" ] && [ -n "$xtree" ] && \
-	    [ "$xtree" != "$tree" ] && [ $# -gt 2 ]; then
-		(
-		cd "$tmpgit/util" || $err "prep $1: !cd $tmpgit/util"
-		rm -Rf crossgcc || $err "prep $1: !rm xgcc"
-		ln -s "../../$xtree/util/crossgcc" crossgcc || \
-		    $err "prep $1: can't create xgcc symlink"
-		) || $err "prep $1: can't create xgcc symlink"
-	fi
+	[ "$project" = "coreboot" ] && [ -n "$xtree" ] && [ $# -gt 2 ] && \
+	    [ "$xtree" != "$tree" ] && link_crossgcc "$_loc"
 
 	[ "$xbmk_release" = "y" ] && [ "$_loc" != "src/$project/$project" ] \
 	    && rmgit "$tmpgit"
@@ -129,6 +122,15 @@ prep_submodules()
 	done < "$tmpdir/modules"
 }
 
+link_crossgcc()
+{
+	(
+	cd "$tmpgit/util" || $err "prep $1: !cd $tmpgit/util"
+	rm -Rf crossgcc || $err "prep $1: !rm xgcc"
+	ln -s "../../$xtree/util/crossgcc" crossgcc || $err "$1: !xgcc link"
+	) || $err "$1: !xgcc link"
+}
+
 git_am_patches()
 {
 	for _patch in "$2/"*; do

From 093c4a367dc82e0c0690d9fba775bbcf5e7f3701 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 22 May 2024 23:08:13 +0100
Subject: [PATCH 0402/1549] git.sh: move link_crossgcc to end of file

link_crossgcc is called after git_am_patches, so
put it after ward

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 3b3aeb32..e7dfe591 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -122,15 +122,6 @@ prep_submodules()
 	done < "$tmpdir/modules"
 }
 
-link_crossgcc()
-{
-	(
-	cd "$tmpgit/util" || $err "prep $1: !cd $tmpgit/util"
-	rm -Rf crossgcc || $err "prep $1: !rm xgcc"
-	ln -s "../../$xtree/util/crossgcc" crossgcc || $err "$1: !xgcc link"
-	) || $err "$1: !xgcc link"
-}
-
 git_am_patches()
 {
 	for _patch in "$2/"*; do
@@ -142,3 +133,12 @@ git_am_patches()
 			git_am_patches "$1" "$_patches"; continue
 	done
 }
+
+link_crossgcc()
+{
+	(
+	cd "$tmpgit/util" || $err "prep $1: !cd $tmpgit/util"
+	rm -Rf crossgcc || $err "prep $1: !rm xgcc"
+	ln -s "../../$xtree/util/crossgcc" crossgcc || $err "$1: !xgcc link"
+	) || $err "$1: !xgcc link"
+}

From da4272720958f639227c7594018f840d1f693920 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 22 May 2024 23:11:12 +0100
Subject: [PATCH 0403/1549] git.sh: move repo copying to a new function

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index e7dfe591..569daeab 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -100,10 +100,7 @@ git_prep()
 	[ "$xbmk_release" = "y" ] && [ "$_loc" != "src/$project/$project" ] \
 	    && rmgit "$tmpgit"
 
-	[ "$_loc" = "${_loc%/*}" ] || x_ mkdir -p "${_loc%/*}"
-	mv "$tmpgit" "$_loc" || $err "git_prep: !mv $tmpgit $_loc"
-	[ -n "$xtree" ] && [ ! -d "src/coreboot/$xtree" ] && \
-		x_ ./update trees -f coreboot "$xtree"; return 0
+	move_repo "$_loc"
 }
 
 prep_submodules()
@@ -142,3 +139,11 @@ link_crossgcc()
 	ln -s "../../$xtree/util/crossgcc" crossgcc || $err "$1: !xgcc link"
 	) || $err "$1: !xgcc link"
 }
+
+move_repo()
+{
+	[ "$1" = "${1%/*}" ] || x_ mkdir -p "${1%/*}"
+	mv "$tmpgit" "$1" || $err "git_prep: !mv $tmpgit $1"
+	[ -n "$xtree" ] && [ ! -d "src/coreboot/$xtree" ] && \
+		x_ ./update trees -f coreboot "$xtree"; return 0
+}

From 87c361f3df2c585206613e368d5be73a2c0fd126 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 23 May 2024 00:01:20 +0100
Subject: [PATCH 0404/1549] update/trees: remove unused variable

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 1 -
 1 file changed, 1 deletion(-)

diff --git a/script/trees b/script/trees
index f2b988f1..f4a3bf82 100755
--- a/script/trees
+++ b/script/trees
@@ -236,7 +236,6 @@ check_cmake()
 check_autoconf()
 {
 	(
-	_cfgopt=""
 	cd "${1}" || $err "!cd $1"
 	[ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs
 	[ -f "autogen.sh" ] && x_ ./autogen.sh ${autogenargs}

From b8ec7d56404481c6917107f980e8ff90aaf13781 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 May 2024 14:53:45 +0100
Subject: [PATCH 0405/1549] option.sh: generate version file if .git not found

a user was getting error "version unset" when using the
tarball generated from codeberg. it's recommended to use
the git repository properly, or a release archive.

mitigate this so that the build succeeds anyway.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/option.sh | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/option.sh b/include/option.sh
index bfeb9eb3..3648ecd2 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -66,6 +66,11 @@ x_() {
 	[ $# -lt 1 ] || ${@} || $err "Unhandled non-zero exit: $@"; return 0
 }
 
+[ -e ".git" ] || [ -d "version" ] || printf "unknown\n" > version || \
+    $err "Cannot generate unknown version file"
+[ -e ".git" ] || [ -d "versiondate" ] || printf "1716415872\n" > versiondate || \
+    $err "Cannot generate unknown versiondate file"
+
 read -r projectname < projectname || :
 [ ! -f version ] || read -r version < version || :
 version_="${version}"

From 5d87eea77c5a6db9263f08052700bd39b7c2d4c5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 May 2024 15:00:46 +0100
Subject: [PATCH 0406/1549] build: hide git-init output

following on from the previous commit, if you run
something like "./build roms list" when running for
the first time from a codeberg tarball, the output
of the git commands will be included in the output

hide this output

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/build b/build
index b28ce954..d70b44ff 100755
--- a/build
+++ b/build
@@ -75,12 +75,15 @@ git_init()
 	[ -e ".git" ] && return 0
 	eval "$(setvars "$(date -Rud @${versiondate})" cdate _nogit)"
 
-	git init || $err "${PWD}: cannot initialise Git repository"
-	git add -A . || $err "${PWD}: cannot add files to Git repository"
+	git init 1>/dev/null 2>/dev/null || \
+	    $err "${PWD}: cannot initialise Git repository"
+	git add -A . 1>/dev/null 2>/dev/null || \
+	    $err "${PWD}: cannot add files to Git repository"
 	git commit -m "${projectname} ${version}" --date "${cdate}" \
-	    --author="xbmk <xbmk@example.com>" || \
+	    --author="xbmk <xbmk@example.com>" 1>/dev/null 2>/dev/null || \
 	    $err "$PWD: can't commit ${projectname}/${version}, date $cdate"
-	git tag -a "${version}" -m "${projectname} ${version}" || \
+	git tag -a "${version}" -m "${projectname} ${version}" \
+	    1>/dev/null 2>/dev/null || \
 	    $err "${PWD}: cannot git-tag ${projectname}/${version}"
 }
 

From 1cb255e8be3988980446d61da8d99ab035a9f909 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 May 2024 17:50:42 +0100
Subject: [PATCH 0407/1549] git.sh: allow finer control of git submodules

in each submodule configuration directory, a module.cfg
file can now be provided. in it, the user can specify
two repository links (main and backup) and a revision, like
so:

subrepo="repo link goes here"
subrepo_bkup="backup repo link goes here"
subrev="git revision id goes here"

additionally:

in the *main* project directory for the submodules,
a module.list file can be provided. example entries:

3rdparty/vboot
3rdparty/libgfxinit

if the module.list file is provided, only those submodules
will be downloaded. this can be combined with the module.cfg
files, if you wish, but it's optional. you can mix and match.

example locations:

multi-tree project:
config/submodule/coreboot/default/module.list
config/submodule/coreboot/default/vboot/module.cfg
single-tree project:
config/submodule/flashprog/module.list
config/submodule/flashprog/foo/module.cfg

*no* configuration files have been provided, in this commit,
which means that the current behaviour is maintained.

follow-up commits will absolutely configure the submodules.
this is being done to reduce the number of modules downloaded,
because we don't use most of the coreboot submodules that are
downloaded, thus wasting bandwidth and the releases are also
much bigger than necessary.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 53 +++++++++++++++++++++++++++++++++++++++++++++-----
 1 file changed, 48 insertions(+), 5 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 569daeab..f82fd103 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -2,7 +2,8 @@
 # SPDX-FileCopyrightText: 2020,2021,2023,2024 Leah Rowe <leah@libreboot.org>
 # SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
-eval "$(setvars "" _target rev _xm loc url bkup_url depend tree_depend xtree)"
+eval "$(setvars "" _target rev _xm loc url bkup_url depend tree_depend xtree \
+    mdir subrev subrepo subrepo_bkup)"
 
 fetch_project_trees()
 {
@@ -106,17 +107,59 @@ git_prep()
 prep_submodules()
 {
 	[ -f "$tmpgit/.gitmodules" ] || return 0
-	git -C "$tmpgit" submodule update --init --checkout || $err "$1: !mod"
 
 	mdir="${PWD}/config/submodule/$project"
 	[ -n "$tree" ] && mdir="$mdir/$tree"
 
-	git -C "$tmpgit" submodule status | awk '{print $2}' > \
-	    "$tmpdir/modules" || $err "$mdir: cannot list submodules"
+	if [ -f "$mdir/module.list" ]; then
+		cat "$mdir/module.list" > "$tmpdir/modules" || \
+		    $err "!cp $mdir/module.list $tmpdir/modules"
+	else
+		git -C "$tmpgit" submodule status | awk '{print $2}' > \
+		    "$tmpdir/modules" || $err "$mdir: cannot list submodules"
+	fi
 
 	while read -r msrcdir; do
-		git_am_patches "$tmpgit/$msrcdir" "$mdir/${msrcdir##*/}/patches"
+		fetch_submodule "$msrcdir"
+		patch_submodule "$msrcdir"
 	done < "$tmpdir/modules"
+
+	# some build systems may download more (we want to control it)
+	rm -f "$tmpgit/.gitmodules" || $err "!rm .gitmodules as per: $mdir"
+}
+
+fetch_submodule()
+{
+	mcfgdir="$mdir/${1##*/}"
+	eval "$(setvars "" subrev subrepo subrepo_bkup)"
+
+	[ ! -f "$mcfgdir/module.cfg" ] || . "$mcfgdir/module.cfg" || \
+	    $err "! . $mcfgdir/module.cfg"
+
+	if [ -n "$subrepo" ] || [ -n "$subrepo_bkup" ]; then
+		[ -n "$subrev" ] || \
+		    $err "$1 as per $mdir: subrev not defined"
+
+		rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
+		for mod in "$subrepo" "$subrepo_bkup"; do
+			[ -z "$mod" ] && continue
+			git clone "$mod" "$tmpgit/$1" || rm -Rf "$tmpgit/$1" \
+			    || $err "!rm $mod $project $cfgdir $1"
+		done
+		[ -d "$tmpgit/$1" ] || $err "!clone $mod $project $mcfgdir $1"
+	else
+		git -C "$tmpgit" submodule update --init --checkout -- "$1" || \
+		    $err "$mdir: !update $1"
+	fi
+}
+
+patch_submodule()
+{
+	[ -z "$subrev" ] || \
+		git -C "$tmpgit/$1" reset --hard "$subrev" || \
+		    $err "$mdir $1: cannot reset git revision"
+
+	git_am_patches "$tmpgit/$1" "$mdir/${1##*/}/patches"
 }
 
 git_am_patches()

From fdb08143e4558039c6f060c594f035a53631b50f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 May 2024 19:08:57 +0100
Subject: [PATCH 0408/1549] coreboot: only download the necessary submodules

whitelist what modules are downloaded, by adding
module.list files in the corresponding directories
under config/submodule/, per each coreboot tree.

this is making use of functionality added in the
previous commit.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/submodule/coreboot/coreboot413/module.list  | 1 +
 config/submodule/coreboot/default/module.list      | 6 ++++++
 config/submodule/coreboot/dell/module.list         | 4 ++++
 config/submodule/coreboot/fam15h_rdimm/module.list | 4 ++++
 config/submodule/coreboot/fam15h_udimm/module.list | 4 ++++
 config/submodule/coreboot/haswell/module.list      | 4 ++++
 config/submodule/coreboot/i945/module.list         | 4 ++++
 7 files changed, 27 insertions(+)
 create mode 100644 config/submodule/coreboot/coreboot413/module.list
 create mode 100644 config/submodule/coreboot/default/module.list
 create mode 100644 config/submodule/coreboot/dell/module.list
 create mode 100644 config/submodule/coreboot/fam15h_rdimm/module.list
 create mode 100644 config/submodule/coreboot/fam15h_udimm/module.list
 create mode 100644 config/submodule/coreboot/haswell/module.list
 create mode 100644 config/submodule/coreboot/i945/module.list

diff --git a/config/submodule/coreboot/coreboot413/module.list b/config/submodule/coreboot/coreboot413/module.list
new file mode 100644
index 00000000..08e76de0
--- /dev/null
+++ b/config/submodule/coreboot/coreboot413/module.list
@@ -0,0 +1 @@
+3rdparty/vboot
diff --git a/config/submodule/coreboot/default/module.list b/config/submodule/coreboot/default/module.list
new file mode 100644
index 00000000..66c90767
--- /dev/null
+++ b/config/submodule/coreboot/default/module.list
@@ -0,0 +1,6 @@
+3rdparty/arm-trusted-firmware
+3rdparty/chromeec
+3rdparty/intel-microcode
+3rdparty/libgfxinit
+3rdparty/libhwbase
+3rdparty/vboot
diff --git a/config/submodule/coreboot/dell/module.list b/config/submodule/coreboot/dell/module.list
new file mode 100644
index 00000000..3d968b1a
--- /dev/null
+++ b/config/submodule/coreboot/dell/module.list
@@ -0,0 +1,4 @@
+3rdparty/intel-microcode
+3rdparty/libgfxinit
+3rdparty/libhwbase
+3rdparty/vboot
diff --git a/config/submodule/coreboot/fam15h_rdimm/module.list b/config/submodule/coreboot/fam15h_rdimm/module.list
new file mode 100644
index 00000000..3ca66d03
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_rdimm/module.list
@@ -0,0 +1,4 @@
+3rdparty/amd_blobs
+3rdparty/libgfxinit
+3rdparty/libhwbase
+3rdparty/vboot
diff --git a/config/submodule/coreboot/fam15h_udimm/module.list b/config/submodule/coreboot/fam15h_udimm/module.list
new file mode 100644
index 00000000..3ca66d03
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_udimm/module.list
@@ -0,0 +1,4 @@
+3rdparty/amd_blobs
+3rdparty/libgfxinit
+3rdparty/libhwbase
+3rdparty/vboot
diff --git a/config/submodule/coreboot/haswell/module.list b/config/submodule/coreboot/haswell/module.list
new file mode 100644
index 00000000..3d968b1a
--- /dev/null
+++ b/config/submodule/coreboot/haswell/module.list
@@ -0,0 +1,4 @@
+3rdparty/intel-microcode
+3rdparty/libgfxinit
+3rdparty/libhwbase
+3rdparty/vboot
diff --git a/config/submodule/coreboot/i945/module.list b/config/submodule/coreboot/i945/module.list
new file mode 100644
index 00000000..3d968b1a
--- /dev/null
+++ b/config/submodule/coreboot/i945/module.list
@@ -0,0 +1,4 @@
+3rdparty/intel-microcode
+3rdparty/libgfxinit
+3rdparty/libhwbase
+3rdparty/vboot

From 9c5890e9f2813ff442402254b358f39b44b69339 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 May 2024 21:43:10 +0100
Subject: [PATCH 0409/1549] git.sh: break if a submodule clone succeeds

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/git.sh b/include/git.sh
index f82fd103..a1afcee8 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -145,6 +145,7 @@ fetch_submodule()
 			[ -z "$mod" ] && continue
 			git clone "$mod" "$tmpgit/$1" || rm -Rf "$tmpgit/$1" \
 			    || $err "!rm $mod $project $cfgdir $1"
+			[ -d "$tmpgit/$1" ] && break
 		done
 		[ -d "$tmpgit/$1" ] || $err "!clone $mod $project $mcfgdir $1"
 	else

From 4a3ebe84a8cb565e57df3a3ea3af3130b9050f74 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 May 2024 21:44:27 +0100
Subject: [PATCH 0410/1549] coreboot/default: remove chromeec from module.list

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/submodule/coreboot/default/module.list | 1 -
 1 file changed, 1 deletion(-)

diff --git a/config/submodule/coreboot/default/module.list b/config/submodule/coreboot/default/module.list
index 66c90767..b0cdf195 100644
--- a/config/submodule/coreboot/default/module.list
+++ b/config/submodule/coreboot/default/module.list
@@ -1,5 +1,4 @@
 3rdparty/arm-trusted-firmware
-3rdparty/chromeec
 3rdparty/intel-microcode
 3rdparty/libgfxinit
 3rdparty/libhwbase

From b91ee727621ac67176d54e9622b37a25fca7131f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 May 2024 22:01:02 +0100
Subject: [PATCH 0411/1549] config: add backup coreboot submodule repositories

this is using the same functionality that was added a few
commits ago, to override the use of "git submodule update"

each coreboot submodule has two repositories defined, with
the second one kicking in if the mail one fails upon cloning.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/submodule/coreboot/coreboot413/vboot/module.cfg        | 3 +++
 .../coreboot/default/arm-trusted-firmware/module.cfg          | 3 +++
 config/submodule/coreboot/default/intel-microcode/module.cfg  | 3 +++
 config/submodule/coreboot/default/libgfxinit/module.cfg       | 3 +++
 config/submodule/coreboot/default/libhwbase/module.cfg        | 3 +++
 config/submodule/coreboot/default/vboot/module.cfg            | 3 +++
 config/submodule/coreboot/dell/intel-microcode/module.cfg     | 3 +++
 config/submodule/coreboot/dell/libgfxinit/module.cfg          | 3 +++
 config/submodule/coreboot/dell/libhwbase/module.cfg           | 3 +++
 config/submodule/coreboot/dell/vboot/module.cfg               | 3 +++
 .../vboot/patches/0001-don-t-treat-warnings-as-errors.patch   | 4 ++--
 config/submodule/coreboot/fam15h_rdimm/blobs/module.cfg       | 3 +++
 config/submodule/coreboot/fam15h_rdimm/module.list            | 4 +---
 config/submodule/coreboot/fam15h_rdimm/vboot/module.cfg       | 3 +++
 .../vboot/patches/0001-don-t-treat-warnings-as-errors.patch   | 4 ++--
 config/submodule/coreboot/fam15h_udimm/blobs/module.cfg       | 3 +++
 config/submodule/coreboot/fam15h_udimm/module.list            | 4 +---
 config/submodule/coreboot/fam15h_udimm/vboot/module.cfg       | 3 +++
 config/submodule/coreboot/haswell/intel-microcode/module.cfg  | 3 +++
 config/submodule/coreboot/haswell/libgfxinit/module.cfg       | 3 +++
 config/submodule/coreboot/haswell/libhwbase/module.cfg        | 3 +++
 config/submodule/coreboot/haswell/vboot/module.cfg            | 3 +++
 config/submodule/coreboot/i945/intel-microcode/module.cfg     | 3 +++
 config/submodule/coreboot/i945/libgfxinit/module.cfg          | 3 +++
 config/submodule/coreboot/i945/libhwbase/module.cfg           | 3 +++
 config/submodule/coreboot/i945/vboot/module.cfg               | 3 +++
 26 files changed, 72 insertions(+), 10 deletions(-)
 create mode 100644 config/submodule/coreboot/coreboot413/vboot/module.cfg
 create mode 100644 config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
 create mode 100644 config/submodule/coreboot/default/intel-microcode/module.cfg
 create mode 100644 config/submodule/coreboot/default/libgfxinit/module.cfg
 create mode 100644 config/submodule/coreboot/default/libhwbase/module.cfg
 create mode 100644 config/submodule/coreboot/default/vboot/module.cfg
 create mode 100644 config/submodule/coreboot/dell/intel-microcode/module.cfg
 create mode 100644 config/submodule/coreboot/dell/libgfxinit/module.cfg
 create mode 100644 config/submodule/coreboot/dell/libhwbase/module.cfg
 create mode 100644 config/submodule/coreboot/dell/vboot/module.cfg
 create mode 100644 config/submodule/coreboot/fam15h_rdimm/blobs/module.cfg
 create mode 100644 config/submodule/coreboot/fam15h_rdimm/vboot/module.cfg
 create mode 100644 config/submodule/coreboot/fam15h_udimm/blobs/module.cfg
 create mode 100644 config/submodule/coreboot/fam15h_udimm/vboot/module.cfg
 create mode 100644 config/submodule/coreboot/haswell/intel-microcode/module.cfg
 create mode 100644 config/submodule/coreboot/haswell/libgfxinit/module.cfg
 create mode 100644 config/submodule/coreboot/haswell/libhwbase/module.cfg
 create mode 100644 config/submodule/coreboot/haswell/vboot/module.cfg
 create mode 100644 config/submodule/coreboot/i945/intel-microcode/module.cfg
 create mode 100644 config/submodule/coreboot/i945/libgfxinit/module.cfg
 create mode 100644 config/submodule/coreboot/i945/libhwbase/module.cfg
 create mode 100644 config/submodule/coreboot/i945/vboot/module.cfg

diff --git a/config/submodule/coreboot/coreboot413/vboot/module.cfg b/config/submodule/coreboot/coreboot413/vboot/module.cfg
new file mode 100644
index 00000000..42e3835d
--- /dev/null
+++ b/config/submodule/coreboot/coreboot413/vboot/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/vboot.git"
+subrepo_bkup="https://github.com/coreboot/vboot"
+subrev="4c523ed10f25de872ac0513ebd6ca53d3970b9de"
diff --git a/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
new file mode 100644
index 00000000..ccf35b1b
--- /dev/null
+++ b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/arm-trusted-firmware.git"
+subrepo_bkup="https://github.com/coreboot/arm-trusted-firmware"
+subrev="23d6774ab53ded09d8065a184b4763504e9c8d9e"
diff --git a/config/submodule/coreboot/default/intel-microcode/module.cfg b/config/submodule/coreboot/default/intel-microcode/module.cfg
new file mode 100644
index 00000000..a115badf
--- /dev/null
+++ b/config/submodule/coreboot/default/intel-microcode/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/intel-microcode.git"
+subrepo_bkup="https://github.com/coreboot/intel-microcode"
+subrev="ece0d294a29a1375397941a4e6f2f7217910bc89"
diff --git a/config/submodule/coreboot/default/libgfxinit/module.cfg b/config/submodule/coreboot/default/libgfxinit/module.cfg
new file mode 100644
index 00000000..c3db628b
--- /dev/null
+++ b/config/submodule/coreboot/default/libgfxinit/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libgfxinit.git"
+subrepo_bkup="https://github.com/coreboot/libgfxinit"
+subrev="a4be8a21b0e2c752da0042c79aae5942418f53e2"
diff --git a/config/submodule/coreboot/default/libhwbase/module.cfg b/config/submodule/coreboot/default/libhwbase/module.cfg
new file mode 100644
index 00000000..7996007e
--- /dev/null
+++ b/config/submodule/coreboot/default/libhwbase/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libhwbase.git"
+subrepo_bkup="https://github.com/coreboot/libhwbase"
+subrev="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/default/vboot/module.cfg b/config/submodule/coreboot/default/vboot/module.cfg
new file mode 100644
index 00000000..53306d64
--- /dev/null
+++ b/config/submodule/coreboot/default/vboot/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/vboot.git"
+subrepo_bkup="https://github.com/coreboot/vboot"
+subrev="3d37d2aafe1f941c532def2a1fbbb58c8dd84182"
diff --git a/config/submodule/coreboot/dell/intel-microcode/module.cfg b/config/submodule/coreboot/dell/intel-microcode/module.cfg
new file mode 100644
index 00000000..a115badf
--- /dev/null
+++ b/config/submodule/coreboot/dell/intel-microcode/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/intel-microcode.git"
+subrepo_bkup="https://github.com/coreboot/intel-microcode"
+subrev="ece0d294a29a1375397941a4e6f2f7217910bc89"
diff --git a/config/submodule/coreboot/dell/libgfxinit/module.cfg b/config/submodule/coreboot/dell/libgfxinit/module.cfg
new file mode 100644
index 00000000..c3db628b
--- /dev/null
+++ b/config/submodule/coreboot/dell/libgfxinit/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libgfxinit.git"
+subrepo_bkup="https://github.com/coreboot/libgfxinit"
+subrev="a4be8a21b0e2c752da0042c79aae5942418f53e2"
diff --git a/config/submodule/coreboot/dell/libhwbase/module.cfg b/config/submodule/coreboot/dell/libhwbase/module.cfg
new file mode 100644
index 00000000..7996007e
--- /dev/null
+++ b/config/submodule/coreboot/dell/libhwbase/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libhwbase.git"
+subrepo_bkup="https://github.com/coreboot/libhwbase"
+subrev="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/dell/vboot/module.cfg b/config/submodule/coreboot/dell/vboot/module.cfg
new file mode 100644
index 00000000..53306d64
--- /dev/null
+++ b/config/submodule/coreboot/dell/vboot/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/vboot.git"
+subrepo_bkup="https://github.com/coreboot/vboot"
+subrev="3d37d2aafe1f941c532def2a1fbbb58c8dd84182"
diff --git a/config/submodule/coreboot/dell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch b/config/submodule/coreboot/dell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
index 1e6fdc35..9e14dc7d 100644
--- a/config/submodule/coreboot/dell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
+++ b/config/submodule/coreboot/dell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
@@ -1,6 +1,6 @@
-From 191089826bbfe710bf40e494d3e1014537e35a31 Mon Sep 17 00:00:00 2001
+From d94300a671688746f2fb3d77eefa631a3ed90306 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
-Date: Tue, 21 May 2024 23:19:08 +0100
+Date: Sun, 19 May 2024 23:35:52 +0100
 Subject: [PATCH 1/1] don't treat warnings as errors
 
 Signed-off-by: Leah Rowe <info@minifree.org>
diff --git a/config/submodule/coreboot/fam15h_rdimm/blobs/module.cfg b/config/submodule/coreboot/fam15h_rdimm/blobs/module.cfg
new file mode 100644
index 00000000..c7ae4683
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_rdimm/blobs/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/blobs.git"
+subrepo_bkup="https://github.com/coreboot/blobs"
+subrev="034b27818450428f70aa9316c8bd0d65bacd8ee8"
diff --git a/config/submodule/coreboot/fam15h_rdimm/module.list b/config/submodule/coreboot/fam15h_rdimm/module.list
index 3ca66d03..de2154e6 100644
--- a/config/submodule/coreboot/fam15h_rdimm/module.list
+++ b/config/submodule/coreboot/fam15h_rdimm/module.list
@@ -1,4 +1,2 @@
-3rdparty/amd_blobs
-3rdparty/libgfxinit
-3rdparty/libhwbase
+3rdparty/blobs
 3rdparty/vboot
diff --git a/config/submodule/coreboot/fam15h_rdimm/vboot/module.cfg b/config/submodule/coreboot/fam15h_rdimm/vboot/module.cfg
new file mode 100644
index 00000000..7a7ad3c6
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_rdimm/vboot/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/vboot.git"
+subrepo_bkup="https://github.com/coreboot/vboot"
+subrev="ecdca931ae0637d1a9498f64862939bd5bb99e0b"
diff --git a/config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch b/config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
index 7e569082..1dbf6c13 100644
--- a/config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
+++ b/config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
@@ -1,6 +1,6 @@
-From ba16c0fe8236bd511e879693527993ce8ce3668b Mon Sep 17 00:00:00 2001
+From 2c5c8d9a5c999a5eedd9f17acb0bd3924524657d Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
-Date: Tue, 21 May 2024 23:19:38 +0100
+Date: Tue, 21 May 2024 23:21:14 +0100
 Subject: [PATCH 1/1] don't treat warnings as errors
 
 Signed-off-by: Leah Rowe <info@minifree.org>
diff --git a/config/submodule/coreboot/fam15h_udimm/blobs/module.cfg b/config/submodule/coreboot/fam15h_udimm/blobs/module.cfg
new file mode 100644
index 00000000..c7ae4683
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_udimm/blobs/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/blobs.git"
+subrepo_bkup="https://github.com/coreboot/blobs"
+subrev="034b27818450428f70aa9316c8bd0d65bacd8ee8"
diff --git a/config/submodule/coreboot/fam15h_udimm/module.list b/config/submodule/coreboot/fam15h_udimm/module.list
index 3ca66d03..de2154e6 100644
--- a/config/submodule/coreboot/fam15h_udimm/module.list
+++ b/config/submodule/coreboot/fam15h_udimm/module.list
@@ -1,4 +1,2 @@
-3rdparty/amd_blobs
-3rdparty/libgfxinit
-3rdparty/libhwbase
+3rdparty/blobs
 3rdparty/vboot
diff --git a/config/submodule/coreboot/fam15h_udimm/vboot/module.cfg b/config/submodule/coreboot/fam15h_udimm/vboot/module.cfg
new file mode 100644
index 00000000..7a7ad3c6
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_udimm/vboot/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/vboot.git"
+subrepo_bkup="https://github.com/coreboot/vboot"
+subrev="ecdca931ae0637d1a9498f64862939bd5bb99e0b"
diff --git a/config/submodule/coreboot/haswell/intel-microcode/module.cfg b/config/submodule/coreboot/haswell/intel-microcode/module.cfg
new file mode 100644
index 00000000..12b01372
--- /dev/null
+++ b/config/submodule/coreboot/haswell/intel-microcode/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/intel-microcode.git"
+subrepo_bkup="https://github.com/coreboot/intel-microcode"
+subrev="41af34500598418150aa298bb04e7edacc547897"
diff --git a/config/submodule/coreboot/haswell/libgfxinit/module.cfg b/config/submodule/coreboot/haswell/libgfxinit/module.cfg
new file mode 100644
index 00000000..c3db628b
--- /dev/null
+++ b/config/submodule/coreboot/haswell/libgfxinit/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libgfxinit.git"
+subrepo_bkup="https://github.com/coreboot/libgfxinit"
+subrev="a4be8a21b0e2c752da0042c79aae5942418f53e2"
diff --git a/config/submodule/coreboot/haswell/libhwbase/module.cfg b/config/submodule/coreboot/haswell/libhwbase/module.cfg
new file mode 100644
index 00000000..7996007e
--- /dev/null
+++ b/config/submodule/coreboot/haswell/libhwbase/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libhwbase.git"
+subrepo_bkup="https://github.com/coreboot/libhwbase"
+subrev="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/haswell/vboot/module.cfg b/config/submodule/coreboot/haswell/vboot/module.cfg
new file mode 100644
index 00000000..a30a1cee
--- /dev/null
+++ b/config/submodule/coreboot/haswell/vboot/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/vboot.git"
+subrepo_bkup="https://github.com/coreboot/vboot"
+subrev="09fcd2184f9c714829503e84b8a7dfe7f2584e00"
diff --git a/config/submodule/coreboot/i945/intel-microcode/module.cfg b/config/submodule/coreboot/i945/intel-microcode/module.cfg
new file mode 100644
index 00000000..07b2995a
--- /dev/null
+++ b/config/submodule/coreboot/i945/intel-microcode/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/intel-microcode.git"
+subrepo_bkup="https://github.com/coreboot/intel-microcode"
+subrev="262f0c97f2fbc3839a59523cc6c6bcf500e2850b"
diff --git a/config/submodule/coreboot/i945/libgfxinit/module.cfg b/config/submodule/coreboot/i945/libgfxinit/module.cfg
new file mode 100644
index 00000000..d8838af8
--- /dev/null
+++ b/config/submodule/coreboot/i945/libgfxinit/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libgfxinit.git"
+subrepo_bkup="https://github.com/coreboot/libgfxinit"
+subrev="066e52eeaa329d782ccee96265a6a351fc395bf1"
diff --git a/config/submodule/coreboot/i945/libhwbase/module.cfg b/config/submodule/coreboot/i945/libhwbase/module.cfg
new file mode 100644
index 00000000..56fefb40
--- /dev/null
+++ b/config/submodule/coreboot/i945/libhwbase/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libhwbase.git"
+subrepo_bkup="https://github.com/coreboot/libhwbase"
+subrev="8be5a82b85ceb3ee8a1c4fbf36c75a4bfbda8900"
diff --git a/config/submodule/coreboot/i945/vboot/module.cfg b/config/submodule/coreboot/i945/vboot/module.cfg
new file mode 100644
index 00000000..75ce2cf2
--- /dev/null
+++ b/config/submodule/coreboot/i945/vboot/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/vboot.git"
+subrepo_bkup="https://github.com/coreboot/vboot"
+subrev="5b8596cefd1a61252501943f2534323708338732"

From ff0840bdf8c85d48029bd4a63504f393d2dd6854 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 25 May 2024 00:18:40 +0100
Subject: [PATCH 0412/1549] trees: write -C on the make command first not last

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index f4a3bf82..dba3e0f7 100755
--- a/script/trees
+++ b/script/trees
@@ -215,7 +215,7 @@ run_make_command()
 	[ "$project" = "coreboot" ] && [ -z "$mode" ] && x_ \
 		printf "%s\n" "${version%%-*}" > "$codedir/.coreboot-version"
 
-	make $mode -j$threads $makeargs -C "$codedir" || \
+	make -C "$codedir" $mode -j$threads $makeargs || \
 	    $err "run_make $codedir: !make $mode"
 
 	[ "$mode" != "clean" ] && return 0

From 0a50eaf2277c95d80c22d64de7a0ec76329ebb03 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 25 May 2024 00:22:34 +0100
Subject: [PATCH 0413/1549] trees: add UPDATED_SUBMODULES to coreboot make

we do not want submodules to be downloaded after the fact.

we only handle this on ./update trees -f coreboot

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/script/trees b/script/trees
index dba3e0f7..b01a6c39 100755
--- a/script/trees
+++ b/script/trees
@@ -215,6 +215,9 @@ run_make_command()
 	[ "$project" = "coreboot" ] && [ -z "$mode" ] && x_ \
 		printf "%s\n" "${version%%-*}" > "$codedir/.coreboot-version"
 
+	[ "$project" = "coreboot" ] && \
+		makeargs="$makeargs UPDATED_SUBMODULES=1"
+
 	make -C "$codedir" $mode -j$threads $makeargs || \
 	    $err "run_make $codedir: !make $mode"
 

From 7bab0cf9ed677fd69e48ba79b2defd4e643a7f82 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 25 May 2024 00:37:26 +0100
Subject: [PATCH 0414/1549] trees: also use UPDATED_SUBMODULES=1 on crossgcc

i overlooked this in the previous revision

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index b01a6c39..efb6874a 100755
--- a/script/trees
+++ b/script/trees
@@ -170,7 +170,8 @@ check_cross_compiler()
 		[ -n "${xlang}" ] && export BUILD_LANGUAGES="$xlang"
 
 		[ -d "${cbdir}/util/crossgcc/xgcc/${_xarch}/" ] && continue
-		x_ make -C "$cbdir" crossgcc-${_xarch%-*} CPUS=$threads
+		x_ make -C "$cbdir" crossgcc-${_xarch%-*} CPUS=$threads \
+		    UPDATED_SUBMODULES=1
 	done
 }
 

From d32968c7310068252fe23c87b2c4b33c09f0a00e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 25 May 2024 14:32:06 +0100
Subject: [PATCH 0415/1549] trees: reset makeargs per target/project

it wasn't being reset before. when coreboot is being
built, i add to makeargs every time. if multiple targets
are being built, the make command would end up looking
something like:

make -C src/coreboot/default UPDATED_SUBMODULES=1 \
    UPDATED_SUBMODULES=1

(the parameter would be printed twice)

of course, this doesn't check whether that parameter is
added already in target.cfg for a given target, but that's
ok because i won't add that one in target.cfg

i baked it into the code, only when handling coreboot,
because that was easier than either putting it in makeargs
for every coreboot target.cfg, or again modifying the code to
handle that; the current solution is the cleanest.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index efb6874a..7da762e8 100755
--- a/script/trees
+++ b/script/trees
@@ -149,7 +149,7 @@ handle_src_tree()
 load_project_config()
 {
 	eval "$(setvars "" xarch xlang tree bootstrapargs autoconfargs \
-	    xtree tree_depend)"
+	    xtree tree_depend makeargs)"
 
 	[ -f "${1}/target.cfg" ] || return 0
 	. "${1}/target.cfg" || \

From 8da2559b35d576ad13806e61a590ad3a8de26cda Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 25 May 2024 14:37:40 +0100
Subject: [PATCH 0416/1549] option.sh: fix bad check for version/versiondate

i was checking whether it's a directory, whereas i should
have been checking whether it's a file. this is a workaround
put in place in case someone downloaded a tarball from codeberg
which is pre-generated per commit. in this situation, the
version and versiondate files do not exist, but the design
of the build system requires that they do exist.

the existing check is correct except for this bug, so fix
the bug. check that they are files, not directories

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/option.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/option.sh b/include/option.sh
index 3648ecd2..6ab27354 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -66,9 +66,9 @@ x_() {
 	[ $# -lt 1 ] || ${@} || $err "Unhandled non-zero exit: $@"; return 0
 }
 
-[ -e ".git" ] || [ -d "version" ] || printf "unknown\n" > version || \
+[ -e ".git" ] || [ -f "version" ] || printf "unknown\n" > version || \
     $err "Cannot generate unknown version file"
-[ -e ".git" ] || [ -d "versiondate" ] || printf "1716415872\n" > versiondate || \
+[ -e ".git" ] || [ -f "versiondate" ] || printf "1716415872\n" > versiondate || \
     $err "Cannot generate unknown versiondate file"
 
 read -r projectname < projectname || :

From 8d199a31d1bffb3d23b126965c331fe640fc5e73 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 25 May 2024 16:34:07 +0100
Subject: [PATCH 0417/1549] build: simplify git checks

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/build b/build
index d70b44ff..cf18d25e 100755
--- a/build
+++ b/build
@@ -30,13 +30,10 @@ main()
 
 	[ "$1" = "dependencies" ] && x_ install_packages $@ && return 0
 
-	which git 1>/dev/null 2>/dev/null || \
-	    git_err "git not installed. please install git-scm."
-	git config --global user.name 1>/dev/null 2>/dev/null || \
-	    git_err "git config --global user.name \"John Doe\""
-	git config --global user.email 1>/dev/null 2>/dev/null || \
-	    git_err "git config --global user.email \"john.doe@example.com\""
-	git_init
+	for g in "which git" "git config --global user.name" \
+	    "git config --global user.email" "git_init"; do
+		eval "$g 1>/dev/null 2>/dev/null || git_err \"$g\""
+	done
 
 	[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
 

From db06bbdb6e4b60d710f5cabe7b637d4737726119 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 25 May 2024 16:34:48 +0100
Subject: [PATCH 0418/1549] build: do root check before git check

otherwise, git could be initialised as root.

running as root is not allowed.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/build b/build
index cf18d25e..72318241 100755
--- a/build
+++ b/build
@@ -30,13 +30,13 @@ main()
 
 	[ "$1" = "dependencies" ] && x_ install_packages $@ && return 0
 
+	[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
+
 	for g in "which git" "git config --global user.name" \
 	    "git config --global user.email" "git_init"; do
 		eval "$g 1>/dev/null 2>/dev/null || git_err \"$g\""
 	done
 
-	[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
-
 	case "${1}" in
 	version) printf "%s\n" "$relname" ;;
 	release) shift 1; mkrelease $@ ;;

From 48c2cef800eb6153f953f298a2d04e43577d6000 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 25 May 2024 16:56:44 +0100
Subject: [PATCH 0419/1549] build: simplify git_init()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 15 +++++----------
 1 file changed, 5 insertions(+), 10 deletions(-)

diff --git a/build b/build
index 72318241..4e182ae3 100755
--- a/build
+++ b/build
@@ -68,20 +68,15 @@ install_packages()
 
 git_init()
 {
-	[ -L ".git" ] && $err "Reference .git is a symlink"
+	[ -L ".git" ] && return 1
 	[ -e ".git" ] && return 0
 	eval "$(setvars "$(date -Rud @${versiondate})" cdate _nogit)"
 
-	git init 1>/dev/null 2>/dev/null || \
-	    $err "${PWD}: cannot initialise Git repository"
-	git add -A . 1>/dev/null 2>/dev/null || \
-	    $err "${PWD}: cannot add files to Git repository"
+	git init || return 1
+	git add -A . || return 1
 	git commit -m "${projectname} ${version}" --date "${cdate}" \
-	    --author="xbmk <xbmk@example.com>" 1>/dev/null 2>/dev/null || \
-	    $err "$PWD: can't commit ${projectname}/${version}, date $cdate"
-	git tag -a "${version}" -m "${projectname} ${version}" \
-	    1>/dev/null 2>/dev/null || \
-	    $err "${PWD}: cannot git-tag ${projectname}/${version}"
+	    --author="xbmk <xbmk@example.com>" || return 1
+	git tag -a "${version}" -m "${projectname} ${version}" || return 1
 }
 
 mkrelease()

From 5c14e8e1bca035e038365b65ab0a68acc98fd2d6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 26 May 2024 01:54:36 +0100
Subject: [PATCH 0420/1549] general code cleanup in the build system

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             |  76 +++++----
 include/git.sh    |  66 ++++----
 include/mrc.sh    |  32 ++--
 include/option.sh | 117 +++++++-------
 include/vendor.sh | 363 +++++++++++++++++++++---------------------
 script/roms       | 391 +++++++++++++++++++++-------------------------
 script/trees      | 148 ++++++++----------
 7 files changed, 559 insertions(+), 634 deletions(-)

diff --git a/build b/build
index 4e182ae3..5ae62b23 100755
--- a/build
+++ b/build
@@ -1,9 +1,9 @@
 #!/usr/bin/env sh
 # SPDX-License-Identifier: GPL-3.0-or-later
-# SPDX-FileCopyrightText: 2014,2015,2020-2024 Leah Rowe <leah@libreboot.org>
-# SPDX-FileCopyrightText: 2015 Patrick "P. J." McDermott <pj@pehjota.net>
-# SPDX-FileCopyrightText: 2015, 2016 Klemens Nanni <contact@autoboot.org>
-# SPDX-FileCopyrightText: 2022, Caleb La Grange <thonkpeasant@protonmail.com>
+# Copyright (c) 2014-2015,2020-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2015 Patrick "P. J." McDermott <pj@pehjota.net>
+# Copyright (c) 2015-2016 Klemens Nanni <contact@autoboot.org>
+# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
 set -u -e
 
@@ -43,40 +43,34 @@ main()
 	inject) shift 1; vendor_inject $@ ;;
 	download) shift 1; vendor_download $@ ;;
 	*)
-		[ -f "${spath}" ] || $err "Bad command. Check docs."
-		shift 1; "$spath" $@ || $err "excmd: ${spath} ${@}" ;;
+		[ -f "$spath" ] || $err "Bad command. Check docs."
+		shift 1; "$spath" $@ || $err "excmd: $spath $@" ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
 }
 
 install_packages()
 {
-	if [ $# -lt 2 ]; then
-		printf "You must specify a distro, namely:\n" 1>&2
-		printf "Look at files under config/dependencies/\n" 1>&2
-		printf "Example: ./build dependencies debian\n" 1>&2
-		$err "install_packages: target not specified"
-	fi
+	[ $# -lt 2 ] && $err "Bad command. Check docs."
+	[ -f "config/dependencies/$2" ] || $err "Unsupported target"
 
-	[ -f "config/dependencies/${2}" ] || $err "Unsupported target"
-
-	. "config/dependencies/${2}"
+	. "config/dependencies/$2"
 
 	x_ $pkg_add $pkglist && [ -n "$aur_notice" ] && \
-	printf "Please install AUR packages: %s\n" "$aur_notice" 1>&2; return 0
+	printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; return 0
 }
 
 git_init()
 {
 	[ -L ".git" ] && return 1
 	[ -e ".git" ] && return 0
-	eval "$(setvars "$(date -Rud @${versiondate})" cdate _nogit)"
+	eval "$(setvars "$(date -Rud @$versiondate)" cdate _nogit)"
 
 	git init || return 1
 	git add -A . || return 1
-	git commit -m "${projectname} ${version}" --date "${cdate}" \
+	git commit -m "$projectname $version" --date "$cdate" \
 	    --author="xbmk <xbmk@example.com>" || return 1
-	git tag -a "${version}" -m "${projectname} ${version}" || return 1
+	git tag -a "$version" -m "$projectname $version" || return 1
 }
 
 mkrelease()
@@ -85,54 +79,54 @@ mkrelease()
 
 	vdir="release"
 	while getopts d:m: option; do
-		[ -z "${OPTARG}" ] && $err "Empty argument not allowed"
-		case "${option}" in
-		d) vdir="${OPTARG}" ;;
-		m) mode="${OPTARG}" ;;
+		[ -z "$OPTARG" ] && $err "Empty argument not allowed"
+		case "$option" in
+		d) vdir="$OPTARG" ;;
+		m) mode="$OPTARG" ;;
 		*) $err "Invalid option" ;;
 		esac
 	done
 
-	vdir="${vdir}/${version}"
+	vdir="$vdir/$version"
 	src_dirname="${relname}_src"
-	srcdir="${vdir}/${src_dirname}"
+	srcdir="$vdir/$src_dirname"
 
-	[ -e "${vdir}" ] && $err "already exists: \"${vdir}\""
-	mkdir -p "${vdir}" || $err "mkvdir: !mkdir -p \"${vdir}\""
-	git clone . "${srcdir}" || $err "mkdir: !gitclone \"${srcdir}\""
+	[ -e "$vdir" ] && $err "already exists: \"$vdir\""
+	mkdir -p "$vdir" || $err "mkvdir: !mkdir -p \"$vdir\""
+	git clone . "$srcdir" || $err "mkdir: !gitclone \"$srcdir\""
 
 	build_release
 
-	printf "\n\nDONE! Check release files under %s\n" "${vdir}"
+	printf "\n\nDONE! Check release files under %s\n" "$vdir"
 }
 
 build_release()
 {
-	_xm="build_release ${vdir}"
+	_xm="build_release $vdir"
 	(
-	cd "${srcdir}" || $err "${_xm}: !cd \"${srcdir}\""
+	cd "$srcdir" || $err "$_xm: !cd \"$srcdir\""
 	fetch_trees
 	x_ mv src/docs docs
 	) || $err "can't create release files"
 
 	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
-	    --abbrev-commit > "${srcdir}/CHANGELOG" || $err "!gitlog $srcdir"
+	    --abbrev-commit > "$srcdir/CHANGELOG" || $err "!gitlog $srcdir"
 
 	(
-	cd "${srcdir%/*}" || $err "${_xm}: mktarball \"${srcdir}\""
+	cd "${srcdir%/*}" || $err "$_xm: mktarball \"$srcdir\""
 	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || $err "$_xm: mksrc"
 	) || $err "can't create src tarball"
-	[ "${mode}" = "src" ] && return 0
+	[ "$mode" = "src" ] && return 0
 
 	(
-	cd "${srcdir}" || $err "${_xm}: 2 !cd \"${srcdir}\""
-	./build roms all || $err "${_xm}: roms-all"
-	./build roms serprog rp2040 || $err "${_xm}: rp2040"
-	./build roms serprog stm32 || $err "${_xm}: stm32"
+	cd "$srcdir" || $err "$_xm: 2 !cd \"$srcdir\""
+	./build roms all || $err "$_xm: roms-all"
+	./build roms serprog rp2040 || $err "$_xm: rp2040"
+	./build roms serprog stm32 || $err "$_xm: stm32"
 	x_ mv bin ../roms
 	) || $err "can't build rom images"
 
-	rm -Rf "${srcdir}" || $err "!rm -Rf ${srcdir}"
+	rm -Rf "$srcdir" || $err "!rm -Rf $srcdir"
 }
 
 fetch_trees()
@@ -156,8 +150,8 @@ fail()
 
 tmp_cleanup()
 {
-	[ "${tmpdir_was_set}" = "n" ] || return 0
-	rm -Rf "${tmpdir}" || return 1
+	[ "$tmpdir_was_set" = "n" ] || return 0
+	rm -Rf "$tmpdir" || return 1
 }
 
 main $@
diff --git a/include/git.sh b/include/git.sh
index a1afcee8..f5aa34eb 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -1,34 +1,30 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
-# SPDX-FileCopyrightText: 2020,2021,2023,2024 Leah Rowe <leah@libreboot.org>
-# SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
+# Copyright (c) 2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
 eval "$(setvars "" _target rev _xm loc url bkup_url depend tree_depend xtree \
     mdir subrev subrepo subrepo_bkup)"
 
 fetch_project_trees()
 {
-	_target="${target}"
-	[ ! -d "src/${project}/${project}" ] && x_ mkdir -p "src/${project}" \
-	    && fetch_project_repo "${project}"
+	_target="$target"
+	[ ! -d "src/$project/$project" ] && x_ mkdir -p "src/$project" \
+	    && fetch_project_repo "$project"
 	fetch_config
-	if [ -d "src/${project}/${tree}" ]; then
-		printf "download/%s %s (%s): exists\n" \
-		    "${project}" "${tree}" "${_target}" 1>&2
-		return 0
-	fi
+	e "src/$project/$tree" d && return 0
 	prepare_new_tree
 }
 
 fetch_config()
 {
-	rm -f "${cfgsdir}/"*/seen || $err "fetch_config ${cfgsdir}: !rm seen"
+	rm -f "$cfgsdir/"*/seen || $err "fetch_config $cfgsdir: !rm seen"
 	eval "$(setvars "" xtree tree_depend)"
 	while true; do
 		eval "$(setvars "" rev tree)"
-		_xm="fetch_config ${project}/${_target}"
-		load_target_config "${_target}"
-		[ "${_target}" = "${tree}" ] && break
-		_target="${tree}"
+		_xm="fetch_config $project/$_target"
+		load_target_config "$_target"
+		[ "$_target" = "$tree" ] && break
+		_target="$tree"
 	done
 	[ -n "$tree_depend" ] && [ "$tree_depend" != "$tree" ] && \
 		x_ ./update trees -f "$project" "$tree_depend"; return 0
@@ -37,8 +33,7 @@ fetch_config()
 load_target_config()
 {
 	[ -f "$cfgsdir/$1/target.cfg" ] || $err "$1: target.cfg missing"
-	[ -f "${cfgsdir}/${1}/seen" ] && \
-		$err "${_xm} check: infinite loop in tree definitions"
+	[ -f "$cfgsdir/$1/seen" ] && $err "$_xm cfg: infinite loop in trees"
 
 	. "$cfgsdir/$1/target.cfg" || $err "load_target_config !$cfgsdir/$1"
 	touch "$cfgsdir/$1/seen" || $err "load_config $cfgsdir/$1: !mk seen"
@@ -48,8 +43,8 @@ prepare_new_tree()
 {
 	printf "Creating %s tree %s (%s)\n" "$project" "$tree" "$_target"
 
-	cp -R "src/${project}/${project}" "${tmpgit}" || \
-	    $err "prepare_new_tree ${project}/${tree}: can't make tmpclone"
+	cp -R "src/$project/$project" "$tmpgit" || \
+	    $err "prepare_new_tree $project/$tree: can't make tmpclone"
 	git_prep "$PWD/$cfgsdir/$tree/patches" "src/$project/$tree" "update"
 }
 
@@ -57,28 +52,25 @@ fetch_project_repo()
 {
 	eval "$(setvars "" xtree tree_depend)"
 
-	scan_config "${project}" "config/git"
+	scan_config "$project" "config/git"
 	[ -z "${loc+x}" ] && $err "fetch_project_repo $project: loc not set"
 	[ -z "${url+x}" ] && $err "fetch_project_repo $project: url not set"
 
 	clone_project
-	[ -z "${depend}" ] || for d in ${depend} ; do
-		x_ ./update trees -f ${d}
+	[ -z "$depend" ] || for d in $depend ; do
+		x_ ./update trees -f $d
 	done
-	rm -Rf "${tmpgit}" || $err "fetch_repo: !rm -Rf ${tmpgit}"
+	rm -Rf "$tmpgit" || $err "fetch_repo: !rm -Rf $tmpgit"
 }
 
 clone_project()
 {
 	loc="${loc#src/}"
-	loc="src/${loc}"
-	if [ -d "${loc}" ]; then
-		printf "%s already exists, so skipping download\n" "$loc" 1>&2
-		return 0
-	fi
+	loc="src/$loc"
+	e "$loc" d && return 0
 
 	git clone $url "$tmpgit" || git clone $bkup_url "$tmpgit" \
-	    || $err "clone_project: could not download ${project}"
+	    || $err "clone_project: could not download $project"
 	git_prep "$PWD/config/$project/patches" "$loc"
 }
 
@@ -108,7 +100,7 @@ prep_submodules()
 {
 	[ -f "$tmpgit/.gitmodules" ] || return 0
 
-	mdir="${PWD}/config/submodule/$project"
+	mdir="$PWD/config/submodule/$project"
 	[ -n "$tree" ] && mdir="$mdir/$tree"
 
 	if [ -f "$mdir/module.list" ]; then
@@ -137,8 +129,7 @@ fetch_submodule()
 	    $err "! . $mcfgdir/module.cfg"
 
 	if [ -n "$subrepo" ] || [ -n "$subrepo_bkup" ]; then
-		[ -n "$subrev" ] || \
-		    $err "$1 as per $mdir: subrev not defined"
+		[ -n "$subrev" ] || $err "$1, $mdir: subrev not defined"
 
 		rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
 		for mod in "$subrepo" "$subrepo_bkup"; do
@@ -149,16 +140,15 @@ fetch_submodule()
 		done
 		[ -d "$tmpgit/$1" ] || $err "!clone $mod $project $mcfgdir $1"
 	else
-		git -C "$tmpgit" submodule update --init --checkout -- "$1" || \
-		    $err "$mdir: !update $1"
+		git -C "$tmpgit" submodule update --init --checkout -- "$1" \
+		    || $err "$mdir: !update $1"
 	fi
 }
 
 patch_submodule()
 {
-	[ -z "$subrev" ] || \
-		git -C "$tmpgit/$1" reset --hard "$subrev" || \
-		    $err "$mdir $1: cannot reset git revision"
+	[ -z "$subrev" ] || git -C "$tmpgit/$1" reset --hard "$subrev" || \
+	    $err "$mdir $1: cannot reset git revision"
 
 	git_am_patches "$tmpgit/$1" "$mdir/${1##*/}/patches"
 }
@@ -167,7 +157,7 @@ git_am_patches()
 {
 	for _patch in "$2/"*; do
 		[ -L "$_patch" ] || [ ! -f "$_patch" ] || git -C "$1" am \
-		    "$_patch" || $err "git_am $1 $2: !git am $_patch"; continue
+		    "$_patch" || $err "$1 $2: !git am $_patch"; continue
 	done
 	for _patches in "$2/"*; do
 		[ ! -L "$_patches" ] && [ -d "$_patches" ] && \
diff --git a/include/mrc.sh b/include/mrc.sh
index 62d30a70..caf893a7 100755
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -9,19 +9,18 @@ eval "$(setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL)"
 extract_mrc()
 {
 	[ -z "$MRC_board" ] && $err "extract_mrc $MRC_hash: MRC_board not set"
-	[ -z "${CONFIG_MRC_FILE}" ] && \
-		$err "extract_mrc $MRC_hash: CONFIG_MRC_FILE not set"
+	[ -z "$CONFIG_MRC_FILE" ] && $err "$MRC_hash: CONFIG_MRC_FILE unset"
 
-	SHELLBALL="chromeos-firmwareupdate-${MRC_board}"
+	SHELLBALL="chromeos-firmwareupdate-$MRC_board"
 
 	(
-	x_ cd "${appdir}"
+	x_ cd "$appdir"
 	extract_partition "${MRC_url##*/}"
-	extract_archive "${SHELLBALL}" .
+	extract_archive "$SHELLBALL" .
 	) || $err "mrc download/extract failure"
 
-	"${cbfstool}" "${appdir}/"bios.bin extract -n mrc.bin \
-	    -f "$_dest" -r RO_SECTION || $err "extract_mrc: cbfstool $_dest"
+	"$cbfstool" "$appdir/"bios.bin extract -n mrc.bin \
+	    -f "$_dest" -r RO_SECTION || $err "extract_mrc: !$cbfstool $_dest"
 
 	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && extract_refcode; return 0
 }
@@ -32,29 +31,26 @@ extract_partition()
 	ROOTP=$( printf "unit\nB\nprint\nquit\n" | \
 	    parted "${1%.zip}" 2>/dev/null | grep "ROOT-A" )
 
-	START=$(( $( echo ${ROOTP} | cut -f2 -d\ | tr -d "B" ) ))
-	SIZE=$(( $( echo ${ROOTP} | cut -f4 -d\ | tr -d "B" ) ))
+	START=$(( $( echo $ROOTP | cut -f2 -d\ | tr -d "B" ) ))
+	SIZE=$(( $( echo $ROOTP | cut -f4 -d\ | tr -d "B" ) ))
 
-	dd if="${1%.zip}" of="root-a.ext2" bs=1024 \
-	    skip=$(( ${START} / 1024 )) count=$(( ${SIZE} / 1024 )) || \
-	    $err "extract_partition, dd ${1%.zip}, root-a.ext2"
+	dd if="${1%.zip}" of="root-a.ext2" bs=1024 skip=$(( $START / 1024 )) \
+	    count=$(( $SIZE / 1024 )) || $err "ex dd ${1%.zip}, root-a.ext2"
 
-	printf "cd /usr/sbin\ndump chromeos-firmwareupdate ${SHELLBALL}\nquit" \
+	printf "cd /usr/sbin\ndump chromeos-firmwareupdate $SHELLBALL\nquit" \
 	    | debugfs "root-a.ext2" || $err "can't extract shellball"
 }
 
 extract_refcode()
 {
 	_refdest="${CONFIG_REFCODE_BLOB_FILE##*../}"
-	[ -f "$_refdest" ] && return 0
+	e "$_refdest" f && return 0
 
 	# cbfstool changed the attributes scheme for stage files,
 	# incompatible with older versions before coreboot 4.14,
 	# so we need coreboot 4.13 cbfstool for certain refcode files
-	[ -n "$cbfstoolref" ] || \
-		$err "extract_refcode $board: MRC_refcode_cbtree not set"
-	mkdir -p "${_refdest%/*}" || \
-	    $err "extract_refcode $board: !mkdir -p ${_refdest%/*}"
+	[ -n "$cbfstoolref" ] || $err "$board: MRC_refcode_cbtree not set"
+	mkdir -p "${_refdest%/*}" || $err "ref: !mkdir -p ${_refdest%/*}"
 
 	"$cbfstoolref" "$appdir/bios.bin" extract \
 	    -m x86 -n fallback/refcode -f "$_refdest" -r RO_SECTION \
diff --git a/include/option.sh b/include/option.sh
index 6ab27354..eff55511 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-3.0-only
-# SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
-# SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# SPDX-FileCopyrightText: 2020-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
+# Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
+# Copyright (c) 2020-2024 Leah Rowe <leah@libreboot.org>
 
 export LC_COLLATE=C
 export LC_ALL=C
@@ -13,13 +13,13 @@ ifdtool="cbutils/default/ifdtool"
 cbfstool="cbutils/default/cbfstool"
 grubcfgsdir="config/grub"
 layoutdir="/boot/grub/layouts"
-. "${grubcfgsdir}/modules.list"
-tmpgit="${PWD}/tmp/gitclone"
+. "$grubcfgsdir/modules.list"
+tmpgit="$PWD/tmp/gitclone"
 err="err_"
 
 err_()
 {
-	printf "ERROR %s: %s\n" "${0}" "${1}" 1>&2
+	printf "ERROR %s: %s\n" "$0" "$1" 1>&2
 	exit 1
 }
 
@@ -27,14 +27,14 @@ setvars()
 {
 	_setvars=""
 	[ $# -lt 2 ] && $err "setvars: too few arguments"
-	val="${1}" && shift 1
+	val="$1" && shift 1
 	for var in $@; do
-		_setvars="${var}=\"${val}\"; ${_setvars}"
+		_setvars="$var=\"$val\"; $_setvars"
 	done
 	printf "%s\n" "${_setvars% }"
 }
-eval "$(setvars "" versiondate tmpdir _nogit version board boarddir \
-    xbmk_release threads projectname relname)"
+eval "$(setvars "" xbmk_release tmpdir _nogit version board boarddir relname \
+    versiondate threads projectname)"
 
 # if "y": a coreboot target won't be built if target.cfg says release="n"
 # (this is used to exclude certain build targets from releases)
@@ -44,16 +44,16 @@ set | grep XBMK_RELEASE 1>/dev/null 2>/dev/null || xbmk_release="n" || :
 export XBMK_RELEASE="$xbmk_release"
 
 set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"
-if [ "${tmpdir_was_set}" = "y" ]; then
+if [ "$tmpdir_was_set" = "y" ]; then
 	[ "${TMPDIR%_*}" = "/tmp/xbmk" ] || tmpdir_was_set="n"
 fi
-if [ "${tmpdir_was_set}" = "n" ]; then
+if [ "$tmpdir_was_set" = "n" ]; then
 	export TMPDIR="/tmp"
 	tmpdir="$(mktemp -d -t xbmk_XXXXXXXX)"
-	export TMPDIR="${tmpdir}"
+	export TMPDIR="$tmpdir"
 else
-	export TMPDIR="${TMPDIR}"
-	tmpdir="${TMPDIR}"
+	export TMPDIR="$TMPDIR"
+	tmpdir="$TMPDIR"
 fi
 
 set | grep XBMK_THREADS 1>/dev/null 2>/dev/null && threads="$XBMK_THREADS"
@@ -63,7 +63,7 @@ expr "X$threads" : "X-\{0,1\}[0123456789][0123456789]*$" \
 export XBMK_THREADS="$threads"
 
 x_() {
-	[ $# -lt 1 ] || ${@} || $err "Unhandled non-zero exit: $@"; return 0
+	[ $# -lt 1 ] || $@ || $err "Unhandled non-zero exit: $@"; return 0
 }
 
 [ -e ".git" ] || [ -f "version" ] || printf "unknown\n" > version || \
@@ -73,53 +73,49 @@ x_() {
 
 read -r projectname < projectname || :
 [ ! -f version ] || read -r version < version || :
-version_="${version}"
+version_="$version"
 [ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
-    version="git-$(git rev-parse HEAD 2>&1)" || version="${version_}"
+    version="git-$(git rev-parse HEAD 2>&1)" || version="$version_"
 [ ! -f versiondate ] || read -r versiondate < versiondate || :
-versiondate_="${versiondate}"
+versiondate_="$versiondate"
 [ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
-    --pretty='%ct' HEAD)" || versiondate="${versiondate_}"
+    --pretty='%ct' HEAD)" || versiondate="$versiondate_"
 for p in projectname version versiondate; do
 	eval "[ -n \"\$$p\" ] || $err \"$p unset\""
 	eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
 done
-relname="${projectname}-${version}"
-export LOCALVERSION="-${projectname}-${version%%-*}"
+relname="$projectname-$version"
+export LOCALVERSION="-$projectname-${version%%-*}"
 
 items()
 {
 	rval=1
-	if [ ! -d "${1}" ]; then
-		printf "items: directory '%s' doesn't exist" "${1}" 1>&2
-		return 1
-	fi
-	for x in "${1}/"*; do
+	e "$1" d not && return 1
+	for x in "$1/"*; do
 		# -e used because this is for files *or* directories
-		[ -e "${x}" ] || continue
+		[ -e "$x" ] || continue
 		[ "${x##*/}" = "build.list" ] && continue
 		printf "%s\n" "${x##*/}" 2>/dev/null
 		rval=0
 	done
-	return ${rval}
+	return $rval
 }
 
 scan_config()
 {
-	awkstr=" /\{.*${1}.*}{/ {flag=1;next} /\}/{flag=0} flag { print }"
-	confdir="${2}"
+	awkstr=" /\{.*$1.*}{/ {flag=1;next} /\}/{flag=0} flag { print }"
+	confdir="$2"
 	revfile="$(mktemp -t sources.XXXXXXXXXX)"
-	cat "${confdir}/"* > "${revfile}" || \
-	    $err "scan_config ${confdir}: Cannot concatenate files"
+	cat "$confdir/"* > "$revfile" || $err "$confdir: can't cat files"
 	while read -r line ; do
-		set ${line} 1>/dev/null 2>/dev/null || :
+		set $line 1>/dev/null 2>/dev/null || :
 		if [ "${1%:}" = "depend" ]; then
-			depend="${depend} ${2}"
+			depend="$depend $2"
 		else
-			eval "${1%:}=\"${2}\""
+			eval "${1%:}=\"$2\""
 		fi
 	done << EOF
-	$(eval "awk '${awkstr}' \"${revfile}\"")
+	$(eval "awk '$awkstr' \"$revfile\"")
 EOF
 	rm -f "$revfile" || $err "scan_config: Cannot remove tmpfile"
 }
@@ -127,27 +123,26 @@ EOF
 check_defconfig()
 {
 	[ -d "$1" ] || $err "Target '$1' not defined."
-	for x in "${1}"/config/*; do
-		[ -f "${x}" ] && printf "%s\n" "$x" && return 1
+	for x in "$1"/config/*; do
+		[ -f "$x" ] && printf "%s\n" "$x" && return 1
 	done
 }
 
 handle_coreboot_utils()
 {
 	for util in cbfstool ifdtool; do
-		x_ ./update trees ${_f} "src/coreboot/${1}/util/${util}"
-		[ -z "${mode}" ] && [ ! -f "cbutils/${1}/${util}" ] && \
-			x_ mkdir -p "cbutils/${1}" && \
-			x_ cp "src/coreboot/${1}/util/${util}/${util}" \
-			    "cbutils/${1}"
-		[ -z "${mode}" ] || x_ rm -Rf "cbutils/${1}"
+		x_ ./update trees $_f "src/coreboot/$1/util/$util"
+		[ -z "$mode" ] && [ ! -f "cbutils/$1/$util" ] && \
+			x_ mkdir -p "cbutils/$1" && \
+			x_ cp "src/coreboot/$1/util/$util/$util" "cbutils/$1"
+		[ -z "$mode" ] || x_ rm -Rf "cbutils/$1"
 	done
 }
 
 remkdir()
 {
-	rm -Rf "${1}" || $err "remkdir: !rm -Rf \"${1}\""
-	mkdir -p "${1}" || $err "remkdir: !mkdir -p \"${1}\""
+	rm -Rf "$1" || $err "remkdir: !rm -Rf \"$1\""
+	mkdir -p "$1" || $err "remkdir: !mkdir -p \"$1\""
 }
 
 git_err()
@@ -158,9 +153,9 @@ git_err()
 
 mkrom_tarball()
 {
-	printf "%s\n" "${version}" > "${1}/version" || $err "$1 !version"
-	printf "%s\n" "${versiondate}" > "${1}/versiondate" || $err "$1 !vdate"
-	printf "%s\n" "${projectname}" > "${1}/projectname" || $err "$1 !pname"
+	printf "%s\n" "$version" > "$1/version" || $err "$1 !version"
+	printf "%s\n" "$versiondate" > "$1/versiondate" || $err "$1 !vdate"
+	printf "%s\n" "$projectname" > "$1/projectname" || $err "$1 !pname"
 
 	mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz"
 	x_ rm -Rf "$1"
@@ -168,20 +163,20 @@ mkrom_tarball()
 
 mktarball()
 {
-	[ "${2%/*}" = "${2}" ] || \
+	[ "${2%/*}" = "$2" ] || \
 		mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
 	printf "\nCreating archive: %s\n\n" "$2"
 	tar -c "$1" | xz -T$threads -9e > "$2" || \
 	    $err "mktarball 2, $1"
-	mksha512sum "${2}" "${2##*/}.sha512"
+	mksha512sum "$2" "${2##*/}.sha512"
 }
 
 mksha512sum()
 {
 	(
-	[ "${1%/*}" != "${1}" ] && x_ cd "${1%/*}"
-	sha512sum ./"${1##*/}" >> "${2}" || \
-	    $err "!sha512sum \"${1}\" > \"${2}\""
+	[ "${1%/*}" != "$1" ] && x_ cd "${1%/*}"
+	sha512sum ./"${1##*/}" >> "$2" || \
+	    $err "!sha512sum \"$1\" > \"$2\""
 	) || $err "failed to create tarball checksum"
 }
 
@@ -193,3 +188,15 @@ rmgit()
 	find . -name ".gitmodules" -exec rm -Rf {} + || $err "!rm .gitmod $1"
 	) || $err "Cannot remove .git/.gitmodules in $1"
 }
+
+e()
+{
+	es_t="e"
+	[ $# -gt 1 ] && es_t="$2"
+	es2=""
+	estr="[ -$es_t \"\$1\" ] || return 1"
+	[ $# -gt 2 ] && estr="[ -$es_t \"\$1\" ] && return 1" && es2="not "
+
+	eval "$estr"
+	printf "%s %sfound\n" "$1" "$es2" 1>&2
+}
diff --git a/include/vendor.sh b/include/vendor.sh
index 5ab04221..9c3e294e 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -1,27 +1,27 @@
 # SPDX-License-Identifier: GPL-3.0-only
-# SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
-# SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# SPDX-FileCopyrightText: 2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
+# Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
+# Copyright (c) 2023-2024 Leah Rowe <leah@libreboot.org>
 
 _ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
 _7ztest="a"
 
-e6400_unpack="${PWD}/src/bios_extract/dell_inspiron_1100_unpacker.py"
-me7updateparser="${PWD}/util/me7_update_parser/me7_update_parser.py"
-pfs_extract="${PWD}/src/biosutilities/Dell_PFS_Extract.py"
-uefiextract="${PWD}/src/uefitool/uefiextract"
+e6400_unpack="$PWD/src/bios_extract/dell_inspiron_1100_unpacker.py"
+me7updateparser="$PWD/util/me7_update_parser/me7_update_parser.py"
+pfs_extract="$PWD/src/biosutilities/Dell_PFS_Extract.py"
+uefiextract="$PWD/src/uefitool/uefiextract"
 nvmutil="util/nvmutil/nvm"
 vendir="vendorfiles"
-appdir="${vendir}/app"
+appdir="$vendir/app"
 
 eval "$(setvars "" _b EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
-    E6400_VGA_romname SCH5545EC_DL_url SCH5545EC_DL_url_bkup SCH5545EC_DL_hash \
-    mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl CONFIG_HAVE_MRC \
-    CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_ME_BIN archive EC_url modifygbe \
-    CONFIG_ME_BIN_PATH CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 _dest tree \
-    CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW2_OFFSET rom \
-    CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_GBE_BIN_PATH release DL_url \
+    E6400_VGA_romname CONFIG_HAVE_MRC SCH5545EC_DL_url_bkup SCH5545EC_DL_hash \
+    mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl SCH5545EC_DL_url \
+    CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_ME_BIN archive EC_url modifygbe rom \
+    CONFIG_ME_BIN_PATH CONFIG_KBC1126_FIRMWARE _dest tree CONFIG_GBE_BIN_PATH \
+    CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW2_OFFSET \
+    CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_KBC1126_FW1 release DL_url \
     CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE nukemode \
     CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB cbfstoolref \
     CONFIG_REFCODE_BLOB_FILE)"
@@ -29,15 +29,15 @@ eval "$(setvars "" _b EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe \
 vendor_download()
 {
 	set +u +e
-	export PATH="${PATH}:/sbin"
+	export PATH="$PATH:/sbin"
 
 	[ $# -gt 0 ] || $err "No argument given"
-	board="${1}"
-	boarddir="${cbcfgsdir}/${board}"
+	board="$1"
+	boarddir="$cbcfgsdir/$board"
 	_b="${board%%_*mb}" # shorthand (no duplication per rom size)
 
 	detect_firmware && exit 0
-	scan_config "${_b}" "config/vendor"
+	scan_config "$_b" "config/vendor"
 
 	build_dependencies_download
 	download_vendorfiles
@@ -46,93 +46,91 @@ vendor_download()
 detect_firmware()
 {
 	[ -d "$boarddir" ] || $err "Target '$board' not defined."
-	. "$(check_defconfig "${boarddir}")" 2>/dev/null || exit 0
-	. "${boarddir}/target.cfg" 2>/dev/null
+	. "$(check_defconfig "$boarddir")" 2>/dev/null || exit 0
+	. "$boarddir/target.cfg" 2>/dev/null
 
 	[ -z "$tree" ] && $err "detect_firmware $boarddir: tree undefined"
 	cbdir="src/coreboot/$tree"
 	cbfstool="cbutils/$tree/cbfstool"
 
-	mecleaner="${PWD}/${cbdir}/util/me_cleaner/me_cleaner.py"
-	kbc1126_ec_dump="${PWD}/${cbdir}/util/kbc1126/kbc1126_ec_dump"
+	mecleaner="$PWD/$cbdir/util/me_cleaner/me_cleaner.py"
+	kbc1126_ec_dump="$PWD/$cbdir/util/kbc1126/kbc1126_ec_dump"
 
 	for c in CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
 	    CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW; do
-		eval "[ -z \"\${${c}}\" ] || return 1"
+		eval "[ -z \"\${$c}\" ] || return 1"
 	done
-	printf "Vendor files not needed for: %s\n" "${board}" 1>&2
+	printf "Vendor files not needed for: %s\n" "$board" 1>&2
 }
 
 build_dependencies_download()
 {
-	[ -d "${cbdir}" ] || x_ ./update trees -f coreboot ${cbdir##*/}
+	[ -d "$cbdir" ] || x_ ./update trees -f coreboot ${cbdir##*/}
 	for d in uefitool biosutilities bios_extract; do
-		[ -d "src/${d}" ] && continue
-		x_ ./update trees -f "${d}"
+		[ -d "src/$d" ] && continue
+		x_ ./update trees -f "$d"
 	done
-	[ -f "${uefiextract}" ] || x_ ./update trees -b uefitool
-	[ ! -d "${kbc1126_ec_dump%/*}" ] || [ -f "${kbc1126_ec_dump}" ] || x_ \
-	    make -C "${cbdir}/util/kbc1126"
+	[ -f "$uefiextract" ] || x_ ./update trees -b uefitool
+	[ ! -d "${kbc1126_ec_dump%/*}" ] || [ -f "$kbc1126_ec_dump" ] || x_ \
+	    make -C "$cbdir/util/kbc1126"
 	[ -n "$MRC_refcode_cbtree" ] && \
 		cbfstoolref="cbutils/$MRC_refcode_cbtree/cbfstool"
 	[ -z "$cbfstoolref" ] || [ -f "$cbfstoolref" ] || \
 	    x_ ./update trees -b coreboot utils $MRC_refcode_cbtree
-	[ -f "${cbfstool}" ] && [ -f "${ifdtool}" ] && return 0
+	[ -f "$cbfstool" ] && [ -f "$ifdtool" ] && return 0
 	x_ ./update trees -b coreboot utils $tree
 }
 
 download_vendorfiles()
 {
-	[ -z "${CONFIG_HAVE_ME_BIN}" ] || \
-		fetch intel_me "$DL_url" "$DL_url_bkup" "$DL_hash" \
-		    "${CONFIG_ME_BIN_PATH}"
-	[ -z "${CONFIG_INCLUDE_SMSC_SCH5545_EC_FW}" ] || \
-		fetch sch5545ec "$SCH5545EC_DL_url" "$SCH5545EC_DL_url_bkup" \
-		    "$SCH5545EC_DL_hash" "$CONFIG_SMSC_SCH5545_EC_FW_FILE"
-	[ -z "${CONFIG_KBC1126_FIRMWARE}" ] || \
-		fetch kbc1126ec "$EC_url" "$EC_url_bkup" "$EC_hash" \
-		    "${CONFIG_KBC1126_FW1}"
-	[ -z "${CONFIG_VGA_BIOS_FILE}" ] || \
-		fetch "e6400vga" "$E6400_VGA_DL_url" "$E6400_VGA_DL_url_bkup" \
-		    "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
-	[ -z "${CONFIG_HAVE_MRC}" ] && return 0
-	fetch "mrc" "$MRC_url" "$MRC_url_bkup" "$MRC_hash" "$CONFIG_MRC_FILE"
+	[ -z "$CONFIG_HAVE_ME_BIN" ] || fetch intel_me "$DL_url" \
+	    "$DL_url_bkup" "$DL_hash" "$CONFIG_ME_BIN_PATH"
+	[ -z "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" ] || fetch sch5545ec \
+	    "$SCH5545EC_DL_url" "$SCH5545EC_DL_url_bkup" "$SCH5545EC_DL_hash" \
+	    "$CONFIG_SMSC_SCH5545_EC_FW_FILE"
+	[ -z "$CONFIG_KBC1126_FIRMWARE" ] || fetch kbc1126ec "$EC_url" \
+	    "$EC_url_bkup" "$EC_hash" "$CONFIG_KBC1126_FW1"
+	[ -z "$CONFIG_VGA_BIOS_FILE" ] || fetch "e6400vga" \
+	    "$E6400_VGA_DL_url" "$E6400_VGA_DL_url_bkup" "$E6400_VGA_DL_hash" \
+	    "$CONFIG_VGA_BIOS_FILE"
+	[ -z "$CONFIG_HAVE_MRC" ] || fetch "mrc" "$MRC_url" "$MRC_url_bkup" \
+	    "$MRC_hash" "$CONFIG_MRC_FILE"; return 0
 }
 
 fetch()
 {
-	dl_type="${1}"
-	dl="${2}"
-	dl_bkup="${3}"
-	dlsum="${4}"
-	[ "${5}" = "/dev/null" ] && return 0
+	dl_type="$1"
+	dl="$2"
+	dl_bkup="$3"
+	dlsum="$4"
+	[ "$5" = "/dev/null" ] && return 0
 	[ "${5# }" = "$5" ] || $err "fetch: space not allowed in _dest: '$5'"
 	[ "${5#/}" = "$5" ] || $err "fetch: absolute path not allowed: '$5'"
 	_dest="${5##*../}"
-	_dl="${vendir}/cache/${dlsum}"
+	_dl="$vendir/cache/$dlsum"
 	dl_fail="n"
 
 	x_ mkdir -p "${_dl%/*}"
 
 	dl_fail="y"
-	vendor_checksum "${dlsum}" "${_dl}" || dl_fail="n"
-	for url in "${dl}" "${dl_bkup}"; do
-		[ "${dl_fail}" = "n" ] && break
-		[ -z "${url}" ] && continue
-		x_ rm -f "${_dl}"
+	vendor_checksum "$dlsum" "$_dl" || dl_fail="n"
+	for url in "$dl" "$dl_bkup"; do
+		[ "$dl_fail" = "n" ] && break
+		[ -z "$url" ] && continue
+		x_ rm -f "$_dl"
 		curl --location --retry 3 -A "$_ua" "$url" -o "$_dl" || \
 		    wget --tries 3 -U "$_ua" "$url" -O "$_dl" || continue
-		vendor_checksum "${dlsum}" "${_dl}" || dl_fail="n"
+		vendor_checksum "$dlsum" "$_dl" || dl_fail="n"
 	done
-	[ "${dl_fail}" = "y" ] && \
-		$err "fetch ${dlsum}: matched file unavailable"
+	[ "$dl_fail" = "y" ] && \
+		$err "fetch $dlsum: matched file unavailable"
 
 	x_ rm -Rf "${_dl}_extracted"
-	mkdirs "${_dest}" "extract_${dl_type}" || return 0
-	eval "extract_${dl_type}"
+	mkdirs "$_dest" "extract_$dl_type" || return 0
+	eval "extract_$dl_type"
 
-	[ -f "${_dest}" ] && return 0
-	$err "extract_${dl_type} (fetch): missing file: '${_dest}'"
+	[ -f "$_dest" ] && return 0
+	$err "extract_$dl_type (fetch): missing file: '$_dest'"
 }
 
 vendor_checksum()
@@ -144,26 +142,24 @@ vendor_checksum()
 
 mkdirs()
 {
-	if [ -f "${1}" ]; then
-		printf "mkdirs %s %s: already downloaded\n" "$1" "$2" 1>&2
-		return 1
-	fi
+	e "$1" f && return 1
+
 	mkdir -p "${1%/*}" || $err "mkdirs: !mkdir -p ${1%/*}"
-	remkdir "${appdir}"
-	extract_archive "${_dl}" "${appdir}" || \
-	    [ "${2}" = "extract_e6400vga" ] || \
-	    $err "mkdirs ${1} ${2}: !extract"
+	remkdir "$appdir"
+	extract_archive "$_dl" "$appdir" || \
+	    [ "$2" = "extract_e6400vga" ] || \
+	    $err "mkdirs $1 $2: !extract"
 }
 
 extract_intel_me()
 {
-	[ ! -f "$mecleaner" ] && \
-		$err "extract_intel_me $cbdir: me_cleaner missing"
+	e "$mecleaner" f not && $err "$cbdir: me_cleaner missing"
 
-	_me="${PWD}/${_dest}" # must always be an absolute path
-	cdir="${PWD}/${appdir}" # must always be an absolute path
-	[ $# -gt 0 ] && _me="${1}" && cdir="${2}"
-	[ -f "${_me}" ] && return 0
+	_me="$PWD/$_dest" # must always be an absolute path
+	cdir="$PWD/$appdir" # must always be an absolute path
+	[ $# -gt 0 ] && _me="${1}" && cdir="$2"
+
+	e "$_me" f && return 0
 
 	sdir="$(mktemp -d)"
 	[ -z "$sdir" ] && return 0
@@ -175,30 +171,30 @@ extract_intel_me()
 		[ -f "$_me" ] && break
 		[ -L "$i" ] && continue
 		if [ -f "$i" ]; then
-			"$mecleaner" -r -t -O "${sdir}/vendorfile" \
+			"$mecleaner" -r -t -O "$sdir/vendorfile" \
 			    -M "$_me" "$i" && break
 			"$mecleaner" -r -t -O "$_me" "$i" && break
 			"$me7updateparser" -O "$_me" "$i" && break
 			_7ztest="${_7ztest}a"
 			extract_archive "$i" "$_7ztest" || continue
-			extract_intel_me "$_me" "${cdir}/${_7ztest}"
+			extract_intel_me "$_me" "$cdir/$_7ztest"
 		elif [ -d "$i" ]; then
-			extract_intel_me "$_me" "${cdir}/${i}"
+			extract_intel_me "$_me" "$cdir/$i"
 		else
 			continue
 		fi
-		cdir="${1}"
+		cdir="$1"
 		[ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
-		cd "${cdir}" || :
+		cd "$cdir" || :
 	done
 	)
-	rm -Rf "${sdir}" || $err "extract_intel_me: !rm -Rf ${sdir}"
+	rm -Rf "$sdir" || $err "extract_intel_me: !rm -Rf $sdir"
 }
 
 extract_archive()
 {
-	innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x "$1" \
-	    -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
+	innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
+	    "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
 }
 
 extract_kbc1126ec()
@@ -206,58 +202,51 @@ extract_kbc1126ec()
 	[ ! -f "$kbc1126_ec_dump" ] && \
 		$err "extract_kbc1126ec $cbdir: kbc1126_ec_dump missing"
 	(
-	x_ cd "${appdir}/"
+	x_ cd "$appdir/"
 	mv Rompaq/68*.BIN ec.bin || :
 	if [ ! -f ec.bin ]; then
 		unar -D ROM.CAB Rom.bin || unar -D Rom.CAB Rom.bin || \
 		    unar -D 68*.CAB Rom.bin || $err "can't extract Rom.bin"
 		x_ mv Rom.bin ec.bin
 	fi
-	[ -f ec.bin ] || $err "extract_kbc1126_ec ${board}: can't extract"
-	"${kbc1126_ec_dump}" ec.bin || \
-	    $err "extract_kbc1126_ec ${board}: can't extract ecfw1/2.bin"
+	[ -f ec.bin ] || $err "extract_kbc1126_ec $board: can't extract"
+	"$kbc1126_ec_dump" ec.bin || $err "!1126ec $board extract ecfw"
 	) || $err "can't extract kbc1126 ec firmware"
-	ec_ex="y"
-	for i in 1 2; do
-		[ -f "${appdir}/ec.bin.fw${i}" ] || ec_ex="n"
-	done
-	[ "${ec_ex}" = "y" ] || \
-	    $err "extract_kbc1126_ec ${board}: didn't extract ecfw1/2.bin"
-	cp "${appdir}/"ec.bin.fw* "${_dest%/*}/" || \
-	    $err "extract_kbc1126_ec ${board}: can't copy ec binaries"
+
+	e "$appdir/ec.bin.fw1" f not && $err "$board: kbc1126ec fetch failed"
+	e "$appdir/ec.bin.fw2" f not && $err "$board: kbc1126ec fetch failed"
+
+	cp "$appdir/"ec.bin.fw* "${_dest%/*}/" || $err "!cp 1126ec $_dest"
 }
 
 extract_e6400vga()
 {
 	for v in E6400_VGA_offset E6400_VGA_romname; do
-		eval "[ -z \"\$$v\" ] && $err \"extract_e6400vga: $v undefined\""
+		eval "[ -z \"\$$v\" ] && $err \"e6400vga: $v undefined\""
 	done
 	tail -c +$E6400_VGA_offset "$_dl" | gunzip > "$appdir/bios.bin" || :
 	(
-	x_ cd "${appdir}"
+	x_ cd "$appdir"
 	[ -f "bios.bin" ] || $err "extract_e6400vga: can't extract bios.bin"
-	"${e6400_unpack}" bios.bin || printf "TODO: fix dell extract util\n"
-	[ -f "${E6400_VGA_romname}" ] || \
+	"$e6400_unpack" bios.bin || printf "TODO: fix dell extract util\n"
+	[ -f "$E6400_VGA_romname" ] || \
 		$err "extract_e6400vga: can't extract vga rom from bios.bin"
 	) || $err "can't extract e6400 vga rom"
-	cp "${appdir}/${E6400_VGA_romname}" "${_dest}" || \
-	    $err "extract_e6400vga ${board}: can't copy vga rom to ${_dest}"
+	cp "$appdir/$E6400_VGA_romname" "$_dest" || \
+	    $err "extract_e6400vga $board: can't copy vga rom to $_dest"
 }
 
 extract_sch5545ec()
 {
 	# full system ROM (UEFI), to extract with UEFIExtract:
-	_bios="${_dl}_extracted/Firmware/1 ${dlsum} -- 1 System BIOS vA.28.bin"
+	_bios="${_dl}_extracted/Firmware/1 $dlsum -- 1 System BIOS vA.28.bin"
 	# this is the SCH5545 firmware, inside of the extracted UEFI ROM:
-	_sch5545ec_fw="${_bios}.dump/4 7A9354D9-0468-444A-81CE-0BF617D890DF"
-	_sch5545ec_fw="${_sch5545ec_fw}/54 D386BEB8-4B54-4E69-94F5-06091F67E0D3"
-	_sch5545ec_fw="${_sch5545ec_fw}/0 Raw section/body.bin" # <-- this!
+	_sch5545ec_fw="$_bios.dump/4 7A9354D9-0468-444A-81CE-0BF617D890DF"
+	_sch5545ec_fw="$_sch5545ec_fw/54 D386BEB8-4B54-4E69-94F5-06091F67E0D3"
+	_sch5545ec_fw="$_sch5545ec_fw/0 Raw section/body.bin" # <-- this!
 
-	# this makes the file defined by _sch5545ec_fw available to copy
-	"${uefiextract}" "${_bios}" || \
-	    $err "extract_sch5545ec: cannot extract from uefi image"
-	cp "${_sch5545ec_fw}" "${_dest}" || \
-	    $err "extract_sch5545ec: cannot copy sch5545ec firmware file"
+	"$uefiextract" "$_bios" || $err "sch5545 !extract"
+	cp "$_sch5545ec_fw" "$_dest" || $err "$_dest: !sch5545 copy"
 }
 
 vendor_inject()
@@ -265,17 +254,17 @@ vendor_inject()
 	set +u +e
 
 	[ $# -lt 1 ] && $err "No options specified."
-	[ "${1}" = "listboards" ] && eval "items config/coreboot || :; exit 0"
+	[ "$1" = "listboards" ] && eval "items config/coreboot || :; exit 0"
 
-	archive="${1}"
+	archive="$1"
 
 	while getopts n:r:b:m: option; do
-		case "${option}" in
-		n) nukemode="${OPTARG}" ;;
-		r) rom=${OPTARG} ;;
-		b) board=${OPTARG} ;;
-		m) modifygbe=true
-		   new_mac=${OPTARG} ;;
+		case "$option" in
+		n) nukemode="$OPTARG" ;;
+		r) rom="$OPTARG" ;;
+		b) board="$OPTARG" ;;
+		m) modifygbe="true"
+		   new_mac="$OPTARG" ;;
 		*) : ;;
 		esac
 	done
@@ -283,7 +272,7 @@ vendor_inject()
 	check_board
 	build_dependencies_inject
 	inject_vendorfiles
-	[ "${nukemode}" = "nuke" ] && return 0
+	[ "$nukemode" = "nuke" ] && return 0
 	printf "Friendly reminder (this is *not* an error message):\n"
 	printf "Please ensure that the files were inserted correctly.\n"
 }
@@ -291,17 +280,17 @@ vendor_inject()
 check_board()
 {
 	failcheck="n"
-	check_release "${archive}" || failcheck="y"
-	if [ "${failcheck}" = "y" ]; then
+	check_release "$archive" || failcheck="y"
+	if [ "$failcheck" = "y" ]; then
 		[ -f "$rom" ] || $err "check_board \"$rom\": invalid path"
 		[ -z "${rom+x}" ] && $err "check_board: no rom specified"
-		[ -n "${board+x}" ] || board=$(detect_board "${rom}")
+		[ -n "${board+x}" ] || board="$(detect_board "$rom")"
 	else
 		release="y"
-		board=$(detect_board "${archive}")
+		board="$(detect_board "$archive")"
 	fi
 
-	boarddir="${cbcfgsdir}/${board}"
+	boarddir="$cbcfgsdir/$board"
 	[ -d "$boarddir" ] || $err "check_board: board $board missing"
 	[ -f "$boarddir/target.cfg" ] || \
 		$err "check_board $board: target.cfg missing"
@@ -311,29 +300,29 @@ check_board()
 
 check_release()
 {
-	[ -f "${archive}" ] || return 1
+	[ -f "$archive" ] || return 1
 	[ "${archive##*.}" = "xz" ] || return 1
-	printf "%s\n" "Release archive ${archive} detected"
+	printf "%s\n" "Release archive $archive detected"
 }
 
 # This function tries to determine the board from the filename of the rom.
 # It will only succeed if the filename is not changed from the build/download
 detect_board()
 {
-	path="${1}"
-	filename=$(basename "${path}")
-	case ${filename} in
+	path="$1"
+	filename="$(basename "$path")"
+	case "$filename" in
 	grub_*)
-		board=$(echo "${filename}" | cut -d '_' -f2-3) ;;
+		board="$(echo "$filename" | cut -d '_' -f2-3)" ;;
 	seabios_withgrub_*)
-		board=$(echo "${filename}" | cut -d '_' -f3-4) ;;
+		board="$(echo "$filename" | cut -d '_' -f3-4)" ;;
 	*.tar.xz)
-		_stripped_prefix=${filename#*_}
+		_stripped_prefix="${filename#*_}"
 		board="${_stripped_prefix%.tar.xz}" ;;
 	*)
 		$err "detect_board $filename: could not detect board type"
 	esac
-	printf "%s\n" "${board}"
+	printf "%s\n" "$board"
 }
 
 build_dependencies_inject()
@@ -341,8 +330,8 @@ build_dependencies_inject()
 	cbdir="src/coreboot/$tree"
 	cbfstool="cbutils/$tree/cbfstool"
 	ifdtool="cbutils/$tree/ifdtool"
-	[ -d "${cbdir}" ] || x_ ./update trees -f coreboot $tree
-	if [ ! -f "${cbfstool}" ] || [ ! -f "${ifdtool}" ]; then
+	[ -d "$cbdir" ] || x_ ./update trees -f coreboot $tree
+	if [ ! -f "$cbfstool" ] || [ ! -f "$ifdtool" ]; then
 		x_ ./update trees -b coreboot utils $tree
 	fi
 	[ -z "$new_mac" ] || [ -f "$nvmutil" ] || x_ make -C util/nvmutil
@@ -351,111 +340,109 @@ build_dependencies_inject()
 
 inject_vendorfiles()
 {
-	[ "${release}" != "y" ] && eval "patch_rom \"$rom\"; return 0"
+	[ "$release" != "y" ] && eval "patch_rom \"$rom\"; return 0"
 	patch_release_roms
 }
 
 patch_release_roms()
 {
 	_tmpdir="tmp/romdir"
-	remkdir "${_tmpdir}"
-	tar -xf "${archive}" -C "${_tmpdir}" || \
+	remkdir "$_tmpdir"
+	tar -xf "$archive" -C "$_tmpdir" || \
 	    $err "patch_release_roms: !tar -xf \"$archive\" -C \"$_tmpdir\""
 
-	for x in "${_tmpdir}"/bin/*/*.rom ; do
+	for x in "$_tmpdir"/bin/*/*.rom ; do
 		printf "patching rom: %s\n" "$x"
-		patch_rom "${x}"
+		patch_rom "$x"
 	done
 
 	(
-	cd "${_tmpdir}/bin/"* || \
-	    $err "patch_release_roms: !cd ${_tmpdir}/bin/*"
+	cd "$_tmpdir/bin/"* || \
+	    $err "patch_release_roms: !cd $_tmpdir/bin/*"
 
 	# NOTE: For compatibility with older rom releases, defer to sha1
-	[ "${nukemode}" = "nuke" ] || sha512sum --status -c vendorhashes || \
+	[ "$nukemode" = "nuke" ] || sha512sum --status -c vendorhashes || \
 	    sha1sum --status -c vendorhashes || sha512sum --status -c \
 	    blobhashes || sha1sum --status -c blobhashes || \
 	    $err "patch_release_roms: ROMs did not match expected hashes"
 	) || $err "can't verify vendor hashes"
 
-	[ "${modifygbe}" = "true" ] && \
-		for x in "${_tmpdir}"/bin/*/*.rom ; do
-			modify_gbe "${x}"
+	[ "$modifygbe" = "true" ] && \
+		for x in "$_tmpdir"/bin/*/*.rom ; do
+			modify_gbe "$x"
 		done
 
-	[ -d bin/release ] || x_ mkdir -p bin/release
-	x_ mv "${_tmpdir}"/bin/* bin/release/
-	x_ rm -Rf "${_tmpdir}"
+	[ -d "bin/release" ] || x_ mkdir -p bin/release
+	x_ mv "$_tmpdir"/bin/* bin/release/
+	x_ rm -Rf "$_tmpdir"
 
 	printf "Success! Your ROMs are in bin/release\n"
 }
 
 patch_rom()
 {
-	rom="${1}"
+	rom="$1"
 
-	. "$(check_defconfig "${boarddir}")" 2>/dev/null || exit 0
+	. "$(check_defconfig "$boarddir")" 2>/dev/null || exit 0
 
-	[ "$CONFIG_HAVE_MRC" = "y" ] && \
-		inject "mrc.bin" "${CONFIG_MRC_FILE}" "mrc" "0xfffa0000"
-	[ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && \
-		inject "fallback/refcode" "$CONFIG_REFCODE_BLOB_FILE" "stage"
-	[ "${CONFIG_HAVE_ME_BIN}" = "y" ] && \
-		inject "IFD" "${CONFIG_ME_BIN_PATH}" "me"
-	[ "${CONFIG_KBC1126_FIRMWARE}" = "y" ] && \
-		inject "ecfw1.bin" "$CONFIG_KBC1126_FW1" "raw" \
-		    "${CONFIG_KBC1126_FW1_OFFSET}" && \
+	[ "$CONFIG_HAVE_MRC" = "y" ] && inject "mrc.bin" "$CONFIG_MRC_FILE" \
+	    "mrc" "0xfffa0000"
+	[ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && inject "fallback/refcode" \
+	    "$CONFIG_REFCODE_BLOB_FILE" "stage"
+	[ "$CONFIG_HAVE_ME_BIN" = "y" ] && inject "IFD" "$CONFIG_ME_BIN_PATH" \
+	    "me"
+	[ "$CONFIG_KBC1126_FIRMWARE" = "y" ] && inject "ecfw1.bin" \
+	    "$CONFIG_KBC1126_FW1" "raw" "$CONFIG_KBC1126_FW1_OFFSET" && \
 		inject "ecfw2.bin" "$CONFIG_KBC1126_FW2" "raw" \
-		    "${CONFIG_KBC1126_FW2_OFFSET}"
+		    "$CONFIG_KBC1126_FW2_OFFSET"
 	[ -n "$CONFIG_VGA_BIOS_FILE" ] && [ -n "$CONFIG_VGA_BIOS_ID" ] && \
-		inject "pci${CONFIG_VGA_BIOS_ID}.rom" \
-		    "${CONFIG_VGA_BIOS_FILE}" "optionrom"
-	[ "${CONFIG_INCLUDE_SMSC_SCH5545_EC_FW}" = "y" ] && \
-	    [ -n "${CONFIG_SMSC_SCH5545_EC_FW_FILE}" ] && \
+		inject "pci$CONFIG_VGA_BIOS_ID.rom" \
+		    "$CONFIG_VGA_BIOS_FILE" "optionrom"
+	[ "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" = "y" ] && \
+	    [ -n "$CONFIG_SMSC_SCH5545_EC_FW_FILE" ] && \
 		inject "sch5545_ecfw.bin" "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
-	[ "${modifygbe}" = "true" ] && ! [ "${release}" = "y" ] && \
-		inject "IFD" "${CONFIG_GBE_BIN_PATH}" "GbE"
+	[ "$modifygbe" = "true" ] && ! [ "$release" = "y" ] && \
+		inject "IFD" "$CONFIG_GBE_BIN_PATH" "GbE"
 
-	printf "ROM image successfully patched: %s\n" "${rom}"
+	printf "ROM image successfully patched: %s\n" "$rom"
 }
 
 inject()
 {
-	[ $# -lt 3 ] && \
-		$err "inject $@, $rom: usage: inject name path type (offset)"
+	[ $# -lt 3 ] && $err "$@, $rom: usage: inject name path type (offset)"
 
 	eval "$(setvars "" cbfsname _dest _t _offset)"
-	cbfsname="${1}"
+	cbfsname="$1"
 	_dest="${2##*../}"
-	_t="${3}"
-	[ $# -gt 3 ] && _offset="-b ${4}" && [ -z "${4}" ] && \
+	_t="$3"
+	[ $# -gt 3 ] && _offset="-b $4" && [ -z "$4" ] && \
 	    $err "inject $@, $rom: offset passed, but empty (not defined)"
 
-	[ -z "${_dest}" ] && $err "inject $@, ${rom}: empty destination path"
-	[ ! -f "${_dest}" ] && [ "${nukemode}" != "nuke" ] && \
-		$err "inject_${dl_type}: file missing, ${_dest}"
+	[ -z "$_dest" ] && $err "inject $@, $rom: empty destination path"
+	[ ! -f "$_dest" ] && [ "$nukemode" != "nuke" ] && \
+		$err "inject_$dl_type: file missing, $_dest"
 
 	[ "$nukemode" = "nuke" ] || \
-		printf "Inserting %s/%s in file: %s\n" "$cbfsname" "$_t" "$rom"
+		printf "Inserting %s/%s into: %s\n" "$cbfsname" "$_t" "$rom"
 
-	if [ "${_t}" = "GbE" ]; then
+	if [ "$_t" = "GbE" ]; then
 		x_ mkdir -p tmp
-		cp "${_dest}" "tmp/gbe.bin" || \
-		    $err "inject: !cp \"${_dest}\" \"tmp/gbe.bin\""
+		cp "$_dest" "tmp/gbe.bin" || \
+		    $err "inject: !cp \"$_dest\" \"tmp/gbe.bin\""
 		_dest="tmp/gbe.bin"
-		"${nvmutil}" "${_dest}" setmac "${new_mac}" || \
-		    $err "inject ${_dest}: can't change mac address"
+		"$nvmutil" "$_dest" setmac "$new_mac" || \
+		    $err "inject $_dest: can't change mac address"
 	fi
-	if [ "${cbfsname}" = "IFD" ]; then
-		if [ "${nukemode}" != "nuke" ]; then
-			"$ifdtool" -i ${_t}:${_dest} "$rom" -O "$rom" || \
+	if [ "$cbfsname" = "IFD" ]; then
+		if [ "$nukemode" != "nuke" ]; then
+			"$ifdtool" -i $_t:$_dest "$rom" -O "$rom" || \
 			    $err "inject: can't insert $_t ($dest) into $rom"
 		else
 			"$ifdtool" --nuke $_t "$rom" -O "$rom" || \
 			    $err "inject $rom: can't nuke $_t in IFD"
 		fi
 	else
-		if [ "${nukemode}" != "nuke" ]; then
+		if [ "$nukemode" != "nuke" ]; then
 			if [ "$_t" = "stage" ]; then # broadwell refcode
 				"$cbfstool" "$rom" add-stage -f "$_dest" \
 				    -n "$cbfsname" -t stage -c lzma
diff --git a/script/roms b/script/roms
index c1a1b8bc..c4b95302 100755
--- a/script/roms
+++ b/script/roms
@@ -1,10 +1,10 @@
 #!/usr/bin/env sh
 # SPDX-License-Identifier: GPL-3.0-or-later
-# SPDX-FileCopyrightText: 2014-2016,2020,2021,2023,2024 Leah Rowe <leah@libreboot.org>
-# SPDX-FileCopyrightText: 2021,2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
-# SPDX-FileCopyrightText: 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
-# SPDX-FileCopyrightText: 2023 Riku Viitanen <riku.viitanen@protonmail.com>
+# Copyright (c) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2021-2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
+# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
+# Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
+# Copyright (c) 2023 Riku Viitanen <riku.viitanen@protonmail.com>
 
 set -u -e
 
@@ -14,64 +14,56 @@ seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 grub_background="background1280x800.png"
 grubelf="elf/grub/grub.elf"
 cfgsdir="config/coreboot"
-pico_src_dir="src/pico-serprog"
-pico_sdk_dir="src/pico-sdk"
-stm32_src_dir="src/stm32-vserprog"
+picosrc="src/pico-serprog"
+picosdk="src/pico-sdk"
+stm32src="src/stm32-vserprog"
 
 # Disable all payloads by default.
 # target.cfg files have to specifically enable [a] payload(s)
-pv="payload_grub payload_grub_withseabios payload_seabios payload_memtest t"
-pv="${pv} payload_seabios_withgrub payload_seabios_grubonly payload_uboot memtest_bin"
+pv="payload_uboot payload_grub_withseabios payload_seabios payload_memtest t"
+pv="$pv payload_seabios_withgrub payload_seabios_grubonly payload_grub mt86bin"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree keymaps release"
-v="${v} grub_timeout ubdir board grub_scan_disk uboot_config"
-eval "$(setvars "n" ${pv} serprog)"
-eval "$(setvars "" ${v} boards _displaymode _payload _keyboard all targets \
+v="$v grub_timeout ubdir board grub_scan_disk uboot_config"
+eval "$(setvars "n" $pv serprog)"
+eval "$(setvars "" $v boards _displaymode _payload _keyboard all targets \
     serprog_boards_dir)"
 
 main()
 {
 	while [ $# -gt 0 ]; do
-		case ${1} in
-		list)
-			x_ items config/coreboot
-			return 0 ;;
-		serprog)
-			serprog="y"
-			shift 1; break ;;
-		-d) _displaymode="${2}" ;;
-		-p) _payload="${2}" ;;
-		-k) _keyboard="${2}" ;;
+		case "$1" in
+		list) x_ items config/coreboot; return 0 ;;
+		serprog) serprog="y"; shift 1; break ;;
+		-d) _displaymode="$2" ;;
+		-p) _payload="$2" ;;
+		-k) _keyboard="$2" ;;
 		*)
-			[ "${1}" = "all" ] && all="y"
-			boards="${1} ${boards}"
+			[ "$1" = "all" ] && all="y"
+			boards="$1 $boards"
 			shift && continue ;;
 		esac
 		shift 2
 	done
 
 	if [ "$serprog" = "y" ]; then
-		handle_serprog $@
-		return 0
+		handle_serprog $@; return 0
 	else
-		[ "${all}" != "y" ] || boards=$(items config/coreboot) || \
+		[ "$all" != "y" ] || boards="$(items config/coreboot)" || \
 			$err "Cannot generate list of boards for building"
-		for x in ${boards}; do
+		for x in $boards; do
 			[ -d "config/coreboot/$x/config" ] && \
-				handle_coreboot_target "$x" && continue
-			printf "No configs for %s; skipping\n" "$x"
+				handle_coreboot_target "$x"; continue
 		done
 	fi
 
-	bstr="directories"
-	[ "$xbmk_release" = "y" ] && bstr="tarballs"
+	x="directories"
+	[ "$xbmk_release" = "y" ] && x="archives (remember the inject command)"
 
-	[ -z "${targets}" ] && $err "No ROM images were compiled"
+	[ -z "$targets" ] && $err "No ROM images were compiled"
 	printf "\nROM images available in these %s:\n" "$bstr"
-	eval "printf \"${targets}\""
+	eval "printf \"$targets\""
 	printf "^^ ROM images available in these %s.\n\n" "$bstr"
 
-	[ "$xbmk_release" = "y" ] && \
-		printf "Always run the inject command on release images!\n"
 	printf "DO NOT flash images from elf/ - please use bin/ instead.\n"
 }
 
@@ -79,25 +71,24 @@ handle_serprog()
 {
 	[ -z "${1+x}" ] && $err "bad command. Check $projectname docs."
 	[ "$1" != "rp2040" ] && [ "$1" != "stm32" ] && $err "bad command"
-	if [ "${1}" = "rp2040" ]; then
-		serprog_boards_dir=${pico_sdk_dir}/src/boards/include/boards
-		[ -d "$pico_src_dir" ] || x_ ./update trees -f "pico-serprog"
-	elif [ "${1}" = "stm32" ]; then
-		serprog_boards_dir=${stm32_src_dir}/boards
-		[ -d "$stm32_src_dir" ] || x_ ./update trees -f "stm32-vserprog"
+	if [ "$1" = "rp2040" ]; then
+		serprog_boards_dir="$picosdk/src/boards/include/boards"
+		[ -d "$picosrc" ] || x_ ./update trees -f "pico-serprog"
+	elif [ "$1" = "stm32" ]; then
+		serprog_boards_dir="$stm32src/boards"
+		[ -d "$stm32src" ] || x_ ./update trees -f "stm32-vserprog"
 	fi
-	x_ mkdir -p "bin/serprog_${1}"
+	x_ mkdir -p "bin/serprog_$1"
 
-	if [ $# -gt 1 ] && [ "${2}" = "list" ]; then
-		list_serprog_boards ${serprog_boards_dir}
+	if [ $# -gt 1 ] && [ "$2" = "list" ]; then
+		list_serprog_boards "$serprog_boards_dir"
 		return 0
 	elif [ $# -gt 1 ]; then
-		build_${1}_rom "${2}"
+		build_${1}_rom "$2"
 	else
-		printf "Building all serprog targets\n"
-		list_serprog_boards "${serprog_boards_dir}" | \
+		list_serprog_boards "$serprog_boards_dir" | \
 			while read -r board; do
-				build_${1}_rom "${board}"
+				build_${1}_rom "$board"
 			done
 	fi
 
@@ -106,75 +97,70 @@ handle_serprog()
 
 build_rp2040_rom()
 {
-	board=${1}
-	printf "Building pico-serprog for %s\n" "${board}"
-	x_ cmake -DPICO_BOARD="$board" -DPICO_SDK_PATH="$pico_sdk_dir" \
-	    -B "${pico_src_dir}/build" "${pico_src_dir}"
-	x_ cmake --build "${pico_src_dir}/build"
-	x_ mv ${pico_src_dir}/build/pico_serprog.uf2 \
-	   bin/serprog_rp2040/serprog_${board}.uf2
+	board="$1"
+	printf "Building pico-serprog for %s\n" "$board"
+	x_ cmake -DPICO_BOARD="$board" -DPICO_SDK_PATH="$picosdk" \
+	    -B "$picosrc/build" "$picosrc"
+	x_ cmake --build "$picosrc/build"
+	x_ mv "$picosrc/build/pico_serprog.uf2" \
+	   "bin/serprog_rp2040/serprog_$board.uf2"
 	printf "output to bin/serprog_rp2040/serprog_%s.uf2\n" "$board"
 }
 
 build_stm32_rom()
 {
-	board=${1}
-	printf "Building stm32-vserprog for %s\n" "${board}"
-	x_ make -C $stm32_src_dir libopencm3-just-make BOARD=$board
-	x_ make -C ${stm32_src_dir} BOARD=${board}
-	x_ mv ${stm32_src_dir}/stm32-vserprog.hex \
-	   bin/serprog_stm32/serprog_${board}.hex
+	board="$1"
+	printf "Building stm32-vserprog for %s\n" "$board"
+	x_ make -C "$stm32src" libopencm3-just-make BOARD=$board
+	x_ make -C "$stm32src" BOARD=$board
+	x_ mv "$stm32src/stm32-vserprog.hex" \
+	   "bin/serprog_stm32/serprog_$board.hex"
 	printf "output to bin/serprog_stm32/serprog_%s.hex\n" "$board"
 }
 
 list_serprog_boards()
 {
-	basename -a -s .h "${1}/"*.h || $err "list_boards $1: can't list boards"
+	basename -a -s .h "$1/"*.h || $err "$1: can't list boards"
 }
 
 handle_coreboot_target()
 {
-	eval "$(setvars "n" ${pv}) $(setvars "" ${v})"
+	eval "$(setvars "n" $pv) $(setvars "" $v)"
 	grub_background="background1280x800.png"
 	board="$1"
 
 	configure_target
 	[ "$board" = "$tree" ] && return 0
-	if [ "$xbmk_release" = "y" ] && [ "$release" = "n" ]; then
-		printf "Target '%s' disabled for release.\n" "$board"
-		return 0
-	fi
+	[ "$xbmk_release" = "y" ] && [ "$release" = "n" ] && return 0
 
 	build_payloads
 	build_target_mainboard
 
-	[ -d "bin/${board}" ] || return 0
-	[ "$xbmk_release" = "y" ] || targets="* bin/${board}\n${targets}"
+	[ -d "bin/$board" ] || return 0
+	[ "$xbmk_release" = "y" ] || targets="* bin/$board\n$targets"
 	[ "$xbmk_release" = "y" ] && mkrom_tarball "bin/$board" && \
-	targets="* bin/${relname}_$board.tar.xz\n$targets"; return 0
+	    targets="* bin/${relname}_$board.tar.xz\n$targets"; return 0
 }
 
 configure_target()
 {
-	targetdir="${cfgsdir}/${board}"
-	[ -f "${targetdir}/target.cfg" ] || \
-		$err "Missing target.cfg for target: ${board}"
+	targetdir="$cfgsdir/$board"
+	[ -f "$targetdir/target.cfg" ] || $err "$board: target.cfg missing"
 
 	# Override the above defaults using target.cfg
-	. "${targetdir}/target.cfg"
+	. "$targetdir/target.cfg"
 
-	[ -z "${grub_scan_disk}" ] && grub_scan_disk="both"
-	[ "$grub_scan_disk" != "both" ] && [ "$grub_scan_disk" != "ata" ] \
-	    && [ "${grub_scan_disk}" != "ahci" ] && \
-		grub_scan_disk="both"
+	[ -z "$grub_scan_disk" ] && grub_scan_disk="both"
+	[ "$grub_scan_disk" != "both" ] && [ "$grub_scan_disk" != "ata" ] && \
+	    [ "$grub_scan_disk" != "ahci" ] && grub_scan_disk="both"
 
 	[ -z "$tree" ] && $err "$board: tree not defined"
 
-	[ "${payload_memtest}" != "y" ] && payload_memtest="n"
+	[ "$payload_memtest" != "y" ] && payload_memtest="n"
 	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"
 
-	[ "${payload_grub_withseabios}" = "y" ] && payload_grub="y"
-	[ "${payload_grub_withseabios}" = "y" ] && \
+	[ "$payload_grub_withseabios" = "y" ] && payload_grub="y"
+	[ "$payload_grub_withseabios" = "y" ] && \
 		eval "$(setvars "y" payload_seabios payload_seabios_withgrub)"
 	[ "$payload_seabios_withgrub" = "y" ] && payload_seabios="y"
 	[ "$payload_seabios_grubonly" = "y" ] && payload_seabios="y"
@@ -183,8 +169,7 @@ configure_target()
 	# The reverse logic must not be applied. If SeaBIOS-with-GRUB works,
 	# that doesn't mean GRUB-with-SeaBIOS will, e.g. VGA ROM execution
 	[ "$payload_grub" != "y" ] && [ "$payload_seabios" != "y" ] && \
-	    [ "${payload_uboot}" != "y" ] && \
-		$err "target '$board' defines no payload"
+	    [ "$payload_uboot" != "y" ] && $err "'$board' defines no payload"
 
 	[ "$payload_uboot" != "n" ] && [ "$payload_uboot" != "y" ] && \
 		payload_uboot="n"
@@ -192,32 +177,32 @@ configure_target()
 		uboot_config="default"
 
 	# Override all payload directives with cmdline args
-	[ -z "${_payload}" ] && return 0
+	[ -z "$_payload" ] && return 0
 	eval "$(setvars "n" payload_grub payload_memtest payload_seabios \
 	    payload_seabios_withgrub payload_uboot payload_grub_withseabios \
 	    payload_seabios_grubonly)"
-	eval "payload_${_payload}=y"
+	eval "payload_$_payload=y"
 }
 
 build_payloads()
 {
-	romdir="bin/${board}"
-	cbdir="src/coreboot/${board}"
-	[ "${board}" = "${tree}" ] || cbdir="src/coreboot/${tree}"
-	cbfstool="cbutils/${tree}/cbfstool"
-	cbrom="${cbdir}/build/coreboot.rom"
+	romdir="bin/$board"
+	cbdir="src/coreboot/$board"
+	[ "$board" = "$tree" ] || cbdir="src/coreboot/$tree"
+	cbfstool="cbutils/$tree/cbfstool"
+	cbrom="$cbdir/build/coreboot.rom"
 
 	[ -f "$cbfstool" ] || x_ ./update trees -b coreboot utils $tree
 
-	memtest_bin="memtest86plus/build64/memtest.bin"
-	[ "${payload_memtest}" != "y" ] || [ -f "src/${memtest_bin}" ] || \
+	mt86bin="memtest86plus/build64/memtest.bin"
+	[ "$payload_memtest" != "y" ] || [ -f "src/$mt86bin" ] || \
 		x_ ./update trees -b memtest86plus
 
 	[ "$payload_seabios" = "y" ] && x_ ./update trees -b seabios
 	if [ "$payload_grub" = "y" ] || [ "$payload_seabios_withgrub" = "y" ] \
 	    || [ "$payload_seabios_grubonly" = "y" ]; then build_grub_payload
 	fi
-	[ "${payload_uboot}" = "y" ] && build_uboot_payload; return 0
+	[ "$payload_uboot" = "y" ] && build_uboot_payload; return 0
 }
 
 build_grub_payload()
@@ -225,234 +210,222 @@ build_grub_payload()
 	x_ mkdir -p elf/grub
 
 	for keymapfile in config/grub/keymap/*.gkb; do
-		[ -f "${keymapfile}" ] || continue
-
-		keymaps="${keymaps} ${keymapfile}"
+		[ -f "$keymapfile" ] && keymaps="$keymaps $keymapfile"
 	done
 	[ -z "$_keyboard" ] || [ -f "$grubcfgsdir/keymap/$_keyboard.gkb" ] || \
 		$err "build_grub_payload: $_keyboard layout not defined"
-	[ -n "$_keyboard" ] && keymaps="${grubcfgsdir}/keymap/${_keyboard}.gkb"
+	[ -n "$_keyboard" ] && keymaps="$grubcfgsdir/keymap/$_keyboard.gkb"
 	[ -f "$grubelf" ] && return 0
 	[ -f "src/grub/grub-mkstandalone" ] || x_ ./update trees -b grub
 
 	./src/grub/grub-mkstandalone --grub-mkimage="src/grub/grub-mkimage" \
 	    -O i386-coreboot -o "elf/grub/grub.elf" -d "src/grub/grub-core/" \
-	    --fonts= --themes= --locales=  --modules="${grub_modules}" \
-	    --install-modules="${grub_install_modules}" \
-	    "/boot/grub/grub.cfg=${grubcfgsdir}/config/grub_memdisk.cfg" \
-	    "/boot/grub/grub_default.cfg=${grubcfgsdir}/config/grub.cfg" || \
+	    --fonts= --themes= --locales=  --modules="$grub_modules" \
+	    --install-modules="$grub_install_modules" \
+	    "/boot/grub/grub.cfg=$grubcfgsdir/config/grub_memdisk.cfg" \
+	    "/boot/grub/grub_default.cfg=$grubcfgsdir/config/grub.cfg" || \
 	    $err "could not generate grub.elf"
 }
 
 build_uboot_payload()
 {
-	x_ ./update trees -b u-boot ${board}
-	ubdir="elf/u-boot/${board}/${uboot_config}"
-	ubootelf="${ubdir}/u-boot.elf"
-	[ ! -f "${ubootelf}" ] && [ -f "${ubdir}/u-boot" ] && \
-		ubootelf="${ubdir}/u-boot"
-	[ -f "${ubootelf}" ] || $err "$board: Can't find u-boot"; return 0
+	x_ ./update trees -b u-boot $board
+	ubdir="elf/u-boot/$board/$uboot_config"
+	ubootelf="$ubdir/u-boot.elf"
+	[ ! -f "$ubootelf" ] && [ -f "$ubdir/u-boot" ] && \
+		ubootelf="$ubdir/u-boot"
+	[ -f "$ubootelf" ] || $err "$board: Can't find u-boot"; return 0
 }
 
 build_target_mainboard()
 {
-	x_ rm -Rf "${romdir}"
+	x_ rm -Rf "$romdir"
 
 	for x in "normal" "vgarom" "libgfxinit"; do
-		initmode="${x}"
+		initmode="$x"
 		hmode="vesafb"
-		[ "${initmode}" = "vgarom" ] || hmode="corebootfb"
-		modes="${hmode} txtmode"
-		[ -z "${_displaymode}" ] || modes="${_displaymode}"
-		for y in ${modes}; do
-			displaymode="${y}"
-			[ "${initmode}" = "normal" ] && \
+		[ "$initmode" = "vgarom" ] || hmode="corebootfb"
+		modes="$hmode txtmode"
+		[ -z "$_displaymode" ] || modes="$_displaymode"
+		for y in $modes; do
+			displaymode="$y"
+			[ "$initmode" = "normal" ] && \
 			    [ "$displaymode" != "txtmode" ] && continue
-			cbcfg="${targetdir}/config/${initmode}_${displaymode}"
-			[ "${initmode}" = "normal" ] && cbcfg="${cbcfg%_*}"
-			build_roms "${cbcfg}"
-			x_ rm -f "$cbrom"
+			cbcfg="$targetdir/config/${initmode}_$displaymode"
+			[ "$initmode" = "normal" ] && cbcfg="${cbcfg%_*}"
+			build_roms "$cbcfg"; x_ rm -f "$cbrom"
 		done
 	done
 }
 
 build_roms()
 {
-	cbcfg="${1}"
-	if [ ! -f "${cbcfg}" ]; then
-		printf "'%s' does not exist. Skipping build for %s %s %s\n" \
-		    "$cbcfg" "$board" "$displaymode" "$initmode" 1>&2
-		return 0
-	fi
+	cbcfg="$1"
+	e "$cbcfg" f not && return 0
 
-	x_ ./update trees -b coreboot ${board}
+	x_ ./update trees -b coreboot $board
 
 	_cbrom="elf/coreboot_nopayload_DO_NOT_FLASH"
-	_cbrom="${_cbrom}/${board}/${initmode}_${displaymode}"
-	[ "${initmode}" = "normal" ] && \
-		_cbrom="${_cbrom%"_${displaymode}"}"
-	_cbrom="${_cbrom}/coreboot.rom"
+	_cbrom="$_cbrom/$board/${initmode}_$displaymode"
+	[ "$initmode" = "normal" ] && _cbrom="${_cbrom%"_$displaymode"}"
+	_cbrom="$_cbrom/coreboot.rom"
 	cbrom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
-	x_ cp "${_cbrom}" "${cbrom}"
+	x_ cp "$_cbrom" "$cbrom"
 
-	[ "${payload_memtest}" != "y" ] || \
-		x_ "${cbfstool}" "${cbrom}" add-payload \
-		    -f "src/${memtest_bin}" -n img/memtest -c lzma
-	[ "${payload_seabios}" = "y" ] && build_seabios_roms
+	[ "$payload_memtest" != "y" ] || x_ "$cbfstool" "$cbrom" add-payload \
+	    -f "src/$mt86bin" -n img/memtest -c lzma
+	[ "$payload_seabios" = "y" ] && build_seabios_roms
 	[ "$payload_grub" != "y" ] || x_ build_grub_roms "$cbrom" "grub"
-	[ "${payload_uboot}" = "y" ] || return 0
-	x_ cp "${_cbrom}" "${cbrom}"
+	[ "$payload_uboot" = "y" ] || return 0
+	x_ cp "$_cbrom" "$cbrom"
 	build_uboot_roms
 }
 
 build_seabios_roms()
 {
-	if [ "${payload_seabios_withgrub}" = "y" ]; then
-		t=$(mktemp -t coreboot_rom.XXXXXXXXXX)
-		x_ cp "${cbrom}" "${t}"
-		x_ build_grub_roms "${t}" "seabios_withgrub"
+	if [ "$payload_seabios_withgrub" = "y" ]; then
+		t="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
+		x_ cp "$cbrom" "$t"
+		x_ build_grub_roms "$t" "seabios_withgrub"
 	else
-		t=$(mkSeabiosRom "${cbrom}" "fallback/payload") || \
+		t="$(mkSeabiosRom "$cbrom" "fallback/payload")" || \
 		    $err "build_seabios_roms: cannot build tmprom"
-		newrom="${romdir}/seabios_${board}_${initmode}_${displaymode}"
-		[ "${initmode}" = "normal" ] && newrom="${romdir}/seabios" \
-			&& newrom="${newrom}_${board}_${initmode}"
-		x_ copyrom "${t}" "${newrom}.rom"
+		newrom="$romdir/seabios_${board}_${initmode}_$displaymode"
+		[ "$initmode" = "normal" ] && newrom="$romdir/seabios" \
+			&& newrom="${newrom}_${board}_$initmode"
+		x_ cprom "$t" "$newrom.rom"
 	fi
-	x_ rm -f "${t}"
+	x_ rm -f "$t"
 }
 
 # Make separate ROM images with GRUB payload, for each supported keymap
 build_grub_roms()
 {
-	tmprom="${1}"
-	payload1="${2}" # allow values: grub, seabios, seabios_withgrub
+	tmprom="$1"
+	payload1="$2" # allow values: grub, seabios, seabios_withgrub
 
 	grub_cbfs="fallback/payload"
 	if [ "$payload1" = "grub" ] && [ "$payload_grub_withseabios" = "y" ]
 	then
-		_tmpmvrom=$(mkSeabiosRom "$tmprom" "seabios.elf") || \
+		_tmpmvrom="$(mkSeabiosRom "$tmprom" "seabios.elf")" || \
 		    $err "build_grub_roms 1 $board: can't build tmprom"
 		x_ mv "$_tmpmvrom" "$tmprom"
 	elif [ "$payload1" != "grub" ] && [ "$payload_seabios_withgrub" = "y" ]
 	then
 		grub_cbfs="img/grub2"
-		_tmpmvrom=$(mkSeabiosRom "$tmprom" fallback/payload) || \
+		_tmpmvrom="$(mkSeabiosRom "$tmprom" fallback/payload)" || \
 		    $err "build_grub_roms 2 $board: can't build tmprom"
 		x_ mv "$_tmpmvrom" "$tmprom"
 	fi
 
 	# we only need insert grub.elf once, for each coreboot config:
-	x_ "${cbfstool}" "${tmprom}" add-payload -f "${grubelf}" \
-	    -n ${grub_cbfs} -c lzma
+	x_ "$cbfstool" "$tmprom" add-payload -f "$grubelf" \
+	    -n "$grub_cbfs" -c lzma
 
 	# we only need insert background.png once, for each coreboot config:
-	if [ "${displaymode}" = "vesafb" ] || \
-	    [ "${displaymode}" = "corebootfb" ]; then
-		backgroundfile="config/grub/background/${grub_background}"
-		"${cbfstool}" "${tmprom}" add -f ${backgroundfile} \
-		    -n background.png -t raw || \
-		    $err "insert background, ${backgroundfile}"
+	if [ "$displaymode" = "vesafb" ] || \
+	    [ "$displaymode" = "corebootfb" ]; then
+		backgroundfile="config/grub/background/$grub_background"
+		"$cbfstool" "$tmprom" add -f "$backgroundfile" -n \
+		    background.png -t raw || $err "!bg, $backgroundfile"
 	fi
 
-	tmpcfg=$(mktemp -t coreboot_rom.XXXXXXXXXX)
-	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" >"$tmpcfg" \
-	    || $err "set grub_scandisk, $grub_scan_disk, $tmpcfg"
-	[ "${grub_scan_disk}" = "both" ] || \
+	tmpcfg="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
+	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" > "$tmpcfg" || \
+	    $err "set grub_scandisk, $grub_scan_disk, $tmpcfg"
+	[ "$grub_scan_disk" = "both" ] || \
 	    x_ "$cbfstool" "$tmprom" add -f "$tmpcfg" -n scan.cfg -t raw
-	printf "set timeout=%s\n" "${grub_timeout}" > "${tmpcfg}" || \
-	    $err "set timeout, ${grub_timeout}, ${tmpcfg}"
-	[ -z "${grub_timeout}" ] || x_ "${cbfstool}" "${tmprom}" add \
-	    -f "${tmpcfg}" -n timeout.cfg -t raw
-	x_ rm -f "${tmpcfg}"
+	printf "set timeout=%s\n" "$grub_timeout" > "$tmpcfg" || \
+	    $err "set timeout, $grub_timeout, $tmpcfg"
+	[ -z "$grub_timeout" ] || x_ "$cbfstool" "$tmprom" add \
+	    -f "$tmpcfg" -n timeout.cfg -t raw
+	x_ rm -f "$tmpcfg"
 
-	for keymapfile in ${keymaps}; do
-		[ -f "${keymapfile}" ] || continue
+	for keymapfile in $keymaps; do
+		[ -f "$keymapfile" ] || continue
 		keymap="${keymapfile##*/}"
 		keymap="${keymap%.gkb}"
 
 		tmpgrubrom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
-		x_ cp "${tmprom}" "${tmpgrubrom}"
+		x_ cp "$tmprom" "$tmpgrubrom"
 		x_ "$cbfstool" "$tmpgrubrom" add -f "$keymapfile" \
 		    -n keymap.gkb -t raw
 
-		newrom="${romdir}/${payload1}_${board}_${initmode}_"
-		newrom="${newrom}${displaymode}_${keymap}.rom"
-		[ "${initmode}" = "normal" ] && \
-			newrom="${romdir}/${payload1}_${board}_" && \
-			newrom="${newrom}${initmode}_${keymap}.rom"
-		x_ copyrom "${tmpgrubrom}" "${newrom}"
-		if [ "${payload_seabios_grubonly}" = "y" ]; then
+		newrom="$romdir/${payload1}_${board}_${initmode}_"
+		newrom="$newrom${displaymode}_$keymap.rom"
+		[ "$initmode" = "normal" ] && newrom="$romdir/${payload1}_" \
+		    && newrom="$newrom${board}_${initmode}_$keymap.rom"
+		x_ cprom "$tmpgrubrom" "$newrom"
+		if [ "$payload_seabios_grubonly" = "y" ]; then
 			x_ "$cbfstool" "$tmpgrubrom" add \
 			    -f "config/grub/bootorder" -n bootorder -t raw
-			x_ copyrom "$tmpgrubrom" "${newrom%.rom}_grubfirst.rom"
+			x_ cprom "$tmpgrubrom" "${newrom%.rom}_grubfirst.rom"
 			x_ "$cbfstool" "$tmpgrubrom" add-int -i 0 \
 			    -n etc/show-boot-menu
-			x_ copyrom "$tmpgrubrom" "${newrom%.rom}_grubonly.rom"
+			x_ cprom "$tmpgrubrom" "${newrom%.rom}_grubonly.rom"
 		fi
-		x_ rm -f "${tmpgrubrom}"
+		x_ rm -f "$tmpgrubrom"
 	done
 }
 
 # make a rom in /tmp/ and then print the path of that ROM
 mkSeabiosRom() {
-	_cbrom="${1}" # rom to insert seabios in. will not be touched
+	_cbrom="$1" # rom to insert seabios in. will not be touched
 		# (a tmpfile will be made instead)
-	_seabios_cbfs_path="${2}" # e.g. fallback/payload
-	_seabioself="elf/seabios/default/${initmode}/bios.bin.elf"
-	tmprom=$(mktemp -t coreboot_rom.XXXXXXXXXX)
+	_seabios_cbfs_path="$2" # e.g. fallback/payload
+	_seabioself="elf/seabios/default/$initmode/bios.bin.elf"
+	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 
-	x_ cp "${_cbrom}" "${tmprom}"
+	x_ cp "$_cbrom" "$tmprom"
 	x_ "$cbfstool" "$tmprom" add-payload -f "$_seabioself" \
-	    -n "${_seabios_cbfs_path}" -c lzma
+	    -n "$_seabios_cbfs_path" -c lzma
 	x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
 
 	z="2"; [ "$initmode" = "vgarom" ] && z="0"
 	x_ "$cbfstool" "$tmprom" add-int -i $z -n etc/pci-optionrom-exec
 	x_ "$cbfstool" "$tmprom" add-int -i 0 -n etc/optionroms-checksum
-	[ "$initmode" != "libgfxinit" ] || \
-		x_ "$cbfstool" "$tmprom" add -f "$seavgabiosrom" \
-		    -n vgaroms/seavgabios.bin -t raw
+	[ "$initmode" != "libgfxinit" ] || x_ "$cbfstool" "$tmprom" add -f \
+	    "$seavgabiosrom" -n vgaroms/seavgabios.bin -t raw
 
-	printf "%s\n" "${tmprom}"
+	printf "%s\n" "$tmprom"
 }
 
 build_uboot_roms()
 {
-	tmprom=$(mkUbootRom "${cbrom}" "fallback/payload") || \
+	tmprom="$(mkUbootRom "$cbrom" "fallback/payload")" || \
 	    $err "build_uboot_roms $board: could not create tmprom"
-	newrom="${romdir}/uboot_payload_${board}_${initmode}_${displaymode}.rom"
-	x_ copyrom "${tmprom}" "${newrom}"
-	x_ rm -f "${tmprom}"
+	newrom="$romdir/uboot_payload_${board}_${initmode}_$displaymode.rom"
+	x_ cprom "$tmprom" "$newrom"
+	x_ rm -f "$tmprom"
 }
 
 # make a rom in /tmp/ and then print the path of that ROM
 mkUbootRom() {
-	_cbrom="${1}"
-	_uboot_cbfs_path="${2}"
+	_cbrom="$1"
+	_uboot_cbfs_path="$2"
 
-	_ubdir="elf/u-boot/${board}/${uboot_config}"
-	_ubootelf="${_ubdir}/u-boot.elf"
-	[ -f "${_ubootelf}" ] || _ubootelf="${_ubdir}/u-boot"
+	_ubdir="elf/u-boot/$board/$uboot_config"
+	_ubootelf="$_ubdir/u-boot.elf"
+	[ -f "$_ubootelf" ] || _ubootelf="$_ubdir/u-boot"
 	[ -f "$_ubootelf" ] || $err "mkUbootRom: $board: cant find u-boot"
 
-	tmprom=$(mktemp -t coreboot_rom.XXXXXXXXXX)
+	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 
-	x_ cp "${_cbrom}" "${tmprom}"
+	x_ cp "$_cbrom" "$tmprom"
 	x_ "$cbfstool" "$tmprom" add-payload -f "$_ubootelf" \
-	    -n "${_uboot_cbfs_path}" -c lzma
+	    -n "$_uboot_cbfs_path" -c lzma
 
-	printf "%s\n" "${tmprom}"
+	printf "%s\n" "$tmprom"
 }
 
-copyrom()
+cprom()
 {
 	printf "Creating target image: %s\n" "$2"
 
 	x_ mkdir -p "${2%/*}"
 	x_ cp "$1" "$2"
-	[ "$xbmk_release" = "y" ] && mksha512sum "${2}" "vendorhashes" && \
-	x_ ./vendor inject -r "${2}" -b "$board" -n nuke; return 0
+	[ "$xbmk_release" = "y" ] && mksha512sum "$2" "vendorhashes" && \
+	    x_ ./vendor inject -r "$2" -b "$board" -n nuke; return 0
 }
 
 main $@
diff --git a/script/trees b/script/trees
index 7da762e8..1c2a3843 100755
--- a/script/trees
+++ b/script/trees
@@ -1,23 +1,23 @@
 #!/usr/bin/env sh
 # SPDX-License-Identifier: GPL-3.0-or-later
-# SPDX-FileCopyrightText: 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
-# SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# SPDX-FileCopyrightText: 2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
+# Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
+# Copyright (c) 2023-2024 Leah Rowe <leah@libreboot.org>
 
 set -u -e
 
 . "include/option.sh"
 . "include/git.sh"
 
-eval "$(setvars "" xarch cfgsdir codedir config config_name xlang mode \
-    elfdir listfile project target target_dir targets tree _f target1 \
-    bootstrapargs autoconfargs cmakedir makeargs autogenargs xtree)"
+eval "$(setvars "" xarch cfgsdir cdir config config_name xlang mode makeargs \
+    listfile project target target_dir targets tree _f target1 bootstrapargs \
+    autoconfargs cmakedir elfdir autogenargs xtree)"
 
 main()
 {
 	while getopts f:b:m:u:c:x:s:l:n: option; do
-		_f="${1}"
-		case "${1}" in
+		_f="$1"
+		case "$1" in
 		-b) : ;;
 		-u) mode="oldconfig" ;;
 		-m) mode="menuconfig" ;;
@@ -33,13 +33,13 @@ main()
 	done
 	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
 	[ -z "$project" ] && $err "project name not specified"
-	elfdir="elf/${project}"
-	cfgsdir="config/${project}"
+	elfdir="elf/$project"
+	cfgsdir="config/$project"
 
 	remkdir "${tmpgit%/*}"
 
 	_cmd="build_projects"
-	[ -f "config/${project}/build.list" ] && _cmd="build_targets"
+	[ -f "config/$project/build.list" ] && _cmd="build_targets"
 	$_cmd $@
 }
 
@@ -52,8 +52,8 @@ build_projects()
 
 	load_project_config "$cfgsdir"
 
-	codedir="src/${project}"
-	[ -d "$codedir" ] || x_ ./update trees -f "$project"
+	cdir="src/${project}"
+	[ -d "$cdir" ] || x_ ./update trees -f "$project"
 
 	[ "$mode" = "distclean" ] && mode="clean"
 	run_make_command || return 0
@@ -66,15 +66,13 @@ build_targets()
 
 	[ -d "$cfgsdir" ] || $err "directory, $cfgsdir, does not exist"
 
-	listfile="${cfgsdir}/build.list"
+	listfile="$cfgsdir/build.list"
 	[ -f "$listfile" ] || $err "list file, $listfile, does not exist"
 
 	# Build for all targets if no argument is given
 	[ $# -gt 0 ] && target1="$1"
-	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && \
-		shift 1
-	targets=$(items "$cfgsdir") || \
-	    $err "Cannot get options for $cfgsdir"
+	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && shift 1
+	targets="$(items "$cfgsdir")" || $err "Can't get options for $cfgsdir"
 	[ $# -gt 0 ] && targets=$@
 
 	[ -z "$mode" ] && x_ mkdir -p "$elfdir"
@@ -84,17 +82,15 @@ build_targets()
 handle_targets()
 {
 	for x in $targets; do
-		target="${x}"
-		printf "Running 'make %s' for project '%s, target '%s''\n" \
-		    "$mode" "$project" "$target"
+		target="$x"
+		printf "'make %s', '%s', '%s'\n" "$mode" "$project" "$target"
 		[ "$project" != "coreboot" ] || [ -n "$mode" ] || \
-		    [ "$target1" = "utils" ] || \
-			x_ ./vendor download $target
+		    [ "$target1" = "utils" ] || x_ ./vendor download $target
 		x_ handle_defconfig
 	done
 
 	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
-	[ -z "${mode}" ] && printf "Done! Check  %s/\n\n" "$elfdir"; return 0
+	[ -z "$mode" ] && printf "Done! Check  %s/\n\n" "$elfdir"; return 0
 }
 
 handle_defconfig()
@@ -104,13 +100,10 @@ handle_defconfig()
 	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && \
 		eval "handle_coreboot_utils \"$tree\"; return 0"
 
-	for y in "${target_dir}/config"/*; do
+	for y in "$target_dir/config"/*; do
 		[ -f "$y" ] || continue
 		config="$y"
-		config_name="${config#"${target_dir}/config/"}"
-
-		printf "handle/make/config %s %s: handling config %s\n" \
-		    "$project" "$target" "$config_name"
+		config_name="${config#"$target_dir/config/"}"
 
 		[ -n "$mode" ] || check_config || continue
 		handle_makefile
@@ -120,23 +113,20 @@ handle_defconfig()
 
 handle_src_tree()
 {
-	target_dir="${cfgsdir}/${target}"
+	target_dir="$cfgsdir/$target"
 	[ "$mode" = "fetch" ] && [ ! -f "CHANGELOG" ] && \
 		eval "fetch_project_trees; return 1;"
 
 	load_project_config "$target_dir"
-
-	x_ mkdir -p "${elfdir}/${target}"
+	x_ mkdir -p "$elfdir/$target"
 
 	[ -z "$tree" ] && $err "handle_src_tree $project/$tree: tree unset"
+	cdir="src/$project/$tree"
 
-	codedir="src/${project}/${tree}"
-
-	if [ ! -d "$codedir" ]; then
+	if [ ! -d "$cdir" ]; then
 		if [ "$mode" = "distclean" ] || \
 		    [ "$mode" = "crossgcc-clean" ]; then
-			printf "Directory %s missing; skipping clean\n" \
-			    "$codedir" 1>&2
+			printf "Directory %s missing; skip\n" "$cdir" 1>&2
 			return 1
 		fi
 		x_ ./update trees -f "$project" "$target"
@@ -148,28 +138,27 @@ handle_src_tree()
 
 load_project_config()
 {
-	eval "$(setvars "" xarch xlang tree bootstrapargs autoconfargs \
-	    xtree tree_depend makeargs)"
+	eval "$(setvars "" xarch xlang tree bootstrapargs autoconfargs xtree \
+	    tree_depend makeargs)"
 
-	[ -f "${1}/target.cfg" ] || return 0
-	. "${1}/target.cfg" || \
-	    $err "load_project_config ${1}: cannot load target.cfg"; return 0
+	[ -f "$1/target.cfg" ] || return 0
+	. "$1/target.cfg" || $err "loadp $1: can't load target.cfg"; return 0
 }
 
 check_cross_compiler()
 {
 	for _xarch in $xarch; do
-		cbdir="src/coreboot/${tree}"
+		cbdir="src/coreboot/$tree"
 		[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
 		[ -n "$xtree" ] && cbdir="src/coreboot/$xtree"
 
 		x_ ./update trees -f coreboot ${cbdir#src/coreboot/}
 
-		export PATH="${PWD}/${cbdir}/util/crossgcc/xgcc/bin:$PATH"
+		export PATH="$PWD/$cbdir/util/crossgcc/xgcc/bin:$PATH"
 		export CROSS_COMPILE="${xarch% *}-"
-		[ -n "${xlang}" ] && export BUILD_LANGUAGES="$xlang"
+		[ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
 
-		[ -d "${cbdir}/util/crossgcc/xgcc/${_xarch}/" ] && continue
+		[ -d "$cbdir/util/crossgcc/xgcc/$_xarch/" ] && continue
 		x_ make -C "$cbdir" crossgcc-${_xarch%-*} CPUS=$threads \
 		    UPDATED_SUBMODULES=1
 	done
@@ -177,89 +166,78 @@ check_cross_compiler()
 
 check_config()
 {
-	[ -f "$config" ] || $err "check_config: ${project}/${target}: no config"
+	[ -f "$config" ] || $err "check_config $project/$target: no config"
 
-	dest_dir="${elfdir}/${target}/${config_name}"
+	dest_dir="$elfdir/$target/$config_name"
 	# TODO: very hacky check. do it properly (based on build.list)
-	for elftest in "${dest_dir}"/*; do
-		[ -f "$elftest" ] || continue
-		printf "Build already exists, so skipping build\n" 1>&2
-		return 1
+	for elftest in "$dest_dir"/*; do
+		e "$elftest" f && return 1
 	done
 	x_ mkdir -p "$dest_dir"
 }
 
 handle_makefile()
 {
-	x_ make clean -C "$codedir"
-	x_ cp "$config" "${codedir}/.config"
-	[ -n "$mode" ] || make -C "$codedir" silentoldconfig || \
-	    make -C "$codedir" oldconfig || :
+	x_ make clean -C "$cdir" && x_ cp "$config" "$cdir/.config"
+	[ -n "$mode" ] || make -C "$cdir" silentoldconfig || \
+	    make -C "$cdir" oldconfig || :
 
-	run_make_command || $err "handle_makefile $codedir: no makefile!"
+	run_make_command || $err "handle_makefile $cdir: no makefile!"
 
 	_copy=".config"
 	[ "$mode" = "savedefconfig" ] && _copy="defconfig"
-	[ "${mode%config}" = "$mode" ] || x_ cp "$codedir/$_copy" "$config"
+	[ "${mode%config}" = "$mode" ] || x_ cp "$cdir/$_copy" "$config"
 
-	[ -e "${codedir}/.git" ] && [ "$project" = "u-boot" ] && \
-	    [ "$mode" = "distclean" ] && \
-		x_ git -C "$codedir" clean -fdx; return 0
+	[ -e "$cdir/.git" ] && [ "$project" = "u-boot" ] && \
+	    [ "$mode" = "distclean" ] && x_ git -C "$cdir" clean -fdx; return 0
 }
 
 run_make_command()
 {
-	check_cmake "$codedir"
-	[ -z "$mode" ] && check_autoconf "$codedir"
-	check_makefile "$codedir" || return 1
+	check_cmake "$cdir"
+	[ -z "$mode" ] && check_autoconf "$cdir"
+	check_makefile "$cdir" || return 1
 
 	[ "$project" = "coreboot" ] && [ -z "$mode" ] && x_ \
-		printf "%s\n" "${version%%-*}" > "$codedir/.coreboot-version"
+		printf "%s\n" "${version%%-*}" > "$cdir/.coreboot-version" \
+		    && makeargs="$makeargs UPDATED_SUBMODULES=1"
 
-	[ "$project" = "coreboot" ] && \
-		makeargs="$makeargs UPDATED_SUBMODULES=1"
-
-	make -C "$codedir" $mode -j$threads $makeargs || \
-	    $err "run_make $codedir: !make $mode"
+	make -C "$cdir" $mode -j$threads $makeargs || $err "!mk $cdir $mode"
 
 	[ "$mode" != "clean" ] && return 0
-	make -C "$codedir" distclean 2>/dev/null || :
+	make -C "$cdir" distclean 2>/dev/null || :
 }
 
 check_cmake()
 {
-	[ -z "${cmakedir}" ] || \
-		check_makefile "${1}" || \
-		    cmake -B "${1}" "${1}/${cmakedir}" || \
-		    check_makefile "${1}" || \
-		    $err "check_cmake ${1}: can't cmake ${cmakedir}"
-	[ -z "${cmakedir}" ] || check_makefile "${1}" || \
-		$err "check_cmake ${1}: can't generate Makefile"; return 0
+	[ -z "$cmakedir" ] || check_makefile "$1" || cmake -B "$1" \
+	    "$1/$cmakedir" || check_makefile "$1" || $err "$1: !cmk $cmakedir"
+	[ -z "$cmakedir" ] || check_makefile "$1" || \
+		$err "check_cmake $1: can't generate Makefile"; return 0
 }
 
 check_autoconf()
 {
 	(
-	cd "${1}" || $err "!cd $1"
+	cd "$1" || $err "!cd $1"
 	[ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs
-	[ -f "autogen.sh" ] && x_ ./autogen.sh ${autogenargs}
+	[ -f "autogen.sh" ] && x_ ./autogen.sh $autogenargs
 	[ -f "configure" ] && x_ ./configure $autoconfargs; return 0
 	) || $err "can't bootstrap project: $1"
 }
 
 check_makefile()
 {
-	[ -f "${1}/Makefile" ] || [ -f "${1}/makefile" ] || \
-	    [ -f "${1}/GNUmakefile" ] || return 1; return 0
+	[ -f "$1/Makefile" ] || [ -f "$1/makefile" ] || \
+	    [ -f "$1/GNUmakefile" ] || return 1; return 0
 }
 
 copy_elf()
 {
 	while read -r f; do
-		[ ! -f "${codedir}/$f" ] || \
-			x_ cp "${codedir}/${f}" "$dest_dir"
+		[ -f "$cdir/$f" ] && x_ cp "$cdir/$f" "$dest_dir"
 	done < "$listfile"
-	x_ make clean -C "$codedir"
+	x_ make clean -C "$cdir"
 }
 
 main $@

From dc7b72f3f4403b9e851b8644691521b2d53caee3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 26 May 2024 09:22:39 +0100
Subject: [PATCH 0421/1549] roms: rename bstr variable

i forgot to do this in the recent cleanup. it is now
initialised as a variable named "x"

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/script/roms b/script/roms
index c4b95302..e3f3853c 100755
--- a/script/roms
+++ b/script/roms
@@ -60,9 +60,9 @@ main()
 	[ "$xbmk_release" = "y" ] && x="archives (remember the inject command)"
 
 	[ -z "$targets" ] && $err "No ROM images were compiled"
-	printf "\nROM images available in these %s:\n" "$bstr"
+	printf "\nROM images available in these %s:\n" "$x"
 	eval "printf \"$targets\""
-	printf "^^ ROM images available in these %s.\n\n" "$bstr"
+	printf "^^ ROM images available in these %s.\n\n" "$x"
 
 	printf "DO NOT flash images from elf/ - please use bin/ instead.\n"
 }

From 914852dd4086f54e24b865790b72920c76f70a18 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 26 May 2024 12:10:27 +0100
Subject: [PATCH 0422/1549] rename include/option.sh to include/lib.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build                         | 2 +-
 include/{option.sh => lib.sh} | 0
 script/roms                   | 2 +-
 script/trees                  | 2 +-
 4 files changed, 3 insertions(+), 3 deletions(-)
 rename include/{option.sh => lib.sh} (100%)

diff --git a/build b/build
index 5ae62b23..2877a8fb 100755
--- a/build
+++ b/build
@@ -12,7 +12,7 @@ if [ "./${0##*/}" != "${0}" ] || [ ! -f "build" ] || [ -L "build" ]; then
 	exit 1
 fi
 
-. "include/option.sh"
+. "include/lib.sh"
 . "include/vendor.sh"
 . "include/mrc.sh"
 
diff --git a/include/option.sh b/include/lib.sh
similarity index 100%
rename from include/option.sh
rename to include/lib.sh
diff --git a/script/roms b/script/roms
index e3f3853c..3ca0de20 100755
--- a/script/roms
+++ b/script/roms
@@ -8,7 +8,7 @@
 
 set -u -e
 
-. "include/option.sh"
+. "include/lib.sh"
 
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 grub_background="background1280x800.png"
diff --git a/script/trees b/script/trees
index 1c2a3843..6eeac8f1 100755
--- a/script/trees
+++ b/script/trees
@@ -6,7 +6,7 @@
 
 set -u -e
 
-. "include/option.sh"
+. "include/lib.sh"
 . "include/git.sh"
 
 eval "$(setvars "" xarch cfgsdir cdir config config_name xlang mode makeargs \

From 64c64bcf10d5116c4813aa2c0ed76108b448c110 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 26 May 2024 20:30:45 +0100
Subject: [PATCH 0423/1549] flashprog: bump to 5b4fdd1 from 2 May 2024

I've rebased the workaround-mx patch as follows. See:

commit 9a11cbf21a5078bcdb8db7584c44a9ee17020db4
Author: Nico Huber <nico.h@gmx.de>
Date:   Fri Jan 13 01:19:07 2023 +0100

    Let the flash context directly point to the used master

This change, now upstream in flashprog, made me have to do this in
the patch. I changed this:

flash->mst->spi.command(flash, sizeof(cmd), sizeof(buf), cmd, buf);

to this:

flash->mst.spi->command(flash, sizeof(cmd), sizeof(buf), cmd, buf);

It should work fine. This update imports the following upstream
patches from flashprog:

* 5b4fdd1 z60_flashprog.rules: Add udev rule for CH347
* 72c9e40 meson: Check for CPU families with known raw mem access
* 3458220 platform/meson: Port pciutils/pci.h workaround to Meson
* f279762 platform/meson: Check for libi386 on NetBSD
* 14da5f7 README: Convert to Markdown
* 8ddea57 README: Document branching and release policy
* 2522456 util/list_yet_unsupported_chips.sh: Fix path
* cbf9c11 spi: Don't cross 16MiB boundaries with long writes
* 823a704 dediprog: Skip warning on first attempt to read device string
* e8463c8 dediprog: Revise prefix check for given programmer id
* 38af1a1 dediprog: Revise id matching
* 4661e7c amd_spi100: Use flashprog_read_chunked() for progress reporting
* cdcfda2 read_memmapped: Use flashprog_read_chunked() for progress reporting
* 7679b5c spi25: Replace spi_read_chunked() with more abstract version
* ca1c7fd spi25: Normalize parameters of spi_nbyte_read()
* e36e3dc dediprog: Use default_spi_write_256
* 522a86d linux_spi: Use default_spi_read()/_write_256()
* 806509b cli_classic: Turn progress reporting into a progress bar
* 842d678 libflashrom: Return progress state to the library user
* aa714dd flashprog.c: Let select_erase_functions() return byte count
* 2eed4cf serprog: Add SPI Mode and CS Mode commands
* 821a085 dediprog: Implement id reading for SF600 and later
* 274e655 dediprog: Read device string early
* 0057822 dediprog: Add protocol detection for SF700 & SF600Plus-G2
* fb176d2 dediprog: Use more general 4BA write mode for newer protocols
* 0ab5c3d dediprog: Split device type and version parsing
* bdef5c2 dediprog: Use unsigned conversions to parse device string
* 5262e29 dediprog: Try to request 32B device string (instead of 16B)
* e76e21f dediprog: Get rid of some unnecessary hex constants
* 5a09d1e udelay: Lower the sleep vs delay threshold
* 03ad4a4 linux_mtd: Provide no-op delay implementation
* 211c6ec serprog: Refine flushing before synchronization
* 383b7fe serprog: Test synchronicity before trying to synchronize
* d7318ea serprog: Move synchronicity test into separate function
* 9a11cbf Let the flash context directly point to the used master
* aabb3e0 writeprotect: Hook wp functions into the chip driver
* 89569d6 memory_mapped: Reduce `decode_sizes` to a single `max_rom_decode`
* 929d2e1 internal: Pass programmer context down into chipset enables
* 7c717c3 internal: Pass programmer context down into board enables
* e3a2688 Pass programmer context to programmer->init()
* 2b66ad9 Start implementing struct flashprog_programmer
* 4517e92 memory_bus: Drop stale `size == 0` workaround and FIXME
* b197402 memory_bus: Split register mapping into own function
* 0e76d99 memory_bus: Move (un)map_flash_region into par master
* 9eec407 Perform default mapping only for respective chips
* 56b53dd wbsio_spi: Request memory mapping locally
* 5596190 it87spi: Request memory mapping locally
* 46449b4 spi25: Drop stale `bus == SPI` guards
* ab6b18f spi25: Move 4BA preparations into spi_prepare_4ba() hook
* 901fb95 Add prepare/finish_access() hooks for chip drivers
* a96aaa3 dediprog: Support long writes of 16MiB and more
* 1338936 Consider 4BA support when filtering erase functions
* 8d36db6 flashprog.8: Fix up serprog example
* d2ac303 flashprog.8: document new serprog cs parameter
* d1b9153 chipset_enable.c: Add Genoa to mendocino entry

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../0001-Workaround-for-MX25-chips.patch      | 28 +++++++++----------
 config/git/flashprog                          |  2 +-
 2 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch b/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch
index b4fd904b..ddbe90a6 100644
--- a/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch
+++ b/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch
@@ -1,7 +1,7 @@
-From 294433aeac82764ea22caf0c17b05cf4127aaa19 Mon Sep 17 00:00:00 2001
+From 25047d86c478beb58fd7c9a3539b03ea9426edb6 Mon Sep 17 00:00:00 2001
 From: consts <grudnevkv@gmail.com>
 Date: Fri, 2 Mar 2018 07:03:37 +0000
-Subject: [PATCH] Workaround for MX25 chips
+Subject: [PATCH 1/1] Workaround for MX25 chips
 
 TEST: In-system programming a ThinkPad X200 using a clip and
 pico-serprog works now. It just doesn't without this hack.
@@ -17,7 +17,7 @@ Change-Id: I43a306b67862b59c1dcd02729e189f3bf73f481b
  3 files changed, 15 insertions(+)
 
 diff --git a/cli_classic.c b/cli_classic.c
-index 1ffe4dd..3b50d23 100644
+index ab5f8b1..2825033 100644
 --- a/cli_classic.c
 +++ b/cli_classic.c
 @@ -67,6 +67,7 @@ static void cli_classic_usage(const char *name)
@@ -28,29 +28,29 @@ index 1ffe4dd..3b50d23 100644
  #if CONFIG_PRINT_WIKI == 1
  	       " -z | --list-supported-wiki         print supported devices in wiki syntax\n"
  #endif
-@@ -290,6 +291,7 @@ int main(int argc, char *argv[])
- 		{"help",		0, NULL, 'h'},
+@@ -262,6 +263,7 @@ int main(int argc, char *argv[])
  		{"version",		0, NULL, 'R'},
  		{"output",		1, NULL, 'o'},
+ 		{"progress",		0, NULL, OPTION_PROGRESS},
 +		{"workaround-mx", 	0, NULL, 'm'},
  		{NULL,			0, NULL, 0},
  	};
  
-@@ -506,6 +508,9 @@ int main(int argc, char *argv[])
+@@ -478,6 +480,9 @@ int main(int argc, char *argv[])
  				cli_classic_abort_usage("No log filename specified.\n");
  			}
  			break;
 +		case 'm': /* --workaround-mx */
 +			workaround_mx = 1;
 +			break;
- 		default:
- 			cli_classic_abort_usage(NULL);
+ 		case OPTION_PROGRESS:
+ 			show_progress = true;
  			break;
 diff --git a/include/programmer.h b/include/programmer.h
-index 4fee2ef..7e78598 100644
+index edef52b..722e599 100644
 --- a/include/programmer.h
 +++ b/include/programmer.h
-@@ -355,6 +355,7 @@ enum ich_chipset {
+@@ -356,6 +356,7 @@ enum ich_chipset {
  	CHIPSET_GEMINI_LAKE,
  	CHIPSET_ELKHART_LAKE,
  };
@@ -59,7 +59,7 @@ index 4fee2ef..7e78598 100644
  /* ichspi.c */
  #if CONFIG_INTERNAL == 1
 diff --git a/spi.c b/spi.c
-index 6e61f53..f8f5d11 100644
+index ac51d87..be62588 100644
 --- a/spi.c
 +++ b/spi.c
 @@ -26,10 +26,19 @@
@@ -76,12 +76,12 @@ index 6e61f53..f8f5d11 100644
 +		const unsigned char cmd[JEDEC_READ_OUTSIZE] = {JEDEC_READ, 0, 0, 0};
 +		unsigned char buf[256];
 +		/* keep flash busy for some time, keep CS warm before sending actual command */
-+		flash->mst->spi.command(flash, sizeof(cmd), sizeof(buf), cmd, buf);
++		flash->mst.spi->command(flash, sizeof(cmd), sizeof(buf), cmd, buf);
 +	}
 +	/* actual command */
- 	return flash->mst->spi.command(flash, writecnt, readcnt, writearr,
+ 	return flash->mst.spi->command(flash, writecnt, readcnt, writearr,
  				       readarr);
  }
 -- 
-2.43.0
+2.39.2
 
diff --git a/config/git/flashprog b/config/git/flashprog
index 12105361..98a0539b 100644
--- a/config/git/flashprog
+++ b/config/git/flashprog
@@ -1,5 +1,5 @@
 {flashprog}{
-	rev: ddb6d926783d4f9cbee04c7392718ed8f89daa0e
+	rev: 5b4fdd11dd74c7f018cb04f7a27a2badc02fe182
 	loc: flashprog
 	url: https://review.sourcearcade.org/flashprog
 	bkup_url: https://github.com/SourceArcade/flashprog.git

From ec761c88f213171a50daa187c9e884e39cfdad8f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 May 2024 14:24:26 +0100
Subject: [PATCH 0424/1549] coreboot: only run GRUB as a secondary payload

See:
https://codeberg.org/libreboot/lbmk/issues/216

Almost all users will be OK running GRUB, but a
minority of users have experienced a fatal error
pertaining to grub_free() or grub_realloc() (as
my investigation of GRUB sources reveal when grepping
the error reported in the link above).

We don't yet know what the bug is, only that the
error occurs, leading to an effective brick if the
user has GRUB as their primary payload.

So far, it has only been reported on some Intel
SandyBridge-based Dell Latitudes in Libreboot, but
we can't be too sure.

The user reported that memtest86+ passes just fine,
and SeaBIOS works; BIOS GRUB also works, which means
that the bug is likely only in an area of GRUB that
runs specifically on the coreboot payload, so it's
probably a driver in GRUB when running on the metal
rather than BIOS/UEFI.

The build system supports a configuration whereby
SeaBIOS is the primary payload, but GRUB is available
in the SeaBIOS boot select menu, and an additional
configuration is available where GRUB is what SeaBIOS
executes first (while still providing boot select);
both of these are now the *only* configurations
available, on all x86 targets except QEMU.

The QEMU target is fine because if the bug occurs there,
you can just close QEMU and try a different image.

Even after this bug is later identified and fixed,
the GRUB source code is vastly over-engineered and there
are likely many more such bugs. SeaBIOS is a reliable
payload; the code is small and robust. Remember always:

Code

equals

bugs

Therefore, this configuration change is likely going
to be permanent. This will apply in the next release.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/d510mo/target.cfg               | 2 --
 config/coreboot/d945gclf_512kb/target.cfg       | 3 ---
 config/coreboot/d945gclf_8mb/target.cfg         | 4 +---
 config/coreboot/dell9020mt-nri_12mb/target.cfg  | 1 -
 config/coreboot/dell9020sff-nri_12mb/target.cfg | 1 -
 config/coreboot/e5420_6mb/target.cfg            | 5 +----
 config/coreboot/e5520_6mb/target.cfg            | 5 +----
 config/coreboot/e5530_12mb/target.cfg           | 5 +----
 config/coreboot/e6400_4mb/target.cfg            | 5 +----
 config/coreboot/e6400nvidia_4mb/target.cfg      | 5 +----
 config/coreboot/e6420_10mb/target.cfg           | 5 +----
 config/coreboot/e6430_12mb/target.cfg           | 5 +----
 config/coreboot/e6520_10mb/target.cfg           | 5 +----
 config/coreboot/e6530_12mb/target.cfg           | 5 +----
 config/coreboot/haswell/target.cfg              | 1 -
 config/coreboot/hp2170p_16mb/target.cfg         | 3 +--
 config/coreboot/hp2560p_8mb/target.cfg          | 3 +--
 config/coreboot/hp2570p_16mb/target.cfg         | 3 +--
 config/coreboot/hp820g2_12mb/target.cfg         | 3 +--
 config/coreboot/hp8460pintel_8mb/target.cfg     | 3 +--
 config/coreboot/hp8470pintel_16mb/target.cfg    | 3 +--
 config/coreboot/hp8560w_8mb/target.cfg          | 2 +-
 config/coreboot/hp9470m_16mb/target.cfg         | 3 +--
 config/coreboot/kcma-d8-rdimm_16mb/target.cfg   | 5 +++--
 config/coreboot/kcma-d8-rdimm_2mb/target.cfg    | 4 ++--
 config/coreboot/kcma-d8-udimm_16mb/target.cfg   | 5 +++--
 config/coreboot/kcma-d8-udimm_2mb/target.cfg    | 5 +++--
 config/coreboot/macbook11/target.cfg            | 3 +--
 config/coreboot/macbook11_16mb/target.cfg       | 3 +--
 config/coreboot/macbook21/target.cfg            | 3 +--
 config/coreboot/macbook21_16mb/target.cfg       | 3 +--
 config/coreboot/r400_16mb/target.cfg            | 3 +--
 config/coreboot/r400_4mb/target.cfg             | 3 +--
 config/coreboot/r400_8mb/target.cfg             | 3 +--
 config/coreboot/r500_4mb/target.cfg             | 3 +--
 config/coreboot/t1650_12mb/target.cfg           | 1 -
 config/coreboot/t400_16mb/target.cfg            | 3 +--
 config/coreboot/t400_4mb/target.cfg             | 3 +--
 config/coreboot/t400_8mb/target.cfg             | 3 +--
 config/coreboot/t420_8mb/target.cfg             | 3 +--
 config/coreboot/t420s_8mb/target.cfg            | 3 +--
 config/coreboot/t430_12mb/target.cfg            | 3 +--
 config/coreboot/t440plibremrc_12mb/target.cfg   | 3 +--
 config/coreboot/t500_16mb/target.cfg            | 3 +--
 config/coreboot/t500_4mb/target.cfg             | 3 +--
 config/coreboot/t500_8mb/target.cfg             | 3 +--
 config/coreboot/t520_8mb/target.cfg             | 3 +--
 config/coreboot/t530_12mb/target.cfg            | 3 +--
 config/coreboot/t60_16mb_intelgpu/target.cfg    | 3 +--
 config/coreboot/t60_intelgpu/target.cfg         | 3 +--
 config/coreboot/w500_16mb/target.cfg            | 3 +--
 config/coreboot/w500_4mb/target.cfg             | 3 +--
 config/coreboot/w500_8mb/target.cfg             | 3 +--
 config/coreboot/w530_12mb/target.cfg            | 3 +--
 config/coreboot/w541_12mb/target.cfg            | 3 +--
 config/coreboot/x200_16mb/target.cfg            | 3 +--
 config/coreboot/x200_4mb/target.cfg             | 3 +--
 config/coreboot/x200_8mb/target.cfg             | 3 +--
 config/coreboot/x220_8mb/target.cfg             | 3 +--
 config/coreboot/x230_12mb/target.cfg            | 3 +--
 config/coreboot/x230_16mb/target.cfg            | 3 +--
 config/coreboot/x230t_12mb/target.cfg           | 3 +--
 config/coreboot/x230t_16mb/target.cfg           | 3 +--
 config/coreboot/x301_16mb/target.cfg            | 3 +--
 config/coreboot/x301_4mb/target.cfg             | 3 +--
 config/coreboot/x301_8mb/target.cfg             | 3 +--
 config/coreboot/x60/target.cfg                  | 3 +--
 config/coreboot/x60_16mb/target.cfg             | 3 +--
 68 files changed, 69 insertions(+), 151 deletions(-)

diff --git a/config/coreboot/d510mo/target.cfg b/config/coreboot/d510mo/target.cfg
index 65330b75..2be9c81b 100644
--- a/config/coreboot/d510mo/target.cfg
+++ b/config/coreboot/d510mo/target.cfg
@@ -1,7 +1,5 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
 payload_seabios="y"
 payload_memtest="y"
 release="n"
diff --git a/config/coreboot/d945gclf_512kb/target.cfg b/config/coreboot/d945gclf_512kb/target.cfg
index 5843b4e7..cc133e56 100644
--- a/config/coreboot/d945gclf_512kb/target.cfg
+++ b/config/coreboot/d945gclf_512kb/target.cfg
@@ -1,7 +1,4 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
 payload_seabios="y"
-payload_memtest="n"
 release="n"
diff --git a/config/coreboot/d945gclf_8mb/target.cfg b/config/coreboot/d945gclf_8mb/target.cfg
index 5843b4e7..38e5763e 100644
--- a/config/coreboot/d945gclf_8mb/target.cfg
+++ b/config/coreboot/d945gclf_8mb/target.cfg
@@ -1,7 +1,5 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
 payload_seabios="y"
-payload_memtest="n"
+payload_seabios_withgrub="y"
 release="n"
diff --git a/config/coreboot/dell9020mt-nri_12mb/target.cfg b/config/coreboot/dell9020mt-nri_12mb/target.cfg
index 37d8f553..1567769d 100644
--- a/config/coreboot/dell9020mt-nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt-nri_12mb/target.cfg
@@ -2,6 +2,5 @@ tree="haswell"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/dell9020sff-nri_12mb/target.cfg b/config/coreboot/dell9020sff-nri_12mb/target.cfg
index 37d8f553..1567769d 100644
--- a/config/coreboot/dell9020sff-nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff-nri_12mb/target.cfg
@@ -2,6 +2,5 @@ tree="haswell"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index 03fd230b..341e655e 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -1,9 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
 payload_seabios="y"
-payload_memtest="y"
 payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
+payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index 03fd230b..341e655e 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -1,9 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
 payload_seabios="y"
-payload_memtest="y"
 payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
+payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index 03fd230b..341e655e 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -1,9 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
 payload_seabios="y"
-payload_memtest="y"
 payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
+payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index 3a458ee4..8eeb3443 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -1,9 +1,6 @@
 tree="dell"
 xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
 payload_seabios="y"
-payload_memtest="y"
 payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
+payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
index 3a458ee4..8eeb3443 100644
--- a/config/coreboot/e6400nvidia_4mb/target.cfg
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -1,9 +1,6 @@
 tree="dell"
 xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
 payload_seabios="y"
-payload_memtest="y"
 payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
+payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index 03fd230b..341e655e 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -1,9 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
 payload_seabios="y"
-payload_memtest="y"
 payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
+payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index 03fd230b..341e655e 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -1,9 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
 payload_seabios="y"
-payload_memtest="y"
 payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
+payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index 03fd230b..341e655e 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -1,9 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
 payload_seabios="y"
-payload_memtest="y"
 payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
+payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index 03fd230b..341e655e 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -1,9 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
 payload_seabios="y"
-payload_memtest="y"
 payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
+payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/haswell/target.cfg b/config/coreboot/haswell/target.cfg
index a38399e4..69f9bd39 100644
--- a/config/coreboot/haswell/target.cfg
+++ b/config/coreboot/haswell/target.cfg
@@ -1,3 +1,2 @@
 tree="haswell"
 rev="b7341da19133991efd29880849bdaab29a6e243d"
-xarch="i386-elf"
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index fee132f4..0badb4fb 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -1,8 +1,7 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index fee132f4..0badb4fb 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -1,8 +1,7 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index fee132f4..0badb4fb 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -1,8 +1,7 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index 06f3025c..dbcf5a1c 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -1,8 +1,7 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index fee132f4..0badb4fb 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -1,8 +1,7 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index fee132f4..0badb4fb 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -1,8 +1,7 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg
index ae56c735..0badb4fb 100644
--- a/config/coreboot/hp8560w_8mb/target.cfg
+++ b/config/coreboot/hp8560w_8mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
+payload_seabios="y"
 payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index fee132f4..0badb4fb 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -1,8 +1,7 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
index d5d37291..ef9037ec 100644
--- a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
@@ -1,7 +1,8 @@
 tree="fam15h_rdimm"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
 xlang="c"
+grub_timeout=10
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
index d5d37291..641194a7 100644
--- a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
@@ -1,7 +1,7 @@
 tree="fam15h_rdimm"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
 xlang="c"
diff --git a/config/coreboot/kcma-d8-udimm_16mb/target.cfg b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
index 35354c26..d1b31cb5 100644
--- a/config/coreboot/kcma-d8-udimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
@@ -1,8 +1,9 @@
 tree="fam15h_udimm"
 xtree="fam15h_rdimm"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
 xlang="c"
+grub_timout=10
diff --git a/config/coreboot/kcma-d8-udimm_2mb/target.cfg b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
index 35354c26..4940ede3 100644
--- a/config/coreboot/kcma-d8-udimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
@@ -1,8 +1,9 @@
 tree="fam15h_udimm"
 xtree="fam15h_rdimm"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
 xlang="c"
+grub_timeout=10
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index dcf5d1de..043bd365 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -1,6 +1,5 @@
 tree="i945"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index dcf5d1de..043bd365 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -1,6 +1,5 @@
 tree="i945"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index bb56ec25..12e51f9b 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -1,7 +1,6 @@
 tree="i945"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index bb56ec25..12e51f9b 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -1,7 +1,6 @@
 tree="i945"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index e6d3bec6..341e655e 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -2,6 +2,5 @@ tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index 8bb575a9..1567769d 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -1,7 +1,6 @@
 tree="haswell"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 2daf00f7..f8a9c2a2 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -1,7 +1,6 @@
 tree="i945"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 2daf00f7..f8a9c2a2 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -1,7 +1,6 @@
 tree="i945"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index 8bb575a9..1567769d 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -1,7 +1,6 @@
 tree="haswell"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/x230_12mb/target.cfg
+++ b/config/coreboot/x230_12mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/x230t_12mb/target.cfg
+++ b/config/coreboot/x230t_12mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index 8688df3f..341e655e 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index 06f3025c..dbcf5a1c 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -1,8 +1,7 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index 06f3025c..dbcf5a1c 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -1,8 +1,7 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index 06f3025c..dbcf5a1c 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -1,8 +1,7 @@
 tree="default"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 2daf00f7..f8a9c2a2 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -1,7 +1,6 @@
 tree="i945"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 2daf00f7..f8a9c2a2 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -1,7 +1,6 @@
 tree="i945"
 xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 grub_scan_disk="ahci"
 grub_background="background1024x768.png"

From d855408a58921d1a6000af7e60953024f627926d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 May 2024 14:42:16 +0100
Subject: [PATCH 0425/1549] roms: make grubfirst if seabios_withgrub=y

rather than if seabios_grubonly=y

if grubonly=y, still make the grubonly rom

this complements the previous commit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/script/roms b/script/roms
index 3ca0de20..dc3053f4 100755
--- a/script/roms
+++ b/script/roms
@@ -356,13 +356,16 @@ build_grub_roms()
 		[ "$initmode" = "normal" ] && newrom="$romdir/${payload1}_" \
 		    && newrom="$newrom${board}_${initmode}_$keymap.rom"
 		x_ cprom "$tmpgrubrom" "$newrom"
-		if [ "$payload_seabios_grubonly" = "y" ]; then
+		if [ "$payload_seabios_withgrub" = "y" ]; then
 			x_ "$cbfstool" "$tmpgrubrom" add \
 			    -f "config/grub/bootorder" -n bootorder -t raw
 			x_ cprom "$tmpgrubrom" "${newrom%.rom}_grubfirst.rom"
-			x_ "$cbfstool" "$tmpgrubrom" add-int -i 0 \
-			    -n etc/show-boot-menu
-			x_ cprom "$tmpgrubrom" "${newrom%.rom}_grubonly.rom"
+			if [ "$payload_seabios_grubonly" = "y" ]; then
+				x_ "$cbfstool" "$tmpgrubrom" add-int -i 0 \
+				    -n etc/show-boot-menu
+				x_ cprom "$tmpgrubrom" \
+				    "${newrom%.rom}_grubonly.rom"
+			fi
 		fi
 		x_ rm -f "$tmpgrubrom"
 	done

From ff2997d6ec3614b9b307ed14cbcd2fac062141d0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 May 2024 15:05:33 +0100
Subject: [PATCH 0426/1549] minor correction

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/script/roms b/script/roms
index dc3053f4..f79a8e75 100755
--- a/script/roms
+++ b/script/roms
@@ -356,7 +356,8 @@ build_grub_roms()
 		[ "$initmode" = "normal" ] && newrom="$romdir/${payload1}_" \
 		    && newrom="$newrom${board}_${initmode}_$keymap.rom"
 		x_ cprom "$tmpgrubrom" "$newrom"
-		if [ "$payload_seabios_withgrub" = "y" ]; then
+		if [ "$payload_seabios_withgrub" = "y" ] && \
+		    [ "$payload1" != "grub" ]; then
 			x_ "$cbfstool" "$tmpgrubrom" add \
 			    -f "config/grub/bootorder" -n bootorder -t raw
 			x_ cprom "$tmpgrubrom" "${newrom%.rom}_grubfirst.rom"

From c94cecd83751d2df26314a90852f7df306256fb0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 May 2024 15:36:27 +0100
Subject: [PATCH 0427/1549] GRUB: remove XHCI patches for now (will re-add)

Fixes this bug:
https://codeberg.org/libreboot/lbmk/issues/216

Well, fix is the wrong word. We want xHCI ideally.

Mate is working on it as I write this. I've also:

* Disabled CONFIG_FINALIZE_USB_ROUTE_XHCI on Haswell
  boards (coreboot)
* Disabled the GRUB payload on HP 820 G2 for now

We will need to re-add the xHCI patches once fixed.
If Mate/we can't fix it, I'll contact Patrick
Rudolph who originally wrote the xHCI patches.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              |    2 +-
 .../config/libgfxinit_txtmode                 |    2 +-
 .../config/libgfxinit_corebootfb              |    2 +-
 .../config/libgfxinit_txtmode                 |    2 +-
 config/coreboot/hp820g2_12mb/target.cfg       |    1 -
 .../config/libgfxinit_corebootfb              |    2 +-
 .../config/libgfxinit_txtmode                 |    2 +-
 .../w541_12mb/config/libgfxinit_corebootfb    |    2 +-
 .../w541_12mb/config/libgfxinit_txtmode       |    2 +-
 config/grub/modules.list                      |    1 -
 ...b-Parse-SuperSpeed-companion-descrip.patch |  245 --
 .../0002-usb-Add-enum-for-xHCI.patch          |   29 -
 ...rans-Set-default-maximum-packet-size.patch |   33 -
 ...b-Add-function-pointer-for-attach-de.patch |  121 -
 ...b-usbhub-Add-new-private-fields-for-.patch |   77 -
 ...6-grub-core-bus-usb-Add-xhci-support.patch | 2814 -----------------
 ...b-usbhub-Add-xHCI-non-root-hub-suppo.patch |  127 -
 .../0008-Fix-compilation-on-x86_64.patch      |   90 -
 ...-native-NVMe-driver-based-on-SeaBIOS.patch |   16 +-
 19 files changed, 16 insertions(+), 3554 deletions(-)
 delete mode 100644 config/grub/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
 delete mode 100644 config/grub/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch
 delete mode 100644 config/grub/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch
 delete mode 100644 config/grub/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
 delete mode 100644 config/grub/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
 delete mode 100644 config/grub/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch
 delete mode 100644 config/grub/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
 delete mode 100644 config/grub/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch

diff --git a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb
index 509e784e..7afbe427 100644
--- a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb
@@ -288,7 +288,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode
index 428bed87..3609c5a8 100644
--- a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode
@@ -286,7 +286,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb
index ac1d9f16..e2c82603 100644
--- a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb
@@ -288,7 +288,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode
index 179af9cc..4fe0c52c 100644
--- a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode
@@ -286,7 +286,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index dbcf5a1c..5528b8ec 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -1,7 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 release="n"
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
index dd614202..ab3c464b 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
@@ -325,7 +325,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
index a0dce901..b6a9afd1 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
@@ -323,7 +323,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
index ae155585..7db59d7b 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
@@ -325,7 +325,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_txtmode b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
index 9a891434..a4a33d25 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
@@ -323,7 +323,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/grub/modules.list b/config/grub/modules.list
index 5943a9ae..381451b9 100644
--- a/config/grub/modules.list
+++ b/config/grub/modules.list
@@ -36,7 +36,6 @@ crypto \
 cryptodisk \
 diskfilter \
 echo \
-xhci \
 ehci \
 eval \
 exfat \
diff --git a/config/grub/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch b/config/grub/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
deleted file mode 100644
index f533269f..00000000
--- a/config/grub/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
+++ /dev/null
@@ -1,245 +0,0 @@
-From 90c9011f2e0350a97e3df44b0fc6dd022e04c276 Mon Sep 17 00:00:00 2001
-From: Patrick Rudolph <patrick.rudolph@9elements.com>
-Date: Sun, 15 Nov 2020 19:00:27 +0100
-Subject: [PATCH 1/8] grub-core/bus/usb: Parse SuperSpeed companion descriptors
-
-Parse the SS_ENDPOINT_COMPANION descriptor, which is only present on USB 3.0
-capable devices and xHCI controllers. Make the descendp an array of pointers
-to the endpoint descriptor as it's no longer an continous array.
-
-Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
----
- grub-core/bus/usb/serial/common.c |  2 +-
- grub-core/bus/usb/usb.c           | 44 +++++++++++++++++++------------
- grub-core/bus/usb/usbhub.c        | 22 ++++++++++++----
- grub-core/commands/usbtest.c      |  2 +-
- grub-core/disk/usbms.c            |  2 +-
- grub-core/term/usb_keyboard.c     |  2 +-
- include/grub/usb.h                |  2 +-
- include/grub/usbdesc.h            | 11 +++++++-
- 8 files changed, 59 insertions(+), 28 deletions(-)
-
-diff --git a/grub-core/bus/usb/serial/common.c b/grub-core/bus/usb/serial/common.c
-index e9c995a0a..fc847d66d 100644
---- a/grub-core/bus/usb/serial/common.c
-+++ b/grub-core/bus/usb/serial/common.c
-@@ -72,7 +72,7 @@ grub_usbserial_attach (grub_usb_device_t usbdev, int configno, int interfno,
-   for (j = 0; j < interf->endpointcnt; j++)
-     {
-       struct grub_usb_desc_endp *endp;
--      endp = &usbdev->config[0].interf[interfno].descendp[j];
-+      endp = usbdev->config[0].interf[interfno].descendp[j];
- 
-       if ((endp->endp_addr & 128) && (endp->attrib & 3) == 2
- 	  && (in_endp == GRUB_USB_SERIAL_ENDPOINT_LAST_MATCHING
-diff --git a/grub-core/bus/usb/usb.c b/grub-core/bus/usb/usb.c
-index 7bd49d201..e578af793 100644
---- a/grub-core/bus/usb/usb.c
-+++ b/grub-core/bus/usb/usb.c
-@@ -118,7 +118,7 @@ grub_usb_device_initialize (grub_usb_device_t dev)
-   struct grub_usb_desc_device *descdev;
-   struct grub_usb_desc_config config;
-   grub_usb_err_t err;
--  int i;
-+  int i, j;
- 
-   /* First we have to read first 8 bytes only and determine
-    * max. size of packet */
-@@ -152,6 +152,7 @@ grub_usb_device_initialize (grub_usb_device_t dev)
-       int currif;
-       char *data;
-       struct grub_usb_desc *desc;
-+      struct grub_usb_desc_endp *endp;
- 
-       /* First just read the first 4 bytes of the configuration
- 	 descriptor, after that it is known how many bytes really have
-@@ -201,24 +202,27 @@ grub_usb_device_initialize (grub_usb_device_t dev)
- 	    = (struct grub_usb_desc_if *) &data[pos];
- 	  pos += dev->config[i].interf[currif].descif->length;
- 
-+    dev->config[i].interf[currif].descendp = grub_malloc (
-+            dev->config[i].interf[currif].descif->endpointcnt *
-+            sizeof(struct grub_usb_desc_endp));
-+
-+    j = 0;
- 	  while (pos < config.totallen)
-             {
-               desc = (struct grub_usb_desc *)&data[pos];
--              if (desc->type == GRUB_USB_DESCRIPTOR_ENDPOINT)
--                break;
--              if (!desc->length)
--                {
--                  err = GRUB_USB_ERR_BADDEVICE;
--                  goto fail;
--                }
--              pos += desc->length;
--            }
--
--	  /* Point to the first endpoint.  */
--	  dev->config[i].interf[currif].descendp
--	    = (struct grub_usb_desc_endp *) &data[pos];
--	  pos += (sizeof (struct grub_usb_desc_endp)
--		  * dev->config[i].interf[currif].descif->endpointcnt);
-+              if (desc->type == GRUB_USB_DESCRIPTOR_ENDPOINT) {
-+                endp = (struct grub_usb_desc_endp *) &data[pos];
-+                dev->config[i].interf[currif].descendp[j++] = endp;
-+                pos += desc->length;
-+              } else {
-+                if (!desc->length)
-+                  {
-+                    err = GRUB_USB_ERR_BADDEVICE;
-+                    goto fail;
-+                  }
-+                pos += desc->length;
-+             }
-+	  }
- 	}
-     }
- 
-@@ -226,8 +230,14 @@ grub_usb_device_initialize (grub_usb_device_t dev)
- 
-  fail:
- 
--  for (i = 0; i < GRUB_USB_MAX_CONF; i++)
-+  for (i = 0; i < GRUB_USB_MAX_CONF; i++) {
-+    int currif;
-+
-+    for (currif = 0; currif < dev->config[i].descconf->numif; currif++)
-+      grub_free (dev->config[i].interf[currif].descendp);
-+
-     grub_free (dev->config[i].descconf);
-+  }
- 
-   return err;
- }
-diff --git a/grub-core/bus/usb/usbhub.c b/grub-core/bus/usb/usbhub.c
-index f5608e330..2ae29cba1 100644
---- a/grub-core/bus/usb/usbhub.c
-+++ b/grub-core/bus/usb/usbhub.c
-@@ -82,8 +82,14 @@ grub_usb_hub_add_dev (grub_usb_controller_t controller,
-   if (i == GRUB_USBHUB_MAX_DEVICES)
-     {
-       grub_error (GRUB_ERR_IO, "can't assign address to USB device");
--      for (i = 0; i < GRUB_USB_MAX_CONF; i++)
--        grub_free (dev->config[i].descconf);
-+      for (i = 0; i < GRUB_USB_MAX_CONF; i++) {
-+	int currif;
-+
-+	for (currif = 0; currif < dev->config[i].descconf->numif; currif++)
-+	  grub_free (dev->config[i].interf[currif].descendp);
-+
-+	grub_free (dev->config[i].descconf);
-+      }
-       grub_free (dev);
-       return NULL;
-     }
-@@ -96,8 +102,14 @@ grub_usb_hub_add_dev (grub_usb_controller_t controller,
- 			      i, 0, 0, NULL);
-   if (err)
-     {
--      for (i = 0; i < GRUB_USB_MAX_CONF; i++)
--        grub_free (dev->config[i].descconf);
-+      for (i = 0; i < GRUB_USB_MAX_CONF; i++) {
-+	int currif;
-+
-+	for (currif = 0; currif < dev->config[i].descconf->numif; currif++)
-+	  grub_free (dev->config[i].interf[currif].descendp);
-+
-+	grub_free (dev->config[i].descconf);
-+      }
-       grub_free (dev);
-       return NULL;
-     }
-@@ -176,7 +188,7 @@ grub_usb_add_hub (grub_usb_device_t dev)
-        i++)
-     {
-       struct grub_usb_desc_endp *endp = NULL;
--      endp = &dev->config[0].interf[0].descendp[i];
-+      endp = dev->config[0].interf[0].descendp[i];
- 
-       if ((endp->endp_addr & 128) && grub_usb_get_ep_type(endp)
- 	  == GRUB_USB_EP_INTERRUPT)
-diff --git a/grub-core/commands/usbtest.c b/grub-core/commands/usbtest.c
-index 2c6d93fe6..55a657635 100644
---- a/grub-core/commands/usbtest.c
-+++ b/grub-core/commands/usbtest.c
-@@ -185,7 +185,7 @@ usb_iterate (grub_usb_device_t dev, void *data __attribute__ ((unused)))
-       for (j = 0; j < interf->endpointcnt; j++)
- 	{
- 	  struct grub_usb_desc_endp *endp;
--	  endp = &dev->config[0].interf[i].descendp[j];
-+	  endp = dev->config[0].interf[i].descendp[j];
- 
- 	  grub_printf ("Endpoint #%d: %s, max packed size: %d, transfer type: %s, latency: %d\n",
- 		       endp->endp_addr & 15,
-diff --git a/grub-core/disk/usbms.c b/grub-core/disk/usbms.c
-index b81e3ad9d..b1512dc12 100644
---- a/grub-core/disk/usbms.c
-+++ b/grub-core/disk/usbms.c
-@@ -184,7 +184,7 @@ grub_usbms_attach (grub_usb_device_t usbdev, int configno, int interfno)
-   for (j = 0; j < interf->endpointcnt; j++)
-     {
-       struct grub_usb_desc_endp *endp;
--      endp = &usbdev->config[0].interf[interfno].descendp[j];
-+      endp = usbdev->config[0].interf[interfno].descendp[j];
- 
-       if ((endp->endp_addr & 128) && (endp->attrib & 3) == 2)
- 	/* Bulk IN endpoint.  */
-diff --git a/grub-core/term/usb_keyboard.c b/grub-core/term/usb_keyboard.c
-index 7322d8dff..d590979f5 100644
---- a/grub-core/term/usb_keyboard.c
-+++ b/grub-core/term/usb_keyboard.c
-@@ -175,7 +175,7 @@ grub_usb_keyboard_attach (grub_usb_device_t usbdev, int configno, int interfno)
-   for (j = 0; j < usbdev->config[configno].interf[interfno].descif->endpointcnt;
-        j++)
-     {
--      endp = &usbdev->config[configno].interf[interfno].descendp[j];
-+      endp = usbdev->config[configno].interf[interfno].descendp[j];
- 
-       if ((endp->endp_addr & 128) && grub_usb_get_ep_type(endp)
- 	  == GRUB_USB_EP_INTERRUPT)
-diff --git a/include/grub/usb.h b/include/grub/usb.h
-index 0f346af12..688c11f6d 100644
---- a/include/grub/usb.h
-+++ b/include/grub/usb.h
-@@ -153,7 +153,7 @@ struct grub_usb_interface
- {
-   struct grub_usb_desc_if *descif;
- 
--  struct grub_usb_desc_endp *descendp;
-+  struct grub_usb_desc_endp **descendp;
- 
-   /* A driver is handling this interface. Do we need to support multiple drivers
-      for single interface?
-diff --git a/include/grub/usbdesc.h b/include/grub/usbdesc.h
-index aac5ab05a..bb2ab2e27 100644
---- a/include/grub/usbdesc.h
-+++ b/include/grub/usbdesc.h
-@@ -29,7 +29,8 @@ typedef enum {
-   GRUB_USB_DESCRIPTOR_INTERFACE,
-   GRUB_USB_DESCRIPTOR_ENDPOINT,
-   GRUB_USB_DESCRIPTOR_DEBUG = 10,
--  GRUB_USB_DESCRIPTOR_HUB = 0x29
-+  GRUB_USB_DESCRIPTOR_HUB = 0x29,
-+  GRUB_USB_DESCRIPTOR_SS_ENDPOINT_COMPANION = 0x30
- } grub_usb_descriptor_t;
- 
- struct grub_usb_desc
-@@ -105,6 +106,14 @@ struct grub_usb_desc_endp
-   grub_uint8_t interval;
- } GRUB_PACKED;
- 
-+struct grub_usb_desc_ssep {
-+  grub_uint8_t  length;
-+  grub_uint8_t  type;
-+  grub_uint8_t  maxburst;
-+  grub_uint8_t  attrib;
-+  grub_uint16_t interval;
-+} GRUB_PACKED;
-+
- struct grub_usb_desc_str
- {
-   grub_uint8_t length;
--- 
-2.39.2
-
diff --git a/config/grub/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch b/config/grub/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch
deleted file mode 100644
index d61da615..00000000
--- a/config/grub/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From e111983ca5e2a52bfe2bdc5cd639b06bb2f7902d Mon Sep 17 00:00:00 2001
-From: Patrick Rudolph <patrick.rudolph@9elements.com>
-Date: Sun, 15 Nov 2020 19:47:06 +0100
-Subject: [PATCH 2/8] usb: Add enum for xHCI
-
-Will be used in future patches.
-
-Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
----
- include/grub/usb.h | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/include/grub/usb.h b/include/grub/usb.h
-index 688c11f6d..ea6ee8c2c 100644
---- a/include/grub/usb.h
-+++ b/include/grub/usb.h
-@@ -51,7 +51,8 @@ typedef enum
-     GRUB_USB_SPEED_NONE,
-     GRUB_USB_SPEED_LOW,
-     GRUB_USB_SPEED_FULL,
--    GRUB_USB_SPEED_HIGH
-+    GRUB_USB_SPEED_HIGH,
-+    GRUB_USB_SPEED_SUPER
-   } grub_usb_speed_t;
- 
- typedef int (*grub_usb_iterate_hook_t) (grub_usb_device_t dev, void *data);
--- 
-2.39.2
-
diff --git a/config/grub/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch b/config/grub/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch
deleted file mode 100644
index 70e73ca2..00000000
--- a/config/grub/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 3e25c83a1d1c6e149c7e9f0660ddadb2beca2476 Mon Sep 17 00:00:00 2001
-From: Patrick Rudolph <patrick.rudolph@9elements.com>
-Date: Sun, 15 Nov 2020 19:48:03 +0100
-Subject: [PATCH 3/8] usbtrans: Set default maximum packet size
-
-Set the maximum packet size to 512 for SuperSpeed devices.
-
-Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
----
- grub-core/bus/usb/usbtrans.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
-diff --git a/grub-core/bus/usb/usbtrans.c b/grub-core/bus/usb/usbtrans.c
-index c5680b33a..c1080bb33 100644
---- a/grub-core/bus/usb/usbtrans.c
-+++ b/grub-core/bus/usb/usbtrans.c
-@@ -128,8 +128,12 @@ grub_usb_control_msg (grub_usb_device_t dev,
-   setupdata_addr = grub_dma_get_phys (setupdata_chunk);
- 
-   /* Determine the maximum packet size.  */
--  if (dev->descdev.maxsize0)
-+  if (dev->descdev.maxsize0 && dev->speed != GRUB_USB_SPEED_SUPER)
-     max = dev->descdev.maxsize0;
-+  else if (dev->descdev.maxsize0 && dev->speed == GRUB_USB_SPEED_SUPER)
-+    max = 1UL << dev->descdev.maxsize0;
-+  else if (dev->speed == GRUB_USB_SPEED_SUPER)
-+    max = 512;
-   else
-     max = 64;
- 
--- 
-2.39.2
-
diff --git a/config/grub/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch b/config/grub/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
deleted file mode 100644
index a090e0ea..00000000
--- a/config/grub/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
+++ /dev/null
@@ -1,121 +0,0 @@
-From 89701aba00caa81bb566ab10da0c89264393be30 Mon Sep 17 00:00:00 2001
-From: Patrick Rudolph <patrick.rudolph@9elements.com>
-Date: Sun, 15 Nov 2020 19:51:42 +0100
-Subject: [PATCH 4/8] grub-core/bus/usb: Add function pointer for attach/detach
- events
-
-The xHCI code needs to be called for attaching or detaching a device.
-Introduce two functions pointers and call it from the USB hub code.
-
-Will be used in future commits, currently this doesn't change any functionality.
-
-Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
----
- grub-core/bus/usb/ehci.c   |  2 ++
- grub-core/bus/usb/ohci.c   |  2 ++
- grub-core/bus/usb/uhci.c   |  2 ++
- grub-core/bus/usb/usbhub.c | 19 +++++++++++++++++++
- include/grub/usb.h         |  4 ++++
- 5 files changed, 29 insertions(+)
-
-diff --git a/grub-core/bus/usb/ehci.c b/grub-core/bus/usb/ehci.c
-index 9abebc6bd..953b851c0 100644
---- a/grub-core/bus/usb/ehci.c
-+++ b/grub-core/bus/usb/ehci.c
-@@ -1812,6 +1812,8 @@ static struct grub_usb_controller_dev usb_controller = {
-   .hubports = grub_ehci_hubports,
-   .portstatus = grub_ehci_portstatus,
-   .detect_dev = grub_ehci_detect_dev,
-+  .attach_dev = NULL,
-+  .detach_dev = NULL,
-   /* estimated max. count of TDs for one bulk transfer */
-   .max_bulk_tds = GRUB_EHCI_N_TD * 3 / 4
- };
-diff --git a/grub-core/bus/usb/ohci.c b/grub-core/bus/usb/ohci.c
-index 5363a61f6..7a3f3e154 100644
---- a/grub-core/bus/usb/ohci.c
-+++ b/grub-core/bus/usb/ohci.c
-@@ -1440,6 +1440,8 @@ static struct grub_usb_controller_dev usb_controller =
-   .hubports = grub_ohci_hubports,
-   .portstatus = grub_ohci_portstatus,
-   .detect_dev = grub_ohci_detect_dev,
-+  .attach_dev = NULL,
-+  .detach_dev = NULL,
-   /* estimated max. count of TDs for one bulk transfer */
-   .max_bulk_tds = GRUB_OHCI_TDS * 3 / 4
- };
-diff --git a/grub-core/bus/usb/uhci.c b/grub-core/bus/usb/uhci.c
-index 0fdea4c1e..03c4605b2 100644
---- a/grub-core/bus/usb/uhci.c
-+++ b/grub-core/bus/usb/uhci.c
-@@ -845,6 +845,8 @@ static struct grub_usb_controller_dev usb_controller =
-   .hubports = grub_uhci_hubports,
-   .portstatus = grub_uhci_portstatus,
-   .detect_dev = grub_uhci_detect_dev,
-+  .attach_dev = NULL,
-+  .detach_dev = NULL,
-   /* estimated max. count of TDs for one bulk transfer */
-   .max_bulk_tds = N_TD * 3 / 4
- };
-diff --git a/grub-core/bus/usb/usbhub.c b/grub-core/bus/usb/usbhub.c
-index 2ae29cba1..8e963e84b 100644
---- a/grub-core/bus/usb/usbhub.c
-+++ b/grub-core/bus/usb/usbhub.c
-@@ -66,6 +66,15 @@ grub_usb_hub_add_dev (grub_usb_controller_t controller,
-   dev->split_hubport = split_hubport;
-   dev->split_hubaddr = split_hubaddr;
- 
-+  if (controller->dev->attach_dev) {
-+    err = controller->dev->attach_dev (controller, dev);
-+    if (err)
-+      {
-+	grub_free (dev);
-+	return NULL;
-+      }
-+  }
-+
-   err = grub_usb_device_initialize (dev);
-   if (err)
-     {
-@@ -405,6 +414,8 @@ static void
- detach_device (grub_usb_device_t dev)
- {
-   unsigned i;
-+  grub_usb_err_t err;
-+
-   int k;
-   if (!dev)
-     return;
-@@ -425,6 +436,14 @@ detach_device (grub_usb_device_t dev)
- 	  if (inter && inter->detach_hook)
- 	    inter->detach_hook (dev, i, k);
- 	}
-+  if (dev->controller.dev->detach_dev) {
-+    err = dev->controller.dev->detach_dev (&dev->controller, dev);
-+    if (err)
-+      {
-+	// XXX
-+      }
-+  }
-+
-   grub_usb_devs[dev->addr] = 0;
- }
- 
-diff --git a/include/grub/usb.h b/include/grub/usb.h
-index ea6ee8c2c..4dd179db2 100644
---- a/include/grub/usb.h
-+++ b/include/grub/usb.h
-@@ -126,6 +126,10 @@ struct grub_usb_controller_dev
- 
-   grub_usb_speed_t (*detect_dev) (grub_usb_controller_t dev, int port, int *changed);
- 
-+  grub_usb_err_t (*attach_dev) (grub_usb_controller_t ctrl, grub_usb_device_t dev);
-+
-+  grub_usb_err_t (*detach_dev) (grub_usb_controller_t ctrl, grub_usb_device_t dev);
-+
-   /* Per controller flag - port reset pending, don't do another reset */
-   grub_uint64_t pending_reset;
- 
--- 
-2.39.2
-
diff --git a/config/grub/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch b/config/grub/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
deleted file mode 100644
index 7d69c3a6..00000000
--- a/config/grub/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
+++ /dev/null
@@ -1,77 +0,0 @@
-From 5e5d74a4531770258e21dedd45c33f1a9d3afa6b Mon Sep 17 00:00:00 2001
-From: Patrick Rudolph <patrick.rudolph@9elements.com>
-Date: Sun, 15 Nov 2020 19:54:40 +0100
-Subject: [PATCH 5/8] grub-core/bus/usb/usbhub: Add new private fields for xHCI
- controller
-
-Store the root port number, the route, consisting out of the port ID
-in each nibble, and a pointer to driver private data.
-
-Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
----
- grub-core/bus/usb/usbhub.c | 11 ++++++++---
- include/grub/usb.h         |  5 +++++
- 2 files changed, 13 insertions(+), 3 deletions(-)
-
-diff --git a/grub-core/bus/usb/usbhub.c b/grub-core/bus/usb/usbhub.c
-index 8e963e84b..b4b3a1a61 100644
---- a/grub-core/bus/usb/usbhub.c
-+++ b/grub-core/bus/usb/usbhub.c
-@@ -49,7 +49,9 @@ static grub_usb_controller_dev_t grub_usb_list;
- static grub_usb_device_t
- grub_usb_hub_add_dev (grub_usb_controller_t controller,
-                       grub_usb_speed_t speed,
--                      int split_hubport, int split_hubaddr)
-+                      int split_hubport, int split_hubaddr,
-+                      int root_portno,
-+                      grub_uint32_t route)
- {
-   grub_usb_device_t dev;
-   int i;
-@@ -65,6 +67,8 @@ grub_usb_hub_add_dev (grub_usb_controller_t controller,
-   dev->speed = speed;
-   dev->split_hubport = split_hubport;
-   dev->split_hubaddr = split_hubaddr;
-+  dev->root_port = root_portno;
-+  dev->route = route;
- 
-   if (controller->dev->attach_dev) {
-     err = controller->dev->attach_dev (controller, dev);
-@@ -245,7 +249,7 @@ attach_root_port (struct grub_usb_hub *hub, int portno,
-      and full/low speed device connected to OHCI/UHCI needs not
-      transaction translation - e.g. hubport and hubaddr should be
-      always none (zero) for any device connected to any root hub. */
--  dev = grub_usb_hub_add_dev (hub->controller, speed, 0, 0);
-+  dev = grub_usb_hub_add_dev (hub->controller, speed, 0, 0, portno, 0);
-   hub->controller->dev->pending_reset = 0;
-   npending--;
-   if (! dev)
-@@ -676,7 +680,8 @@ poll_nonroot_hub (grub_usb_device_t dev)
- 
- 	      /* Add the device and assign a device address to it.  */
- 	      next_dev = grub_usb_hub_add_dev (&dev->controller, speed,
--					       split_hubport, split_hubaddr);
-+					       split_hubport, split_hubaddr, dev->root_port,
-+					       dev->route << 4 | (i & 0xf));
- 	      if (dev->controller.dev->pending_reset)
- 		{
- 		  dev->controller.dev->pending_reset = 0;
-diff --git a/include/grub/usb.h b/include/grub/usb.h
-index 4dd179db2..609faf7d0 100644
---- a/include/grub/usb.h
-+++ b/include/grub/usb.h
-@@ -237,6 +237,11 @@ struct grub_usb_device
-   int split_hubport;
- 
-   int split_hubaddr;
-+
-+  /* xHCI specific information */
-+  int root_port;
-+  grub_uint32_t route;
-+  void *xhci_priv;
- };
- 
- 
--- 
-2.39.2
-
diff --git a/config/grub/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch b/config/grub/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch
deleted file mode 100644
index 11df42d8..00000000
--- a/config/grub/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch
+++ /dev/null
@@ -1,2814 +0,0 @@
-From fe3a0bce527e059e9121eb5ad2c3cc099f07a4bf Mon Sep 17 00:00:00 2001
-From: Patrick Rudolph <patrick.rudolph@9elements.com>
-Date: Sun, 15 Nov 2020 19:59:25 +0100
-Subject: [PATCH 6/8] grub-core/bus/usb: Add xhci support
-
-Add support for xHCI USB controllers.
-The code is based on seabios implementation, but has been heavily
-modified to match grubs internals.
-
-Changes done in version 2:
-* Code cleanup
-* Code style fixes
-* Don't leak memory buffers
-* Compile without warnings
-* Add more defines
-* Add more helper functions
-* Don't assume a 1:1 virtual to physical mapping
-* Flush cachelines after writing buffers
-* Don't use hardcoded page size
-* Proper scratchpad register setup
-* xHCI bios ownership handoff
-
-Changes done in version 3:
-* Fixed a race condition detecting events, which doesn't appear on
-  qemu based xHCI controllers
-* Don't accidently disable USB3.0 devices after first command
-* Support arbitrary protocol speed IDs
-* Coding style cleanup
-
-Tested:
-* Qemu system x86_64
-  * virtual USB HID keyboard (usb-kbd)
-  * virtual USB HID mass storage (usb-storage)
-* init Supermicro X11SSH-F
-  * iKVM HID keyboard
-  * USB3 HID mass storage (controller root port)
-  * USB HID keyboard
-
-TODO:
-  * Test on more hardware
-  * Test on USB3 hubs
-  * Support for USB 3.1 and USB 3.2 controllers
-
-Tested on qemu using coreboot and grub as payload:
-
-qemu-system-x86_64 -M q35 -bios $firmware -device qemu-xhci,id=xhci -accel kvm -m 1024M \
-	-device usb-storage,drive=thumbdrive,bus=xhci.0,port=3 \
-	-drive if=none,format=raw,id=thumbdrive,file=ubuntu-20.04.1-desktop-amd64.iso \
-	-device usb-kbd,bus=xhci.0
-
-Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
-Signed-off-by: sylv <sylv@sylv.io>
----
- Makefile.am                  |    2 +-
- grub-core/Makefile.core.def  |    7 +
- grub-core/bus/usb/xhci-pci.c |  195 +++
- grub-core/bus/usb/xhci.c     | 2496 ++++++++++++++++++++++++++++++++++
- include/grub/usb.h           |    4 +
- 5 files changed, 2703 insertions(+), 1 deletion(-)
- create mode 100644 grub-core/bus/usb/xhci-pci.c
- create mode 100644 grub-core/bus/usb/xhci.c
-
-diff --git a/Makefile.am b/Makefile.am
-index 43635d5ff..65016f856 100644
---- a/Makefile.am
-+++ b/Makefile.am
-@@ -434,7 +434,7 @@ if COND_i386_coreboot
- FS_PAYLOAD_MODULES ?= $(shell cat grub-core/fs.lst)
- default_payload.elf: grub-mkstandalone grub-mkimage FORCE
- 	test -f $@ && rm $@ || true
--	pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
-+	pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata xhci ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
- endif
- 
- endif
-diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index fb6078a34..64c3806ab 100644
---- a/grub-core/Makefile.core.def
-+++ b/grub-core/Makefile.core.def
-@@ -667,6 +667,13 @@ module = {
-   enable = arm_coreboot;
- };
- 
-+module = {
-+  name = xhci;
-+  common = bus/usb/xhci.c;
-+  pci = bus/usb/xhci-pci.c;
-+  enable = pci;
-+};
-+
- module = {
-   name = pci;
-   common = bus/pci.c;
-diff --git a/grub-core/bus/usb/xhci-pci.c b/grub-core/bus/usb/xhci-pci.c
-new file mode 100644
-index 000000000..a5bd3c97d
---- /dev/null
-+++ b/grub-core/bus/usb/xhci-pci.c
-@@ -0,0 +1,195 @@
-+/* xhci.c - XHCI Support.  */
-+/*
-+ *  GRUB  --  GRand Unified Bootloader
-+ *  Copyright (C) 2020 9elements Cyber Security
-+ *
-+ *  GRUB is free software: you can redistribute it and/or modify
-+ *  it under the terms of the GNU General Public License as published by
-+ *  the Free Software Foundation, either version 3 of the License, or
-+ *  (at your option) any later version.
-+ *
-+ *  GRUB is distributed in the hope that it will be useful,
-+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *  GNU General Public License for more details.
-+ *
-+ *  You should have received a copy of the GNU General Public License
-+ *  along with GRUB.  If not, see <http://www.gnu.org/licenses/>.
-+ */
-+
-+#include <grub/pci.h>
-+#include <grub/cpu/pci.h>
-+#include <grub/cs5536.h>
-+#include <grub/misc.h>
-+#include <grub/mm.h>
-+#include <grub/time.h>
-+#include <grub/usb.h>
-+
-+#define GRUB_XHCI_PCI_SBRN_REG  0x60
-+#define GRUB_XHCI_ADDR_MEM_MASK	(~0xff)
-+
-+/* USBLEGSUP bits and related OS OWNED byte offset */
-+enum
-+{
-+  GRUB_XHCI_BIOS_OWNED = (1 << 16),
-+  GRUB_XHCI_OS_OWNED = (1 << 24)
-+};
-+
-+/* PCI iteration function... */
-+static int
-+grub_xhci_pci_iter (grub_pci_device_t dev, grub_pci_id_t pciid,
-+		    void *data __attribute__ ((unused)))
-+{
-+  volatile grub_uint32_t *regs;
-+  grub_uint32_t base, base_h;
-+  grub_uint32_t eecp_offset;
-+  grub_uint32_t usblegsup = 0;
-+  grub_uint64_t maxtime;
-+  grub_uint32_t interf;
-+  grub_uint32_t subclass;
-+  grub_uint32_t class;
-+  grub_uint8_t release;
-+  grub_uint32_t class_code;
-+
-+  grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: begin\n");
-+
-+  if (pciid == GRUB_CS5536_PCIID)
-+    {
-+	grub_dprintf ("xhci", "CS5536 not supported\n");
-+	return 0;
-+    }
-+  else
-+    {
-+      grub_pci_address_t addr;
-+      addr = grub_pci_make_address (dev, GRUB_PCI_REG_CLASS);
-+      class_code = grub_pci_read (addr) >> 8;
-+      interf = class_code & 0xFF;
-+      subclass = (class_code >> 8) & 0xFF;
-+      class = class_code >> 16;
-+
-+      /* If this is not an XHCI controller, just return.  */
-+      if (class != 0x0c || subclass != 0x03 || interf != 0x30)
-+	return 0;
-+
-+      grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: class OK\n");
-+
-+      /* Check Serial Bus Release Number */
-+      addr = grub_pci_make_address (dev, GRUB_XHCI_PCI_SBRN_REG);
-+      release = grub_pci_read_byte (addr);
-+      if (release != 0x30)
-+	{
-+	  grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: Wrong SBRN: %0x\n",
-+			release);
-+	  return 0;
-+	}
-+      grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: bus rev. num. OK\n");
-+
-+      /* Determine XHCI XHCC registers base address.  */
-+      addr = grub_pci_make_address (dev, GRUB_PCI_REG_ADDRESS_REG0);
-+      base = grub_pci_read (addr);
-+      addr = grub_pci_make_address (dev, GRUB_PCI_REG_ADDRESS_REG1);
-+      base_h = grub_pci_read (addr);
-+      /* Stop if registers are mapped above 4G - GRUB does not currently
-+       * work with registers mapped above 4G */
-+      if (((base & GRUB_PCI_ADDR_MEM_TYPE_MASK) != GRUB_PCI_ADDR_MEM_TYPE_32)
-+	  && (base_h != 0))
-+	{
-+	  grub_dprintf ("xhci",
-+			"XHCI grub_xhci_pci_iter: registers above 4G are not supported\n");
-+	  return 0;
-+	}
-+      base &= GRUB_PCI_ADDR_MEM_MASK;
-+      if (!base)
-+	{
-+	  grub_dprintf ("xhci",
-+			"XHCI: XHCI is not mapped\n");
-+	  return 0;
-+	}
-+
-+      /* Set bus master - needed for coreboot, VMware, broken BIOSes etc. */
-+      addr = grub_pci_make_address (dev, GRUB_PCI_REG_COMMAND);
-+      grub_pci_write_word(addr,
-+			  GRUB_PCI_COMMAND_MEM_ENABLED
-+			  | GRUB_PCI_COMMAND_BUS_MASTER
-+			  | grub_pci_read_word(addr));
-+
-+      grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: 32-bit XHCI OK\n");
-+    }
-+
-+  grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: iobase of XHCC: %08x\n",
-+		(base & GRUB_XHCI_ADDR_MEM_MASK));
-+
-+  regs = grub_pci_device_map_range (dev,
-+				    (base & GRUB_XHCI_ADDR_MEM_MASK),
-+				    0x100);
-+
-+  /* Is there EECP ? */
-+  eecp_offset = (grub_le_to_cpu32 (regs[2]) >> 8) & 0xff;
-+
-+    /* Determine and change ownership. */
-+  /* EECP offset valid in HCCPARAMS */
-+  /* Ownership can be changed via EECP only */
-+  if (pciid != GRUB_CS5536_PCIID && eecp_offset >= 0x40)
-+    {
-+      grub_pci_address_t pciaddr_eecp;
-+      pciaddr_eecp = grub_pci_make_address (dev, eecp_offset);
-+
-+      usblegsup = grub_pci_read (pciaddr_eecp);
-+      if (usblegsup & GRUB_XHCI_BIOS_OWNED)
-+	{
-+	  grub_boot_time ("Taking ownership of XHCI controller");
-+	  grub_dprintf ("xhci",
-+			"XHCI grub_xhci_pci_iter: XHCI owned by: BIOS\n");
-+	  /* Ownership change - set OS_OWNED bit */
-+	  grub_pci_write (pciaddr_eecp, usblegsup | GRUB_XHCI_OS_OWNED);
-+	  /* Ensure PCI register is written */
-+	  grub_pci_read (pciaddr_eecp);
-+
-+	  /* Wait for finish of ownership change, XHCI specification
-+	   * doesn't say how long it can take... */
-+	  maxtime = grub_get_time_ms () + 1000;
-+	  while ((grub_pci_read (pciaddr_eecp) & GRUB_XHCI_BIOS_OWNED)
-+		 && (grub_get_time_ms () < maxtime));
-+	  if (grub_pci_read (pciaddr_eecp) & GRUB_XHCI_BIOS_OWNED)
-+	    {
-+	      grub_dprintf ("xhci",
-+			    "XHCI grub_xhci_pci_iter: XHCI change ownership timeout");
-+	      /* Change ownership in "hard way" - reset BIOS ownership */
-+	      grub_pci_write (pciaddr_eecp, GRUB_XHCI_OS_OWNED);
-+	      /* Ensure PCI register is written */
-+	      grub_pci_read (pciaddr_eecp);
-+	    }
-+	}
-+      else if (usblegsup & GRUB_XHCI_OS_OWNED)
-+	/* XXX: What to do in this case - nothing ? Can it happen ? */
-+	grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: XHCI owned by: OS\n");
-+      else
-+	{
-+	  grub_dprintf ("xhci",
-+			"XHCI grub_Xhci_pci_iter: XHCI owned by: NONE\n");
-+	  /* XXX: What to do in this case ? Can it happen ?
-+	   * Is code below correct ? */
-+	  /* Ownership change - set OS_OWNED bit */
-+	  grub_pci_write (pciaddr_eecp, GRUB_XHCI_OS_OWNED);
-+	  /* Ensure PCI register is written */
-+	  grub_pci_read (pciaddr_eecp);
-+	}
-+
-+      /* Disable SMI, just to be sure.  */
-+      pciaddr_eecp = grub_pci_make_address (dev, eecp_offset + 4);
-+      grub_pci_write (pciaddr_eecp, 0);
-+      /* Ensure PCI register is written */
-+      grub_pci_read (pciaddr_eecp);
-+    }
-+
-+  grub_dprintf ("xhci", "inithw: XHCI grub_xhci_pci_iter: ownership OK\n");
-+
-+  grub_xhci_init_device (regs);
-+  return 0;
-+}
-+
-+void
-+grub_xhci_pci_scan (void)
-+{
-+  grub_pci_iterate (grub_xhci_pci_iter, NULL);
-+}
-diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c
-new file mode 100644
-index 000000000..f4591ffb5
---- /dev/null
-+++ b/grub-core/bus/usb/xhci.c
-@@ -0,0 +1,2496 @@
-+/* xhci.c - XHCI Support.  */
-+/*
-+ *  GRUB  --  GRand Unified Bootloader
-+ *  Copyright (C) 2020 9elements Cyber Security
-+ *
-+ *  GRUB is free software: you can redistribute it and/or modify
-+ *  it under the terms of the GNU General Public License as published by
-+ *  the Free Software Foundation, either version 3 of the License, or
-+ *  (at your option) any later version.
-+ *
-+ *  GRUB is distributed in the hope that it will be useful,
-+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ *  GNU General Public License for more details.
-+ *
-+ *  You should have received a copy of the GNU General Public License
-+ *  along with GRUB.  If not, see <http://www.gnu.org/licenses/>.
-+ *
-+ * Big parts of this software are inspired by seabios XHCI implementation
-+ * Released under LGPLv3. Credits to:
-+ *
-+ * Copyright (C) 2013  Gerd Hoffmann <kraxel@redhat.com>
-+ * Copyright (C) 2014  Kevin O'Connor <kevin@koconnor.net>
-+ */
-+
-+#include <grub/dl.h>
-+#include <grub/err.h>
-+#include <grub/mm.h>
-+#include <grub/usb.h>
-+#include <grub/usbtrans.h>
-+#include <grub/misc.h>
-+#include <grub/time.h>
-+#include <grub/loader.h>
-+#include <grub/disk.h>
-+#include <grub/dma.h>
-+#include <grub/cache.h>
-+#include <grub/i386/cpuid.h>
-+
-+GRUB_MOD_LICENSE ("GPLv3+");
-+
-+/* This simple GRUB implementation of XHCI driver */
-+/* Based on the specification
-+ * "eXtensible Host Controller Interface for Universal Serial Bus" Revision 1.2
-+ */
-+
-+
-+#define xhci_get_field(data, field)	     \
-+    (((data) >> field##_SHIFT) & field##_MASK)
-+#define XHCI_PORTSC_PLS_MASK     0xf
-+#define XHCI_PORTSC_PLS_SHIFT    5
-+#define XHCI_PORTSC_SPEED_MASK   0xf
-+#define XHCI_PORTSC_SPEED_SHIFT  10
-+
-+enum
-+{
-+  XHCI_USB_FULLSPEED = 1,
-+  XHCI_USB_LOWSPEED,
-+  XHCI_USB_HIGHSPEED,
-+  XHCI_USB_SUPERSPEED
-+};
-+
-+/* Chapter 5.3 Host Controller Capability Registers */
-+struct grub_xhci_caps {
-+    grub_uint8_t  caplength;
-+    grub_uint8_t  reserved_01;
-+    grub_uint16_t hciversion;
-+    grub_uint32_t hcsparams1;
-+    grub_uint32_t hcsparams2;
-+    grub_uint32_t hcsparams3;
-+    grub_uint32_t hccparams;
-+    grub_uint32_t dboff;
-+    grub_uint32_t rtsoff;
-+    grub_uint32_t hccparams2;
-+} GRUB_PACKED;
-+
-+/* extended capabilities */
-+struct grub_xhci_xcap {
-+    grub_uint32_t cap;
-+    grub_uint32_t data[];
-+} GRUB_PACKED;
-+
-+#define XHCI_CAP_LEGACY_SUPPORT 1
-+#define XHCI_CAP_SUPPORTED_PROTOCOL 2
-+
-+struct xhci_portmap {
-+    grub_uint8_t start;
-+    grub_uint8_t count;
-+} GRUB_PACKED;
-+
-+struct grub_xhci_op {
-+    grub_uint32_t usbcmd;
-+    grub_uint32_t usbsts;
-+    grub_uint32_t pagesize;
-+    grub_uint32_t reserved_01[2];
-+    grub_uint32_t dnctl;
-+    grub_uint32_t crcr_low;
-+    grub_uint32_t crcr_high;
-+    grub_uint32_t reserved_02[4];
-+    grub_uint32_t dcbaap_low;
-+    grub_uint32_t dcbaap_high;
-+    grub_uint32_t config;
-+} GRUB_PACKED;
-+
-+enum
-+{
-+  GRUB_XHCI_CMD_RS = (1<<0),
-+  GRUB_XHCI_CMD_HCRST = (1<<1),
-+  GRUB_XHCI_CMD_INTE = (1<<2),
-+  GRUB_XHCI_CMD_HSEE = (1<<3),
-+  GRUB_XHCI_CMD_LHCRST = (1<<7),
-+  GRUB_XHCI_CMD_CSS = (1<<8),
-+  GRUB_XHCI_CMD_CRS = (1<<9),
-+  GRUB_XHCI_CMD_EWE = (1<<10),
-+  GRUB_XHCI_CMD_EU3S = (1<<11)
-+};
-+
-+enum
-+{
-+  GRUB_XHCI_STS_HCH = (1<<0),
-+  GRUB_XHCI_STS_HSE = (1<<2),
-+  GRUB_XHCI_STS_EINT = (1<<3),
-+  GRUB_XHCI_STS_PCD = (1<<4),
-+  GRUB_XHCI_STS_SSS = (1<<8),
-+  GRUB_XHCI_STS_RSS = (1<<9),
-+  GRUB_XHCI_STS_SRE = (1<<10),
-+  GRUB_XHCI_STS_CNR = (1<<11),
-+  GRUB_XHCI_STS_HCE = (1<<12)
-+};
-+
-+
-+/* Port Registers Offset */
-+#define GRUB_XHCI_PR_OFFSET 0x400
-+/* Interrupter Registers Offset */
-+#define GRUB_XHCI_IR_OFFSET 0x20
-+
-+/* Port Status and Control registers offsets */
-+
-+/* Chapter 6 Data Structures */
-+#define ALIGN_SPBA 64
-+#define ALIGN_DCBAA 64
-+#define ALIGN_CMD_RING_SEG 64
-+#define ALIGN_EVT_RING_SEG 64
-+#define ALIGN_EVT_RING_TABLE 64
-+#define ALIGN_TRB 16
-+#define ALIGN_INCTX 64
-+#define ALIGN_SLOTCTX 32
-+
-+#define BOUNDARY_RING 0x10000
-+
-+enum
-+{
-+  GRUB_XHCI_PORTSC_CCS = (1<<0),
-+  GRUB_XHCI_PORTSC_PED = (1<<1),
-+  GRUB_XHCI_PORTSC_OCA = (1<<3),
-+  GRUB_XHCI_PORTSC_PR = (1<<4),
-+  GRUB_XHCI_PORTSC_PP = (1<<9),
-+  GRUB_XHCI_PORTSC_SPEED_FULL = (1<<10),
-+  GRUB_XHCI_PORTSC_SPEED_LOW = (2<<10),
-+  GRUB_XHCI_PORTSC_SPEED_HIGH = (3<<10),
-+  GRUB_XHCI_PORTSC_SPEED_SUPER = (4<<10),
-+  GRUB_XHCI_PORTSC_LWS = (1<<16),
-+  GRUB_XHCI_PORTSC_CSC = (1<<17),
-+  GRUB_XHCI_PORTSC_PEC = (1<<18),
-+  GRUB_XHCI_PORTSC_WRC = (1<<19),
-+  GRUB_XHCI_PORTSC_OCC = (1<<20),
-+  GRUB_XHCI_PORTSC_PRC = (1<<21),
-+  GRUB_XHCI_PORTSC_PLC = (1<<22),
-+  GRUB_XHCI_PORTSC_CEC = (1<<23),
-+  GRUB_XHCI_PORTSC_CAS = (1<<24),
-+  GRUB_XHCI_PORTSC_WCE = (1<<25),
-+  GRUB_XHCI_PORTSC_WDE = (1<<26),
-+  GRUB_XHCI_PORTSC_WOE = (1<<27),
-+  GRUB_XHCI_PORTSC_DR = (1<<30),
-+  GRUB_XHCI_PORTSC_WPR = (1<<31)
-+};
-+
-+/* XHCI memory data structs */
-+#define GRUB_XHCI_MAX_ENDPOINTS 32
-+
-+#define GRUB_XHCI_RING_ITEMS 128
-+#define GRUB_XHCI_RING_SIZE (GRUB_XHCI_RING_ITEMS*sizeof(struct grub_xhci_trb))
-+/*
-+ *  xhci_ring structs are allocated with XHCI_RING_SIZE alignment,
-+ *  then we can get it from a trb pointer (provided by evt ring).
-+ */
-+#define XHCI_RING(_trb)	  \
-+    ((struct grub_xhci_ring*)((grub_uint32_t)(_trb) & ~(GRUB_XHCI_RING_SIZE-1)))
-+
-+/* slot context */
-+struct grub_xhci_slotctx {
-+  grub_uint32_t ctx[4];
-+  grub_uint32_t reserved_01[4];
-+} GRUB_PACKED;
-+
-+/* endpoint context */
-+struct grub_xhci_epctx {
-+  grub_uint32_t ctx[2];
-+  grub_uint32_t deq_low;
-+  grub_uint32_t deq_high;
-+  grub_uint32_t length;
-+  grub_uint32_t reserved_01[3];
-+} GRUB_PACKED;
-+
-+/* device context array element */
-+struct grub_xhci_devlist {
-+  grub_uint32_t ptr_low;
-+  grub_uint32_t ptr_high;
-+} GRUB_PACKED;
-+
-+/* input context */
-+struct grub_xhci_inctx {
-+  grub_uint32_t del;
-+  grub_uint32_t add;
-+  grub_uint32_t reserved_01[6];
-+} GRUB_PACKED;
-+
-+/* transfer block (ring element) */
-+struct grub_xhci_trb {
-+  grub_uint32_t ptr_low;
-+  grub_uint32_t ptr_high;
-+  grub_uint32_t status;
-+  grub_uint32_t control;
-+} GRUB_PACKED;
-+
-+#define TRB_C	       (1<<0)
-+#define TRB_TYPE_SHIFT	  10
-+#define TRB_TYPE_MASK       0x3f
-+#define TRB_TYPE(t)	 (((t) >> TRB_TYPE_SHIFT) & TRB_TYPE_MASK)
-+
-+#define TRB_EV_ED	   (1<<2)
-+
-+#define TRB_TR_ENT	  (1<<1)
-+#define TRB_TR_ISP	  (1<<2)
-+#define TRB_TR_NS	   (1<<3)
-+#define TRB_TR_CH	   (1<<4)
-+#define TRB_TR_IOC	  (1<<5)
-+#define TRB_TR_IDT	  (1<<6)
-+#define TRB_TR_TBC_SHIFT	7
-+#define TRB_TR_TBC_MASK     0x3
-+#define TRB_TR_BEI	  (1<<9)
-+#define TRB_TR_TLBPC_SHIFT      16
-+#define TRB_TR_TLBPC_MASK   0xf
-+#define TRB_TR_FRAMEID_SHIFT    20
-+#define TRB_TR_FRAMEID_MASK 0x7ff
-+#define TRB_TR_SIA	  (1<<31)
-+
-+#define TRB_TR_DIR	  (1<<16)
-+
-+#define TRB_CR_SLOTID_SHIFT     24
-+#define TRB_CR_SLOTID_MASK  0xff
-+#define TRB_CR_EPID_SHIFT       16
-+#define TRB_CR_EPID_MASK    0x1f
-+
-+#define TRB_CR_BSR	  (1<<9)
-+#define TRB_CR_DC	   (1<<9)
-+
-+#define TRB_LK_TC	   (1<<1)
-+
-+#define TRB_INTR_SHIFT	  22
-+#define TRB_INTR_MASK       0x3ff
-+#define TRB_INTR(t)	 (((t).status >> TRB_INTR_SHIFT) & TRB_INTR_MASK)
-+
-+typedef enum TRBType {
-+    TRB_RESERVED = 0,
-+    TR_NORMAL,
-+    TR_SETUP,
-+    TR_DATA,
-+    TR_STATUS,
-+    TR_ISOCH,
-+    TR_LINK,
-+    TR_EVDATA,
-+    TR_NOOP,
-+    CR_ENABLE_SLOT,
-+    CR_DISABLE_SLOT,
-+    CR_ADDRESS_DEVICE,
-+    CR_CONFIGURE_ENDPOINT,
-+    CR_EVALUATE_CONTEXT,
-+    CR_RESET_ENDPOINT,
-+    CR_STOP_ENDPOINT,
-+    CR_SET_TR_DEQUEUE,
-+    CR_RESET_DEVICE,
-+    CR_FORCE_EVENT,
-+    CR_NEGOTIATE_BW,
-+    CR_SET_LATENCY_TOLERANCE,
-+    CR_GET_PORT_BANDWIDTH,
-+    CR_FORCE_HEADER,
-+    CR_NOOP,
-+    ER_TRANSFER = 32,
-+    ER_COMMAND_COMPLETE,
-+    ER_PORT_STATUS_CHANGE,
-+    ER_BANDWIDTH_REQUEST,
-+    ER_DOORBELL,
-+    ER_HOST_CONTROLLER,
-+    ER_DEVICE_NOTIFICATION,
-+    ER_MFINDEX_WRAP,
-+} TRBType;
-+
-+typedef enum TRBCCode {
-+    CC_INVALID = 0,
-+    CC_SUCCESS,
-+    CC_DATA_BUFFER_ERROR,
-+    CC_BABBLE_DETECTED,
-+    CC_USB_TRANSACTION_ERROR,
-+    CC_TRB_ERROR,
-+    CC_STALL_ERROR,
-+    CC_RESOURCE_ERROR,
-+    CC_BANDWIDTH_ERROR,
-+    CC_NO_SLOTS_ERROR,
-+    CC_INVALID_STREAM_TYPE_ERROR,
-+    CC_SLOT_NOT_ENABLED_ERROR,
-+    CC_EP_NOT_ENABLED_ERROR,
-+    CC_SHORT_PACKET,
-+    CC_RING_UNDERRUN,
-+    CC_RING_OVERRUN,
-+    CC_VF_ER_FULL,
-+    CC_PARAMETER_ERROR,
-+    CC_BANDWIDTH_OVERRUN,
-+    CC_CONTEXT_STATE_ERROR,
-+    CC_NO_PING_RESPONSE_ERROR,
-+    CC_EVENT_RING_FULL_ERROR,
-+    CC_INCOMPATIBLE_DEVICE_ERROR,
-+    CC_MISSED_SERVICE_ERROR,
-+    CC_COMMAND_RING_STOPPED,
-+    CC_COMMAND_ABORTED,
-+    CC_STOPPED,
-+    CC_STOPPED_LENGTH_INVALID,
-+    CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR = 29,
-+    CC_ISOCH_BUFFER_OVERRUN = 31,
-+    CC_EVENT_LOST_ERROR,
-+    CC_UNDEFINED_ERROR,
-+    CC_INVALID_STREAM_ID_ERROR,
-+    CC_SECONDARY_BANDWIDTH_ERROR,
-+    CC_SPLIT_TRANSACTION_ERROR
-+} TRBCCode;
-+
-+enum {
-+    PLS_U0	      =  0,
-+    PLS_U1	      =  1,
-+    PLS_U2	      =  2,
-+    PLS_U3	      =  3,
-+    PLS_DISABLED	=  4,
-+    PLS_RX_DETECT       =  5,
-+    PLS_INACTIVE	=  6,
-+    PLS_POLLING	 =  7,
-+    PLS_RECOVERY	=  8,
-+    PLS_HOT_RESET       =  9,
-+    PLS_COMPILANCE_MODE = 10,
-+    PLS_TEST_MODE       = 11,
-+    PLS_RESUME	  = 15,
-+};
-+
-+/* event ring segment */
-+struct grub_xhci_er_seg {
-+  grub_uint32_t ptr_low;
-+  grub_uint32_t ptr_high;
-+  grub_uint32_t size;
-+  grub_uint32_t reserved_01;
-+} GRUB_PACKED;
-+
-+struct grub_xhci_ring {
-+    struct grub_xhci_trb      ring[GRUB_XHCI_RING_ITEMS];
-+    struct grub_xhci_trb      evt;
-+    grub_uint32_t	     eidx;
-+    grub_uint32_t	     nidx;
-+    grub_uint32_t	     cs;
-+};
-+
-+/* port registers */
-+struct grub_xhci_pr {
-+    grub_uint32_t portsc;
-+    grub_uint32_t portpmsc;
-+    grub_uint32_t portli;
-+    grub_uint32_t reserved_01;
-+} GRUB_PACKED;
-+
-+/* doorbell registers */
-+struct grub_xhci_db {
-+    grub_uint32_t doorbell;
-+} GRUB_PACKED;
-+
-+/* runtime registers */
-+struct grub_xhci_rts {
-+    grub_uint32_t mfindex;
-+} GRUB_PACKED;
-+
-+/* interrupter registers */
-+struct grub_xhci_ir {
-+    grub_uint32_t iman;
-+    grub_uint32_t imod;
-+    grub_uint32_t erstsz;
-+    grub_uint32_t reserved_01;
-+    grub_uint32_t erstba_low;
-+    grub_uint32_t erstba_high;
-+    grub_uint32_t erdp_low;
-+    grub_uint32_t erdp_high;
-+} GRUB_PACKED;
-+
-+struct grub_xhci_psid {
-+	grub_uint8_t id;
-+	grub_uint8_t psie;
-+	grub_uint16_t psim;
-+	grub_uint64_t bitrate;
-+	grub_usb_speed_t grub_usb_speed;
-+};
-+
-+struct grub_xhci_psids {
-+	grub_uint8_t major;
-+	grub_uint8_t minor;
-+	struct grub_xhci_psid psids[16];
-+};
-+
-+struct grub_xhci
-+{
-+  grub_uint8_t shutdown; /* 1 if preparing shutdown of controller */
-+  /* xhci registers */
-+  volatile struct grub_xhci_caps *caps;	/* Capability registers */
-+  volatile struct grub_xhci_op *op;	/* Operational registers */
-+  volatile struct grub_xhci_pr *pr;	/* Port Registers */
-+  volatile struct grub_xhci_db *db;	/* doorbell */
-+  volatile struct grub_xhci_ir *ir;	/* Interrupt Registers */
-+  /* devinfo */
-+  grub_uint32_t xcap;
-+  grub_uint32_t ports;
-+  grub_uint32_t slots;
-+  grub_uint8_t flag64;
-+  grub_uint16_t spb;
-+  grub_uint32_t pagesize;
-+  struct xhci_portmap usb2;
-+  struct xhci_portmap usb3;
-+  struct grub_xhci_psids *psids;
-+  /* xhci data structures */
-+  struct grub_pci_dma_chunk *devs_dma;
-+  volatile struct grub_xhci_devlist *devs;
-+  struct grub_pci_dma_chunk *cmds_dma;
-+  volatile struct grub_xhci_ring *cmds;
-+  struct grub_pci_dma_chunk *evts_dma;
-+  volatile struct grub_xhci_ring *evts;
-+  struct grub_pci_dma_chunk *eseg_dma;
-+  volatile struct grub_xhci_er_seg *eseg;
-+  struct grub_pci_dma_chunk *spba_dma;
-+  struct grub_pci_dma_chunk *spad_dma;
-+
-+  struct grub_xhci *next;
-+};
-+
-+struct grub_xhci_priv {
-+  grub_uint8_t                    slotid;
-+  grub_uint32_t                   max_packet;
-+  struct grub_pci_dma_chunk       *enpoint_trbs_dma[32];
-+  volatile struct grub_xhci_ring  *enpoint_trbs[32];
-+  struct grub_pci_dma_chunk       *slotctx_dma;
-+};
-+
-+struct grub_xhci_port {
-+  grub_uint32_t portsc;
-+  grub_uint32_t portpmsc;
-+  grub_uint32_t portli;
-+  grub_uint32_t reserved_01;
-+};
-+
-+struct grub_xhci_transfer_controller_data {
-+  grub_uint32_t transfer_size;
-+};
-+
-+static struct grub_xhci *xhci;
-+
-+/****************************************************************
-+ * general access functions
-+ ****************************************************************/
-+
-+static inline void
-+grub_xhci_write32(volatile void *addr, grub_uint32_t val) {
-+    *(volatile grub_uint32_t *)addr = val;
-+}
-+static inline void
-+grub_xhci_write16(volatile void *addr, grub_uint16_t val) {
-+    *(volatile grub_uint16_t *)addr = val;
-+}
-+static inline void
-+grub_xhci_write8(void *addr, grub_uint8_t val) {
-+    *(volatile grub_uint8_t *)addr = val;
-+}
-+
-+static inline grub_uint32_t
-+grub_xhci_read32(volatile void *addr) {
-+  return grub_le_to_cpu32 (*((volatile grub_uint32_t *)addr));
-+}
-+
-+static inline grub_uint16_t
-+grub_xhci_read16(volatile void *addr) {
-+  return grub_le_to_cpu16 (*((volatile grub_uint32_t *)addr));
-+}
-+static inline grub_uint8_t
-+grub_xhci_read8(volatile void *addr) {
-+  return (*((volatile grub_uint32_t *)addr));
-+}
-+
-+static inline grub_uint32_t
-+grub_xhci_port_read (struct grub_xhci *x, grub_uint32_t port)
-+{
-+  return grub_xhci_read32(&x->pr[port].portsc);
-+}
-+
-+static inline void
-+grub_xhci_port_write (struct grub_xhci *x, grub_uint32_t port,
-+		      grub_uint32_t and_mask, grub_uint32_t or_mask)
-+{
-+  grub_uint32_t reg = grub_xhci_port_read(x, port);
-+  reg &= and_mask;
-+  reg |= or_mask;
-+
-+  grub_xhci_write32(&x->pr[port].portsc, reg);
-+}
-+
-+/****************************************************************
-+ * xhci status and support functions
-+ ****************************************************************/
-+
-+static grub_uint32_t xhci_get_pagesize(struct grub_xhci *x)
-+{
-+  /* Chapter 5.4.3 Page Size Register (PAGESIZE) */
-+  for (grub_uint8_t i = 0; i < 16; i++)
-+    {
-+      if (grub_xhci_read32(&x->op->pagesize) & (1 << i))
-+	return 1 << (12 + i);
-+    }
-+  return 0;
-+}
-+
-+static grub_uint8_t xhci_is_halted(struct grub_xhci *x)
-+{
-+  return !!(grub_xhci_read32(&x->op->usbsts) & 1);
-+}
-+
-+/* Just for debugging */
-+static void xhci_check_status(struct grub_xhci *x)
-+{
-+  grub_uint32_t reg;
-+
-+  reg = grub_xhci_read32(&x->op->usbsts);
-+  if (reg & 1)
-+    grub_dprintf("xhci", "%s: xHCI halted\n", __func__);
-+  if (reg & 2)
-+    grub_dprintf("xhci", "%s: Host system error detected\n", __func__);
-+  if (reg & (1 << 12))
-+    grub_dprintf("xhci", "%s: Internal error detected\n", __func__);
-+  reg = grub_xhci_read32(&x->op->crcr_low);
-+  if (reg & (1 << 3))
-+    grub_dprintf("xhci", "%s: Command ring running\n", __func__);
-+}
-+
-+/* xhci_memalign_dma32 allocates DMA memory satisfying alignment and boundary
-+ * requirements without wasting to much memory */
-+static struct grub_pci_dma_chunk *
-+xhci_memalign_dma32(grub_size_t align,
-+		    grub_size_t size,
-+		    grub_size_t boundary)
-+{
-+	struct grub_pci_dma_chunk *tmp;
-+	const grub_uint32_t mask = boundary - 1;
-+	grub_uint32_t start, end;
-+
-+	/* Allocate some memory and check if it doesn't cross boundary */
-+	tmp = grub_memalign_dma32(align, size);
-+	start = grub_dma_get_phys(tmp);
-+	end = start + size - 1;
-+	if ((start & mask) == (end & mask))
-+		return tmp;
-+	/* Buffer isn't usable, allocate bigger one */
-+	grub_dma_free(tmp);
-+
-+	return grub_memalign_dma32(boundary, size);
-+}
-+
-+/****************************************************************
-+ * helper functions for in context DMA buffer
-+ ****************************************************************/
-+
-+static int
-+grub_xhci_inctx_size(struct grub_xhci *x)
-+{
-+  const grub_uint8_t cnt = GRUB_XHCI_MAX_ENDPOINTS + 1;
-+  return (sizeof(struct grub_xhci_inctx) * cnt) << x->flag64;
-+}
-+
-+static void
-+grub_xhci_inctx_sync_dma_caches(struct grub_xhci *x, struct grub_pci_dma_chunk *inctx)
-+{
-+  grub_arch_sync_dma_caches(inctx, grub_xhci_inctx_size(x));
-+}
-+
-+static struct grub_pci_dma_chunk *
-+grub_xhci_alloc_inctx(struct grub_xhci *x, int maxepid,
-+		      struct grub_usb_device *dev)
-+{
-+  int size = grub_xhci_inctx_size(x);
-+  struct grub_pci_dma_chunk *dma = xhci_memalign_dma32(ALIGN_INCTX, size,
-+						       x->pagesize);
-+  if (!dma)
-+    return NULL;
-+
-+  volatile struct grub_xhci_inctx *in = grub_dma_get_virt(dma);
-+  grub_memset((void *)in, 0, size);
-+
-+  struct grub_xhci_slotctx *slot = (void*)&in[1 << x->flag64];
-+  slot->ctx[0]    |= maxepid << 27; /* context entries */
-+  grub_dprintf("xhci", "%s: speed=%d root_port=%d\n", __func__, dev->speed, dev->root_port);
-+  switch (dev->speed) {
-+    case GRUB_USB_SPEED_FULL:
-+      slot->ctx[0]    |= XHCI_USB_FULLSPEED << 20;
-+      break;
-+    case GRUB_USB_SPEED_HIGH:
-+     slot->ctx[0]     |= XHCI_USB_HIGHSPEED << 20;
-+      break;
-+    case GRUB_USB_SPEED_LOW:
-+      slot->ctx[0]    |= XHCI_USB_LOWSPEED << 20;
-+      break;
-+    case GRUB_USB_SPEED_SUPER:
-+      slot->ctx[0]    |= XHCI_USB_SUPERSPEED << 20;
-+      break;
-+    case GRUB_USB_SPEED_NONE:
-+      slot->ctx[0]    |= 0 << 20;
-+      break;
-+  }
-+
-+  /* Route is greater zero on devices that are connected to a non root hub */
-+  if (dev->route)
-+    {
-+      /* FIXME: Implement this code for non SuperSpeed hub devices */
-+    }
-+  slot->ctx[0]    |= dev->route;
-+  slot->ctx[1]    |= (dev->root_port+1) << 16;
-+
-+  grub_arch_sync_dma_caches(in, size);
-+
-+  return dma;
-+}
-+
-+/****************************************************************
-+ * xHCI event processing
-+ ****************************************************************/
-+
-+/* Dequeue events on the XHCI event ring generated by the hardware */
-+static void xhci_process_events(struct grub_xhci *x)
-+{
-+    volatile struct grub_xhci_ring *evts = x->evts;
-+    /* XXX invalidate caches */
-+
-+    for (;;) {
-+	/* check for event */
-+	grub_uint32_t nidx = grub_xhci_read32(&evts->nidx);
-+	grub_uint32_t cs = grub_xhci_read32(&evts->cs);
-+	volatile struct grub_xhci_trb *etrb = evts->ring + nidx;
-+	grub_uint32_t control = grub_xhci_read32(&etrb->control);
-+	if ((control & TRB_C) != (cs ? 1 : 0))
-+	    return;
-+
-+	/* process event */
-+	grub_uint32_t evt_type = TRB_TYPE(control);
-+	grub_uint32_t evt_cc = (grub_xhci_read32(&etrb->status) >> 24) & 0xff;
-+
-+	switch (evt_type)
-+	  {
-+	    case ER_TRANSFER:
-+	    case ER_COMMAND_COMPLETE:
-+	      {
-+		struct grub_xhci_trb  *rtrb = (void*)grub_xhci_read32(&etrb->ptr_low);
-+		struct grub_xhci_ring *ring = XHCI_RING(rtrb);
-+		volatile struct grub_xhci_trb  *evt = &ring->evt;
-+		grub_uint32_t eidx = rtrb - ring->ring + 1;
-+		grub_dprintf("xhci", "%s: ring %p [trb %p, evt %p, type %d, eidx %d, cc %d]\n",
-+			      __func__, ring, rtrb, evt, evt_type, eidx, evt_cc);
-+		*evt = *etrb;
-+		grub_xhci_write32(&ring->eidx, eidx);
-+		break;
-+	      }
-+	    case ER_PORT_STATUS_CHANGE:
-+	      {
-+		/* Nothing to do here. grub_xhci_detect_dev will handle it */
-+		break;
-+	      }
-+	    default:
-+	      {
-+		grub_dprintf("xhci", "%s: unknown event, type %d, cc %d\n",
-+			      __func__, evt_type, evt_cc);
-+		break;
-+	      }
-+	}
-+
-+	/* move ring index, notify xhci */
-+	nidx++;
-+	if (nidx == GRUB_XHCI_RING_ITEMS)
-+	  {
-+	    nidx = 0;
-+	    cs = cs ? 0 : 1;
-+	    grub_xhci_write32(&evts->cs, cs);
-+	  }
-+	grub_xhci_write32(&evts->nidx, nidx);
-+	volatile struct grub_xhci_ir *ir = x->ir;
-+	grub_uint32_t erdp = (grub_uint32_t)(evts->ring + nidx);
-+	grub_xhci_write32(&ir->erdp_low, erdp);
-+	grub_xhci_write32(&ir->erdp_high, 0);
-+    }
-+}
-+
-+/****************************************************************
-+ * TRB handling
-+ ****************************************************************/
-+
-+/* Signal the hardware to process events on a TRB ring */
-+static void xhci_doorbell(struct grub_xhci *x, grub_uint32_t slotid, grub_uint32_t value)
-+{
-+  xhci_check_status(x);
-+  grub_dprintf("xhci", "%s: slotid %d, epid %d\n", __func__, slotid, value);
-+  grub_xhci_write32(&x->db[slotid].doorbell, value);
-+}
-+
-+/* Check if a ring has any pending TRBs */
-+static int xhci_ring_busy(volatile struct grub_xhci_ring *ring)
-+{
-+  grub_uint32_t eidx = grub_xhci_read32(&ring->eidx);
-+  grub_uint32_t nidx = grub_xhci_read32(&ring->nidx);
-+
-+  return (eidx != nidx);
-+}
-+
-+/* Returns free space in ring */
-+static int xhci_ring_free_space(volatile struct grub_xhci_ring *ring)
-+{
-+  grub_uint32_t eidx = grub_xhci_read32(&ring->eidx);
-+  grub_uint32_t nidx = grub_xhci_read32(&ring->nidx);
-+
-+  /* nidx is never 0, so reduce ring buffer size by one */
-+  return (eidx > nidx) ? eidx-nidx
-+		: (ARRAY_SIZE(ring->ring) - 1) - nidx + eidx;
-+}
-+
-+/* Check if a ring is full */
-+static int xhci_ring_full(volatile struct grub_xhci_ring *ring)
-+{
-+  /* Might need to insert one link TRB */
-+  return xhci_ring_free_space(ring) <= 1;
-+}
-+
-+/* Check if a ring is almost full */
-+static int xhci_ring_almost_full(volatile struct grub_xhci_ring *ring)
-+{
-+  /* Might need to insert one link TRB */
-+  return xhci_ring_free_space(ring) <= 2;
-+}
-+
-+/* Wait for a ring to empty (all TRBs processed by hardware) */
-+static int xhci_event_wait(struct grub_xhci *x,
-+			   volatile struct grub_xhci_ring *ring,
-+			   grub_uint32_t timeout)
-+{
-+    grub_uint32_t end = grub_get_time_ms () + timeout;
-+
-+    for (;;)
-+      {
-+	xhci_check_status(x);
-+	xhci_process_events(x);
-+	if (!xhci_ring_busy(ring))
-+	  {
-+	    grub_uint32_t status = ring->evt.status;
-+	    return (status >> 24) & 0xff;
-+	  }
-+	if (grub_get_time_ms () > end)
-+	  {
-+	    xhci_check_status(x);
-+	    grub_dprintf("xhci", "%s: Timeout waiting for event\n", __func__);
-+	    return -1;
-+	  }
-+      }
-+}
-+
-+/* Add a TRB to the given ring, either regular or inline */
-+static void xhci_trb_fill(volatile struct grub_xhci_ring *ring,
-+			  grub_uint64_t ptr, grub_uint32_t xferlen,
-+			  grub_uint32_t flags)
-+{
-+  volatile struct grub_xhci_trb *dst = &ring->ring[ring->nidx];
-+  dst->ptr_low = ptr & 0xffffffff;
-+  dst->ptr_high = ptr >> 32;
-+  dst->status = xferlen;
-+  dst->control = flags | (ring->cs ? TRB_C : 0);
-+
-+  grub_arch_sync_dma_caches(dst, sizeof(ring->ring[0]));
-+}
-+
-+/*
-+ * Queue a TRB onto a ring.
-+ *
-+ * The caller must pass a pointer to the data in physical address-space or the
-+ * data itself (but no more than 8 bytes) in data_or_addr. Inline data must have
-+ * the flag TRB_TR_IDT set.
-+ */
-+static void xhci_trb_queue(volatile struct grub_xhci_ring *ring,
-+			   grub_uint64_t data_or_addr,
-+			   grub_uint32_t xferlen, grub_uint32_t flags)
-+{
-+  grub_dprintf("xhci", "%s: ring %p data %llx len %d flags 0x%x remain 0x%x\n", __func__,
-+      ring, data_or_addr, xferlen & 0x1ffff, flags, xferlen >> 17);
-+
-+  if (xhci_ring_full(ring))
-+    {
-+      grub_dprintf("xhci", "%s: ERROR: ring %p is full, discarding TRB\n",
-+	__func__, ring);
-+      return;
-+    }
-+
-+  if (ring->nidx >= ARRAY_SIZE(ring->ring) - 1)
-+    {
-+      /* Reset to command buffer pointer to the first element */
-+      xhci_trb_fill(ring, (grub_addr_t)ring->ring, 0, (TR_LINK << 10) | TRB_LK_TC);
-+      ring->nidx = 0;
-+      ring->cs ^= 1;
-+      grub_dprintf("xhci", "%s: ring %p [linked]\n", __func__, ring);
-+    }
-+
-+  xhci_trb_fill(ring, data_or_addr, xferlen, flags);
-+  ring->nidx++;
-+  grub_dprintf("xhci", "%s: ring %p [nidx %d, len %d]\n",
-+	       __func__, ring, ring->nidx, xferlen);
-+}
-+
-+/*
-+ * Queue a TRB onto a ring and flush it if necessary.
-+ *
-+ * The caller must pass a pointer to the data in physical address-space or the
-+ * data itself (but no more than 8 bytes) in data_or_addr. Inline data must have
-+ * the flag TRB_TR_IDT set.
-+ */
-+static int xhci_trb_queue_and_flush(struct grub_xhci *x,
-+				    grub_uint32_t slotid,
-+				    grub_uint32_t epid,
-+				    volatile struct grub_xhci_ring *ring,
-+				    grub_uint64_t data_or_addr,
-+				    grub_uint32_t xferlen, grub_uint32_t flags)
-+{
-+  grub_uint8_t submit = 0;
-+  if (xhci_ring_almost_full(ring))
-+    {
-+      grub_dprintf("xhci", "%s: almost full e %d n %d\n", __func__, ring->eidx, ring->nidx);
-+      flags |= TRB_TR_IOC;
-+      submit = 1;
-+    }
-+  /* Note: xhci_trb_queue might queue on or two elements, if the end of the TRB
-+   * has been reached. The caller must account for that when filling the TRB. */
-+  xhci_trb_queue(ring, data_or_addr, xferlen, flags);
-+  /* Submit if less no free slot is remaining, we might need an additional
-+   * one on the next call to this function. */
-+  if (submit)
-+    {
-+      xhci_doorbell(x, slotid, epid);
-+      int rc = xhci_event_wait(x, ring, 1000);
-+      grub_dprintf("xhci", "%s: xhci_event_wait = %d\n", __func__, rc);
-+      return rc;
-+    }
-+  return 0;
-+}
-+
-+/****************************************************************
-+ * xHCI command functions
-+ ****************************************************************/
-+
-+/* Submit a command to the xHCI command TRB */
-+static int xhci_cmd_submit(struct grub_xhci *x,
-+			   struct grub_pci_dma_chunk *inctx_dma,
-+			   grub_uint32_t flags)
-+{
-+  volatile struct grub_xhci_inctx *inctx;
-+  /* Don't submit if halted, it will fail */
-+  if (xhci_is_halted(x))
-+    return -1;
-+
-+  if (inctx_dma)
-+    {
-+      grub_xhci_inctx_sync_dma_caches(x, inctx_dma);
-+
-+      inctx = grub_dma_get_virt(inctx_dma);
-+
-+      struct grub_xhci_slotctx *slot = (void*)&inctx[1 << x->flag64];
-+      grub_uint32_t port = ((slot->ctx[1] >> 16) & 0xff) - 1;
-+      grub_uint32_t portsc = grub_xhci_port_read(x, port);
-+      if (!(portsc & GRUB_XHCI_PORTSC_CCS))
-+	{
-+	  grub_dprintf("xhci", "%s: root port %d no longer connected\n",
-+	    __func__, port);
-+	  return -1;
-+	}
-+      xhci_trb_queue(x->cmds, grub_dma_get_phys(inctx_dma), 0, flags);
-+    }
-+    else
-+    {
-+      xhci_trb_queue(x->cmds, 0, 0, flags);
-+    }
-+
-+    xhci_doorbell(x, 0, 0);
-+    int rc = xhci_event_wait(x, x->cmds, 1000);
-+    grub_dprintf("xhci", "%s: xhci_event_wait = %d\n", __func__, rc);
-+
-+    return rc;
-+}
-+
-+static int xhci_cmd_enable_slot(struct grub_xhci *x)
-+{
-+  grub_uint32_t flags = 0;
-+  flags |= (CR_ENABLE_SLOT << 10);
-+
-+  grub_dprintf("xhci", "%s:\n", __func__);
-+  int cc = xhci_cmd_submit(x, NULL, flags);
-+  if (cc != CC_SUCCESS)
-+      return -1;
-+  grub_dprintf("xhci", "%s: %p\n", __func__, &x->cmds->evt.control);
-+  grub_dprintf("xhci", "%s: %x\n", __func__, grub_xhci_read32(&x->cmds->evt.control));
-+
-+  return (grub_xhci_read32(&x->cmds->evt.control) >> 24) & 0xff;
-+}
-+
-+static int xhci_cmd_disable_slot(struct grub_xhci *x, grub_uint32_t slotid)
-+{
-+  grub_uint32_t flags = 0;
-+  flags |= (CR_DISABLE_SLOT << 10);
-+  flags |= (slotid << 24);
-+
-+  grub_dprintf("xhci", "%s: slotid %d\n", __func__, slotid);
-+  return xhci_cmd_submit(x, NULL, flags);
-+}
-+
-+static int xhci_cmd_stop_endpoint(struct grub_xhci *x, grub_uint32_t slotid
-+				       , grub_uint32_t epid
-+				       , grub_uint32_t suspend)
-+{
-+  grub_uint32_t flags = 0;
-+  flags |= (CR_STOP_ENDPOINT << 10);
-+  flags |= (epid << 16);
-+  flags |= (suspend << 23) ;
-+  flags |= (slotid << 24);
-+
-+  return xhci_cmd_submit(x, NULL, flags);
-+}
-+
-+static int xhci_cmd_reset_endpoint(struct grub_xhci *x, grub_uint32_t slotid
-+				       , grub_uint32_t epid
-+				       , grub_uint32_t preserve)
-+{
-+  grub_uint32_t flags = 0;
-+  flags |= (preserve << 9);
-+  flags |= (CR_RESET_ENDPOINT << 10);
-+  flags |= (epid << 16);
-+  flags |= (slotid << 24);
-+
-+  return xhci_cmd_submit(x, NULL, flags);
-+}
-+
-+static int xhci_cmd_set_dequeue_pointer(struct grub_xhci *x, grub_uint32_t slotid
-+				       , grub_uint32_t epid
-+				       , grub_addr_t tr_deque_pointer)
-+{
-+  grub_uint32_t flags = 0;
-+  flags |= (CR_SET_TR_DEQUEUE << 10);
-+  flags |= (epid << 16);
-+  flags |= (slotid << 24);
-+
-+  xhci_trb_queue(x->cmds, tr_deque_pointer, 0, flags);
-+
-+  xhci_doorbell(x, 0, 0);
-+  int rc = xhci_event_wait(x, x->cmds, 1000);
-+  grub_dprintf("xhci", "%s: xhci_event_wait = %d\n", __func__, rc);
-+
-+  return rc;
-+}
-+
-+static int xhci_cmd_address_device(struct grub_xhci *x, grub_uint32_t slotid,
-+				   struct grub_pci_dma_chunk *inctx_dma)
-+{
-+  grub_uint32_t flags = 0;
-+  flags |= (CR_ADDRESS_DEVICE << 10);
-+  flags |= (slotid << 24);
-+
-+  grub_dprintf("xhci", "%s: slotid %d\n", __func__, slotid);
-+  return xhci_cmd_submit(x, inctx_dma, flags);
-+}
-+
-+static int xhci_cmd_configure_endpoint(struct grub_xhci *x, grub_uint32_t slotid,
-+				       struct grub_pci_dma_chunk *inctx_dma)
-+{
-+  grub_uint32_t flags = 0;
-+  flags |= (CR_CONFIGURE_ENDPOINT << 10);
-+  flags |= (slotid << 24);
-+
-+  grub_dprintf("xhci", "%s: slotid %d\n", __func__, slotid);
-+  return xhci_cmd_submit(x, inctx_dma, flags);
-+}
-+
-+static int xhci_cmd_evaluate_context(struct grub_xhci *x, grub_uint32_t slotid,
-+				     struct grub_pci_dma_chunk *inctx_dma)
-+{
-+  grub_uint32_t flags = 0;
-+  flags |= (CR_EVALUATE_CONTEXT << 10);
-+  flags |= (slotid << 24);
-+
-+  grub_dprintf("xhci", "%s: slotid %d\n", __func__, slotid);
-+  return xhci_cmd_submit(x, inctx_dma, flags);
-+}
-+
-+/****************************************************************
-+ * xHCI host controller initialization
-+ ****************************************************************/
-+
-+static grub_usb_err_t
-+grub_xhci_reset (struct grub_xhci *x)
-+{
-+  grub_uint32_t reg;
-+  grub_uint32_t end;
-+
-+  reg = grub_xhci_read32(&x->op->usbcmd);
-+  if (reg & GRUB_XHCI_CMD_RS)
-+    {
-+      reg &= ~GRUB_XHCI_CMD_RS;
-+      grub_xhci_write32(&x->op->usbcmd, reg);
-+
-+      end = grub_get_time_ms () + 32;
-+      while (grub_xhci_read32(&x->op->usbcmd) & GRUB_XHCI_STS_HCH)
-+	{
-+	  if (grub_get_time_ms () > end)
-+	      return GRUB_USB_ERR_TIMEOUT;
-+
-+	  grub_millisleep(1);
-+	}
-+    }
-+
-+  grub_dprintf("xhci", "grub_xhci_reset: resetting HC\n");
-+  grub_xhci_write32(&x->op->usbcmd, GRUB_XHCI_CMD_HCRST);
-+
-+  /* Wait for device to complete reset and be enabled */
-+  end = grub_get_time_ms () + 100;
-+  while (grub_xhci_read32(&x->op->usbcmd) & GRUB_XHCI_CMD_HCRST)
-+    {
-+      if (grub_get_time_ms () > end)
-+	  return GRUB_USB_ERR_TIMEOUT;
-+
-+      grub_millisleep(1);
-+    }
-+
-+  /* Wait for device to complete reset and be enabled */
-+  end = grub_get_time_ms () + 100;
-+  while (grub_xhci_read32(&x->op->usbsts) & GRUB_XHCI_STS_CNR)
-+    {
-+      if (grub_get_time_ms () > end)
-+	  return GRUB_USB_ERR_TIMEOUT;
-+
-+      grub_millisleep(1);
-+    }
-+
-+  grub_xhci_write32(&x->op->config, x->slots);
-+  grub_xhci_write32(&x->op->dcbaap_low, grub_dma_get_phys(x->devs_dma));
-+  grub_xhci_write32(&x->op->dcbaap_high, 0);
-+  grub_xhci_write32(&x->op->crcr_low, grub_dma_get_phys(x->cmds_dma)| 1);
-+  grub_xhci_write32(&x->op->crcr_high, 0);
-+  x->cmds->cs = 1;
-+
-+  grub_arch_sync_dma_caches(x->cmds, sizeof(*x->cmds));
-+
-+  x->eseg->ptr_low = grub_dma_get_phys(x->evts_dma);
-+  x->eseg->ptr_high = 0;
-+  x->eseg->size = GRUB_XHCI_RING_ITEMS;
-+
-+  grub_arch_sync_dma_caches(x->eseg, sizeof(*x->eseg));
-+
-+  grub_xhci_write32(&x->ir->erstsz, 1);
-+  grub_xhci_write32(&x->ir->erdp_low, grub_dma_get_phys(x->evts_dma));
-+  grub_xhci_write32(&x->ir->erdp_high, 0);
-+  grub_xhci_write32(&x->ir->erstba_low, grub_dma_get_phys(x->eseg_dma));
-+  grub_xhci_write32(&x->ir->erstba_high, 0);
-+  x->evts->cs = 1;
-+
-+  grub_arch_sync_dma_caches(x->evts, sizeof(*x->eseg));
-+
-+  xhci_check_status(x);
-+
-+  grub_dprintf ("xhci", "XHCI OP COMMAND: %08x\n",
-+		grub_xhci_read32 (&x->op->usbcmd));
-+  grub_dprintf ("xhci", "XHCI OP STATUS: %08x\n",
-+		grub_xhci_read32 (&x->op->usbsts));
-+  grub_dprintf ("xhci", "XHCI OP PAGESIZE: %08x\n",
-+		grub_xhci_read32 (&x->op->pagesize));
-+  grub_dprintf ("xhci", "XHCI OP DNCTRL: %08x\n",
-+		grub_xhci_read32 (&x->op->dnctl));
-+  grub_dprintf ("xhci", "XHCI OP CRCR_LOW: %08x\n",
-+		grub_xhci_read32 (&x->op->crcr_low));
-+  grub_dprintf ("xhci", "XHCI OP CRCR_HIGH: %08x\n",
-+		grub_xhci_read32 (&x->op->crcr_high));
-+  grub_dprintf ("xhci", "XHCI OP DCBAAP_LOW: %08x\n",
-+		grub_xhci_read32 (&x->op->dcbaap_low));
-+  grub_dprintf ("xhci", "XHCI OP DCBAAP_HIGH: %08x\n",
-+		grub_xhci_read32 (&x->op->dcbaap_high));
-+  grub_dprintf ("xhci", "XHCI OP CONFIG: %08x\n",
-+		grub_xhci_read32 (&x->op->config));
-+  grub_dprintf ("xhci", "XHCI IR ERSTSZ: %08x\n",
-+		grub_xhci_read32 (&x->ir->erstsz));
-+  grub_dprintf ("xhci", "XHCI IR ERDP: %08x\n",
-+		grub_xhci_read32 (&x->ir->erdp_low));
-+  grub_dprintf ("xhci", "XHCI IR ERSTBA: %08x\n",
-+		grub_xhci_read32 (&x->ir->erstba_low));
-+
-+  xhci_check_status(x);
-+
-+  return GRUB_USB_ERR_NONE;
-+}
-+
-+static grub_usb_err_t
-+grub_xhci_request_legacy_handoff(volatile struct grub_xhci_xcap *xcap)
-+{
-+  grub_uint32_t end;
-+
-+  end = grub_get_time_ms () + 10;
-+  for (;;)
-+    {
-+      grub_uint32_t cap = grub_xhci_read32(&xcap->cap);
-+      if (cap & (1 << 16))
-+	grub_xhci_write32(&xcap->cap, cap | (1 << 24));
-+      else
-+        break;
-+
-+      if (grub_get_time_ms () > end)
-+	{
-+	  grub_dprintf ("xhci","ERROR: %s TIMEOUT\n", __func__);
-+	  return GRUB_USB_ERR_TIMEOUT;
-+	}
-+      grub_millisleep(1);
-+    }
-+  return GRUB_USB_ERR_NONE;
-+}
-+
-+static void
-+grub_xhci_fill_default_speed_mapping(struct grub_xhci_psids *ids)
-+{
-+	/* Chapter 7.2.2.1.1 "Default USB Speed ID Mapping" */
-+	ids->psids[0].id = 1;
-+	ids->psids[0].psie = 2;
-+	ids->psids[0].psim = 12;
-+	ids->psids[1].id = 2;
-+	ids->psids[1].psie = 1;
-+	ids->psids[1].psim = 1500;
-+	ids->psids[2].id = 3;
-+	ids->psids[2].psie = 2;
-+	ids->psids[2].psim = 480;
-+	ids->psids[3].id = 4;
-+	ids->psids[3].psie = 3;
-+	ids->psids[3].psim = 5;
-+	ids->psids[4].id = 5;
-+	ids->psids[4].psie = 3;
-+	ids->psids[4].psim = 10;
-+	ids->psids[5].id = 6;
-+	ids->psids[5].psie = 3;
-+	ids->psids[5].psim = 10;
-+	ids->psids[6].id = 7;
-+	ids->psids[6].psie = 3;
-+	ids->psids[6].psim = 20;
-+}
-+
-+static void
-+grub_xhci_calc_speed_mapping(struct grub_xhci_psids *ids)
-+{
-+  const grub_uint64_t mult[4] = {1ULL, 1000ULL, 1000000ULL, 1000000000ULL};
-+
-+  for (grub_uint8_t i = 0; i < 16; i++)
-+    {
-+      if (ids->psids[i].id == 0)
-+	continue;
-+      ids->psids[i].bitrate = mult[ids->psids[i].psie & 3] * (grub_uint64_t)ids->psids[i].psim;
-+      if (ids->psids[i].bitrate < 12000000ULL)
-+	ids->psids[i].grub_usb_speed = GRUB_USB_SPEED_LOW;
-+      else if (ids->psids[i].bitrate < 480000000ULL)
-+	ids->psids[i].grub_usb_speed = GRUB_USB_SPEED_FULL;
-+      else if (ids->psids[i].bitrate > 1200000000ULL)
-+	ids->psids[i].grub_usb_speed = GRUB_USB_SPEED_SUPER;
-+      else
-+	ids->psids[i].grub_usb_speed = GRUB_USB_SPEED_HIGH;
-+    }
-+}
-+
-+
-+/* PCI iteration function... */
-+void
-+grub_xhci_init_device (volatile void *regs)
-+{
-+  struct grub_xhci *x;
-+  grub_uint32_t hcs1, hcc, reg;
-+
-+  /* Allocate memory for the controller and fill basic values. */
-+  x = grub_zalloc (sizeof (*x));
-+  if (!x)
-+    {
-+      grub_dprintf("xhci", "Failed to allocate memory\n");
-+      return;
-+    }
-+  x->caps = (volatile struct grub_xhci_caps *) regs;
-+  x->op = (volatile struct grub_xhci_op *) (((grub_uint8_t *)regs) +
-+      grub_xhci_read8(&x->caps->caplength));
-+  x->pr = (volatile struct grub_xhci_pr *) (((grub_uint8_t *)x->op) +
-+      GRUB_XHCI_PR_OFFSET);
-+  x->db = (volatile struct grub_xhci_db *) (((grub_uint8_t *)regs) +
-+      grub_xhci_read32(&x->caps->dboff));
-+  x->ir = (volatile struct grub_xhci_ir *) (((grub_uint8_t *)regs) +
-+		  grub_xhci_read32(&x->caps->rtsoff) + GRUB_XHCI_IR_OFFSET);
-+
-+  grub_dprintf ("xhci", "XHCI init: CAPLENGTH: 0x%02x\n",
-+		grub_xhci_read8 (&x->caps->caplength));
-+  grub_dprintf ("xhci", "XHCI init: HCIVERSION: 0x%04x\n",
-+		grub_xhci_read16 (&x->caps->hciversion));
-+  grub_dprintf ("xhci", "XHCI init: HCSPARAMS1: 0x%08x\n",
-+		grub_xhci_read32 (&x->caps->hcsparams1));
-+  grub_dprintf ("xhci", "XHCI init: HCSPARAMS2: 0x%08x\n",
-+		grub_xhci_read32 (&x->caps->hcsparams2));
-+  grub_dprintf ("xhci", "XHCI init: HCSPARAMS3: 0x%08x\n",
-+		grub_xhci_read32 (&x->caps->hcsparams3));
-+  grub_dprintf ("xhci", "XHCI init: HCCPARAMS: 0x%08x\n",
-+		grub_xhci_read32 (&x->caps->hcsparams3));
-+  grub_dprintf ("xhci", "XHCI init: DBOFF: 0x%08x\n",
-+		grub_xhci_read32 (&x->caps->dboff));
-+  grub_dprintf ("xhci", "XHCI init: RTOFF: 0x%08x\n",
-+		grub_xhci_read32 (&x->caps->rtsoff));
-+
-+  hcs1 = grub_xhci_read32(&x->caps->hcsparams1);
-+  hcc = grub_xhci_read32(&x->caps->hccparams);
-+  x->ports = (grub_uint32_t) ((hcs1 >> 24) & 0xff);
-+  x->slots = (grub_uint32_t) (hcs1	 & 0xff);
-+  x->xcap  = (grub_uint32_t) ((hcc >> 16) & 0xffff) * sizeof(grub_uint32_t);
-+  x->flag64 = (grub_uint8_t) ((hcc & 0x04) ? 1 : 0);
-+  grub_dprintf("xhci", "XHCI init: %d ports, %d slots, %d byte contexts\n"
-+	       , x->ports, x->slots, x->flag64 ? 64 : 32);
-+
-+  x->psids = grub_zalloc (sizeof (struct grub_xhci_psids) * x->ports);
-+  if (x->xcap)
-+    {
-+      grub_uint32_t off;
-+      volatile grub_uint8_t *addr = (grub_uint8_t *) x->caps + x->xcap;
-+      do
-+	{
-+	  volatile struct grub_xhci_xcap *xcap = (void *)addr;
-+	  grub_uint32_t ports, name, cap = grub_xhci_read32(&xcap->cap);
-+	  switch (cap & 0xff) {
-+	    case XHCI_CAP_LEGACY_SUPPORT:
-+	      {
-+		if (grub_xhci_request_legacy_handoff(xcap) != GRUB_USB_ERR_NONE)
-+		  {
-+		    grub_dprintf("xhci", "XHCI init: Failed to get xHCI ownership\n");
-+		    goto fail;
-+		  }
-+	        break;
-+	      }
-+	    case XHCI_CAP_SUPPORTED_PROTOCOL:
-+	      {
-+		name  = grub_xhci_read32(&xcap->data[0]);
-+		ports = grub_xhci_read32(&xcap->data[1]);
-+		const grub_uint8_t major = (cap >> 24) & 0xff;
-+		const grub_uint8_t minor = (cap >> 16) & 0xff;
-+		const grub_uint8_t psic = (ports >> 28) & 0xf;
-+		const grub_uint8_t count = (ports >> 8) & 0xff;
-+		const grub_uint8_t start = (ports >> 0) & 0xff;
-+		grub_dprintf("xhci", "XHCI init: protocol %c%c%c%c %x.%02x"
-+				", %d ports (offset %d), def %x, psic %d\n"
-+				, (name >>  0) & 0xff
-+				, (name >>  8) & 0xff
-+				, (name >> 16) & 0xff
-+				, (name >> 24) & 0xff
-+				, major, minor
-+				, count, start
-+				, ports >> 16
-+				, psic);
-+		if (name == 0x20425355 /* "USB " */)
-+		  {
-+		    if (major == 2)
-+		      {
-+			x->usb2.start = start;
-+			x->usb2.count = count;
-+		      }
-+		    else if (major == 3)
-+		      {
-+			x->usb3.start = start;
-+			x->usb3.count = count;
-+		      }
-+
-+		    for (grub_uint32_t p = start - 1; p < start + count - 1UL; p++)
-+		      {
-+			x->psids[p].major = major;
-+			x->psids[p].minor = minor;
-+			grub_xhci_fill_default_speed_mapping(&x->psids[p]);
-+			for (grub_uint8_t i = 0; i < psic; i++)
-+			  {
-+			    grub_uint32_t psid = grub_xhci_read32(&xcap->data[3 + i]);
-+			    x->psids[p].psids[i].id = (psid >> 0) & 0xf;
-+			    x->psids[p].psids[i].psie = (psid >> 4) & 0x3;
-+			    x->psids[p].psids[i].psim = (psid >> 16) & 0xfffff;
-+			  }
-+			grub_xhci_calc_speed_mapping(&x->psids[p]);
-+		      }
-+		  }
-+
-+		break;
-+	      }
-+	    default:
-+	      {
-+	        grub_dprintf("xhci", "XHCI    extcap 0x%x @ %p\n", cap & 0xff, addr);
-+	        break;
-+	      }
-+	  }
-+	off = (cap >> 8) & 0xff;
-+	addr += off << 2;
-+	}
-+      while (off > 0);
-+    }
-+
-+  x->pagesize = xhci_get_pagesize(x);
-+  grub_dprintf("xhci", "XHCI init: Minimum supported page size 0x%x\n",
-+	       x->pagesize);
-+
-+  /* Chapter 6.1 Device Context Base Address Array */
-+  x->devs_dma = xhci_memalign_dma32(ALIGN_DCBAA,
-+				    sizeof(*x->devs) * (x->slots + 1),
-+				    x->pagesize);
-+  if (!x->devs_dma)
-+      goto fail;
-+  x->devs = grub_dma_get_virt(x->devs_dma);
-+  grub_memset((void *)x->devs, 0, sizeof(*x->devs) * (x->slots + 1));
-+  grub_arch_sync_dma_caches(x->devs, sizeof(*x->devs) * (x->slots + 1));
-+  grub_dprintf ("xhci", "XHCI init: device memory %p (%x)\n",
-+		grub_dma_get_virt(x->devs_dma),
-+		grub_dma_get_phys(x->devs_dma));
-+
-+  /* Chapter 6.5 Event Ring Segment Table */
-+  x->eseg_dma = xhci_memalign_dma32(ALIGN_EVT_RING_TABLE, sizeof(*x->eseg), 0);
-+  if (!x->eseg_dma)
-+      goto fail;
-+  x->eseg = grub_dma_get_virt(x->eseg_dma);
-+  grub_memset((void *)x->eseg, 0, sizeof(*x->eseg));
-+  grub_arch_sync_dma_caches(x->eseg, sizeof(*x->eseg));
-+  grub_dprintf ("xhci", "XHCI init: event ring table memory %p (%x)\n",
-+		grub_dma_get_virt(x->eseg_dma),
-+		grub_dma_get_phys(x->eseg_dma));
-+
-+  x->cmds_dma = xhci_memalign_dma32(ALIGN_CMD_RING_SEG, sizeof(*x->cmds),
-+				    BOUNDARY_RING);
-+  if (!x->cmds_dma)
-+      goto fail;
-+  x->cmds = grub_dma_get_virt(x->cmds_dma);
-+  grub_memset((void *)x->cmds, 0, sizeof(*x->cmds));
-+  grub_arch_sync_dma_caches(x->cmds, sizeof(*x->cmds));
-+  grub_dprintf ("xhci", "XHCI init: command ring memory %p (%x)\n",
-+		grub_dma_get_virt(x->cmds_dma),
-+		grub_dma_get_phys(x->cmds_dma));
-+
-+  x->evts_dma = xhci_memalign_dma32(ALIGN_EVT_RING_SEG, sizeof(*x->evts),
-+				    BOUNDARY_RING);
-+  if (!x->evts_dma)
-+      goto fail;
-+  x->evts = grub_dma_get_virt(x->evts_dma);
-+  grub_memset((void *)x->evts, 0, sizeof(*x->evts));
-+  grub_arch_sync_dma_caches(x->evts, sizeof(*x->evts));
-+  grub_dprintf ("xhci", "XHCI init: event ring memory %p (%x)\n",
-+		grub_dma_get_virt(x->evts_dma),
-+		grub_dma_get_phys(x->evts_dma));
-+
-+  /* Chapter 4.20 Scratchpad Buffers */
-+  reg = grub_xhci_read32(&x->caps->hcsparams2);
-+  x->spb = (reg >> 21 & 0x1f) << 5 | reg >> 27;
-+  if (x->spb)
-+    {
-+      volatile grub_uint64_t *spba;
-+      grub_dprintf("xhci", "XHCI init: set up %d scratch pad buffers\n",
-+		   x->spb);
-+      x->spba_dma = xhci_memalign_dma32(ALIGN_SPBA, sizeof(*spba) * x->spb,
-+					x->pagesize);
-+      if (!x->spba_dma)
-+	goto fail;
-+
-+      x->spad_dma = xhci_memalign_dma32(x->pagesize, x->pagesize * x->spb,
-+					x->pagesize);
-+      if (!x->spad_dma)
-+	{
-+	  grub_dma_free(x->spba_dma);
-+	  goto fail;
-+	}
-+
-+      spba = grub_dma_get_virt(x->spba_dma);
-+      for (grub_uint32_t i = 0; i < x->spb; i++)
-+	spba[i] = (grub_addr_t)grub_dma_get_phys(x->spad_dma) + (i * x->pagesize);
-+      grub_arch_sync_dma_caches(x->spba_dma, sizeof(*spba) * x->spb);
-+
-+      x->devs[0].ptr_low = grub_dma_get_phys(x->spba_dma);
-+      x->devs[0].ptr_high = 0;
-+      grub_arch_sync_dma_caches(x->devs_dma, sizeof(x->devs[0]));
-+      grub_dprintf ("xhci", "XHCI init: Allocated %d scratch buffers of size 0x%x\n",
-+		    x->spb, x->pagesize);
-+    }
-+
-+  grub_xhci_reset(x);
-+
-+  /* Set the running bit */
-+  reg = grub_xhci_read32 (&x->op->usbcmd);
-+  reg |= GRUB_XHCI_CMD_RS;
-+  grub_xhci_write32 (&x->op->usbcmd, reg);
-+
-+
-+  /* Link to xhci now that initialisation is successful.  */
-+  x->next = xhci;
-+  xhci = x;
-+
-+  return;
-+
-+fail:
-+  grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: FAILED!\n");
-+  if (x)
-+    {
-+      if (x->devs_dma)
-+	grub_dma_free (x->devs_dma);
-+      if (x->eseg_dma)
-+	grub_dma_free (x->eseg_dma);
-+      if (x->cmds_dma)
-+	grub_dma_free (x->cmds_dma);
-+      if (x->evts_dma)
-+	grub_dma_free (x->evts_dma);
-+      if (x->spad_dma)
-+	grub_dma_free (x->spad_dma);
-+      if (x->spba_dma)
-+	grub_dma_free (x->spba_dma);
-+    }
-+  grub_free (x);
-+
-+  return;
-+}
-+
-+static int
-+grub_xhci_iterate (grub_usb_controller_iterate_hook_t hook, void *hook_data)
-+{
-+  struct grub_xhci *x;
-+  struct grub_usb_controller dev;
-+
-+  for (x = xhci; x; x = x->next)
-+    {
-+      dev.data = x;
-+      if (hook (&dev, hook_data))
-+	return 1;
-+    }
-+
-+  return 0;
-+}
-+
-+/****************************************************************
-+ * xHCI maintainance functions 
-+ ****************************************************************/
-+
-+static grub_usb_err_t
-+grub_xhci_update_hub_portcount (struct grub_xhci *x,
-+				grub_usb_transfer_t transfer,
-+				grub_uint32_t slotid)
-+{
-+  struct grub_pci_dma_chunk *in_dma;
-+  volatile struct grub_xhci_slotctx *hdslot;
-+  grub_uint32_t epid = 0;
-+
-+  if (!transfer || !transfer->dev || !transfer->dev->nports)
-+    return GRUB_USB_ERR_NONE;
-+
-+  hdslot = grub_dma_phys2virt(x->devs[slotid].ptr_low, x->devs_dma);
-+  if ((hdslot->ctx[3] >> 27) == 3)
-+    /* Already configured */
-+    return 0;
-+
-+  grub_dprintf("xhci", "%s: updating hub config to %d ports\n", __func__,
-+	       transfer->dev->nports);
-+
-+  xhci_check_status(x);
-+
-+  /* Allocate input context and initialize endpoint info. */
-+  in_dma = grub_xhci_alloc_inctx(x, epid, transfer->dev);
-+  if (!in_dma)
-+    return GRUB_USB_ERR_INTERNAL;
-+  volatile struct grub_xhci_inctx *in = grub_dma_get_virt(in_dma);
-+
-+  in->add = (1 << epid);
-+
-+  struct grub_xhci_epctx *ep = (void*)&in[(epid+1) << x->flag64];
-+  ep->ctx[0]   |= 1 << 26;
-+  ep->ctx[1]   |= transfer->dev->nports << 24;
-+
-+  int cc = xhci_cmd_configure_endpoint(x, slotid, in_dma);
-+  grub_dma_free(in_dma);
-+
-+  if (cc != CC_SUCCESS)
-+    {
-+      grub_dprintf("xhci", "%s: reconf ctl endpoint: failed (cc %d)\n",
-+		   __func__, cc);
-+      return GRUB_USB_ERR_BADDEVICE;
-+    }
-+
-+  return GRUB_USB_ERR_NONE;
-+}
-+
-+static grub_usb_err_t
-+grub_xhci_update_max_paket_size (struct grub_xhci *x,
-+				 grub_usb_transfer_t transfer,
-+				 grub_uint32_t slotid,
-+				 grub_uint32_t max_packet)
-+{
-+  struct grub_pci_dma_chunk *in_dma;
-+  grub_uint32_t epid = 1;
-+
-+  if (!transfer || !transfer->dev || !max_packet)
-+    return GRUB_USB_ERR_NONE;
-+
-+  grub_dprintf("xhci", "%s: updating max packet size to 0x%x\n", __func__,
-+	       max_packet);
-+
-+  xhci_check_status(x);
-+
-+  /* Allocate input context and initialize endpoint info. */
-+  in_dma = grub_xhci_alloc_inctx(x, epid, transfer->dev);
-+  if (!in_dma)
-+    return GRUB_USB_ERR_INTERNAL;
-+  volatile struct grub_xhci_inctx *in = grub_dma_get_virt(in_dma);
-+  in->add = (1 << epid);
-+
-+  struct grub_xhci_epctx *ep = (void*)&in[(epid+1) << x->flag64];
-+  ep->ctx[1]   |= max_packet << 16;
-+
-+  int cc = xhci_cmd_evaluate_context(x, slotid, in_dma);
-+  grub_dma_free(in_dma);
-+
-+  if (cc != CC_SUCCESS)
-+    {
-+      grub_dprintf("xhci", "%s: reconf ctl endpoint: failed (cc %d)\n",
-+		   __func__, cc);
-+      return GRUB_USB_ERR_BADDEVICE;
-+    }
-+
-+  return GRUB_USB_ERR_NONE;
-+}
-+
-+/****************************************************************
-+ * xHCI endpoint enablement functions
-+ ****************************************************************/
-+
-+static grub_usb_err_t
-+grub_xhci_prepare_endpoint (struct grub_xhci *x,
-+			    struct grub_usb_device *dev,
-+			    grub_uint8_t endpoint,
-+			    grub_transfer_type_t dir,
-+			    grub_transaction_type_t type,
-+			    grub_uint32_t maxpaket,
-+			    struct grub_xhci_priv *priv)
-+{
-+  grub_uint32_t epid;
-+  struct grub_pci_dma_chunk *reqs_dma;
-+  struct grub_pci_dma_chunk *in_dma;
-+  volatile struct grub_xhci_ring *reqs;
-+  volatile struct grub_xhci_slotctx *slotctx;
-+
-+  if (!x || !priv)
-+    return GRUB_USB_ERR_INTERNAL;
-+
-+  xhci_check_status(x);
-+
-+  if (endpoint == 0)
-+    {
-+      epid = 1;
-+    }
-+  else
-+    {
-+      epid = (endpoint & 0x0f) * 2;
-+      epid += (dir == GRUB_USB_TRANSFER_TYPE_IN) ? 1 : 0;
-+    }
-+  grub_dprintf("xhci", "%s: epid %d\n", __func__, epid);
-+
-+  /* Test if already prepared */
-+  if (priv->slotid > 0 && priv->enpoint_trbs[epid] != NULL)
-+    return GRUB_USB_ERR_NONE;
-+
-+  /* Allocate DMA buffer as endpoint cmd TRB */
-+  reqs_dma = xhci_memalign_dma32(ALIGN_TRB, sizeof(*reqs),
-+				 BOUNDARY_RING);
-+  if (!reqs_dma)
-+    return GRUB_USB_ERR_INTERNAL;
-+  reqs = grub_dma_get_virt(reqs_dma);
-+  grub_memset((void *)reqs, 0, sizeof(*reqs));
-+  reqs->cs = 1;
-+
-+  grub_arch_sync_dma_caches(reqs, sizeof(*reqs));
-+
-+  /* Allocate input context and initialize endpoint info. */
-+  in_dma = grub_xhci_alloc_inctx(x, epid, dev);
-+  if (!in_dma)
-+    {
-+      grub_dma_free(reqs_dma);
-+      return GRUB_USB_ERR_INTERNAL;
-+    }
-+  volatile struct grub_xhci_inctx *in = grub_dma_get_virt(in_dma);
-+  in->add = 0x01 | (1 << epid);
-+
-+  struct grub_xhci_epctx *ep = (void*)&in[(epid+1) << x->flag64];
-+  switch (type)
-+    {
-+      case GRUB_USB_TRANSACTION_TYPE_CONTROL:
-+        ep->ctx[1]   |= 0 << 3;
-+        break;
-+      case GRUB_USB_TRANSACTION_TYPE_BULK:
-+        ep->ctx[1]   |= 2 << 3;
-+        break;
-+    }
-+  if (dir == GRUB_USB_TRANSFER_TYPE_IN
-+      || type== GRUB_USB_TRANSACTION_TYPE_CONTROL)
-+      ep->ctx[1] |= 1 << 5;
-+  ep->ctx[1]   |= maxpaket << 16;
-+  ep->deq_low  = grub_dma_get_phys(reqs_dma);
-+  ep->deq_low  |= 1;	 /* dcs */
-+  ep->length   = maxpaket;
-+
-+  grub_dprintf("xhci", "%s: ring %p, epid %d, max %d\n", __func__,
-+	       reqs, epid, maxpaket);
-+  if (epid == 1 || priv->slotid == 0) {
-+    /* Enable slot. */
-+    int slotid = xhci_cmd_enable_slot(x);
-+    if (slotid < 0)
-+      {
-+	grub_dprintf("xhci", "%s: enable slot: failed\n", __func__);
-+	grub_dma_free(reqs_dma);
-+	grub_dma_free(in_dma);
-+	return GRUB_USB_ERR_BADDEVICE;
-+      }
-+    grub_dprintf("xhci", "%s: get slot %d assigned\n", __func__, slotid);
-+
-+    grub_uint32_t size = (sizeof(struct grub_xhci_slotctx) * GRUB_XHCI_MAX_ENDPOINTS) << x->flag64;
-+
-+    /* Allocate memory for the device specific slot context */
-+    priv->slotctx_dma = xhci_memalign_dma32(ALIGN_SLOTCTX, size,
-+					    x->pagesize);
-+    if (!priv->slotctx_dma)
-+      {
-+	grub_dprintf("xhci", "%s: grub_memalign_dma32 failed\n", __func__);
-+	grub_dma_free(reqs_dma);
-+	grub_dma_free(in_dma);
-+	return GRUB_USB_ERR_INTERNAL;
-+      }
-+    slotctx = grub_dma_get_virt(priv->slotctx_dma);
-+
-+    grub_dprintf("xhci", "%s: enable slot: got slotid %d\n", __func__, slotid);
-+    grub_memset((void *)slotctx, 0, size);
-+    grub_arch_sync_dma_caches(slotctx, size);
-+
-+    x->devs[slotid].ptr_low = grub_dma_get_phys(priv->slotctx_dma);
-+    x->devs[slotid].ptr_high = 0;
-+    grub_arch_sync_dma_caches(&x->devs[slotid], sizeof(x->devs[0]));
-+
-+    /* Send set_address command. */
-+    int cc = xhci_cmd_address_device(x, slotid, in_dma);
-+    if (cc != CC_SUCCESS)
-+      {
-+	grub_dprintf("xhci","%s: address device: failed (cc %d)\n", __func__, cc);
-+	cc = xhci_cmd_disable_slot(x, slotid);
-+	if (cc != CC_SUCCESS) {
-+	    grub_dprintf("xhci", "%s: disable failed (cc %d)\n", __func__, cc);
-+	} else {
-+	  x->devs[slotid].ptr_low = 0;
-+	  x->devs[slotid].ptr_high = 0;
-+	  grub_arch_sync_dma_caches(&x->devs[slotid], sizeof(x->devs[0]));
-+	}
-+	grub_dma_free(priv->slotctx_dma);
-+	grub_dma_free(reqs_dma);
-+	grub_dma_free(in_dma);
-+	return GRUB_USB_ERR_BADDEVICE;
-+      }
-+    priv->enpoint_trbs[epid] = reqs;
-+    priv->enpoint_trbs_dma[epid] = reqs_dma;
-+    priv->slotid = slotid;
-+    priv->max_packet = 0;
-+  }
-+  if (epid != 1)
-+    {
-+	/* Send configure command. */
-+	int cc = xhci_cmd_configure_endpoint(x, priv->slotid, in_dma);
-+	if (cc != CC_SUCCESS)
-+	  {
-+	    grub_dprintf("xhci", "%s: configure endpoint: failed (cc %d)\n",
-+			 __func__, cc);
-+	    grub_dma_free(reqs_dma);
-+	    grub_dma_free(in_dma);
-+	    return GRUB_USB_ERR_BADDEVICE;
-+	  }
-+      priv->enpoint_trbs[epid] = reqs;
-+      priv->enpoint_trbs_dma[epid] = reqs_dma;
-+    }
-+
-+  grub_dprintf("xhci", "%s: done\n", __func__);
-+  grub_dma_free(in_dma);
-+
-+  return GRUB_USB_ERR_NONE;
-+}
-+
-+
-+/****************************************************************
-+ * xHCI transfer helper functions
-+ ****************************************************************/
-+
-+static grub_usb_err_t
-+grub_xhci_usb_to_grub_err (unsigned char status)
-+{
-+  if (status != CC_SUCCESS)
-+    grub_dprintf("xhci", "%s: xfer failed (cc %d)\n", __func__, status);
-+  else
-+    grub_dprintf("xhci", "%s: xfer done   (cc %d)\n", __func__, status);
-+
-+  if (status == CC_BABBLE_DETECTED)
-+    return GRUB_USB_ERR_BABBLE;
-+  else if (status == CC_DATA_BUFFER_ERROR)
-+    return GRUB_USB_ERR_DATA;
-+  else if (status == CC_STALL_ERROR)
-+    return GRUB_USB_ERR_STALL;
-+  else if (status != CC_SUCCESS)
-+    return GRUB_USB_ERR_NAK;
-+
-+  return GRUB_USB_ERR_NONE;
-+}
-+
-+static int
-+grub_xhci_transfer_is_zlp(grub_usb_transfer_t transfer, int idx)
-+{
-+  if (idx >= transfer->transcnt)
-+    return 0;
-+
-+  grub_usb_transaction_t tr = &transfer->transactions[idx];
-+
-+  return (tr->size == 0) &&
-+    ((tr->pid == GRUB_USB_TRANSFER_TYPE_OUT) ||
-+    (tr->pid == GRUB_USB_TRANSFER_TYPE_IN));
-+}
-+
-+static int
-+grub_xhci_transfer_is_last(grub_usb_transfer_t transfer, int idx)
-+{
-+    return (idx + 1) == transfer->transcnt;
-+}
-+
-+static int
-+grub_xhci_transfer_is_data(grub_usb_transfer_t transfer, int idx)
-+{
-+  grub_usb_transaction_t tr;
-+
-+  if (idx >= transfer->transcnt)
-+    return 0;
-+
-+  tr = &transfer->transactions[idx];
-+  if (tr->size == 0 ||
-+      (tr->pid == GRUB_USB_TRANSFER_TYPE_SETUP))
-+    return 0;
-+
-+  /* If there's are no DATA pakets before it's a DATA paket */
-+  for (int i = idx - 1; i >= 0; i--)
-+    {
-+      tr = &transfer->transactions[i];
-+      if (tr->size > 0 &&
-+	  ((tr->pid == GRUB_USB_TRANSFER_TYPE_OUT) ||
-+	  (tr->pid == GRUB_USB_TRANSFER_TYPE_IN)))
-+	    return 0;
-+    }
-+  return 1;
-+}
-+
-+static int
-+grub_xhci_transfer_is_in(grub_usb_transfer_t transfer, int idx)
-+{
-+  grub_usb_transaction_t tr;
-+
-+  if (idx >= transfer->transcnt)
-+    return 0;
-+
-+  tr = &transfer->transactions[idx];
-+
-+  return tr->pid == GRUB_USB_TRANSFER_TYPE_IN;
-+}
-+
-+static int
-+grub_xhci_transfer_is_normal(grub_usb_transfer_t transfer, int idx)
-+{
-+  grub_usb_transaction_t tr;
-+
-+  if (idx >= transfer->transcnt)
-+    return 0;
-+
-+  tr = &transfer->transactions[idx];
-+  if (tr->size == 0 ||
-+      (tr->pid == GRUB_USB_TRANSFER_TYPE_SETUP))
-+    return 0;
-+
-+  /* If there's at least one DATA paket before it's a normal */
-+  for (int i = idx - 1; i >= 0; i--)
-+    {
-+      tr = &transfer->transactions[i];
-+      if (tr->size > 0 &&
-+	  ((tr->pid == GRUB_USB_TRANSFER_TYPE_OUT) ||
-+	  (tr->pid == GRUB_USB_TRANSFER_TYPE_IN)))
-+	    return 1;
-+
-+    }
-+  return 0;
-+}
-+
-+static int
-+grub_xhci_transfer_next_is_normal(grub_usb_transfer_t transfer, int idx)
-+{
-+  return grub_xhci_transfer_is_normal(transfer, idx + 1);
-+}
-+
-+static int
-+grub_xhci_transfer_next_is_in(grub_usb_transfer_t transfer, int idx)
-+{
-+  return grub_xhci_transfer_is_in(transfer, idx + 1);
-+}
-+
-+static grub_uint8_t grub_xhci_epid_from_transfer(grub_usb_transfer_t transfer)
-+{
-+  grub_uint8_t epid;
-+
-+  if (transfer->endpoint == 0) {
-+      epid = 1;
-+  } else {
-+    epid = (transfer->endpoint & 0x0f) * 2;
-+    epid += (transfer->dir == GRUB_USB_TRANSFER_TYPE_IN) ? 1 : 0;
-+  }
-+  return epid;
-+}
-+
-+/****************************************************************
-+ * xHCI transfer functions
-+ ****************************************************************/
-+
-+static grub_usb_err_t
-+grub_xhci_setup_transfer (grub_usb_controller_t dev,
-+			  grub_usb_transfer_t transfer)
-+{
-+  struct grub_xhci_transfer_controller_data *cdata;
-+  struct grub_xhci *x = (struct grub_xhci *) dev->data;
-+  grub_uint8_t epid;
-+  grub_usb_err_t err;
-+  volatile struct grub_xhci_ring *reqs;
-+  int rc;
-+  struct grub_xhci_priv *priv;
-+
-+   xhci_check_status(x);
-+
-+  if (!dev || !transfer || !transfer->dev || !transfer->dev->xhci_priv)
-+    return GRUB_USB_ERR_INTERNAL;
-+
-+  priv = transfer->dev->xhci_priv;
-+  err = grub_xhci_prepare_endpoint(x, transfer->dev,
-+				   transfer->endpoint,
-+				   transfer->dir,
-+				   transfer->type,
-+				   transfer->max,
-+				   priv);
-+
-+  if (err != GRUB_USB_ERR_NONE)
-+    return err;
-+
-+  epid = grub_xhci_epid_from_transfer(transfer);
-+
-+  /* Update the max packet size once descdev.maxsize0 is valid */
-+  if (epid == 1 &&
-+      (priv->max_packet == 0) &&
-+      (transfer->dev->descdev.maxsize0 > 0))
-+    {
-+      if (transfer->dev->speed == GRUB_USB_SPEED_SUPER)
-+        priv->max_packet = 1UL << transfer->dev->descdev.maxsize0;
-+      else
-+        priv->max_packet = transfer->dev->descdev.maxsize0;
-+      err = grub_xhci_update_max_paket_size(x, transfer, priv->slotid, priv->max_packet);
-+      if (err != GRUB_USB_ERR_NONE)
-+        {
-+          grub_dprintf("xhci", "%s: Updating max paket size failed\n", __func__);
-+          return err;
-+        }
-+    }
-+  if (epid == 1 &&
-+      transfer->dev->descdev.class == 9 &&
-+      transfer->dev->nports > 0)
-+    {
-+      err = grub_xhci_update_hub_portcount(x, transfer, priv->slotid);
-+      if (err != GRUB_USB_ERR_NONE)
-+        {
-+          grub_dprintf("xhci", "%s: Updating max paket size failed\n", __func__);
-+          return err;
-+        }
-+    }
-+
-+  /* Allocate private data for the transfer */
-+  cdata = grub_zalloc(sizeof(*cdata));
-+  if (!cdata)
-+    return GRUB_USB_ERR_INTERNAL;
-+
-+  reqs = priv->enpoint_trbs[epid];
-+
-+  transfer->controller_data = cdata;
-+
-+  /* Now queue the transfer onto the TRB */
-+  if (transfer->type == GRUB_USB_TRANSACTION_TYPE_CONTROL)
-+  {
-+    volatile struct grub_usb_packet_setup *setupdata;
-+    setupdata = (void *)transfer->transactions[0].data;
-+    grub_dprintf("xhci", "%s: CONTROLL TRANS req %d\n", __func__, setupdata->request);
-+    grub_dprintf("xhci", "%s: CONTROLL TRANS length %d\n", __func__, setupdata->length);
-+
-+    if (setupdata && setupdata->request == GRUB_USB_REQ_SET_ADDRESS)
-+      return GRUB_USB_ERR_NONE;
-+
-+    if (transfer->transcnt < 2)
-+      return GRUB_USB_ERR_INTERNAL;
-+
-+    for (int i = 0; i < transfer->transcnt; i++)
-+      {
-+	grub_uint32_t flags = 0;
-+	grub_uint64_t inline_data;
-+	grub_usb_transaction_t tr = &transfer->transactions[i];
-+
-+	switch (tr->pid)
-+	  {
-+	    case GRUB_USB_TRANSFER_TYPE_SETUP:
-+	      {
-+		grub_dprintf("xhci", "%s: SETUP PKG\n", __func__);
-+		grub_dprintf("xhci", "%s: transfer->size %d\n", __func__, transfer->size);
-+		grub_dprintf("xhci", "%s: tr->size %d SETUP PKG\n", __func__, tr->size);
-+
-+		flags |= (TR_SETUP << 10);
-+		flags |= TRB_TR_IDT;
-+
-+		if (transfer->size > 0)
-+		  {
-+		    if (grub_xhci_transfer_next_is_in(transfer, i))
-+		      flags |= (3 << 16); /* TRT IN */
-+		    else
-+		      flags |= (2 << 16); /* TRT OUT */
-+		  }
-+		break;
-+	      }
-+	    case GRUB_USB_TRANSFER_TYPE_OUT:
-+	      {
-+		grub_dprintf("xhci", "%s: OUT PKG\n", __func__);
-+		cdata->transfer_size += tr->size;
-+		break;
-+	      }
-+	    case GRUB_USB_TRANSFER_TYPE_IN:
-+	      {
-+		grub_dprintf("xhci", "%s: IN PKG\n", __func__);
-+		cdata->transfer_size += tr->size;
-+		flags |= TRB_TR_DIR;
-+		break;
-+	      }
-+	  }
-+
-+	if (grub_xhci_transfer_is_normal(transfer, i))
-+	  flags |= (TR_NORMAL << 10);
-+	else if (grub_xhci_transfer_is_data(transfer, i))
-+	  flags |= (TR_DATA << 10);
-+	else if (grub_xhci_transfer_is_zlp(transfer, i))
-+	  flags |= (TR_STATUS << 10);
-+
-+	if (grub_xhci_transfer_next_is_normal(transfer, i))
-+	  flags |= TRB_TR_CH;
-+
-+	if (grub_xhci_transfer_is_last(transfer, i))
-+	  flags |= TRB_TR_IOC;
-+
-+	/* Assume the ring has enough free space for all TRBs */
-+	if (flags & TRB_TR_IDT && tr->size <= (int)sizeof(inline_data))
-+	  {
-+	    grub_memcpy(&inline_data, (void *)tr->data, tr->size);
-+	    xhci_trb_queue(reqs, inline_data, tr->size, flags);
-+	  }
-+	else
-+	  {
-+	    xhci_trb_queue(reqs, tr->data, tr->size, flags);
-+	  }
-+      }
-+  }
-+  else if (transfer->type == GRUB_USB_TRANSACTION_TYPE_BULK)
-+    {
-+      for (int i = 0; i < transfer->transcnt; i++)
-+	{
-+	  grub_uint32_t flags = (TR_NORMAL << 10);
-+	  grub_usb_transaction_t tr = &transfer->transactions[i];
-+	  switch (tr->pid)
-+	    {
-+	      case GRUB_USB_TRANSFER_TYPE_OUT:
-+		{
-+		  grub_dprintf("xhci", "%s: OUT PKG\n", __func__);
-+		  cdata->transfer_size += tr->size;
-+		  break;
-+		}
-+	      case GRUB_USB_TRANSFER_TYPE_IN:
-+		{
-+		  grub_dprintf("xhci", "%s: IN PKG\n", __func__);
-+		  cdata->transfer_size += tr->size;
-+		  flags |= TRB_TR_DIR;
-+		  break;
-+		}
-+		case GRUB_USB_TRANSFER_TYPE_SETUP:
-+		  break;
-+	    }
-+	  if (grub_xhci_transfer_is_last(transfer, i))
-+	    flags |= TRB_TR_IOC;
-+
-+	  /* The ring might be to small, submit while adding new entries */
-+	  rc = xhci_trb_queue_and_flush(x, priv->slotid, epid,
-+				  reqs, tr->data, tr->size, flags);
-+	  if (rc < 0)
-+	    return GRUB_USB_ERR_TIMEOUT;
-+	  else if (rc > 1)
-+	    return grub_xhci_usb_to_grub_err(rc);
-+
-+	}
-+    }
-+  xhci_doorbell(x, priv->slotid, epid);
-+
-+  return GRUB_USB_ERR_NONE;
-+}
-+
-+static grub_usb_err_t
-+grub_xhci_check_transfer (grub_usb_controller_t dev,
-+			  grub_usb_transfer_t transfer, grub_size_t * actual)
-+{
-+  grub_uint32_t status;
-+  grub_uint32_t remaining;
-+  grub_uint8_t epid;
-+  volatile struct grub_xhci_ring *reqs;
-+  grub_usb_err_t err;
-+  int rc;
-+
-+  if (!dev->data || !transfer->controller_data || !transfer->dev ||
-+      !transfer->dev->xhci_priv)
-+    return GRUB_USB_ERR_INTERNAL;
-+
-+
-+  struct grub_xhci_priv *priv = transfer->dev->xhci_priv;
-+  struct grub_xhci *x = (struct grub_xhci *) dev->data;
-+  struct grub_xhci_transfer_controller_data *cdata =
-+    transfer->controller_data;
-+
-+  xhci_check_status(x);
-+  xhci_process_events(x);
-+
-+  epid = grub_xhci_epid_from_transfer(transfer);
-+
-+  reqs = priv->enpoint_trbs[epid];
-+
-+  /* XXX: invalidate caches */
-+
-+  /* Get current status from event ring buffer */
-+  status = (reqs->evt.status>> 24) & 0xff;
-+  remaining = reqs->evt.status & 0xffffff;
-+
-+  if (status != CC_STOPPED_LENGTH_INVALID)
-+      *actual = cdata->transfer_size - remaining;
-+  else
-+    *actual = 0;
-+
-+  if (xhci_ring_busy(reqs))
-+      return GRUB_USB_ERR_WAIT;
-+
-+  grub_free(cdata);
-+
-+  grub_dprintf("xhci", "%s: xfer done\n", __func__);
-+
-+  err = grub_xhci_usb_to_grub_err(status);
-+  if (err != GRUB_USB_ERR_NONE)
-+    {
-+      if (status == CC_STALL_ERROR)
-+	{
-+	  /* Clear the stall by resetting the endpoint */
-+	  rc = xhci_cmd_reset_endpoint(x, priv->slotid, epid, 1);
-+
-+	  if (rc < 0)
-+	    return GRUB_USB_ERR_TIMEOUT;
-+
-+	  return GRUB_USB_ERR_STALL;
-+	}
-+      else if (remaining > 0)
-+	{
-+	  return GRUB_USB_ERR_DATA;
-+	}
-+    }
-+
-+  return err;
-+}
-+
-+static grub_usb_err_t
-+grub_xhci_cancel_transfer (grub_usb_controller_t dev,
-+			grub_usb_transfer_t transfer)
-+{
-+  grub_uint8_t epid;
-+  volatile struct grub_xhci_ring *reqs;
-+  struct grub_pci_dma_chunk *enpoint_trbs_dma;
-+  grub_addr_t deque_pointer;
-+  int rc;
-+
-+  if (!dev->data || !transfer->controller_data || !transfer->dev ||
-+      !transfer->dev->xhci_priv)
-+      return GRUB_USB_ERR_INTERNAL;
-+
-+  struct grub_xhci *x = (struct grub_xhci *) dev->data;
-+  struct grub_xhci_transfer_controller_data *cdata =
-+    transfer->controller_data;
-+  struct grub_xhci_priv *priv = transfer->dev->xhci_priv;
-+
-+  epid = grub_xhci_epid_from_transfer(transfer);
-+
-+  enpoint_trbs_dma = priv->enpoint_trbs_dma[epid];
-+  reqs = priv->enpoint_trbs[epid];
-+
-+  /* Abort current command */
-+  rc = xhci_cmd_stop_endpoint(x, priv->slotid, epid, 0);
-+  if (rc < 0)
-+    return GRUB_USB_ERR_TIMEOUT;
-+
-+  /* Reset state */
-+  reqs->nidx = 0;
-+  reqs->eidx = 0;
-+  reqs->cs = 1;
-+
-+  grub_arch_sync_dma_caches(reqs, sizeof(*reqs));
-+
-+  /* Reset the dequeue pointer to the begging of the TRB */
-+  deque_pointer = grub_dma_get_phys(enpoint_trbs_dma);
-+  rc = xhci_cmd_set_dequeue_pointer(x, priv->slotid, epid, deque_pointer| 1 );
-+  if (rc < 0)
-+    return GRUB_USB_ERR_TIMEOUT;
-+
-+  reqs->evt.ptr_low = 0;
-+  reqs->evt.ptr_high = 0;
-+  reqs->evt.control = 0;
-+  reqs->evt.status = 0;
-+
-+  grub_arch_sync_dma_caches(reqs, sizeof(*reqs));
-+
-+  /* Restart ring buffer processing */
-+  xhci_doorbell(x, priv->slotid, epid);
-+
-+  grub_free (cdata);
-+
-+  return GRUB_USB_ERR_NONE;
-+}
-+
-+/****************************************************************
-+ * xHCI port status functions
-+ ****************************************************************/
-+
-+static int
-+grub_xhci_hubports (grub_usb_controller_t dev)
-+{
-+  struct grub_xhci *x = (struct grub_xhci *) dev->data;
-+  grub_uint32_t portinfo;
-+
-+  portinfo = x->ports;
-+  grub_dprintf ("xhci", "root hub ports=%d\n", portinfo);
-+  return portinfo;
-+}
-+
-+static grub_usb_err_t
-+grub_xhci_portstatus (grub_usb_controller_t dev,
-+			  unsigned int port, unsigned int enable)
-+{
-+  struct grub_xhci *x = (struct grub_xhci *) dev->data;
-+  grub_uint32_t portsc, pls;
-+  grub_uint32_t end;
-+
-+  portsc = grub_xhci_port_read(x, port);
-+  pls = xhci_get_field(portsc, XHCI_PORTSC_PLS);
-+
-+  grub_dprintf("xhci", "grub_xhci_portstatus port #%d: 0x%08x,%s%s pls %d enable %d\n",
-+	       port, portsc,
-+	       (portsc & GRUB_XHCI_PORTSC_PP)  ? " powered," : "",
-+	       (portsc & GRUB_XHCI_PORTSC_PED) ? " enabled," : "",
-+	       pls, enable);
-+  xhci_check_status(x);
-+
-+  if ((enable && (portsc & GRUB_XHCI_PORTSC_PED)) ||
-+      (!enable && !(portsc & GRUB_XHCI_PORTSC_PED)))
-+    return GRUB_USB_ERR_NONE;
-+
-+  if (!enable)
-+    {
-+      /* Disable port */
-+      grub_xhci_port_write(x, port, ~0, GRUB_XHCI_PORTSC_PED);
-+      return GRUB_USB_ERR_NONE;
-+    }
-+
-+  grub_dprintf ("xhci", "portstatus: XHCI STATUS: %08x\n",
-+		grub_xhci_read32(&x->op->usbsts));
-+  grub_dprintf ("xhci",
-+		"portstatus: begin, iobase=%p, port=%d, status=0x%08x\n",
-+		x->caps, port, portsc);
-+
-+  switch (pls)
-+    {
-+      case PLS_U0:
-+	/* A USB3 port - controller automatically performs reset */
-+	break;
-+      case PLS_POLLING:
-+	/* A USB2 port - perform device reset */
-+	grub_xhci_port_write(x, port, ~GRUB_XHCI_PORTSC_PED, GRUB_XHCI_PORTSC_PR);
-+	break;
-+      default:
-+        return GRUB_USB_ERR_NONE;
-+    }
-+
-+  /* Wait for device to complete reset and be enabled */
-+  end = grub_get_time_ms () + 100;
-+  for (;;)
-+    {
-+      portsc = grub_xhci_port_read(x, port);
-+      if (!(portsc & GRUB_XHCI_PORTSC_CCS))
-+	{
-+	  /* Device disconnected during reset */
-+	  grub_dprintf ("xhci","ERROR: %s device disconnected\n", __func__);
-+	  return GRUB_USB_ERR_BADDEVICE;
-+	}
-+      if (portsc & GRUB_XHCI_PORTSC_PED)
-+	  /* Reset complete */
-+	  break;
-+      if (grub_get_time_ms () > end)
-+	{
-+	  grub_dprintf ("xhci","ERROR: %s TIMEOUT\n", __func__);
-+	  return GRUB_USB_ERR_TIMEOUT;
-+	}
-+    }
-+  xhci_check_status(x);
-+
-+  return GRUB_USB_ERR_NONE;
-+}
-+
-+/****************************************************************
-+ * xHCI detect device functions
-+ ****************************************************************/
-+
-+static grub_usb_speed_t
-+grub_xhci_detect_dev (grub_usb_controller_t dev, int port, int *changed)
-+{
-+  struct grub_xhci *x = (struct grub_xhci *) dev->data;
-+  grub_uint32_t portsc, speed;
-+
-+  *changed = 0;
-+  grub_dprintf("xhci", "%s: dev=%p USB%d_%d port %d\n", __func__, dev,
-+	       x->psids[port-1].major, x->psids[port-1].minor, port);
-+
-+  /* On shutdown advertise all ports as disconnected. This will trigger
-+   * a gracefull detatch. */
-+  if (x->shutdown)
-+    {
-+      *changed = 1;
-+      return GRUB_USB_SPEED_NONE;
-+    }
-+
-+  /* Don't advertise new devices, connecting will fail if halted */
-+  if (xhci_is_halted(x))
-+    return GRUB_USB_SPEED_NONE;
-+
-+  portsc = grub_xhci_port_read(x, port);
-+  speed = xhci_get_field(portsc, XHCI_PORTSC_SPEED);
-+  grub_uint8_t pls = xhci_get_field(portsc, XHCI_PORTSC_PLS);
-+
-+  grub_dprintf("xhci", "grub_xhci_portstatus port #%d: 0x%08x,%s%s pls %d\n",
-+	       port, portsc,
-+	       (portsc & GRUB_XHCI_PORTSC_PP)  ? " powered," : "",
-+	       (portsc & GRUB_XHCI_PORTSC_PED) ? " enabled," : "",
-+	       pls);
-+
-+  /* Connect Status Change bit - it detects change of connection */
-+  if (portsc & GRUB_XHCI_PORTSC_CSC)
-+    {
-+      *changed = 1;
-+
-+      grub_xhci_port_write(x, port, ~GRUB_XHCI_PORTSC_PED, GRUB_XHCI_PORTSC_CSC);
-+    }
-+
-+  if (!(portsc & GRUB_XHCI_PORTSC_CCS))
-+    return GRUB_USB_SPEED_NONE;
-+
-+  for (grub_uint8_t i = 0; i < 16 && x->psids[port-1].psids[i].id > 0; i++)
-+    {
-+      if (x->psids[port-1].psids[i].id == speed)
-+        {
-+	  grub_dprintf("xhci", "%s: grub_usb_speed = %d\n", __func__,
-+		       x->psids[port-1].psids[i].grub_usb_speed );
-+	  return x->psids[port-1].psids[i].grub_usb_speed;
-+	}
-+    }
-+
-+  return GRUB_USB_SPEED_NONE;
-+}
-+
-+/****************************************************************
-+ * xHCI attach/detach functions
-+ ****************************************************************/
-+
-+static grub_usb_err_t
-+grub_xhci_attach_dev (grub_usb_controller_t ctrl, grub_usb_device_t dev)
-+{
-+  struct grub_xhci *x = (struct grub_xhci *) ctrl->data;
-+  grub_usb_err_t err;
-+  grub_uint32_t max;
-+
-+  grub_dprintf("xhci", "%s: dev=%p\n", __func__, dev);
-+
-+  if (!dev || !x)
-+    return GRUB_USB_ERR_INTERNAL;
-+
-+  dev->xhci_priv = grub_zalloc (sizeof (struct grub_xhci_priv));
-+  if (!dev->xhci_priv)
-+    return GRUB_USB_ERR_INTERNAL;
-+
-+
-+  switch (dev->speed)
-+    {
-+      case GRUB_USB_SPEED_LOW:
-+	{
-+	  max = 8;
-+	  break;
-+	}
-+      case GRUB_USB_SPEED_FULL:
-+      case GRUB_USB_SPEED_HIGH:
-+	{
-+	  max = 64;
-+	  break;
-+	}
-+      case GRUB_USB_SPEED_SUPER:
-+	{
-+	  max = 512;
-+	  break;
-+	}
-+      default:
-+      case GRUB_USB_SPEED_NONE:
-+	{
-+	  max = 0;
-+	}
-+    }
-+
-+  /* Assign a slot, assign an address and configure endpoint 0 */
-+  err = grub_xhci_prepare_endpoint(x, dev,
-+				  0,
-+				  0,
-+				  GRUB_USB_TRANSACTION_TYPE_CONTROL,
-+				  max,
-+				  dev->xhci_priv);
-+
-+  return err;
-+}
-+
-+static grub_usb_err_t
-+grub_xhci_detach_dev (grub_usb_controller_t ctrl, grub_usb_device_t dev)
-+{
-+  struct grub_xhci *x = (struct grub_xhci *) ctrl->data;
-+  struct grub_xhci_priv *priv;
-+  int cc = CC_SUCCESS;
-+
-+  grub_dprintf("xhci", "%s: dev=%p\n", __func__, dev);
-+
-+  if (!dev)
-+    return GRUB_USB_ERR_INTERNAL;
-+
-+  if (dev->xhci_priv)
-+    {
-+      priv = dev->xhci_priv;
-+      /* Stop endpoints and free ring buffer */
-+      for (int i = 0; i < GRUB_XHCI_MAX_ENDPOINTS; i++)
-+	{
-+	  if (priv->enpoint_trbs[i] != NULL)
-+	    {
-+	      cc = xhci_cmd_stop_endpoint(x, priv->slotid, i, 1);
-+	      if (cc != CC_SUCCESS)
-+		grub_dprintf("xhci", "Failed to disable EP%d on slot %d\n", i,
-+			     priv->slotid);
-+
-+	      grub_dprintf("xhci", "grub_dma_free[%d]\n", i);
-+
-+	      grub_dma_free(priv->enpoint_trbs_dma[i]);
-+	      priv->enpoint_trbs[i] = NULL;
-+	      priv->enpoint_trbs_dma[i] = NULL;
-+	    }
-+	}
-+
-+      cc = xhci_cmd_disable_slot(x, priv->slotid);
-+      if (cc == CC_SUCCESS)
-+	{
-+	  if (priv->slotctx_dma)
-+	    grub_dma_free(priv->slotctx_dma);
-+	  x->devs[priv->slotid].ptr_low = 0;
-+	  x->devs[priv->slotid].ptr_high = 0;
-+	  grub_arch_sync_dma_caches(&x->devs[priv->slotid], sizeof(x->devs[0]));
-+	}
-+	else
-+	  grub_dprintf("xhci", "Failed to disable slot %d\n", priv->slotid);
-+
-+      grub_free(dev->xhci_priv);
-+    }
-+
-+  dev->xhci_priv = NULL;
-+
-+  if (cc != CC_SUCCESS)
-+    return GRUB_USB_ERR_BADDEVICE;
-+  return GRUB_USB_ERR_NONE;
-+}
-+
-+/****************************************************************
-+ * xHCI terminate functions
-+ ****************************************************************/
-+
-+static void
-+grub_xhci_halt(struct grub_xhci *x)
-+{
-+  grub_uint32_t reg;
-+
-+  /* Halt the command ring */
-+  reg = grub_xhci_read32(&x->op->crcr_low);
-+  grub_xhci_write32(&x->op->crcr_low, reg | 4);
-+
-+  int rc = xhci_event_wait(x, x->cmds, 100);
-+  grub_dprintf("xhci", "%s: xhci_event_wait = %d\n", __func__, rc);
-+  if (rc < 0)
-+    return;
-+
-+  /* Stop the controller */
-+  reg = grub_xhci_read32(&x->op->usbcmd);
-+  if (reg & GRUB_XHCI_CMD_RS)
-+    {
-+      reg &= ~GRUB_XHCI_CMD_RS;
-+      grub_xhci_write32(&x->op->usbcmd, reg);
-+    }
-+
-+  return;
-+}
-+
-+static grub_err_t
-+grub_xhci_fini_hw (int noreturn __attribute__ ((unused)))
-+{
-+  struct grub_xhci *x;
-+
-+  /* We should disable all XHCI HW to prevent any DMA access etc. */
-+  for (x = xhci; x; x = x->next)
-+    {
-+      x->shutdown = 1;
-+
-+      /* Gracefully detach active devices */
-+      grub_usb_poll_devices(0);
-+
-+      /* Check if xHCI is halted and halt it if not */
-+      grub_xhci_halt (x);
-+
-+      /* Reset xHCI */
-+      if (grub_xhci_reset (x) != GRUB_USB_ERR_NONE)
-+	return GRUB_ERR_BAD_DEVICE;
-+    }
-+
-+  return GRUB_ERR_NONE;
-+}
-+
-+static struct grub_usb_controller_dev usb_controller = {
-+  .name = "xhci",
-+  .iterate = grub_xhci_iterate,
-+  .setup_transfer = grub_xhci_setup_transfer,
-+  .check_transfer = grub_xhci_check_transfer,
-+  .cancel_transfer = grub_xhci_cancel_transfer,
-+  .hubports = grub_xhci_hubports,
-+  .portstatus = grub_xhci_portstatus,
-+  .detect_dev = grub_xhci_detect_dev,
-+  .attach_dev = grub_xhci_attach_dev,
-+  .detach_dev = grub_xhci_detach_dev,
-+  /* estimated max. count of TDs for one bulk transfer */
-+  .max_bulk_tds = GRUB_XHCI_RING_ITEMS - 3
-+};
-+
-+GRUB_MOD_INIT (xhci)
-+{
-+  grub_stop_disk_firmware ();
-+
-+  grub_boot_time ("Initing XHCI hardware");
-+  grub_xhci_pci_scan ();
-+  grub_boot_time ("Registering XHCI driver");
-+  grub_usb_controller_dev_register (&usb_controller);
-+  grub_boot_time ("XHCI driver registered");
-+}
-+
-+GRUB_MOD_FINI (xhci)
-+{
-+  grub_xhci_fini_hw (0);
-+  grub_usb_controller_dev_unregister (&usb_controller);
-+}
-diff --git a/include/grub/usb.h b/include/grub/usb.h
-index 609faf7d0..eb71fa1c7 100644
---- a/include/grub/usb.h
-+++ b/include/grub/usb.h
-@@ -338,6 +338,10 @@ grub_usb_cancel_transfer (grub_usb_transfer_t trans);
- void
- grub_ehci_init_device (volatile void *regs);
- void
-+grub_xhci_init_device (volatile void *regs);
-+void
- grub_ehci_pci_scan (void);
-+void
-+grub_xhci_pci_scan (void);
- 
- #endif /* GRUB_USB_H */
--- 
-2.39.2
-
diff --git a/config/grub/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch b/config/grub/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
deleted file mode 100644
index a37bbd6b..00000000
--- a/config/grub/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
+++ /dev/null
@@ -1,127 +0,0 @@
-From 2a2c64f6ea62337c1263a70f6ca9a9bade66b78b Mon Sep 17 00:00:00 2001
-From: Patrick Rudolph <patrick.rudolph@9elements.com>
-Date: Thu, 3 Dec 2020 13:44:55 +0100
-Subject: [PATCH 7/8] grub-core/bus/usb/usbhub: Add xHCI non root hub support
-
-Tested on Intel PCH C246, the USB3 hub can be configured by grub.
-
-Issues:
-* USB3 devices connected behind that hub are sometimes not detected.
-
-Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
----
- grub-core/bus/usb/usbhub.c | 38 +++++++++++++++++++++++++++++++++-----
- include/grub/usbdesc.h     |  1 +
- include/grub/usbtrans.h    |  4 ++++
- 3 files changed, 38 insertions(+), 5 deletions(-)
-
-diff --git a/grub-core/bus/usb/usbhub.c b/grub-core/bus/usb/usbhub.c
-index b4b3a1a61..e96505aa9 100644
---- a/grub-core/bus/usb/usbhub.c
-+++ b/grub-core/bus/usb/usbhub.c
-@@ -148,19 +148,32 @@ grub_usb_hub_add_dev (grub_usb_controller_t controller,
-   return dev;
- }
- 
--
-+static grub_usb_err_t
-+grub_usb_set_hub_depth(grub_usb_device_t dev, grub_uint8_t depth)
-+{
-+  return grub_usb_control_msg (dev, (GRUB_USB_REQTYPE_OUT
-+			            | GRUB_USB_REQTYPE_CLASS
-+			            | GRUB_USB_REQTYPE_TARGET_DEV),
-+			      GRUB_USB_HUB_REQ_SET_HUB_DEPTH, depth,
-+			      0, 0, NULL);
-+}
-+
- static grub_usb_err_t
- grub_usb_add_hub (grub_usb_device_t dev)
- {
-   struct grub_usb_usb_hubdesc hubdesc;
-   grub_usb_err_t err;
-+  grub_uint16_t req;
-   int i;
- 
-+  req = (dev->speed == GRUB_USB_SPEED_SUPER) ? GRUB_USB_DESCRIPTOR_SS_HUB :
-+    GRUB_USB_DESCRIPTOR_HUB;
-+
-   err = grub_usb_control_msg (dev, (GRUB_USB_REQTYPE_IN
- 	  		            | GRUB_USB_REQTYPE_CLASS
- 			            | GRUB_USB_REQTYPE_TARGET_DEV),
--                              GRUB_USB_REQ_GET_DESCRIPTOR,
--			      (GRUB_USB_DESCRIPTOR_HUB << 8) | 0,
-+			      GRUB_USB_REQ_GET_DESCRIPTOR,
-+			      (req << 8) | 0,
- 			      0, sizeof (hubdesc), (char *) &hubdesc);
-   if (err)
-     return err;
-@@ -183,6 +196,19 @@ grub_usb_add_hub (grub_usb_device_t dev)
-       return GRUB_USB_ERR_INTERNAL;
-     }
- 
-+  if (dev->speed == GRUB_USB_SPEED_SUPER)
-+    {
-+      grub_uint8_t depth;
-+      grub_uint32_t route;
-+      /* Depth maximum value is 5, but root hubs doesn't count */
-+      for (depth = 0, route = dev->route; (route & 0xf) > 0; route >>= 4)
-+	depth++;
-+
-+      err = grub_usb_set_hub_depth(dev, depth);
-+      if (err)
-+        return err;
-+    }
-+
-   /* Power on all Hub ports.  */
-   for (i = 1; i <= hubdesc.portcnt; i++)
-     {
-@@ -637,7 +663,9 @@ poll_nonroot_hub (grub_usb_device_t dev)
- 	      int split_hubaddr = 0;
- 
- 	      /* Determine the device speed.  */
--	      if (status & GRUB_USB_HUB_STATUS_PORT_LOWSPEED)
-+	      if (dev->speed == GRUB_USB_SPEED_SUPER)
-+	        speed = GRUB_USB_SPEED_SUPER;
-+	      else if (status & GRUB_USB_HUB_STATUS_PORT_LOWSPEED)
- 		speed = GRUB_USB_SPEED_LOW;
- 	      else
- 		{
-@@ -651,7 +679,7 @@ poll_nonroot_hub (grub_usb_device_t dev)
- 	      grub_millisleep (10);
- 
-               /* Find correct values for SPLIT hubport and hubaddr */
--	      if (speed == GRUB_USB_SPEED_HIGH)
-+	      if (speed == GRUB_USB_SPEED_HIGH || speed == GRUB_USB_SPEED_SUPER)
- 	        {
- 		  /* HIGH speed device needs not transaction translation */
- 		  split_hubport = 0;
-diff --git a/include/grub/usbdesc.h b/include/grub/usbdesc.h
-index bb2ab2e27..1697aa465 100644
---- a/include/grub/usbdesc.h
-+++ b/include/grub/usbdesc.h
-@@ -30,6 +30,7 @@ typedef enum {
-   GRUB_USB_DESCRIPTOR_ENDPOINT,
-   GRUB_USB_DESCRIPTOR_DEBUG = 10,
-   GRUB_USB_DESCRIPTOR_HUB = 0x29,
-+  GRUB_USB_DESCRIPTOR_SS_HUB = 0x2a,
-   GRUB_USB_DESCRIPTOR_SS_ENDPOINT_COMPANION = 0x30
- } grub_usb_descriptor_t;
- 
-diff --git a/include/grub/usbtrans.h b/include/grub/usbtrans.h
-index 039ebed65..d6c3f71dc 100644
---- a/include/grub/usbtrans.h
-+++ b/include/grub/usbtrans.h
-@@ -110,6 +110,10 @@ enum
-     GRUB_USB_REQ_SET_INTERFACE = 0x0B,
-     GRUB_USB_REQ_SYNC_FRAME = 0x0C
-   };
-+enum
-+  {
-+    GRUB_USB_HUB_REQ_SET_HUB_DEPTH = 0x0C,
-+  };
- 
- #define GRUB_USB_FEATURE_ENDP_HALT	0x00
- #define GRUB_USB_FEATURE_DEV_REMOTE_WU	0x01
--- 
-2.39.2
-
diff --git a/config/grub/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch b/config/grub/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch
deleted file mode 100644
index af79c3d0..00000000
--- a/config/grub/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch
+++ /dev/null
@@ -1,90 +0,0 @@
-From 871d768f8c5c960cb0d9761a9028b16882e1a7d3 Mon Sep 17 00:00:00 2001
-From: Patrick Rudolph <patrick.rudolph@9elements.com>
-Date: Wed, 24 Feb 2021 08:25:41 +0100
-Subject: [PATCH 8/8] Fix compilation on x86_64
-
-Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
----
- grub-core/bus/usb/xhci.c | 24 ++++++++++++++++--------
- 1 file changed, 16 insertions(+), 8 deletions(-)
-
-diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c
-index f4591ffb5..3495bb919 100644
---- a/grub-core/bus/usb/xhci.c
-+++ b/grub-core/bus/usb/xhci.c
-@@ -184,7 +184,7 @@ enum
-  *  then we can get it from a trb pointer (provided by evt ring).
-  */
- #define XHCI_RING(_trb)	  \
--    ((struct grub_xhci_ring*)((grub_uint32_t)(_trb) & ~(GRUB_XHCI_RING_SIZE-1)))
-+    ((struct grub_xhci_ring*)((grub_addr_t)(_trb) & ~(GRUB_XHCI_RING_SIZE-1)))
- 
- /* slot context */
- struct grub_xhci_slotctx {
-@@ -495,6 +495,14 @@ grub_xhci_read8(volatile void *addr) {
-   return (*((volatile grub_uint32_t *)addr));
- }
- 
-+static inline void *
-+grub_xhci_read_etrb_ptr(volatile struct grub_xhci_trb *trb) {
-+  grub_uint64_t tmp;
-+  tmp = (grub_uint64_t)grub_xhci_read32(&trb->ptr_low);
-+  tmp |= ((grub_uint64_t)grub_xhci_read32(&trb->ptr_high)) << 32;
-+  return (void *)(grub_addr_t)tmp;
-+}
-+
- static inline grub_uint32_t
- grub_xhci_port_read (struct grub_xhci *x, grub_uint32_t port)
- {
-@@ -664,7 +672,7 @@ static void xhci_process_events(struct grub_xhci *x)
- 	    case ER_TRANSFER:
- 	    case ER_COMMAND_COMPLETE:
- 	      {
--		struct grub_xhci_trb  *rtrb = (void*)grub_xhci_read32(&etrb->ptr_low);
-+		struct grub_xhci_trb  *rtrb = grub_xhci_read_etrb_ptr(etrb);
- 		struct grub_xhci_ring *ring = XHCI_RING(rtrb);
- 		volatile struct grub_xhci_trb  *evt = &ring->evt;
- 		grub_uint32_t eidx = rtrb - ring->ring + 1;
-@@ -697,9 +705,9 @@ static void xhci_process_events(struct grub_xhci *x)
- 	  }
- 	grub_xhci_write32(&evts->nidx, nidx);
- 	volatile struct grub_xhci_ir *ir = x->ir;
--	grub_uint32_t erdp = (grub_uint32_t)(evts->ring + nidx);
--	grub_xhci_write32(&ir->erdp_low, erdp);
--	grub_xhci_write32(&ir->erdp_high, 0);
-+	grub_uint64_t erdp = (grub_addr_t)(void *)(&evts->ring[nidx]);
-+	grub_xhci_write32(&ir->erdp_low, erdp & 0xffffffff);
-+	grub_xhci_write32(&ir->erdp_high, erdp >> 32);
-     }
- }
- 
-@@ -800,7 +808,7 @@ static void xhci_trb_queue(volatile struct grub_xhci_ring *ring,
- 			   grub_uint32_t xferlen, grub_uint32_t flags)
- {
-   grub_dprintf("xhci", "%s: ring %p data %llx len %d flags 0x%x remain 0x%x\n", __func__,
--      ring, data_or_addr, xferlen & 0x1ffff, flags, xferlen >> 17);
-+      ring, (unsigned long long)data_or_addr, xferlen & 0x1ffff, flags, xferlen >> 17);
- 
-   if (xhci_ring_full(ring))
-     {
-@@ -1907,7 +1915,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev,
-   if (transfer->type == GRUB_USB_TRANSACTION_TYPE_CONTROL)
-   {
-     volatile struct grub_usb_packet_setup *setupdata;
--    setupdata = (void *)transfer->transactions[0].data;
-+    setupdata = (void *)(grub_addr_t)transfer->transactions[0].data;
-     grub_dprintf("xhci", "%s: CONTROLL TRANS req %d\n", __func__, setupdata->request);
-     grub_dprintf("xhci", "%s: CONTROLL TRANS length %d\n", __func__, setupdata->length);
- 
-@@ -1974,7 +1982,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev,
- 	/* Assume the ring has enough free space for all TRBs */
- 	if (flags & TRB_TR_IDT && tr->size <= (int)sizeof(inline_data))
- 	  {
--	    grub_memcpy(&inline_data, (void *)tr->data, tr->size);
-+	    grub_memcpy(&inline_data, (void *)(grub_addr_t)tr->data, tr->size);
- 	    xhci_trb_queue(reqs, inline_data, tr->size, flags);
- 	  }
- 	else
--- 
-2.39.2
-
diff --git a/config/grub/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
index b00611a0..4345ebae 100644
--- a/config/grub/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
+++ b/config/grub/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
@@ -1,7 +1,7 @@
-From ef9d61ae9ed490301adf9ee064a9fc1190069d81 Mon Sep 17 00:00:00 2001
+From 708c0092d44aec6409e0ecc1925cdbb3b76c6dfd Mon Sep 17 00:00:00 2001
 From: Mate Kukri <km@mkukri.xyz>
 Date: Mon, 20 May 2024 11:43:35 +0100
-Subject: Add native NVMe driver based on SeaBIOS
+Subject: [PATCH 1/1] Add native NVMe driver based on SeaBIOS
 
 Tested to successfully boot Debian on QEMU and OptiPlex 3050.
 
@@ -18,23 +18,23 @@ Signed-off-by: Mate Kukri <km@mkukri.xyz>
  create mode 100644 grub-core/disk/nvme.c
 
 diff --git a/Makefile.am b/Makefile.am
-index 65016f856..7bc0866ba 100644
+index 43635d5ff..2c86dbbf6 100644
 --- a/Makefile.am
 +++ b/Makefile.am
 @@ -434,7 +434,7 @@ if COND_i386_coreboot
  FS_PAYLOAD_MODULES ?= $(shell cat grub-core/fs.lst)
  default_payload.elf: grub-mkstandalone grub-mkimage FORCE
  	test -f $@ && rm $@ || true
--	pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata xhci ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
-+	pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata nvme xhci ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
+-	pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
++	pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata nvme ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
  endif
  
  endif
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index ea782666d..0f893369a 100644
+index 560c66447..d3bf9f1c5 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
-@@ -2602,3 +2602,9 @@ module = {
+@@ -2607,3 +2607,9 @@ module = {
    efi = commands/bli.c;
    enable = efi;
  };
@@ -45,7 +45,7 @@ index ea782666d..0f893369a 100644
 +  enable = pci;
 +};
 diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c
-index 580c8d3b0..a2c766fbd 100644
+index 6806bff9c..fd68a513e 100644
 --- a/grub-core/commands/nativedisk.c
 +++ b/grub-core/commands/nativedisk.c
 @@ -78,6 +78,7 @@ get_uuid (const char *name, char **uuid, int getnative)

From e1883f1d5a1722a2ab088c0dd4906bbdf860c003 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 May 2024 20:16:49 +0100
Subject: [PATCH 0428/1549] grub.cfg: use grub_scan_disk to set boot order

Previously, grub_scan_disk could set ata, ahci or "both",
which would make both be tried (ahci first). This worked
when we only dealt with ata and ahci devices, but now we
support nvme devices so the logic is inherently flawed.

Instead, use grub_scan_disk to store the boot order, e.g.:

grub_scan_disk="ahci nvme ata"

grub_scan_disk="nvme ata"

In the first example, it would make GRUB scan ahci first,
then nvme and then ata.

In the secontd example, it would make GRUB scan nvme first,
and then ata.

If "both" is set, or anything other than ahci/ata/nvme,
grub_scan_disk is now changed to "nvme ahci ata".

Actual grub_scan_disk entries in target.cfg files will now
be modified, to match each machine.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 36 +++++++++++++++---------------------
 script/roms                 | 21 ++++++++++++++++-----
 2 files changed, 31 insertions(+), 26 deletions(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 4f459b4c..ea966387 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -50,7 +50,7 @@ if [ -f (cbfsdisk)/timeout.cfg ]; then
 else	
 	set timeout=5
 fi
-set grub_scan_disk="both"
+set grub_scan_disk="nvme ahci ata"
 if [ -f (cbfsdisk)/scan.cfg ]; then
 	source (cbfsdisk)/scan.cfg
 fi
@@ -139,15 +139,9 @@ function search_bootcfg {
 }
 menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o' {
 
-	if [ "${grub_scan_disk}" != "ata" ]; then
-		search_bootcfg ahci
-	fi
-	if [ "${grub_scan_disk}" != "ahci" ]; then
-		search_bootcfg ata
-	fi
-	if [ "${grub_scan_disk}" != "nvme" ]; then
-		search_bootcfg nvme
-	fi
+	for grub_disk in ${grub_scan_disk}; do
+		search_bootcfg ${grub_disk}
+	done
 
 	# grub device enumeration is very slow, so checks are hardcoded
 
@@ -169,22 +163,22 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 	unset nvmedev
 	for i in 11 10 9 8 7 6 5 4 3 2 1 0; do
 		for part in 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1; do
-			if [ "${grub_scan_disk}" != "ata" ]; then
-				ahcidev="(ahci${i},${part}) ${ahcidev}"
-			fi
-			if [ "${grub_scan_disk}" != "ahci" ]; then
-				atadev="(ata${i},${part}) ${atadev}"
-			fi
-			if [ "${grub_scan_disk}" != "nvme" ]; then
-				# TODO: do we care about other namesapces
-				nvmedev="(nvme${i}n1,${part}) ${nvmedev}"
-			fi
+			for grub_disk in ${grub_scan_disk}; do
+				if [ "${grub_disk}" = "ahci" ]; then
+					ahcidev="(ahci${i},${part}) ${ahcidev}"
+				elif [ "${grub_disk}" = "ata" ]; then
+					atadev="(ata${i},${part}) ${atadev}"
+				elif [ "${grub_disk}" = "nvme" ]; then
+					# TODO: do we care about other namesapces
+					nvmedev="(nvme${i}n1,${part}) ${nvmedev}"
+				fi
+			done
 		done
 	done
 
 	set pager=0
 	echo -n "Attempting to unlock encrypted volumes"
-	for dev in ${ahcidev} ${atadev} ${nvmedev} ${lvmvol} ${raidvol}; do
+	for dev in ${nvmedev} ${ahcidev} ${atadev} ${lvmvol} ${raidvol}; do
 		if cryptomount "${dev}" ; then break ; fi
 	done
 	set pager=1
diff --git a/script/roms b/script/roms
index f79a8e75..744afc52 100755
--- a/script/roms
+++ b/script/roms
@@ -150,9 +150,21 @@ configure_target()
 	# Override the above defaults using target.cfg
 	. "$targetdir/target.cfg"
 
-	[ -z "$grub_scan_disk" ] && grub_scan_disk="both"
-	[ "$grub_scan_disk" != "both" ] && [ "$grub_scan_disk" != "ata" ] && \
-	    [ "$grub_scan_disk" != "ahci" ] && grub_scan_disk="both"
+	[ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata"
+	_ata=""
+	_ahci=""
+	_nvme=""
+	_grub_scan_disk=""
+	for _disk in $grub_scan_disk; do
+		[ "$_disk" != "nvme" ] && [ "$_disk" != "ahci" ] && \
+		    [ "$_disk" != "ata" ] && _grub_scan_disk="nvme ahci ata" \
+		    && break
+		eval "[ -n \"\$_$_disk\" ] && continue"
+		eval "_$_disk=\"$_disk\""
+		_grub_scan_disk="$_grub_scan_disk $_disk"
+	done
+	[ -z "$_grub_scan_disk" ] && _grub_scan_disk="nvme ahci ata"
+	grub_scan_disk="${_grub_scan_disk# }"
 
 	[ -z "$tree" ] && $err "$board: tree not defined"
 
@@ -333,8 +345,7 @@ build_grub_roms()
 	tmpcfg="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" > "$tmpcfg" || \
 	    $err "set grub_scandisk, $grub_scan_disk, $tmpcfg"
-	[ "$grub_scan_disk" = "both" ] || \
-	    x_ "$cbfstool" "$tmprom" add -f "$tmpcfg" -n scan.cfg -t raw
+	x_ "$cbfstool" "$tmprom" add -f "$tmpcfg" -n scan.cfg -t raw
 	printf "set timeout=%s\n" "$grub_timeout" > "$tmpcfg" || \
 	    $err "set timeout, $grub_timeout, $tmpcfg"
 	[ -z "$grub_timeout" ] || x_ "$cbfstool" "$tmprom" add \

From 1c4d649848db6d015298e383c50293fca3fd3840 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 May 2024 20:41:11 +0100
Subject: [PATCH 0429/1549] remove grub_scan_disk in all target.cfg files

A subsequest revision will set them again as needed,
per coreboot target.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/dell9020mt-nri_12mb/target.cfg  | 1 -
 config/coreboot/dell9020sff-nri_12mb/target.cfg | 1 -
 config/coreboot/e5420_6mb/target.cfg            | 1 -
 config/coreboot/e5520_6mb/target.cfg            | 1 -
 config/coreboot/e5530_12mb/target.cfg           | 1 -
 config/coreboot/e6400_4mb/target.cfg            | 1 -
 config/coreboot/e6400nvidia_4mb/target.cfg      | 1 -
 config/coreboot/e6420_10mb/target.cfg           | 1 -
 config/coreboot/e6430_12mb/target.cfg           | 1 -
 config/coreboot/e6520_10mb/target.cfg           | 1 -
 config/coreboot/e6530_12mb/target.cfg           | 1 -
 config/coreboot/ga-g41m-es2l/target.cfg         | 1 -
 config/coreboot/hp2170p_16mb/target.cfg         | 1 -
 config/coreboot/hp2560p_8mb/target.cfg          | 1 -
 config/coreboot/hp2570p_16mb/target.cfg         | 1 -
 config/coreboot/hp8200sff_4mb/target.cfg        | 1 -
 config/coreboot/hp8200sff_8mb/target.cfg        | 1 -
 config/coreboot/hp820g2_12mb/target.cfg         | 1 -
 config/coreboot/hp8300cmt_16mb/target.cfg       | 1 -
 config/coreboot/hp8300usdt_16mb/target.cfg      | 1 -
 config/coreboot/hp8460pintel_8mb/target.cfg     | 1 -
 config/coreboot/hp8470pintel_16mb/target.cfg    | 1 -
 config/coreboot/hp8560w_8mb/target.cfg          | 1 -
 config/coreboot/hp9470m_16mb/target.cfg         | 1 -
 config/coreboot/kcma-d8-rdimm_16mb/target.cfg   | 1 -
 config/coreboot/kcma-d8-rdimm_2mb/target.cfg    | 1 -
 config/coreboot/kcma-d8-udimm_16mb/target.cfg   | 1 -
 config/coreboot/kcma-d8-udimm_2mb/target.cfg    | 1 -
 config/coreboot/macbook11/target.cfg            | 1 -
 config/coreboot/macbook11_16mb/target.cfg       | 1 -
 config/coreboot/macbook21/target.cfg            | 1 -
 config/coreboot/macbook21_16mb/target.cfg       | 1 -
 config/coreboot/qemu_x86_12mb/target.cfg        | 1 -
 config/coreboot/r400_16mb/target.cfg            | 1 -
 config/coreboot/r400_4mb/target.cfg             | 1 -
 config/coreboot/r400_8mb/target.cfg             | 1 -
 config/coreboot/r500_4mb/target.cfg             | 1 -
 config/coreboot/t1650_12mb/target.cfg           | 1 -
 config/coreboot/t400_16mb/target.cfg            | 1 -
 config/coreboot/t400_4mb/target.cfg             | 1 -
 config/coreboot/t400_8mb/target.cfg             | 1 -
 config/coreboot/t420_8mb/target.cfg             | 1 -
 config/coreboot/t420s_8mb/target.cfg            | 1 -
 config/coreboot/t430_12mb/target.cfg            | 1 -
 config/coreboot/t440plibremrc_12mb/target.cfg   | 1 -
 config/coreboot/t500_16mb/target.cfg            | 1 -
 config/coreboot/t500_4mb/target.cfg             | 1 -
 config/coreboot/t500_8mb/target.cfg             | 1 -
 config/coreboot/t520_8mb/target.cfg             | 1 -
 config/coreboot/t530_12mb/target.cfg            | 1 -
 config/coreboot/t60_16mb_intelgpu/target.cfg    | 1 -
 config/coreboot/t60_intelgpu/target.cfg         | 1 -
 config/coreboot/w500_16mb/target.cfg            | 1 -
 config/coreboot/w500_4mb/target.cfg             | 1 -
 config/coreboot/w500_8mb/target.cfg             | 1 -
 config/coreboot/w530_12mb/target.cfg            | 1 -
 config/coreboot/w541_12mb/target.cfg            | 1 -
 config/coreboot/x200_16mb/target.cfg            | 1 -
 config/coreboot/x200_4mb/target.cfg             | 1 -
 config/coreboot/x200_8mb/target.cfg             | 1 -
 config/coreboot/x220_8mb/target.cfg             | 1 -
 config/coreboot/x230_12mb/target.cfg            | 1 -
 config/coreboot/x230_16mb/target.cfg            | 1 -
 config/coreboot/x230t_12mb/target.cfg           | 1 -
 config/coreboot/x230t_16mb/target.cfg           | 1 -
 config/coreboot/x301_16mb/target.cfg            | 1 -
 config/coreboot/x301_4mb/target.cfg             | 1 -
 config/coreboot/x301_8mb/target.cfg             | 1 -
 config/coreboot/x60/target.cfg                  | 1 -
 config/coreboot/x60_16mb/target.cfg             | 1 -
 70 files changed, 70 deletions(-)

diff --git a/config/coreboot/dell9020mt-nri_12mb/target.cfg b/config/coreboot/dell9020mt-nri_12mb/target.cfg
index 1567769d..f68a2adc 100644
--- a/config/coreboot/dell9020mt-nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt-nri_12mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/dell9020sff-nri_12mb/target.cfg b/config/coreboot/dell9020sff-nri_12mb/target.cfg
index 1567769d..f68a2adc 100644
--- a/config/coreboot/dell9020sff-nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff-nri_12mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index 8eeb3443..06cbeb0a 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
index 8eeb3443..06cbeb0a 100644
--- a/config/coreboot/e6400nvidia_4mb/target.cfg
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/ga-g41m-es2l/target.cfg b/config/coreboot/ga-g41m-es2l/target.cfg
index ef85da4b..13f2a260 100644
--- a/config/coreboot/ga-g41m-es2l/target.cfg
+++ b/config/coreboot/ga-g41m-es2l/target.cfg
@@ -2,5 +2,4 @@ tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
-grub_scan_disk="ata"
 grub_timeout=10
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index 0badb4fb..a06aa4aa 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index 0badb4fb..a06aa4aa 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index 0badb4fb..a06aa4aa 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 0badb4fb..a06aa4aa 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 0badb4fb..a06aa4aa 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index 5528b8ec..2be9c81b 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -2,5 +2,4 @@ tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 release="n"
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index 0badb4fb..a06aa4aa 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index 0badb4fb..a06aa4aa 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index 0badb4fb..a06aa4aa 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index 0badb4fb..a06aa4aa 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg
index 0badb4fb..a06aa4aa 100644
--- a/config/coreboot/hp8560w_8mb/target.cfg
+++ b/config/coreboot/hp8560w_8mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index 0badb4fb..a06aa4aa 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 grub_timeout=10
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
index ef9037ec..2867a730 100644
--- a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
@@ -3,6 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 xlang="c"
 grub_timeout=10
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
index 641194a7..c455f652 100644
--- a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 xlang="c"
diff --git a/config/coreboot/kcma-d8-udimm_16mb/target.cfg b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
index d1b31cb5..81df54ea 100644
--- a/config/coreboot/kcma-d8-udimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
@@ -4,6 +4,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 xlang="c"
 grub_timout=10
diff --git a/config/coreboot/kcma-d8-udimm_2mb/target.cfg b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
index 4940ede3..5b4010d8 100644
--- a/config/coreboot/kcma-d8-udimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
@@ -4,6 +4,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 xlang="c"
 grub_timeout=10
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index 043bd365..e3f375e4 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -2,4 +2,3 @@ tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index 043bd365..e3f375e4 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -2,4 +2,3 @@ tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index 12e51f9b..72ee0768 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index 12e51f9b..72ee0768 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg
index 4d03eb4a..9572fdc8 100644
--- a/config/coreboot/qemu_x86_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_12mb/target.cfg
@@ -4,4 +4,3 @@ payload_grub="y"
 payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
-grub_scan_disk="both"
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index 1567769d..f68a2adc 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index f8a9c2a2..88c06c2a 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -2,5 +2,4 @@ tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
-grub_scan_disk="ahci"
 grub_background="background1024x768.png"
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index f8a9c2a2..88c06c2a 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -2,5 +2,4 @@ tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
-grub_scan_disk="ahci"
 grub_background="background1024x768.png"
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index 1567769d..f68a2adc 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/x230_12mb/target.cfg
+++ b/config/coreboot/x230_12mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/x230t_12mb/target.cfg
+++ b/config/coreboot/x230t_12mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index 341e655e..1e7b56ca 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index dbcf5a1c..ef75af4a 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 release="n"
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index dbcf5a1c..ef75af4a 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 release="n"
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index dbcf5a1c..ef75af4a 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
 release="n"
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index f8a9c2a2..88c06c2a 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -2,5 +2,4 @@ tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
-grub_scan_disk="ahci"
 grub_background="background1024x768.png"
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index f8a9c2a2..88c06c2a 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -2,5 +2,4 @@ tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
-grub_scan_disk="ahci"
 grub_background="background1024x768.png"

From 3998a3ba4857c92cc44782cab39a59da1eb59374 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 May 2024 21:33:53 +0100
Subject: [PATCH 0430/1549] re-configure grub_scan_disk on various targets

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/dell9020mt-nri_12mb/target.cfg  | 1 +
 config/coreboot/dell9020sff-nri_12mb/target.cfg | 1 +
 config/coreboot/e5420_6mb/target.cfg            | 1 +
 config/coreboot/e5520_6mb/target.cfg            | 1 +
 config/coreboot/e5530_12mb/target.cfg           | 1 +
 config/coreboot/e6400_4mb/target.cfg            | 1 +
 config/coreboot/e6400nvidia_4mb/target.cfg      | 1 +
 config/coreboot/e6420_10mb/target.cfg           | 1 +
 config/coreboot/e6430_12mb/target.cfg           | 1 +
 config/coreboot/e6520_10mb/target.cfg           | 1 +
 config/coreboot/e6530_12mb/target.cfg           | 1 +
 config/coreboot/hp2170p_16mb/target.cfg         | 1 +
 config/coreboot/hp2560p_8mb/target.cfg          | 1 +
 config/coreboot/hp2570p_16mb/target.cfg         | 1 +
 config/coreboot/hp8200sff_4mb/target.cfg        | 1 +
 config/coreboot/hp8200sff_8mb/target.cfg        | 1 +
 config/coreboot/hp820g2_12mb/target.cfg         | 1 +
 config/coreboot/hp8300cmt_16mb/target.cfg       | 1 +
 config/coreboot/hp8300usdt_16mb/target.cfg      | 1 +
 config/coreboot/hp8460pintel_8mb/target.cfg     | 1 +
 config/coreboot/hp8470pintel_16mb/target.cfg    | 1 +
 config/coreboot/hp8560w_8mb/target.cfg          | 1 +
 config/coreboot/hp9470m_16mb/target.cfg         | 1 +
 config/coreboot/kcma-d8-rdimm_16mb/target.cfg   | 1 +
 config/coreboot/kcma-d8-rdimm_2mb/target.cfg    | 1 +
 config/coreboot/kcma-d8-udimm_16mb/target.cfg   | 1 +
 config/coreboot/kcma-d8-udimm_2mb/target.cfg    | 1 +
 config/coreboot/kgpe-d16-rdimm_16mb/target.cfg  | 1 +
 config/coreboot/kgpe-d16-rdimm_2mb/target.cfg   | 1 +
 config/coreboot/kgpe-d16-udimm_16mb/target.cfg  | 1 +
 config/coreboot/kgpe-d16-udimm_2mb/target.cfg   | 1 +
 config/coreboot/macbook11/target.cfg            | 1 +
 config/coreboot/macbook11_16mb/target.cfg       | 1 +
 config/coreboot/macbook21/target.cfg            | 1 +
 config/coreboot/macbook21_16mb/target.cfg       | 1 +
 config/coreboot/r400_16mb/target.cfg            | 1 +
 config/coreboot/r400_4mb/target.cfg             | 1 +
 config/coreboot/r500_4mb/target.cfg             | 1 +
 config/coreboot/t1650_12mb/target.cfg           | 1 +
 config/coreboot/t400_16mb/target.cfg            | 1 +
 config/coreboot/t400_4mb/target.cfg             | 1 +
 config/coreboot/t400_8mb/target.cfg             | 1 +
 config/coreboot/t420_8mb/target.cfg             | 1 +
 config/coreboot/t420s_8mb/target.cfg            | 1 +
 config/coreboot/t430_12mb/target.cfg            | 1 +
 config/coreboot/t440plibremrc_12mb/target.cfg   | 1 +
 config/coreboot/t500_16mb/target.cfg            | 1 +
 config/coreboot/t500_4mb/target.cfg             | 1 +
 config/coreboot/t500_8mb/target.cfg             | 1 +
 config/coreboot/t520_8mb/target.cfg             | 1 +
 config/coreboot/t530_12mb/target.cfg            | 1 +
 config/coreboot/t60_16mb_intelgpu/target.cfg    | 1 +
 config/coreboot/t60_intelgpu/target.cfg         | 1 +
 config/coreboot/w500_16mb/target.cfg            | 1 +
 config/coreboot/w500_4mb/target.cfg             | 1 +
 config/coreboot/w500_8mb/target.cfg             | 1 +
 config/coreboot/w530_12mb/target.cfg            | 1 +
 config/coreboot/w541_12mb/target.cfg            | 1 +
 config/coreboot/x200_16mb/target.cfg            | 1 +
 config/coreboot/x200_4mb/target.cfg             | 1 +
 config/coreboot/x200_8mb/target.cfg             | 1 +
 config/coreboot/x220_8mb/target.cfg             | 1 +
 config/coreboot/x230_12mb/target.cfg            | 1 +
 config/coreboot/x230_16mb/target.cfg            | 1 +
 config/coreboot/x230t_12mb/target.cfg           | 1 +
 config/coreboot/x230t_16mb/target.cfg           | 1 +
 config/coreboot/x301_16mb/target.cfg            | 1 +
 config/coreboot/x301_4mb/target.cfg             | 1 +
 config/coreboot/x301_8mb/target.cfg             | 1 +
 config/coreboot/x60/target.cfg                  | 1 +
 config/coreboot/x60_16mb/target.cfg             | 1 +
 71 files changed, 71 insertions(+)

diff --git a/config/coreboot/dell9020mt-nri_12mb/target.cfg b/config/coreboot/dell9020mt-nri_12mb/target.cfg
index f68a2adc..813ed915 100644
--- a/config/coreboot/dell9020mt-nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt-nri_12mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/dell9020sff-nri_12mb/target.cfg b/config/coreboot/dell9020sff-nri_12mb/target.cfg
index f68a2adc..813ed915 100644
--- a/config/coreboot/dell9020sff-nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff-nri_12mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index 06cbeb0a..8eeb3443 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
index 06cbeb0a..8eeb3443 100644
--- a/config/coreboot/e6400nvidia_4mb/target.cfg
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index a06aa4aa..2e48c44d 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_timeout=10
+grub_scan_disk="ahci"
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index a06aa4aa..2e48c44d 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_timeout=10
+grub_scan_disk="ahci"
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index a06aa4aa..2e48c44d 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_timeout=10
+grub_scan_disk="ahci"
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index a06aa4aa..950a1223 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_timeout=10
+grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index a06aa4aa..950a1223 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_timeout=10
+grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index 2be9c81b..c54e8748 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 release="n"
+grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index a06aa4aa..950a1223 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_timeout=10
+grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index a06aa4aa..2e48c44d 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_timeout=10
+grub_scan_disk="ahci"
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index a06aa4aa..2e48c44d 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_timeout=10
+grub_scan_disk="ahci"
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index a06aa4aa..2e48c44d 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_timeout=10
+grub_scan_disk="ahci"
diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg
index a06aa4aa..2e48c44d 100644
--- a/config/coreboot/hp8560w_8mb/target.cfg
+++ b/config/coreboot/hp8560w_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_timeout=10
+grub_scan_disk="ahci"
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index a06aa4aa..2e48c44d 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_timeout=10
+grub_scan_disk="ahci"
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
index 2867a730..b5ebb46e 100644
--- a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
+grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
index c455f652..eaee5b1a 100644
--- a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
+grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/kcma-d8-udimm_16mb/target.cfg b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
index 81df54ea..1dc344a6 100644
--- a/config/coreboot/kcma-d8-udimm_16mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timout=10
+grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/kcma-d8-udimm_2mb/target.cfg b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
index 5b4010d8..852b9e63 100644
--- a/config/coreboot/kcma-d8-udimm_2mb/target.cfg
+++ b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
+grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
index 2867a730..b5ebb46e 100644
--- a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
+grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
index 2867a730..b5ebb46e 100644
--- a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
+grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
index 5b4010d8..852b9e63 100644
--- a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
+grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
index 5b4010d8..852b9e63 100644
--- a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
+++ b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
@@ -6,3 +6,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_timeout=10
+grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index e3f375e4..043bd365 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -2,3 +2,4 @@ tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index e3f375e4..a2231fc5 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -2,3 +2,4 @@ tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
+scan_scan_disk="ahci"
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index 72ee0768..12e51f9b 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index 72ee0768..12e51f9b 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index 1e7b56ca..ebf3fca1 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index f68a2adc..1567769d 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 88c06c2a..80f93d49 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 grub_background="background1024x768.png"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 88c06c2a..80f93d49 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 grub_background="background1024x768.png"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index f68a2adc..1567769d 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/x230_12mb/target.cfg
+++ b/config/coreboot/x230_12mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/x230t_12mb/target.cfg
+++ b/config/coreboot/x230t_12mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index 1e7b56ca..341e655e 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index ef75af4a..50e91f61 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 release="n"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index ef75af4a..50e91f61 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 release="n"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index ef75af4a..50e91f61 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 release="n"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 88c06c2a..80f93d49 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 grub_background="background1024x768.png"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 88c06c2a..80f93d49 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 grub_background="background1024x768.png"
+grub_scan_disk="ahci"

From b11e4c9f3ed22454be205d9667f0c53f36783e69 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 May 2024 22:40:35 +0100
Subject: [PATCH 0431/1549] grub.cfg: add spdx header

it has always been gpl 3 or later, but it helps to have
the license declaration within the file

there's a copying file anyway. put spdx in the config

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg         | 2 ++
 config/grub/config/grub_memdisk.cfg | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index ea966387..9266dc23 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 set prefix=(memdisk)/boot/grub
 
 insmod at_keyboard
diff --git a/config/grub/config/grub_memdisk.cfg b/config/grub/config/grub_memdisk.cfg
index 0763801b..18d5d535 100644
--- a/config/grub/config/grub_memdisk.cfg
+++ b/config/grub/config/grub_memdisk.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 set prefix=(memdisk)/boot/grub
 
 if [ -f (cbfsdisk)/grub.cfg ]; then

From b78f62c78b74b22b3bdc802a43f85aa094e9d50c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 28 May 2024 01:23:43 +0100
Subject: [PATCH 0432/1549] roms: fix bad eval when comparing options

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/script/roms b/script/roms
index 744afc52..44fbc73c 100755
--- a/script/roms
+++ b/script/roms
@@ -159,7 +159,11 @@ configure_target()
 		[ "$_disk" != "nvme" ] && [ "$_disk" != "ahci" ] && \
 		    [ "$_disk" != "ata" ] && _grub_scan_disk="nvme ahci ata" \
 		    && break
-		eval "[ -n \"\$_$_disk\" ] && continue"
+
+		[ -n "$_ata" ] && [ "$_disk" = "ata" ] && continue
+		[ -n "$_ahci" ] && [ "$_disk" = "ahci" ] && continue
+		[ -n "$_nvme" ] && [ "$_disk" = "nvme" ] && continue
+
 		eval "_$_disk=\"$_disk\""
 		_grub_scan_disk="$_grub_scan_disk $_disk"
 	done

From 7d50e09feabb06a664d839f832a91e832c1dacfc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 28 May 2024 06:43:16 +0100
Subject: [PATCH 0433/1549] update gitignore

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .gitignore | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.gitignore b/.gitignore
index 9feb2d2a..d0b50fed 100644
--- a/.gitignore
+++ b/.gitignore
@@ -30,3 +30,4 @@
 /util/nvmutil/nvm
 /src/
 /CHANGELOG
+/todo.txt

From 4488745cb698781c9770a2db8bc71bb74d84f29a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 28 May 2024 19:57:35 +0100
Subject: [PATCH 0434/1549] trees: use CPUS=x on regular coreboot make

i already do this on crossgcc, but overlooked it on regular
builds where i just use -j, but coreboot's build system
makes use of the CPUS= option in make

use XBMK_THREADS for this

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index 6eeac8f1..80037bd8 100755
--- a/script/trees
+++ b/script/trees
@@ -200,7 +200,7 @@ run_make_command()
 
 	[ "$project" = "coreboot" ] && [ -z "$mode" ] && x_ \
 		printf "%s\n" "${version%%-*}" > "$cdir/.coreboot-version" \
-		    && makeargs="$makeargs UPDATED_SUBMODULES=1"
+		    && makeargs="$makeargs UPDATED_SUBMODULES=1 CPUS=$threads"
 
 	make -C "$cdir" $mode -j$threads $makeargs || $err "!mk $cdir $mode"
 

From b00800a7cceb3a6fe15837266b671e87392154c0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 28 May 2024 23:08:20 +0100
Subject: [PATCH 0435/1549] grub.cfg: actually support setting boot order

replace variables ahcidev/atadev/nvmedev with a single
one named bootdev

the for loop goes through grub_scan_disk, so now it is
effectively a bootorder configuration

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 18 ++++++++----------
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 9266dc23..52ebe9bc 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -160,19 +160,17 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 		try_bootcfg "${vol}"
 	done
 
-	unset ahcidev
-	unset atadev
-	unset nvmedev
-	for i in 11 10 9 8 7 6 5 4 3 2 1 0; do
-		for part in 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1; do
-			for grub_disk in ${grub_scan_disk}; do
+	unset bootdev
+	for grub_disk in ${grub_scan_disk}; do
+		for i in 0 1 2 3 4 5 6 7 8 9 10 11; do
+			for part in 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20; do
 				if [ "${grub_disk}" = "ahci" ]; then
-					ahcidev="(ahci${i},${part}) ${ahcidev}"
+					bootdev="${bootdev} (ahci${i},${part})"
 				elif [ "${grub_disk}" = "ata" ]; then
-					atadev="(ata${i},${part}) ${atadev}"
+					bootdev="${bootdev} (ata${i},${part})"
 				elif [ "${grub_disk}" = "nvme" ]; then
 					# TODO: do we care about other namesapces
-					nvmedev="(nvme${i}n1,${part}) ${nvmedev}"
+					bootdev="${bootdev} (nvme${i}n1,${part})"
 				fi
 			done
 		done
@@ -180,7 +178,7 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 
 	set pager=0
 	echo -n "Attempting to unlock encrypted volumes"
-	for dev in ${nvmedev} ${ahcidev} ${atadev} ${lvmvol} ${raidvol}; do
+	for dev in ${bootdev} ${lvmvol} ${raidvol}; do
 		if cryptomount "${dev}" ; then break ; fi
 	done
 	set pager=1

From a4bd49ded63ecfcda811bfbeb9a605a4253ec3e3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 28 May 2024 23:47:13 +0100
Subject: [PATCH 0436/1549] roms: allow user override of grub_scan_disk

this effectively lets you change the boot order. example:

./build roms -s "nvme ata" t1650_12mb

the above example would set:
grub_scan_disk="nvme ata"

another example:

./build roms -s nvme t1650_12mb

this would set:
grub_scan_disk="nvme"

this overrides what's set in target.cfg for the given
target. useful for quick reconfiguration if building
from source

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/script/roms b/script/roms
index 44fbc73c..1e596192 100755
--- a/script/roms
+++ b/script/roms
@@ -26,7 +26,7 @@ v="romdir cbrom initmode displaymode cbcfg targetdir tree keymaps release"
 v="$v grub_timeout ubdir board grub_scan_disk uboot_config"
 eval "$(setvars "n" $pv serprog)"
 eval "$(setvars "" $v boards _displaymode _payload _keyboard all targets \
-    serprog_boards_dir)"
+    serprog_boards_dir _scandisk)"
 
 main()
 {
@@ -37,6 +37,7 @@ main()
 		-d) _displaymode="$2" ;;
 		-p) _payload="$2" ;;
 		-k) _keyboard="$2" ;;
+		-s) _scandisk="$2" ;;
 		*)
 			[ "$1" = "all" ] && all="y"
 			boards="$1 $boards"
@@ -150,6 +151,7 @@ configure_target()
 	# Override the above defaults using target.cfg
 	. "$targetdir/target.cfg"
 
+	[ -n "$_scandisk" ] && grub_scan_disk="$_scandisk"
 	[ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata"
 	_ata=""
 	_ahci=""

From 0dd0dfaf3db5082f0256ec376180eb8b4eaab1c3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 29 May 2024 00:48:18 +0100
Subject: [PATCH 0437/1549] vendor.sh: don't error on main targets

e.g. coreboot/default contains no config directory, so
the old logic would be trying to do:

.

which is obviously invalid

now for example:

$ ./vendor download default
Vendor files not needed for: default

and it will exit with zero status

the only thing that should ever return non-zero status
is when you define a target that does not exist, config
or no.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 9c3e294e..96631618 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -46,7 +46,10 @@ vendor_download()
 detect_firmware()
 {
 	[ -d "$boarddir" ] || $err "Target '$board' not defined."
-	. "$(check_defconfig "$boarddir")" 2>/dev/null || exit 0
+	check_defconfig "$boarddir" 1>"$tmpdir/vendorcfg.list" && return 0
+	while read -r cbcfgfile; do
+		. "$cbcfgfile" 2>/dev/null
+	done < "$tmpdir/vendorcfg.list"
 	. "$boarddir/target.cfg" 2>/dev/null
 
 	[ -z "$tree" ] && $err "detect_firmware $boarddir: tree undefined"

From e9b9e825f1738a1b7159f81a45cb8e0f46d9ff94 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 29 May 2024 01:49:07 +0100
Subject: [PATCH 0438/1549] ./vendor download: more fine-tuned error control

By default, the build system does set -u -e

Some errors are unavoidable and have to be handled, so
we have to set +u +e (turn off error handling in sh),
when downloading vendor files, but only certain parts of
vendor.sh trigger errors (which cause an exit).

Replace the current bazooka approach with a more fine
grained approach, turning error handling back on again
when it is safe to do so.

In the parts of the code where it is disabled, the code
is written very, very carefully, with errors still handled
manually, but more careful auditing is required.

This change has been tested and makes the command much
safer to run. In security (or any bug auditing), it is
the principle of least privilege that holds true.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 96631618..8178fbf9 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -28,7 +28,6 @@ eval "$(setvars "" _b EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe \
 
 vendor_download()
 {
-	set +u +e
 	export PATH="$PATH:/sbin"
 
 	[ $# -gt 0 ] || $err "No argument given"
@@ -48,7 +47,9 @@ detect_firmware()
 	[ -d "$boarddir" ] || $err "Target '$board' not defined."
 	check_defconfig "$boarddir" 1>"$tmpdir/vendorcfg.list" && return 0
 	while read -r cbcfgfile; do
+		set +u +e
 		. "$cbcfgfile" 2>/dev/null
+		set -u -e
 	done < "$tmpdir/vendorcfg.list"
 	. "$boarddir/target.cfg" 2>/dev/null
 
@@ -131,6 +132,7 @@ fetch()
 	x_ rm -Rf "${_dl}_extracted"
 	mkdirs "$_dest" "extract_$dl_type" || return 0
 	eval "extract_$dl_type"
+	set -u -e
 
 	[ -f "$_dest" ] && return 0
 	$err "extract_$dl_type (fetch): missing file: '$_dest'"
@@ -167,6 +169,8 @@ extract_intel_me()
 	sdir="$(mktemp -d)"
 	[ -z "$sdir" ] && return 0
 	mkdir -p "$sdir" || $err "extract_intel_me: !mkdir -p \"$sdir\""
+
+	set +u +e
 	(
 	[ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
 	cd "$cdir" || $err "extract_intel_me: !cd \"$cdir\""
@@ -224,6 +228,7 @@ extract_kbc1126ec()
 
 extract_e6400vga()
 {
+	set +u +e
 	for v in E6400_VGA_offset E6400_VGA_romname; do
 		eval "[ -z \"\$$v\" ] && $err \"e6400vga: $v undefined\""
 	done

From e7cb10d68b46bd4efb9a87c36d337f8a4fe1e24c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 29 May 2024 03:15:25 +0100
Subject: [PATCH 0439/1549] do not allow dashes in coreboot target names

Command: ./vendor download kcma-d8-rdimm_16mb

Output was:

include/lib.sh: line 115: kcma-d8-rdimm=config/vendor: No such file or directory

That will have to be audited later on, but the recent
more stringent error checking in vendor.sh triggered
this previously untriggered error message. The error
was in fact already occuring before, silently.

Anyway, mitigate by renaming all coreboot targets so
that they do not contain hyphens in the name. This
should avoid triggering errors in that eval command,
on line 115 in lib.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb                                | 0
 .../config/libgfxinit_txtmode                                   | 0
 .../{dell9020mt-nri_12mb => dell9020mt_nri_12mb}/target.cfg     | 0
 .../config/libgfxinit_corebootfb                                | 0
 .../config/libgfxinit_txtmode                                   | 0
 .../{dell9020sff-nri_12mb => dell9020sff_nri_12mb}/target.cfg   | 0
 .../coreboot/{g43t-am3 => g43t_am3}/config/libgfxinit_txtmode   | 0
 config/coreboot/{g43t-am3 => g43t_am3}/target.cfg               | 0
 .../{g43t-am3_16mb => g43t_am3_16mb}/config/libgfxinit_txtmode  | 0
 config/coreboot/{g43t-am3_16mb => g43t_am3_16mb}/target.cfg     | 0
 .../{ga-g41m-es2l => ga_g41m_es2l}/config/libgfxinit_txtmode    | 0
 config/coreboot/{ga-g41m-es2l => ga_g41m_es2l}/target.cfg       | 0
 .../config/libgfxinit_txtmode                                   | 0
 .../{kcma-d8-udimm_16mb => kcma_d8-udimm_16mb}/target.cfg       | 0
 .../config/libgfxinit_txtmode                                   | 0
 .../{kcma-d8-rdimm_16mb => kcma_d8_rdimm_16mb}/target.cfg       | 0
 .../config/libgfxinit_txtmode                                   | 0
 .../{kcma-d8-rdimm_2mb => kcma_d8_rdimm_2mb}/target.cfg         | 0
 .../config/libgfxinit_txtmode                                   | 0
 .../{kcma-d8-udimm_2mb => kcma_d8_udimm_2mb}/target.cfg         | 0
 .../{kfsn4-dre_1mb => kfsn4_dre_1mb}/config/libgfxinit_txtmode  | 0
 config/coreboot/{kfsn4-dre_1mb => kfsn4_dre_1mb}/target.cfg     | 0
 .../{kfsn4-dre_2mb => kfsn4_dre_2mb}/config/libgfxinit_txtmode  | 0
 config/coreboot/{kfsn4-dre_2mb => kfsn4_dre_2mb}/target.cfg     | 0
 .../config/libgfxinit_txtmode                                   | 0
 .../{kgpe-d16-rdimm_16mb => kgpe_d16_rdimm_16mb}/target.cfg     | 0
 .../config/libgfxinit_txtmode                                   | 0
 .../{kgpe-d16-rdimm_2mb => kgpe_d16_rdimm_2mb}/target.cfg       | 0
 .../config/libgfxinit_txtmode                                   | 0
 .../{kgpe-d16-udimm_16mb => kgpe_d16_udimm_16mb}/target.cfg     | 0
 .../config/libgfxinit_txtmode                                   | 0
 .../{kgpe-d16-udimm_2mb => kgpe_d16_udimm_2mb}/target.cfg       | 0
 config/vendor/sources                                           | 2 +-
 33 files changed, 1 insertion(+), 1 deletion(-)
 rename config/coreboot/{dell9020mt-nri_12mb => dell9020mt_nri_12mb}/config/libgfxinit_corebootfb (100%)
 rename config/coreboot/{dell9020mt-nri_12mb => dell9020mt_nri_12mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{dell9020mt-nri_12mb => dell9020mt_nri_12mb}/target.cfg (100%)
 rename config/coreboot/{dell9020sff-nri_12mb => dell9020sff_nri_12mb}/config/libgfxinit_corebootfb (100%)
 rename config/coreboot/{dell9020sff-nri_12mb => dell9020sff_nri_12mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{dell9020sff-nri_12mb => dell9020sff_nri_12mb}/target.cfg (100%)
 rename config/coreboot/{g43t-am3 => g43t_am3}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{g43t-am3 => g43t_am3}/target.cfg (100%)
 rename config/coreboot/{g43t-am3_16mb => g43t_am3_16mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{g43t-am3_16mb => g43t_am3_16mb}/target.cfg (100%)
 rename config/coreboot/{ga-g41m-es2l => ga_g41m_es2l}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{ga-g41m-es2l => ga_g41m_es2l}/target.cfg (100%)
 rename config/coreboot/{kcma-d8-rdimm_16mb => kcma_d8-udimm_16mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{kcma-d8-udimm_16mb => kcma_d8-udimm_16mb}/target.cfg (100%)
 rename config/coreboot/{kcma-d8-udimm_16mb => kcma_d8_rdimm_16mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{kcma-d8-rdimm_16mb => kcma_d8_rdimm_16mb}/target.cfg (100%)
 rename config/coreboot/{kcma-d8-rdimm_2mb => kcma_d8_rdimm_2mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{kcma-d8-rdimm_2mb => kcma_d8_rdimm_2mb}/target.cfg (100%)
 rename config/coreboot/{kcma-d8-udimm_2mb => kcma_d8_udimm_2mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{kcma-d8-udimm_2mb => kcma_d8_udimm_2mb}/target.cfg (100%)
 rename config/coreboot/{kfsn4-dre_1mb => kfsn4_dre_1mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{kfsn4-dre_1mb => kfsn4_dre_1mb}/target.cfg (100%)
 rename config/coreboot/{kfsn4-dre_2mb => kfsn4_dre_2mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{kfsn4-dre_2mb => kfsn4_dre_2mb}/target.cfg (100%)
 rename config/coreboot/{kgpe-d16-rdimm_16mb => kgpe_d16_rdimm_16mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{kgpe-d16-rdimm_16mb => kgpe_d16_rdimm_16mb}/target.cfg (100%)
 rename config/coreboot/{kgpe-d16-rdimm_2mb => kgpe_d16_rdimm_2mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{kgpe-d16-rdimm_2mb => kgpe_d16_rdimm_2mb}/target.cfg (100%)
 rename config/coreboot/{kgpe-d16-udimm_16mb => kgpe_d16_udimm_16mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{kgpe-d16-udimm_16mb => kgpe_d16_udimm_16mb}/target.cfg (100%)
 rename config/coreboot/{kgpe-d16-udimm_2mb => kgpe_d16_udimm_2mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{kgpe-d16-udimm_2mb => kgpe_d16_udimm_2mb}/target.cfg (100%)

diff --git a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
similarity index 100%
rename from config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb
rename to config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
diff --git a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode
rename to config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/dell9020mt-nri_12mb/target.cfg b/config/coreboot/dell9020mt_nri_12mb/target.cfg
similarity index 100%
rename from config/coreboot/dell9020mt-nri_12mb/target.cfg
rename to config/coreboot/dell9020mt_nri_12mb/target.cfg
diff --git a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
similarity index 100%
rename from config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb
rename to config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
diff --git a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode
rename to config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/dell9020sff-nri_12mb/target.cfg b/config/coreboot/dell9020sff_nri_12mb/target.cfg
similarity index 100%
rename from config/coreboot/dell9020sff-nri_12mb/target.cfg
rename to config/coreboot/dell9020sff_nri_12mb/target.cfg
diff --git a/config/coreboot/g43t-am3/config/libgfxinit_txtmode b/config/coreboot/g43t_am3/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/g43t-am3/config/libgfxinit_txtmode
rename to config/coreboot/g43t_am3/config/libgfxinit_txtmode
diff --git a/config/coreboot/g43t-am3/target.cfg b/config/coreboot/g43t_am3/target.cfg
similarity index 100%
rename from config/coreboot/g43t-am3/target.cfg
rename to config/coreboot/g43t_am3/target.cfg
diff --git a/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
rename to config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/g43t-am3_16mb/target.cfg b/config/coreboot/g43t_am3_16mb/target.cfg
similarity index 100%
rename from config/coreboot/g43t-am3_16mb/target.cfg
rename to config/coreboot/g43t_am3_16mb/target.cfg
diff --git a/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode b/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
rename to config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode
diff --git a/config/coreboot/ga-g41m-es2l/target.cfg b/config/coreboot/ga_g41m_es2l/target.cfg
similarity index 100%
rename from config/coreboot/ga-g41m-es2l/target.cfg
rename to config/coreboot/ga_g41m_es2l/target.cfg
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kcma_d8-udimm_16mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode
rename to config/coreboot/kcma_d8-udimm_16mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kcma-d8-udimm_16mb/target.cfg b/config/coreboot/kcma_d8-udimm_16mb/target.cfg
similarity index 100%
rename from config/coreboot/kcma-d8-udimm_16mb/target.cfg
rename to config/coreboot/kcma_d8-udimm_16mb/target.cfg
diff --git a/config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kcma_d8_rdimm_16mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode
rename to config/coreboot/kcma_d8_rdimm_16mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg b/config/coreboot/kcma_d8_rdimm_16mb/target.cfg
similarity index 100%
rename from config/coreboot/kcma-d8-rdimm_16mb/target.cfg
rename to config/coreboot/kcma_d8_rdimm_16mb/target.cfg
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kcma_d8_rdimm_2mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode
rename to config/coreboot/kcma_d8_rdimm_2mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg b/config/coreboot/kcma_d8_rdimm_2mb/target.cfg
similarity index 100%
rename from config/coreboot/kcma-d8-rdimm_2mb/target.cfg
rename to config/coreboot/kcma_d8_rdimm_2mb/target.cfg
diff --git a/config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kcma_d8_udimm_2mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode
rename to config/coreboot/kcma_d8_udimm_2mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kcma-d8-udimm_2mb/target.cfg b/config/coreboot/kcma_d8_udimm_2mb/target.cfg
similarity index 100%
rename from config/coreboot/kcma-d8-udimm_2mb/target.cfg
rename to config/coreboot/kcma_d8_udimm_2mb/target.cfg
diff --git a/config/coreboot/kfsn4-dre_1mb/config/libgfxinit_txtmode b/config/coreboot/kfsn4_dre_1mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/kfsn4-dre_1mb/config/libgfxinit_txtmode
rename to config/coreboot/kfsn4_dre_1mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kfsn4-dre_1mb/target.cfg b/config/coreboot/kfsn4_dre_1mb/target.cfg
similarity index 100%
rename from config/coreboot/kfsn4-dre_1mb/target.cfg
rename to config/coreboot/kfsn4_dre_1mb/target.cfg
diff --git a/config/coreboot/kfsn4-dre_2mb/config/libgfxinit_txtmode b/config/coreboot/kfsn4_dre_2mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/kfsn4-dre_2mb/config/libgfxinit_txtmode
rename to config/coreboot/kfsn4_dre_2mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kfsn4-dre_2mb/target.cfg b/config/coreboot/kfsn4_dre_2mb/target.cfg
similarity index 100%
rename from config/coreboot/kfsn4-dre_2mb/target.cfg
rename to config/coreboot/kfsn4_dre_2mb/target.cfg
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kgpe_d16_rdimm_16mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode
rename to config/coreboot/kgpe_d16_rdimm_16mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg b/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg
similarity index 100%
rename from config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
rename to config/coreboot/kgpe_d16_rdimm_16mb/target.cfg
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kgpe_d16_rdimm_2mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode
rename to config/coreboot/kgpe_d16_rdimm_2mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg b/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg
similarity index 100%
rename from config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
rename to config/coreboot/kgpe_d16_rdimm_2mb/target.cfg
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kgpe_d16_udimm_16mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode
rename to config/coreboot/kgpe_d16_udimm_16mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg b/config/coreboot/kgpe_d16_udimm_16mb/target.cfg
similarity index 100%
rename from config/coreboot/kgpe-d16-udimm_16mb/target.cfg
rename to config/coreboot/kgpe_d16_udimm_16mb/target.cfg
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kgpe_d16_udimm_2mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode
rename to config/coreboot/kgpe_d16_udimm_2mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg b/config/coreboot/kgpe_d16_udimm_2mb/target.cfg
similarity index 100%
rename from config/coreboot/kgpe-d16-udimm_2mb/target.cfg
rename to config/coreboot/kgpe_d16_udimm_2mb/target.cfg
diff --git a/config/vendor/sources b/config/vendor/sources
index 12bd6d8b..2096af54 100644
--- a/config/vendor/sources
+++ b/config/vendor/sources
@@ -23,7 +23,7 @@
 
 # NOTE: google's manifest for archives containing mrc.bin, used here:
 # https://web.archive.org/web/20210211071412/https://dl.google.com/dl/edgedl/chromeos/recovery/recovery.conf
-{t440plibremrc w541 dell9020sff-nri dell9020mt-nri}{
+{t440plibremrc w541 dell9020sff_nri dell9020mt_nri}{
 	DL_hash f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998
 	DL_url https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
 	DL_url_bkup https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe

From 47f582d4639d4b9079aa83cba95681c5ebbaad3b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 29 May 2024 03:23:30 +0100
Subject: [PATCH 0440/1549] ./vendor download: skip if blob path is /dev/null

We use a path of /dev/null pointing to a ROM for
Fam15h AMD boards, to add fake PIKE2008 images.

This is to mitigate a hang in SeaBIOS, but now with
recent changes, this causes the command below to
download coreboot, when it should just exit saying
no vendor files needed. Prevent accidentally wasted
bandwidth. The command was:

./vendor download kcma_d8_rdimm_16mb

This now correctly does the following:
$ ./vendor download kcma_d8_rdimm_16mb
Vendor files not needed for: kcma_d8_rdimm_16mb

The joys of programming a build system in sh!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/vendor.sh b/include/vendor.sh
index 8178fbf9..f307fcbd 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -62,6 +62,7 @@ detect_firmware()
 
 	for c in CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
 	    CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW; do
+		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
 		eval "[ -z \"\${$c}\" ] || return 1"
 	done
 	printf "Vendor files not needed for: %s\n" "$board" 1>&2

From 7fbcb7be95eb5bed42f0656015228352aa0882af Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 29 May 2024 23:42:48 +0100
Subject: [PATCH 0441/1549] coreboot t440p/w541: enable nvme in grub_scan_disk

these laptops do not officially have nvme slots on them,
but there is an ngff wifi slot which is PCI-E x1, and you
can use a special adapter on it to run nvme ssds.

total throughput is retarded by the x1 PCI-E configuration,
but it's still faster than a sata ssd (nvmes are x4 PCI-E).

support it in grub_scan_disk on the off chance that some
users may make use of this. it should work just fine.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/t440plibremrc_12mb/target.cfg | 2 +-
 config/coreboot/w541_12mb/target.cfg          | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index 1567769d..813ed915 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -3,4 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
+grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index 1567769d..813ed915 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -3,4 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_scan_disk="ahci"
+grub_scan_disk="nvme ahci"

From f6cbc501c1602433c466f2e23acf8828f27dbd92 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 30 May 2024 07:29:50 +0100
Subject: [PATCH 0442/1549] import nuke() from cbmk cdce8ba70b

cbmk revision:
cdce8ba70b863ea3fe0ad7a4d7b27d0c5ca30421
as of date 30 May 2024

Canoeboot provides deblobbing, fully, on all sources, so
as to provide a GNU FSDG compliant coreboot distro.

Libreboot used to do this but now uses a more pragmatic
Binary Blob Reduction Policy, allowing better hardware
support in general. See:

https://libreboot.org/news/policy.html

Well! We sometimes still need to delete files in Libreboot,
but for other reasons. For example, the poorly licensed
strlcat.c file that we delete from U-Boot, in both projects.

I currently hardcode such deletions in lbmk. After this
revision, I will start using "nuke.list" files as in cbmk.

Simply patching the sources to exclude such files, in this
context, is not OK because then we are still including them
but as diffs. This is why the nuke() function exists.

Import Canoeboot's nuke technology.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/include/git.sh b/include/git.sh
index f5aa34eb..3052d5b4 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -46,6 +46,7 @@ prepare_new_tree()
 	cp -R "src/$project/$project" "$tmpgit" || \
 	    $err "prepare_new_tree $project/$tree: can't make tmpclone"
 	git_prep "$PWD/$cfgsdir/$tree/patches" "src/$project/$tree" "update"
+	nuke "$project/$tree" "$project/$tree"
 }
 
 fetch_project_repo()
@@ -61,6 +62,10 @@ fetch_project_repo()
 		x_ ./update trees -f $d
 	done
 	rm -Rf "$tmpgit" || $err "fetch_repo: !rm -Rf $tmpgit"
+
+	for x in config/git/*; do
+		[ -f "$x" ] && nuke "${x##*/}" "src/${x##*/}"; continue
+	done
 }
 
 clone_project()
@@ -181,3 +186,32 @@ move_repo()
 	[ -n "$xtree" ] && [ ! -d "src/coreboot/$xtree" ] && \
 		x_ ./update trees -f coreboot "$xtree"; return 0
 }
+
+# can delete from multi- and single-tree projects.
+# called from script/trees when downloading sources.
+nuke()
+{
+	del="n"
+	pjcfgdir="${1%/}"
+	pjsrcdir="${2%/}"
+	pjsrcdir="${pjsrcdir#src/}"
+	[ ! -f "config/$pjcfgdir/nuke.list" ] && return 0
+
+	while read -r nukefile; do
+		rmf="$(realpath "src/$pjsrcdir/$nukefile" 2>/dev/null)" || \
+		    continue
+		[ -L "$rmf" ] && continue # we will delete the actual file
+		[ "${rmf#"$PWD/src/$pjsrcdir"}" = "$rmf" ] && continue
+		[ "${rmf#"$PWD/src/"}" = "$pjsrcdir" ] && continue
+		rmf="${rmf#"$PWD/"}"
+		[ -e "$rmf" ] || continue
+		del="y"
+		rm -Rf "$rmf" || $err "$nuke pjcfgdir: can't rm \"$nukefile\""
+		printf "nuke %s: deleted \"%s\"\n" "$pjcfgdir" "$rmf"
+	done < "config/$pjcfgdir/nuke.list"
+
+	[ "${del}" = "y" ] && return 0
+	printf "nuke %s: no defined files exist in dir, src/%s\n" 1>&2 \
+	    "$pjcfgdir" "$pjsrcdir"
+	printf "(this is not an error)\n" 1>&2
+}

From 13d4b6d3c7378237278279ab43b47a62a7626f65 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 30 May 2024 07:37:19 +0100
Subject: [PATCH 0443/1549] delete u-boot test/lib/strlcat.c using nuke()

we don't need to do it in the release function

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build                           | 1 -
 config/u-boot/default/nuke.list | 1 +
 2 files changed, 1 insertion(+), 1 deletion(-)
 create mode 100644 config/u-boot/default/nuke.list

diff --git a/build b/build
index 2877a8fb..28d8be08 100755
--- a/build
+++ b/build
@@ -139,7 +139,6 @@ fetch_trees()
 		[ ! -f "$x" ] || [ -L "$xp" ] || x_ rm -Rf "src/$xp/$xp"
 	done
 	rmgit .
-	rm -Rf tmp .git src/u-boot/*/test/lib/strlcat.c || $err "$_xm !rm"
 }
 
 fail()
diff --git a/config/u-boot/default/nuke.list b/config/u-boot/default/nuke.list
new file mode 100644
index 00000000..f3a3fcc3
--- /dev/null
+++ b/config/u-boot/default/nuke.list
@@ -0,0 +1 @@
+test/lib/strlcat.c

From 17a9d11da1f7a13664c77b18aec022c1d657fa66 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 30 May 2024 07:50:58 +0100
Subject: [PATCH 0444/1549] git.sh: do not remove .submodules

the reason for it is because sometimes the coreboot build
system auto-downloads submodules which we don't want.

however, we now pass UPDATED_SUBMODULES=1 in make, which
disables this behaviour in coreboot's build system.

therefore, remove this unnecessary logic.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 3052d5b4..e7fe28b5 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -120,9 +120,6 @@ prep_submodules()
 		fetch_submodule "$msrcdir"
 		patch_submodule "$msrcdir"
 	done < "$tmpdir/modules"
-
-	# some build systems may download more (we want to control it)
-	rm -f "$tmpgit/.gitmodules" || $err "!rm .gitmodules as per: $mdir"
 }
 
 fetch_submodule()

From 221206b4da6e6e8e3d2782f3903956e55299be40 Mon Sep 17 00:00:00 2001
From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
Date: Thu, 30 May 2024 14:15:06 -0600
Subject: [PATCH 0445/1549] Fix building vboot on i686

---
 .../0001-don-t-treat-warnings-as-errors.patch |  26 ---
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch | 178 ++++++++++++++++++
 .../0001-don-t-treat-warnings-as-errors.patch |  35 ----
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch | 178 ++++++++++++++++++
 .../0001-don-t-treat-warnings-as-errors.patch |  35 ----
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch | 178 ++++++++++++++++++
 .../0001-don-t-treat-warnings-as-errors.patch |  26 ---
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch | 178 ++++++++++++++++++
 .../0001-don-t-treat-warnings-as-errors.patch |  26 ---
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch | 178 ++++++++++++++++++
 .../0001-don-t-treat-warnings-as-errors.patch |  35 ----
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch | 178 ++++++++++++++++++
 .../0001-don-t-treat-warnings-as-errors.patch |  35 ----
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch | 178 ++++++++++++++++++
 14 files changed, 1246 insertions(+), 218 deletions(-)
 delete mode 100644 config/submodule/coreboot/coreboot413/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
 create mode 100644 config/submodule/coreboot/coreboot413/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
 delete mode 100644 config/submodule/coreboot/default/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
 create mode 100644 config/submodule/coreboot/default/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
 delete mode 100644 config/submodule/coreboot/dell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
 create mode 100644 config/submodule/coreboot/dell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
 delete mode 100644 config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
 create mode 100644 config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
 delete mode 100644 config/submodule/coreboot/fam15h_udimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
 create mode 100644 config/submodule/coreboot/fam15h_udimm/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
 delete mode 100644 config/submodule/coreboot/haswell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
 create mode 100644 config/submodule/coreboot/haswell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
 delete mode 100644 config/submodule/coreboot/i945/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
 create mode 100644 config/submodule/coreboot/i945/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch

diff --git a/config/submodule/coreboot/coreboot413/vboot/patches/0001-don-t-treat-warnings-as-errors.patch b/config/submodule/coreboot/coreboot413/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
deleted file mode 100644
index eb491a37..00000000
--- a/config/submodule/coreboot/coreboot413/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 49569081d248e6eea3d4fb8a2cfb70154d9fd91f Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Tue, 21 May 2024 23:14:51 +0100
-Subject: [PATCH 1/1] don't treat warnings as errors
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- Makefile | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/Makefile b/Makefile
-index 8f1bd148..67a282ee 100644
---- a/Makefile
-+++ b/Makefile
-@@ -124,7 +124,7 @@ endif
- # Provide default CC and CFLAGS for firmware builds; if you have any -D flags,
- # please add them after this point (e.g., -DVBOOT_DEBUG).
- DEBUG_FLAGS := $(if ${DEBUG},-g -O0,-g -Os)
--WERROR := -Werror
-+WERROR := -Wno-error -w
- FIRMWARE_FLAGS := -nostdinc -ffreestanding -fno-builtin -fno-stack-protector
- COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
- 	-Wundef -Wmissing-prototypes -Wno-trigraphs -Wredundant-decls -Wshadow \
--- 
-2.39.2
-
diff --git a/config/submodule/coreboot/coreboot413/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/coreboot413/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
new file mode 100644
index 00000000..1ac41de6
--- /dev/null
+++ b/config/submodule/coreboot/coreboot413/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
@@ -0,0 +1,178 @@
+From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
+From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
+Date: Thu, 30 May 2024 14:08:33 -0600
+Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
+ vmlinuz_header_{offset,size}
+
+The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
+wrong:
+
+	if (!vmlinuz_header_size ||
+	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+	    kpart_data) {
+		return 1;
+	}
+
+`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
+unless something has overflowed!  And `vmlinuz_header_offset` hasn't even
+been set yet (besides being initialized to zero)!
+
+GCC will deduce that if the check didn't cause the function to bail, then
+vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
+[2GiB,4GiB).
+
+On platforms where size_t is 32-bits, this is *especially* broken.
+memcpy's size argument must be in the range [0,2GiB).  Because GCC has
+proved that vmlinuz_header_size is higher than that, it will fail to
+compile:
+
+	host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
+
+So, fix the check.
+
+I can now say that what I suspect the original author meant to write would
+be the following patch, if `vmlinuz_header_offset` were already set:
+
+	-kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
+	+now        + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
+
+This hypothesis is supported by `now` not getting incremented by
+`kblob_size` the way it is for the keyblock and preamble sizes.
+
+However, we can also see that even this "corrected" bounds check is
+insufficient: it does not detect the vmlinuz_header overflowing into
+kblob_data.
+
+OK, so let's describe the fix:
+
+Have a `*vmlinuz_header` pointer instead of a
+`uint64_t vmlinuz_header_offset`, to be more similar to all the other
+regions.  With this change, the correct check becomes a simple
+
+      vmlinuz_header + vmlinuz_header_size > kblob_data
+
+While we're at it, make some changes that could have helped avoid this in
+the first place:
+
+ - Add comments.
+ - Calculate the vmlinuz_header offset right away, instead of waiting.
+ - Go ahead and increment `now` by `kblob_size`, to increase regularity.
+
+Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
+---
+ host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
+ 1 file changed, 51 insertions(+), 21 deletions(-)
+
+diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
+index 4ccfcf33..d2c09443 100644
+--- a/host/lib/extract_vmlinuz.c
++++ b/host/lib/extract_vmlinuz.c
+@@ -15,16 +15,44 @@
+ 
+ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 		   void **vmlinuz_out, size_t *vmlinuz_size) {
++	// We're going to be extracting `vmlinuz_header` and
++	// `kblob_data`, and returning the concatenation of them.
++	//
++	// kpart_data = +-[kpart_size]------------------------------------+
++	//              |                                                 |
++	//  keyblock  = | +-[keyblock->keyblock_size]-------------------+ |
++	//              | | struct vb2_keyblock          keyblock       | |
++	//              | | char []                      ...data...     | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  preamble  = | +-[preamble->preamble_size]-------------------+ |
++	//              | | struct vb2_kernel_preamble   preamble       | |
++	//              | | char []                       ...data...    | |
++	//              | | char []                      vmlinuz_header | |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  kblob_data= | +-[preamble->body_signature.data_size]--------+ |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//              +-------------------------------------------------+
++
+ 	size_t now = 0;
++	// The 3 sections of kpart_data.
++	struct vb2_keyblock *keyblock = NULL;
+ 	struct vb2_kernel_preamble *preamble = NULL;
+ 	uint8_t *kblob_data = NULL;
+ 	uint32_t kblob_size = 0;
++	// vmlinuz_header
++	uint8_t *vmlinuz_header = NULL;
+ 	uint32_t vmlinuz_header_size = 0;
+-	uint64_t vmlinuz_header_address = 0;
+-	uint64_t vmlinuz_header_offset = 0;
++	// The concatenated result.
+ 	void *vmlinuz = NULL;
+ 
+-	struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
++	// Isolate the 3 sections of kpart_data.
++
++	keyblock = (struct vb2_keyblock *)kpart_data;
+ 	now += keyblock->keyblock_size;
+ 	if (now > kpart_size)
+ 		return 1;
+@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 
+ 	kblob_data = kpart_data + now;
+ 	kblob_size = preamble->body_signature.data_size;
+-
+-	if (!kblob_data || (now + kblob_size) > kpart_size)
++	now += kblob_size;
++	if (now > kpart_size)
+ 		return 1;
+ 
++	// Find `vmlinuz_header` within `preamble`.
++
+ 	if (preamble->header_version_minor > 0) {
+-		vmlinuz_header_address = preamble->vmlinuz_header_address;
++		// calculate the vmlinuz_header offset from
++		// the beginning of the kpart_data.  The kblob doesn't
++		// include the body_load_offset, but does include
++		// the keyblock and preamble sections.
++		size_t vmlinuz_header_offset =
++			preamble->vmlinuz_header_address -
++			preamble->body_load_address +
++			keyblock->keyblock_size +
++			preamble->preamble_size;
++
++		vmlinuz_header = kpart_data + vmlinuz_header_offset;
+ 		vmlinuz_header_size = preamble->vmlinuz_header_size;
+ 	}
+ 
+-	if (!vmlinuz_header_size ||
+-	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+-	    kpart_data) {
++	if (!vmlinuz_header ||
++	    !vmlinuz_header_size ||
++	    vmlinuz_header + vmlinuz_header_size > kblob_data) {
+ 		return 1;
+ 	}
+ 
+-	// calculate the vmlinuz_header offset from
+-	// the beginning of the kpart_data.  The kblob doesn't
+-	// include the body_load_offset, but does include
+-	// the keyblock and preamble sections.
+-	vmlinuz_header_offset = vmlinuz_header_address -
+-		preamble->body_load_address +
+-		keyblock->keyblock_size +
+-		preamble->preamble_size;
++	// Concatenate and return.
+ 
+ 	vmlinuz = malloc(vmlinuz_header_size + kblob_size);
+ 	if (vmlinuz == NULL)
+ 		return 1;
+-
+-	memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
+-	       vmlinuz_header_size);
+-
++	memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
+ 	memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
+ 
+ 	*vmlinuz_out = vmlinuz;
+-- 
+2.45.1
+
diff --git a/config/submodule/coreboot/default/vboot/patches/0001-don-t-treat-warnings-as-errors.patch b/config/submodule/coreboot/default/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
deleted file mode 100644
index 9e14dc7d..00000000
--- a/config/submodule/coreboot/default/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From d94300a671688746f2fb3d77eefa631a3ed90306 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sun, 19 May 2024 23:35:52 +0100
-Subject: [PATCH 1/1] don't treat warnings as errors
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- Makefile | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/Makefile b/Makefile
-index 4cb265b2..4ba8b2da 100644
---- a/Makefile
-+++ b/Makefile
-@@ -114,7 +114,7 @@ endif
- # Provide default CC and CFLAGS for firmware builds; if you have any -D flags,
- # please add them after this point (e.g., -DVBOOT_DEBUG).
- DEBUG_FLAGS := $(if $(filter-out 0,${DEBUG}),-g -Og,-g -Os)
--WERROR := -Werror
-+WERROR := -Wno-error -w
- FIRMWARE_FLAGS := -nostdinc -ffreestanding -fno-builtin -fno-stack-protector
- COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
- 	-Wundef -Wmissing-prototypes -Wno-trigraphs -Wredundant-decls -Wshadow \
-@@ -128,7 +128,7 @@ COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
- # returns: $(1) if compiler was successful, empty string otherwise
- test_ccflag = $(shell \
- 	printf "$(2)\nvoid _start(void) {}\n" | \
--	$(CC) -nostdlib -Werror $(1) -xc -c - -o /dev/null \
-+	$(CC) -nostdlib -Wno-error -w $(1) -xc -c - -o /dev/null \
- 	>/dev/null 2>&1 && echo "$(1)")
- 
- COMMON_FLAGS += $(call test_ccflag,-Wimplicit-fallthrough)
--- 
-2.39.2
-
diff --git a/config/submodule/coreboot/default/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/default/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
new file mode 100644
index 00000000..1ac41de6
--- /dev/null
+++ b/config/submodule/coreboot/default/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
@@ -0,0 +1,178 @@
+From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
+From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
+Date: Thu, 30 May 2024 14:08:33 -0600
+Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
+ vmlinuz_header_{offset,size}
+
+The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
+wrong:
+
+	if (!vmlinuz_header_size ||
+	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+	    kpart_data) {
+		return 1;
+	}
+
+`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
+unless something has overflowed!  And `vmlinuz_header_offset` hasn't even
+been set yet (besides being initialized to zero)!
+
+GCC will deduce that if the check didn't cause the function to bail, then
+vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
+[2GiB,4GiB).
+
+On platforms where size_t is 32-bits, this is *especially* broken.
+memcpy's size argument must be in the range [0,2GiB).  Because GCC has
+proved that vmlinuz_header_size is higher than that, it will fail to
+compile:
+
+	host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
+
+So, fix the check.
+
+I can now say that what I suspect the original author meant to write would
+be the following patch, if `vmlinuz_header_offset` were already set:
+
+	-kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
+	+now        + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
+
+This hypothesis is supported by `now` not getting incremented by
+`kblob_size` the way it is for the keyblock and preamble sizes.
+
+However, we can also see that even this "corrected" bounds check is
+insufficient: it does not detect the vmlinuz_header overflowing into
+kblob_data.
+
+OK, so let's describe the fix:
+
+Have a `*vmlinuz_header` pointer instead of a
+`uint64_t vmlinuz_header_offset`, to be more similar to all the other
+regions.  With this change, the correct check becomes a simple
+
+      vmlinuz_header + vmlinuz_header_size > kblob_data
+
+While we're at it, make some changes that could have helped avoid this in
+the first place:
+
+ - Add comments.
+ - Calculate the vmlinuz_header offset right away, instead of waiting.
+ - Go ahead and increment `now` by `kblob_size`, to increase regularity.
+
+Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
+---
+ host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
+ 1 file changed, 51 insertions(+), 21 deletions(-)
+
+diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
+index 4ccfcf33..d2c09443 100644
+--- a/host/lib/extract_vmlinuz.c
++++ b/host/lib/extract_vmlinuz.c
+@@ -15,16 +15,44 @@
+ 
+ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 		   void **vmlinuz_out, size_t *vmlinuz_size) {
++	// We're going to be extracting `vmlinuz_header` and
++	// `kblob_data`, and returning the concatenation of them.
++	//
++	// kpart_data = +-[kpart_size]------------------------------------+
++	//              |                                                 |
++	//  keyblock  = | +-[keyblock->keyblock_size]-------------------+ |
++	//              | | struct vb2_keyblock          keyblock       | |
++	//              | | char []                      ...data...     | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  preamble  = | +-[preamble->preamble_size]-------------------+ |
++	//              | | struct vb2_kernel_preamble   preamble       | |
++	//              | | char []                       ...data...    | |
++	//              | | char []                      vmlinuz_header | |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  kblob_data= | +-[preamble->body_signature.data_size]--------+ |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//              +-------------------------------------------------+
++
+ 	size_t now = 0;
++	// The 3 sections of kpart_data.
++	struct vb2_keyblock *keyblock = NULL;
+ 	struct vb2_kernel_preamble *preamble = NULL;
+ 	uint8_t *kblob_data = NULL;
+ 	uint32_t kblob_size = 0;
++	// vmlinuz_header
++	uint8_t *vmlinuz_header = NULL;
+ 	uint32_t vmlinuz_header_size = 0;
+-	uint64_t vmlinuz_header_address = 0;
+-	uint64_t vmlinuz_header_offset = 0;
++	// The concatenated result.
+ 	void *vmlinuz = NULL;
+ 
+-	struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
++	// Isolate the 3 sections of kpart_data.
++
++	keyblock = (struct vb2_keyblock *)kpart_data;
+ 	now += keyblock->keyblock_size;
+ 	if (now > kpart_size)
+ 		return 1;
+@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 
+ 	kblob_data = kpart_data + now;
+ 	kblob_size = preamble->body_signature.data_size;
+-
+-	if (!kblob_data || (now + kblob_size) > kpart_size)
++	now += kblob_size;
++	if (now > kpart_size)
+ 		return 1;
+ 
++	// Find `vmlinuz_header` within `preamble`.
++
+ 	if (preamble->header_version_minor > 0) {
+-		vmlinuz_header_address = preamble->vmlinuz_header_address;
++		// calculate the vmlinuz_header offset from
++		// the beginning of the kpart_data.  The kblob doesn't
++		// include the body_load_offset, but does include
++		// the keyblock and preamble sections.
++		size_t vmlinuz_header_offset =
++			preamble->vmlinuz_header_address -
++			preamble->body_load_address +
++			keyblock->keyblock_size +
++			preamble->preamble_size;
++
++		vmlinuz_header = kpart_data + vmlinuz_header_offset;
+ 		vmlinuz_header_size = preamble->vmlinuz_header_size;
+ 	}
+ 
+-	if (!vmlinuz_header_size ||
+-	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+-	    kpart_data) {
++	if (!vmlinuz_header ||
++	    !vmlinuz_header_size ||
++	    vmlinuz_header + vmlinuz_header_size > kblob_data) {
+ 		return 1;
+ 	}
+ 
+-	// calculate the vmlinuz_header offset from
+-	// the beginning of the kpart_data.  The kblob doesn't
+-	// include the body_load_offset, but does include
+-	// the keyblock and preamble sections.
+-	vmlinuz_header_offset = vmlinuz_header_address -
+-		preamble->body_load_address +
+-		keyblock->keyblock_size +
+-		preamble->preamble_size;
++	// Concatenate and return.
+ 
+ 	vmlinuz = malloc(vmlinuz_header_size + kblob_size);
+ 	if (vmlinuz == NULL)
+ 		return 1;
+-
+-	memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
+-	       vmlinuz_header_size);
+-
++	memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
+ 	memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
+ 
+ 	*vmlinuz_out = vmlinuz;
+-- 
+2.45.1
+
diff --git a/config/submodule/coreboot/dell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch b/config/submodule/coreboot/dell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
deleted file mode 100644
index 9e14dc7d..00000000
--- a/config/submodule/coreboot/dell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From d94300a671688746f2fb3d77eefa631a3ed90306 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sun, 19 May 2024 23:35:52 +0100
-Subject: [PATCH 1/1] don't treat warnings as errors
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- Makefile | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/Makefile b/Makefile
-index 4cb265b2..4ba8b2da 100644
---- a/Makefile
-+++ b/Makefile
-@@ -114,7 +114,7 @@ endif
- # Provide default CC and CFLAGS for firmware builds; if you have any -D flags,
- # please add them after this point (e.g., -DVBOOT_DEBUG).
- DEBUG_FLAGS := $(if $(filter-out 0,${DEBUG}),-g -Og,-g -Os)
--WERROR := -Werror
-+WERROR := -Wno-error -w
- FIRMWARE_FLAGS := -nostdinc -ffreestanding -fno-builtin -fno-stack-protector
- COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
- 	-Wundef -Wmissing-prototypes -Wno-trigraphs -Wredundant-decls -Wshadow \
-@@ -128,7 +128,7 @@ COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
- # returns: $(1) if compiler was successful, empty string otherwise
- test_ccflag = $(shell \
- 	printf "$(2)\nvoid _start(void) {}\n" | \
--	$(CC) -nostdlib -Werror $(1) -xc -c - -o /dev/null \
-+	$(CC) -nostdlib -Wno-error -w $(1) -xc -c - -o /dev/null \
- 	>/dev/null 2>&1 && echo "$(1)")
- 
- COMMON_FLAGS += $(call test_ccflag,-Wimplicit-fallthrough)
--- 
-2.39.2
-
diff --git a/config/submodule/coreboot/dell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/dell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
new file mode 100644
index 00000000..1ac41de6
--- /dev/null
+++ b/config/submodule/coreboot/dell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
@@ -0,0 +1,178 @@
+From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
+From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
+Date: Thu, 30 May 2024 14:08:33 -0600
+Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
+ vmlinuz_header_{offset,size}
+
+The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
+wrong:
+
+	if (!vmlinuz_header_size ||
+	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+	    kpart_data) {
+		return 1;
+	}
+
+`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
+unless something has overflowed!  And `vmlinuz_header_offset` hasn't even
+been set yet (besides being initialized to zero)!
+
+GCC will deduce that if the check didn't cause the function to bail, then
+vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
+[2GiB,4GiB).
+
+On platforms where size_t is 32-bits, this is *especially* broken.
+memcpy's size argument must be in the range [0,2GiB).  Because GCC has
+proved that vmlinuz_header_size is higher than that, it will fail to
+compile:
+
+	host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
+
+So, fix the check.
+
+I can now say that what I suspect the original author meant to write would
+be the following patch, if `vmlinuz_header_offset` were already set:
+
+	-kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
+	+now        + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
+
+This hypothesis is supported by `now` not getting incremented by
+`kblob_size` the way it is for the keyblock and preamble sizes.
+
+However, we can also see that even this "corrected" bounds check is
+insufficient: it does not detect the vmlinuz_header overflowing into
+kblob_data.
+
+OK, so let's describe the fix:
+
+Have a `*vmlinuz_header` pointer instead of a
+`uint64_t vmlinuz_header_offset`, to be more similar to all the other
+regions.  With this change, the correct check becomes a simple
+
+      vmlinuz_header + vmlinuz_header_size > kblob_data
+
+While we're at it, make some changes that could have helped avoid this in
+the first place:
+
+ - Add comments.
+ - Calculate the vmlinuz_header offset right away, instead of waiting.
+ - Go ahead and increment `now` by `kblob_size`, to increase regularity.
+
+Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
+---
+ host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
+ 1 file changed, 51 insertions(+), 21 deletions(-)
+
+diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
+index 4ccfcf33..d2c09443 100644
+--- a/host/lib/extract_vmlinuz.c
++++ b/host/lib/extract_vmlinuz.c
+@@ -15,16 +15,44 @@
+ 
+ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 		   void **vmlinuz_out, size_t *vmlinuz_size) {
++	// We're going to be extracting `vmlinuz_header` and
++	// `kblob_data`, and returning the concatenation of them.
++	//
++	// kpart_data = +-[kpart_size]------------------------------------+
++	//              |                                                 |
++	//  keyblock  = | +-[keyblock->keyblock_size]-------------------+ |
++	//              | | struct vb2_keyblock          keyblock       | |
++	//              | | char []                      ...data...     | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  preamble  = | +-[preamble->preamble_size]-------------------+ |
++	//              | | struct vb2_kernel_preamble   preamble       | |
++	//              | | char []                       ...data...    | |
++	//              | | char []                      vmlinuz_header | |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  kblob_data= | +-[preamble->body_signature.data_size]--------+ |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//              +-------------------------------------------------+
++
+ 	size_t now = 0;
++	// The 3 sections of kpart_data.
++	struct vb2_keyblock *keyblock = NULL;
+ 	struct vb2_kernel_preamble *preamble = NULL;
+ 	uint8_t *kblob_data = NULL;
+ 	uint32_t kblob_size = 0;
++	// vmlinuz_header
++	uint8_t *vmlinuz_header = NULL;
+ 	uint32_t vmlinuz_header_size = 0;
+-	uint64_t vmlinuz_header_address = 0;
+-	uint64_t vmlinuz_header_offset = 0;
++	// The concatenated result.
+ 	void *vmlinuz = NULL;
+ 
+-	struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
++	// Isolate the 3 sections of kpart_data.
++
++	keyblock = (struct vb2_keyblock *)kpart_data;
+ 	now += keyblock->keyblock_size;
+ 	if (now > kpart_size)
+ 		return 1;
+@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 
+ 	kblob_data = kpart_data + now;
+ 	kblob_size = preamble->body_signature.data_size;
+-
+-	if (!kblob_data || (now + kblob_size) > kpart_size)
++	now += kblob_size;
++	if (now > kpart_size)
+ 		return 1;
+ 
++	// Find `vmlinuz_header` within `preamble`.
++
+ 	if (preamble->header_version_minor > 0) {
+-		vmlinuz_header_address = preamble->vmlinuz_header_address;
++		// calculate the vmlinuz_header offset from
++		// the beginning of the kpart_data.  The kblob doesn't
++		// include the body_load_offset, but does include
++		// the keyblock and preamble sections.
++		size_t vmlinuz_header_offset =
++			preamble->vmlinuz_header_address -
++			preamble->body_load_address +
++			keyblock->keyblock_size +
++			preamble->preamble_size;
++
++		vmlinuz_header = kpart_data + vmlinuz_header_offset;
+ 		vmlinuz_header_size = preamble->vmlinuz_header_size;
+ 	}
+ 
+-	if (!vmlinuz_header_size ||
+-	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+-	    kpart_data) {
++	if (!vmlinuz_header ||
++	    !vmlinuz_header_size ||
++	    vmlinuz_header + vmlinuz_header_size > kblob_data) {
+ 		return 1;
+ 	}
+ 
+-	// calculate the vmlinuz_header offset from
+-	// the beginning of the kpart_data.  The kblob doesn't
+-	// include the body_load_offset, but does include
+-	// the keyblock and preamble sections.
+-	vmlinuz_header_offset = vmlinuz_header_address -
+-		preamble->body_load_address +
+-		keyblock->keyblock_size +
+-		preamble->preamble_size;
++	// Concatenate and return.
+ 
+ 	vmlinuz = malloc(vmlinuz_header_size + kblob_size);
+ 	if (vmlinuz == NULL)
+ 		return 1;
+-
+-	memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
+-	       vmlinuz_header_size);
+-
++	memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
+ 	memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
+ 
+ 	*vmlinuz_out = vmlinuz;
+-- 
+2.45.1
+
diff --git a/config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch b/config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
deleted file mode 100644
index 1dbf6c13..00000000
--- a/config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 2c5c8d9a5c999a5eedd9f17acb0bd3924524657d Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Tue, 21 May 2024 23:21:14 +0100
-Subject: [PATCH 1/1] don't treat warnings as errors
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- Makefile | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/Makefile b/Makefile
-index 0539e8d7..5d8c240c 100644
---- a/Makefile
-+++ b/Makefile
-@@ -136,7 +136,7 @@ endif
- #
- # Flag ordering: arch, then -f, then -m, then -W
- DEBUG_FLAGS := $(if ${DEBUG},-g -O0,-g -Os)
--WERROR := -Werror
-+WERROR := -Wno-error -w
- FIRMWARE_FLAGS := -nostdinc -ffreestanding -fno-builtin -fno-stack-protector
- COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
- 	-Wundef -Wmissing-prototypes -Wno-trigraphs -Wredundant-decls -Wshadow \
--- 
-2.39.2
-
diff --git a/config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
new file mode 100644
index 00000000..1ac41de6
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
@@ -0,0 +1,178 @@
+From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
+From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
+Date: Thu, 30 May 2024 14:08:33 -0600
+Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
+ vmlinuz_header_{offset,size}
+
+The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
+wrong:
+
+	if (!vmlinuz_header_size ||
+	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+	    kpart_data) {
+		return 1;
+	}
+
+`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
+unless something has overflowed!  And `vmlinuz_header_offset` hasn't even
+been set yet (besides being initialized to zero)!
+
+GCC will deduce that if the check didn't cause the function to bail, then
+vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
+[2GiB,4GiB).
+
+On platforms where size_t is 32-bits, this is *especially* broken.
+memcpy's size argument must be in the range [0,2GiB).  Because GCC has
+proved that vmlinuz_header_size is higher than that, it will fail to
+compile:
+
+	host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
+
+So, fix the check.
+
+I can now say that what I suspect the original author meant to write would
+be the following patch, if `vmlinuz_header_offset` were already set:
+
+	-kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
+	+now        + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
+
+This hypothesis is supported by `now` not getting incremented by
+`kblob_size` the way it is for the keyblock and preamble sizes.
+
+However, we can also see that even this "corrected" bounds check is
+insufficient: it does not detect the vmlinuz_header overflowing into
+kblob_data.
+
+OK, so let's describe the fix:
+
+Have a `*vmlinuz_header` pointer instead of a
+`uint64_t vmlinuz_header_offset`, to be more similar to all the other
+regions.  With this change, the correct check becomes a simple
+
+      vmlinuz_header + vmlinuz_header_size > kblob_data
+
+While we're at it, make some changes that could have helped avoid this in
+the first place:
+
+ - Add comments.
+ - Calculate the vmlinuz_header offset right away, instead of waiting.
+ - Go ahead and increment `now` by `kblob_size`, to increase regularity.
+
+Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
+---
+ host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
+ 1 file changed, 51 insertions(+), 21 deletions(-)
+
+diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
+index 4ccfcf33..d2c09443 100644
+--- a/host/lib/extract_vmlinuz.c
++++ b/host/lib/extract_vmlinuz.c
+@@ -15,16 +15,44 @@
+ 
+ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 		   void **vmlinuz_out, size_t *vmlinuz_size) {
++	// We're going to be extracting `vmlinuz_header` and
++	// `kblob_data`, and returning the concatenation of them.
++	//
++	// kpart_data = +-[kpart_size]------------------------------------+
++	//              |                                                 |
++	//  keyblock  = | +-[keyblock->keyblock_size]-------------------+ |
++	//              | | struct vb2_keyblock          keyblock       | |
++	//              | | char []                      ...data...     | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  preamble  = | +-[preamble->preamble_size]-------------------+ |
++	//              | | struct vb2_kernel_preamble   preamble       | |
++	//              | | char []                       ...data...    | |
++	//              | | char []                      vmlinuz_header | |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  kblob_data= | +-[preamble->body_signature.data_size]--------+ |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//              +-------------------------------------------------+
++
+ 	size_t now = 0;
++	// The 3 sections of kpart_data.
++	struct vb2_keyblock *keyblock = NULL;
+ 	struct vb2_kernel_preamble *preamble = NULL;
+ 	uint8_t *kblob_data = NULL;
+ 	uint32_t kblob_size = 0;
++	// vmlinuz_header
++	uint8_t *vmlinuz_header = NULL;
+ 	uint32_t vmlinuz_header_size = 0;
+-	uint64_t vmlinuz_header_address = 0;
+-	uint64_t vmlinuz_header_offset = 0;
++	// The concatenated result.
+ 	void *vmlinuz = NULL;
+ 
+-	struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
++	// Isolate the 3 sections of kpart_data.
++
++	keyblock = (struct vb2_keyblock *)kpart_data;
+ 	now += keyblock->keyblock_size;
+ 	if (now > kpart_size)
+ 		return 1;
+@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 
+ 	kblob_data = kpart_data + now;
+ 	kblob_size = preamble->body_signature.data_size;
+-
+-	if (!kblob_data || (now + kblob_size) > kpart_size)
++	now += kblob_size;
++	if (now > kpart_size)
+ 		return 1;
+ 
++	// Find `vmlinuz_header` within `preamble`.
++
+ 	if (preamble->header_version_minor > 0) {
+-		vmlinuz_header_address = preamble->vmlinuz_header_address;
++		// calculate the vmlinuz_header offset from
++		// the beginning of the kpart_data.  The kblob doesn't
++		// include the body_load_offset, but does include
++		// the keyblock and preamble sections.
++		size_t vmlinuz_header_offset =
++			preamble->vmlinuz_header_address -
++			preamble->body_load_address +
++			keyblock->keyblock_size +
++			preamble->preamble_size;
++
++		vmlinuz_header = kpart_data + vmlinuz_header_offset;
+ 		vmlinuz_header_size = preamble->vmlinuz_header_size;
+ 	}
+ 
+-	if (!vmlinuz_header_size ||
+-	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+-	    kpart_data) {
++	if (!vmlinuz_header ||
++	    !vmlinuz_header_size ||
++	    vmlinuz_header + vmlinuz_header_size > kblob_data) {
+ 		return 1;
+ 	}
+ 
+-	// calculate the vmlinuz_header offset from
+-	// the beginning of the kpart_data.  The kblob doesn't
+-	// include the body_load_offset, but does include
+-	// the keyblock and preamble sections.
+-	vmlinuz_header_offset = vmlinuz_header_address -
+-		preamble->body_load_address +
+-		keyblock->keyblock_size +
+-		preamble->preamble_size;
++	// Concatenate and return.
+ 
+ 	vmlinuz = malloc(vmlinuz_header_size + kblob_size);
+ 	if (vmlinuz == NULL)
+ 		return 1;
+-
+-	memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
+-	       vmlinuz_header_size);
+-
++	memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
+ 	memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
+ 
+ 	*vmlinuz_out = vmlinuz;
+-- 
+2.45.1
+
diff --git a/config/submodule/coreboot/fam15h_udimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch b/config/submodule/coreboot/fam15h_udimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
deleted file mode 100644
index 1dbf6c13..00000000
--- a/config/submodule/coreboot/fam15h_udimm/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-From 2c5c8d9a5c999a5eedd9f17acb0bd3924524657d Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Tue, 21 May 2024 23:21:14 +0100
-Subject: [PATCH 1/1] don't treat warnings as errors
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- Makefile | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/Makefile b/Makefile
-index 0539e8d7..5d8c240c 100644
---- a/Makefile
-+++ b/Makefile
-@@ -136,7 +136,7 @@ endif
- #
- # Flag ordering: arch, then -f, then -m, then -W
- DEBUG_FLAGS := $(if ${DEBUG},-g -O0,-g -Os)
--WERROR := -Werror
-+WERROR := -Wno-error -w
- FIRMWARE_FLAGS := -nostdinc -ffreestanding -fno-builtin -fno-stack-protector
- COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
- 	-Wundef -Wmissing-prototypes -Wno-trigraphs -Wredundant-decls -Wshadow \
--- 
-2.39.2
-
diff --git a/config/submodule/coreboot/fam15h_udimm/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/fam15h_udimm/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
new file mode 100644
index 00000000..1ac41de6
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_udimm/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
@@ -0,0 +1,178 @@
+From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
+From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
+Date: Thu, 30 May 2024 14:08:33 -0600
+Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
+ vmlinuz_header_{offset,size}
+
+The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
+wrong:
+
+	if (!vmlinuz_header_size ||
+	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+	    kpart_data) {
+		return 1;
+	}
+
+`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
+unless something has overflowed!  And `vmlinuz_header_offset` hasn't even
+been set yet (besides being initialized to zero)!
+
+GCC will deduce that if the check didn't cause the function to bail, then
+vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
+[2GiB,4GiB).
+
+On platforms where size_t is 32-bits, this is *especially* broken.
+memcpy's size argument must be in the range [0,2GiB).  Because GCC has
+proved that vmlinuz_header_size is higher than that, it will fail to
+compile:
+
+	host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
+
+So, fix the check.
+
+I can now say that what I suspect the original author meant to write would
+be the following patch, if `vmlinuz_header_offset` were already set:
+
+	-kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
+	+now        + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
+
+This hypothesis is supported by `now` not getting incremented by
+`kblob_size` the way it is for the keyblock and preamble sizes.
+
+However, we can also see that even this "corrected" bounds check is
+insufficient: it does not detect the vmlinuz_header overflowing into
+kblob_data.
+
+OK, so let's describe the fix:
+
+Have a `*vmlinuz_header` pointer instead of a
+`uint64_t vmlinuz_header_offset`, to be more similar to all the other
+regions.  With this change, the correct check becomes a simple
+
+      vmlinuz_header + vmlinuz_header_size > kblob_data
+
+While we're at it, make some changes that could have helped avoid this in
+the first place:
+
+ - Add comments.
+ - Calculate the vmlinuz_header offset right away, instead of waiting.
+ - Go ahead and increment `now` by `kblob_size`, to increase regularity.
+
+Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
+---
+ host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
+ 1 file changed, 51 insertions(+), 21 deletions(-)
+
+diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
+index 4ccfcf33..d2c09443 100644
+--- a/host/lib/extract_vmlinuz.c
++++ b/host/lib/extract_vmlinuz.c
+@@ -15,16 +15,44 @@
+ 
+ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 		   void **vmlinuz_out, size_t *vmlinuz_size) {
++	// We're going to be extracting `vmlinuz_header` and
++	// `kblob_data`, and returning the concatenation of them.
++	//
++	// kpart_data = +-[kpart_size]------------------------------------+
++	//              |                                                 |
++	//  keyblock  = | +-[keyblock->keyblock_size]-------------------+ |
++	//              | | struct vb2_keyblock          keyblock       | |
++	//              | | char []                      ...data...     | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  preamble  = | +-[preamble->preamble_size]-------------------+ |
++	//              | | struct vb2_kernel_preamble   preamble       | |
++	//              | | char []                       ...data...    | |
++	//              | | char []                      vmlinuz_header | |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  kblob_data= | +-[preamble->body_signature.data_size]--------+ |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//              +-------------------------------------------------+
++
+ 	size_t now = 0;
++	// The 3 sections of kpart_data.
++	struct vb2_keyblock *keyblock = NULL;
+ 	struct vb2_kernel_preamble *preamble = NULL;
+ 	uint8_t *kblob_data = NULL;
+ 	uint32_t kblob_size = 0;
++	// vmlinuz_header
++	uint8_t *vmlinuz_header = NULL;
+ 	uint32_t vmlinuz_header_size = 0;
+-	uint64_t vmlinuz_header_address = 0;
+-	uint64_t vmlinuz_header_offset = 0;
++	// The concatenated result.
+ 	void *vmlinuz = NULL;
+ 
+-	struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
++	// Isolate the 3 sections of kpart_data.
++
++	keyblock = (struct vb2_keyblock *)kpart_data;
+ 	now += keyblock->keyblock_size;
+ 	if (now > kpart_size)
+ 		return 1;
+@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 
+ 	kblob_data = kpart_data + now;
+ 	kblob_size = preamble->body_signature.data_size;
+-
+-	if (!kblob_data || (now + kblob_size) > kpart_size)
++	now += kblob_size;
++	if (now > kpart_size)
+ 		return 1;
+ 
++	// Find `vmlinuz_header` within `preamble`.
++
+ 	if (preamble->header_version_minor > 0) {
+-		vmlinuz_header_address = preamble->vmlinuz_header_address;
++		// calculate the vmlinuz_header offset from
++		// the beginning of the kpart_data.  The kblob doesn't
++		// include the body_load_offset, but does include
++		// the keyblock and preamble sections.
++		size_t vmlinuz_header_offset =
++			preamble->vmlinuz_header_address -
++			preamble->body_load_address +
++			keyblock->keyblock_size +
++			preamble->preamble_size;
++
++		vmlinuz_header = kpart_data + vmlinuz_header_offset;
+ 		vmlinuz_header_size = preamble->vmlinuz_header_size;
+ 	}
+ 
+-	if (!vmlinuz_header_size ||
+-	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+-	    kpart_data) {
++	if (!vmlinuz_header ||
++	    !vmlinuz_header_size ||
++	    vmlinuz_header + vmlinuz_header_size > kblob_data) {
+ 		return 1;
+ 	}
+ 
+-	// calculate the vmlinuz_header offset from
+-	// the beginning of the kpart_data.  The kblob doesn't
+-	// include the body_load_offset, but does include
+-	// the keyblock and preamble sections.
+-	vmlinuz_header_offset = vmlinuz_header_address -
+-		preamble->body_load_address +
+-		keyblock->keyblock_size +
+-		preamble->preamble_size;
++	// Concatenate and return.
+ 
+ 	vmlinuz = malloc(vmlinuz_header_size + kblob_size);
+ 	if (vmlinuz == NULL)
+ 		return 1;
+-
+-	memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
+-	       vmlinuz_header_size);
+-
++	memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
+ 	memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
+ 
+ 	*vmlinuz_out = vmlinuz;
+-- 
+2.45.1
+
diff --git a/config/submodule/coreboot/haswell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch b/config/submodule/coreboot/haswell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
deleted file mode 100644
index 73d796c8..00000000
--- a/config/submodule/coreboot/haswell/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From dd263a01c6f1b63fc12a2a3e96e87a8cee8d987c Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Tue, 21 May 2024 23:21:49 +0100
-Subject: [PATCH 1/1] don't treat warnings as errors
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- Makefile | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/Makefile b/Makefile
-index e3739dc0..a11dccbd 100644
---- a/Makefile
-+++ b/Makefile
-@@ -112,7 +112,7 @@ endif
- # Provide default CC and CFLAGS for firmware builds; if you have any -D flags,
- # please add them after this point (e.g., -DVBOOT_DEBUG).
- DEBUG_FLAGS := $(if $(filter-out 0,${DEBUG}),-g -Og,-g -Os)
--WERROR := -Werror
-+WERROR := -Wno-error -w
- FIRMWARE_FLAGS := -nostdinc -ffreestanding -fno-builtin -fno-stack-protector
- COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
- 	-Wundef -Wmissing-prototypes -Wno-trigraphs -Wredundant-decls -Wshadow \
-@@ -126,7 +126,7 @@ COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
- # returns: $(1) if compiler was successful, empty string otherwise
- test_ccflag = $(shell \
- 	printf "$(2)\nvoid _start(void) {}\n" | \
--	$(CC) -nostdlib -Werror $(1) -xc -c - -o /dev/null \
-+	$(CC) -nostdlib -Wno-error -w $(1) -xc -c - -o /dev/null \
- 	>/dev/null 2>&1 && echo "$(1)")
- 
- COMMON_FLAGS += $(call test_ccflag,-Wimplicit-fallthrough)
--- 
-2.39.2
-
diff --git a/config/submodule/coreboot/haswell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/haswell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
new file mode 100644
index 00000000..1ac41de6
--- /dev/null
+++ b/config/submodule/coreboot/haswell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
@@ -0,0 +1,178 @@
+From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
+From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
+Date: Thu, 30 May 2024 14:08:33 -0600
+Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
+ vmlinuz_header_{offset,size}
+
+The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
+wrong:
+
+	if (!vmlinuz_header_size ||
+	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+	    kpart_data) {
+		return 1;
+	}
+
+`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
+unless something has overflowed!  And `vmlinuz_header_offset` hasn't even
+been set yet (besides being initialized to zero)!
+
+GCC will deduce that if the check didn't cause the function to bail, then
+vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
+[2GiB,4GiB).
+
+On platforms where size_t is 32-bits, this is *especially* broken.
+memcpy's size argument must be in the range [0,2GiB).  Because GCC has
+proved that vmlinuz_header_size is higher than that, it will fail to
+compile:
+
+	host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
+
+So, fix the check.
+
+I can now say that what I suspect the original author meant to write would
+be the following patch, if `vmlinuz_header_offset` were already set:
+
+	-kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
+	+now        + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
+
+This hypothesis is supported by `now` not getting incremented by
+`kblob_size` the way it is for the keyblock and preamble sizes.
+
+However, we can also see that even this "corrected" bounds check is
+insufficient: it does not detect the vmlinuz_header overflowing into
+kblob_data.
+
+OK, so let's describe the fix:
+
+Have a `*vmlinuz_header` pointer instead of a
+`uint64_t vmlinuz_header_offset`, to be more similar to all the other
+regions.  With this change, the correct check becomes a simple
+
+      vmlinuz_header + vmlinuz_header_size > kblob_data
+
+While we're at it, make some changes that could have helped avoid this in
+the first place:
+
+ - Add comments.
+ - Calculate the vmlinuz_header offset right away, instead of waiting.
+ - Go ahead and increment `now` by `kblob_size`, to increase regularity.
+
+Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
+---
+ host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
+ 1 file changed, 51 insertions(+), 21 deletions(-)
+
+diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
+index 4ccfcf33..d2c09443 100644
+--- a/host/lib/extract_vmlinuz.c
++++ b/host/lib/extract_vmlinuz.c
+@@ -15,16 +15,44 @@
+ 
+ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 		   void **vmlinuz_out, size_t *vmlinuz_size) {
++	// We're going to be extracting `vmlinuz_header` and
++	// `kblob_data`, and returning the concatenation of them.
++	//
++	// kpart_data = +-[kpart_size]------------------------------------+
++	//              |                                                 |
++	//  keyblock  = | +-[keyblock->keyblock_size]-------------------+ |
++	//              | | struct vb2_keyblock          keyblock       | |
++	//              | | char []                      ...data...     | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  preamble  = | +-[preamble->preamble_size]-------------------+ |
++	//              | | struct vb2_kernel_preamble   preamble       | |
++	//              | | char []                       ...data...    | |
++	//              | | char []                      vmlinuz_header | |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  kblob_data= | +-[preamble->body_signature.data_size]--------+ |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//              +-------------------------------------------------+
++
+ 	size_t now = 0;
++	// The 3 sections of kpart_data.
++	struct vb2_keyblock *keyblock = NULL;
+ 	struct vb2_kernel_preamble *preamble = NULL;
+ 	uint8_t *kblob_data = NULL;
+ 	uint32_t kblob_size = 0;
++	// vmlinuz_header
++	uint8_t *vmlinuz_header = NULL;
+ 	uint32_t vmlinuz_header_size = 0;
+-	uint64_t vmlinuz_header_address = 0;
+-	uint64_t vmlinuz_header_offset = 0;
++	// The concatenated result.
+ 	void *vmlinuz = NULL;
+ 
+-	struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
++	// Isolate the 3 sections of kpart_data.
++
++	keyblock = (struct vb2_keyblock *)kpart_data;
+ 	now += keyblock->keyblock_size;
+ 	if (now > kpart_size)
+ 		return 1;
+@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 
+ 	kblob_data = kpart_data + now;
+ 	kblob_size = preamble->body_signature.data_size;
+-
+-	if (!kblob_data || (now + kblob_size) > kpart_size)
++	now += kblob_size;
++	if (now > kpart_size)
+ 		return 1;
+ 
++	// Find `vmlinuz_header` within `preamble`.
++
+ 	if (preamble->header_version_minor > 0) {
+-		vmlinuz_header_address = preamble->vmlinuz_header_address;
++		// calculate the vmlinuz_header offset from
++		// the beginning of the kpart_data.  The kblob doesn't
++		// include the body_load_offset, but does include
++		// the keyblock and preamble sections.
++		size_t vmlinuz_header_offset =
++			preamble->vmlinuz_header_address -
++			preamble->body_load_address +
++			keyblock->keyblock_size +
++			preamble->preamble_size;
++
++		vmlinuz_header = kpart_data + vmlinuz_header_offset;
+ 		vmlinuz_header_size = preamble->vmlinuz_header_size;
+ 	}
+ 
+-	if (!vmlinuz_header_size ||
+-	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+-	    kpart_data) {
++	if (!vmlinuz_header ||
++	    !vmlinuz_header_size ||
++	    vmlinuz_header + vmlinuz_header_size > kblob_data) {
+ 		return 1;
+ 	}
+ 
+-	// calculate the vmlinuz_header offset from
+-	// the beginning of the kpart_data.  The kblob doesn't
+-	// include the body_load_offset, but does include
+-	// the keyblock and preamble sections.
+-	vmlinuz_header_offset = vmlinuz_header_address -
+-		preamble->body_load_address +
+-		keyblock->keyblock_size +
+-		preamble->preamble_size;
++	// Concatenate and return.
+ 
+ 	vmlinuz = malloc(vmlinuz_header_size + kblob_size);
+ 	if (vmlinuz == NULL)
+ 		return 1;
+-
+-	memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
+-	       vmlinuz_header_size);
+-
++	memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
+ 	memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
+ 
+ 	*vmlinuz_out = vmlinuz;
+-- 
+2.45.1
+
diff --git a/config/submodule/coreboot/i945/vboot/patches/0001-don-t-treat-warnings-as-errors.patch b/config/submodule/coreboot/i945/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
deleted file mode 100644
index 91f2eee8..00000000
--- a/config/submodule/coreboot/i945/vboot/patches/0001-don-t-treat-warnings-as-errors.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 59c393f2a928770c2d397bc93d388543c2d94dab Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Tue, 21 May 2024 23:22:50 +0100
-Subject: [PATCH 1/1] don't treat warnings as errors
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- Makefile | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/Makefile b/Makefile
-index a4390522..d2ec9aa3 100644
---- a/Makefile
-+++ b/Makefile
-@@ -125,7 +125,7 @@ endif
- # Provide default CC and CFLAGS for firmware builds; if you have any -D flags,
- # please add them after this point (e.g., -DVBOOT_DEBUG).
- DEBUG_FLAGS := $(if $(filter-out 0,${DEBUG}),-g -Og,-g -Os)
--WERROR := -Werror
-+WERROR := -Wno-error -w
- FIRMWARE_FLAGS := -nostdinc -ffreestanding -fno-builtin -fno-stack-protector
- COMMON_FLAGS := -pipe ${WERROR} -Wall -Wstrict-prototypes -Wtype-limits \
- 	-Wundef -Wmissing-prototypes -Wno-trigraphs -Wredundant-decls -Wshadow \
-@@ -162,7 +162,7 @@ CFLAGS += -std=gnu11
- # returns: $(1) if compiler was successful, empty string otherwise
- test_ccflag = $(shell \
- 	printf "$(2)\nvoid _start(void) {}\n" | \
--	$(CC) -nostdlib -Werror $(1) -xc -c - -o /dev/null \
-+	$(CC) -nostdlib -Wno-error -w $(1) -xc -c - -o /dev/null \
- 	>/dev/null 2>&1 && echo "$(1)")
- 
- COMMON_FLAGS += $(call test_ccflag,-Wimplicit-fallthrough)
--- 
-2.39.2
-
diff --git a/config/submodule/coreboot/i945/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/i945/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
new file mode 100644
index 00000000..1ac41de6
--- /dev/null
+++ b/config/submodule/coreboot/i945/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
@@ -0,0 +1,178 @@
+From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
+From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
+Date: Thu, 30 May 2024 14:08:33 -0600
+Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
+ vmlinuz_header_{offset,size}
+
+The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
+wrong:
+
+	if (!vmlinuz_header_size ||
+	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+	    kpart_data) {
+		return 1;
+	}
+
+`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
+unless something has overflowed!  And `vmlinuz_header_offset` hasn't even
+been set yet (besides being initialized to zero)!
+
+GCC will deduce that if the check didn't cause the function to bail, then
+vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
+[2GiB,4GiB).
+
+On platforms where size_t is 32-bits, this is *especially* broken.
+memcpy's size argument must be in the range [0,2GiB).  Because GCC has
+proved that vmlinuz_header_size is higher than that, it will fail to
+compile:
+
+	host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
+
+So, fix the check.
+
+I can now say that what I suspect the original author meant to write would
+be the following patch, if `vmlinuz_header_offset` were already set:
+
+	-kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
+	+now        + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
+
+This hypothesis is supported by `now` not getting incremented by
+`kblob_size` the way it is for the keyblock and preamble sizes.
+
+However, we can also see that even this "corrected" bounds check is
+insufficient: it does not detect the vmlinuz_header overflowing into
+kblob_data.
+
+OK, so let's describe the fix:
+
+Have a `*vmlinuz_header` pointer instead of a
+`uint64_t vmlinuz_header_offset`, to be more similar to all the other
+regions.  With this change, the correct check becomes a simple
+
+      vmlinuz_header + vmlinuz_header_size > kblob_data
+
+While we're at it, make some changes that could have helped avoid this in
+the first place:
+
+ - Add comments.
+ - Calculate the vmlinuz_header offset right away, instead of waiting.
+ - Go ahead and increment `now` by `kblob_size`, to increase regularity.
+
+Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
+---
+ host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
+ 1 file changed, 51 insertions(+), 21 deletions(-)
+
+diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
+index 4ccfcf33..d2c09443 100644
+--- a/host/lib/extract_vmlinuz.c
++++ b/host/lib/extract_vmlinuz.c
+@@ -15,16 +15,44 @@
+ 
+ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 		   void **vmlinuz_out, size_t *vmlinuz_size) {
++	// We're going to be extracting `vmlinuz_header` and
++	// `kblob_data`, and returning the concatenation of them.
++	//
++	// kpart_data = +-[kpart_size]------------------------------------+
++	//              |                                                 |
++	//  keyblock  = | +-[keyblock->keyblock_size]-------------------+ |
++	//              | | struct vb2_keyblock          keyblock       | |
++	//              | | char []                      ...data...     | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  preamble  = | +-[preamble->preamble_size]-------------------+ |
++	//              | | struct vb2_kernel_preamble   preamble       | |
++	//              | | char []                       ...data...    | |
++	//              | | char []                      vmlinuz_header | |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  kblob_data= | +-[preamble->body_signature.data_size]--------+ |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//              +-------------------------------------------------+
++
+ 	size_t now = 0;
++	// The 3 sections of kpart_data.
++	struct vb2_keyblock *keyblock = NULL;
+ 	struct vb2_kernel_preamble *preamble = NULL;
+ 	uint8_t *kblob_data = NULL;
+ 	uint32_t kblob_size = 0;
++	// vmlinuz_header
++	uint8_t *vmlinuz_header = NULL;
+ 	uint32_t vmlinuz_header_size = 0;
+-	uint64_t vmlinuz_header_address = 0;
+-	uint64_t vmlinuz_header_offset = 0;
++	// The concatenated result.
+ 	void *vmlinuz = NULL;
+ 
+-	struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
++	// Isolate the 3 sections of kpart_data.
++
++	keyblock = (struct vb2_keyblock *)kpart_data;
+ 	now += keyblock->keyblock_size;
+ 	if (now > kpart_size)
+ 		return 1;
+@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 
+ 	kblob_data = kpart_data + now;
+ 	kblob_size = preamble->body_signature.data_size;
+-
+-	if (!kblob_data || (now + kblob_size) > kpart_size)
++	now += kblob_size;
++	if (now > kpart_size)
+ 		return 1;
+ 
++	// Find `vmlinuz_header` within `preamble`.
++
+ 	if (preamble->header_version_minor > 0) {
+-		vmlinuz_header_address = preamble->vmlinuz_header_address;
++		// calculate the vmlinuz_header offset from
++		// the beginning of the kpart_data.  The kblob doesn't
++		// include the body_load_offset, but does include
++		// the keyblock and preamble sections.
++		size_t vmlinuz_header_offset =
++			preamble->vmlinuz_header_address -
++			preamble->body_load_address +
++			keyblock->keyblock_size +
++			preamble->preamble_size;
++
++		vmlinuz_header = kpart_data + vmlinuz_header_offset;
+ 		vmlinuz_header_size = preamble->vmlinuz_header_size;
+ 	}
+ 
+-	if (!vmlinuz_header_size ||
+-	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+-	    kpart_data) {
++	if (!vmlinuz_header ||
++	    !vmlinuz_header_size ||
++	    vmlinuz_header + vmlinuz_header_size > kblob_data) {
+ 		return 1;
+ 	}
+ 
+-	// calculate the vmlinuz_header offset from
+-	// the beginning of the kpart_data.  The kblob doesn't
+-	// include the body_load_offset, but does include
+-	// the keyblock and preamble sections.
+-	vmlinuz_header_offset = vmlinuz_header_address -
+-		preamble->body_load_address +
+-		keyblock->keyblock_size +
+-		preamble->preamble_size;
++	// Concatenate and return.
+ 
+ 	vmlinuz = malloc(vmlinuz_header_size + kblob_size);
+ 	if (vmlinuz == NULL)
+ 		return 1;
+-
+-	memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
+-	       vmlinuz_header_size);
+-
++	memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
+ 	memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
+ 
+ 	*vmlinuz_out = vmlinuz;
+-- 
+2.45.1
+

From a76dda9330b526b745caabb874574531c7f7dc72 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 31 May 2024 17:26:34 +0100
Subject: [PATCH 0446/1549] vendor.sh: remove unnecessary assignment

dl_fail is set to n and then immediately to y afterward

why?

clearly i was dehydrated

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index f307fcbd..53f8e9c6 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -113,7 +113,6 @@ fetch()
 	[ "${5#/}" = "$5" ] || $err "fetch: absolute path not allowed: '$5'"
 	_dest="${5##*../}"
 	_dl="$vendir/cache/$dlsum"
-	dl_fail="n"
 
 	x_ mkdir -p "${_dl%/*}"
 

From e0b2216f6461a88e9aab54e2c2a0a366f20dfd3d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 1 Jun 2024 10:28:09 +0100
Subject: [PATCH 0447/1549] grub.cfg: don't scan EFI on btrfs subvols

the esp is always a fat32 partition so this makes no sensgrub.cfg: don't scan EFI on btrfs subvols

the esp is always a fat32 partition so this makes no sense

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 52ebe9bc..12f460ce 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -98,7 +98,7 @@ function search_grub {
 
 function try_isolinux_config {
 	set root="${1}"
-	for dir in '' /boot /EFI /boot/EFI /@ /@/boot /@/boot/EFI /@/EFI; do
+	for dir in '' /boot /EFI /boot/EFI /@ /@/boot; do
 		if [ -f "${dir}"/isolinux/isolinux.cfg ]; then
 			syslinux_configfile -i "${dir}"/isolinux/isolinux.cfg
 		elif [ -f "${dir}"/syslinux/syslinux.cfg ]; then

From c742a89dadae7eece86b49132cf8d9929fd5a587 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 1 Jun 2024 16:48:23 +0100
Subject: [PATCH 0448/1549] grub.cfg: remove unnecessary path for isolinux

the path "/boot/EFI" is unnecessary because the ESP
is always a FAT32 partition, so we don't need to
scan it as a subdirectory within a subdirectory.

the ESP is always mounted as its own partition,
FAT32, and EFI/ is always at the root of it

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 12f460ce..5a6abd44 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -98,7 +98,7 @@ function search_grub {
 
 function try_isolinux_config {
 	set root="${1}"
-	for dir in '' /boot /EFI /boot/EFI /@ /@/boot; do
+	for dir in '' /boot /EFI /@ /@/boot; do
 		if [ -f "${dir}"/isolinux/isolinux.cfg ]; then
 			syslinux_configfile -i "${dir}"/isolinux/isolinux.cfg
 		elif [ -f "${dir}"/syslinux/syslinux.cfg ]; then

From 2ea5e61cfd834ed92cfe35a917d12808afa39253 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 1 Jun 2024 16:52:32 +0100
Subject: [PATCH 0449/1549] grub.cfg: don't search for *_grub.cfg

this is a relic from the old days when we didn't
automated the grub.cfg logic as much. these days,
the grub.cfg logic is able to boot almost all distros
without any manual intervention or override.

removing these entries will speed up the boot in general

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 5a6abd44..29313cf5 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -66,12 +66,10 @@ function try_user_config {
 
 	# The @/... entries are for cases where the BTRFS filesystem is being used
 	for dir in boot grub grub2 boot/grub boot/grub2 @/boot @/grub @/grub2 @/boot/grub @/boot/grub2; do
-		for name in '' osboot_ autoboot_ libreboot_ coreboot_; do
-			if [ -f /"${dir}"/"${name}"grub.cfg ]; then
-				unset superusers
-				configfile /"${dir}"/"${name}"grub.cfg
-			fi
-		done
+		if [ -f /"${dir}"/grub.cfg ]; then
+			unset superusers
+			configfile /"${dir}"/grub.cfg
+		fi
 	done
 }
 function search_grub {

From b3d58f1edc24eadd615d5e1130b6e6abd703ac33 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 1 Jun 2024 16:58:59 +0100
Subject: [PATCH 0450/1549] grub.cfg: split up try_user_config

in the next revision, i will add ESP paths

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 29313cf5..acb9da2c 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -61,15 +61,19 @@ if [ -f (cbfsdisk)/keymap.gkb ]; then
 	keymap (cbfsdisk)/keymap.gkb
 fi
 
-function try_user_config {
+function really_try_user_config {
 	set root="${1}"
 
+	if [ -f /"${2}"/grub.cfg ]; then
+		unset superusers
+		configfile /"${2}"/grub.cfg
+	fi
+}
+
+function try_user_config {
 	# The @/... entries are for cases where the BTRFS filesystem is being used
 	for dir in boot grub grub2 boot/grub boot/grub2 @/boot @/grub @/grub2 @/boot/grub @/boot/grub2; do
-		if [ -f /"${dir}"/grub.cfg ]; then
-			unset superusers
-			configfile /"${dir}"/grub.cfg
-		fi
+		really_try_user_config "${1}" "${dir}"
 	done
 }
 function search_grub {

From 42b5b58d36e087fc8e66a0e9d14bf656a8363f54 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 1 Jun 2024 17:01:11 +0100
Subject: [PATCH 0451/1549] grub.cfg: scan grub.cfg from ESP

we already supported syslinux but not grub

support grub by scanning for the most common paths,
based on the most popular distros

we don't hardcode this with * because it slows down
the boot, and in practise many distros still use the
same grub.cfg location as in BIOS systems (the EFI
one is often just a link to the BIOS one)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index acb9da2c..66642711 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -75,6 +75,9 @@ function try_user_config {
 	for dir in boot grub grub2 boot/grub boot/grub2 @/boot @/grub @/grub2 @/boot/grub @/boot/grub2; do
 		really_try_user_config "${1}" "${dir}"
 	done
+	for dir in ubuntu debian redhat; do
+		really_try_user_config "${1}" "EFI/${dir}"
+	done
 }
 function search_grub {
 	echo -n "Attempting to load grub.cfg from '${1}' devices"

From cfc5265f5b3e0c1202606be3bcaece0010dd208d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 1 Jun 2024 17:04:31 +0100
Subject: [PATCH 0452/1549] grub.cfg: search a reduced list of devs/partitions

in practise, the machines we support don't have
the option of including so many disks; 8 seems like
the most reasonable default. additionally, it's
unreasonable to expect *20 partitions*

this hardcoding is done to avoid using *, which is
slow in grub on some machines (the grub kernel always
re-enumerates the devices during every operation,
without caching any of it)

yet, the hardcoding is also slow; balance it a bit
better by searching fewer permutations, but not so few
that it would likely break a lot of setups

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 66642711..5b67d113 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -81,8 +81,8 @@ function try_user_config {
 }
 function search_grub {
 	echo -n "Attempting to load grub.cfg from '${1}' devices"
-	for i in 0 1 2 3 4 5 6 7 8 9 10 11; do
-		for part in 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20; do
+	for i in 0 1 2 3 4 5 6 7 8; do
+		for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
 			if [ "${1}" != "nvme" ]; then
 				try_user_config "(${1}${i},${part})"
 			else
@@ -117,8 +117,8 @@ function try_isolinux_config {
 }
 function search_isolinux {
 	echo "\nAttempting to parse iso/sys/extlinux config from '${1}' devices"
-	for i in 0 1 2 3 4 5 6 7 8 9 10 11; do
-		for part in 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20; do
+	for i in 0 1 2 3 4 5 6 7 8; do
+		for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
 			if [ "${1}" != "nvme" ]; then
 				try_isolinux_config "(${1}${i},${part})"
 			else
@@ -167,8 +167,8 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 
 	unset bootdev
 	for grub_disk in ${grub_scan_disk}; do
-		for i in 0 1 2 3 4 5 6 7 8 9 10 11; do
-			for part in 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20; do
+		for i in 0 1 2 3 4 5 6 7 8; do
+			for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
 				if [ "${grub_disk}" = "ahci" ]; then
 					bootdev="${bootdev} (ahci${i},${part})"
 				elif [ "${grub_disk}" = "ata" ]; then

From 2becc736d38ad0aef798138c544e53f51d79afbc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 1 Jun 2024 17:33:12 +0100
Subject: [PATCH 0453/1549] grub.cfg: scan grub2/ last

it's very unlikely that someone would use this
directory name nowadays, and i had half a mind
to remove it altogether

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 5b67d113..7f99851d 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -72,7 +72,7 @@ function really_try_user_config {
 
 function try_user_config {
 	# The @/... entries are for cases where the BTRFS filesystem is being used
-	for dir in boot grub grub2 boot/grub boot/grub2 @/boot @/grub @/grub2 @/boot/grub @/boot/grub2; do
+	for dir in boot grub boot/grub @/boot @/grub @/boot/grub grub2 boot/grub2 @/grub2 @/boot/grub2; do
 		really_try_user_config "${1}" "${dir}"
 	done
 	for dir in ubuntu debian redhat; do

From 6d59f1d0be9e998689dbc74cba914999ab62b69c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 1 Jun 2024 17:34:45 +0100
Subject: [PATCH 0454/1549] grub.cfg: scan /boot/grub.cfg last

very unlikely to exist. in fact, should i remove it?

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/config/grub.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/grub/config/grub.cfg b/config/grub/config/grub.cfg
index 7f99851d..7adee869 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/config/grub.cfg
@@ -72,7 +72,7 @@ function really_try_user_config {
 
 function try_user_config {
 	# The @/... entries are for cases where the BTRFS filesystem is being used
-	for dir in boot grub boot/grub @/boot @/grub @/boot/grub grub2 boot/grub2 @/grub2 @/boot/grub2; do
+	for dir in grub boot/grub @/grub @/boot/grub grub2 boot/grub2 @/grub2 @/boot/grub2 boot @/boot; do
 		really_try_user_config "${1}" "${dir}"
 	done
 	for dir in ubuntu debian redhat; do

From 9daf7f05f14c74189daa820eae0127641c4d11d4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 1 Jun 2024 22:53:23 +0100
Subject: [PATCH 0455/1549] u-boot on qemu: remove currently unused x86 target

it doesn't build, at present, but isn't used by any
coreboot targets, so the build issue does not come up
during release builds, but i did find it laying around
during my audits.

x86 qemu is on todo for libreboot, on all x86 boards,
but the current config is broken, so: remove it.

it's very much a requirement that anything in lbmk should
work.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/u-boot/qemu_x86_12mb/config/default | 1712 --------------------
 config/u-boot/qemu_x86_12mb/target.cfg     |    3 -
 2 files changed, 1715 deletions(-)
 delete mode 100644 config/u-boot/qemu_x86_12mb/config/default
 delete mode 100644 config/u-boot/qemu_x86_12mb/target.cfg

diff --git a/config/u-boot/qemu_x86_12mb/config/default b/config/u-boot/qemu_x86_12mb/config/default
deleted file mode 100644
index bd4ddebb..00000000
--- a/config/u-boot/qemu_x86_12mb/config/default
+++ /dev/null
@@ -1,1712 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# U-Boot 2023.10 Configuration
-#
-
-#
-# Compiler: gcc (Debian 13.2.0-5) 13.2.0
-#
-CONFIG_CREATE_ARCH_SYMLINK=y
-CONFIG_SYS_CACHE_SHIFT_6=y
-CONFIG_SYS_CACHELINE_SIZE=64
-CONFIG_LINKER_LIST_ALIGN=8
-# CONFIG_ARC is not set
-# CONFIG_ARM is not set
-# CONFIG_M68K is not set
-# CONFIG_MICROBLAZE is not set
-# CONFIG_MIPS is not set
-# CONFIG_NIOS2 is not set
-# CONFIG_PPC is not set
-# CONFIG_RISCV is not set
-# CONFIG_SANDBOX is not set
-# CONFIG_SH is not set
-CONFIG_X86=y
-# CONFIG_XTENSA is not set
-CONFIG_SYS_ARCH="x86"
-CONFIG_SYS_SOC="coreboot"
-CONFIG_SYS_VENDOR="coreboot"
-CONFIG_SYS_BOARD="coreboot"
-CONFIG_SYS_CONFIG_NAME="coreboot"
-CONFIG_TEXT_BASE=0x1110000
-CONFIG_SYS_MALLOC_LEN=0x2000000
-CONFIG_SYS_MALLOC_F_LEN=0x800
-CONFIG_NR_DRAM_BANKS=8
-CONFIG_ENV_SOURCE_FILE=""
-CONFIG_ENV_SIZE=0x1000
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="coreboot"
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-# CONFIG_OF_LIBFDT_OVERLAY is not set
-CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
-# CONFIG_DM_RESET is not set
-CONFIG_SYS_MONITOR_LEN=1048576
-CONFIG_ERR_PTR_OFFSET=0x0
-# CONFIG_SPL is not set
-CONFIG_PRE_CON_BUF_ADDR=0x100000
-CONFIG_PRE_CON_BUF_SZ=4096
-CONFIG_BOOTSTAGE_STASH_ADDR=0
-CONFIG_IDENT_STRING=""
-CONFIG_SYS_CLK_FREQ=0
-CONFIG_SYS_MEM_TOP_HIDE=0x0
-CONFIG_SYS_LOAD_ADDR=0x02000000
-CONFIG_BUILD_TARGET=""
-# CONFIG_SYS_PCI_64BIT is not set
-CONFIG_PCI=y
-CONFIG_FWU_NUM_BANKS=2
-CONFIG_FWU_NUM_IMAGES_PER_BANK=2
-
-#
-# x86 architecture
-#
-CONFIG_X86_RUN_32BIT=y
-# CONFIG_X86_RUN_64BIT is not set
-# CONFIG_VENDOR_ADVANTECH is not set
-# CONFIG_VENDOR_CONGATEC is not set
-CONFIG_VENDOR_COREBOOT=y
-# CONFIG_VENDOR_DFI is not set
-# CONFIG_VENDOR_EFI is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_INTEL_MID is not set
-CONFIG_PCIE_ECAM_BASE=0xe0000000
-CONFIG_TARGET_COREBOOT=y
-CONFIG_SYS_CAR_ADDR=0x01920000
-CONFIG_SYS_CAR_SIZE=0x4000
-CONFIG_ROM_TABLE_ADDR=0xf0000
-CONFIG_ROM_TABLE_SIZE=0x10000
-CONFIG_CPU_ADDR_BITS=36
-# CONFIG_DEBUG_UART is not set
-CONFIG_SYS_COREBOOT=y
-CONFIG_X86_TSC_TIMER_FREQ=1000000000
-CONFIG_AHCI=y
-CONFIG_RAMBASE=0x100000
-CONFIG_HPET_ADDRESS=0xfed00000
-# CONFIG_X86_LOAD_FROM_32_BIT is not set
-# CONFIG_HAVE_INTEL_ME is not set
-# CONFIG_X86_RAMTEST is not set
-# CONFIG_USE_HOB is not set
-# CONFIG_HAVE_FSP is not set
-CONFIG_USE_CAR=y
-# CONFIG_HAVE_MRC is not set
-# CONFIG_HAVE_REFCODE is not set
-CONFIG_HAVE_MICROCODE=y
-# CONFIG_SMP is not set
-# CONFIG_HAVE_VGA_BIOS is not set
-# CONFIG_HAVE_ITSS is not set
-# CONFIG_HAVE_ACPI_RESUME is not set
-CONFIG_MAX_PIRQ_LINKS=8
-CONFIG_IRQ_SLOT_COUNT=128
-CONFIG_PCIE_ECAM_SIZE=0x10000000
-CONFIG_I8259_PIC=y
-CONFIG_APIC=y
-CONFIG_I8254_TIMER=y
-# CONFIG_SEABIOS is not set
-# CONFIG_INTEL_CAR_CQOS is not set
-CONFIG_X86_OFFSET_U_BOOT=0x1110000
-# CONFIG_ACPI_GPE is not set
-CONFIG_SA_PCIEX_LENGTH=0x10000000
-CONFIG_COREBOOT_SYSINFO=y
-# CONFIG_OF_BOARD_FIXUP is not set
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=130200
-CONFIG_CLANG_VERSION=0
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-# CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
-# CONFIG_CC_OPTIMIZE_FOR_DEBUG is not set
-# CONFIG_OPTIMIZE_INLINING is not set
-CONFIG_CC_HAS_ASM_INLINE=y
-# CONFIG_ENV_VARS_UBOOT_CONFIG is not set
-# CONFIG_SYS_BOOT_GET_CMDLINE is not set
-# CONFIG_SYS_BOOT_GET_KBD is not set
-CONFIG_SYS_MALLOC_F=y
-# CONFIG_VALGRIND is not set
-CONFIG_EXPERT=y
-CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y
-# CONFIG_SYS_MALLOC_DEFAULT_TO_INIT is not set
-# CONFIG_TOOLS_DEBUG is not set
-# CONFIG_PHYS_64BIT is not set
-# CONFIG_FDT_64BIT is not set
-# CONFIG_REMAKE_ELF is not set
-# CONFIG_HAS_BOARD_SIZE_LIMIT is not set
-# CONFIG_SYS_CUSTOM_LDSCRIPT is not set
-CONFIG_PLATFORM_ELFENTRY="_start"
-CONFIG_STACK_SIZE=0x1000000
-CONFIG_SYS_SRAM_BASE=0x0
-CONFIG_SYS_SRAM_SIZE=0x0
-# CONFIG_MP is not set
-# CONFIG_API is not set
-
-#
-# Boot options
-#
-
-#
-# Boot images
-#
-# CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_FIT=y
-CONFIG_TIMESTAMP=y
-CONFIG_FIT_EXTERNAL_OFFSET=0x0
-CONFIG_FIT_FULL_CHECK=y
-CONFIG_FIT_SIGNATURE=y
-CONFIG_FIT_SIGNATURE_MAX_SIZE=0x10000000
-# CONFIG_FIT_RSASSA_PSS is not set
-# CONFIG_FIT_CIPHER is not set
-# CONFIG_FIT_VERBOSE is not set
-# CONFIG_FIT_BEST_MATCH is not set
-CONFIG_FIT_PRINT=y
-# CONFIG_SPL_LOAD_FIT_FULL is not set
-CONFIG_PXE_UTILS=y
-CONFIG_BOOTSTD=y
-CONFIG_BOOTSTD_FULL=y
-# CONFIG_BOOTSTD_DEFAULTS is not set
-CONFIG_BOOTSTD_BOOTCOMMAND=y
-CONFIG_BOOTMETH_GLOBAL=y
-CONFIG_BOOTMETH_CROS=y
-CONFIG_BOOTMETH_EXTLINUX=y
-CONFIG_BOOTMETH_EFILOADER=y
-CONFIG_BOOTMETH_VBE=y
-CONFIG_BOOTMETH_VBE_REQUEST=y
-CONFIG_BOOTMETH_VBE_SIMPLE=y
-CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
-CONFIG_EXPO=y
-CONFIG_BOOTMETH_SCRIPT=y
-# CONFIG_LEGACY_IMAGE_FORMAT is not set
-# CONFIG_SUPPORT_RAW_INITRD is not set
-# CONFIG_OF_BOARD_SETUP is not set
-# CONFIG_OF_SYSTEM_SETUP is not set
-# CONFIG_OF_STDOUT_VIA_ALIAS is not set
-CONFIG_HAVE_TEXT_BASE=y
-CONFIG_HAVE_SYS_MONITOR_BASE=y
-CONFIG_SYS_MONITOR_BASE=0x01110000
-# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
-CONFIG_ARCH_FIXUP_FDT_MEMORY=y
-# CONFIG_CHROMEOS is not set
-# CONFIG_CHROMEOS_VBOOT is not set
-# CONFIG_RAMBOOT_PBL is not set
-CONFIG_SYS_BOOT_RAMDISK_HIGH=y
-# CONFIG_DISTRO_DEFAULTS is not set
-
-#
-# Boot timing
-#
-# CONFIG_BOOTSTAGE is not set
-CONFIG_BOOTSTAGE_STASH_SIZE=0x1000
-CONFIG_SHOW_BOOT_PROGRESS=y
-
-#
-# Boot media
-#
-# CONFIG_NAND_BOOT is not set
-# CONFIG_ONENAND_BOOT is not set
-# CONFIG_QSPI_BOOT is not set
-# CONFIG_SATA_BOOT is not set
-# CONFIG_SD_BOOT is not set
-# CONFIG_SD_BOOT_QSPI is not set
-# CONFIG_SPI_BOOT is not set
-
-#
-# Autoboot options
-#
-CONFIG_AUTOBOOT=y
-CONFIG_BOOTDELAY=2
-# CONFIG_AUTOBOOT_KEYED is not set
-# CONFIG_AUTOBOOT_USE_MENUKEY is not set
-# CONFIG_BOOT_RETRY is not set
-
-#
-# Image support
-#
-# CONFIG_IMAGE_PRE_LOAD is not set
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
-# CONFIG_BOOTARGS_SUBST is not set
-# CONFIG_USE_BOOTCOMMAND is not set
-# CONFIG_USE_PREBOOT is not set
-CONFIG_DEFAULT_FDT_FILE=""
-
-#
-# Configuration editor
-#
-# CONFIG_CEDIT is not set
-
-#
-# Console
-#
-CONFIG_MENU=y
-# CONFIG_CONSOLE_RECORD is not set
-# CONFIG_DISABLE_CONSOLE is not set
-CONFIG_LOGLEVEL=4
-# CONFIG_SILENT_CONSOLE is not set
-# CONFIG_SPL_SILENT_CONSOLE is not set
-# CONFIG_TPL_SILENT_CONSOLE is not set
-CONFIG_PRE_CONSOLE_BUFFER=y
-CONFIG_CONSOLE_FLUSH_SUPPORT=y
-CONFIG_CONSOLE_MUX=y
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
-# CONFIG_SYS_CONSOLE_ENV_OVERWRITE is not set
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_SYS_STDIO_DEREGISTER=y
-# CONFIG_SPL_SYS_STDIO_DEREGISTER is not set
-CONFIG_SYS_DEVICE_NULLDEV=y
-
-#
-# Logging
-#
-CONFIG_LOG=y
-CONFIG_LOG_MAX_LEVEL=6
-CONFIG_LOG_DEFAULT_LEVEL=6
-CONFIG_LOG_CONSOLE=y
-# CONFIG_LOGF_FILE is not set
-CONFIG_LOGF_LINE=y
-CONFIG_LOGF_FUNC=y
-CONFIG_LOGF_FUNC_PAD=20
-# CONFIG_LOG_SYSLOG is not set
-# CONFIG_LOG_ERROR_RETURN is not set
-
-#
-# Init options
-#
-# CONFIG_BOARD_TYPES is not set
-CONFIG_DISPLAY_CPUINFO=y
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_DISPLAY_BOARDINFO_LATE=y
-
-#
-# Start-up hooks
-#
-# CONFIG_CYCLIC is not set
-CONFIG_EVENT=y
-CONFIG_EVENT_DYNAMIC=y
-# CONFIG_EVENT_DEBUG is not set
-# CONFIG_ARCH_MISC_INIT is not set
-# CONFIG_BOARD_EARLY_INIT_F is not set
-CONFIG_BOARD_EARLY_INIT_R=y
-# CONFIG_BOARD_POSTCLK_INIT is not set
-# CONFIG_BOARD_LATE_INIT is not set
-# CONFIG_HWCONFIG is not set
-CONFIG_LAST_STAGE_INIT=y
-# CONFIG_MISC_INIT_R is not set
-# CONFIG_SYS_MALLOC_BOOTPARAMS is not set
-# CONFIG_ID_EEPROM is not set
-CONFIG_PCI_INIT_R=y
-# CONFIG_RESET_PHY_R is not set
-
-#
-# Security support
-#
-CONFIG_HASH=y
-# CONFIG_STACKPROTECTOR is not set
-# CONFIG_BOARD_RNG_SEED is not set
-
-#
-# Update support
-#
-# CONFIG_UPDATE_TFTP is not set
-# CONFIG_ANDROID_AB is not set
-
-#
-# Blob list
-#
-# CONFIG_BLOBLIST is not set
-CONFIG_SUPPORT_SPL=y
-CONFIG_SUPPORT_TPL=y
-# CONFIG_TPL is not set
-# CONFIG_VPL is not set
-CONFIG_IMAGE_SIGN_INFO=y
-# CONFIG_FDT_SIMPLEFB is not set
-# CONFIG_BMP is not set
-
-#
-# Command line interface
-#
-CONFIG_CMDLINE=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMDLINE_EDITING=y
-# CONFIG_CMDLINE_PS_SUPPORT is not set
-CONFIG_AUTO_COMPLETE=y
-CONFIG_SYS_LONGHELP=y
-CONFIG_SYS_PROMPT="=> "
-CONFIG_SYS_PROMPT_HUSH_PS2="> "
-CONFIG_SYS_MAXARGS=16
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=1044
-CONFIG_SYS_XTRACE=y
-
-#
-# Commands
-#
-
-#
-# Info commands
-#
-CONFIG_CMD_ACPI=y
-CONFIG_CMD_BDI=y
-CONFIG_CMD_BDINFO_EXTRA=y
-# CONFIG_CMD_CONFIG is not set
-CONFIG_CMD_CONSOLE=y
-# CONFIG_CMD_LICENSE is not set
-# CONFIG_CMD_PMC is not set
-
-#
-# Boot commands
-#
-CONFIG_CMD_BOOTD=y
-CONFIG_CMD_BOOTM=y
-CONFIG_CMD_BOOTDEV=y
-CONFIG_CMD_BOOTFLOW=y
-CONFIG_CMD_BOOTFLOW_FULL=y
-CONFIG_CMD_BOOTMETH=y
-CONFIG_BOOTM_EFI=y
-# CONFIG_CMD_BOOTZ is not set
-CONFIG_BOOTM_LINUX=y
-CONFIG_BOOTM_NETBSD=y
-# CONFIG_BOOTM_OPENRTOS is not set
-# CONFIG_BOOTM_OSE is not set
-CONFIG_BOOTM_PLAN9=y
-CONFIG_BOOTM_RTEMS=y
-CONFIG_CMD_VBE=y
-CONFIG_BOOTM_VXWORKS=y
-CONFIG_SYS_BOOTM_LEN=0x1000000
-CONFIG_CMD_BOOTEFI=y
-CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
-# CONFIG_CMD_BOOTEFI_HELLO is not set
-# CONFIG_CMD_BOOTEFI_SELFTEST is not set
-# CONFIG_CMD_BOOTMENU is not set
-# CONFIG_CMD_ADTIMG is not set
-CONFIG_CMD_ELF=y
-CONFIG_CMD_FDT=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_RUN=y
-CONFIG_CMD_IMI=y
-# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_XIMG=y
-# CONFIG_CMD_XXD is not set
-# CONFIG_CMD_THOR_DOWNLOAD is not set
-CONFIG_CMD_ZBOOT=y
-
-#
-# Environment commands
-#
-# CONFIG_CMD_ASKENV is not set
-CONFIG_CMD_EXPORTENV=y
-CONFIG_CMD_IMPORTENV=y
-CONFIG_CMD_EDITENV=y
-# CONFIG_CMD_GREPENV is not set
-CONFIG_CMD_SAVEENV=y
-# CONFIG_CMD_ERASEENV is not set
-CONFIG_CMD_ENV_EXISTS=y
-# CONFIG_CMD_ENV_CALLBACK is not set
-# CONFIG_CMD_ENV_FLAGS is not set
-# CONFIG_CMD_NVEDIT_EFI is not set
-# CONFIG_CMD_NVEDIT_INDIRECT is not set
-# CONFIG_CMD_NVEDIT_INFO is not set
-# CONFIG_CMD_NVEDIT_LOAD is not set
-# CONFIG_CMD_NVEDIT_SELECT is not set
-
-#
-# Memory commands
-#
-# CONFIG_CMD_BINOP is not set
-# CONFIG_CMD_BLOBLIST is not set
-CONFIG_CMD_CRC32=y
-# CONFIG_CRC32_VERIFY is not set
-# CONFIG_CMD_EEPROM is not set
-# CONFIG_LOOPW is not set
-# CONFIG_CMD_MD5SUM is not set
-# CONFIG_CMD_MEMINFO is not set
-CONFIG_CMD_MEMORY=y
-# CONFIG_CMD_MEM_SEARCH is not set
-# CONFIG_CMD_MX_CYCLIC is not set
-CONFIG_CMD_RANDOM=y
-# CONFIG_CMD_MEMTEST is not set
-# CONFIG_CMD_SHA1SUM is not set
-# CONFIG_CMD_STRINGS is not set
-
-#
-# Compression commands
-#
-# CONFIG_CMD_LZMADEC is not set
-# CONFIG_CMD_UNLZ4 is not set
-# CONFIG_CMD_UNZIP is not set
-# CONFIG_CMD_ZIP is not set
-
-#
-# Device access commands
-#
-# CONFIG_CMD_ARMFLASH is not set
-# CONFIG_CMD_BCB is not set
-# CONFIG_CMD_BIND is not set
-# CONFIG_CMD_CLK is not set
-# CONFIG_CMD_DEMO is not set
-# CONFIG_CMD_DFU is not set
-CONFIG_CMD_DM=y
-# CONFIG_CMD_FPGAD is not set
-# CONFIG_CMD_FUSE is not set
-# CONFIG_CMD_GPIO is not set
-# CONFIG_CMD_GPT is not set
-# CONFIG_RANDOM_UUID is not set
-# CONFIG_CMD_IDE is not set
-CONFIG_CMD_IO=y
-# CONFIG_CMD_IOTRACE is not set
-# CONFIG_CMD_I2C is not set
-CONFIG_CMD_LOADB=y
-# CONFIG_CMD_LOADM is not set
-CONFIG_CMD_LOADS=y
-# CONFIG_LOADS_ECHO is not set
-# CONFIG_CMD_SAVES is not set
-# CONFIG_SYS_LOADS_BAUD_CHANGE is not set
-CONFIG_CMD_LOADXY_TIMEOUT=90
-# CONFIG_CMD_LSBLK is not set
-# CONFIG_CMD_MBR is not set
-CONFIG_CMD_MMC=y
-# CONFIG_CMD_BKOPS_ENABLE is not set
-# CONFIG_CMD_MMC_SWRITE is not set
-# CONFIG_CMD_CLONE is not set
-CONFIG_CMD_NVME=y
-# CONFIG_CMD_OSD is not set
-CONFIG_CMD_PART=y
-CONFIG_CMD_PCI=y
-# CONFIG_CMD_PCI_MPS is not set
-# CONFIG_CMD_POWEROFF is not set
-# CONFIG_CMD_READ is not set
-# CONFIG_CMD_SATA is not set
-CONFIG_CMD_SCSI=y
-# CONFIG_CMD_SDRAM is not set
-# CONFIG_CMD_TSI148 is not set
-# CONFIG_CMD_UNIVERSE is not set
-CONFIG_CMD_USB=y
-# CONFIG_CMD_USB_SDP is not set
-# CONFIG_CMD_WRITE is not set
-
-#
-# Shell scripting commands
-#
-# CONFIG_CMD_CAT is not set
-CONFIG_CMD_ECHO=y
-CONFIG_CMD_ITEST=y
-CONFIG_CMD_SOURCE=y
-# CONFIG_CMD_SETEXPR is not set
-
-#
-# Android support commands
-#
-CONFIG_CMD_NET=y
-CONFIG_CMD_BOOTP=y
-CONFIG_CMD_DHCP=y
-# CONFIG_BOOTP_MAY_FAIL is not set
-CONFIG_BOOTP_BOOTPATH=y
-# CONFIG_BOOTP_VENDOREX is not set
-CONFIG_BOOTP_BOOTFILESIZE=y
-CONFIG_BOOTP_DNS=y
-# CONFIG_BOOTP_DNS2 is not set
-CONFIG_BOOTP_GATEWAY=y
-CONFIG_BOOTP_HOSTNAME=y
-# CONFIG_BOOTP_PREFER_SERVERIP is not set
-CONFIG_BOOTP_SUBNETMASK=y
-# CONFIG_BOOTP_NISDOMAIN is not set
-# CONFIG_BOOTP_NTPSERVER is not set
-# CONFIG_CMD_PCAP is not set
-CONFIG_BOOTP_VCI_STRING="U-Boot"
-CONFIG_CMD_TFTPBOOT=y
-# CONFIG_CMD_TFTPPUT is not set
-# CONFIG_CMD_TFTPSRV is not set
-CONFIG_NET_TFTP_VARS=y
-# CONFIG_CMD_RARP is not set
-# CONFIG_CMD_NFS is not set
-# CONFIG_SYS_DISABLE_AUTOLOAD is not set
-# CONFIG_CMD_WGET is not set
-# CONFIG_CMD_MII is not set
-# CONFIG_CMD_MDIO is not set
-CONFIG_CMD_PING=y
-# CONFIG_CMD_CDP is not set
-# CONFIG_CMD_SNTP is not set
-# CONFIG_CMD_DNS is not set
-# CONFIG_CMD_LINK_LOCAL is not set
-# CONFIG_CMD_ETHSW is not set
-# CONFIG_CMD_PXE is not set
-# CONFIG_CMD_WOL is not set
-
-#
-# Misc commands
-#
-# CONFIG_CMD_2048 is not set
-# CONFIG_CMD_BMP is not set
-# CONFIG_CMD_BSP is not set
-CONFIG_CMD_BLOCK_CACHE=y
-# CONFIG_CMD_CACHE is not set
-# CONFIG_CMD_CONITRACE is not set
-CONFIG_CMD_CLS=y
-# CONFIG_CMD_EFIDEBUG is not set
-CONFIG_CMD_EFICONFIG=y
-# CONFIG_CMD_EXCEPTION is not set
-# CONFIG_CMD_INI is not set
-CONFIG_CMD_DATE=y
-# CONFIG_CMD_RTC is not set
-CONFIG_CMD_TIME=y
-CONFIG_CMD_GETTIME=y
-# CONFIG_CMD_PAUSE is not set
-CONFIG_CMD_SLEEP=y
-# CONFIG_CMD_TIMER is not set
-CONFIG_CMD_SOUND=y
-# CONFIG_CMD_SYSBOOT is not set
-# CONFIG_CMD_QFW is not set
-# CONFIG_CMD_PSTORE is not set
-# CONFIG_CMD_TERMINAL is not set
-# CONFIG_CMD_UUID is not set
-CONFIG_CMD_VIDCONSOLE=y
-# CONFIG_CMD_SELECT_FONT is not set
-
-#
-# TI specific command line interface
-#
-# CONFIG_CMD_DDR3 is not set
-
-#
-# Power commands
-#
-
-#
-# Security commands
-#
-# CONFIG_CMD_AES is not set
-# CONFIG_CMD_BLOB is not set
-# CONFIG_CMD_HASH is not set
-
-#
-# Firmware commands
-#
-
-#
-# Filesystem commands
-#
-# CONFIG_CMD_BTRFS is not set
-CONFIG_CMD_CBFS=y
-# CONFIG_CMD_EROFS is not set
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-# CONFIG_CMD_SQUASHFS is not set
-CONFIG_CMD_FS_GENERIC=y
-# CONFIG_CMD_FS_UUID is not set
-# CONFIG_CMD_JFFS2 is not set
-# CONFIG_CMD_REISER is not set
-# CONFIG_CMD_ZFS is not set
-
-#
-# Debug commands
-#
-CONFIG_CMD_CBSYSINFO=y
-# CONFIG_CMD_DIAG is not set
-# CONFIG_CMD_EVENT is not set
-CONFIG_CMD_IRQ=y
-# CONFIG_CMD_LOG is not set
-# CONFIG_CMD_UBI is not set
-# CONFIG_MMC_SPEED_MODE_SET is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITIONS=y
-CONFIG_MAC_PARTITION=y
-CONFIG_DOS_PARTITION=y
-CONFIG_ISO_PARTITION=y
-# CONFIG_AMIGA_PARTITION is not set
-CONFIG_EFI_PARTITION=y
-CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=128
-CONFIG_EFI_PARTITION_ENTRIES_OFF=0
-CONFIG_PARTITION_UUIDS=y
-# CONFIG_PARTITION_TYPE_GUID is not set
-CONFIG_SUPPORT_OF_CONTROL=y
-
-#
-# Device Tree Control
-#
-CONFIG_OF_CONTROL=y
-CONFIG_OF_REAL=y
-# CONFIG_OF_LIVE is not set
-# CONFIG_OF_SEPARATE is not set
-CONFIG_OF_EMBED=y
-# CONFIG_OF_BOARD is not set
-# CONFIG_OF_OMIT_DTB is not set
-CONFIG_DEVICE_TREE_INCLUDES=""
-CONFIG_OF_LIST="coreboot"
-# CONFIG_MULTI_DTB_FIT is not set
-CONFIG_OF_TAG_MIGRATE=y
-# CONFIG_OF_DTB_PROPS_REMOVE is not set
-
-#
-# Environment
-#
-CONFIG_ENV_SUPPORT=y
-CONFIG_SAVEENV=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_MIN_ENTRIES=64
-CONFIG_ENV_MAX_ENTRIES=512
-CONFIG_ENV_IS_DEFAULT=y
-CONFIG_ENV_IS_NOWHERE=y
-# CONFIG_ENV_IS_IN_EEPROM is not set
-# CONFIG_ENV_IS_IN_FAT is not set
-# CONFIG_ENV_IS_IN_EXT4 is not set
-# CONFIG_ENV_IS_IN_FLASH is not set
-# CONFIG_ENV_IS_IN_MMC is not set
-# CONFIG_ENV_IS_IN_NAND is not set
-# CONFIG_ENV_IS_IN_NVRAM is not set
-# CONFIG_ENV_IS_IN_ONENAND is not set
-# CONFIG_ENV_IS_IN_REMOTE is not set
-# CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-# CONFIG_USE_DEFAULT_ENV_FILE is not set
-# CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set
-# CONFIG_ENV_IMPORT_FDT is not set
-# CONFIG_ENV_APPEND is not set
-# CONFIG_ENV_WRITEABLE_LIST is not set
-# CONFIG_ENV_ACCESS_IGNORE_FORCE is not set
-CONFIG_USE_BOOTFILE=y
-CONFIG_BOOTFILE="bzImage"
-# CONFIG_USE_ETHPRIME is not set
-CONFIG_USE_HOSTNAME=y
-CONFIG_HOSTNAME="x86"
-# CONFIG_VERSION_VARIABLE is not set
-CONFIG_NET=y
-CONFIG_ARP_TIMEOUT=5000
-CONFIG_NET_RETRY_COUNT=5
-# CONFIG_PROT_UDP is not set
-CONFIG_BOOTDEV_ETH=y
-# CONFIG_BOOTP_SEND_HOSTNAME is not set
-# CONFIG_NET_RANDOM_ETHADDR is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_IP_DEFRAG is not set
-# CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set
-CONFIG_TFTP_BLOCKSIZE=1468
-# CONFIG_TFTP_PORT is not set
-CONFIG_TFTP_WINDOWSIZE=1
-CONFIG_TFTP_TSIZE=y
-# CONFIG_SERVERIP_FROM_PROXYDHCP is not set
-CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS=100
-# CONFIG_KEEP_SERVERADDR is not set
-# CONFIG_UDP_CHECKSUM is not set
-# CONFIG_BOOTP_SERVERIP is not set
-CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64
-# CONFIG_USE_GATEWAYIP is not set
-# CONFIG_USE_IPADDR is not set
-# CONFIG_USE_NETMASK is not set
-CONFIG_USE_ROOTPATH=y
-CONFIG_ROOTPATH="/opt/nfsroot"
-# CONFIG_USE_SERVERIP is not set
-# CONFIG_PROT_TCP is not set
-# CONFIG_IPV6 is not set
-CONFIG_SYS_RX_ETH_BUFFER=4
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_DM=y
-CONFIG_DM_WARN=y
-# CONFIG_DM_DEBUG is not set
-# CONFIG_DM_STATS is not set
-CONFIG_DM_DEVICE_REMOVE=y
-CONFIG_DM_EVENT=y
-CONFIG_DM_STDIO=y
-CONFIG_DM_SEQ_ALIAS=y
-# CONFIG_DM_DMA is not set
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-# CONFIG_DEVRES is not set
-CONFIG_SIMPLE_BUS=y
-# CONFIG_SIMPLE_BUS_CORRECT_RANGE is not set
-CONFIG_OF_TRANSLATE=y
-# CONFIG_TRANSLATION_OFFSET is not set
-CONFIG_DM_DEV_READ_INLINE=y
-# CONFIG_OFNODE_MULTI_TREE is not set
-# CONFIG_ACPIGEN is not set
-# CONFIG_BOUNCE_BUFFER is not set
-# CONFIG_ADC is not set
-# CONFIG_ADC_EXYNOS is not set
-# CONFIG_ADC_SANDBOX is not set
-# CONFIG_SARADC_MESON is not set
-# CONFIG_SARADC_ROCKCHIP is not set
-# CONFIG_ADC_IMX93 is not set
-# CONFIG_SATA is not set
-CONFIG_LIBATA=y
-CONFIG_SCSI_AHCI=y
-
-#
-# SATA/SCSI device support
-#
-CONFIG_AHCI_PCI=y
-# CONFIG_DWC_AHCI is not set
-# CONFIG_DWC_AHSATA is not set
-# CONFIG_MTK_AHCI is not set
-# CONFIG_SUNXI_AHCI is not set
-# CONFIG_AXI is not set
-
-#
-# Bus devices
-#
-CONFIG_BLK=y
-CONFIG_BLOCK_CACHE=y
-# CONFIG_BLKMAP is not set
-# CONFIG_EFI_MEDIA is not set
-# CONFIG_IDE is not set
-# CONFIG_LBA48 is not set
-# CONFIG_SYS_64BIT_LBA is not set
-# CONFIG_BOOTCOUNT_LIMIT is not set
-
-#
-# Button Support
-#
-# CONFIG_BUTTON is not set
-
-#
-# Cache Controller drivers
-#
-# CONFIG_CACHE is not set
-# CONFIG_V5L2_CACHE is not set
-# CONFIG_NCORE_CACHE is not set
-# CONFIG_SIFIVE_CCACHE is not set
-
-#
-# Clock
-#
-# CONFIG_CLK is not set
-# CONFIG_CLK_CCF is not set
-# CONFIG_CLK_RCAR is not set
-# CONFIG_CLK_RCAR_CPG_LIB is not set
-# CONFIG_CPU is not set
-
-#
-# Hardware crypto devices
-#
-# CONFIG_DM_HASH is not set
-# CONFIG_FSL_CAAM is not set
-# CONFIG_SYS_FSL_SEC_BE is not set
-# CONFIG_SYS_FSL_SEC_LE is not set
-# CONFIG_NPCM_AES is not set
-# CONFIG_NPCM_SHA is not set
-# CONFIG_DDR_SPD is not set
-# CONFIG_IMX_SNPS_DDR_PHY is not set
-
-#
-# Demo for driver model
-#
-# CONFIG_DM_DEMO is not set
-
-#
-# DFU support
-#
-
-#
-# DMA Support
-#
-# CONFIG_DMA is not set
-# CONFIG_DMA_LPC32XX is not set
-# CONFIG_TI_EDMA3 is not set
-# CONFIG_DMA_LEGACY is not set
-
-#
-# Extcon Support
-#
-# CONFIG_EXTCON is not set
-
-#
-# Fastboot support
-#
-# CONFIG_UDP_FUNCTION_FASTBOOT is not set
-# CONFIG_TCP_FUNCTION_FASTBOOT is not set
-# CONFIG_FIRMWARE is not set
-# CONFIG_ZYNQMP_FIRMWARE is not set
-# CONFIG_DM_FUZZING_ENGINE is not set
-
-#
-# FPGA support
-#
-# CONFIG_FPGA_ALTERA is not set
-# CONFIG_FPGA_SOCFPGA is not set
-# CONFIG_FPGA_LATTICE is not set
-# CONFIG_FPGA_XILINX is not set
-# CONFIG_DM_FPGA is not set
-# CONFIG_FWU_MDATA is not set
-CONFIG_GPIO=y
-# CONFIG_GPIO_HOG is not set
-# CONFIG_DM_GPIO_LOOKUP_LABEL is not set
-# CONFIG_ALTERA_PIO is not set
-# CONFIG_BCM2835_GPIO is not set
-# CONFIG_DWAPB_GPIO is not set
-# CONFIG_AT91_GPIO is not set
-# CONFIG_ATMEL_PIO4 is not set
-# CONFIG_ASPEED_GPIO is not set
-# CONFIG_DA8XX_GPIO is not set
-# CONFIG_HIKEY_GPIO is not set
-# CONFIG_INTEL_BROADWELL_GPIO is not set
-# CONFIG_INTEL_GPIO is not set
-# CONFIG_INTEL_ICH6_GPIO is not set
-# CONFIG_IMX_RGPIO2P is not set
-# CONFIG_IPROC_GPIO is not set
-# CONFIG_HSDK_CREG_GPIO is not set
-# CONFIG_KIRKWOOD_GPIO is not set
-# CONFIG_LPC32XX_GPIO is not set
-# CONFIG_MCP230XX_GPIO is not set
-# CONFIG_MSM_GPIO is not set
-# CONFIG_MXC_GPIO is not set
-# CONFIG_MXS_GPIO is not set
-# CONFIG_NPCM_GPIO is not set
-# CONFIG_CMD_PCA953X is not set
-# CONFIG_ROCKCHIP_GPIO is not set
-# CONFIG_XILINX_GPIO is not set
-# CONFIG_TCA642X is not set
-# CONFIG_TEGRA_GPIO is not set
-# CONFIG_TEGRA186_GPIO is not set
-# CONFIG_VYBRID_GPIO is not set
-# CONFIG_SIFIVE_GPIO is not set
-# CONFIG_ZYNQ_GPIO is not set
-# CONFIG_DM_74X164 is not set
-# CONFIG_PCA953X is not set
-# CONFIG_MPC8XXX_GPIO is not set
-# CONFIG_MPC8XX_GPIO is not set
-# CONFIG_NX_GPIO is not set
-# CONFIG_NOMADIK_GPIO is not set
-# CONFIG_ZYNQMP_GPIO_MODEPIN is not set
-# CONFIG_SLG7XL45106_I2C_GPO is not set
-# CONFIG_TURRIS_OMNIA_MCU is not set
-# CONFIG_FTGPIO010 is not set
-
-#
-# Hardware Spinlock Support
-#
-# CONFIG_DM_HWSPINLOCK is not set
-CONFIG_I2C=y
-# CONFIG_DM_I2C is not set
-# CONFIG_SYS_I2C_LEGACY is not set
-# CONFIG_SPL_SYS_I2C_LEGACY is not set
-# CONFIG_TPL_SYS_I2C_LEGACY is not set
-# CONFIG_SYS_I2C_FSL is not set
-# CONFIG_SYS_I2C_DW is not set
-# CONFIG_SYS_I2C_IMX_LPI2C is not set
-# CONFIG_SYS_I2C_MTK is not set
-# CONFIG_SYS_I2C_MICROCHIP is not set
-# CONFIG_SYS_I2C_MXC is not set
-# CONFIG_SYS_I2C_NPCM is not set
-# CONFIG_SYS_I2C_SOFT is not set
-# CONFIG_SYS_I2C_MV is not set
-# CONFIG_SYS_I2C_MVTWSI is not set
-CONFIG_INPUT=y
-CONFIG_DM_KEYBOARD=y
-# CONFIG_BUTTON_KEYBOARD is not set
-# CONFIG_CROS_EC_KEYB is not set
-CONFIG_I8042_KEYB=y
-# CONFIG_TEGRA_KEYBOARD is not set
-# CONFIG_TWL4030_INPUT is not set
-
-#
-# IOMMU device drivers
-#
-# CONFIG_IOMMU is not set
-
-#
-# LED Support
-#
-# CONFIG_LED is not set
-# CONFIG_LED_STATUS is not set
-
-#
-# Mailbox Controller Support
-#
-# CONFIG_DM_MAILBOX is not set
-
-#
-# Memory Controller drivers
-#
-# CONFIG_MEMORY is not set
-# CONFIG_ATMEL_EBI is not set
-# CONFIG_MFD_ATMEL_SMC is not set
-
-#
-# Multifunction device drivers
-#
-# CONFIG_MISC is not set
-# CONFIG_NVMEM is not set
-# CONFIG_SPL_NVMEM is not set
-# CONFIG_SMSC_LPC47M is not set
-# CONFIG_SMSC_SIO1007 is not set
-# CONFIG_CROS_EC is not set
-# CONFIG_DS4510 is not set
-# CONFIG_FSL_SEC_MON is not set
-CONFIG_IRQ=y
-# CONFIG_NPCM_HOST is not set
-# CONFIG_NUVOTON_NCT6102D is not set
-# CONFIG_P2SB is not set
-# CONFIG_PWRSEQ is not set
-# CONFIG_PCA9551_LED is not set
-# CONFIG_TEST_DRV is not set
-# CONFIG_USB_HUB_USB251XB is not set
-# CONFIG_TWL4030_LED is not set
-# CONFIG_WINBOND_W83627 is not set
-# CONFIG_FS_LOADER is not set
-
-#
-# MMC Host controller Support
-#
-CONFIG_MMC=y
-CONFIG_MMC_WRITE=y
-# CONFIG_MMC_BROKEN_CD is not set
-CONFIG_DM_MMC=y
-# CONFIG_ARM_PL180_MMCI is not set
-CONFIG_MMC_QUIRKS=y
-CONFIG_SYS_MMC_MAX_BLK_COUNT=65535
-CONFIG_MMC_HW_PARTITIONING=y
-# CONFIG_SUPPORT_EMMC_RPMB is not set
-# CONFIG_SUPPORT_EMMC_BOOT is not set
-# CONFIG_MMC_IO_VOLTAGE is not set
-# CONFIG_MMC_HS400_ES_SUPPORT is not set
-# CONFIG_MMC_HS400_SUPPORT is not set
-# CONFIG_MMC_HS200_SUPPORT is not set
-CONFIG_MMC_VERBOSE=y
-# CONFIG_MMC_TRACE is not set
-# CONFIG_MMC_DW is not set
-# CONFIG_MMC_MXC is not set
-CONFIG_MMC_PCI=y
-# CONFIG_MMC_OMAP_HS is not set
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_SDMA=y
-# CONFIG_MMC_SDHCI_ADMA is not set
-# CONFIG_MMC_SDHCI_BCMSTB is not set
-# CONFIG_MMC_SDHCI_CADENCE is not set
-# CONFIG_MMC_SDHCI_IPROC is not set
-# CONFIG_MMC_SDHCI_F_SDH30 is not set
-# CONFIG_MMC_SDHCI_KONA is not set
-# CONFIG_MMC_SDHCI_MSM is not set
-# CONFIG_MMC_SDHCI_NPCM is not set
-# CONFIG_MMC_SDHCI_S5P is not set
-# CONFIG_MMC_SDHCI_STI is not set
-# CONFIG_MMC_SDHCI_XENON is not set
-# CONFIG_MMC_SDHCI_TANGIER is not set
-# CONFIG_MMC_SDHCI_ZYNQ is not set
-# CONFIG_MMC_PITON is not set
-# CONFIG_STM32_SDMMC2 is not set
-# CONFIG_FTSDC010 is not set
-# CONFIG_FSL_ESDHC is not set
-# CONFIG_FSL_ESDHC_IMX is not set
-
-#
-# MTD Support
-#
-# CONFIG_MTD is not set
-# CONFIG_DM_MTD is not set
-# CONFIG_MTD_NOR_FLASH is not set
-# CONFIG_FLASH_CFI_DRIVER is not set
-# CONFIG_HBMC_AM654 is not set
-# CONFIG_SAMSUNG_ONENAND is not set
-# CONFIG_USE_SYS_MAX_FLASH_BANKS is not set
-# CONFIG_MTD_RAW_NAND is not set
-
-#
-# SPI Flash Support
-#
-# CONFIG_SPI_FLASH is not set
-
-#
-# UBI support
-#
-# CONFIG_UBI_SILENCE_MSG is not set
-# CONFIG_MTD_UBI is not set
-# CONFIG_NVMXIP is not set
-# CONFIG_NVMXIP_QSPI is not set
-
-#
-# Multiplexer drivers
-#
-# CONFIG_MULTIPLEXER is not set
-# CONFIG_BITBANGMII is not set
-# CONFIG_MV88E6352_SWITCH is not set
-CONFIG_PHYLIB=y
-# CONFIG_PHY_ADDR_ENABLE is not set
-# CONFIG_B53_SWITCH is not set
-# CONFIG_MV88E61XX_SWITCH is not set
-# CONFIG_PHYLIB_10G is not set
-# CONFIG_PHY_ADIN is not set
-# CONFIG_PHY_AQUANTIA is not set
-# CONFIG_PHY_ATHEROS is not set
-# CONFIG_SPL_PHY_ATHEROS is not set
-# CONFIG_PHY_BROADCOM is not set
-# CONFIG_PHY_CORTINA is not set
-# CONFIG_PHY_DAVICOM is not set
-# CONFIG_PHY_ET1011C is not set
-# CONFIG_PHY_LXT is not set
-# CONFIG_PHY_MARVELL is not set
-# CONFIG_PHY_MARVELL_10G is not set
-# CONFIG_PHY_MESON_GXL is not set
-# CONFIG_PHY_MICREL is not set
-# CONFIG_PHY_MOTORCOMM is not set
-# CONFIG_PHY_MSCC is not set
-# CONFIG_PHY_NATSEMI is not set
-# CONFIG_PHY_NXP_C45_TJA11XX is not set
-# CONFIG_PHY_NXP_TJA11XX is not set
-# CONFIG_PHY_REALTEK is not set
-# CONFIG_PHY_SMSC is not set
-# CONFIG_PHY_TERANETICS is not set
-# CONFIG_PHY_TI is not set
-# CONFIG_PHY_TI_DP83867 is not set
-# CONFIG_PHY_TI_DP83869 is not set
-# CONFIG_PHY_TI_GENERIC is not set
-# CONFIG_PHY_VITESSE is not set
-# CONFIG_PHY_XILINX is not set
-# CONFIG_PHY_XILINX_GMII2RGMII is not set
-# CONFIG_PHY_XWAY is not set
-# CONFIG_PHY_ETHERNET_ID is not set
-# CONFIG_PHY_FIXED is not set
-# CONFIG_PHY_NCSI is not set
-# CONFIG_FSL_MEMAC is not set
-CONFIG_PHY_RESET_DELAY=0
-# CONFIG_FSL_PFE is not set
-CONFIG_ETH=y
-CONFIG_DM_ETH=y
-# CONFIG_DM_MDIO is not set
-# CONFIG_DM_ETH_PHY is not set
-CONFIG_NETDEVICES=y
-# CONFIG_PHY_GIGE is not set
-# CONFIG_ALTERA_TSE is not set
-# CONFIG_BCM_SF2_ETH is not set
-# CONFIG_BCMGENET is not set
-# CONFIG_BNXT_ETH is not set
-# CONFIG_CALXEDA_XGMAC is not set
-# CONFIG_DRIVER_DM9000 is not set
-# CONFIG_DWC_ETH_QOS is not set
-CONFIG_E1000=y
-# CONFIG_E1000_NO_NVM is not set
-# CONFIG_E1000_SPI_GENERIC is not set
-# CONFIG_E1000_SPI is not set
-# CONFIG_CMD_E1000 is not set
-# CONFIG_EEPRO100 is not set
-CONFIG_ETH_DESIGNWARE=y
-# CONFIG_ETH_DESIGNWARE_MESON8B is not set
-# CONFIG_ETH_DESIGNWARE_SOCFPGA is not set
-# CONFIG_ETH_DESIGNWARE_S700 is not set
-# CONFIG_DW_ALTDESCRIPTOR is not set
-# CONFIG_ETHOC is not set
-# CONFIG_FTMAC100 is not set
-# CONFIG_FTGMAC100 is not set
-# CONFIG_MCFFEC is not set
-# CONFIG_FSLDMAFEC is not set
-# CONFIG_KS8851_MLL is not set
-# CONFIG_LITEETH is not set
-# CONFIG_MACB is not set
-# CONFIG_NET_NPCM750 is not set
-CONFIG_PCH_GBE=y
-# CONFIG_RGMII is not set
-# CONFIG_MII is not set
-# CONFIG_RMII is not set
-# CONFIG_PCNET is not set
-# CONFIG_QE_UEC is not set
-# CONFIG_RTL8139 is not set
-CONFIG_RTL8169=y
-# CONFIG_SMC911X is not set
-# CONFIG_SUN7I_GMAC is not set
-# CONFIG_SUN4I_EMAC is not set
-# CONFIG_SUN8I_EMAC is not set
-# CONFIG_SH_ETHER is not set
-# CONFIG_DRIVER_TI_CPSW is not set
-# CONFIG_DRIVER_TI_EMAC is not set
-# CONFIG_DRIVER_TI_KEYSTONE_NET is not set
-# CONFIG_TULIP is not set
-# CONFIG_XILINX_AXIEMAC is not set
-# CONFIG_VSC7385_ENET is not set
-# CONFIG_XILINX_EMACLITE is not set
-# CONFIG_ZYNQ_GEM is not set
-# CONFIG_GMAC_ROCKCHIP is not set
-# CONFIG_TSEC_ENET is not set
-# CONFIG_MEDIATEK_ETH is not set
-# CONFIG_HIGMACV300_ETH is not set
-CONFIG_NVME=y
-# CONFIG_NVME_APPLE is not set
-CONFIG_NVME_PCI=y
-# CONFIG_DM_PCI_COMPAT is not set
-# CONFIG_PCI_PNP is not set
-# CONFIG_PCI_REGION_MULTI_ENTRY is not set
-CONFIG_PCI_CONFIG_HOST_BRIDGE=y
-# CONFIG_PCI_SRIOV is not set
-CONFIG_PCI_ENHANCED_ALLOCATION=y
-# CONFIG_PCI_ARID is not set
-# CONFIG_PCIE_ECAM_GENERIC is not set
-# CONFIG_PCIE_ECAM_SYNQUACER is not set
-# CONFIG_PCI_PHYTIUM is not set
-# CONFIG_PCIE_FSL is not set
-# CONFIG_PCI_MPC85XX is not set
-# CONFIG_PCI_XILINX is not set
-# CONFIG_PCIE_LAYERSCAPE_RC is not set
-# CONFIG_PCIE_LAYERSCAPE_EP is not set
-# CONFIG_PCIE_LAYERSCAPE_GEN4 is not set
-# CONFIG_PCIE_INTEL_FPGA is not set
-# CONFIG_PCIE_IPROC is not set
-# CONFIG_PCI_KEYSTONE is not set
-# CONFIG_PCIE_STARFIVE_JH7110 is not set
-
-#
-# PCI Endpoint
-#
-# CONFIG_PCI_ENDPOINT is not set
-CONFIG_PCH=y
-CONFIG_X86_PCH7=y
-CONFIG_X86_PCH9=y
-
-#
-# PHY Subsystem
-#
-# CONFIG_PHY is not set
-# CONFIG_MIPI_DPHY_HELPERS is not set
-
-#
-# Rockchip PHY driver
-#
-# CONFIG_MVEBU_COMPHY_SUPPORT is not set
-
-#
-# Pin controllers
-#
-# CONFIG_PINCTRL is not set
-CONFIG_POWER=y
-# CONFIG_POWER_LEGACY is not set
-# CONFIG_ACPI_PMC is not set
-
-#
-# Power Domain Support
-#
-# CONFIG_POWER_DOMAIN is not set
-# CONFIG_DM_PMIC is not set
-# CONFIG_PMIC_TPS65217 is not set
-# CONFIG_POWER_TPS65218 is not set
-# CONFIG_POWER_TPS62362 is not set
-# CONFIG_DM_REGULATOR is not set
-# CONFIG_TPS6586X_POWER is not set
-# CONFIG_POWER_MT6323 is not set
-# CONFIG_DM_PWM is not set
-# CONFIG_PWM_IMX is not set
-# CONFIG_PWM_SANDBOX is not set
-# CONFIG_U_QE is not set
-# CONFIG_RAM is not set
-
-#
-# Reboot Mode Support
-#
-# CONFIG_DM_REBOOT_MODE is not set
-
-#
-# Remote Processor drivers
-#
-
-#
-# Reset Controller Support
-#
-# CONFIG_RESET_SCMI is not set
-# CONFIG_DM_RNG is not set
-
-#
-# Real Time Clock
-#
-CONFIG_DM_RTC=y
-# CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set
-# CONFIG_RTC_PCF2127 is not set
-# CONFIG_RTC_DS1307 is not set
-# CONFIG_RTC_DS1337 is not set
-# CONFIG_RTC_DS1338 is not set
-# CONFIG_RTC_DS3231 is not set
-# CONFIG_RTC_EMULATION is not set
-# CONFIG_RTC_ISL1208 is not set
-# CONFIG_RTC_PCF8563 is not set
-# CONFIG_RTC_PT7C4338 is not set
-# CONFIG_RTC_RV3028 is not set
-# CONFIG_RTC_RV3029 is not set
-# CONFIG_RTC_RV8803 is not set
-# CONFIG_RTC_RX8010SJ is not set
-# CONFIG_RTC_RX8025 is not set
-# CONFIG_RTC_PL031 is not set
-# CONFIG_RTC_MV is not set
-# CONFIG_RTC_S35392A is not set
-CONFIG_RTC_MC146818=y
-# CONFIG_RTC_M41T62 is not set
-# CONFIG_RTC_STM32 is not set
-# CONFIG_RTC_ABX80X is not set
-# CONFIG_RTC_HT1380 is not set
-CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
-CONFIG_SERIAL=y
-CONFIG_BAUDRATE=115200
-CONFIG_REQUIRE_SERIAL_CONSOLE=y
-# CONFIG_SPECIFY_CONSOLE_INDEX is not set
-CONFIG_SERIAL_PRESENT=y
-CONFIG_DM_SERIAL=y
-# CONFIG_SERIAL_RX_BUFFER is not set
-# CONFIG_SERIAL_PUTS is not set
-# CONFIG_SERIAL_SEARCH_ALL is not set
-# CONFIG_SERIAL_PROBE_ALL is not set
-# CONFIG_VPL_DM_SERIAL is not set
-# CONFIG_ALTERA_JTAG_UART is not set
-# CONFIG_ALTERA_UART is not set
-# CONFIG_ARC_SERIAL is not set
-# CONFIG_ATMEL_USART is not set
-# CONFIG_BCM6345_SERIAL is not set
-CONFIG_COREBOOT_SERIAL=y
-CONFIG_COREBOOT_SERIAL_FROM_DBG2=y
-# CONFIG_CORTINA_UART is not set
-# CONFIG_FSL_LINFLEXUART is not set
-# CONFIG_FSL_LPUART is not set
-# CONFIG_MVEBU_A3700_UART is not set
-# CONFIG_MCFUART is not set
-# CONFIG_NULLDEV_SERIAL is not set
-CONFIG_SYS_NS16550=y
-CONFIG_NS16550_DYNAMIC=y
-# CONFIG_SYS_NS16550_MEM32 is not set
-# CONFIG_SYS_NS16550_PORT_MAPPED is not set
-# CONFIG_PL01X_SERIAL is not set
-# CONFIG_ROCKCHIP_SERIAL is not set
-# CONFIG_XILINX_UARTLITE is not set
-# CONFIG_MSM_SERIAL is not set
-# CONFIG_MSM_GENI_SERIAL is not set
-# CONFIG_MXS_AUART_SERIAL is not set
-# CONFIG_OMAP_SERIAL is not set
-# CONFIG_SIFIVE_SERIAL is not set
-# CONFIG_ZYNQ_SERIAL is not set
-# CONFIG_MTK_SERIAL is not set
-# CONFIG_MT7620_SERIAL is not set
-# CONFIG_NPCM_SERIAL is not set
-# CONFIG_SMEM is not set
-
-#
-# Sound support
-#
-CONFIG_SOUND=y
-# CONFIG_I2S is not set
-# CONFIG_SOUND_DA7219 is not set
-CONFIG_SOUND_I8254=y
-# CONFIG_SOUND_INTEL_HDA is not set
-# CONFIG_SOUND_IVYBRIDGE is not set
-# CONFIG_SOUND_MAX98357A is not set
-# CONFIG_SOUND_RT5677 is not set
-
-#
-# SOC (System On Chip) specific Drivers
-#
-# CONFIG_SOC_DEVICE is not set
-# CONFIG_SOC_TI is not set
-# CONFIG_SPI is not set
-
-#
-# SPMI support
-#
-# CONFIG_SPMI is not set
-# CONFIG_SYSINFO is not set
-
-#
-# System reset device drivers
-#
-CONFIG_SYSRESET=y
-CONFIG_SYSRESET_CMD_RESET=y
-# CONFIG_POWEROFF_GPIO is not set
-# CONFIG_SYSRESET_GPIO is not set
-# CONFIG_SYSRESET_SYSCON is not set
-# CONFIG_SYSRESET_WATCHDOG is not set
-# CONFIG_SYSRESET_RESETCTL is not set
-CONFIG_SYSRESET_X86=y
-# CONFIG_SYSRESET_SPL_X86 is not set
-# CONFIG_SYSRESET_TPL_X86 is not set
-# CONFIG_SYSRESET_MPC83XX is not set
-# CONFIG_DM_THERMAL is not set
-
-#
-# Timer Support
-#
-CONFIG_TIMER=y
-# CONFIG_TIMER_EARLY is not set
-# CONFIG_ALTERA_TIMER is not set
-# CONFIG_AST_TIMER is not set
-# CONFIG_ATCPIT100_TIMER is not set
-# CONFIG_ATMEL_PIT_TIMER is not set
-# CONFIG_CADENCE_TTC_TIMER is not set
-# CONFIG_DESIGNWARE_APB_TIMER is not set
-# CONFIG_FTTMR010_TIMER is not set
-# CONFIG_GXP_TIMER is not set
-# CONFIG_MPC83XX_TIMER is not set
-# CONFIG_RENESAS_OSTM_TIMER is not set
-# CONFIG_NOMADIK_MTU_TIMER is not set
-# CONFIG_NPCM_TIMER is not set
-# CONFIG_OMAP_TIMER is not set
-# CONFIG_ORION_TIMER is not set
-# CONFIG_ROCKCHIP_TIMER is not set
-# CONFIG_SP804_TIMER is not set
-# CONFIG_STM32_TIMER is not set
-# CONFIG_TEGRA_TIMER is not set
-CONFIG_X86_TSC_TIMER=y
-CONFIG_X86_TSC_READ_BASE=y
-# CONFIG_MTK_TIMER is not set
-# CONFIG_MCHP_PIT64B_TIMER is not set
-# CONFIG_IMX_GPT_TIMER is not set
-# CONFIG_XILINX_TIMER is not set
-
-#
-# TPM support
-#
-CONFIG_USB=y
-CONFIG_DM_USB=y
-# CONFIG_DM_USB_GADGET is not set
-
-#
-# USB Host Controller Drivers
-#
-CONFIG_USB_HOST=y
-CONFIG_USB_XHCI_HCD=y
-# CONFIG_USB_XHCI_DWC3 is not set
-# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
-CONFIG_USB_XHCI_PCI=y
-# CONFIG_USB_XHCI_FSL is not set
-# CONFIG_USB_XHCI_BRCM is not set
-CONFIG_USB_EHCI_HCD=y
-# CONFIG_USB_EHCI_MSM is not set
-CONFIG_USB_EHCI_PCI=y
-# CONFIG_USB_EHCI_ZYNQ is not set
-# CONFIG_USB_EHCI_GENERIC is not set
-# CONFIG_USB_EHCI_FSL is not set
-# CONFIG_USB_OHCI_HCD is not set
-# CONFIG_USB_UHCI_HCD is not set
-# CONFIG_USB_DWC2 is not set
-# CONFIG_USB_R8A66597_HCD is not set
-# CONFIG_USB_ISP1760 is not set
-# CONFIG_USB_CDNS3 is not set
-# CONFIG_USB_DWC3 is not set
-
-#
-# Legacy MUSB Support
-#
-# CONFIG_USB_MUSB_HCD is not set
-# CONFIG_USB_MUSB_UDC is not set
-
-#
-# MUSB Controller Driver
-#
-# CONFIG_USB_MUSB_HOST is not set
-# CONFIG_USB_MUSB_PIO_ONLY is not set
-
-#
-# USB Phy
-#
-# CONFIG_TWL4030_USB is not set
-# CONFIG_ROCKCHIP_USB2_PHY is not set
-
-#
-# ULPI drivers
-#
-
-#
-# USB peripherals
-#
-CONFIG_USB_STORAGE=y
-CONFIG_USB_KEYBOARD=y
-# CONFIG_USB_ONBOARD_HUB is not set
-CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=1000
-CONFIG_USB_KEYBOARD_FN_KEYS=y
-CONFIG_SYS_USB_EVENT_POLL=y
-# CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE is not set
-# CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is not set
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
-# CONFIG_USB_ETHER_ASIX88179 is not set
-# CONFIG_USB_ETHER_LAN75XX is not set
-# CONFIG_USB_ETHER_LAN78XX is not set
-# CONFIG_USB_ETHER_MCS7830 is not set
-# CONFIG_USB_ETHER_RTL8152 is not set
-CONFIG_USB_ETHER_SMSC95XX=y
-# CONFIG_USB_GADGET is not set
-# CONFIG_SPL_USB_GADGET is not set
-
-#
-# UFS Host Controller Support
-#
-# CONFIG_UFS is not set
-# CONFIG_TI_J721E_UFS is not set
-
-#
-# Graphics support
-#
-CONFIG_VIDEO=y
-# CONFIG_VIDEO_FONT_4X6 is not set
-CONFIG_VIDEO_FONT_8X16=y
-# CONFIG_VIDEO_FONT_SUN12X22 is not set
-# CONFIG_VIDEO_FONT_16X32 is not set
-CONFIG_VIDEO_LOGO=y
-CONFIG_BACKLIGHT=y
-CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x1000000
-# CONFIG_VIDEO_COPY is not set
-# CONFIG_VIDEO_DAMAGE is not set
-# CONFIG_BACKLIGHT_GPIO is not set
-CONFIG_VIDEO_BPP8=y
-CONFIG_VIDEO_BPP16=y
-CONFIG_VIDEO_BPP32=y
-CONFIG_VIDEO_ANSI=y
-# CONFIG_VIDEO_MIPI_DSI is not set
-CONFIG_CONSOLE_NORMAL=y
-# CONFIG_CONSOLE_ROTATION is not set
-# CONFIG_CONSOLE_TRUETYPE is not set
-CONFIG_SYS_WHITE_ON_BLACK=y
-# CONFIG_NO_FB_CLEAR is not set
-CONFIG_PANEL=y
-CONFIG_SIMPLE_PANEL=y
-# CONFIG_PANEL_HX8238D is not set
-
-#
-# TrueType Fonts
-#
-# CONFIG_VIDCONSOLE_AS_LCD is not set
-# CONFIG_VIDEO_BOCHS is not set
-CONFIG_VIDEO_COREBOOT=y
-# CONFIG_VIDEO_VESA is not set
-# CONFIG_VIDEO_LCD_ANX9804 is not set
-# CONFIG_ATMEL_LCD_BGR555 is not set
-# CONFIG_VIDEO_BCM2835 is not set
-# CONFIG_VIDEO_LCD_ENDEAVORU is not set
-# CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
-# CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
-# CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
-# CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
-# CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
-# CONFIG_VIDEO_LCD_SSD2828 is not set
-# CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
-# CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
-# CONFIG_VIDEO_MESON is not set
-# CONFIG_VIDEO_MVEBU is not set
-# CONFIG_I2C_EDID is not set
-# CONFIG_DISPLAY is not set
-# CONFIG_ATMEL_HLCD is not set
-# CONFIG_BACKLIGHT_LM3533 is not set
-# CONFIG_AM335X_LCD is not set
-# CONFIG_VIDEO_EXYNOS is not set
-# CONFIG_VIDEO_BROADWELL_IGD is not set
-# CONFIG_VIDEO_IVYBRIDGE_IGD is not set
-# CONFIG_VIDEO_ROCKCHIP is not set
-# CONFIG_VIDEO_ARM_MALIDP is not set
-# CONFIG_VIDEO_STM32 is not set
-# CONFIG_VIDEO_TIDSS is not set
-# CONFIG_VIDEO_TEGRA124 is not set
-# CONFIG_VIDEO_BRIDGE is not set
-# CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825 is not set
-# CONFIG_VIDEO_TEGRA20 is not set
-# CONFIG_VIDEO_DSI_TEGRA30 is not set
-# CONFIG_TEGRA_BACKLIGHT_PWM is not set
-# CONFIG_VIDEO_MXS is not set
-# CONFIG_VIDEO_SEPS525 is not set
-CONFIG_CONSOLE_SCROLL_LINES=5
-# CONFIG_VIDEO_SIMPLE is not set
-# CONFIG_VIDEO_DT_SIMPLEFB is not set
-# CONFIG_VIDEO_MCDE_SIMPLE is not set
-# CONFIG_OSD is not set
-# CONFIG_VIDEO_REMOVE is not set
-# CONFIG_SPLASH_SCREEN is not set
-CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
-CONFIG_VIDEO_BMP_RLE8=y
-# CONFIG_BMP_16BPP is not set
-# CONFIG_BMP_24BPP is not set
-# CONFIG_BMP_32BPP is not set
-
-#
-# VirtIO Drivers
-#
-# CONFIG_VIRTIO_MMIO is not set
-# CONFIG_VIRTIO_PCI is not set
-# CONFIG_VIRTIO_PCI_LEGACY is not set
-
-#
-# 1-Wire support
-#
-# CONFIG_W1 is not set
-
-#
-# 1-wire EEPROM support
-#
-# CONFIG_W1_EEPROM is not set
-
-#
-# Watchdog Timer Support
-#
-# CONFIG_WATCHDOG is not set
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
-# CONFIG_IMX_WATCHDOG is not set
-# CONFIG_ULP_WATCHDOG is not set
-# CONFIG_WDT is not set
-# CONFIG_PHYS_TO_BUS is not set
-
-#
-# File systems
-#
-# CONFIG_FS_BTRFS is not set
-CONFIG_FS_CBFS=y
-CONFIG_FS_EXT4=y
-CONFIG_EXT4_WRITE=y
-CONFIG_FS_FAT=y
-CONFIG_FAT_WRITE=y
-CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
-# CONFIG_FS_JFFS2 is not set
-# CONFIG_UBIFS_SILENCE_MSG is not set
-# CONFIG_UBIFS_SILENCE_DEBUG_DUMP is not set
-# CONFIG_FS_CRAMFS is not set
-# CONFIG_YAFFS2 is not set
-# CONFIG_FS_SQUASHFS is not set
-# CONFIG_FS_EROFS is not set
-
-#
-# Library routines
-#
-# CONFIG_ADDR_MAP is not set
-# CONFIG_SYS_TIMER_COUNTS_DOWN is not set
-CONFIG_PHYSMEM=y
-# CONFIG_BCH is not set
-# CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set
-CONFIG_CHARSET=y
-# CONFIG_DYNAMIC_CRC_TABLE is not set
-CONFIG_HAVE_ARCH_IOMAP=y
-CONFIG_HAVE_PRIVATE_LIBGCC=y
-CONFIG_LIB_UUID=y
-CONFIG_PRINTF=y
-CONFIG_SPRINTF=y
-CONFIG_STRTO=y
-CONFIG_USE_PRIVATE_LIBGCC=y
-CONFIG_SYS_HZ=1000
-# CONFIG_PANIC_HANG is not set
-CONFIG_REGEX=y
-CONFIG_LIB_RAND=y
-# CONFIG_LIB_HW_RAND is not set
-CONFIG_SUPPORT_ACPI=y
-CONFIG_ACPI=y
-# CONFIG_GENERATE_ACPI_TABLE is not set
-# CONFIG_BITREVERSE is not set
-# CONFIG_TRACE is not set
-# CONFIG_CIRCBUF is not set
-CONFIG_CMD_DHRYSTONE=y
-
-#
-# Security support
-#
-# CONFIG_AES is not set
-# CONFIG_ECDSA is not set
-CONFIG_RSA=y
-CONFIG_RSA_VERIFY=y
-# CONFIG_RSA_VERIFY_WITH_PKEY is not set
-CONFIG_RSA_SOFTWARE_EXP=y
-# CONFIG_ASYMMETRIC_KEY_TYPE is not set
-# CONFIG_TPM is not set
-
-#
-# Android Verified Boot
-#
-
-#
-# Hashing Support
-#
-# CONFIG_BLAKE2 is not set
-CONFIG_SHA1=y
-CONFIG_SHA256=y
-# CONFIG_SHA512 is not set
-# CONFIG_SHA384 is not set
-# CONFIG_SHA_HW_ACCEL is not set
-CONFIG_MD5=y
-CONFIG_CRC8=y
-CONFIG_CRC32=y
-
-#
-# Compression Support
-#
-# CONFIG_LZ4 is not set
-# CONFIG_LZMA is not set
-# CONFIG_LZO is not set
-# CONFIG_GZIP is not set
-# CONFIG_ZLIB_UNCOMPRESS is not set
-# CONFIG_BZIP2 is not set
-CONFIG_ZLIB=y
-# CONFIG_ZSTD is not set
-# CONFIG_VPL_LZMA is not set
-# CONFIG_SPL_GZIP is not set
-# CONFIG_ERRNO_STR is not set
-# CONFIG_HEXDUMP is not set
-# CONFIG_GETOPT is not set
-CONFIG_OF_LIBFDT=y
-CONFIG_OF_LIBFDT_ASSUME_MASK=0
-CONFIG_SYS_FDT_PAD=0x3000
-CONFIG_SMBIOS_PARSER=y
-# CONFIG_EFI is not set
-CONFIG_EFI_LOADER=y
-CONFIG_CMD_BOOTEFI_BOOTMGR=y
-CONFIG_EFI_VARIABLE_FILE_STORE=y
-# CONFIG_EFI_VARIABLE_NO_STORE is not set
-# CONFIG_EFI_VARIABLES_PRESEED is not set
-CONFIG_EFI_VAR_BUF_SIZE=65536
-CONFIG_EFI_GET_TIME=y
-# CONFIG_EFI_SET_TIME is not set
-# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
-# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
-# CONFIG_EFI_CAPSULE_ON_DISK is not set
-CONFIG_EFI_CAPSULE_MAX=15
-CONFIG_EFI_DEVICE_PATH_TO_TEXT=y
-CONFIG_EFI_DEVICE_PATH_UTIL=y
-CONFIG_EFI_DT_FIXUP=y
-CONFIG_EFI_LOADER_HII=y
-CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y
-CONFIG_EFI_UNICODE_CAPITALIZATION=y
-CONFIG_EFI_PLATFORM_LANG_CODES="en-US"
-CONFIG_EFI_HAVE_RUNTIME_RESET=y
-CONFIG_EFI_LOAD_FILE2_INITRD=y
-# CONFIG_EFI_SECURE_BOOT is not set
-CONFIG_EFI_ECPT=y
-CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
-# CONFIG_OPTEE_LIB is not set
-# CONFIG_OPTEE_IMAGE is not set
-# CONFIG_BOOTM_OPTEE is not set
-# CONFIG_TEST_FDTDEC is not set
-CONFIG_LIB_DATE=y
-CONFIG_LIB_ELF=y
-CONFIG_LMB=y
-CONFIG_LMB_USE_MAX_REGIONS=y
-CONFIG_LMB_MAX_REGIONS=16
-# CONFIG_PHANDLE_CHECK_SEQ is not set
-
-#
-# FWU Multi Bank Updates
-#
-# CONFIG_POST is not set
-
-#
-# Unit tests
-#
-# CONFIG_UNIT_TEST is not set
-
-#
-# Tools options
-#
-CONFIG_MKIMAGE_DTC_PATH="dtc"
-CONFIG_TOOLS_CRC32=y
-CONFIG_TOOLS_LIBCRYPTO=y
-CONFIG_TOOLS_FIT=y
-CONFIG_TOOLS_FIT_FULL_CHECK=y
-CONFIG_TOOLS_FIT_PRINT=y
-CONFIG_TOOLS_FIT_RSASSA_PSS=y
-CONFIG_TOOLS_FIT_SIGNATURE=y
-CONFIG_TOOLS_FIT_SIGNATURE_MAX_SIZE=0x10000000
-CONFIG_TOOLS_FIT_VERBOSE=y
-CONFIG_TOOLS_MD5=y
-CONFIG_TOOLS_OF_LIBFDT=y
-CONFIG_TOOLS_SHA1=y
-CONFIG_TOOLS_SHA256=y
-CONFIG_TOOLS_SHA384=y
-CONFIG_TOOLS_SHA512=y
-# CONFIG_TOOLS_MKEFICAPSULE is not set
-# CONFIG_FSPI_CONF_HEADER is not set
-# CONFIG_TOOLS_MKFWUMDATA is not set
diff --git a/config/u-boot/qemu_x86_12mb/target.cfg b/config/u-boot/qemu_x86_12mb/target.cfg
deleted file mode 100644
index 216c7bdc..00000000
--- a/config/u-boot/qemu_x86_12mb/target.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-tree="default"
-xtree="default"
-xarch="i386-elf"

From 429e91f90894d30bc2c6e165d6f2a743c61b76f3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 1 Jun 2024 23:01:30 +0100
Subject: [PATCH 0456/1549] make GRUB multi-tree and re-add xhci patches

Re-add xHCI only on haswell and broadwell machines, where
they are needed. Otherwise, keep the same GRUB code.

The xHCI patches were removed because they caused issues
on Sandybridge-based Dell Latitude laptops. See:
https://codeberg.org/libreboot/lbmk/issues/216

The issue was not reported elsewhere, including on the
Haswell/Broadwell hardware where they are needed, but the
build system could only build one version of GRUB.

The older machines do not need xHCI patches, because they
either do not have xHCI patches, or work (in GRUB) because
they're in EHCI mode when running the payload.

So, the problem is that we need the xHCI patches for GRUB
on Haswell/Broadwell hardware, but the patches break
Sandybridge hardware, and we only had the one build of GRUB.
To mitigate this problem, the build system now supports
building multiple revisions of GRUB, with different patches,
and each given coreboot target can say which GRUB tree to use
by setting this in target.cfg:

grubtree="xhci"

In the above example, the "xhci" tree would be used. Some
generic GRUB config has been moved to config/data/grub/
and config/grub/ now looks like config/coreboot/ - also,
the grub.cfg file (named "payload" in each tree) is copied
to the GRUB source tree as ".config", then added to GRUB's
memdisk in the same way, as grub.cfg.

Several other design changes had to be made because of this:

* grub.cfg in memdisk no longer automatically jumps to one
  in CBFS, but now shows a menuentry for it if available

* Certain commands in script/trees are disabled for GRUB,
  such as *config make commands.

* gnulib is now defined in config/submodule/grub/, instead
  of config/git/grub - and this mitigates an existing bug
  where downloading gnulib first would make grub no longer
  possible to download in lbmk.

The coreboot option CONFIG_FINALIZE_USB_ROUTE_XHCI has been
re-enabled on: Dell OptiPlex 9020 MT, Dell OptiPlex 9020 SFF,
Lenovo ThinkPad T440p and Lenovo ThinkPad W541 - now USB should
work again in GRUB.

The GRUB payload has been re-enabled on HP EliteBook 820 G2.

This change will enable per-board GRUB optimisation in the
future. For example, we hardcode what partitions and LVMs
GRUB scans because * is slow on ICH7-based machines, due
to GRUB's design. On other machines, * is reasonably fast,
for automatically enumerating the list of devices for boot.

Use of * (and other wildcards) could enable our GRUB payload
to automatically boot more distros, with minimal fuss. This
can be done at a later date, in subsequent revisions.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              |    2 +-
 .../config/libgfxinit_txtmode                 |    2 +-
 .../coreboot/dell9020mt_nri_12mb/target.cfg   |    1 +
 .../config/libgfxinit_corebootfb              |    2 +-
 .../config/libgfxinit_txtmode                 |    2 +-
 .../coreboot/dell9020sff_nri_12mb/target.cfg  |    1 +
 config/coreboot/hp820g2_12mb/target.cfg       |    2 +
 .../config/libgfxinit_corebootfb              |    2 +-
 .../config/libgfxinit_txtmode                 |    2 +-
 config/coreboot/t440plibremrc_12mb/target.cfg |    1 +
 .../w541_12mb/config/libgfxinit_corebootfb    |    2 +-
 .../w541_12mb/config/libgfxinit_txtmode       |    2 +-
 config/coreboot/w541_12mb/target.cfg          |    1 +
 config/data/grub/background/COPYING           |    4 +
 .../grub/background/background1024x768.png    |  Bin
 .../grub/background/background1280x800.png    |  Bin
 config/{ => data}/grub/bootorder              |    0
 config/{ => data}/grub/keymap/colemak.gkb     |  Bin
 config/{ => data}/grub/keymap/deqwertz.gkb    |  Bin
 config/{ => data}/grub/keymap/esqwerty.gkb    |  Bin
 config/{ => data}/grub/keymap/frazerty.gkb    |  Bin
 config/{ => data}/grub/keymap/frdvbepo.gkb    |  Bin
 config/{ => data}/grub/keymap/itqwerty.gkb    |  Bin
 config/{ => data}/grub/keymap/ptqwerty.gkb    |  Bin
 config/{ => data}/grub/keymap/svenska.gkb     |  Bin
 config/{ => data}/grub/keymap/trqwerty.gkb    |  Bin
 config/{ => data}/grub/keymap/ukdvorak.gkb    |  Bin
 config/{ => data}/grub/keymap/ukqwerty.gkb    |  Bin
 config/{ => data}/grub/keymap/usdvorak.gkb    |  Bin
 config/{ => data}/grub/keymap/usqwerty.gkb    |  Bin
 .../modules.list => data/grub/module/default} |    1 -
 config/data/grub/module/xhci                  |  157 +
 config/git/grub                               |   12 +-
 config/grub/background/COPYING                |    3 -
 config/grub/build.list                        |    1 +
 config/grub/config/AUTHORS                    |    2 -
 config/grub/config/COPYING                    |  695 ----
 config/grub/config/grub_memdisk.cfg           |    9 -
 .../grub.cfg => default/config/payload}       |   10 +
 ...missing-characters-for-borders-arrow.patch |    0
 ...-the-name-libreboot-in-the-grub-menu.patch |    0
 .../0002-luks2/0003-Add-CC0-license.patch     |    0
 .../0004-Define-GRUB_UINT32_MAX.patch         |    0
 .../0005-Add-Argon2-algorithm.patch           |    0
 ...Error-on-missing-Argon2id-parameters.patch |    0
 .../0007-Compile-with-Argon2id-support.patch  |    0
 ...8-Make-grub-install-work-with-Argon2.patch |    0
 ...-coreboot-force-scancodes2-translate.patch |    0
 ...outs-don-t-print-Unknown-key-message.patch |    0
 ...-missing-prefix-errors-on-the-screen.patch |    0
 ...on-t-print-error-if-module-not-found.patch |    0
 ...003-don-t-print-empty-error-messages.patch |    0
 ...-native-NVMe-driver-based-on-SeaBIOS.patch |    0
 config/grub/default/target.cfg                |    5 +
 config/grub/xhci/config/payload               |  290 ++
 ...missing-characters-for-borders-arrow.patch |   90 +
 ...-the-name-libreboot-in-the-grub-menu.patch |   25 +
 .../0002-luks2/0003-Add-CC0-license.patch     |   42 +
 .../0004-Define-GRUB_UINT32_MAX.patch         |   39 +
 .../0005-Add-Argon2-algorithm.patch           | 2611 +++++++++++++++
 ...Error-on-missing-Argon2id-parameters.patch |   58 +
 .../0007-Compile-with-Argon2id-support.patch  |   83 +
 ...8-Make-grub-install-work-with-Argon2.patch |   26 +
 ...-coreboot-force-scancodes2-translate.patch |  107 +
 ...outs-don-t-print-Unknown-key-message.patch |   38 +
 ...-missing-prefix-errors-on-the-screen.patch |  102 +
 ...on-t-print-error-if-module-not-found.patch |   34 +
 ...003-don-t-print-empty-error-messages.patch |   31 +
 ...b-Parse-SuperSpeed-companion-descrip.patch |  245 ++
 .../0002-usb-Add-enum-for-xHCI.patch          |   29 +
 ...rans-Set-default-maximum-packet-size.patch |   33 +
 ...b-Add-function-pointer-for-attach-de.patch |  121 +
 ...b-usbhub-Add-new-private-fields-for-.patch |   77 +
 ...6-grub-core-bus-usb-Add-xhci-support.patch | 2814 +++++++++++++++++
 ...b-usbhub-Add-xHCI-non-root-hub-suppo.patch |  127 +
 .../0008-Fix-compilation-on-x86_64.patch      |   90 +
 ...-native-NVMe-driver-based-on-SeaBIOS.patch | 1074 +++++++
 config/grub/{ => xhci}/target.cfg             |    2 +
 .../submodule/grub/default/gnulib/module.cfg  |    3 +
 config/submodule/grub/default/module.list     |    1 +
 config/submodule/grub/xhci/gnulib/module.cfg  |    3 +
 config/submodule/grub/xhci/module.list        |    1 +
 include/git.sh                                |    6 +-
 include/lib.sh                                |    4 +-
 script/roms                                   |   28 +-
 script/trees                                  |   30 +-
 86 files changed, 8430 insertions(+), 755 deletions(-)
 create mode 100644 config/data/grub/background/COPYING
 rename config/{ => data}/grub/background/background1024x768.png (100%)
 rename config/{ => data}/grub/background/background1280x800.png (100%)
 rename config/{ => data}/grub/bootorder (100%)
 rename config/{ => data}/grub/keymap/colemak.gkb (100%)
 rename config/{ => data}/grub/keymap/deqwertz.gkb (100%)
 rename config/{ => data}/grub/keymap/esqwerty.gkb (100%)
 rename config/{ => data}/grub/keymap/frazerty.gkb (100%)
 rename config/{ => data}/grub/keymap/frdvbepo.gkb (100%)
 rename config/{ => data}/grub/keymap/itqwerty.gkb (100%)
 rename config/{ => data}/grub/keymap/ptqwerty.gkb (100%)
 rename config/{ => data}/grub/keymap/svenska.gkb (100%)
 rename config/{ => data}/grub/keymap/trqwerty.gkb (100%)
 rename config/{ => data}/grub/keymap/ukdvorak.gkb (100%)
 rename config/{ => data}/grub/keymap/ukqwerty.gkb (100%)
 rename config/{ => data}/grub/keymap/usdvorak.gkb (100%)
 rename config/{ => data}/grub/keymap/usqwerty.gkb (100%)
 rename config/{grub/modules.list => data/grub/module/default} (99%)
 mode change 100644 => 100755
 create mode 100755 config/data/grub/module/xhci
 delete mode 100644 config/grub/background/COPYING
 create mode 100644 config/grub/build.list
 delete mode 100644 config/grub/config/AUTHORS
 delete mode 100644 config/grub/config/COPYING
 delete mode 100644 config/grub/config/grub_memdisk.cfg
 rename config/grub/{config/grub.cfg => default/config/payload} (95%)
 rename config/grub/{ => default}/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch (100%)
 rename config/grub/{ => default}/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch (100%)
 rename config/grub/{ => default}/patches/0002-luks2/0003-Add-CC0-license.patch (100%)
 rename config/grub/{ => default}/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch (100%)
 rename config/grub/{ => default}/patches/0002-luks2/0005-Add-Argon2-algorithm.patch (100%)
 rename config/grub/{ => default}/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch (100%)
 rename config/grub/{ => default}/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch (100%)
 rename config/grub/{ => default}/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch (100%)
 rename config/grub/{ => default}/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch (100%)
 rename config/grub/{ => default}/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch (100%)
 rename config/grub/{ => default}/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch (100%)
 rename config/grub/{ => default}/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch (100%)
 rename config/grub/{ => default}/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch (100%)
 rename config/grub/{ => default}/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch (100%)
 create mode 100644 config/grub/default/target.cfg
 create mode 100644 config/grub/xhci/config/payload
 create mode 100644 config/grub/xhci/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
 create mode 100644 config/grub/xhci/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
 create mode 100644 config/grub/xhci/patches/0002-luks2/0003-Add-CC0-license.patch
 create mode 100644 config/grub/xhci/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch
 create mode 100644 config/grub/xhci/patches/0002-luks2/0005-Add-Argon2-algorithm.patch
 create mode 100644 config/grub/xhci/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch
 create mode 100644 config/grub/xhci/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch
 create mode 100644 config/grub/xhci/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch
 create mode 100644 config/grub/xhci/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
 create mode 100644 config/grub/xhci/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
 create mode 100644 config/grub/xhci/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
 create mode 100644 config/grub/xhci/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
 create mode 100644 config/grub/xhci/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
 create mode 100644 config/grub/xhci/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
 create mode 100644 config/grub/xhci/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch
 create mode 100644 config/grub/xhci/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch
 create mode 100644 config/grub/xhci/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
 create mode 100644 config/grub/xhci/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
 create mode 100644 config/grub/xhci/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch
 create mode 100644 config/grub/xhci/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
 create mode 100644 config/grub/xhci/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch
 create mode 100644 config/grub/xhci/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
 rename config/grub/{ => xhci}/target.cfg (70%)
 create mode 100644 config/submodule/grub/default/gnulib/module.cfg
 create mode 100644 config/submodule/grub/default/module.list
 create mode 100644 config/submodule/grub/xhci/gnulib/module.cfg
 create mode 100644 config/submodule/grub/xhci/module.list

diff --git a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
index 7afbe427..509e784e 100644
--- a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
@@ -288,7 +288,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
index 3609c5a8..428bed87 100644
--- a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
@@ -286,7 +286,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/coreboot/dell9020mt_nri_12mb/target.cfg b/config/coreboot/dell9020mt_nri_12mb/target.cfg
index 813ed915..b513e2b5 100644
--- a/config/coreboot/dell9020mt_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_nri_12mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
+grubtree="xhci"
diff --git a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
index e2c82603..ac1d9f16 100644
--- a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
@@ -288,7 +288,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
index 4fe0c52c..179af9cc 100644
--- a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
@@ -286,7 +286,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/coreboot/dell9020sff_nri_12mb/target.cfg b/config/coreboot/dell9020sff_nri_12mb/target.cfg
index 813ed915..b513e2b5 100644
--- a/config/coreboot/dell9020sff_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_nri_12mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
+grubtree="xhci"
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index c54e8748..ada696cf 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -1,6 +1,8 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
+payload_seabios_withgrub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="nvme ahci"
+grubtree="xhci"
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
index ab3c464b..dd614202 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
@@ -325,7 +325,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
index b6a9afd1..a0dce901 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
@@ -323,7 +323,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index 813ed915..b513e2b5 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
+grubtree="xhci"
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
index 7db59d7b..ae155585 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
@@ -325,7 +325,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_txtmode b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
index a4a33d25..9a891434 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
@@ -323,7 +323,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
 # CONFIG_PCIEXP_HOTPLUG is not set
 CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
 CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
 CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index 813ed915..b513e2b5 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
+grubtree="xhci"
diff --git a/config/data/grub/background/COPYING b/config/data/grub/background/COPYING
new file mode 100644
index 00000000..ba07806d
--- /dev/null
+++ b/config/data/grub/background/COPYING
@@ -0,0 +1,4 @@
+The deer logo for Libreboot is copyright 2014 Marcus Moeller and released under
+CC-0 1.0: https://creativecommons.org/publicdomain/zero/1.0/legalcode
+The grey backgrounds with it were made by Leah Rowe in 2016, also CC-0 1.0; the
+same applies to the purple version which was made in 2023.
diff --git a/config/grub/background/background1024x768.png b/config/data/grub/background/background1024x768.png
similarity index 100%
rename from config/grub/background/background1024x768.png
rename to config/data/grub/background/background1024x768.png
diff --git a/config/grub/background/background1280x800.png b/config/data/grub/background/background1280x800.png
similarity index 100%
rename from config/grub/background/background1280x800.png
rename to config/data/grub/background/background1280x800.png
diff --git a/config/grub/bootorder b/config/data/grub/bootorder
similarity index 100%
rename from config/grub/bootorder
rename to config/data/grub/bootorder
diff --git a/config/grub/keymap/colemak.gkb b/config/data/grub/keymap/colemak.gkb
similarity index 100%
rename from config/grub/keymap/colemak.gkb
rename to config/data/grub/keymap/colemak.gkb
diff --git a/config/grub/keymap/deqwertz.gkb b/config/data/grub/keymap/deqwertz.gkb
similarity index 100%
rename from config/grub/keymap/deqwertz.gkb
rename to config/data/grub/keymap/deqwertz.gkb
diff --git a/config/grub/keymap/esqwerty.gkb b/config/data/grub/keymap/esqwerty.gkb
similarity index 100%
rename from config/grub/keymap/esqwerty.gkb
rename to config/data/grub/keymap/esqwerty.gkb
diff --git a/config/grub/keymap/frazerty.gkb b/config/data/grub/keymap/frazerty.gkb
similarity index 100%
rename from config/grub/keymap/frazerty.gkb
rename to config/data/grub/keymap/frazerty.gkb
diff --git a/config/grub/keymap/frdvbepo.gkb b/config/data/grub/keymap/frdvbepo.gkb
similarity index 100%
rename from config/grub/keymap/frdvbepo.gkb
rename to config/data/grub/keymap/frdvbepo.gkb
diff --git a/config/grub/keymap/itqwerty.gkb b/config/data/grub/keymap/itqwerty.gkb
similarity index 100%
rename from config/grub/keymap/itqwerty.gkb
rename to config/data/grub/keymap/itqwerty.gkb
diff --git a/config/grub/keymap/ptqwerty.gkb b/config/data/grub/keymap/ptqwerty.gkb
similarity index 100%
rename from config/grub/keymap/ptqwerty.gkb
rename to config/data/grub/keymap/ptqwerty.gkb
diff --git a/config/grub/keymap/svenska.gkb b/config/data/grub/keymap/svenska.gkb
similarity index 100%
rename from config/grub/keymap/svenska.gkb
rename to config/data/grub/keymap/svenska.gkb
diff --git a/config/grub/keymap/trqwerty.gkb b/config/data/grub/keymap/trqwerty.gkb
similarity index 100%
rename from config/grub/keymap/trqwerty.gkb
rename to config/data/grub/keymap/trqwerty.gkb
diff --git a/config/grub/keymap/ukdvorak.gkb b/config/data/grub/keymap/ukdvorak.gkb
similarity index 100%
rename from config/grub/keymap/ukdvorak.gkb
rename to config/data/grub/keymap/ukdvorak.gkb
diff --git a/config/grub/keymap/ukqwerty.gkb b/config/data/grub/keymap/ukqwerty.gkb
similarity index 100%
rename from config/grub/keymap/ukqwerty.gkb
rename to config/data/grub/keymap/ukqwerty.gkb
diff --git a/config/grub/keymap/usdvorak.gkb b/config/data/grub/keymap/usdvorak.gkb
similarity index 100%
rename from config/grub/keymap/usdvorak.gkb
rename to config/data/grub/keymap/usdvorak.gkb
diff --git a/config/grub/keymap/usqwerty.gkb b/config/data/grub/keymap/usqwerty.gkb
similarity index 100%
rename from config/grub/keymap/usqwerty.gkb
rename to config/data/grub/keymap/usqwerty.gkb
diff --git a/config/grub/modules.list b/config/data/grub/module/default
old mode 100644
new mode 100755
similarity index 99%
rename from config/grub/modules.list
rename to config/data/grub/module/default
index 381451b9..503c61c8
--- a/config/grub/modules.list
+++ b/config/data/grub/module/default
@@ -9,7 +9,6 @@ usbserial_pl2303 \
 usbserial_usbdebug \
 video_colors \
 "
-
 # Modules (and always loaded)
 grub_modules=" \
 acpi \
diff --git a/config/data/grub/module/xhci b/config/data/grub/module/xhci
new file mode 100755
index 00000000..8bf80bfe
--- /dev/null
+++ b/config/data/grub/module/xhci
@@ -0,0 +1,157 @@
+# Install modules (installed, but not automatically loaded)
+grub_install_modules=" \
+hexdump \
+newc \
+odc \
+usbserial_common \
+usbserial_ftdi \
+usbserial_pl2303 \
+usbserial_usbdebug \
+video_colors \
+"
+# Modules (and always loaded)
+grub_modules=" \
+acpi \
+ahci \
+at_keyboard \
+all_video \
+ata \
+bitmap \
+bitmap_scale \
+boot \
+bsd \
+btrfs \
+cat \
+cbfs \
+cbls \
+cbmemc \
+cbtime \
+chain \
+configfile \
+cpio \
+cpio_be \
+crc64 \
+crypto \
+cryptodisk \
+diskfilter \
+echo \
+xhci \
+ehci \
+eval \
+exfat \
+elf \
+ext2 \
+fat \
+f2fs \
+gcry_arcfour \
+gcry_blowfish \
+gcry_camellia \
+gcry_cast5 \
+gcry_crc \
+gcry_des \
+gcry_dsa \
+gcry_idea \
+gcry_md4 \
+gcry_md5 \
+gcry_rfc2268 \
+gcry_rijndael \
+gcry_rmd160 \
+gcry_rsa \
+gcry_seed \
+gcry_serpent \
+gcry_sha1 \
+gcry_sha256 \
+gcry_sha512 \
+gcry_tiger \
+gcry_twofish \
+gcry_whirlpool \
+geli \
+gfxmenu \
+gfxterm_background \
+gfxterm_menu \
+gzio \
+hashsum \
+halt \
+help \
+iorw \
+iso9660 \
+jpeg \
+json \
+keylayouts \
+keystatus \
+linux \
+linux16 \
+loadenv \
+loopback \
+ls \
+lsacpi \
+lsmmap \
+lspci \
+luks \
+luks2 \
+argon2 \
+lvm \
+lzopio \
+mdraid09 \
+mdraid09_be \
+mdraid1x \
+memdisk \
+memrw \
+minicmd \
+mmap \
+multiboot \
+multiboot2 \
+nativedisk \
+normal \
+ntfs \
+nvme \
+ohci \
+part_bsd \
+part_dfly \
+part_gpt \
+part_msdos \
+password \
+password_pbkdf2 \
+pata \
+pbkdf2 \
+pcidump \
+pgp \
+play \
+png \
+procfs \
+raid5rec \
+raid6rec \
+read \
+reboot \
+regexp \
+romfs \
+scsi \
+search \
+search_fs_file \
+search_fs_uuid \
+search_label \
+serial \
+syslinuxcfg \
+setjmp \
+setpci \
+spkmodem \
+squash4 \
+sleep \
+tar \
+test \
+true \
+uhci \
+udf \
+ufs1 \
+ufs1_be \
+ufs2 \
+usb \
+usb_keyboard \
+usbms \
+xfs \
+xzio \
+zfs \
+zfscrypt \
+zfsinfo \
+zstd \
+"
diff --git a/config/git/grub b/config/git/grub
index b52fa0fb..21634cd6 100644
--- a/config/git/grub
+++ b/config/git/grub
@@ -1,14 +1,6 @@
 {grub}{
-	rev: 8719cc2040368d43ab2de0b6e1b850b2c9cfc5b7
-	loc: grub
+	rev: HEAD
+	loc: grub/grub
 	url: git://git.savannah.gnu.org/grub.git
 	bkup_url: https://codeberg.org/libreboot/grub
-	depend: gnulib
-}
-
-{gnulib}{
-	rev: 9f48fb992a3d7e96610c4ce8be969cff2d61a01b
-	loc: grub/gnulib
-	url: git://git.sv.gnu.org/gnulib
-	bkup_url: https://codeberg.org/libreboot/gnulib
 }
diff --git a/config/grub/background/COPYING b/config/grub/background/COPYING
deleted file mode 100644
index 9a5f81c6..00000000
--- a/config/grub/background/COPYING
+++ /dev/null
@@ -1,3 +0,0 @@
-The deer logo for Libreboot is copyright 2014 Marcus Moeller and released under
-CC-0: https://creativecommons.org/publicdomain/zero/1.0/legalcode
-The grey backgrounds with it were made by Leah Rowe in 2016, also CC-0
diff --git a/config/grub/build.list b/config/grub/build.list
new file mode 100644
index 00000000..5b891e5a
--- /dev/null
+++ b/config/grub/build.list
@@ -0,0 +1 @@
+grub.elf
diff --git a/config/grub/config/AUTHORS b/config/grub/config/AUTHORS
deleted file mode 100644
index 542739ce..00000000
--- a/config/grub/config/AUTHORS
+++ /dev/null
@@ -1,2 +0,0 @@
-Copyright (C) 2014, 2015, 2016, 2020, 2021, 2023 Leah Rowe <leah@libreboot.org>
-Copyright (C) 2015 Klemens Nanni <contact@autoboot.org>
diff --git a/config/grub/config/COPYING b/config/grub/config/COPYING
deleted file mode 100644
index f74bc54d..00000000
--- a/config/grub/config/COPYING
+++ /dev/null
@@ -1,695 +0,0 @@
-# GRUB configuration files under resources/grub/config/
-
-#    This program is free software: you can redistribute it and/or modify
-#    it under the terms of the GNU General Public License as published by
-#    the Free Software Foundation, either version 3 of the License, or
-#    (at your option) any later version.
-#
-#    This program is distributed in the hope that it will be useful,
-#    but WITHOUT ANY WARRANTY; without even the implied warranty of
-#    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-#    GNU General Public License for more details.
-#
-#    You should have received a copy of the GNU General Public License
-#    along with this program.  If not, see <http://www.gnu.org/licenses/>.
-#
-
-# See AUTHORS for copyright holder information.
-
-# Full terms of GPLv3 below, taken from https://www.gnu.org/licenses/licenses.html
-________________________________________________________________________
-
-                    GNU GENERAL PUBLIC LICENSE
-                       Version 3, 29 June 2007
-
- Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
-                            Preamble
-
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-software and other kinds of works.
-
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diff --git a/config/grub/config/grub_memdisk.cfg b/config/grub/config/grub_memdisk.cfg
deleted file mode 100644
index 18d5d535..00000000
--- a/config/grub/config/grub_memdisk.cfg
+++ /dev/null
@@ -1,9 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-set prefix=(memdisk)/boot/grub
-
-if [ -f (cbfsdisk)/grub.cfg ]; then
-	source (cbfsdisk)/grub.cfg
-else
-	source (memdisk)/boot/grub/grub_default.cfg
-fi
diff --git a/config/grub/config/grub.cfg b/config/grub/default/config/payload
similarity index 95%
rename from config/grub/config/grub.cfg
rename to config/grub/default/config/payload
index 7adee869..f81d5930 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/default/config/payload
@@ -1,4 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
+# Copyright (C) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (C) 2015 Klemens Nanni <contact@autoboot.org>
 
 set prefix=(memdisk)/boot/grub
 
@@ -215,6 +217,14 @@ menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on ATA/IDE  [d]' --hotkey=
 menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on NVMe  [e]' --hotkey='e' {
 	search_bootcfg nvme
 }
+if [ -f (cbfsdisk)/grub.cfg ]; then
+menuentry 'Load configuration (grub.cfg) in CBFS  [t]' --hotkey='t' {
+	set root='(cbfsdisk)'
+	if [ -f /grub.cfg ]; then
+		configfile /grub.cfg
+	fi
+}
+fi
 if [ -f (cbfsdisk)/grubtest.cfg ]; then
 menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey='t' {
 	set root='(cbfsdisk)'
diff --git a/config/grub/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/default/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
similarity index 100%
rename from config/grub/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
rename to config/grub/default/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
diff --git a/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/default/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
similarity index 100%
rename from config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
rename to config/grub/default/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
diff --git a/config/grub/patches/0002-luks2/0003-Add-CC0-license.patch b/config/grub/default/patches/0002-luks2/0003-Add-CC0-license.patch
similarity index 100%
rename from config/grub/patches/0002-luks2/0003-Add-CC0-license.patch
rename to config/grub/default/patches/0002-luks2/0003-Add-CC0-license.patch
diff --git a/config/grub/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/default/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch
similarity index 100%
rename from config/grub/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch
rename to config/grub/default/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch
diff --git a/config/grub/patches/0002-luks2/0005-Add-Argon2-algorithm.patch b/config/grub/default/patches/0002-luks2/0005-Add-Argon2-algorithm.patch
similarity index 100%
rename from config/grub/patches/0002-luks2/0005-Add-Argon2-algorithm.patch
rename to config/grub/default/patches/0002-luks2/0005-Add-Argon2-algorithm.patch
diff --git a/config/grub/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/default/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch
similarity index 100%
rename from config/grub/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch
rename to config/grub/default/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch
diff --git a/config/grub/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch b/config/grub/default/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch
similarity index 100%
rename from config/grub/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch
rename to config/grub/default/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch
diff --git a/config/grub/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/default/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch
similarity index 100%
rename from config/grub/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch
rename to config/grub/default/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch
diff --git a/config/grub/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/default/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
similarity index 100%
rename from config/grub/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
rename to config/grub/default/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
diff --git a/config/grub/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/default/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
similarity index 100%
rename from config/grub/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
rename to config/grub/default/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
diff --git a/config/grub/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/default/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
similarity index 100%
rename from config/grub/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
rename to config/grub/default/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
diff --git a/config/grub/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch b/config/grub/default/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
similarity index 100%
rename from config/grub/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
rename to config/grub/default/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
diff --git a/config/grub/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch b/config/grub/default/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
similarity index 100%
rename from config/grub/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
rename to config/grub/default/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
diff --git a/config/grub/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/default/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
similarity index 100%
rename from config/grub/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
rename to config/grub/default/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
diff --git a/config/grub/default/target.cfg b/config/grub/default/target.cfg
new file mode 100644
index 00000000..fa5735e9
--- /dev/null
+++ b/config/grub/default/target.cfg
@@ -0,0 +1,5 @@
+tree="default"
+rev="8719cc2040368d43ab2de0b6e1b850b2c9cfc5b7"
+bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
+autoconfargs="--with-platform=coreboot --disable-werror"
+makeargs="FS_PAYLOAD_MODULES=\"\""
diff --git a/config/grub/xhci/config/payload b/config/grub/xhci/config/payload
new file mode 100644
index 00000000..0e16ecb6
--- /dev/null
+++ b/config/grub/xhci/config/payload
@@ -0,0 +1,290 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+# Copyright (C) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (C) 2015 Klemens Nanni <contact@autoboot.org>
+
+set prefix=(memdisk)/boot/grub
+
+insmod at_keyboard
+insmod usb_keyboard
+insmod nativedisk
+insmod xhci
+insmod ehci
+insmod ohci
+insmod uhci
+insmod usb
+insmod usbms
+insmod regexp
+
+terminal_input --append at_keyboard
+terminal_input --append usb_keyboard
+terminal_output --append cbmemc
+
+# User interface overrides wherever "keystatus" is supported
+# Keep SHIFT key pressed before powering on to disable graphics
+if keystatus --shift; then
+	terminal_output --append vga_text
+else
+	gfxpayload=keep
+	terminal_output --append gfxterm
+
+	if [ -f (cbfsdisk)/background.png ]; then
+		insmod png
+		background_image (cbfsdisk)/background.png
+	elif [ -f (cbfsdisk)/background.jpg ]; then
+		insmod jpeg
+		background_image (cbfsdisk)/background.jpg
+	fi
+fi
+
+# Keep CTRL pressed to enable default serial terminal (COM1 or the like)
+if keystatus --ctrl; then
+	serial
+	terminal_input --append serial
+	terminal_output --append serial
+fi
+
+# Keep ALT pressed to enable spkmodem
+if keystatus --alt; then
+	terminal_output --append spkmodem
+fi
+
+
+set default="0"
+if [ -f (cbfsdisk)/timeout.cfg ]; then
+	source (cbfsdisk)/timeout.cfg
+else	
+	set timeout=5
+fi
+set grub_scan_disk="nvme ahci ata"
+if [ -f (cbfsdisk)/scan.cfg ]; then
+	source (cbfsdisk)/scan.cfg
+fi
+
+if [ -f (cbfsdisk)/keymap.gkb ]; then
+	keymap (cbfsdisk)/keymap.gkb
+fi
+
+function really_try_user_config {
+	set root="${1}"
+
+	if [ -f /"${2}"/grub.cfg ]; then
+		unset superusers
+		configfile /"${2}"/grub.cfg
+	fi
+}
+
+function try_user_config {
+	# The @/... entries are for cases where the BTRFS filesystem is being used
+	for dir in grub boot/grub @/grub @/boot/grub grub2 boot/grub2 @/grub2 @/boot/grub2 boot @/boot; do
+		really_try_user_config "${1}" "${dir}"
+	done
+	for dir in ubuntu debian redhat; do
+		really_try_user_config "${1}" "EFI/${dir}"
+	done
+}
+function search_grub {
+	echo -n "Attempting to load grub.cfg from '${1}' devices"
+	for i in 0 1 2 3 4 5 6 7 8; do
+		for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
+			if [ "${1}" != "nvme" ]; then
+				try_user_config "(${1}${i},${part})"
+			else
+				# TODO: do we care about other namesapces
+				try_user_config "(nvme${i}n1,${part})"
+			fi
+		done
+		if [ "${1}" != "nvme" ]; then
+			# raw devices e.g. (ahci0) instead of (ahci0,1)
+			try_user_config "(${1}${i})"
+		else
+			# TODO: do we care about other namesapces
+			try_user_config "(nvme${i}n1)"
+		fi
+	done
+	echo # Insert newline
+}
+
+function try_isolinux_config {
+	set root="${1}"
+	for dir in '' /boot /EFI /@ /@/boot; do
+		if [ -f "${dir}"/isolinux/isolinux.cfg ]; then
+			syslinux_configfile -i "${dir}"/isolinux/isolinux.cfg
+		elif [ -f "${dir}"/syslinux/syslinux.cfg ]; then
+			syslinux_configfile -s "${dir}"/syslinux/syslinux.cfg
+		elif [ -f "${dir}"/syslinux/extlinux.conf ]; then
+			syslinux_configfile -s "${dir}"/syslinux/extlinux.conf
+		elif [ -f "${dir}"/extlinux/extlinux.conf ]; then
+			syslinux_configfile -s "${dir}"/extlinux/extlinux.conf
+		fi
+	done
+}
+function search_isolinux {
+	echo "\nAttempting to parse iso/sys/extlinux config from '${1}' devices"
+	for i in 0 1 2 3 4 5 6 7 8; do
+		for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
+			if [ "${1}" != "nvme" ]; then
+				try_isolinux_config "(${1}${i},${part})"
+			else
+				# TODO: see above
+				try_isolinux_config "(nvme${i}n1,${part})"
+			fi
+		done
+		if [ "${1}" != "nvme" ]; then
+			# raw devices e.g. (usb0) instead of (usb0,1)
+			try_isolinux_config "(${1}${i})"
+		else
+			# TODO: do we care about other namesapces
+			try_isolinux_config "(nvme${i}n1)"
+		fi
+	done
+	echo # Insert newline
+}
+function try_bootcfg {
+	try_user_config "${1}"
+	try_isolinux_config "${1}"
+}
+function search_bootcfg {
+	search_grub "${1}"
+	search_isolinux "${1}"
+}
+menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o' {
+
+	for grub_disk in ${grub_scan_disk}; do
+		search_bootcfg ${grub_disk}
+	done
+
+	# grub device enumeration is very slow, so checks are hardcoded
+
+	# TODO: add more strings, based on what distros set up when
+	# the user select auto-partitioning on those installers
+	lvmvol="lvm/grubcrypt-bootvol lvm/grubcrypt-rootvol"
+
+	raidvol="md/0 md/1 md/2 md/3 md/4 md/5 md/6 md/7 md/8 md/9"
+
+	# in practise, doing multiple redundant checks is perfectly fast and
+	# TODO: optimize grub itself, and use */? here for everything
+
+	for vol in ${lvmvol} ${raidvol} ; do
+		try_bootcfg "${vol}"
+	done
+
+	unset bootdev
+	for grub_disk in ${grub_scan_disk}; do
+		for i in 0 1 2 3 4 5 6 7 8; do
+			for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
+				if [ "${grub_disk}" = "ahci" ]; then
+					bootdev="${bootdev} (ahci${i},${part})"
+				elif [ "${grub_disk}" = "ata" ]; then
+					bootdev="${bootdev} (ata${i},${part})"
+				elif [ "${grub_disk}" = "nvme" ]; then
+					# TODO: do we care about other namesapces
+					bootdev="${bootdev} (nvme${i}n1,${part})"
+				fi
+			done
+		done
+	done
+
+	set pager=0
+	echo -n "Attempting to unlock encrypted volumes"
+	for dev in ${bootdev} ${lvmvol} ${raidvol}; do
+		if cryptomount "${dev}" ; then break ; fi
+	done
+	set pager=1
+	echo
+
+	# after cryptomount, lvm volumes might be available
+	for vol in ${lvmvol}; do
+		try_bootcfg "${vol}"
+	done
+
+	search_bootcfg crypto
+
+	for vol in lvm/* ; do
+		try_bootcfg "${vol}"
+	done
+
+	true # Prevent pager requiring to accept each line instead of whole screen
+}
+
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on USB  [s]' --hotkey='s' {
+	search_bootcfg usb
+}
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on AHCI  [a]' --hotkey='a' {
+	search_bootcfg ahci
+}
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on ATA/IDE  [d]' --hotkey='d' {
+	search_bootcfg ata
+}
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on NVMe  [e]' --hotkey='e' {
+	search_bootcfg nvme
+}
+if [ -f (cbfsdisk)/grub.cfg ]; then
+menuentry 'Load configuration (grub.cfg) in CBFS  [t]' --hotkey='t' {
+	set root='(cbfsdisk)'
+	if [ -f /grub.cfg ]; then
+		configfile /grub.cfg
+	fi
+}
+fi
+if [ -f (cbfsdisk)/grubtest.cfg ]; then
+menuentry 'Load test configuration (grubtest.cfg) in CBFS  [t]' --hotkey='t' {
+	set root='(cbfsdisk)'
+	if [ -f /grubtest.cfg ]; then
+		configfile /grubtest.cfg
+	fi
+}
+fi
+if [ -f (cbfsdisk)/seabios.elf ]; then
+menuentry 'Load SeaBIOS (payload) [b]' --hotkey='b' {
+	set root='cbfsdisk'
+	chainloader /seabios.elf
+}
+fi
+if [ -f (cbfsdisk)/img/grub2 ]; then
+menuentry 'Return to SeaBIOS [b]' --hotkey='b' {
+	set root='cbfsdisk'
+	chainloader /fallback/payload
+}
+fi
+menuentry 'Poweroff  [p]' --hotkey='p' {
+	halt
+}
+menuentry 'Reboot  [r]' --hotkey='r' {
+	reboot
+}
+if [ -f (cbfsdisk)/img/memtest ]; then
+menuentry 'Load MemTest86+  [m]' --hotkey='m' {
+	set root='cbfsdisk'
+	chainloader /img/memtest
+}
+fi
+
+submenu 'Other  [z]' --hotkey='z' {
+	menuentry 'Enable default serial terminal  [s]' --hotkey='s'  {
+		serial
+		terminal_input --append serial
+		terminal_output --append serial
+	}
+
+	menuentry 'Disable default serial terminal' {
+		terminal_input --remove serial
+		terminal_output --remove serial
+	}
+
+	menuentry 'Enable gfxterm' {
+		terminal_output --append gfxterm
+		terminal_output --remove vga_text
+	}
+	menuentry 'Disable gfxterm  [g]' --hotkey='g'  {
+		terminal_output --remove gfxterm
+		terminal_output --append vga_text
+	}
+
+	menuentry 'Enable spkmodem  [a]' --hotkey='a' {
+		terminal_output --append spkmodem
+	}
+
+	menuentry 'Disable spkmodem  [z]' --hotkey='z' {
+		terminal_output --remove spkmodem
+	}
+}
diff --git a/config/grub/xhci/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/xhci/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
new file mode 100644
index 00000000..183f5a91
--- /dev/null
+++ b/config/grub/xhci/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -0,0 +1,90 @@
+From ce13539fe2103abbd991814d995e06cf96e485f7 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 31 Oct 2021 03:47:05 +0000
+Subject: [PATCH 1/3] mitigate grub's missing characters for borders/arrow
+ characters
+
+This cleans up the display on the main screen in GRUB.
+
+Just don't draw a border, at all.
+---
+ grub-core/normal/menu_text.c | 49 ++----------------------------------
+ 1 file changed, 2 insertions(+), 47 deletions(-)
+
+diff --git a/grub-core/normal/menu_text.c b/grub-core/normal/menu_text.c
+index b1321eb26..e76094dfd 100644
+--- a/grub-core/normal/menu_text.c
++++ b/grub-core/normal/menu_text.c
+@@ -108,47 +108,6 @@ grub_print_message_indented (const char *msg, int margin_left, int margin_right,
+   grub_print_message_indented_real (msg, margin_left, margin_right, term, 0);
+ }
+ 
+-static void
+-draw_border (struct grub_term_output *term, const struct grub_term_screen_geometry *geo)
+-{
+-  int i;
+-
+-  grub_term_setcolorstate (term, GRUB_TERM_COLOR_NORMAL);
+-
+-  grub_term_gotoxy (term, (struct grub_term_coordinate) { geo->first_entry_x - 1,
+-	geo->first_entry_y - 1 });
+-  grub_putcode (GRUB_UNICODE_CORNER_UL, term);
+-  for (i = 0; i < geo->entry_width + 1; i++)
+-    grub_putcode (GRUB_UNICODE_HLINE, term);
+-  grub_putcode (GRUB_UNICODE_CORNER_UR, term);
+-
+-  for (i = 0; i < geo->num_entries; i++)
+-    {
+-      grub_term_gotoxy (term, (struct grub_term_coordinate) { geo->first_entry_x - 1,
+-	    geo->first_entry_y + i });
+-      grub_putcode (GRUB_UNICODE_VLINE, term);
+-      grub_term_gotoxy (term,
+-			(struct grub_term_coordinate) { geo->first_entry_x + geo->entry_width + 1,
+-			    geo->first_entry_y + i });
+-      grub_putcode (GRUB_UNICODE_VLINE, term);
+-    }
+-
+-  grub_term_gotoxy (term,
+-		    (struct grub_term_coordinate) { geo->first_entry_x - 1,
+-			geo->first_entry_y - 1 + geo->num_entries + 1 });
+-  grub_putcode (GRUB_UNICODE_CORNER_LL, term);
+-  for (i = 0; i < geo->entry_width + 1; i++)
+-    grub_putcode (GRUB_UNICODE_HLINE, term);
+-  grub_putcode (GRUB_UNICODE_CORNER_LR, term);
+-
+-  grub_term_setcolorstate (term, GRUB_TERM_COLOR_NORMAL);
+-
+-  grub_term_gotoxy (term,
+-		    (struct grub_term_coordinate) { geo->first_entry_x - 1,
+-			(geo->first_entry_y - 1 + geo->num_entries
+-			 + GRUB_TERM_MARGIN + 1) });
+-}
+-
+ static int
+ print_message (int nested, int edit, struct grub_term_output *term, int dry_run)
+ {
+@@ -167,10 +126,8 @@ command-line or ESC to discard edits and return to the GRUB menu."),
+     {
+       char *msg_translated;
+ 
+-      msg_translated = grub_xasprintf (_("Use the %C and %C keys to select which "
+-					 "entry is highlighted."),
+-				       GRUB_UNICODE_UPARROW,
+-				       GRUB_UNICODE_DOWNARROW);
++      msg_translated = grub_xasprintf (_("Use the arrow keys to select which "
++					 "entry is highlighted."));
+       if (!msg_translated)
+ 	return 0;
+       ret += grub_print_message_indented_real (msg_translated, STANDARD_MARGIN,
+@@ -410,8 +367,6 @@ grub_menu_init_page (int nested, int edit,
+ 
+   grub_term_normal_color = grub_color_menu_normal;
+   grub_term_highlight_color = grub_color_menu_highlight;
+-  if (geo->border)
+-    draw_border (term, geo);
+   grub_term_normal_color = old_color_normal;
+   grub_term_highlight_color = old_color_highlight;
+   geo->timeout_y = geo->first_entry_y + geo->num_entries
+-- 
+2.25.1
+
diff --git a/config/grub/xhci/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/xhci/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
new file mode 100644
index 00000000..6ff97979
--- /dev/null
+++ b/config/grub/xhci/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -0,0 +1,25 @@
+From 70f9e72c3ff6381fe3519612de3b649c0cf26b9a Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sat, 19 Nov 2022 16:30:24 +0000
+Subject: [PATCH 2/3] say the name libreboot, in the grub menu
+
+---
+ grub-core/normal/main.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c
+index bd4431000..31308e16a 100644
+--- a/grub-core/normal/main.c
++++ b/grub-core/normal/main.c
+@@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term,
+ 
+   grub_term_cls (term);
+ 
+-  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
++  msg_formatted = grub_xasprintf (_("Libreboot 20240504 release, based on coreboot.    https://libreboot.org/"));
+   if (!msg_formatted)
+     return;
+ 
+-- 
+2.25.1
+
diff --git a/config/grub/xhci/patches/0002-luks2/0003-Add-CC0-license.patch b/config/grub/xhci/patches/0002-luks2/0003-Add-CC0-license.patch
new file mode 100644
index 00000000..dc9060c3
--- /dev/null
+++ b/config/grub/xhci/patches/0002-luks2/0003-Add-CC0-license.patch
@@ -0,0 +1,42 @@
+From de6e7cc62522ce1be21bd2f06e7c15cd234b5426 Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 1/6] Add CC0 license
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ grub-core/kern/dl.c           | 3 ++-
+ util/grub-module-verifierXX.c | 3 ++-
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
+index 0bf40caa6..4011e2d15 100644
+--- a/grub-core/kern/dl.c
++++ b/grub-core/kern/dl.c
+@@ -470,7 +470,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e)
+ 
+   if (grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3") == 0
+       || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3+") == 0
+-      || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv2+") == 0)
++      || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv2+") == 0
++      || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=CC0") == 0)
+     return GRUB_ERR_NONE;
+ 
+   return grub_error (GRUB_ERR_BAD_MODULE,
+diff --git a/util/grub-module-verifierXX.c b/util/grub-module-verifierXX.c
+index a42c20bd1..7157a30aa 100644
+--- a/util/grub-module-verifierXX.c
++++ b/util/grub-module-verifierXX.c
+@@ -236,7 +236,8 @@ check_license (const char * const filename,
+   Elf_Shdr *s = find_section (arch, e, ".module_license", module_size);
+   if (s && (strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=GPLv3") == 0
+ 	    || strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=GPLv3+") == 0
+-	    || strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=GPLv2+") == 0))
++	    || strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=GPLv2+") == 0
++	    || strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=CC0") == 0))
+     return;
+   grub_util_error ("%s: incompatible license", filename);
+ }
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/xhci/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch
new file mode 100644
index 00000000..be875e67
--- /dev/null
+++ b/config/grub/xhci/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch
@@ -0,0 +1,39 @@
+From 9edaaffac91d593a439e44bac3b6f5558f5a8245 Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 2/6] Define GRUB_UINT32_MAX
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ include/grub/types.h | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/include/grub/types.h b/include/grub/types.h
+index 0d96006fe..a13f3a60b 100644
+--- a/include/grub/types.h
++++ b/include/grub/types.h
+@@ -156,6 +156,7 @@ typedef grub_int32_t	grub_ssize_t;
+ #define GRUB_SHRT_MAX 0x7fff
+ #define GRUB_SHRT_MIN (-GRUB_SHRT_MAX - 1)
+ #define GRUB_UINT_MAX 4294967295U
++#define GRUB_UINT32_MAX 4294967295U
+ #define GRUB_INT_MAX 0x7fffffff
+ #define GRUB_INT_MIN (-GRUB_INT_MAX - 1)
+ #define GRUB_INT32_MAX 2147483647
+@@ -177,6 +178,13 @@ typedef grub_int32_t	grub_ssize_t;
+ #define GRUB_TYPE_U_MAX(type) ((unsigned long long)((typeof (type))(~0)))
+ #define GRUB_TYPE_U_MIN(type) 0ULL
+ 
++# define GRUB_UINT32_C(x) x ## U
++# if GRUB_ULONG_MAX >> 31 >> 31 >> 1 == 1
++#  define GRUB_UINT64_C(x) x##UL
++# elif 1
++#  define GRUB_UINT64_C(x) x##ULL
++# endif
++
+ typedef grub_uint64_t grub_properly_aligned_t;
+ 
+ #define GRUB_PROPERLY_ALIGNED_ARRAY(name, size) grub_properly_aligned_t name[((size) + sizeof (grub_properly_aligned_t) - 1) / sizeof (grub_properly_aligned_t)]
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0002-luks2/0005-Add-Argon2-algorithm.patch b/config/grub/xhci/patches/0002-luks2/0005-Add-Argon2-algorithm.patch
new file mode 100644
index 00000000..1c6b4f04
--- /dev/null
+++ b/config/grub/xhci/patches/0002-luks2/0005-Add-Argon2-algorithm.patch
@@ -0,0 +1,2611 @@
+From 5b63da5c4267933f573ca37ce39a073098c443ba Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 3/6] Add Argon2 algorithm
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ docs/grub-dev.texi                            |  64 +++
+ grub-core/Makefile.core.def                   |   8 +
+ grub-core/lib/argon2/LICENSE                  | 314 +++++++++++
+ grub-core/lib/argon2/argon2.c                 | 232 ++++++++
+ grub-core/lib/argon2/argon2.h                 | 264 +++++++++
+ grub-core/lib/argon2/blake2/blake2-impl.h     | 151 ++++++
+ grub-core/lib/argon2/blake2/blake2.h          |  89 +++
+ grub-core/lib/argon2/blake2/blake2b.c         | 388 ++++++++++++++
+ .../lib/argon2/blake2/blamka-round-ref.h      |  56 ++
+ grub-core/lib/argon2/core.c                   | 506 ++++++++++++++++++
+ grub-core/lib/argon2/core.h                   | 228 ++++++++
+ grub-core/lib/argon2/ref.c                    | 190 +++++++
+ 12 files changed, 2490 insertions(+)
+ create mode 100644 grub-core/lib/argon2/LICENSE
+ create mode 100644 grub-core/lib/argon2/argon2.c
+ create mode 100644 grub-core/lib/argon2/argon2.h
+ create mode 100644 grub-core/lib/argon2/blake2/blake2-impl.h
+ create mode 100644 grub-core/lib/argon2/blake2/blake2.h
+ create mode 100644 grub-core/lib/argon2/blake2/blake2b.c
+ create mode 100644 grub-core/lib/argon2/blake2/blamka-round-ref.h
+ create mode 100644 grub-core/lib/argon2/core.c
+ create mode 100644 grub-core/lib/argon2/core.h
+ create mode 100644 grub-core/lib/argon2/ref.c
+
+diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi
+index a695b02f0..313335a53 100644
+--- a/docs/grub-dev.texi
++++ b/docs/grub-dev.texi
+@@ -503,11 +503,75 @@ GRUB includes some code from other projects, and it is sometimes necessary
+ to update it.
+ 
+ @menu
++* Argon2::
+ * Gnulib::
+ * jsmn::
+ * minilzo::
+ @end menu
+ 
++@node Argon2
++@section Argon2
++
++Argon2 is a key derivation function used by LUKS2 in order to derive encryption
++keys from a user-provided password. GRUB imports the official reference
++implementation of Argon2 from @url{https://github.com/P-H-C/phc-winner-argon2}.
++In order to make the library usable for GRUB, we need to perform various
++conversions. This is mainly due to the fact that the imported code makes use of
++types and functions defined in the C standard library, which isn't available.
++Furthermore, using the POSIX wrapper library is not possible as the code needs
++to be part of the kernel.
++
++Updating the code can thus be performed like following:
++
++@example
++$ git clone https://github.com/P-H-C/phc-winner-argon2 argon2
++$ cp argon2/include/argon2.h argon2/src/@{argon2.c,core.c,core.h,ref.c@} \
++    grub-core/lib/argon2/
++$ cp argon2/src/blake2/@{blake2-impl.h,blake2.h,blake2b.c,blamka-round-ref.h@} \
++    grub-core/lib/argon2/blake2/
++$ sed -e 's/UINT32_C/GRUB_UINT32_C/g' \
++      -e 's/UINT64_C/GRUB_UINT64_C/g' \
++      -e 's/UINT32_MAX/GRUB_UINT32_MAX/g' \
++      -e 's/CHAR_BIT/GRUB_CHAR_BIT/g' \
++      -e 's/UINT_MAX/GRUB_UINT_MAX/g' \
++      -e 's/uintptr_t/grub_addr_t/g' \
++      -e 's/size_t/grub_size_t/g' \
++      -e 's/uint32_t/grub_uint32_t/g' \
++      -e 's/uint64_t/grub_uint64_t/g' \
++      -e 's/uint8_t/grub_uint8_t/g' \
++      -e 's/memset/grub_memset/g' \
++      -e 's/memcpy/grub_memcpy/g' \
++      -e 's/malloc/grub_malloc/g' \
++      -e 's/free/grub_free/g' \
++      -e 's/#elif _MSC_VER/#elif defined(_MSC_VER)/' \
++      grub-core/lib/argon2/@{*,blake2/*@}.@{c,h@} -i
++@end example
++
++Afterwards, you need to perform the following manual steps:
++
++@enumerate
++@item Remove all includes of standard library headers, "encoding.h" and
++      "thread.h".
++@item Add includes <grub/mm.h> and <grub/misc.h> to "argon2.h".
++@item Add include <grub/dl.h> and module license declaration to "argon2.c".
++@item Remove the following declarations and functions from "argon2.h" and
++     "argon2.c": argon2_type2string, argon2i_hash_encoded, argon2i_hash_raw,
++     argon2d_hash_encoded, argon2d_hash_raw, argon2id_hash_encoded,
++     argon2id_hash_raw, argon2_compare, argon2_verify, argon2i_verify,
++     argon2d_verify, argon2id_verify, argon2d_ctx, argon2i_ctx, argon2id_ctx,
++     argon2_verify_ctx, argon2d_verify_ctx, argon2i_verify_ctx,
++     argon2id_verify_ctx, argon2_encodedlen.
++@item Move the declaration of `clear_internal_memory()` in "blake2-impl.h" to
++      "blake2b.c".
++@item Remove code guarded by the ARGON2_NO_THREADS macro.
++@item Remove parameters `encoded` and `encodedlen` from `argon2_hash` and remove
++      the encoding block in that function.
++@item Remove parameter verifications in `validate_inputs()` for
++      ARGON2_MIN_PWD_LENGTH, ARGON2_MIN_SECRET, ARGON2_MIN_AD_LENGTH and
++      ARGON2_MAX_MEMORY to fix compiler warnings.
++@item Mark the function argon2_ctx as static.
++@end enumerate
++
+ @node Gnulib
+ @section Gnulib
+ 
+diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
+index d2cf29584..4a06789e5 100644
+--- a/grub-core/Makefile.core.def
++++ b/grub-core/Makefile.core.def
+@@ -1215,6 +1215,14 @@ module = {
+   common = lib/json/json.c;
+ };
+ 
++module = {
++  name = argon2;
++  common = lib/argon2/argon2.c;
++  common = lib/argon2/core.c;
++  common = lib/argon2/ref.c;
++  common = lib/argon2/blake2/blake2b.c;
++};
++
+ module = {
+   name = afsplitter;
+   common = disk/AFSplitter.c;
+diff --git a/grub-core/lib/argon2/LICENSE b/grub-core/lib/argon2/LICENSE
+new file mode 100644
+index 000000000..97aae2925
+--- /dev/null
++++ b/grub-core/lib/argon2/LICENSE
+@@ -0,0 +1,314 @@
++Argon2 reference source code package - reference C implementations
++
++Copyright 2015
++Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++
++You may use this work under the terms of a Creative Commons CC0 1.0
++License/Waiver or the Apache Public License 2.0, at your option. The terms of
++these licenses can be found at:
++
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++- Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++
++The terms of the licenses are reproduced below.
++
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+diff --git a/grub-core/lib/argon2/argon2.c b/grub-core/lib/argon2/argon2.c
+new file mode 100644
+index 000000000..49532fe80
+--- /dev/null
++++ b/grub-core/lib/argon2/argon2.c
+@@ -0,0 +1,232 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#include <grub/dl.h>
++
++#include "argon2.h"
++#include "core.h"
++
++GRUB_MOD_LICENSE ("CC0");
++
++static int argon2_ctx(argon2_context *context, argon2_type type) {
++    /* 1. Validate all inputs */
++    int result = validate_inputs(context);
++    grub_uint32_t memory_blocks, segment_length;
++    argon2_instance_t instance;
++
++    if (ARGON2_OK != result) {
++        return result;
++    }
++
++    if (Argon2_d != type && Argon2_i != type && Argon2_id != type) {
++        return ARGON2_INCORRECT_TYPE;
++    }
++
++    /* 2. Align memory size */
++    /* Minimum memory_blocks = 8L blocks, where L is the number of lanes */
++    memory_blocks = context->m_cost;
++
++    if (memory_blocks < 2 * ARGON2_SYNC_POINTS * context->lanes) {
++        memory_blocks = 2 * ARGON2_SYNC_POINTS * context->lanes;
++    }
++
++    segment_length = memory_blocks / (context->lanes * ARGON2_SYNC_POINTS);
++    /* Ensure that all segments have equal length */
++    memory_blocks = segment_length * (context->lanes * ARGON2_SYNC_POINTS);
++
++    instance.version = context->version;
++    instance.memory = NULL;
++    instance.passes = context->t_cost;
++    instance.memory_blocks = memory_blocks;
++    instance.segment_length = segment_length;
++    instance.lane_length = segment_length * ARGON2_SYNC_POINTS;
++    instance.lanes = context->lanes;
++    instance.threads = context->threads;
++    instance.type = type;
++
++    if (instance.threads > instance.lanes) {
++        instance.threads = instance.lanes;
++    }
++
++    /* 3. Initialization: Hashing inputs, allocating memory, filling first
++     * blocks
++     */
++    result = initialize(&instance, context);
++
++    if (ARGON2_OK != result) {
++        return result;
++    }
++
++    /* 4. Filling memory */
++    result = fill_memory_blocks(&instance);
++
++    if (ARGON2_OK != result) {
++        return result;
++    }
++    /* 5. Finalization */
++    finalize(context, &instance);
++
++    return ARGON2_OK;
++}
++
++int argon2_hash(const grub_uint32_t t_cost, const grub_uint32_t m_cost,
++                const grub_uint32_t parallelism, const void *pwd,
++                const grub_size_t pwdlen, const void *salt, const grub_size_t saltlen,
++                void *hash, const grub_size_t hashlen, argon2_type type,
++                const grub_uint32_t version){
++
++    argon2_context context;
++    int result;
++    grub_uint8_t *out;
++
++    if (pwdlen > ARGON2_MAX_PWD_LENGTH) {
++        return ARGON2_PWD_TOO_LONG;
++    }
++
++    if (saltlen > ARGON2_MAX_SALT_LENGTH) {
++        return ARGON2_SALT_TOO_LONG;
++    }
++
++    if (hashlen > ARGON2_MAX_OUTLEN) {
++        return ARGON2_OUTPUT_TOO_LONG;
++    }
++
++    if (hashlen < ARGON2_MIN_OUTLEN) {
++        return ARGON2_OUTPUT_TOO_SHORT;
++    }
++
++    out = grub_malloc(hashlen);
++    if (!out) {
++        return ARGON2_MEMORY_ALLOCATION_ERROR;
++    }
++
++    context.out = (grub_uint8_t *)out;
++    context.outlen = (grub_uint32_t)hashlen;
++    context.pwd = CONST_CAST(grub_uint8_t *)pwd;
++    context.pwdlen = (grub_uint32_t)pwdlen;
++    context.salt = CONST_CAST(grub_uint8_t *)salt;
++    context.saltlen = (grub_uint32_t)saltlen;
++    context.secret = NULL;
++    context.secretlen = 0;
++    context.ad = NULL;
++    context.adlen = 0;
++    context.t_cost = t_cost;
++    context.m_cost = m_cost;
++    context.lanes = parallelism;
++    context.threads = parallelism;
++    context.allocate_cbk = NULL;
++    context.grub_free_cbk = NULL;
++    context.flags = ARGON2_DEFAULT_FLAGS;
++    context.version = version;
++
++    result = argon2_ctx(&context, type);
++
++    if (result != ARGON2_OK) {
++        clear_internal_memory(out, hashlen);
++        grub_free(out);
++        return result;
++    }
++
++    /* if raw hash requested, write it */
++    if (hash) {
++        grub_memcpy(hash, out, hashlen);
++    }
++
++    clear_internal_memory(out, hashlen);
++    grub_free(out);
++
++    return ARGON2_OK;
++}
++
++const char *argon2_error_message(int error_code) {
++    switch (error_code) {
++    case ARGON2_OK:
++        return "OK";
++    case ARGON2_OUTPUT_PTR_NULL:
++        return "Output pointer is NULL";
++    case ARGON2_OUTPUT_TOO_SHORT:
++        return "Output is too short";
++    case ARGON2_OUTPUT_TOO_LONG:
++        return "Output is too long";
++    case ARGON2_PWD_TOO_SHORT:
++        return "Password is too short";
++    case ARGON2_PWD_TOO_LONG:
++        return "Password is too long";
++    case ARGON2_SALT_TOO_SHORT:
++        return "Salt is too short";
++    case ARGON2_SALT_TOO_LONG:
++        return "Salt is too long";
++    case ARGON2_AD_TOO_SHORT:
++        return "Associated data is too short";
++    case ARGON2_AD_TOO_LONG:
++        return "Associated data is too long";
++    case ARGON2_SECRET_TOO_SHORT:
++        return "Secret is too short";
++    case ARGON2_SECRET_TOO_LONG:
++        return "Secret is too long";
++    case ARGON2_TIME_TOO_SMALL:
++        return "Time cost is too small";
++    case ARGON2_TIME_TOO_LARGE:
++        return "Time cost is too large";
++    case ARGON2_MEMORY_TOO_LITTLE:
++        return "Memory cost is too small";
++    case ARGON2_MEMORY_TOO_MUCH:
++        return "Memory cost is too large";
++    case ARGON2_LANES_TOO_FEW:
++        return "Too few lanes";
++    case ARGON2_LANES_TOO_MANY:
++        return "Too many lanes";
++    case ARGON2_PWD_PTR_MISMATCH:
++        return "Password pointer is NULL, but password length is not 0";
++    case ARGON2_SALT_PTR_MISMATCH:
++        return "Salt pointer is NULL, but salt length is not 0";
++    case ARGON2_SECRET_PTR_MISMATCH:
++        return "Secret pointer is NULL, but secret length is not 0";
++    case ARGON2_AD_PTR_MISMATCH:
++        return "Associated data pointer is NULL, but ad length is not 0";
++    case ARGON2_MEMORY_ALLOCATION_ERROR:
++        return "Memory allocation error";
++    case ARGON2_FREE_MEMORY_CBK_NULL:
++        return "The grub_free memory callback is NULL";
++    case ARGON2_ALLOCATE_MEMORY_CBK_NULL:
++        return "The allocate memory callback is NULL";
++    case ARGON2_INCORRECT_PARAMETER:
++        return "Argon2_Context context is NULL";
++    case ARGON2_INCORRECT_TYPE:
++        return "There is no such version of Argon2";
++    case ARGON2_OUT_PTR_MISMATCH:
++        return "Output pointer mismatch";
++    case ARGON2_THREADS_TOO_FEW:
++        return "Not enough threads";
++    case ARGON2_THREADS_TOO_MANY:
++        return "Too many threads";
++    case ARGON2_MISSING_ARGS:
++        return "Missing arguments";
++    case ARGON2_ENCODING_FAIL:
++        return "Encoding failed";
++    case ARGON2_DECODING_FAIL:
++        return "Decoding failed";
++    case ARGON2_THREAD_FAIL:
++        return "Threading failure";
++    case ARGON2_DECODING_LENGTH_FAIL:
++        return "Some of encoded parameters are too long or too short";
++    case ARGON2_VERIFY_MISMATCH:
++        return "The password does not match the supplied hash";
++    default:
++        return "Unknown error code";
++    }
++}
+diff --git a/grub-core/lib/argon2/argon2.h b/grub-core/lib/argon2/argon2.h
+new file mode 100644
+index 000000000..129f7efbd
+--- /dev/null
++++ b/grub-core/lib/argon2/argon2.h
+@@ -0,0 +1,264 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef ARGON2_H
++#define ARGON2_H
++
++#include <grub/misc.h>
++#include <grub/mm.h>
++
++#if defined(__cplusplus)
++extern "C" {
++#endif
++
++/* Symbols visibility control */
++#ifdef A2_VISCTL
++#define ARGON2_PUBLIC __attribute__((visibility("default")))
++#define ARGON2_LOCAL __attribute__ ((visibility ("hidden")))
++#elif defined(_MSC_VER)
++#define ARGON2_PUBLIC __declspec(dllexport)
++#define ARGON2_LOCAL
++#else
++#define ARGON2_PUBLIC
++#define ARGON2_LOCAL
++#endif
++
++/*
++ * Argon2 input parameter restrictions
++ */
++
++/* Minimum and maximum number of lanes (degree of parallelism) */
++#define ARGON2_MIN_LANES GRUB_UINT32_C(1)
++#define ARGON2_MAX_LANES GRUB_UINT32_C(0xFFFFFF)
++
++/* Minimum and maximum number of threads */
++#define ARGON2_MIN_THREADS GRUB_UINT32_C(1)
++#define ARGON2_MAX_THREADS GRUB_UINT32_C(0xFFFFFF)
++
++/* Number of synchronization points between lanes per pass */
++#define ARGON2_SYNC_POINTS GRUB_UINT32_C(4)
++
++/* Minimum and maximum digest size in bytes */
++#define ARGON2_MIN_OUTLEN GRUB_UINT32_C(4)
++#define ARGON2_MAX_OUTLEN GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum number of memory blocks (each of BLOCK_SIZE bytes) */
++#define ARGON2_MIN_MEMORY (2 * ARGON2_SYNC_POINTS) /* 2 blocks per slice */
++
++#define ARGON2_MIN(a, b) ((a) < (b) ? (a) : (b))
++/* Max memory size is addressing-space/2, topping at 2^32 blocks (4 TB) */
++#define ARGON2_MAX_MEMORY_BITS                                                 \
++    ARGON2_MIN(GRUB_UINT32_C(32), (sizeof(void *) * GRUB_CHAR_BIT - 10 - 1))
++#define ARGON2_MAX_MEMORY                                                      \
++    ARGON2_MIN(GRUB_UINT32_C(0xFFFFFFFF), GRUB_UINT64_C(1) << ARGON2_MAX_MEMORY_BITS)
++
++/* Minimum and maximum number of passes */
++#define ARGON2_MIN_TIME GRUB_UINT32_C(1)
++#define ARGON2_MAX_TIME GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum password length in bytes */
++#define ARGON2_MIN_PWD_LENGTH GRUB_UINT32_C(0)
++#define ARGON2_MAX_PWD_LENGTH GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum associated data length in bytes */
++#define ARGON2_MIN_AD_LENGTH GRUB_UINT32_C(0)
++#define ARGON2_MAX_AD_LENGTH GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum salt length in bytes */
++#define ARGON2_MIN_SALT_LENGTH GRUB_UINT32_C(8)
++#define ARGON2_MAX_SALT_LENGTH GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum key length in bytes */
++#define ARGON2_MIN_SECRET GRUB_UINT32_C(0)
++#define ARGON2_MAX_SECRET GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Flags to determine which fields are securely wiped (default = no wipe). */
++#define ARGON2_DEFAULT_FLAGS GRUB_UINT32_C(0)
++#define ARGON2_FLAG_CLEAR_PASSWORD (GRUB_UINT32_C(1) << 0)
++#define ARGON2_FLAG_CLEAR_SECRET (GRUB_UINT32_C(1) << 1)
++
++/* Global flag to determine if we are wiping internal memory buffers. This flag
++ * is defined in core.c and defaults to 1 (wipe internal memory). */
++extern int FLAG_clear_internal_memory;
++
++/* Error codes */
++typedef enum Argon2_ErrorCodes {
++    ARGON2_OK = 0,
++
++    ARGON2_OUTPUT_PTR_NULL = -1,
++
++    ARGON2_OUTPUT_TOO_SHORT = -2,
++    ARGON2_OUTPUT_TOO_LONG = -3,
++
++    ARGON2_PWD_TOO_SHORT = -4,
++    ARGON2_PWD_TOO_LONG = -5,
++
++    ARGON2_SALT_TOO_SHORT = -6,
++    ARGON2_SALT_TOO_LONG = -7,
++
++    ARGON2_AD_TOO_SHORT = -8,
++    ARGON2_AD_TOO_LONG = -9,
++
++    ARGON2_SECRET_TOO_SHORT = -10,
++    ARGON2_SECRET_TOO_LONG = -11,
++
++    ARGON2_TIME_TOO_SMALL = -12,
++    ARGON2_TIME_TOO_LARGE = -13,
++
++    ARGON2_MEMORY_TOO_LITTLE = -14,
++    ARGON2_MEMORY_TOO_MUCH = -15,
++
++    ARGON2_LANES_TOO_FEW = -16,
++    ARGON2_LANES_TOO_MANY = -17,
++
++    ARGON2_PWD_PTR_MISMATCH = -18,    /* NULL ptr with non-zero length */
++    ARGON2_SALT_PTR_MISMATCH = -19,   /* NULL ptr with non-zero length */
++    ARGON2_SECRET_PTR_MISMATCH = -20, /* NULL ptr with non-zero length */
++    ARGON2_AD_PTR_MISMATCH = -21,     /* NULL ptr with non-zero length */
++
++    ARGON2_MEMORY_ALLOCATION_ERROR = -22,
++
++    ARGON2_FREE_MEMORY_CBK_NULL = -23,
++    ARGON2_ALLOCATE_MEMORY_CBK_NULL = -24,
++
++    ARGON2_INCORRECT_PARAMETER = -25,
++    ARGON2_INCORRECT_TYPE = -26,
++
++    ARGON2_OUT_PTR_MISMATCH = -27,
++
++    ARGON2_THREADS_TOO_FEW = -28,
++    ARGON2_THREADS_TOO_MANY = -29,
++
++    ARGON2_MISSING_ARGS = -30,
++
++    ARGON2_ENCODING_FAIL = -31,
++
++    ARGON2_DECODING_FAIL = -32,
++
++    ARGON2_THREAD_FAIL = -33,
++
++    ARGON2_DECODING_LENGTH_FAIL = -34,
++
++    ARGON2_VERIFY_MISMATCH = -35
++} argon2_error_codes;
++
++/* Memory allocator types --- for external allocation */
++typedef int (*allocate_fptr)(grub_uint8_t **memory, grub_size_t bytes_to_allocate);
++typedef void (*deallocate_fptr)(grub_uint8_t *memory, grub_size_t bytes_to_allocate);
++
++/* Argon2 external data structures */
++
++/*
++ *****
++ * Context: structure to hold Argon2 inputs:
++ *  output array and its length,
++ *  password and its length,
++ *  salt and its length,
++ *  secret and its length,
++ *  associated data and its length,
++ *  number of passes, amount of used memory (in KBytes, can be rounded up a bit)
++ *  number of parallel threads that will be run.
++ * All the parameters above affect the output hash value.
++ * Additionally, two function pointers can be provided to allocate and
++ * deallocate the memory (if NULL, memory will be allocated internally).
++ * Also, three flags indicate whether to erase password, secret as soon as they
++ * are pre-hashed (and thus not needed anymore), and the entire memory
++ *****
++ * Simplest situation: you have output array out[8], password is stored in
++ * pwd[32], salt is stored in salt[16], you do not have keys nor associated
++ * data. You need to spend 1 GB of RAM and you run 5 passes of Argon2d with
++ * 4 parallel lanes.
++ * You want to erase the password, but you're OK with last pass not being
++ * erased. You want to use the default memory allocator.
++ * Then you initialize:
++ Argon2_Context(out,8,pwd,32,salt,16,NULL,0,NULL,0,5,1<<20,4,4,NULL,NULL,true,false,false,false)
++ */
++typedef struct Argon2_Context {
++    grub_uint8_t *out;    /* output array */
++    grub_uint32_t outlen; /* digest length */
++
++    grub_uint8_t *pwd;    /* password array */
++    grub_uint32_t pwdlen; /* password length */
++
++    grub_uint8_t *salt;    /* salt array */
++    grub_uint32_t saltlen; /* salt length */
++
++    grub_uint8_t *secret;    /* key array */
++    grub_uint32_t secretlen; /* key length */
++
++    grub_uint8_t *ad;    /* associated data array */
++    grub_uint32_t adlen; /* associated data length */
++
++    grub_uint32_t t_cost;  /* number of passes */
++    grub_uint32_t m_cost;  /* amount of memory requested (KB) */
++    grub_uint32_t lanes;   /* number of lanes */
++    grub_uint32_t threads; /* maximum number of threads */
++
++    grub_uint32_t version; /* version number */
++
++    allocate_fptr allocate_cbk; /* pointer to memory allocator */
++    deallocate_fptr grub_free_cbk;   /* pointer to memory deallocator */
++
++    grub_uint32_t flags; /* array of bool options */
++} argon2_context;
++
++/* Argon2 primitive type */
++typedef enum Argon2_type {
++  Argon2_d = 0,
++  Argon2_i = 1,
++  Argon2_id = 2
++} argon2_type;
++
++/* Version of the algorithm */
++typedef enum Argon2_version {
++    ARGON2_VERSION_10 = 0x10,
++    ARGON2_VERSION_13 = 0x13,
++    ARGON2_VERSION_NUMBER = ARGON2_VERSION_13
++} argon2_version;
++
++/**
++ * Hashes a password with Argon2, producing a raw hash at @hash
++ * @param t_cost Number of iterations
++ * @param m_cost Sets memory usage to m_cost kibibytes
++ * @param parallelism Number of threads and compute lanes
++ * @param pwd Pointer to password
++ * @param pwdlen Password size in bytes
++ * @param salt Pointer to salt
++ * @param saltlen Salt size in bytes
++ * @param hash Buffer where to write the raw hash - updated by the function
++ * @param hashlen Desired length of the hash in bytes
++ * @pre   Different parallelism levels will give different results
++ * @pre   Returns ARGON2_OK if successful
++ */
++ARGON2_PUBLIC int argon2_hash(const grub_uint32_t t_cost, const grub_uint32_t m_cost,
++                              const grub_uint32_t parallelism, const void *pwd,
++                              const grub_size_t pwdlen, const void *salt,
++                              const grub_size_t saltlen, void *hash,
++                              const grub_size_t hashlen, argon2_type type,
++                              const grub_uint32_t version);
++
++/**
++ * Get the associated error message for given error code
++ * @return  The error message associated with the given error code
++ */
++ARGON2_PUBLIC const char *argon2_error_message(int error_code);
++
++#if defined(__cplusplus)
++}
++#endif
++
++#endif
+diff --git a/grub-core/lib/argon2/blake2/blake2-impl.h b/grub-core/lib/argon2/blake2/blake2-impl.h
+new file mode 100644
+index 000000000..3a795680b
+--- /dev/null
++++ b/grub-core/lib/argon2/blake2/blake2-impl.h
+@@ -0,0 +1,151 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef PORTABLE_BLAKE2_IMPL_H
++#define PORTABLE_BLAKE2_IMPL_H
++
++#if defined(_MSC_VER)
++#define BLAKE2_INLINE __inline
++#elif defined(__GNUC__) || defined(__clang__)
++#define BLAKE2_INLINE __inline__
++#else
++#define BLAKE2_INLINE
++#endif
++
++/* Argon2 Team - Begin Code */
++/*
++   Not an exhaustive list, but should cover the majority of modern platforms
++   Additionally, the code will always be correct---this is only a performance
++   tweak.
++*/
++#if (defined(__BYTE_ORDER__) &&                                                \
++     (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)) ||                           \
++    defined(__LITTLE_ENDIAN__) || defined(__ARMEL__) || defined(__MIPSEL__) || \
++    defined(__AARCH64EL__) || defined(__amd64__) || defined(__i386__) ||       \
++    defined(_M_IX86) || defined(_M_X64) || defined(_M_AMD64) ||                \
++    defined(_M_ARM)
++#define NATIVE_LITTLE_ENDIAN
++#endif
++/* Argon2 Team - End Code */
++
++static BLAKE2_INLINE grub_uint32_t load32(const void *src) {
++#if defined(NATIVE_LITTLE_ENDIAN)
++    grub_uint32_t w;
++    grub_memcpy(&w, src, sizeof w);
++    return w;
++#else
++    const grub_uint8_t *p = (const grub_uint8_t *)src;
++    grub_uint32_t w = *p++;
++    w |= (grub_uint32_t)(*p++) << 8;
++    w |= (grub_uint32_t)(*p++) << 16;
++    w |= (grub_uint32_t)(*p++) << 24;
++    return w;
++#endif
++}
++
++static BLAKE2_INLINE grub_uint64_t load64(const void *src) {
++#if defined(NATIVE_LITTLE_ENDIAN)
++    grub_uint64_t w;
++    grub_memcpy(&w, src, sizeof w);
++    return w;
++#else
++    const grub_uint8_t *p = (const grub_uint8_t *)src;
++    grub_uint64_t w = *p++;
++    w |= (grub_uint64_t)(*p++) << 8;
++    w |= (grub_uint64_t)(*p++) << 16;
++    w |= (grub_uint64_t)(*p++) << 24;
++    w |= (grub_uint64_t)(*p++) << 32;
++    w |= (grub_uint64_t)(*p++) << 40;
++    w |= (grub_uint64_t)(*p++) << 48;
++    w |= (grub_uint64_t)(*p++) << 56;
++    return w;
++#endif
++}
++
++static BLAKE2_INLINE void store32(void *dst, grub_uint32_t w) {
++#if defined(NATIVE_LITTLE_ENDIAN)
++    grub_memcpy(dst, &w, sizeof w);
++#else
++    grub_uint8_t *p = (grub_uint8_t *)dst;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++#endif
++}
++
++static BLAKE2_INLINE void store64(void *dst, grub_uint64_t w) {
++#if defined(NATIVE_LITTLE_ENDIAN)
++    grub_memcpy(dst, &w, sizeof w);
++#else
++    grub_uint8_t *p = (grub_uint8_t *)dst;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++#endif
++}
++
++static BLAKE2_INLINE grub_uint64_t load48(const void *src) {
++    const grub_uint8_t *p = (const grub_uint8_t *)src;
++    grub_uint64_t w = *p++;
++    w |= (grub_uint64_t)(*p++) << 8;
++    w |= (grub_uint64_t)(*p++) << 16;
++    w |= (grub_uint64_t)(*p++) << 24;
++    w |= (grub_uint64_t)(*p++) << 32;
++    w |= (grub_uint64_t)(*p++) << 40;
++    return w;
++}
++
++static BLAKE2_INLINE void store48(void *dst, grub_uint64_t w) {
++    grub_uint8_t *p = (grub_uint8_t *)dst;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++}
++
++static BLAKE2_INLINE grub_uint32_t rotr32(const grub_uint32_t w, const unsigned c) {
++    return (w >> c) | (w << (32 - c));
++}
++
++static BLAKE2_INLINE grub_uint64_t rotr64(const grub_uint64_t w, const unsigned c) {
++    return (w >> c) | (w << (64 - c));
++}
++
++#endif
+diff --git a/grub-core/lib/argon2/blake2/blake2.h b/grub-core/lib/argon2/blake2/blake2.h
+new file mode 100644
+index 000000000..4e8efeb22
+--- /dev/null
++++ b/grub-core/lib/argon2/blake2/blake2.h
+@@ -0,0 +1,89 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef PORTABLE_BLAKE2_H
++#define PORTABLE_BLAKE2_H
++
++#include "../argon2.h"
++
++#if defined(__cplusplus)
++extern "C" {
++#endif
++
++enum blake2b_constant {
++    BLAKE2B_BLOCKBYTES = 128,
++    BLAKE2B_OUTBYTES = 64,
++    BLAKE2B_KEYBYTES = 64,
++    BLAKE2B_SALTBYTES = 16,
++    BLAKE2B_PERSONALBYTES = 16
++};
++
++#pragma pack(push, 1)
++typedef struct __blake2b_param {
++    grub_uint8_t digest_length;                   /* 1 */
++    grub_uint8_t key_length;                      /* 2 */
++    grub_uint8_t fanout;                          /* 3 */
++    grub_uint8_t depth;                           /* 4 */
++    grub_uint32_t leaf_length;                    /* 8 */
++    grub_uint64_t node_offset;                    /* 16 */
++    grub_uint8_t node_depth;                      /* 17 */
++    grub_uint8_t inner_length;                    /* 18 */
++    grub_uint8_t reserved[14];                    /* 32 */
++    grub_uint8_t salt[BLAKE2B_SALTBYTES];         /* 48 */
++    grub_uint8_t personal[BLAKE2B_PERSONALBYTES]; /* 64 */
++} blake2b_param;
++#pragma pack(pop)
++
++typedef struct __blake2b_state {
++    grub_uint64_t h[8];
++    grub_uint64_t t[2];
++    grub_uint64_t f[2];
++    grub_uint8_t buf[BLAKE2B_BLOCKBYTES];
++    unsigned buflen;
++    unsigned outlen;
++    grub_uint8_t last_node;
++} blake2b_state;
++
++/* Ensure param structs have not been wrongly padded */
++/* Poor man's static_assert */
++enum {
++    blake2_size_check_0 = 1 / !!(GRUB_CHAR_BIT == 8),
++    blake2_size_check_2 =
++        1 / !!(sizeof(blake2b_param) == sizeof(grub_uint64_t) * GRUB_CHAR_BIT)
++};
++
++/* Streaming API */
++ARGON2_LOCAL int blake2b_init(blake2b_state *S, grub_size_t outlen);
++ARGON2_LOCAL int blake2b_init_key(blake2b_state *S, grub_size_t outlen, const void *key,
++                     grub_size_t keylen);
++ARGON2_LOCAL int blake2b_init_param(blake2b_state *S, const blake2b_param *P);
++ARGON2_LOCAL int blake2b_update(blake2b_state *S, const void *in, grub_size_t inlen);
++ARGON2_LOCAL int blake2b_final(blake2b_state *S, void *out, grub_size_t outlen);
++
++/* Simple API */
++ARGON2_LOCAL int blake2b(void *out, grub_size_t outlen, const void *in, grub_size_t inlen,
++                         const void *key, grub_size_t keylen);
++
++/* Argon2 Team - Begin Code */
++ARGON2_LOCAL int blake2b_long(void *out, grub_size_t outlen, const void *in, grub_size_t inlen);
++/* Argon2 Team - End Code */
++
++#if defined(__cplusplus)
++}
++#endif
++
++#endif
+diff --git a/grub-core/lib/argon2/blake2/blake2b.c b/grub-core/lib/argon2/blake2/blake2b.c
+new file mode 100644
+index 000000000..53abd7bef
+--- /dev/null
++++ b/grub-core/lib/argon2/blake2/blake2b.c
+@@ -0,0 +1,388 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#include "blake2.h"
++#include "blake2-impl.h"
++
++static const grub_uint64_t blake2b_IV[8] = {
++    GRUB_UINT64_C(0x6a09e667f3bcc908), GRUB_UINT64_C(0xbb67ae8584caa73b),
++    GRUB_UINT64_C(0x3c6ef372fe94f82b), GRUB_UINT64_C(0xa54ff53a5f1d36f1),
++    GRUB_UINT64_C(0x510e527fade682d1), GRUB_UINT64_C(0x9b05688c2b3e6c1f),
++    GRUB_UINT64_C(0x1f83d9abfb41bd6b), GRUB_UINT64_C(0x5be0cd19137e2179)};
++
++static const unsigned int blake2b_sigma[12][16] = {
++    {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15},
++    {14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3},
++    {11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4},
++    {7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8},
++    {9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13},
++    {2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9},
++    {12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11},
++    {13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10},
++    {6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5},
++    {10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0},
++    {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15},
++    {14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3},
++};
++
++void clear_internal_memory(void *v, grub_size_t n);
++
++static BLAKE2_INLINE void blake2b_set_lastnode(blake2b_state *S) {
++    S->f[1] = (grub_uint64_t)-1;
++}
++
++static BLAKE2_INLINE void blake2b_set_lastblock(blake2b_state *S) {
++    if (S->last_node) {
++        blake2b_set_lastnode(S);
++    }
++    S->f[0] = (grub_uint64_t)-1;
++}
++
++static BLAKE2_INLINE void blake2b_increment_counter(blake2b_state *S,
++                                                    grub_uint64_t inc) {
++    S->t[0] += inc;
++    S->t[1] += (S->t[0] < inc);
++}
++
++static BLAKE2_INLINE void blake2b_invalidate_state(blake2b_state *S) {
++    clear_internal_memory(S, sizeof(*S));      /* wipe */
++    blake2b_set_lastblock(S); /* invalidate for further use */
++}
++
++static BLAKE2_INLINE void blake2b_init0(blake2b_state *S) {
++    grub_memset(S, 0, sizeof(*S));
++    grub_memcpy(S->h, blake2b_IV, sizeof(S->h));
++}
++
++int blake2b_init_param(blake2b_state *S, const blake2b_param *P) {
++    const unsigned char *p = (const unsigned char *)P;
++    unsigned int i;
++
++    if (NULL == P || NULL == S) {
++        return -1;
++    }
++
++    blake2b_init0(S);
++    /* IV XOR Parameter Block */
++    for (i = 0; i < 8; ++i) {
++        S->h[i] ^= load64(&p[i * sizeof(S->h[i])]);
++    }
++    S->outlen = P->digest_length;
++    return 0;
++}
++
++/* Sequential blake2b initialization */
++int blake2b_init(blake2b_state *S, grub_size_t outlen) {
++    blake2b_param P;
++
++    if (S == NULL) {
++        return -1;
++    }
++
++    if ((outlen == 0) || (outlen > BLAKE2B_OUTBYTES)) {
++        blake2b_invalidate_state(S);
++        return -1;
++    }
++
++    /* Setup Parameter Block for unkeyed BLAKE2 */
++    P.digest_length = (grub_uint8_t)outlen;
++    P.key_length = 0;
++    P.fanout = 1;
++    P.depth = 1;
++    P.leaf_length = 0;
++    P.node_offset = 0;
++    P.node_depth = 0;
++    P.inner_length = 0;
++    grub_memset(P.reserved, 0, sizeof(P.reserved));
++    grub_memset(P.salt, 0, sizeof(P.salt));
++    grub_memset(P.personal, 0, sizeof(P.personal));
++
++    return blake2b_init_param(S, &P);
++}
++
++int blake2b_init_key(blake2b_state *S, grub_size_t outlen, const void *key,
++                     grub_size_t keylen) {
++    blake2b_param P;
++
++    if (S == NULL) {
++        return -1;
++    }
++
++    if ((outlen == 0) || (outlen > BLAKE2B_OUTBYTES)) {
++        blake2b_invalidate_state(S);
++        return -1;
++    }
++
++    if ((key == 0) || (keylen == 0) || (keylen > BLAKE2B_KEYBYTES)) {
++        blake2b_invalidate_state(S);
++        return -1;
++    }
++
++    /* Setup Parameter Block for keyed BLAKE2 */
++    P.digest_length = (grub_uint8_t)outlen;
++    P.key_length = (grub_uint8_t)keylen;
++    P.fanout = 1;
++    P.depth = 1;
++    P.leaf_length = 0;
++    P.node_offset = 0;
++    P.node_depth = 0;
++    P.inner_length = 0;
++    grub_memset(P.reserved, 0, sizeof(P.reserved));
++    grub_memset(P.salt, 0, sizeof(P.salt));
++    grub_memset(P.personal, 0, sizeof(P.personal));
++
++    if (blake2b_init_param(S, &P) < 0) {
++        blake2b_invalidate_state(S);
++        return -1;
++    }
++
++    {
++        grub_uint8_t block[BLAKE2B_BLOCKBYTES];
++        grub_memset(block, 0, BLAKE2B_BLOCKBYTES);
++        grub_memcpy(block, key, keylen);
++        blake2b_update(S, block, BLAKE2B_BLOCKBYTES);
++        /* Burn the key from stack */
++        clear_internal_memory(block, BLAKE2B_BLOCKBYTES);
++    }
++    return 0;
++}
++
++static void blake2b_compress(blake2b_state *S, const grub_uint8_t *block) {
++    grub_uint64_t m[16];
++    grub_uint64_t v[16];
++    unsigned int i, r;
++
++    for (i = 0; i < 16; ++i) {
++        m[i] = load64(block + i * sizeof(m[i]));
++    }
++
++    for (i = 0; i < 8; ++i) {
++        v[i] = S->h[i];
++    }
++
++    v[8] = blake2b_IV[0];
++    v[9] = blake2b_IV[1];
++    v[10] = blake2b_IV[2];
++    v[11] = blake2b_IV[3];
++    v[12] = blake2b_IV[4] ^ S->t[0];
++    v[13] = blake2b_IV[5] ^ S->t[1];
++    v[14] = blake2b_IV[6] ^ S->f[0];
++    v[15] = blake2b_IV[7] ^ S->f[1];
++
++#define G(r, i, a, b, c, d)                                                    \
++    do {                                                                       \
++        a = a + b + m[blake2b_sigma[r][2 * i + 0]];                            \
++        d = rotr64(d ^ a, 32);                                                 \
++        c = c + d;                                                             \
++        b = rotr64(b ^ c, 24);                                                 \
++        a = a + b + m[blake2b_sigma[r][2 * i + 1]];                            \
++        d = rotr64(d ^ a, 16);                                                 \
++        c = c + d;                                                             \
++        b = rotr64(b ^ c, 63);                                                 \
++    } while ((void)0, 0)
++
++#define ROUND(r)                                                               \
++    do {                                                                       \
++        G(r, 0, v[0], v[4], v[8], v[12]);                                      \
++        G(r, 1, v[1], v[5], v[9], v[13]);                                      \
++        G(r, 2, v[2], v[6], v[10], v[14]);                                     \
++        G(r, 3, v[3], v[7], v[11], v[15]);                                     \
++        G(r, 4, v[0], v[5], v[10], v[15]);                                     \
++        G(r, 5, v[1], v[6], v[11], v[12]);                                     \
++        G(r, 6, v[2], v[7], v[8], v[13]);                                      \
++        G(r, 7, v[3], v[4], v[9], v[14]);                                      \
++    } while ((void)0, 0)
++
++    for (r = 0; r < 12; ++r) {
++        ROUND(r);
++    }
++
++    for (i = 0; i < 8; ++i) {
++        S->h[i] = S->h[i] ^ v[i] ^ v[i + 8];
++    }
++
++#undef G
++#undef ROUND
++}
++
++int blake2b_update(blake2b_state *S, const void *in, grub_size_t inlen) {
++    const grub_uint8_t *pin = (const grub_uint8_t *)in;
++
++    if (inlen == 0) {
++        return 0;
++    }
++
++    /* Sanity check */
++    if (S == NULL || in == NULL) {
++        return -1;
++    }
++
++    /* Is this a reused state? */
++    if (S->f[0] != 0) {
++        return -1;
++    }
++
++    if (S->buflen + inlen > BLAKE2B_BLOCKBYTES) {
++        /* Complete current block */
++        grub_size_t left = S->buflen;
++        grub_size_t fill = BLAKE2B_BLOCKBYTES - left;
++        grub_memcpy(&S->buf[left], pin, fill);
++        blake2b_increment_counter(S, BLAKE2B_BLOCKBYTES);
++        blake2b_compress(S, S->buf);
++        S->buflen = 0;
++        inlen -= fill;
++        pin += fill;
++        /* Avoid buffer copies when possible */
++        while (inlen > BLAKE2B_BLOCKBYTES) {
++            blake2b_increment_counter(S, BLAKE2B_BLOCKBYTES);
++            blake2b_compress(S, pin);
++            inlen -= BLAKE2B_BLOCKBYTES;
++            pin += BLAKE2B_BLOCKBYTES;
++        }
++    }
++    grub_memcpy(&S->buf[S->buflen], pin, inlen);
++    S->buflen += (unsigned int)inlen;
++    return 0;
++}
++
++int blake2b_final(blake2b_state *S, void *out, grub_size_t outlen) {
++    grub_uint8_t buffer[BLAKE2B_OUTBYTES] = {0};
++    unsigned int i;
++
++    /* Sanity checks */
++    if (S == NULL || out == NULL || outlen < S->outlen) {
++        return -1;
++    }
++
++    /* Is this a reused state? */
++    if (S->f[0] != 0) {
++        return -1;
++    }
++
++    blake2b_increment_counter(S, S->buflen);
++    blake2b_set_lastblock(S);
++    grub_memset(&S->buf[S->buflen], 0, BLAKE2B_BLOCKBYTES - S->buflen); /* Padding */
++    blake2b_compress(S, S->buf);
++
++    for (i = 0; i < 8; ++i) { /* Output full hash to temp buffer */
++        store64(buffer + sizeof(S->h[i]) * i, S->h[i]);
++    }
++
++    grub_memcpy(out, buffer, S->outlen);
++    clear_internal_memory(buffer, sizeof(buffer));
++    clear_internal_memory(S->buf, sizeof(S->buf));
++    clear_internal_memory(S->h, sizeof(S->h));
++    return 0;
++}
++
++int blake2b(void *out, grub_size_t outlen, const void *in, grub_size_t inlen,
++            const void *key, grub_size_t keylen) {
++    blake2b_state S;
++    int ret = -1;
++
++    /* Verify parameters */
++    if (NULL == in && inlen > 0) {
++        goto fail;
++    }
++
++    if (NULL == out || outlen == 0 || outlen > BLAKE2B_OUTBYTES) {
++        goto fail;
++    }
++
++    if ((NULL == key && keylen > 0) || keylen > BLAKE2B_KEYBYTES) {
++        goto fail;
++    }
++
++    if (keylen > 0) {
++        if (blake2b_init_key(&S, outlen, key, keylen) < 0) {
++            goto fail;
++        }
++    } else {
++        if (blake2b_init(&S, outlen) < 0) {
++            goto fail;
++        }
++    }
++
++    if (blake2b_update(&S, in, inlen) < 0) {
++        goto fail;
++    }
++    ret = blake2b_final(&S, out, outlen);
++
++fail:
++    clear_internal_memory(&S, sizeof(S));
++    return ret;
++}
++
++/* Argon2 Team - Begin Code */
++int blake2b_long(void *pout, grub_size_t outlen, const void *in, grub_size_t inlen) {
++    grub_uint8_t *out = (grub_uint8_t *)pout;
++    blake2b_state blake_state;
++    grub_uint8_t outlen_bytes[sizeof(grub_uint32_t)] = {0};
++    int ret = -1;
++
++    if (outlen > GRUB_UINT32_MAX) {
++        goto fail;
++    }
++
++    /* Ensure little-endian byte order! */
++    store32(outlen_bytes, (grub_uint32_t)outlen);
++
++#define TRY(statement)                                                         \
++    do {                                                                       \
++        ret = statement;                                                       \
++        if (ret < 0) {                                                         \
++            goto fail;                                                         \
++        }                                                                      \
++    } while ((void)0, 0)
++
++    if (outlen <= BLAKE2B_OUTBYTES) {
++        TRY(blake2b_init(&blake_state, outlen));
++        TRY(blake2b_update(&blake_state, outlen_bytes, sizeof(outlen_bytes)));
++        TRY(blake2b_update(&blake_state, in, inlen));
++        TRY(blake2b_final(&blake_state, out, outlen));
++    } else {
++        grub_uint32_t toproduce;
++        grub_uint8_t out_buffer[BLAKE2B_OUTBYTES];
++        grub_uint8_t in_buffer[BLAKE2B_OUTBYTES];
++        TRY(blake2b_init(&blake_state, BLAKE2B_OUTBYTES));
++        TRY(blake2b_update(&blake_state, outlen_bytes, sizeof(outlen_bytes)));
++        TRY(blake2b_update(&blake_state, in, inlen));
++        TRY(blake2b_final(&blake_state, out_buffer, BLAKE2B_OUTBYTES));
++        grub_memcpy(out, out_buffer, BLAKE2B_OUTBYTES / 2);
++        out += BLAKE2B_OUTBYTES / 2;
++        toproduce = (grub_uint32_t)outlen - BLAKE2B_OUTBYTES / 2;
++
++        while (toproduce > BLAKE2B_OUTBYTES) {
++            grub_memcpy(in_buffer, out_buffer, BLAKE2B_OUTBYTES);
++            TRY(blake2b(out_buffer, BLAKE2B_OUTBYTES, in_buffer,
++                        BLAKE2B_OUTBYTES, NULL, 0));
++            grub_memcpy(out, out_buffer, BLAKE2B_OUTBYTES / 2);
++            out += BLAKE2B_OUTBYTES / 2;
++            toproduce -= BLAKE2B_OUTBYTES / 2;
++        }
++
++        grub_memcpy(in_buffer, out_buffer, BLAKE2B_OUTBYTES);
++        TRY(blake2b(out_buffer, toproduce, in_buffer, BLAKE2B_OUTBYTES, NULL,
++                    0));
++        grub_memcpy(out, out_buffer, toproduce);
++    }
++fail:
++    clear_internal_memory(&blake_state, sizeof(blake_state));
++    return ret;
++#undef TRY
++}
++/* Argon2 Team - End Code */
+diff --git a/grub-core/lib/argon2/blake2/blamka-round-ref.h b/grub-core/lib/argon2/blake2/blamka-round-ref.h
+new file mode 100644
+index 000000000..7f0071ada
+--- /dev/null
++++ b/grub-core/lib/argon2/blake2/blamka-round-ref.h
+@@ -0,0 +1,56 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef BLAKE_ROUND_MKA_H
++#define BLAKE_ROUND_MKA_H
++
++#include "blake2.h"
++#include "blake2-impl.h"
++
++/* designed by the Lyra PHC team */
++static BLAKE2_INLINE grub_uint64_t fBlaMka(grub_uint64_t x, grub_uint64_t y) {
++    const grub_uint64_t m = GRUB_UINT64_C(0xFFFFFFFF);
++    const grub_uint64_t xy = (x & m) * (y & m);
++    return x + y + 2 * xy;
++}
++
++#define G(a, b, c, d)                                                          \
++    do {                                                                       \
++        a = fBlaMka(a, b);                                                     \
++        d = rotr64(d ^ a, 32);                                                 \
++        c = fBlaMka(c, d);                                                     \
++        b = rotr64(b ^ c, 24);                                                 \
++        a = fBlaMka(a, b);                                                     \
++        d = rotr64(d ^ a, 16);                                                 \
++        c = fBlaMka(c, d);                                                     \
++        b = rotr64(b ^ c, 63);                                                 \
++    } while ((void)0, 0)
++
++#define BLAKE2_ROUND_NOMSG(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11,   \
++                           v12, v13, v14, v15)                                 \
++    do {                                                                       \
++        G(v0, v4, v8, v12);                                                    \
++        G(v1, v5, v9, v13);                                                    \
++        G(v2, v6, v10, v14);                                                   \
++        G(v3, v7, v11, v15);                                                   \
++        G(v0, v5, v10, v15);                                                   \
++        G(v1, v6, v11, v12);                                                   \
++        G(v2, v7, v8, v13);                                                    \
++        G(v3, v4, v9, v14);                                                    \
++    } while ((void)0, 0)
++
++#endif
+diff --git a/grub-core/lib/argon2/core.c b/grub-core/lib/argon2/core.c
+new file mode 100644
+index 000000000..0fe5b74cb
+--- /dev/null
++++ b/grub-core/lib/argon2/core.c
+@@ -0,0 +1,506 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++/*For memory wiping*/
++#ifdef _MSC_VER
++#include <windows.h>
++#include <winbase.h> /* For SecureZeroMemory */
++#endif
++#if defined __STDC_LIB_EXT1__
++#define __STDC_WANT_LIB_EXT1__ 1
++#endif
++#define VC_GE_2005(version) (version >= 1400)
++
++#include "core.h"
++#include "blake2/blake2.h"
++#include "blake2/blake2-impl.h"
++
++#ifdef GENKAT
++#include "genkat.h"
++#endif
++
++#if defined(__clang__)
++#if __has_attribute(optnone)
++#define NOT_OPTIMIZED __attribute__((optnone))
++#endif
++#elif defined(__GNUC__)
++#define GCC_VERSION                                                            \
++    (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__)
++#if GCC_VERSION >= 40400
++#define NOT_OPTIMIZED __attribute__((optimize("O0")))
++#endif
++#endif
++#ifndef NOT_OPTIMIZED
++#define NOT_OPTIMIZED
++#endif
++
++/***************Instance and Position constructors**********/
++void init_block_value(block *b, grub_uint8_t in) { grub_memset(b->v, in, sizeof(b->v)); }
++
++void copy_block(block *dst, const block *src) {
++    grub_memcpy(dst->v, src->v, sizeof(grub_uint64_t) * ARGON2_QWORDS_IN_BLOCK);
++}
++
++void xor_block(block *dst, const block *src) {
++    int i;
++    for (i = 0; i < ARGON2_QWORDS_IN_BLOCK; ++i) {
++        dst->v[i] ^= src->v[i];
++    }
++}
++
++static void load_block(block *dst, const void *input) {
++    unsigned i;
++    for (i = 0; i < ARGON2_QWORDS_IN_BLOCK; ++i) {
++        dst->v[i] = load64((const grub_uint8_t *)input + i * sizeof(dst->v[i]));
++    }
++}
++
++static void store_block(void *output, const block *src) {
++    unsigned i;
++    for (i = 0; i < ARGON2_QWORDS_IN_BLOCK; ++i) {
++        store64((grub_uint8_t *)output + i * sizeof(src->v[i]), src->v[i]);
++    }
++}
++
++/***************Memory functions*****************/
++
++int allocate_memory(const argon2_context *context, grub_uint8_t **memory,
++                    grub_size_t num, grub_size_t size) {
++    grub_size_t memory_size = num*size;
++    if (memory == NULL) {
++        return ARGON2_MEMORY_ALLOCATION_ERROR;
++    }
++
++    /* 1. Check for multiplication overflow */
++    if (size != 0 && memory_size / size != num) {
++        return ARGON2_MEMORY_ALLOCATION_ERROR;
++    }
++
++    /* 2. Try to allocate with appropriate allocator */
++    if (context->allocate_cbk) {
++        (context->allocate_cbk)(memory, memory_size);
++    } else {
++        *memory = grub_malloc(memory_size);
++    }
++
++    if (*memory == NULL) {
++        return ARGON2_MEMORY_ALLOCATION_ERROR;
++    }
++
++    return ARGON2_OK;
++}
++
++void grub_free_memory(const argon2_context *context, grub_uint8_t *memory,
++                 grub_size_t num, grub_size_t size) {
++    grub_size_t memory_size = num*size;
++    clear_internal_memory(memory, memory_size);
++    if (context->grub_free_cbk) {
++        (context->grub_free_cbk)(memory, memory_size);
++    } else {
++        grub_free(memory);
++    }
++}
++
++void NOT_OPTIMIZED secure_wipe_memory(void *v, grub_size_t n) {
++    static void *(*const volatile grub_memset_sec)(void *, int, grub_size_t) = &grub_memset;
++    grub_memset_sec(v, 0, n);
++}
++
++/* Memory clear flag defaults to true. */
++int FLAG_clear_internal_memory = 1;
++void clear_internal_memory(void *v, grub_size_t n) {
++  if (FLAG_clear_internal_memory && v) {
++    secure_wipe_memory(v, n);
++  }
++}
++
++void finalize(const argon2_context *context, argon2_instance_t *instance) {
++    if (context != NULL && instance != NULL) {
++        block blockhash;
++        grub_uint32_t l;
++
++        copy_block(&blockhash, instance->memory + instance->lane_length - 1);
++
++        /* XOR the last blocks */
++        for (l = 1; l < instance->lanes; ++l) {
++            grub_uint32_t last_block_in_lane =
++                l * instance->lane_length + (instance->lane_length - 1);
++            xor_block(&blockhash, instance->memory + last_block_in_lane);
++        }
++
++        /* Hash the result */
++        {
++            grub_uint8_t blockhash_bytes[ARGON2_BLOCK_SIZE];
++            store_block(blockhash_bytes, &blockhash);
++            blake2b_long(context->out, context->outlen, blockhash_bytes,
++                         ARGON2_BLOCK_SIZE);
++            /* clear blockhash and blockhash_bytes */
++            clear_internal_memory(blockhash.v, ARGON2_BLOCK_SIZE);
++            clear_internal_memory(blockhash_bytes, ARGON2_BLOCK_SIZE);
++        }
++
++#ifdef GENKAT
++        print_tag(context->out, context->outlen);
++#endif
++
++        grub_free_memory(context, (grub_uint8_t *)instance->memory,
++                    instance->memory_blocks, sizeof(block));
++    }
++}
++
++grub_uint32_t index_alpha(const argon2_instance_t *instance,
++                     const argon2_position_t *position, grub_uint32_t pseudo_rand,
++                     int same_lane) {
++    /*
++     * Pass 0:
++     *      This lane : all already finished segments plus already constructed
++     * blocks in this segment
++     *      Other lanes : all already finished segments
++     * Pass 1+:
++     *      This lane : (SYNC_POINTS - 1) last segments plus already constructed
++     * blocks in this segment
++     *      Other lanes : (SYNC_POINTS - 1) last segments
++     */
++    grub_uint32_t reference_area_size;
++    grub_uint64_t relative_position;
++    grub_uint64_t start_position, absolute_position;
++
++    if (0 == position->pass) {
++        /* First pass */
++        if (0 == position->slice) {
++            /* First slice */
++            reference_area_size =
++                position->index - 1; /* all but the previous */
++        } else {
++            if (same_lane) {
++                /* The same lane => add current segment */
++                reference_area_size =
++                    position->slice * instance->segment_length +
++                    position->index - 1;
++            } else {
++                reference_area_size =
++                    position->slice * instance->segment_length +
++                    ((position->index == 0) ? (-1) : 0);
++            }
++        }
++    } else {
++        /* Second pass */
++        if (same_lane) {
++            reference_area_size = instance->lane_length -
++                                  instance->segment_length + position->index -
++                                  1;
++        } else {
++            reference_area_size = instance->lane_length -
++                                  instance->segment_length +
++                                  ((position->index == 0) ? (-1) : 0);
++        }
++    }
++
++    /* 1.2.4. Mapping pseudo_rand to 0..<reference_area_size-1> and produce
++     * relative position */
++    relative_position = pseudo_rand;
++    relative_position = relative_position * relative_position >> 32;
++    relative_position = reference_area_size - 1 -
++                        (reference_area_size * relative_position >> 32);
++
++    /* 1.2.5 Computing starting position */
++    start_position = 0;
++
++    if (0 != position->pass) {
++        start_position = (position->slice == ARGON2_SYNC_POINTS - 1)
++                             ? 0
++                             : (position->slice + 1) * instance->segment_length;
++    }
++
++    /* 1.2.6. Computing absolute position */
++    grub_divmod64 (start_position + relative_position, instance->lane_length,
++                   &absolute_position); /* absolute position */
++    return absolute_position;
++}
++
++/* Single-threaded version for p=1 case */
++static int fill_memory_blocks_st(argon2_instance_t *instance) {
++    grub_uint32_t r, s, l;
++
++    for (r = 0; r < instance->passes; ++r) {
++        for (s = 0; s < ARGON2_SYNC_POINTS; ++s) {
++            for (l = 0; l < instance->lanes; ++l) {
++                argon2_position_t position = {r, l, (grub_uint8_t)s, 0};
++                fill_segment(instance, position);
++            }
++        }
++#ifdef GENKAT
++        internal_kat(instance, r); /* Print all memory blocks */
++#endif
++    }
++    return ARGON2_OK;
++}
++
++int fill_memory_blocks(argon2_instance_t *instance) {
++	if (instance == NULL || instance->lanes == 0) {
++	    return ARGON2_INCORRECT_PARAMETER;
++    }
++    return fill_memory_blocks_st(instance);
++}
++
++int validate_inputs(const argon2_context *context) {
++    if (NULL == context) {
++        return ARGON2_INCORRECT_PARAMETER;
++    }
++
++    if (NULL == context->out) {
++        return ARGON2_OUTPUT_PTR_NULL;
++    }
++
++    /* Validate output length */
++    if (ARGON2_MIN_OUTLEN > context->outlen) {
++        return ARGON2_OUTPUT_TOO_SHORT;
++    }
++
++    if (ARGON2_MAX_OUTLEN < context->outlen) {
++        return ARGON2_OUTPUT_TOO_LONG;
++    }
++
++    /* Validate password (required param) */
++    if (NULL == context->pwd) {
++        if (0 != context->pwdlen) {
++            return ARGON2_PWD_PTR_MISMATCH;
++        }
++    }
++
++    if (ARGON2_MAX_PWD_LENGTH < context->pwdlen) {
++        return ARGON2_PWD_TOO_LONG;
++    }
++
++    /* Validate salt (required param) */
++    if (NULL == context->salt) {
++        if (0 != context->saltlen) {
++            return ARGON2_SALT_PTR_MISMATCH;
++        }
++    }
++
++    if (ARGON2_MIN_SALT_LENGTH > context->saltlen) {
++        return ARGON2_SALT_TOO_SHORT;
++    }
++
++    if (ARGON2_MAX_SALT_LENGTH < context->saltlen) {
++        return ARGON2_SALT_TOO_LONG;
++    }
++
++    /* Validate secret (optional param) */
++    if (NULL == context->secret) {
++        if (0 != context->secretlen) {
++            return ARGON2_SECRET_PTR_MISMATCH;
++        }
++    } else {
++        if (ARGON2_MAX_SECRET < context->secretlen) {
++            return ARGON2_SECRET_TOO_LONG;
++        }
++    }
++
++    /* Validate associated data (optional param) */
++    if (NULL == context->ad) {
++        if (0 != context->adlen) {
++            return ARGON2_AD_PTR_MISMATCH;
++        }
++    } else {
++        if (ARGON2_MAX_AD_LENGTH < context->adlen) {
++            return ARGON2_AD_TOO_LONG;
++        }
++    }
++
++    /* Validate memory cost */
++    if (ARGON2_MIN_MEMORY > context->m_cost) {
++        return ARGON2_MEMORY_TOO_LITTLE;
++    }
++
++    if (context->m_cost < 8 * context->lanes) {
++        return ARGON2_MEMORY_TOO_LITTLE;
++    }
++
++    /* Validate time cost */
++    if (ARGON2_MIN_TIME > context->t_cost) {
++        return ARGON2_TIME_TOO_SMALL;
++    }
++
++    if (ARGON2_MAX_TIME < context->t_cost) {
++        return ARGON2_TIME_TOO_LARGE;
++    }
++
++    /* Validate lanes */
++    if (ARGON2_MIN_LANES > context->lanes) {
++        return ARGON2_LANES_TOO_FEW;
++    }
++
++    if (ARGON2_MAX_LANES < context->lanes) {
++        return ARGON2_LANES_TOO_MANY;
++    }
++
++    /* Validate threads */
++    if (ARGON2_MIN_THREADS > context->threads) {
++        return ARGON2_THREADS_TOO_FEW;
++    }
++
++    if (ARGON2_MAX_THREADS < context->threads) {
++        return ARGON2_THREADS_TOO_MANY;
++    }
++
++    if (NULL != context->allocate_cbk && NULL == context->grub_free_cbk) {
++        return ARGON2_FREE_MEMORY_CBK_NULL;
++    }
++
++    if (NULL == context->allocate_cbk && NULL != context->grub_free_cbk) {
++        return ARGON2_ALLOCATE_MEMORY_CBK_NULL;
++    }
++
++    return ARGON2_OK;
++}
++
++void fill_first_blocks(grub_uint8_t *blockhash, const argon2_instance_t *instance) {
++    grub_uint32_t l;
++    /* Make the first and second block in each lane as G(H0||0||i) or
++       G(H0||1||i) */
++    grub_uint8_t blockhash_bytes[ARGON2_BLOCK_SIZE];
++    for (l = 0; l < instance->lanes; ++l) {
++
++        store32(blockhash + ARGON2_PREHASH_DIGEST_LENGTH, 0);
++        store32(blockhash + ARGON2_PREHASH_DIGEST_LENGTH + 4, l);
++        blake2b_long(blockhash_bytes, ARGON2_BLOCK_SIZE, blockhash,
++                     ARGON2_PREHASH_SEED_LENGTH);
++        load_block(&instance->memory[l * instance->lane_length + 0],
++                   blockhash_bytes);
++
++        store32(blockhash + ARGON2_PREHASH_DIGEST_LENGTH, 1);
++        blake2b_long(blockhash_bytes, ARGON2_BLOCK_SIZE, blockhash,
++                     ARGON2_PREHASH_SEED_LENGTH);
++        load_block(&instance->memory[l * instance->lane_length + 1],
++                   blockhash_bytes);
++    }
++    clear_internal_memory(blockhash_bytes, ARGON2_BLOCK_SIZE);
++}
++
++void initial_hash(grub_uint8_t *blockhash, argon2_context *context,
++                  argon2_type type) {
++    blake2b_state BlakeHash;
++    grub_uint8_t value[sizeof(grub_uint32_t)];
++
++    if (NULL == context || NULL == blockhash) {
++        return;
++    }
++
++    blake2b_init(&BlakeHash, ARGON2_PREHASH_DIGEST_LENGTH);
++
++    store32(&value, context->lanes);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    store32(&value, context->outlen);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    store32(&value, context->m_cost);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    store32(&value, context->t_cost);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    store32(&value, context->version);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    store32(&value, (grub_uint32_t)type);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    store32(&value, context->pwdlen);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    if (context->pwd != NULL) {
++        blake2b_update(&BlakeHash, (const grub_uint8_t *)context->pwd,
++                       context->pwdlen);
++
++        if (context->flags & ARGON2_FLAG_CLEAR_PASSWORD) {
++            secure_wipe_memory(context->pwd, context->pwdlen);
++            context->pwdlen = 0;
++        }
++    }
++
++    store32(&value, context->saltlen);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    if (context->salt != NULL) {
++        blake2b_update(&BlakeHash, (const grub_uint8_t *)context->salt,
++                       context->saltlen);
++    }
++
++    store32(&value, context->secretlen);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    if (context->secret != NULL) {
++        blake2b_update(&BlakeHash, (const grub_uint8_t *)context->secret,
++                       context->secretlen);
++
++        if (context->flags & ARGON2_FLAG_CLEAR_SECRET) {
++            secure_wipe_memory(context->secret, context->secretlen);
++            context->secretlen = 0;
++        }
++    }
++
++    store32(&value, context->adlen);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    if (context->ad != NULL) {
++        blake2b_update(&BlakeHash, (const grub_uint8_t *)context->ad,
++                       context->adlen);
++    }
++
++    blake2b_final(&BlakeHash, blockhash, ARGON2_PREHASH_DIGEST_LENGTH);
++}
++
++int initialize(argon2_instance_t *instance, argon2_context *context) {
++    grub_uint8_t blockhash[ARGON2_PREHASH_SEED_LENGTH];
++    int result = ARGON2_OK;
++
++    if (instance == NULL || context == NULL)
++        return ARGON2_INCORRECT_PARAMETER;
++    instance->context_ptr = context;
++
++    /* 1. Memory allocation */
++    result = allocate_memory(context, (grub_uint8_t **)&(instance->memory),
++                             instance->memory_blocks, sizeof(block));
++    if (result != ARGON2_OK) {
++        return result;
++    }
++
++    /* 2. Initial hashing */
++    /* H_0 + 8 extra bytes to produce the first blocks */
++    /* grub_uint8_t blockhash[ARGON2_PREHASH_SEED_LENGTH]; */
++    /* Hashing all inputs */
++    initial_hash(blockhash, context, instance->type);
++    /* Zeroing 8 extra bytes */
++    clear_internal_memory(blockhash + ARGON2_PREHASH_DIGEST_LENGTH,
++                          ARGON2_PREHASH_SEED_LENGTH -
++                              ARGON2_PREHASH_DIGEST_LENGTH);
++
++#ifdef GENKAT
++    initial_kat(blockhash, context, instance->type);
++#endif
++
++    /* 3. Creating first blocks, we always have at least two blocks in a slice
++     */
++    fill_first_blocks(blockhash, instance);
++    /* Clearing the hash */
++    clear_internal_memory(blockhash, ARGON2_PREHASH_SEED_LENGTH);
++
++    return ARGON2_OK;
++}
+diff --git a/grub-core/lib/argon2/core.h b/grub-core/lib/argon2/core.h
+new file mode 100644
+index 000000000..bbcd56998
+--- /dev/null
++++ b/grub-core/lib/argon2/core.h
+@@ -0,0 +1,228 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef ARGON2_CORE_H
++#define ARGON2_CORE_H
++
++#include "argon2.h"
++
++#define CONST_CAST(x) (x)(grub_addr_t)
++
++/**********************Argon2 internal constants*******************************/
++
++enum argon2_core_constants {
++    /* Memory block size in bytes */
++    ARGON2_BLOCK_SIZE = 1024,
++    ARGON2_QWORDS_IN_BLOCK = ARGON2_BLOCK_SIZE / 8,
++    ARGON2_OWORDS_IN_BLOCK = ARGON2_BLOCK_SIZE / 16,
++    ARGON2_HWORDS_IN_BLOCK = ARGON2_BLOCK_SIZE / 32,
++    ARGON2_512BIT_WORDS_IN_BLOCK = ARGON2_BLOCK_SIZE / 64,
++
++    /* Number of pseudo-random values generated by one call to Blake in Argon2i
++       to
++       generate reference block positions */
++    ARGON2_ADDRESSES_IN_BLOCK = 128,
++
++    /* Pre-hashing digest length and its extension*/
++    ARGON2_PREHASH_DIGEST_LENGTH = 64,
++    ARGON2_PREHASH_SEED_LENGTH = 72
++};
++
++/*************************Argon2 internal data types***********************/
++
++/*
++ * Structure for the (1KB) memory block implemented as 128 64-bit words.
++ * Memory blocks can be copied, XORed. Internal words can be accessed by [] (no
++ * bounds checking).
++ */
++typedef struct block_ { grub_uint64_t v[ARGON2_QWORDS_IN_BLOCK]; } block;
++
++/*****************Functions that work with the block******************/
++
++/* Initialize each byte of the block with @in */
++void init_block_value(block *b, grub_uint8_t in);
++
++/* Copy block @src to block @dst */
++void copy_block(block *dst, const block *src);
++
++/* XOR @src onto @dst bytewise */
++void xor_block(block *dst, const block *src);
++
++/*
++ * Argon2 instance: memory pointer, number of passes, amount of memory, type,
++ * and derived values.
++ * Used to evaluate the number and location of blocks to construct in each
++ * thread
++ */
++typedef struct Argon2_instance_t {
++    block *memory;          /* Memory pointer */
++    grub_uint32_t version;
++    grub_uint32_t passes;        /* Number of passes */
++    grub_uint32_t memory_blocks; /* Number of blocks in memory */
++    grub_uint32_t segment_length;
++    grub_uint32_t lane_length;
++    grub_uint32_t lanes;
++    grub_uint32_t threads;
++    argon2_type type;
++    int print_internals; /* whether to print the memory blocks */
++    argon2_context *context_ptr; /* points back to original context */
++} argon2_instance_t;
++
++/*
++ * Argon2 position: where we construct the block right now. Used to distribute
++ * work between threads.
++ */
++typedef struct Argon2_position_t {
++    grub_uint32_t pass;
++    grub_uint32_t lane;
++    grub_uint8_t slice;
++    grub_uint32_t index;
++} argon2_position_t;
++
++/*Struct that holds the inputs for thread handling FillSegment*/
++typedef struct Argon2_thread_data {
++    argon2_instance_t *instance_ptr;
++    argon2_position_t pos;
++} argon2_thread_data;
++
++/*************************Argon2 core functions********************************/
++
++/* Allocates memory to the given pointer, uses the appropriate allocator as
++ * specified in the context. Total allocated memory is num*size.
++ * @param context argon2_context which specifies the allocator
++ * @param memory pointer to the pointer to the memory
++ * @param size the size in bytes for each element to be allocated
++ * @param num the number of elements to be allocated
++ * @return ARGON2_OK if @memory is a valid pointer and memory is allocated
++ */
++int allocate_memory(const argon2_context *context, grub_uint8_t **memory,
++                    grub_size_t num, grub_size_t size);
++
++/*
++ * Frees memory at the given pointer, uses the appropriate deallocator as
++ * specified in the context. Also cleans the memory using clear_internal_memory.
++ * @param context argon2_context which specifies the deallocator
++ * @param memory pointer to buffer to be grub_freed
++ * @param size the size in bytes for each element to be deallocated
++ * @param num the number of elements to be deallocated
++ */
++void grub_free_memory(const argon2_context *context, grub_uint8_t *memory,
++                 grub_size_t num, grub_size_t size);
++
++/* Function that securely cleans the memory. This ignores any flags set
++ * regarding clearing memory. Usually one just calls clear_internal_memory.
++ * @param mem Pointer to the memory
++ * @param s Memory size in bytes
++ */
++void secure_wipe_memory(void *v, grub_size_t n);
++
++/* Function that securely clears the memory if FLAG_clear_internal_memory is
++ * set. If the flag isn't set, this function does nothing.
++ * @param mem Pointer to the memory
++ * @param s Memory size in bytes
++ */
++void clear_internal_memory(void *v, grub_size_t n);
++
++/*
++ * Computes absolute position of reference block in the lane following a skewed
++ * distribution and using a pseudo-random value as input
++ * @param instance Pointer to the current instance
++ * @param position Pointer to the current position
++ * @param pseudo_rand 32-bit pseudo-random value used to determine the position
++ * @param same_lane Indicates if the block will be taken from the current lane.
++ * If so we can reference the current segment
++ * @pre All pointers must be valid
++ */
++grub_uint32_t index_alpha(const argon2_instance_t *instance,
++                     const argon2_position_t *position, grub_uint32_t pseudo_rand,
++                     int same_lane);
++
++/*
++ * Function that validates all inputs against predefined restrictions and return
++ * an error code
++ * @param context Pointer to current Argon2 context
++ * @return ARGON2_OK if everything is all right, otherwise one of error codes
++ * (all defined in <argon2.h>
++ */
++int validate_inputs(const argon2_context *context);
++
++/*
++ * Hashes all the inputs into @a blockhash[PREHASH_DIGEST_LENGTH], clears
++ * password and secret if needed
++ * @param  context  Pointer to the Argon2 internal structure containing memory
++ * pointer, and parameters for time and space requirements.
++ * @param  blockhash Buffer for pre-hashing digest
++ * @param  type Argon2 type
++ * @pre    @a blockhash must have at least @a PREHASH_DIGEST_LENGTH bytes
++ * allocated
++ */
++void initial_hash(grub_uint8_t *blockhash, argon2_context *context,
++                  argon2_type type);
++
++/*
++ * Function creates first 2 blocks per lane
++ * @param instance Pointer to the current instance
++ * @param blockhash Pointer to the pre-hashing digest
++ * @pre blockhash must point to @a PREHASH_SEED_LENGTH allocated values
++ */
++void fill_first_blocks(grub_uint8_t *blockhash, const argon2_instance_t *instance);
++
++/*
++ * Function allocates memory, hashes the inputs with Blake,  and creates first
++ * two blocks. Returns the pointer to the main memory with 2 blocks per lane
++ * initialized
++ * @param  context  Pointer to the Argon2 internal structure containing memory
++ * pointer, and parameters for time and space requirements.
++ * @param  instance Current Argon2 instance
++ * @return Zero if successful, -1 if memory failed to allocate. @context->state
++ * will be modified if successful.
++ */
++int initialize(argon2_instance_t *instance, argon2_context *context);
++
++/*
++ * XORing the last block of each lane, hashing it, making the tag. Deallocates
++ * the memory.
++ * @param context Pointer to current Argon2 context (use only the out parameters
++ * from it)
++ * @param instance Pointer to current instance of Argon2
++ * @pre instance->state must point to necessary amount of memory
++ * @pre context->out must point to outlen bytes of memory
++ * @pre if context->grub_free_cbk is not NULL, it should point to a function that
++ * deallocates memory
++ */
++void finalize(const argon2_context *context, argon2_instance_t *instance);
++
++/*
++ * Function that fills the segment using previous segments also from other
++ * threads
++ * @param context current context
++ * @param instance Pointer to the current instance
++ * @param position Current position
++ * @pre all block pointers must be valid
++ */
++void fill_segment(const argon2_instance_t *instance,
++                  argon2_position_t position);
++
++/*
++ * Function that fills the entire memory t_cost times based on the first two
++ * blocks in each lane
++ * @param instance Pointer to the current instance
++ * @return ARGON2_OK if successful, @context->state
++ */
++int fill_memory_blocks(argon2_instance_t *instance);
++
++#endif
+diff --git a/grub-core/lib/argon2/ref.c b/grub-core/lib/argon2/ref.c
+new file mode 100644
+index 000000000..c933df80d
+--- /dev/null
++++ b/grub-core/lib/argon2/ref.c
+@@ -0,0 +1,190 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#include "argon2.h"
++#include "core.h"
++
++#include "blake2/blamka-round-ref.h"
++#include "blake2/blake2-impl.h"
++#include "blake2/blake2.h"
++
++
++/*
++ * Function fills a new memory block and optionally XORs the old block over the new one.
++ * @next_block must be initialized.
++ * @param prev_block Pointer to the previous block
++ * @param ref_block Pointer to the reference block
++ * @param next_block Pointer to the block to be constructed
++ * @param with_xor Whether to XOR into the new block (1) or just overwrite (0)
++ * @pre all block pointers must be valid
++ */
++static void fill_block(const block *prev_block, const block *ref_block,
++                       block *next_block, int with_xor) {
++    block blockR, block_tmp;
++    unsigned i;
++
++    copy_block(&blockR, ref_block);
++    xor_block(&blockR, prev_block);
++    copy_block(&block_tmp, &blockR);
++    /* Now blockR = ref_block + prev_block and block_tmp = ref_block + prev_block */
++    if (with_xor) {
++        /* Saving the next block contents for XOR over: */
++        xor_block(&block_tmp, next_block);
++        /* Now blockR = ref_block + prev_block and
++           block_tmp = ref_block + prev_block + next_block */
++    }
++
++    /* Apply Blake2 on columns of 64-bit words: (0,1,...,15) , then
++       (16,17,..31)... finally (112,113,...127) */
++    for (i = 0; i < 8; ++i) {
++        BLAKE2_ROUND_NOMSG(
++            blockR.v[16 * i], blockR.v[16 * i + 1], blockR.v[16 * i + 2],
++            blockR.v[16 * i + 3], blockR.v[16 * i + 4], blockR.v[16 * i + 5],
++            blockR.v[16 * i + 6], blockR.v[16 * i + 7], blockR.v[16 * i + 8],
++            blockR.v[16 * i + 9], blockR.v[16 * i + 10], blockR.v[16 * i + 11],
++            blockR.v[16 * i + 12], blockR.v[16 * i + 13], blockR.v[16 * i + 14],
++            blockR.v[16 * i + 15]);
++    }
++
++    /* Apply Blake2 on rows of 64-bit words: (0,1,16,17,...112,113), then
++       (2,3,18,19,...,114,115).. finally (14,15,30,31,...,126,127) */
++    for (i = 0; i < 8; i++) {
++        BLAKE2_ROUND_NOMSG(
++            blockR.v[2 * i], blockR.v[2 * i + 1], blockR.v[2 * i + 16],
++            blockR.v[2 * i + 17], blockR.v[2 * i + 32], blockR.v[2 * i + 33],
++            blockR.v[2 * i + 48], blockR.v[2 * i + 49], blockR.v[2 * i + 64],
++            blockR.v[2 * i + 65], blockR.v[2 * i + 80], blockR.v[2 * i + 81],
++            blockR.v[2 * i + 96], blockR.v[2 * i + 97], blockR.v[2 * i + 112],
++            blockR.v[2 * i + 113]);
++    }
++
++    copy_block(next_block, &block_tmp);
++    xor_block(next_block, &blockR);
++}
++
++static void next_addresses(block *address_block, block *input_block,
++                           const block *zero_block) {
++    input_block->v[6]++;
++    fill_block(zero_block, input_block, address_block, 0);
++    fill_block(zero_block, address_block, address_block, 0);
++}
++
++void fill_segment(const argon2_instance_t *instance,
++                  argon2_position_t position) {
++    block *ref_block = NULL, *curr_block = NULL;
++    block address_block, input_block, zero_block;
++    grub_uint64_t pseudo_rand, ref_index, ref_lane;
++    grub_uint32_t prev_offset, curr_offset;
++    grub_uint32_t starting_index;
++    grub_uint32_t i;
++    int data_independent_addressing;
++
++    if (instance == NULL) {
++        return;
++    }
++
++    data_independent_addressing =
++        (instance->type == Argon2_i) ||
++        (instance->type == Argon2_id && (position.pass == 0) &&
++         (position.slice < ARGON2_SYNC_POINTS / 2));
++
++    if (data_independent_addressing) {
++        init_block_value(&zero_block, 0);
++        init_block_value(&input_block, 0);
++
++        input_block.v[0] = position.pass;
++        input_block.v[1] = position.lane;
++        input_block.v[2] = position.slice;
++        input_block.v[3] = instance->memory_blocks;
++        input_block.v[4] = instance->passes;
++        input_block.v[5] = instance->type;
++    }
++
++    starting_index = 0;
++
++    if ((0 == position.pass) && (0 == position.slice)) {
++        starting_index = 2; /* we have already generated the first two blocks */
++
++        /* Don't forget to generate the first block of addresses: */
++        if (data_independent_addressing) {
++            next_addresses(&address_block, &input_block, &zero_block);
++        }
++    }
++
++    /* Offset of the current block */
++    curr_offset = position.lane * instance->lane_length +
++                  position.slice * instance->segment_length + starting_index;
++
++    if (0 == curr_offset % instance->lane_length) {
++        /* Last block in this lane */
++        prev_offset = curr_offset + instance->lane_length - 1;
++    } else {
++        /* Previous block */
++        prev_offset = curr_offset - 1;
++    }
++
++    for (i = starting_index; i < instance->segment_length;
++         ++i, ++curr_offset, ++prev_offset) {
++        /*1.1 Rotating prev_offset if needed */
++        if (curr_offset % instance->lane_length == 1) {
++            prev_offset = curr_offset - 1;
++        }
++
++        /* 1.2 Computing the index of the reference block */
++        /* 1.2.1 Taking pseudo-random value from the previous block */
++        if (data_independent_addressing) {
++            if (i % ARGON2_ADDRESSES_IN_BLOCK == 0) {
++                next_addresses(&address_block, &input_block, &zero_block);
++            }
++            pseudo_rand = address_block.v[i % ARGON2_ADDRESSES_IN_BLOCK];
++        } else {
++            pseudo_rand = instance->memory[prev_offset].v[0];
++        }
++
++        /* 1.2.2 Computing the lane of the reference block */
++        grub_divmod64 (pseudo_rand >> 32, instance->lanes, &ref_lane);
++
++        if ((position.pass == 0) && (position.slice == 0)) {
++            /* Can not reference other lanes yet */
++            ref_lane = position.lane;
++        }
++
++        /* 1.2.3 Computing the number of possible reference block within the
++         * lane.
++         */
++        position.index = i;
++        ref_index = index_alpha(instance, &position, pseudo_rand & 0xFFFFFFFF,
++                                ref_lane == position.lane);
++
++        /* 2 Creating a new block */
++        ref_block =
++            instance->memory + instance->lane_length * ref_lane + ref_index;
++        curr_block = instance->memory + curr_offset;
++        if (ARGON2_VERSION_10 == instance->version) {
++            /* version 1.2.1 and earlier: overwrite, not XOR */
++            fill_block(instance->memory + prev_offset, ref_block, curr_block, 0);
++        } else {
++            if(0 == position.pass) {
++                fill_block(instance->memory + prev_offset, ref_block,
++                           curr_block, 0);
++            } else {
++                fill_block(instance->memory + prev_offset, ref_block,
++                           curr_block, 1);
++            }
++        }
++    }
++}
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/xhci/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch
new file mode 100644
index 00000000..5d56bd61
--- /dev/null
+++ b/config/grub/xhci/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch
@@ -0,0 +1,58 @@
+From 0044d32121bf52c4547c6b3c78f12d7305f57e6b Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 4/6] Error on missing Argon2id parameters
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ grub-core/disk/luks2.c | 13 ++++++++-----
+ 1 file changed, 8 insertions(+), 5 deletions(-)
+
+diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c
+index d5106402f..bc818ea69 100644
+--- a/grub-core/disk/luks2.c
++++ b/grub-core/disk/luks2.c
+@@ -38,6 +38,7 @@ GRUB_MOD_LICENSE ("GPLv3+");
+ enum grub_luks2_kdf_type
+ {
+   LUKS2_KDF_TYPE_ARGON2I,
++  LUKS2_KDF_TYPE_ARGON2ID,
+   LUKS2_KDF_TYPE_PBKDF2
+ };
+ typedef enum grub_luks2_kdf_type grub_luks2_kdf_type_t;
+@@ -90,7 +91,7 @@ struct grub_luks2_keyslot
+ 	grub_int64_t time;
+ 	grub_int64_t memory;
+ 	grub_int64_t cpus;
+-      } argon2i;
++      } argon2;
+       struct
+       {
+ 	const char   *hash;
+@@ -160,10 +161,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot)
+     return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing or invalid KDF");
+   else if (!grub_strcmp (type, "argon2i") || !grub_strcmp (type, "argon2id"))
+     {
+-      out->kdf.type = LUKS2_KDF_TYPE_ARGON2I;
+-      if (grub_json_getint64 (&out->kdf.u.argon2i.time, &kdf, "time") ||
+-	  grub_json_getint64 (&out->kdf.u.argon2i.memory, &kdf, "memory") ||
+-	  grub_json_getint64 (&out->kdf.u.argon2i.cpus, &kdf, "cpus"))
++      out->kdf.type = !grub_strcmp (type, "argon2i")
++		      ? LUKS2_KDF_TYPE_ARGON2I : LUKS2_KDF_TYPE_ARGON2ID;
++      if (grub_json_getint64 (&out->kdf.u.argon2.time, &kdf, "time") ||
++	  grub_json_getint64 (&out->kdf.u.argon2.memory, &kdf, "memory") ||
++	  grub_json_getint64 (&out->kdf.u.argon2.cpus, &kdf, "cpus"))
+ 	return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing Argon2i parameters");
+     }
+   else if (!grub_strcmp (type, "pbkdf2"))
+@@ -459,6 +461,7 @@ luks2_decrypt_key (grub_uint8_t *out_key,
+   switch (k->kdf.type)
+     {
+       case LUKS2_KDF_TYPE_ARGON2I:
++      case LUKS2_KDF_TYPE_ARGON2ID:
+ 	ret = grub_error (GRUB_ERR_BAD_ARGUMENT, "Argon2 not supported");
+ 	goto err;
+       case LUKS2_KDF_TYPE_PBKDF2:
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch b/config/grub/xhci/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch
new file mode 100644
index 00000000..f2e26fd4
--- /dev/null
+++ b/config/grub/xhci/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch
@@ -0,0 +1,83 @@
+From 0a21695c55f76f1c958bb633481d55b3168562f7 Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 5/6] Compile with Argon2id support
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ Makefile.util.def           |  6 +++++-
+ grub-core/Makefile.core.def |  2 +-
+ grub-core/disk/luks2.c      | 13 +++++++++++--
+ 3 files changed, 17 insertions(+), 4 deletions(-)
+
+diff --git a/Makefile.util.def b/Makefile.util.def
+index 1e9a13d3e..a167825c3 100644
+--- a/Makefile.util.def
++++ b/Makefile.util.def
+@@ -3,7 +3,7 @@ AutoGen definitions Makefile.tpl;
+ library = {
+   name = libgrubkern.a;
+   cflags = '$(CFLAGS_GNULIB)';
+-  cppflags = '$(CPPFLAGS_GNULIB) -I$(srcdir)/grub-core/lib/json';
++  cppflags = '$(CPPFLAGS_GNULIB) -I$(srcdir)/grub-core/lib/json -I$(srcdir)/grub-core/lib/argon2';
+ 
+   common = util/misc.c;
+   common = grub-core/kern/command.c;
+@@ -36,6 +36,10 @@ library = {
+   common = grub-core/kern/misc.c;
+   common = grub-core/kern/partition.c;
+   common = grub-core/lib/crypto.c;
++  common = grub-core/lib/argon2/argon2.c;
++  common = grub-core/lib/argon2/core.c;
++  common = grub-core/lib/argon2/ref.c;
++  common = grub-core/lib/argon2/blake2/blake2b.c;
+   common = grub-core/lib/json/json.c;
+   common = grub-core/disk/luks.c;
+   common = grub-core/disk/luks2.c;
+diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
+index 4a06789e5..e939dcc99 100644
+--- a/grub-core/Makefile.core.def
++++ b/grub-core/Makefile.core.def
+@@ -1238,7 +1238,7 @@ module = {
+   common = disk/luks2.c;
+   common = lib/gnulib/base64.c;
+   cflags = '$(CFLAGS_POSIX) $(CFLAGS_GNULIB)';
+-  cppflags = '$(CPPFLAGS_POSIX) $(CPPFLAGS_GNULIB) -I$(srcdir)/lib/json';
++  cppflags = '$(CPPFLAGS_POSIX) $(CPPFLAGS_GNULIB) -I$(srcdir)/lib/json -I$(srcdir)/lib/argon2';
+ };
+ 
+ module = {
+diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c
+index bc818ea69..5b9eaa599 100644
+--- a/grub-core/disk/luks2.c
++++ b/grub-core/disk/luks2.c
+@@ -27,6 +27,7 @@
+ #include <grub/partition.h>
+ #include <grub/i18n.h>
+ 
++#include <argon2.h>
+ #include <base64.h>
+ #include <json.h>
+ 
+@@ -462,8 +463,16 @@ luks2_decrypt_key (grub_uint8_t *out_key,
+     {
+       case LUKS2_KDF_TYPE_ARGON2I:
+       case LUKS2_KDF_TYPE_ARGON2ID:
+-	ret = grub_error (GRUB_ERR_BAD_ARGUMENT, "Argon2 not supported");
+-	goto err;
++	ret = argon2_hash (k->kdf.u.argon2.time, k->kdf.u.argon2.memory, k->kdf.u.argon2.cpus,
++			   passphrase, passphraselen, salt, saltlen, area_key, k->area.key_size,
++			   k->kdf.type == LUKS2_KDF_TYPE_ARGON2I ? Argon2_i : Argon2_id,
++			   ARGON2_VERSION_NUMBER);
++        if (ret)
++	  {
++	    grub_dprintf ("luks2", "Argon2 failed: %s\n", argon2_error_message (ret));
++	    goto err;
++	  }
++        break;
+       case LUKS2_KDF_TYPE_PBKDF2:
+ 	hash = grub_crypto_lookup_md_by_name (k->kdf.u.pbkdf2.hash);
+ 	if (!hash)
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/xhci/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch
new file mode 100644
index 00000000..dc65b7a6
--- /dev/null
+++ b/config/grub/xhci/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch
@@ -0,0 +1,26 @@
+From 6c9a6625c0dc038d1bdbdc13665f40e269e86496 Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 6/6] Make grub-install work with Argon2
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ util/grub-install.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/util/grub-install.c b/util/grub-install.c
+index 1ad04db36..a8a3330b8 100644
+--- a/util/grub-install.c
++++ b/util/grub-install.c
+@@ -448,6 +448,8 @@ probe_mods (grub_disk_t disk)
+     {
+       grub_util_cryptodisk_get_abstraction (disk,
+ 					    push_cryptodisk_module, NULL);
++      /* HACK: always push argon2 */
++      grub_install_push_module ("argon2");
+       have_abstractions = 1;
+       have_cryptodisk = 1;
+     }
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/xhci/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
new file mode 100644
index 00000000..21e8630b
--- /dev/null
+++ b/config/grub/xhci/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -0,0 +1,107 @@
+From 96c0bbe5d406b616360a7fce7cee67d7692c0d6d Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 30 Oct 2023 22:19:21 +0000
+Subject: [PATCH 1/1] at_keyboard coreboot: force scancodes2+translate
+
+Scan code set 2 with translation should be assumed in
+every case, as the default starting position.
+
+However, GRUB is trying to detect and use other modes
+such as set 2 without translation, or set 1 without
+translation from set 2; it also detects no-mode and
+assumes mode 1, on really old keyboards.
+
+The current behaviour has been retained, for everything
+except GRUB_MACHINE_COREBOOT; for the latter, scan code
+set 2 with translation is hardcoded, and forced in code.
+
+This is required to make keyboard initialisation work on
+the MEC5035 EC used by the Dell Latitude E6400, when
+running GRUB as a coreboot payload on that laptop. The
+EC reports scancode set 2 with translation when probed,
+but actually only outputs scancode set 1.
+
+Since GRUB is attempting to use it without translation,
+and since the machine reports set 2 with translation,
+but only ever outputs set 1 scancodes, this results in
+wrong keypresses for every key.
+
+This fix fixed that, by forcing set 2 with translation,
+treating it as set 1, but only on coreboot. This is the
+same behaviour used in GNU+Linux systems and SeaBIOS.
+With this change, GRUB keyboard initialisation now works
+just fine on those machines.
+
+This has *also* been tested on other coreboot machines
+running GRUB; several HP EliteBooks, ThinkPads and
+Dell Precision T1650. All seems to work just fine.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/term/at_keyboard.c | 20 ++++++++++++++++++--
+ 1 file changed, 18 insertions(+), 2 deletions(-)
+
+diff --git a/grub-core/term/at_keyboard.c b/grub-core/term/at_keyboard.c
+index f8a129eb7..8207225c2 100644
+--- a/grub-core/term/at_keyboard.c
++++ b/grub-core/term/at_keyboard.c
+@@ -138,6 +138,7 @@ write_mode (int mode)
+   return (i != GRUB_AT_TRIES);
+ }
+ 
++#if !defined (GRUB_MACHINE_COREBOOT)
+ static int
+ query_mode (void)
+ {
+@@ -161,10 +162,12 @@ query_mode (void)
+     return 3;
+   return 0;
+ }
++#endif
+ 
+ static void
+ set_scancodes (void)
+ {
++#if !defined (GRUB_MACHINE_COREBOOT)
+   /* You must have visited computer museum. Keyboard without scancode set
+      knowledge. Assume XT. */
+   if (!grub_keyboard_orig_set)
+@@ -173,20 +176,33 @@ set_scancodes (void)
+       ps2_state.current_set = 1;
+       return;
+     }
++#endif
+ 
+ #if !USE_SCANCODE_SET
+   ps2_state.current_set = 1;
+   return;
+-#else
++#endif
+ 
++#if defined (GRUB_MACHINE_COREBOOT)
++  /* enable translation */
++  grub_keyboard_controller_write (grub_keyboard_controller_orig
++				  & ~KEYBOARD_AT_DISABLE);
++#else
++  /* if not coreboot, disable translation and try mode 2 first, before 1 */
+   grub_keyboard_controller_write (grub_keyboard_controller_orig
+ 				  & ~KEYBOARD_AT_TRANSLATE
+ 				  & ~KEYBOARD_AT_DISABLE);
++#endif
+ 
+   keyboard_controller_wait_until_ready ();
+   grub_outb (KEYBOARD_COMMAND_ENABLE, KEYBOARD_REG_DATA);
+-
+   write_mode (2);
++
++#if defined (GRUB_MACHINE_COREBOOT)
++  /* mode 2 with translation, so make grub treat as set 1 */
++  ps2_state.current_set = 1;
++#else
++  /* if not coreboot, translation isn't set; test 2 and fall back to 1 */
+   ps2_state.current_set = query_mode ();
+   grub_dprintf ("atkeyb", "returned set %d\n", ps2_state.current_set);
+   if (ps2_state.current_set == 2)
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/xhci/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
new file mode 100644
index 00000000..fbef86a4
--- /dev/null
+++ b/config/grub/xhci/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
@@ -0,0 +1,38 @@
+From 0a6abeb40ac4284fbff6ef5958989d561b6290a7 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 31 Oct 2023 10:33:28 +0000
+Subject: [PATCH 1/1] keylayouts: don't print "Unknown key" message
+
+on keyboards with stuck keys, this results in GRUB just
+spewing it repeatedly, preventing use of GRUB.
+
+in such cases, it's still possible to use the keyboard,
+and we should let the user at least boot.
+
+it often appears when people plug in faulty usb keyboards,
+but can appear for laptop keyboards too; one of my e6400
+has stuck keys.
+
+with this patch, grub should be a bit more reliable in
+terms of user experience, when the keyboard is faulty.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/commands/keylayouts.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/grub-core/commands/keylayouts.c b/grub-core/commands/keylayouts.c
+index aa3ba34f2..445fa0601 100644
+--- a/grub-core/commands/keylayouts.c
++++ b/grub-core/commands/keylayouts.c
+@@ -174,7 +174,6 @@ grub_term_map_key (grub_keyboard_key_t code, int status)
+   key = map_key_core (code, status, &alt_gr_consumed);
+ 
+   if (key == 0 || key == GRUB_TERM_SHIFT) {
+-    grub_printf ("Unknown key 0x%x detected\n", code);
+     return GRUB_TERM_NO_KEY;
+   }
+ 
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/xhci/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
new file mode 100644
index 00000000..25091d16
--- /dev/null
+++ b/config/grub/xhci/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -0,0 +1,102 @@
+From 9e7a651a0f15f2e9dec65a77765c3c4fd97b4165 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 16:14:58 +0000
+Subject: [PATCH 1/1] don't print missing prefix errors on the screen
+
+we do actually set the prefix. this patch modifies
+grub to still set grub_errno and return accordingly,
+so the behaviour is otherwise identical, but it will
+no longer print a warning message on the screen.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/commands/keylayouts.c | 2 +-
+ grub-core/commands/loadenv.c    | 2 +-
+ grub-core/commands/nativedisk.c | 2 +-
+ grub-core/efiemu/main.c         | 3 +--
+ grub-core/font/font.c           | 2 +-
+ grub-core/kern/dl.c             | 2 +-
+ 6 files changed, 6 insertions(+), 7 deletions(-)
+
+diff --git a/grub-core/commands/keylayouts.c b/grub-core/commands/keylayouts.c
+index 445fa0601..00bcf7025 100644
+--- a/grub-core/commands/keylayouts.c
++++ b/grub-core/commands/keylayouts.c
+@@ -211,7 +211,7 @@ grub_cmd_keymap (struct grub_command *cmd __attribute__ ((unused)),
+     {
+       const char *prefix = grub_env_get ("prefix");
+       if (!prefix)
+-	return grub_error (GRUB_ERR_BAD_ARGUMENT, N_("variable `%s' isn't set"), "prefix");
++	return (grub_errno = GRUB_ERR_BAD_ARGUMENT);
+       filename = grub_xasprintf ("%s/layouts/%s.gkb", prefix, argv[0]);
+       if (!filename)
+ 	return grub_errno;
+diff --git a/grub-core/commands/loadenv.c b/grub-core/commands/loadenv.c
+index 166445849..699b39bfa 100644
+--- a/grub-core/commands/loadenv.c
++++ b/grub-core/commands/loadenv.c
+@@ -58,7 +58,7 @@ open_envblk_file (char *filename,
+       prefix = grub_env_get ("prefix");
+       if (! prefix)
+         {
+-          grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++          grub_errno = GRUB_ERR_FILE_NOT_FOUND;
+           return 0;
+         }
+ 
+diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c
+index 580c8d3b0..6806bff9c 100644
+--- a/grub-core/commands/nativedisk.c
++++ b/grub-core/commands/nativedisk.c
+@@ -186,7 +186,7 @@ grub_cmd_nativedisk (grub_command_t cmd __attribute__ ((unused)),
+   prefix = grub_env_get ("prefix");
+ 
+   if (! prefix)
+-    return grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++    return (grub_errno = GRUB_ERR_FILE_NOT_FOUND);
+ 
+   if (prefix)
+     path_prefix = (prefix[0] == '(') ? grub_strchr (prefix, ')') : NULL;
+diff --git a/grub-core/efiemu/main.c b/grub-core/efiemu/main.c
+index e7037f4ed..e5d4dbff1 100644
+--- a/grub-core/efiemu/main.c
++++ b/grub-core/efiemu/main.c
+@@ -231,8 +231,7 @@ grub_efiemu_autocore (void)
+   prefix = grub_env_get ("prefix");
+ 
+   if (! prefix)
+-    return grub_error (GRUB_ERR_FILE_NOT_FOUND,
+-		       N_("variable `%s' isn't set"), "prefix");
++    return (grub_errno = GRUB_ERR_FILE_NOT_FOUND);
+ 
+   suffix = grub_efiemu_get_default_core_name ();
+ 
+diff --git a/grub-core/font/font.c b/grub-core/font/font.c
+index 18de52562..2a0fea6c8 100644
+--- a/grub-core/font/font.c
++++ b/grub-core/font/font.c
+@@ -461,7 +461,7 @@ grub_font_load (const char *filename)
+ 
+ 	  if (!prefix)
+ 	    {
+-	      grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++              grub_errno = GRUB_ERR_FILE_NOT_FOUND;
+ 	      goto fail;
+ 	    }
+ 	  file = try_open_from_prefix (prefix, filename);
+diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
+index 4011e2d15..af3bd00d0 100644
+--- a/grub-core/kern/dl.c
++++ b/grub-core/kern/dl.c
+@@ -758,7 +758,7 @@ grub_dl_load (const char *name)
+     return 0;
+ 
+   if (! grub_dl_dir) {
+-    grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++    grub_errno = GRUB_ERR_FILE_NOT_FOUND;
+     return 0;
+   }
+ 
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch b/config/grub/xhci/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
new file mode 100644
index 00000000..f4cf939e
--- /dev/null
+++ b/config/grub/xhci/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
@@ -0,0 +1,34 @@
+From 6237c5762edccc1e1fa4746b1d4aa5e8d81e4883 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 16:36:22 +0000
+Subject: [PATCH 1/1] don't print error if module not found
+
+still set grub_errno accordingly, and otherwise
+behave the same. in libreboot, we remove a lot of
+modules but then rely on loading a grub.cfg
+provided by a distro; in almost all cases that works,
+but also in almost all cases, that will try to load
+a module we don't actually need, but then it prints
+a message. this can annoy some users, so silence it.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/kern/dl.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
+index af3bd00d0..21d0cedb1 100644
+--- a/grub-core/kern/dl.c
++++ b/grub-core/kern/dl.c
+@@ -486,7 +486,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
+ 
+   s = grub_dl_find_section (e, ".modname");
+   if (!s)
+-    return grub_error (GRUB_ERR_BAD_MODULE, "no module name found");
++    return (grub_errno = GRUB_ERR_BAD_MODULE);
+ 
+   mod->name = grub_strdup ((char *) e + s->sh_offset);
+   if (! mod->name)
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch b/config/grub/xhci/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
new file mode 100644
index 00000000..25221c9c
--- /dev/null
+++ b/config/grub/xhci/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
@@ -0,0 +1,31 @@
+From e5b7ec81421487e71bcaf8b6b5a27f3649a62753 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 17:25:20 +0000
+Subject: [PATCH 1/1] don't print empty error messages
+
+this is part two of the quest to kill the prefix
+error message. after i disabled prefix-related
+messages, it still printed "error: ." on screen.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/kern/err.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/grub-core/kern/err.c b/grub-core/kern/err.c
+index 53c734de7..7cac53983 100644
+--- a/grub-core/kern/err.c
++++ b/grub-core/kern/err.c
+@@ -107,7 +107,8 @@ grub_print_error (void)
+     {
+       if (grub_errno != GRUB_ERR_NONE)
+ 	{
+-	  grub_err_printf (_("error: %s.\n"), grub_errmsg);
++          if (grub_strlen(grub_errmsg) > 0)
++	    grub_err_printf (_("error: %s.\n"), grub_errmsg);
+ 	  grub_err_printed_errors++;
+ 	}
+     }
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch b/config/grub/xhci/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
new file mode 100644
index 00000000..f533269f
--- /dev/null
+++ b/config/grub/xhci/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
@@ -0,0 +1,245 @@
+From 90c9011f2e0350a97e3df44b0fc6dd022e04c276 Mon Sep 17 00:00:00 2001
+From: Patrick Rudolph <patrick.rudolph@9elements.com>
+Date: Sun, 15 Nov 2020 19:00:27 +0100
+Subject: [PATCH 1/8] grub-core/bus/usb: Parse SuperSpeed companion descriptors
+
+Parse the SS_ENDPOINT_COMPANION descriptor, which is only present on USB 3.0
+capable devices and xHCI controllers. Make the descendp an array of pointers
+to the endpoint descriptor as it's no longer an continous array.
+
+Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
+---
+ grub-core/bus/usb/serial/common.c |  2 +-
+ grub-core/bus/usb/usb.c           | 44 +++++++++++++++++++------------
+ grub-core/bus/usb/usbhub.c        | 22 ++++++++++++----
+ grub-core/commands/usbtest.c      |  2 +-
+ grub-core/disk/usbms.c            |  2 +-
+ grub-core/term/usb_keyboard.c     |  2 +-
+ include/grub/usb.h                |  2 +-
+ include/grub/usbdesc.h            | 11 +++++++-
+ 8 files changed, 59 insertions(+), 28 deletions(-)
+
+diff --git a/grub-core/bus/usb/serial/common.c b/grub-core/bus/usb/serial/common.c
+index e9c995a0a..fc847d66d 100644
+--- a/grub-core/bus/usb/serial/common.c
++++ b/grub-core/bus/usb/serial/common.c
+@@ -72,7 +72,7 @@ grub_usbserial_attach (grub_usb_device_t usbdev, int configno, int interfno,
+   for (j = 0; j < interf->endpointcnt; j++)
+     {
+       struct grub_usb_desc_endp *endp;
+-      endp = &usbdev->config[0].interf[interfno].descendp[j];
++      endp = usbdev->config[0].interf[interfno].descendp[j];
+ 
+       if ((endp->endp_addr & 128) && (endp->attrib & 3) == 2
+ 	  && (in_endp == GRUB_USB_SERIAL_ENDPOINT_LAST_MATCHING
+diff --git a/grub-core/bus/usb/usb.c b/grub-core/bus/usb/usb.c
+index 7bd49d201..e578af793 100644
+--- a/grub-core/bus/usb/usb.c
++++ b/grub-core/bus/usb/usb.c
+@@ -118,7 +118,7 @@ grub_usb_device_initialize (grub_usb_device_t dev)
+   struct grub_usb_desc_device *descdev;
+   struct grub_usb_desc_config config;
+   grub_usb_err_t err;
+-  int i;
++  int i, j;
+ 
+   /* First we have to read first 8 bytes only and determine
+    * max. size of packet */
+@@ -152,6 +152,7 @@ grub_usb_device_initialize (grub_usb_device_t dev)
+       int currif;
+       char *data;
+       struct grub_usb_desc *desc;
++      struct grub_usb_desc_endp *endp;
+ 
+       /* First just read the first 4 bytes of the configuration
+ 	 descriptor, after that it is known how many bytes really have
+@@ -201,24 +202,27 @@ grub_usb_device_initialize (grub_usb_device_t dev)
+ 	    = (struct grub_usb_desc_if *) &data[pos];
+ 	  pos += dev->config[i].interf[currif].descif->length;
+ 
++    dev->config[i].interf[currif].descendp = grub_malloc (
++            dev->config[i].interf[currif].descif->endpointcnt *
++            sizeof(struct grub_usb_desc_endp));
++
++    j = 0;
+ 	  while (pos < config.totallen)
+             {
+               desc = (struct grub_usb_desc *)&data[pos];
+-              if (desc->type == GRUB_USB_DESCRIPTOR_ENDPOINT)
+-                break;
+-              if (!desc->length)
+-                {
+-                  err = GRUB_USB_ERR_BADDEVICE;
+-                  goto fail;
+-                }
+-              pos += desc->length;
+-            }
+-
+-	  /* Point to the first endpoint.  */
+-	  dev->config[i].interf[currif].descendp
+-	    = (struct grub_usb_desc_endp *) &data[pos];
+-	  pos += (sizeof (struct grub_usb_desc_endp)
+-		  * dev->config[i].interf[currif].descif->endpointcnt);
++              if (desc->type == GRUB_USB_DESCRIPTOR_ENDPOINT) {
++                endp = (struct grub_usb_desc_endp *) &data[pos];
++                dev->config[i].interf[currif].descendp[j++] = endp;
++                pos += desc->length;
++              } else {
++                if (!desc->length)
++                  {
++                    err = GRUB_USB_ERR_BADDEVICE;
++                    goto fail;
++                  }
++                pos += desc->length;
++             }
++	  }
+ 	}
+     }
+ 
+@@ -226,8 +230,14 @@ grub_usb_device_initialize (grub_usb_device_t dev)
+ 
+  fail:
+ 
+-  for (i = 0; i < GRUB_USB_MAX_CONF; i++)
++  for (i = 0; i < GRUB_USB_MAX_CONF; i++) {
++    int currif;
++
++    for (currif = 0; currif < dev->config[i].descconf->numif; currif++)
++      grub_free (dev->config[i].interf[currif].descendp);
++
+     grub_free (dev->config[i].descconf);
++  }
+ 
+   return err;
+ }
+diff --git a/grub-core/bus/usb/usbhub.c b/grub-core/bus/usb/usbhub.c
+index f5608e330..2ae29cba1 100644
+--- a/grub-core/bus/usb/usbhub.c
++++ b/grub-core/bus/usb/usbhub.c
+@@ -82,8 +82,14 @@ grub_usb_hub_add_dev (grub_usb_controller_t controller,
+   if (i == GRUB_USBHUB_MAX_DEVICES)
+     {
+       grub_error (GRUB_ERR_IO, "can't assign address to USB device");
+-      for (i = 0; i < GRUB_USB_MAX_CONF; i++)
+-        grub_free (dev->config[i].descconf);
++      for (i = 0; i < GRUB_USB_MAX_CONF; i++) {
++	int currif;
++
++	for (currif = 0; currif < dev->config[i].descconf->numif; currif++)
++	  grub_free (dev->config[i].interf[currif].descendp);
++
++	grub_free (dev->config[i].descconf);
++      }
+       grub_free (dev);
+       return NULL;
+     }
+@@ -96,8 +102,14 @@ grub_usb_hub_add_dev (grub_usb_controller_t controller,
+ 			      i, 0, 0, NULL);
+   if (err)
+     {
+-      for (i = 0; i < GRUB_USB_MAX_CONF; i++)
+-        grub_free (dev->config[i].descconf);
++      for (i = 0; i < GRUB_USB_MAX_CONF; i++) {
++	int currif;
++
++	for (currif = 0; currif < dev->config[i].descconf->numif; currif++)
++	  grub_free (dev->config[i].interf[currif].descendp);
++
++	grub_free (dev->config[i].descconf);
++      }
+       grub_free (dev);
+       return NULL;
+     }
+@@ -176,7 +188,7 @@ grub_usb_add_hub (grub_usb_device_t dev)
+        i++)
+     {
+       struct grub_usb_desc_endp *endp = NULL;
+-      endp = &dev->config[0].interf[0].descendp[i];
++      endp = dev->config[0].interf[0].descendp[i];
+ 
+       if ((endp->endp_addr & 128) && grub_usb_get_ep_type(endp)
+ 	  == GRUB_USB_EP_INTERRUPT)
+diff --git a/grub-core/commands/usbtest.c b/grub-core/commands/usbtest.c
+index 2c6d93fe6..55a657635 100644
+--- a/grub-core/commands/usbtest.c
++++ b/grub-core/commands/usbtest.c
+@@ -185,7 +185,7 @@ usb_iterate (grub_usb_device_t dev, void *data __attribute__ ((unused)))
+       for (j = 0; j < interf->endpointcnt; j++)
+ 	{
+ 	  struct grub_usb_desc_endp *endp;
+-	  endp = &dev->config[0].interf[i].descendp[j];
++	  endp = dev->config[0].interf[i].descendp[j];
+ 
+ 	  grub_printf ("Endpoint #%d: %s, max packed size: %d, transfer type: %s, latency: %d\n",
+ 		       endp->endp_addr & 15,
+diff --git a/grub-core/disk/usbms.c b/grub-core/disk/usbms.c
+index b81e3ad9d..b1512dc12 100644
+--- a/grub-core/disk/usbms.c
++++ b/grub-core/disk/usbms.c
+@@ -184,7 +184,7 @@ grub_usbms_attach (grub_usb_device_t usbdev, int configno, int interfno)
+   for (j = 0; j < interf->endpointcnt; j++)
+     {
+       struct grub_usb_desc_endp *endp;
+-      endp = &usbdev->config[0].interf[interfno].descendp[j];
++      endp = usbdev->config[0].interf[interfno].descendp[j];
+ 
+       if ((endp->endp_addr & 128) && (endp->attrib & 3) == 2)
+ 	/* Bulk IN endpoint.  */
+diff --git a/grub-core/term/usb_keyboard.c b/grub-core/term/usb_keyboard.c
+index 7322d8dff..d590979f5 100644
+--- a/grub-core/term/usb_keyboard.c
++++ b/grub-core/term/usb_keyboard.c
+@@ -175,7 +175,7 @@ grub_usb_keyboard_attach (grub_usb_device_t usbdev, int configno, int interfno)
+   for (j = 0; j < usbdev->config[configno].interf[interfno].descif->endpointcnt;
+        j++)
+     {
+-      endp = &usbdev->config[configno].interf[interfno].descendp[j];
++      endp = usbdev->config[configno].interf[interfno].descendp[j];
+ 
+       if ((endp->endp_addr & 128) && grub_usb_get_ep_type(endp)
+ 	  == GRUB_USB_EP_INTERRUPT)
+diff --git a/include/grub/usb.h b/include/grub/usb.h
+index 0f346af12..688c11f6d 100644
+--- a/include/grub/usb.h
++++ b/include/grub/usb.h
+@@ -153,7 +153,7 @@ struct grub_usb_interface
+ {
+   struct grub_usb_desc_if *descif;
+ 
+-  struct grub_usb_desc_endp *descendp;
++  struct grub_usb_desc_endp **descendp;
+ 
+   /* A driver is handling this interface. Do we need to support multiple drivers
+      for single interface?
+diff --git a/include/grub/usbdesc.h b/include/grub/usbdesc.h
+index aac5ab05a..bb2ab2e27 100644
+--- a/include/grub/usbdesc.h
++++ b/include/grub/usbdesc.h
+@@ -29,7 +29,8 @@ typedef enum {
+   GRUB_USB_DESCRIPTOR_INTERFACE,
+   GRUB_USB_DESCRIPTOR_ENDPOINT,
+   GRUB_USB_DESCRIPTOR_DEBUG = 10,
+-  GRUB_USB_DESCRIPTOR_HUB = 0x29
++  GRUB_USB_DESCRIPTOR_HUB = 0x29,
++  GRUB_USB_DESCRIPTOR_SS_ENDPOINT_COMPANION = 0x30
+ } grub_usb_descriptor_t;
+ 
+ struct grub_usb_desc
+@@ -105,6 +106,14 @@ struct grub_usb_desc_endp
+   grub_uint8_t interval;
+ } GRUB_PACKED;
+ 
++struct grub_usb_desc_ssep {
++  grub_uint8_t  length;
++  grub_uint8_t  type;
++  grub_uint8_t  maxburst;
++  grub_uint8_t  attrib;
++  grub_uint16_t interval;
++} GRUB_PACKED;
++
+ struct grub_usb_desc_str
+ {
+   grub_uint8_t length;
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch b/config/grub/xhci/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch
new file mode 100644
index 00000000..d61da615
--- /dev/null
+++ b/config/grub/xhci/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch
@@ -0,0 +1,29 @@
+From e111983ca5e2a52bfe2bdc5cd639b06bb2f7902d Mon Sep 17 00:00:00 2001
+From: Patrick Rudolph <patrick.rudolph@9elements.com>
+Date: Sun, 15 Nov 2020 19:47:06 +0100
+Subject: [PATCH 2/8] usb: Add enum for xHCI
+
+Will be used in future patches.
+
+Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
+---
+ include/grub/usb.h | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/include/grub/usb.h b/include/grub/usb.h
+index 688c11f6d..ea6ee8c2c 100644
+--- a/include/grub/usb.h
++++ b/include/grub/usb.h
+@@ -51,7 +51,8 @@ typedef enum
+     GRUB_USB_SPEED_NONE,
+     GRUB_USB_SPEED_LOW,
+     GRUB_USB_SPEED_FULL,
+-    GRUB_USB_SPEED_HIGH
++    GRUB_USB_SPEED_HIGH,
++    GRUB_USB_SPEED_SUPER
+   } grub_usb_speed_t;
+ 
+ typedef int (*grub_usb_iterate_hook_t) (grub_usb_device_t dev, void *data);
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch b/config/grub/xhci/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch
new file mode 100644
index 00000000..70e73ca2
--- /dev/null
+++ b/config/grub/xhci/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch
@@ -0,0 +1,33 @@
+From 3e25c83a1d1c6e149c7e9f0660ddadb2beca2476 Mon Sep 17 00:00:00 2001
+From: Patrick Rudolph <patrick.rudolph@9elements.com>
+Date: Sun, 15 Nov 2020 19:48:03 +0100
+Subject: [PATCH 3/8] usbtrans: Set default maximum packet size
+
+Set the maximum packet size to 512 for SuperSpeed devices.
+
+Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
+---
+ grub-core/bus/usb/usbtrans.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/grub-core/bus/usb/usbtrans.c b/grub-core/bus/usb/usbtrans.c
+index c5680b33a..c1080bb33 100644
+--- a/grub-core/bus/usb/usbtrans.c
++++ b/grub-core/bus/usb/usbtrans.c
+@@ -128,8 +128,12 @@ grub_usb_control_msg (grub_usb_device_t dev,
+   setupdata_addr = grub_dma_get_phys (setupdata_chunk);
+ 
+   /* Determine the maximum packet size.  */
+-  if (dev->descdev.maxsize0)
++  if (dev->descdev.maxsize0 && dev->speed != GRUB_USB_SPEED_SUPER)
+     max = dev->descdev.maxsize0;
++  else if (dev->descdev.maxsize0 && dev->speed == GRUB_USB_SPEED_SUPER)
++    max = 1UL << dev->descdev.maxsize0;
++  else if (dev->speed == GRUB_USB_SPEED_SUPER)
++    max = 512;
+   else
+     max = 64;
+ 
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch b/config/grub/xhci/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
new file mode 100644
index 00000000..a090e0ea
--- /dev/null
+++ b/config/grub/xhci/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
@@ -0,0 +1,121 @@
+From 89701aba00caa81bb566ab10da0c89264393be30 Mon Sep 17 00:00:00 2001
+From: Patrick Rudolph <patrick.rudolph@9elements.com>
+Date: Sun, 15 Nov 2020 19:51:42 +0100
+Subject: [PATCH 4/8] grub-core/bus/usb: Add function pointer for attach/detach
+ events
+
+The xHCI code needs to be called for attaching or detaching a device.
+Introduce two functions pointers and call it from the USB hub code.
+
+Will be used in future commits, currently this doesn't change any functionality.
+
+Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
+---
+ grub-core/bus/usb/ehci.c   |  2 ++
+ grub-core/bus/usb/ohci.c   |  2 ++
+ grub-core/bus/usb/uhci.c   |  2 ++
+ grub-core/bus/usb/usbhub.c | 19 +++++++++++++++++++
+ include/grub/usb.h         |  4 ++++
+ 5 files changed, 29 insertions(+)
+
+diff --git a/grub-core/bus/usb/ehci.c b/grub-core/bus/usb/ehci.c
+index 9abebc6bd..953b851c0 100644
+--- a/grub-core/bus/usb/ehci.c
++++ b/grub-core/bus/usb/ehci.c
+@@ -1812,6 +1812,8 @@ static struct grub_usb_controller_dev usb_controller = {
+   .hubports = grub_ehci_hubports,
+   .portstatus = grub_ehci_portstatus,
+   .detect_dev = grub_ehci_detect_dev,
++  .attach_dev = NULL,
++  .detach_dev = NULL,
+   /* estimated max. count of TDs for one bulk transfer */
+   .max_bulk_tds = GRUB_EHCI_N_TD * 3 / 4
+ };
+diff --git a/grub-core/bus/usb/ohci.c b/grub-core/bus/usb/ohci.c
+index 5363a61f6..7a3f3e154 100644
+--- a/grub-core/bus/usb/ohci.c
++++ b/grub-core/bus/usb/ohci.c
+@@ -1440,6 +1440,8 @@ static struct grub_usb_controller_dev usb_controller =
+   .hubports = grub_ohci_hubports,
+   .portstatus = grub_ohci_portstatus,
+   .detect_dev = grub_ohci_detect_dev,
++  .attach_dev = NULL,
++  .detach_dev = NULL,
+   /* estimated max. count of TDs for one bulk transfer */
+   .max_bulk_tds = GRUB_OHCI_TDS * 3 / 4
+ };
+diff --git a/grub-core/bus/usb/uhci.c b/grub-core/bus/usb/uhci.c
+index 0fdea4c1e..03c4605b2 100644
+--- a/grub-core/bus/usb/uhci.c
++++ b/grub-core/bus/usb/uhci.c
+@@ -845,6 +845,8 @@ static struct grub_usb_controller_dev usb_controller =
+   .hubports = grub_uhci_hubports,
+   .portstatus = grub_uhci_portstatus,
+   .detect_dev = grub_uhci_detect_dev,
++  .attach_dev = NULL,
++  .detach_dev = NULL,
+   /* estimated max. count of TDs for one bulk transfer */
+   .max_bulk_tds = N_TD * 3 / 4
+ };
+diff --git a/grub-core/bus/usb/usbhub.c b/grub-core/bus/usb/usbhub.c
+index 2ae29cba1..8e963e84b 100644
+--- a/grub-core/bus/usb/usbhub.c
++++ b/grub-core/bus/usb/usbhub.c
+@@ -66,6 +66,15 @@ grub_usb_hub_add_dev (grub_usb_controller_t controller,
+   dev->split_hubport = split_hubport;
+   dev->split_hubaddr = split_hubaddr;
+ 
++  if (controller->dev->attach_dev) {
++    err = controller->dev->attach_dev (controller, dev);
++    if (err)
++      {
++	grub_free (dev);
++	return NULL;
++      }
++  }
++
+   err = grub_usb_device_initialize (dev);
+   if (err)
+     {
+@@ -405,6 +414,8 @@ static void
+ detach_device (grub_usb_device_t dev)
+ {
+   unsigned i;
++  grub_usb_err_t err;
++
+   int k;
+   if (!dev)
+     return;
+@@ -425,6 +436,14 @@ detach_device (grub_usb_device_t dev)
+ 	  if (inter && inter->detach_hook)
+ 	    inter->detach_hook (dev, i, k);
+ 	}
++  if (dev->controller.dev->detach_dev) {
++    err = dev->controller.dev->detach_dev (&dev->controller, dev);
++    if (err)
++      {
++	// XXX
++      }
++  }
++
+   grub_usb_devs[dev->addr] = 0;
+ }
+ 
+diff --git a/include/grub/usb.h b/include/grub/usb.h
+index ea6ee8c2c..4dd179db2 100644
+--- a/include/grub/usb.h
++++ b/include/grub/usb.h
+@@ -126,6 +126,10 @@ struct grub_usb_controller_dev
+ 
+   grub_usb_speed_t (*detect_dev) (grub_usb_controller_t dev, int port, int *changed);
+ 
++  grub_usb_err_t (*attach_dev) (grub_usb_controller_t ctrl, grub_usb_device_t dev);
++
++  grub_usb_err_t (*detach_dev) (grub_usb_controller_t ctrl, grub_usb_device_t dev);
++
+   /* Per controller flag - port reset pending, don't do another reset */
+   grub_uint64_t pending_reset;
+ 
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch b/config/grub/xhci/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
new file mode 100644
index 00000000..7d69c3a6
--- /dev/null
+++ b/config/grub/xhci/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
@@ -0,0 +1,77 @@
+From 5e5d74a4531770258e21dedd45c33f1a9d3afa6b Mon Sep 17 00:00:00 2001
+From: Patrick Rudolph <patrick.rudolph@9elements.com>
+Date: Sun, 15 Nov 2020 19:54:40 +0100
+Subject: [PATCH 5/8] grub-core/bus/usb/usbhub: Add new private fields for xHCI
+ controller
+
+Store the root port number, the route, consisting out of the port ID
+in each nibble, and a pointer to driver private data.
+
+Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
+---
+ grub-core/bus/usb/usbhub.c | 11 ++++++++---
+ include/grub/usb.h         |  5 +++++
+ 2 files changed, 13 insertions(+), 3 deletions(-)
+
+diff --git a/grub-core/bus/usb/usbhub.c b/grub-core/bus/usb/usbhub.c
+index 8e963e84b..b4b3a1a61 100644
+--- a/grub-core/bus/usb/usbhub.c
++++ b/grub-core/bus/usb/usbhub.c
+@@ -49,7 +49,9 @@ static grub_usb_controller_dev_t grub_usb_list;
+ static grub_usb_device_t
+ grub_usb_hub_add_dev (grub_usb_controller_t controller,
+                       grub_usb_speed_t speed,
+-                      int split_hubport, int split_hubaddr)
++                      int split_hubport, int split_hubaddr,
++                      int root_portno,
++                      grub_uint32_t route)
+ {
+   grub_usb_device_t dev;
+   int i;
+@@ -65,6 +67,8 @@ grub_usb_hub_add_dev (grub_usb_controller_t controller,
+   dev->speed = speed;
+   dev->split_hubport = split_hubport;
+   dev->split_hubaddr = split_hubaddr;
++  dev->root_port = root_portno;
++  dev->route = route;
+ 
+   if (controller->dev->attach_dev) {
+     err = controller->dev->attach_dev (controller, dev);
+@@ -245,7 +249,7 @@ attach_root_port (struct grub_usb_hub *hub, int portno,
+      and full/low speed device connected to OHCI/UHCI needs not
+      transaction translation - e.g. hubport and hubaddr should be
+      always none (zero) for any device connected to any root hub. */
+-  dev = grub_usb_hub_add_dev (hub->controller, speed, 0, 0);
++  dev = grub_usb_hub_add_dev (hub->controller, speed, 0, 0, portno, 0);
+   hub->controller->dev->pending_reset = 0;
+   npending--;
+   if (! dev)
+@@ -676,7 +680,8 @@ poll_nonroot_hub (grub_usb_device_t dev)
+ 
+ 	      /* Add the device and assign a device address to it.  */
+ 	      next_dev = grub_usb_hub_add_dev (&dev->controller, speed,
+-					       split_hubport, split_hubaddr);
++					       split_hubport, split_hubaddr, dev->root_port,
++					       dev->route << 4 | (i & 0xf));
+ 	      if (dev->controller.dev->pending_reset)
+ 		{
+ 		  dev->controller.dev->pending_reset = 0;
+diff --git a/include/grub/usb.h b/include/grub/usb.h
+index 4dd179db2..609faf7d0 100644
+--- a/include/grub/usb.h
++++ b/include/grub/usb.h
+@@ -237,6 +237,11 @@ struct grub_usb_device
+   int split_hubport;
+ 
+   int split_hubaddr;
++
++  /* xHCI specific information */
++  int root_port;
++  grub_uint32_t route;
++  void *xhci_priv;
+ };
+ 
+ 
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch b/config/grub/xhci/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch
new file mode 100644
index 00000000..11df42d8
--- /dev/null
+++ b/config/grub/xhci/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch
@@ -0,0 +1,2814 @@
+From fe3a0bce527e059e9121eb5ad2c3cc099f07a4bf Mon Sep 17 00:00:00 2001
+From: Patrick Rudolph <patrick.rudolph@9elements.com>
+Date: Sun, 15 Nov 2020 19:59:25 +0100
+Subject: [PATCH 6/8] grub-core/bus/usb: Add xhci support
+
+Add support for xHCI USB controllers.
+The code is based on seabios implementation, but has been heavily
+modified to match grubs internals.
+
+Changes done in version 2:
+* Code cleanup
+* Code style fixes
+* Don't leak memory buffers
+* Compile without warnings
+* Add more defines
+* Add more helper functions
+* Don't assume a 1:1 virtual to physical mapping
+* Flush cachelines after writing buffers
+* Don't use hardcoded page size
+* Proper scratchpad register setup
+* xHCI bios ownership handoff
+
+Changes done in version 3:
+* Fixed a race condition detecting events, which doesn't appear on
+  qemu based xHCI controllers
+* Don't accidently disable USB3.0 devices after first command
+* Support arbitrary protocol speed IDs
+* Coding style cleanup
+
+Tested:
+* Qemu system x86_64
+  * virtual USB HID keyboard (usb-kbd)
+  * virtual USB HID mass storage (usb-storage)
+* init Supermicro X11SSH-F
+  * iKVM HID keyboard
+  * USB3 HID mass storage (controller root port)
+  * USB HID keyboard
+
+TODO:
+  * Test on more hardware
+  * Test on USB3 hubs
+  * Support for USB 3.1 and USB 3.2 controllers
+
+Tested on qemu using coreboot and grub as payload:
+
+qemu-system-x86_64 -M q35 -bios $firmware -device qemu-xhci,id=xhci -accel kvm -m 1024M \
+	-device usb-storage,drive=thumbdrive,bus=xhci.0,port=3 \
+	-drive if=none,format=raw,id=thumbdrive,file=ubuntu-20.04.1-desktop-amd64.iso \
+	-device usb-kbd,bus=xhci.0
+
+Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
+Signed-off-by: sylv <sylv@sylv.io>
+---
+ Makefile.am                  |    2 +-
+ grub-core/Makefile.core.def  |    7 +
+ grub-core/bus/usb/xhci-pci.c |  195 +++
+ grub-core/bus/usb/xhci.c     | 2496 ++++++++++++++++++++++++++++++++++
+ include/grub/usb.h           |    4 +
+ 5 files changed, 2703 insertions(+), 1 deletion(-)
+ create mode 100644 grub-core/bus/usb/xhci-pci.c
+ create mode 100644 grub-core/bus/usb/xhci.c
+
+diff --git a/Makefile.am b/Makefile.am
+index 43635d5ff..65016f856 100644
+--- a/Makefile.am
++++ b/Makefile.am
+@@ -434,7 +434,7 @@ if COND_i386_coreboot
+ FS_PAYLOAD_MODULES ?= $(shell cat grub-core/fs.lst)
+ default_payload.elf: grub-mkstandalone grub-mkimage FORCE
+ 	test -f $@ && rm $@ || true
+-	pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
++	pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata xhci ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
+ endif
+ 
+ endif
+diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
+index fb6078a34..64c3806ab 100644
+--- a/grub-core/Makefile.core.def
++++ b/grub-core/Makefile.core.def
+@@ -667,6 +667,13 @@ module = {
+   enable = arm_coreboot;
+ };
+ 
++module = {
++  name = xhci;
++  common = bus/usb/xhci.c;
++  pci = bus/usb/xhci-pci.c;
++  enable = pci;
++};
++
+ module = {
+   name = pci;
+   common = bus/pci.c;
+diff --git a/grub-core/bus/usb/xhci-pci.c b/grub-core/bus/usb/xhci-pci.c
+new file mode 100644
+index 000000000..a5bd3c97d
+--- /dev/null
++++ b/grub-core/bus/usb/xhci-pci.c
+@@ -0,0 +1,195 @@
++/* xhci.c - XHCI Support.  */
++/*
++ *  GRUB  --  GRand Unified Bootloader
++ *  Copyright (C) 2020 9elements Cyber Security
++ *
++ *  GRUB is free software: you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License as published by
++ *  the Free Software Foundation, either version 3 of the License, or
++ *  (at your option) any later version.
++ *
++ *  GRUB is distributed in the hope that it will be useful,
++ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *  GNU General Public License for more details.
++ *
++ *  You should have received a copy of the GNU General Public License
++ *  along with GRUB.  If not, see <http://www.gnu.org/licenses/>.
++ */
++
++#include <grub/pci.h>
++#include <grub/cpu/pci.h>
++#include <grub/cs5536.h>
++#include <grub/misc.h>
++#include <grub/mm.h>
++#include <grub/time.h>
++#include <grub/usb.h>
++
++#define GRUB_XHCI_PCI_SBRN_REG  0x60
++#define GRUB_XHCI_ADDR_MEM_MASK	(~0xff)
++
++/* USBLEGSUP bits and related OS OWNED byte offset */
++enum
++{
++  GRUB_XHCI_BIOS_OWNED = (1 << 16),
++  GRUB_XHCI_OS_OWNED = (1 << 24)
++};
++
++/* PCI iteration function... */
++static int
++grub_xhci_pci_iter (grub_pci_device_t dev, grub_pci_id_t pciid,
++		    void *data __attribute__ ((unused)))
++{
++  volatile grub_uint32_t *regs;
++  grub_uint32_t base, base_h;
++  grub_uint32_t eecp_offset;
++  grub_uint32_t usblegsup = 0;
++  grub_uint64_t maxtime;
++  grub_uint32_t interf;
++  grub_uint32_t subclass;
++  grub_uint32_t class;
++  grub_uint8_t release;
++  grub_uint32_t class_code;
++
++  grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: begin\n");
++
++  if (pciid == GRUB_CS5536_PCIID)
++    {
++	grub_dprintf ("xhci", "CS5536 not supported\n");
++	return 0;
++    }
++  else
++    {
++      grub_pci_address_t addr;
++      addr = grub_pci_make_address (dev, GRUB_PCI_REG_CLASS);
++      class_code = grub_pci_read (addr) >> 8;
++      interf = class_code & 0xFF;
++      subclass = (class_code >> 8) & 0xFF;
++      class = class_code >> 16;
++
++      /* If this is not an XHCI controller, just return.  */
++      if (class != 0x0c || subclass != 0x03 || interf != 0x30)
++	return 0;
++
++      grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: class OK\n");
++
++      /* Check Serial Bus Release Number */
++      addr = grub_pci_make_address (dev, GRUB_XHCI_PCI_SBRN_REG);
++      release = grub_pci_read_byte (addr);
++      if (release != 0x30)
++	{
++	  grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: Wrong SBRN: %0x\n",
++			release);
++	  return 0;
++	}
++      grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: bus rev. num. OK\n");
++
++      /* Determine XHCI XHCC registers base address.  */
++      addr = grub_pci_make_address (dev, GRUB_PCI_REG_ADDRESS_REG0);
++      base = grub_pci_read (addr);
++      addr = grub_pci_make_address (dev, GRUB_PCI_REG_ADDRESS_REG1);
++      base_h = grub_pci_read (addr);
++      /* Stop if registers are mapped above 4G - GRUB does not currently
++       * work with registers mapped above 4G */
++      if (((base & GRUB_PCI_ADDR_MEM_TYPE_MASK) != GRUB_PCI_ADDR_MEM_TYPE_32)
++	  && (base_h != 0))
++	{
++	  grub_dprintf ("xhci",
++			"XHCI grub_xhci_pci_iter: registers above 4G are not supported\n");
++	  return 0;
++	}
++      base &= GRUB_PCI_ADDR_MEM_MASK;
++      if (!base)
++	{
++	  grub_dprintf ("xhci",
++			"XHCI: XHCI is not mapped\n");
++	  return 0;
++	}
++
++      /* Set bus master - needed for coreboot, VMware, broken BIOSes etc. */
++      addr = grub_pci_make_address (dev, GRUB_PCI_REG_COMMAND);
++      grub_pci_write_word(addr,
++			  GRUB_PCI_COMMAND_MEM_ENABLED
++			  | GRUB_PCI_COMMAND_BUS_MASTER
++			  | grub_pci_read_word(addr));
++
++      grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: 32-bit XHCI OK\n");
++    }
++
++  grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: iobase of XHCC: %08x\n",
++		(base & GRUB_XHCI_ADDR_MEM_MASK));
++
++  regs = grub_pci_device_map_range (dev,
++				    (base & GRUB_XHCI_ADDR_MEM_MASK),
++				    0x100);
++
++  /* Is there EECP ? */
++  eecp_offset = (grub_le_to_cpu32 (regs[2]) >> 8) & 0xff;
++
++    /* Determine and change ownership. */
++  /* EECP offset valid in HCCPARAMS */
++  /* Ownership can be changed via EECP only */
++  if (pciid != GRUB_CS5536_PCIID && eecp_offset >= 0x40)
++    {
++      grub_pci_address_t pciaddr_eecp;
++      pciaddr_eecp = grub_pci_make_address (dev, eecp_offset);
++
++      usblegsup = grub_pci_read (pciaddr_eecp);
++      if (usblegsup & GRUB_XHCI_BIOS_OWNED)
++	{
++	  grub_boot_time ("Taking ownership of XHCI controller");
++	  grub_dprintf ("xhci",
++			"XHCI grub_xhci_pci_iter: XHCI owned by: BIOS\n");
++	  /* Ownership change - set OS_OWNED bit */
++	  grub_pci_write (pciaddr_eecp, usblegsup | GRUB_XHCI_OS_OWNED);
++	  /* Ensure PCI register is written */
++	  grub_pci_read (pciaddr_eecp);
++
++	  /* Wait for finish of ownership change, XHCI specification
++	   * doesn't say how long it can take... */
++	  maxtime = grub_get_time_ms () + 1000;
++	  while ((grub_pci_read (pciaddr_eecp) & GRUB_XHCI_BIOS_OWNED)
++		 && (grub_get_time_ms () < maxtime));
++	  if (grub_pci_read (pciaddr_eecp) & GRUB_XHCI_BIOS_OWNED)
++	    {
++	      grub_dprintf ("xhci",
++			    "XHCI grub_xhci_pci_iter: XHCI change ownership timeout");
++	      /* Change ownership in "hard way" - reset BIOS ownership */
++	      grub_pci_write (pciaddr_eecp, GRUB_XHCI_OS_OWNED);
++	      /* Ensure PCI register is written */
++	      grub_pci_read (pciaddr_eecp);
++	    }
++	}
++      else if (usblegsup & GRUB_XHCI_OS_OWNED)
++	/* XXX: What to do in this case - nothing ? Can it happen ? */
++	grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: XHCI owned by: OS\n");
++      else
++	{
++	  grub_dprintf ("xhci",
++			"XHCI grub_Xhci_pci_iter: XHCI owned by: NONE\n");
++	  /* XXX: What to do in this case ? Can it happen ?
++	   * Is code below correct ? */
++	  /* Ownership change - set OS_OWNED bit */
++	  grub_pci_write (pciaddr_eecp, GRUB_XHCI_OS_OWNED);
++	  /* Ensure PCI register is written */
++	  grub_pci_read (pciaddr_eecp);
++	}
++
++      /* Disable SMI, just to be sure.  */
++      pciaddr_eecp = grub_pci_make_address (dev, eecp_offset + 4);
++      grub_pci_write (pciaddr_eecp, 0);
++      /* Ensure PCI register is written */
++      grub_pci_read (pciaddr_eecp);
++    }
++
++  grub_dprintf ("xhci", "inithw: XHCI grub_xhci_pci_iter: ownership OK\n");
++
++  grub_xhci_init_device (regs);
++  return 0;
++}
++
++void
++grub_xhci_pci_scan (void)
++{
++  grub_pci_iterate (grub_xhci_pci_iter, NULL);
++}
+diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c
+new file mode 100644
+index 000000000..f4591ffb5
+--- /dev/null
++++ b/grub-core/bus/usb/xhci.c
+@@ -0,0 +1,2496 @@
++/* xhci.c - XHCI Support.  */
++/*
++ *  GRUB  --  GRand Unified Bootloader
++ *  Copyright (C) 2020 9elements Cyber Security
++ *
++ *  GRUB is free software: you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License as published by
++ *  the Free Software Foundation, either version 3 of the License, or
++ *  (at your option) any later version.
++ *
++ *  GRUB is distributed in the hope that it will be useful,
++ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
++ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ *  GNU General Public License for more details.
++ *
++ *  You should have received a copy of the GNU General Public License
++ *  along with GRUB.  If not, see <http://www.gnu.org/licenses/>.
++ *
++ * Big parts of this software are inspired by seabios XHCI implementation
++ * Released under LGPLv3. Credits to:
++ *
++ * Copyright (C) 2013  Gerd Hoffmann <kraxel@redhat.com>
++ * Copyright (C) 2014  Kevin O'Connor <kevin@koconnor.net>
++ */
++
++#include <grub/dl.h>
++#include <grub/err.h>
++#include <grub/mm.h>
++#include <grub/usb.h>
++#include <grub/usbtrans.h>
++#include <grub/misc.h>
++#include <grub/time.h>
++#include <grub/loader.h>
++#include <grub/disk.h>
++#include <grub/dma.h>
++#include <grub/cache.h>
++#include <grub/i386/cpuid.h>
++
++GRUB_MOD_LICENSE ("GPLv3+");
++
++/* This simple GRUB implementation of XHCI driver */
++/* Based on the specification
++ * "eXtensible Host Controller Interface for Universal Serial Bus" Revision 1.2
++ */
++
++
++#define xhci_get_field(data, field)	     \
++    (((data) >> field##_SHIFT) & field##_MASK)
++#define XHCI_PORTSC_PLS_MASK     0xf
++#define XHCI_PORTSC_PLS_SHIFT    5
++#define XHCI_PORTSC_SPEED_MASK   0xf
++#define XHCI_PORTSC_SPEED_SHIFT  10
++
++enum
++{
++  XHCI_USB_FULLSPEED = 1,
++  XHCI_USB_LOWSPEED,
++  XHCI_USB_HIGHSPEED,
++  XHCI_USB_SUPERSPEED
++};
++
++/* Chapter 5.3 Host Controller Capability Registers */
++struct grub_xhci_caps {
++    grub_uint8_t  caplength;
++    grub_uint8_t  reserved_01;
++    grub_uint16_t hciversion;
++    grub_uint32_t hcsparams1;
++    grub_uint32_t hcsparams2;
++    grub_uint32_t hcsparams3;
++    grub_uint32_t hccparams;
++    grub_uint32_t dboff;
++    grub_uint32_t rtsoff;
++    grub_uint32_t hccparams2;
++} GRUB_PACKED;
++
++/* extended capabilities */
++struct grub_xhci_xcap {
++    grub_uint32_t cap;
++    grub_uint32_t data[];
++} GRUB_PACKED;
++
++#define XHCI_CAP_LEGACY_SUPPORT 1
++#define XHCI_CAP_SUPPORTED_PROTOCOL 2
++
++struct xhci_portmap {
++    grub_uint8_t start;
++    grub_uint8_t count;
++} GRUB_PACKED;
++
++struct grub_xhci_op {
++    grub_uint32_t usbcmd;
++    grub_uint32_t usbsts;
++    grub_uint32_t pagesize;
++    grub_uint32_t reserved_01[2];
++    grub_uint32_t dnctl;
++    grub_uint32_t crcr_low;
++    grub_uint32_t crcr_high;
++    grub_uint32_t reserved_02[4];
++    grub_uint32_t dcbaap_low;
++    grub_uint32_t dcbaap_high;
++    grub_uint32_t config;
++} GRUB_PACKED;
++
++enum
++{
++  GRUB_XHCI_CMD_RS = (1<<0),
++  GRUB_XHCI_CMD_HCRST = (1<<1),
++  GRUB_XHCI_CMD_INTE = (1<<2),
++  GRUB_XHCI_CMD_HSEE = (1<<3),
++  GRUB_XHCI_CMD_LHCRST = (1<<7),
++  GRUB_XHCI_CMD_CSS = (1<<8),
++  GRUB_XHCI_CMD_CRS = (1<<9),
++  GRUB_XHCI_CMD_EWE = (1<<10),
++  GRUB_XHCI_CMD_EU3S = (1<<11)
++};
++
++enum
++{
++  GRUB_XHCI_STS_HCH = (1<<0),
++  GRUB_XHCI_STS_HSE = (1<<2),
++  GRUB_XHCI_STS_EINT = (1<<3),
++  GRUB_XHCI_STS_PCD = (1<<4),
++  GRUB_XHCI_STS_SSS = (1<<8),
++  GRUB_XHCI_STS_RSS = (1<<9),
++  GRUB_XHCI_STS_SRE = (1<<10),
++  GRUB_XHCI_STS_CNR = (1<<11),
++  GRUB_XHCI_STS_HCE = (1<<12)
++};
++
++
++/* Port Registers Offset */
++#define GRUB_XHCI_PR_OFFSET 0x400
++/* Interrupter Registers Offset */
++#define GRUB_XHCI_IR_OFFSET 0x20
++
++/* Port Status and Control registers offsets */
++
++/* Chapter 6 Data Structures */
++#define ALIGN_SPBA 64
++#define ALIGN_DCBAA 64
++#define ALIGN_CMD_RING_SEG 64
++#define ALIGN_EVT_RING_SEG 64
++#define ALIGN_EVT_RING_TABLE 64
++#define ALIGN_TRB 16
++#define ALIGN_INCTX 64
++#define ALIGN_SLOTCTX 32
++
++#define BOUNDARY_RING 0x10000
++
++enum
++{
++  GRUB_XHCI_PORTSC_CCS = (1<<0),
++  GRUB_XHCI_PORTSC_PED = (1<<1),
++  GRUB_XHCI_PORTSC_OCA = (1<<3),
++  GRUB_XHCI_PORTSC_PR = (1<<4),
++  GRUB_XHCI_PORTSC_PP = (1<<9),
++  GRUB_XHCI_PORTSC_SPEED_FULL = (1<<10),
++  GRUB_XHCI_PORTSC_SPEED_LOW = (2<<10),
++  GRUB_XHCI_PORTSC_SPEED_HIGH = (3<<10),
++  GRUB_XHCI_PORTSC_SPEED_SUPER = (4<<10),
++  GRUB_XHCI_PORTSC_LWS = (1<<16),
++  GRUB_XHCI_PORTSC_CSC = (1<<17),
++  GRUB_XHCI_PORTSC_PEC = (1<<18),
++  GRUB_XHCI_PORTSC_WRC = (1<<19),
++  GRUB_XHCI_PORTSC_OCC = (1<<20),
++  GRUB_XHCI_PORTSC_PRC = (1<<21),
++  GRUB_XHCI_PORTSC_PLC = (1<<22),
++  GRUB_XHCI_PORTSC_CEC = (1<<23),
++  GRUB_XHCI_PORTSC_CAS = (1<<24),
++  GRUB_XHCI_PORTSC_WCE = (1<<25),
++  GRUB_XHCI_PORTSC_WDE = (1<<26),
++  GRUB_XHCI_PORTSC_WOE = (1<<27),
++  GRUB_XHCI_PORTSC_DR = (1<<30),
++  GRUB_XHCI_PORTSC_WPR = (1<<31)
++};
++
++/* XHCI memory data structs */
++#define GRUB_XHCI_MAX_ENDPOINTS 32
++
++#define GRUB_XHCI_RING_ITEMS 128
++#define GRUB_XHCI_RING_SIZE (GRUB_XHCI_RING_ITEMS*sizeof(struct grub_xhci_trb))
++/*
++ *  xhci_ring structs are allocated with XHCI_RING_SIZE alignment,
++ *  then we can get it from a trb pointer (provided by evt ring).
++ */
++#define XHCI_RING(_trb)	  \
++    ((struct grub_xhci_ring*)((grub_uint32_t)(_trb) & ~(GRUB_XHCI_RING_SIZE-1)))
++
++/* slot context */
++struct grub_xhci_slotctx {
++  grub_uint32_t ctx[4];
++  grub_uint32_t reserved_01[4];
++} GRUB_PACKED;
++
++/* endpoint context */
++struct grub_xhci_epctx {
++  grub_uint32_t ctx[2];
++  grub_uint32_t deq_low;
++  grub_uint32_t deq_high;
++  grub_uint32_t length;
++  grub_uint32_t reserved_01[3];
++} GRUB_PACKED;
++
++/* device context array element */
++struct grub_xhci_devlist {
++  grub_uint32_t ptr_low;
++  grub_uint32_t ptr_high;
++} GRUB_PACKED;
++
++/* input context */
++struct grub_xhci_inctx {
++  grub_uint32_t del;
++  grub_uint32_t add;
++  grub_uint32_t reserved_01[6];
++} GRUB_PACKED;
++
++/* transfer block (ring element) */
++struct grub_xhci_trb {
++  grub_uint32_t ptr_low;
++  grub_uint32_t ptr_high;
++  grub_uint32_t status;
++  grub_uint32_t control;
++} GRUB_PACKED;
++
++#define TRB_C	       (1<<0)
++#define TRB_TYPE_SHIFT	  10
++#define TRB_TYPE_MASK       0x3f
++#define TRB_TYPE(t)	 (((t) >> TRB_TYPE_SHIFT) & TRB_TYPE_MASK)
++
++#define TRB_EV_ED	   (1<<2)
++
++#define TRB_TR_ENT	  (1<<1)
++#define TRB_TR_ISP	  (1<<2)
++#define TRB_TR_NS	   (1<<3)
++#define TRB_TR_CH	   (1<<4)
++#define TRB_TR_IOC	  (1<<5)
++#define TRB_TR_IDT	  (1<<6)
++#define TRB_TR_TBC_SHIFT	7
++#define TRB_TR_TBC_MASK     0x3
++#define TRB_TR_BEI	  (1<<9)
++#define TRB_TR_TLBPC_SHIFT      16
++#define TRB_TR_TLBPC_MASK   0xf
++#define TRB_TR_FRAMEID_SHIFT    20
++#define TRB_TR_FRAMEID_MASK 0x7ff
++#define TRB_TR_SIA	  (1<<31)
++
++#define TRB_TR_DIR	  (1<<16)
++
++#define TRB_CR_SLOTID_SHIFT     24
++#define TRB_CR_SLOTID_MASK  0xff
++#define TRB_CR_EPID_SHIFT       16
++#define TRB_CR_EPID_MASK    0x1f
++
++#define TRB_CR_BSR	  (1<<9)
++#define TRB_CR_DC	   (1<<9)
++
++#define TRB_LK_TC	   (1<<1)
++
++#define TRB_INTR_SHIFT	  22
++#define TRB_INTR_MASK       0x3ff
++#define TRB_INTR(t)	 (((t).status >> TRB_INTR_SHIFT) & TRB_INTR_MASK)
++
++typedef enum TRBType {
++    TRB_RESERVED = 0,
++    TR_NORMAL,
++    TR_SETUP,
++    TR_DATA,
++    TR_STATUS,
++    TR_ISOCH,
++    TR_LINK,
++    TR_EVDATA,
++    TR_NOOP,
++    CR_ENABLE_SLOT,
++    CR_DISABLE_SLOT,
++    CR_ADDRESS_DEVICE,
++    CR_CONFIGURE_ENDPOINT,
++    CR_EVALUATE_CONTEXT,
++    CR_RESET_ENDPOINT,
++    CR_STOP_ENDPOINT,
++    CR_SET_TR_DEQUEUE,
++    CR_RESET_DEVICE,
++    CR_FORCE_EVENT,
++    CR_NEGOTIATE_BW,
++    CR_SET_LATENCY_TOLERANCE,
++    CR_GET_PORT_BANDWIDTH,
++    CR_FORCE_HEADER,
++    CR_NOOP,
++    ER_TRANSFER = 32,
++    ER_COMMAND_COMPLETE,
++    ER_PORT_STATUS_CHANGE,
++    ER_BANDWIDTH_REQUEST,
++    ER_DOORBELL,
++    ER_HOST_CONTROLLER,
++    ER_DEVICE_NOTIFICATION,
++    ER_MFINDEX_WRAP,
++} TRBType;
++
++typedef enum TRBCCode {
++    CC_INVALID = 0,
++    CC_SUCCESS,
++    CC_DATA_BUFFER_ERROR,
++    CC_BABBLE_DETECTED,
++    CC_USB_TRANSACTION_ERROR,
++    CC_TRB_ERROR,
++    CC_STALL_ERROR,
++    CC_RESOURCE_ERROR,
++    CC_BANDWIDTH_ERROR,
++    CC_NO_SLOTS_ERROR,
++    CC_INVALID_STREAM_TYPE_ERROR,
++    CC_SLOT_NOT_ENABLED_ERROR,
++    CC_EP_NOT_ENABLED_ERROR,
++    CC_SHORT_PACKET,
++    CC_RING_UNDERRUN,
++    CC_RING_OVERRUN,
++    CC_VF_ER_FULL,
++    CC_PARAMETER_ERROR,
++    CC_BANDWIDTH_OVERRUN,
++    CC_CONTEXT_STATE_ERROR,
++    CC_NO_PING_RESPONSE_ERROR,
++    CC_EVENT_RING_FULL_ERROR,
++    CC_INCOMPATIBLE_DEVICE_ERROR,
++    CC_MISSED_SERVICE_ERROR,
++    CC_COMMAND_RING_STOPPED,
++    CC_COMMAND_ABORTED,
++    CC_STOPPED,
++    CC_STOPPED_LENGTH_INVALID,
++    CC_MAX_EXIT_LATENCY_TOO_LARGE_ERROR = 29,
++    CC_ISOCH_BUFFER_OVERRUN = 31,
++    CC_EVENT_LOST_ERROR,
++    CC_UNDEFINED_ERROR,
++    CC_INVALID_STREAM_ID_ERROR,
++    CC_SECONDARY_BANDWIDTH_ERROR,
++    CC_SPLIT_TRANSACTION_ERROR
++} TRBCCode;
++
++enum {
++    PLS_U0	      =  0,
++    PLS_U1	      =  1,
++    PLS_U2	      =  2,
++    PLS_U3	      =  3,
++    PLS_DISABLED	=  4,
++    PLS_RX_DETECT       =  5,
++    PLS_INACTIVE	=  6,
++    PLS_POLLING	 =  7,
++    PLS_RECOVERY	=  8,
++    PLS_HOT_RESET       =  9,
++    PLS_COMPILANCE_MODE = 10,
++    PLS_TEST_MODE       = 11,
++    PLS_RESUME	  = 15,
++};
++
++/* event ring segment */
++struct grub_xhci_er_seg {
++  grub_uint32_t ptr_low;
++  grub_uint32_t ptr_high;
++  grub_uint32_t size;
++  grub_uint32_t reserved_01;
++} GRUB_PACKED;
++
++struct grub_xhci_ring {
++    struct grub_xhci_trb      ring[GRUB_XHCI_RING_ITEMS];
++    struct grub_xhci_trb      evt;
++    grub_uint32_t	     eidx;
++    grub_uint32_t	     nidx;
++    grub_uint32_t	     cs;
++};
++
++/* port registers */
++struct grub_xhci_pr {
++    grub_uint32_t portsc;
++    grub_uint32_t portpmsc;
++    grub_uint32_t portli;
++    grub_uint32_t reserved_01;
++} GRUB_PACKED;
++
++/* doorbell registers */
++struct grub_xhci_db {
++    grub_uint32_t doorbell;
++} GRUB_PACKED;
++
++/* runtime registers */
++struct grub_xhci_rts {
++    grub_uint32_t mfindex;
++} GRUB_PACKED;
++
++/* interrupter registers */
++struct grub_xhci_ir {
++    grub_uint32_t iman;
++    grub_uint32_t imod;
++    grub_uint32_t erstsz;
++    grub_uint32_t reserved_01;
++    grub_uint32_t erstba_low;
++    grub_uint32_t erstba_high;
++    grub_uint32_t erdp_low;
++    grub_uint32_t erdp_high;
++} GRUB_PACKED;
++
++struct grub_xhci_psid {
++	grub_uint8_t id;
++	grub_uint8_t psie;
++	grub_uint16_t psim;
++	grub_uint64_t bitrate;
++	grub_usb_speed_t grub_usb_speed;
++};
++
++struct grub_xhci_psids {
++	grub_uint8_t major;
++	grub_uint8_t minor;
++	struct grub_xhci_psid psids[16];
++};
++
++struct grub_xhci
++{
++  grub_uint8_t shutdown; /* 1 if preparing shutdown of controller */
++  /* xhci registers */
++  volatile struct grub_xhci_caps *caps;	/* Capability registers */
++  volatile struct grub_xhci_op *op;	/* Operational registers */
++  volatile struct grub_xhci_pr *pr;	/* Port Registers */
++  volatile struct grub_xhci_db *db;	/* doorbell */
++  volatile struct grub_xhci_ir *ir;	/* Interrupt Registers */
++  /* devinfo */
++  grub_uint32_t xcap;
++  grub_uint32_t ports;
++  grub_uint32_t slots;
++  grub_uint8_t flag64;
++  grub_uint16_t spb;
++  grub_uint32_t pagesize;
++  struct xhci_portmap usb2;
++  struct xhci_portmap usb3;
++  struct grub_xhci_psids *psids;
++  /* xhci data structures */
++  struct grub_pci_dma_chunk *devs_dma;
++  volatile struct grub_xhci_devlist *devs;
++  struct grub_pci_dma_chunk *cmds_dma;
++  volatile struct grub_xhci_ring *cmds;
++  struct grub_pci_dma_chunk *evts_dma;
++  volatile struct grub_xhci_ring *evts;
++  struct grub_pci_dma_chunk *eseg_dma;
++  volatile struct grub_xhci_er_seg *eseg;
++  struct grub_pci_dma_chunk *spba_dma;
++  struct grub_pci_dma_chunk *spad_dma;
++
++  struct grub_xhci *next;
++};
++
++struct grub_xhci_priv {
++  grub_uint8_t                    slotid;
++  grub_uint32_t                   max_packet;
++  struct grub_pci_dma_chunk       *enpoint_trbs_dma[32];
++  volatile struct grub_xhci_ring  *enpoint_trbs[32];
++  struct grub_pci_dma_chunk       *slotctx_dma;
++};
++
++struct grub_xhci_port {
++  grub_uint32_t portsc;
++  grub_uint32_t portpmsc;
++  grub_uint32_t portli;
++  grub_uint32_t reserved_01;
++};
++
++struct grub_xhci_transfer_controller_data {
++  grub_uint32_t transfer_size;
++};
++
++static struct grub_xhci *xhci;
++
++/****************************************************************
++ * general access functions
++ ****************************************************************/
++
++static inline void
++grub_xhci_write32(volatile void *addr, grub_uint32_t val) {
++    *(volatile grub_uint32_t *)addr = val;
++}
++static inline void
++grub_xhci_write16(volatile void *addr, grub_uint16_t val) {
++    *(volatile grub_uint16_t *)addr = val;
++}
++static inline void
++grub_xhci_write8(void *addr, grub_uint8_t val) {
++    *(volatile grub_uint8_t *)addr = val;
++}
++
++static inline grub_uint32_t
++grub_xhci_read32(volatile void *addr) {
++  return grub_le_to_cpu32 (*((volatile grub_uint32_t *)addr));
++}
++
++static inline grub_uint16_t
++grub_xhci_read16(volatile void *addr) {
++  return grub_le_to_cpu16 (*((volatile grub_uint32_t *)addr));
++}
++static inline grub_uint8_t
++grub_xhci_read8(volatile void *addr) {
++  return (*((volatile grub_uint32_t *)addr));
++}
++
++static inline grub_uint32_t
++grub_xhci_port_read (struct grub_xhci *x, grub_uint32_t port)
++{
++  return grub_xhci_read32(&x->pr[port].portsc);
++}
++
++static inline void
++grub_xhci_port_write (struct grub_xhci *x, grub_uint32_t port,
++		      grub_uint32_t and_mask, grub_uint32_t or_mask)
++{
++  grub_uint32_t reg = grub_xhci_port_read(x, port);
++  reg &= and_mask;
++  reg |= or_mask;
++
++  grub_xhci_write32(&x->pr[port].portsc, reg);
++}
++
++/****************************************************************
++ * xhci status and support functions
++ ****************************************************************/
++
++static grub_uint32_t xhci_get_pagesize(struct grub_xhci *x)
++{
++  /* Chapter 5.4.3 Page Size Register (PAGESIZE) */
++  for (grub_uint8_t i = 0; i < 16; i++)
++    {
++      if (grub_xhci_read32(&x->op->pagesize) & (1 << i))
++	return 1 << (12 + i);
++    }
++  return 0;
++}
++
++static grub_uint8_t xhci_is_halted(struct grub_xhci *x)
++{
++  return !!(grub_xhci_read32(&x->op->usbsts) & 1);
++}
++
++/* Just for debugging */
++static void xhci_check_status(struct grub_xhci *x)
++{
++  grub_uint32_t reg;
++
++  reg = grub_xhci_read32(&x->op->usbsts);
++  if (reg & 1)
++    grub_dprintf("xhci", "%s: xHCI halted\n", __func__);
++  if (reg & 2)
++    grub_dprintf("xhci", "%s: Host system error detected\n", __func__);
++  if (reg & (1 << 12))
++    grub_dprintf("xhci", "%s: Internal error detected\n", __func__);
++  reg = grub_xhci_read32(&x->op->crcr_low);
++  if (reg & (1 << 3))
++    grub_dprintf("xhci", "%s: Command ring running\n", __func__);
++}
++
++/* xhci_memalign_dma32 allocates DMA memory satisfying alignment and boundary
++ * requirements without wasting to much memory */
++static struct grub_pci_dma_chunk *
++xhci_memalign_dma32(grub_size_t align,
++		    grub_size_t size,
++		    grub_size_t boundary)
++{
++	struct grub_pci_dma_chunk *tmp;
++	const grub_uint32_t mask = boundary - 1;
++	grub_uint32_t start, end;
++
++	/* Allocate some memory and check if it doesn't cross boundary */
++	tmp = grub_memalign_dma32(align, size);
++	start = grub_dma_get_phys(tmp);
++	end = start + size - 1;
++	if ((start & mask) == (end & mask))
++		return tmp;
++	/* Buffer isn't usable, allocate bigger one */
++	grub_dma_free(tmp);
++
++	return grub_memalign_dma32(boundary, size);
++}
++
++/****************************************************************
++ * helper functions for in context DMA buffer
++ ****************************************************************/
++
++static int
++grub_xhci_inctx_size(struct grub_xhci *x)
++{
++  const grub_uint8_t cnt = GRUB_XHCI_MAX_ENDPOINTS + 1;
++  return (sizeof(struct grub_xhci_inctx) * cnt) << x->flag64;
++}
++
++static void
++grub_xhci_inctx_sync_dma_caches(struct grub_xhci *x, struct grub_pci_dma_chunk *inctx)
++{
++  grub_arch_sync_dma_caches(inctx, grub_xhci_inctx_size(x));
++}
++
++static struct grub_pci_dma_chunk *
++grub_xhci_alloc_inctx(struct grub_xhci *x, int maxepid,
++		      struct grub_usb_device *dev)
++{
++  int size = grub_xhci_inctx_size(x);
++  struct grub_pci_dma_chunk *dma = xhci_memalign_dma32(ALIGN_INCTX, size,
++						       x->pagesize);
++  if (!dma)
++    return NULL;
++
++  volatile struct grub_xhci_inctx *in = grub_dma_get_virt(dma);
++  grub_memset((void *)in, 0, size);
++
++  struct grub_xhci_slotctx *slot = (void*)&in[1 << x->flag64];
++  slot->ctx[0]    |= maxepid << 27; /* context entries */
++  grub_dprintf("xhci", "%s: speed=%d root_port=%d\n", __func__, dev->speed, dev->root_port);
++  switch (dev->speed) {
++    case GRUB_USB_SPEED_FULL:
++      slot->ctx[0]    |= XHCI_USB_FULLSPEED << 20;
++      break;
++    case GRUB_USB_SPEED_HIGH:
++     slot->ctx[0]     |= XHCI_USB_HIGHSPEED << 20;
++      break;
++    case GRUB_USB_SPEED_LOW:
++      slot->ctx[0]    |= XHCI_USB_LOWSPEED << 20;
++      break;
++    case GRUB_USB_SPEED_SUPER:
++      slot->ctx[0]    |= XHCI_USB_SUPERSPEED << 20;
++      break;
++    case GRUB_USB_SPEED_NONE:
++      slot->ctx[0]    |= 0 << 20;
++      break;
++  }
++
++  /* Route is greater zero on devices that are connected to a non root hub */
++  if (dev->route)
++    {
++      /* FIXME: Implement this code for non SuperSpeed hub devices */
++    }
++  slot->ctx[0]    |= dev->route;
++  slot->ctx[1]    |= (dev->root_port+1) << 16;
++
++  grub_arch_sync_dma_caches(in, size);
++
++  return dma;
++}
++
++/****************************************************************
++ * xHCI event processing
++ ****************************************************************/
++
++/* Dequeue events on the XHCI event ring generated by the hardware */
++static void xhci_process_events(struct grub_xhci *x)
++{
++    volatile struct grub_xhci_ring *evts = x->evts;
++    /* XXX invalidate caches */
++
++    for (;;) {
++	/* check for event */
++	grub_uint32_t nidx = grub_xhci_read32(&evts->nidx);
++	grub_uint32_t cs = grub_xhci_read32(&evts->cs);
++	volatile struct grub_xhci_trb *etrb = evts->ring + nidx;
++	grub_uint32_t control = grub_xhci_read32(&etrb->control);
++	if ((control & TRB_C) != (cs ? 1 : 0))
++	    return;
++
++	/* process event */
++	grub_uint32_t evt_type = TRB_TYPE(control);
++	grub_uint32_t evt_cc = (grub_xhci_read32(&etrb->status) >> 24) & 0xff;
++
++	switch (evt_type)
++	  {
++	    case ER_TRANSFER:
++	    case ER_COMMAND_COMPLETE:
++	      {
++		struct grub_xhci_trb  *rtrb = (void*)grub_xhci_read32(&etrb->ptr_low);
++		struct grub_xhci_ring *ring = XHCI_RING(rtrb);
++		volatile struct grub_xhci_trb  *evt = &ring->evt;
++		grub_uint32_t eidx = rtrb - ring->ring + 1;
++		grub_dprintf("xhci", "%s: ring %p [trb %p, evt %p, type %d, eidx %d, cc %d]\n",
++			      __func__, ring, rtrb, evt, evt_type, eidx, evt_cc);
++		*evt = *etrb;
++		grub_xhci_write32(&ring->eidx, eidx);
++		break;
++	      }
++	    case ER_PORT_STATUS_CHANGE:
++	      {
++		/* Nothing to do here. grub_xhci_detect_dev will handle it */
++		break;
++	      }
++	    default:
++	      {
++		grub_dprintf("xhci", "%s: unknown event, type %d, cc %d\n",
++			      __func__, evt_type, evt_cc);
++		break;
++	      }
++	}
++
++	/* move ring index, notify xhci */
++	nidx++;
++	if (nidx == GRUB_XHCI_RING_ITEMS)
++	  {
++	    nidx = 0;
++	    cs = cs ? 0 : 1;
++	    grub_xhci_write32(&evts->cs, cs);
++	  }
++	grub_xhci_write32(&evts->nidx, nidx);
++	volatile struct grub_xhci_ir *ir = x->ir;
++	grub_uint32_t erdp = (grub_uint32_t)(evts->ring + nidx);
++	grub_xhci_write32(&ir->erdp_low, erdp);
++	grub_xhci_write32(&ir->erdp_high, 0);
++    }
++}
++
++/****************************************************************
++ * TRB handling
++ ****************************************************************/
++
++/* Signal the hardware to process events on a TRB ring */
++static void xhci_doorbell(struct grub_xhci *x, grub_uint32_t slotid, grub_uint32_t value)
++{
++  xhci_check_status(x);
++  grub_dprintf("xhci", "%s: slotid %d, epid %d\n", __func__, slotid, value);
++  grub_xhci_write32(&x->db[slotid].doorbell, value);
++}
++
++/* Check if a ring has any pending TRBs */
++static int xhci_ring_busy(volatile struct grub_xhci_ring *ring)
++{
++  grub_uint32_t eidx = grub_xhci_read32(&ring->eidx);
++  grub_uint32_t nidx = grub_xhci_read32(&ring->nidx);
++
++  return (eidx != nidx);
++}
++
++/* Returns free space in ring */
++static int xhci_ring_free_space(volatile struct grub_xhci_ring *ring)
++{
++  grub_uint32_t eidx = grub_xhci_read32(&ring->eidx);
++  grub_uint32_t nidx = grub_xhci_read32(&ring->nidx);
++
++  /* nidx is never 0, so reduce ring buffer size by one */
++  return (eidx > nidx) ? eidx-nidx
++		: (ARRAY_SIZE(ring->ring) - 1) - nidx + eidx;
++}
++
++/* Check if a ring is full */
++static int xhci_ring_full(volatile struct grub_xhci_ring *ring)
++{
++  /* Might need to insert one link TRB */
++  return xhci_ring_free_space(ring) <= 1;
++}
++
++/* Check if a ring is almost full */
++static int xhci_ring_almost_full(volatile struct grub_xhci_ring *ring)
++{
++  /* Might need to insert one link TRB */
++  return xhci_ring_free_space(ring) <= 2;
++}
++
++/* Wait for a ring to empty (all TRBs processed by hardware) */
++static int xhci_event_wait(struct grub_xhci *x,
++			   volatile struct grub_xhci_ring *ring,
++			   grub_uint32_t timeout)
++{
++    grub_uint32_t end = grub_get_time_ms () + timeout;
++
++    for (;;)
++      {
++	xhci_check_status(x);
++	xhci_process_events(x);
++	if (!xhci_ring_busy(ring))
++	  {
++	    grub_uint32_t status = ring->evt.status;
++	    return (status >> 24) & 0xff;
++	  }
++	if (grub_get_time_ms () > end)
++	  {
++	    xhci_check_status(x);
++	    grub_dprintf("xhci", "%s: Timeout waiting for event\n", __func__);
++	    return -1;
++	  }
++      }
++}
++
++/* Add a TRB to the given ring, either regular or inline */
++static void xhci_trb_fill(volatile struct grub_xhci_ring *ring,
++			  grub_uint64_t ptr, grub_uint32_t xferlen,
++			  grub_uint32_t flags)
++{
++  volatile struct grub_xhci_trb *dst = &ring->ring[ring->nidx];
++  dst->ptr_low = ptr & 0xffffffff;
++  dst->ptr_high = ptr >> 32;
++  dst->status = xferlen;
++  dst->control = flags | (ring->cs ? TRB_C : 0);
++
++  grub_arch_sync_dma_caches(dst, sizeof(ring->ring[0]));
++}
++
++/*
++ * Queue a TRB onto a ring.
++ *
++ * The caller must pass a pointer to the data in physical address-space or the
++ * data itself (but no more than 8 bytes) in data_or_addr. Inline data must have
++ * the flag TRB_TR_IDT set.
++ */
++static void xhci_trb_queue(volatile struct grub_xhci_ring *ring,
++			   grub_uint64_t data_or_addr,
++			   grub_uint32_t xferlen, grub_uint32_t flags)
++{
++  grub_dprintf("xhci", "%s: ring %p data %llx len %d flags 0x%x remain 0x%x\n", __func__,
++      ring, data_or_addr, xferlen & 0x1ffff, flags, xferlen >> 17);
++
++  if (xhci_ring_full(ring))
++    {
++      grub_dprintf("xhci", "%s: ERROR: ring %p is full, discarding TRB\n",
++	__func__, ring);
++      return;
++    }
++
++  if (ring->nidx >= ARRAY_SIZE(ring->ring) - 1)
++    {
++      /* Reset to command buffer pointer to the first element */
++      xhci_trb_fill(ring, (grub_addr_t)ring->ring, 0, (TR_LINK << 10) | TRB_LK_TC);
++      ring->nidx = 0;
++      ring->cs ^= 1;
++      grub_dprintf("xhci", "%s: ring %p [linked]\n", __func__, ring);
++    }
++
++  xhci_trb_fill(ring, data_or_addr, xferlen, flags);
++  ring->nidx++;
++  grub_dprintf("xhci", "%s: ring %p [nidx %d, len %d]\n",
++	       __func__, ring, ring->nidx, xferlen);
++}
++
++/*
++ * Queue a TRB onto a ring and flush it if necessary.
++ *
++ * The caller must pass a pointer to the data in physical address-space or the
++ * data itself (but no more than 8 bytes) in data_or_addr. Inline data must have
++ * the flag TRB_TR_IDT set.
++ */
++static int xhci_trb_queue_and_flush(struct grub_xhci *x,
++				    grub_uint32_t slotid,
++				    grub_uint32_t epid,
++				    volatile struct grub_xhci_ring *ring,
++				    grub_uint64_t data_or_addr,
++				    grub_uint32_t xferlen, grub_uint32_t flags)
++{
++  grub_uint8_t submit = 0;
++  if (xhci_ring_almost_full(ring))
++    {
++      grub_dprintf("xhci", "%s: almost full e %d n %d\n", __func__, ring->eidx, ring->nidx);
++      flags |= TRB_TR_IOC;
++      submit = 1;
++    }
++  /* Note: xhci_trb_queue might queue on or two elements, if the end of the TRB
++   * has been reached. The caller must account for that when filling the TRB. */
++  xhci_trb_queue(ring, data_or_addr, xferlen, flags);
++  /* Submit if less no free slot is remaining, we might need an additional
++   * one on the next call to this function. */
++  if (submit)
++    {
++      xhci_doorbell(x, slotid, epid);
++      int rc = xhci_event_wait(x, ring, 1000);
++      grub_dprintf("xhci", "%s: xhci_event_wait = %d\n", __func__, rc);
++      return rc;
++    }
++  return 0;
++}
++
++/****************************************************************
++ * xHCI command functions
++ ****************************************************************/
++
++/* Submit a command to the xHCI command TRB */
++static int xhci_cmd_submit(struct grub_xhci *x,
++			   struct grub_pci_dma_chunk *inctx_dma,
++			   grub_uint32_t flags)
++{
++  volatile struct grub_xhci_inctx *inctx;
++  /* Don't submit if halted, it will fail */
++  if (xhci_is_halted(x))
++    return -1;
++
++  if (inctx_dma)
++    {
++      grub_xhci_inctx_sync_dma_caches(x, inctx_dma);
++
++      inctx = grub_dma_get_virt(inctx_dma);
++
++      struct grub_xhci_slotctx *slot = (void*)&inctx[1 << x->flag64];
++      grub_uint32_t port = ((slot->ctx[1] >> 16) & 0xff) - 1;
++      grub_uint32_t portsc = grub_xhci_port_read(x, port);
++      if (!(portsc & GRUB_XHCI_PORTSC_CCS))
++	{
++	  grub_dprintf("xhci", "%s: root port %d no longer connected\n",
++	    __func__, port);
++	  return -1;
++	}
++      xhci_trb_queue(x->cmds, grub_dma_get_phys(inctx_dma), 0, flags);
++    }
++    else
++    {
++      xhci_trb_queue(x->cmds, 0, 0, flags);
++    }
++
++    xhci_doorbell(x, 0, 0);
++    int rc = xhci_event_wait(x, x->cmds, 1000);
++    grub_dprintf("xhci", "%s: xhci_event_wait = %d\n", __func__, rc);
++
++    return rc;
++}
++
++static int xhci_cmd_enable_slot(struct grub_xhci *x)
++{
++  grub_uint32_t flags = 0;
++  flags |= (CR_ENABLE_SLOT << 10);
++
++  grub_dprintf("xhci", "%s:\n", __func__);
++  int cc = xhci_cmd_submit(x, NULL, flags);
++  if (cc != CC_SUCCESS)
++      return -1;
++  grub_dprintf("xhci", "%s: %p\n", __func__, &x->cmds->evt.control);
++  grub_dprintf("xhci", "%s: %x\n", __func__, grub_xhci_read32(&x->cmds->evt.control));
++
++  return (grub_xhci_read32(&x->cmds->evt.control) >> 24) & 0xff;
++}
++
++static int xhci_cmd_disable_slot(struct grub_xhci *x, grub_uint32_t slotid)
++{
++  grub_uint32_t flags = 0;
++  flags |= (CR_DISABLE_SLOT << 10);
++  flags |= (slotid << 24);
++
++  grub_dprintf("xhci", "%s: slotid %d\n", __func__, slotid);
++  return xhci_cmd_submit(x, NULL, flags);
++}
++
++static int xhci_cmd_stop_endpoint(struct grub_xhci *x, grub_uint32_t slotid
++				       , grub_uint32_t epid
++				       , grub_uint32_t suspend)
++{
++  grub_uint32_t flags = 0;
++  flags |= (CR_STOP_ENDPOINT << 10);
++  flags |= (epid << 16);
++  flags |= (suspend << 23) ;
++  flags |= (slotid << 24);
++
++  return xhci_cmd_submit(x, NULL, flags);
++}
++
++static int xhci_cmd_reset_endpoint(struct grub_xhci *x, grub_uint32_t slotid
++				       , grub_uint32_t epid
++				       , grub_uint32_t preserve)
++{
++  grub_uint32_t flags = 0;
++  flags |= (preserve << 9);
++  flags |= (CR_RESET_ENDPOINT << 10);
++  flags |= (epid << 16);
++  flags |= (slotid << 24);
++
++  return xhci_cmd_submit(x, NULL, flags);
++}
++
++static int xhci_cmd_set_dequeue_pointer(struct grub_xhci *x, grub_uint32_t slotid
++				       , grub_uint32_t epid
++				       , grub_addr_t tr_deque_pointer)
++{
++  grub_uint32_t flags = 0;
++  flags |= (CR_SET_TR_DEQUEUE << 10);
++  flags |= (epid << 16);
++  flags |= (slotid << 24);
++
++  xhci_trb_queue(x->cmds, tr_deque_pointer, 0, flags);
++
++  xhci_doorbell(x, 0, 0);
++  int rc = xhci_event_wait(x, x->cmds, 1000);
++  grub_dprintf("xhci", "%s: xhci_event_wait = %d\n", __func__, rc);
++
++  return rc;
++}
++
++static int xhci_cmd_address_device(struct grub_xhci *x, grub_uint32_t slotid,
++				   struct grub_pci_dma_chunk *inctx_dma)
++{
++  grub_uint32_t flags = 0;
++  flags |= (CR_ADDRESS_DEVICE << 10);
++  flags |= (slotid << 24);
++
++  grub_dprintf("xhci", "%s: slotid %d\n", __func__, slotid);
++  return xhci_cmd_submit(x, inctx_dma, flags);
++}
++
++static int xhci_cmd_configure_endpoint(struct grub_xhci *x, grub_uint32_t slotid,
++				       struct grub_pci_dma_chunk *inctx_dma)
++{
++  grub_uint32_t flags = 0;
++  flags |= (CR_CONFIGURE_ENDPOINT << 10);
++  flags |= (slotid << 24);
++
++  grub_dprintf("xhci", "%s: slotid %d\n", __func__, slotid);
++  return xhci_cmd_submit(x, inctx_dma, flags);
++}
++
++static int xhci_cmd_evaluate_context(struct grub_xhci *x, grub_uint32_t slotid,
++				     struct grub_pci_dma_chunk *inctx_dma)
++{
++  grub_uint32_t flags = 0;
++  flags |= (CR_EVALUATE_CONTEXT << 10);
++  flags |= (slotid << 24);
++
++  grub_dprintf("xhci", "%s: slotid %d\n", __func__, slotid);
++  return xhci_cmd_submit(x, inctx_dma, flags);
++}
++
++/****************************************************************
++ * xHCI host controller initialization
++ ****************************************************************/
++
++static grub_usb_err_t
++grub_xhci_reset (struct grub_xhci *x)
++{
++  grub_uint32_t reg;
++  grub_uint32_t end;
++
++  reg = grub_xhci_read32(&x->op->usbcmd);
++  if (reg & GRUB_XHCI_CMD_RS)
++    {
++      reg &= ~GRUB_XHCI_CMD_RS;
++      grub_xhci_write32(&x->op->usbcmd, reg);
++
++      end = grub_get_time_ms () + 32;
++      while (grub_xhci_read32(&x->op->usbcmd) & GRUB_XHCI_STS_HCH)
++	{
++	  if (grub_get_time_ms () > end)
++	      return GRUB_USB_ERR_TIMEOUT;
++
++	  grub_millisleep(1);
++	}
++    }
++
++  grub_dprintf("xhci", "grub_xhci_reset: resetting HC\n");
++  grub_xhci_write32(&x->op->usbcmd, GRUB_XHCI_CMD_HCRST);
++
++  /* Wait for device to complete reset and be enabled */
++  end = grub_get_time_ms () + 100;
++  while (grub_xhci_read32(&x->op->usbcmd) & GRUB_XHCI_CMD_HCRST)
++    {
++      if (grub_get_time_ms () > end)
++	  return GRUB_USB_ERR_TIMEOUT;
++
++      grub_millisleep(1);
++    }
++
++  /* Wait for device to complete reset and be enabled */
++  end = grub_get_time_ms () + 100;
++  while (grub_xhci_read32(&x->op->usbsts) & GRUB_XHCI_STS_CNR)
++    {
++      if (grub_get_time_ms () > end)
++	  return GRUB_USB_ERR_TIMEOUT;
++
++      grub_millisleep(1);
++    }
++
++  grub_xhci_write32(&x->op->config, x->slots);
++  grub_xhci_write32(&x->op->dcbaap_low, grub_dma_get_phys(x->devs_dma));
++  grub_xhci_write32(&x->op->dcbaap_high, 0);
++  grub_xhci_write32(&x->op->crcr_low, grub_dma_get_phys(x->cmds_dma)| 1);
++  grub_xhci_write32(&x->op->crcr_high, 0);
++  x->cmds->cs = 1;
++
++  grub_arch_sync_dma_caches(x->cmds, sizeof(*x->cmds));
++
++  x->eseg->ptr_low = grub_dma_get_phys(x->evts_dma);
++  x->eseg->ptr_high = 0;
++  x->eseg->size = GRUB_XHCI_RING_ITEMS;
++
++  grub_arch_sync_dma_caches(x->eseg, sizeof(*x->eseg));
++
++  grub_xhci_write32(&x->ir->erstsz, 1);
++  grub_xhci_write32(&x->ir->erdp_low, grub_dma_get_phys(x->evts_dma));
++  grub_xhci_write32(&x->ir->erdp_high, 0);
++  grub_xhci_write32(&x->ir->erstba_low, grub_dma_get_phys(x->eseg_dma));
++  grub_xhci_write32(&x->ir->erstba_high, 0);
++  x->evts->cs = 1;
++
++  grub_arch_sync_dma_caches(x->evts, sizeof(*x->eseg));
++
++  xhci_check_status(x);
++
++  grub_dprintf ("xhci", "XHCI OP COMMAND: %08x\n",
++		grub_xhci_read32 (&x->op->usbcmd));
++  grub_dprintf ("xhci", "XHCI OP STATUS: %08x\n",
++		grub_xhci_read32 (&x->op->usbsts));
++  grub_dprintf ("xhci", "XHCI OP PAGESIZE: %08x\n",
++		grub_xhci_read32 (&x->op->pagesize));
++  grub_dprintf ("xhci", "XHCI OP DNCTRL: %08x\n",
++		grub_xhci_read32 (&x->op->dnctl));
++  grub_dprintf ("xhci", "XHCI OP CRCR_LOW: %08x\n",
++		grub_xhci_read32 (&x->op->crcr_low));
++  grub_dprintf ("xhci", "XHCI OP CRCR_HIGH: %08x\n",
++		grub_xhci_read32 (&x->op->crcr_high));
++  grub_dprintf ("xhci", "XHCI OP DCBAAP_LOW: %08x\n",
++		grub_xhci_read32 (&x->op->dcbaap_low));
++  grub_dprintf ("xhci", "XHCI OP DCBAAP_HIGH: %08x\n",
++		grub_xhci_read32 (&x->op->dcbaap_high));
++  grub_dprintf ("xhci", "XHCI OP CONFIG: %08x\n",
++		grub_xhci_read32 (&x->op->config));
++  grub_dprintf ("xhci", "XHCI IR ERSTSZ: %08x\n",
++		grub_xhci_read32 (&x->ir->erstsz));
++  grub_dprintf ("xhci", "XHCI IR ERDP: %08x\n",
++		grub_xhci_read32 (&x->ir->erdp_low));
++  grub_dprintf ("xhci", "XHCI IR ERSTBA: %08x\n",
++		grub_xhci_read32 (&x->ir->erstba_low));
++
++  xhci_check_status(x);
++
++  return GRUB_USB_ERR_NONE;
++}
++
++static grub_usb_err_t
++grub_xhci_request_legacy_handoff(volatile struct grub_xhci_xcap *xcap)
++{
++  grub_uint32_t end;
++
++  end = grub_get_time_ms () + 10;
++  for (;;)
++    {
++      grub_uint32_t cap = grub_xhci_read32(&xcap->cap);
++      if (cap & (1 << 16))
++	grub_xhci_write32(&xcap->cap, cap | (1 << 24));
++      else
++        break;
++
++      if (grub_get_time_ms () > end)
++	{
++	  grub_dprintf ("xhci","ERROR: %s TIMEOUT\n", __func__);
++	  return GRUB_USB_ERR_TIMEOUT;
++	}
++      grub_millisleep(1);
++    }
++  return GRUB_USB_ERR_NONE;
++}
++
++static void
++grub_xhci_fill_default_speed_mapping(struct grub_xhci_psids *ids)
++{
++	/* Chapter 7.2.2.1.1 "Default USB Speed ID Mapping" */
++	ids->psids[0].id = 1;
++	ids->psids[0].psie = 2;
++	ids->psids[0].psim = 12;
++	ids->psids[1].id = 2;
++	ids->psids[1].psie = 1;
++	ids->psids[1].psim = 1500;
++	ids->psids[2].id = 3;
++	ids->psids[2].psie = 2;
++	ids->psids[2].psim = 480;
++	ids->psids[3].id = 4;
++	ids->psids[3].psie = 3;
++	ids->psids[3].psim = 5;
++	ids->psids[4].id = 5;
++	ids->psids[4].psie = 3;
++	ids->psids[4].psim = 10;
++	ids->psids[5].id = 6;
++	ids->psids[5].psie = 3;
++	ids->psids[5].psim = 10;
++	ids->psids[6].id = 7;
++	ids->psids[6].psie = 3;
++	ids->psids[6].psim = 20;
++}
++
++static void
++grub_xhci_calc_speed_mapping(struct grub_xhci_psids *ids)
++{
++  const grub_uint64_t mult[4] = {1ULL, 1000ULL, 1000000ULL, 1000000000ULL};
++
++  for (grub_uint8_t i = 0; i < 16; i++)
++    {
++      if (ids->psids[i].id == 0)
++	continue;
++      ids->psids[i].bitrate = mult[ids->psids[i].psie & 3] * (grub_uint64_t)ids->psids[i].psim;
++      if (ids->psids[i].bitrate < 12000000ULL)
++	ids->psids[i].grub_usb_speed = GRUB_USB_SPEED_LOW;
++      else if (ids->psids[i].bitrate < 480000000ULL)
++	ids->psids[i].grub_usb_speed = GRUB_USB_SPEED_FULL;
++      else if (ids->psids[i].bitrate > 1200000000ULL)
++	ids->psids[i].grub_usb_speed = GRUB_USB_SPEED_SUPER;
++      else
++	ids->psids[i].grub_usb_speed = GRUB_USB_SPEED_HIGH;
++    }
++}
++
++
++/* PCI iteration function... */
++void
++grub_xhci_init_device (volatile void *regs)
++{
++  struct grub_xhci *x;
++  grub_uint32_t hcs1, hcc, reg;
++
++  /* Allocate memory for the controller and fill basic values. */
++  x = grub_zalloc (sizeof (*x));
++  if (!x)
++    {
++      grub_dprintf("xhci", "Failed to allocate memory\n");
++      return;
++    }
++  x->caps = (volatile struct grub_xhci_caps *) regs;
++  x->op = (volatile struct grub_xhci_op *) (((grub_uint8_t *)regs) +
++      grub_xhci_read8(&x->caps->caplength));
++  x->pr = (volatile struct grub_xhci_pr *) (((grub_uint8_t *)x->op) +
++      GRUB_XHCI_PR_OFFSET);
++  x->db = (volatile struct grub_xhci_db *) (((grub_uint8_t *)regs) +
++      grub_xhci_read32(&x->caps->dboff));
++  x->ir = (volatile struct grub_xhci_ir *) (((grub_uint8_t *)regs) +
++		  grub_xhci_read32(&x->caps->rtsoff) + GRUB_XHCI_IR_OFFSET);
++
++  grub_dprintf ("xhci", "XHCI init: CAPLENGTH: 0x%02x\n",
++		grub_xhci_read8 (&x->caps->caplength));
++  grub_dprintf ("xhci", "XHCI init: HCIVERSION: 0x%04x\n",
++		grub_xhci_read16 (&x->caps->hciversion));
++  grub_dprintf ("xhci", "XHCI init: HCSPARAMS1: 0x%08x\n",
++		grub_xhci_read32 (&x->caps->hcsparams1));
++  grub_dprintf ("xhci", "XHCI init: HCSPARAMS2: 0x%08x\n",
++		grub_xhci_read32 (&x->caps->hcsparams2));
++  grub_dprintf ("xhci", "XHCI init: HCSPARAMS3: 0x%08x\n",
++		grub_xhci_read32 (&x->caps->hcsparams3));
++  grub_dprintf ("xhci", "XHCI init: HCCPARAMS: 0x%08x\n",
++		grub_xhci_read32 (&x->caps->hcsparams3));
++  grub_dprintf ("xhci", "XHCI init: DBOFF: 0x%08x\n",
++		grub_xhci_read32 (&x->caps->dboff));
++  grub_dprintf ("xhci", "XHCI init: RTOFF: 0x%08x\n",
++		grub_xhci_read32 (&x->caps->rtsoff));
++
++  hcs1 = grub_xhci_read32(&x->caps->hcsparams1);
++  hcc = grub_xhci_read32(&x->caps->hccparams);
++  x->ports = (grub_uint32_t) ((hcs1 >> 24) & 0xff);
++  x->slots = (grub_uint32_t) (hcs1	 & 0xff);
++  x->xcap  = (grub_uint32_t) ((hcc >> 16) & 0xffff) * sizeof(grub_uint32_t);
++  x->flag64 = (grub_uint8_t) ((hcc & 0x04) ? 1 : 0);
++  grub_dprintf("xhci", "XHCI init: %d ports, %d slots, %d byte contexts\n"
++	       , x->ports, x->slots, x->flag64 ? 64 : 32);
++
++  x->psids = grub_zalloc (sizeof (struct grub_xhci_psids) * x->ports);
++  if (x->xcap)
++    {
++      grub_uint32_t off;
++      volatile grub_uint8_t *addr = (grub_uint8_t *) x->caps + x->xcap;
++      do
++	{
++	  volatile struct grub_xhci_xcap *xcap = (void *)addr;
++	  grub_uint32_t ports, name, cap = grub_xhci_read32(&xcap->cap);
++	  switch (cap & 0xff) {
++	    case XHCI_CAP_LEGACY_SUPPORT:
++	      {
++		if (grub_xhci_request_legacy_handoff(xcap) != GRUB_USB_ERR_NONE)
++		  {
++		    grub_dprintf("xhci", "XHCI init: Failed to get xHCI ownership\n");
++		    goto fail;
++		  }
++	        break;
++	      }
++	    case XHCI_CAP_SUPPORTED_PROTOCOL:
++	      {
++		name  = grub_xhci_read32(&xcap->data[0]);
++		ports = grub_xhci_read32(&xcap->data[1]);
++		const grub_uint8_t major = (cap >> 24) & 0xff;
++		const grub_uint8_t minor = (cap >> 16) & 0xff;
++		const grub_uint8_t psic = (ports >> 28) & 0xf;
++		const grub_uint8_t count = (ports >> 8) & 0xff;
++		const grub_uint8_t start = (ports >> 0) & 0xff;
++		grub_dprintf("xhci", "XHCI init: protocol %c%c%c%c %x.%02x"
++				", %d ports (offset %d), def %x, psic %d\n"
++				, (name >>  0) & 0xff
++				, (name >>  8) & 0xff
++				, (name >> 16) & 0xff
++				, (name >> 24) & 0xff
++				, major, minor
++				, count, start
++				, ports >> 16
++				, psic);
++		if (name == 0x20425355 /* "USB " */)
++		  {
++		    if (major == 2)
++		      {
++			x->usb2.start = start;
++			x->usb2.count = count;
++		      }
++		    else if (major == 3)
++		      {
++			x->usb3.start = start;
++			x->usb3.count = count;
++		      }
++
++		    for (grub_uint32_t p = start - 1; p < start + count - 1UL; p++)
++		      {
++			x->psids[p].major = major;
++			x->psids[p].minor = minor;
++			grub_xhci_fill_default_speed_mapping(&x->psids[p]);
++			for (grub_uint8_t i = 0; i < psic; i++)
++			  {
++			    grub_uint32_t psid = grub_xhci_read32(&xcap->data[3 + i]);
++			    x->psids[p].psids[i].id = (psid >> 0) & 0xf;
++			    x->psids[p].psids[i].psie = (psid >> 4) & 0x3;
++			    x->psids[p].psids[i].psim = (psid >> 16) & 0xfffff;
++			  }
++			grub_xhci_calc_speed_mapping(&x->psids[p]);
++		      }
++		  }
++
++		break;
++	      }
++	    default:
++	      {
++	        grub_dprintf("xhci", "XHCI    extcap 0x%x @ %p\n", cap & 0xff, addr);
++	        break;
++	      }
++	  }
++	off = (cap >> 8) & 0xff;
++	addr += off << 2;
++	}
++      while (off > 0);
++    }
++
++  x->pagesize = xhci_get_pagesize(x);
++  grub_dprintf("xhci", "XHCI init: Minimum supported page size 0x%x\n",
++	       x->pagesize);
++
++  /* Chapter 6.1 Device Context Base Address Array */
++  x->devs_dma = xhci_memalign_dma32(ALIGN_DCBAA,
++				    sizeof(*x->devs) * (x->slots + 1),
++				    x->pagesize);
++  if (!x->devs_dma)
++      goto fail;
++  x->devs = grub_dma_get_virt(x->devs_dma);
++  grub_memset((void *)x->devs, 0, sizeof(*x->devs) * (x->slots + 1));
++  grub_arch_sync_dma_caches(x->devs, sizeof(*x->devs) * (x->slots + 1));
++  grub_dprintf ("xhci", "XHCI init: device memory %p (%x)\n",
++		grub_dma_get_virt(x->devs_dma),
++		grub_dma_get_phys(x->devs_dma));
++
++  /* Chapter 6.5 Event Ring Segment Table */
++  x->eseg_dma = xhci_memalign_dma32(ALIGN_EVT_RING_TABLE, sizeof(*x->eseg), 0);
++  if (!x->eseg_dma)
++      goto fail;
++  x->eseg = grub_dma_get_virt(x->eseg_dma);
++  grub_memset((void *)x->eseg, 0, sizeof(*x->eseg));
++  grub_arch_sync_dma_caches(x->eseg, sizeof(*x->eseg));
++  grub_dprintf ("xhci", "XHCI init: event ring table memory %p (%x)\n",
++		grub_dma_get_virt(x->eseg_dma),
++		grub_dma_get_phys(x->eseg_dma));
++
++  x->cmds_dma = xhci_memalign_dma32(ALIGN_CMD_RING_SEG, sizeof(*x->cmds),
++				    BOUNDARY_RING);
++  if (!x->cmds_dma)
++      goto fail;
++  x->cmds = grub_dma_get_virt(x->cmds_dma);
++  grub_memset((void *)x->cmds, 0, sizeof(*x->cmds));
++  grub_arch_sync_dma_caches(x->cmds, sizeof(*x->cmds));
++  grub_dprintf ("xhci", "XHCI init: command ring memory %p (%x)\n",
++		grub_dma_get_virt(x->cmds_dma),
++		grub_dma_get_phys(x->cmds_dma));
++
++  x->evts_dma = xhci_memalign_dma32(ALIGN_EVT_RING_SEG, sizeof(*x->evts),
++				    BOUNDARY_RING);
++  if (!x->evts_dma)
++      goto fail;
++  x->evts = grub_dma_get_virt(x->evts_dma);
++  grub_memset((void *)x->evts, 0, sizeof(*x->evts));
++  grub_arch_sync_dma_caches(x->evts, sizeof(*x->evts));
++  grub_dprintf ("xhci", "XHCI init: event ring memory %p (%x)\n",
++		grub_dma_get_virt(x->evts_dma),
++		grub_dma_get_phys(x->evts_dma));
++
++  /* Chapter 4.20 Scratchpad Buffers */
++  reg = grub_xhci_read32(&x->caps->hcsparams2);
++  x->spb = (reg >> 21 & 0x1f) << 5 | reg >> 27;
++  if (x->spb)
++    {
++      volatile grub_uint64_t *spba;
++      grub_dprintf("xhci", "XHCI init: set up %d scratch pad buffers\n",
++		   x->spb);
++      x->spba_dma = xhci_memalign_dma32(ALIGN_SPBA, sizeof(*spba) * x->spb,
++					x->pagesize);
++      if (!x->spba_dma)
++	goto fail;
++
++      x->spad_dma = xhci_memalign_dma32(x->pagesize, x->pagesize * x->spb,
++					x->pagesize);
++      if (!x->spad_dma)
++	{
++	  grub_dma_free(x->spba_dma);
++	  goto fail;
++	}
++
++      spba = grub_dma_get_virt(x->spba_dma);
++      for (grub_uint32_t i = 0; i < x->spb; i++)
++	spba[i] = (grub_addr_t)grub_dma_get_phys(x->spad_dma) + (i * x->pagesize);
++      grub_arch_sync_dma_caches(x->spba_dma, sizeof(*spba) * x->spb);
++
++      x->devs[0].ptr_low = grub_dma_get_phys(x->spba_dma);
++      x->devs[0].ptr_high = 0;
++      grub_arch_sync_dma_caches(x->devs_dma, sizeof(x->devs[0]));
++      grub_dprintf ("xhci", "XHCI init: Allocated %d scratch buffers of size 0x%x\n",
++		    x->spb, x->pagesize);
++    }
++
++  grub_xhci_reset(x);
++
++  /* Set the running bit */
++  reg = grub_xhci_read32 (&x->op->usbcmd);
++  reg |= GRUB_XHCI_CMD_RS;
++  grub_xhci_write32 (&x->op->usbcmd, reg);
++
++
++  /* Link to xhci now that initialisation is successful.  */
++  x->next = xhci;
++  xhci = x;
++
++  return;
++
++fail:
++  grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: FAILED!\n");
++  if (x)
++    {
++      if (x->devs_dma)
++	grub_dma_free (x->devs_dma);
++      if (x->eseg_dma)
++	grub_dma_free (x->eseg_dma);
++      if (x->cmds_dma)
++	grub_dma_free (x->cmds_dma);
++      if (x->evts_dma)
++	grub_dma_free (x->evts_dma);
++      if (x->spad_dma)
++	grub_dma_free (x->spad_dma);
++      if (x->spba_dma)
++	grub_dma_free (x->spba_dma);
++    }
++  grub_free (x);
++
++  return;
++}
++
++static int
++grub_xhci_iterate (grub_usb_controller_iterate_hook_t hook, void *hook_data)
++{
++  struct grub_xhci *x;
++  struct grub_usb_controller dev;
++
++  for (x = xhci; x; x = x->next)
++    {
++      dev.data = x;
++      if (hook (&dev, hook_data))
++	return 1;
++    }
++
++  return 0;
++}
++
++/****************************************************************
++ * xHCI maintainance functions 
++ ****************************************************************/
++
++static grub_usb_err_t
++grub_xhci_update_hub_portcount (struct grub_xhci *x,
++				grub_usb_transfer_t transfer,
++				grub_uint32_t slotid)
++{
++  struct grub_pci_dma_chunk *in_dma;
++  volatile struct grub_xhci_slotctx *hdslot;
++  grub_uint32_t epid = 0;
++
++  if (!transfer || !transfer->dev || !transfer->dev->nports)
++    return GRUB_USB_ERR_NONE;
++
++  hdslot = grub_dma_phys2virt(x->devs[slotid].ptr_low, x->devs_dma);
++  if ((hdslot->ctx[3] >> 27) == 3)
++    /* Already configured */
++    return 0;
++
++  grub_dprintf("xhci", "%s: updating hub config to %d ports\n", __func__,
++	       transfer->dev->nports);
++
++  xhci_check_status(x);
++
++  /* Allocate input context and initialize endpoint info. */
++  in_dma = grub_xhci_alloc_inctx(x, epid, transfer->dev);
++  if (!in_dma)
++    return GRUB_USB_ERR_INTERNAL;
++  volatile struct grub_xhci_inctx *in = grub_dma_get_virt(in_dma);
++
++  in->add = (1 << epid);
++
++  struct grub_xhci_epctx *ep = (void*)&in[(epid+1) << x->flag64];
++  ep->ctx[0]   |= 1 << 26;
++  ep->ctx[1]   |= transfer->dev->nports << 24;
++
++  int cc = xhci_cmd_configure_endpoint(x, slotid, in_dma);
++  grub_dma_free(in_dma);
++
++  if (cc != CC_SUCCESS)
++    {
++      grub_dprintf("xhci", "%s: reconf ctl endpoint: failed (cc %d)\n",
++		   __func__, cc);
++      return GRUB_USB_ERR_BADDEVICE;
++    }
++
++  return GRUB_USB_ERR_NONE;
++}
++
++static grub_usb_err_t
++grub_xhci_update_max_paket_size (struct grub_xhci *x,
++				 grub_usb_transfer_t transfer,
++				 grub_uint32_t slotid,
++				 grub_uint32_t max_packet)
++{
++  struct grub_pci_dma_chunk *in_dma;
++  grub_uint32_t epid = 1;
++
++  if (!transfer || !transfer->dev || !max_packet)
++    return GRUB_USB_ERR_NONE;
++
++  grub_dprintf("xhci", "%s: updating max packet size to 0x%x\n", __func__,
++	       max_packet);
++
++  xhci_check_status(x);
++
++  /* Allocate input context and initialize endpoint info. */
++  in_dma = grub_xhci_alloc_inctx(x, epid, transfer->dev);
++  if (!in_dma)
++    return GRUB_USB_ERR_INTERNAL;
++  volatile struct grub_xhci_inctx *in = grub_dma_get_virt(in_dma);
++  in->add = (1 << epid);
++
++  struct grub_xhci_epctx *ep = (void*)&in[(epid+1) << x->flag64];
++  ep->ctx[1]   |= max_packet << 16;
++
++  int cc = xhci_cmd_evaluate_context(x, slotid, in_dma);
++  grub_dma_free(in_dma);
++
++  if (cc != CC_SUCCESS)
++    {
++      grub_dprintf("xhci", "%s: reconf ctl endpoint: failed (cc %d)\n",
++		   __func__, cc);
++      return GRUB_USB_ERR_BADDEVICE;
++    }
++
++  return GRUB_USB_ERR_NONE;
++}
++
++/****************************************************************
++ * xHCI endpoint enablement functions
++ ****************************************************************/
++
++static grub_usb_err_t
++grub_xhci_prepare_endpoint (struct grub_xhci *x,
++			    struct grub_usb_device *dev,
++			    grub_uint8_t endpoint,
++			    grub_transfer_type_t dir,
++			    grub_transaction_type_t type,
++			    grub_uint32_t maxpaket,
++			    struct grub_xhci_priv *priv)
++{
++  grub_uint32_t epid;
++  struct grub_pci_dma_chunk *reqs_dma;
++  struct grub_pci_dma_chunk *in_dma;
++  volatile struct grub_xhci_ring *reqs;
++  volatile struct grub_xhci_slotctx *slotctx;
++
++  if (!x || !priv)
++    return GRUB_USB_ERR_INTERNAL;
++
++  xhci_check_status(x);
++
++  if (endpoint == 0)
++    {
++      epid = 1;
++    }
++  else
++    {
++      epid = (endpoint & 0x0f) * 2;
++      epid += (dir == GRUB_USB_TRANSFER_TYPE_IN) ? 1 : 0;
++    }
++  grub_dprintf("xhci", "%s: epid %d\n", __func__, epid);
++
++  /* Test if already prepared */
++  if (priv->slotid > 0 && priv->enpoint_trbs[epid] != NULL)
++    return GRUB_USB_ERR_NONE;
++
++  /* Allocate DMA buffer as endpoint cmd TRB */
++  reqs_dma = xhci_memalign_dma32(ALIGN_TRB, sizeof(*reqs),
++				 BOUNDARY_RING);
++  if (!reqs_dma)
++    return GRUB_USB_ERR_INTERNAL;
++  reqs = grub_dma_get_virt(reqs_dma);
++  grub_memset((void *)reqs, 0, sizeof(*reqs));
++  reqs->cs = 1;
++
++  grub_arch_sync_dma_caches(reqs, sizeof(*reqs));
++
++  /* Allocate input context and initialize endpoint info. */
++  in_dma = grub_xhci_alloc_inctx(x, epid, dev);
++  if (!in_dma)
++    {
++      grub_dma_free(reqs_dma);
++      return GRUB_USB_ERR_INTERNAL;
++    }
++  volatile struct grub_xhci_inctx *in = grub_dma_get_virt(in_dma);
++  in->add = 0x01 | (1 << epid);
++
++  struct grub_xhci_epctx *ep = (void*)&in[(epid+1) << x->flag64];
++  switch (type)
++    {
++      case GRUB_USB_TRANSACTION_TYPE_CONTROL:
++        ep->ctx[1]   |= 0 << 3;
++        break;
++      case GRUB_USB_TRANSACTION_TYPE_BULK:
++        ep->ctx[1]   |= 2 << 3;
++        break;
++    }
++  if (dir == GRUB_USB_TRANSFER_TYPE_IN
++      || type== GRUB_USB_TRANSACTION_TYPE_CONTROL)
++      ep->ctx[1] |= 1 << 5;
++  ep->ctx[1]   |= maxpaket << 16;
++  ep->deq_low  = grub_dma_get_phys(reqs_dma);
++  ep->deq_low  |= 1;	 /* dcs */
++  ep->length   = maxpaket;
++
++  grub_dprintf("xhci", "%s: ring %p, epid %d, max %d\n", __func__,
++	       reqs, epid, maxpaket);
++  if (epid == 1 || priv->slotid == 0) {
++    /* Enable slot. */
++    int slotid = xhci_cmd_enable_slot(x);
++    if (slotid < 0)
++      {
++	grub_dprintf("xhci", "%s: enable slot: failed\n", __func__);
++	grub_dma_free(reqs_dma);
++	grub_dma_free(in_dma);
++	return GRUB_USB_ERR_BADDEVICE;
++      }
++    grub_dprintf("xhci", "%s: get slot %d assigned\n", __func__, slotid);
++
++    grub_uint32_t size = (sizeof(struct grub_xhci_slotctx) * GRUB_XHCI_MAX_ENDPOINTS) << x->flag64;
++
++    /* Allocate memory for the device specific slot context */
++    priv->slotctx_dma = xhci_memalign_dma32(ALIGN_SLOTCTX, size,
++					    x->pagesize);
++    if (!priv->slotctx_dma)
++      {
++	grub_dprintf("xhci", "%s: grub_memalign_dma32 failed\n", __func__);
++	grub_dma_free(reqs_dma);
++	grub_dma_free(in_dma);
++	return GRUB_USB_ERR_INTERNAL;
++      }
++    slotctx = grub_dma_get_virt(priv->slotctx_dma);
++
++    grub_dprintf("xhci", "%s: enable slot: got slotid %d\n", __func__, slotid);
++    grub_memset((void *)slotctx, 0, size);
++    grub_arch_sync_dma_caches(slotctx, size);
++
++    x->devs[slotid].ptr_low = grub_dma_get_phys(priv->slotctx_dma);
++    x->devs[slotid].ptr_high = 0;
++    grub_arch_sync_dma_caches(&x->devs[slotid], sizeof(x->devs[0]));
++
++    /* Send set_address command. */
++    int cc = xhci_cmd_address_device(x, slotid, in_dma);
++    if (cc != CC_SUCCESS)
++      {
++	grub_dprintf("xhci","%s: address device: failed (cc %d)\n", __func__, cc);
++	cc = xhci_cmd_disable_slot(x, slotid);
++	if (cc != CC_SUCCESS) {
++	    grub_dprintf("xhci", "%s: disable failed (cc %d)\n", __func__, cc);
++	} else {
++	  x->devs[slotid].ptr_low = 0;
++	  x->devs[slotid].ptr_high = 0;
++	  grub_arch_sync_dma_caches(&x->devs[slotid], sizeof(x->devs[0]));
++	}
++	grub_dma_free(priv->slotctx_dma);
++	grub_dma_free(reqs_dma);
++	grub_dma_free(in_dma);
++	return GRUB_USB_ERR_BADDEVICE;
++      }
++    priv->enpoint_trbs[epid] = reqs;
++    priv->enpoint_trbs_dma[epid] = reqs_dma;
++    priv->slotid = slotid;
++    priv->max_packet = 0;
++  }
++  if (epid != 1)
++    {
++	/* Send configure command. */
++	int cc = xhci_cmd_configure_endpoint(x, priv->slotid, in_dma);
++	if (cc != CC_SUCCESS)
++	  {
++	    grub_dprintf("xhci", "%s: configure endpoint: failed (cc %d)\n",
++			 __func__, cc);
++	    grub_dma_free(reqs_dma);
++	    grub_dma_free(in_dma);
++	    return GRUB_USB_ERR_BADDEVICE;
++	  }
++      priv->enpoint_trbs[epid] = reqs;
++      priv->enpoint_trbs_dma[epid] = reqs_dma;
++    }
++
++  grub_dprintf("xhci", "%s: done\n", __func__);
++  grub_dma_free(in_dma);
++
++  return GRUB_USB_ERR_NONE;
++}
++
++
++/****************************************************************
++ * xHCI transfer helper functions
++ ****************************************************************/
++
++static grub_usb_err_t
++grub_xhci_usb_to_grub_err (unsigned char status)
++{
++  if (status != CC_SUCCESS)
++    grub_dprintf("xhci", "%s: xfer failed (cc %d)\n", __func__, status);
++  else
++    grub_dprintf("xhci", "%s: xfer done   (cc %d)\n", __func__, status);
++
++  if (status == CC_BABBLE_DETECTED)
++    return GRUB_USB_ERR_BABBLE;
++  else if (status == CC_DATA_BUFFER_ERROR)
++    return GRUB_USB_ERR_DATA;
++  else if (status == CC_STALL_ERROR)
++    return GRUB_USB_ERR_STALL;
++  else if (status != CC_SUCCESS)
++    return GRUB_USB_ERR_NAK;
++
++  return GRUB_USB_ERR_NONE;
++}
++
++static int
++grub_xhci_transfer_is_zlp(grub_usb_transfer_t transfer, int idx)
++{
++  if (idx >= transfer->transcnt)
++    return 0;
++
++  grub_usb_transaction_t tr = &transfer->transactions[idx];
++
++  return (tr->size == 0) &&
++    ((tr->pid == GRUB_USB_TRANSFER_TYPE_OUT) ||
++    (tr->pid == GRUB_USB_TRANSFER_TYPE_IN));
++}
++
++static int
++grub_xhci_transfer_is_last(grub_usb_transfer_t transfer, int idx)
++{
++    return (idx + 1) == transfer->transcnt;
++}
++
++static int
++grub_xhci_transfer_is_data(grub_usb_transfer_t transfer, int idx)
++{
++  grub_usb_transaction_t tr;
++
++  if (idx >= transfer->transcnt)
++    return 0;
++
++  tr = &transfer->transactions[idx];
++  if (tr->size == 0 ||
++      (tr->pid == GRUB_USB_TRANSFER_TYPE_SETUP))
++    return 0;
++
++  /* If there's are no DATA pakets before it's a DATA paket */
++  for (int i = idx - 1; i >= 0; i--)
++    {
++      tr = &transfer->transactions[i];
++      if (tr->size > 0 &&
++	  ((tr->pid == GRUB_USB_TRANSFER_TYPE_OUT) ||
++	  (tr->pid == GRUB_USB_TRANSFER_TYPE_IN)))
++	    return 0;
++    }
++  return 1;
++}
++
++static int
++grub_xhci_transfer_is_in(grub_usb_transfer_t transfer, int idx)
++{
++  grub_usb_transaction_t tr;
++
++  if (idx >= transfer->transcnt)
++    return 0;
++
++  tr = &transfer->transactions[idx];
++
++  return tr->pid == GRUB_USB_TRANSFER_TYPE_IN;
++}
++
++static int
++grub_xhci_transfer_is_normal(grub_usb_transfer_t transfer, int idx)
++{
++  grub_usb_transaction_t tr;
++
++  if (idx >= transfer->transcnt)
++    return 0;
++
++  tr = &transfer->transactions[idx];
++  if (tr->size == 0 ||
++      (tr->pid == GRUB_USB_TRANSFER_TYPE_SETUP))
++    return 0;
++
++  /* If there's at least one DATA paket before it's a normal */
++  for (int i = idx - 1; i >= 0; i--)
++    {
++      tr = &transfer->transactions[i];
++      if (tr->size > 0 &&
++	  ((tr->pid == GRUB_USB_TRANSFER_TYPE_OUT) ||
++	  (tr->pid == GRUB_USB_TRANSFER_TYPE_IN)))
++	    return 1;
++
++    }
++  return 0;
++}
++
++static int
++grub_xhci_transfer_next_is_normal(grub_usb_transfer_t transfer, int idx)
++{
++  return grub_xhci_transfer_is_normal(transfer, idx + 1);
++}
++
++static int
++grub_xhci_transfer_next_is_in(grub_usb_transfer_t transfer, int idx)
++{
++  return grub_xhci_transfer_is_in(transfer, idx + 1);
++}
++
++static grub_uint8_t grub_xhci_epid_from_transfer(grub_usb_transfer_t transfer)
++{
++  grub_uint8_t epid;
++
++  if (transfer->endpoint == 0) {
++      epid = 1;
++  } else {
++    epid = (transfer->endpoint & 0x0f) * 2;
++    epid += (transfer->dir == GRUB_USB_TRANSFER_TYPE_IN) ? 1 : 0;
++  }
++  return epid;
++}
++
++/****************************************************************
++ * xHCI transfer functions
++ ****************************************************************/
++
++static grub_usb_err_t
++grub_xhci_setup_transfer (grub_usb_controller_t dev,
++			  grub_usb_transfer_t transfer)
++{
++  struct grub_xhci_transfer_controller_data *cdata;
++  struct grub_xhci *x = (struct grub_xhci *) dev->data;
++  grub_uint8_t epid;
++  grub_usb_err_t err;
++  volatile struct grub_xhci_ring *reqs;
++  int rc;
++  struct grub_xhci_priv *priv;
++
++   xhci_check_status(x);
++
++  if (!dev || !transfer || !transfer->dev || !transfer->dev->xhci_priv)
++    return GRUB_USB_ERR_INTERNAL;
++
++  priv = transfer->dev->xhci_priv;
++  err = grub_xhci_prepare_endpoint(x, transfer->dev,
++				   transfer->endpoint,
++				   transfer->dir,
++				   transfer->type,
++				   transfer->max,
++				   priv);
++
++  if (err != GRUB_USB_ERR_NONE)
++    return err;
++
++  epid = grub_xhci_epid_from_transfer(transfer);
++
++  /* Update the max packet size once descdev.maxsize0 is valid */
++  if (epid == 1 &&
++      (priv->max_packet == 0) &&
++      (transfer->dev->descdev.maxsize0 > 0))
++    {
++      if (transfer->dev->speed == GRUB_USB_SPEED_SUPER)
++        priv->max_packet = 1UL << transfer->dev->descdev.maxsize0;
++      else
++        priv->max_packet = transfer->dev->descdev.maxsize0;
++      err = grub_xhci_update_max_paket_size(x, transfer, priv->slotid, priv->max_packet);
++      if (err != GRUB_USB_ERR_NONE)
++        {
++          grub_dprintf("xhci", "%s: Updating max paket size failed\n", __func__);
++          return err;
++        }
++    }
++  if (epid == 1 &&
++      transfer->dev->descdev.class == 9 &&
++      transfer->dev->nports > 0)
++    {
++      err = grub_xhci_update_hub_portcount(x, transfer, priv->slotid);
++      if (err != GRUB_USB_ERR_NONE)
++        {
++          grub_dprintf("xhci", "%s: Updating max paket size failed\n", __func__);
++          return err;
++        }
++    }
++
++  /* Allocate private data for the transfer */
++  cdata = grub_zalloc(sizeof(*cdata));
++  if (!cdata)
++    return GRUB_USB_ERR_INTERNAL;
++
++  reqs = priv->enpoint_trbs[epid];
++
++  transfer->controller_data = cdata;
++
++  /* Now queue the transfer onto the TRB */
++  if (transfer->type == GRUB_USB_TRANSACTION_TYPE_CONTROL)
++  {
++    volatile struct grub_usb_packet_setup *setupdata;
++    setupdata = (void *)transfer->transactions[0].data;
++    grub_dprintf("xhci", "%s: CONTROLL TRANS req %d\n", __func__, setupdata->request);
++    grub_dprintf("xhci", "%s: CONTROLL TRANS length %d\n", __func__, setupdata->length);
++
++    if (setupdata && setupdata->request == GRUB_USB_REQ_SET_ADDRESS)
++      return GRUB_USB_ERR_NONE;
++
++    if (transfer->transcnt < 2)
++      return GRUB_USB_ERR_INTERNAL;
++
++    for (int i = 0; i < transfer->transcnt; i++)
++      {
++	grub_uint32_t flags = 0;
++	grub_uint64_t inline_data;
++	grub_usb_transaction_t tr = &transfer->transactions[i];
++
++	switch (tr->pid)
++	  {
++	    case GRUB_USB_TRANSFER_TYPE_SETUP:
++	      {
++		grub_dprintf("xhci", "%s: SETUP PKG\n", __func__);
++		grub_dprintf("xhci", "%s: transfer->size %d\n", __func__, transfer->size);
++		grub_dprintf("xhci", "%s: tr->size %d SETUP PKG\n", __func__, tr->size);
++
++		flags |= (TR_SETUP << 10);
++		flags |= TRB_TR_IDT;
++
++		if (transfer->size > 0)
++		  {
++		    if (grub_xhci_transfer_next_is_in(transfer, i))
++		      flags |= (3 << 16); /* TRT IN */
++		    else
++		      flags |= (2 << 16); /* TRT OUT */
++		  }
++		break;
++	      }
++	    case GRUB_USB_TRANSFER_TYPE_OUT:
++	      {
++		grub_dprintf("xhci", "%s: OUT PKG\n", __func__);
++		cdata->transfer_size += tr->size;
++		break;
++	      }
++	    case GRUB_USB_TRANSFER_TYPE_IN:
++	      {
++		grub_dprintf("xhci", "%s: IN PKG\n", __func__);
++		cdata->transfer_size += tr->size;
++		flags |= TRB_TR_DIR;
++		break;
++	      }
++	  }
++
++	if (grub_xhci_transfer_is_normal(transfer, i))
++	  flags |= (TR_NORMAL << 10);
++	else if (grub_xhci_transfer_is_data(transfer, i))
++	  flags |= (TR_DATA << 10);
++	else if (grub_xhci_transfer_is_zlp(transfer, i))
++	  flags |= (TR_STATUS << 10);
++
++	if (grub_xhci_transfer_next_is_normal(transfer, i))
++	  flags |= TRB_TR_CH;
++
++	if (grub_xhci_transfer_is_last(transfer, i))
++	  flags |= TRB_TR_IOC;
++
++	/* Assume the ring has enough free space for all TRBs */
++	if (flags & TRB_TR_IDT && tr->size <= (int)sizeof(inline_data))
++	  {
++	    grub_memcpy(&inline_data, (void *)tr->data, tr->size);
++	    xhci_trb_queue(reqs, inline_data, tr->size, flags);
++	  }
++	else
++	  {
++	    xhci_trb_queue(reqs, tr->data, tr->size, flags);
++	  }
++      }
++  }
++  else if (transfer->type == GRUB_USB_TRANSACTION_TYPE_BULK)
++    {
++      for (int i = 0; i < transfer->transcnt; i++)
++	{
++	  grub_uint32_t flags = (TR_NORMAL << 10);
++	  grub_usb_transaction_t tr = &transfer->transactions[i];
++	  switch (tr->pid)
++	    {
++	      case GRUB_USB_TRANSFER_TYPE_OUT:
++		{
++		  grub_dprintf("xhci", "%s: OUT PKG\n", __func__);
++		  cdata->transfer_size += tr->size;
++		  break;
++		}
++	      case GRUB_USB_TRANSFER_TYPE_IN:
++		{
++		  grub_dprintf("xhci", "%s: IN PKG\n", __func__);
++		  cdata->transfer_size += tr->size;
++		  flags |= TRB_TR_DIR;
++		  break;
++		}
++		case GRUB_USB_TRANSFER_TYPE_SETUP:
++		  break;
++	    }
++	  if (grub_xhci_transfer_is_last(transfer, i))
++	    flags |= TRB_TR_IOC;
++
++	  /* The ring might be to small, submit while adding new entries */
++	  rc = xhci_trb_queue_and_flush(x, priv->slotid, epid,
++				  reqs, tr->data, tr->size, flags);
++	  if (rc < 0)
++	    return GRUB_USB_ERR_TIMEOUT;
++	  else if (rc > 1)
++	    return grub_xhci_usb_to_grub_err(rc);
++
++	}
++    }
++  xhci_doorbell(x, priv->slotid, epid);
++
++  return GRUB_USB_ERR_NONE;
++}
++
++static grub_usb_err_t
++grub_xhci_check_transfer (grub_usb_controller_t dev,
++			  grub_usb_transfer_t transfer, grub_size_t * actual)
++{
++  grub_uint32_t status;
++  grub_uint32_t remaining;
++  grub_uint8_t epid;
++  volatile struct grub_xhci_ring *reqs;
++  grub_usb_err_t err;
++  int rc;
++
++  if (!dev->data || !transfer->controller_data || !transfer->dev ||
++      !transfer->dev->xhci_priv)
++    return GRUB_USB_ERR_INTERNAL;
++
++
++  struct grub_xhci_priv *priv = transfer->dev->xhci_priv;
++  struct grub_xhci *x = (struct grub_xhci *) dev->data;
++  struct grub_xhci_transfer_controller_data *cdata =
++    transfer->controller_data;
++
++  xhci_check_status(x);
++  xhci_process_events(x);
++
++  epid = grub_xhci_epid_from_transfer(transfer);
++
++  reqs = priv->enpoint_trbs[epid];
++
++  /* XXX: invalidate caches */
++
++  /* Get current status from event ring buffer */
++  status = (reqs->evt.status>> 24) & 0xff;
++  remaining = reqs->evt.status & 0xffffff;
++
++  if (status != CC_STOPPED_LENGTH_INVALID)
++      *actual = cdata->transfer_size - remaining;
++  else
++    *actual = 0;
++
++  if (xhci_ring_busy(reqs))
++      return GRUB_USB_ERR_WAIT;
++
++  grub_free(cdata);
++
++  grub_dprintf("xhci", "%s: xfer done\n", __func__);
++
++  err = grub_xhci_usb_to_grub_err(status);
++  if (err != GRUB_USB_ERR_NONE)
++    {
++      if (status == CC_STALL_ERROR)
++	{
++	  /* Clear the stall by resetting the endpoint */
++	  rc = xhci_cmd_reset_endpoint(x, priv->slotid, epid, 1);
++
++	  if (rc < 0)
++	    return GRUB_USB_ERR_TIMEOUT;
++
++	  return GRUB_USB_ERR_STALL;
++	}
++      else if (remaining > 0)
++	{
++	  return GRUB_USB_ERR_DATA;
++	}
++    }
++
++  return err;
++}
++
++static grub_usb_err_t
++grub_xhci_cancel_transfer (grub_usb_controller_t dev,
++			grub_usb_transfer_t transfer)
++{
++  grub_uint8_t epid;
++  volatile struct grub_xhci_ring *reqs;
++  struct grub_pci_dma_chunk *enpoint_trbs_dma;
++  grub_addr_t deque_pointer;
++  int rc;
++
++  if (!dev->data || !transfer->controller_data || !transfer->dev ||
++      !transfer->dev->xhci_priv)
++      return GRUB_USB_ERR_INTERNAL;
++
++  struct grub_xhci *x = (struct grub_xhci *) dev->data;
++  struct grub_xhci_transfer_controller_data *cdata =
++    transfer->controller_data;
++  struct grub_xhci_priv *priv = transfer->dev->xhci_priv;
++
++  epid = grub_xhci_epid_from_transfer(transfer);
++
++  enpoint_trbs_dma = priv->enpoint_trbs_dma[epid];
++  reqs = priv->enpoint_trbs[epid];
++
++  /* Abort current command */
++  rc = xhci_cmd_stop_endpoint(x, priv->slotid, epid, 0);
++  if (rc < 0)
++    return GRUB_USB_ERR_TIMEOUT;
++
++  /* Reset state */
++  reqs->nidx = 0;
++  reqs->eidx = 0;
++  reqs->cs = 1;
++
++  grub_arch_sync_dma_caches(reqs, sizeof(*reqs));
++
++  /* Reset the dequeue pointer to the begging of the TRB */
++  deque_pointer = grub_dma_get_phys(enpoint_trbs_dma);
++  rc = xhci_cmd_set_dequeue_pointer(x, priv->slotid, epid, deque_pointer| 1 );
++  if (rc < 0)
++    return GRUB_USB_ERR_TIMEOUT;
++
++  reqs->evt.ptr_low = 0;
++  reqs->evt.ptr_high = 0;
++  reqs->evt.control = 0;
++  reqs->evt.status = 0;
++
++  grub_arch_sync_dma_caches(reqs, sizeof(*reqs));
++
++  /* Restart ring buffer processing */
++  xhci_doorbell(x, priv->slotid, epid);
++
++  grub_free (cdata);
++
++  return GRUB_USB_ERR_NONE;
++}
++
++/****************************************************************
++ * xHCI port status functions
++ ****************************************************************/
++
++static int
++grub_xhci_hubports (grub_usb_controller_t dev)
++{
++  struct grub_xhci *x = (struct grub_xhci *) dev->data;
++  grub_uint32_t portinfo;
++
++  portinfo = x->ports;
++  grub_dprintf ("xhci", "root hub ports=%d\n", portinfo);
++  return portinfo;
++}
++
++static grub_usb_err_t
++grub_xhci_portstatus (grub_usb_controller_t dev,
++			  unsigned int port, unsigned int enable)
++{
++  struct grub_xhci *x = (struct grub_xhci *) dev->data;
++  grub_uint32_t portsc, pls;
++  grub_uint32_t end;
++
++  portsc = grub_xhci_port_read(x, port);
++  pls = xhci_get_field(portsc, XHCI_PORTSC_PLS);
++
++  grub_dprintf("xhci", "grub_xhci_portstatus port #%d: 0x%08x,%s%s pls %d enable %d\n",
++	       port, portsc,
++	       (portsc & GRUB_XHCI_PORTSC_PP)  ? " powered," : "",
++	       (portsc & GRUB_XHCI_PORTSC_PED) ? " enabled," : "",
++	       pls, enable);
++  xhci_check_status(x);
++
++  if ((enable && (portsc & GRUB_XHCI_PORTSC_PED)) ||
++      (!enable && !(portsc & GRUB_XHCI_PORTSC_PED)))
++    return GRUB_USB_ERR_NONE;
++
++  if (!enable)
++    {
++      /* Disable port */
++      grub_xhci_port_write(x, port, ~0, GRUB_XHCI_PORTSC_PED);
++      return GRUB_USB_ERR_NONE;
++    }
++
++  grub_dprintf ("xhci", "portstatus: XHCI STATUS: %08x\n",
++		grub_xhci_read32(&x->op->usbsts));
++  grub_dprintf ("xhci",
++		"portstatus: begin, iobase=%p, port=%d, status=0x%08x\n",
++		x->caps, port, portsc);
++
++  switch (pls)
++    {
++      case PLS_U0:
++	/* A USB3 port - controller automatically performs reset */
++	break;
++      case PLS_POLLING:
++	/* A USB2 port - perform device reset */
++	grub_xhci_port_write(x, port, ~GRUB_XHCI_PORTSC_PED, GRUB_XHCI_PORTSC_PR);
++	break;
++      default:
++        return GRUB_USB_ERR_NONE;
++    }
++
++  /* Wait for device to complete reset and be enabled */
++  end = grub_get_time_ms () + 100;
++  for (;;)
++    {
++      portsc = grub_xhci_port_read(x, port);
++      if (!(portsc & GRUB_XHCI_PORTSC_CCS))
++	{
++	  /* Device disconnected during reset */
++	  grub_dprintf ("xhci","ERROR: %s device disconnected\n", __func__);
++	  return GRUB_USB_ERR_BADDEVICE;
++	}
++      if (portsc & GRUB_XHCI_PORTSC_PED)
++	  /* Reset complete */
++	  break;
++      if (grub_get_time_ms () > end)
++	{
++	  grub_dprintf ("xhci","ERROR: %s TIMEOUT\n", __func__);
++	  return GRUB_USB_ERR_TIMEOUT;
++	}
++    }
++  xhci_check_status(x);
++
++  return GRUB_USB_ERR_NONE;
++}
++
++/****************************************************************
++ * xHCI detect device functions
++ ****************************************************************/
++
++static grub_usb_speed_t
++grub_xhci_detect_dev (grub_usb_controller_t dev, int port, int *changed)
++{
++  struct grub_xhci *x = (struct grub_xhci *) dev->data;
++  grub_uint32_t portsc, speed;
++
++  *changed = 0;
++  grub_dprintf("xhci", "%s: dev=%p USB%d_%d port %d\n", __func__, dev,
++	       x->psids[port-1].major, x->psids[port-1].minor, port);
++
++  /* On shutdown advertise all ports as disconnected. This will trigger
++   * a gracefull detatch. */
++  if (x->shutdown)
++    {
++      *changed = 1;
++      return GRUB_USB_SPEED_NONE;
++    }
++
++  /* Don't advertise new devices, connecting will fail if halted */
++  if (xhci_is_halted(x))
++    return GRUB_USB_SPEED_NONE;
++
++  portsc = grub_xhci_port_read(x, port);
++  speed = xhci_get_field(portsc, XHCI_PORTSC_SPEED);
++  grub_uint8_t pls = xhci_get_field(portsc, XHCI_PORTSC_PLS);
++
++  grub_dprintf("xhci", "grub_xhci_portstatus port #%d: 0x%08x,%s%s pls %d\n",
++	       port, portsc,
++	       (portsc & GRUB_XHCI_PORTSC_PP)  ? " powered," : "",
++	       (portsc & GRUB_XHCI_PORTSC_PED) ? " enabled," : "",
++	       pls);
++
++  /* Connect Status Change bit - it detects change of connection */
++  if (portsc & GRUB_XHCI_PORTSC_CSC)
++    {
++      *changed = 1;
++
++      grub_xhci_port_write(x, port, ~GRUB_XHCI_PORTSC_PED, GRUB_XHCI_PORTSC_CSC);
++    }
++
++  if (!(portsc & GRUB_XHCI_PORTSC_CCS))
++    return GRUB_USB_SPEED_NONE;
++
++  for (grub_uint8_t i = 0; i < 16 && x->psids[port-1].psids[i].id > 0; i++)
++    {
++      if (x->psids[port-1].psids[i].id == speed)
++        {
++	  grub_dprintf("xhci", "%s: grub_usb_speed = %d\n", __func__,
++		       x->psids[port-1].psids[i].grub_usb_speed );
++	  return x->psids[port-1].psids[i].grub_usb_speed;
++	}
++    }
++
++  return GRUB_USB_SPEED_NONE;
++}
++
++/****************************************************************
++ * xHCI attach/detach functions
++ ****************************************************************/
++
++static grub_usb_err_t
++grub_xhci_attach_dev (grub_usb_controller_t ctrl, grub_usb_device_t dev)
++{
++  struct grub_xhci *x = (struct grub_xhci *) ctrl->data;
++  grub_usb_err_t err;
++  grub_uint32_t max;
++
++  grub_dprintf("xhci", "%s: dev=%p\n", __func__, dev);
++
++  if (!dev || !x)
++    return GRUB_USB_ERR_INTERNAL;
++
++  dev->xhci_priv = grub_zalloc (sizeof (struct grub_xhci_priv));
++  if (!dev->xhci_priv)
++    return GRUB_USB_ERR_INTERNAL;
++
++
++  switch (dev->speed)
++    {
++      case GRUB_USB_SPEED_LOW:
++	{
++	  max = 8;
++	  break;
++	}
++      case GRUB_USB_SPEED_FULL:
++      case GRUB_USB_SPEED_HIGH:
++	{
++	  max = 64;
++	  break;
++	}
++      case GRUB_USB_SPEED_SUPER:
++	{
++	  max = 512;
++	  break;
++	}
++      default:
++      case GRUB_USB_SPEED_NONE:
++	{
++	  max = 0;
++	}
++    }
++
++  /* Assign a slot, assign an address and configure endpoint 0 */
++  err = grub_xhci_prepare_endpoint(x, dev,
++				  0,
++				  0,
++				  GRUB_USB_TRANSACTION_TYPE_CONTROL,
++				  max,
++				  dev->xhci_priv);
++
++  return err;
++}
++
++static grub_usb_err_t
++grub_xhci_detach_dev (grub_usb_controller_t ctrl, grub_usb_device_t dev)
++{
++  struct grub_xhci *x = (struct grub_xhci *) ctrl->data;
++  struct grub_xhci_priv *priv;
++  int cc = CC_SUCCESS;
++
++  grub_dprintf("xhci", "%s: dev=%p\n", __func__, dev);
++
++  if (!dev)
++    return GRUB_USB_ERR_INTERNAL;
++
++  if (dev->xhci_priv)
++    {
++      priv = dev->xhci_priv;
++      /* Stop endpoints and free ring buffer */
++      for (int i = 0; i < GRUB_XHCI_MAX_ENDPOINTS; i++)
++	{
++	  if (priv->enpoint_trbs[i] != NULL)
++	    {
++	      cc = xhci_cmd_stop_endpoint(x, priv->slotid, i, 1);
++	      if (cc != CC_SUCCESS)
++		grub_dprintf("xhci", "Failed to disable EP%d on slot %d\n", i,
++			     priv->slotid);
++
++	      grub_dprintf("xhci", "grub_dma_free[%d]\n", i);
++
++	      grub_dma_free(priv->enpoint_trbs_dma[i]);
++	      priv->enpoint_trbs[i] = NULL;
++	      priv->enpoint_trbs_dma[i] = NULL;
++	    }
++	}
++
++      cc = xhci_cmd_disable_slot(x, priv->slotid);
++      if (cc == CC_SUCCESS)
++	{
++	  if (priv->slotctx_dma)
++	    grub_dma_free(priv->slotctx_dma);
++	  x->devs[priv->slotid].ptr_low = 0;
++	  x->devs[priv->slotid].ptr_high = 0;
++	  grub_arch_sync_dma_caches(&x->devs[priv->slotid], sizeof(x->devs[0]));
++	}
++	else
++	  grub_dprintf("xhci", "Failed to disable slot %d\n", priv->slotid);
++
++      grub_free(dev->xhci_priv);
++    }
++
++  dev->xhci_priv = NULL;
++
++  if (cc != CC_SUCCESS)
++    return GRUB_USB_ERR_BADDEVICE;
++  return GRUB_USB_ERR_NONE;
++}
++
++/****************************************************************
++ * xHCI terminate functions
++ ****************************************************************/
++
++static void
++grub_xhci_halt(struct grub_xhci *x)
++{
++  grub_uint32_t reg;
++
++  /* Halt the command ring */
++  reg = grub_xhci_read32(&x->op->crcr_low);
++  grub_xhci_write32(&x->op->crcr_low, reg | 4);
++
++  int rc = xhci_event_wait(x, x->cmds, 100);
++  grub_dprintf("xhci", "%s: xhci_event_wait = %d\n", __func__, rc);
++  if (rc < 0)
++    return;
++
++  /* Stop the controller */
++  reg = grub_xhci_read32(&x->op->usbcmd);
++  if (reg & GRUB_XHCI_CMD_RS)
++    {
++      reg &= ~GRUB_XHCI_CMD_RS;
++      grub_xhci_write32(&x->op->usbcmd, reg);
++    }
++
++  return;
++}
++
++static grub_err_t
++grub_xhci_fini_hw (int noreturn __attribute__ ((unused)))
++{
++  struct grub_xhci *x;
++
++  /* We should disable all XHCI HW to prevent any DMA access etc. */
++  for (x = xhci; x; x = x->next)
++    {
++      x->shutdown = 1;
++
++      /* Gracefully detach active devices */
++      grub_usb_poll_devices(0);
++
++      /* Check if xHCI is halted and halt it if not */
++      grub_xhci_halt (x);
++
++      /* Reset xHCI */
++      if (grub_xhci_reset (x) != GRUB_USB_ERR_NONE)
++	return GRUB_ERR_BAD_DEVICE;
++    }
++
++  return GRUB_ERR_NONE;
++}
++
++static struct grub_usb_controller_dev usb_controller = {
++  .name = "xhci",
++  .iterate = grub_xhci_iterate,
++  .setup_transfer = grub_xhci_setup_transfer,
++  .check_transfer = grub_xhci_check_transfer,
++  .cancel_transfer = grub_xhci_cancel_transfer,
++  .hubports = grub_xhci_hubports,
++  .portstatus = grub_xhci_portstatus,
++  .detect_dev = grub_xhci_detect_dev,
++  .attach_dev = grub_xhci_attach_dev,
++  .detach_dev = grub_xhci_detach_dev,
++  /* estimated max. count of TDs for one bulk transfer */
++  .max_bulk_tds = GRUB_XHCI_RING_ITEMS - 3
++};
++
++GRUB_MOD_INIT (xhci)
++{
++  grub_stop_disk_firmware ();
++
++  grub_boot_time ("Initing XHCI hardware");
++  grub_xhci_pci_scan ();
++  grub_boot_time ("Registering XHCI driver");
++  grub_usb_controller_dev_register (&usb_controller);
++  grub_boot_time ("XHCI driver registered");
++}
++
++GRUB_MOD_FINI (xhci)
++{
++  grub_xhci_fini_hw (0);
++  grub_usb_controller_dev_unregister (&usb_controller);
++}
+diff --git a/include/grub/usb.h b/include/grub/usb.h
+index 609faf7d0..eb71fa1c7 100644
+--- a/include/grub/usb.h
++++ b/include/grub/usb.h
+@@ -338,6 +338,10 @@ grub_usb_cancel_transfer (grub_usb_transfer_t trans);
+ void
+ grub_ehci_init_device (volatile void *regs);
+ void
++grub_xhci_init_device (volatile void *regs);
++void
+ grub_ehci_pci_scan (void);
++void
++grub_xhci_pci_scan (void);
+ 
+ #endif /* GRUB_USB_H */
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch b/config/grub/xhci/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
new file mode 100644
index 00000000..a37bbd6b
--- /dev/null
+++ b/config/grub/xhci/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
@@ -0,0 +1,127 @@
+From 2a2c64f6ea62337c1263a70f6ca9a9bade66b78b Mon Sep 17 00:00:00 2001
+From: Patrick Rudolph <patrick.rudolph@9elements.com>
+Date: Thu, 3 Dec 2020 13:44:55 +0100
+Subject: [PATCH 7/8] grub-core/bus/usb/usbhub: Add xHCI non root hub support
+
+Tested on Intel PCH C246, the USB3 hub can be configured by grub.
+
+Issues:
+* USB3 devices connected behind that hub are sometimes not detected.
+
+Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
+---
+ grub-core/bus/usb/usbhub.c | 38 +++++++++++++++++++++++++++++++++-----
+ include/grub/usbdesc.h     |  1 +
+ include/grub/usbtrans.h    |  4 ++++
+ 3 files changed, 38 insertions(+), 5 deletions(-)
+
+diff --git a/grub-core/bus/usb/usbhub.c b/grub-core/bus/usb/usbhub.c
+index b4b3a1a61..e96505aa9 100644
+--- a/grub-core/bus/usb/usbhub.c
++++ b/grub-core/bus/usb/usbhub.c
+@@ -148,19 +148,32 @@ grub_usb_hub_add_dev (grub_usb_controller_t controller,
+   return dev;
+ }
+ 
+-
++static grub_usb_err_t
++grub_usb_set_hub_depth(grub_usb_device_t dev, grub_uint8_t depth)
++{
++  return grub_usb_control_msg (dev, (GRUB_USB_REQTYPE_OUT
++			            | GRUB_USB_REQTYPE_CLASS
++			            | GRUB_USB_REQTYPE_TARGET_DEV),
++			      GRUB_USB_HUB_REQ_SET_HUB_DEPTH, depth,
++			      0, 0, NULL);
++}
++
+ static grub_usb_err_t
+ grub_usb_add_hub (grub_usb_device_t dev)
+ {
+   struct grub_usb_usb_hubdesc hubdesc;
+   grub_usb_err_t err;
++  grub_uint16_t req;
+   int i;
+ 
++  req = (dev->speed == GRUB_USB_SPEED_SUPER) ? GRUB_USB_DESCRIPTOR_SS_HUB :
++    GRUB_USB_DESCRIPTOR_HUB;
++
+   err = grub_usb_control_msg (dev, (GRUB_USB_REQTYPE_IN
+ 	  		            | GRUB_USB_REQTYPE_CLASS
+ 			            | GRUB_USB_REQTYPE_TARGET_DEV),
+-                              GRUB_USB_REQ_GET_DESCRIPTOR,
+-			      (GRUB_USB_DESCRIPTOR_HUB << 8) | 0,
++			      GRUB_USB_REQ_GET_DESCRIPTOR,
++			      (req << 8) | 0,
+ 			      0, sizeof (hubdesc), (char *) &hubdesc);
+   if (err)
+     return err;
+@@ -183,6 +196,19 @@ grub_usb_add_hub (grub_usb_device_t dev)
+       return GRUB_USB_ERR_INTERNAL;
+     }
+ 
++  if (dev->speed == GRUB_USB_SPEED_SUPER)
++    {
++      grub_uint8_t depth;
++      grub_uint32_t route;
++      /* Depth maximum value is 5, but root hubs doesn't count */
++      for (depth = 0, route = dev->route; (route & 0xf) > 0; route >>= 4)
++	depth++;
++
++      err = grub_usb_set_hub_depth(dev, depth);
++      if (err)
++        return err;
++    }
++
+   /* Power on all Hub ports.  */
+   for (i = 1; i <= hubdesc.portcnt; i++)
+     {
+@@ -637,7 +663,9 @@ poll_nonroot_hub (grub_usb_device_t dev)
+ 	      int split_hubaddr = 0;
+ 
+ 	      /* Determine the device speed.  */
+-	      if (status & GRUB_USB_HUB_STATUS_PORT_LOWSPEED)
++	      if (dev->speed == GRUB_USB_SPEED_SUPER)
++	        speed = GRUB_USB_SPEED_SUPER;
++	      else if (status & GRUB_USB_HUB_STATUS_PORT_LOWSPEED)
+ 		speed = GRUB_USB_SPEED_LOW;
+ 	      else
+ 		{
+@@ -651,7 +679,7 @@ poll_nonroot_hub (grub_usb_device_t dev)
+ 	      grub_millisleep (10);
+ 
+               /* Find correct values for SPLIT hubport and hubaddr */
+-	      if (speed == GRUB_USB_SPEED_HIGH)
++	      if (speed == GRUB_USB_SPEED_HIGH || speed == GRUB_USB_SPEED_SUPER)
+ 	        {
+ 		  /* HIGH speed device needs not transaction translation */
+ 		  split_hubport = 0;
+diff --git a/include/grub/usbdesc.h b/include/grub/usbdesc.h
+index bb2ab2e27..1697aa465 100644
+--- a/include/grub/usbdesc.h
++++ b/include/grub/usbdesc.h
+@@ -30,6 +30,7 @@ typedef enum {
+   GRUB_USB_DESCRIPTOR_ENDPOINT,
+   GRUB_USB_DESCRIPTOR_DEBUG = 10,
+   GRUB_USB_DESCRIPTOR_HUB = 0x29,
++  GRUB_USB_DESCRIPTOR_SS_HUB = 0x2a,
+   GRUB_USB_DESCRIPTOR_SS_ENDPOINT_COMPANION = 0x30
+ } grub_usb_descriptor_t;
+ 
+diff --git a/include/grub/usbtrans.h b/include/grub/usbtrans.h
+index 039ebed65..d6c3f71dc 100644
+--- a/include/grub/usbtrans.h
++++ b/include/grub/usbtrans.h
+@@ -110,6 +110,10 @@ enum
+     GRUB_USB_REQ_SET_INTERFACE = 0x0B,
+     GRUB_USB_REQ_SYNC_FRAME = 0x0C
+   };
++enum
++  {
++    GRUB_USB_HUB_REQ_SET_HUB_DEPTH = 0x0C,
++  };
+ 
+ #define GRUB_USB_FEATURE_ENDP_HALT	0x00
+ #define GRUB_USB_FEATURE_DEV_REMOTE_WU	0x01
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch b/config/grub/xhci/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch
new file mode 100644
index 00000000..af79c3d0
--- /dev/null
+++ b/config/grub/xhci/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch
@@ -0,0 +1,90 @@
+From 871d768f8c5c960cb0d9761a9028b16882e1a7d3 Mon Sep 17 00:00:00 2001
+From: Patrick Rudolph <patrick.rudolph@9elements.com>
+Date: Wed, 24 Feb 2021 08:25:41 +0100
+Subject: [PATCH 8/8] Fix compilation on x86_64
+
+Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
+---
+ grub-core/bus/usb/xhci.c | 24 ++++++++++++++++--------
+ 1 file changed, 16 insertions(+), 8 deletions(-)
+
+diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c
+index f4591ffb5..3495bb919 100644
+--- a/grub-core/bus/usb/xhci.c
++++ b/grub-core/bus/usb/xhci.c
+@@ -184,7 +184,7 @@ enum
+  *  then we can get it from a trb pointer (provided by evt ring).
+  */
+ #define XHCI_RING(_trb)	  \
+-    ((struct grub_xhci_ring*)((grub_uint32_t)(_trb) & ~(GRUB_XHCI_RING_SIZE-1)))
++    ((struct grub_xhci_ring*)((grub_addr_t)(_trb) & ~(GRUB_XHCI_RING_SIZE-1)))
+ 
+ /* slot context */
+ struct grub_xhci_slotctx {
+@@ -495,6 +495,14 @@ grub_xhci_read8(volatile void *addr) {
+   return (*((volatile grub_uint32_t *)addr));
+ }
+ 
++static inline void *
++grub_xhci_read_etrb_ptr(volatile struct grub_xhci_trb *trb) {
++  grub_uint64_t tmp;
++  tmp = (grub_uint64_t)grub_xhci_read32(&trb->ptr_low);
++  tmp |= ((grub_uint64_t)grub_xhci_read32(&trb->ptr_high)) << 32;
++  return (void *)(grub_addr_t)tmp;
++}
++
+ static inline grub_uint32_t
+ grub_xhci_port_read (struct grub_xhci *x, grub_uint32_t port)
+ {
+@@ -664,7 +672,7 @@ static void xhci_process_events(struct grub_xhci *x)
+ 	    case ER_TRANSFER:
+ 	    case ER_COMMAND_COMPLETE:
+ 	      {
+-		struct grub_xhci_trb  *rtrb = (void*)grub_xhci_read32(&etrb->ptr_low);
++		struct grub_xhci_trb  *rtrb = grub_xhci_read_etrb_ptr(etrb);
+ 		struct grub_xhci_ring *ring = XHCI_RING(rtrb);
+ 		volatile struct grub_xhci_trb  *evt = &ring->evt;
+ 		grub_uint32_t eidx = rtrb - ring->ring + 1;
+@@ -697,9 +705,9 @@ static void xhci_process_events(struct grub_xhci *x)
+ 	  }
+ 	grub_xhci_write32(&evts->nidx, nidx);
+ 	volatile struct grub_xhci_ir *ir = x->ir;
+-	grub_uint32_t erdp = (grub_uint32_t)(evts->ring + nidx);
+-	grub_xhci_write32(&ir->erdp_low, erdp);
+-	grub_xhci_write32(&ir->erdp_high, 0);
++	grub_uint64_t erdp = (grub_addr_t)(void *)(&evts->ring[nidx]);
++	grub_xhci_write32(&ir->erdp_low, erdp & 0xffffffff);
++	grub_xhci_write32(&ir->erdp_high, erdp >> 32);
+     }
+ }
+ 
+@@ -800,7 +808,7 @@ static void xhci_trb_queue(volatile struct grub_xhci_ring *ring,
+ 			   grub_uint32_t xferlen, grub_uint32_t flags)
+ {
+   grub_dprintf("xhci", "%s: ring %p data %llx len %d flags 0x%x remain 0x%x\n", __func__,
+-      ring, data_or_addr, xferlen & 0x1ffff, flags, xferlen >> 17);
++      ring, (unsigned long long)data_or_addr, xferlen & 0x1ffff, flags, xferlen >> 17);
+ 
+   if (xhci_ring_full(ring))
+     {
+@@ -1907,7 +1915,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev,
+   if (transfer->type == GRUB_USB_TRANSACTION_TYPE_CONTROL)
+   {
+     volatile struct grub_usb_packet_setup *setupdata;
+-    setupdata = (void *)transfer->transactions[0].data;
++    setupdata = (void *)(grub_addr_t)transfer->transactions[0].data;
+     grub_dprintf("xhci", "%s: CONTROLL TRANS req %d\n", __func__, setupdata->request);
+     grub_dprintf("xhci", "%s: CONTROLL TRANS length %d\n", __func__, setupdata->length);
+ 
+@@ -1974,7 +1982,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev,
+ 	/* Assume the ring has enough free space for all TRBs */
+ 	if (flags & TRB_TR_IDT && tr->size <= (int)sizeof(inline_data))
+ 	  {
+-	    grub_memcpy(&inline_data, (void *)tr->data, tr->size);
++	    grub_memcpy(&inline_data, (void *)(grub_addr_t)tr->data, tr->size);
+ 	    xhci_trb_queue(reqs, inline_data, tr->size, flags);
+ 	  }
+ 	else
+-- 
+2.39.2
+
diff --git a/config/grub/xhci/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/xhci/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
new file mode 100644
index 00000000..b00611a0
--- /dev/null
+++ b/config/grub/xhci/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
@@ -0,0 +1,1074 @@
+From ef9d61ae9ed490301adf9ee064a9fc1190069d81 Mon Sep 17 00:00:00 2001
+From: Mate Kukri <km@mkukri.xyz>
+Date: Mon, 20 May 2024 11:43:35 +0100
+Subject: Add native NVMe driver based on SeaBIOS
+
+Tested to successfully boot Debian on QEMU and OptiPlex 3050.
+
+Signed-off-by: Mate Kukri <km@mkukri.xyz>
+---
+ Makefile.am                     |   2 +-
+ grub-core/Makefile.core.def     |   6 +
+ grub-core/commands/nativedisk.c |   1 +
+ grub-core/disk/nvme-int.h       | 208 +++++++++
+ grub-core/disk/nvme.c           | 781 ++++++++++++++++++++++++++++++++
+ include/grub/disk.h             |   1 +
+ 6 files changed, 998 insertions(+), 1 deletion(-)
+ create mode 100644 grub-core/disk/nvme-int.h
+ create mode 100644 grub-core/disk/nvme.c
+
+diff --git a/Makefile.am b/Makefile.am
+index 65016f856..7bc0866ba 100644
+--- a/Makefile.am
++++ b/Makefile.am
+@@ -434,7 +434,7 @@ if COND_i386_coreboot
+ FS_PAYLOAD_MODULES ?= $(shell cat grub-core/fs.lst)
+ default_payload.elf: grub-mkstandalone grub-mkimage FORCE
+ 	test -f $@ && rm $@ || true
+-	pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata xhci ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
++	pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata nvme xhci ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
+ endif
+ 
+ endif
+diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
+index ea782666d..0f893369a 100644
+--- a/grub-core/Makefile.core.def
++++ b/grub-core/Makefile.core.def
+@@ -2602,3 +2602,9 @@ module = {
+   efi = commands/bli.c;
+   enable = efi;
+ };
++
++module = {
++  name = nvme;
++  common = disk/nvme.c;
++  enable = pci;
++};
+diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c
+index 580c8d3b0..a2c766fbd 100644
+--- a/grub-core/commands/nativedisk.c
++++ b/grub-core/commands/nativedisk.c
+@@ -78,6 +78,7 @@ get_uuid (const char *name, char **uuid, int getnative)
+     case GRUB_DISK_DEVICE_ATA_ID:
+     case GRUB_DISK_DEVICE_SCSI_ID:
+     case GRUB_DISK_DEVICE_XEN:
++    case GRUB_DISK_DEVICE_NVME_ID:
+       if (getnative)
+ 	break;
+       /* FALLTHROUGH */
+diff --git a/grub-core/disk/nvme-int.h b/grub-core/disk/nvme-int.h
+new file mode 100644
+index 000000000..1295b58aa
+--- /dev/null
++++ b/grub-core/disk/nvme-int.h
+@@ -0,0 +1,208 @@
++// NVMe datastructures and constants
++//
++// Copyright 2017 Amazon.com, Inc. or its affiliates.
++//
++// This file may be distributed under the terms of the GNU LGPLv3 license.
++
++#ifndef __NVME_INT_H
++#define __NVME_INT_H
++
++#include <grub/types.h>
++
++/* Data structures */
++
++/* The register file of a NVMe host controller. This struct follows the naming
++   scheme in the NVMe specification. */
++struct nvme_reg {
++    grub_uint64_t cap;                    /* controller capabilities */
++    grub_uint32_t vs;                     /* version */
++    grub_uint32_t intms;                  /* interrupt mask set */
++    grub_uint32_t intmc;                  /* interrupt mask clear */
++    grub_uint32_t cc;                     /* controller configuration */
++    grub_uint32_t _res0;
++    grub_uint32_t csts;                   /* controller status */
++    grub_uint32_t _res1;
++    grub_uint32_t aqa;                    /* admin queue attributes */
++    grub_uint64_t asq;                    /* admin submission queue base address */
++    grub_uint64_t acq;                    /* admin completion queue base address */
++};
++
++/* Submission queue entry */
++struct nvme_sqe {
++    union {
++        grub_uint32_t dword[16];
++        struct {
++            grub_uint32_t cdw0;           /* Command DWORD 0 */
++            grub_uint32_t nsid;           /* Namespace ID */
++            grub_uint64_t _res0;
++            grub_uint64_t mptr;           /* metadata ptr */
++
++            grub_uint64_t dptr_prp1;
++            grub_uint64_t dptr_prp2;
++        };
++    };
++};
++
++/* Completion queue entry */
++struct nvme_cqe {
++    union {
++        grub_uint32_t dword[4];
++        struct {
++            grub_uint32_t cdw0;
++            grub_uint32_t _res0;
++            grub_uint16_t sq_head;
++            grub_uint16_t sq_id;
++            grub_uint16_t cid;
++            grub_uint16_t status;
++        };
++    };
++};
++
++/* The common part of every submission or completion queue. */
++struct nvme_queue {
++    grub_uint32_t *dbl;                   /* doorbell */
++    grub_uint16_t mask;                   /* length - 1 */
++};
++
++struct nvme_cq {
++    struct nvme_queue common;
++    struct nvme_cqe *cqe;
++
++    /* We have read upto (but not including) this entry in the queue. */
++    grub_uint16_t head;
++
++    /* The current phase bit the controller uses to indicate that it has written
++       a new entry. This is inverted after each wrap. */
++    unsigned phase : 1;
++};
++
++struct nvme_sq {
++    struct nvme_queue common;
++    struct nvme_sqe *sqe;
++
++    /* Corresponding completion queue. We only support a single SQ per CQ. */
++    struct nvme_cq *cq;
++
++    /* The last entry the controller has fetched. */
++    grub_uint16_t head;
++
++    /* The last value we have written to the tail doorbell. */
++    grub_uint16_t tail;
++};
++
++struct nvme_ctrl {
++    grub_pci_device_t pci;
++    struct nvme_reg volatile *reg;
++
++    grub_uint32_t ctrlnum;
++
++    grub_uint32_t doorbell_stride;        /* in bytes */
++
++    struct nvme_sq admin_sq;
++    struct nvme_cq admin_cq;
++
++    grub_uint32_t ns_count;
++
++    struct nvme_sq io_sq;
++    struct nvme_cq io_cq;
++};
++
++struct nvme_namespace {
++    struct nvme_namespace *next;
++    struct nvme_namespace **prev;
++
++    char *devname;
++
++    grub_uint32_t nsnum;
++
++    struct nvme_ctrl *ctrl;
++
++    grub_uint32_t ns_id;
++
++    grub_uint64_t lba_count;              /* The total amount of sectors. */
++
++    grub_uint32_t block_size;
++    grub_uint32_t metadata_size;
++    grub_uint32_t max_req_size;
++};
++
++/* Data structures for NVMe admin identify commands */
++
++struct nvme_identify_ctrl {
++    grub_uint16_t vid;
++    grub_uint16_t ssvid;
++    char sn[20];
++    char mn[40];
++    char fr[8];
++
++    grub_uint8_t rab;
++    grub_uint8_t ieee[3];
++    grub_uint8_t cmic;
++    grub_uint8_t mdts;
++
++    char _boring[516 - 78];
++
++    grub_uint32_t nn;                     /* number of namespaces */
++};
++
++struct nvme_identify_ns_list {
++    grub_uint32_t ns_id[1024];
++};
++
++struct nvme_lba_format {
++    grub_uint16_t ms;
++    grub_uint8_t  lbads;
++    grub_uint8_t  rp;
++};
++
++struct nvme_identify_ns {
++    grub_uint64_t nsze;
++    grub_uint64_t ncap;
++    grub_uint64_t nuse;
++    grub_uint8_t  nsfeat;
++    grub_uint8_t  nlbaf;
++    grub_uint8_t  flbas;
++
++    char _boring[128 - 27];
++
++    struct nvme_lba_format lbaf[16];
++};
++
++union nvme_identify {
++    struct nvme_identify_ns      ns;
++    struct nvme_identify_ctrl    ctrl;
++    struct nvme_identify_ns_list ns_list;
++};
++
++/* NVMe constants */
++
++#define NVME_CAP_CSS_NVME (1ULL << 37)
++
++#define NVME_CSTS_FATAL   (1U <<  1)
++#define NVME_CSTS_RDY     (1U <<  0)
++
++#define NVME_CC_EN        (1U <<  0)
++
++#define NVME_SQE_OPC_ADMIN_CREATE_IO_SQ 1U
++#define NVME_SQE_OPC_ADMIN_CREATE_IO_CQ 5U
++#define NVME_SQE_OPC_ADMIN_IDENTIFY     6U
++
++#define NVME_SQE_OPC_IO_WRITE 1U
++#define NVME_SQE_OPC_IO_READ  2U
++
++#define NVME_ADMIN_IDENTIFY_CNS_ID_NS       0U
++#define NVME_ADMIN_IDENTIFY_CNS_ID_CTRL     1U
++#define NVME_ADMIN_IDENTIFY_CNS_GET_NS_LIST 2U
++
++#define NVME_CQE_DW3_P (1U << 16)
++
++#define NVME_PAGE_SIZE 4096
++#define NVME_PAGE_MASK ~(NVME_PAGE_SIZE - 1)
++
++/* Length for the queue entries. */
++#define NVME_SQE_SIZE_LOG 6
++#define NVME_CQE_SIZE_LOG 4
++
++#endif
++
++/* EOF */
+diff --git a/grub-core/disk/nvme.c b/grub-core/disk/nvme.c
+new file mode 100644
+index 000000000..093237c70
+--- /dev/null
++++ b/grub-core/disk/nvme.c
+@@ -0,0 +1,781 @@
++// Low level NVMe disk access
++//
++// Based on SeaBIOS NVMe driver - Copyright 2017 Amazon.com, Inc. or its affiliates.
++// Port to GRUB2 done by Mate Kukri
++//
++// This file may be distributed under the terms of the GNU LGPLv3 license.
++
++#include <grub/disk.h>
++#include <grub/dl.h>
++#include <grub/pci.h>
++#include "nvme-int.h"
++
++GRUB_MOD_LICENSE ("GPLv3"); /* LGPLv3 in reality but it is GPLv3 compatible */
++
++static grub_uint32_t grub_nvme_ctrlcnt;
++static grub_uint32_t grub_nvme_nscnt;
++
++static struct nvme_namespace *grub_nvme_namespaces;
++
++// Page aligned "dma bounce buffer" of size NVME_PAGE_SIZE
++static void *nvme_dma_buffer;
++
++static void *
++zalloc_page_aligned(grub_uint32_t size)
++{
++    void *res = grub_memalign(NVME_PAGE_SIZE, size);
++    if (res) grub_memset(res, 0, size);
++    return res;
++}
++
++static void
++nvme_init_queue_common(struct nvme_ctrl *ctrl, struct nvme_queue *q, grub_uint16_t q_idx,
++                       grub_uint16_t length)
++{
++    grub_memset(q, 0, sizeof(*q));
++    q->dbl = (grub_uint32_t *)((char *)ctrl->reg + 0x1000 + q_idx * ctrl->doorbell_stride);
++    grub_dprintf("nvme", " q %p q_idx %u dbl %p\n", q, q_idx, q->dbl);
++    q->mask = length - 1;
++}
++
++static int
++nvme_init_sq(struct nvme_ctrl *ctrl, struct nvme_sq *sq, grub_uint16_t q_idx, grub_uint16_t length,
++             struct nvme_cq *cq)
++{
++    nvme_init_queue_common(ctrl, &sq->common, q_idx, length);
++    sq->sqe = zalloc_page_aligned(sizeof(*sq->sqe) * length);
++
++    if (!sq->sqe) {
++        return -1;
++    }
++
++    grub_dprintf("nvme", "sq %p q_idx %u sqe %p\n", sq, q_idx, sq->sqe);
++    sq->cq   = cq;
++    sq->head = 0;
++    sq->tail = 0;
++
++    return 0;
++}
++
++static int
++nvme_init_cq(struct nvme_ctrl *ctrl, struct nvme_cq *cq, grub_uint16_t q_idx, grub_uint16_t length)
++{
++    nvme_init_queue_common(ctrl, &cq->common, q_idx, length);
++    cq->cqe = zalloc_page_aligned(sizeof(*cq->cqe) * length);
++    if (!cq->cqe) {
++        return -1;
++    }
++
++    cq->head = 0;
++
++    /* All CQE phase bits are initialized to zero. This means initially we wait
++       for the host controller to set these to 1. */
++    cq->phase = 1;
++
++    return 0;
++}
++
++static int
++nvme_poll_cq(struct nvme_cq *cq)
++{
++    grub_uint32_t dw3 = *(volatile grub_uint32_t *) &cq->cqe[cq->head].dword[3];
++    return (!!(dw3 & NVME_CQE_DW3_P) == cq->phase);
++}
++
++static int
++nvme_is_cqe_success(struct nvme_cqe const *cqe)
++{
++    return ((cqe->status >> 1) & 0xFF) == 0;
++}
++
++static struct nvme_cqe
++nvme_error_cqe(void)
++{
++    struct nvme_cqe r;
++
++    /* 0xFF is a vendor specific status code != success. Should be okay for
++       indicating failure. */
++    grub_memset(&r, 0xFF, sizeof(r));
++    return r;
++}
++
++static struct nvme_cqe
++nvme_consume_cqe(struct nvme_sq *sq)
++{
++    struct nvme_cq *cq = sq->cq;
++
++    if (!nvme_poll_cq(cq)) {
++        /* Cannot consume a completion queue entry, if there is none ready. */
++        return nvme_error_cqe();
++    }
++
++    struct nvme_cqe *cqe = &cq->cqe[cq->head];
++    grub_uint16_t cq_next_head = (cq->head + 1) & cq->common.mask;
++    grub_dprintf("nvme", "cq %p head %u -> %u\n", cq, cq->head, cq_next_head);
++    if (cq_next_head < cq->head) {
++        grub_dprintf("nvme", "cq %p wrap\n", cq);
++        cq->phase = ~cq->phase;
++    }
++    cq->head = cq_next_head;
++
++    /* Update the submission queue head. */
++    if (cqe->sq_head != sq->head) {
++        sq->head = cqe->sq_head;
++        grub_dprintf("nvme", "sq %p advanced to %u\n", sq, cqe->sq_head);
++    }
++
++    /* Tell the controller that we consumed the completion. */
++    *(volatile grub_uint32_t *) cq->common.dbl = cq->head;
++
++    return *cqe;
++}
++
++static struct nvme_cqe
++nvme_wait(struct nvme_sq *sq)
++{
++    // static const unsigned nvme_timeout = 5000 /* ms */;
++    // grub_uint32_t to = timer_calc(nvme_timeout);
++    while (!nvme_poll_cq(sq->cq)) {
++        /* FIXME
++        yield();
++
++        if (timer_check(to)) {
++            warn_timeout();
++            return nvme_error_cqe();
++        }*/
++    }
++
++    return nvme_consume_cqe(sq);
++}
++
++/* Returns the next submission queue entry (or NULL if the queue is full). It
++   also fills out Command Dword 0 and clears the rest. */
++static struct nvme_sqe *
++nvme_get_next_sqe(struct nvme_sq *sq, grub_uint8_t opc, void *metadata, void *data, void *data2)
++{
++    if (((sq->head + 1) & sq->common.mask) == sq->tail) {
++        grub_dprintf("nvme", "submission queue is full\n");
++        return NULL;
++    }
++
++    struct nvme_sqe *sqe = &sq->sqe[sq->tail];
++    grub_dprintf("nvme", "sq %p next_sqe %u\n", sq, sq->tail);
++
++    grub_memset(sqe, 0, sizeof(*sqe));
++    sqe->cdw0 = opc | (sq->tail << 16 /* CID */);
++    sqe->mptr = (grub_uint32_t)metadata;
++    sqe->dptr_prp1 = (grub_uint32_t)data;
++    sqe->dptr_prp2 = (grub_uint32_t)data2;
++
++    return sqe;
++}
++
++/* Call this after you've filled out an sqe that you've got from nvme_get_next_sqe. */
++static void
++nvme_commit_sqe(struct nvme_sq *sq)
++{
++    grub_dprintf("nvme", "sq %p commit_sqe %u\n", sq, sq->tail);
++    sq->tail = (sq->tail + 1) & sq->common.mask;
++    *(volatile grub_uint32_t *) sq->common.dbl = sq->tail;
++}
++
++/* Perform an identify command on the admin queue and return the resulting
++   buffer. This may be a NULL pointer, if something failed. This function
++   cannot be used after initialization, because it uses buffers in tmp zone. */
++static union nvme_identify *
++nvme_admin_identify(struct nvme_ctrl *ctrl, grub_uint8_t cns, grub_uint32_t nsid)
++{
++    union nvme_identify *identify_buf = zalloc_page_aligned(4096);
++    if (!identify_buf)
++        return NULL;
++
++    struct nvme_sqe *cmd_identify;
++    cmd_identify = nvme_get_next_sqe(&ctrl->admin_sq,
++                                     NVME_SQE_OPC_ADMIN_IDENTIFY, NULL,
++                                     identify_buf, NULL);
++    if (!cmd_identify)
++        goto error;
++
++    cmd_identify->nsid = nsid;
++    cmd_identify->dword[10] = cns;
++
++    nvme_commit_sqe(&ctrl->admin_sq);
++
++    struct nvme_cqe cqe = nvme_wait(&ctrl->admin_sq);
++
++    if (!nvme_is_cqe_success(&cqe)) {
++        goto error;
++    }
++
++    return identify_buf;
++ error:
++    grub_free(identify_buf);
++    return NULL;
++}
++
++static struct nvme_identify_ctrl *
++nvme_admin_identify_ctrl(struct nvme_ctrl *ctrl)
++{
++    return &nvme_admin_identify(ctrl, NVME_ADMIN_IDENTIFY_CNS_ID_CTRL, 0)->ctrl;
++}
++
++static struct nvme_identify_ns *
++nvme_admin_identify_ns(struct nvme_ctrl *ctrl, grub_uint32_t ns_id)
++{
++    return &nvme_admin_identify(ctrl, NVME_ADMIN_IDENTIFY_CNS_ID_NS,
++                                ns_id)->ns;
++}
++
++static void
++nvme_probe_ns(struct nvme_ctrl *ctrl, grub_uint32_t ns_idx, grub_uint8_t mdts)
++{
++    grub_uint32_t ns_id = ns_idx + 1;
++
++    struct nvme_identify_ns *id = nvme_admin_identify_ns(ctrl, ns_id);
++    if (!id) {
++        grub_dprintf("nvme", "NVMe couldn't identify namespace %u.\n", ns_id);
++        goto free_buffer;
++    }
++
++    grub_uint8_t current_lba_format = id->flbas & 0xF;
++    if (current_lba_format > id->nlbaf) {
++        grub_dprintf("nvme", "NVMe NS %u: current LBA format %u is beyond what the "
++                " namespace supports (%u)?\n",
++                ns_id, current_lba_format, id->nlbaf + 1);
++        goto free_buffer;
++    }
++
++    if (!id->nsze) {
++        grub_dprintf("nvme", "NVMe NS %u is inactive.\n", ns_id);
++        goto free_buffer;
++    }
++
++    if (!nvme_dma_buffer) {
++        nvme_dma_buffer = zalloc_page_aligned(NVME_PAGE_SIZE);
++        if (!nvme_dma_buffer) {
++            goto free_buffer;
++        }
++    }
++
++    struct nvme_namespace *ns = grub_malloc(sizeof(*ns));
++    if (!ns) {
++        goto free_buffer;
++    }
++    grub_memset(ns, 0, sizeof(*ns));
++    ns->ctrl  = ctrl;
++    ns->ns_id = ns_id;
++    ns->lba_count = id->nsze;
++
++    struct nvme_lba_format *fmt = &id->lbaf[current_lba_format];
++
++    ns->block_size    = 1U << fmt->lbads;
++    ns->metadata_size = fmt->ms;
++
++    if (ns->block_size > NVME_PAGE_SIZE) {
++        /* If we see devices that trigger this path, we need to increase our
++           buffer size. */
++        grub_free(ns);
++        goto free_buffer;
++    }
++
++    if (mdts) {
++        ns->max_req_size = ((1U << mdts) * NVME_PAGE_SIZE) / ns->block_size;
++        grub_dprintf("nvme", "NVME NS %u max request size: %d sectors\n",
++                ns_id, ns->max_req_size);
++    } else {
++        ns->max_req_size = -1U;
++    }
++
++    ns->devname = grub_xasprintf("nvme%un%u", ctrl->ctrlnum, ns_id);
++    ns->nsnum = grub_nvme_nscnt++;
++
++    grub_list_push (GRUB_AS_LIST_P (&grub_nvme_namespaces), GRUB_AS_LIST (ns));
++
++free_buffer:
++    grub_free(id);
++}
++
++
++/* Release memory allocated for a completion queue */
++static void
++nvme_destroy_cq(struct nvme_cq *cq)
++{
++    grub_free(cq->cqe);
++    cq->cqe = NULL;
++}
++
++/* Release memory allocated for a submission queue */
++static void
++nvme_destroy_sq(struct nvme_sq *sq)
++{
++    grub_free(sq->sqe);
++    sq->sqe = NULL;
++}
++
++/* Returns 0 on success. */
++static int
++nvme_create_io_cq(struct nvme_ctrl *ctrl, struct nvme_cq *cq, grub_uint16_t q_idx)
++{
++    int rc;
++    struct nvme_sqe *cmd_create_cq;
++    grub_uint32_t length = 1 + (ctrl->reg->cap & 0xffff);
++    if (length > NVME_PAGE_SIZE / sizeof(struct nvme_cqe))
++        length = NVME_PAGE_SIZE / sizeof(struct nvme_cqe);
++
++    rc = nvme_init_cq(ctrl, cq, q_idx, length);
++    if (rc) {
++        goto err;
++    }
++
++    cmd_create_cq = nvme_get_next_sqe(&ctrl->admin_sq,
++                                      NVME_SQE_OPC_ADMIN_CREATE_IO_CQ, NULL,
++                                      cq->cqe, NULL);
++    if (!cmd_create_cq) {
++        goto err_destroy_cq;
++    }
++
++    cmd_create_cq->dword[10] = (cq->common.mask << 16) | (q_idx >> 1);
++    cmd_create_cq->dword[11] = 1 /* physically contiguous */;
++
++    nvme_commit_sqe(&ctrl->admin_sq);
++
++    struct nvme_cqe cqe = nvme_wait(&ctrl->admin_sq);
++
++    if (!nvme_is_cqe_success(&cqe)) {
++        grub_dprintf("nvme", "create io cq failed: %08x %08x %08x %08x\n",
++                cqe.dword[0], cqe.dword[1], cqe.dword[2], cqe.dword[3]);
++
++        goto err_destroy_cq;
++    }
++
++    return 0;
++
++err_destroy_cq:
++    nvme_destroy_cq(cq);
++err:
++    return -1;
++}
++
++/* Returns 0 on success. */
++static int
++nvme_create_io_sq(struct nvme_ctrl *ctrl, struct nvme_sq *sq, grub_uint16_t q_idx, struct nvme_cq *cq)
++{
++    int rc;
++    struct nvme_sqe *cmd_create_sq;
++    grub_uint32_t length = 1 + (ctrl->reg->cap & 0xffff);
++    if (length > NVME_PAGE_SIZE / sizeof(struct nvme_cqe))
++        length = NVME_PAGE_SIZE / sizeof(struct nvme_cqe);
++
++    rc = nvme_init_sq(ctrl, sq, q_idx, length, cq);
++    if (rc) {
++        goto err;
++    }
++
++    cmd_create_sq = nvme_get_next_sqe(&ctrl->admin_sq,
++                                      NVME_SQE_OPC_ADMIN_CREATE_IO_SQ, NULL,
++                                      sq->sqe, NULL);
++    if (!cmd_create_sq) {
++        goto err_destroy_sq;
++    }
++
++    cmd_create_sq->dword[10] = (sq->common.mask << 16) | (q_idx >> 1);
++    cmd_create_sq->dword[11] = (q_idx >> 1) << 16 | 1 /* contiguous */;
++    grub_dprintf("nvme", "sq %p create dword10 %08x dword11 %08x\n", sq,
++            cmd_create_sq->dword[10], cmd_create_sq->dword[11]);
++
++    nvme_commit_sqe(&ctrl->admin_sq);
++
++    struct nvme_cqe cqe = nvme_wait(&ctrl->admin_sq);
++
++    if (!nvme_is_cqe_success(&cqe)) {
++        grub_dprintf("nvme", "create io sq failed: %08x %08x %08x %08x\n",
++                cqe.dword[0], cqe.dword[1], cqe.dword[2], cqe.dword[3]);
++        goto err_destroy_sq;
++    }
++
++    return 0;
++
++err_destroy_sq:
++    nvme_destroy_sq(sq);
++err:
++    return -1;
++}
++
++/* Reads count sectors into buf. The buffer cannot cross page boundaries. */
++static int
++nvme_io_xfer(struct nvme_namespace *ns, grub_uint64_t lba, void *prp1, void *prp2,
++             grub_uint16_t count, int write)
++{
++    if (((grub_uint32_t)prp1 & 0x3) || ((grub_uint32_t)prp2 & 0x3)) {
++        /* Buffer is misaligned */
++        return -1;
++    }
++
++    struct nvme_sqe *io_read = nvme_get_next_sqe(&ns->ctrl->io_sq,
++                                                 write ? NVME_SQE_OPC_IO_WRITE
++                                                       : NVME_SQE_OPC_IO_READ,
++                                                 NULL, prp1, prp2);
++    io_read->nsid = ns->ns_id;
++    io_read->dword[10] = (grub_uint32_t)lba;
++    io_read->dword[11] = (grub_uint32_t)(lba >> 32);
++    io_read->dword[12] = (1U << 31 /* limited retry */) | (count - 1);
++
++    nvme_commit_sqe(&ns->ctrl->io_sq);
++
++    struct nvme_cqe cqe = nvme_wait(&ns->ctrl->io_sq);
++
++    if (!nvme_is_cqe_success(&cqe)) {
++        grub_dprintf("nvme", "read io: %08x %08x %08x %08x\n",
++                cqe.dword[0], cqe.dword[1], cqe.dword[2], cqe.dword[3]);
++
++        return -1;
++    }
++
++    grub_dprintf("nvme", "ns %u %s lba %llu+%u\n", ns->ns_id, write ? "write" : "read",
++            lba, count);
++    return count;
++}
++
++// Transfer up to one page of data using the internal dma bounce buffer
++static int
++nvme_bounce_xfer(struct nvme_namespace *ns, grub_uint64_t lba, void *buf, grub_uint16_t count,
++                 int write)
++{
++    grub_uint16_t const max_blocks = NVME_PAGE_SIZE / ns->block_size;
++    grub_uint16_t blocks = count < max_blocks ? count : max_blocks;
++
++    if (write)
++        grub_memcpy(nvme_dma_buffer, buf, blocks * ns->block_size);
++
++    int res = nvme_io_xfer(ns, lba, nvme_dma_buffer, NULL, blocks, write);
++
++    if (!write && res >= 0)
++        grub_memcpy(buf, nvme_dma_buffer, res * ns->block_size);
++
++    return res;
++}
++
++#define NVME_MAX_PRPL_ENTRIES 15 /* Allows requests up to 64kb */
++
++// Transfer data using page list (if applicable)
++static int
++nvme_prpl_xfer(struct nvme_namespace *ns, grub_uint64_t lba, void *buf, grub_uint16_t count,
++               int write)
++{
++    grub_uint32_t base = (long)buf;
++    grub_int32_t size;
++
++    if (count > ns->max_req_size)
++        count = ns->max_req_size;
++
++    size = count * ns->block_size;
++    /* Special case for transfers that fit into PRP1, but are unaligned */
++    if (((size + (base & ~NVME_PAGE_MASK)) <= NVME_PAGE_SIZE))
++        goto single;
++
++    /* Every request has to be page aligned */
++    if (base & ~NVME_PAGE_MASK)
++        goto bounce;
++
++    /* Make sure a full block fits into the last chunk */
++    if (size & (ns->block_size - 1ULL))
++        goto bounce;
++
++    /* Build PRP list if we need to describe more than 2 pages */
++    if ((ns->block_size * count) > (NVME_PAGE_SIZE * 2)) {
++        grub_uint32_t prpl_len = 0;
++        grub_uint64_t *prpl = nvme_dma_buffer;
++        int first_page = 1;
++        for (; size > 0; base += NVME_PAGE_SIZE, size -= NVME_PAGE_SIZE) {
++            if (first_page) {
++                /* First page is special */
++                first_page = 0;
++                continue;
++            }
++            if (prpl_len >= NVME_MAX_PRPL_ENTRIES)
++                goto bounce;
++            prpl[prpl_len++] = base;
++        }
++        return nvme_io_xfer(ns, lba, buf, prpl, count, write);
++    }
++
++    /* Directly embed the 2nd page if we only need 2 pages */
++    if ((ns->block_size * count) > NVME_PAGE_SIZE)
++        return nvme_io_xfer(ns, lba, buf, (char *) buf + NVME_PAGE_SIZE, count, write);
++
++single:
++    /* One page is enough, don't expose anything else */
++    return nvme_io_xfer(ns, lba, buf, NULL, count, write);
++
++bounce:
++    /* Use bounce buffer to make transfer */
++    return nvme_bounce_xfer(ns, lba, buf, count, write);
++}
++
++static int
++nvme_create_io_queues(struct nvme_ctrl *ctrl)
++{
++    if (nvme_create_io_cq(ctrl, &ctrl->io_cq, 3))
++        goto err;
++
++    if (nvme_create_io_sq(ctrl, &ctrl->io_sq, 2, &ctrl->io_cq))
++        goto err_free_cq;
++
++    return 0;
++
++ err_free_cq:
++    nvme_destroy_cq(&ctrl->io_cq);
++ err:
++    return -1;
++}
++
++/* Waits for CSTS.RDY to match rdy. Returns 0 on success. */
++static int
++nvme_wait_csts_rdy(struct nvme_ctrl *ctrl, unsigned rdy)
++{
++    // grub_uint32_t const max_to = 500 /* ms */ * ((ctrl->reg->cap >> 24) & 0xFFU);
++    // grub_uint32_t to = timer_calc(max_to);
++    grub_uint32_t csts;
++
++    while (rdy != ((csts = ctrl->reg->csts) & NVME_CSTS_RDY)) {
++        // FIXME
++        //yield();
++
++        if (csts & NVME_CSTS_FATAL) {
++            grub_dprintf("nvme", "NVMe fatal error during controller shutdown\n");
++            return -1;
++        }
++
++        /*
++        if (timer_check(to)) {
++            warn_timeout();
++            return -1;
++        }*/
++    }
++
++    return 0;
++}
++
++/* Returns 0 on success. */
++static int grub_nvme_controller_enable(struct nvme_ctrl *ctrl)
++{
++    grub_pci_address_t addr;
++    int rc;
++
++    addr = grub_pci_make_address (ctrl->pci, GRUB_PCI_REG_COMMAND);
++    grub_pci_write_word (addr, grub_pci_read_word (addr) | GRUB_PCI_COMMAND_BUS_MASTER);
++
++    /* Turn the controller off. */
++    ctrl->reg->cc = 0;
++    if (nvme_wait_csts_rdy(ctrl, 0)) {
++        grub_dprintf("nvme", "NVMe fatal error during controller shutdown\n");
++        return -1;
++    }
++
++    ctrl->doorbell_stride = 4U << ((ctrl->reg->cap >> 32) & 0xF);
++
++    rc = nvme_init_cq(ctrl, &ctrl->admin_cq, 1,
++                      NVME_PAGE_SIZE / sizeof(struct nvme_cqe));
++    if (rc) {
++        return -1;
++    }
++
++    rc = nvme_init_sq(ctrl, &ctrl->admin_sq, 0,
++                      NVME_PAGE_SIZE / sizeof(struct nvme_sqe), &ctrl->admin_cq);
++    if (rc) {
++        goto err_destroy_admin_cq;
++    }
++
++    ctrl->reg->aqa = ctrl->admin_cq.common.mask << 16
++        | ctrl->admin_sq.common.mask;
++
++    ctrl->reg->asq = (grub_uint32_t)ctrl->admin_sq.sqe;
++    ctrl->reg->acq = (grub_uint32_t)ctrl->admin_cq.cqe;
++
++    grub_dprintf("nvme", "  admin submission queue: %p\n", ctrl->admin_sq.sqe);
++    grub_dprintf("nvme", "  admin completion queue: %p\n", ctrl->admin_cq.cqe);
++
++    ctrl->reg->cc = NVME_CC_EN | (NVME_CQE_SIZE_LOG << 20)
++        | (NVME_SQE_SIZE_LOG << 16 /* IOSQES */);
++
++    if (nvme_wait_csts_rdy(ctrl, 1)) {
++        grub_dprintf("nvme", "NVMe fatal error while enabling controller\n");
++        goto err_destroy_admin_sq;
++    }
++
++    /* The admin queue is set up and the controller is ready. Let's figure out
++       what namespaces we have. */
++
++    struct nvme_identify_ctrl *identify = nvme_admin_identify_ctrl(ctrl);
++
++    if (!identify) {
++        grub_dprintf("nvme", "NVMe couldn't identify controller.\n");
++        goto err_destroy_admin_sq;
++    }
++
++    grub_dprintf("nvme", "NVMe has %u namespace%s.\n",
++            identify->nn, (identify->nn == 1) ? "" : "s");
++
++    ctrl->ns_count = identify->nn;
++    grub_uint8_t mdts = identify->mdts;
++    grub_free(identify);
++
++    if ((ctrl->ns_count == 0) || nvme_create_io_queues(ctrl)) {
++        /* No point to continue, if the controller says it doesn't have
++           namespaces or we couldn't create I/O queues. */
++        goto err_destroy_admin_sq;
++    }
++
++    /* Give the controller a global number */
++    ctrl->ctrlnum = grub_nvme_ctrlcnt++;
++
++    /* Populate namespace IDs */
++    for (grub_uint32_t ns_idx = 0; ns_idx < ctrl->ns_count; ns_idx++) {
++        nvme_probe_ns(ctrl, ns_idx, mdts);
++    }
++
++    grub_dprintf("nvme", "NVMe initialization complete!\n");
++    return 0;
++
++ err_destroy_admin_sq:
++    nvme_destroy_sq(&ctrl->admin_sq);
++ err_destroy_admin_cq:
++    nvme_destroy_cq(&ctrl->admin_cq);
++    return -1;
++}
++
++static int grub_nvme_pci_probe(grub_pci_device_t dev, grub_pci_id_t pciid __attribute__ ((unused)), void *data __attribute__ ((unused)))
++{
++    grub_pci_address_t addr;
++    grub_uint32_t class, bar, version;
++    struct nvme_reg volatile *reg;
++
++    class = grub_pci_read (grub_pci_make_address (dev, GRUB_PCI_REG_CLASS));
++    if (class >> 16 != 0x0108)
++        return 0;
++    if ((class >> 8 & 0xff) != 2) { /* as of NVM 1.0e */
++        grub_dprintf("nvme", "Found incompatble NVMe: prog-if=%02x\n", class >> 8 & 0xff);
++        return 0;
++    }
++
++    bar = grub_pci_read (grub_pci_make_address (dev, GRUB_PCI_REG_ADDRESS_REG0));
++    reg = grub_pci_device_map_range (dev, bar & GRUB_PCI_ADDR_MEM_MASK, sizeof (*reg));
++
++    addr = grub_pci_make_address (dev, GRUB_PCI_REG_COMMAND);
++    grub_pci_write_word (addr, grub_pci_read_word (addr) | GRUB_PCI_COMMAND_MEM_ENABLED);
++
++    version = reg->vs;
++    grub_dprintf("nvme", "Found NVMe controller with version %u.%u.%u.\n", version >> 16, (version >> 8) & 0xFF, version & 0xFF);
++    grub_dprintf("nvme", "  Capabilities %016llx\n", reg->cap);
++
++    if (~reg->cap & NVME_CAP_CSS_NVME) {
++        grub_dprintf("nvme", "Controller doesn't speak NVMe command set. Skipping.\n");
++        goto err;
++    }
++
++    struct nvme_ctrl *ctrl = grub_malloc(sizeof(*ctrl));
++    if (!ctrl)
++        goto err;
++
++    grub_memset(ctrl, 0, sizeof(*ctrl));
++
++    ctrl->reg = reg;
++    ctrl->pci = dev;
++
++    if (grub_nvme_controller_enable(ctrl))
++        goto err_free_ctrl;
++
++    return 0;
++
++ err_free_ctrl:
++    grub_free(ctrl);
++ err:
++    grub_dprintf("nvme", "Failed to enable NVMe controller.\n");
++    return 0;
++}
++
++static int
++grub_nvme_iterate (grub_disk_dev_iterate_hook_t hook, void *hook_data, grub_disk_pull_t pull)
++{
++  struct nvme_namespace *ns;
++
++  if (pull != GRUB_DISK_PULL_NONE)
++    return 0;
++
++  FOR_LIST_ELEMENTS(ns, grub_nvme_namespaces)
++    if (hook (ns->devname, hook_data))
++      return 1;
++
++  return 0;
++}
++
++static grub_err_t
++grub_nvme_open (const char *name __attribute ((unused)), grub_disk_t disk __attribute ((unused)))
++{
++  struct nvme_namespace *ns;
++
++  FOR_LIST_ELEMENTS(ns, grub_nvme_namespaces)
++    if (grub_strcmp (ns->devname, name) == 0)
++      break;
++
++  if (! ns)
++    return grub_error (GRUB_ERR_UNKNOWN_DEVICE, "can't open device");
++
++  disk->total_sectors = ns->lba_count;
++  disk->max_agglomerate = ns->max_req_size;
++
++  disk->id = ns->nsnum; /* global id of the namespace */
++
++  disk->data = ns;
++
++  return 0;
++}
++
++static grub_err_t
++nvme_readwrite(struct nvme_namespace *ns, grub_disk_addr_t sector, grub_size_t num_sectors, char *buf, int write)
++{
++    for (int i = 0; i < num_sectors;) {
++        grub_uint16_t blocks_remaining = num_sectors - i;
++        char *op_buf = buf + i * ns->block_size;
++        int blocks = nvme_prpl_xfer(ns, sector + i, op_buf, blocks_remaining, write);
++        if (blocks < 0)
++            return GRUB_ERR_IO;
++        i += blocks;
++    }
++    return GRUB_ERR_NONE;
++}
++
++static grub_err_t
++grub_nvme_read (grub_disk_t disk, grub_disk_addr_t sector, grub_size_t num_sectors, char *buf)
++{
++  return nvme_readwrite((struct nvme_namespace *) disk->data, sector, num_sectors, buf, 0);
++}
++
++static grub_err_t
++grub_nvme_write (grub_disk_t disk, grub_disk_addr_t sector, grub_size_t num_sectors, const char *buf)
++{
++  return nvme_readwrite((struct nvme_namespace *) disk->data, sector, num_sectors, buf, 1);
++}
++
++static struct grub_disk_dev grub_nvme_dev =
++  {
++    .name = "nvme",
++    .id = GRUB_DISK_DEVICE_NVME_ID,
++    .disk_iterate = grub_nvme_iterate,
++    .disk_open = grub_nvme_open,
++    .disk_read = grub_nvme_read,
++    .disk_write = grub_nvme_write,
++    .next = 0
++  };
++
++GRUB_MOD_INIT(nvme)
++{
++  grub_stop_disk_firmware ();
++  grub_pci_iterate (grub_nvme_pci_probe, NULL);
++  grub_disk_dev_register (&grub_nvme_dev);
++}
++
++GRUB_MOD_FINI(nvme)
++{
++  grub_disk_dev_unregister (&grub_nvme_dev);
++}
+diff --git a/include/grub/disk.h b/include/grub/disk.h
+index fbf23df7f..186e76f0b 100644
+--- a/include/grub/disk.h
++++ b/include/grub/disk.h
+@@ -52,6 +52,7 @@ enum grub_disk_dev_id
+     GRUB_DISK_DEVICE_UBOOTDISK_ID,
+     GRUB_DISK_DEVICE_XEN,
+     GRUB_DISK_DEVICE_OBDISK_ID,
++    GRUB_DISK_DEVICE_NVME_ID
+   };
+ 
+ struct grub_disk;
+-- 
+2.39.2
+
diff --git a/config/grub/target.cfg b/config/grub/xhci/target.cfg
similarity index 70%
rename from config/grub/target.cfg
rename to config/grub/xhci/target.cfg
index 2aaeb559..34ab2d24 100644
--- a/config/grub/target.cfg
+++ b/config/grub/xhci/target.cfg
@@ -1,3 +1,5 @@
+tree="xhci"
+rev="8719cc2040368d43ab2de0b6e1b850b2c9cfc5b7"
 bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
 autoconfargs="--with-platform=coreboot --disable-werror"
 makeargs="FS_PAYLOAD_MODULES=\"\""
diff --git a/config/submodule/grub/default/gnulib/module.cfg b/config/submodule/grub/default/gnulib/module.cfg
new file mode 100644
index 00000000..26c28561
--- /dev/null
+++ b/config/submodule/grub/default/gnulib/module.cfg
@@ -0,0 +1,3 @@
+subrepo="git://git.sv.gnu.org/gnulib"
+subrepo_bkup="https://codeberg.org/libreboot/gnulib"
+subrev="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
diff --git a/config/submodule/grub/default/module.list b/config/submodule/grub/default/module.list
new file mode 100644
index 00000000..0e57095c
--- /dev/null
+++ b/config/submodule/grub/default/module.list
@@ -0,0 +1 @@
+gnulib
diff --git a/config/submodule/grub/xhci/gnulib/module.cfg b/config/submodule/grub/xhci/gnulib/module.cfg
new file mode 100644
index 00000000..26c28561
--- /dev/null
+++ b/config/submodule/grub/xhci/gnulib/module.cfg
@@ -0,0 +1,3 @@
+subrepo="git://git.sv.gnu.org/gnulib"
+subrepo_bkup="https://codeberg.org/libreboot/gnulib"
+subrev="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
diff --git a/config/submodule/grub/xhci/module.list b/config/submodule/grub/xhci/module.list
new file mode 100644
index 00000000..0e57095c
--- /dev/null
+++ b/config/submodule/grub/xhci/module.list
@@ -0,0 +1 @@
+gnulib
diff --git a/include/git.sh b/include/git.sh
index e7fe28b5..ec1ecdd3 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -103,17 +103,17 @@ git_prep()
 
 prep_submodules()
 {
-	[ -f "$tmpgit/.gitmodules" ] || return 0
-
 	mdir="$PWD/config/submodule/$project"
 	[ -n "$tree" ] && mdir="$mdir/$tree"
 
 	if [ -f "$mdir/module.list" ]; then
 		cat "$mdir/module.list" > "$tmpdir/modules" || \
 		    $err "!cp $mdir/module.list $tmpdir/modules"
-	else
+	elif [ -f "$tmpgit/.gitmodules" ]; then
 		git -C "$tmpgit" submodule status | awk '{print $2}' > \
 		    "$tmpdir/modules" || $err "$mdir: cannot list submodules"
+	else
+		return 0
 	fi
 
 	while read -r msrcdir; do
diff --git a/include/lib.sh b/include/lib.sh
index eff55511..44ec3623 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -11,10 +11,8 @@ cbdir="src/coreboot/default"
 cbcfgsdir="config/coreboot"
 ifdtool="cbutils/default/ifdtool"
 cbfstool="cbutils/default/cbfstool"
-grubcfgsdir="config/grub"
-layoutdir="/boot/grub/layouts"
-. "$grubcfgsdir/modules.list"
 tmpgit="$PWD/tmp/gitclone"
+grubdata="config/data/grub"
 err="err_"
 
 err_()
diff --git a/script/roms b/script/roms
index 1e596192..7e5e1be6 100755
--- a/script/roms
+++ b/script/roms
@@ -12,7 +12,6 @@ set -u -e
 
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 grub_background="background1280x800.png"
-grubelf="elf/grub/grub.elf"
 cfgsdir="config/coreboot"
 picosrc="src/pico-serprog"
 picosdk="src/pico-sdk"
@@ -23,7 +22,7 @@ stm32src="src/stm32-vserprog"
 pv="payload_uboot payload_grub_withseabios payload_seabios payload_memtest t"
 pv="$pv payload_seabios_withgrub payload_seabios_grubonly payload_grub mt86bin"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree keymaps release"
-v="$v grub_timeout ubdir board grub_scan_disk uboot_config"
+v="$v grub_timeout ubdir board grub_scan_disk uboot_config grubtree grubelf"
 eval "$(setvars "n" $pv serprog)"
 eval "$(setvars "" $v boards _displaymode _payload _keyboard all targets \
     serprog_boards_dir _scandisk)"
@@ -172,6 +171,9 @@ configure_target()
 	[ -z "$_grub_scan_disk" ] && _grub_scan_disk="nvme ahci ata"
 	grub_scan_disk="${_grub_scan_disk# }"
 
+	[ -n "$grubtree" ] || grubtree="default"
+	grubelf="elf/grub/$grubtree/payload/grub.elf"
+
 	[ -z "$tree" ] && $err "$board: tree not defined"
 
 	[ "$payload_memtest" != "y" ] && payload_memtest="n"
@@ -225,24 +227,14 @@ build_payloads()
 
 build_grub_payload()
 {
-	x_ mkdir -p elf/grub
-
-	for keymapfile in config/grub/keymap/*.gkb; do
+	for keymapfile in "$grubdata/keymap/"*.gkb; do
 		[ -f "$keymapfile" ] && keymaps="$keymaps $keymapfile"
 	done
-	[ -z "$_keyboard" ] || [ -f "$grubcfgsdir/keymap/$_keyboard.gkb" ] || \
+	[ -z "$_keyboard" ] || [ -f "$grubdata/keymap/$_keyboard.gkb" ] || \
 		$err "build_grub_payload: $_keyboard layout not defined"
-	[ -n "$_keyboard" ] && keymaps="$grubcfgsdir/keymap/$_keyboard.gkb"
-	[ -f "$grubelf" ] && return 0
-	[ -f "src/grub/grub-mkstandalone" ] || x_ ./update trees -b grub
+	[ -n "$_keyboard" ] && keymaps="$grubdata/keymap/$_keyboard.gkb"
 
-	./src/grub/grub-mkstandalone --grub-mkimage="src/grub/grub-mkimage" \
-	    -O i386-coreboot -o "elf/grub/grub.elf" -d "src/grub/grub-core/" \
-	    --fonts= --themes= --locales=  --modules="$grub_modules" \
-	    --install-modules="$grub_install_modules" \
-	    "/boot/grub/grub.cfg=$grubcfgsdir/config/grub_memdisk.cfg" \
-	    "/boot/grub/grub_default.cfg=$grubcfgsdir/config/grub.cfg" || \
-	    $err "could not generate grub.elf"
+	[ -f "$grubelf" ] || x_ ./update trees -b grub $grubtree; return 0
 }
 
 build_uboot_payload()
@@ -343,7 +335,7 @@ build_grub_roms()
 	# we only need insert background.png once, for each coreboot config:
 	if [ "$displaymode" = "vesafb" ] || \
 	    [ "$displaymode" = "corebootfb" ]; then
-		backgroundfile="config/grub/background/$grub_background"
+		backgroundfile="$grubdata/background/$grub_background"
 		"$cbfstool" "$tmprom" add -f "$backgroundfile" -n \
 		    background.png -t raw || $err "!bg, $backgroundfile"
 	fi
@@ -376,7 +368,7 @@ build_grub_roms()
 		if [ "$payload_seabios_withgrub" = "y" ] && \
 		    [ "$payload1" != "grub" ]; then
 			x_ "$cbfstool" "$tmpgrubrom" add \
-			    -f "config/grub/bootorder" -n bootorder -t raw
+			    -f "$grubdata/bootorder" -n bootorder -t raw
 			x_ cprom "$tmpgrubrom" "${newrom%.rom}_grubfirst.rom"
 			if [ "$payload_seabios_grubonly" = "y" ]; then
 				x_ "$cbfstool" "$tmpgrubrom" add-int -i 0 \
diff --git a/script/trees b/script/trees
index 80037bd8..1075b220 100755
--- a/script/trees
+++ b/script/trees
@@ -178,9 +178,12 @@ check_config()
 
 handle_makefile()
 {
-	x_ make clean -C "$cdir" && x_ cp "$config" "$cdir/.config"
-	[ -n "$mode" ] || make -C "$cdir" silentoldconfig || \
-	    make -C "$cdir" oldconfig || :
+	[ "$project" = "grub" ] && [ "${mode%config}" != "$mode" ] && return 0
+
+	check_makefile "$cdir" && x_ make clean -C "$cdir"
+	x_ cp "$config" "$cdir/.config"
+	[ -n "$mode" ] || [ "$project" = "grub" ] || make -C "$cdir" \
+	    silentoldconfig || make -C "$cdir" oldconfig || :
 
 	run_make_command || $err "handle_makefile $cdir: no makefile!"
 
@@ -204,6 +207,8 @@ run_make_command()
 
 	make -C "$cdir" $mode -j$threads $makeargs || $err "!mk $cdir $mode"
 
+	[ "$project" = "grub" ] && [ -z "$mode" ] && mkpayload_grub
+
 	[ "$mode" != "clean" ] && return 0
 	make -C "$cdir" distclean 2>/dev/null || :
 }
@@ -232,6 +237,25 @@ check_makefile()
 	    [ -f "$1/GNUmakefile" ] || return 1; return 0
 }
 
+mkpayload_grub()
+{
+	[ -f "$grubdata/module/$tree" ] || $err "$tree: grub modules missing"
+	x_ rm -f "$cdir/grub.elf"
+
+	eval "$(setvars "" grub_modules grub_install_modules)"
+
+	. "$grubdata/module/$tree" || $err "$tree: !source grub modules"
+
+	[ -z "$grub_install_modules" ] && $err "$tree: install modules unset"
+	[ -z "$grub_modules" ] && $err "$tree: modules unset"
+
+	"${cdir}/grub-mkstandalone" --grub-mkimage="${cdir}/grub-mkimage" \
+	    -O i386-coreboot -o "${cdir}/grub.elf" -d "${cdir}/grub-core/" \
+	    --fonts= --themes= --locales=  --modules="$grub_modules" \
+	    --install-modules="$grub_install_modules" \
+	    "/boot/grub/grub.cfg=${cdir}/.config" || $err "$tree: !mkgrub"
+}
+
 copy_elf()
 {
 	while read -r f; do

From 1e534e7dda107085236794c124bc546f285e877a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 2 Jun 2024 23:15:27 +0100
Subject: [PATCH 0457/1549] add projectsite file: point to libreboot.org

this will be used in subsequent revisions

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 projectsite | 1 +
 1 file changed, 1 insertion(+)
 create mode 100644 projectsite

diff --git a/projectsite b/projectsite
new file mode 100644
index 00000000..bb74f9d7
--- /dev/null
+++ b/projectsite
@@ -0,0 +1 @@
+https://libreboot.org/

From afac9a06d2c6f18c44066321674129383e85b2ba Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 2 Jun 2024 23:34:10 +0100
Subject: [PATCH 0458/1549] build: print the project website address on help

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build          | 2 +-
 include/lib.sh | 5 +++--
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/build b/build
index 28d8be08..44d99507 100755
--- a/build
+++ b/build
@@ -38,7 +38,7 @@ main()
 	done
 
 	case "${1}" in
-	version) printf "%s\n" "$relname" ;;
+	version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
 	release) shift 1; mkrelease $@ ;;
 	inject) shift 1; vendor_inject $@ ;;
 	download) shift 1; vendor_download $@ ;;
diff --git a/include/lib.sh b/include/lib.sh
index 44ec3623..1b0f07c1 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -32,7 +32,7 @@ setvars()
 	printf "%s\n" "${_setvars% }"
 }
 eval "$(setvars "" xbmk_release tmpdir _nogit version board boarddir relname \
-    versiondate threads projectname)"
+    versiondate threads projectname projectsite)"
 
 # if "y": a coreboot target won't be built if target.cfg says release="n"
 # (this is used to exclude certain build targets from releases)
@@ -70,6 +70,7 @@ x_() {
     $err "Cannot generate unknown versiondate file"
 
 read -r projectname < projectname || :
+read -r projectsite < projectsite || :
 [ ! -f version ] || read -r version < version || :
 version_="$version"
 [ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
@@ -78,7 +79,7 @@ version_="$version"
 versiondate_="$versiondate"
 [ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
     --pretty='%ct' HEAD)" || versiondate="$versiondate_"
-for p in projectname version versiondate; do
+for p in projectname version versiondate projectsite; do
 	eval "[ -n \"\$$p\" ] || $err \"$p unset\""
 	eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
 done

From 00653aab1ea6d1bc227227da9e2195432f8fe52e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 3 Jun 2024 00:17:36 +0100
Subject: [PATCH 0459/1549] better help text on invalid commands

adding help again is a bad idea. code should never
document itself; that's what documentation is for.

so, make the code do a better job telling the user
where to find documentation.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build          | 12 ++++++------
 include/lib.sh |  9 +++++++++
 script/roms    |  2 +-
 script/trees   |  2 +-
 4 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/build b/build
index 44d99507..10982423 100755
--- a/build
+++ b/build
@@ -25,7 +25,7 @@ linkname="${linkpath##*/}"
 main()
 {
 	x_ id -u 1>/dev/null 2>/dev/null
-	[ $# -lt 1 ] && $err "Check $projectname documentation for help."
+	[ $# -lt 1 ] && badcmd
 	spath="script/$1"
 
 	[ "$1" = "dependencies" ] && x_ install_packages $@ && return 0
@@ -43,7 +43,7 @@ main()
 	inject) shift 1; vendor_inject $@ ;;
 	download) shift 1; vendor_download $@ ;;
 	*)
-		[ -f "$spath" ] || $err "Bad command. Check docs."
+		[ -f "$spath" ] || badcmd
 		shift 1; "$spath" $@ || $err "excmd: $spath $@" ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
@@ -51,8 +51,8 @@ main()
 
 install_packages()
 {
-	[ $# -lt 2 ] && $err "Bad command. Check docs."
-	[ -f "config/dependencies/$2" ] || $err "Unsupported target"
+	[ $# -lt 2 ] && badcmd "fewer than two arguments"
+	[ -f "config/dependencies/$2" ] || badcmd "unsupported target"
 
 	. "config/dependencies/$2"
 
@@ -79,11 +79,11 @@ mkrelease()
 
 	vdir="release"
 	while getopts d:m: option; do
-		[ -z "$OPTARG" ] && $err "Empty argument not allowed"
+		[ -z "$OPTARG" ] && badcmd "empty argument not allowed"
 		case "$option" in
 		d) vdir="$OPTARG" ;;
 		m) mode="$OPTARG" ;;
-		*) $err "Invalid option" ;;
+		*) badcmd "invalid option '-$option'" ;;
 		esac
 	done
 
diff --git a/include/lib.sh b/include/lib.sh
index 1b0f07c1..8d4b7825 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -15,6 +15,15 @@ tmpgit="$PWD/tmp/gitclone"
 grubdata="config/data/grub"
 err="err_"
 
+badcmd()
+{
+	errmsg="no context given"
+	[ $# -gt 0 ] && errmsg="$1"
+
+	dstr="Check $projectname docs via $projectsite"
+	[ -d "docs" ] && dstr="$dstr (local docs available via docs/)"
+	$err "Bad command ($errmsg). $dstr"
+}
 err_()
 {
 	printf "ERROR %s: %s\n" "$0" "$1" 1>&2
diff --git a/script/roms b/script/roms
index 7e5e1be6..ee48bc42 100755
--- a/script/roms
+++ b/script/roms
@@ -69,7 +69,7 @@ main()
 
 handle_serprog()
 {
-	[ -z "${1+x}" ] && $err "bad command. Check $projectname docs."
+	[ -z "${1+x}" ] && badcmd
 	[ "$1" != "rp2040" ] && [ "$1" != "stm32" ] && $err "bad command"
 	if [ "$1" = "rp2040" ]; then
 		serprog_boards_dir="$picosdk/src/boards/include/boards"
diff --git a/script/trees b/script/trees
index 1075b220..e22467f7 100755
--- a/script/trees
+++ b/script/trees
@@ -27,7 +27,7 @@ main()
 		-s) mode="savedefconfig" ;;
 		-l) mode="olddefconfig" ;;
 		-n) mode="nconfig" ;;
-		*) $err "Invalid option" ;;
+		*) badcmd "invalid option '-$option'" ;;
 		esac
 		shift; project="${OPTARG#src/}"; shift
 	done

From 49ae4f91f98f0c118c6666e7132a14b889181bbc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 3 Jun 2024 08:25:04 +0100
Subject: [PATCH 0460/1549] badcmd: link directly to the maintenance manual

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 8d4b7825..68e36021 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -20,7 +20,7 @@ badcmd()
 	errmsg="no context given"
 	[ $# -gt 0 ] && errmsg="$1"
 
-	dstr="Check $projectname docs via $projectsite"
+	dstr="See $projectname build system docs: ${projectsite}docs/maintain/"
 	[ -d "docs" ] && dstr="$dstr (local docs available via docs/)"
 	$err "Bad command ($errmsg). $dstr"
 }

From c2793e7a5ea931a77e119e593204a79c06870e53 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 3 Jun 2024 08:26:04 +0100
Subject: [PATCH 0461/1549] badcmd: don't print "no context given"

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 68e36021..5ae34818 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -17,12 +17,12 @@ err="err_"
 
 badcmd()
 {
-	errmsg="no context given"
-	[ $# -gt 0 ] && errmsg="$1"
+	errmsg="Bad command"
+	[ $# -gt 0 ] && errmsg="Bad command ($1)"
 
 	dstr="See $projectname build system docs: ${projectsite}docs/maintain/"
 	[ -d "docs" ] && dstr="$dstr (local docs available via docs/)"
-	$err "Bad command ($errmsg). $dstr"
+	$err "$errmsg. $dstr"
 }
 err_()
 {

From 53dd4bc4dd86cc490f5b481e8644fa58511820fb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 3 Jun 2024 11:07:07 +0100
Subject: [PATCH 0462/1549] lib.sh: more friendly output from e()

already of saying "found", say "already exists"

this means the output of these commands more user
friendly and intuitive:

./update trees -b grub default
./update trees -b coreboot i945

this is just an example. when an ELF file already
exists, the build is skipped even if src isn't downloaded.

this design is intentional, because it means that you can
use previous builds if you want to save time on another.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 5ae34818..b335ace3 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -201,10 +201,10 @@ e()
 {
 	es_t="e"
 	[ $# -gt 1 ] && es_t="$2"
-	es2=""
+	es2="already exists"
 	estr="[ -$es_t \"\$1\" ] || return 1"
-	[ $# -gt 2 ] && estr="[ -$es_t \"\$1\" ] && return 1" && es2="not "
+	[ $# -gt 2 ] && estr="[ -$es_t \"\$1\" ] && return 1" && es2="not found"
 
 	eval "$estr"
-	printf "%s %sfound\n" "$1" "$es2" 1>&2
+	printf "%s %s\n" "$1" "$es2" 1>&2
 }

From 7d562679becb4c9a905c37bd45896edaf9faf9ca Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 4 Jun 2024 13:53:08 +0100
Subject: [PATCH 0463/1549] lib.sh bugfix: check environmental variables right

A user had TMUX_TMPDIR set, which broke the TMPDIR check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index b335ace3..8868975b 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -43,14 +43,16 @@ setvars()
 eval "$(setvars "" xbmk_release tmpdir _nogit version board boarddir relname \
     versiondate threads projectname projectsite)"
 
+
 # if "y": a coreboot target won't be built if target.cfg says release="n"
 # (this is used to exclude certain build targets from releases)
-set | grep XBMK_RELEASE 1>/dev/null 2>/dev/null || xbmk_release="n" || :
+
+[ -z "${XBMK_RELEASE+x}" ] && xbmk_release="n"
 [ -z "$xbmk_release" ] && xbmk_release="$XBMK_RELEASE"
 [ "$xbmk_release" = "n" ] || [ "$xbmk_release" = "y" ] || xbmk_release="n"
 export XBMK_RELEASE="$xbmk_release"
 
-set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"
+[ -z "${TMPDIR+x}" ] && tmpdir_was_set="n"
 if [ "$tmpdir_was_set" = "y" ]; then
 	[ "${TMPDIR%_*}" = "/tmp/xbmk" ] || tmpdir_was_set="n"
 fi
@@ -63,7 +65,7 @@ else
 	tmpdir="$TMPDIR"
 fi
 
-set | grep XBMK_THREADS 1>/dev/null 2>/dev/null && threads="$XBMK_THREADS"
+[ -z "${XBMK_THREADS+x}" ] || threads="$XBMK_THREADS"
 [ -z "$threads" ] && threads=1
 expr "X$threads" : "X-\{0,1\}[0123456789][0123456789]*$" \
     1>/dev/null 2>/dev/null || threads=1 # user specified a non-integer

From 414a605ab35fa537efce929a31fcd461a37a881e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 4 Jun 2024 14:05:11 +0100
Subject: [PATCH 0464/1549] bump untitled revision in git config

it imports the same environmental variable fix because
i had the same buggy TMPDIR check there. i fixed that
upstream in untitled.

import the new untitled revision.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/docs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/git/docs b/config/git/docs
index c6b7a387..86471432 100644
--- a/config/git/docs
+++ b/config/git/docs
@@ -1,5 +1,5 @@
 {docs}{
-	rev: 693a4f811d321d81f685a5822caf8d639e778832
+	rev: ce384c171a065048605b1d4cf7831ea605d4ded2
 	loc: docs
 	url: https://codeberg.org/vimuser/untitled
 	bkup_url: https://notabug.org/untitled/untitled

From c6aff76931cb3fb2694676ab360cb165967883c0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 4 Jun 2024 14:16:43 +0100
Subject: [PATCH 0465/1549] bump untitled revision again

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/docs | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/git/docs b/config/git/docs
index 86471432..2778b343 100644
--- a/config/git/docs
+++ b/config/git/docs
@@ -1,5 +1,5 @@
 {docs}{
-	rev: ce384c171a065048605b1d4cf7831ea605d4ded2
+	rev: e72d055915c3a9ffe739982946e101b146b2483c
 	loc: docs
 	url: https://codeberg.org/vimuser/untitled
 	bkup_url: https://notabug.org/untitled/untitled

From 75382a4126f1994dd9ff1009ac084369d2b80d13 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 5 Jun 2024 11:07:53 +0100
Subject: [PATCH 0466/1549] bugfix: move dependencies handling to lib.sh

do it strategically, in just the right place so that the
version and versiondate files aren't written.

otherwise, version/versiondate are written as root and
the build system becomes unusable after that, unless you
reset the file ownerships from root. hardly user-friendly.

mitigate this bug.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build          | 15 +--------------
 include/lib.sh | 23 +++++++++++++++++++----
 2 files changed, 20 insertions(+), 18 deletions(-)

diff --git a/build b/build
index 10982423..1fdc69c4 100755
--- a/build
+++ b/build
@@ -16,7 +16,7 @@ fi
 . "include/vendor.sh"
 . "include/mrc.sh"
 
-eval "$(setvars "" aur_notice vdir src_dirname srcdir _xm mode xp)"
+eval "$(setvars "" vdir src_dirname srcdir _xm mode xp)"
 err="fail"
 
 linkpath="${0}"
@@ -28,8 +28,6 @@ main()
 	[ $# -lt 1 ] && badcmd
 	spath="script/$1"
 
-	[ "$1" = "dependencies" ] && x_ install_packages $@ && return 0
-
 	[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
 
 	for g in "which git" "git config --global user.name" \
@@ -49,17 +47,6 @@ main()
 	set -u -e # some commands disable them. turn them on!
 }
 
-install_packages()
-{
-	[ $# -lt 2 ] && badcmd "fewer than two arguments"
-	[ -f "config/dependencies/$2" ] || badcmd "unsupported target"
-
-	. "config/dependencies/$2"
-
-	x_ $pkg_add $pkglist && [ -n "$aur_notice" ] && \
-	printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; return 0
-}
-
 git_init()
 {
 	[ -L ".git" ] && return 1
diff --git a/include/lib.sh b/include/lib.sh
index 8868975b..c5bd4bc9 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -40,9 +40,26 @@ setvars()
 	done
 	printf "%s\n" "${_setvars% }"
 }
-eval "$(setvars "" xbmk_release tmpdir _nogit version board boarddir relname \
-    versiondate threads projectname projectsite)"
 
+eval "$(setvars "" xbmk_release tmpdir _nogit version board boarddir relname \
+    versiondate threads projectname projectsite aur_notice)"
+
+read -r projectname < projectname || :
+read -r projectsite < projectsite || :
+
+install_packages()
+{
+	[ $# -lt 2 ] && badcmd "fewer than two arguments"
+	[ -f "config/dependencies/$2" ] || badcmd "unsupported target"
+
+	. "config/dependencies/$2" || $err "! . config/dependencies/$2"
+
+	$pkg_add $pkglist || $err "Cannot install packages"
+
+	[ -n "$aur_notice" ] && \
+	printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; return 0
+}
+[ $# -gt 0 ] && [ "$1" = "dependencies" ] && install_packages $@ && return 0
 
 # if "y": a coreboot target won't be built if target.cfg says release="n"
 # (this is used to exclude certain build targets from releases)
@@ -80,8 +97,6 @@ x_() {
 [ -e ".git" ] || [ -f "versiondate" ] || printf "1716415872\n" > versiondate || \
     $err "Cannot generate unknown versiondate file"
 
-read -r projectname < projectname || :
-read -r projectsite < projectsite || :
 [ ! -f version ] || read -r version < version || :
 version_="$version"
 [ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \

From 62c25ac7ab2b7be8e2f3a2321e44dcf93dc9c635 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 5 Jun 2024 11:11:01 +0100
Subject: [PATCH 0467/1549] move root check to lib.sh (bugfix)

this avoids writing the version/versiondate files as root.

this complements the previous fix, that avoided writing those
same files when running the dependencies command.

initial setup of the build system requires root, to run the
dependencies script, but otherwise the build system prevents
running as root for everything else, so we must avoid writing
the version/versiondate files as root.

that same avoidance is necessary when checking whether running
other commands as root; ironically, this check then prevented
running the build system at all!

the bug should be fully fixed now. i found this quite by accident
the other day, when testing something else.

good thing this got fixed because the release!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build          | 2 --
 include/lib.sh | 2 ++
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/build b/build
index 1fdc69c4..421c163c 100755
--- a/build
+++ b/build
@@ -28,8 +28,6 @@ main()
 	[ $# -lt 1 ] && badcmd
 	spath="script/$1"
 
-	[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
-
 	for g in "which git" "git config --global user.name" \
 	    "git config --global user.email" "git_init"; do
 		eval "$g 1>/dev/null 2>/dev/null || git_err \"$g\""
diff --git a/include/lib.sh b/include/lib.sh
index c5bd4bc9..23dfe81a 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -61,6 +61,8 @@ install_packages()
 }
 [ $# -gt 0 ] && [ "$1" = "dependencies" ] && install_packages $@ && return 0
 
+[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
+
 # if "y": a coreboot target won't be built if target.cfg says release="n"
 # (this is used to exclude certain build targets from releases)
 

From 6e1b8087c5133b4f9a384df6ea7de3250ea8e573 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 5 Jun 2024 11:26:08 +0100
Subject: [PATCH 0468/1549] move id check to lib.sh too

doesn't really matter, it's just an extra layer to ensure
reliability, but "id" is pretty standard

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build          | 1 -
 include/lib.sh | 1 +
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/build b/build
index 421c163c..748ff4f0 100755
--- a/build
+++ b/build
@@ -24,7 +24,6 @@ linkname="${linkpath##*/}"
 
 main()
 {
-	x_ id -u 1>/dev/null 2>/dev/null
 	[ $# -lt 1 ] && badcmd
 	spath="script/$1"
 
diff --git a/include/lib.sh b/include/lib.sh
index 23dfe81a..6a4be7ee 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -61,6 +61,7 @@ install_packages()
 }
 [ $# -gt 0 ] && [ "$1" = "dependencies" ] && install_packages $@ && return 0
 
+id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
 [ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
 
 # if "y": a coreboot target won't be built if target.cfg says release="n"

From bea089bbe4a720e39ba78850f015c67dbe3d1a43 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 6 Jun 2024 01:01:22 +0100
Subject: [PATCH 0469/1549] don't use build.list to detect multi-tree projects

instead, check for the presence of target.cfg files
not in config/project/ but config/project/tree/

the way this check is done, it merely returns 1 if
config/project/*/target.cfg is detected, and returns
0 in all other cases, even if config/project/target.cfg
exists

that way, if the maintainer accidentally adds a
target.cfg in the main directory, the given multi-tree
project will not break

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build          |  5 +----
 include/lib.sh | 10 ++++++++++
 script/trees   |  2 +-
 3 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/build b/build
index 748ff4f0..74ea1de6 100755
--- a/build
+++ b/build
@@ -117,10 +117,7 @@ fetch_trees()
 {
 	for x in $(items config/git); do
 		./update trees -f "$x" || $err "$_xm: fetch $x"
-	done
-	for x in config/*/build.list; do
-		[ -f "$x" ] && xp="${x#*/}" && xp="${xp%/*}"
-		[ ! -f "$x" ] || [ -L "$xp" ] || x_ rm -Rf "src/$xp/$xp"
+		singletree "$x" || x_ rm -Rf "src/$x/$x"
 	done
 	rmgit .
 }
diff --git a/include/lib.sh b/include/lib.sh
index 6a4be7ee..bc2232ad 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -228,3 +228,13 @@ e()
 	eval "$estr"
 	printf "%s %s\n" "$1" "$es2" 1>&2
 }
+
+# return 0 if project is single-tree, otherwise 1
+# e.g. coreboot is multi-tree, so 1
+singletree()
+{
+	for pdir in "config/${1}/"*/target.cfg; do
+		[ ! -e "$pdir" ] && continue
+		[ -f "$pdir" ] && return 1
+	done
+}
diff --git a/script/trees b/script/trees
index e22467f7..897c6ed3 100755
--- a/script/trees
+++ b/script/trees
@@ -39,7 +39,7 @@ main()
 	remkdir "${tmpgit%/*}"
 
 	_cmd="build_projects"
-	[ -f "config/$project/build.list" ] && _cmd="build_targets"
+	singletree "$project" || _cmd="build_targets"
 	$_cmd $@
 }
 

From ba36f26d6266ef6f980ddd9db5237db29d1c7c66 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 6 Jun 2024 02:35:36 +0100
Subject: [PATCH 0470/1549] handle build.list from config/data/, not config/

certain code checks for build.list, to skip it, for
example in items()

we already use config/data/grub to store grub config data
that applied to all trees

create these directories too:

config/data/coreboot
config/data/u-boot
config/data/seabios

move the respective build.list files in here, and also
to config/data/grub

now multi-tree projects contain, per directory, just the
target.cfg file and the patches directory. this is much
cleaner, because some of the logic can be simplified more

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/{ => data}/coreboot/build.list | 0
 config/{ => data}/grub/build.list     | 0
 config/{ => data}/seabios/build.list  | 0
 config/{ => data}/u-boot/build.list   | 0
 include/lib.sh                        | 1 -
 script/trees                          | 5 +++--
 6 files changed, 3 insertions(+), 3 deletions(-)
 rename config/{ => data}/coreboot/build.list (100%)
 rename config/{ => data}/grub/build.list (100%)
 rename config/{ => data}/seabios/build.list (100%)
 rename config/{ => data}/u-boot/build.list (100%)

diff --git a/config/coreboot/build.list b/config/data/coreboot/build.list
similarity index 100%
rename from config/coreboot/build.list
rename to config/data/coreboot/build.list
diff --git a/config/grub/build.list b/config/data/grub/build.list
similarity index 100%
rename from config/grub/build.list
rename to config/data/grub/build.list
diff --git a/config/seabios/build.list b/config/data/seabios/build.list
similarity index 100%
rename from config/seabios/build.list
rename to config/data/seabios/build.list
diff --git a/config/u-boot/build.list b/config/data/u-boot/build.list
similarity index 100%
rename from config/u-boot/build.list
rename to config/data/u-boot/build.list
diff --git a/include/lib.sh b/include/lib.sh
index bc2232ad..3ef3e3fe 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -122,7 +122,6 @@ items()
 	for x in "$1/"*; do
 		# -e used because this is for files *or* directories
 		[ -e "$x" ] || continue
-		[ "${x##*/}" = "build.list" ] && continue
 		printf "%s\n" "${x##*/}" 2>/dev/null
 		rval=0
 	done
diff --git a/script/trees b/script/trees
index 897c6ed3..d681a870 100755
--- a/script/trees
+++ b/script/trees
@@ -11,7 +11,7 @@ set -u -e
 
 eval "$(setvars "" xarch cfgsdir cdir config config_name xlang mode makeargs \
     listfile project target target_dir targets tree _f target1 bootstrapargs \
-    autoconfargs cmakedir elfdir autogenargs xtree)"
+    autoconfargs cmakedir elfdir autogenargs xtree datadir)"
 
 main()
 {
@@ -34,6 +34,7 @@ main()
 	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
 	[ -z "$project" ] && $err "project name not specified"
 	elfdir="elf/$project"
+	datadir="config/data/$project"
 	cfgsdir="config/$project"
 
 	remkdir "${tmpgit%/*}"
@@ -66,7 +67,7 @@ build_targets()
 
 	[ -d "$cfgsdir" ] || $err "directory, $cfgsdir, does not exist"
 
-	listfile="$cfgsdir/build.list"
+	listfile="$datadir/build.list"
 	[ -f "$listfile" ] || $err "list file, $listfile, does not exist"
 
 	# Build for all targets if no argument is given

From 810ad480da6118075f2d1429d3d1218be837ccc1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 6 Jun 2024 02:43:27 +0100
Subject: [PATCH 0471/1549] move cfgsdir/datadir variables to lib.sh

it's also used from script/roms, in addition to trees

move these variables to a common file used everywhere

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 script/trees   | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 3ef3e3fe..410d9221 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -42,7 +42,7 @@ setvars()
 }
 
 eval "$(setvars "" xbmk_release tmpdir _nogit version board boarddir relname \
-    versiondate threads projectname projectsite aur_notice)"
+    versiondate threads projectname projectsite aur_notice cfgsdir datadir)"
 
 read -r projectname < projectname || :
 read -r projectsite < projectsite || :
diff --git a/script/trees b/script/trees
index d681a870..9fdb568f 100755
--- a/script/trees
+++ b/script/trees
@@ -9,9 +9,9 @@ set -u -e
 . "include/lib.sh"
 . "include/git.sh"
 
-eval "$(setvars "" xarch cfgsdir cdir config config_name xlang mode makeargs \
+eval "$(setvars "" xarch cdir config config_name xlang mode makeargs \
     listfile project target target_dir targets tree _f target1 bootstrapargs \
-    autoconfargs cmakedir elfdir autogenargs xtree datadir)"
+    autoconfargs cmakedir elfdir autogenargs xtree)"
 
 main()
 {

From 78f7e429ec1961da0e594a3172d95e0f5340e18c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 6 Jun 2024 02:45:09 +0100
Subject: [PATCH 0472/1549] move cbcfgsdir variable to vendor.sh

it's only ever used here

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh    | 1 -
 include/vendor.sh | 1 +
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 410d9221..67bc0f70 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -8,7 +8,6 @@ export LC_ALL=C
 
 tmpdir_was_set="y"
 cbdir="src/coreboot/default"
-cbcfgsdir="config/coreboot"
 ifdtool="cbutils/default/ifdtool"
 cbfstool="cbutils/default/cbfstool"
 tmpgit="$PWD/tmp/gitclone"
diff --git a/include/vendor.sh b/include/vendor.sh
index 53f8e9c6..57a8db48 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -13,6 +13,7 @@ uefiextract="$PWD/src/uefitool/uefiextract"
 nvmutil="util/nvmutil/nvm"
 vendir="vendorfiles"
 appdir="$vendir/app"
+cbcfgsdir="config/coreboot"
 
 eval "$(setvars "" _b EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \

From b8112af953e96e6f62f7d2e1cdce8a20f976fda2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 6 Jun 2024 02:49:38 +0100
Subject: [PATCH 0473/1549] git.sh: use singletree() to decide submodules

now it no longer hardcodes a check for whether the
project name is coreboot. this maintains the same
behaviour but will now work for other multi-tree
projects; in practise, the other multi-tree projects
did not use .gitmodules files anyway, but some of
them used config/submodules/ in our build system.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/git.sh b/include/git.sh
index ec1ecdd3..6c5c2718 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -88,7 +88,7 @@ git_prep()
 	git -C "$tmpgit" reset --hard $rev || $err "git -C $_loc: !reset $rev"
 	git_am_patches "$tmpgit" "$_patchdir" || $err "!am $_loc $_patchdir"
 
-	if [ "$project" != "coreboot" ] || [ $# -gt 2 ]; then
+	if singletree "$project" || [ $# -gt 2 ]; then
 		prep_submodules "$_loc"
 	fi
 

From 315fed5f48ceed270e29b313f383923cb6344002 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 6 Jun 2024 03:08:24 +0100
Subject: [PATCH 0474/1549] trees: handle build-test on multi-tree projects

for example, now flashprog binaries could be placed
in the elf/ directory, under elf/flashprog/

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/script/trees b/script/trees
index 9fdb568f..212bb665 100755
--- a/script/trees
+++ b/script/trees
@@ -36,6 +36,7 @@ main()
 	elfdir="elf/$project"
 	datadir="config/data/$project"
 	cfgsdir="config/$project"
+	listfile="$datadir/build.list" # needed on multi, optional on single
 
 	remkdir "${tmpgit%/*}"
 
@@ -52,12 +53,18 @@ build_projects()
 		eval "fetch_project_repo; return 0;"
 
 	load_project_config "$cfgsdir"
+	[ -f "$listfile" ] || listfile="" # optional on single-tree
+
+	dest_dir="$elfdir"
 
 	cdir="src/${project}"
 	[ -d "$cdir" ] || x_ ./update trees -f "$project"
 
 	[ "$mode" = "distclean" ] && mode="clean"
 	run_make_command || return 0
+
+	[ -n "$mode" ] || x_ mkdir -p "$elfdir"
+	[ -n "$mode" ] || copy_elf; return 0
 }
 
 build_targets()
@@ -66,8 +73,6 @@ build_targets()
 		elfdir="elf/coreboot_nopayload_DO_NOT_FLASH"
 
 	[ -d "$cfgsdir" ] || $err "directory, $cfgsdir, does not exist"
-
-	listfile="$datadir/build.list"
 	[ -f "$listfile" ] || $err "list file, $listfile, does not exist"
 
 	# Build for all targets if no argument is given
@@ -259,6 +264,8 @@ mkpayload_grub()
 
 copy_elf()
 {
+	[ -z "$listfile" ] && return 0
+
 	while read -r f; do
 		[ -f "$cdir/$f" ] && x_ cp "$cdir/$f" "$dest_dir"
 	done < "$listfile"

From 48cbb30db1f368229efb57fd78ad92f02e79533d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 6 Jun 2024 08:53:29 +0100
Subject: [PATCH 0475/1549] trees: also print "DONE! check elf/dir" on single

e.g. ./update trees -b flashprog

tell the user to check elf/flashprog

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index 212bb665..21f05e5d 100755
--- a/script/trees
+++ b/script/trees
@@ -43,6 +43,9 @@ main()
 	_cmd="build_projects"
 	singletree "$project" || _cmd="build_targets"
 	$_cmd $@
+
+	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
+	[ -z "$mode" ] && printf "\n\nDone! Check  %s/\n\n" "$elfdir"; return 0
 }
 
 build_projects()
@@ -94,9 +97,6 @@ handle_targets()
 		    [ "$target1" = "utils" ] || x_ ./vendor download $target
 		x_ handle_defconfig
 	done
-
-	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
-	[ -z "$mode" ] && printf "Done! Check  %s/\n\n" "$elfdir"; return 0
 }
 
 handle_defconfig()

From 176b936da277235bbcb6d9d1ef981f94f763245d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 6 Jun 2024 09:05:00 +0100
Subject: [PATCH 0476/1549] put flashprog builds in elf/flashprog/

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/flashprog/build.list | 1 +
 1 file changed, 1 insertion(+)
 create mode 100644 config/data/flashprog/build.list

diff --git a/config/data/flashprog/build.list b/config/data/flashprog/build.list
new file mode 100644
index 00000000..9c83bce7
--- /dev/null
+++ b/config/data/flashprog/build.list
@@ -0,0 +1 @@
+flashprog

From 8511615e1faba426be9df3857f34992e6024d8c1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 6 Jun 2024 09:05:16 +0100
Subject: [PATCH 0477/1549] put memtest86plus builds in elf/memtest86plus/

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/memtest86plus/build.list | 1 +
 script/roms                          | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)
 create mode 100644 config/data/memtest86plus/build.list

diff --git a/config/data/memtest86plus/build.list b/config/data/memtest86plus/build.list
new file mode 100644
index 00000000..3074d133
--- /dev/null
+++ b/config/data/memtest86plus/build.list
@@ -0,0 +1 @@
+build64/memtest.bin
diff --git a/script/roms b/script/roms
index ee48bc42..edf49e15 100755
--- a/script/roms
+++ b/script/roms
@@ -214,7 +214,7 @@ build_payloads()
 
 	[ -f "$cbfstool" ] || x_ ./update trees -b coreboot utils $tree
 
-	mt86bin="memtest86plus/build64/memtest.bin"
+	mt86bin="elf/memtest86plus/memtest.bin"
 	[ "$payload_memtest" != "y" ] || [ -f "src/$mt86bin" ] || \
 		x_ ./update trees -b memtest86plus
 

From 12774274782f461523593c2bfd99c914e949efd3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 6 Jun 2024 09:11:39 +0100
Subject: [PATCH 0478/1549] use correct memtest86plus path in script/roms

the previous change makes memtest.bin get cached in elf/
but the path was being prefixed with src/ by script/roms

do away with the prefix

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/script/roms b/script/roms
index edf49e15..f6c322e1 100755
--- a/script/roms
+++ b/script/roms
@@ -215,7 +215,7 @@ build_payloads()
 	[ -f "$cbfstool" ] || x_ ./update trees -b coreboot utils $tree
 
 	mt86bin="elf/memtest86plus/memtest.bin"
-	[ "$payload_memtest" != "y" ] || [ -f "src/$mt86bin" ] || \
+	[ "$payload_memtest" != "y" ] || [ -f "$mt86bin" ] || \
 		x_ ./update trees -b memtest86plus
 
 	[ "$payload_seabios" = "y" ] && x_ ./update trees -b seabios
@@ -283,7 +283,7 @@ build_roms()
 	x_ cp "$_cbrom" "$cbrom"
 
 	[ "$payload_memtest" != "y" ] || x_ "$cbfstool" "$cbrom" add-payload \
-	    -f "src/$mt86bin" -n img/memtest -c lzma
+	    -f "$mt86bin" -n img/memtest -c lzma
 	[ "$payload_seabios" = "y" ] && build_seabios_roms
 	[ "$payload_grub" != "y" ] || x_ build_grub_roms "$cbrom" "grub"
 	[ "$payload_uboot" = "y" ] || return 0

From 7e49fe4b9b931f6b0eb3d8ecb3e684daadac9131 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 6 Jun 2024 09:20:45 +0100
Subject: [PATCH 0479/1549] trees: skip single-tree build if a build exists

this replicates the same behaviour as multi-tree builds,
checking for files inside the relevant elf/ directory

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index 21f05e5d..c806b92a 100755
--- a/script/trees
+++ b/script/trees
@@ -59,6 +59,7 @@ build_projects()
 	[ -f "$listfile" ] || listfile="" # optional on single-tree
 
 	dest_dir="$elfdir"
+	elfcheck || return 0
 
 	cdir="src/${project}"
 	[ -d "$cdir" ] || x_ ./update trees -f "$project"
@@ -175,11 +176,17 @@ check_config()
 	[ -f "$config" ] || $err "check_config $project/$target: no config"
 
 	dest_dir="$elfdir/$target/$config_name"
+	elfcheck || return 1 # skip build if a previous one exists
+
+	x_ mkdir -p "$dest_dir"
+}
+
+elfcheck()
+{
 	# TODO: very hacky check. do it properly (based on build.list)
 	for elftest in "$dest_dir"/*; do
 		e "$elftest" f && return 1
 	done
-	x_ mkdir -p "$dest_dir"
 }
 
 handle_makefile()

From d1ba085153efadaef9bc124efd043c06658ab969 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 6 Jun 2024 21:33:22 +0100
Subject: [PATCH 0480/1549] fix build issue building coreboot utils

just run make directly. the trees script isn't really
designed to directly build directories, so don't.

nothing wrong with good old fashioned make -C

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 67bc0f70..f4214e27 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -157,7 +157,7 @@ check_defconfig()
 handle_coreboot_utils()
 {
 	for util in cbfstool ifdtool; do
-		x_ ./update trees $_f "src/coreboot/$1/util/$util"
+		x_ make -C "src/coreboot/$1/util/$util"
 		[ -z "$mode" ] && [ ! -f "cbutils/$1/$util" ] && \
 			x_ mkdir -p "cbutils/$1" && \
 			x_ cp "src/coreboot/$1/util/$util/$util" "cbutils/$1"

From c0822ac458fc7b0f2630c1cff208bd5066efbc6b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 6 Jun 2024 21:45:53 +0100
Subject: [PATCH 0481/1549] put coreboot utils in elf/, not cbutils/

one directory per util, under elf/

e.g. elf/cbfstool/

further split by tree name, e.g.:

elf/cbfstool/default/
elf/cbfstool/foo/

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .gitignore        |  1 -
 include/lib.sh    | 19 ++++++++++++-------
 include/vendor.sh |  8 ++++----
 script/roms       |  2 +-
 4 files changed, 17 insertions(+), 13 deletions(-)

diff --git a/.gitignore b/.gitignore
index d0b50fed..25c27d4c 100644
--- a/.gitignore
+++ b/.gitignore
@@ -2,7 +2,6 @@
 *.o
 /lbmk.err.log
 /docs/
-/cbutils/
 /pciroms/
 /util/dell-flash-unlock/dell_flash_unlock
 /TODO
diff --git a/include/lib.sh b/include/lib.sh
index f4214e27..eed75e2a 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -8,8 +8,8 @@ export LC_ALL=C
 
 tmpdir_was_set="y"
 cbdir="src/coreboot/default"
-ifdtool="cbutils/default/ifdtool"
-cbfstool="cbutils/default/cbfstool"
+ifdtool="elf/ifdtool/default/ifdtool"
+cbfstool="elf/cbfstool/default/cbfstool"
 tmpgit="$PWD/tmp/gitclone"
 grubdata="config/data/grub"
 err="err_"
@@ -157,11 +157,16 @@ check_defconfig()
 handle_coreboot_utils()
 {
 	for util in cbfstool ifdtool; do
-		x_ make -C "src/coreboot/$1/util/$util"
-		[ -z "$mode" ] && [ ! -f "cbutils/$1/$util" ] && \
-			x_ mkdir -p "cbutils/$1" && \
-			x_ cp "src/coreboot/$1/util/$util/$util" "cbutils/$1"
-		[ -z "$mode" ] || x_ rm -Rf "cbutils/$1"
+		utilelfdir="elf/$util/$1"
+		utilsrcdir="src/coreboot/$1/util/$util"
+
+		utilmode=""
+		[ -z "$mode" ] || utilmode="clean"
+		x_ make -C "$utilsrcdir" $utilmode
+		[ -z "$mode" ] && [ ! -f "$utilelfdir/$util" ] && \
+			x_ mkdir -p "$utilelfdir" && \
+			x_ cp "$utilsrcdir/$util" "elf/$util/$1"
+		[ -z "$mode" ] || x_ rm -Rf "$utilelfdir"
 	done
 }
 
diff --git a/include/vendor.sh b/include/vendor.sh
index 57a8db48..651766df 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -56,7 +56,7 @@ detect_firmware()
 
 	[ -z "$tree" ] && $err "detect_firmware $boarddir: tree undefined"
 	cbdir="src/coreboot/$tree"
-	cbfstool="cbutils/$tree/cbfstool"
+	cbfstool="elf/cbfstool/$tree/cbfstool"
 
 	mecleaner="$PWD/$cbdir/util/me_cleaner/me_cleaner.py"
 	kbc1126_ec_dump="$PWD/$cbdir/util/kbc1126/kbc1126_ec_dump"
@@ -80,7 +80,7 @@ build_dependencies_download()
 	[ ! -d "${kbc1126_ec_dump%/*}" ] || [ -f "$kbc1126_ec_dump" ] || x_ \
 	    make -C "$cbdir/util/kbc1126"
 	[ -n "$MRC_refcode_cbtree" ] && \
-		cbfstoolref="cbutils/$MRC_refcode_cbtree/cbfstool"
+		cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool"
 	[ -z "$cbfstoolref" ] || [ -f "$cbfstoolref" ] || \
 	    x_ ./update trees -b coreboot utils $MRC_refcode_cbtree
 	[ -f "$cbfstool" ] && [ -f "$ifdtool" ] && return 0
@@ -337,8 +337,8 @@ detect_board()
 build_dependencies_inject()
 {
 	cbdir="src/coreboot/$tree"
-	cbfstool="cbutils/$tree/cbfstool"
-	ifdtool="cbutils/$tree/ifdtool"
+	cbfstool="elf/cbfstool/$tree/cbfstool"
+	ifdtool="elf/ifdtool/$tree/ifdtool"
 	[ -d "$cbdir" ] || x_ ./update trees -f coreboot $tree
 	if [ ! -f "$cbfstool" ] || [ ! -f "$ifdtool" ]; then
 		x_ ./update trees -b coreboot utils $tree
diff --git a/script/roms b/script/roms
index f6c322e1..79b716ff 100755
--- a/script/roms
+++ b/script/roms
@@ -209,7 +209,7 @@ build_payloads()
 	romdir="bin/$board"
 	cbdir="src/coreboot/$board"
 	[ "$board" = "$tree" ] || cbdir="src/coreboot/$tree"
-	cbfstool="cbutils/$tree/cbfstool"
+	cbfstool="elf/cbfstool/$tree/cbfstool"
 	cbrom="$cbdir/build/coreboot.rom"
 
 	[ -f "$cbfstool" ] || x_ ./update trees -b coreboot utils $tree

From d41658f17ec7c0bc62d0ac3e46ea2928f8bfdaf3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 6 Jun 2024 22:17:16 +0100
Subject: [PATCH 0482/1549] move handle_coreboot_utils to script/trees

it doesn't really make sense placed in lib.sh,
because it's only called from script/trees

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 16 ----------------
 script/trees   | 18 +++++++++++++++++-
 2 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index eed75e2a..4ae4ad5b 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -154,22 +154,6 @@ check_defconfig()
 	done
 }
 
-handle_coreboot_utils()
-{
-	for util in cbfstool ifdtool; do
-		utilelfdir="elf/$util/$1"
-		utilsrcdir="src/coreboot/$1/util/$util"
-
-		utilmode=""
-		[ -z "$mode" ] || utilmode="clean"
-		x_ make -C "$utilsrcdir" $utilmode
-		[ -z "$mode" ] && [ ! -f "$utilelfdir/$util" ] && \
-			x_ mkdir -p "$utilelfdir" && \
-			x_ cp "$utilsrcdir/$util" "elf/$util/$1"
-		[ -z "$mode" ] || x_ rm -Rf "$utilelfdir"
-	done
-}
-
 remkdir()
 {
 	rm -Rf "$1" || $err "remkdir: !rm -Rf \"$1\""
diff --git a/script/trees b/script/trees
index c806b92a..36cf48e4 100755
--- a/script/trees
+++ b/script/trees
@@ -105,7 +105,7 @@ handle_defconfig()
 	handle_src_tree "$target" || return 0
 
 	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && \
-		eval "handle_coreboot_utils \"$tree\"; return 0"
+		eval "check_coreboot_utils \"$tree\"; return 0"
 
 	for y in "$target_dir/config"/*; do
 		[ -f "$y" ] || continue
@@ -171,6 +171,22 @@ check_cross_compiler()
 	done
 }
 
+check_coreboot_utils()
+{
+	for util in cbfstool ifdtool; do
+		utilelfdir="elf/$util/$1"
+		utilsrcdir="src/coreboot/$1/util/$util"
+
+		utilmode=""
+		[ -z "$mode" ] || utilmode="clean"
+		x_ make -C "$utilsrcdir" $utilmode
+		[ -z "$mode" ] && [ ! -f "$utilelfdir/$util" ] && \
+			x_ mkdir -p "$utilelfdir" && \
+			x_ cp "$utilsrcdir/$util" "elf/$util/$1"
+		[ -z "$mode" ] || x_ rm -Rf "$utilelfdir"
+	done
+}
+
 check_config()
 {
 	[ -f "$config" ] || $err "check_config $project/$target: no config"

From a7889c5af8aba4378d3bbf84f923371d3cc01617 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 6 Jun 2024 22:20:09 +0100
Subject: [PATCH 0483/1549] trees: use multiple threads to build cbutils

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index 36cf48e4..52906582 100755
--- a/script/trees
+++ b/script/trees
@@ -179,7 +179,7 @@ check_coreboot_utils()
 
 		utilmode=""
 		[ -z "$mode" ] || utilmode="clean"
-		x_ make -C "$utilsrcdir" $utilmode
+		x_ make -C "$utilsrcdir" $utilmode -j$threads
 		[ -z "$mode" ] && [ ! -f "$utilelfdir/$util" ] && \
 			x_ mkdir -p "$utilelfdir" && \
 			x_ cp "$utilsrcdir/$util" "elf/$util/$1"

From d0f99c2f98555e2ac1caea1a7f5ac04651d80ee1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 6 Jun 2024 22:21:59 +0100
Subject: [PATCH 0484/1549] trees: unified coreboot makeargs

in particular, the coreboot build system may auto-download
submodules when building cbfstool; vboot for instance.

we do not want such unpredictable behaviour, so now we
use UPDATED_SUBMODULES=1 when building coreboot utilities.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/script/trees b/script/trees
index 52906582..5c473970 100755
--- a/script/trees
+++ b/script/trees
@@ -9,6 +9,7 @@ set -u -e
 . "include/lib.sh"
 . "include/git.sh"
 
+cbmakeargs="UPDATED_SUBMODULES=1 CPUS=$threads"
 eval "$(setvars "" xarch cdir config config_name xlang mode makeargs \
     listfile project target target_dir targets tree _f target1 bootstrapargs \
     autoconfargs cmakedir elfdir autogenargs xtree)"
@@ -166,8 +167,7 @@ check_cross_compiler()
 		[ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
 
 		[ -d "$cbdir/util/crossgcc/xgcc/$_xarch/" ] && continue
-		x_ make -C "$cbdir" crossgcc-${_xarch%-*} CPUS=$threads \
-		    UPDATED_SUBMODULES=1
+		x_ make -C "$cbdir" crossgcc-${_xarch%-*} $cbmakeargs
 	done
 }
 
@@ -179,7 +179,7 @@ check_coreboot_utils()
 
 		utilmode=""
 		[ -z "$mode" ] || utilmode="clean"
-		x_ make -C "$utilsrcdir" $utilmode -j$threads
+		x_ make -C "$utilsrcdir" $utilmode -j$threads $cbmakeargs
 		[ -z "$mode" ] && [ ! -f "$utilelfdir/$util" ] && \
 			x_ mkdir -p "$utilelfdir" && \
 			x_ cp "$utilsrcdir/$util" "elf/$util/$1"
@@ -232,7 +232,7 @@ run_make_command()
 
 	[ "$project" = "coreboot" ] && [ -z "$mode" ] && x_ \
 		printf "%s\n" "${version%%-*}" > "$cdir/.coreboot-version" \
-		    && makeargs="$makeargs UPDATED_SUBMODULES=1 CPUS=$threads"
+		    && makeargs="$makeargs $cbmakeargs"
 
 	make -C "$cdir" $mode -j$threads $makeargs || $err "!mk $cdir $mode"
 

From 099ee3f4a10494f038e1ef8af313b93b593d9405 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 00:22:48 +0100
Subject: [PATCH 0485/1549] config/git: use "depend" for serprog dependencies

this brings the handling of serprog projects in sync
with canoeboot, which relies on the "depend" variable
to get the needed submodules, because cbmk does not
download submodules for these projects

lbmk does download submodules. i want it in sync with
cbmk for this, to make merging easier between both
projects, because i'm going to make a change on both
projects, whereby config/submodules/ is used exclusively

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/pico-serprog   | 8 ++++++++
 config/git/stm32-vserprog | 8 ++++++++
 2 files changed, 16 insertions(+)

diff --git a/config/git/pico-serprog b/config/git/pico-serprog
index 6d46566b..2b07f750 100644
--- a/config/git/pico-serprog
+++ b/config/git/pico-serprog
@@ -4,4 +4,12 @@
 	url: https://codeberg.org/libreboot/pico-serprog
 	bkup_url: https://git.disroot.org/libreboot/pico-serprog
 	depend: pico-sdk
+	depend: rpi-pico-tinyusb
+}
+
+{rpi-pico-tinyusb}{
+	rev: 86c416d4c0fb38432460b3e11b08b9de76941bf5
+	loc: pico-sdk/lib/tinyusb
+	url: https://codeberg.org/libreboot/tinyusb
+	bkup_url: https://github.com/hathach/tinyusb.git
 }
diff --git a/config/git/stm32-vserprog b/config/git/stm32-vserprog
index 37e901fc..3fc3b869 100644
--- a/config/git/stm32-vserprog
+++ b/config/git/stm32-vserprog
@@ -3,4 +3,12 @@
 	loc: stm32-vserprog
 	url: https://codeberg.org/libreboot/stm32-vserprog
 	bkup_url: https://git.disroot.org/libreboot/stm32-vserprog
+	depend: libopencm3
+}
+
+{libopencm3}{
+	rev: 458250dc6147dc807eec9e4d5a6caf38a699ecb1
+	loc: stm32-vserprog/libopencm3
+	url: https://codeberg.org/libreboot/libopencm3
+	bkup_url: https://github.com/libopencm3/libopencm3
 }

From d9b9f6db75adec714266e754e962e50742ee4d0e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 00:38:51 +0100
Subject: [PATCH 0486/1549] add tinyusb to config/submodule/ for pico-sdk

don't define it as a "depend" variable in config/git/,
because it means putting the files in a subdirectory of
an existing project was was already then downloaded, and
that means it can't be downloaded first; if the download
of it fails, the old download is left intact.

this bug isn't currently fixed in the build system, at all,
so this and other patches are being made to mitigate it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/pico-serprog                      | 8 --------
 config/submodule/pico-sdk/module.list        | 1 +
 config/submodule/pico-sdk/tinyusb/module.cfg | 3 +++
 3 files changed, 4 insertions(+), 8 deletions(-)
 create mode 100644 config/submodule/pico-sdk/module.list
 create mode 100644 config/submodule/pico-sdk/tinyusb/module.cfg

diff --git a/config/git/pico-serprog b/config/git/pico-serprog
index 2b07f750..6d46566b 100644
--- a/config/git/pico-serprog
+++ b/config/git/pico-serprog
@@ -4,12 +4,4 @@
 	url: https://codeberg.org/libreboot/pico-serprog
 	bkup_url: https://git.disroot.org/libreboot/pico-serprog
 	depend: pico-sdk
-	depend: rpi-pico-tinyusb
-}
-
-{rpi-pico-tinyusb}{
-	rev: 86c416d4c0fb38432460b3e11b08b9de76941bf5
-	loc: pico-sdk/lib/tinyusb
-	url: https://codeberg.org/libreboot/tinyusb
-	bkup_url: https://github.com/hathach/tinyusb.git
 }
diff --git a/config/submodule/pico-sdk/module.list b/config/submodule/pico-sdk/module.list
new file mode 100644
index 00000000..6b4010a6
--- /dev/null
+++ b/config/submodule/pico-sdk/module.list
@@ -0,0 +1 @@
+lib/tinyusb
diff --git a/config/submodule/pico-sdk/tinyusb/module.cfg b/config/submodule/pico-sdk/tinyusb/module.cfg
new file mode 100644
index 00000000..68798daa
--- /dev/null
+++ b/config/submodule/pico-sdk/tinyusb/module.cfg
@@ -0,0 +1,3 @@
+subrev="86c416d4c0fb38432460b3e11b08b9de76941bf5"
+subrepo="https://codeberg.org/libreboot/tinyusb"
+subrepo_bkup="https://github.com/hathach/tinyusb.git"

From bff756281976ea32284561885e0b8ac5e77de085 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 00:47:06 +0100
Subject: [PATCH 0487/1549] libopencm3 to config/submodules/ on stm32-vserprog

same as the previous patch, we must no longer use "define"
variables in config/git/ when the path is a subdirectory of
a given project, because it means that the download can only
happen after the main one, and currently if that fails, the
download of the main repo would remain intact, breaking future
builds in ways that we can't control - to be clear, it could
be controlled, but with added code complexity in the build
system, so:

put it in config/submodules/

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/stm32-vserprog                             | 8 --------
 config/submodule/stm32-vserprog/libopencm3/module.cfg | 3 +++
 config/submodule/stm32-vserprog/module.list           | 1 +
 3 files changed, 4 insertions(+), 8 deletions(-)
 create mode 100644 config/submodule/stm32-vserprog/libopencm3/module.cfg
 create mode 100644 config/submodule/stm32-vserprog/module.list

diff --git a/config/git/stm32-vserprog b/config/git/stm32-vserprog
index 3fc3b869..37e901fc 100644
--- a/config/git/stm32-vserprog
+++ b/config/git/stm32-vserprog
@@ -3,12 +3,4 @@
 	loc: stm32-vserprog
 	url: https://codeberg.org/libreboot/stm32-vserprog
 	bkup_url: https://git.disroot.org/libreboot/stm32-vserprog
-	depend: libopencm3
-}
-
-{libopencm3}{
-	rev: 458250dc6147dc807eec9e4d5a6caf38a699ecb1
-	loc: stm32-vserprog/libopencm3
-	url: https://codeberg.org/libreboot/libopencm3
-	bkup_url: https://github.com/libopencm3/libopencm3
 }
diff --git a/config/submodule/stm32-vserprog/libopencm3/module.cfg b/config/submodule/stm32-vserprog/libopencm3/module.cfg
new file mode 100644
index 00000000..b8c46854
--- /dev/null
+++ b/config/submodule/stm32-vserprog/libopencm3/module.cfg
@@ -0,0 +1,3 @@
+subrev="458250dc6147dc807eec9e4d5a6caf38a699ecb1"
+subrepo="https://codeberg.org/libreboot/libopencm3"
+subrepo_bkup="https://github.com/libopencm3/libopencm3"
diff --git a/config/submodule/stm32-vserprog/module.list b/config/submodule/stm32-vserprog/module.list
new file mode 100644
index 00000000..f14cc1fa
--- /dev/null
+++ b/config/submodule/stm32-vserprog/module.list
@@ -0,0 +1 @@
+libopencm3

From 3bd562a2659e1844a7ecb84a8377eb03332b9e1e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 01:01:44 +0100
Subject: [PATCH 0488/1549] define mdfiles/images in config/submodules/docs/

again: the "depend" variable must never be used for subprojects
that point to a subdirectory of the main project, because there's
no clean way of handling this in case of error conditions.

make it a submodule under config/submodules/. this is for the
documentation, including static site generator documentation,
and image files (photos).

as of this revision, there are now only those "depend" projects
defined in config/git/, where the destination directory of the
subject is not a subdirectory of the main project, so:

in a subsequest revision, i will mitigate an existing bug whereby
failure of the dependency project leaves the main one still
intact, breaking builds; this revision enables that to be done.

from now on, subproject-to-subdirectory-of-main-project will
be avoided in config/git/; config/submodules/ will be used.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/docs                           | 24 -----------------------
 config/submodule/docs/html/module.cfg     |  3 +++
 config/submodule/docs/img/module.cfg      |  3 +++
 config/submodule/docs/module.list         |  3 +++
 config/submodule/docs/untitled/module.cfg |  3 +++
 5 files changed, 12 insertions(+), 24 deletions(-)
 create mode 100644 config/submodule/docs/html/module.cfg
 create mode 100644 config/submodule/docs/img/module.cfg
 create mode 100644 config/submodule/docs/module.list
 create mode 100644 config/submodule/docs/untitled/module.cfg

diff --git a/config/git/docs b/config/git/docs
index 2778b343..22892a21 100644
--- a/config/git/docs
+++ b/config/git/docs
@@ -3,28 +3,4 @@
 	loc: docs
 	url: https://codeberg.org/vimuser/untitled
 	bkup_url: https://notabug.org/untitled/untitled
-	depend: mdfiles
-	depend: untitledwww
-}
-
-{mdfiles}{
-	rev: 20fd775c855428ecff647a42823746863fd57efe
-	loc: docs/www/html
-	url: https://codeberg.org/libreboot/lbwww
-	bkup_url: https://git.disroot.org/libreboot/lbwww
-	depend: imgfiles
-}
-
-{imgfiles}{
-	rev: 625bb7535d388a235bec47a8ce822cda10b53692
-	loc: docs/www/html/site/img
-	url: https://codeberg.org/libreboot/lbwww-img
-	bkup_url: https://git.disroot.org/libreboot/lbwww-img
-}
-
-{untitledwww}{
-	rev: d8e2043c1512eb1171c274559ce82e8093ef393f
-	loc: docs/www/untitled
-	url: https://codeberg.org/vimuser/untitled-website
-	bkup_url: https://notabug.org/untitled/untitled-website
 }
diff --git a/config/submodule/docs/html/module.cfg b/config/submodule/docs/html/module.cfg
new file mode 100644
index 00000000..0c5ee4cd
--- /dev/null
+++ b/config/submodule/docs/html/module.cfg
@@ -0,0 +1,3 @@
+subrev="20fd775c855428ecff647a42823746863fd57efe"
+subrepo="https://codeberg.org/libreboot/lbwww"
+subrepo_bkup="https://git.disroot.org/libreboot/lbwww"
diff --git a/config/submodule/docs/img/module.cfg b/config/submodule/docs/img/module.cfg
new file mode 100644
index 00000000..82bcf8b1
--- /dev/null
+++ b/config/submodule/docs/img/module.cfg
@@ -0,0 +1,3 @@
+subrev="625bb7535d388a235bec47a8ce822cda10b53692"
+subrepo="https://codeberg.org/libreboot/lbwww-img"
+subrepo_bkup="https://git.disroot.org/libreboot/lbwww-img"
diff --git a/config/submodule/docs/module.list b/config/submodule/docs/module.list
new file mode 100644
index 00000000..1ad2aecb
--- /dev/null
+++ b/config/submodule/docs/module.list
@@ -0,0 +1,3 @@
+www/untitled
+www/html
+www/html/site/img
diff --git a/config/submodule/docs/untitled/module.cfg b/config/submodule/docs/untitled/module.cfg
new file mode 100644
index 00000000..5608c457
--- /dev/null
+++ b/config/submodule/docs/untitled/module.cfg
@@ -0,0 +1,3 @@
+subrev="d8e2043c1512eb1171c274559ce82e8093ef393f"
+subrepo="https://codeberg.org/vimuser/untitled-website"
+subrepo_bkup="https://notabug.org/untitled/untitled-website"

From dea41f138a0802d73da118c0f17cf50d3d66ea1e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 10:31:01 +0100
Subject: [PATCH 0489/1549] trees: don't do elfcheck if build.list missing

otherwise, some checks are done too soon, and nothing
gets built.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index 5c473970..45d2a35e 100755
--- a/script/trees
+++ b/script/trees
@@ -60,7 +60,7 @@ build_projects()
 	[ -f "$listfile" ] || listfile="" # optional on single-tree
 
 	dest_dir="$elfdir"
-	elfcheck || return 0
+	[ ! -f "$listfile" ] || elfcheck || return 0
 
 	cdir="src/${project}"
 	[ -d "$cdir" ] || x_ ./update trees -f "$project"

From 06c78e1321736ed135c01d5ae11e3e0a47887137 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 10:32:39 +0100
Subject: [PATCH 0490/1549] trees: don't say check elf/ if build.list missing

(on single tree projects. this complements the last patch)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/script/trees b/script/trees
index 45d2a35e..34397edd 100755
--- a/script/trees
+++ b/script/trees
@@ -46,6 +46,8 @@ main()
 	$_cmd $@
 
 	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
+
+	[ -f "$listfile" ] || return 0
 	[ -z "$mode" ] && printf "\n\nDone! Check  %s/\n\n" "$elfdir"; return 0
 }
 
@@ -68,6 +70,7 @@ build_projects()
 	[ "$mode" = "distclean" ] && mode="clean"
 	run_make_command || return 0
 
+	[ -f "$listfile" ] || return 0
 	[ -n "$mode" ] || x_ mkdir -p "$elfdir"
 	[ -n "$mode" ] || copy_elf; return 0
 }

From 7aa9f2240979950f88a3e686b765499be1e10ea6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 10:35:38 +0100
Subject: [PATCH 0491/1549] trees: fix listfile check in copy_elf()

don't check that the variable is empty

check that the file itself exists or not

this should fix the recent build issues

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index 34397edd..98bef371 100755
--- a/script/trees
+++ b/script/trees
@@ -290,7 +290,7 @@ mkpayload_grub()
 
 copy_elf()
 {
-	[ -z "$listfile" ] && return 0
+	[ -f "$listfile" ] || return 0
 
 	while read -r f; do
 		[ -f "$cdir/$f" ] && x_ cp "$cdir/$f" "$dest_dir"

From 0b7566cb7876500fdd4e6441c23f8cf68562ea0b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 11:20:45 +0100
Subject: [PATCH 0492/1549] trees: fix build issue caused by bad elf check

we're not checking for bad elfs, but the check itself was bad

due to a quirk in how sh works. really, really obscure bug.

fixed now!

if the given directory didn't actually exist, or there were no
files in it, it'd be searching for the file named "*"

which is obviously wrong

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 1 +
 1 file changed, 1 insertion(+)

diff --git a/script/trees b/script/trees
index 98bef371..48e2b6fa 100755
--- a/script/trees
+++ b/script/trees
@@ -204,6 +204,7 @@ elfcheck()
 {
 	# TODO: very hacky check. do it properly (based on build.list)
 	for elftest in "$dest_dir"/*; do
+		[ -e "$elftest" ] || continue
 		e "$elftest" f && return 1
 	done
 }

From 7bfb1d621fc63559dbe4cbe5e938836006d27f16 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 12:04:28 +0100
Subject: [PATCH 0493/1549] trees: don't check empty path in copy_elf()

it could lead to some whackiness later on

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 1 +
 1 file changed, 1 insertion(+)

diff --git a/script/trees b/script/trees
index 48e2b6fa..9cceeab4 100755
--- a/script/trees
+++ b/script/trees
@@ -291,6 +291,7 @@ mkpayload_grub()
 
 copy_elf()
 {
+	[ -n "$listfile" ] || return 0
 	[ -f "$listfile" ] || return 0
 
 	while read -r f; do

From 137321ebc0be7f4f79c7c48ebd6d49f945067849 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 12:50:16 +0100
Subject: [PATCH 0494/1549] lib.sh: rename variable for clarity

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 4ae4ad5b..39d3bc99 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -220,8 +220,8 @@ e()
 # e.g. coreboot is multi-tree, so 1
 singletree()
 {
-	for pdir in "config/${1}/"*/target.cfg; do
-		[ ! -e "$pdir" ] && continue
-		[ -f "$pdir" ] && return 1
+	for targetfile in "config/${1}/"*/target.cfg; do
+		[ ! -e "$targetfile" ] && continue
+		[ -f "$targetfile" ] && return 1
 	done
 }

From 9c1ea8f93ac08a0a0aac5e0f71564a376151859e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 12:50:55 +0100
Subject: [PATCH 0495/1549] git.sh: *never* run git submodule update

only use config/submodules/ which the build system then
uses to run git clones manually, replicating the submodules
feature. we must never use a project's own gitmodules feature,
because we can't easily control it. better to let it break first,
and then figure out what modules to add manually, so that we
have only what we need for each project.

it's done this way, because git's own submodules feature
doesn't have very good error checking in general, nor
does it have good redundancy.

with the current design, we can declare backup repositories
for each submodule.

we replicate it precisely. for example:

3rdparty/vboot

this is a coreboot submodule, and we handle that in the
coreboot trees.

however, our current design also allows you to do this even
if the upstream repository does not contain a .gitmodules file

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 6c5c2718..8af1f0d5 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -109,9 +109,6 @@ prep_submodules()
 	if [ -f "$mdir/module.list" ]; then
 		cat "$mdir/module.list" > "$tmpdir/modules" || \
 		    $err "!cp $mdir/module.list $tmpdir/modules"
-	elif [ -f "$tmpgit/.gitmodules" ]; then
-		git -C "$tmpgit" submodule status | awk '{print $2}' > \
-		    "$tmpdir/modules" || $err "$mdir: cannot list submodules"
 	else
 		return 0
 	fi
@@ -141,9 +138,6 @@ fetch_submodule()
 			[ -d "$tmpgit/$1" ] && break
 		done
 		[ -d "$tmpgit/$1" ] || $err "!clone $mod $project $mcfgdir $1"
-	else
-		git -C "$tmpgit" submodule update --init --checkout -- "$1" \
-		    || $err "$mdir: !update $1"
 	fi
 }
 

From 11c47ba7dd76f013f34429ff7b44f0a07ed40211 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 12:55:30 +0100
Subject: [PATCH 0496/1549] git.sh: reduced indentation in prep_submodules

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 8af1f0d5..7f4af0c4 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -106,12 +106,10 @@ prep_submodules()
 	mdir="$PWD/config/submodule/$project"
 	[ -n "$tree" ] && mdir="$mdir/$tree"
 
-	if [ -f "$mdir/module.list" ]; then
-		cat "$mdir/module.list" > "$tmpdir/modules" || \
-		    $err "!cp $mdir/module.list $tmpdir/modules"
-	else
-		return 0
-	fi
+	[ -f "$mdir/module.list" ] || return 0
+
+	cat "$mdir/module.list" > "$tmpdir/modules" || \
+	    $err "!cp $mdir/module.list $tmpdir/modules"
 
 	while read -r msrcdir; do
 		fetch_submodule "$msrcdir"

From a4549e935e29ec8635b9737497d49adc98e2a3d3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 12:58:28 +0100
Subject: [PATCH 0497/1549] git.sh: reduced indentation in fetch_submodule

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 21 ++++++++++-----------
 1 file changed, 10 insertions(+), 11 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 7f4af0c4..17333a86 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -125,18 +125,17 @@ fetch_submodule()
 	[ ! -f "$mcfgdir/module.cfg" ] || . "$mcfgdir/module.cfg" || \
 	    $err "! . $mcfgdir/module.cfg"
 
-	if [ -n "$subrepo" ] || [ -n "$subrepo_bkup" ]; then
-		[ -n "$subrev" ] || $err "$1, $mdir: subrev not defined"
+	[ -n "$subrepo" ] || [ -n "$subrepo_bkup" ] || return 0
+	[ -n "$subrev" ] || $err "$1, $mdir: subrev not defined"
 
-		rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
-		for mod in "$subrepo" "$subrepo_bkup"; do
-			[ -z "$mod" ] && continue
-			git clone "$mod" "$tmpgit/$1" || rm -Rf "$tmpgit/$1" \
-			    || $err "!rm $mod $project $cfgdir $1"
-			[ -d "$tmpgit/$1" ] && break
-		done
-		[ -d "$tmpgit/$1" ] || $err "!clone $mod $project $mcfgdir $1"
-	fi
+	rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
+	for mod in "$subrepo" "$subrepo_bkup"; do
+		[ -z "$mod" ] && continue
+		git clone "$mod" "$tmpgit/$1" || rm -Rf "$tmpgit/$1" \
+		    || $err "!rm $mod $project $cfgdir $1"
+		[ -d "$tmpgit/$1" ] && break
+	done
+	[ -d "$tmpgit/$1" ] || $err "!clone $mod $project $mcfgdir $1"
 }
 
 patch_submodule()

From d43247683b49e24bd01da6ac9b9676b6b0689568 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 14:16:58 +0100
Subject: [PATCH 0498/1549] git.sh: download "depend" projects *before*

don't do it after, because that means the main project
is saved under src/ before we know whether the subrepo
was downloaded.

the "depend" variable (in config/git/) is no longer used
for projects that go in subdirectories of a parent; now,
we use config/submodules/ for this type of dependency.

download the "depend" projects (as per config/git/) first.
this way, if they fail, the main one will fail, but if
they succeed and main fails, you can just run the main
download again and it won't fail.

this fixes a bug where, depending on how you download a
set of projects and depending on the order which you do so,
a given project can become un-downloadable on current design,
because git will complain that a directory already exists.

this fix is done not only in code (by this commit), but
by prior configuration changes.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 6 +++---
 script/trees   | 2 --
 2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 17333a86..2ebefc71 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -57,11 +57,10 @@ fetch_project_repo()
 	[ -z "${loc+x}" ] && $err "fetch_project_repo $project: loc not set"
 	[ -z "${url+x}" ] && $err "fetch_project_repo $project: url not set"
 
-	clone_project
 	[ -z "$depend" ] || for d in $depend ; do
 		x_ ./update trees -f $d
 	done
-	rm -Rf "$tmpgit" || $err "fetch_repo: !rm -Rf $tmpgit"
+	clone_project
 
 	for x in config/git/*; do
 		[ -f "$x" ] && nuke "${x##*/}" "src/${x##*/}"; continue
@@ -74,6 +73,8 @@ clone_project()
 	loc="src/$loc"
 	e "$loc" d && return 0
 
+	remkdir "${tmpgit%/*}"
+
 	git clone $url "$tmpgit" || git clone $bkup_url "$tmpgit" \
 	    || $err "clone_project: could not download $project"
 	git_prep "$PWD/config/$project/patches" "$loc"
@@ -107,7 +108,6 @@ prep_submodules()
 	[ -n "$tree" ] && mdir="$mdir/$tree"
 
 	[ -f "$mdir/module.list" ] || return 0
-
 	cat "$mdir/module.list" > "$tmpdir/modules" || \
 	    $err "!cp $mdir/module.list $tmpdir/modules"
 
diff --git a/script/trees b/script/trees
index 9cceeab4..faaddc5f 100755
--- a/script/trees
+++ b/script/trees
@@ -39,8 +39,6 @@ main()
 	cfgsdir="config/$project"
 	listfile="$datadir/build.list" # needed on multi, optional on single
 
-	remkdir "${tmpgit%/*}"
-
 	_cmd="build_projects"
 	singletree "$project" || _cmd="build_targets"
 	$_cmd $@

From 4b1b1f5098d9be3b14a2e1e4c01315ee756ce40b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 14:21:31 +0100
Subject: [PATCH 0499/1549] git.sh: provide feedback for repository downloads

otherwise, it's not clear to the operator what's happening

i'm normally against such verbose feedback, because it's bloat,
but this minimal amount of feedback will make the build system
more pleasant to use, especially during testing.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/git.sh b/include/git.sh
index 2ebefc71..4d2e9c07 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -58,6 +58,8 @@ fetch_project_repo()
 	[ -z "${url+x}" ] && $err "fetch_project_repo $project: url not set"
 
 	[ -z "$depend" ] || for d in $depend ; do
+		printf "'%s' needs dependency '%s'; grabbing '%s' now\n" \
+		    "$project" "$d" "$d"
 		x_ ./update trees -f $d
 	done
 	clone_project
@@ -71,6 +73,8 @@ clone_project()
 {
 	loc="${loc#src/}"
 	loc="src/$loc"
+
+	printf "Downloading project '%s' to '%s'\n" "$project" "$loc"
 	e "$loc" d && return 0
 
 	remkdir "${tmpgit%/*}"

From 3eef7f37f293e804560e1a7f3a76a46e707f4775 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 14:40:59 +0100
Subject: [PATCH 0500/1549] git.sh: simplify submodule handling

there were stragglers remaining, from when we used to
actually run "git submodule update", but this was removed.

clean up the submodule functions and merge them together.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 23 ++++++++---------------
 1 file changed, 8 insertions(+), 15 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 4d2e9c07..c723fec0 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -117,7 +117,6 @@ prep_submodules()
 
 	while read -r msrcdir; do
 		fetch_submodule "$msrcdir"
-		patch_submodule "$msrcdir"
 	done < "$tmpdir/modules"
 }
 
@@ -129,22 +128,16 @@ fetch_submodule()
 	[ ! -f "$mcfgdir/module.cfg" ] || . "$mcfgdir/module.cfg" || \
 	    $err "! . $mcfgdir/module.cfg"
 
-	[ -n "$subrepo" ] || [ -n "$subrepo_bkup" ] || return 0
-	[ -n "$subrev" ] || $err "$1, $mdir: subrev not defined"
+	[ -z "$subrepo" ] && [ -z "$subrepo_bkup" ] && return 0
+
+	for mvar in subrepo subrepo_bkup subrev; do
+		eval "[ -n \"\$$mvar\" ] || $err \"$1, $mdir: $mvar unset\""
+	done
 
 	rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
-	for mod in "$subrepo" "$subrepo_bkup"; do
-		[ -z "$mod" ] && continue
-		git clone "$mod" "$tmpgit/$1" || rm -Rf "$tmpgit/$1" \
-		    || $err "!rm $mod $project $cfgdir $1"
-		[ -d "$tmpgit/$1" ] && break
-	done
-	[ -d "$tmpgit/$1" ] || $err "!clone $mod $project $mcfgdir $1"
-}
-
-patch_submodule()
-{
-	[ -z "$subrev" ] || git -C "$tmpgit/$1" reset --hard "$subrev" || \
+	git clone $subrepo "$tmpgit/$1" || git clone $subrepo_bkup \
+	    "$tmpgit/$1" || $err "clone_project: could not download $project"
+	git -C "$tmpgit/$1" reset --hard "$subrev" || \
 	    $err "$mdir $1: cannot reset git revision"
 
 	git_am_patches "$tmpgit/$1" "$mdir/${1##*/}/patches"

From 668bcbf69cbc250a49134056c1bf870af62e36e1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 15:02:32 +0100
Subject: [PATCH 0501/1549] trees: simplified copy_elf() handling

don't create elfdir, create dest_dir, which is elfdir
plus the location within it

only create dest_dir within copy_elf, which is only
called if actually compiling the code

this avoids creating empty elf directories, and it
generally cleans up all handling, unifying the
handling of directories into a single function,
namely copy_elf() which already exists

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index faaddc5f..e413f610 100755
--- a/script/trees
+++ b/script/trees
@@ -68,8 +68,6 @@ build_projects()
 	[ "$mode" = "distclean" ] && mode="clean"
 	run_make_command || return 0
 
-	[ -f "$listfile" ] || return 0
-	[ -n "$mode" ] || x_ mkdir -p "$elfdir"
 	[ -n "$mode" ] || copy_elf; return 0
 }
 
@@ -87,7 +85,6 @@ build_targets()
 	targets="$(items "$cfgsdir")" || $err "Can't get options for $cfgsdir"
 	[ $# -gt 0 ] && targets=$@
 
-	[ -z "$mode" ] && x_ mkdir -p "$elfdir"
 	handle_targets
 }
 
@@ -292,6 +289,8 @@ copy_elf()
 	[ -n "$listfile" ] || return 0
 	[ -f "$listfile" ] || return 0
 
+	x_ mkdir -p "$dest_dir"
+
 	while read -r f; do
 		[ -f "$cdir/$f" ] && x_ cp "$cdir/$f" "$dest_dir"
 	done < "$listfile"

From acd3608bb124eb9fe29b015591c4b0c83655be3c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 16:15:26 +0100
Subject: [PATCH 0502/1549] git.sh: unified handling of git clone/reset/am

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 34 +++++++++++++++-------------------
 1 file changed, 15 insertions(+), 19 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index c723fec0..3e326255 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -43,9 +43,8 @@ prepare_new_tree()
 {
 	printf "Creating %s tree %s (%s)\n" "$project" "$tree" "$_target"
 
-	cp -R "src/$project/$project" "$tmpgit" || \
-	    $err "prepare_new_tree $project/$tree: can't make tmpclone"
-	git_prep "$PWD/$cfgsdir/$tree/patches" "src/$project/$tree" "update"
+	git_prep "src/$project/$project" "src/$project/$project" \
+	    "$PWD/$cfgsdir/$tree/patches" "src/$project/$tree" "update"
 	nuke "$project/$tree" "$project/$tree"
 }
 
@@ -78,22 +77,18 @@ clone_project()
 	e "$loc" d && return 0
 
 	remkdir "${tmpgit%/*}"
-
-	git clone $url "$tmpgit" || git clone $bkup_url "$tmpgit" \
-	    || $err "clone_project: could not download $project"
-	git_prep "$PWD/config/$project/patches" "$loc"
+	git_prep "$url" "$bkup_url" "$PWD/config/$project/patches" "$loc"
 }
 
 git_prep()
 {
-	_patchdir="$1"
-	_loc="$2"
+	_patchdir="$3" # $1 and $2 are gitrepo and gitrepo_backup
+	_loc="$4"
 
 	[ -z "${rev+x}" ] && $err "git_prep $_loc: rev not set"
-	git -C "$tmpgit" reset --hard $rev || $err "git -C $_loc: !reset $rev"
-	git_am_patches "$tmpgit" "$_patchdir" || $err "!am $_loc $_patchdir"
 
-	if singletree "$project" || [ $# -gt 2 ]; then
+	tmpclone "$1" "$2" "$tmpgit" "$rev" "$_patchdir"
+	if singletree "$project" || [ $# -gt 4 ]; then
 		prep_submodules "$_loc"
 	fi
 
@@ -124,23 +119,24 @@ fetch_submodule()
 {
 	mcfgdir="$mdir/${1##*/}"
 	eval "$(setvars "" subrev subrepo subrepo_bkup)"
-
 	[ ! -f "$mcfgdir/module.cfg" ] || . "$mcfgdir/module.cfg" || \
 	    $err "! . $mcfgdir/module.cfg"
 
 	[ -z "$subrepo" ] && [ -z "$subrepo_bkup" ] && return 0
-
 	for mvar in subrepo subrepo_bkup subrev; do
 		eval "[ -n \"\$$mvar\" ] || $err \"$1, $mdir: $mvar unset\""
 	done
 
 	rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
-	git clone $subrepo "$tmpgit/$1" || git clone $subrepo_bkup \
-	    "$tmpgit/$1" || $err "clone_project: could not download $project"
-	git -C "$tmpgit/$1" reset --hard "$subrev" || \
-	    $err "$mdir $1: cannot reset git revision"
+	tmpclone "$subrepo" "$subrepo_bkup" "$tmpdir/$1" "$subrev" \
+	    "$mdir/${1##*/}/patches"
+}
 
-	git_am_patches "$tmpgit/$1" "$mdir/${1##*/}/patches"
+tmpclone()
+{
+	git clone $1 "$3" || git clone $2 "$3" || $err "!clone $1 $2 $3 $4 $5"
+	git -C "$3" reset --hard "$4" || $err "!reset $1 $2 $3 $4 $5"
+	git_am_patches "$3" "$5"
 }
 
 git_am_patches()

From 7e15859be6b374ebc4a53a967779dca5afabd762 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 16:21:43 +0100
Subject: [PATCH 0503/1549] git.sh: simplify prep_submodules()

copying the module list into tmpdir/ no longer makes sense,
because it was only done before when we supported either
running the list from "git submodule update", or module.list.

since we only support handling of module.list, we can
greatly simplify this function.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 3e326255..29739e27 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -106,13 +106,9 @@ prep_submodules()
 	mdir="$PWD/config/submodule/$project"
 	[ -n "$tree" ] && mdir="$mdir/$tree"
 
-	[ -f "$mdir/module.list" ] || return 0
-	cat "$mdir/module.list" > "$tmpdir/modules" || \
-	    $err "!cp $mdir/module.list $tmpdir/modules"
-
-	while read -r msrcdir; do
+	[ -f "$mdir/module.list" ] && while read -r msrcdir; do
 		fetch_submodule "$msrcdir"
-	done < "$tmpdir/modules"
+	done < "$mdir/module.list"; return 0
 }
 
 fetch_submodule()
@@ -128,6 +124,7 @@ fetch_submodule()
 	done
 
 	rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
+
 	tmpclone "$subrepo" "$subrepo_bkup" "$tmpdir/$1" "$subrev" \
 	    "$mdir/${1##*/}/patches"
 }

From 05d301bdeeacc6bdf55a6db1ca4e55c495315606 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 16:54:05 +0100
Subject: [PATCH 0504/1549] git.sh: fix submodule path

i accidentally cloned to tmpdir rather than tmpgit

oops!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/git.sh b/include/git.sh
index 29739e27..63300fe8 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -125,7 +125,7 @@ fetch_submodule()
 
 	rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
 
-	tmpclone "$subrepo" "$subrepo_bkup" "$tmpdir/$1" "$subrev" \
+	tmpclone "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subrev" \
 	    "$mdir/${1##*/}/patches"
 }
 

From 046007b466c4318e75c6f056a10801313a2f20bd Mon Sep 17 00:00:00 2001
From: fuel-pcbox <mszoopers@protonmail.com>
Date: Fri, 7 Jun 2024 13:02:40 -0500
Subject: [PATCH 0505/1549] Add dependency scripts for Fedora 40 and Ubuntu
 24.04

---
 config/dependencies/fedora40   | 13 +++++++++++++
 config/dependencies/ubuntu2404 | 14 ++++++++++++++
 2 files changed, 27 insertions(+)
 create mode 100755 config/dependencies/fedora40
 create mode 100755 config/dependencies/ubuntu2404

diff --git a/config/dependencies/fedora40 b/config/dependencies/fedora40
new file mode 100755
index 00000000..aeedd755
--- /dev/null
+++ b/config/dependencies/fedora40
@@ -0,0 +1,13 @@
+pkg_add="dnf -y install"
+pkglist=" \
+acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc \
+arm-none-eabi-gcc arm-none-eabi-newlib autogen bison bzip2 cmake curl \
+dejavu-fonts-all device-mapper doxygen e2fsprogs flex freetype-devel fuse \
+gawk gcc gcc-gnat gdb gettext gettext-devel git gprbuild help2man \
+innoextract intltool libftdi-devel libgpiod-devel libjaylink-devel \
+libselinux-devel libusb1 libusb1-devel nasm ncurses-devel openssl-devel \
+p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \
+python-unversioned-command python3 python3-setuptools rsync sharutils \
+subversion systemd-devel texinfo unar unifont unifont-fonts \
+unifont-ttf-fonts unzip wget xz zlib-devel
+"
diff --git a/config/dependencies/ubuntu2404 b/config/dependencies/ubuntu2404
new file mode 100755
index 00000000..7f91ed05
--- /dev/null
+++ b/config/dependencies/ubuntu2404
@@ -0,0 +1,14 @@
+pkg_add="apt-get -y install"
+pkglist=" \
+autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \
+bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \
+flex gawk gcc-arm-linux-gnueabi gcc-arm-none-eabi gdb gettext git gnat help2man \
+innoextract libdevmapper-dev libfdt-dev libfont-freetype-perl libfreetype6-dev \
+libftdi-dev libfuse-dev libgnutls28-dev liblz4-tool liblzma-dev libncurses5-dev \
+libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev \
+libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \
+libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \
+pciutils perl pkg-config python3 python3-pkg-resources python3-pycryptodome \
+python3-pyelftools python3-setuptools python-is-python3 sharutils swig \
+fonts-unifont unar unifont unzip uuid-dev wget zlib1g-dev \
+"

From 9b00b30a4f6e6d46b5265b22b31af889bdc39353 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Jun 2024 21:30:43 +0100
Subject: [PATCH 0506/1549] move uefiextract to elf/uefitool/

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/uefitool/build.list | 1 +
 include/vendor.sh               | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)
 create mode 100644 config/data/uefitool/build.list

diff --git a/config/data/uefitool/build.list b/config/data/uefitool/build.list
new file mode 100644
index 00000000..2c59bb50
--- /dev/null
+++ b/config/data/uefitool/build.list
@@ -0,0 +1 @@
+uefiextract
diff --git a/include/vendor.sh b/include/vendor.sh
index 651766df..b8adc9c8 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -9,7 +9,7 @@ _7ztest="a"
 e6400_unpack="$PWD/src/bios_extract/dell_inspiron_1100_unpacker.py"
 me7updateparser="$PWD/util/me7_update_parser/me7_update_parser.py"
 pfs_extract="$PWD/src/biosutilities/Dell_PFS_Extract.py"
-uefiextract="$PWD/src/uefitool/uefiextract"
+uefiextract="$PWD/elf/uefitool/uefiextract"
 nvmutil="util/nvmutil/nvm"
 vendir="vendorfiles"
 appdir="$vendir/app"

From 08d0a1d5d824b69cc6bf45596fe921d52ff179c5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 8 Jun 2024 01:22:21 +0100
Subject: [PATCH 0507/1549] lib.sh: shorten a string in e()

line exceeds 80 characters

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 39d3bc99..dac8e507 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -210,7 +210,7 @@ e()
 	[ $# -gt 1 ] && es_t="$2"
 	es2="already exists"
 	estr="[ -$es_t \"\$1\" ] || return 1"
-	[ $# -gt 2 ] && estr="[ -$es_t \"\$1\" ] && return 1" && es2="not found"
+	[ $# -gt 2 ] && estr="[ -$es_t \"\$1\" ] && return 1" && es2="missing"
 
 	eval "$estr"
 	printf "%s %s\n" "$1" "$es2" 1>&2

From c202dc612e76aa5850bc9e8000832e7085b84840 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 8 Jun 2024 01:55:15 +0100
Subject: [PATCH 0508/1549] vendor.sh: move download logic to lib.sh

in future revisions, i will make tarballs become subfiles,
to complement submodules. e.g. crossgcc tarballs in coreboot

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh    | 26 ++++++++++++++++++++++++++
 include/vendor.sh | 23 +----------------------
 2 files changed, 27 insertions(+), 22 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index dac8e507..9d66ea8d 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -6,6 +6,8 @@
 export LC_COLLATE=C
 export LC_ALL=C
 
+_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
+
 tmpdir_was_set="y"
 cbdir="src/coreboot/default"
 ifdtool="elf/ifdtool/default/ifdtool"
@@ -225,3 +227,27 @@ singletree()
 		[ -f "$targetfile" ] && return 1
 	done
 }
+
+download()
+{
+	dl_fail="y" # 1 url, 2 url backup, 3 destination, 4 checksum
+	vendor_checksum "$4" "$3" || dl_fail="n"
+	[ "$dl_fail" = "n" ] && e "$3" f && return 0
+	x_ mkdir -p "${3%/*}"
+	for url in "$1" "$2"; do
+		[ "$dl_fail" = "n" ] && break
+		[ -z "$1" ] && continue
+		x_ rm -f "$3"
+		curl --location --retry 3 -A "$_ua" "$1" -o "$3" || \
+		    wget --tries 3 -U "$_ua" "$1" -O "$3" || continue
+		vendor_checksum "$4" "$3" || dl_fail="n"
+	done
+	[ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: file missing"; return 0
+}
+
+vendor_checksum()
+{
+	[ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] || return 1
+	printf "Bad checksum for file: %s\n" "$2" 1>&2
+	rm -f "$2" || :
+}
diff --git a/include/vendor.sh b/include/vendor.sh
index b8adc9c8..f4dba0a1 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -3,7 +3,6 @@
 # Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
 # Copyright (c) 2023-2024 Leah Rowe <leah@libreboot.org>
 
-_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
 _7ztest="a"
 
 e6400_unpack="$PWD/src/bios_extract/dell_inspiron_1100_unpacker.py"
@@ -115,20 +114,7 @@ fetch()
 	_dest="${5##*../}"
 	_dl="$vendir/cache/$dlsum"
 
-	x_ mkdir -p "${_dl%/*}"
-
-	dl_fail="y"
-	vendor_checksum "$dlsum" "$_dl" || dl_fail="n"
-	for url in "$dl" "$dl_bkup"; do
-		[ "$dl_fail" = "n" ] && break
-		[ -z "$url" ] && continue
-		x_ rm -f "$_dl"
-		curl --location --retry 3 -A "$_ua" "$url" -o "$_dl" || \
-		    wget --tries 3 -U "$_ua" "$url" -O "$_dl" || continue
-		vendor_checksum "$dlsum" "$_dl" || dl_fail="n"
-	done
-	[ "$dl_fail" = "y" ] && \
-		$err "fetch $dlsum: matched file unavailable"
+	download "$dl" "$dl_bkup" "$_dl" "$dlsum"
 
 	x_ rm -Rf "${_dl}_extracted"
 	mkdirs "$_dest" "extract_$dl_type" || return 0
@@ -139,13 +125,6 @@ fetch()
 	$err "extract_$dl_type (fetch): missing file: '$_dest'"
 }
 
-vendor_checksum()
-{
-	[ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] || return 1
-	printf "Bad checksum for file: %s\n" "$2" 1>&2
-	rm -f "$2" || :
-}
-
 mkdirs()
 {
 	e "$1" f && return 1

From 74ae84afba74994e3a854d189d9e7226f7e4187c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 8 Jun 2024 01:59:46 +0100
Subject: [PATCH 0509/1549] vendor.sh: add a return at the end of mkdirs

i don't like that it's not there, because of the quirks
in sh behaviour. put it there to put my mind at ease.

otherwise, this doesn't change any behaviour.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index f4dba0a1..4a0e7ae6 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -133,7 +133,7 @@ mkdirs()
 	remkdir "$appdir"
 	extract_archive "$_dl" "$appdir" || \
 	    [ "$2" = "extract_e6400vga" ] || \
-	    $err "mkdirs $1 $2: !extract"
+	    $err "mkdirs $1 $2: !extract"; return 0
 }
 
 extract_intel_me()

From 1a44fcfacfb774eeed387732ed5bf6168757cac1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 8 Jun 2024 02:17:23 +0100
Subject: [PATCH 0510/1549] git.sh: remove unnecessary line break

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/git.sh b/include/git.sh
index 63300fe8..1573c7d2 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -124,7 +124,6 @@ fetch_submodule()
 	done
 
 	rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
-
 	tmpclone "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subrev" \
 	    "$mdir/${1##*/}/patches"
 }

From b0d1ad32fa87e9042e2e7f86469e746f451daafb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 8 Jun 2024 03:01:05 +0100
Subject: [PATCH 0511/1549] git.sh: support downloading *files* as submodules

when we download coreboot, we currently don't have a way to
download crossgcc tarballs, so we rely on coreboot to do it,
which means running the coreboot build system to do it; which
means we don't get them in release archives, unless we add
very hacky logic (which did exist and was removed).

the problem with coreboot's build system is that it does not
define backup links for each given tarball, instead relying
on gnu.org exclusively, which seems OK at first because the
gnu.org links actually return an HTTP 302 response leading
to a random mirror, HOWEVER:

the gnu.org 302 redirect often fails, and the download fails,
causing an error. a mitigation for this has been to patch the
coreboot build system to download directly from a single mirror
that is reliable (in our case mirrorservice.org).

while this mitigation mostly works, it's not redundant; the
kent mirror is occasionally down too, and again we still have
the problem of not being able to cleanly provide crossgcc
tarballs inside release archives.

do it in config/submodules, like so:

module.list shall say the relative path of a given file,
once downloaded, relative to the given source tree.

module.cfg shall be re-used, in the same way as for git
submodules, but:

subfile="url"
subfile_bkup="backup url"

do this, instead of:

subrepo="url"
subrepo_bkup="backup url"

example entries in module.list:

util/crossgcc/tarballs/binutils-2.41.tar.xz
util/crossgcc/tarballs/gcc-13.2.0.tar.xz
util/crossgcc/tarballs/gmp-6.3.0.tar.xz
util/crossgcc/tarballs/mpc-1.3.1.tar.gz
util/crossgcc/tarballs/mpfr-4.2.1.tar.xz
util/crossgcc/tarballs/nasm-2.16.01.tar.bz2
util/crossgcc/tarballs/R06_28_23.tar.gz

the "subrev" variable (in module.cfg) has been renamed
to "subhash", so that this makes sense, and that name is
common to both subfile/subrepo.

the download logic from the vendor scripts has been re-used
for this purpose, and it verifies files using sha512sum.
therefore:

when specifying subrepo(git submodule), subhash will still
be a sha1 checksum, but:

when specifying subfile(file, e.g. tarball), subhash will
be a sha512 checksum

the logic for both (subrepo and subfile) is unified, and
has this rule:

subrepo* and subfile* must never *both* be declared.

the actual configuration of coreboot crossgcc tarballs
will be done in a follow-up commit. this commit simply
modifies the code to accomodate this.

over time, this feature could be used for many other files
within source trees, and could perhaps be expanded to allow
extracting source tarballs in leiu of git repositories, but
the latter is not yet required and thus not implemented.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../coreboot/coreboot413/vboot/module.cfg     |  2 +-
 .../default/arm-trusted-firmware/module.cfg   |  2 +-
 .../default/intel-microcode/module.cfg        |  2 +-
 .../coreboot/default/libgfxinit/module.cfg    |  2 +-
 .../coreboot/default/libhwbase/module.cfg     |  2 +-
 .../coreboot/default/vboot/module.cfg         |  2 +-
 .../coreboot/dell/intel-microcode/module.cfg  |  2 +-
 .../coreboot/dell/libgfxinit/module.cfg       |  2 +-
 .../coreboot/dell/libhwbase/module.cfg        |  2 +-
 .../submodule/coreboot/dell/vboot/module.cfg  |  2 +-
 .../coreboot/fam15h_rdimm/blobs/module.cfg    |  2 +-
 .../coreboot/fam15h_rdimm/vboot/module.cfg    |  2 +-
 .../coreboot/fam15h_udimm/blobs/module.cfg    |  2 +-
 .../coreboot/fam15h_udimm/vboot/module.cfg    |  2 +-
 .../haswell/intel-microcode/module.cfg        |  2 +-
 .../coreboot/haswell/libgfxinit/module.cfg    |  2 +-
 .../coreboot/haswell/libhwbase/module.cfg     |  2 +-
 .../coreboot/haswell/vboot/module.cfg         |  2 +-
 .../coreboot/i945/intel-microcode/module.cfg  |  2 +-
 .../coreboot/i945/libgfxinit/module.cfg       |  2 +-
 .../coreboot/i945/libhwbase/module.cfg        |  2 +-
 .../submodule/coreboot/i945/vboot/module.cfg  |  2 +-
 config/submodule/docs/html/module.cfg         |  2 +-
 config/submodule/docs/img/module.cfg          |  2 +-
 config/submodule/docs/untitled/module.cfg     |  2 +-
 .../submodule/grub/default/gnulib/module.cfg  |  2 +-
 config/submodule/grub/xhci/gnulib/module.cfg  |  2 +-
 config/submodule/pico-sdk/tinyusb/module.cfg  |  2 +-
 .../stm32-vserprog/libopencm3/module.cfg      |  2 +-
 include/git.sh                                | 27 ++++++++++++++-----
 30 files changed, 49 insertions(+), 36 deletions(-)

diff --git a/config/submodule/coreboot/coreboot413/vboot/module.cfg b/config/submodule/coreboot/coreboot413/vboot/module.cfg
index 42e3835d..34656ba9 100644
--- a/config/submodule/coreboot/coreboot413/vboot/module.cfg
+++ b/config/submodule/coreboot/coreboot413/vboot/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/vboot.git"
 subrepo_bkup="https://github.com/coreboot/vboot"
-subrev="4c523ed10f25de872ac0513ebd6ca53d3970b9de"
+subhash="4c523ed10f25de872ac0513ebd6ca53d3970b9de"
diff --git a/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
index ccf35b1b..3fb78c02 100644
--- a/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
+++ b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/arm-trusted-firmware.git"
 subrepo_bkup="https://github.com/coreboot/arm-trusted-firmware"
-subrev="23d6774ab53ded09d8065a184b4763504e9c8d9e"
+subhash="23d6774ab53ded09d8065a184b4763504e9c8d9e"
diff --git a/config/submodule/coreboot/default/intel-microcode/module.cfg b/config/submodule/coreboot/default/intel-microcode/module.cfg
index a115badf..05a174b0 100644
--- a/config/submodule/coreboot/default/intel-microcode/module.cfg
+++ b/config/submodule/coreboot/default/intel-microcode/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/intel-microcode.git"
 subrepo_bkup="https://github.com/coreboot/intel-microcode"
-subrev="ece0d294a29a1375397941a4e6f2f7217910bc89"
+subhash="ece0d294a29a1375397941a4e6f2f7217910bc89"
diff --git a/config/submodule/coreboot/default/libgfxinit/module.cfg b/config/submodule/coreboot/default/libgfxinit/module.cfg
index c3db628b..7e2536f9 100644
--- a/config/submodule/coreboot/default/libgfxinit/module.cfg
+++ b/config/submodule/coreboot/default/libgfxinit/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/libgfxinit.git"
 subrepo_bkup="https://github.com/coreboot/libgfxinit"
-subrev="a4be8a21b0e2c752da0042c79aae5942418f53e2"
+subhash="a4be8a21b0e2c752da0042c79aae5942418f53e2"
diff --git a/config/submodule/coreboot/default/libhwbase/module.cfg b/config/submodule/coreboot/default/libhwbase/module.cfg
index 7996007e..2937b8b7 100644
--- a/config/submodule/coreboot/default/libhwbase/module.cfg
+++ b/config/submodule/coreboot/default/libhwbase/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/libhwbase.git"
 subrepo_bkup="https://github.com/coreboot/libhwbase"
-subrev="584629b9f4771b7618951cec57df2ca3af9c6981"
+subhash="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/default/vboot/module.cfg b/config/submodule/coreboot/default/vboot/module.cfg
index 53306d64..9a23ee96 100644
--- a/config/submodule/coreboot/default/vboot/module.cfg
+++ b/config/submodule/coreboot/default/vboot/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/vboot.git"
 subrepo_bkup="https://github.com/coreboot/vboot"
-subrev="3d37d2aafe1f941c532def2a1fbbb58c8dd84182"
+subhash="3d37d2aafe1f941c532def2a1fbbb58c8dd84182"
diff --git a/config/submodule/coreboot/dell/intel-microcode/module.cfg b/config/submodule/coreboot/dell/intel-microcode/module.cfg
index a115badf..05a174b0 100644
--- a/config/submodule/coreboot/dell/intel-microcode/module.cfg
+++ b/config/submodule/coreboot/dell/intel-microcode/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/intel-microcode.git"
 subrepo_bkup="https://github.com/coreboot/intel-microcode"
-subrev="ece0d294a29a1375397941a4e6f2f7217910bc89"
+subhash="ece0d294a29a1375397941a4e6f2f7217910bc89"
diff --git a/config/submodule/coreboot/dell/libgfxinit/module.cfg b/config/submodule/coreboot/dell/libgfxinit/module.cfg
index c3db628b..7e2536f9 100644
--- a/config/submodule/coreboot/dell/libgfxinit/module.cfg
+++ b/config/submodule/coreboot/dell/libgfxinit/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/libgfxinit.git"
 subrepo_bkup="https://github.com/coreboot/libgfxinit"
-subrev="a4be8a21b0e2c752da0042c79aae5942418f53e2"
+subhash="a4be8a21b0e2c752da0042c79aae5942418f53e2"
diff --git a/config/submodule/coreboot/dell/libhwbase/module.cfg b/config/submodule/coreboot/dell/libhwbase/module.cfg
index 7996007e..2937b8b7 100644
--- a/config/submodule/coreboot/dell/libhwbase/module.cfg
+++ b/config/submodule/coreboot/dell/libhwbase/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/libhwbase.git"
 subrepo_bkup="https://github.com/coreboot/libhwbase"
-subrev="584629b9f4771b7618951cec57df2ca3af9c6981"
+subhash="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/dell/vboot/module.cfg b/config/submodule/coreboot/dell/vboot/module.cfg
index 53306d64..9a23ee96 100644
--- a/config/submodule/coreboot/dell/vboot/module.cfg
+++ b/config/submodule/coreboot/dell/vboot/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/vboot.git"
 subrepo_bkup="https://github.com/coreboot/vboot"
-subrev="3d37d2aafe1f941c532def2a1fbbb58c8dd84182"
+subhash="3d37d2aafe1f941c532def2a1fbbb58c8dd84182"
diff --git a/config/submodule/coreboot/fam15h_rdimm/blobs/module.cfg b/config/submodule/coreboot/fam15h_rdimm/blobs/module.cfg
index c7ae4683..215caf4d 100644
--- a/config/submodule/coreboot/fam15h_rdimm/blobs/module.cfg
+++ b/config/submodule/coreboot/fam15h_rdimm/blobs/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/blobs.git"
 subrepo_bkup="https://github.com/coreboot/blobs"
-subrev="034b27818450428f70aa9316c8bd0d65bacd8ee8"
+subhash="034b27818450428f70aa9316c8bd0d65bacd8ee8"
diff --git a/config/submodule/coreboot/fam15h_rdimm/vboot/module.cfg b/config/submodule/coreboot/fam15h_rdimm/vboot/module.cfg
index 7a7ad3c6..5fac75c3 100644
--- a/config/submodule/coreboot/fam15h_rdimm/vboot/module.cfg
+++ b/config/submodule/coreboot/fam15h_rdimm/vboot/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/vboot.git"
 subrepo_bkup="https://github.com/coreboot/vboot"
-subrev="ecdca931ae0637d1a9498f64862939bd5bb99e0b"
+subhash="ecdca931ae0637d1a9498f64862939bd5bb99e0b"
diff --git a/config/submodule/coreboot/fam15h_udimm/blobs/module.cfg b/config/submodule/coreboot/fam15h_udimm/blobs/module.cfg
index c7ae4683..215caf4d 100644
--- a/config/submodule/coreboot/fam15h_udimm/blobs/module.cfg
+++ b/config/submodule/coreboot/fam15h_udimm/blobs/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/blobs.git"
 subrepo_bkup="https://github.com/coreboot/blobs"
-subrev="034b27818450428f70aa9316c8bd0d65bacd8ee8"
+subhash="034b27818450428f70aa9316c8bd0d65bacd8ee8"
diff --git a/config/submodule/coreboot/fam15h_udimm/vboot/module.cfg b/config/submodule/coreboot/fam15h_udimm/vboot/module.cfg
index 7a7ad3c6..5fac75c3 100644
--- a/config/submodule/coreboot/fam15h_udimm/vboot/module.cfg
+++ b/config/submodule/coreboot/fam15h_udimm/vboot/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/vboot.git"
 subrepo_bkup="https://github.com/coreboot/vboot"
-subrev="ecdca931ae0637d1a9498f64862939bd5bb99e0b"
+subhash="ecdca931ae0637d1a9498f64862939bd5bb99e0b"
diff --git a/config/submodule/coreboot/haswell/intel-microcode/module.cfg b/config/submodule/coreboot/haswell/intel-microcode/module.cfg
index 12b01372..90f7d273 100644
--- a/config/submodule/coreboot/haswell/intel-microcode/module.cfg
+++ b/config/submodule/coreboot/haswell/intel-microcode/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/intel-microcode.git"
 subrepo_bkup="https://github.com/coreboot/intel-microcode"
-subrev="41af34500598418150aa298bb04e7edacc547897"
+subhash="41af34500598418150aa298bb04e7edacc547897"
diff --git a/config/submodule/coreboot/haswell/libgfxinit/module.cfg b/config/submodule/coreboot/haswell/libgfxinit/module.cfg
index c3db628b..7e2536f9 100644
--- a/config/submodule/coreboot/haswell/libgfxinit/module.cfg
+++ b/config/submodule/coreboot/haswell/libgfxinit/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/libgfxinit.git"
 subrepo_bkup="https://github.com/coreboot/libgfxinit"
-subrev="a4be8a21b0e2c752da0042c79aae5942418f53e2"
+subhash="a4be8a21b0e2c752da0042c79aae5942418f53e2"
diff --git a/config/submodule/coreboot/haswell/libhwbase/module.cfg b/config/submodule/coreboot/haswell/libhwbase/module.cfg
index 7996007e..2937b8b7 100644
--- a/config/submodule/coreboot/haswell/libhwbase/module.cfg
+++ b/config/submodule/coreboot/haswell/libhwbase/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/libhwbase.git"
 subrepo_bkup="https://github.com/coreboot/libhwbase"
-subrev="584629b9f4771b7618951cec57df2ca3af9c6981"
+subhash="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/haswell/vboot/module.cfg b/config/submodule/coreboot/haswell/vboot/module.cfg
index a30a1cee..5ef2153c 100644
--- a/config/submodule/coreboot/haswell/vboot/module.cfg
+++ b/config/submodule/coreboot/haswell/vboot/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/vboot.git"
 subrepo_bkup="https://github.com/coreboot/vboot"
-subrev="09fcd2184f9c714829503e84b8a7dfe7f2584e00"
+subhash="09fcd2184f9c714829503e84b8a7dfe7f2584e00"
diff --git a/config/submodule/coreboot/i945/intel-microcode/module.cfg b/config/submodule/coreboot/i945/intel-microcode/module.cfg
index 07b2995a..6edc2d9f 100644
--- a/config/submodule/coreboot/i945/intel-microcode/module.cfg
+++ b/config/submodule/coreboot/i945/intel-microcode/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/intel-microcode.git"
 subrepo_bkup="https://github.com/coreboot/intel-microcode"
-subrev="262f0c97f2fbc3839a59523cc6c6bcf500e2850b"
+subhash="262f0c97f2fbc3839a59523cc6c6bcf500e2850b"
diff --git a/config/submodule/coreboot/i945/libgfxinit/module.cfg b/config/submodule/coreboot/i945/libgfxinit/module.cfg
index d8838af8..50153822 100644
--- a/config/submodule/coreboot/i945/libgfxinit/module.cfg
+++ b/config/submodule/coreboot/i945/libgfxinit/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/libgfxinit.git"
 subrepo_bkup="https://github.com/coreboot/libgfxinit"
-subrev="066e52eeaa329d782ccee96265a6a351fc395bf1"
+subhash="066e52eeaa329d782ccee96265a6a351fc395bf1"
diff --git a/config/submodule/coreboot/i945/libhwbase/module.cfg b/config/submodule/coreboot/i945/libhwbase/module.cfg
index 56fefb40..cd975dcb 100644
--- a/config/submodule/coreboot/i945/libhwbase/module.cfg
+++ b/config/submodule/coreboot/i945/libhwbase/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/libhwbase.git"
 subrepo_bkup="https://github.com/coreboot/libhwbase"
-subrev="8be5a82b85ceb3ee8a1c4fbf36c75a4bfbda8900"
+subhash="8be5a82b85ceb3ee8a1c4fbf36c75a4bfbda8900"
diff --git a/config/submodule/coreboot/i945/vboot/module.cfg b/config/submodule/coreboot/i945/vboot/module.cfg
index 75ce2cf2..352e4222 100644
--- a/config/submodule/coreboot/i945/vboot/module.cfg
+++ b/config/submodule/coreboot/i945/vboot/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/vboot.git"
 subrepo_bkup="https://github.com/coreboot/vboot"
-subrev="5b8596cefd1a61252501943f2534323708338732"
+subhash="5b8596cefd1a61252501943f2534323708338732"
diff --git a/config/submodule/docs/html/module.cfg b/config/submodule/docs/html/module.cfg
index 0c5ee4cd..6f5f0773 100644
--- a/config/submodule/docs/html/module.cfg
+++ b/config/submodule/docs/html/module.cfg
@@ -1,3 +1,3 @@
-subrev="20fd775c855428ecff647a42823746863fd57efe"
+subhash="20fd775c855428ecff647a42823746863fd57efe"
 subrepo="https://codeberg.org/libreboot/lbwww"
 subrepo_bkup="https://git.disroot.org/libreboot/lbwww"
diff --git a/config/submodule/docs/img/module.cfg b/config/submodule/docs/img/module.cfg
index 82bcf8b1..07c4ab89 100644
--- a/config/submodule/docs/img/module.cfg
+++ b/config/submodule/docs/img/module.cfg
@@ -1,3 +1,3 @@
-subrev="625bb7535d388a235bec47a8ce822cda10b53692"
+subhash="625bb7535d388a235bec47a8ce822cda10b53692"
 subrepo="https://codeberg.org/libreboot/lbwww-img"
 subrepo_bkup="https://git.disroot.org/libreboot/lbwww-img"
diff --git a/config/submodule/docs/untitled/module.cfg b/config/submodule/docs/untitled/module.cfg
index 5608c457..35e950e7 100644
--- a/config/submodule/docs/untitled/module.cfg
+++ b/config/submodule/docs/untitled/module.cfg
@@ -1,3 +1,3 @@
-subrev="d8e2043c1512eb1171c274559ce82e8093ef393f"
+subhash="d8e2043c1512eb1171c274559ce82e8093ef393f"
 subrepo="https://codeberg.org/vimuser/untitled-website"
 subrepo_bkup="https://notabug.org/untitled/untitled-website"
diff --git a/config/submodule/grub/default/gnulib/module.cfg b/config/submodule/grub/default/gnulib/module.cfg
index 26c28561..6fd77871 100644
--- a/config/submodule/grub/default/gnulib/module.cfg
+++ b/config/submodule/grub/default/gnulib/module.cfg
@@ -1,3 +1,3 @@
 subrepo="git://git.sv.gnu.org/gnulib"
 subrepo_bkup="https://codeberg.org/libreboot/gnulib"
-subrev="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
+subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
diff --git a/config/submodule/grub/xhci/gnulib/module.cfg b/config/submodule/grub/xhci/gnulib/module.cfg
index 26c28561..6fd77871 100644
--- a/config/submodule/grub/xhci/gnulib/module.cfg
+++ b/config/submodule/grub/xhci/gnulib/module.cfg
@@ -1,3 +1,3 @@
 subrepo="git://git.sv.gnu.org/gnulib"
 subrepo_bkup="https://codeberg.org/libreboot/gnulib"
-subrev="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
+subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
diff --git a/config/submodule/pico-sdk/tinyusb/module.cfg b/config/submodule/pico-sdk/tinyusb/module.cfg
index 68798daa..43b71534 100644
--- a/config/submodule/pico-sdk/tinyusb/module.cfg
+++ b/config/submodule/pico-sdk/tinyusb/module.cfg
@@ -1,3 +1,3 @@
-subrev="86c416d4c0fb38432460b3e11b08b9de76941bf5"
+subhash="86c416d4c0fb38432460b3e11b08b9de76941bf5"
 subrepo="https://codeberg.org/libreboot/tinyusb"
 subrepo_bkup="https://github.com/hathach/tinyusb.git"
diff --git a/config/submodule/stm32-vserprog/libopencm3/module.cfg b/config/submodule/stm32-vserprog/libopencm3/module.cfg
index b8c46854..9fb3460b 100644
--- a/config/submodule/stm32-vserprog/libopencm3/module.cfg
+++ b/config/submodule/stm32-vserprog/libopencm3/module.cfg
@@ -1,3 +1,3 @@
-subrev="458250dc6147dc807eec9e4d5a6caf38a699ecb1"
+subhash="458250dc6147dc807eec9e4d5a6caf38a699ecb1"
 subrepo="https://codeberg.org/libreboot/libopencm3"
 subrepo_bkup="https://github.com/libopencm3/libopencm3"
diff --git a/include/git.sh b/include/git.sh
index 1573c7d2..5fe41fb3 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -3,7 +3,7 @@
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
 eval "$(setvars "" _target rev _xm loc url bkup_url depend tree_depend xtree \
-    mdir subrev subrepo subrepo_bkup)"
+    mdir subhash subrepo subrepo_bkup subfile subfile_bkup)"
 
 fetch_project_trees()
 {
@@ -114,18 +114,31 @@ prep_submodules()
 fetch_submodule()
 {
 	mcfgdir="$mdir/${1##*/}"
-	eval "$(setvars "" subrev subrepo subrepo_bkup)"
+	eval "$(setvars "" subhash subrepo subrepo_bkup subfile subfile_bkup)"
 	[ ! -f "$mcfgdir/module.cfg" ] || . "$mcfgdir/module.cfg" || \
 	    $err "! . $mcfgdir/module.cfg"
 
-	[ -z "$subrepo" ] && [ -z "$subrepo_bkup" ] && return 0
-	for mvar in subrepo subrepo_bkup subrev; do
+	st=""
+	for _st in repo file; do
+		_seval="if [ -n \"\$sub$_st\" ] || [ -n \"\$sub${_st}_bkup\" ]"
+		eval "$_seval; then st=\"\$st \$_st\"; fi"
+	done
+	st="${st# }"
+	[ "$st" = "repo file" ] && $err "$mdir: repo/file both defined"
+
+	[ -z "$st" ] && return 0 # subrepo/subfile not defined
+
+	for mvar in "sub${st}" "sub${st}_bkup" "subhash"; do
 		eval "[ -n \"\$$mvar\" ] || $err \"$1, $mdir: $mvar unset\""
 	done
 
-	rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
-	tmpclone "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subrev" \
-	    "$mdir/${1##*/}/patches"
+	if [ "$st" = "repo" ]; then
+		rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
+		tmpclone "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subhash" \
+		    "$mdir/${1##*/}/patches"
+	else
+		download "$subfile" "$subfile_bkup" "$tmpgit/$1" "$subhash"
+	fi
 }
 
 tmpclone()

From a0eb79dfd823665bc33171f6d82b0ef8794038c7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 8 Jun 2024 08:30:59 +0100
Subject: [PATCH 0512/1549] add crossgcc tarballs to config/submodules/

support redundant downloads, and enable inclusion of these
tarballs inside release archives, for offline builds.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../submodule/coreboot/default/R06_28_23.tar.gz/module.cfg | 3 +++
 .../coreboot/default/binutils-2.41.tar.xz/module.cfg       | 3 +++
 .../coreboot/default/gcc-13.2.0.tar.xz/module.cfg          | 3 +++
 .../submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg | 3 +++
 config/submodule/coreboot/default/module.list              | 7 +++++++
 .../submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg | 3 +++
 .../coreboot/default/mpfr-4.2.1.tar.xz/module.cfg          | 3 +++
 .../coreboot/default/nasm-2.16.01.tar.bz2/module.cfg       | 3 +++
 .../fam15h_rdimm/acpica-unix2-20190703.tar.gz/module.cfg   | 3 +++
 .../coreboot/fam15h_rdimm/binutils-2.32.tar.xz/module.cfg  | 3 +++
 .../coreboot/fam15h_rdimm/gcc-8.3.0.tar.xz/module.cfg      | 3 +++
 .../coreboot/fam15h_rdimm/gmp-6.1.2.tar.xz/module.cfg      | 3 +++
 config/submodule/coreboot/fam15h_rdimm/module.list         | 7 +++++++
 .../coreboot/fam15h_rdimm/mpc-1.1.0.tar.gz/module.cfg      | 3 +++
 .../coreboot/fam15h_rdimm/mpfr-4.0.2.tar.xz/module.cfg     | 3 +++
 .../coreboot/fam15h_rdimm/nasm-2.14.02.tar.bz2/module.cfg  | 3 +++
 .../submodule/coreboot/haswell/R06_28_23.tar.gz/module.cfg | 3 +++
 .../coreboot/haswell/binutils-2.42.tar.xz/module.cfg       | 3 +++
 .../coreboot/haswell/gcc-13.2.0.tar.xz/module.cfg          | 3 +++
 .../submodule/coreboot/haswell/gmp-6.3.0.tar.xz/module.cfg | 3 +++
 config/submodule/coreboot/haswell/module.list              | 7 +++++++
 .../submodule/coreboot/haswell/mpc-1.3.1.tar.gz/module.cfg | 3 +++
 .../coreboot/haswell/mpfr-4.2.1.tar.xz/module.cfg          | 3 +++
 .../coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg       | 3 +++
 config/submodule/coreboot/i945/R10_20_22.tar.gz/module.cfg | 3 +++
 .../coreboot/i945/binutils-2.37.tar.xz/module.cfg          | 3 +++
 .../submodule/coreboot/i945/gcc-11.2.0.tar.xz/module.cfg   | 3 +++
 config/submodule/coreboot/i945/gmp-6.2.1.tar.xz/module.cfg | 3 +++
 config/submodule/coreboot/i945/module.list                 | 7 +++++++
 config/submodule/coreboot/i945/mpc-1.3.1.tar.gz/module.cfg | 3 +++
 .../submodule/coreboot/i945/mpfr-4.2.0.tar.xz/module.cfg   | 3 +++
 .../coreboot/i945/nasm-2.15.05.tar.bz2/module.cfg          | 3 +++
 script/trees                                               | 2 ++
 33 files changed, 114 insertions(+)
 create mode 100644 config/submodule/coreboot/default/R06_28_23.tar.gz/module.cfg
 create mode 100644 config/submodule/coreboot/default/binutils-2.41.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/default/gcc-13.2.0.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg
 create mode 100644 config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/default/nasm-2.16.01.tar.bz2/module.cfg
 create mode 100644 config/submodule/coreboot/fam15h_rdimm/acpica-unix2-20190703.tar.gz/module.cfg
 create mode 100644 config/submodule/coreboot/fam15h_rdimm/binutils-2.32.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/fam15h_rdimm/gcc-8.3.0.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/fam15h_rdimm/gmp-6.1.2.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/fam15h_rdimm/mpc-1.1.0.tar.gz/module.cfg
 create mode 100644 config/submodule/coreboot/fam15h_rdimm/mpfr-4.0.2.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/fam15h_rdimm/nasm-2.14.02.tar.bz2/module.cfg
 create mode 100644 config/submodule/coreboot/haswell/R06_28_23.tar.gz/module.cfg
 create mode 100644 config/submodule/coreboot/haswell/binutils-2.42.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/haswell/gcc-13.2.0.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/haswell/gmp-6.3.0.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/haswell/mpc-1.3.1.tar.gz/module.cfg
 create mode 100644 config/submodule/coreboot/haswell/mpfr-4.2.1.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg
 create mode 100644 config/submodule/coreboot/i945/R10_20_22.tar.gz/module.cfg
 create mode 100644 config/submodule/coreboot/i945/binutils-2.37.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/i945/gcc-11.2.0.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/i945/gmp-6.2.1.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/i945/mpc-1.3.1.tar.gz/module.cfg
 create mode 100644 config/submodule/coreboot/i945/mpfr-4.2.0.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/i945/nasm-2.15.05.tar.bz2/module.cfg

diff --git a/config/submodule/coreboot/default/R06_28_23.tar.gz/module.cfg b/config/submodule/coreboot/default/R06_28_23.tar.gz/module.cfg
new file mode 100644
index 00000000..71ab78bc
--- /dev/null
+++ b/config/submodule/coreboot/default/R06_28_23.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/R06_28_23.tar.gz"
+subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/R06_28_23.tar.gz"
+subhash="d64091202866cd306fef08bbf95b585584331704fdbe5ef0bfa99c8f9cb188e51a52880625c8d6bc971b3d251c8b13686b43a013058cadda861efe09b219c1b0"
diff --git a/config/submodule/coreboot/default/binutils-2.41.tar.xz/module.cfg b/config/submodule/coreboot/default/binutils-2.41.tar.xz/module.cfg
new file mode 100644
index 00000000..eb2d01b1
--- /dev/null
+++ b/config/submodule/coreboot/default/binutils-2.41.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.41.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.41.tar.xz"
+subhash="5df45d0bd6ddabdce4f35878c041e46a92deef01e7dea5facc97fd65cc06b59abc6fba0eb454b68e571c7e14038dc823fe7f2263843e6e627b7444eaf0fe9374"
diff --git a/config/submodule/coreboot/default/gcc-13.2.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gcc-13.2.0.tar.xz/module.cfg
new file mode 100644
index 00000000..dbcc0805
--- /dev/null
+++ b/config/submodule/coreboot/default/gcc-13.2.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-13.2.0/gcc-13.2.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-13.2.0/gcc-13.2.0.tar.xz"
+subhash="d99e4826a70db04504467e349e9fbaedaa5870766cda7c5cab50cdebedc4be755ebca5b789e1232a34a20be1a0b60097de9280efe47bdb71c73251e30b0862a2"
diff --git a/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg
new file mode 100644
index 00000000..fe274faf
--- /dev/null
+++ b/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz"
+subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2"
diff --git a/config/submodule/coreboot/default/module.list b/config/submodule/coreboot/default/module.list
index b0cdf195..85fdafa5 100644
--- a/config/submodule/coreboot/default/module.list
+++ b/config/submodule/coreboot/default/module.list
@@ -3,3 +3,10 @@
 3rdparty/libgfxinit
 3rdparty/libhwbase
 3rdparty/vboot
+util/crossgcc/tarballs/binutils-2.41.tar.xz
+util/crossgcc/tarballs/gcc-13.2.0.tar.xz
+util/crossgcc/tarballs/gmp-6.3.0.tar.xz
+util/crossgcc/tarballs/mpc-1.3.1.tar.gz
+util/crossgcc/tarballs/mpfr-4.2.1.tar.xz
+util/crossgcc/tarballs/nasm-2.16.01.tar.bz2
+util/crossgcc/tarballs/R06_28_23.tar.gz
diff --git a/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg
new file mode 100644
index 00000000..f98b6444
--- /dev/null
+++ b/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
+subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97"
diff --git a/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg
new file mode 100644
index 00000000..3419bc30
--- /dev/null
+++ b/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475"
diff --git a/config/submodule/coreboot/default/nasm-2.16.01.tar.bz2/module.cfg b/config/submodule/coreboot/default/nasm-2.16.01.tar.bz2/module.cfg
new file mode 100644
index 00000000..53f022b4
--- /dev/null
+++ b/config/submodule/coreboot/default/nasm-2.16.01.tar.bz2/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.01/nasm-2.16.01.tar.bz2"
+subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.01.tar.bz2"
+subhash="daecc50d0c04cfa1e8a09bbece808548478fc03834b0c3fb06a9da56d3b51697e2d09a469cef8a4761290cdfc65e0eb46d76b6ca11dfa1dcd1051882c5e7fd88"
diff --git a/config/submodule/coreboot/fam15h_rdimm/acpica-unix2-20190703.tar.gz/module.cfg b/config/submodule/coreboot/fam15h_rdimm/acpica-unix2-20190703.tar.gz/module.cfg
new file mode 100644
index 00000000..e839b77e
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_rdimm/acpica-unix2-20190703.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-20190703.tar.gz"
+subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix2-20190703.tar.gz"
+subhash="8445a6d354ce3bcbfb5159f4ec0312b1e910c0b1b2033a2300f892e4ac580abab4e3f5b4ded379f0036299359d307330511ab7053678cfd9031d7df4c365f555"
diff --git a/config/submodule/coreboot/fam15h_rdimm/binutils-2.32.tar.xz/module.cfg b/config/submodule/coreboot/fam15h_rdimm/binutils-2.32.tar.xz/module.cfg
new file mode 100644
index 00000000..b549e139
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_rdimm/binutils-2.32.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.32.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.32.tar.xz"
+subhash="d326408f12a03d9a61a9de56584c2af12f81c2e50d2d7e835d51565df8314df01575724afa1e43bd0db45cfc9916b41519b67dfce03232aa4978704492a6994a"
diff --git a/config/submodule/coreboot/fam15h_rdimm/gcc-8.3.0.tar.xz/module.cfg b/config/submodule/coreboot/fam15h_rdimm/gcc-8.3.0.tar.xz/module.cfg
new file mode 100644
index 00000000..6ce00577
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_rdimm/gcc-8.3.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-8.3.0/gcc-8.3.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-8.3.0/gcc-8.3.0.tar.xz"
+subhash="1811337ae3add9680cec64968a2509d085b6dc5b6783fc1e8c295e3e47416196fd1a3ad8dfe7e10be2276b4f62c357659ce2902f239f60a8648548231b4b5802"
diff --git a/config/submodule/coreboot/fam15h_rdimm/gmp-6.1.2.tar.xz/module.cfg b/config/submodule/coreboot/fam15h_rdimm/gmp-6.1.2.tar.xz/module.cfg
new file mode 100644
index 00000000..7caf1845
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_rdimm/gmp-6.1.2.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.1.2.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.1.2.tar.xz"
+subhash="9f098281c0593b76ee174b722936952671fab1dae353ce3ed436a31fe2bc9d542eca752353f6645b7077c1f395ab4fdd355c58e08e2a801368f1375690eee2c6"
diff --git a/config/submodule/coreboot/fam15h_rdimm/module.list b/config/submodule/coreboot/fam15h_rdimm/module.list
index de2154e6..747c8912 100644
--- a/config/submodule/coreboot/fam15h_rdimm/module.list
+++ b/config/submodule/coreboot/fam15h_rdimm/module.list
@@ -1,2 +1,9 @@
 3rdparty/blobs
 3rdparty/vboot
+util/crossgcc/tarballs/acpica-unix2-20190703.tar.gz
+util/crossgcc/tarballs/binutils-2.32.tar.xz
+util/crossgcc/tarballs/gcc-8.3.0.tar.xz
+util/crossgcc/tarballs/gmp-6.1.2.tar.xz
+util/crossgcc/tarballs/mpc-1.1.0.tar.gz
+util/crossgcc/tarballs/mpfr-4.0.2.tar.xz
+util/crossgcc/tarballs/tarballs/nasm-2.14.02.tar.bz2
diff --git a/config/submodule/coreboot/fam15h_rdimm/mpc-1.1.0.tar.gz/module.cfg b/config/submodule/coreboot/fam15h_rdimm/mpc-1.1.0.tar.gz/module.cfg
new file mode 100644
index 00000000..34e77772
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_rdimm/mpc-1.1.0.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.1.0.tar.gz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.1.0.tar.gz"
+subhash="72d657958b07c7812dc9c7cbae093118ce0e454c68a585bfb0e2fa559f1bf7c5f49b93906f580ab3f1073e5b595d23c6494d4d76b765d16dde857a18dd239628"
diff --git a/config/submodule/coreboot/fam15h_rdimm/mpfr-4.0.2.tar.xz/module.cfg b/config/submodule/coreboot/fam15h_rdimm/mpfr-4.0.2.tar.xz/module.cfg
new file mode 100644
index 00000000..e33b1804
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_rdimm/mpfr-4.0.2.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.0.2.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.0.2.tar.xz"
+subhash="d583555d08863bf36c89b289ae26bae353d9a31f08ee3894520992d2c26e5683c4c9c193d7ad139632f71c0a476d85ea76182702a98bf08dde7b6f65a54f8b88"
diff --git a/config/submodule/coreboot/fam15h_rdimm/nasm-2.14.02.tar.bz2/module.cfg b/config/submodule/coreboot/fam15h_rdimm/nasm-2.14.02.tar.bz2/module.cfg
new file mode 100644
index 00000000..63cb78cf
--- /dev/null
+++ b/config/submodule/coreboot/fam15h_rdimm/nasm-2.14.02.tar.bz2/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.14.02/nasm-2.14.02.tar.bz2"
+subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.14.02.tar.bz2"
+subhash="71e3d44736493b1a56d4230bc2e5519e858aaadde5d89a692f1472fad6755084460e36b42852707f4c862eff75d3f2c232aedcc4e61e9d9ffcc8c9ca6498292b"
diff --git a/config/submodule/coreboot/haswell/R06_28_23.tar.gz/module.cfg b/config/submodule/coreboot/haswell/R06_28_23.tar.gz/module.cfg
new file mode 100644
index 00000000..71ab78bc
--- /dev/null
+++ b/config/submodule/coreboot/haswell/R06_28_23.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/R06_28_23.tar.gz"
+subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/R06_28_23.tar.gz"
+subhash="d64091202866cd306fef08bbf95b585584331704fdbe5ef0bfa99c8f9cb188e51a52880625c8d6bc971b3d251c8b13686b43a013058cadda861efe09b219c1b0"
diff --git a/config/submodule/coreboot/haswell/binutils-2.42.tar.xz/module.cfg b/config/submodule/coreboot/haswell/binutils-2.42.tar.xz/module.cfg
new file mode 100644
index 00000000..370a52ec
--- /dev/null
+++ b/config/submodule/coreboot/haswell/binutils-2.42.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.42.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.42.tar.xz"
+subhash="155f3ba14cd220102f4f29a4f1e5cfee3c48aa03b74603460d05afb73c70d6657a9d87eee6eb88bf13203fe6f31177a5c9addc04384e956e7da8069c8ecd20a6"
diff --git a/config/submodule/coreboot/haswell/gcc-13.2.0.tar.xz/module.cfg b/config/submodule/coreboot/haswell/gcc-13.2.0.tar.xz/module.cfg
new file mode 100644
index 00000000..dbcc0805
--- /dev/null
+++ b/config/submodule/coreboot/haswell/gcc-13.2.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-13.2.0/gcc-13.2.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-13.2.0/gcc-13.2.0.tar.xz"
+subhash="d99e4826a70db04504467e349e9fbaedaa5870766cda7c5cab50cdebedc4be755ebca5b789e1232a34a20be1a0b60097de9280efe47bdb71c73251e30b0862a2"
diff --git a/config/submodule/coreboot/haswell/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/haswell/gmp-6.3.0.tar.xz/module.cfg
new file mode 100644
index 00000000..fe274faf
--- /dev/null
+++ b/config/submodule/coreboot/haswell/gmp-6.3.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz"
+subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2"
diff --git a/config/submodule/coreboot/haswell/module.list b/config/submodule/coreboot/haswell/module.list
index 3d968b1a..80e2cede 100644
--- a/config/submodule/coreboot/haswell/module.list
+++ b/config/submodule/coreboot/haswell/module.list
@@ -2,3 +2,10 @@
 3rdparty/libgfxinit
 3rdparty/libhwbase
 3rdparty/vboot
+util/crossgcc/tarballs/binutils-2.42.tar.xz
+util/crossgcc/tarballs/gcc-13.2.0.tar.xz
+util/crossgcc/tarballs/gmp-6.3.0.tar.xz
+util/crossgcc/tarballs/mpc-1.3.1.tar.gz
+util/crossgcc/tarballs/mpfr-4.2.1.tar.xz
+util/crossgcc/tarballs/nasm-2.16.01.tar.bz2
+util/crossgcc/tarballs/R06_28_23.tar.gz
diff --git a/config/submodule/coreboot/haswell/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/haswell/mpc-1.3.1.tar.gz/module.cfg
new file mode 100644
index 00000000..f98b6444
--- /dev/null
+++ b/config/submodule/coreboot/haswell/mpc-1.3.1.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
+subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97"
diff --git a/config/submodule/coreboot/haswell/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/haswell/mpfr-4.2.1.tar.xz/module.cfg
new file mode 100644
index 00000000..3419bc30
--- /dev/null
+++ b/config/submodule/coreboot/haswell/mpfr-4.2.1.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475"
diff --git a/config/submodule/coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg b/config/submodule/coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg
new file mode 100644
index 00000000..53f022b4
--- /dev/null
+++ b/config/submodule/coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.01/nasm-2.16.01.tar.bz2"
+subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.01.tar.bz2"
+subhash="daecc50d0c04cfa1e8a09bbece808548478fc03834b0c3fb06a9da56d3b51697e2d09a469cef8a4761290cdfc65e0eb46d76b6ca11dfa1dcd1051882c5e7fd88"
diff --git a/config/submodule/coreboot/i945/R10_20_22.tar.gz/module.cfg b/config/submodule/coreboot/i945/R10_20_22.tar.gz/module.cfg
new file mode 100644
index 00000000..3957836f
--- /dev/null
+++ b/config/submodule/coreboot/i945/R10_20_22.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/R10_20_22.tar.gz"
+subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/R10_20_22.tar.gz"
+subhash="2ea1892383dfeae4b0fa089bb68aa397af644775496ce2a2f8f6ac7ebbb13de499c00ddb2608f427354f8e6f6e6d26cdeb162a7061458f8e6181fb2633e7c43e"
diff --git a/config/submodule/coreboot/i945/binutils-2.37.tar.xz/module.cfg b/config/submodule/coreboot/i945/binutils-2.37.tar.xz/module.cfg
new file mode 100644
index 00000000..c0565a0d
--- /dev/null
+++ b/config/submodule/coreboot/i945/binutils-2.37.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.37.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.37.tar.xz"
+subhash="5c11aeef6935860a6819ed3a3c93371f052e52b4bdc5033da36037c1544d013b7f12cb8d561ec954fe7469a68f1b66f1a3cd53d5a3af7293635a90d69edd15e7"
diff --git a/config/submodule/coreboot/i945/gcc-11.2.0.tar.xz/module.cfg b/config/submodule/coreboot/i945/gcc-11.2.0.tar.xz/module.cfg
new file mode 100644
index 00000000..fb925dc8
--- /dev/null
+++ b/config/submodule/coreboot/i945/gcc-11.2.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-11.2.0/gcc-11.2.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-11.2.0/gcc-11.2.0.tar.xz"
+subhash="d53a0a966230895c54f01aea38696f818817b505f1e2bfa65e508753fcd01b2aedb4a61434f41f3a2ddbbd9f41384b96153c684ded3f0fa97c82758d9de5c7cf"
diff --git a/config/submodule/coreboot/i945/gmp-6.2.1.tar.xz/module.cfg b/config/submodule/coreboot/i945/gmp-6.2.1.tar.xz/module.cfg
new file mode 100644
index 00000000..2b15cd44
--- /dev/null
+++ b/config/submodule/coreboot/i945/gmp-6.2.1.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.2.1.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.2.1.tar.xz"
+subhash="c99be0950a1d05a0297d65641dd35b75b74466f7bf03c9e8a99895a3b2f9a0856cd17887738fa51cf7499781b65c049769271cbcb77d057d2e9f1ec52e07dd84"
diff --git a/config/submodule/coreboot/i945/module.list b/config/submodule/coreboot/i945/module.list
index 3d968b1a..9440e333 100644
--- a/config/submodule/coreboot/i945/module.list
+++ b/config/submodule/coreboot/i945/module.list
@@ -2,3 +2,10 @@
 3rdparty/libgfxinit
 3rdparty/libhwbase
 3rdparty/vboot
+util/crossgcc/tarballs/binutils-2.37.tar.xz
+util/crossgcc/tarballs/gcc-11.2.0.tar.xz
+util/crossgcc/tarballs/gmp-6.2.1.tar.xz
+util/crossgcc/tarballs/mpc-1.3.1.tar.gz
+util/crossgcc/tarballs/mpfr-4.2.0.tar.xz
+util/crossgcc/tarballs/nasm-2.15.05.tar.bz2
+util/crossgcc/tarballs/R10_20_22.tar.gz
diff --git a/config/submodule/coreboot/i945/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/i945/mpc-1.3.1.tar.gz/module.cfg
new file mode 100644
index 00000000..f98b6444
--- /dev/null
+++ b/config/submodule/coreboot/i945/mpc-1.3.1.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
+subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97"
diff --git a/config/submodule/coreboot/i945/mpfr-4.2.0.tar.xz/module.cfg b/config/submodule/coreboot/i945/mpfr-4.2.0.tar.xz/module.cfg
new file mode 100644
index 00000000..618fb3b2
--- /dev/null
+++ b/config/submodule/coreboot/i945/mpfr-4.2.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.0.tar.xz"
+subhash="58e843125884ca58837ae5159cd4092af09e8f21931a2efd19c15de057c9d1dc0753ae95c592e2ce59a727fbc491af776db8b00a055320413cdcf2033b90505c"
diff --git a/config/submodule/coreboot/i945/nasm-2.15.05.tar.bz2/module.cfg b/config/submodule/coreboot/i945/nasm-2.15.05.tar.bz2/module.cfg
new file mode 100644
index 00000000..8cc5d518
--- /dev/null
+++ b/config/submodule/coreboot/i945/nasm-2.15.05.tar.bz2/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.15.05/nasm-2.15.05.tar.bz2"
+subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.15.05.tar.bz2"
+subhash="e608222eea4970249f0ee1638207b3368fb43b87117cfdb2788b2c7fd6e221f567ee8dd9b910f9e0c4837dc4866606cd9baf5c3266b81188037059b79635ea79"
diff --git a/script/trees b/script/trees
index e413f610..dc8b7988 100755
--- a/script/trees
+++ b/script/trees
@@ -39,6 +39,8 @@ main()
 	cfgsdir="config/$project"
 	listfile="$datadir/build.list" # needed on multi, optional on single
 
+	remkdir "${tmpgit%/*}"
+
 	_cmd="build_projects"
 	singletree "$project" || _cmd="build_targets"
 	$_cmd $@

From 77e482aae607e0c9d13ff6263823f816db2c5372 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 10:42:10 +0100
Subject: [PATCH 0513/1549] git.sh: simplify nuke()

do not over-engineer such a trivial thing.

seriously. all we're doing is nuking some files.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 25 ++++---------------------
 1 file changed, 4 insertions(+), 21 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 5fe41fb3..23110ff3 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -181,27 +181,10 @@ move_repo()
 # called from script/trees when downloading sources.
 nuke()
 {
-	del="n"
-	pjcfgdir="${1%/}"
-	pjsrcdir="${2%/}"
-	pjsrcdir="${pjsrcdir#src/}"
-	[ ! -f "config/$pjcfgdir/nuke.list" ] && return 0
+	e "config/${1%/}/nuke.list" f missing && return 0
 
 	while read -r nukefile; do
-		rmf="$(realpath "src/$pjsrcdir/$nukefile" 2>/dev/null)" || \
-		    continue
-		[ -L "$rmf" ] && continue # we will delete the actual file
-		[ "${rmf#"$PWD/src/$pjsrcdir"}" = "$rmf" ] && continue
-		[ "${rmf#"$PWD/src/"}" = "$pjsrcdir" ] && continue
-		rmf="${rmf#"$PWD/"}"
-		[ -e "$rmf" ] || continue
-		del="y"
-		rm -Rf "$rmf" || $err "$nuke pjcfgdir: can't rm \"$nukefile\""
-		printf "nuke %s: deleted \"%s\"\n" "$pjcfgdir" "$rmf"
-	done < "config/$pjcfgdir/nuke.list"
-
-	[ "${del}" = "y" ] && return 0
-	printf "nuke %s: no defined files exist in dir, src/%s\n" 1>&2 \
-	    "$pjcfgdir" "$pjsrcdir"
-	printf "(this is not an error)\n" 1>&2
+		rmf="${2%/}/$nukefile" && [ -L "$rmf" ] && continue
+		e "$rmf" e missing || rm -Rf "$rmf" || $err "!rm $rmf, ${2%/}"
+	done < "config/${1%/}/nuke.list"; return 0
 }

From 1cede024d6c2c6964dbbeb7dca51af5bb01e9714 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 10:48:28 +0100
Subject: [PATCH 0514/1549] git.sh: simplify link_crossgcc()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 23110ff3..f362450d 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -163,8 +163,7 @@ git_am_patches()
 link_crossgcc()
 {
 	(
-	cd "$tmpgit/util" || $err "prep $1: !cd $tmpgit/util"
-	rm -Rf crossgcc || $err "prep $1: !rm xgcc"
+	x_ cd "$tmpgit/util" && x_ rm -Rf crossgcc
 	ln -s "../../$xtree/util/crossgcc" crossgcc || $err "$1: !xgcc link"
 	) || $err "$1: !xgcc link"
 }

From 9cdf419295a248e8853ca7c9cc98df90990aca6c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 10:49:58 +0100
Subject: [PATCH 0515/1549] git.sh: further simplify nuke()

it's a very compact nuke

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index f362450d..f0f6f210 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -180,9 +180,7 @@ move_repo()
 # called from script/trees when downloading sources.
 nuke()
 {
-	e "config/${1%/}/nuke.list" f missing && return 0
-
-	while read -r nukefile; do
+	e "config/${1%/}/nuke.list" f missing || while read -r nukefile; do
 		rmf="${2%/}/$nukefile" && [ -L "$rmf" ] && continue
 		e "$rmf" e missing || rm -Rf "$rmf" || $err "!rm $rmf, ${2%/}"
 	done < "config/${1%/}/nuke.list"; return 0

From 26df6e7ab29cc745e40beae867310089fe0a7cf3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 10:55:33 +0100
Subject: [PATCH 0516/1549] lib.sh: simplify singletree()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 9d66ea8d..fa15bd6a 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -223,8 +223,7 @@ e()
 singletree()
 {
 	for targetfile in "config/${1}/"*/target.cfg; do
-		[ ! -e "$targetfile" ] && continue
-		[ -f "$targetfile" ] && return 1
+		[ -e "$targetfile" ] && [ -f "$targetfile" ] && return 1
 	done
 }
 

From 75b39dbeb15c7ac0a942da84d1c0784e80b51156 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 10:58:19 +0100
Subject: [PATCH 0517/1549] lib.sh: fix redundancy in download()

it was only downloading the main url, even when
it should use the backup.

fix it by actually using the for loop variable.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index fa15bd6a..25b470bf 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -235,10 +235,10 @@ download()
 	x_ mkdir -p "${3%/*}"
 	for url in "$1" "$2"; do
 		[ "$dl_fail" = "n" ] && break
-		[ -z "$1" ] && continue
+		[ -z "$url" ] && continue
 		x_ rm -f "$3"
-		curl --location --retry 3 -A "$_ua" "$1" -o "$3" || \
-		    wget --tries 3 -U "$_ua" "$1" -O "$3" || continue
+		curl --location --retry 3 -A "$_ua" "$url" -o "$3" || \
+		    wget --tries 3 -U "$_ua" "$url" -O "$3" || continue
 		vendor_checksum "$4" "$3" || dl_fail="n"
 	done
 	[ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: file missing"; return 0

From 3440e1f651623cd909c6a2a17a024e754950a61b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 11:04:08 +0100
Subject: [PATCH 0518/1549] lib.sh: simplify download()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 25b470bf..5244ce45 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -232,15 +232,14 @@ download()
 	dl_fail="y" # 1 url, 2 url backup, 3 destination, 4 checksum
 	vendor_checksum "$4" "$3" || dl_fail="n"
 	[ "$dl_fail" = "n" ] && e "$3" f && return 0
-	x_ mkdir -p "${3%/*}"
-	for url in "$1" "$2"; do
+	x_ mkdir -p "${3%/*}" && for url in "$1" "$2"; do
 		[ "$dl_fail" = "n" ] && break
 		[ -z "$url" ] && continue
 		x_ rm -f "$3"
 		curl --location --retry 3 -A "$_ua" "$url" -o "$3" || \
 		    wget --tries 3 -U "$_ua" "$url" -O "$3" || continue
 		vendor_checksum "$4" "$3" || dl_fail="n"
-	done
+	done;
 	[ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: file missing"; return 0
 }
 

From f3f5b99cecefe7d768173988f021490a50a1cac3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 11:04:25 +0100
Subject: [PATCH 0519/1549] lib.sh: hide stderr on download()

on the initial check, the output is confusing because
it will say "checksum verification failed" if the
file doesn't already exist, but then goes to download.

only say checksum failed if a download occured, and the
check failed, otherwise report nothing except that the
file already exists.

this will not reduce the ability to debug issues later
on, and it will reduce the amount of confusion for users.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 5244ce45..f72c785e 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -230,7 +230,7 @@ singletree()
 download()
 {
 	dl_fail="y" # 1 url, 2 url backup, 3 destination, 4 checksum
-	vendor_checksum "$4" "$3" || dl_fail="n"
+	vendor_checksum "$4" "$3" 2>/dev/null || dl_fail="n"
 	[ "$dl_fail" = "n" ] && e "$3" f && return 0
 	x_ mkdir -p "${3%/*}" && for url in "$1" "$2"; do
 		[ "$dl_fail" = "n" ] && break

From 3478b28821335398a07866276657fcc725104d24 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 11:07:07 +0100
Subject: [PATCH 0520/1549] lib.sh: less confusing error in download()

don't say "file missing", because it may be present!

instead, say that the download failed. this covers both
contexts: internet failed and thus no file present, or
the file is present but checksum verification failed.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index f72c785e..cf076388 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -240,7 +240,7 @@ download()
 		    wget --tries 3 -U "$_ua" "$url" -O "$3" || continue
 		vendor_checksum "$4" "$3" || dl_fail="n"
 	done;
-	[ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: file missing"; return 0
+	[ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: not downloaded"; return 0
 }
 
 vendor_checksum()

From 6a3d8a9600a8eabceaeae54bb0394d89ff9372fa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 11:43:47 +0100
Subject: [PATCH 0521/1549] git.sh: fix deletion path in nuke()

i accidentally forgot to include src/ in the prefix

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/git.sh b/include/git.sh
index f0f6f210..71dd61a1 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -181,7 +181,7 @@ move_repo()
 nuke()
 {
 	e "config/${1%/}/nuke.list" f missing || while read -r nukefile; do
-		rmf="${2%/}/$nukefile" && [ -L "$rmf" ] && continue
+		rmf="src/${2%/}/$nukefile" && [ -L "$rmf" ] && continue
 		e "$rmf" e missing || rm -Rf "$rmf" || $err "!rm $rmf, ${2%/}"
 	done < "config/${1%/}/nuke.list"; return 0
 }

From fbcdf33f93149700a69bb588fdb7e9b4ea632037 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 11:55:30 +0100
Subject: [PATCH 0522/1549] git.sh: download xtree *before*, not after

downloading it after means that if an error occurs
when downloading the xtree project, the main project
will still be there and nothing will mandate the
downloading of the xtree project. whereas, if we
grab the xtree project first, then the main project
won't get saved to src/

this makes the build system a bit more resilient under
fault conditions, but otherwise doesn't change behaviour.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 71dd61a1..cd0dffa5 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -56,6 +56,8 @@ fetch_project_repo()
 	[ -z "${loc+x}" ] && $err "fetch_project_repo $project: loc not set"
 	[ -z "${url+x}" ] && $err "fetch_project_repo $project: url not set"
 
+	[ -n "$xtree" ] && [ ! -d "src/coreboot/$xtree" ] && \
+		x_ ./update trees -f coreboot "$xtree"
 	[ -z "$depend" ] || for d in $depend ; do
 		printf "'%s' needs dependency '%s'; grabbing '%s' now\n" \
 		    "$project" "$d" "$d"
@@ -172,8 +174,6 @@ move_repo()
 {
 	[ "$1" = "${1%/*}" ] || x_ mkdir -p "${1%/*}"
 	mv "$tmpgit" "$1" || $err "git_prep: !mv $tmpgit $1"
-	[ -n "$xtree" ] && [ ! -d "src/coreboot/$xtree" ] && \
-		x_ ./update trees -f coreboot "$xtree"; return 0
 }
 
 # can delete from multi- and single-tree projects.

From 86eb566b131b4e71dce0a911a0d97890338fbe9f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 15:23:50 +0100
Subject: [PATCH 0523/1549] lib.sh: fix regression

i was being a bit too clever about some optimisations

revert this change. otherwise, nothing will download
or build

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index cf076388..b3a76879 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -223,7 +223,8 @@ e()
 singletree()
 {
 	for targetfile in "config/${1}/"*/target.cfg; do
-		[ -e "$targetfile" ] && [ -f "$targetfile" ] && return 1
+		[ -e "$targetfile" ] || continue
+		[ -f "$targetfile" ] && return 1
 	done
 }
 

From a0710ef9cac6e9f27852676d1bafa5d8c5f8ac47 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 15:27:03 +0100
Subject: [PATCH 0524/1549] git.sh: hide e() output on for loop

this for loop is a hack to make sure that all the
sources get nuked (using nuke.list files).

hide the messages so that they do not appear when
running just any command in the trees script.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/git.sh b/include/git.sh
index cd0dffa5..3ee27fc6 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -66,7 +66,8 @@ fetch_project_repo()
 	clone_project
 
 	for x in config/git/*; do
-		[ -f "$x" ] && nuke "${x##*/}" "src/${x##*/}"; continue
+		[ -f "$x" ] && nuke "${x##*/}" "src/${x##*/}" 2>/dev/null; \
+		    continue
 	done
 }
 

From e80c4b73ceb10c38a93c769e681afb947d9dfb1c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 15:37:13 +0100
Subject: [PATCH 0525/1549] create a lock file during builds

prevent duplicate main instances of the build
system from running

the lock file is deleted when the parent process
exits, alongside the tmpdir deletion

the build system must only ever be run ot one
instance at a time, per work directory

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .gitignore     |  1 +
 build          |  4 +++-
 include/lib.sh | 17 +++++++++--------
 3 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/.gitignore b/.gitignore
index 25c27d4c..d6c27f5d 100644
--- a/.gitignore
+++ b/.gitignore
@@ -30,3 +30,4 @@
 /src/
 /CHANGELOG
 /todo.txt
+/lock
diff --git a/build b/build
index 74ea1de6..bfd865c2 100755
--- a/build
+++ b/build
@@ -124,7 +124,8 @@ fetch_trees()
 
 fail()
 {
-	tmp_cleanup || printf "WARNING: can't rm tmpdir: %s\n" "$tmpdir" 1>&2
+	tmp_cleanup || printf "WARNING: can't rm tmp files: %s\n" "$tmpdir" \
+	    1>&2
 	err_ "${1}"
 }
 
@@ -132,6 +133,7 @@ tmp_cleanup()
 {
 	[ "$tmpdir_was_set" = "n" ] || return 0
 	rm -Rf "$tmpdir" || return 1
+	rm -f lock || return 1
 }
 
 main $@
diff --git a/include/lib.sh b/include/lib.sh
index b3a76879..b41645fb 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -65,27 +65,28 @@ install_packages()
 id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
 [ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
 
-# if "y": a coreboot target won't be built if target.cfg says release="n"
-# (this is used to exclude certain build targets from releases)
-
-[ -z "${XBMK_RELEASE+x}" ] && xbmk_release="n"
-[ -z "$xbmk_release" ] && xbmk_release="$XBMK_RELEASE"
-[ "$xbmk_release" = "n" ] || [ "$xbmk_release" = "y" ] || xbmk_release="n"
-export XBMK_RELEASE="$xbmk_release"
-
 [ -z "${TMPDIR+x}" ] && tmpdir_was_set="n"
 if [ "$tmpdir_was_set" = "y" ]; then
 	[ "${TMPDIR%_*}" = "/tmp/xbmk" ] || tmpdir_was_set="n"
 fi
 if [ "$tmpdir_was_set" = "n" ]; then
+	[ -f "lock" ] && $err "The 'lock' file exists. Is a build running?"
 	export TMPDIR="/tmp"
 	tmpdir="$(mktemp -d -t xbmk_XXXXXXXX)"
 	export TMPDIR="$tmpdir"
+	touch lock || $err "cannot create 'lock' file"
 else
 	export TMPDIR="$TMPDIR"
 	tmpdir="$TMPDIR"
 fi
 
+# if "y": a coreboot target won't be built if target.cfg says release="n"
+# (this is used to exclude certain build targets from releases)
+[ -z "${XBMK_RELEASE+x}" ] && xbmk_release="n"
+[ -z "$xbmk_release" ] && xbmk_release="$XBMK_RELEASE"
+[ "$xbmk_release" = "n" ] || [ "$xbmk_release" = "y" ] || xbmk_release="n"
+export XBMK_RELEASE="$xbmk_release"
+
 [ -z "${XBMK_THREADS+x}" ] || threads="$XBMK_THREADS"
 [ -z "$threads" ] && threads=1
 expr "X$threads" : "X-\{0,1\}[0123456789][0123456789]*$" \

From 78426a97e57d3cfe77d8189a10a3c10125284426 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 15:44:20 +0100
Subject: [PATCH 0526/1549] lib.sh: more useful lock message

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index b41645fb..c2ad87ed 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -70,7 +70,8 @@ if [ "$tmpdir_was_set" = "y" ]; then
 	[ "${TMPDIR%_*}" = "/tmp/xbmk" ] || tmpdir_was_set="n"
 fi
 if [ "$tmpdir_was_set" = "n" ]; then
-	[ -f "lock" ] && $err "The 'lock' file exists. Is a build running?"
+	[ -f "lock" ] && \
+	    $err "$PWD/lock exists. If a build isn't going, delete and re-run."
 	export TMPDIR="/tmp"
 	tmpdir="$(mktemp -d -t xbmk_XXXXXXXX)"
 	export TMPDIR="$tmpdir"

From 1799a33663fdfc28577dca3afccad26eefd829e3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 15:47:51 +0100
Subject: [PATCH 0527/1549] build: also make a lock file during release build

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/build b/build
index bfd865c2..bec2c67b 100755
--- a/build
+++ b/build
@@ -78,6 +78,7 @@ mkrelease()
 	[ -e "$vdir" ] && $err "already exists: \"$vdir\""
 	mkdir -p "$vdir" || $err "mkvdir: !mkdir -p \"$vdir\""
 	git clone . "$srcdir" || $err "mkdir: !gitclone \"$srcdir\""
+	touch "$srcdir/lock" || $err "can't make lock file in $srcdir/"
 
 	build_release
 
@@ -95,6 +96,7 @@ build_release()
 
 	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
 	    --abbrev-commit > "$srcdir/CHANGELOG" || $err "!gitlog $srcdir"
+	rm -f "$srcdir/lock" || $err "can't remove lock file in $srcdir"
 
 	(
 	cd "${srcdir%/*}" || $err "$_xm: mktarball \"$srcdir\""
@@ -102,6 +104,8 @@ build_release()
 	) || $err "can't create src tarball"
 	[ "$mode" = "src" ] && return 0
 
+	touch "$srcdir/lock" || $err "can't make lock file in $srcdir/"
+
 	(
 	cd "$srcdir" || $err "$_xm: 2 !cd \"$srcdir\""
 	./build roms all || $err "$_xm: roms-all"

From d33556c6ae548415a274c0a10bb122535c2fad9a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 15:57:53 +0100
Subject: [PATCH 0528/1549] trees: exit with error if project undefined

i was originally looser about this, because i also wanted
the trees script to generically run "make" from any
directory, but this behaviour was error-prone and it is
no longer used in the build system.

disable it, in the interest of stability.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/script/trees b/script/trees
index dc8b7988..68d4f94b 100755
--- a/script/trees
+++ b/script/trees
@@ -34,6 +34,9 @@ main()
 	done
 	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
 	[ -z "$project" ] && $err "project name not specified"
+
+	[ -f "config/git/$project" ] || $err "project '$project' not defined"
+
 	elfdir="elf/$project"
 	datadir="config/data/$project"
 	cfgsdir="config/$project"

From c5441bb9f538ca45468db21c1c62f45680349a3d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 16:06:07 +0100
Subject: [PATCH 0529/1549] re-add ability to use cbfs grub.cfg as default

i removed this before, when making grub multi-tree,
because the design i used in an earlier version of
the patch actually added the grub.elf generation
to grub source itself, but then i decided to hack
around the grub build system from lbmk/cbmk instead

re-add this functionality, so that users can easily
insert their own custom grub.cfg into cbfs without
needing to re-build their image.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/grub/memdisk.cfg | 10 ++++++++++
 script/trees                 |  4 +++-
 2 files changed, 13 insertions(+), 1 deletion(-)
 create mode 100644 config/data/grub/memdisk.cfg

diff --git a/config/data/grub/memdisk.cfg b/config/data/grub/memdisk.cfg
new file mode 100644
index 00000000..543e421d
--- /dev/null
+++ b/config/data/grub/memdisk.cfg
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+# Copyright (C) 2023 Leah Rowe <leah@libreboot.org>
+
+set prefix=(memdisk)/boot/grub
+
+if [ -f (cbfsdisk)/grub.cfg ]; then
+	source (cbfsdisk)/grub.cfg
+else
+	source (memdisk)/boot/grub/grub_default.cfg
+fi
diff --git a/script/trees b/script/trees
index 68d4f94b..4d9a5d08 100755
--- a/script/trees
+++ b/script/trees
@@ -286,7 +286,9 @@ mkpayload_grub()
 	    -O i386-coreboot -o "${cdir}/grub.elf" -d "${cdir}/grub-core/" \
 	    --fonts= --themes= --locales=  --modules="$grub_modules" \
 	    --install-modules="$grub_install_modules" \
-	    "/boot/grub/grub.cfg=${cdir}/.config" || $err "$tree: !mkgrub"
+	    "/boot/grub/grub_default.cfg=${cdir}/.config" \
+	    "/boot/grub/grub.cfg=$grubdata/memdisk.cfg" || \
+	    $err "$tree: cannot build grub.elf"
 }
 
 copy_elf()

From 2ee186aee3aa3ab9619ed9549bd3b82909dcfbd0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 9 Jun 2024 18:48:58 +0100
Subject: [PATCH 0530/1549] minor code cleanup in the build system

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             | 3 +--
 include/git.sh    | 3 +--
 include/vendor.sh | 3 +--
 script/roms       | 7 +++----
 4 files changed, 6 insertions(+), 10 deletions(-)

diff --git a/build b/build
index bec2c67b..19ed8875 100755
--- a/build
+++ b/build
@@ -128,8 +128,7 @@ fetch_trees()
 
 fail()
 {
-	tmp_cleanup || printf "WARNING: can't rm tmp files: %s\n" "$tmpdir" \
-	    1>&2
+	tmp_cleanup || printf "WARNING: can't rm tmpfiles: %s\n" "$tmpdir" 1>&2
 	err_ "${1}"
 }
 
diff --git a/include/git.sh b/include/git.sh
index 3ee27fc6..46b63014 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -11,8 +11,7 @@ fetch_project_trees()
 	[ ! -d "src/$project/$project" ] && x_ mkdir -p "src/$project" \
 	    && fetch_project_repo "$project"
 	fetch_config
-	e "src/$project/$tree" d && return 0
-	prepare_new_tree
+	e "src/$project/$tree" d || prepare_new_tree; return 0
 }
 
 fetch_config()
diff --git a/include/vendor.sh b/include/vendor.sh
index 4a0e7ae6..b2fc5346 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -131,8 +131,7 @@ mkdirs()
 
 	mkdir -p "${1%/*}" || $err "mkdirs: !mkdir -p ${1%/*}"
 	remkdir "$appdir"
-	extract_archive "$_dl" "$appdir" || \
-	    [ "$2" = "extract_e6400vga" ] || \
+	extract_archive "$_dl" "$appdir" || [ "$2" = "extract_e6400vga" ] || \
 	    $err "mkdirs $1 $2: !extract"; return 0
 }
 
diff --git a/script/roms b/script/roms
index 79b716ff..3ccd8728 100755
--- a/script/roms
+++ b/script/roms
@@ -152,10 +152,9 @@ configure_target()
 
 	[ -n "$_scandisk" ] && grub_scan_disk="$_scandisk"
 	[ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata"
-	_ata=""
-	_ahci=""
-	_nvme=""
-	_grub_scan_disk=""
+
+	eval "$(setvars "" _ata _ahci _nvme _grub_scan_disk)"
+
 	for _disk in $grub_scan_disk; do
 		[ "$_disk" != "nvme" ] && [ "$_disk" != "ahci" ] && \
 		    [ "$_disk" != "ata" ] && _grub_scan_disk="nvme ahci ata" \

From 1952db55540606b2fb00ddd4be9e358dbc99ef8b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 11 Jun 2024 10:44:49 +0100
Subject: [PATCH 0531/1549] fix nasm download path for coreboot/fam15h

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/submodule/coreboot/fam15h_rdimm/module.list | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/submodule/coreboot/fam15h_rdimm/module.list b/config/submodule/coreboot/fam15h_rdimm/module.list
index 747c8912..64f09aea 100644
--- a/config/submodule/coreboot/fam15h_rdimm/module.list
+++ b/config/submodule/coreboot/fam15h_rdimm/module.list
@@ -6,4 +6,4 @@ util/crossgcc/tarballs/gcc-8.3.0.tar.xz
 util/crossgcc/tarballs/gmp-6.1.2.tar.xz
 util/crossgcc/tarballs/mpc-1.1.0.tar.gz
 util/crossgcc/tarballs/mpfr-4.0.2.tar.xz
-util/crossgcc/tarballs/tarballs/nasm-2.14.02.tar.bz2
+util/crossgcc/tarballs/nasm-2.14.02.tar.bz2

From 0b37653ab908093a108cfe3cbcb4e8d378428d26 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 12 Jun 2024 00:58:22 +0100
Subject: [PATCH 0532/1549] grub: only enable nvme if needed on a board

remove nvme support from the "default" grub tree

now there are three trees:

* default: no xhci or nvme patches
* nvme: contains nvme support
* xhci: contains xhci and nvme support

this is in case a bug like lbmk issue #216 ever occurs
again, as referenced before during lbmk audit 5

there is no indication that the nvme patch causes any
issues, but after previous experience i want to be sure

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/g43t_am3/target.cfg           |    1 +
 config/coreboot/g43t_am3_16mb/target.cfg      |    1 +
 config/coreboot/ga_g41m_es2l/target.cfg       |    1 +
 config/coreboot/hp8200sff_4mb/target.cfg      |    1 +
 config/coreboot/hp8200sff_8mb/target.cfg      |    1 +
 config/coreboot/hp8300cmt_16mb/target.cfg     |    1 +
 config/coreboot/kcma_d8-udimm_16mb/target.cfg |    1 +
 config/coreboot/kcma_d8_rdimm_16mb/target.cfg |    1 +
 config/coreboot/kcma_d8_rdimm_2mb/target.cfg  |    1 +
 config/coreboot/kcma_d8_udimm_2mb/target.cfg  |    1 +
 .../coreboot/kgpe_d16_rdimm_16mb/target.cfg   |    1 +
 config/coreboot/kgpe_d16_rdimm_2mb/target.cfg |    1 +
 .../coreboot/kgpe_d16_udimm_16mb/target.cfg   |    1 +
 config/coreboot/kgpe_d16_udimm_2mb/target.cfg |    1 +
 config/coreboot/t1650_12mb/target.cfg         |    1 +
 config/data/grub/module/default               |    1 -
 config/data/grub/module/nvme                  |  156 +
 config/grub/default/config/payload            |   20 +-
 config/grub/nvme/config/payload               |  289 ++
 ...missing-characters-for-borders-arrow.patch |   90 +
 ...-the-name-libreboot-in-the-grub-menu.patch |   25 +
 .../0002-luks2/0003-Add-CC0-license.patch     |   42 +
 .../0004-Define-GRUB_UINT32_MAX.patch         |   39 +
 .../0005-Add-Argon2-algorithm.patch           | 2611 +++++++++++++++++
 ...Error-on-missing-Argon2id-parameters.patch |   58 +
 .../0007-Compile-with-Argon2id-support.patch  |   83 +
 ...8-Make-grub-install-work-with-Argon2.patch |   26 +
 ...-coreboot-force-scancodes2-translate.patch |  107 +
 ...outs-don-t-print-Unknown-key-message.patch |   38 +
 ...-missing-prefix-errors-on-the-screen.patch |  102 +
 ...on-t-print-error-if-module-not-found.patch |   34 +
 ...003-don-t-print-empty-error-messages.patch |   31 +
 ...-native-NVMe-driver-based-on-SeaBIOS.patch |    0
 config/grub/nvme/target.cfg                   |    5 +
 config/submodule/grub/nvme/gnulib/module.cfg  |    3 +
 config/submodule/grub/nvme/module.list        |    1 +
 36 files changed, 3756 insertions(+), 20 deletions(-)
 create mode 100755 config/data/grub/module/nvme
 create mode 100644 config/grub/nvme/config/payload
 create mode 100644 config/grub/nvme/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
 create mode 100644 config/grub/nvme/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
 create mode 100644 config/grub/nvme/patches/0002-luks2/0003-Add-CC0-license.patch
 create mode 100644 config/grub/nvme/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch
 create mode 100644 config/grub/nvme/patches/0002-luks2/0005-Add-Argon2-algorithm.patch
 create mode 100644 config/grub/nvme/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch
 create mode 100644 config/grub/nvme/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch
 create mode 100644 config/grub/nvme/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch
 create mode 100644 config/grub/nvme/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
 create mode 100644 config/grub/nvme/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
 create mode 100644 config/grub/nvme/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
 create mode 100644 config/grub/nvme/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
 create mode 100644 config/grub/nvme/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
 rename config/grub/{default => nvme}/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch (100%)
 create mode 100644 config/grub/nvme/target.cfg
 create mode 100644 config/submodule/grub/nvme/gnulib/module.cfg
 create mode 100644 config/submodule/grub/nvme/module.list

diff --git a/config/coreboot/g43t_am3/target.cfg b/config/coreboot/g43t_am3/target.cfg
index 13f2a260..f0e838fb 100644
--- a/config/coreboot/g43t_am3/target.cfg
+++ b/config/coreboot/g43t_am3/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grub_timeout=10
+grubtree="nvme"
diff --git a/config/coreboot/g43t_am3_16mb/target.cfg b/config/coreboot/g43t_am3_16mb/target.cfg
index bbe8a9fb..533d8b5a 100644
--- a/config/coreboot/g43t_am3_16mb/target.cfg
+++ b/config/coreboot/g43t_am3_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_memtest="y"
 grub_timeout=10
 release="n"
+grubtree="nvme"
diff --git a/config/coreboot/ga_g41m_es2l/target.cfg b/config/coreboot/ga_g41m_es2l/target.cfg
index 13f2a260..f0e838fb 100644
--- a/config/coreboot/ga_g41m_es2l/target.cfg
+++ b/config/coreboot/ga_g41m_es2l/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grub_timeout=10
+grubtree="nvme"
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 950a1223..82169ae7 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_timeout=10
 grub_scan_disk="nvme ahci"
+grubtree="nvme"
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 950a1223..82169ae7 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_timeout=10
 grub_scan_disk="nvme ahci"
+grubtree="nvme"
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index 950a1223..82169ae7 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_timeout=10
 grub_scan_disk="nvme ahci"
+grubtree="nvme"
diff --git a/config/coreboot/kcma_d8-udimm_16mb/target.cfg b/config/coreboot/kcma_d8-udimm_16mb/target.cfg
index 1dc344a6..749c4e46 100644
--- a/config/coreboot/kcma_d8-udimm_16mb/target.cfg
+++ b/config/coreboot/kcma_d8-udimm_16mb/target.cfg
@@ -7,3 +7,4 @@ payload_memtest="y"
 xlang="c"
 grub_timout=10
 grub_scan_disk="nvme ahci"
+grubtree="nvme"
diff --git a/config/coreboot/kcma_d8_rdimm_16mb/target.cfg b/config/coreboot/kcma_d8_rdimm_16mb/target.cfg
index b5ebb46e..80d2018e 100644
--- a/config/coreboot/kcma_d8_rdimm_16mb/target.cfg
+++ b/config/coreboot/kcma_d8_rdimm_16mb/target.cfg
@@ -6,3 +6,4 @@ payload_memtest="y"
 xlang="c"
 grub_timeout=10
 grub_scan_disk="nvme ahci"
+grubtree="nvme"
diff --git a/config/coreboot/kcma_d8_rdimm_2mb/target.cfg b/config/coreboot/kcma_d8_rdimm_2mb/target.cfg
index eaee5b1a..744b6e10 100644
--- a/config/coreboot/kcma_d8_rdimm_2mb/target.cfg
+++ b/config/coreboot/kcma_d8_rdimm_2mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
+grubtree="nvme"
diff --git a/config/coreboot/kcma_d8_udimm_2mb/target.cfg b/config/coreboot/kcma_d8_udimm_2mb/target.cfg
index 852b9e63..d4079eb4 100644
--- a/config/coreboot/kcma_d8_udimm_2mb/target.cfg
+++ b/config/coreboot/kcma_d8_udimm_2mb/target.cfg
@@ -7,3 +7,4 @@ payload_memtest="y"
 xlang="c"
 grub_timeout=10
 grub_scan_disk="nvme ahci"
+grubtree="nvme"
diff --git a/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg b/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg
index b5ebb46e..80d2018e 100644
--- a/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg
+++ b/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg
@@ -6,3 +6,4 @@ payload_memtest="y"
 xlang="c"
 grub_timeout=10
 grub_scan_disk="nvme ahci"
+grubtree="nvme"
diff --git a/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg b/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg
index b5ebb46e..80d2018e 100644
--- a/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg
+++ b/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg
@@ -6,3 +6,4 @@ payload_memtest="y"
 xlang="c"
 grub_timeout=10
 grub_scan_disk="nvme ahci"
+grubtree="nvme"
diff --git a/config/coreboot/kgpe_d16_udimm_16mb/target.cfg b/config/coreboot/kgpe_d16_udimm_16mb/target.cfg
index 852b9e63..d4079eb4 100644
--- a/config/coreboot/kgpe_d16_udimm_16mb/target.cfg
+++ b/config/coreboot/kgpe_d16_udimm_16mb/target.cfg
@@ -7,3 +7,4 @@ payload_memtest="y"
 xlang="c"
 grub_timeout=10
 grub_scan_disk="nvme ahci"
+grubtree="nvme"
diff --git a/config/coreboot/kgpe_d16_udimm_2mb/target.cfg b/config/coreboot/kgpe_d16_udimm_2mb/target.cfg
index 852b9e63..d4079eb4 100644
--- a/config/coreboot/kgpe_d16_udimm_2mb/target.cfg
+++ b/config/coreboot/kgpe_d16_udimm_2mb/target.cfg
@@ -7,3 +7,4 @@ payload_memtest="y"
 xlang="c"
 grub_timeout=10
 grub_scan_disk="nvme ahci"
+grubtree="nvme"
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index ebf3fca1..a2b3d31f 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
+grubtree="nvme"
diff --git a/config/data/grub/module/default b/config/data/grub/module/default
index 503c61c8..3555ad11 100755
--- a/config/data/grub/module/default
+++ b/config/data/grub/module/default
@@ -103,7 +103,6 @@ multiboot2 \
 nativedisk \
 normal \
 ntfs \
-nvme \
 ohci \
 part_bsd \
 part_dfly \
diff --git a/config/data/grub/module/nvme b/config/data/grub/module/nvme
new file mode 100755
index 00000000..503c61c8
--- /dev/null
+++ b/config/data/grub/module/nvme
@@ -0,0 +1,156 @@
+# Install modules (installed, but not automatically loaded)
+grub_install_modules=" \
+hexdump \
+newc \
+odc \
+usbserial_common \
+usbserial_ftdi \
+usbserial_pl2303 \
+usbserial_usbdebug \
+video_colors \
+"
+# Modules (and always loaded)
+grub_modules=" \
+acpi \
+ahci \
+at_keyboard \
+all_video \
+ata \
+bitmap \
+bitmap_scale \
+boot \
+bsd \
+btrfs \
+cat \
+cbfs \
+cbls \
+cbmemc \
+cbtime \
+chain \
+configfile \
+cpio \
+cpio_be \
+crc64 \
+crypto \
+cryptodisk \
+diskfilter \
+echo \
+ehci \
+eval \
+exfat \
+elf \
+ext2 \
+fat \
+f2fs \
+gcry_arcfour \
+gcry_blowfish \
+gcry_camellia \
+gcry_cast5 \
+gcry_crc \
+gcry_des \
+gcry_dsa \
+gcry_idea \
+gcry_md4 \
+gcry_md5 \
+gcry_rfc2268 \
+gcry_rijndael \
+gcry_rmd160 \
+gcry_rsa \
+gcry_seed \
+gcry_serpent \
+gcry_sha1 \
+gcry_sha256 \
+gcry_sha512 \
+gcry_tiger \
+gcry_twofish \
+gcry_whirlpool \
+geli \
+gfxmenu \
+gfxterm_background \
+gfxterm_menu \
+gzio \
+hashsum \
+halt \
+help \
+iorw \
+iso9660 \
+jpeg \
+json \
+keylayouts \
+keystatus \
+linux \
+linux16 \
+loadenv \
+loopback \
+ls \
+lsacpi \
+lsmmap \
+lspci \
+luks \
+luks2 \
+argon2 \
+lvm \
+lzopio \
+mdraid09 \
+mdraid09_be \
+mdraid1x \
+memdisk \
+memrw \
+minicmd \
+mmap \
+multiboot \
+multiboot2 \
+nativedisk \
+normal \
+ntfs \
+nvme \
+ohci \
+part_bsd \
+part_dfly \
+part_gpt \
+part_msdos \
+password \
+password_pbkdf2 \
+pata \
+pbkdf2 \
+pcidump \
+pgp \
+play \
+png \
+procfs \
+raid5rec \
+raid6rec \
+read \
+reboot \
+regexp \
+romfs \
+scsi \
+search \
+search_fs_file \
+search_fs_uuid \
+search_label \
+serial \
+syslinuxcfg \
+setjmp \
+setpci \
+spkmodem \
+squash4 \
+sleep \
+tar \
+test \
+true \
+uhci \
+udf \
+ufs1 \
+ufs1_be \
+ufs2 \
+usb \
+usb_keyboard \
+usbms \
+xfs \
+xzio \
+zfs \
+zfscrypt \
+zfsinfo \
+zstd \
+"
diff --git a/config/grub/default/config/payload b/config/grub/default/config/payload
index f81d5930..a405ae25 100644
--- a/config/grub/default/config/payload
+++ b/config/grub/default/config/payload
@@ -54,7 +54,7 @@ if [ -f (cbfsdisk)/timeout.cfg ]; then
 else	
 	set timeout=5
 fi
-set grub_scan_disk="nvme ahci ata"
+set grub_scan_disk="ahci ata"
 if [ -f (cbfsdisk)/scan.cfg ]; then
 	source (cbfsdisk)/scan.cfg
 fi
@@ -87,17 +87,11 @@ function search_grub {
 		for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
 			if [ "${1}" != "nvme" ]; then
 				try_user_config "(${1}${i},${part})"
-			else
-				# TODO: do we care about other namesapces
-				try_user_config "(nvme${i}n1,${part})"
 			fi
 		done
 		if [ "${1}" != "nvme" ]; then
 			# raw devices e.g. (ahci0) instead of (ahci0,1)
 			try_user_config "(${1}${i})"
-		else
-			# TODO: do we care about other namesapces
-			try_user_config "(nvme${i}n1)"
 		fi
 	done
 	echo # Insert newline
@@ -123,17 +117,11 @@ function search_isolinux {
 		for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
 			if [ "${1}" != "nvme" ]; then
 				try_isolinux_config "(${1}${i},${part})"
-			else
-				# TODO: see above
-				try_isolinux_config "(nvme${i}n1,${part})"
 			fi
 		done
 		if [ "${1}" != "nvme" ]; then
 			# raw devices e.g. (usb0) instead of (usb0,1)
 			try_isolinux_config "(${1}${i})"
-		else
-			# TODO: do we care about other namesapces
-			try_isolinux_config "(nvme${i}n1)"
 		fi
 	done
 	echo # Insert newline
@@ -175,9 +163,6 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 					bootdev="${bootdev} (ahci${i},${part})"
 				elif [ "${grub_disk}" = "ata" ]; then
 					bootdev="${bootdev} (ata${i},${part})"
-				elif [ "${grub_disk}" = "nvme" ]; then
-					# TODO: do we care about other namesapces
-					bootdev="${bootdev} (nvme${i}n1,${part})"
 				fi
 			done
 		done
@@ -214,9 +199,6 @@ menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on AHCI  [a]' --hotkey='a'
 menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on ATA/IDE  [d]' --hotkey='d' {
 	search_bootcfg ata
 }
-menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on NVMe  [e]' --hotkey='e' {
-	search_bootcfg nvme
-}
 if [ -f (cbfsdisk)/grub.cfg ]; then
 menuentry 'Load configuration (grub.cfg) in CBFS  [t]' --hotkey='t' {
 	set root='(cbfsdisk)'
diff --git a/config/grub/nvme/config/payload b/config/grub/nvme/config/payload
new file mode 100644
index 00000000..f81d5930
--- /dev/null
+++ b/config/grub/nvme/config/payload
@@ -0,0 +1,289 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+# Copyright (C) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (C) 2015 Klemens Nanni <contact@autoboot.org>
+
+set prefix=(memdisk)/boot/grub
+
+insmod at_keyboard
+insmod usb_keyboard
+insmod nativedisk
+insmod ehci
+insmod ohci
+insmod uhci
+insmod usb
+insmod usbms
+insmod regexp
+
+terminal_input --append at_keyboard
+terminal_input --append usb_keyboard
+terminal_output --append cbmemc
+
+# User interface overrides wherever "keystatus" is supported
+# Keep SHIFT key pressed before powering on to disable graphics
+if keystatus --shift; then
+	terminal_output --append vga_text
+else
+	gfxpayload=keep
+	terminal_output --append gfxterm
+
+	if [ -f (cbfsdisk)/background.png ]; then
+		insmod png
+		background_image (cbfsdisk)/background.png
+	elif [ -f (cbfsdisk)/background.jpg ]; then
+		insmod jpeg
+		background_image (cbfsdisk)/background.jpg
+	fi
+fi
+
+# Keep CTRL pressed to enable default serial terminal (COM1 or the like)
+if keystatus --ctrl; then
+	serial
+	terminal_input --append serial
+	terminal_output --append serial
+fi
+
+# Keep ALT pressed to enable spkmodem
+if keystatus --alt; then
+	terminal_output --append spkmodem
+fi
+
+
+set default="0"
+if [ -f (cbfsdisk)/timeout.cfg ]; then
+	source (cbfsdisk)/timeout.cfg
+else	
+	set timeout=5
+fi
+set grub_scan_disk="nvme ahci ata"
+if [ -f (cbfsdisk)/scan.cfg ]; then
+	source (cbfsdisk)/scan.cfg
+fi
+
+if [ -f (cbfsdisk)/keymap.gkb ]; then
+	keymap (cbfsdisk)/keymap.gkb
+fi
+
+function really_try_user_config {
+	set root="${1}"
+
+	if [ -f /"${2}"/grub.cfg ]; then
+		unset superusers
+		configfile /"${2}"/grub.cfg
+	fi
+}
+
+function try_user_config {
+	# The @/... entries are for cases where the BTRFS filesystem is being used
+	for dir in grub boot/grub @/grub @/boot/grub grub2 boot/grub2 @/grub2 @/boot/grub2 boot @/boot; do
+		really_try_user_config "${1}" "${dir}"
+	done
+	for dir in ubuntu debian redhat; do
+		really_try_user_config "${1}" "EFI/${dir}"
+	done
+}
+function search_grub {
+	echo -n "Attempting to load grub.cfg from '${1}' devices"
+	for i in 0 1 2 3 4 5 6 7 8; do
+		for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
+			if [ "${1}" != "nvme" ]; then
+				try_user_config "(${1}${i},${part})"
+			else
+				# TODO: do we care about other namesapces
+				try_user_config "(nvme${i}n1,${part})"
+			fi
+		done
+		if [ "${1}" != "nvme" ]; then
+			# raw devices e.g. (ahci0) instead of (ahci0,1)
+			try_user_config "(${1}${i})"
+		else
+			# TODO: do we care about other namesapces
+			try_user_config "(nvme${i}n1)"
+		fi
+	done
+	echo # Insert newline
+}
+
+function try_isolinux_config {
+	set root="${1}"
+	for dir in '' /boot /EFI /@ /@/boot; do
+		if [ -f "${dir}"/isolinux/isolinux.cfg ]; then
+			syslinux_configfile -i "${dir}"/isolinux/isolinux.cfg
+		elif [ -f "${dir}"/syslinux/syslinux.cfg ]; then
+			syslinux_configfile -s "${dir}"/syslinux/syslinux.cfg
+		elif [ -f "${dir}"/syslinux/extlinux.conf ]; then
+			syslinux_configfile -s "${dir}"/syslinux/extlinux.conf
+		elif [ -f "${dir}"/extlinux/extlinux.conf ]; then
+			syslinux_configfile -s "${dir}"/extlinux/extlinux.conf
+		fi
+	done
+}
+function search_isolinux {
+	echo "\nAttempting to parse iso/sys/extlinux config from '${1}' devices"
+	for i in 0 1 2 3 4 5 6 7 8; do
+		for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
+			if [ "${1}" != "nvme" ]; then
+				try_isolinux_config "(${1}${i},${part})"
+			else
+				# TODO: see above
+				try_isolinux_config "(nvme${i}n1,${part})"
+			fi
+		done
+		if [ "${1}" != "nvme" ]; then
+			# raw devices e.g. (usb0) instead of (usb0,1)
+			try_isolinux_config "(${1}${i})"
+		else
+			# TODO: do we care about other namesapces
+			try_isolinux_config "(nvme${i}n1)"
+		fi
+	done
+	echo # Insert newline
+}
+function try_bootcfg {
+	try_user_config "${1}"
+	try_isolinux_config "${1}"
+}
+function search_bootcfg {
+	search_grub "${1}"
+	search_isolinux "${1}"
+}
+menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o' {
+
+	for grub_disk in ${grub_scan_disk}; do
+		search_bootcfg ${grub_disk}
+	done
+
+	# grub device enumeration is very slow, so checks are hardcoded
+
+	# TODO: add more strings, based on what distros set up when
+	# the user select auto-partitioning on those installers
+	lvmvol="lvm/grubcrypt-bootvol lvm/grubcrypt-rootvol"
+
+	raidvol="md/0 md/1 md/2 md/3 md/4 md/5 md/6 md/7 md/8 md/9"
+
+	# in practise, doing multiple redundant checks is perfectly fast and
+	# TODO: optimize grub itself, and use */? here for everything
+
+	for vol in ${lvmvol} ${raidvol} ; do
+		try_bootcfg "${vol}"
+	done
+
+	unset bootdev
+	for grub_disk in ${grub_scan_disk}; do
+		for i in 0 1 2 3 4 5 6 7 8; do
+			for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
+				if [ "${grub_disk}" = "ahci" ]; then
+					bootdev="${bootdev} (ahci${i},${part})"
+				elif [ "${grub_disk}" = "ata" ]; then
+					bootdev="${bootdev} (ata${i},${part})"
+				elif [ "${grub_disk}" = "nvme" ]; then
+					# TODO: do we care about other namesapces
+					bootdev="${bootdev} (nvme${i}n1,${part})"
+				fi
+			done
+		done
+	done
+
+	set pager=0
+	echo -n "Attempting to unlock encrypted volumes"
+	for dev in ${bootdev} ${lvmvol} ${raidvol}; do
+		if cryptomount "${dev}" ; then break ; fi
+	done
+	set pager=1
+	echo
+
+	# after cryptomount, lvm volumes might be available
+	for vol in ${lvmvol}; do
+		try_bootcfg "${vol}"
+	done
+
+	search_bootcfg crypto
+
+	for vol in lvm/* ; do
+		try_bootcfg "${vol}"
+	done
+
+	true # Prevent pager requiring to accept each line instead of whole screen
+}
+
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on USB  [s]' --hotkey='s' {
+	search_bootcfg usb
+}
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on AHCI  [a]' --hotkey='a' {
+	search_bootcfg ahci
+}
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on ATA/IDE  [d]' --hotkey='d' {
+	search_bootcfg ata
+}
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on NVMe  [e]' --hotkey='e' {
+	search_bootcfg nvme
+}
+if [ -f (cbfsdisk)/grub.cfg ]; then
+menuentry 'Load configuration (grub.cfg) in CBFS  [t]' --hotkey='t' {
+	set root='(cbfsdisk)'
+	if [ -f /grub.cfg ]; then
+		configfile /grub.cfg
+	fi
+}
+fi
+if [ -f (cbfsdisk)/grubtest.cfg ]; then
+menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey='t' {
+	set root='(cbfsdisk)'
+	if [ -f /grubtest.cfg ]; then
+		configfile /grubtest.cfg
+	fi
+}
+fi
+if [ -f (cbfsdisk)/seabios.elf ]; then
+menuentry 'Load SeaBIOS (payload) [b]' --hotkey='b' {
+	set root='cbfsdisk'
+	chainloader /seabios.elf
+}
+fi
+if [ -f (cbfsdisk)/img/grub2 ]; then
+menuentry 'Return to SeaBIOS [b]' --hotkey='b' {
+	set root='cbfsdisk'
+	chainloader /fallback/payload
+}
+fi
+menuentry 'Poweroff  [p]' --hotkey='p' {
+	halt
+}
+menuentry 'Reboot  [r]' --hotkey='r' {
+	reboot
+}
+if [ -f (cbfsdisk)/img/memtest ]; then
+menuentry 'Load MemTest86+  [m]' --hotkey='m' {
+	set root='cbfsdisk'
+	chainloader /img/memtest
+}
+fi
+
+submenu 'Other  [z]' --hotkey='z' {
+	menuentry 'Enable default serial terminal  [s]' --hotkey='s'  {
+		serial
+		terminal_input --append serial
+		terminal_output --append serial
+	}
+
+	menuentry 'Disable default serial terminal' {
+		terminal_input --remove serial
+		terminal_output --remove serial
+	}
+
+	menuentry 'Enable gfxterm' {
+		terminal_output --append gfxterm
+		terminal_output --remove vga_text
+	}
+	menuentry 'Disable gfxterm  [g]' --hotkey='g'  {
+		terminal_output --remove gfxterm
+		terminal_output --append vga_text
+	}
+
+	menuentry 'Enable spkmodem  [a]' --hotkey='a' {
+		terminal_output --append spkmodem
+	}
+
+	menuentry 'Disable spkmodem  [z]' --hotkey='z' {
+		terminal_output --remove spkmodem
+	}
+}
diff --git a/config/grub/nvme/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/nvme/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
new file mode 100644
index 00000000..183f5a91
--- /dev/null
+++ b/config/grub/nvme/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -0,0 +1,90 @@
+From ce13539fe2103abbd991814d995e06cf96e485f7 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 31 Oct 2021 03:47:05 +0000
+Subject: [PATCH 1/3] mitigate grub's missing characters for borders/arrow
+ characters
+
+This cleans up the display on the main screen in GRUB.
+
+Just don't draw a border, at all.
+---
+ grub-core/normal/menu_text.c | 49 ++----------------------------------
+ 1 file changed, 2 insertions(+), 47 deletions(-)
+
+diff --git a/grub-core/normal/menu_text.c b/grub-core/normal/menu_text.c
+index b1321eb26..e76094dfd 100644
+--- a/grub-core/normal/menu_text.c
++++ b/grub-core/normal/menu_text.c
+@@ -108,47 +108,6 @@ grub_print_message_indented (const char *msg, int margin_left, int margin_right,
+   grub_print_message_indented_real (msg, margin_left, margin_right, term, 0);
+ }
+ 
+-static void
+-draw_border (struct grub_term_output *term, const struct grub_term_screen_geometry *geo)
+-{
+-  int i;
+-
+-  grub_term_setcolorstate (term, GRUB_TERM_COLOR_NORMAL);
+-
+-  grub_term_gotoxy (term, (struct grub_term_coordinate) { geo->first_entry_x - 1,
+-	geo->first_entry_y - 1 });
+-  grub_putcode (GRUB_UNICODE_CORNER_UL, term);
+-  for (i = 0; i < geo->entry_width + 1; i++)
+-    grub_putcode (GRUB_UNICODE_HLINE, term);
+-  grub_putcode (GRUB_UNICODE_CORNER_UR, term);
+-
+-  for (i = 0; i < geo->num_entries; i++)
+-    {
+-      grub_term_gotoxy (term, (struct grub_term_coordinate) { geo->first_entry_x - 1,
+-	    geo->first_entry_y + i });
+-      grub_putcode (GRUB_UNICODE_VLINE, term);
+-      grub_term_gotoxy (term,
+-			(struct grub_term_coordinate) { geo->first_entry_x + geo->entry_width + 1,
+-			    geo->first_entry_y + i });
+-      grub_putcode (GRUB_UNICODE_VLINE, term);
+-    }
+-
+-  grub_term_gotoxy (term,
+-		    (struct grub_term_coordinate) { geo->first_entry_x - 1,
+-			geo->first_entry_y - 1 + geo->num_entries + 1 });
+-  grub_putcode (GRUB_UNICODE_CORNER_LL, term);
+-  for (i = 0; i < geo->entry_width + 1; i++)
+-    grub_putcode (GRUB_UNICODE_HLINE, term);
+-  grub_putcode (GRUB_UNICODE_CORNER_LR, term);
+-
+-  grub_term_setcolorstate (term, GRUB_TERM_COLOR_NORMAL);
+-
+-  grub_term_gotoxy (term,
+-		    (struct grub_term_coordinate) { geo->first_entry_x - 1,
+-			(geo->first_entry_y - 1 + geo->num_entries
+-			 + GRUB_TERM_MARGIN + 1) });
+-}
+-
+ static int
+ print_message (int nested, int edit, struct grub_term_output *term, int dry_run)
+ {
+@@ -167,10 +126,8 @@ command-line or ESC to discard edits and return to the GRUB menu."),
+     {
+       char *msg_translated;
+ 
+-      msg_translated = grub_xasprintf (_("Use the %C and %C keys to select which "
+-					 "entry is highlighted."),
+-				       GRUB_UNICODE_UPARROW,
+-				       GRUB_UNICODE_DOWNARROW);
++      msg_translated = grub_xasprintf (_("Use the arrow keys to select which "
++					 "entry is highlighted."));
+       if (!msg_translated)
+ 	return 0;
+       ret += grub_print_message_indented_real (msg_translated, STANDARD_MARGIN,
+@@ -410,8 +367,6 @@ grub_menu_init_page (int nested, int edit,
+ 
+   grub_term_normal_color = grub_color_menu_normal;
+   grub_term_highlight_color = grub_color_menu_highlight;
+-  if (geo->border)
+-    draw_border (term, geo);
+   grub_term_normal_color = old_color_normal;
+   grub_term_highlight_color = old_color_highlight;
+   geo->timeout_y = geo->first_entry_y + geo->num_entries
+-- 
+2.25.1
+
diff --git a/config/grub/nvme/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/nvme/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
new file mode 100644
index 00000000..6ff97979
--- /dev/null
+++ b/config/grub/nvme/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -0,0 +1,25 @@
+From 70f9e72c3ff6381fe3519612de3b649c0cf26b9a Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sat, 19 Nov 2022 16:30:24 +0000
+Subject: [PATCH 2/3] say the name libreboot, in the grub menu
+
+---
+ grub-core/normal/main.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c
+index bd4431000..31308e16a 100644
+--- a/grub-core/normal/main.c
++++ b/grub-core/normal/main.c
+@@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term,
+ 
+   grub_term_cls (term);
+ 
+-  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
++  msg_formatted = grub_xasprintf (_("Libreboot 20240504 release, based on coreboot.    https://libreboot.org/"));
+   if (!msg_formatted)
+     return;
+ 
+-- 
+2.25.1
+
diff --git a/config/grub/nvme/patches/0002-luks2/0003-Add-CC0-license.patch b/config/grub/nvme/patches/0002-luks2/0003-Add-CC0-license.patch
new file mode 100644
index 00000000..dc9060c3
--- /dev/null
+++ b/config/grub/nvme/patches/0002-luks2/0003-Add-CC0-license.patch
@@ -0,0 +1,42 @@
+From de6e7cc62522ce1be21bd2f06e7c15cd234b5426 Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 1/6] Add CC0 license
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ grub-core/kern/dl.c           | 3 ++-
+ util/grub-module-verifierXX.c | 3 ++-
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
+index 0bf40caa6..4011e2d15 100644
+--- a/grub-core/kern/dl.c
++++ b/grub-core/kern/dl.c
+@@ -470,7 +470,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e)
+ 
+   if (grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3") == 0
+       || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3+") == 0
+-      || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv2+") == 0)
++      || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv2+") == 0
++      || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=CC0") == 0)
+     return GRUB_ERR_NONE;
+ 
+   return grub_error (GRUB_ERR_BAD_MODULE,
+diff --git a/util/grub-module-verifierXX.c b/util/grub-module-verifierXX.c
+index a42c20bd1..7157a30aa 100644
+--- a/util/grub-module-verifierXX.c
++++ b/util/grub-module-verifierXX.c
+@@ -236,7 +236,8 @@ check_license (const char * const filename,
+   Elf_Shdr *s = find_section (arch, e, ".module_license", module_size);
+   if (s && (strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=GPLv3") == 0
+ 	    || strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=GPLv3+") == 0
+-	    || strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=GPLv2+") == 0))
++	    || strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=GPLv2+") == 0
++	    || strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=CC0") == 0))
+     return;
+   grub_util_error ("%s: incompatible license", filename);
+ }
+-- 
+2.39.2
+
diff --git a/config/grub/nvme/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/nvme/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch
new file mode 100644
index 00000000..be875e67
--- /dev/null
+++ b/config/grub/nvme/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch
@@ -0,0 +1,39 @@
+From 9edaaffac91d593a439e44bac3b6f5558f5a8245 Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 2/6] Define GRUB_UINT32_MAX
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ include/grub/types.h | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/include/grub/types.h b/include/grub/types.h
+index 0d96006fe..a13f3a60b 100644
+--- a/include/grub/types.h
++++ b/include/grub/types.h
+@@ -156,6 +156,7 @@ typedef grub_int32_t	grub_ssize_t;
+ #define GRUB_SHRT_MAX 0x7fff
+ #define GRUB_SHRT_MIN (-GRUB_SHRT_MAX - 1)
+ #define GRUB_UINT_MAX 4294967295U
++#define GRUB_UINT32_MAX 4294967295U
+ #define GRUB_INT_MAX 0x7fffffff
+ #define GRUB_INT_MIN (-GRUB_INT_MAX - 1)
+ #define GRUB_INT32_MAX 2147483647
+@@ -177,6 +178,13 @@ typedef grub_int32_t	grub_ssize_t;
+ #define GRUB_TYPE_U_MAX(type) ((unsigned long long)((typeof (type))(~0)))
+ #define GRUB_TYPE_U_MIN(type) 0ULL
+ 
++# define GRUB_UINT32_C(x) x ## U
++# if GRUB_ULONG_MAX >> 31 >> 31 >> 1 == 1
++#  define GRUB_UINT64_C(x) x##UL
++# elif 1
++#  define GRUB_UINT64_C(x) x##ULL
++# endif
++
+ typedef grub_uint64_t grub_properly_aligned_t;
+ 
+ #define GRUB_PROPERLY_ALIGNED_ARRAY(name, size) grub_properly_aligned_t name[((size) + sizeof (grub_properly_aligned_t) - 1) / sizeof (grub_properly_aligned_t)]
+-- 
+2.39.2
+
diff --git a/config/grub/nvme/patches/0002-luks2/0005-Add-Argon2-algorithm.patch b/config/grub/nvme/patches/0002-luks2/0005-Add-Argon2-algorithm.patch
new file mode 100644
index 00000000..1c6b4f04
--- /dev/null
+++ b/config/grub/nvme/patches/0002-luks2/0005-Add-Argon2-algorithm.patch
@@ -0,0 +1,2611 @@
+From 5b63da5c4267933f573ca37ce39a073098c443ba Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 3/6] Add Argon2 algorithm
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ docs/grub-dev.texi                            |  64 +++
+ grub-core/Makefile.core.def                   |   8 +
+ grub-core/lib/argon2/LICENSE                  | 314 +++++++++++
+ grub-core/lib/argon2/argon2.c                 | 232 ++++++++
+ grub-core/lib/argon2/argon2.h                 | 264 +++++++++
+ grub-core/lib/argon2/blake2/blake2-impl.h     | 151 ++++++
+ grub-core/lib/argon2/blake2/blake2.h          |  89 +++
+ grub-core/lib/argon2/blake2/blake2b.c         | 388 ++++++++++++++
+ .../lib/argon2/blake2/blamka-round-ref.h      |  56 ++
+ grub-core/lib/argon2/core.c                   | 506 ++++++++++++++++++
+ grub-core/lib/argon2/core.h                   | 228 ++++++++
+ grub-core/lib/argon2/ref.c                    | 190 +++++++
+ 12 files changed, 2490 insertions(+)
+ create mode 100644 grub-core/lib/argon2/LICENSE
+ create mode 100644 grub-core/lib/argon2/argon2.c
+ create mode 100644 grub-core/lib/argon2/argon2.h
+ create mode 100644 grub-core/lib/argon2/blake2/blake2-impl.h
+ create mode 100644 grub-core/lib/argon2/blake2/blake2.h
+ create mode 100644 grub-core/lib/argon2/blake2/blake2b.c
+ create mode 100644 grub-core/lib/argon2/blake2/blamka-round-ref.h
+ create mode 100644 grub-core/lib/argon2/core.c
+ create mode 100644 grub-core/lib/argon2/core.h
+ create mode 100644 grub-core/lib/argon2/ref.c
+
+diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi
+index a695b02f0..313335a53 100644
+--- a/docs/grub-dev.texi
++++ b/docs/grub-dev.texi
+@@ -503,11 +503,75 @@ GRUB includes some code from other projects, and it is sometimes necessary
+ to update it.
+ 
+ @menu
++* Argon2::
+ * Gnulib::
+ * jsmn::
+ * minilzo::
+ @end menu
+ 
++@node Argon2
++@section Argon2
++
++Argon2 is a key derivation function used by LUKS2 in order to derive encryption
++keys from a user-provided password. GRUB imports the official reference
++implementation of Argon2 from @url{https://github.com/P-H-C/phc-winner-argon2}.
++In order to make the library usable for GRUB, we need to perform various
++conversions. This is mainly due to the fact that the imported code makes use of
++types and functions defined in the C standard library, which isn't available.
++Furthermore, using the POSIX wrapper library is not possible as the code needs
++to be part of the kernel.
++
++Updating the code can thus be performed like following:
++
++@example
++$ git clone https://github.com/P-H-C/phc-winner-argon2 argon2
++$ cp argon2/include/argon2.h argon2/src/@{argon2.c,core.c,core.h,ref.c@} \
++    grub-core/lib/argon2/
++$ cp argon2/src/blake2/@{blake2-impl.h,blake2.h,blake2b.c,blamka-round-ref.h@} \
++    grub-core/lib/argon2/blake2/
++$ sed -e 's/UINT32_C/GRUB_UINT32_C/g' \
++      -e 's/UINT64_C/GRUB_UINT64_C/g' \
++      -e 's/UINT32_MAX/GRUB_UINT32_MAX/g' \
++      -e 's/CHAR_BIT/GRUB_CHAR_BIT/g' \
++      -e 's/UINT_MAX/GRUB_UINT_MAX/g' \
++      -e 's/uintptr_t/grub_addr_t/g' \
++      -e 's/size_t/grub_size_t/g' \
++      -e 's/uint32_t/grub_uint32_t/g' \
++      -e 's/uint64_t/grub_uint64_t/g' \
++      -e 's/uint8_t/grub_uint8_t/g' \
++      -e 's/memset/grub_memset/g' \
++      -e 's/memcpy/grub_memcpy/g' \
++      -e 's/malloc/grub_malloc/g' \
++      -e 's/free/grub_free/g' \
++      -e 's/#elif _MSC_VER/#elif defined(_MSC_VER)/' \
++      grub-core/lib/argon2/@{*,blake2/*@}.@{c,h@} -i
++@end example
++
++Afterwards, you need to perform the following manual steps:
++
++@enumerate
++@item Remove all includes of standard library headers, "encoding.h" and
++      "thread.h".
++@item Add includes <grub/mm.h> and <grub/misc.h> to "argon2.h".
++@item Add include <grub/dl.h> and module license declaration to "argon2.c".
++@item Remove the following declarations and functions from "argon2.h" and
++     "argon2.c": argon2_type2string, argon2i_hash_encoded, argon2i_hash_raw,
++     argon2d_hash_encoded, argon2d_hash_raw, argon2id_hash_encoded,
++     argon2id_hash_raw, argon2_compare, argon2_verify, argon2i_verify,
++     argon2d_verify, argon2id_verify, argon2d_ctx, argon2i_ctx, argon2id_ctx,
++     argon2_verify_ctx, argon2d_verify_ctx, argon2i_verify_ctx,
++     argon2id_verify_ctx, argon2_encodedlen.
++@item Move the declaration of `clear_internal_memory()` in "blake2-impl.h" to
++      "blake2b.c".
++@item Remove code guarded by the ARGON2_NO_THREADS macro.
++@item Remove parameters `encoded` and `encodedlen` from `argon2_hash` and remove
++      the encoding block in that function.
++@item Remove parameter verifications in `validate_inputs()` for
++      ARGON2_MIN_PWD_LENGTH, ARGON2_MIN_SECRET, ARGON2_MIN_AD_LENGTH and
++      ARGON2_MAX_MEMORY to fix compiler warnings.
++@item Mark the function argon2_ctx as static.
++@end enumerate
++
+ @node Gnulib
+ @section Gnulib
+ 
+diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
+index d2cf29584..4a06789e5 100644
+--- a/grub-core/Makefile.core.def
++++ b/grub-core/Makefile.core.def
+@@ -1215,6 +1215,14 @@ module = {
+   common = lib/json/json.c;
+ };
+ 
++module = {
++  name = argon2;
++  common = lib/argon2/argon2.c;
++  common = lib/argon2/core.c;
++  common = lib/argon2/ref.c;
++  common = lib/argon2/blake2/blake2b.c;
++};
++
+ module = {
+   name = afsplitter;
+   common = disk/AFSplitter.c;
+diff --git a/grub-core/lib/argon2/LICENSE b/grub-core/lib/argon2/LICENSE
+new file mode 100644
+index 000000000..97aae2925
+--- /dev/null
++++ b/grub-core/lib/argon2/LICENSE
+@@ -0,0 +1,314 @@
++Argon2 reference source code package - reference C implementations
++
++Copyright 2015
++Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++
++You may use this work under the terms of a Creative Commons CC0 1.0
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++
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+diff --git a/grub-core/lib/argon2/argon2.c b/grub-core/lib/argon2/argon2.c
+new file mode 100644
+index 000000000..49532fe80
+--- /dev/null
++++ b/grub-core/lib/argon2/argon2.c
+@@ -0,0 +1,232 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#include <grub/dl.h>
++
++#include "argon2.h"
++#include "core.h"
++
++GRUB_MOD_LICENSE ("CC0");
++
++static int argon2_ctx(argon2_context *context, argon2_type type) {
++    /* 1. Validate all inputs */
++    int result = validate_inputs(context);
++    grub_uint32_t memory_blocks, segment_length;
++    argon2_instance_t instance;
++
++    if (ARGON2_OK != result) {
++        return result;
++    }
++
++    if (Argon2_d != type && Argon2_i != type && Argon2_id != type) {
++        return ARGON2_INCORRECT_TYPE;
++    }
++
++    /* 2. Align memory size */
++    /* Minimum memory_blocks = 8L blocks, where L is the number of lanes */
++    memory_blocks = context->m_cost;
++
++    if (memory_blocks < 2 * ARGON2_SYNC_POINTS * context->lanes) {
++        memory_blocks = 2 * ARGON2_SYNC_POINTS * context->lanes;
++    }
++
++    segment_length = memory_blocks / (context->lanes * ARGON2_SYNC_POINTS);
++    /* Ensure that all segments have equal length */
++    memory_blocks = segment_length * (context->lanes * ARGON2_SYNC_POINTS);
++
++    instance.version = context->version;
++    instance.memory = NULL;
++    instance.passes = context->t_cost;
++    instance.memory_blocks = memory_blocks;
++    instance.segment_length = segment_length;
++    instance.lane_length = segment_length * ARGON2_SYNC_POINTS;
++    instance.lanes = context->lanes;
++    instance.threads = context->threads;
++    instance.type = type;
++
++    if (instance.threads > instance.lanes) {
++        instance.threads = instance.lanes;
++    }
++
++    /* 3. Initialization: Hashing inputs, allocating memory, filling first
++     * blocks
++     */
++    result = initialize(&instance, context);
++
++    if (ARGON2_OK != result) {
++        return result;
++    }
++
++    /* 4. Filling memory */
++    result = fill_memory_blocks(&instance);
++
++    if (ARGON2_OK != result) {
++        return result;
++    }
++    /* 5. Finalization */
++    finalize(context, &instance);
++
++    return ARGON2_OK;
++}
++
++int argon2_hash(const grub_uint32_t t_cost, const grub_uint32_t m_cost,
++                const grub_uint32_t parallelism, const void *pwd,
++                const grub_size_t pwdlen, const void *salt, const grub_size_t saltlen,
++                void *hash, const grub_size_t hashlen, argon2_type type,
++                const grub_uint32_t version){
++
++    argon2_context context;
++    int result;
++    grub_uint8_t *out;
++
++    if (pwdlen > ARGON2_MAX_PWD_LENGTH) {
++        return ARGON2_PWD_TOO_LONG;
++    }
++
++    if (saltlen > ARGON2_MAX_SALT_LENGTH) {
++        return ARGON2_SALT_TOO_LONG;
++    }
++
++    if (hashlen > ARGON2_MAX_OUTLEN) {
++        return ARGON2_OUTPUT_TOO_LONG;
++    }
++
++    if (hashlen < ARGON2_MIN_OUTLEN) {
++        return ARGON2_OUTPUT_TOO_SHORT;
++    }
++
++    out = grub_malloc(hashlen);
++    if (!out) {
++        return ARGON2_MEMORY_ALLOCATION_ERROR;
++    }
++
++    context.out = (grub_uint8_t *)out;
++    context.outlen = (grub_uint32_t)hashlen;
++    context.pwd = CONST_CAST(grub_uint8_t *)pwd;
++    context.pwdlen = (grub_uint32_t)pwdlen;
++    context.salt = CONST_CAST(grub_uint8_t *)salt;
++    context.saltlen = (grub_uint32_t)saltlen;
++    context.secret = NULL;
++    context.secretlen = 0;
++    context.ad = NULL;
++    context.adlen = 0;
++    context.t_cost = t_cost;
++    context.m_cost = m_cost;
++    context.lanes = parallelism;
++    context.threads = parallelism;
++    context.allocate_cbk = NULL;
++    context.grub_free_cbk = NULL;
++    context.flags = ARGON2_DEFAULT_FLAGS;
++    context.version = version;
++
++    result = argon2_ctx(&context, type);
++
++    if (result != ARGON2_OK) {
++        clear_internal_memory(out, hashlen);
++        grub_free(out);
++        return result;
++    }
++
++    /* if raw hash requested, write it */
++    if (hash) {
++        grub_memcpy(hash, out, hashlen);
++    }
++
++    clear_internal_memory(out, hashlen);
++    grub_free(out);
++
++    return ARGON2_OK;
++}
++
++const char *argon2_error_message(int error_code) {
++    switch (error_code) {
++    case ARGON2_OK:
++        return "OK";
++    case ARGON2_OUTPUT_PTR_NULL:
++        return "Output pointer is NULL";
++    case ARGON2_OUTPUT_TOO_SHORT:
++        return "Output is too short";
++    case ARGON2_OUTPUT_TOO_LONG:
++        return "Output is too long";
++    case ARGON2_PWD_TOO_SHORT:
++        return "Password is too short";
++    case ARGON2_PWD_TOO_LONG:
++        return "Password is too long";
++    case ARGON2_SALT_TOO_SHORT:
++        return "Salt is too short";
++    case ARGON2_SALT_TOO_LONG:
++        return "Salt is too long";
++    case ARGON2_AD_TOO_SHORT:
++        return "Associated data is too short";
++    case ARGON2_AD_TOO_LONG:
++        return "Associated data is too long";
++    case ARGON2_SECRET_TOO_SHORT:
++        return "Secret is too short";
++    case ARGON2_SECRET_TOO_LONG:
++        return "Secret is too long";
++    case ARGON2_TIME_TOO_SMALL:
++        return "Time cost is too small";
++    case ARGON2_TIME_TOO_LARGE:
++        return "Time cost is too large";
++    case ARGON2_MEMORY_TOO_LITTLE:
++        return "Memory cost is too small";
++    case ARGON2_MEMORY_TOO_MUCH:
++        return "Memory cost is too large";
++    case ARGON2_LANES_TOO_FEW:
++        return "Too few lanes";
++    case ARGON2_LANES_TOO_MANY:
++        return "Too many lanes";
++    case ARGON2_PWD_PTR_MISMATCH:
++        return "Password pointer is NULL, but password length is not 0";
++    case ARGON2_SALT_PTR_MISMATCH:
++        return "Salt pointer is NULL, but salt length is not 0";
++    case ARGON2_SECRET_PTR_MISMATCH:
++        return "Secret pointer is NULL, but secret length is not 0";
++    case ARGON2_AD_PTR_MISMATCH:
++        return "Associated data pointer is NULL, but ad length is not 0";
++    case ARGON2_MEMORY_ALLOCATION_ERROR:
++        return "Memory allocation error";
++    case ARGON2_FREE_MEMORY_CBK_NULL:
++        return "The grub_free memory callback is NULL";
++    case ARGON2_ALLOCATE_MEMORY_CBK_NULL:
++        return "The allocate memory callback is NULL";
++    case ARGON2_INCORRECT_PARAMETER:
++        return "Argon2_Context context is NULL";
++    case ARGON2_INCORRECT_TYPE:
++        return "There is no such version of Argon2";
++    case ARGON2_OUT_PTR_MISMATCH:
++        return "Output pointer mismatch";
++    case ARGON2_THREADS_TOO_FEW:
++        return "Not enough threads";
++    case ARGON2_THREADS_TOO_MANY:
++        return "Too many threads";
++    case ARGON2_MISSING_ARGS:
++        return "Missing arguments";
++    case ARGON2_ENCODING_FAIL:
++        return "Encoding failed";
++    case ARGON2_DECODING_FAIL:
++        return "Decoding failed";
++    case ARGON2_THREAD_FAIL:
++        return "Threading failure";
++    case ARGON2_DECODING_LENGTH_FAIL:
++        return "Some of encoded parameters are too long or too short";
++    case ARGON2_VERIFY_MISMATCH:
++        return "The password does not match the supplied hash";
++    default:
++        return "Unknown error code";
++    }
++}
+diff --git a/grub-core/lib/argon2/argon2.h b/grub-core/lib/argon2/argon2.h
+new file mode 100644
+index 000000000..129f7efbd
+--- /dev/null
++++ b/grub-core/lib/argon2/argon2.h
+@@ -0,0 +1,264 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef ARGON2_H
++#define ARGON2_H
++
++#include <grub/misc.h>
++#include <grub/mm.h>
++
++#if defined(__cplusplus)
++extern "C" {
++#endif
++
++/* Symbols visibility control */
++#ifdef A2_VISCTL
++#define ARGON2_PUBLIC __attribute__((visibility("default")))
++#define ARGON2_LOCAL __attribute__ ((visibility ("hidden")))
++#elif defined(_MSC_VER)
++#define ARGON2_PUBLIC __declspec(dllexport)
++#define ARGON2_LOCAL
++#else
++#define ARGON2_PUBLIC
++#define ARGON2_LOCAL
++#endif
++
++/*
++ * Argon2 input parameter restrictions
++ */
++
++/* Minimum and maximum number of lanes (degree of parallelism) */
++#define ARGON2_MIN_LANES GRUB_UINT32_C(1)
++#define ARGON2_MAX_LANES GRUB_UINT32_C(0xFFFFFF)
++
++/* Minimum and maximum number of threads */
++#define ARGON2_MIN_THREADS GRUB_UINT32_C(1)
++#define ARGON2_MAX_THREADS GRUB_UINT32_C(0xFFFFFF)
++
++/* Number of synchronization points between lanes per pass */
++#define ARGON2_SYNC_POINTS GRUB_UINT32_C(4)
++
++/* Minimum and maximum digest size in bytes */
++#define ARGON2_MIN_OUTLEN GRUB_UINT32_C(4)
++#define ARGON2_MAX_OUTLEN GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum number of memory blocks (each of BLOCK_SIZE bytes) */
++#define ARGON2_MIN_MEMORY (2 * ARGON2_SYNC_POINTS) /* 2 blocks per slice */
++
++#define ARGON2_MIN(a, b) ((a) < (b) ? (a) : (b))
++/* Max memory size is addressing-space/2, topping at 2^32 blocks (4 TB) */
++#define ARGON2_MAX_MEMORY_BITS                                                 \
++    ARGON2_MIN(GRUB_UINT32_C(32), (sizeof(void *) * GRUB_CHAR_BIT - 10 - 1))
++#define ARGON2_MAX_MEMORY                                                      \
++    ARGON2_MIN(GRUB_UINT32_C(0xFFFFFFFF), GRUB_UINT64_C(1) << ARGON2_MAX_MEMORY_BITS)
++
++/* Minimum and maximum number of passes */
++#define ARGON2_MIN_TIME GRUB_UINT32_C(1)
++#define ARGON2_MAX_TIME GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum password length in bytes */
++#define ARGON2_MIN_PWD_LENGTH GRUB_UINT32_C(0)
++#define ARGON2_MAX_PWD_LENGTH GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum associated data length in bytes */
++#define ARGON2_MIN_AD_LENGTH GRUB_UINT32_C(0)
++#define ARGON2_MAX_AD_LENGTH GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum salt length in bytes */
++#define ARGON2_MIN_SALT_LENGTH GRUB_UINT32_C(8)
++#define ARGON2_MAX_SALT_LENGTH GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum key length in bytes */
++#define ARGON2_MIN_SECRET GRUB_UINT32_C(0)
++#define ARGON2_MAX_SECRET GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Flags to determine which fields are securely wiped (default = no wipe). */
++#define ARGON2_DEFAULT_FLAGS GRUB_UINT32_C(0)
++#define ARGON2_FLAG_CLEAR_PASSWORD (GRUB_UINT32_C(1) << 0)
++#define ARGON2_FLAG_CLEAR_SECRET (GRUB_UINT32_C(1) << 1)
++
++/* Global flag to determine if we are wiping internal memory buffers. This flag
++ * is defined in core.c and defaults to 1 (wipe internal memory). */
++extern int FLAG_clear_internal_memory;
++
++/* Error codes */
++typedef enum Argon2_ErrorCodes {
++    ARGON2_OK = 0,
++
++    ARGON2_OUTPUT_PTR_NULL = -1,
++
++    ARGON2_OUTPUT_TOO_SHORT = -2,
++    ARGON2_OUTPUT_TOO_LONG = -3,
++
++    ARGON2_PWD_TOO_SHORT = -4,
++    ARGON2_PWD_TOO_LONG = -5,
++
++    ARGON2_SALT_TOO_SHORT = -6,
++    ARGON2_SALT_TOO_LONG = -7,
++
++    ARGON2_AD_TOO_SHORT = -8,
++    ARGON2_AD_TOO_LONG = -9,
++
++    ARGON2_SECRET_TOO_SHORT = -10,
++    ARGON2_SECRET_TOO_LONG = -11,
++
++    ARGON2_TIME_TOO_SMALL = -12,
++    ARGON2_TIME_TOO_LARGE = -13,
++
++    ARGON2_MEMORY_TOO_LITTLE = -14,
++    ARGON2_MEMORY_TOO_MUCH = -15,
++
++    ARGON2_LANES_TOO_FEW = -16,
++    ARGON2_LANES_TOO_MANY = -17,
++
++    ARGON2_PWD_PTR_MISMATCH = -18,    /* NULL ptr with non-zero length */
++    ARGON2_SALT_PTR_MISMATCH = -19,   /* NULL ptr with non-zero length */
++    ARGON2_SECRET_PTR_MISMATCH = -20, /* NULL ptr with non-zero length */
++    ARGON2_AD_PTR_MISMATCH = -21,     /* NULL ptr with non-zero length */
++
++    ARGON2_MEMORY_ALLOCATION_ERROR = -22,
++
++    ARGON2_FREE_MEMORY_CBK_NULL = -23,
++    ARGON2_ALLOCATE_MEMORY_CBK_NULL = -24,
++
++    ARGON2_INCORRECT_PARAMETER = -25,
++    ARGON2_INCORRECT_TYPE = -26,
++
++    ARGON2_OUT_PTR_MISMATCH = -27,
++
++    ARGON2_THREADS_TOO_FEW = -28,
++    ARGON2_THREADS_TOO_MANY = -29,
++
++    ARGON2_MISSING_ARGS = -30,
++
++    ARGON2_ENCODING_FAIL = -31,
++
++    ARGON2_DECODING_FAIL = -32,
++
++    ARGON2_THREAD_FAIL = -33,
++
++    ARGON2_DECODING_LENGTH_FAIL = -34,
++
++    ARGON2_VERIFY_MISMATCH = -35
++} argon2_error_codes;
++
++/* Memory allocator types --- for external allocation */
++typedef int (*allocate_fptr)(grub_uint8_t **memory, grub_size_t bytes_to_allocate);
++typedef void (*deallocate_fptr)(grub_uint8_t *memory, grub_size_t bytes_to_allocate);
++
++/* Argon2 external data structures */
++
++/*
++ *****
++ * Context: structure to hold Argon2 inputs:
++ *  output array and its length,
++ *  password and its length,
++ *  salt and its length,
++ *  secret and its length,
++ *  associated data and its length,
++ *  number of passes, amount of used memory (in KBytes, can be rounded up a bit)
++ *  number of parallel threads that will be run.
++ * All the parameters above affect the output hash value.
++ * Additionally, two function pointers can be provided to allocate and
++ * deallocate the memory (if NULL, memory will be allocated internally).
++ * Also, three flags indicate whether to erase password, secret as soon as they
++ * are pre-hashed (and thus not needed anymore), and the entire memory
++ *****
++ * Simplest situation: you have output array out[8], password is stored in
++ * pwd[32], salt is stored in salt[16], you do not have keys nor associated
++ * data. You need to spend 1 GB of RAM and you run 5 passes of Argon2d with
++ * 4 parallel lanes.
++ * You want to erase the password, but you're OK with last pass not being
++ * erased. You want to use the default memory allocator.
++ * Then you initialize:
++ Argon2_Context(out,8,pwd,32,salt,16,NULL,0,NULL,0,5,1<<20,4,4,NULL,NULL,true,false,false,false)
++ */
++typedef struct Argon2_Context {
++    grub_uint8_t *out;    /* output array */
++    grub_uint32_t outlen; /* digest length */
++
++    grub_uint8_t *pwd;    /* password array */
++    grub_uint32_t pwdlen; /* password length */
++
++    grub_uint8_t *salt;    /* salt array */
++    grub_uint32_t saltlen; /* salt length */
++
++    grub_uint8_t *secret;    /* key array */
++    grub_uint32_t secretlen; /* key length */
++
++    grub_uint8_t *ad;    /* associated data array */
++    grub_uint32_t adlen; /* associated data length */
++
++    grub_uint32_t t_cost;  /* number of passes */
++    grub_uint32_t m_cost;  /* amount of memory requested (KB) */
++    grub_uint32_t lanes;   /* number of lanes */
++    grub_uint32_t threads; /* maximum number of threads */
++
++    grub_uint32_t version; /* version number */
++
++    allocate_fptr allocate_cbk; /* pointer to memory allocator */
++    deallocate_fptr grub_free_cbk;   /* pointer to memory deallocator */
++
++    grub_uint32_t flags; /* array of bool options */
++} argon2_context;
++
++/* Argon2 primitive type */
++typedef enum Argon2_type {
++  Argon2_d = 0,
++  Argon2_i = 1,
++  Argon2_id = 2
++} argon2_type;
++
++/* Version of the algorithm */
++typedef enum Argon2_version {
++    ARGON2_VERSION_10 = 0x10,
++    ARGON2_VERSION_13 = 0x13,
++    ARGON2_VERSION_NUMBER = ARGON2_VERSION_13
++} argon2_version;
++
++/**
++ * Hashes a password with Argon2, producing a raw hash at @hash
++ * @param t_cost Number of iterations
++ * @param m_cost Sets memory usage to m_cost kibibytes
++ * @param parallelism Number of threads and compute lanes
++ * @param pwd Pointer to password
++ * @param pwdlen Password size in bytes
++ * @param salt Pointer to salt
++ * @param saltlen Salt size in bytes
++ * @param hash Buffer where to write the raw hash - updated by the function
++ * @param hashlen Desired length of the hash in bytes
++ * @pre   Different parallelism levels will give different results
++ * @pre   Returns ARGON2_OK if successful
++ */
++ARGON2_PUBLIC int argon2_hash(const grub_uint32_t t_cost, const grub_uint32_t m_cost,
++                              const grub_uint32_t parallelism, const void *pwd,
++                              const grub_size_t pwdlen, const void *salt,
++                              const grub_size_t saltlen, void *hash,
++                              const grub_size_t hashlen, argon2_type type,
++                              const grub_uint32_t version);
++
++/**
++ * Get the associated error message for given error code
++ * @return  The error message associated with the given error code
++ */
++ARGON2_PUBLIC const char *argon2_error_message(int error_code);
++
++#if defined(__cplusplus)
++}
++#endif
++
++#endif
+diff --git a/grub-core/lib/argon2/blake2/blake2-impl.h b/grub-core/lib/argon2/blake2/blake2-impl.h
+new file mode 100644
+index 000000000..3a795680b
+--- /dev/null
++++ b/grub-core/lib/argon2/blake2/blake2-impl.h
+@@ -0,0 +1,151 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef PORTABLE_BLAKE2_IMPL_H
++#define PORTABLE_BLAKE2_IMPL_H
++
++#if defined(_MSC_VER)
++#define BLAKE2_INLINE __inline
++#elif defined(__GNUC__) || defined(__clang__)
++#define BLAKE2_INLINE __inline__
++#else
++#define BLAKE2_INLINE
++#endif
++
++/* Argon2 Team - Begin Code */
++/*
++   Not an exhaustive list, but should cover the majority of modern platforms
++   Additionally, the code will always be correct---this is only a performance
++   tweak.
++*/
++#if (defined(__BYTE_ORDER__) &&                                                \
++     (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)) ||                           \
++    defined(__LITTLE_ENDIAN__) || defined(__ARMEL__) || defined(__MIPSEL__) || \
++    defined(__AARCH64EL__) || defined(__amd64__) || defined(__i386__) ||       \
++    defined(_M_IX86) || defined(_M_X64) || defined(_M_AMD64) ||                \
++    defined(_M_ARM)
++#define NATIVE_LITTLE_ENDIAN
++#endif
++/* Argon2 Team - End Code */
++
++static BLAKE2_INLINE grub_uint32_t load32(const void *src) {
++#if defined(NATIVE_LITTLE_ENDIAN)
++    grub_uint32_t w;
++    grub_memcpy(&w, src, sizeof w);
++    return w;
++#else
++    const grub_uint8_t *p = (const grub_uint8_t *)src;
++    grub_uint32_t w = *p++;
++    w |= (grub_uint32_t)(*p++) << 8;
++    w |= (grub_uint32_t)(*p++) << 16;
++    w |= (grub_uint32_t)(*p++) << 24;
++    return w;
++#endif
++}
++
++static BLAKE2_INLINE grub_uint64_t load64(const void *src) {
++#if defined(NATIVE_LITTLE_ENDIAN)
++    grub_uint64_t w;
++    grub_memcpy(&w, src, sizeof w);
++    return w;
++#else
++    const grub_uint8_t *p = (const grub_uint8_t *)src;
++    grub_uint64_t w = *p++;
++    w |= (grub_uint64_t)(*p++) << 8;
++    w |= (grub_uint64_t)(*p++) << 16;
++    w |= (grub_uint64_t)(*p++) << 24;
++    w |= (grub_uint64_t)(*p++) << 32;
++    w |= (grub_uint64_t)(*p++) << 40;
++    w |= (grub_uint64_t)(*p++) << 48;
++    w |= (grub_uint64_t)(*p++) << 56;
++    return w;
++#endif
++}
++
++static BLAKE2_INLINE void store32(void *dst, grub_uint32_t w) {
++#if defined(NATIVE_LITTLE_ENDIAN)
++    grub_memcpy(dst, &w, sizeof w);
++#else
++    grub_uint8_t *p = (grub_uint8_t *)dst;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++#endif
++}
++
++static BLAKE2_INLINE void store64(void *dst, grub_uint64_t w) {
++#if defined(NATIVE_LITTLE_ENDIAN)
++    grub_memcpy(dst, &w, sizeof w);
++#else
++    grub_uint8_t *p = (grub_uint8_t *)dst;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++#endif
++}
++
++static BLAKE2_INLINE grub_uint64_t load48(const void *src) {
++    const grub_uint8_t *p = (const grub_uint8_t *)src;
++    grub_uint64_t w = *p++;
++    w |= (grub_uint64_t)(*p++) << 8;
++    w |= (grub_uint64_t)(*p++) << 16;
++    w |= (grub_uint64_t)(*p++) << 24;
++    w |= (grub_uint64_t)(*p++) << 32;
++    w |= (grub_uint64_t)(*p++) << 40;
++    return w;
++}
++
++static BLAKE2_INLINE void store48(void *dst, grub_uint64_t w) {
++    grub_uint8_t *p = (grub_uint8_t *)dst;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++    w >>= 8;
++    *p++ = (grub_uint8_t)w;
++}
++
++static BLAKE2_INLINE grub_uint32_t rotr32(const grub_uint32_t w, const unsigned c) {
++    return (w >> c) | (w << (32 - c));
++}
++
++static BLAKE2_INLINE grub_uint64_t rotr64(const grub_uint64_t w, const unsigned c) {
++    return (w >> c) | (w << (64 - c));
++}
++
++#endif
+diff --git a/grub-core/lib/argon2/blake2/blake2.h b/grub-core/lib/argon2/blake2/blake2.h
+new file mode 100644
+index 000000000..4e8efeb22
+--- /dev/null
++++ b/grub-core/lib/argon2/blake2/blake2.h
+@@ -0,0 +1,89 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef PORTABLE_BLAKE2_H
++#define PORTABLE_BLAKE2_H
++
++#include "../argon2.h"
++
++#if defined(__cplusplus)
++extern "C" {
++#endif
++
++enum blake2b_constant {
++    BLAKE2B_BLOCKBYTES = 128,
++    BLAKE2B_OUTBYTES = 64,
++    BLAKE2B_KEYBYTES = 64,
++    BLAKE2B_SALTBYTES = 16,
++    BLAKE2B_PERSONALBYTES = 16
++};
++
++#pragma pack(push, 1)
++typedef struct __blake2b_param {
++    grub_uint8_t digest_length;                   /* 1 */
++    grub_uint8_t key_length;                      /* 2 */
++    grub_uint8_t fanout;                          /* 3 */
++    grub_uint8_t depth;                           /* 4 */
++    grub_uint32_t leaf_length;                    /* 8 */
++    grub_uint64_t node_offset;                    /* 16 */
++    grub_uint8_t node_depth;                      /* 17 */
++    grub_uint8_t inner_length;                    /* 18 */
++    grub_uint8_t reserved[14];                    /* 32 */
++    grub_uint8_t salt[BLAKE2B_SALTBYTES];         /* 48 */
++    grub_uint8_t personal[BLAKE2B_PERSONALBYTES]; /* 64 */
++} blake2b_param;
++#pragma pack(pop)
++
++typedef struct __blake2b_state {
++    grub_uint64_t h[8];
++    grub_uint64_t t[2];
++    grub_uint64_t f[2];
++    grub_uint8_t buf[BLAKE2B_BLOCKBYTES];
++    unsigned buflen;
++    unsigned outlen;
++    grub_uint8_t last_node;
++} blake2b_state;
++
++/* Ensure param structs have not been wrongly padded */
++/* Poor man's static_assert */
++enum {
++    blake2_size_check_0 = 1 / !!(GRUB_CHAR_BIT == 8),
++    blake2_size_check_2 =
++        1 / !!(sizeof(blake2b_param) == sizeof(grub_uint64_t) * GRUB_CHAR_BIT)
++};
++
++/* Streaming API */
++ARGON2_LOCAL int blake2b_init(blake2b_state *S, grub_size_t outlen);
++ARGON2_LOCAL int blake2b_init_key(blake2b_state *S, grub_size_t outlen, const void *key,
++                     grub_size_t keylen);
++ARGON2_LOCAL int blake2b_init_param(blake2b_state *S, const blake2b_param *P);
++ARGON2_LOCAL int blake2b_update(blake2b_state *S, const void *in, grub_size_t inlen);
++ARGON2_LOCAL int blake2b_final(blake2b_state *S, void *out, grub_size_t outlen);
++
++/* Simple API */
++ARGON2_LOCAL int blake2b(void *out, grub_size_t outlen, const void *in, grub_size_t inlen,
++                         const void *key, grub_size_t keylen);
++
++/* Argon2 Team - Begin Code */
++ARGON2_LOCAL int blake2b_long(void *out, grub_size_t outlen, const void *in, grub_size_t inlen);
++/* Argon2 Team - End Code */
++
++#if defined(__cplusplus)
++}
++#endif
++
++#endif
+diff --git a/grub-core/lib/argon2/blake2/blake2b.c b/grub-core/lib/argon2/blake2/blake2b.c
+new file mode 100644
+index 000000000..53abd7bef
+--- /dev/null
++++ b/grub-core/lib/argon2/blake2/blake2b.c
+@@ -0,0 +1,388 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#include "blake2.h"
++#include "blake2-impl.h"
++
++static const grub_uint64_t blake2b_IV[8] = {
++    GRUB_UINT64_C(0x6a09e667f3bcc908), GRUB_UINT64_C(0xbb67ae8584caa73b),
++    GRUB_UINT64_C(0x3c6ef372fe94f82b), GRUB_UINT64_C(0xa54ff53a5f1d36f1),
++    GRUB_UINT64_C(0x510e527fade682d1), GRUB_UINT64_C(0x9b05688c2b3e6c1f),
++    GRUB_UINT64_C(0x1f83d9abfb41bd6b), GRUB_UINT64_C(0x5be0cd19137e2179)};
++
++static const unsigned int blake2b_sigma[12][16] = {
++    {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15},
++    {14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3},
++    {11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4},
++    {7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8},
++    {9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13},
++    {2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9},
++    {12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11},
++    {13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10},
++    {6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5},
++    {10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0},
++    {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15},
++    {14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3},
++};
++
++void clear_internal_memory(void *v, grub_size_t n);
++
++static BLAKE2_INLINE void blake2b_set_lastnode(blake2b_state *S) {
++    S->f[1] = (grub_uint64_t)-1;
++}
++
++static BLAKE2_INLINE void blake2b_set_lastblock(blake2b_state *S) {
++    if (S->last_node) {
++        blake2b_set_lastnode(S);
++    }
++    S->f[0] = (grub_uint64_t)-1;
++}
++
++static BLAKE2_INLINE void blake2b_increment_counter(blake2b_state *S,
++                                                    grub_uint64_t inc) {
++    S->t[0] += inc;
++    S->t[1] += (S->t[0] < inc);
++}
++
++static BLAKE2_INLINE void blake2b_invalidate_state(blake2b_state *S) {
++    clear_internal_memory(S, sizeof(*S));      /* wipe */
++    blake2b_set_lastblock(S); /* invalidate for further use */
++}
++
++static BLAKE2_INLINE void blake2b_init0(blake2b_state *S) {
++    grub_memset(S, 0, sizeof(*S));
++    grub_memcpy(S->h, blake2b_IV, sizeof(S->h));
++}
++
++int blake2b_init_param(blake2b_state *S, const blake2b_param *P) {
++    const unsigned char *p = (const unsigned char *)P;
++    unsigned int i;
++
++    if (NULL == P || NULL == S) {
++        return -1;
++    }
++
++    blake2b_init0(S);
++    /* IV XOR Parameter Block */
++    for (i = 0; i < 8; ++i) {
++        S->h[i] ^= load64(&p[i * sizeof(S->h[i])]);
++    }
++    S->outlen = P->digest_length;
++    return 0;
++}
++
++/* Sequential blake2b initialization */
++int blake2b_init(blake2b_state *S, grub_size_t outlen) {
++    blake2b_param P;
++
++    if (S == NULL) {
++        return -1;
++    }
++
++    if ((outlen == 0) || (outlen > BLAKE2B_OUTBYTES)) {
++        blake2b_invalidate_state(S);
++        return -1;
++    }
++
++    /* Setup Parameter Block for unkeyed BLAKE2 */
++    P.digest_length = (grub_uint8_t)outlen;
++    P.key_length = 0;
++    P.fanout = 1;
++    P.depth = 1;
++    P.leaf_length = 0;
++    P.node_offset = 0;
++    P.node_depth = 0;
++    P.inner_length = 0;
++    grub_memset(P.reserved, 0, sizeof(P.reserved));
++    grub_memset(P.salt, 0, sizeof(P.salt));
++    grub_memset(P.personal, 0, sizeof(P.personal));
++
++    return blake2b_init_param(S, &P);
++}
++
++int blake2b_init_key(blake2b_state *S, grub_size_t outlen, const void *key,
++                     grub_size_t keylen) {
++    blake2b_param P;
++
++    if (S == NULL) {
++        return -1;
++    }
++
++    if ((outlen == 0) || (outlen > BLAKE2B_OUTBYTES)) {
++        blake2b_invalidate_state(S);
++        return -1;
++    }
++
++    if ((key == 0) || (keylen == 0) || (keylen > BLAKE2B_KEYBYTES)) {
++        blake2b_invalidate_state(S);
++        return -1;
++    }
++
++    /* Setup Parameter Block for keyed BLAKE2 */
++    P.digest_length = (grub_uint8_t)outlen;
++    P.key_length = (grub_uint8_t)keylen;
++    P.fanout = 1;
++    P.depth = 1;
++    P.leaf_length = 0;
++    P.node_offset = 0;
++    P.node_depth = 0;
++    P.inner_length = 0;
++    grub_memset(P.reserved, 0, sizeof(P.reserved));
++    grub_memset(P.salt, 0, sizeof(P.salt));
++    grub_memset(P.personal, 0, sizeof(P.personal));
++
++    if (blake2b_init_param(S, &P) < 0) {
++        blake2b_invalidate_state(S);
++        return -1;
++    }
++
++    {
++        grub_uint8_t block[BLAKE2B_BLOCKBYTES];
++        grub_memset(block, 0, BLAKE2B_BLOCKBYTES);
++        grub_memcpy(block, key, keylen);
++        blake2b_update(S, block, BLAKE2B_BLOCKBYTES);
++        /* Burn the key from stack */
++        clear_internal_memory(block, BLAKE2B_BLOCKBYTES);
++    }
++    return 0;
++}
++
++static void blake2b_compress(blake2b_state *S, const grub_uint8_t *block) {
++    grub_uint64_t m[16];
++    grub_uint64_t v[16];
++    unsigned int i, r;
++
++    for (i = 0; i < 16; ++i) {
++        m[i] = load64(block + i * sizeof(m[i]));
++    }
++
++    for (i = 0; i < 8; ++i) {
++        v[i] = S->h[i];
++    }
++
++    v[8] = blake2b_IV[0];
++    v[9] = blake2b_IV[1];
++    v[10] = blake2b_IV[2];
++    v[11] = blake2b_IV[3];
++    v[12] = blake2b_IV[4] ^ S->t[0];
++    v[13] = blake2b_IV[5] ^ S->t[1];
++    v[14] = blake2b_IV[6] ^ S->f[0];
++    v[15] = blake2b_IV[7] ^ S->f[1];
++
++#define G(r, i, a, b, c, d)                                                    \
++    do {                                                                       \
++        a = a + b + m[blake2b_sigma[r][2 * i + 0]];                            \
++        d = rotr64(d ^ a, 32);                                                 \
++        c = c + d;                                                             \
++        b = rotr64(b ^ c, 24);                                                 \
++        a = a + b + m[blake2b_sigma[r][2 * i + 1]];                            \
++        d = rotr64(d ^ a, 16);                                                 \
++        c = c + d;                                                             \
++        b = rotr64(b ^ c, 63);                                                 \
++    } while ((void)0, 0)
++
++#define ROUND(r)                                                               \
++    do {                                                                       \
++        G(r, 0, v[0], v[4], v[8], v[12]);                                      \
++        G(r, 1, v[1], v[5], v[9], v[13]);                                      \
++        G(r, 2, v[2], v[6], v[10], v[14]);                                     \
++        G(r, 3, v[3], v[7], v[11], v[15]);                                     \
++        G(r, 4, v[0], v[5], v[10], v[15]);                                     \
++        G(r, 5, v[1], v[6], v[11], v[12]);                                     \
++        G(r, 6, v[2], v[7], v[8], v[13]);                                      \
++        G(r, 7, v[3], v[4], v[9], v[14]);                                      \
++    } while ((void)0, 0)
++
++    for (r = 0; r < 12; ++r) {
++        ROUND(r);
++    }
++
++    for (i = 0; i < 8; ++i) {
++        S->h[i] = S->h[i] ^ v[i] ^ v[i + 8];
++    }
++
++#undef G
++#undef ROUND
++}
++
++int blake2b_update(blake2b_state *S, const void *in, grub_size_t inlen) {
++    const grub_uint8_t *pin = (const grub_uint8_t *)in;
++
++    if (inlen == 0) {
++        return 0;
++    }
++
++    /* Sanity check */
++    if (S == NULL || in == NULL) {
++        return -1;
++    }
++
++    /* Is this a reused state? */
++    if (S->f[0] != 0) {
++        return -1;
++    }
++
++    if (S->buflen + inlen > BLAKE2B_BLOCKBYTES) {
++        /* Complete current block */
++        grub_size_t left = S->buflen;
++        grub_size_t fill = BLAKE2B_BLOCKBYTES - left;
++        grub_memcpy(&S->buf[left], pin, fill);
++        blake2b_increment_counter(S, BLAKE2B_BLOCKBYTES);
++        blake2b_compress(S, S->buf);
++        S->buflen = 0;
++        inlen -= fill;
++        pin += fill;
++        /* Avoid buffer copies when possible */
++        while (inlen > BLAKE2B_BLOCKBYTES) {
++            blake2b_increment_counter(S, BLAKE2B_BLOCKBYTES);
++            blake2b_compress(S, pin);
++            inlen -= BLAKE2B_BLOCKBYTES;
++            pin += BLAKE2B_BLOCKBYTES;
++        }
++    }
++    grub_memcpy(&S->buf[S->buflen], pin, inlen);
++    S->buflen += (unsigned int)inlen;
++    return 0;
++}
++
++int blake2b_final(blake2b_state *S, void *out, grub_size_t outlen) {
++    grub_uint8_t buffer[BLAKE2B_OUTBYTES] = {0};
++    unsigned int i;
++
++    /* Sanity checks */
++    if (S == NULL || out == NULL || outlen < S->outlen) {
++        return -1;
++    }
++
++    /* Is this a reused state? */
++    if (S->f[0] != 0) {
++        return -1;
++    }
++
++    blake2b_increment_counter(S, S->buflen);
++    blake2b_set_lastblock(S);
++    grub_memset(&S->buf[S->buflen], 0, BLAKE2B_BLOCKBYTES - S->buflen); /* Padding */
++    blake2b_compress(S, S->buf);
++
++    for (i = 0; i < 8; ++i) { /* Output full hash to temp buffer */
++        store64(buffer + sizeof(S->h[i]) * i, S->h[i]);
++    }
++
++    grub_memcpy(out, buffer, S->outlen);
++    clear_internal_memory(buffer, sizeof(buffer));
++    clear_internal_memory(S->buf, sizeof(S->buf));
++    clear_internal_memory(S->h, sizeof(S->h));
++    return 0;
++}
++
++int blake2b(void *out, grub_size_t outlen, const void *in, grub_size_t inlen,
++            const void *key, grub_size_t keylen) {
++    blake2b_state S;
++    int ret = -1;
++
++    /* Verify parameters */
++    if (NULL == in && inlen > 0) {
++        goto fail;
++    }
++
++    if (NULL == out || outlen == 0 || outlen > BLAKE2B_OUTBYTES) {
++        goto fail;
++    }
++
++    if ((NULL == key && keylen > 0) || keylen > BLAKE2B_KEYBYTES) {
++        goto fail;
++    }
++
++    if (keylen > 0) {
++        if (blake2b_init_key(&S, outlen, key, keylen) < 0) {
++            goto fail;
++        }
++    } else {
++        if (blake2b_init(&S, outlen) < 0) {
++            goto fail;
++        }
++    }
++
++    if (blake2b_update(&S, in, inlen) < 0) {
++        goto fail;
++    }
++    ret = blake2b_final(&S, out, outlen);
++
++fail:
++    clear_internal_memory(&S, sizeof(S));
++    return ret;
++}
++
++/* Argon2 Team - Begin Code */
++int blake2b_long(void *pout, grub_size_t outlen, const void *in, grub_size_t inlen) {
++    grub_uint8_t *out = (grub_uint8_t *)pout;
++    blake2b_state blake_state;
++    grub_uint8_t outlen_bytes[sizeof(grub_uint32_t)] = {0};
++    int ret = -1;
++
++    if (outlen > GRUB_UINT32_MAX) {
++        goto fail;
++    }
++
++    /* Ensure little-endian byte order! */
++    store32(outlen_bytes, (grub_uint32_t)outlen);
++
++#define TRY(statement)                                                         \
++    do {                                                                       \
++        ret = statement;                                                       \
++        if (ret < 0) {                                                         \
++            goto fail;                                                         \
++        }                                                                      \
++    } while ((void)0, 0)
++
++    if (outlen <= BLAKE2B_OUTBYTES) {
++        TRY(blake2b_init(&blake_state, outlen));
++        TRY(blake2b_update(&blake_state, outlen_bytes, sizeof(outlen_bytes)));
++        TRY(blake2b_update(&blake_state, in, inlen));
++        TRY(blake2b_final(&blake_state, out, outlen));
++    } else {
++        grub_uint32_t toproduce;
++        grub_uint8_t out_buffer[BLAKE2B_OUTBYTES];
++        grub_uint8_t in_buffer[BLAKE2B_OUTBYTES];
++        TRY(blake2b_init(&blake_state, BLAKE2B_OUTBYTES));
++        TRY(blake2b_update(&blake_state, outlen_bytes, sizeof(outlen_bytes)));
++        TRY(blake2b_update(&blake_state, in, inlen));
++        TRY(blake2b_final(&blake_state, out_buffer, BLAKE2B_OUTBYTES));
++        grub_memcpy(out, out_buffer, BLAKE2B_OUTBYTES / 2);
++        out += BLAKE2B_OUTBYTES / 2;
++        toproduce = (grub_uint32_t)outlen - BLAKE2B_OUTBYTES / 2;
++
++        while (toproduce > BLAKE2B_OUTBYTES) {
++            grub_memcpy(in_buffer, out_buffer, BLAKE2B_OUTBYTES);
++            TRY(blake2b(out_buffer, BLAKE2B_OUTBYTES, in_buffer,
++                        BLAKE2B_OUTBYTES, NULL, 0));
++            grub_memcpy(out, out_buffer, BLAKE2B_OUTBYTES / 2);
++            out += BLAKE2B_OUTBYTES / 2;
++            toproduce -= BLAKE2B_OUTBYTES / 2;
++        }
++
++        grub_memcpy(in_buffer, out_buffer, BLAKE2B_OUTBYTES);
++        TRY(blake2b(out_buffer, toproduce, in_buffer, BLAKE2B_OUTBYTES, NULL,
++                    0));
++        grub_memcpy(out, out_buffer, toproduce);
++    }
++fail:
++    clear_internal_memory(&blake_state, sizeof(blake_state));
++    return ret;
++#undef TRY
++}
++/* Argon2 Team - End Code */
+diff --git a/grub-core/lib/argon2/blake2/blamka-round-ref.h b/grub-core/lib/argon2/blake2/blamka-round-ref.h
+new file mode 100644
+index 000000000..7f0071ada
+--- /dev/null
++++ b/grub-core/lib/argon2/blake2/blamka-round-ref.h
+@@ -0,0 +1,56 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef BLAKE_ROUND_MKA_H
++#define BLAKE_ROUND_MKA_H
++
++#include "blake2.h"
++#include "blake2-impl.h"
++
++/* designed by the Lyra PHC team */
++static BLAKE2_INLINE grub_uint64_t fBlaMka(grub_uint64_t x, grub_uint64_t y) {
++    const grub_uint64_t m = GRUB_UINT64_C(0xFFFFFFFF);
++    const grub_uint64_t xy = (x & m) * (y & m);
++    return x + y + 2 * xy;
++}
++
++#define G(a, b, c, d)                                                          \
++    do {                                                                       \
++        a = fBlaMka(a, b);                                                     \
++        d = rotr64(d ^ a, 32);                                                 \
++        c = fBlaMka(c, d);                                                     \
++        b = rotr64(b ^ c, 24);                                                 \
++        a = fBlaMka(a, b);                                                     \
++        d = rotr64(d ^ a, 16);                                                 \
++        c = fBlaMka(c, d);                                                     \
++        b = rotr64(b ^ c, 63);                                                 \
++    } while ((void)0, 0)
++
++#define BLAKE2_ROUND_NOMSG(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11,   \
++                           v12, v13, v14, v15)                                 \
++    do {                                                                       \
++        G(v0, v4, v8, v12);                                                    \
++        G(v1, v5, v9, v13);                                                    \
++        G(v2, v6, v10, v14);                                                   \
++        G(v3, v7, v11, v15);                                                   \
++        G(v0, v5, v10, v15);                                                   \
++        G(v1, v6, v11, v12);                                                   \
++        G(v2, v7, v8, v13);                                                    \
++        G(v3, v4, v9, v14);                                                    \
++    } while ((void)0, 0)
++
++#endif
+diff --git a/grub-core/lib/argon2/core.c b/grub-core/lib/argon2/core.c
+new file mode 100644
+index 000000000..0fe5b74cb
+--- /dev/null
++++ b/grub-core/lib/argon2/core.c
+@@ -0,0 +1,506 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++/*For memory wiping*/
++#ifdef _MSC_VER
++#include <windows.h>
++#include <winbase.h> /* For SecureZeroMemory */
++#endif
++#if defined __STDC_LIB_EXT1__
++#define __STDC_WANT_LIB_EXT1__ 1
++#endif
++#define VC_GE_2005(version) (version >= 1400)
++
++#include "core.h"
++#include "blake2/blake2.h"
++#include "blake2/blake2-impl.h"
++
++#ifdef GENKAT
++#include "genkat.h"
++#endif
++
++#if defined(__clang__)
++#if __has_attribute(optnone)
++#define NOT_OPTIMIZED __attribute__((optnone))
++#endif
++#elif defined(__GNUC__)
++#define GCC_VERSION                                                            \
++    (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__)
++#if GCC_VERSION >= 40400
++#define NOT_OPTIMIZED __attribute__((optimize("O0")))
++#endif
++#endif
++#ifndef NOT_OPTIMIZED
++#define NOT_OPTIMIZED
++#endif
++
++/***************Instance and Position constructors**********/
++void init_block_value(block *b, grub_uint8_t in) { grub_memset(b->v, in, sizeof(b->v)); }
++
++void copy_block(block *dst, const block *src) {
++    grub_memcpy(dst->v, src->v, sizeof(grub_uint64_t) * ARGON2_QWORDS_IN_BLOCK);
++}
++
++void xor_block(block *dst, const block *src) {
++    int i;
++    for (i = 0; i < ARGON2_QWORDS_IN_BLOCK; ++i) {
++        dst->v[i] ^= src->v[i];
++    }
++}
++
++static void load_block(block *dst, const void *input) {
++    unsigned i;
++    for (i = 0; i < ARGON2_QWORDS_IN_BLOCK; ++i) {
++        dst->v[i] = load64((const grub_uint8_t *)input + i * sizeof(dst->v[i]));
++    }
++}
++
++static void store_block(void *output, const block *src) {
++    unsigned i;
++    for (i = 0; i < ARGON2_QWORDS_IN_BLOCK; ++i) {
++        store64((grub_uint8_t *)output + i * sizeof(src->v[i]), src->v[i]);
++    }
++}
++
++/***************Memory functions*****************/
++
++int allocate_memory(const argon2_context *context, grub_uint8_t **memory,
++                    grub_size_t num, grub_size_t size) {
++    grub_size_t memory_size = num*size;
++    if (memory == NULL) {
++        return ARGON2_MEMORY_ALLOCATION_ERROR;
++    }
++
++    /* 1. Check for multiplication overflow */
++    if (size != 0 && memory_size / size != num) {
++        return ARGON2_MEMORY_ALLOCATION_ERROR;
++    }
++
++    /* 2. Try to allocate with appropriate allocator */
++    if (context->allocate_cbk) {
++        (context->allocate_cbk)(memory, memory_size);
++    } else {
++        *memory = grub_malloc(memory_size);
++    }
++
++    if (*memory == NULL) {
++        return ARGON2_MEMORY_ALLOCATION_ERROR;
++    }
++
++    return ARGON2_OK;
++}
++
++void grub_free_memory(const argon2_context *context, grub_uint8_t *memory,
++                 grub_size_t num, grub_size_t size) {
++    grub_size_t memory_size = num*size;
++    clear_internal_memory(memory, memory_size);
++    if (context->grub_free_cbk) {
++        (context->grub_free_cbk)(memory, memory_size);
++    } else {
++        grub_free(memory);
++    }
++}
++
++void NOT_OPTIMIZED secure_wipe_memory(void *v, grub_size_t n) {
++    static void *(*const volatile grub_memset_sec)(void *, int, grub_size_t) = &grub_memset;
++    grub_memset_sec(v, 0, n);
++}
++
++/* Memory clear flag defaults to true. */
++int FLAG_clear_internal_memory = 1;
++void clear_internal_memory(void *v, grub_size_t n) {
++  if (FLAG_clear_internal_memory && v) {
++    secure_wipe_memory(v, n);
++  }
++}
++
++void finalize(const argon2_context *context, argon2_instance_t *instance) {
++    if (context != NULL && instance != NULL) {
++        block blockhash;
++        grub_uint32_t l;
++
++        copy_block(&blockhash, instance->memory + instance->lane_length - 1);
++
++        /* XOR the last blocks */
++        for (l = 1; l < instance->lanes; ++l) {
++            grub_uint32_t last_block_in_lane =
++                l * instance->lane_length + (instance->lane_length - 1);
++            xor_block(&blockhash, instance->memory + last_block_in_lane);
++        }
++
++        /* Hash the result */
++        {
++            grub_uint8_t blockhash_bytes[ARGON2_BLOCK_SIZE];
++            store_block(blockhash_bytes, &blockhash);
++            blake2b_long(context->out, context->outlen, blockhash_bytes,
++                         ARGON2_BLOCK_SIZE);
++            /* clear blockhash and blockhash_bytes */
++            clear_internal_memory(blockhash.v, ARGON2_BLOCK_SIZE);
++            clear_internal_memory(blockhash_bytes, ARGON2_BLOCK_SIZE);
++        }
++
++#ifdef GENKAT
++        print_tag(context->out, context->outlen);
++#endif
++
++        grub_free_memory(context, (grub_uint8_t *)instance->memory,
++                    instance->memory_blocks, sizeof(block));
++    }
++}
++
++grub_uint32_t index_alpha(const argon2_instance_t *instance,
++                     const argon2_position_t *position, grub_uint32_t pseudo_rand,
++                     int same_lane) {
++    /*
++     * Pass 0:
++     *      This lane : all already finished segments plus already constructed
++     * blocks in this segment
++     *      Other lanes : all already finished segments
++     * Pass 1+:
++     *      This lane : (SYNC_POINTS - 1) last segments plus already constructed
++     * blocks in this segment
++     *      Other lanes : (SYNC_POINTS - 1) last segments
++     */
++    grub_uint32_t reference_area_size;
++    grub_uint64_t relative_position;
++    grub_uint64_t start_position, absolute_position;
++
++    if (0 == position->pass) {
++        /* First pass */
++        if (0 == position->slice) {
++            /* First slice */
++            reference_area_size =
++                position->index - 1; /* all but the previous */
++        } else {
++            if (same_lane) {
++                /* The same lane => add current segment */
++                reference_area_size =
++                    position->slice * instance->segment_length +
++                    position->index - 1;
++            } else {
++                reference_area_size =
++                    position->slice * instance->segment_length +
++                    ((position->index == 0) ? (-1) : 0);
++            }
++        }
++    } else {
++        /* Second pass */
++        if (same_lane) {
++            reference_area_size = instance->lane_length -
++                                  instance->segment_length + position->index -
++                                  1;
++        } else {
++            reference_area_size = instance->lane_length -
++                                  instance->segment_length +
++                                  ((position->index == 0) ? (-1) : 0);
++        }
++    }
++
++    /* 1.2.4. Mapping pseudo_rand to 0..<reference_area_size-1> and produce
++     * relative position */
++    relative_position = pseudo_rand;
++    relative_position = relative_position * relative_position >> 32;
++    relative_position = reference_area_size - 1 -
++                        (reference_area_size * relative_position >> 32);
++
++    /* 1.2.5 Computing starting position */
++    start_position = 0;
++
++    if (0 != position->pass) {
++        start_position = (position->slice == ARGON2_SYNC_POINTS - 1)
++                             ? 0
++                             : (position->slice + 1) * instance->segment_length;
++    }
++
++    /* 1.2.6. Computing absolute position */
++    grub_divmod64 (start_position + relative_position, instance->lane_length,
++                   &absolute_position); /* absolute position */
++    return absolute_position;
++}
++
++/* Single-threaded version for p=1 case */
++static int fill_memory_blocks_st(argon2_instance_t *instance) {
++    grub_uint32_t r, s, l;
++
++    for (r = 0; r < instance->passes; ++r) {
++        for (s = 0; s < ARGON2_SYNC_POINTS; ++s) {
++            for (l = 0; l < instance->lanes; ++l) {
++                argon2_position_t position = {r, l, (grub_uint8_t)s, 0};
++                fill_segment(instance, position);
++            }
++        }
++#ifdef GENKAT
++        internal_kat(instance, r); /* Print all memory blocks */
++#endif
++    }
++    return ARGON2_OK;
++}
++
++int fill_memory_blocks(argon2_instance_t *instance) {
++	if (instance == NULL || instance->lanes == 0) {
++	    return ARGON2_INCORRECT_PARAMETER;
++    }
++    return fill_memory_blocks_st(instance);
++}
++
++int validate_inputs(const argon2_context *context) {
++    if (NULL == context) {
++        return ARGON2_INCORRECT_PARAMETER;
++    }
++
++    if (NULL == context->out) {
++        return ARGON2_OUTPUT_PTR_NULL;
++    }
++
++    /* Validate output length */
++    if (ARGON2_MIN_OUTLEN > context->outlen) {
++        return ARGON2_OUTPUT_TOO_SHORT;
++    }
++
++    if (ARGON2_MAX_OUTLEN < context->outlen) {
++        return ARGON2_OUTPUT_TOO_LONG;
++    }
++
++    /* Validate password (required param) */
++    if (NULL == context->pwd) {
++        if (0 != context->pwdlen) {
++            return ARGON2_PWD_PTR_MISMATCH;
++        }
++    }
++
++    if (ARGON2_MAX_PWD_LENGTH < context->pwdlen) {
++        return ARGON2_PWD_TOO_LONG;
++    }
++
++    /* Validate salt (required param) */
++    if (NULL == context->salt) {
++        if (0 != context->saltlen) {
++            return ARGON2_SALT_PTR_MISMATCH;
++        }
++    }
++
++    if (ARGON2_MIN_SALT_LENGTH > context->saltlen) {
++        return ARGON2_SALT_TOO_SHORT;
++    }
++
++    if (ARGON2_MAX_SALT_LENGTH < context->saltlen) {
++        return ARGON2_SALT_TOO_LONG;
++    }
++
++    /* Validate secret (optional param) */
++    if (NULL == context->secret) {
++        if (0 != context->secretlen) {
++            return ARGON2_SECRET_PTR_MISMATCH;
++        }
++    } else {
++        if (ARGON2_MAX_SECRET < context->secretlen) {
++            return ARGON2_SECRET_TOO_LONG;
++        }
++    }
++
++    /* Validate associated data (optional param) */
++    if (NULL == context->ad) {
++        if (0 != context->adlen) {
++            return ARGON2_AD_PTR_MISMATCH;
++        }
++    } else {
++        if (ARGON2_MAX_AD_LENGTH < context->adlen) {
++            return ARGON2_AD_TOO_LONG;
++        }
++    }
++
++    /* Validate memory cost */
++    if (ARGON2_MIN_MEMORY > context->m_cost) {
++        return ARGON2_MEMORY_TOO_LITTLE;
++    }
++
++    if (context->m_cost < 8 * context->lanes) {
++        return ARGON2_MEMORY_TOO_LITTLE;
++    }
++
++    /* Validate time cost */
++    if (ARGON2_MIN_TIME > context->t_cost) {
++        return ARGON2_TIME_TOO_SMALL;
++    }
++
++    if (ARGON2_MAX_TIME < context->t_cost) {
++        return ARGON2_TIME_TOO_LARGE;
++    }
++
++    /* Validate lanes */
++    if (ARGON2_MIN_LANES > context->lanes) {
++        return ARGON2_LANES_TOO_FEW;
++    }
++
++    if (ARGON2_MAX_LANES < context->lanes) {
++        return ARGON2_LANES_TOO_MANY;
++    }
++
++    /* Validate threads */
++    if (ARGON2_MIN_THREADS > context->threads) {
++        return ARGON2_THREADS_TOO_FEW;
++    }
++
++    if (ARGON2_MAX_THREADS < context->threads) {
++        return ARGON2_THREADS_TOO_MANY;
++    }
++
++    if (NULL != context->allocate_cbk && NULL == context->grub_free_cbk) {
++        return ARGON2_FREE_MEMORY_CBK_NULL;
++    }
++
++    if (NULL == context->allocate_cbk && NULL != context->grub_free_cbk) {
++        return ARGON2_ALLOCATE_MEMORY_CBK_NULL;
++    }
++
++    return ARGON2_OK;
++}
++
++void fill_first_blocks(grub_uint8_t *blockhash, const argon2_instance_t *instance) {
++    grub_uint32_t l;
++    /* Make the first and second block in each lane as G(H0||0||i) or
++       G(H0||1||i) */
++    grub_uint8_t blockhash_bytes[ARGON2_BLOCK_SIZE];
++    for (l = 0; l < instance->lanes; ++l) {
++
++        store32(blockhash + ARGON2_PREHASH_DIGEST_LENGTH, 0);
++        store32(blockhash + ARGON2_PREHASH_DIGEST_LENGTH + 4, l);
++        blake2b_long(blockhash_bytes, ARGON2_BLOCK_SIZE, blockhash,
++                     ARGON2_PREHASH_SEED_LENGTH);
++        load_block(&instance->memory[l * instance->lane_length + 0],
++                   blockhash_bytes);
++
++        store32(blockhash + ARGON2_PREHASH_DIGEST_LENGTH, 1);
++        blake2b_long(blockhash_bytes, ARGON2_BLOCK_SIZE, blockhash,
++                     ARGON2_PREHASH_SEED_LENGTH);
++        load_block(&instance->memory[l * instance->lane_length + 1],
++                   blockhash_bytes);
++    }
++    clear_internal_memory(blockhash_bytes, ARGON2_BLOCK_SIZE);
++}
++
++void initial_hash(grub_uint8_t *blockhash, argon2_context *context,
++                  argon2_type type) {
++    blake2b_state BlakeHash;
++    grub_uint8_t value[sizeof(grub_uint32_t)];
++
++    if (NULL == context || NULL == blockhash) {
++        return;
++    }
++
++    blake2b_init(&BlakeHash, ARGON2_PREHASH_DIGEST_LENGTH);
++
++    store32(&value, context->lanes);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    store32(&value, context->outlen);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    store32(&value, context->m_cost);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    store32(&value, context->t_cost);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    store32(&value, context->version);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    store32(&value, (grub_uint32_t)type);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    store32(&value, context->pwdlen);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    if (context->pwd != NULL) {
++        blake2b_update(&BlakeHash, (const grub_uint8_t *)context->pwd,
++                       context->pwdlen);
++
++        if (context->flags & ARGON2_FLAG_CLEAR_PASSWORD) {
++            secure_wipe_memory(context->pwd, context->pwdlen);
++            context->pwdlen = 0;
++        }
++    }
++
++    store32(&value, context->saltlen);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    if (context->salt != NULL) {
++        blake2b_update(&BlakeHash, (const grub_uint8_t *)context->salt,
++                       context->saltlen);
++    }
++
++    store32(&value, context->secretlen);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    if (context->secret != NULL) {
++        blake2b_update(&BlakeHash, (const grub_uint8_t *)context->secret,
++                       context->secretlen);
++
++        if (context->flags & ARGON2_FLAG_CLEAR_SECRET) {
++            secure_wipe_memory(context->secret, context->secretlen);
++            context->secretlen = 0;
++        }
++    }
++
++    store32(&value, context->adlen);
++    blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++    if (context->ad != NULL) {
++        blake2b_update(&BlakeHash, (const grub_uint8_t *)context->ad,
++                       context->adlen);
++    }
++
++    blake2b_final(&BlakeHash, blockhash, ARGON2_PREHASH_DIGEST_LENGTH);
++}
++
++int initialize(argon2_instance_t *instance, argon2_context *context) {
++    grub_uint8_t blockhash[ARGON2_PREHASH_SEED_LENGTH];
++    int result = ARGON2_OK;
++
++    if (instance == NULL || context == NULL)
++        return ARGON2_INCORRECT_PARAMETER;
++    instance->context_ptr = context;
++
++    /* 1. Memory allocation */
++    result = allocate_memory(context, (grub_uint8_t **)&(instance->memory),
++                             instance->memory_blocks, sizeof(block));
++    if (result != ARGON2_OK) {
++        return result;
++    }
++
++    /* 2. Initial hashing */
++    /* H_0 + 8 extra bytes to produce the first blocks */
++    /* grub_uint8_t blockhash[ARGON2_PREHASH_SEED_LENGTH]; */
++    /* Hashing all inputs */
++    initial_hash(blockhash, context, instance->type);
++    /* Zeroing 8 extra bytes */
++    clear_internal_memory(blockhash + ARGON2_PREHASH_DIGEST_LENGTH,
++                          ARGON2_PREHASH_SEED_LENGTH -
++                              ARGON2_PREHASH_DIGEST_LENGTH);
++
++#ifdef GENKAT
++    initial_kat(blockhash, context, instance->type);
++#endif
++
++    /* 3. Creating first blocks, we always have at least two blocks in a slice
++     */
++    fill_first_blocks(blockhash, instance);
++    /* Clearing the hash */
++    clear_internal_memory(blockhash, ARGON2_PREHASH_SEED_LENGTH);
++
++    return ARGON2_OK;
++}
+diff --git a/grub-core/lib/argon2/core.h b/grub-core/lib/argon2/core.h
+new file mode 100644
+index 000000000..bbcd56998
+--- /dev/null
++++ b/grub-core/lib/argon2/core.h
+@@ -0,0 +1,228 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef ARGON2_CORE_H
++#define ARGON2_CORE_H
++
++#include "argon2.h"
++
++#define CONST_CAST(x) (x)(grub_addr_t)
++
++/**********************Argon2 internal constants*******************************/
++
++enum argon2_core_constants {
++    /* Memory block size in bytes */
++    ARGON2_BLOCK_SIZE = 1024,
++    ARGON2_QWORDS_IN_BLOCK = ARGON2_BLOCK_SIZE / 8,
++    ARGON2_OWORDS_IN_BLOCK = ARGON2_BLOCK_SIZE / 16,
++    ARGON2_HWORDS_IN_BLOCK = ARGON2_BLOCK_SIZE / 32,
++    ARGON2_512BIT_WORDS_IN_BLOCK = ARGON2_BLOCK_SIZE / 64,
++
++    /* Number of pseudo-random values generated by one call to Blake in Argon2i
++       to
++       generate reference block positions */
++    ARGON2_ADDRESSES_IN_BLOCK = 128,
++
++    /* Pre-hashing digest length and its extension*/
++    ARGON2_PREHASH_DIGEST_LENGTH = 64,
++    ARGON2_PREHASH_SEED_LENGTH = 72
++};
++
++/*************************Argon2 internal data types***********************/
++
++/*
++ * Structure for the (1KB) memory block implemented as 128 64-bit words.
++ * Memory blocks can be copied, XORed. Internal words can be accessed by [] (no
++ * bounds checking).
++ */
++typedef struct block_ { grub_uint64_t v[ARGON2_QWORDS_IN_BLOCK]; } block;
++
++/*****************Functions that work with the block******************/
++
++/* Initialize each byte of the block with @in */
++void init_block_value(block *b, grub_uint8_t in);
++
++/* Copy block @src to block @dst */
++void copy_block(block *dst, const block *src);
++
++/* XOR @src onto @dst bytewise */
++void xor_block(block *dst, const block *src);
++
++/*
++ * Argon2 instance: memory pointer, number of passes, amount of memory, type,
++ * and derived values.
++ * Used to evaluate the number and location of blocks to construct in each
++ * thread
++ */
++typedef struct Argon2_instance_t {
++    block *memory;          /* Memory pointer */
++    grub_uint32_t version;
++    grub_uint32_t passes;        /* Number of passes */
++    grub_uint32_t memory_blocks; /* Number of blocks in memory */
++    grub_uint32_t segment_length;
++    grub_uint32_t lane_length;
++    grub_uint32_t lanes;
++    grub_uint32_t threads;
++    argon2_type type;
++    int print_internals; /* whether to print the memory blocks */
++    argon2_context *context_ptr; /* points back to original context */
++} argon2_instance_t;
++
++/*
++ * Argon2 position: where we construct the block right now. Used to distribute
++ * work between threads.
++ */
++typedef struct Argon2_position_t {
++    grub_uint32_t pass;
++    grub_uint32_t lane;
++    grub_uint8_t slice;
++    grub_uint32_t index;
++} argon2_position_t;
++
++/*Struct that holds the inputs for thread handling FillSegment*/
++typedef struct Argon2_thread_data {
++    argon2_instance_t *instance_ptr;
++    argon2_position_t pos;
++} argon2_thread_data;
++
++/*************************Argon2 core functions********************************/
++
++/* Allocates memory to the given pointer, uses the appropriate allocator as
++ * specified in the context. Total allocated memory is num*size.
++ * @param context argon2_context which specifies the allocator
++ * @param memory pointer to the pointer to the memory
++ * @param size the size in bytes for each element to be allocated
++ * @param num the number of elements to be allocated
++ * @return ARGON2_OK if @memory is a valid pointer and memory is allocated
++ */
++int allocate_memory(const argon2_context *context, grub_uint8_t **memory,
++                    grub_size_t num, grub_size_t size);
++
++/*
++ * Frees memory at the given pointer, uses the appropriate deallocator as
++ * specified in the context. Also cleans the memory using clear_internal_memory.
++ * @param context argon2_context which specifies the deallocator
++ * @param memory pointer to buffer to be grub_freed
++ * @param size the size in bytes for each element to be deallocated
++ * @param num the number of elements to be deallocated
++ */
++void grub_free_memory(const argon2_context *context, grub_uint8_t *memory,
++                 grub_size_t num, grub_size_t size);
++
++/* Function that securely cleans the memory. This ignores any flags set
++ * regarding clearing memory. Usually one just calls clear_internal_memory.
++ * @param mem Pointer to the memory
++ * @param s Memory size in bytes
++ */
++void secure_wipe_memory(void *v, grub_size_t n);
++
++/* Function that securely clears the memory if FLAG_clear_internal_memory is
++ * set. If the flag isn't set, this function does nothing.
++ * @param mem Pointer to the memory
++ * @param s Memory size in bytes
++ */
++void clear_internal_memory(void *v, grub_size_t n);
++
++/*
++ * Computes absolute position of reference block in the lane following a skewed
++ * distribution and using a pseudo-random value as input
++ * @param instance Pointer to the current instance
++ * @param position Pointer to the current position
++ * @param pseudo_rand 32-bit pseudo-random value used to determine the position
++ * @param same_lane Indicates if the block will be taken from the current lane.
++ * If so we can reference the current segment
++ * @pre All pointers must be valid
++ */
++grub_uint32_t index_alpha(const argon2_instance_t *instance,
++                     const argon2_position_t *position, grub_uint32_t pseudo_rand,
++                     int same_lane);
++
++/*
++ * Function that validates all inputs against predefined restrictions and return
++ * an error code
++ * @param context Pointer to current Argon2 context
++ * @return ARGON2_OK if everything is all right, otherwise one of error codes
++ * (all defined in <argon2.h>
++ */
++int validate_inputs(const argon2_context *context);
++
++/*
++ * Hashes all the inputs into @a blockhash[PREHASH_DIGEST_LENGTH], clears
++ * password and secret if needed
++ * @param  context  Pointer to the Argon2 internal structure containing memory
++ * pointer, and parameters for time and space requirements.
++ * @param  blockhash Buffer for pre-hashing digest
++ * @param  type Argon2 type
++ * @pre    @a blockhash must have at least @a PREHASH_DIGEST_LENGTH bytes
++ * allocated
++ */
++void initial_hash(grub_uint8_t *blockhash, argon2_context *context,
++                  argon2_type type);
++
++/*
++ * Function creates first 2 blocks per lane
++ * @param instance Pointer to the current instance
++ * @param blockhash Pointer to the pre-hashing digest
++ * @pre blockhash must point to @a PREHASH_SEED_LENGTH allocated values
++ */
++void fill_first_blocks(grub_uint8_t *blockhash, const argon2_instance_t *instance);
++
++/*
++ * Function allocates memory, hashes the inputs with Blake,  and creates first
++ * two blocks. Returns the pointer to the main memory with 2 blocks per lane
++ * initialized
++ * @param  context  Pointer to the Argon2 internal structure containing memory
++ * pointer, and parameters for time and space requirements.
++ * @param  instance Current Argon2 instance
++ * @return Zero if successful, -1 if memory failed to allocate. @context->state
++ * will be modified if successful.
++ */
++int initialize(argon2_instance_t *instance, argon2_context *context);
++
++/*
++ * XORing the last block of each lane, hashing it, making the tag. Deallocates
++ * the memory.
++ * @param context Pointer to current Argon2 context (use only the out parameters
++ * from it)
++ * @param instance Pointer to current instance of Argon2
++ * @pre instance->state must point to necessary amount of memory
++ * @pre context->out must point to outlen bytes of memory
++ * @pre if context->grub_free_cbk is not NULL, it should point to a function that
++ * deallocates memory
++ */
++void finalize(const argon2_context *context, argon2_instance_t *instance);
++
++/*
++ * Function that fills the segment using previous segments also from other
++ * threads
++ * @param context current context
++ * @param instance Pointer to the current instance
++ * @param position Current position
++ * @pre all block pointers must be valid
++ */
++void fill_segment(const argon2_instance_t *instance,
++                  argon2_position_t position);
++
++/*
++ * Function that fills the entire memory t_cost times based on the first two
++ * blocks in each lane
++ * @param instance Pointer to the current instance
++ * @return ARGON2_OK if successful, @context->state
++ */
++int fill_memory_blocks(argon2_instance_t *instance);
++
++#endif
+diff --git a/grub-core/lib/argon2/ref.c b/grub-core/lib/argon2/ref.c
+new file mode 100644
+index 000000000..c933df80d
+--- /dev/null
++++ b/grub-core/lib/argon2/ref.c
+@@ -0,0 +1,190 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0        : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#include "argon2.h"
++#include "core.h"
++
++#include "blake2/blamka-round-ref.h"
++#include "blake2/blake2-impl.h"
++#include "blake2/blake2.h"
++
++
++/*
++ * Function fills a new memory block and optionally XORs the old block over the new one.
++ * @next_block must be initialized.
++ * @param prev_block Pointer to the previous block
++ * @param ref_block Pointer to the reference block
++ * @param next_block Pointer to the block to be constructed
++ * @param with_xor Whether to XOR into the new block (1) or just overwrite (0)
++ * @pre all block pointers must be valid
++ */
++static void fill_block(const block *prev_block, const block *ref_block,
++                       block *next_block, int with_xor) {
++    block blockR, block_tmp;
++    unsigned i;
++
++    copy_block(&blockR, ref_block);
++    xor_block(&blockR, prev_block);
++    copy_block(&block_tmp, &blockR);
++    /* Now blockR = ref_block + prev_block and block_tmp = ref_block + prev_block */
++    if (with_xor) {
++        /* Saving the next block contents for XOR over: */
++        xor_block(&block_tmp, next_block);
++        /* Now blockR = ref_block + prev_block and
++           block_tmp = ref_block + prev_block + next_block */
++    }
++
++    /* Apply Blake2 on columns of 64-bit words: (0,1,...,15) , then
++       (16,17,..31)... finally (112,113,...127) */
++    for (i = 0; i < 8; ++i) {
++        BLAKE2_ROUND_NOMSG(
++            blockR.v[16 * i], blockR.v[16 * i + 1], blockR.v[16 * i + 2],
++            blockR.v[16 * i + 3], blockR.v[16 * i + 4], blockR.v[16 * i + 5],
++            blockR.v[16 * i + 6], blockR.v[16 * i + 7], blockR.v[16 * i + 8],
++            blockR.v[16 * i + 9], blockR.v[16 * i + 10], blockR.v[16 * i + 11],
++            blockR.v[16 * i + 12], blockR.v[16 * i + 13], blockR.v[16 * i + 14],
++            blockR.v[16 * i + 15]);
++    }
++
++    /* Apply Blake2 on rows of 64-bit words: (0,1,16,17,...112,113), then
++       (2,3,18,19,...,114,115).. finally (14,15,30,31,...,126,127) */
++    for (i = 0; i < 8; i++) {
++        BLAKE2_ROUND_NOMSG(
++            blockR.v[2 * i], blockR.v[2 * i + 1], blockR.v[2 * i + 16],
++            blockR.v[2 * i + 17], blockR.v[2 * i + 32], blockR.v[2 * i + 33],
++            blockR.v[2 * i + 48], blockR.v[2 * i + 49], blockR.v[2 * i + 64],
++            blockR.v[2 * i + 65], blockR.v[2 * i + 80], blockR.v[2 * i + 81],
++            blockR.v[2 * i + 96], blockR.v[2 * i + 97], blockR.v[2 * i + 112],
++            blockR.v[2 * i + 113]);
++    }
++
++    copy_block(next_block, &block_tmp);
++    xor_block(next_block, &blockR);
++}
++
++static void next_addresses(block *address_block, block *input_block,
++                           const block *zero_block) {
++    input_block->v[6]++;
++    fill_block(zero_block, input_block, address_block, 0);
++    fill_block(zero_block, address_block, address_block, 0);
++}
++
++void fill_segment(const argon2_instance_t *instance,
++                  argon2_position_t position) {
++    block *ref_block = NULL, *curr_block = NULL;
++    block address_block, input_block, zero_block;
++    grub_uint64_t pseudo_rand, ref_index, ref_lane;
++    grub_uint32_t prev_offset, curr_offset;
++    grub_uint32_t starting_index;
++    grub_uint32_t i;
++    int data_independent_addressing;
++
++    if (instance == NULL) {
++        return;
++    }
++
++    data_independent_addressing =
++        (instance->type == Argon2_i) ||
++        (instance->type == Argon2_id && (position.pass == 0) &&
++         (position.slice < ARGON2_SYNC_POINTS / 2));
++
++    if (data_independent_addressing) {
++        init_block_value(&zero_block, 0);
++        init_block_value(&input_block, 0);
++
++        input_block.v[0] = position.pass;
++        input_block.v[1] = position.lane;
++        input_block.v[2] = position.slice;
++        input_block.v[3] = instance->memory_blocks;
++        input_block.v[4] = instance->passes;
++        input_block.v[5] = instance->type;
++    }
++
++    starting_index = 0;
++
++    if ((0 == position.pass) && (0 == position.slice)) {
++        starting_index = 2; /* we have already generated the first two blocks */
++
++        /* Don't forget to generate the first block of addresses: */
++        if (data_independent_addressing) {
++            next_addresses(&address_block, &input_block, &zero_block);
++        }
++    }
++
++    /* Offset of the current block */
++    curr_offset = position.lane * instance->lane_length +
++                  position.slice * instance->segment_length + starting_index;
++
++    if (0 == curr_offset % instance->lane_length) {
++        /* Last block in this lane */
++        prev_offset = curr_offset + instance->lane_length - 1;
++    } else {
++        /* Previous block */
++        prev_offset = curr_offset - 1;
++    }
++
++    for (i = starting_index; i < instance->segment_length;
++         ++i, ++curr_offset, ++prev_offset) {
++        /*1.1 Rotating prev_offset if needed */
++        if (curr_offset % instance->lane_length == 1) {
++            prev_offset = curr_offset - 1;
++        }
++
++        /* 1.2 Computing the index of the reference block */
++        /* 1.2.1 Taking pseudo-random value from the previous block */
++        if (data_independent_addressing) {
++            if (i % ARGON2_ADDRESSES_IN_BLOCK == 0) {
++                next_addresses(&address_block, &input_block, &zero_block);
++            }
++            pseudo_rand = address_block.v[i % ARGON2_ADDRESSES_IN_BLOCK];
++        } else {
++            pseudo_rand = instance->memory[prev_offset].v[0];
++        }
++
++        /* 1.2.2 Computing the lane of the reference block */
++        grub_divmod64 (pseudo_rand >> 32, instance->lanes, &ref_lane);
++
++        if ((position.pass == 0) && (position.slice == 0)) {
++            /* Can not reference other lanes yet */
++            ref_lane = position.lane;
++        }
++
++        /* 1.2.3 Computing the number of possible reference block within the
++         * lane.
++         */
++        position.index = i;
++        ref_index = index_alpha(instance, &position, pseudo_rand & 0xFFFFFFFF,
++                                ref_lane == position.lane);
++
++        /* 2 Creating a new block */
++        ref_block =
++            instance->memory + instance->lane_length * ref_lane + ref_index;
++        curr_block = instance->memory + curr_offset;
++        if (ARGON2_VERSION_10 == instance->version) {
++            /* version 1.2.1 and earlier: overwrite, not XOR */
++            fill_block(instance->memory + prev_offset, ref_block, curr_block, 0);
++        } else {
++            if(0 == position.pass) {
++                fill_block(instance->memory + prev_offset, ref_block,
++                           curr_block, 0);
++            } else {
++                fill_block(instance->memory + prev_offset, ref_block,
++                           curr_block, 1);
++            }
++        }
++    }
++}
+-- 
+2.39.2
+
diff --git a/config/grub/nvme/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/nvme/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch
new file mode 100644
index 00000000..5d56bd61
--- /dev/null
+++ b/config/grub/nvme/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch
@@ -0,0 +1,58 @@
+From 0044d32121bf52c4547c6b3c78f12d7305f57e6b Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 4/6] Error on missing Argon2id parameters
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ grub-core/disk/luks2.c | 13 ++++++++-----
+ 1 file changed, 8 insertions(+), 5 deletions(-)
+
+diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c
+index d5106402f..bc818ea69 100644
+--- a/grub-core/disk/luks2.c
++++ b/grub-core/disk/luks2.c
+@@ -38,6 +38,7 @@ GRUB_MOD_LICENSE ("GPLv3+");
+ enum grub_luks2_kdf_type
+ {
+   LUKS2_KDF_TYPE_ARGON2I,
++  LUKS2_KDF_TYPE_ARGON2ID,
+   LUKS2_KDF_TYPE_PBKDF2
+ };
+ typedef enum grub_luks2_kdf_type grub_luks2_kdf_type_t;
+@@ -90,7 +91,7 @@ struct grub_luks2_keyslot
+ 	grub_int64_t time;
+ 	grub_int64_t memory;
+ 	grub_int64_t cpus;
+-      } argon2i;
++      } argon2;
+       struct
+       {
+ 	const char   *hash;
+@@ -160,10 +161,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot)
+     return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing or invalid KDF");
+   else if (!grub_strcmp (type, "argon2i") || !grub_strcmp (type, "argon2id"))
+     {
+-      out->kdf.type = LUKS2_KDF_TYPE_ARGON2I;
+-      if (grub_json_getint64 (&out->kdf.u.argon2i.time, &kdf, "time") ||
+-	  grub_json_getint64 (&out->kdf.u.argon2i.memory, &kdf, "memory") ||
+-	  grub_json_getint64 (&out->kdf.u.argon2i.cpus, &kdf, "cpus"))
++      out->kdf.type = !grub_strcmp (type, "argon2i")
++		      ? LUKS2_KDF_TYPE_ARGON2I : LUKS2_KDF_TYPE_ARGON2ID;
++      if (grub_json_getint64 (&out->kdf.u.argon2.time, &kdf, "time") ||
++	  grub_json_getint64 (&out->kdf.u.argon2.memory, &kdf, "memory") ||
++	  grub_json_getint64 (&out->kdf.u.argon2.cpus, &kdf, "cpus"))
+ 	return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing Argon2i parameters");
+     }
+   else if (!grub_strcmp (type, "pbkdf2"))
+@@ -459,6 +461,7 @@ luks2_decrypt_key (grub_uint8_t *out_key,
+   switch (k->kdf.type)
+     {
+       case LUKS2_KDF_TYPE_ARGON2I:
++      case LUKS2_KDF_TYPE_ARGON2ID:
+ 	ret = grub_error (GRUB_ERR_BAD_ARGUMENT, "Argon2 not supported");
+ 	goto err;
+       case LUKS2_KDF_TYPE_PBKDF2:
+-- 
+2.39.2
+
diff --git a/config/grub/nvme/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch b/config/grub/nvme/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch
new file mode 100644
index 00000000..f2e26fd4
--- /dev/null
+++ b/config/grub/nvme/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch
@@ -0,0 +1,83 @@
+From 0a21695c55f76f1c958bb633481d55b3168562f7 Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 5/6] Compile with Argon2id support
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ Makefile.util.def           |  6 +++++-
+ grub-core/Makefile.core.def |  2 +-
+ grub-core/disk/luks2.c      | 13 +++++++++++--
+ 3 files changed, 17 insertions(+), 4 deletions(-)
+
+diff --git a/Makefile.util.def b/Makefile.util.def
+index 1e9a13d3e..a167825c3 100644
+--- a/Makefile.util.def
++++ b/Makefile.util.def
+@@ -3,7 +3,7 @@ AutoGen definitions Makefile.tpl;
+ library = {
+   name = libgrubkern.a;
+   cflags = '$(CFLAGS_GNULIB)';
+-  cppflags = '$(CPPFLAGS_GNULIB) -I$(srcdir)/grub-core/lib/json';
++  cppflags = '$(CPPFLAGS_GNULIB) -I$(srcdir)/grub-core/lib/json -I$(srcdir)/grub-core/lib/argon2';
+ 
+   common = util/misc.c;
+   common = grub-core/kern/command.c;
+@@ -36,6 +36,10 @@ library = {
+   common = grub-core/kern/misc.c;
+   common = grub-core/kern/partition.c;
+   common = grub-core/lib/crypto.c;
++  common = grub-core/lib/argon2/argon2.c;
++  common = grub-core/lib/argon2/core.c;
++  common = grub-core/lib/argon2/ref.c;
++  common = grub-core/lib/argon2/blake2/blake2b.c;
+   common = grub-core/lib/json/json.c;
+   common = grub-core/disk/luks.c;
+   common = grub-core/disk/luks2.c;
+diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
+index 4a06789e5..e939dcc99 100644
+--- a/grub-core/Makefile.core.def
++++ b/grub-core/Makefile.core.def
+@@ -1238,7 +1238,7 @@ module = {
+   common = disk/luks2.c;
+   common = lib/gnulib/base64.c;
+   cflags = '$(CFLAGS_POSIX) $(CFLAGS_GNULIB)';
+-  cppflags = '$(CPPFLAGS_POSIX) $(CPPFLAGS_GNULIB) -I$(srcdir)/lib/json';
++  cppflags = '$(CPPFLAGS_POSIX) $(CPPFLAGS_GNULIB) -I$(srcdir)/lib/json -I$(srcdir)/lib/argon2';
+ };
+ 
+ module = {
+diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c
+index bc818ea69..5b9eaa599 100644
+--- a/grub-core/disk/luks2.c
++++ b/grub-core/disk/luks2.c
+@@ -27,6 +27,7 @@
+ #include <grub/partition.h>
+ #include <grub/i18n.h>
+ 
++#include <argon2.h>
+ #include <base64.h>
+ #include <json.h>
+ 
+@@ -462,8 +463,16 @@ luks2_decrypt_key (grub_uint8_t *out_key,
+     {
+       case LUKS2_KDF_TYPE_ARGON2I:
+       case LUKS2_KDF_TYPE_ARGON2ID:
+-	ret = grub_error (GRUB_ERR_BAD_ARGUMENT, "Argon2 not supported");
+-	goto err;
++	ret = argon2_hash (k->kdf.u.argon2.time, k->kdf.u.argon2.memory, k->kdf.u.argon2.cpus,
++			   passphrase, passphraselen, salt, saltlen, area_key, k->area.key_size,
++			   k->kdf.type == LUKS2_KDF_TYPE_ARGON2I ? Argon2_i : Argon2_id,
++			   ARGON2_VERSION_NUMBER);
++        if (ret)
++	  {
++	    grub_dprintf ("luks2", "Argon2 failed: %s\n", argon2_error_message (ret));
++	    goto err;
++	  }
++        break;
+       case LUKS2_KDF_TYPE_PBKDF2:
+ 	hash = grub_crypto_lookup_md_by_name (k->kdf.u.pbkdf2.hash);
+ 	if (!hash)
+-- 
+2.39.2
+
diff --git a/config/grub/nvme/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/nvme/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch
new file mode 100644
index 00000000..dc65b7a6
--- /dev/null
+++ b/config/grub/nvme/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch
@@ -0,0 +1,26 @@
+From 6c9a6625c0dc038d1bdbdc13665f40e269e86496 Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 6/6] Make grub-install work with Argon2
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ util/grub-install.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/util/grub-install.c b/util/grub-install.c
+index 1ad04db36..a8a3330b8 100644
+--- a/util/grub-install.c
++++ b/util/grub-install.c
+@@ -448,6 +448,8 @@ probe_mods (grub_disk_t disk)
+     {
+       grub_util_cryptodisk_get_abstraction (disk,
+ 					    push_cryptodisk_module, NULL);
++      /* HACK: always push argon2 */
++      grub_install_push_module ("argon2");
+       have_abstractions = 1;
+       have_cryptodisk = 1;
+     }
+-- 
+2.39.2
+
diff --git a/config/grub/nvme/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/nvme/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
new file mode 100644
index 00000000..21e8630b
--- /dev/null
+++ b/config/grub/nvme/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -0,0 +1,107 @@
+From 96c0bbe5d406b616360a7fce7cee67d7692c0d6d Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 30 Oct 2023 22:19:21 +0000
+Subject: [PATCH 1/1] at_keyboard coreboot: force scancodes2+translate
+
+Scan code set 2 with translation should be assumed in
+every case, as the default starting position.
+
+However, GRUB is trying to detect and use other modes
+such as set 2 without translation, or set 1 without
+translation from set 2; it also detects no-mode and
+assumes mode 1, on really old keyboards.
+
+The current behaviour has been retained, for everything
+except GRUB_MACHINE_COREBOOT; for the latter, scan code
+set 2 with translation is hardcoded, and forced in code.
+
+This is required to make keyboard initialisation work on
+the MEC5035 EC used by the Dell Latitude E6400, when
+running GRUB as a coreboot payload on that laptop. The
+EC reports scancode set 2 with translation when probed,
+but actually only outputs scancode set 1.
+
+Since GRUB is attempting to use it without translation,
+and since the machine reports set 2 with translation,
+but only ever outputs set 1 scancodes, this results in
+wrong keypresses for every key.
+
+This fix fixed that, by forcing set 2 with translation,
+treating it as set 1, but only on coreboot. This is the
+same behaviour used in GNU+Linux systems and SeaBIOS.
+With this change, GRUB keyboard initialisation now works
+just fine on those machines.
+
+This has *also* been tested on other coreboot machines
+running GRUB; several HP EliteBooks, ThinkPads and
+Dell Precision T1650. All seems to work just fine.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/term/at_keyboard.c | 20 ++++++++++++++++++--
+ 1 file changed, 18 insertions(+), 2 deletions(-)
+
+diff --git a/grub-core/term/at_keyboard.c b/grub-core/term/at_keyboard.c
+index f8a129eb7..8207225c2 100644
+--- a/grub-core/term/at_keyboard.c
++++ b/grub-core/term/at_keyboard.c
+@@ -138,6 +138,7 @@ write_mode (int mode)
+   return (i != GRUB_AT_TRIES);
+ }
+ 
++#if !defined (GRUB_MACHINE_COREBOOT)
+ static int
+ query_mode (void)
+ {
+@@ -161,10 +162,12 @@ query_mode (void)
+     return 3;
+   return 0;
+ }
++#endif
+ 
+ static void
+ set_scancodes (void)
+ {
++#if !defined (GRUB_MACHINE_COREBOOT)
+   /* You must have visited computer museum. Keyboard without scancode set
+      knowledge. Assume XT. */
+   if (!grub_keyboard_orig_set)
+@@ -173,20 +176,33 @@ set_scancodes (void)
+       ps2_state.current_set = 1;
+       return;
+     }
++#endif
+ 
+ #if !USE_SCANCODE_SET
+   ps2_state.current_set = 1;
+   return;
+-#else
++#endif
+ 
++#if defined (GRUB_MACHINE_COREBOOT)
++  /* enable translation */
++  grub_keyboard_controller_write (grub_keyboard_controller_orig
++				  & ~KEYBOARD_AT_DISABLE);
++#else
++  /* if not coreboot, disable translation and try mode 2 first, before 1 */
+   grub_keyboard_controller_write (grub_keyboard_controller_orig
+ 				  & ~KEYBOARD_AT_TRANSLATE
+ 				  & ~KEYBOARD_AT_DISABLE);
++#endif
+ 
+   keyboard_controller_wait_until_ready ();
+   grub_outb (KEYBOARD_COMMAND_ENABLE, KEYBOARD_REG_DATA);
+-
+   write_mode (2);
++
++#if defined (GRUB_MACHINE_COREBOOT)
++  /* mode 2 with translation, so make grub treat as set 1 */
++  ps2_state.current_set = 1;
++#else
++  /* if not coreboot, translation isn't set; test 2 and fall back to 1 */
+   ps2_state.current_set = query_mode ();
+   grub_dprintf ("atkeyb", "returned set %d\n", ps2_state.current_set);
+   if (ps2_state.current_set == 2)
+-- 
+2.39.2
+
diff --git a/config/grub/nvme/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/nvme/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
new file mode 100644
index 00000000..fbef86a4
--- /dev/null
+++ b/config/grub/nvme/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
@@ -0,0 +1,38 @@
+From 0a6abeb40ac4284fbff6ef5958989d561b6290a7 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 31 Oct 2023 10:33:28 +0000
+Subject: [PATCH 1/1] keylayouts: don't print "Unknown key" message
+
+on keyboards with stuck keys, this results in GRUB just
+spewing it repeatedly, preventing use of GRUB.
+
+in such cases, it's still possible to use the keyboard,
+and we should let the user at least boot.
+
+it often appears when people plug in faulty usb keyboards,
+but can appear for laptop keyboards too; one of my e6400
+has stuck keys.
+
+with this patch, grub should be a bit more reliable in
+terms of user experience, when the keyboard is faulty.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/commands/keylayouts.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/grub-core/commands/keylayouts.c b/grub-core/commands/keylayouts.c
+index aa3ba34f2..445fa0601 100644
+--- a/grub-core/commands/keylayouts.c
++++ b/grub-core/commands/keylayouts.c
+@@ -174,7 +174,6 @@ grub_term_map_key (grub_keyboard_key_t code, int status)
+   key = map_key_core (code, status, &alt_gr_consumed);
+ 
+   if (key == 0 || key == GRUB_TERM_SHIFT) {
+-    grub_printf ("Unknown key 0x%x detected\n", code);
+     return GRUB_TERM_NO_KEY;
+   }
+ 
+-- 
+2.39.2
+
diff --git a/config/grub/nvme/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/nvme/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
new file mode 100644
index 00000000..25091d16
--- /dev/null
+++ b/config/grub/nvme/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -0,0 +1,102 @@
+From 9e7a651a0f15f2e9dec65a77765c3c4fd97b4165 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 16:14:58 +0000
+Subject: [PATCH 1/1] don't print missing prefix errors on the screen
+
+we do actually set the prefix. this patch modifies
+grub to still set grub_errno and return accordingly,
+so the behaviour is otherwise identical, but it will
+no longer print a warning message on the screen.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/commands/keylayouts.c | 2 +-
+ grub-core/commands/loadenv.c    | 2 +-
+ grub-core/commands/nativedisk.c | 2 +-
+ grub-core/efiemu/main.c         | 3 +--
+ grub-core/font/font.c           | 2 +-
+ grub-core/kern/dl.c             | 2 +-
+ 6 files changed, 6 insertions(+), 7 deletions(-)
+
+diff --git a/grub-core/commands/keylayouts.c b/grub-core/commands/keylayouts.c
+index 445fa0601..00bcf7025 100644
+--- a/grub-core/commands/keylayouts.c
++++ b/grub-core/commands/keylayouts.c
+@@ -211,7 +211,7 @@ grub_cmd_keymap (struct grub_command *cmd __attribute__ ((unused)),
+     {
+       const char *prefix = grub_env_get ("prefix");
+       if (!prefix)
+-	return grub_error (GRUB_ERR_BAD_ARGUMENT, N_("variable `%s' isn't set"), "prefix");
++	return (grub_errno = GRUB_ERR_BAD_ARGUMENT);
+       filename = grub_xasprintf ("%s/layouts/%s.gkb", prefix, argv[0]);
+       if (!filename)
+ 	return grub_errno;
+diff --git a/grub-core/commands/loadenv.c b/grub-core/commands/loadenv.c
+index 166445849..699b39bfa 100644
+--- a/grub-core/commands/loadenv.c
++++ b/grub-core/commands/loadenv.c
+@@ -58,7 +58,7 @@ open_envblk_file (char *filename,
+       prefix = grub_env_get ("prefix");
+       if (! prefix)
+         {
+-          grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++          grub_errno = GRUB_ERR_FILE_NOT_FOUND;
+           return 0;
+         }
+ 
+diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c
+index 580c8d3b0..6806bff9c 100644
+--- a/grub-core/commands/nativedisk.c
++++ b/grub-core/commands/nativedisk.c
+@@ -186,7 +186,7 @@ grub_cmd_nativedisk (grub_command_t cmd __attribute__ ((unused)),
+   prefix = grub_env_get ("prefix");
+ 
+   if (! prefix)
+-    return grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++    return (grub_errno = GRUB_ERR_FILE_NOT_FOUND);
+ 
+   if (prefix)
+     path_prefix = (prefix[0] == '(') ? grub_strchr (prefix, ')') : NULL;
+diff --git a/grub-core/efiemu/main.c b/grub-core/efiemu/main.c
+index e7037f4ed..e5d4dbff1 100644
+--- a/grub-core/efiemu/main.c
++++ b/grub-core/efiemu/main.c
+@@ -231,8 +231,7 @@ grub_efiemu_autocore (void)
+   prefix = grub_env_get ("prefix");
+ 
+   if (! prefix)
+-    return grub_error (GRUB_ERR_FILE_NOT_FOUND,
+-		       N_("variable `%s' isn't set"), "prefix");
++    return (grub_errno = GRUB_ERR_FILE_NOT_FOUND);
+ 
+   suffix = grub_efiemu_get_default_core_name ();
+ 
+diff --git a/grub-core/font/font.c b/grub-core/font/font.c
+index 18de52562..2a0fea6c8 100644
+--- a/grub-core/font/font.c
++++ b/grub-core/font/font.c
+@@ -461,7 +461,7 @@ grub_font_load (const char *filename)
+ 
+ 	  if (!prefix)
+ 	    {
+-	      grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++              grub_errno = GRUB_ERR_FILE_NOT_FOUND;
+ 	      goto fail;
+ 	    }
+ 	  file = try_open_from_prefix (prefix, filename);
+diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
+index 4011e2d15..af3bd00d0 100644
+--- a/grub-core/kern/dl.c
++++ b/grub-core/kern/dl.c
+@@ -758,7 +758,7 @@ grub_dl_load (const char *name)
+     return 0;
+ 
+   if (! grub_dl_dir) {
+-    grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++    grub_errno = GRUB_ERR_FILE_NOT_FOUND;
+     return 0;
+   }
+ 
+-- 
+2.39.2
+
diff --git a/config/grub/nvme/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch b/config/grub/nvme/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
new file mode 100644
index 00000000..f4cf939e
--- /dev/null
+++ b/config/grub/nvme/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
@@ -0,0 +1,34 @@
+From 6237c5762edccc1e1fa4746b1d4aa5e8d81e4883 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 16:36:22 +0000
+Subject: [PATCH 1/1] don't print error if module not found
+
+still set grub_errno accordingly, and otherwise
+behave the same. in libreboot, we remove a lot of
+modules but then rely on loading a grub.cfg
+provided by a distro; in almost all cases that works,
+but also in almost all cases, that will try to load
+a module we don't actually need, but then it prints
+a message. this can annoy some users, so silence it.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/kern/dl.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
+index af3bd00d0..21d0cedb1 100644
+--- a/grub-core/kern/dl.c
++++ b/grub-core/kern/dl.c
+@@ -486,7 +486,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
+ 
+   s = grub_dl_find_section (e, ".modname");
+   if (!s)
+-    return grub_error (GRUB_ERR_BAD_MODULE, "no module name found");
++    return (grub_errno = GRUB_ERR_BAD_MODULE);
+ 
+   mod->name = grub_strdup ((char *) e + s->sh_offset);
+   if (! mod->name)
+-- 
+2.39.2
+
diff --git a/config/grub/nvme/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch b/config/grub/nvme/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
new file mode 100644
index 00000000..25221c9c
--- /dev/null
+++ b/config/grub/nvme/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
@@ -0,0 +1,31 @@
+From e5b7ec81421487e71bcaf8b6b5a27f3649a62753 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 17:25:20 +0000
+Subject: [PATCH 1/1] don't print empty error messages
+
+this is part two of the quest to kill the prefix
+error message. after i disabled prefix-related
+messages, it still printed "error: ." on screen.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/kern/err.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/grub-core/kern/err.c b/grub-core/kern/err.c
+index 53c734de7..7cac53983 100644
+--- a/grub-core/kern/err.c
++++ b/grub-core/kern/err.c
+@@ -107,7 +107,8 @@ grub_print_error (void)
+     {
+       if (grub_errno != GRUB_ERR_NONE)
+ 	{
+-	  grub_err_printf (_("error: %s.\n"), grub_errmsg);
++          if (grub_strlen(grub_errmsg) > 0)
++	    grub_err_printf (_("error: %s.\n"), grub_errmsg);
+ 	  grub_err_printed_errors++;
+ 	}
+     }
+-- 
+2.39.2
+
diff --git a/config/grub/default/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/nvme/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
similarity index 100%
rename from config/grub/default/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
rename to config/grub/nvme/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
diff --git a/config/grub/nvme/target.cfg b/config/grub/nvme/target.cfg
new file mode 100644
index 00000000..a85c97f5
--- /dev/null
+++ b/config/grub/nvme/target.cfg
@@ -0,0 +1,5 @@
+tree="nvme"
+rev="8719cc2040368d43ab2de0b6e1b850b2c9cfc5b7"
+bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
+autoconfargs="--with-platform=coreboot --disable-werror"
+makeargs="FS_PAYLOAD_MODULES=\"\""
diff --git a/config/submodule/grub/nvme/gnulib/module.cfg b/config/submodule/grub/nvme/gnulib/module.cfg
new file mode 100644
index 00000000..6fd77871
--- /dev/null
+++ b/config/submodule/grub/nvme/gnulib/module.cfg
@@ -0,0 +1,3 @@
+subrepo="git://git.sv.gnu.org/gnulib"
+subrepo_bkup="https://codeberg.org/libreboot/gnulib"
+subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
diff --git a/config/submodule/grub/nvme/module.list b/config/submodule/grub/nvme/module.list
new file mode 100644
index 00000000..0e57095c
--- /dev/null
+++ b/config/submodule/grub/nvme/module.list
@@ -0,0 +1 @@
+gnulib

From 61a8f4b05e78b07c58fe2b3330e1cc753049d9f3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 12 Jun 2024 07:36:43 +0100
Subject: [PATCH 0533/1549] haswell: add Nico's patch for IGD PCI IDs

the patch fixes IGD on certain xeon processors

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...-Synchronize-lists-of-graphics-PCI-I.patch | 44 +++++++++++++++++++
 1 file changed, 44 insertions(+)
 create mode 100644 config/coreboot/haswell/patches/0028-nb-intel-haswell-Synchronize-lists-of-graphics-PCI-I.patch

diff --git a/config/coreboot/haswell/patches/0028-nb-intel-haswell-Synchronize-lists-of-graphics-PCI-I.patch b/config/coreboot/haswell/patches/0028-nb-intel-haswell-Synchronize-lists-of-graphics-PCI-I.patch
new file mode 100644
index 00000000..422b291e
--- /dev/null
+++ b/config/coreboot/haswell/patches/0028-nb-intel-haswell-Synchronize-lists-of-graphics-PCI-I.patch
@@ -0,0 +1,44 @@
+From bfb39806c9edbfee7383c99a73e228a5314ee2c2 Mon Sep 17 00:00:00 2001
+From: Nico Huber <nico.h@gmx.de>
+Date: Mon, 03 Jun 2024 20:08:26 +0200
+Subject: [PATCH] nb/intel/haswell: Synchronize lists of graphics PCI IDs
+
+Both, the list of IDs that we hooked our driver up to and the list
+that we use for VBIOS mapping, had gaps. Fill those.
+
+Change-Id: I97c09bb113cf0f35ae158abbd0ba2632dbad7cad
+Signed-off-by: Nico Huber <nico.h@gmx.de>
+Reviewed-on: https://review.coreboot.org/c/coreboot/+/82787
+Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
+Reviewed-by: Angel Pons <th3fanbus@gmail.com>
+---
+
+diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
+index 9e9f980..f7fad31 100644
+--- a/src/northbridge/intel/haswell/gma.c
++++ b/src/northbridge/intel/haswell/gma.c
+@@ -93,12 +93,14 @@
+ 	case 0x80860406:		/* GT1 Mobile */
+ 	case 0x8086040a:		/* GT1 Server */
+ 	case 0x80860a06:		/* GT1 ULT */
++	case 0x80860a0e:		/* GT1 ULX */
+ 
+ 	case 0x80860412:		/* GT2 Desktop */
+ 	case 0x80860416:		/* GT2 Mobile */
+ 	case 0x8086041a:		/* GT2 Server */
+ 	case 0x8086041e:		/* GT1.5 Desktop */
+ 	case 0x80860a16:		/* GT2 ULT */
++	case 0x80860a1e:		/* GT2 ULX */
+ 
+ 	case 0x80860422:		/* GT3 Desktop */
+ 	case 0x80860426:		/* GT3 Mobile */
+@@ -485,6 +487,9 @@
+ 	0x0406, /* Mobile GT1 */
+ 	0x0416, /* Mobile GT2 */
+ 	0x0426, /* Mobile GT3 */
++	0x040a, /* Server GT1 */
++	0x041a, /* Server GT2 */
++	0x042a, /* Server GT3 */
+ 	0x0d16, /* Mobile 4+3 GT1 */
+ 	0x0d26, /* Mobile 4+3 GT2, Mobile GT3e */
+ 	0x0d36, /* Mobile 4+3 GT3 */

From 79d5d83412043b2bde070844fd4bfbc765ed2a01 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 12 Jun 2024 07:39:14 +0100
Subject: [PATCH 0534/1549] haswell: add Mate's patch fixing IGD port list

fixes DP++ and adds a DP that wasn't even there before,
on all currently supported variants of these machines

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ..._9020-Fix-integrated-video-port-list.patch | 30 +++++++++++++++++++
 1 file changed, 30 insertions(+)
 create mode 100644 config/coreboot/haswell/patches/0029-mb-dell-optiplex_9020-Fix-integrated-video-port-list.patch

diff --git a/config/coreboot/haswell/patches/0029-mb-dell-optiplex_9020-Fix-integrated-video-port-list.patch b/config/coreboot/haswell/patches/0029-mb-dell-optiplex_9020-Fix-integrated-video-port-list.patch
new file mode 100644
index 00000000..b599e236
--- /dev/null
+++ b/config/coreboot/haswell/patches/0029-mb-dell-optiplex_9020-Fix-integrated-video-port-list.patch
@@ -0,0 +1,30 @@
+From c8929f5fb43b6e9b491ae00885be507d01b2a896 Mon Sep 17 00:00:00 2001
+From: Mate Kukri <kukri.mate@gmail.com>
+Date: Tue, 11 Jun 2024 20:26:16 +0100
+Subject: [PATCH] mb/dell/optiplex_9020: Fix integrated video port list
+
+- Physical DP ports are DP2/DP3 (HDMI2/HDMI3 for DP++)
+- VGA port is Analog
+- DP1 is not connected
+
+Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
+Change-Id: I8ed79167d5445d607acbee491c3382ff2585583f
+---
+
+diff --git a/src/mainboard/dell/optiplex_9020/gma-mainboard.ads b/src/mainboard/dell/optiplex_9020/gma-mainboard.ads
+index 173f2f1..7d95061 100644
+--- a/src/mainboard/dell/optiplex_9020/gma-mainboard.ads
++++ b/src/mainboard/dell/optiplex_9020/gma-mainboard.ads
+@@ -9,9 +9,10 @@
+ private package GMA.Mainboard is
+ 
+    ports : constant Port_List :=
+-     (DP1,
+-      DP2,
++     (DP2,
+       DP3,
++      HDMI2,
++      HDMI3,
+       Analog,
+       others => Disabled);
+ 

From 67c95fc72d28d4bdeaa43dadeddef1509217e2f1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 12 Jun 2024 07:50:05 +0100
Subject: [PATCH 0535/1549] coreboot nasm: use coreboot mirror as backup

don't use the macports mirror, because it's not certain
whether those tarballs will always be there. use the
coreboot one as a backup instead, and nasm.us as main

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../submodule/coreboot/default/nasm-2.16.01.tar.bz2/module.cfg  | 2 +-
 .../coreboot/fam15h_rdimm/nasm-2.14.02.tar.bz2/module.cfg       | 2 +-
 .../submodule/coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg  | 2 +-
 config/submodule/coreboot/i945/nasm-2.15.05.tar.bz2/module.cfg  | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/config/submodule/coreboot/default/nasm-2.16.01.tar.bz2/module.cfg b/config/submodule/coreboot/default/nasm-2.16.01.tar.bz2/module.cfg
index 53f022b4..a98cab0b 100644
--- a/config/submodule/coreboot/default/nasm-2.16.01.tar.bz2/module.cfg
+++ b/config/submodule/coreboot/default/nasm-2.16.01.tar.bz2/module.cfg
@@ -1,3 +1,3 @@
 subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.01/nasm-2.16.01.tar.bz2"
-subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.01.tar.bz2"
+subfile_bkup="https://coreboot.org/releases/crossgcc-sources/nasm-2.16.01.tar.bz2"
 subhash="daecc50d0c04cfa1e8a09bbece808548478fc03834b0c3fb06a9da56d3b51697e2d09a469cef8a4761290cdfc65e0eb46d76b6ca11dfa1dcd1051882c5e7fd88"
diff --git a/config/submodule/coreboot/fam15h_rdimm/nasm-2.14.02.tar.bz2/module.cfg b/config/submodule/coreboot/fam15h_rdimm/nasm-2.14.02.tar.bz2/module.cfg
index 63cb78cf..fecb3cba 100644
--- a/config/submodule/coreboot/fam15h_rdimm/nasm-2.14.02.tar.bz2/module.cfg
+++ b/config/submodule/coreboot/fam15h_rdimm/nasm-2.14.02.tar.bz2/module.cfg
@@ -1,3 +1,3 @@
 subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.14.02/nasm-2.14.02.tar.bz2"
-subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.14.02.tar.bz2"
+subfile_bkup="https://coreboot.org/releases/crossgcc-sources/nasm-2.14.02.tar.bz2"
 subhash="71e3d44736493b1a56d4230bc2e5519e858aaadde5d89a692f1472fad6755084460e36b42852707f4c862eff75d3f2c232aedcc4e61e9d9ffcc8c9ca6498292b"
diff --git a/config/submodule/coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg b/config/submodule/coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg
index 53f022b4..a98cab0b 100644
--- a/config/submodule/coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg
+++ b/config/submodule/coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg
@@ -1,3 +1,3 @@
 subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.01/nasm-2.16.01.tar.bz2"
-subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.01.tar.bz2"
+subfile_bkup="https://coreboot.org/releases/crossgcc-sources/nasm-2.16.01.tar.bz2"
 subhash="daecc50d0c04cfa1e8a09bbece808548478fc03834b0c3fb06a9da56d3b51697e2d09a469cef8a4761290cdfc65e0eb46d76b6ca11dfa1dcd1051882c5e7fd88"
diff --git a/config/submodule/coreboot/i945/nasm-2.15.05.tar.bz2/module.cfg b/config/submodule/coreboot/i945/nasm-2.15.05.tar.bz2/module.cfg
index 8cc5d518..f60eb55b 100644
--- a/config/submodule/coreboot/i945/nasm-2.15.05.tar.bz2/module.cfg
+++ b/config/submodule/coreboot/i945/nasm-2.15.05.tar.bz2/module.cfg
@@ -1,3 +1,3 @@
 subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.15.05/nasm-2.15.05.tar.bz2"
-subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.15.05.tar.bz2"
+subfile_bkup="https://coreboot.org/releases/crossgcc-sources/nasm-2.15.05.tar.bz2"
 subhash="e608222eea4970249f0ee1638207b3368fb43b87117cfdb2788b2c7fd6e221f567ee8dd9b910f9e0c4837dc4866606cd9baf5c3266b81188037059b79635ea79"

From c8889b8d2c3f17967c9ddd35ea5d00e92ed5e9e2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 12 Jun 2024 08:43:33 +0100
Subject: [PATCH 0536/1549] Libreboot 20240612 release

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../0002-say-the-name-libreboot-in-the-grub-menu.patch          | 2 +-
 .../0002-say-the-name-libreboot-in-the-grub-menu.patch          | 2 +-
 .../0002-say-the-name-libreboot-in-the-grub-menu.patch          | 2 +-
 config/submodule/docs/html/module.cfg                           | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/config/grub/default/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/default/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 6ff97979..b83565fe 100644
--- a/config/grub/default/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/default/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..31308e16a 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20240504 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20240612 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/grub/nvme/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/nvme/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 6ff97979..b83565fe 100644
--- a/config/grub/nvme/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/nvme/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..31308e16a 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20240504 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20240612 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/grub/xhci/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/xhci/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 6ff97979..b83565fe 100644
--- a/config/grub/xhci/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/xhci/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..31308e16a 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20240504 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20240612 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/submodule/docs/html/module.cfg b/config/submodule/docs/html/module.cfg
index 6f5f0773..b0539862 100644
--- a/config/submodule/docs/html/module.cfg
+++ b/config/submodule/docs/html/module.cfg
@@ -1,3 +1,3 @@
-subhash="20fd775c855428ecff647a42823746863fd57efe"
+subhash="88ca46ad4ce0b79682ea88d97f8dbf801e846031"
 subrepo="https://codeberg.org/libreboot/lbwww"
 subrepo_bkup="https://git.disroot.org/libreboot/lbwww"

From baea03c67270a8e213f825d833e0c0b1959d34d0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 Jun 2024 09:11:07 +0100
Subject: [PATCH 0537/1549] roms: simplify main()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 61 ++++++++++++++++++++++++-----------------------------
 1 file changed, 28 insertions(+), 33 deletions(-)

diff --git a/script/roms b/script/roms
index 3ccd8728..88ab8cd1 100755
--- a/script/roms
+++ b/script/roms
@@ -23,38 +23,33 @@ pv="payload_uboot payload_grub_withseabios payload_seabios payload_memtest t"
 pv="$pv payload_seabios_withgrub payload_seabios_grubonly payload_grub mt86bin"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree keymaps release"
 v="$v grub_timeout ubdir board grub_scan_disk uboot_config grubtree grubelf"
-eval "$(setvars "n" $pv serprog)"
-eval "$(setvars "" $v boards _displaymode _payload _keyboard all targets \
-    serprog_boards_dir _scandisk)"
+eval "$(setvars "n" $pv)"
+eval "$(setvars "" $v boards opt_d opt_p opt_k targets serprog_boards_dir opt_s)"
 
 main()
 {
 	while [ $# -gt 0 ]; do
-		case "$1" in
-		list) x_ items config/coreboot; return 0 ;;
-		serprog) serprog="y"; shift 1; break ;;
-		-d) _displaymode="$2" ;;
-		-p) _payload="$2" ;;
-		-k) _keyboard="$2" ;;
-		-s) _scandisk="$2" ;;
-		*)
-			[ "$1" = "all" ] && all="y"
+		if [ "$1" = "-d" ] || [ "$1" = "-p" ] || [ "$1" = "-k" ] || \
+		    [ "$1" = "-s" ]; then
+			[ $# -lt 2 ] && $err "$1: option not specified"
+			eval "opt_$1=\"$2\""; shift 2
+		elif [ "$1" = "serprog" ]; then
+			shift 1; handle_serprog $@; return 0
+		elif [ "$1" = "list" ]; then
+			x_ items config/coreboot; return 0
+		else
+			[ "$1" = "all" ] && shift && continue
 			boards="$1 $boards"
-			shift && continue ;;
-		esac
-		shift 2
+			shift && continue
+		fi
 	done
 
-	if [ "$serprog" = "y" ]; then
-		handle_serprog $@; return 0
-	else
-		[ "$all" != "y" ] || boards="$(items config/coreboot)" || \
-			$err "Cannot generate list of boards for building"
-		for x in $boards; do
-			[ -d "config/coreboot/$x/config" ] && \
-				handle_coreboot_target "$x"; continue
-		done
-	fi
+	[ -n "$boards" ] || boards="$(items config/coreboot)" || \
+		$err "Cannot generate list of boards for building"
+	for x in $boards; do
+		[ -d "config/coreboot/$x/config" ] && \
+			handle_coreboot_target "$x"; continue
+	done
 
 	x="directories"
 	[ "$xbmk_release" = "y" ] && x="archives (remember the inject command)"
@@ -150,7 +145,7 @@ configure_target()
 	# Override the above defaults using target.cfg
 	. "$targetdir/target.cfg"
 
-	[ -n "$_scandisk" ] && grub_scan_disk="$_scandisk"
+	[ -n "$opt_s" ] && grub_scan_disk="$opt_s"
 	[ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata"
 
 	eval "$(setvars "" _ata _ahci _nvme _grub_scan_disk)"
@@ -196,11 +191,11 @@ configure_target()
 		uboot_config="default"
 
 	# Override all payload directives with cmdline args
-	[ -z "$_payload" ] && return 0
+	[ -z "$opt_p" ] && return 0
 	eval "$(setvars "n" payload_grub payload_memtest payload_seabios \
 	    payload_seabios_withgrub payload_uboot payload_grub_withseabios \
 	    payload_seabios_grubonly)"
-	eval "payload_$_payload=y"
+	eval "payload_$opt_p=y"
 }
 
 build_payloads()
@@ -229,9 +224,9 @@ build_grub_payload()
 	for keymapfile in "$grubdata/keymap/"*.gkb; do
 		[ -f "$keymapfile" ] && keymaps="$keymaps $keymapfile"
 	done
-	[ -z "$_keyboard" ] || [ -f "$grubdata/keymap/$_keyboard.gkb" ] || \
-		$err "build_grub_payload: $_keyboard layout not defined"
-	[ -n "$_keyboard" ] && keymaps="$grubdata/keymap/$_keyboard.gkb"
+	[ -z "$opt_k" ] || [ -f "$grubdata/keymap/${opt_k}.gkb" ] || \
+		$err "build_grub_payload: ${opt_k} layout not defined"
+	[ -n "$opt_k" ] && keymaps="$grubdata/keymap/$opt_k.gkb"
 
 	[ -f "$grubelf" ] || x_ ./update trees -b grub $grubtree; return 0
 }
@@ -255,7 +250,7 @@ build_target_mainboard()
 		hmode="vesafb"
 		[ "$initmode" = "vgarom" ] || hmode="corebootfb"
 		modes="$hmode txtmode"
-		[ -z "$_displaymode" ] || modes="$_displaymode"
+		[ -z "$opt_d" ] || modes="$opt_d"
 		for y in $modes; do
 			displaymode="$y"
 			[ "$initmode" = "normal" ] && \
@@ -341,7 +336,7 @@ build_grub_roms()
 
 	tmpcfg="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" > "$tmpcfg" || \
-	    $err "set grub_scandisk, $grub_scan_disk, $tmpcfg"
+	    $err "set grubopt_s, $grub_scan_disk, $tmpcfg"
 	x_ "$cbfstool" "$tmprom" add -f "$tmpcfg" -n scan.cfg -t raw
 	printf "set timeout=%s\n" "$grub_timeout" > "$tmpcfg" || \
 	    $err "set timeout, $grub_timeout, $tmpcfg"

From 98724d701b10a037e8ffa7ce2864a08993268517 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 Jun 2024 13:19:25 +0100
Subject: [PATCH 0538/1549] lib.sh: remove the items() function

it's pretty much just doing the same thing as ls -1

remove it!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             |  2 +-
 include/lib.sh    | 13 -------------
 include/vendor.sh |  2 +-
 script/roms       |  4 ++--
 script/trees      |  2 +-
 5 files changed, 5 insertions(+), 18 deletions(-)

diff --git a/build b/build
index 19ed8875..834fd50b 100755
--- a/build
+++ b/build
@@ -119,7 +119,7 @@ build_release()
 
 fetch_trees()
 {
-	for x in $(items config/git); do
+	for x in $(ls -1 config/git); do
 		./update trees -f "$x" || $err "$_xm: fetch $x"
 		singletree "$x" || x_ rm -Rf "src/$x/$x"
 	done
diff --git a/include/lib.sh b/include/lib.sh
index c2ad87ed..a329fa3f 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -118,19 +118,6 @@ done
 relname="$projectname-$version"
 export LOCALVERSION="-$projectname-${version%%-*}"
 
-items()
-{
-	rval=1
-	e "$1" d not && return 1
-	for x in "$1/"*; do
-		# -e used because this is for files *or* directories
-		[ -e "$x" ] || continue
-		printf "%s\n" "${x##*/}" 2>/dev/null
-		rval=0
-	done
-	return $rval
-}
-
 scan_config()
 {
 	awkstr=" /\{.*$1.*}{/ {flag=1;next} /\}/{flag=0} flag { print }"
diff --git a/include/vendor.sh b/include/vendor.sh
index b2fc5346..b5fda8f3 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -241,7 +241,7 @@ vendor_inject()
 	set +u +e
 
 	[ $# -lt 1 ] && $err "No options specified."
-	[ "$1" = "listboards" ] && eval "items config/coreboot || :; exit 0"
+	[ "$1" = "listboards" ] && eval "ls -1 config/coreboot || :; exit 0"
 
 	archive="$1"
 
diff --git a/script/roms b/script/roms
index 88ab8cd1..3890eddc 100755
--- a/script/roms
+++ b/script/roms
@@ -36,7 +36,7 @@ main()
 		elif [ "$1" = "serprog" ]; then
 			shift 1; handle_serprog $@; return 0
 		elif [ "$1" = "list" ]; then
-			x_ items config/coreboot; return 0
+			x_ ls -1 config/coreboot; return 0
 		else
 			[ "$1" = "all" ] && shift && continue
 			boards="$1 $boards"
@@ -44,7 +44,7 @@ main()
 		fi
 	done
 
-	[ -n "$boards" ] || boards="$(items config/coreboot)" || \
+	[ -n "$boards" ] || boards="$(ls -1 config/coreboot)" || \
 		$err "Cannot generate list of boards for building"
 	for x in $boards; do
 		[ -d "config/coreboot/$x/config" ] && \
diff --git a/script/trees b/script/trees
index 4d9a5d08..f090f539 100755
--- a/script/trees
+++ b/script/trees
@@ -87,7 +87,7 @@ build_targets()
 	# Build for all targets if no argument is given
 	[ $# -gt 0 ] && target1="$1"
 	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && shift 1
-	targets="$(items "$cfgsdir")" || $err "Can't get options for $cfgsdir"
+	targets="$(ls -1 "$cfgsdir")" || $err "Can't get options for $cfgsdir"
 	[ $# -gt 0 ] && targets=$@
 
 	handle_targets

From 167e1a0fbe6765aaa5f5d3dc682709aa3c31260b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 Jun 2024 13:36:31 +0100
Subject: [PATCH 0539/1549] unified checks for variable initialisation

new function chkvars() does the job

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 9 +++------
 include/lib.sh | 8 +++++++-
 include/mrc.sh | 6 ++----
 script/trees   | 5 ++---
 4 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 46b63014..c1e7b4ba 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -52,8 +52,7 @@ fetch_project_repo()
 	eval "$(setvars "" xtree tree_depend)"
 
 	scan_config "$project" "config/git"
-	[ -z "${loc+x}" ] && $err "fetch_project_repo $project: loc not set"
-	[ -z "${url+x}" ] && $err "fetch_project_repo $project: url not set"
+	chkvars loc url
 
 	[ -n "$xtree" ] && [ ! -d "src/coreboot/$xtree" ] && \
 		x_ ./update trees -f coreboot "$xtree"
@@ -87,7 +86,7 @@ git_prep()
 	_patchdir="$3" # $1 and $2 are gitrepo and gitrepo_backup
 	_loc="$4"
 
-	[ -z "${rev+x}" ] && $err "git_prep $_loc: rev not set"
+	chkvars rev
 
 	tmpclone "$1" "$2" "$tmpgit" "$rev" "$_patchdir"
 	if singletree "$project" || [ $# -gt 4 ]; then
@@ -130,9 +129,7 @@ fetch_submodule()
 
 	[ -z "$st" ] && return 0 # subrepo/subfile not defined
 
-	for mvar in "sub${st}" "sub${st}_bkup" "subhash"; do
-		eval "[ -n \"\$$mvar\" ] || $err \"$1, $mdir: $mvar unset\""
-	done
+	chkvars "sub${st}" "sub${st}_bkup" "subhash"
 
 	if [ "$st" = "repo" ]; then
 		rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
diff --git a/include/lib.sh b/include/lib.sh
index a329fa3f..3de05c24 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -41,6 +41,12 @@ setvars()
 	done
 	printf "%s\n" "${_setvars% }"
 }
+chkvars()
+{
+	for var in $@; do
+		eval "[ -n "\${$var+x}" ] || \$err \"$var unset\""
+	done
+}
 
 eval "$(setvars "" xbmk_release tmpdir _nogit version board boarddir relname \
     versiondate threads projectname projectsite aur_notice cfgsdir datadir)"
@@ -112,7 +118,7 @@ versiondate_="$versiondate"
 [ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
     --pretty='%ct' HEAD)" || versiondate="$versiondate_"
 for p in projectname version versiondate projectsite; do
-	eval "[ -n \"\$$p\" ] || $err \"$p unset\""
+	chkvars "$p"
 	eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
 done
 relname="$projectname-$version"
diff --git a/include/mrc.sh b/include/mrc.sh
index caf893a7..fddaef5d 100755
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -8,9 +8,7 @@ eval "$(setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL)"
 
 extract_mrc()
 {
-	[ -z "$MRC_board" ] && $err "extract_mrc $MRC_hash: MRC_board not set"
-	[ -z "$CONFIG_MRC_FILE" ] && $err "$MRC_hash: CONFIG_MRC_FILE unset"
-
+	chkvars "MRC_board" "CONFIG_MRC_FILE"
 	SHELLBALL="chromeos-firmwareupdate-$MRC_board"
 
 	(
@@ -49,7 +47,7 @@ extract_refcode()
 	# cbfstool changed the attributes scheme for stage files,
 	# incompatible with older versions before coreboot 4.14,
 	# so we need coreboot 4.13 cbfstool for certain refcode files
-	[ -n "$cbfstoolref" ] || $err "$board: MRC_refcode_cbtree not set"
+	chkvars cbfstoolref
 	mkdir -p "${_refdest%/*}" || $err "ref: !mkdir -p ${_refdest%/*}"
 
 	"$cbfstoolref" "$appdir/bios.bin" extract \
diff --git a/script/trees b/script/trees
index f090f539..a773f03c 100755
--- a/script/trees
+++ b/script/trees
@@ -131,7 +131,7 @@ handle_src_tree()
 	load_project_config "$target_dir"
 	x_ mkdir -p "$elfdir/$target"
 
-	[ -z "$tree" ] && $err "handle_src_tree $project/$tree: tree unset"
+	chkvars tree
 	cdir="src/$project/$tree"
 
 	if [ ! -d "$cdir" ]; then
@@ -279,8 +279,7 @@ mkpayload_grub()
 
 	. "$grubdata/module/$tree" || $err "$tree: !source grub modules"
 
-	[ -z "$grub_install_modules" ] && $err "$tree: install modules unset"
-	[ -z "$grub_modules" ] && $err "$tree: modules unset"
+	chkvars "grub_install_modules" "grub_modules"
 
 	"${cdir}/grub-mkstandalone" --grub-mkimage="${cdir}/grub-mkimage" \
 	    -O i386-coreboot -o "${cdir}/grub.elf" -d "${cdir}/grub-core/" \

From a4328cb11f927c3cceb01dcaf4d7fc7632076119 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 Jun 2024 14:01:42 +0100
Subject: [PATCH 0540/1549] roms: remove dangerous runtime p/s/d options

p = payload

s = grub_scan_disk

d = displaymode

setting the payload is no longer safe, due to issue 216
and similar issues that might pop up in the future; it's
best left only to target.cfg, per board, so that we know
what config is safe/tested. don't let the user override it.

scandisk isn't safe to override because the given machine
may not have the type of device that the user specifies

displaymode is actually ok to set, because it simply whitelists
what configs pre-existing to actually use, but it's bloat

basically, the rule is this:

don't make it easy for the user to brick their hardware.
make it harder instead.

a user wily enough to go modifying their payload will probably
have read docs/maintain/ anyway and knows how to edit target.cfg
if they want another board configuration.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 20 +++++---------------
 1 file changed, 5 insertions(+), 15 deletions(-)

diff --git a/script/roms b/script/roms
index 3890eddc..caa37a55 100755
--- a/script/roms
+++ b/script/roms
@@ -24,15 +24,14 @@ pv="$pv payload_seabios_withgrub payload_seabios_grubonly payload_grub mt86bin"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree keymaps release"
 v="$v grub_timeout ubdir board grub_scan_disk uboot_config grubtree grubelf"
 eval "$(setvars "n" $pv)"
-eval "$(setvars "" $v boards opt_d opt_p opt_k targets serprog_boards_dir opt_s)"
+eval "$(setvars "" $v boards opt_k targets serprog_boards_dir)"
 
 main()
 {
 	while [ $# -gt 0 ]; do
-		if [ "$1" = "-d" ] || [ "$1" = "-p" ] || [ "$1" = "-k" ] || \
-		    [ "$1" = "-s" ]; then
+		if [ "$1" = "-k" ]; then
 			[ $# -lt 2 ] && $err "$1: option not specified"
-			eval "opt_$1=\"$2\""; shift 2
+			opt_k="$2"
 		elif [ "$1" = "serprog" ]; then
 			shift 1; handle_serprog $@; return 0
 		elif [ "$1" = "list" ]; then
@@ -145,7 +144,6 @@ configure_target()
 	# Override the above defaults using target.cfg
 	. "$targetdir/target.cfg"
 
-	[ -n "$opt_s" ] && grub_scan_disk="$opt_s"
 	[ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata"
 
 	eval "$(setvars "" _ata _ahci _nvme _grub_scan_disk)"
@@ -188,14 +186,7 @@ configure_target()
 	[ "$payload_uboot" != "n" ] && [ "$payload_uboot" != "y" ] && \
 		payload_uboot="n"
 	[ "$payload_uboot" = "y" ] && [ -z "$uboot_config" ] && \
-		uboot_config="default"
-
-	# Override all payload directives with cmdline args
-	[ -z "$opt_p" ] && return 0
-	eval "$(setvars "n" payload_grub payload_memtest payload_seabios \
-	    payload_seabios_withgrub payload_uboot payload_grub_withseabios \
-	    payload_seabios_grubonly)"
-	eval "payload_$opt_p=y"
+		uboot_config="default"; return 0
 }
 
 build_payloads()
@@ -250,7 +241,6 @@ build_target_mainboard()
 		hmode="vesafb"
 		[ "$initmode" = "vgarom" ] || hmode="corebootfb"
 		modes="$hmode txtmode"
-		[ -z "$opt_d" ] || modes="$opt_d"
 		for y in $modes; do
 			displaymode="$y"
 			[ "$initmode" = "normal" ] && \
@@ -336,7 +326,7 @@ build_grub_roms()
 
 	tmpcfg="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" > "$tmpcfg" || \
-	    $err "set grubopt_s, $grub_scan_disk, $tmpcfg"
+	    $err "set grub_scan_disk, $grub_scan_disk, $tmpcfg"
 	x_ "$cbfstool" "$tmprom" add -f "$tmpcfg" -n scan.cfg -t raw
 	printf "set timeout=%s\n" "$grub_timeout" > "$tmpcfg" || \
 	    $err "set timeout, $grub_timeout, $tmpcfg"

From eb9a688ee32cf90d43fa5a15eaac686277d5f3c0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 Jun 2024 14:09:33 +0100
Subject: [PATCH 0541/1549] roms: remove redundant check on grub_scan_disk

the current validation check is extremely over-engineered,
because the user override is no longer available and we're
always very careful in how we modify target.cfg per board.

remove the redundant code. trust that target.cfg is correct.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 17 -----------------
 1 file changed, 17 deletions(-)

diff --git a/script/roms b/script/roms
index caa37a55..3f826a1d 100755
--- a/script/roms
+++ b/script/roms
@@ -146,23 +146,6 @@ configure_target()
 
 	[ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata"
 
-	eval "$(setvars "" _ata _ahci _nvme _grub_scan_disk)"
-
-	for _disk in $grub_scan_disk; do
-		[ "$_disk" != "nvme" ] && [ "$_disk" != "ahci" ] && \
-		    [ "$_disk" != "ata" ] && _grub_scan_disk="nvme ahci ata" \
-		    && break
-
-		[ -n "$_ata" ] && [ "$_disk" = "ata" ] && continue
-		[ -n "$_ahci" ] && [ "$_disk" = "ahci" ] && continue
-		[ -n "$_nvme" ] && [ "$_disk" = "nvme" ] && continue
-
-		eval "_$_disk=\"$_disk\""
-		_grub_scan_disk="$_grub_scan_disk $_disk"
-	done
-	[ -z "$_grub_scan_disk" ] && _grub_scan_disk="nvme ahci ata"
-	grub_scan_disk="${_grub_scan_disk# }"
-
 	[ -n "$grubtree" ] || grubtree="default"
 	grubelf="elf/grub/$grubtree/payload/grub.elf"
 

From f626b25db3a3752a070a3dbd2b4420e4b0a33dbc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 Jun 2024 14:19:44 +0100
Subject: [PATCH 0542/1549] roms: simplify main() again

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 29 +++++++++++------------------
 1 file changed, 11 insertions(+), 18 deletions(-)

diff --git a/script/roms b/script/roms
index 3f826a1d..f67efeb4 100755
--- a/script/roms
+++ b/script/roms
@@ -29,18 +29,16 @@ eval "$(setvars "" $v boards opt_k targets serprog_boards_dir)"
 main()
 {
 	while [ $# -gt 0 ]; do
+		[ "$1" = "list" ] && eval "x_ ls -1 config/coreboot; return 0"
+		[ "$1" = "serprog" ] && eval "shift 1; mkserprog $@; return 0"
+
 		if [ "$1" = "-k" ]; then
 			[ $# -lt 2 ] && $err "$1: option not specified"
-			opt_k="$2"
-		elif [ "$1" = "serprog" ]; then
-			shift 1; handle_serprog $@; return 0
-		elif [ "$1" = "list" ]; then
-			x_ ls -1 config/coreboot; return 0
-		else
-			[ "$1" = "all" ] && shift && continue
-			boards="$1 $boards"
-			shift && continue
+			opt_k="$2"; continue
 		fi
+
+		[ "$1" = "all" ] && shift && continue
+		boards="$1 $boards"; shift 1
 	done
 
 	[ -n "$boards" ] || boards="$(ls -1 config/coreboot)" || \
@@ -50,18 +48,13 @@ main()
 			handle_coreboot_target "$x"; continue
 	done
 
-	x="directories"
-	[ "$xbmk_release" = "y" ] && x="archives (remember the inject command)"
-
 	[ -z "$targets" ] && $err "No ROM images were compiled"
-	printf "\nROM images available in these %s:\n" "$x"
-	eval "printf \"$targets\""
-	printf "^^ ROM images available in these %s.\n\n" "$x"
+	eval "printf \"\\n\\n$targets\\n\\n\"n"
 
 	printf "DO NOT flash images from elf/ - please use bin/ instead.\n"
 }
 
-handle_serprog()
+mkserprog()
 {
 	[ -z "${1+x}" ] && badcmd
 	[ "$1" != "rp2040" ] && [ "$1" != "stm32" ] && $err "bad command"
@@ -131,9 +124,9 @@ handle_coreboot_target()
 	build_target_mainboard
 
 	[ -d "bin/$board" ] || return 0
-	[ "$xbmk_release" = "y" ] || targets="* bin/$board\n$targets"
+	[ "$xbmk_release" = "y" ] || targets="* Check: bin/$board\n$targets"
 	[ "$xbmk_release" = "y" ] && mkrom_tarball "bin/$board" && \
-	    targets="* bin/${relname}_$board.tar.xz\n$targets"; return 0
+	    targets="* Check: bin/${relname}_$board.tar.xz\n$targets"; return 0
 }
 
 configure_target()

From d1c0c34642a892ec7e6b85066f19a4ec49d3624f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 Jun 2024 16:26:49 +0100
Subject: [PATCH 0543/1549] roms: simplify target check (whether roms built)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 23 ++++++++---------------
 1 file changed, 8 insertions(+), 15 deletions(-)

diff --git a/script/roms b/script/roms
index f67efeb4..17a91b7f 100755
--- a/script/roms
+++ b/script/roms
@@ -45,12 +45,11 @@ main()
 		$err "Cannot generate list of boards for building"
 	for x in $boards; do
 		[ -d "config/coreboot/$x/config" ] && \
-			handle_coreboot_target "$x"; continue
+			handle_coreboot_target "$x" && targets="$targets, $x"
 	done
 
 	[ -z "$targets" ] && $err "No ROM images were compiled"
-	eval "printf \"\\n\\n$targets\\n\\n\"n"
-
+	printf "Check these ROM directories in bins/: %s\n" "${targets#, }"
 	printf "DO NOT flash images from elf/ - please use bin/ instead.\n"
 }
 
@@ -116,17 +115,8 @@ handle_coreboot_target()
 	grub_background="background1280x800.png"
 	board="$1"
 
-	configure_target
-	[ "$board" = "$tree" ] && return 0
-	[ "$xbmk_release" = "y" ] && [ "$release" = "n" ] && return 0
-
-	build_payloads
-	build_target_mainboard
-
-	[ -d "bin/$board" ] || return 0
-	[ "$xbmk_release" = "y" ] || targets="* Check: bin/$board\n$targets"
-	[ "$xbmk_release" = "y" ] && mkrom_tarball "bin/$board" && \
-	    targets="* Check: bin/${relname}_$board.tar.xz\n$targets"; return 0
+	configure_target && build_payloads && build_target_mainboard && \
+	    [ ! -d "bin/$board" ] && return 0; return 1
 }
 
 configure_target()
@@ -162,7 +152,10 @@ configure_target()
 	[ "$payload_uboot" != "n" ] && [ "$payload_uboot" != "y" ] && \
 		payload_uboot="n"
 	[ "$payload_uboot" = "y" ] && [ -z "$uboot_config" ] && \
-		uboot_config="default"; return 0
+		uboot_config="default"
+
+	[ "$xbmk_release" = "y" ] && [ "$release" = "n" ] && return 1
+	[ "$board" = "$tree" ] && return 1; return 0
 }
 
 build_payloads()

From af8296ce6b9c9d2386e4dae2fc5d43350f5f2e26 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 Jun 2024 16:34:05 +0100
Subject: [PATCH 0544/1549] roms: merge handle_coreboot_target into main()

rely on return status per each of the three main rom
functions, to then update the "targets" variable.

use this as the basis to determine which targets were
built, during final confirmation when the script exits.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 17 ++++++-----------
 1 file changed, 6 insertions(+), 11 deletions(-)

diff --git a/script/roms b/script/roms
index 17a91b7f..9315bec6 100755
--- a/script/roms
+++ b/script/roms
@@ -44,12 +44,13 @@ main()
 	[ -n "$boards" ] || boards="$(ls -1 config/coreboot)" || \
 		$err "Cannot generate list of boards for building"
 	for x in $boards; do
-		[ -d "config/coreboot/$x/config" ] && \
-			handle_coreboot_target "$x" && targets="$targets, $x"
+		[ -d "config/coreboot/$x/config" ] && configure_target "$x" \
+		    && build_payloads && build_board && [ -d "bin/$board" ] \
+		    && targets="$targets, $x"; continue
 	done
 
 	[ -z "$targets" ] && $err "No ROM images were compiled"
-	printf "Check these ROM directories in bins/: %s\n" "${targets#, }"
+	printf "Check these ROM directories in bin/: %s\n" "${targets#, }"
 	printf "DO NOT flash images from elf/ - please use bin/ instead.\n"
 }
 
@@ -109,18 +110,12 @@ list_serprog_boards()
 	basename -a -s .h "$1/"*.h || $err "$1: can't list boards"
 }
 
-handle_coreboot_target()
+configure_target()
 {
 	eval "$(setvars "n" $pv) $(setvars "" $v)"
 	grub_background="background1280x800.png"
 	board="$1"
 
-	configure_target && build_payloads && build_target_mainboard && \
-	    [ ! -d "bin/$board" ] && return 0; return 1
-}
-
-configure_target()
-{
 	targetdir="$cfgsdir/$board"
 	[ -f "$targetdir/target.cfg" ] || $err "$board: target.cfg missing"
 
@@ -201,7 +196,7 @@ build_uboot_payload()
 	[ -f "$ubootelf" ] || $err "$board: Can't find u-boot"; return 0
 }
 
-build_target_mainboard()
+build_board()
 {
 	x_ rm -Rf "$romdir"
 

From 26451775d5c81949793f57010b0449b4f540ef11 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 Jun 2024 17:34:30 +0100
Subject: [PATCH 0545/1549] roms: don't add grub keymaps at all

if not inserted, the default keymap is usqwerty.

don't waste ssd write cycles copying so many images,
or cpu time compressing so many. the user can simply
add a keymap.gkb file to cbfs and it will work fine.

this will be documented in the next release.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 69 +++++++++++++++--------------------------------------
 1 file changed, 19 insertions(+), 50 deletions(-)

diff --git a/script/roms b/script/roms
index 9315bec6..92dc1e9e 100755
--- a/script/roms
+++ b/script/roms
@@ -21,22 +21,16 @@ stm32src="src/stm32-vserprog"
 # target.cfg files have to specifically enable [a] payload(s)
 pv="payload_uboot payload_grub_withseabios payload_seabios payload_memtest t"
 pv="$pv payload_seabios_withgrub payload_seabios_grubonly payload_grub mt86bin"
-v="romdir cbrom initmode displaymode cbcfg targetdir tree keymaps release"
+v="romdir cbrom initmode displaymode cbcfg targetdir tree release"
 v="$v grub_timeout ubdir board grub_scan_disk uboot_config grubtree grubelf"
 eval "$(setvars "n" $pv)"
-eval "$(setvars "" $v boards opt_k targets serprog_boards_dir)"
+eval "$(setvars "" $v boards targets serprog_boards_dir)"
 
 main()
 {
 	while [ $# -gt 0 ]; do
 		[ "$1" = "list" ] && eval "x_ ls -1 config/coreboot; return 0"
 		[ "$1" = "serprog" ] && eval "shift 1; mkserprog $@; return 0"
-
-		if [ "$1" = "-k" ]; then
-			[ $# -lt 2 ] && $err "$1: option not specified"
-			opt_k="$2"; continue
-		fi
-
 		[ "$1" = "all" ] && shift && continue
 		boards="$1 $boards"; shift 1
 	done
@@ -169,23 +163,12 @@ build_payloads()
 
 	[ "$payload_seabios" = "y" ] && x_ ./update trees -b seabios
 	if [ "$payload_grub" = "y" ] || [ "$payload_seabios_withgrub" = "y" ] \
-	    || [ "$payload_seabios_grubonly" = "y" ]; then build_grub_payload
+	    || [ "$payload_seabios_grubonly" = "y" ]; then
+		[ -f "$grubelf" ] || x_ ./update trees -b grub $grubtree
 	fi
 	[ "$payload_uboot" = "y" ] && build_uboot_payload; return 0
 }
 
-build_grub_payload()
-{
-	for keymapfile in "$grubdata/keymap/"*.gkb; do
-		[ -f "$keymapfile" ] && keymaps="$keymaps $keymapfile"
-	done
-	[ -z "$opt_k" ] || [ -f "$grubdata/keymap/${opt_k}.gkb" ] || \
-		$err "build_grub_payload: ${opt_k} layout not defined"
-	[ -n "$opt_k" ] && keymaps="$grubdata/keymap/$opt_k.gkb"
-
-	[ -f "$grubelf" ] || x_ ./update trees -b grub $grubtree; return 0
-}
-
 build_uboot_payload()
 {
 	x_ ./update trees -b u-boot $board
@@ -256,7 +239,7 @@ build_seabios_roms()
 	x_ rm -f "$t"
 }
 
-# Make separate ROM images with GRUB payload, for each supported keymap
+# Make separate ROM images with GRUB payload
 build_grub_roms()
 {
 	tmprom="$1"
@@ -298,35 +281,21 @@ build_grub_roms()
 	    -f "$tmpcfg" -n timeout.cfg -t raw
 	x_ rm -f "$tmpcfg"
 
-	for keymapfile in $keymaps; do
-		[ -f "$keymapfile" ] || continue
-		keymap="${keymapfile##*/}"
-		keymap="${keymap%.gkb}"
-
-		tmpgrubrom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
-		x_ cp "$tmprom" "$tmpgrubrom"
-		x_ "$cbfstool" "$tmpgrubrom" add -f "$keymapfile" \
-		    -n keymap.gkb -t raw
-
-		newrom="$romdir/${payload1}_${board}_${initmode}_"
-		newrom="$newrom${displaymode}_$keymap.rom"
-		[ "$initmode" = "normal" ] && newrom="$romdir/${payload1}_" \
-		    && newrom="$newrom${board}_${initmode}_$keymap.rom"
-		x_ cprom "$tmpgrubrom" "$newrom"
-		if [ "$payload_seabios_withgrub" = "y" ] && \
-		    [ "$payload1" != "grub" ]; then
-			x_ "$cbfstool" "$tmpgrubrom" add \
-			    -f "$grubdata/bootorder" -n bootorder -t raw
-			x_ cprom "$tmpgrubrom" "${newrom%.rom}_grubfirst.rom"
-			if [ "$payload_seabios_grubonly" = "y" ]; then
-				x_ "$cbfstool" "$tmpgrubrom" add-int -i 0 \
-				    -n etc/show-boot-menu
-				x_ cprom "$tmpgrubrom" \
-				    "${newrom%.rom}_grubonly.rom"
-			fi
+	newrom="$romdir/${payload1}_${board}_${initmode}_$displaymode.rom"
+	[ "$initmode" = "normal" ] && newrom="$romdir/${payload1}_" \
+	    && newrom="$newrom${board}_$initmode.rom"
+	x_ cprom "$tmprom" "$newrom"
+	if [ "$payload_seabios_withgrub" = "y" ] && \
+	    [ "$payload1" != "grub" ]; then
+		x_ "$cbfstool" "$tmprom" add \
+		    -f "$grubdata/bootorder" -n bootorder -t raw
+		x_ cprom "$tmprom" "${newrom%.rom}_grubfirst.rom"
+		if [ "$payload_seabios_grubonly" = "y" ]; then
+			x_ "$cbfstool" "$tmprom" add-int -i 0 \
+			    -n etc/show-boot-menu
+			x_ cprom "$tmprom" "${newrom%.rom}_grubonly.rom"
 		fi
-		x_ rm -f "$tmpgrubrom"
-	done
+	fi
 }
 
 # make a rom in /tmp/ and then print the path of that ROM

From ed9c90e59d959bab544598d330c724e44afcc096 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 15 Jun 2024 20:22:19 +0100
Subject: [PATCH 0546/1549] roms: unify all add-payload commands

add a generic function that can insert payloads with lzma
compression, or raw files without compression

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh |  7 +++++++
 script/roms    | 29 +++++++++++------------------
 2 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 3de05c24..bf734f3a 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -245,3 +245,10 @@ vendor_checksum()
 	printf "Bad checksum for file: %s\n" "$2" 1>&2
 	rm -f "$2" || :
 }
+
+cbfs()
+{
+	ccmd="add-payload" && [ $# -gt 3 ] && ccmd="add"
+	lzma="-c lzma" && [ $# -gt 3 ] && lzma="-t raw"
+	x_ "$cbfstool" "$1" $ccmd -f "$2" -n "$3" $lzma
+}
diff --git a/script/roms b/script/roms
index 92dc1e9e..0e4b4b72 100755
--- a/script/roms
+++ b/script/roms
@@ -213,8 +213,7 @@ build_roms()
 	cbrom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 	x_ cp "$_cbrom" "$cbrom"
 
-	[ "$payload_memtest" != "y" ] || x_ "$cbfstool" "$cbrom" add-payload \
-	    -f "$mt86bin" -n img/memtest -c lzma
+	[ "$payload_memtest" != "y" ] || cbfs "$cbrom" "$mt86bin" img/memtest
 	[ "$payload_seabios" = "y" ] && build_seabios_roms
 	[ "$payload_grub" != "y" ] || x_ build_grub_roms "$cbrom" "grub"
 	[ "$payload_uboot" = "y" ] || return 0
@@ -260,25 +259,22 @@ build_grub_roms()
 	fi
 
 	# we only need insert grub.elf once, for each coreboot config:
-	x_ "$cbfstool" "$tmprom" add-payload -f "$grubelf" \
-	    -n "$grub_cbfs" -c lzma
+	cbfs "$tmprom" "$grubelf" "$grub_cbfs"
 
 	# we only need insert background.png once, for each coreboot config:
 	if [ "$displaymode" = "vesafb" ] || \
 	    [ "$displaymode" = "corebootfb" ]; then
-		backgroundfile="$grubdata/background/$grub_background"
-		"$cbfstool" "$tmprom" add -f "$backgroundfile" -n \
-		    background.png -t raw || $err "!bg, $backgroundfile"
+		cbfs "$tmprom" "$grubdata/background/$grub_background" \
+		    background.png raw
 	fi
 
 	tmpcfg="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" > "$tmpcfg" || \
 	    $err "set grub_scan_disk, $grub_scan_disk, $tmpcfg"
-	x_ "$cbfstool" "$tmprom" add -f "$tmpcfg" -n scan.cfg -t raw
+	cbfs "$tmprom" "$tmpcfg" scan.cfg raw
 	printf "set timeout=%s\n" "$grub_timeout" > "$tmpcfg" || \
 	    $err "set timeout, $grub_timeout, $tmpcfg"
-	[ -z "$grub_timeout" ] || x_ "$cbfstool" "$tmprom" add \
-	    -f "$tmpcfg" -n timeout.cfg -t raw
+	[ -z "$grub_timeout" ] || cbfs "$tmprom" "$tmpcfg" timeout.cfg raw
 	x_ rm -f "$tmpcfg"
 
 	newrom="$romdir/${payload1}_${board}_${initmode}_$displaymode.rom"
@@ -287,8 +283,7 @@ build_grub_roms()
 	x_ cprom "$tmprom" "$newrom"
 	if [ "$payload_seabios_withgrub" = "y" ] && \
 	    [ "$payload1" != "grub" ]; then
-		x_ "$cbfstool" "$tmprom" add \
-		    -f "$grubdata/bootorder" -n bootorder -t raw
+		cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
 		x_ cprom "$tmprom" "${newrom%.rom}_grubfirst.rom"
 		if [ "$payload_seabios_grubonly" = "y" ]; then
 			x_ "$cbfstool" "$tmprom" add-int -i 0 \
@@ -307,15 +302,14 @@ mkSeabiosRom() {
 	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 
 	x_ cp "$_cbrom" "$tmprom"
-	x_ "$cbfstool" "$tmprom" add-payload -f "$_seabioself" \
-	    -n "$_seabios_cbfs_path" -c lzma
+	cbfs "$tmprom" "$_seabioself" "$_seabios_cbfs_path"
 	x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
 
 	z="2"; [ "$initmode" = "vgarom" ] && z="0"
 	x_ "$cbfstool" "$tmprom" add-int -i $z -n etc/pci-optionrom-exec
 	x_ "$cbfstool" "$tmprom" add-int -i 0 -n etc/optionroms-checksum
-	[ "$initmode" != "libgfxinit" ] || x_ "$cbfstool" "$tmprom" add -f \
-	    "$seavgabiosrom" -n vgaroms/seavgabios.bin -t raw
+	[ "$initmode" != "libgfxinit" ] || cbfs "$tmprom" "$seavgabiosrom" \
+	    vgaroms/seavgabios.bin raw
 
 	printf "%s\n" "$tmprom"
 }
@@ -342,8 +336,7 @@ mkUbootRom() {
 	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 
 	x_ cp "$_cbrom" "$tmprom"
-	x_ "$cbfstool" "$tmprom" add-payload -f "$_ubootelf" \
-	    -n "$_uboot_cbfs_path" -c lzma
+	cbfs "$tmprom" "$_ubootelf" "$_uboot_cbfs_path"
 
 	printf "%s\n" "$tmprom"
 }

From 340eea0b1cd445feb7134eae4211f469fd6f5d2a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 15 Jun 2024 22:53:34 +0100
Subject: [PATCH 0547/1549] grub: insert background in memdisk instead

the background is only a few kb. the whole rationale
before was to limit the space used in memdisk, but this
decision was made when the background was much bigger;
it has since been optimised greatly, and the grub modules
were heavily reduce, so it should be safe.

grub's memdisk breaks when you add too much data to it.
as part of simplifying the rest of lbmk, this change removes
some more bloat from the rest of lbmk. handling this in the
memdisk is much simpler than handling it with cbfstool.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/t60_16mb_intelgpu/target.cfg |  1 -
 config/coreboot/t60_intelgpu/target.cfg      |  1 -
 config/coreboot/x60/target.cfg               |  1 -
 config/coreboot/x60_16mb/target.cfg          |  1 -
 config/grub/default/config/payload           | 15 ++++++++-------
 config/grub/nvme/config/payload              | 15 ++++++++-------
 config/grub/xhci/config/payload              | 15 ++++++++-------
 script/roms                                  |  9 ---------
 script/trees                                 |  3 ++-
 9 files changed, 26 insertions(+), 35 deletions(-)

diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 80f93d49..043bd365 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -2,5 +2,4 @@ tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
-grub_background="background1024x768.png"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 80f93d49..043bd365 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -2,5 +2,4 @@ tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
-grub_background="background1024x768.png"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 80f93d49..043bd365 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -2,5 +2,4 @@ tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
-grub_background="background1024x768.png"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 80f93d49..043bd365 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -2,5 +2,4 @@ tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
-grub_background="background1024x768.png"
 grub_scan_disk="ahci"
diff --git a/config/grub/default/config/payload b/config/grub/default/config/payload
index a405ae25..313290ed 100644
--- a/config/grub/default/config/payload
+++ b/config/grub/default/config/payload
@@ -26,13 +26,14 @@ else
 	gfxpayload=keep
 	terminal_output --append gfxterm
 
-	if [ -f (cbfsdisk)/background.png ]; then
-		insmod png
-		background_image (cbfsdisk)/background.png
-	elif [ -f (cbfsdisk)/background.jpg ]; then
-		insmod jpeg
-		background_image (cbfsdisk)/background.jpg
-	fi
+	for dt in cbfsdisk memdisk; do
+		for it in png jpg; do
+			if [ -f (${dt})/background.${it} ]; then
+				insmod ${it}
+				background_image (${dt})/background.${it}
+			fi
+		done
+	done
 fi
 
 # Keep CTRL pressed to enable default serial terminal (COM1 or the like)
diff --git a/config/grub/nvme/config/payload b/config/grub/nvme/config/payload
index f81d5930..d7a3c57d 100644
--- a/config/grub/nvme/config/payload
+++ b/config/grub/nvme/config/payload
@@ -26,13 +26,14 @@ else
 	gfxpayload=keep
 	terminal_output --append gfxterm
 
-	if [ -f (cbfsdisk)/background.png ]; then
-		insmod png
-		background_image (cbfsdisk)/background.png
-	elif [ -f (cbfsdisk)/background.jpg ]; then
-		insmod jpeg
-		background_image (cbfsdisk)/background.jpg
-	fi
+	for dt in cbfsdisk memdisk; do
+		for it in png jpg; do
+			if [ -f (${dt})/background.${it} ]; then
+				insmod ${it}
+				background_image (${dt})/background.${it}
+			fi
+		done
+	done
 fi
 
 # Keep CTRL pressed to enable default serial terminal (COM1 or the like)
diff --git a/config/grub/xhci/config/payload b/config/grub/xhci/config/payload
index 0e16ecb6..cd5b49b3 100644
--- a/config/grub/xhci/config/payload
+++ b/config/grub/xhci/config/payload
@@ -27,13 +27,14 @@ else
 	gfxpayload=keep
 	terminal_output --append gfxterm
 
-	if [ -f (cbfsdisk)/background.png ]; then
-		insmod png
-		background_image (cbfsdisk)/background.png
-	elif [ -f (cbfsdisk)/background.jpg ]; then
-		insmod jpeg
-		background_image (cbfsdisk)/background.jpg
-	fi
+	for dt in cbfsdisk memdisk; do
+		for it in png jpg; do
+			if [ -f (${dt})/background.${it} ]; then
+				insmod ${it}
+				background_image (${dt})/background.${it}
+			fi
+		done
+	done
 fi
 
 # Keep CTRL pressed to enable default serial terminal (COM1 or the like)
diff --git a/script/roms b/script/roms
index 0e4b4b72..e2caacef 100755
--- a/script/roms
+++ b/script/roms
@@ -11,7 +11,6 @@ set -u -e
 . "include/lib.sh"
 
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
-grub_background="background1280x800.png"
 cfgsdir="config/coreboot"
 picosrc="src/pico-serprog"
 picosdk="src/pico-sdk"
@@ -107,7 +106,6 @@ list_serprog_boards()
 configure_target()
 {
 	eval "$(setvars "n" $pv) $(setvars "" $v)"
-	grub_background="background1280x800.png"
 	board="$1"
 
 	targetdir="$cfgsdir/$board"
@@ -261,13 +259,6 @@ build_grub_roms()
 	# we only need insert grub.elf once, for each coreboot config:
 	cbfs "$tmprom" "$grubelf" "$grub_cbfs"
 
-	# we only need insert background.png once, for each coreboot config:
-	if [ "$displaymode" = "vesafb" ] || \
-	    [ "$displaymode" = "corebootfb" ]; then
-		cbfs "$tmprom" "$grubdata/background/$grub_background" \
-		    background.png raw
-	fi
-
 	tmpcfg="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" > "$tmpcfg" || \
 	    $err "set grub_scan_disk, $grub_scan_disk, $tmpcfg"
diff --git a/script/trees b/script/trees
index a773f03c..8084dd54 100755
--- a/script/trees
+++ b/script/trees
@@ -286,7 +286,8 @@ mkpayload_grub()
 	    --fonts= --themes= --locales=  --modules="$grub_modules" \
 	    --install-modules="$grub_install_modules" \
 	    "/boot/grub/grub_default.cfg=${cdir}/.config" \
-	    "/boot/grub/grub.cfg=$grubdata/memdisk.cfg" || \
+	    "/boot/grub/grub.cfg=$grubdata/memdisk.cfg" \
+	    "/background.png=$grubdata/background/background1280x800.png" || \
 	    $err "$tree: cannot build grub.elf"
 }
 

From 331c4097ff05bb2b62a88a42d350221ec4e35ebc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 15 Jun 2024 23:00:12 +0100
Subject: [PATCH 0548/1549] trees: remove unnecessary check in copy_elf

we don't need to check whether this variable is set,
because checking an empty path will also cause the
same return in the next line.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 1 -
 1 file changed, 1 deletion(-)

diff --git a/script/trees b/script/trees
index 8084dd54..d9111eb6 100755
--- a/script/trees
+++ b/script/trees
@@ -293,7 +293,6 @@ mkpayload_grub()
 
 copy_elf()
 {
-	[ -n "$listfile" ] || return 0
 	[ -f "$listfile" ] || return 0
 
 	x_ mkdir -p "$dest_dir"

From 0812d532123b5a039b0bf674393f06eb17f72854 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 15 Jun 2024 23:01:45 +0100
Subject: [PATCH 0549/1549] trees: simplify copy_elf()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/script/trees b/script/trees
index d9111eb6..5f80c344 100755
--- a/script/trees
+++ b/script/trees
@@ -293,11 +293,7 @@ mkpayload_grub()
 
 copy_elf()
 {
-	[ -f "$listfile" ] || return 0
-
-	x_ mkdir -p "$dest_dir"
-
-	while read -r f; do
+	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do
 		[ -f "$cdir/$f" ] && x_ cp "$cdir/$f" "$dest_dir"
 	done < "$listfile"
 	x_ make clean -C "$cdir"

From 817004e151a1c8a70150011ba78bdbd390ecb776 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 15 Jun 2024 23:31:26 +0100
Subject: [PATCH 0550/1549] roms: don't use x_ to call build_grub_roms

build_grub_roms never returns a non-zero value

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/script/roms b/script/roms
index e2caacef..57657cad 100755
--- a/script/roms
+++ b/script/roms
@@ -213,7 +213,7 @@ build_roms()
 
 	[ "$payload_memtest" != "y" ] || cbfs "$cbrom" "$mt86bin" img/memtest
 	[ "$payload_seabios" = "y" ] && build_seabios_roms
-	[ "$payload_grub" != "y" ] || x_ build_grub_roms "$cbrom" "grub"
+	[ "$payload_grub" != "y" ] || build_grub_roms "$cbrom" "grub"
 	[ "$payload_uboot" = "y" ] || return 0
 	x_ cp "$_cbrom" "$cbrom"
 	build_uboot_roms
@@ -224,7 +224,7 @@ build_seabios_roms()
 	if [ "$payload_seabios_withgrub" = "y" ]; then
 		t="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 		x_ cp "$cbrom" "$t"
-		x_ build_grub_roms "$t" "seabios_withgrub"
+		build_grub_roms "$t" "seabios_withgrub"
 	else
 		t="$(mkSeabiosRom "$cbrom" "fallback/payload")" || \
 		    $err "build_seabios_roms: cannot build tmprom"

From 90017cdc563e67be32d35040682d23ed4c977d3f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 15 Jun 2024 23:38:19 +0100
Subject: [PATCH 0551/1549] roms: simplify seagrub check in configure_target

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/script/roms b/script/roms
index 57657cad..aeffacb8 100755
--- a/script/roms
+++ b/script/roms
@@ -124,9 +124,8 @@ configure_target()
 	[ "$payload_memtest" != "y" ] && payload_memtest="n"
 	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"
 
-	[ "$payload_grub_withseabios" = "y" ] && payload_grub="y"
-	[ "$payload_grub_withseabios" = "y" ] && \
-		eval "$(setvars "y" payload_seabios payload_seabios_withgrub)"
+	[ "$payload_grub_withseabios" = "y" ] && eval "$(setvars "y" \
+	    payload_grub payload_seabios payload_seabios_withgrub)"
 	[ "$payload_seabios_withgrub" = "y" ] && payload_seabios="y"
 	[ "$payload_seabios_grubonly" = "y" ] && payload_seabios="y"
 	[ "$payload_seabios_grubonly" = "y" ] && payload_seabios_withgrub="y"

From a9166898d29eae2a190687b96774178127411cfd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 15 Jun 2024 23:42:45 +0100
Subject: [PATCH 0552/1549] roms: simplify grubonly check in configure_target

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/script/roms b/script/roms
index aeffacb8..1f294a53 100755
--- a/script/roms
+++ b/script/roms
@@ -127,8 +127,8 @@ configure_target()
 	[ "$payload_grub_withseabios" = "y" ] && eval "$(setvars "y" \
 	    payload_grub payload_seabios payload_seabios_withgrub)"
 	[ "$payload_seabios_withgrub" = "y" ] && payload_seabios="y"
-	[ "$payload_seabios_grubonly" = "y" ] && payload_seabios="y"
-	[ "$payload_seabios_grubonly" = "y" ] && payload_seabios_withgrub="y"
+	[ "$payload_seabios_grubonly" = "y" ] && \
+		eval "$(setvars "y" payload_seabios payload_seabios_withgrub)"
 
 	# The reverse logic must not be applied. If SeaBIOS-with-GRUB works,
 	# that doesn't mean GRUB-with-SeaBIOS will, e.g. VGA ROM execution

From 0dfe3aed91d51e1eacd8ecc24d5e4167ff5fbca7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 15 Jun 2024 23:58:27 +0100
Subject: [PATCH 0553/1549] roms: simplified ubootelf check

we check it twice, which we don't need to do.

we only need to check it once!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 16 +++++-----------
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/script/roms b/script/roms
index 1f294a53..d274eb63 100755
--- a/script/roms
+++ b/script/roms
@@ -20,8 +20,8 @@ stm32src="src/stm32-vserprog"
 # target.cfg files have to specifically enable [a] payload(s)
 pv="payload_uboot payload_grub_withseabios payload_seabios payload_memtest t"
 pv="$pv payload_seabios_withgrub payload_seabios_grubonly payload_grub mt86bin"
-v="romdir cbrom initmode displaymode cbcfg targetdir tree release"
-v="$v grub_timeout ubdir board grub_scan_disk uboot_config grubtree grubelf"
+v="romdir cbrom initmode displaymode cbcfg targetdir tree release ubootelf"
+v="$v grub_timeout board grub_scan_disk uboot_config grubtree grubelf"
 eval "$(setvars "n" $pv)"
 eval "$(setvars "" $v boards targets serprog_boards_dir)"
 
@@ -170,9 +170,8 @@ build_uboot_payload()
 {
 	x_ ./update trees -b u-boot $board
 	ubdir="elf/u-boot/$board/$uboot_config"
-	ubootelf="$ubdir/u-boot.elf"
-	[ ! -f "$ubootelf" ] && [ -f "$ubdir/u-boot" ] && \
-		ubootelf="$ubdir/u-boot"
+	ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \
+	    ubootelf="$ubdir/u-boot"
 	[ -f "$ubootelf" ] || $err "$board: Can't find u-boot"; return 0
 }
 
@@ -318,15 +317,10 @@ mkUbootRom() {
 	_cbrom="$1"
 	_uboot_cbfs_path="$2"
 
-	_ubdir="elf/u-boot/$board/$uboot_config"
-	_ubootelf="$_ubdir/u-boot.elf"
-	[ -f "$_ubootelf" ] || _ubootelf="$_ubdir/u-boot"
-	[ -f "$_ubootelf" ] || $err "mkUbootRom: $board: cant find u-boot"
-
 	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 
 	x_ cp "$_cbrom" "$tmprom"
-	cbfs "$tmprom" "$_ubootelf" "$_uboot_cbfs_path"
+	cbfs "$tmprom" "$ubootelf" "$_uboot_cbfs_path"
 
 	printf "%s\n" "$tmprom"
 }

From 7bc9fcc34214c7235df865cbe035ea3f565ee01b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 16 Jun 2024 00:40:44 +0100
Subject: [PATCH 0554/1549] script/roms: fix serprog build commands

forgot to shift

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/roms b/script/roms
index d274eb63..09aa1cb1 100755
--- a/script/roms
+++ b/script/roms
@@ -29,7 +29,7 @@ main()
 {
 	while [ $# -gt 0 ]; do
 		[ "$1" = "list" ] && eval "x_ ls -1 config/coreboot; return 0"
-		[ "$1" = "serprog" ] && eval "shift 1; mkserprog $@; return 0"
+		[ "$1" = "serprog" ] && shift && eval "mkserprog $@; return 0"
 		[ "$1" = "all" ] && shift && continue
 		boards="$1 $boards"; shift 1
 	done

From 167e7447a5ffdf8937e444ea9bc8ec04bfb66427 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 16 Jun 2024 00:48:36 +0100
Subject: [PATCH 0555/1549] roms: simplify the serprog build functions

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 18 +++++++-----------
 1 file changed, 7 insertions(+), 11 deletions(-)

diff --git a/script/roms b/script/roms
index 09aa1cb1..ca88acc6 100755
--- a/script/roms
+++ b/script/roms
@@ -77,25 +77,21 @@ mkserprog()
 
 build_rp2040_rom()
 {
-	board="$1"
-	printf "Building pico-serprog for %s\n" "$board"
-	x_ cmake -DPICO_BOARD="$board" -DPICO_SDK_PATH="$picosdk" \
+	x_ cmake -DPICO_BOARD="$1" -DPICO_SDK_PATH="$picosdk" \
 	    -B "$picosrc/build" "$picosrc"
 	x_ cmake --build "$picosrc/build"
 	x_ mv "$picosrc/build/pico_serprog.uf2" \
-	   "bin/serprog_rp2040/serprog_$board.uf2"
-	printf "output to bin/serprog_rp2040/serprog_%s.uf2\n" "$board"
+	   "bin/serprog_rp2040/serprog_$1.uf2"
+	printf "output to bin/serprog_rp2040/serprog_%s.uf2\n" "$1"
 }
 
 build_stm32_rom()
 {
-	board="$1"
-	printf "Building stm32-vserprog for %s\n" "$board"
-	x_ make -C "$stm32src" libopencm3-just-make BOARD=$board
-	x_ make -C "$stm32src" BOARD=$board
+	x_ make -C "$stm32src" libopencm3-just-make BOARD=$1
+	x_ make -C "$stm32src" BOARD=$1
 	x_ mv "$stm32src/stm32-vserprog.hex" \
-	   "bin/serprog_stm32/serprog_$board.hex"
-	printf "output to bin/serprog_stm32/serprog_%s.hex\n" "$board"
+	   "bin/serprog_stm32/serprog_$1.hex"
+	printf "output to bin/serprog_stm32/serprog_%s.hex\n" "$1"
 }
 
 list_serprog_boards()

From 4b764d26fd1e5090bf03d3da41be42085e1752d5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 16 Jun 2024 00:53:21 +0100
Subject: [PATCH 0556/1549] roms: simplify mkserprog()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/script/roms b/script/roms
index ca88acc6..b7ab4308 100755
--- a/script/roms
+++ b/script/roms
@@ -60,13 +60,11 @@ mkserprog()
 	fi
 	x_ mkdir -p "bin/serprog_$1"
 
-	if [ $# -gt 1 ] && [ "$2" = "list" ]; then
-		list_serprog_boards "$serprog_boards_dir"
-		return 0
-	elif [ $# -gt 1 ]; then
-		build_${1}_rom "$2"
+	if [ $# -gt 1 ]; then
+		[ "$2" = "list" ] && serlist "$serprog_boards_dir" && return 0
+		[ "$2" = "list" ] || build_${1}_rom "$2"
 	else
-		list_serprog_boards "$serprog_boards_dir" | \
+		serlist "$serprog_boards_dir" | \
 			while read -r board; do
 				build_${1}_rom "$board"
 			done
@@ -94,7 +92,7 @@ build_stm32_rom()
 	printf "output to bin/serprog_stm32/serprog_%s.hex\n" "$1"
 }
 
-list_serprog_boards()
+serlist()
 {
 	basename -a -s .h "$1/"*.h || $err "$1: can't list boards"
 }

From 3a7b3660f9dd536512dc428c50dd9ed4fd2007ef Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 16 Jun 2024 01:05:28 +0100
Subject: [PATCH 0557/1549] roms: simplify seagrub check in build_grub_roms

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/script/roms b/script/roms
index b7ab4308..4a7492f4 100755
--- a/script/roms
+++ b/script/roms
@@ -21,7 +21,7 @@ stm32src="src/stm32-vserprog"
 pv="payload_uboot payload_grub_withseabios payload_seabios payload_memtest t"
 pv="$pv payload_seabios_withgrub payload_seabios_grubonly payload_grub mt86bin"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree release ubootelf"
-v="$v grub_timeout board grub_scan_disk uboot_config grubtree grubelf"
+v="$v grub_timeout board grub_scan_disk uboot_config grubtree grubelf tmpmv"
 eval "$(setvars "n" $pv)"
 eval "$(setvars "" $v boards targets serprog_boards_dir)"
 
@@ -237,16 +237,15 @@ build_grub_roms()
 	grub_cbfs="fallback/payload"
 	if [ "$payload1" = "grub" ] && [ "$payload_grub_withseabios" = "y" ]
 	then
-		_tmpmvrom="$(mkSeabiosRom "$tmprom" "seabios.elf")" || \
+		tmpmv="$(mkSeabiosRom "$tmprom" "seabios.elf")" || \
 		    $err "build_grub_roms 1 $board: can't build tmprom"
-		x_ mv "$_tmpmvrom" "$tmprom"
 	elif [ "$payload1" != "grub" ] && [ "$payload_seabios_withgrub" = "y" ]
 	then
 		grub_cbfs="img/grub2"
-		_tmpmvrom="$(mkSeabiosRom "$tmprom" fallback/payload)" || \
+		tmpmv="$(mkSeabiosRom "$tmprom" fallback/payload)" || \
 		    $err "build_grub_roms 2 $board: can't build tmprom"
-		x_ mv "$_tmpmvrom" "$tmprom"
 	fi
+	[ -n "$tmpmv" ] && [ -f "$tmpmv" ] && x_ mv "$tmpmv" "$tmprom"
 
 	# we only need insert grub.elf once, for each coreboot config:
 	cbfs "$tmprom" "$grubelf" "$grub_cbfs"

From 0e9b36c581e4471f6148023fdc5537b833a51a6c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 16 Jun 2024 01:08:08 +0100
Subject: [PATCH 0558/1549] roms: simplify timeout/scandisk insertion

we don't need to call mktemp everytime.
just use a staticly named file in tmpdir
and keep overwriting it.

these files are only small, and they get deleted
when the build system exits later on.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/script/roms b/script/roms
index 4a7492f4..fe666754 100755
--- a/script/roms
+++ b/script/roms
@@ -250,14 +250,13 @@ build_grub_roms()
 	# we only need insert grub.elf once, for each coreboot config:
 	cbfs "$tmprom" "$grubelf" "$grub_cbfs"
 
-	tmpcfg="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
+	tmpcfg="$tmpdir/tmpcfg"
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" > "$tmpcfg" || \
 	    $err "set grub_scan_disk, $grub_scan_disk, $tmpcfg"
 	cbfs "$tmprom" "$tmpcfg" scan.cfg raw
 	printf "set timeout=%s\n" "$grub_timeout" > "$tmpcfg" || \
 	    $err "set timeout, $grub_timeout, $tmpcfg"
 	[ -z "$grub_timeout" ] || cbfs "$tmprom" "$tmpcfg" timeout.cfg raw
-	x_ rm -f "$tmpcfg"
 
 	newrom="$romdir/${payload1}_${board}_${initmode}_$displaymode.rom"
 	[ "$initmode" = "normal" ] && newrom="$romdir/${payload1}_" \

From 6dc0515583c32cc6b43f0a50c150b88dbd683eb1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 16 Jun 2024 01:11:46 +0100
Subject: [PATCH 0559/1549] roms: further clean up build_grub_roms()

the tmpcfg variable will be useful elsewhere, for
the same kind of change as before.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/script/roms b/script/roms
index fe666754..ff5bec0c 100755
--- a/script/roms
+++ b/script/roms
@@ -15,6 +15,7 @@ cfgsdir="config/coreboot"
 picosrc="src/pico-serprog"
 picosdk="src/pico-sdk"
 stm32src="src/stm32-vserprog"
+tmpcfg="$tmpdir/tmpcfg"
 
 # Disable all payloads by default.
 # target.cfg files have to specifically enable [a] payload(s)
@@ -250,12 +251,11 @@ build_grub_roms()
 	# we only need insert grub.elf once, for each coreboot config:
 	cbfs "$tmprom" "$grubelf" "$grub_cbfs"
 
-	tmpcfg="$tmpdir/tmpcfg"
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" > "$tmpcfg" || \
 	    $err "set grub_scan_disk, $grub_scan_disk, $tmpcfg"
 	cbfs "$tmprom" "$tmpcfg" scan.cfg raw
-	printf "set timeout=%s\n" "$grub_timeout" > "$tmpcfg" || \
-	    $err "set timeout, $grub_timeout, $tmpcfg"
+
+	printf "set timeout=%s\n" "$grub_timeout" > "$tmpcfg" || $err "!time"
 	[ -z "$grub_timeout" ] || cbfs "$tmprom" "$tmpcfg" timeout.cfg raw
 
 	newrom="$romdir/${payload1}_${board}_${initmode}_$displaymode.rom"

From ef411c596a8062956c55ddaed0d193775d318fe9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 16 Jun 2024 12:38:47 +0100
Subject: [PATCH 0560/1549] build: remove unused variables

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/build b/build
index 834fd50b..d3e86519 100755
--- a/build
+++ b/build
@@ -19,9 +19,6 @@ fi
 eval "$(setvars "" vdir src_dirname srcdir _xm mode xp)"
 err="fail"
 
-linkpath="${0}"
-linkname="${linkpath##*/}"
-
 main()
 {
 	[ $# -lt 1 ] && badcmd

From d3e78864505af1834605234a3aa38d70c169d553 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 16 Jun 2024 12:42:57 +0100
Subject: [PATCH 0561/1549] roms: remove unnecessary check

uboot_config is later only used if payload_uboot is set

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/script/roms b/script/roms
index ff5bec0c..99f53e00 100755
--- a/script/roms
+++ b/script/roms
@@ -132,8 +132,7 @@ configure_target()
 
 	[ "$payload_uboot" != "n" ] && [ "$payload_uboot" != "y" ] && \
 		payload_uboot="n"
-	[ "$payload_uboot" = "y" ] && [ -z "$uboot_config" ] && \
-		uboot_config="default"
+	[ -n "$uboot_config" ] || uboot_config="default"
 
 	[ "$xbmk_release" = "y" ] && [ "$release" = "n" ] && return 1
 	[ "$board" = "$tree" ] && return 1; return 0

From 92aa83a23696cd5706770af78d49858ef2d0c28d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 16 Jun 2024 12:46:03 +0100
Subject: [PATCH 0562/1549] roms: simplify build_roms()

cbcfg is already a global variable, so there's no reason
to set it again at the start of this function.

remove the check for whether the given coreboot config
exists, to the calling function instead of build_roms().

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/script/roms b/script/roms
index 99f53e00..ea2f4b26 100755
--- a/script/roms
+++ b/script/roms
@@ -184,16 +184,13 @@ build_board()
 			    [ "$displaymode" != "txtmode" ] && continue
 			cbcfg="$targetdir/config/${initmode}_$displaymode"
 			[ "$initmode" = "normal" ] && cbcfg="${cbcfg%_*}"
-			build_roms "$cbcfg"; x_ rm -f "$cbrom"
+			e "$cbcfg" f not || build_roms; x_ rm -f "$cbrom"
 		done
 	done
 }
 
 build_roms()
 {
-	cbcfg="$1"
-	e "$cbcfg" f not && return 0
-
 	x_ ./update trees -b coreboot $board
 
 	_cbrom="elf/coreboot_nopayload_DO_NOT_FLASH"

From c8944f1ca893268cc82d5057b342c943d03aeb30 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 16 Jun 2024 12:51:47 +0100
Subject: [PATCH 0563/1549] roms: simplify mkUbootRom()

remove variables that are not meaningfully used

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 11 +++--------
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/script/roms b/script/roms
index ea2f4b26..fe14b22a 100755
--- a/script/roms
+++ b/script/roms
@@ -302,14 +302,9 @@ build_uboot_roms()
 
 # make a rom in /tmp/ and then print the path of that ROM
 mkUbootRom() {
-	_cbrom="$1"
-	_uboot_cbfs_path="$2"
-
-	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
-
-	x_ cp "$_cbrom" "$tmprom"
-	cbfs "$tmprom" "$ubootelf" "$_uboot_cbfs_path"
-
+	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)" # 1=cbrom, 2=cbfs path
+	x_ cp "$1" "$tmprom"
+	cbfs "$tmprom" "$ubootelf" "$2"
 	printf "%s\n" "$tmprom"
 }
 

From c3f0a109c3d1c5378bd55b2a7827d335fe0ad21d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 16 Jun 2024 12:54:07 +0100
Subject: [PATCH 0564/1549] roms: simplify mkSeabiosRom()

remove variables that are not meaningfully used

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/script/roms b/script/roms
index fe14b22a..c8c2ae64 100755
--- a/script/roms
+++ b/script/roms
@@ -272,14 +272,11 @@ build_grub_roms()
 
 # make a rom in /tmp/ and then print the path of that ROM
 mkSeabiosRom() {
-	_cbrom="$1" # rom to insert seabios in. will not be touched
-		# (a tmpfile will be made instead)
-	_seabios_cbfs_path="$2" # e.g. fallback/payload
+	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)" # 1=cbrom, 2=cbfs path
 	_seabioself="elf/seabios/default/$initmode/bios.bin.elf"
-	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 
-	x_ cp "$_cbrom" "$tmprom"
-	cbfs "$tmprom" "$_seabioself" "$_seabios_cbfs_path"
+	x_ cp "$1" "$tmprom"
+	cbfs "$tmprom" "$_seabioself" "$2"
 	x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
 
 	z="2"; [ "$initmode" = "vgarom" ] && z="0"

From 8b58c1eac6cad89b202527e0486a12680a6ba520 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 16 Jun 2024 17:42:34 +0100
Subject: [PATCH 0565/1549] roms: merge mkUbootRom() into build_uboot_roms()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 13 +++----------
 1 file changed, 3 insertions(+), 10 deletions(-)

diff --git a/script/roms b/script/roms
index c8c2ae64..815eeb99 100755
--- a/script/roms
+++ b/script/roms
@@ -290,21 +290,14 @@ mkSeabiosRom() {
 
 build_uboot_roms()
 {
-	tmprom="$(mkUbootRom "$cbrom" "fallback/payload")" || \
-	    $err "build_uboot_roms $board: could not create tmprom"
+	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 	newrom="$romdir/uboot_payload_${board}_${initmode}_$displaymode.rom"
+	x_ cp "$cbrom" "$tmprom"
+	cbfs "$tmprom" "$ubootelf" "fallback/payload"
 	x_ cprom "$tmprom" "$newrom"
 	x_ rm -f "$tmprom"
 }
 
-# make a rom in /tmp/ and then print the path of that ROM
-mkUbootRom() {
-	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)" # 1=cbrom, 2=cbfs path
-	x_ cp "$1" "$tmprom"
-	cbfs "$tmprom" "$ubootelf" "$2"
-	printf "%s\n" "$tmprom"
-}
-
 cprom()
 {
 	printf "Creating target image: %s\n" "$2"

From e67628c6a5e7a6ac23b4c519a753ead61beae116 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 16 Jun 2024 17:46:58 +0100
Subject: [PATCH 0566/1549] unify coreboot elfdir (DO_NOT_FLASH)

use a common string when setting this path

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 1 +
 script/roms    | 3 +--
 script/trees   | 3 +--
 3 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index bf734f3a..9f722313 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -10,6 +10,7 @@ _ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
 
 tmpdir_was_set="y"
 cbdir="src/coreboot/default"
+cbelfdir="elf/coreboot_nopayload_DO_NOT_FLASH"
 ifdtool="elf/ifdtool/default/ifdtool"
 cbfstool="elf/cbfstool/default/cbfstool"
 tmpgit="$PWD/tmp/gitclone"
diff --git a/script/roms b/script/roms
index 815eeb99..d0f95524 100755
--- a/script/roms
+++ b/script/roms
@@ -193,8 +193,7 @@ build_roms()
 {
 	x_ ./update trees -b coreboot $board
 
-	_cbrom="elf/coreboot_nopayload_DO_NOT_FLASH"
-	_cbrom="$_cbrom/$board/${initmode}_$displaymode"
+	_cbrom="$cbelfdir/$board/${initmode}_$displaymode"
 	[ "$initmode" = "normal" ] && _cbrom="${_cbrom%"_$displaymode"}"
 	_cbrom="$_cbrom/coreboot.rom"
 	cbrom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
diff --git a/script/trees b/script/trees
index 5f80c344..13f6d652 100755
--- a/script/trees
+++ b/script/trees
@@ -78,8 +78,7 @@ build_projects()
 
 build_targets()
 {
-	[ "$elfdir" = "elf/coreboot" ] && \
-		elfdir="elf/coreboot_nopayload_DO_NOT_FLASH"
+	[ "$elfdir" = "elf/coreboot" ] && elfdir="$cbelfdir"
 
 	[ -d "$cfgsdir" ] || $err "directory, $cfgsdir, does not exist"
 	[ -f "$listfile" ] || $err "list file, $listfile, does not exist"

From 12b26f207fe343ffe7077398abc75f09b83c7506 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 16 Jun 2024 17:49:44 +0100
Subject: [PATCH 0567/1549] roms cproms(): allow other commands besides cp

e.g. the operator might specify mv instead

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/script/roms b/script/roms
index d0f95524..fd294e06 100755
--- a/script/roms
+++ b/script/roms
@@ -219,7 +219,7 @@ build_seabios_roms()
 		newrom="$romdir/seabios_${board}_${initmode}_$displaymode"
 		[ "$initmode" = "normal" ] && newrom="$romdir/seabios" \
 			&& newrom="${newrom}_${board}_$initmode"
-		x_ cprom "$t" "$newrom.rom"
+		x_ cprom cp "$t" "$newrom.rom"
 	fi
 	x_ rm -f "$t"
 }
@@ -256,15 +256,15 @@ build_grub_roms()
 	newrom="$romdir/${payload1}_${board}_${initmode}_$displaymode.rom"
 	[ "$initmode" = "normal" ] && newrom="$romdir/${payload1}_" \
 	    && newrom="$newrom${board}_$initmode.rom"
-	x_ cprom "$tmprom" "$newrom"
+	x_ cprom cp "$tmprom" "$newrom"
 	if [ "$payload_seabios_withgrub" = "y" ] && \
 	    [ "$payload1" != "grub" ]; then
 		cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
-		x_ cprom "$tmprom" "${newrom%.rom}_grubfirst.rom"
+		x_ cprom cp "$tmprom" "${newrom%.rom}_grubfirst.rom"
 		if [ "$payload_seabios_grubonly" = "y" ]; then
 			x_ "$cbfstool" "$tmprom" add-int -i 0 \
 			    -n etc/show-boot-menu
-			x_ cprom "$tmprom" "${newrom%.rom}_grubonly.rom"
+			x_ cprom cp "$tmprom" "${newrom%.rom}_grubonly.rom"
 		fi
 	fi
 }
@@ -293,18 +293,18 @@ build_uboot_roms()
 	newrom="$romdir/uboot_payload_${board}_${initmode}_$displaymode.rom"
 	x_ cp "$cbrom" "$tmprom"
 	cbfs "$tmprom" "$ubootelf" "fallback/payload"
-	x_ cprom "$tmprom" "$newrom"
+	x_ cprom cp "$tmprom" "$newrom"
 	x_ rm -f "$tmprom"
 }
 
 cprom()
 {
-	printf "Creating target image: %s\n" "$2"
+	printf "Creating target image: %s\n" "$3"
 
-	x_ mkdir -p "${2%/*}"
-	x_ cp "$1" "$2"
-	[ "$xbmk_release" = "y" ] && mksha512sum "$2" "vendorhashes" && \
-	    x_ ./vendor inject -r "$2" -b "$board" -n nuke; return 0
+	x_ mkdir -p "${3%/*}"
+	x_ $1 "$2" "$3"
+	[ "$xbmk_release" = "y" ] && mksha512sum "$3" "vendorhashes" && \
+	    x_ ./vendor inject -r "$3" -b "$board" -n nuke; return 0
 }
 
 main $@

From bc853fbb89a55257632ea287f4d8d3b9a114c608 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 16 Jun 2024 17:50:42 +0100
Subject: [PATCH 0568/1549] roms build_uboot_roms(): move rom, don't copy

that way, we don't have to delete the temporary file.
just move it entirely.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/script/roms b/script/roms
index fd294e06..6c998067 100755
--- a/script/roms
+++ b/script/roms
@@ -293,8 +293,7 @@ build_uboot_roms()
 	newrom="$romdir/uboot_payload_${board}_${initmode}_$displaymode.rom"
 	x_ cp "$cbrom" "$tmprom"
 	cbfs "$tmprom" "$ubootelf" "fallback/payload"
-	x_ cprom cp "$tmprom" "$newrom"
-	x_ rm -f "$tmprom"
+	x_ cprom mv "$tmprom" "$newrom"
 }
 
 cprom()

From 58a451865b199261efcceb7db319a8c6f714301a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 16 Jun 2024 17:56:41 +0100
Subject: [PATCH 0569/1549] roms: don't use x_ to call cproms()

cproms() never returns non-zero, so it doesn't make
sense to use x_ here

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/script/roms b/script/roms
index 6c998067..e002c40f 100755
--- a/script/roms
+++ b/script/roms
@@ -219,7 +219,7 @@ build_seabios_roms()
 		newrom="$romdir/seabios_${board}_${initmode}_$displaymode"
 		[ "$initmode" = "normal" ] && newrom="$romdir/seabios" \
 			&& newrom="${newrom}_${board}_$initmode"
-		x_ cprom cp "$t" "$newrom.rom"
+		cprom cp "$t" "$newrom.rom"
 	fi
 	x_ rm -f "$t"
 }
@@ -256,15 +256,15 @@ build_grub_roms()
 	newrom="$romdir/${payload1}_${board}_${initmode}_$displaymode.rom"
 	[ "$initmode" = "normal" ] && newrom="$romdir/${payload1}_" \
 	    && newrom="$newrom${board}_$initmode.rom"
-	x_ cprom cp "$tmprom" "$newrom"
+	cprom cp "$tmprom" "$newrom"
 	if [ "$payload_seabios_withgrub" = "y" ] && \
 	    [ "$payload1" != "grub" ]; then
 		cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
-		x_ cprom cp "$tmprom" "${newrom%.rom}_grubfirst.rom"
+		cprom cp "$tmprom" "${newrom%.rom}_grubfirst.rom"
 		if [ "$payload_seabios_grubonly" = "y" ]; then
 			x_ "$cbfstool" "$tmprom" add-int -i 0 \
 			    -n etc/show-boot-menu
-			x_ cprom cp "$tmprom" "${newrom%.rom}_grubonly.rom"
+			cprom cp "$tmprom" "${newrom%.rom}_grubonly.rom"
 		fi
 	fi
 }
@@ -293,7 +293,7 @@ build_uboot_roms()
 	newrom="$romdir/uboot_payload_${board}_${initmode}_$displaymode.rom"
 	x_ cp "$cbrom" "$tmprom"
 	cbfs "$tmprom" "$ubootelf" "fallback/payload"
-	x_ cprom mv "$tmprom" "$newrom"
+	cprom mv "$tmprom" "$newrom"
 }
 
 cprom()

From f928ac5c702c4ed4afc638ca8bdd8bd1d1d4a685 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 17 Jun 2024 01:05:28 +0100
Subject: [PATCH 0570/1549] roms: rename x variable to it in for loop

there are two for loops that use x as a variable anme,
and an idiosyncrasy of certain sh implementations is
that these become global;

the result in this case was that when you finish building
every target in "./build roms", it would print "libgfxinit"
repeatedly, comma separated, instead of a comma-separated
list of the targets that were built.

work around it by renaming the variable in one of the loops.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/script/roms b/script/roms
index e002c40f..3412b150 100755
--- a/script/roms
+++ b/script/roms
@@ -173,8 +173,8 @@ build_board()
 {
 	x_ rm -Rf "$romdir"
 
-	for x in "normal" "vgarom" "libgfxinit"; do
-		initmode="$x"
+	for it in "normal" "vgarom" "libgfxinit"; do
+		initmode="$it"
 		hmode="vesafb"
 		[ "$initmode" = "vgarom" ] || hmode="corebootfb"
 		modes="$hmode txtmode"

From f7e28964acdce46e9b9e4afeece5b228b7163a3c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 17 Jun 2024 15:30:40 +0100
Subject: [PATCH 0571/1549] roms: remind the user about gkb files

nowadays, we don't insert GRUB keymaps automatically, for
sake of efficiency; without one, the default is US QWERTY.

a user will only want one keymap in particular, so this
is more efficient. in practise, they're either building
from source anyway, or using the inject scripts which
compile cbfstool anyway, so the user will already have
cbfstool.

also output this message from the inject script.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh    | 2 ++
 include/vendor.sh | 3 ++-
 script/roms       | 5 +++--
 3 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 9f722313..5952b202 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -7,6 +7,8 @@ export LC_COLLATE=C
 export LC_ALL=C
 
 _ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
+kbnotice="Insert a .gkb file from config/data/grub/keymap/ as keymap.gkb \
+if you want a custom keymap in GRUB; use cbfstool from elf/cbfstool."
 
 tmpdir_was_set="y"
 cbdir="src/coreboot/default"
diff --git a/include/vendor.sh b/include/vendor.sh
index b5fda8f3..54dac191 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -261,7 +261,8 @@ vendor_inject()
 	inject_vendorfiles
 	[ "$nukemode" = "nuke" ] && return 0
 	printf "Friendly reminder (this is *not* an error message):\n"
-	printf "Please ensure that the files were inserted correctly.\n"
+	printf "Please ensure that the files were inserted correctly. ALSO:\n"
+	printf "%s\n" "$kbnotice"
 }
 
 check_board()
diff --git a/script/roms b/script/roms
index 3412b150..3791535e 100755
--- a/script/roms
+++ b/script/roms
@@ -43,9 +43,10 @@ main()
 		    && targets="$targets, $x"; continue
 	done
 
-	[ -z "$targets" ] && $err "No ROM images were compiled"
+#	[ -z "$targets" ] && $err "No ROM images were compiled"
 	printf "Check these ROM directories in bin/: %s\n" "${targets#, }"
-	printf "DO NOT flash images from elf/ - please use bin/ instead.\n"
+	printf "DO NOT flash images from elf/ - use bin/ instead. ALSO:\n"
+	printf "%s\n" "$kbnotice"
 }
 
 mkserprog()

From 1881d34dbcc9c1c703387e25609651058238a832 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 18 Jun 2024 01:20:40 +0100
Subject: [PATCH 0572/1549] roms: merge serprog build into one function

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 35 +++++++++++++++++------------------
 1 file changed, 17 insertions(+), 18 deletions(-)

diff --git a/script/roms b/script/roms
index 3791535e..8fb2981e 100755
--- a/script/roms
+++ b/script/roms
@@ -64,34 +64,33 @@ mkserprog()
 
 	if [ $# -gt 1 ]; then
 		[ "$2" = "list" ] && serlist "$serprog_boards_dir" && return 0
-		[ "$2" = "list" ] || build_${1}_rom "$2"
+		[ "$2" = "list" ] || mkserprogfw "$1" "$2"
 	else
 		serlist "$serprog_boards_dir" | \
 			while read -r board; do
-				build_${1}_rom "$board"
+				mkserprogfw "$1" "$board" 
 			done
 	fi
 
 	[ "$xbmk_release" = "y" ] && mkrom_tarball "bin/serprog_$1"; return 0
 }
 
-build_rp2040_rom()
+mkserprogfw()
 {
-	x_ cmake -DPICO_BOARD="$1" -DPICO_SDK_PATH="$picosdk" \
-	    -B "$picosrc/build" "$picosrc"
-	x_ cmake --build "$picosrc/build"
-	x_ mv "$picosrc/build/pico_serprog.uf2" \
-	   "bin/serprog_rp2040/serprog_$1.uf2"
-	printf "output to bin/serprog_rp2040/serprog_%s.uf2\n" "$1"
-}
-
-build_stm32_rom()
-{
-	x_ make -C "$stm32src" libopencm3-just-make BOARD=$1
-	x_ make -C "$stm32src" BOARD=$1
-	x_ mv "$stm32src/stm32-vserprog.hex" \
-	   "bin/serprog_stm32/serprog_$1.hex"
-	printf "output to bin/serprog_stm32/serprog_%s.hex\n" "$1"
+	if [ "$1" = "rp2040" ]; then
+		x_ cmake -DPICO_BOARD="$2" -DPICO_SDK_PATH="$picosdk" \
+		    -B "$picosrc/build" "$picosrc"
+		x_ cmake --build "$picosrc/build"
+		x_ mv "$picosrc/build/pico_serprog.uf2" \
+		   "bin/serprog_rp2040/serprog_$2.uf2"
+		printf "output to bin/serprog_rp2040/serprog_%s.uf2\n" "$2"
+	else
+		x_ make -C "$stm32src" libopencm3-just-make BOARD=$2
+		x_ make -C "$stm32src" BOARD=$2
+		x_ mv "$stm32src/stm32-vserprog.hex" \
+		   "bin/serprog_stm32/serprog_$2.hex"
+		printf "output to bin/serprog_stm32/serprog_%s.hex\n" "$2"
+	fi
 }
 
 serlist()

From 1a4f97ffd1b1c5fd5e98d108faf27b50d44549d7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 18 Jun 2024 01:21:20 +0100
Subject: [PATCH 0573/1549] roms: remove useless confirmation in mkserprogfw

the user knows where to look. replace it with a single
declaration.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/script/roms b/script/roms
index 8fb2981e..df828382 100755
--- a/script/roms
+++ b/script/roms
@@ -83,14 +83,13 @@ mkserprogfw()
 		x_ cmake --build "$picosrc/build"
 		x_ mv "$picosrc/build/pico_serprog.uf2" \
 		   "bin/serprog_rp2040/serprog_$2.uf2"
-		printf "output to bin/serprog_rp2040/serprog_%s.uf2\n" "$2"
 	else
 		x_ make -C "$stm32src" libopencm3-just-make BOARD=$2
 		x_ make -C "$stm32src" BOARD=$2
 		x_ mv "$stm32src/stm32-vserprog.hex" \
 		   "bin/serprog_stm32/serprog_$2.hex"
-		printf "output to bin/serprog_stm32/serprog_%s.hex\n" "$2"
 	fi
+	printf "Look in bin/serprog_%s/ for images\n" "$1"
 }
 
 serlist()

From ea9bdfce4b5cf1ffdd60963b0f6cd4c9f02b5def Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 18 Jun 2024 01:44:25 +0100
Subject: [PATCH 0574/1549] roms: rename picosrc variable to rp2040src

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/script/roms b/script/roms
index df828382..61f87bb1 100755
--- a/script/roms
+++ b/script/roms
@@ -12,7 +12,7 @@ set -u -e
 
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 cfgsdir="config/coreboot"
-picosrc="src/pico-serprog"
+rp2040src="src/pico-serprog"
 picosdk="src/pico-sdk"
 stm32src="src/stm32-vserprog"
 tmpcfg="$tmpdir/tmpcfg"
@@ -55,7 +55,7 @@ mkserprog()
 	[ "$1" != "rp2040" ] && [ "$1" != "stm32" ] && $err "bad command"
 	if [ "$1" = "rp2040" ]; then
 		serprog_boards_dir="$picosdk/src/boards/include/boards"
-		[ -d "$picosrc" ] || x_ ./update trees -f "pico-serprog"
+		[ -d "$rp2040src" ] || x_ ./update trees -f "pico-serprog"
 	elif [ "$1" = "stm32" ]; then
 		serprog_boards_dir="$stm32src/boards"
 		[ -d "$stm32src" ] || x_ ./update trees -f "stm32-vserprog"
@@ -79,9 +79,9 @@ mkserprogfw()
 {
 	if [ "$1" = "rp2040" ]; then
 		x_ cmake -DPICO_BOARD="$2" -DPICO_SDK_PATH="$picosdk" \
-		    -B "$picosrc/build" "$picosrc"
-		x_ cmake --build "$picosrc/build"
-		x_ mv "$picosrc/build/pico_serprog.uf2" \
+		    -B "$rp2040src/build" "$rp2040src"
+		x_ cmake --build "$rp2040src/build"
+		x_ mv "$rp2040src/build/pico_serprog.uf2" \
 		   "bin/serprog_rp2040/serprog_$2.uf2"
 	else
 		x_ make -C "$stm32src" libopencm3-just-make BOARD=$2

From ea5b5b0720c520c632650c908c5ca6460b338d6b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 18 Jun 2024 01:50:40 +0100
Subject: [PATCH 0575/1549] roms: simplified serprog image copy

use eval to avoid having two mv commands

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/script/roms b/script/roms
index 61f87bb1..50fda2d0 100755
--- a/script/roms
+++ b/script/roms
@@ -13,8 +13,10 @@ set -u -e
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 cfgsdir="config/coreboot"
 rp2040src="src/pico-serprog"
+rp2040x="$rp2040src/build/pico_serprog.uf2"
 picosdk="src/pico-sdk"
 stm32src="src/stm32-vserprog"
+stm32x="$stm32src/stm32-vserprog.hex"
 tmpcfg="$tmpdir/tmpcfg"
 
 # Disable all payloads by default.
@@ -81,14 +83,11 @@ mkserprogfw()
 		x_ cmake -DPICO_BOARD="$2" -DPICO_SDK_PATH="$picosdk" \
 		    -B "$rp2040src/build" "$rp2040src"
 		x_ cmake --build "$rp2040src/build"
-		x_ mv "$rp2040src/build/pico_serprog.uf2" \
-		   "bin/serprog_rp2040/serprog_$2.uf2"
 	else
 		x_ make -C "$stm32src" libopencm3-just-make BOARD=$2
 		x_ make -C "$stm32src" BOARD=$2
-		x_ mv "$stm32src/stm32-vserprog.hex" \
-		   "bin/serprog_stm32/serprog_$2.hex"
 	fi
+	eval "x_ mv \"\$${1}x\" \"bin/serprog_$1/serprog_$2.\${${1}x##*.}\""
 	printf "Look in bin/serprog_%s/ for images\n" "$1"
 }
 

From 6df17860e2ee756985a818cf751efea0ba955bb9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 18 Jun 2024 02:00:47 +0100
Subject: [PATCH 0576/1549] roms: shorten variable serprog_boards_dir

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/script/roms b/script/roms
index 50fda2d0..0d3a563b 100755
--- a/script/roms
+++ b/script/roms
@@ -26,7 +26,7 @@ pv="$pv payload_seabios_withgrub payload_seabios_grubonly payload_grub mt86bin"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree release ubootelf"
 v="$v grub_timeout board grub_scan_disk uboot_config grubtree grubelf tmpmv"
 eval "$(setvars "n" $pv)"
-eval "$(setvars "" $v boards targets serprog_boards_dir)"
+eval "$(setvars "" $v boards targets serprogdir)"
 
 main()
 {
@@ -56,19 +56,19 @@ mkserprog()
 	[ -z "${1+x}" ] && badcmd
 	[ "$1" != "rp2040" ] && [ "$1" != "stm32" ] && $err "bad command"
 	if [ "$1" = "rp2040" ]; then
-		serprog_boards_dir="$picosdk/src/boards/include/boards"
+		serprogdir="$picosdk/src/boards/include/boards"
 		[ -d "$rp2040src" ] || x_ ./update trees -f "pico-serprog"
 	elif [ "$1" = "stm32" ]; then
-		serprog_boards_dir="$stm32src/boards"
+		serprogdir="$stm32src/boards"
 		[ -d "$stm32src" ] || x_ ./update trees -f "stm32-vserprog"
 	fi
 	x_ mkdir -p "bin/serprog_$1"
 
 	if [ $# -gt 1 ]; then
-		[ "$2" = "list" ] && serlist "$serprog_boards_dir" && return 0
+		[ "$2" = "list" ] && serlist "$serprogdir" && return 0
 		[ "$2" = "list" ] || mkserprogfw "$1" "$2"
 	else
-		serlist "$serprog_boards_dir" | \
+		serlist "$serprogdir" | \
 			while read -r board; do
 				mkserprogfw "$1" "$board" 
 			done

From b61dd4c258063d0849be10857480d1eeb2191d16 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 18 Jun 2024 02:09:26 +0100
Subject: [PATCH 0577/1549] roms: simplify the loop for building serprog roms

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 18 ++++++++----------
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/script/roms b/script/roms
index 0d3a563b..ca38f04d 100755
--- a/script/roms
+++ b/script/roms
@@ -26,7 +26,7 @@ pv="$pv payload_seabios_withgrub payload_seabios_grubonly payload_grub mt86bin"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree release ubootelf"
 v="$v grub_timeout board grub_scan_disk uboot_config grubtree grubelf tmpmv"
 eval "$(setvars "n" $pv)"
-eval "$(setvars "" $v boards targets serprogdir)"
+eval "$(setvars "" $v boards targets serprogdir ser)"
 
 main()
 {
@@ -64,15 +64,13 @@ mkserprog()
 	fi
 	x_ mkdir -p "bin/serprog_$1"
 
-	if [ $# -gt 1 ]; then
-		[ "$2" = "list" ] && serlist "$serprogdir" && return 0
-		[ "$2" = "list" ] || mkserprogfw "$1" "$2"
-	else
-		serlist "$serprogdir" | \
-			while read -r board; do
-				mkserprogfw "$1" "$board" 
-			done
-	fi
+	[ $# -gt 1 ] && [ "$2" = "list" ] && serlist "$serprogdir" && return 0
+	ser="$1" && shift
+
+	targets="$@" && [ -z "$targets" ] && targets="$(serlist "$serprogdir")"
+	for board in $targets; do
+		mkserprogfw "$ser" "$board"
+	done
 
 	[ "$xbmk_release" = "y" ] && mkrom_tarball "bin/serprog_$1"; return 0
 }

From 28682b1a4bde9d0dc3fcea51efa3e70aa62b7f30 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 18 Jun 2024 02:15:25 +0100
Subject: [PATCH 0578/1549] roms: simplify the check for serprog srcdir

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/script/roms b/script/roms
index ca38f04d..ab247ea1 100755
--- a/script/roms
+++ b/script/roms
@@ -55,13 +55,9 @@ mkserprog()
 {
 	[ -z "${1+x}" ] && badcmd
 	[ "$1" != "rp2040" ] && [ "$1" != "stm32" ] && $err "bad command"
-	if [ "$1" = "rp2040" ]; then
-		serprogdir="$picosdk/src/boards/include/boards"
-		[ -d "$rp2040src" ] || x_ ./update trees -f "pico-serprog"
-	elif [ "$1" = "stm32" ]; then
-		serprogdir="$stm32src/boards"
-		[ -d "$stm32src" ] || x_ ./update trees -f "stm32-vserprog"
-	fi
+	[ "$1" = "rp2040" ] && serprogdir="$picosdk/src/boards/include/boards"
+	[ "$1" = "stm32" ] && serprogdir="$stm32src/boards"
+	eval "[ -d \"\$${1}src\" ] || x_ ./update trees -f \"\${${1}src##*/}\""
 	x_ mkdir -p "bin/serprog_$1"
 
 	[ $# -gt 1 ] && [ "$2" = "list" ] && serlist "$serprogdir" && return 0

From a96c4b59fd8cf4d19b78d839c5950f32ffd2c1ff Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 18 Jun 2024 23:49:28 +0100
Subject: [PATCH 0579/1549] roms: simplify payload_uboot y/n check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/script/roms b/script/roms
index ab247ea1..fc63712f 100755
--- a/script/roms
+++ b/script/roms
@@ -122,8 +122,7 @@ configure_target()
 	[ "$payload_grub" != "y" ] && [ "$payload_seabios" != "y" ] && \
 	    [ "$payload_uboot" != "y" ] && $err "'$board' defines no payload"
 
-	[ "$payload_uboot" != "n" ] && [ "$payload_uboot" != "y" ] && \
-		payload_uboot="n"
+	[ "$payload_uboot" = "y" ] || payload_uboot="n"
 	[ -n "$uboot_config" ] || uboot_config="default"
 
 	[ "$xbmk_release" = "y" ] && [ "$release" = "n" ] && return 1

From 920e5ba2d93942e953625ebe97cfd67ae7ef9601 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 18 Jun 2024 23:56:39 +0100
Subject: [PATCH 0580/1549] roms: merge build_uboot_payload to build_payloads

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/script/roms b/script/roms
index fc63712f..4f571aa1 100755
--- a/script/roms
+++ b/script/roms
@@ -148,11 +148,8 @@ build_payloads()
 	    || [ "$payload_seabios_grubonly" = "y" ]; then
 		[ -f "$grubelf" ] || x_ ./update trees -b grub $grubtree
 	fi
-	[ "$payload_uboot" = "y" ] && build_uboot_payload; return 0
-}
+	[ "$payload_uboot" = "y" ] || return 0
 
-build_uboot_payload()
-{
 	x_ ./update trees -b u-boot $board
 	ubdir="elf/u-boot/$board/$uboot_config"
 	ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \

From 2d6946775e88f9e804be0b8eb2f8827d07511218 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 19 Jun 2024 00:03:16 +0100
Subject: [PATCH 0581/1549] roms: remove mt86bin variable

it's only meaningfully used once, so just hardcode
the string, which is not set dynamically anyway.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/script/roms b/script/roms
index 4f571aa1..969407c0 100755
--- a/script/roms
+++ b/script/roms
@@ -22,7 +22,7 @@ tmpcfg="$tmpdir/tmpcfg"
 # Disable all payloads by default.
 # target.cfg files have to specifically enable [a] payload(s)
 pv="payload_uboot payload_grub_withseabios payload_seabios payload_memtest t"
-pv="$pv payload_seabios_withgrub payload_seabios_grubonly payload_grub mt86bin"
+pv="$pv payload_seabios_withgrub payload_seabios_grubonly payload_grub"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree release ubootelf"
 v="$v grub_timeout board grub_scan_disk uboot_config grubtree grubelf tmpmv"
 eval "$(setvars "n" $pv)"
@@ -139,9 +139,7 @@ build_payloads()
 
 	[ -f "$cbfstool" ] || x_ ./update trees -b coreboot utils $tree
 
-	mt86bin="elf/memtest86plus/memtest.bin"
-	[ "$payload_memtest" != "y" ] || [ -f "$mt86bin" ] || \
-		x_ ./update trees -b memtest86plus
+	[ "$payload_memtest" = "y" ] && x_ ./update trees -b memtest86plus
 
 	[ "$payload_seabios" = "y" ] && x_ ./update trees -b seabios
 	if [ "$payload_grub" = "y" ] || [ "$payload_seabios_withgrub" = "y" ] \
@@ -187,7 +185,8 @@ build_roms()
 	cbrom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 	x_ cp "$_cbrom" "$cbrom"
 
-	[ "$payload_memtest" != "y" ] || cbfs "$cbrom" "$mt86bin" img/memtest
+	[ "$payload_memtest" != "y" ] || cbfs "$cbrom"
+	    "elf/memtest86plus/memtest.bin" img/memtest
 	[ "$payload_seabios" = "y" ] && build_seabios_roms
 	[ "$payload_grub" != "y" ] || build_grub_roms "$cbrom" "grub"
 	[ "$payload_uboot" = "y" ] || return 0

From 29a7123c0c5bbc6c8ecab4e58950040df7f1ccc4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 19 Jun 2024 00:06:36 +0100
Subject: [PATCH 0582/1549] roms: group some commands that are similar

this makes the build_payloads() function nicer to read

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/script/roms b/script/roms
index 969407c0..4cf36e38 100755
--- a/script/roms
+++ b/script/roms
@@ -138,16 +138,15 @@ build_payloads()
 	cbrom="$cbdir/build/coreboot.rom"
 
 	[ -f "$cbfstool" ] || x_ ./update trees -b coreboot utils $tree
-
 	[ "$payload_memtest" = "y" ] && x_ ./update trees -b memtest86plus
-
 	[ "$payload_seabios" = "y" ] && x_ ./update trees -b seabios
+
 	if [ "$payload_grub" = "y" ] || [ "$payload_seabios_withgrub" = "y" ] \
 	    || [ "$payload_seabios_grubonly" = "y" ]; then
 		[ -f "$grubelf" ] || x_ ./update trees -b grub $grubtree
 	fi
-	[ "$payload_uboot" = "y" ] || return 0
 
+	[ "$payload_uboot" = "y" ] || return 0
 	x_ ./update trees -b u-boot $board
 	ubdir="elf/u-boot/$board/$uboot_config"
 	ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \

From 3610667e3db08ff1db4f7784ff5a879d8aebce9d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 19 Jun 2024 00:39:15 +0100
Subject: [PATCH 0583/1549] roms: remove build_payloads() and split it up

payloads are compiled before coreboot, but it doesn't matter
to the build speed whether this is done first.

reduce the lines of code by checking payload builds *while*
adding them to the coreboot images. this means that coreboot
is now compiled first, before the payloads.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 37 +++++++++++++++----------------------
 1 file changed, 15 insertions(+), 22 deletions(-)

diff --git a/script/roms b/script/roms
index 4cf36e38..865c4909 100755
--- a/script/roms
+++ b/script/roms
@@ -41,7 +41,7 @@ main()
 		$err "Cannot generate list of boards for building"
 	for x in $boards; do
 		[ -d "config/coreboot/$x/config" ] && configure_target "$x" \
-		    && build_payloads && build_board && [ -d "bin/$board" ] \
+		    && build_board && [ -d "bin/$board" ] \
 		    && targets="$targets, $x"; continue
 	done
 
@@ -125,12 +125,6 @@ configure_target()
 	[ "$payload_uboot" = "y" ] || payload_uboot="n"
 	[ -n "$uboot_config" ] || uboot_config="default"
 
-	[ "$xbmk_release" = "y" ] && [ "$release" = "n" ] && return 1
-	[ "$board" = "$tree" ] && return 1; return 0
-}
-
-build_payloads()
-{
 	romdir="bin/$board"
 	cbdir="src/coreboot/$board"
 	[ "$board" = "$tree" ] || cbdir="src/coreboot/$tree"
@@ -138,20 +132,9 @@ build_payloads()
 	cbrom="$cbdir/build/coreboot.rom"
 
 	[ -f "$cbfstool" ] || x_ ./update trees -b coreboot utils $tree
-	[ "$payload_memtest" = "y" ] && x_ ./update trees -b memtest86plus
-	[ "$payload_seabios" = "y" ] && x_ ./update trees -b seabios
 
-	if [ "$payload_grub" = "y" ] || [ "$payload_seabios_withgrub" = "y" ] \
-	    || [ "$payload_seabios_grubonly" = "y" ]; then
-		[ -f "$grubelf" ] || x_ ./update trees -b grub $grubtree
-	fi
-
-	[ "$payload_uboot" = "y" ] || return 0
-	x_ ./update trees -b u-boot $board
-	ubdir="elf/u-boot/$board/$uboot_config"
-	ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \
-	    ubootelf="$ubdir/u-boot"
-	[ -f "$ubootelf" ] || $err "$board: Can't find u-boot"; return 0
+	[ "$xbmk_release" = "y" ] && [ "$release" = "n" ] && return 1
+	[ "$board" = "$tree" ] && return 1; return 0
 }
 
 build_board()
@@ -184,8 +167,8 @@ build_roms()
 	cbrom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 	x_ cp "$_cbrom" "$cbrom"
 
-	[ "$payload_memtest" != "y" ] || cbfs "$cbrom"
-	    "elf/memtest86plus/memtest.bin" img/memtest
+	[ "$payload_memtest" = "y" ] && x_ ./update trees -b memtest86plus && \
+	    cbfs "$cbrom" "elf/memtest86plus/memtest.bin" img/memtest
 	[ "$payload_seabios" = "y" ] && build_seabios_roms
 	[ "$payload_grub" != "y" ] || build_grub_roms "$cbrom" "grub"
 	[ "$payload_uboot" = "y" ] || return 0
@@ -216,6 +199,8 @@ build_grub_roms()
 	tmprom="$1"
 	payload1="$2" # allow values: grub, seabios, seabios_withgrub
 
+	x_ ./update trees -b grub $grubtree
+
 	grub_cbfs="fallback/payload"
 	if [ "$payload1" = "grub" ] && [ "$payload_grub_withseabios" = "y" ]
 	then
@@ -260,6 +245,8 @@ mkSeabiosRom() {
 	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)" # 1=cbrom, 2=cbfs path
 	_seabioself="elf/seabios/default/$initmode/bios.bin.elf"
 
+	x_ ./update trees -b seabios
+
 	x_ cp "$1" "$tmprom"
 	cbfs "$tmprom" "$_seabioself" "$2"
 	x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
@@ -275,6 +262,12 @@ mkSeabiosRom() {
 
 build_uboot_roms()
 {
+	x_ ./update trees -b u-boot $board
+	ubdir="elf/u-boot/$board/$uboot_config"
+	ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \
+	    ubootelf="$ubdir/u-boot"
+	[ -f "$ubootelf" ] || $err "$board: Can't find u-boot"
+
 	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 	newrom="$romdir/uboot_payload_${board}_${initmode}_$displaymode.rom"
 	x_ cp "$cbrom" "$tmprom"

From 383433d4f60d7777198b8344bc72c7d1fb876403 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 19 Jun 2024 01:29:26 +0100
Subject: [PATCH 0584/1549] roms: re-introduce accidentally disabled check

i disabled a check in the script, while testing a prior
modification. re-introoduce the check, which is put there
to yield an error condition if no targets were compiled.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/roms b/script/roms
index 865c4909..6fb78745 100755
--- a/script/roms
+++ b/script/roms
@@ -45,7 +45,7 @@ main()
 		    && targets="$targets, $x"; continue
 	done
 
-#	[ -z "$targets" ] && $err "No ROM images were compiled"
+	[ -z "$targets" ] && $err "No ROM images were compiled"
 	printf "Check these ROM directories in bin/: %s\n" "${targets#, }"
 	printf "DO NOT flash images from elf/ - use bin/ instead. ALSO:\n"
 	printf "%s\n" "$kbnotice"

From a0da8fdef104a3f47f1427119b00e32b3f21f5a7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 19 Jun 2024 14:11:54 +0100
Subject: [PATCH 0585/1549] roms: reduce indentation in build_grub_roms()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 17 +++++++----------
 1 file changed, 7 insertions(+), 10 deletions(-)

diff --git a/script/roms b/script/roms
index 6fb78745..f63d6418 100755
--- a/script/roms
+++ b/script/roms
@@ -228,16 +228,13 @@ build_grub_roms()
 	[ "$initmode" = "normal" ] && newrom="$romdir/${payload1}_" \
 	    && newrom="$newrom${board}_$initmode.rom"
 	cprom cp "$tmprom" "$newrom"
-	if [ "$payload_seabios_withgrub" = "y" ] && \
-	    [ "$payload1" != "grub" ]; then
-		cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
-		cprom cp "$tmprom" "${newrom%.rom}_grubfirst.rom"
-		if [ "$payload_seabios_grubonly" = "y" ]; then
-			x_ "$cbfstool" "$tmprom" add-int -i 0 \
-			    -n etc/show-boot-menu
-			cprom cp "$tmprom" "${newrom%.rom}_grubonly.rom"
-		fi
-	fi
+
+	[ "$payload1" = "grub" ] && return 0
+	cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
+	cprom cp "$tmprom" "${newrom%.rom}_grubfirst.rom"
+	[ "$payload_seabios_grubonly" = "y" ] && return 0
+	x_ "$cbfstool" "$tmprom" add-int -i 0 -n etc/show-boot-menu
+	cprom cp "$tmprom" "${newrom%.rom}_grubonly.rom"
 }
 
 # make a rom in /tmp/ and then print the path of that ROM

From abfc799fd5938711781d9d867eae55d97973e5e0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 19 Jun 2024 14:20:09 +0100
Subject: [PATCH 0586/1549] correction

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/roms b/script/roms
index f63d6418..51ce4fd7 100755
--- a/script/roms
+++ b/script/roms
@@ -232,7 +232,7 @@ build_grub_roms()
 	[ "$payload1" = "grub" ] && return 0
 	cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
 	cprom cp "$tmprom" "${newrom%.rom}_grubfirst.rom"
-	[ "$payload_seabios_grubonly" = "y" ] && return 0
+	[ "$payload_seabios_grubonly" = "y" ] || return 0
 	x_ "$cbfstool" "$tmprom" add-int -i 0 -n etc/show-boot-menu
 	cprom cp "$tmprom" "${newrom%.rom}_grubonly.rom"
 }

From 893e88bc814966d88a313d2c6d3a53d6ee54c9fb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 19 Jun 2024 14:32:42 +0100
Subject: [PATCH 0587/1549] roms: don't insert timeout.cfg

this is bloat, because it's something the user can already
do at runtime configuration anyway.

set it to a reasonable default of 8 seconds instead of 5,
and don't honour the timeout variable in target.cfg.

this will be documented in the next release.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/g43t_am3/target.cfg            |  1 -
 config/coreboot/g43t_am3_16mb/target.cfg       |  1 -
 config/coreboot/ga_g41m_es2l/target.cfg        |  1 -
 config/coreboot/hp2170p_16mb/target.cfg        |  1 -
 config/coreboot/hp2560p_8mb/target.cfg         |  1 -
 config/coreboot/hp2570p_16mb/target.cfg        |  1 -
 config/coreboot/hp8200sff_4mb/target.cfg       |  1 -
 config/coreboot/hp8200sff_8mb/target.cfg       |  1 -
 config/coreboot/hp8300cmt_16mb/target.cfg      |  1 -
 config/coreboot/hp8300usdt_16mb/target.cfg     |  1 -
 config/coreboot/hp8460pintel_8mb/target.cfg    |  1 -
 config/coreboot/hp8470pintel_16mb/target.cfg   |  1 -
 config/coreboot/hp8560w_8mb/target.cfg         |  1 -
 config/coreboot/hp9470m_16mb/target.cfg        |  1 -
 config/coreboot/kcma_d8_rdimm_16mb/target.cfg  |  1 -
 config/coreboot/kcma_d8_udimm_2mb/target.cfg   |  1 -
 config/coreboot/kfsn4_dre_1mb/target.cfg       |  1 -
 config/coreboot/kfsn4_dre_2mb/target.cfg       |  1 -
 config/coreboot/kgpe_d16_rdimm_16mb/target.cfg |  1 -
 config/coreboot/kgpe_d16_rdimm_2mb/target.cfg  |  1 -
 config/coreboot/kgpe_d16_udimm_16mb/target.cfg |  1 -
 config/coreboot/kgpe_d16_udimm_2mb/target.cfg  |  1 -
 config/grub/default/config/payload             |  2 +-
 config/grub/nvme/config/payload                |  2 +-
 config/grub/xhci/config/payload                |  2 +-
 script/roms                                    | 10 +++-------
 26 files changed, 6 insertions(+), 32 deletions(-)

diff --git a/config/coreboot/g43t_am3/target.cfg b/config/coreboot/g43t_am3/target.cfg
index f0e838fb..796ceabf 100644
--- a/config/coreboot/g43t_am3/target.cfg
+++ b/config/coreboot/g43t_am3/target.cfg
@@ -2,5 +2,4 @@ tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
-grub_timeout=10
 grubtree="nvme"
diff --git a/config/coreboot/g43t_am3_16mb/target.cfg b/config/coreboot/g43t_am3_16mb/target.cfg
index 533d8b5a..46e8fc4f 100644
--- a/config/coreboot/g43t_am3_16mb/target.cfg
+++ b/config/coreboot/g43t_am3_16mb/target.cfg
@@ -2,6 +2,5 @@ tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
-grub_timeout=10
 release="n"
 grubtree="nvme"
diff --git a/config/coreboot/ga_g41m_es2l/target.cfg b/config/coreboot/ga_g41m_es2l/target.cfg
index f0e838fb..796ceabf 100644
--- a/config/coreboot/ga_g41m_es2l/target.cfg
+++ b/config/coreboot/ga_g41m_es2l/target.cfg
@@ -2,5 +2,4 @@ tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
-grub_timeout=10
 grubtree="nvme"
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index 2e48c44d..341e655e 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_timeout=10
 grub_scan_disk="ahci"
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index 2e48c44d..341e655e 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_timeout=10
 grub_scan_disk="ahci"
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index 2e48c44d..341e655e 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_timeout=10
 grub_scan_disk="ahci"
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 82169ae7..a2b3d31f 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -3,6 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_timeout=10
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 82169ae7..a2b3d31f 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -3,6 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_timeout=10
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index 82169ae7..a2b3d31f 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -3,6 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_timeout=10
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index 2e48c44d..341e655e 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_timeout=10
 grub_scan_disk="ahci"
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index 2e48c44d..341e655e 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_timeout=10
 grub_scan_disk="ahci"
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index 2e48c44d..341e655e 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_timeout=10
 grub_scan_disk="ahci"
diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg
index 2e48c44d..341e655e 100644
--- a/config/coreboot/hp8560w_8mb/target.cfg
+++ b/config/coreboot/hp8560w_8mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_timeout=10
 grub_scan_disk="ahci"
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index 2e48c44d..341e655e 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
-grub_timeout=10
 grub_scan_disk="ahci"
diff --git a/config/coreboot/kcma_d8_rdimm_16mb/target.cfg b/config/coreboot/kcma_d8_rdimm_16mb/target.cfg
index 80d2018e..744b6e10 100644
--- a/config/coreboot/kcma_d8_rdimm_16mb/target.cfg
+++ b/config/coreboot/kcma_d8_rdimm_16mb/target.cfg
@@ -4,6 +4,5 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
-grub_timeout=10
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
diff --git a/config/coreboot/kcma_d8_udimm_2mb/target.cfg b/config/coreboot/kcma_d8_udimm_2mb/target.cfg
index d4079eb4..00e1d511 100644
--- a/config/coreboot/kcma_d8_udimm_2mb/target.cfg
+++ b/config/coreboot/kcma_d8_udimm_2mb/target.cfg
@@ -5,6 +5,5 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
-grub_timeout=10
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
diff --git a/config/coreboot/kfsn4_dre_1mb/target.cfg b/config/coreboot/kfsn4_dre_1mb/target.cfg
index 19c57b8d..79ca98c4 100644
--- a/config/coreboot/kfsn4_dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_1mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
-grub_timeout=10
diff --git a/config/coreboot/kfsn4_dre_2mb/target.cfg b/config/coreboot/kfsn4_dre_2mb/target.cfg
index 9bd20d45..51b50a3b 100644
--- a/config/coreboot/kfsn4_dre_2mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_2mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
-grub_timeout=10
diff --git a/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg b/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg
index 80d2018e..744b6e10 100644
--- a/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg
+++ b/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg
@@ -4,6 +4,5 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
-grub_timeout=10
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
diff --git a/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg b/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg
index 80d2018e..744b6e10 100644
--- a/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg
+++ b/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg
@@ -4,6 +4,5 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
-grub_timeout=10
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
diff --git a/config/coreboot/kgpe_d16_udimm_16mb/target.cfg b/config/coreboot/kgpe_d16_udimm_16mb/target.cfg
index d4079eb4..00e1d511 100644
--- a/config/coreboot/kgpe_d16_udimm_16mb/target.cfg
+++ b/config/coreboot/kgpe_d16_udimm_16mb/target.cfg
@@ -5,6 +5,5 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
-grub_timeout=10
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
diff --git a/config/coreboot/kgpe_d16_udimm_2mb/target.cfg b/config/coreboot/kgpe_d16_udimm_2mb/target.cfg
index d4079eb4..00e1d511 100644
--- a/config/coreboot/kgpe_d16_udimm_2mb/target.cfg
+++ b/config/coreboot/kgpe_d16_udimm_2mb/target.cfg
@@ -5,6 +5,5 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 xlang="c"
-grub_timeout=10
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
diff --git a/config/grub/default/config/payload b/config/grub/default/config/payload
index 313290ed..cdd6c0f0 100644
--- a/config/grub/default/config/payload
+++ b/config/grub/default/config/payload
@@ -53,7 +53,7 @@ set default="0"
 if [ -f (cbfsdisk)/timeout.cfg ]; then
 	source (cbfsdisk)/timeout.cfg
 else	
-	set timeout=5
+	set timeout=8
 fi
 set grub_scan_disk="ahci ata"
 if [ -f (cbfsdisk)/scan.cfg ]; then
diff --git a/config/grub/nvme/config/payload b/config/grub/nvme/config/payload
index d7a3c57d..2f9c7114 100644
--- a/config/grub/nvme/config/payload
+++ b/config/grub/nvme/config/payload
@@ -53,7 +53,7 @@ set default="0"
 if [ -f (cbfsdisk)/timeout.cfg ]; then
 	source (cbfsdisk)/timeout.cfg
 else	
-	set timeout=5
+	set timeout=8
 fi
 set grub_scan_disk="nvme ahci ata"
 if [ -f (cbfsdisk)/scan.cfg ]; then
diff --git a/config/grub/xhci/config/payload b/config/grub/xhci/config/payload
index cd5b49b3..923e3551 100644
--- a/config/grub/xhci/config/payload
+++ b/config/grub/xhci/config/payload
@@ -54,7 +54,7 @@ set default="0"
 if [ -f (cbfsdisk)/timeout.cfg ]; then
 	source (cbfsdisk)/timeout.cfg
 else	
-	set timeout=5
+	set timeout=8
 fi
 set grub_scan_disk="nvme ahci ata"
 if [ -f (cbfsdisk)/scan.cfg ]; then
diff --git a/script/roms b/script/roms
index 51ce4fd7..90521041 100755
--- a/script/roms
+++ b/script/roms
@@ -17,7 +17,6 @@ rp2040x="$rp2040src/build/pico_serprog.uf2"
 picosdk="src/pico-sdk"
 stm32src="src/stm32-vserprog"
 stm32x="$stm32src/stm32-vserprog.hex"
-tmpcfg="$tmpdir/tmpcfg"
 
 # Disable all payloads by default.
 # target.cfg files have to specifically enable [a] payload(s)
@@ -217,12 +216,9 @@ build_grub_roms()
 	# we only need insert grub.elf once, for each coreboot config:
 	cbfs "$tmprom" "$grubelf" "$grub_cbfs"
 
-	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" > "$tmpcfg" || \
-	    $err "set grub_scan_disk, $grub_scan_disk, $tmpcfg"
-	cbfs "$tmprom" "$tmpcfg" scan.cfg raw
-
-	printf "set timeout=%s\n" "$grub_timeout" > "$tmpcfg" || $err "!time"
-	[ -z "$grub_timeout" ] || cbfs "$tmprom" "$tmpcfg" timeout.cfg raw
+	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
+	    > "$tmpdir/tmpcfg" || $err "set grub_scan_disk, $grub_scan_disk"
+	cbfs "$tmprom" "$tmpdir/tmpcfg" scan.cfg raw
 
 	newrom="$romdir/${payload1}_${board}_${initmode}_$displaymode.rom"
 	[ "$initmode" = "normal" ] && newrom="$romdir/${payload1}_" \

From 185d76f57e6240d44e1b2a7b6630ec9b5811a04e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 20 Jun 2024 00:12:00 +0100
Subject: [PATCH 0588/1549] roms: merge mkserprog() into main()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 56 +++++++++++++++++++++++++----------------------------
 1 file changed, 26 insertions(+), 30 deletions(-)

diff --git a/script/roms b/script/roms
index 90521041..bc124734 100755
--- a/script/roms
+++ b/script/roms
@@ -15,8 +15,10 @@ cfgsdir="config/coreboot"
 rp2040src="src/pico-serprog"
 rp2040x="$rp2040src/build/pico_serprog.uf2"
 picosdk="src/pico-sdk"
+rp2040dir="$picosdk/src/boards/include/boards"
 stm32src="src/stm32-vserprog"
 stm32x="$stm32src/stm32-vserprog.hex"
+stm32dir="$stm32src/boards"
 
 # Disable all payloads by default.
 # target.cfg files have to specifically enable [a] payload(s)
@@ -25,53 +27,47 @@ pv="$pv payload_seabios_withgrub payload_seabios_grubonly payload_grub"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree release ubootelf"
 v="$v grub_timeout board grub_scan_disk uboot_config grubtree grubelf tmpmv"
 eval "$(setvars "n" $pv)"
-eval "$(setvars "" $v boards targets serprogdir ser)"
+eval "$(setvars "" $v boards targets serdir ser)"
 
 main()
 {
 	while [ $# -gt 0 ]; do
-		[ "$1" = "list" ] && eval "x_ ls -1 config/coreboot; return 0"
-		[ "$1" = "serprog" ] && shift && eval "mkserprog $@; return 0"
+		if [ "$1" = "serprog" ]; then
+			[ $# -lt 2 ] && badcmd "serprog type not set"
+			[ "$2" != "rp2040" ] && [ "$2" != "stm32" ] && badcmd
+			eval "x_ ./update trees -f \"\${${2}src##*/}\""
+			ser="$2" && shift 2 && continue
+		fi
+		[ "$1$ser" = "list" ] && x_ ls -1 config/coreboot && return
 		[ "$1" = "all" ] && shift && continue
 		boards="$1 $boards"; shift 1
 	done
 
-	[ -n "$boards" ] || boards="$(ls -1 config/coreboot)" || \
-		$err "Cannot generate list of boards for building"
+	[ -n "$boards" ] || [ -n "$ser" ] || boards="$(ls -1 \
+	    config/coreboot)" || $err "can't list coreboot boards"
+
+	[ -n "$ser" ] && \
+	    eval "serlist \"\$${ser}dir\" > \"\$tmpdir/ser\" || $err \"!ser\""
+	[ -n "$ser" ] && [ -z "$boards" ] && boards="$(cat "$tmpdir/ser")"
+
 	for x in $boards; do
-		[ -d "config/coreboot/$x/config" ] && configure_target "$x" \
-		    && build_board && [ -d "bin/$board" ] \
-		    && targets="$targets, $x"; continue
+		[ -n "$ser" ] && mkserprogfw "$ser" "$x"
+		[ -z "$ser" ] && [ -d "config/coreboot/$x/config" ] && \
+		    configure_target "$x" && build_board && \
+		    [ -d "bin/$board" ] && targets="$targets, $x"; continue
 	done
 
-	[ -z "$targets" ] && $err "No ROM images were compiled"
-	printf "Check these ROM directories in bin/: %s\n" "${targets#, }"
+	[ -n "$ser" ] && [ "$xbmk_release" = "y" ] && \
+	    mkrom_tarball "bin/serprog_$ser" && return 0
+
+	[ -z "$ser" ] && [ -z "$targets" ] && $err "No images were compiled"
 	printf "DO NOT flash images from elf/ - use bin/ instead. ALSO:\n"
 	printf "%s\n" "$kbnotice"
 }
 
-mkserprog()
-{
-	[ -z "${1+x}" ] && badcmd
-	[ "$1" != "rp2040" ] && [ "$1" != "stm32" ] && $err "bad command"
-	[ "$1" = "rp2040" ] && serprogdir="$picosdk/src/boards/include/boards"
-	[ "$1" = "stm32" ] && serprogdir="$stm32src/boards"
-	eval "[ -d \"\$${1}src\" ] || x_ ./update trees -f \"\${${1}src##*/}\""
-	x_ mkdir -p "bin/serprog_$1"
-
-	[ $# -gt 1 ] && [ "$2" = "list" ] && serlist "$serprogdir" && return 0
-	ser="$1" && shift
-
-	targets="$@" && [ -z "$targets" ] && targets="$(serlist "$serprogdir")"
-	for board in $targets; do
-		mkserprogfw "$ser" "$board"
-	done
-
-	[ "$xbmk_release" = "y" ] && mkrom_tarball "bin/serprog_$1"; return 0
-}
-
 mkserprogfw()
 {
+	x_ mkdir -p "bin/serprog_$1"
 	if [ "$1" = "rp2040" ]; then
 		x_ cmake -DPICO_BOARD="$2" -DPICO_SDK_PATH="$picosdk" \
 		    -B "$rp2040src/build" "$rp2040src"

From 4f6dda136663e5efd23a82024439d7a40c7bb349 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 20 Jun 2024 00:46:51 +0100
Subject: [PATCH 0589/1549] git.sh: simplified repo/backup check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index c1e7b4ba..01ebff4b 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -121,8 +121,7 @@ fetch_submodule()
 
 	st=""
 	for _st in repo file; do
-		_seval="if [ -n \"\$sub$_st\" ] || [ -n \"\$sub${_st}_bkup\" ]"
-		eval "$_seval; then st=\"\$st \$_st\"; fi"
+		eval "[ -n \"\$sub$_st\$sub${_st}_bkup\" ] && st=\"\$st \$_st\""
 	done
 	st="${st# }"
 	[ "$st" = "repo file" ] && $err "$mdir: repo/file both defined"

From cd1d847898078add88fd17542703806f1c30b522 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 20 Jun 2024 00:51:04 +0100
Subject: [PATCH 0590/1549] git.sh: reduced indentation on repo/file check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 01ebff4b..a4543e99 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -130,13 +130,11 @@ fetch_submodule()
 
 	chkvars "sub${st}" "sub${st}_bkup" "subhash"
 
-	if [ "$st" = "repo" ]; then
-		rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
-		tmpclone "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subhash" \
-		    "$mdir/${1##*/}/patches"
-	else
-		download "$subfile" "$subfile_bkup" "$tmpgit/$1" "$subhash"
-	fi
+	[ "$st" != "repo" ] && download "$subfile" "$subfile_bkup" \
+	    "$tmpgit/$1" "$subhash" && return 0
+	rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
+	tmpclone "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subhash" \
+	    "$mdir/${1##*/}/patches"
 }
 
 tmpclone()

From 4ab99d546e4b67e0394a2bb34c004c46d16ff893 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 20 Jun 2024 00:57:10 +0100
Subject: [PATCH 0591/1549] git.sh: general code cleanup in fetch_submodule()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index a4543e99..2f9359c9 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -115,22 +115,19 @@ prep_submodules()
 fetch_submodule()
 {
 	mcfgdir="$mdir/${1##*/}"
-	eval "$(setvars "" subhash subrepo subrepo_bkup subfile subfile_bkup)"
+	eval $(setvars "" subhash subrepo subrepo_bkup subfile subfile_bkup st)
 	[ ! -f "$mcfgdir/module.cfg" ] || . "$mcfgdir/module.cfg" || \
 	    $err "! . $mcfgdir/module.cfg"
 
-	st=""
-	for _st in repo file; do
-		eval "[ -n \"\$sub$_st\$sub${_st}_bkup\" ] && st=\"\$st \$_st\""
+	for xt in repo file; do
+		eval "[ -n \"\$sub$xt\$sub${xt}_bkup\" ] && st=\"\$st \$xt\""
 	done
-	st="${st# }"
-	[ "$st" = "repo file" ] && $err "$mdir: repo/file both defined"
+	st="${st# }" && [ "$st" = "repo file" ] && $err "$mdir: repo+file"
 
 	[ -z "$st" ] && return 0 # subrepo/subfile not defined
-
 	chkvars "sub${st}" "sub${st}_bkup" "subhash"
 
-	[ "$st" != "repo" ] && download "$subfile" "$subfile_bkup" \
+	[ "$st" = "file" ] && download "$subfile" "$subfile_bkup" \
 	    "$tmpgit/$1" "$subhash" && return 0
 	rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
 	tmpclone "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subhash" \

From 808458ced5bcc5131d542e7e2fcb8120a613c8eb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 20 Jun 2024 01:15:06 +0100
Subject: [PATCH 0592/1549] minor code cleanup in the build system

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh    | 6 ++----
 include/lib.sh    | 6 ++----
 include/vendor.sh | 9 +++------
 script/roms       | 5 ++---
 script/trees      | 3 +--
 5 files changed, 10 insertions(+), 19 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 2f9359c9..476dd2b6 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -57,15 +57,13 @@ fetch_project_repo()
 	[ -n "$xtree" ] && [ ! -d "src/coreboot/$xtree" ] && \
 		x_ ./update trees -f coreboot "$xtree"
 	[ -z "$depend" ] || for d in $depend ; do
-		printf "'%s' needs dependency '%s'; grabbing '%s' now\n" \
-		    "$project" "$d" "$d"
+		printf "'%s' needs '%s'; grabbing '%s'\n" "$project" "$d" "$d"
 		x_ ./update trees -f $d
 	done
 	clone_project
 
 	for x in config/git/*; do
-		[ -f "$x" ] && nuke "${x##*/}" "src/${x##*/}" 2>/dev/null; \
-		    continue
+		[ -f "$x" ] && nuke "${x##*/}" "src/${x##*/}" 2>/dev/null
 	done
 }
 
diff --git a/include/lib.sh b/include/lib.sh
index 5952b202..2fc17cfe 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -181,8 +181,7 @@ mktarball()
 	[ "${2%/*}" = "$2" ] || \
 		mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
 	printf "\nCreating archive: %s\n\n" "$2"
-	tar -c "$1" | xz -T$threads -9e > "$2" || \
-	    $err "mktarball 2, $1"
+	tar -c "$1" | xz -T$threads -9e > "$2" || $err "mktarball 2, $1"
 	mksha512sum "$2" "${2##*/}.sha512"
 }
 
@@ -190,8 +189,7 @@ mksha512sum()
 {
 	(
 	[ "${1%/*}" != "$1" ] && x_ cd "${1%/*}"
-	sha512sum ./"${1##*/}" >> "$2" || \
-	    $err "!sha512sum \"$1\" > \"$2\""
+	sha512sum ./"${1##*/}" >> "$2" || $err "!sha512sum \"$1\" > \"$2\""
 	) || $err "failed to create tarball checksum"
 }
 
diff --git a/include/vendor.sh b/include/vendor.sh
index 54dac191..31b50889 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -36,10 +36,7 @@ vendor_download()
 	_b="${board%%_*mb}" # shorthand (no duplication per rom size)
 
 	detect_firmware && exit 0
-	scan_config "$_b" "config/vendor"
-
-	build_dependencies_download
-	download_vendorfiles
+	scan_config "$_b" "config/vendor" && bootstrap && getfiles
 }
 
 detect_firmware()
@@ -68,7 +65,7 @@ detect_firmware()
 	printf "Vendor files not needed for: %s\n" "$board" 1>&2
 }
 
-build_dependencies_download()
+bootstrap()
 {
 	[ -d "$cbdir" ] || x_ ./update trees -f coreboot ${cbdir##*/}
 	for d in uefitool biosutilities bios_extract; do
@@ -86,7 +83,7 @@ build_dependencies_download()
 	x_ ./update trees -b coreboot utils $tree
 }
 
-download_vendorfiles()
+getfiles()
 {
 	[ -z "$CONFIG_HAVE_ME_BIN" ] || fetch intel_me "$DL_url" \
 	    "$DL_url_bkup" "$DL_hash" "$CONFIG_ME_BIN_PATH"
diff --git a/script/roms b/script/roms
index bc124734..2f90653f 100755
--- a/script/roms
+++ b/script/roms
@@ -166,9 +166,8 @@ build_roms()
 	    cbfs "$cbrom" "elf/memtest86plus/memtest.bin" img/memtest
 	[ "$payload_seabios" = "y" ] && build_seabios_roms
 	[ "$payload_grub" != "y" ] || build_grub_roms "$cbrom" "grub"
-	[ "$payload_uboot" = "y" ] || return 0
-	x_ cp "$_cbrom" "$cbrom"
-	build_uboot_roms
+	[ "$payload_uboot" = "y" ] && x_ cp "$_cbrom" "$cbrom" && \
+	    build_uboot_roms; return 0
 }
 
 build_seabios_roms()
diff --git a/script/trees b/script/trees
index 13f6d652..78ffaed8 100755
--- a/script/trees
+++ b/script/trees
@@ -229,8 +229,7 @@ handle_makefile()
 
 run_make_command()
 {
-	check_cmake "$cdir"
-	[ -z "$mode" ] && check_autoconf "$cdir"
+	check_cmake "$cdir" && [ -z "$mode" ] && check_autoconf "$cdir"
 	check_makefile "$cdir" || return 1
 
 	[ "$project" = "coreboot" ] && [ -z "$mode" ] && x_ \

From bc61c39ec8c487661676bdee32626377cd78f5a4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 20 Jun 2024 01:23:37 +0100
Subject: [PATCH 0593/1549] vendor.sh: minor code cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 31b50889..9c819bbf 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -35,14 +35,13 @@ vendor_download()
 	boarddir="$cbcfgsdir/$board"
 	_b="${board%%_*mb}" # shorthand (no duplication per rom size)
 
-	detect_firmware && exit 0
-	scan_config "$_b" "config/vendor" && bootstrap && getfiles
+	getcfg && scancfg "$_b" "config/vendor" && bootstrap && getfiles
 }
 
-detect_firmware()
+getcfg()
 {
 	[ -d "$boarddir" ] || $err "Target '$board' not defined."
-	check_defconfig "$boarddir" 1>"$tmpdir/vendorcfg.list" && return 0
+	check_defconfig "$boarddir" 1>"$tmpdir/vendorcfg.list" && return 1
 	while read -r cbcfgfile; do
 		set +u +e
 		. "$cbcfgfile" 2>/dev/null
@@ -50,7 +49,7 @@ detect_firmware()
 	done < "$tmpdir/vendorcfg.list"
 	. "$boarddir/target.cfg" 2>/dev/null
 
-	[ -z "$tree" ] && $err "detect_firmware $boarddir: tree undefined"
+	[ -z "$tree" ] && $err "getcfg $boarddir: tree undefined"
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 
@@ -60,9 +59,9 @@ detect_firmware()
 	for c in CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
 	    CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW; do
 		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
-		eval "[ -z \"\${$c}\" ] || return 1"
+		eval "[ -z \"\${$c}\" ] || return 0"
 	done
-	printf "Vendor files not needed for: %s\n" "$board" 1>&2
+	printf "Vendor files not needed for: %s\n" "$board" 1>&2 && return 1
 }
 
 bootstrap()

From d65e4fac1d6220f5889f13816b1c605d6a20b504 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 20 Jun 2024 01:42:10 +0100
Subject: [PATCH 0594/1549] git.sh: revert modification to for loop

i tried to be clever with this one, but it just made
the script exit with an error.

revert back to the old check (check whether one of
either repo or repo backup is set)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/git.sh b/include/git.sh
index 476dd2b6..e2fd2129 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -118,8 +118,10 @@ fetch_submodule()
 	    $err "! . $mcfgdir/module.cfg"
 
 	for xt in repo file; do
-		eval "[ -n \"\$sub$xt\$sub${xt}_bkup\" ] && st=\"\$st \$xt\""
+		_seval="if [ -n \"\$sub$xt\" ] || [ -n \"\$sub${xt}_bkup\" ]"
+		eval "$_seval; then st=\"\$st \$xt\"; fi"
 	done
+
 	st="${st# }" && [ "$st" = "repo file" ] && $err "$mdir: repo+file"
 
 	[ -z "$st" ] && return 0 # subrepo/subfile not defined

From 5a4fc97c63956f5069f5687f6b72c41bf0a3c4c0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 20 Jun 2024 02:07:35 +0100
Subject: [PATCH 0595/1549] vendor.sh: correction (s/scancfg/scan_config)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 9c819bbf..d56cf311 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -35,7 +35,7 @@ vendor_download()
 	boarddir="$cbcfgsdir/$board"
 	_b="${board%%_*mb}" # shorthand (no duplication per rom size)
 
-	getcfg && scancfg "$_b" "config/vendor" && bootstrap && getfiles
+	getcfg && scan_config "$_b" "config/vendor" && bootstrap && getfiles
 }
 
 getcfg()

From 47112968411558bc832a867c1b7bc90884eded75 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 20 Jun 2024 02:58:59 +0100
Subject: [PATCH 0596/1549] Revert "roms: remove build_payloads() and split it
 up"

This reverts commit 3610667e3db08ff1db4f7784ff5a879d8aebce9d.

The output of some functions in the roms script are used as
an argument in cp and mv commands, also cbfstool. I overlooked
this fact in a previous code optimisation.

Revert it. The change only reduced sloccount by a few lines
anyway.
---
 script/roms | 37 ++++++++++++++++++++++---------------
 1 file changed, 22 insertions(+), 15 deletions(-)

diff --git a/script/roms b/script/roms
index 2f90653f..c992b447 100755
--- a/script/roms
+++ b/script/roms
@@ -53,7 +53,7 @@ main()
 	for x in $boards; do
 		[ -n "$ser" ] && mkserprogfw "$ser" "$x"
 		[ -z "$ser" ] && [ -d "config/coreboot/$x/config" ] && \
-		    configure_target "$x" && build_board && \
+		    configure_target "$x" && build_payloads && build_board && \
 		    [ -d "bin/$board" ] && targets="$targets, $x"; continue
 	done
 
@@ -120,6 +120,12 @@ configure_target()
 	[ "$payload_uboot" = "y" ] || payload_uboot="n"
 	[ -n "$uboot_config" ] || uboot_config="default"
 
+	[ "$xbmk_release" = "y" ] && [ "$release" = "n" ] && return 1
+	[ "$board" = "$tree" ] && return 1; return 0
+}
+
+build_payloads()
+{
 	romdir="bin/$board"
 	cbdir="src/coreboot/$board"
 	[ "$board" = "$tree" ] || cbdir="src/coreboot/$tree"
@@ -127,9 +133,20 @@ configure_target()
 	cbrom="$cbdir/build/coreboot.rom"
 
 	[ -f "$cbfstool" ] || x_ ./update trees -b coreboot utils $tree
+	[ "$payload_memtest" = "y" ] && x_ ./update trees -b memtest86plus
+	[ "$payload_seabios" = "y" ] && x_ ./update trees -b seabios
 
-	[ "$xbmk_release" = "y" ] && [ "$release" = "n" ] && return 1
-	[ "$board" = "$tree" ] && return 1; return 0
+	if [ "$payload_grub" = "y" ] || [ "$payload_seabios_withgrub" = "y" ] \
+	    || [ "$payload_seabios_grubonly" = "y" ]; then
+		[ -f "$grubelf" ] || x_ ./update trees -b grub $grubtree
+	fi
+
+	[ "$payload_uboot" = "y" ] || return 0
+	x_ ./update trees -b u-boot $board
+	ubdir="elf/u-boot/$board/$uboot_config"
+	ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \
+	    ubootelf="$ubdir/u-boot"
+	[ -f "$ubootelf" ] || $err "$board: Can't find u-boot"; return 0
 }
 
 build_board()
@@ -162,8 +179,8 @@ build_roms()
 	cbrom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 	x_ cp "$_cbrom" "$cbrom"
 
-	[ "$payload_memtest" = "y" ] && x_ ./update trees -b memtest86plus && \
-	    cbfs "$cbrom" "elf/memtest86plus/memtest.bin" img/memtest
+	[ "$payload_memtest" != "y" ] || cbfs "$cbrom"
+	    "elf/memtest86plus/memtest.bin" img/memtest
 	[ "$payload_seabios" = "y" ] && build_seabios_roms
 	[ "$payload_grub" != "y" ] || build_grub_roms "$cbrom" "grub"
 	[ "$payload_uboot" = "y" ] && x_ cp "$_cbrom" "$cbrom" && \
@@ -193,8 +210,6 @@ build_grub_roms()
 	tmprom="$1"
 	payload1="$2" # allow values: grub, seabios, seabios_withgrub
 
-	x_ ./update trees -b grub $grubtree
-
 	grub_cbfs="fallback/payload"
 	if [ "$payload1" = "grub" ] && [ "$payload_grub_withseabios" = "y" ]
 	then
@@ -233,8 +248,6 @@ mkSeabiosRom() {
 	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)" # 1=cbrom, 2=cbfs path
 	_seabioself="elf/seabios/default/$initmode/bios.bin.elf"
 
-	x_ ./update trees -b seabios
-
 	x_ cp "$1" "$tmprom"
 	cbfs "$tmprom" "$_seabioself" "$2"
 	x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
@@ -250,12 +263,6 @@ mkSeabiosRom() {
 
 build_uboot_roms()
 {
-	x_ ./update trees -b u-boot $board
-	ubdir="elf/u-boot/$board/$uboot_config"
-	ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \
-	    ubootelf="$ubdir/u-boot"
-	[ -f "$ubootelf" ] || $err "$board: Can't find u-boot"
-
 	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 	newrom="$romdir/uboot_payload_${board}_${initmode}_$displaymode.rom"
 	x_ cp "$cbrom" "$tmprom"

From 8c4a91850010cb45084c021f085275b3bddd0cc9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 20 Jun 2024 04:04:42 +0100
Subject: [PATCH 0597/1549] vendor.sh: more cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index d56cf311..d7ecd55d 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -32,10 +32,9 @@ vendor_download()
 
 	[ $# -gt 0 ] || $err "No argument given"
 	board="$1"
-	boarddir="$cbcfgsdir/$board"
 	_b="${board%%_*mb}" # shorthand (no duplication per rom size)
-
-	getcfg && scan_config "$_b" "config/vendor" && bootstrap && getfiles
+	boarddir="$cbcfgsdir/$board" && getcfg && scan_config "$_b" \
+	    "config/vendor" && bootstrap && getfiles; return 0
 }
 
 getcfg()

From a6b1a6bddb59fcab84ac0fa3936208f869a0e3ce Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Thu, 20 Jun 2024 22:38:23 +0100
Subject: [PATCH 0598/1549] roms: fix lack of backslash on multi-line command

Signed-off-by: Leah Rowe <info@minifree.org>
---
 script/roms | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/roms b/script/roms
index c992b447..457a1baa 100755
--- a/script/roms
+++ b/script/roms
@@ -179,7 +179,7 @@ build_roms()
 	cbrom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 	x_ cp "$_cbrom" "$cbrom"
 
-	[ "$payload_memtest" != "y" ] || cbfs "$cbrom"
+	[ "$payload_memtest" != "y" ] || cbfs "$cbrom" \
 	    "elf/memtest86plus/memtest.bin" img/memtest
 	[ "$payload_seabios" = "y" ] && build_seabios_roms
 	[ "$payload_grub" != "y" ] || build_grub_roms "$cbrom" "grub"

From ad1602569ebf1404c47fb8ea4b39d0f8e844b840 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 21 Jun 2024 03:05:00 +0100
Subject: [PATCH 0599/1549] trees: more robust check to avoid "make fetch"

do not use shorthand here. the test was failing to
produce the desired result under some circumstances,
for example when i did "./update release" i got this:

make: Entering directory '/home/lbdev/lbmk/release/20240612-62-ga6b1a6bd/libreboot-20240612-62-ga6b1a6bd_src/src/stm32-vserprog'
make: *** No rule to make target 'fetch'.  Stop.
make: Leaving directory '/home/lbdev/lbmk/release/20240612-62-ga6b1a6bd/libreboot-20240612-62-ga6b1a6bd_src/src/stm32-vserprog'
ERROR script/trees: !mk src/stm32-vserprog fetch
ERROR ./update: excmd: script/trees -f
ERROR script/roms: Unhandled non-zero exit: ./update
ERROR ./build: excmd: script/roms serprog
ERROR ./update: build_release release/20240612-62-ga6b1a6bd: stm32
ERROR ./update: can't build rom images

in the above circumstance, run_make_command was executed,
which is not the desired behaviour; rather, fetch_project_trees
or fetch_project_repo should be called, and then the script
should immediately exit. it should also exit, without downloading
anything, if a changelog file exists as in release archives.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/script/trees b/script/trees
index 78ffaed8..b2b1e561 100755
--- a/script/trees
+++ b/script/trees
@@ -58,8 +58,10 @@ build_projects()
 {
 	[ $# -gt 0 ] && x_ ./update trees $_f $@
 
-	[ "$mode" = "fetch" ] && [ ! -f "CHANGELOG" ] && \
-		eval "fetch_project_repo; return 0;"
+	if [ "$mode" = "fetch" ]; then
+		[ -f "CHANGELOG" ] && return 0
+		fetch_project_repo; return 0
+	fi
 
 	load_project_config "$cfgsdir"
 	[ -f "$listfile" ] || listfile="" # optional on single-tree
@@ -124,8 +126,10 @@ handle_defconfig()
 handle_src_tree()
 {
 	target_dir="$cfgsdir/$target"
-	[ "$mode" = "fetch" ] && [ ! -f "CHANGELOG" ] && \
-		eval "fetch_project_trees; return 1;"
+	if [ "$mode" = "fetch" ]; then
+		[ -f "CHANGELOG" ] && return 1
+		fetch_project_trees; return 1
+	fi
 
 	load_project_config "$target_dir"
 	x_ mkdir -p "$elfdir/$target"

From fc7ae3e5903c176584cfefd6d3cf4c1549c4eaaa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 22 Jun 2024 02:35:25 +0100
Subject: [PATCH 0600/1549] lib.sh: more unified config handling

replace it with logic that simply uses "." to load
files directly. for this, "vcfg" is added as a variable
in coreboot target.cfg files, referring to a directory
in config/vendor/ containing a file named pkg.cfg, and
this file then contains the same variables as the
erstwhile config/vendor/sources

config/git files are now directories, also containing
pkg.cfg files each with the same variables as before,
such as repository link and commit hash

this change results in a noticeable reduction in code
complexity within the build system.

unified reading of config files: new function setcfg()
added to lib.sh

setcfg checks if a config exists. if a 2nd argument is
passed, it is used as a return value for eval, otherwise
a string calling err is passed. setcfg output is passed
through eval, to set strings based on config; eval must
be used, so that the variables are set within the same
scope, otherwise they'd be set within setcfg which could
lead to some whacky results.

there's still a bit more more to do, but this single change
results in a substantial reduction in code complexity.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../coreboot/dell9020mt_nri_12mb/target.cfg   |   1 +
 .../coreboot/dell9020sff_nri_12mb/target.cfg  |   1 +
 config/coreboot/e5420_6mb/target.cfg          |   1 +
 config/coreboot/e5520_6mb/target.cfg          |   1 +
 config/coreboot/e5530_12mb/target.cfg         |   1 +
 config/coreboot/e6400_4mb/target.cfg          |   1 +
 config/coreboot/e6400nvidia_4mb/target.cfg    |   1 +
 config/coreboot/e6420_10mb/target.cfg         |   1 +
 config/coreboot/e6430_12mb/target.cfg         |   1 +
 config/coreboot/e6520_10mb/target.cfg         |   1 +
 config/coreboot/e6530_12mb/target.cfg         |   1 +
 config/coreboot/hp2170p_16mb/target.cfg       |   1 +
 config/coreboot/hp2560p_8mb/target.cfg        |   1 +
 config/coreboot/hp2570p_16mb/target.cfg       |   1 +
 config/coreboot/hp8200sff_4mb/target.cfg      |   1 +
 config/coreboot/hp8200sff_8mb/target.cfg      |   1 +
 config/coreboot/hp820g2_12mb/target.cfg       |   1 +
 config/coreboot/hp8300cmt_16mb/target.cfg     |   1 +
 config/coreboot/hp8300usdt_16mb/target.cfg    |   1 +
 config/coreboot/hp8460pintel_8mb/target.cfg   |   1 +
 config/coreboot/hp8470pintel_16mb/target.cfg  |   1 +
 config/coreboot/hp8560w_8mb/target.cfg        |   1 +
 config/coreboot/hp9470m_16mb/target.cfg       |   1 +
 config/coreboot/t1650_12mb/target.cfg         |   1 +
 config/coreboot/t420_8mb/target.cfg           |   1 +
 config/coreboot/t420s_8mb/target.cfg          |   1 +
 config/coreboot/t430_12mb/target.cfg          |   1 +
 config/coreboot/t440plibremrc_12mb/target.cfg |   1 +
 config/coreboot/t520_8mb/target.cfg           |   1 +
 config/coreboot/t530_12mb/target.cfg          |   1 +
 config/coreboot/w530_12mb/target.cfg          |   1 +
 config/coreboot/w541_12mb/target.cfg          |   1 +
 config/coreboot/x220_8mb/target.cfg           |   1 +
 config/coreboot/x230_12mb/target.cfg          |   1 +
 config/coreboot/x230_16mb/target.cfg          |   1 +
 config/coreboot/x230t_12mb/target.cfg         |   1 +
 config/coreboot/x230t_16mb/target.cfg         |   1 +
 config/git/bios_extract                       |   6 -
 config/git/bios_extract/pkg.cfg               |   3 +
 config/git/biosutilities                      |   6 -
 config/git/biosutilities/pkg.cfg              |   3 +
 config/git/coreboot                           |   6 -
 config/git/coreboot/pkg.cfg                   |   3 +
 config/git/docs                               |   6 -
 config/git/docs/pkg.cfg                       |   3 +
 config/git/flashprog                          |   6 -
 config/git/flashprog/pkg.cfg                  |   3 +
 config/git/grub                               |   6 -
 config/git/grub/pkg.cfg                       |   3 +
 config/git/memtest86plus                      |   6 -
 config/git/memtest86plus/pkg.cfg              |   3 +
 config/git/pico-sdk                           |   6 -
 config/git/pico-sdk/pkg.cfg                   |   3 +
 config/git/pico-serprog                       |   7 -
 config/git/pico-serprog/pkg.cfg               |   4 +
 config/git/seabios                            |   6 -
 config/git/seabios/pkg.cfg                    |   3 +
 config/git/stm32-vserprog                     |   6 -
 config/git/stm32-vserprog/pkg.cfg             |   3 +
 config/git/u-boot                             |   6 -
 config/git/u-boot/pkg.cfg                     |   3 +
 config/git/uefitool                           |   6 -
 config/git/uefitool/pkg.cfg                   |   3 +
 config/vendor/e6400/pkg.cfg                   |   5 +
 config/vendor/haswell/pkg.cfg                 |   3 +
 config/vendor/hp2170p/pkg.cfg                 |   6 +
 config/vendor/hp2560p/pkg.cfg                 |   6 +
 config/vendor/hp2570p/pkg.cfg                 |   6 +
 config/vendor/hp8200sff/pkg.cfg               |   3 +
 config/vendor/hp820g2/pkg.cfg                 |   9 +
 config/vendor/hp8460pintel/pkg.cfg            |   6 +
 config/vendor/hp8470pintel/pkg.cfg            |   6 +
 config/vendor/hp8560w/pkg.cfg                 |   6 +
 config/vendor/hp9470m/pkg.cfg                 |   6 +
 config/vendor/ivybridge/pkg.cfg               |   3 +
 config/vendor/sandybridge/pkg.cfg             |   3 +
 config/vendor/sources                         | 166 ------------------
 config/vendor/t1650/pkg.cfg                   |   6 +
 include/git.sh                                |  16 +-
 include/lib.sh                                |  34 ++--
 include/vendor.sh                             |  30 ++--
 script/roms                                   |   3 +-
 script/trees                                  |  17 +-
 83 files changed, 190 insertions(+), 306 deletions(-)
 delete mode 100644 config/git/bios_extract
 create mode 100644 config/git/bios_extract/pkg.cfg
 delete mode 100644 config/git/biosutilities
 create mode 100644 config/git/biosutilities/pkg.cfg
 delete mode 100644 config/git/coreboot
 create mode 100644 config/git/coreboot/pkg.cfg
 delete mode 100644 config/git/docs
 create mode 100644 config/git/docs/pkg.cfg
 delete mode 100644 config/git/flashprog
 create mode 100644 config/git/flashprog/pkg.cfg
 delete mode 100644 config/git/grub
 create mode 100644 config/git/grub/pkg.cfg
 delete mode 100644 config/git/memtest86plus
 create mode 100644 config/git/memtest86plus/pkg.cfg
 delete mode 100644 config/git/pico-sdk
 create mode 100644 config/git/pico-sdk/pkg.cfg
 delete mode 100644 config/git/pico-serprog
 create mode 100644 config/git/pico-serprog/pkg.cfg
 delete mode 100644 config/git/seabios
 create mode 100644 config/git/seabios/pkg.cfg
 delete mode 100644 config/git/stm32-vserprog
 create mode 100644 config/git/stm32-vserprog/pkg.cfg
 delete mode 100644 config/git/u-boot
 create mode 100644 config/git/u-boot/pkg.cfg
 delete mode 100644 config/git/uefitool
 create mode 100644 config/git/uefitool/pkg.cfg
 create mode 100644 config/vendor/e6400/pkg.cfg
 create mode 100644 config/vendor/haswell/pkg.cfg
 create mode 100644 config/vendor/hp2170p/pkg.cfg
 create mode 100644 config/vendor/hp2560p/pkg.cfg
 create mode 100644 config/vendor/hp2570p/pkg.cfg
 create mode 100644 config/vendor/hp8200sff/pkg.cfg
 create mode 100644 config/vendor/hp820g2/pkg.cfg
 create mode 100644 config/vendor/hp8460pintel/pkg.cfg
 create mode 100644 config/vendor/hp8470pintel/pkg.cfg
 create mode 100644 config/vendor/hp8560w/pkg.cfg
 create mode 100644 config/vendor/hp9470m/pkg.cfg
 create mode 100644 config/vendor/ivybridge/pkg.cfg
 create mode 100644 config/vendor/sandybridge/pkg.cfg
 delete mode 100644 config/vendor/sources
 create mode 100644 config/vendor/t1650/pkg.cfg

diff --git a/config/coreboot/dell9020mt_nri_12mb/target.cfg b/config/coreboot/dell9020mt_nri_12mb/target.cfg
index b513e2b5..e32d25c1 100644
--- a/config/coreboot/dell9020mt_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_nri_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
+vcfg="haswell"
diff --git a/config/coreboot/dell9020sff_nri_12mb/target.cfg b/config/coreboot/dell9020sff_nri_12mb/target.cfg
index b513e2b5..e32d25c1 100644
--- a/config/coreboot/dell9020sff_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_nri_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
+vcfg="haswell"
diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index 341e655e..f94ac308 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index 341e655e..f94ac308 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index 341e655e..cbe91cbd 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index 8eeb3443..3aba9054 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="e6400"
diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
index 8eeb3443..3aba9054 100644
--- a/config/coreboot/e6400nvidia_4mb/target.cfg
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="e6400"
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index 341e655e..f94ac308 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index 341e655e..cbe91cbd 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index 341e655e..f94ac308 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index 341e655e..cbe91cbd 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index 341e655e..47c00abd 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="hp2170p"
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index 341e655e..7152a2a4 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="hp2560p"
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index 341e655e..84e6f6e7 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="hp2570p"
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index a2b3d31f..6f1d4c4f 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
+vcfg="hp8200sff"
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index a2b3d31f..6f1d4c4f 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
+vcfg="hp8200sff"
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index ada696cf..6b25ebbb 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -6,3 +6,4 @@ payload_memtest="y"
 release="n"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
+vcfg="hp820g2"
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index a2b3d31f..dddffd7b 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
+vcfg="ivybridge"
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index 341e655e..cbe91cbd 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index 341e655e..32223f55 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="hp8460pintel"
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index 341e655e..6e6288b3 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="hp8470pintel"
diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg
index 341e655e..9dcf2f82 100644
--- a/config/coreboot/hp8560w_8mb/target.cfg
+++ b/config/coreboot/hp8560w_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="hp8560w"
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index 341e655e..a339e04c 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="hp9470m"
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index a2b3d31f..b8212ffe 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
+vcfg="t1650"
diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index 341e655e..f94ac308 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index 341e655e..f94ac308 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index 341e655e..cbe91cbd 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index b513e2b5..e32d25c1 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
+vcfg="haswell"
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index 341e655e..f94ac308 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index 341e655e..cbe91cbd 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index 341e655e..cbe91cbd 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index b513e2b5..e32d25c1 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
+vcfg="haswell"
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index 341e655e..f94ac308 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg
index 341e655e..cbe91cbd 100644
--- a/config/coreboot/x230_12mb/target.cfg
+++ b/config/coreboot/x230_12mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index 341e655e..cbe91cbd 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg
index 341e655e..cbe91cbd 100644
--- a/config/coreboot/x230t_12mb/target.cfg
+++ b/config/coreboot/x230t_12mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index 341e655e..cbe91cbd 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_seabios_withgrub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/git/bios_extract b/config/git/bios_extract
deleted file mode 100644
index 2b313e83..00000000
--- a/config/git/bios_extract
+++ /dev/null
@@ -1,6 +0,0 @@
-{bios_extract}{
-	rev: 0a7bc1d71735ef97b00dfec0fd54a02fcc5d1bb0
-	loc: bios_extract
-	url: https://review.coreboot.org/bios_extract
-	bkup_url: https://github.com/coreboot/bios_extract/
-}
diff --git a/config/git/bios_extract/pkg.cfg b/config/git/bios_extract/pkg.cfg
new file mode 100644
index 00000000..4b203544
--- /dev/null
+++ b/config/git/bios_extract/pkg.cfg
@@ -0,0 +1,3 @@
+rev="0a7bc1d71735ef97b00dfec0fd54a02fcc5d1bb0"
+url="https://review.coreboot.org/bios_extract"
+bkup_url="https://github.com/coreboot/bios_extract/"
diff --git a/config/git/biosutilities b/config/git/biosutilities
deleted file mode 100644
index bd11c88a..00000000
--- a/config/git/biosutilities
+++ /dev/null
@@ -1,6 +0,0 @@
-{biosutilities}{
-	rev: 03ae0cf0706ede5a2a15da0986c19c776d0e6b26
-	loc: biosutilities
-	url: https://codeberg.org/libreboot/BIOSUtilities
-	bkup_url: https://github.com/platomav/BIOSUtilities
-}
diff --git a/config/git/biosutilities/pkg.cfg b/config/git/biosutilities/pkg.cfg
new file mode 100644
index 00000000..a1c02015
--- /dev/null
+++ b/config/git/biosutilities/pkg.cfg
@@ -0,0 +1,3 @@
+rev="03ae0cf0706ede5a2a15da0986c19c776d0e6b26"
+url="https://codeberg.org/libreboot/BIOSUtilities"
+bkup_url="https://github.com/platomav/BIOSUtilities"
diff --git a/config/git/coreboot b/config/git/coreboot
deleted file mode 100644
index 4b139e19..00000000
--- a/config/git/coreboot
+++ /dev/null
@@ -1,6 +0,0 @@
-{coreboot}{
-	rev: HEAD
-	loc: coreboot/coreboot
-	url: https://review.coreboot.org/coreboot
-	bkup_url: https://github.com/coreboot/coreboot.git
-}
diff --git a/config/git/coreboot/pkg.cfg b/config/git/coreboot/pkg.cfg
new file mode 100644
index 00000000..f4ed31e8
--- /dev/null
+++ b/config/git/coreboot/pkg.cfg
@@ -0,0 +1,3 @@
+rev="HEAD"
+url="https://review.coreboot.org/coreboot"
+bkup_url="https://github.com/coreboot/coreboot.git"
diff --git a/config/git/docs b/config/git/docs
deleted file mode 100644
index 22892a21..00000000
--- a/config/git/docs
+++ /dev/null
@@ -1,6 +0,0 @@
-{docs}{
-	rev: e72d055915c3a9ffe739982946e101b146b2483c
-	loc: docs
-	url: https://codeberg.org/vimuser/untitled
-	bkup_url: https://notabug.org/untitled/untitled
-}
diff --git a/config/git/docs/pkg.cfg b/config/git/docs/pkg.cfg
new file mode 100644
index 00000000..9913ee5f
--- /dev/null
+++ b/config/git/docs/pkg.cfg
@@ -0,0 +1,3 @@
+rev="e72d055915c3a9ffe739982946e101b146b2483c"
+url="https://codeberg.org/vimuser/untitled"
+bkup_url="https://notabug.org/untitled/untitled"
diff --git a/config/git/flashprog b/config/git/flashprog
deleted file mode 100644
index 98a0539b..00000000
--- a/config/git/flashprog
+++ /dev/null
@@ -1,6 +0,0 @@
-{flashprog}{
-	rev: 5b4fdd11dd74c7f018cb04f7a27a2badc02fe182
-	loc: flashprog
-	url: https://review.sourcearcade.org/flashprog
-	bkup_url: https://github.com/SourceArcade/flashprog.git
-}
diff --git a/config/git/flashprog/pkg.cfg b/config/git/flashprog/pkg.cfg
new file mode 100644
index 00000000..ddbd60a2
--- /dev/null
+++ b/config/git/flashprog/pkg.cfg
@@ -0,0 +1,3 @@
+rev="5b4fdd11dd74c7f018cb04f7a27a2badc02fe182"
+url="https://review.sourcearcade.org/flashprog"
+bkup_url="https://github.com/SourceArcade/flashprog.git"
diff --git a/config/git/grub b/config/git/grub
deleted file mode 100644
index 21634cd6..00000000
--- a/config/git/grub
+++ /dev/null
@@ -1,6 +0,0 @@
-{grub}{
-	rev: HEAD
-	loc: grub/grub
-	url: git://git.savannah.gnu.org/grub.git
-	bkup_url: https://codeberg.org/libreboot/grub
-}
diff --git a/config/git/grub/pkg.cfg b/config/git/grub/pkg.cfg
new file mode 100644
index 00000000..ed26a766
--- /dev/null
+++ b/config/git/grub/pkg.cfg
@@ -0,0 +1,3 @@
+rev="HEAD"
+url="git://git.savannah.gnu.org/grub.git"
+bkup_url="https://codeberg.org/libreboot/grub"
diff --git a/config/git/memtest86plus b/config/git/memtest86plus
deleted file mode 100644
index c1f56623..00000000
--- a/config/git/memtest86plus
+++ /dev/null
@@ -1,6 +0,0 @@
-{memtest86plus}{
-	rev: 5dcd424ea7afb857c1171e747ef064d98d26afeb
-	loc: memtest86plus
-	url: https://codeberg.org/libreboot/memtest86plus
-	bkup_url: https://github.com/memtest86plus/memtest86plus.git
-}
diff --git a/config/git/memtest86plus/pkg.cfg b/config/git/memtest86plus/pkg.cfg
new file mode 100644
index 00000000..4bf44294
--- /dev/null
+++ b/config/git/memtest86plus/pkg.cfg
@@ -0,0 +1,3 @@
+rev="5dcd424ea7afb857c1171e747ef064d98d26afeb"
+url="https://codeberg.org/libreboot/memtest86plus"
+bkup_url="https://github.com/memtest86plus/memtest86plus.git"
diff --git a/config/git/pico-sdk b/config/git/pico-sdk
deleted file mode 100644
index 076a8e01..00000000
--- a/config/git/pico-sdk
+++ /dev/null
@@ -1,6 +0,0 @@
-{pico-sdk}{
-	rev: 6a7db34ff63345a7badec79ebea3aaef1712f374
-	loc: pico-sdk
-	url: https://codeberg.org/libreboot/pico-sdk
-	bkup_url: https://github.com/raspberrypi/pico-sdk
-}
diff --git a/config/git/pico-sdk/pkg.cfg b/config/git/pico-sdk/pkg.cfg
new file mode 100644
index 00000000..68b5bca6
--- /dev/null
+++ b/config/git/pico-sdk/pkg.cfg
@@ -0,0 +1,3 @@
+rev="6a7db34ff63345a7badec79ebea3aaef1712f374"
+url="https://codeberg.org/libreboot/pico-sdk"
+bkup_url="https://github.com/raspberrypi/pico-sdk"
diff --git a/config/git/pico-serprog b/config/git/pico-serprog
deleted file mode 100644
index 6d46566b..00000000
--- a/config/git/pico-serprog
+++ /dev/null
@@ -1,7 +0,0 @@
-{pico-serprog}{
-	rev: e75e3a20e63269a5e3189bc2e49a6a81d45a636a
-	loc: pico-serprog
-	url: https://codeberg.org/libreboot/pico-serprog
-	bkup_url: https://git.disroot.org/libreboot/pico-serprog
-	depend: pico-sdk
-}
diff --git a/config/git/pico-serprog/pkg.cfg b/config/git/pico-serprog/pkg.cfg
new file mode 100644
index 00000000..54c5fa44
--- /dev/null
+++ b/config/git/pico-serprog/pkg.cfg
@@ -0,0 +1,4 @@
+rev="e75e3a20e63269a5e3189bc2e49a6a81d45a636a"
+url="https://codeberg.org/libreboot/pico-serprog"
+bkup_url="https://git.disroot.org/libreboot/pico-serprog"
+depend="pico-sdk"
diff --git a/config/git/seabios b/config/git/seabios
deleted file mode 100644
index 62c90d30..00000000
--- a/config/git/seabios
+++ /dev/null
@@ -1,6 +0,0 @@
-{seabios}{
-	rev: HEAD
-	loc: seabios/seabios
-	url: https://review.coreboot.org/seabios
-	bkup_url: https://github.com/coreboot/seabios
-}
diff --git a/config/git/seabios/pkg.cfg b/config/git/seabios/pkg.cfg
new file mode 100644
index 00000000..d8c6932b
--- /dev/null
+++ b/config/git/seabios/pkg.cfg
@@ -0,0 +1,3 @@
+rev="HEAD"
+url="https://review.coreboot.org/seabios"
+bkup_url="https://github.com/coreboot/seabios"
diff --git a/config/git/stm32-vserprog b/config/git/stm32-vserprog
deleted file mode 100644
index 37e901fc..00000000
--- a/config/git/stm32-vserprog
+++ /dev/null
@@ -1,6 +0,0 @@
-{stm32-vserprog}{
-	rev: 8fcf0a4d41800631b571fa7bbd1d8b251f0a2111
-	loc: stm32-vserprog
-	url: https://codeberg.org/libreboot/stm32-vserprog
-	bkup_url: https://git.disroot.org/libreboot/stm32-vserprog
-}
diff --git a/config/git/stm32-vserprog/pkg.cfg b/config/git/stm32-vserprog/pkg.cfg
new file mode 100644
index 00000000..9fb12c63
--- /dev/null
+++ b/config/git/stm32-vserprog/pkg.cfg
@@ -0,0 +1,3 @@
+rev="8fcf0a4d41800631b571fa7bbd1d8b251f0a2111"
+url="https://codeberg.org/libreboot/stm32-vserprog"
+bkup_url="https://git.disroot.org/libreboot/stm32-vserprog"
diff --git a/config/git/u-boot b/config/git/u-boot
deleted file mode 100644
index 4057c089..00000000
--- a/config/git/u-boot
+++ /dev/null
@@ -1,6 +0,0 @@
-{u-boot}{
-	rev: HEAD
-	loc: u-boot/u-boot
-	url: https://source.denx.de/u-boot/u-boot.git
-	bkup_url: https://github.com/u-boot/u-boot.git
-}
diff --git a/config/git/u-boot/pkg.cfg b/config/git/u-boot/pkg.cfg
new file mode 100644
index 00000000..e65ad63a
--- /dev/null
+++ b/config/git/u-boot/pkg.cfg
@@ -0,0 +1,3 @@
+rev="HEAD"
+url="https://source.denx.de/u-boot/u-boot.git"
+bkup_url="https://github.com/u-boot/u-boot.git"
diff --git a/config/git/uefitool b/config/git/uefitool
deleted file mode 100644
index e3ced920..00000000
--- a/config/git/uefitool
+++ /dev/null
@@ -1,6 +0,0 @@
-{uefitool}{
-	rev: 4a41c33596e9bc3ae812e763965d91ac57553e02
-	loc: uefitool
-	url: https://codeberg.org/libreboot/UEFITool
-	bkup_url: https://github.com/LongSoft/UEFITool
-}
diff --git a/config/git/uefitool/pkg.cfg b/config/git/uefitool/pkg.cfg
new file mode 100644
index 00000000..1602e6be
--- /dev/null
+++ b/config/git/uefitool/pkg.cfg
@@ -0,0 +1,3 @@
+rev="4a41c33596e9bc3ae812e763965d91ac57553e02"
+url="https://codeberg.org/libreboot/UEFITool"
+bkup_url="https://github.com/LongSoft/UEFITool"
diff --git a/config/vendor/e6400/pkg.cfg b/config/vendor/e6400/pkg.cfg
new file mode 100644
index 00000000..5274f51b
--- /dev/null
+++ b/config/vendor/e6400/pkg.cfg
@@ -0,0 +1,5 @@
+E6400_VGA_DL_hash="6217d5fce2291d15bb0649fd2faaeb78e4c48962b07a2bea6af60466bfdc5f233af0d077c2c6e71dd96047bdbb1f612324cef0a5e728ba9a9ec5c69a4022cd8d"
+E6400_VGA_DL_url="https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe"
+E6400_VGA_DL_url_bkup="https://web.archive.org/web/20230506014903/https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe"
+E6400_VGA_offset="274451"
+E6400_VGA_romname="mod_21.bin"
diff --git a/config/vendor/haswell/pkg.cfg b/config/vendor/haswell/pkg.cfg
new file mode 100644
index 00000000..d43fab3c
--- /dev/null
+++ b/config/vendor/haswell/pkg.cfg
@@ -0,0 +1,3 @@
+DL_hash="f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe"
+DL_url_bkup="https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe"
diff --git a/config/vendor/hp2170p/pkg.cfg b/config/vendor/hp2170p/pkg.cfg
new file mode 100644
index 00000000..71c4d637
--- /dev/null
+++ b/config/vendor/hp2170p/pkg.cfg
@@ -0,0 +1,6 @@
+DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+EC_hash="940e533b6a276c13a6e46a93795ca84b19877b05e82c0c1795b7fea9cbea63c28e606ef994352fc77c4fdfb2e0c31c5edeefa98b989e1990364dfc6417b25460"
+EC_url="https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96088.exe"
+EC_url_bkup="https://web.archive.org/web/20230909164345/https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96088.exe"
diff --git a/config/vendor/hp2560p/pkg.cfg b/config/vendor/hp2560p/pkg.cfg
new file mode 100644
index 00000000..21d00424
--- /dev/null
+++ b/config/vendor/hp2560p/pkg.cfg
@@ -0,0 +1,6 @@
+DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3"
+DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
+DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
+EC_hash="a602cc7627c569bc423a5857cf506fbc3bcd68cb6b43a7c1b99d12a569b4107c412748cf49605ef4d5b930eb14b6815c4d1b1dc20145fe9d707e445fc201cea2"
+EC_url="https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85526.exe"
+EC_url_bkup="https://web.archive.org/web/20230416125725/https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85526.exe"
diff --git a/config/vendor/hp2570p/pkg.cfg b/config/vendor/hp2570p/pkg.cfg
new file mode 100644
index 00000000..de7f768e
--- /dev/null
+++ b/config/vendor/hp2570p/pkg.cfg
@@ -0,0 +1,6 @@
+DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+EC_hash="61ed284bdf938c5f36ad3267263fb3963a6608339425bc41aaef3ab0cd98f07c998d816b0233735ca35dc6cb771257da3f09a40d5cfc96bb6388b4366348275e"
+EC_url="https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96085.exe"
+EC_url_bkup="https://web.archive.org/web/20230610174558/https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96085.exe"
diff --git a/config/vendor/hp8200sff/pkg.cfg b/config/vendor/hp8200sff/pkg.cfg
new file mode 100644
index 00000000..079bd0be
--- /dev/null
+++ b/config/vendor/hp8200sff/pkg.cfg
@@ -0,0 +1,3 @@
+DL_hash="8fcb691bf84dc1feefc3c84f7cc59eadaabb200477bb3ecba1b050f23f133b0a8c2539015a523f676544c2dff64599bcba7e844e8c31757b90d70bb4485b5664"
+DL_url="https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe"
+DL_url_bkup="https://web.archive.org/web/20220708171920/https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe"
diff --git a/config/vendor/hp820g2/pkg.cfg b/config/vendor/hp820g2/pkg.cfg
new file mode 100644
index 00000000..3a95b5ea
--- /dev/null
+++ b/config/vendor/hp820g2/pkg.cfg
@@ -0,0 +1,9 @@
+DL_hash="1ac05a3e4f46426eeb77f89c4aca25ed1ad64479d8fcba6a3ab63a944512bacbc5d148cc7b9c4ff4b8c90a1fb1de4776e46f14aca8021900e0df37246aa0b717"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe"
+DL_url_bkup="https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe"
+MRC_url="https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip"
+MRC_url_bkup="https://web.archive.org/web/20220310155922/https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip"
+MRC_hash="3ff1599c52539f0707a07a8664a84ce51cd3fed1569df4bb7aa6722fc8dec0af1754250333b6ca1a9794d970a4de7b29a5cf2499f5b61e4c3eab64d1314aaea9"
+MRC_board="samus"
+MRC_refcode_cbtree="coreboot413"
+MRC_refcode_gbe="131253"
diff --git a/config/vendor/hp8460pintel/pkg.cfg b/config/vendor/hp8460pintel/pkg.cfg
new file mode 100644
index 00000000..d818a00b
--- /dev/null
+++ b/config/vendor/hp8460pintel/pkg.cfg
@@ -0,0 +1,6 @@
+DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3"
+DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
+DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
+EC_hash="9be5511d7ba07a376583cbd0b7fa4d7dff87ebc94b78d489fd62a14cb7f61eac99670e6a10ce374fe8e3c4bdafabbd1edce7774c3a482c15c2d4207b74ea49ed"
+EC_url="https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85528.exe"
+EC_url_bkup="https://web.archive.org/web/20211231004901/https://ftp.ext.hp.com/pub/softpaq/sp85501-86000/sp85528.exe"
diff --git a/config/vendor/hp8470pintel/pkg.cfg b/config/vendor/hp8470pintel/pkg.cfg
new file mode 100644
index 00000000..3dce5557
--- /dev/null
+++ b/config/vendor/hp8470pintel/pkg.cfg
@@ -0,0 +1,6 @@
+DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+EC_hash="b95c9cf909ed537fb448e2be69eddcb57459efbaf0a979a73cd2bce90a7014b110f4dbbeecfd596c072636396b8f20c229c59ffe34e45500ce9edb000c6ccaf9"
+EC_url="https://ftp.hp.com/pub/softpaq/sp77501-78000/sp77818.exe"
+EC_url_bkup="https://web.archive.org/web/20230909173821/https://ftp.hp.com/pub/softpaq/sp77501-78000/sp77818.exe"
diff --git a/config/vendor/hp8560w/pkg.cfg b/config/vendor/hp8560w/pkg.cfg
new file mode 100644
index 00000000..b9dc94c5
--- /dev/null
+++ b/config/vendor/hp8560w/pkg.cfg
@@ -0,0 +1,6 @@
+DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3"
+DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
+DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
+EC_hash="8e2bc5dca1a1cf0cfc1ac9df74eb6fda333f8ae560019f8182a49d3a716d72938f6cde4aa5ee56942def08207d3ef95706653bd238768fd029da43e9a4fbcc67"
+EC_url="https://ftp.hp.com/pub/softpaq/sp78001-78500/sp78085.exe"
+EC_url_bkup="https://web.archive.org/web/20230402085323/https://ftp.hp.com/pub/softpaq/sp78001-78500/sp78085.exe"
diff --git a/config/vendor/hp9470m/pkg.cfg b/config/vendor/hp9470m/pkg.cfg
new file mode 100644
index 00000000..756e64bf
--- /dev/null
+++ b/config/vendor/hp9470m/pkg.cfg
@@ -0,0 +1,6 @@
+DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+EC_hash="563422bf5420da18b89439f28a38ea28a175f0ad3588f0f5ea39b08dfdd14c8d513cbf11c2125ec3869fc3b7222c7dc3d111415185ea9b73f41410b1b57f13bd"
+EC_url="https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96090.exe"
+EC_url_bkup="http://web.archive.org/web/20220504072602/https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96090.exe"
diff --git a/config/vendor/ivybridge/pkg.cfg b/config/vendor/ivybridge/pkg.cfg
new file mode 100644
index 00000000..92b1eb43
--- /dev/null
+++ b/config/vendor/ivybridge/pkg.cfg
@@ -0,0 +1,3 @@
+DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
diff --git a/config/vendor/sandybridge/pkg.cfg b/config/vendor/sandybridge/pkg.cfg
new file mode 100644
index 00000000..34add8d3
--- /dev/null
+++ b/config/vendor/sandybridge/pkg.cfg
@@ -0,0 +1,3 @@
+DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3"
+DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
+DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
diff --git a/config/vendor/sources b/config/vendor/sources
deleted file mode 100644
index 2096af54..00000000
--- a/config/vendor/sources
+++ /dev/null
@@ -1,166 +0,0 @@
-# This file holds the download sources for various intel blobs
-# board shortnames are listed and enclosed by '{}' followed by an opening
-# and closing '{}' for all blobs available for the board.
-# The board shortname must be the name of the board minus the trailing rom size.
-# If you want to make additions, try to add a backup url for download links and 
-# list hashes as sha1 sums.
-
-# NOTE: this file now defines checksums as sha512 (of the sha-2 family),
-# where previously we used 160-bit SHA-1 algorithm; SHA-1 is not secure,
-# having demonstrated collisions, so we have switched to using sha512sum
-
-{x230 x230t x230i t430 t530 w530}{
-	DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
-	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-	DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-}
-
-{x220 x220t t420 t520 t420s}{
-	DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
-	DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-	DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-}
-
-# NOTE: google's manifest for archives containing mrc.bin, used here:
-# https://web.archive.org/web/20210211071412/https://dl.google.com/dl/edgedl/chromeos/recovery/recovery.conf
-{t440plibremrc w541 dell9020sff_nri dell9020mt_nri}{
-	DL_hash f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998
-	DL_url https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
-	DL_url_bkup https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
-}
-
-# broadwell mrc, and use me10 plus broadwell refcode
-{hp820g2}{
-	DL_hash 1ac05a3e4f46426eeb77f89c4aca25ed1ad64479d8fcba6a3ab63a944512bacbc5d148cc7b9c4ff4b8c90a1fb1de4776e46f14aca8021900e0df37246aa0b717
-	DL_url https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe
-	DL_url_bkup https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe
-	MRC_url https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip
-	MRC_url_bkup https://web.archive.org/web/20220310155922/https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip
-	MRC_hash 3ff1599c52539f0707a07a8664a84ce51cd3fed1569df4bb7aa6722fc8dec0af1754250333b6ca1a9794d970a4de7b29a5cf2499f5b61e4c3eab64d1314aaea9
-	MRC_board samus
-	MRC_refcode_cbtree coreboot413
-	MRC_refcode_gbe 131253
-}
-
-{hp8200sff}{
-	DL_hash 8fcb691bf84dc1feefc3c84f7cc59eadaabb200477bb3ecba1b050f23f133b0a8c2539015a523f676544c2dff64599bcba7e844e8c31757b90d70bb4485b5664
-	DL_url https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe
-	DL_url_bkup https://web.archive.org/web/20220708171920/https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe
-}
-
-{hp8300usdt hp8300cmt}{
-	DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
-	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-	DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-}
-
-{hp2560p}{
-	DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
-	DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-	DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-
-	EC_hash a602cc7627c569bc423a5857cf506fbc3bcd68cb6b43a7c1b99d12a569b4107c412748cf49605ef4d5b930eb14b6815c4d1b1dc20145fe9d707e445fc201cea2
-	EC_url https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85526.exe
-	EC_url_bkup https://web.archive.org/web/20230416125725/https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85526.exe
-}
-
-{hp2570p}{
-	DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
-	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-	DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-
-	EC_hash 61ed284bdf938c5f36ad3267263fb3963a6608339425bc41aaef3ab0cd98f07c998d816b0233735ca35dc6cb771257da3f09a40d5cfc96bb6388b4366348275e
-	EC_url https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96085.exe
-	EC_url_bkup https://web.archive.org/web/20230610174558/https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96085.exe
-}
-
-{hp9470m}{
-	DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
-	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-	DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-
-	EC_hash 563422bf5420da18b89439f28a38ea28a175f0ad3588f0f5ea39b08dfdd14c8d513cbf11c2125ec3869fc3b7222c7dc3d111415185ea9b73f41410b1b57f13bd
-	EC_url https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96090.exe
-	EC_url_bkup http://web.archive.org/web/20220504072602/https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96090.exe
-}
-
-{hp2170p}{
-	DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
-	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-	DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-
-	EC_hash 940e533b6a276c13a6e46a93795ca84b19877b05e82c0c1795b7fea9cbea63c28e606ef994352fc77c4fdfb2e0c31c5edeefa98b989e1990364dfc6417b25460
-	EC_url https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96088.exe
-	EC_url_bkup https://web.archive.org/web/20230909164345/https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96088.exe
-}
-
-{t1650}{
-	DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
-	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-	DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-
-	SCH5545EC_DL_url https://dl.dell.com/FOLDER05065992M/1/T1650A28.exe
-	SCH5545EC_DL_url_bkup https://web.archive.org/web/20230811151654/https://dl.dell.com/FOLDER05065992M/1/T1650A28.exe
-	SCH5545EC_DL_hash 18261d0f7f27e9de3b0b5a25019b9a934ef1a61cd3f0140e34f38553695e91e671e227a8fa962774edceab5c7804d13ed9fe1c518c5643c7c8f15632f903a6c4
-}
-
-# 68SCF and 68SCE family ROM
-# for 8460p, 8460w, 6460b, 8560p, 6560b, 6360b
-# release notes: https://support.hp.com/soar-attachment/858/col37737-ob-206569-2-ob-206569-2_sp85528_releasedoc.html
-{hp8460pintel}{
-	DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
-	DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-	DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-
-	EC_hash 9be5511d7ba07a376583cbd0b7fa4d7dff87ebc94b78d489fd62a14cb7f61eac99670e6a10ce374fe8e3c4bdafabbd1edce7774c3a482c15c2d4207b74ea49ed
-	EC_url https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85528.exe
-	EC_url_bkup https://web.archive.org/web/20211231004901/https://ftp.ext.hp.com/pub/softpaq/sp85501-86000/sp85528.exe
-}
-
-# 68SVD family ROM
-# for 8560w
-# release notes: https://support.hp.com/soar-attachment/519/col44309-ob-185196-2-ob-185196-2_sp78085_releasedoc.html
-{hp8560w}{
-	DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
-	DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-	DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-
-	EC_hash 8e2bc5dca1a1cf0cfc1ac9df74eb6fda333f8ae560019f8182a49d3a716d72938f6cde4aa5ee56942def08207d3ef95706653bd238768fd029da43e9a4fbcc67
-	EC_url https://ftp.hp.com/pub/softpaq/sp78001-78500/sp78085.exe
-	EC_url_bkup https://web.archive.org/web/20230402085323/https://ftp.hp.com/pub/softpaq/sp78001-78500/sp78085.exe
-}
-
-# 68ICE or 68ICF family ROM
-# for 8470p, 8470w, 6470b, 8570p, 6570b
-# release notes: https://support.hp.com/soar-attachment/1021/col43350-ob-229442-2-ob-229442-2_sp96091_releasedoc.html
-{hp8470pintel}{
-	DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
-	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-	DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-
-	EC_hash b95c9cf909ed537fb448e2be69eddcb57459efbaf0a979a73cd2bce90a7014b110f4dbbeecfd596c072636396b8f20c229c59ffe34e45500ce9edb000c6ccaf9
-	EC_url https://ftp.hp.com/pub/softpaq/sp77501-78000/sp77818.exe
-	EC_url_bkup https://web.archive.org/web/20230909173821/https://ftp.hp.com/pub/softpaq/sp77501-78000/sp77818.exe
-}
-
-# nvidia vga option rom for dgpu models of Dell Latitude E6400
-# for downloading the nvidia rom to pciroms/pci10de,06eb.rom
-{e6400 e6400nvidia}{
-	E6400_VGA_DL_hash 6217d5fce2291d15bb0649fd2faaeb78e4c48962b07a2bea6af60466bfdc5f233af0d077c2c6e71dd96047bdbb1f612324cef0a5e728ba9a9ec5c69a4022cd8d
-	E6400_VGA_DL_url https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe
-	E6400_VGA_DL_url_bkup https://web.archive.org/web/20230506014903/https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe
-	E6400_VGA_offset 274451
-	E6400_VGA_romname mod_21.bin
-}
-
-{e5420 e5520 e6420 e6520}{
-	DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
-	DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-	DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-}
-
-{e6430 e6530 e5530}{
-	DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
-	DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-	DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-}
diff --git a/config/vendor/t1650/pkg.cfg b/config/vendor/t1650/pkg.cfg
new file mode 100644
index 00000000..e4a49126
--- /dev/null
+++ b/config/vendor/t1650/pkg.cfg
@@ -0,0 +1,6 @@
+DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+SCH5545EC_DL_url="https://dl.dell.com/FOLDER05065992M/1/T1650A28.exe"
+SCH5545EC_DL_url_bkup="https://web.archive.org/web/20230811151654/https://dl.dell.com/FOLDER05065992M/1/T1650A28.exe"
+SCH5545EC_DL_hash="18261d0f7f27e9de3b0b5a25019b9a934ef1a61cd3f0140e34f38553695e91e671e227a8fa962774edceab5c7804d13ed9fe1c518c5643c7c8f15632f903a6c4"
diff --git a/include/git.sh b/include/git.sh
index e2fd2129..a10fb014 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -31,10 +31,8 @@ fetch_config()
 
 load_target_config()
 {
-	[ -f "$cfgsdir/$1/target.cfg" ] || $err "$1: target.cfg missing"
 	[ -f "$cfgsdir/$1/seen" ] && $err "$_xm cfg: infinite loop in trees"
-
-	. "$cfgsdir/$1/target.cfg" || $err "load_target_config !$cfgsdir/$1"
+	eval `setcfg "$cfgsdir/$1/target.cfg"`
 	touch "$cfgsdir/$1/seen" || $err "load_config $cfgsdir/$1: !mk seen"
 }
 
@@ -50,9 +48,9 @@ prepare_new_tree()
 fetch_project_repo()
 {
 	eval "$(setvars "" xtree tree_depend)"
+	eval `setcfg "config/git/$project/pkg.cfg"`
 
-	scan_config "$project" "config/git"
-	chkvars loc url
+	chkvars url
 
 	[ -n "$xtree" ] && [ ! -d "src/coreboot/$xtree" ] && \
 		x_ ./update trees -f coreboot "$xtree"
@@ -63,14 +61,14 @@ fetch_project_repo()
 	clone_project
 
 	for x in config/git/*; do
-		[ -f "$x" ] && nuke "${x##*/}" "src/${x##*/}" 2>/dev/null
-	done
+		[ -d "$x" ] && nuke "${x##*/}" "src/${x##*/}" 2>/dev/null
+	done; return 0
 }
 
 clone_project()
 {
-	loc="${loc#src/}"
-	loc="src/$loc"
+	loc="src/$project"
+	singletree "$project" || loc="src/$project/$project"
 
 	printf "Downloading project '%s' to '%s'\n" "$project" "$loc"
 	e "$loc" d && return 0
diff --git a/include/lib.sh b/include/lib.sh
index 2fc17cfe..3e137d63 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -60,9 +60,7 @@ read -r projectsite < projectsite || :
 install_packages()
 {
 	[ $# -lt 2 ] && badcmd "fewer than two arguments"
-	[ -f "config/dependencies/$2" ] || badcmd "unsupported target"
-
-	. "config/dependencies/$2" || $err "! . config/dependencies/$2"
+	eval `setcfg "config/dependencies/$2"`
 
 	$pkg_add $pkglist || $err "Cannot install packages"
 
@@ -127,25 +125,6 @@ done
 relname="$projectname-$version"
 export LOCALVERSION="-$projectname-${version%%-*}"
 
-scan_config()
-{
-	awkstr=" /\{.*$1.*}{/ {flag=1;next} /\}/{flag=0} flag { print }"
-	confdir="$2"
-	revfile="$(mktemp -t sources.XXXXXXXXXX)"
-	cat "$confdir/"* > "$revfile" || $err "$confdir: can't cat files"
-	while read -r line ; do
-		set $line 1>/dev/null 2>/dev/null || :
-		if [ "${1%:}" = "depend" ]; then
-			depend="$depend $2"
-		else
-			eval "${1%:}=\"$2\""
-		fi
-	done << EOF
-	$(eval "awk '$awkstr' \"$revfile\"")
-EOF
-	rm -f "$revfile" || $err "scan_config: Cannot remove tmpfile"
-}
-
 check_defconfig()
 {
 	[ -d "$1" ] || $err "Target '$1' not defined."
@@ -253,3 +232,14 @@ cbfs()
 	lzma="-c lzma" && [ $# -gt 3 ] && lzma="-t raw"
 	x_ "$cbfstool" "$1" $ccmd -f "$2" -n "$3" $lzma
 }
+
+setcfg()
+{
+	if [ $# -gt 1 ]; then
+		printf "e \"%s\" f missing && return %s;\n" "$1" "$2"
+	else
+		printf "e \"%s\" f missing && %s \"Missing config\";\n" "$1" \
+		    "$err"
+	fi
+	printf ". \"%s\" || %s \"Could not read config\";\n" "$1" "$err"
+}
diff --git a/include/vendor.sh b/include/vendor.sh
index d7ecd55d..c8512337 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -14,7 +14,7 @@ vendir="vendorfiles"
 appdir="$vendir/app"
 cbcfgsdir="config/coreboot"
 
-eval "$(setvars "" _b EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe \
+eval "$(setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
     E6400_VGA_romname CONFIG_HAVE_MRC SCH5545EC_DL_url_bkup SCH5545EC_DL_hash \
     mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl SCH5545EC_DL_url \
@@ -24,29 +24,27 @@ eval "$(setvars "" _b EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe \
     CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_KBC1126_FW1 release DL_url \
     CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE nukemode \
     CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB cbfstoolref \
-    CONFIG_REFCODE_BLOB_FILE)"
+    CONFIG_REFCODE_BLOB_FILE vcfg)"
 
 vendor_download()
 {
 	export PATH="$PATH:/sbin"
 
 	[ $# -gt 0 ] || $err "No argument given"
-	board="$1"
-	_b="${board%%_*mb}" # shorthand (no duplication per rom size)
-	boarddir="$cbcfgsdir/$board" && getcfg && scan_config "$_b" \
-	    "config/vendor" && bootstrap && getfiles; return 0
+	board="$1"; boarddir="$cbcfgsdir/$board"
+	getcfg && bootstrap && getfiles; return 0
 }
 
 getcfg()
 {
-	[ -d "$boarddir" ] || $err "Target '$board' not defined."
+	eval `setcfg "$boarddir/target.cfg"`
+
+	[ -z "$vcfg" ] && printf "%s: vcfg unset\n" "$board" 1>&2 && return 1
+
 	check_defconfig "$boarddir" 1>"$tmpdir/vendorcfg.list" && return 1
 	while read -r cbcfgfile; do
-		set +u +e
-		. "$cbcfgfile" 2>/dev/null
-		set -u -e
+		set +u +e; . "$cbcfgfile" 2>/dev/null; set -u -e
 	done < "$tmpdir/vendorcfg.list"
-	. "$boarddir/target.cfg" 2>/dev/null
 
 	[ -z "$tree" ] && $err "getcfg $boarddir: tree undefined"
 	cbdir="src/coreboot/$tree"
@@ -58,9 +56,10 @@ getcfg()
 	for c in CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
 	    CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW; do
 		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
-		eval "[ -z \"\${$c}\" ] || return 0"
+		eval "[ -z \"\${$c}\" ] && continue"
+		eval `setcfg "config/vendor/$vcfg/pkg.cfg"`; return 0
 	done
-	printf "Vendor files not needed for: %s\n" "$board" 1>&2 && return 1
+	printf "Vendor files not needed for: %s\n" "$board" 1>&2; return 1
 }
 
 bootstrap()
@@ -274,10 +273,7 @@ check_board()
 	fi
 
 	boarddir="$cbcfgsdir/$board"
-	[ -d "$boarddir" ] || $err "check_board: board $board missing"
-	[ -f "$boarddir/target.cfg" ] || \
-		$err "check_board $board: target.cfg missing"
-	. "$boarddir/target.cfg" 2>/dev/null
+	eval `setcfg "$boarddir/target.cfg"`
 	[ -z "$tree" ] && $err "check_board $board: tree undefined"; return 0
 }
 
diff --git a/script/roms b/script/roms
index 457a1baa..5cd8b66b 100755
--- a/script/roms
+++ b/script/roms
@@ -91,10 +91,9 @@ configure_target()
 	board="$1"
 
 	targetdir="$cfgsdir/$board"
-	[ -f "$targetdir/target.cfg" ] || $err "$board: target.cfg missing"
 
 	# Override the above defaults using target.cfg
-	. "$targetdir/target.cfg"
+	eval `setcfg "$targetdir/target.cfg"`
 
 	[ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata"
 
diff --git a/script/trees b/script/trees
index b2b1e561..6a3c1ebd 100755
--- a/script/trees
+++ b/script/trees
@@ -35,7 +35,7 @@ main()
 	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
 	[ -z "$project" ] && $err "project name not specified"
 
-	[ -f "config/git/$project" ] || $err "project '$project' not defined"
+	[ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined"
 
 	elfdir="elf/$project"
 	datadir="config/data/$project"
@@ -154,9 +154,7 @@ load_project_config()
 {
 	eval "$(setvars "" xarch xlang tree bootstrapargs autoconfargs xtree \
 	    tree_depend makeargs)"
-
-	[ -f "$1/target.cfg" ] || return 0
-	. "$1/target.cfg" || $err "loadp $1: can't load target.cfg"; return 0
+	eval `setcfg "$1/target.cfg" 0`; return 0
 }
 
 check_cross_compiler()
@@ -274,15 +272,12 @@ check_makefile()
 
 mkpayload_grub()
 {
-	[ -f "$grubdata/module/$tree" ] || $err "$tree: grub modules missing"
-	x_ rm -f "$cdir/grub.elf"
-
 	eval "$(setvars "" grub_modules grub_install_modules)"
-
-	. "$grubdata/module/$tree" || $err "$tree: !source grub modules"
-
+	eval `setcfg "$grubdata/module/$tree"`
 	chkvars "grub_install_modules" "grub_modules"
 
+	x_ rm -f "$cdir/grub.elf"
+
 	"${cdir}/grub-mkstandalone" --grub-mkimage="${cdir}/grub-mkimage" \
 	    -O i386-coreboot -o "${cdir}/grub.elf" -d "${cdir}/grub-core/" \
 	    --fonts= --themes= --locales=  --modules="$grub_modules" \
@@ -290,7 +285,7 @@ mkpayload_grub()
 	    "/boot/grub/grub_default.cfg=${cdir}/.config" \
 	    "/boot/grub/grub.cfg=$grubdata/memdisk.cfg" \
 	    "/background.png=$grubdata/background/background1280x800.png" || \
-	    $err "$tree: cannot build grub.elf"
+	    $err "$tree: cannot build grub.elf"; return 0
 }
 
 copy_elf()

From c1527b6114e94530c50b00ff22ef03ea048e4bd1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 22 Jun 2024 03:55:04 +0100
Subject: [PATCH 0601/1549] lib.sh: remove badcmd()

it's bloat. telling the user to rtfm is something that
we already do on irc; they will still ask how to do
everything, and ignore the message from badcmd(), or
they will automatically know to rtfm.

i'm on a massive purge, removing bloat from lbmk as
part of Libreboot Build System Audit 6.

all bloat must go.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build          |  8 ++++----
 include/lib.sh | 11 +----------
 script/roms    |  5 +++--
 script/trees   |  2 +-
 4 files changed, 9 insertions(+), 17 deletions(-)

diff --git a/build b/build
index d3e86519..dbe7487d 100755
--- a/build
+++ b/build
@@ -21,7 +21,7 @@ err="fail"
 
 main()
 {
-	[ $# -lt 1 ] && badcmd
+	[ $# -lt 1 ] && $err "bad command"
 	spath="script/$1"
 
 	for g in "which git" "git config --global user.name" \
@@ -35,7 +35,7 @@ main()
 	inject) shift 1; vendor_inject $@ ;;
 	download) shift 1; vendor_download $@ ;;
 	*)
-		[ -f "$spath" ] || badcmd
+		[ -f "$spath" ] || $err "bad command"
 		shift 1; "$spath" $@ || $err "excmd: $spath $@" ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
@@ -60,11 +60,11 @@ mkrelease()
 
 	vdir="release"
 	while getopts d:m: option; do
-		[ -z "$OPTARG" ] && badcmd "empty argument not allowed"
+		[ -z "$OPTARG" ] && $err "empty argument not allowed"
 		case "$option" in
 		d) vdir="$OPTARG" ;;
 		m) mode="$OPTARG" ;;
-		*) badcmd "invalid option '-$option'" ;;
+		*) $err "invalid option '-$option'" ;;
 		esac
 	done
 
diff --git a/include/lib.sh b/include/lib.sh
index 3e137d63..c7c0c38d 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -19,15 +19,6 @@ tmpgit="$PWD/tmp/gitclone"
 grubdata="config/data/grub"
 err="err_"
 
-badcmd()
-{
-	errmsg="Bad command"
-	[ $# -gt 0 ] && errmsg="Bad command ($1)"
-
-	dstr="See $projectname build system docs: ${projectsite}docs/maintain/"
-	[ -d "docs" ] && dstr="$dstr (local docs available via docs/)"
-	$err "$errmsg. $dstr"
-}
 err_()
 {
 	printf "ERROR %s: %s\n" "$0" "$1" 1>&2
@@ -59,7 +50,7 @@ read -r projectsite < projectsite || :
 
 install_packages()
 {
-	[ $# -lt 2 ] && badcmd "fewer than two arguments"
+	[ $# -lt 2 ] && $err "fewer than two arguments"
 	eval `setcfg "config/dependencies/$2"`
 
 	$pkg_add $pkglist || $err "Cannot install packages"
diff --git a/script/roms b/script/roms
index 5cd8b66b..7b6f8685 100755
--- a/script/roms
+++ b/script/roms
@@ -33,8 +33,9 @@ main()
 {
 	while [ $# -gt 0 ]; do
 		if [ "$1" = "serprog" ]; then
-			[ $# -lt 2 ] && badcmd "serprog type not set"
-			[ "$2" != "rp2040" ] && [ "$2" != "stm32" ] && badcmd
+			[ $# -lt 2 ] && $err "serprog type not set"
+			[ "$2" != "rp2040" ] && [ "$2" != "stm32" ] && \
+			    $err "invalid serprog type"
 			eval "x_ ./update trees -f \"\${${2}src##*/}\""
 			ser="$2" && shift 2 && continue
 		fi
diff --git a/script/trees b/script/trees
index 6a3c1ebd..82c3ce84 100755
--- a/script/trees
+++ b/script/trees
@@ -28,7 +28,7 @@ main()
 		-s) mode="savedefconfig" ;;
 		-l) mode="olddefconfig" ;;
 		-n) mode="nconfig" ;;
-		*) badcmd "invalid option '-$option'" ;;
+		*) $err "invalid option '-$option'" ;;
 		esac
 		shift; project="${OPTARG#src/}"; shift
 	done

From d4d5d2902c020419057d63c9791804906a6c60dd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 22 Jun 2024 04:06:07 +0100
Subject: [PATCH 0602/1549] use backticks on eval commands, not subshells

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             |  4 ++--
 include/git.sh    | 12 ++++++------
 include/lib.sh    |  4 ++--
 include/mrc.sh    |  2 +-
 include/vendor.sh |  6 +++---
 script/roms       | 13 +++++++------
 script/trees      | 10 +++++-----
 7 files changed, 26 insertions(+), 25 deletions(-)

diff --git a/build b/build
index dbe7487d..ef5a1109 100755
--- a/build
+++ b/build
@@ -16,7 +16,7 @@ fi
 . "include/vendor.sh"
 . "include/mrc.sh"
 
-eval "$(setvars "" vdir src_dirname srcdir _xm mode xp)"
+eval `setvars "" vdir src_dirname srcdir _xm mode xp`
 err="fail"
 
 main()
@@ -45,7 +45,7 @@ git_init()
 {
 	[ -L ".git" ] && return 1
 	[ -e ".git" ] && return 0
-	eval "$(setvars "$(date -Rud @$versiondate)" cdate _nogit)"
+	eval `setvars "$(date -Rud @$versiondate)" cdate _nogit`
 
 	git init || return 1
 	git add -A . || return 1
diff --git a/include/git.sh b/include/git.sh
index a10fb014..0c2e816c 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -2,8 +2,8 @@
 # Copyright (c) 2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
-eval "$(setvars "" _target rev _xm loc url bkup_url depend tree_depend xtree \
-    mdir subhash subrepo subrepo_bkup subfile subfile_bkup)"
+eval `setvars "" _target rev _xm loc url bkup_url depend tree_depend xtree \
+    mdir subhash subrepo subrepo_bkup subfile subfile_bkup`
 
 fetch_project_trees()
 {
@@ -17,9 +17,9 @@ fetch_project_trees()
 fetch_config()
 {
 	rm -f "$cfgsdir/"*/seen || $err "fetch_config $cfgsdir: !rm seen"
-	eval "$(setvars "" xtree tree_depend)"
+	eval `setvars "" xtree tree_depend`
 	while true; do
-		eval "$(setvars "" rev tree)"
+		eval `setvars "" rev tree`
 		_xm="fetch_config $project/$_target"
 		load_target_config "$_target"
 		[ "$_target" = "$tree" ] && break
@@ -47,7 +47,7 @@ prepare_new_tree()
 
 fetch_project_repo()
 {
-	eval "$(setvars "" xtree tree_depend)"
+	eval `setvars "" xtree tree_depend`
 	eval `setcfg "config/git/$project/pkg.cfg"`
 
 	chkvars url
@@ -111,7 +111,7 @@ prep_submodules()
 fetch_submodule()
 {
 	mcfgdir="$mdir/${1##*/}"
-	eval $(setvars "" subhash subrepo subrepo_bkup subfile subfile_bkup st)
+	eval `setvars "" subhash subrepo subrepo_bkup subfile subfile_bkup st`
 	[ ! -f "$mcfgdir/module.cfg" ] || . "$mcfgdir/module.cfg" || \
 	    $err "! . $mcfgdir/module.cfg"
 
diff --git a/include/lib.sh b/include/lib.sh
index c7c0c38d..c62bf98f 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -42,8 +42,8 @@ chkvars()
 	done
 }
 
-eval "$(setvars "" xbmk_release tmpdir _nogit version board boarddir relname \
-    versiondate threads projectname projectsite aur_notice cfgsdir datadir)"
+eval `setvars "" xbmk_release tmpdir _nogit version board boarddir relname \
+    versiondate threads projectname projectsite aur_notice cfgsdir datadir`
 
 read -r projectname < projectname || :
 read -r projectsite < projectsite || :
diff --git a/include/mrc.sh b/include/mrc.sh
index fddaef5d..2e00d9f9 100755
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -4,7 +4,7 @@
 # Modifications in this version are Copyright 2021, 2023 and 2024 Leah Rowe.
 # Original copyright detailed in repo: https://review.coreboot.org/coreboot/
 
-eval "$(setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL)"
+eval `setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL`
 
 extract_mrc()
 {
diff --git a/include/vendor.sh b/include/vendor.sh
index c8512337..949ffc48 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -14,7 +14,7 @@ vendir="vendorfiles"
 appdir="$vendir/app"
 cbcfgsdir="config/coreboot"
 
-eval "$(setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe \
+eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
     E6400_VGA_romname CONFIG_HAVE_MRC SCH5545EC_DL_url_bkup SCH5545EC_DL_hash \
     mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl SCH5545EC_DL_url \
@@ -24,7 +24,7 @@ eval "$(setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe \
     CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_KBC1126_FW1 release DL_url \
     CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE nukemode \
     CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB cbfstoolref \
-    CONFIG_REFCODE_BLOB_FILE vcfg)"
+    CONFIG_REFCODE_BLOB_FILE`
 
 vendor_download()
 {
@@ -390,7 +390,7 @@ inject()
 {
 	[ $# -lt 3 ] && $err "$@, $rom: usage: inject name path type (offset)"
 
-	eval "$(setvars "" cbfsname _dest _t _offset)"
+	eval `setvars "" cbfsname _dest _t _offset`
 	cbfsname="$1"
 	_dest="${2##*../}"
 	_t="$3"
diff --git a/script/roms b/script/roms
index 7b6f8685..9cfab81a 100755
--- a/script/roms
+++ b/script/roms
@@ -26,8 +26,8 @@ pv="payload_uboot payload_grub_withseabios payload_seabios payload_memtest t"
 pv="$pv payload_seabios_withgrub payload_seabios_grubonly payload_grub"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree release ubootelf"
 v="$v grub_timeout board grub_scan_disk uboot_config grubtree grubelf tmpmv"
-eval "$(setvars "n" $pv)"
-eval "$(setvars "" $v boards targets serdir ser)"
+eval `setvars "n" $pv`
+eval `setvars "" $v boards targets serdir ser`
 
 main()
 {
@@ -88,7 +88,8 @@ serlist()
 
 configure_target()
 {
-	eval "$(setvars "n" $pv) $(setvars "" $v)"
+	eval `setvars "n" $pv`
+	eval `setvars "" $v`
 	board="$1"
 
 	targetdir="$cfgsdir/$board"
@@ -106,11 +107,11 @@ configure_target()
 	[ "$payload_memtest" != "y" ] && payload_memtest="n"
 	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"
 
-	[ "$payload_grub_withseabios" = "y" ] && eval "$(setvars "y" \
-	    payload_grub payload_seabios payload_seabios_withgrub)"
+	[ "$payload_grub_withseabios" = "y" ] && eval `setvars "y" \
+	    payload_grub payload_seabios payload_seabios_withgrub`
 	[ "$payload_seabios_withgrub" = "y" ] && payload_seabios="y"
 	[ "$payload_seabios_grubonly" = "y" ] && \
-		eval "$(setvars "y" payload_seabios payload_seabios_withgrub)"
+		eval `setvars "y" payload_seabios payload_seabios_withgrub`
 
 	# The reverse logic must not be applied. If SeaBIOS-with-GRUB works,
 	# that doesn't mean GRUB-with-SeaBIOS will, e.g. VGA ROM execution
diff --git a/script/trees b/script/trees
index 82c3ce84..7287280d 100755
--- a/script/trees
+++ b/script/trees
@@ -10,9 +10,9 @@ set -u -e
 . "include/git.sh"
 
 cbmakeargs="UPDATED_SUBMODULES=1 CPUS=$threads"
-eval "$(setvars "" xarch cdir config config_name xlang mode makeargs \
+eval `setvars "" xarch cdir config config_name xlang mode makeargs \
     listfile project target target_dir targets tree _f target1 bootstrapargs \
-    autoconfargs cmakedir elfdir autogenargs xtree)"
+    autoconfargs cmakedir elfdir autogenargs xtree`
 
 main()
 {
@@ -152,8 +152,8 @@ handle_src_tree()
 
 load_project_config()
 {
-	eval "$(setvars "" xarch xlang tree bootstrapargs autoconfargs xtree \
-	    tree_depend makeargs)"
+	eval `setvars "" xarch xlang tree bootstrapargs autoconfargs xtree \
+	    tree_depend makeargs`
 	eval `setcfg "$1/target.cfg" 0`; return 0
 }
 
@@ -272,7 +272,7 @@ check_makefile()
 
 mkpayload_grub()
 {
-	eval "$(setvars "" grub_modules grub_install_modules)"
+	eval `setvars "" grub_modules grub_install_modules`
 	eval `setcfg "$grubdata/module/$tree"`
 	chkvars "grub_install_modules" "grub_modules"
 

From 71137b12b497e6935c81bf5fc73a0c17246fafd2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 22 Jun 2024 21:44:49 +0100
Subject: [PATCH 0603/1549] roms: remove support for "grubonly" seabios

due to lbmk issue #216, it is now unwise to use grub as the
primary payload on any machine; the sheer complexity of grub
and the number of memory corruption bugs that have been fixed
due to auditing over the years, means more such bugs exist.

we now provide seabios as the primary payload on all x86 ports,
but provide a "grubfirst" configuration where a bootorder file
in seabios can be added via cbfs, which tells seabios to load
grub from cbfs first, while still allowing use of the boot select
menu by pressing esc in seabios.

well, the "grubonly" option also disables the seabios esc menu,
so that *only* grub runs. there is no point in using this unless
you want to harden your setup, for example if you want to set up
encrypted /boot and boot that from grub, and have a grub password
disallowing unauthorised bootup of your machine.

see grub hardening guide;
https://libreboot.org/docs/linux/grub_hardening.html

at least as of today, 22 June 2024, that page already says
how to manually disable the seabios menu in the same way, if that
is the setup you want. alternatively, a user may be wily
enough to edit target.cfg for their board and compile a rom
that only has the grub payload in it, if that is what the user
wishes to do.

regardless, the default configurations provided by lbmk must never
be unsafe, norc should the build system support such unsafe
settings;

yes, grub as primary payload is technically still supported in
lbmk. actually, at the time of this revision, i have half a mind
to remove that functionality altogether, so that only seabios is
allowed as primary payload, when compiling a rom image that also
has grub, chainloading grub from the seabios menu instead.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 11 +++--------
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/script/roms b/script/roms
index 9cfab81a..213f1b1f 100755
--- a/script/roms
+++ b/script/roms
@@ -23,7 +23,7 @@ stm32dir="$stm32src/boards"
 # Disable all payloads by default.
 # target.cfg files have to specifically enable [a] payload(s)
 pv="payload_uboot payload_grub_withseabios payload_seabios payload_memtest t"
-pv="$pv payload_seabios_withgrub payload_seabios_grubonly payload_grub"
+pv="$pv payload_seabios_withgrub payload_grub"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree release ubootelf"
 v="$v grub_timeout board grub_scan_disk uboot_config grubtree grubelf tmpmv"
 eval `setvars "n" $pv`
@@ -110,8 +110,6 @@ configure_target()
 	[ "$payload_grub_withseabios" = "y" ] && eval `setvars "y" \
 	    payload_grub payload_seabios payload_seabios_withgrub`
 	[ "$payload_seabios_withgrub" = "y" ] && payload_seabios="y"
-	[ "$payload_seabios_grubonly" = "y" ] && \
-		eval `setvars "y" payload_seabios payload_seabios_withgrub`
 
 	# The reverse logic must not be applied. If SeaBIOS-with-GRUB works,
 	# that doesn't mean GRUB-with-SeaBIOS will, e.g. VGA ROM execution
@@ -137,8 +135,8 @@ build_payloads()
 	[ "$payload_memtest" = "y" ] && x_ ./update trees -b memtest86plus
 	[ "$payload_seabios" = "y" ] && x_ ./update trees -b seabios
 
-	if [ "$payload_grub" = "y" ] || [ "$payload_seabios_withgrub" = "y" ] \
-	    || [ "$payload_seabios_grubonly" = "y" ]; then
+	if [ "$payload_grub" = "y" ] || [ "$payload_seabios_withgrub" = "y" ]
+	then
 		[ -f "$grubelf" ] || x_ ./update trees -b grub $grubtree
 	fi
 
@@ -239,9 +237,6 @@ build_grub_roms()
 	[ "$payload1" = "grub" ] && return 0
 	cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
 	cprom cp "$tmprom" "${newrom%.rom}_grubfirst.rom"
-	[ "$payload_seabios_grubonly" = "y" ] || return 0
-	x_ "$cbfstool" "$tmprom" add-int -i 0 -n etc/show-boot-menu
-	cprom cp "$tmprom" "${newrom%.rom}_grubonly.rom"
 }
 
 # make a rom in /tmp/ and then print the path of that ROM

From e67cd17164fd1934cd908b1f281867fac1cd73ae Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 22 Jun 2024 22:57:39 +0100
Subject: [PATCH 0604/1549] roms: only support SeaBIOS/SeaGRUB on x86

Never, ever build images where GRUB is the primary payload.

These options have been removed from target.cfg handling:

* seabios_withgrub
* grub_withseabios

The "payload_grub" variable now does the same thing as
the old "seabios_withgrub" variable, if set.

The "grubonly" configuration is retained, and enabled by
default when SeaGRUB is enabled (non-grubonly also available).

Due to lbmk issue #216, it is no longer Libreboot policy to
make GRUB the primary payload on any board. GRUB's sheer size
and complexity, plus the large number of memory corruption issues
similar to it that *have* been fixed over the years, tells me
that GRUB is a liability when it is the primary payload.

SeaBIOS is a much safer payload to run as primary, on x86, due
to its smaller size and much more conservative development; it
is simply far less likely to break.

If GRUB breaks in the future, the user's machine is not
bricked. This is because SeaBIOS is the default payload.

Since I no longer wish to ever provide GRUB as a primary
payload, supporting it in lbmk adds needless bloat that
will later probably break anyway due to lack of testing,
so let's just assume SeaGRUB in all cases where the user
wants to use a GRUB payload.

You can mitigate potential security issues with SeaBIOS
by disabling option ROM execution, which can be done at
runtime by inserting integers into CBFS. The SeaBIOS
documentation says how to do this.

Libreboot's GRUB hardening guide still says how to add
a bootorder file in CBFS, making SeaBIOS only load GRUB
from CBFS, and nothing else. This, combined with the
disablement of option ROM execution (if using Intel
graphics), pretty much provides the same security benefits
as GRUB-as-primary, for example when setting a GRUB password
and GPG checks, with encrypted /boot as in the hardening guide.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/d510mo_16mb/target.cfg        |  2 +-
 config/coreboot/d945gclf_8mb/target.cfg       |  2 +-
 .../coreboot/dell9020mt_nri_12mb/target.cfg   |  2 +-
 .../coreboot/dell9020sff_nri_12mb/target.cfg  |  2 +-
 config/coreboot/e5420_6mb/target.cfg          |  2 +-
 config/coreboot/e5520_6mb/target.cfg          |  2 +-
 config/coreboot/e5530_12mb/target.cfg         |  2 +-
 config/coreboot/e6400_4mb/target.cfg          |  2 +-
 config/coreboot/e6400nvidia_4mb/target.cfg    |  2 +-
 config/coreboot/e6420_10mb/target.cfg         |  2 +-
 config/coreboot/e6430_12mb/target.cfg         |  2 +-
 config/coreboot/e6520_10mb/target.cfg         |  2 +-
 config/coreboot/e6530_12mb/target.cfg         |  2 +-
 config/coreboot/hp2170p_16mb/target.cfg       |  2 +-
 config/coreboot/hp2560p_8mb/target.cfg        |  2 +-
 config/coreboot/hp2570p_16mb/target.cfg       |  2 +-
 config/coreboot/hp8200sff_4mb/target.cfg      |  2 +-
 config/coreboot/hp8200sff_8mb/target.cfg      |  2 +-
 config/coreboot/hp820g2_12mb/target.cfg       |  2 +-
 config/coreboot/hp8300cmt_16mb/target.cfg     |  2 +-
 config/coreboot/hp8300usdt_16mb/target.cfg    |  2 +-
 config/coreboot/hp8460pintel_8mb/target.cfg   |  2 +-
 config/coreboot/hp8470pintel_16mb/target.cfg  |  2 +-
 config/coreboot/hp8560w_8mb/target.cfg        |  2 +-
 config/coreboot/hp9470m_16mb/target.cfg       |  2 +-
 config/coreboot/kcma_d8-udimm_16mb/target.cfg |  2 +-
 config/coreboot/kcma_d8_rdimm_16mb/target.cfg |  2 +-
 config/coreboot/kcma_d8_rdimm_2mb/target.cfg  |  2 +-
 config/coreboot/kcma_d8_udimm_2mb/target.cfg  |  2 +-
 config/coreboot/kfsn4_dre_2mb/target.cfg      |  2 +-
 .../coreboot/kgpe_d16_rdimm_16mb/target.cfg   |  2 +-
 config/coreboot/kgpe_d16_rdimm_2mb/target.cfg |  2 +-
 .../coreboot/kgpe_d16_udimm_16mb/target.cfg   |  2 +-
 config/coreboot/kgpe_d16_udimm_2mb/target.cfg |  2 +-
 config/coreboot/macbook11/target.cfg          |  2 +-
 config/coreboot/macbook11_16mb/target.cfg     |  2 +-
 config/coreboot/macbook21/target.cfg          |  2 +-
 config/coreboot/macbook21_16mb/target.cfg     |  2 +-
 config/coreboot/qemu_x86_12mb/target.cfg      |  1 -
 config/coreboot/r400_16mb/target.cfg          |  2 +-
 config/coreboot/r400_4mb/target.cfg           |  2 +-
 config/coreboot/r400_8mb/target.cfg           |  2 +-
 config/coreboot/r500_4mb/target.cfg           |  2 +-
 config/coreboot/t1650_12mb/target.cfg         |  2 +-
 config/coreboot/t400_16mb/target.cfg          |  2 +-
 config/coreboot/t400_4mb/target.cfg           |  2 +-
 config/coreboot/t400_8mb/target.cfg           |  2 +-
 config/coreboot/t420_8mb/target.cfg           |  2 +-
 config/coreboot/t420s_8mb/target.cfg          |  2 +-
 config/coreboot/t430_12mb/target.cfg          |  2 +-
 config/coreboot/t440plibremrc_12mb/target.cfg |  2 +-
 config/coreboot/t500_16mb/target.cfg          |  2 +-
 config/coreboot/t500_4mb/target.cfg           |  2 +-
 config/coreboot/t500_8mb/target.cfg           |  2 +-
 config/coreboot/t520_8mb/target.cfg           |  2 +-
 config/coreboot/t530_12mb/target.cfg          |  2 +-
 config/coreboot/t60_16mb_intelgpu/target.cfg  |  2 +-
 config/coreboot/t60_intelgpu/target.cfg       |  2 +-
 config/coreboot/w500_16mb/target.cfg          |  2 +-
 config/coreboot/w500_4mb/target.cfg           |  2 +-
 config/coreboot/w500_8mb/target.cfg           |  2 +-
 config/coreboot/w530_12mb/target.cfg          |  2 +-
 config/coreboot/w541_12mb/target.cfg          |  2 +-
 config/coreboot/x200_16mb/target.cfg          |  2 +-
 config/coreboot/x200_4mb/target.cfg           |  2 +-
 config/coreboot/x200_8mb/target.cfg           |  2 +-
 config/coreboot/x220_8mb/target.cfg           |  2 +-
 config/coreboot/x230_12mb/target.cfg          |  2 +-
 config/coreboot/x230_16mb/target.cfg          |  2 +-
 config/coreboot/x230t_12mb/target.cfg         |  2 +-
 config/coreboot/x230t_16mb/target.cfg         |  2 +-
 config/coreboot/x301_16mb/target.cfg          |  2 +-
 config/coreboot/x301_4mb/target.cfg           |  2 +-
 config/coreboot/x301_8mb/target.cfg           |  2 +-
 config/coreboot/x60/target.cfg                |  2 +-
 config/coreboot/x60_16mb/target.cfg           |  2 +-
 script/roms                                   | 87 +++++++------------
 77 files changed, 105 insertions(+), 133 deletions(-)

diff --git a/config/coreboot/d510mo_16mb/target.cfg b/config/coreboot/d510mo_16mb/target.cfg
index ef75af4a..62768ec7 100644
--- a/config/coreboot/d510mo_16mb/target.cfg
+++ b/config/coreboot/d510mo_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 release="n"
diff --git a/config/coreboot/d945gclf_8mb/target.cfg b/config/coreboot/d945gclf_8mb/target.cfg
index 38e5763e..3f020323 100644
--- a/config/coreboot/d945gclf_8mb/target.cfg
+++ b/config/coreboot/d945gclf_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 release="n"
diff --git a/config/coreboot/dell9020mt_nri_12mb/target.cfg b/config/coreboot/dell9020mt_nri_12mb/target.cfg
index e32d25c1..3c3f9802 100644
--- a/config/coreboot/dell9020mt_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_nri_12mb/target.cfg
@@ -1,7 +1,7 @@
 tree="haswell"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
diff --git a/config/coreboot/dell9020sff_nri_12mb/target.cfg b/config/coreboot/dell9020sff_nri_12mb/target.cfg
index e32d25c1..3c3f9802 100644
--- a/config/coreboot/dell9020sff_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_nri_12mb/target.cfg
@@ -1,7 +1,7 @@
 tree="haswell"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index f94ac308..4201beb1 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index f94ac308..4201beb1 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index cbe91cbd..2556a4ce 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index 3aba9054..f6d540d5 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -1,7 +1,7 @@
 tree="dell"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="e6400"
diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
index 3aba9054..f6d540d5 100644
--- a/config/coreboot/e6400nvidia_4mb/target.cfg
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -1,7 +1,7 @@
 tree="dell"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="e6400"
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index f94ac308..4201beb1 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index cbe91cbd..2556a4ce 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index f94ac308..4201beb1 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index cbe91cbd..2556a4ce 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index 47c00abd..f7544548 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2170p"
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index 7152a2a4..a9dfe4e4 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2560p"
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index 84e6f6e7..928527da 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2570p"
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 6f1d4c4f..59c6f1d1 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 6f1d4c4f..59c6f1d1 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index 6b25ebbb..26a51303 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index dddffd7b..247bb3f1 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index cbe91cbd..2556a4ce 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index 32223f55..b39036ba 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8460pintel"
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index 6e6288b3..d960f36b 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8470pintel"
diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg
index 9dcf2f82..7bad4889 100644
--- a/config/coreboot/hp8560w_8mb/target.cfg
+++ b/config/coreboot/hp8560w_8mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8560w"
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index a339e04c..35a0a6fd 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp9470m"
diff --git a/config/coreboot/kcma_d8-udimm_16mb/target.cfg b/config/coreboot/kcma_d8-udimm_16mb/target.cfg
index 749c4e46..ce97e14f 100644
--- a/config/coreboot/kcma_d8-udimm_16mb/target.cfg
+++ b/config/coreboot/kcma_d8-udimm_16mb/target.cfg
@@ -2,7 +2,7 @@ tree="fam15h_udimm"
 xtree="fam15h_rdimm"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 xlang="c"
 grub_timout=10
diff --git a/config/coreboot/kcma_d8_rdimm_16mb/target.cfg b/config/coreboot/kcma_d8_rdimm_16mb/target.cfg
index 744b6e10..cb012f9f 100644
--- a/config/coreboot/kcma_d8_rdimm_16mb/target.cfg
+++ b/config/coreboot/kcma_d8_rdimm_16mb/target.cfg
@@ -1,7 +1,7 @@
 tree="fam15h_rdimm"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/kcma_d8_rdimm_2mb/target.cfg b/config/coreboot/kcma_d8_rdimm_2mb/target.cfg
index 744b6e10..cb012f9f 100644
--- a/config/coreboot/kcma_d8_rdimm_2mb/target.cfg
+++ b/config/coreboot/kcma_d8_rdimm_2mb/target.cfg
@@ -1,7 +1,7 @@
 tree="fam15h_rdimm"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/kcma_d8_udimm_2mb/target.cfg b/config/coreboot/kcma_d8_udimm_2mb/target.cfg
index 00e1d511..9c3a0902 100644
--- a/config/coreboot/kcma_d8_udimm_2mb/target.cfg
+++ b/config/coreboot/kcma_d8_udimm_2mb/target.cfg
@@ -2,7 +2,7 @@ tree="fam15h_udimm"
 xtree="fam15h_rdimm"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/kfsn4_dre_2mb/target.cfg b/config/coreboot/kfsn4_dre_2mb/target.cfg
index 51b50a3b..ab87dd2f 100644
--- a/config/coreboot/kfsn4_dre_2mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_2mb/target.cfg
@@ -1,6 +1,6 @@
 tree="fam15h_udimm"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 xlang="c"
diff --git a/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg b/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg
index 744b6e10..cb012f9f 100644
--- a/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg
+++ b/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg
@@ -1,7 +1,7 @@
 tree="fam15h_rdimm"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg b/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg
index 744b6e10..cb012f9f 100644
--- a/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg
+++ b/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg
@@ -1,7 +1,7 @@
 tree="fam15h_rdimm"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/kgpe_d16_udimm_16mb/target.cfg b/config/coreboot/kgpe_d16_udimm_16mb/target.cfg
index 00e1d511..9c3a0902 100644
--- a/config/coreboot/kgpe_d16_udimm_16mb/target.cfg
+++ b/config/coreboot/kgpe_d16_udimm_16mb/target.cfg
@@ -2,7 +2,7 @@ tree="fam15h_udimm"
 xtree="fam15h_rdimm"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/kgpe_d16_udimm_2mb/target.cfg b/config/coreboot/kgpe_d16_udimm_2mb/target.cfg
index 00e1d511..9c3a0902 100644
--- a/config/coreboot/kgpe_d16_udimm_2mb/target.cfg
+++ b/config/coreboot/kgpe_d16_udimm_2mb/target.cfg
@@ -2,7 +2,7 @@ tree="fam15h_udimm"
 xtree="fam15h_rdimm"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index 043bd365..c7eddcc2 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -1,5 +1,5 @@
 tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index a2231fc5..1bdb98f1 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 scan_scan_disk="ahci"
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index 12e51f9b..7e716a43 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -1,6 +1,6 @@
 tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index 12e51f9b..7e716a43 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg
index 9572fdc8..27921ff9 100644
--- a/config/coreboot/qemu_x86_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_12mb/target.cfg
@@ -1,6 +1,5 @@
 tree="default"
 xarch="i386-elf"
 payload_grub="y"
-payload_grub_withseabios="y"
 payload_seabios="y"
 payload_memtest="y"
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 341e655e..4a9af479 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index 341e655e..4a9af479 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index 1e7b56ca..f596cc06 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -1,5 +1,5 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 341e655e..4a9af479 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index b8212ffe..edbca096 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 341e655e..4a9af479 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index 341e655e..4a9af479 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index 341e655e..4a9af479 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index f94ac308..4201beb1 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index f94ac308..4201beb1 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index cbe91cbd..2556a4ce 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index e32d25c1..3c3f9802 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -1,7 +1,7 @@
 tree="haswell"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 341e655e..4a9af479 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index 341e655e..4a9af479 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index 341e655e..4a9af479 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index f94ac308..4201beb1 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index cbe91cbd..2556a4ce 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 043bd365..c7eddcc2 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -1,5 +1,5 @@
 tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 043bd365..c7eddcc2 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -1,5 +1,5 @@
 tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 341e655e..4a9af479 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index 341e655e..4a9af479 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index 341e655e..4a9af479 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index cbe91cbd..2556a4ce 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index e32d25c1..3c3f9802 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -1,7 +1,7 @@
 tree="haswell"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 341e655e..4a9af479 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index 341e655e..4a9af479 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index 341e655e..4a9af479 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -1,6 +1,6 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index f94ac308..4201beb1 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg
index cbe91cbd..2556a4ce 100644
--- a/config/coreboot/x230_12mb/target.cfg
+++ b/config/coreboot/x230_12mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index cbe91cbd..2556a4ce 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg
index cbe91cbd..2556a4ce 100644
--- a/config/coreboot/x230t_12mb/target.cfg
+++ b/config/coreboot/x230t_12mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index cbe91cbd..2556a4ce 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index 50e91f61..16ffc818 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index 50e91f61..16ffc818 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index 50e91f61..16ffc818 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -1,7 +1,7 @@
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 043bd365..c7eddcc2 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -1,5 +1,5 @@
 tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 grub_scan_disk="ahci"
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 043bd365..c7eddcc2 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -1,5 +1,5 @@
 tree="i945"
 xarch="i386-elf"
 payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
 grub_scan_disk="ahci"
diff --git a/script/roms b/script/roms
index 213f1b1f..92f79db4 100755
--- a/script/roms
+++ b/script/roms
@@ -22,10 +22,9 @@ stm32dir="$stm32src/boards"
 
 # Disable all payloads by default.
 # target.cfg files have to specifically enable [a] payload(s)
-pv="payload_uboot payload_grub_withseabios payload_seabios payload_memtest t"
-pv="$pv payload_seabios_withgrub payload_grub"
+pv="payload_uboot payload_seabios payload_memtest t payload_grub"
 v="romdir cbrom initmode displaymode cbcfg targetdir tree release ubootelf"
-v="$v grub_timeout board grub_scan_disk uboot_config grubtree grubelf tmpmv"
+v="$v board grub_scan_disk uboot_config grubtree grubelf tmpmv"
 eval `setvars "n" $pv`
 eval `setvars "" $v boards targets serdir ser`
 
@@ -97,30 +96,24 @@ configure_target()
 	# Override the above defaults using target.cfg
 	eval `setcfg "$targetdir/target.cfg"`
 
+	[ -z "$tree" ] && $err "$board: tree not defined"
+	[ "$xbmk_release" = "y" ] && [ "$release" = "n" ] && return 1
+	[ "$board" = "$tree" ] && return 1
+
+	[ -n "$uboot_config" ] || uboot_config="default"
+	[ "$payload_uboot" = "y" ] || payload_seabios="y"
+	[ "$payload_grub" = "y" ] && payload_seabios="y"
+	[ "$payload_seabios" = "y" ] && [ -n "$payload_uboot" = "y" ] && \
+	    $err "$board: U-Boot and SeaBIOS/GRUB are both enabled."
+
 	[ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata"
 
 	[ -n "$grubtree" ] || grubtree="default"
 	grubelf="elf/grub/$grubtree/payload/grub.elf"
 
-	[ -z "$tree" ] && $err "$board: tree not defined"
-
-	[ "$payload_memtest" != "y" ] && payload_memtest="n"
+	[ "$payload_memtest" = "y" ] || payload_memtest="n"
 	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"
-
-	[ "$payload_grub_withseabios" = "y" ] && eval `setvars "y" \
-	    payload_grub payload_seabios payload_seabios_withgrub`
-	[ "$payload_seabios_withgrub" = "y" ] && payload_seabios="y"
-
-	# The reverse logic must not be applied. If SeaBIOS-with-GRUB works,
-	# that doesn't mean GRUB-with-SeaBIOS will, e.g. VGA ROM execution
-	[ "$payload_grub" != "y" ] && [ "$payload_seabios" != "y" ] && \
-	    [ "$payload_uboot" != "y" ] && $err "'$board' defines no payload"
-
-	[ "$payload_uboot" = "y" ] || payload_uboot="n"
-	[ -n "$uboot_config" ] || uboot_config="default"
-
-	[ "$xbmk_release" = "y" ] && [ "$release" = "n" ] && return 1
-	[ "$board" = "$tree" ] && return 1; return 0
+	[ "$payload_uboot" = "y" ] && payload_memtest="n"; return 0
 }
 
 build_payloads()
@@ -134,11 +127,7 @@ build_payloads()
 	[ -f "$cbfstool" ] || x_ ./update trees -b coreboot utils $tree
 	[ "$payload_memtest" = "y" ] && x_ ./update trees -b memtest86plus
 	[ "$payload_seabios" = "y" ] && x_ ./update trees -b seabios
-
-	if [ "$payload_grub" = "y" ] || [ "$payload_seabios_withgrub" = "y" ]
-	then
-		[ -f "$grubelf" ] || x_ ./update trees -b grub $grubtree
-	fi
+	[ "$payload_grub" = "y" ] && x_ ./update trees -b grub $grubtree
 
 	[ "$payload_uboot" = "y" ] || return 0
 	x_ ./update trees -b u-boot $board
@@ -181,19 +170,18 @@ build_roms()
 	[ "$payload_memtest" != "y" ] || cbfs "$cbrom" \
 	    "elf/memtest86plus/memtest.bin" img/memtest
 	[ "$payload_seabios" = "y" ] && build_seabios_roms
-	[ "$payload_grub" != "y" ] || build_grub_roms "$cbrom" "grub"
 	[ "$payload_uboot" = "y" ] && x_ cp "$_cbrom" "$cbrom" && \
 	    build_uboot_roms; return 0
 }
 
 build_seabios_roms()
 {
-	if [ "$payload_seabios_withgrub" = "y" ]; then
+	if [ "$payload_grub" = "y" ]; then # SeaBIOS with GRUB
 		t="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
 		x_ cp "$cbrom" "$t"
-		build_grub_roms "$t" "seabios_withgrub"
-	else
-		t="$(mkSeabiosRom "$cbrom" "fallback/payload")" || \
+		build_seagrub_roms "$t" "seabios_withgrub"
+	else # SeaBIOS only
+		t="$(mkSeabiosRom "$cbrom")" || \
 		    $err "build_seabios_roms: cannot build tmprom"
 		newrom="$romdir/seabios_${board}_${initmode}_$displaymode"
 		[ "$initmode" = "normal" ] && newrom="$romdir/seabios" \
@@ -203,40 +191,25 @@ build_seabios_roms()
 	x_ rm -f "$t"
 }
 
-# Make separate ROM images with GRUB payload
-build_grub_roms()
+build_seagrub_roms()
 {
-	tmprom="$1"
-	payload1="$2" # allow values: grub, seabios, seabios_withgrub
-
-	grub_cbfs="fallback/payload"
-	if [ "$payload1" = "grub" ] && [ "$payload_grub_withseabios" = "y" ]
-	then
-		tmpmv="$(mkSeabiosRom "$tmprom" "seabios.elf")" || \
-		    $err "build_grub_roms 1 $board: can't build tmprom"
-	elif [ "$payload1" != "grub" ] && [ "$payload_seabios_withgrub" = "y" ]
-	then
-		grub_cbfs="img/grub2"
-		tmpmv="$(mkSeabiosRom "$tmprom" fallback/payload)" || \
-		    $err "build_grub_roms 2 $board: can't build tmprom"
-	fi
-	[ -n "$tmpmv" ] && [ -f "$tmpmv" ] && x_ mv "$tmpmv" "$tmprom"
+	tmpmv="$(mkSeabiosRom "$1")" || $err "$board: !mk grub tmprom"
+	x_ mv "$tmpmv" "$1"
 
 	# we only need insert grub.elf once, for each coreboot config:
-	cbfs "$tmprom" "$grubelf" "$grub_cbfs"
+	cbfs "$1" "$grubelf" "img/grub2"
 
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
 	    > "$tmpdir/tmpcfg" || $err "set grub_scan_disk, $grub_scan_disk"
-	cbfs "$tmprom" "$tmpdir/tmpcfg" scan.cfg raw
+	cbfs "$1" "$tmpdir/tmpcfg" scan.cfg raw
 
-	newrom="$romdir/${payload1}_${board}_${initmode}_$displaymode.rom"
-	[ "$initmode" = "normal" ] && newrom="$romdir/${payload1}_" \
+	newrom="$romdir/seabios_withgrub_${board}_${initmode}_$displaymode.rom"
+	[ "$initmode" = "normal" ] && newrom="$romdir/seabios_withgrub_" \
 	    && newrom="$newrom${board}_$initmode.rom"
-	cprom cp "$tmprom" "$newrom"
+	cprom cp "$1" "$newrom"
 
-	[ "$payload1" = "grub" ] && return 0
-	cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
-	cprom cp "$tmprom" "${newrom%.rom}_grubfirst.rom"
+	cbfs "$1" "$grubdata/bootorder" bootorder raw # SeaGRUB
+	cprom cp "$1" "${newrom%.rom}_grubfirst.rom"
 }
 
 # make a rom in /tmp/ and then print the path of that ROM
@@ -245,7 +218,7 @@ mkSeabiosRom() {
 	_seabioself="elf/seabios/default/$initmode/bios.bin.elf"
 
 	x_ cp "$1" "$tmprom"
-	cbfs "$tmprom" "$_seabioself" "$2"
+	cbfs "$tmprom" "$_seabioself" "fallback/payload"
 	x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
 
 	z="2"; [ "$initmode" = "vgarom" ] && z="0"

From 0158a081110115f501bf648e99ae7a173d921403 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 23 Jun 2024 00:15:19 +0100
Subject: [PATCH 0605/1549] roms: general code cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 165 ++++++++++++++++++----------------------------------
 1 file changed, 56 insertions(+), 109 deletions(-)

diff --git a/script/roms b/script/roms
index 92f79db4..6ea6a1e1 100755
--- a/script/roms
+++ b/script/roms
@@ -10,6 +10,8 @@ set -u -e
 
 . "include/lib.sh"
 
+tmprom="$tmpdir/rom"
+
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 cfgsdir="config/coreboot"
 rp2040src="src/pico-serprog"
@@ -23,7 +25,7 @@ stm32dir="$stm32src/boards"
 # Disable all payloads by default.
 # target.cfg files have to specifically enable [a] payload(s)
 pv="payload_uboot payload_seabios payload_memtest t payload_grub"
-v="romdir cbrom initmode displaymode cbcfg targetdir tree release ubootelf"
+v="romdir initmode displaymode cbcfg targetdir tree release ubootelf"
 v="$v board grub_scan_disk uboot_config grubtree grubelf tmpmv"
 eval `setvars "n" $pv`
 eval `setvars "" $v boards targets serdir ser`
@@ -53,7 +55,7 @@ main()
 	for x in $boards; do
 		[ -n "$ser" ] && mkserprogfw "$ser" "$x"
 		[ -z "$ser" ] && [ -d "config/coreboot/$x/config" ] && \
-		    configure_target "$x" && build_payloads && build_board && \
+		    configure_target "$x" && build_board && \
 		    [ -d "bin/$board" ] && targets="$targets, $x"; continue
 	done
 
@@ -61,23 +63,18 @@ main()
 	    mkrom_tarball "bin/serprog_$ser" && return 0
 
 	[ -z "$ser" ] && [ -z "$targets" ] && $err "No images were compiled"
-	printf "DO NOT flash images from elf/ - use bin/ instead. ALSO:\n"
-	printf "%s\n" "$kbnotice"
+	printf "DO NOT flash from elf/ - use bin/ - ALSO:\n%s\n" "$kbnotice"
 }
 
 mkserprogfw()
 {
 	x_ mkdir -p "bin/serprog_$1"
-	if [ "$1" = "rp2040" ]; then
-		x_ cmake -DPICO_BOARD="$2" -DPICO_SDK_PATH="$picosdk" \
-		    -B "$rp2040src/build" "$rp2040src"
-		x_ cmake --build "$rp2040src/build"
-	else
-		x_ make -C "$stm32src" libopencm3-just-make BOARD=$2
-		x_ make -C "$stm32src" BOARD=$2
-	fi
+	[ "$1" = "rp2040" ] && x_ cmake -DPICO_BOARD="$2" \
+	    -DPICO_SDK_PATH="$picosdk" -B "$rp2040src/build" "$rp2040src" && \
+	    x_ cmake --build "$rp2040src/build"
+	[ "$1" = "stm32" ] && x_ make -C "$stm32src" libopencm3-just-make \
+	    BOARD=$2 && x_ make -C "$stm32src" BOARD=$2
 	eval "x_ mv \"\$${1}x\" \"bin/serprog_$1/serprog_$2.\${${1}x##*.}\""
-	printf "Look in bin/serprog_%s/ for images\n" "$1"
 }
 
 serlist()
@@ -89,9 +86,8 @@ configure_target()
 {
 	eval `setvars "n" $pv`
 	eval `setvars "" $v`
-	board="$1"
 
-	targetdir="$cfgsdir/$board"
+	board="$1"; targetdir="$cfgsdir/$board"; romdir="bin/$board"
 
 	# Override the above defaults using target.cfg
 	eval `setcfg "$targetdir/target.cfg"`
@@ -100,6 +96,10 @@ configure_target()
 	[ "$xbmk_release" = "y" ] && [ "$release" = "n" ] && return 1
 	[ "$board" = "$tree" ] && return 1
 
+	cbdir="src/coreboot/$tree"
+	cbfstool="elf/cbfstool/$tree/cbfstool"
+	[ -f "$cbfstool" ] || x_ ./update trees -b coreboot utils $tree
+
 	[ -n "$uboot_config" ] || uboot_config="default"
 	[ "$payload_uboot" = "y" ] || payload_seabios="y"
 	[ "$payload_grub" = "y" ] && payload_seabios="y"
@@ -112,29 +112,7 @@ configure_target()
 	grubelf="elf/grub/$grubtree/payload/grub.elf"
 
 	[ "$payload_memtest" = "y" ] || payload_memtest="n"
-	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"
-	[ "$payload_uboot" = "y" ] && payload_memtest="n"; return 0
-}
-
-build_payloads()
-{
-	romdir="bin/$board"
-	cbdir="src/coreboot/$board"
-	[ "$board" = "$tree" ] || cbdir="src/coreboot/$tree"
-	cbfstool="elf/cbfstool/$tree/cbfstool"
-	cbrom="$cbdir/build/coreboot.rom"
-
-	[ -f "$cbfstool" ] || x_ ./update trees -b coreboot utils $tree
-	[ "$payload_memtest" = "y" ] && x_ ./update trees -b memtest86plus
-	[ "$payload_seabios" = "y" ] && x_ ./update trees -b seabios
-	[ "$payload_grub" = "y" ] && x_ ./update trees -b grub $grubtree
-
-	[ "$payload_uboot" = "y" ] || return 0
-	x_ ./update trees -b u-boot $board
-	ubdir="elf/u-boot/$board/$uboot_config"
-	ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \
-	    ubootelf="$ubdir/u-boot"
-	[ -f "$ubootelf" ] || $err "$board: Can't find u-boot"; return 0
+	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"; return 0
 }
 
 build_board()
@@ -142,17 +120,15 @@ build_board()
 	x_ rm -Rf "$romdir"
 
 	for it in "normal" "vgarom" "libgfxinit"; do
-		initmode="$it"
-		hmode="vesafb"
+		initmode="$it"; hmode="vesafb"
 		[ "$initmode" = "vgarom" ] || hmode="corebootfb"
 		modes="$hmode txtmode"
-		for y in $modes; do
-			displaymode="$y"
-			[ "$initmode" = "normal" ] && \
+		for dt in $modes; do
+			displaymode="$dt"; [ "$initmode" = "normal" ] && \
 			    [ "$displaymode" != "txtmode" ] && continue
 			cbcfg="$targetdir/config/${initmode}_$displaymode"
 			[ "$initmode" = "normal" ] && cbcfg="${cbcfg%_*}"
-			e "$cbcfg" f not || build_roms; x_ rm -f "$cbrom"
+			e "$cbcfg" f not || build_roms; x_ rm -f "$tmprom"
 		done
 	done
 }
@@ -161,92 +137,63 @@ build_roms()
 {
 	x_ ./update trees -b coreboot $board
 
-	_cbrom="$cbelfdir/$board/${initmode}_$displaymode"
-	[ "$initmode" = "normal" ] && _cbrom="${_cbrom%"_$displaymode"}"
-	_cbrom="$_cbrom/coreboot.rom"
-	cbrom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
-	x_ cp "$_cbrom" "$cbrom"
+	cbuild="$cbelfdir/$board/${initmode}_$displaymode"
+	[ "$initmode" = "normal" ] && cbuild="${cbuild%"_$displaymode"}"
+	x_ cp "$cbuild/coreboot.rom" "$tmprom"
 
-	[ "$payload_memtest" != "y" ] || cbfs "$cbrom" \
-	    "elf/memtest86plus/memtest.bin" img/memtest
 	[ "$payload_seabios" = "y" ] && build_seabios_roms
-	[ "$payload_uboot" = "y" ] && x_ cp "$_cbrom" "$cbrom" && \
-	    build_uboot_roms; return 0
+	[ "$payload_uboot" = "y" ] || return 0
+
+	x_ ./update trees -b u-boot $board
+	ubdir="elf/u-boot/$board/$uboot_config"
+	ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \
+	    ubootelf="$ubdir/u-boot"
+	[ -f "$ubootelf" ] || $err "$board: Can't find u-boot"
+
+	cbfs "$tmprom" "$ubootelf" "fallback/payload"
+	cprom "$romdir/uboot_payload_${board}_${initmode}_$displaymode.rom"
 }
 
 build_seabios_roms()
 {
-	if [ "$payload_grub" = "y" ]; then # SeaBIOS with GRUB
-		t="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
-		x_ cp "$cbrom" "$t"
-		build_seagrub_roms "$t" "seabios_withgrub"
-	else # SeaBIOS only
-		t="$(mkSeabiosRom "$cbrom")" || \
-		    $err "build_seabios_roms: cannot build tmprom"
-		newrom="$romdir/seabios_${board}_${initmode}_$displaymode"
-		[ "$initmode" = "normal" ] && newrom="$romdir/seabios" \
-			&& newrom="${newrom}_${board}_$initmode"
-		cprom cp "$t" "$newrom.rom"
-	fi
-	x_ rm -f "$t"
-}
-
-build_seagrub_roms()
-{
-	tmpmv="$(mkSeabiosRom "$1")" || $err "$board: !mk grub tmprom"
-	x_ mv "$tmpmv" "$1"
-
-	# we only need insert grub.elf once, for each coreboot config:
-	cbfs "$1" "$grubelf" "img/grub2"
-
-	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
-	    > "$tmpdir/tmpcfg" || $err "set grub_scan_disk, $grub_scan_disk"
-	cbfs "$1" "$tmpdir/tmpcfg" scan.cfg raw
-
-	newrom="$romdir/seabios_withgrub_${board}_${initmode}_$displaymode.rom"
-	[ "$initmode" = "normal" ] && newrom="$romdir/seabios_withgrub_" \
-	    && newrom="$newrom${board}_$initmode.rom"
-	cprom cp "$1" "$newrom"
-
-	cbfs "$1" "$grubdata/bootorder" bootorder raw # SeaGRUB
-	cprom cp "$1" "${newrom%.rom}_grubfirst.rom"
-}
-
-# make a rom in /tmp/ and then print the path of that ROM
-mkSeabiosRom() {
-	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)" # 1=cbrom, 2=cbfs path
 	_seabioself="elf/seabios/default/$initmode/bios.bin.elf"
+	x_ ./update trees -b seabios
+
+	pstr="seabios" && [ "$payload_grub" = "y" ] && pstr="seabios_withgrub"
+	newrom="$romdir/${pstr}_${board}_$initmode.rom"
+	[ "$initmode" = "normal" ] || newrom="${newrom%.rom}_$displaymode.rom"
 
-	x_ cp "$1" "$tmprom"
 	cbfs "$tmprom" "$_seabioself" "fallback/payload"
 	x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
 
 	z="2"; [ "$initmode" = "vgarom" ] && z="0"
 	x_ "$cbfstool" "$tmprom" add-int -i $z -n etc/pci-optionrom-exec
 	x_ "$cbfstool" "$tmprom" add-int -i 0 -n etc/optionroms-checksum
-	[ "$initmode" != "libgfxinit" ] || cbfs "$tmprom" "$seavgabiosrom" \
+	[ "$initmode" = "libgfxinit" ] && cbfs "$tmprom" "$seavgabiosrom" \
 	    vgaroms/seavgabios.bin raw
 
-	printf "%s\n" "$tmprom"
-}
+	if [ "$payload_grub" = "y" ]; then
+		x_ ./update trees -b grub $grubtree
+		cbfs "$tmprom" "$grubelf" "img/grub2"
+		printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
+		    > "$tmpdir/tmpcfg" || $err "$board: !insert scandisk"
+		cbfs "$tmprom" "$tmpdir/tmpcfg" scan.cfg raw
+	fi
 
-build_uboot_roms()
-{
-	tmprom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
-	newrom="$romdir/uboot_payload_${board}_${initmode}_$displaymode.rom"
-	x_ cp "$cbrom" "$tmprom"
-	cbfs "$tmprom" "$ubootelf" "fallback/payload"
-	cprom mv "$tmprom" "$newrom"
+	[ "$payload_memtest" = "y" ] && x_ ./update trees -b memtest86plus && \
+	    cbfs "$tmprom" "elf/memtest86plus/memtest.bin" img/memtest
+
+	cprom "$newrom" && [ "$payload_grub" = "y" ] && \
+	    cbfs "$tmprom" "$grubdata/bootorder" bootorder raw && \
+	    cprom "${newrom%.rom}_grubfirst.rom"; return 0
 }
 
 cprom()
 {
-	printf "Creating target image: %s\n" "$3"
-
-	x_ mkdir -p "${3%/*}"
-	x_ $1 "$2" "$3"
-	[ "$xbmk_release" = "y" ] && mksha512sum "$3" "vendorhashes" && \
-	    x_ ./vendor inject -r "$3" -b "$board" -n nuke; return 0
+	printf "Creating target image: %s\n" "$1"
+	x_ mkdir -p "${1%/*}"; x_ cp "$tmprom" "$1"
+	[ "$xbmk_release" = "y" ] && mksha512sum "$1" "vendorhashes" && \
+	    x_ ./vendor inject -r "$1" -b "$board" -n nuke; return 0
 }
 
 main $@

From d5baaff0ec66a49ad3305a7f3d06ef4280fa00e0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 23 Jun 2024 12:34:26 +0100
Subject: [PATCH 0606/1549] lib.sh: fix error running ./build dependencies

the e() and setvars() functions need to be declared before
the dependencies function.

also: after calling install_packages, it was doing a return
when it should have done an exit.

this is all fixed now. i apologise to anyone who previously
ran into trouble with this!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 48 ++++++++++++++++++++++++------------------------
 1 file changed, 24 insertions(+), 24 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index c62bf98f..e4e33f0a 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -48,6 +48,29 @@ eval `setvars "" xbmk_release tmpdir _nogit version board boarddir relname \
 read -r projectname < projectname || :
 read -r projectsite < projectsite || :
 
+setcfg()
+{
+	if [ $# -gt 1 ]; then
+		printf "e \"%s\" f missing && return %s;\n" "$1" "$2"
+	else
+		printf "e \"%s\" f missing && %s \"Missing config\";\n" "$1" \
+		    "$err"
+	fi
+	printf ". \"%s\" || %s \"Could not read config\";\n" "$1" "$err"
+}
+
+e()
+{
+	es_t="e"
+	[ $# -gt 1 ] && es_t="$2"
+	es2="already exists"
+	estr="[ -$es_t \"\$1\" ] || return 1"
+	[ $# -gt 2 ] && estr="[ -$es_t \"\$1\" ] && return 1" && es2="missing"
+
+	eval "$estr"
+	printf "%s %s\n" "$1" "$es2" 1>&2
+}
+
 install_packages()
 {
 	[ $# -lt 2 ] && $err "fewer than two arguments"
@@ -58,7 +81,7 @@ install_packages()
 	[ -n "$aur_notice" ] && \
 	printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; return 0
 }
-[ $# -gt 0 ] && [ "$1" = "dependencies" ] && install_packages $@ && return 0
+[ $# -gt 0 ] && [ "$1" = "dependencies" ] && install_packages $@ && exit 0
 
 id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
 [ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
@@ -172,18 +195,6 @@ rmgit()
 	) || $err "Cannot remove .git/.gitmodules in $1"
 }
 
-e()
-{
-	es_t="e"
-	[ $# -gt 1 ] && es_t="$2"
-	es2="already exists"
-	estr="[ -$es_t \"\$1\" ] || return 1"
-	[ $# -gt 2 ] && estr="[ -$es_t \"\$1\" ] && return 1" && es2="missing"
-
-	eval "$estr"
-	printf "%s %s\n" "$1" "$es2" 1>&2
-}
-
 # return 0 if project is single-tree, otherwise 1
 # e.g. coreboot is multi-tree, so 1
 singletree()
@@ -223,14 +234,3 @@ cbfs()
 	lzma="-c lzma" && [ $# -gt 3 ] && lzma="-t raw"
 	x_ "$cbfstool" "$1" $ccmd -f "$2" -n "$3" $lzma
 }
-
-setcfg()
-{
-	if [ $# -gt 1 ]; then
-		printf "e \"%s\" f missing && return %s;\n" "$1" "$2"
-	else
-		printf "e \"%s\" f missing && %s \"Missing config\";\n" "$1" \
-		    "$err"
-	fi
-	printf ". \"%s\" || %s \"Could not read config\";\n" "$1" "$err"
-}

From 6468bdb3aa9501c2cc4abb38185dddb7bc779aa4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 23 Jun 2024 17:24:28 +0100
Subject: [PATCH 0607/1549] trees: don't check if xgcc is already built

just run the make crossgcc command anyway.
coreboot's own build system checks itself, and much
more reliably, but the check is more thorough and a bit
slower.

in rare cases, lbmk may come into build issues with xgcc,
and if you run the build again, it will always fail every
time because the checks is based on whether the xgcc
directory exists, rather than checking each
individual crossgcc binary.

checking every binary is also possible, but as i said,
the coreboot build system already does that, so let's defer
to coreboot's own handling of it.

remove the directory check. this will slow down the build
process a little bit, but should improve reliability under
fault conditions.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 1 -
 1 file changed, 1 deletion(-)

diff --git a/script/trees b/script/trees
index 7287280d..f0071d5e 100755
--- a/script/trees
+++ b/script/trees
@@ -170,7 +170,6 @@ check_cross_compiler()
 		export CROSS_COMPILE="${xarch% *}-"
 		[ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
 
-		[ -d "$cbdir/util/crossgcc/xgcc/$_xarch/" ] && continue
 		x_ make -C "$cbdir" crossgcc-${_xarch%-*} $cbmakeargs
 	done
 }

From 19e7c1eabb3f1f00b8329c3832f239c75041b05d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 24 Jun 2024 14:23:56 +0100
Subject: [PATCH 0608/1549] trees: try xgcc build twice if first attempt fails

sometimes buildgcc just fails for like no reason. we had this
the other day and another fix was made to the trees script, to
mitigate; the user ran it again and buildgcc worked just fine.

run it twice, and then call err only if the second one fails.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/script/trees b/script/trees
index f0071d5e..2619892f 100755
--- a/script/trees
+++ b/script/trees
@@ -170,8 +170,11 @@ check_cross_compiler()
 		export CROSS_COMPILE="${xarch% *}-"
 		[ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
 
-		x_ make -C "$cbdir" crossgcc-${_xarch%-*} $cbmakeargs
-	done
+		# sometimes buildgcc fails for like no reason. try twice.
+		make -C "$cbdir" crossgcc-${_xarch%-*} $cbmakeargs || \
+		    make -C "$cbdir" crossgcc-${_xarch%-*} $cbmakeargs || \
+		    $err "!mkxgcc $project/$xtree '${_xarch%-*}' '$cbmakeargs'"
+	done; return 0
 }
 
 check_coreboot_utils()

From 6753222d0ec038d4c201f99cc75d0440457044e3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 24 Jun 2024 17:28:25 +0100
Subject: [PATCH 0609/1549] roms: build coreboot early to avoid duplicate work

we're building it per coreboot configuration file, rather
than per-target; the latter is more appropriate, and saves
on compilation time.

do it per-target.cfg, not per coreboot configuration.

this works because the trees script compiles all images
per target, for each given coreboot configuration within
that target, e.g. libgfxinit _corebootfb and _txtmode.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/script/roms b/script/roms
index 6ea6a1e1..1e3fcbc6 100755
--- a/script/roms
+++ b/script/roms
@@ -91,6 +91,7 @@ configure_target()
 
 	# Override the above defaults using target.cfg
 	eval `setcfg "$targetdir/target.cfg"`
+	x_ ./update trees -b coreboot $board
 
 	[ -z "$tree" ] && $err "$board: tree not defined"
 	[ "$xbmk_release" = "y" ] && [ "$release" = "n" ] && return 1
@@ -135,8 +136,6 @@ build_board()
 
 build_roms()
 {
-	x_ ./update trees -b coreboot $board
-
 	cbuild="$cbelfdir/$board/${initmode}_$displaymode"
 	[ "$initmode" = "normal" ] && cbuild="${cbuild%"_$displaymode"}"
 	x_ cp "$cbuild/coreboot.rom" "$tmprom"

From 2b7df7ab2c96a5e7f4e19b14843ede54b145d81f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 24 Jun 2024 17:35:44 +0100
Subject: [PATCH 0610/1549] roms: rename functions for extra clarity

the names of these functions do not match their true
intent. fix that by renaming them appropriately.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/script/roms b/script/roms
index 1e3fcbc6..43925c3b 100755
--- a/script/roms
+++ b/script/roms
@@ -55,7 +55,7 @@ main()
 	for x in $boards; do
 		[ -n "$ser" ] && mkserprogfw "$ser" "$x"
 		[ -z "$ser" ] && [ -d "config/coreboot/$x/config" ] && \
-		    configure_target "$x" && build_board && \
+		    configure_target "$x" && build_roms && \
 		    [ -d "bin/$board" ] && targets="$targets, $x"; continue
 	done
 
@@ -116,7 +116,7 @@ configure_target()
 	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"; return 0
 }
 
-build_board()
+build_roms()
 {
 	x_ rm -Rf "$romdir"
 
@@ -129,20 +129,21 @@ build_board()
 			    [ "$displaymode" != "txtmode" ] && continue
 			cbcfg="$targetdir/config/${initmode}_$displaymode"
 			[ "$initmode" = "normal" ] && cbcfg="${cbcfg%_*}"
-			e "$cbcfg" f not || build_roms; x_ rm -f "$tmprom"
+			e "$cbcfg" f not || add_payloads; x_ rm -f "$tmprom"
 		done
 	done
 }
 
-build_roms()
+add_payloads()
 {
 	cbuild="$cbelfdir/$board/${initmode}_$displaymode"
 	[ "$initmode" = "normal" ] && cbuild="${cbuild%"_$displaymode"}"
 	x_ cp "$cbuild/coreboot.rom" "$tmprom"
 
-	[ "$payload_seabios" = "y" ] && build_seabios_roms
+	[ "$payload_seabios" = "y" ] && add_seabios_payload
 	[ "$payload_uboot" = "y" ] || return 0
 
+	# add u-boot payload
 	x_ ./update trees -b u-boot $board
 	ubdir="elf/u-boot/$board/$uboot_config"
 	ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \
@@ -153,7 +154,7 @@ build_roms()
 	cprom "$romdir/uboot_payload_${board}_${initmode}_$displaymode.rom"
 }
 
-build_seabios_roms()
+add_seabios_payload()
 {
 	_seabioself="elf/seabios/default/$initmode/bios.bin.elf"
 	x_ ./update trees -b seabios

From 9484eda5a710e3eeaa7c67eeac26afdb3fa7840f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 24 Jun 2024 17:41:43 +0100
Subject: [PATCH 0611/1549] roms: re-add final confirmation of targets

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 1 +
 1 file changed, 1 insertion(+)

diff --git a/script/roms b/script/roms
index 43925c3b..76b860cf 100755
--- a/script/roms
+++ b/script/roms
@@ -63,6 +63,7 @@ main()
 	    mkrom_tarball "bin/serprog_$ser" && return 0
 
 	[ -z "$ser" ] && [ -z "$targets" ] && $err "No images were compiled"
+	[ -z "$ser" ] && printf "ROMs built in bin/ for: %s\n" "${targets#, }"
 	printf "DO NOT flash from elf/ - use bin/ - ALSO:\n%s\n" "$kbnotice"
 }
 

From c9f26dbc94980c6fb094b72470f06ec1828fed88 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 24 Jun 2024 17:42:58 +0100
Subject: [PATCH 0612/1549] roms: make the bin/elf message more polite

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/roms b/script/roms
index 76b860cf..16eaf0a3 100755
--- a/script/roms
+++ b/script/roms
@@ -64,7 +64,7 @@ main()
 
 	[ -z "$ser" ] && [ -z "$targets" ] && $err "No images were compiled"
 	[ -z "$ser" ] && printf "ROMs built in bin/ for: %s\n" "${targets#, }"
-	printf "DO NOT flash from elf/ - use bin/ - ALSO:\n%s\n" "$kbnotice"
+	printf "Please flash from bin/, NOT elf/ - ALSO:\n%s\n" "$kbnotice"
 }
 
 mkserprogfw()

From 8af9f904c4c6d5a8e968e89d370919bbbf48a7ea Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 24 Jun 2024 18:24:50 +0100
Subject: [PATCH 0613/1549] roms: simplify build_roms()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 20 +++++++-------------
 1 file changed, 7 insertions(+), 13 deletions(-)

diff --git a/script/roms b/script/roms
index 16eaf0a3..48c1f52b 100755
--- a/script/roms
+++ b/script/roms
@@ -25,7 +25,7 @@ stm32dir="$stm32src/boards"
 # Disable all payloads by default.
 # target.cfg files have to specifically enable [a] payload(s)
 pv="payload_uboot payload_seabios payload_memtest t payload_grub"
-v="romdir initmode displaymode cbcfg targetdir tree release ubootelf"
+v="romdir initmode displaymode targetdir tree release ubootelf"
 v="$v board grub_scan_disk uboot_config grubtree grubelf tmpmv"
 eval `setvars "n" $pv`
 eval `setvars "" $v boards targets serdir ser`
@@ -121,18 +121,12 @@ build_roms()
 {
 	x_ rm -Rf "$romdir"
 
-	for it in "normal" "vgarom" "libgfxinit"; do
-		initmode="$it"; hmode="vesafb"
-		[ "$initmode" = "vgarom" ] || hmode="corebootfb"
-		modes="$hmode txtmode"
-		for dt in $modes; do
-			displaymode="$dt"; [ "$initmode" = "normal" ] && \
-			    [ "$displaymode" != "txtmode" ] && continue
-			cbcfg="$targetdir/config/${initmode}_$displaymode"
-			[ "$initmode" = "normal" ] && cbcfg="${cbcfg%_*}"
-			e "$cbcfg" f not || add_payloads; x_ rm -f "$tmprom"
-		done
-	done
+	for cbcfg in "$targetdir/config/"*; do
+		[ -f "$cbcfg" ] || continue; cn="${cbcfg##*/}"; dt="${cn#*_}" \
+		    && [ "$dt" = "$cn" ] && dt="txtmode"; displaymode="$dt"
+		initmode="${cn%%_*}"; chkvars initmode displaymode
+		e "$cbcfg" f not || add_payloads
+	done; x_ rm -f "$tmprom"
 }
 
 add_payloads()

From c661eca6b9e84c7ba036434e84461dd05727e832 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 24 Jun 2024 18:30:48 +0100
Subject: [PATCH 0614/1549] roms: optimise u-boot elf check

because we use crossgcc here, blindly running trees -f
means needlessly re-running buildgcc, which then checks
for gcc binaries, even though we already know that the
u-boot binary exists. skip this check if u-boot exists.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/script/roms b/script/roms
index 48c1f52b..06f58724 100755
--- a/script/roms
+++ b/script/roms
@@ -139,10 +139,9 @@ add_payloads()
 	[ "$payload_uboot" = "y" ] || return 0
 
 	# add u-boot payload
-	x_ ./update trees -b u-boot $board
-	ubdir="elf/u-boot/$board/$uboot_config"
-	ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \
-	    ubootelf="$ubdir/u-boot"
+	ubdir="elf/u-boot/$board/$uboot_config"; ubootelf="$ubdir/u-boot.elf" \
+	    && [ ! -f "$ubootelf" ] && ubootelf="$ubdir/u-boot"
+	[ -f "$ubootelf" ] || x_ ./update trees -b u-boot $board
 	[ -f "$ubootelf" ] || $err "$board: Can't find u-boot"
 
 	cbfs "$tmprom" "$ubootelf" "fallback/payload"

From 2960abd0088f46bf9b729e61d494b10b99601a45 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 24 Jun 2024 18:32:18 +0100
Subject: [PATCH 0615/1549] roms: remove redundant printf

we don't need this message here, because the final confirmation
at the end of main() says which targets were built. saying what
individual rom images were built is just needless bloat,
especially with the new simplified lbmk design; we no longer
provide lots of rom images with different keymaps, because we
now expect the user to insert a gkb file themselves with cbfstool.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 1 -
 1 file changed, 1 deletion(-)

diff --git a/script/roms b/script/roms
index 06f58724..8589f07b 100755
--- a/script/roms
+++ b/script/roms
@@ -184,7 +184,6 @@ add_seabios_payload()
 
 cprom()
 {
-	printf "Creating target image: %s\n" "$1"
 	x_ mkdir -p "${1%/*}"; x_ cp "$tmprom" "$1"
 	[ "$xbmk_release" = "y" ] && mksha512sum "$1" "vendorhashes" && \
 	    x_ ./vendor inject -r "$1" -b "$board" -n nuke; return 0

From 5e2308ce054f52e39644769728a5b6e8e9cb4426 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 24 Jun 2024 18:35:32 +0100
Subject: [PATCH 0616/1549] roms: remove unused variable name

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/roms b/script/roms
index 8589f07b..c5d8893b 100755
--- a/script/roms
+++ b/script/roms
@@ -24,7 +24,7 @@ stm32dir="$stm32src/boards"
 
 # Disable all payloads by default.
 # target.cfg files have to specifically enable [a] payload(s)
-pv="payload_uboot payload_seabios payload_memtest t payload_grub"
+pv="payload_uboot payload_seabios payload_memtest payload_grub"
 v="romdir initmode displaymode targetdir tree release ubootelf"
 v="$v board grub_scan_disk uboot_config grubtree grubelf tmpmv"
 eval `setvars "n" $pv`

From b4fb2510085dc454ec39fcc55619bd38173776ce Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 24 Jun 2024 18:39:53 +0100
Subject: [PATCH 0617/1549] roms main(): confirm what serprog images are built

just like we do for coreboot images, do it for serprog.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 1 +
 1 file changed, 1 insertion(+)

diff --git a/script/roms b/script/roms
index c5d8893b..5a315202 100755
--- a/script/roms
+++ b/script/roms
@@ -64,6 +64,7 @@ main()
 
 	[ -z "$ser" ] && [ -z "$targets" ] && $err "No images were compiled"
 	[ -z "$ser" ] && printf "ROMs built in bin/ for: %s\n" "${targets#, }"
+	[ -n "$ser" ] && printf "ROMs (serprog) built in bin/%s/\n" "$ser"
 	printf "Please flash from bin/, NOT elf/ - ALSO:\n%s\n" "$kbnotice"
 }
 

From 4e48fa808ec123962c0203282742f9ce641a40d3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 25 Jun 2024 00:12:18 +0100
Subject: [PATCH 0618/1549] lib.sh: simplify use of environment variables

don't have a separate variable for them.

just export them directly and use them directly.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh |  2 +-
 include/lib.sh | 20 ++++++++------------
 script/roms    |  6 +++---
 script/trees   |  6 +++---
 4 files changed, 15 insertions(+), 19 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 0c2e816c..e0eb196b 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -92,7 +92,7 @@ git_prep()
 	[ "$project" = "coreboot" ] && [ -n "$xtree" ] && [ $# -gt 2 ] && \
 	    [ "$xtree" != "$tree" ] && link_crossgcc "$_loc"
 
-	[ "$xbmk_release" = "y" ] && [ "$_loc" != "src/$project/$project" ] \
+	[ "$XBMK_RELEASE" = "y" ] && [ "$_loc" != "src/$project/$project" ] \
 	    && rmgit "$tmpgit"
 
 	move_repo "$_loc"
diff --git a/include/lib.sh b/include/lib.sh
index e4e33f0a..32499bc0 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -42,8 +42,8 @@ chkvars()
 	done
 }
 
-eval `setvars "" xbmk_release tmpdir _nogit version board boarddir relname \
-    versiondate threads projectname projectsite aur_notice cfgsdir datadir`
+eval `setvars "" tmpdir _nogit board boarddir relname versiondate projectsite \
+    projectname aur_notice cfgsdir datadir version`
 
 read -r projectname < projectname || :
 read -r projectsite < projectsite || :
@@ -104,16 +104,12 @@ fi
 
 # if "y": a coreboot target won't be built if target.cfg says release="n"
 # (this is used to exclude certain build targets from releases)
-[ -z "${XBMK_RELEASE+x}" ] && xbmk_release="n"
-[ -z "$xbmk_release" ] && xbmk_release="$XBMK_RELEASE"
-[ "$xbmk_release" = "n" ] || [ "$xbmk_release" = "y" ] || xbmk_release="n"
-export XBMK_RELEASE="$xbmk_release"
+[ -z "${XBMK_RELEASE+x}" ] && export XBMK_RELEASE="n"
+[ "$XBMK_RELEASE" = "y" ] || export XBMK_RELEASE="n"
 
-[ -z "${XBMK_THREADS+x}" ] || threads="$XBMK_THREADS"
-[ -z "$threads" ] && threads=1
-expr "X$threads" : "X-\{0,1\}[0123456789][0123456789]*$" \
-    1>/dev/null 2>/dev/null || threads=1 # user specified a non-integer
-export XBMK_THREADS="$threads"
+[ -z "${XBMK_THREADS+x}" ] && export XBMK_THREADS=1
+expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
+    1>/dev/null 2>/dev/null || export XBMK_THREADS=1 # user gave a non-integer
 
 x_() {
 	[ $# -lt 1 ] || $@ || $err "Unhandled non-zero exit: $@"; return 0
@@ -174,7 +170,7 @@ mktarball()
 	[ "${2%/*}" = "$2" ] || \
 		mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
 	printf "\nCreating archive: %s\n\n" "$2"
-	tar -c "$1" | xz -T$threads -9e > "$2" || $err "mktarball 2, $1"
+	tar -c "$1" | xz -T$XBMK_THREADS -9e > "$2" || $err "mktarball 2, $1"
 	mksha512sum "$2" "${2##*/}.sha512"
 }
 
diff --git a/script/roms b/script/roms
index 5a315202..d5eedd6a 100755
--- a/script/roms
+++ b/script/roms
@@ -59,7 +59,7 @@ main()
 		    [ -d "bin/$board" ] && targets="$targets, $x"; continue
 	done
 
-	[ -n "$ser" ] && [ "$xbmk_release" = "y" ] && \
+	[ -n "$ser" ] && [ "$XBMK_RELEASE" = "y" ] && \
 	    mkrom_tarball "bin/serprog_$ser" && return 0
 
 	[ -z "$ser" ] && [ -z "$targets" ] && $err "No images were compiled"
@@ -96,7 +96,7 @@ configure_target()
 	x_ ./update trees -b coreboot $board
 
 	[ -z "$tree" ] && $err "$board: tree not defined"
-	[ "$xbmk_release" = "y" ] && [ "$release" = "n" ] && return 1
+	[ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1
 	[ "$board" = "$tree" ] && return 1
 
 	cbdir="src/coreboot/$tree"
@@ -186,7 +186,7 @@ add_seabios_payload()
 cprom()
 {
 	x_ mkdir -p "${1%/*}"; x_ cp "$tmprom" "$1"
-	[ "$xbmk_release" = "y" ] && mksha512sum "$1" "vendorhashes" && \
+	[ "$XBMK_RELEASE" = "y" ] && mksha512sum "$1" "vendorhashes" && \
 	    x_ ./vendor inject -r "$1" -b "$board" -n nuke; return 0
 }
 
diff --git a/script/trees b/script/trees
index 2619892f..7f6f2f25 100755
--- a/script/trees
+++ b/script/trees
@@ -9,7 +9,7 @@ set -u -e
 . "include/lib.sh"
 . "include/git.sh"
 
-cbmakeargs="UPDATED_SUBMODULES=1 CPUS=$threads"
+cbmakeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 eval `setvars "" xarch cdir config config_name xlang mode makeargs \
     listfile project target target_dir targets tree _f target1 bootstrapargs \
     autoconfargs cmakedir elfdir autogenargs xtree`
@@ -185,7 +185,7 @@ check_coreboot_utils()
 
 		utilmode=""
 		[ -z "$mode" ] || utilmode="clean"
-		x_ make -C "$utilsrcdir" $utilmode -j$threads $cbmakeargs
+		x_ make -C "$utilsrcdir" $utilmode -j$XBMK_THREADS $cbmakeargs
 		[ -z "$mode" ] && [ ! -f "$utilelfdir/$util" ] && \
 			x_ mkdir -p "$utilelfdir" && \
 			x_ cp "$utilsrcdir/$util" "elf/$util/$1"
@@ -240,7 +240,7 @@ run_make_command()
 		printf "%s\n" "${version%%-*}" > "$cdir/.coreboot-version" \
 		    && makeargs="$makeargs $cbmakeargs"
 
-	make -C "$cdir" $mode -j$threads $makeargs || $err "!mk $cdir $mode"
+	make -C "$cdir" $mode -j$XBMK_THREADS $makeargs || $err "$cdir mk$mode"
 
 	[ "$project" = "grub" ] && [ -z "$mode" ] && mkpayload_grub
 

From 20ac7ec67ba31315b8cccf0ea70b6fa4a5d0efae Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 25 Jun 2024 00:18:12 +0100
Subject: [PATCH 0619/1549] lib.sh: simplify reading of version files

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 32499bc0..c21a4a1d 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -45,8 +45,9 @@ chkvars()
 eval `setvars "" tmpdir _nogit board boarddir relname versiondate projectsite \
     projectname aur_notice cfgsdir datadir version`
 
-read -r projectname < projectname || :
-read -r projectsite < projectsite || :
+for fv in projectname projectsite version versiondate; do
+	eval "[ ! -f "$fv" ] || read -r $fv < \"$fv\" || :"
+done
 
 setcfg()
 {
@@ -120,11 +121,9 @@ x_() {
 [ -e ".git" ] || [ -f "versiondate" ] || printf "1716415872\n" > versiondate || \
     $err "Cannot generate unknown versiondate file"
 
-[ ! -f version ] || read -r version < version || :
 version_="$version"
 [ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
     version="git-$(git rev-parse HEAD 2>&1)" || version="$version_"
-[ ! -f versiondate ] || read -r versiondate < versiondate || :
 versiondate_="$versiondate"
 [ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
     --pretty='%ct' HEAD)" || versiondate="$versiondate_"

From 1387dc0ae2912e09d092ece9b159f01061b0f521 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 25 Jun 2024 00:20:06 +0100
Subject: [PATCH 0620/1549] simplified lock message

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index c21a4a1d..85f3ac49 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -92,8 +92,7 @@ if [ "$tmpdir_was_set" = "y" ]; then
 	[ "${TMPDIR%_*}" = "/tmp/xbmk" ] || tmpdir_was_set="n"
 fi
 if [ "$tmpdir_was_set" = "n" ]; then
-	[ -f "lock" ] && \
-	    $err "$PWD/lock exists. If a build isn't going, delete and re-run."
+	[ -f "lock" ] && $err "$PWD/lock exists. Is a build running?"
 	export TMPDIR="/tmp"
 	tmpdir="$(mktemp -d -t xbmk_XXXXXXXX)"
 	export TMPDIR="$tmpdir"

From c79fb125eb798611269990eeda1affbe50e9665e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 25 Jun 2024 00:22:42 +0100
Subject: [PATCH 0621/1549] lib.sh: condense setvars() a bit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 85f3ac49..907cde47 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -27,13 +27,10 @@ err_()
 
 setvars()
 {
-	_setvars=""
-	[ $# -lt 2 ] && $err "setvars: too few arguments"
-	val="$1" && shift 1
-	for var in $@; do
+	_setvars="" && [ $# -lt 2 ] && $err "setvars: too few arguments"
+	val="$1" && shift 1 && for var in $@; do
 		_setvars="$var=\"$val\"; $_setvars"
-	done
-	printf "%s\n" "${_setvars% }"
+	done; printf "%s\n" "${_setvars% }"
 }
 chkvars()
 {

From 2b4c6ee5ca77652ba6080dc76acd665f626f346d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 25 Jun 2024 00:24:59 +0100
Subject: [PATCH 0622/1549] lib.sh: introduce mandatory check of projectname

error out if it's not set. ditto projectsite.

that way, if the files are accidentally deleted, or not
added in a derivative of the build system, you'll know.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/lib.sh b/include/lib.sh
index 907cde47..27cf184f 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -45,6 +45,7 @@ eval `setvars "" tmpdir _nogit board boarddir relname versiondate projectsite \
 for fv in projectname projectsite version versiondate; do
 	eval "[ ! -f "$fv" ] || read -r $fv < \"$fv\" || :"
 done
+chkvars projectname projectsite
 
 setcfg()
 {

From 1ab9189cbd3592f009140e03097cf75dd67504c3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 25 Jun 2024 09:54:22 +0100
Subject: [PATCH 0623/1549] roms: build coreboot *after* checking variables

otherwise, release=n is ignored and an image is built in
the elf/ directory, even if it's still skipped for bin/

avoid doing unnecessary work per-release by checking the
variables before building coreboot via script/trees

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/script/roms b/script/roms
index d5eedd6a..72cb4fc2 100755
--- a/script/roms
+++ b/script/roms
@@ -93,12 +93,13 @@ configure_target()
 
 	# Override the above defaults using target.cfg
 	eval `setcfg "$targetdir/target.cfg"`
-	x_ ./update trees -b coreboot $board
 
 	[ -z "$tree" ] && $err "$board: tree not defined"
 	[ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1
 	[ "$board" = "$tree" ] && return 1
 
+	x_ ./update trees -b coreboot $board
+
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 	[ -f "$cbfstool" ] || x_ ./update trees -b coreboot utils $tree

From 7f7b640d3adc40265383c7138f78621612824972 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 01:56:24 +0100
Subject: [PATCH 0624/1549] roms: re-add compression of coreboot images

i accidentally removed this feature, during prior cleanup.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/script/roms b/script/roms
index 72cb4fc2..63a4921b 100755
--- a/script/roms
+++ b/script/roms
@@ -56,7 +56,8 @@ main()
 		[ -n "$ser" ] && mkserprogfw "$ser" "$x"
 		[ -z "$ser" ] && [ -d "config/coreboot/$x/config" ] && \
 		    configure_target "$x" && build_roms && \
-		    [ -d "bin/$board" ] && targets="$targets, $x"; continue
+		    [ -d "bin/$board" ] && targets="$targets, $x" && \
+		    [ "$XBMK_RELEASE" = "y" ] && mkrom_tarball "bin/$x"
 	done
 
 	[ -n "$ser" ] && [ "$XBMK_RELEASE" = "y" ] && \

From 0e97e98fe16baa2ac1c8b17bd054fd697e22f956 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 02:31:54 +0100
Subject: [PATCH 0625/1549] trees: explicitly set mode for -b

doing nothing means that if a flag is passed, and then
another flag overriding it, the resulting action will
not be correct; only one flag should be provided anyway,
but some users may feel a bit more adventurous.

mitigate it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index 7f6f2f25..c3391f58 100755
--- a/script/trees
+++ b/script/trees
@@ -19,7 +19,7 @@ main()
 	while getopts f:b:m:u:c:x:s:l:n: option; do
 		_f="$1"
 		case "$1" in
-		-b) : ;;
+		-b) mode="" ;;
 		-u) mode="oldconfig" ;;
 		-m) mode="menuconfig" ;;
 		-c) mode="distclean" ;;

From a64e2db5899540bfcfff417fc407befd9daf364f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 02:33:45 +0100
Subject: [PATCH 0626/1549] trees: call err if multiple flags are provided

this script is designed to only run a single flag.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 1 +
 1 file changed, 1 insertion(+)

diff --git a/script/trees b/script/trees
index c3391f58..38674759 100755
--- a/script/trees
+++ b/script/trees
@@ -17,6 +17,7 @@ eval `setvars "" xarch cdir config config_name xlang mode makeargs \
 main()
 {
 	while getopts f:b:m:u:c:x:s:l:n: option; do
+		[ -n "$_f" ] && $err "only one flag is permitted"
 		_f="$1"
 		case "$1" in
 		-b) mode="" ;;

From f383b1ad70f6bca76612fb0e8709188a98ed93e1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 02:36:18 +0100
Subject: [PATCH 0627/1549] trees: only permit one single-tree project

the current logic for handling multiple single-tree projects
is quite error-prone, and uses recursion.

since we don't actually use it this way, remove that feature.

the most correct way to do it is with a for loop.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index 38674759..66cc76ef 100755
--- a/script/trees
+++ b/script/trees
@@ -31,7 +31,7 @@ main()
 		-n) mode="nconfig" ;;
 		*) $err "invalid option '-$option'" ;;
 		esac
-		shift; project="${OPTARG#src/}"; shift
+		project="${OPTARG#src/}"; shift 2
 	done
 	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
 	[ -z "$project" ] && $err "project name not specified"
@@ -57,8 +57,6 @@ main()
 
 build_projects()
 {
-	[ $# -gt 0 ] && x_ ./update trees $_f $@
-
 	if [ "$mode" = "fetch" ]; then
 		[ -f "CHANGELOG" ] && return 0
 		fetch_project_repo; return 0

From 9154ba5b8505797688ab1a399f985caaa60fc4d9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 02:38:22 +0100
Subject: [PATCH 0628/1549] trees: explicitly err if OPTARG is not set

we currently rely on -e to make this happen

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 1 +
 1 file changed, 1 insertion(+)

diff --git a/script/trees b/script/trees
index 66cc76ef..ccd45d19 100755
--- a/script/trees
+++ b/script/trees
@@ -31,6 +31,7 @@ main()
 		-n) mode="nconfig" ;;
 		*) $err "invalid option '-$option'" ;;
 		esac
+		[ -n "${OPTARG+x}" ] || $err "OPTARG not set"
 		project="${OPTARG#src/}"; shift 2
 	done
 	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"

From 19bc5845a6ab274bee52a28747ced067b264a259 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 02:45:11 +0100
Subject: [PATCH 0629/1549] trees: remove redundant space in printf

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index ccd45d19..449cda20 100755
--- a/script/trees
+++ b/script/trees
@@ -53,7 +53,7 @@ main()
 	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
 
 	[ -f "$listfile" ] || return 0
-	[ -z "$mode" ] && printf "\n\nDone! Check  %s/\n\n" "$elfdir"; return 0
+	[ -z "$mode" ] && printf "\n\nDone! Check %s/\n\n" "$elfdir"; return 0
 }
 
 build_projects()

From 671893a802cb9f7b684037062d0debd1c049addb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 02:52:46 +0100
Subject: [PATCH 0630/1549] lib.sh: condense setcfg() if/else logic

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 27cf184f..c57bbd0d 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -49,12 +49,9 @@ chkvars projectname projectsite
 
 setcfg()
 {
-	if [ $# -gt 1 ]; then
-		printf "e \"%s\" f missing && return %s;\n" "$1" "$2"
-	else
-		printf "e \"%s\" f missing && %s \"Missing config\";\n" "$1" \
-		    "$err"
-	fi
+	[ $# -gt 1 ] && printf "e \"%s\" f missing && return %s;\n" "$1" "$2"
+	[ $# -gt 1 ] || \
+		printf "e \"%s\" f not && %s \"Missing config\";\n" "$1" "$err"
 	printf ". \"%s\" || %s \"Could not read config\";\n" "$1" "$err"
 }
 

From fac74cd60a3d90e6e0df971b481a55b0a01050c4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 03:18:23 +0100
Subject: [PATCH 0631/1549] lib.sh: simplified TMPDIR handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             |  8 ++++----
 include/lib.sh    | 21 ++++++++-------------
 include/vendor.sh |  4 ++--
 script/roms       | 10 +++++-----
 4 files changed, 19 insertions(+), 24 deletions(-)

diff --git a/build b/build
index ef5a1109..6eae3aac 100755
--- a/build
+++ b/build
@@ -125,16 +125,16 @@ fetch_trees()
 
 fail()
 {
-	tmp_cleanup || printf "WARNING: can't rm tmpfiles: %s\n" "$tmpdir" 1>&2
+	tmp_cleanup || printf "WARNING: can't rm tmpfiles: %s\n" "$TMPDIR" 1>&2
 	err_ "${1}"
 }
 
 tmp_cleanup()
 {
-	[ "$tmpdir_was_set" = "n" ] || return 0
-	rm -Rf "$tmpdir" || return 1
+	[ "$xbmk_parent" = "y" ] || return 0
+	rm -Rf "$TMPDIR" || return 1
 	rm -f lock || return 1
 }
 
 main $@
-tmp_cleanup || err_ "can't rm tmpdir upon non-zero exit: $tmpdir"
+tmp_cleanup || err_ "can't rm TMPDIR upon non-zero exit: $TMPDIR"
diff --git a/include/lib.sh b/include/lib.sh
index c57bbd0d..8b896f6b 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -10,7 +10,6 @@ _ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
 kbnotice="Insert a .gkb file from config/data/grub/keymap/ as keymap.gkb \
 if you want a custom keymap in GRUB; use cbfstool from elf/cbfstool."
 
-tmpdir_was_set="y"
 cbdir="src/coreboot/default"
 cbelfdir="elf/coreboot_nopayload_DO_NOT_FLASH"
 ifdtool="elf/ifdtool/default/ifdtool"
@@ -39,8 +38,8 @@ chkvars()
 	done
 }
 
-eval `setvars "" tmpdir _nogit board boarddir relname versiondate projectsite \
-    projectname aur_notice cfgsdir datadir version`
+eval `setvars "" _nogit board boarddir relname versiondate projectsite \
+    projectname aur_notice cfgsdir datadir version xbmk_parent`
 
 for fv in projectname projectsite version versiondate; do
 	eval "[ ! -f "$fv" ] || read -r $fv < \"$fv\" || :"
@@ -82,19 +81,15 @@ install_packages()
 id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
 [ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
 
-[ -z "${TMPDIR+x}" ] && tmpdir_was_set="n"
-if [ "$tmpdir_was_set" = "y" ]; then
-	[ "${TMPDIR%_*}" = "/tmp/xbmk" ] || tmpdir_was_set="n"
-fi
-if [ "$tmpdir_was_set" = "n" ]; then
+[ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || unset TMPDIR
+[ -n "${TMPDIR+x}" ] && export TMPDIR="$TMPDIR"
+
+if [ -z "${TMPDIR+x}" ]; then
 	[ -f "lock" ] && $err "$PWD/lock exists. Is a build running?"
 	export TMPDIR="/tmp"
-	tmpdir="$(mktemp -d -t xbmk_XXXXXXXX)"
-	export TMPDIR="$tmpdir"
+	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
 	touch lock || $err "cannot create 'lock' file"
-else
-	export TMPDIR="$TMPDIR"
-	tmpdir="$TMPDIR"
+	xbmk_parent="y"
 fi
 
 # if "y": a coreboot target won't be built if target.cfg says release="n"
diff --git a/include/vendor.sh b/include/vendor.sh
index 949ffc48..d1a243e3 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -41,10 +41,10 @@ getcfg()
 
 	[ -z "$vcfg" ] && printf "%s: vcfg unset\n" "$board" 1>&2 && return 1
 
-	check_defconfig "$boarddir" 1>"$tmpdir/vendorcfg.list" && return 1
+	check_defconfig "$boarddir" 1>"$TMPDIR/vendorcfg.list" && return 1
 	while read -r cbcfgfile; do
 		set +u +e; . "$cbcfgfile" 2>/dev/null; set -u -e
-	done < "$tmpdir/vendorcfg.list"
+	done < "$TMPDIR/vendorcfg.list"
 
 	[ -z "$tree" ] && $err "getcfg $boarddir: tree undefined"
 	cbdir="src/coreboot/$tree"
diff --git a/script/roms b/script/roms
index 63a4921b..f5c90c13 100755
--- a/script/roms
+++ b/script/roms
@@ -10,7 +10,7 @@ set -u -e
 
 . "include/lib.sh"
 
-tmprom="$tmpdir/rom"
+tmprom="$TMPDIR/rom"
 
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 cfgsdir="config/coreboot"
@@ -49,8 +49,8 @@ main()
 	    config/coreboot)" || $err "can't list coreboot boards"
 
 	[ -n "$ser" ] && \
-	    eval "serlist \"\$${ser}dir\" > \"\$tmpdir/ser\" || $err \"!ser\""
-	[ -n "$ser" ] && [ -z "$boards" ] && boards="$(cat "$tmpdir/ser")"
+	    eval "serlist \"\$${ser}dir\" > \"\$TMPDIR/ser\" || $err \"!ser\""
+	[ -n "$ser" ] && [ -z "$boards" ] && boards="$(cat "$TMPDIR/ser")"
 
 	for x in $boards; do
 		[ -n "$ser" ] && mkserprogfw "$ser" "$x"
@@ -173,8 +173,8 @@ add_seabios_payload()
 		x_ ./update trees -b grub $grubtree
 		cbfs "$tmprom" "$grubelf" "img/grub2"
 		printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
-		    > "$tmpdir/tmpcfg" || $err "$board: !insert scandisk"
-		cbfs "$tmprom" "$tmpdir/tmpcfg" scan.cfg raw
+		    > "$TMPDIR/tmpcfg" || $err "$board: !insert scandisk"
+		cbfs "$tmprom" "$TMPDIR/tmpcfg" scan.cfg raw
 	fi
 
 	[ "$payload_memtest" = "y" ] && x_ ./update trees -b memtest86plus && \

From 44fb9873639301988b2a99e246243a83cc4fe1e2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 03:20:18 +0100
Subject: [PATCH 0632/1549] build: don't rm TMPDIR if it's /tmp

we override TMPDIR, setting it to /tmp/xbmk*C

if it's just set to tmp, that means we didn't set it properly,
which is a bug.

this patch protects against deletion of /tmp under such a
fault condition, if it were ever to occur in the future.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build b/build
index 6eae3aac..383e83cb 100755
--- a/build
+++ b/build
@@ -132,7 +132,7 @@ fail()
 tmp_cleanup()
 {
 	[ "$xbmk_parent" = "y" ] || return 0
-	rm -Rf "$TMPDIR" || return 1
+	[ "$TMPDIR" = "/tmp" ] || rm -Rf "$TMPDIR" || return 1
 	rm -f lock || return 1
 }
 

From ed6acfee84b674405d8227e3908f04d533febaf5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 03:23:31 +0100
Subject: [PATCH 0633/1549] lib.sh: make elf/coreboot* a dot directory

we don't want the user to flash coreboot from elf/, because
those images do not contain payloads. the user must flash from
bin/

ample warning is given, at build time, but the warning is written
in english. therefore, some people may not understand it, because
they may not even speak english.

hide the coreboot elf/ directory, to mitigate this possibility.
in most cases, this will probably prevent the average user from
flashing those images, since they likely won't see it.

the "DO NOT FLASH" warning is still included in that directory
name, while creating it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 8b896f6b..cac6b302 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -11,7 +11,7 @@ kbnotice="Insert a .gkb file from config/data/grub/keymap/ as keymap.gkb \
 if you want a custom keymap in GRUB; use cbfstool from elf/cbfstool."
 
 cbdir="src/coreboot/default"
-cbelfdir="elf/coreboot_nopayload_DO_NOT_FLASH"
+cbelfdir="elf/.coreboot_nopayload_DO_NOT_FLASH"
 ifdtool="elf/ifdtool/default/ifdtool"
 cbfstool="elf/cbfstool/default/cbfstool"
 tmpgit="$PWD/tmp/gitclone"

From ffdecb0ce191e1251d2ee78cf0b8ae9124346a6a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 03:36:06 +0100
Subject: [PATCH 0634/1549] trees: shorten the final confirmation message

must stay below 80 characters per line

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index 449cda20..a3e33f13 100755
--- a/script/trees
+++ b/script/trees
@@ -53,7 +53,7 @@ main()
 	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
 
 	[ -f "$listfile" ] || return 0
-	[ -z "$mode" ] && printf "\n\nDone! Check %s/\n\n" "$elfdir"; return 0
+	[ -z "$mode" ] && printf "\n\nOK! Check %s/\n\n" "$elfdir"; return 0
 }
 
 build_projects()

From 7b8c2bd412f84c691e42f8d341184d17726ed02a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 03:41:30 +0100
Subject: [PATCH 0635/1549] lib.sh: condense e() a bit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index cac6b302..1e860794 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -56,8 +56,7 @@ setcfg()
 
 e()
 {
-	es_t="e"
-	[ $# -gt 1 ] && es_t="$2"
+	es_t="e" && [ $# -gt 1 ] && es_t="$2"
 	es2="already exists"
 	estr="[ -$es_t \"\$1\" ] || return 1"
 	[ $# -gt 2 ] && estr="[ -$es_t \"\$1\" ] && return 1" && es2="missing"

From 144b3c93a4d84d3095e1e0def1464025fff27976 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 14:05:19 +0100
Subject: [PATCH 0636/1549] trees: condense elfcheck() a bit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index a3e33f13..13c818ab 100755
--- a/script/trees
+++ b/script/trees
@@ -207,9 +207,8 @@ elfcheck()
 {
 	# TODO: very hacky check. do it properly (based on build.list)
 	for elftest in "$dest_dir"/*; do
-		[ -e "$elftest" ] || continue
-		e "$elftest" f && return 1
-	done
+		[ -e "$elftest" ] && e "$elftest" f && return 1
+	done; return 0
 }
 
 handle_makefile()

From 35d09e426a82f805001c371006f59fffe4b0450e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 14:06:08 +0100
Subject: [PATCH 0637/1549] lib.sh: add a return to the end of check_defconfig

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 1e860794..5b21d81c 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -127,7 +127,7 @@ check_defconfig()
 	[ -d "$1" ] || $err "Target '$1' not defined."
 	for x in "$1"/config/*; do
 		[ -f "$x" ] && printf "%s\n" "$x" && return 1
-	done
+	done; return 0
 }
 
 remkdir()

From 6fc7cd3c17f2284768e4a0416ecaa67f71da8052 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 14:06:41 +0100
Subject: [PATCH 0638/1549] lib.sh: condense singletree() a bit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 5b21d81c..a1b6aa0d 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -183,9 +183,8 @@ rmgit()
 singletree()
 {
 	for targetfile in "config/${1}/"*/target.cfg; do
-		[ -e "$targetfile" ] || continue
-		[ -f "$targetfile" ] && return 1
-	done
+		[ -e "$targetfile" ] && [ -f "$targetfile" ] && return 1
+	done; return 0
 }
 
 download()

From 9aec992ff20955b2e1282338e041d6ed452e559a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 14:32:20 +0100
Subject: [PATCH 0639/1549] lib.sh: move git_err() to build

it's only used in the main build script, so move it there.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build          | 6 ++++++
 include/lib.sh | 6 ------
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/build b/build
index 383e83cb..080c1e16 100755
--- a/build
+++ b/build
@@ -54,6 +54,12 @@ git_init()
 	git tag -a "$version" -m "$projectname $version" || return 1
 }
 
+git_err()
+{
+	printf "You need to set git name/email, like so:\n%s\n\n" "$1" 1>&2
+	$err "Git name/email not configured"
+}
+
 mkrelease()
 {
 	export XBMK_RELEASE="y"
diff --git a/include/lib.sh b/include/lib.sh
index a1b6aa0d..cddcede9 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -136,12 +136,6 @@ remkdir()
 	mkdir -p "$1" || $err "remkdir: !mkdir -p \"$1\""
 }
 
-git_err()
-{
-	printf "You need to set git name/email, like so:\n%s\n\n" "$1" 1>&2
-	$err "Git name/email not configured"
-}
-
 mkrom_tarball()
 {
 	printf "%s\n" "$version" > "$1/version" || $err "$1 !version"

From eb9c1872b6e66bed49c267125daeb1c060f4f392 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 14:52:28 +0100
Subject: [PATCH 0640/1549] git.sh: remove unnecessary check

the trees script itself will check that the directory
exists, and exit with zero status if it does, without
doing anything else other than the return.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index e0eb196b..d13d20d2 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -52,8 +52,7 @@ fetch_project_repo()
 
 	chkvars url
 
-	[ -n "$xtree" ] && [ ! -d "src/coreboot/$xtree" ] && \
-		x_ ./update trees -f coreboot "$xtree"
+	[ -n "$xtree" ] && x_ ./update trees -f coreboot "$xtree"
 	[ -z "$depend" ] || for d in $depend ; do
 		printf "'%s' needs '%s'; grabbing '%s'\n" "$project" "$d" "$d"
 		x_ ./update trees -f $d

From 7a15ba18cb43d723234751b0d6ff6b82fc615f97 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 15:55:56 +0100
Subject: [PATCH 0641/1549] trees: avoid kconfig make commands generically

don't hardcode the check based on whether the current
project is grub. instead, define "btype" in target.cfg

if unset, we assume kconfig and permit kconfig commands
e.g. make menuconfig, make silentoldconfig, etc

this is to avoid the deadliest of sins:
project-specific hacks

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/default/target.cfg |  1 +
 config/grub/nvme/target.cfg    |  1 +
 config/grub/xhci/target.cfg    |  1 +
 config/uefitool/target.cfg     |  1 +
 script/trees                   | 18 +++++++++---------
 5 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/config/grub/default/target.cfg b/config/grub/default/target.cfg
index fa5735e9..df558a94 100644
--- a/config/grub/default/target.cfg
+++ b/config/grub/default/target.cfg
@@ -3,3 +3,4 @@ rev="8719cc2040368d43ab2de0b6e1b850b2c9cfc5b7"
 bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
 autoconfargs="--with-platform=coreboot --disable-werror"
 makeargs="FS_PAYLOAD_MODULES=\"\""
+btype="autohell"
diff --git a/config/grub/nvme/target.cfg b/config/grub/nvme/target.cfg
index a85c97f5..2f84f110 100644
--- a/config/grub/nvme/target.cfg
+++ b/config/grub/nvme/target.cfg
@@ -3,3 +3,4 @@ rev="8719cc2040368d43ab2de0b6e1b850b2c9cfc5b7"
 bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
 autoconfargs="--with-platform=coreboot --disable-werror"
 makeargs="FS_PAYLOAD_MODULES=\"\""
+btype="autohell"
diff --git a/config/grub/xhci/target.cfg b/config/grub/xhci/target.cfg
index 34ab2d24..2c6d6080 100644
--- a/config/grub/xhci/target.cfg
+++ b/config/grub/xhci/target.cfg
@@ -3,3 +3,4 @@ rev="8719cc2040368d43ab2de0b6e1b850b2c9cfc5b7"
 bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
 autoconfargs="--with-platform=coreboot --disable-werror"
 makeargs="FS_PAYLOAD_MODULES=\"\""
+btype="autohell"
diff --git a/config/uefitool/target.cfg b/config/uefitool/target.cfg
index 98d5e03d..909568a7 100644
--- a/config/uefitool/target.cfg
+++ b/config/uefitool/target.cfg
@@ -1 +1,2 @@
 cmakedir="UEFIExtract"
+btype="cmake"
diff --git a/script/trees b/script/trees
index 13c818ab..4d71dbbe 100755
--- a/script/trees
+++ b/script/trees
@@ -11,8 +11,8 @@ set -u -e
 
 cbmakeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 eval `setvars "" xarch cdir config config_name xlang mode makeargs \
-    listfile project target target_dir targets tree _f target1 bootstrapargs \
-    autoconfargs cmakedir elfdir autogenargs xtree`
+    elfdir project target target_dir targets tree _f target1 bootstrapargs \
+    autoconfargs cmakedir listfile autogenargs xtree btype`
 
 main()
 {
@@ -63,7 +63,7 @@ build_projects()
 		fetch_project_repo; return 0
 	fi
 
-	load_project_config "$cfgsdir"
+	load_project_config "$cfgsdir" || return 0
 	[ -f "$listfile" ] || listfile="" # optional on single-tree
 
 	dest_dir="$elfdir"
@@ -131,7 +131,7 @@ handle_src_tree()
 		fetch_project_trees; return 1
 	fi
 
-	load_project_config "$target_dir"
+	load_project_config "$target_dir" || return 1
 	x_ mkdir -p "$elfdir/$target"
 
 	chkvars tree
@@ -153,8 +153,10 @@ handle_src_tree()
 load_project_config()
 {
 	eval `setvars "" xarch xlang tree bootstrapargs autoconfargs xtree \
-	    tree_depend makeargs`
-	eval `setcfg "$1/target.cfg" 0`; return 0
+	    tree_depend makeargs btype`
+	eval `setcfg "$1/target.cfg" 0`
+	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || \
+	    return 1; return 0
 }
 
 check_cross_compiler()
@@ -213,11 +215,9 @@ elfcheck()
 
 handle_makefile()
 {
-	[ "$project" = "grub" ] && [ "${mode%config}" != "$mode" ] && return 0
-
 	check_makefile "$cdir" && x_ make clean -C "$cdir"
 	x_ cp "$config" "$cdir/.config"
-	[ -n "$mode" ] || [ "$project" = "grub" ] || make -C "$cdir" \
+	[ -n "$mode" ] || [ -n "$btype" ] || make -C "$cdir" \
 	    silentoldconfig || make -C "$cdir" oldconfig || :
 
 	run_make_command || $err "handle_makefile $cdir: no makefile!"

From 119cebc4d8615b669b935b1407deccb4c4198330 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 16:09:41 +0100
Subject: [PATCH 0642/1549] roms: remove unnecessary assignment to cbdir

cbdir isn't used in this script

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 1 -
 1 file changed, 1 deletion(-)

diff --git a/script/roms b/script/roms
index f5c90c13..8d5d1401 100755
--- a/script/roms
+++ b/script/roms
@@ -101,7 +101,6 @@ configure_target()
 
 	x_ ./update trees -b coreboot $board
 
-	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 	[ -f "$cbfstool" ] || x_ ./update trees -b coreboot utils $tree
 

From 732c5908df1fa8f49af34c7bdb98febc801343c7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 16:12:30 +0100
Subject: [PATCH 0643/1549] lib.sh: remove unused cbdir variable

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh    | 1 -
 include/vendor.sh | 2 +-
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index cddcede9..3f41b872 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -10,7 +10,6 @@ _ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
 kbnotice="Insert a .gkb file from config/data/grub/keymap/ as keymap.gkb \
 if you want a custom keymap in GRUB; use cbfstool from elf/cbfstool."
 
-cbdir="src/coreboot/default"
 cbelfdir="elf/.coreboot_nopayload_DO_NOT_FLASH"
 ifdtool="elf/ifdtool/default/ifdtool"
 cbfstool="elf/cbfstool/default/cbfstool"
diff --git a/include/vendor.sh b/include/vendor.sh
index d1a243e3..0eb9f3f0 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -24,7 +24,7 @@ eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_KBC1126_FW1 release DL_url \
     CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE nukemode \
     CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB cbfstoolref \
-    CONFIG_REFCODE_BLOB_FILE`
+    CONFIG_REFCODE_BLOB_FILE cbdir`
 
 vendor_download()
 {

From 93ff80d96d1c1565c131b43cb2d9247aabac3b03 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 16:33:30 +0100
Subject: [PATCH 0644/1549] trees: set btype if target.cfg doesn't exist

set it to "auto", because otherwise it'll be unset,
which means that kconfig type is assumed.

the build system is designed in such a way that multi-tree
is assumed, if the target build system uses kconfig files.

target.cfg is optional on single-tree but not multi-tree,
so it's ok to set something here.

basically, kconfig-type projects will never be single-tree.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 1 +
 1 file changed, 1 insertion(+)

diff --git a/script/trees b/script/trees
index 4d71dbbe..85fe4a26 100755
--- a/script/trees
+++ b/script/trees
@@ -154,6 +154,7 @@ load_project_config()
 {
 	eval `setvars "" xarch xlang tree bootstrapargs autoconfargs xtree \
 	    tree_depend makeargs btype`
+	[ -f "$1/target.cfg" ] || btype="auto"
 	eval `setcfg "$1/target.cfg" 0`
 	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || \
 	    return 1; return 0

From e1e04aa80d2f80ef9e79fbe499c8a03f351943d4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 16:38:49 +0100
Subject: [PATCH 0645/1549] trees: err if target.cfg not given if multi-tree

it was always by design that an error should occur, if a
target.cfg file does not exist on multi-tree projects,
but we previously did not support target.cfg files on
single-tree projects.

single-tree target.cfg support was later added, and it was
done by making target.cfg optional there, but i accidentally
made it optional on multi-tree projects.

in practise, all multi-tree projects included target.cfg,
but this was not being enforced in code.

this patch should fix the issue.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/script/trees b/script/trees
index 85fe4a26..50171608 100755
--- a/script/trees
+++ b/script/trees
@@ -63,7 +63,7 @@ build_projects()
 		fetch_project_repo; return 0
 	fi
 
-	load_project_config "$cfgsdir" || return 0
+	load_project_config "$cfgsdir" 0 || return 0
 	[ -f "$listfile" ] || listfile="" # optional on single-tree
 
 	dest_dir="$elfdir"
@@ -155,7 +155,12 @@ load_project_config()
 	eval `setvars "" xarch xlang tree bootstrapargs autoconfargs xtree \
 	    tree_depend makeargs btype`
 	[ -f "$1/target.cfg" ] || btype="auto"
-	eval `setcfg "$1/target.cfg" 0`
+
+	# target.cfg optional on single-tree so return if missing.
+	# target.cfg mandatory on multi-tree so err if missing.
+	_setcfgarg="" && [ $# -gt 1 ] && _setcfgarg="$2"
+	eval `setcfg "$1/target.cfg" $_setcfgarg`
+
 	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || \
 	    return 1; return 0
 }

From 902b98d1acc424202107959c43fc23e2e7011a07 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 16:41:23 +0100
Subject: [PATCH 0646/1549] trees: rename build_projects to build_project

the script used to support building multiple single-tree
projects, but this behaviour was buggy and unused, so it
was removed.

rename the build_projects variable accordingly.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/script/trees b/script/trees
index 50171608..97bc03bb 100755
--- a/script/trees
+++ b/script/trees
@@ -46,7 +46,7 @@ main()
 
 	remkdir "${tmpgit%/*}"
 
-	_cmd="build_projects"
+	_cmd="build_project"
 	singletree "$project" || _cmd="build_targets"
 	$_cmd $@
 
@@ -56,7 +56,7 @@ main()
 	[ -z "$mode" ] && printf "\n\nOK! Check %s/\n\n" "$elfdir"; return 0
 }
 
-build_projects()
+build_project()
 {
 	if [ "$mode" = "fetch" ]; then
 		[ -f "CHANGELOG" ] && return 0

From c59fbb3651b18da63e6521fb902567e660a8e8a1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 16:43:35 +0100
Subject: [PATCH 0647/1549] trees: simplify single/multi handling in main()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/script/trees b/script/trees
index 97bc03bb..3da74fe9 100755
--- a/script/trees
+++ b/script/trees
@@ -46,8 +46,7 @@ main()
 
 	remkdir "${tmpgit%/*}"
 
-	_cmd="build_project"
-	singletree "$project" || _cmd="build_targets"
+	_cmd="build_targets" && singletree "$project" && _cmd="build_project"
 	$_cmd $@
 
 	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0

From 136787185deec64ef8a08a63bfc433bb5b210203 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 16:51:48 +0100
Subject: [PATCH 0648/1549] trees: don't hardcode use of mkpayload_grub

instead, make it a helper function, defined in target.cfg

this means that we can also do the same with other projects
in the future, and it is expected that we will have to.

these helper functions are used in cases where we want
additional actions to be performed.

actually, the helper could be anything. for example, you
could write:

mkhelper="./build foo bar"

and it would do that (at the point of execution, PWD
is the root directory of the build system)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/default/target.cfg | 1 +
 config/grub/nvme/target.cfg    | 1 +
 config/grub/xhci/target.cfg    | 1 +
 script/trees                   | 7 ++++---
 4 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/config/grub/default/target.cfg b/config/grub/default/target.cfg
index df558a94..a5936693 100644
--- a/config/grub/default/target.cfg
+++ b/config/grub/default/target.cfg
@@ -4,3 +4,4 @@ bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
 autoconfargs="--with-platform=coreboot --disable-werror"
 makeargs="FS_PAYLOAD_MODULES=\"\""
 btype="autohell"
+mkhelper="mkpayload_grub"
diff --git a/config/grub/nvme/target.cfg b/config/grub/nvme/target.cfg
index 2f84f110..f5e95daf 100644
--- a/config/grub/nvme/target.cfg
+++ b/config/grub/nvme/target.cfg
@@ -4,3 +4,4 @@ bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
 autoconfargs="--with-platform=coreboot --disable-werror"
 makeargs="FS_PAYLOAD_MODULES=\"\""
 btype="autohell"
+mkhelper="mkpayload_grub"
diff --git a/config/grub/xhci/target.cfg b/config/grub/xhci/target.cfg
index 2c6d6080..3cdcb5d8 100644
--- a/config/grub/xhci/target.cfg
+++ b/config/grub/xhci/target.cfg
@@ -4,3 +4,4 @@ bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
 autoconfargs="--with-platform=coreboot --disable-werror"
 makeargs="FS_PAYLOAD_MODULES=\"\""
 btype="autohell"
+mkhelper="mkpayload_grub"
diff --git a/script/trees b/script/trees
index 3da74fe9..781e4055 100755
--- a/script/trees
+++ b/script/trees
@@ -12,7 +12,7 @@ set -u -e
 cbmakeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 eval `setvars "" xarch cdir config config_name xlang mode makeargs \
     elfdir project target target_dir targets tree _f target1 bootstrapargs \
-    autoconfargs cmakedir listfile autogenargs xtree btype`
+    autoconfargs cmakedir listfile autogenargs xtree btype mkhelper`
 
 main()
 {
@@ -152,7 +152,7 @@ handle_src_tree()
 load_project_config()
 {
 	eval `setvars "" xarch xlang tree bootstrapargs autoconfargs xtree \
-	    tree_depend makeargs btype`
+	    tree_depend makeargs btype mkhelper`
 	[ -f "$1/target.cfg" ] || btype="auto"
 
 	# target.cfg optional on single-tree so return if missing.
@@ -246,7 +246,8 @@ run_make_command()
 
 	make -C "$cdir" $mode -j$XBMK_THREADS $makeargs || $err "$cdir mk$mode"
 
-	[ "$project" = "grub" ] && [ -z "$mode" ] && mkpayload_grub
+	[ -z "$mkhelper" ] || [ -n "$mode" ] || $mkhelper || \
+	    $err "$cdir: helper command failed: $mkhelper" # eg mkpayload_grub
 
 	[ "$mode" != "clean" ] && return 0
 	make -C "$cdir" distclean 2>/dev/null || :

From fd037722adaa94c508bec70931f1440dc493f92f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 27 Jun 2024 22:18:01 +0100
Subject: [PATCH 0649/1549] remove use of _xm variable in the build system

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build          | 19 +++++++++----------
 include/git.sh |  5 ++---
 2 files changed, 11 insertions(+), 13 deletions(-)

diff --git a/build b/build
index 080c1e16..b7af9048 100755
--- a/build
+++ b/build
@@ -16,7 +16,7 @@ fi
 . "include/vendor.sh"
 . "include/mrc.sh"
 
-eval `setvars "" vdir src_dirname srcdir _xm mode xp`
+eval `setvars "" vdir src_dirname srcdir mode xp`
 err="fail"
 
 main()
@@ -90,9 +90,8 @@ mkrelease()
 
 build_release()
 {
-	_xm="build_release $vdir"
 	(
-	cd "$srcdir" || $err "$_xm: !cd \"$srcdir\""
+	cd "$srcdir" || $err "$vdir: !cd \"$srcdir\""
 	fetch_trees
 	x_ mv src/docs docs
 	) || $err "can't create release files"
@@ -102,18 +101,18 @@ build_release()
 	rm -f "$srcdir/lock" || $err "can't remove lock file in $srcdir"
 
 	(
-	cd "${srcdir%/*}" || $err "$_xm: mktarball \"$srcdir\""
-	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || $err "$_xm: mksrc"
+	cd "${srcdir%/*}" || $err "$vdir: mktarball \"$srcdir\""
+	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || $err "$vdir: mksrc"
 	) || $err "can't create src tarball"
 	[ "$mode" = "src" ] && return 0
 
 	touch "$srcdir/lock" || $err "can't make lock file in $srcdir/"
 
 	(
-	cd "$srcdir" || $err "$_xm: 2 !cd \"$srcdir\""
-	./build roms all || $err "$_xm: roms-all"
-	./build roms serprog rp2040 || $err "$_xm: rp2040"
-	./build roms serprog stm32 || $err "$_xm: stm32"
+	cd "$srcdir" || $err "$vdir: 2 !cd \"$srcdir\""
+	./build roms all || $err "$vdir: roms-all"
+	./build roms serprog rp2040 || $err "$vdir: rp2040"
+	./build roms serprog stm32 || $err "$vdir: stm32"
 	x_ mv bin ../roms
 	) || $err "can't build rom images"
 
@@ -123,7 +122,7 @@ build_release()
 fetch_trees()
 {
 	for x in $(ls -1 config/git); do
-		./update trees -f "$x" || $err "$_xm: fetch $x"
+		./update trees -f "$x" || $err "$vdir: fetch $x"
 		singletree "$x" || x_ rm -Rf "src/$x/$x"
 	done
 	rmgit .
diff --git a/include/git.sh b/include/git.sh
index d13d20d2..a73bdc16 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -2,7 +2,7 @@
 # Copyright (c) 2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
-eval `setvars "" _target rev _xm loc url bkup_url depend tree_depend xtree \
+eval `setvars "" _target rev loc url bkup_url depend tree_depend xtree \
     mdir subhash subrepo subrepo_bkup subfile subfile_bkup`
 
 fetch_project_trees()
@@ -20,7 +20,6 @@ fetch_config()
 	eval `setvars "" xtree tree_depend`
 	while true; do
 		eval `setvars "" rev tree`
-		_xm="fetch_config $project/$_target"
 		load_target_config "$_target"
 		[ "$_target" = "$tree" ] && break
 		_target="$tree"
@@ -31,7 +30,7 @@ fetch_config()
 
 load_target_config()
 {
-	[ -f "$cfgsdir/$1/seen" ] && $err "$_xm cfg: infinite loop in trees"
+	[ -f "$cfgsdir/$1/seen" ] && $err "$project/$_target: tree loop"
 	eval `setcfg "$cfgsdir/$1/target.cfg"`
 	touch "$cfgsdir/$1/seen" || $err "load_config $cfgsdir/$1: !mk seen"
 }

From 4afcbcb6414a035adcac14c244df4edffe84c554 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 13:22:37 +0100
Subject: [PATCH 0650/1549] vendor.sh: remove unnecessary cbdir check

we don't need to check this, because the trees script
already checks it. avoid unnecessary work.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 0eb9f3f0..bd651703 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -309,7 +309,7 @@ build_dependencies_inject()
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 	ifdtool="elf/ifdtool/$tree/ifdtool"
-	[ -d "$cbdir" ] || x_ ./update trees -f coreboot $tree
+	x_ ./update trees -f coreboot $tree
 	if [ ! -f "$cbfstool" ] || [ ! -f "$ifdtool" ]; then
 		x_ ./update trees -b coreboot utils $tree
 	fi

From a2f4eba581078887d402db91ed5372e25238e589 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 13:24:47 +0100
Subject: [PATCH 0651/1549] vendor.sh: simplify variable check in getcfg()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index bd651703..7d1c4459 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -38,15 +38,13 @@ vendor_download()
 getcfg()
 {
 	eval `setcfg "$boarddir/target.cfg"`
-
-	[ -z "$vcfg" ] && printf "%s: vcfg unset\n" "$board" 1>&2 && return 1
+	chkvars vcfg tree
 
 	check_defconfig "$boarddir" 1>"$TMPDIR/vendorcfg.list" && return 1
 	while read -r cbcfgfile; do
 		set +u +e; . "$cbcfgfile" 2>/dev/null; set -u -e
 	done < "$TMPDIR/vendorcfg.list"
 
-	[ -z "$tree" ] && $err "getcfg $boarddir: tree undefined"
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 

From 473f2778457b9a9e523cda11b50653518e837b46 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 13:33:50 +0100
Subject: [PATCH 0652/1549] vendor.sh: unified reading of board configs

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh    |  2 +-
 include/vendor.sh | 20 ++++++++++----------
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 3f41b872..84107420 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -37,7 +37,7 @@ chkvars()
 	done
 }
 
-eval `setvars "" _nogit board boarddir relname versiondate projectsite \
+eval `setvars "" _nogit board relname versiondate projectsite \
     projectname aur_notice cfgsdir datadir version xbmk_parent`
 
 for fv in projectname projectsite version versiondate; do
diff --git a/include/vendor.sh b/include/vendor.sh
index 7d1c4459..8f4daeed 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -24,22 +24,18 @@ eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_KBC1126_FW1 release DL_url \
     CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE nukemode \
     CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB cbfstoolref \
-    CONFIG_REFCODE_BLOB_FILE cbdir`
+    CONFIG_REFCODE_BLOB_FILE cbdir boarddir`
 
 vendor_download()
 {
 	export PATH="$PATH:/sbin"
 
 	[ $# -gt 0 ] || $err "No argument given"
-	board="$1"; boarddir="$cbcfgsdir/$board"
-	getcfg && bootstrap && getfiles; return 0
+	board="$1" && readcfg && getcfg && bootstrap && getfiles; return 0
 }
 
 getcfg()
 {
-	eval `setcfg "$boarddir/target.cfg"`
-	chkvars vcfg tree
-
 	check_defconfig "$boarddir" 1>"$TMPDIR/vendorcfg.list" && return 1
 	while read -r cbcfgfile; do
 		set +u +e; . "$cbcfgfile" 2>/dev/null; set -u -e
@@ -269,10 +265,7 @@ check_board()
 		release="y"
 		board="$(detect_board "$archive")"
 	fi
-
-	boarddir="$cbcfgsdir/$board"
-	eval `setcfg "$boarddir/target.cfg"`
-	[ -z "$tree" ] && $err "check_board $board: tree undefined"; return 0
+	readcfg
 }
 
 check_release()
@@ -302,6 +295,13 @@ detect_board()
 	printf "%s\n" "$board"
 }
 
+readcfg()
+{
+	boarddir="$cbcfgsdir/$board"
+	eval `setcfg "$boarddir/target.cfg"`
+	chkvars vcfg tree
+}
+
 build_dependencies_inject()
 {
 	cbdir="src/coreboot/$tree"

From d0f68a0fbf7685cbc471b64633adb060944549ff Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 13:38:43 +0100
Subject: [PATCH 0653/1549] vendor.sh: rename release to vrelease

also remove inject_vendorfiles() and merge it
into vendor_download()

the "release" variable is included in some target.cfg
files, which we put in config/coreboot/ and handle
here, so they could conflict with the release variable
used in vendor.sh, used for a different purpose. therefore,
rename it to "vrelease".

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 18 +++++++-----------
 1 file changed, 7 insertions(+), 11 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 8f4daeed..a14fbaef 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -21,10 +21,10 @@ eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_ME_BIN archive EC_url modifygbe rom \
     CONFIG_ME_BIN_PATH CONFIG_KBC1126_FIRMWARE _dest tree CONFIG_GBE_BIN_PATH \
     CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW2_OFFSET \
-    CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_KBC1126_FW1 release DL_url \
+    CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_KBC1126_FW1 cbdir DL_url \
     CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE nukemode \
     CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB cbfstoolref \
-    CONFIG_REFCODE_BLOB_FILE cbdir boarddir`
+    CONFIG_REFCODE_BLOB_FILE vrelease boarddir`
 
 vendor_download()
 {
@@ -246,7 +246,9 @@ vendor_inject()
 
 	check_board
 	build_dependencies_inject
-	inject_vendorfiles
+	[ "$vrelease" != "y" ] && patch_rom "$rom"
+	[ "$vrelease" = "y" ] && patch_release_roms
+
 	[ "$nukemode" = "nuke" ] && return 0
 	printf "Friendly reminder (this is *not* an error message):\n"
 	printf "Please ensure that the files were inserted correctly. ALSO:\n"
@@ -262,7 +264,7 @@ check_board()
 		[ -z "${rom+x}" ] && $err "check_board: no rom specified"
 		[ -n "${board+x}" ] || board="$(detect_board "$rom")"
 	else
-		release="y"
+		vrelease="y"
 		board="$(detect_board "$archive")"
 	fi
 	readcfg
@@ -315,12 +317,6 @@ build_dependencies_inject()
 	[ "$nukemode" = "nuke" ] || x_ ./vendor download $board; return 0
 }
 
-inject_vendorfiles()
-{
-	[ "$release" != "y" ] && eval "patch_rom \"$rom\"; return 0"
-	patch_release_roms
-}
-
 patch_release_roms()
 {
 	_tmpdir="tmp/romdir"
@@ -378,7 +374,7 @@ patch_rom()
 	[ "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" = "y" ] && \
 	    [ -n "$CONFIG_SMSC_SCH5545_EC_FW_FILE" ] && \
 		inject "sch5545_ecfw.bin" "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
-	[ "$modifygbe" = "true" ] && ! [ "$release" = "y" ] && \
+	[ "$modifygbe" = "true" ] && ! [ "$vrelease" = "y" ] && \
 		inject "IFD" "$CONFIG_GBE_BIN_PATH" "GbE"
 
 	printf "ROM image successfully patched: %s\n" "$rom"

From e3546f77b89faf3862de0b2ba5e0570933dad50d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 13:40:50 +0100
Subject: [PATCH 0654/1549] lib.sh: add a return to the end of chkvars()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 84107420..627e7ce1 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -34,7 +34,7 @@ chkvars()
 {
 	for var in $@; do
 		eval "[ -n "\${$var+x}" ] || \$err \"$var unset\""
-	done
+	done; return 0
 }
 
 eval `setvars "" _nogit board relname versiondate projectsite \

From 5725e3c4eead452818dfca232d4983f3a45eb67c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 13:41:22 +0100
Subject: [PATCH 0655/1549] lib.sh: condense err_() a bit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 627e7ce1..301ccb54 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -19,8 +19,7 @@ err="err_"
 
 err_()
 {
-	printf "ERROR %s: %s\n" "$0" "$1" 1>&2
-	exit 1
+	printf "ERROR %s: %s\n" "$0" "$1" 1>&2; exit 1
 }
 
 setvars()

From 40d3bb19be62e7de6324719318c125bddf194a8e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 13:42:19 +0100
Subject: [PATCH 0656/1549] lib.sh: condense for loop

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 301ccb54..131d6cb9 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -41,8 +41,7 @@ eval `setvars "" _nogit board relname versiondate projectsite \
 
 for fv in projectname projectsite version versiondate; do
 	eval "[ ! -f "$fv" ] || read -r $fv < \"$fv\" || :"
-done
-chkvars projectname projectsite
+done; chkvars projectname projectsite
 
 setcfg()
 {

From d36c07847d814e15be5a82be1713e1958af5d308 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 13:44:13 +0100
Subject: [PATCH 0657/1549] lib.sh: keep versiondate check to 80 characters

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 131d6cb9..94d1997f 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -103,8 +103,8 @@ x_() {
 
 [ -e ".git" ] || [ -f "version" ] || printf "unknown\n" > version || \
     $err "Cannot generate unknown version file"
-[ -e ".git" ] || [ -f "versiondate" ] || printf "1716415872\n" > versiondate || \
-    $err "Cannot generate unknown versiondate file"
+[ -e ".git" ] || [ -f "versiondate" ] || printf "1716415872\n" > versiondate \
+    || $err "Cannot generate unknown versiondate file"
 
 version_="$version"
 [ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \

From 75951c4690824793d9a269637af88ef26fb6c779 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 13:49:08 +0100
Subject: [PATCH 0658/1549] vendor.sh: simplified cbfstoolref check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index a14fbaef..68da745f 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -67,9 +67,8 @@ bootstrap()
 	[ ! -d "${kbc1126_ec_dump%/*}" ] || [ -f "$kbc1126_ec_dump" ] || x_ \
 	    make -C "$cbdir/util/kbc1126"
 	[ -n "$MRC_refcode_cbtree" ] && \
-		cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool"
-	[ -z "$cbfstoolref" ] || [ -f "$cbfstoolref" ] || \
-	    x_ ./update trees -b coreboot utils $MRC_refcode_cbtree
+		cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
+		x_ ./update trees -b coreboot utils $MRC_refcode_cbtree
 	[ -f "$cbfstool" ] && [ -f "$ifdtool" ] && return 0
 	x_ ./update trees -b coreboot utils $tree
 }

From 708e306e5f2828fe3a9eee4ddded21f00ad0e9cc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 13:49:44 +0100
Subject: [PATCH 0659/1549] vendor.sh: remove unnecessary cbfstool check

the trees script already performs this check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 68da745f..3ed2eb71 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -69,7 +69,6 @@ bootstrap()
 	[ -n "$MRC_refcode_cbtree" ] && \
 		cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
 		x_ ./update trees -b coreboot utils $MRC_refcode_cbtree
-	[ -f "$cbfstool" ] && [ -f "$ifdtool" ] && return 0
 	x_ ./update trees -b coreboot utils $tree
 }
 

From d12a686015e86c04b83d547437b8d455128fbcfb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 13:50:35 +0100
Subject: [PATCH 0660/1549] vendor fetch(): condense variable initialisation

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 3ed2eb71..e3826390 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -90,10 +90,7 @@ getfiles()
 
 fetch()
 {
-	dl_type="$1"
-	dl="$2"
-	dl_bkup="$3"
-	dlsum="$4"
+	dl_type="$1"; dl="$2"; dl_bkup="$3"; dlsum="$4"
 	[ "$5" = "/dev/null" ] && return 0
 	[ "${5# }" = "$5" ] || $err "fetch: space not allowed in _dest: '$5'"
 	[ "${5#/}" = "$5" ] || $err "fetch: absolute path not allowed: '$5'"

From 8f50131e1e3ca4acd2e8e1d2a167ae48a2a4c75b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 13:59:26 +0100
Subject: [PATCH 0661/1549] vendor.sh: condense check_board() a bit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index e3826390..7154b7ea 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -252,8 +252,7 @@ vendor_inject()
 
 check_board()
 {
-	failcheck="n"
-	check_release "$archive" || failcheck="y"
+	failcheck="y" && check_release "$archive" && failcheck="n"
 	if [ "$failcheck" = "y" ]; then
 		[ -f "$rom" ] || $err "check_board \"$rom\": invalid path"
 		[ -z "${rom+x}" ] && $err "check_board: no rom specified"
@@ -261,8 +260,7 @@ check_board()
 	else
 		vrelease="y"
 		board="$(detect_board "$archive")"
-	fi
-	readcfg
+	fi; readcfg
 }
 
 check_release()

From 8196ce6ddf4f0c2320cbb0f8ea378dfff0d639c4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 14:14:38 +0100
Subject: [PATCH 0662/1549] vendor.sh: remove unnecessary check

mktemp will never return empty output, and the next
command after it is an mkdir, which would throw an
error anyway, if the string is empty.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 7154b7ea..6faec9ab 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -129,7 +129,6 @@ extract_intel_me()
 	e "$_me" f && return 0
 
 	sdir="$(mktemp -d)"
-	[ -z "$sdir" ] && return 0
 	mkdir -p "$sdir" || $err "extract_intel_me: !mkdir -p \"$sdir\""
 
 	set +u +e

From e01b5c9744b1d944962d932b13f3dbe307e56cd3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 14:16:17 +0100
Subject: [PATCH 0663/1549] vendor.sh: remove unnecesessary cbutils check

the trees script already does this same check, so don't
do it in here. defer to the trees script.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 6faec9ab..8607a977 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -302,9 +302,7 @@ build_dependencies_inject()
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 	ifdtool="elf/ifdtool/$tree/ifdtool"
 	x_ ./update trees -f coreboot $tree
-	if [ ! -f "$cbfstool" ] || [ ! -f "$ifdtool" ]; then
-		x_ ./update trees -b coreboot utils $tree
-	fi
+	x_ ./update trees -b coreboot utils $tree
 	[ -z "$new_mac" ] || [ -f "$nvmutil" ] || x_ make -C util/nvmutil
 	[ "$nukemode" = "nuke" ] || x_ ./vendor download $board; return 0
 }

From ce03786f697796626c3e32451c2f8c6fc1e3bc38 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 14:18:01 +0100
Subject: [PATCH 0664/1549] vendor.sh: remove unnecessary command

we don't need to download the entire coreboot tree here,
because the next command after it builds utils from that
tree, using the trees script which would then go and
download that tree anyway; this is part of the design.

if a given elf binary exists, it won't be re-built, but
the missing sources will still be downloaded automatically.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 8607a977..947a0f13 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -301,7 +301,6 @@ build_dependencies_inject()
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 	ifdtool="elf/ifdtool/$tree/ifdtool"
-	x_ ./update trees -f coreboot $tree
 	x_ ./update trees -b coreboot utils $tree
 	[ -z "$new_mac" ] || [ -f "$nvmutil" ] || x_ make -C util/nvmutil
 	[ "$nukemode" = "nuke" ] || x_ ./vendor download $board; return 0

From 35c487106a520cec24b1d76d10042ba51497a962 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 14:45:20 +0100
Subject: [PATCH 0665/1549] vendor.sh: remove unnecessary checks

again: the trees script already checks binaries,
and already checks sources. if they exist, the
relevant action is skipped entirely.

we don't need to check it in vendor.sh, because the
trees script already performs the same check.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 947a0f13..fe466627 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -60,10 +60,9 @@ bootstrap()
 {
 	[ -d "$cbdir" ] || x_ ./update trees -f coreboot ${cbdir##*/}
 	for d in uefitool biosutilities bios_extract; do
-		[ -d "src/$d" ] && continue
 		x_ ./update trees -f "$d"
 	done
-	[ -f "$uefiextract" ] || x_ ./update trees -b uefitool
+	x_ ./update trees -b uefitool
 	[ ! -d "${kbc1126_ec_dump%/*}" ] || [ -f "$kbc1126_ec_dump" ] || x_ \
 	    make -C "$cbdir/util/kbc1126"
 	[ -n "$MRC_refcode_cbtree" ] && \

From afc00306828f1ca73db89bb04195518879467b10 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 14:51:32 +0100
Subject: [PATCH 0666/1549] remove more unnecessary checks on trees commands

the trees script already performs these checks

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 script/roms       | 4 ++--
 script/trees      | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index fe466627..f583f352 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -58,7 +58,7 @@ getcfg()
 
 bootstrap()
 {
-	[ -d "$cbdir" ] || x_ ./update trees -f coreboot ${cbdir##*/}
+	x_ ./update trees -f coreboot ${cbdir##*/}
 	for d in uefitool biosutilities bios_extract; do
 		x_ ./update trees -f "$d"
 	done
diff --git a/script/roms b/script/roms
index 8d5d1401..98a9a854 100755
--- a/script/roms
+++ b/script/roms
@@ -102,7 +102,7 @@ configure_target()
 	x_ ./update trees -b coreboot $board
 
 	cbfstool="elf/cbfstool/$tree/cbfstool"
-	[ -f "$cbfstool" ] || x_ ./update trees -b coreboot utils $tree
+	x_ ./update trees -b coreboot utils $tree
 
 	[ -n "$uboot_config" ] || uboot_config="default"
 	[ "$payload_uboot" = "y" ] || payload_seabios="y"
@@ -143,7 +143,7 @@ add_payloads()
 	# add u-boot payload
 	ubdir="elf/u-boot/$board/$uboot_config"; ubootelf="$ubdir/u-boot.elf" \
 	    && [ ! -f "$ubootelf" ] && ubootelf="$ubdir/u-boot"
-	[ -f "$ubootelf" ] || x_ ./update trees -b u-boot $board
+	x_ ./update trees -b u-boot $board
 	[ -f "$ubootelf" ] || $err "$board: Can't find u-boot"
 
 	cbfs "$tmprom" "$ubootelf" "fallback/payload"
diff --git a/script/trees b/script/trees
index 781e4055..fa456631 100755
--- a/script/trees
+++ b/script/trees
@@ -69,7 +69,7 @@ build_project()
 	[ ! -f "$listfile" ] || elfcheck || return 0
 
 	cdir="src/${project}"
-	[ -d "$cdir" ] || x_ ./update trees -f "$project"
+	x_ ./update trees -f "$project"
 
 	[ "$mode" = "distclean" ] && mode="clean"
 	run_make_command || return 0

From 3f540e756596580a6f003d3ce375e4e64bfab9d4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 14:52:08 +0100
Subject: [PATCH 0667/1549] roms: build u-boot *before* checking ubootelf

the current check is flawed, because if u-boot doesn't
exist, but a given build would be the file verified by
the first check, the check would still fail even after
then building u-boot.

building it first will make this check pass, under such
a condition.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/roms b/script/roms
index 98a9a854..7e032ed0 100755
--- a/script/roms
+++ b/script/roms
@@ -141,9 +141,9 @@ add_payloads()
 	[ "$payload_uboot" = "y" ] || return 0
 
 	# add u-boot payload
+	x_ ./update trees -b u-boot $board
 	ubdir="elf/u-boot/$board/$uboot_config"; ubootelf="$ubdir/u-boot.elf" \
 	    && [ ! -f "$ubootelf" ] && ubootelf="$ubdir/u-boot"
-	x_ ./update trees -b u-boot $board
 	[ -f "$ubootelf" ] || $err "$board: Can't find u-boot"
 
 	cbfs "$tmprom" "$ubootelf" "fallback/payload"

From 359d00bd5614d840fa6c75efc111604819bfbfd5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 14:56:30 +0100
Subject: [PATCH 0668/1549] roms: add return value for the list command

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/roms b/script/roms
index 7e032ed0..12f9e1c1 100755
--- a/script/roms
+++ b/script/roms
@@ -40,7 +40,7 @@ main()
 			eval "x_ ./update trees -f \"\${${2}src##*/}\""
 			ser="$2" && shift 2 && continue
 		fi
-		[ "$1$ser" = "list" ] && x_ ls -1 config/coreboot && return
+		[ "$1$ser" = "list" ] && x_ ls -1 config/coreboot && return 0
 		[ "$1" = "all" ] && shift && continue
 		boards="$1 $boards"; shift 1
 	done

From ed3cce84bc2da88b72e727d9af53a765a1c3e288 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 14:57:07 +0100
Subject: [PATCH 0669/1549] roms: explicitly shift by 1 on the "all" target

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/roms b/script/roms
index 12f9e1c1..359d5725 100755
--- a/script/roms
+++ b/script/roms
@@ -41,7 +41,7 @@ main()
 			ser="$2" && shift 2 && continue
 		fi
 		[ "$1$ser" = "list" ] && x_ ls -1 config/coreboot && return 0
-		[ "$1" = "all" ] && shift && continue
+		[ "$1" = "all" ] && shift 1 && continue
 		boards="$1 $boards"; shift 1
 	done
 

From 3f37c3788b62cfaf6f2f94ac733651c67f438f44 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 14:59:52 +0100
Subject: [PATCH 0670/1549] tidy up some setvars lists

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 ++--
 include/lib.sh | 4 ++--
 script/trees   | 6 +++---
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index a73bdc16..6818578b 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -2,8 +2,8 @@
 # Copyright (c) 2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
-eval `setvars "" _target rev loc url bkup_url depend tree_depend xtree \
-    mdir subhash subrepo subrepo_bkup subfile subfile_bkup`
+eval `setvars "" _target rev loc url bkup_url depend tree_depend xtree mdir \
+    subhash subrepo subrepo_bkup subfile subfile_bkup`
 
 fetch_project_trees()
 {
diff --git a/include/lib.sh b/include/lib.sh
index 94d1997f..58aa8d46 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -36,8 +36,8 @@ chkvars()
 	done; return 0
 }
 
-eval `setvars "" _nogit board relname versiondate projectsite \
-    projectname aur_notice cfgsdir datadir version xbmk_parent`
+eval `setvars "" _nogit board xbmk_parent versiondate projectsite projectname \
+    aur_notice cfgsdir datadir version relname`
 
 for fv in projectname projectsite version versiondate; do
 	eval "[ ! -f "$fv" ] || read -r $fv < \"$fv\" || :"
diff --git a/script/trees b/script/trees
index fa456631..6865a018 100755
--- a/script/trees
+++ b/script/trees
@@ -10,9 +10,9 @@ set -u -e
 . "include/git.sh"
 
 cbmakeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
-eval `setvars "" xarch cdir config config_name xlang mode makeargs \
-    elfdir project target target_dir targets tree _f target1 bootstrapargs \
-    autoconfargs cmakedir listfile autogenargs xtree btype mkhelper`
+eval `setvars "" xarch cdir config cmakedir xlang mode makeargs elfdir xtree \
+    project target target_dir targets tree _f target1 bootstrapargs mkhelper \
+    autoconfargs config_name listfile autogenargs btype`
 
 main()
 {

From 2eb0163cc78e61f424f26798b3416d371e0818d0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 15:24:42 +0100
Subject: [PATCH 0671/1549] Revert "vendor.sh: remove unnecessary check"

This reverts commit 8196ce6ddf4f0c2320cbb0f8ea378dfff0d639c4.
---
 include/vendor.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/vendor.sh b/include/vendor.sh
index f583f352..54d1750a 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -128,6 +128,7 @@ extract_intel_me()
 	e "$_me" f && return 0
 
 	sdir="$(mktemp -d)"
+	[ -z "$sdir" ] && return 0
 	mkdir -p "$sdir" || $err "extract_intel_me: !mkdir -p \"$sdir\""
 
 	set +u +e

From 636b86237fc778825a1f3b86f0f4c8dafd3a44e7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 16:24:07 +0100
Subject: [PATCH 0672/1549] vendor.sh: re-add modify_gbe()

i accidentally deleted it in an earlier code purge

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 22 +++++++++++++++++++++-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 54d1750a..fd726acb 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -331,7 +331,7 @@ patch_release_roms()
 
 	[ "$modifygbe" = "true" ] && \
 		for x in "$_tmpdir"/bin/*/*.rom ; do
-			modify_gbe "$x"
+			[ -f "$x" ] && modify_gbe "$x"
 		done
 
 	[ -d "bin/release" ] || x_ mkdir -p bin/release
@@ -419,3 +419,23 @@ inject()
 		fi
 	fi
 }
+
+modify_gbe()
+{
+	printf "changing mac address in gbe to $new_mac\n"
+	[ -z "$CONFIG_GBE_BIN_PATH" ] && \
+		err "modify_gbe: $board: CONFIG_GBE_BIN_PATH not set"
+
+	rom="$1"
+	_gbe_location=${CONFIG_GBE_BIN_PATH##*../}
+	[ -f "$_gbe_location" ] || \
+		err "modify_gbe: $_gbe_location points to missing file"
+	x_ make -C util/nvmutil
+
+	_gbe_tmp=$(mktemp -t gbeXXXX.bin)
+	x_ cp "$_gbe_location" "$_gbe_tmp"
+	x_ "$nvmutil" "$_gbe_tmp" setmac "$new_mac"
+	x_ "${ifdtool}" -i GbE:"$_gbe_tmp" "$rom" -O "$rom"
+
+	x_ rm -f "$_gbe_tmp"
+}

From 08bce7ad3b26706fc6d445bd226fe4e4c5851f5e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 21:31:40 +0100
Subject: [PATCH 0673/1549] vendor.sh: minor code cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index fd726acb..22d5a76d 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -343,8 +343,6 @@ patch_release_roms()
 
 patch_rom()
 {
-	rom="$1"
-
 	. "$(check_defconfig "$boarddir")" 2>/dev/null || exit 0
 
 	[ "$CONFIG_HAVE_MRC" = "y" ] && inject "mrc.bin" "$CONFIG_MRC_FILE" \
@@ -366,7 +364,7 @@ patch_rom()
 	[ "$modifygbe" = "true" ] && ! [ "$vrelease" = "y" ] && \
 		inject "IFD" "$CONFIG_GBE_BIN_PATH" "GbE"
 
-	printf "ROM image successfully patched: %s\n" "$rom"
+	printf "ROM image successfully patched: %s\n" "$1"
 }
 
 inject()
@@ -426,7 +424,6 @@ modify_gbe()
 	[ -z "$CONFIG_GBE_BIN_PATH" ] && \
 		err "modify_gbe: $board: CONFIG_GBE_BIN_PATH not set"
 
-	rom="$1"
 	_gbe_location=${CONFIG_GBE_BIN_PATH##*../}
 	[ -f "$_gbe_location" ] || \
 		err "modify_gbe: $_gbe_location points to missing file"
@@ -435,7 +432,7 @@ modify_gbe()
 	_gbe_tmp=$(mktemp -t gbeXXXX.bin)
 	x_ cp "$_gbe_location" "$_gbe_tmp"
 	x_ "$nvmutil" "$_gbe_tmp" setmac "$new_mac"
-	x_ "${ifdtool}" -i GbE:"$_gbe_tmp" "$rom" -O "$rom"
+	x_ "${ifdtool}" -i GbE:"$_gbe_tmp" "$1" -O "$1"
 
 	x_ rm -f "$_gbe_tmp"
 }

From 155ce49b17e39a12b6e3ead684a5e302416f471c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 21:43:23 +0100
Subject: [PATCH 0674/1549] vendor.sh: simplify modify_gbe()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 17 +++++------------
 1 file changed, 5 insertions(+), 12 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 22d5a76d..f996e377 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -420,19 +420,12 @@ inject()
 
 modify_gbe()
 {
-	printf "changing mac address in gbe to $new_mac\n"
-	[ -z "$CONFIG_GBE_BIN_PATH" ] && \
-		err "modify_gbe: $board: CONFIG_GBE_BIN_PATH not set"
+	chkvars CONFIG_GBE_BIN_PATH
 
-	_gbe_location=${CONFIG_GBE_BIN_PATH##*../}
-	[ -f "$_gbe_location" ] || \
-		err "modify_gbe: $_gbe_location points to missing file"
+	e "${CONFIG_GBE_BIN_PATH##*../}" f n && $err "missing gbe file"
 	x_ make -C util/nvmutil
 
-	_gbe_tmp=$(mktemp -t gbeXXXX.bin)
-	x_ cp "$_gbe_location" "$_gbe_tmp"
-	x_ "$nvmutil" "$_gbe_tmp" setmac "$new_mac"
-	x_ "${ifdtool}" -i GbE:"$_gbe_tmp" "$1" -O "$1"
-
-	x_ rm -f "$_gbe_tmp"
+	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "$TMPDIR/gbe"
+	x_ "$nvmutil" "$TMPDIR/gbe" setmac "$new_mac"
+	x_ "$ifdtool" -i GbE:"$TMPDIR/gbe" "$1" -O "$1"
 }

From fa5af956c4383e48834276dfd4577f53d3d3f6d1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 22:31:09 +0100
Subject: [PATCH 0675/1549] vendor.sh: simplified modify_gbe handling

we don't need the "modifygbe" variable. we only need to
know that new_mac was set.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index f996e377..81eea035 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -9,7 +9,6 @@ e6400_unpack="$PWD/src/bios_extract/dell_inspiron_1100_unpacker.py"
 me7updateparser="$PWD/util/me7_update_parser/me7_update_parser.py"
 pfs_extract="$PWD/src/biosutilities/Dell_PFS_Extract.py"
 uefiextract="$PWD/elf/uefitool/uefiextract"
-nvmutil="util/nvmutil/nvm"
 vendir="vendorfiles"
 appdir="$vendir/app"
 cbcfgsdir="config/coreboot"
@@ -18,13 +17,13 @@ eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
     E6400_VGA_romname CONFIG_HAVE_MRC SCH5545EC_DL_url_bkup SCH5545EC_DL_hash \
     mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl SCH5545EC_DL_url \
-    CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_ME_BIN archive EC_url modifygbe rom \
+    CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_ME_BIN archive EC_url boarddir rom \
     CONFIG_ME_BIN_PATH CONFIG_KBC1126_FIRMWARE _dest tree CONFIG_GBE_BIN_PATH \
     CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW2_OFFSET \
     CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_KBC1126_FW1 cbdir DL_url \
     CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE nukemode \
     CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB cbfstoolref \
-    CONFIG_REFCODE_BLOB_FILE vrelease boarddir`
+    CONFIG_REFCODE_BLOB_FILE vrelease`
 
 vendor_download()
 {
@@ -232,8 +231,7 @@ vendor_inject()
 		n) nukemode="$OPTARG" ;;
 		r) rom="$OPTARG" ;;
 		b) board="$OPTARG" ;;
-		m) modifygbe="true"
-		   new_mac="$OPTARG" ;;
+		m) new_mac="$OPTARG"; chkvars new_mac ;;
 		*) : ;;
 		esac
 	done
@@ -302,7 +300,6 @@ build_dependencies_inject()
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 	ifdtool="elf/ifdtool/$tree/ifdtool"
 	x_ ./update trees -b coreboot utils $tree
-	[ -z "$new_mac" ] || [ -f "$nvmutil" ] || x_ make -C util/nvmutil
 	[ "$nukemode" = "nuke" ] || x_ ./vendor download $board; return 0
 }
 
@@ -329,7 +326,7 @@ patch_release_roms()
 	    $err "patch_release_roms: ROMs did not match expected hashes"
 	) || $err "can't verify vendor hashes"
 
-	[ "$modifygbe" = "true" ] && \
+	[ -n "$new_mac" ] && \
 		for x in "$_tmpdir"/bin/*/*.rom ; do
 			[ -f "$x" ] && modify_gbe "$x"
 		done
@@ -361,7 +358,7 @@ patch_rom()
 	[ "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" = "y" ] && \
 	    [ -n "$CONFIG_SMSC_SCH5545_EC_FW_FILE" ] && \
 		inject "sch5545_ecfw.bin" "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
-	[ "$modifygbe" = "true" ] && ! [ "$vrelease" = "y" ] && \
+	[ -n "$new_mac" ] && ! [ "$vrelease" = "y" ] && \
 		inject "IFD" "$CONFIG_GBE_BIN_PATH" "GbE"
 
 	printf "ROM image successfully patched: %s\n" "$1"
@@ -426,6 +423,6 @@ modify_gbe()
 	x_ make -C util/nvmutil
 
 	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "$TMPDIR/gbe"
-	x_ "$nvmutil" "$TMPDIR/gbe" setmac "$new_mac"
+	x_ "util/nvmutil/nvm" "$TMPDIR/gbe" setmac $new_mac
 	x_ "$ifdtool" -i GbE:"$TMPDIR/gbe" "$1" -O "$1"
 }

From a8f272536d33af6932cb25c66177e851cae03553 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 22:32:03 +0100
Subject: [PATCH 0676/1549] lib.sh: stricter check in chkvars()

testing +x is all well and good, but the variable string
may be empty, even if set. some of the checks in the build
system are relying on the latter, so handle it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/lib.sh b/include/lib.sh
index 58aa8d46..e6a998d2 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -33,6 +33,7 @@ chkvars()
 {
 	for var in $@; do
 		eval "[ -n "\${$var+x}" ] || \$err \"$var unset\""
+		eval "[ -n "\$$var" ] || \$err \"$var unset\""
 	done; return 0
 }
 

From 85c2eb0f7ce21841ed0bf110ab91fd627e5735c8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 22:49:59 +0100
Subject: [PATCH 0677/1549] vendor.sh: general code cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 41 ++++++++++++++---------------------------
 1 file changed, 14 insertions(+), 27 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 81eea035..cb06ec9d 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -243,8 +243,7 @@ vendor_inject()
 
 	[ "$nukemode" = "nuke" ] && return 0
 	printf "Friendly reminder (this is *not* an error message):\n"
-	printf "Please ensure that the files were inserted correctly. ALSO:\n"
-	printf "%s\n" "$kbnotice"
+	printf "Make sure the files were inserted. ALSO:\n%s\n" "$kbnotice"
 }
 
 check_board()
@@ -255,8 +254,7 @@ check_board()
 		[ -z "${rom+x}" ] && $err "check_board: no rom specified"
 		[ -n "${board+x}" ] || board="$(detect_board "$rom")"
 	else
-		vrelease="y"
-		board="$(detect_board "$archive")"
+		vrelease="y"; board="$(detect_board "$archive")"
 	fi; readcfg
 }
 
@@ -305,19 +303,16 @@ build_dependencies_inject()
 
 patch_release_roms()
 {
-	_tmpdir="tmp/romdir"
-	remkdir "$_tmpdir"
-	tar -xf "$archive" -C "$_tmpdir" || \
-	    $err "patch_release_roms: !tar -xf \"$archive\" -C \"$_tmpdir\""
+	remkdir "tmp/romdir"
+	tar -xf "$archive" -C "tmp/romdir" || \
+	    $err "patch_release_roms: !tar -xf \"$archive\" -C \"tmp/romdir\""
 
-	for x in "$_tmpdir"/bin/*/*.rom ; do
-		printf "patching rom: %s\n" "$x"
+	for x in "tmp/romdir/bin/"*/*.rom ; do
 		patch_rom "$x"
 	done
 
 	(
-	cd "$_tmpdir/bin/"* || \
-	    $err "patch_release_roms: !cd $_tmpdir/bin/*"
+	cd "tmp/romdir/bin/"* || $err "patch roms: !cd tmp/romdir/bin/*"
 
 	# NOTE: For compatibility with older rom releases, defer to sha1
 	[ "$nukemode" = "nuke" ] || sha512sum --status -c vendorhashes || \
@@ -326,16 +321,12 @@ patch_release_roms()
 	    $err "patch_release_roms: ROMs did not match expected hashes"
 	) || $err "can't verify vendor hashes"
 
-	[ -n "$new_mac" ] && \
-		for x in "$_tmpdir"/bin/*/*.rom ; do
-			[ -f "$x" ] && modify_gbe "$x"
-		done
+	[ -n "$new_mac" ] && for x in "tmp/romdir/bin/"*/*.rom ; do
+		[ -f "$x" ] && modify_gbe "$x"
+	done
 
-	[ -d "bin/release" ] || x_ mkdir -p bin/release
-	x_ mv "$_tmpdir"/bin/* bin/release/
-	x_ rm -Rf "$_tmpdir"
-
-	printf "Success! Your ROMs are in bin/release\n"
+	x_ mkdir -p bin/release
+	mv tmp/romdir/bin/* bin/release/ || $err "$board: !mv release roms"
 }
 
 patch_rom()
@@ -369,9 +360,8 @@ inject()
 	[ $# -lt 3 ] && $err "$@, $rom: usage: inject name path type (offset)"
 
 	eval `setvars "" cbfsname _dest _t _offset`
-	cbfsname="$1"
-	_dest="${2##*../}"
-	_t="$3"
+	cbfsname="$1"; _dest="${2##*../}"; _t="$3"
+
 	[ $# -gt 3 ] && _offset="-b $4" && [ -z "$4" ] && \
 	    $err "inject $@, $rom: offset passed, but empty (not defined)"
 
@@ -379,9 +369,6 @@ inject()
 	[ ! -f "$_dest" ] && [ "$nukemode" != "nuke" ] && \
 		$err "inject_$dl_type: file missing, $_dest"
 
-	[ "$nukemode" = "nuke" ] || \
-		printf "Inserting %s/%s into: %s\n" "$cbfsname" "$_t" "$rom"
-
 	if [ "$_t" = "GbE" ]; then
 		x_ mkdir -p tmp
 		cp "$_dest" "tmp/gbe.bin" || \

From f2d53eb842d7d843149b004c51c23739521f732d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 23:10:22 +0100
Subject: [PATCH 0678/1549] vendor.sh: condense fetch() a bit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index cb06ec9d..36bea3e3 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -92,8 +92,7 @@ fetch()
 	[ "$5" = "/dev/null" ] && return 0
 	[ "${5# }" = "$5" ] || $err "fetch: space not allowed in _dest: '$5'"
 	[ "${5#/}" = "$5" ] || $err "fetch: absolute path not allowed: '$5'"
-	_dest="${5##*../}"
-	_dl="$vendir/cache/$dlsum"
+	_dest="${5##*../}"; _dl="$vendir/cache/$dlsum"
 
 	download "$dl" "$dl_bkup" "$_dl" "$dlsum"
 
@@ -102,8 +101,7 @@ fetch()
 	eval "extract_$dl_type"
 	set -u -e
 
-	[ -f "$_dest" ] && return 0
-	$err "extract_$dl_type (fetch): missing file: '$_dest'"
+	e "$_dest" f missing && $err "!extract_$dl_type"; return 0
 }
 
 mkdirs()

From ee5bab2c9abad983c5a7e4a80cde16fa8690e4e6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 23:33:31 +0100
Subject: [PATCH 0679/1549] vendor.sh: clean up GbE handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 11 +----------
 1 file changed, 1 insertion(+), 10 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 36bea3e3..a40be542 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -347,8 +347,7 @@ patch_rom()
 	[ "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" = "y" ] && \
 	    [ -n "$CONFIG_SMSC_SCH5545_EC_FW_FILE" ] && \
 		inject "sch5545_ecfw.bin" "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
-	[ -n "$new_mac" ] && ! [ "$vrelease" = "y" ] && \
-		inject "IFD" "$CONFIG_GBE_BIN_PATH" "GbE"
+	[ -n "$new_mac" ] && [ "$vrelease" != "y" ] && modify_gbe "$rom"
 
 	printf "ROM image successfully patched: %s\n" "$1"
 }
@@ -367,14 +366,6 @@ inject()
 	[ ! -f "$_dest" ] && [ "$nukemode" != "nuke" ] && \
 		$err "inject_$dl_type: file missing, $_dest"
 
-	if [ "$_t" = "GbE" ]; then
-		x_ mkdir -p tmp
-		cp "$_dest" "tmp/gbe.bin" || \
-		    $err "inject: !cp \"$_dest\" \"tmp/gbe.bin\""
-		_dest="tmp/gbe.bin"
-		"$nvmutil" "$_dest" setmac "$new_mac" || \
-		    $err "inject $_dest: can't change mac address"
-	fi
 	if [ "$cbfsname" = "IFD" ]; then
 		if [ "$nukemode" != "nuke" ]; then
 			"$ifdtool" -i $_t:$_dest "$rom" -O "$rom" || \

From f7ab70f60e4b581b95004583f37ec96fc6e90527 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 28 Jun 2024 23:44:47 +0100
Subject: [PATCH 0680/1549] vendor.sh: simplify inject()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 43 ++++++++++++++++++-------------------------
 1 file changed, 18 insertions(+), 25 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index a40be542..a89ec7e5 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -329,6 +329,8 @@ patch_release_roms()
 
 patch_rom()
 {
+	rom="$1"
+
 	. "$(check_defconfig "$boarddir")" 2>/dev/null || exit 0
 
 	[ "$CONFIG_HAVE_MRC" = "y" ] && inject "mrc.bin" "$CONFIG_MRC_FILE" \
@@ -349,7 +351,7 @@ patch_rom()
 		inject "sch5545_ecfw.bin" "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
 	[ -n "$new_mac" ] && [ "$vrelease" != "y" ] && modify_gbe "$rom"
 
-	printf "ROM image successfully patched: %s\n" "$1"
+	printf "ROM image successfully patched: %s\n" "$rom"
 }
 
 inject()
@@ -362,33 +364,24 @@ inject()
 	[ $# -gt 3 ] && _offset="-b $4" && [ -z "$4" ] && \
 	    $err "inject $@, $rom: offset passed, but empty (not defined)"
 
-	[ -z "$_dest" ] && $err "inject $@, $rom: empty destination path"
-	[ ! -f "$_dest" ] && [ "$nukemode" != "nuke" ] && \
-		$err "inject_$dl_type: file missing, $_dest"
+	e "$_dest" f n && [ "$nukemode" != "nuke" ] && $err "!inject $dl_type"
 
 	if [ "$cbfsname" = "IFD" ]; then
-		if [ "$nukemode" != "nuke" ]; then
-			"$ifdtool" -i $_t:$_dest "$rom" -O "$rom" || \
-			    $err "inject: can't insert $_t ($dest) into $rom"
-		else
-			"$ifdtool" --nuke $_t "$rom" -O "$rom" || \
-			    $err "inject $rom: can't nuke $_t in IFD"
-		fi
-	else
-		if [ "$nukemode" != "nuke" ]; then
-			if [ "$_t" = "stage" ]; then # broadwell refcode
-				"$cbfstool" "$rom" add-stage -f "$_dest" \
-				    -n "$cbfsname" -t stage -c lzma
-			else
-				"$cbfstool" "$rom" add -f "$_dest" \
-				    -n "$cbfsname" -t $_t $_offset || \
-				    $err "$rom: can't insert $_t file $_dest"
-			fi
-		else
-			"$cbfstool" "$rom" remove -n "$cbfsname" || \
-			    $err "inject $rom: can't remove $cbfsname"
-		fi
+		[ "$nukemode" = "nuke" ] || "$ifdtool" -i $_t:$_dest "$rom" \
+		    -O "$rom" || $err "failed: inject '$_t' '$_dest' on '$rom'"
+		[ "$nukemode" != "nuke" ] || "$ifdtool" --nuke $_t "$rom" \
+		    -O "$rom" || $err "inject $rom: can't nuke $_t in IFD"
+		return 0
 	fi
+	if [ "$nukemode" = "nuke" ]; then
+		"$cbfstool" "$rom" remove -n "$cbfsname" || \
+		    $err "inject $rom: can't remove $cbfsname"
+		return 0
+	fi
+	[ "$_t" != "stage" ] || "$cbfstool" "$rom" add-stage -f \
+	    "$_dest" -n "$cbfsname" -t stage -c lzma || $err "$rom: !add ref"
+	[ "$_t" = "stage" ] || "$cbfstool" "$rom" add -f "$_dest" \
+	    -n "$cbfsname" -t $_t $_offset || $err "$rom !add $_t ($_dest)"
 }
 
 modify_gbe()

From c6df9666af32a65319a6ddf5ef2a123cc153501c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 00:23:26 +0100
Subject: [PATCH 0681/1549] vendor.sh: don't inject /dev/null

if injection is attempted, verification comes next,
and verification fails.

this happens for kcma/kgpe amd boards, where pike2008
fake roms are inserted by inserting the correct pci
ids using /dev/null as a source. an empty pike2008 rom
prevents seabios from loading the real pci rom, and this
is done because the real one hangs SeaBIOS.

a similar fix was made for ./vendor download, but
overlooked for ./vendor inject. this patch fixes that.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index a89ec7e5..4acc3eed 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -23,7 +23,7 @@ eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_KBC1126_FW1 cbdir DL_url \
     CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE nukemode \
     CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB cbfstoolref \
-    CONFIG_REFCODE_BLOB_FILE vrelease`
+    CONFIG_REFCODE_BLOB_FILE vrelease verify`
 
 vendor_download()
 {
@@ -313,7 +313,8 @@ patch_release_roms()
 	cd "tmp/romdir/bin/"* || $err "patch roms: !cd tmp/romdir/bin/*"
 
 	# NOTE: For compatibility with older rom releases, defer to sha1
-	[ "$nukemode" = "nuke" ] || sha512sum --status -c vendorhashes || \
+	[ "$verify" != "y" ] || [ "$nukemode" = "nuke" ] || \
+	    sha512sum --status -c vendorhashes || \
 	    sha1sum --status -c vendorhashes || sha512sum --status -c \
 	    blobhashes || sha1sum --status -c blobhashes || \
 	    $err "patch_release_roms: ROMs did not match expected hashes"
@@ -357,6 +358,7 @@ patch_rom()
 inject()
 {
 	[ $# -lt 3 ] && $err "$@, $rom: usage: inject name path type (offset)"
+	[ "$2" = "/dev/null" ] && return 0; verify="y"
 
 	eval `setvars "" cbfsname _dest _t _offset`
 	cbfsname="$1"; _dest="${2##*../}"; _t="$3"

From d63da943c18d73fe1f944deb44fd97db74783a21 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 00:33:31 +0100
Subject: [PATCH 0682/1549] vendor.sh inject: skip serprog targets

this is to prevent a fault condition during automated testing

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 4acc3eed..62331ac5 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -234,7 +234,7 @@ vendor_inject()
 		esac
 	done
 
-	check_board
+	check_board || return 0
 	build_dependencies_inject
 	[ "$vrelease" != "y" ] && patch_rom "$rom"
 	[ "$vrelease" = "y" ] && patch_release_roms
@@ -253,7 +253,8 @@ check_board()
 		[ -n "${board+x}" ] || board="$(detect_board "$rom")"
 	else
 		vrelease="y"; board="$(detect_board "$archive")"
-	fi; readcfg
+	fi
+	readcfg || return 1; return 0
 }
 
 check_release()
@@ -285,6 +286,10 @@ detect_board()
 
 readcfg()
 {
+	if [ "$board" = "serprog_rp2040" ] || \
+	    [ "$board" = "serprog_stm32" ]; then
+		return 1
+	fi
 	boarddir="$cbcfgsdir/$board"
 	eval `setcfg "$boarddir/target.cfg"`
 	chkvars vcfg tree

From c76419861916f63b9fa5240f6886fd9d3ef7f399 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 01:19:29 +0100
Subject: [PATCH 0683/1549] vendor.sh: simplify initialisation of variables

also unify handling of cbutils

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 62331ac5..d4648074 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -40,11 +40,7 @@ getcfg()
 		set +u +e; . "$cbcfgfile" 2>/dev/null; set -u -e
 	done < "$TMPDIR/vendorcfg.list"
 
-	cbdir="src/coreboot/$tree"
-	cbfstool="elf/cbfstool/$tree/cbfstool"
-
-	mecleaner="$PWD/$cbdir/util/me_cleaner/me_cleaner.py"
-	kbc1126_ec_dump="$PWD/$cbdir/util/kbc1126/kbc1126_ec_dump"
+	cfgutils
 
 	for c in CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
 	    CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW; do
@@ -67,7 +63,6 @@ bootstrap()
 	[ -n "$MRC_refcode_cbtree" ] && \
 		cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
 		x_ ./update trees -b coreboot utils $MRC_refcode_cbtree
-	x_ ./update trees -b coreboot utils $tree
 }
 
 getfiles()
@@ -296,12 +291,20 @@ readcfg()
 }
 
 build_dependencies_inject()
+{
+	cfgutils
+	[ "$nukemode" = "nuke" ] || x_ ./vendor download $board; return 0
+}
+
+cfgutils()
 {
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
+	mecleaner="$PWD/$cbdir/util/me_cleaner/me_cleaner.py"
+	kbc1126_ec_dump="$PWD/$cbdir/util/kbc1126/kbc1126_ec_dump"
+	cbfstool="elf/cbfstool/$tree/cbfstool"
 	ifdtool="elf/ifdtool/$tree/ifdtool"
 	x_ ./update trees -b coreboot utils $tree
-	[ "$nukemode" = "nuke" ] || x_ ./vendor download $board; return 0
 }
 
 patch_release_roms()

From 55677d82171a7619eee5b84879484668ffcc5969 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 01:22:28 +0100
Subject: [PATCH 0684/1549] vendor.sh: remove build_dependencies_inject()

merge it into vendor_inject()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index d4648074..2f68449e 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -230,7 +230,8 @@ vendor_inject()
 	done
 
 	check_board || return 0
-	build_dependencies_inject
+	cfgutils
+	[ "$nukemode" = "nuke" ] || x_ ./vendor download $board
 	[ "$vrelease" != "y" ] && patch_rom "$rom"
 	[ "$vrelease" = "y" ] && patch_release_roms
 
@@ -290,12 +291,6 @@ readcfg()
 	chkvars vcfg tree
 }
 
-build_dependencies_inject()
-{
-	cfgutils
-	[ "$nukemode" = "nuke" ] || x_ ./vendor download $board; return 0
-}
-
 cfgutils()
 {
 	cbdir="src/coreboot/$tree"

From 53b69f673c6e5699fc3880d4b7a7558d4b7247fe Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 01:24:13 +0100
Subject: [PATCH 0685/1549] vendor.sh: merge cfgutils() into readcfg()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 2f68449e..bd224f29 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -40,8 +40,6 @@ getcfg()
 		set +u +e; . "$cbcfgfile" 2>/dev/null; set -u -e
 	done < "$TMPDIR/vendorcfg.list"
 
-	cfgutils
-
 	for c in CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
 	    CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW; do
 		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
@@ -230,7 +228,6 @@ vendor_inject()
 	done
 
 	check_board || return 0
-	cfgutils
 	[ "$nukemode" = "nuke" ] || x_ ./vendor download $board
 	[ "$vrelease" != "y" ] && patch_rom "$rom"
 	[ "$vrelease" = "y" ] && patch_release_roms
@@ -289,10 +286,7 @@ readcfg()
 	boarddir="$cbcfgsdir/$board"
 	eval `setcfg "$boarddir/target.cfg"`
 	chkvars vcfg tree
-}
 
-cfgutils()
-{
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 	mecleaner="$PWD/$cbdir/util/me_cleaner/me_cleaner.py"

From d85b9de2d91a21793190917f6e846c2ce2f54ae9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 01:26:31 +0100
Subject: [PATCH 0686/1549] vendor.sh: rename getcfg() to readkconfig()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index bd224f29..92a8e1b6 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -30,10 +30,10 @@ vendor_download()
 	export PATH="$PATH:/sbin"
 
 	[ $# -gt 0 ] || $err "No argument given"
-	board="$1" && readcfg && getcfg && bootstrap && getfiles; return 0
+	board="$1" && readcfg && readkconfig && bootstrap && getfiles; return 0
 }
 
-getcfg()
+readkconfig()
 {
 	check_defconfig "$boarddir" 1>"$TMPDIR/vendorcfg.list" && return 1
 	while read -r cbcfgfile; do

From 8b8cf070d36fa734c75519d6c9c447a6cc2e3d5d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 01:27:42 +0100
Subject: [PATCH 0687/1549] vendor.sh: add return to end of bootstrap()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 92a8e1b6..fd71d190 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -59,8 +59,8 @@ bootstrap()
 	[ ! -d "${kbc1126_ec_dump%/*}" ] || [ -f "$kbc1126_ec_dump" ] || x_ \
 	    make -C "$cbdir/util/kbc1126"
 	[ -n "$MRC_refcode_cbtree" ] && \
-		cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
-		x_ ./update trees -b coreboot utils $MRC_refcode_cbtree
+	    cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
+	    x_ ./update trees -b coreboot utils $MRC_refcode_cbtree; return 0
 }
 
 getfiles()

From bf5acedb1277c2b32cde46e8986cff78655e68ab Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 01:41:48 +0100
Subject: [PATCH 0688/1549] vendor.sh: condense patch_rom() a bit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index fd71d190..b0bd2ae9 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -335,18 +335,16 @@ patch_rom()
 	    "mrc" "0xfffa0000"
 	[ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && inject "fallback/refcode" \
 	    "$CONFIG_REFCODE_BLOB_FILE" "stage"
-	[ "$CONFIG_HAVE_ME_BIN" = "y" ] && inject "IFD" "$CONFIG_ME_BIN_PATH" \
-	    "me"
-	[ "$CONFIG_KBC1126_FIRMWARE" = "y" ] && inject "ecfw1.bin" \
-	    "$CONFIG_KBC1126_FW1" "raw" "$CONFIG_KBC1126_FW1_OFFSET" && \
-		inject "ecfw2.bin" "$CONFIG_KBC1126_FW2" "raw" \
-		    "$CONFIG_KBC1126_FW2_OFFSET"
+	[ "$CONFIG_HAVE_ME_BIN" = "y" ] && inject IFD "$CONFIG_ME_BIN_PATH" me
+	[ "$CONFIG_KBC1126_FIRMWARE" = "y" ] && inject ecfw1.bin \
+	    "$CONFIG_KBC1126_FW1" raw "$CONFIG_KBC1126_FW1_OFFSET" && inject \
+	    ecfw2.bin "$CONFIG_KBC1126_FW2" raw "$CONFIG_KBC1126_FW2_OFFSET"
 	[ -n "$CONFIG_VGA_BIOS_FILE" ] && [ -n "$CONFIG_VGA_BIOS_ID" ] && \
 		inject "pci$CONFIG_VGA_BIOS_ID.rom" \
 		    "$CONFIG_VGA_BIOS_FILE" "optionrom"
 	[ "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" = "y" ] && \
 	    [ -n "$CONFIG_SMSC_SCH5545_EC_FW_FILE" ] && \
-		inject "sch5545_ecfw.bin" "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
+		inject sch5545_ecfw.bin "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
 	[ -n "$new_mac" ] && [ "$vrelease" != "y" ] && modify_gbe "$rom"
 
 	printf "ROM image successfully patched: %s\n" "$rom"

From 972e61070b1c087c03f9cf850345d500d4d90151 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 01:47:14 +0100
Subject: [PATCH 0689/1549] vendor.sh: condense detect_board() a bit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index b0bd2ae9..0c9a3712 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -264,17 +264,14 @@ detect_board()
 	path="$1"
 	filename="$(basename "$path")"
 	case "$filename" in
-	grub_*)
-		board="$(echo "$filename" | cut -d '_' -f2-3)" ;;
+	grub_*) board="$(echo "$filename" | cut -d '_' -f2-3)" ;;
 	seabios_withgrub_*)
 		board="$(echo "$filename" | cut -d '_' -f3-4)" ;;
 	*.tar.xz)
 		_stripped_prefix="${filename#*_}"
 		board="${_stripped_prefix%.tar.xz}" ;;
-	*)
-		$err "detect_board $filename: could not detect board type"
-	esac
-	printf "%s\n" "$board"
+	*) $err "detect_board $filename: could not detect board type"
+	esac; printf "%s\n" "$board"
 }
 
 readcfg()

From 6a05487ef3f04bf2ba3242747ba095d42f9986bd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 01:57:03 +0100
Subject: [PATCH 0690/1549] vendor.sh: simplified initialisation of _7ztest

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 0c9a3712..1d273ddf 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -3,8 +3,6 @@
 # Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
 # Copyright (c) 2023-2024 Leah Rowe <leah@libreboot.org>
 
-_7ztest="a"
-
 e6400_unpack="$PWD/src/bios_extract/dell_inspiron_1100_unpacker.py"
 me7updateparser="$PWD/util/me7_update_parser/me7_update_parser.py"
 pfs_extract="$PWD/src/biosutilities/Dell_PFS_Extract.py"
@@ -23,7 +21,7 @@ eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_KBC1126_FW1 cbdir DL_url \
     CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE nukemode \
     CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB cbfstoolref \
-    CONFIG_REFCODE_BLOB_FILE vrelease verify`
+    CONFIG_REFCODE_BLOB_FILE vrelease verify _7ztest`
 
 vendor_download()
 {

From 7086b6868599e8e58e9399bc22669b61199561ca Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 02:07:16 +0100
Subject: [PATCH 0691/1549] vendor.sh: simplify bootstrap() utils handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 1d273ddf..934b8392 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -51,9 +51,8 @@ bootstrap()
 {
 	x_ ./update trees -f coreboot ${cbdir##*/}
 	for d in uefitool biosutilities bios_extract; do
-		x_ ./update trees -f "$d"
+		x_ ./update trees -b "$d"
 	done
-	x_ ./update trees -b uefitool
 	[ ! -d "${kbc1126_ec_dump%/*}" ] || [ -f "$kbc1126_ec_dump" ] || x_ \
 	    make -C "$cbdir/util/kbc1126"
 	[ -n "$MRC_refcode_cbtree" ] && \

From 5e46b9f434d12622038f351545cfd2b9eaad168d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 02:11:45 +0100
Subject: [PATCH 0692/1549] vendor.sh: simplify kbc1126 util handling

we don't need to check whether the binary exists, because
make already does that for us.

we still need to check that the directory exists, because
older versions of coreboot did not include kbc1126, and we
do still use older coreboot revisions on some boards.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 934b8392..c60a3d77 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -53,8 +53,7 @@ bootstrap()
 	for d in uefitool biosutilities bios_extract; do
 		x_ ./update trees -b "$d"
 	done
-	[ ! -d "${kbc1126_ec_dump%/*}" ] || [ -f "$kbc1126_ec_dump" ] || x_ \
-	    make -C "$cbdir/util/kbc1126"
+	[ -d "${kbc1126_ec_dump%/*}" ] && x_ make -C "$cbdir/util/kbc1126"
 	[ -n "$MRC_refcode_cbtree" ] && \
 	    cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
 	    x_ ./update trees -b coreboot utils $MRC_refcode_cbtree; return 0

From 675d2c0376755d9258a4a3a7db01b5c91fd600de Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 02:14:00 +0100
Subject: [PATCH 0693/1549] vendor.sh: remove unnecessary check

this is over-engineering, because we do not allow just
about any path to be provided; it's not provided as an
argument in a command, for example.

this is dictated by a configuration file, which we control.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index c60a3d77..c4241efa 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -79,8 +79,6 @@ fetch()
 {
 	dl_type="$1"; dl="$2"; dl_bkup="$3"; dlsum="$4"
 	[ "$5" = "/dev/null" ] && return 0
-	[ "${5# }" = "$5" ] || $err "fetch: space not allowed in _dest: '$5'"
-	[ "${5#/}" = "$5" ] || $err "fetch: absolute path not allowed: '$5'"
 	_dest="${5##*../}"; _dl="$vendir/cache/$dlsum"
 
 	download "$dl" "$dl_bkup" "$_dl" "$dlsum"

From cbac2087cc5f167d8f290ea107dbfc488930cd06 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 02:21:00 +0100
Subject: [PATCH 0694/1549] vendor.sh: condense fetch() a bit more

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index c4241efa..9aebcb64 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -77,9 +77,8 @@ getfiles()
 
 fetch()
 {
-	dl_type="$1"; dl="$2"; dl_bkup="$3"; dlsum="$4"
-	[ "$5" = "/dev/null" ] && return 0
-	_dest="${5##*../}"; _dl="$vendir/cache/$dlsum"
+	dl_type="$1"; dl="$2"; dl_bkup="$3"; dlsum="$4"; _dest="${5##*../}"
+	[ "$5" = "/dev/null" ] && return 0; _dl="$vendir/cache/$dlsum"
 
 	download "$dl" "$dl_bkup" "$_dl" "$dlsum"
 

From 163bcfcdfd74227386c79314625069a9285a0f1e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 02:23:02 +0100
Subject: [PATCH 0695/1549] vendor.sh: simplify variable checks for e6400vga

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 9aebcb64..ec194d53 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -173,9 +173,7 @@ extract_kbc1126ec()
 extract_e6400vga()
 {
 	set +u +e
-	for v in E6400_VGA_offset E6400_VGA_romname; do
-		eval "[ -z \"\$$v\" ] && $err \"e6400vga: $v undefined\""
-	done
+	chkvars E6400_VGA_offset E6400_VGA_romname
 	tail -c +$E6400_VGA_offset "$_dl" | gunzip > "$appdir/bios.bin" || :
 	(
 	x_ cd "$appdir"

From 7a12cd770460068a721d08b0f22d436c02dc1e5c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 02:25:22 +0100
Subject: [PATCH 0696/1549] vendor.sh: simplify e6400 vga rom file check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index ec194d53..0d38427a 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -179,8 +179,7 @@ extract_e6400vga()
 	x_ cd "$appdir"
 	[ -f "bios.bin" ] || $err "extract_e6400vga: can't extract bios.bin"
 	"$e6400_unpack" bios.bin || printf "TODO: fix dell extract util\n"
-	[ -f "$E6400_VGA_romname" ] || \
-		$err "extract_e6400vga: can't extract vga rom from bios.bin"
+	e "$E6400_VGA_romname" f missing && $err "can't extract e6400 vga rom"
 	) || $err "can't extract e6400 vga rom"
 	cp "$appdir/$E6400_VGA_romname" "$_dest" || \
 	    $err "extract_e6400vga $board: can't copy vga rom to $_dest"

From ddcc74777e0e2e9f00cad7c7e5f8868f0e52a6e5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 03:06:58 +0100
Subject: [PATCH 0697/1549] vendor.sh extract_kbc1126ec: simplify build check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 0d38427a..33133f56 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -150,8 +150,7 @@ extract_archive()
 
 extract_kbc1126ec()
 {
-	[ ! -f "$kbc1126_ec_dump" ] && \
-		$err "extract_kbc1126ec $cbdir: kbc1126_ec_dump missing"
+	e "$kbc1126_ec_dump" f missing && $err "$cbdir: kbc1126 util missing"
 	(
 	x_ cd "$appdir/"
 	mv Rompaq/68*.BIN ec.bin || :

From 42925ce79fb31699256cc924ba359e0f6c37e713 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 03:09:03 +0100
Subject: [PATCH 0698/1549] vendor.sh extract_kbc1126: use quote on file check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 33133f56..49de3df9 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -154,7 +154,7 @@ extract_kbc1126ec()
 	(
 	x_ cd "$appdir/"
 	mv Rompaq/68*.BIN ec.bin || :
-	if [ ! -f ec.bin ]; then
+	if [ ! -f "ec.bin" ]; then
 		unar -D ROM.CAB Rom.bin || unar -D Rom.CAB Rom.bin || \
 		    unar -D 68*.CAB Rom.bin || $err "can't extract Rom.bin"
 		x_ mv Rom.bin ec.bin

From 8c5f78d3d3255d96e0349e5a92f281b99ea54b7b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 03:27:31 +0100
Subject: [PATCH 0699/1549] vendor.sh: condense inject() a bit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 49de3df9..3dda3f42 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -353,13 +353,10 @@ inject()
 		[ "$nukemode" = "nuke" ] || "$ifdtool" -i $_t:$_dest "$rom" \
 		    -O "$rom" || $err "failed: inject '$_t' '$_dest' on '$rom'"
 		[ "$nukemode" != "nuke" ] || "$ifdtool" --nuke $_t "$rom" \
-		    -O "$rom" || $err "inject $rom: can't nuke $_t in IFD"
-		return 0
-	fi
-	if [ "$nukemode" = "nuke" ]; then
+		    -O "$rom" || $err "$rom: can't nuke $_t in IFD"; return 0
+	elif [ "$nukemode" = "nuke" ]; then
 		"$cbfstool" "$rom" remove -n "$cbfsname" || \
-		    $err "inject $rom: can't remove $cbfsname"
-		return 0
+		    $err "inject $rom: can't remove $cbfsname"; return 0
 	fi
 	[ "$_t" != "stage" ] || "$cbfstool" "$rom" add-stage -f \
 	    "$_dest" -n "$cbfsname" -t stage -c lzma || $err "$rom: !add ref"

From 088a79918b306703eaf33a37519b4930bdb1b46d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 03:47:57 +0100
Subject: [PATCH 0700/1549] vendor.sh: remove unnecessary check

the next command is a copy, which would give us the error
if the file doesn't exist, and an appropriate message

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 3dda3f42..26ea466e 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -178,7 +178,6 @@ extract_e6400vga()
 	x_ cd "$appdir"
 	[ -f "bios.bin" ] || $err "extract_e6400vga: can't extract bios.bin"
 	"$e6400_unpack" bios.bin || printf "TODO: fix dell extract util\n"
-	e "$E6400_VGA_romname" f missing && $err "can't extract e6400 vga rom"
 	) || $err "can't extract e6400 vga rom"
 	cp "$appdir/$E6400_VGA_romname" "$_dest" || \
 	    $err "extract_e6400vga $board: can't copy vga rom to $_dest"

From fbe36b01ac424859a069435a043289f681165dba Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 18:39:25 +0100
Subject: [PATCH 0701/1549] trees mkpayload_grub: remove unnecessary check

these variables are initialised empty, then populated
by reading a configuration file.

it may be that in some cases, we want these variables
to be empty. besides that, the "setcfg" command before
it will throw an error if the module file is missing,
and it is assumed that the variables would be set there.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 1 -
 1 file changed, 1 deletion(-)

diff --git a/script/trees b/script/trees
index 6865a018..fd14b099 100755
--- a/script/trees
+++ b/script/trees
@@ -281,7 +281,6 @@ mkpayload_grub()
 {
 	eval `setvars "" grub_modules grub_install_modules`
 	eval `setcfg "$grubdata/module/$tree"`
-	chkvars "grub_install_modules" "grub_modules"
 
 	x_ rm -f "$cdir/grub.elf"
 

From d1b7882c5a7ba8495ec7868f6fab64a0f9d1439a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 18:55:41 +0100
Subject: [PATCH 0702/1549] vendor.sh readcfg: split the -b coreboot command

just add a line break to make the code more readable

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/vendor.sh b/include/vendor.sh
index 26ea466e..2c5f7c74 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -278,6 +278,7 @@ readcfg()
 	kbc1126_ec_dump="$PWD/$cbdir/util/kbc1126/kbc1126_ec_dump"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 	ifdtool="elf/ifdtool/$tree/ifdtool"
+
 	x_ ./update trees -b coreboot utils $tree
 }
 

From 8d02adfbb5b4466f218b2c4f25296382ec023dc6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 19:44:47 +0100
Subject: [PATCH 0703/1549] trees: simplify "utilmode" variable initialisation

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/script/trees b/script/trees
index fd14b099..ce590bdd 100755
--- a/script/trees
+++ b/script/trees
@@ -190,8 +190,7 @@ check_coreboot_utils()
 		utilelfdir="elf/$util/$1"
 		utilsrcdir="src/coreboot/$1/util/$util"
 
-		utilmode=""
-		[ -z "$mode" ] || utilmode="clean"
+		utilmode="" && [ -n "$mode" ] && utilmode="clean"
 		x_ make -C "$utilsrcdir" $utilmode -j$XBMK_THREADS $cbmakeargs
 		[ -z "$mode" ] && [ ! -f "$utilelfdir/$util" ] && \
 			x_ mkdir -p "$utilelfdir" && \

From f7ec42d379c7dc03ce9ac8f04726649d91bb25e2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 19:46:07 +0100
Subject: [PATCH 0704/1549] trees: add return to check_coreboot_utils()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index ce590bdd..de9cc869 100755
--- a/script/trees
+++ b/script/trees
@@ -196,7 +196,7 @@ check_coreboot_utils()
 			x_ mkdir -p "$utilelfdir" && \
 			x_ cp "$utilsrcdir/$util" "elf/$util/$1"
 		[ -z "$mode" ] || x_ rm -Rf "$utilelfdir"
-	done
+	done; return 0
 }
 
 check_config()

From 02f7417952063150fc6071427b23384082333b7d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 19:47:25 +0100
Subject: [PATCH 0705/1549] trees: better skip-clean string in handle_src_tree

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index de9cc869..da6069eb 100755
--- a/script/trees
+++ b/script/trees
@@ -139,7 +139,7 @@ handle_src_tree()
 	if [ ! -d "$cdir" ]; then
 		if [ "$mode" = "distclean" ] || \
 		    [ "$mode" = "crossgcc-clean" ]; then
-			printf "Directory %s missing; skip\n" "$cdir" 1>&2
+			printf "Dir '%s' missing; skip clean\n" "$cdir" 1>&2
 			return 1
 		fi
 		x_ ./update trees -f "$project" "$target"

From e0c244f37b1c267cf8defd6e060e6ed3695c547f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 19:58:03 +0100
Subject: [PATCH 0706/1549] git.sh: rename fetch_project_repo to fetch_project

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 ++--
 script/trees   | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 6818578b..3802e316 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -9,7 +9,7 @@ fetch_project_trees()
 {
 	_target="$target"
 	[ ! -d "src/$project/$project" ] && x_ mkdir -p "src/$project" \
-	    && fetch_project_repo "$project"
+	    && fetch_project "$project"
 	fetch_config
 	e "src/$project/$tree" d || prepare_new_tree; return 0
 }
@@ -44,7 +44,7 @@ prepare_new_tree()
 	nuke "$project/$tree" "$project/$tree"
 }
 
-fetch_project_repo()
+fetch_project()
 {
 	eval `setvars "" xtree tree_depend`
 	eval `setcfg "config/git/$project/pkg.cfg"`
diff --git a/script/trees b/script/trees
index da6069eb..02ab95a0 100755
--- a/script/trees
+++ b/script/trees
@@ -59,7 +59,7 @@ build_project()
 {
 	if [ "$mode" = "fetch" ]; then
 		[ -f "CHANGELOG" ] && return 0
-		fetch_project_repo; return 0
+		fetch_project; return 0
 	fi
 
 	load_project_config "$cfgsdir" 0 || return 0

From 7bf28352078951e9eb78ec1aa467346031c8628e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 19:59:16 +0100
Subject: [PATCH 0707/1549] git.sh: rename Fetch_project_trees fetch_targets

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 2 +-
 script/trees   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 3802e316..f65fe85e 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -5,7 +5,7 @@
 eval `setvars "" _target rev loc url bkup_url depend tree_depend xtree mdir \
     subhash subrepo subrepo_bkup subfile subfile_bkup`
 
-fetch_project_trees()
+fetch_targets()
 {
 	_target="$target"
 	[ ! -d "src/$project/$project" ] && x_ mkdir -p "src/$project" \
diff --git a/script/trees b/script/trees
index 02ab95a0..304c7524 100755
--- a/script/trees
+++ b/script/trees
@@ -127,7 +127,7 @@ handle_src_tree()
 	target_dir="$cfgsdir/$target"
 	if [ "$mode" = "fetch" ]; then
 		[ -f "CHANGELOG" ] && return 1
-		fetch_project_trees; return 1
+		fetch_targets; return 1
 	fi
 
 	load_project_config "$target_dir" || return 1

From cfc9f62ffee12c4f4cd9791799f6eac8608a9b76 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 22:02:26 +0100
Subject: [PATCH 0708/1549] trees: unified handling of source downloads

run it from load_project_config()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 21 ++++++++-------------
 1 file changed, 8 insertions(+), 13 deletions(-)

diff --git a/script/trees b/script/trees
index 304c7524..1036976e 100755
--- a/script/trees
+++ b/script/trees
@@ -12,7 +12,7 @@ set -u -e
 cbmakeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 eval `setvars "" xarch cdir config cmakedir xlang mode makeargs elfdir xtree \
     project target target_dir targets tree _f target1 bootstrapargs mkhelper \
-    autoconfargs config_name listfile autogenargs btype`
+    autoconfargs config_name listfile autogenargs btype _cmd`
 
 main()
 {
@@ -57,11 +57,6 @@ main()
 
 build_project()
 {
-	if [ "$mode" = "fetch" ]; then
-		[ -f "CHANGELOG" ] && return 0
-		fetch_project; return 0
-	fi
-
 	load_project_config "$cfgsdir" 0 || return 0
 	[ -f "$listfile" ] || listfile="" # optional on single-tree
 
@@ -125,10 +120,6 @@ handle_defconfig()
 handle_src_tree()
 {
 	target_dir="$cfgsdir/$target"
-	if [ "$mode" = "fetch" ]; then
-		[ -f "CHANGELOG" ] && return 1
-		fetch_targets; return 1
-	fi
 
 	load_project_config "$target_dir" || return 1
 	x_ mkdir -p "$elfdir/$target"
@@ -158,10 +149,14 @@ load_project_config()
 	# target.cfg optional on single-tree so return if missing.
 	# target.cfg mandatory on multi-tree so err if missing.
 	_setcfgarg="" && [ $# -gt 1 ] && _setcfgarg="$2"
-	eval `setcfg "$1/target.cfg" $_setcfgarg`
+	if [ -f "$1/target.cfg" ] || [ -z "$_setcfgarg" ]; then
+		eval `setcfg "$1/target.cfg" $_setcfgarg`
+	fi
 
-	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || \
-	    return 1; return 0
+	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
+
+	[ "$mode" = "fetch" ] || return 0
+	[ -f "CHANGELOG" ] && return 1; fetch_${_cmd#build_}; return 1
 }
 
 check_cross_compiler()

From a5e724e51ea8e40da72493cec36506527123e842 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 29 Jun 2024 23:13:55 +0100
Subject: [PATCH 0709/1549] trees: unified multi-tree configuration handling

the same function that loads configurations for single-tree
projects has been merged with the function for multi-tree
configs in git.sh, and that functionality has been removed
from git.sh; now it is all unified in the trees script.

as the saying goes: write one program to do one thing well.

the purpose of git.sh is to download source code, but not
to handle configuration files; the latter is meant to be
handled by the trees script, which then calls into git.sh
before running the build logic for that given project.

additionally: the "seen" files are no longer handled, at all.
the logic there was added ages ago, because at the time, i was
considering whether to separate configuration into a new
repository, so that users could more easily make their own
configuration, so it was a guard against misconfiguration.
however, that decision was canceled and we're always very
careful not to introduce a loop; if a loop does occur, the
worst that can possibly happen is you waste some CPU cycles.

Instead, print (on standard output) what config file is being
used, so the operator can see when an infinite loop occurs.

ALSO:

remove _setcfgarg in load_project_config()

it was used to skip when a target.cfg file didn't exist,
specifically on single-tree projects, but this is now
handled using -f instead, on the while loop inside that
function, so _setcfgarg is now a redundant variable.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 31 +++++--------------------------
 script/trees   | 32 ++++++++++++++++++++------------
 2 files changed, 25 insertions(+), 38 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index f65fe85e..e73f1ad7 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -2,42 +2,21 @@
 # Copyright (c) 2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
-eval `setvars "" _target rev loc url bkup_url depend tree_depend xtree mdir \
-    subhash subrepo subrepo_bkup subfile subfile_bkup`
+eval `setvars "" rev loc url bkup_url depend tree_depend xtree mdir subhash \
+    subrepo subrepo_bkup subfile subfile_bkup`
 
 fetch_targets()
 {
-	_target="$target"
 	[ ! -d "src/$project/$project" ] && x_ mkdir -p "src/$project" \
 	    && fetch_project "$project"
-	fetch_config
-	e "src/$project/$tree" d || prepare_new_tree; return 0
-}
-
-fetch_config()
-{
-	rm -f "$cfgsdir/"*/seen || $err "fetch_config $cfgsdir: !rm seen"
-	eval `setvars "" xtree tree_depend`
-	while true; do
-		eval `setvars "" rev tree`
-		load_target_config "$_target"
-		[ "$_target" = "$tree" ] && break
-		_target="$tree"
-	done
 	[ -n "$tree_depend" ] && [ "$tree_depend" != "$tree" ] && \
-		x_ ./update trees -f "$project" "$tree_depend"; return 0
-}
-
-load_target_config()
-{
-	[ -f "$cfgsdir/$1/seen" ] && $err "$project/$_target: tree loop"
-	eval `setcfg "$cfgsdir/$1/target.cfg"`
-	touch "$cfgsdir/$1/seen" || $err "load_config $cfgsdir/$1: !mk seen"
+		x_ ./update trees -f "$project" "$tree_depend"
+	e "src/$project/$tree" d || prepare_new_tree; return 0
 }
 
 prepare_new_tree()
 {
-	printf "Creating %s tree %s (%s)\n" "$project" "$tree" "$_target"
+	printf "Creating %s tree %s\n" "$project" "$tree"
 
 	git_prep "src/$project/$project" "src/$project/$project" \
 	    "$PWD/$cfgsdir/$tree/patches" "src/$project/$tree" "update"
diff --git a/script/trees b/script/trees
index 1036976e..b5cf13f0 100755
--- a/script/trees
+++ b/script/trees
@@ -12,7 +12,7 @@ set -u -e
 cbmakeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 eval `setvars "" xarch cdir config cmakedir xlang mode makeargs elfdir xtree \
     project target target_dir targets tree _f target1 bootstrapargs mkhelper \
-    autoconfargs config_name listfile autogenargs btype _cmd`
+    autoconfargs config_name listfile autogenargs btype cmd`
 
 main()
 {
@@ -46,8 +46,8 @@ main()
 
 	remkdir "${tmpgit%/*}"
 
-	_cmd="build_targets" && singletree "$project" && _cmd="build_project"
-	$_cmd $@
+	cmd="build_targets" && singletree "$project" && cmd="build_project"
+	$cmd $@
 
 	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
 
@@ -57,7 +57,7 @@ main()
 
 build_project()
 {
-	load_project_config "$cfgsdir" 0 || return 0
+	load_project_config "$cfgsdir" || return 0
 	[ -f "$listfile" ] || listfile="" # optional on single-tree
 
 	dest_dir="$elfdir"
@@ -142,21 +142,29 @@ handle_src_tree()
 
 load_project_config()
 {
-	eval `setvars "" xarch xlang tree bootstrapargs autoconfargs xtree \
+	eval `setvars "" xarch xlang bootstrapargs autoconfargs xtree \
 	    tree_depend makeargs btype mkhelper`
 	[ -f "$1/target.cfg" ] || btype="auto"
 
-	# target.cfg optional on single-tree so return if missing.
-	# target.cfg mandatory on multi-tree so err if missing.
-	_setcfgarg="" && [ $# -gt 1 ] && _setcfgarg="$2"
-	if [ -f "$1/target.cfg" ] || [ -z "$_setcfgarg" ]; then
-		eval `setcfg "$1/target.cfg" $_setcfgarg`
-	fi
+	_tcfg="$1/target.cfg"
+	while [ -f "$_tcfg" ] || [ "$cmd" = "build_targets" ]; do
+		# target.cfg optional on single-tree so return if missing.
+		# target.cfg mandatory on multi-tree so err if missing.
+		eval `setvars "" rev tree`
+
+		printf "Loading %s config: %s\n" "$project" "$_tcfg"
+		eval `setcfg "$_tcfg"`
+		[ "$cmd" = "build_project" ] && break
+		[ "$mode" = "fetch" ] || break
+
+		[ "${_tcfg%/*/target.cfg}" = "${_tcfg%"/$tree/target.cfg"}" ] \
+		    && break; _tcfg="${_tcfg%/*/target.cfg}/$tree/target.cfg"
+	done
 
 	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
 
 	[ "$mode" = "fetch" ] || return 0
-	[ -f "CHANGELOG" ] && return 1; fetch_${_cmd#build_}; return 1
+	[ -f "CHANGELOG" ] && return 1; fetch_${cmd#build_}; return 1
 }
 
 check_cross_compiler()

From 789631ccb822560281c5b52f849b54e80bf92467 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 00:40:30 +0100
Subject: [PATCH 0710/1549] trees, multi: download bare project *before* trees

when downloading multi-tree projects, the rev can be reset
to HEAD instead of the actual rev for a given target. this
occurs when the bare repo (e.g. src/coreboot/coreboot) does
not exist and has to be downloaded first.

bare repository downloading does not rely on target.cfg, in
this context, only pkg.cfg, but it uses the same variable
names (e.g. "rev").

instead of using a separate variable name, thus increasing
code complexity (which is the exact opposite of what i want
to do), do the bare repository download first.

this means that the git.sh script is much cleaner now, for
multi-tree projects, in that it *only* copies the bare repo
then runs git_prep; in that context, the bare repo is cloned
directly by calling the relevant function from script/trees,
which is the same behaviour as when cloning single-tree
project sources.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 2 --
 script/trees   | 3 +++
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index e73f1ad7..12aa80d4 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -7,8 +7,6 @@ eval `setvars "" rev loc url bkup_url depend tree_depend xtree mdir subhash \
 
 fetch_targets()
 {
-	[ ! -d "src/$project/$project" ] && x_ mkdir -p "src/$project" \
-	    && fetch_project "$project"
 	[ -n "$tree_depend" ] && [ "$tree_depend" != "$tree" ] && \
 		x_ ./update trees -f "$project" "$tree_depend"
 	e "src/$project/$tree" d || prepare_new_tree; return 0
diff --git a/script/trees b/script/trees
index b5cf13f0..0a9cf90d 100755
--- a/script/trees
+++ b/script/trees
@@ -142,6 +142,9 @@ handle_src_tree()
 
 load_project_config()
 {
+	[ "$cmd" = "build_targets" ] && [ ! -d "src/$project/$project" ] && \
+	    x_ mkdir -p "src/$project" && fetch_project "$project"
+
 	eval `setvars "" xarch xlang bootstrapargs autoconfargs xtree \
 	    tree_depend makeargs btype mkhelper`
 	[ -f "$1/target.cfg" ] || btype="auto"

From 1ec9fc336804aaf70eecd64763a87a7478ab03d6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 01:07:59 +0100
Subject: [PATCH 0711/1549] trees: mv load_project_config load_target_config

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index 0a9cf90d..9c1531a2 100755
--- a/script/trees
+++ b/script/trees
@@ -57,7 +57,7 @@ main()
 
 build_project()
 {
-	load_project_config "$cfgsdir" || return 0
+	load_target_config "$cfgsdir" || return 0
 	[ -f "$listfile" ] || listfile="" # optional on single-tree
 
 	dest_dir="$elfdir"
@@ -121,7 +121,7 @@ handle_src_tree()
 {
 	target_dir="$cfgsdir/$target"
 
-	load_project_config "$target_dir" || return 1
+	load_target_config "$target_dir" || return 1
 	x_ mkdir -p "$elfdir/$target"
 
 	chkvars tree
@@ -140,7 +140,7 @@ handle_src_tree()
 	[ -z "$mode" ] && check_cross_compiler; return 0
 }
 
-load_project_config()
+load_target_config()
 {
 	[ "$cmd" = "build_targets" ] && [ ! -d "src/$project/$project" ] && \
 	    x_ mkdir -p "src/$project" && fetch_project "$project"

From 5639481419cfe2380df8a1dc326777753bef882a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 13:30:35 +0100
Subject: [PATCH 0712/1549] trees: condense handle_makefile() a bit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/script/trees b/script/trees
index 9c1531a2..869b5714 100755
--- a/script/trees
+++ b/script/trees
@@ -232,8 +232,7 @@ handle_makefile()
 
 	run_make_command || $err "handle_makefile $cdir: no makefile!"
 
-	_copy=".config"
-	[ "$mode" = "savedefconfig" ] && _copy="defconfig"
+	_copy=".config" && [ "$mode" = "savedefconfig" ] && _copy="defconfig"
 	[ "${mode%config}" = "$mode" ] || x_ cp "$cdir/$_copy" "$config"
 
 	[ -e "$cdir/.git" ] && [ "$project" = "u-boot" ] && \

From eacc41e82af5975ffd310337b0b77d6bb4e5db64 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 13:42:42 +0100
Subject: [PATCH 0713/1549] trees: condense run_make_command() a bit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index 869b5714..04459ad0 100755
--- a/script/trees
+++ b/script/trees
@@ -249,9 +249,7 @@ run_make_command()
 		    && makeargs="$makeargs $cbmakeargs"
 
 	make -C "$cdir" $mode -j$XBMK_THREADS $makeargs || $err "$cdir mk$mode"
-
-	[ -z "$mkhelper" ] || [ -n "$mode" ] || $mkhelper || \
-	    $err "$cdir: helper command failed: $mkhelper" # eg mkpayload_grub
+	[ -z "$mkhelper" ] || [ -n "$mode" ] || $mkhelper || $err "!$mkhelper"
 
 	[ "$mode" != "clean" ] && return 0
 	make -C "$cdir" distclean 2>/dev/null || :

From 0c4ad24b0564a1280034674acdc9d7d5b9e7a41f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 13:46:31 +0100
Subject: [PATCH 0714/1549] trees: remove unnecessary commonts

behaviour described there is obvious just
from analysing the while loop condition

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 --
 1 file changed, 2 deletions(-)

diff --git a/script/trees b/script/trees
index 04459ad0..541b802e 100755
--- a/script/trees
+++ b/script/trees
@@ -151,8 +151,6 @@ load_target_config()
 
 	_tcfg="$1/target.cfg"
 	while [ -f "$_tcfg" ] || [ "$cmd" = "build_targets" ]; do
-		# target.cfg optional on single-tree so return if missing.
-		# target.cfg mandatory on multi-tree so err if missing.
 		eval `setvars "" rev tree`
 
 		printf "Loading %s config: %s\n" "$project" "$_tcfg"

From 73949606195c0e795760c5bf741e1621f3a01e68 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 14:00:19 +0100
Subject: [PATCH 0715/1549] git.sh: remove duplicate "xtree" variable

it's already defined inside the trees script

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 12aa80d4..08a1d449 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -2,8 +2,8 @@
 # Copyright (c) 2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
-eval `setvars "" rev loc url bkup_url depend tree_depend xtree mdir subhash \
-    subrepo subrepo_bkup subfile subfile_bkup`
+eval `setvars "" rev loc url bkup_url depend tree_depend mdir subhash subrepo \
+    subrepo_bkup subfile subfile_bkup`
 
 fetch_targets()
 {

From 030f1afd8ee79fd9bdb02c041050a80f2f14a632 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 14:08:22 +0100
Subject: [PATCH 0716/1549] trees: rename variable "config" to defconfig

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/script/trees b/script/trees
index 541b802e..79a5898c 100755
--- a/script/trees
+++ b/script/trees
@@ -10,9 +10,9 @@ set -u -e
 . "include/git.sh"
 
 cbmakeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
-eval `setvars "" xarch cdir config cmakedir xlang mode makeargs elfdir xtree \
-    project target target_dir targets tree _f target1 bootstrapargs mkhelper \
-    autoconfargs config_name listfile autogenargs btype cmd`
+eval `setvars "" xarch cdir defconfig cmakedir xlang mode makeargs elfdir cmd \
+    project target target_dir targets xtree _f target1 bootstrapargs mkhelper \
+    autoconfargs config_name listfile autogenargs btype tree`
 
 main()
 {
@@ -108,8 +108,8 @@ handle_defconfig()
 
 	for y in "$target_dir/config"/*; do
 		[ -f "$y" ] || continue
-		config="$y"
-		config_name="${config#"$target_dir/config/"}"
+		defconfig="$y"
+		config_name="${defconfig#"$target_dir/config/"}"
 
 		[ -n "$mode" ] || check_config || continue
 		handle_makefile
@@ -205,7 +205,7 @@ check_coreboot_utils()
 
 check_config()
 {
-	[ -f "$config" ] || $err "check_config $project/$target: no config"
+	[ -f "$defconfig" ] || $err "check_config $project/$target: no config"
 
 	dest_dir="$elfdir/$target/$config_name"
 	elfcheck || return 1 # skip build if a previous one exists
@@ -224,14 +224,14 @@ elfcheck()
 handle_makefile()
 {
 	check_makefile "$cdir" && x_ make clean -C "$cdir"
-	x_ cp "$config" "$cdir/.config"
+	x_ cp "$defconfig" "$cdir/.config"
 	[ -n "$mode" ] || [ -n "$btype" ] || make -C "$cdir" \
 	    silentoldconfig || make -C "$cdir" oldconfig || :
 
 	run_make_command || $err "handle_makefile $cdir: no makefile!"
 
 	_copy=".config" && [ "$mode" = "savedefconfig" ] && _copy="defconfig"
-	[ "${mode%config}" = "$mode" ] || x_ cp "$cdir/$_copy" "$config"
+	[ "${mode%config}" = "$mode" ] || x_ cp "$cdir/$_copy" "$defconfig"
 
 	[ -e "$cdir/.git" ] && [ "$project" = "u-boot" ] && \
 	    [ "$mode" = "distclean" ] && x_ git -C "$cdir" clean -fdx; return 0

From ba7b3a3b21349b9929df674b34a317d03b88a341 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 14:10:49 +0100
Subject: [PATCH 0717/1549] trees: remove variable "config_name"

it's only ever used once, so just use the value that
it's set to, without declaring the variable itself

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index 79a5898c..0bf32548 100755
--- a/script/trees
+++ b/script/trees
@@ -12,7 +12,7 @@ set -u -e
 cbmakeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 eval `setvars "" xarch cdir defconfig cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f target1 bootstrapargs mkhelper \
-    autoconfargs config_name listfile autogenargs btype tree`
+    autoconfargs listfile autogenargs btype tree`
 
 main()
 {
@@ -109,7 +109,6 @@ handle_defconfig()
 	for y in "$target_dir/config"/*; do
 		[ -f "$y" ] || continue
 		defconfig="$y"
-		config_name="${defconfig#"$target_dir/config/"}"
 
 		[ -n "$mode" ] || check_config || continue
 		handle_makefile
@@ -207,7 +206,7 @@ check_config()
 {
 	[ -f "$defconfig" ] || $err "check_config $project/$target: no config"
 
-	dest_dir="$elfdir/$target/$config_name"
+	dest_dir="$elfdir/$target/${defconfig#"$target_dir/config/"}"
 	elfcheck || return 1 # skip build if a previous one exists
 
 	x_ mkdir -p "$dest_dir"

From 1a7c8acb0e27f261e7d4bc13a30f1047491133f5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 14:13:52 +0100
Subject: [PATCH 0718/1549] trees: rename check_config to check_defconfig

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index 0bf32548..2856a0fe 100755
--- a/script/trees
+++ b/script/trees
@@ -110,7 +110,7 @@ handle_defconfig()
 		[ -f "$y" ] || continue
 		defconfig="$y"
 
-		[ -n "$mode" ] || check_config || continue
+		[ -n "$mode" ] || check_defconfig || continue
 		handle_makefile
 		[ -n "$mode" ] || copy_elf
 	done
@@ -202,9 +202,9 @@ check_coreboot_utils()
 	done; return 0
 }
 
-check_config()
+check_defconfig()
 {
-	[ -f "$defconfig" ] || $err "check_config $project/$target: no config"
+	[ -f "$defconfig" ] || $err "$project/$target: missing defconfig"
 
 	dest_dir="$elfdir/$target/${defconfig#"$target_dir/config/"}"
 	elfcheck || return 1 # skip build if a previous one exists

From d5928c9ba8c5099f78e5d444587e854b5f1b5d23 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 14:39:20 +0100
Subject: [PATCH 0719/1549] trees: add return to handle_defconfig()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index 2856a0fe..aa32df81 100755
--- a/script/trees
+++ b/script/trees
@@ -113,7 +113,7 @@ handle_defconfig()
 		[ -n "$mode" ] || check_defconfig || continue
 		handle_makefile
 		[ -n "$mode" ] || copy_elf
-	done
+	done; return 0
 }
 
 handle_src_tree()

From 88f741db92b22069f43009fc936e3ad74bbc780f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 15:39:41 +0100
Subject: [PATCH 0720/1549] trees: condense copy_elf() a bit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/script/trees b/script/trees
index aa32df81..835cd504 100755
--- a/script/trees
+++ b/script/trees
@@ -297,8 +297,7 @@ copy_elf()
 {
 	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do
 		[ -f "$cdir/$f" ] && x_ cp "$cdir/$f" "$dest_dir"
-	done < "$listfile"
-	x_ make clean -C "$cdir"
+	done < "$listfile"; x_ make clean -C "$cdir"
 }
 
 main $@

From f937a1142d1761072b4cb9314e0db697f26cc544 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 15:46:03 +0100
Subject: [PATCH 0721/1549] trees run_make_command: simpler distclean handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/script/trees b/script/trees
index 835cd504..dfe1eb01 100755
--- a/script/trees
+++ b/script/trees
@@ -248,8 +248,7 @@ run_make_command()
 	make -C "$cdir" $mode -j$XBMK_THREADS $makeargs || $err "$cdir mk$mode"
 	[ -z "$mkhelper" ] || [ -n "$mode" ] || $mkhelper || $err "!$mkhelper"
 
-	[ "$mode" != "clean" ] && return 0
-	make -C "$cdir" distclean 2>/dev/null || :
+	[ "$mode" = "clean" ] && make -C "$cdir" distclean || :; return 0
 }
 
 check_cmake()

From 017fd8259eddcfd758cce0a1a4bb1667ba1020ed Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 15:49:35 +0100
Subject: [PATCH 0722/1549] git.sh: merge prepare_new_tree with fetch_targets

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 08a1d449..4cd70f29 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -9,13 +9,9 @@ fetch_targets()
 {
 	[ -n "$tree_depend" ] && [ "$tree_depend" != "$tree" ] && \
 		x_ ./update trees -f "$project" "$tree_depend"
-	e "src/$project/$tree" d || prepare_new_tree; return 0
-}
+	e "src/$project/$tree" d && return 0
 
-prepare_new_tree()
-{
 	printf "Creating %s tree %s\n" "$project" "$tree"
-
 	git_prep "src/$project/$project" "src/$project/$project" \
 	    "$PWD/$cfgsdir/$tree/patches" "src/$project/$tree" "update"
 	nuke "$project/$tree" "$project/$tree"

From 89a81a2910f34eb3c131c8cbfa14dc17356cd665 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 16:16:07 +0100
Subject: [PATCH 0723/1549] trees: simplified multi-tree bare repo clone

the git_prep function already creates the given
directory where source code goes, so we don't
need to do it from the trees script.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index dfe1eb01..cce30980 100755
--- a/script/trees
+++ b/script/trees
@@ -120,6 +120,7 @@ handle_src_tree()
 {
 	target_dir="$cfgsdir/$target"
 
+	fetch_project "$project"
 	load_target_config "$target_dir" || return 1
 	x_ mkdir -p "$elfdir/$target"
 
@@ -141,9 +142,6 @@ handle_src_tree()
 
 load_target_config()
 {
-	[ "$cmd" = "build_targets" ] && [ ! -d "src/$project/$project" ] && \
-	    x_ mkdir -p "src/$project" && fetch_project "$project"
-
 	eval `setvars "" xarch xlang bootstrapargs autoconfargs xtree \
 	    tree_depend makeargs btype mkhelper`
 	[ -f "$1/target.cfg" ] || btype="auto"

From c62dbdbe82abfbca4dfb2802a4e154e74b7a5a4f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 16:23:32 +0100
Subject: [PATCH 0724/1549] trees: only do bare multi-tree clone on git

i forgot to add the check for CHANGELOG

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index cce30980..f5ed5141 100755
--- a/script/trees
+++ b/script/trees
@@ -120,7 +120,7 @@ handle_src_tree()
 {
 	target_dir="$cfgsdir/$target"
 
-	fetch_project "$project"
+	[ -f "CHANGELOG" ] || fetch_project "$project"
 	load_target_config "$target_dir" || return 1
 	x_ mkdir -p "$elfdir/$target"
 

From 4772186b19fe4bdf412bb3364b9358d5f59eff55 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 17:02:44 +0100
Subject: [PATCH 0725/1549] git.sh: short git_prep command in fetch_targets()

loc is already set, and will correspond to the same
path, so we can quite conveniently use it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 4cd70f29..6dbc2a85 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -11,9 +11,10 @@ fetch_targets()
 		x_ ./update trees -f "$project" "$tree_depend"
 	e "src/$project/$tree" d && return 0
 
+
 	printf "Creating %s tree %s\n" "$project" "$tree"
-	git_prep "src/$project/$project" "src/$project/$project" \
-	    "$PWD/$cfgsdir/$tree/patches" "src/$project/$tree" "update"
+	git_prep "$loc" "$loc" "$PWD/$cfgsdir/$tree/patches" \
+	    "${loc%/*}/$tree" u
 	nuke "$project/$tree" "$project/$tree"
 }
 

From 5ba0433b5fadb36e8eadec8382d2750b4e912a2c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 17:04:24 +0100
Subject: [PATCH 0726/1549] git.sh: condense fetch_targets() a bit

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 6dbc2a85..a832030a 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -11,11 +11,9 @@ fetch_targets()
 		x_ ./update trees -f "$project" "$tree_depend"
 	e "src/$project/$tree" d && return 0
 
-
 	printf "Creating %s tree %s\n" "$project" "$tree"
 	git_prep "$loc" "$loc" "$PWD/$cfgsdir/$tree/patches" \
-	    "${loc%/*}/$tree" u
-	nuke "$project/$tree" "$project/$tree"
+	    "${loc%/*}/$tree" u; nuke "$project/$tree" "$project/$tree"
 }
 
 fetch_project()

From 0cb84a8dd12117029cd1c1511f400b6ec5abacb1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 17:13:49 +0100
Subject: [PATCH 0727/1549] trees: simplified distclean directory check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/script/trees b/script/trees
index f5ed5141..b96c1ac0 100755
--- a/script/trees
+++ b/script/trees
@@ -127,14 +127,10 @@ handle_src_tree()
 	chkvars tree
 	cdir="src/$project/$tree"
 
-	if [ ! -d "$cdir" ]; then
-		if [ "$mode" = "distclean" ] || \
-		    [ "$mode" = "crossgcc-clean" ]; then
-			printf "Dir '%s' missing; skip clean\n" "$cdir" 1>&2
-			return 1
-		fi
-		x_ ./update trees -f "$project" "$target"
+	if [ "$mode" = "distclean" ] || [ "$mode" = "crossgcc-clean" ]; then
+		[ -d "$cdir" ] || return 1
 	fi
+	x_ ./update trees -f "$project" "$target"
 
 	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
 	[ -z "$mode" ] && check_cross_compiler; return 0

From 55dbd72aaf7796f01ad749239fd4874392c9ae22 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 17:56:32 +0100
Subject: [PATCH 0728/1549] git.sh: simplified initialisation of "loc"

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index a832030a..4e965e04 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -37,8 +37,7 @@ fetch_project()
 
 clone_project()
 {
-	loc="src/$project"
-	singletree "$project" || loc="src/$project/$project"
+	loc="src/$project/$project" && singletree "$project" && loc="${loc%/*}"
 
 	printf "Downloading project '%s' to '%s'\n" "$project" "$loc"
 	e "$loc" d && return 0

From 67421a21fd3a8e0cc6909ca4d96eaa875dd544d7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 18:10:22 +0100
Subject: [PATCH 0729/1549] trees and git.sh: tidy up global variables

some of the variables only initialised in git.sh are
also used in the trees script, which is technically ok
because git.sh is included from the trees script, but
it makes more sense to declare them in the latter.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 ++--
 script/trees   | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 4e965e04..11e13a6c 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -2,8 +2,8 @@
 # Copyright (c) 2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
-eval `setvars "" rev loc url bkup_url depend tree_depend mdir subhash subrepo \
-    subrepo_bkup subfile subfile_bkup`
+eval `setvars "" loc url bkup_url subfile mdir subhash subrepo subrepo_bkup \
+    depend subfile_bkup`
 
 fetch_targets()
 {
diff --git a/script/trees b/script/trees
index b96c1ac0..2b7dfaf0 100755
--- a/script/trees
+++ b/script/trees
@@ -12,7 +12,7 @@ set -u -e
 cbmakeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 eval `setvars "" xarch cdir defconfig cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f target1 bootstrapargs mkhelper \
-    autoconfargs listfile autogenargs btype tree`
+    autoconfargs listfile autogenargs btype tree rev tree_depend`
 
 main()
 {

From 5882056a27b91e4b947951501c8dbee9b811c4a5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 18:14:58 +0100
Subject: [PATCH 0730/1549] git.sh: merge for loops in git_am_patches()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 11e13a6c..70ec087c 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -112,12 +112,10 @@ git_am_patches()
 {
 	for _patch in "$2/"*; do
 		[ -L "$_patch" ] || [ ! -f "$_patch" ] || git -C "$1" am \
-		    "$_patch" || $err "$1 $2: !git am $_patch"; continue
-	done
-	for _patches in "$2/"*; do
-		[ ! -L "$_patches" ] && [ -d "$_patches" ] && \
-			git_am_patches "$1" "$_patches"; continue
-	done
+		    "$_patch" || $err "$1 $2: !git am $_patch"
+		[ -L "$_patch" ] || [ ! -d "$_patch" ] || \
+		    git_am_patches "$1" "$_patch"; continue
+	done; return 0
 }
 
 link_crossgcc()

From 0018600d6e21f69eb00651e88074920b2a8f62d7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 18:23:15 +0100
Subject: [PATCH 0731/1549] git.sh: simpler for loop in git_am_patches()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 70ec087c..b0acd7dc 100755
--- a/include/git.sh
+++ b/include/git.sh
@@ -110,11 +110,10 @@ tmpclone()
 
 git_am_patches()
 {
-	for _patch in "$2/"*; do
-		[ -L "$_patch" ] || [ ! -f "$_patch" ] || git -C "$1" am \
-		    "$_patch" || $err "$1 $2: !git am $_patch"
-		[ -L "$_patch" ] || [ ! -d "$_patch" ] || \
-		    git_am_patches "$1" "$_patch"; continue
+	for p in "$2/"*; do
+		[ -L "$p" ] && continue; [ -e "$p" ] || continue
+		[ -d "$p" ] && git_am_patches "$1" "$p" && continue
+		[ ! -f "$p" ] || git -C "$1" am "$p" || $err "$1 $2: !am $p"
 	done; return 0
 }
 

From b7f12ade03dc53788ed21189fd355582eb9490bb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 19:22:58 +0100
Subject: [PATCH 0732/1549] vendor.sh: remove mkdirs()

merge it into the only calling function

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 18 +++++++-----------
 1 file changed, 7 insertions(+), 11 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 2c5f7c74..e282eedd 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -83,23 +83,19 @@ fetch()
 	download "$dl" "$dl_bkup" "$_dl" "$dlsum"
 
 	x_ rm -Rf "${_dl}_extracted"
-	mkdirs "$_dest" "extract_$dl_type" || return 0
+	e "$_dest" f && return 0
+
+	mkdir -p "${_dest%/*}" || $err "mkdirs: !mkdir -p ${_dest%/*}"
+	remkdir "$appdir"
+	extract_archive "$_dl" "$appdir" || [ "$dl_type" = "e6400vga" ] || \
+	    $err "mkdirs $_dest $dl_type: !extract"
+
 	eval "extract_$dl_type"
 	set -u -e
 
 	e "$_dest" f missing && $err "!extract_$dl_type"; return 0
 }
 
-mkdirs()
-{
-	e "$1" f && return 1
-
-	mkdir -p "${1%/*}" || $err "mkdirs: !mkdir -p ${1%/*}"
-	remkdir "$appdir"
-	extract_archive "$_dl" "$appdir" || [ "$2" = "extract_e6400vga" ] || \
-	    $err "mkdirs $1 $2: !extract"; return 0
-}
-
 extract_intel_me()
 {
 	e "$mecleaner" f not && $err "$cbdir: me_cleaner missing"

From 2b49714a6ae2920a4de4131768bffc2d1d40a666 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 21:31:01 +0100
Subject: [PATCH 0733/1549] trees: handle all projects if project undefined

e.g. ./update trees -f

if passed, this command would download every tree

similarly, the -c option can be used in this way. this
solves a longstanding issue: on the current, much more
efficient design, it was not possible to systematically
clean every project.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build        | 12 ++----------
 script/trees |  8 ++++++--
 2 files changed, 8 insertions(+), 12 deletions(-)

diff --git a/build b/build
index b7af9048..91843d3f 100755
--- a/build
+++ b/build
@@ -92,7 +92,8 @@ build_release()
 {
 	(
 	cd "$srcdir" || $err "$vdir: !cd \"$srcdir\""
-	fetch_trees
+	./update trees -f
+	rmgit .
 	x_ mv src/docs docs
 	) || $err "can't create release files"
 
@@ -119,15 +120,6 @@ build_release()
 	rm -Rf "$srcdir" || $err "!rm -Rf $srcdir"
 }
 
-fetch_trees()
-{
-	for x in $(ls -1 config/git); do
-		./update trees -f "$x" || $err "$vdir: fetch $x"
-		singletree "$x" || x_ rm -Rf "src/$x/$x"
-	done
-	rmgit .
-}
-
 fail()
 {
 	tmp_cleanup || printf "WARNING: can't rm tmpfiles: %s\n" "$TMPDIR" 1>&2
diff --git a/script/trees b/script/trees
index 2b7dfaf0..10c08d1e 100755
--- a/script/trees
+++ b/script/trees
@@ -31,11 +31,15 @@ main()
 		-n) mode="nconfig" ;;
 		*) $err "invalid option '-$option'" ;;
 		esac
-		[ -n "${OPTARG+x}" ] || $err "OPTARG not set"
+		[ -z "${OPTARG+x}" ] && shift 1 && break
 		project="${OPTARG#src/}"; shift 2
 	done
 	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
-	[ -z "$project" ] && $err "project name not specified"
+	[ -z "$project" ] && for p in $(ls -1 config/git); do
+		./update trees $_f "$p" || $err "!./update trees $_f $p"
+		[ "$XBMK_RELEASE" != "y" ] || singletree "$p" || \
+		    x_ rm Rf "src/$p/$p"; continue
+	done && return 0
 
 	[ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined"
 

From 3ef84af9fda3fdac138836d6a4adfcf2dd98c75e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 30 Jun 2024 22:22:15 +0100
Subject: [PATCH 0734/1549] trees: allow global config on multi-tree projects

config/data/PROJECT/mkhelper.cfg can be provided, for
configuration, and it is loaded *before* target.cfg

there are certain instances where we repeat a lot of
config per tree, in multi-tree projects.

for example, we have the exact same config per grub
tree, besides tree name and revision number, for things
like autoconf arguments.

this last problem will be addressed, in a follow-up
patch, and then expanded upon for other projects.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 1 +
 1 file changed, 1 insertion(+)

diff --git a/script/trees b/script/trees
index 10c08d1e..fff1d890 100755
--- a/script/trees
+++ b/script/trees
@@ -145,6 +145,7 @@ load_target_config()
 	eval `setvars "" xarch xlang bootstrapargs autoconfargs xtree \
 	    tree_depend makeargs btype mkhelper`
 	[ -f "$1/target.cfg" ] || btype="auto"
+	[ -f "$datadir/mkhelper.cfg" ] && eval `setcfg "$datadir/mkhelper.cfg"`
 
 	_tcfg="$1/target.cfg"
 	while [ -f "$_tcfg" ] || [ "$cmd" = "build_targets" ]; do

From 3ee045f9ad8880fbb64227cfbe7b36e5770370d1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jul 2024 03:32:35 +0100
Subject: [PATCH 0735/1549] GRUB: use mkhelper.cfg for common variables

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/grub/mkhelper.cfg  | 5 +++++
 config/grub/default/target.cfg | 5 -----
 config/grub/nvme/target.cfg    | 5 -----
 config/grub/xhci/target.cfg    | 5 -----
 4 files changed, 5 insertions(+), 15 deletions(-)
 create mode 100644 config/data/grub/mkhelper.cfg

diff --git a/config/data/grub/mkhelper.cfg b/config/data/grub/mkhelper.cfg
new file mode 100644
index 00000000..ff93a27c
--- /dev/null
+++ b/config/data/grub/mkhelper.cfg
@@ -0,0 +1,5 @@
+bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
+autoconfargs="--with-platform=coreboot --disable-werror"
+makeargs="FS_PAYLOAD_MODULES=\"\""
+btype="autohell"
+mkhelper="mkpayload_grub"
diff --git a/config/grub/default/target.cfg b/config/grub/default/target.cfg
index a5936693..e6ed598b 100644
--- a/config/grub/default/target.cfg
+++ b/config/grub/default/target.cfg
@@ -1,7 +1,2 @@
 tree="default"
 rev="8719cc2040368d43ab2de0b6e1b850b2c9cfc5b7"
-bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
-autoconfargs="--with-platform=coreboot --disable-werror"
-makeargs="FS_PAYLOAD_MODULES=\"\""
-btype="autohell"
-mkhelper="mkpayload_grub"
diff --git a/config/grub/nvme/target.cfg b/config/grub/nvme/target.cfg
index f5e95daf..97a0deb5 100644
--- a/config/grub/nvme/target.cfg
+++ b/config/grub/nvme/target.cfg
@@ -1,7 +1,2 @@
 tree="nvme"
 rev="8719cc2040368d43ab2de0b6e1b850b2c9cfc5b7"
-bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
-autoconfargs="--with-platform=coreboot --disable-werror"
-makeargs="FS_PAYLOAD_MODULES=\"\""
-btype="autohell"
-mkhelper="mkpayload_grub"
diff --git a/config/grub/xhci/target.cfg b/config/grub/xhci/target.cfg
index 3cdcb5d8..61ee9757 100644
--- a/config/grub/xhci/target.cfg
+++ b/config/grub/xhci/target.cfg
@@ -1,7 +1,2 @@
 tree="xhci"
 rev="8719cc2040368d43ab2de0b6e1b850b2c9cfc5b7"
-bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
-autoconfargs="--with-platform=coreboot --disable-werror"
-makeargs="FS_PAYLOAD_MODULES=\"\""
-btype="autohell"
-mkhelper="mkpayload_grub"

From d6ff009e207537b7f925e33456d24fe90ca23fd1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jul 2024 03:34:09 +0100
Subject: [PATCH 0736/1549] roms: fix bad comparison in configure_target()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/roms b/script/roms
index 359d5725..8a2cc796 100755
--- a/script/roms
+++ b/script/roms
@@ -107,7 +107,7 @@ configure_target()
 	[ -n "$uboot_config" ] || uboot_config="default"
 	[ "$payload_uboot" = "y" ] || payload_seabios="y"
 	[ "$payload_grub" = "y" ] && payload_seabios="y"
-	[ "$payload_seabios" = "y" ] && [ -n "$payload_uboot" = "y" ] && \
+	[ "$payload_seabios" = "y" ] && [ "$payload_uboot" = "y" ] && \
 	    $err "$board: U-Boot and SeaBIOS/GRUB are both enabled."
 
 	[ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata"

From 2ab1d994906d7ff54ec8723030ef57a56a2047a4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 1 Jul 2024 13:03:04 +0100
Subject: [PATCH 0737/1549] trees: fix bad rm -Rf command (-Rf, not Rf)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index fff1d890..4ab0d406 100755
--- a/script/trees
+++ b/script/trees
@@ -38,7 +38,7 @@ main()
 	[ -z "$project" ] && for p in $(ls -1 config/git); do
 		./update trees $_f "$p" || $err "!./update trees $_f $p"
 		[ "$XBMK_RELEASE" != "y" ] || singletree "$p" || \
-		    x_ rm Rf "src/$p/$p"; continue
+		    x_ rm -Rf "src/$p/$p"; continue
 	done && return 0
 
 	[ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined"

From 065453b72e6bcf6814b3244a66985d69658a8e38 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 5 Jul 2024 18:15:56 +0100
Subject: [PATCH 0738/1549] trees: just do makeargs on coreboot, not cbmakearg

stick the makeargs in mkhelper

i previously did cbmakeargs because the old revisions
had to define makeargs per-target otherwise. mkhelper
was done specifically to solve that problem.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/coreboot/mkhelper.cfg |  1 +
 script/trees                      | 12 +++++-------
 2 files changed, 6 insertions(+), 7 deletions(-)
 create mode 100644 config/data/coreboot/mkhelper.cfg

diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
new file mode 100644
index 00000000..3418d98d
--- /dev/null
+++ b/config/data/coreboot/mkhelper.cfg
@@ -0,0 +1 @@
+makeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
diff --git a/script/trees b/script/trees
index 4ab0d406..cf344d9d 100755
--- a/script/trees
+++ b/script/trees
@@ -9,7 +9,6 @@ set -u -e
 . "include/lib.sh"
 . "include/git.sh"
 
-cbmakeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 eval `setvars "" xarch cdir defconfig cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f target1 bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend`
@@ -180,9 +179,9 @@ check_cross_compiler()
 		[ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
 
 		# sometimes buildgcc fails for like no reason. try twice.
-		make -C "$cbdir" crossgcc-${_xarch%-*} $cbmakeargs || \
-		    make -C "$cbdir" crossgcc-${_xarch%-*} $cbmakeargs || \
-		    $err "!mkxgcc $project/$xtree '${_xarch%-*}' '$cbmakeargs'"
+		make -C "$cbdir" crossgcc-${_xarch%-*} $makeargs || \
+		    make -C "$cbdir" crossgcc-${_xarch%-*} $makeargs || \
+		    $err "!mkxgcc $project/$xtree '${_xarch%-*}' '$makeargs'"
 	done; return 0
 }
 
@@ -193,7 +192,7 @@ check_coreboot_utils()
 		utilsrcdir="src/coreboot/$1/util/$util"
 
 		utilmode="" && [ -n "$mode" ] && utilmode="clean"
-		x_ make -C "$utilsrcdir" $utilmode -j$XBMK_THREADS $cbmakeargs
+		x_ make -C "$utilsrcdir" $utilmode -j$XBMK_THREADS $makeargs
 		[ -z "$mode" ] && [ ! -f "$utilelfdir/$util" ] && \
 			x_ mkdir -p "$utilelfdir" && \
 			x_ cp "$utilsrcdir/$util" "elf/$util/$1"
@@ -241,8 +240,7 @@ run_make_command()
 	check_makefile "$cdir" || return 1
 
 	[ "$project" = "coreboot" ] && [ -z "$mode" ] && x_ \
-		printf "%s\n" "${version%%-*}" > "$cdir/.coreboot-version" \
-		    && makeargs="$makeargs $cbmakeargs"
+		printf "%s\n" "${version%%-*}" > "$cdir/.coreboot-version"
 
 	make -C "$cdir" $mode -j$XBMK_THREADS $makeargs || $err "$cdir mk$mode"
 	[ -z "$mkhelper" ] || [ -n "$mode" ] || $mkhelper || $err "!$mkhelper"

From 23ca49bee846cee6b23f87bfb4d3ee07798c337a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 6 Jul 2024 02:01:59 +0100
Subject: [PATCH 0739/1549] GRUB: only load xhci from grub.cfg

don't put it in the install modules.

this works around a hanging issue on haswell thinkpads.

when any usb device is inserted, GRUB will sometimes
hang if started from the SeaBIOS payload, *while* the
USB device is plugged in.

plugging in the USB device after GRUB starts worked.
it will have to be investigated more at a later date,
but this simply configuration change works.

the xhci module is already loaded explicitly, in grub.cfg

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/grub/module/xhci | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/data/grub/module/xhci b/config/data/grub/module/xhci
index 8bf80bfe..6235bbad 100755
--- a/config/data/grub/module/xhci
+++ b/config/data/grub/module/xhci
@@ -8,6 +8,7 @@ usbserial_ftdi \
 usbserial_pl2303 \
 usbserial_usbdebug \
 video_colors \
+xhci \
 "
 # Modules (and always loaded)
 grub_modules=" \
@@ -35,7 +36,6 @@ crypto \
 cryptodisk \
 diskfilter \
 echo \
-xhci \
 ehci \
 eval \
 exfat \

From 87df6ae36957703e57eb9c5a12399289deb797fe Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 6 Jul 2024 04:29:03 +0100
Subject: [PATCH 0740/1549] trees: support build dependencies, not just fetch

We already have this to an extent, e.g. the xtree variable.

The xtree variable could probably be removed, in favour of
this, and used for the same purpose.

It works like this, for example:

build_depend="coreboot/default grub/xhci seabios u-boot/gru_bob flashprog"

the "/" denotes a tree, if it's a multi-tree project. However, specifying
the entire multi-tree project without slash is possible, for example:

build_depend="coreboot"

this would specify that all coreboot trees must be built.

This functionality will be used in follow-up commits, centralising
script/trees into mk on the main directory, repacing "build".

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/script/trees b/script/trees
index cf344d9d..aa32cfa3 100755
--- a/script/trees
+++ b/script/trees
@@ -11,7 +11,7 @@ set -u -e
 
 eval `setvars "" xarch cdir defconfig cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f target1 bootstrapargs mkhelper \
-    autoconfargs listfile autogenargs btype tree rev tree_depend`
+    autoconfargs listfile autogenargs btype tree rev tree_depend build_depend`
 
 main()
 {
@@ -142,7 +142,7 @@ handle_src_tree()
 load_target_config()
 {
 	eval `setvars "" xarch xlang bootstrapargs autoconfargs xtree \
-	    tree_depend makeargs btype mkhelper`
+	    tree_depend makeargs btype mkhelper build_depend`
 	[ -f "$1/target.cfg" ] || btype="auto"
 	[ -f "$datadir/mkhelper.cfg" ] && eval `setcfg "$datadir/mkhelper.cfg"`
 
@@ -161,6 +161,14 @@ load_target_config()
 
 	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
 
+	[ -z "$mode" ] && for bd in $build_depend; do
+		bd_project="${bd%%/*}"; bd_tree="${bd##*/}"
+		[ -z "$bd_project" ] && $err "$project/$tree: bad bd: '$bd'"
+		[ "${bd##*/}" = "$bd" ] && bd_tree=""
+		[ -z "$bd_project" ] || ./update trees -b $bd_project \
+		    $bd_tree || $err "$project/$tree: !bd $bd"; continue
+	done
+
 	[ "$mode" = "fetch" ] || return 0
 	[ -f "CHANGELOG" ] && return 1; fetch_${cmd#build_}; return 1
 }

From 6d4fb200ac7301e84d8e57d7b29f9781b3dd311c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 6 Jul 2024 04:33:55 +0100
Subject: [PATCH 0741/1549] trees: rename load_target_config()

rename it to configure_project, because the function now
also handles building (a little bit), not just mere loading
of configuration files.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index aa32cfa3..ab321869 100755
--- a/script/trees
+++ b/script/trees
@@ -60,7 +60,7 @@ main()
 
 build_project()
 {
-	load_target_config "$cfgsdir" || return 0
+	configure_project "$cfgsdir" || return 0
 	[ -f "$listfile" ] || listfile="" # optional on single-tree
 
 	dest_dir="$elfdir"
@@ -124,7 +124,7 @@ handle_src_tree()
 	target_dir="$cfgsdir/$target"
 
 	[ -f "CHANGELOG" ] || fetch_project "$project"
-	load_target_config "$target_dir" || return 1
+	configure_project "$target_dir" || return 1
 	x_ mkdir -p "$elfdir/$target"
 
 	chkvars tree
@@ -139,7 +139,7 @@ handle_src_tree()
 	[ -z "$mode" ] && check_cross_compiler; return 0
 }
 
-load_target_config()
+configure_project()
 {
 	eval `setvars "" xarch xlang bootstrapargs autoconfargs xtree \
 	    tree_depend makeargs btype mkhelper build_depend`

From c241a3ef485fcfde06f60abaf7e16bc5c549e53b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 6 Jul 2024 06:34:24 +0100
Subject: [PATCH 0742/1549] coreboot: set build_depend on target.cfg files

set a default one in mkhelper.cfg

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/d510mo/target.cfg               | 1 +
 config/coreboot/d945gclf_512kb/target.cfg       | 1 +
 config/coreboot/d945gclf_8mb/target.cfg         | 1 +
 config/coreboot/dell9020mt_nri_12mb/target.cfg  | 1 +
 config/coreboot/dell9020sff_nri_12mb/target.cfg | 1 +
 config/coreboot/g43t_am3/target.cfg             | 1 +
 config/coreboot/g43t_am3_16mb/target.cfg        | 1 +
 config/coreboot/ga_g41m_es2l/target.cfg         | 1 +
 config/coreboot/gru_bob/target.cfg              | 1 +
 config/coreboot/gru_kevin/target.cfg            | 1 +
 config/coreboot/hp8200sff_4mb/target.cfg        | 1 +
 config/coreboot/hp8200sff_8mb/target.cfg        | 1 +
 config/coreboot/hp820g2_12mb/target.cfg         | 1 +
 config/coreboot/hp8300cmt_16mb/target.cfg       | 1 +
 config/coreboot/kcma_d8-udimm_16mb/target.cfg   | 1 +
 config/coreboot/kcma_d8_rdimm_16mb/target.cfg   | 1 +
 config/coreboot/kcma_d8_rdimm_2mb/target.cfg    | 1 +
 config/coreboot/kcma_d8_udimm_2mb/target.cfg    | 1 +
 config/coreboot/kfsn4_dre_1mb/target.cfg        | 1 +
 config/coreboot/kgpe_d16_rdimm_16mb/target.cfg  | 1 +
 config/coreboot/kgpe_d16_rdimm_2mb/target.cfg   | 1 +
 config/coreboot/kgpe_d16_udimm_16mb/target.cfg  | 1 +
 config/coreboot/kgpe_d16_udimm_2mb/target.cfg   | 1 +
 config/coreboot/macbook11/target.cfg            | 1 +
 config/coreboot/macbook11_16mb/target.cfg       | 1 +
 config/coreboot/qemu_arm64_12mb/target.cfg      | 1 +
 config/coreboot/t1650_12mb/target.cfg           | 1 +
 config/coreboot/t440plibremrc_12mb/target.cfg   | 1 +
 config/coreboot/t60_16mb_intelgpu/target.cfg    | 1 +
 config/coreboot/t60_intelgpu/target.cfg         | 1 +
 config/coreboot/w541_12mb/target.cfg            | 1 +
 config/coreboot/x60/target.cfg                  | 1 +
 config/coreboot/x60_16mb/target.cfg             | 1 +
 config/data/coreboot/mkhelper.cfg               | 1 +
 34 files changed, 34 insertions(+)

diff --git a/config/coreboot/d510mo/target.cfg b/config/coreboot/d510mo/target.cfg
index 2be9c81b..bb79aee5 100644
--- a/config/coreboot/d510mo/target.cfg
+++ b/config/coreboot/d510mo/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 release="n"
+build_depend="seabios/default memtest86plus"
diff --git a/config/coreboot/d945gclf_512kb/target.cfg b/config/coreboot/d945gclf_512kb/target.cfg
index cc133e56..d2d78f7a 100644
--- a/config/coreboot/d945gclf_512kb/target.cfg
+++ b/config/coreboot/d945gclf_512kb/target.cfg
@@ -2,3 +2,4 @@ tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 release="n"
+build_depend="seabios/default"
diff --git a/config/coreboot/d945gclf_8mb/target.cfg b/config/coreboot/d945gclf_8mb/target.cfg
index 3f020323..0d97499e 100644
--- a/config/coreboot/d945gclf_8mb/target.cfg
+++ b/config/coreboot/d945gclf_8mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 release="n"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/dell9020mt_nri_12mb/target.cfg b/config/coreboot/dell9020mt_nri_12mb/target.cfg
index 3c3f9802..6d2e9a22 100644
--- a/config/coreboot/dell9020mt_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_nri_12mb/target.cfg
@@ -6,3 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
+build_depend="seabios/default grub/xhci memtest86plus"
diff --git a/config/coreboot/dell9020sff_nri_12mb/target.cfg b/config/coreboot/dell9020sff_nri_12mb/target.cfg
index 3c3f9802..6d2e9a22 100644
--- a/config/coreboot/dell9020sff_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_nri_12mb/target.cfg
@@ -6,3 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
+build_depend="seabios/default grub/xhci memtest86plus"
diff --git a/config/coreboot/g43t_am3/target.cfg b/config/coreboot/g43t_am3/target.cfg
index 796ceabf..7f3d7886 100644
--- a/config/coreboot/g43t_am3/target.cfg
+++ b/config/coreboot/g43t_am3/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/g43t_am3_16mb/target.cfg b/config/coreboot/g43t_am3_16mb/target.cfg
index 46e8fc4f..594b6612 100644
--- a/config/coreboot/g43t_am3_16mb/target.cfg
+++ b/config/coreboot/g43t_am3_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_memtest="y"
 release="n"
 grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/ga_g41m_es2l/target.cfg b/config/coreboot/ga_g41m_es2l/target.cfg
index 796ceabf..7f3d7886 100644
--- a/config/coreboot/ga_g41m_es2l/target.cfg
+++ b/config/coreboot/ga_g41m_es2l/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/gru_bob/target.cfg b/config/coreboot/gru_bob/target.cfg
index a7c36159..482ff306 100644
--- a/config/coreboot/gru_bob/target.cfg
+++ b/config/coreboot/gru_bob/target.cfg
@@ -1,3 +1,4 @@
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
+build_depend="u-boot/gru_bob"
diff --git a/config/coreboot/gru_kevin/target.cfg b/config/coreboot/gru_kevin/target.cfg
index a7c36159..993bf617 100644
--- a/config/coreboot/gru_kevin/target.cfg
+++ b/config/coreboot/gru_kevin/target.cfg
@@ -1,3 +1,4 @@
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
+build_depend="u-boot/gru_kevin"
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 59c6f1d1..54966da1 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -6,3 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="hp8200sff"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 59c6f1d1..54966da1 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -6,3 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="hp8200sff"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index 26a51303..99be701a 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -7,3 +7,4 @@ release="n"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="hp820g2"
+build_depend="seabios/default grub/xhci memtest86plus"
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index 247bb3f1..d0e19b73 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -6,3 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="ivybridge"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kcma_d8-udimm_16mb/target.cfg b/config/coreboot/kcma_d8-udimm_16mb/target.cfg
index ce97e14f..8be2926f 100644
--- a/config/coreboot/kcma_d8-udimm_16mb/target.cfg
+++ b/config/coreboot/kcma_d8-udimm_16mb/target.cfg
@@ -8,3 +8,4 @@ xlang="c"
 grub_timout=10
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kcma_d8_rdimm_16mb/target.cfg b/config/coreboot/kcma_d8_rdimm_16mb/target.cfg
index cb012f9f..fbe50f7a 100644
--- a/config/coreboot/kcma_d8_rdimm_16mb/target.cfg
+++ b/config/coreboot/kcma_d8_rdimm_16mb/target.cfg
@@ -6,3 +6,4 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kcma_d8_rdimm_2mb/target.cfg b/config/coreboot/kcma_d8_rdimm_2mb/target.cfg
index cb012f9f..fbe50f7a 100644
--- a/config/coreboot/kcma_d8_rdimm_2mb/target.cfg
+++ b/config/coreboot/kcma_d8_rdimm_2mb/target.cfg
@@ -6,3 +6,4 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kcma_d8_udimm_2mb/target.cfg b/config/coreboot/kcma_d8_udimm_2mb/target.cfg
index 9c3a0902..259dbb9b 100644
--- a/config/coreboot/kcma_d8_udimm_2mb/target.cfg
+++ b/config/coreboot/kcma_d8_udimm_2mb/target.cfg
@@ -7,3 +7,4 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kfsn4_dre_1mb/target.cfg b/config/coreboot/kfsn4_dre_1mb/target.cfg
index 79ca98c4..a7d7e297 100644
--- a/config/coreboot/kfsn4_dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_1mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
+build_depend="seabios/default memtest86plus"
diff --git a/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg b/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg
index cb012f9f..fbe50f7a 100644
--- a/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg
+++ b/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg
@@ -6,3 +6,4 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg b/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg
index cb012f9f..fbe50f7a 100644
--- a/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg
+++ b/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg
@@ -6,3 +6,4 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kgpe_d16_udimm_16mb/target.cfg b/config/coreboot/kgpe_d16_udimm_16mb/target.cfg
index 9c3a0902..259dbb9b 100644
--- a/config/coreboot/kgpe_d16_udimm_16mb/target.cfg
+++ b/config/coreboot/kgpe_d16_udimm_16mb/target.cfg
@@ -7,3 +7,4 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kgpe_d16_udimm_2mb/target.cfg b/config/coreboot/kgpe_d16_udimm_2mb/target.cfg
index 9c3a0902..259dbb9b 100644
--- a/config/coreboot/kgpe_d16_udimm_2mb/target.cfg
+++ b/config/coreboot/kgpe_d16_udimm_2mb/target.cfg
@@ -7,3 +7,4 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index c7eddcc2..1add675c 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index 1bdb98f1..03a4d349 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 scan_scan_disk="ahci"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/qemu_arm64_12mb/target.cfg b/config/coreboot/qemu_arm64_12mb/target.cfg
index a7c36159..980de84f 100644
--- a/config/coreboot/qemu_arm64_12mb/target.cfg
+++ b/config/coreboot/qemu_arm64_12mb/target.cfg
@@ -1,3 +1,4 @@
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
+build_depend="u-boot/qemu_arm64_12mb"
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index edbca096..abc1d14e 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -6,3 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="t1650"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index 3c3f9802..6d2e9a22 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -6,3 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
+build_depend="seabios/default grub/xhci memtest86plus"
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index c7eddcc2..1add675c 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index c7eddcc2..1add675c 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index 3c3f9802..6d2e9a22 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -6,3 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
+build_depend="seabios/default grub/xhci memtest86plus"
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index c7eddcc2..1add675c 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index c7eddcc2..1add675c 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
+build_depend="seabios/default grub/default"
diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index 3418d98d..a6605672 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -1 +1,2 @@
 makeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
+build_depend="seabios/default grub/default memtest86plus"

From 889afe16891c2b803e0e8c106fc4862e1295f69d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 6 Jul 2024 06:37:40 +0100
Subject: [PATCH 0743/1549] roms: remove unnecessary trees checks

we no longer need to call trees -b for payloads, because
build_depend is set in coreboot target.cfg files

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/roms | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/script/roms b/script/roms
index 8a2cc796..14822339 100755
--- a/script/roms
+++ b/script/roms
@@ -140,8 +140,6 @@ add_payloads()
 	[ "$payload_seabios" = "y" ] && add_seabios_payload
 	[ "$payload_uboot" = "y" ] || return 0
 
-	# add u-boot payload
-	x_ ./update trees -b u-boot $board
 	ubdir="elf/u-boot/$board/$uboot_config"; ubootelf="$ubdir/u-boot.elf" \
 	    && [ ! -f "$ubootelf" ] && ubootelf="$ubdir/u-boot"
 	[ -f "$ubootelf" ] || $err "$board: Can't find u-boot"
@@ -153,7 +151,6 @@ add_payloads()
 add_seabios_payload()
 {
 	_seabioself="elf/seabios/default/$initmode/bios.bin.elf"
-	x_ ./update trees -b seabios
 
 	pstr="seabios" && [ "$payload_grub" = "y" ] && pstr="seabios_withgrub"
 	newrom="$romdir/${pstr}_${board}_$initmode.rom"
@@ -169,14 +166,13 @@ add_seabios_payload()
 	    vgaroms/seavgabios.bin raw
 
 	if [ "$payload_grub" = "y" ]; then
-		x_ ./update trees -b grub $grubtree
 		cbfs "$tmprom" "$grubelf" "img/grub2"
 		printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
 		    > "$TMPDIR/tmpcfg" || $err "$board: !insert scandisk"
 		cbfs "$tmprom" "$TMPDIR/tmpcfg" scan.cfg raw
 	fi
 
-	[ "$payload_memtest" = "y" ] && x_ ./update trees -b memtest86plus && \
+	[ "$payload_memtest" = "y" ] && \
 	    cbfs "$tmprom" "elf/memtest86plus/memtest.bin" img/memtest
 
 	cprom "$newrom" && [ "$payload_grub" = "y" ] && \

From 2f3cc5d379089d3def876fdc276c321236b0698f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 6 Jul 2024 23:36:13 +0100
Subject: [PATCH 0744/1549] rom.sh: new file, to replace script/roms

stub it from the trees script. the way it works now,
there is less code in the build system.

./build roms

this is no longer a thing

./build roms serprog

this is also no longer a thing. instead, do:

./update trees -b coreboot targetnamehere

./update trees -b pico-serprog

./update trees -b stm32-vserprog

the old commands still works, which causes the new
commands to run

coreboot roms now appear in elf/, not bin/, as before,
but those images now contain payloads.

NOTE: to contradict the above: ./build roms is no
longer a thing, in that it's now deprecated, but
backward compatibility is present for now. it will
be removed in a future release.

./build roms list also still works! it will do:
./update trees -b coreboot list

also:
./update trees -b grub list
this is now possible too

if a target "list" is provided, for multi-tree sources,
the targets are shown.

there is another difference: seagrub roms are now seagrub_,
instead of seabios_withgrub.

seabios-only roms are no longer provided, where grub is also
enabled; only seagrub is used. the user can easily remove
the bootorder file, if they want seabios to not try grub first.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build                                   |  14 +-
 config/data/coreboot/build.list         |   1 -
 config/data/coreboot/mkhelper.cfg       |  11 ++
 config/data/pico-serprog/mkhelper.cfg   |   5 +
 config/data/stm32-vserprog/mkhelper.cfg |   4 +
 include/lib.sh                          |   1 -
 include/rom.sh                          | 122 +++++++++++++++
 include/vendor.sh                       |   2 +-
 script/roms                             | 190 ------------------------
 script/trees                            |  42 +++---
 10 files changed, 170 insertions(+), 222 deletions(-)
 delete mode 100644 config/data/coreboot/build.list
 create mode 100644 config/data/pico-serprog/mkhelper.cfg
 create mode 100644 config/data/stm32-vserprog/mkhelper.cfg
 create mode 100644 include/rom.sh
 delete mode 100755 script/roms

diff --git a/build b/build
index 91843d3f..d03960c6 100755
--- a/build
+++ b/build
@@ -16,7 +16,7 @@ fi
 . "include/vendor.sh"
 . "include/mrc.sh"
 
-eval `setvars "" vdir src_dirname srcdir mode xp`
+eval `setvars "" vdir src_dirname srcdir mode xp ser`
 err="fail"
 
 main()
@@ -34,6 +34,12 @@ main()
 	release) shift 1; mkrelease $@ ;;
 	inject) shift 1; vendor_inject $@ ;;
 	download) shift 1; vendor_download $@ ;;
+	roms)
+		if [ $# -gt 1 ] && [ "$2" = "serprog" ]; then
+			x_ ./update trees -b stm32-vserprog
+			x_ ./update trees -b pico-serprog; return 0
+		fi; shift 1
+		x_ ./update trees -b coreboot $@ ;;
 	*)
 		[ -f "$spath" ] || $err "bad command"
 		shift 1; "$spath" $@ || $err "excmd: $spath $@" ;;
@@ -111,9 +117,9 @@ build_release()
 
 	(
 	cd "$srcdir" || $err "$vdir: 2 !cd \"$srcdir\""
-	./build roms all || $err "$vdir: roms-all"
-	./build roms serprog rp2040 || $err "$vdir: rp2040"
-	./build roms serprog stm32 || $err "$vdir: stm32"
+	./update trees -b coreboot || $err "$vdir: roms-all"
+	./update trees -b pico-serprog || $err "$vdir: rp2040"
+	./update trees -b stm32-vserprog || $err "$vdir: stm32"
 	x_ mv bin ../roms
 	) || $err "can't build rom images"
 
diff --git a/config/data/coreboot/build.list b/config/data/coreboot/build.list
deleted file mode 100644
index f6535149..00000000
--- a/config/data/coreboot/build.list
+++ /dev/null
@@ -1 +0,0 @@
-build/coreboot.rom
diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index a6605672..c23ebdf4 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -1,2 +1,13 @@
 makeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 build_depend="seabios/default grub/default memtest86plus"
+
+seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
+
+pv="payload_uboot payload_seabios payload_memtest payload_grub"
+v="initmode ubootelf grub_scan_disk uboot_config grubtree grubelf pname"
+v="$v displaymode tmprom"
+eval `setvars "n" $pv`
+eval `setvars "" $v`
+
+mkhelper="mkcorebootbin"
+postmake="mkcoreboottar"
diff --git a/config/data/pico-serprog/mkhelper.cfg b/config/data/pico-serprog/mkhelper.cfg
new file mode 100644
index 00000000..9f6e54cc
--- /dev/null
+++ b/config/data/pico-serprog/mkhelper.cfg
@@ -0,0 +1,5 @@
+sersrc="src/pico-serprog"
+serx="$sersrc/build/pico_serprog.uf2"
+picosdk="src/pico-sdk"
+serdir="$picosdk/src/boards/include/boards"
+premake="mkserprog rp2040"
diff --git a/config/data/stm32-vserprog/mkhelper.cfg b/config/data/stm32-vserprog/mkhelper.cfg
new file mode 100644
index 00000000..9d02f799
--- /dev/null
+++ b/config/data/stm32-vserprog/mkhelper.cfg
@@ -0,0 +1,4 @@
+sersrc="src/stm32-vserprog"
+serx="$sersrc/stm32-vserprog.hex"
+serdir="$sersrc/boards"
+mkhelper="mkserprog stm32"
diff --git a/include/lib.sh b/include/lib.sh
index e6a998d2..52187734 100755
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -10,7 +10,6 @@ _ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
 kbnotice="Insert a .gkb file from config/data/grub/keymap/ as keymap.gkb \
 if you want a custom keymap in GRUB; use cbfstool from elf/cbfstool."
 
-cbelfdir="elf/.coreboot_nopayload_DO_NOT_FLASH"
 ifdtool="elf/ifdtool/default/ifdtool"
 cbfstool="elf/cbfstool/default/cbfstool"
 tmpgit="$PWD/tmp/gitclone"
diff --git a/include/rom.sh b/include/rom.sh
new file mode 100644
index 00000000..7ffd685d
--- /dev/null
+++ b/include/rom.sh
@@ -0,0 +1,122 @@
+#!/usr/bin/env sh
+# SPDX-License-Identifier: GPL-3.0-or-later
+# Copyright (c) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2021-2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
+# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
+# Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
+# Copyright (c) 2023 Riku Viitanen <riku.viitanen@protonmail.com>
+
+mkserprog()
+{
+	basename -as .h "$serdir/"*.h > "$TMPDIR/ser" || $err "!mk $1 $TMPDIR"
+
+	while read -r sertarget; do
+		[ "$1" = "rp2040" ] && x_ cmake -DPICO_BOARD="$sertarget" \
+		    -DPICO_SDK_PATH="$picosdk" -B "$sersrc/build" "$sersrc" \
+		    && x_ cmake --build "$sersrc/build"
+		[ "$1" = "stm32" ] && x_ make -C "$sersrc" \
+		    libopencm3-just-make BOARD=$sertarget && x_ make -C \
+		    "$sersrc" BOARD=$sertarget; x_ mkdir -p "bin/serprog_$1"
+		x_ mv "$serx" "bin/serprog_$1/serprog_$sertarget.${serx##*.}"
+	done < "$TMPDIR/ser"
+
+	[ "$XBMK_RELEASE" = "y" ] && mkrom_tarball "bin/serprog_$1"; return 0
+}
+
+mkpayload_grub()
+{
+	eval `setvars "" grub_modules grub_install_modules`
+	eval `setcfg "$grubdata/module/$tree"`
+
+	x_ rm -f "$cdir/grub.elf"
+
+	"${cdir}/grub-mkstandalone" --grub-mkimage="${cdir}/grub-mkimage" \
+	    -O i386-coreboot -o "${cdir}/grub.elf" -d "${cdir}/grub-core/" \
+	    --fonts= --themes= --locales=  --modules="$grub_modules" \
+	    --install-modules="$grub_install_modules" \
+	    "/boot/grub/grub_default.cfg=${cdir}/.config" \
+	    "/boot/grub/grub.cfg=$grubdata/memdisk.cfg" \
+	    "/background.png=$grubdata/background/background1280x800.png" || \
+	    $err "$tree: cannot build grub.elf"; return 0
+}
+
+mkcorebootbin()
+{
+	[ "$target" = "$tree" ] && return 0
+
+	tmprom="$cdir/build/coreboot.rom"
+	initmode="${defconfig##*/}"; displaymode="${initmode##*_}"
+	initmode="${initmode%%_*}"
+	[ -n "$displaymode" ] && displaymode="_$displaymode"
+	cbfstool="elf/cbfstool/$tree/cbfstool"
+
+	[ -n "$uboot_config" ] || uboot_config="default"
+	[ "$payload_uboot" = "y" ] || payload_seabios="y"
+	[ "$payload_grub" = "y" ] && payload_seabios="y"
+	[ "$payload_seabios" = "y" ] && [ "$payload_uboot" = "y" ] && \
+	    $err "$target: U-Boot and SeaBIOS/GRUB are both enabled."
+
+	[ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata"
+
+	[ -n "$grubtree" ] || grubtree="default"
+	grubelf="elf/grub/$grubtree/payload/grub.elf"
+
+	[ "$payload_memtest" = "y" ] || payload_memtest="n"
+	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"
+
+	x_ ./update trees -b coreboot utils $tree
+
+	[ "$payload_seabios" = "y" ] && pname="seabios" && add_seabios
+	[ "$payload_uboot" = "y" ] && pname="uboot" && add_uboot
+
+	newrom="bin/$target/${pname}_${target}_$initmode$displaymode.rom"
+	x_ mkdir -p "${newrom%/*}"; x_ mv "$tmprom" "$newrom"
+
+	[ "$XBMK_RELEASE" = "y" ] || return 0
+	mksha512sum "$newrom" "vendorhashes"
+	./vendor inject -r "$newrom" -b "$target" -n nuke || $err "!n $newrom"
+}
+
+add_seabios()
+{
+	_seabioself="elf/seabios/default/$initmode/bios.bin.elf"
+
+	cbfs "$tmprom" "$_seabioself" "fallback/payload"
+	x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
+
+	_z="2"; [ "$initmode" = "vgarom" ] && _z="0"
+	x_ "$cbfstool" "$tmprom" add-int -i $_z -n etc/pci-optionrom-exec
+	x_ "$cbfstool" "$tmprom" add-int -i 0 -n etc/optionroms-checksum
+	[ "$initmode" = "libgfxinit" ] && \
+	    cbfs "$tmprom" "$seavgabiosrom" vgaroms/seavgabios.bin raw
+
+	[ "$payload_memtest" = "y" ] && cbfs "$tmprom" \
+	    "elf/memtest86plus/memtest.bin" img/memtest
+
+	[ "$payload_grub" = "y" ] && pname="seagrub" && add_grub; return 0
+}
+
+add_grub()
+{
+	cbfs "$tmprom" "$grubelf" "img/grub2"
+	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
+	    > "$TMPDIR/tmpcfg" || $err "$target: !insert scandisk"
+	cbfs "$tmprom" "$TMPDIR/tmpcfg" scan.cfg raw
+	cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
+}
+
+add_uboot()
+{
+	ubdir="elf/u-boot/$target/$uboot_config"
+	ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \
+	    ubootelf="$ubdir/u-boot"
+	[ -f "$ubootelf" ] || $err "cb/$target: Can't find u-boot"
+
+	cbfs "$tmprom" "$ubootelf" "fallback/payload"
+}
+
+mkcoreboottar()
+{
+	[ "$target" = "$tree" ] && return 0
+	[ "$XBMK_RELEASE" = "y" ] && mkrom_tarball "bin/$target"; return 0
+}
diff --git a/include/vendor.sh b/include/vendor.sh
index e282eedd..75f7e051 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -248,7 +248,7 @@ detect_board()
 	path="$1"
 	filename="$(basename "$path")"
 	case "$filename" in
-	grub_*) board="$(echo "$filename" | cut -d '_' -f2-3)" ;;
+	grub_*|seagrub_*) board="$(echo "$filename" | cut -d '_' -f2-3)" ;;
 	seabios_withgrub_*)
 		board="$(echo "$filename" | cut -d '_' -f3-4)" ;;
 	*.tar.xz)
diff --git a/script/roms b/script/roms
deleted file mode 100755
index 14822339..00000000
--- a/script/roms
+++ /dev/null
@@ -1,190 +0,0 @@
-#!/usr/bin/env sh
-# SPDX-License-Identifier: GPL-3.0-or-later
-# Copyright (c) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
-# Copyright (c) 2021-2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
-# Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
-# Copyright (c) 2023 Riku Viitanen <riku.viitanen@protonmail.com>
-
-set -u -e
-
-. "include/lib.sh"
-
-tmprom="$TMPDIR/rom"
-
-seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
-cfgsdir="config/coreboot"
-rp2040src="src/pico-serprog"
-rp2040x="$rp2040src/build/pico_serprog.uf2"
-picosdk="src/pico-sdk"
-rp2040dir="$picosdk/src/boards/include/boards"
-stm32src="src/stm32-vserprog"
-stm32x="$stm32src/stm32-vserprog.hex"
-stm32dir="$stm32src/boards"
-
-# Disable all payloads by default.
-# target.cfg files have to specifically enable [a] payload(s)
-pv="payload_uboot payload_seabios payload_memtest payload_grub"
-v="romdir initmode displaymode targetdir tree release ubootelf"
-v="$v board grub_scan_disk uboot_config grubtree grubelf tmpmv"
-eval `setvars "n" $pv`
-eval `setvars "" $v boards targets serdir ser`
-
-main()
-{
-	while [ $# -gt 0 ]; do
-		if [ "$1" = "serprog" ]; then
-			[ $# -lt 2 ] && $err "serprog type not set"
-			[ "$2" != "rp2040" ] && [ "$2" != "stm32" ] && \
-			    $err "invalid serprog type"
-			eval "x_ ./update trees -f \"\${${2}src##*/}\""
-			ser="$2" && shift 2 && continue
-		fi
-		[ "$1$ser" = "list" ] && x_ ls -1 config/coreboot && return 0
-		[ "$1" = "all" ] && shift 1 && continue
-		boards="$1 $boards"; shift 1
-	done
-
-	[ -n "$boards" ] || [ -n "$ser" ] || boards="$(ls -1 \
-	    config/coreboot)" || $err "can't list coreboot boards"
-
-	[ -n "$ser" ] && \
-	    eval "serlist \"\$${ser}dir\" > \"\$TMPDIR/ser\" || $err \"!ser\""
-	[ -n "$ser" ] && [ -z "$boards" ] && boards="$(cat "$TMPDIR/ser")"
-
-	for x in $boards; do
-		[ -n "$ser" ] && mkserprogfw "$ser" "$x"
-		[ -z "$ser" ] && [ -d "config/coreboot/$x/config" ] && \
-		    configure_target "$x" && build_roms && \
-		    [ -d "bin/$board" ] && targets="$targets, $x" && \
-		    [ "$XBMK_RELEASE" = "y" ] && mkrom_tarball "bin/$x"
-	done
-
-	[ -n "$ser" ] && [ "$XBMK_RELEASE" = "y" ] && \
-	    mkrom_tarball "bin/serprog_$ser" && return 0
-
-	[ -z "$ser" ] && [ -z "$targets" ] && $err "No images were compiled"
-	[ -z "$ser" ] && printf "ROMs built in bin/ for: %s\n" "${targets#, }"
-	[ -n "$ser" ] && printf "ROMs (serprog) built in bin/%s/\n" "$ser"
-	printf "Please flash from bin/, NOT elf/ - ALSO:\n%s\n" "$kbnotice"
-}
-
-mkserprogfw()
-{
-	x_ mkdir -p "bin/serprog_$1"
-	[ "$1" = "rp2040" ] && x_ cmake -DPICO_BOARD="$2" \
-	    -DPICO_SDK_PATH="$picosdk" -B "$rp2040src/build" "$rp2040src" && \
-	    x_ cmake --build "$rp2040src/build"
-	[ "$1" = "stm32" ] && x_ make -C "$stm32src" libopencm3-just-make \
-	    BOARD=$2 && x_ make -C "$stm32src" BOARD=$2
-	eval "x_ mv \"\$${1}x\" \"bin/serprog_$1/serprog_$2.\${${1}x##*.}\""
-}
-
-serlist()
-{
-	basename -a -s .h "$1/"*.h || $err "$1: can't list boards"
-}
-
-configure_target()
-{
-	eval `setvars "n" $pv`
-	eval `setvars "" $v`
-
-	board="$1"; targetdir="$cfgsdir/$board"; romdir="bin/$board"
-
-	# Override the above defaults using target.cfg
-	eval `setcfg "$targetdir/target.cfg"`
-
-	[ -z "$tree" ] && $err "$board: tree not defined"
-	[ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1
-	[ "$board" = "$tree" ] && return 1
-
-	x_ ./update trees -b coreboot $board
-
-	cbfstool="elf/cbfstool/$tree/cbfstool"
-	x_ ./update trees -b coreboot utils $tree
-
-	[ -n "$uboot_config" ] || uboot_config="default"
-	[ "$payload_uboot" = "y" ] || payload_seabios="y"
-	[ "$payload_grub" = "y" ] && payload_seabios="y"
-	[ "$payload_seabios" = "y" ] && [ "$payload_uboot" = "y" ] && \
-	    $err "$board: U-Boot and SeaBIOS/GRUB are both enabled."
-
-	[ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata"
-
-	[ -n "$grubtree" ] || grubtree="default"
-	grubelf="elf/grub/$grubtree/payload/grub.elf"
-
-	[ "$payload_memtest" = "y" ] || payload_memtest="n"
-	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"; return 0
-}
-
-build_roms()
-{
-	x_ rm -Rf "$romdir"
-
-	for cbcfg in "$targetdir/config/"*; do
-		[ -f "$cbcfg" ] || continue; cn="${cbcfg##*/}"; dt="${cn#*_}" \
-		    && [ "$dt" = "$cn" ] && dt="txtmode"; displaymode="$dt"
-		initmode="${cn%%_*}"; chkvars initmode displaymode
-		e "$cbcfg" f not || add_payloads
-	done; x_ rm -f "$tmprom"
-}
-
-add_payloads()
-{
-	cbuild="$cbelfdir/$board/${initmode}_$displaymode"
-	[ "$initmode" = "normal" ] && cbuild="${cbuild%"_$displaymode"}"
-	x_ cp "$cbuild/coreboot.rom" "$tmprom"
-
-	[ "$payload_seabios" = "y" ] && add_seabios_payload
-	[ "$payload_uboot" = "y" ] || return 0
-
-	ubdir="elf/u-boot/$board/$uboot_config"; ubootelf="$ubdir/u-boot.elf" \
-	    && [ ! -f "$ubootelf" ] && ubootelf="$ubdir/u-boot"
-	[ -f "$ubootelf" ] || $err "$board: Can't find u-boot"
-
-	cbfs "$tmprom" "$ubootelf" "fallback/payload"
-	cprom "$romdir/uboot_payload_${board}_${initmode}_$displaymode.rom"
-}
-
-add_seabios_payload()
-{
-	_seabioself="elf/seabios/default/$initmode/bios.bin.elf"
-
-	pstr="seabios" && [ "$payload_grub" = "y" ] && pstr="seabios_withgrub"
-	newrom="$romdir/${pstr}_${board}_$initmode.rom"
-	[ "$initmode" = "normal" ] || newrom="${newrom%.rom}_$displaymode.rom"
-
-	cbfs "$tmprom" "$_seabioself" "fallback/payload"
-	x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
-
-	z="2"; [ "$initmode" = "vgarom" ] && z="0"
-	x_ "$cbfstool" "$tmprom" add-int -i $z -n etc/pci-optionrom-exec
-	x_ "$cbfstool" "$tmprom" add-int -i 0 -n etc/optionroms-checksum
-	[ "$initmode" = "libgfxinit" ] && cbfs "$tmprom" "$seavgabiosrom" \
-	    vgaroms/seavgabios.bin raw
-
-	if [ "$payload_grub" = "y" ]; then
-		cbfs "$tmprom" "$grubelf" "img/grub2"
-		printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
-		    > "$TMPDIR/tmpcfg" || $err "$board: !insert scandisk"
-		cbfs "$tmprom" "$TMPDIR/tmpcfg" scan.cfg raw
-	fi
-
-	[ "$payload_memtest" = "y" ] && \
-	    cbfs "$tmprom" "elf/memtest86plus/memtest.bin" img/memtest
-
-	cprom "$newrom" && [ "$payload_grub" = "y" ] && \
-	    cbfs "$tmprom" "$grubdata/bootorder" bootorder raw && \
-	    cprom "${newrom%.rom}_grubfirst.rom"; return 0
-}
-
-cprom()
-{
-	x_ mkdir -p "${1%/*}"; x_ cp "$tmprom" "$1"
-	[ "$XBMK_RELEASE" = "y" ] && mksha512sum "$1" "vendorhashes" && \
-	    x_ ./vendor inject -r "$1" -b "$board" -n nuke; return 0
-}
-
-main $@
diff --git a/script/trees b/script/trees
index ab321869..8bcd798c 100755
--- a/script/trees
+++ b/script/trees
@@ -8,10 +8,15 @@ set -u -e
 
 . "include/lib.sh"
 . "include/git.sh"
+. "include/rom.sh"
+
+. "config/data/pico-serprog/mkhelper.cfg"
+. "config/data/coreboot/mkhelper.cfg"
 
 eval `setvars "" xarch cdir defconfig cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f target1 bootstrapargs mkhelper \
-    autoconfargs listfile autogenargs btype tree rev tree_depend build_depend`
+    autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
+    premake release postmake`
 
 main()
 {
@@ -46,6 +51,7 @@ main()
 	datadir="config/data/$project"
 	cfgsdir="config/$project"
 	listfile="$datadir/build.list" # needed on multi, optional on single
+	[ -f "$listfile" ] || listfile="" # optional on all projects
 
 	remkdir "${tmpgit%/*}"
 
@@ -61,7 +67,6 @@ main()
 build_project()
 {
 	configure_project "$cfgsdir" || return 0
-	[ -f "$listfile" ] || listfile="" # optional on single-tree
 
 	dest_dir="$elfdir"
 	[ ! -f "$listfile" ] || elfcheck || return 0
@@ -77,10 +82,7 @@ build_project()
 
 build_targets()
 {
-	[ "$elfdir" = "elf/coreboot" ] && elfdir="$cbelfdir"
-
 	[ -d "$cfgsdir" ] || $err "directory, $cfgsdir, does not exist"
-	[ -f "$listfile" ] || $err "list file, $listfile, does not exist"
 
 	# Build for all targets if no argument is given
 	[ $# -gt 0 ] && target1="$1"
@@ -94,12 +96,16 @@ build_targets()
 handle_targets()
 {
 	for x in $targets; do
+		[ "$x" = "list" ] && x_ ls -1 "config/$project" && \
+		    listfile="" && break
 		target="$x"
 		printf "'make %s', '%s', '%s'\n" "$mode" "$project" "$target"
 		[ "$project" != "coreboot" ] || [ -n "$mode" ] || \
 		    [ "$target1" = "utils" ] || x_ ./vendor download $target
 		x_ handle_defconfig
-	done
+		[ -n "$mode" ] || [ -z "$postmake" ] || $postmake || \
+		    $err "$project/$target: !postmake: $postmake"; continue
+	done; return 0
 }
 
 handle_defconfig()
@@ -141,8 +147,8 @@ handle_src_tree()
 
 configure_project()
 {
-	eval `setvars "" xarch xlang bootstrapargs autoconfargs xtree \
-	    tree_depend makeargs btype mkhelper build_depend`
+	eval `setvars "" xarch xlang build_depend autoconfargs xtree postmake \
+	    tree_depend makeargs btype mkhelper bootstrapargs premake release`
 	[ -f "$1/target.cfg" ] || btype="auto"
 	[ -f "$datadir/mkhelper.cfg" ] && eval `setcfg "$datadir/mkhelper.cfg"`
 
@@ -159,6 +165,7 @@ configure_project()
 		    && break; _tcfg="${_tcfg%/*/target.cfg}/$tree/target.cfg"
 	done
 
+	[ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1
 	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
 
 	[ -z "$mode" ] && for bd in $build_depend; do
@@ -244,6 +251,8 @@ handle_makefile()
 
 run_make_command()
 {
+	[ -z "$premake" ] || [ -n "$mode" ] || $premake || $err "!$premake"
+
 	check_cmake "$cdir" && [ -z "$mode" ] && check_autoconf "$cdir"
 	check_makefile "$cdir" || return 1
 
@@ -280,23 +289,6 @@ check_makefile()
 	    [ -f "$1/GNUmakefile" ] || return 1; return 0
 }
 
-mkpayload_grub()
-{
-	eval `setvars "" grub_modules grub_install_modules`
-	eval `setcfg "$grubdata/module/$tree"`
-
-	x_ rm -f "$cdir/grub.elf"
-
-	"${cdir}/grub-mkstandalone" --grub-mkimage="${cdir}/grub-mkimage" \
-	    -O i386-coreboot -o "${cdir}/grub.elf" -d "${cdir}/grub-core/" \
-	    --fonts= --themes= --locales=  --modules="$grub_modules" \
-	    --install-modules="$grub_install_modules" \
-	    "/boot/grub/grub_default.cfg=${cdir}/.config" \
-	    "/boot/grub/grub.cfg=$grubdata/memdisk.cfg" \
-	    "/background.png=$grubdata/background/background1280x800.png" || \
-	    $err "$tree: cannot build grub.elf"; return 0
-}
-
 copy_elf()
 {
 	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do

From e850c06bd209e592ec015d52e7202a00e56d7644 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Mon, 8 Jul 2024 02:21:52 +0100
Subject: [PATCH 0745/1549] rom.sh: only make rom tarball if release=y

Signed-off-by: Leah Rowe <info@minifree.org>
---
 include/rom.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index 7ffd685d..312e3b2a 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -117,6 +117,6 @@ add_uboot()
 
 mkcoreboottar()
 {
-	[ "$target" = "$tree" ] && return 0
-	[ "$XBMK_RELEASE" = "y" ] && mkrom_tarball "bin/$target"; return 0
+	[ "$target" = "$tree" ] && return 0; [ "$XBMK_RELEASE" = "y" ] && \
+	    [ "$release" != "n" ] && mkrom_tarball "bin/$target"; return 0
 }

From 9646172145e62ab39a050c0536f6d82bf84c844d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 9 Jul 2024 01:31:25 +0100
Subject: [PATCH 0746/1549] trees: support -d (dry run) for custom build logic

-d does the same as -b, except for actually building
anything! in effect, it does the same as -f (fetch)
except that the resulting variable assignments will
not be recursive (as with -f).

if -d is passed, configuration is still loaded, defconfig
files are still cycled through, and more importantly:

helper functions are still processed.

the grub, serprog and coreboot helper functions have
been modified to return early (zero status) if -d is
passed.

this behaviour will be used to integrate vendor.sh
logic in with the trees script, for cases where the
user wants to only handle vendor files. e.g.:

./update trees -b coreboot x230_12mb

this would download the files as usual, build coreboot,
with those files, and then build the payloads. but:

./update trees -d coreboot x230_12mb

this would download the files, NOT build coreboot, and
NOT build the payloads.

this change increases the sloccount a bit, but i'm relying
on the fact that the vendor.sh script already re-implements
config handling wastefully; the plan is to only use trees.

for now, simply stub the same ./vendor download command.

there is one additional benefit to doing it this way:

this method is *per-kconfig* rather than per-target.
this way, one kconfig might specify a given vendor file
that is not specified in the other. although the stub
still simply handles this per target, it's done in premake,
which means that the given .config file has been copied.

this means that when i properly re-integrate the logic
into script/trees, i'll be able to go for it per-kconfig.

the utils command has been removed, e.g.
./update trees -b coreboot utils default

the equivalent is now:
./update trees -d coreboot default

this would technically download vendor files, but here
we are specifying a target for which no kconfigs exist;
a check is also in place, to avoid running the vendor file
download logic if tree==target

the overall effect of this change is that the trees script
no longer contains any project-specific logic, except for
the crossgcc build logic.

it does include some config/data mkhelper files at the top,
for serprog and coreboot, so that those variables defined in
those files can be global, but another solution to mitigate
that will also be implemented in a future commit.

the purpose of this and other revisions (in the final push
to complete lbmk audit 6 / cbmk audit 2) is to generalise as
much logic as possible, removing various ugly hacks.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/coreboot/mkhelper.cfg |  1 +
 include/rom.sh                    | 32 +++++++++++-
 include/vendor.sh                 |  4 +-
 script/trees                      | 83 ++++++++++++++-----------------
 4 files changed, 71 insertions(+), 49 deletions(-)

diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index c23ebdf4..a1c48e63 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -9,5 +9,6 @@ v="$v displaymode tmprom"
 eval `setvars "n" $pv`
 eval `setvars "" $v`
 
+premake="mkvendorfiles"
 mkhelper="mkcorebootbin"
 postmake="mkcoreboottar"
diff --git a/include/rom.sh b/include/rom.sh
index 312e3b2a..9b0943b9 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -8,6 +8,7 @@
 
 mkserprog()
 {
+	[ "$_f" = "-d" ] && return 0 # dry run
 	basename -as .h "$serdir/"*.h > "$TMPDIR/ser" || $err "!mk $1 $TMPDIR"
 
 	while read -r sertarget; do
@@ -25,6 +26,7 @@ mkserprog()
 
 mkpayload_grub()
 {
+	[ "$_f" = "-d" ] && return 0 # dry run
 	eval `setvars "" grub_modules grub_install_modules`
 	eval `setcfg "$grubdata/module/$tree"`
 
@@ -40,8 +42,35 @@ mkpayload_grub()
 	    $err "$tree: cannot build grub.elf"; return 0
 }
 
+check_coreboot_utils()
+{
+	for util in cbfstool ifdtool; do
+		utilelfdir="elf/$util/$1"
+		utilsrcdir="src/coreboot/$1/util/$util"
+
+		utilmode="" && [ -n "$mode" ] && utilmode="clean"
+		x_ make -C "$utilsrcdir" $utilmode -j$XBMK_THREADS $makeargs
+		[ -z "$mode" ] && [ ! -f "$utilelfdir/$util" ] && \
+			x_ mkdir -p "$utilelfdir" && \
+			x_ cp "$utilsrcdir/$util" "elf/$util/$1"
+		[ -z "$mode" ] || x_ rm -Rf "$utilelfdir"; continue
+	done; return 0
+}
+
+mkvendorfiles()
+{
+	if [ "$_f" = "-d" ]; then
+		check_coreboot_utils "$tree"
+	elif [ "$_f" = "-b" ]; then
+		printf "%s\n" "${version%%-*}" > "$cdir/.coreboot-version"
+	fi
+	[ -z "$mode" ] && [ "$target" != "$tree" ] && \
+	    x_ ./vendor download $target; return 0
+}
+
 mkcorebootbin()
 {
+	[ "$_f" = "-d" ] && return 0 # dry run
 	[ "$target" = "$tree" ] && return 0
 
 	tmprom="$cdir/build/coreboot.rom"
@@ -64,7 +93,7 @@ mkcorebootbin()
 	[ "$payload_memtest" = "y" ] || payload_memtest="n"
 	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"
 
-	x_ ./update trees -b coreboot utils $tree
+	x_ ./update trees -d coreboot $tree
 
 	[ "$payload_seabios" = "y" ] && pname="seabios" && add_seabios
 	[ "$payload_uboot" = "y" ] && pname="uboot" && add_uboot
@@ -117,6 +146,7 @@ add_uboot()
 
 mkcoreboottar()
 {
+	[ "$_f" = "-d" ] && return 0 # dry run
 	[ "$target" = "$tree" ] && return 0; [ "$XBMK_RELEASE" = "y" ] && \
 	    [ "$release" != "n" ] && mkrom_tarball "bin/$target"; return 0
 }
diff --git a/include/vendor.sh b/include/vendor.sh
index 75f7e051..b8fef9c5 100755
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -56,7 +56,7 @@ bootstrap()
 	[ -d "${kbc1126_ec_dump%/*}" ] && x_ make -C "$cbdir/util/kbc1126"
 	[ -n "$MRC_refcode_cbtree" ] && \
 	    cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
-	    x_ ./update trees -b coreboot utils $MRC_refcode_cbtree; return 0
+	    x_ ./update trees -d coreboot $MRC_refcode_cbtree; return 0
 }
 
 getfiles()
@@ -275,7 +275,7 @@ readcfg()
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 	ifdtool="elf/ifdtool/$tree/ifdtool"
 
-	x_ ./update trees -b coreboot utils $tree
+	x_ ./update trees -d coreboot $tree
 }
 
 patch_release_roms()
diff --git a/script/trees b/script/trees
index 8bcd798c..c6175986 100755
--- a/script/trees
+++ b/script/trees
@@ -14,16 +14,17 @@ set -u -e
 . "config/data/coreboot/mkhelper.cfg"
 
 eval `setvars "" xarch cdir defconfig cmakedir xlang mode makeargs elfdir cmd \
-    project target target_dir targets xtree _f target1 bootstrapargs mkhelper \
+    project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
-    premake release postmake`
+    premake postmake`
 
 main()
 {
-	while getopts f:b:m:u:c:x:s:l:n: option; do
+	while getopts f:b:m:u:c:x:s:l:n:d: option; do
 		[ -n "$_f" ] && $err "only one flag is permitted"
 		_f="$1"
 		case "$1" in
+		-d) mode="" ;;
 		-b) mode="" ;;
 		-u) mode="oldconfig" ;;
 		-m) mode="menuconfig" ;;
@@ -58,10 +59,9 @@ main()
 	cmd="build_targets" && singletree "$project" && cmd="build_project"
 	$cmd $@
 
-	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
-
 	[ -f "$listfile" ] || return 0
-	[ -z "$mode" ] && printf "\n\nOK! Check %s/\n\n" "$elfdir"; return 0
+	[ -z "$mode" ] && [ "$_f" = "-b" ] && \
+	    printf "\n\nOK! Check %s/\n\n" "$elfdir"; return 0
 }
 
 build_project()
@@ -85,8 +85,6 @@ build_targets()
 	[ -d "$cfgsdir" ] || $err "directory, $cfgsdir, does not exist"
 
 	# Build for all targets if no argument is given
-	[ $# -gt 0 ] && target1="$1"
-	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && shift 1
 	targets="$(ls -1 "$cfgsdir")" || $err "Can't get options for $cfgsdir"
 	[ $# -gt 0 ] && targets=$@
 
@@ -100,8 +98,6 @@ handle_targets()
 		    listfile="" && break
 		target="$x"
 		printf "'make %s', '%s', '%s'\n" "$mode" "$project" "$target"
-		[ "$project" != "coreboot" ] || [ -n "$mode" ] || \
-		    [ "$target1" = "utils" ] || x_ ./vendor download $target
 		x_ handle_defconfig
 		[ -n "$mode" ] || [ -z "$postmake" ] || $postmake || \
 		    $err "$project/$target: !postmake: $postmake"; continue
@@ -112,12 +108,9 @@ handle_defconfig()
 {
 	handle_src_tree "$target" || return 0
 
-	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && \
-		eval "check_coreboot_utils \"$tree\"; return 0"
-
 	for y in "$target_dir/config"/*; do
-		[ -f "$y" ] || continue
-		defconfig="$y"
+		[ "$_f" = "-d" ] || [ -f "$y" ] || continue
+		[ "$_f" = "-d" ] || defconfig="$y"
 
 		[ -n "$mode" ] || check_defconfig || continue
 		handle_makefile
@@ -141,8 +134,7 @@ handle_src_tree()
 	fi
 	x_ ./update trees -f "$project" "$target"
 
-	[ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
-	[ -z "$mode" ] && check_cross_compiler; return 0
+	[ -z "$mode" ] && [ "$_f" = "-b" ] && check_cross_compiler; return 0
 }
 
 configure_project()
@@ -158,6 +150,8 @@ configure_project()
 
 		printf "Loading %s config: %s\n" "$project" "$_tcfg"
 		eval `setcfg "$_tcfg"`
+
+		[ "$_f" = "-d" ] && build_depend="" # dry run
 		[ "$cmd" = "build_project" ] && break
 		[ "$mode" = "fetch" ] || break
 
@@ -168,13 +162,18 @@ configure_project()
 	[ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1
 	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
 
-	[ -z "$mode" ] && for bd in $build_depend; do
-		bd_project="${bd%%/*}"; bd_tree="${bd##*/}"
-		[ -z "$bd_project" ] && $err "$project/$tree: bad bd: '$bd'"
-		[ "${bd##*/}" = "$bd" ] && bd_tree=""
-		[ -z "$bd_project" ] || ./update trees -b $bd_project \
-		    $bd_tree || $err "$project/$tree: !bd $bd"; continue
-	done
+	if [ "$_f" != "-d" ]; then
+		:
+	elif [ -z "$mode" ]; then
+		for bd in $build_depend; do
+			bd_project="${bd%%/*}"; bd_tree="${bd##*/}"
+			[ -z "$bd_project" ] && \
+			    $err "$project/$tree: bad bd: '$bd'"
+			[ "${bd##*/}" = "$bd" ] && bd_tree=""
+			[ -z "$bd_project" ] || ./update trees -b $bd_project \
+			    $bd_tree || $err "$project/$tree: !bd $bd"
+		done
+	fi
 
 	[ "$mode" = "fetch" ] || return 0
 	[ -f "CHANGELOG" ] && return 1; fetch_${cmd#build_}; return 1
@@ -200,23 +199,9 @@ check_cross_compiler()
 	done; return 0
 }
 
-check_coreboot_utils()
-{
-	for util in cbfstool ifdtool; do
-		utilelfdir="elf/$util/$1"
-		utilsrcdir="src/coreboot/$1/util/$util"
-
-		utilmode="" && [ -n "$mode" ] && utilmode="clean"
-		x_ make -C "$utilsrcdir" $utilmode -j$XBMK_THREADS $makeargs
-		[ -z "$mode" ] && [ ! -f "$utilelfdir/$util" ] && \
-			x_ mkdir -p "$utilelfdir" && \
-			x_ cp "$utilsrcdir/$util" "elf/$util/$1"
-		[ -z "$mode" ] || x_ rm -Rf "$utilelfdir"
-	done; return 0
-}
-
 check_defconfig()
 {
+	[ "$_f" = "-d" ] && return 0
 	[ -f "$defconfig" ] || $err "$project/$target: missing defconfig"
 
 	dest_dir="$elfdir/$target/${defconfig#"$target_dir/config/"}"
@@ -227,6 +212,8 @@ check_defconfig()
 
 elfcheck()
 {
+	[ "$_f" = "-d" ] && return 0 # dry run. assume a build exists.
+
 	# TODO: very hacky check. do it properly (based on build.list)
 	for elftest in "$dest_dir"/*; do
 		[ -e "$elftest" ] && e "$elftest" f && return 1
@@ -236,11 +223,12 @@ elfcheck()
 handle_makefile()
 {
 	check_makefile "$cdir" && x_ make clean -C "$cdir"
-	x_ cp "$defconfig" "$cdir/.config"
-	[ -n "$mode" ] || [ -n "$btype" ] || make -C "$cdir" \
-	    silentoldconfig || make -C "$cdir" oldconfig || :
+	[ -f "$defconfig" ] && x_ cp "$defconfig" "$cdir/.config"
+	[ "$_f" = "-d" ] || [ -n "$mode" ] || [ -n "$btype" ] || make -C \
+	    "$cdir" silentoldconfig || make -C "$cdir" oldconfig || :
 
 	run_make_command || $err "handle_makefile $cdir: no makefile!"
+	[ "$_f" = "-d" ] && return 0
 
 	_copy=".config" && [ "$mode" = "savedefconfig" ] && _copy="defconfig"
 	[ "${mode%config}" = "$mode" ] || x_ cp "$cdir/$_copy" "$defconfig"
@@ -256,17 +244,17 @@ run_make_command()
 	check_cmake "$cdir" && [ -z "$mode" ] && check_autoconf "$cdir"
 	check_makefile "$cdir" || return 1
 
-	[ "$project" = "coreboot" ] && [ -z "$mode" ] && x_ \
-		printf "%s\n" "${version%%-*}" > "$cdir/.coreboot-version"
-
-	make -C "$cdir" $mode -j$XBMK_THREADS $makeargs || $err "$cdir mk$mode"
+	[ "$_f" = "-d" ] || make -C "$cdir" $mode -j$XBMK_THREADS $makeargs \
+	    || $err "$cdir mk$mode"
 	[ -z "$mkhelper" ] || [ -n "$mode" ] || $mkhelper || $err "!$mkhelper"
 
+	[ "$_f" = "-d" ] && return 0
 	[ "$mode" = "clean" ] && make -C "$cdir" distclean || :; return 0
 }
 
 check_cmake()
 {
+	[ "$_f" = "-d" ] && return 0 # dry run
 	[ -z "$cmakedir" ] || check_makefile "$1" || cmake -B "$1" \
 	    "$1/$cmakedir" || check_makefile "$1" || $err "$1: !cmk $cmakedir"
 	[ -z "$cmakedir" ] || check_makefile "$1" || \
@@ -275,6 +263,7 @@ check_cmake()
 
 check_autoconf()
 {
+	[ "$_f" = "-d" ] && return 0 # dry run
 	(
 	cd "$1" || $err "!cd $1"
 	[ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs
@@ -285,12 +274,14 @@ check_autoconf()
 
 check_makefile()
 {
+	[ "$_f" = "-d" ] && return 0 # dry run
 	[ -f "$1/Makefile" ] || [ -f "$1/makefile" ] || \
 	    [ -f "$1/GNUmakefile" ] || return 1; return 0
 }
 
 copy_elf()
 {
+	[ "$_f" = "-d" ] && return 0 # dry run
 	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do
 		[ -f "$cdir/$f" ] && x_ cp "$cdir/$f" "$dest_dir"
 	done < "$listfile"; x_ make clean -C "$cdir"

From 5a1d2401c2654e0cb24b36032d4347fdc6ef8a6f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 9 Jul 2024 03:09:49 +0100
Subject: [PATCH 0747/1549] minor cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 23 ++++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index 9b0943b9..10871935 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -42,6 +42,18 @@ mkpayload_grub()
 	    $err "$tree: cannot build grub.elf"; return 0
 }
 
+mkvendorfiles()
+{
+	if [ "$_f" = "-d" ]; then
+		check_coreboot_utils "$tree"
+	elif [ "$_f" = "-b" ]; then
+		printf "%s\n" "${version%%-*}" > "$cdir/.coreboot-version" || \
+		    $err "!mk $cdir .coreboot-version"
+	fi
+	[ -z "$mode" ] && [ "$target" != "$tree" ] && \
+	    x_ ./vendor download $target; return 0
+}
+
 check_coreboot_utils()
 {
 	for util in cbfstool ifdtool; do
@@ -57,17 +69,6 @@ check_coreboot_utils()
 	done; return 0
 }
 
-mkvendorfiles()
-{
-	if [ "$_f" = "-d" ]; then
-		check_coreboot_utils "$tree"
-	elif [ "$_f" = "-b" ]; then
-		printf "%s\n" "${version%%-*}" > "$cdir/.coreboot-version"
-	fi
-	[ -z "$mode" ] && [ "$target" != "$tree" ] && \
-	    x_ ./vendor download $target; return 0
-}
-
 mkcorebootbin()
 {
 	[ "$_f" = "-d" ] && return 0 # dry run

From 469cc64f99d2d9341429cd47d22f9fa77fb1ce72 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 10 Jul 2024 01:11:14 +0100
Subject: [PATCH 0748/1549] trees: fix bad comparison

pro-tip: don't do this at 3AM

do massive changes like this, no later than 1AM.

the intent anyway is for -d to cause no build dependencies
to be handled, but the current logic says to only handle
them if -d is set! fix it by removing the ! part

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index c6175986..1d8c755f 100755
--- a/script/trees
+++ b/script/trees
@@ -162,7 +162,7 @@ configure_project()
 	[ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1
 	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
 
-	if [ "$_f" != "-d" ]; then
+	if [ "$_f" = "-d" ]; then
 		:
 	elif [ -z "$mode" ]; then
 		for bd in $build_depend; do

From 494b94799e0c365097ee93d48fe01cdcf869b602 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 10 Jul 2024 01:24:05 +0100
Subject: [PATCH 0749/1549] rom.sh: only before cbutils before coreboot

otherwise, due to the idiosyncratic nature of the coreboot
build system, the coreboot.rom gets wiped out.

cbutils is still handled by premake. ensure that payloads are
only inserted just after running the coreboot make command.

fixes a build issues introduced on 9020sff, previously unhandled.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index 10871935..3b465795 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -94,8 +94,6 @@ mkcorebootbin()
 	[ "$payload_memtest" = "y" ] || payload_memtest="n"
 	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"
 
-	x_ ./update trees -d coreboot $tree
-
 	[ "$payload_seabios" = "y" ] && pname="seabios" && add_seabios
 	[ "$payload_uboot" = "y" ] && pname="uboot" && add_uboot
 

From 97b777715beed324e5b07bc91bbd2d9eb9b1271b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 10 Jul 2024 01:37:27 +0100
Subject: [PATCH 0750/1549] rom.sh: avoid re-building cbutils if built

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/rom.sh b/include/rom.sh
index 3b465795..9a33e58f 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -57,6 +57,8 @@ mkvendorfiles()
 check_coreboot_utils()
 {
 	for util in cbfstool ifdtool; do
+		[ -f "elf/$util/$1/$util" ] && continue
+
 		utilelfdir="elf/$util/$1"
 		utilsrcdir="src/coreboot/$1/util/$util"
 

From 91994b7852f8dd45c9bcecb09b027e5e3909665e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 10 Jul 2024 02:04:25 +0100
Subject: [PATCH 0751/1549] rom.sh: actually say if a cbutil exists

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/rom.sh b/include/rom.sh
index 9a33e58f..14c25b8f 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -57,7 +57,7 @@ mkvendorfiles()
 check_coreboot_utils()
 {
 	for util in cbfstool ifdtool; do
-		[ -f "elf/$util/$1/$util" ] && continue
+		e "elf/$util/$1/$util" f && continue
 
 		utilelfdir="elf/$util/$1"
 		utilsrcdir="src/coreboot/$1/util/$util"

From e9f66ec4a80a2904840b005cd41fbf9b10d1871c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 10 Jul 2024 02:14:25 +0100
Subject: [PATCH 0752/1549] remove executable permission on include/

files under include/ should never be executed directly

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh    | 0
 include/lib.sh    | 0
 include/mrc.sh    | 0
 include/vendor.sh | 0
 4 files changed, 0 insertions(+), 0 deletions(-)
 mode change 100755 => 100644 include/git.sh
 mode change 100755 => 100644 include/lib.sh
 mode change 100755 => 100644 include/mrc.sh
 mode change 100755 => 100644 include/vendor.sh

diff --git a/include/git.sh b/include/git.sh
old mode 100755
new mode 100644
diff --git a/include/lib.sh b/include/lib.sh
old mode 100755
new mode 100644
diff --git a/include/mrc.sh b/include/mrc.sh
old mode 100755
new mode 100644
diff --git a/include/vendor.sh b/include/vendor.sh
old mode 100755
new mode 100644

From 459db1cc2eaa1d40543f7f63345ea4ca27daad9a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 10 Jul 2024 13:06:32 +0100
Subject: [PATCH 0753/1549] trees: remove project-specific hacks

move the coreboot-specific includes into mkhelper.cfg
for that project.

on some projects, we need variables from mkhelper.cfg
to be global, so I was including serprog and coreboot
mkhelper.cfg files in this script.

instead, set a new variable "mkhelpercfg" pointing to
the config file. if it doesn't exist, create and then
point to a temporary (empty) mkhelper.cfg file.

the rom.sh include has been moved to coreboot mkhelper.cfg

The only remaining project-specific logic, in this trees
script, is now the coreboot crossgcc handling, but this
needs to be there as it's also used to build U-Boot.

The way this now works, certain includes are done twice.
For example, include/rom.sh will be included once globally,
outside of main(), and then again in configure_project().

This means that certain functions will be defined twice.
I'm uncertain if shell has anything equivalent to an ifdef
guard as in C, but we actually want this here anyway, and
it shouldn't cause any problems. It's a bit of a hack, but
otherwise results in much cleaner code.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/coreboot/mkhelper.cfg       |  2 ++
 config/data/grub/mkhelper.cfg           |  2 ++
 config/data/pico-serprog/mkhelper.cfg   |  2 ++
 config/data/seabios/mkhelper.cfg        |  0
 config/data/stm32-vserprog/mkhelper.cfg |  2 ++
 script/trees                            | 27 +++++++++++++++----------
 6 files changed, 24 insertions(+), 11 deletions(-)
 create mode 100644 config/data/seabios/mkhelper.cfg

diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index a1c48e63..de07b4c1 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -1,3 +1,5 @@
+. "include/rom.sh"
+
 makeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 build_depend="seabios/default grub/default memtest86plus"
 
diff --git a/config/data/grub/mkhelper.cfg b/config/data/grub/mkhelper.cfg
index ff93a27c..b75cf9d7 100644
--- a/config/data/grub/mkhelper.cfg
+++ b/config/data/grub/mkhelper.cfg
@@ -1,3 +1,5 @@
+. "include/rom.sh"
+
 bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
 autoconfargs="--with-platform=coreboot --disable-werror"
 makeargs="FS_PAYLOAD_MODULES=\"\""
diff --git a/config/data/pico-serprog/mkhelper.cfg b/config/data/pico-serprog/mkhelper.cfg
index 9f6e54cc..e424e2f4 100644
--- a/config/data/pico-serprog/mkhelper.cfg
+++ b/config/data/pico-serprog/mkhelper.cfg
@@ -1,3 +1,5 @@
+. "include/rom.sh"
+
 sersrc="src/pico-serprog"
 serx="$sersrc/build/pico_serprog.uf2"
 picosdk="src/pico-sdk"
diff --git a/config/data/seabios/mkhelper.cfg b/config/data/seabios/mkhelper.cfg
new file mode 100644
index 00000000..e69de29b
diff --git a/config/data/stm32-vserprog/mkhelper.cfg b/config/data/stm32-vserprog/mkhelper.cfg
index 9d02f799..8f45d7fd 100644
--- a/config/data/stm32-vserprog/mkhelper.cfg
+++ b/config/data/stm32-vserprog/mkhelper.cfg
@@ -1,3 +1,5 @@
+. "include/rom.sh"
+
 sersrc="src/stm32-vserprog"
 serx="$sersrc/stm32-vserprog.hex"
 serdir="$sersrc/boards"
diff --git a/script/trees b/script/trees
index 1d8c755f..e8f8756f 100755
--- a/script/trees
+++ b/script/trees
@@ -8,15 +8,11 @@ set -u -e
 
 . "include/lib.sh"
 . "include/git.sh"
-. "include/rom.sh"
-
-. "config/data/pico-serprog/mkhelper.cfg"
-. "config/data/coreboot/mkhelper.cfg"
 
 eval `setvars "" xarch cdir defconfig cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
-    premake postmake`
+    premake postmake mkhelpercfg`
 
 main()
 {
@@ -54,10 +50,16 @@ main()
 	listfile="$datadir/build.list" # needed on multi, optional on single
 	[ -f "$listfile" ] || listfile="" # optional on all projects
 
-	remkdir "${tmpgit%/*}"
+	mkhelpercfg="$datadir/mkhelper.cfg"
 
-	cmd="build_targets" && singletree "$project" && cmd="build_project"
-	$cmd $@
+	targets="$@"
+	remkdir "${tmpgit%/*}"
+}
+
+handle_project()
+{
+	cmd="build_targets $targets" && singletree "$project" && \
+	    cmd="build_project"; $cmd
 
 	[ -f "$listfile" ] || return 0
 	[ -z "$mode" ] && [ "$_f" = "-b" ] && \
@@ -84,9 +86,8 @@ build_targets()
 {
 	[ -d "$cfgsdir" ] || $err "directory, $cfgsdir, does not exist"
 
-	# Build for all targets if no argument is given
-	targets="$(ls -1 "$cfgsdir")" || $err "Can't get options for $cfgsdir"
-	[ $# -gt 0 ] && targets=$@
+	[ $# -gt 0 ] || \
+	    targets="$(ls -1 "$cfgsdir")" || $err "$cfgsdir: Canot get options"
 
 	handle_targets
 }
@@ -288,3 +289,7 @@ copy_elf()
 }
 
 main $@
+e "$mkhelpercfg" f missing && mkhelpercfg="$TMPDIR/mkhelper.cfg" && x_ \
+    touch "$mkhelpercfg"
+. "$mkhelpercfg"
+handle_project

From c0a4df688c2844794485709e82a0b821e2a32741 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 10 Jul 2024 20:38:36 +0100
Subject: [PATCH 0754/1549] trees: use wrapper for dry-running make commands

instead of using lots of if/else conditions, do that once
and set a variable, dry, to :

if not doing a dry run, the variable is empty. prefix this
variable in places where you don't want a certain action to
be performed, on dry runs.

more specifically, : does *nothing* and always returns with
zero status (success).

this results in cleaner code, and a small sloccount reduction.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 32 ++++++++++--------------
 script/trees   | 68 +++++++++++++++++++++-----------------------------
 2 files changed, 41 insertions(+), 59 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index 14c25b8f..18770847 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -26,13 +26,12 @@ mkserprog()
 
 mkpayload_grub()
 {
-	[ "$_f" = "-d" ] && return 0 # dry run
 	eval `setvars "" grub_modules grub_install_modules`
-	eval `setcfg "$grubdata/module/$tree"`
+	$dry eval `setcfg "$grubdata/module/$tree"`
 
-	x_ rm -f "$cdir/grub.elf"
+	$dry x_ rm -f "$cdir/grub.elf"
 
-	"${cdir}/grub-mkstandalone" --grub-mkimage="${cdir}/grub-mkimage" \
+	$dry "${cdir}/grub-mkstandalone" --grub-mkimage="${cdir}/grub-mkimage" \
 	    -O i386-coreboot -o "${cdir}/grub.elf" -d "${cdir}/grub-core/" \
 	    --fonts= --themes= --locales=  --modules="$grub_modules" \
 	    --install-modules="$grub_install_modules" \
@@ -44,12 +43,9 @@ mkpayload_grub()
 
 mkvendorfiles()
 {
-	if [ "$_f" = "-d" ]; then
-		check_coreboot_utils "$tree"
-	elif [ "$_f" = "-b" ]; then
-		printf "%s\n" "${version%%-*}" > "$cdir/.coreboot-version" || \
-		    $err "!mk $cdir .coreboot-version"
-	fi
+	check_coreboot_utils "$tree"
+	printf "%s\n" "${version%%-*}" > "$cdir/.coreboot-version" || \
+	    $err "!mk $cdir .coreboot-version"
 	[ -z "$mode" ] && [ "$target" != "$tree" ] && \
 	    x_ ./vendor download $target; return 0
 }
@@ -73,7 +69,6 @@ check_coreboot_utils()
 
 mkcorebootbin()
 {
-	[ "$_f" = "-d" ] && return 0 # dry run
 	[ "$target" = "$tree" ] && return 0
 
 	tmprom="$cdir/build/coreboot.rom"
@@ -86,7 +81,7 @@ mkcorebootbin()
 	[ "$payload_uboot" = "y" ] || payload_seabios="y"
 	[ "$payload_grub" = "y" ] && payload_seabios="y"
 	[ "$payload_seabios" = "y" ] && [ "$payload_uboot" = "y" ] && \
-	    $err "$target: U-Boot and SeaBIOS/GRUB are both enabled."
+	    $dry $err "$target: U-Boot and SeaBIOS/GRUB are both enabled."
 
 	[ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata"
 
@@ -96,15 +91,15 @@ mkcorebootbin()
 	[ "$payload_memtest" = "y" ] || payload_memtest="n"
 	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"
 
-	[ "$payload_seabios" = "y" ] && pname="seabios" && add_seabios
-	[ "$payload_uboot" = "y" ] && pname="uboot" && add_uboot
+	[ "$payload_seabios" = "y" ] && pname="seabios" && $dry add_seabios
+	[ "$payload_uboot" = "y" ] && pname="uboot" && $dry add_uboot
 
 	newrom="bin/$target/${pname}_${target}_$initmode$displaymode.rom"
-	x_ mkdir -p "${newrom%/*}"; x_ mv "$tmprom" "$newrom"
+	$dry x_ mkdir -p "${newrom%/*}"; $dry x_ mv "$tmprom" "$newrom"
 
 	[ "$XBMK_RELEASE" = "y" ] || return 0
-	mksha512sum "$newrom" "vendorhashes"
-	./vendor inject -r "$newrom" -b "$target" -n nuke || $err "!n $newrom"
+	$dry mksha512sum "$newrom" "vendorhashes"; $dry ./vendor inject \
+	    -r "$newrom" -b "$target" -n nuke || $err "!nuke $newrom"
 }
 
 add_seabios()
@@ -147,7 +142,6 @@ add_uboot()
 
 mkcoreboottar()
 {
-	[ "$_f" = "-d" ] && return 0 # dry run
 	[ "$target" = "$tree" ] && return 0; [ "$XBMK_RELEASE" = "y" ] && \
-	    [ "$release" != "n" ] && mkrom_tarball "bin/$target"; return 0
+	    [ "$release" != "n" ] && $dry mkrom_tarball "bin/$target"; return 0
 }
diff --git a/script/trees b/script/trees
index e8f8756f..ed7cb7a5 100755
--- a/script/trees
+++ b/script/trees
@@ -12,13 +12,13 @@ set -u -e
 eval `setvars "" xarch cdir defconfig cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
-    premake postmake mkhelpercfg`
+    premake postmake mkhelpercfg dry`
 
 main()
 {
 	while getopts f:b:m:u:c:x:s:l:n:d: option; do
 		[ -n "$_f" ] && $err "only one flag is permitted"
-		_f="$1"
+		_f="$1" && [ "$_f" = "-d" ] && dry=":"
 		case "$1" in
 		-d) mode="" ;;
 		-b) mode="" ;;
@@ -62,8 +62,7 @@ handle_project()
 	    cmd="build_project"; $cmd
 
 	[ -f "$listfile" ] || return 0
-	[ -z "$mode" ] && [ "$_f" = "-b" ] && \
-	    printf "\n\nOK! Check %s/\n\n" "$elfdir"; return 0
+	[ -z "$mode" ] && $dry printf "\n\nOK! Check %s/\n\n" "$elfdir"; :
 }
 
 build_project()
@@ -79,7 +78,7 @@ build_project()
 	[ "$mode" = "distclean" ] && mode="clean"
 	run_make_command || return 0
 
-	[ -n "$mode" ] || copy_elf; return 0
+	[ -n "$mode" ] || $dry copy_elf; return 0
 }
 
 build_targets()
@@ -115,7 +114,7 @@ handle_defconfig()
 
 		[ -n "$mode" ] || check_defconfig || continue
 		handle_makefile
-		[ -n "$mode" ] || copy_elf
+		[ -n "$mode" ] || $dry copy_elf
 	done; return 0
 }
 
@@ -135,7 +134,7 @@ handle_src_tree()
 	fi
 	x_ ./update trees -f "$project" "$target"
 
-	[ -z "$mode" ] && [ "$_f" = "-b" ] && check_cross_compiler; return 0
+	[ -z "$mode" ] && $dry check_cross_compiler; return 0
 }
 
 configure_project()
@@ -163,16 +162,13 @@ configure_project()
 	[ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1
 	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
 
-	if [ "$_f" = "-d" ]; then
-		:
-	elif [ -z "$mode" ]; then
+	if [ -z "$mode" ]; then
 		for bd in $build_depend; do
-			bd_project="${bd%%/*}"; bd_tree="${bd##*/}"
-			[ -z "$bd_project" ] && \
-			    $err "$project/$tree: bad bd: '$bd'"
-			[ "${bd##*/}" = "$bd" ] && bd_tree=""
-			[ -z "$bd_project" ] || ./update trees -b $bd_project \
-			    $bd_tree || $err "$project/$tree: !bd $bd"
+			bd_p="${bd%%/*}"; bd_t="${bd##*/}"
+			[ -z "$bd_p" ] && $dry $err "$project/$tree: !bd '$bd'"
+			[ "${bd##*/}" = "$bd" ] && bd_t=""
+			[ -z "$bd_p" ] || $dry ./update trees -b $bd_p $bd_t \
+			    || $err "!mk $project/$tree $bd_p/$bd_t"
 		done
 	fi
 
@@ -202,19 +198,16 @@ check_cross_compiler()
 
 check_defconfig()
 {
-	[ "$_f" = "-d" ] && return 0
-	[ -f "$defconfig" ] || $err "$project/$target: missing defconfig"
+	[ -f "$defconfig" ] || $dry $err "$project/$target: missing defconfig"
 
 	dest_dir="$elfdir/$target/${defconfig#"$target_dir/config/"}"
-	elfcheck || return 1 # skip build if a previous one exists
+	$dry elfcheck || return 1 # skip build if a previous one exists
 
-	x_ mkdir -p "$dest_dir"
+	$dry x_ mkdir -p "$dest_dir"
 }
 
 elfcheck()
 {
-	[ "$_f" = "-d" ] && return 0 # dry run. assume a build exists.
-
 	# TODO: very hacky check. do it properly (based on build.list)
 	for elftest in "$dest_dir"/*; do
 		[ -e "$elftest" ] && e "$elftest" f && return 1
@@ -223,48 +216,45 @@ elfcheck()
 
 handle_makefile()
 {
-	check_makefile "$cdir" && x_ make clean -C "$cdir"
+	$dry check_makefile "$cdir" && x_ make clean -C "$cdir"
 	[ -f "$defconfig" ] && x_ cp "$defconfig" "$cdir/.config"
-	[ "$_f" = "-d" ] || [ -n "$mode" ] || [ -n "$btype" ] || make -C \
+	[ -n "$mode" ] || [ -n "$btype" ] || $dry make -C \
 	    "$cdir" silentoldconfig || make -C "$cdir" oldconfig || :
 
 	run_make_command || $err "handle_makefile $cdir: no makefile!"
-	[ "$_f" = "-d" ] && return 0
 
 	_copy=".config" && [ "$mode" = "savedefconfig" ] && _copy="defconfig"
-	[ "${mode%config}" = "$mode" ] || x_ cp "$cdir/$_copy" "$defconfig"
+	[ "${mode%config}" = "$mode" ] || $dry x_ cp "$cdir/$_copy" "$defconfig"
 
 	[ -e "$cdir/.git" ] && [ "$project" = "u-boot" ] && \
-	    [ "$mode" = "distclean" ] && x_ git -C "$cdir" clean -fdx; return 0
+	    [ "$mode" = "distclean" ] && $dry x_ git -C "$cdir" clean -fdx; :
 }
 
 run_make_command()
 {
 	[ -z "$premake" ] || [ -n "$mode" ] || $premake || $err "!$premake"
 
-	check_cmake "$cdir" && [ -z "$mode" ] && check_autoconf "$cdir"
-	check_makefile "$cdir" || return 1
+	$dry check_cmake "$cdir" && [ -z "$mode" ] && $dry check_autoconf \
+	    "$cdir"; $dry check_makefile "$cdir" || return 1
 
-	[ "$_f" = "-d" ] || make -C "$cdir" $mode -j$XBMK_THREADS $makeargs \
+	$dry make -C "$cdir" $mode -j$XBMK_THREADS $makeargs \
 	    || $err "$cdir mk$mode"
 	[ -z "$mkhelper" ] || [ -n "$mode" ] || $mkhelper || $err "!$mkhelper"
 
-	[ "$_f" = "-d" ] && return 0
-	[ "$mode" = "clean" ] && make -C "$cdir" distclean || :; return 0
+	[ "$mode" = "clean" ] && $dry make -C "$cdir" distclean || :; return 0
 }
 
 check_cmake()
 {
-	[ "$_f" = "-d" ] && return 0 # dry run
-	[ -z "$cmakedir" ] || check_makefile "$1" || cmake -B "$1" \
-	    "$1/$cmakedir" || check_makefile "$1" || $err "$1: !cmk $cmakedir"
-	[ -z "$cmakedir" ] || check_makefile "$1" || \
-		$err "check_cmake $1: can't generate Makefile"; return 0
+	[ -z "$cmakedir" ] || $dry check_makefile "$1" || cmake -B "$1" \
+	    "$1/$cmakedir" || $dry check_makefile "$1" || $err \
+	    "$1: !cmk $cmakedir"
+	[ -z "$cmakedir" ] || $dry check_makefile "$1" || \
+	    $err "check_cmake $1: can't generate Makefile"; return 0
 }
 
 check_autoconf()
 {
-	[ "$_f" = "-d" ] && return 0 # dry run
 	(
 	cd "$1" || $err "!cd $1"
 	[ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs
@@ -275,14 +265,12 @@ check_autoconf()
 
 check_makefile()
 {
-	[ "$_f" = "-d" ] && return 0 # dry run
 	[ -f "$1/Makefile" ] || [ -f "$1/makefile" ] || \
 	    [ -f "$1/GNUmakefile" ] || return 1; return 0
 }
 
 copy_elf()
 {
-	[ "$_f" = "-d" ] && return 0 # dry run
 	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do
 		[ -f "$cdir/$f" ] && x_ cp "$cdir/$f" "$dest_dir"
 	done < "$listfile"; x_ make clean -C "$cdir"

From 17f3e61a0e4fa84b78ab2951a780d6964095a052 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 10 Jul 2024 21:43:13 +0100
Subject: [PATCH 0755/1549] trees: merge build_targets() with handle_targets()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/script/trees b/script/trees
index ed7cb7a5..ad241172 100755
--- a/script/trees
+++ b/script/trees
@@ -88,11 +88,6 @@ build_targets()
 	[ $# -gt 0 ] || \
 	    targets="$(ls -1 "$cfgsdir")" || $err "$cfgsdir: Canot get options"
 
-	handle_targets
-}
-
-handle_targets()
-{
 	for x in $targets; do
 		[ "$x" = "list" ] && x_ ls -1 "config/$project" && \
 		    listfile="" && break

From 3263eeb6b67cf2b2290b0c4bd69b298879f1f937 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 10 Jul 2024 22:14:39 +0100
Subject: [PATCH 0756/1549] trees: general code cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh |   2 +-
 include/lib.sh |   2 +-
 include/rom.sh |  14 +++----
 script/trees   | 108 ++++++++++++++++++++-----------------------------
 4 files changed, 53 insertions(+), 73 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index b0acd7dc..58f62ef3 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -12,7 +12,7 @@ fetch_targets()
 	e "src/$project/$tree" d && return 0
 
 	printf "Creating %s tree %s\n" "$project" "$tree"
-	git_prep "$loc" "$loc" "$PWD/$cfgsdir/$tree/patches" \
+	git_prep "$loc" "$loc" "$PWD/$configdir/$tree/patches" \
 	    "${loc%/*}/$tree" u; nuke "$project/$tree" "$project/$tree"
 }
 
diff --git a/include/lib.sh b/include/lib.sh
index 52187734..2fb97c44 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -37,7 +37,7 @@ chkvars()
 }
 
 eval `setvars "" _nogit board xbmk_parent versiondate projectsite projectname \
-    aur_notice cfgsdir datadir version relname`
+    aur_notice configdir datadir version relname`
 
 for fv in projectname projectsite version versiondate; do
 	eval "[ ! -f "$fv" ] || read -r $fv < \"$fv\" || :"
diff --git a/include/rom.sh b/include/rom.sh
index 18770847..574b1b6c 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -29,13 +29,13 @@ mkpayload_grub()
 	eval `setvars "" grub_modules grub_install_modules`
 	$dry eval `setcfg "$grubdata/module/$tree"`
 
-	$dry x_ rm -f "$cdir/grub.elf"
+	$dry x_ rm -f "$srcdir/grub.elf"
 
-	$dry "${cdir}/grub-mkstandalone" --grub-mkimage="${cdir}/grub-mkimage" \
-	    -O i386-coreboot -o "${cdir}/grub.elf" -d "${cdir}/grub-core/" \
+	$dry "$srcdir/grub-mkstandalone" --grub-mkimage="$srcdir/grub-mkimage" \
+	    -O i386-coreboot -o "$srcdir/grub.elf" -d "${srcdir}/grub-core/" \
 	    --fonts= --themes= --locales=  --modules="$grub_modules" \
 	    --install-modules="$grub_install_modules" \
-	    "/boot/grub/grub_default.cfg=${cdir}/.config" \
+	    "/boot/grub/grub_default.cfg=${srcdir}/.config" \
 	    "/boot/grub/grub.cfg=$grubdata/memdisk.cfg" \
 	    "/background.png=$grubdata/background/background1280x800.png" || \
 	    $err "$tree: cannot build grub.elf"; return 0
@@ -44,8 +44,8 @@ mkpayload_grub()
 mkvendorfiles()
 {
 	check_coreboot_utils "$tree"
-	printf "%s\n" "${version%%-*}" > "$cdir/.coreboot-version" || \
-	    $err "!mk $cdir .coreboot-version"
+	printf "%s\n" "${version%%-*}" > "$srcdir/.coreboot-version" || \
+	    $err "!mk $srcdir .coreboot-version"
 	[ -z "$mode" ] && [ "$target" != "$tree" ] && \
 	    x_ ./vendor download $target; return 0
 }
@@ -71,7 +71,7 @@ mkcorebootbin()
 {
 	[ "$target" = "$tree" ] && return 0
 
-	tmprom="$cdir/build/coreboot.rom"
+	tmprom="$srcdir/build/coreboot.rom"
 	initmode="${defconfig##*/}"; displaymode="${initmode##*_}"
 	initmode="${initmode%%_*}"
 	[ -n "$displaymode" ] && displaymode="_$displaymode"
diff --git a/script/trees b/script/trees
index ad241172..c468a1db 100755
--- a/script/trees
+++ b/script/trees
@@ -9,10 +9,10 @@ set -u -e
 . "include/lib.sh"
 . "include/git.sh"
 
-eval `setvars "" xarch cdir defconfig cmakedir xlang mode makeargs elfdir cmd \
+eval `setvars "" xarch srcdir premake cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
-    premake postmake mkhelpercfg dry`
+    defconfig postmake mkhelpercfg dry dest_dir`
 
 main()
 {
@@ -44,36 +44,27 @@ main()
 
 	[ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined"
 
-	elfdir="elf/$project"
-	datadir="config/data/$project"
-	cfgsdir="config/$project"
-	listfile="$datadir/build.list" # needed on multi, optional on single
+	for d in "elf" "config/data" "config" "src"; do
+		eval "${d#*/}dir=\"$d/$project\""
+	done; dest_dir="$elfdir"
+	listfile="$datadir/build.list"
 	[ -f "$listfile" ] || listfile="" # optional on all projects
 
 	mkhelpercfg="$datadir/mkhelper.cfg"
+	e "$mkhelpercfg" f missing && mkhelpercfg="$TMPDIR/mkhelper.cfg" && \
+	    x_ touch "$mkhelpercfg"
 
 	targets="$@"
-	remkdir "${tmpgit%/*}"
-}
-
-handle_project()
-{
 	cmd="build_targets $targets" && singletree "$project" && \
-	    cmd="build_project"; $cmd
+	    cmd="build_project"
 
-	[ -f "$listfile" ] || return 0
-	[ -z "$mode" ] && $dry printf "\n\nOK! Check %s/\n\n" "$elfdir"; :
+	remkdir "${tmpgit%/*}"
 }
 
 build_project()
 {
-	configure_project "$cfgsdir" || return 0
-
-	dest_dir="$elfdir"
-	[ ! -f "$listfile" ] || elfcheck || return 0
-
-	cdir="src/${project}"
-	x_ ./update trees -f "$project"
+	configure_project "$configdir" || return 0
+	[ ! -f "$listfile" ] || $dry elfcheck || return 0
 
 	[ "$mode" = "distclean" ] && mode="clean"
 	run_make_command || return 0
@@ -83,10 +74,8 @@ build_project()
 
 build_targets()
 {
-	[ -d "$cfgsdir" ] || $err "directory, $cfgsdir, does not exist"
-
-	[ $# -gt 0 ] || \
-	    targets="$(ls -1 "$cfgsdir")" || $err "$cfgsdir: Canot get options"
+	[ -d "$configdir" ] || $err "directory, $configdir, does not exist"
+	[ $# -gt 0 ] || targets="$(ls -1 "$configdir")" || $err "!o $configdir"
 
 	for x in $targets; do
 		[ "$x" = "list" ] && x_ ls -1 "config/$project" && \
@@ -101,7 +90,19 @@ build_targets()
 
 handle_defconfig()
 {
-	handle_src_tree "$target" || return 0
+	target_dir="$configdir/$target"
+
+	[ -f "CHANGELOG" ] || fetch_project "$project"
+	configure_project "$target_dir" || return 0
+	x_ mkdir -p "$elfdir/$target"
+
+	chkvars tree
+	srcdir="src/$project/$tree"
+
+	if [ "$mode" = "distclean" ] || [ "$mode" = "crossgcc-clean" ]; then
+		[ -d "$srcdir" ] || return 0
+	fi
+	[ -z "$mode" ] && $dry check_cross_compiler
 
 	for y in "$target_dir/config"/*; do
 		[ "$_f" = "-d" ] || [ -f "$y" ] || continue
@@ -113,25 +114,6 @@ handle_defconfig()
 	done; return 0
 }
 
-handle_src_tree()
-{
-	target_dir="$cfgsdir/$target"
-
-	[ -f "CHANGELOG" ] || fetch_project "$project"
-	configure_project "$target_dir" || return 1
-	x_ mkdir -p "$elfdir/$target"
-
-	chkvars tree
-	cdir="src/$project/$tree"
-
-	if [ "$mode" = "distclean" ] || [ "$mode" = "crossgcc-clean" ]; then
-		[ -d "$cdir" ] || return 1
-	fi
-	x_ ./update trees -f "$project" "$target"
-
-	[ -z "$mode" ] && $dry check_cross_compiler; return 0
-}
-
 configure_project()
 {
 	eval `setvars "" xarch xlang build_depend autoconfargs xtree postmake \
@@ -167,6 +149,7 @@ configure_project()
 		done
 	fi
 
+	[ "$mode" = "fetch" ] || x_ ./update trees -f "$project" $target
 	[ "$mode" = "fetch" ] || return 0
 	[ -f "CHANGELOG" ] && return 1; fetch_${cmd#build_}; return 1
 }
@@ -194,10 +177,9 @@ check_cross_compiler()
 check_defconfig()
 {
 	[ -f "$defconfig" ] || $dry $err "$project/$target: missing defconfig"
-
 	dest_dir="$elfdir/$target/${defconfig#"$target_dir/config/"}"
-	$dry elfcheck || return 1 # skip build if a previous one exists
 
+	$dry elfcheck || return 1 # skip build if a previous one exists
 	$dry x_ mkdir -p "$dest_dir"
 }
 
@@ -211,32 +193,32 @@ elfcheck()
 
 handle_makefile()
 {
-	$dry check_makefile "$cdir" && x_ make clean -C "$cdir"
-	[ -f "$defconfig" ] && x_ cp "$defconfig" "$cdir/.config"
+	$dry check_makefile "$srcdir" && x_ make clean -C "$srcdir"
+	[ -f "$defconfig" ] && x_ cp "$defconfig" "$srcdir/.config"
 	[ -n "$mode" ] || [ -n "$btype" ] || $dry make -C \
-	    "$cdir" silentoldconfig || make -C "$cdir" oldconfig || :
+	    "$srcdir" silentoldconfig || make -C "$srcdir" oldconfig || :
 
-	run_make_command || $err "handle_makefile $cdir: no makefile!"
+	run_make_command || $err "handle_makefile $srcdir: no makefile!"
 
 	_copy=".config" && [ "$mode" = "savedefconfig" ] && _copy="defconfig"
-	[ "${mode%config}" = "$mode" ] || $dry x_ cp "$cdir/$_copy" "$defconfig"
+	[ "${mode%config}" = "$mode" ] || \
+	    $dry x_ cp "$srcdir/$_copy" "$defconfig"
 
-	[ -e "$cdir/.git" ] && [ "$project" = "u-boot" ] && \
-	    [ "$mode" = "distclean" ] && $dry x_ git -C "$cdir" clean -fdx; :
+	[ -e "$srcdir/.git" ] && [ "$project" = "u-boot" ] && \
+	    [ "$mode" = "distclean" ] && $dry x_ git -C "$srcdir" clean -fdx; :
 }
 
 run_make_command()
 {
 	[ -z "$premake" ] || [ -n "$mode" ] || $premake || $err "!$premake"
 
-	$dry check_cmake "$cdir" && [ -z "$mode" ] && $dry check_autoconf \
-	    "$cdir"; $dry check_makefile "$cdir" || return 1
+	$dry check_cmake "$srcdir" && [ -z "$mode" ] && $dry check_autoconf \
+	    "$srcdir"; $dry check_makefile "$srcdir" || return 1
 
-	$dry make -C "$cdir" $mode -j$XBMK_THREADS $makeargs \
-	    || $err "$cdir mk$mode"
+	$dry make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs || $err "!$mode"
 	[ -z "$mkhelper" ] || [ -n "$mode" ] || $mkhelper || $err "!$mkhelper"
 
-	[ "$mode" = "clean" ] && $dry make -C "$cdir" distclean || :; return 0
+	[ "$mode" = "clean" ] && $dry make -C "$srcdir" distclean || :; :
 }
 
 check_cmake()
@@ -267,12 +249,10 @@ check_makefile()
 copy_elf()
 {
 	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do
-		[ -f "$cdir/$f" ] && x_ cp "$cdir/$f" "$dest_dir"
-	done < "$listfile"; x_ make clean -C "$cdir"
+		[ -f "$srcdir/$f" ] && x_ cp "$srcdir/$f" "$dest_dir"
+	done < "$listfile"; x_ make clean -C "$srcdir"
 }
 
 main $@
-e "$mkhelpercfg" f missing && mkhelpercfg="$TMPDIR/mkhelper.cfg" && x_ \
-    touch "$mkhelpercfg"
 . "$mkhelpercfg"
-handle_project
+$cmd

From e37779c11db42104408d6c2985d21da679df9c44 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 11 Jul 2024 00:28:32 +0100
Subject: [PATCH 0757/1549] trees: don't continue if no argument given

main() used to be the only function executed from
outside of main(), in this script, but now we source
a config file and then run the build afterward.

when a flag is provided without OPTARG, this means
that we are continuing such action erroneously. to
mitigate this, return 1 in that instance, and handle
it in the line that calls main(), making it exit with
zero status (success).

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/script/trees b/script/trees
index c468a1db..f1c0acef 100755
--- a/script/trees
+++ b/script/trees
@@ -40,7 +40,7 @@ main()
 		./update trees $_f "$p" || $err "!./update trees $_f $p"
 		[ "$XBMK_RELEASE" != "y" ] || singletree "$p" || \
 		    x_ rm -Rf "src/$p/$p"; continue
-	done && return 0
+	done && return 1
 
 	[ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined"
 
@@ -253,6 +253,6 @@ copy_elf()
 	done < "$listfile"; x_ make clean -C "$srcdir"
 }
 
-main $@
+main $@ || exit 0
 . "$mkhelpercfg"
 $cmd

From 090cf7ad541d181385d1b1a80c669af68ff22c8b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 11 Jul 2024 01:14:28 +0100
Subject: [PATCH 0758/1549] trees: fix bad comparison in configure_project()

we used to set cmd only to these values:
build_project
build_targets

however, now we set them to:
build_project
build_targets $@

the latter cannot be measured reliably, but
we were checking whether cmd equalled:
build_targets

now we instead check that it does not equal:
build_project

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index f1c0acef..a260cf24 100755
--- a/script/trees
+++ b/script/trees
@@ -122,7 +122,7 @@ configure_project()
 	[ -f "$datadir/mkhelper.cfg" ] && eval `setcfg "$datadir/mkhelper.cfg"`
 
 	_tcfg="$1/target.cfg"
-	while [ -f "$_tcfg" ] || [ "$cmd" = "build_targets" ]; do
+	while [ -f "$_tcfg" ] || [ "$cmd" != "build_project" ]; do
 		eval `setvars "" rev tree`
 
 		printf "Loading %s config: %s\n" "$project" "$_tcfg"

From 2ecec55af77868ed97fa9785a7f09d25dcd1ec9e Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Wed, 10 Jul 2024 16:27:28 +0300
Subject: [PATCH 0759/1549] u-boot: Update to v2024.07

Set default U-Boot revision to v2024.07 and rebase patches on top of
that. One patch that fixes drawing box characters (UTF-8 to CP437) had
an alternative merged, another hack we have to fix regulator issues is
no longer neccessary as the issue is fixed, and my QEMU patches were
merged upstream, so drop these patches. One patch we have to disable
binman images can be replaced by a simpler alternative so drop it too.

Upstream kconfig status is still unstable, so updating configs with
`make oldconfig` would miss important upstream changes, since they rely
on carrying defaults via upstream defconfigs. Update the configs as
such, like before:

- Turn old configs into defconfigs (./update trees -s u-boot)
- Save the diff from old upstream defconfig (diffconfig $theirs $ours)
- Update U-Boot revision, rebase patches, and clean old trees
- Prepare new U-Boot tree (./update trees -f u-boot)
- Review the diffconfigs to see if any options were renamed upstream
- Copy over the new upstream defconfigs and apply earlier diff
- Turn new defconfigs into configs (./update trees -l u-boot)

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 ...399-Set-hardcoded-clock-rates-same-a.patch |   8 +-
 ...-improve-UEFI-experience-on-DM_VIDEO.patch | 333 ++-----------
 .../0003-Add-video-damage-tracking.patch      | 439 +++++++++---------
 ...on-t-error-on-reentrant-regulator-ac.patch |  42 --
 ...hip-Remove-binman-image-descriptions.patch | 307 ------------
 ...Bochs-console-buffering-USB-keyboard.patch | 348 --------------
 config/u-boot/default/target.cfg              |   2 +-
 config/u-boot/gru_bob/config/default          | 218 ++++++---
 config/u-boot/gru_kevin/config/default        | 218 ++++++---
 config/u-boot/qemu_arm64_12mb/config/default  | 146 +++---
 10 files changed, 629 insertions(+), 1432 deletions(-)
 delete mode 100644 config/u-boot/default/patches/0004-HACK-regulator-Don-t-error-on-reentrant-regulator-ac.patch
 delete mode 100644 config/u-boot/default/patches/0005-HACK-rockchip-Remove-binman-image-descriptions.patch
 delete mode 100644 config/u-boot/default/patches/0006-arm-qemu-Enable-Bochs-console-buffering-USB-keyboard.patch

diff --git a/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch b/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch
index 4a3e8687..4ceeac59 100644
--- a/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch
+++ b/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch
@@ -1,4 +1,4 @@
-From 27d49512277677afb7f71e093b007b3e2022b83e Mon Sep 17 00:00:00 2001
+From f98475a64fcfe6ef710acb29391c33c17903e580 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Fri, 8 Oct 2021 17:33:22 +0300
 Subject: [PATCH] clk: rockchip: rk3399: Set hardcoded clock rates same as
@@ -60,7 +60,7 @@ index d941a129f3e5..54035c0df1f3 100644
  #define PWM_CLOCK_HZ    PMU_PCLK_HZ
  
 diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
-index f748fb5189e0..33f02c2d633c 100644
+index 67b2c05ec9ed..754b35c23197 100644
 --- a/drivers/clk/rockchip/clk_rk3399.c
 +++ b/drivers/clk/rockchip/clk_rk3399.c
 @@ -54,10 +54,11 @@ struct pll_div {
@@ -87,7 +87,7 @@ index f748fb5189e0..33f02c2d633c 100644
  	void *aclkreg_addr, *dclkreg_addr;
  	u32 div;
  
-@@ -1336,6 +1337,7 @@ static void rkclk_init(struct rockchip_cru *cru)
+@@ -1395,6 +1396,7 @@ static void rkclk_init(struct rockchip_cru *cru)
  	/* configure gpll cpll */
  	rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);
  	rkclk_set_pll(&cru->cpll_con[0], &cpll_init_cfg);
@@ -96,5 +96,5 @@ index f748fb5189e0..33f02c2d633c 100644
  	/* configure perihp aclk, hclk, pclk */
  	aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
 -- 
-2.42.0
+2.45.2
 
diff --git a/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch b/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch
index cd5a2751..d5c6788a 100644
--- a/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch
+++ b/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch
@@ -1,7 +1,7 @@
-From ac31b6bc4bcfc328342ec1677db5b80548d43b35 Mon Sep 17 00:00:00 2001
+From 3e1e14e0b14539ca42db40488c7b1067eb01dea4 Mon Sep 17 00:00:00 2001
 From: Andre Przywara <andre.przywara@arm.com>
 Date: Mon, 10 Jan 2022 00:56:31 +0000
-Subject: [PATCH 1/4] video: Add cursor support for video consoles
+Subject: [PATCH 1/3] video: Add cursor support for video consoles
 
 So far the video console is completely lacking any cursor, which makes
 typing and correcting quite irritating.
@@ -24,7 +24,7 @@ Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
  3 files changed, 44 insertions(+)
 
 diff --git a/drivers/video/console_core.c b/drivers/video/console_core.c
-index b5d0e3dceca3..60de5fcacb82 100644
+index 939363653f6c..6b531718276f 100644
 --- a/drivers/video/console_core.c
 +++ b/drivers/video/console_core.c
 @@ -30,6 +30,7 @@ static int console_set_font(struct udevice *dev, struct video_fontdata *fontdata
@@ -36,10 +36,10 @@ index b5d0e3dceca3..60de5fcacb82 100644
  	vc_priv->y_charsize = fontdata->height;
  	if (vid_priv->rot % 2) {
 diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c
-index b5b3b6625902..a6d994bd637c 100644
+index 80e7adf6a1a4..8b2ef51f1b3b 100644
 --- a/drivers/video/vidconsole-uclass.c
 +++ b/drivers/video/vidconsole-uclass.c
-@@ -56,6 +56,26 @@ static int vidconsole_entry_start(struct udevice *dev)
+@@ -57,6 +57,26 @@ int vidconsole_entry_start(struct udevice *dev)
  	return ops->entry_start(dev);
  }
  
@@ -66,7 +66,7 @@ index b5b3b6625902..a6d994bd637c 100644
  /* Move backwards one space */
  static int vidconsole_back(struct udevice *dev)
  {
-@@ -63,6 +83,8 @@ static int vidconsole_back(struct udevice *dev)
+@@ -64,6 +84,8 @@ static int vidconsole_back(struct udevice *dev)
  	struct vidconsole_ops *ops = vidconsole_get_ops(dev);
  	int ret;
  
@@ -75,7 +75,7 @@ index b5b3b6625902..a6d994bd637c 100644
  	if (ops->backspace) {
  		ret = ops->backspace(dev);
  		if (ret != -ENOSYS)
-@@ -89,6 +111,8 @@ static void vidconsole_newline(struct udevice *dev)
+@@ -90,6 +112,8 @@ static void vidconsole_newline(struct udevice *dev)
  	const int rows = CONFIG_VAL(CONSOLE_SCROLL_LINES);
  	int i, ret;
  
@@ -84,7 +84,7 @@ index b5b3b6625902..a6d994bd637c 100644
  	priv->xcur_frac = priv->xstart_frac;
  	priv->ycur += priv->y_charsize;
  
-@@ -282,6 +306,14 @@ static void vidconsole_escape_char(struct udevice *dev, char ch)
+@@ -284,6 +308,14 @@ static void vidconsole_escape_char(struct udevice *dev, char ch)
  
  		break;
  	}
@@ -99,9 +99,9 @@ index b5b3b6625902..a6d994bd637c 100644
  	case 'J': {
  		int mode;
  
-@@ -456,6 +488,11 @@ int vidconsole_put_char(struct udevice *dev, char ch)
+@@ -458,6 +490,11 @@ int vidconsole_put_char(struct udevice *dev, char ch)
  	struct vidconsole_priv *priv = dev_get_uclass_priv(dev);
- 	int ret;
+ 	int cp, ret;
  
 +	/*
 +	 * We don't need to clear the cursor since we are going to overwrite
@@ -111,7 +111,7 @@ index b5b3b6625902..a6d994bd637c 100644
  	if (priv->escape) {
  		vidconsole_escape_char(dev, ch);
  		return 0;
-@@ -470,6 +507,7 @@ int vidconsole_put_char(struct udevice *dev, char ch)
+@@ -472,6 +509,7 @@ int vidconsole_put_char(struct udevice *dev, char ch)
  		/* beep */
  		break;
  	case '\r':
@@ -119,7 +119,7 @@ index b5b3b6625902..a6d994bd637c 100644
  		priv->xcur_frac = priv->xstart_frac;
  		break;
  	case '\n':
-@@ -477,6 +515,7 @@ int vidconsole_put_char(struct udevice *dev, char ch)
+@@ -479,6 +517,7 @@ int vidconsole_put_char(struct udevice *dev, char ch)
  		vidconsole_entry_start(dev);
  		break;
  	case '\t':	/* Tab (8 chars alignment) */
@@ -127,7 +127,7 @@ index b5b3b6625902..a6d994bd637c 100644
  		priv->xcur_frac = ((priv->xcur_frac / priv->tab_width_frac)
  				+ 1) * priv->tab_width_frac;
  
-@@ -494,6 +533,8 @@ int vidconsole_put_char(struct udevice *dev, char ch)
+@@ -503,6 +542,8 @@ int vidconsole_put_char(struct udevice *dev, char ch)
  		break;
  	}
  
@@ -136,7 +136,7 @@ index b5b3b6625902..a6d994bd637c 100644
  	return 0;
  }
  
-@@ -646,6 +687,7 @@ static int vidconsole_pre_probe(struct udevice *dev)
+@@ -723,6 +764,7 @@ static int vidconsole_pre_probe(struct udevice *dev)
  	struct video_priv *vid_priv = dev_get_uclass_priv(vid);
  
  	priv->xsize_frac = VID_TO_POS(vid_priv->xsize);
@@ -145,25 +145,27 @@ index b5b3b6625902..a6d994bd637c 100644
  	return 0;
  }
 diff --git a/include/video_console.h b/include/video_console.h
-index 2694e44f6ecf..949abb3861e7 100644
+index 8b5928dc5ebb..00c5ecb664b9 100644
 --- a/include/video_console.h
 +++ b/include/video_console.h
-@@ -59,6 +59,7 @@ struct vidconsole_priv {
+@@ -66,6 +66,7 @@ struct vidconsole_priv {
  	int escape_len;
  	int row_saved;
  	int col_saved;
 +	bool cursor_visible;
  	char escape_buf[32];
+ 	char utf8_buf[5];
  };
- 
+
+base-commit: 475aa8345a78396d39b42f96eccecd37ebe24e99
 -- 
-2.42.0
+2.45.2
 
 
-From ab8ddf81c1442717f6ffddc3460d4e4adbd5b570 Mon Sep 17 00:00:00 2001
+From 0dd4fb08993b01d36e491705b24063834dcb618e Mon Sep 17 00:00:00 2001
 From: Andre Przywara <andre.przywara@arm.com>
 Date: Mon, 10 Jan 2022 00:56:36 +0000
-Subject: [PATCH 2/4] efi-selftest: Add international characters test
+Subject: [PATCH 2/3] efi-selftest: Add international characters test
 
 UEFI relies entirely on unicode output, which actual fonts displayed on
 the screen might not be ready for.
@@ -180,10 +182,10 @@ Link: https://lore.kernel.org/r/20220110005638.21599-7-andre.przywara@arm.com
  1 file changed, 5 insertions(+)
 
 diff --git a/lib/efi_selftest/efi_selftest_textoutput.c b/lib/efi_selftest/efi_selftest_textoutput.c
-index cc44b38bc23a..175731ae96b6 100644
+index a3023c82567c..2f8d8d323c2b 100644
 --- a/lib/efi_selftest/efi_selftest_textoutput.c
 +++ b/lib/efi_selftest/efi_selftest_textoutput.c
-@@ -118,6 +118,11 @@ static int execute(void)
+@@ -154,6 +154,11 @@ static int execute(void)
  		efi_st_printf("Unicode not handled properly\n");
  		return EFI_ST_FAILURE;
  	}
@@ -193,16 +195,16 @@ index cc44b38bc23a..175731ae96b6 100644
 +		return EFI_ST_FAILURE;
 +	}
  	efi_st_printf("\n");
- 
- 	return EFI_ST_SUCCESS;
+ 	ret = con_out->output_string(con_out, text);
+ 	if (ret != EFI_ST_SUCCESS) {
 -- 
-2.42.0
+2.45.2
 
 
-From 48e918c31a46815325ffd7a77eb7a3ffedf8e59c Mon Sep 17 00:00:00 2001
+From 13101947807bec7ceaf3231d94e943b9b29a7369 Mon Sep 17 00:00:00 2001
 From: Andre Przywara <andre.przywara@arm.com>
 Date: Mon, 10 Jan 2022 00:56:37 +0000
-Subject: [PATCH 3/4] efi_selftest: Add box drawing character selftest
+Subject: [PATCH 3/3] efi_selftest: Add box drawing character selftest
 
 UEFI applications rely on Unicode output capability, and might use that
 for drawing pseudo-graphical interfaces using Unicode defined box
@@ -220,10 +222,10 @@ Link: https://lore.kernel.org/r/20220110005638.21599-8-andre.przywara@arm.com
  1 file changed, 11 insertions(+)
 
 diff --git a/lib/efi_selftest/efi_selftest_textoutput.c b/lib/efi_selftest/efi_selftest_textoutput.c
-index 175731ae96b6..3c6870f74241 100644
+index 2f8d8d323c2b..02209a5bf224 100644
 --- a/lib/efi_selftest/efi_selftest_textoutput.c
 +++ b/lib/efi_selftest/efi_selftest_textoutput.c
-@@ -123,6 +123,17 @@ static int execute(void)
+@@ -159,6 +159,17 @@ static int execute(void)
  		efi_st_error("OutputString failed for international chars\n");
  		return EFI_ST_FAILURE;
  	}
@@ -239,275 +241,8 @@ index 175731ae96b6..3c6870f74241 100644
 +	con_out->output_string(con_out, L"waiting for admiration...\n");
 +	EFI_CALL(systab.boottime->stall(3000000));
  	efi_st_printf("\n");
- 
- 	return EFI_ST_SUCCESS;
+ 	ret = con_out->output_string(con_out, text);
+ 	if (ret != EFI_ST_SUCCESS) {
 -- 
-2.42.0
-
-
-From 407ca7e821aabf240c2602dd0db56d6398a0c03b Mon Sep 17 00:00:00 2001
-From: Andre Przywara <andre.przywara@arm.com>
-Date: Mon, 10 Jan 2022 00:56:38 +0000
-Subject: [PATCH 4/4] video: Convert UTF-8 input stream to the 437 code page
-
-The bitmap fonts (VGA 8x16 and friends) we import from Linux use the
-437 code page to map their glyphs. For U-Boot's own purposes this is
-probably fine, but UEFI applications output Unicode, which only matches
-in the very basic first 127 characters.
-
-Add a function that converts UTF-8 character sequences into the
-respective CP437 code point, as far as the characters defined in there
-allow this. This includes quite some international and box drawing
-characters, which are used by UEFI applications.
-
-Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-Link: https://lore.kernel.org/r/20220110005638.21599-9-andre.przywara@arm.com
-[Alper: Rebase for makefile changes, use $(SPL_TPL_)VIDEO]
-Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
----
- drivers/video/Makefile            |   1 +
- drivers/video/utf8_cp437.c        | 169 ++++++++++++++++++++++++++++++
- drivers/video/vidconsole-uclass.c |   6 +-
- include/video_console.h           |   9 ++
- 4 files changed, 184 insertions(+), 1 deletion(-)
- create mode 100644 drivers/video/utf8_cp437.c
-
-diff --git a/drivers/video/Makefile b/drivers/video/Makefile
-index d13af9f3b19b..4b1983990aba 100644
---- a/drivers/video/Makefile
-+++ b/drivers/video/Makefile
-@@ -20,6 +20,7 @@ obj-$(CONFIG_DISPLAY) += display-uclass.o
- obj-$(CONFIG_VIDEO_MIPI_DSI) += dsi-host-uclass.o
- obj-$(CONFIG_$(SPL_TPL_)VIDEO) += video-uclass.o vidconsole-uclass.o
- obj-$(CONFIG_$(SPL_TPL_)VIDEO) += video_bmp.o
-+obj-$(CONFIG_$(SPL_TPL_)VIDEO) += utf8_cp437.o
- obj-$(CONFIG_$(SPL_TPL_)PANEL) += panel-uclass.o
- obj-$(CONFIG_PANEL_HX8238D) += hx8238d.o
- obj-$(CONFIG_$(SPL_TPL_)SIMPLE_PANEL) += simple_panel.o
-diff --git a/drivers/video/utf8_cp437.c b/drivers/video/utf8_cp437.c
-new file mode 100644
-index 000000000000..cab68b92b6e3
---- /dev/null
-+++ b/drivers/video/utf8_cp437.c
-@@ -0,0 +1,169 @@
-+/*
-+ * Convert UTF-8 bytes into a code page 437 character.
-+ * Based on the table in the Code_page_437 Wikipedia page.
-+ */
-+
-+#include <linux/types.h>
-+
-+uint8_t code_points_00a0[] = {
-+	255, 173, 155, 156,   7, 157,   7,  21,
-+	  7,   7, 166, 174, 170,   7,   7,   7,
-+	248, 241, 253,   7,   7, 230,  20, 250,
-+	  7,   7, 167, 175, 172, 171,   7, 168,
-+	  7,   7,   7,   7, 142, 143, 146, 128,
-+	  7, 144,   7,   7,   7,   7,   7,   7,
-+	  7, 165,   7,   7,   7,   7, 153,   7,
-+	  7,   7,   7,   7, 154,   7,   7, 225,
-+	133, 160, 131,   7, 132, 134, 145, 135,
-+	138, 130, 136, 137, 141, 161, 140, 139,
-+	  7, 164, 149, 162, 147,   7, 148, 246,
-+	  7, 151, 163, 150, 129,   7,   7, 152,
-+};
-+
-+uint8_t code_points_2550[] = {
-+	205, 186, 213, 214, 201, 184, 183, 187,
-+	212, 211, 200, 190, 189, 188, 198, 199,
-+	204, 181, 182, 185, 209, 210, 203, 207,
-+	208, 202, 216, 215, 206
-+};
-+
-+static uint8_t utf8_convert_11bit(uint16_t code)
-+{
-+	switch (code) {
-+	case 0x0192: return 159;
-+	case 0x0393: return 226;
-+	case 0x0398: return 233;
-+	case 0x03A3: return 228;
-+	case 0x03A6: return 232;
-+	case 0x03A9: return 234;
-+	case 0x03B1: return 224;
-+	case 0x03B4: return 235;
-+	case 0x03B5: return 238;
-+	case 0x03C0: return 227;
-+	case 0x03C3: return 229;
-+	case 0x03C4: return 231;
-+	case 0x03C6: return 237;
-+	}
-+
-+	return 0;
-+};
-+
-+static uint8_t utf8_convert_2xxx(uint16_t code)
-+{
-+	switch (code) {
-+	case 0x2022: return 7;
-+	case 0x203C: return 19;
-+	case 0x207F: return 252;
-+	case 0x20A7: return 158;
-+	case 0x2190: return 27;
-+	case 0x2191: return 24;
-+	case 0x2192: return 26;
-+	case 0x2193: return 25;
-+	case 0x2194: return 29;
-+	case 0x2195: return 18;
-+	case 0x21A8: return 23;
-+	case 0x2219: return 249;
-+	case 0x221A: return 251;
-+	case 0x221E: return 236;
-+	case 0x221F: return 28;
-+	case 0x2229: return 239;
-+	case 0x2248: return 247;
-+	case 0x2261: return 240;
-+	case 0x2264: return 243;
-+	case 0x2265: return 242;
-+	case 0x2310: return 169;
-+	case 0x2320: return 244;
-+	case 0x2321: return 245;
-+	case 0x2500: return 196;
-+	case 0x2502: return 179;
-+	case 0x250C: return 218;
-+	case 0x2510: return 191;
-+	case 0x2514: return 192;
-+	case 0x2518: return 217;
-+	case 0x251C: return 195;
-+	case 0x2524: return 180;
-+	case 0x252C: return 194;
-+	case 0x2534: return 193;
-+	case 0x253C: return 197;
-+	case 0x2580: return 223;
-+	case 0x2584: return 220;
-+	case 0x2588: return 219;
-+	case 0x258C: return 221;
-+	case 0x2590: return 222;
-+	case 0x2591: return 176;
-+	case 0x2592: return 177;
-+	case 0x2593: return 178;
-+	case 0x25A0: return 254;
-+	case 0x25AC: return 22;
-+	case 0x25B2: return 30;
-+	case 0x25BA: return 16;
-+	case 0x25BC: return 31;
-+	case 0x25C4: return 17;
-+	case 0x25CB: return 9;
-+	case 0x25D8: return 8;
-+	case 0x25D9: return 10;
-+	case 0x263A: return 1;
-+	case 0x263B: return 2;
-+	case 0x263C: return 15;
-+	case 0x2640: return 12;
-+	case 0x2642: return 11;
-+	case 0x2660: return 6;
-+	case 0x2663: return 5;
-+	case 0x2665: return 3;
-+	case 0x2666: return 4;
-+	case 0x266A: return 13;
-+	case 0x266B: return 14;
-+	}
-+
-+	return 0;
-+}
-+
-+uint8_t convert_uc16_to_cp437(uint16_t code)
-+{
-+	if (code < 0x7f)		// ASCII
-+		return code;
-+	if (code < 0xa0)		// high control characters
-+		return code;
-+	if (code < 0x100)		// international characters
-+		return code_points_00a0[code - 0xa0];
-+	if (code < 0x800)
-+		return utf8_convert_11bit(code);
-+	if (code >= 0x2550 && code < 0x256d)	// block graphics
-+		return code_points_2550[code - 0x2550];
-+
-+	return utf8_convert_2xxx(code);
-+}
-+
-+uint8_t convert_utf8_to_cp437(uint8_t c, uint32_t *esc)
-+{
-+	int shift;
-+	uint16_t ucs;
-+
-+	if (c < 127)			// ASCII
-+		return c;
-+	if (c == 127)
-+		return 8;		// DEL (?)
-+
-+	switch (c & 0xf0) {
-+	case 0xc0: case 0xd0:		// two bytes sequence
-+		*esc = (1U << 24) | ((c & 0x1f) << 6);
-+		return 0;
-+	case 0xe0:			// three bytes sequence
-+		*esc = (2U << 24) | ((c & 0x0f) << 12);
-+		return 0;
-+	case 0xf0:			// four bytes sequence
-+		*esc = (3U << 24) | ((c & 0x07) << 18);
-+		return 0;
-+	case 0x80: case 0x90: case 0xa0: case 0xb0:	// continuation
-+		shift = (*esc >> 24) - 1;
-+		ucs = *esc & 0xffffff;
-+		if (shift) {
-+			*esc = (shift << 24) | ucs | (c & 0x3f) << (shift * 6);
-+			return 0;
-+		}
-+		*esc = 0;
-+		return convert_uc16_to_cp437(ucs | (c & 0x3f));
-+	}
-+
-+	return 0;
-+}
-diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c
-index a6d994bd637c..a4029a58660b 100644
---- a/drivers/video/vidconsole-uclass.c
-+++ b/drivers/video/vidconsole-uclass.c
-@@ -486,6 +486,7 @@ static int vidconsole_output_glyph(struct udevice *dev, char ch)
- int vidconsole_put_char(struct udevice *dev, char ch)
- {
- 	struct vidconsole_priv *priv = dev_get_uclass_priv(dev);
-+	uint8_t cp437;
- 	int ret;
- 
- 	/*
-@@ -527,7 +528,10 @@ int vidconsole_put_char(struct udevice *dev, char ch)
- 		priv->last_ch = 0;
- 		break;
- 	default:
--		ret = vidconsole_output_glyph(dev, ch);
-+		cp437 = convert_utf8_to_cp437(ch, &priv->ucs);
-+		if (cp437 == 0)
-+			return 0;
-+		ret = vidconsole_output_glyph(dev, cp437);
- 		if (ret < 0)
- 			return ret;
- 		break;
-diff --git a/include/video_console.h b/include/video_console.h
-index 949abb3861e7..dbfb389f324f 100644
---- a/include/video_console.h
-+++ b/include/video_console.h
-@@ -59,6 +59,7 @@ struct vidconsole_priv {
- 	int escape_len;
- 	int row_saved;
- 	int col_saved;
-+	u32 ucs;
- 	bool cursor_visible;
- 	char escape_buf[32];
- };
-@@ -457,4 +458,12 @@ static inline int vidconsole_memmove(struct udevice *dev, void *dst,
- 
- #endif
- 
-+/*
-+ * Convert an UTF-8 byte into the corresponding character in the CP437
-+ * code page. Returns 0 if that character is part of a multi-byte sequence.
-+ * for which *esc holds the state of. Repeatedly feed in more bytes until
-+ * the return value returns a non-0 character.
-+ */
-+uint8_t convert_utf8_to_cp437(uint8_t c, uint32_t *esc);
-+
- #endif
--- 
-2.42.0
+2.45.2
 
diff --git a/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch b/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch
index 80195dc0..616efa0f 100644
--- a/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch
+++ b/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch
@@ -1,4 +1,4 @@
-From 60a24786c1c542b2a5967632df15ae14d1385061 Mon Sep 17 00:00:00 2001
+From 3efc90a6ea3bb88b66af7f7096e8168c2cc34aa6 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Fri, 18 Aug 2023 13:31:36 +0300
 Subject: [PATCH 01/13] video: test: Split copy frame buffer check into a
@@ -12,16 +12,17 @@ function that we can skip calling, since we won't want it to error on
 those mismatched cases.
 
 Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
 Link: https://lore.kernel.org/u-boot/20230821135111.3558478-2-alpernebiyasak@gmail.com/
 ---
  test/dm/video.c | 69 +++++++++++++++++++++++++++++++++++++++++--------
  1 file changed, 58 insertions(+), 11 deletions(-)
 
 diff --git a/test/dm/video.c b/test/dm/video.c
-index d907f681600b..641a6250100a 100644
+index 7dfbeb9555d1..14e6af5181f1 100644
 --- a/test/dm/video.c
 +++ b/test/dm/video.c
-@@ -55,9 +55,6 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+@@ -54,9 +54,6 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
   * size of the compressed data. This provides a pretty good level of
   * certainty and the resulting tests need only check a single value.
   *
@@ -31,7 +32,7 @@ index d907f681600b..641a6250100a 100644
   * @uts:	Test state
   * @dev:	Video device
   * Return: compressed size of the frame buffer, or -ve on error
-@@ -66,7 +63,6 @@ static int compress_frame_buffer(struct unit_test_state *uts,
+@@ -65,7 +62,6 @@ static int compress_frame_buffer(struct unit_test_state *uts,
  				 struct udevice *dev)
  {
  	struct video_priv *priv = dev_get_uclass_priv(dev);
@@ -39,7 +40,7 @@ index d907f681600b..641a6250100a 100644
  	uint destlen;
  	void *dest;
  	int ret;
-@@ -82,16 +78,34 @@ static int compress_frame_buffer(struct unit_test_state *uts,
+@@ -81,16 +77,34 @@ static int compress_frame_buffer(struct unit_test_state *uts,
  	if (ret)
  		return ret;
  
@@ -81,7 +82,7 @@ index d907f681600b..641a6250100a 100644
  /*
   * Call this function at any point to halt and show the current display. Be
   * sure to run the test with the -l flag.
-@@ -155,24 +169,30 @@ static int dm_test_video_text(struct unit_test_state *uts)
+@@ -154,24 +168,30 @@ static int dm_test_video_text(struct unit_test_state *uts)
  	ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
  	ut_assertok(vidconsole_select_font(con, "8x16", 0));
  	ut_asserteq(46, compress_frame_buffer(uts, dev));
@@ -112,7 +113,7 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
-@@ -191,24 +211,30 @@ static int dm_test_video_text_12x22(struct unit_test_state *uts)
+@@ -190,24 +210,30 @@ static int dm_test_video_text_12x22(struct unit_test_state *uts)
  	ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
  	ut_assertok(vidconsole_select_font(con, "12x22", 0));
  	ut_asserteq(46, compress_frame_buffer(uts, dev));
@@ -143,7 +144,7 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
-@@ -226,6 +252,7 @@ static int dm_test_video_chars(struct unit_test_state *uts)
+@@ -225,6 +251,7 @@ static int dm_test_video_chars(struct unit_test_state *uts)
  	ut_assertok(vidconsole_select_font(con, "8x16", 0));
  	vidconsole_put_string(con, test_string);
  	ut_asserteq(466, compress_frame_buffer(uts, dev));
@@ -151,7 +152,7 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
-@@ -247,19 +274,23 @@ static int dm_test_video_ansi(struct unit_test_state *uts)
+@@ -246,19 +273,23 @@ static int dm_test_video_ansi(struct unit_test_state *uts)
  	video_clear(con->parent);
  	video_sync(con->parent, false);
  	ut_asserteq(46, compress_frame_buffer(uts, dev));
@@ -175,7 +176,7 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
-@@ -292,11 +323,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot,
+@@ -291,11 +322,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot,
  	ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
  	ut_assertok(vidconsole_select_font(con, "8x16", 0));
  	ut_asserteq(46, compress_frame_buffer(uts, dev));
@@ -189,7 +190,7 @@ index d907f681600b..641a6250100a 100644
  
  	/* Check display scrolling */
  	for (i = 0; i < SCROLL_LINES; i++) {
-@@ -304,11 +337,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot,
+@@ -303,11 +336,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot,
  		vidconsole_put_char(con, '\n');
  	}
  	ut_asserteq(scroll_size, compress_frame_buffer(uts, dev));
@@ -203,7 +204,7 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
-@@ -383,6 +418,7 @@ static int dm_test_video_bmp(struct unit_test_state *uts)
+@@ -382,6 +417,7 @@ static int dm_test_video_bmp(struct unit_test_state *uts)
  
  	ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
  	ut_asserteq(1368, compress_frame_buffer(uts, dev));
@@ -211,7 +212,7 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
-@@ -402,6 +438,7 @@ static int dm_test_video_bmp8(struct unit_test_state *uts)
+@@ -401,6 +437,7 @@ static int dm_test_video_bmp8(struct unit_test_state *uts)
  
  	ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
  	ut_asserteq(1247, compress_frame_buffer(uts, dev));
@@ -219,7 +220,7 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
-@@ -425,6 +462,7 @@ static int dm_test_video_bmp16(struct unit_test_state *uts)
+@@ -424,6 +461,7 @@ static int dm_test_video_bmp16(struct unit_test_state *uts)
  
  	ut_assertok(video_bmp_display(dev, dst, 0, 0, false));
  	ut_asserteq(3700, compress_frame_buffer(uts, dev));
@@ -227,7 +228,7 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
-@@ -448,6 +486,7 @@ static int dm_test_video_bmp24(struct unit_test_state *uts)
+@@ -447,6 +485,7 @@ static int dm_test_video_bmp24(struct unit_test_state *uts)
  
  	ut_assertok(video_bmp_display(dev, dst, 0, 0, false));
  	ut_asserteq(3656, compress_frame_buffer(uts, dev));
@@ -235,7 +236,7 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
-@@ -471,6 +510,7 @@ static int dm_test_video_bmp24_32(struct unit_test_state *uts)
+@@ -470,6 +509,7 @@ static int dm_test_video_bmp24_32(struct unit_test_state *uts)
  
  	ut_assertok(video_bmp_display(dev, dst, 0, 0, false));
  	ut_asserteq(6827, compress_frame_buffer(uts, dev));
@@ -243,7 +244,7 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
-@@ -489,6 +529,7 @@ static int dm_test_video_bmp32(struct unit_test_state *uts)
+@@ -488,6 +528,7 @@ static int dm_test_video_bmp32(struct unit_test_state *uts)
  
  	ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
  	ut_asserteq(2024, compress_frame_buffer(uts, dev));
@@ -251,7 +252,7 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
-@@ -505,6 +546,7 @@ static int dm_test_video_bmp_comp(struct unit_test_state *uts)
+@@ -504,6 +545,7 @@ static int dm_test_video_bmp_comp(struct unit_test_state *uts)
  
  	ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
  	ut_asserteq(1368, compress_frame_buffer(uts, dev));
@@ -259,7 +260,7 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
-@@ -524,6 +566,7 @@ static int dm_test_video_comp_bmp32(struct unit_test_state *uts)
+@@ -523,6 +565,7 @@ static int dm_test_video_comp_bmp32(struct unit_test_state *uts)
  
  	ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
  	ut_asserteq(2024, compress_frame_buffer(uts, dev));
@@ -267,7 +268,7 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
-@@ -543,6 +586,7 @@ static int dm_test_video_comp_bmp8(struct unit_test_state *uts)
+@@ -542,6 +585,7 @@ static int dm_test_video_comp_bmp8(struct unit_test_state *uts)
  
  	ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
  	ut_asserteq(1247, compress_frame_buffer(uts, dev));
@@ -275,7 +276,7 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
-@@ -558,6 +602,7 @@ static int dm_test_video_truetype(struct unit_test_state *uts)
+@@ -557,6 +601,7 @@ static int dm_test_video_truetype(struct unit_test_state *uts)
  	ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
  	vidconsole_put_string(con, test_string);
  	ut_asserteq(12174, compress_frame_buffer(uts, dev));
@@ -283,7 +284,7 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
-@@ -579,6 +624,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts)
+@@ -578,6 +623,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts)
  	ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
  	vidconsole_put_string(con, test_string);
  	ut_asserteq(34287, compress_frame_buffer(uts, dev));
@@ -291,7 +292,7 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
-@@ -600,6 +646,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts)
+@@ -599,6 +645,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts)
  	ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
  	vidconsole_put_string(con, test_string);
  	ut_asserteq(29471, compress_frame_buffer(uts, dev));
@@ -299,11 +300,13 @@ index d907f681600b..641a6250100a 100644
  
  	return 0;
  }
+
+base-commit: 475aa8345a78396d39b42f96eccecd37ebe24e99
 -- 
-2.42.0
+2.45.2
 
 
-From e441c509aa784328c735c52e0a27a39601049de7 Mon Sep 17 00:00:00 2001
+From 19c878635c1271c79a017ea3a860b9a2f1a3fed9 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Sun, 20 Aug 2023 17:46:46 +0300
 Subject: [PATCH 02/13] video: test: Support checking copy frame buffer
@@ -320,16 +323,17 @@ Add a boolean argument to the existing helper function to indicate which
 frame buffer we want to inspect, and update the existing callers.
 
 Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
 Link: https://lore.kernel.org/u-boot/20230821135111.3558478-3-alpernebiyasak@gmail.com/
 ---
  test/dm/video.c | 76 ++++++++++++++++++++++++++-----------------------
  1 file changed, 41 insertions(+), 35 deletions(-)
 
 diff --git a/test/dm/video.c b/test/dm/video.c
-index 641a6250100a..b9ff3da10c18 100644
+index 14e6af5181f1..50374cafc009 100644
 --- a/test/dm/video.c
 +++ b/test/dm/video.c
-@@ -57,22 +57,28 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+@@ -56,22 +56,28 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
   *
   * @uts:	Test state
   * @dev:	Video device
@@ -360,7 +364,7 @@ index 641a6250100a..b9ff3da10c18 100644
  				       3, 0, 0);
  	free(dest);
  	if (ret)
-@@ -168,30 +174,30 @@ static int dm_test_video_text(struct unit_test_state *uts)
+@@ -167,30 +173,30 @@ static int dm_test_video_text(struct unit_test_state *uts)
  	ut_assertok(video_get_nologo(uts, &dev));
  	ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
  	ut_assertok(vidconsole_select_font(con, "8x16", 0));
@@ -397,7 +401,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	return 0;
-@@ -210,30 +216,30 @@ static int dm_test_video_text_12x22(struct unit_test_state *uts)
+@@ -209,30 +215,30 @@ static int dm_test_video_text_12x22(struct unit_test_state *uts)
  	ut_assertok(video_get_nologo(uts, &dev));
  	ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
  	ut_assertok(vidconsole_select_font(con, "12x22", 0));
@@ -434,7 +438,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	return 0;
-@@ -251,7 +257,7 @@ static int dm_test_video_chars(struct unit_test_state *uts)
+@@ -250,7 +256,7 @@ static int dm_test_video_chars(struct unit_test_state *uts)
  	ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
  	ut_assertok(vidconsole_select_font(con, "8x16", 0));
  	vidconsole_put_string(con, test_string);
@@ -443,7 +447,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	return 0;
-@@ -273,23 +279,23 @@ static int dm_test_video_ansi(struct unit_test_state *uts)
+@@ -272,23 +278,23 @@ static int dm_test_video_ansi(struct unit_test_state *uts)
  	/* reference clear: */
  	video_clear(con->parent);
  	video_sync(con->parent, false);
@@ -471,7 +475,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	return 0;
-@@ -322,13 +328,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot,
+@@ -321,13 +327,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot,
  	ut_assertok(video_get_nologo(uts, &dev));
  	ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
  	ut_assertok(vidconsole_select_font(con, "8x16", 0));
@@ -487,7 +491,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	/* Check display scrolling */
-@@ -336,13 +342,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot,
+@@ -335,13 +341,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot,
  		vidconsole_put_char(con, 'A' + i % 50);
  		vidconsole_put_char(con, '\n');
  	}
@@ -503,7 +507,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	return 0;
-@@ -417,7 +423,7 @@ static int dm_test_video_bmp(struct unit_test_state *uts)
+@@ -416,7 +422,7 @@ static int dm_test_video_bmp(struct unit_test_state *uts)
  	ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr));
  
  	ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
@@ -512,7 +516,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	return 0;
-@@ -437,7 +443,7 @@ static int dm_test_video_bmp8(struct unit_test_state *uts)
+@@ -436,7 +442,7 @@ static int dm_test_video_bmp8(struct unit_test_state *uts)
  	ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr));
  
  	ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
@@ -521,7 +525,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	return 0;
-@@ -461,7 +467,7 @@ static int dm_test_video_bmp16(struct unit_test_state *uts)
+@@ -460,7 +466,7 @@ static int dm_test_video_bmp16(struct unit_test_state *uts)
  			   &src_len));
  
  	ut_assertok(video_bmp_display(dev, dst, 0, 0, false));
@@ -530,7 +534,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	return 0;
-@@ -485,7 +491,7 @@ static int dm_test_video_bmp24(struct unit_test_state *uts)
+@@ -484,7 +490,7 @@ static int dm_test_video_bmp24(struct unit_test_state *uts)
  			   &src_len));
  
  	ut_assertok(video_bmp_display(dev, dst, 0, 0, false));
@@ -539,7 +543,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	return 0;
-@@ -509,7 +515,7 @@ static int dm_test_video_bmp24_32(struct unit_test_state *uts)
+@@ -508,7 +514,7 @@ static int dm_test_video_bmp24_32(struct unit_test_state *uts)
  			   &src_len));
  
  	ut_assertok(video_bmp_display(dev, dst, 0, 0, false));
@@ -548,7 +552,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	return 0;
-@@ -528,7 +534,7 @@ static int dm_test_video_bmp32(struct unit_test_state *uts)
+@@ -527,7 +533,7 @@ static int dm_test_video_bmp32(struct unit_test_state *uts)
  	ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr));
  
  	ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
@@ -557,7 +561,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	return 0;
-@@ -545,7 +551,7 @@ static int dm_test_video_bmp_comp(struct unit_test_state *uts)
+@@ -544,7 +550,7 @@ static int dm_test_video_bmp_comp(struct unit_test_state *uts)
  	ut_assertok(read_file(uts, "tools/logos/denx-comp.bmp", &addr));
  
  	ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
@@ -566,7 +570,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	return 0;
-@@ -565,7 +571,7 @@ static int dm_test_video_comp_bmp32(struct unit_test_state *uts)
+@@ -564,7 +570,7 @@ static int dm_test_video_comp_bmp32(struct unit_test_state *uts)
  	ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr));
  
  	ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
@@ -575,7 +579,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	return 0;
-@@ -585,7 +591,7 @@ static int dm_test_video_comp_bmp8(struct unit_test_state *uts)
+@@ -584,7 +590,7 @@ static int dm_test_video_comp_bmp8(struct unit_test_state *uts)
  	ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr));
  
  	ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
@@ -584,7 +588,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	return 0;
-@@ -601,7 +607,7 @@ static int dm_test_video_truetype(struct unit_test_state *uts)
+@@ -600,7 +606,7 @@ static int dm_test_video_truetype(struct unit_test_state *uts)
  	ut_assertok(video_get_nologo(uts, &dev));
  	ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
  	vidconsole_put_string(con, test_string);
@@ -593,7 +597,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	return 0;
-@@ -623,7 +629,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts)
+@@ -622,7 +628,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts)
  	ut_assertok(video_get_nologo(uts, &dev));
  	ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
  	vidconsole_put_string(con, test_string);
@@ -602,7 +606,7 @@ index 641a6250100a..b9ff3da10c18 100644
  	ut_assertok(check_copy_frame_buffer(uts, dev));
  
  	return 0;
-@@ -645,7 +651,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts)
+@@ -644,7 +650,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts)
  	ut_assertok(video_get_nologo(uts, &dev));
  	ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
  	vidconsole_put_string(con, test_string);
@@ -612,10 +616,10 @@ index 641a6250100a..b9ff3da10c18 100644
  
  	return 0;
 -- 
-2.42.0
+2.45.2
 
 
-From 2b431f45d217e3ab454fc719157cb8b78657a129 Mon Sep 17 00:00:00 2001
+From 173f97f38d1c6621acd9f24f8956c3a7d808cdd7 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Fri, 18 Aug 2023 17:31:27 +0300
 Subject: [PATCH 03/13] video: test: Test partial updates of hardware frame
@@ -628,16 +632,17 @@ then checking if the overwritten contents have been redrawn on the next
 sync.
 
 Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
 Link: https://lore.kernel.org/u-boot/20230821135111.3558478-4-alpernebiyasak@gmail.com/
 ---
  test/dm/video.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++++
  1 file changed, 54 insertions(+)
 
 diff --git a/test/dm/video.c b/test/dm/video.c
-index b9ff3da10c18..e4bd27a6b76f 100644
+index 50374cafc009..4798f2205a99 100644
 --- a/test/dm/video.c
 +++ b/test/dm/video.c
-@@ -657,3 +657,57 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts)
+@@ -656,3 +656,57 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts)
  	return 0;
  }
  DM_TEST(dm_test_video_truetype_bs, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
@@ -696,10 +701,10 @@ index b9ff3da10c18..e4bd27a6b76f 100644
 +}
 +DM_TEST(dm_test_video_copy, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
 -- 
-2.42.0
+2.45.2
 
 
-From 5aea7d8d14de93dcd33acc2bc19d9de942b6d8cd Mon Sep 17 00:00:00 2001
+From 11066af4f8d7a9c6b4729ce2647eb6251397423d Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:15 +0200
 Subject: [PATCH 04/13] dm: video: Add damage tracking API
@@ -717,14 +722,15 @@ Reported-by: Da Xue <da@libre.computer>
 Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Link: https://lore.kernel.org/u-boot/20230821135111.3558478-5-alpernebiyasak@gmail.com/
+Reviewed-by: Simon Glass <sjg@chromium.org>
 ---
  drivers/video/Kconfig        | 13 ++++++++++++
- drivers/video/video-uclass.c | 41 +++++++++++++++++++++++++++++++++---
- include/video.h              | 32 ++++++++++++++++++++++++++--
- 3 files changed, 81 insertions(+), 5 deletions(-)
+ drivers/video/video-uclass.c | 40 +++++++++++++++++++++++++++++++++---
+ include/video.h              | 40 ++++++++++++++++++++++++++++++++++--
+ 3 files changed, 88 insertions(+), 5 deletions(-)
 
 diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
-index 69f4809cf4a6..db531d7caae0 100644
+index 7808ae7919e0..7815b590481e 100644
 --- a/drivers/video/Kconfig
 +++ b/drivers/video/Kconfig
 @@ -92,6 +92,19 @@ config VIDEO_COPY
@@ -748,23 +754,21 @@ index 69f4809cf4a6..db531d7caae0 100644
  	bool "Generic PWM based Backlight Driver"
  	depends on BACKLIGHT && DM_PWM
 diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index f743ed74c818..9888a580bfd3 100644
+index ff1382f4a43b..75ab5f5ba9d7 100644
 --- a/drivers/video/video-uclass.c
 +++ b/drivers/video/video-uclass.c
-@@ -351,9 +351,39 @@ void video_set_default_colors(struct udevice *dev, bool invert)
+@@ -346,9 +346,38 @@ void video_set_default_colors(struct udevice *dev, bool invert)
  	priv->colour_bg = video_index_to_colour(priv, back);
  }
  
 +/* Notify about changes in the frame buffer */
++#ifdef CONFIG_VIDEO_DAMAGE
 +void video_damage(struct udevice *vid, int x, int y, int width, int height)
 +{
 +	struct video_priv *priv = dev_get_uclass_priv(vid);
 +	int xend = x + width;
 +	int yend = y + height;
 +
-+	if (!IS_ENABLED(CONFIG_VIDEO_DAMAGE))
-+		return;
-+
 +	if (x > priv->xsize)
 +		return;
 +
@@ -783,6 +787,7 @@ index f743ed74c818..9888a580bfd3 100644
 +	priv->damage.xend = max(xend, priv->damage.xend);
 +	priv->damage.yend = max(yend, priv->damage.yend);
 +}
++#endif
 +
  /* Flush video activity to the caches */
  int video_sync(struct udevice *vid, bool force)
@@ -791,7 +796,7 @@ index f743ed74c818..9888a580bfd3 100644
  	struct video_ops *ops = video_get_ops(vid);
  	int ret;
  
-@@ -369,15 +399,12 @@ int video_sync(struct udevice *vid, bool force)
+@@ -364,15 +393,12 @@ int video_sync(struct udevice *vid, bool force)
  	 * out whether it exists? For now, ARM is safe.
  	 */
  #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
@@ -807,7 +812,7 @@ index f743ed74c818..9888a580bfd3 100644
  	static ulong last_sync;
  
  	if (force || get_timer(last_sync) > 100) {
-@@ -385,6 +412,14 @@ int video_sync(struct udevice *vid, bool force)
+@@ -380,6 +406,14 @@ int video_sync(struct udevice *vid, bool force)
  		last_sync = get_timer(0);
  	}
  #endif
@@ -823,10 +828,10 @@ index f743ed74c818..9888a580bfd3 100644
  }
  
 diff --git a/include/video.h b/include/video.h
-index 16f7a83f8d50..307e954db828 100644
+index 4d8df9baaada..d2dabb66e9e6 100644
 --- a/include/video.h
 +++ b/include/video.h
-@@ -85,6 +85,11 @@ enum video_format {
+@@ -88,6 +88,11 @@ enum video_format {
   * @fb_size:	Frame buffer size
   * @copy_fb:	Copy of the frame buffer to keep up to date; see struct
   *		video_uc_plat
@@ -838,7 +843,7 @@ index 16f7a83f8d50..307e954db828 100644
   * @line_length:	Length of each frame buffer line, in bytes. This can be
   *		set by the driver, but if not, the uclass will set it after
   *		probing
-@@ -112,6 +117,12 @@ struct video_priv {
+@@ -115,6 +120,12 @@ struct video_priv {
  	void *fb;
  	int fb_size;
  	void *copy_fb;
@@ -851,7 +856,7 @@ index 16f7a83f8d50..307e954db828 100644
  	int line_length;
  	u32 colour_fg;
  	u32 colour_bg;
-@@ -254,8 +265,9 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+@@ -257,8 +268,9 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
   * @return: 0 on success, error code otherwise
   *
   * Some frame buffers are cached or have a secondary frame buffer. This
@@ -863,10 +868,11 @@ index 16f7a83f8d50..307e954db828 100644
   */
  int video_sync(struct udevice *vid, bool force);
  
-@@ -375,6 +387,22 @@ static inline int video_sync_copy_all(struct udevice *dev)
+@@ -378,6 +390,30 @@ static inline int video_sync_copy_all(struct udevice *dev)
  
  #endif
  
++#ifdef CONFIG_VIDEO_DAMAGE
 +/**
 + * video_damage() - Notify the video subsystem about screen updates.
 + *
@@ -882,15 +888,22 @@ index 16f7a83f8d50..307e954db828 100644
 + * next call to video_sync().
 + */
 +void video_damage(struct udevice *vid, int x, int y, int width, int height);
++#else
++static inline void video_damage(struct udevice *vid, int x, int y, int width,
++				int height)
++{
++	return;
++}
++#endif /* CONFIG_VIDEO_DAMAGE */
 +
  /**
   * video_is_active() - Test if one video device it active
   *
 -- 
-2.42.0
+2.45.2
 
 
-From 9d61d286be0e696a719af0c25a60d31482ee152c Mon Sep 17 00:00:00 2001
+From 5613cd630801ccb329895f62c27b8690a2cbf74c Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:16 +0200
 Subject: [PATCH 05/13] dm: video: Add damage notification on display fills
@@ -902,16 +915,17 @@ Signed-off-by: Alexander Graf <agraf@csgraf.de>
 Reported-by: Da Xue <da@libre.computer>
 [Alper: Move from video_clear() to video_fill(), video_fill_part()]
 Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
 Link: https://lore.kernel.org/u-boot/20230821135111.3558478-6-alpernebiyasak@gmail.com/
 ---
  drivers/video/video-uclass.c | 4 ++++
  1 file changed, 4 insertions(+)
 
 diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index 9888a580bfd3..09172f1f7f45 100644
+index 75ab5f5ba9d7..ca348101817a 100644
 --- a/drivers/video/video-uclass.c
 +++ b/drivers/video/video-uclass.c
-@@ -203,6 +203,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+@@ -195,6 +195,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
  	if (ret)
  		return ret;
  
@@ -920,7 +934,7 @@ index 9888a580bfd3..09172f1f7f45 100644
  	return 0;
  }
  
-@@ -249,6 +251,8 @@ int video_fill(struct udevice *dev, u32 colour)
+@@ -244,6 +246,8 @@ int video_fill(struct udevice *dev, u32 colour)
  	if (ret)
  		return ret;
  
@@ -930,10 +944,10 @@ index 9888a580bfd3..09172f1f7f45 100644
  }
  
 -- 
-2.42.0
+2.45.2
 
 
-From 599159f0d1678a473211a2beda302d12ac64bf5c Mon Sep 17 00:00:00 2001
+From 4e29f9d2190f2ea390d5321192f5e71193d62f71 Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:17 +0200
 Subject: [PATCH 06/13] vidconsole: Add damage notifications to all vidconsole
@@ -954,11 +968,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-7-alpernebiyasak@gma
  drivers/video/console_normal.c   | 18 +++++++++++
  drivers/video/console_rotate.c   | 54 ++++++++++++++++++++++++++++++++
  drivers/video/console_truetype.c | 21 +++++++++++++
- drivers/video/video-uclass.c     |  1 +
- 4 files changed, 94 insertions(+)
+ 3 files changed, 93 insertions(+)
 
 diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c
-index 413c7abee9e1..a19ce6a2bc11 100644
+index 6f4194a18147..51ac8cc78e9d 100644
 --- a/drivers/video/console_normal.c
 +++ b/drivers/video/console_normal.c
 @@ -39,6 +39,12 @@ static int console_set_row(struct udevice *dev, uint row, int clr)
@@ -987,7 +1000,7 @@ index 413c7abee9e1..a19ce6a2bc11 100644
  	return 0;
  }
  
-@@ -90,6 +102,12 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, char ch)
+@@ -91,6 +103,12 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, int cp)
  	if (ret)
  		return ret;
  
@@ -1001,7 +1014,7 @@ index 413c7abee9e1..a19ce6a2bc11 100644
  	if (ret)
  		return ret;
 diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c
-index 65358a1c6e74..6c3e7c1bb8dc 100644
+index dc9698362741..5c4a98f6cad0 100644
 --- a/drivers/video/console_rotate.c
 +++ b/drivers/video/console_rotate.c
 @@ -36,6 +36,12 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr)
@@ -1030,7 +1043,7 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644
  	return 0;
  }
  
-@@ -96,6 +108,12 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, char ch)
+@@ -97,6 +109,12 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, int cp)
  	if (ret)
  		return ret;
  
@@ -1043,7 +1056,7 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644
  	return VID_TO_POS(fontdata->width);
  }
  
-@@ -121,6 +139,12 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
+@@ -122,6 +140,12 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
  	if (ret)
  		return ret;
  
@@ -1056,7 +1069,7 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644
  	return 0;
  }
  
-@@ -142,6 +166,12 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc,
+@@ -143,6 +167,12 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc,
  	vidconsole_memmove(dev, dst, src,
  			   fontdata->height * vid_priv->line_length * count);
  
@@ -1069,7 +1082,7 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644
  	return 0;
  }
  
-@@ -174,6 +204,12 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, char ch)
+@@ -176,6 +206,12 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp)
  	if (ret)
  		return ret;
  
@@ -1082,7 +1095,7 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644
  	return VID_TO_POS(fontdata->width);
  }
  
-@@ -198,6 +234,12 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
+@@ -200,6 +236,12 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
  	if (ret)
  		return ret;
  
@@ -1095,7 +1108,7 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644
  	return 0;
  }
  
-@@ -224,6 +266,12 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc,
+@@ -226,6 +268,12 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc,
  		dst += vid_priv->line_length;
  	}
  
@@ -1108,7 +1121,7 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644
  	return 0;
  }
  
-@@ -255,6 +303,12 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, char ch)
+@@ -258,6 +306,12 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp)
  	if (ret)
  		return ret;
  
@@ -1122,10 +1135,10 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644
  }
  
 diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c
-index 0f9bb49e44f7..0adbf9cc3d67 100644
+index c435162d3f94..6a17f732fc26 100644
 --- a/drivers/video/console_truetype.c
 +++ b/drivers/video/console_truetype.c
-@@ -178,6 +178,7 @@ struct console_tt_priv {
+@@ -190,6 +190,7 @@ struct console_tt_store {
  static int console_truetype_set_row(struct udevice *dev, uint row, int clr)
  {
  	struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent);
@@ -1133,7 +1146,7 @@ index 0f9bb49e44f7..0adbf9cc3d67 100644
  	struct console_tt_priv *priv = dev_get_priv(dev);
  	struct console_tt_metrics *met = priv->cur_met;
  	void *end, *line;
-@@ -221,6 +222,12 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr)
+@@ -233,6 +234,12 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr)
  	if (ret)
  		return ret;
  
@@ -1146,7 +1159,7 @@ index 0f9bb49e44f7..0adbf9cc3d67 100644
  	return 0;
  }
  
-@@ -228,6 +235,7 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst,
+@@ -240,6 +247,7 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst,
  				     uint rowsrc, uint count)
  {
  	struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent);
@@ -1154,7 +1167,7 @@ index 0f9bb49e44f7..0adbf9cc3d67 100644
  	struct console_tt_priv *priv = dev_get_priv(dev);
  	struct console_tt_metrics *met = priv->cur_met;
  	void *dst;
-@@ -246,6 +254,12 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst,
+@@ -258,6 +266,12 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst,
  	for (i = 0; i < priv->pos_ptr; i++)
  		priv->pos[i].ypos -= diff;
  
@@ -1167,7 +1180,7 @@ index 0f9bb49e44f7..0adbf9cc3d67 100644
  	return 0;
  }
  
-@@ -403,6 +417,13 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y,
+@@ -418,6 +432,13 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y,
  
  		line += vid_priv->line_length;
  	}
@@ -1181,23 +1194,11 @@ index 0f9bb49e44f7..0adbf9cc3d67 100644
  	ret = vidconsole_sync_copy(dev, start, line);
  	if (ret)
  		return ret;
-diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index 09172f1f7f45..06e344f415ce 100644
---- a/drivers/video/video-uclass.c
-+++ b/drivers/video/video-uclass.c
-@@ -199,6 +199,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
- 		}
- 		line += priv->line_length;
- 	}
-+
- 	ret = video_sync_copy(dev, start, line);
- 	if (ret)
- 		return ret;
 -- 
-2.42.0
+2.45.2
 
 
-From 4946d75efb4a6b4ff1c2ec306cb7509e98c24c17 Mon Sep 17 00:00:00 2001
+From 11fa5d7c68878f629c8fff7dc28a76acaf1252ab Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Fri, 18 Aug 2023 17:55:08 +0300
 Subject: [PATCH 07/13] video: test: Test video damage tracking via vidconsole
@@ -1208,6 +1209,7 @@ the config in sandbox and add a test for it, by printing strings at a
 few locations and checking the tracked region.
 
 Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
 Link: https://lore.kernel.org/u-boot/20230821135111.3558478-8-alpernebiyasak@gmail.com/
 ---
  configs/sandbox_defconfig |  1 +
@@ -1215,10 +1217,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-8-alpernebiyasak@gma
  2 files changed, 57 insertions(+)
 
 diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
-index 62bc182ca161..d26659ff0a0b 100644
+index da8c1976d7bd..6bc20ec34169 100644
 --- a/configs/sandbox_defconfig
 +++ b/configs/sandbox_defconfig
-@@ -307,6 +307,7 @@ CONFIG_USB_ETH_CDC=y
+@@ -319,6 +319,7 @@ CONFIG_USB_ETH_CDC=y
  CONFIG_VIDEO=y
  CONFIG_VIDEO_FONT_SUN12X22=y
  CONFIG_VIDEO_COPY=y
@@ -1227,10 +1229,10 @@ index 62bc182ca161..d26659ff0a0b 100644
  CONFIG_CONSOLE_TRUETYPE=y
  CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
 diff --git a/test/dm/video.c b/test/dm/video.c
-index e4bd27a6b76f..8c7d9800a42e 100644
+index 4798f2205a99..119c43153165 100644
 --- a/test/dm/video.c
 +++ b/test/dm/video.c
-@@ -711,3 +711,59 @@ static int dm_test_video_copy(struct unit_test_state *uts)
+@@ -710,3 +710,59 @@ static int dm_test_video_copy(struct unit_test_state *uts)
  	return 0;
  }
  DM_TEST(dm_test_video_copy, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
@@ -1291,10 +1293,10 @@ index e4bd27a6b76f..8c7d9800a42e 100644
 +}
 +DM_TEST(dm_test_video_damage, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
 -- 
-2.42.0
+2.45.2
 
 
-From a8073a8ba8a35600302ad6430977c766869f1605 Mon Sep 17 00:00:00 2001
+From 80a32fe8f34466e6b86553018f47192a1fef3c6a Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:18 +0200
 Subject: [PATCH 08/13] video: Add damage notification on bmp display
@@ -1311,10 +1313,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-9-alpernebiyasak@gma
  1 file changed, 2 insertions(+)
 
 diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c
-index 45f003c8251a..10943b9ca19f 100644
+index ad512d99a1b9..78de95607924 100644
 --- a/drivers/video/video_bmp.c
 +++ b/drivers/video/video_bmp.c
-@@ -460,6 +460,8 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y,
+@@ -459,6 +459,8 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y,
  		break;
  	};
  
@@ -1324,10 +1326,10 @@ index 45f003c8251a..10943b9ca19f 100644
  	fb = (uchar *)(priv->fb + y * priv->line_length + x * bpix / 8);
  	ret = video_sync_copy(dev, start, fb);
 -- 
-2.42.0
+2.45.2
 
 
-From 210faf6dd92d4d7647cec88aa5affddf74c35fcb Mon Sep 17 00:00:00 2001
+From 7afe761e51bfb0f24fd4547e8bec1826aaf2e6a0 Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:19 +0200
 Subject: [PATCH 09/13] efi_loader: GOP: Add damage notification on BLT
@@ -1340,13 +1342,14 @@ Reported-by: Da Xue <da@libre.computer>
 Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
 [Alper: Add struct comment for new member]
 Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
 Link: https://lore.kernel.org/u-boot/20230821135111.3558478-10-alpernebiyasak@gmail.com/
 ---
  lib/efi_loader/efi_gop.c | 7 +++++++
  1 file changed, 7 insertions(+)
 
 diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c
-index 778b693f983a..db6535e080c4 100644
+index 41e12fa72460..1694e23dcc62 100644
 --- a/lib/efi_loader/efi_gop.c
 +++ b/lib/efi_loader/efi_gop.c
 @@ -24,6 +24,7 @@ static const efi_guid_t efi_gop_guid = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID;
@@ -1383,19 +1386,19 @@ index 778b693f983a..db6535e080c4 100644
  	return EFI_SUCCESS;
  }
  
-@@ -548,6 +554,7 @@ efi_status_t efi_gop_register(void)
+@@ -549,6 +555,7 @@ efi_status_t efi_gop_register(void)
  	gopobj->info.pixels_per_scanline = col;
  	gopobj->bpix = bpix;
- 	gopobj->fb = fb;
+ 	gopobj->fb = map_sysmem(fb_base, fb_size);
 +	gopobj->vdev = vdev;
  
  	return EFI_SUCCESS;
  }
 -- 
-2.42.0
+2.45.2
 
 
-From 95c2109f13e9457961745193cae222523366d810 Mon Sep 17 00:00:00 2001
+From 134415d6cbe38f7ab630f978a602b6e15929feea Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:20 +0200
 Subject: [PATCH 10/13] video: Only dcache flush damaged lines
@@ -1412,29 +1415,29 @@ Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Link: https://lore.kernel.org/u-boot/20230821135111.3558478-11-alpernebiyasak@gmail.com/
 ---
- drivers/video/video-uclass.c | 41 +++++++++++++++++++++++++++++++-----
- 1 file changed, 36 insertions(+), 5 deletions(-)
+ drivers/video/video-uclass.c | 43 +++++++++++++++++++++++++++++++-----
+ 1 file changed, 38 insertions(+), 5 deletions(-)
 
 diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index 06e344f415ce..ac2141892bf7 100644
+index ca348101817a..add7a85b20fe 100644
 --- a/drivers/video/video-uclass.c
 +++ b/drivers/video/video-uclass.c
-@@ -385,6 +385,41 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height)
- 	priv->damage.yend = max(yend, priv->damage.yend);
+@@ -378,6 +378,40 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height)
  }
+ #endif
  
 +#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
-+static void video_flush_dcache(struct udevice *vid)
++static void video_flush_dcache(struct udevice *vid, bool use_copy)
 +{
 +	struct video_priv *priv = dev_get_uclass_priv(vid);
++	ulong fb = use_copy ? (ulong)priv->copy_fb : (ulong)priv->fb;
 +
 +	if (!priv->flush_dcache)
 +		return;
 +
 +	if (!IS_ENABLED(CONFIG_VIDEO_DAMAGE)) {
-+		flush_dcache_range((ulong)priv->fb,
-+				   ALIGN((ulong)priv->fb + priv->fb_size,
-+					 CONFIG_SYS_CACHELINE_SIZE));
++		flush_dcache_range(fb, ALIGN(fb + priv->fb_size,
++					     CONFIG_SYS_CACHELINE_SIZE));
 +
 +		return;
 +	}
@@ -1445,7 +1448,6 @@ index 06e344f415ce..ac2141892bf7 100644
 +		int y;
 +
 +		for (y = priv->damage.ystart; y < priv->damage.yend; y++) {
-+			ulong fb = (ulong)priv->fb;
 +			ulong start = fb + (y * priv->line_length) + lstart;
 +			ulong end = start + lend - lstart;
 +
@@ -1461,7 +1463,7 @@ index 06e344f415ce..ac2141892bf7 100644
  /* Flush video activity to the caches */
  int video_sync(struct udevice *vid, bool force)
  {
-@@ -404,11 +439,7 @@ int video_sync(struct udevice *vid, bool force)
+@@ -397,11 +431,10 @@ int video_sync(struct udevice *vid, bool force)
  	 * out whether it exists? For now, ARM is safe.
  	 */
  #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
@@ -1470,15 +1472,18 @@ index 06e344f415ce..ac2141892bf7 100644
 -				   ALIGN((ulong)priv->fb + priv->fb_size,
 -					 CONFIG_SYS_CACHELINE_SIZE));
 -	}
-+	video_flush_dcache(vid);
++	video_flush_dcache(vid, false);
++
++	if (IS_ENABLED(CONFIG_VIDEO_COPY))
++		video_flush_dcache(vid, true);
  #elif defined(CONFIG_VIDEO_SANDBOX_SDL)
  	static ulong last_sync;
  
 -- 
-2.42.0
+2.45.2
 
 
-From d4c117c2455f2df8fa224ec603f2749219c72243 Mon Sep 17 00:00:00 2001
+From d3f1653a87d51c5ecf187b19ecb60a2f740fb8e2 Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:21 +0200
 Subject: [PATCH 11/13] video: Use VIDEO_DAMAGE for VIDEO_COPY
@@ -1511,20 +1516,20 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-12-alpernebiyasak@gm
  drivers/video/Kconfig             |  5 ++
  drivers/video/console_normal.c    | 13 +----
  drivers/video/console_rotate.c    | 44 +++-----------
- drivers/video/console_truetype.c  | 16 +----
- drivers/video/vidconsole-uclass.c | 16 -----
- drivers/video/video-uclass.c      | 97 ++++++++-----------------------
+ drivers/video/console_truetype.c  | 16 +-----
+ drivers/video/vidconsole-uclass.c | 16 ------
+ drivers/video/video-uclass.c      | 96 ++++++++-----------------------
  drivers/video/video_bmp.c         |  7 ---
  include/video.h                   | 37 ------------
  include/video_console.h           | 52 -----------------
  test/dm/video.c                   |  3 +-
- 11 files changed, 43 insertions(+), 248 deletions(-)
+ 11 files changed, 43 insertions(+), 247 deletions(-)
 
 diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
-index d26659ff0a0b..62bc182ca161 100644
+index 6bc20ec34169..da8c1976d7bd 100644
 --- a/configs/sandbox_defconfig
 +++ b/configs/sandbox_defconfig
-@@ -307,7 +307,6 @@ CONFIG_USB_ETH_CDC=y
+@@ -319,7 +319,6 @@ CONFIG_USB_ETH_CDC=y
  CONFIG_VIDEO=y
  CONFIG_VIDEO_FONT_SUN12X22=y
  CONFIG_VIDEO_COPY=y
@@ -1533,7 +1538,7 @@ index d26659ff0a0b..62bc182ca161 100644
  CONFIG_CONSOLE_TRUETYPE=y
  CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
 diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
-index db531d7caae0..5f17c6be84ed 100644
+index 7815b590481e..88c6f8e68976 100644
 --- a/drivers/video/Kconfig
 +++ b/drivers/video/Kconfig
 @@ -83,11 +83,14 @@ config VIDEO_PCI_DEFAULT_FB_SIZE
@@ -1561,7 +1566,7 @@ index db531d7caae0..5f17c6be84ed 100644
  	bool "Generic PWM based Backlight Driver"
  	depends on BACKLIGHT && DM_PWM
 diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c
-index a19ce6a2bc11..c44aa09473a3 100644
+index 51ac8cc78e9d..07db613ac53c 100644
 --- a/drivers/video/console_normal.c
 +++ b/drivers/video/console_normal.c
 @@ -35,10 +35,6 @@ static int console_set_row(struct udevice *dev, uint row, int clr)
@@ -1591,7 +1596,7 @@ index a19ce6a2bc11..c44aa09473a3 100644
  
  	video_damage(dev->parent,
  		     0,
-@@ -108,10 +101,6 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, char ch)
+@@ -109,10 +102,6 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, int cp)
  		     fontdata->width,
  		     fontdata->height);
  
@@ -1603,7 +1608,7 @@ index a19ce6a2bc11..c44aa09473a3 100644
  }
  
 diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c
-index 6c3e7c1bb8dc..6e9067d1c7fb 100644
+index 5c4a98f6cad0..9f8e1b92770c 100644
 --- a/drivers/video/console_rotate.c
 +++ b/drivers/video/console_rotate.c
 @@ -21,7 +21,6 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr)
@@ -1645,7 +1650,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
  		src += vid_priv->line_length;
  		dst += vid_priv->line_length;
  	}
-@@ -104,10 +97,6 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, char ch)
+@@ -105,10 +98,6 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, int cp)
  		return ret;
  
  	/* We draw backwards from 'start, so account for the first line */
@@ -1656,7 +1661,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
  	video_damage(dev->parent,
  		     vid_priv->xsize - y - fontdata->height,
  		     linenum - 1,
-@@ -125,7 +114,7 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
+@@ -126,7 +115,7 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
  	struct video_fontdata *fontdata = priv->fontdata;
  	void *start, *line, *dst, *end;
  	int pixels = fontdata->height * vid_priv->xsize;
@@ -1665,7 +1670,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
  	int pbytes = VNBYTES(vid_priv->bpix);
  
  	start = vid_priv->fb + vid_priv->ysize * vid_priv->line_length -
-@@ -135,9 +124,6 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
+@@ -136,9 +125,6 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
  	for (i = 0; i < pixels; i++)
  		fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes);
  	end = dst;
@@ -1675,7 +1680,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
  
  	video_damage(dev->parent,
  		     0,
-@@ -163,8 +149,7 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc,
+@@ -164,8 +150,7 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc,
  		vid_priv->line_length;
  	src = end - (rowsrc + count) * fontdata->height *
  		vid_priv->line_length;
@@ -1685,7 +1690,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
  
  	video_damage(dev->parent,
  		     0,
-@@ -199,11 +184,6 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, char ch)
+@@ -201,11 +186,6 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp)
  	if (ret)
  		return ret;
  
@@ -1697,7 +1702,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
  	video_damage(dev->parent,
  		     x - fontdata->width + 1,
  		     linenum - fontdata->height + 1,
-@@ -220,7 +200,7 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
+@@ -222,7 +202,7 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
  	struct video_fontdata *fontdata = priv->fontdata;
  	int pbytes = VNBYTES(vid_priv->bpix);
  	void *start, *dst, *line;
@@ -1706,7 +1711,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
  
  	start = vid_priv->fb + row * fontdata->height * pbytes;
  	line = start;
-@@ -230,9 +210,6 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
+@@ -232,9 +212,6 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
  			fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes);
  		line += vid_priv->line_length;
  	}
@@ -1716,7 +1721,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
  
  	video_damage(dev->parent,
  		     row * fontdata->height,
-@@ -252,16 +229,13 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc,
+@@ -254,16 +231,13 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc,
  	int pbytes = VNBYTES(vid_priv->bpix);
  	void *dst;
  	void *src;
@@ -1735,7 +1740,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
  		src += vid_priv->line_length;
  		dst += vid_priv->line_length;
  	}
-@@ -296,10 +270,6 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, char ch)
+@@ -299,10 +273,6 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp)
  	line = start;
  
  	ret = fill_char_horizontally(pfont, &line, vid_priv, fontdata, NORMAL_DIRECTION);
@@ -1747,10 +1752,10 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
  		return ret;
  
 diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c
-index 0adbf9cc3d67..07bb0af71311 100644
+index 6a17f732fc26..58dcd8e050c3 100644
 --- a/drivers/video/console_truetype.c
 +++ b/drivers/video/console_truetype.c
-@@ -182,7 +182,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr)
+@@ -194,7 +194,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr)
  	struct console_tt_priv *priv = dev_get_priv(dev);
  	struct console_tt_metrics *met = priv->cur_met;
  	void *end, *line;
@@ -1758,7 +1763,7 @@ index 0adbf9cc3d67..07bb0af71311 100644
  
  	line = vid_priv->fb + row * met->font_size * vid_priv->line_length;
  	end = line + met->font_size * vid_priv->line_length;
-@@ -218,9 +217,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr)
+@@ -230,9 +229,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr)
  	default:
  		return -ENOSYS;
  	}
@@ -1768,7 +1773,7 @@ index 0adbf9cc3d67..07bb0af71311 100644
  
  	video_damage(dev->parent,
  		     0,
-@@ -240,14 +236,11 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst,
+@@ -252,14 +248,11 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst,
  	struct console_tt_metrics *met = priv->cur_met;
  	void *dst;
  	void *src;
@@ -1785,7 +1790,7 @@ index 0adbf9cc3d67..07bb0af71311 100644
  
  	/* Scroll up our position history */
  	diff = (rowsrc - rowdst) * met->font_size;
-@@ -280,7 +273,7 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y,
+@@ -292,7 +285,7 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y,
  	u8 *bits, *data;
  	int advance;
  	void *start, *end, *line;
@@ -1793,8 +1798,8 @@ index 0adbf9cc3d67..07bb0af71311 100644
 +	int row;
  
  	/* First get some basic metrics about this character */
- 	stbtt_GetCodepointHMetrics(font, ch, &advance, &lsb);
-@@ -424,9 +417,6 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y,
+ 	stbtt_GetCodepointHMetrics(font, cp, &advance, &lsb);
+@@ -439,9 +432,6 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y,
  		     width,
  		     height);
  
@@ -1805,10 +1810,10 @@ index 0adbf9cc3d67..07bb0af71311 100644
  
  	return width_frac;
 diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c
-index a4029a58660b..f0db412146a8 100644
+index 80e7adf6a1a4..6dc5162804aa 100644
 --- a/drivers/video/vidconsole-uclass.c
 +++ b/drivers/video/vidconsole-uclass.c
-@@ -728,22 +728,6 @@ UCLASS_DRIVER(vidconsole) = {
+@@ -759,22 +759,6 @@ UCLASS_DRIVER(vidconsole) = {
  	.per_device_auto	= sizeof(struct vidconsole_priv),
  };
  
@@ -1832,10 +1837,10 @@ index a4029a58660b..f0db412146a8 100644
  {
  	int ret;
 diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index ac2141892bf7..afbd4670240b 100644
+index add7a85b20fe..3b9b9fad0975 100644
 --- a/drivers/video/video-uclass.c
 +++ b/drivers/video/video-uclass.c
-@@ -160,7 +160,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+@@ -152,7 +152,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
  	struct video_priv *priv = dev_get_uclass_priv(dev);
  	void *start, *line;
  	int pixels = xend - xstart;
@@ -1844,18 +1849,17 @@ index ac2141892bf7..afbd4670240b 100644
  
  	start = priv->fb + ystart * priv->line_length;
  	start += xstart * VNBYTES(priv->bpix);
-@@ -200,10 +200,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+@@ -191,9 +191,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+ 		}
  		line += priv->line_length;
  	}
- 
 -	ret = video_sync_copy(dev, start, line);
 -	if (ret)
 -		return ret;
--
+ 
  	video_damage(dev, xstart, ystart, xend - xstart, yend - ystart);
  
- 	return 0;
-@@ -223,7 +219,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho)
+@@ -217,7 +214,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho)
  int video_fill(struct udevice *dev, u32 colour)
  {
  	struct video_priv *priv = dev_get_uclass_priv(dev);
@@ -1863,7 +1867,7 @@ index ac2141892bf7..afbd4670240b 100644
  
  	switch (priv->bpix) {
  	case VIDEO_BPP16:
-@@ -248,9 +243,6 @@ int video_fill(struct udevice *dev, u32 colour)
+@@ -242,9 +238,6 @@ int video_fill(struct udevice *dev, u32 colour)
  		memset(priv->fb, colour, priv->fb_size);
  		break;
  	}
@@ -1873,7 +1877,7 @@ index ac2141892bf7..afbd4670240b 100644
  
  	video_damage(dev, 0, 0, priv->xsize, priv->ysize);
  
-@@ -420,6 +412,27 @@ static void video_flush_dcache(struct udevice *vid)
+@@ -412,6 +405,27 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy)
  }
  #endif
  
@@ -1901,7 +1905,7 @@ index ac2141892bf7..afbd4670240b 100644
  /* Flush video activity to the caches */
  int video_sync(struct udevice *vid, bool force)
  {
-@@ -427,6 +440,9 @@ int video_sync(struct udevice *vid, bool force)
+@@ -419,6 +433,9 @@ int video_sync(struct udevice *vid, bool force)
  	struct video_ops *ops = video_get_ops(vid);
  	int ret;
  
@@ -1911,7 +1915,7 @@ index ac2141892bf7..afbd4670240b 100644
  	if (ops && ops->video_sync) {
  		ret = ops->video_sync(vid);
  		if (ret)
-@@ -503,69 +519,6 @@ int video_get_ysize(struct udevice *dev)
+@@ -502,69 +519,6 @@ int video_get_ysize(struct udevice *dev)
  	return priv->ysize;
  }
  
@@ -1982,10 +1986,10 @@ index ac2141892bf7..afbd4670240b 100644
  	extern u8 __splash_ ## _name ## _begin[]; \
  	extern u8 __splash_ ## _name ## _end[]
 diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c
-index 10943b9ca19f..da2bbe864a03 100644
+index 78de95607924..1f267d45812c 100644
 --- a/drivers/video/video_bmp.c
 +++ b/drivers/video/video_bmp.c
-@@ -268,7 +268,6 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y,
+@@ -267,7 +267,6 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y,
  	enum video_format eformat;
  	struct bmp_color_table_entry *palette;
  	int hdr_size;
@@ -1993,7 +1997,7 @@ index 10943b9ca19f..da2bbe864a03 100644
  
  	if (!bmp || !(bmp->header.signature[0] == 'B' &&
  	    bmp->header.signature[1] == 'M')) {
-@@ -462,11 +461,5 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y,
+@@ -461,11 +460,5 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y,
  
  	video_damage(dev, x, y, width, height);
  
@@ -2006,10 +2010,10 @@ index 10943b9ca19f..da2bbe864a03 100644
  	return video_sync(dev, false);
  }
 diff --git a/include/video.h b/include/video.h
-index 307e954db828..3f072b4d6b89 100644
+index d2dabb66e9e6..44557457bf80 100644
 --- a/include/video.h
 +++ b/include/video.h
-@@ -350,43 +350,6 @@ void video_set_default_colors(struct udevice *dev, bool invert);
+@@ -353,43 +353,6 @@ void video_set_default_colors(struct udevice *dev, bool invert);
   */
  int video_default_font_height(struct udevice *dev);
  
@@ -2050,14 +2054,14 @@ index 307e954db828..3f072b4d6b89 100644
 -
 -#endif
 -
+ #ifdef CONFIG_VIDEO_DAMAGE
  /**
   * video_damage() - Notify the video subsystem about screen updates.
-  *
 diff --git a/include/video_console.h b/include/video_console.h
-index dbfb389f324f..4b4d2e621b30 100644
+index 8b5928dc5ebb..8806d10f946d 100644
 --- a/include/video_console.h
 +++ b/include/video_console.h
-@@ -406,58 +406,6 @@ void vidconsole_list_fonts(struct udevice *dev);
+@@ -529,56 +529,4 @@ void vidconsole_list_fonts(struct udevice *dev);
   */
  int vidconsole_get_font_size(struct udevice *dev, const char **name, uint *sizep);
  
@@ -2113,14 +2117,12 @@ index dbfb389f324f..4b4d2e621b30 100644
 -
 -#endif
 -
- /*
-  * Convert an UTF-8 byte into the corresponding character in the CP437
-  * code page. Returns 0 if that character is part of a multi-byte sequence.
+ #endif
 diff --git a/test/dm/video.c b/test/dm/video.c
-index 8c7d9800a42e..4c3bcd26e94f 100644
+index 119c43153165..9b7bb51a3dd9 100644
 --- a/test/dm/video.c
 +++ b/test/dm/video.c
-@@ -106,6 +106,7 @@ static int check_copy_frame_buffer(struct unit_test_state *uts,
+@@ -105,6 +105,7 @@ static int check_copy_frame_buffer(struct unit_test_state *uts,
  	if (!IS_ENABLED(CONFIG_VIDEO_COPY))
  		return 0;
  
@@ -2128,7 +2130,7 @@ index 8c7d9800a42e..4c3bcd26e94f 100644
  	ut_assertf(!memcmp(priv->fb, priv->copy_fb, priv->fb_size),
  		   "Copy framebuffer does not match fb");
  
-@@ -706,7 +707,7 @@ static int dm_test_video_copy(struct unit_test_state *uts)
+@@ -705,7 +706,7 @@ static int dm_test_video_copy(struct unit_test_state *uts)
  	vidconsole_put_string(con, test_string);
  	vidconsole_put_string(con, test_string);
  	ut_asserteq(7589, compress_frame_buffer(uts, dev, false));
@@ -2138,10 +2140,10 @@ index 8c7d9800a42e..4c3bcd26e94f 100644
  	return 0;
  }
 -- 
-2.42.0
+2.45.2
 
 
-From cf7e5c9411fbe82487191e162bafcf178eaeaf5e Mon Sep 17 00:00:00 2001
+From d0b64a4e493b665d7abafc185d88f533ebc27f2f Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Tue, 3 Jan 2023 22:50:03 +0100
 Subject: [PATCH 12/13] video: Always compile cache flushing code
@@ -2162,21 +2164,16 @@ Signed-off-by: Alexander Graf <agraf@csgraf.de>
 Reviewed-by: Simon Glass <sjg@chromium.org>
 Link: https://lore.kernel.org/u-boot/20230821135111.3558478-13-alpernebiyasak@gmail.com/
 ---
- drivers/video/video-uclass.c | 14 +++++---------
- 1 file changed, 5 insertions(+), 9 deletions(-)
+ drivers/video/video-uclass.c | 12 +++++-------
+ 1 file changed, 5 insertions(+), 7 deletions(-)
 
 diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index afbd4670240b..2c7777261ad1 100644
+index 3b9b9fad0975..f050ed1f67cb 100644
 --- a/drivers/video/video-uclass.c
 +++ b/drivers/video/video-uclass.c
-@@ -377,11 +377,13 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height)
- 	priv->damage.yend = max(yend, priv->damage.yend);
- }
- 
--#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
- static void video_flush_dcache(struct udevice *vid)
- {
+@@ -377,6 +377,9 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy)
  	struct video_priv *priv = dev_get_uclass_priv(vid);
+ 	ulong fb = use_copy ? (ulong)priv->copy_fb : (ulong)priv->fb;
  
 +	if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
 +		return;
@@ -2184,15 +2181,7 @@ index afbd4670240b..2c7777261ad1 100644
  	if (!priv->flush_dcache)
  		return;
  
-@@ -410,7 +412,6 @@ static void video_flush_dcache(struct udevice *vid)
- 		}
- 	}
- }
--#endif
- 
- static void video_flush_copy(struct udevice *vid)
- {
-@@ -449,14 +450,9 @@ int video_sync(struct udevice *vid, bool force)
+@@ -442,17 +445,12 @@ int video_sync(struct udevice *vid, bool force)
  			return ret;
  	}
  
@@ -2202,7 +2191,10 @@ index afbd4670240b..2c7777261ad1 100644
 -	 * out whether it exists? For now, ARM is safe.
 -	 */
 -#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
- 	video_flush_dcache(vid);
+ 	video_flush_dcache(vid, false);
+ 
+ 	if (IS_ENABLED(CONFIG_VIDEO_COPY))
+ 		video_flush_dcache(vid, true);
 -#elif defined(CONFIG_VIDEO_SANDBOX_SDL)
 +
 +#if defined(CONFIG_VIDEO_SANDBOX_SDL)
@@ -2210,10 +2202,10 @@ index afbd4670240b..2c7777261ad1 100644
  
  	if (force || get_timer(last_sync) > 100) {
 -- 
-2.42.0
+2.45.2
 
 
-From 2ada48e20ae7fb1ce66d63c6f549887c38b058d4 Mon Sep 17 00:00:00 2001
+From e6b053a9d59d0b4ea0936edee5be2fadf0b8efc2 Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Tue, 3 Jan 2023 22:50:04 +0100
 Subject: [PATCH 13/13] video: Enable VIDEO_DAMAGE for drivers that need it
@@ -2230,6 +2222,7 @@ Signed-off-by: Alexander Graf <agraf@csgraf.de>
 [Alper: Add to VIDEO_TIDSS, imply instead of select]
 Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
 Link: https://lore.kernel.org/u-boot/20230821135111.3558478-14-alpernebiyasak@gmail.com/
 ---
  arch/arm/mach-sunxi/Kconfig    | 1 +
@@ -2244,11 +2237,11 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-14-alpernebiyasak@gm
  9 files changed, 16 insertions(+)
 
 diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
-index e20c3a3ee926..6bd813b68c9c 100644
+index ddf9414b08e7..3c9745065bab 100644
 --- a/arch/arm/mach-sunxi/Kconfig
 +++ b/arch/arm/mach-sunxi/Kconfig
-@@ -813,6 +813,7 @@ config VIDEO_SUNXI
- 	depends on !SUN50I_GEN_H6
+@@ -863,6 +863,7 @@ config VIDEO_SUNXI
+ 	depends on !SUNXI_GEN_NCAT2
  	select VIDEO
  	select DISPLAY
 +	imply VIDEO_DAMAGE
@@ -2256,7 +2249,7 @@ index e20c3a3ee926..6bd813b68c9c 100644
  	default y
  	---help---
 diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
-index 5f17c6be84ed..546df93f51a9 100644
+index 88c6f8e68976..06d3ed8a736e 100644
 --- a/drivers/video/Kconfig
 +++ b/drivers/video/Kconfig
 @@ -499,6 +499,7 @@ config VIDEO_LCD_ANX9804
@@ -2275,7 +2268,7 @@ index 5f17c6be84ed..546df93f51a9 100644
  	help
  	  The graphics processor already sets up the display so this driver
  	  simply checks the resolution and then sets up the frame buffer with
-@@ -654,6 +656,7 @@ source "drivers/video/meson/Kconfig"
+@@ -671,6 +673,7 @@ source "drivers/video/meson/Kconfig"
  
  config VIDEO_MVEBU
  	bool "Armada XP LCD controller"
@@ -2283,7 +2276,7 @@ index 5f17c6be84ed..546df93f51a9 100644
  	---help---
  	Support for the LCD controller integrated in the Marvell
  	Armada XP SoC.
-@@ -688,6 +691,7 @@ config NXP_TDA19988
+@@ -705,6 +708,7 @@ config NXP_TDA19988
  
  config ATMEL_HLCD
  	bool "Enable ATMEL video support using HLCDC"
@@ -2291,7 +2284,7 @@ index 5f17c6be84ed..546df93f51a9 100644
  	help
  	   HLCDC supports video output to an attached LCD panel.
  
-@@ -764,6 +768,7 @@ source "drivers/video/tidss/Kconfig"
+@@ -781,6 +785,7 @@ source "drivers/video/tidss/Kconfig"
  
  config VIDEO_TEGRA124
  	bool "Enable video support on Tegra124"
@@ -2299,7 +2292,7 @@ index 5f17c6be84ed..546df93f51a9 100644
  	help
  	   Tegra124 supports many video output options including eDP and
  	   HDMI. At present only eDP is supported by U-Boot. This option
-@@ -778,6 +783,7 @@ source "drivers/video/imx/Kconfig"
+@@ -795,6 +800,7 @@ source "drivers/video/imx/Kconfig"
  
  config VIDEO_MXS
  	bool "Enable video support on i.MX28/i.MX6UL/i.MX7 SoCs"
@@ -2307,7 +2300,7 @@ index 5f17c6be84ed..546df93f51a9 100644
  	help
  	  Enable framebuffer driver for i.MX28/i.MX6UL/i.MX7 processors
  
-@@ -840,6 +846,7 @@ config VIDEO_DW_MIPI_DSI
+@@ -857,6 +863,7 @@ config VIDEO_DW_MIPI_DSI
  
  config VIDEO_SIMPLE
  	bool "Simple display driver for preconfigured display"
@@ -2315,7 +2308,7 @@ index 5f17c6be84ed..546df93f51a9 100644
  	help
  	  Enables a simple generic display driver which utilizes the
  	  simple-framebuffer devicetree bindings.
-@@ -858,6 +865,7 @@ config VIDEO_DT_SIMPLEFB
+@@ -875,6 +882,7 @@ config VIDEO_DT_SIMPLEFB
  
  config VIDEO_MCDE_SIMPLE
  	bool "Simple driver for ST-Ericsson MCDE with preconfigured display"
@@ -2407,5 +2400,5 @@ index 95086f3a5d66..3291b3ceb8d5 100644
  	  TIDSS supports  video output options LVDS and
  	  DPI . This option enables these supports which can be used on
 -- 
-2.42.0
+2.45.2
 
diff --git a/config/u-boot/default/patches/0004-HACK-regulator-Don-t-error-on-reentrant-regulator-ac.patch b/config/u-boot/default/patches/0004-HACK-regulator-Don-t-error-on-reentrant-regulator-ac.patch
deleted file mode 100644
index 3a66b99a..00000000
--- a/config/u-boot/default/patches/0004-HACK-regulator-Don-t-error-on-reentrant-regulator-ac.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 2ab104621dc97a89bc8f75e3b5903b83e793baf8 Mon Sep 17 00:00:00 2001
-From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Date: Sat, 19 Aug 2023 16:43:58 +0300
-Subject: [PATCH] HACK: regulator: Don't error on reentrant regulator actions
-
-Commit 4fcba5d556b42 ("regulator: implement basic reference counter")
-implements reference counting for regulator enable/disable actions, but
-does not update its callers to handle the error cases it adds. This
-breaks gru-kevin, report enabling the regulator as a success as a
-workaround. It would be better to fix the callers but that needs more
-debugging.
-
-Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
----
- drivers/power/regulator/regulator_common.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/power/regulator/regulator_common.c b/drivers/power/regulator/regulator_common.c
-index e26f5ebec347..1c2dfdf9b19d 100644
---- a/drivers/power/regulator/regulator_common.c
-+++ b/drivers/power/regulator/regulator_common.c
-@@ -75,7 +75,7 @@ int regulator_common_set_enable(const struct udevice *dev,
- 	/* If previously enabled, increase count */
- 	if (enable && plat->enable_count > 0) {
- 		plat->enable_count++;
--		return -EALREADY;
-+		return 0;
- 	}
- 
- 	if (!enable) {
-@@ -85,7 +85,7 @@ int regulator_common_set_enable(const struct udevice *dev,
- 			return -EBUSY;
- 		} else if (!plat->enable_count) {
- 			/* If already disabled, do nothing */
--			return -EALREADY;
-+			return 0;
- 		}
- 	}
- 
--- 
-2.42.0
-
diff --git a/config/u-boot/default/patches/0005-HACK-rockchip-Remove-binman-image-descriptions.patch b/config/u-boot/default/patches/0005-HACK-rockchip-Remove-binman-image-descriptions.patch
deleted file mode 100644
index ac3ada3b..00000000
--- a/config/u-boot/default/patches/0005-HACK-rockchip-Remove-binman-image-descriptions.patch
+++ /dev/null
@@ -1,307 +0,0 @@
-From b14bc4a5d8dc31294dde4ee9ce8008d763c695de Mon Sep 17 00:00:00 2001
-From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Date: Fri, 13 Oct 2023 14:06:26 +0300
-Subject: [PATCH] HACK: rockchip: Remove binman image descriptions
-
-For Rockchip boards binman tries to build SPI and MMC images that
-require an externally built BL31 file to be provided, and the build
-fails otherwise. This is not really as configurable as it should be.
-
-Some downstreams only care about build outputs for U-Boot proper. As a
-hack to make sure they can do so without building BL31, remove the
-binman image descriptions from the device-tree sources. However,
-BINMAN_FDT expects these to be present and has to be disabled as well.
-
-Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
----
- arch/arm/dts/rk3288-u-boot.dtsi     |  24 ----
- arch/arm/dts/rk3399-gru-u-boot.dtsi |   6 -
- arch/arm/dts/rk3399-u-boot.dtsi     |  25 ----
- arch/arm/dts/rockchip-u-boot.dtsi   | 186 ----------------------------
- 4 files changed, 241 deletions(-)
-
-diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
-index c4c5a2d225c4..432ab92d97c9 100644
---- a/arch/arm/dts/rk3288-u-boot.dtsi
-+++ b/arch/arm/dts/rk3288-u-boot.dtsi
-@@ -55,30 +55,6 @@ noc: syscon@ffac0000 {
- 	};
- };
- 
--#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
--&binman {
--	rom {
--		filename = "u-boot.rom";
--		size = <0x400000>;
--		pad-byte = <0xff>;
--
--		mkimage {
--			args = "-n rk3288 -T rkspi";
--			u-boot-spl {
--			};
--		};
--		u-boot-img {
--			offset = <0x20000>;
--		};
--		u-boot {
--			offset = <0x300000>;
--		};
--		fdtmap {
--		};
--	};
--};
--#endif
--
- &bus_intmem {
- 	ddr_sram: ddr-sram@1000 {
- 		compatible = "rockchip,rk3288-ddr-sram";
-diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi
-index b1604a6872c0..54296b4d7a1c 100644
---- a/arch/arm/dts/rk3399-gru-u-boot.dtsi
-+++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi
-@@ -15,12 +15,6 @@ config {
- 	};
- };
- 
--&binman {
--	rom {
--		size = <0x800000>;
--	};
--};
--
- &cros_ec {
- 	ec-interrupt = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>;
- };
-diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
-index 3423b882c437..0bf4c481b39a 100644
---- a/arch/arm/dts/rk3399-u-boot.dtsi
-+++ b/arch/arm/dts/rk3399-u-boot.dtsi
-@@ -60,31 +60,6 @@ pmusgrf: syscon@ff330000 {
- 
- };
- 
--#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
--&binman {
--	multiple-images;
--	rom {
--		filename = "u-boot.rom";
--		size = <0x400000>;
--		pad-byte = <0xff>;
--
--		mkimage {
--			args = "-n rk3399 -T rkspi";
--			u-boot-spl {
--			};
--		};
--		u-boot-img {
--			offset = <0x40000>;
--		};
--		u-boot {
--			offset = <0x300000>;
--		};
--		fdtmap {
--		};
--	};
--};
--#endif /* CONFIG_ROCKCHIP_SPI_IMAGE && CONFIG_HAS_ROM */
--
- &cru {
- 	bootph-all;
- };
-diff --git a/arch/arm/dts/rockchip-u-boot.dtsi b/arch/arm/dts/rockchip-u-boot.dtsi
-index be2658e8ef18..3d55553e4401 100644
---- a/arch/arm/dts/rockchip-u-boot.dtsi
-+++ b/arch/arm/dts/rockchip-u-boot.dtsi
-@@ -10,189 +10,3 @@ binman: binman {
- 		multiple-images;
- 	};
- };
--
--#ifdef CONFIG_SPL
--&binman {
--	simple-bin {
--		filename = "u-boot-rockchip.bin";
--		pad-byte = <0xff>;
--
--		mkimage {
--			filename = "idbloader.img";
--			args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
--			multiple-data-files;
--
--#ifdef CONFIG_ROCKCHIP_EXTERNAL_TPL
--			rockchip-tpl {
--			};
--#elif defined(CONFIG_TPL)
--			u-boot-tpl {
--			};
--#endif
--			u-boot-spl {
--			};
--		};
--
--#if defined(CONFIG_SPL_FIT) && (defined(CONFIG_ARM64) || defined(CONFIG_SPL_OPTEE_IMAGE))
--		fit: fit {
--#ifdef CONFIG_ARM64
--			description = "FIT image for U-Boot with bl31 (TF-A)";
--#else
--			description = "FIT image with OP-TEE";
--#endif
--			#address-cells = <1>;
--			fit,fdt-list = "of-list";
--			filename = "u-boot.itb";
--			fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
--			fit,align = <512>;
--			offset = <CONFIG_SPL_PAD_TO>;
--			images {
--				u-boot {
--					description = "U-Boot";
--					type = "standalone";
--					os = "U-Boot";
--#ifdef CONFIG_ARM64
--					arch = "arm64";
--#else
--					arch = "arm";
--#endif
--					compression = "none";
--					load = <CONFIG_TEXT_BASE>;
--					entry = <CONFIG_TEXT_BASE>;
--					u-boot-nodtb {
--					};
--#ifdef CONFIG_SPL_FIT_SIGNATURE
--					hash {
--						algo = "sha256";
--					};
--#endif
--				};
--
--#ifdef CONFIG_ARM64
--				@atf-SEQ {
--					fit,operation = "split-elf";
--					description = "ARM Trusted Firmware";
--					type = "firmware";
--					arch = "arm64";
--					os = "arm-trusted-firmware";
--					compression = "none";
--					fit,load;
--					fit,entry;
--					fit,data;
--
--					atf-bl31 {
--					};
--#ifdef CONFIG_SPL_FIT_SIGNATURE
--					hash {
--						algo = "sha256";
--					};
--#endif
--				};
--				@tee-SEQ {
--					fit,operation = "split-elf";
--					description = "TEE";
--					type = "tee";
--					arch = "arm64";
--					os = "tee";
--					compression = "none";
--					fit,load;
--					fit,entry;
--					fit,data;
--
--					tee-os {
--						optional;
--					};
--#ifdef CONFIG_SPL_FIT_SIGNATURE
--					hash {
--						algo = "sha256";
--					};
--#endif
--				};
--#else
--				op-tee {
--					description = "OP-TEE";
--					type = "tee";
--					arch = "arm";
--					os = "tee";
--					compression = "none";
--					load = <(CFG_SYS_SDRAM_BASE + 0x8400000)>;
--					entry = <(CFG_SYS_SDRAM_BASE + 0x8400000)>;
--
--					tee-os {
--					};
--#ifdef CONFIG_SPL_FIT_SIGNATURE
--					hash {
--						algo = "sha256";
--					};
--#endif
--				};
--#endif
--
--				@fdt-SEQ {
--					description = "fdt-NAME";
--					compression = "none";
--					type = "flat_dt";
--#ifdef CONFIG_SPL_FIT_SIGNATURE
--					hash {
--						algo = "sha256";
--					};
--#endif
--				};
--			};
--
--			configurations {
--				default = "@config-DEFAULT-SEQ";
--				@config-SEQ {
--					description = "NAME.dtb";
--					fdt = "fdt-SEQ";
--#ifdef CONFIG_ARM64
--					fit,firmware = "atf-1", "u-boot";
--#else
--					fit,firmware = "op-tee", "u-boot";
--#endif
--					fit,loadables;
--				};
--			};
--		};
--#else
--		u-boot-img {
--			offset = <CONFIG_SPL_PAD_TO>;
--		};
--#endif
--	};
--
--#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
--	simple-bin-spi {
--		filename = "u-boot-rockchip-spi.bin";
--		pad-byte = <0xff>;
--
--		mkimage {
--			filename = "idbloader-spi.img";
--			args = "-n", CONFIG_SYS_SOC, "-T", "rkspi";
--			multiple-data-files;
--
--#ifdef CONFIG_ROCKCHIP_EXTERNAL_TPL
--			rockchip-tpl {
--			};
--#elif defined(CONFIG_TPL)
--			u-boot-tpl {
--			};
--#endif
--			u-boot-spl {
--			};
--		};
--
--#if defined(CONFIG_ARM64) || defined(CONFIG_SPL_OPTEE_IMAGE)
--		fit {
--			type = "blob";
--			filename = "u-boot.itb";
--#else
--		u-boot-img {
--#endif
--			/* Sync with u-boot,spl-payload-offset if present */
--			offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>;
--		};
--	};
--#endif /* CONFIG_ROCKCHIP_SPI_IMAGE */
--};
--#endif /* CONFIG_SPL */
--- 
-2.42.0
-
diff --git a/config/u-boot/default/patches/0006-arm-qemu-Enable-Bochs-console-buffering-USB-keyboard.patch b/config/u-boot/default/patches/0006-arm-qemu-Enable-Bochs-console-buffering-USB-keyboard.patch
deleted file mode 100644
index 7aa4e526..00000000
--- a/config/u-boot/default/patches/0006-arm-qemu-Enable-Bochs-console-buffering-USB-keyboard.patch
+++ /dev/null
@@ -1,348 +0,0 @@
-From 2957e8bf43edf8de6e579ce1ed7f95e5bb4a1437 Mon Sep 17 00:00:00 2001
-From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Date: Mon, 14 Aug 2023 20:39:41 +0300
-Subject: [PATCH 1/4] arm: qemu: Enable Bochs video support
-
-Commit 716161663ec49 ("riscv: qemu: Enable Bochs video support") enables
-a video console for QEMU RISC-V virtual machines using an emulated Bochs
-VGA card. Similarly, enable it for ARM virtual machines as well.
-
-Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Reviewed-by: Bin Meng <bmeng@tinylab.org>
-Link: https://lore.kernel.org/u-boot/20230814173944.288356-2-alpernebiyasak@gmail.com/
----
- arch/arm/Kconfig                      | 4 ++++
- board/emulation/qemu-arm/qemu-arm.env | 3 +++
- doc/board/emulation/qemu-arm.rst      | 4 ++++
- 3 files changed, 11 insertions(+)
-
-diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index 328e2ddc33af..d96e230e9ee8 100644
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -1036,6 +1036,10 @@ config ARCH_QEMU
- 	imply DM_RTC
- 	imply RTC_PL031
- 	imply OF_HAS_PRIOR_STAGE
-+	imply VIDEO
-+	imply VIDEO_BOCHS
-+	imply SYS_WHITE_ON_BLACK
-+	imply SYS_CONSOLE_IS_IN_ENV
- 
- config ARCH_RMOBILE
- 	bool "Renesas ARM SoCs"
-diff --git a/board/emulation/qemu-arm/qemu-arm.env b/board/emulation/qemu-arm/qemu-arm.env
-index e658d5ee7d63..86a99a2e8713 100644
---- a/board/emulation/qemu-arm/qemu-arm.env
-+++ b/board/emulation/qemu-arm/qemu-arm.env
-@@ -2,6 +2,9 @@
- 
- /* environment for qemu-arm and qemu-arm64 */
- 
-+stdin=serial
-+stdout=serial,vidconsole
-+stderr=serial,vidconsole
- fdt_high=0xffffffff
- initrd_high=0xffffffff
- fdt_addr=0x40000000
-diff --git a/doc/board/emulation/qemu-arm.rst b/doc/board/emulation/qemu-arm.rst
-index 7291fa4a3150..c423fce76edd 100644
---- a/doc/board/emulation/qemu-arm.rst
-+++ b/doc/board/emulation/qemu-arm.rst
-@@ -67,6 +67,10 @@ Additional persistent U-Boot environment support can be added as follows:
- Additional peripherals that have been tested to work in both U-Boot and Linux
- can be enabled with the following command line parameters:
- 
-+- To add a video console, remove "-nographic" and add e.g.::
-+
-+    -serial stdio -device VGA
-+
- - To add a Serial ATA disk via an Intel ICH9 AHCI controller, pass e.g.::
- 
-     -drive if=none,file=disk.img,format=raw,id=mydisk \
--- 
-2.42.0
-
-
-From 5330bc1c2ad84ba9ecc473f8c24d6e15b366adf9 Mon Sep 17 00:00:00 2001
-From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Date: Mon, 14 Aug 2023 20:39:42 +0300
-Subject: [PATCH 2/4] arm: qemu: Enable PRE_CONSOLE_BUFFER
-
-Commit 608b80b5b855 ("riscv: qemu: Enable PRE_CONSOLE_BUFFER") enables
-buffering console messages for QEMU RISC-V virtual machines so those
-printed before the video console is available will still show up on the
-display. Similarly, enable it for ARM virtual machines as well.
-
-Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Reviewed-by: Simon Glass <sjg@chromium.org>
-Reviewed-by: Bin Meng <bmeng@tinylab.org>
-Link: https://lore.kernel.org/u-boot/20230814173944.288356-3-alpernebiyasak@gmail.com/
----
- arch/arm/Kconfig                 | 1 +
- board/emulation/qemu-arm/Kconfig | 4 ++++
- 2 files changed, 5 insertions(+)
-
-diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index d96e230e9ee8..1cc2be55140a 100644
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -1040,6 +1040,7 @@ config ARCH_QEMU
- 	imply VIDEO_BOCHS
- 	imply SYS_WHITE_ON_BLACK
- 	imply SYS_CONSOLE_IS_IN_ENV
-+	imply PRE_CONSOLE_BUFFER
- 
- config ARCH_RMOBILE
- 	bool "Renesas ARM SoCs"
-diff --git a/board/emulation/qemu-arm/Kconfig b/board/emulation/qemu-arm/Kconfig
-index ed9949651c4b..09c95413a541 100644
---- a/board/emulation/qemu-arm/Kconfig
-+++ b/board/emulation/qemu-arm/Kconfig
-@@ -12,6 +12,10 @@ config BOARD_SPECIFIC_OPTIONS # dummy
- 	imply VIRTIO_NET
- 	imply VIRTIO_BLK
- 
-+config PRE_CON_BUF_ADDR
-+	hex
-+	default 0x40100000
-+
- endif
- 
- if TARGET_QEMU_ARM_64BIT && !TFABOOT
--- 
-2.42.0
-
-
-From 7f666214855d062dc939ff54a0fa52fbde9f0391 Mon Sep 17 00:00:00 2001
-From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Date: Mon, 14 Aug 2023 20:39:43 +0300
-Subject: [PATCH 3/4] arm: qemu: Enable usb keyboard as an input device
-
-Commit 02be57caf730 ("riscv: qemu: Enable usb keyboard as an input
-device") adds PCI xHCI support to QEMU RISC-V virtual machines and
-enables using a USB keyboard as one of the input devices. Similarly,
-enable those for ARM virtual machines as well.
-
-Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Reviewed-by: Simon Glass <sjg@chromium.org>
-Reviewed-by: Bin Meng <bmeng@tinylab.org>
-Link: https://lore.kernel.org/u-boot/20230814173944.288356-4-alpernebiyasak@gmail.com/
----
- arch/arm/Kconfig                      | 5 +++++
- board/emulation/qemu-arm/qemu-arm.c   | 5 +++++
- board/emulation/qemu-arm/qemu-arm.env | 2 +-
- configs/qemu_arm64_defconfig          | 2 --
- configs/qemu_arm_defconfig            | 2 --
- doc/board/emulation/qemu-arm.rst      | 4 ++++
- 6 files changed, 15 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index 1cc2be55140a..4c739bd9bc82 100644
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -1041,6 +1041,11 @@ config ARCH_QEMU
- 	imply SYS_WHITE_ON_BLACK
- 	imply SYS_CONSOLE_IS_IN_ENV
- 	imply PRE_CONSOLE_BUFFER
-+	imply USB
-+	imply USB_XHCI_HCD
-+	imply USB_XHCI_PCI
-+	imply USB_KEYBOARD
-+	imply CMD_USB
- 
- config ARCH_RMOBILE
- 	bool "Renesas ARM SoCs"
-diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c
-index dfea0d92a3c8..942f1fff5717 100644
---- a/board/emulation/qemu-arm/qemu-arm.c
-+++ b/board/emulation/qemu-arm/qemu-arm.c
-@@ -11,6 +11,7 @@
- #include <fdtdec.h>
- #include <init.h>
- #include <log.h>
-+#include <usb.h>
- #include <virtio_types.h>
- #include <virtio.h>
- 
-@@ -114,6 +115,10 @@ int board_late_init(void)
- 	 */
- 	virtio_init();
- 
-+	/* start usb so that usb keyboard can be used as input device */
-+	if (CONFIG_IS_ENABLED(USB_KEYBOARD))
-+		usb_init();
-+
- 	return 0;
- }
- 
-diff --git a/board/emulation/qemu-arm/qemu-arm.env b/board/emulation/qemu-arm/qemu-arm.env
-index 86a99a2e8713..fb4adef281ed 100644
---- a/board/emulation/qemu-arm/qemu-arm.env
-+++ b/board/emulation/qemu-arm/qemu-arm.env
-@@ -2,7 +2,7 @@
- 
- /* environment for qemu-arm and qemu-arm64 */
- 
--stdin=serial
-+stdin=serial,usbkbd
- stdout=serial,vidconsole
- stderr=serial,vidconsole
- fdt_high=0xffffffff
-diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig
-index 94bd96678443..f6b8ae530a4a 100644
---- a/configs/qemu_arm64_defconfig
-+++ b/configs/qemu_arm64_defconfig
-@@ -35,7 +35,6 @@ CONFIG_CMD_NVEDIT_EFI=y
- CONFIG_CMD_DFU=y
- CONFIG_CMD_MTD=y
- CONFIG_CMD_PCI=y
--CONFIG_CMD_USB=y
- CONFIG_CMD_TPM=y
- CONFIG_CMD_MTDPARTS=y
- CONFIG_ENV_IS_IN_FLASH=y
-@@ -68,7 +67,6 @@ CONFIG_SYSRESET=y
- CONFIG_SYSRESET_CMD_POWEROFF=y
- CONFIG_SYSRESET_PSCI=y
- CONFIG_TPM2_MMIO=y
--CONFIG_USB=y
- CONFIG_USB_EHCI_HCD=y
- CONFIG_USB_EHCI_PCI=y
- CONFIG_TPM=y
-diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig
-index 7cb1e9f037ff..1347b86f34b1 100644
---- a/configs/qemu_arm_defconfig
-+++ b/configs/qemu_arm_defconfig
-@@ -36,7 +36,6 @@ CONFIG_CMD_NVEDIT_EFI=y
- CONFIG_CMD_DFU=y
- CONFIG_CMD_MTD=y
- CONFIG_CMD_PCI=y
--CONFIG_CMD_USB=y
- CONFIG_CMD_TPM=y
- CONFIG_CMD_MTDPARTS=y
- CONFIG_ENV_IS_IN_FLASH=y
-@@ -69,7 +68,6 @@ CONFIG_SYSRESET=y
- CONFIG_SYSRESET_CMD_POWEROFF=y
- CONFIG_SYSRESET_PSCI=y
- CONFIG_TPM2_MMIO=y
--CONFIG_USB=y
- CONFIG_USB_EHCI_HCD=y
- CONFIG_USB_EHCI_PCI=y
- CONFIG_TPM=y
-diff --git a/doc/board/emulation/qemu-arm.rst b/doc/board/emulation/qemu-arm.rst
-index c423fce76edd..5481ef6da328 100644
---- a/doc/board/emulation/qemu-arm.rst
-+++ b/doc/board/emulation/qemu-arm.rst
-@@ -84,6 +84,10 @@ can be enabled with the following command line parameters:
- 
-     -device usb-ehci,id=ehci
- 
-+- To add a USB keyboard attached to an emulated xHCI controller, pass e.g.::
-+
-+    -device qemu-xhci,id=xhci -device usb-kbd,bus=xhci.0
-+
- - To add an NVMe disk, pass e.g.::
- 
-     -drive if=none,file=disk.img,id=mydisk -device nvme,drive=mydisk,serial=foo
--- 
-2.42.0
-
-
-From fcc1b6cb56beaaf90bf80928627a606f33a42c3c Mon Sep 17 00:00:00 2001
-From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Date: Mon, 14 Aug 2023 20:39:44 +0300
-Subject: [PATCH 4/4] doc: qemu: arm: Add a section on booting Linux distros
-
-Add an example qemu-system-aarch64 command that can make U-Boot on QEMU
-boot into the Debian Installer, along with resulting console messages
-from U-Boot, based on the existing documentation section for the x86
-version.
-
-Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Link: https://lore.kernel.org/u-boot/20230814173944.288356-5-alpernebiyasak@gmail.com/
----
- doc/board/emulation/qemu-arm.rst | 68 ++++++++++++++++++++++++++++++++
- 1 file changed, 68 insertions(+)
-
-diff --git a/doc/board/emulation/qemu-arm.rst b/doc/board/emulation/qemu-arm.rst
-index 5481ef6da328..1c91c7f3ac67 100644
---- a/doc/board/emulation/qemu-arm.rst
-+++ b/doc/board/emulation/qemu-arm.rst
-@@ -98,6 +98,74 @@ can be enabled with the following command line parameters:
- 
- These have been tested in QEMU 2.9.0 but should work in at least 2.5.0 as well.
- 
-+Booting distros
-+---------------
-+
-+It is possible to install and boot a standard Linux distribution using
-+qemu_arm64 by setting up a root disk::
-+
-+    qemu-img create root.img 20G
-+
-+then using the installer to install. For example, with Debian 12::
-+
-+    qemu-system-aarch64 \
-+      -machine virt -cpu cortex-a53 -m 4G -smp 4 \
-+      -bios u-boot.bin \
-+      -serial stdio -device VGA \
-+      -nic user,model=virtio-net-pci \
-+      -device virtio-rng-pci \
-+      -device qemu-xhci,id=xhci \
-+      -device usb-kbd -device usb-tablet \
-+      -drive if=virtio,file=debian-12.0.0-arm64-netinst.iso,format=raw,readonly=on,media=cdrom \
-+      -drive if=virtio,file=root.img,format=raw,media=disk
-+
-+The output will be something like this::
-+
-+    U-Boot 2023.10-rc2-00075-gbe8fbe718e35 (Aug 11 2023 - 08:38:49 +0000)
-+
-+    DRAM:  4 GiB
-+    Core:  51 devices, 14 uclasses, devicetree: board
-+    Flash: 64 MiB
-+    Loading Environment from Flash... *** Warning - bad CRC, using default environment
-+
-+    In:    serial,usbkbd
-+    Out:   serial,vidconsole
-+    Err:   serial,vidconsole
-+    Bus xhci_pci: Register 8001040 NbrPorts 8
-+    Starting the controller
-+    USB XHCI 1.00
-+    scanning bus xhci_pci for devices... 3 USB Device(s) found
-+    Net:   eth0: virtio-net#32
-+    Hit any key to stop autoboot:  0
-+    Scanning for bootflows in all bootdevs
-+    Seq  Method       State   Uclass    Part  Name                      Filename
-+    ---  -----------  ------  --------  ----  ------------------------  ----------------
-+    Scanning global bootmeth 'efi_mgr':
-+    Scanning bootdev 'fw-cfg@9020000.bootdev':
-+    fatal: no kernel available
-+    scanning bus for devices...
-+    Scanning bootdev 'virtio-blk#34.bootdev':
-+      0  efi          ready   virtio       2  virtio-blk#34.bootdev.par efi/boot/bootaa64.efi
-+    ** Booting bootflow 'virtio-blk#34.bootdev.part_2' with efi
-+    Using prior-stage device tree
-+    Failed to load EFI variables
-+    Error: writing contents
-+    ** Unable to write file ubootefi.var **
-+    Failed to persist EFI variables
-+    Missing TPMv2 device for EFI_TCG_PROTOCOL
-+    Booting /efi\boot\bootaa64.efi
-+    Error: writing contents
-+    ** Unable to write file ubootefi.var **
-+    Failed to persist EFI variables
-+    Welcome to GRUB!
-+
-+Standard boot looks through various available devices and finds the virtio
-+disks, then boots from the first one. After a second or so the grub menu appears
-+and you can work through the installer flow normally.
-+
-+After the installation, you can boot into the installed system by running QEMU
-+again without the drive argument corresponding to the installer CD image.
-+
- Enabling TPMv2 support
- ----------------------
- 
--- 
-2.42.0
-
diff --git a/config/u-boot/default/target.cfg b/config/u-boot/default/target.cfg
index cdbb5216..8d6af6d9 100644
--- a/config/u-boot/default/target.cfg
+++ b/config/u-boot/default/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-rev="4459ed60cb1e0562bc5b40405e2b4b9bbf766d57" # v2023.10
+rev="3f772959501c99fbe5aa0b22a36efe3478d1ae1c" # v2024.07
diff --git a/config/u-boot/gru_bob/config/default b/config/u-boot/gru_bob/config/default
index 2bcbe3d8..da088ef0 100644
--- a/config/u-boot/gru_bob/config/default
+++ b/config/u-boot/gru_bob/config/default
@@ -1,13 +1,14 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# U-Boot 2023.10 Configuration
+# U-Boot 2024.07 Configuration
 #
 
 #
-# Compiler: gcc (Debian 13.2.0-5) 13.2.0
+# Compiler: gcc (Debian 13.3.0-2) 13.3.0
 #
 CONFIG_CREATE_ARCH_SYMLINK=y
 CONFIG_SYS_CACHE_SHIFT_6=y
+CONFIG_64BIT=y
 CONFIG_SYS_CACHELINE_SIZE=64
 CONFIG_LINKER_LIST_ALIGN=8
 # CONFIG_ARC is not set
@@ -40,7 +41,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y
 # CONFIG_SYS_ICACHE_OFF is not set
 # CONFIG_SPL_SYS_ICACHE_OFF is not set
 # CONFIG_SYS_DCACHE_OFF is not set
-# CONFIG_SPL_SYS_DCACHE_OFF is not set
+CONFIG_SPL_SYS_DCACHE_OFF=y
 
 #
 # ARM architecture
@@ -53,6 +54,7 @@ CONFIG_INIT_SP_RELATIVE=y
 CONFIG_SYS_INIT_SP_BSS_OFFSET=524288
 CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE=0x18000000
 # CONFIG_GIC_V3_ITS is not set
+# CONFIG_GICV3_SUPPORT_GIC600 is not set
 CONFIG_STATIC_RELA=y
 CONFIG_DMA_ADDR_T_64BIT=y
 CONFIG_ARM_ASM_UNIFIED=y
@@ -81,13 +83,11 @@ CONFIG_ARM64_SUPPORT_AARCH32=y
 # CONFIG_ARCH_KIRKWOOD is not set
 # CONFIG_ARCH_MVEBU is not set
 # CONFIG_ARCH_ORION5X is not set
-# CONFIG_TARGET_STV0991 is not set
 # CONFIG_ARCH_BCM283X is not set
 # CONFIG_ARCH_BCMSTB is not set
 # CONFIG_ARCH_BCMBCA is not set
 # CONFIG_TARGET_VEXPRESS_CA9X4 is not set
 # CONFIG_TARGET_BCMNS is not set
-# CONFIG_TARGET_BCMNS2 is not set
 # CONFIG_TARGET_BCMNS3 is not set
 # CONFIG_ARCH_EXYNOS is not set
 # CONFIG_ARCH_S5PC1XX is not set
@@ -117,7 +117,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y
 # CONFIG_ARCH_APPLE is not set
 # CONFIG_ARCH_OWL is not set
 # CONFIG_ARCH_QEMU is not set
-# CONFIG_ARCH_RMOBILE is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SNAPDRAGON is not set
 # CONFIG_ARCH_SOCFPGA is not set
 # CONFIG_ARCH_SUNXI is not set
@@ -176,6 +176,7 @@ CONFIG_ARCH_ROCKCHIP=y
 # CONFIG_ARCH_ASPEED is not set
 # CONFIG_TARGET_DURIAN is not set
 # CONFIG_TARGET_POMELO is not set
+# CONFIG_TARGET_PE2201 is not set
 # CONFIG_TARGET_PRESIDIO_ASIC is not set
 # CONFIG_TARGET_XENGUEST_ARM64 is not set
 # CONFIG_ARCH_GXP is not set
@@ -194,10 +195,9 @@ CONFIG_SF_DEFAULT_MODE=0x0
 CONFIG_ENV_SIZE=0x8000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_DM_SPI=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-bob"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-bob"
 CONFIG_SPL_TEXT_BASE=0xff8c2000
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-# CONFIG_OF_LIBFDT_OVERLAY is not set
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
 CONFIG_DM_RESET=y
 CONFIG_SYS_MONITOR_LEN=0
@@ -227,13 +227,15 @@ CONFIG_ROCKCHIP_STIMER=y
 CONFIG_ROCKCHIP_STIMER_BASE=0xff8680a0
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
 # CONFIG_SPL_ROCKCHIP_EARLYRETURN_TO_BROM is not set
+CONFIG_ROCKCHIP_DISABLE_FORCE_JTAG=y
 # CONFIG_SPL_MMC is not set
 CONFIG_ROCKCHIP_SPI_IMAGE=y
+CONFIG_ROCKCHIP_COMMON_STACK_ADDR=y
 CONFIG_SPL_SERIAL=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
 CONFIG_TPL_TEXT_BASE=0xff8c2000
 CONFIG_TPL_STACK=0xff8effff
-CONFIG_SPL_DRIVERS_MISC=y
+# CONFIG_SPL_DRIVERS_MISC is not set
 CONFIG_SPL_STACK_R_ADDR=0x04000000
 CONFIG_TARGET_CHROMEBOOK_BOB=y
 # CONFIG_TARGET_CHROMEBOOK_KEVIN is not set
@@ -242,16 +244,23 @@ CONFIG_TARGET_CHROMEBOOK_BOB=y
 # CONFIG_TARGET_PINEPHONE_PRO_RK3399 is not set
 # CONFIG_TARGET_PUMA_RK3399 is not set
 # CONFIG_TARGET_ROCK960_RK3399 is not set
+# CONFIG_TARGET_ROCKPI4_RK3399 is not set
 # CONFIG_TARGET_ROCKPRO64_RK3399 is not set
 # CONFIG_TARGET_ROC_PC_RK3399 is not set
 CONFIG_SPL_STACK=0xff8effff
 CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xff8e0000
+CONFIG_SPL_BSS_MAX_SIZE=0x10000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_SYS_MALLOC_F=y
 CONFIG_ERR_PTR_OFFSET=0x0
 CONFIG_SPL_SIZE_LIMIT=0x0
 CONFIG_SPL=y
 CONFIG_PRE_CON_BUF_ADDR=0x0f200000
 CONFIG_PRE_CON_BUF_SZ=4096
-CONFIG_BOOTSTAGE_STASH_ADDR=0
+CONFIG_BOOTSTAGE_STASH_ADDR=0x0
 CONFIG_DEBUG_UART_BASE=0xff1a0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -265,7 +274,7 @@ CONFIG_SPL_SPI=y
 # CONFIG_CMO_BY_VA_ONLY is not set
 # CONFIG_ARMV8_SPL_EXCEPTION_VECTORS is not set
 # CONFIG_ARMV8_MULTIENTRY is not set
-# CONFIG_ARMV8_SET_SMPEN is not set
+CONFIG_ARMV8_SET_SMPEN=y
 # CONFIG_ARMV8_SWITCH_TO_EL1 is not set
 
 #
@@ -277,7 +286,9 @@ CONFIG_SPL_SPI=y
 CONFIG_PSCI_RESET=y
 # CONFIG_ARMV8_PSCI is not set
 # CONFIG_ARMV8_EA_EL3_FIRST is not set
-# CONFIG_ARMV8_CRYPTO is not set
+CONFIG_ARMV8_CRYPTO=y
+CONFIG_ARMV8_CE_SHA1=y
+CONFIG_ARMV8_CE_SHA256=y
 # CONFIG_CMD_DEKBLOB is not set
 # CONFIG_IMX_CAAM_DEK_ENCAP is not set
 # CONFIG_IMX_OPTEE_DEK_ENCAP is not set
@@ -285,8 +296,6 @@ CONFIG_PSCI_RESET=y
 # CONFIG_IMX_ELE_DEK_ENCAP is not set
 # CONFIG_CMD_HDMIDETECT is not set
 CONFIG_IMX_DCD_ADDR=0x00910000
-# CONFIG_SPL_LOAD_IMX_CONTAINER is not set
-CONFIG_IMX_CONTAINER_CFG=""
 CONFIG_SYS_MEM_TOP_HIDE=0x0
 CONFIG_SYS_LOAD_ADDR=0x800800
 
@@ -313,7 +322,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
 CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=130200
+CONFIG_GCC_VERSION=130300
 CONFIG_CLANG_VERSION=0
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
@@ -346,6 +355,10 @@ CONFIG_STACK_SIZE=0x1000000
 CONFIG_SYS_SRAM_BASE=0x0
 CONFIG_SYS_SRAM_SIZE=0x0
 # CONFIG_MP is not set
+CONFIG_HAVE_TEXT_BASE=y
+# CONFIG_HAVE_SYS_UBOOT_START is not set
+CONFIG_SYS_UBOOT_START=0x18000000
+# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
 # CONFIG_API is not set
 
 #
@@ -356,8 +369,8 @@ CONFIG_SYS_SRAM_SIZE=0x0
 # Boot images
 #
 # CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_FIT=y
 # CONFIG_TIMESTAMP is not set
+CONFIG_FIT=y
 CONFIG_FIT_EXTERNAL_OFFSET=0x0
 CONFIG_FIT_FULL_CHECK=y
 # CONFIG_FIT_SIGNATURE is not set
@@ -377,6 +390,8 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x0
 CONFIG_SPL_FIT_SOURCE=""
 # CONFIG_USE_SPL_FIT_GENERATOR is not set
 CONFIG_PXE_UTILS=y
+CONFIG_BOOT_DEFAULTS_FEATURES=y
+CONFIG_BOOT_DEFAULTS_CMDS=y
 CONFIG_BOOT_DEFAULTS=y
 CONFIG_BOOTSTD=y
 # CONFIG_SPL_BOOTSTD is not set
@@ -384,9 +399,11 @@ CONFIG_BOOTSTD_FULL=y
 CONFIG_BOOTSTD_DEFAULTS=y
 CONFIG_BOOTSTD_BOOTCOMMAND=y
 CONFIG_BOOTMETH_GLOBAL=y
+# CONFIG_BOOTMETH_CROS is not set
 CONFIG_BOOTMETH_EXTLINUX=y
 CONFIG_BOOTMETH_EXTLINUX_PXE=y
 CONFIG_BOOTMETH_EFILOADER=y
+CONFIG_BOOTMETH_EFI_BOOTMGR=y
 CONFIG_BOOTMETH_VBE=y
 CONFIG_BOOTMETH_DISTRO=y
 # CONFIG_SPL_BOOTMETH_VBE is not set
@@ -398,13 +415,8 @@ CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
 CONFIG_EXPO=y
 CONFIG_BOOTMETH_SCRIPT=y
 CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
 CONFIG_SUPPORT_RAW_INITRD=y
-# CONFIG_OF_BOARD_SETUP is not set
-# CONFIG_OF_SYSTEM_SETUP is not set
-# CONFIG_OF_STDOUT_VIA_ALIAS is not set
-CONFIG_HAVE_TEXT_BASE=y
-# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
-CONFIG_ARCH_FIXUP_FDT_MEMORY=y
 # CONFIG_CHROMEOS is not set
 # CONFIG_CHROMEOS_VBOOT is not set
 # CONFIG_RAMBOOT_PBL is not set
@@ -444,6 +456,17 @@ CONFIG_BOOTDELAY=2
 # Image support
 #
 # CONFIG_IMAGE_PRE_LOAD is not set
+
+#
+# Devicetree fixup
+#
+# CONFIG_OF_ENV_SETUP is not set
+# CONFIG_OF_BOARD_SETUP is not set
+# CONFIG_OF_SYSTEM_SETUP is not set
+# CONFIG_OF_STDOUT_VIA_ALIAS is not set
+# CONFIG_FDT_FIXUP_PARTITIONS is not set
+# CONFIG_FDT_SIMPLEFB is not set
+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
 # CONFIG_USE_BOOTARGS is not set
 # CONFIG_BOOTARGS_SUBST is not set
 CONFIG_USE_BOOTCOMMAND=y
@@ -463,6 +486,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
 #
 CONFIG_MENU=y
 # CONFIG_CONSOLE_RECORD is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1044
 # CONFIG_DISABLE_CONSOLE is not set
 CONFIG_LOGLEVEL=4
 CONFIG_SPL_LOGLEVEL=4
@@ -471,6 +496,7 @@ CONFIG_SPL_LOGLEVEL=4
 # CONFIG_TPL_SILENT_CONSOLE is not set
 CONFIG_PRE_CONSOLE_BUFFER=y
 CONFIG_CONSOLE_FLUSH_SUPPORT=y
+# CONFIG_CONSOLE_FLUSH_ON_NEWLINE is not set
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 # CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
@@ -517,7 +543,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_BOARD_LATE_INIT=y
 # CONFIG_CLOCKS is not set
 # CONFIG_HWCONFIG is not set
-# CONFIG_LAST_STAGE_INIT is not set
+CONFIG_LAST_STAGE_INIT=y
 CONFIG_MISC_INIT_R=y
 # CONFIG_SYS_MALLOC_BOOTPARAMS is not set
 # CONFIG_ID_EEPROM is not set
@@ -557,14 +583,11 @@ CONFIG_SUPPORT_TPL=y
 #
 CONFIG_SPL_FRAMEWORK=y
 # CONFIG_SPL_FRAMEWORK_BOARD_INIT_F is not set
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x1e000
 CONFIG_SPL_PAD_TO=0x7f8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xff8e0000
 # CONFIG_SPL_NO_BSS_LIMIT is not set
 CONFIG_SPL_BSS_LIMIT=y
 # CONFIG_SPL_FOOTPRINT_LIMIT is not set
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
 CONFIG_SPL_SYS_STACK_F_CHECK_BYTE=0xaa
 # CONFIG_SPL_SYS_REPORT_STACK_F_USAGE is not set
 # CONFIG_SPL_SHOW_ERRORS is not set
@@ -576,12 +599,11 @@ CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_BOOTROM_SUPPORT is not set
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
+# CONFIG_SPL_LOAD_IMX_CONTAINER is not set
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SPL_SEPARATE_BSS=y
-# CONFIG_SYS_SPL_MALLOC is not set
+# CONFIG_SPL_SYS_MALLOC is not set
 CONFIG_SPL_BANNER_PRINT=y
 # CONFIG_SPL_DISPLAY_PRINT is not set
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
@@ -602,7 +624,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x0
 # CONFIG_SPL_DM_MAILBOX is not set
 # CONFIG_SPL_MEMORY is not set
 # CONFIG_SPL_MPC8XXX_INIT_DDR is not set
-# CONFIG_SPL_MTD_SUPPORT is not set
+# CONFIG_SPL_MTD is not set
 # CONFIG_SPL_MUSB_NEW is not set
 # CONFIG_SPL_NAND_SUPPORT is not set
 # CONFIG_SPL_NAND_DRIVERS is not set
@@ -640,23 +662,21 @@ CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_SPL_TARGET=""
 # CONFIG_TPL is not set
 # CONFIG_VPL is not set
-# CONFIG_FDT_SIMPLEFB is not set
-# CONFIG_BMP is not set
-
-#
-# Command line interface
-#
 CONFIG_CMDLINE=y
 CONFIG_HUSH_PARSER=y
+
+#
+# Hush flavor to use
+#
+CONFIG_HUSH_OLD_PARSER=y
+# CONFIG_HUSH_MODERN_PARSER is not set
 CONFIG_CMDLINE_EDITING=y
 # CONFIG_CMDLINE_PS_SUPPORT is not set
 CONFIG_AUTO_COMPLETE=y
 CONFIG_SYS_LONGHELP=y
 CONFIG_SYS_PROMPT="=> "
 CONFIG_SYS_PROMPT_HUSH_PS2="> "
-CONFIG_SYS_MAXARGS=16
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1044
+CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_XTRACE=y
 
 #
@@ -670,8 +690,10 @@ CONFIG_CMD_BDI=y
 # CONFIG_CMD_BDINFO_EXTRA is not set
 # CONFIG_CMD_CONFIG is not set
 CONFIG_CMD_CONSOLE=y
+# CONFIG_CMD_HISTORY is not set
 # CONFIG_CMD_LICENSE is not set
 # CONFIG_CMD_PMC is not set
+# CONFIG_CMD_SMBIOS is not set
 
 #
 # Boot commands
@@ -693,24 +715,24 @@ CONFIG_BOOTM_PLAN9=y
 CONFIG_BOOTM_RTEMS=y
 CONFIG_CMD_VBE=y
 CONFIG_BOOTM_VXWORKS=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
 CONFIG_CMD_BOOTEFI=y
+CONFIG_CMD_BOOTEFI_BINARY=y
+CONFIG_CMD_BOOTEFI_BOOTMGR=y
 CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
 CONFIG_CMD_BOOTEFI_HELLO=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 CONFIG_CMD_BOOTMENU=y
 # CONFIG_CMD_ADTIMG is not set
 CONFIG_CMD_ELF=y
+# CONFIG_CMD_ELF_FDT_SETUP is not set
 CONFIG_CMD_FDT=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_RUN=y
 CONFIG_CMD_IMI=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_XIMG=y
-# CONFIG_CMD_XXD is not set
+CONFIG_SYS_XIMG_LEN=0x800000
 # CONFIG_CMD_SPL is not set
-# CONFIG_CMD_THOR_DOWNLOAD is not set
-# CONFIG_CMD_ZBOOT is not set
 
 #
 # Environment commands
@@ -776,7 +798,6 @@ CONFIG_CMD_GPIO=y
 # CONFIG_CMD_GPIO_READ is not set
 # CONFIG_CMD_PWM is not set
 CONFIG_CMD_GPT=y
-CONFIG_RANDOM_UUID=y
 # CONFIG_CMD_GPT_RENAME is not set
 # CONFIG_CMD_IDE is not set
 # CONFIG_CMD_IO is not set
@@ -794,8 +815,11 @@ CONFIG_CMD_LOADXY_TIMEOUT=90
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_BKOPS_ENABLE is not set
+# CONFIG_CMD_MMC_REG is not set
 # CONFIG_CMD_MMC_SWRITE is not set
 # CONFIG_CMD_CLONE is not set
+# CONFIG_CMD_MTD is not set
+# CONFIG_CMD_ONENAND is not set
 # CONFIG_CMD_OSD is not set
 CONFIG_CMD_PART=y
 # CONFIG_CMD_PCI is not set
@@ -808,11 +832,12 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SPI=y
 CONFIG_DEFAULT_SPI_BUS=0
-CONFIG_DEFAULT_SPI_MODE=0
+CONFIG_DEFAULT_SPI_MODE=0x0
 # CONFIG_CMD_TSI148 is not set
 # CONFIG_CMD_UNIVERSE is not set
 CONFIG_CMD_USB=y
 # CONFIG_CMD_USB_SDP is not set
+# CONFIG_CMD_RKMTD is not set
 # CONFIG_CMD_WRITE is not set
 
 #
@@ -823,6 +848,7 @@ CONFIG_CMD_ECHO=y
 CONFIG_CMD_ITEST=y
 CONFIG_CMD_SOURCE=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_XXD is not set
 
 #
 # Android support commands
@@ -845,6 +871,7 @@ CONFIG_BOOTP_SUBNETMASK=y
 # CONFIG_CMD_PCAP is not set
 CONFIG_BOOTP_PXE=y
 CONFIG_BOOTP_PXE_CLIENTARCH=0x16
+# CONFIG_BOOTP_PXE_DHCP_OPTION is not set
 CONFIG_BOOTP_VCI_STRING="U-Boot.armv8"
 CONFIG_CMD_TFTPBOOT=y
 # CONFIG_CMD_TFTPPUT is not set
@@ -898,7 +925,6 @@ CONFIG_CMD_VIDCONSOLE=y
 #
 # TI specific command line interface
 #
-# CONFIG_CMD_DDR3 is not set
 
 #
 # Power commands
@@ -933,9 +959,9 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 # CONFIG_CMD_FS_UUID is not set
 # CONFIG_CMD_JFFS2 is not set
+# CONFIG_CMD_MTDPARTS is not set
 CONFIG_MTDIDS_DEFAULT=""
 CONFIG_MTDPARTS_DEFAULT=""
-# CONFIG_CMD_REISER is not set
 # CONFIG_CMD_ZFS is not set
 
 #
@@ -979,16 +1005,18 @@ CONFIG_BINMAN=y
 CONFIG_OF_CONTROL=y
 CONFIG_OF_REAL=y
 CONFIG_SPL_OF_CONTROL=y
-# CONFIG_OF_LIVE is not set
+CONFIG_OF_LIVE=y
+CONFIG_OF_UPSTREAM=y
+# CONFIG_OF_UPSTREAM_BUILD_VENDOR is not set
 CONFIG_OF_SEPARATE=y
 # CONFIG_OF_EMBED is not set
 # CONFIG_OF_BOARD is not set
 # CONFIG_OF_OMIT_DTB is not set
 CONFIG_DEVICE_TREE_INCLUDES=""
-CONFIG_OF_LIST="rk3399-gru-bob"
+CONFIG_OF_LIST="rockchip/rk3399-gru-bob"
 # CONFIG_MULTI_DTB_FIT is not set
 # CONFIG_SPL_MULTI_DTB_FIT is not set
-CONFIG_SPL_OF_LIST="rk3399-gru-bob"
+CONFIG_SPL_OF_LIST="rockchip/rk3399-gru-bob"
 CONFIG_OF_TAG_MIGRATE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 # CONFIG_OF_DTB_PROPS_REMOVE is not set
@@ -1066,10 +1094,11 @@ CONFIG_SYS_RX_ETH_BUFFER=4
 #
 CONFIG_DM=y
 CONFIG_SPL_DM=y
-CONFIG_DM_WARN=y
+# CONFIG_DM_WARN is not set
 # CONFIG_SPL_DM_WARN is not set
 # CONFIG_DM_DEBUG is not set
 # CONFIG_DM_STATS is not set
+# CONFIG_SPL_DM_STATS is not set
 CONFIG_DM_DEVICE_REMOVE=y
 CONFIG_DM_EVENT=y
 # CONFIG_SPL_DM_DEVICE_REMOVE is not set
@@ -1089,8 +1118,8 @@ CONFIG_SPL_SIMPLE_BUS=y
 CONFIG_OF_TRANSLATE=y
 # CONFIG_SPL_OF_TRANSLATE is not set
 # CONFIG_TRANSLATION_OFFSET is not set
-CONFIG_DM_DEV_READ_INLINE=y
-# CONFIG_OFNODE_MULTI_TREE is not set
+CONFIG_OFNODE_MULTI_TREE=y
+CONFIG_OFNODE_MULTI_TREE_MAX=4
 CONFIG_BOUNCE_BUFFER=y
 CONFIG_ADC=y
 # CONFIG_ADC_EXYNOS is not set
@@ -1119,6 +1148,7 @@ CONFIG_BLOCK_CACHE=y
 # CONFIG_IDE is not set
 # CONFIG_LBA48 is not set
 # CONFIG_SYS_64BIT_LBA is not set
+# CONFIG_RKMTD is not set
 # CONFIG_BOOTCOUNT_LIMIT is not set
 
 #
@@ -1131,9 +1161,10 @@ CONFIG_BLOCK_CACHE=y
 #
 # CONFIG_CACHE is not set
 # CONFIG_L2X0_CACHE is not set
-# CONFIG_V5L2_CACHE is not set
+# CONFIG_ANDES_L2_CACHE is not set
 # CONFIG_NCORE_CACHE is not set
 # CONFIG_SIFIVE_CCACHE is not set
+# CONFIG_SIFIVE_PL2 is not set
 
 #
 # Clock
@@ -1142,6 +1173,8 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 # CONFIG_SPL_CLK_CCF is not set
 # CONFIG_CLK_CCF is not set
+# CONFIG_CLK_GPIO is not set
+# CONFIG_SPL_CLK_GPIO is not set
 # CONFIG_CLK_CDCE9XX is not set
 # CONFIG_CLK_ICS8N3QV01 is not set
 # CONFIG_CLK_K210 is not set
@@ -1266,7 +1299,6 @@ CONFIG_ROCKCHIP_GPIO=y
 # CONFIG_NOMADIK_GPIO is not set
 # CONFIG_ZYNQMP_GPIO_MODEPIN is not set
 # CONFIG_SLG7XL45106_I2C_GPO is not set
-# CONFIG_TURRIS_OMNIA_MCU is not set
 # CONFIG_FTGPIO010 is not set
 # CONFIG_ADP5585_GPIO is not set
 
@@ -1351,6 +1383,7 @@ CONFIG_SPL_MISC=y
 # CONFIG_GATEWORKS_SC is not set
 CONFIG_ROCKCHIP_EFUSE=y
 # CONFIG_ROCKCHIP_OTP is not set
+CONFIG_ROCKCHIP_IODOMAIN=y
 # CONFIG_SIFIVE_OTP is not set
 # CONFIG_SMSC_LPC47M is not set
 # CONFIG_SMSC_SIO1007 is not set
@@ -1370,6 +1403,7 @@ CONFIG_PWRSEQ=y
 # CONFIG_SPL_PWRSEQ is not set
 # CONFIG_PCA9551_LED is not set
 # CONFIG_TEST_DRV is not set
+# CONFIG_TURRIS_OMNIA_MCU is not set
 # CONFIG_USB_HUB_USB251XB is not set
 # CONFIG_TWL4030_LED is not set
 # CONFIG_WINBOND_W83627 is not set
@@ -1385,6 +1419,7 @@ CONFIG_PWRSEQ=y
 # CONFIG_MICROCHIP_FLEXCOM is not set
 # CONFIG_ESM_PMIC is not set
 # CONFIG_SL28CPLD is not set
+# CONFIG_SPL_SOCFPGA_DT_REG is not set
 
 #
 # MMC Host controller Support
@@ -1420,8 +1455,11 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 # CONFIG_MMC_SDHCI_ADMA is not set
+# CONFIG_MMC_SDHCI_ADMA_FORCE_32BIT is not set
+CONFIG_MMC_SDHCI_ADMA_64BIT=y
 # CONFIG_MMC_SDHCI_BCMSTB is not set
 # CONFIG_MMC_SDHCI_CADENCE is not set
+# CONFIG_MMC_SDHCI_CV1800B is not set
 # CONFIG_MMC_SDHCI_IPROC is not set
 # CONFIG_MMC_SDHCI_F_SDH30 is not set
 # CONFIG_MMC_SDHCI_KONA is not set
@@ -1442,9 +1480,11 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 #
 # MTD Support
 #
-# CONFIG_MTD is not set
+CONFIG_MTD=y
 # CONFIG_DM_MTD is not set
 # CONFIG_MTD_NOR_FLASH is not set
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_SYS_MTDPARTS_RUNTIME is not set
 # CONFIG_FLASH_CFI_DRIVER is not set
 # CONFIG_HBMC_AM654 is not set
 # CONFIG_SAMSUNG_ONENAND is not set
@@ -1464,20 +1504,24 @@ CONFIG_SPI_FLASH_SMART_HWCAPS=y
 # CONFIG_SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT is not set
 # CONFIG_SPI_FLASH_SOFT_RESET is not set
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_LOCK=y
 CONFIG_SPI_FLASH_UNLOCK_ALL=y
 # CONFIG_SPI_FLASH_ATMEL is not set
 # CONFIG_SPI_FLASH_EON is not set
 CONFIG_SPI_FLASH_GIGADEVICE=y
 # CONFIG_SPI_FLASH_ISSI is not set
 # CONFIG_SPI_FLASH_MACRONIX is not set
+# CONFIG_SPI_FLASH_SILICONKAISER is not set
 # CONFIG_SPI_FLASH_SPANSION is not set
 # CONFIG_SPI_FLASH_STMICRO is not set
 # CONFIG_SPI_FLASH_SST is not set
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_SPI_FLASH_XMC is not set
 # CONFIG_SPI_FLASH_XTX is not set
+# CONFIG_SPI_FLASH_ZBIT is not set
 CONFIG_SPI_FLASH_USE_4K_SECTORS=y
 # CONFIG_SPI_FLASH_DATAFLASH is not set
+# CONFIG_SPI_FLASH_MTD is not set
 
 #
 # UBI support
@@ -1538,7 +1582,7 @@ CONFIG_DM_ETH=y
 # CONFIG_DM_MDIO is not set
 # CONFIG_DM_ETH_PHY is not set
 CONFIG_NETDEVICES=y
-# CONFIG_PHY_GIGE is not set
+CONFIG_PHY_GIGE=y
 # CONFIG_ALTERA_TSE is not set
 # CONFIG_BCM_SF2_ETH is not set
 # CONFIG_BCMGENET is not set
@@ -1557,7 +1601,6 @@ CONFIG_ETH_DESIGNWARE=y
 # CONFIG_FTMAC100 is not set
 # CONFIG_FTGMAC100 is not set
 # CONFIG_MCFFEC is not set
-# CONFIG_FSLDMAFEC is not set
 # CONFIG_KS8851_MLL is not set
 # CONFIG_LITEETH is not set
 # CONFIG_MACB is not set
@@ -1586,6 +1629,7 @@ CONFIG_GMAC_ROCKCHIP=y
 # CONFIG_SYS_DPAA_QBMAN is not set
 # CONFIG_TSEC_ENET is not set
 # CONFIG_MEDIATEK_ETH is not set
+# CONFIG_HIFEMAC_ETH is not set
 # CONFIG_HIGMACV300_ETH is not set
 # CONFIG_NVME is not set
 # CONFIG_NVME_APPLE is not set
@@ -1611,6 +1655,7 @@ CONFIG_PHY=y
 # Rockchip PHY driver
 #
 # CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set
+# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 # CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY is not set
 # CONFIG_PHY_ROCKCHIP_PCIE is not set
@@ -1649,6 +1694,8 @@ CONFIG_SPL_PINCONF_RECURSIVE=y
 # CONFIG_PINCTRL_K210 is not set
 CONFIG_PINCTRL_ROCKCHIP=y
 CONFIG_SPL_PINCTRL_ROCKCHIP=y
+# CONFIG_PINCTRL_TEGRA is not set
+# CONFIG_SPL_PINCTRL_TEGRA is not set
 CONFIG_POWER=y
 # CONFIG_POWER_LEGACY is not set
 # CONFIG_ACPI_PMC is not set
@@ -1678,6 +1725,7 @@ CONFIG_SPL_PMIC_CHILDREN=y
 # CONFIG_SPL_DM_PMIC_PCA9450 is not set
 # CONFIG_DM_PMIC_PFUZE100 is not set
 # CONFIG_SPL_DM_PMIC_PFUZE100 is not set
+# CONFIG_DM_PMIC_MAX77663 is not set
 # CONFIG_DM_PMIC_MAX77686 is not set
 # CONFIG_DM_PMIC_MAX8998 is not set
 # CONFIG_DM_PMIC_MC34708 is not set
@@ -1695,12 +1743,14 @@ CONFIG_PMIC_RK8XX=y
 # CONFIG_PMIC_LP873X is not set
 # CONFIG_PMIC_LP87565 is not set
 # CONFIG_DM_PMIC_TPS65910 is not set
+# CONFIG_DM_PMIC_TPS80031 is not set
 # CONFIG_PMIC_STPMIC1 is not set
 # CONFIG_SPL_PMIC_PALMAS is not set
 # CONFIG_SPL_PMIC_LP873X is not set
 # CONFIG_SPL_PMIC_LP87565 is not set
 # CONFIG_PMIC_TPS65941 is not set
 # CONFIG_PMIC_TPS65219 is not set
+# CONFIG_PMIC_RAA215300 is not set
 # CONFIG_PMIC_TPS65217 is not set
 # CONFIG_POWER_TPS65218 is not set
 # CONFIG_POWER_TPS62362 is not set
@@ -1758,6 +1808,7 @@ CONFIG_RAM_ROCKCHIP_DEBUG=y
 #
 # Remote Processor drivers
 #
+CONFIG_REMOTEPROC_MAX_FW_SIZE=0x10000
 
 #
 # Reset Controller Support
@@ -1770,11 +1821,13 @@ CONFIG_RESET_ROCKCHIP=y
 # CONFIG_RESET_SCMI is not set
 # CONFIG_RESET_DRA7 is not set
 CONFIG_DM_RNG=y
+# CONFIG_SPL_DM_RNG is not set
 # CONFIG_RNG_MSM is not set
 # CONFIG_RNG_NPCM is not set
 CONFIG_RNG_ROCKCHIP=y
 # CONFIG_RNG_IPROC200 is not set
 # CONFIG_RNG_SMCCC_TRNG is not set
+# CONFIG_RNG_ARM_RNDR is not set
 
 #
 # Real Time Clock
@@ -1794,9 +1847,9 @@ CONFIG_RNG_ROCKCHIP=y
 # CONFIG_RTC_MC146818 is not set
 # CONFIG_RTC_M41T62 is not set
 # CONFIG_SCSI is not set
-# CONFIG_DM_SCSI is not set
 CONFIG_SERIAL=y
 CONFIG_BAUDRATE=115200
+# CONFIG_DEFAULT_ENV_IS_RW is not set
 CONFIG_REQUIRE_SERIAL_CONSOLE=y
 # CONFIG_SPECIFY_CONSOLE_INDEX is not set
 CONFIG_SERIAL_PRESENT=y
@@ -1838,11 +1891,14 @@ CONFIG_SYS_NS16550_MEM32=y
 # CONFIG_MSM_GENI_SERIAL is not set
 # CONFIG_MXS_AUART_SERIAL is not set
 # CONFIG_OMAP_SERIAL is not set
+# CONFIG_HTIF_CONSOLE is not set
 # CONFIG_SIFIVE_SERIAL is not set
 # CONFIG_ZYNQ_SERIAL is not set
 # CONFIG_MTK_SERIAL is not set
 # CONFIG_MT7620_SERIAL is not set
 # CONFIG_NPCM_SERIAL is not set
+# CONFIG_SM is not set
+# CONFIG_MESON_SM is not set
 # CONFIG_SMEM is not set
 
 #
@@ -1854,6 +1910,7 @@ CONFIG_SYS_NS16550_MEM32=y
 # SOC (System On Chip) specific Drivers
 #
 # CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_SAMSUNG is not set
 # CONFIG_SOC_TI is not set
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
@@ -1867,6 +1924,7 @@ CONFIG_SPI_MEM=y
 # CONFIG_CORTINA_SFLASH is not set
 # CONFIG_CADENCE_QSPI is not set
 # CONFIG_CF_SPI is not set
+# CONFIG_CV1800B_SPIF is not set
 # CONFIG_DESIGNWARE_SPI is not set
 # CONFIG_EXYNOS_SPI is not set
 # CONFIG_FSL_DSPI is not set
@@ -1919,7 +1977,8 @@ CONFIG_ROCKCHIP_SPI=y
 CONFIG_SYSRESET=y
 CONFIG_SPL_SYSRESET=y
 CONFIG_SYSRESET_CMD_RESET=y
-# CONFIG_SYSRESET_CMD_POWEROFF is not set
+CONFIG_SYSRESET_CMD_POWEROFF=y
+# CONFIG_SYSRESET_CV1800B is not set
 # CONFIG_POWEROFF_GPIO is not set
 # CONFIG_SYSRESET_GPIO is not set
 # CONFIG_SYSRESET_PSCI is not set
@@ -1950,9 +2009,8 @@ CONFIG_SPL_DM_USB=y
 CONFIG_USB_HOST=y
 # CONFIG_SPL_USB_HOST is not set
 CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
-CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y
-# CONFIG_USB_XHCI_PCI is not set
+# CONFIG_USB_XHCI_DWC3 is not set
+# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
 # CONFIG_USB_XHCI_FSL is not set
 # CONFIG_USB_XHCI_BRCM is not set
 CONFIG_USB_EHCI_HCD=y
@@ -1977,7 +2035,7 @@ CONFIG_USB_DWC3=y
 # Platform Glue Driver Support
 #
 # CONFIG_USB_DWC3_OMAP is not set
-# CONFIG_USB_DWC3_GENERIC is not set
+CONFIG_USB_DWC3_GENERIC=y
 # CONFIG_SPL_USB_DWC3_GENERIC is not set
 # CONFIG_USB_DWC3_LAYERSCAPE is not set
 
@@ -2046,7 +2104,7 @@ CONFIG_VIDEO_FONT_8X16=y
 # CONFIG_VIDEO_FONT_16X32 is not set
 CONFIG_VIDEO_LOGO=y
 CONFIG_BACKLIGHT=y
-CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0
+CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x0
 # CONFIG_VIDEO_COPY is not set
 CONFIG_VIDEO_DAMAGE=y
 CONFIG_BACKLIGHT_PWM=y
@@ -2077,9 +2135,11 @@ CONFIG_SIMPLE_PANEL=y
 # CONFIG_VIDEO_LCD_ENDEAVORU is not set
 # CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
 # CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
+# CONFIG_VIDEO_LCD_LG_LD070WX3 is not set
 # CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
 # CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
 # CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
+# CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set
 # CONFIG_VIDEO_LCD_SSD2828 is not set
 # CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
 # CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
@@ -2106,7 +2166,9 @@ CONFIG_DISPLAY_ROCKCHIP_EDP=y
 # CONFIG_VIDEO_TIDSS is not set
 # CONFIG_VIDEO_TEGRA124 is not set
 # CONFIG_VIDEO_BRIDGE is not set
+# CONFIG_VIDEO_BRIDGE_PARADE_DP501 is not set
 # CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825 is not set
+# CONFIG_VIDEO_BRIDGE_TOSHIBA_TC358768 is not set
 # CONFIG_VIDEO_TEGRA20 is not set
 # CONFIG_VIDEO_DSI_TEGRA30 is not set
 # CONFIG_TEGRA_BACKLIGHT_PWM is not set
@@ -2119,6 +2181,7 @@ CONFIG_CONSOLE_SCROLL_LINES=1
 # CONFIG_OSD is not set
 # CONFIG_VIDEO_REMOVE is not set
 # CONFIG_SPLASH_SCREEN is not set
+# CONFIG_BMP is not set
 CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
 CONFIG_VIDEO_BMP_RLE8=y
 # CONFIG_BMP_16BPP is not set
@@ -2183,6 +2246,7 @@ CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
 CONFIG_CHARSET=y
 # CONFIG_DYNAMIC_CRC_TABLE is not set
 CONFIG_LIB_UUID=y
+CONFIG_RANDOM_UUID=y
 CONFIG_SPL_LIB_UUID=y
 # CONFIG_SEMIHOSTING is not set
 # CONFIG_SPL_SEMIHOSTING is not set
@@ -2200,6 +2264,7 @@ CONFIG_LIB_RAND=y
 # CONFIG_LIB_HW_RAND is not set
 CONFIG_SUPPORT_ACPI=y
 # CONFIG_ACPI is not set
+# CONFIG_SPL_ACPI is not set
 # CONFIG_SPL_TINY_MEMSET is not set
 # CONFIG_BITREVERSE is not set
 # CONFIG_TRACE is not set
@@ -2238,6 +2303,7 @@ CONFIG_MD5=y
 # CONFIG_SPL_MD5 is not set
 CONFIG_CRC8=y
 # CONFIG_SPL_CRC8 is not set
+# CONFIG_SPL_CRC16 is not set
 CONFIG_CRC32=y
 
 #
@@ -2262,7 +2328,7 @@ CONFIG_ERRNO_STR=y
 # CONFIG_HEXDUMP is not set
 CONFIG_GETOPT=y
 CONFIG_OF_LIBFDT=y
-CONFIG_OF_LIBFDT_ASSUME_MASK=0
+CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
 CONFIG_SYS_FDT_PAD=0x3000
 CONFIG_SPL_OF_LIBFDT=y
 CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff
@@ -2273,13 +2339,15 @@ CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff
 CONFIG_GENERATE_SMBIOS_TABLE=y
 # CONFIG_LIB_RATIONAL is not set
 # CONFIG_SPL_LIB_RATIONAL is not set
+CONFIG_SMBIOS=y
 # CONFIG_SMBIOS_PARSER is not set
 CONFIG_EFI_LOADER=y
-CONFIG_CMD_BOOTEFI_BOOTMGR=y
+CONFIG_EFI_BINARY_EXEC=y
+CONFIG_EFI_BOOTMGR=y
 # CONFIG_EFI_VARIABLE_FILE_STORE is not set
 CONFIG_EFI_VARIABLE_NO_STORE=y
 # CONFIG_EFI_VARIABLES_PRESEED is not set
-CONFIG_EFI_VAR_BUF_SIZE=65536
+CONFIG_EFI_VAR_BUF_SIZE=131072
 # CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
 # CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
 # CONFIG_EFI_CAPSULE_ON_DISK is not set
@@ -2297,6 +2365,7 @@ CONFIG_EFI_RNG_PROTOCOL=y
 CONFIG_EFI_LOAD_FILE2_INITRD=y
 CONFIG_EFI_ECPT=y
 CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
+# CONFIG_EFI_HTTP_BOOT is not set
 # CONFIG_OPTEE_LIB is not set
 # CONFIG_OPTEE_IMAGE is not set
 # CONFIG_BOOTM_OPTEE is not set
@@ -2308,15 +2377,11 @@ CONFIG_LMB_MAX_REGIONS=16
 # CONFIG_PHANDLE_CHECK_SEQ is not set
 
 #
-# FWU Multi Bank Updates
-#
-# CONFIG_POST is not set
-
-#
-# Unit tests
+# Testing
 #
 # CONFIG_UNIT_TEST is not set
 # CONFIG_SPL_UNIT_TEST is not set
+# CONFIG_POST is not set
 
 #
 # Tools options
@@ -2324,6 +2389,7 @@ CONFIG_LMB_MAX_REGIONS=16
 CONFIG_MKIMAGE_DTC_PATH="dtc"
 CONFIG_TOOLS_CRC32=y
 CONFIG_TOOLS_LIBCRYPTO=y
+CONFIG_TOOLS_KWBIMAGE=y
 CONFIG_TOOLS_FIT=y
 CONFIG_TOOLS_FIT_FULL_CHECK=y
 CONFIG_TOOLS_FIT_PRINT=y
diff --git a/config/u-boot/gru_kevin/config/default b/config/u-boot/gru_kevin/config/default
index 466bc96d..1bf46d24 100644
--- a/config/u-boot/gru_kevin/config/default
+++ b/config/u-boot/gru_kevin/config/default
@@ -1,13 +1,14 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# U-Boot 2023.10 Configuration
+# U-Boot 2024.07 Configuration
 #
 
 #
-# Compiler: gcc (Debian 13.2.0-5) 13.2.0
+# Compiler: gcc (Debian 13.3.0-2) 13.3.0
 #
 CONFIG_CREATE_ARCH_SYMLINK=y
 CONFIG_SYS_CACHE_SHIFT_6=y
+CONFIG_64BIT=y
 CONFIG_SYS_CACHELINE_SIZE=64
 CONFIG_LINKER_LIST_ALIGN=8
 # CONFIG_ARC is not set
@@ -40,7 +41,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y
 # CONFIG_SYS_ICACHE_OFF is not set
 # CONFIG_SPL_SYS_ICACHE_OFF is not set
 # CONFIG_SYS_DCACHE_OFF is not set
-# CONFIG_SPL_SYS_DCACHE_OFF is not set
+CONFIG_SPL_SYS_DCACHE_OFF=y
 
 #
 # ARM architecture
@@ -53,6 +54,7 @@ CONFIG_INIT_SP_RELATIVE=y
 CONFIG_SYS_INIT_SP_BSS_OFFSET=524288
 CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE=0x18000000
 # CONFIG_GIC_V3_ITS is not set
+# CONFIG_GICV3_SUPPORT_GIC600 is not set
 CONFIG_STATIC_RELA=y
 CONFIG_DMA_ADDR_T_64BIT=y
 CONFIG_ARM_ASM_UNIFIED=y
@@ -81,13 +83,11 @@ CONFIG_ARM64_SUPPORT_AARCH32=y
 # CONFIG_ARCH_KIRKWOOD is not set
 # CONFIG_ARCH_MVEBU is not set
 # CONFIG_ARCH_ORION5X is not set
-# CONFIG_TARGET_STV0991 is not set
 # CONFIG_ARCH_BCM283X is not set
 # CONFIG_ARCH_BCMSTB is not set
 # CONFIG_ARCH_BCMBCA is not set
 # CONFIG_TARGET_VEXPRESS_CA9X4 is not set
 # CONFIG_TARGET_BCMNS is not set
-# CONFIG_TARGET_BCMNS2 is not set
 # CONFIG_TARGET_BCMNS3 is not set
 # CONFIG_ARCH_EXYNOS is not set
 # CONFIG_ARCH_S5PC1XX is not set
@@ -117,7 +117,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y
 # CONFIG_ARCH_APPLE is not set
 # CONFIG_ARCH_OWL is not set
 # CONFIG_ARCH_QEMU is not set
-# CONFIG_ARCH_RMOBILE is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SNAPDRAGON is not set
 # CONFIG_ARCH_SOCFPGA is not set
 # CONFIG_ARCH_SUNXI is not set
@@ -176,6 +176,7 @@ CONFIG_ARCH_ROCKCHIP=y
 # CONFIG_ARCH_ASPEED is not set
 # CONFIG_TARGET_DURIAN is not set
 # CONFIG_TARGET_POMELO is not set
+# CONFIG_TARGET_PE2201 is not set
 # CONFIG_TARGET_PRESIDIO_ASIC is not set
 # CONFIG_TARGET_XENGUEST_ARM64 is not set
 # CONFIG_ARCH_GXP is not set
@@ -194,10 +195,9 @@ CONFIG_SF_DEFAULT_MODE=0x0
 CONFIG_ENV_SIZE=0x8000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_DM_SPI=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-kevin"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-kevin"
 CONFIG_SPL_TEXT_BASE=0xff8c2000
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-# CONFIG_OF_LIBFDT_OVERLAY is not set
+CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
 CONFIG_DM_RESET=y
 CONFIG_SYS_MONITOR_LEN=0
@@ -227,13 +227,15 @@ CONFIG_ROCKCHIP_STIMER=y
 CONFIG_ROCKCHIP_STIMER_BASE=0xff8680a0
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
 # CONFIG_SPL_ROCKCHIP_EARLYRETURN_TO_BROM is not set
+CONFIG_ROCKCHIP_DISABLE_FORCE_JTAG=y
 # CONFIG_SPL_MMC is not set
 CONFIG_ROCKCHIP_SPI_IMAGE=y
+CONFIG_ROCKCHIP_COMMON_STACK_ADDR=y
 CONFIG_SPL_SERIAL=y
 CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
 CONFIG_TPL_TEXT_BASE=0xff8c2000
 CONFIG_TPL_STACK=0xff8effff
-CONFIG_SPL_DRIVERS_MISC=y
+# CONFIG_SPL_DRIVERS_MISC is not set
 CONFIG_SPL_STACK_R_ADDR=0x04000000
 # CONFIG_TARGET_CHROMEBOOK_BOB is not set
 CONFIG_TARGET_CHROMEBOOK_KEVIN=y
@@ -242,16 +244,23 @@ CONFIG_TARGET_CHROMEBOOK_KEVIN=y
 # CONFIG_TARGET_PINEPHONE_PRO_RK3399 is not set
 # CONFIG_TARGET_PUMA_RK3399 is not set
 # CONFIG_TARGET_ROCK960_RK3399 is not set
+# CONFIG_TARGET_ROCKPI4_RK3399 is not set
 # CONFIG_TARGET_ROCKPRO64_RK3399 is not set
 # CONFIG_TARGET_ROC_PC_RK3399 is not set
 CONFIG_SPL_STACK=0xff8effff
 CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xff8e0000
+CONFIG_SPL_BSS_MAX_SIZE=0x10000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_SYS_MALLOC_F=y
 CONFIG_ERR_PTR_OFFSET=0x0
 CONFIG_SPL_SIZE_LIMIT=0x0
 CONFIG_SPL=y
 CONFIG_PRE_CON_BUF_ADDR=0x0f200000
 CONFIG_PRE_CON_BUF_SZ=4096
-CONFIG_BOOTSTAGE_STASH_ADDR=0
+CONFIG_BOOTSTAGE_STASH_ADDR=0x0
 CONFIG_DEBUG_UART_BASE=0xff1a0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -265,7 +274,7 @@ CONFIG_SPL_SPI=y
 # CONFIG_CMO_BY_VA_ONLY is not set
 # CONFIG_ARMV8_SPL_EXCEPTION_VECTORS is not set
 # CONFIG_ARMV8_MULTIENTRY is not set
-# CONFIG_ARMV8_SET_SMPEN is not set
+CONFIG_ARMV8_SET_SMPEN=y
 # CONFIG_ARMV8_SWITCH_TO_EL1 is not set
 
 #
@@ -277,7 +286,9 @@ CONFIG_SPL_SPI=y
 CONFIG_PSCI_RESET=y
 # CONFIG_ARMV8_PSCI is not set
 # CONFIG_ARMV8_EA_EL3_FIRST is not set
-# CONFIG_ARMV8_CRYPTO is not set
+CONFIG_ARMV8_CRYPTO=y
+CONFIG_ARMV8_CE_SHA1=y
+CONFIG_ARMV8_CE_SHA256=y
 # CONFIG_CMD_DEKBLOB is not set
 # CONFIG_IMX_CAAM_DEK_ENCAP is not set
 # CONFIG_IMX_OPTEE_DEK_ENCAP is not set
@@ -285,8 +296,6 @@ CONFIG_PSCI_RESET=y
 # CONFIG_IMX_ELE_DEK_ENCAP is not set
 # CONFIG_CMD_HDMIDETECT is not set
 CONFIG_IMX_DCD_ADDR=0x00910000
-# CONFIG_SPL_LOAD_IMX_CONTAINER is not set
-CONFIG_IMX_CONTAINER_CFG=""
 CONFIG_SYS_MEM_TOP_HIDE=0x0
 CONFIG_SYS_LOAD_ADDR=0x800800
 
@@ -313,7 +322,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
 CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=130200
+CONFIG_GCC_VERSION=130300
 CONFIG_CLANG_VERSION=0
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
@@ -346,6 +355,10 @@ CONFIG_STACK_SIZE=0x1000000
 CONFIG_SYS_SRAM_BASE=0x0
 CONFIG_SYS_SRAM_SIZE=0x0
 # CONFIG_MP is not set
+CONFIG_HAVE_TEXT_BASE=y
+# CONFIG_HAVE_SYS_UBOOT_START is not set
+CONFIG_SYS_UBOOT_START=0x18000000
+# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
 # CONFIG_API is not set
 
 #
@@ -356,8 +369,8 @@ CONFIG_SYS_SRAM_SIZE=0x0
 # Boot images
 #
 # CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_FIT=y
 # CONFIG_TIMESTAMP is not set
+CONFIG_FIT=y
 CONFIG_FIT_EXTERNAL_OFFSET=0x0
 CONFIG_FIT_FULL_CHECK=y
 # CONFIG_FIT_SIGNATURE is not set
@@ -377,6 +390,8 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x0
 CONFIG_SPL_FIT_SOURCE=""
 # CONFIG_USE_SPL_FIT_GENERATOR is not set
 CONFIG_PXE_UTILS=y
+CONFIG_BOOT_DEFAULTS_FEATURES=y
+CONFIG_BOOT_DEFAULTS_CMDS=y
 CONFIG_BOOT_DEFAULTS=y
 CONFIG_BOOTSTD=y
 # CONFIG_SPL_BOOTSTD is not set
@@ -384,9 +399,11 @@ CONFIG_BOOTSTD_FULL=y
 CONFIG_BOOTSTD_DEFAULTS=y
 CONFIG_BOOTSTD_BOOTCOMMAND=y
 CONFIG_BOOTMETH_GLOBAL=y
+# CONFIG_BOOTMETH_CROS is not set
 CONFIG_BOOTMETH_EXTLINUX=y
 CONFIG_BOOTMETH_EXTLINUX_PXE=y
 CONFIG_BOOTMETH_EFILOADER=y
+CONFIG_BOOTMETH_EFI_BOOTMGR=y
 CONFIG_BOOTMETH_VBE=y
 CONFIG_BOOTMETH_DISTRO=y
 # CONFIG_SPL_BOOTMETH_VBE is not set
@@ -398,13 +415,8 @@ CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
 CONFIG_EXPO=y
 CONFIG_BOOTMETH_SCRIPT=y
 CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
 CONFIG_SUPPORT_RAW_INITRD=y
-# CONFIG_OF_BOARD_SETUP is not set
-# CONFIG_OF_SYSTEM_SETUP is not set
-# CONFIG_OF_STDOUT_VIA_ALIAS is not set
-CONFIG_HAVE_TEXT_BASE=y
-# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
-CONFIG_ARCH_FIXUP_FDT_MEMORY=y
 # CONFIG_CHROMEOS is not set
 # CONFIG_CHROMEOS_VBOOT is not set
 # CONFIG_RAMBOOT_PBL is not set
@@ -444,6 +456,17 @@ CONFIG_BOOTDELAY=2
 # Image support
 #
 # CONFIG_IMAGE_PRE_LOAD is not set
+
+#
+# Devicetree fixup
+#
+# CONFIG_OF_ENV_SETUP is not set
+# CONFIG_OF_BOARD_SETUP is not set
+# CONFIG_OF_SYSTEM_SETUP is not set
+# CONFIG_OF_STDOUT_VIA_ALIAS is not set
+# CONFIG_FDT_FIXUP_PARTITIONS is not set
+# CONFIG_FDT_SIMPLEFB is not set
+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
 # CONFIG_USE_BOOTARGS is not set
 # CONFIG_BOOTARGS_SUBST is not set
 CONFIG_USE_BOOTCOMMAND=y
@@ -463,6 +486,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb"
 #
 CONFIG_MENU=y
 # CONFIG_CONSOLE_RECORD is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1044
 # CONFIG_DISABLE_CONSOLE is not set
 CONFIG_LOGLEVEL=4
 CONFIG_SPL_LOGLEVEL=4
@@ -471,6 +496,7 @@ CONFIG_SPL_LOGLEVEL=4
 # CONFIG_TPL_SILENT_CONSOLE is not set
 CONFIG_PRE_CONSOLE_BUFFER=y
 CONFIG_CONSOLE_FLUSH_SUPPORT=y
+# CONFIG_CONSOLE_FLUSH_ON_NEWLINE is not set
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 # CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
@@ -517,7 +543,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_BOARD_LATE_INIT=y
 # CONFIG_CLOCKS is not set
 # CONFIG_HWCONFIG is not set
-# CONFIG_LAST_STAGE_INIT is not set
+CONFIG_LAST_STAGE_INIT=y
 CONFIG_MISC_INIT_R=y
 # CONFIG_SYS_MALLOC_BOOTPARAMS is not set
 # CONFIG_ID_EEPROM is not set
@@ -557,14 +583,11 @@ CONFIG_SUPPORT_TPL=y
 #
 CONFIG_SPL_FRAMEWORK=y
 # CONFIG_SPL_FRAMEWORK_BOARD_INIT_F is not set
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x1e000
 CONFIG_SPL_PAD_TO=0x7f8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xff8e0000
 # CONFIG_SPL_NO_BSS_LIMIT is not set
 CONFIG_SPL_BSS_LIMIT=y
 # CONFIG_SPL_FOOTPRINT_LIMIT is not set
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
 CONFIG_SPL_SYS_STACK_F_CHECK_BYTE=0xaa
 # CONFIG_SPL_SYS_REPORT_STACK_F_USAGE is not set
 # CONFIG_SPL_SHOW_ERRORS is not set
@@ -576,12 +599,11 @@ CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_BOOTROM_SUPPORT is not set
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
+# CONFIG_SPL_LOAD_IMX_CONTAINER is not set
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SPL_SEPARATE_BSS=y
-# CONFIG_SYS_SPL_MALLOC is not set
+# CONFIG_SPL_SYS_MALLOC is not set
 CONFIG_SPL_BANNER_PRINT=y
 # CONFIG_SPL_DISPLAY_PRINT is not set
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
@@ -602,7 +624,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x0
 # CONFIG_SPL_DM_MAILBOX is not set
 # CONFIG_SPL_MEMORY is not set
 # CONFIG_SPL_MPC8XXX_INIT_DDR is not set
-# CONFIG_SPL_MTD_SUPPORT is not set
+# CONFIG_SPL_MTD is not set
 # CONFIG_SPL_MUSB_NEW is not set
 # CONFIG_SPL_NAND_SUPPORT is not set
 # CONFIG_SPL_NAND_DRIVERS is not set
@@ -640,23 +662,21 @@ CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_SPL_TARGET=""
 # CONFIG_TPL is not set
 # CONFIG_VPL is not set
-# CONFIG_FDT_SIMPLEFB is not set
-# CONFIG_BMP is not set
-
-#
-# Command line interface
-#
 CONFIG_CMDLINE=y
 CONFIG_HUSH_PARSER=y
+
+#
+# Hush flavor to use
+#
+CONFIG_HUSH_OLD_PARSER=y
+# CONFIG_HUSH_MODERN_PARSER is not set
 CONFIG_CMDLINE_EDITING=y
 # CONFIG_CMDLINE_PS_SUPPORT is not set
 CONFIG_AUTO_COMPLETE=y
 CONFIG_SYS_LONGHELP=y
 CONFIG_SYS_PROMPT="=> "
 CONFIG_SYS_PROMPT_HUSH_PS2="> "
-CONFIG_SYS_MAXARGS=16
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1044
+CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_XTRACE=y
 
 #
@@ -670,8 +690,10 @@ CONFIG_CMD_BDI=y
 # CONFIG_CMD_BDINFO_EXTRA is not set
 # CONFIG_CMD_CONFIG is not set
 CONFIG_CMD_CONSOLE=y
+# CONFIG_CMD_HISTORY is not set
 # CONFIG_CMD_LICENSE is not set
 # CONFIG_CMD_PMC is not set
+# CONFIG_CMD_SMBIOS is not set
 
 #
 # Boot commands
@@ -693,24 +715,24 @@ CONFIG_BOOTM_PLAN9=y
 CONFIG_BOOTM_RTEMS=y
 CONFIG_CMD_VBE=y
 CONFIG_BOOTM_VXWORKS=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
 CONFIG_CMD_BOOTEFI=y
+CONFIG_CMD_BOOTEFI_BINARY=y
+CONFIG_CMD_BOOTEFI_BOOTMGR=y
 CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
 CONFIG_CMD_BOOTEFI_HELLO=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 CONFIG_CMD_BOOTMENU=y
 # CONFIG_CMD_ADTIMG is not set
 CONFIG_CMD_ELF=y
+# CONFIG_CMD_ELF_FDT_SETUP is not set
 CONFIG_CMD_FDT=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_RUN=y
 CONFIG_CMD_IMI=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_XIMG=y
-# CONFIG_CMD_XXD is not set
+CONFIG_SYS_XIMG_LEN=0x800000
 # CONFIG_CMD_SPL is not set
-# CONFIG_CMD_THOR_DOWNLOAD is not set
-# CONFIG_CMD_ZBOOT is not set
 
 #
 # Environment commands
@@ -776,7 +798,6 @@ CONFIG_CMD_GPIO=y
 # CONFIG_CMD_GPIO_READ is not set
 # CONFIG_CMD_PWM is not set
 CONFIG_CMD_GPT=y
-CONFIG_RANDOM_UUID=y
 # CONFIG_CMD_GPT_RENAME is not set
 # CONFIG_CMD_IDE is not set
 # CONFIG_CMD_IO is not set
@@ -794,8 +815,11 @@ CONFIG_CMD_LOADXY_TIMEOUT=90
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_BKOPS_ENABLE is not set
+# CONFIG_CMD_MMC_REG is not set
 # CONFIG_CMD_MMC_SWRITE is not set
 # CONFIG_CMD_CLONE is not set
+# CONFIG_CMD_MTD is not set
+# CONFIG_CMD_ONENAND is not set
 # CONFIG_CMD_OSD is not set
 CONFIG_CMD_PART=y
 # CONFIG_CMD_PCI is not set
@@ -808,11 +832,12 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SPI=y
 CONFIG_DEFAULT_SPI_BUS=0
-CONFIG_DEFAULT_SPI_MODE=0
+CONFIG_DEFAULT_SPI_MODE=0x0
 # CONFIG_CMD_TSI148 is not set
 # CONFIG_CMD_UNIVERSE is not set
 CONFIG_CMD_USB=y
 # CONFIG_CMD_USB_SDP is not set
+# CONFIG_CMD_RKMTD is not set
 # CONFIG_CMD_WRITE is not set
 
 #
@@ -823,6 +848,7 @@ CONFIG_CMD_ECHO=y
 CONFIG_CMD_ITEST=y
 CONFIG_CMD_SOURCE=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_XXD is not set
 
 #
 # Android support commands
@@ -845,6 +871,7 @@ CONFIG_BOOTP_SUBNETMASK=y
 # CONFIG_CMD_PCAP is not set
 CONFIG_BOOTP_PXE=y
 CONFIG_BOOTP_PXE_CLIENTARCH=0x16
+# CONFIG_BOOTP_PXE_DHCP_OPTION is not set
 CONFIG_BOOTP_VCI_STRING="U-Boot.armv8"
 CONFIG_CMD_TFTPBOOT=y
 # CONFIG_CMD_TFTPPUT is not set
@@ -898,7 +925,6 @@ CONFIG_CMD_VIDCONSOLE=y
 #
 # TI specific command line interface
 #
-# CONFIG_CMD_DDR3 is not set
 
 #
 # Power commands
@@ -933,9 +959,9 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 # CONFIG_CMD_FS_UUID is not set
 # CONFIG_CMD_JFFS2 is not set
+# CONFIG_CMD_MTDPARTS is not set
 CONFIG_MTDIDS_DEFAULT=""
 CONFIG_MTDPARTS_DEFAULT=""
-# CONFIG_CMD_REISER is not set
 # CONFIG_CMD_ZFS is not set
 
 #
@@ -979,16 +1005,18 @@ CONFIG_BINMAN=y
 CONFIG_OF_CONTROL=y
 CONFIG_OF_REAL=y
 CONFIG_SPL_OF_CONTROL=y
-# CONFIG_OF_LIVE is not set
+CONFIG_OF_LIVE=y
+CONFIG_OF_UPSTREAM=y
+# CONFIG_OF_UPSTREAM_BUILD_VENDOR is not set
 CONFIG_OF_SEPARATE=y
 # CONFIG_OF_EMBED is not set
 # CONFIG_OF_BOARD is not set
 # CONFIG_OF_OMIT_DTB is not set
 CONFIG_DEVICE_TREE_INCLUDES=""
-CONFIG_OF_LIST="rk3399-gru-kevin"
+CONFIG_OF_LIST="rockchip/rk3399-gru-kevin"
 # CONFIG_MULTI_DTB_FIT is not set
 # CONFIG_SPL_MULTI_DTB_FIT is not set
-CONFIG_SPL_OF_LIST="rk3399-gru-kevin"
+CONFIG_SPL_OF_LIST="rockchip/rk3399-gru-kevin"
 CONFIG_OF_TAG_MIGRATE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 # CONFIG_OF_DTB_PROPS_REMOVE is not set
@@ -1066,10 +1094,11 @@ CONFIG_SYS_RX_ETH_BUFFER=4
 #
 CONFIG_DM=y
 CONFIG_SPL_DM=y
-CONFIG_DM_WARN=y
+# CONFIG_DM_WARN is not set
 # CONFIG_SPL_DM_WARN is not set
 # CONFIG_DM_DEBUG is not set
 # CONFIG_DM_STATS is not set
+# CONFIG_SPL_DM_STATS is not set
 CONFIG_DM_DEVICE_REMOVE=y
 CONFIG_DM_EVENT=y
 # CONFIG_SPL_DM_DEVICE_REMOVE is not set
@@ -1089,8 +1118,8 @@ CONFIG_SPL_SIMPLE_BUS=y
 CONFIG_OF_TRANSLATE=y
 # CONFIG_SPL_OF_TRANSLATE is not set
 # CONFIG_TRANSLATION_OFFSET is not set
-CONFIG_DM_DEV_READ_INLINE=y
-# CONFIG_OFNODE_MULTI_TREE is not set
+CONFIG_OFNODE_MULTI_TREE=y
+CONFIG_OFNODE_MULTI_TREE_MAX=4
 CONFIG_BOUNCE_BUFFER=y
 CONFIG_ADC=y
 # CONFIG_ADC_EXYNOS is not set
@@ -1119,6 +1148,7 @@ CONFIG_BLOCK_CACHE=y
 # CONFIG_IDE is not set
 # CONFIG_LBA48 is not set
 # CONFIG_SYS_64BIT_LBA is not set
+# CONFIG_RKMTD is not set
 # CONFIG_BOOTCOUNT_LIMIT is not set
 
 #
@@ -1131,9 +1161,10 @@ CONFIG_BLOCK_CACHE=y
 #
 # CONFIG_CACHE is not set
 # CONFIG_L2X0_CACHE is not set
-# CONFIG_V5L2_CACHE is not set
+# CONFIG_ANDES_L2_CACHE is not set
 # CONFIG_NCORE_CACHE is not set
 # CONFIG_SIFIVE_CCACHE is not set
+# CONFIG_SIFIVE_PL2 is not set
 
 #
 # Clock
@@ -1142,6 +1173,8 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 # CONFIG_SPL_CLK_CCF is not set
 # CONFIG_CLK_CCF is not set
+# CONFIG_CLK_GPIO is not set
+# CONFIG_SPL_CLK_GPIO is not set
 # CONFIG_CLK_CDCE9XX is not set
 # CONFIG_CLK_ICS8N3QV01 is not set
 # CONFIG_CLK_K210 is not set
@@ -1266,7 +1299,6 @@ CONFIG_ROCKCHIP_GPIO=y
 # CONFIG_NOMADIK_GPIO is not set
 # CONFIG_ZYNQMP_GPIO_MODEPIN is not set
 # CONFIG_SLG7XL45106_I2C_GPO is not set
-# CONFIG_TURRIS_OMNIA_MCU is not set
 # CONFIG_FTGPIO010 is not set
 # CONFIG_ADP5585_GPIO is not set
 
@@ -1351,6 +1383,7 @@ CONFIG_SPL_MISC=y
 # CONFIG_GATEWORKS_SC is not set
 CONFIG_ROCKCHIP_EFUSE=y
 # CONFIG_ROCKCHIP_OTP is not set
+CONFIG_ROCKCHIP_IODOMAIN=y
 # CONFIG_SIFIVE_OTP is not set
 # CONFIG_SMSC_LPC47M is not set
 # CONFIG_SMSC_SIO1007 is not set
@@ -1370,6 +1403,7 @@ CONFIG_PWRSEQ=y
 # CONFIG_SPL_PWRSEQ is not set
 # CONFIG_PCA9551_LED is not set
 # CONFIG_TEST_DRV is not set
+# CONFIG_TURRIS_OMNIA_MCU is not set
 # CONFIG_USB_HUB_USB251XB is not set
 # CONFIG_TWL4030_LED is not set
 # CONFIG_WINBOND_W83627 is not set
@@ -1385,6 +1419,7 @@ CONFIG_PWRSEQ=y
 # CONFIG_MICROCHIP_FLEXCOM is not set
 # CONFIG_ESM_PMIC is not set
 # CONFIG_SL28CPLD is not set
+# CONFIG_SPL_SOCFPGA_DT_REG is not set
 
 #
 # MMC Host controller Support
@@ -1420,8 +1455,11 @@ CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 # CONFIG_MMC_SDHCI_ADMA is not set
+# CONFIG_MMC_SDHCI_ADMA_FORCE_32BIT is not set
+CONFIG_MMC_SDHCI_ADMA_64BIT=y
 # CONFIG_MMC_SDHCI_BCMSTB is not set
 # CONFIG_MMC_SDHCI_CADENCE is not set
+# CONFIG_MMC_SDHCI_CV1800B is not set
 # CONFIG_MMC_SDHCI_IPROC is not set
 # CONFIG_MMC_SDHCI_F_SDH30 is not set
 # CONFIG_MMC_SDHCI_KONA is not set
@@ -1442,9 +1480,11 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 #
 # MTD Support
 #
-# CONFIG_MTD is not set
+CONFIG_MTD=y
 # CONFIG_DM_MTD is not set
 # CONFIG_MTD_NOR_FLASH is not set
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_SYS_MTDPARTS_RUNTIME is not set
 # CONFIG_FLASH_CFI_DRIVER is not set
 # CONFIG_HBMC_AM654 is not set
 # CONFIG_SAMSUNG_ONENAND is not set
@@ -1464,20 +1504,24 @@ CONFIG_SPI_FLASH_SMART_HWCAPS=y
 # CONFIG_SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT is not set
 # CONFIG_SPI_FLASH_SOFT_RESET is not set
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_LOCK=y
 CONFIG_SPI_FLASH_UNLOCK_ALL=y
 # CONFIG_SPI_FLASH_ATMEL is not set
 # CONFIG_SPI_FLASH_EON is not set
 CONFIG_SPI_FLASH_GIGADEVICE=y
 # CONFIG_SPI_FLASH_ISSI is not set
 # CONFIG_SPI_FLASH_MACRONIX is not set
+# CONFIG_SPI_FLASH_SILICONKAISER is not set
 # CONFIG_SPI_FLASH_SPANSION is not set
 # CONFIG_SPI_FLASH_STMICRO is not set
 # CONFIG_SPI_FLASH_SST is not set
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_SPI_FLASH_XMC is not set
 # CONFIG_SPI_FLASH_XTX is not set
+# CONFIG_SPI_FLASH_ZBIT is not set
 CONFIG_SPI_FLASH_USE_4K_SECTORS=y
 # CONFIG_SPI_FLASH_DATAFLASH is not set
+# CONFIG_SPI_FLASH_MTD is not set
 
 #
 # UBI support
@@ -1538,7 +1582,7 @@ CONFIG_DM_ETH=y
 # CONFIG_DM_MDIO is not set
 # CONFIG_DM_ETH_PHY is not set
 CONFIG_NETDEVICES=y
-# CONFIG_PHY_GIGE is not set
+CONFIG_PHY_GIGE=y
 # CONFIG_ALTERA_TSE is not set
 # CONFIG_BCM_SF2_ETH is not set
 # CONFIG_BCMGENET is not set
@@ -1557,7 +1601,6 @@ CONFIG_ETH_DESIGNWARE=y
 # CONFIG_FTMAC100 is not set
 # CONFIG_FTGMAC100 is not set
 # CONFIG_MCFFEC is not set
-# CONFIG_FSLDMAFEC is not set
 # CONFIG_KS8851_MLL is not set
 # CONFIG_LITEETH is not set
 # CONFIG_MACB is not set
@@ -1586,6 +1629,7 @@ CONFIG_GMAC_ROCKCHIP=y
 # CONFIG_SYS_DPAA_QBMAN is not set
 # CONFIG_TSEC_ENET is not set
 # CONFIG_MEDIATEK_ETH is not set
+# CONFIG_HIFEMAC_ETH is not set
 # CONFIG_HIGMACV300_ETH is not set
 # CONFIG_NVME is not set
 # CONFIG_NVME_APPLE is not set
@@ -1611,6 +1655,7 @@ CONFIG_PHY=y
 # Rockchip PHY driver
 #
 # CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set
+# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 # CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY is not set
 # CONFIG_PHY_ROCKCHIP_PCIE is not set
@@ -1649,6 +1694,8 @@ CONFIG_SPL_PINCONF_RECURSIVE=y
 # CONFIG_PINCTRL_K210 is not set
 CONFIG_PINCTRL_ROCKCHIP=y
 CONFIG_SPL_PINCTRL_ROCKCHIP=y
+# CONFIG_PINCTRL_TEGRA is not set
+# CONFIG_SPL_PINCTRL_TEGRA is not set
 CONFIG_POWER=y
 # CONFIG_POWER_LEGACY is not set
 # CONFIG_ACPI_PMC is not set
@@ -1678,6 +1725,7 @@ CONFIG_SPL_PMIC_CHILDREN=y
 # CONFIG_SPL_DM_PMIC_PCA9450 is not set
 # CONFIG_DM_PMIC_PFUZE100 is not set
 # CONFIG_SPL_DM_PMIC_PFUZE100 is not set
+# CONFIG_DM_PMIC_MAX77663 is not set
 # CONFIG_DM_PMIC_MAX77686 is not set
 # CONFIG_DM_PMIC_MAX8998 is not set
 # CONFIG_DM_PMIC_MC34708 is not set
@@ -1695,12 +1743,14 @@ CONFIG_PMIC_RK8XX=y
 # CONFIG_PMIC_LP873X is not set
 # CONFIG_PMIC_LP87565 is not set
 # CONFIG_DM_PMIC_TPS65910 is not set
+# CONFIG_DM_PMIC_TPS80031 is not set
 # CONFIG_PMIC_STPMIC1 is not set
 # CONFIG_SPL_PMIC_PALMAS is not set
 # CONFIG_SPL_PMIC_LP873X is not set
 # CONFIG_SPL_PMIC_LP87565 is not set
 # CONFIG_PMIC_TPS65941 is not set
 # CONFIG_PMIC_TPS65219 is not set
+# CONFIG_PMIC_RAA215300 is not set
 # CONFIG_PMIC_TPS65217 is not set
 # CONFIG_POWER_TPS65218 is not set
 # CONFIG_POWER_TPS62362 is not set
@@ -1758,6 +1808,7 @@ CONFIG_RAM_ROCKCHIP_DEBUG=y
 #
 # Remote Processor drivers
 #
+CONFIG_REMOTEPROC_MAX_FW_SIZE=0x10000
 
 #
 # Reset Controller Support
@@ -1770,11 +1821,13 @@ CONFIG_RESET_ROCKCHIP=y
 # CONFIG_RESET_SCMI is not set
 # CONFIG_RESET_DRA7 is not set
 CONFIG_DM_RNG=y
+# CONFIG_SPL_DM_RNG is not set
 # CONFIG_RNG_MSM is not set
 # CONFIG_RNG_NPCM is not set
 CONFIG_RNG_ROCKCHIP=y
 # CONFIG_RNG_IPROC200 is not set
 # CONFIG_RNG_SMCCC_TRNG is not set
+# CONFIG_RNG_ARM_RNDR is not set
 
 #
 # Real Time Clock
@@ -1794,9 +1847,9 @@ CONFIG_RNG_ROCKCHIP=y
 # CONFIG_RTC_MC146818 is not set
 # CONFIG_RTC_M41T62 is not set
 # CONFIG_SCSI is not set
-# CONFIG_DM_SCSI is not set
 CONFIG_SERIAL=y
 CONFIG_BAUDRATE=115200
+# CONFIG_DEFAULT_ENV_IS_RW is not set
 CONFIG_REQUIRE_SERIAL_CONSOLE=y
 # CONFIG_SPECIFY_CONSOLE_INDEX is not set
 CONFIG_SERIAL_PRESENT=y
@@ -1838,11 +1891,14 @@ CONFIG_SYS_NS16550_MEM32=y
 # CONFIG_MSM_GENI_SERIAL is not set
 # CONFIG_MXS_AUART_SERIAL is not set
 # CONFIG_OMAP_SERIAL is not set
+# CONFIG_HTIF_CONSOLE is not set
 # CONFIG_SIFIVE_SERIAL is not set
 # CONFIG_ZYNQ_SERIAL is not set
 # CONFIG_MTK_SERIAL is not set
 # CONFIG_MT7620_SERIAL is not set
 # CONFIG_NPCM_SERIAL is not set
+# CONFIG_SM is not set
+# CONFIG_MESON_SM is not set
 # CONFIG_SMEM is not set
 
 #
@@ -1854,6 +1910,7 @@ CONFIG_SYS_NS16550_MEM32=y
 # SOC (System On Chip) specific Drivers
 #
 # CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_SAMSUNG is not set
 # CONFIG_SOC_TI is not set
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
@@ -1867,6 +1924,7 @@ CONFIG_SPI_MEM=y
 # CONFIG_CORTINA_SFLASH is not set
 # CONFIG_CADENCE_QSPI is not set
 # CONFIG_CF_SPI is not set
+# CONFIG_CV1800B_SPIF is not set
 # CONFIG_DESIGNWARE_SPI is not set
 # CONFIG_EXYNOS_SPI is not set
 # CONFIG_FSL_DSPI is not set
@@ -1919,7 +1977,8 @@ CONFIG_ROCKCHIP_SPI=y
 CONFIG_SYSRESET=y
 CONFIG_SPL_SYSRESET=y
 CONFIG_SYSRESET_CMD_RESET=y
-# CONFIG_SYSRESET_CMD_POWEROFF is not set
+CONFIG_SYSRESET_CMD_POWEROFF=y
+# CONFIG_SYSRESET_CV1800B is not set
 # CONFIG_POWEROFF_GPIO is not set
 # CONFIG_SYSRESET_GPIO is not set
 # CONFIG_SYSRESET_PSCI is not set
@@ -1950,9 +2009,8 @@ CONFIG_SPL_DM_USB=y
 CONFIG_USB_HOST=y
 # CONFIG_SPL_USB_HOST is not set
 CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
-CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y
-# CONFIG_USB_XHCI_PCI is not set
+# CONFIG_USB_XHCI_DWC3 is not set
+# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
 # CONFIG_USB_XHCI_FSL is not set
 # CONFIG_USB_XHCI_BRCM is not set
 CONFIG_USB_EHCI_HCD=y
@@ -1977,7 +2035,7 @@ CONFIG_USB_DWC3=y
 # Platform Glue Driver Support
 #
 # CONFIG_USB_DWC3_OMAP is not set
-# CONFIG_USB_DWC3_GENERIC is not set
+CONFIG_USB_DWC3_GENERIC=y
 # CONFIG_SPL_USB_DWC3_GENERIC is not set
 # CONFIG_USB_DWC3_LAYERSCAPE is not set
 
@@ -2046,7 +2104,7 @@ CONFIG_VIDEO=y
 CONFIG_VIDEO_FONT_16X32=y
 CONFIG_VIDEO_LOGO=y
 CONFIG_BACKLIGHT=y
-CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0
+CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x0
 # CONFIG_VIDEO_COPY is not set
 CONFIG_VIDEO_DAMAGE=y
 CONFIG_BACKLIGHT_PWM=y
@@ -2077,9 +2135,11 @@ CONFIG_SIMPLE_PANEL=y
 # CONFIG_VIDEO_LCD_ENDEAVORU is not set
 # CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
 # CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
+# CONFIG_VIDEO_LCD_LG_LD070WX3 is not set
 # CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
 # CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
 # CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
+# CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set
 # CONFIG_VIDEO_LCD_SSD2828 is not set
 # CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
 # CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
@@ -2106,7 +2166,9 @@ CONFIG_DISPLAY_ROCKCHIP_EDP=y
 # CONFIG_VIDEO_TIDSS is not set
 # CONFIG_VIDEO_TEGRA124 is not set
 # CONFIG_VIDEO_BRIDGE is not set
+# CONFIG_VIDEO_BRIDGE_PARADE_DP501 is not set
 # CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825 is not set
+# CONFIG_VIDEO_BRIDGE_TOSHIBA_TC358768 is not set
 # CONFIG_VIDEO_TEGRA20 is not set
 # CONFIG_VIDEO_DSI_TEGRA30 is not set
 # CONFIG_TEGRA_BACKLIGHT_PWM is not set
@@ -2119,6 +2181,7 @@ CONFIG_CONSOLE_SCROLL_LINES=1
 # CONFIG_OSD is not set
 # CONFIG_VIDEO_REMOVE is not set
 # CONFIG_SPLASH_SCREEN is not set
+# CONFIG_BMP is not set
 CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
 CONFIG_VIDEO_BMP_RLE8=y
 # CONFIG_BMP_16BPP is not set
@@ -2183,6 +2246,7 @@ CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
 CONFIG_CHARSET=y
 # CONFIG_DYNAMIC_CRC_TABLE is not set
 CONFIG_LIB_UUID=y
+CONFIG_RANDOM_UUID=y
 CONFIG_SPL_LIB_UUID=y
 # CONFIG_SEMIHOSTING is not set
 # CONFIG_SPL_SEMIHOSTING is not set
@@ -2200,6 +2264,7 @@ CONFIG_LIB_RAND=y
 # CONFIG_LIB_HW_RAND is not set
 CONFIG_SUPPORT_ACPI=y
 # CONFIG_ACPI is not set
+# CONFIG_SPL_ACPI is not set
 # CONFIG_SPL_TINY_MEMSET is not set
 # CONFIG_BITREVERSE is not set
 # CONFIG_TRACE is not set
@@ -2238,6 +2303,7 @@ CONFIG_MD5=y
 # CONFIG_SPL_MD5 is not set
 CONFIG_CRC8=y
 # CONFIG_SPL_CRC8 is not set
+# CONFIG_SPL_CRC16 is not set
 CONFIG_CRC32=y
 
 #
@@ -2262,7 +2328,7 @@ CONFIG_ERRNO_STR=y
 # CONFIG_HEXDUMP is not set
 CONFIG_GETOPT=y
 CONFIG_OF_LIBFDT=y
-CONFIG_OF_LIBFDT_ASSUME_MASK=0
+CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
 CONFIG_SYS_FDT_PAD=0x3000
 CONFIG_SPL_OF_LIBFDT=y
 CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff
@@ -2273,13 +2339,15 @@ CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff
 CONFIG_GENERATE_SMBIOS_TABLE=y
 # CONFIG_LIB_RATIONAL is not set
 # CONFIG_SPL_LIB_RATIONAL is not set
+CONFIG_SMBIOS=y
 # CONFIG_SMBIOS_PARSER is not set
 CONFIG_EFI_LOADER=y
-CONFIG_CMD_BOOTEFI_BOOTMGR=y
+CONFIG_EFI_BINARY_EXEC=y
+CONFIG_EFI_BOOTMGR=y
 # CONFIG_EFI_VARIABLE_FILE_STORE is not set
 CONFIG_EFI_VARIABLE_NO_STORE=y
 # CONFIG_EFI_VARIABLES_PRESEED is not set
-CONFIG_EFI_VAR_BUF_SIZE=65536
+CONFIG_EFI_VAR_BUF_SIZE=131072
 # CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
 # CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
 # CONFIG_EFI_CAPSULE_ON_DISK is not set
@@ -2297,6 +2365,7 @@ CONFIG_EFI_RNG_PROTOCOL=y
 CONFIG_EFI_LOAD_FILE2_INITRD=y
 CONFIG_EFI_ECPT=y
 CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
+# CONFIG_EFI_HTTP_BOOT is not set
 # CONFIG_OPTEE_LIB is not set
 # CONFIG_OPTEE_IMAGE is not set
 # CONFIG_BOOTM_OPTEE is not set
@@ -2308,15 +2377,11 @@ CONFIG_LMB_MAX_REGIONS=16
 # CONFIG_PHANDLE_CHECK_SEQ is not set
 
 #
-# FWU Multi Bank Updates
-#
-# CONFIG_POST is not set
-
-#
-# Unit tests
+# Testing
 #
 # CONFIG_UNIT_TEST is not set
 # CONFIG_SPL_UNIT_TEST is not set
+# CONFIG_POST is not set
 
 #
 # Tools options
@@ -2324,6 +2389,7 @@ CONFIG_LMB_MAX_REGIONS=16
 CONFIG_MKIMAGE_DTC_PATH="dtc"
 CONFIG_TOOLS_CRC32=y
 CONFIG_TOOLS_LIBCRYPTO=y
+CONFIG_TOOLS_KWBIMAGE=y
 CONFIG_TOOLS_FIT=y
 CONFIG_TOOLS_FIT_FULL_CHECK=y
 CONFIG_TOOLS_FIT_PRINT=y
diff --git a/config/u-boot/qemu_arm64_12mb/config/default b/config/u-boot/qemu_arm64_12mb/config/default
index 83c90261..65c6e684 100644
--- a/config/u-boot/qemu_arm64_12mb/config/default
+++ b/config/u-boot/qemu_arm64_12mb/config/default
@@ -1,13 +1,14 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# U-Boot 2023.10 Configuration
+# U-Boot 2024.07 Configuration
 #
 
 #
-# Compiler: gcc (Debian 13.2.0-5) 13.2.0
+# Compiler: gcc (Debian 13.3.0-2) 13.3.0
 #
 CONFIG_CREATE_ARCH_SYMLINK=y
 CONFIG_SYS_CACHE_SHIFT_6=y
+CONFIG_64BIT=y
 CONFIG_SYS_CACHELINE_SIZE=64
 CONFIG_LINKER_LIST_ALIGN=8
 # CONFIG_ARC is not set
@@ -45,6 +46,7 @@ CONFIG_COUNTER_FREQUENCY=0
 CONFIG_POSITION_INDEPENDENT=y
 # CONFIG_INIT_SP_RELATIVE is not set
 # CONFIG_GIC_V3_ITS is not set
+# CONFIG_GICV3_SUPPORT_GIC600 is not set
 CONFIG_STATIC_RELA=y
 CONFIG_DMA_ADDR_T_64BIT=y
 CONFIG_ARM_ASM_UNIFIED=y
@@ -71,13 +73,11 @@ CONFIG_ARM64_SUPPORT_AARCH32=y
 # CONFIG_ARCH_KIRKWOOD is not set
 # CONFIG_ARCH_MVEBU is not set
 # CONFIG_ARCH_ORION5X is not set
-# CONFIG_TARGET_STV0991 is not set
 # CONFIG_ARCH_BCM283X is not set
 # CONFIG_ARCH_BCMSTB is not set
 # CONFIG_ARCH_BCMBCA is not set
 # CONFIG_TARGET_VEXPRESS_CA9X4 is not set
 # CONFIG_TARGET_BCMNS is not set
-# CONFIG_TARGET_BCMNS2 is not set
 # CONFIG_TARGET_BCMNS3 is not set
 # CONFIG_ARCH_EXYNOS is not set
 # CONFIG_ARCH_S5PC1XX is not set
@@ -107,7 +107,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y
 # CONFIG_ARCH_APPLE is not set
 # CONFIG_ARCH_OWL is not set
 CONFIG_ARCH_QEMU=y
-# CONFIG_ARCH_RMOBILE is not set
+# CONFIG_ARCH_RENESAS is not set
 # CONFIG_ARCH_SNAPDRAGON is not set
 # CONFIG_ARCH_SOCFPGA is not set
 # CONFIG_ARCH_SUNXI is not set
@@ -166,6 +166,7 @@ CONFIG_ARCH_QEMU=y
 # CONFIG_ARCH_ASPEED is not set
 # CONFIG_TARGET_DURIAN is not set
 # CONFIG_TARGET_POMELO is not set
+# CONFIG_TARGET_PE2201 is not set
 # CONFIG_TARGET_PRESIDIO_ASIC is not set
 # CONFIG_TARGET_XENGUEST_ARM64 is not set
 # CONFIG_ARCH_GXP is not set
@@ -190,7 +191,7 @@ CONFIG_TARGET_QEMU_ARM_64BIT=y
 CONFIG_ERR_PTR_OFFSET=0x0
 CONFIG_PRE_CON_BUF_ADDR=0x40100000
 CONFIG_PRE_CON_BUF_SZ=4096
-CONFIG_BOOTSTAGE_STASH_ADDR=0
+CONFIG_BOOTSTAGE_STASH_ADDR=0x0
 CONFIG_DEBUG_UART_BASE=0x9000000
 CONFIG_DEBUG_UART_CLOCK=0
 # CONFIG_DEBUG_UART_BOARD_INIT is not set
@@ -247,7 +248,7 @@ CONFIG_AHCI=y
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
 CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=130200
+CONFIG_GCC_VERSION=130300
 CONFIG_CLANG_VERSION=0
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
@@ -276,6 +277,12 @@ CONFIG_STACK_SIZE=0x1000000
 CONFIG_SYS_SRAM_BASE=0x0
 CONFIG_SYS_SRAM_SIZE=0x0
 # CONFIG_MP is not set
+CONFIG_HAVE_TEXT_BASE=y
+# CONFIG_HAVE_SYS_UBOOT_START is not set
+CONFIG_SYS_UBOOT_START=0x50000000
+CONFIG_HAVE_SYS_MONITOR_BASE=y
+CONFIG_SYS_MONITOR_BASE=0x50000000
+# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
 # CONFIG_API is not set
 
 #
@@ -286,8 +293,8 @@ CONFIG_SYS_SRAM_SIZE=0x0
 # Boot images
 #
 # CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_FIT=y
 CONFIG_TIMESTAMP=y
+CONFIG_FIT=y
 CONFIG_FIT_EXTERNAL_OFFSET=0x0
 CONFIG_FIT_FULL_CHECK=y
 CONFIG_FIT_SIGNATURE=y
@@ -299,15 +306,19 @@ CONFIG_FIT_BEST_MATCH=y
 CONFIG_FIT_PRINT=y
 # CONFIG_SPL_LOAD_FIT_FULL is not set
 CONFIG_PXE_UTILS=y
+CONFIG_BOOT_DEFAULTS_FEATURES=y
+CONFIG_BOOT_DEFAULTS_CMDS=y
 CONFIG_BOOT_DEFAULTS=y
 CONFIG_BOOTSTD=y
 CONFIG_BOOTSTD_FULL=y
 CONFIG_BOOTSTD_DEFAULTS=y
 CONFIG_BOOTSTD_BOOTCOMMAND=y
 CONFIG_BOOTMETH_GLOBAL=y
+# CONFIG_BOOTMETH_CROS is not set
 CONFIG_BOOTMETH_EXTLINUX=y
 CONFIG_BOOTMETH_EXTLINUX_PXE=y
 CONFIG_BOOTMETH_EFILOADER=y
+CONFIG_BOOTMETH_EFI_BOOTMGR=y
 CONFIG_BOOTMETH_VBE=y
 CONFIG_BOOTMETH_DISTRO=y
 CONFIG_BOOTMETH_VBE_REQUEST=y
@@ -316,15 +327,9 @@ CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
 CONFIG_EXPO=y
 CONFIG_BOOTMETH_SCRIPT=y
 CONFIG_LEGACY_IMAGE_FORMAT=y
+# CONFIG_MEASURED_BOOT is not set
+CONFIG_SYS_BOOTM_LEN=0x4000000
 CONFIG_SUPPORT_RAW_INITRD=y
-# CONFIG_OF_BOARD_SETUP is not set
-# CONFIG_OF_SYSTEM_SETUP is not set
-# CONFIG_OF_STDOUT_VIA_ALIAS is not set
-CONFIG_HAVE_TEXT_BASE=y
-CONFIG_HAVE_SYS_MONITOR_BASE=y
-CONFIG_SYS_MONITOR_BASE=0x50000000
-# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
-CONFIG_ARCH_FIXUP_FDT_MEMORY=y
 # CONFIG_CHROMEOS is not set
 # CONFIG_CHROMEOS_VBOOT is not set
 # CONFIG_RAMBOOT_PBL is not set
@@ -362,6 +367,17 @@ CONFIG_BOOTDELAY=2
 # Image support
 #
 # CONFIG_IMAGE_PRE_LOAD is not set
+
+#
+# Devicetree fixup
+#
+# CONFIG_OF_ENV_SETUP is not set
+# CONFIG_OF_BOARD_SETUP is not set
+# CONFIG_OF_SYSTEM_SETUP is not set
+# CONFIG_OF_STDOUT_VIA_ALIAS is not set
+# CONFIG_FDT_FIXUP_PARTITIONS is not set
+# CONFIG_FDT_SIMPLEFB is not set
+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
 # CONFIG_USE_BOOTARGS is not set
 # CONFIG_BOOTARGS_SUBST is not set
 CONFIG_USE_BOOTCOMMAND=y
@@ -383,6 +399,8 @@ CONFIG_DEFAULT_FDT_FILE=""
 #
 CONFIG_MENU=y
 # CONFIG_CONSOLE_RECORD is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1044
 # CONFIG_DISABLE_CONSOLE is not set
 CONFIG_LOGLEVEL=4
 # CONFIG_SILENT_CONSOLE is not set
@@ -390,6 +408,7 @@ CONFIG_LOGLEVEL=4
 # CONFIG_TPL_SILENT_CONSOLE is not set
 CONFIG_PRE_CONSOLE_BUFFER=y
 CONFIG_CONSOLE_FLUSH_SUPPORT=y
+# CONFIG_CONSOLE_FLUSH_ON_NEWLINE is not set
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 # CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
@@ -426,7 +445,7 @@ CONFIG_EVENT_DYNAMIC=y
 CONFIG_BOARD_LATE_INIT=y
 # CONFIG_CLOCKS is not set
 # CONFIG_HWCONFIG is not set
-# CONFIG_LAST_STAGE_INIT is not set
+CONFIG_LAST_STAGE_INIT=y
 # CONFIG_MISC_INIT_R is not set
 # CONFIG_SYS_MALLOC_BOOTPARAMS is not set
 # CONFIG_ID_EEPROM is not set
@@ -455,23 +474,21 @@ CONFIG_UPDATE_LOAD_ADDR=0x100000
 #
 # CONFIG_BLOBLIST is not set
 CONFIG_IMAGE_SIGN_INFO=y
-# CONFIG_FDT_SIMPLEFB is not set
-# CONFIG_BMP is not set
-
-#
-# Command line interface
-#
 CONFIG_CMDLINE=y
 CONFIG_HUSH_PARSER=y
+
+#
+# Hush flavor to use
+#
+CONFIG_HUSH_OLD_PARSER=y
+# CONFIG_HUSH_MODERN_PARSER is not set
 CONFIG_CMDLINE_EDITING=y
 # CONFIG_CMDLINE_PS_SUPPORT is not set
 CONFIG_AUTO_COMPLETE=y
 CONFIG_SYS_LONGHELP=y
 CONFIG_SYS_PROMPT="=> "
 CONFIG_SYS_PROMPT_HUSH_PS2="> "
-CONFIG_SYS_MAXARGS=16
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
+CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_XTRACE=y
 
 #
@@ -485,8 +502,10 @@ CONFIG_CMD_BDI=y
 # CONFIG_CMD_BDINFO_EXTRA is not set
 # CONFIG_CMD_CONFIG is not set
 CONFIG_CMD_CONSOLE=y
+# CONFIG_CMD_HISTORY is not set
 # CONFIG_CMD_LICENSE is not set
 # CONFIG_CMD_PMC is not set
+CONFIG_CMD_SMBIOS=y
 
 #
 # Boot commands
@@ -508,23 +527,23 @@ CONFIG_BOOTM_PLAN9=y
 CONFIG_BOOTM_RTEMS=y
 CONFIG_CMD_VBE=y
 CONFIG_BOOTM_VXWORKS=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
 CONFIG_CMD_BOOTEFI=y
+CONFIG_CMD_BOOTEFI_BINARY=y
+CONFIG_CMD_BOOTEFI_BOOTMGR=y
 CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
 CONFIG_CMD_BOOTEFI_HELLO=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 # CONFIG_CMD_BOOTMENU is not set
 # CONFIG_CMD_ADTIMG is not set
 CONFIG_CMD_ELF=y
+# CONFIG_CMD_ELF_FDT_SETUP is not set
 CONFIG_CMD_FDT=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_RUN=y
 CONFIG_CMD_IMI=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_XIMG=y
-# CONFIG_CMD_XXD is not set
-# CONFIG_CMD_THOR_DOWNLOAD is not set
-# CONFIG_CMD_ZBOOT is not set
+CONFIG_SYS_XIMG_LEN=0x800000
 
 #
 # Environment commands
@@ -549,10 +568,8 @@ CONFIG_CMD_NVEDIT_EFI=y
 # Memory commands
 #
 # CONFIG_CMD_BINOP is not set
-# CONFIG_CMD_BLOBLIST is not set
 CONFIG_CMD_CRC32=y
 # CONFIG_CRC32_VERIFY is not set
-# CONFIG_CMD_EEPROM is not set
 # CONFIG_LOOPW is not set
 # CONFIG_CMD_MD5SUM is not set
 # CONFIG_CMD_MEMINFO is not set
@@ -576,6 +593,7 @@ CONFIG_CMD_UNZIP=y
 # Device access commands
 #
 # CONFIG_CMD_ARMFLASH is not set
+# CONFIG_CMD_BCB is not set
 # CONFIG_CMD_BIND is not set
 # CONFIG_CMD_CLK is not set
 # CONFIG_CMD_DEMO is not set
@@ -586,7 +604,6 @@ CONFIG_CMD_FLASH=y
 # CONFIG_CMD_FUSE is not set
 # CONFIG_CMD_GPIO is not set
 # CONFIG_CMD_GPT is not set
-# CONFIG_RANDOM_UUID is not set
 # CONFIG_CMD_IDE is not set
 # CONFIG_CMD_IO is not set
 # CONFIG_CMD_IOTRACE is not set
@@ -602,6 +619,7 @@ CONFIG_CMD_LOADXY_TIMEOUT=90
 # CONFIG_CMD_MBR is not set
 # CONFIG_CMD_CLONE is not set
 CONFIG_CMD_MTD=y
+# CONFIG_CMD_MTD_OTP is not set
 CONFIG_CMD_NVME=y
 # CONFIG_CMD_ONENAND is not set
 # CONFIG_CMD_OSD is not set
@@ -617,6 +635,7 @@ CONFIG_CMD_SCSI=y
 # CONFIG_CMD_UNIVERSE is not set
 CONFIG_CMD_USB=y
 # CONFIG_CMD_USB_SDP is not set
+# CONFIG_CMD_RKMTD is not set
 CONFIG_CMD_VIRTIO=y
 # CONFIG_CMD_WRITE is not set
 
@@ -629,6 +648,7 @@ CONFIG_CMD_ITEST=y
 CONFIG_CMD_SOURCE=y
 CONFIG_CMD_SETEXPR=y
 # CONFIG_CMD_SETEXPR_FMT is not set
+# CONFIG_CMD_XXD is not set
 
 #
 # Android support commands
@@ -651,6 +671,7 @@ CONFIG_BOOTP_SUBNETMASK=y
 # CONFIG_CMD_PCAP is not set
 CONFIG_BOOTP_PXE=y
 CONFIG_BOOTP_PXE_CLIENTARCH=0x16
+# CONFIG_BOOTP_PXE_DHCP_OPTION is not set
 CONFIG_BOOTP_VCI_STRING="U-Boot.armv8"
 CONFIG_CMD_TFTPBOOT=y
 # CONFIG_CMD_TFTPPUT is not set
@@ -704,7 +725,6 @@ CONFIG_CMD_VIDCONSOLE=y
 #
 # TI specific command line interface
 #
-# CONFIG_CMD_DDR3 is not set
 
 #
 # Power commands
@@ -743,7 +763,6 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_CMD_MTDPARTS=y
 # CONFIG_CMD_MTDPARTS_SPREAD is not set
 # CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES is not set
-# CONFIG_CMD_REISER is not set
 # CONFIG_CMD_ZFS is not set
 
 #
@@ -775,6 +794,7 @@ CONFIG_SUPPORT_OF_CONTROL=y
 CONFIG_OF_CONTROL=y
 CONFIG_OF_REAL=y
 # CONFIG_OF_LIVE is not set
+# CONFIG_OF_UPSTREAM is not set
 CONFIG_OF_SEPARATE=y
 # CONFIG_OF_EMBED is not set
 CONFIG_OF_BOARD=y
@@ -854,7 +874,7 @@ CONFIG_SYS_RX_ETH_BUFFER=4
 # Generic Driver Options
 #
 CONFIG_DM=y
-CONFIG_DM_WARN=y
+# CONFIG_DM_WARN is not set
 # CONFIG_DM_DEBUG is not set
 # CONFIG_DM_STATS is not set
 CONFIG_DM_DEVICE_REMOVE=y
@@ -872,11 +892,6 @@ CONFIG_DM_DEV_READ_INLINE=y
 # CONFIG_OFNODE_MULTI_TREE is not set
 # CONFIG_BOUNCE_BUFFER is not set
 # CONFIG_ADC is not set
-# CONFIG_ADC_EXYNOS is not set
-# CONFIG_ADC_SANDBOX is not set
-# CONFIG_SARADC_MESON is not set
-# CONFIG_SARADC_ROCKCHIP is not set
-# CONFIG_ADC_IMX93 is not set
 # CONFIG_SATA is not set
 CONFIG_LIBATA=y
 CONFIG_SCSI_AHCI=y
@@ -901,6 +916,7 @@ CONFIG_BLOCK_CACHE=y
 # CONFIG_IDE is not set
 # CONFIG_LBA48 is not set
 # CONFIG_SYS_64BIT_LBA is not set
+# CONFIG_RKMTD is not set
 # CONFIG_BOOTCOUNT_LIMIT is not set
 
 #
@@ -913,9 +929,10 @@ CONFIG_BLOCK_CACHE=y
 #
 # CONFIG_CACHE is not set
 # CONFIG_L2X0_CACHE is not set
-# CONFIG_V5L2_CACHE is not set
+# CONFIG_ANDES_L2_CACHE is not set
 # CONFIG_NCORE_CACHE is not set
 # CONFIG_SIFIVE_CCACHE is not set
+# CONFIG_SIFIVE_PL2 is not set
 
 #
 # Clock
@@ -955,11 +972,11 @@ CONFIG_DFU_TFTP=y
 # CONFIG_DFU_TIMEOUT is not set
 CONFIG_DFU_MTD=y
 CONFIG_DFU_RAM=y
-# CONFIG_DFU_SF is not set
 # CONFIG_DFU_VIRT is not set
 CONFIG_SET_DFU_ALT_INFO=y
 CONFIG_SYS_DFU_DATA_BUF_SIZE=0x800000
 CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000
+CONFIG_DFU_NAME_MAX_SIZE=32
 
 #
 # DMA Support
@@ -1082,6 +1099,7 @@ CONFIG_DM_KEYBOARD=y
 # CONFIG_WINBOND_W83627 is not set
 CONFIG_QFW=y
 CONFIG_QFW_MMIO=y
+CONFIG_QFW_SMBIOS=y
 # CONFIG_FS_LOADER is not set
 
 #
@@ -1177,7 +1195,6 @@ CONFIG_E1000=y
 # CONFIG_FTMAC100 is not set
 # CONFIG_FTGMAC100 is not set
 # CONFIG_MCFFEC is not set
-# CONFIG_FSLDMAFEC is not set
 # CONFIG_KS8851_MLL is not set
 # CONFIG_LITEETH is not set
 # CONFIG_MACB is not set
@@ -1206,6 +1223,7 @@ CONFIG_E1000=y
 # CONFIG_SYS_DPAA_QBMAN is not set
 # CONFIG_TSEC_ENET is not set
 # CONFIG_MEDIATEK_ETH is not set
+# CONFIG_HIFEMAC_ETH is not set
 # CONFIG_HIGMACV300_ETH is not set
 CONFIG_NVME=y
 # CONFIG_NVME_APPLE is not set
@@ -1219,6 +1237,7 @@ CONFIG_PCI_ENHANCED_ALLOCATION=y
 # CONFIG_PCI_ARID is not set
 CONFIG_PCIE_ECAM_GENERIC=y
 # CONFIG_PCIE_ECAM_SYNQUACER is not set
+# CONFIG_PCI_FTPCI100 is not set
 # CONFIG_PCI_PHYTIUM is not set
 # CONFIG_PCIE_FSL is not set
 # CONFIG_PCI_MPC85XX is not set
@@ -1253,6 +1272,7 @@ CONFIG_PCIE_ECAM_GENERIC=y
 # Pin controllers
 #
 # CONFIG_PINCTRL is not set
+# CONFIG_PINCTRL_TEGRA is not set
 CONFIG_POWER=y
 # CONFIG_POWER_LEGACY is not set
 # CONFIG_ACPI_PMC is not set
@@ -1282,6 +1302,7 @@ CONFIG_POWER=y
 #
 # Remote Processor drivers
 #
+CONFIG_REMOTEPROC_MAX_FW_SIZE=0x10000
 
 #
 # Reset Controller Support
@@ -1292,6 +1313,7 @@ CONFIG_DM_RNG=y
 # CONFIG_RNG_NPCM is not set
 # CONFIG_RNG_IPROC200 is not set
 # CONFIG_RNG_SMCCC_TRNG is not set
+# CONFIG_RNG_ARM_RNDR is not set
 CONFIG_TPM_RNG=y
 
 #
@@ -1305,6 +1327,7 @@ CONFIG_DM_RTC=y
 # CONFIG_RTC_DS1338 is not set
 # CONFIG_RTC_DS3231 is not set
 # CONFIG_RTC_EMULATION is not set
+# CONFIG_RTC_GOLDFISH is not set
 # CONFIG_RTC_ISL1208 is not set
 # CONFIG_RTC_PCF8563 is not set
 # CONFIG_RTC_PT7C4338 is not set
@@ -1321,9 +1344,9 @@ CONFIG_RTC_PL031=y
 # CONFIG_RTC_STM32 is not set
 # CONFIG_RTC_ABX80X is not set
 CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
 CONFIG_SERIAL=y
 CONFIG_BAUDRATE=115200
+# CONFIG_DEFAULT_ENV_IS_RW is not set
 CONFIG_REQUIRE_SERIAL_CONSOLE=y
 # CONFIG_SPECIFY_CONSOLE_INDEX is not set
 CONFIG_SERIAL_PRESENT=y
@@ -1354,16 +1377,20 @@ CONFIG_DEBUG_UART_SHIFT=2
 # CONFIG_SYS_NS16550 is not set
 CONFIG_PL01X_SERIAL=y
 # CONFIG_ROCKCHIP_SERIAL is not set
+# CONFIG_SEMIHOSTING_SERIAL is not set
 # CONFIG_XILINX_UARTLITE is not set
 # CONFIG_MSM_SERIAL is not set
 # CONFIG_MSM_GENI_SERIAL is not set
 # CONFIG_MXS_AUART_SERIAL is not set
 # CONFIG_OMAP_SERIAL is not set
+# CONFIG_HTIF_CONSOLE is not set
 # CONFIG_SIFIVE_SERIAL is not set
 # CONFIG_ZYNQ_SERIAL is not set
 # CONFIG_MTK_SERIAL is not set
 # CONFIG_MT7620_SERIAL is not set
 # CONFIG_NPCM_SERIAL is not set
+# CONFIG_SM is not set
+# CONFIG_MESON_SM is not set
 # CONFIG_SMEM is not set
 
 #
@@ -1376,6 +1403,7 @@ CONFIG_PL01X_SERIAL=y
 # SOC (System On Chip) specific Drivers
 #
 # CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_SAMSUNG is not set
 # CONFIG_SOC_TI is not set
 # CONFIG_SPI is not set
 
@@ -1391,6 +1419,7 @@ CONFIG_PL01X_SERIAL=y
 CONFIG_SYSRESET=y
 CONFIG_SYSRESET_CMD_RESET=y
 CONFIG_SYSRESET_CMD_POWEROFF=y
+# CONFIG_SYSRESET_CV1800B is not set
 CONFIG_SYSRESET_PSCI=y
 # CONFIG_SYSRESET_SYSCON is not set
 # CONFIG_SYSRESET_WATCHDOG is not set
@@ -1527,9 +1556,11 @@ CONFIG_VIDEO_BOCHS_SIZE_Y=1024
 # CONFIG_VIDEO_LCD_ENDEAVORU is not set
 # CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
 # CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
+# CONFIG_VIDEO_LCD_LG_LD070WX3 is not set
 # CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
 # CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
 # CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
+# CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set
 # CONFIG_VIDEO_LCD_SSD2828 is not set
 # CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
 # CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
@@ -1557,6 +1588,7 @@ CONFIG_CONSOLE_SCROLL_LINES=1
 # CONFIG_OSD is not set
 # CONFIG_VIDEO_REMOVE is not set
 # CONFIG_SPLASH_SCREEN is not set
+# CONFIG_BMP is not set
 CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
 CONFIG_VIDEO_BMP_RLE8=y
 # CONFIG_BMP_16BPP is not set
@@ -1623,7 +1655,9 @@ CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
 CONFIG_CHARSET=y
 # CONFIG_DYNAMIC_CRC_TABLE is not set
 CONFIG_LIB_UUID=y
-# CONFIG_SEMIHOSTING is not set
+# CONFIG_RANDOM_UUID is not set
+CONFIG_SEMIHOSTING=y
+CONFIG_SEMIHOSTING_FALLBACK=y
 CONFIG_PRINTF=y
 CONFIG_SPRINTF=y
 CONFIG_STRTO=y
@@ -1685,22 +1719,24 @@ CONFIG_VPL_LZMA=y
 CONFIG_HEXDUMP=y
 # CONFIG_GETOPT is not set
 CONFIG_OF_LIBFDT=y
-CONFIG_OF_LIBFDT_ASSUME_MASK=0
+CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
 CONFIG_SYS_FDT_PAD=0x3000
-# CONFIG_FDT_FIXUP_PARTITIONS is not set
 
 #
 # System tables
 #
 CONFIG_GENERATE_SMBIOS_TABLE=y
 # CONFIG_LIB_RATIONAL is not set
+CONFIG_SMBIOS=y
 CONFIG_SMBIOS_PARSER=y
 CONFIG_EFI_LOADER=y
-CONFIG_CMD_BOOTEFI_BOOTMGR=y
+CONFIG_EFI_BINARY_EXEC=y
+CONFIG_EFI_BOOTMGR=y
 CONFIG_EFI_VARIABLE_FILE_STORE=y
+# CONFIG_EFI_RT_VOLATILE_STORE is not set
 # CONFIG_EFI_VARIABLE_NO_STORE is not set
 # CONFIG_EFI_VARIABLES_PRESEED is not set
-CONFIG_EFI_VAR_BUF_SIZE=65536
+CONFIG_EFI_VAR_BUF_SIZE=131072
 CONFIG_EFI_GET_TIME=y
 CONFIG_EFI_SET_TIME=y
 # CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
@@ -1724,6 +1760,7 @@ CONFIG_EFI_LOAD_FILE2_INITRD=y
 # CONFIG_EFI_SECURE_BOOT is not set
 CONFIG_EFI_ECPT=y
 CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
+# CONFIG_EFI_HTTP_BOOT is not set
 # CONFIG_OPTEE_LIB is not set
 # CONFIG_OPTEE_IMAGE is not set
 # CONFIG_BOOTM_OPTEE is not set
@@ -1736,14 +1773,10 @@ CONFIG_LMB_MAX_REGIONS=16
 # CONFIG_PHANDLE_CHECK_SEQ is not set
 
 #
-# FWU Multi Bank Updates
-#
-# CONFIG_POST is not set
-
-#
-# Unit tests
+# Testing
 #
 # CONFIG_UNIT_TEST is not set
+# CONFIG_POST is not set
 
 #
 # Tools options
@@ -1751,6 +1784,7 @@ CONFIG_LMB_MAX_REGIONS=16
 CONFIG_MKIMAGE_DTC_PATH="dtc"
 CONFIG_TOOLS_CRC32=y
 CONFIG_TOOLS_LIBCRYPTO=y
+CONFIG_TOOLS_KWBIMAGE=y
 CONFIG_TOOLS_FIT=y
 CONFIG_TOOLS_FIT_FULL_CHECK=y
 CONFIG_TOOLS_FIT_PRINT=y

From 0cc7736b40d4634dd1e54aa6cc8ee116565e63bc Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Wed, 10 Jul 2024 18:03:08 +0300
Subject: [PATCH 0760/1549] u-boot: Avoid breaking build for U-Boot-only binman
 images

Commit 46e01c0e1dad ("u-boot: Avoid building U-Boot-only binman images")
added a patch that prevents an error while building U-Boot, due to some
U-Boot images needing a copy of BL31 that we are not passing in.

Removing build instructions for these images isn't really necessary,
when we can instead tell the build tool that it shouldn't exit with an
error. It checks a BINMAN_ALLOW_MISSING environment variable for this,
but just unconditionally replace the check with the argument.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 ...gnore-missing-input-files-for-binman.patch | 34 +++++++++++++++++++
 1 file changed, 34 insertions(+)
 create mode 100644 config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch

diff --git a/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch b/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch
new file mode 100644
index 00000000..e1a26bb4
--- /dev/null
+++ b/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch
@@ -0,0 +1,34 @@
+From ba34d29274c23c52be957ea040539dccbab09765 Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Wed, 10 Jul 2024 17:37:56 +0300
+Subject: [PATCH] HACK: Makefile: Ignore missing input files for binman images
+
+For Rockchip boards binman tries to build SPI and MMC images that
+require an externally built BL31 file to be provided, and the build
+fails otherwise.
+
+Some downstreams only care about build outputs for U-Boot proper. As a
+hack to make sure they can do so without passing in a BL31 file, tell
+binman to ignore missing input files.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+ Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/Makefile b/Makefile
+index 1c754ceb5953..fec8d9b2d2b1 100644
+--- a/Makefile
++++ b/Makefile
+@@ -1375,7 +1375,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \
+                 --toolpath $(objtree)/tools \
+ 		$(if $(BINMAN_VERBOSE),-v$(BINMAN_VERBOSE)) \
+ 		build -u -d u-boot.dtb -O . -m \
+-		--allow-missing $(if $(BINMAN_ALLOW_MISSING),--ignore-missing) \
++		--allow-missing --ignore-missing \
+ 		-I . -I $(srctree) -I $(srctree)/board/$(BOARDDIR) \
+ 		-I $(dt_dir) -a of-list=$(CONFIG_OF_LIST) \
+ 		$(foreach f,$(BINMAN_INDIRS),-I $(f)) \
+-- 
+2.45.2
+

From 708fc14c605b4d95a80e2476485387551a62d095 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Wed, 10 Jul 2024 18:04:13 +0300
Subject: [PATCH 0761/1549] u-boot: Fix display initialization on gru boards

U-Boot has migrated to using upstream device-tree files for gru boards,
but the clock driver doesn't yet support setting rates for a certain
clock that upstream uses for the eDP display. It happens to work without
it, so for now remove the clock setting until the driver is fixed.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 ...Remove-assigned-clock-dt-properties-.patch | 36 +++++++++++++++++++
 1 file changed, 36 insertions(+)
 create mode 100644 config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch

diff --git a/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch b/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch
new file mode 100644
index 00000000..73789811
--- /dev/null
+++ b/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch
@@ -0,0 +1,36 @@
+From 1107dc81b24743e77374f1b484a843d81fa0348a Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Wed, 10 Jul 2024 14:32:19 +0300
+Subject: [PATCH] HACK: rk3399: gru: Remove assigned clock dt properties for
+ EDP node
+
+Having the PCLK_EDP clock in the assigned-clocks property of the `edp`
+node means that U-Boot tries to set its rate automatically. This clock
+isn't implemented for the RK3399 clock driver, so it fails and prevents
+display from being initialized.
+
+The display happens to work fine without it, remove the property until
+the clock driver can handle the clock.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+ arch/arm/dts/rk3399-gru-u-boot.dtsi | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi
+index 487dde38d86a..30cfb58aca12 100644
+--- a/arch/arm/dts/rk3399-gru-u-boot.dtsi
++++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi
+@@ -28,6 +28,9 @@ &cros_ec {
+ 
+ &edp {
+ 	rockchip,panel = <&edp_panel>;
++
++	/delete-property/ assigned-clocks;
++	/delete-property/ assigned-clock-rates;
+ };
+ 
+ &pp1800_audio {
+-- 
+2.45.2
+

From 373c2eb23dfed9ca0cef80321e7d57ddaf550d35 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 13 Jul 2024 23:07:45 +0100
Subject: [PATCH 0762/1549] trees: move dependency building to new function

configure_project is a bit big. move the dependencies
build logic to a new function.

it may be desirable in future to make the way that
function works the way all build commands are done.

for example:

./update trees -b coreboot x230_12mb

would become:

./update trees -b coreboot/x230_12mb

this would enable to mix and match multi/single tree
projects. for now, leave things as they are.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 21 ++++++++++++---------
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/script/trees b/script/trees
index a260cf24..db5f52b6 100755
--- a/script/trees
+++ b/script/trees
@@ -139,21 +139,24 @@ configure_project()
 	[ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1
 	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
 
-	if [ -z "$mode" ]; then
-		for bd in $build_depend; do
-			bd_p="${bd%%/*}"; bd_t="${bd##*/}"
-			[ -z "$bd_p" ] && $dry $err "$project/$tree: !bd '$bd'"
-			[ "${bd##*/}" = "$bd" ] && bd_t=""
-			[ -z "$bd_p" ] || $dry ./update trees -b $bd_p $bd_t \
-			    || $err "!mk $project/$tree $bd_p/$bd_t"
-		done
-	fi
+	[ -z "$mode" ] && build_dependencies
 
 	[ "$mode" = "fetch" ] || x_ ./update trees -f "$project" $target
 	[ "$mode" = "fetch" ] || return 0
 	[ -f "CHANGELOG" ] && return 1; fetch_${cmd#build_}; return 1
 }
 
+build_dependencies()
+{
+	for bd in $build_depend; do
+		bd_p="${bd%%/*}"; bd_t="${bd##*/}"
+		[ -z "$bd_p" ] && $dry $err "$project/$tree: !bd '$bd'"
+		[ "${bd##*/}" = "$bd" ] && bd_t=""
+		[ -z "$bd_p" ] || $dry ./update trees -b $bd_p $bd_t \
+		    || $err "!mk $project/$tree $bd_p/$bd_t"; continue
+	done; return 0
+}
+
 check_cross_compiler()
 {
 	for _xarch in $xarch; do

From f367afabc1a9c35cee749efe5540af09914f14e2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 16 Jul 2024 03:57:08 +0100
Subject: [PATCH 0763/1549] remove util/autoport

upstream has merged all of the changes that it contained,
so we don't need this anymore. we'll have the newer upstream
changes on the next general revision updates for coreboot,
within config/coreboot/

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees                       |   2 +
 util/autoport/azalia.go            |  67 ---
 util/autoport/bd82x6x.go           | 337 -----------
 util/autoport/description.md       |   1 -
 util/autoport/ec_fixme.go          |  91 ---
 util/autoport/ec_lenovo.go         | 245 --------
 util/autoport/ec_none.go           |  24 -
 util/autoport/go.mod               |   1 -
 util/autoport/gpio_common.go       | 113 ----
 util/autoport/haswell.go           | 139 -----
 util/autoport/log_maker.go         | 190 ------
 util/autoport/log_reader.go        | 417 -------------
 util/autoport/lynxpoint.go         | 490 ---------------
 util/autoport/lynxpoint_lp_gpio.go | 252 --------
 util/autoport/main.go              | 915 -----------------------------
 util/autoport/rce823.go            |  39 --
 util/autoport/readme.md            | 457 --------------
 util/autoport/root.go              |  47 --
 util/autoport/sandybridge.go       |  93 ---
 19 files changed, 2 insertions(+), 3918 deletions(-)
 delete mode 100644 util/autoport/azalia.go
 delete mode 100644 util/autoport/bd82x6x.go
 delete mode 100644 util/autoport/description.md
 delete mode 100644 util/autoport/ec_fixme.go
 delete mode 100644 util/autoport/ec_lenovo.go
 delete mode 100644 util/autoport/ec_none.go
 delete mode 100644 util/autoport/go.mod
 delete mode 100644 util/autoport/gpio_common.go
 delete mode 100644 util/autoport/haswell.go
 delete mode 100644 util/autoport/log_maker.go
 delete mode 100644 util/autoport/log_reader.go
 delete mode 100644 util/autoport/lynxpoint.go
 delete mode 100644 util/autoport/lynxpoint_lp_gpio.go
 delete mode 100644 util/autoport/main.go
 delete mode 100644 util/autoport/rce823.go
 delete mode 100644 util/autoport/readme.md
 delete mode 100644 util/autoport/root.go
 delete mode 100644 util/autoport/sandybridge.go

diff --git a/script/trees b/script/trees
index db5f52b6..a7e53a69 100755
--- a/script/trees
+++ b/script/trees
@@ -118,6 +118,7 @@ configure_project()
 {
 	eval `setvars "" xarch xlang build_depend autoconfargs xtree postmake \
 	    tree_depend makeargs btype mkhelper bootstrapargs premake release`
+
 	[ -f "$1/target.cfg" ] || btype="auto"
 	[ -f "$datadir/mkhelper.cfg" ] && eval `setcfg "$datadir/mkhelper.cfg"`
 
@@ -143,6 +144,7 @@ configure_project()
 
 	[ "$mode" = "fetch" ] || x_ ./update trees -f "$project" $target
 	[ "$mode" = "fetch" ] || return 0
+
 	[ -f "CHANGELOG" ] && return 1; fetch_${cmd#build_}; return 1
 }
 
diff --git a/util/autoport/azalia.go b/util/autoport/azalia.go
deleted file mode 100644
index 6dd78b1e..00000000
--- a/util/autoport/azalia.go
+++ /dev/null
@@ -1,67 +0,0 @@
-package main
-
-import (
-	"fmt"
-	"sort"
-)
-
-type azalia struct {
-}
-
-func (i azalia) Scan(ctx Context, addr PCIDevData) {
-	az := Create(ctx, "hda_verb.c")
-	defer az.Close()
-
-	Add_gpl(az)
-	az.WriteString(
-		`#include <device/azalia_device.h>
-
-const u32 cim_verb_data[] = {
-`)
-
-	for _, codec := range ctx.InfoSource.GetAzaliaCodecs() {
-		fmt.Fprintf(az, "\t0x%08x,\t/* Codec Vendor / Device ID: %s */\n",
-			codec.VendorID, codec.Name)
-		fmt.Fprintf(az, "\t0x%08x,\t/* Subsystem ID */\n",
-			codec.SubsystemID)
-		fmt.Fprintf(az, "\t%d,\t\t/* Number of 4 dword sets */\n",
-			len(codec.PinConfig)+1)
-		fmt.Fprintf(az, "\tAZALIA_SUBVENDOR(%d, 0x%08x),\n",
-			codec.CodecNo, codec.SubsystemID)
-
-		keys := []int{}
-		for nid, _ := range codec.PinConfig {
-			keys = append(keys, nid)
-		}
-
-		sort.Ints(keys)
-
-		for _, nid := range keys {
-			fmt.Fprintf(az, "\tAZALIA_PIN_CFG(%d, 0x%02x, 0x%08x),\n",
-				codec.CodecNo, nid, codec.PinConfig[nid])
-		}
-		az.WriteString("\n");
-	}
-
-	az.WriteString(
-		`};
-
-const u32 pc_beep_verbs[0] = {};
-
-AZALIA_ARRAY_SIZES;
-`)
-
-	PutPCIDev(addr, "")
-}
-
-func init() {
-	/* I82801GX/I945 */
-	RegisterPCI(0x8086, 0x27d8, azalia{})
-	/* BD82X6X/sandybridge */
-	RegisterPCI(0x8086, 0x1c20, azalia{})
-	/* C216/ivybridge */
-	RegisterPCI(0x8086, 0x1e20, azalia{})
-	/* Lynx Point */
-	RegisterPCI(0x8086, 0x8c20, azalia{})
-	RegisterPCI(0x8086, 0x9c20, azalia{})
-}
diff --git a/util/autoport/bd82x6x.go b/util/autoport/bd82x6x.go
deleted file mode 100644
index 8c418e30..00000000
--- a/util/autoport/bd82x6x.go
+++ /dev/null
@@ -1,337 +0,0 @@
-package main
-
-import "fmt"
-
-type bd82x6x struct {
-	variant string
-	node    *DevTreeNode
-}
-
-func IsPCIeHotplug(ctx Context, port int) bool {
-	portDev, ok := PCIMap[PCIAddr{Bus: 0, Dev: 0x1c, Func: port}]
-	if !ok {
-		return false
-	}
-	return (portDev.ConfigDump[0xdb] & (1 << 6)) != 0
-}
-
-func ich9GetFlashSize(ctx Context) {
-	inteltool := ctx.InfoSource.GetInteltool()
-	switch (inteltool.RCBA[0x3410] >> 10) & 3 {
-	/* SPI. All boards I've seen with sandy/ivy use SPI.  */
-	case 3:
-		ROMProtocol = "SPI"
-		highflkb := uint32(0)
-		for reg := uint16(0); reg < 5; reg++ {
-			fl := (inteltool.RCBA[0x3854+4*reg] >> 16) & 0x1fff
-			flkb := (fl + 1) << 2
-			if flkb > highflkb {
-				highflkb = flkb
-			}
-		}
-		ROMSizeKB = int(highflkb)
-		/* Shared with ME. Flashrom is unable to handle it.  */
-		FlashROMSupport = "n"
-	}
-}
-
-func (b bd82x6x) GetGPIOHeader() string {
-	return "southbridge/intel/bd82x6x/pch.h"
-}
-
-func (b bd82x6x) EnableGPE(in int) {
-	b.node.Registers[fmt.Sprintf("gpi%d_routing", in)] = "2"
-}
-
-func (b bd82x6x) EncodeGPE(in int) int {
-	return in + 0x10
-}
-
-func (b bd82x6x) DecodeGPE(in int) int {
-	return in - 0x10
-}
-
-func (b bd82x6x) NeedRouteGPIOManually() {
-	b.node.Comment += ", FIXME: set gpiX_routing for EC support"
-}
-
-func (b bd82x6x) Scan(ctx Context, addr PCIDevData) {
-
-	SouthBridge = &b
-
-	inteltool := ctx.InfoSource.GetInteltool()
-	GPIO(ctx, inteltool)
-
-	KconfigBool["SOUTHBRIDGE_INTEL_"+b.variant] = true
-	KconfigBool["SERIRQ_CONTINUOUS_MODE"] = true
-	KconfigInt["USBDEBUG_HCD_INDEX"] = 2
-	KconfigComment["USBDEBUG_HCD_INDEX"] = "FIXME: check this"
-	dmi := ctx.InfoSource.GetDMI()
-	if dmi.Vendor == "LENOVO" {
-		KconfigInt["DRAM_RESET_GATE_GPIO"] = 10
-	} else {
-		KconfigInt["DRAM_RESET_GATE_GPIO"] = 60
-	}
-	KconfigComment["DRAM_RESET_GATE_GPIO"] = "FIXME: check this"
-
-	ich9GetFlashSize(ctx)
-
-	DSDTDefines = append(DSDTDefines,
-		DSDTDefine{
-			Key:   "BRIGHTNESS_UP",
-			Value: "\\_SB.PCI0.GFX0.INCB",
-		},
-		DSDTDefine{
-			Key:   "BRIGHTNESS_DOWN",
-			Value: "\\_SB.PCI0.GFX0.DECB",
-		})
-
-	/* SPI init */
-	MainboardIncludes = append(MainboardIncludes, "southbridge/intel/bd82x6x/pch.h")
-
-	FADT := ctx.InfoSource.GetACPI()["FACP"]
-
-	pcieHotplugMap := "{ "
-
-	for port := 0; port < 7; port++ {
-		if IsPCIeHotplug(ctx, port) {
-			pcieHotplugMap += "1, "
-		} else {
-			pcieHotplugMap += "0, "
-		}
-	}
-
-	if IsPCIeHotplug(ctx, 7) {
-		pcieHotplugMap += "1 }"
-	} else {
-		pcieHotplugMap += "0 }"
-	}
-
-	cur := DevTreeNode{
-		Chip:    "southbridge/intel/bd82x6x",
-		Comment: "Intel Series 6 Cougar Point PCH",
-
-		Registers: map[string]string{
-			"sata_interface_speed_support": "0x3",
-			"gen1_dec":                     FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x84:0x88]),
-			"gen2_dec":                     FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x88:0x8c]),
-			"gen3_dec":                     FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x8c:0x90]),
-			"gen4_dec":                     FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x90:0x94]),
-			"pcie_port_coalesce":           "1",
-			"pcie_hotplug_map":             pcieHotplugMap,
-
-			"sata_port_map": fmt.Sprintf("0x%x", PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 2}].ConfigDump[0x92]&0x3f),
-
-			"docking_supported": (FormatBool((FADT[113] & (1 << 1)) != 0)),
-			"spi_uvscc":         fmt.Sprintf("0x%x", inteltool.RCBA[0x38c8]),
-			"spi_lvscc":         fmt.Sprintf("0x%x", inteltool.RCBA[0x38c4]&^(1<<23)),
-		},
-		PCISlots: []PCISlot{
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x14, Func: 0}, writeEmpty: false, alias: "xhci", additionalComment: "USB 3.0 Controller"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 0}, writeEmpty: true, alias: "mei1", additionalComment: "Management Engine Interface 1"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 1}, writeEmpty: true, alias: "mei2", additionalComment: "Management Engine Interface 2"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 2}, writeEmpty: true, alias: "me_ide_r", additionalComment: "Management Engine IDE-R"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 3}, writeEmpty: true, alias: "me_kt", additionalComment: "Management Engine KT"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x19, Func: 0}, writeEmpty: true, alias: "gbe", additionalComment: "Intel Gigabit Ethernet"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1a, Func: 0}, writeEmpty: true, alias: "ehci2", additionalComment: "USB2 EHCI #2"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1b, Func: 0}, writeEmpty: true, alias: "hda", additionalComment: "High Definition Audio"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 0}, writeEmpty: true, alias: "pcie_rp1", additionalComment: "PCIe Port #1"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 1}, writeEmpty: true, alias: "pcie_rp2", additionalComment: "PCIe Port #2"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 2}, writeEmpty: true, alias: "pcie_rp3", additionalComment: "PCIe Port #3"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 3}, writeEmpty: true, alias: "pcie_rp4", additionalComment: "PCIe Port #4"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 4}, writeEmpty: true, alias: "pcie_rp5", additionalComment: "PCIe Port #5"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 5}, writeEmpty: true, alias: "pcie_rp6", additionalComment: "PCIe Port #6"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 6}, writeEmpty: true, alias: "pcie_rp7", additionalComment: "PCIe Port #7"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 7}, writeEmpty: true, alias: "pcie_rp8", additionalComment: "PCIe Port #8"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1d, Func: 0}, writeEmpty: true, alias: "ehci1", additionalComment: "USB2 EHCI #1"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1e, Func: 0}, writeEmpty: true, alias: "pci_bridge", additionalComment: "PCI bridge"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 0}, writeEmpty: true, alias: "lpc", additionalComment: "LPC bridge"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 2}, writeEmpty: true, alias: "sata1", additionalComment: "SATA Controller 1"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 3}, writeEmpty: true, alias: "smbus", additionalComment: "SMBus"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 5}, writeEmpty: true, alias: "sata2", additionalComment: "SATA Controller 2"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 6}, writeEmpty: true, alias: "thermal", additionalComment: "Thermal"},
-		},
-	}
-
-	b.node = &cur
-
-	xhciDev, ok := PCIMap[PCIAddr{Bus: 0, Dev: 0x14, Func: 0}]
-
-	if ok {
-		cur.Registers["xhci_switchable_ports"] = FormatHexLE32(xhciDev.ConfigDump[0xd4:0xd8])
-		cur.Registers["superspeed_capable_ports"] = FormatHexLE32(xhciDev.ConfigDump[0xdc:0xe0])
-		cur.Registers["xhci_overcurrent_mapping"] = FormatHexLE32(xhciDev.ConfigDump[0xc0:0xc4])
-	}
-
-	PutPCIChip(addr, cur)
-	PutPCIDevParent(addr, "", "lpc")
-
-	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
-		File: "southbridge/intel/common/acpi/platform.asl",
-	})
-	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
-		File: "southbridge/intel/bd82x6x/acpi/globalnvs.asl",
-	})
-	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
-		File: "southbridge/intel/common/acpi/sleepstates.asl",
-	})
-	DSDTPCI0Includes = append(DSDTPCI0Includes, DSDTInclude{
-		File: "southbridge/intel/bd82x6x/acpi/pch.asl",
-	})
-
-	AddBootBlockFile("early_init.c", "")
-	AddROMStageFile("early_init.c", "")
-
-	sb := Create(ctx, "early_init.c")
-	defer sb.Close()
-	Add_gpl(sb)
-
-	sb.WriteString(`
-#include <bootblock_common.h>
-#include <device/pci_ops.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
-#include <southbridge/intel/bd82x6x/pch.h>
-
-`)
-	sb.WriteString("const struct southbridge_usb_port mainboard_usb_ports[] = {\n")
-
-	currentMap := map[uint32]int{
-		0x20000153: 0,
-		0x20000f57: 1,
-		0x2000055b: 2,
-		0x20000f51: 3,
-		0x2000094a: 4,
-		0x2000035f: 5,
-		0x20000f53: 6,
-		0x20000357: 7,
-		0x20000353: 8,
-	}
-
-	for port := uint(0); port < 14; port++ {
-		var pinmask uint32
-		OCPin := -1
-		if port < 8 {
-			pinmask = inteltool.RCBA[0x35a0]
-		} else {
-			pinmask = inteltool.RCBA[0x35a4]
-		}
-		for pin := uint(0); pin < 4; pin++ {
-			if ((pinmask >> ((port % 8) + 8*pin)) & 1) != 0 {
-				OCPin = int(pin)
-				if port >= 8 {
-					OCPin += 4
-				}
-			}
-		}
-		current, ok := currentMap[inteltool.RCBA[uint16(0x3500+4*port)]]
-		comment := ""
-		if !ok {
-			comment = fmt.Sprintf("// FIXME: Unknown current: RCBA(0x%x)=0x%x", 0x3500+4*port, uint16(0x3500+4*port))
-		}
-		fmt.Fprintf(sb, "\t{ %d, %d, %d }, %s\n",
-			((inteltool.RCBA[0x359c]>>port)&1)^1,
-			current,
-			OCPin,
-			comment)
-	}
-	sb.WriteString("};\n")
-
-	guessedMap := GuessSPDMap(ctx)
-
-	sb.WriteString(`
-void bootblock_mainboard_early_init(void)
-{
-`)
-	RestorePCI16Simple(sb, addr, 0x82)
-
-	RestorePCI16Simple(sb, addr, 0x80)
-
-	sb.WriteString(`}
-
-/* FIXME: Put proper SPD map here. */
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
-`)
-	for i, spd := range guessedMap {
-		fmt.Fprintf(sb, "\tread_spd(&spd[%d], 0x%02x, id_only);\n", i, spd)
-	}
-	sb.WriteString("}\n")
-
-	gnvs := Create(ctx, "acpi_tables.c")
-	defer gnvs.Close()
-
-	Add_gpl(gnvs)
-	gnvs.WriteString(`#include <acpi/acpi_gnvs.h>
-#include <soc/nvs.h>
-
-/* FIXME: check this function.  */
-void mainboard_fill_gnvs(struct global_nvs *gnvs)
-{
-	/* The lid is open by default. */
-	gnvs->lids = 1;
-
-	/* Temperature at which OS will shutdown */
-	gnvs->tcrt = 100;
-	/* Temperature at which OS will throttle CPU */
-	gnvs->tpsv = 90;
-}
-`)
-}
-
-func init() {
-	/* BD82X6X LPC */
-	for id := 0x1c40; id <= 0x1c5f; id++ {
-		RegisterPCI(0x8086, uint16(id), bd82x6x{variant: "BD82X6X"})
-	}
-
-	/* C216 LPC */
-	for id := 0x1e41; id <= 0x1e5f; id++ {
-		RegisterPCI(0x8086, uint16(id), bd82x6x{variant: "C216"})
-	}
-
-	/* PCIe bridge */
-	for _, id := range []uint16{
-		0x1c10, 0x1c12, 0x1c14, 0x1c16,
-		0x1c18, 0x1c1a, 0x1c1c, 0x1c1e,
-		0x1e10, 0x1e12, 0x1e14, 0x1e16,
-		0x1e18, 0x1e1a, 0x1e1c, 0x1e1e,
-		0x1e25, 0x244e, 0x2448,
-	} {
-		RegisterPCI(0x8086, id, GenericPCI{})
-	}
-
-	/* SMBus controller  */
-	RegisterPCI(0x8086, 0x1c22, GenericPCI{MissingParent: "smbus"})
-	RegisterPCI(0x8086, 0x1e22, GenericPCI{MissingParent: "smbus"})
-
-	/* SATA */
-	for _, id := range []uint16{
-		0x1c00, 0x1c01, 0x1c02, 0x1c03,
-		0x1e00, 0x1e01, 0x1e02, 0x1e03,
-	} {
-		RegisterPCI(0x8086, id, GenericPCI{})
-	}
-
-	/* EHCI */
-	for _, id := range []uint16{
-		0x1c26, 0x1c2d, 0x1e26, 0x1e2d,
-	} {
-		RegisterPCI(0x8086, id, GenericPCI{})
-	}
-
-	/* XHCI */
-	RegisterPCI(0x8086, 0x1e31, GenericPCI{})
-
-	/* ME and children */
-	for _, id := range []uint16{
-		0x1c3a, 0x1c3b, 0x1c3c, 0x1c3d,
-		0x1e3a, 0x1e3b, 0x1e3c, 0x1e3d,
-	} {
-		RegisterPCI(0x8086, id, GenericPCI{})
-	}
-
-	/* Ethernet */
-	RegisterPCI(0x8086, 0x1502, GenericPCI{})
-	RegisterPCI(0x8086, 0x1503, GenericPCI{})
-
-}
diff --git a/util/autoport/description.md b/util/autoport/description.md
deleted file mode 100644
index 9a0e8d43..00000000
--- a/util/autoport/description.md
+++ /dev/null
@@ -1 +0,0 @@
-Automated porting coreboot to Sandy Bridge/Ivy Bridge platforms `Go`
diff --git a/util/autoport/ec_fixme.go b/util/autoport/ec_fixme.go
deleted file mode 100644
index 54f78ab4..00000000
--- a/util/autoport/ec_fixme.go
+++ /dev/null
@@ -1,91 +0,0 @@
-package main
-
-import "fmt"
-
-func FIXMEEC(ctx Context) {
-	ap := Create(ctx, "acpi/platform.asl")
-	defer ap.Close()
-
-	hasKeyboard := ctx.InfoSource.HasPS2()
-
-	sbGPE := GuessECGPE(ctx)
-	var GPEUnsure bool
-	if sbGPE < 0 {
-		sbGPE = SouthBridge.EncodeGPE(1)
-		GPEUnsure = true
-		SouthBridge.NeedRouteGPIOManually()
-	} else {
-		GPEUnsure = false
-		SouthBridge.EnableGPE(SouthBridge.DecodeGPE(sbGPE))
-	}
-
-	Add_gpl(ap)
-	ap.WriteString(
-		`Method(_WAK, 1)
-{
-	/* FIXME: EC support  */
-	Return(Package() {0, 0})
-}
-
-Method(_PTS,1)
-{
-	/* FIXME: EC support  */
-}
-`)
-
-	ecs := ctx.InfoSource.GetEC()
-	MainboardIncludes = append(MainboardIncludes, "ec/acpi/ec.h")
-	MainboardIncludes = append(MainboardIncludes, "console/console.h")
-
-	MainboardInit +=
-		`	/* FIXME: trim this down or remove if necessary */
-	{
-		int i;
-		const u8 dmp[256] = {`
-	for i := 0; i < 0x100; i++ {
-		if (i & 0xf) == 0 {
-			MainboardInit += fmt.Sprintf("\n\t\t\t/* %02x */ ", i)
-		}
-		MainboardInit += fmt.Sprintf("0x%02x,", ecs[i])
-		if (i & 0xf) != 0xf {
-			MainboardInit += " "
-		}
-	}
-	MainboardInit += "\n\t\t};\n"
-	MainboardInit += `
-		printk(BIOS_DEBUG, "Replaying EC dump ...");
-		for (i = 0; i < 256; i++)
-			ec_write (i, dmp[i]);
-		printk(BIOS_DEBUG, "done\n");
-	}
-`
-
-	KconfigBool["EC_ACPI"] = true
-	si := Create(ctx, "acpi/superio.asl")
-	defer si.Close()
-
-	if hasKeyboard {
-		Add_gpl(si)
-		si.WriteString("#include <drivers/pc80/pc/ps2_controller.asl>\n")
-		MainboardInit += fmt.Sprintf("\tpc_keyboard_init(NO_AUX_DEVICE);\n")
-		MainboardIncludes = append(MainboardIncludes, "pc80/keyboard.h")
-	}
-
-	ec := Create(ctx, "acpi/ec.asl")
-	defer ec.Close()
-
-	Add_gpl(ec)
-	ec.WriteString(`Device(EC)
-{
-	Name (_HID, EISAID("PNP0C09"))
-	Name (_UID, 0)
-`)
-	if GPEUnsure {
-		ec.WriteString("\t/* FIXME: Set GPE  */\n")
-		ec.WriteString("\t/* Name (_GPE, ?)  */\n")
-	} else {
-		fmt.Fprintf(ec, "\tName (_GPE, %d)\n", sbGPE)
-	}
-	ec.WriteString("/* FIXME: EC support */\n")
-	ec.WriteString("}\n")
-}
diff --git a/util/autoport/ec_lenovo.go b/util/autoport/ec_lenovo.go
deleted file mode 100644
index a34960ff..00000000
--- a/util/autoport/ec_lenovo.go
+++ /dev/null
@@ -1,245 +0,0 @@
-package main
-
-import "fmt"
-
-func LenovoEC(ctx Context) {
-	ap := Create(ctx, "acpi/platform.asl")
-	defer ap.Close()
-
-	wakeGPE := 13
-
-	sbGPE := GuessECGPE(ctx)
-	var GPE int
-	var GPEUnsure bool
-	if sbGPE < 0 {
-		sbGPE = SouthBridge.EncodeGPE(1)
-		GPE = 1
-		GPEUnsure = true
-		SouthBridge.NeedRouteGPIOManually()
-	} else {
-		GPE = SouthBridge.DecodeGPE(sbGPE)
-		GPEUnsure = false
-	}
-
-	SouthBridge.EnableGPE(wakeGPE)
-	SouthBridge.EnableGPE(GPE)
-
-	GPEDefine := DSDTDefine{
-		Key: "THINKPAD_EC_GPE",
-	}
-
-	GPEDefine.Value = fmt.Sprintf("%d", sbGPE)
-	if GPEUnsure {
-		GPEDefine.Comment = "FIXME: Check this"
-	}
-
-	DSDTDefines = append(DSDTDefines,
-		DSDTDefine{
-			Key:   "EC_LENOVO_H8_ME_WORKAROUND",
-			Value: "1",
-		}, GPEDefine)
-
-	Add_gpl(ap)
-	ap.WriteString(
-		`Method(_WAK, 1)
-{
-	/* ME may not be up yet. */
-	Store(0, \_TZ.MEB1)
-	Store(0, \_TZ.MEB2)
-	Return(Package() {0, 0})
-}
-
-Method(_PTS,1)
-{
-	\_SB.PCI0.LPCB.EC.RADI(0)
-}
-`)
-
-	si := Create(ctx, "acpi/superio.asl")
-	defer si.Close()
-
-	Add_gpl(si)
-	si.WriteString("#include <drivers/pc80/pc/ps2_controller.asl>\n")
-
-	/* FIXME:XX Move this to ec/lenovo.  */
-	smi := Create(ctx, "smihandler.c")
-	defer smi.Close()
-
-	AddSMMFile("smihandler.c", "")
-
-	Add_gpl(smi)
-	smi.WriteString(
-		`#include <arch/io.h>
-#include <console/console.h>
-#include <cpu/x86/smm.h>
-#include <ec/acpi/ec.h>
-#include <ec/lenovo/h8/h8.h>
-#include <delay.h>
-#include <` + SouthBridge.GetGPIOHeader() + ">\n\n")
-
-	if GPEUnsure {
-		smi.WriteString("/* FIXME: check this */\n")
-	}
-	fmt.Fprintf(smi, "#define GPE_EC_SCI	%d\n", GPE)
-
-	smi.WriteString("/* FIXME: check this */\n")
-	fmt.Fprintf(smi, "#define GPE_EC_WAKE	%d\n", wakeGPE)
-
-	smi.WriteString(`
-static void mainboard_smi_handle_ec_sci(void)
-{
-	u8 status = inb(EC_SC);
-	u8 event;
-
-	if (!(status & EC_SCI_EVT))
-		return;
-
-	event = ec_query();
-	printk(BIOS_DEBUG, "EC event %#02x\n", event);
-}
-
-void mainboard_smi_gpi(u32 gpi_sts)
-{
-	if (gpi_sts & (1 << GPE_EC_SCI))
-		mainboard_smi_handle_ec_sci();
-}
-
-int mainboard_smi_apmc(u8 data)
-{
-	switch (data) {
-	case APM_CNT_ACPI_ENABLE:
-		/* use 0x1600/0x1604 to prevent races with userspace */
-		ec_set_ports(0x1604, 0x1600);
-		/* route EC_SCI to SCI */
-		gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI);
-		/* discard all events, and enable attention */
-		ec_write(0x80, 0x01);
-		break;
-	case APM_CNT_ACPI_DISABLE:
-		/* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
-		   provide a EC query function */
-		ec_set_ports(0x66, 0x62);
-		/* route EC_SCI to SMI */
-		gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI);
-		/* discard all events, and enable attention */
-		ec_write(0x80, 0x01);
-		break;
-	default:
-		break;
-	}
-	return 0;
-}
-
-void mainboard_smi_sleep(u8 slp_typ)
-{
-	if (slp_typ == 3) {
-		u8 ec_wake = ec_read(0x32);
-		/* If EC wake events are enabled, enable wake on EC WAKE GPE. */
-		if (ec_wake & 0x14) {
-			/* Redirect EC WAKE GPE to SCI. */
-			gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
-		}
-	}
-}
-`)
-
-	ec := Create(ctx, "acpi/ec.asl")
-	defer ec.Close()
-
-	Add_gpl(ec)
-	ec.WriteString("#include <ec/lenovo/h8/acpi/ec.asl>\n")
-
-	KconfigBool["EC_LENOVO_PMH7"] = true
-	KconfigBool["EC_LENOVO_H8"] = true
-
-	pmh := DevTreeNode{
-		Chip: "ec/lenovo/pmh7",
-		Registers: map[string]string{
-			"backlight_enable":  "true",
-			"dock_event_enable": "true",
-		},
-		Children: []DevTreeNode{
-			DevTreeNode{
-				Chip:    "pnp",
-				Comment: "dummy",
-				Dev:     0xff,
-				Func:    1,
-			},
-		},
-	}
-	PutChip("lpc", pmh)
-
-	ecs := ctx.InfoSource.GetEC()
-	h8 := DevTreeNode{
-		Chip: "ec/lenovo/h8",
-		Children: []DevTreeNode{
-			DevTreeNode{
-				Chip:    "pnp",
-				Comment: "dummy",
-				Dev:     0xff,
-				Func:    2,
-				IOs: map[uint16]uint16{
-					0x60: 0x62,
-					0x62: 0x66,
-					0x64: 0x1600,
-					0x66: 0x1604,
-				},
-			},
-		},
-		Comment: "FIXME: has_keyboard_backlight, has_power_management_beeps, has_uwb",
-		Registers: map[string]string{
-			"config0":   FormatHex8(ecs[0]),
-			"config1":   FormatHex8(ecs[1]),
-			"config2":   FormatHex8(ecs[2]),
-			"config3":   FormatHex8(ecs[3]),
-			"beepmask0": FormatHex8(ecs[4]),
-			"beepmask1": FormatHex8(ecs[5]),
-		},
-	}
-	for i := 0; i < 0x10; i++ {
-		if ecs[0x10+i] != 0 {
-			h8.Registers[fmt.Sprintf("event%x_enable", i)] = FormatHex8(ecs[0x10+i])
-		}
-	}
-	PutChip("lpc", h8)
-
-	eeprom := DevTreeNode{
-		Chip:    "drivers/i2c/at24rf08c",
-		Comment: "eeprom, 8 virtual devices, same chip",
-		Children: []DevTreeNode{
-			DevTreeNode{
-				Chip: "i2c",
-				Dev:  0x54,
-			},
-			DevTreeNode{
-				Chip: "i2c",
-				Dev:  0x55,
-			},
-			DevTreeNode{
-				Chip: "i2c",
-				Dev:  0x56,
-			},
-			DevTreeNode{
-				Chip: "i2c",
-				Dev:  0x57,
-			},
-			DevTreeNode{
-				Chip: "i2c",
-				Dev:  0x5c,
-			},
-			DevTreeNode{
-				Chip: "i2c",
-				Dev:  0x5d,
-			},
-			DevTreeNode{
-				Chip: "i2c",
-				Dev:  0x5e,
-			},
-			DevTreeNode{
-				Chip: "i2c",
-				Dev:  0x5f,
-			},
-		},
-	}
-	PutChip("smbus", eeprom)
-}
diff --git a/util/autoport/ec_none.go b/util/autoport/ec_none.go
deleted file mode 100644
index bcb61bf0..00000000
--- a/util/autoport/ec_none.go
+++ /dev/null
@@ -1,24 +0,0 @@
-package main
-
-func NoEC(ctx Context) {
-	ap := Create(ctx, "acpi/platform.asl")
-	defer ap.Close()
-
-	Add_gpl(ap)
-	ap.WriteString(
-		`Method(_WAK, 1)
-{
-	Return(Package() {0, 0})
-}
-
-Method(_PTS, 1)
-{
-}
-`)
-
-	si := Create(ctx, "acpi/superio.asl")
-	defer si.Close()
-
-	ec := Create(ctx, "acpi/ec.asl")
-	defer ec.Close()
-}
diff --git a/util/autoport/go.mod b/util/autoport/go.mod
deleted file mode 100644
index 55a89cc9..00000000
--- a/util/autoport/go.mod
+++ /dev/null
@@ -1 +0,0 @@
-module autoport
diff --git a/util/autoport/gpio_common.go b/util/autoport/gpio_common.go
deleted file mode 100644
index a869dce4..00000000
--- a/util/autoport/gpio_common.go
+++ /dev/null
@@ -1,113 +0,0 @@
-/* code to generate common GPIO code for Intel 6/7/8 Series Chipset */
-
-package main
-
-import (
-	"fmt"
-	"os"
-)
-
-func writeGPIOSet(ctx Context, sb *os.File,
-	val uint32, set uint, partno int, constraint uint32) {
-
-	max := uint(32)
-	if set == 3 {
-		max = 12
-	}
-
-	bits := [6][2]string{
-		{"GPIO_MODE_NATIVE", "GPIO_MODE_GPIO"},
-		{"GPIO_DIR_OUTPUT", "GPIO_DIR_INPUT"},
-		{"GPIO_LEVEL_LOW", "GPIO_LEVEL_HIGH"},
-		{"GPIO_RESET_PWROK", "GPIO_RESET_RSMRST"},
-		{"GPIO_NO_INVERT", "GPIO_INVERT"},
-		{"GPIO_NO_BLINK", "GPIO_BLINK"},
-	}
-
-	for i := uint(0); i < max; i++ {
-		if (constraint>>i)&1 == 1 {
-			fmt.Fprintf(sb, "	.gpio%d = %s,\n",
-				(set-1)*32+i,
-				bits[partno][(val>>i)&1])
-		}
-	}
-}
-
-func GPIO(ctx Context, inteltool InteltoolData) {
-	var constraint uint32
-	gpio := Create(ctx, "gpio.c")
-	defer gpio.Close()
-
-	AddBootBlockFile("gpio.c", "")
-	AddROMStageFile("gpio.c", "")
-
-	Add_gpl(gpio)
-	gpio.WriteString("#include <southbridge/intel/common/gpio.h>\n\n")
-
-	addresses := [3][6]int{
-		{0x00, 0x04, 0x0c, 0x60, 0x2c, 0x18},
-		{0x30, 0x34, 0x38, 0x64, -1, -1},
-		{0x40, 0x44, 0x48, 0x68, -1, -1},
-	}
-
-	for set := 1; set <= 3; set++ {
-		for partno, part := range []string{"mode", "direction", "level", "reset", "invert", "blink"} {
-			addr := addresses[set-1][partno]
-			if addr < 0 {
-				continue
-			}
-			fmt.Fprintf(gpio, "static const struct pch_gpio_set%d pch_gpio_set%d_%s = {\n",
-				set, set, part)
-
-			constraint = 0xffffffff
-			switch part {
-			case "direction":
-				/* Ignored on native mode */
-				constraint = inteltool.GPIO[uint16(addresses[set-1][0])]
-			case "level":
-				/* Level doesn't matter for input */
-				constraint = inteltool.GPIO[uint16(addresses[set-1][0])]
-				constraint &^= inteltool.GPIO[uint16(addresses[set-1][1])]
-			case "reset":
-				/* Only show reset */
-				constraint = inteltool.GPIO[uint16(addresses[set-1][3])]
-			case "invert":
-				/* Only on input and only show inverted GPIO */
-				constraint = inteltool.GPIO[uint16(addresses[set-1][0])]
-				constraint &= inteltool.GPIO[uint16(addresses[set-1][1])]
-				constraint &= inteltool.GPIO[uint16(addresses[set-1][4])]
-			case "blink":
-				/* Only on output and only show blinking GPIO */
-				constraint = inteltool.GPIO[uint16(addresses[set-1][0])]
-				constraint &^= inteltool.GPIO[uint16(addresses[set-1][1])]
-				constraint &= inteltool.GPIO[uint16(addresses[set-1][5])]
-			}
-			writeGPIOSet(ctx, gpio, inteltool.GPIO[uint16(addr)], uint(set), partno, constraint)
-			gpio.WriteString("};\n\n")
-		}
-	}
-
-	gpio.WriteString(`const struct pch_gpio_map mainboard_gpio_map = {
-	.set1 = {
-		.mode		= &pch_gpio_set1_mode,
-		.direction	= &pch_gpio_set1_direction,
-		.level		= &pch_gpio_set1_level,
-		.blink		= &pch_gpio_set1_blink,
-		.invert		= &pch_gpio_set1_invert,
-		.reset		= &pch_gpio_set1_reset,
-	},
-	.set2 = {
-		.mode		= &pch_gpio_set2_mode,
-		.direction	= &pch_gpio_set2_direction,
-		.level		= &pch_gpio_set2_level,
-		.reset		= &pch_gpio_set2_reset,
-	},
-	.set3 = {
-		.mode		= &pch_gpio_set3_mode,
-		.direction	= &pch_gpio_set3_direction,
-		.level		= &pch_gpio_set3_level,
-		.reset		= &pch_gpio_set3_reset,
-	},
-};
-`)
-}
diff --git a/util/autoport/haswell.go b/util/autoport/haswell.go
deleted file mode 100644
index 645b197a..00000000
--- a/util/autoport/haswell.go
+++ /dev/null
@@ -1,139 +0,0 @@
-package main
-
-import "fmt"
-
-type haswellmc struct {
-	variant string
-}
-
-func divceil(a uint32, b uint32) uint32 {
-	return (a + b - 1) / b
-}
-
-func getPanelCfg(inteltool InteltoolData, isULT bool) string {
-	var refclk uint32
-	var pwm_hz uint32
-
-	if isULT {
-		refclk = 24000000
-	} else {
-		refclk = 135000000
-	}
-	if (inteltool.IGD[0xc8254] >> 16) != 0 {
-		pwm_hz = refclk / 128 / (inteltool.IGD[0xc8254] >> 16)
-	} else {
-		pwm_hz = 0
-	}
-
-	gpu_panel_power_up_delay := (inteltool.IGD[0xc7208] >> 16) & 0x1fff
-	gpu_panel_power_backlight_on_delay := inteltool.IGD[0xc7208] & 0x1fff
-	gpu_panel_power_down_delay := (inteltool.IGD[0xc720c] >> 16) & 0x1fff
-	gpu_panel_power_backlight_off_delay := inteltool.IGD[0xc720c] & 0x1fff
-	gpu_panel_power_cycle_delay := inteltool.IGD[0xc7210] & 0x1f
-
-	return fmt.Sprintf(`{
-		.up_delay_ms		= %3d,
-		.down_delay_ms		= %3d,
-		.cycle_delay_ms		= %3d,
-		.backlight_on_delay_ms	= %3d,
-		.backlight_off_delay_ms	= %3d,
-		.backlight_pwm_hz	= %3d,
-	}`,
-		divceil(gpu_panel_power_up_delay, 10),
-		divceil(gpu_panel_power_down_delay, 10),
-		(gpu_panel_power_cycle_delay-1)*100,
-		divceil(gpu_panel_power_backlight_on_delay, 10),
-		divceil(gpu_panel_power_backlight_off_delay, 10),
-		pwm_hz)
-}
-
-func (i haswellmc) Scan(ctx Context, addr PCIDevData) {
-	inteltool := ctx.InfoSource.GetInteltool()
-
-	isULT := (i.variant == "ULT")
-	DevTree = DevTreeNode{
-		Chip:          "northbridge/intel/haswell",
-		MissingParent: "northbridge",
-		Comment:       "FIXME: check ec_present, usb_xhci_on_resume, gfx",
-		Registers: map[string]string{
-			"gpu_dp_b_hotplug":    FormatInt32((inteltool.IGD[0xc4030] >> 2) & 7),
-			"gpu_dp_c_hotplug":    FormatInt32((inteltool.IGD[0xc4030] >> 10) & 7),
-			"gpu_dp_d_hotplug":    FormatInt32((inteltool.IGD[0xc4030] >> 18) & 7),
-			"panel_cfg":           getPanelCfg(inteltool, isULT),
-			"gpu_ddi_e_connected": FormatBool(((inteltool.IGD[0x64000] >> 4) & 1) == 0),
-			"ec_present":          "false",
-			"usb_xhci_on_resume":  "false",
-			/* FIXME:XX hardcoded.  */
-			"gfx": "GMA_STATIC_DISPLAYS(0)",
-		},
-		Children: []DevTreeNode{
-			{
-				Chip: "cpu/intel/haswell",
-				Children: []DevTreeNode{
-					{
-						Chip: "cpu_cluster",
-						Dev:  0,
-						Ops:  "haswell_cpu_bus_ops",
-					},
-				},
-			},
-
-			{
-				Chip:          "domain",
-				Dev:           0,
-				Ops:           "haswell_pci_domain_ops",
-				PCIController: true,
-				ChildPCIBus:   0,
-				PCISlots: []PCISlot{
-					PCISlot{PCIAddr: PCIAddr{Dev: 0x0, Func: 0}, writeEmpty: true, additionalComment: i.variant},
-					PCISlot{PCIAddr: PCIAddr{Dev: 0x1, Func: 0}, writeEmpty: !isULT, additionalComment: "PCIe Bridge for discrete graphics"},
-					PCISlot{PCIAddr: PCIAddr{Dev: 0x2, Func: 0}, writeEmpty: true, additionalComment: "Internal graphics"},
-					PCISlot{PCIAddr: PCIAddr{Dev: 0x3, Func: 0}, writeEmpty: true, additionalComment: "Mini-HD audio"},
-				},
-			},
-		},
-	}
-
-	if isULT {
-		DevTree.Registers["dq_pins_interleaved"] = FormatBool(((inteltool.MCHBAR[0x2008] >> 10) & 1) == 0)
-	}
-
-	PutPCIDev(addr, "Host bridge")
-
-	KconfigBool["NORTHBRIDGE_INTEL_HASWELL"] = true
-	KconfigBool["HAVE_ACPI_TABLES"] = true
-	KconfigBool["HAVE_ACPI_RESUME"] = true
-
-	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
-		File: "cpu/intel/common/acpi/cpu.asl",
-	})
-
-	DSDTPCI0Includes = append(DSDTPCI0Includes, DSDTInclude{
-		File: "northbridge/intel/haswell/acpi/hostbridge.asl",
-	}, DSDTInclude{
-		File:    "drivers/intel/gma/acpi/default_brightness_levels.asl",
-		Comment: "FIXME: remove this if the board doesn't have backlight",
-	})
-}
-
-func init() {
-	RegisterPCI(0x8086, 0x0c00, haswellmc{variant: "Desktop"})
-	RegisterPCI(0x8086, 0x0c04, haswellmc{variant: "Mobile"})
-	RegisterPCI(0x8086, 0x0a04, haswellmc{variant: "ULT"})
-	RegisterPCI(0x8086, 0x0c08, haswellmc{variant: "Server"})
-	RegisterPCI(0x8086, 0x0d00, haswellmc{variant: "Crystal Well Desktop"})
-	RegisterPCI(0x8086, 0x0d04, haswellmc{variant: "Crystal Well Mobile"})
-	RegisterPCI(0x8086, 0x0d08, haswellmc{variant: "Crystal Well Server"})
-	for _, id := range []uint16{
-		0x0402, 0x0412, 0x0422, /* Desktop */
-		0x0406, 0x0416, 0x0426, /* Mobile */
-		0x040a, 0x041a, 0x042a, /* Server */
-		0x0a06, 0x0a16, 0x0a26, /* ULT */
-		0x0d16, 0x0d22, 0x0d26, 0x0d36, /* Mobile 4+3, GT3e */
-	} {
-		RegisterPCI(0x8086, id, GenericVGA{GenericPCI{Comment: "VGA controller"}})
-	}
-	/* CPU HD Audio */
-	RegisterPCI(0x8086, 0x0a0c, GenericPCI{})
-	RegisterPCI(0x8086, 0x0c0c, GenericPCI{})
-}
diff --git a/util/autoport/log_maker.go b/util/autoport/log_maker.go
deleted file mode 100644
index 2a524d38..00000000
--- a/util/autoport/log_maker.go
+++ /dev/null
@@ -1,190 +0,0 @@
-package main
-
-import (
-	"errors"
-	"fmt"
-	"io"
-	"io/ioutil"
-	"log"
-	"os"
-	"os/exec"
-	"strings"
-	"bytes"
-)
-
-func TryRunAndSave(output string, name string, arg []string) error {
-	cmd := exec.Command(name, arg...)
-
-	f, err := os.Create(output)
-	if err != nil {
-		log.Fatal(err)
-	}
-
-	cmd.Stdout = f
-	cmd.Stderr = f
-
-	err = cmd.Start()
-	if err != nil {
-		return err
-	}
-	cmd.Wait()
-	return nil
-}
-
-func RunAndSave(output string, name string, arg ...string) {
-	err := TryRunAndSave(output, name, arg)
-	if err == nil {
-		return
-	}
-	idx := strings.LastIndex(name, "/")
-	relname := name
-	if idx >= 0 {
-		relname = name[idx+1:]
-	}
-	relname = "./" + relname
-	err = TryRunAndSave(output, relname, arg)
-	if err != nil {
-		log.Fatal(err)
-	}
-}
-
-const MAXPROMPTRETRY = 3
-
-func PromptUser(prompt string, opts []string) (match string, err error) {
-	for i := 1; i < MAXPROMPTRETRY; i++ {
-		fmt.Printf("%s. (%s) Default:%s\n", prompt,
-		           strings.Join(opts, "/"), opts[0])
-		var usrInput string
-		fmt.Scanln(&usrInput)
-
-		// Check for default entry
-		if usrInput == "" {
-			match = opts[0]
-			return
-		}
-
-		for _, opt := range opts {
-			if opt == usrInput {
-				match = opt
-				return
-			}
-		}
-	}
-	err = errors.New("max retries exceeded")
-	fmt.Fprintln(os.Stderr, "ERROR: max retries exceeded")
-	return
-}
-
-func MakeHDALogs(outDir string, cardName string) {
-	SysDir := "/sys/class/sound/" + cardName + "/"
-	files, _ := ioutil.ReadDir(SysDir)
-	for _, f := range files {
-		if (strings.HasPrefix(f.Name(), "hw") || strings.HasPrefix(f.Name(), "hdaudio")) && f.IsDir() {
-			in, err := os.Open(SysDir + f.Name() + "/init_pin_configs")
-			defer in.Close()
-			if err != nil {
-				log.Fatal(err)
-			}
-			out, err := os.Create(outDir + "/pin_" + strings.Replace(f.Name(), "hdaudio", "hw", -1))
-			if err != nil {
-				log.Fatal(err)
-			}
-			defer out.Close()
-			io.Copy(out, in)
-		}
-	}
-
-	ProcDir := "/proc/asound/" + cardName + "/"
-	files, _ = ioutil.ReadDir(ProcDir)
-	for _, f := range files {
-		if strings.HasPrefix(f.Name(), "codec#") && !f.IsDir() {
-			in, err := os.Open(ProcDir + f.Name())
-			defer in.Close()
-			if err != nil {
-				log.Fatal(err)
-			}
-			out, err := os.Create(outDir + "/" + f.Name())
-			if err != nil {
-				log.Fatal(err)
-			}
-			defer out.Close()
-			io.Copy(out, in)
-		}
-	}
-}
-
-func MakeLogs(outDir string) {
-	os.MkdirAll(outDir, 0700)
-	RunAndSave(outDir+"/lspci.log", "lspci", "-nnvvvxxxx")
-	RunAndSave(outDir+"/dmidecode.log", "dmidecode")
-	RunAndSave(outDir+"/acpidump.log", "acpidump")
-
-	inteltoolArgs := "-a"
-	opt, err := PromptUser("WARNING: The following tool MAY cause your system to hang when it attempts "+
-		"to probe for graphics registers.  Having the graphics registers will help create a better port. "+
-		"Should autoport probe these registers?",
-		[]string{"y", "yes", "n", "no"})
-
-	// Continue even if there is an error
-
-	switch opt {
-	case "y", "yes":
-		inteltoolArgs += "f"
-	}
-
-	RunAndSave(outDir+"/inteltool.log", "../inteltool/inteltool", inteltoolArgs)
-	RunAndSave(outDir+"/ectool.log", "../ectool/ectool", "-pd")
-	RunAndSave(outDir+"/superiotool.log", "../superiotool/superiotool", "-ade")
-
-	SysSound := "/sys/class/sound/"
-	card := ""
-	cards, _ := ioutil.ReadDir(SysSound)
-	for _, f := range cards {
-		if strings.HasPrefix(f.Name(), "card") {
-			cid, err := ioutil.ReadFile(SysSound + f.Name() + "/id")
-			if err == nil && bytes.Equal(cid, []byte("PCH\n")) {
-				fmt.Fprintln(os.Stderr, "PCH sound card is", f.Name())
-				card = f.Name()
-			}
-		}
-	}
-
-	if card != "" {
-		MakeHDALogs(outDir, card)
-	} else {
-		fmt.Fprintln(os.Stderr, "HDAudio not found on PCH.")
-	}
-
-	for _, fname := range []string{"cpuinfo", "ioports"} {
-		in, err := os.Open("/proc/" + fname)
-		defer in.Close()
-		if err != nil {
-			log.Fatal(err)
-		}
-		out, err := os.Create(outDir + "/" + fname + ".log")
-		if err != nil {
-			log.Fatal(err)
-		}
-		defer out.Close()
-		io.Copy(out, in)
-	}
-
-	out, err := os.Create(outDir + "/input_bustypes.log")
-	if err != nil {
-		log.Fatal(err)
-	}
-	defer out.Close()
-
-	ClassInputDir := "/sys/class/input/"
-	files, _ := ioutil.ReadDir(ClassInputDir)
-	for _, f := range files {
-		if strings.HasPrefix(f.Name(), "input") && !f.Mode().IsRegular() { /* Allow both dirs and symlinks.  */
-			in, err := os.Open(ClassInputDir + f.Name() + "/id/bustype")
-			defer in.Close()
-			if err != nil {
-				log.Fatal(err)
-			}
-			io.Copy(out, in)
-		}
-	}
-}
diff --git a/util/autoport/log_reader.go b/util/autoport/log_reader.go
deleted file mode 100644
index b0518d25..00000000
--- a/util/autoport/log_reader.go
+++ /dev/null
@@ -1,417 +0,0 @@
-package main
-
-import (
-	"bufio"
-	"flag"
-	"fmt"
-	"log"
-	"os"
-	"regexp"
-	"strconv"
-	"strings"
-)
-
-type LogDevReader struct {
-	InputDirectory string
-	ACPITables     map[string][]byte
-	EC             []byte
-}
-
-func isXDigit(x uint8) bool {
-	if x >= '0' && x <= '9' {
-		return true
-	}
-	if x >= 'a' && x <= 'f' {
-		return true
-	}
-	if x >= 'A' && x <= 'F' {
-		return true
-	}
-	return false
-}
-
-type HexLine struct {
-	length uint
-	values [16]byte
-	start  uint
-}
-
-func (l *LogDevReader) ReadHexLine(line string) (hex HexLine) {
-	hex.start = 0
-	line = strings.Trim(line, " ")
-	fmt.Sscanf(line, "%x:", &hex.start)
-	ll, _ := fmt.Sscanf(line, "%x: %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x", &hex.start,
-		&hex.values[0], &hex.values[1], &hex.values[2],
-		&hex.values[3], &hex.values[4], &hex.values[5],
-		&hex.values[6], &hex.values[7], &hex.values[8],
-		&hex.values[9], &hex.values[10], &hex.values[11],
-		&hex.values[12], &hex.values[13], &hex.values[14],
-		&hex.values[15])
-	hex.length = uint(ll - 1)
-	return
-}
-
-func (l *LogDevReader) AssignHexLine(inp string, target []byte) []byte {
-	hex := l.ReadHexLine(inp)
-	if hex.start+hex.length > uint(len(target)) {
-		target = target[0 : hex.start+hex.length]
-	}
-	copy(target[hex.start:hex.start+hex.length], hex.values[0:hex.length])
-	return target
-}
-
-func (l *LogDevReader) GetEC() []byte {
-	if l.EC != nil {
-		return l.EC
-	}
-	l.EC = make([]byte, 0x100, 0x100)
-
-	file, err := os.Open(l.InputDirectory + "/ectool.log")
-	if err != nil {
-		log.Fatal(err)
-	}
-	defer file.Close()
-
-	scanner := bufio.NewScanner(file)
-
-	for scanner.Scan() {
-		line := scanner.Text()
-		if len(line) > 7 && isXDigit(line[0]) && isXDigit(line[1]) && line[2] == ':' {
-			l.EC = l.AssignHexLine(line, l.EC)
-		}
-	}
-
-	if err := scanner.Err(); err != nil {
-		log.Fatal(err)
-	}
-
-	return l.EC
-}
-
-func (l *LogDevReader) GetACPI() (Tables map[string][]byte) {
-	if l.ACPITables != nil {
-		return l.ACPITables
-	}
-	l.ACPITables = Tables
-
-	file, err := os.Open(l.InputDirectory + "/acpidump.log")
-	if err != nil {
-		log.Fatal(err)
-	}
-	defer file.Close()
-
-	scanner := bufio.NewScanner(file)
-
-	Tables = map[string][]byte{}
-
-	curTable := ""
-	for scanner.Scan() {
-		line := scanner.Text()
-		/* Only supports ACPI tables up to 0x100000 in size, FIXME if needed */
-		is_hexline, _ := regexp.MatchString(" *[0-9A-Fa-f]{4,5}: ", line)
-		switch {
-		case len(line) >= 6 && line[5] == '@':
-			curTable = line[0:4]
-			Tables[curTable] = make([]byte, 0, 0x100000)
-		case is_hexline:
-			Tables[curTable] = l.AssignHexLine(line, Tables[curTable])
-		}
-	}
-
-	if err := scanner.Err(); err != nil {
-		log.Fatal(err)
-	}
-
-	return
-}
-
-func (l *LogDevReader) GetPCIList() (PCIList []PCIDevData) {
-	file, err := os.Open(l.InputDirectory + "/lspci.log")
-	if err != nil {
-		log.Fatal(err)
-	}
-	defer file.Close()
-
-	scanner := bufio.NewScanner(file)
-
-	PCIList = []PCIDevData{}
-
-	for scanner.Scan() {
-		line := scanner.Text()
-		switch {
-		case !(len(line) < 7 || !isXDigit(line[0]) || !isXDigit(line[1]) || line[2] != ':' || !isXDigit(line[3]) || !isXDigit(line[4]) || line[5] != '.' || !isXDigit(line[6])):
-			cur := PCIDevData{}
-			fmt.Sscanf(line, "%x:%x.%x", &cur.Bus, &cur.Dev, &cur.Func)
-			lc := strings.LastIndex(line, ":")
-			li := strings.LastIndex(line[0:lc], "[")
-			if li < 0 {
-				continue
-			}
-			ven := 0
-			dev := 0
-			fmt.Sscanf(line[li+1:], "%x:%x", &ven, &dev)
-			cur.PCIDevID = uint16(dev)
-			cur.PCIVenID = uint16(ven)
-			cur.ConfigDump = make([]byte, 0x100, 0x1000)
-			PCIList = append(PCIList, cur)
-		case len(line) > 7 && isXDigit(line[0]) && line[1] == '0' && line[2] == ':':
-			start := 0
-			fmt.Sscanf(line, "%x:", &start)
-			cur := &PCIList[len(PCIList)-1]
-			cur.ConfigDump = l.AssignHexLine(line, cur.ConfigDump)
-		}
-	}
-
-	if err := scanner.Err(); err != nil {
-		log.Fatal(err)
-	}
-
-	return
-}
-
-func (l *LogDevReader) GetInteltool() (ret InteltoolData) {
-	file, err := os.Open(l.InputDirectory + "/inteltool.log")
-	if err != nil {
-		log.Fatal(err)
-	}
-	defer file.Close()
-
-	scanner := bufio.NewScanner(file)
-	paragraph := ""
-	ret.GPIO = map[uint16]uint32{}
-	ret.RCBA = map[uint16]uint32{}
-	ret.IOBP = map[uint32]uint32{}
-	ret.IGD = map[uint32]uint32{}
-	ret.MCHBAR = map[uint16]uint32{}
-	ret.PMBASE = map[uint16]uint32{}
-	for scanner.Scan() {
-		line := scanner.Text()
-		switch {
-		case len(line) > 7 && line[0] == '0' && line[1] == 'x' && line[6] == ':' && paragraph == "RCBA":
-			addr, value := 0, 0
-			fmt.Sscanf(line, "0x%x: 0x%x", &addr, &value)
-			ret.RCBA[uint16(addr)] = uint32(value)
-		case len(line) > 11 && line[0] == '0' && line[1] == 'x' && line[10] == ':' && paragraph == "IOBP":
-			addr, value := 0, 0
-			fmt.Sscanf(line, "0x%x: 0x%x", &addr, &value)
-			ret.IOBP[uint32(addr)] = uint32(value)
-		case len(line) > 9 && line[0] == '0' && line[1] == 'x' && line[8] == ':' && paragraph == "IGD":
-			addr, value := 0, 0
-			fmt.Sscanf(line, "0x%x: 0x%x", &addr, &value)
-			ret.IGD[uint32(addr)] = uint32(value)
-		case len(line) > 7 && line[0] == '0' && line[1] == 'x' && line[6] == ':' && paragraph == "MCHBAR":
-			addr, value := 0, 0
-			fmt.Sscanf(line, "0x%x: 0x%x", &addr, &value)
-			ret.MCHBAR[uint16(addr)] = uint32(value)
-		case strings.Contains(line, "DEFAULT"):
-			continue
-		case strings.Contains(line, "DIFF"):
-			continue
-		case strings.HasPrefix(line, "gpiobase"):
-			addr, value := 0, 0
-			fmt.Sscanf(line, "gpiobase+0x%x: 0x%x", &addr, &value)
-			ret.GPIO[uint16(addr)] = uint32(value)
-		case strings.HasPrefix(line, "pmbase"):
-			addr, value := 0, 0
-			fmt.Sscanf(line, "pmbase+0x%x: 0x%x", &addr, &value)
-			ret.PMBASE[uint16(addr)] = uint32(value)
-		case strings.HasPrefix(line, "============="):
-			paragraph = strings.Trim(line, "= ")
-		}
-	}
-
-	if err := scanner.Err(); err != nil {
-		log.Fatal(err)
-	}
-	return
-}
-
-func (l *LogDevReader) GetDMI() (ret DMIData) {
-	file, err := os.Open(l.InputDirectory + "/dmidecode.log")
-	if err != nil {
-		log.Fatal(err)
-	}
-	defer file.Close()
-
-	scanner := bufio.NewScanner(file)
-	paragraph := ""
-	for scanner.Scan() {
-		line := scanner.Text()
-		if !strings.HasPrefix(line, "\t") {
-			paragraph = strings.TrimSpace(line)
-			continue
-		}
-		idx := strings.Index(line, ":")
-		if idx < 0 {
-			continue
-		}
-		name := strings.TrimSpace(line[0:idx])
-		value := strings.TrimSpace(line[idx+1:])
-		switch paragraph + ":" + name {
-		case "System Information:Manufacturer":
-			ret.Vendor = value
-		case "System Information:Product Name":
-			ret.Model = value
-		case "System Information:Version":
-			ret.Version = value
-		case "Chassis Information:Type":
-			ret.IsLaptop = (value == "Notebook" || value == "Laptop")
-		}
-	}
-
-	if err := scanner.Err(); err != nil {
-		log.Fatal(err)
-	}
-	return
-}
-
-func (l *LogDevReader) GetAzaliaCodecs() (ret []AzaliaCodec) {
-	cardno := -1
-	for i := 0; i < 10; i++ {
-		pin, err := os.Open(l.InputDirectory + "/pin_hwC" + strconv.Itoa(i) + "D0")
-		if err == nil {
-			pin.Close()
-			cardno = i
-			break
-		}
-	}
-	if cardno == -1 {
-		return
-	}
-	for codecno := 0; codecno < 10; codecno++ {
-		cur := AzaliaCodec{CodecNo: codecno, PinConfig: map[int]uint32{}}
-		codec, err := os.Open(l.InputDirectory + "/codec#" + strconv.Itoa(codecno))
-		if err != nil {
-			continue
-		}
-		defer codec.Close()
-		pin, err := os.Open(l.InputDirectory + "/pin_hwC" + strconv.Itoa(cardno) +
-			"D" + strconv.Itoa(codecno))
-		if err != nil {
-			continue
-		}
-		defer pin.Close()
-
-		scanner := bufio.NewScanner(codec)
-		for scanner.Scan() {
-			line := scanner.Text()
-			if strings.HasPrefix(line, "Codec:") {
-				fmt.Sscanf(line, "Codec: %s", &cur.Name)
-				continue
-			}
-			if strings.HasPrefix(line, "Vendor Id:") {
-				fmt.Sscanf(line, "Vendor Id: 0x%x", &cur.VendorID)
-				continue
-			}
-			if strings.HasPrefix(line, "Subsystem Id:") {
-				fmt.Sscanf(line, "Subsystem Id: 0x%x", &cur.SubsystemID)
-				continue
-			}
-		}
-
-		scanner = bufio.NewScanner(pin)
-		for scanner.Scan() {
-			line := scanner.Text()
-			addr := 0
-			val := uint32(0)
-			fmt.Sscanf(line, "0x%x 0x%x", &addr, &val)
-			cur.PinConfig[addr] = val
-		}
-		ret = append(ret, cur)
-	}
-	return
-}
-
-func (l *LogDevReader) GetIOPorts() []IOPorts {
-	file, err := os.Open(l.InputDirectory + "/ioports.log")
-	if err != nil {
-		log.Fatal(err)
-	}
-	defer file.Close()
-	scanner := bufio.NewScanner(file)
-	ret := make([]IOPorts, 0, 100)
-	for scanner.Scan() {
-		line := scanner.Text()
-		el := IOPorts{}
-		fmt.Sscanf(line, " %x-%x : %s", &el.Start, &el.End, &el.Usage)
-		ret = append(ret, el)
-	}
-
-	if err := scanner.Err(); err != nil {
-		log.Fatal(err)
-	}
-	return ret
-
-}
-
-func (l *LogDevReader) GetCPUModel() (ret []uint32) {
-	file, err := os.Open(l.InputDirectory + "/cpuinfo.log")
-	if err != nil {
-		log.Fatal(err)
-	}
-	defer file.Close()
-
-	scanner := bufio.NewScanner(file)
-	ret = make([]uint32, 0, 100)
-	proc := 0
-	for scanner.Scan() {
-		line := scanner.Text()
-		sep := strings.Index(line, ":")
-		if sep < 0 {
-			continue
-		}
-		key := strings.TrimSpace(line[0:sep])
-		val := strings.TrimSpace(line[sep+1:])
-
-		if key == "processor" {
-			proc, _ := strconv.Atoi(val)
-			if len(ret) <= proc {
-				ret = ret[0 : proc+1]
-			}
-			continue
-		}
-		if key == "cpu family" {
-			family, _ := strconv.Atoi(val)
-			ret[proc] |= uint32(((family & 0xf) << 8) | ((family & 0xff0) << 16))
-		}
-		if key == "model" {
-			model, _ := strconv.Atoi(val)
-			ret[proc] |= uint32(((model & 0xf) << 4) | ((model & 0xf0) << 12))
-		}
-		if key == "stepping" {
-			stepping, _ := strconv.Atoi(val)
-			ret[proc] |= uint32(stepping & 0xf)
-		}
-	}
-
-	if err := scanner.Err(); err != nil {
-		log.Fatal(err)
-	}
-	return
-}
-
-func (l *LogDevReader) HasPS2() bool {
-	file, err := os.Open(l.InputDirectory + "/input_bustypes.log")
-	if err != nil {
-		log.Fatal(err)
-	}
-	defer file.Close()
-	scanner := bufio.NewScanner(file)
-	for scanner.Scan() {
-		line := scanner.Text()
-		if strings.Index(line, "0011") >= 0 {
-			return true
-		}
-	}
-	return false
-}
-
-var FlagLogInput = flag.String("input_log", ".", "Input log directory")
-var FlagLogMkLogs = flag.Bool("make_logs", false, "Dump logs")
-
-func MakeLogReader() *LogDevReader {
-	if *FlagLogMkLogs {
-		MakeLogs(*FlagLogInput)
-	}
-	return &LogDevReader{InputDirectory: *FlagLogInput}
-}
diff --git a/util/autoport/lynxpoint.go b/util/autoport/lynxpoint.go
deleted file mode 100644
index 98a1ca82..00000000
--- a/util/autoport/lynxpoint.go
+++ /dev/null
@@ -1,490 +0,0 @@
-package main
-
-import "fmt"
-
-type LPVariant int
-
-const (
-	LYNX_POINT_MOBILE LPVariant = iota
-	LYNX_POINT_DESKTOP
-	LYNX_POINT_SERVER
-	LYNX_POINT_ULT
-)
-
-type lynxpoint struct {
-	variant LPVariant
-	node    *DevTreeNode
-}
-
-func lpPchGetFlashSize(ctx Context) {
-	inteltool := ctx.InfoSource.GetInteltool()
-	/* In LP PCH, Boot BIOS Straps field in GCS has only one bit.  */
-	switch (inteltool.RCBA[0x3410] >> 10) & 1 {
-	case 0:
-		ROMProtocol = "SPI"
-		highflkb := uint32(0)
-		for reg := uint16(0); reg < 5; reg++ {
-			fl := (inteltool.RCBA[0x3854+4*reg] >> 16) & 0x1fff
-			flkb := (fl + 1) << 2
-			if flkb > highflkb {
-				highflkb = flkb
-			}
-		}
-		ROMSizeKB = int(highflkb)
-		FlashROMSupport = "y"
-	}
-}
-
-func (b lynxpoint) GetGPIOHeader() string {
-	return "southbridge/intel/lynxpoint/pch.h"
-}
-
-func (b lynxpoint) EnableGPE(in int) {
-	if b.variant != LYNX_POINT_ULT {
-		b.node.Registers[fmt.Sprintf("gpi%d_routing", in)] = "2"
-	}
-}
-
-func (b lynxpoint) EncodeGPE(in int) int {
-	return in + 0x10
-}
-
-func (b lynxpoint) DecodeGPE(in int) int {
-	return in - 0x10
-}
-
-func (b lynxpoint) NeedRouteGPIOManually() {
-	b.node.Comment += ", FIXME: set gpiX_routing for EC support"
-}
-
-func GetLptDesktopEHCISetting(loc_param uint32, txamp uint32) (string, int) {
-	var port_pos string
-	var port_length int
-
-	if loc_param == 4 {
-		port_pos = "USB_PORT_BACK_PANEL"
-		if txamp <= 2 {
-			port_length = 0x40
-		} else if txamp >= 4 {
-			port_length = 0x140
-		} else {
-			port_length = 0x110
-		}
-	} else {
-		port_pos = "USB_PORT_FLEX"
-		port_length = 0x40
-	}
-	return port_pos, port_length
-}
-
-func GetLptMobileEHCISetting(loc_param uint32, txamp uint32) (string, int) {
-	var port_pos string
-	var port_length int
-
-	if loc_param == 4 {
-		port_pos = "USB_PORT_DOCK"
-		if txamp <= 1 {
-			port_length = 0x40
-		} else {
-			port_length = 0x80
-		}
-	} else if loc_param == 6 {
-		/* not internal, not dock, port_length >= 0x70 */
-		port_pos = "USB_PORT_BACK_PANEL"
-		if txamp <= 2 {
-			port_length = 0x80
-		} else {
-			port_length = 0x110
-		}
-	} else {
-		port_pos = "USB_PORT_BACK_PANEL"
-		port_length = 0x40
-	}
-	return port_pos, port_length
-}
-
-func GetLptLPEHCISetting(loc_param uint32, txamp uint32) (string, int) {
-	var port_pos string
-	var port_length int
-
-	if loc_param == 6 {
-		/* back panel or mini pcie, length >= 0x70 */
-		port_pos = "USB_PORT_MINI_PCIE"
-		if txamp <= 2 {
-			port_length = 0x80
-		} else {
-			port_length = 0x110
-		}
-	} else if loc_param == 4 {
-		port_pos = "USB_PORT_DOCK"
-		if txamp <= 1 {
-			port_length = 0x40
-		} else {
-			port_length = 0x80
-		}
-	} else {
-		port_pos = "USB_PORT_BACK_PANEL"
-		port_length = 0x40
-	}
-	return port_pos, port_length
-}
-
-func (b lynxpoint) Scan(ctx Context, addr PCIDevData) {
-
-	SouthBridge = &b
-
-	inteltool := ctx.InfoSource.GetInteltool()
-
-	isULT := (b.variant == LYNX_POINT_ULT)
-
-	if isULT {
-		Lynxpoint_LP_GPIO(ctx, inteltool)
-	} else {
-		GPIO(ctx, inteltool)
-	}
-
-	KconfigBool["SOUTHBRIDGE_INTEL_LYNXPOINT"] = true
-	if isULT {
-		KconfigBool["INTEL_LYNXPOINT_LP"] = true
-	}
-	KconfigBool["SERIRQ_CONTINUOUS_MODE"] = true
-	if isULT {
-		KconfigInt["USBDEBUG_HCD_INDEX"] = 1
-	} else {
-		KconfigInt["USBDEBUG_HCD_INDEX"] = 2
-		KconfigComment["USBDEBUG_HCD_INDEX"] = "FIXME: check this"
-	}
-
-	if isULT {
-		lpPchGetFlashSize(ctx)
-	} else {
-		ich9GetFlashSize(ctx)
-	}
-
-	FADT := ctx.InfoSource.GetACPI()["FACP"]
-
-	sp0dtle_data := (inteltool.IOBP[0xea002750] >> 24) & 0xf
-	sp0dtle_edge := (inteltool.IOBP[0xea002754] >> 16) & 0xf
-	sp1dtle_data := (inteltool.IOBP[0xea002550] >> 24) & 0xf
-	sp1dtle_edge := (inteltool.IOBP[0xea002554] >> 16) & 0xf
-
-	if sp0dtle_data != sp0dtle_edge {
-		fmt.Printf("Different SATA Gen3 port0 DTLE data and edge values are used.\n")
-	}
-
-	if sp1dtle_data != sp1dtle_edge {
-		fmt.Printf("Different SATA Gen3 port1 DTLE data and edge values are used.\n")
-	}
-
-	cur := DevTreeNode{
-		Chip:    "southbridge/intel/lynxpoint",
-		Comment: "Intel Series 8 Lynx Point PCH",
-
-		/* alt_gp_smi_en is not generated because coreboot doesn't use SMI like OEM firmware */
-		Registers: map[string]string{
-			"gen1_dec":             FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x84:0x88]),
-			"gen2_dec":             FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x88:0x8c]),
-			"gen3_dec":             FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x8c:0x90]),
-			"gen4_dec":             FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x90:0x94]),
-			"sata_port_map":        fmt.Sprintf("0x%x", PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 2}].ConfigDump[0x92]&0x3f),
-			"docking_supported":    (FormatBool((FADT[113] & (1 << 1)) != 0)),
-			"sata_port0_gen3_dtle": fmt.Sprintf("0x%x", sp0dtle_data),
-			"sata_port1_gen3_dtle": fmt.Sprintf("0x%x", sp1dtle_data),
-		},
-		PCISlots: []PCISlot{
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x13, Func: 0}, writeEmpty: isULT, additionalComment: "Smart Sound Audio DSP"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x14, Func: 0}, writeEmpty: true, additionalComment: "xHCI Controller"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 0}, writeEmpty: isULT, additionalComment: "Serial I/O DMA"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 1}, writeEmpty: isULT, additionalComment: "I2C0"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 2}, writeEmpty: isULT, additionalComment: "I2C1"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 3}, writeEmpty: isULT, additionalComment: "GSPI0"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 4}, writeEmpty: isULT, additionalComment: "GSPI1"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 5}, writeEmpty: isULT, additionalComment: "UART0"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 6}, writeEmpty: isULT, additionalComment: "UART1"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 0}, writeEmpty: true, additionalComment: "Management Engine Interface 1"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 1}, writeEmpty: true, additionalComment: "Management Engine Interface 2"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 2}, writeEmpty: true, additionalComment: "Management Engine IDE-R"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 3}, writeEmpty: true, additionalComment: "Management Engine KT"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x17, Func: 0}, writeEmpty: isULT, additionalComment: "SDIO"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x19, Func: 0}, writeEmpty: true, additionalComment: "Intel Gigabit Ethernet"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1a, Func: 0}, writeEmpty: !isULT, additionalComment: "USB2 EHCI #2"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1b, Func: 0}, writeEmpty: true, additionalComment: "High Definition Audio"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 0}, writeEmpty: true, additionalComment: "PCIe Port #1"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 1}, writeEmpty: true, additionalComment: "PCIe Port #2"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 2}, writeEmpty: true, additionalComment: "PCIe Port #3"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 3}, writeEmpty: true, additionalComment: "PCIe Port #4"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 4}, writeEmpty: true, additionalComment: "PCIe Port #5"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 5}, writeEmpty: true, additionalComment: "PCIe Port #6"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 6}, writeEmpty: !isULT, additionalComment: "PCIe Port #7"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 7}, writeEmpty: !isULT, additionalComment: "PCIe Port #8"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1d, Func: 0}, writeEmpty: true, additionalComment: "USB2 EHCI #1"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 0}, writeEmpty: true, additionalComment: "LPC bridge"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 2}, writeEmpty: true, additionalComment: "SATA Controller (AHCI)"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 3}, writeEmpty: true, additionalComment: "SMBus"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 5}, writeEmpty: !isULT, additionalComment: "SATA Controller (Legacy)"},
-			PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 6}, writeEmpty: true, additionalComment: "Thermal"},
-		},
-	}
-
-	if isULT {
-		cur.Registers["gpe0_en_1"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x90])
-		cur.Registers["gpe0_en_2"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x94])
-		cur.Registers["gpe0_en_3"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x98])
-		cur.Registers["gpe0_en_4"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x9c])
-	} else {
-		cur.Registers["gpe0_en_1"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x28])
-		cur.Registers["gpe0_en_2"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x2c])
-	}
-
-	b.node = &cur
-
-	PutPCIChip(addr, cur)
-	PutPCIDevParent(addr, "", "lpc")
-
-	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
-		File: "southbridge/intel/common/acpi/platform.asl",
-	})
-	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
-		File:    "southbridge/intel/lynxpoint/acpi/globalnvs.asl",
-		Comment: "global NVS and variables",
-	})
-	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
-		File: "southbridge/intel/common/acpi/sleepstates.asl",
-	})
-	DSDTPCI0Includes = append(DSDTPCI0Includes, DSDTInclude{
-		File: "southbridge/intel/lynxpoint/acpi/pch.asl",
-	})
-
-	AddBootBlockFile("bootblock.c", "")
-	bb := Create(ctx, "bootblock.c")
-	defer bb.Close()
-	Add_gpl(bb)
-	bb.WriteString(`#include <southbridge/intel/lynxpoint/pch.h>
-
-/* FIXME: remove this if not needed */
-void mainboard_config_superio(void)
-{
-}
-`)
-
-	sb := Create(ctx, "romstage.c")
-	defer sb.Close()
-	Add_gpl(sb)
-	sb.WriteString(`#include <stdint.h>
-#include <northbridge/intel/haswell/haswell.h>
-#include <northbridge/intel/haswell/raminit.h>
-#include <southbridge/intel/lynxpoint/pch.h>
-
-void mainboard_config_rcba(void)
-{
-}
-
-/* FIXME: called after romstage_common, remove it if not used */
-void mb_late_romstage_setup(void)
-{
-}
-
-void mb_get_spd_map(struct spd_info *spdi)
-{
-	/* FIXME: check this */
-	spdi->addresses[0] = 0x50;
-	spdi->addresses[1] = 0x51;
-	spdi->addresses[2] = 0x52;
-	spdi->addresses[3] = 0x53;
-}
-
-const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS] = {
-	/* FIXME: Length and Location are computed from IOBP values, may be inaccurate */
-	/* Length, Enable, OCn#, Location */
-`)
-
-	pdo1 := PCIMap[PCIAddr{Bus: 0, Dev: 0x1d, Func: 0}].ConfigDump[0x64]
-	ocmap1 := PCIMap[PCIAddr{Bus: 0, Dev: 0x1d, Func: 0}].ConfigDump[0x74:0x78]
-
-	var pdo2 uint8
-	var ocmap2 []uint8
-	var nPorts uint
-	if isULT {
-		nPorts = 8
-	} else {
-		pdo2 = PCIMap[PCIAddr{Bus: 0, Dev: 0x1a, Func: 0}].ConfigDump[0x64]
-		ocmap2 = PCIMap[PCIAddr{Bus: 0, Dev: 0x1a, Func: 0}].ConfigDump[0x74:0x78]
-		nPorts = 14
-	}
-
-	xusb2pr := GetLE16(PCIMap[PCIAddr{Bus: 0, Dev: 0x14, Func: 0}].ConfigDump[0xd0:0xd4])
-
-	for port := uint(0); port < nPorts; port++ {
-		var port_oc int = -1
-		var port_pos string
-		var port_disable uint8
-
-		if port < 8 {
-			port_disable = ((pdo1 >> port) & (uint8(xusb2pr>>port) ^ 1)) & 1
-			for oc := 0; oc < 4; oc++ {
-				if (ocmap1[oc] & (1 << port)) != 0 {
-					port_oc = oc
-					break
-				}
-			}
-		} else {
-			port_disable = ((pdo2 >> (port - 8)) & (uint8(xusb2pr>>port) ^ 1)) & 1
-			for oc := 0; oc < 4; oc++ {
-				if (ocmap2[oc] & (1 << (port - 8))) != 0 {
-					port_oc = oc + 4
-					break
-				}
-			}
-		}
-
-		/* get USB2 port length and location from IOBP */
-		port_iobp := inteltool.IOBP[0xe5004100+uint32(port)*0x100]
-		loc_param := (port_iobp >> 8) & 7
-		txamp := (port_iobp >> 11) & 7
-		var port_length int
-
-		if isULT {
-			port_pos, port_length = GetLptLPEHCISetting(loc_param, txamp)
-		} else if b.variant == LYNX_POINT_MOBILE {
-			port_pos, port_length = GetLptMobileEHCISetting(loc_param, txamp)
-		} else { /* desktop or server */
-			port_pos, port_length = GetLptDesktopEHCISetting(loc_param, txamp)
-		}
-
-		if port_disable == 1 {
-			port_pos = "USB_PORT_SKIP"
-		}
-
-		if port_oc == -1 {
-			fmt.Fprintf(sb, "\t{ 0x%04x, %d, USB_OC_PIN_SKIP, %s },\n",
-				port_length, (port_disable ^ 1), port_pos)
-		} else {
-			fmt.Fprintf(sb, "\t{ 0x%04x, %d, %d, %s },\n",
-				port_length, (port_disable ^ 1), port_oc, port_pos)
-		}
-	}
-
-	sb.WriteString(`};
-
-const struct usb3_port_config mainboard_usb3_ports[MAX_USB3_PORTS] = {
-`)
-
-	xpdo := PCIMap[PCIAddr{Bus: 0, Dev: 0x14, Func: 0}].ConfigDump[0xe8]
-	u3ocm := PCIMap[PCIAddr{Bus: 0, Dev: 0x14, Func: 0}].ConfigDump[0xc8:0xd0]
-
-	if !isULT {
-		nPorts = 6
-	} else {
-		nPorts = 4
-	}
-
-	for port := uint(0); port < nPorts; port++ {
-		var port_oc int = -1
-		port_disable := (xpdo >> port) & 1
-		for oc := 0; oc < 8; oc++ {
-			if (u3ocm[oc] & (1 << port)) != 0 {
-				port_oc = oc
-				break
-			}
-		}
-		if port_oc == -1 {
-			fmt.Fprintf(sb, "\t{ %d, USB_OC_PIN_SKIP },\n",
-				(port_disable ^ 1))
-		} else {
-			fmt.Fprintf(sb, "\t{ %d, %d },\n",
-				(port_disable ^ 1), port_oc)
-		}
-	}
-
-	sb.WriteString(`};
-`)
-
-}
-
-func init() {
-	for _, id := range []uint16{
-		0x8c41, 0x8c49, 0x8c4b, 0x8c4f,
-	} {
-		RegisterPCI(0x8086, uint16(id), lynxpoint{variant: LYNX_POINT_MOBILE})
-	}
-
-	for _, id := range []uint16{
-		0x8c42, 0x8c44, 0x8c46, 0x8c4a,
-		0x8c4c, 0x8c4e, 0x8c50, 0x8c5c,
-	} {
-		RegisterPCI(0x8086, uint16(id), lynxpoint{variant: LYNX_POINT_DESKTOP})
-	}
-
-	for _, id := range []uint16{
-		0x8c52, 0x8c54, 0x8c56,
-	} {
-		RegisterPCI(0x8086, uint16(id), lynxpoint{variant: LYNX_POINT_SERVER})
-	}
-
-	for _, id := range []uint16{
-		0x9c41, 0x9c43, 0x9c45,
-	} {
-		RegisterPCI(0x8086, uint16(id), lynxpoint{variant: LYNX_POINT_ULT})
-	}
-
-	/* PCIe bridge */
-	for _, id := range []uint16{
-		0x8c10, 0x8c12, 0x8c14, 0x8c16, 0x8c18, 0x8c1a, 0x8c1c, 0x8c1e,
-		0x9c10, 0x9c12, 0x9c14, 0x9c16, 0x9c18, 0x9c1a,
-	} {
-		RegisterPCI(0x8086, id, GenericPCI{})
-	}
-
-	/* SMBus controller  */
-	RegisterPCI(0x8086, 0x8c22, GenericPCI{MissingParent: "smbus"})
-	RegisterPCI(0x8086, 0x9c22, GenericPCI{MissingParent: "smbus"})
-
-	/* SATA */
-	for _, id := range []uint16{
-		0x8c00, 0x8c02, 0x8c04, 0x8c06, 0x8c08, 0x8c0e,
-		0x8c01, 0x8c03, 0x8c05, 0x8c07, 0x8c09, 0x8c0f,
-		0x9c03, 0x9c05, 0x9c07, 0x9c0f,
-	} {
-		RegisterPCI(0x8086, id, GenericPCI{})
-	}
-
-	/* EHCI */
-	for _, id := range []uint16{
-		0x9c26, 0x8c26, 0x8c2d,
-	} {
-		RegisterPCI(0x8086, id, GenericPCI{})
-	}
-
-	/* XHCI */
-	RegisterPCI(0x8086, 0x8c31, GenericPCI{})
-	RegisterPCI(0x8086, 0x9c31, GenericPCI{})
-
-	/* ME and children */
-	for _, id := range []uint16{
-		0x8c3a, 0x8c3b, 0x8c3c, 0x8c3d,
-		0x9c3a, 0x9c3b, 0x9c3c, 0x9c3d,
-	} {
-		RegisterPCI(0x8086, id, GenericPCI{})
-	}
-
-	/* Ethernet */
-	RegisterPCI(0x8086, 0x8c33, GenericPCI{})
-
-	/* Thermal */
-	RegisterPCI(0x8086, 0x8c24, GenericPCI{})
-	RegisterPCI(0x8086, 0x9c24, GenericPCI{})
-
-	/* LAN Controller on LP PCH (if EEPROM has 0x0000/0xffff in DID) */
-	RegisterPCI(0x8086, 0x155a, GenericPCI{})
-
-	/* SDIO */
-	RegisterPCI(0x8086, 0x9c35, GenericPCI{})
-
-	/* Smart Sound Technology Controller */
-	RegisterPCI(0x8086, 0x9c36, GenericPCI{})
-
-	/* Serial I/O */
-	for id := uint16(0x9c60); id <= 0x9c66; id++ {
-		RegisterPCI(0x8086, id, GenericPCI{})
-	}
-}
diff --git a/util/autoport/lynxpoint_lp_gpio.go b/util/autoport/lynxpoint_lp_gpio.go
deleted file mode 100644
index fbc1686a..00000000
--- a/util/autoport/lynxpoint_lp_gpio.go
+++ /dev/null
@@ -1,252 +0,0 @@
-package main
-
-import (
-	"fmt"
-	"os"
-	"strings"
-)
-
-const (
-	PIRQI = 0
-	PIRQJ = 1
-	PIRQK = 2
-	PIRQL = 3
-	PIRQM = 4
-	PIRQN = 5
-	PIRQO = 6
-	PIRQP = 7
-	PIRQQ = 8
-	PIRQR = 9
-	PIRQS = 10
-	PIRQT = 11
-	PIRQU = 12
-	PIRQV = 13
-	PIRQW = 14
-	PIRQX = 15
-)
-
-/* from sb/intel/lynxpoint/lp_gpio.c */
-func lp_gpio_to_pirq(gpioNum uint16) int {
-	switch gpioNum {
-	case 8:
-		return PIRQI
-	case 9:
-		return PIRQJ
-	case 10:
-		return PIRQK
-	case 13:
-		return PIRQL
-	case 14:
-		return PIRQM
-	case 45:
-		return PIRQN
-	case 46:
-		return PIRQO
-	case 47:
-		return PIRQP
-	case 48:
-		return PIRQQ
-	case 49:
-		return PIRQR
-	case 50:
-		return PIRQS
-	case 51:
-		return PIRQT
-	case 52:
-		return PIRQU
-	case 53:
-		return PIRQV
-	case 54:
-		return PIRQW
-	case 55:
-		return PIRQX
-	default:
-		return -1
-	}
-}
-
-func conf0str(conf0 uint32) string {
-	if (conf0 & 1) == 0 {
-		return "GPIO_MODE_NATIVE"
-	} else {
-		s := []string{"GPIO_MODE_GPIO"}
-		var gpio_output bool
-		if ((conf0 >> 2) & 1) == 1 {
-			s = append(s, "GPIO_DIR_INPUT")
-			gpio_output = false
-		} else {
-			s = append(s, "GPIO_DIR_OUTPUT")
-			gpio_output = true
-		}
-		if ((conf0 >> 3) & 1) == 1 {
-			s = append(s, "GPIO_INVERT")
-		}
-		if ((conf0 >> 4) & 1) == 1 {
-			s = append(s, "GPIO_IRQ_LEVEL")
-		}
-		if gpio_output {
-			if ((conf0 >> 31) & 1) == 1 {
-				s = append(s, "GPO_LEVEL_HIGH")
-			} else {
-				s = append(s, "GPO_LEVEL_LOW")
-			}
-		}
-		return strings.Join(s, " | ")
-	}
-}
-
-func lpgpio_preset(conf0 uint32, owner uint32, route uint32, irqen uint32, pirq uint32) string {
-	if conf0 == 0xd { /* 0b1101: MODE_GPIO | INPUT | INVERT */
-		if owner == 0 { /* OWNER_ACPI */
-			if irqen == 0 && pirq == 0 {
-				if route == 0 { /* SCI */
-					return "GPIO_ACPI_SCI"
-				} else {
-					return "GPIO_ACPI_SMI"
-				}
-			}
-			return ""
-		} else { /* OWNER_GPIO */
-			if route == 0 && irqen == 0 && pirq != 0 {
-				return "GPIO_INPUT_INVERT"
-			}
-			return ""
-		}
-	}
-
-	if conf0 == 0x5 && owner == 1 { /* 0b101: MODE_GPIO | INPUT, OWNER_GPIO */
-		if route == 0 && irqen == 0 {
-			if pirq == 1 {
-				return "GPIO_PIRQ"
-			} else {
-				return "GPIO_INPUT"
-			}
-		}
-		return ""
-	}
-
-	if owner == 1 && irqen == 1 {
-		if route == 0 && pirq == 0 {
-			if conf0 == 0x5 { /* 0b00101 */
-				return "GPIO_IRQ_EDGE"
-			}
-			if conf0 == 0x15 { /* 0b10101 */
-				return "GPIO_IRQ_LEVEL"
-			}
-		}
-		return ""
-	}
-	return ""
-}
-
-func gpio_str(conf0 uint32, conf1 uint32, owner uint32, route uint32, irqen uint32, reset uint32, blink uint32, pirq uint32) string {
-	s := []string{}
-	s = append(s, fmt.Sprintf(".conf0 = %s", conf0str(conf0)))
-	if conf1 != 0 {
-		s = append(s, fmt.Sprintf(".conf1 = 0x%x", conf1))
-	}
-	if owner != 0 {
-		s = append(s, ".owner = GPIO_OWNER_GPIO")
-	}
-	if route != 0 {
-		s = append(s, ".route = GPIO_ROUTE_SMI")
-	}
-	if irqen != 0 {
-		s = append(s, ".irqen = GPIO_IRQ_ENABLE")
-	}
-	if reset != 0 {
-		s = append(s, ".reset = GPIO_RESET_RSMRST")
-	}
-	if blink != 0 {
-		s = append(s, ".blink = GPO_BLINK")
-	}
-	if pirq != 0 {
-		s = append(s, ".pirq = GPIO_PIRQ_APIC_ROUTE")
-	}
-	return strings.Join(s, ", ")
-}
-
-/* start addresses of GPIO registers */
-const (
-	GPIO_OWN        = 0x0
-	GPIPIRQ2IOXAPIC = 0x10
-	GPO_BLINK       = 0x18
-	GPI_ROUT        = 0x30
-	GP_RST_SEL      = 0x60
-	GPI_IE          = 0x90
-	GPnCONFIGA      = 0x100
-	GPnCONFIGB      = 0x104
-)
-
-func PrintLPGPIO(gpio *os.File, inteltool InteltoolData) {
-	for gpioNum := uint16(0); gpioNum <= 94; gpioNum++ {
-		if gpioNum < 10 {
-			fmt.Fprintf(gpio, "\t[%d]  = ", gpioNum)
-		} else {
-			fmt.Fprintf(gpio, "\t[%d] = ", gpioNum)
-		}
-		conf0 := inteltool.GPIO[GPnCONFIGA+gpioNum*8]
-		conf1 := inteltool.GPIO[GPnCONFIGB+gpioNum*8]
-		set := gpioNum / 32
-		bit := gpioNum % 32
-		/* owner only effective in GPIO mode */
-		owner := (inteltool.GPIO[GPIO_OWN+set*4] >> bit) & 1
-		route := (inteltool.GPIO[GPI_ROUT+set*4] >> bit) & 1
-		irqen := (inteltool.GPIO[GPI_IE+set*4] >> bit) & 1
-		reset := (inteltool.GPIO[GP_RST_SEL+set*4] >> bit) & 1
-		var blink, pirq uint32
-		/* blink only effective in GPIO output mode */
-		if set == 0 {
-			blink = (inteltool.GPIO[GPO_BLINK] >> bit) & 1
-		} else {
-			blink = 0
-		}
-		irqset := lp_gpio_to_pirq(gpioNum)
-		if irqset >= 0 {
-			pirq = (inteltool.GPIO[GPIPIRQ2IOXAPIC] >> uint(irqset)) & 1
-		} else {
-			pirq = 0
-		}
-
-		if (conf0 & 1) == 0 {
-			fmt.Fprintf(gpio, "LP_GPIO_NATIVE,\n")
-		} else if (conf0 & 4) == 0 {
-			/* configured as output */
-			if ((conf0 >> 31) & 1) == 0 {
-				fmt.Fprintf(gpio, "LP_GPIO_OUT_LOW,\n")
-			} else {
-				fmt.Fprintf(gpio, "LP_GPIO_OUT_HIGH,\n")
-			}
-		} else if (conf1 & 4) != 0 {
-			/* configured as input and sensing disabled */
-			fmt.Fprintf(gpio, "LP_GPIO_UNUSED,\n")
-		} else {
-			is_preset := false
-			if conf1 == 0 && reset == 0 && blink == 0 {
-				preset := lpgpio_preset(conf0, owner, route, irqen, pirq)
-				if preset != "" {
-					fmt.Fprintf(gpio, "LP_%s,\n", preset)
-					is_preset = true
-				}
-			}
-			if !is_preset {
-				fmt.Fprintf(gpio, "{ %s },\n", gpio_str(conf0, conf1, owner, route, irqen, reset, blink, pirq))
-			}
-		}
-	}
-}
-
-func Lynxpoint_LP_GPIO(ctx Context, inteltool InteltoolData) {
-	gpio := Create(ctx, "gpio.c")
-	defer gpio.Close()
-
-	AddROMStageFile("gpio.c", "")
-
-	Add_gpl(gpio)
-	gpio.WriteString(`#include <southbridge/intel/lynxpoint/lp_gpio.h>
-
-const struct pch_lp_gpio_map mainboard_lp_gpio_map[] = {
-`)
-	PrintLPGPIO(gpio, inteltool)
-	gpio.WriteString("\tLP_GPIO_END\n};\n")
-}
diff --git a/util/autoport/main.go b/util/autoport/main.go
deleted file mode 100644
index 3a2f0617..00000000
--- a/util/autoport/main.go
+++ /dev/null
@@ -1,915 +0,0 @@
-/* This is just an experiment. Full automatic porting
-   is probably not possible but a lot can be automated. */
-package main
-
-import (
-	"bytes"
-	"flag"
-	"fmt"
-	"log"
-	"os"
-	"sort"
-	"strings"
-)
-
-type PCIAddr struct {
-	Bus  int
-	Dev  int
-	Func int
-}
-
-type PCIDevData struct {
-	PCIAddr
-	PCIVenID   uint16
-	PCIDevID   uint16
-	ConfigDump []uint8
-}
-
-type PCIDevice interface {
-	Scan(ctx Context, addr PCIDevData)
-}
-
-type InteltoolData struct {
-	GPIO   map[uint16]uint32
-	RCBA   map[uint16]uint32
-	IOBP   map[uint32]uint32
-	IGD    map[uint32]uint32
-	MCHBAR map[uint16]uint32
-	PMBASE map[uint16]uint32
-}
-
-type DMIData struct {
-	Vendor   string
-	Model    string
-	Version  string
-	IsLaptop bool
-}
-
-type AzaliaCodec struct {
-	Name        string
-	VendorID    uint32
-	SubsystemID uint32
-	CodecNo     int
-	PinConfig   map[int]uint32
-}
-
-type DevReader interface {
-	GetPCIList() []PCIDevData
-	GetDMI() DMIData
-	GetInteltool() InteltoolData
-	GetAzaliaCodecs() []AzaliaCodec
-	GetACPI() map[string][]byte
-	GetCPUModel() []uint32
-	GetEC() []byte
-	GetIOPorts() []IOPorts
-	HasPS2() bool
-}
-
-type IOPorts struct {
-	Start uint16
-	End   uint16
-	Usage string
-}
-
-type SouthBridger interface {
-	GetGPIOHeader() string
-	EncodeGPE(int) int
-	DecodeGPE(int) int
-	EnableGPE(int)
-	NeedRouteGPIOManually()
-}
-
-var SouthBridge SouthBridger
-var BootBlockFiles map[string]string = map[string]string{}
-var ROMStageFiles map[string]string = map[string]string{}
-var RAMStageFiles map[string]string = map[string]string{}
-var SMMFiles map[string]string = map[string]string{}
-var MainboardInit string
-var MainboardEnable string
-var MainboardIncludes []string
-
-type Context struct {
-	MoboID        string
-	KconfigName   string
-	Vendor        string
-	Model         string
-	BaseDirectory string
-	InfoSource    DevReader
-	SaneVendor    string
-}
-
-type IOAPICIRQ struct {
-	APICID int
-	IRQNO  [4]int
-}
-
-var IOAPICIRQs map[PCIAddr]IOAPICIRQ = map[PCIAddr]IOAPICIRQ{}
-var KconfigBool map[string]bool = map[string]bool{}
-var KconfigComment map[string]string = map[string]string{}
-var KconfigString map[string]string = map[string]string{}
-var KconfigHex map[string]uint32 = map[string]uint32{}
-var KconfigInt map[string]int = map[string]int{}
-var ROMSizeKB = 0
-var ROMProtocol = ""
-var FlashROMSupport = ""
-
-func GetLE16(inp []byte) uint16 {
-	return uint16(inp[0]) | (uint16(inp[1]) << 8)
-}
-
-func FormatHexLE16(inp []byte) string {
-	return fmt.Sprintf("0x%04x", GetLE16(inp))
-}
-
-func FormatHex32(u uint32) string {
-	return fmt.Sprintf("0x%08x", u)
-}
-
-func FormatHex8(u uint8) string {
-	return fmt.Sprintf("0x%02x", u)
-}
-
-func FormatInt32(u uint32) string {
-	return fmt.Sprintf("%d", u)
-}
-
-func FormatHexLE32(d []uint8) string {
-	u := uint32(d[0]) | (uint32(d[1]) << 8) | (uint32(d[2]) << 16) | (uint32(d[3]) << 24)
-	return FormatHex32(u)
-}
-
-func FormatBool(inp bool) string {
-	if inp {
-		return "1"
-	} else {
-		return "0"
-	}
-}
-
-func sanitize(inp string) string {
-	result := strings.ToLower(inp)
-	result = strings.Replace(result, " ", "_", -1)
-	result = strings.Replace(result, ",", "_", -1)
-	result = strings.Replace(result, "-", "_", -1)
-	for strings.HasSuffix(result, ".") {
-		result = result[0 : len(result)-1]
-	}
-	return result
-}
-
-func AddBootBlockFile(Name string, Condition string) {
-	BootBlockFiles[Name] = Condition
-}
-
-func AddROMStageFile(Name string, Condition string) {
-	ROMStageFiles[Name] = Condition
-}
-
-func AddRAMStageFile(Name string, Condition string) {
-	RAMStageFiles[Name] = Condition
-}
-
-func AddSMMFile(Name string, Condition string) {
-	SMMFiles[Name] = Condition
-}
-
-func IsIOPortUsedBy(ctx Context, port uint16, name string) bool {
-	for _, io := range ctx.InfoSource.GetIOPorts() {
-		if io.Start <= port && port <= io.End && io.Usage == name {
-			return true
-		}
-	}
-	return false
-}
-
-var FlagOutDir = flag.String("coreboot_dir", ".", "Resulting coreboot directory")
-
-func writeMF(mf *os.File, files map[string]string, category string) {
-	keys := []string{}
-	for file, _ := range files {
-		keys = append(keys, file)
-	}
-
-	sort.Strings(keys)
-
-	for _, file := range keys {
-		condition := files[file]
-		if condition == "" {
-			fmt.Fprintf(mf, "%s-y += %s\n", category, file)
-		} else {
-			fmt.Fprintf(mf, "%s-$(%s) += %s\n", category, condition, file)
-		}
-	}
-}
-
-func Create(ctx Context, name string) *os.File {
-	li := strings.LastIndex(name, "/")
-	if li > 0 {
-		os.MkdirAll(ctx.BaseDirectory+"/"+name[0:li], 0700)
-	}
-	mf, err := os.Create(ctx.BaseDirectory + "/" + name)
-	if err != nil {
-		log.Fatal(err)
-	}
-	return mf
-}
-
-func Add_gpl(f *os.File) {
-	fmt.Fprintln(f, "/* SPDX-License-Identifier: GPL-2.0-only */")
-	fmt.Fprintln(f)
-}
-
-func RestorePCI16Simple(f *os.File, pcidev PCIDevData, addr uint16) {
-	fmt.Fprintf(f, "	pci_write_config16(PCI_DEV(%d, 0x%02x, %d), 0x%02x, 0x%02x%02x);\n",
-		pcidev.Bus, pcidev.Dev, pcidev.Func, addr,
-		pcidev.ConfigDump[addr+1],
-		pcidev.ConfigDump[addr])
-}
-
-func RestorePCI32Simple(f *os.File, pcidev PCIDevData, addr uint16) {
-	fmt.Fprintf(f, "	pci_write_config32(PCI_DEV(%d, 0x%02x, %d), 0x%02x, 0x%02x%02x%02x%02x);\n",
-		pcidev.Bus, pcidev.Dev, pcidev.Func, addr,
-		pcidev.ConfigDump[addr+3],
-		pcidev.ConfigDump[addr+2],
-		pcidev.ConfigDump[addr+1],
-		pcidev.ConfigDump[addr])
-}
-
-func RestoreRCBA32(f *os.File, inteltool InteltoolData, addr uint16) {
-	fmt.Fprintf(f, "\tRCBA32(0x%04x) = 0x%08x;\n", addr, inteltool.RCBA[addr])
-}
-
-type PCISlot struct {
-	PCIAddr
-	alias             string
-	additionalComment string
-	writeEmpty        bool
-}
-
-type DevTreeNode struct {
-	Bus           int
-	Dev           int
-	Func          int
-	Disabled      bool
-	Registers     map[string]string
-	IOs           map[uint16]uint16
-	Children      []DevTreeNode
-	PCISlots      []PCISlot
-	PCIController bool
-	ChildPCIBus   int
-	MissingParent string
-	SubVendor     uint16
-	SubSystem     uint16
-	Chip          string
-	Ops           string
-	Comment       string
-}
-
-var DevTree DevTreeNode
-var MissingChildren map[string][]DevTreeNode = map[string][]DevTreeNode{}
-var unmatchedPCIChips map[PCIAddr]DevTreeNode = map[PCIAddr]DevTreeNode{}
-var unmatchedPCIDevices map[PCIAddr]DevTreeNode = map[PCIAddr]DevTreeNode{}
-
-func Offset(dt *os.File, offset int) {
-	for i := 0; i < offset; i++ {
-		fmt.Fprintf(dt, "\t")
-	}
-}
-
-func MatchDev(dev *DevTreeNode) {
-	for idx := range dev.Children {
-		MatchDev(&dev.Children[idx])
-	}
-
-	for _, slot := range dev.PCISlots {
-		slotChip, ok := unmatchedPCIChips[slot.PCIAddr]
-
-		if !ok {
-			continue
-		}
-
-		if slot.additionalComment != "" && slotChip.Comment != "" {
-			slotChip.Comment = slot.additionalComment + " " + slotChip.Comment
-		} else {
-			slotChip.Comment = slot.additionalComment + slotChip.Comment
-		}
-
-		delete(unmatchedPCIChips, slot.PCIAddr)
-		MatchDev(&slotChip)
-		dev.Children = append(dev.Children, slotChip)
-	}
-
-	if dev.PCIController {
-		for slot, slotDev := range unmatchedPCIChips {
-			if slot.Bus == dev.ChildPCIBus {
-				delete(unmatchedPCIChips, slot)
-				MatchDev(&slotDev)
-				dev.Children = append(dev.Children, slotDev)
-			}
-		}
-	}
-
-	for _, slot := range dev.PCISlots {
-		slotDev, ok := unmatchedPCIDevices[slot.PCIAddr]
-		if !ok {
-			if slot.writeEmpty {
-				dev.Children = append(dev.Children,
-					DevTreeNode{
-						Registers: map[string]string{},
-						Chip:      "pci",
-						Bus:       slot.Bus,
-						Dev:       slot.Dev,
-						Func:      slot.Func,
-						Comment:   slot.additionalComment,
-						Disabled:  true,
-					},
-				)
-			}
-			continue
-		}
-
-		if slot.additionalComment != "" && slotDev.Comment != "" {
-			slotDev.Comment = slot.additionalComment + " " + slotDev.Comment
-		} else {
-			slotDev.Comment = slot.additionalComment + slotDev.Comment
-		}
-
-		MatchDev(&slotDev)
-		dev.Children = append(dev.Children, slotDev)
-		delete(unmatchedPCIDevices, slot.PCIAddr)
-	}
-
-	if dev.MissingParent != "" {
-		for _, child := range MissingChildren[dev.MissingParent] {
-			MatchDev(&child)
-			dev.Children = append(dev.Children, child)
-		}
-		delete(MissingChildren, dev.MissingParent)
-	}
-
-	if dev.PCIController {
-		for slot, slotDev := range unmatchedPCIDevices {
-			if slot.Bus == dev.ChildPCIBus {
-				MatchDev(&slotDev)
-				dev.Children = append(dev.Children, slotDev)
-				delete(unmatchedPCIDevices, slot)
-			}
-		}
-	}
-}
-
-func writeOn(dt *os.File, dev DevTreeNode) {
-	if dev.Disabled {
-		fmt.Fprintf(dt, "off")
-	} else {
-		fmt.Fprintf(dt, "on")
-	}
-}
-
-func WriteDev(dt *os.File, offset int, alias string, dev DevTreeNode) {
-	Offset(dt, offset)
-	switch dev.Chip {
-	case "cpu_cluster", "lapic", "domain", "ioapic":
-		fmt.Fprintf(dt, "device %s 0x%x ", dev.Chip, dev.Dev)
-		writeOn(dt, dev)
-	case "pci", "pnp":
-		if alias != "" {
-			fmt.Fprintf(dt, "device ref %s ", alias)
-		} else {
-			fmt.Fprintf(dt, "device %s %02x.%x ", dev.Chip, dev.Dev, dev.Func)
-		}
-		writeOn(dt, dev)
-	case "i2c":
-		fmt.Fprintf(dt, "device %s %02x ", dev.Chip, dev.Dev)
-		writeOn(dt, dev)
-	default:
-		fmt.Fprintf(dt, "chip %s", dev.Chip)
-	}
-	if dev.Comment != "" {
-		fmt.Fprintf(dt, " # %s", dev.Comment)
-	}
-	fmt.Fprintf(dt, "\n")
-	if dev.Ops != "" {
-		Offset(dt, offset+1)
-		fmt.Fprintf(dt, "ops %s\n", dev.Ops)
-	}
-	if dev.Chip == "pci" && dev.SubSystem != 0 && dev.SubVendor != 0 {
-		Offset(dt, offset+1)
-		fmt.Fprintf(dt, "subsystemid 0x%04x 0x%04x\n", dev.SubVendor, dev.SubSystem)
-	}
-
-	ioapic, ok := IOAPICIRQs[PCIAddr{Bus: dev.Bus, Dev: dev.Dev, Func: dev.Func}]
-	if dev.Chip == "pci" && ok {
-		for pin, irq := range ioapic.IRQNO {
-			if irq != 0 {
-				Offset(dt, offset+1)
-				fmt.Fprintf(dt, "ioapic_irq %d INT%c 0x%x\n", ioapic.APICID, 'A'+pin, irq)
-			}
-		}
-	}
-
-	keys := []string{}
-	for reg, _ := range dev.Registers {
-		keys = append(keys, reg)
-	}
-
-	sort.Strings(keys)
-
-	for _, reg := range keys {
-		val := dev.Registers[reg]
-		Offset(dt, offset+1)
-		fmt.Fprintf(dt, "register \"%s\" = \"%s\"\n", reg, val)
-	}
-
-	ios := []int{}
-	for reg, _ := range dev.IOs {
-		ios = append(ios, int(reg))
-	}
-
-	sort.Ints(ios)
-
-	for _, reg := range ios {
-		val := dev.IOs[uint16(reg)]
-		Offset(dt, offset+1)
-		fmt.Fprintf(dt, "io 0x%x = 0x%x\n", reg, val)
-	}
-
-	for _, child := range dev.Children {
-		alias = ""
-		for _, slot := range dev.PCISlots {
-			if slot.PCIAddr.Bus == child.Bus &&
-				slot.PCIAddr.Dev == child.Dev && slot.PCIAddr.Func == child.Func {
-				alias = slot.alias
-			}
-		}
-		WriteDev(dt, offset+1, alias, child)
-	}
-
-	Offset(dt, offset)
-	fmt.Fprintf(dt, "end\n")
-}
-
-func PutChip(domain string, cur DevTreeNode) {
-	MissingChildren[domain] = append(MissingChildren[domain], cur)
-}
-
-func PutPCIChip(addr PCIDevData, cur DevTreeNode) {
-	unmatchedPCIChips[addr.PCIAddr] = cur
-}
-
-func PutPCIDevParent(addr PCIDevData, comment string, parent string) {
-	cur := DevTreeNode{
-		Registers:     map[string]string{},
-		Chip:          "pci",
-		Bus:           addr.Bus,
-		Dev:           addr.Dev,
-		Func:          addr.Func,
-		MissingParent: parent,
-		Comment:       comment,
-	}
-	if addr.ConfigDump[0xa] == 0x04 && addr.ConfigDump[0xb] == 0x06 {
-		cur.PCIController = true
-		cur.ChildPCIBus = int(addr.ConfigDump[0x19])
-
-		loopCtr := 0
-		for capPtr := addr.ConfigDump[0x34]; capPtr != 0; capPtr = addr.ConfigDump[capPtr+1] {
-			/* Avoid hangs. There are only 0x100 different possible values for capPtr.
-			   If we iterate longer than that, we're in endless loop. */
-			loopCtr++
-			if loopCtr > 0x100 {
-				break
-			}
-			if addr.ConfigDump[capPtr] == 0x0d {
-				cur.SubVendor = GetLE16(addr.ConfigDump[capPtr+4 : capPtr+6])
-				cur.SubSystem = GetLE16(addr.ConfigDump[capPtr+6 : capPtr+8])
-			}
-		}
-	} else {
-		cur.SubVendor = GetLE16(addr.ConfigDump[0x2c:0x2e])
-		cur.SubSystem = GetLE16(addr.ConfigDump[0x2e:0x30])
-	}
-	unmatchedPCIDevices[addr.PCIAddr] = cur
-}
-
-func PutPCIDev(addr PCIDevData, comment string) {
-	PutPCIDevParent(addr, comment, "")
-}
-
-type GenericPCI struct {
-	Comment       string
-	Bus0Subdiv    string
-	MissingParent string
-}
-
-type GenericVGA struct {
-	GenericPCI
-}
-
-type DSDTInclude struct {
-	Comment string
-	File    string
-}
-
-type DSDTDefine struct {
-	Key     string
-	Comment string
-	Value   string
-}
-
-var DSDTIncludes []DSDTInclude
-var DSDTPCI0Includes []DSDTInclude
-var DSDTDefines []DSDTDefine
-
-func (g GenericPCI) Scan(ctx Context, addr PCIDevData) {
-	PutPCIDevParent(addr, g.Comment, g.MissingParent)
-}
-
-var IGDEnabled bool = false
-
-func (g GenericVGA) Scan(ctx Context, addr PCIDevData) {
-	KconfigString["VGA_BIOS_ID"] = fmt.Sprintf("%04x,%04x",
-		addr.PCIVenID,
-		addr.PCIDevID)
-	PutPCIDevParent(addr, g.Comment, g.MissingParent)
-	IGDEnabled = true
-}
-
-func makeKconfigName(ctx Context) {
-	kn := Create(ctx, "Kconfig.name")
-	defer kn.Close()
-
-	fmt.Fprintf(kn, "config %s\n\tbool \"%s\"\n", ctx.KconfigName, ctx.Model)
-}
-
-func makeComment(name string) string {
-	cmt, ok := KconfigComment[name]
-	if !ok {
-		return ""
-	}
-	return " # " + cmt
-}
-
-func makeKconfig(ctx Context) {
-	kc := Create(ctx, "Kconfig")
-	defer kc.Close()
-
-	fmt.Fprintf(kc, "if %s\n\n", ctx.KconfigName)
-
-	fmt.Fprintf(kc, "config BOARD_SPECIFIC_OPTIONS\n\tdef_bool y\n")
-	keys := []string{}
-	for name, val := range KconfigBool {
-		if val {
-			keys = append(keys, name)
-		}
-	}
-
-	sort.Strings(keys)
-
-	for _, name := range keys {
-		fmt.Fprintf(kc, "\tselect %s%s\n", name, makeComment(name))
-	}
-
-	keys = nil
-	for name, val := range KconfigBool {
-		if !val {
-			keys = append(keys, name)
-		}
-	}
-
-	sort.Strings(keys)
-
-	for _, name := range keys {
-		fmt.Fprintf(kc, `
-config %s%s
-	bool
-	default n
-`, name, makeComment(name))
-	}
-
-	keys = nil
-	for name, _ := range KconfigString {
-		keys = append(keys, name)
-	}
-
-	sort.Strings(keys)
-
-	for _, name := range keys {
-		fmt.Fprintf(kc, `
-config %s%s
-	string
-	default "%s"
-`, name, makeComment(name), KconfigString[name])
-	}
-
-	keys = nil
-	for name, _ := range KconfigHex {
-		keys = append(keys, name)
-	}
-
-	sort.Strings(keys)
-
-	for _, name := range keys {
-		fmt.Fprintf(kc, `
-config %s%s
-	hex
-	default 0x%x
-`, name, makeComment(name), KconfigHex[name])
-	}
-
-	keys = nil
-	for name, _ := range KconfigInt {
-		keys = append(keys, name)
-	}
-
-	sort.Strings(keys)
-
-	for _, name := range keys {
-		fmt.Fprintf(kc, `
-config %s%s
-	int
-	default %d
-`, name, makeComment(name), KconfigInt[name])
-	}
-
-	fmt.Fprintf(kc, "endif\n")
-}
-
-const MoboDir = "/src/mainboard/"
-
-func makeVendor(ctx Context) {
-	vendor := ctx.Vendor
-	vendorSane := ctx.SaneVendor
-	vendorDir := *FlagOutDir + MoboDir + vendorSane
-	vendorUpper := strings.ToUpper(vendorSane)
-	kconfig := vendorDir + "/Kconfig"
-	if _, err := os.Stat(kconfig); os.IsNotExist(err) {
-		f, err := os.Create(kconfig)
-		if err != nil {
-			log.Fatal(err)
-		}
-		defer f.Close()
-		f.WriteString(`if VENDOR_` + vendorUpper + `
-
-choice
-	prompt "Mainboard model"
-
-source "src/mainboard/` + vendorSane + `/*/Kconfig.name"
-
-endchoice
-
-source "src/mainboard/` + vendorSane + `/*/Kconfig"
-
-config MAINBOARD_VENDOR
-	string
-	default "` + vendor + `"
-
-endif # VENDOR_` + vendorUpper + "\n")
-	}
-	kconfigName := vendorDir + "/Kconfig.name"
-	if _, err := os.Stat(kconfigName); os.IsNotExist(err) {
-		f, err := os.Create(kconfigName)
-		if err != nil {
-			log.Fatal(err)
-		}
-		defer f.Close()
-		f.WriteString(`config VENDOR_` + vendorUpper + `
-	bool "` + vendor + `"
-`)
-	}
-
-}
-
-func GuessECGPE(ctx Context) int {
-	/* FIXME:XX Use iasl -d and/or better parsing  */
-	dsdt := ctx.InfoSource.GetACPI()["DSDT"]
-	idx := bytes.Index(dsdt, []byte{0x08, '_', 'G', 'P', 'E', 0x0a}) /* Name (_GPE, byte).  */
-	if idx > 0 {
-		return int(dsdt[idx+6])
-	}
-	return -1
-}
-
-func GuessSPDMap(ctx Context) []uint8 {
-	dmi := ctx.InfoSource.GetDMI()
-
-	if dmi.Vendor == "LENOVO" {
-		return []uint8{0x50, 0x52, 0x51, 0x53}
-	}
-	return []uint8{0x50, 0x51, 0x52, 0x53}
-}
-
-func main() {
-	flag.Parse()
-
-	ctx := Context{}
-
-	ctx.InfoSource = MakeLogReader()
-
-	dmi := ctx.InfoSource.GetDMI()
-
-	ctx.Vendor = dmi.Vendor
-
-	if dmi.Vendor == "LENOVO" {
-		ctx.Model = dmi.Version
-	} else {
-		ctx.Model = dmi.Model
-	}
-
-	if dmi.IsLaptop {
-		KconfigBool["SYSTEM_TYPE_LAPTOP"] = true
-	}
-	ctx.SaneVendor = sanitize(ctx.Vendor)
-	for {
-		last := ctx.SaneVendor
-		for _, suf := range []string{"_inc", "_co", "_corp"} {
-			ctx.SaneVendor = strings.TrimSuffix(ctx.SaneVendor, suf)
-		}
-		if last == ctx.SaneVendor {
-			break
-		}
-	}
-	ctx.MoboID = ctx.SaneVendor + "/" + sanitize(ctx.Model)
-	ctx.KconfigName = "BOARD_" + strings.ToUpper(ctx.SaneVendor+"_"+sanitize(ctx.Model))
-	ctx.BaseDirectory = *FlagOutDir + MoboDir + ctx.MoboID
-	KconfigString["MAINBOARD_DIR"] = ctx.MoboID
-	KconfigString["MAINBOARD_PART_NUMBER"] = ctx.Model
-
-	os.MkdirAll(ctx.BaseDirectory, 0700)
-
-	makeVendor(ctx)
-
-	ScanRoot(ctx)
-
-	if IGDEnabled {
-		KconfigBool["MAINBOARD_HAS_LIBGFXINIT"] = true
-		KconfigComment["MAINBOARD_HAS_LIBGFXINIT"] = "FIXME: check this"
-		AddRAMStageFile("gma-mainboard.ads", "CONFIG_MAINBOARD_USE_LIBGFXINIT")
-	}
-
-	if len(BootBlockFiles) > 0 || len(ROMStageFiles) > 0 || len(RAMStageFiles) > 0 || len(SMMFiles) > 0 {
-		mf := Create(ctx, "Makefile.mk")
-		defer mf.Close()
-		writeMF(mf, BootBlockFiles, "bootblock")
-		writeMF(mf, ROMStageFiles, "romstage")
-		writeMF(mf, RAMStageFiles, "ramstage")
-		writeMF(mf, SMMFiles, "smm")
-	}
-
-	devtree := Create(ctx, "devicetree.cb")
-	defer devtree.Close()
-
-	MatchDev(&DevTree)
-	WriteDev(devtree, 0, "", DevTree)
-
-	if MainboardInit != "" || MainboardEnable != "" || MainboardIncludes != nil {
-		mainboard := Create(ctx, "mainboard.c")
-		defer mainboard.Close()
-		Add_gpl(mainboard)
-		mainboard.WriteString("#include <device/device.h>\n")
-		for _, include := range MainboardIncludes {
-			mainboard.WriteString("#include <" + include + ">\n")
-		}
-		mainboard.WriteString("\n")
-		if MainboardInit != "" {
-			mainboard.WriteString(`static void mainboard_init(struct device *dev)
-{
-` + MainboardInit + "}\n\n")
-		}
-		if MainboardInit != "" || MainboardEnable != "" {
-			mainboard.WriteString("static void mainboard_enable(struct device *dev)\n{\n")
-			if MainboardInit != "" {
-				mainboard.WriteString("\tdev->ops->init = mainboard_init;\n\n")
-			}
-			mainboard.WriteString(MainboardEnable)
-			mainboard.WriteString("}\n\n")
-			mainboard.WriteString(`struct chip_operations mainboard_ops = {
-	.enable_dev = mainboard_enable,
-};
-`)
-		}
-	}
-
-	bi := Create(ctx, "board_info.txt")
-	defer bi.Close()
-
-	fixme := ""
-
-	if dmi.IsLaptop {
-		bi.WriteString("Category: laptop\n")
-	} else {
-		bi.WriteString("Category: desktop\n")
-		fixme += "check category, "
-	}
-
-	missing := "ROM package, ROM socketed"
-
-	if ROMProtocol != "" {
-		fmt.Fprintf(bi, "ROM protocol: %s\n", ROMProtocol)
-	} else {
-		missing += ", ROM protocol"
-	}
-
-	if FlashROMSupport != "" {
-		fmt.Fprintf(bi, "Flashrom support: %s\n", FlashROMSupport)
-	} else {
-		missing += ", Flashrom support"
-	}
-
-	missing += ", Release year"
-
-	if fixme != "" {
-		fmt.Fprintf(bi, "FIXME: %s, put %s\n", fixme, missing)
-	} else {
-		fmt.Fprintf(bi, "FIXME: put %s\n", missing)
-	}
-
-	if ROMSizeKB == 0 {
-		KconfigBool["BOARD_ROMSIZE_KB_2048"] = true
-		KconfigComment["BOARD_ROMSIZE_KB_2048"] = "FIXME: correct this"
-	} else {
-		KconfigBool[fmt.Sprintf("BOARD_ROMSIZE_KB_%d", ROMSizeKB)] = true
-	}
-
-	makeKconfig(ctx)
-	makeKconfigName(ctx)
-
-	dsdt := Create(ctx, "dsdt.asl")
-	defer dsdt.Close()
-
-	for _, define := range DSDTDefines {
-		if define.Comment != "" {
-			fmt.Fprintf(dsdt, "\t/* %s. */\n", define.Comment)
-		}
-		dsdt.WriteString("#define " + define.Key + " " + define.Value + "\n")
-	}
-
-	Add_gpl(dsdt)
-	dsdt.WriteString(
-		`
-#include <acpi/acpi.h>
-
-DefinitionBlock(
-	"dsdt.aml",
-	"DSDT",
-	ACPI_DSDT_REV_2,
-	OEM_ID,
-	ACPI_TABLE_CREATOR,
-	0x20141018	/* OEM revision */
-)
-{
-	#include <acpi/dsdt_top.asl>
-	#include "acpi/platform.asl"
-`)
-
-	for _, x := range DSDTIncludes {
-		if x.Comment != "" {
-			fmt.Fprintf(dsdt, "\t/* %s. */\n", x.Comment)
-		}
-		fmt.Fprintf(dsdt, "\t#include <%s>\n", x.File)
-	}
-
-	dsdt.WriteString(`
-	Device (\_SB.PCI0)
-	{
-`)
-	for _, x := range DSDTPCI0Includes {
-		if x.Comment != "" {
-			fmt.Fprintf(dsdt, "\t/* %s. */\n", x.Comment)
-		}
-		fmt.Fprintf(dsdt, "\t\t#include <%s>\n", x.File)
-	}
-	dsdt.WriteString(
-		`	}
-}
-`)
-
-	if IGDEnabled {
-		gma := Create(ctx, "gma-mainboard.ads")
-		defer gma.Close()
-
-		gma.WriteString(`-- SPDX-License-Identifier: GPL-2.0-or-later
-
-with HW.GFX.GMA;
-with HW.GFX.GMA.Display_Probing;
-
-use HW.GFX.GMA;
-use HW.GFX.GMA.Display_Probing;
-
-private package GMA.Mainboard is
-
-   -- FIXME: check this
-   ports : constant Port_List :=
-     (DP1,
-      DP2,
-      DP3,
-      HDMI1,
-      HDMI2,
-      HDMI3,
-      Analog,
-      LVDS,
-      eDP);
-
-end GMA.Mainboard;
-`)
-	}
-}
diff --git a/util/autoport/rce823.go b/util/autoport/rce823.go
deleted file mode 100644
index 7c921093..00000000
--- a/util/autoport/rce823.go
+++ /dev/null
@@ -1,39 +0,0 @@
-package main
-
-import "fmt"
-
-type rce823 struct {
-	variant string
-}
-
-func (r rce823) Scan(ctx Context, addr PCIDevData) {
-	if addr.Dev == 0 && addr.Func == 0 {
-		cur := DevTreeNode{
-			Chip:    "drivers/ricoh/rce822",
-			Comment: "Ricoh cardreader",
-			Registers: map[string]string{
-
-				"sdwppol":      fmt.Sprintf("%d", (addr.ConfigDump[0xfb]&2)>>1),
-				"disable_mask": fmt.Sprintf("0x%x", addr.ConfigDump[0xcb]),
-			},
-			PCISlots: []PCISlot{
-				PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 0}, writeEmpty: false},
-				PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 1}, writeEmpty: false},
-				PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 2}, writeEmpty: false},
-				PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 3}, writeEmpty: false},
-				PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 4}, writeEmpty: false},
-				PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 5}, writeEmpty: false},
-				PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 6}, writeEmpty: false},
-				PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 7}, writeEmpty: false},
-			},
-		}
-		PutPCIChip(addr, cur)
-	}
-	PutPCIDev(addr, "Ricoh SD card reader")
-	KconfigBool["DRIVERS_RICOH_RCE822"] = true
-}
-
-func init() {
-	RegisterPCI(0x1180, 0xe822, rce823{})
-	RegisterPCI(0x1180, 0xe823, rce823{})
-}
diff --git a/util/autoport/readme.md b/util/autoport/readme.md
deleted file mode 100644
index b546120f..00000000
--- a/util/autoport/readme.md
+++ /dev/null
@@ -1,457 +0,0 @@
-# Porting coreboot using autoport
-
-## Supported platforms
-
-### Chipset
-For any Sandy Bridge or Ivy Bridge platform the generated result should
-be bootable, possibly with minor fixes.
-
-### EC / SuperIO
-EC support is likely to work on Intel-based thinkpads. Other laptops are
-likely to miss EC support. SuperIO support on desktops is more likely to
-work out of the box than any EC.
-
-## How to use autoport
-
-Enable as many devices as possible in the firmware setup of your system.
-This is useful to detect as many devices as possible and make the port
-more complete, as disabled devices cannot be detected.
-
-Boot into target machine under any Linux-based distribution and install
-the following tools on it:
-* `gcc`
-* `golang`
-* `lspci`
-* `dmidecode`
-* `acpidump` (part of `acpica` on some distros)
-
-Clone the coreboot tree and `cd` into it. For more detailed steps, refer
-to Rookie Guide, Lesson 1. Afterwards, run these commands:
-
-		cd util/ectool
-		make
-		cd ../inteltool
-		make
-		cd ../superiotool
-		make
-		cd ../autoport
-		go build
-		sudo ./autoport --input_log=logs --make_logs --coreboot_dir=../..
-
-	Note: in case you have problems getting gcc and golang on the target
-	machine, you can compile the utilities on another computer and copy
-	the binaries to the target machine. You will still need the other
-	listed programs on the target machine, but you may place them in the
-	same directory as autoport.
-
-Check for unknown detected PCI devices, e.g.:
-
-		Unknown PCI device 8086:0085, assuming removable
-
-If autoport says `assuming removable`, you are fine. If it doesn't,
-you may want to add the relevant PCI IDs to autoport. Run `lspci -nn`
-and check which device this is using the PCI ID. Devices which are not
-part of the chipset, such as GPUs or network cards, can be considered
-removable, whereas devices inside the CPU or the PCH such as integrated
-GPUs and bus controllers (SATA, USB, LPC, SMBus...) are non-removable.
-
-Your board has now been added to the tree. However, do not flash it
-in its current state. It can brick your machine. Instead, keep this
-new port and the logs from `util/autoport/logs` somewhere safe. The
-following steps will back up your current firmware, which is always
-recommended, since coreboot may not boot on the first try.
-
-Disassemble your computer and find the flash chip(s). Since there could be
-more than one, this guide will refer to "flash chips" as one or more chips.
-Refer to <https://flashrom.org/Technology> as a reference. The flash chip is
-usually in a `SOIC-8` (2x4 pins, 200mil) or `SOIC-16` (2x8 pins) package. As
-it can be seen on flashrom's wiki, the former package is like any other 8-pin
-chip on the mainboard, but it is slightly larger. The latter package is much
-easier to locate. Always make sure it is a flash chip by looking up what its
-model, printed on it, refers to.
-
-There may be a smaller flash chip for the EC on some laptops, and other chips
-such as network cards may use similar flash chips. These should be left as-is.
-If in doubt, ask!
-
-Once located, use an external flasher to read the flash chips with `flashrom -r`.
-Verify with `flashrom -v` several times that reading is consistent. If it is not,
-troubleshoot your flashing setup. Save the results somewhere safe, preferably on
-media that cannot be easily overwritten and on several devices. You may need this
-later. The write process erases the flash chips first, and erased data on a flash
-chip is lost for a very long time, usually forever!
-
-Compile coreboot for your ported mainboard with some console enabled. The most
-common ones are EHCI debug, serial port and SPI flash console as a last resort.
-If your system is a laptop and has a dedicated video card, you may need to add
-a video BIOS (VBIOS) to coreboot to be able to see any video output. Desktop
-video cards, as well as some MXM video cards, have this VBIOS on a flash chip
-on the card's PCB, so this step is not necessary for them.
-
-Flash coreboot on the machine. On recent Intel chipsets, the flash space is split
-in several regions. Only the one known as "BIOS region" should be flashed. If
-there is only one flash chip present, this is best done by adding the `--ifd`
-and `-i bios` parameters flashrom has (from v1.0 onwards) to specify what flash
-descriptor region it should operate on. If the ME (Management Engine) region is
-not readable, which is the case on most systems, use the `--noverify-all`
-parameter as well.
-
-For systems with two flash chips, this is not so easy. It is probably better to
-ask in coreboot or flashrom communication channels, such as via IRC or on the
-mailing lists.
-
-Once flashed, try to boot. Anything is possible. If a log is generated, save it
-and use it to address any issues. See the next section for useful information.
-Find all the sections marked with `FIXME` and correct them.
-
-Send your work to review.coreboot.org. I mean it, your effort is very appreciated.
-Refer to Rookie Guide, Lesson 2 for instructions on how to submit a patch.
-
-## Manual fixes
-### SPD
-In order to initialize the RAM memory, coreboot needs to know its timings, which vary between
-modules. Socketed RAM has a small EEPROM chip, which is accessible via SMBus and contains the
-timing data. This data is usually known as SPD. Unfortunately, the SMBus addresses may not
-correlate with the RAM slots and cannot always be detected automatically. The address map is
-encoded in function `mainboard_get_spd` in `romstage.c`. By default, autoport uses the most
-common map `0x50, 0x51, 0x52, 0x53` on everything except for Lenovo systems, which are known
-to use `0x50, 0x52, 0x51, 0x53`. To detect the correct memory map, the easiest way is to boot
-on the vendor firmware with just one module in channel 0, slot 0, and check the SMBus address
-the EEPROM has. Under Linux, you can use these commands to see what is on SMBus:
-
-	$ sudo modprobe i2c-dev
-	$ sudo modprobe i2c-i801
-	$ sudo i2cdetect -l
-	i2c-0	i2c		i915 gmbus ssc				I2C adapter
-	i2c-1	i2c		i915 gmbus vga				I2C adapter
-	i2c-2	i2c		i915 gmbus panel			I2C adapter
-	i2c-3	i2c		i915 gmbus dpc				I2C adapter
-	i2c-4	i2c		i915 gmbus dpb				I2C adapter
-	i2c-5	i2c		i915 gmbus dpd				I2C adapter
-	i2c-6	i2c		DPDDC-B					I2C adapter
-	i2c-7	i2c		DPDDC-C					I2C adapter
-	i2c-8	i2c		DPDDC-D					I2C adapter
-	i2c-9	smbus		SMBus I801 adapter at 0400		SMBus adapter
-
-	$ sudo i2cdetect 9
-	WARNING! This program can confuse your I2C bus, cause data loss and worse!
-	I will probe file /dev/i2c-9.
-	I will probe address range 0x03-0x77.
-	Continue? [Y/n] y
-	     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
-	00:          -- -- -- -- -- 08 -- -- -- -- -- -- --
-	10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
-	20: -- -- -- -- 24 -- -- -- -- -- -- -- -- -- -- --
-	30: 30 31 -- -- -- -- -- -- -- -- -- -- -- -- -- --
-	40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
-	50: 50 -- -- -- 54 55 56 57 -- -- -- -- 5c 5d 5e 5f
-	60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
-	70: -- -- -- -- -- -- -- --
-
-Make sure to replace the `9` on the last command with the bus number for SMBus on
-your system. Here, there is a module at address `0x50`. Since only one module was
-installed on the first slot of the first channel, we know the first position of
-the SPD array must be `0x50`. After testing all the slots, your `mainboard_get_spd`
-should look similar to this:
-
-	void mainboard_get_spd(spd_raw_data *spd) {
-		read_spd(&spd[0], 0x50);
-		read_spd(&spd[1], 0x51);
-		read_spd(&spd[2], 0x52);
-		read_spd(&spd[3], 0x53);
-	}
-
-Note that there should be one line per memory slot on the mainboard.
-
-Note: slot labelling may be missing or unreliable. Use `inteltool` to see
-which slots have modules in them.
-
-This procedure is ideal, if your RAM is socketed. If you have soldered RAM,
-remove any socketed memory modules and check if any EEPROM appears on SMBus.
-If this is the case, you can proceed as if the RAM was socketed. However,
-you may have to guess some entries if there multiple EEPROMs appear.
-
-Most of the time, soldered RAM does not have an EEPROM. Instead, the SPD data is
-inside the main flash chip where the firmware is. If this is the case, you need
-to generate the SPD data to use with coreboot. Look at `inteltool.log`. There
-should be something like this:
-
-	/* SPD matching current mode:  */
-	/* CH0S0  */
-	00: 92 11 0b 03 04 00 00 09 03 52 01 08 0a 00 80 00
-	10: 6e 78 6e 32 6e 11 18 81 20 08 3c 3c 00 f0 00 00
-	20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 65 00
-	40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6d 17
-	80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	/* CH1S0  */
-	00: 92 11 0b 03 04 00 00 09 03 52 01 08 0a 00 80 00
-	10: 6e 78 6e 32 6e 11 18 81 20 08 3c 3c 00 f0 00 00
-	20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 65 00
-	40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6d 17
-	80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-
-This is not a full-fledged SPD dump, as it only lists
-the currently-used speed configuration, and lacks info
-such as a serial number, vendor and model. Use `xxd`
-to create a binary file with this SPD data:
-
-	$ cat | xxd -r > spd.bin  <<EOF
-	00: 92 11 0b 03 04 00 00 09 03 52 01 08 0a 00 80 00
-	10: 6e 78 6e 32 6e 11 18 81 20 08 3c 3c 00 f0 00 00
-	20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 65 00
-	40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6d 17
-	80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-	EOF (press Ctrl + D)
-
-Then, move the generated file into your mainboard's directory
-and hook it up to the build system by adding the following
-lines to `Makefile.mk`:
-
-	cbfs-files-y += spd.bin
-	spd.bin-file := spd.bin
-	spd.bin-type := raw
-
-Now we need coreboot to use this SPD file. The following example
-shows a hybrid configuration, in which one module is soldered and
-the other one is socketed:
-
-	void mainboard_get_spd(spd_raw_data *spd)
-	{
-		void *spd_file;
-		size_t spd_file_len = 0;
-		/* C0S0 is a soldered RAM with no real SPD. Use stored SPD. */
-		spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_RAW,
-						 &spd_file_len);
-		if (spd_file && spd_file_len >= 128)
-			memcpy(&spd[0], spd_file, 128);
-
-		/* C1S0 is a physical slot. */
-		read_spd(&spd[2], 0x52);
-	}
-
-If several slots are soldered there are two ways to handle them:
-
-* If all use the same SPD data, use the same file for all the slots. Do
-  not forget to copy the data on all the array elements that need it.
-* If they use different data, use several files.
-
-If memory initialization is not working, in particular write training (timB)
-on DIMM's second rank fails, try enabling rank 1 mirroring, which can't be
-detected by inteltool. It is described by SPD field "Address Mapping from Edge
-Connector to DRAM", byte `63` (`0x3f`). Bit 0 describes Rank 1 Mapping,
-0 = standard, 1 = mirrored; set it to 1. Bits 1-7 are reserved.
-
-### `board_info.txt`
-
-`board_info.txt` is a text file used in the board status page to list all
-the supported boards and their specifications. Most of the information
-cannot be detected by autoport. Common entries are:
-
-* `ROM package`, `ROM protocol` and `ROM socketed`:
-  These refer to the flash chips you found earlier. You can visit
-  <https://flashrom.org/Technology> for more information.
-
-* `Release year`: Use the power of Internet to find that information.
-* `Category`: This describes the type of mainboard you have.
-  Valid categories are:
-  * `desktop`. Desktops and workstations.
-  * `server`. Servers.
-  * `laptop`. Laptops, notebooks and netbooks.
-  * `half`. Embedded / PC/104 / Half-size boards.
-  * `mini`. Mini-ITX / Micro-ITX / Nano-ITX
-  * `settop`. Set-top-boxes / Thin clients.
-  * `eval`. Development / Evaluation Boards.
-  * `sbc`. Single-Board computer.
-  * `emulation`: Virtual machines and emulators. May require especial care
-                 as they often behave differently from real counterparts.
-  * `misc`. Anything not fitting the categories above. Not recommended.
-
-* `Flashrom support`: This means whether the internal programmer is usable.
-  If flashing coreboot internally works, this should be set to `y`. Else,
-  feel free to investigate why it is not working.
-
-### `USBDEBUG_HCD_INDEX`
-
-Which controller the most easily accessible USB debug port is. On Intel,
-1 is for `00:1d.0` and 2 is for `00:1a.0` (yes, it's reversed). Refer to
-<https://www.coreboot.org/EHCI_Debug_Port> for more info.
-
-If you are able to use EHCI debug without setting the HCD index manually,
-this is correct.
-
-### `BOARD_ROMSIZE_KB_2048`
-
-This parameter refers to the total size of the flash chips coreboot will be in.
-This value must be correct for S3 resume to work properly. This parameter also
-defines the size of the generated coreboot image, but that is not a major issue
-since tools like `dd` can be used to cut fragments of a coreboot image to flash
-on smaller chips.
-
-This should be detected automatically, but it may not be detected properly in
-some cases. If it was not detected, put the correct total size here to serve
-as a sane default when configuring coreboot.
-
-### `DRAM_RESET_GATE_GPIO`
-
-When the computer is suspended to RAM (ACPI S3), the RAM reset signal must not
-reach the RAM modules. Otherwise, the computer will not resume and any opened
-programs will be lost. This is done by powering down a MOSFET, which disconnects
-the reset signal from the RAM modules. Most manufacturers put this gate on GPIO
-60 but Lenovo is known to put it on GPIO 10. If suspending and resuming works,
-this value is correct. This can also be determined from the board's schematics.
-
-## GNVS
-
-`mainboard_fill_gnvs` sets values in GNVS, which then ACPI makes use of for
-various power-related functions. Normally, there is no need to modify it
-on laptops (desktops have no "lid"!) but it makes sense to proofread it.
-
-## `gfx.ndid` and `gfx.did`
-
-Those describe which video outputs are declared in ACPI tables.
-Normally, there is no need to have these values, but if you miss some
-non-standard video output, you can declare it there. Bit 31 is set to
-indicate the presence of the output. Byte 1 is the type and byte 0 is
-used for disambigution so that ID composed of byte 1 and 0 is unique.
-
-Types are:
-* 1 = VGA
-* 2 = TV
-* 3 = DVI
-* 4 = LCD
-
-## `c*_acpower` and `c*_battery`
-
-Which mwait states to match to which ACPI levels. Normally, there is no
-need to modify anything unless your device has very special power saving
-requirements.
-
-## `install_intel_vga_int15_handler`
-
-This is used with the Intel VGA BIOS, which is not the default option.
-It is more error-prone than open-source graphics initialization, so do
-not bother with this until your mainboard boots. This is a function
-which takes four parameters:
-1.  Which type of LCD panel is connected.
-2.  Panel fit.
-3.  Boot display.
-4.  Display type.
-
-Refer to `src/drivers/intel/gma/int15.h` to see which values can be used.
-For desktops, there is no LCD panel directly connected to the Intel GPU,
-so the first parameter should be `GMA_INT15_ACTIVE_LFP_NONE`. On other
-mainboards, it depends.
-
-## CMOS options
-
-Due to the poor state of CMOS support in coreboot, autoport does not
-support it and this probably won't change until the format in the tree
-improves. If you really care about CMOS options:
-
-* Create files `cmos.layout` and `cmos.default`
-* Enable `HAVE_OPTION_TABLE` and `HAVE_CMOS_DEFAULT` in `Kconfig`
-
-## EC (lenovo)
-
-You need to set `has_keyboard_backlight` (backlit keyboard like X230),
-`has_power_management_beeps` (optional beeps when e.g. plugging the cord
-in) and `has_uwb` (third MiniPCIe slot) in accordance to functions available
-on your machine
-
-In rare cases autoport is unable to detect GPE. You can detect it from
-dmesg or ACPI tables. Look for line in dmesg like
-
-	ACPI: EC: GPE = 0x11, I/O: command/status = 0x66, data = 0x62
-
-This means that GPE is `0x11` in ACPI notation. This is the correct
-value for `THINKPAD_EC_GPE`. To get the correct value for `GPE_EC_SCI`
-you need to substract `0x10`, so value for it is `1`.
-
-The pin used to wake the machine from EC is guessed. If your machine doesn't
-wake on lid open and pressing of Fn, change `GPE_EC_WAKE`.
-
-Keep `GPE_EC_WAKE` and `GPE_EC_SCI` in sync with `gpi*_routing`.
-`gpi*_routing` matching `GPE_EC_WAKE` or `GPE_EC_SCI` is set to `2`
-and all others are absent.
-
-If your dock has LPC wires or needs some special treatement you may
-need to add codes to initialize the dock and support code to
-DSDT. See the `init_dock()` for `x60`, `x200` or `x201`.
-
-## EC (generic laptop)
-
-Almost any laptop has an embedded controller. In a nutshell, it's a
-small, low-powered computer designed to be used on laptops. Exact
-functionality differs between machines. Its main functions include:
-
-* Control of power and rfkill to different component
-* Keyboard (PS/2) interface implementation
-* Battery, AC, LID and thermal information exporting
-* Hotkey support
-
-autoport automatically attempts to restore the dumped config but it
-may or may not work and may even lead to a hang or powerdown. If your
-machine stops at `Replaying EC dump ...` try commenting EC replay out
-
-autoport tries to detect if machine has PS/2 interface and if so calls
-`pc_keyboard_init` and exports relevant ACPI objects. If detection fails
-you may have to add them yourself
-
-ACPI methods `_PTS` (prepare to sleep) and `_WAK` (wake) are executed
-when transitioning to sleep or wake state respectively. You may need to
-add power-related calls there to either shutdown some components or to
-add a workaround to stop giving OS thermal info until next refresh.
-
-For exporting the battery/AC/LID/hotkey/thermal info you need to write
-`acpi/ec.asl`. For an easy example look into `apple/macbook21` or
-`packardbell/ms2290`. For information about needed methods consult
-relevant ACPI specs. Tracing which EC events can be done using
-[dynamic debug](https://wiki.ubuntu.com/Kernel/Reference/ACPITricksAndTips)
-
-EC GPE needs to be routed to SCI in order for OS in order to receive
-EC events like "hotkey X pressed" or "AC plugged". autoport attempts
-to detect GPE but in rare cases may fail. You can detect it from
-dmesg or ACPI tables. Look for line in dmesg like
-
-	ACPI: EC: GPE = 0x11, I/O: command/status = 0x66, data = 0x62
-
-This means that GPE is `0x11` in ACPI notation. This is the correct
-value for `_GPE`.
-
-Keep GPE in sync with `gpi*_routing`.
-`gpi*_routing` matching `GPE - 0x10` is set to `2`
-and all others are absent. If EC has separate wake pin
-then this GPE needs to be routed as well
diff --git a/util/autoport/root.go b/util/autoport/root.go
deleted file mode 100644
index 7e9e8145..00000000
--- a/util/autoport/root.go
+++ /dev/null
@@ -1,47 +0,0 @@
-package main
-
-import "fmt"
-import "os"
-
-var supportedPCIDevices map[uint32]PCIDevice = map[uint32]PCIDevice{}
-var PCIMap map[PCIAddr]PCIDevData = map[PCIAddr]PCIDevData{}
-
-func ScanRoot(ctx Context) {
-	for _, pciDev := range ctx.InfoSource.GetPCIList() {
-		PCIMap[pciDev.PCIAddr] = pciDev
-	}
-	for _, pciDev := range ctx.InfoSource.GetPCIList() {
-		vendevid := (uint32(pciDev.PCIDevID) << 16) | uint32(pciDev.PCIVenID)
-
-		dev, ok := supportedPCIDevices[vendevid]
-		if !ok {
-			if pciDev.PCIAddr.Bus != 0 {
-				fmt.Printf("Unknown PCI device %04x:%04x, assuming removable\n",
-					pciDev.PCIVenID, pciDev.PCIDevID)
-				continue
-			}
-			fmt.Printf("Unsupported PCI device %04x:%04x\n",
-				pciDev.PCIVenID, pciDev.PCIDevID)
-			dev = GenericPCI{Comment: fmt.Sprintf("Unsupported PCI device %04x:%04x",
-				pciDev.PCIVenID, pciDev.PCIDevID)}
-		}
-		dev.Scan(ctx, pciDev)
-	}
-	if SouthBridge == nil {
-		fmt.Println("Could not detect southbridge. Aborting!")
-		os.Exit(1)
-	}
-	dmi := ctx.InfoSource.GetDMI()
-	if !dmi.IsLaptop {
-		NoEC(ctx)
-	} else if dmi.Vendor == "LENOVO" {
-		LenovoEC(ctx)
-	} else {
-		FIXMEEC(ctx)
-	}
-}
-
-func RegisterPCI(VenID uint16, DevID uint16, dev PCIDevice) {
-	vendevid := (uint32(DevID) << 16) | uint32(VenID)
-	supportedPCIDevices[vendevid] = dev
-}
diff --git a/util/autoport/sandybridge.go b/util/autoport/sandybridge.go
deleted file mode 100644
index bd7f0f0c..00000000
--- a/util/autoport/sandybridge.go
+++ /dev/null
@@ -1,93 +0,0 @@
-package main
-
-import "fmt"
-
-type sandybridgemc struct {
-}
-
-func (i sandybridgemc) Scan(ctx Context, addr PCIDevData) {
-	inteltool := ctx.InfoSource.GetInteltool()
-
-	/* FIXME:XX Move this somewhere else.  */
-	MainboardIncludes = append(MainboardIncludes, "drivers/intel/gma/int15.h")
-	MainboardEnable += (`	/* FIXME: fix these values. */
-	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-					GMA_INT15_PANEL_FIT_DEFAULT,
-					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-`)
-
-	DevTree = DevTreeNode{
-		Chip:          "northbridge/intel/sandybridge",
-		MissingParent: "northbridge",
-		Comment:       "FIXME: GPU registers may not always apply.",
-		Registers: map[string]string{
-			"gpu_dp_b_hotplug":                    FormatInt32((inteltool.IGD[0xc4030] >> 2) & 7),
-			"gpu_dp_c_hotplug":                    FormatInt32((inteltool.IGD[0xc4030] >> 10) & 7),
-			"gpu_dp_d_hotplug":                    FormatInt32((inteltool.IGD[0xc4030] >> 18) & 7),
-			"gpu_panel_port_select":               FormatInt32((inteltool.IGD[0xc7208] >> 30) & 3),
-			"gpu_panel_power_up_delay":            FormatInt32((inteltool.IGD[0xc7208] >> 16) & 0x1fff),
-			"gpu_panel_power_backlight_on_delay":  FormatInt32(inteltool.IGD[0xc7208] & 0x1fff),
-			"gpu_panel_power_down_delay":          FormatInt32((inteltool.IGD[0xc720c] >> 16) & 0x1fff),
-			"gpu_panel_power_backlight_off_delay": FormatInt32(inteltool.IGD[0xc720c] & 0x1fff),
-			"gpu_panel_power_cycle_delay":         FormatInt32(inteltool.IGD[0xc7210] & 0xff),
-			"gpu_cpu_backlight":                   FormatHex32(inteltool.IGD[0x48254]),
-			"gpu_pch_backlight":                   FormatHex32((inteltool.IGD[0xc8254] >> 16) * 0x10001),
-			"gfx": fmt.Sprintf("GMA_STATIC_DISPLAYS(%d)", (inteltool.IGD[0xc6200] >> 12) & 1),
-		},
-		Children: []DevTreeNode{
-			{
-				Chip:          "domain",
-				Dev:           0,
-				PCIController: true,
-				ChildPCIBus:   0,
-				PCISlots: []PCISlot{
-					PCISlot{PCIAddr: PCIAddr{Dev: 0x0, Func: 0}, writeEmpty: true, alias: "host_bridge", additionalComment: "Host bridge"},
-					PCISlot{PCIAddr: PCIAddr{Dev: 0x1, Func: 0}, writeEmpty: true, alias: "peg10", additionalComment: "PEG"},
-					PCISlot{PCIAddr: PCIAddr{Dev: 0x2, Func: 0}, writeEmpty: true, alias: "igd", additionalComment: "iGPU"},
-				},
-			},
-		},
-	}
-
-	PutPCIDev(addr, "Host bridge")
-
-	/* FIXME:XX some configs are unsupported.  */
-	KconfigBool["NORTHBRIDGE_INTEL_SANDYBRIDGE"] = true
-	KconfigBool["USE_NATIVE_RAMINIT"] = true
-	KconfigBool["INTEL_INT15"] = true
-	KconfigBool["HAVE_ACPI_TABLES"] = true
-	KconfigBool["HAVE_ACPI_RESUME"] = true
-
-	DSDTIncludes = append(DSDTIncludes, DSDTInclude{
-		File: "cpu/intel/common/acpi/cpu.asl",
-	})
-
-	DSDTPCI0Includes = append(DSDTPCI0Includes, DSDTInclude{
-		File: "northbridge/intel/sandybridge/acpi/sandybridge.asl",
-	}, DSDTInclude{
-		File: "drivers/intel/gma/acpi/default_brightness_levels.asl",
-	})
-}
-
-func init() {
-	RegisterPCI(0x8086, 0x0100, sandybridgemc{})
-	RegisterPCI(0x8086, 0x0104, sandybridgemc{})
-	RegisterPCI(0x8086, 0x0150, sandybridgemc{})
-	RegisterPCI(0x8086, 0x0154, sandybridgemc{})
-	RegisterPCI(0x8086, 0x0158, sandybridgemc{})
-	for _, id := range []uint16{
-		0x0102, 0x0106, 0x010a,
-		0x0112, 0x0116, 0x0122, 0x0126,
-		0x0152, 0x0156, 0x0162, 0x0166,
-	} {
-		RegisterPCI(0x8086, id, GenericVGA{GenericPCI{}})
-	}
-
-	/* PCIe bridge */
-	for _, id := range []uint16{
-		0x0101, 0x0105, 0x0109, 0x010d,
-		0x0151, 0x0155, 0x0159, 0x015d,
-	} {
-		RegisterPCI(0x8086, id, GenericPCI{})
-	}
-}

From 9f09728acac7e36404cfd8c6b03a38281d47b75b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jul 2024 13:01:12 +0100
Subject: [PATCH 0764/1549] git.sh: cache git downloads to repo/

do it based on the URL, e.g. https://review.coreboot.org/coreboot
becomes repo/coreboot

the downside is if you have two projects with repo urls specifying
the same string at the end, but this isn't the case at the moment
and likely won't be the case, but it's a theoretical issue.

this saves on bandwidth when downloading identical submodule repos
between multiple trees within the same multi-tree project

for example, coreboot 3rdparty/vboot is no longer downloaded more
than once, instead cloned locally on subsequent downloads.

if repo/DIR exists, git-pull is attempted, but errors do not result
in a non-zero exit, by design.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .gitignore     |  1 +
 include/git.sh | 10 +++++++++-
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/.gitignore b/.gitignore
index d6c27f5d..17647cbd 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,6 +1,7 @@
 *~
 *.o
 /lbmk.err.log
+/repo/
 /docs/
 /pciroms/
 /util/dell-flash-unlock/dell_flash_unlock
diff --git a/include/git.sh b/include/git.sh
index 58f62ef3..25db40b8 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -103,7 +103,15 @@ fetch_submodule()
 
 tmpclone()
 {
-	git clone $1 "$3" || git clone $2 "$3" || $err "!clone $1 $2 $3 $4 $5"
+	repodir="repo/${1##*/}"
+	x_ mkdir -p "repo"
+	if [ -d "$repodir" ]; then
+		git -C "$repodir" pull || :
+	else
+		git clone $1 "$repodir" || git clone $2 "$repodir" || \
+		    $err "!clone $1 $2 $repodir $4 $5"
+	fi
+	git clone "$repodir" "$3" || $err "!clone $repodir $3"
 	git -C "$3" reset --hard "$4" || $err "!reset $1 $2 $3 $4 $5"
 	git_am_patches "$3" "$5"
 }

From 583502027efcd75a1a06a154b609be510d110872 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jul 2024 13:20:51 +0100
Subject: [PATCH 0765/1549] git.sh: don't download to src/project/project/

re-use repo/project/

this means that single- and multi-tree projects now
have a unified cached git repo location, as per the
new rules, thus saving on disk space usage.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 25db40b8..27b79c1a 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -13,7 +13,7 @@ fetch_targets()
 
 	printf "Creating %s tree %s\n" "$project" "$tree"
 	git_prep "$loc" "$loc" "$PWD/$configdir/$tree/patches" \
-	    "${loc%/*}/$tree" u; nuke "$project/$tree" "$project/$tree"
+	    "src/$project/$tree" u; nuke "$project/$tree" "$project/$tree"
 }
 
 fetch_project()
@@ -37,7 +37,7 @@ fetch_project()
 
 clone_project()
 {
-	loc="src/$project/$project" && singletree "$project" && loc="${loc%/*}"
+	loc="repo/$project" && singletree "$project" && loc="src/$project"
 
 	printf "Downloading project '%s' to '%s'\n" "$project" "$loc"
 	e "$loc" d && return 0
@@ -61,7 +61,7 @@ git_prep()
 	[ "$project" = "coreboot" ] && [ -n "$xtree" ] && [ $# -gt 2 ] && \
 	    [ "$xtree" != "$tree" ] && link_crossgcc "$_loc"
 
-	[ "$XBMK_RELEASE" = "y" ] && [ "$_loc" != "src/$project/$project" ] \
+	[ "$XBMK_RELEASE" = "y" ] && [ "$_loc" != "repo/$project" ] \
 	    && rmgit "$tmpgit"
 
 	move_repo "$_loc"

From 570e3abb24a9d6a71d28ec468475d7a458089b78 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jul 2024 13:24:21 +0100
Subject: [PATCH 0766/1549] trees: remove repo/p, not src/p/p

repo/p/ does not have its revision reset, so it
changes unpredictably, and it's not used in builds.

this used to be src/p/p/ - the context here is multi-tree
projects, in source archives.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index a7e53a69..873c4c7c 100755
--- a/script/trees
+++ b/script/trees
@@ -39,7 +39,7 @@ main()
 	[ -z "$project" ] && for p in $(ls -1 config/git); do
 		./update trees $_f "$p" || $err "!./update trees $_f $p"
 		[ "$XBMK_RELEASE" != "y" ] || singletree "$p" || \
-		    x_ rm -Rf "src/$p/$p"; continue
+		    x_ rm -Rf "repo/$p"; continue
 	done && return 1
 
 	[ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined"

From 4438368c0cc0a0a8d16de8f7fab78c777c21ca1b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jul 2024 13:27:50 +0100
Subject: [PATCH 0767/1549] trees: also remove single-tree repo/p/

single-tree repos were not previously cached, but now
they are and they have to be handled.

this, as also alluded to in the previous commit, is done
when preparing release archives (XBMK_RELEASE=y)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/script/trees b/script/trees
index 873c4c7c..c31152fb 100755
--- a/script/trees
+++ b/script/trees
@@ -38,8 +38,7 @@ main()
 	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
 	[ -z "$project" ] && for p in $(ls -1 config/git); do
 		./update trees $_f "$p" || $err "!./update trees $_f $p"
-		[ "$XBMK_RELEASE" != "y" ] || singletree "$p" || \
-		    x_ rm -Rf "repo/$p"; continue
+		[ "$XBMK_RELEASE" != "y" ] || x_ rm -Rf "repo/$p"; continue
 	done && return 1
 
 	[ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined"

From 0b9cd77fe7ff6ded9425f12f3651615e1863aa87 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jul 2024 14:55:49 +0100
Subject: [PATCH 0768/1549] trees: auto-delete+auto-rebuild if project changes

actual source code is not scanned, but config directories are
scanned. simply get the checksum of each file under config/
pertaining to a given project/tree, and also for the given
target. coreboot utilities are also handled.

if it changes, in any way, delete and re-build automatically.

such deletions should probably still be done manually, as part
of understanding the build system, but this change should make
the build system much easier to use during development.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .gitignore     |  1 +
 build          |  1 +
 include/git.sh |  5 +----
 include/rom.sh |  2 ++
 script/trees   | 49 +++++++++++++++++++++++++++++++++++++++++++++++--
 5 files changed, 52 insertions(+), 6 deletions(-)

diff --git a/.gitignore b/.gitignore
index 17647cbd..d388526f 100644
--- a/.gitignore
+++ b/.gitignore
@@ -32,3 +32,4 @@
 /CHANGELOG
 /todo.txt
 /lock
+/hash/
diff --git a/build b/build
index d03960c6..b1b0f40d 100755
--- a/build
+++ b/build
@@ -100,6 +100,7 @@ build_release()
 	cd "$srcdir" || $err "$vdir: !cd \"$srcdir\""
 	./update trees -f
 	rmgit .
+	x_ rm -Rf hash repo
 	x_ mv src/docs docs
 	) || $err "can't create release files"
 
diff --git a/include/git.sh b/include/git.sh
index 27b79c1a..0de4c931 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -2,7 +2,7 @@
 # Copyright (c) 2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
-eval `setvars "" loc url bkup_url subfile mdir subhash subrepo subrepo_bkup \
+eval `setvars "" loc url bkup_url subfile subhash subrepo subrepo_bkup \
     depend subfile_bkup`
 
 fetch_targets()
@@ -69,9 +69,6 @@ git_prep()
 
 prep_submodules()
 {
-	mdir="$PWD/config/submodule/$project"
-	[ -n "$tree" ] && mdir="$mdir/$tree"
-
 	[ -f "$mdir/module.list" ] && while read -r msrcdir; do
 		fetch_submodule "$msrcdir"
 	done < "$mdir/module.list"; return 0
diff --git a/include/rom.sh b/include/rom.sh
index 574b1b6c..8798ef13 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -53,6 +53,8 @@ mkvendorfiles()
 check_coreboot_utils()
 {
 	for util in cbfstool ifdtool; do
+		[ "$badhash" = "n" ] || rm -f "elf/$util/$1/$util" || \
+		    $err "!rm badelf elf/$util/$1/$util"
 		e "elf/$util/$1/$util" f && continue
 
 		utilelfdir="elf/$util/$1"
diff --git a/script/trees b/script/trees
index c31152fb..23164ee6 100755
--- a/script/trees
+++ b/script/trees
@@ -12,7 +12,7 @@ set -u -e
 eval `setvars "" xarch srcdir premake cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
-    defconfig postmake mkhelpercfg dry dest_dir`
+    defconfig postmake mkhelpercfg dry dest_dir mdir badhash`
 
 main()
 {
@@ -116,7 +116,8 @@ handle_defconfig()
 configure_project()
 {
 	eval `setvars "" xarch xlang build_depend autoconfargs xtree postmake \
-	    tree_depend makeargs btype mkhelper bootstrapargs premake release`
+	    tree_depend makeargs btype mkhelper bootstrapargs premake release \
+	    badhash`
 
 	[ -f "$1/target.cfg" ] || btype="auto"
 	[ -f "$datadir/mkhelper.cfg" ] && eval `setcfg "$datadir/mkhelper.cfg"`
@@ -141,6 +142,11 @@ configure_project()
 
 	[ -z "$mode" ] && build_dependencies
 
+	mdir="$PWD/config/submodule/$project"
+	[ -n "$tree" ] && mdir="$mdir/$tree"
+
+	[ -f "CHANGELOG" ] || check_project_hashes
+
 	[ "$mode" = "fetch" ] || x_ ./update trees -f "$project" $target
 	[ "$mode" = "fetch" ] || return 0
 
@@ -158,6 +164,45 @@ build_dependencies()
 	done; return 0
 }
 
+check_project_hashes()
+{
+	x_ mkdir -p hash
+
+	old_pjhash=""
+	[ ! -f "hash/$project$tree" ] || \
+	    read -r old_pjhash < "hash/$project$tree"
+
+	x_ rm -f "$TMPDIR/project.list" "$TMPDIR/project.hash" \
+	    "$TMPDIR/project.tmp"; x_ touch "$TMPDIR/project.tmp"
+	x_ touch "$TMPDIR/project.hash"
+
+	for delcheck in "$datadir" "$configdir/$tree" "$mdir"; do
+		[ -d "$delcheck" ] || continue
+		find "$delcheck" -type f -not -path "*/.git*/*" \
+		    >> "$TMPDIR/project.tmp" || \
+		    $err "!find $delcheck > project.tmp"
+	done
+	sort "$TMPDIR/project.tmp" > "$TMPDIR/project.list" || \
+	    $err "!sort project tmp/list"
+
+	while read -r delcheck; do
+		[ -f "$delcheck" ] || continue
+		sha512sum "$delcheck" | awk '{print $1}' >> \
+		    "$TMPDIR/project.hash" || $err "!findhash $delcheck"
+	done < "$TMPDIR/project.list"
+
+	pjhash="$(sha512sum "$TMPDIR/project.hash" | awk '{print $1}')" || :
+	badhash="y" && [ "$pjhash" = "$old_pjhash" ] && badhash="n"
+	[ -f "hash/$project$tree" ] || badhash="y"
+
+	printf "%s\n" "$pjhash" > "hash/$project$tree" || \
+	    $err "!mk hash/$project$tree"
+
+	[ "$badhash" = "n" ] || rm -Rf "src/$project/$tree" \
+	    "elf/$project/$tree" "elf/$project/$target" || \
+	    $err "!rmproject $project $tree"; :
+}
+
 check_cross_compiler()
 {
 	for _xarch in $xarch; do

From 0cd52fc7fda7557079cdbe1e107e6448e00a0ada Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jul 2024 16:55:05 +0100
Subject: [PATCH 0769/1549] git.sh: re-try git pull three times

mitigate jittery internet connections

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/git.sh b/include/git.sh
index 0de4c931..ba58a5ba 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -103,7 +103,8 @@ tmpclone()
 	repodir="repo/${1##*/}"
 	x_ mkdir -p "repo"
 	if [ -d "$repodir" ]; then
-		git -C "$repodir" pull || :
+		git -C "$repodir" pull || sleep 3 || git -C "$repodir" pull \
+		    || sleep 3 || git -C "$repodir" pull :
 	else
 		git clone $1 "$repodir" || git clone $2 "$repodir" || \
 		    $err "!clone $1 $2 $repodir $4 $5"

From 4d5385a14de8f74a54877ec91a877b4f01cf472f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jul 2024 17:01:15 +0100
Subject: [PATCH 0770/1549] git.sh: try direct clone if cached git fails

normally, a project is cached at repo/PROJECT/, and
cloned from there to the final destination.

errors lead to a calling of $err, but this will result
in a return if done from inside a subshell, of non-zero
value, so use this to re-try with a 6th argument when
calling tmpclone().

in most cases, this fallback will never kick in, but
it will kick in resetting or patching the cached clone
fails; specifically, we are interested in the reset part.

a given project name may change repositories in lbmk at
a given time. if this happens, and the old one is cached,
the overall result of this patch is that lbmk will fall
back to the old behaviour, where git urls are tried
directly, without caching.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index ba58a5ba..ff8b0d97 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -100,18 +100,20 @@ fetch_submodule()
 
 tmpclone()
 {
-	repodir="repo/${1##*/}"
+	repodir="repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"
 	x_ mkdir -p "repo"
-	if [ -d "$repodir" ]; then
+	if [ -d "$repodir" ] && [ $# -lt 6 ]; then
 		git -C "$repodir" pull || sleep 3 || git -C "$repodir" pull \
 		    || sleep 3 || git -C "$repodir" pull :
 	else
 		git clone $1 "$repodir" || git clone $2 "$repodir" || \
 		    $err "!clone $1 $2 $repodir $4 $5"
 	fi
-	git clone "$repodir" "$3" || $err "!clone $repodir $3"
+	(
+	[ $# -gt 5 ] || git clone "$repodir" "$3" || $err "!clone $repodir $3"
 	git -C "$3" reset --hard "$4" || $err "!reset $1 $2 $3 $4 $5"
 	git_am_patches "$3" "$5"
+	) || [ $# -gt 5 ] || tmpclone $@ retry; :
 }
 
 git_am_patches()

From ef867ecccad5464690c4fa342946fa2c7a4eac3d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jul 2024 17:28:27 +0100
Subject: [PATCH 0771/1549] git.sh: remove previous tmprepo if args>5

if doing a retry, the directory may still exist, which
would make git clone yield an error response; the existing
directory will have been the one that failed to reset, so
let's delete it.

the one deleted is not the cache (repo/PROJECT/), thus
otherwise maintaining current behaviour.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/git.sh b/include/git.sh
index ff8b0d97..44afd487 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -100,6 +100,7 @@ fetch_submodule()
 
 tmpclone()
 {
+	[ $# -lt 6 ] || rm -Rf "$3" || $err "git retry: !rm $3 ($1)"
 	repodir="repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"
 	x_ mkdir -p "repo"
 	if [ -d "$repodir" ] && [ $# -lt 6 ]; then

From a9f9de885c07541934ecad56ea6c7126f05a89be Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jul 2024 18:15:52 +0100
Subject: [PATCH 0772/1549] unified cache file handling for vendorfile/subfile

lib.sh download() is used by subfile handling in git.sh,
e.g. crossgcc tarballs, and also the vendor scripts.

vendor files are cached, but not subfiles for repos.

cache both, under cache/file/, saved with the name equal
to the checksum, so: cache/file/CHECKSUM

also move vendorfiles/app/ to cache/app/ in this change.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .gitignore        |  1 +
 include/lib.sh    | 19 ++++++++++---------
 include/vendor.sh |  4 ++--
 3 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/.gitignore b/.gitignore
index d388526f..03bb21cc 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,5 +1,6 @@
 *~
 *.o
+/cache/
 /lbmk.err.log
 /repo/
 /docs/
diff --git a/include/lib.sh b/include/lib.sh
index 2fb97c44..791ab4e1 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -180,18 +180,19 @@ singletree()
 
 download()
 {
-	dl_fail="y" # 1 url, 2 url backup, 3 destination, 4 checksum
-	vendor_checksum "$4" "$3" 2>/dev/null || dl_fail="n"
+	cached="cache/file/$4"
+	dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum
+	vendor_checksum "$4" "$cached" 2>/dev/null && dl_fail="y"
 	[ "$dl_fail" = "n" ] && e "$3" f && return 0
-	x_ mkdir -p "${3%/*}" && for url in "$1" "$2"; do
+	x_ mkdir -p "${3%/*}" cache/file && for url in "$1" "$2"; do
 		[ "$dl_fail" = "n" ] && break
 		[ -z "$url" ] && continue
-		x_ rm -f "$3"
-		curl --location --retry 3 -A "$_ua" "$url" -o "$3" || \
-		    wget --tries 3 -U "$_ua" "$url" -O "$3" || continue
-		vendor_checksum "$4" "$3" || dl_fail="n"
-	done;
-	[ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: not downloaded"; return 0
+		x_ rm -f "$cached"
+		curl --location --retry 3 -A "$_ua" "$url" -o "$cached" || \
+		    wget --tries 3 -U "$_ua" "$url" -O "$cached" || continue
+		vendor_checksum "$4" "$cached" || dl_fail="n"
+	done; [ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: not downloaded"
+	[ "$cached" = "$3" ] || cp "$cached" "$3" || $err "!d cp $cached $3"; :
 }
 
 vendor_checksum()
diff --git a/include/vendor.sh b/include/vendor.sh
index b8fef9c5..ba0ad641 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -8,7 +8,7 @@ me7updateparser="$PWD/util/me7_update_parser/me7_update_parser.py"
 pfs_extract="$PWD/src/biosutilities/Dell_PFS_Extract.py"
 uefiextract="$PWD/elf/uefitool/uefiextract"
 vendir="vendorfiles"
-appdir="$vendir/app"
+appdir="cache/app"
 cbcfgsdir="config/coreboot"
 
 eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
@@ -78,7 +78,7 @@ getfiles()
 fetch()
 {
 	dl_type="$1"; dl="$2"; dl_bkup="$3"; dlsum="$4"; _dest="${5##*../}"
-	[ "$5" = "/dev/null" ] && return 0; _dl="$vendir/cache/$dlsum"
+	[ "$5" = "/dev/null" ] && return 0; _dl="cache/file/$dlsum"
 
 	download "$dl" "$dl_bkup" "$_dl" "$dlsum"
 

From 79f50b3791566852a909eb30d39c98df493d312e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jul 2024 18:39:42 +0100
Subject: [PATCH 0773/1549] unify caching of files into cache/

hash/ becomes cache/hash/

repo/ becomes cache/repo/

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh |  9 +++++----
 script/trees   | 14 +++++++-------
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 44afd487..2eea5137 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -37,7 +37,8 @@ fetch_project()
 
 clone_project()
 {
-	loc="repo/$project" && singletree "$project" && loc="src/$project"
+	loc="cache/repo/$project" && singletree "$project" && \
+	    loc="src/$project"
 
 	printf "Downloading project '%s' to '%s'\n" "$project" "$loc"
 	e "$loc" d && return 0
@@ -61,7 +62,7 @@ git_prep()
 	[ "$project" = "coreboot" ] && [ -n "$xtree" ] && [ $# -gt 2 ] && \
 	    [ "$xtree" != "$tree" ] && link_crossgcc "$_loc"
 
-	[ "$XBMK_RELEASE" = "y" ] && [ "$_loc" != "repo/$project" ] \
+	[ "$XBMK_RELEASE" = "y" ] && [ "$_loc" != "cache/repo/$project" ] \
 	    && rmgit "$tmpgit"
 
 	move_repo "$_loc"
@@ -101,8 +102,8 @@ fetch_submodule()
 tmpclone()
 {
 	[ $# -lt 6 ] || rm -Rf "$3" || $err "git retry: !rm $3 ($1)"
-	repodir="repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"
-	x_ mkdir -p "repo"
+	repodir="cache/repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"
+	x_ mkdir -p "cache/repo"
 	if [ -d "$repodir" ] && [ $# -lt 6 ]; then
 		git -C "$repodir" pull || sleep 3 || git -C "$repodir" pull \
 		    || sleep 3 || git -C "$repodir" pull :
diff --git a/script/trees b/script/trees
index 23164ee6..1e3a6c29 100755
--- a/script/trees
+++ b/script/trees
@@ -38,7 +38,7 @@ main()
 	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
 	[ -z "$project" ] && for p in $(ls -1 config/git); do
 		./update trees $_f "$p" || $err "!./update trees $_f $p"
-		[ "$XBMK_RELEASE" != "y" ] || x_ rm -Rf "repo/$p"; continue
+		[ "$XBMK_RELEASE" != "y" ] || x_ rm -Rf "cache/repo/$p"; :
 	done && return 1
 
 	[ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined"
@@ -166,11 +166,11 @@ build_dependencies()
 
 check_project_hashes()
 {
-	x_ mkdir -p hash
+	x_ mkdir -p cache/hash
 
 	old_pjhash=""
-	[ ! -f "hash/$project$tree" ] || \
-	    read -r old_pjhash < "hash/$project$tree"
+	[ ! -f "cache/hash/$project$tree" ] || \
+	    read -r old_pjhash < "cache/hash/$project$tree"
 
 	x_ rm -f "$TMPDIR/project.list" "$TMPDIR/project.hash" \
 	    "$TMPDIR/project.tmp"; x_ touch "$TMPDIR/project.tmp"
@@ -193,10 +193,10 @@ check_project_hashes()
 
 	pjhash="$(sha512sum "$TMPDIR/project.hash" | awk '{print $1}')" || :
 	badhash="y" && [ "$pjhash" = "$old_pjhash" ] && badhash="n"
-	[ -f "hash/$project$tree" ] || badhash="y"
+	[ -f "cache/hash/$project$tree" ] || badhash="y"
 
-	printf "%s\n" "$pjhash" > "hash/$project$tree" || \
-	    $err "!mk hash/$project$tree"
+	printf "%s\n" "$pjhash" > "cache/hash/$project$tree" || \
+	    $err "!mk cache/hash/$project$tree"
 
 	[ "$badhash" = "n" ] || rm -Rf "src/$project/$tree" \
 	    "elf/$project/$tree" "elf/$project/$target" || \

From e6990378905763a965a900905d530934da9e7426 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jul 2024 18:52:58 +0100
Subject: [PATCH 0774/1549] build: remove cache/ on making releases

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build b/build
index b1b0f40d..3408b745 100755
--- a/build
+++ b/build
@@ -100,7 +100,7 @@ build_release()
 	cd "$srcdir" || $err "$vdir: !cd \"$srcdir\""
 	./update trees -f
 	rmgit .
-	x_ rm -Rf hash repo
+	x_ rm -Rf cache
 	x_ mv src/docs docs
 	) || $err "can't create release files"
 

From 78cdc56ae15b922a19cd6c71cec94ae62b6520c1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jul 2024 18:55:18 +0100
Subject: [PATCH 0775/1549] trees: remove unnecessary command

we no longer need to remove cache/ per project, because
it's removed in bulk at the end, in the main build script,
when generating release archives.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/script/trees b/script/trees
index 1e3a6c29..d3ac03f9 100755
--- a/script/trees
+++ b/script/trees
@@ -37,8 +37,7 @@ main()
 	done
 	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
 	[ -z "$project" ] && for p in $(ls -1 config/git); do
-		./update trees $_f "$p" || $err "!./update trees $_f $p"
-		[ "$XBMK_RELEASE" != "y" ] || x_ rm -Rf "cache/repo/$p"; :
+		./update trees $_f "$p" || $err "!./update trees $_f $p"; :
 	done && return 1
 
 	[ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined"

From c6e6d96ce16b821b5e956d98715907fb9d8ae096 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jul 2024 19:06:53 +0100
Subject: [PATCH 0776/1549] allow using coreboot's build system to add payload

lbmk must still define payloads, but specific configs
may use coreboot's build system instead.

you might use this to add your own config with, say,
tianocore payload, using coreboot.git to build it,
rather than using lbmk's choice of payloads.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh    | 11 +++++++----
 include/vendor.sh |  3 ++-
 2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index 8798ef13..ed3dddf2 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -92,10 +92,13 @@ mkcorebootbin()
 
 	[ "$payload_memtest" = "y" ] || payload_memtest="n"
 	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"
-
-	[ "$payload_seabios" = "y" ] && pname="seabios" && $dry add_seabios
-	[ "$payload_uboot" = "y" ] && pname="uboot" && $dry add_uboot
-
+	if grep "CONFIG_PAYLOAD_NONE=y" "$defconfig"; then
+		[ "$payload_seabios" = "y" ] && pname="seabios" && \
+		    $dry add_seabios
+		[ "$payload_uboot" = "y" ] && pname="uboot" && $dry add_uboot
+	else
+		pname="custom" # coreboot's build system added payloads
+	fi
 	newrom="bin/$target/${pname}_${target}_$initmode$displaymode.rom"
 	$dry x_ mkdir -p "${newrom%/*}"; $dry x_ mv "$tmprom" "$newrom"
 
diff --git a/include/vendor.sh b/include/vendor.sh
index ba0ad641..426e0f5f 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -248,7 +248,8 @@ detect_board()
 	path="$1"
 	filename="$(basename "$path")"
 	case "$filename" in
-	grub_*|seagrub_*) board="$(echo "$filename" | cut -d '_' -f2-3)" ;;
+	grub_*|seagrub_*|custom_*)
+		board="$(echo "$filename" | cut -d '_' -f2-3)" ;;
 	seabios_withgrub_*)
 		board="$(echo "$filename" | cut -d '_' -f3-4)" ;;
 	*.tar.xz)

From bf85246c4cd9d4f970ed6b3f66b435d39106a182 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 17 Jul 2024 23:25:44 +0100
Subject: [PATCH 0777/1549] trees: hardcode makeargs for xgcc

if coreboot itself is being handled, crossgcc has the
correct makeargs, setting the number of build threads.

however, other projects can specify "xtree" pointing to
a given coreboot tree, and build crossgcc for it.

one workaround may be to use trees -d coreboot TREE,
but then extra code would have to be written to make
it avoid other things like building cbfstool, which is
not required for just building crossgcc.

the cleanest way to do it is to simply hardcode it. the
value is set exactly the same as regular coreboot makeargs.

this fixes a bug, where some builds of crossgcc are made
on a single thread, rather than using XBMK_THREADS. this
patch forces it to always use CPUS=$XBMK_THREADS

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index d3ac03f9..2cee435d 100755
--- a/script/trees
+++ b/script/trees
@@ -204,6 +204,7 @@ check_project_hashes()
 
 check_cross_compiler()
 {
+	xgccargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 	for _xarch in $xarch; do
 		cbdir="src/coreboot/$tree"
 		[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
@@ -216,9 +217,9 @@ check_cross_compiler()
 		[ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
 
 		# sometimes buildgcc fails for like no reason. try twice.
-		make -C "$cbdir" crossgcc-${_xarch%-*} $makeargs || \
-		    make -C "$cbdir" crossgcc-${_xarch%-*} $makeargs || \
-		    $err "!mkxgcc $project/$xtree '${_xarch%-*}' '$makeargs'"
+		make -C "$cbdir" crossgcc-${_xarch%-*} $xgccargs || \
+		    make -C "$cbdir" crossgcc-${_xarch%-*} $xgccargs || \
+		    $err "!mkxgcc $project/$xtree '${_xarch%-*}' '$xgccargs'"
 	done; return 0
 }
 

From 64283a1fb1fc3b0e6f0c0601f029d06938df0274 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 18 Jul 2024 14:13:11 +0100
Subject: [PATCH 0778/1549] build: remove tmp/ on release archives

i overlooked this before. remove it. the directory
happened to be empty when i tested archives, but it's
still not a good thing that we have it. remove it!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build b/build
index 3408b745..6831c781 100755
--- a/build
+++ b/build
@@ -100,7 +100,7 @@ build_release()
 	cd "$srcdir" || $err "$vdir: !cd \"$srcdir\""
 	./update trees -f
 	rmgit .
-	x_ rm -Rf cache
+	x_ rm -Rf cache tmp
 	x_ mv src/docs docs
 	) || $err "can't create release files"
 

From 82bdf27072e555271fdc3d7cf0081a9e671c3a15 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 18 Jul 2024 23:09:59 +0100
Subject: [PATCH 0779/1549] git.sh: fix lack of error exits on fault

a previous change made it more redundant, falling back
on old behaviour (direct downloading, not cached), but
the way it's done means that the function never returns
an error condition in practise.

this patch fixes it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 2eea5137..24907a8d 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -3,7 +3,7 @@
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
 eval `setvars "" loc url bkup_url subfile subhash subrepo subrepo_bkup \
-    depend subfile_bkup`
+    depend subfile_bkup repofail`
 
 fetch_targets()
 {
@@ -101,6 +101,8 @@ fetch_submodule()
 
 tmpclone()
 {
+	repofail="n"
+
 	[ $# -lt 6 ] || rm -Rf "$3" || $err "git retry: !rm $3 ($1)"
 	repodir="cache/repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"
 	x_ mkdir -p "cache/repo"
@@ -115,7 +117,10 @@ tmpclone()
 	[ $# -gt 5 ] || git clone "$repodir" "$3" || $err "!clone $repodir $3"
 	git -C "$3" reset --hard "$4" || $err "!reset $1 $2 $3 $4 $5"
 	git_am_patches "$3" "$5"
-	) || [ $# -gt 5 ] || tmpclone $@ retry; :
+	) || repofail="y"
+
+	[ "$repofail" = "y" ] && [ $# -lt 6 ] && tmpclone $@ retry
+	[ "$repofail" = "y" ] && $err "!clone $1 $2 $3 $4 $5"; :
 }
 
 git_am_patches()

From 9b1b955767fc2e750095d302aa4f95680e2cfacb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 18 Jul 2024 23:11:45 +0100
Subject: [PATCH 0780/1549] git.sh: fix typo in git command

the || : condition should be used, whereas i just
wrote : by mistake. this was done in a previous change.

fix it now.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/git.sh b/include/git.sh
index 24907a8d..43a45434 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -108,7 +108,7 @@ tmpclone()
 	x_ mkdir -p "cache/repo"
 	if [ -d "$repodir" ] && [ $# -lt 6 ]; then
 		git -C "$repodir" pull || sleep 3 || git -C "$repodir" pull \
-		    || sleep 3 || git -C "$repodir" pull :
+		    || sleep 3 || git -C "$repodir" pull || :
 	else
 		git clone $1 "$repodir" || git clone $2 "$repodir" || \
 		    $err "!clone $1 $2 $repodir $4 $5"

From 0e0b12a630d2f4846488233cf33fe4abaa185112 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 18 Jul 2024 23:23:02 +0100
Subject: [PATCH 0781/1549] git.sh: warn when a cached clone fails

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/git.sh b/include/git.sh
index 43a45434..3a6247d0 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -101,6 +101,8 @@ fetch_submodule()
 
 tmpclone()
 {
+	[ "$repofail" = "y" ] && \
+	    printf "Cached clone failed; trying online.\n" 1>&2
 	repofail="n"
 
 	[ $# -lt 6 ] || rm -Rf "$3" || $err "git retry: !rm $3 ($1)"

From 2b50b3ea9a11b6ba2751ebb4237f0ea7288e5c81 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 19 Jul 2024 00:31:57 +0100
Subject: [PATCH 0782/1549] put cachedir in environmental variable

XBMK_CACHE is now used, instead of hardcoding cache/

this is exported initialised to cache/, if unset.
this means you can set your own directory, and it means
./update release will use the same directory.

this means bandwidth wastage is further avoided.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             |  2 +-
 include/git.sh    | 11 ++++++-----
 include/lib.sh    | 16 +++++++++++++---
 include/vendor.sh |  7 ++++---
 script/trees      | 12 ++++++------
 5 files changed, 30 insertions(+), 18 deletions(-)

diff --git a/build b/build
index 6831c781..ce778e2a 100755
--- a/build
+++ b/build
@@ -100,7 +100,7 @@ build_release()
 	cd "$srcdir" || $err "$vdir: !cd \"$srcdir\""
 	./update trees -f
 	rmgit .
-	x_ rm -Rf cache tmp
+	x_ rm -Rf tmp
 	x_ mv src/docs docs
 	) || $err "can't create release files"
 
diff --git a/include/git.sh b/include/git.sh
index 3a6247d0..f8441f33 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -37,7 +37,7 @@ fetch_project()
 
 clone_project()
 {
-	loc="cache/repo/$project" && singletree "$project" && \
+	loc="$XBMK_CACHE/repo/$project" && singletree "$project" && \
 	    loc="src/$project"
 
 	printf "Downloading project '%s' to '%s'\n" "$project" "$loc"
@@ -62,8 +62,9 @@ git_prep()
 	[ "$project" = "coreboot" ] && [ -n "$xtree" ] && [ $# -gt 2 ] && \
 	    [ "$xtree" != "$tree" ] && link_crossgcc "$_loc"
 
-	[ "$XBMK_RELEASE" = "y" ] && [ "$_loc" != "cache/repo/$project" ] \
-	    && rmgit "$tmpgit"
+	[ "$XBMK_RELEASE" = "y" ] && \
+	    [ "$_loc" != "$XBMK_CACHE/repo/$project" ] && \
+		rmgit "$tmpgit"
 
 	move_repo "$_loc"
 }
@@ -106,8 +107,8 @@ tmpclone()
 	repofail="n"
 
 	[ $# -lt 6 ] || rm -Rf "$3" || $err "git retry: !rm $3 ($1)"
-	repodir="cache/repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"
-	x_ mkdir -p "cache/repo"
+	repodir="$XBMK_CACHE/repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"
+	mkdir -p "$XBMK_CACHE/repo" || $err "!rmdir $XBMK_CACHE/repo"
 	if [ -d "$repodir" ] && [ $# -lt 6 ]; then
 		git -C "$repodir" pull || sleep 3 || git -C "$repodir" pull \
 		    || sleep 3 || git -C "$repodir" pull || :
diff --git a/include/lib.sh b/include/lib.sh
index 791ab4e1..2cd8c0d7 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -88,6 +88,14 @@ if [ -z "${TMPDIR+x}" ]; then
 	xbmk_parent="y"
 fi
 
+# XBMK_CACHE is a directory, for caching downloads and git repositories
+[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$PWD/cache"
+[ -z "$XBMK_CACHE" ] && export XBMK_CACHE="$PWD/cache"
+[ -L "$XBMK_CACHE" ] && [ "$XBMK_CACHE" = "$PWD/cache" ] && \
+    $err "cachedir is default, $PWD/cache, but it exists and is a symlink"
+[ -L "$XBMK_CACHE" ] && export XBMK_CACHE="$PWD/cache"
+[ -f "$XBMK_CACHE" ] && $err "cachedir '$XBMK_CACHE' exists but it's a file"
+
 # if "y": a coreboot target won't be built if target.cfg says release="n"
 # (this is used to exclude certain build targets from releases)
 [ -z "${XBMK_RELEASE+x}" ] && export XBMK_RELEASE="n"
@@ -180,14 +188,16 @@ singletree()
 
 download()
 {
-	cached="cache/file/$4"
+	cached="$XBMK_CACHE/file/$4"
 	dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum
 	vendor_checksum "$4" "$cached" 2>/dev/null && dl_fail="y"
 	[ "$dl_fail" = "n" ] && e "$3" f && return 0
-	x_ mkdir -p "${3%/*}" cache/file && for url in "$1" "$2"; do
+	mkdir -p "${3%/*}" "$XBMK_CACHE/file" || \
+	    $err "!mkdir '$3' '$XBMK_CACHE/file'"
+	for url in "$1" "$2"; do
 		[ "$dl_fail" = "n" ] && break
 		[ -z "$url" ] && continue
-		x_ rm -f "$cached"
+		rm -f "$cached" || $err "!rm -f '$cached'"
 		curl --location --retry 3 -A "$_ua" "$url" -o "$cached" || \
 		    wget --tries 3 -U "$_ua" "$url" -O "$cached" || continue
 		vendor_checksum "$4" "$cached" || dl_fail="n"
diff --git a/include/vendor.sh b/include/vendor.sh
index 426e0f5f..e14ea1ca 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -8,7 +8,7 @@ me7updateparser="$PWD/util/me7_update_parser/me7_update_parser.py"
 pfs_extract="$PWD/src/biosutilities/Dell_PFS_Extract.py"
 uefiextract="$PWD/elf/uefitool/uefiextract"
 vendir="vendorfiles"
-appdir="cache/app"
+appdir="$XBMK_CACHE/app"
 cbcfgsdir="config/coreboot"
 
 eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
@@ -78,11 +78,12 @@ getfiles()
 fetch()
 {
 	dl_type="$1"; dl="$2"; dl_bkup="$3"; dlsum="$4"; _dest="${5##*../}"
-	[ "$5" = "/dev/null" ] && return 0; _dl="cache/file/$dlsum"
+	[ "$5" = "/dev/null" ] && return 0; _dl="$XBMK_CACHE/file/$dlsum"
 
 	download "$dl" "$dl_bkup" "$_dl" "$dlsum"
 
-	x_ rm -Rf "${_dl}_extracted"
+	rm -Rf "${_dl}_extracted" || \
+	    $err "!rm -Rf ${_ul}_extracted"
 	e "$_dest" f && return 0
 
 	mkdir -p "${_dest%/*}" || $err "mkdirs: !mkdir -p ${_dest%/*}"
diff --git a/script/trees b/script/trees
index 2cee435d..ce6da422 100755
--- a/script/trees
+++ b/script/trees
@@ -165,11 +165,11 @@ build_dependencies()
 
 check_project_hashes()
 {
-	x_ mkdir -p cache/hash
+	mkdir -p "$XBMK_CACHE/hash" || $err "!mkdir '$XBMK_CACHE/hash'"
 
 	old_pjhash=""
-	[ ! -f "cache/hash/$project$tree" ] || \
-	    read -r old_pjhash < "cache/hash/$project$tree"
+	[ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
+	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
 
 	x_ rm -f "$TMPDIR/project.list" "$TMPDIR/project.hash" \
 	    "$TMPDIR/project.tmp"; x_ touch "$TMPDIR/project.tmp"
@@ -192,10 +192,10 @@ check_project_hashes()
 
 	pjhash="$(sha512sum "$TMPDIR/project.hash" | awk '{print $1}')" || :
 	badhash="y" && [ "$pjhash" = "$old_pjhash" ] && badhash="n"
-	[ -f "cache/hash/$project$tree" ] || badhash="y"
+	[ -f "$XBMK_CACHE/hash/$project$tree" ] || badhash="y"
 
-	printf "%s\n" "$pjhash" > "cache/hash/$project$tree" || \
-	    $err "!mk cache/hash/$project$tree"
+	printf "%s\n" "$pjhash" > "$XBMK_CACHE/hash/$project$tree" || \
+	    $err "!mk $XBMK_CACHE/hash/$project$tree"
 
 	[ "$badhash" = "n" ] || rm -Rf "src/$project/$tree" \
 	    "elf/$project/$tree" "elf/$project/$target" || \

From 31f1e4dadfcc1ceecacec50dd2a14e63a44364bd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 19 Jul 2024 00:48:09 +0100
Subject: [PATCH 0783/1549] vendor.sh: don't use XBMK_CACHE for appdir

the me_extract function prefixes it with PWD in
some cases, but we can't predict where appdir
will point to.

the "app" directory is not intended to be a cache
anyway, so it doesn't make sense to put it in
the cache directory.

it's essentially scratch memory.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index e14ea1ca..ace3f7ce 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -8,7 +8,7 @@ me7updateparser="$PWD/util/me7_update_parser/me7_update_parser.py"
 pfs_extract="$PWD/src/biosutilities/Dell_PFS_Extract.py"
 uefiextract="$PWD/elf/uefitool/uefiextract"
 vendir="vendorfiles"
-appdir="$XBMK_CACHE/app"
+appdir="$vendir/app"
 cbcfgsdir="config/coreboot"
 
 eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \

From ba4278e0c6507e121d4ddded4a923d05236a3d3c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 21 Jul 2024 07:39:47 +0100
Subject: [PATCH 0784/1549] include/rom.sh: use ccache when building coreboot

ccache now required, in build dependencies

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/arch       | 2 +-
 config/dependencies/debian     | 2 +-
 config/dependencies/fedora38   | 2 +-
 config/dependencies/fedora40   | 2 +-
 config/dependencies/parabola   | 2 +-
 config/dependencies/trisquel   | 2 +-
 config/dependencies/ubuntu2004 | 2 +-
 config/dependencies/ubuntu2404 | 2 +-
 config/dependencies/void       | 2 +-
 include/rom.sh                 | 9 +++++++++
 10 files changed, 18 insertions(+), 9 deletions(-)

diff --git a/config/dependencies/arch b/config/dependencies/arch
index cfe69ac7..588f47b3 100644
--- a/config/dependencies/arch
+++ b/config/dependencies/arch
@@ -4,7 +4,7 @@ acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
 autogen base-devel bison cmake curl device-mapper doxygen \
 dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \
 help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \
-ncurses openssl p7zip \
+ncurses openssl p7zip ccache \
 pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
 sharutils subversion swig texinfo ttf-dejavu unarchiver unzip wget xz zlib \
 "
diff --git a/config/dependencies/debian b/config/dependencies/debian
index 33902f19..3375064f 100755
--- a/config/dependencies/debian
+++ b/config/dependencies/debian
@@ -11,5 +11,5 @@ libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0 libusb-1.0-0-dev \
 libusb-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted pciutils \
 perl pkg-config python3 python3-distutils python3-pkg-resources python3-pycryptodome \
 python3-pyelftools python3-setuptools python-is-python3 sharutils swig unar \
-unifont unifont-bin unzip uuid-dev wget xfonts-unifont zlib1g-dev \
+unifont unifont-bin unzip uuid-dev wget xfonts-unifont zlib1g-dev ccache \
 "
diff --git a/config/dependencies/fedora38 b/config/dependencies/fedora38
index 1b9affe3..5575a5f0 100755
--- a/config/dependencies/fedora38
+++ b/config/dependencies/fedora38
@@ -8,5 +8,5 @@ innoextract intltool libftdi-devel libselinux-devel libusb1 libusb1-devel \
 nasm ncurses-devel openssl-devel p7zip p7zip-plugins pandoc parted \
 pciutils-devel perl perl-libwww-perl python-unversioned-command python3 \
 python3-setuptools rsync sharutils subversion texinfo unar unifont \
-unifont-fonts unifont-ttf-fonts unzip wget xz zlib-devel \
+unifont-fonts unifont-ttf-fonts unzip wget xz zlib-devel ccache \
 "
diff --git a/config/dependencies/fedora40 b/config/dependencies/fedora40
index aeedd755..f39de483 100755
--- a/config/dependencies/fedora40
+++ b/config/dependencies/fedora40
@@ -9,5 +9,5 @@ libselinux-devel libusb1 libusb1-devel nasm ncurses-devel openssl-devel \
 p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \
 python-unversioned-command python3 python3-setuptools rsync sharutils \
 subversion systemd-devel texinfo unar unifont unifont-fonts \
-unifont-ttf-fonts unzip wget xz zlib-devel
+unifont-ttf-fonts unzip wget xz zlib-devel ccache
 "
diff --git a/config/dependencies/parabola b/config/dependencies/parabola
index 27dd59c4..50462afe 100644
--- a/config/dependencies/parabola
+++ b/config/dependencies/parabola
@@ -7,5 +7,5 @@ help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \
 ncurses openssl p7zip \
 pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
 sharutils subversion swig texinfo ttf-dejavu unarchiver unifont-utils unzip \
-wget xz zlib \
+wget xz zlib ccache \
 "
diff --git a/config/dependencies/trisquel b/config/dependencies/trisquel
index 1ae9a80b..c8e40b43 100755
--- a/config/dependencies/trisquel
+++ b/config/dependencies/trisquel
@@ -5,7 +5,7 @@ bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools
 flex gawk gcc-arm-linux-gnueabi gcc-arm-none-eabi gdb gettext git gnat help2man \
 innoextract libdevmapper-dev libfdt-dev libfont-freetype-perl libfreetype6-dev \
 libftdi-dev libfuse-dev libgnutls28-dev libgpiod-dev libjaylink-dev liblz4-tool \
-liblzma-dev libncurses5-dev \
+liblzma-dev libncurses5-dev ccache \
 libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev \
 libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \
 libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \
diff --git a/config/dependencies/ubuntu2004 b/config/dependencies/ubuntu2004
index 02661ca5..e4b3ef10 100755
--- a/config/dependencies/ubuntu2004
+++ b/config/dependencies/ubuntu2004
@@ -10,5 +10,5 @@ libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \
 libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \
 pciutils perl pkg-config python3 python3-distutils python3-pkg-resources \
 python3-pycryptodome python3-pyelftools python3-setuptools python-is-python3 \
-sharutils swig ttf-unifont unar unifont unzip uuid-dev wget zlib1g-dev \
+sharutils swig ttf-unifont unar unifont unzip uuid-dev wget zlib1g-dev ccache \
 "
diff --git a/config/dependencies/ubuntu2404 b/config/dependencies/ubuntu2404
index 7f91ed05..01e15521 100755
--- a/config/dependencies/ubuntu2404
+++ b/config/dependencies/ubuntu2404
@@ -10,5 +10,5 @@ libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \
 libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \
 pciutils perl pkg-config python3 python3-pkg-resources python3-pycryptodome \
 python3-pyelftools python3-setuptools python-is-python3 sharutils swig \
-fonts-unifont unar unifont unzip uuid-dev wget zlib1g-dev \
+fonts-unifont unar unifont unzip uuid-dev wget zlib1g-dev ccache \
 "
diff --git a/config/dependencies/void b/config/dependencies/void
index 0ab258c2..79a12328 100644
--- a/config/dependencies/void
+++ b/config/dependencies/void
@@ -8,5 +8,5 @@ freetype freetype-devel fuse gawk gcc-ada gdb gettext gettext-devel git \
 help2man innoextract libftdi1 libpciaccess libusb nasm ncurses \
 ncurses-devel openssl openssl-devel p7zip parted pciutils perl perl-LWP \
 python python3 python3-setuptools rsync sharutils subversion texinfo \
-unar unzip wget xz zlib
+unar unzip wget xz zlib ccache
 "
diff --git a/include/rom.sh b/include/rom.sh
index ed3dddf2..e47849f8 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -43,6 +43,7 @@ mkpayload_grub()
 
 mkvendorfiles()
 {
+	[ -z "$mode" ] && $dry cook_coreboot_config
 	check_coreboot_utils "$tree"
 	printf "%s\n" "${version%%-*}" > "$srcdir/.coreboot-version" || \
 	    $err "!mk $srcdir .coreboot-version"
@@ -50,6 +51,14 @@ mkvendorfiles()
 	    x_ ./vendor download $target; return 0
 }
 
+cook_coreboot_config()
+{
+	[ -f "$srcdir/.config" ] || return 0
+	printf "CONFIG_CCACHE=y\n" >> "$srcdir/.config" || \
+	    $err "$srcdir/.config: Could not enable ccache"
+	make -C "$srcdir" oldconfig || $err "Could not cook $srcdir/.config"; :
+}
+
 check_coreboot_utils()
 {
 	for util in cbfstool ifdtool; do

From 490e0186a23d66349333f3a15234bb869f2f0a90 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 22 Jul 2024 02:00:26 +0100
Subject: [PATCH 0785/1549] emphasis on readme that lbmk isn't a coreboot fork

i actually only made this change so that the revision changes,
so that the release directory changes when doing:
./update release

this is to test whether such location change affects the build
time when using ccache.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.md b/README.md
index 7f73a3e2..7f29bc14 100644
--- a/README.md
+++ b/README.md
@@ -94,7 +94,7 @@ easy to do so.
 Not a coreboot fork!
 --------------------
 
-Libreboot is not a fork of coreboot. Every so often, the project
+Libreboot is *not a fork of coreboot*. Every so often, the project
 re-bases on the latest version of coreboot, with the number of custom
 patches in use minimized. Tested, *stable* (static) releases are then provided
 in Libreboot, based on specific coreboot revisions.

From f85cb69ce031759c8b4bbd9ed4eb9f0f422bde13 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 22 Jul 2024 09:11:53 +0100
Subject: [PATCH 0786/1549] rom.sh: re-add seabios-only roms and grub keymaps

this time, only handle multiple keymaps on seagrub
images. for images where seabios is first but does
not immediately load grub, whether grub is still
available in flash, just do one image (US Qwerty)

this still results in fewer images per target than
Libreboot 20240612, but should prevent most users
from being annoyed. i got a few people asking
repeatedly, and i hadn't documented yet how to add
keymap.gkb or how to remove bootorder, to get a
different keymap or disable seagrub respectively.

i anticipate that i'll get such questions a lot, even
if i do document it, so i'm reversing that decision.

it doesn't result in much extra code. the new design
in lbmk makes this sort of thing much simpler.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/coreboot/mkhelper.cfg |  2 +-
 include/rom.sh                    | 33 +++++++++++++++++++++----------
 2 files changed, 24 insertions(+), 11 deletions(-)

diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index de07b4c1..73cc957d 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -7,7 +7,7 @@ seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 
 pv="payload_uboot payload_seabios payload_memtest payload_grub"
 v="initmode ubootelf grub_scan_disk uboot_config grubtree grubelf pname"
-v="$v displaymode tmprom"
+v="$v displaymode tmprom newrom"
 eval `setvars "n" $pv`
 eval `setvars "" $v`
 
diff --git a/include/rom.sh b/include/rom.sh
index e47849f8..7d97e00b 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -106,14 +106,8 @@ mkcorebootbin()
 		    $dry add_seabios
 		[ "$payload_uboot" = "y" ] && pname="uboot" && $dry add_uboot
 	else
-		pname="custom" # coreboot's build system added payloads
-	fi
-	newrom="bin/$target/${pname}_${target}_$initmode$displaymode.rom"
-	$dry x_ mkdir -p "${newrom%/*}"; $dry x_ mv "$tmprom" "$newrom"
-
-	[ "$XBMK_RELEASE" = "y" ] || return 0
-	$dry mksha512sum "$newrom" "vendorhashes"; $dry ./vendor inject \
-	    -r "$newrom" -b "$target" -n nuke || $err "!nuke $newrom"
+		pname="custom" && cprom; :
+	fi; :
 }
 
 add_seabios()
@@ -132,7 +126,7 @@ add_seabios()
 	[ "$payload_memtest" = "y" ] && cbfs "$tmprom" \
 	    "elf/memtest86plus/memtest.bin" img/memtest
 
-	[ "$payload_grub" = "y" ] && pname="seagrub" && add_grub; return 0
+	cprom && [ "$payload_grub" = "y" ] && pname="seagrub" && add_grub; :
 }
 
 add_grub()
@@ -142,6 +136,11 @@ add_grub()
 	    > "$TMPDIR/tmpcfg" || $err "$target: !insert scandisk"
 	cbfs "$tmprom" "$TMPDIR/tmpcfg" scan.cfg raw
 	cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
+	for keymap in config/data/grub/keymap/*.gkb; do
+		[ -f "$keymap" ] || continue
+		keymap="${keymap##*/}"
+		cprom "${keymap%.gkb}"
+	done
 }
 
 add_uboot()
@@ -151,7 +150,21 @@ add_uboot()
 	    ubootelf="$ubdir/u-boot"
 	[ -f "$ubootelf" ] || $err "cb/$target: Can't find u-boot"
 
-	cbfs "$tmprom" "$ubootelf" "fallback/payload"
+	cbfs "$tmprom" "$ubootelf" "fallback/payload"; cprom
+}
+
+cprom()
+{
+	newrom="bin/$target/${pname}_${target}_$initmode$displaymode.rom"
+	[ $# -gt 0 ] && newrom="${newrom%.rom}_$1.rom"
+
+	x_ mkdir -p "bin/$target"
+	x_ cp "$tmprom" "$newrom" && [ $# -gt 0 ] && \
+	    cbfs "$newrom" "config/data/grub/keymap/$1.gkb" keymap.gkb raw
+
+	[ "$XBMK_RELEASE" = "y" ] || return 0
+	$dry mksha512sum "$newrom" "vendorhashes"; $dry ./vendor inject \
+	    -r "$newrom" -b "$target" -n nuke || $err "!nuke $newrom"
 }
 
 mkcoreboottar()

From d070eb1fefca339b6fea0f262fcb889a16d2b27d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 22 Jul 2024 18:40:42 +0100
Subject: [PATCH 0787/1549] rom.sh: copy tmprom to TMPDIR for modification

don't rely on build/coreboot.rom staying in place,
because sometimes it can get purged under certain
conditions, due to idiosyncrasies in the coreboot
build system, even when we don't explicitly clean it

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/rom.sh b/include/rom.sh
index 7d97e00b..58c49bb5 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -82,7 +82,9 @@ mkcorebootbin()
 {
 	[ "$target" = "$tree" ] && return 0
 
-	tmprom="$srcdir/build/coreboot.rom"
+	tmprom="$TMPDIR/coreboot.rom"
+	mv "$srcdir/build/coreboot.rom" "$tmprom" || $err "!mktmprom"
+
 	initmode="${defconfig##*/}"; displaymode="${initmode##*_}"
 	initmode="${initmode%%_*}"
 	[ -n "$displaymode" ] && displaymode="_$displaymode"

From 40dd0a7cf35fe75e3e2ac14eecec256d918f33bc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 22 Jul 2024 18:47:38 +0100
Subject: [PATCH 0788/1549] rom.sh: also add grub to seabios images

we want multiple seagrub images made, with different
keymaps, but we only want one non-seagrub image.

however, we also want grub in the non-seagrub image.
it just means that seabios is primarily what the user
wants, and they might occasionally use grub, whereas
the seagrub images are for people who primarily want
grub but may occasionally access the seabios menu.

right now, the seabios images really only contain seabios,
but there's no harm in adding grub to them.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/include/rom.sh b/include/rom.sh
index 58c49bb5..21d7e3d9 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -128,7 +128,9 @@ add_seabios()
 	[ "$payload_memtest" = "y" ] && cbfs "$tmprom" \
 	    "elf/memtest86plus/memtest.bin" img/memtest
 
-	cprom && [ "$payload_grub" = "y" ] && pname="seagrub" && add_grub; :
+	[ "$payload_grub" = "y" ] && add_grub
+
+	cprom && [ "$payload_grub" = "y" ] && pname="seagrub" && mkseagrub; :
 }
 
 add_grub()
@@ -137,6 +139,10 @@ add_grub()
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
 	    > "$TMPDIR/tmpcfg" || $err "$target: !insert scandisk"
 	cbfs "$tmprom" "$TMPDIR/tmpcfg" scan.cfg raw
+}
+
+mkseagrub()
+{
 	cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
 	for keymap in config/data/grub/keymap/*.gkb; do
 		[ -f "$keymap" ] || continue

From faefcdf3df382bf0b7f0a1a6c6531406fb652d46 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 22 Jul 2024 19:34:19 +0100
Subject: [PATCH 0789/1549] rom.sh: fix buggy deletion of cbutils

when badhash=y, the utils should be deleted, but
the check is deleting if badhash isn't n. if the
hash check isn't being performed, then this will
always be the case and the utils are always deleted.

make it positively delete the file only if badhash=y,
not when it isn't n. while this may not sound very
different, it will prevent the utils being deleted and
re-build endlessly in other cases, like when building
release archives and running the inject --nuke mode
on every image that gets built.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index 21d7e3d9..6f914009 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -62,8 +62,7 @@ cook_coreboot_config()
 check_coreboot_utils()
 {
 	for util in cbfstool ifdtool; do
-		[ "$badhash" = "n" ] || rm -f "elf/$util/$1/$util" || \
-		    $err "!rm badelf elf/$util/$1/$util"
+		[ "$badhash" = "y" ] && x_ rm -f "elf/$util/$1/$util"
 		e "elf/$util/$1/$util" f && continue
 
 		utilelfdir="elf/$util/$1"

From f5ba40200f8c1a04072084e3f67e9f90d5674608 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 22 Jul 2024 19:40:46 +0100
Subject: [PATCH 0790/1549] trees: initialise badhash no n, not empty string

this is another alternative to the previous fix. this one
is therefore now a pre-emptive fix, in case other code is
written in the future that makes use of badhash.

the badhash variable in a y/n variable, so initialise to n.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index ce6da422..814d5362 100755
--- a/script/trees
+++ b/script/trees
@@ -12,7 +12,8 @@ set -u -e
 eval `setvars "" xarch srcdir premake cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
-    defconfig postmake mkhelpercfg dry dest_dir mdir badhash`
+    defconfig postmake mkhelpercfg dry dest_dir mdir`
+badhash="n"
 
 main()
 {
@@ -115,8 +116,8 @@ handle_defconfig()
 configure_project()
 {
 	eval `setvars "" xarch xlang build_depend autoconfargs xtree postmake \
-	    tree_depend makeargs btype mkhelper bootstrapargs premake release \
-	    badhash`
+	    tree_depend makeargs btype mkhelper bootstrapargs premake release`
+	badhash="n"
 
 	[ -f "$1/target.cfg" ] || btype="auto"
 	[ -f "$datadir/mkhelper.cfg" ] && eval `setcfg "$datadir/mkhelper.cfg"`

From 38b65af5b5c10c63dba74b3dcc71741329198420 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 22 Jul 2024 23:35:26 +0100
Subject: [PATCH 0791/1549] support ./mk in place of ./update trees

it's a shortcut command. a new symlink.

./update trees -b flashprog

can instead do:

./mk -b flashprog

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 8 +++++---
 mk    | 1 +
 2 files changed, 6 insertions(+), 3 deletions(-)
 create mode 120000 mk

diff --git a/build b/build
index ce778e2a..09c908c5 100755
--- a/build
+++ b/build
@@ -22,14 +22,15 @@ err="fail"
 main()
 {
 	[ $# -lt 1 ] && $err "bad command"
-	spath="script/$1"
+	spath="script/$1"; shcmd="shift 1"
+	[ "${1#-*}" != "$1" ] && spath="script/trees" && shcmd=":"
 
 	for g in "which git" "git config --global user.name" \
 	    "git config --global user.email" "git_init"; do
 		eval "$g 1>/dev/null 2>/dev/null || git_err \"$g\""
 	done
 
-	case "${1}" in
+	case "${spath#script/}" in
 	version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
 	release) shift 1; mkrelease $@ ;;
 	inject) shift 1; vendor_inject $@ ;;
@@ -41,8 +42,9 @@ main()
 		fi; shift 1
 		x_ ./update trees -b coreboot $@ ;;
 	*)
+		echo "'$@'"
 		[ -f "$spath" ] || $err "bad command"
-		shift 1; "$spath" $@ || $err "excmd: $spath $@" ;;
+		$shcmd; "$spath" $@ || $err "excmd: $spath $@" ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
 }
diff --git a/mk b/mk
new file mode 120000
index 00000000..c795b054
--- /dev/null
+++ b/mk
@@ -0,0 +1 @@
+build
\ No newline at end of file

From a91751a86bc42c3a367f530eef3f9a9728c63eaf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 22 Jul 2024 23:39:04 +0100
Subject: [PATCH 0792/1549] rom.sh: don't run mkcorebootbin on trees -d

don't let it execute during dry builds

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/rom.sh b/include/rom.sh
index 6f914009..eadef643 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -78,6 +78,11 @@ check_coreboot_utils()
 }
 
 mkcorebootbin()
+{
+	$dry realmkcorebootbin; :
+}
+
+realmkcorebootbin()
 {
 	[ "$target" = "$tree" ] && return 0
 

From 3bd290f6a615c0bf9f8e9095b96e9f30bf2d49bf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 22 Jul 2024 23:46:53 +0100
Subject: [PATCH 0793/1549] rom.sh: don't dry-run mkcoreboottar

same as the last change. make the main function a wrapper
that dry-runs the real function.

if the "dry" variable is blank, it executes.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/rom.sh b/include/rom.sh
index eadef643..8e33a564 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -180,6 +180,11 @@ cprom()
 }
 
 mkcoreboottar()
+{
+	$dry realmkcoreboottar
+}
+
+realmkcoreboottar()
 {
 	[ "$target" = "$tree" ] && return 0; [ "$XBMK_RELEASE" = "y" ] && \
 	    [ "$release" != "n" ] && $dry mkrom_tarball "bin/$target"; return 0

From 7fa6052de036f81b54a93bf2f707f563205f176b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 26 Jul 2024 15:24:00 +0100
Subject: [PATCH 0794/1549] general code cleanup in the build system

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             | 28 +++++-----------
 include/git.sh    | 31 +++++++-----------
 include/lib.sh    | 16 +++------
 include/rom.sh    | 34 ++++++-------------
 include/vendor.sh | 83 ++++++++++++++++-------------------------------
 script/trees      | 58 ++++++++++++---------------------
 6 files changed, 83 insertions(+), 167 deletions(-)

diff --git a/build b/build
index 09c908c5..ffed6708 100755
--- a/build
+++ b/build
@@ -27,7 +27,7 @@ main()
 
 	for g in "which git" "git config --global user.name" \
 	    "git config --global user.email" "git_init"; do
-		eval "$g 1>/dev/null 2>/dev/null || git_err \"$g\""
+		eval "$g 1>/dev/null 2>/dev/null || $err \"Unconfigured: $g\""
 	done
 
 	case "${spath#script/}" in
@@ -37,14 +37,13 @@ main()
 	download) shift 1; vendor_download $@ ;;
 	roms)
 		if [ $# -gt 1 ] && [ "$2" = "serprog" ]; then
-			x_ ./update trees -b stm32-vserprog
-			x_ ./update trees -b pico-serprog; return 0
+			x_ ./mk -b stm32-vserprog
+			x_ ./mk -b pico-serprog; return 0
 		fi; shift 1
-		x_ ./update trees -b coreboot $@ ;;
+		x_ ./mk -b coreboot $@ ;;
 	*)
-		echo "'$@'"
 		[ -f "$spath" ] || $err "bad command"
-		$shcmd; "$spath" $@ || $err "excmd: $spath $@" ;;
+		$shcmd; "$spath" $@ || $err "excmd: $spath $(echo "$@")" ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
 }
@@ -62,12 +61,6 @@ git_init()
 	git tag -a "$version" -m "$projectname $version" || return 1
 }
 
-git_err()
-{
-	printf "You need to set git name/email, like so:\n%s\n\n" "$1" 1>&2
-	$err "Git name/email not configured"
-}
-
 mkrelease()
 {
 	export XBMK_RELEASE="y"
@@ -100,9 +93,7 @@ build_release()
 {
 	(
 	cd "$srcdir" || $err "$vdir: !cd \"$srcdir\""
-	./update trees -f
-	rmgit .
-	x_ rm -Rf tmp
+	./mk -f; x_ rm -Rf tmp; rmgit .
 	x_ mv src/docs docs
 	) || $err "can't create release files"
 
@@ -117,12 +108,11 @@ build_release()
 	[ "$mode" = "src" ] && return 0
 
 	touch "$srcdir/lock" || $err "can't make lock file in $srcdir/"
-
 	(
 	cd "$srcdir" || $err "$vdir: 2 !cd \"$srcdir\""
-	./update trees -b coreboot || $err "$vdir: roms-all"
-	./update trees -b pico-serprog || $err "$vdir: rp2040"
-	./update trees -b stm32-vserprog || $err "$vdir: stm32"
+	./mk -b coreboot || $err "$vdir: roms-all"
+	./mk -b pico-serprog || $err "$vdir: rp2040"
+	./mk -b stm32-vserprog || $err "$vdir: stm32"
 	x_ mv bin ../roms
 	) || $err "can't build rom images"
 
diff --git a/include/git.sh b/include/git.sh
index f8441f33..8c86b4c2 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -8,7 +8,7 @@ eval `setvars "" loc url bkup_url subfile subhash subrepo subrepo_bkup \
 fetch_targets()
 {
 	[ -n "$tree_depend" ] && [ "$tree_depend" != "$tree" ] && \
-		x_ ./update trees -f "$project" "$tree_depend"
+		x_ ./mk -f "$project" "$tree_depend"
 	e "src/$project/$tree" d && return 0
 
 	printf "Creating %s tree %s\n" "$project" "$tree"
@@ -23,10 +23,10 @@ fetch_project()
 
 	chkvars url
 
-	[ -n "$xtree" ] && x_ ./update trees -f coreboot "$xtree"
+	[ -n "$xtree" ] && x_ ./mk -f coreboot "$xtree"
 	[ -z "$depend" ] || for d in $depend ; do
 		printf "'%s' needs '%s'; grabbing '%s'\n" "$project" "$d" "$d"
-		x_ ./update trees -f $d
+		x_ ./mk -f $d
 	done
 	clone_project
 
@@ -39,32 +39,24 @@ clone_project()
 {
 	loc="$XBMK_CACHE/repo/$project" && singletree "$project" && \
 	    loc="src/$project"
-
 	printf "Downloading project '%s' to '%s'\n" "$project" "$loc"
-	e "$loc" d && return 0
 
-	remkdir "${tmpgit%/*}"
-	git_prep "$url" "$bkup_url" "$PWD/config/$project/patches" "$loc"
+	e "$loc" d missing && remkdir "${tmpgit%/*}" && git_prep \
+	    "$url" "$bkup_url" "$PWD/config/$project/patches" "$loc"; :
 }
 
 git_prep()
 {
-	_patchdir="$3" # $1 and $2 are gitrepo and gitrepo_backup
-	_loc="$4"
+	_patchdir="$3"; _loc="$4" # $1 and $2 are gitrepo and gitrepo_backup
 
-	chkvars rev
-
-	tmpclone "$1" "$2" "$tmpgit" "$rev" "$_patchdir"
+	chkvars rev; tmpclone "$1" "$2" "$tmpgit" "$rev" "$_patchdir"
 	if singletree "$project" || [ $# -gt 4 ]; then
-		prep_submodules "$_loc"
-	fi
+		prep_submodules "$_loc"; fi
 
 	[ "$project" = "coreboot" ] && [ -n "$xtree" ] && [ $# -gt 2 ] && \
 	    [ "$xtree" != "$tree" ] && link_crossgcc "$_loc"
-
 	[ "$XBMK_RELEASE" = "y" ] && \
-	    [ "$_loc" != "$XBMK_CACHE/repo/$project" ] && \
-		rmgit "$tmpgit"
+	    [ "$_loc" != "$XBMK_CACHE/repo/$project" ] && rmgit "$tmpgit"
 
 	move_repo "$_loc"
 }
@@ -87,7 +79,6 @@ fetch_submodule()
 		_seval="if [ -n \"\$sub$xt\" ] || [ -n \"\$sub${xt}_bkup\" ]"
 		eval "$_seval; then st=\"\$st \$xt\"; fi"
 	done
-
 	st="${st# }" && [ "$st" = "repo file" ] && $err "$mdir: repo+file"
 
 	[ -z "$st" ] && return 0 # subrepo/subfile not defined
@@ -103,12 +94,12 @@ fetch_submodule()
 tmpclone()
 {
 	[ "$repofail" = "y" ] && \
-	    printf "Cached clone failed; trying online.\n" 1>&2
-	repofail="n"
+	    printf "Cached clone failed; trying online.\n" 1>&2; repofail="n"
 
 	[ $# -lt 6 ] || rm -Rf "$3" || $err "git retry: !rm $3 ($1)"
 	repodir="$XBMK_CACHE/repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"
 	mkdir -p "$XBMK_CACHE/repo" || $err "!rmdir $XBMK_CACHE/repo"
+
 	if [ -d "$repodir" ] && [ $# -lt 6 ]; then
 		git -C "$repodir" pull || sleep 3 || git -C "$repodir" pull \
 		    || sleep 3 || git -C "$repodir" pull || :
diff --git a/include/lib.sh b/include/lib.sh
index 2cd8c0d7..586ecde1 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -7,8 +7,6 @@ export LC_COLLATE=C
 export LC_ALL=C
 
 _ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
-kbnotice="Insert a .gkb file from config/data/grub/keymap/ as keymap.gkb \
-if you want a custom keymap in GRUB; use cbfstool from elf/cbfstool."
 
 ifdtool="elf/ifdtool/default/ifdtool"
 cbfstool="elf/cbfstool/default/cbfstool"
@@ -58,8 +56,7 @@ e()
 	estr="[ -$es_t \"\$1\" ] || return 1"
 	[ $# -gt 2 ] && estr="[ -$es_t \"\$1\" ] && return 1" && es2="missing"
 
-	eval "$estr"
-	printf "%s %s\n" "$1" "$es2" 1>&2
+	eval "$estr"; printf "%s %s\n" "$1" "$es2" 1>&2
 }
 
 install_packages()
@@ -121,8 +118,7 @@ versiondate_="$versiondate"
 [ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
     --pretty='%ct' HEAD)" || versiondate="$versiondate_"
 for p in projectname version versiondate projectsite; do
-	chkvars "$p"
-	eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
+	chkvars "$p"; eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
 done
 relname="$projectname-$version"
 export LOCALVERSION="-$projectname-${version%%-*}"
@@ -147,8 +143,7 @@ mkrom_tarball()
 	printf "%s\n" "$versiondate" > "$1/versiondate" || $err "$1 !vdate"
 	printf "%s\n" "$projectname" > "$1/projectname" || $err "$1 !pname"
 
-	mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz"
-	x_ rm -Rf "$1"
+	mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz"; x_ rm -Rf "$1"; :
 }
 
 mktarball()
@@ -182,7 +177,7 @@ rmgit()
 singletree()
 {
 	for targetfile in "config/${1}/"*/target.cfg; do
-		[ -e "$targetfile" ] && [ -f "$targetfile" ] && return 1
+		[ -e "$targetfile" ] && [ -f "$targetfile" ] && return 1; :
 	done; return 0
 }
 
@@ -208,8 +203,7 @@ download()
 vendor_checksum()
 {
 	[ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] || return 1
-	printf "Bad checksum for file: %s\n" "$2" 1>&2
-	rm -f "$2" || :
+	printf "Bad checksum for file: %s\n" "$2" 1>&2; rm -f "$2" || :; :
 }
 
 cbfs()
diff --git a/include/rom.sh b/include/rom.sh
index 8e33a564..80643c48 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -28,10 +28,8 @@ mkpayload_grub()
 {
 	eval `setvars "" grub_modules grub_install_modules`
 	$dry eval `setcfg "$grubdata/module/$tree"`
-
-	$dry x_ rm -f "$srcdir/grub.elf"
-
-	$dry "$srcdir/grub-mkstandalone" --grub-mkimage="$srcdir/grub-mkimage" \
+	$dry x_ rm -f "$srcdir/grub.elf"; $dry \
+	"$srcdir/grub-mkstandalone" --grub-mkimage="$srcdir/grub-mkimage" \
 	    -O i386-coreboot -o "$srcdir/grub.elf" -d "${srcdir}/grub-core/" \
 	    --fonts= --themes= --locales=  --modules="$grub_modules" \
 	    --install-modules="$grub_install_modules" \
@@ -78,16 +76,11 @@ check_coreboot_utils()
 }
 
 mkcorebootbin()
-{
-	$dry realmkcorebootbin; :
-}
-
-realmkcorebootbin()
 {
 	[ "$target" = "$tree" ] && return 0
 
 	tmprom="$TMPDIR/coreboot.rom"
-	mv "$srcdir/build/coreboot.rom" "$tmprom" || $err "!mktmprom"
+	$dry x_ cp "$srcdir/build/coreboot.rom" "$tmprom"
 
 	initmode="${defconfig##*/}"; displaymode="${initmode##*_}"
 	initmode="${initmode%%_*}"
@@ -107,12 +100,12 @@ realmkcorebootbin()
 
 	[ "$payload_memtest" = "y" ] || payload_memtest="n"
 	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"
-	if grep "CONFIG_PAYLOAD_NONE=y" "$defconfig"; then
+	if $dry grep "CONFIG_PAYLOAD_NONE=y" "$defconfig"; then
 		[ "$payload_seabios" = "y" ] && pname="seabios" && \
 		    $dry add_seabios
 		[ "$payload_uboot" = "y" ] && pname="uboot" && $dry add_uboot
 	else
-		pname="custom" && cprom; :
+		pname="custom" && $dry cprom; :
 	fi; :
 }
 
@@ -149,10 +142,8 @@ mkseagrub()
 {
 	cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
 	for keymap in config/data/grub/keymap/*.gkb; do
-		[ -f "$keymap" ] || continue
-		keymap="${keymap##*/}"
-		cprom "${keymap%.gkb}"
-	done
+		[ -f "$keymap" ] && cprom "${keymap##*/}"; :
+	done; :
 }
 
 add_uboot()
@@ -168,11 +159,11 @@ add_uboot()
 cprom()
 {
 	newrom="bin/$target/${pname}_${target}_$initmode$displaymode.rom"
-	[ $# -gt 0 ] && newrom="${newrom%.rom}_$1.rom"
+	[ $# -gt 0 ] && newrom="${newrom%.rom}_${1%.gkb}.rom"
 
 	x_ mkdir -p "bin/$target"
 	x_ cp "$tmprom" "$newrom" && [ $# -gt 0 ] && \
-	    cbfs "$newrom" "config/data/grub/keymap/$1.gkb" keymap.gkb raw
+	    cbfs "$newrom" "config/data/grub/keymap/$1" keymap.gkb raw
 
 	[ "$XBMK_RELEASE" = "y" ] || return 0
 	$dry mksha512sum "$newrom" "vendorhashes"; $dry ./vendor inject \
@@ -180,12 +171,7 @@ cprom()
 }
 
 mkcoreboottar()
-{
-	$dry realmkcoreboottar
-}
-
-realmkcoreboottar()
 {
 	[ "$target" = "$tree" ] && return 0; [ "$XBMK_RELEASE" = "y" ] && \
-	    [ "$release" != "n" ] && $dry mkrom_tarball "bin/$target"; return 0
+	    [ "$release" != "n" ] && $dry mkrom_tarball "bin/$target"; :
 }
diff --git a/include/vendor.sh b/include/vendor.sh
index ace3f7ce..a6e82271 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -25,10 +25,8 @@ eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
 
 vendor_download()
 {
-	export PATH="$PATH:/sbin"
-
-	[ $# -gt 0 ] || $err "No argument given"
-	board="$1" && readcfg && readkconfig && bootstrap && getfiles; return 0
+	[ $# -gt 0 ] || $err "No argument given"; export PATH="$PATH:/sbin"
+	board="$1"; readcfg && readkconfig && bootstrap && getfiles; :
 }
 
 readkconfig()
@@ -49,14 +47,14 @@ readkconfig()
 
 bootstrap()
 {
-	x_ ./update trees -f coreboot ${cbdir##*/}
+	x_ ./mk -f coreboot ${cbdir##*/}
 	for d in uefitool biosutilities bios_extract; do
-		x_ ./update trees -b "$d"
+		x_ ./mk -b "$d"
 	done
 	[ -d "${kbc1126_ec_dump%/*}" ] && x_ make -C "$cbdir/util/kbc1126"
 	[ -n "$MRC_refcode_cbtree" ] && \
 	    cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
-	    x_ ./update trees -d coreboot $MRC_refcode_cbtree; return 0
+	    x_ ./mk -d coreboot $MRC_refcode_cbtree; return 0
 }
 
 getfiles()
@@ -68,9 +66,8 @@ getfiles()
 	    "$CONFIG_SMSC_SCH5545_EC_FW_FILE"
 	[ -z "$CONFIG_KBC1126_FIRMWARE" ] || fetch kbc1126ec "$EC_url" \
 	    "$EC_url_bkup" "$EC_hash" "$CONFIG_KBC1126_FW1"
-	[ -z "$CONFIG_VGA_BIOS_FILE" ] || fetch "e6400vga" \
-	    "$E6400_VGA_DL_url" "$E6400_VGA_DL_url_bkup" "$E6400_VGA_DL_hash" \
-	    "$CONFIG_VGA_BIOS_FILE"
+	[ -z "$CONFIG_VGA_BIOS_FILE" ] || fetch e6400vga "$E6400_VGA_DL_url" \
+	  "$E6400_VGA_DL_url_bkup" "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
 	[ -z "$CONFIG_HAVE_MRC" ] || fetch "mrc" "$MRC_url" "$MRC_url_bkup" \
 	    "$MRC_hash" "$CONFIG_MRC_FILE"; return 0
 }
@@ -82,33 +79,27 @@ fetch()
 
 	download "$dl" "$dl_bkup" "$_dl" "$dlsum"
 
-	rm -Rf "${_dl}_extracted" || \
-	    $err "!rm -Rf ${_ul}_extracted"
+	rm -Rf "${_dl}_extracted" || $err "!rm -Rf ${_ul}_extracted"
 	e "$_dest" f && return 0
 
 	mkdir -p "${_dest%/*}" || $err "mkdirs: !mkdir -p ${_dest%/*}"
-	remkdir "$appdir"
-	extract_archive "$_dl" "$appdir" || [ "$dl_type" = "e6400vga" ] || \
-	    $err "mkdirs $_dest $dl_type: !extract"
+	remkdir "$appdir"; extract_archive "$_dl" "$appdir" || \
+	    [ "$dl_type" = "e6400vga" ] || $err "mkd $_dest $dl_type: !extract"
 
-	eval "extract_$dl_type"
-	set -u -e
-
-	e "$_dest" f missing && $err "!extract_$dl_type"; return 0
+	eval "extract_$dl_type"; set -u -e
+	e "$_dest" f missing && $err "!extract_$dl_type"; :
 }
 
 extract_intel_me()
 {
 	e "$mecleaner" f not && $err "$cbdir: me_cleaner missing"
 
-	_me="$PWD/$_dest" # must always be an absolute path
-	cdir="$PWD/$appdir" # must always be an absolute path
+	_me="$PWD/$_dest"; cdir="$PWD/$appdir"
 	[ $# -gt 0 ] && _me="${1}" && cdir="$2"
 
 	e "$_me" f && return 0
 
-	sdir="$(mktemp -d)"
-	[ -z "$sdir" ] && return 0
+	sdir="$(mktemp -d)"; [ -z "$sdir" ] && return 0
 	mkdir -p "$sdir" || $err "extract_intel_me: !mkdir -p \"$sdir\""
 
 	set +u +e
@@ -131,8 +122,7 @@ extract_intel_me()
 		else
 			continue
 		fi
-		cdir="$1"
-		[ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
+		cdir="$1"; [ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
 		cd "$cdir" || :
 	done
 	)
@@ -149,8 +139,7 @@ extract_kbc1126ec()
 {
 	e "$kbc1126_ec_dump" f missing && $err "$cbdir: kbc1126 util missing"
 	(
-	x_ cd "$appdir/"
-	mv Rompaq/68*.BIN ec.bin || :
+	x_ cd "$appdir/"; mv Rompaq/68*.BIN ec.bin || :
 	if [ ! -f "ec.bin" ]; then
 		unar -D ROM.CAB Rom.bin || unar -D Rom.CAB Rom.bin || \
 		    unar -D 68*.CAB Rom.bin || $err "can't extract Rom.bin"
@@ -195,14 +184,10 @@ extract_sch5545ec()
 
 vendor_inject()
 {
-	set +u +e
-
-	[ $# -lt 1 ] && $err "No options specified."
+	set +u +e; [ $# -lt 1 ] && $err "No options specified."
 	[ "$1" = "listboards" ] && eval "ls -1 config/coreboot || :; exit 0"
 
-	archive="$1"
-
-	while getopts n:r:b:m: option; do
+	archive="$1"; while getopts n:r:b:m: option; do
 		case "$option" in
 		n) nukemode="$OPTARG" ;;
 		r) rom="$OPTARG" ;;
@@ -215,11 +200,7 @@ vendor_inject()
 	check_board || return 0
 	[ "$nukemode" = "nuke" ] || x_ ./vendor download $board
 	[ "$vrelease" != "y" ] && patch_rom "$rom"
-	[ "$vrelease" = "y" ] && patch_release_roms
-
-	[ "$nukemode" = "nuke" ] && return 0
-	printf "Friendly reminder (this is *not* an error message):\n"
-	printf "Make sure the files were inserted. ALSO:\n%s\n" "$kbnotice"
+	[ "$vrelease" = "y" ] && patch_release_roms; :
 }
 
 check_board()
@@ -246,15 +227,13 @@ check_release()
 # It will only succeed if the filename is not changed from the build/download
 detect_board()
 {
-	path="$1"
-	filename="$(basename "$path")"
+	path="$1"; filename="$(basename "$path")"
 	case "$filename" in
 	grub_*|seagrub_*|custom_*)
 		board="$(echo "$filename" | cut -d '_' -f2-3)" ;;
 	seabios_withgrub_*)
 		board="$(echo "$filename" | cut -d '_' -f3-4)" ;;
-	*.tar.xz)
-		_stripped_prefix="${filename#*_}"
+	*.tar.xz) _stripped_prefix="${filename#*_}"
 		board="${_stripped_prefix%.tar.xz}" ;;
 	*) $err "detect_board $filename: could not detect board type"
 	esac; printf "%s\n" "$board"
@@ -265,10 +244,8 @@ readcfg()
 	if [ "$board" = "serprog_rp2040" ] || \
 	    [ "$board" = "serprog_stm32" ]; then
 		return 1
-	fi
-	boarddir="$cbcfgsdir/$board"
-	eval `setcfg "$boarddir/target.cfg"`
-	chkvars vcfg tree
+	fi; boarddir="$cbcfgsdir/$board"
+	eval `setcfg "$boarddir/target.cfg"`; chkvars vcfg tree
 
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
@@ -277,13 +254,12 @@ readcfg()
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 	ifdtool="elf/ifdtool/$tree/ifdtool"
 
-	x_ ./update trees -d coreboot $tree
+	x_ ./mk -d coreboot $tree
 }
 
 patch_release_roms()
 {
-	remkdir "tmp/romdir"
-	tar -xf "$archive" -C "tmp/romdir" || \
+	remkdir "tmp/romdir"; tar -xf "$archive" -C "tmp/romdir" || \
 	    $err "patch_release_roms: !tar -xf \"$archive\" -C \"tmp/romdir\""
 
 	for x in "tmp/romdir/bin/"*/*.rom ; do
@@ -311,9 +287,7 @@ patch_release_roms()
 
 patch_rom()
 {
-	rom="$1"
-
-	. "$(check_defconfig "$boarddir")" 2>/dev/null || exit 0
+	rom="$1"; . "$(check_defconfig "$boarddir")" 2>/dev/null || exit 0
 
 	[ "$CONFIG_HAVE_MRC" = "y" ] && inject "mrc.bin" "$CONFIG_MRC_FILE" \
 	    "mrc" "0xfffa0000"
@@ -324,8 +298,7 @@ patch_rom()
 	    "$CONFIG_KBC1126_FW1" raw "$CONFIG_KBC1126_FW1_OFFSET" && inject \
 	    ecfw2.bin "$CONFIG_KBC1126_FW2" raw "$CONFIG_KBC1126_FW2_OFFSET"
 	[ -n "$CONFIG_VGA_BIOS_FILE" ] && [ -n "$CONFIG_VGA_BIOS_ID" ] && \
-		inject "pci$CONFIG_VGA_BIOS_ID.rom" \
-		    "$CONFIG_VGA_BIOS_FILE" "optionrom"
+	  inject "pci$CONFIG_VGA_BIOS_ID.rom" "$CONFIG_VGA_BIOS_FILE" optionrom
 	[ "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" = "y" ] && \
 	    [ -n "$CONFIG_SMSC_SCH5545_EC_FW_FILE" ] && \
 		inject sch5545_ecfw.bin "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
@@ -359,7 +332,7 @@ inject()
 	[ "$_t" != "stage" ] || "$cbfstool" "$rom" add-stage -f \
 	    "$_dest" -n "$cbfsname" -t stage -c lzma || $err "$rom: !add ref"
 	[ "$_t" = "stage" ] || "$cbfstool" "$rom" add -f "$_dest" \
-	    -n "$cbfsname" -t $_t $_offset || $err "$rom !add $_t ($_dest)"
+	    -n "$cbfsname" -t $_t $_offset || $err "$rom !add $_t ($_dest)"; :
 }
 
 modify_gbe()
diff --git a/script/trees b/script/trees
index 814d5362..227b2216 100755
--- a/script/trees
+++ b/script/trees
@@ -12,8 +12,7 @@ set -u -e
 eval `setvars "" xarch srcdir premake cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
-    defconfig postmake mkhelpercfg dry dest_dir mdir`
-badhash="n"
+    defconfig postmake mkhelpercfg dry dest_dir mdir`; badhash="n"
 
 main()
 {
@@ -38,7 +37,7 @@ main()
 	done
 	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
 	[ -z "$project" ] && for p in $(ls -1 config/git); do
-		./update trees $_f "$p" || $err "!./update trees $_f $p"; :
+		./mk $_f "$p" || $err "!./mk $_f $p"; :
 	done && return 1
 
 	[ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined"
@@ -53,9 +52,8 @@ main()
 	e "$mkhelpercfg" f missing && mkhelpercfg="$TMPDIR/mkhelper.cfg" && \
 	    x_ touch "$mkhelpercfg"
 
-	targets="$@"
-	cmd="build_targets $targets" && singletree "$project" && \
-	    cmd="build_project"
+	targets="$@"; cmd="build_targets $targets"
+	singletree "$project" && cmd="build_project"
 
 	remkdir "${tmpgit%/*}"
 }
@@ -95,8 +93,7 @@ handle_defconfig()
 	configure_project "$target_dir" || return 0
 	x_ mkdir -p "$elfdir/$target"
 
-	chkvars tree
-	srcdir="src/$project/$tree"
+	chkvars tree; srcdir="src/$project/$tree"
 
 	if [ "$mode" = "distclean" ] || [ "$mode" = "crossgcc-clean" ]; then
 		[ -d "$srcdir" ] || return 0
@@ -117,17 +114,12 @@ configure_project()
 {
 	eval `setvars "" xarch xlang build_depend autoconfargs xtree postmake \
 	    tree_depend makeargs btype mkhelper bootstrapargs premake release`
-	badhash="n"
-
-	[ -f "$1/target.cfg" ] || btype="auto"
+	_tcfg="$1/target.cfg"; badhash="n"; [ -f "$_tcfg" ] || btype="auto"
 	[ -f "$datadir/mkhelper.cfg" ] && eval `setcfg "$datadir/mkhelper.cfg"`
 
-	_tcfg="$1/target.cfg"
 	while [ -f "$_tcfg" ] || [ "$cmd" != "build_project" ]; do
-		eval `setvars "" rev tree`
-
+		eval `setvars "" rev tree`; eval `setcfg "$_tcfg"`
 		printf "Loading %s config: %s\n" "$project" "$_tcfg"
-		eval `setcfg "$_tcfg"`
 
 		[ "$_f" = "-d" ] && build_depend="" # dry run
 		[ "$cmd" = "build_project" ] && break
@@ -136,20 +128,16 @@ configure_project()
 		[ "${_tcfg%/*/target.cfg}" = "${_tcfg%"/$tree/target.cfg"}" ] \
 		    && break; _tcfg="${_tcfg%/*/target.cfg}/$tree/target.cfg"
 	done
-
 	[ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1
 	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
-
 	[ -z "$mode" ] && build_dependencies
 
 	mdir="$PWD/config/submodule/$project"
 	[ -n "$tree" ] && mdir="$mdir/$tree"
-
 	[ -f "CHANGELOG" ] || check_project_hashes
 
-	[ "$mode" = "fetch" ] || x_ ./update trees -f "$project" $target
+	[ "$mode" = "fetch" ] || x_ ./mk -f "$project" $target
 	[ "$mode" = "fetch" ] || return 0
-
 	[ -f "CHANGELOG" ] && return 1; fetch_${cmd#build_}; return 1
 }
 
@@ -159,7 +147,7 @@ build_dependencies()
 		bd_p="${bd%%/*}"; bd_t="${bd##*/}"
 		[ -z "$bd_p" ] && $dry $err "$project/$tree: !bd '$bd'"
 		[ "${bd##*/}" = "$bd" ] && bd_t=""
-		[ -z "$bd_p" ] || $dry ./update trees -b $bd_p $bd_t \
+		[ -z "$bd_p" ] || $dry ./mk -b $bd_p $bd_t \
 		    || $err "!mk $project/$tree $bd_p/$bd_t"; continue
 	done; return 0
 }
@@ -167,28 +155,23 @@ build_dependencies()
 check_project_hashes()
 {
 	mkdir -p "$XBMK_CACHE/hash" || $err "!mkdir '$XBMK_CACHE/hash'"
-
-	old_pjhash=""
-	[ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
+	old_pjhash=""; [ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
 	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
 
 	x_ rm -f "$TMPDIR/project.list" "$TMPDIR/project.hash" \
 	    "$TMPDIR/project.tmp"; x_ touch "$TMPDIR/project.tmp"
 	x_ touch "$TMPDIR/project.hash"
 
-	for delcheck in "$datadir" "$configdir/$tree" "$mdir"; do
-		[ -d "$delcheck" ] || continue
-		find "$delcheck" -type f -not -path "*/.git*/*" \
-		    >> "$TMPDIR/project.tmp" || \
-		    $err "!find $delcheck > project.tmp"
-	done
-	sort "$TMPDIR/project.tmp" > "$TMPDIR/project.list" || \
+	for rmchk in "$datadir" "$configdir/$tree" "$mdir"; do
+		[ -d "$rmchk" ] || continue
+		find "$rmchk" -type f -not -path "*/.git*/*" >> \
+		    "$TMPDIR/project.tmp" || $err "!find $rmchk > project.tmp"
+	done; sort "$TMPDIR/project.tmp" > "$TMPDIR/project.list" || \
 	    $err "!sort project tmp/list"
 
-	while read -r delcheck; do
-		[ -f "$delcheck" ] || continue
-		sha512sum "$delcheck" | awk '{print $1}' >> \
-		    "$TMPDIR/project.hash" || $err "!findhash $delcheck"
+	while read -r rmchk; do
+		[ ! -f "$rmchk" ] || sha512sum "$rmchk" | awk \
+		    '{print $1}' >> "$TMPDIR/project.hash" || $err "!h $rmchk"
 	done < "$TMPDIR/project.list"
 
 	pjhash="$(sha512sum "$TMPDIR/project.hash" | awk '{print $1}')" || :
@@ -200,7 +183,7 @@ check_project_hashes()
 
 	[ "$badhash" = "n" ] || rm -Rf "src/$project/$tree" \
 	    "elf/$project/$tree" "elf/$project/$target" || \
-	    $err "!rmproject $project $tree"; :
+	    $err "!rm $project $tree"; :
 }
 
 check_cross_compiler()
@@ -211,7 +194,7 @@ check_cross_compiler()
 		[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
 		[ -n "$xtree" ] && cbdir="src/coreboot/$xtree"
 
-		x_ ./update trees -f coreboot ${cbdir#src/coreboot/}
+		x_ ./mk -f coreboot ${cbdir#src/coreboot/}
 
 		export PATH="$PWD/$cbdir/util/crossgcc/xgcc/bin:$PATH"
 		export CROSS_COMPILE="${xarch% *}-"
@@ -261,7 +244,6 @@ handle_makefile()
 run_make_command()
 {
 	[ -z "$premake" ] || [ -n "$mode" ] || $premake || $err "!$premake"
-
 	$dry check_cmake "$srcdir" && [ -z "$mode" ] && $dry check_autoconf \
 	    "$srcdir"; $dry check_makefile "$srcdir" || return 1
 

From 59894ed555ecccf0346a7942e208171a21412d9b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Jul 2024 13:30:25 +0100
Subject: [PATCH 0795/1549] lib.sh: new function mk() to handle trees in bulk

single-tree projects cannot be handled in bulk, e.g.
./mk -f project1 project2 project3

that is still the case, from the shell, but internally
it is now possible:
mk -f project1 project2 project3

mk() is a function that simply handles the given flag,
and all projects specified.

it does not handle cases without argument, for example
you cannot do:
mk -f

arguments must be provided. it can be used internally,
to simplify cases where multiple single-tree projects
must be handled, but *also* allows multi-tree projects
to be specified, without being able to actually handle
trees within that multi-tree project; so for example,
you can only specify coreboot, and then it would run
on every coreboot tree.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             | 12 ++++--------
 include/lib.sh    |  8 ++++++++
 include/vendor.sh |  4 +---
 script/trees      |  4 +---
 4 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/build b/build
index ffed6708..ce744339 100755
--- a/build
+++ b/build
@@ -36,11 +36,9 @@ main()
 	inject) shift 1; vendor_inject $@ ;;
 	download) shift 1; vendor_download $@ ;;
 	roms)
-		if [ $# -gt 1 ] && [ "$2" = "serprog" ]; then
-			x_ ./mk -b stm32-vserprog
-			x_ ./mk -b pico-serprog; return 0
-		fi; shift 1
-		x_ ./mk -b coreboot $@ ;;
+		[ $# -gt 1 ] && [ "$2" = "serprog" ] && \
+		    mk -b stm32-vserprog pico-serprog && return 0
+		shift 1; x_ ./mk -b coreboot $@ ;;
 	*)
 		[ -f "$spath" ] || $err "bad command"
 		$shcmd; "$spath" $@ || $err "excmd: $spath $(echo "$@")" ;;
@@ -110,9 +108,7 @@ build_release()
 	touch "$srcdir/lock" || $err "can't make lock file in $srcdir/"
 	(
 	cd "$srcdir" || $err "$vdir: 2 !cd \"$srcdir\""
-	./mk -b coreboot || $err "$vdir: roms-all"
-	./mk -b pico-serprog || $err "$vdir: rp2040"
-	./mk -b stm32-vserprog || $err "$vdir: stm32"
+	mk -b coreboot pico-serprog stm32-vserprog
 	x_ mv bin ../roms
 	) || $err "can't build rom images"
 
diff --git a/include/lib.sh b/include/lib.sh
index 586ecde1..2c9cd0d4 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -212,3 +212,11 @@ cbfs()
 	lzma="-c lzma" && [ $# -gt 3 ] && lzma="-t raw"
 	x_ "$cbfstool" "$1" $ccmd -f "$2" -n "$3" $lzma
 }
+
+mk()
+{
+	mk_flag="$1" || $err "No argument given"
+	shift 1 && for mk_arg in $@; do
+		./mk $mk_flag $mk_arg || $err "./mk $mk_flag $mk_arg"; :
+	done; :
+}
diff --git a/include/vendor.sh b/include/vendor.sh
index a6e82271..ea1d4f0a 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -48,9 +48,7 @@ readkconfig()
 bootstrap()
 {
 	x_ ./mk -f coreboot ${cbdir##*/}
-	for d in uefitool biosutilities bios_extract; do
-		x_ ./mk -b "$d"
-	done
+	mk -b uefitool biosutilities bios_extract
 	[ -d "${kbc1126_ec_dump%/*}" ] && x_ make -C "$cbdir/util/kbc1126"
 	[ -n "$MRC_refcode_cbtree" ] && \
 	    cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
diff --git a/script/trees b/script/trees
index 227b2216..01df28a0 100755
--- a/script/trees
+++ b/script/trees
@@ -36,9 +36,7 @@ main()
 		project="${OPTARG#src/}"; shift 2
 	done
 	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
-	[ -z "$project" ] && for p in $(ls -1 config/git); do
-		./mk $_f "$p" || $err "!./mk $_f $p"; :
-	done && return 1
+	[ -z "$project" ] && mk $_f $(ls -1 config/git) && return 1
 
 	[ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined"
 

From a78eaac88336922e38f33f51d7ee5d2262abdf10 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Jul 2024 16:09:35 +0100
Subject: [PATCH 0796/1549] uefitool: Add patch working around musl libc issue

musl libc is very conservative in what it implements,
preferring a very "pure" libc implementation. this means
that it lacks many of the niceties found in others like
the GNU C Library; the latter implements many BSD libc
extensions, for example.

ACCESSPERMS is a #define in BSD libc that does:
S_IRWXU | S_IRWXG | S_IRWXO

Essentially, it provides a bitwise OR providing chmod 0777,
which can be used as shorthand in calls to functions such
as mkdir() available in all libc implementations.

In the case of uefitool, this define is indeed used on mkdir.
Conditionally re-define ACCESSPERMS, if undefined, so that musl
libc can be used when building uefitool.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...stem-define-ACCESSPERMS-if-undefined.patch | 54 +++++++++++++++++++
 1 file changed, 54 insertions(+)
 create mode 100644 config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch

diff --git a/config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch b/config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch
new file mode 100644
index 00000000..56ba0cb6
--- /dev/null
+++ b/config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch
@@ -0,0 +1,54 @@
+From 35f5bbf5aa7dc32f0140147737af73fd3866f455 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sun, 28 Jul 2024 16:04:30 +0100
+Subject: [PATCH 1/1] common/filesystem: define ACCESSPERMS if undefined
+
+normally defined in sys/stat.h on various libc implementations,
+but musl libc doesn't seem to have it, leading to this build
+issue:
+
+common/filesystem.cpp:86:38: error: 'ACCESSPERMS' was not declared in this scope
+   86 |     return (mkdir(dir.toLocal8Bit(), ACCESSPERMS) == 0);
+
+ACCESSPERMS is typically defined as the result of bitwise OR:
+S_IRWXU | S_IRWXG | S_IRWXO
+
+This creates the chmod permission 0777, used on the mkdir() call.
+
+ACCESSPERMS is supported on GNU C Library, for compatibility with
+BSD libc implementations; the latter also implements ALLPERMS
+and DEFFILEMODE, which don't seem to be used by uefitool regardless.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ common/filesystem.cpp | 9 ++++++++-
+ 1 file changed, 8 insertions(+), 1 deletion(-)
+
+diff --git a/common/filesystem.cpp b/common/filesystem.cpp
+index b2b8d65..9672e07 100644
+--- a/common/filesystem.cpp
++++ b/common/filesystem.cpp
+@@ -15,6 +15,13 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ #include <sys/stat.h>
+ #include <fstream>
+ 
++/* musl libc does not define ACCESSPERMS, seen on glibc and many bsd libc.
++ * let's do alpine linux users a massive favour, so that the code compiles.
++ */
++#ifndef ACCESSPERMS
++#define ACCESSPERMS (S_IRWXU | S_IRWXG | S_IRWXO) /* chmod permission: 0777 */
++#endif
++
+ bool readFileIntoBuffer(const UString& inPath, UByteArray& buf) 
+ {
+     if (!isExistOnFs(inPath))
+@@ -103,4 +110,4 @@ UString getAbsPath(const UString & path) {
+         return UString(abs);
+     return path;
+ }
+-#endif
+\ No newline at end of file
++#endif
+-- 
+2.39.2
+

From 490a94d7bc48fc4eddfb257066482e66d4cff9dc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Jul 2024 16:38:48 +0100
Subject: [PATCH 0797/1549] uefitool: Only define ACCESSPERMS on *nix

I re-read the modified code, and it has defines in place
for building on Windows; I was defining ACCESSPERMS
universally, but it should only be defined for non-Windows
systems, which the context in this code means Linux/BSD.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...stem-define-ACCESSPERMS-if-undefined.patch | 32 ++++++++++---------
 1 file changed, 17 insertions(+), 15 deletions(-)

diff --git a/config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch b/config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch
index 56ba0cb6..8241cebe 100644
--- a/config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch
+++ b/config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch
@@ -1,9 +1,9 @@
-From 35f5bbf5aa7dc32f0140147737af73fd3866f455 Mon Sep 17 00:00:00 2001
+From 75437e2253fc70f4e3368c9d030415ce4ae52fa6 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 28 Jul 2024 16:04:30 +0100
 Subject: [PATCH 1/1] common/filesystem: define ACCESSPERMS if undefined
 
-normally defined in sys/stat.h on various libc implementations,
+Normally defined in sys/stat.h on various libc implementations,
 but musl libc doesn't seem to have it, leading to this build
 issue:
 
@@ -19,30 +19,32 @@ ACCESSPERMS is supported on GNU C Library, for compatibility with
 BSD libc implementations; the latter also implements ALLPERMS
 and DEFFILEMODE, which don't seem to be used by uefitool regardless.
 
+Do not define it on the Windows builds; only do it for the others,
+such as Linux.
+
 Signed-off-by: Leah Rowe <info@minifree.org>
 ---
- common/filesystem.cpp | 9 ++++++++-
- 1 file changed, 8 insertions(+), 1 deletion(-)
+ common/filesystem.cpp | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
 
 diff --git a/common/filesystem.cpp b/common/filesystem.cpp
-index b2b8d65..9672e07 100644
+index b2b8d65..af5e537 100644
 --- a/common/filesystem.cpp
 +++ b/common/filesystem.cpp
-@@ -15,6 +15,13 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
- #include <sys/stat.h>
- #include <fstream>
- 
-+/* musl libc does not define ACCESSPERMS, seen on glibc and many bsd libc.
-+ * let's do alpine linux users a massive favour, so that the code compiles.
-+ */
+@@ -75,6 +75,12 @@ UString getAbsPath(const UString & path)
+ #else
+ #include <unistd.h>
+ #include <stdlib.h>
++
++/* musl libc does not define ACCESSPERMS */
 +#ifndef ACCESSPERMS
 +#define ACCESSPERMS (S_IRWXU | S_IRWXG | S_IRWXO) /* chmod permission: 0777 */
 +#endif
 +
- bool readFileIntoBuffer(const UString& inPath, UByteArray& buf) 
+ bool isExistOnFs(const UString & path) 
  {
-     if (!isExistOnFs(inPath))
-@@ -103,4 +110,4 @@ UString getAbsPath(const UString & path) {
+     struct stat buf;
+@@ -103,4 +109,4 @@ UString getAbsPath(const UString & path) {
          return UString(abs);
      return path;
  }

From 1b55fc790c1eebc8db16dab0611f08df36acd793 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 28 Jul 2024 18:24:12 +0100
Subject: [PATCH 0798/1549] fix hp8200sff_4mb ifd file (pd region)

see bug report:

https://codeberg.org/libreboot/lbmk/issues/228

The layout specified incorrect boundaries for the pd region.
With this change, it should flash and boot reliably.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/ifd/hp8200sff/ifd_4mb | Bin 4096 -> 4096 bytes
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/config/ifd/hp8200sff/ifd_4mb b/config/ifd/hp8200sff/ifd_4mb
index fef3510722d5a6464b622075dc667c4eee3eaf4a..141e1314f5531a7951577d13f3c74078998efbaf 100644
GIT binary patch
delta 15
WcmZorXi%6Cz{0@tpM7J<8h!vKBLwdN

delta 15
WcmZorXi%6C!1AA;fnj6F8h!vMO9b-(


From dbe24b039d381365b62c02802016f108c3efe8eb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 31 Jul 2024 12:26:25 +0100
Subject: [PATCH 0799/1549] coreboot/default: Update to 97bc693ab (2024-07-29)

Several patches are now merged upstream and no longer needed
in lbmk, such as the HP EliteBook 8560w patch, and related
patches. Some patches were changed, for example the Dell Latitude
ivb/snb laptops are now variants in coreboot, instead of being
individual ports; now they re-use the same base code.

This this, the corresponding files under config/submodules
have changed, for things like 3rdparty submodules e.g. libgfxinit,
and tarballs e.g. crossgcc.

This is long overdue, and will enable more boards to be added.
This newer revision will be used in the next release, and some
follow-up patches will merge these trees into default:

* coreboot/haswell
* coreboot/dell

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../coreboot/d510mo/config/libgfxinit_txtmode |   34 +-
 .../d510mo_16mb/config/libgfxinit_txtmode     |   34 +-
 .../d945gclf_512kb/config/libgfxinit_txtmode  |   34 +-
 .../d945gclf_8mb/config/libgfxinit_txtmode    |   34 +-
 ...Set-default-VRAM-to-64MiB-instead-of.patch |    8 +-
 ...d-c3-and-clockgen-to-apple-macbook21.patch |    8 +-
 ...-Video-RAM-changed-to-default-previo.patch |    8 +-
 ...64MiB-VRAM-the-default-in-cmos.defau.patch |    8 +-
 ...0-set-VRAM-to-256MiB-VRAM-by-default.patch |    8 +-
 ...o-x200-set-VRAM-to-256MiB-by-default.patch |    8 +-
 ...m-es2l-set-VRAM-to-256MiB-by-default.patch |    8 +-
 ...3t-am3-set-VRAM-to-256MiB-by-default.patch |    8 +-
 ...09-lenovo-t400-Enable-all-SATA-ports.patch |    4 +-
 ...ovo-X230-patch-gfx_uma_size-224M-by-.patch |    8 +-
 ...et-me_state-Disabled-in-cmos.default.patch |    8 +-
 ...e-Disabled-on-all-cmos.default-files.patch |   46 +-
 ...ol-add-nuke-flag-all-0xFF-on-region.patch} |   52 +-
 ...x200-t400-Revert-cpu-intel-model_10.patch} |    6 +-
 ...-CPUs-don-t-enable-alternative-SMRR.patch} |    6 +-
 ...ble-01.0-device-in-devicetree-for-d.patch} |    4 +-
 ...r-coreboot-images-built-without-a-p.patch} |    8 +-
 ...b-dell-Add-Latitude-E6530-Ivy-Bridge.patch |  430 +++++
 ...b-dell-Add-Latitude-E5530-Ivy-Bridge.patch |  430 +++++
 ...dell-Add-Latitude-E6420-Sandy-Bridge.patch |  435 +++++
 ...b-dell-Add-Latitude-E6430-Ivy-Bridge.patch |  826 ---------
 ...dell-Add-Latitude-E6520-Sandy-Bridge.patch |  449 +++++
 ...t-use-github-for-the-acpica-download.patch |   39 -
 ...dell-Add-Latitude-E5520-Sandy-Bridge.patch |  442 +++++
 ...dell-Add-Latitude-E5420-Sandy-Bridge.patch |  442 +++++
 ...dell-Add-Latitude-E6320-Sandy-Bridge.patch |  435 +++++
 ...dell-Add-Latitude-E6220-Sandy-Bridge.patch |  438 +++++
 ...b-dell-Add-Latitude-E6330-Ivy-Bridge.patch |  436 +++++
 ...b-dell-Add-Latitude-E6530-Ivy-Bridge.patch |  792 ---------
 ...b-dell-Add-Latitude-E6230-Ivy-Bridge.patch |  440 +++++
 ...se-dell-e6530-to-newer-coreboot-code.patch |  145 --
 ...able-coreboot-related-BL31-features.patch} |    8 +-
 ...-disable-the-ME-device-in-devicetree.patch |   54 -
 ...0029-use-own-mirror-for-acpica-files.patch |   29 +
 ...ram-allocation-on-more-intel-boards.patch} |   52 +-
 ...e6430-use-ME-Soft-Temporary-Disable.patch} |   12 +-
 ...d-OptiPlex-7020-9020-port_cb55232_31.patch |  923 ----------
 ...dell-Add-Latitude-E6420-Sandy-Bridge.patch |  774 --------
 ...mirrorservice.org-for-gcc-downloads.patch} |    8 +-
 ...dell-Add-Latitude-E6520-Sandy-Bridge.patch |  773 --------
 ...b-hp-Add-Compaq-Elite-8300-CMT-port.patch} |   61 +-
 ...b-dell-Add-Latitude-E5530-Ivy-Bridge.patch |  780 ---------
 ...ook-8560w-as-an-HP-Sandy-Ivy-Bridge-.patch | 1556 -----------------
 ...haswell-make-IOMMU-a-runtime-option.patch} |   36 +-
 ...iplex_9020-Disable-IOMMU-by-default.patch} |   10 +-
 ...-Add-MXM-System-Infomation-Structure.patch |   41 -
 ...-dell-Add-Latitude-E5520-Sandybridge.patch |  775 --------
 ...ully-disable-iGPU-when-dGPU-is-used.patch} |    8 +-
 ...-mec5035-Add-S3-suspend-SMI-handler.patch} |    6 +-
 ...dell-Add-Latitude-E5420-Sandy-Bridge.patch |  774 --------
 ...S3-SMI-handler-for-SNB-IVB-Latitudes.patch |   31 +
 ...x-sata-ports-on-dell-9020-sff-and-mt.patch |   66 -
 ...ck-policy-regs-when-disabling-IOMMU.patch} |    4 +-
 ...swell-Disable-iGPU-when-dGPU-is-used.patch |   54 -
 ..._9020-Implement-late-HWM-initializat.patch |  602 -------
 ...x_9020-Add-support-for-TPM1.2-device.patch |   49 -
 .../patches/0044-hp-8560w-turn-on-wifi.patch  |   47 -
 ...S3-SMI-handler-for-SNB-IVB-Latitudes.patch |  133 --
 config/coreboot/default/target.cfg            |    2 +-
 .../e5420_6mb/config/libgfxinit_corebootfb    |   64 +-
 .../e5420_6mb/config/libgfxinit_txtmode       |   64 +-
 .../e5520_6mb/config/libgfxinit_corebootfb    |   64 +-
 .../e5520_6mb/config/libgfxinit_txtmode       |   64 +-
 .../e5530_12mb/config/libgfxinit_corebootfb   |   64 +-
 .../e5530_12mb/config/libgfxinit_txtmode      |   64 +-
 .../e6420_10mb/config/libgfxinit_corebootfb   |   64 +-
 .../e6420_10mb/config/libgfxinit_txtmode      |   64 +-
 .../e6430_12mb/config/libgfxinit_corebootfb   |   64 +-
 .../e6430_12mb/config/libgfxinit_txtmode      |   64 +-
 .../e6520_10mb/config/libgfxinit_corebootfb   |   64 +-
 .../e6520_10mb/config/libgfxinit_txtmode      |   64 +-
 .../e6530_12mb/config/libgfxinit_corebootfb   |   64 +-
 .../e6530_12mb/config/libgfxinit_txtmode      |   64 +-
 .../g43t_am3/config/libgfxinit_txtmode        |   36 +-
 .../g43t_am3_16mb/config/libgfxinit_txtmode   |   36 +-
 .../ga_g41m_es2l/config/libgfxinit_txtmode    |   37 +-
 .../gru_bob/config/libgfxinit_corebootfb      |  131 +-
 .../gru_kevin/config/libgfxinit_corebootfb    |  131 +-
 .../hp2170p_16mb/config/libgfxinit_corebootfb |   39 +-
 .../hp2170p_16mb/config/libgfxinit_txtmode    |   39 +-
 .../hp2560p_8mb/config/libgfxinit_corebootfb  |   40 +-
 .../hp2560p_8mb/config/libgfxinit_txtmode     |   40 +-
 .../hp2570p_16mb/config/libgfxinit_corebootfb |   40 +-
 .../hp2570p_16mb/config/libgfxinit_txtmode    |   40 +-
 .../config/libgfxinit_corebootfb              |   39 +-
 .../hp8200sff_4mb/config/libgfxinit_txtmode   |   39 +-
 .../config/libgfxinit_corebootfb              |   39 +-
 .../hp8200sff_8mb/config/libgfxinit_txtmode   |   39 +-
 .../hp820g2_12mb/config/libgfxinit_corebootfb |   32 +-
 .../hp820g2_12mb/config/libgfxinit_txtmode    |   32 +-
 .../config/libgfxinit_corebootfb              |   38 +-
 .../hp8300cmt_16mb/config/libgfxinit_txtmode  |   38 +-
 .../config/libgfxinit_corebootfb              |   38 +-
 .../hp8300usdt_16mb/config/libgfxinit_txtmode |   38 +-
 .../config/libgfxinit_corebootfb              |   40 +-
 .../config/libgfxinit_txtmode                 |   40 +-
 .../config/libgfxinit_corebootfb              |   39 +-
 .../config/libgfxinit_txtmode                 |   39 +-
 config/coreboot/hp8560w_8mb/config/normal     |   39 +-
 .../hp9470m_16mb/config/libgfxinit_corebootfb |   40 +-
 .../hp9470m_16mb/config/libgfxinit_txtmode    |   40 +-
 .../config/libgfxinit_corebootfb              |   32 +-
 .../config/libgfxinit_corebootfb              |   38 +-
 .../qemu_x86_12mb/config/libgfxinit_txtmode   |   34 +-
 .../r400_16mb/config/libgfxinit_corebootfb    |   38 +-
 .../r400_16mb/config/libgfxinit_txtmode       |   38 +-
 .../r400_4mb/config/libgfxinit_corebootfb     |   38 +-
 .../r400_4mb/config/libgfxinit_txtmode        |   38 +-
 .../r400_8mb/config/libgfxinit_corebootfb     |   38 +-
 .../r400_8mb/config/libgfxinit_txtmode        |   38 +-
 .../r500_4mb/config/libgfxinit_corebootfb     |   38 +-
 .../r500_4mb/config/libgfxinit_txtmode        |   38 +-
 .../t1650_12mb/config/libgfxinit_txtmode      |   57 +-
 .../t400_16mb/config/libgfxinit_corebootfb    |   38 +-
 .../t400_16mb/config/libgfxinit_txtmode       |   38 +-
 .../t400_4mb/config/libgfxinit_corebootfb     |   38 +-
 .../t400_4mb/config/libgfxinit_txtmode        |   38 +-
 .../t400_8mb/config/libgfxinit_corebootfb     |   38 +-
 .../t400_8mb/config/libgfxinit_txtmode        |   38 +-
 .../t420_8mb/config/libgfxinit_corebootfb     |   41 +-
 .../t420s_8mb/config/libgfxinit_corebootfb    |   41 +-
 .../t420s_8mb/config/libgfxinit_txtmode       |   41 +-
 .../t430_12mb/config/libgfxinit_corebootfb    |   41 +-
 .../t430_12mb/config/libgfxinit_txtmode       |   41 +-
 .../t500_16mb/config/libgfxinit_corebootfb    |   38 +-
 .../t500_16mb/config/libgfxinit_txtmode       |   38 +-
 .../t500_4mb/config/libgfxinit_corebootfb     |   38 +-
 .../t500_4mb/config/libgfxinit_txtmode        |   38 +-
 .../t500_8mb/config/libgfxinit_corebootfb     |   38 +-
 .../t500_8mb/config/libgfxinit_txtmode        |   38 +-
 .../t520_8mb/config/libgfxinit_corebootfb     |   41 +-
 .../t520_8mb/config/libgfxinit_txtmode        |   41 +-
 .../t530_12mb/config/libgfxinit_corebootfb    |   40 +-
 .../t530_12mb/config/libgfxinit_txtmode       |   40 +-
 .../w500_16mb/config/libgfxinit_corebootfb    |   38 +-
 .../w500_16mb/config/libgfxinit_txtmode       |   38 +-
 .../w500_4mb/config/libgfxinit_corebootfb     |   38 +-
 .../w500_4mb/config/libgfxinit_txtmode        |   38 +-
 .../w500_8mb/config/libgfxinit_corebootfb     |   38 +-
 .../w500_8mb/config/libgfxinit_txtmode        |   38 +-
 .../w530_12mb/config/libgfxinit_corebootfb    |   40 +-
 .../w530_12mb/config/libgfxinit_txtmode       |   40 +-
 .../x200_16mb/config/libgfxinit_corebootfb    |   38 +-
 .../x200_16mb/config/libgfxinit_txtmode       |   38 +-
 .../x200_4mb/config/libgfxinit_corebootfb     |   38 +-
 .../x200_4mb/config/libgfxinit_txtmode        |   38 +-
 .../x200_8mb/config/libgfxinit_corebootfb     |   38 +-
 .../x200_8mb/config/libgfxinit_txtmode        |   38 +-
 .../x220_8mb/config/libgfxinit_corebootfb     |   41 +-
 .../x220_8mb/config/libgfxinit_txtmode        |   41 +-
 .../x230_12mb/config/libgfxinit_corebootfb    |   41 +-
 .../x230_12mb/config/libgfxinit_txtmode       |   41 +-
 .../x230_16mb/config/libgfxinit_corebootfb    |   41 +-
 .../x230_16mb/config/libgfxinit_txtmode       |   41 +-
 .../x230t_12mb/config/libgfxinit_corebootfb   |   41 +-
 .../x230t_12mb/config/libgfxinit_txtmode      |   41 +-
 .../x230t_16mb/config/libgfxinit_corebootfb   |   41 +-
 .../x230t_16mb/config/libgfxinit_txtmode      |   41 +-
 .../x301_16mb/config/libgfxinit_corebootfb    |   38 +-
 .../x301_16mb/config/libgfxinit_txtmode       |   38 +-
 .../x301_4mb/config/libgfxinit_corebootfb     |   38 +-
 .../x301_4mb/config/libgfxinit_txtmode        |   38 +-
 .../x301_8mb/config/libgfxinit_corebootfb     |   38 +-
 .../x301_8mb/config/libgfxinit_txtmode        |   38 +-
 .../default/R06_28_23.tar.gz/module.cfg       |    3 -
 .../acpica-unix-20230628.tar.gz/module.cfg    |    3 +
 .../default/arm-trusted-firmware/module.cfg   |    2 +-
 .../default/binutils-2.41.tar.xz/module.cfg   |    3 -
 .../default/binutils-2.42.tar.xz/module.cfg   |    3 +
 .../default/gcc-13.2.0.tar.xz/module.cfg      |    3 -
 .../default/gcc-14.1.0.tar.xz/module.cfg      |    3 +
 .../default/intel-microcode/module.cfg        |    2 +-
 .../coreboot/default/libgfxinit/module.cfg    |    2 +-
 config/submodule/coreboot/default/module.list |    8 +-
 .../default/nasm-2.16.01.tar.bz2/module.cfg   |    3 -
 .../default/nasm-2.16.03.tar.bz2/module.cfg   |    3 +
 .../coreboot/default/vboot/module.cfg         |    2 +-
 181 files changed, 7746 insertions(+), 11099 deletions(-)
 rename config/coreboot/default/patches/{0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch => 0013-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch} (82%)
 rename config/coreboot/default/patches/{0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch => 0014-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch} (90%)
 rename config/coreboot/default/patches/{0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch => 0015-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch} (97%)
 rename config/coreboot/default/patches/{0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch => 0016-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch} (86%)
 rename config/coreboot/default/patches/{0019-Remove-warning-for-coreboot-images-built-without-a-p.patch => 0017-Remove-warning-for-coreboot-images-built-without-a-p.patch} (86%)
 create mode 100644 config/coreboot/default/patches/0018-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
 create mode 100644 config/coreboot/default/patches/0019-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
 create mode 100644 config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
 delete mode 100644 config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch
 create mode 100644 config/coreboot/default/patches/0021-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
 delete mode 100644 config/coreboot/default/patches/0022-don-t-use-github-for-the-acpica-download.patch
 create mode 100644 config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch
 create mode 100644 config/coreboot/default/patches/0023-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
 create mode 100644 config/coreboot/default/patches/0024-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch
 create mode 100644 config/coreboot/default/patches/0025-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch
 create mode 100644 config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch
 delete mode 100644 config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
 create mode 100644 config/coreboot/default/patches/0027-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch
 delete mode 100644 config/coreboot/default/patches/0027-rebase-dell-e6530-to-newer-coreboot-code.patch
 rename config/coreboot/default/patches/{0021-HACK-Disable-coreboot-related-BL31-features.patch => 0028-HACK-Disable-coreboot-related-BL31-features.patch} (78%)
 delete mode 100644 config/coreboot/default/patches/0028-dell-e6-30-disable-the-ME-device-in-devicetree.patch
 create mode 100644 config/coreboot/default/patches/0029-use-own-mirror-for-acpica-files.patch
 rename config/coreboot/default/patches/{0023-crank-up-vram-allocation-on-more-intel-boards.patch => 0030-crank-up-vram-allocation-on-more-intel-boards.patch} (82%)
 rename config/coreboot/default/patches/{0024-dell-e6430-use-ME-Soft-Temporary-Disable.patch => 0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch} (59%)
 delete mode 100644 config/coreboot/default/patches/0031-mb-dell-Add-OptiPlex-7020-9020-port_cb55232_31.patch
 delete mode 100644 config/coreboot/default/patches/0032-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
 rename config/coreboot/default/patches/{0025-use-mirrorservice.org-for-gcc-downloads.patch => 0032-use-mirrorservice.org-for-gcc-downloads.patch} (85%)
 delete mode 100644 config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
 rename config/coreboot/default/patches/{0030-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch => 0033-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch} (96%)
 delete mode 100644 config/coreboot/default/patches/0034-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
 delete mode 100644 config/coreboot/default/patches/0034-mb-hp-Add-Elitebook-8560w-as-an-HP-Sandy-Ivy-Bridge-.patch
 rename config/coreboot/default/patches/{0036-nb-intel-haswell-make-IOMMU-a-runtime-option.patch => 0034-nb-intel-haswell-make-IOMMU-a-runtime-option.patch} (92%)
 rename config/coreboot/default/patches/{0037-dell-optiplex_9020-Disable-IOMMU-by-default.patch => 0035-dell-optiplex_9020-Disable-IOMMU-by-default.patch} (78%)
 delete mode 100644 config/coreboot/default/patches/0035-hp8560w-Add-MXM-System-Infomation-Structure.patch
 delete mode 100644 config/coreboot/default/patches/0035-mb-dell-Add-Latitude-E5520-Sandybridge.patch
 rename config/coreboot/default/patches/{0041-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch => 0036-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch} (85%)
 rename config/coreboot/default/patches/{0045-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch => 0037-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch} (96%)
 delete mode 100644 config/coreboot/default/patches/0038-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
 create mode 100644 config/coreboot/default/patches/0038-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch
 delete mode 100644 config/coreboot/default/patches/0039-fix-sata-ports-on-dell-9020-sff-and-mt.patch
 rename config/coreboot/default/patches/{0047-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch => 0039-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch} (93%)
 delete mode 100644 config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch
 delete mode 100644 config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
 delete mode 100644 config/coreboot/default/patches/0043-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
 delete mode 100644 config/coreboot/default/patches/0044-hp-8560w-turn-on-wifi.patch
 delete mode 100644 config/coreboot/default/patches/0046-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch
 delete mode 100644 config/submodule/coreboot/default/R06_28_23.tar.gz/module.cfg
 create mode 100644 config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg
 delete mode 100644 config/submodule/coreboot/default/binutils-2.41.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/default/gcc-13.2.0.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/default/nasm-2.16.01.tar.bz2/module.cfg
 create mode 100644 config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg

diff --git a/config/coreboot/d510mo/config/libgfxinit_txtmode b/config/coreboot/d510mo/config/libgfxinit_txtmode
index 3ae29835..34c747c2 100644
--- a/config/coreboot/d510mo/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -123,15 +124,17 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -144,14 +147,13 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_INTEL_ADLRVP_P is not set
 # CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_N is not set
 # CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_RPL is not set
@@ -159,7 +161,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
 # CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
 # CONFIG_BOARD_INTEL_ARCHERCITY_CRB is not set
+# CONFIG_BOARD_INTEL_AVENUECITY_CRB is not set
 # CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
+# CONFIG_BOARD_INTEL_BEECHNUTCITY_CRB is not set
 # CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
 
 #
@@ -204,13 +208,16 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,6 +257,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x80000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,7 +266,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +300,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,6 +378,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -457,6 +466,8 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -509,7 +520,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
index d2ec2b67..85f39cd7 100644
--- a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -123,15 +124,17 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -144,14 +147,13 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_INTEL_ADLRVP_P is not set
 # CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_N is not set
 # CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_RPL is not set
@@ -159,7 +161,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
 # CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
 # CONFIG_BOARD_INTEL_ARCHERCITY_CRB is not set
+# CONFIG_BOARD_INTEL_AVENUECITY_CRB is not set
 # CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
+# CONFIG_BOARD_INTEL_BEECHNUTCITY_CRB is not set
 # CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
 
 #
@@ -204,13 +208,16 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,6 +257,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x80000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,7 +266,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +300,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,6 +378,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -457,6 +466,8 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -509,7 +520,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode b/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode
index 6d2bcb8f..d019ca59 100644
--- a/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode
+++ b/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -124,15 +125,17 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_IRQ_SLOT_COUNT=18
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -145,14 +148,13 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_INTEL_ADLRVP_P is not set
 # CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_N is not set
 # CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_RPL is not set
@@ -160,7 +162,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
 # CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
 # CONFIG_BOARD_INTEL_ARCHERCITY_CRB is not set
+# CONFIG_BOARD_INTEL_AVENUECITY_CRB is not set
 # CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
+# CONFIG_BOARD_INTEL_BEECHNUTCITY_CRB is not set
 # CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
 
 #
@@ -202,14 +206,17 @@ CONFIG_BOARD_INTEL_D945GCLF=y
 # CONFIG_BOARD_INTEL_WTM2 is not set
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_512=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_512=y
@@ -249,6 +256,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -257,7 +265,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -292,6 +299,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -369,6 +377,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -451,6 +460,8 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -503,7 +514,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode b/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
index 1c7566ec..e3aa695c 100644
--- a/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -124,15 +125,17 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_IRQ_SLOT_COUNT=18
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -145,14 +148,13 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_INTEL_ADLRVP_P is not set
 # CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_N is not set
 # CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
 # CONFIG_BOARD_INTEL_ADLRVP_RPL is not set
@@ -160,7 +162,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
 # CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
 # CONFIG_BOARD_INTEL_ARCHERCITY_CRB is not set
+# CONFIG_BOARD_INTEL_AVENUECITY_CRB is not set
 # CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
+# CONFIG_BOARD_INTEL_BEECHNUTCITY_CRB is not set
 # CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
 
 #
@@ -202,14 +206,17 @@ CONFIG_BOARD_INTEL_D945GCLF=y
 # CONFIG_BOARD_INTEL_WTM2 is not set
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_512=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -249,6 +256,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -257,7 +265,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -292,6 +299,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -369,6 +377,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -451,6 +460,8 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -503,7 +514,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch b/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
index d2bae2e4..8bbffb53 100644
--- a/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
+++ b/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
@@ -1,7 +1,7 @@
-From 1195c954a3b6822e5e843067251c0c80c9520eab Mon Sep 17 00:00:00 2001
+From 2d9f38a12b883e1ddcdae5de107f204e522146e2 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@retroboot.org>
 Date: Fri, 19 Mar 2021 05:54:58 +0000
-Subject: [PATCH 01/30] apple/macbook21: Set default VRAM to 64MiB instead of
+Subject: [PATCH 01/39] apple/macbook21: Set default VRAM to 64MiB instead of
  8MiB
 
 ---
@@ -9,10 +9,10 @@ Subject: [PATCH 01/30] apple/macbook21: Set default VRAM to 64MiB instead of
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/src/mainboard/apple/macbook21/cmos.default b/src/mainboard/apple/macbook21/cmos.default
-index cf1bc4566e..dc0df3b6d6 100644
+index b744b11cda..9749e26547 100644
 --- a/src/mainboard/apple/macbook21/cmos.default
 +++ b/src/mainboard/apple/macbook21/cmos.default
-@@ -5,4 +5,4 @@ boot_devices=''
+@@ -7,4 +7,4 @@ boot_devices=''
  boot_default=0x40
  cmos_defaults_loaded=Yes
  lpt=Enable
diff --git a/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch b/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
index 8cd272ec..b163d5d2 100644
--- a/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
+++ b/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
@@ -1,7 +1,7 @@
-From 50a52cea2b43e6e407b456c082e908c7d29e090b Mon Sep 17 00:00:00 2001
+From e60ec1c7304e3f167fd2bf762f28b7eacd0b169a Mon Sep 17 00:00:00 2001
 From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
 Date: Wed, 27 Oct 2021 13:36:01 +0200
-Subject: [PATCH 02/30] add c3 and clockgen to apple/macbook21
+Subject: [PATCH 02/39] add c3 and clockgen to apple/macbook21
 
 ---
  src/mainboard/apple/macbook21/Kconfig       |  1 +
@@ -10,10 +10,10 @@ Subject: [PATCH 02/30] add c3 and clockgen to apple/macbook21
  3 files changed, 20 insertions(+)
 
 diff --git a/src/mainboard/apple/macbook21/Kconfig b/src/mainboard/apple/macbook21/Kconfig
-index 5f5ffde588..27377b737c 100644
+index 330d8efae2..cf10343554 100644
 --- a/src/mainboard/apple/macbook21/Kconfig
 +++ b/src/mainboard/apple/macbook21/Kconfig
-@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
+@@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS
  	select HAVE_ACPI_TABLES
  	select HAVE_ACPI_RESUME
  	select I945_LVDS
diff --git a/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch b/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
index 34e12a6b..8bf9a049 100644
--- a/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
+++ b/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
@@ -1,7 +1,7 @@
-From ca4cd66f411247395a323e5ea1abf09e83057827 Mon Sep 17 00:00:00 2001
+From 9a0157b1459365cf52f90e66b78dd6b60a259587 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@osboot.org>
 Date: Sun, 3 Jan 2021 03:34:01 +0000
-Subject: [PATCH 03/30] lenovo/x60: 64MiB Video RAM changed to default
+Subject: [PATCH 03/39] lenovo/x60: 64MiB Video RAM changed to default
  (previously it was 8MiB)
 
 ---
@@ -9,10 +9,10 @@ Subject: [PATCH 03/30] lenovo/x60: 64MiB Video RAM changed to default
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/src/mainboard/lenovo/x60/cmos.default b/src/mainboard/lenovo/x60/cmos.default
-index 5c3576d1f3..88170a1aab 100644
+index 58825c8a36..8e0aaf427d 100644
 --- a/src/mainboard/lenovo/x60/cmos.default
 +++ b/src/mainboard/lenovo/x60/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
+@@ -17,4 +17,4 @@ trackpoint=Enable
  sticky_fn=Disable
  power_management_beeps=Enable
  low_battery_beep=Enable
diff --git a/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch b/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
index ee90dd63..80f3023d 100644
--- a/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
+++ b/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
@@ -1,17 +1,17 @@
-From eca0f4a3a4d6907e92b948547a362ca0ac3fc382 Mon Sep 17 00:00:00 2001
+From 5b2a26e72bce37f7b0a92f1ed93fd607cea8de9b Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@osboot.org>
 Date: Mon, 22 Feb 2021 22:16:59 +0000
-Subject: [PATCH 04/30] lenovo/t60: make 64MiB VRAM the default in cmos.default
+Subject: [PATCH 04/39] lenovo/t60: make 64MiB VRAM the default in cmos.default
 
 ---
  src/mainboard/lenovo/t60/cmos.default | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/src/mainboard/lenovo/t60/cmos.default b/src/mainboard/lenovo/t60/cmos.default
-index af865f16da..7f03157df7 100644
+index 283a5747ee..91f6c0e6e2 100644
 --- a/src/mainboard/lenovo/t60/cmos.default
 +++ b/src/mainboard/lenovo/t60/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
+@@ -17,4 +17,4 @@ trackpoint=Enable
  sticky_fn=Disable
  power_management_beeps=Enable
  low_battery_beep=Enable
diff --git a/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch b/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch
index 35d74c75..2140071d 100644
--- a/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch
+++ b/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch
@@ -1,7 +1,7 @@
-From 2eae87815675aebd472b6042777fe51279be4550 Mon Sep 17 00:00:00 2001
+From 945d84782e706e8f3effab57edca68d9463d21fc Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:10:33 +0100
-Subject: [PATCH 05/30] lenovo/t400: set VRAM to 256MiB VRAM by default
+Subject: [PATCH 05/39] lenovo/t400: set VRAM to 256MiB VRAM by default
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -9,10 +9,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/src/mainboard/lenovo/t400/cmos.default b/src/mainboard/lenovo/t400/cmos.default
-index a326e315b1..b907a3e2df 100644
+index a16d386dd1..e7bb32306c 100644
 --- a/src/mainboard/lenovo/t400/cmos.default
 +++ b/src/mainboard/lenovo/t400/cmos.default
-@@ -13,4 +13,4 @@ power_management_beeps=Enable
+@@ -15,4 +15,4 @@ power_management_beeps=Enable
  low_battery_beep=Enable
  sata_mode=AHCI
  hybrid_graphics_mode=Integrated Only
diff --git a/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch b/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch
index cc6abb00..07434470 100644
--- a/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch
+++ b/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch
@@ -1,7 +1,7 @@
-From f6b4913a5eca619b745d5ccea9af022a54fb185b Mon Sep 17 00:00:00 2001
+From 112470b4f7b046ec2656699336211ba63ff448fa Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:11:59 +0100
-Subject: [PATCH 06/30] lenovo/x200: set VRAM to 256MiB by default
+Subject: [PATCH 06/39] lenovo/x200: set VRAM to 256MiB by default
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -9,10 +9,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/src/mainboard/lenovo/x200/cmos.default b/src/mainboard/lenovo/x200/cmos.default
-index bb4323836e..458b3f19c5 100644
+index 434af5d227..443ef54e41 100644
 --- a/src/mainboard/lenovo/x200/cmos.default
 +++ b/src/mainboard/lenovo/x200/cmos.default
-@@ -12,4 +12,4 @@ sticky_fn=Disable
+@@ -14,4 +14,4 @@ sticky_fn=Disable
  power_management_beeps=Enable
  low_battery_beep=Enable
  sata_mode=AHCI
diff --git a/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch b/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch
index c4840ecc..ad619606 100644
--- a/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch
+++ b/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch
@@ -1,7 +1,7 @@
-From a3a0969075163be413f968b03671aa5d8662672a Mon Sep 17 00:00:00 2001
+From 37418629a56cb740cae2870317458ea52daad8c9 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:18:26 +0100
-Subject: [PATCH 07/30] gigabyte/ga-g41m-es2l: set VRAM to 256MiB by default
+Subject: [PATCH 07/39] gigabyte/ga-g41m-es2l: set VRAM to 256MiB by default
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -9,10 +9,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default b/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
-index 8372032119..bedad54d2a 100644
+index fe79c83570..4a1f97a9d8 100644
 --- a/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
 +++ b/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
-@@ -2,4 +2,4 @@ boot_option=Fallback
+@@ -4,4 +4,4 @@ boot_option=Fallback
  debug_level=Debug
  power_on_after_fail=Enable
  nmi=Enable
diff --git a/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch b/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch
index 19977870..e0ac6cf1 100644
--- a/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch
+++ b/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch
@@ -1,7 +1,7 @@
-From 223ac17617b3a0c08925abbbe42d0d003e144a28 Mon Sep 17 00:00:00 2001
+From e785387dffe382a02d4c0cb006cced48c235484c Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:21:39 +0100
-Subject: [PATCH 08/30] acer/g43t-am3: set VRAM to 256MiB by default
+Subject: [PATCH 08/39] acer/g43t-am3: set VRAM to 256MiB by default
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -9,10 +9,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/src/mainboard/acer/g43t-am3/cmos.default b/src/mainboard/acer/g43t-am3/cmos.default
-index 706f5dd551..e8b45ea22c 100644
+index 23f0e55f3e..8d6c4db1ce 100644
 --- a/src/mainboard/acer/g43t-am3/cmos.default
 +++ b/src/mainboard/acer/g43t-am3/cmos.default
-@@ -3,4 +3,4 @@ debug_level=Debug
+@@ -5,4 +5,4 @@ debug_level=Debug
  power_on_after_fail=Disable
  nmi=Enable
  sata_mode=AHCI
diff --git a/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch b/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch
index 332b870e..f655f93c 100644
--- a/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch
+++ b/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch
@@ -1,7 +1,7 @@
-From 80ebbfef42454ea0911e5fc3858103d905987ed8 Mon Sep 17 00:00:00 2001
+From 3659aec797baa40e4336e88361a705295fb72b0f Mon Sep 17 00:00:00 2001
 From: persmule <persmule@gmail.com>
 Date: Sun, 31 Oct 2021 23:33:26 +0000
-Subject: [PATCH 09/30] lenovo/t400: Enable all SATA ports
+Subject: [PATCH 09/39] lenovo/t400: Enable all SATA ports
 
 There are 2 SATA ports on the chassis of t400(s), but at least one dock for
 t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
diff --git a/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch b/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch
index 12917ed8..db6d64f8 100644
--- a/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch
+++ b/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch
@@ -1,7 +1,7 @@
-From 318a97c284f8d5030100476a32516ddc9e51603d Mon Sep 17 00:00:00 2001
+From 820c2d64a7415f7159fd7cdac4746049c91f89a2 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 20 Dec 2021 01:29:31 +0000
-Subject: [PATCH 10/30] coreboot: Add Lenovo X230 patch: gfx_uma_size 224M by
+Subject: [PATCH 10/39] coreboot: Add Lenovo X230 patch: gfx_uma_size 224M by
  default
 
 ---
@@ -9,10 +9,10 @@ Subject: [PATCH 10/30] coreboot: Add Lenovo X230 patch: gfx_uma_size 224M by
  1 file changed, 1 insertion(+)
 
 diff --git a/src/mainboard/lenovo/x230/cmos.default b/src/mainboard/lenovo/x230/cmos.default
-index 7314066c2b..2e315d4521 100644
+index 732e214b32..3bb78960b9 100644
 --- a/src/mainboard/lenovo/x230/cmos.default
 +++ b/src/mainboard/lenovo/x230/cmos.default
-@@ -16,3 +16,4 @@ backlight=Both
+@@ -18,3 +18,4 @@ backlight=Both
  usb_always_on=Disable
  f1_to_f12_as_primary=Enable
  me_state=Normal
diff --git a/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch b/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
index dc3a33ca..868b65d5 100644
--- a/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
+++ b/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
@@ -1,7 +1,7 @@
-From 47afbe8b94edd1ff58c1daf0bda020e6afac35f4 Mon Sep 17 00:00:00 2001
+From 6bc13399517009917538cd4ddb426c4b1550bfad Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 3 Jan 2022 19:06:22 +0000
-Subject: [PATCH 11/30] lenovo/x230: set me_state=Disabled in cmos.default
+Subject: [PATCH 11/39] lenovo/x230: set me_state=Disabled in cmos.default
 
 I only recently found out about this. It's possible to use me_cleaner to
 do the same thing, but some people might just flash coreboot and not do
@@ -23,10 +23,10 @@ Date:   Thu Nov 21 21:47:31 2019 +0300
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/src/mainboard/lenovo/x230/cmos.default b/src/mainboard/lenovo/x230/cmos.default
-index 2e315d4521..3585cbd58b 100644
+index 3bb78960b9..ae47202aac 100644
 --- a/src/mainboard/lenovo/x230/cmos.default
 +++ b/src/mainboard/lenovo/x230/cmos.default
-@@ -15,5 +15,5 @@ trackpoint=Enable
+@@ -17,5 +17,5 @@ trackpoint=Enable
  backlight=Both
  usb_always_on=Disable
  f1_to_f12_as_primary=Enable
diff --git a/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch b/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch
index 49f4db9b..09981df8 100644
--- a/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch
+++ b/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch
@@ -1,7 +1,7 @@
-From 531ef34ece796f38cb8a13a54856e46e79842e29 Mon Sep 17 00:00:00 2001
+From 72c9e1403fb93c025be75536f5520e2ef9d4da9e Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Wed, 2 Mar 2022 21:50:01 +0000
-Subject: [PATCH 12/30] set me_state=Disabled on all cmos.default files!
+Subject: [PATCH 12/39] set me_state=Disabled on all cmos.default files!
 
 yeah. why the hell isn't this the default
 
@@ -20,99 +20,101 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  10 files changed, 10 insertions(+), 10 deletions(-)
 
 diff --git a/src/mainboard/lenovo/l520/cmos.default b/src/mainboard/lenovo/l520/cmos.default
-index 681c40e78b..57cdcf9162 100644
+index be08e0a342..b8970efa46 100644
 --- a/src/mainboard/lenovo/l520/cmos.default
 +++ b/src/mainboard/lenovo/l520/cmos.default
-@@ -14,4 +14,4 @@ sticky_fn=Disable
+@@ -16,4 +16,4 @@ sticky_fn=Disable
  trackpoint=Enable
  backlight=Both
  usb_always_on=Disable
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/lenovo/t420/cmos.default b/src/mainboard/lenovo/t420/cmos.default
-index 8244071b8a..c011867916 100644
+index 6fd26c5fe3..27a62d07b3 100644
 --- a/src/mainboard/lenovo/t420/cmos.default
 +++ b/src/mainboard/lenovo/t420/cmos.default
-@@ -14,4 +14,4 @@ sticky_fn=Disable
+@@ -16,4 +16,4 @@ sticky_fn=Disable
  trackpoint=Enable
  hybrid_graphics_mode=Integrated Only
  usb_always_on=Disable
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/lenovo/t420s/cmos.default b/src/mainboard/lenovo/t420s/cmos.default
-index 8244071b8a..c011867916 100644
+index 6fd26c5fe3..27a62d07b3 100644
 --- a/src/mainboard/lenovo/t420s/cmos.default
 +++ b/src/mainboard/lenovo/t420s/cmos.default
-@@ -14,4 +14,4 @@ sticky_fn=Disable
+@@ -16,4 +16,4 @@ sticky_fn=Disable
  trackpoint=Enable
  hybrid_graphics_mode=Integrated Only
  usb_always_on=Disable
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/lenovo/t430/cmos.default b/src/mainboard/lenovo/t430/cmos.default
-index 26795fe5cf..55e1e6c04e 100644
+index c896eadec1..6d1e172056 100644
 --- a/src/mainboard/lenovo/t430/cmos.default
 +++ b/src/mainboard/lenovo/t430/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
+@@ -17,4 +17,4 @@ trackpoint=Enable
  backlight=Both
  usb_always_on=Disable
  hybrid_graphics_mode=Integrated Only
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/lenovo/t430s/cmos.default b/src/mainboard/lenovo/t430s/cmos.default
-index 52dbf70377..b16800ca9e 100644
+index 286fb0ae8c..5a05c73721 100644
 --- a/src/mainboard/lenovo/t430s/cmos.default
 +++ b/src/mainboard/lenovo/t430s/cmos.default
-@@ -16,4 +16,4 @@ backlight=Both
+@@ -18,4 +18,4 @@ backlight=Both
  enable_dual_graphics=Disable
  usb_always_on=Disable
  f1_to_f12_as_primary=Enable
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/lenovo/t520/cmos.default b/src/mainboard/lenovo/t520/cmos.default
-index cf79b391e2..b66f7034dc 100644
+index 4857f92f67..ab1be1a678 100644
 --- a/src/mainboard/lenovo/t520/cmos.default
 +++ b/src/mainboard/lenovo/t520/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
+@@ -17,4 +17,4 @@ trackpoint=Enable
  backlight=Both
  hybrid_graphics_mode=Integrated Only
  usb_always_on=Disable
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/lenovo/t530/cmos.default b/src/mainboard/lenovo/t530/cmos.default
-index cf79b391e2..b66f7034dc 100644
+index 4857f92f67..ab1be1a678 100644
 --- a/src/mainboard/lenovo/t530/cmos.default
 +++ b/src/mainboard/lenovo/t530/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
+@@ -17,4 +17,4 @@ trackpoint=Enable
  backlight=Both
  hybrid_graphics_mode=Integrated Only
  usb_always_on=Disable
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/lenovo/x220/cmos.default b/src/mainboard/lenovo/x220/cmos.default
-index 6d1d57a795..52f303dfdb 100644
+index ef706c1303..b318ab9772 100644
 --- a/src/mainboard/lenovo/x220/cmos.default
 +++ b/src/mainboard/lenovo/x220/cmos.default
-@@ -13,4 +13,4 @@ usb_always_on=Disable
+@@ -15,4 +15,4 @@ usb_always_on=Disable
  fn_ctrl_swap=Disable
  sticky_fn=Disable
  trackpoint=Enable
 -me_state=Normal
 +me_state=Disabled
 diff --git a/src/mainboard/protectli/vault_cml/cmos.default b/src/mainboard/protectli/vault_cml/cmos.default
-index 62715bc6ba..129b5fd121 100644
+index d61046df6b..8c793fd1c3 100644
 --- a/src/mainboard/protectli/vault_cml/cmos.default
 +++ b/src/mainboard/protectli/vault_cml/cmos.default
-@@ -1,3 +1,3 @@
+@@ -2,4 +2,4 @@
+ 
  boot_option=Fallback
  debug_level=Debug
 -me_state=Enable
 +me_state=Disabled
 diff --git a/src/mainboard/system76/tgl-u/cmos.default b/src/mainboard/system76/tgl-u/cmos.default
-index 62715bc6ba..129b5fd121 100644
+index d61046df6b..8c793fd1c3 100644
 --- a/src/mainboard/system76/tgl-u/cmos.default
 +++ b/src/mainboard/system76/tgl-u/cmos.default
-@@ -1,3 +1,3 @@
+@@ -2,4 +2,4 @@
+ 
  boot_option=Fallback
  debug_level=Debug
 -me_state=Enable
diff --git a/config/coreboot/default/patches/0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/default/patches/0013-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
similarity index 82%
rename from config/coreboot/default/patches/0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
rename to config/coreboot/default/patches/0013-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
index a71324db..9d4270e7 100644
--- a/config/coreboot/default/patches/0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ b/config/coreboot/default/patches/0013-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -1,7 +1,7 @@
-From 158b79e6057e071d039619f617c112d31fb13f64 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
+From 70cf6905b54d39285025373dae1c897c9c727f83 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
 Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 15/30] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 13/39] util/ifdtool: add --nuke flag (all 0xFF on region)
 
 When this option is used, the region's contents are overwritten
 with all ones (0xFF).
@@ -16,14 +16,14 @@ Rebased since the last revision update in lbmk.
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
- util/ifdtool/ifdtool.c | 112 +++++++++++++++++++++++++++++------------
- 1 file changed, 81 insertions(+), 31 deletions(-)
+ util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
+ 1 file changed, 83 insertions(+), 31 deletions(-)
 
 diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index 191b3216de..38132b4a28 100644
+index 32b2081d93..1473cf058b 100644
 --- a/util/ifdtool/ifdtool.c
 +++ b/util/ifdtool/ifdtool.c
-@@ -1942,6 +1942,7 @@ static void print_usage(const char *name)
+@@ -2204,6 +2204,7 @@ static void print_usage(const char *name)
  	       "                                         tgl    - Tiger Lake\n"
  	       "                                         wbg    - Wellsburg\n"
  	       "   -S | --setpchstrap                    Write a PCH strap\n"
@@ -31,7 +31,7 @@ index 191b3216de..38132b4a28 100644
  	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
  	       "   -v | --version:                       print the version\n"
  	       "   -h | --help:                          print this help\n\n"
-@@ -1950,6 +1951,60 @@ static void print_usage(const char *name)
+@@ -2212,6 +2213,60 @@ static void print_usage(const char *name)
  	       "\n");
  }
  
@@ -92,15 +92,15 @@ index 191b3216de..38132b4a28 100644
  int main(int argc, char *argv[])
  {
  	int opt, option_index = 0;
-@@ -1957,6 +2012,7 @@ int main(int argc, char *argv[])
+@@ -2219,6 +2274,7 @@ int main(int argc, char *argv[])
  	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
  	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
  	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
 +	int mode_nuke = 0;
- 	int mode_gpr0_disable = 0;
+ 	int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
  	char *region_type_string = NULL, *region_fname = NULL;
  	const char *layout_fname = NULL;
-@@ -1990,6 +2046,7 @@ int main(int argc, char *argv[])
+@@ -2254,6 +2310,7 @@ int main(int argc, char *argv[])
  		{"validate", 0, NULL, 't'},
  		{"setpchstrap", 1, NULL, 'S'},
  		{"newvalue", 1, NULL, 'V'},
@@ -108,7 +108,7 @@ index 191b3216de..38132b4a28 100644
  		{0, 0, 0, 0}
  	};
  
-@@ -2039,35 +2096,8 @@ int main(int argc, char *argv[])
+@@ -2303,35 +2360,8 @@ int main(int argc, char *argv[])
  			region_fname++;
  			// Descriptor, BIOS, ME, GbE, Platform
  			// valid type?
@@ -141,12 +141,12 @@ index 191b3216de..38132b4a28 100644
 -			else if (!strcasecmp("PTT", region_type_string))
 -				region_type = 15;
 -			if (region_type == -1) {
-+                       if ((region_type =
-+                           get_region_type_string(region_type_string)) == -1) {
++			if ((region_type =
++			    get_region_type_string(region_type_string)) == -1) {
  				fprintf(stderr, "No such region type: '%s'\n\n",
  					region_type_string);
  				fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
-@@ -2236,6 +2266,22 @@ int main(int argc, char *argv[])
+@@ -2508,6 +2538,22 @@ int main(int argc, char *argv[])
  		case 't':
  			mode_validate = 1;
  			break;
@@ -169,31 +169,33 @@ index 191b3216de..38132b4a28 100644
  		case 'v':
  			print_version();
  			exit(EXIT_SUCCESS);
-@@ -2252,7 +2298,7 @@ int main(int argc, char *argv[])
+@@ -2524,7 +2570,8 @@ int main(int argc, char *argv[])
  	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
  			mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
  			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
--			mode_gpr0_disable) > 1) {
-+			mode_gpr0_disable + mode_nuke) > 1) {
+-			(mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) > 1) {
++			(mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
++			mode_nuke) > 1) {
  		fprintf(stderr, "You may not specify more than one mode.\n\n");
  		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
  		exit(EXIT_FAILURE);
-@@ -2261,7 +2307,7 @@ int main(int argc, char *argv[])
+@@ -2533,7 +2580,8 @@ int main(int argc, char *argv[])
  	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
  			mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
  			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
--			mode_validate + mode_gpr0_disable) == 0) {
-+			mode_validate + mode_gpr0_disable + mode_nuke) == 0) {
+-			mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) == 0) {
++			mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
++			mode_nuke) == 0) {
  		fprintf(stderr, "You need to specify a mode.\n\n");
  		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
  		exit(EXIT_FAILURE);
-@@ -2368,6 +2414,10 @@ int main(int argc, char *argv[])
+@@ -2646,6 +2694,10 @@ int main(int argc, char *argv[])
  		write_image(new_filename, image, size);
  	}
  
-+       if (mode_nuke) {
-+               nuke(new_filename, image, size, region_type);
-+       }
++	if (mode_nuke) {
++		nuke(new_filename, image, size, region_type);
++	}
 +
  	if (mode_altmedisable) {
  		struct fpsba *fpsba = find_fpsba(image, size);
diff --git a/config/coreboot/default/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch b/config/coreboot/default/patches/0014-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
similarity index 90%
rename from config/coreboot/default/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
rename to config/coreboot/default/patches/0014-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
index 279fdad1..bfcc486a 100644
--- a/config/coreboot/default/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
+++ b/config/coreboot/default/patches/0014-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
@@ -1,7 +1,7 @@
-From bb83e857a2e7b6ecb7cb476ba65019b14e68dc34 Mon Sep 17 00:00:00 2001
+From c53e5035b612710595abc93f0b4c3c65ca61ebad Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Wed, 1 Dec 2021 02:53:00 +0000
-Subject: [PATCH 16/30] fix speedstep on x200/t400: Revert
+Subject: [PATCH 14/39] fix speedstep on x200/t400: Revert
  "cpu/intel/model_1067x: enable PECI"
 
 This reverts commit 70fea013c7ebd6d85a7806748233fcfd76802f5f.
@@ -16,7 +16,7 @@ maintain this revert patch in Libreboot, from now on.
  1 file changed, 9 deletions(-)
 
 diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
-index 315e7c36fc..1423fd72bc 100644
+index d051e8915b..30ba2bf0c6 100644
 --- a/src/cpu/intel/model_1067x/model_1067x_init.c
 +++ b/src/cpu/intel/model_1067x/model_1067x_init.c
 @@ -141,8 +141,6 @@ static void configure_emttm_tables(void)
diff --git a/config/coreboot/default/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch b/config/coreboot/default/patches/0015-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
similarity index 97%
rename from config/coreboot/default/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
rename to config/coreboot/default/patches/0015-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
index 4e5f5089..4e0c8172 100644
--- a/config/coreboot/default/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
+++ b/config/coreboot/default/patches/0015-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
@@ -1,7 +1,7 @@
-From 8a94f38398b8fa554fa4ae53ecb88a372df634fd Mon Sep 17 00:00:00 2001
+From dabe942b006082f6e592a26f1d0f13a2586b53d6 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 17 Apr 2023 15:49:57 +0100
-Subject: [PATCH 17/30] GM45-type CPUs: don't enable alternative SMRR
+Subject: [PATCH 15/39] GM45-type CPUs: don't enable alternative SMRR
 
 This reverts the changes in coreboot revision:
 df7aecd92643d207feaf7fd840f8835097346644
@@ -42,7 +42,7 @@ Pragmatism is a good thing. I recommend it.
  5 files changed, 16 insertions(+), 26 deletions(-)
 
 diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
-index 1423fd72bc..d1f98ca43a 100644
+index 30ba2bf0c6..312046901a 100644
 --- a/src/cpu/intel/model_1067x/model_1067x_init.c
 +++ b/src/cpu/intel/model_1067x/model_1067x_init.c
 @@ -8,6 +8,7 @@
diff --git a/config/coreboot/default/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch b/config/coreboot/default/patches/0016-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
similarity index 86%
rename from config/coreboot/default/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
rename to config/coreboot/default/patches/0016-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
index bfc9231a..9ebeffa2 100644
--- a/config/coreboot/default/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
+++ b/config/coreboot/default/patches/0016-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
@@ -1,7 +1,7 @@
-From 2b899f40ce5d728faa7c1da23c3348435b7ac9cb Mon Sep 17 00:00:00 2001
+From 6426e07c7da50d588ee1ca30e0911040d89e4c96 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sat, 6 May 2023 15:53:41 -0600
-Subject: [PATCH 18/30] mb/dell/e6400: Enable 01.0 device in devicetree for
+Subject: [PATCH 16/39] mb/dell/e6400: Enable 01.0 device in devicetree for
  dGPU models
 
 Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
diff --git a/config/coreboot/default/patches/0019-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/default/patches/0017-Remove-warning-for-coreboot-images-built-without-a-p.patch
similarity index 86%
rename from config/coreboot/default/patches/0019-Remove-warning-for-coreboot-images-built-without-a-p.patch
rename to config/coreboot/default/patches/0017-Remove-warning-for-coreboot-images-built-without-a-p.patch
index 090f2629..b575453c 100644
--- a/config/coreboot/default/patches/0019-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ b/config/coreboot/default/patches/0017-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -1,7 +1,7 @@
-From 2ccd3e71730004c3ffbed178087cb778c170079e Mon Sep 17 00:00:00 2001
+From 29a654eaaa7bf924f9681a2520dbabfe12619269 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 19/30] Remove warning for coreboot images built without a
+Subject: [PATCH 17/39] Remove warning for coreboot images built without a
  payload
 
 I added this in upstream to prevent people from accidentally flashing
@@ -13,10 +13,10 @@ up. This has caused confusion and concern so just patch it out.
  1 file changed, 1 insertion(+), 12 deletions(-)
 
 diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
-index a2336aa876..4f1692a873 100644
+index 5f988dac1b..516133880f 100644
 --- a/payloads/Makefile.mk
 +++ b/payloads/Makefile.mk
-@@ -49,16 +49,5 @@ distclean-payloads:
+@@ -50,16 +50,5 @@ distclean-payloads:
  print-repo-info-payloads:
  	-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
  
diff --git a/config/coreboot/default/patches/0018-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch b/config/coreboot/default/patches/0018-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
new file mode 100644
index 00000000..bfcdb6cf
--- /dev/null
+++ b/config/coreboot/default/patches/0018-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
@@ -0,0 +1,430 @@
+From 892b6244c27590cbf1d82125340c57273e42b911 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Sat, 19 Aug 2023 16:19:10 -0600
+Subject: [PATCH 18/39] mb/dell: Add Latitude E6530 (Ivy Bridge)
+
+Mainboard is QALA0/LA-7761P (UMA). The version with a Nvidia dGPU was
+not tested. I do not physically have this system; someone with physical
+access to one sent me the output of autoport which I then modified to
+produce this port.
+
+I was also sent the vbios obtained using intel_bios_dumper while running
+version A22 of the vendor firmware, which I then processed using
+`intelvbttool --inoprom vbios.bin --outvbt data.vbt` to obtain data.vbt.
+
+This was originally tested and found to be working as a standalone board
+port in Libreboot, though this variant based port in upstream coreboot
+has not been tested.
+
+This can be internally flashed by sending a command to the EC, which
+causes the EC to pull the FDO pin low and the firmware to skip setting
+up any chipset based write protections [1]. The EC is the SMSC MEC5055,
+which seems to be compatible with the existing MEC5035 code.
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: I9fcd73416018574f8934962f92c8222d0101cb71
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig   |   8 +
+ .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
+ .../snb_ivb_latitude/variants/e6530/data.vbt  | Bin 0 -> 4280 bytes
+ .../variants/e6530/early_init.c               |  14 ++
+ .../snb_ivb_latitude/variants/e6530/gpio.c    | 192 ++++++++++++++++++
+ .../variants/e6530/hda_verb.c                 |  32 +++
+ .../variants/e6530/overridetree.cb            |  37 ++++
+ 7 files changed, 286 insertions(+)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index be9ac37845..03377275f0 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -23,6 +23,12 @@ config BOARD_DELL_LATITUDE_E6430
+ 	select MAINBOARD_USES_IFD_GBE_REGION
+ 	select SOUTHBRIDGE_INTEL_C216
+ 
++config BOARD_DELL_LATITUDE_E6530
++	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++	select BOARD_ROMSIZE_KB_12288
++	select MAINBOARD_USES_IFD_GBE_REGION
++	select SOUTHBRIDGE_INTEL_C216
++
+ if BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ 
+ config DRAM_RESET_GATE_GPIO
+@@ -33,6 +39,7 @@ config MAINBOARD_DIR
+ 
+ config MAINBOARD_PART_NUMBER
+ 	default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
++	default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
+ 
+ config OVERRIDE_DEVICETREE
+ 	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+@@ -42,6 +49,7 @@ config USBDEBUG_HCD_INDEX
+ 
+ config VARIANT_DIR
+ 	default "e6430" if BOARD_DELL_LATITUDE_E6430
++	default "e6530" if BOARD_DELL_LATITUDE_E6530
+ 
+ config VGA_BIOS_ID
+ 	default "8086,0166"
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index 183252630a..d89185d670 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -2,3 +2,6 @@
+ 
+ config BOARD_DELL_LATITUDE_E6430
+ 	bool "Latitude E6430"
++
++config BOARD_DELL_LATITUDE_E6530
++	bool "Latitude E6530"
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..af64a913d521fe240ce30e114e90fe75d3841bbc
+GIT binary patch
+literal 4280
+zcmdT{U2GiH75-*te`aTAcGqJQY$rA+e`ZbWcy_TDH@NC}cbl$*NjAn^RtPm->J7GV
+zY_m3jN`RN*h9FvG3Do9+qP$c^s1;PLB3@br9>Ag%La5?TLP`-2DDaR65U2_)=g!QU
+zIJ+cPr4+cc-@WIad+wQY&YW{+c1J!nPPgn&^^N3Hy*D37jg0=7CSl@*=mXr>x75gi
+zTMlK0$A=H4Mh~QKqCa92jz_;d3rtFqp(o-4gCnzxrJ2}Rw@^!haWp<ahv&+aDb5_3
+zE0-vq=pkms7Ves!pD#^PA#PF^_wjBTO=oC(ayR{asyKURiBdh3?x76Ll#Z5WXklvl
+z@M5XFK#OxUXqrdzedca+l4WK~_tG8Hv&HgsX`$Za3pnYy`CpW$@0?nsSh|}MrfK#j
+z%y^t^lPNt{p5INwGcz<MWEN<wv`{J^Eluv$Rb2&6%ZgV5Bp(6~Lz2Eoz~@C!!B)bs
+z1x-OrK~}*8L07Po(5+xZL6I<}phTEf5QRsVJYHa{f^AXPFaoSsnJ0feXUdB=CJ>Fv
+zr&_=Q6YubieL}zoiJ0a+c+(bGwFN5g1pz;^rGP1sM+lHB@UAPM2&F=RB&yv@$caXF
+ze~Io&3CQe=cMHr!e{yiokd?~p&F&k`jg99Ex7}WO=$8*Kx8wXv4eSa_CJqKVkyRr&
+zCdcqs*@M5!gD84e@fW{|5B#mDGTH;JFw`h^stQcTjf@V3pNe8&f$=NG?-+klRGea*
+zX1vOHi}4@EM~qJyfuM>e#%9J&Mjzt`j5OnB#;uGZ<1WTMj3vgSj3*esXZY{I`KqUa
+zfbB~~a>piTMAVDNyHR<{<v-=}gXhE(15|emxueb8Kv%5>0{F7}8pool{7_h6u?7yg
+zlyNm>-Eq_&WjW{0$9ZHq6x?~W8l2#1g0CyrtN#R-nbWG(?>iNG1zRiZgj;Lm_%rVe
+zwZ6i{g#sR5xudpbj~5H9TNIQ3gMikIG@l(Z4IR@^2|Vu|LZteLF5@$KH5`Pr&3_vn
+z^!Fn27&z6hSPR+*;D*&lm-)OE=ZgjK*(X&XdBq7RDUd7>|Lou?UMNg6lVCB;TPz{Z
+zN4-~p*Rr=uq8OYdlAy38{}dt5%2}aUax{}zWzDRgmsn2|!)=Bp)U35;Ld3H+Ye=*_
+z4S&0{5*TVI!OU-SWz$XUwrrnb%9?NHau^uhn>&;%&X#8O7mt)SIJr8D$u?NS=rUW6
+zCmnxV&FgUDAWX}gZ+1AH&-C4Q=3sl5RX9=OWPfCtcRZi4tkX44YYfRH*@?H7T=Kz=
+zG*i-wU2jbJMK%ChTMTXZFJEm~k;KCj*D60g=j!2ns8Q`g%jSRK^?=IwL^|I5-K2zH
+z8*A0-mL%Q`R#xatM^u^E=IrX+2&bc;3rv!NipS^G*6zlIRAV(JJDU($OBHuptd&1(
+zoNu>t*Q}|siS8#MYavR6j7&(~AEL#OaV(^+gy>YrSPiLfgy{2-p=xT2Mtd}4R8#XB
+z-LDysYw8J&{-GJKYwEiif07x7u5QsOr5oeA`ZJxDb>p|XdQzvCb>nSaeP1UfY_x~f
+z9bwuRHf|5Ahr{&iu<>+QeI`t=g^e>|^=z1;5o23K?TP5uo%2>aXQWCKr#dH;Qr0*j
+z3LecKKarw5`Xblzd$&H4oP%y&l3egyUc<=<Azs)*u}X^*n$F~s2O<-paSF?q*HB+n
+zqBfj5;J|x@hM`M(QD20jrkwi8`y3l;8qO;#l8A#CMI8Kg9E{ERsT>TGXaGC^5Cz)J
+z4?eb?Kub*nWYdmhV-4?j<o}k#pt-{wK;b3U(B^+`s7-`HYOZOxv<+RG^LulAxKL|9
+z3NH#9{Lg*7U1&gy<zHSG$;LMHby+V=ENlGFVLKjt%kkph7kP1M8|vebT=K5)*E>JW
+zjd{Tu*o*CE*QO)}{_J>haU5zn+1QJ^eBg|d5n5-%|DwS@1+<Mtvat=iZ3BF??pZXh
+zth4PnnWL*s%}k43fbe34>yaZ_2@Kj<UGt)`2G5>K>)nIBR-xB@+1PQ2*c$lV?Z13o
+zbX%CHpm`!1Z4$d28~9k{rfu-0w@xg6{q!u2{)Dm_))4RK$?#7P*t7V+g_9d<V!MD`
+zaj`t-?uy6zsjzp<-IdM6g(XhQX2iF<+p?Kmw6?a+f^VMex*PuetNfqf+4_FpD%8TW
+eZvUbDHC^NLu5~gtzg|!EqSkX2ep9pg!tpEeo1jDh
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c
+new file mode 100644
+index 0000000000..ff83db095b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c
+@@ -0,0 +1,14 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++void bootblock_mainboard_early_init(void)
++{
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++			| COMB_LPC_EN | COMA_LPC_EN);
++	mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/gpio.c
+new file mode 100644
+index 0000000000..777570765a
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/gpio.c
+@@ -0,0 +1,192 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_GPIO,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_GPIO,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_NATIVE,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio1 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio3 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_OUTPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio28 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++	.gpio30 = GPIO_RESET_RSMRST,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio8 = GPIO_INVERT,
++	.gpio13 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_GPIO,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_OUTPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio45 = GPIO_DIR_OUTPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_INPUT,
++	.gpio51 = GPIO_DIR_INPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio34 = GPIO_LEVEL_HIGH,
++	.gpio45 = GPIO_LEVEL_LOW,
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_GPIO,
++	.gpio71 = GPIO_MODE_GPIO,
++	.gpio72 = GPIO_MODE_NATIVE,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_NATIVE,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio68 = GPIO_DIR_INPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio70 = GPIO_DIR_INPUT,
++	.gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c
+new file mode 100644
+index 0000000000..3ebccff81d
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d76df,	/* Codec Vendor / Device ID: IDT */
++	0x10280535,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x10280535),
++	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
++	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++	0x80862806,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb
+new file mode 100644
+index 0000000000..8b9c82fba4
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb
+@@ -0,0 +1,37 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++	device domain 0 on
++		subsystemid 0x1028 0x0535 inherit
++
++		device ref igd on
++			register "gpu_cpu_backlight" = "0x00000251"
++			register "gpu_pch_backlight" = "0x13121312"
++		end
++
++		chip southbridge/intel/bd82x6x
++			register "usb_port_config" = "{
++				{ 1, 1, 0 },
++				{ 1, 1, 0 },
++				{ 1, 1, 1 },
++				{ 1, 1, 1 },
++				{ 1, 1, 2 },
++				{ 1, 1, 2 },
++				{ 1, 0, 3 },
++				{ 1, 1, 3 },
++				{ 1, 1, 4 },
++				{ 1, 1, 4 },
++				{ 1, 1, 5 },
++				{ 1, 1, 5 },
++				{ 1, 2, 6 },
++				{ 1, 2, 6 },
++			}"
++
++			device ref xhci on
++				register "superspeed_capable_ports" = "0x0000000f"
++				register "xhci_overcurrent_mapping" = "0x00000c03"
++				register "xhci_switchable_ports" = "0x0000000f"
++			end
++		end
++	end
++end
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0019-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch b/config/coreboot/default/patches/0019-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
new file mode 100644
index 00000000..97055b7c
--- /dev/null
+++ b/config/coreboot/default/patches/0019-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
@@ -0,0 +1,430 @@
+From 9b0766b86ac010b7edfe27d1f7edbb3f27dc742e Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Wed, 31 Jan 2024 22:57:07 -0700
+Subject: [PATCH 19/39] mb/dell: Add Latitude E5530 (Ivy Bridge)
+
+Mainboard is QXW10/LA-7902P (UMA). I do not physically have this board;
+someone with physical access to one sent me the output of autoport which
+I then modified to produce this port. I was also sent the VBT binary,
+which was obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running
+version A21 of the vendor firmware.
+
+This was originally tested and found to be working as a standalone board
+port in Libreboot, but this variant based port in upstream coreboot has
+not been tested.
+
+This can be internally flashed by sending a command to the EC, which
+causes the EC to pull the FDO pin low and the firmware to skip setting
+up any chipset based write protections [1]. The EC is the SMSC MEC5055,
+which seems to be compatible with the existing MEC5035 code.
+
+Change-Id: Idaf6618df70aa19d8e60b2263088737712dec5f0
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig   |   7 +
+ .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
+ .../snb_ivb_latitude/variants/e5530/data.vbt  | Bin 0 -> 6144 bytes
+ .../variants/e5530/early_init.c               |  14 ++
+ .../snb_ivb_latitude/variants/e5530/gpio.c    | 194 ++++++++++++++++++
+ .../variants/e5530/hda_verb.c                 |  32 +++
+ .../variants/e5530/overridetree.cb            |  39 ++++
+ 7 files changed, 289 insertions(+)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index 03377275f0..183a67bec3 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -17,6 +17,11 @@ config BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ 	select SYSTEM_TYPE_LAPTOP
+ 	select USE_NATIVE_RAMINIT
+ 
++config BOARD_DELL_LATITUDE_E5530
++	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++	select BOARD_ROMSIZE_KB_12288
++	select SOUTHBRIDGE_INTEL_C216
++
+ config BOARD_DELL_LATITUDE_E6430
+ 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ 	select BOARD_ROMSIZE_KB_12288
+@@ -38,6 +43,7 @@ config MAINBOARD_DIR
+ 	default "dell/snb_ivb_latitude"
+ 
+ config MAINBOARD_PART_NUMBER
++	default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
+ 	default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
+ 	default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
+ 
+@@ -48,6 +54,7 @@ config USBDEBUG_HCD_INDEX
+ 	default 2
+ 
+ config VARIANT_DIR
++	default "e5530" if BOARD_DELL_LATITUDE_E5530
+ 	default "e6430" if BOARD_DELL_LATITUDE_E6430
+ 	default "e6530" if BOARD_DELL_LATITUDE_E6530
+ 
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index d89185d670..c15ef4028f 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -1,5 +1,8 @@
+ ## SPDX-License-Identifier: GPL-2.0-only
+ 
++config BOARD_DELL_LATITUDE_E5530
++	bool "Latitude E5530"
++
+ config BOARD_DELL_LATITUDE_E6430
+ 	bool "Latitude E6430"
+ 
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..3c54b70be7856a6420d001112d7f17f8bab46ed3
+GIT binary patch
+literal 6144
+zcmeHKU2Gdg5dO}0w$JA~+qs02q)iz56C9e5vuQ#oL0l3O+%|395Q2peO{y4(2uX0t
+zuMja1N)bPb1cE+5)fYsCK!89MFQAGChyWpk5PuR<K|G+sLmxmOR4}u5=Rg`mj70g7
+zvgdDic6N4dW^QKhynd)>kS^cR)3#-(r*-?zo-O^C(kLvv8XM<+Y3tdt^YY!P?!oTe
+zJ^ed-x6w0Lh5fN#jsv5TWE#mtd*_yky}9xDK(kOwLt+C7_AQAd#iwr=o0`gvQZ`{x
+z6ZeT`x^^;8+a~jSa^o~PF@8J6N5;o#dhCwebaM;!_oisw1#O9K={qQM<@Oeu$lXeN
+z#wJGcW4Y<2)-A{Bot(NoKX%>qdnw-AOi9bKT9Z~HL5|7PJDHz4kGlEx143q+26EH6
+z{4KfB^9;?<fTOaiNPy%=@LovL&q<^d1Qdi+Xex9SvIM^ZLq%9cP{A1rE>#dw(WfA;
+zBCR3@pCS1a;A|CZW1h7H*l#mW{%y{bf)9ofiz!EHzyiac@{RpMzz>O-<~{hx5tw%b
+z3ZJWD4_g-`iF`tUJb}+Vfe;XI1T2Y4_Y!iVk<<T4ce(^PWKh<?N^a`t+}vgNr25iZ
+z`!fTBL)ojYF5G?3y|eW=`9>MLB9et&!A7LDDE7&5ye#|hn%s#IWgagDEPNHHMUhb-
+ztc9t?uz{bD#kh#kpsE;AO-wWHV?4olPStRPag^~k<737bjBgm<GlC%vRgBe)4U9I%
+zg^XUtcE**A5ylOSn;A2V2N;hso?--U#>t|ufS}_`LGs2bcSKCVBh4s0>G7ZR_@NWx
+zkph}GhP}~YR?roT!61GqzQ?gBsuv3jY}UXbmr|alv^VxUqbz5<`5=!hhpaa*7DK~4
+zP4ad6dhH!>nYpc4{J&G-w{UiWo$zXnTz{tAq0|?c_`QJ7pKmCwIpe7Uix$P?9}v*1
+z(aVR6OkMkQ6oM}*UC@j78!~>7=OZCVYXeu|u0SiI4}w$uw6&0P09LF%Hp}O&IA3gl
+z4@ap0NfAe+q(ZVm{Bwe*Do~kbCc$Q!x7b3Sk9tLgVmsR<Q4H=9Nl;mmf2xpY<*d*-
+z`yI_BR#`La=Oxxt#qgS`3pER^nh^CZ%*qlq2N9@uSAtz-C7AhduB_U|{>#oOrY`tq
+z%|?L!zRd2-$V6^@$H<Mj3MXf#F<J+^8%<X2{tnmQTI*aK*ageBrm9^|<Ked3j_s;%
+zva<(Dob)BOwdcj8Z67UhYUAjbk==Of9W#D7k!DJobLx$$fXD_wuZyD&Kk-$EIY~S`
+zan1ANbFUW8hZ0pUw5)y??*}!;chdgq|0X5;s;m`@YdY{zs4z#z8e;13T6b4tC7gy$
+zTwszEQhk0!U$`3=Qi)ZbY^*|bAyvF>@ml^iaX;uzoVB3JA(|h9tcNKXHdA43N0|18
+z&3$2QE=)(l=6qQDAWT1oO-<KoblR+&{kk@!)1A8ch^`&b>2=+FU)Mg<35IDJ+8Tp;
+z40F)Xt}$rVFdsLxLk7KRn4cKhmj<a3vp%A&kI>eLd38j)HbM_Y%!3i_aD?8An8za8
+z@d(AD=Gv&%5;e{}p%i?_q(T*^IwzEx*Eu1wKHV9=lVUvjqv!B@cWER!2fe%`IqO?q
+z!=Wf4kzGUaLX8`m#*P^uL?%M#6qc9Qu(YT|ZMb#7UzCc_(DkQYEG<G&Q*QkX`CS`I
+z8cwQnl8A#CMH~W79L&{2*Jof_MD5t{bPTAszWUa20yPzD=*wW8)wHSu?avDhffu^!
+zL>Q#%k_O0@^DN5S@MXi$D;acJ>#cTV-(U@Offv4ACp4hO4$Ll!WO)s3P4=t9vpWBC
+zSckhlcD?xUuX=Gx96Dx{IsQ23r&;o1*+^Cp2RA3nd$A-RIHP2Q7uitC>c67FIR*5}
+zB3a%B!?6K=TJ$W+SJv@*9Lms{mTvWmU4Zanj_Z*lSqOGISzYp?yawOqLhVhRt#-E6
+zd)YW~h&meh-5prIE}Cr&7f?MMi&cqTt_^%Fa?>k(=`9jVoIf@}{g+WX#TpWuc+!2v
+zPG^>A|NZ2GlGsKdGqN{7>Fr7+Hc_^3z}uBhC4?nzOQ*!QyVugGjkK_~$bvtfY`h79
+z9rOI3;Mt}9)_G{zXTAPw`8T@6=Ut0r9R5;0#Zy|#8F;v4^UAmqft3iXL|`QXD-l?U
+Jz~2*rUjdP?m;3+#
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c
+new file mode 100644
+index 0000000000..ff83db095b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c
+@@ -0,0 +1,14 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++void bootblock_mainboard_early_init(void)
++{
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++			| COMB_LPC_EN | COMA_LPC_EN);
++	mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/gpio.c
+new file mode 100644
+index 0000000000..0599f13921
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/gpio.c
+@@ -0,0 +1,194 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_GPIO,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_GPIO,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_GPIO,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_NATIVE,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio1 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio3 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio12 = GPIO_DIR_OUTPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_OUTPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio12 = GPIO_LEVEL_HIGH,
++	.gpio28 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++	.gpio30 = GPIO_RESET_RSMRST,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio8 = GPIO_INVERT,
++	.gpio13 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_GPIO,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_GPIO,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_INPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio45 = GPIO_DIR_INPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_INPUT,
++	.gpio51 = GPIO_DIR_INPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio53 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_GPIO,
++	.gpio71 = GPIO_MODE_GPIO,
++	.gpio72 = GPIO_MODE_NATIVE,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_GPIO,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio68 = GPIO_DIR_INPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio70 = GPIO_DIR_INPUT,
++	.gpio71 = GPIO_DIR_INPUT,
++	.gpio74 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c
+new file mode 100644
+index 0000000000..3e89a6d75f
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d76df,	/* Codec Vendor / Device ID: IDT */
++	0x1028053d,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x1028053d),
++	AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++	AZALIA_PIN_CFG(0, 0x11, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0xd5a301a0),
++
++	0x80862806,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb
+new file mode 100644
+index 0000000000..85c448d010
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb
+@@ -0,0 +1,39 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++	device domain 0 on
++		subsystemid 0x1028 0x053d inherit
++
++		device ref igd on
++			register "gpu_cpu_backlight" = "0x00000000"
++			register "gpu_pch_backlight" = "0x03d003d0"
++		end
++
++		chip southbridge/intel/bd82x6x
++			register "usb_port_config" = "{
++				{ 1, 1, 0 },
++				{ 1, 1, 0 },
++				{ 1, 1, 1 },
++				{ 1, 1, 1 },
++				{ 1, 1, 2 },
++				{ 1, 1, 2 },
++				{ 1, 1, 3 },
++				{ 1, 0, 3 },
++				{ 1, 2, 4 },
++				{ 1, 1, 4 },
++				{ 1, 1, 5 },
++				{ 1, 1, 5 },
++				{ 1, 0, 6 },
++				{ 1, 1, 6 },
++			}"
++
++			device ref xhci on
++				register "superspeed_capable_ports" = "0x0000000f"
++				register "xhci_overcurrent_mapping" = "0x00000c03"
++				register "xhci_switchable_ports" = "0x0000000f"
++			end
++			device ref gbe off end
++			device ref pcie_rp7 on end # BCM5761 Ethernet
++		end
++	end
++end
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch b/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
new file mode 100644
index 00000000..2f6629b2
--- /dev/null
+++ b/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
@@ -0,0 +1,435 @@
+From 5d8a651a71d19918130f58c637700539dd320789 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Sun, 26 Nov 2023 17:08:52 -0700
+Subject: [PATCH 20/39] mb/dell: Add Latitude E6420 (Sandy Bridge)
+
+Mainboard is PAL50/LA-6591P (UMA). The version with an Nvidia dGPU was
+not tested. I do not physically have this system; someone with physical
+access to one sent me the output of autoport which I then modified to
+produce this port. I was also sent the VBT binary, which was obtained
+from `/sys/kernel/debug/dri/0/i915_vbt` while running version A25 of the
+vendor firmware.
+
+This was originally tested and found to be working as a standalone board
+port in Libreboot, but this variant based port in upstream coreboot has
+not been tested.
+
+This can be internally flashed by sending a command to the EC, which
+causes the EC to pull the FDO pin low and the firmware to skip setting
+up any chipset based write protections [1]. The EC is the SMSC MEC5055,
+which seems to be compatible with the existing MEC5035 code.
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: Ic48d9ea58172a5b13958c8afebcb19c8929c4394
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig   |  13 +-
+ .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
+ .../snb_ivb_latitude/variants/e6420/data.vbt  | Bin 0 -> 6144 bytes
+ .../variants/e6420/early_init.c               |  14 ++
+ .../snb_ivb_latitude/variants/e6420/gpio.c    | 191 ++++++++++++++++++
+ .../variants/e6420/hda_verb.c                 |  32 +++
+ .../variants/e6420/overridetree.cb            |  35 ++++
+ 7 files changed, 287 insertions(+), 1 deletion(-)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index 183a67bec3..d2786970ee 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -17,6 +17,12 @@ config BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ 	select SYSTEM_TYPE_LAPTOP
+ 	select USE_NATIVE_RAMINIT
+ 
++config BOARD_DELL_LATITUDE_E6420
++	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++	select BOARD_ROMSIZE_KB_10240
++	select MAINBOARD_USES_IFD_GBE_REGION
++	select SOUTHBRIDGE_INTEL_BD82X6X
++
+ config BOARD_DELL_LATITUDE_E5530
+ 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ 	select BOARD_ROMSIZE_KB_12288
+@@ -43,6 +49,7 @@ config MAINBOARD_DIR
+ 	default "dell/snb_ivb_latitude"
+ 
+ config MAINBOARD_PART_NUMBER
++	default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
+ 	default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
+ 	default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
+ 	default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
+@@ -54,11 +61,15 @@ config USBDEBUG_HCD_INDEX
+ 	default 2
+ 
+ config VARIANT_DIR
++	default "e6420" if BOARD_DELL_LATITUDE_E6420
+ 	default "e5530" if BOARD_DELL_LATITUDE_E5530
+ 	default "e6430" if BOARD_DELL_LATITUDE_E6430
+ 	default "e6530" if BOARD_DELL_LATITUDE_E6530
+ 
+ config VGA_BIOS_ID
+-	default "8086,0166"
++	default "8086,0166" if BOARD_DELL_LATITUDE_E5530
++	default "8086,0126" if BOARD_DELL_LATITUDE_E6420
++	default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
++		|| BOARD_DELL_LATITUDE_E6530
+ 
+ endif
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index c15ef4028f..257d428a70 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -1,5 +1,8 @@
+ ## SPDX-License-Identifier: GPL-2.0-only
+ 
++config BOARD_DELL_LATITUDE_E6420
++	bool "Latitude E6420"
++
+ config BOARD_DELL_LATITUDE_E5530
+ 	bool "Latitude E5530"
+ 
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..d3662eea1bc78b60be6d0bd2cc38bb46b654afbd
+GIT binary patch
+literal 6144
+zcmeHKeQZ-z6hE);wSBvNZ|mO1=*HLC2BQN8uVX6{N9eY)75ORymb$R8!YYuAZEgeE
+zKk|S@Fen*n41W-viAF;r%)~^EkpLz-B{2q##)LmGAtoY;7*Qhv_1yPbw$TC$2}G0K
+z=6Ao&x#ym9?z!i_&TOh(kLzky2cN8MTpny#R<;VU4Rkn?rBIz(YL~BBw<%b&zGhSH
+z$~AQ>@D0d=Xx6RE0BwSxspWdrW9y<FZGD@&x3_JL;p$p!;!BVdcKLkht0=-%(Jj&T
+z_GkyztZ%>#t7^)^(T-R<7W?O6ZTI%A+j=`<Jw3Q%dk6N!da<_?7oyiU3)^<~_TiSk
+zE$y+=RK3PGQ`gzmXYPRBx>C|f*UP9{h|4>ANrAe~?ymV*)83AaT#FuTjP=C2cg5P~
+zt4w78r$t#300cWY_k)mevmAmFI3&oBfytoAAPQiYK$XEIgHwV@5-gJ-Q-*p8yfTDj
+zaDz=1Y!X1B3`OpQ&Ik}bM|0xHn0gYNZw0rT=7AXS2in-q8K^?)0|el+Z6geW7i7MM
+zv~!|>HqL-|Fk}EYOa@)R<X)VQ7c}d8R1b@RTn5rq(90|QRg0?wwZZz(6Dz}w>zg9Y
+z8;!mD_V*XSjT33~$`o`s>zEGBq8AQ`HaH?y!Fh2QiX1v@aCo4LaENf&DZ_cE2A2qb
+z5@cC}X)=S^1RvpXLWs~v*hqMau$!=t@B-mg!XV)|;eEm>!Z6`H;R4|&!d1d`f|S7^
+zli+B98*!TfPE&6~NVM5j3v{N3OTjpnm_L@BPh(}esd(J!gj?~iJP?n|OZZOiTqlql
+zg<NWR@g&-*W-E%A7|*1Z_`sVO$K&iAP+VIj9{<1hT%SXsK}IBk8!daftR`6-)EUiS
+zvv*HR(#-ZwhA~7wcmxbe4%E?Y7P0y{1q|nqR1L29UR8v@#No^g5MH)7!>{%-$T|cR
+zZx5|xm>Fl>;@$m};P{0WC>O~<Nl1`*PLgPN_hP2a^h+L$ls&SYrkDYr+&l*%%S?^Q
+ziPSdtHE<LNEnr7cs=ihL-C>-p>*$9CpHRLgN|POkqD^UP4nw|4nf0bc8MOBk<;%js
+zfpCAWNzqSPlz@X%j9CGrwZDKUl@K{g6pzqiIIARDQ)#@^RW&0pmNG;XZ?!SlHB?L#
+zKRAMgq(R;aQd%@Gy38-LS@ix)fR**(P3B9wI=Uk^&cWmmwB<vf21<0#LBA!;qtAh(
+zYe5g_T{+gw^mi8QzPPraBoH~8oCz%r=$nVi1A)`Y8IKqIdqm6MihqxtpFaTggaPxu
+zQP07nf#&kPkPp}Cmk$F1g7q7QK;kz~80i&oDN}~wYbPUI6AtG5H+$T!@f5FzUhp21
+z^XiPT3rb%B@sA9g!n88R7BOsLS|?+D3}0v3dyIX|@JFWo&e%<c#V)PV#g@7-=F*;V
+zvAr&Q+ogTvVxPM3XP5Smi`f;Nt7uCU)}Y`HMcbpW=M_AuXlE35PQl+4O{7m66&I@7
+zGL@}Sai^*sP}va`KTx$VRQ8REf2*1+lTFH0=UkNx+eN|1rVyipl)Du=h=@%w+iQZG
+zT6@-PdW^oyFb44AG`HMZWEnP{&OQ+jC`N4emoS)x;EPN}uaSFOf-Mn8JRRO&LTWJc
+zn6%=L94~PR)%Ua_HTZcfTXD<p{%8p|<N<;Efw$Zb4$}{m8@7c((~<7^thaau&@Wx#
+zVGNL)lmH@{o=h*{muXGc!;nXrVgpp3;1V1stMj=4AtxyzX+?SoB~zN}!*r?9Qvs1P
+zmV_(CTmt0sY&6=F=_M>E34GYvuh1uQF+BUdWyQC5SaEM1QvKlHBMs13C}n{0SwRxW
+ziekMa&kvRFruRcKCevGy5)TxUBDlur@E{TtQ^NQ>nO+Cgl)&Ga(PxqVW?e3TLH-UY
+zdL3T{z^xdd`$(STFUb8R*cKa}r>n{Wk+MXRH~o-hN}#9OF*>T#>rfhiRs(Wc-R^9@
+z%F=<}dn(E}ADc03zJ>JvZe;_8f+WFLL4%qNYs`_aa`a$Pl5H;iO^Wt*cP3W(d=(g}
+zZ%nKT1$|r-tAv8($u2-BI2Uiz#%OT&!Q3b~Ru2P2j;Gem!@wfPsTR%J>W{8z)oq^J
+k^Qm&?O@bFkw4CTocwoW<6CRlGz=Q`TJTT#bN9KWl0rH4|j{pDw
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c
+new file mode 100644
+index 0000000000..ff83db095b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c
+@@ -0,0 +1,14 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++void bootblock_mainboard_early_init(void)
++{
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++			| COMB_LPC_EN | COMA_LPC_EN);
++	mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/gpio.c
+new file mode 100644
+index 0000000000..943c743f48
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/gpio.c
+@@ -0,0 +1,191 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_NATIVE,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_NATIVE,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_GPIO,
++	.gpio31 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_INPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++	.gpio30 = GPIO_DIR_OUTPUT,
++	.gpio31 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio30 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio8 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_GPIO,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_OUTPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio45 = GPIO_DIR_OUTPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_OUTPUT,
++	.gpio51 = GPIO_DIR_INPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio34 = GPIO_LEVEL_HIGH,
++	.gpio45 = GPIO_LEVEL_LOW,
++	.gpio49 = GPIO_LEVEL_LOW,
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_GPIO,
++	.gpio71 = GPIO_MODE_GPIO,
++	.gpio72 = GPIO_MODE_NATIVE,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_NATIVE,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio68 = GPIO_DIR_INPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio70 = GPIO_DIR_INPUT,
++	.gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c
+new file mode 100644
+index 0000000000..ede8445aaf
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
++	0x10280493,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x10280493),
++	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
++	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++	0x80862805,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/overridetree.cb
+new file mode 100644
+index 0000000000..3012a3177f
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/overridetree.cb
+@@ -0,0 +1,35 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++	device domain 0 on
++		subsystemid 0x1028 0x0493 inherit
++
++		device ref igd on
++			register "gpu_cpu_backlight" = "0x0000054f"
++			register "gpu_pch_backlight" = "0x13121312"
++		end
++
++		chip southbridge/intel/bd82x6x
++			register "usb_port_config" = "{
++				{ 1, 1, 0 },
++				{ 1, 1, 0 },
++				{ 1, 1, 1 },
++				{ 1, 1, 1 },
++				{ 1, 0, 2 },
++				{ 1, 1, 2 },
++				{ 1, 1, 3 },
++				{ 1, 1, 3 },
++				{ 1, 1, 5 },
++				{ 1, 1, 5 },
++				{ 1, 1, 7 },
++				{ 1, 1, 6 },
++				{ 1, 0, 6 },
++				{ 1, 0, 7 },
++			}"
++
++			device ref sata1 on
++				register "sata_port_map" = "0x3b"
++			end
++		end
++	end
++end
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch b/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch
deleted file mode 100644
index fecaf88a..00000000
--- a/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch
+++ /dev/null
@@ -1,826 +0,0 @@
-From a49df0307455d6d8b7a9efb9f4639b72be1b64d4 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sat, 19 Aug 2023 16:19:10 -0600
-Subject: [PATCH 20/30] mb/dell: Add Latitude E6430 (Ivy Bridge)
-
-Mainboard is QAL80/LA-7781P (UMA). The dGPU model was not tested. This
-is based on the autoport output with some manual tweaks. The flash is
-8MiB + 4MiB, and is fairly easily accessed by removing the keyboard. It
-can also be internally flashed by sending a command to the EC, which
-causes the EC to pull the FDO pin low and the firmware to skip setting
-up any chipset based write protections [1]. The EC is the SMSC MEC5055,
-which seems to be compatible with the existing MEC5035 code.
-
-Working:
-- Libgfxinit
-- USB EHCI debug (left side usb port is HCD index 2, middle port on the
-  right side is HCD index 1)
-- Keyboard
-- Touchpad/trackpoint
-- ExpressCard
-- Audio
-- Ethernet
-- SD card reader
-- mPCIe WiFi
-- SeaBIOS 1.16.2
-- edk2 (MrChromebox' fork, uefipayload_202306)
-- Internal flashing using dell-flash-unlock
-
-Not working:
-- S3 suspend: Possibly EC related
-- Physical wireless switch - this triggers an SMI handler in the vendor
-  firmware which sends commands to the EC to enable/disable wireless
-  devices
-- Battery reporting - needs ACPI code for the EC
-- Brightness hotkeys - probably EC related
-
-Unknown/untested:
-- Dock
-- eSATA
-- TPM
-- dGPU on non-UMA model
-- Bluetooth module (not included on my system)
-
-[1] https://gitlab.com/nic3-14159/dell-flash-unlock
-
-Change-Id: I93c6622fc5da1d0d61a5b2c197ac7227d9525908
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e6430/Kconfig           |  44 +++++
- src/mainboard/dell/e6430/Kconfig.name      |   2 +
- src/mainboard/dell/e6430/Makefile.inc      |   6 +
- src/mainboard/dell/e6430/acpi/ec.asl       |   9 +
- src/mainboard/dell/e6430/acpi/platform.asl |  12 ++
- src/mainboard/dell/e6430/acpi/superio.asl  |   3 +
- src/mainboard/dell/e6430/acpi_tables.c     |  16 ++
- src/mainboard/dell/e6430/board_info.txt    |   6 +
- src/mainboard/dell/e6430/cmos.default      |   9 +
- src/mainboard/dell/e6430/cmos.layout       |  88 ++++++++++
- src/mainboard/dell/e6430/data.vbt          | Bin 0 -> 6144 bytes
- src/mainboard/dell/e6430/devicetree.cb     |  70 ++++++++
- src/mainboard/dell/e6430/dsdt.asl          |  30 ++++
- src/mainboard/dell/e6430/early_init.c      |  32 ++++
- src/mainboard/dell/e6430/gma-mainboard.ads |  20 +++
- src/mainboard/dell/e6430/gpio.c            | 192 +++++++++++++++++++++
- src/mainboard/dell/e6430/hda_verb.c        |  33 ++++
- src/mainboard/dell/e6430/mainboard.c       |  21 +++
- 18 files changed, 593 insertions(+)
- create mode 100644 src/mainboard/dell/e6430/Kconfig
- create mode 100644 src/mainboard/dell/e6430/Kconfig.name
- create mode 100644 src/mainboard/dell/e6430/Makefile.inc
- create mode 100644 src/mainboard/dell/e6430/acpi/ec.asl
- create mode 100644 src/mainboard/dell/e6430/acpi/platform.asl
- create mode 100644 src/mainboard/dell/e6430/acpi/superio.asl
- create mode 100644 src/mainboard/dell/e6430/acpi_tables.c
- create mode 100644 src/mainboard/dell/e6430/board_info.txt
- create mode 100644 src/mainboard/dell/e6430/cmos.default
- create mode 100644 src/mainboard/dell/e6430/cmos.layout
- create mode 100644 src/mainboard/dell/e6430/data.vbt
- create mode 100644 src/mainboard/dell/e6430/devicetree.cb
- create mode 100644 src/mainboard/dell/e6430/dsdt.asl
- create mode 100644 src/mainboard/dell/e6430/early_init.c
- create mode 100644 src/mainboard/dell/e6430/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/e6430/gpio.c
- create mode 100644 src/mainboard/dell/e6430/hda_verb.c
- create mode 100644 src/mainboard/dell/e6430/mainboard.c
-
-diff --git a/src/mainboard/dell/e6430/Kconfig b/src/mainboard/dell/e6430/Kconfig
-new file mode 100644
-index 0000000000..e4c799803e
---- /dev/null
-+++ b/src/mainboard/dell/e6430/Kconfig
-@@ -0,0 +1,44 @@
-+if BOARD_DELL_LATITUDE_E6430
-+
-+config BOARD_SPECIFIC_OPTIONS
-+	def_bool y
-+	select BOARD_ROMSIZE_KB_12288
-+	select EC_ACPI
-+	select EC_DELL_MEC5035
-+	select GFX_GMA_PANEL_1_ON_LVDS
-+	select HAVE_ACPI_RESUME
-+	select HAVE_ACPI_TABLES
-+	select HAVE_CMOS_DEFAULT
-+	select HAVE_OPTION_TABLE
-+	select INTEL_GMA_HAVE_VBT
-+	select INTEL_INT15
-+	select MAINBOARD_HAS_LIBGFXINIT
-+	select MAINBOARD_USES_IFD_GBE_REGION
-+	select NORTHBRIDGE_INTEL_SANDYBRIDGE
-+	select SERIRQ_CONTINUOUS_MODE
-+	select SOUTHBRIDGE_INTEL_C216
-+	select SYSTEM_TYPE_LAPTOP
-+	select USE_NATIVE_RAMINIT
-+
-+config DRAM_RESET_GATE_GPIO
-+	default 60
-+
-+config MAINBOARD_DIR
-+	default "dell/e6430"
-+
-+config MAINBOARD_PART_NUMBER
-+	default "Latitude E6430"
-+
-+config PS2K_EISAID
-+	default "PNP0303"
-+
-+config PS2M_EISAID
-+	default "PNP0F13"
-+
-+config USBDEBUG_HCD_INDEX
-+	default 2
-+
-+config VGA_BIOS_ID
-+	default "8086,0166"
-+
-+endif
-diff --git a/src/mainboard/dell/e6430/Kconfig.name b/src/mainboard/dell/e6430/Kconfig.name
-new file mode 100644
-index 0000000000..f866b03585
---- /dev/null
-+++ b/src/mainboard/dell/e6430/Kconfig.name
-@@ -0,0 +1,2 @@
-+config BOARD_DELL_LATITUDE_E6430
-+	bool "Latitude E6430"
-diff --git a/src/mainboard/dell/e6430/Makefile.inc b/src/mainboard/dell/e6430/Makefile.inc
-new file mode 100644
-index 0000000000..ba64e93eb8
---- /dev/null
-+++ b/src/mainboard/dell/e6430/Makefile.inc
-@@ -0,0 +1,6 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+bootblock-y += early_init.c
-+bootblock-y += gpio.c
-+romstage-y += early_init.c
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/e6430/acpi/ec.asl b/src/mainboard/dell/e6430/acpi/ec.asl
-new file mode 100644
-index 0000000000..0d429410a9
---- /dev/null
-+++ b/src/mainboard/dell/e6430/acpi/ec.asl
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Device(EC)
-+{
-+	Name (_HID, EISAID("PNP0C09"))
-+	Name (_UID, 0)
-+	Name (_GPE, 16)
-+/* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e6430/acpi/platform.asl b/src/mainboard/dell/e6430/acpi/platform.asl
-new file mode 100644
-index 0000000000..2d24bbd9b9
---- /dev/null
-+++ b/src/mainboard/dell/e6430/acpi/platform.asl
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+	/* FIXME: EC support  */
-+	Return(Package() {0, 0})
-+}
-+
-+Method(_PTS,1)
-+{
-+	/* FIXME: EC support  */
-+}
-diff --git a/src/mainboard/dell/e6430/acpi/superio.asl b/src/mainboard/dell/e6430/acpi/superio.asl
-new file mode 100644
-index 0000000000..55b1db5b11
---- /dev/null
-+++ b/src/mainboard/dell/e6430/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <drivers/pc80/pc/ps2_controller.asl>
-diff --git a/src/mainboard/dell/e6430/acpi_tables.c b/src/mainboard/dell/e6430/acpi_tables.c
-new file mode 100644
-index 0000000000..e2759659bf
---- /dev/null
-+++ b/src/mainboard/dell/e6430/acpi_tables.c
-@@ -0,0 +1,16 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi_gnvs.h>
-+#include <soc/nvs.h>
-+
-+/* FIXME: check this function.  */
-+void mainboard_fill_gnvs(struct global_nvs *gnvs)
-+{
-+	/* The lid is open by default. */
-+	gnvs->lids = 1;
-+
-+	/* Temperature at which OS will shutdown */
-+	gnvs->tcrt = 100;
-+	/* Temperature at which OS will throttle CPU */
-+	gnvs->tpsv = 90;
-+}
-diff --git a/src/mainboard/dell/e6430/board_info.txt b/src/mainboard/dell/e6430/board_info.txt
-new file mode 100644
-index 0000000000..4601a4aaba
---- /dev/null
-+++ b/src/mainboard/dell/e6430/board_info.txt
-@@ -0,0 +1,6 @@
-+Category: laptop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2012
-diff --git a/src/mainboard/dell/e6430/cmos.default b/src/mainboard/dell/e6430/cmos.default
-new file mode 100644
-index 0000000000..2a5b30f2b7
---- /dev/null
-+++ b/src/mainboard/dell/e6430/cmos.default
-@@ -0,0 +1,9 @@
-+boot_option=Fallback
-+debug_level=Debug
-+power_on_after_fail=Disable
-+nmi=Enable
-+bluetooth=Enable
-+wwan=Enable
-+wlan=Enable
-+sata_mode=AHCI
-+me_state=Normal
-diff --git a/src/mainboard/dell/e6430/cmos.layout b/src/mainboard/dell/e6430/cmos.layout
-new file mode 100644
-index 0000000000..1aa7e77bce
---- /dev/null
-+++ b/src/mainboard/dell/e6430/cmos.layout
-@@ -0,0 +1,88 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0	120	r	0	reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384	1	e	4	boot_option
-+388	4	h	0	reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395	4	e	6	debug_level
-+
-+#400	8	r	0	reserved for century byte
-+
-+# coreboot config options: southbridge
-+408	1	e	1	nmi
-+409	2	e	7	power_on_after_fail
-+411     1       e       9       sata_mode
-+
-+# coreboot config options: EC
-+412	1	e	1	bluetooth
-+413	1	e	1	wwan
-+414	1	e	1	wlan
-+
-+# coreboot config options: ME
-+424	1	e	14	me_state
-+425	2	h	0	me_state_prev
-+
-+# coreboot config options: northbridge
-+432	3	e	11	gfx_uma_size
-+435	2	e	12	hybrid_graphics_mode
-+440	8	h	0	volume
-+
-+# VBOOT
-+448	128	r	0	vbnv
-+
-+# SandyBridge MRC Scrambler Seed values
-+896	32	r	0	mrc_scrambler_seed
-+928	32	r	0	mrc_scrambler_seed_s3
-+960	16	r	0	mrc_scrambler_seed_chk
-+
-+# coreboot config options: check sums
-+984	16	h	0	check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID	value	text
-+1	0	Disable
-+1	1	Enable
-+2	0	Enable
-+2	1	Disable
-+4	0	Fallback
-+4	1	Normal
-+6	0	Emergency
-+6	1	Alert
-+6	2	Critical
-+6	3	Error
-+6	4	Warning
-+6	5	Notice
-+6	6	Info
-+6	7	Debug
-+6	8	Spew
-+7	0	Disable
-+7	1	Enable
-+7	2	Keep
-+9	0	AHCI
-+9	1	Compatible
-+11	0	32M
-+11	1	64M
-+11	2	96M
-+11	3	128M
-+11	4	160M
-+11	5	192M
-+11	6	224M
-+14	0	Normal
-+14	1	Disabled
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 447 984
-diff --git a/src/mainboard/dell/e6430/data.vbt b/src/mainboard/dell/e6430/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..08952c26ab82933ebb5cc5b9c7e2265963a87b2d
-GIT binary patch
-literal 6144
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-
-diff --git a/src/mainboard/dell/e6430/devicetree.cb b/src/mainboard/dell/e6430/devicetree.cb
-new file mode 100644
-index 0000000000..054b01c5ac
---- /dev/null
-+++ b/src/mainboard/dell/e6430/devicetree.cb
-@@ -0,0 +1,70 @@
-+chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
-+	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-+	register "gpu_cpu_backlight" = "0x00001312"
-+	register "gpu_dp_b_hotplug" = "4"
-+	register "gpu_dp_c_hotplug" = "4"
-+	register "gpu_dp_d_hotplug" = "4"
-+	register "gpu_panel_port_select" = "0"
-+	register "gpu_panel_power_backlight_off_delay" = "2300"
-+	register "gpu_panel_power_backlight_on_delay" = "2300"
-+	register "gpu_panel_power_cycle_delay" = "6"
-+	register "gpu_panel_power_down_delay" = "400"
-+	register "gpu_panel_power_up_delay" = "400"
-+	register "gpu_pch_backlight" = "0x13121312"
-+
-+	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
-+
-+	device domain 0x0 on
-+		subsystemid 0x1028 0x0534 inherit
-+
-+		device ref host_bridge on end
-+		device ref peg10 off end
-+		device ref igd on end
-+
-+		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+			register "docking_supported" = "1"
-+			register "gen1_dec" = "0x007c0681"
-+			register "gen2_dec" = "0x005c0921"
-+			register "gen3_dec" = "0x003c07e1"
-+			register "gen4_dec" = "0x00000911" # Ports 0x910/0x911 for EC
-+			register "gpi0_routing" = "2"
-+			register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
-+			register "pcie_port_coalesce" = "1"
-+			register "sata_interface_speed_support" = "0x3"
-+			register "sata_port_map" = "0x33"
-+			register "spi_lvscc" = "0x2005"
-+			register "spi_uvscc" = "0x2005"
-+			register "superspeed_capable_ports" = "0x0000000f"
-+			register "xhci_overcurrent_mapping" = "0x00000c03"
-+			register "xhci_switchable_ports" = "0x0000000f"
-+
-+			device ref xhci		on end
-+			device ref mei1		on end
-+			device ref mei2		off end
-+			device ref me_ide_r	off end
-+			device ref me_kt	on end
-+			device ref gbe		on end
-+			device ref ehci2	on end
-+			device ref hda		on end
-+			device ref pcie_rp1	on end # WWAN Slot
-+			device ref pcie_rp2	on end # SLAN Slot
-+			device ref pcie_rp3	on end # ExpressCard
-+			device ref pcie_rp4	on end # E-Module (optical bay)
-+			device ref pcie_rp5	on end # Extra Half Mini PCIe slot
-+			device ref pcie_rp6	on end # SD/MMC Card Reader
-+			device ref pcie_rp7	off end
-+			device ref pcie_rp8	off end
-+			device ref ehci1	on end
-+			device ref pci_bridge	off end
-+			device ref lpc		on
-+				chip ec/dell/mec5035
-+					device pnp ff.0 on end
-+				end
-+			end
-+			device ref sata1	on end
-+			device ref smbus	on end
-+			device ref sata2	off end
-+			device ref thermal	off end
-+		end
-+	end
-+end
-diff --git a/src/mainboard/dell/e6430/dsdt.asl b/src/mainboard/dell/e6430/dsdt.asl
-new file mode 100644
-index 0000000000..7d13c55b08
---- /dev/null
-+++ b/src/mainboard/dell/e6430/dsdt.asl
-@@ -0,0 +1,30 @@
-+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <acpi/acpi.h>
-+
-+DefinitionBlock(
-+	"dsdt.aml",
-+	"DSDT",
-+	ACPI_DSDT_REV_2,
-+	OEM_ID,
-+	ACPI_TABLE_CREATOR,
-+	0x20141018	/* OEM revision */
-+)
-+{
-+	#include <acpi/dsdt_top.asl>
-+	#include "acpi/platform.asl"
-+	#include <cpu/intel/common/acpi/cpu.asl>
-+	#include <southbridge/intel/common/acpi/platform.asl>
-+	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-+	#include <southbridge/intel/common/acpi/sleepstates.asl>
-+
-+	Device (\_SB.PCI0)
-+	{
-+		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-+		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
-+		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
-+	}
-+}
-diff --git a/src/mainboard/dell/e6430/early_init.c b/src/mainboard/dell/e6430/early_init.c
-new file mode 100644
-index 0000000000..d882c3d78b
---- /dev/null
-+++ b/src/mainboard/dell/e6430/early_init.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+	{ 1, 1, 0 },
-+	{ 1, 1, 0 },
-+	{ 1, 1, 1 },
-+	{ 1, 1, 1 },
-+	{ 1, 0, 2 },
-+	{ 1, 1, 2 },
-+	{ 1, 1, 3 },
-+	{ 1, 1, 3 },
-+	{ 1, 1, 4 },
-+	{ 1, 1, 4 },
-+	{ 1, 1, 5 },
-+	{ 1, 1, 5 },
-+	{ 1, 2, 6 },
-+	{ 1, 2, 6 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+			| COMB_LPC_EN | COMA_LPC_EN);
-+	mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/e6430/gma-mainboard.ads b/src/mainboard/dell/e6430/gma-mainboard.ads
-new file mode 100644
-index 0000000000..1310830c8e
---- /dev/null
-+++ b/src/mainboard/dell/e6430/gma-mainboard.ads
-@@ -0,0 +1,20 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+   ports : constant Port_List :=
-+     (
-+      HDMI1, -- mainboard HDMI
-+      DP2, -- dock DP
-+      DP3, -- dock DP
-+      Analog, --mainboard VGA
-+      LVDS,
-+      others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/e6430/gpio.c b/src/mainboard/dell/e6430/gpio.c
-new file mode 100644
-index 0000000000..777570765a
---- /dev/null
-+++ b/src/mainboard/dell/e6430/gpio.c
-@@ -0,0 +1,192 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_GPIO,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_GPIO,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_NATIVE,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_GPIO,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_NATIVE,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio1 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio3 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio16 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_OUTPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio28 = GPIO_LEVEL_LOW,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+	.gpio30 = GPIO_RESET_RSMRST,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio13 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_GPIO,
-+	.gpio46 = GPIO_MODE_NATIVE,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_GPIO,
-+	.gpio50 = GPIO_MODE_NATIVE,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_NATIVE,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_NATIVE,
-+	.gpio56 = GPIO_MODE_NATIVE,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_INPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio45 = GPIO_DIR_OUTPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio49 = GPIO_DIR_INPUT,
-+	.gpio51 = GPIO_DIR_INPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio34 = GPIO_LEVEL_HIGH,
-+	.gpio45 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_GPIO,
-+	.gpio69 = GPIO_MODE_GPIO,
-+	.gpio70 = GPIO_MODE_GPIO,
-+	.gpio71 = GPIO_MODE_GPIO,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_NATIVE,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio68 = GPIO_DIR_INPUT,
-+	.gpio69 = GPIO_DIR_INPUT,
-+	.gpio70 = GPIO_DIR_INPUT,
-+	.gpio71 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/e6430/hda_verb.c b/src/mainboard/dell/e6430/hda_verb.c
-new file mode 100644
-index 0000000000..56ada95c58
---- /dev/null
-+++ b/src/mainboard/dell/e6430/hda_verb.c
-@@ -0,0 +1,33 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76df,	/* Codec Vendor / Device ID: IDT */
-+	0x10280534,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x10280534),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+	0x80862806,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/e6430/mainboard.c b/src/mainboard/dell/e6430/mainboard.c
-new file mode 100644
-index 0000000000..31e49802fc
---- /dev/null
-+++ b/src/mainboard/dell/e6430/mainboard.c
-@@ -0,0 +1,21 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <ec/acpi/ec.h>
-+#include <console/console.h>
-+#include <pc80/keyboard.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+
-+	/* FIXME: fix these values. */
-+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-+					GMA_INT15_PANEL_FIT_DEFAULT,
-+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+	.enable_dev = mainboard_enable,
-+};
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0021-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch b/config/coreboot/default/patches/0021-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
new file mode 100644
index 00000000..5d4139e8
--- /dev/null
+++ b/config/coreboot/default/patches/0021-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
@@ -0,0 +1,449 @@
+From 1111dcab65ca83f175f1bb9c0496cae24fbfb7c2 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Wed, 31 Jan 2024 22:07:25 -0700
+Subject: [PATCH 21/39] mb/dell: Add Latitude E6520 (Sandy Bridge)
+
+Mainboard is PAL60/LA-6562P (UMA). The version with an Nvidia dGPU was
+not tested. I do not physically have this system; someone with physical
+access to one sent me the output of autoport which I then modified to
+produce this port. I was also sent the VBT binary, which was obtained
+from `/sys/kernel/debug/dri/0/i915_vbt` while running version A08 of the
+vendor firmware.
+
+This was originally tested and found to be working as a standalone board
+port in Libreboot, but this variant based port in upstream coreboot has
+not been tested.
+
+This can be internally flashed by sending a command to the EC, which
+causes the EC to pull the FDO pin low and the firmware to skip setting
+up any chipset based write protections [1]. The EC is the SMSC MEC5055,
+which seems to be compatible with the existing MEC5035 code.
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: Ibdd40cc15642b8d404159d5962670ccc4167a9ec
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig   |   9 +
+ .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
+ .../snb_ivb_latitude/variants/e6520/data.vbt  | Bin 0 -> 6144 bytes
+ .../variants/e6520/early_init.c               |  31 +++
+ .../snb_ivb_latitude/variants/e6520/gpio.c    | 190 ++++++++++++++++++
+ .../variants/e6520/hda_verb.c                 |  32 +++
+ .../variants/e6520/overridetree.cb            |  35 ++++
+ 7 files changed, 300 insertions(+)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index d2786970ee..72bdc96c0a 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -23,6 +23,12 @@ config BOARD_DELL_LATITUDE_E6420
+ 	select MAINBOARD_USES_IFD_GBE_REGION
+ 	select SOUTHBRIDGE_INTEL_BD82X6X
+ 
++config BOARD_DELL_LATITUDE_E6520
++	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++	select BOARD_ROMSIZE_KB_10240
++	select MAINBOARD_USES_IFD_GBE_REGION
++	select SOUTHBRIDGE_INTEL_BD82X6X
++
+ config BOARD_DELL_LATITUDE_E5530
+ 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ 	select BOARD_ROMSIZE_KB_12288
+@@ -50,6 +56,7 @@ config MAINBOARD_DIR
+ 
+ config MAINBOARD_PART_NUMBER
+ 	default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
++	default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
+ 	default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
+ 	default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
+ 	default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
+@@ -62,11 +69,13 @@ config USBDEBUG_HCD_INDEX
+ 
+ config VARIANT_DIR
+ 	default "e6420" if BOARD_DELL_LATITUDE_E6420
++	default "e6520" if BOARD_DELL_LATITUDE_E6520
+ 	default "e5530" if BOARD_DELL_LATITUDE_E5530
+ 	default "e6430" if BOARD_DELL_LATITUDE_E6430
+ 	default "e6530" if BOARD_DELL_LATITUDE_E6530
+ 
+ config VGA_BIOS_ID
++	default "8086,0116" if BOARD_DELL_LATITUDE_E6520
+ 	default "8086,0166" if BOARD_DELL_LATITUDE_E5530
+ 	default "8086,0126" if BOARD_DELL_LATITUDE_E6420
+ 	default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index 257d428a70..c7665ac263 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -3,6 +3,9 @@
+ config BOARD_DELL_LATITUDE_E6420
+ 	bool "Latitude E6420"
+ 
++config BOARD_DELL_LATITUDE_E6520
++	bool "Latitude E6520"
++
+ config BOARD_DELL_LATITUDE_E5530
+ 	bool "Latitude E5530"
+ 
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..0ef16ee7cb482d2cb91ea80c3f419759355f7ba0
+GIT binary patch
+literal 6144
+zcmeHKZ){Ul6hE);wSB#PZ|mL$bQ^!}HW(eF@H)0JafGfbqsZ9G21{L7Sg{or$5uN)
+z_QgG55e!O(8p8*oBhhF`l$n^QF%rN;rzFNqqcPzFCd5QSB1Y7RKt1=pmTk1aFo9^Y
+z+x+gi_nvdlJ@?#m&wZWW=G#bH>ze$J`&!oe*Q|E0r!)d89LYY8b$aowZEoG-uiIF+
+z#n;$ezm6V<nGnvtc?lrGaf)1_);!W0?uqnojdw-1MQM|dwy`OcF?M@A)KgVV*N2}7
+zcXx+--0R}IwzW3-+`f2k?^Av5V7MpRO-q(9rn_R1@Xlz2Ztdy`$Gf6^w6~|bKi!!7
+z9;xq*^~bxmZQn^<^<`+2s=BdSM%VW2#FguN<FO^QuDhGIFquBu677q|cSj>jWFixQ
+z)4V8f0Gt`D`+>9Fr~tnJ76EJ`5D_F1cn-`0$RgN9unI6kfYkzIiO?W`ON4+34lv1_
+zNdPDkq1cf$p8^EW;TS*O$CdzNo#1fbIG_Oi0T(ti0jwyt0le_p_HlvX^CFvr)>$b>
+zO-z8^CSU`w=mIK7Q)@9fR;XUzrFu{T=rRyygIZBpU9+Or>+?4R9%~G?Y-|g)Z`Sti
+z+do(U*Wb-xR~DzjS<75#=Us4sH^C9U2FCbND7L7u$>M|<;t=AnRfI9C0v8c~AVg7t
+zIU<3D2oK^>L;%r(*o=4*u?Mja@dDyi#4zFn;(f#^#3*76aUSs#;tJv#La-6YLRdQB
+zdcvfERkvH?k~GJlfM<HR476j(@nfm+47<!Ult@^ua5M3h6A}q=C0ognX9aX4mxq)U
+zXOhm=DbLene?C%_16Q)2NRV@Yacz`D;{V>Ve-1?&ZXy}n)YwnVAgNlz#zX;=IX)-F
+z)9LL3lbEdY5Co)LsK?vP)7s}G(5xduE!Y!#Wgh<IN3(3ey=-oWU(9aEJ_HzV53Jbq
+zj5B5RjzLUt>_T&xi$uUA#0e}X3D~`J(bHz;DgTa@GrpW6=>eZwJeNYYo*GjF=``;(
+zuoQ3|V5YoKd$j=KK{`uSX*DeU1oJg=+RT6)rLe6%2>Ci^!5ao=*gS}wFN=nUf`fTF
+zM?Gb5ycWjM7I?MJ!2;w|LFg=UoLq-ytr2iemG)AsW}bI4X9PK}T5UKsQi7anu=tD6
+zf|={kXkNeQBD>6bQ3taC8XJOJ^e40_ydyfr&a41L^1)jNrK<B_wV}+ZE`p;QK=rDz
+zTw`SJ+e`Oc*icaF4INF51Xg*~ts@m)@9ETt(*@N7yy0)Ddce%i9{^k2kbd8=Wns~P
+zWBD$~himxDharxF@f!ti^0$~9Zxt{tg`@Dbl_0Ki2Xp_MEw-<z6qgep;XYmR%Dl-F
+z%3cBfcN;Avikpz-gmw_6mymu!Unk0YgnUfsk3{*6kQ;=S*p(_fS!JhDyYh^k?6uRk
+z?8--W@~NHvY*+ra6SG9iC1s^V)<|@Rqzp*pd5NBslrs`JC(&Oeg~v}CnJ$x+)iP<8
+z=`LA0Ad@39{XkZ}kjXbP{YzHtS!70*yy%LcnJ#cz4u%*Wq!^d*AVMZdr&l=#Qgik~
+ze2l)cX+!kF9EaFhY;0^Uo_#VNC?7K2Tf=ZR1y5);b!mCGG?<cc#M0rtHKYeKi%BE?
+z@Y6|P8fx#li}c`Uv24UGyZaM0To;Ep<_AWZA1t~bFgI)uf}&Eq=L_Cs89=>wnT0Vx
+z-jp>o1ffJNommZ4?=TIPlePIw0hgQ706f*tBC`#pg>9&zRHe>J2%RxBTrOc6Adh9E
+ziJr`?VQH!N!_GkoKaoq|+3$^Ae0#sUxXlmM1Huq~g<=Ls?ILv+nQcH%PQedGOlH=Q
+z77rMcJlH4Mkc#U2(IDv>rsm1aHpsdL_RdT^i_ACcQUMIJcSus}*(?CIiy^#^=t=g1
+z+*^Zbh30&^#_bKclSy9pL$<B~pK8m*sLpIdnHM@W$nA7Ea@Z`x27K?aNK<@lCW(2L
+zb@kB3H8kKy4W3Hu)NN|kd!DL^o#iR9a{QYV-Wl&r&hmIFX{ezkIV<4zFiVUQ@K>ao
+z00DnFy~Uek!JRwhVX!of0)$Sa*X^S~LMQH0<E(UUx}L=|;Kgw(r(4q=nD)T52c|tR
+O?SW|zOncy=dEg(6JAK&z
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c
+new file mode 100644
+index 0000000000..b6415a428b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c
+@@ -0,0 +1,31 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++const struct southbridge_usb_port mainboard_usb_ports[] = {
++	{ 1, 1, 0 },
++	{ 1, 1, 0 },
++	{ 1, 1, 1 },
++	{ 1, 1, 1 },
++	{ 1, 0, 2 },
++	{ 1, 1, 2 },
++	{ 1, 0, 3 },
++	{ 1, 0, 3 },
++	{ 1, 1, 5 },
++	{ 1, 1, 5 },
++	{ 1, 1, 7 },
++	{ 1, 1, 6 },
++	{ 1, 0, 6 },
++	{ 1, 0, 7 },
++};
++
++void bootblock_mainboard_early_init(void)
++{
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++			| COMB_LPC_EN | COMA_LPC_EN);
++	mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/gpio.c
+new file mode 100644
+index 0000000000..61f01816c4
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/gpio.c
+@@ -0,0 +1,190 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_NATIVE,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_NATIVE,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_GPIO,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_INPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++	.gpio30 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio30 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio8 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_GPIO,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_OUTPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio45 = GPIO_DIR_OUTPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_OUTPUT,
++	.gpio51 = GPIO_DIR_INPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio34 = GPIO_LEVEL_HIGH,
++	.gpio45 = GPIO_LEVEL_LOW,
++	.gpio49 = GPIO_LEVEL_LOW,
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_GPIO,
++	.gpio71 = GPIO_MODE_GPIO,
++	.gpio72 = GPIO_MODE_NATIVE,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_NATIVE,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio68 = GPIO_DIR_INPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio70 = GPIO_DIR_INPUT,
++	.gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c
+new file mode 100644
+index 0000000000..ae376691e7
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
++	0x10280494,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x10280494),
++	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++	AZALIA_PIN_CFG(0, 0x11, 0x400000f2),
++	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++	0x80862805,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/overridetree.cb
+new file mode 100644
+index 0000000000..f90f2dee1f
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/overridetree.cb
+@@ -0,0 +1,35 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++	device domain 0 on
++		subsystemid 0x1028 0x0494 inherit
++
++		device ref igd on
++			register "gpu_cpu_backlight" = "0x00001312"
++			register "gpu_pch_backlight" = "0x13121312"
++		end
++
++		chip southbridge/intel/bd82x6x
++			register "usb_port_config" = "{
++				{ 1, 1, 0 },
++				{ 1, 1, 0 },
++				{ 1, 1, 1 },
++				{ 1, 1, 1 },
++				{ 1, 0, 2 },
++				{ 1, 1, 2 },
++				{ 1, 1, 3 },
++				{ 1, 1, 3 },
++				{ 1, 1, 5 },
++				{ 1, 1, 5 },
++				{ 1, 1, 7 },
++				{ 1, 1, 6 },
++				{ 1, 0, 6 },
++				{ 1, 0, 7 },
++			}"
++
++			device ref sata1 on
++				register "sata_port_map" = "0x3b"
++			end
++		end
++	end
++end
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0022-don-t-use-github-for-the-acpica-download.patch b/config/coreboot/default/patches/0022-don-t-use-github-for-the-acpica-download.patch
deleted file mode 100644
index f66909c6..00000000
--- a/config/coreboot/default/patches/0022-don-t-use-github-for-the-acpica-download.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 536a1dd349f590cbefccac7e7364cafcdaec9600 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 22 Oct 2023 15:02:25 +0100
-Subject: [PATCH 22/30] don't use github for the acpica download
-
-i have the tarball from a previous download, and i placed
-it on libreboot rsync, which then got mirrored to princeton.
-
-today, github's ssl cert was b0rking the hell out and i really
-really wanted to finish a build, and didn't want to wait for
-github to fix their httpd.
-
-so i'm now hosting this specific acpica tarball on rsync.
-
-this patch makes that URL be used, instead of the github one.
-
-that's the 2nd time i've had to patch coreboot's acpica download!
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 23a5caf2bb..36565a906c 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -72,7 +72,7 @@ MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
- MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
- GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
- BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
--IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
-+IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
- CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch b/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch
new file mode 100644
index 00000000..cec59dbe
--- /dev/null
+++ b/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch
@@ -0,0 +1,442 @@
+From 39dcb2dcada8821c49a3a042d9e70a6cda81a4ab Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Wed, 7 Feb 2024 10:23:38 -0700
+Subject: [PATCH 22/39] mb/dell: Add Latitude E5520 (Sandy Bridge)
+
+Mainboard is Krug 15". I do not physically have this system; someone
+with physical access to one sent me the output of autoport which I then
+modified to produce this port. I was also sent the VBT binary, which was
+obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running version
+A14 of the vendor firmware.
+
+This was originally tested and found to be working as a standalone
+board port in Libreboot, but this variant based port in upstream
+coreboot has not been tested.
+
+This can be internally flashed by sending a command to the EC, which
+causes the EC to pull the FDO pin low and the firmware to skip setting
+up any chipset based write protections [1]. The EC is the SMSC MEC5055,
+which seems to be compatible with the existing MEC5035 code.
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: Ic9bfc028d4b8ae01ccc019157bb53e7764671134
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig   |  10 +-
+ .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
+ .../snb_ivb_latitude/variants/e5520/data.vbt  | Bin 0 -> 6144 bytes
+ .../variants/e5520/early_init.c               |  14 ++
+ .../snb_ivb_latitude/variants/e5520/gpio.c    | 195 ++++++++++++++++++
+ .../variants/e5520/hda_verb.c                 |  32 +++
+ .../variants/e5520/overridetree.cb            |  39 ++++
+ 7 files changed, 292 insertions(+), 1 deletion(-)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index 72bdc96c0a..4e94a7ef80 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -17,6 +17,11 @@ config BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ 	select SYSTEM_TYPE_LAPTOP
+ 	select USE_NATIVE_RAMINIT
+ 
++config BOARD_DELL_LATITUDE_E5520
++	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++	select BOARD_ROMSIZE_KB_6144
++	select SOUTHBRIDGE_INTEL_BD82X6X
++
+ config BOARD_DELL_LATITUDE_E6420
+ 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ 	select BOARD_ROMSIZE_KB_10240
+@@ -55,6 +60,7 @@ config MAINBOARD_DIR
+ 	default "dell/snb_ivb_latitude"
+ 
+ config MAINBOARD_PART_NUMBER
++	default "Latitude E5520" if BOARD_DELL_LATITUDE_E5520
+ 	default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
+ 	default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
+ 	default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
+@@ -68,6 +74,7 @@ config USBDEBUG_HCD_INDEX
+ 	default 2
+ 
+ config VARIANT_DIR
++	default "e5520" if BOARD_DELL_LATITUDE_E5520
+ 	default "e6420" if BOARD_DELL_LATITUDE_E6420
+ 	default "e6520" if BOARD_DELL_LATITUDE_E6520
+ 	default "e5530" if BOARD_DELL_LATITUDE_E5530
+@@ -77,7 +84,8 @@ config VARIANT_DIR
+ config VGA_BIOS_ID
+ 	default "8086,0116" if BOARD_DELL_LATITUDE_E6520
+ 	default "8086,0166" if BOARD_DELL_LATITUDE_E5530
+-	default "8086,0126" if BOARD_DELL_LATITUDE_E6420
++	default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \
++		|| BOARD_DELL_LATITUDE_E5520
+ 	default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
+ 		|| BOARD_DELL_LATITUDE_E6530
+ 
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index c7665ac263..7976691f21 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -1,5 +1,8 @@
+ ## SPDX-License-Identifier: GPL-2.0-only
+ 
++config BOARD_DELL_LATITUDE_E5520
++	bool "Latitude E5520"
++
+ config BOARD_DELL_LATITUDE_E6420
+ 	bool "Latitude E6420"
+ 
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..b511e75262e37fa123d674e9a7b21a8dfe427729
+GIT binary patch
+literal 6144
+zcmeHKZ){Ul6hE);wSBvNZ|mL$bmQOM2BTvXUI!}^N9ejTij1vnu+)Wx6<c9(Y_%K6
+zzOV-@f<ehpWB5RHBpMBgG7}RuMuM2=l*E{6G$wq&gqTQ3#E2RZsOP@dvW*rP7>Fjj
+z&F`Lj?>YC}bI(2Z+}C+6zKyiGrosQXuW7A+&1%<rN+Y1ck(}dLrx)Ma#^x>lnvFGE
+zeD#gB>*#Tq4&j^|7Xcz1r^pp*)g#T}u1Me3ct>Pgls5Qi3!6e2W0%`a-Ic|3efWuR
+zXJ@#}wJyGMTXTcY<%@TBKh@(3hP$Gjv}E}rx-%9D_eLXhYe!c&-VyDg-Cdo1>Biji
+zNNsnlFW#|jdoOj?mZ43m>cVO%UE9@*E7x|%V~c4`XD4l9GCi~@+7pfMibfX8L?!^I
+zc~Rg1I5SxH1DAEZ0{jA41jrJBh#-l;b6^%g7QrThRe)&%tQH_!ggOD7A_PRRgGuI0
+z0zi=n#rCB66d-sO$M~^6wgeb$2fH1|0R`v}xUiWCU`4SF;Dyh&j|mK&6WJWJ&Pq9I
+zVgmFQfh+)vE}(KWwHA|Oh3fSkss|;2E(2i}s1?gRRV%8!K7U={vHD=s#+Fd)W^M1j
+z{R4$??VSvEWpgT=vCM&1-U$bI6CB~IV3Z$$Vv7o!EDnev4j~R(MHsazZ~^fLLKGF4
+zEfQFOa3dZ?1Q1P#&4?!vyAk^k&m&$z3?WV+-b0*1j37o4=MX<3E+eiYge(Ht2umAW
+zOPDmU>UL{flI9u|@JtVvfp#o8ek?VfVV9YP5(%pnZX~{PKq4WoWGmV8t$=Ri@{zLQ
+zNYYt4<$0Ry&qIoG;7s-t333)Nu8opN{NG!)&!I@eO(cVx8vBVEBvotJ7%yNl$7iQ_
+zI=xk30+V$ff`F6<wRoF(TK%j9nsr#H23umU%)_7jNOl%*FPU567qbg;4gtp711nj2
+z#+kHw`v4|5cA+`UMIvAl;slnH1nl0v=xH<al>1}ljxDE1dcda^&!do|r^eJkI?aC-
+zEQMSfm?<w*Unzumkj_w5>VYL6W4=aCiy4rk%xq~5LV?bi|GL2$G7li<%c7yd;6T34
+zQBN5huZ3~6`ChGkpb$Bg5ITb#2iK-qs|1`=sl6Dhn(Lj&8Agt?S{sTDmmtRj7Jm_1
+zFnt{w&FdFkWS3bl>OeL?eO+*i{)9G!cSI-InGt|U0eEYmRCOHm7|I;#LO8ksRIeJ#
+zGe+jTwPg4C4TYuN(9zULV3k+hI$YuPo=%N8oZ#u_4S!3Xelt6N0BmuC`hCNeg+&97
+z6*!>)uHvr%2004GZv?!_-y&|TRmil=9D%Q`1aXBsnD^gov3*UZI34&1_vn(B=T4kZ
+z_A>ClXVIBNaS^hd&^DrU6VgZMYeadMkdFxcktn|ra-Gl;n^I{bt86rCQ=YMry*B!$
+zP5ID9KDE)GZOY#^VwPyRq^y+48j0?ZlzxdkC()CV@`*&wO7vGr;qjA3rb}gIwM-gi
+zx>HsT$mEDj-<OpyWb%zn|B@A3Hkp<!FT5;hrt_SZiy?*wDaIu{h>%Ir=@rh7)SR;b
+zAEWQGv_X1)wq0y5Ha0c~&psIsln<Hiu3;#Lf;%*eI<@?p8cfMJV(IYi8q$NA#iS8`
+z_~|4t4b^wtMSAeFST^F8-Tm<zu8D&j^8=&I4;I}Im>aeSK~X8*^Z9SE44_`P#KIUL
+zf6^N2f>5HCPWM3N+f0MyWOV^kz~!-wVc4MRXOY>4Jsxd1RyBKEMzNf{RKhesKFdbq
+zJ(*d<l2Y#n?E?~iBA39P?~Pr2d#}5=#Sfl-VGzGUF$4U2KcqCIVlwkC(&7PQk_X!a
+z8}3Jgq-&U*Co|h1>l)ZQGyW_x->i#;FvQ*=Nv&nG0N5@D@jjv_Q}K}6MP?1A6`JGe
+zDwj9pN+x;T4>`I9e5x(uqdK#OGB31ikk@Xv=dxLb4fx(;ktX@rOb~M~?dYQQYiPia
+z8r;jUQ?sd2@3||-cb2Eb%JFYfxHsONoaJ^eqoKN{<g9?-%`7oWz+aJS0tEc!^d@hD
+z1-I{%hr!Y?0uVZpUbl__37xn@jkD6Z>3SATgBQlEoN7&ZV9Eni9+>jLln16fFy(=V
+H=7E0zE^L4Z
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c
+new file mode 100644
+index 0000000000..ff83db095b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c
+@@ -0,0 +1,14 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++void bootblock_mainboard_early_init(void)
++{
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++			| COMB_LPC_EN | COMA_LPC_EN);
++	mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/gpio.c
+new file mode 100644
+index 0000000000..f76b93d9f0
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/gpio.c
+@@ -0,0 +1,195 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_NATIVE,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_GPIO,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_GPIO,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_NATIVE,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_GPIO,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio3 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio12 = GPIO_DIR_OUTPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_INPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++	.gpio30 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio12 = GPIO_LEVEL_HIGH,
++	.gpio30 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio8 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_NATIVE,
++	.gpio46 = GPIO_MODE_GPIO,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_NATIVE,
++	.gpio50 = GPIO_MODE_GPIO,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_GPIO,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_GPIO,
++	.gpio56 = GPIO_MODE_GPIO,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_OUTPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_OUTPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio46 = GPIO_DIR_OUTPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio50 = GPIO_DIR_OUTPUT,
++	.gpio51 = GPIO_DIR_OUTPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio53 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio55 = GPIO_DIR_OUTPUT,
++	.gpio56 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio34 = GPIO_LEVEL_LOW,
++	.gpio37 = GPIO_LEVEL_LOW,
++	.gpio46 = GPIO_LEVEL_HIGH,
++	.gpio50 = GPIO_LEVEL_HIGH,
++	.gpio51 = GPIO_LEVEL_LOW,
++	.gpio55 = GPIO_LEVEL_LOW,
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_NATIVE,
++	.gpio69 = GPIO_MODE_NATIVE,
++	.gpio70 = GPIO_MODE_NATIVE,
++	.gpio71 = GPIO_MODE_NATIVE,
++	.gpio72 = GPIO_MODE_NATIVE,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_GPIO,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio74 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c
+new file mode 100644
+index 0000000000..1373975352
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
++	0x1028049a,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x1028049a),
++	AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++	AZALIA_PIN_CFG(0, 0x11, 0xd5a301a0),
++	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++	0x80862805,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/overridetree.cb
+new file mode 100644
+index 0000000000..479d1b696e
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/overridetree.cb
+@@ -0,0 +1,39 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++	device domain 0 on
++		subsystemid 0x1028 0x049a inherit
++
++		device ref igd on
++			register "gpu_cpu_backlight" = "0x00000218"
++			register "gpu_pch_backlight" = "0x13121312"
++		end
++
++		chip southbridge/intel/bd82x6x
++			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 1, 0 }"
++			register "usb_port_config" = "{
++				{ 1, 1, 0 },
++				{ 1, 1, 0 },
++				{ 1, 1, 1 },
++				{ 1, 1, 1 },
++				{ 1, 1, 2 },
++				{ 1, 1, 2 },
++				{ 1, 1, 3 },
++				{ 1, 1, 3 },
++				{ 1, 1, 5 },
++				{ 1, 1, 5 },
++				{ 1, 1, 7 },
++				{ 1, 1, 6 },
++				{ 1, 1, 6 },
++				{ 1, 1, 7 },
++			}"
++
++			device ref gbe off end
++			device ref pcie_rp4 off end
++			device ref pcie_rp7 on end # Broadcom BCM5761 Gigabit Ethernet
++			device ref sata1 on
++				register "sata_port_map" = "0x3b"
++			end
++		end
++	end
++end
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0023-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch b/config/coreboot/default/patches/0023-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
new file mode 100644
index 00000000..dda8313a
--- /dev/null
+++ b/config/coreboot/default/patches/0023-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
@@ -0,0 +1,442 @@
+From 948221e226340c1c5852a73d005ada18120de393 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Mon, 4 Mar 2024 18:05:43 -0700
+Subject: [PATCH 23/39] mb/dell: Add Latitude E5420 (Sandy Bridge)
+
+Mainboard is Krug 14". I do not physically have this system; someone
+with physical access to one sent me the output of autoport which I then
+modified to produce this port. I was also sent the VBT binary, which was
+obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running version
+A02 of the vendor firmware.
+
+This was originally tested and found to be working as a standalone board
+port in Libreboot, but this variant based port in upstream coreboot has
+not been tested.
+
+This can be internally flashed by sending a command to the EC, which
+causes the EC to pull the FDO pin low and the firmware to skip setting
+up any chipset based write protections [1]. The EC is the SMSC MEC5055,
+which seems to be compatible with the existing MEC5035 code.
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: I0283653156083768e1fd451bcf539b4e028589f4
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig   |  10 +-
+ .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
+ .../snb_ivb_latitude/variants/e5420/data.vbt  | Bin 0 -> 6144 bytes
+ .../variants/e5420/early_init.c               |  14 ++
+ .../snb_ivb_latitude/variants/e5420/gpio.c    | 195 ++++++++++++++++++
+ .../variants/e5420/hda_verb.c                 |  32 +++
+ .../variants/e5420/overridetree.cb            |  39 ++++
+ 7 files changed, 292 insertions(+), 1 deletion(-)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index 4e94a7ef80..e6a21ffb99 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -17,6 +17,11 @@ config BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ 	select SYSTEM_TYPE_LAPTOP
+ 	select USE_NATIVE_RAMINIT
+ 
++config BOARD_DELL_LATITUDE_E5420
++	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++	select BOARD_ROMSIZE_KB_6144
++	select SOUTHBRIDGE_INTEL_BD82X6X
++
+ config BOARD_DELL_LATITUDE_E5520
+ 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ 	select BOARD_ROMSIZE_KB_6144
+@@ -60,6 +65,7 @@ config MAINBOARD_DIR
+ 	default "dell/snb_ivb_latitude"
+ 
+ config MAINBOARD_PART_NUMBER
++	default "Latitude E5420" if BOARD_DELL_LATITUDE_E5420
+ 	default "Latitude E5520" if BOARD_DELL_LATITUDE_E5520
+ 	default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
+ 	default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
+@@ -74,6 +80,7 @@ config USBDEBUG_HCD_INDEX
+ 	default 2
+ 
+ config VARIANT_DIR
++	default "e5420" if BOARD_DELL_LATITUDE_E5420
+ 	default "e5520" if BOARD_DELL_LATITUDE_E5520
+ 	default "e6420" if BOARD_DELL_LATITUDE_E6420
+ 	default "e6520" if BOARD_DELL_LATITUDE_E6520
+@@ -82,7 +89,8 @@ config VARIANT_DIR
+ 	default "e6530" if BOARD_DELL_LATITUDE_E6530
+ 
+ config VGA_BIOS_ID
+-	default "8086,0116" if BOARD_DELL_LATITUDE_E6520
++	default "8086,0116" if BOARD_DELL_LATITUDE_E6520 \
++		|| BOARD_DELL_LATITUDE_E5420
+ 	default "8086,0166" if BOARD_DELL_LATITUDE_E5530
+ 	default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \
+ 		|| BOARD_DELL_LATITUDE_E5520
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index 7976691f21..a3fa2b1837 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -1,5 +1,8 @@
+ ## SPDX-License-Identifier: GPL-2.0-only
+ 
++config BOARD_DELL_LATITUDE_E5420
++	bool "Latitude E5420"
++
+ config BOARD_DELL_LATITUDE_E5520
+ 	bool "Latitude E5520"
+ 
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..98b82fe6110fd295b5749041ec7f8c084ace5f57
+GIT binary patch
+literal 6144
+zcmeHKeQZ-z6hE);wSBvNZ!2$ObQ^;MgV6zl*Rhp}BXnCCMZU^_r7jRwT!kfLo8?3H
+zk9)u(7?cb(hChhTM57@QFfmbMB!G!dNsO6BW5OSp5EGF^jHnTTdhUBI+h`e+1ft1q
+z^SfW?+;h)4_uO+|XEfEV$91)<gOArWE)OnSTD}Ug6?8a~vz+SmQn!4~y3N7b^|hPp
+zR<5aEfv-b8M00Lk251!oO|8(YA6XaeXzkt-Z)@Ee!_{@z#Fro^?DqN4SGjRIu8KYp
+zZEufuU@5MM@7jv%h;75FS}ezKv?JDzCH}d%tE)A-GuDb*+B%}~w%88r>}c;!*XQ5O
+z)OU7u$J@4U+lk)#GSW%c%c)v`%R6?`w)LIyu6bD7-j0o&X9qUMcEsYlW3BU4rZRvt
+zqAUpjf*qXuLCCsU0YM2I5@gB1WKd)f1+Yt?%HWd0DZxYumP(K<LxTif8A39+!KMl}
+z31FHG)7?qk5g>e?=ER{f^&}W<0k@mxff(?6+Stw+s6y%k1mM$cLk#^FWWI*9bE1GY
+z&VY9?WC1u#23^3^UYw5?H0x2S2gN`x18Fko6_x(#MKyuCU_<D!mEp$qO_An}#@>DV
+zdkf*li41yW3p$*0Oo3+63kO6S91*KwP#l2i4jnc)JkUirL^$k}VbH0;CBh#BS=OLf
+zW-yE3BRon75gG{_2~QIC5cUzCC%i)FCmbidM>tIwAPf>N5Pl?FC0r*+Sq!oXj!keQ
+zVKcyK>TL+gc7oLco$28+FpeeXkEP}_Sea=mk#IWUR^m$!BogvszLPu83FJm0k6K<l
+z$#$~YiXtY*GpHp#@FvHJ1UnBD*H%d+{_j24XE4nmBa*?5mOWiold28s3}>*}<HaeO
+z+1|-8g2)FCfkDZIdb-Ub);z0#;XEbPfGe?A72!{DAUg|$m+Z~(i@h9j4gtm611ni(
+z#u>ACcP}M4exU`*MKVwl5+t6JBpTkmm}xWflKUe~7}`!#%z#gAo{NxUrpDAndYktu
+zI0}VLU`J7^xmF1AFiz5S^uzp*DPI$%$qq!(ikh0kP+(GKzF|@N?Y%_#Vp@M+xHr$F
+z=%+18z`-fT%z)9-TS$~Dh@2yeN7!UIt0h`fWxUu`JvA_ra*8P48l%7KR0&c1;0R75
+z4f0oz(xQ3MWqz5>qW5M4tZWExHs8<H(e1G@4km@5wEzOOP^x<l`YmA|eKs6j3wl8B
+z%C%;uygh%<#kGZ{fymL+OlV0!-*T!V5IB>X@p!@CBU=7e{5^Jl{s7by`po-AJqM2l
+znk(=^0bHkF0rUw7)^7j;$=_UIs8`6P6b-;vPDZ#U9L)W1_PAYRDP9k~;5$stt5ZiV
+zD0>;i-?OlYY2}P9WVnfGos4xee2r=EGWHR}ADH$VV>cO=xU?!4TjIi)OMBYI_PX#b
+zm-eBHed5BOT-x6*W>;{IqAga~G6lCQT93k>Q}CpsomJR*1%FjEkv?fuT%c-8RklXO
+zU8;6KWk*zeU)4TW+1D!mrE0EhHZfbBeN{4S7X@Pig%};A99QTdA~wZruL*8y?K!jP
+zG5R*k=);S}Zn<T;W!Mxt`(!+z7_r@3LVpf|FESauM&4}+wqzXfba-zG>A}on(uzNF
+zyu>BcjA})C@bg%<;+Eh2;Sz4heFFCbZ@C{FrXMIbYzu>?Bi-|vZ}JSFU%JA>7$7et
+z0Yo%CnOVZm#ZA}4kWZOn15};h5*#OM3b+6vHzgruMP>=5MNJK1y42{YgveP-!j%#(
+z0rGe@8t%!=66Ti%K4|Gx=o7gFp83wQ;+s3H7+r^SKlpp3KKcr!3@|n;NCH_=qL=3T
+zq3WH?en`b+W-HR-fnrhw*9aZ%M}lHX7@H?E>!6wv_&YQFEHdA$%Z1R--yub>=c@p?
+z6@7Fc$&>sAxwiz{BE$1kb$K9Co=ozlA973y^i(^BM|EZ$$^y`0KyHiMJ%O*XbfEX1
+ziZaH>W(1pWL0bo|T!x__N$^$DpmxI=bL6WUK3JGyn?rw-qC4ZA$yGjIB}N(=ldD2O
+zAJ@bxp<qR-3lIv<!P~SE8r*#_Ckl?$0|1fZ>2>n}u*mUIYFd>}O_wuwBD^r9<#=!0
+X1LGbT_rSOZ#yv3ZfpHH!G!Og(1Xg~J
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c
+new file mode 100644
+index 0000000000..ff83db095b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c
+@@ -0,0 +1,14 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++void bootblock_mainboard_early_init(void)
++{
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++			| COMB_LPC_EN | COMA_LPC_EN);
++	mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c
+new file mode 100644
+index 0000000000..f76b93d9f0
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c
+@@ -0,0 +1,195 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_NATIVE,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_GPIO,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_GPIO,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_NATIVE,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_GPIO,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio3 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio12 = GPIO_DIR_OUTPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_INPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++	.gpio30 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio12 = GPIO_LEVEL_HIGH,
++	.gpio30 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio8 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_NATIVE,
++	.gpio46 = GPIO_MODE_GPIO,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_NATIVE,
++	.gpio50 = GPIO_MODE_GPIO,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_GPIO,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_GPIO,
++	.gpio56 = GPIO_MODE_GPIO,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_OUTPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_OUTPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio46 = GPIO_DIR_OUTPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio50 = GPIO_DIR_OUTPUT,
++	.gpio51 = GPIO_DIR_OUTPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio53 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio55 = GPIO_DIR_OUTPUT,
++	.gpio56 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio34 = GPIO_LEVEL_LOW,
++	.gpio37 = GPIO_LEVEL_LOW,
++	.gpio46 = GPIO_LEVEL_HIGH,
++	.gpio50 = GPIO_LEVEL_HIGH,
++	.gpio51 = GPIO_LEVEL_LOW,
++	.gpio55 = GPIO_LEVEL_LOW,
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_NATIVE,
++	.gpio69 = GPIO_MODE_NATIVE,
++	.gpio70 = GPIO_MODE_NATIVE,
++	.gpio71 = GPIO_MODE_NATIVE,
++	.gpio72 = GPIO_MODE_NATIVE,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_GPIO,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio74 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c
+new file mode 100644
+index 0000000000..0bc6c35a63
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
++	0x1028049b,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x1028049b),
++	AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++	AZALIA_PIN_CFG(0, 0x11, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0xd5a30130),
++
++	0x80862805,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb
+new file mode 100644
+index 0000000000..3f55bfd49d
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb
+@@ -0,0 +1,39 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++	device domain 0 on
++		subsystemid 0x1028 0x049b inherit
++
++		device ref igd on
++			register "gpu_cpu_backlight" = "0x00000c31"
++			register "gpu_pch_backlight" = "0x13121312"
++		end
++
++		chip southbridge/intel/bd82x6x
++			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 1, 0 }"
++			register "usb_port_config" = "{
++				{ 1, 1, 0 },
++				{ 1, 1, 0 },
++				{ 1, 1, 1 },
++				{ 1, 1, 1 },
++				{ 1, 1, 2 },
++				{ 1, 1, 2 },
++				{ 1, 1, 3 },
++				{ 1, 1, 3 },
++				{ 1, 1, 5 },
++				{ 1, 1, 5 },
++				{ 1, 1, 7 },
++				{ 1, 1, 6 },
++				{ 1, 1, 6 },
++				{ 1, 1, 7 },
++			}"
++
++			device ref gbe off end
++			device ref pcie_rp4 off end
++			device ref pcie_rp7 on end # Broadcom BCM5761 Gigabit Ethernet
++			device ref sata1 on
++				register "sata_port_map" = "0x3b"
++			end
++		end
++	end
++end
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0024-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch b/config/coreboot/default/patches/0024-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch
new file mode 100644
index 00000000..0b731f5a
--- /dev/null
+++ b/config/coreboot/default/patches/0024-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch
@@ -0,0 +1,435 @@
+From 5ebb21be501cf43d41d1690c29d047bd98fbc942 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Wed, 7 Feb 2024 15:23:46 -0700
+Subject: [PATCH 24/39] mb/dell: Add Latitude E6320 (Sandy Bridge)
+
+Mainboard is PAL70/LA-6611P. I do not physically have this system;
+someone with physical access to one sent me the output of autoport which
+I then modified to produce this port. I was also sent the VBT binary,
+which was obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running
+version A22 of the vendor firmware. This port has not been tested.
+
+The EC is the SMSC MEC5055, which seems to be compatible with the
+existing MEC5035 code. As with the other Dell systems with this EC, this
+board is assumed to be internally flashable using an EC command that
+tells it to pull the FDO pin low on the next boot, which also tells the
+vendor firmware to disable all write protections to the flash [1].
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: I5905f8c6a8dbad56e03bdeedc2179600d0c4ba46
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig   |  11 +-
+ .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
+ .../snb_ivb_latitude/variants/e6320/data.vbt  | Bin 0 -> 6144 bytes
+ .../variants/e6320/early_init.c               |  17 ++
+ .../snb_ivb_latitude/variants/e6320/gpio.c    | 190 ++++++++++++++++++
+ .../variants/e6320/hda_verb.c                 |  32 +++
+ .../variants/e6320/overridetree.cb            |  35 ++++
+ 7 files changed, 287 insertions(+), 1 deletion(-)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index e6a21ffb99..84ffe1d33a 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -27,6 +27,12 @@ config BOARD_DELL_LATITUDE_E5520
+ 	select BOARD_ROMSIZE_KB_6144
+ 	select SOUTHBRIDGE_INTEL_BD82X6X
+ 
++config BOARD_DELL_LATITUDE_E6320
++	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++	select BOARD_ROMSIZE_KB_10240
++	select MAINBOARD_USES_IFD_GBE_REGION
++	select SOUTHBRIDGE_INTEL_BD82X6X
++
+ config BOARD_DELL_LATITUDE_E6420
+ 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ 	select BOARD_ROMSIZE_KB_10240
+@@ -67,6 +73,7 @@ config MAINBOARD_DIR
+ config MAINBOARD_PART_NUMBER
+ 	default "Latitude E5420" if BOARD_DELL_LATITUDE_E5420
+ 	default "Latitude E5520" if BOARD_DELL_LATITUDE_E5520
++	default "Latitude E6320" if BOARD_DELL_LATITUDE_E6320
+ 	default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
+ 	default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
+ 	default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
+@@ -82,6 +89,7 @@ config USBDEBUG_HCD_INDEX
+ config VARIANT_DIR
+ 	default "e5420" if BOARD_DELL_LATITUDE_E5420
+ 	default "e5520" if BOARD_DELL_LATITUDE_E5520
++	default "e6320" if BOARD_DELL_LATITUDE_E6320
+ 	default "e6420" if BOARD_DELL_LATITUDE_E6420
+ 	default "e6520" if BOARD_DELL_LATITUDE_E6520
+ 	default "e5530" if BOARD_DELL_LATITUDE_E5530
+@@ -93,7 +101,8 @@ config VGA_BIOS_ID
+ 		|| BOARD_DELL_LATITUDE_E5420
+ 	default "8086,0166" if BOARD_DELL_LATITUDE_E5530
+ 	default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \
+-		|| BOARD_DELL_LATITUDE_E5520
++		|| BOARD_DELL_LATITUDE_E5520 \
++		|| BOARD_DELL_LATITUDE_E6320
+ 	default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
+ 		|| BOARD_DELL_LATITUDE_E6530
+ 
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index a3fa2b1837..ef6a1329a9 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -6,6 +6,9 @@ config BOARD_DELL_LATITUDE_E5420
+ config BOARD_DELL_LATITUDE_E5520
+ 	bool "Latitude E5520"
+ 
++config BOARD_DELL_LATITUDE_E6320
++	bool "Latitude E6320"
++
+ config BOARD_DELL_LATITUDE_E6420
+ 	bool "Latitude E6420"
+ 
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..471a9e29da639dd496f3ecebd5d0754a9045c00b
+GIT binary patch
+literal 6144
+zcmeHKeP|p-6#wn*-rZ(yH@R-odPzTgZEU>S#_pv}j2iKhT+^%8_DtJw21|4GP8*0x
+zyw;EYW49Xozz<Rt@ek1mic(N32r8oZ0U9lcR8a)~s33wLV8yCftLK~DJJWb)8w-j;
+z=J?H<nfK<+n>TOX?48xuwV5_`Zb)3w)w?dSc1`nTL|NF_SMw&<<)v%g#!cH2otrzi
+zb*<mneJMSLdC1iK_7#v-6w7R}+t1&W8P4wBo*&F!lcNn?)F-EqWZV#oQEb%`x-4^5
+zW@sogOik1`n9Wc#r82|0A!=-0LD!FFGrMwG+CDg($q(js(#Y`8?s79ubEJD@ba#I6
+znjO0++P#czvh8NBR?)iQUA%txNPhHO>Kq!PUMaJadUHE-`5SWCb4_6i;5Aj(6hQGK
+zcq^2uUt5sS5YSMiL+CJcs0#cVOdTN|K@D>?tkF=dqenwjM^Z-^K2z~&z+xRs!o^Jx
+zkUGd?>QtXw8V(I09OiMb0DZy>`=tO^#BCssw{}bkOnj=#Ic!~!6!J*{`jbEv5O4)-
+zg-UBlIa$c9Pg4C;0_-wq3t+dbZfn1wBi@zhNnWx()w{Vb-G8OC_m*478gTrX3U*a1
+zHr@y<Lcbct?Wzy^)OH+FC$S`8V@n`{QN~@2dxJU-1ucBe_>rOO78dFPXES1q3mHj9
+zFXKwa)r^}Mw=nKzJjj?}>}NdBc$G29IK=pr@de`u;}}D$5~yYbw&Hlf=OF0X?I=Y$
+z$D`mgy>}U$hl}G6m&PmXveHnY5DenC!g~=E3i?HIrEpyk>_(-IsVtEqUEoqxrDFdq
+zrYwhOv0o^NgW$OKN}=$7Z-w5*Vuv?T3~uuFGwP92?Qr8n0iQp=u*7rep9Q8dW#?ZI
+zFly1ww^^l*+YC6t16l_{g}tVVpVZ0fDk%5+`|+*688vr-<Lw_SRc^+avHI{BCpdYb
+z70yLEI0-45%t;z||GKzov+|VFW6hab&NAG9FD+h6sBu$cX`r0eJ%T`kvK4+(wT`0=
+z$fxKG+om?Ge1-EhbNc*Xjy1opKZSaiv-EL~GvOa&&bx~z##3W;F2{b=<HQ4!<1CFk
+z17i)$X+`=C=0udOPOx3$IjzopqwQzLr*jT4C)(jmj2>uYP8$M=#caX6OWA1Ez395U
+z%x<yAs)6-Ascr5<x*>CIZibyRlE~I0-ianVaz~q|EMlL7hc1U5w?}Kekws6fyy@`e
+z4NdX%L#2`A#c_N4ftGmuwbDo=incwf=WnBJk6)fYz%6Cmy>HwK$Y|iP`Y7sgjDPhQ
+zR|wv367k}1g)-G@kXq(X;{Bjt998b9{cpD9zGhOQ5%$4OSMtc2(<dx@0O}7_G+$WF
+zLYyaPtFT6d*e&Q$VLd0r%Yr@=*7rjEDyT7JwT8sSA<BiU8$)7mh@K2tFNMULA^I|8
+z{Sp#>gO(fCMTS^w(6xrO#}IcK^sHgMZis^heP>uIf6|z=%Cy#)Vxvjdo7U~7*k{rU
+zruB{~J}~KL(+X9Kxz*-5M>NNGSaIfXi19({d4mrk?K50@R0%Wn*PP9d(MMIzI2~RX
+z)(4h&8(YL@UyKJ*)4o${n5ZGd(hDf+)cv8sSBxWen|f*u<-sgt(u+U-bkd}Tj+5@9
+zJosfSdvPo8zGnluemJg=E7A{=N<Rc#KYYEg?^p`+_?~aU(kEmFus{DshA~iA(onLY
+zvIfpBJt;KWP4n8&`n1##c($WnDo|=?rlHBz&}36&HPWwp8op_i8c-**(TSd{Y{SZ?
+z_=^K$27e+q;^vRNU3~a=cd;V{%O=iuo*&xwXyg19${Ap0yO@a|N-<e^7iIClF{vUn
+z&4$y_V7MA)=E=%7n63u!J9FY$RK8hXHDE%%Lx$ZgX902-<9r|4lkx>QwFch>PUO1w
+z=6JffnB-kQ)VLb>sSZdDrI@U2!?HLA9Mlek!*k>;&jx<)xfnBiY^I6DRt*l*`n8ly
+zu!h)b?sRV1==Nf*Cw9&&i7n^9Nts>wk>adaY&E5OdW*A?iI}v+E6GGlsR<+#%jpl^
+zGz<Q^vpj>qhDjj3zr60Bgh=l{NzJp$x#fCR%*8!ZR?fC&JuvHmSr5#5VAcb(9+>sO
+IzvhA80TAzedH?_b
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c
+new file mode 100644
+index 0000000000..b0c4638858
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c
+@@ -0,0 +1,17 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++const struct southbridge_usb_port mainboard_usb_ports[] = {
++};
++
++void bootblock_mainboard_early_init(void)
++{
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++			| COMB_LPC_EN | COMA_LPC_EN);
++	mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c
+new file mode 100644
+index 0000000000..61f01816c4
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c
+@@ -0,0 +1,190 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_NATIVE,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_NATIVE,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_GPIO,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_INPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++	.gpio30 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio30 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio8 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_GPIO,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_OUTPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio45 = GPIO_DIR_OUTPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_OUTPUT,
++	.gpio51 = GPIO_DIR_INPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio34 = GPIO_LEVEL_HIGH,
++	.gpio45 = GPIO_LEVEL_LOW,
++	.gpio49 = GPIO_LEVEL_LOW,
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_GPIO,
++	.gpio71 = GPIO_MODE_GPIO,
++	.gpio72 = GPIO_MODE_NATIVE,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_NATIVE,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio68 = GPIO_DIR_INPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio70 = GPIO_DIR_INPUT,
++	.gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c
+new file mode 100644
+index 0000000000..2e3f7fa697
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
++	0x10280492,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x10280492),
++	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
++	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++	0x80862805,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb
+new file mode 100644
+index 0000000000..3bfe6b57ed
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb
+@@ -0,0 +1,35 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++	device domain 0 on
++		subsystemid 0x1028 0x0492 inherit
++
++		device ref igd on
++			register "gpu_cpu_backlight" = "0x00000622"
++			register "gpu_pch_backlight" = "0x13121312"
++		end
++
++		chip southbridge/intel/bd82x6x
++			register "usb_port_config" = "{
++				{ 1, 1, 0 },
++				{ 1, 0, 0 },
++				{ 1, 1, 1 },
++				{ 1, 0, 1 },
++				{ 1, 1, 2 },
++				{ 1, 1, 2 },
++				{ 1, 1, 3 },
++				{ 1, 1, 3 },
++				{ 1, 0, 5 },
++				{ 1, 0, 5 },
++				{ 1, 1, 7 },
++				{ 1, 1, 6 },
++				{ 1, 0, 6 },
++				{ 1, 0, 7 },
++			}"
++
++			device ref sata1 on
++				register "sata_port_map" = "0x3b"
++			end
++		end
++	end
++end
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0025-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch b/config/coreboot/default/patches/0025-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch
new file mode 100644
index 00000000..0df0a822
--- /dev/null
+++ b/config/coreboot/default/patches/0025-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch
@@ -0,0 +1,438 @@
+From fbe48205a55b4a03082affe9f66e81ee509d5f44 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 8 Mar 2024 09:27:36 -0700
+Subject: [PATCH 25/39] mb/dell: Add Latitude E6220 (Sandy Bridge)
+
+Mainboard is codenamed Vida. I do not physically have this system;
+someone with physical access to one sent me the output of autoport which
+I then modified to produce this port. The VBT was obtained using
+intelvbttool while running version A14 (latest available version) of the
+vendor firmware.
+
+Tested and found to boot as part of a libreboot build based on upstream
+coreboot commit b7341da191 with additional patches, though these do not
+appear to affect SNB/IVB. The base E6430 patch was tested against
+coreboot main.
+
+The EC is the SMSC MEC5055, which seems to be compatible with the
+existing MEC5035 code. As with the other Dell systems with this EC, this
+board is assumed to be internally flashable using an EC command that
+tells it to pull the FDO pin low on the next boot, which also tells the
+vendor firmware to disable all write protections to the flash [1].
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: I570023b0837521b75aac6d5652c74030c06b8a4c
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig   |   9 +
+ .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
+ .../snb_ivb_latitude/variants/e6220/data.vbt  | Bin 0 -> 3985 bytes
+ .../variants/e6220/early_init.c               |  14 ++
+ .../snb_ivb_latitude/variants/e6220/gpio.c    | 192 ++++++++++++++++++
+ .../variants/e6220/hda_verb.c                 |  32 +++
+ .../variants/e6220/overridetree.cb            |  37 ++++
+ 7 files changed, 287 insertions(+)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index 84ffe1d33a..baa83baa41 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -27,6 +27,12 @@ config BOARD_DELL_LATITUDE_E5520
+ 	select BOARD_ROMSIZE_KB_6144
+ 	select SOUTHBRIDGE_INTEL_BD82X6X
+ 
++config BOARD_DELL_LATITUDE_E6220
++	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++	select BOARD_ROMSIZE_KB_10240
++	select MAINBOARD_USES_IFD_GBE_REGION
++	select SOUTHBRIDGE_INTEL_BD82X6X
++
+ config BOARD_DELL_LATITUDE_E6320
+ 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ 	select BOARD_ROMSIZE_KB_10240
+@@ -73,6 +79,7 @@ config MAINBOARD_DIR
+ config MAINBOARD_PART_NUMBER
+ 	default "Latitude E5420" if BOARD_DELL_LATITUDE_E5420
+ 	default "Latitude E5520" if BOARD_DELL_LATITUDE_E5520
++	default "Latitude E6220" if BOARD_DELL_LATITUDE_E6220
+ 	default "Latitude E6320" if BOARD_DELL_LATITUDE_E6320
+ 	default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
+ 	default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
+@@ -89,6 +96,7 @@ config USBDEBUG_HCD_INDEX
+ config VARIANT_DIR
+ 	default "e5420" if BOARD_DELL_LATITUDE_E5420
+ 	default "e5520" if BOARD_DELL_LATITUDE_E5520
++	default "e6220" if BOARD_DELL_LATITUDE_E6220
+ 	default "e6320" if BOARD_DELL_LATITUDE_E6320
+ 	default "e6420" if BOARD_DELL_LATITUDE_E6420
+ 	default "e6520" if BOARD_DELL_LATITUDE_E6520
+@@ -102,6 +110,7 @@ config VGA_BIOS_ID
+ 	default "8086,0166" if BOARD_DELL_LATITUDE_E5530
+ 	default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \
+ 		|| BOARD_DELL_LATITUDE_E5520 \
++		|| BOARD_DELL_LATITUDE_E6220 \
+ 		|| BOARD_DELL_LATITUDE_E6320
+ 	default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
+ 		|| BOARD_DELL_LATITUDE_E6530
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index ef6a1329a9..349ee7f79e 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -6,6 +6,9 @@ config BOARD_DELL_LATITUDE_E5420
+ config BOARD_DELL_LATITUDE_E5520
+ 	bool "Latitude E5520"
+ 
++config BOARD_DELL_LATITUDE_E6220
++	bool "Latitude E6220"
++
+ config BOARD_DELL_LATITUDE_E6320
+ 	bool "Latitude E6320"
+ 
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..548075a74500b5d159108089ee29cff802d07db7
+GIT binary patch
+literal 3985
+zcmdT{eP|p-6#wn*-rZ(yH@R-odPzTgZQ6LXjonL|7&YQ0xu#d`$C=h}21|4GP8*0x
+zyjE@hv0Dv(P?c0g{G(_DMJZ@22r8oZ0U9lcR8a)~s33wOSg|T<^?b8?XBzL?#)6`A
+z{N~Nfd-LYan>TOv7WZ{+rcIq264!S1u1&02-MpSC3mf}u-r~BvbgkXEX=|c$bLZBs
+zbsM{{q9-s1nVR3f2C|A`nJsqvC7UwC+1=angV`H%w4sao<P?&OTVpYbtz1OwGuLN^
+zhBCv{M16zV3^h|KGn^Zu#@6L@%V;*UGnb`pgTtBpU~UJE3=i!tH{%>fx<^KL=Lc`x
+zzLTQeOW7vdZsuwwtsUOU>vxajM=zqzp&{y(GCQa@w<DLoHJ81}6s7=PS9MJR6hDG@
+zLaF+#1qlrS4OKdX4nv2kz^}p75z-OVFk8cF4b?h&G(>eIb%fzF6`uwy)UhaB+ynus
+zBRr-~^|__t=m5fD9tR81r@XLV3UEc-2I6>o`;@@MXS$rj)&)r+pA?|K2vh+9SHM=N
+zw3d{Uh1~iK)juV`E`v4?cFU@^_DehBU5TFLmFrTyoBPuJ*ExIdxO1!lC!eceSG8i}
+z&A<Zmt5Mvo`mkSZ$5C|>ivl*T2}Cf;*vEJvsN-nR!WWDm8M<y^zAkV9BgVLlk!18T
+zu4CN5*u}VmaUbIm#suRa;|0cRj7i2(#%GK#8OIsFFtjRxYDQoSP8NI)g09_;Qlzsy
+z3O>^Zmcltu96wMRudvHXLxn;xh~EqEM^Gr}m&=vHbwRKjl{%)fM2d8tOI4MM{l!dK
+z4$)%2P!LDJaqX2t;s4$Wy@Q1gZ=x97<n3qFBc<Bm#;F26e|~<6=hD9lOk>K<zaU`L
+zqML8CN*#9@aDs=m4ulGOO%*?>lhsvF9`g6&TYocZ_JQN=A1hUE#+kAD@E9jJd7%}~
+zMLIYMDVoel8h1}$+_YJF%DJ&-O)X~`ZoroouO-yDsj)OrPU{{+ph4LJKdD;Bi3a3T
+zbe?Tf8&<r^`I<R>elW+H+t;5$y~|nhq{o@?k1^-Hg%jhcu{xJyzvgk`0m*Te#GQe$
+z2IjOP{U&oF$`&WsuJN2!=fTnT^W)PwhnW-Ya3)3%H!`OUfy6?#V9r%+wCY}TU0!Cl
+z*kjeex}MZl_aWVoxhXfp&Ur~>>k;onlO4II%~KY!FT|r)!;agdwcf~rXIAVwc6CEj
+zJpE{CBzZ;L-gdYp9)G<w5{aU1kLvl`XxrnL=MQj88F%j+w*oR6c&t8(di=t_dW<Us
+z?>C8f@wZ%=YBfkLb0_gZP%us?_tgG3TXJ7BDbWb~V23Mt{QT(?mOc#ihbo#YtY#rD
+z7PLiJBSP#J^tiB|7vdE`p9|}IA$}9o7_wSJ;))RELe^~|u{T6dhpd-F;;j&U6|#N}
+z3BN(h4C``3tTE^&!`fqrdks2dSZ^5Oh(X^Omdc+rCapBB)uz~J(k-TSw<-3U^rC6K
+zYl;s|`q{KX)nazFdEs%*@f}l~SsY?~kb2(WgGl=fm!43<O#L+%@MH9Gl`~Gq=7;rx
+zMc&31@YxsRfz-6`>>4I&2(k1$iaK?FYVZ}~h~1{1T|;>=%b4`yk3XF>siEVHyC@HS
+z8OvVW%DeB`K&~H7>f?&^gQU_A0oM<l8+N5oZ4)iV>;p0b*k61j!x*S5X(-unS`9rZ
+zG}=vb+R*x})DSq-Q7;uJwKLPuG`Ej6G}#nch4dSqhHo0B2Gq%HbgCyS+pwZ3{?fph
+z!Jo*Dxcw7v7a#rIU2IRmVn4KE$x~88+a7J4zd|_!%xo9z$+P;Q6qA*AQ5FvzlPW^f
+zY&aJUhO1#_o~&$x>1qJKGpC+K<(u_&1197<WZ2zu79e*q&i9c$DPNGYYw%s_L~d?x
+zj;EW8N#6BCjjMs5>VVWxipk10ERAEpLG3^|JWI~<Y~c5vi!sB;W|~-R<=`-_TSLhN
+zYlyAlPUkfn-CnHq)Xv2vv1R->DYG*_Qk)fwt)g^KZ*f*K5tEj9C7Ea`HGyPe8U4wd
+nX2Iz@%Q6UTm;}-X%j^D0i1fiT)I6)4TdrsMY}`L(<y7krryzQ}
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c
+new file mode 100644
+index 0000000000..ff83db095b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c
+@@ -0,0 +1,14 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++void bootblock_mainboard_early_init(void)
++{
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++			| COMB_LPC_EN | COMA_LPC_EN);
++	mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c
+new file mode 100644
+index 0000000000..2306e4cf0a
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c
+@@ -0,0 +1,192 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_GPIO,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_NATIVE,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_GPIO,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio1 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_INPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++	.gpio30 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio30 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio1 = GPIO_INVERT,
++	.gpio8 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_GPIO,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_OUTPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio45 = GPIO_DIR_OUTPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_OUTPUT,
++	.gpio51 = GPIO_DIR_INPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio34 = GPIO_LEVEL_HIGH,
++	.gpio45 = GPIO_LEVEL_LOW,
++	.gpio49 = GPIO_LEVEL_LOW,
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_GPIO,
++	.gpio71 = GPIO_MODE_GPIO,
++	.gpio72 = GPIO_MODE_NATIVE,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_NATIVE,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio68 = GPIO_DIR_INPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio70 = GPIO_DIR_INPUT,
++	.gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c
+new file mode 100644
+index 0000000000..0c69f0bd0e
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
++	0x102804a9,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x102804a9),
++	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
++	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++	0x80862805,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb
+new file mode 100644
+index 0000000000..9faf27e27b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb
+@@ -0,0 +1,37 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++	device domain 0 on
++		subsystemid 0x1028 0x04a9 inherit
++
++		device ref igd on
++			register "gpu_cpu_backlight" = "0x0000046a"
++			register "gpu_pch_backlight" = "0x13121312"
++		end
++
++		chip southbridge/intel/bd82x6x
++			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
++			register "usb_port_config" = "{
++				{ 1, 1, 0 },
++				{ 1, 0, 0 },
++				{ 1, 1, 1 },
++				{ 1, 0, 1 },
++				{ 1, 1, 2 },
++				{ 1, 1, 2 },
++				{ 1, 1, 3 },
++				{ 1, 1, 3 },
++				{ 1, 0, 5 },
++				{ 1, 0, 5 },
++				{ 1, 1, 7 },
++				{ 1, 1, 6 },
++				{ 1, 0, 6 },
++				{ 1, 0, 7 },
++			}"
++
++			device ref pcie_rp4 off end
++			device ref sata1 on
++				register "sata_port_map" = "0x3b"
++			end
++		end
++	end
++end
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch b/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch
new file mode 100644
index 00000000..c542ef86
--- /dev/null
+++ b/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch
@@ -0,0 +1,436 @@
+From 87e6f8bf38c5dcb4075d0df32507bf9151338b92 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 8 Mar 2024 09:33:03 -0700
+Subject: [PATCH 26/39] mb/dell: Add Latitude E6330 (Ivy Bridge)
+
+Mainboard is QAL70/LA-7741P. I do not physically have this system;
+someone with physical access to one sent me the output of autoport which
+I then modified to produce this port. I was also sent the VBT binary,
+which was obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running
+version A21 of the vendor firmware. This port has not been tested.
+
+The EC is the SMSC MEC5055, which seems to be compatible with the
+existing MEC5035 code. As with the other Dell systems with this EC, this
+board is assumed to be internally flashable using an EC command that
+tells it to pull the FDO pin low on the next boot, which also tells the
+vendor firmware to disable all write protections to the flash [1].
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: I827826e9ff8a9a534c50250458b399104478e06c
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig   |  11 +-
+ .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
+ .../snb_ivb_latitude/variants/e6330/data.vbt  | Bin 0 -> 6144 bytes
+ .../variants/e6330/early_init.c               |  14 ++
+ .../snb_ivb_latitude/variants/e6330/gpio.c    | 192 ++++++++++++++++++
+ .../variants/e6330/hda_verb.c                 |  32 +++
+ .../variants/e6330/overridetree.cb            |  37 ++++
+ 7 files changed, 288 insertions(+), 1 deletion(-)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index baa83baa41..49bf225fe2 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -56,6 +56,12 @@ config BOARD_DELL_LATITUDE_E5530
+ 	select BOARD_ROMSIZE_KB_12288
+ 	select SOUTHBRIDGE_INTEL_C216
+ 
++config BOARD_DELL_LATITUDE_E6330
++	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++	select BOARD_ROMSIZE_KB_12288
++	select MAINBOARD_USES_IFD_GBE_REGION
++	select SOUTHBRIDGE_INTEL_C216
++
+ config BOARD_DELL_LATITUDE_E6430
+ 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ 	select BOARD_ROMSIZE_KB_12288
+@@ -84,6 +90,7 @@ config MAINBOARD_PART_NUMBER
+ 	default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
+ 	default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
+ 	default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
++	default "Latitude E6330" if BOARD_DELL_LATITUDE_E6330
+ 	default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
+ 	default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
+ 
+@@ -101,13 +108,15 @@ config VARIANT_DIR
+ 	default "e6420" if BOARD_DELL_LATITUDE_E6420
+ 	default "e6520" if BOARD_DELL_LATITUDE_E6520
+ 	default "e5530" if BOARD_DELL_LATITUDE_E5530
++	default "e6330" if BOARD_DELL_LATITUDE_E6330
+ 	default "e6430" if BOARD_DELL_LATITUDE_E6430
+ 	default "e6530" if BOARD_DELL_LATITUDE_E6530
+ 
+ config VGA_BIOS_ID
+ 	default "8086,0116" if BOARD_DELL_LATITUDE_E6520 \
+ 		|| BOARD_DELL_LATITUDE_E5420
+-	default "8086,0166" if BOARD_DELL_LATITUDE_E5530
++	default "8086,0166" if BOARD_DELL_LATITUDE_E5530 \
++		|| BOARD_DELL_LATITUDE_E6330
+ 	default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \
+ 		|| BOARD_DELL_LATITUDE_E5520 \
+ 		|| BOARD_DELL_LATITUDE_E6220 \
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index 349ee7f79e..d6fc8eb224 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -21,6 +21,9 @@ config BOARD_DELL_LATITUDE_E6520
+ config BOARD_DELL_LATITUDE_E5530
+ 	bool "Latitude E5530"
+ 
++config BOARD_DELL_LATITUDE_E6330
++	bool "Latitude E6330"
++
+ config BOARD_DELL_LATITUDE_E6430
+ 	bool "Latitude E6430"
+ 
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..18856746656058651c571ecbb3708e0543b19d62
+GIT binary patch
+literal 6144
+zcmeHKU2GiH75-*tc6WAmW_LYygMSkDB*E^Q*zv5f7dLg)@$NQV2a{}!yImnfyvQ4D
+z;n-$v0!RpNi<_o@ktI-@2a590stC0zRi%iRR%stvi&hAs3R<K}X~hFddB_6@s8W`5
+zXJ!q~E{TOme<a`8@BW;7?l<?GIp@yo&H2<M-FZ0GKbBAR-Ekx}HvVOrhK1*2?{QsU
+zQe#K%JeC=q96gpAKa#$keu^D99ee*0FfB=@F_0J<9-Ch-&BZ5r1T6`{$;1%Fm+qfk
+zTr5pfAz@KB*NGlFzEGx2aqh%IxkQOuX*`{wy~+KQo+-}XSE7aaxko77OBtFgoh;4K
+z(#-7f<x+WxmKSK)vQFgtt^L+?s+Z<V57E7|^TqOPX{mn0n<VLl#Yf7s_suL*Jl#VB
+zmSyz~ScwEVTc-3vd2v6D&dt$;&{?91(o(5>vNXNl&<qW@AghW5NPYw#ha~-b0Dc7_
+z6}t(eHgpwn6<HNi1Vcp^p-07-iXve~MTs!0A_ku!`4nKciajxJYXsOYuuT4N%smA!
+zPazgl&bNRSrvAz|_6r3+B;r1=!7D;RUUw8Ke+vNt7E3`(BA-woPvJFBK^3Gzfh4Nk
+zOX!J0PJNB)Mk&Z_i?S2ez+iItz=)m79LydX&rM9`3wPaJ`T92=Uv0;g-!<4*M6z%+
+z*omwb#VI+CU&%iFS{_DGS;sE}7G4juqRMCww!+k6=+abJj4v>Dsr*z_6HAP5GJeST
+znX2JD;{xLa#;c6KGychVn-L6YXkv6Qx)}Y8&ok1DI~ZSM6dCt39%QUAzRh@o@gqjy
+zL0qZ&DhN8ZR3xu$a$Cd{oasU3DNp{CCl6f~PYlq!Hte;Ia0^wn8Vut7>Wl1)s`^E-
+z1DhGx<x<9D%6jd%)5>zr8&7h}dMJ3~YBe;)!vVf-T&?{PoMvvRR{!67;Xhz^g^loX
+zja+*c-KJJoxbsm3pTE4THs`cgD{Pt+ga3en-i$P#9Wsra(oqRMr;H$4{gxr)9eF(x
+zg0v@a7aj}rA^Kf#sNb*>at^>P)5li%ycOq*4e;3~RUj$i1e8=rHi&<Y^Hc>Y_gP4=
+zxz9^%q0dLXqC&Bq<&sDScZwvatjRxB=rcJJiYb?w#4Iy2KTk1F6T>T}E@(DNGa>5R
+z7&Yv)JdHrRI};pfsKLVj=FE=U*=*T4#ncVktknoGelT||SDY`+9WI_IZE<i@7SnC8
+zN6~Gyo=&><wpzE~>`_>@wb<-RI-lu(_~Oy_Zo6={Cdq!uw(fmyz_u^cB&~5IS7g`U
+zdUC}N$J5-C)|`CfUO+?xptr@*hJW$ZhBZk%JaMh_<8!ZGj)z*WU9fcg2`>dT##_?q
+z=Ksx}uxo3jTHTq%E1}97UECE@r}nt3I=3R(HOL7jNg>teSM-g$aU#`3jk}#qh;D?6
+zw=CYuA2#mS+vU%0P&u8RCn4)$8VH-2uy#01%VG0WSX&Fz`LMYj)?N<NyJ1t)wHBQY
+z=;pYt<#l>gH_zzWS)G2Pn=k3wYdU|DnWmxbG$>`5lZJMWL92%O14BD!(C-cNFNXFH
+zgVc!G9?@=&(4mNVcSJiLq3=b^rz6@k5qdFVUW{m$A{2|7d!kxz)VSrcQt@4sDoq^f
+z98hXm=YS~qbf<kwigD|YevaR}^`7Jy^x~4_g75ka=c0r}VJF2aEv{=ilPf-mNQBNI
+zEMK3YKB+`*xOu>iR|LbzHLa*mLXlH${^b4c9%>9%)HO-?LA1gT0mlz!M}8&;(;^x|
+z*H2<VyY>2;juB|7F+k?y(_2~3@STqQ@f^sqD2c8g3x>ciM%siMq~;pKwfE57kw2K@
+z!-ZN0QTVOP@aA5@fEGKjy2+D`t?2KzpPyRQ`JcmHJoc(<#h<UT;@W$t_d{|;S>vyF
+zewtgef*II~y;k>*B!+(8*blXsY-~kcJa9zG2yfcMCt+|-0ex$pY`h1<*#rEv=~*<+
+ztV``Um!q33-Aap9fUshX^N~GS2@X3^U9+MwgYQ74^?~6&yU^#oY#cvC9R_}P2d<wN
+zJvOE)Xr7A2n#3x14}2_g(YN^0+oYDbb#|V{ze3pzGb9FiF#6Ra&L}bT(ZOvswS7RY
+zxLjWFRwWXHR5&={t;%K+Vkd6NX2iF<SF)LXv@y472OmG!_W%Ni*ZDuev-S0%b!dfW
+wz4{IL!+uT9t2XI4@_L@?Ri*bc_<n8A+wHaowmq=zfo%_LdtloGpN<DU00~N<ApigX
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c
+new file mode 100644
+index 0000000000..ff83db095b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c
+@@ -0,0 +1,14 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++void bootblock_mainboard_early_init(void)
++{
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++			| COMB_LPC_EN | COMA_LPC_EN);
++	mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c
+new file mode 100644
+index 0000000000..777570765a
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c
+@@ -0,0 +1,192 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_GPIO,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_GPIO,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_NATIVE,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio1 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio3 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_OUTPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio28 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++	.gpio30 = GPIO_RESET_RSMRST,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio8 = GPIO_INVERT,
++	.gpio13 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_GPIO,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_OUTPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio45 = GPIO_DIR_OUTPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_INPUT,
++	.gpio51 = GPIO_DIR_INPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio34 = GPIO_LEVEL_HIGH,
++	.gpio45 = GPIO_LEVEL_LOW,
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_GPIO,
++	.gpio71 = GPIO_MODE_GPIO,
++	.gpio72 = GPIO_MODE_NATIVE,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_NATIVE,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio68 = GPIO_DIR_INPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio70 = GPIO_DIR_INPUT,
++	.gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c
+new file mode 100644
+index 0000000000..804733b172
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d76df,	/* Codec Vendor / Device ID: IDT */
++	0x10280533,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x10280533),
++	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
++	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++	0x80862806,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb
+new file mode 100644
+index 0000000000..4125159367
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb
+@@ -0,0 +1,37 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++	device domain 0 on
++		subsystemid 0x1028 0x0533 inherit
++
++		device ref igd on
++			register "gpu_cpu_backlight" = "0x00001312"
++			register "gpu_pch_backlight" = "0x13121312"
++		end
++
++		chip southbridge/intel/bd82x6x
++			register "usb_port_config" = "{
++				{ 1, 2, 0 },
++				{ 1, 0, 0 },
++				{ 1, 0, 1 },
++				{ 1, 1, 1 },
++				{ 1, 1, 2 },
++				{ 1, 1, 2 },
++				{ 1, 2, 3 },
++				{ 1, 2, 3 },
++				{ 1, 2, 4 },
++				{ 1, 1, 4 },
++				{ 1, 1, 5 },
++				{ 1, 1, 5 },
++				{ 1, 2, 6 },
++				{ 1, 0, 6 },
++			}"
++
++			device ref xhci on
++				register "superspeed_capable_ports" = "0x0000000f"
++				register "xhci_overcurrent_mapping" = "0x00000c03"
++				register "xhci_switchable_ports" = "0x0000000f"
++			end
++		end
++	end
++end
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch b/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
deleted file mode 100644
index 33d743f1..00000000
--- a/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
+++ /dev/null
@@ -1,792 +0,0 @@
-From 973783a989cdcb7b77029e369156c81eefe8cc67 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sat, 19 Aug 2023 16:19:10 -0600
-Subject: [PATCH 26/30] mb/dell: Add Latitude E6530 (Ivy Bridge)
-
-Mainboard is QALA0/LA-7761P (UMA). The dGPU model was not tested.  This
-is based on the autoport output with some manual tweaks. The flash is
-8MiB + 4MiB. It can be internally flashed by sending a command to the
-EC, which causes the EC to pull the FDO pin low and the firmware to skip
-setting up any chipset based write protections. [1] The EC is the SMSC
-MEC5055, which seems to be compatible with the existing MEC5035 code.
-
-[1] https://gitlab.com/nic3-14159/dell-flash-unlock
-
-Change-Id: I93c6622fc5da1d0d61a5b2c197ac7227d9525908
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e6530/Kconfig           |  37 ++++
- src/mainboard/dell/e6530/Kconfig.name      |   2 +
- src/mainboard/dell/e6530/Makefile.inc      |   6 +
- src/mainboard/dell/e6530/acpi/ec.asl       |   9 +
- src/mainboard/dell/e6530/acpi/platform.asl |  12 ++
- src/mainboard/dell/e6530/acpi/superio.asl  |   3 +
- src/mainboard/dell/e6530/acpi_tables.c     |  16 ++
- src/mainboard/dell/e6530/board_info.txt    |   6 +
- src/mainboard/dell/e6530/cmos.default      |   9 +
- src/mainboard/dell/e6530/cmos.layout       |  88 ++++++++++
- src/mainboard/dell/e6530/data.vbt          | Bin 0 -> 4280 bytes
- src/mainboard/dell/e6530/devicetree.cb     |  68 ++++++++
- src/mainboard/dell/e6530/dsdt.asl          |  30 ++++
- src/mainboard/dell/e6530/early_init.c      |  38 ++++
- src/mainboard/dell/e6530/gma-mainboard.ads |  20 +++
- src/mainboard/dell/e6530/gpio.c            | 192 +++++++++++++++++++++
- src/mainboard/dell/e6530/hda_verb.c        |  33 ++++
- src/mainboard/dell/e6530/mainboard.c       |  21 +++
- 18 files changed, 590 insertions(+)
- create mode 100644 src/mainboard/dell/e6530/Kconfig
- create mode 100644 src/mainboard/dell/e6530/Kconfig.name
- create mode 100644 src/mainboard/dell/e6530/Makefile.inc
- create mode 100644 src/mainboard/dell/e6530/acpi/ec.asl
- create mode 100644 src/mainboard/dell/e6530/acpi/platform.asl
- create mode 100644 src/mainboard/dell/e6530/acpi/superio.asl
- create mode 100644 src/mainboard/dell/e6530/acpi_tables.c
- create mode 100644 src/mainboard/dell/e6530/board_info.txt
- create mode 100644 src/mainboard/dell/e6530/cmos.default
- create mode 100644 src/mainboard/dell/e6530/cmos.layout
- create mode 100644 src/mainboard/dell/e6530/data.vbt
- create mode 100644 src/mainboard/dell/e6530/devicetree.cb
- create mode 100644 src/mainboard/dell/e6530/dsdt.asl
- create mode 100644 src/mainboard/dell/e6530/early_init.c
- create mode 100644 src/mainboard/dell/e6530/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/e6530/gpio.c
- create mode 100644 src/mainboard/dell/e6530/hda_verb.c
- create mode 100644 src/mainboard/dell/e6530/mainboard.c
-
-diff --git a/src/mainboard/dell/e6530/Kconfig b/src/mainboard/dell/e6530/Kconfig
-new file mode 100644
-index 0000000000..582adddbd4
---- /dev/null
-+++ b/src/mainboard/dell/e6530/Kconfig
-@@ -0,0 +1,37 @@
-+if BOARD_DELL_LATITUDE_E6530
-+
-+config BOARD_SPECIFIC_OPTIONS
-+	def_bool y
-+	select BOARD_ROMSIZE_KB_12288
-+	select EC_ACPI
-+	select EC_DELL_MEC5035
-+	select GFX_GMA_PANEL_1_ON_LVDS
-+	select HAVE_ACPI_RESUME
-+	select HAVE_ACPI_TABLES
-+	select HAVE_CMOS_DEFAULT
-+	select HAVE_OPTION_TABLE
-+	select INTEL_GMA_HAVE_VBT
-+	select INTEL_INT15
-+	select MAINBOARD_HAS_LIBGFXINIT
-+	select MAINBOARD_USES_IFD_GBE_REGION
-+	select NORTHBRIDGE_INTEL_SANDYBRIDGE
-+	select SERIRQ_CONTINUOUS_MODE
-+	select SOUTHBRIDGE_INTEL_C216
-+	select SYSTEM_TYPE_LAPTOP
-+	select USE_NATIVE_RAMINIT
-+
-+config MAINBOARD_DIR
-+	default "dell/e6530"
-+
-+config MAINBOARD_PART_NUMBER
-+	default "Latitude E6530"
-+
-+config VGA_BIOS_ID
-+	default "8086,0166"
-+
-+config DRAM_RESET_GATE_GPIO
-+	default 60
-+
-+config USBDEBUG_HCD_INDEX
-+	default 2
-+endif
-diff --git a/src/mainboard/dell/e6530/Kconfig.name b/src/mainboard/dell/e6530/Kconfig.name
-new file mode 100644
-index 0000000000..01ed76d107
---- /dev/null
-+++ b/src/mainboard/dell/e6530/Kconfig.name
-@@ -0,0 +1,2 @@
-+config BOARD_DELL_LATITUDE_E6530
-+	bool "Latitude E6530"
-diff --git a/src/mainboard/dell/e6530/Makefile.inc b/src/mainboard/dell/e6530/Makefile.inc
-new file mode 100644
-index 0000000000..ba64e93eb8
---- /dev/null
-+++ b/src/mainboard/dell/e6530/Makefile.inc
-@@ -0,0 +1,6 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+bootblock-y += early_init.c
-+bootblock-y += gpio.c
-+romstage-y += early_init.c
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/e6530/acpi/ec.asl b/src/mainboard/dell/e6530/acpi/ec.asl
-new file mode 100644
-index 0000000000..0d429410a9
---- /dev/null
-+++ b/src/mainboard/dell/e6530/acpi/ec.asl
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Device(EC)
-+{
-+	Name (_HID, EISAID("PNP0C09"))
-+	Name (_UID, 0)
-+	Name (_GPE, 16)
-+/* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e6530/acpi/platform.asl b/src/mainboard/dell/e6530/acpi/platform.asl
-new file mode 100644
-index 0000000000..2d24bbd9b9
---- /dev/null
-+++ b/src/mainboard/dell/e6530/acpi/platform.asl
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+	/* FIXME: EC support  */
-+	Return(Package() {0, 0})
-+}
-+
-+Method(_PTS,1)
-+{
-+	/* FIXME: EC support  */
-+}
-diff --git a/src/mainboard/dell/e6530/acpi/superio.asl b/src/mainboard/dell/e6530/acpi/superio.asl
-new file mode 100644
-index 0000000000..55b1db5b11
---- /dev/null
-+++ b/src/mainboard/dell/e6530/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <drivers/pc80/pc/ps2_controller.asl>
-diff --git a/src/mainboard/dell/e6530/acpi_tables.c b/src/mainboard/dell/e6530/acpi_tables.c
-new file mode 100644
-index 0000000000..e2759659bf
---- /dev/null
-+++ b/src/mainboard/dell/e6530/acpi_tables.c
-@@ -0,0 +1,16 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi_gnvs.h>
-+#include <soc/nvs.h>
-+
-+/* FIXME: check this function.  */
-+void mainboard_fill_gnvs(struct global_nvs *gnvs)
-+{
-+	/* The lid is open by default. */
-+	gnvs->lids = 1;
-+
-+	/* Temperature at which OS will shutdown */
-+	gnvs->tcrt = 100;
-+	/* Temperature at which OS will throttle CPU */
-+	gnvs->tpsv = 90;
-+}
-diff --git a/src/mainboard/dell/e6530/board_info.txt b/src/mainboard/dell/e6530/board_info.txt
-new file mode 100644
-index 0000000000..4601a4aaba
---- /dev/null
-+++ b/src/mainboard/dell/e6530/board_info.txt
-@@ -0,0 +1,6 @@
-+Category: laptop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2012
-diff --git a/src/mainboard/dell/e6530/cmos.default b/src/mainboard/dell/e6530/cmos.default
-new file mode 100644
-index 0000000000..279415dfd1
---- /dev/null
-+++ b/src/mainboard/dell/e6530/cmos.default
-@@ -0,0 +1,9 @@
-+boot_option=Fallback
-+debug_level=Debug
-+power_on_after_fail=Disable
-+nmi=Enable
-+bluetooth=Enable
-+wwan=Enable
-+wlan=Enable
-+sata_mode=AHCI
-+me_state=Disabled
-diff --git a/src/mainboard/dell/e6530/cmos.layout b/src/mainboard/dell/e6530/cmos.layout
-new file mode 100644
-index 0000000000..e85ea4c661
---- /dev/null
-+++ b/src/mainboard/dell/e6530/cmos.layout
-@@ -0,0 +1,88 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0	120	r	0	reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384	1	e	4	boot_option
-+388	4	h	0	reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395	4	e	6	debug_level
-+
-+#400	8	r	0	reserved for century byte
-+
-+# coreboot config options: southbridge
-+408	1	e	1	nmi
-+409	2	e	7	power_on_after_fail
-+411     1       e       9       sata_mode
-+
-+# coreboot config options: EC
-+412	1	e	1	bluetooth
-+413	1	e	1	wwan
-+415	1	e	1	wlan
-+
-+# coreboot config options: ME
-+424	1	e	14	me_state
-+425	2	h	0	me_state_prev
-+
-+# coreboot config options: northbridge
-+432	3	e	11	gfx_uma_size
-+435	2	e	12	hybrid_graphics_mode
-+440	8	h	0	volume
-+
-+# VBOOT
-+448	128	r	0	vbnv
-+
-+# SandyBridge MRC Scrambler Seed values
-+896	32	r	0	mrc_scrambler_seed
-+928	32	r	0	mrc_scrambler_seed_s3
-+960	16	r	0	mrc_scrambler_seed_chk
-+
-+# coreboot config options: check sums
-+984	16	h	0	check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID	value	text
-+1	0	Disable
-+1	1	Enable
-+2	0	Enable
-+2	1	Disable
-+4	0	Fallback
-+4	1	Normal
-+6	0	Emergency
-+6	1	Alert
-+6	2	Critical
-+6	3	Error
-+6	4	Warning
-+6	5	Notice
-+6	6	Info
-+6	7	Debug
-+6	8	Spew
-+7	0	Disable
-+7	1	Enable
-+7	2	Keep
-+9	0	AHCI
-+9	1	Compatible
-+11	0	32M
-+11	1	64M
-+11	2	96M
-+11	3	128M
-+11	4	160M
-+11	5	192M
-+11	6	224M
-+14	0	Normal
-+14	1	Disabled
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 447 984
-diff --git a/src/mainboard/dell/e6530/data.vbt b/src/mainboard/dell/e6530/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..af64a913d521fe240ce30e114e90fe75d3841bbc
-GIT binary patch
-literal 4280
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-
-diff --git a/src/mainboard/dell/e6530/devicetree.cb b/src/mainboard/dell/e6530/devicetree.cb
-new file mode 100644
-index 0000000000..96eed178c5
---- /dev/null
-+++ b/src/mainboard/dell/e6530/devicetree.cb
-@@ -0,0 +1,68 @@
-+chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
-+	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-+	register "gpu_cpu_backlight" = "0x00000251"
-+	register "gpu_dp_b_hotplug" = "4"
-+	register "gpu_dp_c_hotplug" = "4"
-+	register "gpu_dp_d_hotplug" = "4"
-+	register "gpu_panel_port_select" = "0"
-+	register "gpu_panel_power_backlight_off_delay" = "2300"
-+	register "gpu_panel_power_backlight_on_delay" = "2300"
-+	register "gpu_panel_power_cycle_delay" = "6"
-+	register "gpu_panel_power_down_delay" = "400"
-+	register "gpu_panel_power_up_delay" = "400"
-+	register "gpu_pch_backlight" = "0x13121312"
-+
-+	device domain 0x0 on
-+		subsystemid 0x1028 0x0535 inherit
-+
-+		device ref host_bridge on end # Host bridge
-+		device ref peg10 off end # PEG
-+		device ref igd on end # iGPU
-+
-+		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+			register "docking_supported" = "1"
-+			register "gen1_dec" = "0x007c0681"
-+			register "gen2_dec" = "0x005c0921"
-+			register "gen3_dec" = "0x003c07e1"
-+			register "gen4_dec" = "0x007c0901"
-+			register "gpi0_routing" = "2"
-+			register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
-+			register "pcie_port_coalesce" = "1"
-+			register "sata_interface_speed_support" = "0x3"
-+			register "sata_port_map" = "0x33"
-+			register "spi_lvscc" = "0x2005"
-+			register "spi_uvscc" = "0x2005"
-+			register "superspeed_capable_ports" = "0x0000000f"
-+			register "xhci_overcurrent_mapping" = "0x00000c03"
-+			register "xhci_switchable_ports" = "0x0000000f"
-+
-+			device ref xhci		on end # USB 3.0 Controller
-+			device ref mei1		off end # Management Engine Interface 1
-+			device ref mei2		off end # Management Engine Interface 2
-+			device ref me_ide_r	off end # Management Engine IDE-R
-+			device ref me_kt	on end # Management Engine KT
-+			device ref gbe		on end # Intel Gigabit Ethernet
-+			device ref ehci2	on end # USB2 EHCI #2
-+			device ref hda		on end # High Definition Audio
-+			device ref pcie_rp1	on end # PCIe Port #1
-+			device ref pcie_rp2	on end # PCIe Port #2
-+			device ref pcie_rp3	on end # PCIe Port #3
-+			device ref pcie_rp4	on end # PCIe Port #4
-+			device ref pcie_rp5	off end # PCIe Port #5
-+			device ref pcie_rp6	on end # PCIe Port #6
-+			device ref pcie_rp7	off end # PCIe Port #7
-+			device ref pcie_rp8	off end # PCIe Port #8
-+			device ref ehci1	on end # USB2 EHCI #1
-+			device ref pci_bridge	off end # PCI bridge
-+			device ref lpc		on # LPC bridge
-+				chip ec/dell/mec5035
-+					device pnp ff.0 on end
-+				end
-+			end
-+			device ref sata1	on end # SATA Controller 1
-+			device ref smbus	on end # SMBus
-+			device ref sata2	off end # SATA Controller 2
-+			device ref thermal	off end # Thermal
-+		end
-+	end
-+end
-diff --git a/src/mainboard/dell/e6530/dsdt.asl b/src/mainboard/dell/e6530/dsdt.asl
-new file mode 100644
-index 0000000000..7d13c55b08
---- /dev/null
-+++ b/src/mainboard/dell/e6530/dsdt.asl
-@@ -0,0 +1,30 @@
-+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <acpi/acpi.h>
-+
-+DefinitionBlock(
-+	"dsdt.aml",
-+	"DSDT",
-+	ACPI_DSDT_REV_2,
-+	OEM_ID,
-+	ACPI_TABLE_CREATOR,
-+	0x20141018	/* OEM revision */
-+)
-+{
-+	#include <acpi/dsdt_top.asl>
-+	#include "acpi/platform.asl"
-+	#include <cpu/intel/common/acpi/cpu.asl>
-+	#include <southbridge/intel/common/acpi/platform.asl>
-+	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-+	#include <southbridge/intel/common/acpi/sleepstates.asl>
-+
-+	Device (\_SB.PCI0)
-+	{
-+		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-+		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
-+		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
-+	}
-+}
-diff --git a/src/mainboard/dell/e6530/early_init.c b/src/mainboard/dell/e6530/early_init.c
-new file mode 100644
-index 0000000000..d57f48e7f1
---- /dev/null
-+++ b/src/mainboard/dell/e6530/early_init.c
-@@ -0,0 +1,38 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <northbridge/intel/sandybridge/raminit_native.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+	{ 1, 1, 0 },
-+	{ 1, 1, 0 },
-+	{ 1, 1, 1 },
-+	{ 1, 1, 1 },
-+	{ 1, 1, 2 },
-+	{ 1, 1, 2 },
-+	{ 1, 0, 3 },
-+	{ 1, 1, 3 },
-+	{ 1, 1, 4 },
-+	{ 1, 1, 4 },
-+	{ 1, 1, 5 },
-+	{ 1, 1, 5 },
-+	{ 1, 2, 6 },
-+	{ 1, 2, 6 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1c0f);
-+	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0000);
-+	mec5035_early_init();
-+}
-+
-+void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-+{
-+	read_spd(&spd[0], 0x50, id_only);
-+	read_spd(&spd[2], 0x52, id_only);
-+}
-diff --git a/src/mainboard/dell/e6530/gma-mainboard.ads b/src/mainboard/dell/e6530/gma-mainboard.ads
-new file mode 100644
-index 0000000000..1310830c8e
---- /dev/null
-+++ b/src/mainboard/dell/e6530/gma-mainboard.ads
-@@ -0,0 +1,20 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+   ports : constant Port_List :=
-+     (
-+      HDMI1, -- mainboard HDMI
-+      DP2, -- dock DP
-+      DP3, -- dock DP
-+      Analog, --mainboard VGA
-+      LVDS,
-+      others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/e6530/gpio.c b/src/mainboard/dell/e6530/gpio.c
-new file mode 100644
-index 0000000000..777570765a
---- /dev/null
-+++ b/src/mainboard/dell/e6530/gpio.c
-@@ -0,0 +1,192 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_GPIO,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_GPIO,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_NATIVE,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_GPIO,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_NATIVE,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio1 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio3 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio16 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_OUTPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio28 = GPIO_LEVEL_LOW,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+	.gpio30 = GPIO_RESET_RSMRST,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio13 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_GPIO,
-+	.gpio46 = GPIO_MODE_NATIVE,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_GPIO,
-+	.gpio50 = GPIO_MODE_NATIVE,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_NATIVE,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_NATIVE,
-+	.gpio56 = GPIO_MODE_NATIVE,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_INPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio45 = GPIO_DIR_OUTPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio49 = GPIO_DIR_INPUT,
-+	.gpio51 = GPIO_DIR_INPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio34 = GPIO_LEVEL_HIGH,
-+	.gpio45 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_GPIO,
-+	.gpio69 = GPIO_MODE_GPIO,
-+	.gpio70 = GPIO_MODE_GPIO,
-+	.gpio71 = GPIO_MODE_GPIO,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_NATIVE,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio68 = GPIO_DIR_INPUT,
-+	.gpio69 = GPIO_DIR_INPUT,
-+	.gpio70 = GPIO_DIR_INPUT,
-+	.gpio71 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/e6530/hda_verb.c b/src/mainboard/dell/e6530/hda_verb.c
-new file mode 100644
-index 0000000000..9de7e34311
---- /dev/null
-+++ b/src/mainboard/dell/e6530/hda_verb.c
-@@ -0,0 +1,33 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76df,	/* Codec Vendor / Device ID: IDT */
-+	0x10280535,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x10280535),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+	0x80862806,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/e6530/mainboard.c b/src/mainboard/dell/e6530/mainboard.c
-new file mode 100644
-index 0000000000..31e49802fc
---- /dev/null
-+++ b/src/mainboard/dell/e6530/mainboard.c
-@@ -0,0 +1,21 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <ec/acpi/ec.h>
-+#include <console/console.h>
-+#include <pc80/keyboard.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+
-+	/* FIXME: fix these values. */
-+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-+					GMA_INT15_PANEL_FIT_DEFAULT,
-+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+	.enable_dev = mainboard_enable,
-+};
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0027-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch b/config/coreboot/default/patches/0027-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch
new file mode 100644
index 00000000..6e49c8c2
--- /dev/null
+++ b/config/coreboot/default/patches/0027-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch
@@ -0,0 +1,440 @@
+From 611b5b3b4794eeda7ffb0a1876e1033705c50545 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Thu, 26 Oct 2017 21:26:43 +0800
+Subject: [PATCH 27/39] mb/dell: Add Latitude E6230 (Ivy Bridge)
+
+This was adapted from CB:22693 from Iru Cai, which was based on
+autoport. I do not physically have this system. Someone with physical
+access to an E6230 running version A11 of the vendor firmware sent me
+the VBT after running the command `intelvbttool --inlegacy --outvbt
+data.vbt`. This new version of the port has not yet been tested.
+
+The EC is the SMSC MEC5055, which seems to be compatible with the
+existing MEC5035 code. As with the other Dell systems with this EC, this
+board is assumed to be internally flashable using an EC command that
+tells it to pull the FDO pin low on the next boot, which also tells the
+vendor firmware to disable all write protections to the flash [1].
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Original-Change-Id: I8cdc01e902e670310628809416290045c2102340
+Change-Id: I32927beea7c29b96a851ab77ed15b0160f16d369
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig   |  11 +-
+ .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
+ .../snb_ivb_latitude/variants/e6230/data.vbt  | Bin 0 -> 4280 bytes
+ .../variants/e6230/early_init.c               |  12 ++
+ .../snb_ivb_latitude/variants/e6230/gpio.c    | 193 ++++++++++++++++++
+ .../variants/e6230/hda_verb.c                 |  32 +++
+ .../variants/e6230/overridetree.cb            |  40 ++++
+ 7 files changed, 290 insertions(+), 1 deletion(-)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index 49bf225fe2..f6e097930b 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -56,6 +56,12 @@ config BOARD_DELL_LATITUDE_E5530
+ 	select BOARD_ROMSIZE_KB_12288
+ 	select SOUTHBRIDGE_INTEL_C216
+ 
++config BOARD_DELL_LATITUDE_E6230
++	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++	select BOARD_ROMSIZE_KB_12288
++	select MAINBOARD_USES_IFD_GBE_REGION
++	select SOUTHBRIDGE_INTEL_C216
++
+ config BOARD_DELL_LATITUDE_E6330
+ 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ 	select BOARD_ROMSIZE_KB_12288
+@@ -90,6 +96,7 @@ config MAINBOARD_PART_NUMBER
+ 	default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
+ 	default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
+ 	default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
++	default "Latitude E6230" if BOARD_DELL_LATITUDE_E6230
+ 	default "Latitude E6330" if BOARD_DELL_LATITUDE_E6330
+ 	default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
+ 	default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
+@@ -108,6 +115,7 @@ config VARIANT_DIR
+ 	default "e6420" if BOARD_DELL_LATITUDE_E6420
+ 	default "e6520" if BOARD_DELL_LATITUDE_E6520
+ 	default "e5530" if BOARD_DELL_LATITUDE_E5530
++	default "e6230" if BOARD_DELL_LATITUDE_E6230
+ 	default "e6330" if BOARD_DELL_LATITUDE_E6330
+ 	default "e6430" if BOARD_DELL_LATITUDE_E6430
+ 	default "e6530" if BOARD_DELL_LATITUDE_E6530
+@@ -121,7 +129,8 @@ config VGA_BIOS_ID
+ 		|| BOARD_DELL_LATITUDE_E5520 \
+ 		|| BOARD_DELL_LATITUDE_E6220 \
+ 		|| BOARD_DELL_LATITUDE_E6320
+-	default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
++	default "8086,0166" if BOARD_DELL_LATITUDE_E6230 \
++		|| BOARD_DELL_LATITUDE_E6430 \
+ 		|| BOARD_DELL_LATITUDE_E6530
+ 
+ endif
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index d6fc8eb224..cb7bbd5cdb 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -21,6 +21,9 @@ config BOARD_DELL_LATITUDE_E6520
+ config BOARD_DELL_LATITUDE_E5530
+ 	bool "Latitude E5530"
+ 
++config BOARD_DELL_LATITUDE_E6230
++	bool "Latitude E6230"
++
+ config BOARD_DELL_LATITUDE_E6330
+ 	bool "Latitude E6330"
+ 
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..45ce8f435eea647a0bddaab3fd1e9282c87afc66
+GIT binary patch
+literal 4280
+zcmdT{Yiu0V75-*tAG5PFyX&zDekA7P<*tbx&o1`j23L%CmvkLWvN7(mLa6alZ?J`9
+zo3#m4YVlG`2;w12Ajppt<qra(R;8*G@uw*8gIcsg2vxi!q_pBkmGUD$s9IGi+jD1T
+zO`Kg43n@JA>~|mMp8L%`XU@4ZyCa_(r`z|Z`bP4p-rEkOMn-R;Ntk#o`b)0sOKRl6
+z?T0eM<HLtiqX*Kr(o5Kc<Iyk90h5ws=!y8i;K=M^X(l$-Eoeyyj>ZS*@LZWP#hD{>
+z<r2jcJ;b8e!oAb;^QB2D#7*krI^IpA=?ra8?xvqj6=&}$QL2a1J(QuD($UfkElf=x
+zUM!UtXmO4PP4h^;&)jWJvd(Pj0lIs7wpgAnE!1!MB1w8~{^#ZCd!`mCmhPs6X_~zW
+zGae^<%aoog&+n$;nHd@rItw&bS}2u|mL_-Ws;&ZOWW_51k`IALAW8pAz~@C!!B)bs
+z1x-OrK~}*8L07Po(5+xZL6I<}phTEf5QRsVJYHa{f^AWEV+2@lvrPVS%snsOn?N)w
+zpKbvwOnk&Q_6Y?aB;r1=!TYwts;yA@BnbFfECo!7JVJq7g^yhYMUV;wlBjksp(hI2
+z^<}E7r698{-pw!*{mH>SLslxYH@j~%H#VLx+<8~!;a@$n+>Q%xHrQ8KGI21_iL4sI
+zF*$}m$R7Mr9z@Z*ir@Q9eClsSmC+t(g`q~VQ&nIxZenav_^Buc78s8*o@e|<QE{4a
+zhVeGz1IFJN|784&5eTYiVstQeGWr-lWTY9lG45a#8TT^oXDl%uXFS9BHN$^DE>t}g
+z1Z-O>lG`>pEuvmL-HpmgSANo!2hWQq2B>Zua$8%tfvQ>!1n@=m9ri_4`H|Rx#SH9n
+zDdRF_-FDP&WjW`L$GK%a6x?yO8l2!^g0HJrtA7TknNzCO?|U!wCv2^-5pJ%LW6!+P
+z)anX%E>`gP%3Er4c6+J9x=Atk1{Abrr1|WSY3P`SO5j!R5F*vbbQ%AaSHnR_+x&Op
+zA%8C-Pk=-Hs+FL90B)E*y3FUTIA1J)&pxRF$tzAkNr7a6_-8v$@j~G~3keqYd5I<T
+z`Kb3Q@LKkANhE_aMG_R&<ewt+nVbp5l*3G7mYJEKr<kXS;TA&^G;5`q5b>;y8g^P<
+zfWO_D2@EyVVBxnpv*}hgTeeRzWz9BoISh>M%^k`WXG=5ti$_Wu99)~lWE-qubeXNk
+zla9Tu=Jhyn5T<3$H#?Hfm-`+(d$7IBDx9cEvNv1i-LEDr>r7438bfkPcKod+mwd22
+z%{^(w&NuG)MKl0fTMTXZFJEm~k;KCj*D60g=j!2jsP)<fOUGaEZa`&xE*)?FZuW#-
+z8!Of7<|N(^R#xcjmZ&nZ%~{pC5y_T*PB2LdDjuI#Te}-4Qccvj+u4N3TBx|oVy*mP
+z<9xfFziy4n?sPv3Sqo7jWMo3>{tzvOjAJ2nB}At~#%f4?FGT+d8LFnXXtYN&Mm06B
+z(JwUPX-z$$(d(M=uBLvh@h6#K=;~&jQo1p&t3TCgSvQ{3)l)jXr5hjW>fd!z!bW>o
+z-4UjJVdJi_dN@o^hK(1(>dRqzCv2PztLMTLjTqY^YEMMJ{=B#1IV)9~IMg|yl(NPF
+zQSfMX`?(b5)))B!zjy0B$ua20CCLTPl^IS&2=T&Zid9-1*K{VAJP?rxjYC+zGDCe*
+ziQI7VfF17@3`3W-qCN>lPC5CL_c?p0F<ekqB;g0q3P1R5KNubPsT>TGXaGB3i~{ZE
+zr=QtIprytDnU7C*Wj%x0k)O{Y%nUnl%}K%F|J_iVaD&ubW4Qbtx;pZEb9}f^Yd;Ea
+zI1Ha{7Yt~z{LAY++1QG{F6*_4WsUziY{x?%I9B}i5-Tphhk8FGm%J<d_0CUoV^%N&
+zTe02j+LXk=ZyWoe7L$#wsEY@VC>f!3d-ysG_9>uk%#)4xpxb+ZkJdel#+h}l9j9`1
+zt*M!5u?i4YtZ+WECo6$LJF06|G-mMZskGiV*lQJf-ItB+hltI<?{5E<^P=0rL<P+g
+z(P)!c<?MlvMK0O~UwZ4*;x|ms(&&#Vn_-4{KM#g~a=;$N2QD7mSX0{t<cf>sId@e&
+z-cN<SWA3VKCN6g3lx#+PySpWu*+pw}>vr(fgI)K*zkikg6TDJi?^}ghc*U*%A%EGg
+Y$$8Z}9a~<{Q@y10T!W`-d%n2+Kj)*Kg#Z8m
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c
+new file mode 100644
+index 0000000000..24c1b32467
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c
+@@ -0,0 +1,12 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++void bootblock_mainboard_early_init(void)
++{
++	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN);
++	mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c
+new file mode 100644
+index 0000000000..c07e4b1c56
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c
+@@ -0,0 +1,193 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_GPIO,
++	.gpio2 = GPIO_MODE_GPIO,
++	.gpio3 = GPIO_MODE_GPIO,
++	.gpio4 = GPIO_MODE_GPIO,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_NATIVE,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio1 = GPIO_DIR_INPUT,
++	.gpio2 = GPIO_DIR_INPUT,
++	.gpio3 = GPIO_DIR_INPUT,
++	.gpio4 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_OUTPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_OUTPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio17 = GPIO_LEVEL_HIGH,
++	.gpio28 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++	.gpio30 = GPIO_RESET_RSMRST,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio8 = GPIO_INVERT,
++	.gpio13 = GPIO_INVERT,
++	.gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_GPIO,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_GPIO,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_OUTPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio45 = GPIO_DIR_OUTPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_INPUT,
++	.gpio51 = GPIO_DIR_INPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio34 = GPIO_LEVEL_HIGH,
++	.gpio45 = GPIO_LEVEL_LOW,
++	.gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_GPIO,
++	.gpio71 = GPIO_MODE_GPIO,
++	.gpio72 = GPIO_MODE_NATIVE,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_NATIVE,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio68 = GPIO_DIR_INPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio70 = GPIO_DIR_INPUT,
++	.gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c
+new file mode 100644
+index 0000000000..f6876f9e09
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x111d76df, /* Codec Vendor / Device ID: IDT */
++	0x10280532, /* Subsystem ID */
++	11, /* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x10280532),
++	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
++	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++	0x80862806, /* Codec Vendor / Device ID: Intel */
++	0x80860101, /* Subsystem ID */
++	4, /* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb
+new file mode 100644
+index 0000000000..3a0fa720da
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb
+@@ -0,0 +1,40 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++	device domain 0 on
++		subsystemid 0x1028 0x0532 inherit
++
++		device ref igd on
++			register "gpu_cpu_backlight" = "0x000009e9"
++			register "gpu_pch_backlight" = "0x13121312"
++		end
++
++		chip southbridge/intel/bd82x6x
++			register "usb_port_config" = "{
++				{ 1, 1, 0 },
++				{ 1, 1, 0 },
++				{ 1, 0, 1 },
++				{ 1, 2, 1 },
++				{ 1, 0, 2 },
++				{ 1, 0, 2 },
++				{ 1, 0, 3 },
++				{ 1, 1, 3 },
++				{ 1, 2, 4 },
++				{ 1, 1, 4 },
++				{ 1, 1, 5 },
++				{ 1, 1, 5 },
++				{ 1, 2, 6 },
++				{ 1, 0, 6 },
++			}"
++
++			device ref xhci on
++				register "superspeed_capable_ports" = "0x0000000f"
++				register "xhci_overcurrent_mapping" = "0x00000c03"
++				register "xhci_switchable_ports" = "0x0000000f"
++			end
++			device ref sata1 on
++				register "sata_port_map" = "0x31"
++			end
++		end
++	end
++end
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0027-rebase-dell-e6530-to-newer-coreboot-code.patch b/config/coreboot/default/patches/0027-rebase-dell-e6530-to-newer-coreboot-code.patch
deleted file mode 100644
index 130984fb..00000000
--- a/config/coreboot/default/patches/0027-rebase-dell-e6530-to-newer-coreboot-code.patch
+++ /dev/null
@@ -1,145 +0,0 @@
-From 88652afd52b0a8e0fc8bb1656e59d8ae4796d847 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Thu, 25 Jan 2024 14:30:03 +0000
-Subject: [PATCH 27/30] rebase dell/e6530 to newer coreboot code
-
-i diffed nicholas's current e6430 patch, versus the old one,
-prior to this revision update in lbmk, also cross referencing
-the original e6430 and e6530 patches, diffing them, and the
-result in this patch. most notably, spd data is now defined in
-the devicetree, instead of early_init.c as per:
-
-commit 45e4ab4a660cb7ce312f2d11a153f2d9ef4158da
-Author: Keith Hui <buurin@gmail.com>
-Date:   Sat Jul 22 12:49:05 2023 -0400
-    mb/*: Update SPD mapping for sandybridge boards
-
-This should work fine. Will test after this builds.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/mainboard/dell/e6530/Kconfig       | 15 +++++++++++----
- src/mainboard/dell/e6530/cmos.layout   |  2 +-
- src/mainboard/dell/e6530/devicetree.cb |  8 +++++---
- src/mainboard/dell/e6530/early_init.c  | 12 +++---------
- 4 files changed, 20 insertions(+), 17 deletions(-)
-
-diff --git a/src/mainboard/dell/e6530/Kconfig b/src/mainboard/dell/e6530/Kconfig
-index 582adddbd4..a104566890 100644
---- a/src/mainboard/dell/e6530/Kconfig
-+++ b/src/mainboard/dell/e6530/Kconfig
-@@ -20,18 +20,25 @@ config BOARD_SPECIFIC_OPTIONS
- 	select SYSTEM_TYPE_LAPTOP
- 	select USE_NATIVE_RAMINIT
- 
-+config DRAM_RESET_GATE_GPIO
-+	default 60
-+
- config MAINBOARD_DIR
- 	default "dell/e6530"
- 
- config MAINBOARD_PART_NUMBER
- 	default "Latitude E6530"
- 
--config VGA_BIOS_ID
--	default "8086,0166"
-+config PS2K_EISAID
-+	default "PNP0303"
- 
--config DRAM_RESET_GATE_GPIO
--	default 60
-+config PS2M_EISAID
-+	default "PNP0F13"
- 
- config USBDEBUG_HCD_INDEX
- 	default 2
-+
-+config VGA_BIOS_ID
-+	default "8086,0166"
-+
- endif
-diff --git a/src/mainboard/dell/e6530/cmos.layout b/src/mainboard/dell/e6530/cmos.layout
-index e85ea4c661..1aa7e77bce 100644
---- a/src/mainboard/dell/e6530/cmos.layout
-+++ b/src/mainboard/dell/e6530/cmos.layout
-@@ -25,7 +25,7 @@ entries
- # coreboot config options: EC
- 412	1	e	1	bluetooth
- 413	1	e	1	wwan
--415	1	e	1	wlan
-+414	1	e	1	wlan
- 
- # coreboot config options: ME
- 424	1	e	14	me_state
-diff --git a/src/mainboard/dell/e6530/devicetree.cb b/src/mainboard/dell/e6530/devicetree.cb
-index 96eed178c5..37135bcf0f 100644
---- a/src/mainboard/dell/e6530/devicetree.cb
-+++ b/src/mainboard/dell/e6530/devicetree.cb
-@@ -12,6 +12,8 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
- 	register "gpu_panel_power_up_delay" = "400"
- 	register "gpu_pch_backlight" = "0x13121312"
- 
-+	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
-+
- 	device domain 0x0 on
- 		subsystemid 0x1028 0x0535 inherit
- 
-@@ -24,7 +26,7 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
- 			register "gen1_dec" = "0x007c0681"
- 			register "gen2_dec" = "0x005c0921"
- 			register "gen3_dec" = "0x003c07e1"
--			register "gen4_dec" = "0x007c0901"
-+			register "gen4_dec" = "0x00000911" # Ports 0x910/0x911 for EC
- 			register "gpi0_routing" = "2"
- 			register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
- 			register "pcie_port_coalesce" = "1"
-@@ -37,7 +39,7 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
- 			register "xhci_switchable_ports" = "0x0000000f"
- 
- 			device ref xhci		on end # USB 3.0 Controller
--			device ref mei1		off end # Management Engine Interface 1
-+			device ref mei1		on end # Management Engine Interface 1
- 			device ref mei2		off end # Management Engine Interface 2
- 			device ref me_ide_r	off end # Management Engine IDE-R
- 			device ref me_kt	on end # Management Engine KT
-@@ -48,7 +50,7 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
- 			device ref pcie_rp2	on end # PCIe Port #2
- 			device ref pcie_rp3	on end # PCIe Port #3
- 			device ref pcie_rp4	on end # PCIe Port #4
--			device ref pcie_rp5	off end # PCIe Port #5
-+			device ref pcie_rp5	on end # PCIe Port #5
- 			device ref pcie_rp6	on end # PCIe Port #6
- 			device ref pcie_rp7	off end # PCIe Port #7
- 			device ref pcie_rp8	off end # PCIe Port #8
-diff --git a/src/mainboard/dell/e6530/early_init.c b/src/mainboard/dell/e6530/early_init.c
-index d57f48e7f1..2b40f6963f 100644
---- a/src/mainboard/dell/e6530/early_init.c
-+++ b/src/mainboard/dell/e6530/early_init.c
-@@ -4,7 +4,6 @@
- #include <bootblock_common.h>
- #include <device/pci_ops.h>
- #include <ec/dell/mec5035/mec5035.h>
--#include <northbridge/intel/sandybridge/raminit_native.h>
- #include <southbridge/intel/bd82x6x/pch.h>
- 
- const struct southbridge_usb_port mainboard_usb_ports[] = {
-@@ -26,13 +25,8 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
- 
- void bootblock_mainboard_early_init(void)
- {
--	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1c0f);
--	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0000);
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+			| COMB_LPC_EN | COMA_LPC_EN);
- 	mec5035_early_init();
- }
--
--void mainboard_get_spd(spd_raw_data *spd, bool id_only)
--{
--	read_spd(&spd[0], 0x50, id_only);
--	read_spd(&spd[2], 0x52, id_only);
--}
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0021-HACK-Disable-coreboot-related-BL31-features.patch b/config/coreboot/default/patches/0028-HACK-Disable-coreboot-related-BL31-features.patch
similarity index 78%
rename from config/coreboot/default/patches/0021-HACK-Disable-coreboot-related-BL31-features.patch
rename to config/coreboot/default/patches/0028-HACK-Disable-coreboot-related-BL31-features.patch
index 40e1ccee..04e4c6d0 100644
--- a/config/coreboot/default/patches/0021-HACK-Disable-coreboot-related-BL31-features.patch
+++ b/config/coreboot/default/patches/0028-HACK-Disable-coreboot-related-BL31-features.patch
@@ -1,7 +1,7 @@
-From 70262a5f4bf801814d68f8778ea89b5cd8ef8f9a Mon Sep 17 00:00:00 2001
+From ea6e8749112dee4f458e9cf591e13e9097d56bab Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Thu, 22 Jun 2023 16:44:27 +0300
-Subject: [PATCH 21/30] HACK: Disable coreboot related BL31 features
+Subject: [PATCH 28/39] HACK: Disable coreboot related BL31 features
 
 I don't know why, but removing this BL31 make argument lets gru-kevin
 power off properly when shut down from Linux. Needs investigation.
@@ -10,10 +10,10 @@ power off properly when shut down from Linux. Needs investigation.
  1 file changed, 3 deletions(-)
 
 diff --git a/src/arch/arm64/Makefile.mk b/src/arch/arm64/Makefile.mk
-index 538d254ace..18e451d63c 100644
+index cb43897efd..a9e5ff399a 100644
 --- a/src/arch/arm64/Makefile.mk
 +++ b/src/arch/arm64/Makefile.mk
-@@ -159,9 +159,6 @@ BL31_MAKEARGS += LOG_LEVEL=40
+@@ -173,9 +173,6 @@ BL31_MAKEARGS += LOG_LEVEL=40
  # Always enable crash reporting, even on a release build
  BL31_MAKEARGS += CRASH_REPORTING=1
  
diff --git a/config/coreboot/default/patches/0028-dell-e6-30-disable-the-ME-device-in-devicetree.patch b/config/coreboot/default/patches/0028-dell-e6-30-disable-the-ME-device-in-devicetree.patch
deleted file mode 100644
index fa7ab40d..00000000
--- a/config/coreboot/default/patches/0028-dell-e6-30-disable-the-ME-device-in-devicetree.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 8705b719573d2159adde10af9c6a4d8806b7d27b Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Thu, 25 Jan 2024 14:37:30 +0000
-Subject: [PATCH 28/30] dell/e6*30: disable the ME device in devicetree
-
-we neuter anyway. disabling it in devicetree will prevent linux
-from ever trying to use it or load a driver for it, and thus
-might prevent benign error messages from appearing in dmesg.
-
-this change was suggested by nicholas when asked on irc.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/mainboard/dell/e6430/devicetree.cb | 4 ++--
- src/mainboard/dell/e6530/devicetree.cb | 4 ++--
- 2 files changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/src/mainboard/dell/e6430/devicetree.cb b/src/mainboard/dell/e6430/devicetree.cb
-index 054b01c5ac..2b8574c984 100644
---- a/src/mainboard/dell/e6430/devicetree.cb
-+++ b/src/mainboard/dell/e6430/devicetree.cb
-@@ -39,10 +39,10 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
- 			register "xhci_switchable_ports" = "0x0000000f"
- 
- 			device ref xhci		on end
--			device ref mei1		on end
-+			device ref mei1		off end
- 			device ref mei2		off end
- 			device ref me_ide_r	off end
--			device ref me_kt	on end
-+			device ref me_kt	off end
- 			device ref gbe		on end
- 			device ref ehci2	on end
- 			device ref hda		on end
-diff --git a/src/mainboard/dell/e6530/devicetree.cb b/src/mainboard/dell/e6530/devicetree.cb
-index 37135bcf0f..010200bb6d 100644
---- a/src/mainboard/dell/e6530/devicetree.cb
-+++ b/src/mainboard/dell/e6530/devicetree.cb
-@@ -39,10 +39,10 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
- 			register "xhci_switchable_ports" = "0x0000000f"
- 
- 			device ref xhci		on end # USB 3.0 Controller
--			device ref mei1		on end # Management Engine Interface 1
-+			device ref mei1		off end # Management Engine Interface 1
- 			device ref mei2		off end # Management Engine Interface 2
- 			device ref me_ide_r	off end # Management Engine IDE-R
--			device ref me_kt	on end # Management Engine KT
-+			device ref me_kt	off end # Management Engine KT
- 			device ref gbe		on end # Intel Gigabit Ethernet
- 			device ref ehci2	on end # USB2 EHCI #2
- 			device ref hda		on end # High Definition Audio
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0029-use-own-mirror-for-acpica-files.patch b/config/coreboot/default/patches/0029-use-own-mirror-for-acpica-files.patch
new file mode 100644
index 00000000..a06a5d23
--- /dev/null
+++ b/config/coreboot/default/patches/0029-use-own-mirror-for-acpica-files.patch
@@ -0,0 +1,29 @@
+From 5c385ef4b4424ed8c37e549a00866edda960563f Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 31 Jul 2024 00:03:02 +0100
+Subject: [PATCH 29/39] use own mirror for acpica files
+
+intel likes to break links for no reason,
+so we host our own backups of acpica.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ util/crossgcc/buildgcc | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index ad756652ed..5faff337b4 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -74,7 +74,7 @@ MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
+ MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
+ GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
+ BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
+-IASL_BASE_URL="https://downloadmirror.intel.com/783534"
++IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
+ # CLANG toolchain archive locations
+ LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
+ CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0023-crank-up-vram-allocation-on-more-intel-boards.patch b/config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
similarity index 82%
rename from config/coreboot/default/patches/0023-crank-up-vram-allocation-on-more-intel-boards.patch
rename to config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
index 7701babf..55c95022 100644
--- a/config/coreboot/default/patches/0023-crank-up-vram-allocation-on-more-intel-boards.patch
+++ b/config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
@@ -1,7 +1,7 @@
-From ad812d008d570c1655bff13a9026f39a9efdcbc9 Mon Sep 17 00:00:00 2001
+From c1065a638f2af40d8ef2c8586074bb82b96c02db Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 31 Oct 2023 18:24:39 +0000
-Subject: [PATCH 23/30] crank up vram allocation on more intel boards
+Subject: [PATCH 30/39] crank up vram allocation on more intel boards
 
 these were added to libreboot, and it's a policy of
 libreboot to max out the vram settings. this was
@@ -24,20 +24,20 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  12 files changed, 12 insertions(+), 4 deletions(-)
 
 diff --git a/src/mainboard/dell/e6400/cmos.default b/src/mainboard/dell/e6400/cmos.default
-index eeb6f47364..25dfa38cb5 100644
+index 744a599708..6b8d478f06 100644
 --- a/src/mainboard/dell/e6400/cmos.default
 +++ b/src/mainboard/dell/e6400/cmos.default
-@@ -2,4 +2,4 @@ boot_option=Fallback
+@@ -4,4 +4,4 @@ boot_option=Fallback
  debug_level=Debug
  power_on_after_fail=Disable
  sata_mode=AHCI
 -gfx_uma_size=32M
 +gfx_uma_size=256M
 diff --git a/src/mainboard/dell/snb_ivb_workstations/cmos.default b/src/mainboard/dell/snb_ivb_workstations/cmos.default
-index ccc7e64625..7c97b84baf 100644
+index 76c16e6a8d..19364aae6e 100644
 --- a/src/mainboard/dell/snb_ivb_workstations/cmos.default
 +++ b/src/mainboard/dell/snb_ivb_workstations/cmos.default
-@@ -3,5 +3,5 @@ debug_level=Debug
+@@ -5,5 +5,5 @@ debug_level=Debug
  power_on_after_fail=Disable
  nmi=Enable
  sata_mode=AHCI
@@ -45,10 +45,10 @@ index ccc7e64625..7c97b84baf 100644
 +gfx_uma_size=224M
  fan_full_speed=Disable
 diff --git a/src/mainboard/hp/compaq_8200_elite_sff/cmos.default b/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
-index 6d27a79c66..4517ffc7c2 100644
+index 497ae92e1f..64d43a07f7 100644
 --- a/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
 +++ b/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
-@@ -3,5 +3,5 @@ debug_level=Debug
+@@ -5,5 +5,5 @@ debug_level=Debug
  power_on_after_fail=Enable
  nmi=Enable
  sata_mode=AHCI
@@ -56,83 +56,83 @@ index 6d27a79c66..4517ffc7c2 100644
 +gfx_uma_size=224M
  psu_fan_lvl=3
 diff --git a/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default b/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
-index 6f3cec735e..9fc4db2990 100644
+index f3dad88670..b60f28447b 100644
 --- a/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
 +++ b/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
-@@ -3,4 +3,4 @@ debug_level=Debug
+@@ -5,4 +5,4 @@ debug_level=Debug
  power_on_after_fail=Enable
  nmi=Enable
  sata_mode=AHCI
 -gfx_uma_size=32M
 +gfx_uma_size=224M
 diff --git a/src/mainboard/hp/snb_ivb_laptops/cmos.default b/src/mainboard/hp/snb_ivb_laptops/cmos.default
-index ad822d5043..89418a4cfc 100644
+index e6042c0c27..a04026b70c 100644
 --- a/src/mainboard/hp/snb_ivb_laptops/cmos.default
 +++ b/src/mainboard/hp/snb_ivb_laptops/cmos.default
-@@ -3,3 +3,4 @@ debug_level=Debug
+@@ -5,3 +5,4 @@ debug_level=Debug
  power_on_after_fail=Disable
  nmi=Enable
  sata_mode=AHCI
 +gfx_uma_size=224M
 diff --git a/src/mainboard/lenovo/t420/cmos.default b/src/mainboard/lenovo/t420/cmos.default
-index c011867916..83f590d39d 100644
+index 27a62d07b3..d1c9fcaaaf 100644
 --- a/src/mainboard/lenovo/t420/cmos.default
 +++ b/src/mainboard/lenovo/t420/cmos.default
-@@ -15,3 +15,4 @@ trackpoint=Enable
+@@ -17,3 +17,4 @@ trackpoint=Enable
  hybrid_graphics_mode=Integrated Only
  usb_always_on=Disable
  me_state=Disabled
 +gfx_uma_size=224M
 diff --git a/src/mainboard/lenovo/t420s/cmos.default b/src/mainboard/lenovo/t420s/cmos.default
-index c011867916..83f590d39d 100644
+index 27a62d07b3..d1c9fcaaaf 100644
 --- a/src/mainboard/lenovo/t420s/cmos.default
 +++ b/src/mainboard/lenovo/t420s/cmos.default
-@@ -15,3 +15,4 @@ trackpoint=Enable
+@@ -17,3 +17,4 @@ trackpoint=Enable
  hybrid_graphics_mode=Integrated Only
  usb_always_on=Disable
  me_state=Disabled
 +gfx_uma_size=224M
 diff --git a/src/mainboard/lenovo/t430/cmos.default b/src/mainboard/lenovo/t430/cmos.default
-index 55e1e6c04e..a72108f47e 100644
+index 6d1e172056..c00b358314 100644
 --- a/src/mainboard/lenovo/t430/cmos.default
 +++ b/src/mainboard/lenovo/t430/cmos.default
-@@ -16,3 +16,4 @@ backlight=Both
+@@ -18,3 +18,4 @@ backlight=Both
  usb_always_on=Disable
  hybrid_graphics_mode=Integrated Only
  me_state=Disabled
 +gfx_uma_size=224M
 diff --git a/src/mainboard/lenovo/t520/cmos.default b/src/mainboard/lenovo/t520/cmos.default
-index b66f7034dc..a73ea6e9ee 100644
+index ab1be1a678..c7ee9564f3 100644
 --- a/src/mainboard/lenovo/t520/cmos.default
 +++ b/src/mainboard/lenovo/t520/cmos.default
-@@ -16,3 +16,4 @@ backlight=Both
+@@ -18,3 +18,4 @@ backlight=Both
  hybrid_graphics_mode=Integrated Only
  usb_always_on=Disable
  me_state=Disabled
 +gfx_uma_size=224M
 diff --git a/src/mainboard/lenovo/t530/cmos.default b/src/mainboard/lenovo/t530/cmos.default
-index b66f7034dc..a73ea6e9ee 100644
+index ab1be1a678..c7ee9564f3 100644
 --- a/src/mainboard/lenovo/t530/cmos.default
 +++ b/src/mainboard/lenovo/t530/cmos.default
-@@ -16,3 +16,4 @@ backlight=Both
+@@ -18,3 +18,4 @@ backlight=Both
  hybrid_graphics_mode=Integrated Only
  usb_always_on=Disable
  me_state=Disabled
 +gfx_uma_size=224M
 diff --git a/src/mainboard/lenovo/x201/cmos.default b/src/mainboard/lenovo/x201/cmos.default
-index 2cf484fd5a..46294d91ca 100644
+index 94f8e08a75..a1f2eacf11 100644
 --- a/src/mainboard/lenovo/x201/cmos.default
 +++ b/src/mainboard/lenovo/x201/cmos.default
-@@ -15,3 +15,4 @@ power_management_beeps=Enable
+@@ -17,3 +17,4 @@ power_management_beeps=Enable
  low_battery_beep=Enable
  sata_mode=AHCI
  usb_always_on=Disable
 +gfx_uma_size=128M
 diff --git a/src/mainboard/lenovo/x220/cmos.default b/src/mainboard/lenovo/x220/cmos.default
-index 52f303dfdb..92a2026542 100644
+index b318ab9772..82292ea5d6 100644
 --- a/src/mainboard/lenovo/x220/cmos.default
 +++ b/src/mainboard/lenovo/x220/cmos.default
-@@ -14,3 +14,4 @@ fn_ctrl_swap=Disable
+@@ -16,3 +16,4 @@ fn_ctrl_swap=Disable
  sticky_fn=Disable
  trackpoint=Enable
  me_state=Disabled
diff --git a/config/coreboot/default/patches/0024-dell-e6430-use-ME-Soft-Temporary-Disable.patch b/config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch
similarity index 59%
rename from config/coreboot/default/patches/0024-dell-e6430-use-ME-Soft-Temporary-Disable.patch
rename to config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch
index 79ee4b6c..50fa15f2 100644
--- a/config/coreboot/default/patches/0024-dell-e6430-use-ME-Soft-Temporary-Disable.patch
+++ b/config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch
@@ -1,7 +1,7 @@
-From a9ab864aee1be7a03926443ddc94e4c5012719ba Mon Sep 17 00:00:00 2001
+From dc02595f99566f71513ee16f1883e315b725241a Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 11:41:41 +0000
-Subject: [PATCH 24/30] dell/e6430: use ME Soft Temporary Disable
+Subject: [PATCH 31/39] dell/e6430: use ME Soft Temporary Disable
 
 i overlooked this. it's set on other boards.
 
@@ -12,13 +12,13 @@ disablement, to absolutely ensure Intel ME is not alive
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
- src/mainboard/dell/e6430/cmos.default | 2 +-
+ src/mainboard/dell/snb_ivb_latitude/cmos.default | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
-diff --git a/src/mainboard/dell/e6430/cmos.default b/src/mainboard/dell/e6430/cmos.default
+diff --git a/src/mainboard/dell/snb_ivb_latitude/cmos.default b/src/mainboard/dell/snb_ivb_latitude/cmos.default
 index 2a5b30f2b7..279415dfd1 100644
---- a/src/mainboard/dell/e6430/cmos.default
-+++ b/src/mainboard/dell/e6430/cmos.default
+--- a/src/mainboard/dell/snb_ivb_latitude/cmos.default
++++ b/src/mainboard/dell/snb_ivb_latitude/cmos.default
 @@ -6,4 +6,4 @@ bluetooth=Enable
  wwan=Enable
  wlan=Enable
diff --git a/config/coreboot/default/patches/0031-mb-dell-Add-OptiPlex-7020-9020-port_cb55232_31.patch b/config/coreboot/default/patches/0031-mb-dell-Add-OptiPlex-7020-9020-port_cb55232_31.patch
deleted file mode 100644
index 3b4d8004..00000000
--- a/config/coreboot/default/patches/0031-mb-dell-Add-OptiPlex-7020-9020-port_cb55232_31.patch
+++ /dev/null
@@ -1,923 +0,0 @@
-From 38a713eb071dd9c1b7d5092ce686537e5d9266f5 Mon Sep 17 00:00:00 2001
-From: Mate Kukri <kukri.mate@gmail.com>
-Date: Mon, 4 Dec 2023 21:34:18 +0000
-Subject: [PATCH 1/1] mb/dell: Add OptiPlex 7020/9020 port
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The OptiPlex 7020 and 9020 use physically identical motherboards.
-
-Each model comes in the following form factors:
-- 7020: SFF, MT
-- 9020: USFF (not currently supported), SFF, MT
-
-(7020 SFF) Boots Linux and Windows 10:
-- Tested with an i3-4160 and i5-4460
-- DRAM init works using the MRC (4G, 4G+4G)
-- iGPU init works using libgfxinit (VGA, 2x DP)
-- PCIe 16x: tested, ok
-- PCIe 4x: tested, ok
-- All USB2 and USB3 ports work
-- SMSC SCH5555 Super I/O: serial works, PS/2 untested
-- Audio: back and front output works, internal speaker works,
-         mic inputs untested
-- Ethernet: tested, works
-
-(9020 MT)
-- Tested by Michael Büchler (thanks for the overridetree)
-
-Change-Id: Ie7c7089f443aef9890711c4412209bceb1f1e96a
-Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
----
- src/mainboard/dell/optiplex_9020/Kconfig      |  34 +++
- src/mainboard/dell/optiplex_9020/Kconfig.name |  11 +
- src/mainboard/dell/optiplex_9020/Makefile.inc |   5 +
- src/mainboard/dell/optiplex_9020/acpi/ec.asl  |   3 +
- .../dell/optiplex_9020/acpi/platform.asl      |  11 +
- .../dell/optiplex_9020/acpi/superio.asl       |   3 +
- .../dell/optiplex_9020/board_info.txt         |   8 +
- src/mainboard/dell/optiplex_9020/bootblock.c  | 116 ++++++++++
- src/mainboard/dell/optiplex_9020/cmos.default |   4 +
- src/mainboard/dell/optiplex_9020/cmos.layout  |  58 +++++
- src/mainboard/dell/optiplex_9020/data.vbt     | Bin 0 -> 4409 bytes
- .../dell/optiplex_9020/devicetree.cb          |  80 +++++++
- src/mainboard/dell/optiplex_9020/dsdt.asl     |  25 ++
- .../dell/optiplex_9020/gma-mainboard.ads      |  18 ++
- src/mainboard/dell/optiplex_9020/gpio.c       | 217 ++++++++++++++++++
- src/mainboard/dell/optiplex_9020/hda_verb.c   |  27 +++
- src/mainboard/dell/optiplex_9020/mainboard.c  |  15 ++
- .../dell/optiplex_9020/overridetree_mt.cb     |  10 +
- src/mainboard/dell/optiplex_9020/romstage.c   |  53 +++++
- 19 files changed, 698 insertions(+)
- create mode 100644 src/mainboard/dell/optiplex_9020/Kconfig
- create mode 100644 src/mainboard/dell/optiplex_9020/Kconfig.name
- create mode 100644 src/mainboard/dell/optiplex_9020/Makefile.inc
- create mode 100644 src/mainboard/dell/optiplex_9020/acpi/ec.asl
- create mode 100644 src/mainboard/dell/optiplex_9020/acpi/platform.asl
- create mode 100644 src/mainboard/dell/optiplex_9020/acpi/superio.asl
- create mode 100644 src/mainboard/dell/optiplex_9020/board_info.txt
- create mode 100644 src/mainboard/dell/optiplex_9020/bootblock.c
- create mode 100644 src/mainboard/dell/optiplex_9020/cmos.default
- create mode 100644 src/mainboard/dell/optiplex_9020/cmos.layout
- create mode 100644 src/mainboard/dell/optiplex_9020/data.vbt
- create mode 100644 src/mainboard/dell/optiplex_9020/devicetree.cb
- create mode 100644 src/mainboard/dell/optiplex_9020/dsdt.asl
- create mode 100644 src/mainboard/dell/optiplex_9020/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/optiplex_9020/gpio.c
- create mode 100644 src/mainboard/dell/optiplex_9020/hda_verb.c
- create mode 100644 src/mainboard/dell/optiplex_9020/mainboard.c
- create mode 100644 src/mainboard/dell/optiplex_9020/overridetree_mt.cb
- create mode 100644 src/mainboard/dell/optiplex_9020/romstage.c
-
-diff --git a/src/mainboard/dell/optiplex_9020/Kconfig b/src/mainboard/dell/optiplex_9020/Kconfig
-new file mode 100644
-index 0000000000..774a72f161
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/Kconfig
-@@ -0,0 +1,34 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+if BOARD_DELL_OPTIPLEX_9020_SFF || BOARD_DELL_OPTIPLEX_9020_MT
-+
-+config BOARD_SPECIFIC_OPTIONS
-+	def_bool y
-+	select BOARD_ROMSIZE_KB_12288
-+	select HAVE_ACPI_RESUME
-+	select HAVE_ACPI_TABLES
-+	select HAVE_OPTION_TABLE
-+	select HAVE_CMOS_DEFAULT
-+	select INTEL_GMA_HAVE_VBT
-+	select INTEL_INT15
-+	select MAINBOARD_HAS_LIBGFXINIT
-+	select MAINBOARD_USES_IFD_GBE_REGION
-+	select NORTHBRIDGE_INTEL_HASWELL
-+	select SERIRQ_CONTINUOUS_MODE
-+	select SOUTHBRIDGE_INTEL_LYNXPOINT
-+	select SUPERIO_SMSC_SCH555x
-+
-+config CBFS_SIZE
-+	default 0x600000
-+
-+config MAINBOARD_DIR
-+	default "dell/optiplex_9020"
-+
-+config MAINBOARD_PART_NUMBER
-+	default "OptiPlex 7020/9020 SFF" if BOARD_DELL_OPTIPLEX_9020_SFF
-+	default "OptiPlex 7020/9020 MT" if BOARD_DELL_OPTIPLEX_9020_MT
-+
-+config OVERRIDE_DEVICETREE
-+	default "overridetree_mt.cb" if BOARD_DELL_OPTIPLEX_9020_MT
-+
-+endif
-diff --git a/src/mainboard/dell/optiplex_9020/Kconfig.name b/src/mainboard/dell/optiplex_9020/Kconfig.name
-new file mode 100644
-index 0000000000..c25c330a44
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/Kconfig.name
-@@ -0,0 +1,11 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+config BOARD_DELL_OPTIPLEX_9020_SFF
-+	bool "OptiPlex 7020/9020 SFF"
-+	help
-+	  The 7020 SFF and 9020 SFF mainboards are physically identical.
-+
-+config BOARD_DELL_OPTIPLEX_9020_MT
-+	bool "OptiPlex 7020/9020 MT"
-+	help
-+	  The 7020 MT and 9020 MT mainboards are physically identical.
-diff --git a/src/mainboard/dell/optiplex_9020/Makefile.inc b/src/mainboard/dell/optiplex_9020/Makefile.inc
-new file mode 100644
-index 0000000000..6ca2f2afaa
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/Makefile.inc
-@@ -0,0 +1,5 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-+bootblock-y += bootblock.c
-diff --git a/src/mainboard/dell/optiplex_9020/acpi/ec.asl b/src/mainboard/dell/optiplex_9020/acpi/ec.asl
-new file mode 100644
-index 0000000000..16990d45f4
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/acpi/ec.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: CC-PDDC */
-+
-+/* Please update the license if adding licensable material. */
-diff --git a/src/mainboard/dell/optiplex_9020/acpi/platform.asl b/src/mainboard/dell/optiplex_9020/acpi/platform.asl
-new file mode 100644
-index 0000000000..cda7682e3e
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/acpi/platform.asl
-@@ -0,0 +1,11 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+	Return(Package() { 0, 0 })
-+}
-+
-+Method(_PTS, 1)
-+{
-+
-+}
-diff --git a/src/mainboard/dell/optiplex_9020/acpi/superio.asl b/src/mainboard/dell/optiplex_9020/acpi/superio.asl
-new file mode 100644
-index 0000000000..16990d45f4
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: CC-PDDC */
-+
-+/* Please update the license if adding licensable material. */
-diff --git a/src/mainboard/dell/optiplex_9020/board_info.txt b/src/mainboard/dell/optiplex_9020/board_info.txt
-new file mode 100644
-index 0000000000..e30cf9c41f
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/board_info.txt
-@@ -0,0 +1,8 @@
-+Vendor name: Dell Inc.
-+Board name: OptiPlex 7020/9020
-+Release year: 2014
-+Category: desktop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-diff --git a/src/mainboard/dell/optiplex_9020/bootblock.c b/src/mainboard/dell/optiplex_9020/bootblock.c
-new file mode 100644
-index 0000000000..2837cf9cf1
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/bootblock.c
-@@ -0,0 +1,116 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <arch/io.h>
-+#include <device/pnp_ops.h>
-+#include <superio/smsc/sch555x/sch555x.h>
-+#include <southbridge/intel/lynxpoint/pch.h>
-+
-+static void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val)
-+{
-+	// Clear EC-to-Host mailbox
-+	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
-+	outb(tmp, SCH555x_EMI_IOBASE + 1);
-+
-+	// Send address and value to the EC
-+	sch555x_emi_write16(0, (addr1 * 2) | 0x101);
-+	sch555x_emi_write32(4, val | (addr2 << 16));
-+
-+	// Wait for acknowledgement message from EC
-+	outb(1, SCH555x_EMI_IOBASE);
-+	size_t timeout = 0;
-+	do {} while (++timeout < 0xfff && (inb(SCH555x_EMI_IOBASE + 1) & 1) == 0);
-+}
-+
-+struct ec_init_entry {
-+	uint16_t addr;
-+	uint8_t val;
-+};
-+
-+static void ec_init(void)
-+{
-+	/*
-+	 * Tables from CORE_PEI
-+	 */
-+
-+	static const struct ec_init_entry init_table1[] = {
-+		{0x08cc, 0x11}, {0x08d0, 0x11}, {0x088c, 0x10}, {0x0890, 0x10},
-+		{0x0894, 0x10}, {0x0898, 0x12}, {0x089c, 0x12}, {0x08a0, 0x10},
-+		{0x08a4, 0x12}, {0x08a8, 0x10}, {0x0820, 0x12}, {0x0824, 0x12},
-+		{0x0878, 0x12}, {0x0880, 0x12}, {0x0884, 0x12}, {0x08e0, 0x12},
-+		{0x08e4, 0x12}, {0x083c, 0x10}, {0x0840, 0x10}, {0x0844, 0x10},
-+		{0x0848, 0x10}, {0x084c, 0x10}, {0x0850, 0x10}, {0x0814, 0x11},
-+	};
-+
-+	for (size_t i = 0; i < ARRAY_SIZE(init_table1); ++i)
-+		ec_write(2, init_table1[i].addr, init_table1[i].val);
-+
-+	static const struct ec_init_entry init_table2[] = {
-+		{0x0005, 0x33}, {0x0018, 0x2f}, {0x0019, 0x2f}, {0x001a, 0x2f},
-+		{0x0083, 0xbb}, {0x0085, 0xd9}, {0x0086, 0x2c}, {0x008a, 0x34},
-+		{0x008b, 0x60}, {0x0090, 0x5e}, {0x0091, 0x5e}, {0x0092, 0x86},
-+		{0x0096, 0xa4}, {0x0097, 0xa4}, {0x0098, 0xa4}, {0x009b, 0xa4},
-+		{0x00a0, 0x0a}, {0x00a1, 0x0a}, {0x00ae, 0x7c}, {0x00af, 0x7c},
-+		{0x00b0, 0x9e}, {0x00b3, 0x7c}, {0x00b6, 0x08}, {0x00b7, 0x08},
-+		{0x00ea, 0x64}, {0x00ef, 0xff}, {0x00f8, 0x15}, {0x00f9, 0x00},
-+		{0x00f0, 0x30}, {0x00fd, 0x01}, {0x01a1, 0x00}, {0x01a2, 0x00},
-+		{0x01b1, 0x08}, {0x01be, 0x90}, {0x0280, 0x24}, {0x0281, 0x13},
-+		{0x0282, 0x03}, {0x0283, 0x0a}, {0x0284, 0x80}, {0x0285, 0x03},
-+		{0x0288, 0x80}, {0x0289, 0x0c}, {0x028a, 0x03}, {0x028b, 0x0a},
-+		{0x028c, 0x80}, {0x028d, 0x03}, {0x0040, 0x01},
-+	};
-+
-+	for (size_t i = 0; i < ARRAY_SIZE(init_table2); ++i)
-+		ec_write(1, init_table2[i].addr, init_table2[i].val);
-+
-+	/*
-+	 * Table from PeiHwmInit
-+	 */
-+
-+	static const struct ec_init_entry hwm_init_table[] = {
-+		{0x02fc, 0xa0}, {0x02fd, 0x32}, {0x0005, 0x77}, {0x0019, 0x2f},
-+		{0x001a, 0x2f}, {0x008a, 0x33}, {0x008b, 0x33}, {0x008c, 0x33},
-+		{0x00ba, 0x10}, {0x00d1, 0xff}, {0x00d6, 0xff}, {0x00db, 0xff},
-+		{0x0048, 0x00}, {0x0049, 0x00}, {0x007a, 0x00}, {0x007b, 0x00},
-+		{0x007c, 0x00}, {0x0080, 0x00}, {0x0081, 0x00}, {0x0082, 0x00},
-+		{0x0083, 0xbb}, {0x0084, 0xb0}, {0x01a1, 0x88}, {0x01a4, 0x80},
-+		{0x0088, 0x00}, {0x0089, 0x00}, {0x00a0, 0x02}, {0x00a1, 0x02},
-+		{0x00a2, 0x02}, {0x00a4, 0x04}, {0x00a5, 0x04}, {0x00a6, 0x04},
-+		{0x00ab, 0x00}, {0x00ad, 0x3f}, {0x00b7, 0x07}, {0x0062, 0x50},
-+		{0x0000, 0x46}, {0x0000, 0x50}, {0x0000, 0x46}, {0x0000, 0x50},
-+		{0x0000, 0x46}, {0x0000, 0x98}, {0x0059, 0x98}, {0x0061, 0x7c},
-+		{0x01bc, 0x00}, {0x01bd, 0x00}, {0x01bb, 0x00}, {0x0085, 0xdd},
-+		{0x0086, 0xdd}, {0x0087, 0x07}, {0x0090, 0x82}, {0x0091, 0x5e},
-+		{0x0095, 0x5d}, {0x0096, 0xa9}, {0x0097, 0x00}, {0x009b, 0x00},
-+		{0x00ae, 0x86}, {0x00af, 0x86}, {0x00b3, 0x67}, {0x00c4, 0xff},
-+		{0x00c5, 0xff}, {0x00c9, 0xff}, {0x0040, 0x01}, {0x02fc, 0x00},
-+		{0x02b3, 0x9a}, {0x02b4, 0x05}, {0x02cc, 0x01}, {0x02d0, 0x4c},
-+		{0x02d2, 0x01}, {0x02db, 0x01}, {0x006f, 0x01}, {0x0070, 0x02},
-+		{0x0071, 0x03}, {0x018b, 0x03}, {0x018c, 0x03},
-+	};
-+
-+	for (size_t i = 0; i < ARRAY_SIZE(hwm_init_table); ++i)
-+		ec_write(1, hwm_init_table[i].addr, hwm_init_table[i].val);
-+}
-+
-+#define SCH555x_IOBASE	0x2e
-+#define GLOBAL_DEV	PNP_DEV(SCH555x_IOBASE, SCH555x_LDN_GLOBAL)
-+#define SERIAL_DEV	PNP_DEV(SCH555x_IOBASE, SCH555x_LDN_UART1)
-+
-+void mainboard_config_superio(void)
-+{
-+	// Super I/O early init will map Runtime and EMI registers
-+	sch555x_early_init(GLOBAL_DEV);
-+
-+	// Changes LED color among a few other things (extracted from Dell's FW)
-+	outb(0x01, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_STS);
-+	outb(0x00, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_EN);
-+	outb(0x18, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_EN1);
-+	outb(0x01, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_UNK1);
-+	outb(0x0f, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_LED);
-+
-+	// Magic EC init
-+	ec_init();
-+
-+	// Magic EC init is needed for UART1 initialization to work
-+	sch555x_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-+}
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
-new file mode 100644
-index 0000000000..b159660aa8
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/cmos.default
-@@ -0,0 +1,4 @@
-+boot_option=Fallback
-+debug_level=Debug
-+nmi=Disable
-+power_on_after_fail=Disable
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.layout b/src/mainboard/dell/optiplex_9020/cmos.layout
-new file mode 100644
-index 0000000000..c9ba76c78f
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/cmos.layout
-@@ -0,0 +1,58 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0	120	r	0	reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384	1	e	3	boot_option
-+388	4	h	0	reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395	4	e	4	debug_level
-+
-+#400	8	r	0	reserved for century byte
-+
-+# coreboot config options: southbridge
-+408	1	e	1	nmi
-+409	2	e	5	power_on_after_fail
-+
-+# coreboot config options: check sums
-+984	16	h	0	check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID	value	text
-+1	0	Disable
-+1	1	Enable
-+
-+2	0	Enable
-+2	1	Disable
-+
-+3	0	Fallback
-+3	1	Normal
-+
-+4	0	Emergency
-+4	1	Alert
-+4	2	Critical
-+4	3	Error
-+4	4	Warning
-+4	5	Notice
-+4	6	Info
-+4	7	Debug
-+4	8	Spew
-+
-+5	0	Disable
-+5	1	Enable
-+5	2	Keep
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 415 984
-diff --git a/src/mainboard/dell/optiplex_9020/data.vbt b/src/mainboard/dell/optiplex_9020/data.vbt
-new file mode 100644
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-zKu4H+<*IHlA(@4;q~A}wijjptb-`A1OTqCOFSJ6vTQS-lW>Em~L_u66jOlR9ZUEZ|
-zMhC-jAj9!85eeUR&5CZpNVwUt>909-|5kF?Ve@Y58TNJV5CLGmjb)HGdJ22pR+!su
-z`@ntQ1&|Z3+xNb&p(?Li{yzJDS)dq4FZ3_c3(;&nw}2XNf@gau=U)2uzaL_df=2EH
-PTo#&U0FLJAf1&;f?(g8r
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/optiplex_9020/devicetree.cb b/src/mainboard/dell/optiplex_9020/devicetree.cb
-new file mode 100644
-index 0000000000..c0b17a15ff
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/devicetree.cb
-@@ -0,0 +1,80 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+chip northbridge/intel/haswell
-+	# This mainboard has VGA
-+	register "gpu_ddi_e_connected" = "1"
-+
-+	chip cpu/intel/haswell
-+		device cpu_cluster 0 on ops haswell_cpu_bus_ops end
-+	end
-+
-+	device domain 0 on
-+		ops haswell_pci_domain_ops
-+
-+		subsystemid 0x1028 0x05a5 inherit
-+
-+		device pci 00.0 on  end					# Host bridge
-+		device pci 01.0 on  end					# PCIe graphics
-+		device pci 02.0 on  end					# VGA controller
-+		device pci 03.0 on  end					# Mini-HD audio
-+
-+		chip southbridge/intel/lynxpoint
-+			register "gen1_dec" = "0x007c0a01"
-+			register "gen2_dec" = "0x007c0901"
-+			register "gen3_dec" = "0x003c07e1"
-+			register "gen4_dec" = "0x001c0901"
-+			register "sata_port_map" = "0x33"
-+
-+			device pci 14.0 on  end				# xHCI controller
-+			device pci 16.0 on  end				# Management Engine interface 1
-+			device pci 16.1 off end				# Management Engine interface 2
-+			device pci 16.2 off end				# Management Engine IDE-R
-+			device pci 16.3 on  end				# Management Engine KT
-+			device pci 19.0 on      			# Intel Gigabit Ethernet
-+				subsystemid 0x1028 0x05a4
-+			end
-+			device pci 1a.0 on  end				# EHCI controller #2
-+			device pci 1b.0 on  end				# HD audio controller
-+			device pci 1c.0 off end
-+			device pci 1c.1 off end
-+			device pci 1c.2 off end
-+			device pci 1c.3 off end
-+			device pci 1c.4 on  end				# PCIe 4x slot
-+			device pci 1c.5 off end
-+			device pci 1c.6 off end
-+			device pci 1c.7 off end
-+			device pci 1d.0 on  end				# EHCI controller #1
-+			device pci 1f.0 on				# LPC bridge
-+				chip superio/smsc/sch555x
-+					device pnp 2e.0 on		# EMI
-+						io 0x60 = 0xa00
-+					end
-+					device pnp 2e.1 on		# 8042
-+						io 0x60 = 0x60
-+						irq 0x0f = 0
-+						irq 0x70 = 1
-+						irq 0x72 = 12
-+					end
-+					device pnp 2e.7 on		# UART1
-+						io 0x60 = 0x3f8
-+						irq 0x0f = 2
-+						irq 0x70 = 4
-+					end
-+					device pnp 2e.8 off end 	# UART2
-+					device pnp 2e.c on		# LPC interface
-+						io 0x60 = 0x2e
-+					end
-+					device pnp 2e.a on		# Runtime registers
-+						io 0x60 = 0xa40
-+					end
-+					device pnp 2e.b  off end	# Floppy Controller
-+					device pnp 2e.11 off end	# Parallel Port
-+				end
-+			end
-+			device pci 1f.2 on  end				# SATA controller 1
-+			device pci 1f.3 on  end				# SMBus
-+			device pci 1f.5 off end				# SATA controller 2
-+			device pci 1f.6 off end				# Thermal
-+		end
-+	end
-+end
-diff --git a/src/mainboard/dell/optiplex_9020/dsdt.asl b/src/mainboard/dell/optiplex_9020/dsdt.asl
-new file mode 100644
-index 0000000000..7ec1e9775a
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/dsdt.asl
-@@ -0,0 +1,25 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi.h>
-+DefinitionBlock(
-+	"dsdt.aml",
-+	"DSDT",
-+	ACPI_DSDT_REV_2,
-+	OEM_ID,
-+	ACPI_TABLE_CREATOR,
-+	0x20181031	/* OEM Revision */
-+)
-+{
-+	#include <acpi/dsdt_top.asl>
-+	#include "acpi/platform.asl"
-+	#include <southbridge/intel/common/acpi/platform.asl>
-+	#include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
-+	#include <southbridge/intel/common/acpi/sleepstates.asl>
-+	#include <cpu/intel/common/acpi/cpu.asl>
-+
-+	Device (\_SB.PCI0)
-+	{
-+		#include <northbridge/intel/haswell/acpi/hostbridge.asl>
-+		#include <southbridge/intel/lynxpoint/acpi/pch.asl>
-+	}
-+}
-diff --git a/src/mainboard/dell/optiplex_9020/gma-mainboard.ads b/src/mainboard/dell/optiplex_9020/gma-mainboard.ads
-new file mode 100644
-index 0000000000..173f2f1d0d
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/gma-mainboard.ads
-@@ -0,0 +1,18 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+   ports : constant Port_List :=
-+     (DP1,
-+      DP2,
-+      DP3,
-+      Analog,
-+      others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/optiplex_9020/gpio.c b/src/mainboard/dell/optiplex_9020/gpio.c
-new file mode 100644
-index 0000000000..48b7707e2c
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/gpio.c
-@@ -0,0 +1,217 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_GPIO,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_GPIO,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_GPIO,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_GPIO,
-+	.gpio12 = GPIO_MODE_NATIVE,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_NATIVE,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_NATIVE,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_NATIVE,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_GPIO,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_GPIO,
-+	.gpio26 = GPIO_MODE_GPIO,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_NATIVE,
-+	.gpio30 = GPIO_MODE_NATIVE,
-+	.gpio31 = GPIO_MODE_GPIO,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio1 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio3 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio5 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio11 = GPIO_DIR_INPUT,
-+	.gpio13 = GPIO_DIR_OUTPUT,
-+	.gpio15 = GPIO_DIR_OUTPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_OUTPUT,
-+	.gpio23 = GPIO_DIR_OUTPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio25 = GPIO_DIR_OUTPUT,
-+	.gpio26 = GPIO_DIR_OUTPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_OUTPUT,
-+	.gpio31 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio13 = GPIO_LEVEL_LOW,
-+	.gpio15 = GPIO_LEVEL_HIGH,
-+	.gpio22 = GPIO_LEVEL_HIGH,
-+	.gpio23 = GPIO_LEVEL_HIGH,
-+	.gpio25 = GPIO_LEVEL_HIGH,
-+	.gpio26 = GPIO_LEVEL_HIGH,
-+	.gpio28 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+	.gpio18 = GPIO_BLINK,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio8 = GPIO_INVERT,
-+	.gpio9 = GPIO_INVERT,
-+	.gpio11 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+	.gpio26 = GPIO_RESET_RSMRST,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_GPIO,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_NATIVE,
-+	.gpio37 = GPIO_MODE_NATIVE,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_GPIO,
-+	.gpio45 = GPIO_MODE_GPIO,
-+	.gpio46 = GPIO_MODE_GPIO,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_GPIO,
-+	.gpio50 = GPIO_MODE_GPIO,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_GPIO,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_GPIO,
-+	.gpio56 = GPIO_MODE_NATIVE,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio32 = GPIO_DIR_INPUT,
-+	.gpio33 = GPIO_DIR_OUTPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio44 = GPIO_DIR_INPUT,
-+	.gpio45 = GPIO_DIR_OUTPUT,
-+	.gpio46 = GPIO_DIR_INPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio49 = GPIO_DIR_INPUT,
-+	.gpio50 = GPIO_DIR_OUTPUT,
-+	.gpio51 = GPIO_DIR_OUTPUT,
-+	.gpio52 = GPIO_DIR_OUTPUT,
-+	.gpio53 = GPIO_DIR_OUTPUT,
-+	.gpio54 = GPIO_DIR_OUTPUT,
-+	.gpio55 = GPIO_DIR_OUTPUT,
-+	.gpio57 = GPIO_DIR_OUTPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio33 = GPIO_LEVEL_HIGH,
-+	.gpio34 = GPIO_LEVEL_HIGH,
-+	.gpio45 = GPIO_LEVEL_LOW,
-+	.gpio50 = GPIO_LEVEL_HIGH,
-+	.gpio51 = GPIO_LEVEL_HIGH,
-+	.gpio52 = GPIO_LEVEL_HIGH,
-+	.gpio53 = GPIO_LEVEL_HIGH,
-+	.gpio54 = GPIO_LEVEL_HIGH,
-+	.gpio55 = GPIO_LEVEL_HIGH,
-+	.gpio57 = GPIO_LEVEL_HIGH,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_GPIO,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_GPIO,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_GPIO,
-+	.gpio69 = GPIO_MODE_GPIO,
-+	.gpio70 = GPIO_MODE_NATIVE,
-+	.gpio71 = GPIO_MODE_NATIVE,
-+	.gpio72 = GPIO_MODE_GPIO,
-+	.gpio73 = GPIO_MODE_GPIO,
-+	.gpio74 = GPIO_MODE_GPIO,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio64 = GPIO_DIR_OUTPUT,
-+	.gpio66 = GPIO_DIR_OUTPUT,
-+	.gpio68 = GPIO_DIR_INPUT,
-+	.gpio69 = GPIO_DIR_INPUT,
-+	.gpio72 = GPIO_DIR_OUTPUT,
-+	.gpio73 = GPIO_DIR_INPUT,
-+	.gpio74 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+	.gpio64 = GPIO_LEVEL_HIGH,
-+	.gpio66 = GPIO_LEVEL_HIGH,
-+	.gpio72 = GPIO_LEVEL_HIGH,
-+	.gpio74 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 =	{
-+		.mode = &pch_gpio_set1_mode,
-+		.direction = &pch_gpio_set1_direction,
-+		.level = &pch_gpio_set1_level,
-+		.blink = &pch_gpio_set1_blink,
-+		.invert = &pch_gpio_set1_invert,
-+		.reset = &pch_gpio_set1_reset,
-+	},
-+	.set2 =	{
-+		.mode = &pch_gpio_set2_mode,
-+		.direction = &pch_gpio_set2_direction,
-+		.level = &pch_gpio_set2_level,
-+		.reset = &pch_gpio_set2_reset,
-+	},
-+	.set3 =	{
-+		.mode = &pch_gpio_set3_mode,
-+		.direction = &pch_gpio_set3_direction,
-+		.level = &pch_gpio_set3_level,
-+		.reset = &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/optiplex_9020/hda_verb.c b/src/mainboard/dell/optiplex_9020/hda_verb.c
-new file mode 100644
-index 0000000000..df43ade3e6
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/hda_verb.c
-@@ -0,0 +1,27 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <stdint.h>
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x10ec0280, /* Realtek ALC3220 */
-+	0x102805a5, /* Subsystem ID */
-+	13,	 /* Number of entries */
-+	AZALIA_SUBVENDOR(0, 0x102805a5),
-+	AZALIA_PIN_CFG(0, 0x12, 0x4008c000),
-+	AZALIA_PIN_CFG(0, 0x13, 0x411111f0),
-+	AZALIA_PIN_CFG(0, 0x14, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x15, 0x0221401f),
-+	AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
-+	AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
-+	AZALIA_PIN_CFG(0, 0x18, 0x01a13040),
-+	AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
-+	AZALIA_PIN_CFG(0, 0x1a, 0x02a19030),
-+	AZALIA_PIN_CFG(0, 0x1b, 0x01014020),
-+	AZALIA_PIN_CFG(0, 0x1d, 0x40400001),
-+	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
-+};
-+
-+const u32 pc_beep_verbs[] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/optiplex_9020/mainboard.c b/src/mainboard/dell/optiplex_9020/mainboard.c
-new file mode 100644
-index 0000000000..c834fea5d3
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/mainboard.c
-@@ -0,0 +1,15 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE,
-+					GMA_INT15_PANEL_FIT_DEFAULT,
-+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+	.enable_dev = mainboard_enable,
-+};
-diff --git a/src/mainboard/dell/optiplex_9020/overridetree_mt.cb b/src/mainboard/dell/optiplex_9020/overridetree_mt.cb
-new file mode 100644
-index 0000000000..90205c2d68
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/overridetree_mt.cb
-@@ -0,0 +1,10 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+chip northbridge/intel/haswell
-+	device domain 0 on
-+		chip southbridge/intel/lynxpoint
-+			device pci 1c.1 on  end	# PCI (via XIO2001 bridge)
-+			device pci 1c.2 on  end	# PCIe 1x slot
-+		end
-+	end
-+end
-diff --git a/src/mainboard/dell/optiplex_9020/romstage.c b/src/mainboard/dell/optiplex_9020/romstage.c
-new file mode 100644
-index 0000000000..2b9cdaa5fd
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/romstage.c
-@@ -0,0 +1,53 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <northbridge/intel/haswell/raminit.h>
-+#include <southbridge/intel/lynxpoint/pch.h>
-+
-+void mainboard_config_rcba(void)
-+{
-+	RCBA16(D31IR) = DIR_ROUTE(PIRQA, PIRQC, PIRQD, PIRQA);
-+	RCBA16(D29IR) = DIR_ROUTE(PIRQC, PIRQA, PIRQD, PIRQH);
-+	RCBA16(D28IR) = DIR_ROUTE(PIRQD, PIRQC, PIRQB, PIRQA);
-+	RCBA16(D27IR) = DIR_ROUTE(PIRQD, PIRQC, PIRQB, PIRQG);
-+	RCBA16(D26IR) = DIR_ROUTE(PIRQD, PIRQC, PIRQF, PIRQA);
-+	RCBA16(D25IR) = DIR_ROUTE(PIRQH, PIRQG, PIRQF, PIRQE);
-+	RCBA16(D22IR) = DIR_ROUTE(PIRQB, PIRQC, PIRQD, PIRQA);
-+	RCBA16(D20IR) = DIR_ROUTE(PIRQD, PIRQC, PIRQB, PIRQA);
-+}
-+
-+void mb_get_spd_map(struct spd_info *spdi)
-+{
-+	spdi->addresses[0] = 0x50;
-+	spdi->addresses[1] = 0x51;
-+	spdi->addresses[2] = 0x52;
-+	spdi->addresses[3] = 0x53;
-+}
-+
-+const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS] = {
-+	/* Length, Enable, OCn#, Location */
-+	{0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP},
-+	{0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP},
-+	{0x0040, 1, 1, USB_PORT_BACK_PANEL},
-+	{0x0040, 1, 2, USB_PORT_BACK_PANEL},
-+	{0x0040, 1, 3, USB_PORT_BACK_PANEL},
-+	{0x0040, 1, 3, USB_PORT_BACK_PANEL},
-+	{0x0040, 1, 0, USB_PORT_BACK_PANEL},
-+	{0x0040, 1, 0, USB_PORT_BACK_PANEL},
-+	{0x0040, 1, 4, USB_PORT_BACK_PANEL},
-+	{0x0040, 1, 4, USB_PORT_BACK_PANEL},
-+	{0x0040, 1, 5, USB_PORT_BACK_PANEL},
-+	{0x0040, 1, 5, USB_PORT_BACK_PANEL},
-+	{0x0040, 1, 6, USB_PORT_BACK_PANEL},
-+	{0x0040, 1, 7, USB_PORT_BACK_PANEL},
-+};
-+
-+const struct usb3_port_config mainboard_usb3_ports[MAX_USB3_PORTS] = {
-+	/* Enable, OCn# */
-+	{1, 6},
-+	{1, 7},
-+	{0, USB_OC_PIN_SKIP},
-+	{0, USB_OC_PIN_SKIP},
-+	{1, 1},
-+	{1, 2},
-+};
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0032-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch b/config/coreboot/default/patches/0032-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
deleted file mode 100644
index ddfc6571..00000000
--- a/config/coreboot/default/patches/0032-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
+++ /dev/null
@@ -1,774 +0,0 @@
-From 41002e64c92e90903fa591c4a8a1cc0108833743 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sun, 26 Nov 2023 17:08:52 -0700
-Subject: [PATCH] mb/dell: Add Latitude E6420 (Sandy Bridge)
-
-Change-Id: Ic48d9ea58172a5b13958c8afebcb19c8929c4394
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e6420/Kconfig           |  38 ++++
- src/mainboard/dell/e6420/Kconfig.name      |   2 +
- src/mainboard/dell/e6420/Makefile.inc      |   6 +
- src/mainboard/dell/e6420/acpi/ec.asl       |   9 +
- src/mainboard/dell/e6420/acpi/platform.asl |  12 ++
- src/mainboard/dell/e6420/acpi/superio.asl  |   3 +
- src/mainboard/dell/e6420/acpi_tables.c     |  16 ++
- src/mainboard/dell/e6420/board_info.txt    |   6 +
- src/mainboard/dell/e6420/cmos.default      |   9 +
- src/mainboard/dell/e6420/cmos.layout       |  88 ++++++++++
- src/mainboard/dell/e6420/data.vbt          | Bin 0 -> 6144 bytes
- src/mainboard/dell/e6420/devicetree.cb     |  66 +++++++
- src/mainboard/dell/e6420/dsdt.asl          |  30 ++++
- src/mainboard/dell/e6420/early_init.c      |  32 ++++
- src/mainboard/dell/e6420/gma-mainboard.ads |  20 +++
- src/mainboard/dell/e6420/gpio.c            | 191 +++++++++++++++++++++
- src/mainboard/dell/e6420/hda_verb.c        |  33 ++++
- src/mainboard/dell/e6420/mainboard.c       |  21 +++
- 18 files changed, 582 insertions(+)
- create mode 100644 src/mainboard/dell/e6420/Kconfig
- create mode 100644 src/mainboard/dell/e6420/Kconfig.name
- create mode 100644 src/mainboard/dell/e6420/Makefile.inc
- create mode 100644 src/mainboard/dell/e6420/acpi/ec.asl
- create mode 100644 src/mainboard/dell/e6420/acpi/platform.asl
- create mode 100644 src/mainboard/dell/e6420/acpi/superio.asl
- create mode 100644 src/mainboard/dell/e6420/acpi_tables.c
- create mode 100644 src/mainboard/dell/e6420/board_info.txt
- create mode 100644 src/mainboard/dell/e6420/cmos.default
- create mode 100644 src/mainboard/dell/e6420/cmos.layout
- create mode 100644 src/mainboard/dell/e6420/data.vbt
- create mode 100644 src/mainboard/dell/e6420/devicetree.cb
- create mode 100644 src/mainboard/dell/e6420/dsdt.asl
- create mode 100644 src/mainboard/dell/e6420/early_init.c
- create mode 100644 src/mainboard/dell/e6420/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/e6420/gpio.c
- create mode 100644 src/mainboard/dell/e6420/hda_verb.c
- create mode 100644 src/mainboard/dell/e6420/mainboard.c
-
-diff --git a/src/mainboard/dell/e6420/Kconfig b/src/mainboard/dell/e6420/Kconfig
-new file mode 100644
-index 0000000000..cff62bf70c
---- /dev/null
-+++ b/src/mainboard/dell/e6420/Kconfig
-@@ -0,0 +1,38 @@
-+if BOARD_DELL_LATITUDE_E6420
-+
-+config BOARD_SPECIFIC_OPTIONS
-+	def_bool y
-+	select BOARD_ROMSIZE_KB_10240
-+	select EC_ACPI
-+	select EC_DELL_MEC5035
-+	select GFX_GMA_PANEL_1_ON_LVDS
-+	select HAVE_ACPI_RESUME
-+	select HAVE_ACPI_TABLES
-+	select HAVE_CMOS_DEFAULT
-+	select HAVE_OPTION_TABLE
-+	select INTEL_GMA_HAVE_VBT
-+	select INTEL_INT15
-+	select MAINBOARD_HAS_LIBGFXINIT
-+	select MAINBOARD_USES_IFD_GBE_REGION
-+	select NORTHBRIDGE_INTEL_SANDYBRIDGE
-+	select SERIRQ_CONTINUOUS_MODE
-+	select SOUTHBRIDGE_INTEL_BD82X6X
-+	select SYSTEM_TYPE_LAPTOP
-+	select USE_NATIVE_RAMINIT
-+
-+config DRAM_RESET_GATE_GPIO
-+	default 60
-+
-+config MAINBOARD_DIR
-+	default "dell/e6420"
-+
-+config MAINBOARD_PART_NUMBER
-+	default "Latitude E6420"
-+
-+config USBDEBUG_HCD_INDEX
-+	default 2
-+
-+config VGA_BIOS_ID
-+	default "8086,0126"
-+
-+endif # BOARD_DELL_LATITUDE_E6420
-diff --git a/src/mainboard/dell/e6420/Kconfig.name b/src/mainboard/dell/e6420/Kconfig.name
-new file mode 100644
-index 0000000000..1722891e7b
---- /dev/null
-+++ b/src/mainboard/dell/e6420/Kconfig.name
-@@ -0,0 +1,2 @@
-+config BOARD_DELL_LATITUDE_E6420
-+	bool "Latitude E6420"
-diff --git a/src/mainboard/dell/e6420/Makefile.inc b/src/mainboard/dell/e6420/Makefile.inc
-new file mode 100644
-index 0000000000..ba64e93eb8
---- /dev/null
-+++ b/src/mainboard/dell/e6420/Makefile.inc
-@@ -0,0 +1,6 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+bootblock-y += early_init.c
-+bootblock-y += gpio.c
-+romstage-y += early_init.c
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/e6420/acpi/ec.asl b/src/mainboard/dell/e6420/acpi/ec.asl
-new file mode 100644
-index 0000000000..0d429410a9
---- /dev/null
-+++ b/src/mainboard/dell/e6420/acpi/ec.asl
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Device(EC)
-+{
-+	Name (_HID, EISAID("PNP0C09"))
-+	Name (_UID, 0)
-+	Name (_GPE, 16)
-+/* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e6420/acpi/platform.asl b/src/mainboard/dell/e6420/acpi/platform.asl
-new file mode 100644
-index 0000000000..2d24bbd9b9
---- /dev/null
-+++ b/src/mainboard/dell/e6420/acpi/platform.asl
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+	/* FIXME: EC support  */
-+	Return(Package() {0, 0})
-+}
-+
-+Method(_PTS,1)
-+{
-+	/* FIXME: EC support  */
-+}
-diff --git a/src/mainboard/dell/e6420/acpi/superio.asl b/src/mainboard/dell/e6420/acpi/superio.asl
-new file mode 100644
-index 0000000000..55b1db5b11
---- /dev/null
-+++ b/src/mainboard/dell/e6420/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <drivers/pc80/pc/ps2_controller.asl>
-diff --git a/src/mainboard/dell/e6420/acpi_tables.c b/src/mainboard/dell/e6420/acpi_tables.c
-new file mode 100644
-index 0000000000..e2759659bf
---- /dev/null
-+++ b/src/mainboard/dell/e6420/acpi_tables.c
-@@ -0,0 +1,16 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi_gnvs.h>
-+#include <soc/nvs.h>
-+
-+/* FIXME: check this function.  */
-+void mainboard_fill_gnvs(struct global_nvs *gnvs)
-+{
-+	/* The lid is open by default. */
-+	gnvs->lids = 1;
-+
-+	/* Temperature at which OS will shutdown */
-+	gnvs->tcrt = 100;
-+	/* Temperature at which OS will throttle CPU */
-+	gnvs->tpsv = 90;
-+}
-diff --git a/src/mainboard/dell/e6420/board_info.txt b/src/mainboard/dell/e6420/board_info.txt
-new file mode 100644
-index 0000000000..34d5ad9e0b
---- /dev/null
-+++ b/src/mainboard/dell/e6420/board_info.txt
-@@ -0,0 +1,6 @@
-+Category: laptop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2011
-diff --git a/src/mainboard/dell/e6420/cmos.default b/src/mainboard/dell/e6420/cmos.default
-new file mode 100644
-index 0000000000..279415dfd1
---- /dev/null
-+++ b/src/mainboard/dell/e6420/cmos.default
-@@ -0,0 +1,9 @@
-+boot_option=Fallback
-+debug_level=Debug
-+power_on_after_fail=Disable
-+nmi=Enable
-+bluetooth=Enable
-+wwan=Enable
-+wlan=Enable
-+sata_mode=AHCI
-+me_state=Disabled
-diff --git a/src/mainboard/dell/e6420/cmos.layout b/src/mainboard/dell/e6420/cmos.layout
-new file mode 100644
-index 0000000000..1aa7e77bce
---- /dev/null
-+++ b/src/mainboard/dell/e6420/cmos.layout
-@@ -0,0 +1,88 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0	120	r	0	reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384	1	e	4	boot_option
-+388	4	h	0	reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395	4	e	6	debug_level
-+
-+#400	8	r	0	reserved for century byte
-+
-+# coreboot config options: southbridge
-+408	1	e	1	nmi
-+409	2	e	7	power_on_after_fail
-+411     1       e       9       sata_mode
-+
-+# coreboot config options: EC
-+412	1	e	1	bluetooth
-+413	1	e	1	wwan
-+414	1	e	1	wlan
-+
-+# coreboot config options: ME
-+424	1	e	14	me_state
-+425	2	h	0	me_state_prev
-+
-+# coreboot config options: northbridge
-+432	3	e	11	gfx_uma_size
-+435	2	e	12	hybrid_graphics_mode
-+440	8	h	0	volume
-+
-+# VBOOT
-+448	128	r	0	vbnv
-+
-+# SandyBridge MRC Scrambler Seed values
-+896	32	r	0	mrc_scrambler_seed
-+928	32	r	0	mrc_scrambler_seed_s3
-+960	16	r	0	mrc_scrambler_seed_chk
-+
-+# coreboot config options: check sums
-+984	16	h	0	check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID	value	text
-+1	0	Disable
-+1	1	Enable
-+2	0	Enable
-+2	1	Disable
-+4	0	Fallback
-+4	1	Normal
-+6	0	Emergency
-+6	1	Alert
-+6	2	Critical
-+6	3	Error
-+6	4	Warning
-+6	5	Notice
-+6	6	Info
-+6	7	Debug
-+6	8	Spew
-+7	0	Disable
-+7	1	Enable
-+7	2	Keep
-+9	0	AHCI
-+9	1	Compatible
-+11	0	32M
-+11	1	64M
-+11	2	96M
-+11	3	128M
-+11	4	160M
-+11	5	192M
-+11	6	224M
-+14	0	Normal
-+14	1	Disabled
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 447 984
-diff --git a/src/mainboard/dell/e6420/data.vbt b/src/mainboard/dell/e6420/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..d3662eea1bc78b60be6d0bd2cc38bb46b654afbd
-GIT binary patch
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-HcmV?d00001
-
-diff --git a/src/mainboard/dell/e6420/devicetree.cb b/src/mainboard/dell/e6420/devicetree.cb
-new file mode 100644
-index 0000000000..f9259f7175
---- /dev/null
-+++ b/src/mainboard/dell/e6420/devicetree.cb
-@@ -0,0 +1,66 @@
-+chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
-+	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-+	register "gpu_cpu_backlight" = "0x0000054f"
-+	register "gpu_dp_b_hotplug" = "4"
-+	register "gpu_dp_c_hotplug" = "4"
-+	register "gpu_dp_d_hotplug" = "4"
-+	register "gpu_panel_port_select" = "0"
-+	register "gpu_panel_power_backlight_off_delay" = "2300"
-+	register "gpu_panel_power_backlight_on_delay" = "2300"
-+	register "gpu_panel_power_cycle_delay" = "6"
-+	register "gpu_panel_power_down_delay" = "400"
-+	register "gpu_panel_power_up_delay" = "400"
-+	register "gpu_pch_backlight" = "0x13121312"
-+
-+	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
-+
-+	device domain 0x0 on
-+		subsystemid 0x1028 0x0493 inherit
-+
-+		device ref host_bridge on end # Host bridge
-+		device ref peg10 on end # PEG
-+		device ref igd on end # iGPU
-+
-+		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+			register "docking_supported" = "1"
-+			register "gen1_dec" = "0x007c0681"
-+			register "gen2_dec" = "0x007c0901"
-+			register "gen3_dec" = "0x003c07e1"
-+			register "gen4_dec" = "0x001c0901"
-+			register "gpi0_routing" = "2"
-+			register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
-+			register "pcie_port_coalesce" = "1"
-+			register "sata_interface_speed_support" = "0x3"
-+			register "sata_port_map" = "0x3b"
-+			register "spi_lvscc" = "0x2005"
-+			register "spi_uvscc" = "0x2005"
-+
-+			device ref mei1		off end
-+			device ref mei2		off end
-+			device ref me_ide_r	off end
-+			device ref me_kt	off end
-+			device ref gbe		on end
-+			device ref ehci2	on end
-+			device ref hda		on end
-+			device ref pcie_rp1	on end
-+			device ref pcie_rp2	on end
-+			device ref pcie_rp3	on end
-+			device ref pcie_rp4	on end
-+			device ref pcie_rp5	off end
-+			device ref pcie_rp6	on end
-+			device ref pcie_rp7	off end
-+			device ref pcie_rp8	off end
-+			device ref ehci1	on end
-+			device ref pci_bridge	off end
-+			device ref lpc		on
-+				chip ec/dell/mec5035
-+					device pnp ff.0 on end
-+				end
-+			end
-+			device ref sata1 on end
-+			device ref smbus on end
-+			device ref sata2 off end
-+			device ref thermal off end
-+		end
-+	end
-+end
-diff --git a/src/mainboard/dell/e6420/dsdt.asl b/src/mainboard/dell/e6420/dsdt.asl
-new file mode 100644
-index 0000000000..7d13c55b08
---- /dev/null
-+++ b/src/mainboard/dell/e6420/dsdt.asl
-@@ -0,0 +1,30 @@
-+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <acpi/acpi.h>
-+
-+DefinitionBlock(
-+	"dsdt.aml",
-+	"DSDT",
-+	ACPI_DSDT_REV_2,
-+	OEM_ID,
-+	ACPI_TABLE_CREATOR,
-+	0x20141018	/* OEM revision */
-+)
-+{
-+	#include <acpi/dsdt_top.asl>
-+	#include "acpi/platform.asl"
-+	#include <cpu/intel/common/acpi/cpu.asl>
-+	#include <southbridge/intel/common/acpi/platform.asl>
-+	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-+	#include <southbridge/intel/common/acpi/sleepstates.asl>
-+
-+	Device (\_SB.PCI0)
-+	{
-+		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-+		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
-+		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
-+	}
-+}
-diff --git a/src/mainboard/dell/e6420/early_init.c b/src/mainboard/dell/e6420/early_init.c
-new file mode 100644
-index 0000000000..0682441ed6
---- /dev/null
-+++ b/src/mainboard/dell/e6420/early_init.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+	{ 1, 1, 0 },
-+	{ 1, 1, 0 },
-+	{ 1, 1, 1 },
-+	{ 1, 1, 1 },
-+	{ 1, 0, 2 },
-+	{ 1, 1, 2 },
-+	{ 1, 1, 3 },
-+	{ 1, 1, 3 },
-+	{ 1, 1, 5 },
-+	{ 1, 1, 5 },
-+	{ 1, 1, 7 },
-+	{ 1, 1, 6 },
-+	{ 1, 0, 6 },
-+	{ 1, 0, 7 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+			| COMB_LPC_EN | COMA_LPC_EN);
-+	mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/e6420/gma-mainboard.ads b/src/mainboard/dell/e6420/gma-mainboard.ads
-new file mode 100644
-index 0000000000..2a16f44360
---- /dev/null
-+++ b/src/mainboard/dell/e6420/gma-mainboard.ads
-@@ -0,0 +1,20 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+   ports : constant Port_List :=
-+     (
-+      HDMI1, -- mainboard HDMI
-+      DP2, -- dock DP
-+      DP3, -- dock DP
-+      Analog, -- mainboard VGA
-+      LVDS,
-+      others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/e6420/gpio.c b/src/mainboard/dell/e6420/gpio.c
-new file mode 100644
-index 0000000000..943c743f48
---- /dev/null
-+++ b/src/mainboard/dell/e6420/gpio.c
-@@ -0,0 +1,191 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_NATIVE,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_NATIVE,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_NATIVE,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_GPIO,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_GPIO,
-+	.gpio31 = GPIO_MODE_GPIO,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio16 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_INPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+	.gpio30 = GPIO_DIR_OUTPUT,
-+	.gpio31 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio30 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_GPIO,
-+	.gpio46 = GPIO_MODE_NATIVE,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_GPIO,
-+	.gpio50 = GPIO_MODE_NATIVE,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_NATIVE,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_NATIVE,
-+	.gpio56 = GPIO_MODE_NATIVE,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_INPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio45 = GPIO_DIR_OUTPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio49 = GPIO_DIR_OUTPUT,
-+	.gpio51 = GPIO_DIR_INPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio34 = GPIO_LEVEL_HIGH,
-+	.gpio45 = GPIO_LEVEL_LOW,
-+	.gpio49 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_GPIO,
-+	.gpio69 = GPIO_MODE_GPIO,
-+	.gpio70 = GPIO_MODE_GPIO,
-+	.gpio71 = GPIO_MODE_GPIO,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_NATIVE,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio68 = GPIO_DIR_INPUT,
-+	.gpio69 = GPIO_DIR_INPUT,
-+	.gpio70 = GPIO_DIR_INPUT,
-+	.gpio71 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/e6420/hda_verb.c b/src/mainboard/dell/e6420/hda_verb.c
-new file mode 100644
-index 0000000000..b3803b7c65
---- /dev/null
-+++ b/src/mainboard/dell/e6420/hda_verb.c
-@@ -0,0 +1,33 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
-+	0x10280493,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x10280493),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+	0x80862805,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/e6420/mainboard.c b/src/mainboard/dell/e6420/mainboard.c
-new file mode 100644
-index 0000000000..31e49802fc
---- /dev/null
-+++ b/src/mainboard/dell/e6420/mainboard.c
-@@ -0,0 +1,21 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <ec/acpi/ec.h>
-+#include <console/console.h>
-+#include <pc80/keyboard.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+
-+	/* FIXME: fix these values. */
-+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-+					GMA_INT15_PANEL_FIT_DEFAULT,
-+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+	.enable_dev = mainboard_enable,
-+};
--- 
-2.43.0
-
diff --git a/config/coreboot/default/patches/0025-use-mirrorservice.org-for-gcc-downloads.patch b/config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch
similarity index 85%
rename from config/coreboot/default/patches/0025-use-mirrorservice.org-for-gcc-downloads.patch
rename to config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch
index 8275d6c5..e7cfab6f 100644
--- a/config/coreboot/default/patches/0025-use-mirrorservice.org-for-gcc-downloads.patch
+++ b/config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch
@@ -1,7 +1,7 @@
-From 936a8f113772c93d7501e7133159ab4e23436222 Mon Sep 17 00:00:00 2001
+From adb6121970034aa63da8c6303292ff81f340d9db Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 22:57:08 +0000
-Subject: [PATCH 25/30] use mirrorservice.org for gcc downloads
+Subject: [PATCH 32/39] use mirrorservice.org for gcc downloads
 
 the gnu.org 302 redirect often fails
 
@@ -11,10 +11,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 5 insertions(+), 5 deletions(-)
 
 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 36565a906c..4d4ca06113 100755
+index 5faff337b4..2743f96903 100755
 --- a/util/crossgcc/buildgcc
 +++ b/util/crossgcc/buildgcc
-@@ -67,11 +67,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
+@@ -69,11 +69,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
  # to the jenkins build as well, or the builder won't download it.
  
  # GCC toolchain archive locations
diff --git a/config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch b/config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
deleted file mode 100644
index 39782376..00000000
--- a/config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
+++ /dev/null
@@ -1,773 +0,0 @@
-From 5e8bff81220d4d0f663feed443e4594b76e442bf Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Wed, 31 Jan 2024 22:07:25 -0700
-Subject: [PATCH] mb/dell: Add Latitude E6520 (Sandy Bridge)
-
-Change-Id: Ibdd40cc15642b8d404159d5962670ccc4167a9ec
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e6520/Kconfig           |  38 +++++
- src/mainboard/dell/e6520/Kconfig.name      |   2 +
- src/mainboard/dell/e6520/Makefile.inc      |   6 +
- src/mainboard/dell/e6520/acpi/ec.asl       |   9 +
- src/mainboard/dell/e6520/acpi/platform.asl |  12 ++
- src/mainboard/dell/e6520/acpi/superio.asl  |   3 +
- src/mainboard/dell/e6520/acpi_tables.c     |  16 ++
- src/mainboard/dell/e6520/board_info.txt    |   6 +
- src/mainboard/dell/e6520/cmos.default      |   9 +
- src/mainboard/dell/e6520/cmos.layout       |  88 ++++++++++
- src/mainboard/dell/e6520/data.vbt          | Bin 0 -> 6144 bytes
- src/mainboard/dell/e6520/devicetree.cb     |  66 +++++++
- src/mainboard/dell/e6520/dsdt.asl          |  30 ++++
- src/mainboard/dell/e6520/early_init.c      |  32 ++++
- src/mainboard/dell/e6520/gma-mainboard.ads |  20 +++
- src/mainboard/dell/e6520/gpio.c            | 190 +++++++++++++++++++++
- src/mainboard/dell/e6520/hda_verb.c        |  33 ++++
- src/mainboard/dell/e6520/mainboard.c       |  21 +++
- 18 files changed, 581 insertions(+)
- create mode 100644 src/mainboard/dell/e6520/Kconfig
- create mode 100644 src/mainboard/dell/e6520/Kconfig.name
- create mode 100644 src/mainboard/dell/e6520/Makefile.inc
- create mode 100644 src/mainboard/dell/e6520/acpi/ec.asl
- create mode 100644 src/mainboard/dell/e6520/acpi/platform.asl
- create mode 100644 src/mainboard/dell/e6520/acpi/superio.asl
- create mode 100644 src/mainboard/dell/e6520/acpi_tables.c
- create mode 100644 src/mainboard/dell/e6520/board_info.txt
- create mode 100644 src/mainboard/dell/e6520/cmos.default
- create mode 100644 src/mainboard/dell/e6520/cmos.layout
- create mode 100644 src/mainboard/dell/e6520/data.vbt
- create mode 100644 src/mainboard/dell/e6520/devicetree.cb
- create mode 100644 src/mainboard/dell/e6520/dsdt.asl
- create mode 100644 src/mainboard/dell/e6520/early_init.c
- create mode 100644 src/mainboard/dell/e6520/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/e6520/gpio.c
- create mode 100644 src/mainboard/dell/e6520/hda_verb.c
- create mode 100644 src/mainboard/dell/e6520/mainboard.c
-
-diff --git a/src/mainboard/dell/e6520/Kconfig b/src/mainboard/dell/e6520/Kconfig
-new file mode 100644
-index 0000000000..db9f25b4ac
---- /dev/null
-+++ b/src/mainboard/dell/e6520/Kconfig
-@@ -0,0 +1,38 @@
-+if BOARD_DELL_LATITUDE_E6520
-+
-+config BOARD_SPECIFIC_OPTIONS
-+	def_bool y
-+	select BOARD_ROMSIZE_KB_10240
-+	select EC_ACPI
-+	select EC_DELL_MEC5035
-+	select GFX_GMA_PANEL_1_ON_LVDS
-+	select HAVE_ACPI_RESUME
-+	select HAVE_ACPI_TABLES
-+	select HAVE_CMOS_DEFAULT
-+	select HAVE_OPTION_TABLE
-+	select INTEL_GMA_HAVE_VBT
-+	select INTEL_INT15
-+	select MAINBOARD_HAS_LIBGFXINIT
-+	select MAINBOARD_USES_IFD_GBE_REGION
-+	select NORTHBRIDGE_INTEL_SANDYBRIDGE
-+	select SERIRQ_CONTINUOUS_MODE
-+	select SOUTHBRIDGE_INTEL_BD82X6X
-+	select SYSTEM_TYPE_LAPTOP
-+	select USE_NATIVE_RAMINIT
-+
-+config DRAM_RESET_GATE_GPIO
-+	default 60
-+
-+config MAINBOARD_DIR
-+	default "dell/e6520"
-+
-+config MAINBOARD_PART_NUMBER
-+	default "Latitude E6520"
-+
-+config USBDEBUG_HCD_INDEX
-+	default 2
-+
-+config VGA_BIOS_ID
-+	default "8086,0116"
-+
-+endif # BOARD_DELL_LATITUDE_E6520
-diff --git a/src/mainboard/dell/e6520/Kconfig.name b/src/mainboard/dell/e6520/Kconfig.name
-new file mode 100644
-index 0000000000..25968e80e5
---- /dev/null
-+++ b/src/mainboard/dell/e6520/Kconfig.name
-@@ -0,0 +1,2 @@
-+config BOARD_DELL_LATITUDE_E6520
-+	bool "Latitude E6520"
-diff --git a/src/mainboard/dell/e6520/Makefile.inc b/src/mainboard/dell/e6520/Makefile.inc
-new file mode 100644
-index 0000000000..ba64e93eb8
---- /dev/null
-+++ b/src/mainboard/dell/e6520/Makefile.inc
-@@ -0,0 +1,6 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+bootblock-y += early_init.c
-+bootblock-y += gpio.c
-+romstage-y += early_init.c
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/e6520/acpi/ec.asl b/src/mainboard/dell/e6520/acpi/ec.asl
-new file mode 100644
-index 0000000000..0d429410a9
---- /dev/null
-+++ b/src/mainboard/dell/e6520/acpi/ec.asl
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Device(EC)
-+{
-+	Name (_HID, EISAID("PNP0C09"))
-+	Name (_UID, 0)
-+	Name (_GPE, 16)
-+/* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e6520/acpi/platform.asl b/src/mainboard/dell/e6520/acpi/platform.asl
-new file mode 100644
-index 0000000000..2d24bbd9b9
---- /dev/null
-+++ b/src/mainboard/dell/e6520/acpi/platform.asl
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+	/* FIXME: EC support  */
-+	Return(Package() {0, 0})
-+}
-+
-+Method(_PTS,1)
-+{
-+	/* FIXME: EC support  */
-+}
-diff --git a/src/mainboard/dell/e6520/acpi/superio.asl b/src/mainboard/dell/e6520/acpi/superio.asl
-new file mode 100644
-index 0000000000..55b1db5b11
---- /dev/null
-+++ b/src/mainboard/dell/e6520/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <drivers/pc80/pc/ps2_controller.asl>
-diff --git a/src/mainboard/dell/e6520/acpi_tables.c b/src/mainboard/dell/e6520/acpi_tables.c
-new file mode 100644
-index 0000000000..e2759659bf
---- /dev/null
-+++ b/src/mainboard/dell/e6520/acpi_tables.c
-@@ -0,0 +1,16 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi_gnvs.h>
-+#include <soc/nvs.h>
-+
-+/* FIXME: check this function.  */
-+void mainboard_fill_gnvs(struct global_nvs *gnvs)
-+{
-+	/* The lid is open by default. */
-+	gnvs->lids = 1;
-+
-+	/* Temperature at which OS will shutdown */
-+	gnvs->tcrt = 100;
-+	/* Temperature at which OS will throttle CPU */
-+	gnvs->tpsv = 90;
-+}
-diff --git a/src/mainboard/dell/e6520/board_info.txt b/src/mainboard/dell/e6520/board_info.txt
-new file mode 100644
-index 0000000000..34d5ad9e0b
---- /dev/null
-+++ b/src/mainboard/dell/e6520/board_info.txt
-@@ -0,0 +1,6 @@
-+Category: laptop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2011
-diff --git a/src/mainboard/dell/e6520/cmos.default b/src/mainboard/dell/e6520/cmos.default
-new file mode 100644
-index 0000000000..279415dfd1
---- /dev/null
-+++ b/src/mainboard/dell/e6520/cmos.default
-@@ -0,0 +1,9 @@
-+boot_option=Fallback
-+debug_level=Debug
-+power_on_after_fail=Disable
-+nmi=Enable
-+bluetooth=Enable
-+wwan=Enable
-+wlan=Enable
-+sata_mode=AHCI
-+me_state=Disabled
-diff --git a/src/mainboard/dell/e6520/cmos.layout b/src/mainboard/dell/e6520/cmos.layout
-new file mode 100644
-index 0000000000..1aa7e77bce
---- /dev/null
-+++ b/src/mainboard/dell/e6520/cmos.layout
-@@ -0,0 +1,88 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0	120	r	0	reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384	1	e	4	boot_option
-+388	4	h	0	reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395	4	e	6	debug_level
-+
-+#400	8	r	0	reserved for century byte
-+
-+# coreboot config options: southbridge
-+408	1	e	1	nmi
-+409	2	e	7	power_on_after_fail
-+411     1       e       9       sata_mode
-+
-+# coreboot config options: EC
-+412	1	e	1	bluetooth
-+413	1	e	1	wwan
-+414	1	e	1	wlan
-+
-+# coreboot config options: ME
-+424	1	e	14	me_state
-+425	2	h	0	me_state_prev
-+
-+# coreboot config options: northbridge
-+432	3	e	11	gfx_uma_size
-+435	2	e	12	hybrid_graphics_mode
-+440	8	h	0	volume
-+
-+# VBOOT
-+448	128	r	0	vbnv
-+
-+# SandyBridge MRC Scrambler Seed values
-+896	32	r	0	mrc_scrambler_seed
-+928	32	r	0	mrc_scrambler_seed_s3
-+960	16	r	0	mrc_scrambler_seed_chk
-+
-+# coreboot config options: check sums
-+984	16	h	0	check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID	value	text
-+1	0	Disable
-+1	1	Enable
-+2	0	Enable
-+2	1	Disable
-+4	0	Fallback
-+4	1	Normal
-+6	0	Emergency
-+6	1	Alert
-+6	2	Critical
-+6	3	Error
-+6	4	Warning
-+6	5	Notice
-+6	6	Info
-+6	7	Debug
-+6	8	Spew
-+7	0	Disable
-+7	1	Enable
-+7	2	Keep
-+9	0	AHCI
-+9	1	Compatible
-+11	0	32M
-+11	1	64M
-+11	2	96M
-+11	3	128M
-+11	4	160M
-+11	5	192M
-+11	6	224M
-+14	0	Normal
-+14	1	Disabled
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 447 984
-diff --git a/src/mainboard/dell/e6520/data.vbt b/src/mainboard/dell/e6520/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..0ef16ee7cb482d2cb91ea80c3f419759355f7ba0
-GIT binary patch
-literal 6144
-zcmeHKZ){Ul6hE);wSB#PZ|mL$bQ^!}HW(eF@H)0JafGfbqsZ9G21{L7Sg{or$5uN)
-z_QgG55e!O(8p8*oBhhF`l$n^QF%rN;rzFNqqcPzFCd5QSB1Y7RKt1=pmTk1aFo9^Y
-z+x+gi_nvdlJ@?#m&wZWW=G#bH>ze$J`&!oe*Q|E0r!)d89LYY8b$aowZEoG-uiIF+
-z#n;$ezm6V<nGnvtc?lrGaf)1_);!W0?uqnojdw-1MQM|dwy`OcF?M@A)KgVV*N2}7
-zcXx+--0R}IwzW3-+`f2k?^Av5V7MpRO-q(9rn_R1@Xlz2Ztdy`$Gf6^w6~|bKi!!7
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-zO-z8^CSU`w=mIK7Q)@9fR;XUzrFu{T=rRyygIZBpU9+Or>+?4R9%~G?Y-|g)Z`Sti
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-zIU<3D2oK^>L;%r(*o=4*u?Mja@dDyi#4zFn;(f#^#3*76aUSs#;tJv#La-6YLRdQB
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-z-jp>o1ffJNommZ4?=TIPlePIw0hgQ706f*tBC`#pg>9&zRHe>J2%RxBTrOc6Adh9E
-ziJr`?VQH!N!_GkoKaoq|+3$^Ae0#sUxXlmM1Huq~g<=Ls?ILv+nQcH%PQedGOlH=Q
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-zb@kB3H8kKy4W3Hu)NN|kd!DL^o#iR9a{QYV-Wl&r&hmIFX{ezkIV<4zFiVUQ@K>ao
-z00DnFy~Uek!JRwhVX!of0)$Sa*X^S~LMQH0<E(UUx}L=|;Kgw(r(4q=nD)T52c|tR
-O?SW|zOncy=dEg(6JAK&z
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/e6520/devicetree.cb b/src/mainboard/dell/e6520/devicetree.cb
-new file mode 100644
-index 0000000000..cfba8ef4e7
---- /dev/null
-+++ b/src/mainboard/dell/e6520/devicetree.cb
-@@ -0,0 +1,66 @@
-+chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
-+	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-+	register "gpu_cpu_backlight" = "0x00001312"
-+	register "gpu_dp_b_hotplug" = "4"
-+	register "gpu_dp_c_hotplug" = "4"
-+	register "gpu_dp_d_hotplug" = "4"
-+	register "gpu_panel_port_select" = "0"
-+	register "gpu_panel_power_backlight_off_delay" = "2300"
-+	register "gpu_panel_power_backlight_on_delay" = "2300"
-+	register "gpu_panel_power_cycle_delay" = "6"
-+	register "gpu_panel_power_down_delay" = "400"
-+	register "gpu_panel_power_up_delay" = "400"
-+	register "gpu_pch_backlight" = "0x13121312"
-+
-+	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
-+
-+	device domain 0x0 on
-+		subsystemid 0x1028 0x0494 inherit
-+
-+		device ref host_bridge on end # Host bridge
-+		device ref peg10 on end # PEG
-+		device ref igd on end # iGPU
-+
-+		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+			register "docking_supported" = "1"
-+			register "gen1_dec" = "0x007c0681"
-+			register "gen2_dec" = "0x007c0901"
-+			register "gen3_dec" = "0x003c07e1"
-+			register "gen4_dec" = "0x001c0901"
-+			register "gpi0_routing" = "2"
-+			register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
-+			register "pcie_port_coalesce" = "1"
-+			register "sata_interface_speed_support" = "0x3"
-+			register "sata_port_map" = "0x3b"
-+			register "spi_lvscc" = "0x2005"
-+			register "spi_uvscc" = "0x2005"
-+
-+			device ref mei1		off end
-+			device ref mei2		off end
-+			device ref me_ide_r	off end
-+			device ref me_kt	off end
-+			device ref gbe		on end
-+			device ref ehci2	on end
-+			device ref hda		on end
-+			device ref pcie_rp1	on end
-+			device ref pcie_rp2	on end
-+			device ref pcie_rp3	on end
-+			device ref pcie_rp4	on end
-+			device ref pcie_rp5	off end
-+			device ref pcie_rp6	on end
-+			device ref pcie_rp7	off end
-+			device ref pcie_rp8	off end
-+			device ref ehci1	on end
-+			device ref pci_bridge	off end
-+			device ref lpc		on
-+				chip ec/dell/mec5035
-+					device pnp ff.0 on end
-+				end
-+			end
-+			device ref sata1 on end
-+			device ref smbus on end
-+			device ref sata2 off end
-+			device ref thermal off end
-+		end
-+	end
-+end
-diff --git a/src/mainboard/dell/e6520/dsdt.asl b/src/mainboard/dell/e6520/dsdt.asl
-new file mode 100644
-index 0000000000..7d13c55b08
---- /dev/null
-+++ b/src/mainboard/dell/e6520/dsdt.asl
-@@ -0,0 +1,30 @@
-+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <acpi/acpi.h>
-+
-+DefinitionBlock(
-+	"dsdt.aml",
-+	"DSDT",
-+	ACPI_DSDT_REV_2,
-+	OEM_ID,
-+	ACPI_TABLE_CREATOR,
-+	0x20141018	/* OEM revision */
-+)
-+{
-+	#include <acpi/dsdt_top.asl>
-+	#include "acpi/platform.asl"
-+	#include <cpu/intel/common/acpi/cpu.asl>
-+	#include <southbridge/intel/common/acpi/platform.asl>
-+	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-+	#include <southbridge/intel/common/acpi/sleepstates.asl>
-+
-+	Device (\_SB.PCI0)
-+	{
-+		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-+		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
-+		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
-+	}
-+}
-diff --git a/src/mainboard/dell/e6520/early_init.c b/src/mainboard/dell/e6520/early_init.c
-new file mode 100644
-index 0000000000..2a37091df6
---- /dev/null
-+++ b/src/mainboard/dell/e6520/early_init.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+	{ 1, 1, 0 },
-+	{ 1, 1, 0 },
-+	{ 1, 1, 1 },
-+	{ 1, 1, 1 },
-+	{ 1, 0, 2 },
-+	{ 1, 1, 2 },
-+	{ 1, 0, 3 },
-+	{ 1, 0, 3 },
-+	{ 1, 1, 5 },
-+	{ 1, 1, 5 },
-+	{ 1, 1, 7 },
-+	{ 1, 1, 6 },
-+	{ 1, 0, 6 },
-+	{ 1, 0, 7 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+			| COMB_LPC_EN | COMA_LPC_EN);
-+	mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/e6520/gma-mainboard.ads b/src/mainboard/dell/e6520/gma-mainboard.ads
-new file mode 100644
-index 0000000000..2a16f44360
---- /dev/null
-+++ b/src/mainboard/dell/e6520/gma-mainboard.ads
-@@ -0,0 +1,20 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+   ports : constant Port_List :=
-+     (
-+      HDMI1, -- mainboard HDMI
-+      DP2, -- dock DP
-+      DP3, -- dock DP
-+      Analog, -- mainboard VGA
-+      LVDS,
-+      others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/e6520/gpio.c b/src/mainboard/dell/e6520/gpio.c
-new file mode 100644
-index 0000000000..61f01816c4
---- /dev/null
-+++ b/src/mainboard/dell/e6520/gpio.c
-@@ -0,0 +1,190 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_NATIVE,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_NATIVE,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_NATIVE,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_GPIO,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_GPIO,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio16 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_INPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+	.gpio30 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio30 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_GPIO,
-+	.gpio46 = GPIO_MODE_NATIVE,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_GPIO,
-+	.gpio50 = GPIO_MODE_NATIVE,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_NATIVE,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_NATIVE,
-+	.gpio56 = GPIO_MODE_NATIVE,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_INPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio45 = GPIO_DIR_OUTPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio49 = GPIO_DIR_OUTPUT,
-+	.gpio51 = GPIO_DIR_INPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio34 = GPIO_LEVEL_HIGH,
-+	.gpio45 = GPIO_LEVEL_LOW,
-+	.gpio49 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_GPIO,
-+	.gpio69 = GPIO_MODE_GPIO,
-+	.gpio70 = GPIO_MODE_GPIO,
-+	.gpio71 = GPIO_MODE_GPIO,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_NATIVE,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio68 = GPIO_DIR_INPUT,
-+	.gpio69 = GPIO_DIR_INPUT,
-+	.gpio70 = GPIO_DIR_INPUT,
-+	.gpio71 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/e6520/hda_verb.c b/src/mainboard/dell/e6520/hda_verb.c
-new file mode 100644
-index 0000000000..d33eb3b4c5
---- /dev/null
-+++ b/src/mainboard/dell/e6520/hda_verb.c
-@@ -0,0 +1,33 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
-+	0x10280494,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x10280494),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0x400000f2),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+	0x80862805,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/e6520/mainboard.c b/src/mainboard/dell/e6520/mainboard.c
-new file mode 100644
-index 0000000000..31e49802fc
---- /dev/null
-+++ b/src/mainboard/dell/e6520/mainboard.c
-@@ -0,0 +1,21 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <ec/acpi/ec.h>
-+#include <console/console.h>
-+#include <pc80/keyboard.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+
-+	/* FIXME: fix these values. */
-+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-+					GMA_INT15_PANEL_FIT_DEFAULT,
-+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+	.enable_dev = mainboard_enable,
-+};
--- 
-2.43.0
-
diff --git a/config/coreboot/default/patches/0030-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch b/config/coreboot/default/patches/0033-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
similarity index 96%
rename from config/coreboot/default/patches/0030-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
rename to config/coreboot/default/patches/0033-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
index e0af8372..beb65908 100644
--- a/config/coreboot/default/patches/0030-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
+++ b/config/coreboot/default/patches/0033-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
@@ -1,7 +1,7 @@
-From 4e0b62e6f0977cf922b1947955538ddca63bb954 Mon Sep 17 00:00:00 2001
+From 67b7a9e4d06d595adf8382ee83e82b5019e23afa Mon Sep 17 00:00:00 2001
 From: Riku Viitanen <riku.viitanen@protonmail.com>
 Date: Sat, 23 Dec 2023 19:02:10 +0200
-Subject: [PATCH 30/30] mb/hp: Add Compaq Elite 8300 CMT port
+Subject: [PATCH 1/1] mb/hp: Add Compaq Elite 8300 CMT port
 
 Based on autoport and Z220 SuperIO code.
 
@@ -32,7 +32,7 @@ Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
 ---
  .../hp/compaq_elite_8300_cmt/Kconfig          |  39 ++++
  .../hp/compaq_elite_8300_cmt/Kconfig.name     |   2 +
- .../hp/compaq_elite_8300_cmt/Makefile.inc     |   7 +
+ .../hp/compaq_elite_8300_cmt/Makefile.mk      |   7 +
  .../hp/compaq_elite_8300_cmt/acpi/ec.asl      |   1 +
  .../compaq_elite_8300_cmt/acpi/platform.asl   |  10 +
  .../hp/compaq_elite_8300_cmt/acpi/superio.asl |  29 +++
@@ -41,17 +41,17 @@ Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
  .../hp/compaq_elite_8300_cmt/cmos.default     |   7 +
  .../hp/compaq_elite_8300_cmt/cmos.layout      |  74 +++++++
  .../hp/compaq_elite_8300_cmt/data.vbt         | Bin 0 -> 3902 bytes
- .../hp/compaq_elite_8300_cmt/devicetree.cb    | 161 +++++++++++++++
+ .../hp/compaq_elite_8300_cmt/devicetree.cb    | 177 ++++++++++++++++
  .../hp/compaq_elite_8300_cmt/dsdt.asl         |  26 +++
- .../hp/compaq_elite_8300_cmt/early_init.c     |  31 +++
+ .../hp/compaq_elite_8300_cmt/early_init.c     |  14 ++
  .../compaq_elite_8300_cmt/gma-mainboard.ads   |  17 ++
  src/mainboard/hp/compaq_elite_8300_cmt/gpio.c | 191 ++++++++++++++++++
  .../hp/compaq_elite_8300_cmt/hda_verb.c       |  33 +++
  .../hp/compaq_elite_8300_cmt/mainboard.c      |  16 ++
- 18 files changed, 661 insertions(+)
+ 18 files changed, 660 insertions(+)
  create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
  create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name
- create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk
  create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl
  create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl
  create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl
@@ -121,11 +121,11 @@ index 0000000000..bd399b1e76
 @@ -0,0 +1,2 @@
 +config BOARD_HP_COMPAQ_ELITE_8300_CMT
 +	bool "Compaq Elite 8300 CMT"
-diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk
 new file mode 100644
 index 0000000000..fb492d3583
 --- /dev/null
-+++ b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk
 @@ -0,0 +1,7 @@
 +## SPDX-License-Identifier: GPL-2.0-only
 +
@@ -353,10 +353,10 @@ HcmV?d00001
 
 diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
 new file mode 100644
-index 0000000000..f4efabd792
+index 0000000000..3d21739b72
 --- /dev/null
 +++ b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
-@@ -0,0 +1,161 @@
+@@ -0,0 +1,177 @@
 +# SPDX-License-Identifier: GPL-2.0-only
 +
 +chip northbridge/intel/sandybridge
@@ -386,6 +386,22 @@ index 0000000000..f4efabd792
 +			register "superspeed_capable_ports" = "0x0000000f"
 +			register "xhci_overcurrent_mapping" = "0x00000c03"
 +			register "xhci_switchable_ports" = "0x0000000f"
++			register "usb_port_config" = "{
++				{ 1, 0, 0 },
++				{ 1, 0, 0 },
++				{ 1, 0, 1 },
++				{ 1, 0, 1 },
++				{ 1, 0, 2 },
++				{ 1, 0, 2 },
++				{ 1, 0, 3 },
++				{ 1, 0, 3 },
++				{ 1, 0, 4 },
++				{ 1, 0, 4 },
++				{ 1, 0, 6 },
++				{ 1, 0, 5 },
++				{ 1, 0, 5 },
++				{ 1, 0, 6 }
++			}"
 +
 +			device ref xhci on   end # USB 3.0 Controller
 +			device ref mei1 off  end # Management Engine Interface 1
@@ -405,7 +421,7 @@ index 0000000000..f4efabd792
 +			device ref pcie_rp3 on end
 +			device ref pcie_rp4 on end
 +			device ref pcie_rp5 on end
-+			device ref pcie_rp5 on end
++			device ref pcie_rp6 on end
 +			device ref pcie_rp7 on end
 +			device ref pcie_rp8 on end
 +
@@ -552,10 +568,10 @@ index 0000000000..e8e2b3a3e5
 +}
 diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c b/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
 new file mode 100644
-index 0000000000..99b7891c70
+index 0000000000..8d10c6317c
 --- /dev/null
 +++ b/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
-@@ -0,0 +1,31 @@
+@@ -0,0 +1,14 @@
 +/* SPDX-License-Identifier: GPL-2.0-only */
 +
 +#include <bootblock_common.h>
@@ -565,23 +581,6 @@ index 0000000000..99b7891c70
 +
 +#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2)
 +
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+	{ 1, 0, 0 },
-+	{ 1, 0, 0 },
-+	{ 1, 0, 1 },
-+	{ 1, 0, 1 },
-+	{ 1, 0, 2 },
-+	{ 1, 0, 2 },
-+	{ 1, 0, 3 },
-+	{ 1, 0, 3 },
-+	{ 1, 0, 4 },
-+	{ 1, 0, 4 },
-+	{ 1, 0, 6 },
-+	{ 1, 0, 5 },
-+	{ 1, 0, 5 },
-+	{ 1, 0, 6 },
-+};
-+
 +void bootblock_mainboard_early_init(void)
 +{
 +	if (CONFIG(CONSOLE_SERIAL))
diff --git a/config/coreboot/default/patches/0034-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch b/config/coreboot/default/patches/0034-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
deleted file mode 100644
index 9a1bea26..00000000
--- a/config/coreboot/default/patches/0034-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
+++ /dev/null
@@ -1,780 +0,0 @@
-From 86911e57c556389eed386bc23d5e87dd520afec9 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Wed, 31 Jan 2024 22:57:07 -0700
-Subject: [PATCH] mb/dell: Add Latitude E5530 (Ivy Bridge)
-
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e5530/Kconfig           |  37 ++++
- src/mainboard/dell/e5530/Kconfig.name      |   2 +
- src/mainboard/dell/e5530/Makefile.inc      |   6 +
- src/mainboard/dell/e5530/acpi/ec.asl       |   9 +
- src/mainboard/dell/e5530/acpi/platform.asl |  12 ++
- src/mainboard/dell/e5530/acpi/superio.asl  |   3 +
- src/mainboard/dell/e5530/acpi_tables.c     |  16 ++
- src/mainboard/dell/e5530/board_info.txt    |   6 +
- src/mainboard/dell/e5530/cmos.default      |   9 +
- src/mainboard/dell/e5530/cmos.layout       |  88 ++++++++++
- src/mainboard/dell/e5530/data.vbt          | Bin 0 -> 6144 bytes
- src/mainboard/dell/e5530/devicetree.cb     |  70 ++++++++
- src/mainboard/dell/e5530/dsdt.asl          |  30 ++++
- src/mainboard/dell/e5530/early_init.c      |  32 ++++
- src/mainboard/dell/e5530/gma-mainboard.ads |  20 +++
- src/mainboard/dell/e5530/gpio.c            | 194 +++++++++++++++++++++
- src/mainboard/dell/e5530/hda_verb.c        |  33 ++++
- src/mainboard/dell/e5530/mainboard.c       |  21 +++
- 18 files changed, 588 insertions(+)
- create mode 100644 src/mainboard/dell/e5530/Kconfig
- create mode 100644 src/mainboard/dell/e5530/Kconfig.name
- create mode 100644 src/mainboard/dell/e5530/Makefile.inc
- create mode 100644 src/mainboard/dell/e5530/acpi/ec.asl
- create mode 100644 src/mainboard/dell/e5530/acpi/platform.asl
- create mode 100644 src/mainboard/dell/e5530/acpi/superio.asl
- create mode 100644 src/mainboard/dell/e5530/acpi_tables.c
- create mode 100644 src/mainboard/dell/e5530/board_info.txt
- create mode 100644 src/mainboard/dell/e5530/cmos.default
- create mode 100644 src/mainboard/dell/e5530/cmos.layout
- create mode 100644 src/mainboard/dell/e5530/data.vbt
- create mode 100644 src/mainboard/dell/e5530/devicetree.cb
- create mode 100644 src/mainboard/dell/e5530/dsdt.asl
- create mode 100644 src/mainboard/dell/e5530/early_init.c
- create mode 100644 src/mainboard/dell/e5530/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/e5530/gpio.c
- create mode 100644 src/mainboard/dell/e5530/hda_verb.c
- create mode 100644 src/mainboard/dell/e5530/mainboard.c
-
-diff --git a/src/mainboard/dell/e5530/Kconfig b/src/mainboard/dell/e5530/Kconfig
-new file mode 100644
-index 0000000000..3faae4ee50
---- /dev/null
-+++ b/src/mainboard/dell/e5530/Kconfig
-@@ -0,0 +1,37 @@
-+if BOARD_DELL_LATITUDE_E5530
-+
-+config BOARD_SPECIFIC_OPTIONS
-+	def_bool y
-+	select BOARD_ROMSIZE_KB_12288
-+	select EC_ACPI
-+	select EC_DELL_MEC5035
-+	select GFX_GMA_PANEL_1_ON_LVDS
-+	select HAVE_ACPI_RESUME
-+	select HAVE_ACPI_TABLES
-+	select HAVE_CMOS_DEFAULT
-+	select HAVE_OPTION_TABLE
-+	select INTEL_GMA_HAVE_VBT
-+	select INTEL_INT15
-+	select MAINBOARD_HAS_LIBGFXINIT
-+	select NORTHBRIDGE_INTEL_SANDYBRIDGE
-+	select SERIRQ_CONTINUOUS_MODE
-+	select SOUTHBRIDGE_INTEL_C216
-+	select SYSTEM_TYPE_LAPTOP
-+	select USE_NATIVE_RAMINIT
-+
-+config DRAM_RESET_GATE_GPIO
-+	default 60
-+
-+config MAINBOARD_DIR
-+	default "dell/e5530"
-+
-+config MAINBOARD_PART_NUMBER
-+	default "Latitude E5530"
-+
-+config USBDEBUG_HCD_INDEX
-+	default 2
-+
-+config VGA_BIOS_ID
-+	default "8086,0166"
-+
-+endif # BOARD_DELL_LATITUDE_E5530
-diff --git a/src/mainboard/dell/e5530/Kconfig.name b/src/mainboard/dell/e5530/Kconfig.name
-new file mode 100644
-index 0000000000..775963204a
---- /dev/null
-+++ b/src/mainboard/dell/e5530/Kconfig.name
-@@ -0,0 +1,2 @@
-+config BOARD_DELL_LATITUDE_E5530
-+	bool "Latitude E5530"
-diff --git a/src/mainboard/dell/e5530/Makefile.inc b/src/mainboard/dell/e5530/Makefile.inc
-new file mode 100644
-index 0000000000..ba64e93eb8
---- /dev/null
-+++ b/src/mainboard/dell/e5530/Makefile.inc
-@@ -0,0 +1,6 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+bootblock-y += early_init.c
-+bootblock-y += gpio.c
-+romstage-y += early_init.c
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/e5530/acpi/ec.asl b/src/mainboard/dell/e5530/acpi/ec.asl
-new file mode 100644
-index 0000000000..0d429410a9
---- /dev/null
-+++ b/src/mainboard/dell/e5530/acpi/ec.asl
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Device(EC)
-+{
-+	Name (_HID, EISAID("PNP0C09"))
-+	Name (_UID, 0)
-+	Name (_GPE, 16)
-+/* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e5530/acpi/platform.asl b/src/mainboard/dell/e5530/acpi/platform.asl
-new file mode 100644
-index 0000000000..2d24bbd9b9
---- /dev/null
-+++ b/src/mainboard/dell/e5530/acpi/platform.asl
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+	/* FIXME: EC support  */
-+	Return(Package() {0, 0})
-+}
-+
-+Method(_PTS,1)
-+{
-+	/* FIXME: EC support  */
-+}
-diff --git a/src/mainboard/dell/e5530/acpi/superio.asl b/src/mainboard/dell/e5530/acpi/superio.asl
-new file mode 100644
-index 0000000000..55b1db5b11
---- /dev/null
-+++ b/src/mainboard/dell/e5530/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <drivers/pc80/pc/ps2_controller.asl>
-diff --git a/src/mainboard/dell/e5530/acpi_tables.c b/src/mainboard/dell/e5530/acpi_tables.c
-new file mode 100644
-index 0000000000..e2759659bf
---- /dev/null
-+++ b/src/mainboard/dell/e5530/acpi_tables.c
-@@ -0,0 +1,16 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi_gnvs.h>
-+#include <soc/nvs.h>
-+
-+/* FIXME: check this function.  */
-+void mainboard_fill_gnvs(struct global_nvs *gnvs)
-+{
-+	/* The lid is open by default. */
-+	gnvs->lids = 1;
-+
-+	/* Temperature at which OS will shutdown */
-+	gnvs->tcrt = 100;
-+	/* Temperature at which OS will throttle CPU */
-+	gnvs->tpsv = 90;
-+}
-diff --git a/src/mainboard/dell/e5530/board_info.txt b/src/mainboard/dell/e5530/board_info.txt
-new file mode 100644
-index 0000000000..4601a4aaba
---- /dev/null
-+++ b/src/mainboard/dell/e5530/board_info.txt
-@@ -0,0 +1,6 @@
-+Category: laptop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2012
-diff --git a/src/mainboard/dell/e5530/cmos.default b/src/mainboard/dell/e5530/cmos.default
-new file mode 100644
-index 0000000000..279415dfd1
---- /dev/null
-+++ b/src/mainboard/dell/e5530/cmos.default
-@@ -0,0 +1,9 @@
-+boot_option=Fallback
-+debug_level=Debug
-+power_on_after_fail=Disable
-+nmi=Enable
-+bluetooth=Enable
-+wwan=Enable
-+wlan=Enable
-+sata_mode=AHCI
-+me_state=Disabled
-diff --git a/src/mainboard/dell/e5530/cmos.layout b/src/mainboard/dell/e5530/cmos.layout
-new file mode 100644
-index 0000000000..1aa7e77bce
---- /dev/null
-+++ b/src/mainboard/dell/e5530/cmos.layout
-@@ -0,0 +1,88 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0	120	r	0	reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384	1	e	4	boot_option
-+388	4	h	0	reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395	4	e	6	debug_level
-+
-+#400	8	r	0	reserved for century byte
-+
-+# coreboot config options: southbridge
-+408	1	e	1	nmi
-+409	2	e	7	power_on_after_fail
-+411     1       e       9       sata_mode
-+
-+# coreboot config options: EC
-+412	1	e	1	bluetooth
-+413	1	e	1	wwan
-+414	1	e	1	wlan
-+
-+# coreboot config options: ME
-+424	1	e	14	me_state
-+425	2	h	0	me_state_prev
-+
-+# coreboot config options: northbridge
-+432	3	e	11	gfx_uma_size
-+435	2	e	12	hybrid_graphics_mode
-+440	8	h	0	volume
-+
-+# VBOOT
-+448	128	r	0	vbnv
-+
-+# SandyBridge MRC Scrambler Seed values
-+896	32	r	0	mrc_scrambler_seed
-+928	32	r	0	mrc_scrambler_seed_s3
-+960	16	r	0	mrc_scrambler_seed_chk
-+
-+# coreboot config options: check sums
-+984	16	h	0	check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID	value	text
-+1	0	Disable
-+1	1	Enable
-+2	0	Enable
-+2	1	Disable
-+4	0	Fallback
-+4	1	Normal
-+6	0	Emergency
-+6	1	Alert
-+6	2	Critical
-+6	3	Error
-+6	4	Warning
-+6	5	Notice
-+6	6	Info
-+6	7	Debug
-+6	8	Spew
-+7	0	Disable
-+7	1	Enable
-+7	2	Keep
-+9	0	AHCI
-+9	1	Compatible
-+11	0	32M
-+11	1	64M
-+11	2	96M
-+11	3	128M
-+11	4	160M
-+11	5	192M
-+11	6	224M
-+14	0	Normal
-+14	1	Disabled
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 447 984
-diff --git a/src/mainboard/dell/e5530/data.vbt b/src/mainboard/dell/e5530/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..3c54b70be7856a6420d001112d7f17f8bab46ed3
-GIT binary patch
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-Jz~2*rUjdP?m;3+#
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/e5530/devicetree.cb b/src/mainboard/dell/e5530/devicetree.cb
-new file mode 100644
-index 0000000000..2af748cf27
---- /dev/null
-+++ b/src/mainboard/dell/e5530/devicetree.cb
-@@ -0,0 +1,70 @@
-+chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
-+	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-+	register "gpu_cpu_backlight" = "0x00000000"
-+	register "gpu_dp_b_hotplug" = "4"
-+	register "gpu_dp_c_hotplug" = "4"
-+	register "gpu_dp_d_hotplug" = "4"
-+	register "gpu_panel_port_select" = "0"
-+	register "gpu_panel_power_backlight_off_delay" = "2300"
-+	register "gpu_panel_power_backlight_on_delay" = "2300"
-+	register "gpu_panel_power_cycle_delay" = "6"
-+	register "gpu_panel_power_down_delay" = "400"
-+	register "gpu_panel_power_up_delay" = "400"
-+	register "gpu_pch_backlight" = "0x03d003d0"
-+
-+	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
-+
-+	device domain 0x0 on
-+		subsystemid 0x1028 0x053d inherit
-+
-+		device ref host_bridge on end
-+		device ref peg10 off end
-+		device ref igd on end
-+
-+		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+			register "docking_supported" = "1"
-+			register "gen1_dec" = "0x007c0681"
-+			register "gen2_dec" = "0x005c0921"
-+			register "gen3_dec" = "0x003c07e1"
-+			register "gen4_dec" = "0x00000911" # Ports 0x910/0x911 for EC
-+			register "gpi0_routing" = "2"
-+			register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
-+			register "pcie_port_coalesce" = "1"
-+			register "sata_interface_speed_support" = "0x3"
-+			register "sata_port_map" = "0x33"
-+			register "spi_lvscc" = "0x2005"
-+			register "spi_uvscc" = "0x2005"
-+			register "superspeed_capable_ports" = "0x0000000f"
-+			register "xhci_overcurrent_mapping" = "0x00000c03"
-+			register "xhci_switchable_ports" = "0x0000000f"
-+
-+			device ref xhci		on end
-+			device ref mei1		off end
-+			device ref mei2		off end
-+			device ref me_ide_r	off end
-+			device ref me_kt	off end
-+			device ref gbe		off end
-+			device ref ehci2	on end
-+			device ref hda		on end
-+			device ref pcie_rp1	on end # WWAN Slot
-+			device ref pcie_rp2	on end # SLAN Slot
-+			device ref pcie_rp3	on end # ExpressCard
-+			device ref pcie_rp4	off end
-+			device ref pcie_rp5	on end # Extra Half Mini PCIe slot
-+			device ref pcie_rp6	on end # SD/MMC Card Reader
-+			device ref pcie_rp7	on end # BCM5761 Ethernet
-+			device ref pcie_rp8	off end
-+			device ref ehci1	on end
-+			device ref pci_bridge	off end
-+			device ref lpc		on
-+				chip ec/dell/mec5035
-+					device pnp ff.0 on end
-+				end
-+			end
-+			device ref sata1	on end
-+			device ref smbus	on end
-+			device ref sata2	off end
-+			device ref thermal	off end
-+		end
-+	end
-+end
-diff --git a/src/mainboard/dell/e5530/dsdt.asl b/src/mainboard/dell/e5530/dsdt.asl
-new file mode 100644
-index 0000000000..7d13c55b08
---- /dev/null
-+++ b/src/mainboard/dell/e5530/dsdt.asl
-@@ -0,0 +1,30 @@
-+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <acpi/acpi.h>
-+
-+DefinitionBlock(
-+	"dsdt.aml",
-+	"DSDT",
-+	ACPI_DSDT_REV_2,
-+	OEM_ID,
-+	ACPI_TABLE_CREATOR,
-+	0x20141018	/* OEM revision */
-+)
-+{
-+	#include <acpi/dsdt_top.asl>
-+	#include "acpi/platform.asl"
-+	#include <cpu/intel/common/acpi/cpu.asl>
-+	#include <southbridge/intel/common/acpi/platform.asl>
-+	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-+	#include <southbridge/intel/common/acpi/sleepstates.asl>
-+
-+	Device (\_SB.PCI0)
-+	{
-+		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-+		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
-+		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
-+	}
-+}
-diff --git a/src/mainboard/dell/e5530/early_init.c b/src/mainboard/dell/e5530/early_init.c
-new file mode 100644
-index 0000000000..00fd5f6795
---- /dev/null
-+++ b/src/mainboard/dell/e5530/early_init.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+	{ 1, 1, 0 },
-+	{ 1, 1, 0 },
-+	{ 1, 1, 1 },
-+	{ 1, 1, 1 },
-+	{ 1, 1, 2 },
-+	{ 1, 1, 2 },
-+	{ 1, 1, 3 },
-+	{ 1, 0, 3 },
-+	{ 1, 2, 4 },
-+	{ 1, 1, 4 },
-+	{ 1, 1, 5 },
-+	{ 1, 1, 5 },
-+	{ 1, 0, 6 },
-+	{ 1, 1, 6 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+			| COMB_LPC_EN | COMA_LPC_EN);
-+	mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/e5530/gma-mainboard.ads b/src/mainboard/dell/e5530/gma-mainboard.ads
-new file mode 100644
-index 0000000000..1310830c8e
---- /dev/null
-+++ b/src/mainboard/dell/e5530/gma-mainboard.ads
-@@ -0,0 +1,20 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+   ports : constant Port_List :=
-+     (
-+      HDMI1, -- mainboard HDMI
-+      DP2, -- dock DP
-+      DP3, -- dock DP
-+      Analog, --mainboard VGA
-+      LVDS,
-+      others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/e5530/gpio.c b/src/mainboard/dell/e5530/gpio.c
-new file mode 100644
-index 0000000000..0599f13921
---- /dev/null
-+++ b/src/mainboard/dell/e5530/gpio.c
-@@ -0,0 +1,194 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_GPIO,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_GPIO,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_GPIO,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_GPIO,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_NATIVE,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio1 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio3 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio12 = GPIO_DIR_OUTPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio16 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_OUTPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio12 = GPIO_LEVEL_HIGH,
-+	.gpio28 = GPIO_LEVEL_LOW,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+	.gpio30 = GPIO_RESET_RSMRST,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio13 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_GPIO,
-+	.gpio46 = GPIO_MODE_NATIVE,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_GPIO,
-+	.gpio50 = GPIO_MODE_NATIVE,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_GPIO,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_NATIVE,
-+	.gpio56 = GPIO_MODE_NATIVE,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_INPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_INPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio45 = GPIO_DIR_INPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio49 = GPIO_DIR_INPUT,
-+	.gpio51 = GPIO_DIR_INPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio53 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_GPIO,
-+	.gpio69 = GPIO_MODE_GPIO,
-+	.gpio70 = GPIO_MODE_GPIO,
-+	.gpio71 = GPIO_MODE_GPIO,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_GPIO,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio68 = GPIO_DIR_INPUT,
-+	.gpio69 = GPIO_DIR_INPUT,
-+	.gpio70 = GPIO_DIR_INPUT,
-+	.gpio71 = GPIO_DIR_INPUT,
-+	.gpio74 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/e5530/hda_verb.c b/src/mainboard/dell/e5530/hda_verb.c
-new file mode 100644
-index 0000000000..4c7c36ee05
---- /dev/null
-+++ b/src/mainboard/dell/e5530/hda_verb.c
-@@ -0,0 +1,33 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76df,	/* Codec Vendor / Device ID: IDT */
-+	0x1028053d,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x1028053d),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0xd5a301a0),
-+
-+	0x80862806,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/e5530/mainboard.c b/src/mainboard/dell/e5530/mainboard.c
-new file mode 100644
-index 0000000000..31e49802fc
---- /dev/null
-+++ b/src/mainboard/dell/e5530/mainboard.c
-@@ -0,0 +1,21 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <ec/acpi/ec.h>
-+#include <console/console.h>
-+#include <pc80/keyboard.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+
-+	/* FIXME: fix these values. */
-+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-+					GMA_INT15_PANEL_FIT_DEFAULT,
-+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+	.enable_dev = mainboard_enable,
-+};
--- 
-2.43.0
-
diff --git a/config/coreboot/default/patches/0034-mb-hp-Add-Elitebook-8560w-as-an-HP-Sandy-Ivy-Bridge-.patch b/config/coreboot/default/patches/0034-mb-hp-Add-Elitebook-8560w-as-an-HP-Sandy-Ivy-Bridge-.patch
deleted file mode 100644
index 458c3723..00000000
--- a/config/coreboot/default/patches/0034-mb-hp-Add-Elitebook-8560w-as-an-HP-Sandy-Ivy-Bridge-.patch
+++ /dev/null
@@ -1,1556 +0,0 @@
-From dac71d8ed89f1f1d295157aa62c678e35a320222 Mon Sep 17 00:00:00 2001
-From: Iru Cai <mytbk920423@gmail.com>
-Date: Tue, 5 Mar 2019 16:27:36 +0800
-Subject: [PATCH] mb/hp: Add Elitebook 8560w as an HP Sandy/Ivy Bridge laptop
- variant
-
-Change-Id: I15181792b1efa45a2a94d78e43c6257da1acf950
-Signed-off-by: Iru Cai <mytbk920423@gmail.com>
----
- Documentation/mainboard/hp/8560w.md           |  82 +++++++
- Documentation/mainboard/hp/8560w_flash.webp   | Bin 0 -> 51432 bytes
- Documentation/mainboard/index.md              |   1 +
- src/mainboard/hp/snb_ivb_laptops/Kconfig      |  10 +-
- src/mainboard/hp/snb_ivb_laptops/Kconfig.name |   3 +
- .../variants/8560w/board_info.txt             |   7 +
- .../variants/8560w/early_init.c               |  36 +++
- .../hp/snb_ivb_laptops/variants/8560w/gpio.c  | 224 ++++++++++++++++++
- .../snb_ivb_laptops/variants/8560w/hda_verb.c |  25 ++
- .../variants/8560w/overridetree.cb            |  51 ++++
- 10 files changed, 438 insertions(+), 1 deletion(-)
- create mode 100644 Documentation/mainboard/hp/8560w.md
- create mode 100644 Documentation/mainboard/hp/8560w_flash.webp
- create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt
- create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c
- create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
- create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c
- create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb
-
-diff --git a/Documentation/mainboard/hp/8560w.md b/Documentation/mainboard/hp/8560w.md
-new file mode 100644
-index 0000000000..cc35a0be1f
---- /dev/null
-+++ b/Documentation/mainboard/hp/8560w.md
-@@ -0,0 +1,82 @@
-+# HP EliteBook 8560w
-+
-+This page describes how to run coreboot on the [HP EliteBook 8560w].
-+
-+## Required proprietary blobs
-+
-+- Intel Firmware Descriptor, ME and GbE firmware
-+- EC: please read [HP Laptops with KBC1126 Embedded Controller](hp_kbc1126_laptops)
-+
-+## Flashing instructions
-+
-+HP EliteBook 8560w has an 8MiB SOIC-8 flash chip on the bottom of the
-+mainboard. You just need to remove the service cover, and use an SOIC-8
-+clip to read and flash the chip.
-+
-+![8560w_chip_location](8560w_flash.webp)
-+
-+```eval_rst
-++---------------------+------------+
-+| Type                | Value      |
-++=====================+============+
-+| Socketed flash      | no         |
-++---------------------+------------+
-+| Model               | MX25L6406E |
-++---------------------+------------+
-+| Size                | 8 MiB      |
-++---------------------+------------+
-+| Package             | SOIC-8     |
-++---------------------+------------+
-+| Write protection    | no         |
-++---------------------+------------+
-+| Dual BIOS feature   | no         |
-++---------------------+------------+
-+| In circuit flashing | yes        |
-++---------------------+------------+
-+| Internal flashing   | yes        |
-++---------------------+------------+
-+```
-+
-+## Untested
-+
-+- mainboards with 4 memory slots
-+
-+## Working
-+
-+- i7-2720QM, 8G+8G
-+- Arch Linux boot from SeaBIOS payload
-+- EHCI debug: the port is beside the eSATA port
-+- SATA
-+- eSATA
-+- USB2 and USB3
-+- keyboard
-+- Gigabit Ethernet
-+- WLAN
-+- WWAN
-+- VGA and DisplayPort
-+- audio
-+- EC ACPI
-+- Using `me_cleaner`
-+- dock: PS/2 keyboard, USB, DisplayPort
-+- TPM
-+- S3 suspend/resume
-+
-+## Technology
-+
-+```eval_rst
-++------------------+--------------------------------------------------+
-+| Northbridge      | :doc:`../../northbridge/intel/sandybridge/index` |
-++------------------+--------------------------------------------------+
-+| Southbridge      | bd82x6x                                          |
-++------------------+--------------------------------------------------+
-+| CPU              | model_206ax                                      |
-++------------------+--------------------------------------------------+
-+| Super I/O        | SMSC LPC47n217                                   |
-++------------------+--------------------------------------------------+
-+| EC               | SMSC KBC1126                                     |
-++------------------+--------------------------------------------------+
-+| Coprocessor      | Intel Management Engine                          |
-++------------------+--------------------------------------------------+
-+```
-+
-+[HP EliteBook 8560w]: https://support.hp.com/us-en/product/hp-elitebook-8560w-mobile-workstation/5071171
-diff --git a/Documentation/mainboard/hp/8560w_flash.webp b/Documentation/mainboard/hp/8560w_flash.webp
-new file mode 100644
-index 0000000000000000000000000000000000000000..b8295bc6e920a4c59c4282e419200569672e8267
-GIT binary patch
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-
-literal 0
-HcmV?d00001
-
-diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md
-index 519d88873c..a6be27ae09 100644
---- a/Documentation/mainboard/index.md
-+++ b/Documentation/mainboard/index.md
-@@ -84,6 +84,7 @@ The boards in this section are not real mainboards, but emulators.
- - [HP Sure Start](hp/hp_sure_start.md)
- - [EliteBook 2170p](hp/2170p.md)
- - [EliteBook 2560p](hp/2560p.md)
-+- [EliteBook 8560w](hp/8560w.md)
- - [EliteBook 8760w](hp/8760w.md)
- - [EliteBook Folio 9480m](hp/folio_9480m.md)
- - [EliteBook 820 G2](hp/elitebook_820_g2.md)
-diff --git a/src/mainboard/hp/snb_ivb_laptops/Kconfig b/src/mainboard/hp/snb_ivb_laptops/Kconfig
-index f0bd55f64f..f180bca87f 100644
---- a/src/mainboard/hp/snb_ivb_laptops/Kconfig
-+++ b/src/mainboard/hp/snb_ivb_laptops/Kconfig
-@@ -69,6 +69,12 @@ config BOARD_HP_8470P
- 	select SOUTHBRIDGE_INTEL_C216
- 	select SUPERIO_SMSC_LPC47N217
- 
-+config BOARD_HP_8560W
-+	select BOARD_HP_SNB_IVB_LAPTOPS_COMMON
-+	select BOARD_ROMSIZE_KB_8192
-+	select SOUTHBRIDGE_INTEL_BD82X6X
-+	select SUPERIO_SMSC_LPC47N217
-+
- config BOARD_HP_8770W
- 	select BOARD_HP_SNB_IVB_LAPTOPS_COMMON
- 	select BOARD_ROMSIZE_KB_16384
-@@ -118,6 +124,7 @@ config VARIANT_DIR
- 	default "2760p"          if BOARD_HP_2760P
- 	default "8460p"          if BOARD_HP_8460P
- 	default "8470p"          if BOARD_HP_8470P
-+	default "8560w"          if BOARD_HP_8560W
- 	default "8770w"          if BOARD_HP_8770W
- 	default "folio_9470m"    if BOARD_HP_FOLIO_9470M
- 	default "probook_6360b"  if BOARD_HP_PROBOOK_6360B
-@@ -130,6 +137,7 @@ config MAINBOARD_PART_NUMBER
- 	default "EliteBook 2760p"          if BOARD_HP_2760P
- 	default "EliteBook 8460p"          if BOARD_HP_8460P
- 	default "EliteBook 8470p"          if BOARD_HP_8470P
-+	default "EliteBook 8560w"          if BOARD_HP_8560W
- 	default "EliteBook 8770w"          if BOARD_HP_8770W
- 	default "EliteBook Folio 9470m"    if BOARD_HP_FOLIO_9470M
- 	default "ProBook 6360b"            if BOARD_HP_PROBOOK_6360B
-@@ -146,7 +154,7 @@ config VGA_BIOS_ID
- config USBDEBUG_HCD_INDEX
- 	int
- 	default 0 if BOARD_HP_2170P || BOARD_HP_FOLIO_9470M
--	default 1 if BOARD_HP_2560P || BOARD_HP_2760P || BOARD_HP_8460P
-+	default 1 if BOARD_HP_2560P || BOARD_HP_2760P || BOARD_HP_8460P || BOARD_HP_8560W
- 	default 2 if BOARD_HP_2570P || BOARD_HP_8470P || BOARD_HP_8770W
- 	default 1 if BOARD_HP_PROBOOK_6360B # FIXME: check this
- 	default 2 if BOARD_HP_REVOLVE_810_G1 # FIXME: check this
-diff --git a/src/mainboard/hp/snb_ivb_laptops/Kconfig.name b/src/mainboard/hp/snb_ivb_laptops/Kconfig.name
-index f72e0f622a..fdd1b93bd7 100644
---- a/src/mainboard/hp/snb_ivb_laptops/Kconfig.name
-+++ b/src/mainboard/hp/snb_ivb_laptops/Kconfig.name
-@@ -18,6 +18,9 @@ config BOARD_HP_8460P
- config BOARD_HP_8470P
- 	bool "EliteBook 8470p"
- 
-+config BOARD_HP_8560W
-+	bool "EliteBook 8560w"
-+
- config BOARD_HP_8770W
- 	bool "EliteBook 8770w"
- 
-diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt
-new file mode 100644
-index 0000000000..558e904a94
---- /dev/null
-+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt
-@@ -0,0 +1,7 @@
-+Category: laptop
-+Board URL: https://support.hp.com/us-en/product/hp-elitebook-8560w-mobile-workstation/5071171
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2011
-diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c
-new file mode 100644
-index 0000000000..20c4b68911
---- /dev/null
-+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c
-@@ -0,0 +1,36 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <bootblock_common.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <superio/smsc/lpc47n217/lpc47n217.h>
-+#include <ec/hp/kbc1126/ec.h>
-+
-+#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1)
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+	{ 1, 1, 0 }, /* USB0 */
-+	{ 1, 1, 0 }, /* USB1 */
-+	{ 1, 1, 1 }, /* eSATA */
-+	{ 1, 1, 1 }, /* camera */
-+	{ 0, 0, 2 },
-+	{ 1, 0, 2 }, /* bluetooth */
-+	{ 0, 0, 3 },
-+	{ 1, 0, 3 },
-+	{ 0, 1, 4 },
-+	{ 1, 1, 4 }, /* WWAN */
-+	{ 1, 0, 5 },
-+	{ 1, 0, 5 }, /* dock */
-+	{ 1, 0, 6 },
-+	{ 1, 0, 6 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-+	kbc1126_enter_conf();
-+	kbc1126_mailbox_init();
-+	kbc1126_kbc_init();
-+	kbc1126_ec_init();
-+	kbc1126_pm1_init();
-+	kbc1126_exit_conf();
-+}
-diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
-new file mode 100644
-index 0000000000..560d668d6f
---- /dev/null
-+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
-@@ -0,0 +1,224 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_GPIO,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_GPIO,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_GPIO,
-+	.gpio11 = GPIO_MODE_GPIO,
-+	.gpio12 = GPIO_MODE_NATIVE,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_GPIO,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_GPIO,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_NATIVE,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_OUTPUT,
-+	.gpio1 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio3 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio10 = GPIO_DIR_INPUT,
-+	.gpio11 = GPIO_DIR_OUTPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio16 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_OUTPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_OUTPUT,
-+	.gpio23 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_OUTPUT,
-+	.gpio27 = GPIO_DIR_OUTPUT,
-+	.gpio28 = GPIO_DIR_OUTPUT,
-+	.gpio29 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio0 = GPIO_LEVEL_LOW,
-+	.gpio11 = GPIO_LEVEL_LOW,
-+	.gpio17 = GPIO_LEVEL_HIGH,
-+	.gpio22 = GPIO_LEVEL_HIGH,
-+	.gpio24 = GPIO_LEVEL_HIGH,
-+	.gpio27 = GPIO_LEVEL_LOW,
-+	.gpio28 = GPIO_LEVEL_LOW,
-+	.gpio29 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+	.gpio24 = GPIO_RESET_RSMRST,
-+	.gpio30 = GPIO_RESET_RSMRST,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio1 = GPIO_INVERT,
-+	.gpio3 = GPIO_INVERT,
-+	.gpio6 = GPIO_INVERT,
-+	.gpio7 = GPIO_INVERT,
-+	.gpio10 = GPIO_INVERT,
-+	.gpio13 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_NATIVE,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_GPIO,
-+	.gpio45 = GPIO_MODE_NATIVE,
-+	.gpio46 = GPIO_MODE_GPIO,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_GPIO,
-+	.gpio50 = GPIO_MODE_GPIO,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_GPIO,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_GPIO,
-+	.gpio56 = GPIO_MODE_NATIVE,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_GPIO,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_OUTPUT,
-+	.gpio34 = GPIO_DIR_INPUT,
-+	.gpio35 = GPIO_DIR_OUTPUT,
-+	.gpio37 = GPIO_DIR_OUTPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio44 = GPIO_DIR_INPUT,
-+	.gpio46 = GPIO_DIR_INPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio49 = GPIO_DIR_OUTPUT,
-+	.gpio50 = GPIO_DIR_INPUT,
-+	.gpio51 = GPIO_DIR_INPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio53 = GPIO_DIR_OUTPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio55 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_OUTPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+	.gpio61 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio33 = GPIO_LEVEL_LOW,
-+	.gpio35 = GPIO_LEVEL_LOW,
-+	.gpio37 = GPIO_LEVEL_LOW,
-+	.gpio49 = GPIO_LEVEL_LOW,
-+	.gpio53 = GPIO_LEVEL_HIGH,
-+	.gpio57 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+	.gpio61 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_GPIO,
-+	.gpio69 = GPIO_MODE_GPIO,
-+	.gpio70 = GPIO_MODE_GPIO,
-+	.gpio71 = GPIO_MODE_GPIO,
-+	.gpio72 = GPIO_MODE_GPIO,
-+	.gpio73 = GPIO_MODE_GPIO,
-+	.gpio74 = GPIO_MODE_GPIO,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio68 = GPIO_DIR_OUTPUT,
-+	.gpio69 = GPIO_DIR_INPUT,
-+	.gpio70 = GPIO_DIR_OUTPUT,
-+	.gpio71 = GPIO_DIR_OUTPUT,
-+	.gpio72 = GPIO_DIR_OUTPUT,
-+	.gpio73 = GPIO_DIR_OUTPUT,
-+	.gpio74 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+	.gpio68 = GPIO_LEVEL_HIGH,
-+	.gpio70 = GPIO_LEVEL_HIGH,
-+	.gpio71 = GPIO_LEVEL_HIGH,
-+	.gpio72 = GPIO_LEVEL_LOW,
-+	.gpio73 = GPIO_LEVEL_HIGH,
-+	.gpio74 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c
-new file mode 100644
-index 0000000000..2f5469fc84
---- /dev/null
-+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c
-@@ -0,0 +1,25 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d7605, /* Codec Vendor / Device ID: IDT */
-+	0x103c1631, /* Subsystem ID */
-+
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x103c1631),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x40f000f0),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0421401f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x04a11020),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x40f000f0),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x40f000f0),
-+	AZALIA_PIN_CFG(0, 0x10, 0x40f000f0),
-+	AZALIA_PIN_CFG(0, 0x11, 0x90a60130),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x40f000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0x40f000f0),
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb
-new file mode 100644
-index 0000000000..4264270ad0
---- /dev/null
-+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb
-@@ -0,0 +1,51 @@
-+# SPDX-License-Identifier: GPL-2.0-or-later
-+
-+chip northbridge/intel/sandybridge
-+	register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}"
-+	device domain 0 on
-+		subsystemid 0x103c 0x1631 inherit
-+		device pci 01.0 on end # PCIe Bridge for discrete graphics
-+		device pci 02.0 off end # Internal graphics
-+
-+		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+			register "docking_supported" = "0"
-+			register "gen1_dec" = "0x007c0201"
-+			register "gen2_dec" = "0x000c0101"
-+			register "gen3_dec" = "0x00fcfe01"
-+			register "gen4_dec" = "0x000402e9"
-+			register "gpi6_routing" = "2"
-+			register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
-+			# HDD(0), ODD(1), eSATA(4)
-+			register "sata_port_map" = "0x3b"
-+
-+			device pci 1c.0 on  end # PCIe Port #1, WWAN
-+			device pci 1c.1 on  end # PCIe Port #2, ExpressCard
-+			device pci 1c.2 on  end # PCIe Port #3, SD/MMC
-+			device pci 1c.3 on  end # PCIe Port #4, WLAN
-+			device pci 1c.4 off end # PCIe Port #5
-+			device pci 1c.5 off end # PCIe Port #6
-+			device pci 1c.6 off end # PCIe Port #7
-+			device pci 1c.7 on  end # PCIe Port #8, NEC USB 3.0 Host Controller
-+			device pci 1f.0 on	# LPC bridge
-+				chip ec/hp/kbc1126
-+					register "ec_data_port" = "0x60"
-+					register "ec_cmd_port"  = "0x64"
-+					register "ec_ctrl_reg"  = "0xca"
-+					register "ec_fan_ctrl_value" = "0x6b"
-+					device pnp ff.1 off end
-+				end
-+				chip superio/smsc/lpc47n217
-+					device pnp 4e.3 on	# Parallel
-+						io  0x60 = 0x378
-+						irq 0x70 = 7
-+					end
-+					device pnp 4e.4 on	# COM1
-+						io  0x60 = 0x3f8
-+						irq 0x70 = 4
-+					end
-+					device pnp 4e.5 off end	# COM2
-+				end
-+			end
-+		end
-+	end
-+end
--- 
-2.43.0
-
diff --git a/config/coreboot/default/patches/0036-nb-intel-haswell-make-IOMMU-a-runtime-option.patch b/config/coreboot/default/patches/0034-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
similarity index 92%
rename from config/coreboot/default/patches/0036-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
rename to config/coreboot/default/patches/0034-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
index 8401e8b8..ed6c0d65 100644
--- a/config/coreboot/default/patches/0036-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
+++ b/config/coreboot/default/patches/0034-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
@@ -1,7 +1,7 @@
-From 7c755b4502ea007f2216ea76f2ed734452def883 Mon Sep 17 00:00:00 2001
+From eef3e0d517bde40d4761a9af3c004801a89db887 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 2 Mar 2024 22:51:09 +0000
-Subject: [PATCH 1/2] nb/intel/haswell: make IOMMU a runtime option
+Subject: [PATCH 34/39] nb/intel/haswell: make IOMMU a runtime option
 
 When I tested graphics cards on a coreboot port for Dell
 OptiPlex 9020 SFF, I could not use a graphics card unless
@@ -38,10 +38,10 @@ Signed-off-by: Leah Rowe <info@minifree.org>
  14 files changed, 48 insertions(+)
 
 diff --git a/src/mainboard/asrock/b85m_pro4/cmos.default b/src/mainboard/asrock/b85m_pro4/cmos.default
-index c51001c03c..1c5c17f841 100644
+index 01bf20ad16..dfc8b80fb0 100644
 --- a/src/mainboard/asrock/b85m_pro4/cmos.default
 +++ b/src/mainboard/asrock/b85m_pro4/cmos.default
-@@ -2,3 +2,4 @@ boot_option=Fallback
+@@ -4,3 +4,4 @@ boot_option=Fallback
  debug_level=Debug
  nmi=Enable
  power_on_after_fail=Disable
@@ -68,10 +68,10 @@ index efdc333fc2..c9883ea71d 100644
  
  # -----------------------------------------------------------------
 diff --git a/src/mainboard/asrock/h81m-hds/cmos.default b/src/mainboard/asrock/h81m-hds/cmos.default
-index c51001c03c..1c5c17f841 100644
+index 01bf20ad16..dfc8b80fb0 100644
 --- a/src/mainboard/asrock/h81m-hds/cmos.default
 +++ b/src/mainboard/asrock/h81m-hds/cmos.default
-@@ -2,3 +2,4 @@ boot_option=Fallback
+@@ -4,3 +4,4 @@ boot_option=Fallback
  debug_level=Debug
  nmi=Enable
  power_on_after_fail=Disable
@@ -101,16 +101,16 @@ index c9ba76c78f..95ee3d36fb 100644
  checksums
  
 diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
-index b159660aa8..8253570f19 100644
+index 6c4a2a1be7..8000eea8c0 100644
 --- a/src/mainboard/dell/optiplex_9020/cmos.default
 +++ b/src/mainboard/dell/optiplex_9020/cmos.default
-@@ -2,3 +2,4 @@ boot_option=Fallback
- debug_level=Debug
+@@ -4,3 +4,4 @@ debug_level=Debug
  nmi=Disable
  power_on_after_fail=Disable
+ fan_full_speed=Disable
 +iommu=Enable
 diff --git a/src/mainboard/dell/optiplex_9020/cmos.layout b/src/mainboard/dell/optiplex_9020/cmos.layout
-index c9ba76c78f..72ff9c4bee 100644
+index d10ad95b23..4a1496a878 100644
 --- a/src/mainboard/dell/optiplex_9020/cmos.layout
 +++ b/src/mainboard/dell/optiplex_9020/cmos.layout
 @@ -21,6 +21,9 @@ entries
@@ -118,12 +118,12 @@ index c9ba76c78f..72ff9c4bee 100644
  409	2	e	5	power_on_after_fail
  
 +# turn iommu on or off
-+412	1	e	6	iommu
++411	1	e	6	iommu
 +
- # coreboot config options: check sums
- 984	16	h	0	check_sum
+ # coreboot config options: EC
+ 412	1	e	1	fan_full_speed
  
-@@ -52,6 +55,9 @@ enumerations
+@@ -55,6 +58,9 @@ enumerations
  5	1	Enable
  5	2	Keep
  
@@ -202,10 +202,10 @@ index 78d44c1415..f2c602f541 100644
  checksums
  
 diff --git a/src/mainboard/lenovo/haswell/cmos.default b/src/mainboard/lenovo/haswell/cmos.default
-index bb8626d48b..051658d757 100644
+index 08db97c5a9..cc6b363cd9 100644
 --- a/src/mainboard/lenovo/haswell/cmos.default
 +++ b/src/mainboard/lenovo/haswell/cmos.default
-@@ -12,3 +12,4 @@ trackpoint=Enable
+@@ -14,3 +14,4 @@ trackpoint=Enable
  backlight=Keyboard
  enable_dual_graphics=Disable
  usb_always_on=Disable
@@ -232,10 +232,10 @@ index 27915d3ab7..59df76b64c 100644
  # -----------------------------------------------------------------
  checksums
 diff --git a/src/mainboard/supermicro/x10slm-f/cmos.default b/src/mainboard/supermicro/x10slm-f/cmos.default
-index f4047147f7..eea2c36b88 100644
+index 7ce38fb5d7..6049e7938a 100644
 --- a/src/mainboard/supermicro/x10slm-f/cmos.default
 +++ b/src/mainboard/supermicro/x10slm-f/cmos.default
-@@ -3,3 +3,4 @@ debug_level=Debug
+@@ -5,3 +5,4 @@ debug_level=Debug
  nmi=Enable
  power_on_after_fail=Keep
  hide_ast2400=Disable
diff --git a/config/coreboot/default/patches/0037-dell-optiplex_9020-Disable-IOMMU-by-default.patch b/config/coreboot/default/patches/0035-dell-optiplex_9020-Disable-IOMMU-by-default.patch
similarity index 78%
rename from config/coreboot/default/patches/0037-dell-optiplex_9020-Disable-IOMMU-by-default.patch
rename to config/coreboot/default/patches/0035-dell-optiplex_9020-Disable-IOMMU-by-default.patch
index c8cde72e..1b9497c2 100644
--- a/config/coreboot/default/patches/0037-dell-optiplex_9020-Disable-IOMMU-by-default.patch
+++ b/config/coreboot/default/patches/0035-dell-optiplex_9020-Disable-IOMMU-by-default.patch
@@ -1,7 +1,7 @@
-From 61041d49b94236400e836b8ea518d3a064b95c4e Mon Sep 17 00:00:00 2001
+From b7a80abe673c279e755efbe92851ec0600467fae Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 2 Mar 2024 23:00:09 +0000
-Subject: [PATCH 2/2] dell/optiplex_9020: Disable IOMMU by default
+Subject: [PATCH 35/39] dell/optiplex_9020: Disable IOMMU by default
 
 Needed to make graphics cards work. Turning it on is
 recommended if only using iGPU, otherwise leave it off
@@ -15,13 +15,13 @@ Signed-off-by: Leah Rowe <info@minifree.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
-index 8253570f19..7bccc80e51 100644
+index 8000eea8c0..0700f971ee 100644
 --- a/src/mainboard/dell/optiplex_9020/cmos.default
 +++ b/src/mainboard/dell/optiplex_9020/cmos.default
-@@ -2,4 +2,4 @@ boot_option=Fallback
- debug_level=Debug
+@@ -4,4 +4,4 @@ debug_level=Debug
  nmi=Disable
  power_on_after_fail=Disable
+ fan_full_speed=Disable
 -iommu=Enable
 +iommu=Disable
 -- 
diff --git a/config/coreboot/default/patches/0035-hp8560w-Add-MXM-System-Infomation-Structure.patch b/config/coreboot/default/patches/0035-hp8560w-Add-MXM-System-Infomation-Structure.patch
deleted file mode 100644
index 68ccb801..00000000
--- a/config/coreboot/default/patches/0035-hp8560w-Add-MXM-System-Infomation-Structure.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From b2cf0657a2058118baf6f4ec96e356de3c9e493e Mon Sep 17 00:00:00 2001
-From: Riku Viitanen <riku.viitanen@protonmail.com>
-Date: Sun, 11 Feb 2024 19:02:20 +0200
-Subject: [PATCH] hp8560w: Add MXM System Infomation Structure
-
-Change-Id: I45b421f2d7baf8ca8dedbd3b1ab1e38392b6219b
-Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
----
- src/mainboard/hp/snb_ivb_laptops/Makefile.mk      |   6 ++++++
- .../hp/snb_ivb_laptops/variants/8560w/mxm-30-sis  | Bin 0 -> 129 bytes
- 2 files changed, 6 insertions(+)
- create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/mxm-30-sis
-
-diff --git a/src/mainboard/hp/snb_ivb_laptops/Makefile.mk b/src/mainboard/hp/snb_ivb_laptops/Makefile.mk
-index c007bb68cd..7950abbc4e 100644
---- a/src/mainboard/hp/snb_ivb_laptops/Makefile.mk
-+++ b/src/mainboard/hp/snb_ivb_laptops/Makefile.mk
-@@ -9,3 +9,9 @@ ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainb
- 
- # FIXME: Other variants with same size onboard RAM may exist.
- SPD_SOURCES = hynix_4g
-+
-+ifeq ($(CONFIG_BOARD_HP_8560W),y)
-+cbfs-files-y += mxm-30-sis
-+mxm-30-sis-file := variants/$(VARIANT_DIR)/mxm-30-sis
-+mxm-30-sis-type := raw
-+endif
-diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/mxm-30-sis b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/mxm-30-sis
-new file mode 100644
-index 0000000000000000000000000000000000000000..7e4e245a50d8d5d36ddb22e3b1aed3fa87a2f57d
-GIT binary patch
-literal 129
-zcmeZ`@Qr6?sAMn@-0}aX9Rou`%?mKiz;Fq|&xF!hw;=rNM_^h3Dy{$(SAdE$zF=lx
-o@?l{RW{6;7W}LwIl$Vj2apDSgHUS2PJFE;0Kxqas5d=FN0HAs+0RR91
-
-literal 0
-HcmV?d00001
-
--- 
-2.43.1
-
diff --git a/config/coreboot/default/patches/0035-mb-dell-Add-Latitude-E5520-Sandybridge.patch b/config/coreboot/default/patches/0035-mb-dell-Add-Latitude-E5520-Sandybridge.patch
deleted file mode 100644
index 1ca4b950..00000000
--- a/config/coreboot/default/patches/0035-mb-dell-Add-Latitude-E5520-Sandybridge.patch
+++ /dev/null
@@ -1,775 +0,0 @@
-From 7c7ce2087e1ff5f0eedb65793254163d01be3056 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Wed, 7 Feb 2024 10:23:38 -0700
-Subject: [PATCH] mb/dell: Add Latitude E5520 (Sandybridge)
-
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e5520/Kconfig           |  37 ++++
- src/mainboard/dell/e5520/Kconfig.name      |   2 +
- src/mainboard/dell/e5520/Makefile.inc      |   5 +
- src/mainboard/dell/e5520/acpi/ec.asl       |   9 +
- src/mainboard/dell/e5520/acpi/platform.asl |  12 ++
- src/mainboard/dell/e5520/acpi/superio.asl  |   3 +
- src/mainboard/dell/e5520/acpi_tables.c     |  16 ++
- src/mainboard/dell/e5520/board_info.txt    |   6 +
- src/mainboard/dell/e5520/cmos.default      |   9 +
- src/mainboard/dell/e5520/cmos.layout       |  88 ++++++++++
- src/mainboard/dell/e5520/data.vbt          | Bin 0 -> 6144 bytes
- src/mainboard/dell/e5520/devicetree.cb     |  66 +++++++
- src/mainboard/dell/e5520/dsdt.asl          |  30 ++++
- src/mainboard/dell/e5520/early_init.c      |  32 ++++
- src/mainboard/dell/e5520/gma-mainboard.ads |  20 +++
- src/mainboard/dell/e5520/gpio.c            | 195 +++++++++++++++++++++
- src/mainboard/dell/e5520/hda_verb.c        |  33 ++++
- src/mainboard/dell/e5520/mainboard.c       |  21 +++
- 18 files changed, 584 insertions(+)
- create mode 100644 src/mainboard/dell/e5520/Kconfig
- create mode 100644 src/mainboard/dell/e5520/Kconfig.name
- create mode 100644 src/mainboard/dell/e5520/Makefile.inc
- create mode 100644 src/mainboard/dell/e5520/acpi/ec.asl
- create mode 100644 src/mainboard/dell/e5520/acpi/platform.asl
- create mode 100644 src/mainboard/dell/e5520/acpi/superio.asl
- create mode 100644 src/mainboard/dell/e5520/acpi_tables.c
- create mode 100644 src/mainboard/dell/e5520/board_info.txt
- create mode 100644 src/mainboard/dell/e5520/cmos.default
- create mode 100644 src/mainboard/dell/e5520/cmos.layout
- create mode 100644 src/mainboard/dell/e5520/data.vbt
- create mode 100644 src/mainboard/dell/e5520/devicetree.cb
- create mode 100644 src/mainboard/dell/e5520/dsdt.asl
- create mode 100644 src/mainboard/dell/e5520/early_init.c
- create mode 100644 src/mainboard/dell/e5520/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/e5520/gpio.c
- create mode 100644 src/mainboard/dell/e5520/hda_verb.c
- create mode 100644 src/mainboard/dell/e5520/mainboard.c
-
-diff --git a/src/mainboard/dell/e5520/Kconfig b/src/mainboard/dell/e5520/Kconfig
-new file mode 100644
-index 0000000000..213c54cf5c
---- /dev/null
-+++ b/src/mainboard/dell/e5520/Kconfig
-@@ -0,0 +1,37 @@
-+if BOARD_DELL_LATITUDE_E5520
-+
-+config BOARD_SPECIFIC_OPTIONS
-+	def_bool y
-+	select BOARD_ROMSIZE_KB_6144
-+	select EC_ACPI
-+	select EC_DELL_MEC5035
-+	select GFX_GMA_PANEL_1_ON_LVDS
-+	select HAVE_ACPI_RESUME
-+	select HAVE_ACPI_TABLES
-+	select HAVE_CMOS_DEFAULT
-+	select HAVE_OPTION_TABLE
-+	select INTEL_GMA_HAVE_VBT
-+	select INTEL_INT15
-+	select MAINBOARD_HAS_LIBGFXINIT
-+	select NORTHBRIDGE_INTEL_SANDYBRIDGE
-+	select SERIRQ_CONTINUOUS_MODE
-+	select SOUTHBRIDGE_INTEL_BD82X6X
-+	select SYSTEM_TYPE_LAPTOP
-+	select USE_NATIVE_RAMINIT
-+
-+config DRAM_RESET_GATE_GPIO
-+	default 60
-+
-+config MAINBOARD_DIR
-+	default "dell/e5520"
-+
-+config MAINBOARD_PART_NUMBER
-+	default "Latitude E5520"
-+
-+config USBDEBUG_HCD_INDEX
-+	default 2
-+
-+config VGA_BIOS_ID
-+	default "8086,0126"
-+
-+endif # BOARD_DELL_LATITUDE_E5520
-diff --git a/src/mainboard/dell/e5520/Kconfig.name b/src/mainboard/dell/e5520/Kconfig.name
-new file mode 100644
-index 0000000000..c88913e8b3
---- /dev/null
-+++ b/src/mainboard/dell/e5520/Kconfig.name
-@@ -0,0 +1,2 @@
-+config BOARD_DELL_LATITUDE_E5520
-+	bool "Latitude E5520"
-diff --git a/src/mainboard/dell/e5520/Makefile.inc b/src/mainboard/dell/e5520/Makefile.inc
-new file mode 100644
-index 0000000000..18391d8b18
---- /dev/null
-+++ b/src/mainboard/dell/e5520/Makefile.inc
-@@ -0,0 +1,5 @@
-+bootblock-y += early_init.c
-+bootblock-y += gpio.c
-+romstage-y += early_init.c
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/e5520/acpi/ec.asl b/src/mainboard/dell/e5520/acpi/ec.asl
-new file mode 100644
-index 0000000000..0d429410a9
---- /dev/null
-+++ b/src/mainboard/dell/e5520/acpi/ec.asl
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Device(EC)
-+{
-+	Name (_HID, EISAID("PNP0C09"))
-+	Name (_UID, 0)
-+	Name (_GPE, 16)
-+/* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e5520/acpi/platform.asl b/src/mainboard/dell/e5520/acpi/platform.asl
-new file mode 100644
-index 0000000000..2d24bbd9b9
---- /dev/null
-+++ b/src/mainboard/dell/e5520/acpi/platform.asl
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+	/* FIXME: EC support  */
-+	Return(Package() {0, 0})
-+}
-+
-+Method(_PTS,1)
-+{
-+	/* FIXME: EC support  */
-+}
-diff --git a/src/mainboard/dell/e5520/acpi/superio.asl b/src/mainboard/dell/e5520/acpi/superio.asl
-new file mode 100644
-index 0000000000..55b1db5b11
---- /dev/null
-+++ b/src/mainboard/dell/e5520/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <drivers/pc80/pc/ps2_controller.asl>
-diff --git a/src/mainboard/dell/e5520/acpi_tables.c b/src/mainboard/dell/e5520/acpi_tables.c
-new file mode 100644
-index 0000000000..e2759659bf
---- /dev/null
-+++ b/src/mainboard/dell/e5520/acpi_tables.c
-@@ -0,0 +1,16 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi_gnvs.h>
-+#include <soc/nvs.h>
-+
-+/* FIXME: check this function.  */
-+void mainboard_fill_gnvs(struct global_nvs *gnvs)
-+{
-+	/* The lid is open by default. */
-+	gnvs->lids = 1;
-+
-+	/* Temperature at which OS will shutdown */
-+	gnvs->tcrt = 100;
-+	/* Temperature at which OS will throttle CPU */
-+	gnvs->tpsv = 90;
-+}
-diff --git a/src/mainboard/dell/e5520/board_info.txt b/src/mainboard/dell/e5520/board_info.txt
-new file mode 100644
-index 0000000000..34d5ad9e0b
---- /dev/null
-+++ b/src/mainboard/dell/e5520/board_info.txt
-@@ -0,0 +1,6 @@
-+Category: laptop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2011
-diff --git a/src/mainboard/dell/e5520/cmos.default b/src/mainboard/dell/e5520/cmos.default
-new file mode 100644
-index 0000000000..279415dfd1
---- /dev/null
-+++ b/src/mainboard/dell/e5520/cmos.default
-@@ -0,0 +1,9 @@
-+boot_option=Fallback
-+debug_level=Debug
-+power_on_after_fail=Disable
-+nmi=Enable
-+bluetooth=Enable
-+wwan=Enable
-+wlan=Enable
-+sata_mode=AHCI
-+me_state=Disabled
-diff --git a/src/mainboard/dell/e5520/cmos.layout b/src/mainboard/dell/e5520/cmos.layout
-new file mode 100644
-index 0000000000..1aa7e77bce
---- /dev/null
-+++ b/src/mainboard/dell/e5520/cmos.layout
-@@ -0,0 +1,88 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0	120	r	0	reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384	1	e	4	boot_option
-+388	4	h	0	reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395	4	e	6	debug_level
-+
-+#400	8	r	0	reserved for century byte
-+
-+# coreboot config options: southbridge
-+408	1	e	1	nmi
-+409	2	e	7	power_on_after_fail
-+411     1       e       9       sata_mode
-+
-+# coreboot config options: EC
-+412	1	e	1	bluetooth
-+413	1	e	1	wwan
-+414	1	e	1	wlan
-+
-+# coreboot config options: ME
-+424	1	e	14	me_state
-+425	2	h	0	me_state_prev
-+
-+# coreboot config options: northbridge
-+432	3	e	11	gfx_uma_size
-+435	2	e	12	hybrid_graphics_mode
-+440	8	h	0	volume
-+
-+# VBOOT
-+448	128	r	0	vbnv
-+
-+# SandyBridge MRC Scrambler Seed values
-+896	32	r	0	mrc_scrambler_seed
-+928	32	r	0	mrc_scrambler_seed_s3
-+960	16	r	0	mrc_scrambler_seed_chk
-+
-+# coreboot config options: check sums
-+984	16	h	0	check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID	value	text
-+1	0	Disable
-+1	1	Enable
-+2	0	Enable
-+2	1	Disable
-+4	0	Fallback
-+4	1	Normal
-+6	0	Emergency
-+6	1	Alert
-+6	2	Critical
-+6	3	Error
-+6	4	Warning
-+6	5	Notice
-+6	6	Info
-+6	7	Debug
-+6	8	Spew
-+7	0	Disable
-+7	1	Enable
-+7	2	Keep
-+9	0	AHCI
-+9	1	Compatible
-+11	0	32M
-+11	1	64M
-+11	2	96M
-+11	3	128M
-+11	4	160M
-+11	5	192M
-+11	6	224M
-+14	0	Normal
-+14	1	Disabled
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 447 984
-diff --git a/src/mainboard/dell/e5520/data.vbt b/src/mainboard/dell/e5520/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..b511e75262e37fa123d674e9a7b21a8dfe427729
-GIT binary patch
-literal 6144
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-zzOV-@f<ehpWB5RHBpMBgG7}RuMuM2=l*E{6G$wq&gqTQ3#E2RZsOP@dvW*rP7>Fjj
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-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/e5520/devicetree.cb b/src/mainboard/dell/e5520/devicetree.cb
-new file mode 100644
-index 0000000000..bef96ac14c
---- /dev/null
-+++ b/src/mainboard/dell/e5520/devicetree.cb
-@@ -0,0 +1,66 @@
-+chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
-+	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-+	register "gpu_cpu_backlight" = "0x00000218"
-+	register "gpu_dp_b_hotplug" = "4"
-+	register "gpu_dp_c_hotplug" = "4"
-+	register "gpu_dp_d_hotplug" = "4"
-+	register "gpu_panel_port_select" = "0"
-+	register "gpu_panel_power_backlight_off_delay" = "2300"
-+	register "gpu_panel_power_backlight_on_delay" = "2300"
-+	register "gpu_panel_power_cycle_delay" = "6"
-+	register "gpu_panel_power_down_delay" = "400"
-+	register "gpu_panel_power_up_delay" = "400"
-+	register "gpu_pch_backlight" = "0x13121312"
-+
-+	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
-+
-+	device domain 0x0 on
-+		subsystemid 0x1028 0x049a inherit
-+
-+		device ref host_bridge on end # Host bridge
-+		device ref peg10 on end # PEG
-+		device ref igd on end # iGPU
-+
-+		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+			register "docking_supported" = "1"
-+			register "gen1_dec" = "0x007c0681"
-+			register "gen2_dec" = "0x007c0901"
-+			register "gen3_dec" = "0x003c07e1"
-+			register "gen4_dec" = "0x001c0901"
-+			register "gpi0_routing" = "2"
-+			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 1, 0 }"
-+			register "pcie_port_coalesce" = "1"
-+			register "sata_interface_speed_support" = "0x3"
-+			register "sata_port_map" = "0x3b"
-+			register "spi_lvscc" = "0x2005"
-+			register "spi_uvscc" = "0x2005"
-+
-+			device ref mei1		off end
-+			device ref mei2		off end
-+			device ref me_ide_r	off end
-+			device ref me_kt	off end
-+			device ref gbe		off end
-+			device ref ehci2	on end
-+			device ref hda		on end
-+			device ref pcie_rp1	on end
-+			device ref pcie_rp2	on end
-+			device ref pcie_rp3	on end
-+			device ref pcie_rp4	off end
-+			device ref pcie_rp5	on end
-+			device ref pcie_rp6	on end
-+			device ref pcie_rp7	on end
-+			device ref pcie_rp8	off end
-+			device ref ehci1	on end
-+			device ref pci_bridge	off end
-+			device ref lpc		on
-+				chip ec/dell/mec5035
-+					device pnp ff.0 on end
-+				end
-+			end
-+			device ref sata1 on end
-+			device ref smbus on end
-+			device ref sata2 off end
-+			device ref thermal off end
-+		end
-+	end
-+end
-diff --git a/src/mainboard/dell/e5520/dsdt.asl b/src/mainboard/dell/e5520/dsdt.asl
-new file mode 100644
-index 0000000000..7d13c55b08
---- /dev/null
-+++ b/src/mainboard/dell/e5520/dsdt.asl
-@@ -0,0 +1,30 @@
-+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <acpi/acpi.h>
-+
-+DefinitionBlock(
-+	"dsdt.aml",
-+	"DSDT",
-+	ACPI_DSDT_REV_2,
-+	OEM_ID,
-+	ACPI_TABLE_CREATOR,
-+	0x20141018	/* OEM revision */
-+)
-+{
-+	#include <acpi/dsdt_top.asl>
-+	#include "acpi/platform.asl"
-+	#include <cpu/intel/common/acpi/cpu.asl>
-+	#include <southbridge/intel/common/acpi/platform.asl>
-+	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-+	#include <southbridge/intel/common/acpi/sleepstates.asl>
-+
-+	Device (\_SB.PCI0)
-+	{
-+		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-+		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
-+		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
-+	}
-+}
-diff --git a/src/mainboard/dell/e5520/early_init.c b/src/mainboard/dell/e5520/early_init.c
-new file mode 100644
-index 0000000000..7297921546
---- /dev/null
-+++ b/src/mainboard/dell/e5520/early_init.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+	{ 1, 1, 0 },
-+	{ 1, 1, 0 },
-+	{ 1, 1, 1 },
-+	{ 1, 1, 1 },
-+	{ 1, 1, 2 },
-+	{ 1, 1, 2 },
-+	{ 1, 1, 3 },
-+	{ 1, 1, 3 },
-+	{ 1, 1, 5 },
-+	{ 1, 1, 5 },
-+	{ 1, 1, 7 },
-+	{ 1, 1, 6 },
-+	{ 1, 1, 6 },
-+	{ 1, 1, 7 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+			| COMB_LPC_EN | COMA_LPC_EN);
-+	mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/e5520/gma-mainboard.ads b/src/mainboard/dell/e5520/gma-mainboard.ads
-new file mode 100644
-index 0000000000..2a16f44360
---- /dev/null
-+++ b/src/mainboard/dell/e5520/gma-mainboard.ads
-@@ -0,0 +1,20 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+   ports : constant Port_List :=
-+     (
-+      HDMI1, -- mainboard HDMI
-+      DP2, -- dock DP
-+      DP3, -- dock DP
-+      Analog, -- mainboard VGA
-+      LVDS,
-+      others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/e5520/gpio.c b/src/mainboard/dell/e5520/gpio.c
-new file mode 100644
-index 0000000000..f76b93d9f0
---- /dev/null
-+++ b/src/mainboard/dell/e5520/gpio.c
-@@ -0,0 +1,195 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_NATIVE,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_GPIO,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_GPIO,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_NATIVE,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_GPIO,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio3 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio12 = GPIO_DIR_OUTPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_INPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+	.gpio30 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio12 = GPIO_LEVEL_HIGH,
-+	.gpio30 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_NATIVE,
-+	.gpio46 = GPIO_MODE_GPIO,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_NATIVE,
-+	.gpio50 = GPIO_MODE_GPIO,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_GPIO,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_GPIO,
-+	.gpio56 = GPIO_MODE_GPIO,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_OUTPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio46 = GPIO_DIR_OUTPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio50 = GPIO_DIR_OUTPUT,
-+	.gpio51 = GPIO_DIR_OUTPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio53 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio55 = GPIO_DIR_OUTPUT,
-+	.gpio56 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio34 = GPIO_LEVEL_LOW,
-+	.gpio37 = GPIO_LEVEL_LOW,
-+	.gpio46 = GPIO_LEVEL_HIGH,
-+	.gpio50 = GPIO_LEVEL_HIGH,
-+	.gpio51 = GPIO_LEVEL_LOW,
-+	.gpio55 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_NATIVE,
-+	.gpio69 = GPIO_MODE_NATIVE,
-+	.gpio70 = GPIO_MODE_NATIVE,
-+	.gpio71 = GPIO_MODE_NATIVE,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_GPIO,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio74 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/e5520/hda_verb.c b/src/mainboard/dell/e5520/hda_verb.c
-new file mode 100644
-index 0000000000..e2efee3646
---- /dev/null
-+++ b/src/mainboard/dell/e5520/hda_verb.c
-@@ -0,0 +1,33 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
-+	0x1028049a,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x1028049a),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0xd5a301a0),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+	0x80862805,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/e5520/mainboard.c b/src/mainboard/dell/e5520/mainboard.c
-new file mode 100644
-index 0000000000..31e49802fc
---- /dev/null
-+++ b/src/mainboard/dell/e5520/mainboard.c
-@@ -0,0 +1,21 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <ec/acpi/ec.h>
-+#include <console/console.h>
-+#include <pc80/keyboard.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+
-+	/* FIXME: fix these values. */
-+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-+					GMA_INT15_PANEL_FIT_DEFAULT,
-+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+	.enable_dev = mainboard_enable,
-+};
--- 
-2.43.0
-
diff --git a/config/coreboot/default/patches/0041-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch b/config/coreboot/default/patches/0036-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
similarity index 85%
rename from config/coreboot/default/patches/0041-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
rename to config/coreboot/default/patches/0036-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
index bc8fd55c..b5606617 100644
--- a/config/coreboot/default/patches/0041-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
+++ b/config/coreboot/default/patches/0036-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
@@ -1,7 +1,7 @@
-From 0801b3ba8a0ce0109e30d27f405c912d5d705e9c Mon Sep 17 00:00:00 2001
+From 4c0f0d139cdc0fbfadf76ee576d69503b81dc9dc Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 6 Apr 2024 01:22:47 +0100
-Subject: [PATCH 1/1] nb/haswell: Fully disable iGPU when dGPU is used
+Subject: [PATCH 36/39] nb/haswell: Fully disable iGPU when dGPU is used
 
 My earlier patch disabled decode *and* disabled the iGPU itself, but
 a subsequent revision disabled only VGA decode. Upon revisiting, I
@@ -33,10 +33,10 @@ Signed-off-by: Leah Rowe <info@minifree.org>
  1 file changed, 3 insertions(+)
 
 diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
-index 48a0ba54c7..f0b848852d 100644
+index f7fad3183d..1b188e92e1 100644
 --- a/src/northbridge/intel/haswell/gma.c
 +++ b/src/northbridge/intel/haswell/gma.c
-@@ -465,6 +465,9 @@ static void gma_func0_disable(struct device *dev)
+@@ -466,6 +466,9 @@ static void gma_func0_disable(struct device *dev)
  {
  	/* Disable VGA decode */
  	pci_or_config16(pcidev_on_root(0, 0), GGC, 1 << 1);
diff --git a/config/coreboot/default/patches/0045-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch b/config/coreboot/default/patches/0037-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
similarity index 96%
rename from config/coreboot/default/patches/0045-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
rename to config/coreboot/default/patches/0037-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
index 97f14314..8947fe3c 100644
--- a/config/coreboot/default/patches/0045-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
+++ b/config/coreboot/default/patches/0037-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
@@ -1,7 +1,7 @@
-From a8c4f7004ea1c9b8268a87dd0b700c250ec4747d Mon Sep 17 00:00:00 2001
+From 7e921212d3113320b2d28e66cd6a6788533fcab7 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 3 May 2024 11:03:32 -0600
-Subject: [PATCH] ec/dell/mec5035: Add S3 suspend SMI handler
+Subject: [PATCH 37/39] ec/dell/mec5035: Add S3 suspend SMI handler
 
 Change-Id: I655868aba46911d128f6c24f410dc6fdf83f3070
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
@@ -113,5 +113,5 @@ index 0000000000..1db834773d
 +	}
 +}
 -- 
-2.44.0
+2.39.2
 
diff --git a/config/coreboot/default/patches/0038-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch b/config/coreboot/default/patches/0038-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
deleted file mode 100644
index 11f95a63..00000000
--- a/config/coreboot/default/patches/0038-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
+++ /dev/null
@@ -1,774 +0,0 @@
-From 7dd58c8b301404a8bafee25a1e97a8a5d614b3d6 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Mon, 4 Mar 2024 18:05:43 -0700
-Subject: [PATCH] mb/dell: Add Latitude E5420 (Sandy Bridge)
-
----
- src/mainboard/dell/e5420/Kconfig           |  37 ++++
- src/mainboard/dell/e5420/Kconfig.name      |   2 +
- src/mainboard/dell/e5420/Makefile.mk       |   5 +
- src/mainboard/dell/e5420/acpi/ec.asl       |   9 +
- src/mainboard/dell/e5420/acpi/platform.asl |  12 ++
- src/mainboard/dell/e5420/acpi/superio.asl  |   3 +
- src/mainboard/dell/e5420/acpi_tables.c     |  16 ++
- src/mainboard/dell/e5420/board_info.txt    |   6 +
- src/mainboard/dell/e5420/cmos.default      |   9 +
- src/mainboard/dell/e5420/cmos.layout       |  88 ++++++++++
- src/mainboard/dell/e5420/data.vbt          | Bin 0 -> 6144 bytes
- src/mainboard/dell/e5420/devicetree.cb     |  66 +++++++
- src/mainboard/dell/e5420/dsdt.asl          |  30 ++++
- src/mainboard/dell/e5420/early_init.c      |  32 ++++
- src/mainboard/dell/e5420/gma-mainboard.ads |  20 +++
- src/mainboard/dell/e5420/gpio.c            | 195 +++++++++++++++++++++
- src/mainboard/dell/e5420/hda_verb.c        |  33 ++++
- src/mainboard/dell/e5420/mainboard.c       |  21 +++
- 18 files changed, 584 insertions(+)
- create mode 100644 src/mainboard/dell/e5420/Kconfig
- create mode 100644 src/mainboard/dell/e5420/Kconfig.name
- create mode 100644 src/mainboard/dell/e5420/Makefile.mk
- create mode 100644 src/mainboard/dell/e5420/acpi/ec.asl
- create mode 100644 src/mainboard/dell/e5420/acpi/platform.asl
- create mode 100644 src/mainboard/dell/e5420/acpi/superio.asl
- create mode 100644 src/mainboard/dell/e5420/acpi_tables.c
- create mode 100644 src/mainboard/dell/e5420/board_info.txt
- create mode 100644 src/mainboard/dell/e5420/cmos.default
- create mode 100644 src/mainboard/dell/e5420/cmos.layout
- create mode 100755 src/mainboard/dell/e5420/data.vbt
- create mode 100644 src/mainboard/dell/e5420/devicetree.cb
- create mode 100644 src/mainboard/dell/e5420/dsdt.asl
- create mode 100644 src/mainboard/dell/e5420/early_init.c
- create mode 100644 src/mainboard/dell/e5420/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/e5420/gpio.c
- create mode 100644 src/mainboard/dell/e5420/hda_verb.c
- create mode 100644 src/mainboard/dell/e5420/mainboard.c
-
-diff --git a/src/mainboard/dell/e5420/Kconfig b/src/mainboard/dell/e5420/Kconfig
-new file mode 100644
-index 0000000000..f4385045ae
---- /dev/null
-+++ b/src/mainboard/dell/e5420/Kconfig
-@@ -0,0 +1,37 @@
-+if BOARD_DELL_LATITUDE_E5420
-+
-+config BOARD_SPECIFIC_OPTIONS
-+	def_bool y
-+	select BOARD_ROMSIZE_KB_6144
-+	select EC_ACPI
-+	select EC_DELL_MEC5035
-+	select GFX_GMA_PANEL_1_ON_LVDS
-+	select HAVE_ACPI_RESUME
-+	select HAVE_ACPI_TABLES
-+	select HAVE_CMOS_DEFAULT
-+	select HAVE_OPTION_TABLE
-+	select INTEL_GMA_HAVE_VBT
-+	select INTEL_INT15
-+	select MAINBOARD_HAS_LIBGFXINIT
-+	select NORTHBRIDGE_INTEL_SANDYBRIDGE
-+	select SERIRQ_CONTINUOUS_MODE
-+	select SOUTHBRIDGE_INTEL_BD82X6X
-+	select SYSTEM_TYPE_LAPTOP
-+	select USE_NATIVE_RAMINIT
-+
-+config DRAM_RESET_GATE_GPIO
-+	default 60
-+
-+config MAINBOARD_DIR
-+	default "dell/e5420"
-+
-+config MAINBOARD_PART_NUMBER
-+	default "Latitude E5420"
-+
-+config USBDEBUG_HCD_INDEX
-+	default 2
-+
-+config VGA_BIOS_ID
-+	default "8086,0116"
-+
-+endif # BOARD_DELL_LATITUDE_E5420
-diff --git a/src/mainboard/dell/e5420/Kconfig.name b/src/mainboard/dell/e5420/Kconfig.name
-new file mode 100644
-index 0000000000..eb495fb705
---- /dev/null
-+++ b/src/mainboard/dell/e5420/Kconfig.name
-@@ -0,0 +1,2 @@
-+config BOARD_DELL_LATITUDE_E5420
-+	bool "Latitude E5420"
-diff --git a/src/mainboard/dell/e5420/Makefile.mk b/src/mainboard/dell/e5420/Makefile.mk
-new file mode 100644
-index 0000000000..18391d8b18
---- /dev/null
-+++ b/src/mainboard/dell/e5420/Makefile.mk
-@@ -0,0 +1,5 @@
-+bootblock-y += early_init.c
-+bootblock-y += gpio.c
-+romstage-y += early_init.c
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/e5420/acpi/ec.asl b/src/mainboard/dell/e5420/acpi/ec.asl
-new file mode 100644
-index 0000000000..0d429410a9
---- /dev/null
-+++ b/src/mainboard/dell/e5420/acpi/ec.asl
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Device(EC)
-+{
-+	Name (_HID, EISAID("PNP0C09"))
-+	Name (_UID, 0)
-+	Name (_GPE, 16)
-+/* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e5420/acpi/platform.asl b/src/mainboard/dell/e5420/acpi/platform.asl
-new file mode 100644
-index 0000000000..2d24bbd9b9
---- /dev/null
-+++ b/src/mainboard/dell/e5420/acpi/platform.asl
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+	/* FIXME: EC support  */
-+	Return(Package() {0, 0})
-+}
-+
-+Method(_PTS,1)
-+{
-+	/* FIXME: EC support  */
-+}
-diff --git a/src/mainboard/dell/e5420/acpi/superio.asl b/src/mainboard/dell/e5420/acpi/superio.asl
-new file mode 100644
-index 0000000000..55b1db5b11
---- /dev/null
-+++ b/src/mainboard/dell/e5420/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <drivers/pc80/pc/ps2_controller.asl>
-diff --git a/src/mainboard/dell/e5420/acpi_tables.c b/src/mainboard/dell/e5420/acpi_tables.c
-new file mode 100644
-index 0000000000..e2759659bf
---- /dev/null
-+++ b/src/mainboard/dell/e5420/acpi_tables.c
-@@ -0,0 +1,16 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi_gnvs.h>
-+#include <soc/nvs.h>
-+
-+/* FIXME: check this function.  */
-+void mainboard_fill_gnvs(struct global_nvs *gnvs)
-+{
-+	/* The lid is open by default. */
-+	gnvs->lids = 1;
-+
-+	/* Temperature at which OS will shutdown */
-+	gnvs->tcrt = 100;
-+	/* Temperature at which OS will throttle CPU */
-+	gnvs->tpsv = 90;
-+}
-diff --git a/src/mainboard/dell/e5420/board_info.txt b/src/mainboard/dell/e5420/board_info.txt
-new file mode 100644
-index 0000000000..34d5ad9e0b
---- /dev/null
-+++ b/src/mainboard/dell/e5420/board_info.txt
-@@ -0,0 +1,6 @@
-+Category: laptop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2011
-diff --git a/src/mainboard/dell/e5420/cmos.default b/src/mainboard/dell/e5420/cmos.default
-new file mode 100644
-index 0000000000..279415dfd1
---- /dev/null
-+++ b/src/mainboard/dell/e5420/cmos.default
-@@ -0,0 +1,9 @@
-+boot_option=Fallback
-+debug_level=Debug
-+power_on_after_fail=Disable
-+nmi=Enable
-+bluetooth=Enable
-+wwan=Enable
-+wlan=Enable
-+sata_mode=AHCI
-+me_state=Disabled
-diff --git a/src/mainboard/dell/e5420/cmos.layout b/src/mainboard/dell/e5420/cmos.layout
-new file mode 100644
-index 0000000000..1aa7e77bce
---- /dev/null
-+++ b/src/mainboard/dell/e5420/cmos.layout
-@@ -0,0 +1,88 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0	120	r	0	reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384	1	e	4	boot_option
-+388	4	h	0	reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395	4	e	6	debug_level
-+
-+#400	8	r	0	reserved for century byte
-+
-+# coreboot config options: southbridge
-+408	1	e	1	nmi
-+409	2	e	7	power_on_after_fail
-+411     1       e       9       sata_mode
-+
-+# coreboot config options: EC
-+412	1	e	1	bluetooth
-+413	1	e	1	wwan
-+414	1	e	1	wlan
-+
-+# coreboot config options: ME
-+424	1	e	14	me_state
-+425	2	h	0	me_state_prev
-+
-+# coreboot config options: northbridge
-+432	3	e	11	gfx_uma_size
-+435	2	e	12	hybrid_graphics_mode
-+440	8	h	0	volume
-+
-+# VBOOT
-+448	128	r	0	vbnv
-+
-+# SandyBridge MRC Scrambler Seed values
-+896	32	r	0	mrc_scrambler_seed
-+928	32	r	0	mrc_scrambler_seed_s3
-+960	16	r	0	mrc_scrambler_seed_chk
-+
-+# coreboot config options: check sums
-+984	16	h	0	check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID	value	text
-+1	0	Disable
-+1	1	Enable
-+2	0	Enable
-+2	1	Disable
-+4	0	Fallback
-+4	1	Normal
-+6	0	Emergency
-+6	1	Alert
-+6	2	Critical
-+6	3	Error
-+6	4	Warning
-+6	5	Notice
-+6	6	Info
-+6	7	Debug
-+6	8	Spew
-+7	0	Disable
-+7	1	Enable
-+7	2	Keep
-+9	0	AHCI
-+9	1	Compatible
-+11	0	32M
-+11	1	64M
-+11	2	96M
-+11	3	128M
-+11	4	160M
-+11	5	192M
-+11	6	224M
-+14	0	Normal
-+14	1	Disabled
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 447 984
-diff --git a/src/mainboard/dell/e5420/data.vbt b/src/mainboard/dell/e5420/data.vbt
-new file mode 100755
-index 0000000000000000000000000000000000000000..98b82fe6110fd295b5749041ec7f8c084ace5f57
-GIT binary patch
-literal 6144
-zcmeHKeQZ-z6hE);wSBvNZ!2$ObQ^;MgV6zl*Rhp}BXnCCMZU^_r7jRwT!kfLo8?3H
-zk9)u(7?cb(hChhTM57@QFfmbMB!G!dNsO6BW5OSp5EGF^jHnTTdhUBI+h`e+1ft1q
-z^SfW?+;h)4_uO+|XEfEV$91)<gOArWE)OnSTD}Ug6?8a~vz+SmQn!4~y3N7b^|hPp
-zR<5aEfv-b8M00Lk251!oO|8(YA6XaeXzkt-Z)@Ee!_{@z#Fro^?DqN4SGjRIu8KYp
-zZEufuU@5MM@7jv%h;75FS}ezKv?JDzCH}d%tE)A-GuDb*+B%}~w%88r>}c;!*XQ5O
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-z&VY9?WC1u#23^3^UYw5?H0x2S2gN`x18Fko6_x(#MKyuCU_<D!mEp$qO_An}#@>DV
-zdkf*li41yW3p$*0Oo3+63kO6S91*KwP#l2i4jnc)JkUirL^$k}VbH0;CBh#BS=OLf
-zW-yE3BRon75gG{_2~QIC5cUzCC%i)FCmbidM>tIwAPf>N5Pl?FC0r*+Sq!oXj!keQ
-zVKcyK>TL+gc7oLco$28+FpeeXkEP}_Sea=mk#IWUR^m$!BogvszLPu83FJm0k6K<l
-z$#$~YiXtY*GpHp#@FvHJ1UnBD*H%d+{_j24XE4nmBa*?5mOWiold28s3}>*}<HaeO
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-zyu>BcjA})C@bg%<;+Eh2;Sz4heFFCbZ@C{FrXMIbYzu>?Bi-|vZ}JSFU%JA>7$7et
-z0Yo%CnOVZm#ZA}4kWZOn15};h5*#OM3b+6vHzgruMP>=5MNJK1y42{YgveP-!j%#(
-z0rGe@8t%!=66Ti%K4|Gx=o7gFp83wQ;+s3H7+r^SKlpp3KKcr!3@|n;NCH_=qL=3T
-zq3WH?en`b+W-HR-fnrhw*9aZ%M}lHX7@H?E>!6wv_&YQFEHdA$%Z1R--yub>=c@p?
-z6@7Fc$&>sAxwiz{BE$1kb$K9Co=ozlA973y^i(^BM|EZ$$^y`0KyHiMJ%O*XbfEX1
-ziZaH>W(1pWL0bo|T!x__N$^$DpmxI=bL6WUK3JGyn?rw-qC4ZA$yGjIB}N(=ldD2O
-zAJ@bxp<qR-3lIv<!P~SE8r*#_Ckl?$0|1fZ>2>n}u*mUIYFd>}O_wuwBD^r9<#=!0
-X1LGbT_rSOZ#yv3ZfpHH!G!Og(1Xg~J
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/e5420/devicetree.cb b/src/mainboard/dell/e5420/devicetree.cb
-new file mode 100644
-index 0000000000..f26413557d
---- /dev/null
-+++ b/src/mainboard/dell/e5420/devicetree.cb
-@@ -0,0 +1,66 @@
-+chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
-+	register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-+	register "gpu_cpu_backlight" = "0x00000c31"
-+	register "gpu_dp_b_hotplug" = "4"
-+	register "gpu_dp_c_hotplug" = "4"
-+	register "gpu_dp_d_hotplug" = "4"
-+	register "gpu_panel_port_select" = "0"
-+	register "gpu_panel_power_backlight_off_delay" = "2300"
-+	register "gpu_panel_power_backlight_on_delay" = "2300"
-+	register "gpu_panel_power_cycle_delay" = "6"
-+	register "gpu_panel_power_down_delay" = "400"
-+	register "gpu_panel_power_up_delay" = "400"
-+	register "gpu_pch_backlight" = "0x13121312"
-+
-+	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
-+
-+	device domain 0x0 on
-+		subsystemid 0x1028 0x049b inherit
-+
-+		device ref host_bridge on end # Host bridge
-+		device ref peg10 on end # PEG
-+		device ref igd on end # iGPU
-+
-+		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+			register "docking_supported" = "1"
-+			register "gen1_dec" = "0x007c0681"
-+			register "gen2_dec" = "0x007c0901"
-+			register "gen3_dec" = "0x003c07e1"
-+			register "gen4_dec" = "0x001c0901"
-+			register "gpi0_routing" = "2"
-+			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 1, 0 }"
-+			register "pcie_port_coalesce" = "1"
-+			register "sata_interface_speed_support" = "0x3"
-+			register "sata_port_map" = "0x3b"
-+			register "spi_lvscc" = "0x2005"
-+			register "spi_uvscc" = "0x2005"
-+
-+			device ref mei1		off end
-+			device ref mei2		off end
-+			device ref me_ide_r	off end
-+			device ref me_kt	off end
-+			device ref gbe		off end
-+			device ref ehci2	on end
-+			device ref hda		on end
-+			device ref pcie_rp1	on end
-+			device ref pcie_rp2	on end
-+			device ref pcie_rp3	on end
-+			device ref pcie_rp4	off end
-+			device ref pcie_rp5	on end
-+			device ref pcie_rp6	on end
-+			device ref pcie_rp7	on end
-+			device ref pcie_rp8	off end
-+			device ref ehci1	on end
-+			device ref pci_bridge	off end
-+			device ref lpc		on
-+				chip ec/dell/mec5035
-+					device pnp ff.0 on end
-+				end
-+			end
-+			device ref sata1 on end
-+			device ref smbus on end
-+			device ref sata2 off end
-+			device ref thermal off end
-+		end
-+	end
-+end
-diff --git a/src/mainboard/dell/e5420/dsdt.asl b/src/mainboard/dell/e5420/dsdt.asl
-new file mode 100644
-index 0000000000..7d13c55b08
---- /dev/null
-+++ b/src/mainboard/dell/e5420/dsdt.asl
-@@ -0,0 +1,30 @@
-+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <acpi/acpi.h>
-+
-+DefinitionBlock(
-+	"dsdt.aml",
-+	"DSDT",
-+	ACPI_DSDT_REV_2,
-+	OEM_ID,
-+	ACPI_TABLE_CREATOR,
-+	0x20141018	/* OEM revision */
-+)
-+{
-+	#include <acpi/dsdt_top.asl>
-+	#include "acpi/platform.asl"
-+	#include <cpu/intel/common/acpi/cpu.asl>
-+	#include <southbridge/intel/common/acpi/platform.asl>
-+	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-+	#include <southbridge/intel/common/acpi/sleepstates.asl>
-+
-+	Device (\_SB.PCI0)
-+	{
-+		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-+		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
-+		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
-+	}
-+}
-diff --git a/src/mainboard/dell/e5420/early_init.c b/src/mainboard/dell/e5420/early_init.c
-new file mode 100644
-index 0000000000..7297921546
---- /dev/null
-+++ b/src/mainboard/dell/e5420/early_init.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+	{ 1, 1, 0 },
-+	{ 1, 1, 0 },
-+	{ 1, 1, 1 },
-+	{ 1, 1, 1 },
-+	{ 1, 1, 2 },
-+	{ 1, 1, 2 },
-+	{ 1, 1, 3 },
-+	{ 1, 1, 3 },
-+	{ 1, 1, 5 },
-+	{ 1, 1, 5 },
-+	{ 1, 1, 7 },
-+	{ 1, 1, 6 },
-+	{ 1, 1, 6 },
-+	{ 1, 1, 7 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+			| COMB_LPC_EN | COMA_LPC_EN);
-+	mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/e5420/gma-mainboard.ads b/src/mainboard/dell/e5420/gma-mainboard.ads
-new file mode 100644
-index 0000000000..2a16f44360
---- /dev/null
-+++ b/src/mainboard/dell/e5420/gma-mainboard.ads
-@@ -0,0 +1,20 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+   ports : constant Port_List :=
-+     (
-+      HDMI1, -- mainboard HDMI
-+      DP2, -- dock DP
-+      DP3, -- dock DP
-+      Analog, -- mainboard VGA
-+      LVDS,
-+      others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/e5420/gpio.c b/src/mainboard/dell/e5420/gpio.c
-new file mode 100644
-index 0000000000..f76b93d9f0
---- /dev/null
-+++ b/src/mainboard/dell/e5420/gpio.c
-@@ -0,0 +1,195 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_NATIVE,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_GPIO,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_GPIO,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_NATIVE,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_GPIO,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio3 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio12 = GPIO_DIR_OUTPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_INPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+	.gpio30 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio12 = GPIO_LEVEL_HIGH,
-+	.gpio30 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_NATIVE,
-+	.gpio46 = GPIO_MODE_GPIO,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_NATIVE,
-+	.gpio50 = GPIO_MODE_GPIO,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_GPIO,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_GPIO,
-+	.gpio56 = GPIO_MODE_GPIO,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_OUTPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio46 = GPIO_DIR_OUTPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio50 = GPIO_DIR_OUTPUT,
-+	.gpio51 = GPIO_DIR_OUTPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio53 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio55 = GPIO_DIR_OUTPUT,
-+	.gpio56 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio34 = GPIO_LEVEL_LOW,
-+	.gpio37 = GPIO_LEVEL_LOW,
-+	.gpio46 = GPIO_LEVEL_HIGH,
-+	.gpio50 = GPIO_LEVEL_HIGH,
-+	.gpio51 = GPIO_LEVEL_LOW,
-+	.gpio55 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_NATIVE,
-+	.gpio69 = GPIO_MODE_NATIVE,
-+	.gpio70 = GPIO_MODE_NATIVE,
-+	.gpio71 = GPIO_MODE_NATIVE,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_GPIO,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio74 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/e5420/hda_verb.c b/src/mainboard/dell/e5420/hda_verb.c
-new file mode 100644
-index 0000000000..70e7c2e79a
---- /dev/null
-+++ b/src/mainboard/dell/e5420/hda_verb.c
-@@ -0,0 +1,33 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
-+	0x1028049b,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x1028049b),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0xd5a30130),
-+
-+	0x80862805,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/e5420/mainboard.c b/src/mainboard/dell/e5420/mainboard.c
-new file mode 100644
-index 0000000000..31e49802fc
---- /dev/null
-+++ b/src/mainboard/dell/e5420/mainboard.c
-@@ -0,0 +1,21 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <ec/acpi/ec.h>
-+#include <console/console.h>
-+#include <pc80/keyboard.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+
-+	/* FIXME: fix these values. */
-+	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-+					GMA_INT15_PANEL_FIT_DEFAULT,
-+					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+	.enable_dev = mainboard_enable,
-+};
--- 
-2.44.0
-
diff --git a/config/coreboot/default/patches/0038-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch b/config/coreboot/default/patches/0038-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch
new file mode 100644
index 00000000..8da97601
--- /dev/null
+++ b/config/coreboot/default/patches/0038-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch
@@ -0,0 +1,31 @@
+From 53bddae0fc8436fe262ca7fc2e19049afa7a38f8 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 3 May 2024 16:31:12 -0600
+Subject: [PATCH 38/39] mb/dell/: Add S3 SMI handler for SNB/IVB Latitudes
+
+This should fix S3 suspend on these systems
+
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/smihandler.c | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/smihandler.c
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/smihandler.c b/src/mainboard/dell/snb_ivb_latitude/smihandler.c
+new file mode 100644
+index 0000000000..334d7b1a5f
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++	mec5035_sleep(slp_typ);
++}
+-- 
+2.39.2
+
diff --git a/config/coreboot/default/patches/0039-fix-sata-ports-on-dell-9020-sff-and-mt.patch b/config/coreboot/default/patches/0039-fix-sata-ports-on-dell-9020-sff-and-mt.patch
deleted file mode 100644
index f4c3939c..00000000
--- a/config/coreboot/default/patches/0039-fix-sata-ports-on-dell-9020-sff-and-mt.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 4889f08306f1530211dcc6f6a4e999c6cc72f3ac Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sat, 30 Mar 2024 05:57:54 +0000
-Subject: [PATCH 1/1] fix sata ports on dell 9020 sff and mt
-
-mate kukri has a patch under review on coreboot that sets
-sata port map to 0x7 on sff and 0xf on mt.
-
-see: intel 8 series pch datasheet, section 13.1.35
-
-basically, the 6 least significant bits enable the sata
-slots; 1 for enable and 0 for disable. there can be up
-to 6 ports. least significant bit is port 0, then next
-is port 1, and so on.
-
-coreboot currently enables ports 0, 1, 4 and 5, making this
-value 0x33 (converted to binary: 00110011). sff has ports
-0, 1 and 2 wired, so mate changed that to 0x7 (00000111).
-
-on mt, the blue ports are ports 0 and 1, but the two white
-ports don't work, but coreboot enables 4 and 5; it is
-likely that the blue ports are in fact 0 and 1, and the
-white ports are 2 and 3, but we've not tested this!
-
-it could be that the blue ports are ports 4 and 5, and
-the white ports are 2 and 3! we have not yet determined
-this, but mate set it to 0xf, meaning ports 0 1 2 and 3
-are enabled, in his patch under review. the chance that
-it's 2, 3, 4 and 5 on the board is unlikely, but it is
-theoretically possible and has not been confirmed.
-
-therefore, for now, i will set the value to 0x3f, which
-in binary is 00111111, thus enabling all 6 slots. the two
-that aren't physically wired don't really matter. enabling
-ports (from the pch) that electrically aren't there and
-then powering on is electrically equivalent to those ports
-being actually being wired, but with no devices plugged
-into them. therefore, 0x3f is an effective shotgun fix.
-
-i'll remove this patch and use mate's fix when the latter
-has been tested on MT; it has already been tested on SFF.
-
-this patch fixes the 3rd sata slot on 9020 sff, and the 3rd
-and 4th sata slots on 9020 MT
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/mainboard/dell/optiplex_9020/devicetree.cb | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/dell/optiplex_9020/devicetree.cb b/src/mainboard/dell/optiplex_9020/devicetree.cb
-index c0b17a15ff..7bfa6736a6 100644
---- a/src/mainboard/dell/optiplex_9020/devicetree.cb
-+++ b/src/mainboard/dell/optiplex_9020/devicetree.cb
-@@ -23,7 +23,7 @@ chip northbridge/intel/haswell
- 			register "gen2_dec" = "0x007c0901"
- 			register "gen3_dec" = "0x003c07e1"
- 			register "gen4_dec" = "0x001c0901"
--			register "sata_port_map" = "0x33"
-+			register "sata_port_map" = "0x3f"
- 
- 			device pci 14.0 on  end				# xHCI controller
- 			device pci 16.0 on  end				# Management Engine interface 1
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0047-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch b/config/coreboot/default/patches/0039-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
similarity index 93%
rename from config/coreboot/default/patches/0047-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
rename to config/coreboot/default/patches/0039-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
index a7af707e..f658b6d0 100644
--- a/config/coreboot/default/patches/0047-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
+++ b/config/coreboot/default/patches/0039-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
@@ -1,7 +1,7 @@
-From fa4f05e39744eb4c4606f940b8acc7fd053b11d4 Mon Sep 17 00:00:00 2001
+From 919cbfa034db5d2ef9e56dd71ef329c38c5ede3c Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 4 May 2024 02:00:53 +0100
-Subject: [PATCH 1/1] nb/haswell: lock policy regs when disabling IOMMU
+Subject: [PATCH 39/39] nb/haswell: lock policy regs when disabling IOMMU
 
 Angel Pons told me I should do it. See comments here:
 https://review.coreboot.org/c/coreboot/+/81016
diff --git a/config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch b/config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch
deleted file mode 100644
index 7a02d902..00000000
--- a/config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From c6ce9c635e6576c86c546177c3d770dec2f3c9ae Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Fri, 23 Feb 2024 13:33:31 +0000
-Subject: [PATCH 1/1] nb/haswell: Disable iGPU when dGPU is used
-
-This is usually is handled by Haswell mrc.bin, disabling VGA
-decode on the iGPU when a dGPU is installed. However, Broadwell
-mrc.bin does not, so the iGPU and dGPU are both enabled.
-
-This patch disables legacy VGA cycles for iGPU, under such
-conditions. It has been tested on Broadwell mrc.bin when
-using a graphics card on Dell OptiPlex 9020 SFF (currently
-under review at this time of writing, submitted by Mate
-Kukri).
-
-This patch has also been tested when Haswell mrc.bin is used,
-and there are seemingly no breaking changes caused by it.
-
-Change-Id: I1df0a3aa42f8475b7741007bf3e28c2e089d916b
-Signed-off-by: Leah Rowe <info@minifree.org>
-Reviewed-on: https://review.coreboot.org/c/coreboot/+/80717
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-Reviewed-by: Nico Huber <nico.h@gmx.de>
----
- src/northbridge/intel/haswell/gma.c | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
-index 6e6948b70f..48a0ba54c7 100644
---- a/src/northbridge/intel/haswell/gma.c
-+++ b/src/northbridge/intel/haswell/gma.c
-@@ -461,12 +461,19 @@ static void gma_generate_ssdt(const struct device *dev)
- 	drivers_intel_gma_displays_ssdt_generate(&chip->gfx);
- }
- 
-+static void gma_func0_disable(struct device *dev)
-+{
-+	/* Disable VGA decode */
-+	pci_or_config16(pcidev_on_root(0, 0), GGC, 1 << 1);
-+}
-+
- static struct device_operations gma_func0_ops = {
- 	.read_resources		= pci_dev_read_resources,
- 	.set_resources		= pci_dev_set_resources,
- 	.enable_resources	= pci_dev_enable_resources,
- 	.init			= gma_func0_init,
- 	.acpi_fill_ssdt		= gma_generate_ssdt,
-+	.vga_disable            = gma_func0_disable,
- 	.ops_pci		= &pci_dev_ops_pci,
- };
- 
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch b/config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
deleted file mode 100644
index 37353e20..00000000
--- a/config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
+++ /dev/null
@@ -1,602 +0,0 @@
-From c58e0fea2a4e591e5ecd8a1f376c3b3af0fbb306 Mon Sep 17 00:00:00 2001
-From: Mate Kukri <kukri.mate@gmail.com>
-Date: Thu, 18 Apr 2024 20:28:45 +0100
-Subject: [PATCH 1/1] mb/dell/optiplex_9020: Implement late HWM initialization
-
-There are 4 different chassis types specified by vendor firmware, each
-with a slightly different HWM configuration.
-
-The chassis type to use is determined at runtime by reading a set of
-4 PCH GPIOs: 70, 38, 17, and 1.
-
-Additionally vendor firmware also provides an option to run the fans at
-full speed. This is substituted with a coreboot nvram option in this
-implementation.
-
-This was tested to make fan control work on my OptiPlex 7020 SFF.
-
-NOTE: This is superficially similar to the OptiPlex 9010's SCH5545
-however the OptiPlex 9020's SCH5555 does not use externally
-programmed EC firmware.
-
-Change-Id: Ibdccd3fc7364e03e84ca606592928410624eed43
-Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
----
- src/mainboard/dell/optiplex_9020/Makefile.inc |   3 +-
- src/mainboard/dell/optiplex_9020/bootblock.c  |  25 +-
- src/mainboard/dell/optiplex_9020/cmos.default |   1 +
- src/mainboard/dell/optiplex_9020/cmos.layout  |   5 +-
- src/mainboard/dell/optiplex_9020/mainboard.c  | 387 ++++++++++++++++++
- src/mainboard/dell/optiplex_9020/sch5555_ec.c |  54 +++
- src/mainboard/dell/optiplex_9020/sch5555_ec.h |  10 +
- 7 files changed, 463 insertions(+), 22 deletions(-)
- create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.c
- create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.h
-
-diff --git a/src/mainboard/dell/optiplex_9020/Makefile.inc b/src/mainboard/dell/optiplex_9020/Makefile.inc
-index 6ca2f2afaa..08e2e53577 100644
---- a/src/mainboard/dell/optiplex_9020/Makefile.inc
-+++ b/src/mainboard/dell/optiplex_9020/Makefile.inc
-@@ -2,4 +2,5 @@
- 
- romstage-y += gpio.c
- ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
--bootblock-y += bootblock.c
-+ramstage-y += sch5555_ec.c
-+bootblock-y += bootblock.c sch5555_ec.c
-diff --git a/src/mainboard/dell/optiplex_9020/bootblock.c b/src/mainboard/dell/optiplex_9020/bootblock.c
-index 2837cf9cf1..e5e759273e 100644
---- a/src/mainboard/dell/optiplex_9020/bootblock.c
-+++ b/src/mainboard/dell/optiplex_9020/bootblock.c
-@@ -4,29 +4,14 @@
- #include <device/pnp_ops.h>
- #include <superio/smsc/sch555x/sch555x.h>
- #include <southbridge/intel/lynxpoint/pch.h>
--
--static void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val)
--{
--	// Clear EC-to-Host mailbox
--	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
--	outb(tmp, SCH555x_EMI_IOBASE + 1);
--
--	// Send address and value to the EC
--	sch555x_emi_write16(0, (addr1 * 2) | 0x101);
--	sch555x_emi_write32(4, val | (addr2 << 16));
--
--	// Wait for acknowledgement message from EC
--	outb(1, SCH555x_EMI_IOBASE);
--	size_t timeout = 0;
--	do {} while (++timeout < 0xfff && (inb(SCH555x_EMI_IOBASE + 1) & 1) == 0);
--}
-+#include "sch5555_ec.h"
- 
- struct ec_init_entry {
- 	uint16_t addr;
- 	uint8_t val;
- };
- 
--static void ec_init(void)
-+static void bootblock_ec_init(void)
- {
- 	/*
- 	 * Tables from CORE_PEI
-@@ -108,9 +93,9 @@ void mainboard_config_superio(void)
- 	outb(0x01, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_UNK1);
- 	outb(0x0f, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_LED);
- 
--	// Magic EC init
--	ec_init();
-+	// Perform bootblock EC initialization
-+	bootblock_ec_init();
- 
--	// Magic EC init is needed for UART1 initialization to work
-+	// Bootblock EC initialization is required for UART1 to work
- 	sch555x_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- }
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
-index 7bccc80e51..1909abcb9f 100644
---- a/src/mainboard/dell/optiplex_9020/cmos.default
-+++ b/src/mainboard/dell/optiplex_9020/cmos.default
-@@ -3,3 +3,4 @@ debug_level=Debug
- nmi=Disable
- power_on_after_fail=Disable
- iommu=Disable
-+fan_full_speed=Disable
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.layout b/src/mainboard/dell/optiplex_9020/cmos.layout
-index 72ff9c4bee..4a1496a878 100644
---- a/src/mainboard/dell/optiplex_9020/cmos.layout
-+++ b/src/mainboard/dell/optiplex_9020/cmos.layout
-@@ -22,7 +22,10 @@ entries
- 409	2	e	5	power_on_after_fail
- 
- # turn iommu on or off
--412	1	e	6	iommu
-+411	1	e	6	iommu
-+
-+# coreboot config options: EC
-+412	1	e	1	fan_full_speed
- 
- # coreboot config options: check sums
- 984	16	h	0	check_sum
-diff --git a/src/mainboard/dell/optiplex_9020/mainboard.c b/src/mainboard/dell/optiplex_9020/mainboard.c
-index c834fea5d3..0b7829c736 100644
---- a/src/mainboard/dell/optiplex_9020/mainboard.c
-+++ b/src/mainboard/dell/optiplex_9020/mainboard.c
-@@ -1,7 +1,12 @@
- /* SPDX-License-Identifier: GPL-2.0-only */
- 
-+#include <bootstate.h>
-+#include <cpu/x86/msr.h>
- #include <device/device.h>
- #include <drivers/intel/gma/int15.h>
-+#include <option.h>
-+#include <southbridge/intel/common/gpio.h>
-+#include "sch5555_ec.h"
- 
- static void mainboard_enable(struct device *dev)
- {
-@@ -13,3 +18,385 @@ static void mainboard_enable(struct device *dev)
- struct chip_operations mainboard_ops = {
- 	.enable_dev = mainboard_enable,
- };
-+
-+#define HWM_TAB_ADD_TEMP_TARGET	1
-+#define HWM_TAB_PKG_POWER_ANY	0xffff
-+#define CHASSIS_TYPE_UNKNOWN	0xff
-+
-+struct hwm_tab_entry {
-+	uint16_t addr;
-+	uint8_t val;
-+	uint8_t flags;
-+	uint16_t pkg_power;
-+};
-+
-+struct hwm_tab_entry HWM_TAB3[] = {
-+	{ 0x005, 0x33, 0, 0xffff },
-+	{ 0x018, 0x2f, 0, 0xffff },
-+	{ 0x019, 0x2f, 0, 0xffff },
-+	{ 0x01a, 0x2f, 0, 0xffff },
-+	{ 0x080, 0x00, 0, 0xffff },
-+	{ 0x081, 0x00, 0, 0xffff },
-+	{ 0x083, 0xbb, 0, 0xffff },
-+	{ 0x085, 0x8a, 0, 0x0010 },
-+	{ 0x086, 0x4c, 0, 0x0010 },
-+	{ 0x08a, 0x66, 0, 0x0010 },
-+	{ 0x08b, 0x5b, 0, 0x0010 },
-+	{ 0x090, 0x65, 0, 0xffff },
-+	{ 0x091, 0x70, 0, 0xffff },
-+	{ 0x092, 0x86, 0, 0xffff },
-+	{ 0x096, 0xa4, 0, 0xffff },
-+	{ 0x097, 0xa4, 0, 0xffff },
-+	{ 0x098, 0xa4, 0, 0xffff },
-+	{ 0x09b, 0xa4, 0, 0xffff },
-+	{ 0x0a0, 0x0e, 0, 0xffff },
-+	{ 0x0a1, 0x0e, 0, 0xffff },
-+	{ 0x0ae, 0x7c, 0, 0xffff },
-+	{ 0x0af, 0x86, 0, 0xffff },
-+	{ 0x0b0, 0x9a, 0, 0xffff },
-+	{ 0x0b3, 0x9a, 0, 0xffff },
-+	{ 0x0b6, 0x08, 0, 0xffff },
-+	{ 0x0b7, 0x08, 0, 0xffff },
-+	{ 0x0ea, 0x64, 0, 0x0020 },
-+	{ 0x0ea, 0x5c, 0, 0x0010 },
-+	{ 0x0ef, 0xff, 0, 0xffff },
-+	{ 0x0f8, 0x15, 0, 0xffff },
-+	{ 0x0f9, 0x00, 0, 0xffff },
-+	{ 0x0f0, 0x30, 0, 0xffff },
-+	{ 0x0fd, 0x01, 0, 0xffff },
-+	{ 0x1a1, 0x00, 0, 0xffff },
-+	{ 0x1a2, 0x00, 0, 0xffff },
-+	{ 0x1b1, 0x08, 0, 0xffff },
-+	{ 0x1be, 0x99, 0, 0xffff },
-+	{ 0x280, 0xa0, 0, 0x0010 },
-+	{ 0x281, 0x0f, 0, 0x0010 },
-+	{ 0x282, 0x03, 0, 0xffff },
-+	{ 0x283, 0x0a, 0, 0xffff },
-+	{ 0x284, 0x80, 0, 0xffff },
-+	{ 0x285, 0x03, 0, 0xffff },
-+	{ 0x288, 0x68, 0, 0x0010 },
-+	{ 0x289, 0x10, 0, 0x0010 },
-+	{ 0x28a, 0x03, 0, 0xffff },
-+	{ 0x28b, 0x0a, 0, 0xffff },
-+	{ 0x28c, 0x80, 0, 0xffff },
-+	{ 0x28d, 0x03, 0, 0xffff },
-+};
-+
-+struct hwm_tab_entry HWM_TAB4[] = {
-+	{ 0x005, 0x33, 0, 0xffff },
-+	{ 0x018, 0x2f, 0, 0xffff },
-+	{ 0x019, 0x2f, 0, 0xffff },
-+	{ 0x01a, 0x2f, 0, 0xffff },
-+	{ 0x080, 0x00, 0, 0xffff },
-+	{ 0x081, 0x00, 0, 0xffff },
-+	{ 0x083, 0xbb, 0, 0xffff },
-+	{ 0x085, 0x99, 0, 0x0020 },
-+	{ 0x085, 0xad, 0, 0x0010 },
-+	{ 0x086, 0x1c, 0, 0xffff },
-+	{ 0x08a, 0x39, 0, 0x0020 },
-+	{ 0x08a, 0x41, 0, 0x0010 },
-+	{ 0x08b, 0x76, 0, 0x0020 },
-+	{ 0x08b, 0x8b, 0, 0x0010 },
-+	{ 0x090, 0x5e, 0, 0xffff },
-+	{ 0x091, 0x5e, 0, 0xffff },
-+	{ 0x092, 0x86, 0, 0xffff },
-+	{ 0x096, 0xa4, 0, 0xffff },
-+	{ 0x097, 0xa4, 0, 0xffff },
-+	{ 0x098, 0xa4, 0, 0xffff },
-+	{ 0x09b, 0xa4, 0, 0xffff },
-+	{ 0x0a0, 0x0a, 0, 0xffff },
-+	{ 0x0a1, 0x0a, 0, 0xffff },
-+	{ 0x0ae, 0x7c, 0, 0xffff },
-+	{ 0x0af, 0x7c, 0, 0xffff },
-+	{ 0x0b0, 0x9a, 0, 0xffff },
-+	{ 0x0b3, 0x7c, 0, 0xffff },
-+	{ 0x0b6, 0x08, 0, 0xffff },
-+	{ 0x0b7, 0x08, 0, 0xffff },
-+	{ 0x0ea, 0x64, 0, 0x0020 },
-+	{ 0x0ea, 0x5c, 0, 0x0010 },
-+	{ 0x0ef, 0xff, 0, 0xffff },
-+	{ 0x0f8, 0x15, 0, 0xffff },
-+	{ 0x0f9, 0x00, 0, 0xffff },
-+	{ 0x0f0, 0x30, 0, 0xffff },
-+	{ 0x0fd, 0x01, 0, 0xffff },
-+	{ 0x1a1, 0x00, 0, 0xffff },
-+	{ 0x1a2, 0x00, 0, 0xffff },
-+	{ 0x1b1, 0x08, 0, 0xffff },
-+	{ 0x1be, 0x90, 0, 0xffff },
-+	{ 0x280, 0x94, 0, 0x0020 },
-+	{ 0x281, 0x11, 0, 0x0020 },
-+	{ 0x280, 0x94, 0, 0x0010 },
-+	{ 0x281, 0x11, 0, 0x0010 },
-+	{ 0x282, 0x03, 0, 0xffff },
-+	{ 0x283, 0x0a, 0, 0xffff },
-+	{ 0x284, 0x80, 0, 0xffff },
-+	{ 0x285, 0x03, 0, 0xffff },
-+	{ 0x288, 0x28, 0, 0x0020 },
-+	{ 0x289, 0x0a, 0, 0x0020 },
-+	{ 0x288, 0x28, 0, 0x0010 },
-+	{ 0x289, 0x0a, 0, 0x0010 },
-+	{ 0x28a, 0x03, 0, 0xffff },
-+	{ 0x28b, 0x0a, 0, 0xffff },
-+	{ 0x28c, 0x80, 0, 0xffff },
-+	{ 0x28d, 0x03, 0, 0xffff },
-+};
-+
-+struct hwm_tab_entry HWM_TAB5[] = {
-+	{ 0x005, 0x33, 0, 0xffff },
-+	{ 0x018, 0x2f, 0, 0xffff },
-+	{ 0x019, 0x2f, 0, 0xffff },
-+	{ 0x01a, 0x2f, 0, 0xffff },
-+	{ 0x080, 0x00, 0, 0xffff },
-+	{ 0x081, 0x00, 0, 0xffff },
-+	{ 0x083, 0xbb, 0, 0xffff },
-+	{ 0x085, 0x66, 0, 0x0020 },
-+	{ 0x085, 0x5d, 0, 0x0010 },
-+	{ 0x086, 0x1c, 0, 0xffff },
-+	{ 0x08a, 0x39, 0, 0x0020 },
-+	{ 0x08a, 0x41, 0, 0x0010 },
-+	{ 0x08b, 0x76, 0, 0x0020 },
-+	{ 0x08b, 0x80, 0, 0x0010 },
-+	{ 0x090, 0x5d, 0, 0x0020 },
-+	{ 0x090, 0x5e, 0, 0x0010 },
-+	{ 0x091, 0x5e, 0, 0xffff },
-+	{ 0x092, 0x86, 0, 0xffff },
-+	{ 0x096, 0xa4, 0, 0xffff },
-+	{ 0x097, 0xa4, 0, 0xffff },
-+	{ 0x098, 0xa3, 0, 0x0020 },
-+	{ 0x098, 0xa4, 0, 0x0010 },
-+	{ 0x09b, 0xa4, 0, 0xffff },
-+	{ 0x0a0, 0x08, 0, 0xffff },
-+	{ 0x0a1, 0x0a, 0, 0xffff },
-+	{ 0x0ae, 0x7c, 0, 0xffff },
-+	{ 0x0af, 0x7c, 0, 0xffff },
-+	{ 0x0b0, 0x9a, 0, 0xffff },
-+	{ 0x0b3, 0x7c, 0, 0xffff },
-+	{ 0x0b6, 0x08, 0, 0xffff },
-+	{ 0x0b7, 0x08, 0, 0xffff },
-+	{ 0x0ea, 0x64, 0, 0x0020 },
-+	{ 0x0ea, 0x5c, 0, 0x0010 },
-+	{ 0x0ef, 0xff, 0, 0xffff },
-+	{ 0x0f8, 0x15, 0, 0xffff },
-+	{ 0x0f9, 0x00, 0, 0xffff },
-+	{ 0x0f0, 0x30, 0, 0xffff },
-+	{ 0x0fd, 0x01, 0, 0xffff },
-+	{ 0x1a1, 0x00, 0, 0xffff },
-+	{ 0x1a2, 0x00, 0, 0xffff },
-+	{ 0x1b1, 0x08, 0, 0xffff },
-+	{ 0x1be, 0x98, 0, 0x0020 },
-+	{ 0x1be, 0x90, 0, 0x0010 },
-+	{ 0x280, 0x94, 0, 0x0020 },
-+	{ 0x281, 0x11, 0, 0x0020 },
-+	{ 0x280, 0x94, 0, 0x0010 },
-+	{ 0x281, 0x11, 0, 0x0010 },
-+	{ 0x282, 0x03, 0, 0xffff },
-+	{ 0x283, 0x0a, 0, 0xffff },
-+	{ 0x284, 0x80, 0, 0xffff },
-+	{ 0x285, 0x03, 0, 0xffff },
-+	{ 0x288, 0x28, 0, 0x0020 },
-+	{ 0x289, 0x0a, 0, 0x0020 },
-+	{ 0x288, 0x28, 0, 0x0010 },
-+	{ 0x289, 0x0a, 0, 0x0010 },
-+	{ 0x28a, 0x03, 0, 0xffff },
-+	{ 0x28b, 0x0a, 0, 0xffff },
-+	{ 0x28c, 0x80, 0, 0xffff },
-+	{ 0x28d, 0x03, 0, 0xffff },
-+};
-+
-+struct hwm_tab_entry HWM_TAB6[] = {
-+	{ 0x005, 0x33, 0, 0xffff },
-+	{ 0x018, 0x2f, 0, 0xffff },
-+	{ 0x019, 0x2f, 0, 0xffff },
-+	{ 0x01a, 0x2f, 0, 0xffff },
-+	{ 0x080, 0x00, 0, 0xffff },
-+	{ 0x081, 0x00, 0, 0xffff },
-+	{ 0x083, 0xbb, 0, 0xffff },
-+	{ 0x085, 0x98, 0, 0xffff },
-+	{ 0x086, 0x3c, 0, 0xffff },
-+	{ 0x08a, 0x39, 0, 0x0020 },
-+	{ 0x08a, 0x3d, 0, 0x0010 },
-+	{ 0x08b, 0x44, 0, 0x0020 },
-+	{ 0x08b, 0x51, 0, 0x0010 },
-+	{ 0x090, 0x61, 0, 0xffff },
-+	{ 0x091, 0x6d, 0, 0xffff },
-+	{ 0x092, 0x86, 0, 0xffff },
-+	{ 0x096, 0xa4, 0, 0xffff },
-+	{ 0x097, 0xa4, 0, 0xffff },
-+	{ 0x098, 0x9f, 0, 0x0020 },
-+	{ 0x098, 0xa4, 0, 0x0010 },
-+	{ 0x09b, 0xa4, 0, 0xffff },
-+	{ 0x0a0, 0x0e, 0, 0xffff },
-+	{ 0x0a1, 0x0e, 0, 0xffff },
-+	{ 0x0ae, 0x7c, 0, 0xffff },
-+	{ 0x0af, 0x7c, 0, 0xffff },
-+	{ 0x0b0, 0x9b, 0, 0x0020 },
-+	{ 0x0b0, 0x98, 0, 0x0010 },
-+	{ 0x0b3, 0x9a, 0, 0xffff },
-+	{ 0x0b6, 0x08, 0, 0xffff },
-+	{ 0x0b7, 0x08, 0, 0xffff },
-+	{ 0x0ea, 0x64, 0, 0x0020 },
-+	{ 0x0ea, 0x5c, 0, 0x0010 },
-+	{ 0x0ef, 0xff, 0, 0xffff },
-+	{ 0x0f8, 0x15, 0, 0xffff },
-+	{ 0x0f9, 0x00, 0, 0xffff },
-+	{ 0x0f0, 0x30, 0, 0xffff },
-+	{ 0x0fd, 0x01, 0, 0xffff },
-+	{ 0x1a1, 0x00, 0, 0xffff },
-+	{ 0x1a2, 0x00, 0, 0xffff },
-+	{ 0x1b1, 0x08, 0, 0xffff },
-+	{ 0x1be, 0x9a, 0, 0x0020 },
-+	{ 0x1be, 0x96, 0, 0x0010 },
-+	{ 0x280, 0x94, 0, 0x0020 },
-+	{ 0x281, 0x11, 0, 0x0020 },
-+	{ 0x280, 0x94, 0, 0x0010 },
-+	{ 0x281, 0x11, 0, 0x0010 },
-+	{ 0x282, 0x03, 0, 0xffff },
-+	{ 0x283, 0x0a, 0, 0xffff },
-+	{ 0x284, 0x80, 0, 0xffff },
-+	{ 0x285, 0x03, 0, 0xffff },
-+	{ 0x288, 0x94, 0, 0x0020 },
-+	{ 0x289, 0x11, 0, 0x0020 },
-+	{ 0x288, 0x94, 0, 0x0010 },
-+	{ 0x289, 0x11, 0, 0x0010 },
-+	{ 0x28a, 0x03, 0, 0xffff },
-+	{ 0x28b, 0x0a, 0, 0xffff },
-+	{ 0x28c, 0x80, 0, 0xffff },
-+	{ 0x28d, 0x03, 0, 0xffff },
-+};
-+
-+static uint8_t get_chassis_type(void)
-+{
-+	uint8_t gpio_chassis_type;
-+
-+	// Read chassis type from GPIO
-+	gpio_chassis_type = get_gpio(70) << 3 | get_gpio(38) << 2 |
-+			    get_gpio(17) << 1 | get_gpio(1);
-+
-+	printk(BIOS_DEBUG, "GPIO chassis type = %#x\n", gpio_chassis_type);
-+
-+	// Turn it into internal chassis index
-+	switch (gpio_chassis_type) {
-+	case 0x08:
-+	case 0x0a:
-+		return 4;
-+	case 0x0b:
-+		return 3;
-+	case 0x0c:
-+		return 5;
-+	case 0x0d: // SFF
-+	case 0x0e:
-+	case 0x0f:
-+		return 6;
-+	default:
-+		return CHASSIS_TYPE_UNKNOWN;
-+	}
-+
-+}
-+
-+static uint8_t get_temp_target(void)
-+{
-+	uint8_t val = rdmsr(0x1a2).lo >> 8 & 0xff;
-+	if (!val)
-+		val = 20;
-+	return 0x95 - val;
-+}
-+
-+static uint16_t get_pkg_power(void)
-+{
-+	uint8_t rapl_power_unit = rdmsr(0x606).lo & 0xf;
-+	if (rapl_power_unit)
-+		rapl_power_unit = 2 << (rapl_power_unit - 1);
-+	uint16_t pkg_power_info = rdmsr(0x614).lo & 0x7fff;
-+	if (pkg_power_info / rapl_power_unit > 0x41)
-+		return 32;
-+	else
-+		return 16;
-+}
-+
-+static void apply_hwm_tab(struct hwm_tab_entry *arr, size_t size)
-+{
-+	uint8_t temp_target = get_temp_target();
-+	uint16_t pkg_power = get_pkg_power();
-+
-+	printk(BIOS_DEBUG, "Temp target = %#x\n", temp_target);
-+	printk(BIOS_DEBUG, "Package power = %#x\n", pkg_power);
-+
-+	for (size_t i = 0; i < size; ++i) {
-+		// Skip entry if it doesn't apply for this package power
-+		if (arr[i].pkg_power != pkg_power &&
-+		    arr[i].pkg_power != HWM_TAB_PKG_POWER_ANY)
-+			continue;
-+
-+		uint8_t val = arr[i].val;
-+
-+		// Add temp target to value if requested (current tables never do)
-+		if (arr[i].flags & HWM_TAB_ADD_TEMP_TARGET)
-+			val += temp_target;
-+
-+		// Perform write
-+		ec_write(1, arr[i].addr, val);
-+
-+	}
-+}
-+
-+static void sch5555_ec_hwm_init(void *arg)
-+{
-+	uint8_t chassis_type, saved_2fc;
-+
-+	printk(BIOS_DEBUG, "OptiPlex 9020 late HWM init\n");
-+
-+	saved_2fc = ec_read(1, 0x2fc);
-+	ec_write(1, 0x2fc, 0xa0);
-+	ec_write(1, 0x2fd, 0x32);
-+
-+	chassis_type = get_chassis_type();
-+
-+	if (chassis_type != CHASSIS_TYPE_UNKNOWN) {
-+		printk(BIOS_DEBUG, "Chassis type = %#x\n", chassis_type);
-+	} else {
-+		printk(BIOS_DEBUG, "WARNING: Unknown chassis type\n");
-+	}
-+
-+	// Apply HWM table based on chassis type
-+	switch (chassis_type) {
-+	case 3:
-+		apply_hwm_tab(HWM_TAB3, ARRAY_SIZE(HWM_TAB3));
-+		break;
-+	case 4:
-+		apply_hwm_tab(HWM_TAB4, ARRAY_SIZE(HWM_TAB4));
-+		break;
-+	case 5:
-+		apply_hwm_tab(HWM_TAB5, ARRAY_SIZE(HWM_TAB5));
-+		break;
-+	case 6:
-+		apply_hwm_tab(HWM_TAB6, ARRAY_SIZE(HWM_TAB6));
-+		break;
-+	}
-+
-+	// NOTE: vendor firmware applies these when "max core address" > 2
-+	// i think this is always the case
-+	ec_write(1, 0x9e, 0x30);
-+	ec_write(1, 0xeb, ec_read(1, 0xea));
-+
-+	ec_write(1, 0x2fc, saved_2fc);
-+
-+	// Apply full speed fan config if requested or if the chassis type is unknown
-+	if (chassis_type == CHASSIS_TYPE_UNKNOWN || get_uint_option("fan_full_speed", 0)) {
-+		printk(BIOS_DEBUG, "Setting full fan speed\n");
-+		ec_write(1, 0x80, 0x60 | ec_read(1, 0x80));
-+		ec_write(1, 0x81, 0x60 | ec_read(1, 0x81));
-+	}
-+
-+	ec_read(1, 0xb8);
-+
-+	if ((chassis_type == 4 || chassis_type == 5) && ec_read(1, 0x26) == 0) {
-+		ec_write(1, 0xa0, ec_read(1, 0xa0) & 0xfb);
-+		ec_write(1, 0xa1, ec_read(1, 0xa1) & 0xfb);
-+		ec_write(1, 0xa2, ec_read(1, 0xa2) & 0xfb);
-+		ec_write(1, 0x8a, 0x99);
-+		ec_write(1, 0x8b, 0x47);
-+		ec_write(1, 0x8c, 0x91);
-+	}
-+}
-+
-+BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL);
-diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.c b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
-new file mode 100644
-index 0000000000..a1067ac063
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
-@@ -0,0 +1,54 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <arch/io.h>
-+#include <device/pnp_ops.h>
-+#include <superio/smsc/sch555x/sch555x.h>
-+#include "sch5555_ec.h"
-+
-+uint8_t ec_read(uint8_t addr1, uint16_t addr2)
-+{
-+	// clear ec-to-host mailbox
-+	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
-+	outb(tmp, SCH555x_EMI_IOBASE + 1);
-+
-+	// send address
-+	outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
-+	outw((addr1 * 2) | 0x100, SCH555x_EMI_IOBASE + 4);
-+
-+	outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
-+	outl(addr2 << 16, SCH555x_EMI_IOBASE + 4);
-+
-+	// send message to ec
-+	outb(1, SCH555x_EMI_IOBASE);
-+
-+	// wait for ack
-+	for (size_t retry = 0; retry < 0xfff; ++retry)
-+		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
-+			break;
-+
-+	// read result
-+	outw(4 | 0x8000, SCH555x_EMI_IOBASE + 2);
-+	return inb(SCH555x_EMI_IOBASE + 4);
-+}
-+
-+void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val)
-+{
-+	// clear ec-to-host mailbox
-+	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
-+	outb(tmp, SCH555x_EMI_IOBASE + 1);
-+
-+	// send address and value
-+	outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
-+	outw((addr1 * 2) | 0x101, SCH555x_EMI_IOBASE + 4);
-+
-+	outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
-+	outl(val | (addr2 << 16), SCH555x_EMI_IOBASE + 4);
-+
-+	// send message to ec
-+	outb(1, SCH555x_EMI_IOBASE);
-+
-+	// wait for ack
-+	for (size_t retry = 0; retry < 0xfff; ++retry)
-+		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
-+			break;
-+}
-diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.h b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
-new file mode 100644
-index 0000000000..7e399e8e74
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
-@@ -0,0 +1,10 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#ifndef __SCH5555_EC_H__
-+#define __SCH5555_EC_H__
-+
-+uint8_t ec_read(uint8_t addr1, uint16_t addr2);
-+
-+void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val);
-+
-+#endif
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0043-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch b/config/coreboot/default/patches/0043-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
deleted file mode 100644
index 556e8e07..00000000
--- a/config/coreboot/default/patches/0043-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From cd3c553a313a26494e5dc31ff8323c3a919f190a Mon Sep 17 00:00:00 2001
-From: Mate Kukri <kukri.mate@gmail.com>
-Date: Wed, 10 Apr 2024 20:31:35 +0100
-Subject: [PATCH 1/1] mb/dell/optiplex_9020: Add support for TPM1.2 device
-
-These machines come with a TPM1.2 device by default. It is somewhat
-obsolete these days, but there is no harm in enabling it.
-
-Change-Id: Iec05321862aed58695c256b00494e5953219786d
-Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
-Reviewed-on: https://review.coreboot.org/c/coreboot/+/81827
-Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
----
- src/mainboard/dell/optiplex_9020/Kconfig       | 2 ++
- src/mainboard/dell/optiplex_9020/devicetree.cb | 3 +++
- 2 files changed, 5 insertions(+)
-
-diff --git a/src/mainboard/dell/optiplex_9020/Kconfig b/src/mainboard/dell/optiplex_9020/Kconfig
-index 774a72f161..296938aa8d 100644
---- a/src/mainboard/dell/optiplex_9020/Kconfig
-+++ b/src/mainboard/dell/optiplex_9020/Kconfig
-@@ -12,7 +12,9 @@ config BOARD_SPECIFIC_OPTIONS
- 	select INTEL_GMA_HAVE_VBT
- 	select INTEL_INT15
- 	select MAINBOARD_HAS_LIBGFXINIT
-+	select MAINBOARD_HAS_TPM1
- 	select MAINBOARD_USES_IFD_GBE_REGION
-+	select MEMORY_MAPPED_TPM
- 	select NORTHBRIDGE_INTEL_HASWELL
- 	select SERIRQ_CONTINUOUS_MODE
- 	select SOUTHBRIDGE_INTEL_LYNXPOINT
-diff --git a/src/mainboard/dell/optiplex_9020/devicetree.cb b/src/mainboard/dell/optiplex_9020/devicetree.cb
-index 7bfa6736a6..e5cbd64127 100644
---- a/src/mainboard/dell/optiplex_9020/devicetree.cb
-+++ b/src/mainboard/dell/optiplex_9020/devicetree.cb
-@@ -70,6 +70,9 @@ chip northbridge/intel/haswell
- 					device pnp 2e.b  off end	# Floppy Controller
- 					device pnp 2e.11 off end	# Parallel Port
- 				end
-+				chip drivers/pc80/tpm
-+					device pnp 0c31.0 on end
-+				end
- 			end
- 			device pci 1f.2 on  end				# SATA controller 1
- 			device pci 1f.3 on  end				# SMBus
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0044-hp-8560w-turn-on-wifi.patch b/config/coreboot/default/patches/0044-hp-8560w-turn-on-wifi.patch
deleted file mode 100644
index bb4a7b47..00000000
--- a/config/coreboot/default/patches/0044-hp-8560w-turn-on-wifi.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 4ccef4fffd98071c339cb4135e2d8c805e554378 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Fri, 3 May 2024 17:45:52 +0100
-Subject: [PATCH 1/1] hp/8560w: turn on wifi
-
-according to angel pons, this gpio is WLAN_TRN_OFF#
-and setting it high will make wifi work. testing with
-this change as suggested by angel. see:
-
-https://review.coreboot.org/c/coreboot/+/39398/4/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c#158
-
-if it makes it into a libreboot release, you can assume
-the fix works. right now we have this problem:
-
-https://codeberg.org/libreboot/lbmk/issues/201
-
-Riku reported:
-
-[  333.890080] atkbd serio0: Unknown key pressed (translated set 2, code 0xf8 on isa0060/serio0).
-[  333.890102] atkbd serio0: Use 'setkeycodes e078 <keycode>' to make it known.
-[  334.104069] atkbd serio0: Unknown key released (translated set 2, code 0xf8 on isa0060/serio0).
-[  334.104090] atkbd serio0: Use 'setkeycodes e078 <keycode>' to make it known.
-
-The wifi stays to hardblocked in rfkill. When the wireless button
-is pressed, nothing changes except for these lines in dmesg.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
-index 560d668d6f..10cd11ce48 100644
---- a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
-+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
-@@ -155,7 +155,7 @@ static const struct pch_gpio_set2 pch_gpio_set2_level = {
- 	.gpio37 = GPIO_LEVEL_LOW,
- 	.gpio49 = GPIO_LEVEL_LOW,
- 	.gpio53 = GPIO_LEVEL_HIGH,
--	.gpio57 = GPIO_LEVEL_LOW,
-+	.gpio57 = GPIO_LEVEL_HIGH,
- 	.gpio60 = GPIO_LEVEL_HIGH,
- 	.gpio61 = GPIO_LEVEL_HIGH,
- };
--- 
-2.39.2
-
diff --git a/config/coreboot/default/patches/0046-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch b/config/coreboot/default/patches/0046-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch
deleted file mode 100644
index 34d92278..00000000
--- a/config/coreboot/default/patches/0046-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch
+++ /dev/null
@@ -1,133 +0,0 @@
-From 9ff35368733c5e5a852ebd6295f262710553913b Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Fri, 3 May 2024 16:31:12 -0600
-Subject: [PATCH] mb/dell/: Add S3 SMI handler for SNB/IVB Latitudes
-
-This should fix S3 suspend on these systems
-
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e5420/smihandler.c | 9 +++++++++
- src/mainboard/dell/e5520/smihandler.c | 9 +++++++++
- src/mainboard/dell/e5530/smihandler.c | 9 +++++++++
- src/mainboard/dell/e6420/smihandler.c | 9 +++++++++
- src/mainboard/dell/e6430/smihandler.c | 9 +++++++++
- src/mainboard/dell/e6520/smihandler.c | 9 +++++++++
- src/mainboard/dell/e6530/smihandler.c | 9 +++++++++
- 7 files changed, 63 insertions(+)
- create mode 100644 src/mainboard/dell/e5420/smihandler.c
- create mode 100644 src/mainboard/dell/e5520/smihandler.c
- create mode 100644 src/mainboard/dell/e5530/smihandler.c
- create mode 100644 src/mainboard/dell/e6420/smihandler.c
- create mode 100644 src/mainboard/dell/e6430/smihandler.c
- create mode 100644 src/mainboard/dell/e6520/smihandler.c
- create mode 100644 src/mainboard/dell/e6530/smihandler.c
-
-diff --git a/src/mainboard/dell/e5420/smihandler.c b/src/mainboard/dell/e5420/smihandler.c
-new file mode 100644
-index 0000000000..334d7b1a5f
---- /dev/null
-+++ b/src/mainboard/dell/e5420/smihandler.c
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <cpu/x86/smm.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+
-+void mainboard_smi_sleep(u8 slp_typ)
-+{
-+	mec5035_sleep(slp_typ);
-+}
-diff --git a/src/mainboard/dell/e5520/smihandler.c b/src/mainboard/dell/e5520/smihandler.c
-new file mode 100644
-index 0000000000..334d7b1a5f
---- /dev/null
-+++ b/src/mainboard/dell/e5520/smihandler.c
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <cpu/x86/smm.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+
-+void mainboard_smi_sleep(u8 slp_typ)
-+{
-+	mec5035_sleep(slp_typ);
-+}
-diff --git a/src/mainboard/dell/e5530/smihandler.c b/src/mainboard/dell/e5530/smihandler.c
-new file mode 100644
-index 0000000000..334d7b1a5f
---- /dev/null
-+++ b/src/mainboard/dell/e5530/smihandler.c
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <cpu/x86/smm.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+
-+void mainboard_smi_sleep(u8 slp_typ)
-+{
-+	mec5035_sleep(slp_typ);
-+}
-diff --git a/src/mainboard/dell/e6420/smihandler.c b/src/mainboard/dell/e6420/smihandler.c
-new file mode 100644
-index 0000000000..334d7b1a5f
---- /dev/null
-+++ b/src/mainboard/dell/e6420/smihandler.c
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <cpu/x86/smm.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+
-+void mainboard_smi_sleep(u8 slp_typ)
-+{
-+	mec5035_sleep(slp_typ);
-+}
-diff --git a/src/mainboard/dell/e6430/smihandler.c b/src/mainboard/dell/e6430/smihandler.c
-new file mode 100644
-index 0000000000..334d7b1a5f
---- /dev/null
-+++ b/src/mainboard/dell/e6430/smihandler.c
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <cpu/x86/smm.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+
-+void mainboard_smi_sleep(u8 slp_typ)
-+{
-+	mec5035_sleep(slp_typ);
-+}
-diff --git a/src/mainboard/dell/e6520/smihandler.c b/src/mainboard/dell/e6520/smihandler.c
-new file mode 100644
-index 0000000000..334d7b1a5f
---- /dev/null
-+++ b/src/mainboard/dell/e6520/smihandler.c
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <cpu/x86/smm.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+
-+void mainboard_smi_sleep(u8 slp_typ)
-+{
-+	mec5035_sleep(slp_typ);
-+}
-diff --git a/src/mainboard/dell/e6530/smihandler.c b/src/mainboard/dell/e6530/smihandler.c
-new file mode 100644
-index 0000000000..334d7b1a5f
---- /dev/null
-+++ b/src/mainboard/dell/e6530/smihandler.c
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <cpu/x86/smm.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+
-+void mainboard_smi_sleep(u8 slp_typ)
-+{
-+	mec5035_sleep(slp_typ);
-+}
--- 
-2.44.0
-
diff --git a/config/coreboot/default/target.cfg b/config/coreboot/default/target.cfg
index a70633c4..3a773b43 100644
--- a/config/coreboot/default/target.cfg
+++ b/config/coreboot/default/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-rev="b6cbfa977f63d57d5d6b9e9f7c1cef30162f575a"
+rev="97bc693abc482139774a656212935387d43df8e2"
diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
index 9abe57a3..04a9519c 100644
--- a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E5420"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e5420"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
 CONFIG_VGA_BIOS_ID="8086,0116"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -123,31 +123,41 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e5420"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_BOARD_DELL_LATITUDE_E5420=y
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+CONFIG_BOARD_DELL_LATITUDE_E5420=y
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -164,6 +174,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -173,14 +184,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_6144=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -222,9 +236,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -234,7 +249,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -265,6 +279,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -349,7 +364,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -364,6 +379,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -462,6 +478,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -515,7 +532,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
index 5606a017..03accb19 100644
--- a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E5420"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e5420"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
 CONFIG_VGA_BIOS_ID="8086,0116"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -121,31 +121,41 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e5420"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_BOARD_DELL_LATITUDE_E5420=y
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+CONFIG_BOARD_DELL_LATITUDE_E5420=y
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -162,6 +172,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -171,14 +182,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_6144=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -220,9 +234,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -232,7 +247,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -263,6 +277,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -347,7 +362,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -362,6 +377,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -459,6 +475,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -512,7 +529,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
index e57da732..224ee424 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E5520"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e5520"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
 CONFIG_VGA_BIOS_ID="8086,0126"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -123,31 +123,41 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e5520"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-CONFIG_BOARD_DELL_LATITUDE_E5520=y
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+CONFIG_BOARD_DELL_LATITUDE_E5520=y
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -164,6 +174,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -173,14 +184,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_6144=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -222,9 +236,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -234,7 +249,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -265,6 +279,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -349,7 +364,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -364,6 +379,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -462,6 +478,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -515,7 +532,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
index b9c2cd0a..9c70c9e0 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E5520"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e5520"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
 CONFIG_VGA_BIOS_ID="8086,0126"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -121,31 +121,41 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e5520"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-CONFIG_BOARD_DELL_LATITUDE_E5520=y
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+CONFIG_BOARD_DELL_LATITUDE_E5520=y
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -162,6 +172,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -171,14 +182,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_6144=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -220,9 +234,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -232,7 +247,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -263,6 +277,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -347,7 +362,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -362,6 +377,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -459,6 +475,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -512,7 +529,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
index 7f4cdc8b..db053aa8 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E5530"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e5530"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
 CONFIG_VGA_BIOS_ID="8086,0166"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -123,31 +123,41 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e5530"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-CONFIG_BOARD_DELL_LATITUDE_E5530=y
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+CONFIG_BOARD_DELL_LATITUDE_E5530=y
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -164,6 +174,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd_nogbe"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -173,14 +184,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -222,9 +236,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -234,7 +249,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -265,6 +279,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -349,7 +364,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -364,6 +379,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -462,6 +478,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -515,7 +532,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
index 4e1303a4..5ca8d4bf 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E5530"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e5530"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
 CONFIG_VGA_BIOS_ID="8086,0166"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -121,31 +121,41 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e5530"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-CONFIG_BOARD_DELL_LATITUDE_E5530=y
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+CONFIG_BOARD_DELL_LATITUDE_E5530=y
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -162,6 +172,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd_nogbe"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -171,14 +182,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -220,9 +234,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -232,7 +247,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -263,6 +277,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -347,7 +362,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -362,6 +377,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -459,6 +475,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -512,7 +529,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
index 5bdd1843..d0c2a21a 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6420"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6420"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
 CONFIG_VGA_BIOS_ID="8086,0126"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -123,31 +123,41 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6420"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-CONFIG_BOARD_DELL_LATITUDE_E6420=y
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6420=y
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -165,6 +175,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -174,14 +185,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_10240=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -223,9 +237,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -235,7 +250,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -266,6 +280,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -352,7 +367,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -367,6 +382,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -465,6 +481,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -518,7 +535,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
index b7aafbaa..2c9e7d23 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6420"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6420"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
 CONFIG_VGA_BIOS_ID="8086,0126"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -121,31 +121,41 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6420"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-CONFIG_BOARD_DELL_LATITUDE_E6420=y
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6420=y
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -163,6 +173,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -172,14 +183,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_10240=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -221,9 +235,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -233,7 +248,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -264,6 +278,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -350,7 +365,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -365,6 +380,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -462,6 +478,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -515,7 +532,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 7d1fd1ed..a5d4d087 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6430"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6430"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
 CONFIG_VGA_BIOS_ID="8086,0166"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -123,31 +123,41 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6430"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-CONFIG_BOARD_DELL_LATITUDE_E6430=y
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6430=y
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -165,6 +175,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -174,14 +185,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -223,9 +237,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -235,7 +250,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -266,6 +280,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -352,7 +367,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -367,6 +382,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -465,6 +481,7 @@ CONFIG_USE_PC_CMOS_ALTCENTURY=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -518,7 +535,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index fe8d8105..af1daf77 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6430"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6430"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
 CONFIG_VGA_BIOS_ID="8086,0166"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -121,31 +121,41 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6430"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-CONFIG_BOARD_DELL_LATITUDE_E6430=y
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6430=y
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -163,6 +173,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -172,14 +183,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -221,9 +235,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -233,7 +248,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -264,6 +278,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -350,7 +365,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -365,6 +380,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -462,6 +478,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -515,7 +532,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
index 7b3385ff..49bec327 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6520"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6520"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
 CONFIG_VGA_BIOS_ID="8086,0116"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -123,31 +123,41 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6520"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-CONFIG_BOARD_DELL_LATITUDE_E6520=y
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6520=y
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -165,6 +175,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -174,14 +185,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_10240=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -223,9 +237,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -235,7 +250,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -266,6 +280,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -352,7 +367,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -367,6 +382,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -465,6 +481,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -518,7 +535,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
index c5195de0..0e4d85b6 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6520"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6520"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
 CONFIG_VGA_BIOS_ID="8086,0116"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -121,31 +121,41 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6520"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-CONFIG_BOARD_DELL_LATITUDE_E6520=y
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6520=y
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -163,6 +173,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -172,14 +183,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_10240=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -221,9 +235,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -233,7 +248,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -264,6 +278,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -350,7 +365,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -365,6 +380,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -462,6 +478,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -515,7 +532,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index 3824cd7e..acba20f6 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6530"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6530"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
 CONFIG_VGA_BIOS_ID="8086,0166"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -123,31 +123,41 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6530"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-CONFIG_BOARD_DELL_LATITUDE_E6530=y
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6530=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -165,6 +175,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -174,14 +185,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -223,9 +237,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -235,7 +250,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -266,6 +280,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -352,7 +367,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -367,6 +382,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -465,6 +481,7 @@ CONFIG_USE_PC_CMOS_ALTCENTURY=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -518,7 +535,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index 7bcc0d08..81c91426 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6530"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6530"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
 CONFIG_VGA_BIOS_ID="8086,0166"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -121,31 +121,41 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6530"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-CONFIG_BOARD_DELL_LATITUDE_E6530=y
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6530=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -163,6 +173,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -172,14 +183,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -221,9 +235,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -233,7 +248,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -264,6 +278,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -350,7 +365,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -365,6 +380,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -462,6 +478,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -515,7 +532,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/g43t_am3/config/libgfxinit_txtmode b/config/coreboot/g43t_am3/config/libgfxinit_txtmode
index 3ce6d330..42abd3a3 100644
--- a/config/coreboot/g43t_am3/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t_am3/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 CONFIG_VENDOR_ACER=y
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_VENDOR_ACER=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_ACER=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,15 +126,17 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Acer"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -148,6 +151,7 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -157,15 +161,18 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3"
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -204,8 +211,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -214,7 +222,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -249,6 +256,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -297,6 +305,8 @@ CONFIG_RCBA_LENGTH=0x4000
 # Super I/O
 #
 CONFIG_SUPERIO_ITE_COMMON_PRE_RAM=y
+CONFIG_SUPERIO_ITE_COMMON_GPIO_PRE_RAM=y
+CONFIG_SUPERIO_ITE_COMMON_NUM_GPIO_SETS=8
 CONFIG_SUPERIO_ITE_ENV_CTRL=y
 CONFIG_SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG=y
 CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2=y
@@ -317,7 +327,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
@@ -334,6 +344,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -431,6 +442,8 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -482,7 +495,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
index 60a4aa7b..f7c5ade5 100644
--- a/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 CONFIG_VENDOR_ACER=y
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_VENDOR_ACER=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_ACER=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,15 +126,17 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Acer"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -148,6 +151,7 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -157,15 +161,18 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3"
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -204,8 +211,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -214,7 +222,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -249,6 +256,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -297,6 +305,8 @@ CONFIG_RCBA_LENGTH=0x4000
 # Super I/O
 #
 CONFIG_SUPERIO_ITE_COMMON_PRE_RAM=y
+CONFIG_SUPERIO_ITE_COMMON_GPIO_PRE_RAM=y
+CONFIG_SUPERIO_ITE_COMMON_NUM_GPIO_SETS=8
 CONFIG_SUPERIO_ITE_ENV_CTRL=y
 CONFIG_SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG=y
 CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2=y
@@ -317,7 +327,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
@@ -334,6 +344,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -431,6 +442,8 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -482,7 +495,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode b/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode
index 5f0fb156..e444f300 100644
--- a/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode
+++ b/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 CONFIG_VENDOR_GIGABYTE=y
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_GIGABYTE=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -123,15 +124,17 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="GIGABYTE"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,7 +158,9 @@ CONFIG_BOARD_GIGABYTE_GA_G41M_ES2L=y
 # CONFIG_BOARD_GIGABYTE_GA_H61M_DS2 is not set
 # CONFIG_BOARD_GIGABYTE_GA_H61M_DS2V is not set
 # CONFIG_BOARD_GIGABYTE_GA_H61MA_D3V is not set
+# CONFIG_BOARD_GIGABYTE_GA_H61M_S2P_R3 is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -164,15 +169,18 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="GA-G41M-ES2L"
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_1024=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -211,8 +219,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -221,7 +230,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -259,6 +267,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -308,6 +317,8 @@ CONFIG_RCBA_LENGTH=0x4000
 # Super I/O
 #
 CONFIG_SUPERIO_ITE_COMMON_PRE_RAM=y
+CONFIG_SUPERIO_ITE_COMMON_GPIO_PRE_RAM=y
+CONFIG_SUPERIO_ITE_COMMON_NUM_GPIO_SETS=6
 CONFIG_SUPERIO_ITE_ENV_CTRL=y
 CONFIG_SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG=y
 CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2=y
@@ -323,7 +334,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_SIPI_VECTOR_IN_ROM=y
@@ -340,6 +351,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -437,6 +449,8 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -489,7 +503,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/gru_bob/config/libgfxinit_corebootfb b/config/coreboot/gru_bob/config/libgfxinit_corebootfb
index 3425806c..24935ea3 100644
--- a/config/coreboot/gru_bob/config/libgfxinit_corebootfb
+++ b/config/coreboot/gru_bob/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -32,7 +31,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_CBMEM_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -50,8 +48,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -62,11 +60,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 CONFIG_VENDOR_GOOGLE=y
@@ -88,6 +88,7 @@ CONFIG_VENDOR_GOOGLE=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -116,13 +117,13 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 # CONFIG_CHROMEOS is not set
 CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=1
 CONFIG_CONSOLE_SERIAL_UART_ADDRESS=0xFF1A0000
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_MEMLAYOUT_LD_FILE="src/soc/rockchip/rk3399/memlayout.ld"
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_ARM64_CURRENT_EL=3
 CONFIG_SPI_FLASH_WINBOND=y
 
 #
@@ -155,6 +156,9 @@ CONFIG_SPI_FLASH_WINBOND=y
 # Brox
 #
 # CONFIG_BOARD_GOOGLE_BROX is not set
+# CONFIG_BOARD_GOOGLE_BROX_EC_ISH is not set
+# CONFIG_BOARD_GOOGLE_LOTSO is not set
+# CONFIG_BOARD_GOOGLE_GREENBAYUPOC is not set
 
 #
 # Brya
@@ -162,6 +166,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_AGAH is not set
 # CONFIG_BOARD_GOOGLE_ANAHERA is not set
 # CONFIG_BOARD_GOOGLE_ANAHERA4ES is not set
+# CONFIG_BOARD_GOOGLE_ANRAGGAR is not set
 # CONFIG_BOARD_GOOGLE_AURASH is not set
 # CONFIG_BOARD_GOOGLE_BANSHEE is not set
 # CONFIG_BOARD_GOOGLE_BRASK is not set
@@ -170,11 +175,14 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_CRAASKOV is not set
 # CONFIG_BOARD_GOOGLE_CONSTITUTION is not set
 # CONFIG_BOARD_GOOGLE_CROTA is not set
+# CONFIG_BOARD_GOOGLE_DOCHI is not set
+# CONFIG_BOARD_GOOGLE_DOMIKA is not set
 # CONFIG_BOARD_GOOGLE_FELWINTER is not set
 # CONFIG_BOARD_GOOGLE_GAELIN is not set
 # CONFIG_BOARD_GOOGLE_GIMBLE is not set
 # CONFIG_BOARD_GOOGLE_GIMBLE4ES is not set
 # CONFIG_BOARD_GOOGLE_GLADIOS is not set
+# CONFIG_BOARD_GOOGLE_GLASSWAY is not set
 # CONFIG_BOARD_GOOGLE_GOTHRAX is not set
 # CONFIG_BOARD_GOOGLE_HADES is not set
 # CONFIG_BOARD_GOOGLE_KANO is not set
@@ -187,6 +195,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_MOLI is not set
 # CONFIG_BOARD_GOOGLE_NIVVIKS is not set
 # CONFIG_BOARD_GOOGLE_NEREID is not set
+# CONFIG_BOARD_GOOGLE_NOKRIS is not set
 # CONFIG_BOARD_GOOGLE_OMNIGUL is not set
 # CONFIG_BOARD_GOOGLE_OSIRIS is not set
 # CONFIG_BOARD_GOOGLE_PIRRHA is not set
@@ -195,11 +204,15 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_QUANDISO is not set
 # CONFIG_BOARD_GOOGLE_REDRIX is not set
 # CONFIG_BOARD_GOOGLE_REDRIX4ES is not set
+# CONFIG_BOARD_GOOGLE_RIVEN is not set
 # CONFIG_BOARD_GOOGLE_SKOLAS is not set
 # CONFIG_BOARD_GOOGLE_SKOLAS4ES is not set
 # CONFIG_BOARD_GOOGLE_TAEKO is not set
 # CONFIG_BOARD_GOOGLE_TAEKO4ES is not set
 # CONFIG_BOARD_GOOGLE_TANIKS is not set
+# CONFIG_BOARD_GOOGLE_TEREID is not set
+# CONFIG_BOARD_GOOGLE_TIVVIKS is not set
+# CONFIG_BOARD_GOOGLE_TRULO is not set
 # CONFIG_BOARD_GOOGLE_ULDREN is not set
 # CONFIG_BOARD_GOOGLE_VELL is not set
 # CONFIG_BOARD_GOOGLE_VOLMAR is not set
@@ -207,10 +220,13 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_YAVIKS is not set
 # CONFIG_BOARD_GOOGLE_YAVILLA is not set
 # CONFIG_BOARD_GOOGLE_ZYDRON is not set
-# CONFIG_BOARD_GOOGLE_NOKRIS is not set
-# CONFIG_BOARD_GOOGLE_DOCHI is not set
-# CONFIG_BOARD_GOOGLE_ANRAGGAR is not set
 # CONFIG_BOARD_GOOGLE_XOL is not set
+# CONFIG_BOARD_GOOGLE_NOVA is not set
+# CONFIG_BOARD_GOOGLE_BUJIA is not set
+# CONFIG_BOARD_GOOGLE_YAVISTA is not set
+# CONFIG_BOARD_GOOGLE_SUNDANCE is not set
+# CONFIG_BOARD_GOOGLE_PUJJOGA is not set
+# CONFIG_BOARD_GOOGLE_ORISA is not set
 
 #
 # Butterfly
@@ -228,22 +244,27 @@ CONFIG_SPI_FLASH_WINBOND=y
 # Kingler
 #
 # CONFIG_BOARD_GOOGLE_KINGLER is not set
+# CONFIG_BOARD_GOOGLE_KYOGRE is not set
+# CONFIG_BOARD_GOOGLE_PONYTA is not set
+# CONFIG_BOARD_GOOGLE_SQUIRTLE is not set
 # CONFIG_BOARD_GOOGLE_STEELIX is not set
 # CONFIG_BOARD_GOOGLE_VOLTORB is not set
-# CONFIG_BOARD_GOOGLE_PONYTA is not set
 
 #
 # Krabby
 #
-# CONFIG_BOARD_GOOGLE_KRABBY is not set
-# CONFIG_BOARD_GOOGLE_TENTACRUEL is not set
-# CONFIG_BOARD_GOOGLE_MAGIKARP is not set
 # CONFIG_BOARD_GOOGLE_CHINCHOU is not set
+# CONFIG_BOARD_GOOGLE_KRABBY is not set
+# CONFIG_BOARD_GOOGLE_MAGIKARP is not set
+# CONFIG_BOARD_GOOGLE_SKITTY is not set
+# CONFIG_BOARD_GOOGLE_TENTACRUEL is not set
+# CONFIG_BOARD_GOOGLE_VELUZA is not set
 
 #
 # Staryu
 #
 # CONFIG_BOARD_GOOGLE_STARMIE is not set
+# CONFIG_BOARD_GOOGLE_WUGTRIO is not set
 
 #
 # Cyan
@@ -268,37 +289,38 @@ CONFIG_SPI_FLASH_WINBOND=y
 #
 # Dedede
 #
+# CONFIG_BOARD_GOOGLE_BEADRIX is not set
+# CONFIG_BOARD_GOOGLE_BLIPPER is not set
 # CONFIG_BOARD_GOOGLE_BOTEN is not set
-# CONFIG_BOARD_GOOGLE_DIBBI is not set
+# CONFIG_BOARD_GOOGLE_BOXY is not set
+# CONFIG_BOARD_GOOGLE_BUGZZY is not set
+# CONFIG_BOARD_GOOGLE_CAPPY2 is not set
+# CONFIG_BOARD_GOOGLE_CORORI is not set
+# CONFIG_BOARD_GOOGLE_CRET is not set
 # CONFIG_BOARD_GOOGLE_DEDEDE is not set
+# CONFIG_BOARD_GOOGLE_DEXI is not set
+# CONFIG_BOARD_GOOGLE_DIBBI is not set
+# CONFIG_BOARD_GOOGLE_DITA is not set
 # CONFIG_BOARD_GOOGLE_DRAWCIA is not set
+# CONFIG_BOARD_GOOGLE_DRIBLEE is not set
+# CONFIG_BOARD_GOOGLE_GALTIC is not set
+# CONFIG_BOARD_GOOGLE_GOOEY is not set
 # CONFIG_BOARD_GOOGLE_HABOKI is not set
-# CONFIG_BOARD_GOOGLE_MADOO is not set
-# CONFIG_BOARD_GOOGLE_WADDLEDOO is not set
-# CONFIG_BOARD_GOOGLE_WADDLEDEE is not set
+# CONFIG_BOARD_GOOGLE_KRACKO is not set
 # CONFIG_BOARD_GOOGLE_LALALA is not set
+# CONFIG_BOARD_GOOGLE_LANTIS is not set
+# CONFIG_BOARD_GOOGLE_MADOO is not set
 # CONFIG_BOARD_GOOGLE_MAGOLOR is not set
 # CONFIG_BOARD_GOOGLE_METAKNIGHT is not set
-# CONFIG_BOARD_GOOGLE_LANTIS is not set
-# CONFIG_BOARD_GOOGLE_GALTIC is not set
-# CONFIG_BOARD_GOOGLE_SASUKE is not set
-# CONFIG_BOARD_GOOGLE_STORO is not set
-# CONFIG_BOARD_GOOGLE_SASUKETTE is not set
-# CONFIG_BOARD_GOOGLE_KRACKO is not set
-# CONFIG_BOARD_GOOGLE_BLIPPER is not set
-# CONFIG_BOARD_GOOGLE_CRET is not set
 # CONFIG_BOARD_GOOGLE_PIRIKA is not set
-# CONFIG_BOARD_GOOGLE_CAPPY2 is not set
-# CONFIG_BOARD_GOOGLE_BUGZZY is not set
-# CONFIG_BOARD_GOOGLE_CORORI is not set
-# CONFIG_BOARD_GOOGLE_DRIBLEE is not set
-# CONFIG_BOARD_GOOGLE_GOOEY is not set
-# CONFIG_BOARD_GOOGLE_BEADRIX is not set
+# CONFIG_BOARD_GOOGLE_SASUKE is not set
+# CONFIG_BOARD_GOOGLE_SASUKETTE is not set
+# CONFIG_BOARD_GOOGLE_STORO is not set
 # CONFIG_BOARD_GOOGLE_SHOTZO is not set
 # CONFIG_BOARD_GOOGLE_TARANZA is not set
-# CONFIG_BOARD_GOOGLE_BOXY is not set
-# CONFIG_BOARD_GOOGLE_DEXI is not set
-# CONFIG_BOARD_GOOGLE_DITA is not set
+# CONFIG_BOARD_GOOGLE_WADDLEDEE is not set
+# CONFIG_BOARD_GOOGLE_WADDLEDOO is not set
+# CONFIG_BOARD_GOOGLE_AWASUKI is not set
 
 #
 # Drallion
@@ -310,6 +332,11 @@ CONFIG_SPI_FLASH_WINBOND=y
 #
 # CONFIG_BOARD_GOOGLE_EVE is not set
 
+#
+# Fatcat
+#
+# CONFIG_BOARD_GOOGLE_FATCAT is not set
+
 #
 # Fizz
 #
@@ -548,6 +575,11 @@ CONFIG_BOARD_GOOGLE_BOB=y
 # CONFIG_BOARD_GOOGLE_SWANKY is not set
 # CONFIG_BOARD_GOOGLE_WINKY is not set
 
+#
+# Rauru
+#
+# CONFIG_BOARD_GOOGLE_RAURU is not set
+
 #
 # Reef
 #
@@ -560,18 +592,19 @@ CONFIG_BOARD_GOOGLE_BOB=y
 #
 # Rex
 #
-# CONFIG_BOARD_GOOGLE_REX0 is not set
-# CONFIG_BOARD_GOOGLE_SCREEBO is not set
-# CONFIG_BOARD_GOOGLE_SCREEBO4ES is not set
-# CONFIG_BOARD_GOOGLE_KARIS is not set
-# CONFIG_BOARD_GOOGLE_KARIS4ES is not set
-# CONFIG_BOARD_GOOGLE_REX_EC_ISH is not set
-# CONFIG_BOARD_GOOGLE_OVIS is not set
-# CONFIG_BOARD_GOOGLE_OVIS4ES is not set
 # CONFIG_BOARD_GOOGLE_DEKU is not set
 # CONFIG_BOARD_GOOGLE_DEKU4ES is not set
+# CONFIG_BOARD_GOOGLE_KARIS is not set
+# CONFIG_BOARD_GOOGLE_KARIS4ES is not set
+# CONFIG_BOARD_GOOGLE_OVIS is not set
+# CONFIG_BOARD_GOOGLE_OVIS4ES is not set
+# CONFIG_BOARD_GOOGLE_REX0 is not set
+# CONFIG_BOARD_GOOGLE_REX_EC_ISH is not set
 # CONFIG_BOARD_GOOGLE_REX4ES is not set
 # CONFIG_BOARD_GOOGLE_REX4ES_EC_ISH is not set
+# CONFIG_BOARD_GOOGLE_REX64 is not set
+# CONFIG_BOARD_GOOGLE_SCREEBO is not set
+# CONFIG_BOARD_GOOGLE_SCREEBO4ES is not set
 
 #
 # Sarien
@@ -686,6 +719,7 @@ CONFIG_BOARD_GOOGLE_BOB=y
 CONFIG_DRIVER_TPM_SPI_BUS=0x0
 CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS=0x5
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_DRIVER_TPM_I2C_BUS=0x0
 CONFIG_DRIVER_TPM_I2C_ADDR=0x20
 CONFIG_PMIC_BUS=-1
@@ -693,14 +727,19 @@ CONFIG_BOARD_GOOGLE_GRU_COMMON=y
 CONFIG_GRU_HAS_TPM2=y
 CONFIG_GRU_HAS_CENTERLOG_PWM=y
 CONFIG_GRU_HAS_WLAN_RESET=y
-CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME=""
 CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US=0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_DRIVER_TPM_SPI_CHIP=0
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -769,9 +808,8 @@ CONFIG_EC_GOOGLE_CHROMEEC=y
 CONFIG_EC_GOOGLE_CHROMEEC_SPI=y
 CONFIG_EC_GOOGLE_CHROMEEC_SPI_CHIP=0x0
 CONFIG_EC_GOOGLE_CHROMEEC_RTC=y
-CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_NONE=y
 # CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL is not set
-# CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_BUILTIN is not set
+# CONFIG_EC_GOOGLE_CHROMEEC_AUTO_FAN_CTRL is not set
 CONFIG_MAINBOARD_HAS_CHROMEOS=y
 
 #
@@ -789,6 +827,7 @@ CONFIG_ARCH_VERSTAGE_ARMV8_64=y
 CONFIG_ARCH_ROMSTAGE_ARMV8_64=y
 CONFIG_ARCH_RAMSTAGE_ARMV8_64=y
 CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE=y
+# CONFIG_ARM64_BL31_OPTEE_WITH_SMC is not set
 # end of Chipset
 
 #
@@ -861,7 +900,7 @@ CONFIG_CR50_RESET_CLEAR_EC_AP_IDLE_FLAG=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
+# CONFIG_TPM1 is not set
 CONFIG_TPM2=y
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM2=y
@@ -890,7 +929,6 @@ CONFIG_ACPI_CUSTOM_MADT=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -933,6 +971,7 @@ CONFIG_HAVE_MONOTONIC_TIMER=y
 #
 # System tables
 #
+# CONFIG_GENERATE_SMBIOS_TABLES is not set
 # end of System tables
 
 #
diff --git a/config/coreboot/gru_kevin/config/libgfxinit_corebootfb b/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
index 0b836026..be585271 100644
--- a/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
+++ b/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -32,7 +31,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_CBMEM_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -50,8 +48,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -62,11 +60,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 CONFIG_VENDOR_GOOGLE=y
@@ -88,6 +88,7 @@ CONFIG_VENDOR_GOOGLE=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -116,13 +117,13 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 # CONFIG_CHROMEOS is not set
 CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=1
 CONFIG_CONSOLE_SERIAL_UART_ADDRESS=0xFF1A0000
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_MEMLAYOUT_LD_FILE="src/soc/rockchip/rk3399/memlayout.ld"
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_ARM64_CURRENT_EL=3
 CONFIG_SPI_FLASH_WINBOND=y
 
 #
@@ -155,6 +156,9 @@ CONFIG_SPI_FLASH_WINBOND=y
 # Brox
 #
 # CONFIG_BOARD_GOOGLE_BROX is not set
+# CONFIG_BOARD_GOOGLE_BROX_EC_ISH is not set
+# CONFIG_BOARD_GOOGLE_LOTSO is not set
+# CONFIG_BOARD_GOOGLE_GREENBAYUPOC is not set
 
 #
 # Brya
@@ -162,6 +166,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_AGAH is not set
 # CONFIG_BOARD_GOOGLE_ANAHERA is not set
 # CONFIG_BOARD_GOOGLE_ANAHERA4ES is not set
+# CONFIG_BOARD_GOOGLE_ANRAGGAR is not set
 # CONFIG_BOARD_GOOGLE_AURASH is not set
 # CONFIG_BOARD_GOOGLE_BANSHEE is not set
 # CONFIG_BOARD_GOOGLE_BRASK is not set
@@ -170,11 +175,14 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_CRAASKOV is not set
 # CONFIG_BOARD_GOOGLE_CONSTITUTION is not set
 # CONFIG_BOARD_GOOGLE_CROTA is not set
+# CONFIG_BOARD_GOOGLE_DOCHI is not set
+# CONFIG_BOARD_GOOGLE_DOMIKA is not set
 # CONFIG_BOARD_GOOGLE_FELWINTER is not set
 # CONFIG_BOARD_GOOGLE_GAELIN is not set
 # CONFIG_BOARD_GOOGLE_GIMBLE is not set
 # CONFIG_BOARD_GOOGLE_GIMBLE4ES is not set
 # CONFIG_BOARD_GOOGLE_GLADIOS is not set
+# CONFIG_BOARD_GOOGLE_GLASSWAY is not set
 # CONFIG_BOARD_GOOGLE_GOTHRAX is not set
 # CONFIG_BOARD_GOOGLE_HADES is not set
 # CONFIG_BOARD_GOOGLE_KANO is not set
@@ -187,6 +195,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_MOLI is not set
 # CONFIG_BOARD_GOOGLE_NIVVIKS is not set
 # CONFIG_BOARD_GOOGLE_NEREID is not set
+# CONFIG_BOARD_GOOGLE_NOKRIS is not set
 # CONFIG_BOARD_GOOGLE_OMNIGUL is not set
 # CONFIG_BOARD_GOOGLE_OSIRIS is not set
 # CONFIG_BOARD_GOOGLE_PIRRHA is not set
@@ -195,11 +204,15 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_QUANDISO is not set
 # CONFIG_BOARD_GOOGLE_REDRIX is not set
 # CONFIG_BOARD_GOOGLE_REDRIX4ES is not set
+# CONFIG_BOARD_GOOGLE_RIVEN is not set
 # CONFIG_BOARD_GOOGLE_SKOLAS is not set
 # CONFIG_BOARD_GOOGLE_SKOLAS4ES is not set
 # CONFIG_BOARD_GOOGLE_TAEKO is not set
 # CONFIG_BOARD_GOOGLE_TAEKO4ES is not set
 # CONFIG_BOARD_GOOGLE_TANIKS is not set
+# CONFIG_BOARD_GOOGLE_TEREID is not set
+# CONFIG_BOARD_GOOGLE_TIVVIKS is not set
+# CONFIG_BOARD_GOOGLE_TRULO is not set
 # CONFIG_BOARD_GOOGLE_ULDREN is not set
 # CONFIG_BOARD_GOOGLE_VELL is not set
 # CONFIG_BOARD_GOOGLE_VOLMAR is not set
@@ -207,10 +220,13 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_YAVIKS is not set
 # CONFIG_BOARD_GOOGLE_YAVILLA is not set
 # CONFIG_BOARD_GOOGLE_ZYDRON is not set
-# CONFIG_BOARD_GOOGLE_NOKRIS is not set
-# CONFIG_BOARD_GOOGLE_DOCHI is not set
-# CONFIG_BOARD_GOOGLE_ANRAGGAR is not set
 # CONFIG_BOARD_GOOGLE_XOL is not set
+# CONFIG_BOARD_GOOGLE_NOVA is not set
+# CONFIG_BOARD_GOOGLE_BUJIA is not set
+# CONFIG_BOARD_GOOGLE_YAVISTA is not set
+# CONFIG_BOARD_GOOGLE_SUNDANCE is not set
+# CONFIG_BOARD_GOOGLE_PUJJOGA is not set
+# CONFIG_BOARD_GOOGLE_ORISA is not set
 
 #
 # Butterfly
@@ -228,22 +244,27 @@ CONFIG_SPI_FLASH_WINBOND=y
 # Kingler
 #
 # CONFIG_BOARD_GOOGLE_KINGLER is not set
+# CONFIG_BOARD_GOOGLE_KYOGRE is not set
+# CONFIG_BOARD_GOOGLE_PONYTA is not set
+# CONFIG_BOARD_GOOGLE_SQUIRTLE is not set
 # CONFIG_BOARD_GOOGLE_STEELIX is not set
 # CONFIG_BOARD_GOOGLE_VOLTORB is not set
-# CONFIG_BOARD_GOOGLE_PONYTA is not set
 
 #
 # Krabby
 #
-# CONFIG_BOARD_GOOGLE_KRABBY is not set
-# CONFIG_BOARD_GOOGLE_TENTACRUEL is not set
-# CONFIG_BOARD_GOOGLE_MAGIKARP is not set
 # CONFIG_BOARD_GOOGLE_CHINCHOU is not set
+# CONFIG_BOARD_GOOGLE_KRABBY is not set
+# CONFIG_BOARD_GOOGLE_MAGIKARP is not set
+# CONFIG_BOARD_GOOGLE_SKITTY is not set
+# CONFIG_BOARD_GOOGLE_TENTACRUEL is not set
+# CONFIG_BOARD_GOOGLE_VELUZA is not set
 
 #
 # Staryu
 #
 # CONFIG_BOARD_GOOGLE_STARMIE is not set
+# CONFIG_BOARD_GOOGLE_WUGTRIO is not set
 
 #
 # Cyan
@@ -268,37 +289,38 @@ CONFIG_SPI_FLASH_WINBOND=y
 #
 # Dedede
 #
+# CONFIG_BOARD_GOOGLE_BEADRIX is not set
+# CONFIG_BOARD_GOOGLE_BLIPPER is not set
 # CONFIG_BOARD_GOOGLE_BOTEN is not set
-# CONFIG_BOARD_GOOGLE_DIBBI is not set
+# CONFIG_BOARD_GOOGLE_BOXY is not set
+# CONFIG_BOARD_GOOGLE_BUGZZY is not set
+# CONFIG_BOARD_GOOGLE_CAPPY2 is not set
+# CONFIG_BOARD_GOOGLE_CORORI is not set
+# CONFIG_BOARD_GOOGLE_CRET is not set
 # CONFIG_BOARD_GOOGLE_DEDEDE is not set
+# CONFIG_BOARD_GOOGLE_DEXI is not set
+# CONFIG_BOARD_GOOGLE_DIBBI is not set
+# CONFIG_BOARD_GOOGLE_DITA is not set
 # CONFIG_BOARD_GOOGLE_DRAWCIA is not set
+# CONFIG_BOARD_GOOGLE_DRIBLEE is not set
+# CONFIG_BOARD_GOOGLE_GALTIC is not set
+# CONFIG_BOARD_GOOGLE_GOOEY is not set
 # CONFIG_BOARD_GOOGLE_HABOKI is not set
-# CONFIG_BOARD_GOOGLE_MADOO is not set
-# CONFIG_BOARD_GOOGLE_WADDLEDOO is not set
-# CONFIG_BOARD_GOOGLE_WADDLEDEE is not set
+# CONFIG_BOARD_GOOGLE_KRACKO is not set
 # CONFIG_BOARD_GOOGLE_LALALA is not set
+# CONFIG_BOARD_GOOGLE_LANTIS is not set
+# CONFIG_BOARD_GOOGLE_MADOO is not set
 # CONFIG_BOARD_GOOGLE_MAGOLOR is not set
 # CONFIG_BOARD_GOOGLE_METAKNIGHT is not set
-# CONFIG_BOARD_GOOGLE_LANTIS is not set
-# CONFIG_BOARD_GOOGLE_GALTIC is not set
-# CONFIG_BOARD_GOOGLE_SASUKE is not set
-# CONFIG_BOARD_GOOGLE_STORO is not set
-# CONFIG_BOARD_GOOGLE_SASUKETTE is not set
-# CONFIG_BOARD_GOOGLE_KRACKO is not set
-# CONFIG_BOARD_GOOGLE_BLIPPER is not set
-# CONFIG_BOARD_GOOGLE_CRET is not set
 # CONFIG_BOARD_GOOGLE_PIRIKA is not set
-# CONFIG_BOARD_GOOGLE_CAPPY2 is not set
-# CONFIG_BOARD_GOOGLE_BUGZZY is not set
-# CONFIG_BOARD_GOOGLE_CORORI is not set
-# CONFIG_BOARD_GOOGLE_DRIBLEE is not set
-# CONFIG_BOARD_GOOGLE_GOOEY is not set
-# CONFIG_BOARD_GOOGLE_BEADRIX is not set
+# CONFIG_BOARD_GOOGLE_SASUKE is not set
+# CONFIG_BOARD_GOOGLE_SASUKETTE is not set
+# CONFIG_BOARD_GOOGLE_STORO is not set
 # CONFIG_BOARD_GOOGLE_SHOTZO is not set
 # CONFIG_BOARD_GOOGLE_TARANZA is not set
-# CONFIG_BOARD_GOOGLE_BOXY is not set
-# CONFIG_BOARD_GOOGLE_DEXI is not set
-# CONFIG_BOARD_GOOGLE_DITA is not set
+# CONFIG_BOARD_GOOGLE_WADDLEDEE is not set
+# CONFIG_BOARD_GOOGLE_WADDLEDOO is not set
+# CONFIG_BOARD_GOOGLE_AWASUKI is not set
 
 #
 # Drallion
@@ -310,6 +332,11 @@ CONFIG_SPI_FLASH_WINBOND=y
 #
 # CONFIG_BOARD_GOOGLE_EVE is not set
 
+#
+# Fatcat
+#
+# CONFIG_BOARD_GOOGLE_FATCAT is not set
+
 #
 # Fizz
 #
@@ -548,6 +575,11 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
 # CONFIG_BOARD_GOOGLE_SWANKY is not set
 # CONFIG_BOARD_GOOGLE_WINKY is not set
 
+#
+# Rauru
+#
+# CONFIG_BOARD_GOOGLE_RAURU is not set
+
 #
 # Reef
 #
@@ -560,18 +592,19 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
 #
 # Rex
 #
-# CONFIG_BOARD_GOOGLE_REX0 is not set
-# CONFIG_BOARD_GOOGLE_SCREEBO is not set
-# CONFIG_BOARD_GOOGLE_SCREEBO4ES is not set
-# CONFIG_BOARD_GOOGLE_KARIS is not set
-# CONFIG_BOARD_GOOGLE_KARIS4ES is not set
-# CONFIG_BOARD_GOOGLE_REX_EC_ISH is not set
-# CONFIG_BOARD_GOOGLE_OVIS is not set
-# CONFIG_BOARD_GOOGLE_OVIS4ES is not set
 # CONFIG_BOARD_GOOGLE_DEKU is not set
 # CONFIG_BOARD_GOOGLE_DEKU4ES is not set
+# CONFIG_BOARD_GOOGLE_KARIS is not set
+# CONFIG_BOARD_GOOGLE_KARIS4ES is not set
+# CONFIG_BOARD_GOOGLE_OVIS is not set
+# CONFIG_BOARD_GOOGLE_OVIS4ES is not set
+# CONFIG_BOARD_GOOGLE_REX0 is not set
+# CONFIG_BOARD_GOOGLE_REX_EC_ISH is not set
 # CONFIG_BOARD_GOOGLE_REX4ES is not set
 # CONFIG_BOARD_GOOGLE_REX4ES_EC_ISH is not set
+# CONFIG_BOARD_GOOGLE_REX64 is not set
+# CONFIG_BOARD_GOOGLE_SCREEBO is not set
+# CONFIG_BOARD_GOOGLE_SCREEBO4ES is not set
 
 #
 # Sarien
@@ -686,6 +719,7 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
 CONFIG_DRIVER_TPM_SPI_BUS=0x0
 CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS=0x5
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_DRIVER_TPM_I2C_BUS=0x0
 CONFIG_DRIVER_TPM_I2C_ADDR=0x20
 CONFIG_PMIC_BUS=-1
@@ -693,14 +727,19 @@ CONFIG_BOARD_GOOGLE_GRU_COMMON=y
 # CONFIG_GRU_HAS_TPM2 is not set
 CONFIG_GRU_HAS_CENTERLOG_PWM=y
 CONFIG_GRU_HAS_WLAN_RESET=y
-CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME=""
 CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US=0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -768,9 +807,8 @@ CONFIG_EC_GOOGLE_CHROMEEC=y
 CONFIG_EC_GOOGLE_CHROMEEC_SPI=y
 CONFIG_EC_GOOGLE_CHROMEEC_SPI_CHIP=0x0
 CONFIG_EC_GOOGLE_CHROMEEC_RTC=y
-CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_NONE=y
 # CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL is not set
-# CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_BUILTIN is not set
+# CONFIG_EC_GOOGLE_CHROMEEC_AUTO_FAN_CTRL is not set
 CONFIG_MAINBOARD_HAS_CHROMEOS=y
 
 #
@@ -788,6 +826,7 @@ CONFIG_ARCH_VERSTAGE_ARMV8_64=y
 CONFIG_ARCH_ROMSTAGE_ARMV8_64=y
 CONFIG_ARCH_RAMSTAGE_ARMV8_64=y
 CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE=y
+# CONFIG_ARM64_BL31_OPTEE_WITH_SMC is not set
 # end of Chipset
 
 #
@@ -857,8 +896,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -887,7 +926,6 @@ CONFIG_ACPI_CUSTOM_MADT=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -930,6 +968,7 @@ CONFIG_HAVE_MONOTONIC_TIMER=y
 #
 # System tables
 #
+# CONFIG_GENERATE_SMBIOS_TABLES is not set
 # end of System tables
 
 #
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
index bb4340b1..d51bf0f8 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,18 +128,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="2170p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=0
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=0
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -156,6 +159,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_BOARD_HP_2170P=y
@@ -187,15 +192,18 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -238,9 +246,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -250,7 +259,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -281,6 +289,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -345,6 +354,7 @@ CONFIG_SUPERIO_SMSC_LPC47N217=y
 #
 # Embedded Controllers
 #
+CONFIG_EC_ACPI=y
 CONFIG_EC_HP_KBC1126=y
 
 #
@@ -378,7 +388,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -393,6 +403,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -496,6 +507,7 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -516,8 +528,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -556,7 +568,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
index c590be38..8983c8d1 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="2170p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=0
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=0
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_BOARD_HP_2170P=y
@@ -185,15 +190,18 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -236,9 +244,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -248,7 +257,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -279,6 +287,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -343,6 +352,7 @@ CONFIG_SUPERIO_SMSC_LPC47N217=y
 #
 # Embedded Controllers
 #
+CONFIG_EC_ACPI=y
 CONFIG_EC_HP_KBC1126=y
 
 #
@@ -376,7 +386,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -391,6 +401,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -493,6 +504,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -513,8 +525,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -553,7 +565,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
index 0bfb67e3..b238d1b0 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="2560p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -185,14 +190,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -235,9 +243,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -247,7 +256,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -278,6 +286,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -341,6 +350,7 @@ CONFIG_RCBA_LENGTH=0x4000
 #
 # Embedded Controllers
 #
+CONFIG_EC_ACPI=y
 CONFIG_EC_HP_KBC1126=y
 
 #
@@ -374,7 +384,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -389,6 +399,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -490,6 +501,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -510,8 +523,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -550,7 +563,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
index c4d9a3f9..8a65a765 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -123,18 +124,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="2560p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -183,14 +188,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -233,9 +241,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -245,7 +254,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -276,6 +284,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -339,6 +348,7 @@ CONFIG_RCBA_LENGTH=0x4000
 #
 # Embedded Controllers
 #
+CONFIG_EC_ACPI=y
 CONFIG_EC_HP_KBC1126=y
 
 #
@@ -372,7 +382,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -387,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -487,6 +498,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -507,8 +520,8 @@ CONFIG_VGA=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -547,7 +560,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
index 83ad2690..7cb7ec72 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,17 +126,19 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="2570p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -162,6 +166,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -184,14 +189,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -234,9 +242,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -246,7 +255,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -277,6 +285,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -340,6 +349,7 @@ CONFIG_RCBA_LENGTH=0x4000
 #
 # Embedded Controllers
 #
+CONFIG_EC_ACPI=y
 CONFIG_EC_HP_KBC1126=y
 
 #
@@ -373,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -388,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -484,6 +495,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -504,8 +517,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -544,7 +557,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
index 3e14d81a..1ba19c1d 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -123,17 +124,19 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="2570p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,6 +154,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -160,6 +164,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -182,14 +187,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -232,9 +240,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -244,7 +253,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -275,6 +283,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -338,6 +347,7 @@ CONFIG_RCBA_LENGTH=0x4000
 #
 # Embedded Controllers
 #
+CONFIG_EC_ACPI=y
 CONFIG_EC_HP_KBC1126=y
 
 #
@@ -371,7 +381,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -386,6 +396,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -481,6 +492,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -501,8 +514,8 @@ CONFIG_VGA=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -541,7 +554,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
index 340efb5e..fee1b405 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd_4mb"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -182,15 +187,18 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -231,9 +239,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -243,7 +252,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -274,6 +282,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -360,7 +369,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -375,6 +384,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -475,6 +485,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -495,8 +507,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -535,7 +547,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
index 4b0f5922..8ec24130 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -123,18 +124,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd_4mb"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -180,15 +185,18 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -229,9 +237,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -241,7 +250,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -272,6 +280,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -358,7 +367,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -373,6 +382,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -472,6 +482,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -492,8 +504,8 @@ CONFIG_VGA=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -532,7 +544,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
index 0bcfdd0e..7adc1b3b 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -182,15 +187,18 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -231,9 +239,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -243,7 +252,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -274,6 +282,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -360,7 +369,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -375,6 +384,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -475,6 +485,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -495,8 +507,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -535,7 +547,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
index 2fa0b57f..fe2ed050 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -123,18 +124,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -180,15 +185,18 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -229,9 +237,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -241,7 +250,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -272,6 +280,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -358,7 +367,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -373,6 +382,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -472,6 +482,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -492,8 +504,8 @@ CONFIG_VGA=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -532,7 +544,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb b/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
index 6c0c06ec..16bf95e9 100644
--- a/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -36,7 +35,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,8 +52,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -66,11 +64,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -92,6 +92,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -126,14 +127,16 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_ME_BIN_PATH="../../../vendorfiles/hp820g2/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp820g2/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -178,16 +183,19 @@ CONFIG_EC_HP_KBC1126_GPE=0x6
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2"
 CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -232,6 +240,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xd8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -241,7 +250,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HAVE_MRC=y
 CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
 CONFIG_MRC_BIN_ADDRESS=0xfffa0000
@@ -322,6 +330,7 @@ CONFIG_RCBA_LENGTH=0x4000
 #
 # Embedded Controllers
 #
+CONFIG_EC_ACPI=y
 CONFIG_EC_HP_KBC1126=y
 
 #
@@ -357,6 +366,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -454,6 +464,7 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -474,8 +485,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -515,7 +526,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode b/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
index 705dcf0f..ae46144c 100644
--- a/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -36,7 +35,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,8 +52,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -66,11 +64,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -92,6 +92,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -124,14 +125,16 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,6 +153,7 @@ CONFIG_ME_BIN_PATH="../../../vendorfiles/hp820g2/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp820g2/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -159,6 +163,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -176,16 +181,19 @@ CONFIG_EC_HP_KBC1126_GPE=0x6
 # CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2"
 CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -230,6 +238,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xd8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -239,7 +248,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HAVE_MRC=y
 CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
 CONFIG_MRC_BIN_ADDRESS=0xfffa0000
@@ -320,6 +328,7 @@ CONFIG_RCBA_LENGTH=0x4000
 #
 # Embedded Controllers
 #
+CONFIG_EC_ACPI=y
 CONFIG_EC_HP_KBC1126=y
 
 #
@@ -355,6 +364,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -451,6 +461,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -471,8 +482,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -512,7 +523,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
index 6af76c78..12d0aefd 100644
--- a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -36,7 +35,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,8 +52,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -66,11 +64,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -92,6 +92,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -126,17 +127,19 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -182,16 +187,19 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -232,9 +240,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -244,7 +253,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -275,6 +283,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -361,7 +370,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -376,6 +385,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -474,6 +484,7 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -494,8 +505,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -534,7 +545,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
index 83a7aaa5..cf23e745 100644
--- a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -36,7 +35,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,8 +52,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -66,11 +64,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -92,6 +92,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -124,17 +125,19 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -180,16 +185,19 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -230,9 +238,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -242,7 +251,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -273,6 +281,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -359,7 +368,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -374,6 +383,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -471,6 +481,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -491,8 +502,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -531,7 +542,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
index 02f9e183..c931923e 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -36,7 +35,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,8 +52,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -66,11 +64,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -92,6 +92,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -126,17 +127,19 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -182,16 +187,19 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -232,9 +240,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -244,7 +253,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -275,6 +283,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -361,7 +370,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -376,6 +385,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -474,6 +484,7 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -494,8 +505,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -534,7 +545,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
index dea032d1..6f639aa3 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -36,7 +35,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,8 +52,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -66,11 +64,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -92,6 +92,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -124,17 +125,19 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -180,16 +185,19 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -230,9 +238,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -242,7 +251,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -273,6 +281,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -359,7 +368,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -374,6 +383,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -471,6 +481,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -491,8 +502,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -531,7 +542,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
index cedf4e2e..e6dc0b34 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="8460p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -185,14 +190,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -235,9 +243,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -247,7 +256,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -278,6 +286,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -342,6 +351,7 @@ CONFIG_SUPERIO_SMSC_LPC47N217=y
 #
 # Embedded Controllers
 #
+CONFIG_EC_ACPI=y
 CONFIG_EC_HP_KBC1126=y
 
 #
@@ -375,7 +385,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -390,6 +400,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -491,6 +502,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -511,8 +524,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -551,7 +564,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
index 9da024f0..19d012f2 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -123,18 +124,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="8460p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -183,14 +188,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -233,9 +241,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -245,7 +254,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -276,6 +284,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -340,6 +349,7 @@ CONFIG_SUPERIO_SMSC_LPC47N217=y
 #
 # Embedded Controllers
 #
+CONFIG_EC_ACPI=y
 CONFIG_EC_HP_KBC1126=y
 
 #
@@ -373,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -388,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -488,6 +499,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -508,8 +521,8 @@ CONFIG_VGA=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -548,7 +561,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
index b1f48be0..f4c3c3eb 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,17 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="8470p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -164,6 +168,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -186,15 +191,18 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -237,9 +245,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -249,7 +258,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -280,6 +288,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -344,6 +353,7 @@ CONFIG_SUPERIO_SMSC_LPC47N217=y
 #
 # Embedded Controllers
 #
+CONFIG_EC_ACPI=y
 CONFIG_EC_HP_KBC1126=y
 
 #
@@ -377,7 +387,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -392,6 +402,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -490,6 +501,7 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -510,8 +522,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -550,7 +562,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
index 21243c8d..959016ae 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,17 +126,19 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="8470p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -162,6 +166,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -184,15 +189,18 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -235,9 +243,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -247,7 +256,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -278,6 +286,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -342,6 +351,7 @@ CONFIG_SUPERIO_SMSC_LPC47N217=y
 #
 # Embedded Controllers
 #
+CONFIG_EC_ACPI=y
 CONFIG_EC_HP_KBC1126=y
 
 #
@@ -375,7 +385,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -390,6 +400,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -487,6 +498,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -507,8 +519,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -547,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp8560w_8mb/config/normal b/config/coreboot/hp8560w_8mb/config/normal
index d3e4d52d..c332d78e 100644
--- a/config/coreboot/hp8560w_8mb/config/normal
+++ b/config/coreboot/hp8560w_8mb/config/normal
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -36,7 +35,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,8 +52,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -66,11 +64,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -92,6 +92,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -124,17 +125,19 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="8560w"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -183,14 +188,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -233,9 +241,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -245,7 +254,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -276,6 +284,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -340,6 +349,7 @@ CONFIG_SUPERIO_SMSC_LPC47N217=y
 #
 # Embedded Controllers
 #
+CONFIG_EC_ACPI=y
 CONFIG_EC_HP_KBC1126=y
 
 #
@@ -373,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -388,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -464,6 +475,7 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -484,8 +496,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -524,7 +536,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
index 0e09f0ea..43003291 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="folio_9470m"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=0
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=0
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -185,14 +190,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -235,9 +243,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -247,7 +256,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -278,6 +286,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -341,6 +350,7 @@ CONFIG_RCBA_LENGTH=0x4000
 #
 # Embedded Controllers
 #
+CONFIG_EC_ACPI=y
 CONFIG_EC_HP_KBC1126=y
 
 #
@@ -374,7 +384,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -389,6 +399,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -490,6 +501,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -510,8 +523,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -550,7 +563,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
index d3217fdd..42c7eeba 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -123,18 +124,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="folio_9470m"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=0
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=0
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -183,14 +188,17 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -233,9 +241,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -245,7 +254,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -276,6 +284,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -339,6 +348,7 @@ CONFIG_RCBA_LENGTH=0x4000
 #
 # Embedded Controllers
 #
+CONFIG_EC_ACPI=y
 CONFIG_EC_HP_KBC1126=y
 
 #
@@ -372,7 +382,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -387,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -487,6 +498,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -507,8 +520,8 @@ CONFIG_VGA=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -547,7 +560,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
index 8c435502..909ab29e 100644
--- a/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -33,7 +32,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_CBMEM_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -51,8 +49,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -63,11 +61,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 CONFIG_VENDOR_EMULATION=y
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -89,6 +89,7 @@ CONFIG_VENDOR_EMULATION=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -117,10 +118,12 @@ CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAX_SOCKET=1
 CONFIG_DRAM_SIZE_MB=261120
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_BOARD_EMULATION_QEMU_AARCH64=y
 # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
 # CONFIG_BOARD_EMULATION_QEMU_X86_I440FX is not set
@@ -129,21 +132,28 @@ CONFIG_BOARD_EMULATION_QEMU_AARCH64=y
 # CONFIG_BOARD_EMULATION_QEMU_X86_Q35 is not set
 # CONFIG_BOARD_EMULATION_QEMU_RISCV_RV64 is not set
 # CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set
+# CONFIG_BOARD_EMULATION_QEMU_SBSA is not set
 # CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0x4010000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_PCI_IOBASE=0x3eff0000
 CONFIG_MEMLAYOUT_LD_FILE="src/mainboard/emulation/qemu-aarch64/memlayout.ld"
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_ARM64_CURRENT_EL=3
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -171,6 +181,7 @@ CONFIG_ROM_SIZE=0x00c00000
 # SoC
 #
 CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_ARM64_BL31_EXTERNAL_FILE=""
 CONFIG_ARCH_ARMV8_EXTENSION=0
 CONFIG_STACK_SIZE=0x0
@@ -178,7 +189,6 @@ CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION=y
 CONFIG_GENERIC_UDELAY=y
@@ -217,6 +227,7 @@ CONFIG_ARCH_ROMSTAGE_ARMV8_64=y
 CONFIG_ARCH_RAMSTAGE_ARMV8_64=y
 CONFIG_ARM64_USE_ARCH_TIMER=y
 CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE=y
+# CONFIG_ARM64_BL31_OPTEE_WITH_SMC is not set
 # end of Chipset
 
 #
@@ -272,6 +283,7 @@ CONFIG_DRIVERS_UART_PL011=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -313,7 +325,6 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_CUSTOM_MADT=y
 CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
@@ -357,6 +368,7 @@ CONFIG_HAVE_MONOTONIC_TIMER=y
 #
 # System tables
 #
+# CONFIG_GENERATE_SMBIOS_TABLES is not set
 # end of System tables
 
 #
diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
index 6aa7a4b8..951bd326 100644
--- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -38,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_CBMEM_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -56,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -68,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 CONFIG_VENDOR_EMULATION=y
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -94,6 +94,7 @@ CONFIG_VENDOR_EMULATION=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,13 +128,14 @@ CONFIG_VBOOT_VBNV_OFFSET=0x2c
 CONFIG_IRQ_SLOT_COUNT=6
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="QEMU"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 # CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set
 # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
 CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
@@ -142,6 +144,7 @@ CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
 # CONFIG_BOARD_EMULATION_QEMU_X86_Q35 is not set
 # CONFIG_BOARD_EMULATION_QEMU_RISCV_RV64 is not set
 # CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set
+# CONFIG_BOARD_EMULATION_QEMU_SBSA is not set
 # CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0x10000
@@ -151,18 +154,23 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -193,8 +201,9 @@ CONFIG_CHIPSET_DEVICETREE=""
 CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
@@ -202,7 +211,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
@@ -221,6 +229,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_UNKNOWN_TSC_RATE=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_NO_SMM=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
@@ -254,7 +263,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
 CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
@@ -268,6 +277,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -316,8 +326,9 @@ CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
 CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y
-CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_XRES=800
-CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_YRES=600
+CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y
+CONFIG_DRIVERS_EMULATION_QEMU_XRES=800
+CONFIG_DRIVERS_EMULATION_QEMU_YRES=600
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -331,6 +342,8 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -379,7 +392,6 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
index 91435206..64afd0a0 100644
--- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -38,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_CBMEM_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -56,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -68,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 CONFIG_VENDOR_EMULATION=y
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -94,6 +94,7 @@ CONFIG_VENDOR_EMULATION=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,13 +128,14 @@ CONFIG_VBOOT_VBNV_OFFSET=0x2c
 CONFIG_IRQ_SLOT_COUNT=6
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="QEMU"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 # CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set
 # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
 CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
@@ -142,6 +144,7 @@ CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
 # CONFIG_BOARD_EMULATION_QEMU_X86_Q35 is not set
 # CONFIG_BOARD_EMULATION_QEMU_RISCV_RV64 is not set
 # CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set
+# CONFIG_BOARD_EMULATION_QEMU_SBSA is not set
 # CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0x10000
@@ -151,18 +154,23 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -193,8 +201,9 @@ CONFIG_CHIPSET_DEVICETREE=""
 CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
@@ -202,7 +211,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
@@ -221,6 +229,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_UNKNOWN_TSC_RATE=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_NO_SMM=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
@@ -254,7 +263,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
 CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
@@ -268,6 +277,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -314,6 +324,7 @@ CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
 CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y
+CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -327,6 +338,8 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -375,7 +388,6 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
index 3215ca68..13b0fd5a 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +204,22 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +260,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,7 +271,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +303,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +399,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -490,6 +502,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -542,7 +555,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_txtmode b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
index 4b6b5e6f..cfe25366 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +202,22 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +301,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +381,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -486,6 +498,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -538,7 +551,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
index cd0beb97..70213655 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +204,22 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +260,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,7 +271,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +303,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +399,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -490,6 +502,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -542,7 +555,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_txtmode b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
index 37c7462d..4eda9794 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +202,22 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +301,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +381,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -486,6 +498,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -538,7 +551,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
index 665468d9..cf2abe92 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +204,22 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +260,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,7 +271,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +303,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +399,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -490,6 +502,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -542,7 +555,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_txtmode b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
index 5b6f8870..1eac7a90 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +202,22 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +301,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +381,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -486,6 +498,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -538,7 +551,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
index 1b500abb..d277e12f 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="r500"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd_nogbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -166,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -186,6 +191,7 @@ CONFIG_BOARD_LENOVO_R500=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -197,18 +203,22 @@ CONFIG_BOARD_LENOVO_R500=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -249,8 +259,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -259,7 +270,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -292,6 +302,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -369,7 +380,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -385,6 +396,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -487,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -539,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_txtmode b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
index 5ec9de19..5e38292c 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="r500"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd_nogbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -164,6 +168,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -184,6 +189,7 @@ CONFIG_BOARD_LENOVO_R500=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -195,18 +201,22 @@ CONFIG_BOARD_LENOVO_R500=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -247,8 +257,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -257,7 +268,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -290,6 +300,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -367,7 +378,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -383,6 +394,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -483,6 +495,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -535,7 +548,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index 3128736d..f5fd9edb 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,30 +126,38 @@ CONFIG_DEVICETREE="variants/baseboard/devicetree.cb"
 CONFIG_VARIANT_DIR="precision_t1650"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 CONFIG_BOARD_DELL_PRECISION_T1650=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_WORKSTATIONS=y
 CONFIG_INCLUDE_SMSC_SCH5545_EC_FW=y
 CONFIG_SMSC_SCH5545_EC_FW_FILE="../../../vendorfiles/t1650/sch5545ec.bin"
@@ -169,6 +178,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/t1650/12_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/t1650/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/t1650/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -178,16 +188,19 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -228,9 +241,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -240,7 +254,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -271,6 +284,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -356,7 +370,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -371,6 +385,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -472,6 +487,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -492,8 +508,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -532,7 +548,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
index 4c3fe7d9..43bfafd7 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +204,22 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +260,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,7 +271,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +303,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +399,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -490,6 +502,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -542,7 +555,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_txtmode b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
index e5ef8b70..a6a8be5c 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +202,22 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +301,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +381,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -486,6 +498,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -538,7 +551,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
index 598ee337..d258e8d5 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +204,22 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +260,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,7 +271,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +303,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +399,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -490,6 +502,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -542,7 +555,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_txtmode b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
index 30f21fc1..3f2028e3 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +202,22 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +301,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +381,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -486,6 +498,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -538,7 +551,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
index 5e198ab7..076d088d 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +204,22 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +260,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,7 +271,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +303,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +399,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -490,6 +502,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -542,7 +555,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_txtmode b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
index 1aa474d7..fce03023 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +202,22 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +301,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +381,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -486,6 +498,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -538,7 +551,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
index 2a5b9aca..31a79444 100644
--- a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -126,18 +127,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -156,6 +159,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -168,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -188,6 +193,7 @@ CONFIG_BOARD_LENOVO_T420=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -199,17 +205,21 @@ CONFIG_BOARD_LENOVO_T420=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -252,9 +262,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -264,7 +275,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -295,6 +305,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -387,7 +398,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -402,6 +413,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -506,6 +518,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_DRIVERS_RICOH_RCE822=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -526,8 +540,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -566,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
index bfe34d36..21d4a5ff 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -126,18 +127,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -156,6 +159,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -168,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -188,6 +193,7 @@ CONFIG_BOARD_LENOVO_T420S=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -199,17 +205,21 @@ CONFIG_BOARD_LENOVO_T420S=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -252,9 +262,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -264,7 +275,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -295,6 +305,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -387,7 +398,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -402,6 +413,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -505,6 +517,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -525,8 +539,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -565,7 +579,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
index b1cfe169..6f060940 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -124,18 +125,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -166,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -186,6 +191,7 @@ CONFIG_BOARD_LENOVO_T420S=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -197,17 +203,21 @@ CONFIG_BOARD_LENOVO_T420S=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -250,9 +260,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -262,7 +273,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -293,6 +303,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -385,7 +396,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -400,6 +411,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -502,6 +514,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -522,8 +536,8 @@ CONFIG_VGA=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -562,7 +576,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
index a293e1dd..62fbf932 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -126,18 +127,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +204,22 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -252,9 +262,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -264,7 +275,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -295,6 +305,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -387,7 +398,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -402,6 +413,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -506,6 +518,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_DRIVERS_RICOH_RCE822=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -526,8 +540,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -566,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_txtmode b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
index bbd70386..5610ea5e 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -124,18 +125,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +202,22 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -250,9 +260,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -262,7 +273,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -293,6 +303,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -385,7 +396,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -400,6 +411,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -503,6 +515,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 CONFIG_DRIVERS_RICOH_RCE822=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -523,8 +537,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -563,7 +577,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
index 4b1d2147..76083169 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +204,22 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +260,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,7 +271,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +303,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +399,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -490,6 +502,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -542,7 +555,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_txtmode b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
index 243d6bf0..ce75ce58 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +202,22 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +301,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +381,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -486,6 +498,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -538,7 +551,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
index 7704b0e0..c04e512b 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +204,22 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +260,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,7 +271,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +303,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +399,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -490,6 +502,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -542,7 +555,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_txtmode b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
index 5b5b323c..e6b554de 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +202,22 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +301,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +381,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -486,6 +498,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -538,7 +551,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
index dcac539e..d9695250 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +204,22 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +260,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,7 +271,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +303,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +399,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -490,6 +502,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -542,7 +555,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_txtmode b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
index 081b6a0a..8d7ecfec 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +202,22 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +301,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +381,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -486,6 +498,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -538,7 +551,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
index bc3ef394..c83c43ba 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -126,18 +127,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t520"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -156,6 +159,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -168,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -188,6 +193,7 @@ CONFIG_BOARD_LENOVO_T520=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -199,18 +205,22 @@ CONFIG_BOARD_LENOVO_T520=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_BOARD_LENOVO_BASEBOARD_T520=y
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -253,9 +263,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -265,7 +276,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -296,6 +306,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -388,7 +399,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -403,6 +414,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -506,6 +518,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -526,8 +540,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -566,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_txtmode b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
index 8c8a6145..de062a35 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -124,18 +125,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t520"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -166,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -186,6 +191,7 @@ CONFIG_BOARD_LENOVO_T520=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -197,18 +203,22 @@ CONFIG_BOARD_LENOVO_T520=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_BOARD_LENOVO_BASEBOARD_T520=y
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -251,9 +261,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -263,7 +274,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -294,6 +304,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -386,7 +397,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -401,6 +412,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -503,6 +515,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -523,8 +537,8 @@ CONFIG_VGA=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -563,7 +577,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
index 0d3a372a..2558ee17 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -126,18 +127,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t530"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_T530=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,19 +204,23 @@ CONFIG_BOARD_LENOVO_T530=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_BOARD_LENOVO_BASEBOARD_T530=y
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -253,9 +263,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -265,7 +276,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -296,6 +306,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -388,7 +399,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -403,6 +414,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -507,6 +519,7 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -527,8 +540,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -567,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_txtmode b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
index fc8c903f..999b6632 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -124,18 +125,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t530"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_T530=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,19 +202,23 @@ CONFIG_BOARD_LENOVO_T530=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_BOARD_LENOVO_BASEBOARD_T530=y
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -251,9 +261,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -263,7 +274,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -294,6 +304,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -386,7 +397,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -401,6 +412,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -504,6 +516,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -524,8 +537,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -564,7 +577,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
index cc011456..3e929c85 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +204,22 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +260,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,7 +271,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +303,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +399,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -490,6 +502,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -542,7 +555,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_txtmode b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
index d63b87ea..e65abef7 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +202,22 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +301,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +381,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -486,6 +498,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -538,7 +551,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
index 7b1a2903..7b5733ee 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +204,22 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +260,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,7 +271,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +303,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +399,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -490,6 +502,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -542,7 +555,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_txtmode b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
index 53e1a547..7af28108 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +202,22 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +301,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +381,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -486,6 +498,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -538,7 +551,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
index 1e44e5c2..f050f1aa 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +204,22 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +260,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,7 +271,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +303,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +399,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -490,6 +502,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -542,7 +555,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_txtmode b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
index d7066e43..41517ef0 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +202,22 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +301,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +381,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -486,6 +498,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -538,7 +551,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
index 16127d90..869e0a4b 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -126,18 +127,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="w530"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_W530=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,19 +204,23 @@ CONFIG_BOARD_LENOVO_W530=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_BOARD_LENOVO_BASEBOARD_T530=y
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -253,9 +263,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -265,7 +276,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -296,6 +306,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -388,7 +399,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -403,6 +414,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -508,6 +520,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_DRIVERS_RICOH_RCE822=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -528,8 +541,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -568,7 +581,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_txtmode b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
index 13cfb5d9..3d247345 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -124,18 +125,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="w530"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_W530=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,19 +202,23 @@ CONFIG_BOARD_LENOVO_W530=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_BOARD_LENOVO_BASEBOARD_T530=y
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -251,9 +261,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -263,7 +274,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -294,6 +304,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -386,7 +397,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -401,6 +412,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -505,6 +517,7 @@ CONFIG_VGA=y
 CONFIG_DRIVERS_RICOH_RCE822=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -525,8 +538,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -565,7 +578,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
index 6dcc4bca..88339de4 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x200"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 CONFIG_BOARD_LENOVO_X200=y
@@ -196,17 +202,21 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -247,8 +257,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -257,7 +268,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -289,6 +299,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -367,7 +378,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -382,6 +393,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -487,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -539,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_txtmode b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
index a7c23af7..f74b382d 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,16 +126,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x200"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,6 +154,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -183,6 +188,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 CONFIG_BOARD_LENOVO_X200=y
@@ -194,17 +200,21 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -245,8 +255,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -255,7 +266,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -287,6 +297,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -365,7 +376,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -380,6 +391,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -483,6 +495,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -535,7 +548,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
index b522fff3..33320bc5 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x200"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 CONFIG_BOARD_LENOVO_X200=y
@@ -196,17 +202,21 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -247,8 +257,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -257,7 +268,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -289,6 +299,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -367,7 +378,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -382,6 +393,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -487,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -539,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_txtmode b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
index e7d4a538..ba2c3c41 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,16 +126,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x200"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,6 +154,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -183,6 +188,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 CONFIG_BOARD_LENOVO_X200=y
@@ -194,17 +200,21 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -245,8 +255,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -255,7 +266,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -287,6 +297,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -365,7 +376,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -380,6 +391,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -483,6 +495,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -535,7 +548,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
index 12e8cb6e..82a34881 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x200"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 CONFIG_BOARD_LENOVO_X200=y
@@ -196,17 +202,21 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -247,8 +257,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -257,7 +268,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -289,6 +299,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -367,7 +378,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -382,6 +393,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -487,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -539,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_txtmode b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
index ca608667..e73d9800 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,16 +126,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x200"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,6 +154,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -183,6 +188,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 CONFIG_BOARD_LENOVO_X200=y
@@ -194,17 +200,21 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -245,8 +255,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -255,7 +266,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -287,6 +297,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -365,7 +376,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -380,6 +391,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -483,6 +495,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -535,7 +548,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
index 3aaac0c4..9661ff3c 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,18 +128,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x220"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -157,6 +160,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -169,6 +173,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -189,6 +194,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -200,17 +206,21 @@ CONFIG_BOARD_LENOVO_X220=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -253,9 +263,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -265,7 +276,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -296,6 +306,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -388,7 +399,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -403,6 +414,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -506,6 +518,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_DRIVERS_RICOH_RCE822=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -526,8 +540,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -566,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_txtmode b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
index 0e679481..089c3e0b 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x220"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,17 +204,21 @@ CONFIG_BOARD_LENOVO_X220=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -251,9 +261,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -263,7 +274,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -294,6 +304,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -386,7 +397,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -401,6 +412,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -503,6 +515,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 CONFIG_DRIVERS_RICOH_RCE822=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -523,8 +537,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -563,7 +577,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
index 72e1d756..b2efa38a 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,18 +128,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -156,6 +159,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -168,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -188,6 +193,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -199,18 +205,22 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -253,9 +263,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -265,7 +276,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -296,6 +306,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -388,7 +399,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -403,6 +414,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -506,6 +518,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_DRIVERS_RICOH_RCE822=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -526,8 +540,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -566,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_txtmode b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
index d8fa1e98..f92b4ace 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -166,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -186,6 +191,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -197,18 +203,22 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -251,9 +261,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -263,7 +274,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -294,6 +304,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -386,7 +397,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -401,6 +412,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -503,6 +515,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 CONFIG_DRIVERS_RICOH_RCE822=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -523,8 +537,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -563,7 +577,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
index 2de1cb4a..1bd1259b 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,18 +128,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -156,6 +159,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -168,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -188,6 +193,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -199,18 +205,22 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -253,9 +263,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -265,7 +276,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -296,6 +306,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -388,7 +399,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -403,6 +414,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -506,6 +518,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_DRIVERS_RICOH_RCE822=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -526,8 +540,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -566,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_txtmode b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
index daaae9f4..93511360 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -166,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -186,6 +191,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -197,18 +203,22 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -251,9 +261,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -263,7 +274,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -294,6 +304,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -386,7 +397,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -401,6 +412,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -503,6 +515,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 CONFIG_DRIVERS_RICOH_RCE822=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -523,8 +537,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -563,7 +577,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
index ca11d165..94bc6d0b 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,18 +128,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -156,6 +159,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -168,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -188,6 +193,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -199,18 +205,22 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X230 is not set
 CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -253,9 +263,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -265,7 +276,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -296,6 +306,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -388,7 +399,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -403,6 +414,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -506,6 +518,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_DRIVERS_RICOH_RCE822=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -526,8 +540,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -566,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
index bad2ecd6..98a489a6 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -166,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -186,6 +191,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -197,18 +203,22 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X230 is not set
 CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -251,9 +261,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -263,7 +274,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -294,6 +304,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -386,7 +397,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -401,6 +412,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -503,6 +515,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 CONFIG_DRIVERS_RICOH_RCE822=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -523,8 +537,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -563,7 +577,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
index c98c70d5..94a44d3a 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,18 +128,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -156,6 +159,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -168,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -188,6 +193,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -199,18 +205,22 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X230 is not set
 CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -253,9 +263,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -265,7 +276,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -296,6 +306,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -388,7 +399,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -403,6 +414,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -506,6 +518,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_DRIVERS_RICOH_RCE822=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -526,8 +540,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -566,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
index c0d848d0..6cf264f6 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -166,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -186,6 +191,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -197,18 +203,22 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X230 is not set
 CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -251,9 +261,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_TSEG_SIZE=0x800000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -263,7 +274,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -294,6 +304,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -386,7 +397,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -401,6 +412,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -503,6 +515,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 CONFIG_DRIVERS_RICOH_RCE822=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -523,8 +537,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
@@ -563,7 +577,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
index 61fedae8..b066681e 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x301"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,17 +202,21 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -247,8 +257,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -257,7 +268,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -289,6 +299,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -367,7 +378,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -382,6 +393,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -487,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -539,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_txtmode b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
index d5c24416..36942c01 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,16 +126,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x301"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,6 +154,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -183,6 +188,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -194,17 +200,21 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -245,8 +255,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -255,7 +266,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -287,6 +297,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -365,7 +376,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -380,6 +391,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -483,6 +495,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -535,7 +548,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
index 02a910d7..e5931f9e 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x301"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,17 +202,21 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -247,8 +257,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -257,7 +268,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -289,6 +299,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -367,7 +378,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -382,6 +393,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -487,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -539,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_txtmode b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
index f6652cfc..e1eb3b54 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,16 +126,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x301"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,6 +154,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -183,6 +188,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -194,17 +200,21 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -245,8 +255,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -255,7 +266,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -287,6 +297,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -365,7 +376,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -380,6 +391,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -483,6 +495,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -535,7 +548,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
index d800eed3..9c2af247 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x301"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,17 +202,21 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -247,8 +257,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -257,7 +268,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -289,6 +299,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -367,7 +378,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -382,6 +393,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -487,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -539,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_txtmode b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
index ef88107c..ba96860c 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,16 +126,18 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="x301"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,6 +154,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -183,6 +188,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -194,17 +200,21 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_8192=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -245,8 +255,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -255,7 +266,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -287,6 +297,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -365,7 +376,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
 CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -380,6 +391,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -483,6 +495,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -535,7 +548,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/submodule/coreboot/default/R06_28_23.tar.gz/module.cfg b/config/submodule/coreboot/default/R06_28_23.tar.gz/module.cfg
deleted file mode 100644
index 71ab78bc..00000000
--- a/config/submodule/coreboot/default/R06_28_23.tar.gz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/R06_28_23.tar.gz"
-subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/R06_28_23.tar.gz"
-subhash="d64091202866cd306fef08bbf95b585584331704fdbe5ef0bfa99c8f9cb188e51a52880625c8d6bc971b3d251c8b13686b43a013058cadda861efe09b219c1b0"
diff --git a/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg b/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg
new file mode 100644
index 00000000..6dde459a
--- /dev/null
+++ b/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20230628.tar.gz"
+subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20230628.tar.gz"
+subhash="d726e69ebd8b8110690e3aff8d1919b43b0a2185efdeb9131ea8d89d321ca3a318a89c721ea740ae366f31ed3d1c11c2906f8807ee8a190e6f67fe5b2023cea4"
diff --git a/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
index 3fb78c02..d7864542 100644
--- a/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
+++ b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/arm-trusted-firmware.git"
 subrepo_bkup="https://github.com/coreboot/arm-trusted-firmware"
-subhash="23d6774ab53ded09d8065a184b4763504e9c8d9e"
+subhash="c5b8de86c8838d08d5d8c9d67c7a432817ee62b8"
diff --git a/config/submodule/coreboot/default/binutils-2.41.tar.xz/module.cfg b/config/submodule/coreboot/default/binutils-2.41.tar.xz/module.cfg
deleted file mode 100644
index eb2d01b1..00000000
--- a/config/submodule/coreboot/default/binutils-2.41.tar.xz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.41.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.41.tar.xz"
-subhash="5df45d0bd6ddabdce4f35878c041e46a92deef01e7dea5facc97fd65cc06b59abc6fba0eb454b68e571c7e14038dc823fe7f2263843e6e627b7444eaf0fe9374"
diff --git a/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg b/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg
new file mode 100644
index 00000000..370a52ec
--- /dev/null
+++ b/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.42.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.42.tar.xz"
+subhash="155f3ba14cd220102f4f29a4f1e5cfee3c48aa03b74603460d05afb73c70d6657a9d87eee6eb88bf13203fe6f31177a5c9addc04384e956e7da8069c8ecd20a6"
diff --git a/config/submodule/coreboot/default/gcc-13.2.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gcc-13.2.0.tar.xz/module.cfg
deleted file mode 100644
index dbcc0805..00000000
--- a/config/submodule/coreboot/default/gcc-13.2.0.tar.xz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-13.2.0/gcc-13.2.0.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-13.2.0/gcc-13.2.0.tar.xz"
-subhash="d99e4826a70db04504467e349e9fbaedaa5870766cda7c5cab50cdebedc4be755ebca5b789e1232a34a20be1a0b60097de9280efe47bdb71c73251e30b0862a2"
diff --git a/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg
new file mode 100644
index 00000000..1e4037e8
--- /dev/null
+++ b/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.1.0/gcc-14.1.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.1.0/gcc-14.1.0.tar.xz"
+subhash="e9e224f2b26646fcf038d28dfa08b94c623bc57941f99894a321d01c600f7c68aff6b8837fd25e73e540de1f8de5606e98694a62cdcdfb525ce768b3ef6879ea"
diff --git a/config/submodule/coreboot/default/intel-microcode/module.cfg b/config/submodule/coreboot/default/intel-microcode/module.cfg
index 05a174b0..be106f7d 100644
--- a/config/submodule/coreboot/default/intel-microcode/module.cfg
+++ b/config/submodule/coreboot/default/intel-microcode/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/intel-microcode.git"
 subrepo_bkup="https://github.com/coreboot/intel-microcode"
-subhash="ece0d294a29a1375397941a4e6f2f7217910bc89"
+subhash="5278dfcf98e89098326b3eb8a85d07120a8730f8"
diff --git a/config/submodule/coreboot/default/libgfxinit/module.cfg b/config/submodule/coreboot/default/libgfxinit/module.cfg
index 7e2536f9..1ba41724 100644
--- a/config/submodule/coreboot/default/libgfxinit/module.cfg
+++ b/config/submodule/coreboot/default/libgfxinit/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/libgfxinit.git"
 subrepo_bkup="https://github.com/coreboot/libgfxinit"
-subhash="a4be8a21b0e2c752da0042c79aae5942418f53e2"
+subhash="17cfc92f402493979783585b6581efbd98c0cf07"
diff --git a/config/submodule/coreboot/default/module.list b/config/submodule/coreboot/default/module.list
index 85fdafa5..6f17b546 100644
--- a/config/submodule/coreboot/default/module.list
+++ b/config/submodule/coreboot/default/module.list
@@ -3,10 +3,10 @@
 3rdparty/libgfxinit
 3rdparty/libhwbase
 3rdparty/vboot
-util/crossgcc/tarballs/binutils-2.41.tar.xz
-util/crossgcc/tarballs/gcc-13.2.0.tar.xz
+util/crossgcc/tarballs/binutils-2.42.tar.xz
+util/crossgcc/tarballs/gcc-14.1.0.tar.xz
 util/crossgcc/tarballs/gmp-6.3.0.tar.xz
 util/crossgcc/tarballs/mpc-1.3.1.tar.gz
 util/crossgcc/tarballs/mpfr-4.2.1.tar.xz
-util/crossgcc/tarballs/nasm-2.16.01.tar.bz2
-util/crossgcc/tarballs/R06_28_23.tar.gz
+util/crossgcc/tarballs/nasm-2.16.03.tar.bz2
+util/crossgcc/tarballs/acpica-unix-20230628.tar.gz
diff --git a/config/submodule/coreboot/default/nasm-2.16.01.tar.bz2/module.cfg b/config/submodule/coreboot/default/nasm-2.16.01.tar.bz2/module.cfg
deleted file mode 100644
index a98cab0b..00000000
--- a/config/submodule/coreboot/default/nasm-2.16.01.tar.bz2/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.01/nasm-2.16.01.tar.bz2"
-subfile_bkup="https://coreboot.org/releases/crossgcc-sources/nasm-2.16.01.tar.bz2"
-subhash="daecc50d0c04cfa1e8a09bbece808548478fc03834b0c3fb06a9da56d3b51697e2d09a469cef8a4761290cdfc65e0eb46d76b6ca11dfa1dcd1051882c5e7fd88"
diff --git a/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg
new file mode 100644
index 00000000..c98cc71f
--- /dev/null
+++ b/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2"
+subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2"
+subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172"
diff --git a/config/submodule/coreboot/default/vboot/module.cfg b/config/submodule/coreboot/default/vboot/module.cfg
index 9a23ee96..1dc4c904 100644
--- a/config/submodule/coreboot/default/vboot/module.cfg
+++ b/config/submodule/coreboot/default/vboot/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/vboot.git"
 subrepo_bkup="https://github.com/coreboot/vboot"
-subhash="3d37d2aafe1f941c532def2a1fbbb58c8dd84182"
+subhash="4b12d392e5b12de29c582df4e717b1228e9f1594"

From a15347ef1e677ca711ce706877db2416ddfd451a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 6 Aug 2024 01:43:57 +0100
Subject: [PATCH 0800/1549] coreboot/dell: merge into coreboot/default

The libgfxinit patch and other patches e.g. DDR2 fix, are
now provided in coreboot/default. The Latitude E6400 is now
using the newer coreboot revision from late July 2024.

Some other configs had to change because of this, relating to
the new way that Nicholas handles timing on LVDS displays
with the E6400 port; a default 96MHz clock is still used for
pixel reference clock, overridden with a value of 100MHz on
other GM45 machines, where 96MHz was previously hardcoded.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...b-intel-gm45-Make-DDR2-raminit-work.patch} |   8 +-
 ...nb-intel-gm45-Make-DDR2-raminit-work.patch | 269 ++++++++++++++++++
 ...-100-MHz-reference-clock-for-displa.patch} |  14 +-
 ...ool-add-nuke-flag-all-0xFF-on-region.patch | 203 -------------
 ...-x200-t400-Revert-cpu-intel-model_10.patch |  47 ---
 ...e-CPUs-don-t-enable-alternative-SMRR.patch | 173 -----------
 ...able-01.0-device-in-devicetree-for-d.patch |  28 --
 ...or-coreboot-images-built-without-a-p.patch |  39 ---
 ...t-use-github-for-the-acpica-download.patch |  39 ---
 ...-mirrorservice.org-for-gcc-downloads.patch |  36 ---
 ...ell-e6400-crank-up-vram-to-256MB-max.patch |  23 --
 config/coreboot/dell/target.cfg               |   4 -
 .../e6400_4mb/config/libgfxinit_corebootfb    |  47 ++-
 .../e6400_4mb/config/libgfxinit_txtmode       |  47 ++-
 config/coreboot/e6400_4mb/target.cfg          |   2 +-
 config/coreboot/e6400nvidia_4mb/config/normal |  47 ++-
 config/coreboot/e6400nvidia_4mb/target.cfg    |   2 +-
 .../r400_16mb/config/libgfxinit_corebootfb    |   1 +
 .../r400_16mb/config/libgfxinit_txtmode       |   1 +
 .../r400_4mb/config/libgfxinit_corebootfb     |   1 +
 .../r400_4mb/config/libgfxinit_txtmode        |   1 +
 .../r400_8mb/config/libgfxinit_corebootfb     |   1 +
 .../r400_8mb/config/libgfxinit_txtmode        |   1 +
 .../r500_4mb/config/libgfxinit_corebootfb     |   1 +
 .../r500_4mb/config/libgfxinit_txtmode        |   1 +
 .../t400_16mb/config/libgfxinit_corebootfb    |   1 +
 .../t400_16mb/config/libgfxinit_txtmode       |   1 +
 .../t400_4mb/config/libgfxinit_corebootfb     |   1 +
 .../t400_4mb/config/libgfxinit_txtmode        |   1 +
 .../t400_8mb/config/libgfxinit_corebootfb     |   1 +
 .../t400_8mb/config/libgfxinit_txtmode        |   1 +
 .../t500_16mb/config/libgfxinit_corebootfb    |   1 +
 .../t500_16mb/config/libgfxinit_txtmode       |   1 +
 .../t500_4mb/config/libgfxinit_corebootfb     |   1 +
 .../t500_4mb/config/libgfxinit_txtmode        |   1 +
 .../t500_8mb/config/libgfxinit_corebootfb     |   1 +
 .../t500_8mb/config/libgfxinit_txtmode        |   1 +
 .../w500_16mb/config/libgfxinit_corebootfb    |   1 +
 .../w500_16mb/config/libgfxinit_txtmode       |   1 +
 .../w500_4mb/config/libgfxinit_corebootfb     |   1 +
 .../w500_4mb/config/libgfxinit_txtmode        |   1 +
 .../w500_8mb/config/libgfxinit_corebootfb     |   1 +
 .../w500_8mb/config/libgfxinit_txtmode        |   1 +
 .../x200_16mb/config/libgfxinit_corebootfb    |   1 +
 .../x200_16mb/config/libgfxinit_txtmode       |   1 +
 .../x200_4mb/config/libgfxinit_corebootfb     |   1 +
 .../x200_4mb/config/libgfxinit_txtmode        |   1 +
 .../x200_8mb/config/libgfxinit_corebootfb     |   1 +
 .../x200_8mb/config/libgfxinit_txtmode        |   1 +
 .../x301_16mb/config/libgfxinit_corebootfb    |   1 +
 .../x301_16mb/config/libgfxinit_txtmode       |   1 +
 .../x301_4mb/config/libgfxinit_corebootfb     |   1 +
 .../x301_4mb/config/libgfxinit_txtmode        |   1 +
 .../x301_8mb/config/libgfxinit_corebootfb     |   1 +
 .../x301_8mb/config/libgfxinit_txtmode        |   1 +
 ...lls.adb-Make-reference-clock-frequen.patch |   8 +-
 .../coreboot/dell/intel-microcode/module.cfg  |   3 -
 .../coreboot/dell/libgfxinit/module.cfg       |   3 -
 .../coreboot/dell/libhwbase/module.cfg        |   3 -
 config/submodule/coreboot/dell/module.list    |   4 -
 .../submodule/coreboot/dell/vboot/module.cfg  |   3 -
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch | 178 ------------
 62 files changed, 432 insertions(+), 836 deletions(-)
 rename config/coreboot/{dell/patches/0008-nb-intel-gm45-Make-DDR2-raminit-work.patch => default/patches/0040-nb-intel-gm45-Make-DDR2-raminit-work.patch} (97%)
 create mode 100644 config/coreboot/default/patches/0041-nb-intel-gm45-Make-DDR2-raminit-work.patch
 rename config/coreboot/{dell/patches/0010-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch => default/patches/0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch} (82%)
 delete mode 100644 config/coreboot/dell/patches/0001-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
 delete mode 100644 config/coreboot/dell/patches/0002-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
 delete mode 100644 config/coreboot/dell/patches/0003-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
 delete mode 100644 config/coreboot/dell/patches/0004-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
 delete mode 100644 config/coreboot/dell/patches/0005-Remove-warning-for-coreboot-images-built-without-a-p.patch
 delete mode 100644 config/coreboot/dell/patches/0006-don-t-use-github-for-the-acpica-download.patch
 delete mode 100644 config/coreboot/dell/patches/0007-use-mirrorservice.org-for-gcc-downloads.patch
 delete mode 100644 config/coreboot/dell/patches/0009-dell-e6400-crank-up-vram-to-256MB-max.patch
 delete mode 100644 config/coreboot/dell/target.cfg
 rename config/submodule/coreboot/{dell => default}/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch (88%)
 delete mode 100644 config/submodule/coreboot/dell/intel-microcode/module.cfg
 delete mode 100644 config/submodule/coreboot/dell/libgfxinit/module.cfg
 delete mode 100644 config/submodule/coreboot/dell/libhwbase/module.cfg
 delete mode 100644 config/submodule/coreboot/dell/module.list
 delete mode 100644 config/submodule/coreboot/dell/vboot/module.cfg
 delete mode 100644 config/submodule/coreboot/dell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch

diff --git a/config/coreboot/dell/patches/0008-nb-intel-gm45-Make-DDR2-raminit-work.patch b/config/coreboot/default/patches/0040-nb-intel-gm45-Make-DDR2-raminit-work.patch
similarity index 97%
rename from config/coreboot/dell/patches/0008-nb-intel-gm45-Make-DDR2-raminit-work.patch
rename to config/coreboot/default/patches/0040-nb-intel-gm45-Make-DDR2-raminit-work.patch
index 8de8060f..b673b5f6 100644
--- a/config/coreboot/dell/patches/0008-nb-intel-gm45-Make-DDR2-raminit-work.patch
+++ b/config/coreboot/default/patches/0040-nb-intel-gm45-Make-DDR2-raminit-work.patch
@@ -1,7 +1,7 @@
-From f26df5dff7be4b0c9d8dced1cf6ed07472a174c7 Mon Sep 17 00:00:00 2001
+From fe5e1655be8cdb8eff1659e5ce6acbd06b9a7620 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Mon, 10 May 2021 22:40:59 +0200
-Subject: [PATCH 8/9] nb/intel/gm45: Make DDR2 raminit work
+Subject: [PATCH 1/3] nb/intel/gm45: Make DDR2 raminit work
 
 List of changes:
  - Update some timing and ODT values
@@ -20,10 +20,10 @@ Signed-off-by: Angel Pons <th3fanbus@gmail.com>
  3 files changed, 106 insertions(+), 13 deletions(-)
 
 diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
-index d929533d92..997f8a0e5a 100644
+index 5d9ac56606..338260ea7a 100644
 --- a/src/northbridge/intel/gm45/gm45.h
 +++ b/src/northbridge/intel/gm45/gm45.h
-@@ -419,7 +419,7 @@ void igd_compute_ggc(sysinfo_t *const sysinfo);
+@@ -420,7 +420,7 @@ void igd_compute_ggc(sysinfo_t *const sysinfo);
  int raminit_read_vco_index(void);
  u32 raminit_get_rank_addr(unsigned int channel, unsigned int rank);
  
diff --git a/config/coreboot/default/patches/0041-nb-intel-gm45-Make-DDR2-raminit-work.patch b/config/coreboot/default/patches/0041-nb-intel-gm45-Make-DDR2-raminit-work.patch
new file mode 100644
index 00000000..2f50be66
--- /dev/null
+++ b/config/coreboot/default/patches/0041-nb-intel-gm45-Make-DDR2-raminit-work.patch
@@ -0,0 +1,269 @@
+From 65510f6ea53d6f23f47df69d623810aa87041918 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 6 Aug 2024 00:50:24 +0100
+Subject: [PATCH 2/3] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
+
+We add this patch:
+
+commit commit_id_here
+Author: Angel Pons <th3fanbus@gmail.com>
+Date:   Mon May 10 22:40:59 2021 +0200
+
+    nb/intel/gm45: Make DDR2 raminit work
+
+This patch was original applied, in lbmk, only on coreboot/dell,
+separately from coreboot/default, which was wasteful because it
+meant having an entire coreboot tree just for a single board. We
+did this, because the DDR2 RCOMP fix happened to break DDR3 init
+on other boards.
+
+What *this* new patch does on top of Angel's patch, is make sure
+that their changes only apply to DDR2, while DDR3 behaviour remains
+unchanged. This means that the Dell Latitude E6400 can be supported
+in the main coreboot tree, within lbmk.
+
+Essentially, this patch restores the old behaviour, prior to applying
+Angel's patch, only when DDR3 memory is used.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/northbridge/intel/gm45/raminit.c          | 182 ++++++++++--------
+ .../intel/gm45/raminit_rcomp_calibration.c    |   9 +-
+ 2 files changed, 104 insertions(+), 87 deletions(-)
+
+diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
+index df8f46fbbc..b051374eaa 100644
+--- a/src/northbridge/intel/gm45/raminit.c
++++ b/src/northbridge/intel/gm45/raminit.c
+@@ -1117,7 +1117,10 @@ static void dram_program_timings(const int spd_type, const timings_t *const timi
+ 				reg = (reg & ~(0xf << 10)) | (2 << 10);
+ 			else
+ 				reg = (reg & ~(0xf << 10)) | (3 << 10);
+-			reg = (reg & ~(0x7 <<  5)) | (2 << 5);
++			if (sysinfo->spd_type == DDR2)
++				reg = (reg & ~(0x7 <<  5)) | (2 << 5);
++			else
++				reg = (reg & ~(0x7 <<  5)) | (3 << 5);
+ 		} else if (timings->mem_clock != MEM_CLOCK_1067MT) {
+ 			reg = (reg & ~(0x7 << 15)) | ((9 - timings->CAS) << 15);
+ 			reg = (reg & ~(0xf << 10)) | ((timings->CAS - 3) << 10);
+@@ -1285,12 +1288,23 @@ static void ddr2_odt_setup(const timings_t *const timings, const int sff)
+ 		reg = (reg & ~(0x7 << (48 - 32))) | ((timings->CAS - 2) << (48 - 32));
+ 		reg = (reg & ~(0xf << (44 - 32))) | (8 << (44 - 32));
+ 		reg = (reg & ~(0xf << (40 - 32))) | (7 << (40 - 32));
+-		if (timings->mem_clock == MEM_CLOCK_667MT) {
+-			reg = (reg & ~(0xf << (36 - 32))) | (8 << (36 - 32));
+-			reg = (reg & ~(0xf << (32 - 32))) | (8 << (32 - 32));
++		if (sysinfo->spd_type == DDR2) {
++			if (timings->mem_clock == MEM_CLOCK_667MT) {
++				reg = (reg & ~(0xf << (36 - 32))) | (8 << (36 - 32));
++				reg = (reg & ~(0xf << (32 - 32))) | (8 << (32 - 32));
++			} else {
++				reg = (reg & ~(0xf << (36 - 32))) | (9 << (36 - 32));
++				reg = (reg & ~(0xf << (32 - 32))) | (9 << (32 - 32));
++			}
+ 		} else {
+-			reg = (reg & ~(0xf << (36 - 32))) | (9 << (36 - 32));
+-			reg = (reg & ~(0xf << (32 - 32))) | (9 << (32 - 32));
++			/* DDR3 */
++			if (timings->mem_clock == MEM_CLOCK_667MT) {
++				reg = (reg & ~(0xf << (36 - 32))) | (4 << (36 - 32));
++				reg = (reg & ~(0xf << (32 - 32))) | (4 << (32 - 32));
++			} else {
++				reg = (reg & ~(0xf << (36 - 32))) | (5 << (36 - 32));
++				reg = (reg & ~(0xf << (32 - 32))) | (5 << (32 - 32));
++			}
+ 		}
+ 		mchbar_write32(CxODT_HIGH(ch), reg);
+ 
+@@ -2209,83 +2223,85 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
+ 		raminit_write_training(timings->mem_clock, dimms, s3resume);
+ 	}
+ 
+-	/*
+-	 * Program hardcoded DDR2-800 RCOMP SRAM codes. This must be done
+-	 * after receiver enable calibration, otherwise raminit sometimes
+-	 * completes with non-working memory.
+-	 */
+-	mchbar_write32(0x0530, 0x06060005);
+-	mchbar_write32(0x0680, 0x06060606);
+-	mchbar_write32(0x0684, 0x08070606);
+-	mchbar_write32(0x0688, 0x0e0e0c0a);
+-	mchbar_write32(0x068c, 0x0e0e0e0e);
+-	mchbar_write32(0x0698, 0x06060606);
+-	mchbar_write32(0x069c, 0x08070606);
+-	mchbar_write32(0x06a0, 0x0c0c0b0a);
+-	mchbar_write32(0x06a4, 0x0c0c0c0c);
+-
+-	mchbar_write32(0x06c0, 0x02020202);
+-	mchbar_write32(0x06c4, 0x03020202);
+-	mchbar_write32(0x06c8, 0x04040403);
+-	mchbar_write32(0x06cc, 0x04040404);
+-	mchbar_write32(0x06d8, 0x02020202);
+-	mchbar_write32(0x06dc, 0x03020202);
+-	mchbar_write32(0x06e0, 0x04040403);
+-	mchbar_write32(0x06e4, 0x04040404);
+-
+-	mchbar_write32(0x0700, 0x02020202);
+-	mchbar_write32(0x0704, 0x03020202);
+-	mchbar_write32(0x0708, 0x04040403);
+-	mchbar_write32(0x070c, 0x04040404);
+-	mchbar_write32(0x0718, 0x02020202);
+-	mchbar_write32(0x071c, 0x03020202);
+-	mchbar_write32(0x0720, 0x04040403);
+-	mchbar_write32(0x0724, 0x04040404);
+-
+-	mchbar_write32(0x0740, 0x02020202);
+-	mchbar_write32(0x0744, 0x03020202);
+-	mchbar_write32(0x0748, 0x04040403);
+-	mchbar_write32(0x074c, 0x04040404);
+-	mchbar_write32(0x0758, 0x02020202);
+-	mchbar_write32(0x075c, 0x03020202);
+-	mchbar_write32(0x0760, 0x04040403);
+-	mchbar_write32(0x0764, 0x04040404);
+-
+-	mchbar_write32(0x0780, 0x06060606);
+-	mchbar_write32(0x0784, 0x09070606);
+-	mchbar_write32(0x0788, 0x0e0e0c0b);
+-	mchbar_write32(0x078c, 0x0e0e0e0e);
+-	mchbar_write32(0x0798, 0x06060606);
+-	mchbar_write32(0x079c, 0x09070606);
+-	mchbar_write32(0x07a0, 0x0d0d0c0b);
+-	mchbar_write32(0x07a4, 0x0d0d0d0d);
+-
+-	mchbar_write32(0x07c0, 0x06060606);
+-	mchbar_write32(0x07c4, 0x09070606);
+-	mchbar_write32(0x07c8, 0x0e0e0c0b);
+-	mchbar_write32(0x07cc, 0x0e0e0e0e);
+-	mchbar_write32(0x07d8, 0x06060606);
+-	mchbar_write32(0x07dc, 0x09070606);
+-	mchbar_write32(0x07e0, 0x0d0d0c0b);
+-	mchbar_write32(0x07e4, 0x0d0d0d0d);
+-
+-	mchbar_write32(0x0840, 0x06060606);
+-	mchbar_write32(0x0844, 0x08070606);
+-	mchbar_write32(0x0848, 0x0e0e0c0a);
+-	mchbar_write32(0x084c, 0x0e0e0e0e);
+-	mchbar_write32(0x0858, 0x06060606);
+-	mchbar_write32(0x085c, 0x08070606);
+-	mchbar_write32(0x0860, 0x0c0c0b0a);
+-	mchbar_write32(0x0864, 0x0c0c0c0c);
+-
+-	mchbar_write32(0x0880, 0x02020202);
+-	mchbar_write32(0x0884, 0x03020202);
+-	mchbar_write32(0x0888, 0x04040403);
+-	mchbar_write32(0x088c, 0x04040404);
+-	mchbar_write32(0x0898, 0x02020202);
+-	mchbar_write32(0x089c, 0x03020202);
+-	mchbar_write32(0x08a0, 0x04040403);
+-	mchbar_write32(0x08a4, 0x04040404);
++	if (sysinfo->spd_type == DDR2) {
++		/*
++		 * Program hardcoded DDR2-800 RCOMP SRAM codes. This must be done
++		 * after receiver enable calibration, otherwise raminit sometimes
++		 * completes with non-working memory.
++		 */
++		mchbar_write32(0x0530, 0x06060005);
++		mchbar_write32(0x0680, 0x06060606);
++		mchbar_write32(0x0684, 0x08070606);
++		mchbar_write32(0x0688, 0x0e0e0c0a);
++		mchbar_write32(0x068c, 0x0e0e0e0e);
++		mchbar_write32(0x0698, 0x06060606);
++		mchbar_write32(0x069c, 0x08070606);
++		mchbar_write32(0x06a0, 0x0c0c0b0a);
++		mchbar_write32(0x06a4, 0x0c0c0c0c);
++
++		mchbar_write32(0x06c0, 0x02020202);
++		mchbar_write32(0x06c4, 0x03020202);
++		mchbar_write32(0x06c8, 0x04040403);
++		mchbar_write32(0x06cc, 0x04040404);
++		mchbar_write32(0x06d8, 0x02020202);
++		mchbar_write32(0x06dc, 0x03020202);
++		mchbar_write32(0x06e0, 0x04040403);
++		mchbar_write32(0x06e4, 0x04040404);
++
++		mchbar_write32(0x0700, 0x02020202);
++		mchbar_write32(0x0704, 0x03020202);
++		mchbar_write32(0x0708, 0x04040403);
++		mchbar_write32(0x070c, 0x04040404);
++		mchbar_write32(0x0718, 0x02020202);
++		mchbar_write32(0x071c, 0x03020202);
++		mchbar_write32(0x0720, 0x04040403);
++		mchbar_write32(0x0724, 0x04040404);
++
++		mchbar_write32(0x0740, 0x02020202);
++		mchbar_write32(0x0744, 0x03020202);
++		mchbar_write32(0x0748, 0x04040403);
++		mchbar_write32(0x074c, 0x04040404);
++		mchbar_write32(0x0758, 0x02020202);
++		mchbar_write32(0x075c, 0x03020202);
++		mchbar_write32(0x0760, 0x04040403);
++		mchbar_write32(0x0764, 0x04040404);
++
++		mchbar_write32(0x0780, 0x06060606);
++		mchbar_write32(0x0784, 0x09070606);
++		mchbar_write32(0x0788, 0x0e0e0c0b);
++		mchbar_write32(0x078c, 0x0e0e0e0e);
++		mchbar_write32(0x0798, 0x06060606);
++		mchbar_write32(0x079c, 0x09070606);
++		mchbar_write32(0x07a0, 0x0d0d0c0b);
++		mchbar_write32(0x07a4, 0x0d0d0d0d);
++
++		mchbar_write32(0x07c0, 0x06060606);
++		mchbar_write32(0x07c4, 0x09070606);
++		mchbar_write32(0x07c8, 0x0e0e0c0b);
++		mchbar_write32(0x07cc, 0x0e0e0e0e);
++		mchbar_write32(0x07d8, 0x06060606);
++		mchbar_write32(0x07dc, 0x09070606);
++		mchbar_write32(0x07e0, 0x0d0d0c0b);
++		mchbar_write32(0x07e4, 0x0d0d0d0d);
++
++		mchbar_write32(0x0840, 0x06060606);
++		mchbar_write32(0x0844, 0x08070606);
++		mchbar_write32(0x0848, 0x0e0e0c0a);
++		mchbar_write32(0x084c, 0x0e0e0e0e);
++		mchbar_write32(0x0858, 0x06060606);
++		mchbar_write32(0x085c, 0x08070606);
++		mchbar_write32(0x0860, 0x0c0c0b0a);
++		mchbar_write32(0x0864, 0x0c0c0c0c);
++
++		mchbar_write32(0x0880, 0x02020202);
++		mchbar_write32(0x0884, 0x03020202);
++		mchbar_write32(0x0888, 0x04040403);
++		mchbar_write32(0x088c, 0x04040404);
++		mchbar_write32(0x0898, 0x02020202);
++		mchbar_write32(0x089c, 0x03020202);
++		mchbar_write32(0x08a0, 0x04040403);
++		mchbar_write32(0x08a4, 0x04040404);
++	}
+ 
+ 	igd_compute_ggc(sysinfo);
+ 
+diff --git a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
+index b74765fd9c..5d4505e063 100644
+--- a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
++++ b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
+@@ -198,7 +198,7 @@ void raminit_rcomp_calibration(int ddr_type, const stepping_t stepping) {
+ 		reg = mchbar_read32(0x518);
+ 		lut_idx[channel][group][PULL_UP] = (reg >> 24) & 0x7f;
+ 		lut_idx[channel][group][PULL_DOWN] = (reg >> 16) & 0x7f;
+-		if (i == 1) {
++		if ((i == 1) && (ddr_type == DDR2)) {
+ 			magic_comp[0] = (reg >> 8) & 0x3f;
+ 			magic_comp[1] = (reg >> 0) & 0x3f;
+ 		}
+@@ -242,7 +242,8 @@ void raminit_rcomp_calibration(int ddr_type, const stepping_t stepping) {
+ 		}
+ 		mchbar += 0x0040;
+ 	}
+-
+-	mchbar_clrsetbits32(0x4d0, 0x3f << 26, magic_comp[0] << 26);
+-	mchbar_clrsetbits32(0x4d0, 0x3f << 20, magic_comp[1] << 20);
++	if (ddr_type == DDR2) {
++		mchbar_clrsetbits32(0x4d0, 0x3f << 26, magic_comp[0] << 26);
++		mchbar_clrsetbits32(0x4d0, 0x3f << 20, magic_comp[1] << 20);
++	}
+ }
+-- 
+2.39.2
+
diff --git a/config/coreboot/dell/patches/0010-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch b/config/coreboot/default/patches/0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
similarity index 82%
rename from config/coreboot/dell/patches/0010-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
rename to config/coreboot/default/patches/0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
index f64743a5..991dcf44 100644
--- a/config/coreboot/dell/patches/0010-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
+++ b/config/coreboot/default/patches/0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
@@ -1,7 +1,7 @@
-From 6f4968919cf4e801caacf8392492457b79efa9c6 Mon Sep 17 00:00:00 2001
+From b42ca30081b25cbabfb2659adca9d935ef3a8399 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 20 May 2024 10:24:16 -0600
-Subject: [PATCH] mb/dell/e6400: Use 100 MHz reference clock for display
+Subject: [PATCH 3/3] mb/dell/e6400: Use 100 MHz reference clock for display
 
 The E6400 uses a 100 MHz reference clock for spread spectrum support on
 LVDS, whereas libgfxinit previously assumed a 96 MHz input clock. For
@@ -19,10 +19,10 @@ Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
  2 files changed, 7 insertions(+)
 
 diff --git a/src/mainboard/dell/e6400/Kconfig b/src/mainboard/dell/e6400/Kconfig
-index 034de4be2b..4cb16af697 100644
+index 417d95fd5d..6fe1b1c456 100644
 --- a/src/mainboard/dell/e6400/Kconfig
 +++ b/src/mainboard/dell/e6400/Kconfig
-@@ -17,6 +17,9 @@ config BOARD_SPECIFIC_OPTIONS
+@@ -19,6 +19,9 @@ config BOARD_SPECIFIC_OPTIONS
  	select INTEL_GMA_HAVE_VBT
  	select EC_DELL_MEC5035
  
@@ -33,10 +33,10 @@ index 034de4be2b..4cb16af697 100644
  	default "dell/e6400"
  
 diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
-index 2a266b9771..2432c9d78e 100644
+index 8059e7ee80..5df5a93296 100644
 --- a/src/northbridge/intel/gm45/Kconfig
 +++ b/src/northbridge/intel/gm45/Kconfig
-@@ -13,6 +13,10 @@ config NORTHBRIDGE_INTEL_GM45
+@@ -14,6 +14,10 @@ config NORTHBRIDGE_INTEL_GM45
  
  if NORTHBRIDGE_INTEL_GM45
  
@@ -48,5 +48,5 @@ index 2a266b9771..2432c9d78e 100644
  	select VBOOT_STARTS_IN_BOOTBLOCK
  
 -- 
-2.45.1
+2.39.2
 
diff --git a/config/coreboot/dell/patches/0001-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/dell/patches/0001-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
deleted file mode 100644
index cb1effa7..00000000
--- a/config/coreboot/dell/patches/0001-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ /dev/null
@@ -1,203 +0,0 @@
-From 4fbd327df271d613d4a56a36eafd88d9d642ec6b Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 1/9] util/ifdtool: add --nuke flag (all 0xFF on region)
-
-When this option is used, the region's contents are overwritten
-with all ones (0xFF).
-
-Example:
-
-./ifdtool --nuke gbe coreboot.rom
-./ifdtool --nuke bios coreboot.com
-./ifdtool --nuke me coreboot.com
-
-Rebased since the last revision update in lbmk.
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/ifdtool/ifdtool.c | 112 +++++++++++++++++++++++++++++------------
- 1 file changed, 81 insertions(+), 31 deletions(-)
-
-diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index 191b3216de..38132b4a28 100644
---- a/util/ifdtool/ifdtool.c
-+++ b/util/ifdtool/ifdtool.c
-@@ -1942,6 +1942,7 @@ static void print_usage(const char *name)
- 	       "                                         tgl    - Tiger Lake\n"
- 	       "                                         wbg    - Wellsburg\n"
- 	       "   -S | --setpchstrap                    Write a PCH strap\n"
-+	       "   -N | --nuke <region>                  Overwrite the specified region with 0xFF (all ones)\n"
- 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
- 	       "   -v | --version:                       print the version\n"
- 	       "   -h | --help:                          print this help\n\n"
-@@ -1950,6 +1951,60 @@ static void print_usage(const char *name)
- 	       "\n");
- }
- 
-+static int
-+get_region_type_string(const char *region_type_string)
-+{
-+       if (!strcasecmp("Descriptor", region_type_string))
-+               return 0;
-+       else if (!strcasecmp("BIOS", region_type_string))
-+               return 1;
-+       else if (!strcasecmp("ME", region_type_string))
-+               return 2;
-+       else if (!strcasecmp("GbE", region_type_string))
-+               return 3;
-+       else if (!strcasecmp("Platform Data", region_type_string))
-+               return 4;
-+       else if (!strcasecmp("Device Exp1", region_type_string))
-+               return 5;
-+       else if (!strcasecmp("Secondary BIOS", region_type_string))
-+               return 6;
-+       else if (!strcasecmp("Reserved", region_type_string))
-+               return 7;
-+       else if (!strcasecmp("EC", region_type_string))
-+               return 8;
-+       else if (!strcasecmp("Device Exp2", region_type_string))
-+               return 9;
-+       else if (!strcasecmp("IE", region_type_string))
-+               return 10;
-+       else if (!strcasecmp("10GbE_0", region_type_string))
-+               return 11;
-+       else if (!strcasecmp("10GbE_1", region_type_string))
-+               return 12;
-+       else if (!strcasecmp("PTT", region_type_string))
-+               return 15;
-+       return -1;
-+}
-+
-+static void
-+nuke(const char *filename, char *image, int size, int region_type)
-+{
-+       int i;
-+       struct region region;
-+       const struct frba *frba = find_frba(image, size);
-+       if (!frba)
-+               exit(EXIT_FAILURE);
-+
-+       region = get_region(frba, region_type);
-+       if (region.size > 0) {
-+               for (i = region.base; i <= region.limit; i++) {
-+                       if ((i + 1) > (size))
-+                               break;
-+                       image[i] = 0xFF;
-+               }
-+               write_image(filename, image, size);
-+       }
-+}
-+
- int main(int argc, char *argv[])
- {
- 	int opt, option_index = 0;
-@@ -1957,6 +2012,7 @@ int main(int argc, char *argv[])
- 	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
- 	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
- 	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
-+	int mode_nuke = 0;
- 	int mode_gpr0_disable = 0;
- 	char *region_type_string = NULL, *region_fname = NULL;
- 	const char *layout_fname = NULL;
-@@ -1990,6 +2046,7 @@ int main(int argc, char *argv[])
- 		{"validate", 0, NULL, 't'},
- 		{"setpchstrap", 1, NULL, 'S'},
- 		{"newvalue", 1, NULL, 'V'},
-+		{"nuke", 1, NULL, 'N'},
- 		{0, 0, 0, 0}
- 	};
- 
-@@ -2039,35 +2096,8 @@ int main(int argc, char *argv[])
- 			region_fname++;
- 			// Descriptor, BIOS, ME, GbE, Platform
- 			// valid type?
--			if (!strcasecmp("Descriptor", region_type_string))
--				region_type = 0;
--			else if (!strcasecmp("BIOS", region_type_string))
--				region_type = 1;
--			else if (!strcasecmp("ME", region_type_string))
--				region_type = 2;
--			else if (!strcasecmp("GbE", region_type_string))
--				region_type = 3;
--			else if (!strcasecmp("Platform Data", region_type_string))
--				region_type = 4;
--			else if (!strcasecmp("Device Exp1", region_type_string))
--				region_type = 5;
--			else if (!strcasecmp("Secondary BIOS", region_type_string))
--				region_type = 6;
--			else if (!strcasecmp("Reserved", region_type_string))
--				region_type = 7;
--			else if (!strcasecmp("EC", region_type_string))
--				region_type = 8;
--			else if (!strcasecmp("Device Exp2", region_type_string))
--				region_type = 9;
--			else if (!strcasecmp("IE", region_type_string))
--				region_type = 10;
--			else if (!strcasecmp("10GbE_0", region_type_string))
--				region_type = 11;
--			else if (!strcasecmp("10GbE_1", region_type_string))
--				region_type = 12;
--			else if (!strcasecmp("PTT", region_type_string))
--				region_type = 15;
--			if (region_type == -1) {
-+                       if ((region_type =
-+                           get_region_type_string(region_type_string)) == -1) {
- 				fprintf(stderr, "No such region type: '%s'\n\n",
- 					region_type_string);
- 				fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
-@@ -2236,6 +2266,22 @@ int main(int argc, char *argv[])
- 		case 't':
- 			mode_validate = 1;
- 			break;
-+               case 'N':
-+                       region_type_string = strdup(optarg);
-+                       if (!region_type_string) {
-+                               fprintf(stderr, "No region specified\n");
-+                               print_usage(argv[0]);
-+                               exit(EXIT_FAILURE);
-+                       }
-+                       if ((region_type =
-+                           get_region_type_string(region_type_string)) == -1) {
-+                               fprintf(stderr, "No such region type: '%s'\n\n",
-+                                       region_type_string);
-+                               print_usage(argv[0]);
-+                               exit(EXIT_FAILURE);
-+                       }
-+                       mode_nuke = 1;
-+                       break;
- 		case 'v':
- 			print_version();
- 			exit(EXIT_SUCCESS);
-@@ -2252,7 +2298,7 @@ int main(int argc, char *argv[])
- 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
- 			mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
- 			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
--			mode_gpr0_disable) > 1) {
-+			mode_gpr0_disable + mode_nuke) > 1) {
- 		fprintf(stderr, "You may not specify more than one mode.\n\n");
- 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
- 		exit(EXIT_FAILURE);
-@@ -2261,7 +2307,7 @@ int main(int argc, char *argv[])
- 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
- 			mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
- 			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
--			mode_validate + mode_gpr0_disable) == 0) {
-+			mode_validate + mode_gpr0_disable + mode_nuke) == 0) {
- 		fprintf(stderr, "You need to specify a mode.\n\n");
- 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
- 		exit(EXIT_FAILURE);
-@@ -2368,6 +2414,10 @@ int main(int argc, char *argv[])
- 		write_image(new_filename, image, size);
- 	}
- 
-+       if (mode_nuke) {
-+               nuke(new_filename, image, size, region_type);
-+       }
-+
- 	if (mode_altmedisable) {
- 		struct fpsba *fpsba = find_fpsba(image, size);
- 		struct fmsba *fmsba = find_fmsba(image, size);
--- 
-2.39.2
-
diff --git a/config/coreboot/dell/patches/0002-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch b/config/coreboot/dell/patches/0002-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
deleted file mode 100644
index b0ac4e67..00000000
--- a/config/coreboot/dell/patches/0002-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 362e86f89b3980699e7e794df9b98018397fe2d8 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Wed, 1 Dec 2021 02:53:00 +0000
-Subject: [PATCH 2/9] fix speedstep on x200/t400: Revert
- "cpu/intel/model_1067x: enable PECI"
-
-This reverts commit 70fea013c7ebd6d85a7806748233fcfd76802f5f.
-
-Enabling PECI without microcode updates loaded causes the CPUID feature set
-to become corrupted. And one consequence is broken SpeedStep. At least, that's
-my understanding looking at Intel Errata. This revert is not a fix, because
-upstream is correct (upstream assumes microcode updates). We will simply
-maintain this revert patch in Libreboot, from now on.
----
- src/cpu/intel/model_1067x/model_1067x_init.c | 9 ---------
- 1 file changed, 9 deletions(-)
-
-diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
-index 315e7c36fc..1423fd72bc 100644
---- a/src/cpu/intel/model_1067x/model_1067x_init.c
-+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
-@@ -141,8 +141,6 @@ static void configure_emttm_tables(void)
- 	wrmsr(MSR_EMTTM_CR_TABLE(5), msr);
- }
- 
--#define IA32_PECI_CTL		0x5a0
--
- static void configure_misc(const int eist, const int tm2, const int emttm)
- {
- 	msr_t msr;
-@@ -185,13 +183,6 @@ static void configure_misc(const int eist, const int tm2, const int emttm)
- 		msr.lo |= (1 << 20);	/* Lock Enhanced SpeedStep Enable */
- 		wrmsr(IA32_MISC_ENABLE, msr);
- 	}
--
--	/* Enable PECI
--	   WARNING: due to Erratum AW67 described in Intel document #318733
--	   the microcode must be updated before this MSR is written to. */
--	msr = rdmsr(IA32_PECI_CTL);
--	msr.lo |= 1;
--	wrmsr(IA32_PECI_CTL, msr);
- }
- 
- #define PIC_SENS_CFG	0x1aa
--- 
-2.39.2
-
diff --git a/config/coreboot/dell/patches/0003-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch b/config/coreboot/dell/patches/0003-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
deleted file mode 100644
index 3193ed97..00000000
--- a/config/coreboot/dell/patches/0003-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
+++ /dev/null
@@ -1,173 +0,0 @@
-From 883455573f07551eaf2b12ab80bedcd2b4904a17 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Mon, 17 Apr 2023 15:49:57 +0100
-Subject: [PATCH 3/9] GM45-type CPUs: don't enable alternative SMRR
-
-This reverts the changes in coreboot revision:
-df7aecd92643d207feaf7fd840f8835097346644
-
-While this fix is *technically correct*, the one in
-coreboot, it breaks rebooting as tested on several
-GM45 ThinkPads e.g. X200, T400, when microcode
-updates are not applied.
-
-Since November 2022, Libreboot includes microcode
-updates by default, but it tells users how to remove
-it from the ROM (with cbfstool) if they wish.
-
-Well, with Libreboot 20221214, 20230319 and 20230413,
-mitigations present in Libreboot 20220710 (which did
-not have microcode updates) do not exist.
-
-This patch, along with the other patch to remove PECI
-support (which breaks speedstep when microcode updates
-are not applied) have now been re-added to Libreboot.
-
-It is still best to use microcode updates by default.
-These patches in coreboot are not critically urgent,
-and you can use the machines with or without them,
-regardless of ucode.
-
-I'll probably re-write this and the other patch at
-some point, applying the change conditionally upon
-whether or not microcode is applied.
-
-Pragmatism is a good thing. I recommend it.
----
- src/cpu/intel/model_1067x/model_1067x_init.c |  4 +++
- src/cpu/intel/model_1067x/mp_init.c          | 26 --------------------
- src/cpu/intel/model_106cx/model_106cx_init.c |  4 +++
- src/cpu/intel/model_6ex/model_6ex_init.c     |  4 +++
- src/cpu/intel/model_6fx/model_6fx_init.c     |  4 +++
- 5 files changed, 16 insertions(+), 26 deletions(-)
-
-diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
-index 1423fd72bc..d1f98ca43a 100644
---- a/src/cpu/intel/model_1067x/model_1067x_init.c
-+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
-@@ -8,6 +8,7 @@
- #include <cpu/x86/cache.h>
- #include <cpu/x86/name.h>
- #include <cpu/intel/smm_reloc.h>
-+#include <cpu/intel/common/common.h>
- 
- #define MSR_BBL_CR_CTL3		0x11e
- 
-@@ -234,6 +235,9 @@ static void model_1067x_init(struct device *cpu)
- 	fill_processor_name(processor_name);
- 	printk(BIOS_INFO, "CPU: %s.\n", processor_name);
- 
-+	/* Set virtualization based on Kconfig option */
-+	set_vmx_and_lock();
-+
- 	/* Configure C States */
- 	configure_c_states(quad);
- 
-diff --git a/src/cpu/intel/model_1067x/mp_init.c b/src/cpu/intel/model_1067x/mp_init.c
-index bc53214310..72f40f6762 100644
---- a/src/cpu/intel/model_1067x/mp_init.c
-+++ b/src/cpu/intel/model_1067x/mp_init.c
-@@ -43,34 +43,8 @@ static void pre_mp_smm_init(void)
- 	smm_initialize();
- }
- 
--#define SMRR_SUPPORTED (1 << 11)
--
- static void per_cpu_smm_trigger(void)
- {
--	msr_t mtrr_cap = rdmsr(MTRR_CAP_MSR);
--	if (cpu_has_alternative_smrr() && mtrr_cap.lo & SMRR_SUPPORTED) {
--		set_feature_ctrl_vmx();
--		msr_t ia32_ft_ctrl = rdmsr(IA32_FEATURE_CONTROL);
--		/* We don't care if the lock is already setting
--		   as our smm relocation handler is able to handle
--		   setups where SMRR is not enabled here. */
--		if (ia32_ft_ctrl.lo & (1 << 0)) {
--			/* IA32_FEATURE_CONTROL locked. If we set it again we
--			   get an illegal instruction. */
--			printk(BIOS_DEBUG, "IA32_FEATURE_CONTROL already locked\n");
--			printk(BIOS_DEBUG, "SMRR status: %senabled\n",
--			       ia32_ft_ctrl.lo & (1 << 3) ? "" : "not ");
--		} else {
--			if (!CONFIG(SET_IA32_FC_LOCK_BIT))
--				printk(BIOS_INFO,
--				       "Overriding CONFIG(SET_IA32_FC_LOCK_BIT) to enable SMRR\n");
--			ia32_ft_ctrl.lo |= (1 << 3) | (1 << 0);
--			wrmsr(IA32_FEATURE_CONTROL, ia32_ft_ctrl);
--		}
--	} else {
--		set_vmx_and_lock();
--	}
--
- 	/* Relocate the SMM handler. */
- 	smm_relocate();
- }
-diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
-index 05f5f327cc..0450c2ad83 100644
---- a/src/cpu/intel/model_106cx/model_106cx_init.c
-+++ b/src/cpu/intel/model_106cx/model_106cx_init.c
-@@ -7,6 +7,7 @@
- #include <cpu/intel/speedstep.h>
- #include <cpu/x86/cache.h>
- #include <cpu/x86/name.h>
-+#include <cpu/intel/common/common.h>
- 
- #define HIGHEST_CLEVEL		3
- static void configure_c_states(void)
-@@ -66,6 +67,9 @@ static void model_106cx_init(struct device *cpu)
- 	fill_processor_name(processor_name);
- 	printk(BIOS_INFO, "CPU: %s.\n", processor_name);
- 
-+	/* Set virtualization based on Kconfig option */
-+	set_vmx_and_lock();
-+
- 	/* Configure C States */
- 	configure_c_states();
- 
-diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c
-index 5bd1c32815..f3bb08cde3 100644
---- a/src/cpu/intel/model_6ex/model_6ex_init.c
-+++ b/src/cpu/intel/model_6ex/model_6ex_init.c
-@@ -7,6 +7,7 @@
- #include <cpu/intel/speedstep.h>
- #include <cpu/x86/cache.h>
- #include <cpu/x86/name.h>
-+#include <cpu/intel/common/common.h>
- 
- #define HIGHEST_CLEVEL		3
- static void configure_c_states(void)
-@@ -105,6 +106,9 @@ static void model_6ex_init(struct device *cpu)
- 	/* Setup Page Attribute Tables (PAT) */
- 	// TODO set up PAT
- 
-+	/* Set virtualization based on Kconfig option */
-+	set_vmx_and_lock();
-+
- 	/* Configure C States */
- 	configure_c_states();
- 
-diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c
-index 535fb8fae7..f7b05facd2 100644
---- a/src/cpu/intel/model_6fx/model_6fx_init.c
-+++ b/src/cpu/intel/model_6fx/model_6fx_init.c
-@@ -7,6 +7,7 @@
- #include <cpu/intel/speedstep.h>
- #include <cpu/x86/cache.h>
- #include <cpu/x86/name.h>
-+#include <cpu/intel/common/common.h>
- 
- #define HIGHEST_CLEVEL		3
- static void configure_c_states(void)
-@@ -118,6 +119,9 @@ static void model_6fx_init(struct device *cpu)
- 	/* Setup Page Attribute Tables (PAT) */
- 	// TODO set up PAT
- 
-+	/* Set virtualization based on Kconfig option */
-+	set_vmx_and_lock();
-+
- 	/* Configure C States */
- 	configure_c_states();
- 
--- 
-2.39.2
-
diff --git a/config/coreboot/dell/patches/0004-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch b/config/coreboot/dell/patches/0004-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
deleted file mode 100644
index c9b41c79..00000000
--- a/config/coreboot/dell/patches/0004-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 458fe39e9cd2536cfa8671427e6f557396143339 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sat, 6 May 2023 15:53:41 -0600
-Subject: [PATCH 4/9] mb/dell/e6400: Enable 01.0 device in devicetree for dGPU
- models
-
-Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e6400/devicetree.cb | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/dell/e6400/devicetree.cb b/src/mainboard/dell/e6400/devicetree.cb
-index bb954cbd7b..e9f3915d17 100644
---- a/src/mainboard/dell/e6400/devicetree.cb
-+++ b/src/mainboard/dell/e6400/devicetree.cb
-@@ -19,7 +19,7 @@ chip northbridge/intel/gm45
- 		ops gm45_pci_domain_ops
- 
- 		device pci 00.0 on end # host bridge
--		device pci 01.0 off end
-+		device pci 01.0 on end
- 		device pci 02.0 on end # VGA
- 		device pci 02.1 on end # Display
- 		device pci 03.0 on end # ME
--- 
-2.39.2
-
diff --git a/config/coreboot/dell/patches/0005-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/dell/patches/0005-Remove-warning-for-coreboot-images-built-without-a-p.patch
deleted file mode 100644
index 546bad7f..00000000
--- a/config/coreboot/dell/patches/0005-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From de4eeaf6d44cb05c60c0b0d54b43cdb88686b998 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 5/9] Remove warning for coreboot images built without a
- payload
-
-I added this in upstream to prevent people from accidentally flashing
-roms without a payload resulting in a no boot situation, but in
-libreboot lbmk handles the payload and thus this warning always comes
-up. This has caused confusion and concern so just patch it out.
----
- payloads/Makefile.mk | 13 +------------
- 1 file changed, 1 insertion(+), 12 deletions(-)
-
-diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
-index a2336aa876..4f1692a873 100644
---- a/payloads/Makefile.mk
-+++ b/payloads/Makefile.mk
-@@ -49,16 +49,5 @@ distclean-payloads:
- print-repo-info-payloads:
- 	-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
- 
--ifeq ($(CONFIG_PAYLOAD_NONE),y)
--show_notices:: warn_no_payload
--endif
--
--warn_no_payload:
--	printf "\n\t** WARNING **\n"
--	printf "coreboot has been built without a payload. Writing\n"
--	printf "a coreboot image without a payload to your board's\n"
--	printf "flash chip will result in a non-booting system. You\n"
--	printf "can use cbfstool to add a payload to the image.\n\n"
--
- .PHONY: force-payload coreinfo nvramcui
--.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
-+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
--- 
-2.39.2
-
diff --git a/config/coreboot/dell/patches/0006-don-t-use-github-for-the-acpica-download.patch b/config/coreboot/dell/patches/0006-don-t-use-github-for-the-acpica-download.patch
deleted file mode 100644
index 3ee38c29..00000000
--- a/config/coreboot/dell/patches/0006-don-t-use-github-for-the-acpica-download.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 261454e47783b973b088e9dbea47bda02758dcb4 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 22 Oct 2023 15:02:25 +0100
-Subject: [PATCH 6/9] don't use github for the acpica download
-
-i have the tarball from a previous download, and i placed
-it on libreboot rsync, which then got mirrored to princeton.
-
-today, github's ssl cert was b0rking the hell out and i really
-really wanted to finish a build, and didn't want to wait for
-github to fix their httpd.
-
-so i'm now hosting this specific acpica tarball on rsync.
-
-this patch makes that URL be used, instead of the github one.
-
-that's the 2nd time i've had to patch coreboot's acpica download!
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 23a5caf2bb..36565a906c 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -72,7 +72,7 @@ MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
- MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
- GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
- BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
--IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
-+IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
- CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
--- 
-2.39.2
-
diff --git a/config/coreboot/dell/patches/0007-use-mirrorservice.org-for-gcc-downloads.patch b/config/coreboot/dell/patches/0007-use-mirrorservice.org-for-gcc-downloads.patch
deleted file mode 100644
index ff481081..00000000
--- a/config/coreboot/dell/patches/0007-use-mirrorservice.org-for-gcc-downloads.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 622daa7c46de01530de60a7be32c8b9e48b356fd Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 5 Nov 2023 22:57:08 +0000
-Subject: [PATCH 7/9] use mirrorservice.org for gcc downloads
-
-the gnu.org 302 redirect often fails
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 36565a906c..4d4ca06113 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -67,11 +67,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
- # to the jenkins build as well, or the builder won't download it.
- 
- # GCC toolchain archive locations
--GMP_BASE_URL="https://ftpmirror.gnu.org/gmp"
--MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
--MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
--GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
--BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
-+GMP_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp"
-+MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
-+MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
-+GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
-+BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
- IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
--- 
-2.39.2
-
diff --git a/config/coreboot/dell/patches/0009-dell-e6400-crank-up-vram-to-256MB-max.patch b/config/coreboot/dell/patches/0009-dell-e6400-crank-up-vram-to-256MB-max.patch
deleted file mode 100644
index 8d48bfd9..00000000
--- a/config/coreboot/dell/patches/0009-dell-e6400-crank-up-vram-to-256MB-max.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From f318da0563ecb2386ac368e04bad88a8aacbc83d Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Wed, 1 Nov 2023 16:33:11 +0000
-Subject: [PATCH 9/9] dell/e6400: crank up vram to 256MB (max)
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- src/mainboard/dell/e6400/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/dell/e6400/cmos.default b/src/mainboard/dell/e6400/cmos.default
-index eeb6f47364..25dfa38cb5 100644
---- a/src/mainboard/dell/e6400/cmos.default
-+++ b/src/mainboard/dell/e6400/cmos.default
-@@ -2,4 +2,4 @@ boot_option=Fallback
- debug_level=Debug
- power_on_after_fail=Disable
- sata_mode=AHCI
--gfx_uma_size=32M
-+gfx_uma_size=256M
--- 
-2.39.2
-
diff --git a/config/coreboot/dell/target.cfg b/config/coreboot/dell/target.cfg
deleted file mode 100644
index 45176407..00000000
--- a/config/coreboot/dell/target.cfg
+++ /dev/null
@@ -1,4 +0,0 @@
-tree="dell"
-tree_depend="default"
-xtree="default"
-rev="b6cbfa977f63d57d5d6b9e9f7c1cef30162f575a"
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
index e61318e4..70eca296 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,17 +126,36 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_VGA_BIOS=y
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_BOARD_DELL_E6400=y
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
@@ -152,6 +172,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_VGA_BIOS_FILE="../../../pciroms/pci10de,06eb.rom"
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -166,12 +187,13 @@ CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -212,9 +234,10 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 # CONFIG_VGA_BIOS_SECOND is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -223,7 +246,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -256,6 +278,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -326,7 +349,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -342,6 +365,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -443,6 +467,8 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -495,7 +521,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
index 8e0b0131..2f8769cb 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -123,17 +124,36 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_VGA_BIOS=y
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_BOARD_DELL_E6400=y
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
@@ -150,6 +170,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_VGA_BIOS_FILE="../../../pciroms/pci10de,06eb.rom"
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -164,12 +185,13 @@ CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -210,9 +232,10 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 # CONFIG_VGA_BIOS_SECOND is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -221,7 +244,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -254,6 +276,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -324,7 +347,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -340,6 +363,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -439,6 +463,8 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -491,7 +517,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index f6d540d5..98eb8d3b 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -1,4 +1,4 @@
-tree="dell"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/e6400nvidia_4mb/config/normal b/config/coreboot/e6400nvidia_4mb/config/normal
index 8cf79154..f5d6b16f 100644
--- a/config/coreboot/e6400nvidia_4mb/config/normal
+++ b/config/coreboot/e6400nvidia_4mb/config/normal
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -123,16 +124,35 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_VGA_BIOS=y
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_BOARD_DELL_E6400=y
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
@@ -149,6 +169,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_VGA_BIOS_FILE="../../../pciroms/pci10de,06eb.rom"
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -162,12 +183,13 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -208,9 +230,10 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
 # CONFIG_VGA_BIOS_SECOND is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -219,7 +242,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -252,6 +274,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -322,7 +345,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
 CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -338,6 +361,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -417,6 +441,8 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -469,7 +495,6 @@ CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
 CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
 
 #
 # Console
diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
index f6d540d5..98eb8d3b 100644
--- a/config/coreboot/e6400nvidia_4mb/target.cfg
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -1,4 +1,4 @@
-tree="dell"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
index 13b0fd5a..9a1af842 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
@@ -142,6 +142,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_txtmode b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
index cfe25366..d2bd1d3c 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
index 70213655..93499bad 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
@@ -142,6 +142,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_txtmode b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
index 4eda9794..3bbf7aaa 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
index cf2abe92..4faef26a 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
@@ -142,6 +142,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_txtmode b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
index 1eac7a90..21b32616 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
index d277e12f..2d7e0b54 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
@@ -142,6 +142,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_txtmode b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
index 5e38292c..8d437bd5 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
index 43bfafd7..bda47e12 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
@@ -142,6 +142,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_txtmode b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
index a6a8be5c..92866ae0 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
index d258e8d5..c25f6b21 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
@@ -142,6 +142,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_txtmode b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
index 3f2028e3..3eb566f6 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
index 076d088d..a23aa0d7 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
@@ -142,6 +142,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_txtmode b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
index fce03023..da7785f7 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
index 76083169..951668c7 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
@@ -142,6 +142,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_txtmode b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
index ce75ce58..c1ed36e9 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
index c04e512b..e090a1cc 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
@@ -142,6 +142,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_txtmode b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
index e6b554de..4d6a6fa9 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
index d9695250..2020124c 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
@@ -142,6 +142,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_txtmode b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
index 8d7ecfec..80830324 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
index 3e929c85..d8642c08 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
@@ -142,6 +142,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_txtmode b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
index e65abef7..6e094553 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
index 7b5733ee..0e2b4963 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
@@ -142,6 +142,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_txtmode b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
index 7af28108..bc35cd23 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
index f050f1aa..ed2cd9ef 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
@@ -142,6 +142,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_txtmode b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
index 41517ef0..e998c77b 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
index 88339de4..646aa044 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_txtmode b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
index f74b382d..dd4c7e97 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
@@ -138,6 +138,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
index 33320bc5..0a7710f4 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_txtmode b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
index ba2c3c41..68f067fa 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
@@ -138,6 +138,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
index 82a34881..15b698e4 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_txtmode b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
index e73d9800..2d2f81f2 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
@@ -138,6 +138,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
index b066681e..6120c2a8 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_txtmode b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
index 36942c01..96911b1e 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
@@ -138,6 +138,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
index e5931f9e..1600d752 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_txtmode b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
index e1eb3b54..6931179e 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
@@ -138,6 +138,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
index 9c2af247..c4aa7b1d 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
@@ -140,6 +140,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_txtmode b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
index ba96860c..7385ce0a 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
@@ -138,6 +138,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/submodule/coreboot/dell/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch b/config/submodule/coreboot/default/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
similarity index 88%
rename from config/submodule/coreboot/dell/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
rename to config/submodule/coreboot/default/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
index bb772461..2d248941 100644
--- a/config/submodule/coreboot/dell/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
+++ b/config/submodule/coreboot/default/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
@@ -1,7 +1,7 @@
-From 2c29f01a18d0a104bcc4f785e3901de584d02d7e Mon Sep 17 00:00:00 2001
+From ba078864500de99c26b6ea7e3fdcef19bca582a7 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 20 May 2024 10:10:03 -0600
-Subject: [PATCH] g45/hw-gfx-gma-plls.adb: Make reference clock frequency
+Subject: [PATCH 1/1] g45/hw-gfx-gma-plls.adb: Make reference clock frequency
  configurable
 
 Instead of assuming a 96 MHz reference clock frequency, use the value
@@ -16,7 +16,7 @@ Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
  1 file changed, 3 insertions(+), 1 deletion(-)
 
 diff --git a/common/g45/hw-gfx-gma-plls.adb b/common/g45/hw-gfx-gma-plls.adb
-index 67242f2..1aee576 100644
+index 67242f2..5e970d7 100644
 --- a/common/g45/hw-gfx-gma-plls.adb
 +++ b/common/g45/hw-gfx-gma-plls.adb
 @@ -12,6 +12,8 @@
@@ -38,5 +38,5 @@ index 67242f2..1aee576 100644
                 Valid             => Success);
           else
 -- 
-2.45.1
+2.39.2
 
diff --git a/config/submodule/coreboot/dell/intel-microcode/module.cfg b/config/submodule/coreboot/dell/intel-microcode/module.cfg
deleted file mode 100644
index 05a174b0..00000000
--- a/config/submodule/coreboot/dell/intel-microcode/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/intel-microcode.git"
-subrepo_bkup="https://github.com/coreboot/intel-microcode"
-subhash="ece0d294a29a1375397941a4e6f2f7217910bc89"
diff --git a/config/submodule/coreboot/dell/libgfxinit/module.cfg b/config/submodule/coreboot/dell/libgfxinit/module.cfg
deleted file mode 100644
index 7e2536f9..00000000
--- a/config/submodule/coreboot/dell/libgfxinit/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/libgfxinit.git"
-subrepo_bkup="https://github.com/coreboot/libgfxinit"
-subhash="a4be8a21b0e2c752da0042c79aae5942418f53e2"
diff --git a/config/submodule/coreboot/dell/libhwbase/module.cfg b/config/submodule/coreboot/dell/libhwbase/module.cfg
deleted file mode 100644
index 2937b8b7..00000000
--- a/config/submodule/coreboot/dell/libhwbase/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/libhwbase.git"
-subrepo_bkup="https://github.com/coreboot/libhwbase"
-subhash="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/dell/module.list b/config/submodule/coreboot/dell/module.list
deleted file mode 100644
index 3d968b1a..00000000
--- a/config/submodule/coreboot/dell/module.list
+++ /dev/null
@@ -1,4 +0,0 @@
-3rdparty/intel-microcode
-3rdparty/libgfxinit
-3rdparty/libhwbase
-3rdparty/vboot
diff --git a/config/submodule/coreboot/dell/vboot/module.cfg b/config/submodule/coreboot/dell/vboot/module.cfg
deleted file mode 100644
index 9a23ee96..00000000
--- a/config/submodule/coreboot/dell/vboot/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/vboot.git"
-subrepo_bkup="https://github.com/coreboot/vboot"
-subhash="3d37d2aafe1f941c532def2a1fbbb58c8dd84182"
diff --git a/config/submodule/coreboot/dell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/dell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
deleted file mode 100644
index 1ac41de6..00000000
--- a/config/submodule/coreboot/dell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
+++ /dev/null
@@ -1,178 +0,0 @@
-From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
-From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
-Date: Thu, 30 May 2024 14:08:33 -0600
-Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
- vmlinuz_header_{offset,size}
-
-The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
-wrong:
-
-	if (!vmlinuz_header_size ||
-	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
-	    kpart_data) {
-		return 1;
-	}
-
-`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
-unless something has overflowed!  And `vmlinuz_header_offset` hasn't even
-been set yet (besides being initialized to zero)!
-
-GCC will deduce that if the check didn't cause the function to bail, then
-vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
-[2GiB,4GiB).
-
-On platforms where size_t is 32-bits, this is *especially* broken.
-memcpy's size argument must be in the range [0,2GiB).  Because GCC has
-proved that vmlinuz_header_size is higher than that, it will fail to
-compile:
-
-	host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
-
-So, fix the check.
-
-I can now say that what I suspect the original author meant to write would
-be the following patch, if `vmlinuz_header_offset` were already set:
-
-	-kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
-	+now        + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
-
-This hypothesis is supported by `now` not getting incremented by
-`kblob_size` the way it is for the keyblock and preamble sizes.
-
-However, we can also see that even this "corrected" bounds check is
-insufficient: it does not detect the vmlinuz_header overflowing into
-kblob_data.
-
-OK, so let's describe the fix:
-
-Have a `*vmlinuz_header` pointer instead of a
-`uint64_t vmlinuz_header_offset`, to be more similar to all the other
-regions.  With this change, the correct check becomes a simple
-
-      vmlinuz_header + vmlinuz_header_size > kblob_data
-
-While we're at it, make some changes that could have helped avoid this in
-the first place:
-
- - Add comments.
- - Calculate the vmlinuz_header offset right away, instead of waiting.
- - Go ahead and increment `now` by `kblob_size`, to increase regularity.
-
-Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
----
- host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
- 1 file changed, 51 insertions(+), 21 deletions(-)
-
-diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
-index 4ccfcf33..d2c09443 100644
---- a/host/lib/extract_vmlinuz.c
-+++ b/host/lib/extract_vmlinuz.c
-@@ -15,16 +15,44 @@
- 
- int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
- 		   void **vmlinuz_out, size_t *vmlinuz_size) {
-+	// We're going to be extracting `vmlinuz_header` and
-+	// `kblob_data`, and returning the concatenation of them.
-+	//
-+	// kpart_data = +-[kpart_size]------------------------------------+
-+	//              |                                                 |
-+	//  keyblock  = | +-[keyblock->keyblock_size]-------------------+ |
-+	//              | | struct vb2_keyblock          keyblock       | |
-+	//              | | char []                      ...data...     | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//  preamble  = | +-[preamble->preamble_size]-------------------+ |
-+	//              | | struct vb2_kernel_preamble   preamble       | |
-+	//              | | char []                       ...data...    | |
-+	//              | | char []                      vmlinuz_header | |
-+	//              | | char []                       ...data...    | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//  kblob_data= | +-[preamble->body_signature.data_size]--------+ |
-+	//              | | char []                       ...data...    | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//              +-------------------------------------------------+
-+
- 	size_t now = 0;
-+	// The 3 sections of kpart_data.
-+	struct vb2_keyblock *keyblock = NULL;
- 	struct vb2_kernel_preamble *preamble = NULL;
- 	uint8_t *kblob_data = NULL;
- 	uint32_t kblob_size = 0;
-+	// vmlinuz_header
-+	uint8_t *vmlinuz_header = NULL;
- 	uint32_t vmlinuz_header_size = 0;
--	uint64_t vmlinuz_header_address = 0;
--	uint64_t vmlinuz_header_offset = 0;
-+	// The concatenated result.
- 	void *vmlinuz = NULL;
- 
--	struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
-+	// Isolate the 3 sections of kpart_data.
-+
-+	keyblock = (struct vb2_keyblock *)kpart_data;
- 	now += keyblock->keyblock_size;
- 	if (now > kpart_size)
- 		return 1;
-@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
- 
- 	kblob_data = kpart_data + now;
- 	kblob_size = preamble->body_signature.data_size;
--
--	if (!kblob_data || (now + kblob_size) > kpart_size)
-+	now += kblob_size;
-+	if (now > kpart_size)
- 		return 1;
- 
-+	// Find `vmlinuz_header` within `preamble`.
-+
- 	if (preamble->header_version_minor > 0) {
--		vmlinuz_header_address = preamble->vmlinuz_header_address;
-+		// calculate the vmlinuz_header offset from
-+		// the beginning of the kpart_data.  The kblob doesn't
-+		// include the body_load_offset, but does include
-+		// the keyblock and preamble sections.
-+		size_t vmlinuz_header_offset =
-+			preamble->vmlinuz_header_address -
-+			preamble->body_load_address +
-+			keyblock->keyblock_size +
-+			preamble->preamble_size;
-+
-+		vmlinuz_header = kpart_data + vmlinuz_header_offset;
- 		vmlinuz_header_size = preamble->vmlinuz_header_size;
- 	}
- 
--	if (!vmlinuz_header_size ||
--	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
--	    kpart_data) {
-+	if (!vmlinuz_header ||
-+	    !vmlinuz_header_size ||
-+	    vmlinuz_header + vmlinuz_header_size > kblob_data) {
- 		return 1;
- 	}
- 
--	// calculate the vmlinuz_header offset from
--	// the beginning of the kpart_data.  The kblob doesn't
--	// include the body_load_offset, but does include
--	// the keyblock and preamble sections.
--	vmlinuz_header_offset = vmlinuz_header_address -
--		preamble->body_load_address +
--		keyblock->keyblock_size +
--		preamble->preamble_size;
-+	// Concatenate and return.
- 
- 	vmlinuz = malloc(vmlinuz_header_size + kblob_size);
- 	if (vmlinuz == NULL)
- 		return 1;
--
--	memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
--	       vmlinuz_header_size);
--
-+	memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
- 	memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
- 
- 	*vmlinuz_out = vmlinuz;
--- 
-2.45.1
-

From 877f5d6aeb6a1a62f09c95cc214c874d057310d6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 10 Aug 2024 14:43:19 +0100
Subject: [PATCH 0801/1549] coreboot/default: merge coreboot/haswell

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../0043-haswell-NRI-Initialise-MPLL.patch}   |  10 +-
 ...l-NRI-Post-process-selected-timings.patch} |  12 +-
 ...l-NRI-Configure-initial-MC-settings.patch} |  15 +-
 ...NRI-Add-timings-refresh-programming.patch} |  10 +-
 ...0047-haswell-NRI-Program-memory-map.patch} |   8 +-
 ...l-NRI-Add-DDR3-JEDEC-reset-and-init.patch} |  20 +-
 ...-haswell-NRI-Add-pre-training-steps.patch} |  10 +-
 ...swell-NRI-Add-REUT-I-O-test-library.patch} |  12 +-
 ...well-NRI-Add-range-tracking-library.patch} |   4 +-
 ...l-NRI-Add-library-to-change-margins.patch} |  10 +-
 ...0053-haswell-NRI-Add-RcvEn-training.patch} |  16 +-
 ...-NRI-Add-function-to-change-margins.patch} |  12 +-
 ...5-haswell-NRI-Add-read-MPR-training.patch} |  12 +-
 ...0056-haswell-NRI-Add-write-leveling.patch} |  14 +-
 ...haswell-NRI-Add-final-raminit-steps.patch} |   8 +-
 ...aswell-NRI-Implement-fast-boot-path.patch} |  16 +-
 ...-Do-sense-amplifier-offset-training.patch} |  16 +-
 .../config/libgfxinit_corebootfb              |  33 +-
 .../config/libgfxinit_txtmode                 |  33 +-
 .../coreboot/dell9020mt_nri_12mb/target.cfg   |   2 +-
 .../config/libgfxinit_corebootfb              |  33 +-
 .../config/libgfxinit_txtmode                 |  33 +-
 .../coreboot/dell9020sff_nri_12mb/target.cfg  |   2 +-
 ...or-coreboot-images-built-without-a-p.patch |  39 --
 ...-mirrorservice.org-for-gcc-downloads.patch |  36 --
 ...ool-add-nuke-flag-all-0xFF-on-region.patch | 204 ------
 ...-haswell-make-IOMMU-a-runtime-option.patch | 292 ---------
 ...tiplex_9020-Disable-IOMMU-by-default.patch |  29 -
 ..._9020-Implement-late-HWM-initializat.patch | 602 ------------------
 ...Fully-disable-iGPU-when-dGPU-is-used.patch |  51 --
 ...x_9020-Add-support-for-TPM1.2-device.patch |  49 --
 ...mirrorservice.org-for-iasl-downloads.patch |  28 -
 ...ock-policy-regs-when-disabling-IOMMU.patch |  55 --
 ...-Synchronize-lists-of-graphics-PCI-I.patch |  44 --
 ..._9020-Fix-integrated-video-port-list.patch |  30 -
 config/coreboot/haswell/target.cfg            |   2 -
 .../config/libgfxinit_corebootfb              |  22 +-
 .../config/libgfxinit_txtmode                 |  22 +-
 config/coreboot/t440plibremrc_12mb/target.cfg |   2 +-
 .../w541_12mb/config/libgfxinit_corebootfb    |  22 +-
 .../w541_12mb/config/libgfxinit_txtmode       |  22 +-
 config/coreboot/w541_12mb/target.cfg          |   2 +-
 42 files changed, 275 insertions(+), 1619 deletions(-)
 rename config/coreboot/{haswell/patches/0001-haswell-NRI-Initialise-MPLL.patch => default/patches/0043-haswell-NRI-Initialise-MPLL.patch} (98%)
 rename config/coreboot/{haswell/patches/0002-haswell-NRI-Post-process-selected-timings.patch => default/patches/0044-haswell-NRI-Post-process-selected-timings.patch} (96%)
 rename config/coreboot/{haswell/patches/0003-haswell-NRI-Configure-initial-MC-settings.patch => default/patches/0045-haswell-NRI-Configure-initial-MC-settings.patch} (99%)
 rename config/coreboot/{haswell/patches/0004-haswell-NRI-Add-timings-refresh-programming.patch => default/patches/0046-haswell-NRI-Add-timings-refresh-programming.patch} (98%)
 rename config/coreboot/{haswell/patches/0005-haswell-NRI-Program-memory-map.patch => default/patches/0047-haswell-NRI-Program-memory-map.patch} (97%)
 rename config/coreboot/{haswell/patches/0006-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch => default/patches/0048-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch} (98%)
 rename config/coreboot/{haswell/patches/0007-haswell-NRI-Add-pre-training-steps.patch => default/patches/0049-haswell-NRI-Add-pre-training-steps.patch} (98%)
 rename config/coreboot/{haswell/patches/0008-haswell-NRI-Add-REUT-I-O-test-library.patch => default/patches/0050-haswell-NRI-Add-REUT-I-O-test-library.patch} (99%)
 rename config/coreboot/{haswell/patches/0009-haswell-NRI-Add-range-tracking-library.patch => default/patches/0051-haswell-NRI-Add-range-tracking-library.patch} (98%)
 rename config/coreboot/{haswell/patches/0010-haswell-NRI-Add-library-to-change-margins.patch => default/patches/0052-haswell-NRI-Add-library-to-change-margins.patch} (97%)
 rename config/coreboot/{haswell/patches/0011-haswell-NRI-Add-RcvEn-training.patch => default/patches/0053-haswell-NRI-Add-RcvEn-training.patch} (98%)
 rename config/coreboot/{haswell/patches/0012-haswell-NRI-Add-function-to-change-margins.patch => default/patches/0054-haswell-NRI-Add-function-to-change-margins.patch} (96%)
 rename config/coreboot/{haswell/patches/0013-haswell-NRI-Add-read-MPR-training.patch => default/patches/0055-haswell-NRI-Add-read-MPR-training.patch} (97%)
 rename config/coreboot/{haswell/patches/0014-haswell-NRI-Add-write-leveling.patch => default/patches/0056-haswell-NRI-Add-write-leveling.patch} (98%)
 rename config/coreboot/{haswell/patches/0015-haswell-NRI-Add-final-raminit-steps.patch => default/patches/0057-haswell-NRI-Add-final-raminit-steps.patch} (98%)
 rename config/coreboot/{haswell/patches/0016-Haswell-NRI-Implement-fast-boot-path.patch => default/patches/0058-Haswell-NRI-Implement-fast-boot-path.patch} (98%)
 rename config/coreboot/{haswell/patches/0017-haswell-NRI-Do-sense-amplifier-offset-training.patch => default/patches/0059-haswell-NRI-Do-sense-amplifier-offset-training.patch} (97%)
 delete mode 100644 config/coreboot/haswell/patches/0018-Remove-warning-for-coreboot-images-built-without-a-p.patch
 delete mode 100644 config/coreboot/haswell/patches/0019-use-mirrorservice.org-for-gcc-downloads.patch
 delete mode 100644 config/coreboot/haswell/patches/0020-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
 delete mode 100644 config/coreboot/haswell/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
 delete mode 100644 config/coreboot/haswell/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch
 delete mode 100644 config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
 delete mode 100644 config/coreboot/haswell/patches/0024-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
 delete mode 100644 config/coreboot/haswell/patches/0025-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
 delete mode 100644 config/coreboot/haswell/patches/0026-use-mirrorservice.org-for-iasl-downloads.patch
 delete mode 100644 config/coreboot/haswell/patches/0027-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
 delete mode 100644 config/coreboot/haswell/patches/0028-nb-intel-haswell-Synchronize-lists-of-graphics-PCI-I.patch
 delete mode 100644 config/coreboot/haswell/patches/0029-mb-dell-optiplex_9020-Fix-integrated-video-port-list.patch
 delete mode 100644 config/coreboot/haswell/target.cfg

diff --git a/config/coreboot/haswell/patches/0001-haswell-NRI-Initialise-MPLL.patch b/config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch
similarity index 98%
rename from config/coreboot/haswell/patches/0001-haswell-NRI-Initialise-MPLL.patch
rename to config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch
index 0de1a4ec..9b733998 100644
--- a/config/coreboot/haswell/patches/0001-haswell-NRI-Initialise-MPLL.patch
+++ b/config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch
@@ -1,7 +1,7 @@
-From cce5392f272b0acc493f47f9b5ca3cf90ce901e8 Mon Sep 17 00:00:00 2001
+From 8b584165a99c69cc808f86efcdd55acb06a4464c Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Thu, 11 Apr 2024 17:25:07 +0200
-Subject: [PATCH 01/20] haswell NRI: Initialise MPLL
+Subject: [PATCH 01/17] haswell NRI: Initialise MPLL
 
 Add code to initialise the MPLL (Memory PLL). The procedure is similar
 to the one for Sandy/Ivy Bridge, but it is not worth factoring out.
@@ -290,10 +290,10 @@ index 19ec5859ac..bf745e943f 100644
  
  /* Return a generic stepping value to make stepping checks simpler */
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 1a0793947e..a54581abc7 100644
+index 8078c9c386..15a1550424 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -23,6 +23,8 @@ enum raminit_status {
+@@ -24,6 +24,8 @@ enum raminit_status {
  	RAMINIT_STATUS_SUCCESS = 0,
  	RAMINIT_STATUS_NO_MEMORY_INSTALLED,
  	RAMINIT_STATUS_UNSUPPORTED_MEMORY,
@@ -302,7 +302,7 @@ index 1a0793947e..a54581abc7 100644
  	RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
  };
  
-@@ -82,10 +84,19 @@ struct sysinfo {
+@@ -83,10 +85,19 @@ struct sysinfo {
  	uint8_t rankmap[NUM_CHANNELS];
  	uint8_t rank_mirrored[NUM_CHANNELS];
  	uint32_t channel_size_mb[NUM_CHANNELS];
diff --git a/config/coreboot/haswell/patches/0002-haswell-NRI-Post-process-selected-timings.patch b/config/coreboot/default/patches/0044-haswell-NRI-Post-process-selected-timings.patch
similarity index 96%
rename from config/coreboot/haswell/patches/0002-haswell-NRI-Post-process-selected-timings.patch
rename to config/coreboot/default/patches/0044-haswell-NRI-Post-process-selected-timings.patch
index 0cc95cdd..924385ed 100644
--- a/config/coreboot/haswell/patches/0002-haswell-NRI-Post-process-selected-timings.patch
+++ b/config/coreboot/default/patches/0044-haswell-NRI-Post-process-selected-timings.patch
@@ -1,7 +1,7 @@
-From 42b21fdce8c8bade53d9d86515f88b0665a4c1b1 Mon Sep 17 00:00:00 2001
+From adde2e8d038b2d07ab7287eedab5888d92a56a60 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 16:29:55 +0200
-Subject: [PATCH 02/20] haswell NRI: Post-process selected timings
+Subject: [PATCH 02/17] haswell NRI: Post-process selected timings
 
 Once the MPLL has been initialised, convert the timings from the SPD to
 be in DCLKs, which is what the hardware expects. In addition, calculate
@@ -110,10 +110,10 @@ index bf745e943f..2fea658415 100644
  
  /* Return a generic stepping value to make stepping checks simpler */
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index a54581abc7..01e5ed1bd6 100644
+index 15a1550424..e0ebd3a2a7 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -78,6 +78,9 @@ struct sysinfo {
+@@ -79,6 +79,9 @@ struct sysinfo {
  	uint32_t tCWL;
  	uint32_t tCMD;
  
@@ -123,7 +123,7 @@ index a54581abc7..01e5ed1bd6 100644
  	uint8_t lanes;			/* 8 or 9 */
  	uint8_t chanmap;
  	uint8_t dpc[NUM_CHANNELS];	/* DIMMs per channel */
-@@ -96,7 +99,12 @@ void raminit_main(enum raminit_boot_mode bootmode);
+@@ -97,7 +100,12 @@ void raminit_main(enum raminit_boot_mode bootmode);
  
  enum raminit_status collect_spd_info(struct sysinfo *ctrl);
  enum raminit_status initialise_mpll(struct sysinfo *ctrl);
@@ -137,7 +137,7 @@ index a54581abc7..01e5ed1bd6 100644
 +
  #endif
 diff --git a/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c b/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c
-index 2dab8504c4..7d98341a7e 100644
+index eff993800b..4f7fe46494 100644
 --- a/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c
 +++ b/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c
 @@ -204,3 +204,103 @@ enum raminit_status collect_spd_info(struct sysinfo *ctrl)
diff --git a/config/coreboot/haswell/patches/0003-haswell-NRI-Configure-initial-MC-settings.patch b/config/coreboot/default/patches/0045-haswell-NRI-Configure-initial-MC-settings.patch
similarity index 99%
rename from config/coreboot/haswell/patches/0003-haswell-NRI-Configure-initial-MC-settings.patch
rename to config/coreboot/default/patches/0045-haswell-NRI-Configure-initial-MC-settings.patch
index f44eb029..b51839d2 100644
--- a/config/coreboot/haswell/patches/0003-haswell-NRI-Configure-initial-MC-settings.patch
+++ b/config/coreboot/default/patches/0045-haswell-NRI-Configure-initial-MC-settings.patch
@@ -1,7 +1,7 @@
-From 574f4965976b56f98a825dea71e919fefb2c8547 Mon Sep 17 00:00:00 2001
+From 0001039f5ea6be6700a453f511069be2ce1b4e7e Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 17:22:07 +0200
-Subject: [PATCH 03/20] haswell NRI: Configure initial MC settings
+Subject: [PATCH 03/17] haswell NRI: Configure initial MC settings
 
 Program initial memory controller settings. Many of these values will be
 adjusted later during training.
@@ -885,10 +885,10 @@ index 2fea658415..fcc981ad04 100644
  	ctrl->bootmode = bootmode;
  }
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 01e5ed1bd6..aa86b9aa39 100644
+index e0ebd3a2a7..fffa6d5450 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -3,15 +3,40 @@
+@@ -3,16 +3,41 @@
  #ifndef HASWELL_RAMINIT_NATIVE_H
  #define HASWELL_RAMINIT_NATIVE_H
  
@@ -900,7 +900,8 @@ index 01e5ed1bd6..aa86b9aa39 100644
 +
 +#include "reg_structs.h"
  
- #define SPD_LEN 256
+ /** TODO (Angel): Remove this after in-review patches are submitted **/
+ #define SPD_LEN SPD_SIZE_MAX_DDR3
  
 +/* Each channel has 4 ranks, spread across 2 slots */
 +#define NUM_SLOTRANKS		4
@@ -929,7 +930,7 @@ index 01e5ed1bd6..aa86b9aa39 100644
  enum raminit_boot_mode {
  	BOOTMODE_COLD,
  	BOOTMODE_WARM,
-@@ -57,6 +82,9 @@ struct sysinfo {
+@@ -58,6 +83,9 @@ struct sysinfo {
  	 * LPDDR-specific functions have stubs which will halt upon execution.
  	 */
  	bool lpddr;
@@ -939,7 +940,7 @@ index 01e5ed1bd6..aa86b9aa39 100644
  
  	struct raminit_dimm_info dimms[NUM_CHANNELS][NUM_SLOTS];
  	union dimm_flags_ddr3_st flags;
-@@ -93,16 +121,89 @@ struct sysinfo {
+@@ -94,16 +122,89 @@ struct sysinfo {
  	uint32_t mem_clock_mhz;
  	uint32_t mem_clock_fs;		/* Memory clock period in femtoseconds */
  	uint32_t qclkps;		/* Quadrature clock period in picoseconds */
diff --git a/config/coreboot/haswell/patches/0004-haswell-NRI-Add-timings-refresh-programming.patch b/config/coreboot/default/patches/0046-haswell-NRI-Add-timings-refresh-programming.patch
similarity index 98%
rename from config/coreboot/haswell/patches/0004-haswell-NRI-Add-timings-refresh-programming.patch
rename to config/coreboot/default/patches/0046-haswell-NRI-Add-timings-refresh-programming.patch
index 74c21227..2b8b453e 100644
--- a/config/coreboot/haswell/patches/0004-haswell-NRI-Add-timings-refresh-programming.patch
+++ b/config/coreboot/default/patches/0046-haswell-NRI-Add-timings-refresh-programming.patch
@@ -1,7 +1,7 @@
-From d94843c7c0e25cb6da4040b845556034fdb0e2c3 Mon Sep 17 00:00:00 2001
+From 44032c7df6f4537c43ba80ae2f4a239616bd8d2d Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 20:59:58 +0200
-Subject: [PATCH 04/20] haswell NRI: Add timings/refresh programming
+Subject: [PATCH 04/17] haswell NRI: Add timings/refresh programming
 
 Program the registers with timing and refresh parameters.
 
@@ -126,10 +126,10 @@ index 8b81c7c341..b8d6c1ef40 100644
 +	return DIV_ROUND_UP(get_tZQOPER(mem_clock_mhz, lpddr), 4);
 +}
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index aa86b9aa39..cd1f2eb2a5 100644
+index fffa6d5450..5915a2bab0 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -155,6 +155,12 @@ struct sysinfo {
+@@ -156,6 +156,12 @@ struct sysinfo {
  	uint8_t cke_cmd_pi_code[NUM_CHANNELS][NUM_GROUPS];
  	uint8_t cmd_north_pi_code[NUM_CHANNELS][NUM_GROUPS];
  	uint8_t cmd_south_pi_code[NUM_CHANNELS][NUM_GROUPS];
@@ -142,7 +142,7 @@ index aa86b9aa39..cd1f2eb2a5 100644
  };
  
  static inline bool is_hsw_ult(void)
-@@ -200,6 +206,14 @@ enum raminit_status configure_mc(struct sysinfo *ctrl);
+@@ -201,6 +207,14 @@ enum raminit_status configure_mc(struct sysinfo *ctrl);
  void configure_timings(struct sysinfo *ctrl);
  void configure_refresh(struct sysinfo *ctrl);
  
diff --git a/config/coreboot/haswell/patches/0005-haswell-NRI-Program-memory-map.patch b/config/coreboot/default/patches/0047-haswell-NRI-Program-memory-map.patch
similarity index 97%
rename from config/coreboot/haswell/patches/0005-haswell-NRI-Program-memory-map.patch
rename to config/coreboot/default/patches/0047-haswell-NRI-Program-memory-map.patch
index e095417c..5628286a 100644
--- a/config/coreboot/haswell/patches/0005-haswell-NRI-Program-memory-map.patch
+++ b/config/coreboot/default/patches/0047-haswell-NRI-Program-memory-map.patch
@@ -1,7 +1,7 @@
-From b872fb9fc10d1789989072b8533b797152e6cb54 Mon Sep 17 00:00:00 2001
+From 406e474c7f9f83dc10c7c0fa7cd9765ae822ad4e Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 21:24:50 +0200
-Subject: [PATCH 05/20] haswell NRI: Program memory map
+Subject: [PATCH 05/17] haswell NRI: Program memory map
 
 This is very similar to Sandy/Ivy Bridge, except that there's several
 registers to program in GDXCBAR. One of these GDXCBAR registers has a
@@ -234,10 +234,10 @@ index fcc981ad04..559dfc3a4e 100644
  
  /* Return a generic stepping value to make stepping checks simpler */
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index cd1f2eb2a5..4763b25e8d 100644
+index 5915a2bab0..8f937c4ccd 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -202,6 +202,7 @@ enum raminit_status collect_spd_info(struct sysinfo *ctrl);
+@@ -203,6 +203,7 @@ enum raminit_status collect_spd_info(struct sysinfo *ctrl);
  enum raminit_status initialise_mpll(struct sysinfo *ctrl);
  enum raminit_status convert_timings(struct sysinfo *ctrl);
  enum raminit_status configure_mc(struct sysinfo *ctrl);
diff --git a/config/coreboot/haswell/patches/0006-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch b/config/coreboot/default/patches/0048-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
similarity index 98%
rename from config/coreboot/haswell/patches/0006-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
rename to config/coreboot/default/patches/0048-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
index ea46364f..9f074e17 100644
--- a/config/coreboot/haswell/patches/0006-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
+++ b/config/coreboot/default/patches/0048-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
@@ -1,7 +1,7 @@
-From 1ea9b05694da7ee61d49d9cd2b7e533a98e42321 Mon Sep 17 00:00:00 2001
+From eb8150a07c472078ad37887de13a166e6cf8bdad Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 21:49:40 +0200
-Subject: [PATCH 06/20] haswell NRI: Add DDR3 JEDEC reset and init
+Subject: [PATCH 06/17] haswell NRI: Add DDR3 JEDEC reset and init
 
 Implement JEDEC reset and init sequence for DDR3. The MRS commands are
 issued through the REUT (Robust Electrical Unified Testing) hardware.
@@ -443,10 +443,10 @@ index 559dfc3a4e..94b268468c 100644
  }
  
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 4763b25e8d..4bc2a4955f 100644
+index 8f937c4ccd..759d755d6d 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -27,6 +27,30 @@
+@@ -28,6 +28,30 @@
  /* Always use 12 legs for emphasis (not trained) */
  #define TXEQFULLDRV		(3 << 4)
  
@@ -477,7 +477,7 @@ index 4763b25e8d..4bc2a4955f 100644
  enum command_training_iteration {
  	CT_ITERATION_CLOCK = 0,
  	CT_ITERATION_CMD_NORTH,
-@@ -50,6 +74,7 @@ enum raminit_status {
+@@ -51,6 +75,7 @@ enum raminit_status {
  	RAMINIT_STATUS_UNSUPPORTED_MEMORY,
  	RAMINIT_STATUS_MPLL_INIT_FAILURE,
  	RAMINIT_STATUS_POLL_TIMEOUT,
@@ -485,7 +485,7 @@ index 4763b25e8d..4bc2a4955f 100644
  	RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
  };
  
-@@ -72,6 +97,7 @@ struct sysinfo {
+@@ -73,6 +98,7 @@ struct sysinfo {
  	uint32_t cpu;		/* CPUID value */
  
  	bool dq_pins_interleaved;
@@ -493,7 +493,7 @@ index 4763b25e8d..4bc2a4955f 100644
  
  	/** TODO: ECC support untested **/
  	bool is_ecc;
-@@ -161,6 +187,11 @@ struct sysinfo {
+@@ -162,6 +188,11 @@ struct sysinfo {
  	union tc_bank_rank_b_reg tc_bankrank_b[NUM_CHANNELS];
  	union tc_bank_rank_c_reg tc_bankrank_c[NUM_CHANNELS];
  	union tc_bank_rank_d_reg tc_bankrank_d[NUM_CHANNELS];
@@ -505,7 +505,7 @@ index 4763b25e8d..4bc2a4955f 100644
  };
  
  static inline bool is_hsw_ult(void)
-@@ -196,6 +227,53 @@ static inline void clear_data_offset_train_all(struct sysinfo *ctrl)
+@@ -197,6 +228,53 @@ static inline void clear_data_offset_train_all(struct sysinfo *ctrl)
  	memset(ctrl->data_offset_train, 0, sizeof(ctrl->data_offset_train));
  }
  
@@ -559,7 +559,7 @@ index 4763b25e8d..4bc2a4955f 100644
  void raminit_main(enum raminit_boot_mode bootmode);
  
  enum raminit_status collect_spd_info(struct sysinfo *ctrl);
-@@ -203,6 +281,7 @@ enum raminit_status initialise_mpll(struct sysinfo *ctrl);
+@@ -204,6 +282,7 @@ enum raminit_status initialise_mpll(struct sysinfo *ctrl);
  enum raminit_status convert_timings(struct sysinfo *ctrl);
  enum raminit_status configure_mc(struct sysinfo *ctrl);
  enum raminit_status configure_memory_map(struct sysinfo *ctrl);
@@ -567,7 +567,7 @@ index 4763b25e8d..4bc2a4955f 100644
  
  void configure_timings(struct sysinfo *ctrl);
  void configure_refresh(struct sysinfo *ctrl);
-@@ -215,8 +294,28 @@ uint32_t get_tXS_offset(uint32_t mem_clock_mhz);
+@@ -216,8 +295,28 @@ uint32_t get_tXS_offset(uint32_t mem_clock_mhz);
  uint32_t get_tZQOPER(uint32_t mem_clock_mhz, bool lpddr);
  uint32_t get_tZQCS(uint32_t mem_clock_mhz, bool lpddr);
  
diff --git a/config/coreboot/haswell/patches/0007-haswell-NRI-Add-pre-training-steps.patch b/config/coreboot/default/patches/0049-haswell-NRI-Add-pre-training-steps.patch
similarity index 98%
rename from config/coreboot/haswell/patches/0007-haswell-NRI-Add-pre-training-steps.patch
rename to config/coreboot/default/patches/0049-haswell-NRI-Add-pre-training-steps.patch
index 8b73df88..c6beea66 100644
--- a/config/coreboot/haswell/patches/0007-haswell-NRI-Add-pre-training-steps.patch
+++ b/config/coreboot/default/patches/0049-haswell-NRI-Add-pre-training-steps.patch
@@ -1,7 +1,7 @@
-From 936d432822fcd9aa2f018444cdc89e48e6d257d5 Mon Sep 17 00:00:00 2001
+From 19890277e3a0d411b016efbe1b54e511d4f36c0d Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 23:12:18 +0200
-Subject: [PATCH 07/20] haswell NRI: Add pre-training steps
+Subject: [PATCH 07/17] haswell NRI: Add pre-training steps
 
 Implement pre-training steps, which consist of enabling ECC I/O and
 filling the WDB (Write Data Buffer, stores test patterns) through a
@@ -91,10 +91,10 @@ index 94b268468c..5e4674957d 100644
  
  /* Return a generic stepping value to make stepping checks simpler */
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 4bc2a4955f..1971b44b66 100644
+index 759d755d6d..4d9487d79c 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -35,6 +35,13 @@
+@@ -36,6 +36,13 @@
  
  #define RTTNOM_MASK		(BIT(9) | BIT(6) | BIT(2))
  
@@ -108,7 +108,7 @@ index 4bc2a4955f..1971b44b66 100644
  /* ZQ calibration types */
  enum {
  	ZQ_INIT,	/* DDR3: ZQCL with tZQinit, LPDDR3: ZQ Init  with tZQinit  */
-@@ -316,6 +323,23 @@ void reut_issue_mrs_all(
+@@ -317,6 +324,23 @@ void reut_issue_mrs_all(
  
  enum raminit_status reut_issue_zq(struct sysinfo *ctrl, uint8_t chanmask, uint8_t zq_type);
  
diff --git a/config/coreboot/haswell/patches/0008-haswell-NRI-Add-REUT-I-O-test-library.patch b/config/coreboot/default/patches/0050-haswell-NRI-Add-REUT-I-O-test-library.patch
similarity index 99%
rename from config/coreboot/haswell/patches/0008-haswell-NRI-Add-REUT-I-O-test-library.patch
rename to config/coreboot/default/patches/0050-haswell-NRI-Add-REUT-I-O-test-library.patch
index 2225f18c..6588c376 100644
--- a/config/coreboot/haswell/patches/0008-haswell-NRI-Add-REUT-I-O-test-library.patch
+++ b/config/coreboot/default/patches/0050-haswell-NRI-Add-REUT-I-O-test-library.patch
@@ -1,7 +1,7 @@
-From 49a7ef2401922a8492ba577a43235bcfba7ea822 Mon Sep 17 00:00:00 2001
+From 5ea55ac3f02a8a10f05e84ab9fbace424194869f Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 00:11:29 +0200
-Subject: [PATCH 08/20] haswell NRI: Add REUT I/O test library
+Subject: [PATCH 08/17] haswell NRI: Add REUT I/O test library
 
 Implement a library to run I/O tests using the REUT hardware.
 
@@ -27,10 +27,10 @@ index 8d7d4e4db0..6e1b365602 100644
 +romstage-y += testing_io.c
  romstage-y += timings_refresh.c
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 1971b44b66..7f19fde4cc 100644
+index 4d9487d79c..f029e7f076 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -58,6 +58,88 @@ enum {
+@@ -59,6 +59,88 @@ enum {
  	REUT_MODE_NOP  = 3, /* Normal operation mode */
  };
  
@@ -119,7 +119,7 @@ index 1971b44b66..7f19fde4cc 100644
  enum command_training_iteration {
  	CT_ITERATION_CLOCK = 0,
  	CT_ITERATION_CMD_NORTH,
-@@ -199,6 +281,10 @@ struct sysinfo {
+@@ -200,6 +282,10 @@ struct sysinfo {
  	uint16_t mr1[NUM_CHANNELS][NUM_SLOTS];
  	uint16_t mr2[NUM_CHANNELS][NUM_SLOTS];
  	uint16_t mr3[NUM_CHANNELS][NUM_SLOTS];
@@ -130,7 +130,7 @@ index 1971b44b66..7f19fde4cc 100644
  };
  
  static inline bool is_hsw_ult(void)
-@@ -340,6 +426,30 @@ void write_wdb_va_pat(
+@@ -341,6 +427,30 @@ void write_wdb_va_pat(
  void program_wdb_lfsr(const struct sysinfo *ctrl, bool cleanup);
  void setup_wdb(const struct sysinfo *ctrl);
  
diff --git a/config/coreboot/haswell/patches/0009-haswell-NRI-Add-range-tracking-library.patch b/config/coreboot/default/patches/0051-haswell-NRI-Add-range-tracking-library.patch
similarity index 98%
rename from config/coreboot/haswell/patches/0009-haswell-NRI-Add-range-tracking-library.patch
rename to config/coreboot/default/patches/0051-haswell-NRI-Add-range-tracking-library.patch
index 9c3fe1c9..3b78012f 100644
--- a/config/coreboot/haswell/patches/0009-haswell-NRI-Add-range-tracking-library.patch
+++ b/config/coreboot/default/patches/0051-haswell-NRI-Add-range-tracking-library.patch
@@ -1,7 +1,7 @@
-From 7f5c3f8c6c8960d1c374b9c95821c19f230fa34f Mon Sep 17 00:00:00 2001
+From 07970f6dc64e5563c26013d842a929734e2bf8ed Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 00:56:00 +0200
-Subject: [PATCH 09/20] haswell NRI: Add range tracking library
+Subject: [PATCH 09/17] haswell NRI: Add range tracking library
 
 Implement a small library used to keep track of passing ranges. This
 will be used by 1D training algorithms when margining some parameter.
diff --git a/config/coreboot/haswell/patches/0010-haswell-NRI-Add-library-to-change-margins.patch b/config/coreboot/default/patches/0052-haswell-NRI-Add-library-to-change-margins.patch
similarity index 97%
rename from config/coreboot/haswell/patches/0010-haswell-NRI-Add-library-to-change-margins.patch
rename to config/coreboot/default/patches/0052-haswell-NRI-Add-library-to-change-margins.patch
index 622fac5a..ac096936 100644
--- a/config/coreboot/haswell/patches/0010-haswell-NRI-Add-library-to-change-margins.patch
+++ b/config/coreboot/default/patches/0052-haswell-NRI-Add-library-to-change-margins.patch
@@ -1,7 +1,7 @@
-From 8ad18cc335f60a78f47ab9e5a7994f6075b6a176 Mon Sep 17 00:00:00 2001
+From 66db8447d6cf724c4b25618c94d5a53d501f214e Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 01:11:03 +0200
-Subject: [PATCH 10/20] haswell NRI: Add library to change margins
+Subject: [PATCH 10/17] haswell NRI: Add library to change margins
 
 Implement a library to change Rx/Tx margins. It will be expanded later.
 
@@ -187,10 +187,10 @@ index 0000000000..055c666eee
 +	mchbar_write32(reg, ddr_data_control_0.raw);
 +}
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 7f19fde4cc..906b3143b9 100644
+index f029e7f076..8707257b27 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -117,6 +117,30 @@ enum test_stop {
+@@ -118,6 +118,30 @@ enum test_stop {
  	ALSOE  = 3,	/* Stop on all lanes error */
  };
  
@@ -221,7 +221,7 @@ index 7f19fde4cc..906b3143b9 100644
  struct wdb_pat {
  	uint32_t start_ptr;	/* Starting pointer in WDB */
  	uint32_t stop_ptr;	/* Stopping pointer in WDB */
-@@ -450,6 +474,32 @@ uint8_t select_reut_ranks(struct sysinfo *ctrl, uint8_t channel, uint8_t rankmas
+@@ -451,6 +475,32 @@ uint8_t select_reut_ranks(struct sysinfo *ctrl, uint8_t channel, uint8_t rankmas
  void run_mpr_io_test(bool clear_errors);
  uint8_t run_io_test(struct sysinfo *ctrl, uint8_t chanmask, uint8_t dq_pat, bool clear_errors);
  
diff --git a/config/coreboot/haswell/patches/0011-haswell-NRI-Add-RcvEn-training.patch b/config/coreboot/default/patches/0053-haswell-NRI-Add-RcvEn-training.patch
similarity index 98%
rename from config/coreboot/haswell/patches/0011-haswell-NRI-Add-RcvEn-training.patch
rename to config/coreboot/default/patches/0053-haswell-NRI-Add-RcvEn-training.patch
index 4815be9a..a9821796 100644
--- a/config/coreboot/haswell/patches/0011-haswell-NRI-Add-RcvEn-training.patch
+++ b/config/coreboot/default/patches/0053-haswell-NRI-Add-RcvEn-training.patch
@@ -1,7 +1,7 @@
-From 4254a9ff03658d7a6f1a4e32cfe4c65dbfc072f8 Mon Sep 17 00:00:00 2001
+From 0826d1e9ba50daad13c3d5adccba4b180c82296b Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 00:05:41 +0200
-Subject: [PATCH 11/20] haswell NRI: Add RcvEn training
+Subject: [PATCH 11/17] haswell NRI: Add RcvEn training
 
 Implement the RcvEn (Receive Enable) calibration procedure.
 
@@ -39,10 +39,10 @@ index 5e4674957d..7d444659c3 100644
  
  /* Return a generic stepping value to make stepping checks simpler */
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 906b3143b9..b4e8c7de5a 100644
+index 8707257b27..eaaaedad1e 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -42,6 +42,9 @@
+@@ -43,6 +43,9 @@
  #define NUM_WDB_CL_MUX_SEEDS	3
  #define NUM_CADB_MUX_SEEDS	3
  
@@ -52,7 +52,7 @@ index 906b3143b9..b4e8c7de5a 100644
  /* ZQ calibration types */
  enum {
  	ZQ_INIT,	/* DDR3: ZQCL with tZQinit, LPDDR3: ZQ Init  with tZQinit  */
-@@ -188,6 +191,7 @@ enum raminit_status {
+@@ -189,6 +192,7 @@ enum raminit_status {
  	RAMINIT_STATUS_MPLL_INIT_FAILURE,
  	RAMINIT_STATUS_POLL_TIMEOUT,
  	RAMINIT_STATUS_REUT_ERROR,
@@ -60,7 +60,7 @@ index 906b3143b9..b4e8c7de5a 100644
  	RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
  };
  
-@@ -270,6 +274,10 @@ struct sysinfo {
+@@ -271,6 +275,10 @@ struct sysinfo {
  
  	union ddr_data_vref_adjust_reg dimm_vref;
  
@@ -71,7 +71,7 @@ index 906b3143b9..b4e8c7de5a 100644
  	uint32_t data_offset_train[NUM_CHANNELS][NUM_LANES];
  	uint32_t data_offset_comp[NUM_CHANNELS][NUM_LANES];
  
-@@ -344,6 +352,11 @@ static inline void clear_data_offset_train_all(struct sysinfo *ctrl)
+@@ -345,6 +353,11 @@ static inline void clear_data_offset_train_all(struct sysinfo *ctrl)
  	memset(ctrl->data_offset_train, 0, sizeof(ctrl->data_offset_train));
  }
  
@@ -83,7 +83,7 @@ index 906b3143b9..b4e8c7de5a 100644
  /* Number of ticks to wait in units of 69.841279 ns (citation needed) */
  static inline void tick_delay(const uint32_t delay)
  {
-@@ -399,6 +412,7 @@ enum raminit_status convert_timings(struct sysinfo *ctrl);
+@@ -400,6 +413,7 @@ enum raminit_status convert_timings(struct sysinfo *ctrl);
  enum raminit_status configure_mc(struct sysinfo *ctrl);
  enum raminit_status configure_memory_map(struct sysinfo *ctrl);
  enum raminit_status do_jedec_init(struct sysinfo *ctrl);
diff --git a/config/coreboot/haswell/patches/0012-haswell-NRI-Add-function-to-change-margins.patch b/config/coreboot/default/patches/0054-haswell-NRI-Add-function-to-change-margins.patch
similarity index 96%
rename from config/coreboot/haswell/patches/0012-haswell-NRI-Add-function-to-change-margins.patch
rename to config/coreboot/default/patches/0054-haswell-NRI-Add-function-to-change-margins.patch
index f4f5161e..881b81d6 100644
--- a/config/coreboot/haswell/patches/0012-haswell-NRI-Add-function-to-change-margins.patch
+++ b/config/coreboot/default/patches/0054-haswell-NRI-Add-function-to-change-margins.patch
@@ -1,7 +1,7 @@
-From c24b26594bfab47a8709ed7fb5cb77307fb73a53 Mon Sep 17 00:00:00 2001
+From 36ec2cfa730ba720ef7ded21cc3e84c47f4e2623 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 11:58:59 +0200
-Subject: [PATCH 12/20] haswell NRI: Add function to change margins
+Subject: [PATCH 12/17] haswell NRI: Add function to change margins
 
 Implement a function to change margin parameters. Haswell provides a
 register to apply an offset to margin parameters during training, so
@@ -169,10 +169,10 @@ index 055c666eee..299c44a6b0 100644
 +	change_margin(ctrl, param, value0, true, 0, rank, 0, update_ctrl, regfile);
 +}
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index b4e8c7de5a..5242b16f28 100644
+index eaaaedad1e..1c8473056b 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -35,6 +35,18 @@
+@@ -36,6 +36,18 @@
  
  #define RTTNOM_MASK		(BIT(9) | BIT(6) | BIT(2))
  
@@ -191,7 +191,7 @@ index b4e8c7de5a..5242b16f28 100644
  #define BASIC_VA_PAT_SPREAD_8	0x01010101
  
  #define WDB_CACHE_LINE_SIZE	8
-@@ -45,6 +57,14 @@
+@@ -46,6 +58,14 @@
  /* Specified in PI ticks. 64 PI ticks == 1 qclk */
  #define tDQSCK_DRIFT		64
  
@@ -206,7 +206,7 @@ index b4e8c7de5a..5242b16f28 100644
  /* ZQ calibration types */
  enum {
  	ZQ_INIT,	/* DDR3: ZQCL with tZQinit, LPDDR3: ZQ Init  with tZQinit  */
-@@ -514,6 +534,25 @@ void download_regfile(
+@@ -515,6 +535,25 @@ void download_regfile(
  	bool read_rf_rd,
  	bool read_rf_wr);
  
diff --git a/config/coreboot/haswell/patches/0013-haswell-NRI-Add-read-MPR-training.patch b/config/coreboot/default/patches/0055-haswell-NRI-Add-read-MPR-training.patch
similarity index 97%
rename from config/coreboot/haswell/patches/0013-haswell-NRI-Add-read-MPR-training.patch
rename to config/coreboot/default/patches/0055-haswell-NRI-Add-read-MPR-training.patch
index 5f154bcc..8a9a3daa 100644
--- a/config/coreboot/haswell/patches/0013-haswell-NRI-Add-read-MPR-training.patch
+++ b/config/coreboot/default/patches/0055-haswell-NRI-Add-read-MPR-training.patch
@@ -1,7 +1,7 @@
-From e263f0d2e9d6d016d603342651da261bbcb6af1f Mon Sep 17 00:00:00 2001
+From 87015f060aa208f37481deef460b3545ce2d757f Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 11:35:49 +0200
-Subject: [PATCH 13/20] haswell NRI: Add read MPR training
+Subject: [PATCH 13/17] haswell NRI: Add read MPR training
 
 Implement read training using DDR3 MPR (Multi-Purpose Register).
 
@@ -39,10 +39,10 @@ index 7d444659c3..264d1468f5 100644
  
  /* Return a generic stepping value to make stepping checks simpler */
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 5242b16f28..49e9214656 100644
+index 1c8473056b..7a486479ea 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -27,6 +27,8 @@
+@@ -28,6 +28,8 @@
  /* Always use 12 legs for emphasis (not trained) */
  #define TXEQFULLDRV		(3 << 4)
  
@@ -51,7 +51,7 @@ index 5242b16f28..49e9214656 100644
  /* DDR3 mode register bits */
  #define MR0_DLL_RESET		BIT(8)
  
-@@ -212,6 +214,7 @@ enum raminit_status {
+@@ -213,6 +215,7 @@ enum raminit_status {
  	RAMINIT_STATUS_POLL_TIMEOUT,
  	RAMINIT_STATUS_REUT_ERROR,
  	RAMINIT_STATUS_RCVEN_FAILURE,
@@ -59,7 +59,7 @@ index 5242b16f28..49e9214656 100644
  	RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
  };
  
-@@ -433,6 +436,7 @@ enum raminit_status configure_mc(struct sysinfo *ctrl);
+@@ -434,6 +437,7 @@ enum raminit_status configure_mc(struct sysinfo *ctrl);
  enum raminit_status configure_memory_map(struct sysinfo *ctrl);
  enum raminit_status do_jedec_init(struct sysinfo *ctrl);
  enum raminit_status train_receive_enable(struct sysinfo *ctrl);
diff --git a/config/coreboot/haswell/patches/0014-haswell-NRI-Add-write-leveling.patch b/config/coreboot/default/patches/0056-haswell-NRI-Add-write-leveling.patch
similarity index 98%
rename from config/coreboot/haswell/patches/0014-haswell-NRI-Add-write-leveling.patch
rename to config/coreboot/default/patches/0056-haswell-NRI-Add-write-leveling.patch
index 5a96cd1f..a3f3e839 100644
--- a/config/coreboot/haswell/patches/0014-haswell-NRI-Add-write-leveling.patch
+++ b/config/coreboot/default/patches/0056-haswell-NRI-Add-write-leveling.patch
@@ -1,7 +1,7 @@
-From bebe0b74bede64b03aa1e3781310ef539465627b Mon Sep 17 00:00:00 2001
+From ce0ed94f993506e75b711c214b49ba480037e7d3 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 12:56:04 +0200
-Subject: [PATCH 14/20] haswell NRI: Add write leveling
+Subject: [PATCH 14/17] haswell NRI: Add write leveling
 
 Implement JEDEC write leveling, which is done in two steps. The first
 step uses the JEDEC procedure to do "fine" write leveling, i.e. align
@@ -43,10 +43,10 @@ index 264d1468f5..1ff23be615 100644
  
  /* Return a generic stepping value to make stepping checks simpler */
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 49e9214656..86d89f2120 100644
+index 7a486479ea..d6b11b9d3c 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -59,6 +59,9 @@
+@@ -60,6 +60,9 @@
  /* Specified in PI ticks. 64 PI ticks == 1 qclk */
  #define tDQSCK_DRIFT		64
  
@@ -56,7 +56,7 @@ index 49e9214656..86d89f2120 100644
  enum margin_parameter {
  	RcvEna,
  	RdT,
-@@ -215,6 +218,7 @@ enum raminit_status {
+@@ -216,6 +219,7 @@ enum raminit_status {
  	RAMINIT_STATUS_REUT_ERROR,
  	RAMINIT_STATUS_RCVEN_FAILURE,
  	RAMINIT_STATUS_RMPR_FAILURE,
@@ -64,7 +64,7 @@ index 49e9214656..86d89f2120 100644
  	RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
  };
  
-@@ -380,6 +384,11 @@ static inline uint32_t get_data_train_feedback(const uint8_t channel, const uint
+@@ -381,6 +385,11 @@ static inline uint32_t get_data_train_feedback(const uint8_t channel, const uint
  	return mchbar_read32(DDR_DATA_TRAIN_FEEDBACK(channel, byte));
  }
  
@@ -76,7 +76,7 @@ index 49e9214656..86d89f2120 100644
  /* Number of ticks to wait in units of 69.841279 ns (citation needed) */
  static inline void tick_delay(const uint32_t delay)
  {
-@@ -437,6 +446,7 @@ enum raminit_status configure_memory_map(struct sysinfo *ctrl);
+@@ -438,6 +447,7 @@ enum raminit_status configure_memory_map(struct sysinfo *ctrl);
  enum raminit_status do_jedec_init(struct sysinfo *ctrl);
  enum raminit_status train_receive_enable(struct sysinfo *ctrl);
  enum raminit_status train_read_mpr(struct sysinfo *ctrl);
diff --git a/config/coreboot/haswell/patches/0015-haswell-NRI-Add-final-raminit-steps.patch b/config/coreboot/default/patches/0057-haswell-NRI-Add-final-raminit-steps.patch
similarity index 98%
rename from config/coreboot/haswell/patches/0015-haswell-NRI-Add-final-raminit-steps.patch
rename to config/coreboot/default/patches/0057-haswell-NRI-Add-final-raminit-steps.patch
index 3626bf6d..db111ee1 100644
--- a/config/coreboot/haswell/patches/0015-haswell-NRI-Add-final-raminit-steps.patch
+++ b/config/coreboot/default/patches/0057-haswell-NRI-Add-final-raminit-steps.patch
@@ -1,7 +1,7 @@
-From eba8680d618db95028e3f984f25881df0e67abf7 Mon Sep 17 00:00:00 2001
+From e30c9c431ef11d87c6f46071ec43cc34391b8349 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 14:29:05 +0200
-Subject: [PATCH 15/20] haswell NRI: Add final raminit steps
+Subject: [PATCH 15/17] haswell NRI: Add final raminit steps
 
 Implement the remaining raminit steps. Although many training steps are
 missing, this is enough to boot on the Asrock B85M Pro4.
@@ -489,10 +489,10 @@ index 2fed93de5b..5f7ceec222 100644
  
  	/** TODO: setup_sdram_meminfo **/
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 86d89f2120..9bab57b518 100644
+index d6b11b9d3c..a0a913f926 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -447,6 +447,8 @@ enum raminit_status do_jedec_init(struct sysinfo *ctrl);
+@@ -448,6 +448,8 @@ enum raminit_status do_jedec_init(struct sysinfo *ctrl);
  enum raminit_status train_receive_enable(struct sysinfo *ctrl);
  enum raminit_status train_read_mpr(struct sysinfo *ctrl);
  enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl);
diff --git a/config/coreboot/haswell/patches/0016-Haswell-NRI-Implement-fast-boot-path.patch b/config/coreboot/default/patches/0058-Haswell-NRI-Implement-fast-boot-path.patch
similarity index 98%
rename from config/coreboot/haswell/patches/0016-Haswell-NRI-Implement-fast-boot-path.patch
rename to config/coreboot/default/patches/0058-Haswell-NRI-Implement-fast-boot-path.patch
index c2fd8b60..40e86a7a 100644
--- a/config/coreboot/haswell/patches/0016-Haswell-NRI-Implement-fast-boot-path.patch
+++ b/config/coreboot/default/patches/0058-Haswell-NRI-Implement-fast-boot-path.patch
@@ -1,7 +1,7 @@
-From c7d6a901edf648f0f02dd2053337bcf3a319e49b Mon Sep 17 00:00:00 2001
+From 50c9d184cc89cd718c1cb95e1a3cabed24e09e1e Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 13 Apr 2024 01:16:30 +0200
-Subject: [PATCH 16/20] Haswell NRI: Implement fast boot path
+Subject: [PATCH 16/17] Haswell NRI: Implement fast boot path
 
 When the memory configuration hasn't changed, there is no need to do
 full memory training. Instead, boot firmware can use saved training
@@ -269,10 +269,10 @@ index 5f7ceec222..3ad8ce29e7 100644
  	/** TODO: setup_sdram_meminfo **/
  }
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 9bab57b518..0750904aec 100644
+index a0a913f926..2ac16eaad3 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -169,6 +169,8 @@ enum regfile_mode {
+@@ -170,6 +170,8 @@ enum regfile_mode {
  	REG_FILE_USE_CURRENT,	/* Used when changing parameters after the test */
  };
  
@@ -281,7 +281,7 @@ index 9bab57b518..0750904aec 100644
  struct wdb_pat {
  	uint32_t start_ptr;	/* Starting pointer in WDB */
  	uint32_t stop_ptr;	/* Stopping pointer in WDB */
-@@ -219,6 +221,7 @@ enum raminit_status {
+@@ -220,6 +222,7 @@ enum raminit_status {
  	RAMINIT_STATUS_RCVEN_FAILURE,
  	RAMINIT_STATUS_RMPR_FAILURE,
  	RAMINIT_STATUS_JWRL_FAILURE,
@@ -289,7 +289,7 @@ index 9bab57b518..0750904aec 100644
  	RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
  };
  
-@@ -228,6 +231,11 @@ enum generic_stepping {
+@@ -229,6 +232,11 @@ enum generic_stepping {
  	STEPPING_C0 = 3,
  };
  
@@ -299,9 +299,9 @@ index 9bab57b518..0750904aec 100644
 +};
 +
  struct raminit_dimm_info {
- 	spd_raw_data raw_spd;
+ 	spd_ddr3_raw_data raw_spd;
  	struct dimm_attr_ddr3_st data;
-@@ -447,12 +455,22 @@ enum raminit_status do_jedec_init(struct sysinfo *ctrl);
+@@ -448,12 +456,22 @@ enum raminit_status do_jedec_init(struct sysinfo *ctrl);
  enum raminit_status train_receive_enable(struct sysinfo *ctrl);
  enum raminit_status train_read_mpr(struct sysinfo *ctrl);
  enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl);
diff --git a/config/coreboot/haswell/patches/0017-haswell-NRI-Do-sense-amplifier-offset-training.patch b/config/coreboot/default/patches/0059-haswell-NRI-Do-sense-amplifier-offset-training.patch
similarity index 97%
rename from config/coreboot/haswell/patches/0017-haswell-NRI-Do-sense-amplifier-offset-training.patch
rename to config/coreboot/default/patches/0059-haswell-NRI-Do-sense-amplifier-offset-training.patch
index 846fe9a3..c51560c7 100644
--- a/config/coreboot/haswell/patches/0017-haswell-NRI-Do-sense-amplifier-offset-training.patch
+++ b/config/coreboot/default/patches/0059-haswell-NRI-Do-sense-amplifier-offset-training.patch
@@ -1,7 +1,7 @@
-From be58501141aa97aa544b670e566cd6cf6797c18e Mon Sep 17 00:00:00 2001
+From 8528c7aa2a3cfcf0fe494a515a2e531ff0f1dab8 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Wed, 17 Apr 2024 13:20:32 +0200
-Subject: [PATCH 17/20] haswell NRI: Do sense amplifier offset training
+Subject: [PATCH 17/17] haswell NRI: Do sense amplifier offset training
 
 Quoting Wikipedia:
 
@@ -61,10 +61,10 @@ index 056dde1adc..ce637e2d03 100644
  	{ train_read_mpr,                                         true, "RDMPRT",     },
  	{ train_jedec_write_leveling,                             true, "JWRL",       },
 diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 0750904aec..95ccd0a8b3 100644
+index 2ac16eaad3..07eea98831 100644
 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
 +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -22,6 +22,8 @@
+@@ -23,6 +23,8 @@
  #define NUM_LANES		9
  #define NUM_LANES_NO_ECC	8
  
@@ -73,7 +73,7 @@ index 0750904aec..95ccd0a8b3 100644
  #define COMP_INT		10
  
  /* Always use 12 legs for emphasis (not trained) */
-@@ -218,6 +220,7 @@ enum raminit_status {
+@@ -219,6 +221,7 @@ enum raminit_status {
  	RAMINIT_STATUS_MPLL_INIT_FAILURE,
  	RAMINIT_STATUS_POLL_TIMEOUT,
  	RAMINIT_STATUS_REUT_ERROR,
@@ -81,7 +81,7 @@ index 0750904aec..95ccd0a8b3 100644
  	RAMINIT_STATUS_RCVEN_FAILURE,
  	RAMINIT_STATUS_RMPR_FAILURE,
  	RAMINIT_STATUS_JWRL_FAILURE,
-@@ -243,6 +246,12 @@ struct raminit_dimm_info {
+@@ -244,6 +247,12 @@ struct raminit_dimm_info {
  	bool valid;
  };
  
@@ -94,7 +94,7 @@ index 0750904aec..95ccd0a8b3 100644
  struct sysinfo {
  	enum raminit_boot_mode bootmode;
  	enum generic_stepping stepping;
-@@ -330,6 +339,8 @@ struct sysinfo {
+@@ -331,6 +340,8 @@ struct sysinfo {
  	uint8_t rxdqsn[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES];
  	int8_t  rxvref[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES];
  
@@ -103,7 +103,7 @@ index 0750904aec..95ccd0a8b3 100644
  	uint8_t clk_pi_code[NUM_CHANNELS][NUM_SLOTRANKS];
  	uint8_t ctl_pi_code[NUM_CHANNELS][NUM_SLOTRANKS];
  	uint8_t cke_pi_code[NUM_CHANNELS][NUM_SLOTRANKS];
-@@ -452,6 +463,7 @@ enum raminit_status convert_timings(struct sysinfo *ctrl);
+@@ -453,6 +464,7 @@ enum raminit_status convert_timings(struct sysinfo *ctrl);
  enum raminit_status configure_mc(struct sysinfo *ctrl);
  enum raminit_status configure_memory_map(struct sysinfo *ctrl);
  enum raminit_status do_jedec_init(struct sysinfo *ctrl);
diff --git a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
index 509e784e..c4929a14 100644
--- a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
@@ -37,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +94,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,19 +129,36 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -159,6 +178,7 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -170,14 +190,14 @@ CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -354,6 +374,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -476,8 +497,8 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
diff --git a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
index 428bed87..14f8e433 100644
--- a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
@@ -37,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +94,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,19 +127,36 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -157,6 +176,7 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -168,14 +188,14 @@ CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -352,6 +372,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -473,8 +494,8 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
diff --git a/config/coreboot/dell9020mt_nri_12mb/target.cfg b/config/coreboot/dell9020mt_nri_12mb/target.cfg
index 6d2e9a22..e7411d7f 100644
--- a/config/coreboot/dell9020mt_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_nri_12mb/target.cfg
@@ -1,4 +1,4 @@
-tree="haswell"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
index ac1d9f16..4edbb341 100644
--- a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
@@ -37,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +94,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -127,19 +129,36 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -159,6 +178,7 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -170,14 +190,14 @@ CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -354,6 +374,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -476,8 +497,8 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
diff --git a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
index 179af9cc..6a454101 100644
--- a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
@@ -37,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +94,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -125,19 +127,36 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -157,6 +176,7 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -168,14 +188,14 @@ CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -352,6 +372,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -473,8 +494,8 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
diff --git a/config/coreboot/dell9020sff_nri_12mb/target.cfg b/config/coreboot/dell9020sff_nri_12mb/target.cfg
index 6d2e9a22..e7411d7f 100644
--- a/config/coreboot/dell9020sff_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_nri_12mb/target.cfg
@@ -1,4 +1,4 @@
-tree="haswell"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/haswell/patches/0018-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/haswell/patches/0018-Remove-warning-for-coreboot-images-built-without-a-p.patch
deleted file mode 100644
index 34309242..00000000
--- a/config/coreboot/haswell/patches/0018-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From c25dcd8ac80598939edffd011df0fd9ba3d8a1a8 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 18/20] Remove warning for coreboot images built without a
- payload
-
-I added this in upstream to prevent people from accidentally flashing
-roms without a payload resulting in a no boot situation, but in
-libreboot lbmk handles the payload and thus this warning always comes
-up. This has caused confusion and concern so just patch it out.
----
- payloads/Makefile.mk | 13 +------------
- 1 file changed, 1 insertion(+), 12 deletions(-)
-
-diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
-index a2336aa876..4f1692a873 100644
---- a/payloads/Makefile.mk
-+++ b/payloads/Makefile.mk
-@@ -49,16 +49,5 @@ distclean-payloads:
- print-repo-info-payloads:
- 	-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
- 
--ifeq ($(CONFIG_PAYLOAD_NONE),y)
--show_notices:: warn_no_payload
--endif
--
--warn_no_payload:
--	printf "\n\t** WARNING **\n"
--	printf "coreboot has been built without a payload. Writing\n"
--	printf "a coreboot image without a payload to your board's\n"
--	printf "flash chip will result in a non-booting system. You\n"
--	printf "can use cbfstool to add a payload to the image.\n\n"
--
- .PHONY: force-payload coreinfo nvramcui
--.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
-+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0019-use-mirrorservice.org-for-gcc-downloads.patch b/config/coreboot/haswell/patches/0019-use-mirrorservice.org-for-gcc-downloads.patch
deleted file mode 100644
index e197b3f3..00000000
--- a/config/coreboot/haswell/patches/0019-use-mirrorservice.org-for-gcc-downloads.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 081890bab8d454247b6f7e9cb209f46159c45c8b Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 5 Nov 2023 23:19:42 +0000
-Subject: [PATCH 19/20] use mirrorservice.org for gcc downloads
-
-the gnu.org 302 redirect often fails
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 0a0462e2f6..6ae201239d 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -69,11 +69,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
- # to the jenkins build as well, or the builder won't download it.
- 
- # GCC toolchain archive locations
--GMP_BASE_URL="https://ftpmirror.gnu.org/gmp"
--MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
--MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
--GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
--BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
-+GMP_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp"
-+MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
-+MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
-+GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
-+BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
- IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0020-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/haswell/patches/0020-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
deleted file mode 100644
index 60490608..00000000
--- a/config/coreboot/haswell/patches/0020-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ /dev/null
@@ -1,204 +0,0 @@
-From 1a4f454e05b613cb080cdd063dd3efb1fdbb748b Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 20/20] util/ifdtool: add --nuke flag (all 0xFF on region)
-
-When this option is used, the region's contents are overwritten
-with all ones (0xFF).
-
-Example:
-
-./ifdtool --nuke gbe coreboot.rom
-./ifdtool --nuke bios coreboot.com
-./ifdtool --nuke me coreboot.com
-
-Rebased since the last revision update in lbmk.
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/ifdtool/ifdtool.c | 113 ++++++++++++++++++++++++++++++-----------
- 1 file changed, 82 insertions(+), 31 deletions(-)
-
-diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index 516570e0a3..1638e1710e 100644
---- a/util/ifdtool/ifdtool.c
-+++ b/util/ifdtool/ifdtool.c
-@@ -2143,6 +2143,7 @@ static void print_usage(const char *name)
- 	       "                                         tgl    - Tiger Lake\n"
- 	       "                                         wbg    - Wellsburg\n"
- 	       "   -S | --setpchstrap                    Write a PCH strap\n"
-+	       "   -N | --nuke <region>                  Overwrite the specified region with 0xFF (all ones)\n"
- 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
- 	       "   -v | --version:                       print the version\n"
- 	       "   -h | --help:                          print this help\n\n"
-@@ -2151,6 +2152,60 @@ static void print_usage(const char *name)
- 	       "\n");
- }
- 
-+static int
-+get_region_type_string(const char *region_type_string)
-+{
-+       if (!strcasecmp("Descriptor", region_type_string))
-+               return 0;
-+       else if (!strcasecmp("BIOS", region_type_string))
-+               return 1;
-+       else if (!strcasecmp("ME", region_type_string))
-+               return 2;
-+       else if (!strcasecmp("GbE", region_type_string))
-+               return 3;
-+       else if (!strcasecmp("Platform Data", region_type_string))
-+               return 4;
-+       else if (!strcasecmp("Device Exp1", region_type_string))
-+               return 5;
-+       else if (!strcasecmp("Secondary BIOS", region_type_string))
-+               return 6;
-+       else if (!strcasecmp("Reserved", region_type_string))
-+               return 7;
-+       else if (!strcasecmp("EC", region_type_string))
-+               return 8;
-+       else if (!strcasecmp("Device Exp2", region_type_string))
-+               return 9;
-+       else if (!strcasecmp("IE", region_type_string))
-+               return 10;
-+       else if (!strcasecmp("10GbE_0", region_type_string))
-+               return 11;
-+       else if (!strcasecmp("10GbE_1", region_type_string))
-+               return 12;
-+       else if (!strcasecmp("PTT", region_type_string))
-+               return 15;
-+       return -1;
-+}
-+
-+static void
-+nuke(const char *filename, char *image, int size, int region_type)
-+{
-+       int i;
-+       struct region region;
-+       const struct frba *frba = find_frba(image, size);
-+       if (!frba)
-+               exit(EXIT_FAILURE);
-+
-+       region = get_region(frba, region_type);
-+       if (region.size > 0) {
-+               for (i = region.base; i <= region.limit; i++) {
-+                       if ((i + 1) > (size))
-+                               break;
-+                       image[i] = 0xFF;
-+               }
-+               write_image(filename, image, size);
-+       }
-+}
-+
- int main(int argc, char *argv[])
- {
- 	int opt, option_index = 0;
-@@ -2158,6 +2213,7 @@ int main(int argc, char *argv[])
- 	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
- 	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
- 	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
-+	int mode_nuke = 0;
- 	int mode_gpr0_disable = 0, mode_gpr0_enable = 0;
- 	char *region_type_string = NULL, *region_fname = NULL;
- 	const char *layout_fname = NULL;
-@@ -2192,6 +2248,7 @@ int main(int argc, char *argv[])
- 		{"validate", 0, NULL, 't'},
- 		{"setpchstrap", 1, NULL, 'S'},
- 		{"newvalue", 1, NULL, 'V'},
-+		{"nuke", 1, NULL, 'N'},
- 		{0, 0, 0, 0}
- 	};
- 
-@@ -2241,35 +2298,8 @@ int main(int argc, char *argv[])
- 			region_fname++;
- 			// Descriptor, BIOS, ME, GbE, Platform
- 			// valid type?
--			if (!strcasecmp("Descriptor", region_type_string))
--				region_type = 0;
--			else if (!strcasecmp("BIOS", region_type_string))
--				region_type = 1;
--			else if (!strcasecmp("ME", region_type_string))
--				region_type = 2;
--			else if (!strcasecmp("GbE", region_type_string))
--				region_type = 3;
--			else if (!strcasecmp("Platform Data", region_type_string))
--				region_type = 4;
--			else if (!strcasecmp("Device Exp1", region_type_string))
--				region_type = 5;
--			else if (!strcasecmp("Secondary BIOS", region_type_string))
--				region_type = 6;
--			else if (!strcasecmp("Reserved", region_type_string))
--				region_type = 7;
--			else if (!strcasecmp("EC", region_type_string))
--				region_type = 8;
--			else if (!strcasecmp("Device Exp2", region_type_string))
--				region_type = 9;
--			else if (!strcasecmp("IE", region_type_string))
--				region_type = 10;
--			else if (!strcasecmp("10GbE_0", region_type_string))
--				region_type = 11;
--			else if (!strcasecmp("10GbE_1", region_type_string))
--				region_type = 12;
--			else if (!strcasecmp("PTT", region_type_string))
--				region_type = 15;
--			if (region_type == -1) {
-+			if ((region_type =
-+			    get_region_type_string(region_type_string)) == -1) {
- 				fprintf(stderr, "No such region type: '%s'\n\n",
- 					region_type_string);
- 				fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
-@@ -2441,6 +2471,22 @@ int main(int argc, char *argv[])
- 		case 't':
- 			mode_validate = 1;
- 			break;
-+               case 'N':
-+                       region_type_string = strdup(optarg);
-+                       if (!region_type_string) {
-+                               fprintf(stderr, "No region specified\n");
-+                               print_usage(argv[0]);
-+                               exit(EXIT_FAILURE);
-+                       }
-+                       if ((region_type =
-+                           get_region_type_string(region_type_string)) == -1) {
-+                               fprintf(stderr, "No such region type: '%s'\n\n",
-+                                       region_type_string);
-+                               print_usage(argv[0]);
-+                               exit(EXIT_FAILURE);
-+                       }
-+                       mode_nuke = 1;
-+                       break;
- 		case 'v':
- 			print_version();
- 			exit(EXIT_SUCCESS);
-@@ -2457,7 +2503,7 @@ int main(int argc, char *argv[])
- 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
- 			mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
- 			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
--			(mode_gpr0_disable | mode_gpr0_enable)) > 1) {
-+			(mode_gpr0_disable | mode_gpr0_enable) + mode_nuke) > 1) {
- 		fprintf(stderr, "You may not specify more than one mode.\n\n");
- 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
- 		exit(EXIT_FAILURE);
-@@ -2466,7 +2512,8 @@ int main(int argc, char *argv[])
- 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
- 			mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
- 			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
--			mode_validate + (mode_gpr0_disable | mode_gpr0_enable)) == 0) {
-+			mode_validate + (mode_gpr0_disable | mode_gpr0_enable) +
-+			mode_nuke) == 0) {
- 		fprintf(stderr, "You need to specify a mode.\n\n");
- 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
- 		exit(EXIT_FAILURE);
-@@ -2576,6 +2623,10 @@ int main(int argc, char *argv[])
- 		write_image(new_filename, image, size);
- 	}
- 
-+	if (mode_nuke) {
-+		nuke(new_filename, image, size, region_type);
-+	}
-+
- 	if (mode_altmedisable) {
- 		struct fpsba *fpsba = find_fpsba(image, size);
- 		struct fmsba *fmsba = find_fmsba(image, size);
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch b/config/coreboot/haswell/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
deleted file mode 100644
index 81b8e839..00000000
--- a/config/coreboot/haswell/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
+++ /dev/null
@@ -1,292 +0,0 @@
-From d97b865a2210e70583e8bf5ee3a73d3c131b29c1 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sat, 2 Mar 2024 22:51:09 +0000
-Subject: [PATCH 1/4] nb/intel/haswell: make IOMMU a runtime option
-
-When I tested graphics cards on a coreboot port for Dell
-OptiPlex 9020 SFF, I could not use a graphics card unless
-I set iommu=off on the Linux cmdline.
-
-Coreboot's current behaviour is to check whether the CPU
-has vt-d support and, if it does, initialise the IOMMU.
-
-This patch maintains the current behaviour by default, but
-allows the user to turn *off* the IOMMU, even if vt-d is
-supported by the host CPU.
-
-If iommu=Disable is specified, the check will not be
-performed, and the IOMMU will be left disabled. This option
-has been added to all current Haswell boards, though it is
-recommended to leave the IOMMU turned on in most setups.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/mainboard/asrock/b85m_pro4/cmos.default    | 1 +
- src/mainboard/asrock/b85m_pro4/cmos.layout     | 3 +++
- src/mainboard/asrock/h81m-hds/cmos.default     | 1 +
- src/mainboard/asrock/h81m-hds/cmos.layout      | 6 ++++++
- src/mainboard/dell/optiplex_9020/cmos.default  | 1 +
- src/mainboard/dell/optiplex_9020/cmos.layout   | 6 ++++++
- src/mainboard/google/beltino/cmos.layout       | 5 +++++
- src/mainboard/google/slippy/cmos.layout        | 5 +++++
- src/mainboard/intel/baskingridge/cmos.layout   | 4 ++++
- src/mainboard/lenovo/haswell/cmos.default      | 1 +
- src/mainboard/lenovo/haswell/cmos.layout       | 3 +++
- src/mainboard/supermicro/x10slm-f/cmos.default | 1 +
- src/mainboard/supermicro/x10slm-f/cmos.layout  | 6 ++++++
- src/northbridge/intel/haswell/early_init.c     | 5 +++++
- 14 files changed, 48 insertions(+)
-
-diff --git a/src/mainboard/asrock/b85m_pro4/cmos.default b/src/mainboard/asrock/b85m_pro4/cmos.default
-index 01bf20ad16..dfc8b80fb0 100644
---- a/src/mainboard/asrock/b85m_pro4/cmos.default
-+++ b/src/mainboard/asrock/b85m_pro4/cmos.default
-@@ -4,3 +4,4 @@ boot_option=Fallback
- debug_level=Debug
- nmi=Enable
- power_on_after_fail=Disable
-+iommu=Enable
-diff --git a/src/mainboard/asrock/b85m_pro4/cmos.layout b/src/mainboard/asrock/b85m_pro4/cmos.layout
-index efdc333fc2..c9883ea71d 100644
---- a/src/mainboard/asrock/b85m_pro4/cmos.layout
-+++ b/src/mainboard/asrock/b85m_pro4/cmos.layout
-@@ -11,6 +11,7 @@
- 	395	4	e	4	debug_level
- 	408	1	e	1	nmi
- 	409	2	e	5	power_on_after_fail
-+	412	1	e	6	iommu
- 	984	16	h	0	check_sum
- # -----------------------------------------------------------------
- 
-@@ -38,6 +39,8 @@
- 	5	0	Disable
- 	5	1	Enable
- 	5	2	Keep
-+	6	0	Disable
-+	6	1	Enable
- # -----------------------------------------------------------------
- 
- # -----------------------------------------------------------------
-diff --git a/src/mainboard/asrock/h81m-hds/cmos.default b/src/mainboard/asrock/h81m-hds/cmos.default
-index 01bf20ad16..dfc8b80fb0 100644
---- a/src/mainboard/asrock/h81m-hds/cmos.default
-+++ b/src/mainboard/asrock/h81m-hds/cmos.default
-@@ -4,3 +4,4 @@ boot_option=Fallback
- debug_level=Debug
- nmi=Enable
- power_on_after_fail=Disable
-+iommu=Enable
-diff --git a/src/mainboard/asrock/h81m-hds/cmos.layout b/src/mainboard/asrock/h81m-hds/cmos.layout
-index c9ba76c78f..95ee3d36fb 100644
---- a/src/mainboard/asrock/h81m-hds/cmos.layout
-+++ b/src/mainboard/asrock/h81m-hds/cmos.layout
-@@ -21,6 +21,9 @@ entries
- 408	1	e	1	nmi
- 409	2	e	5	power_on_after_fail
- 
-+# enable or disable iommu
-+412	1	e	6	iommu
-+
- # coreboot config options: check sums
- 984	16	h	0	check_sum
- 
-@@ -52,6 +55,9 @@ enumerations
- 5	1	Enable
- 5	2	Keep
- 
-+6	0	Disable
-+6	1	Enable
-+
- # -----------------------------------------------------------------
- checksums
- 
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
-index cd4046f1ab..c974022472 100644
---- a/src/mainboard/dell/optiplex_9020/cmos.default
-+++ b/src/mainboard/dell/optiplex_9020/cmos.default
-@@ -3,3 +3,4 @@ boot_option=Fallback
- debug_level=Debug
- nmi=Disable
- power_on_after_fail=Disable
-+iommu=Enable
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.layout b/src/mainboard/dell/optiplex_9020/cmos.layout
-index c9ba76c78f..72ff9c4bee 100644
---- a/src/mainboard/dell/optiplex_9020/cmos.layout
-+++ b/src/mainboard/dell/optiplex_9020/cmos.layout
-@@ -21,6 +21,9 @@ entries
- 408	1	e	1	nmi
- 409	2	e	5	power_on_after_fail
- 
-+# turn iommu on or off
-+412	1	e	6	iommu
-+
- # coreboot config options: check sums
- 984	16	h	0	check_sum
- 
-@@ -52,6 +55,9 @@ enumerations
- 5	1	Enable
- 5	2	Keep
- 
-+6	0	Disable
-+6	1	Enable
-+
- # -----------------------------------------------------------------
- checksums
- 
-diff --git a/src/mainboard/google/beltino/cmos.layout b/src/mainboard/google/beltino/cmos.layout
-index 78d44c1415..c143979ae1 100644
---- a/src/mainboard/google/beltino/cmos.layout
-+++ b/src/mainboard/google/beltino/cmos.layout
-@@ -19,6 +19,9 @@ entries
- 408	1	e	1	nmi
- 409	2	e	7	power_on_after_fail
- 
-+# enable or disable iommu
-+412	1	e	8	iommu
-+
- # coreboot config options: bootloader
- #Used by ChromeOS:
- 416	128	r	0	vbnv
-@@ -47,6 +50,8 @@ enumerations
- 7	0	Disable
- 7	1	Enable
- 7	2	Keep
-+8	0	Disable
-+8	1	Enable
- # -----------------------------------------------------------------
- checksums
- 
-diff --git a/src/mainboard/google/slippy/cmos.layout b/src/mainboard/google/slippy/cmos.layout
-index 78d44c1415..c143979ae1 100644
---- a/src/mainboard/google/slippy/cmos.layout
-+++ b/src/mainboard/google/slippy/cmos.layout
-@@ -19,6 +19,9 @@ entries
- 408	1	e	1	nmi
- 409	2	e	7	power_on_after_fail
- 
-+# enable or disable iommu
-+412	1	e	8	iommu
-+
- # coreboot config options: bootloader
- #Used by ChromeOS:
- 416	128	r	0	vbnv
-@@ -47,6 +50,8 @@ enumerations
- 7	0	Disable
- 7	1	Enable
- 7	2	Keep
-+8	0	Disable
-+8	1	Enable
- # -----------------------------------------------------------------
- checksums
- 
-diff --git a/src/mainboard/intel/baskingridge/cmos.layout b/src/mainboard/intel/baskingridge/cmos.layout
-index 78d44c1415..f2c602f541 100644
---- a/src/mainboard/intel/baskingridge/cmos.layout
-+++ b/src/mainboard/intel/baskingridge/cmos.layout
-@@ -19,6 +19,8 @@ entries
- 408	1	e	1	nmi
- 409	2	e	7	power_on_after_fail
- 
-+412	1	e	8	iommu
-+
- # coreboot config options: bootloader
- #Used by ChromeOS:
- 416	128	r	0	vbnv
-@@ -47,6 +49,8 @@ enumerations
- 7	0	Disable
- 7	1	Enable
- 7	2	Keep
-+8	0	Disable
-+8	1	Enable
- # -----------------------------------------------------------------
- checksums
- 
-diff --git a/src/mainboard/lenovo/haswell/cmos.default b/src/mainboard/lenovo/haswell/cmos.default
-index 08db97c5a9..cc6b363cd9 100644
---- a/src/mainboard/lenovo/haswell/cmos.default
-+++ b/src/mainboard/lenovo/haswell/cmos.default
-@@ -14,3 +14,4 @@ trackpoint=Enable
- backlight=Keyboard
- enable_dual_graphics=Disable
- usb_always_on=Disable
-+iommu=Enable
-diff --git a/src/mainboard/lenovo/haswell/cmos.layout b/src/mainboard/lenovo/haswell/cmos.layout
-index 27915d3ab7..59df76b64c 100644
---- a/src/mainboard/lenovo/haswell/cmos.layout
-+++ b/src/mainboard/lenovo/haswell/cmos.layout
-@@ -23,6 +23,7 @@ entries
- 
- # coreboot config options: EC
- 411	1	e	8	first_battery
-+413	1	e	14	iommu
- 415	1	e	1	wlan
- 416	1	e	1	trackpoint
- 417	1	e	1	fn_ctrl_swap
-@@ -72,6 +73,8 @@ enumerations
- 13	0	Disable
- 13	1	AC and battery
- 13	2	AC only
-+14	0	Disable
-+14	1	Enable
- 
- # -----------------------------------------------------------------
- checksums
-diff --git a/src/mainboard/supermicro/x10slm-f/cmos.default b/src/mainboard/supermicro/x10slm-f/cmos.default
-index 7ce38fb5d7..6049e7938a 100644
---- a/src/mainboard/supermicro/x10slm-f/cmos.default
-+++ b/src/mainboard/supermicro/x10slm-f/cmos.default
-@@ -5,3 +5,4 @@ debug_level=Debug
- nmi=Enable
- power_on_after_fail=Keep
- hide_ast2400=Disable
-+iommu=Enable
-diff --git a/src/mainboard/supermicro/x10slm-f/cmos.layout b/src/mainboard/supermicro/x10slm-f/cmos.layout
-index 38ba87aa45..24d39e97ee 100644
---- a/src/mainboard/supermicro/x10slm-f/cmos.layout
-+++ b/src/mainboard/supermicro/x10slm-f/cmos.layout
-@@ -21,6 +21,9 @@ entries
- 408	1	e	1	nmi
- 409	2	e	5	power_on_after_fail
- 
-+# enable or disable iommu
-+412	1	e	6	iommu
-+
- # coreboot config options: mainboard
- 416	1	e	1	hide_ast2400
- 
-@@ -55,6 +58,9 @@ enumerations
- 5	1	Enable
- 5	2	Keep
- 
-+6	0	Disable
-+6	1	Enable
-+
- # -----------------------------------------------------------------
- checksums
- 
-diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c
-index e47deb5da6..1a7e0b1076 100644
---- a/src/northbridge/intel/haswell/early_init.c
-+++ b/src/northbridge/intel/haswell/early_init.c
-@@ -5,6 +5,7 @@
- #include <device/mmio.h>
- #include <device/pci_def.h>
- #include <device/pci_ops.h>
-+#include <option.h>
- 
- #include "haswell.h"
- 
-@@ -157,6 +158,10 @@ static void haswell_setup_misc(void)
- static void haswell_setup_iommu(void)
- {
- 	const u32 capid0_a = pci_read_config32(HOST_BRIDGE, CAPID0_A);
-+	u8 enable_iommu = get_uint_option("iommu", 1);
-+
-+	if (!enable_iommu)
-+		return;
- 
- 	if (capid0_a & VTD_DISABLE)
- 		return;
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch b/config/coreboot/haswell/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch
deleted file mode 100644
index fbb40293..00000000
--- a/config/coreboot/haswell/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 153ca1a43c2c978fa2b2b82d988b0f838953cfb9 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sat, 2 Mar 2024 23:00:09 +0000
-Subject: [PATCH 2/4] dell/optiplex_9020: Disable IOMMU by default
-
-Needed to make graphics cards work. Turning it on is
-recommended if only using iGPU, otherwise leave it off
-by default. The IOMMU is extremely buggy when a graphics
-card is used. Leaving it off by default will ensure that
-the default ROM images in Libreboot will work on any setup.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/mainboard/dell/optiplex_9020/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
-index c974022472..a0acd7b6bb 100644
---- a/src/mainboard/dell/optiplex_9020/cmos.default
-+++ b/src/mainboard/dell/optiplex_9020/cmos.default
-@@ -3,4 +3,4 @@ boot_option=Fallback
- debug_level=Debug
- nmi=Disable
- power_on_after_fail=Disable
--iommu=Enable
-+iommu=Disable
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch b/config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
deleted file mode 100644
index e2db6a17..00000000
--- a/config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
+++ /dev/null
@@ -1,602 +0,0 @@
-From 05cc767d1398f91533e87db5ceaa0aabb7918425 Mon Sep 17 00:00:00 2001
-From: Mate Kukri <kukri.mate@gmail.com>
-Date: Thu, 18 Apr 2024 20:28:45 +0100
-Subject: [PATCH 1/1] mb/dell/optiplex_9020: Implement late HWM initialization
-
-There are 4 different chassis types specified by vendor firmware, each
-with a slightly different HWM configuration.
-
-The chassis type to use is determined at runtime by reading a set of
-4 PCH GPIOs: 70, 38, 17, and 1.
-
-Additionally vendor firmware also provides an option to run the fans at
-full speed. This is substituted with a coreboot nvram option in this
-implementation.
-
-This was tested to make fan control work on my OptiPlex 7020 SFF.
-
-NOTE: This is superficially similar to the OptiPlex 9010's SCH5545
-however the OptiPlex 9020's SCH5555 does not use externally
-programmed EC firmware.
-
-Change-Id: Ibdccd3fc7364e03e84ca606592928410624eed43
-Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
----
- src/mainboard/dell/optiplex_9020/Makefile.mk  |   3 +-
- src/mainboard/dell/optiplex_9020/bootblock.c  |  25 +-
- src/mainboard/dell/optiplex_9020/cmos.default |   1 +
- src/mainboard/dell/optiplex_9020/cmos.layout  |   5 +-
- src/mainboard/dell/optiplex_9020/mainboard.c  | 387 ++++++++++++++++++
- src/mainboard/dell/optiplex_9020/sch5555_ec.c |  54 +++
- src/mainboard/dell/optiplex_9020/sch5555_ec.h |  10 +
- 7 files changed, 463 insertions(+), 22 deletions(-)
- create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.c
- create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.h
-
-diff --git a/src/mainboard/dell/optiplex_9020/Makefile.mk b/src/mainboard/dell/optiplex_9020/Makefile.mk
-index 6ca2f2afaa..08e2e53577 100644
---- a/src/mainboard/dell/optiplex_9020/Makefile.mk
-+++ b/src/mainboard/dell/optiplex_9020/Makefile.mk
-@@ -2,4 +2,5 @@
- 
- romstage-y += gpio.c
- ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
--bootblock-y += bootblock.c
-+ramstage-y += sch5555_ec.c
-+bootblock-y += bootblock.c sch5555_ec.c
-diff --git a/src/mainboard/dell/optiplex_9020/bootblock.c b/src/mainboard/dell/optiplex_9020/bootblock.c
-index 2837cf9cf1..e5e759273e 100644
---- a/src/mainboard/dell/optiplex_9020/bootblock.c
-+++ b/src/mainboard/dell/optiplex_9020/bootblock.c
-@@ -4,29 +4,14 @@
- #include <device/pnp_ops.h>
- #include <superio/smsc/sch555x/sch555x.h>
- #include <southbridge/intel/lynxpoint/pch.h>
--
--static void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val)
--{
--	// Clear EC-to-Host mailbox
--	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
--	outb(tmp, SCH555x_EMI_IOBASE + 1);
--
--	// Send address and value to the EC
--	sch555x_emi_write16(0, (addr1 * 2) | 0x101);
--	sch555x_emi_write32(4, val | (addr2 << 16));
--
--	// Wait for acknowledgement message from EC
--	outb(1, SCH555x_EMI_IOBASE);
--	size_t timeout = 0;
--	do {} while (++timeout < 0xfff && (inb(SCH555x_EMI_IOBASE + 1) & 1) == 0);
--}
-+#include "sch5555_ec.h"
- 
- struct ec_init_entry {
- 	uint16_t addr;
- 	uint8_t val;
- };
- 
--static void ec_init(void)
-+static void bootblock_ec_init(void)
- {
- 	/*
- 	 * Tables from CORE_PEI
-@@ -108,9 +93,9 @@ void mainboard_config_superio(void)
- 	outb(0x01, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_UNK1);
- 	outb(0x0f, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_LED);
- 
--	// Magic EC init
--	ec_init();
-+	// Perform bootblock EC initialization
-+	bootblock_ec_init();
- 
--	// Magic EC init is needed for UART1 initialization to work
-+	// Bootblock EC initialization is required for UART1 to work
- 	sch555x_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- }
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
-index a0acd7b6bb..9e02534c16 100644
---- a/src/mainboard/dell/optiplex_9020/cmos.default
-+++ b/src/mainboard/dell/optiplex_9020/cmos.default
-@@ -4,3 +4,4 @@ debug_level=Debug
- nmi=Disable
- power_on_after_fail=Disable
- iommu=Disable
-+fan_full_speed=Disable
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.layout b/src/mainboard/dell/optiplex_9020/cmos.layout
-index 72ff9c4bee..4a1496a878 100644
---- a/src/mainboard/dell/optiplex_9020/cmos.layout
-+++ b/src/mainboard/dell/optiplex_9020/cmos.layout
-@@ -22,7 +22,10 @@ entries
- 409	2	e	5	power_on_after_fail
- 
- # turn iommu on or off
--412	1	e	6	iommu
-+411	1	e	6	iommu
-+
-+# coreboot config options: EC
-+412	1	e	1	fan_full_speed
- 
- # coreboot config options: check sums
- 984	16	h	0	check_sum
-diff --git a/src/mainboard/dell/optiplex_9020/mainboard.c b/src/mainboard/dell/optiplex_9020/mainboard.c
-index c834fea5d3..0b7829c736 100644
---- a/src/mainboard/dell/optiplex_9020/mainboard.c
-+++ b/src/mainboard/dell/optiplex_9020/mainboard.c
-@@ -1,7 +1,12 @@
- /* SPDX-License-Identifier: GPL-2.0-only */
- 
-+#include <bootstate.h>
-+#include <cpu/x86/msr.h>
- #include <device/device.h>
- #include <drivers/intel/gma/int15.h>
-+#include <option.h>
-+#include <southbridge/intel/common/gpio.h>
-+#include "sch5555_ec.h"
- 
- static void mainboard_enable(struct device *dev)
- {
-@@ -13,3 +18,385 @@ static void mainboard_enable(struct device *dev)
- struct chip_operations mainboard_ops = {
- 	.enable_dev = mainboard_enable,
- };
-+
-+#define HWM_TAB_ADD_TEMP_TARGET	1
-+#define HWM_TAB_PKG_POWER_ANY	0xffff
-+#define CHASSIS_TYPE_UNKNOWN	0xff
-+
-+struct hwm_tab_entry {
-+	uint16_t addr;
-+	uint8_t val;
-+	uint8_t flags;
-+	uint16_t pkg_power;
-+};
-+
-+struct hwm_tab_entry HWM_TAB3[] = {
-+	{ 0x005, 0x33, 0, 0xffff },
-+	{ 0x018, 0x2f, 0, 0xffff },
-+	{ 0x019, 0x2f, 0, 0xffff },
-+	{ 0x01a, 0x2f, 0, 0xffff },
-+	{ 0x080, 0x00, 0, 0xffff },
-+	{ 0x081, 0x00, 0, 0xffff },
-+	{ 0x083, 0xbb, 0, 0xffff },
-+	{ 0x085, 0x8a, 0, 0x0010 },
-+	{ 0x086, 0x4c, 0, 0x0010 },
-+	{ 0x08a, 0x66, 0, 0x0010 },
-+	{ 0x08b, 0x5b, 0, 0x0010 },
-+	{ 0x090, 0x65, 0, 0xffff },
-+	{ 0x091, 0x70, 0, 0xffff },
-+	{ 0x092, 0x86, 0, 0xffff },
-+	{ 0x096, 0xa4, 0, 0xffff },
-+	{ 0x097, 0xa4, 0, 0xffff },
-+	{ 0x098, 0xa4, 0, 0xffff },
-+	{ 0x09b, 0xa4, 0, 0xffff },
-+	{ 0x0a0, 0x0e, 0, 0xffff },
-+	{ 0x0a1, 0x0e, 0, 0xffff },
-+	{ 0x0ae, 0x7c, 0, 0xffff },
-+	{ 0x0af, 0x86, 0, 0xffff },
-+	{ 0x0b0, 0x9a, 0, 0xffff },
-+	{ 0x0b3, 0x9a, 0, 0xffff },
-+	{ 0x0b6, 0x08, 0, 0xffff },
-+	{ 0x0b7, 0x08, 0, 0xffff },
-+	{ 0x0ea, 0x64, 0, 0x0020 },
-+	{ 0x0ea, 0x5c, 0, 0x0010 },
-+	{ 0x0ef, 0xff, 0, 0xffff },
-+	{ 0x0f8, 0x15, 0, 0xffff },
-+	{ 0x0f9, 0x00, 0, 0xffff },
-+	{ 0x0f0, 0x30, 0, 0xffff },
-+	{ 0x0fd, 0x01, 0, 0xffff },
-+	{ 0x1a1, 0x00, 0, 0xffff },
-+	{ 0x1a2, 0x00, 0, 0xffff },
-+	{ 0x1b1, 0x08, 0, 0xffff },
-+	{ 0x1be, 0x99, 0, 0xffff },
-+	{ 0x280, 0xa0, 0, 0x0010 },
-+	{ 0x281, 0x0f, 0, 0x0010 },
-+	{ 0x282, 0x03, 0, 0xffff },
-+	{ 0x283, 0x0a, 0, 0xffff },
-+	{ 0x284, 0x80, 0, 0xffff },
-+	{ 0x285, 0x03, 0, 0xffff },
-+	{ 0x288, 0x68, 0, 0x0010 },
-+	{ 0x289, 0x10, 0, 0x0010 },
-+	{ 0x28a, 0x03, 0, 0xffff },
-+	{ 0x28b, 0x0a, 0, 0xffff },
-+	{ 0x28c, 0x80, 0, 0xffff },
-+	{ 0x28d, 0x03, 0, 0xffff },
-+};
-+
-+struct hwm_tab_entry HWM_TAB4[] = {
-+	{ 0x005, 0x33, 0, 0xffff },
-+	{ 0x018, 0x2f, 0, 0xffff },
-+	{ 0x019, 0x2f, 0, 0xffff },
-+	{ 0x01a, 0x2f, 0, 0xffff },
-+	{ 0x080, 0x00, 0, 0xffff },
-+	{ 0x081, 0x00, 0, 0xffff },
-+	{ 0x083, 0xbb, 0, 0xffff },
-+	{ 0x085, 0x99, 0, 0x0020 },
-+	{ 0x085, 0xad, 0, 0x0010 },
-+	{ 0x086, 0x1c, 0, 0xffff },
-+	{ 0x08a, 0x39, 0, 0x0020 },
-+	{ 0x08a, 0x41, 0, 0x0010 },
-+	{ 0x08b, 0x76, 0, 0x0020 },
-+	{ 0x08b, 0x8b, 0, 0x0010 },
-+	{ 0x090, 0x5e, 0, 0xffff },
-+	{ 0x091, 0x5e, 0, 0xffff },
-+	{ 0x092, 0x86, 0, 0xffff },
-+	{ 0x096, 0xa4, 0, 0xffff },
-+	{ 0x097, 0xa4, 0, 0xffff },
-+	{ 0x098, 0xa4, 0, 0xffff },
-+	{ 0x09b, 0xa4, 0, 0xffff },
-+	{ 0x0a0, 0x0a, 0, 0xffff },
-+	{ 0x0a1, 0x0a, 0, 0xffff },
-+	{ 0x0ae, 0x7c, 0, 0xffff },
-+	{ 0x0af, 0x7c, 0, 0xffff },
-+	{ 0x0b0, 0x9a, 0, 0xffff },
-+	{ 0x0b3, 0x7c, 0, 0xffff },
-+	{ 0x0b6, 0x08, 0, 0xffff },
-+	{ 0x0b7, 0x08, 0, 0xffff },
-+	{ 0x0ea, 0x64, 0, 0x0020 },
-+	{ 0x0ea, 0x5c, 0, 0x0010 },
-+	{ 0x0ef, 0xff, 0, 0xffff },
-+	{ 0x0f8, 0x15, 0, 0xffff },
-+	{ 0x0f9, 0x00, 0, 0xffff },
-+	{ 0x0f0, 0x30, 0, 0xffff },
-+	{ 0x0fd, 0x01, 0, 0xffff },
-+	{ 0x1a1, 0x00, 0, 0xffff },
-+	{ 0x1a2, 0x00, 0, 0xffff },
-+	{ 0x1b1, 0x08, 0, 0xffff },
-+	{ 0x1be, 0x90, 0, 0xffff },
-+	{ 0x280, 0x94, 0, 0x0020 },
-+	{ 0x281, 0x11, 0, 0x0020 },
-+	{ 0x280, 0x94, 0, 0x0010 },
-+	{ 0x281, 0x11, 0, 0x0010 },
-+	{ 0x282, 0x03, 0, 0xffff },
-+	{ 0x283, 0x0a, 0, 0xffff },
-+	{ 0x284, 0x80, 0, 0xffff },
-+	{ 0x285, 0x03, 0, 0xffff },
-+	{ 0x288, 0x28, 0, 0x0020 },
-+	{ 0x289, 0x0a, 0, 0x0020 },
-+	{ 0x288, 0x28, 0, 0x0010 },
-+	{ 0x289, 0x0a, 0, 0x0010 },
-+	{ 0x28a, 0x03, 0, 0xffff },
-+	{ 0x28b, 0x0a, 0, 0xffff },
-+	{ 0x28c, 0x80, 0, 0xffff },
-+	{ 0x28d, 0x03, 0, 0xffff },
-+};
-+
-+struct hwm_tab_entry HWM_TAB5[] = {
-+	{ 0x005, 0x33, 0, 0xffff },
-+	{ 0x018, 0x2f, 0, 0xffff },
-+	{ 0x019, 0x2f, 0, 0xffff },
-+	{ 0x01a, 0x2f, 0, 0xffff },
-+	{ 0x080, 0x00, 0, 0xffff },
-+	{ 0x081, 0x00, 0, 0xffff },
-+	{ 0x083, 0xbb, 0, 0xffff },
-+	{ 0x085, 0x66, 0, 0x0020 },
-+	{ 0x085, 0x5d, 0, 0x0010 },
-+	{ 0x086, 0x1c, 0, 0xffff },
-+	{ 0x08a, 0x39, 0, 0x0020 },
-+	{ 0x08a, 0x41, 0, 0x0010 },
-+	{ 0x08b, 0x76, 0, 0x0020 },
-+	{ 0x08b, 0x80, 0, 0x0010 },
-+	{ 0x090, 0x5d, 0, 0x0020 },
-+	{ 0x090, 0x5e, 0, 0x0010 },
-+	{ 0x091, 0x5e, 0, 0xffff },
-+	{ 0x092, 0x86, 0, 0xffff },
-+	{ 0x096, 0xa4, 0, 0xffff },
-+	{ 0x097, 0xa4, 0, 0xffff },
-+	{ 0x098, 0xa3, 0, 0x0020 },
-+	{ 0x098, 0xa4, 0, 0x0010 },
-+	{ 0x09b, 0xa4, 0, 0xffff },
-+	{ 0x0a0, 0x08, 0, 0xffff },
-+	{ 0x0a1, 0x0a, 0, 0xffff },
-+	{ 0x0ae, 0x7c, 0, 0xffff },
-+	{ 0x0af, 0x7c, 0, 0xffff },
-+	{ 0x0b0, 0x9a, 0, 0xffff },
-+	{ 0x0b3, 0x7c, 0, 0xffff },
-+	{ 0x0b6, 0x08, 0, 0xffff },
-+	{ 0x0b7, 0x08, 0, 0xffff },
-+	{ 0x0ea, 0x64, 0, 0x0020 },
-+	{ 0x0ea, 0x5c, 0, 0x0010 },
-+	{ 0x0ef, 0xff, 0, 0xffff },
-+	{ 0x0f8, 0x15, 0, 0xffff },
-+	{ 0x0f9, 0x00, 0, 0xffff },
-+	{ 0x0f0, 0x30, 0, 0xffff },
-+	{ 0x0fd, 0x01, 0, 0xffff },
-+	{ 0x1a1, 0x00, 0, 0xffff },
-+	{ 0x1a2, 0x00, 0, 0xffff },
-+	{ 0x1b1, 0x08, 0, 0xffff },
-+	{ 0x1be, 0x98, 0, 0x0020 },
-+	{ 0x1be, 0x90, 0, 0x0010 },
-+	{ 0x280, 0x94, 0, 0x0020 },
-+	{ 0x281, 0x11, 0, 0x0020 },
-+	{ 0x280, 0x94, 0, 0x0010 },
-+	{ 0x281, 0x11, 0, 0x0010 },
-+	{ 0x282, 0x03, 0, 0xffff },
-+	{ 0x283, 0x0a, 0, 0xffff },
-+	{ 0x284, 0x80, 0, 0xffff },
-+	{ 0x285, 0x03, 0, 0xffff },
-+	{ 0x288, 0x28, 0, 0x0020 },
-+	{ 0x289, 0x0a, 0, 0x0020 },
-+	{ 0x288, 0x28, 0, 0x0010 },
-+	{ 0x289, 0x0a, 0, 0x0010 },
-+	{ 0x28a, 0x03, 0, 0xffff },
-+	{ 0x28b, 0x0a, 0, 0xffff },
-+	{ 0x28c, 0x80, 0, 0xffff },
-+	{ 0x28d, 0x03, 0, 0xffff },
-+};
-+
-+struct hwm_tab_entry HWM_TAB6[] = {
-+	{ 0x005, 0x33, 0, 0xffff },
-+	{ 0x018, 0x2f, 0, 0xffff },
-+	{ 0x019, 0x2f, 0, 0xffff },
-+	{ 0x01a, 0x2f, 0, 0xffff },
-+	{ 0x080, 0x00, 0, 0xffff },
-+	{ 0x081, 0x00, 0, 0xffff },
-+	{ 0x083, 0xbb, 0, 0xffff },
-+	{ 0x085, 0x98, 0, 0xffff },
-+	{ 0x086, 0x3c, 0, 0xffff },
-+	{ 0x08a, 0x39, 0, 0x0020 },
-+	{ 0x08a, 0x3d, 0, 0x0010 },
-+	{ 0x08b, 0x44, 0, 0x0020 },
-+	{ 0x08b, 0x51, 0, 0x0010 },
-+	{ 0x090, 0x61, 0, 0xffff },
-+	{ 0x091, 0x6d, 0, 0xffff },
-+	{ 0x092, 0x86, 0, 0xffff },
-+	{ 0x096, 0xa4, 0, 0xffff },
-+	{ 0x097, 0xa4, 0, 0xffff },
-+	{ 0x098, 0x9f, 0, 0x0020 },
-+	{ 0x098, 0xa4, 0, 0x0010 },
-+	{ 0x09b, 0xa4, 0, 0xffff },
-+	{ 0x0a0, 0x0e, 0, 0xffff },
-+	{ 0x0a1, 0x0e, 0, 0xffff },
-+	{ 0x0ae, 0x7c, 0, 0xffff },
-+	{ 0x0af, 0x7c, 0, 0xffff },
-+	{ 0x0b0, 0x9b, 0, 0x0020 },
-+	{ 0x0b0, 0x98, 0, 0x0010 },
-+	{ 0x0b3, 0x9a, 0, 0xffff },
-+	{ 0x0b6, 0x08, 0, 0xffff },
-+	{ 0x0b7, 0x08, 0, 0xffff },
-+	{ 0x0ea, 0x64, 0, 0x0020 },
-+	{ 0x0ea, 0x5c, 0, 0x0010 },
-+	{ 0x0ef, 0xff, 0, 0xffff },
-+	{ 0x0f8, 0x15, 0, 0xffff },
-+	{ 0x0f9, 0x00, 0, 0xffff },
-+	{ 0x0f0, 0x30, 0, 0xffff },
-+	{ 0x0fd, 0x01, 0, 0xffff },
-+	{ 0x1a1, 0x00, 0, 0xffff },
-+	{ 0x1a2, 0x00, 0, 0xffff },
-+	{ 0x1b1, 0x08, 0, 0xffff },
-+	{ 0x1be, 0x9a, 0, 0x0020 },
-+	{ 0x1be, 0x96, 0, 0x0010 },
-+	{ 0x280, 0x94, 0, 0x0020 },
-+	{ 0x281, 0x11, 0, 0x0020 },
-+	{ 0x280, 0x94, 0, 0x0010 },
-+	{ 0x281, 0x11, 0, 0x0010 },
-+	{ 0x282, 0x03, 0, 0xffff },
-+	{ 0x283, 0x0a, 0, 0xffff },
-+	{ 0x284, 0x80, 0, 0xffff },
-+	{ 0x285, 0x03, 0, 0xffff },
-+	{ 0x288, 0x94, 0, 0x0020 },
-+	{ 0x289, 0x11, 0, 0x0020 },
-+	{ 0x288, 0x94, 0, 0x0010 },
-+	{ 0x289, 0x11, 0, 0x0010 },
-+	{ 0x28a, 0x03, 0, 0xffff },
-+	{ 0x28b, 0x0a, 0, 0xffff },
-+	{ 0x28c, 0x80, 0, 0xffff },
-+	{ 0x28d, 0x03, 0, 0xffff },
-+};
-+
-+static uint8_t get_chassis_type(void)
-+{
-+	uint8_t gpio_chassis_type;
-+
-+	// Read chassis type from GPIO
-+	gpio_chassis_type = get_gpio(70) << 3 | get_gpio(38) << 2 |
-+			    get_gpio(17) << 1 | get_gpio(1);
-+
-+	printk(BIOS_DEBUG, "GPIO chassis type = %#x\n", gpio_chassis_type);
-+
-+	// Turn it into internal chassis index
-+	switch (gpio_chassis_type) {
-+	case 0x08:
-+	case 0x0a:
-+		return 4;
-+	case 0x0b:
-+		return 3;
-+	case 0x0c:
-+		return 5;
-+	case 0x0d: // SFF
-+	case 0x0e:
-+	case 0x0f:
-+		return 6;
-+	default:
-+		return CHASSIS_TYPE_UNKNOWN;
-+	}
-+
-+}
-+
-+static uint8_t get_temp_target(void)
-+{
-+	uint8_t val = rdmsr(0x1a2).lo >> 8 & 0xff;
-+	if (!val)
-+		val = 20;
-+	return 0x95 - val;
-+}
-+
-+static uint16_t get_pkg_power(void)
-+{
-+	uint8_t rapl_power_unit = rdmsr(0x606).lo & 0xf;
-+	if (rapl_power_unit)
-+		rapl_power_unit = 2 << (rapl_power_unit - 1);
-+	uint16_t pkg_power_info = rdmsr(0x614).lo & 0x7fff;
-+	if (pkg_power_info / rapl_power_unit > 0x41)
-+		return 32;
-+	else
-+		return 16;
-+}
-+
-+static void apply_hwm_tab(struct hwm_tab_entry *arr, size_t size)
-+{
-+	uint8_t temp_target = get_temp_target();
-+	uint16_t pkg_power = get_pkg_power();
-+
-+	printk(BIOS_DEBUG, "Temp target = %#x\n", temp_target);
-+	printk(BIOS_DEBUG, "Package power = %#x\n", pkg_power);
-+
-+	for (size_t i = 0; i < size; ++i) {
-+		// Skip entry if it doesn't apply for this package power
-+		if (arr[i].pkg_power != pkg_power &&
-+		    arr[i].pkg_power != HWM_TAB_PKG_POWER_ANY)
-+			continue;
-+
-+		uint8_t val = arr[i].val;
-+
-+		// Add temp target to value if requested (current tables never do)
-+		if (arr[i].flags & HWM_TAB_ADD_TEMP_TARGET)
-+			val += temp_target;
-+
-+		// Perform write
-+		ec_write(1, arr[i].addr, val);
-+
-+	}
-+}
-+
-+static void sch5555_ec_hwm_init(void *arg)
-+{
-+	uint8_t chassis_type, saved_2fc;
-+
-+	printk(BIOS_DEBUG, "OptiPlex 9020 late HWM init\n");
-+
-+	saved_2fc = ec_read(1, 0x2fc);
-+	ec_write(1, 0x2fc, 0xa0);
-+	ec_write(1, 0x2fd, 0x32);
-+
-+	chassis_type = get_chassis_type();
-+
-+	if (chassis_type != CHASSIS_TYPE_UNKNOWN) {
-+		printk(BIOS_DEBUG, "Chassis type = %#x\n", chassis_type);
-+	} else {
-+		printk(BIOS_DEBUG, "WARNING: Unknown chassis type\n");
-+	}
-+
-+	// Apply HWM table based on chassis type
-+	switch (chassis_type) {
-+	case 3:
-+		apply_hwm_tab(HWM_TAB3, ARRAY_SIZE(HWM_TAB3));
-+		break;
-+	case 4:
-+		apply_hwm_tab(HWM_TAB4, ARRAY_SIZE(HWM_TAB4));
-+		break;
-+	case 5:
-+		apply_hwm_tab(HWM_TAB5, ARRAY_SIZE(HWM_TAB5));
-+		break;
-+	case 6:
-+		apply_hwm_tab(HWM_TAB6, ARRAY_SIZE(HWM_TAB6));
-+		break;
-+	}
-+
-+	// NOTE: vendor firmware applies these when "max core address" > 2
-+	// i think this is always the case
-+	ec_write(1, 0x9e, 0x30);
-+	ec_write(1, 0xeb, ec_read(1, 0xea));
-+
-+	ec_write(1, 0x2fc, saved_2fc);
-+
-+	// Apply full speed fan config if requested or if the chassis type is unknown
-+	if (chassis_type == CHASSIS_TYPE_UNKNOWN || get_uint_option("fan_full_speed", 0)) {
-+		printk(BIOS_DEBUG, "Setting full fan speed\n");
-+		ec_write(1, 0x80, 0x60 | ec_read(1, 0x80));
-+		ec_write(1, 0x81, 0x60 | ec_read(1, 0x81));
-+	}
-+
-+	ec_read(1, 0xb8);
-+
-+	if ((chassis_type == 4 || chassis_type == 5) && ec_read(1, 0x26) == 0) {
-+		ec_write(1, 0xa0, ec_read(1, 0xa0) & 0xfb);
-+		ec_write(1, 0xa1, ec_read(1, 0xa1) & 0xfb);
-+		ec_write(1, 0xa2, ec_read(1, 0xa2) & 0xfb);
-+		ec_write(1, 0x8a, 0x99);
-+		ec_write(1, 0x8b, 0x47);
-+		ec_write(1, 0x8c, 0x91);
-+	}
-+}
-+
-+BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL);
-diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.c b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
-new file mode 100644
-index 0000000000..a1067ac063
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
-@@ -0,0 +1,54 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <arch/io.h>
-+#include <device/pnp_ops.h>
-+#include <superio/smsc/sch555x/sch555x.h>
-+#include "sch5555_ec.h"
-+
-+uint8_t ec_read(uint8_t addr1, uint16_t addr2)
-+{
-+	// clear ec-to-host mailbox
-+	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
-+	outb(tmp, SCH555x_EMI_IOBASE + 1);
-+
-+	// send address
-+	outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
-+	outw((addr1 * 2) | 0x100, SCH555x_EMI_IOBASE + 4);
-+
-+	outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
-+	outl(addr2 << 16, SCH555x_EMI_IOBASE + 4);
-+
-+	// send message to ec
-+	outb(1, SCH555x_EMI_IOBASE);
-+
-+	// wait for ack
-+	for (size_t retry = 0; retry < 0xfff; ++retry)
-+		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
-+			break;
-+
-+	// read result
-+	outw(4 | 0x8000, SCH555x_EMI_IOBASE + 2);
-+	return inb(SCH555x_EMI_IOBASE + 4);
-+}
-+
-+void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val)
-+{
-+	// clear ec-to-host mailbox
-+	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
-+	outb(tmp, SCH555x_EMI_IOBASE + 1);
-+
-+	// send address and value
-+	outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
-+	outw((addr1 * 2) | 0x101, SCH555x_EMI_IOBASE + 4);
-+
-+	outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
-+	outl(val | (addr2 << 16), SCH555x_EMI_IOBASE + 4);
-+
-+	// send message to ec
-+	outb(1, SCH555x_EMI_IOBASE);
-+
-+	// wait for ack
-+	for (size_t retry = 0; retry < 0xfff; ++retry)
-+		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
-+			break;
-+}
-diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.h b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
-new file mode 100644
-index 0000000000..7e399e8e74
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
-@@ -0,0 +1,10 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#ifndef __SCH5555_EC_H__
-+#define __SCH5555_EC_H__
-+
-+uint8_t ec_read(uint8_t addr1, uint16_t addr2);
-+
-+void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val);
-+
-+#endif
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0024-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch b/config/coreboot/haswell/patches/0024-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
deleted file mode 100644
index fb112f8c..00000000
--- a/config/coreboot/haswell/patches/0024-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From ae494dc1b1dde92ec42390b85ced0ffe816f5110 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sat, 6 Apr 2024 01:22:47 +0100
-Subject: [PATCH 4/4] nb/haswell: Fully disable iGPU when dGPU is used
-
-My earlier patch disabled decode *and* disabled the iGPU itself, but
-a subsequent revision disabled only VGA decode. Upon revisiting, I
-found that, actually, yes, you also need to disable the iGPU entirely.
-
-Tested on Dell 9020 SFF using broadwell MRC, with both iGPU and dGPU.
-With this patch, the iGPU is completely disabled when you install a
-graphics card, but the iGPU is available to use when no graphics card
-is present.
-
-For more context, see:
-
-Author: Leah Rowe <info@minifree.org>
-Date:   Fri Feb 23 13:33:31 2024 +0000
-
-    nb/haswell: Disable iGPU when dGPU is used
-
-And look at the Gerrit comments:
-
-https://review.coreboot.org/c/coreboot/+/80717/
-
-So, my original submission on change 80717 was actually correct.
-This patch fixes the issue. I tested on iGPU and dGPU, with both
-broadwell and haswell mrc.bin.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/northbridge/intel/haswell/gma.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
-index 9e9f9804f5..526a51aff0 100644
---- a/src/northbridge/intel/haswell/gma.c
-+++ b/src/northbridge/intel/haswell/gma.c
-@@ -464,6 +464,9 @@ static void gma_func0_disable(struct device *dev)
- {
- 	/* Disable VGA decode */
- 	pci_or_config16(pcidev_on_root(0, 0), GGC, 1 << 1);
-+
-+	/* Required or else the graphics card doesn't work */
-+	dev->enabled = 0;
- }
- 
- static struct device_operations gma_func0_ops = {
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0025-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch b/config/coreboot/haswell/patches/0025-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
deleted file mode 100644
index 52147426..00000000
--- a/config/coreboot/haswell/patches/0025-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 355536155898e649fa50277136ccd2df53a52bb1 Mon Sep 17 00:00:00 2001
-From: Mate Kukri <kukri.mate@gmail.com>
-Date: Wed, 10 Apr 2024 20:31:35 +0100
-Subject: [PATCH 1/1] mb/dell/optiplex_9020: Add support for TPM1.2 device
-
-These machines come with a TPM1.2 device by default. It is somewhat
-obsolete these days, but there is no harm in enabling it.
-
-Change-Id: Iec05321862aed58695c256b00494e5953219786d
-Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
-Reviewed-on: https://review.coreboot.org/c/coreboot/+/81827
-Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
----
- src/mainboard/dell/optiplex_9020/Kconfig       | 2 ++
- src/mainboard/dell/optiplex_9020/devicetree.cb | 3 +++
- 2 files changed, 5 insertions(+)
-
-diff --git a/src/mainboard/dell/optiplex_9020/Kconfig b/src/mainboard/dell/optiplex_9020/Kconfig
-index 2de4a9abd6..38c3281e70 100644
---- a/src/mainboard/dell/optiplex_9020/Kconfig
-+++ b/src/mainboard/dell/optiplex_9020/Kconfig
-@@ -12,7 +12,9 @@ config BOARD_SPECIFIC_OPTIONS
- 	select INTEL_GMA_HAVE_VBT
- 	select INTEL_INT15
- 	select MAINBOARD_HAS_LIBGFXINIT
-+	select MAINBOARD_HAS_TPM1
- 	select MAINBOARD_USES_IFD_GBE_REGION
-+	select MEMORY_MAPPED_TPM
- 	select NORTHBRIDGE_INTEL_HASWELL
- 	select SERIRQ_CONTINUOUS_MODE
- 	select SOUTHBRIDGE_INTEL_LYNXPOINT
-diff --git a/src/mainboard/dell/optiplex_9020/devicetree.cb b/src/mainboard/dell/optiplex_9020/devicetree.cb
-index dce5869478..841285bb9c 100644
---- a/src/mainboard/dell/optiplex_9020/devicetree.cb
-+++ b/src/mainboard/dell/optiplex_9020/devicetree.cb
-@@ -70,6 +70,9 @@ chip northbridge/intel/haswell
- 					device pnp 2e.b  off end	# Floppy Controller
- 					device pnp 2e.11 off end	# Parallel Port
- 				end
-+				chip drivers/pc80/tpm
-+					device pnp 0c31.0 on end
-+				end
- 			end
- 			device pci 1f.2 on  end				# SATA controller 1
- 			device pci 1f.3 on  end				# SMBus
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0026-use-mirrorservice.org-for-iasl-downloads.patch b/config/coreboot/haswell/patches/0026-use-mirrorservice.org-for-iasl-downloads.patch
deleted file mode 100644
index f9981abd..00000000
--- a/config/coreboot/haswell/patches/0026-use-mirrorservice.org-for-iasl-downloads.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From ed30cca924fa576dd5b69ce4a348b5a1466a8db1 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sun, 28 Apr 2024 01:57:46 +0100
-Subject: [PATCH 1/1] use mirrorservice.org for iasl downloads
-
-github is unreliable. i mirror these files myself.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- util/crossgcc/buildgcc | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 6ae201239d..a8433a25e5 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -74,7 +74,7 @@ MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
- MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
- GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
- BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
--IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
-+IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
- CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0027-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch b/config/coreboot/haswell/patches/0027-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
deleted file mode 100644
index 9b6020a2..00000000
--- a/config/coreboot/haswell/patches/0027-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From b75d9e385137b3b561fc7220c04f742817d319b2 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sat, 4 May 2024 02:00:53 +0100
-Subject: [PATCH 1/1] nb/haswell: lock policy regs when disabling IOMMU
-
-Angel Pons told me I should do it. See comments here:
-https://review.coreboot.org/c/coreboot/+/81016
-
-I see no harm in complying with the request. I'll merge
-this into the main patch at a later date and try to
-get this upstreamed.
-
-Just a reminder: on Optiplex 9020 variants, Xorg locks up
-under Linux when tested with a graphics card; disabling
-IOMMU works around the issue. Intel graphics work just fine
-with IOMMU turned on. Libreboot disables IOMMU by default,
-on the 9020, so that users can install graphics cards easily.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/northbridge/intel/haswell/early_init.c | 15 +++++++--------
- 1 file changed, 7 insertions(+), 8 deletions(-)
-
-diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c
-index 1a7e0b1076..e9506ee830 100644
---- a/src/northbridge/intel/haswell/early_init.c
-+++ b/src/northbridge/intel/haswell/early_init.c
-@@ -160,17 +160,16 @@ static void haswell_setup_iommu(void)
- 	const u32 capid0_a = pci_read_config32(HOST_BRIDGE, CAPID0_A);
- 	u8 enable_iommu = get_uint_option("iommu", 1);
- 
--	if (!enable_iommu)
--		return;
--
- 	if (capid0_a & VTD_DISABLE)
- 		return;
- 
--	/* Setup BARs: zeroize top 32 bits; set enable bit */
--	mchbar_write32(GFXVTBAR + 4, GFXVT_BASE_ADDRESS >> 32);
--	mchbar_write32(GFXVTBAR + 0, GFXVT_BASE_ADDRESS | 1);
--	mchbar_write32(VTVC0BAR + 4, VTVC0_BASE_ADDRESS >> 32);
--	mchbar_write32(VTVC0BAR + 0, VTVC0_BASE_ADDRESS | 1);
-+	if (enable_iommu) {
-+		/* Setup BARs: zeroize top 32 bits; set enable bit */
-+		mchbar_write32(GFXVTBAR + 4, GFXVT_BASE_ADDRESS >> 32);
-+		mchbar_write32(GFXVTBAR + 0, GFXVT_BASE_ADDRESS | 1);
-+		mchbar_write32(VTVC0BAR + 4, VTVC0_BASE_ADDRESS >> 32);
-+		mchbar_write32(VTVC0BAR + 0, VTVC0_BASE_ADDRESS | 1);
-+	}
- 
- 	/* Set L3HIT2PEND_DIS, lock GFXVTBAR policy config registers */
- 	u32 reg32;
--- 
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0028-nb-intel-haswell-Synchronize-lists-of-graphics-PCI-I.patch b/config/coreboot/haswell/patches/0028-nb-intel-haswell-Synchronize-lists-of-graphics-PCI-I.patch
deleted file mode 100644
index 422b291e..00000000
--- a/config/coreboot/haswell/patches/0028-nb-intel-haswell-Synchronize-lists-of-graphics-PCI-I.patch
+++ /dev/null
@@ -1,44 +0,0 @@
-From bfb39806c9edbfee7383c99a73e228a5314ee2c2 Mon Sep 17 00:00:00 2001
-From: Nico Huber <nico.h@gmx.de>
-Date: Mon, 03 Jun 2024 20:08:26 +0200
-Subject: [PATCH] nb/intel/haswell: Synchronize lists of graphics PCI IDs
-
-Both, the list of IDs that we hooked our driver up to and the list
-that we use for VBIOS mapping, had gaps. Fill those.
-
-Change-Id: I97c09bb113cf0f35ae158abbd0ba2632dbad7cad
-Signed-off-by: Nico Huber <nico.h@gmx.de>
-Reviewed-on: https://review.coreboot.org/c/coreboot/+/82787
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-Reviewed-by: Angel Pons <th3fanbus@gmail.com>
----
-
-diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
-index 9e9f980..f7fad31 100644
---- a/src/northbridge/intel/haswell/gma.c
-+++ b/src/northbridge/intel/haswell/gma.c
-@@ -93,12 +93,14 @@
- 	case 0x80860406:		/* GT1 Mobile */
- 	case 0x8086040a:		/* GT1 Server */
- 	case 0x80860a06:		/* GT1 ULT */
-+	case 0x80860a0e:		/* GT1 ULX */
- 
- 	case 0x80860412:		/* GT2 Desktop */
- 	case 0x80860416:		/* GT2 Mobile */
- 	case 0x8086041a:		/* GT2 Server */
- 	case 0x8086041e:		/* GT1.5 Desktop */
- 	case 0x80860a16:		/* GT2 ULT */
-+	case 0x80860a1e:		/* GT2 ULX */
- 
- 	case 0x80860422:		/* GT3 Desktop */
- 	case 0x80860426:		/* GT3 Mobile */
-@@ -485,6 +487,9 @@
- 	0x0406, /* Mobile GT1 */
- 	0x0416, /* Mobile GT2 */
- 	0x0426, /* Mobile GT3 */
-+	0x040a, /* Server GT1 */
-+	0x041a, /* Server GT2 */
-+	0x042a, /* Server GT3 */
- 	0x0d16, /* Mobile 4+3 GT1 */
- 	0x0d26, /* Mobile 4+3 GT2, Mobile GT3e */
- 	0x0d36, /* Mobile 4+3 GT3 */
diff --git a/config/coreboot/haswell/patches/0029-mb-dell-optiplex_9020-Fix-integrated-video-port-list.patch b/config/coreboot/haswell/patches/0029-mb-dell-optiplex_9020-Fix-integrated-video-port-list.patch
deleted file mode 100644
index b599e236..00000000
--- a/config/coreboot/haswell/patches/0029-mb-dell-optiplex_9020-Fix-integrated-video-port-list.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From c8929f5fb43b6e9b491ae00885be507d01b2a896 Mon Sep 17 00:00:00 2001
-From: Mate Kukri <kukri.mate@gmail.com>
-Date: Tue, 11 Jun 2024 20:26:16 +0100
-Subject: [PATCH] mb/dell/optiplex_9020: Fix integrated video port list
-
-- Physical DP ports are DP2/DP3 (HDMI2/HDMI3 for DP++)
-- VGA port is Analog
-- DP1 is not connected
-
-Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
-Change-Id: I8ed79167d5445d607acbee491c3382ff2585583f
----
-
-diff --git a/src/mainboard/dell/optiplex_9020/gma-mainboard.ads b/src/mainboard/dell/optiplex_9020/gma-mainboard.ads
-index 173f2f1..7d95061 100644
---- a/src/mainboard/dell/optiplex_9020/gma-mainboard.ads
-+++ b/src/mainboard/dell/optiplex_9020/gma-mainboard.ads
-@@ -9,9 +9,10 @@
- private package GMA.Mainboard is
- 
-    ports : constant Port_List :=
--     (DP1,
--      DP2,
-+     (DP2,
-       DP3,
-+      HDMI2,
-+      HDMI3,
-       Analog,
-       others => Disabled);
- 
diff --git a/config/coreboot/haswell/target.cfg b/config/coreboot/haswell/target.cfg
deleted file mode 100644
index 69f9bd39..00000000
--- a/config/coreboot/haswell/target.cfg
+++ /dev/null
@@ -1,2 +0,0 @@
-tree="haswell"
-rev="b7341da19133991efd29880849bdaab29a6e243d"
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
index dd614202..19816005 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
@@ -37,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +94,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -126,12 +128,16 @@ CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
 CONFIG_VARIANT_DIR="t440p"
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
@@ -154,6 +160,7 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -205,14 +212,14 @@ CONFIG_PS2M_EISAID="LEN0036"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -400,6 +407,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -522,8 +530,8 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
index a0dce901..d9627c4e 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
@@ -37,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +94,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -124,12 +126,16 @@ CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
 CONFIG_VARIANT_DIR="t440p"
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
@@ -152,6 +158,7 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -203,14 +210,14 @@ CONFIG_PS2M_EISAID="LEN0036"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -398,6 +405,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -519,8 +527,8 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index 6d2e9a22..e7411d7f 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -1,4 +1,4 @@
-tree="haswell"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
index ae155585..944e3b3d 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
@@ -37,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +94,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -126,12 +128,16 @@ CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
 CONFIG_VARIANT_DIR="w541"
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
@@ -154,6 +160,7 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -205,14 +212,14 @@ CONFIG_PS2M_EISAID="LEN004A"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -400,6 +407,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -521,8 +529,8 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_txtmode b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
index 9a891434..e07e8867 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
@@ -37,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_TSEG_STAGE_CACHE is not set
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -55,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +94,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -124,12 +126,16 @@ CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
 CONFIG_VARIANT_DIR="w541"
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
@@ -152,6 +158,7 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -203,14 +210,14 @@ CONFIG_PS2M_EISAID="LEN004A"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
 CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 # CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_12288=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -398,6 +405,7 @@ CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -518,8 +526,8 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
-# CONFIG_NO_TPM is not set
 CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
 CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index 6d2e9a22..e7411d7f 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -1,4 +1,4 @@
-tree="haswell"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"

From 0f7c0aa1c53ee321c45ffaae2da701eaef5a7350 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 10 Aug 2024 17:47:52 +0100
Subject: [PATCH 0802/1549] coreboot/default: re-merge coreboot/i945

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...Set-default-VRAM-to-64MiB-instead-of.patch |  23 ---
 ...d-c3-and-clockgen-to-apple-macbook21.patch |  68 -------
 ...-Video-RAM-changed-to-default-previo.patch |  23 ---
 ...64MiB-VRAM-the-default-in-cmos.defau.patch |  22 ---
 ...use-mirrorservice-for-gnu-toolchains.patch |  34 ----
 ...-option.c-Stop-resetting-CMOS-during.patch |  56 ------
 ...-option.c-Reset-only-CMOS-range-cove.patch |  51 -----
 ...or-coreboot-images-built-without-a-p.patch |  38 ----
 ...mirrorservice.org-for-iasl-downloads.patch |  28 ---
 config/coreboot/i945/target.cfg               |   2 -
 .../macbook11/config/libgfxinit_corebootfb    |  84 ++++++---
 .../macbook11/config/libgfxinit_txtmode       |  84 ++++++---
 config/coreboot/macbook11/target.cfg          |   2 +-
 .../config/libgfxinit_corebootfb              |  84 ++++++---
 .../macbook11_16mb/config/libgfxinit_txtmode  |  84 ++++++---
 config/coreboot/macbook11_16mb/target.cfg     |   2 +-
 .../macbook21/config/libgfxinit_corebootfb    |  84 ++++++---
 .../macbook21/config/libgfxinit_txtmode       |  84 ++++++---
 config/coreboot/macbook21/target.cfg          |   2 +-
 .../config/libgfxinit_corebootfb              |  84 ++++++---
 .../macbook21_16mb/config/libgfxinit_txtmode  |  84 ++++++---
 config/coreboot/macbook21_16mb/target.cfg     |   2 +-
 .../config/libgfxinit_corebootfb              |  91 ++++++---
 .../config/libgfxinit_txtmode                 |  91 ++++++---
 config/coreboot/t60_16mb_intelgpu/target.cfg  |   2 +-
 .../t60_intelgpu/config/libgfxinit_corebootfb |  91 ++++++---
 .../t60_intelgpu/config/libgfxinit_txtmode    |  91 ++++++---
 config/coreboot/t60_intelgpu/target.cfg       |   2 +-
 .../coreboot/x60/config/libgfxinit_corebootfb |  92 ++++++---
 config/coreboot/x60/config/libgfxinit_txtmode |  92 ++++++---
 config/coreboot/x60/target.cfg                |   2 +-
 .../x60_16mb/config/libgfxinit_corebootfb     |  92 ++++++---
 .../x60_16mb/config/libgfxinit_txtmode        |  92 ++++++---
 config/coreboot/x60_16mb/target.cfg           |   2 +-
 .../coreboot/i945/R10_20_22.tar.gz/module.cfg |   3 -
 .../i945/binutils-2.37.tar.xz/module.cfg      |   3 -
 .../i945/gcc-11.2.0.tar.xz/module.cfg         |   3 -
 .../coreboot/i945/gmp-6.2.1.tar.xz/module.cfg |   3 -
 .../coreboot/i945/intel-microcode/module.cfg  |   3 -
 .../coreboot/i945/libgfxinit/module.cfg       |   3 -
 .../coreboot/i945/libhwbase/module.cfg        |   3 -
 config/submodule/coreboot/i945/module.list    |  11 --
 .../coreboot/i945/mpc-1.3.1.tar.gz/module.cfg |   3 -
 .../i945/mpfr-4.2.0.tar.xz/module.cfg         |   3 -
 .../i945/nasm-2.15.05.tar.bz2/module.cfg      |   3 -
 .../submodule/coreboot/i945/vboot/module.cfg  |   3 -
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch | 178 ------------------
 47 files changed, 976 insertions(+), 1011 deletions(-)
 delete mode 100644 config/coreboot/i945/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
 delete mode 100644 config/coreboot/i945/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
 delete mode 100644 config/coreboot/i945/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
 delete mode 100644 config/coreboot/i945/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
 delete mode 100644 config/coreboot/i945/patches/0005-buildgcc-use-mirrorservice-for-gnu-toolchains.patch
 delete mode 100644 config/coreboot/i945/patches/0006-drivers-pc80-rtc-option.c-Stop-resetting-CMOS-during.patch
 delete mode 100644 config/coreboot/i945/patches/0007-drivers-pc80-rtc-option.c-Reset-only-CMOS-range-cove.patch
 delete mode 100644 config/coreboot/i945/patches/0022-Remove-warning-for-coreboot-images-built-without-a-p.patch
 delete mode 100644 config/coreboot/i945/patches/0023-use-mirrorservice.org-for-iasl-downloads.patch
 delete mode 100644 config/coreboot/i945/target.cfg
 delete mode 100644 config/submodule/coreboot/i945/R10_20_22.tar.gz/module.cfg
 delete mode 100644 config/submodule/coreboot/i945/binutils-2.37.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/i945/gcc-11.2.0.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/i945/gmp-6.2.1.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/i945/intel-microcode/module.cfg
 delete mode 100644 config/submodule/coreboot/i945/libgfxinit/module.cfg
 delete mode 100644 config/submodule/coreboot/i945/libhwbase/module.cfg
 delete mode 100644 config/submodule/coreboot/i945/module.list
 delete mode 100644 config/submodule/coreboot/i945/mpc-1.3.1.tar.gz/module.cfg
 delete mode 100644 config/submodule/coreboot/i945/mpfr-4.2.0.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/i945/nasm-2.15.05.tar.bz2/module.cfg
 delete mode 100644 config/submodule/coreboot/i945/vboot/module.cfg
 delete mode 100644 config/submodule/coreboot/i945/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch

diff --git a/config/coreboot/i945/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch b/config/coreboot/i945/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
deleted file mode 100644
index a06a5058..00000000
--- a/config/coreboot/i945/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From 4c5971a6fcf7e948f7df4d0ce2ab0751060cb2ca Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@retroboot.org>
-Date: Fri, 19 Mar 2021 05:54:58 +0000
-Subject: [PATCH 01/18] apple/macbook21: Set default VRAM to 64MiB instead of
- 8MiB
-
----
- src/mainboard/apple/macbook21/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/apple/macbook21/cmos.default b/src/mainboard/apple/macbook21/cmos.default
-index cf1bc4566e..dc0df3b6d6 100644
---- a/src/mainboard/apple/macbook21/cmos.default
-+++ b/src/mainboard/apple/macbook21/cmos.default
-@@ -5,4 +5,4 @@ boot_devices=''
- boot_default=0x40
- cmos_defaults_loaded=Yes
- lpt=Enable
--gfx_uma_size=8M
-+gfx_uma_size=64M
--- 
-2.39.2
-
diff --git a/config/coreboot/i945/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch b/config/coreboot/i945/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
deleted file mode 100644
index 57c32ec7..00000000
--- a/config/coreboot/i945/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From ff523fd40649b72512b0f1253701509d83ca4a8d Mon Sep 17 00:00:00 2001
-From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
-Date: Wed, 27 Oct 2021 13:36:01 +0200
-Subject: [PATCH 02/18] add c3 and clockgen to apple/macbook21
-
----
- src/mainboard/apple/macbook21/Kconfig       |  1 +
- src/mainboard/apple/macbook21/cstates.c     | 13 +++++++++++++
- src/mainboard/apple/macbook21/devicetree.cb |  6 ++++++
- 3 files changed, 20 insertions(+)
-
-diff --git a/src/mainboard/apple/macbook21/Kconfig b/src/mainboard/apple/macbook21/Kconfig
-index 5f5ffde588..27377b737c 100644
---- a/src/mainboard/apple/macbook21/Kconfig
-+++ b/src/mainboard/apple/macbook21/Kconfig
-@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
- 	select HAVE_ACPI_TABLES
- 	select HAVE_ACPI_RESUME
- 	select I945_LVDS
-+	select DRIVERS_I2C_CK505
- 
- config MAINBOARD_DIR
- 	default "apple/macbook21"
-diff --git a/src/mainboard/apple/macbook21/cstates.c b/src/mainboard/apple/macbook21/cstates.c
-index 13d06f0839..88b8669c61 100644
---- a/src/mainboard/apple/macbook21/cstates.c
-+++ b/src/mainboard/apple/macbook21/cstates.c
-@@ -29,6 +29,19 @@ static const acpi_cstate_t cst_entries[] = {
- 			.addrh = 0,
- 		}
- 	},
-+	{
-+		.ctype = 3,
-+		.latency = 17,
-+		.power = 250,
-+		.resource = {
-+			.space_id = ACPI_ADDRESS_SPACE_FIXED,
-+			.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
-+			.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
-+			.access_size = ACPI_ACCESS_SIZE_UNDEFINED,
-+			.addrl = 0x20,
-+			.addrh = 0,
-+		}
-+	},
- };
- 
- int get_cst_entries(const acpi_cstate_t **entries)
-diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb
-index dd701da7ed..5587c48d1f 100644
---- a/src/mainboard/apple/macbook21/devicetree.cb
-+++ b/src/mainboard/apple/macbook21/devicetree.cb
-@@ -100,7 +100,13 @@ chip northbridge/intel/i945
- 			end
- 			device pci 1f.3 on # SMBUS
- 				subsystemid 0x8086 0x7270
-+				chip drivers/i2c/ck505
-+					register "mask" = "{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }"
-+					register "regs" = "{ 0x77, 0x77, 0x2d, 0x00, 0x21, 0x10, 0x3b, 0x06, 0x07, 0x0f, 0xf0, 0x01, 0x1e, 0x7f, 0x80, 0x80, 0x10, 0x08, 0x04, 0x01 }"
-+					device i2c 69 on end
-+				end
- 			end
-+
- 		end
- 	end
- end
--- 
-2.39.2
-
diff --git a/config/coreboot/i945/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch b/config/coreboot/i945/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
deleted file mode 100644
index d8ca5b1f..00000000
--- a/config/coreboot/i945/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From fe79712702002bf2044227d6c3cef7ae022e3539 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@osboot.org>
-Date: Sun, 3 Jan 2021 03:34:01 +0000
-Subject: [PATCH 03/18] lenovo/x60: 64MiB Video RAM changed to default
- (previously it was 8MiB)
-
----
- src/mainboard/lenovo/x60/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/lenovo/x60/cmos.default b/src/mainboard/lenovo/x60/cmos.default
-index 5c3576d1f3..88170a1aab 100644
---- a/src/mainboard/lenovo/x60/cmos.default
-+++ b/src/mainboard/lenovo/x60/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
- sticky_fn=Disable
- power_management_beeps=Enable
- low_battery_beep=Enable
--gfx_uma_size=8M
-+gfx_uma_size=64M
--- 
-2.39.2
-
diff --git a/config/coreboot/i945/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch b/config/coreboot/i945/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
deleted file mode 100644
index 630e68a6..00000000
--- a/config/coreboot/i945/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
+++ /dev/null
@@ -1,22 +0,0 @@
-From 79440902866bdafeec651476a5a0e51d42b43b21 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@osboot.org>
-Date: Mon, 22 Feb 2021 22:16:59 +0000
-Subject: [PATCH 04/18] lenovo/t60: make 64MiB VRAM the default in cmos.default
-
----
- src/mainboard/lenovo/t60/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/lenovo/t60/cmos.default b/src/mainboard/lenovo/t60/cmos.default
-index af865f16da..7f03157df7 100644
---- a/src/mainboard/lenovo/t60/cmos.default
-+++ b/src/mainboard/lenovo/t60/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
- sticky_fn=Disable
- power_management_beeps=Enable
- low_battery_beep=Enable
--gfx_uma_size=8M
-+gfx_uma_size=64M
--- 
-2.39.2
-
diff --git a/config/coreboot/i945/patches/0005-buildgcc-use-mirrorservice-for-gnu-toolchains.patch b/config/coreboot/i945/patches/0005-buildgcc-use-mirrorservice-for-gnu-toolchains.patch
deleted file mode 100644
index dcb28780..00000000
--- a/config/coreboot/i945/patches/0005-buildgcc-use-mirrorservice-for-gnu-toolchains.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 5d8fc92948782e9837b26ee8cdfaa88f41fce174 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Fri, 26 Apr 2024 09:16:57 +0100
-Subject: [PATCH 1/1] buildgcc: use mirrorservice for gnu toolchains
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- util/crossgcc/buildgcc | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 0de27ed6e8..0faea86894 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -66,11 +66,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
- # to the jenkins build as well, or the builder won't download it.
- 
- # GCC toolchain archive locations
--GMP_BASE_URL="https://ftpmirror.gnu.org/gmp"
--MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
--MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
--GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
--BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
-+GMP_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp"
-+MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
-+MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
-+GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
-+BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
- IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
--- 
-2.39.2
-
diff --git a/config/coreboot/i945/patches/0006-drivers-pc80-rtc-option.c-Stop-resetting-CMOS-during.patch b/config/coreboot/i945/patches/0006-drivers-pc80-rtc-option.c-Stop-resetting-CMOS-during.patch
deleted file mode 100644
index e11e33da..00000000
--- a/config/coreboot/i945/patches/0006-drivers-pc80-rtc-option.c-Stop-resetting-CMOS-during.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 412f1d68c610f69384b156f09f0b326af984b7cc Mon Sep 17 00:00:00 2001
-From: Bill XIE <persmule@hardenedlinux.org>
-Date: Sat, 7 Oct 2023 01:32:51 +0800
-Subject: [PATCH 1/2] drivers/pc80/rtc/option.c: Stop resetting CMOS during s3
- resume
-
-After commit e12b313844da ("drivers/pc80/rtc/option.c: Allow CMOS
-defaults to extend to bank 1"), Thinkpad X200 with
-CONFIG(STATIC_OPTION_TABLE) can no longer resume from s3 (detected via
-bisect).
-
-Further inspection shows that DRAM training result of GM45 is stored
-in CMOS above 128 bytes in raminit_read_write_training.c, for s3 resume
-to restore, but it will be erased by sanitize_cmos(), which now clears
-both bank 0 and bank 1, leaving only "untrained" result restored, so s3
-resume will fail.
-
-However, resetting CMOS seems unnecessary during s3 resume. Now,
-cmos_need_reset will be negated when acpi_is_wakeup_s3() returns true.
-
-Tested: Thinkpad X200 with CONFIG(STATIC_OPTION_TABLE) can resume from
-	s3 again with these changes.
-
-Change-Id: I533e83f3b95f327b0e24f4d750f8812325b7770b
-Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
-Reviewed-on: https://review.coreboot.org/c/coreboot/+/78288
-Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
----
- src/drivers/pc80/rtc/option.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/src/drivers/pc80/rtc/option.c b/src/drivers/pc80/rtc/option.c
-index e8e2345133..e6cfa175ad 100644
---- a/src/drivers/pc80/rtc/option.c
-+++ b/src/drivers/pc80/rtc/option.c
-@@ -1,5 +1,6 @@
- /* SPDX-License-Identifier: GPL-2.0-only */
- 
-+#include <acpi/acpi.h>
- #include <console/console.h>
- #include <string.h>
- #include <cbfs.h>
-@@ -200,7 +201,8 @@ void sanitize_cmos(void)
- {
- 	const unsigned char *cmos_default;
- 	const bool cmos_need_reset =
--		CONFIG(STATIC_OPTION_TABLE) || cmos_error() || !cmos_lb_cks_valid();
-+		(CONFIG(STATIC_OPTION_TABLE) || cmos_error() || !cmos_lb_cks_valid())
-+		&& !acpi_is_wakeup_s3();
- 	size_t length = 128;
- 	size_t i;
- 
--- 
-2.39.2
-
diff --git a/config/coreboot/i945/patches/0007-drivers-pc80-rtc-option.c-Reset-only-CMOS-range-cove.patch b/config/coreboot/i945/patches/0007-drivers-pc80-rtc-option.c-Reset-only-CMOS-range-cove.patch
deleted file mode 100644
index 1a614db7..00000000
--- a/config/coreboot/i945/patches/0007-drivers-pc80-rtc-option.c-Reset-only-CMOS-range-cove.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 0bc5a67f926e193a429cce4028fb382c49fa08f8 Mon Sep 17 00:00:00 2001
-From: Bill XIE <persmule@hardenedlinux.org>
-Date: Fri, 3 Nov 2023 12:34:01 +0800
-Subject: [PATCH 2/2] drivers/pc80/rtc/option.c: Reset only CMOS range covered
- by checksum
-
-Proposed in the comment of commit 29030d0f3dad
-("drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume"),
-during sanitize_cmos(), only reset CMOS range covered by checksum and
-the checksum itself from the file cmos.default in CBFS, in order to
-prevent other runtime data in CMOS (e.g. the DRAM training data on
-GM45 platforms for s3 resume) being erased.
-
-Tested: cherry-pick this commit before commit 44a48ce7a46c ("Kconfig:
-	Bring HEAP_SIZE to a common, large value"), which is already
-	before my commit 29030d0f3dad , Thinkpad X200 with
-	CONFIG(STATIC_OPTION_TABLE) can resume from s3 again,
-	indicating that DRAM training data are no longer erased.
-
-Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
-Co-authored-by: Jonathon Hall <jonathon.hall@puri.sm>
-Change-Id: I872bf5f41422bc3424cd8631e932aaae2ae82f7a
-Reviewed-on: https://review.coreboot.org/c/coreboot/+/78906
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-Reviewed-by: Nico Huber <nico.h@gmx.de>
-Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
----
- src/drivers/pc80/rtc/option.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
-diff --git a/src/drivers/pc80/rtc/option.c b/src/drivers/pc80/rtc/option.c
-index e6cfa175ad..cb18e14ae9 100644
---- a/src/drivers/pc80/rtc/option.c
-+++ b/src/drivers/pc80/rtc/option.c
-@@ -213,8 +213,12 @@ void sanitize_cmos(void)
- 			return;
- 
- 		u8 control_state = cmos_disable_rtc();
--		for (i = 14; i < MIN(128, length); i++)
-+		/* Copy checked range and the checksum from the default */
-+		for (i = LB_CKS_RANGE_START; i < MIN(LB_CKS_RANGE_END + 1, length); i++)
- 			cmos_write_inner(cmos_default[i], i);
-+		/* CMOS checksum takes 2 bytes */
-+		cmos_write_inner(cmos_default[LB_CKS_LOC], LB_CKS_LOC);
-+		cmos_write_inner(cmos_default[LB_CKS_LOC + 1], LB_CKS_LOC + 1);
- 		cmos_restore_rtc(control_state);
- 	}
- }
--- 
-2.39.2
-
diff --git a/config/coreboot/i945/patches/0022-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/i945/patches/0022-Remove-warning-for-coreboot-images-built-without-a-p.patch
deleted file mode 100644
index 547c6392..00000000
--- a/config/coreboot/i945/patches/0022-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 1ce4f118b024a6367382b46016781f30fe622e3e Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH] Remove warning for coreboot images built without a payload
-
-I added this in upstream to prevent people from accidentally flashing
-roms without a payload resulting in a no boot situation, but in
-libreboot lbmk handles the payload and thus this warning always comes
-up. This has caused confusion and concern so just patch it out.
----
- payloads/Makefile.inc | 13 +------------
- 1 file changed, 1 insertion(+), 12 deletions(-)
-
-diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc
-index e735443a76..4f1692a873 100644
---- a/payloads/Makefile.inc
-+++ b/payloads/Makefile.inc
-@@ -49,16 +49,5 @@ distclean-payloads:
- print-repo-info-payloads:
- 	-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
- 
--ifeq ($(CONFIG_PAYLOAD_NONE),y)
--files_added:: warn_no_payload
--endif
--
--warn_no_payload:
--	printf "\n\t** WARNING **\n"
--	printf "coreboot has been built without a payload. Writing\n"
--	printf "a coreboot image without a payload to your board's\n"
--	printf "flash chip will result in a non-booting system. You\n"
--	printf "can use cbfstool to add a payload to the image.\n\n"
--
- .PHONY: force-payload coreinfo nvramcui
--.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
-+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
--- 
-2.40.1
-
diff --git a/config/coreboot/i945/patches/0023-use-mirrorservice.org-for-iasl-downloads.patch b/config/coreboot/i945/patches/0023-use-mirrorservice.org-for-iasl-downloads.patch
deleted file mode 100644
index 012d8dab..00000000
--- a/config/coreboot/i945/patches/0023-use-mirrorservice.org-for-iasl-downloads.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 781ab8407d08a5fdb7fbc2c239e684def7380b15 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sun, 28 Apr 2024 01:59:30 +0100
-Subject: [PATCH 1/1] use mirrorservice.org for iasl downloads
-
-github is unreliable. i mirror these files myself.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- util/crossgcc/buildgcc | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 0faea86894..6779a20425 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -71,7 +71,7 @@ MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
- MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
- GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
- BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
--IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
-+IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
- CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
--- 
-2.39.2
-
diff --git a/config/coreboot/i945/target.cfg b/config/coreboot/i945/target.cfg
deleted file mode 100644
index 16a4de7d..00000000
--- a/config/coreboot/i945/target.cfg
+++ /dev/null
@@ -1,2 +0,0 @@
-tree="i945"
-rev="e70bc423f9a2e1d13827f2703efe1f9c72549f20"
diff --git a/config/coreboot/macbook11/config/libgfxinit_corebootfb b/config/coreboot/macbook11/config/libgfxinit_corebootfb
index 1fe47062..ca0b9853 100644
--- a/config/coreboot/macbook11/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -119,6 +124,9 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_BOARD_APPLE_MACBOOK21 is not set
 CONFIG_BOARD_APPLE_MACBOOK11=y
 # CONFIG_BOARD_APPLE_IMAC52 is not set
@@ -127,33 +135,41 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -166,6 +182,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -193,22 +210,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -219,7 +237,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -237,13 +254,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -301,8 +318,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -312,6 +332,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -337,8 +359,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -349,8 +370,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -358,10 +377,6 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -379,11 +394,10 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -399,13 +413,15 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -427,6 +443,11 @@ CONFIG_VGA=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -446,6 +467,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -496,6 +520,7 @@ CONFIG_HAVE_MP_TABLE=y
 #
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -514,6 +539,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -531,6 +560,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook11/config/libgfxinit_txtmode b/config/coreboot/macbook11/config/libgfxinit_txtmode
index 5779bb7f..26d073be 100644
--- a/config/coreboot/macbook11/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -119,6 +124,9 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_BOARD_APPLE_MACBOOK21 is not set
 CONFIG_BOARD_APPLE_MACBOOK11=y
 # CONFIG_BOARD_APPLE_IMAC52 is not set
@@ -127,33 +135,41 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -166,6 +182,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -193,22 +210,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -219,7 +237,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -237,13 +254,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -301,8 +318,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -312,6 +332,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -335,8 +357,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -347,8 +368,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -356,10 +375,6 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -377,11 +392,10 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -397,13 +411,15 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -425,6 +441,11 @@ CONFIG_VGA=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -444,6 +465,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -494,6 +518,7 @@ CONFIG_HAVE_MP_TABLE=y
 #
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -512,6 +537,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -529,6 +558,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index 1add675c..9ceb99e8 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -1,4 +1,4 @@
-tree="i945"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
index 634f287c..0cc0a9ec 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -21,6 +20,7 @@ CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -35,7 +35,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -53,28 +52,33 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -88,6 +92,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -118,6 +123,9 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_BOARD_APPLE_MACBOOK21 is not set
 CONFIG_BOARD_APPLE_MACBOOK11=y
 # CONFIG_BOARD_APPLE_IMAC52 is not set
@@ -126,33 +134,41 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -165,6 +181,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -192,22 +209,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -218,7 +236,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -236,13 +253,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -300,8 +317,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -311,6 +331,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -336,8 +358,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -348,8 +369,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -357,10 +376,6 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -378,11 +393,10 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -398,13 +412,15 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -426,6 +442,11 @@ CONFIG_VGA=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -445,6 +466,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -495,6 +519,7 @@ CONFIG_HAVE_MP_TABLE=y
 #
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -513,6 +538,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -531,6 +560,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
index 6549df1b..735a7be0 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -21,6 +20,7 @@ CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -35,7 +35,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -53,28 +52,33 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -88,6 +92,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -118,6 +123,9 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 # CONFIG_BOARD_APPLE_MACBOOK21 is not set
 CONFIG_BOARD_APPLE_MACBOOK11=y
 # CONFIG_BOARD_APPLE_IMAC52 is not set
@@ -126,33 +134,41 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -165,6 +181,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -192,22 +209,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -218,7 +236,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -236,13 +253,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -300,8 +317,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -311,6 +331,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -334,8 +356,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -346,8 +367,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -355,10 +374,6 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -376,11 +391,10 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -396,13 +410,15 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -424,6 +440,11 @@ CONFIG_VGA=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -443,6 +464,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -493,6 +517,7 @@ CONFIG_HAVE_MP_TABLE=y
 #
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -511,6 +536,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -529,6 +558,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index 03a4d349..a53a1668 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -1,4 +1,4 @@
-tree="i945"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/macbook21/config/libgfxinit_corebootfb b/config/coreboot/macbook21/config/libgfxinit_corebootfb
index 900e1b32..9dc95583 100644
--- a/config/coreboot/macbook21/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -119,6 +124,9 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_BOARD_APPLE_MACBOOK21=y
 # CONFIG_BOARD_APPLE_MACBOOK11 is not set
 # CONFIG_BOARD_APPLE_IMAC52 is not set
@@ -127,33 +135,41 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -166,6 +182,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -193,22 +210,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -219,7 +237,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -237,13 +254,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -301,8 +318,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -312,6 +332,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -337,8 +359,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -349,8 +370,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -358,10 +377,6 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -379,11 +394,10 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -399,13 +413,15 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -427,6 +443,11 @@ CONFIG_VGA=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -446,6 +467,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -496,6 +520,7 @@ CONFIG_HAVE_MP_TABLE=y
 #
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -514,6 +539,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -531,6 +560,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook21/config/libgfxinit_txtmode b/config/coreboot/macbook21/config/libgfxinit_txtmode
index 49cde773..e73ddf4e 100644
--- a/config/coreboot/macbook21/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -119,6 +124,9 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_BOARD_APPLE_MACBOOK21=y
 # CONFIG_BOARD_APPLE_MACBOOK11 is not set
 # CONFIG_BOARD_APPLE_IMAC52 is not set
@@ -127,33 +135,41 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -166,6 +182,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -193,22 +210,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -219,7 +237,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -237,13 +254,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -301,8 +318,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -312,6 +332,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -335,8 +357,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -347,8 +368,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -356,10 +375,6 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -377,11 +392,10 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -397,13 +411,15 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -425,6 +441,11 @@ CONFIG_VGA=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -444,6 +465,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -494,6 +518,7 @@ CONFIG_HAVE_MP_TABLE=y
 #
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -512,6 +537,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -529,6 +558,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index 7e716a43..4a9af479 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -1,4 +1,4 @@
-tree="i945"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
index 70287afc..d760ec5e 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -21,6 +20,7 @@ CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -35,7 +35,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -53,28 +52,33 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -88,6 +92,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -118,6 +123,9 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_BOARD_APPLE_MACBOOK21=y
 # CONFIG_BOARD_APPLE_MACBOOK11 is not set
 # CONFIG_BOARD_APPLE_IMAC52 is not set
@@ -126,33 +134,41 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -165,6 +181,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -192,22 +209,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -218,7 +236,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -236,13 +253,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -300,8 +317,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -311,6 +331,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -336,8 +358,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -348,8 +369,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -357,10 +376,6 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -378,11 +393,10 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -398,13 +412,15 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -426,6 +442,11 @@ CONFIG_VGA=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -445,6 +466,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -495,6 +519,7 @@ CONFIG_HAVE_MP_TABLE=y
 #
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -513,6 +538,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -531,6 +560,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
index e9712d24..1533d3c6 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -21,6 +20,7 @@ CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -35,7 +35,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -53,28 +52,33 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -88,6 +92,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -118,6 +123,9 @@ CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_BOARD_APPLE_MACBOOK21=y
 # CONFIG_BOARD_APPLE_MACBOOK11 is not set
 # CONFIG_BOARD_APPLE_IMAC52 is not set
@@ -126,33 +134,41 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -165,6 +181,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -192,22 +209,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -218,7 +236,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -236,13 +253,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -300,8 +317,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -311,6 +331,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -334,8 +356,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -346,8 +367,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -355,10 +374,6 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -376,11 +391,10 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -396,13 +410,15 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -424,6 +440,11 @@ CONFIG_VGA=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -443,6 +464,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -493,6 +517,7 @@ CONFIG_HAVE_MP_TABLE=y
 #
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -511,6 +536,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -529,6 +558,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index 7e716a43..4a9af479 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -1,4 +1,4 @@
-tree="i945"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
index 7867f6dd..4db373a7 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -121,25 +126,34 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t60"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -147,6 +161,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -167,6 +182,7 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -178,18 +194,21 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -202,6 +221,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -229,22 +249,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -255,7 +276,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -273,13 +293,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -346,8 +366,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -357,6 +380,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -382,8 +407,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -394,8 +418,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -404,10 +426,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -425,11 +443,10 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -445,13 +462,19 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -473,6 +496,11 @@ CONFIG_VGA=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -492,6 +520,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -543,6 +574,7 @@ CONFIG_HAVE_MP_TABLE=y
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -561,6 +593,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -578,6 +614,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
index aee059ba..1829c377 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -121,25 +126,34 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t60"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -147,6 +161,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -167,6 +182,7 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -178,18 +194,21 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -202,6 +221,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -229,22 +249,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -255,7 +276,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -273,13 +293,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -346,8 +366,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -357,6 +380,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -380,8 +405,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -392,8 +416,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -402,10 +424,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -423,11 +441,10 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -443,13 +460,19 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -471,6 +494,11 @@ CONFIG_VGA=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -490,6 +518,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -541,6 +572,7 @@ CONFIG_HAVE_MP_TABLE=y
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -559,6 +591,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -576,6 +612,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 1add675c..9ceb99e8 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -1,4 +1,4 @@
-tree="i945"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
index b42d92e7..55f101f6 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -121,25 +126,34 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t60"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -147,6 +161,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -167,6 +182,7 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -178,18 +194,21 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -202,6 +221,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -229,22 +249,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -255,7 +276,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -273,13 +293,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -346,8 +366,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -357,6 +380,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -382,8 +407,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -394,8 +418,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -404,10 +426,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -425,11 +443,10 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -445,13 +462,19 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -473,6 +496,11 @@ CONFIG_VGA=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -492,6 +520,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -543,6 +574,7 @@ CONFIG_HAVE_MP_TABLE=y
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -561,6 +593,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -578,6 +614,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
index 1fc2ab3c..7e1a8807 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -121,25 +126,34 @@ CONFIG_DEVICETREE="devicetree.cb"
 CONFIG_VARIANT_DIR="t60"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -147,6 +161,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -167,6 +182,7 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -178,18 +194,21 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -202,6 +221,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -229,22 +249,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -255,7 +276,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -273,13 +293,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -346,8 +366,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -357,6 +380,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -380,8 +405,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -392,8 +416,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -402,10 +424,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -423,11 +441,10 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -443,13 +460,19 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -471,6 +494,11 @@ CONFIG_VGA=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -490,6 +518,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -541,6 +572,7 @@ CONFIG_HAVE_MP_TABLE=y
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -559,6 +591,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -576,6 +612,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 1add675c..9ceb99e8 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -1,4 +1,4 @@
-tree="i945"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/x60/config/libgfxinit_corebootfb b/config/coreboot/x60/config/libgfxinit_corebootfb
index 8197735b..432da395 100644
--- a/config/coreboot/x60/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -118,30 +123,38 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_VBOOT_VBNV_OFFSET=0x76
 CONFIG_IRQ_SLOT_COUNT=18
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -149,6 +162,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -169,6 +183,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -180,18 +195,21 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 CONFIG_BOARD_LENOVO_X60=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -204,6 +222,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -231,22 +250,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -257,7 +277,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -275,13 +294,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -349,8 +368,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -360,6 +382,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -385,8 +409,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -397,8 +420,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -407,10 +428,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -432,11 +449,10 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -452,13 +468,19 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -480,6 +502,11 @@ CONFIG_VGA=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -499,6 +526,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -552,6 +582,7 @@ CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_PIRQ_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -570,6 +601,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -588,6 +623,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/x60/config/libgfxinit_txtmode b/config/coreboot/x60/config/libgfxinit_txtmode
index 9ac40a02..9cbd428a 100644
--- a/config/coreboot/x60/config/libgfxinit_txtmode
+++ b/config/coreboot/x60/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -118,30 +123,38 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_VBOOT_VBNV_OFFSET=0x76
 CONFIG_IRQ_SLOT_COUNT=18
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -149,6 +162,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -169,6 +183,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -180,18 +195,21 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 CONFIG_BOARD_LENOVO_X60=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -204,6 +222,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -231,22 +250,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -257,7 +277,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -275,13 +294,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -349,8 +368,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -360,6 +382,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -383,8 +407,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -395,8 +418,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -405,10 +426,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -430,11 +447,10 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -450,13 +466,19 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -478,6 +500,11 @@ CONFIG_VGA=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -497,6 +524,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -550,6 +580,7 @@ CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_PIRQ_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -568,6 +599,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -586,6 +621,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 1add675c..9ceb99e8 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -1,4 +1,4 @@
-tree="i945"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
index fc3a4402..93d86ad5 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -118,30 +123,38 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_VBOOT_VBNV_OFFSET=0x76
 CONFIG_IRQ_SLOT_COUNT=18
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -149,6 +162,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -169,6 +183,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -180,18 +195,21 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 CONFIG_BOARD_LENOVO_X60=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -204,6 +222,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -231,22 +250,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -257,7 +277,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -275,13 +294,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -349,8 +368,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -360,6 +382,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -385,8 +409,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -397,8 +420,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -407,10 +428,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -432,11 +449,10 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -452,13 +468,19 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -480,6 +502,11 @@ CONFIG_VGA=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -499,6 +526,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -552,6 +582,7 @@ CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_PIRQ_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -570,6 +601,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -588,6 +623,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_txtmode b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
index c4049565..d46b991e 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
 #
 # General setup
 #
-CONFIG_COREBOOT_BUILD=y
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
 CONFIG_INCLUDE_CONFIG_FILE=y
 CONFIG_COLLECT_TIMESTAMPS=y
 # CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
 CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_UPDATE_IMAGE is not set
 # CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
 
 #
 # Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
 #
 # CONFIG_VENDOR_51NB is not set
 # CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
 # CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
 # CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
 # CONFIG_VENDOR_CAVIUM is not set
 # CONFIG_VENDOR_CLEVO is not set
 # CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_PRODRIVE is not set
 # CONFIG_VENDOR_PROTECTLI is not set
 # CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
 # CONFIG_VENDOR_RAZER is not set
 # CONFIG_VENDOR_RODA is not set
 # CONFIG_VENDOR_SAMSUNG is not set
@@ -118,30 +123,38 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_VBOOT_VBNV_OFFSET=0x76
 CONFIG_IRQ_SLOT_COUNT=18
 CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -149,6 +162,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -169,6 +183,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_Z61T is not set
 # CONFIG_BOARD_LENOVO_R60 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
 # CONFIG_BOARD_LENOVO_X131E is not set
 # CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
 # CONFIG_BOARD_LENOVO_X200 is not set
@@ -180,18 +195,21 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X230 is not set
 # CONFIG_BOARD_LENOVO_X230T is not set
 # CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
 CONFIG_BOARD_LENOVO_X60=y
 CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
 # CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
 CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -204,6 +222,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
 CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
 CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -231,22 +250,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
 CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
 # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -257,7 +277,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
 #
 CONFIG_CPU_INTEL_MODEL_6EX=y
 CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
 CONFIG_CPU_INTEL_SOCKET_M=y
 CONFIG_CPU_INTEL_COMMON=y
 CONFIG_ENABLE_VMX=y
@@ -275,13 +294,13 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
-CONFIG_MMX=y
 CONFIG_SSE=y
 CONFIG_SSE2=y
 CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -349,8 +368,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
 CONFIG_ARCH_POSTCAR_X86_32=y
 CONFIG_ARCH_RAMSTAGE_X86_32=y
 CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
 CONFIG_AP_IN_SIPI_WAIT=y
 CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
 CONFIG_PC80_SYSTEM=y
 CONFIG_HAVE_CMOS_DEFAULT=y
 CONFIG_POSTCAR_STAGE=y
@@ -360,6 +382,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
 # end of Chipset
 
 #
@@ -383,8 +407,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
 CONFIG_PCIEXP_PLUGIN_SUPPORT=y
 CONFIG_ECAM_MMCONF_LENGTH=0x04000000
 CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -395,8 +418,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
 # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
 CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -405,10 +426,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
 CONFIG_USE_DDR2=y
 # end of Devices
 
@@ -430,11 +447,10 @@ CONFIG_SPI_FLASH_ADESTO=y
 CONFIG_SPI_FLASH_AMIC=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -450,13 +466,19 @@ CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
 
 #
@@ -478,6 +500,11 @@ CONFIG_VGA=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
 # end of Trusted Platform Module
 
 #
@@ -497,6 +524,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
 CONFIG_ACPI_HAVE_PCAT_8259=y
 CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
 CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -550,6 +580,7 @@ CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_PIRQ_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLES=y
 CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
 CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
 # end of System tables
 
@@ -568,6 +599,10 @@ CONFIG_PAYLOAD_NONE=y
 #
 # CONFIG_DISPLAY_MTRRS is not set
 
+#
+# Vendorcode Debug Settings
+#
+
 #
 # BLOB Debug Settings
 #
@@ -586,6 +621,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 1add675c..9ceb99e8 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -1,4 +1,4 @@
-tree="i945"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/submodule/coreboot/i945/R10_20_22.tar.gz/module.cfg b/config/submodule/coreboot/i945/R10_20_22.tar.gz/module.cfg
deleted file mode 100644
index 3957836f..00000000
--- a/config/submodule/coreboot/i945/R10_20_22.tar.gz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/R10_20_22.tar.gz"
-subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/R10_20_22.tar.gz"
-subhash="2ea1892383dfeae4b0fa089bb68aa397af644775496ce2a2f8f6ac7ebbb13de499c00ddb2608f427354f8e6f6e6d26cdeb162a7061458f8e6181fb2633e7c43e"
diff --git a/config/submodule/coreboot/i945/binutils-2.37.tar.xz/module.cfg b/config/submodule/coreboot/i945/binutils-2.37.tar.xz/module.cfg
deleted file mode 100644
index c0565a0d..00000000
--- a/config/submodule/coreboot/i945/binutils-2.37.tar.xz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.37.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.37.tar.xz"
-subhash="5c11aeef6935860a6819ed3a3c93371f052e52b4bdc5033da36037c1544d013b7f12cb8d561ec954fe7469a68f1b66f1a3cd53d5a3af7293635a90d69edd15e7"
diff --git a/config/submodule/coreboot/i945/gcc-11.2.0.tar.xz/module.cfg b/config/submodule/coreboot/i945/gcc-11.2.0.tar.xz/module.cfg
deleted file mode 100644
index fb925dc8..00000000
--- a/config/submodule/coreboot/i945/gcc-11.2.0.tar.xz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-11.2.0/gcc-11.2.0.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-11.2.0/gcc-11.2.0.tar.xz"
-subhash="d53a0a966230895c54f01aea38696f818817b505f1e2bfa65e508753fcd01b2aedb4a61434f41f3a2ddbbd9f41384b96153c684ded3f0fa97c82758d9de5c7cf"
diff --git a/config/submodule/coreboot/i945/gmp-6.2.1.tar.xz/module.cfg b/config/submodule/coreboot/i945/gmp-6.2.1.tar.xz/module.cfg
deleted file mode 100644
index 2b15cd44..00000000
--- a/config/submodule/coreboot/i945/gmp-6.2.1.tar.xz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.2.1.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.2.1.tar.xz"
-subhash="c99be0950a1d05a0297d65641dd35b75b74466f7bf03c9e8a99895a3b2f9a0856cd17887738fa51cf7499781b65c049769271cbcb77d057d2e9f1ec52e07dd84"
diff --git a/config/submodule/coreboot/i945/intel-microcode/module.cfg b/config/submodule/coreboot/i945/intel-microcode/module.cfg
deleted file mode 100644
index 6edc2d9f..00000000
--- a/config/submodule/coreboot/i945/intel-microcode/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/intel-microcode.git"
-subrepo_bkup="https://github.com/coreboot/intel-microcode"
-subhash="262f0c97f2fbc3839a59523cc6c6bcf500e2850b"
diff --git a/config/submodule/coreboot/i945/libgfxinit/module.cfg b/config/submodule/coreboot/i945/libgfxinit/module.cfg
deleted file mode 100644
index 50153822..00000000
--- a/config/submodule/coreboot/i945/libgfxinit/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/libgfxinit.git"
-subrepo_bkup="https://github.com/coreboot/libgfxinit"
-subhash="066e52eeaa329d782ccee96265a6a351fc395bf1"
diff --git a/config/submodule/coreboot/i945/libhwbase/module.cfg b/config/submodule/coreboot/i945/libhwbase/module.cfg
deleted file mode 100644
index cd975dcb..00000000
--- a/config/submodule/coreboot/i945/libhwbase/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/libhwbase.git"
-subrepo_bkup="https://github.com/coreboot/libhwbase"
-subhash="8be5a82b85ceb3ee8a1c4fbf36c75a4bfbda8900"
diff --git a/config/submodule/coreboot/i945/module.list b/config/submodule/coreboot/i945/module.list
deleted file mode 100644
index 9440e333..00000000
--- a/config/submodule/coreboot/i945/module.list
+++ /dev/null
@@ -1,11 +0,0 @@
-3rdparty/intel-microcode
-3rdparty/libgfxinit
-3rdparty/libhwbase
-3rdparty/vboot
-util/crossgcc/tarballs/binutils-2.37.tar.xz
-util/crossgcc/tarballs/gcc-11.2.0.tar.xz
-util/crossgcc/tarballs/gmp-6.2.1.tar.xz
-util/crossgcc/tarballs/mpc-1.3.1.tar.gz
-util/crossgcc/tarballs/mpfr-4.2.0.tar.xz
-util/crossgcc/tarballs/nasm-2.15.05.tar.bz2
-util/crossgcc/tarballs/R10_20_22.tar.gz
diff --git a/config/submodule/coreboot/i945/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/i945/mpc-1.3.1.tar.gz/module.cfg
deleted file mode 100644
index f98b6444..00000000
--- a/config/submodule/coreboot/i945/mpc-1.3.1.tar.gz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
-subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97"
diff --git a/config/submodule/coreboot/i945/mpfr-4.2.0.tar.xz/module.cfg b/config/submodule/coreboot/i945/mpfr-4.2.0.tar.xz/module.cfg
deleted file mode 100644
index 618fb3b2..00000000
--- a/config/submodule/coreboot/i945/mpfr-4.2.0.tar.xz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.0.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.0.tar.xz"
-subhash="58e843125884ca58837ae5159cd4092af09e8f21931a2efd19c15de057c9d1dc0753ae95c592e2ce59a727fbc491af776db8b00a055320413cdcf2033b90505c"
diff --git a/config/submodule/coreboot/i945/nasm-2.15.05.tar.bz2/module.cfg b/config/submodule/coreboot/i945/nasm-2.15.05.tar.bz2/module.cfg
deleted file mode 100644
index f60eb55b..00000000
--- a/config/submodule/coreboot/i945/nasm-2.15.05.tar.bz2/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.15.05/nasm-2.15.05.tar.bz2"
-subfile_bkup="https://coreboot.org/releases/crossgcc-sources/nasm-2.15.05.tar.bz2"
-subhash="e608222eea4970249f0ee1638207b3368fb43b87117cfdb2788b2c7fd6e221f567ee8dd9b910f9e0c4837dc4866606cd9baf5c3266b81188037059b79635ea79"
diff --git a/config/submodule/coreboot/i945/vboot/module.cfg b/config/submodule/coreboot/i945/vboot/module.cfg
deleted file mode 100644
index 352e4222..00000000
--- a/config/submodule/coreboot/i945/vboot/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/vboot.git"
-subrepo_bkup="https://github.com/coreboot/vboot"
-subhash="5b8596cefd1a61252501943f2534323708338732"
diff --git a/config/submodule/coreboot/i945/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/i945/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
deleted file mode 100644
index 1ac41de6..00000000
--- a/config/submodule/coreboot/i945/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
+++ /dev/null
@@ -1,178 +0,0 @@
-From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
-From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
-Date: Thu, 30 May 2024 14:08:33 -0600
-Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
- vmlinuz_header_{offset,size}
-
-The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
-wrong:
-
-	if (!vmlinuz_header_size ||
-	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
-	    kpart_data) {
-		return 1;
-	}
-
-`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
-unless something has overflowed!  And `vmlinuz_header_offset` hasn't even
-been set yet (besides being initialized to zero)!
-
-GCC will deduce that if the check didn't cause the function to bail, then
-vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
-[2GiB,4GiB).
-
-On platforms where size_t is 32-bits, this is *especially* broken.
-memcpy's size argument must be in the range [0,2GiB).  Because GCC has
-proved that vmlinuz_header_size is higher than that, it will fail to
-compile:
-
-	host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
-
-So, fix the check.
-
-I can now say that what I suspect the original author meant to write would
-be the following patch, if `vmlinuz_header_offset` were already set:
-
-	-kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
-	+now        + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
-
-This hypothesis is supported by `now` not getting incremented by
-`kblob_size` the way it is for the keyblock and preamble sizes.
-
-However, we can also see that even this "corrected" bounds check is
-insufficient: it does not detect the vmlinuz_header overflowing into
-kblob_data.
-
-OK, so let's describe the fix:
-
-Have a `*vmlinuz_header` pointer instead of a
-`uint64_t vmlinuz_header_offset`, to be more similar to all the other
-regions.  With this change, the correct check becomes a simple
-
-      vmlinuz_header + vmlinuz_header_size > kblob_data
-
-While we're at it, make some changes that could have helped avoid this in
-the first place:
-
- - Add comments.
- - Calculate the vmlinuz_header offset right away, instead of waiting.
- - Go ahead and increment `now` by `kblob_size`, to increase regularity.
-
-Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
----
- host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
- 1 file changed, 51 insertions(+), 21 deletions(-)
-
-diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
-index 4ccfcf33..d2c09443 100644
---- a/host/lib/extract_vmlinuz.c
-+++ b/host/lib/extract_vmlinuz.c
-@@ -15,16 +15,44 @@
- 
- int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
- 		   void **vmlinuz_out, size_t *vmlinuz_size) {
-+	// We're going to be extracting `vmlinuz_header` and
-+	// `kblob_data`, and returning the concatenation of them.
-+	//
-+	// kpart_data = +-[kpart_size]------------------------------------+
-+	//              |                                                 |
-+	//  keyblock  = | +-[keyblock->keyblock_size]-------------------+ |
-+	//              | | struct vb2_keyblock          keyblock       | |
-+	//              | | char []                      ...data...     | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//  preamble  = | +-[preamble->preamble_size]-------------------+ |
-+	//              | | struct vb2_kernel_preamble   preamble       | |
-+	//              | | char []                       ...data...    | |
-+	//              | | char []                      vmlinuz_header | |
-+	//              | | char []                       ...data...    | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//  kblob_data= | +-[preamble->body_signature.data_size]--------+ |
-+	//              | | char []                       ...data...    | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//              +-------------------------------------------------+
-+
- 	size_t now = 0;
-+	// The 3 sections of kpart_data.
-+	struct vb2_keyblock *keyblock = NULL;
- 	struct vb2_kernel_preamble *preamble = NULL;
- 	uint8_t *kblob_data = NULL;
- 	uint32_t kblob_size = 0;
-+	// vmlinuz_header
-+	uint8_t *vmlinuz_header = NULL;
- 	uint32_t vmlinuz_header_size = 0;
--	uint64_t vmlinuz_header_address = 0;
--	uint64_t vmlinuz_header_offset = 0;
-+	// The concatenated result.
- 	void *vmlinuz = NULL;
- 
--	struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
-+	// Isolate the 3 sections of kpart_data.
-+
-+	keyblock = (struct vb2_keyblock *)kpart_data;
- 	now += keyblock->keyblock_size;
- 	if (now > kpart_size)
- 		return 1;
-@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
- 
- 	kblob_data = kpart_data + now;
- 	kblob_size = preamble->body_signature.data_size;
--
--	if (!kblob_data || (now + kblob_size) > kpart_size)
-+	now += kblob_size;
-+	if (now > kpart_size)
- 		return 1;
- 
-+	// Find `vmlinuz_header` within `preamble`.
-+
- 	if (preamble->header_version_minor > 0) {
--		vmlinuz_header_address = preamble->vmlinuz_header_address;
-+		// calculate the vmlinuz_header offset from
-+		// the beginning of the kpart_data.  The kblob doesn't
-+		// include the body_load_offset, but does include
-+		// the keyblock and preamble sections.
-+		size_t vmlinuz_header_offset =
-+			preamble->vmlinuz_header_address -
-+			preamble->body_load_address +
-+			keyblock->keyblock_size +
-+			preamble->preamble_size;
-+
-+		vmlinuz_header = kpart_data + vmlinuz_header_offset;
- 		vmlinuz_header_size = preamble->vmlinuz_header_size;
- 	}
- 
--	if (!vmlinuz_header_size ||
--	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
--	    kpart_data) {
-+	if (!vmlinuz_header ||
-+	    !vmlinuz_header_size ||
-+	    vmlinuz_header + vmlinuz_header_size > kblob_data) {
- 		return 1;
- 	}
- 
--	// calculate the vmlinuz_header offset from
--	// the beginning of the kpart_data.  The kblob doesn't
--	// include the body_load_offset, but does include
--	// the keyblock and preamble sections.
--	vmlinuz_header_offset = vmlinuz_header_address -
--		preamble->body_load_address +
--		keyblock->keyblock_size +
--		preamble->preamble_size;
-+	// Concatenate and return.
- 
- 	vmlinuz = malloc(vmlinuz_header_size + kblob_size);
- 	if (vmlinuz == NULL)
- 		return 1;
--
--	memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
--	       vmlinuz_header_size);
--
-+	memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
- 	memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
- 
- 	*vmlinuz_out = vmlinuz;
--- 
-2.45.1
-

From 80c3f9395dd9b49e6a82a79b42e109f0f0e5f890 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 10 Aug 2024 18:24:31 +0100
Subject: [PATCH 0803/1549] coreboot/fam15h: only use this, for amd boards

it is identical to fam15h_rdimm, with _udimm now removed;
the latter had a patch that added certain behaviour only
intended for rdimm, but the patch in question breaks various
configurations.

raminit has always been unreliable on these boards. i'd rather
simplify it all, in lbmk. i'll probably update this to the dasharo
tree later on, specificalyl for kgpe-d16

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...lts-for-KCMA-D8-for-a-little-speed-b.patch |   0
 ...able-lc_cache_partitioning-and-exper.patch |   0
 ...-cbfstool-Makefile-support-distclean.patch |   0
 ...patch-binutils-2.32-for-newer-hostcc.patch |   0
 ...rossgcc-acpica-build-on-newer-hostcc.patch |   0
 ...t-fam15h-use-new-upstream-for-acpica.patch |   0
 ...-mirrorservire.org-for-gcc-downloads.patch |   0
 ...n-t-treat-binutil-warnings-as-errors.patch |   0
 .../{fam15h_rdimm => fam15h}/target.cfg       |   2 +-
 ...-amd-mct_ddr3-Fix-RDIMM-training-fai.patch |  31 -
 ...lts-for-KCMA-D8-for-a-little-speed-b.patch |  38 -
 ...able-lc_cache_partitioning-and-exper.patch |  32 -
 ...-cbfstool-Makefile-support-distclean.patch |  41 -
 ...patch-binutils-2.32-for-newer-hostcc.patch |  37 -
 ...rossgcc-acpica-build-on-newer-hostcc.patch | 108 ---
 ...t-fam15h-use-new-upstream-for-acpica.patch |  38 -
 ...-mirrorservire.org-for-gcc-downloads.patch |  47 --
 ...n-t-treat-binutil-warnings-as-errors.patch |  35 -
 config/coreboot/fam15h_udimm/target.cfg       |   4 -
 config/coreboot/kcma_d8-udimm_16mb/target.cfg |  11 -
 .../config/libgfxinit_txtmode                 |   0
 .../target.cfg                                |   2 +-
 .../config/libgfxinit_txtmode                 |   0
 .../target.cfg                                |   2 +-
 .../config/libgfxinit_txtmode                 | 704 -----------------
 .../config/libgfxinit_txtmode                 | 704 -----------------
 config/coreboot/kcma_d8_udimm_2mb/target.cfg  |  10 -
 config/coreboot/kfsn4_dre_1mb/target.cfg      |   2 +-
 config/coreboot/kfsn4_dre_2mb/target.cfg      |   2 +-
 .../config/libgfxinit_txtmode                 |   0
 .../target.cfg                                |   2 +-
 .../config/libgfxinit_txtmode                 |   0
 .../target.cfg                                |   2 +-
 .../config/libgfxinit_txtmode                 | 713 ------------------
 .../coreboot/kgpe_d16_udimm_16mb/target.cfg   |  10 -
 .../config/libgfxinit_txtmode                 | 713 ------------------
 config/coreboot/kgpe_d16_udimm_2mb/target.cfg |  10 -
 .../acpica-unix2-20190703.tar.gz/module.cfg   |   0
 .../binutils-2.32.tar.xz/module.cfg           |   0
 .../{fam15h_rdimm => fam15h}/blobs/module.cfg |   0
 .../gcc-8.3.0.tar.xz/module.cfg               |   0
 .../gmp-6.1.2.tar.xz/module.cfg               |   0
 .../{fam15h_rdimm => fam15h}/module.list      |   0
 .../mpc-1.1.0.tar.gz/module.cfg               |   0
 .../mpfr-4.0.2.tar.xz/module.cfg              |   0
 .../nasm-2.14.02.tar.bz2/module.cfg           |   0
 .../{fam15h_rdimm => fam15h}/vboot/module.cfg |   0
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch |   0
 .../coreboot/fam15h_udimm/blobs/module.cfg    |   3 -
 .../coreboot/fam15h_udimm/module.list         |   2 -
 .../coreboot/fam15h_udimm/vboot/module.cfg    |   3 -
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch | 178 -----
 52 files changed, 7 insertions(+), 3479 deletions(-)
 rename config/coreboot/{fam15h_rdimm => fam15h}/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch (100%)
 rename config/coreboot/{fam15h_rdimm => fam15h}/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch (100%)
 rename config/coreboot/{fam15h_rdimm => fam15h}/patches/0007-util-cbfstool-Makefile-support-distclean.patch (100%)
 rename config/coreboot/{fam15h_rdimm => fam15h}/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch (100%)
 rename config/coreboot/{fam15h_rdimm => fam15h}/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch (100%)
 rename config/coreboot/{fam15h_rdimm => fam15h}/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch (100%)
 rename config/coreboot/{fam15h_rdimm => fam15h}/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch (100%)
 rename config/coreboot/{fam15h_rdimm => fam15h}/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch (100%)
 rename config/coreboot/{fam15h_rdimm => fam15h}/target.cfg (70%)
 delete mode 100644 config/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch
 delete mode 100644 config/coreboot/fam15h_udimm/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch
 delete mode 100644 config/coreboot/fam15h_udimm/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch
 delete mode 100644 config/coreboot/fam15h_udimm/patches/0007-util-cbfstool-Makefile-support-distclean.patch
 delete mode 100644 config/coreboot/fam15h_udimm/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch
 delete mode 100644 config/coreboot/fam15h_udimm/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch
 delete mode 100644 config/coreboot/fam15h_udimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
 delete mode 100644 config/coreboot/fam15h_udimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
 delete mode 100644 config/coreboot/fam15h_udimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch
 delete mode 100644 config/coreboot/fam15h_udimm/target.cfg
 delete mode 100644 config/coreboot/kcma_d8-udimm_16mb/target.cfg
 rename config/coreboot/{kcma_d8-udimm_16mb => kcma_d8_16mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{kcma_d8_rdimm_2mb => kcma_d8_16mb}/target.cfg (90%)
 rename config/coreboot/{kcma_d8_rdimm_2mb => kcma_d8_2mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{kgpe_d16_rdimm_2mb => kcma_d8_2mb}/target.cfg (90%)
 delete mode 100644 config/coreboot/kcma_d8_rdimm_16mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/kcma_d8_udimm_2mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/kcma_d8_udimm_2mb/target.cfg
 rename config/coreboot/{kgpe_d16_rdimm_16mb => kgpe_d16_16mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{kgpe_d16_rdimm_16mb => kgpe_d16_16mb}/target.cfg (90%)
 rename config/coreboot/{kgpe_d16_rdimm_2mb => kgpe_d16_2mb}/config/libgfxinit_txtmode (100%)
 rename config/coreboot/{kcma_d8_rdimm_16mb => kgpe_d16_2mb}/target.cfg (90%)
 delete mode 100644 config/coreboot/kgpe_d16_udimm_16mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/kgpe_d16_udimm_16mb/target.cfg
 delete mode 100644 config/coreboot/kgpe_d16_udimm_2mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/kgpe_d16_udimm_2mb/target.cfg
 rename config/submodule/coreboot/{fam15h_rdimm => fam15h}/acpica-unix2-20190703.tar.gz/module.cfg (100%)
 rename config/submodule/coreboot/{fam15h_rdimm => fam15h}/binutils-2.32.tar.xz/module.cfg (100%)
 rename config/submodule/coreboot/{fam15h_rdimm => fam15h}/blobs/module.cfg (100%)
 rename config/submodule/coreboot/{fam15h_rdimm => fam15h}/gcc-8.3.0.tar.xz/module.cfg (100%)
 rename config/submodule/coreboot/{fam15h_rdimm => fam15h}/gmp-6.1.2.tar.xz/module.cfg (100%)
 rename config/submodule/coreboot/{fam15h_rdimm => fam15h}/module.list (100%)
 rename config/submodule/coreboot/{fam15h_rdimm => fam15h}/mpc-1.1.0.tar.gz/module.cfg (100%)
 rename config/submodule/coreboot/{fam15h_rdimm => fam15h}/mpfr-4.0.2.tar.xz/module.cfg (100%)
 rename config/submodule/coreboot/{fam15h_rdimm => fam15h}/nasm-2.14.02.tar.bz2/module.cfg (100%)
 rename config/submodule/coreboot/{fam15h_rdimm => fam15h}/vboot/module.cfg (100%)
 rename config/submodule/coreboot/{fam15h_rdimm => fam15h}/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch (100%)
 delete mode 100644 config/submodule/coreboot/fam15h_udimm/blobs/module.cfg
 delete mode 100644 config/submodule/coreboot/fam15h_udimm/module.list
 delete mode 100644 config/submodule/coreboot/fam15h_udimm/vboot/module.cfg
 delete mode 100644 config/submodule/coreboot/fam15h_udimm/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch

diff --git a/config/coreboot/fam15h_rdimm/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch b/config/coreboot/fam15h/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch
similarity index 100%
rename from config/coreboot/fam15h_rdimm/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch
rename to config/coreboot/fam15h/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch
diff --git a/config/coreboot/fam15h_rdimm/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch b/config/coreboot/fam15h/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch
similarity index 100%
rename from config/coreboot/fam15h_rdimm/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch
rename to config/coreboot/fam15h/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch
diff --git a/config/coreboot/fam15h_rdimm/patches/0007-util-cbfstool-Makefile-support-distclean.patch b/config/coreboot/fam15h/patches/0007-util-cbfstool-Makefile-support-distclean.patch
similarity index 100%
rename from config/coreboot/fam15h_rdimm/patches/0007-util-cbfstool-Makefile-support-distclean.patch
rename to config/coreboot/fam15h/patches/0007-util-cbfstool-Makefile-support-distclean.patch
diff --git a/config/coreboot/fam15h_rdimm/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch b/config/coreboot/fam15h/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch
similarity index 100%
rename from config/coreboot/fam15h_rdimm/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch
rename to config/coreboot/fam15h/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch
diff --git a/config/coreboot/fam15h_rdimm/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch b/config/coreboot/fam15h/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch
similarity index 100%
rename from config/coreboot/fam15h_rdimm/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch
rename to config/coreboot/fam15h/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch
diff --git a/config/coreboot/fam15h_rdimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch b/config/coreboot/fam15h/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
similarity index 100%
rename from config/coreboot/fam15h_rdimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
rename to config/coreboot/fam15h/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
diff --git a/config/coreboot/fam15h_rdimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch b/config/coreboot/fam15h/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
similarity index 100%
rename from config/coreboot/fam15h_rdimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
rename to config/coreboot/fam15h/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
diff --git a/config/coreboot/fam15h_rdimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch b/config/coreboot/fam15h/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch
similarity index 100%
rename from config/coreboot/fam15h_rdimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch
rename to config/coreboot/fam15h/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch
diff --git a/config/coreboot/fam15h_rdimm/target.cfg b/config/coreboot/fam15h/target.cfg
similarity index 70%
rename from config/coreboot/fam15h_rdimm/target.cfg
rename to config/coreboot/fam15h/target.cfg
index 7ca0c217..1056920a 100644
--- a/config/coreboot/fam15h_rdimm/target.cfg
+++ b/config/coreboot/fam15h/target.cfg
@@ -1,2 +1,2 @@
-tree="fam15h_rdimm"
+tree="fam15h"
 rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
diff --git a/config/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch b/config/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch
deleted file mode 100644
index 3c131a86..00000000
--- a/config/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 8f2988cba4fffef1bd4f65e123c76bf4b7a18672 Mon Sep 17 00:00:00 2001
-From: "D.d.P.F. Lombard" <lombard@lombards.xyz>
-Date: Sun, 7 Feb 2021 15:29:40 +0100
-Subject: [PATCH 1/6] Revert "Revert "nb/amd/mct_ddr3: Fix RDIMM training
- failure on Fam15h" (fixes a bug that prevent certain RAM modules from
- booting)
-
-This reverts commit 610d1c67b2298a9840681c2b4492b6d3fdf44a46.
-
-After 610d1c67b2298a9840681c2b4492b6d3fdf44a46 many RAM modules wouldn't work and you couldn't even see any output on the screen.
----
- src/northbridge/amd/amdmct/mct_ddr3/mctproc.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
-index ddaaaab8d5..3b07786b91 100644
---- a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
-+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
-@@ -71,6 +71,9 @@ u32 mct_SetDramConfigMisc2(struct DCTStatStruc *pDCTstat,
- 		misc2 |= ((cs_mux_67 & 0x1) << 27);
- 		misc2 &= ~(0x1 << 26);		/* CsMux45 = cs_mux_45 */
- 		misc2 |= ((cs_mux_45 & 0x1) << 26);
-+
-+		if (pDCTstat->Status & (1 << SB_Registered))
-+			misc2 |= 1 << SubMemclkRegDly;
- 	} else if (pDCTstat->LogicalCPUID & (AMD_DR_Dx | AMD_DR_Cx)) {
- 		if (pDCTstat->Status & (1 << SB_Registered)) {
- 			misc2 |= 1 << SubMemclkRegDly;
--- 
-2.25.1
-
diff --git a/config/coreboot/fam15h_udimm/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch b/config/coreboot/fam15h_udimm/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch
deleted file mode 100644
index 5a39bd69..00000000
--- a/config/coreboot/fam15h_udimm/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 7a00638cea41ad939a59fc0e5996959435fbdb7f Mon Sep 17 00:00:00 2001
-From: "D.d.P.F. Lombard" <lombard@lombards.xyz>
-Date: Sun, 7 Feb 2021 16:40:05 +0100
-Subject: [PATCH 3/6] Tweak cmos defaults for KCMA-D8 (for a little speed
- boost)
-
-63xx CPUs have the option to use a reduced latency value inside the crossbar.
-Setting "experimental_memory_speed_boost=Enable" aparently only has an effect
-on 63xx CPUs and may, in certain cases, yield a slight memory bandwidth
-increase (according to Timothy Pearson), but maybe it also works for
-43xx CPUs.
-
-Setting "l3_cache_partitioning=Enable" will increase performance in certain
-situations. See:
-https://developer.arm.com/documentation/100453/0401/functional-description/l3-cache/l3-cache-partitioning?lang=en
----
- src/mainboard/asus/kcma-d8/cmos.default | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/src/mainboard/asus/kcma-d8/cmos.default b/src/mainboard/asus/kcma-d8/cmos.default
-index 306687157f..4e033d756f 100644
---- a/src/mainboard/asus/kcma-d8/cmos.default
-+++ b/src/mainboard/asus/kcma-d8/cmos.default
-@@ -21,9 +21,9 @@ sata_ahci_mode=Enable
- sata_alpm=Disable
- maximum_p_state_limit=0xf
- probe_filter=Auto
--l3_cache_partitioning=Disable
-+l3_cache_partitioning=Enable
- gart=Enable
- ehci_async_data_cache=Enable
--experimental_memory_speed_boost=Disable
-+experimental_memory_speed_boost=Enable
- power_on_after_fail=On
- boot_option=Fallback
--- 
-2.25.1
-
diff --git a/config/coreboot/fam15h_udimm/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch b/config/coreboot/fam15h_udimm/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch
deleted file mode 100644
index 5ada0dff..00000000
--- a/config/coreboot/fam15h_udimm/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From f0aac7261e16adc8e61eca7a506ff2de5112be47 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Fri, 7 May 2021 19:43:32 +0100
-Subject: [PATCH 6/6] asus/kgpe-d16: enable lc_cache_partitioning and
- experimental_memory_speed_boost
-
-This really only benefits 63xx opterons which are less reliable in libreboot due
-to lack of CPU microcode updates, but we might aswell enable this anyway.
----
- src/mainboard/asus/kgpe-d16/cmos.default | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/src/mainboard/asus/kgpe-d16/cmos.default b/src/mainboard/asus/kgpe-d16/cmos.default
-index 7c496a50d7..8a25620e1d 100644
---- a/src/mainboard/asus/kgpe-d16/cmos.default
-+++ b/src/mainboard/asus/kgpe-d16/cmos.default
-@@ -21,10 +21,10 @@ sata_ahci_mode=Enable
- sata_alpm=Disable
- maximum_p_state_limit=0xf
- probe_filter=Auto
--l3_cache_partitioning=Disable
-+l3_cache_partitioning=Enable
- ieee1394_controller=Enable
- gart=Enable
- ehci_async_data_cache=Enable
--experimental_memory_speed_boost=Disable
-+experimental_memory_speed_boost=Enable
- power_on_after_fail=On
- boot_option=Fallback
--- 
-2.25.1
-
diff --git a/config/coreboot/fam15h_udimm/patches/0007-util-cbfstool-Makefile-support-distclean.patch b/config/coreboot/fam15h_udimm/patches/0007-util-cbfstool-Makefile-support-distclean.patch
deleted file mode 100644
index 87db312c..00000000
--- a/config/coreboot/fam15h_udimm/patches/0007-util-cbfstool-Makefile-support-distclean.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From d5dc3f23eb546cf328fdfe1e918afa028fb9cd8c Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 9 Jul 2023 04:13:52 +0100
-Subject: [PATCH 1/1] util/cbfstool Makefile: support distclean
-
-it just does make-clean
-
-this is so that this super-old coreboot revision
-interfaces well with lbmk, which runs distclean
-on cbfstool (which is supported, on modern cbfstool)
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/cbfstool/Makefile | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/util/cbfstool/Makefile b/util/cbfstool/Makefile
-index d5321f6959..b8424d7d87 100644
---- a/util/cbfstool/Makefile
-+++ b/util/cbfstool/Makefile
-@@ -26,7 +26,7 @@ ifittool: $(objutil)/cbfstool/ifittool
- 
- cbfs-compression-tool: $(objutil)/cbfstool/cbfs-compression-tool
- 
--.PHONY: clean cbfstool ifittool fmaptool rmodtool ifwitool cbfs-compression-tool
-+.PHONY: distclean clean cbfstool ifittool fmaptool rmodtool ifwitool cbfs-compression-tool
- clean:
- 	$(RM) fmd_parser.c fmd_parser.h fmd_scanner.c fmd_scanner.h
- 	$(RM) $(objutil)/cbfstool/cbfstool $(cbfsobj)
-@@ -55,6 +55,8 @@ install: all
- 	$(INSTALL) ifittool $(DESTDIR)$(BINDIR)
- 	$(INSTALL) cbfs-compression-tool $(DESTDIR)$(BINDIR)
- 
-+distclean: clean
-+
- ifneq ($(V),1)
- .SILENT:
- endif
--- 
-2.40.1
-
diff --git a/config/coreboot/fam15h_udimm/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch b/config/coreboot/fam15h_udimm/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch
deleted file mode 100644
index 72681490..00000000
--- a/config/coreboot/fam15h_udimm/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 4b4b2bdc2cedb3e219c6f90809e5684441b1dafa Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 9 Jul 2023 04:54:19 +0100
-Subject: [PATCH 1/1] crossgcc: patch binutils 2.32 for newer hostcc
-
-tested on debian sid as of 9 July 2023
-
-implicit string declaration
-
-easy peasy
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/patches/binutils-2.32_stringfix.patch | 11 +++++++++++
- 1 file changed, 11 insertions(+)
- create mode 100644 util/crossgcc/patches/binutils-2.32_stringfix.patch
-
-diff --git a/util/crossgcc/patches/binutils-2.32_stringfix.patch b/util/crossgcc/patches/binutils-2.32_stringfix.patch
-new file mode 100644
-index 0000000000..de27a2752a
---- /dev/null
-+++ b/util/crossgcc/patches/binutils-2.32_stringfix.patch
-@@ -0,0 +1,11 @@
-+diff -u binutils-2.32/gold/errors.h binutils-2.32.patched/gold/errors.h
-+--- binutils-2.32/gold/errors.h
-++++ binutils-2.32.patched/gold/errors.h
-+@@ -24,6 +24,7 @@
-+ #define GOLD_ERRORS_H
-+
-+ #include <cstdarg>
-++#include <string>
-+
-+ #include "gold-threads.h"
-+
--- 
-2.40.1
-
diff --git a/config/coreboot/fam15h_udimm/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch b/config/coreboot/fam15h_udimm/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch
deleted file mode 100644
index ecc06d00..00000000
--- a/config/coreboot/fam15h_udimm/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From 373dd351e374f391c9e2048e5f3e535267a04719 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 9 Jul 2023 19:37:39 +0100
-Subject: [PATCH 1/1] fix crossgcc/acpica build on newer hostcc
-
-Changes made to acpica/iasl:
-
-remove superfluous YYSTYPE declaration
-
-make LuxBuffer variables static, to avoid warnings
-treated as errors about multiple definitions
-
-AcpiGbl_DbOpt_NoRegionSupport - remove this definition
-in source/tools/acpiexec/aemain.c because it's already
-re-defined by acpiexec. otherwise the linker complains
-about multiple definitions
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- .../acpica-unix2-20190703_mitigategcc.patch   | 76 +++++++++++++++++++
- 1 file changed, 76 insertions(+)
- create mode 100644 util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
-
-diff --git a/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch b/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
-new file mode 100644
-index 0000000000..8de47245bd
---- /dev/null
-+++ b/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
-@@ -0,0 +1,76 @@
-+From 66b927d923183ff62c9a757fafdeca9d1ac3fa87 Mon Sep 17 00:00:00 2001
-+From: Leah Rowe <leah@libreboot.org>
-+Date: Sun, 9 Jul 2023 18:58:11 +0100
-+Subject: [PATCH 1/1] fix building on newer hostcc (debian sid tested)
-+
-+remove superfluous YYSTYPE declaration
-+
-+make LuxBuffer variables static, to avoid warnings
-+treated as errors about multiple definitions
-+
-+AcpiGbl_DbOpt_NoRegionSupport - remove this definition
-+in source/tools/acpiexec/aemain.c because it's already
-+re-defined by acpiexec. otherwise the linker complains
-+about multiple definitions
-+
-+Signed-off-by: Leah Rowe <leah@libreboot.org>
-+---
-+ source/compiler/aslcompiler.l  | 1 -
-+ source/compiler/dtparser.l     | 2 +-
-+ source/compiler/prparser.l     | 2 +-
-+ source/tools/acpiexec/aemain.c | 1 -
-+ 4 files changed, 2 insertions(+), 4 deletions(-)
-+
-+diff --git a/source/compiler/aslcompiler.l b/source/compiler/aslcompiler.l
-+index 1949b32..a24f028 100644
-+--- a/source/compiler/aslcompiler.l
-++++ b/source/compiler/aslcompiler.l
-+@@ -48,7 +48,6 @@
-+ 
-+ #include <stdlib.h>
-+ #include <string.h>
-+-YYSTYPE AslCompilerlval;
-+ 
-+ /*
-+  * Generation:  Use the following command line:
-+diff --git a/source/compiler/dtparser.l b/source/compiler/dtparser.l
-+index 6517e52..d35181c 100644
-+--- a/source/compiler/dtparser.l
-++++ b/source/compiler/dtparser.l
-+@@ -100,7 +100,7 @@ NewLine         [\n]
-+ /*
-+  * Local support functions
-+  */
-+-YY_BUFFER_STATE         LexBuffer;
-++static YY_BUFFER_STATE         LexBuffer;
-+ 
-+ /******************************************************************************
-+  *
-+diff --git a/source/compiler/prparser.l b/source/compiler/prparser.l
-+index bcdef14..5a1b848 100644
-+--- a/source/compiler/prparser.l
-++++ b/source/compiler/prparser.l
-+@@ -116,7 +116,7 @@ Identifier      [a-zA-Z][0-9a-zA-Z]*
-+ /*
-+  * Local support functions
-+  */
-+-YY_BUFFER_STATE         LexBuffer;
-++static YY_BUFFER_STATE         LexBuffer;
-+ 
-+ 
-+ /******************************************************************************
-+diff --git a/source/tools/acpiexec/aemain.c b/source/tools/acpiexec/aemain.c
-+index 58640dd..cd0add6 100644
-+--- a/source/tools/acpiexec/aemain.c
-++++ b/source/tools/acpiexec/aemain.c
-+@@ -84,7 +84,6 @@ BOOLEAN                     AcpiGbl_VerboseHandlers = FALSE;
-+ UINT8                       AcpiGbl_RegionFillValue = 0;
-+ BOOLEAN                     AcpiGbl_IgnoreErrors = FALSE;
-+ BOOLEAN                     AcpiGbl_AbortLoopOnTimeout = FALSE;
-+-BOOLEAN                     AcpiGbl_DbOpt_NoRegionSupport = FALSE;
-+ UINT8                       AcpiGbl_UseHwReducedFadt = FALSE;
-+ BOOLEAN                     AcpiGbl_DoInterfaceTests = FALSE;
-+ BOOLEAN                     AcpiGbl_LoadTestTables = FALSE;
-+-- 
-+2.40.1
-+
--- 
-2.40.1
-
diff --git a/config/coreboot/fam15h_udimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch b/config/coreboot/fam15h_udimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
deleted file mode 100644
index 2f95297d..00000000
--- a/config/coreboot/fam15h_udimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From ba94a3f27a26d181291b5908bdd627be375eb606 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 16 Jul 2023 00:44:22 +0100
-Subject: [PATCH 1/1] coreboot/fam15h: use new upstream for acpica
-
-the original upstream died
-
-i decided to host it myself, on libreboot rsync,
-for use by mirrors.
-
-this is also useful for GNU Boot, when downloading
-acpica on coreboot 4.11_branch, for fam15h boards
-
-this change is not necessary on other coreboot trees,
-which adhere to new coreboot policy (newer coreboot
-pulls acpica from github, which is fairly reliable)
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index b75b90a877..e3efa722f1 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -73,7 +73,7 @@ MPC_ARCHIVE="https://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz"
- GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
- BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
- GDB_ARCHIVE="https://ftpmirror.gnu.org/gdb/gdb-${GDB_VERSION}.tar.xz"
--IASL_ARCHIVE="https://acpica.org/sites/acpica/files/acpica-unix2-${IASL_VERSION}.tar.gz"
-+IASL_ARCHIVE="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
- PYTHON_ARCHIVE="https://www.python.org/ftp/python/${PYTHON_VERSION}/Python-${PYTHON_VERSION}.tar.xz"
- EXPAT_ARCHIVE="https://downloads.sourceforge.net/sourceforge/expat/expat-${EXPAT_VERSION}.tar.bz2"
- # CLANG toolchain archive locations
--- 
-2.40.1
-
diff --git a/config/coreboot/fam15h_udimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch b/config/coreboot/fam15h_udimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
deleted file mode 100644
index bee2d89a..00000000
--- a/config/coreboot/fam15h_udimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 5358f0adc28bb1300162aa6bcfaa45aea69970d0 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 5 Nov 2023 23:08:43 +0000
-Subject: [PATCH 1/1] use mirrorservire.org for gcc downloads
-
-the gnu.org 302 redirect often fails
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 14 +++++++-------
- 1 file changed, 7 insertions(+), 7 deletions(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 4b838208bb..438fb5a59f 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -67,12 +67,12 @@ NASM_VERSION=2.14.02
- # These are sanitized by the jenkins toolchain test builder, so if
- # a completely new URL is added here, it probably needs to be added
- # to the jenkins build as well, or the builder won't download it.
--GMP_ARCHIVE="https://ftpmirror.gnu.org/gmp/gmp-${GMP_VERSION}.tar.xz"
--MPFR_ARCHIVE="https://ftpmirror.gnu.org/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
--MPC_ARCHIVE="https://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz"
--GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
--BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
--GDB_ARCHIVE="https://ftpmirror.gnu.org/gdb/gdb-${GDB_VERSION}.tar.xz"
-+GMP_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-${GMP_VERSION}.tar.xz"
-+MPFR_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
-+MPC_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-${MPC_VERSION}.tar.gz"
-+GCC_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
-+BINUTILS_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
-+GDB_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gdb/gdb-${GDB_VERSION}.tar.xz"
- IASL_ARCHIVE="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
- PYTHON_ARCHIVE="https://www.python.org/ftp/python/${PYTHON_VERSION}/Python-${PYTHON_VERSION}.tar.xz"
- EXPAT_ARCHIVE="https://downloads.sourceforge.net/sourceforge/expat/expat-${EXPAT_VERSION}.tar.bz2"
-@@ -81,7 +81,7 @@ LLVM_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/llvm-${CLANG_VERSION}.s
- CFE_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/cfe-${CLANG_VERSION}.src.tar.xz"
- CRT_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/compiler-rt-${CLANG_VERSION}.src.tar.xz"
- CTE_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/clang-tools-extra-${CLANG_VERSION}.src.tar.xz"
--MAKE_ARCHIVE="https://ftpmirror.gnu.org/make/make-${MAKE_VERSION}.tar.bz2"
-+MAKE_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/make/make-${MAKE_VERSION}.tar.bz2"
- CMAKE_ARCHIVE="https://cmake.org/files/v3.15/cmake-${CMAKE_VERSION}.tar.gz"
- NASM_ARCHIVE="https://www.nasm.us/pub/nasm/releasebuilds/${NASM_VERSION}/nasm-${NASM_VERSION}.tar.bz2"
- 
--- 
-2.39.2
-
diff --git a/config/coreboot/fam15h_udimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch b/config/coreboot/fam15h_udimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch
deleted file mode 100644
index c767968b..00000000
--- a/config/coreboot/fam15h_udimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 5ec265deac0da077c9b1e23fc52abe1b5f0696b5 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sat, 13 Jan 2024 14:57:46 +0000
-Subject: [PATCH 1/1] buildgcc: don't treat binutil warnings as errors
-
-binutils 2.32 has too many build warnings on modern toolchains,
-and newer gcc versions are much more pedantic about warnings,
-treating them as errors by default.
-
-instead of patching binutils like before, just let the warnings
-persist. the warnings are benign. a user on gnuboot irc had serious
-issues building binutils 2.32 specifically, on current gentoo as
-of 13 January 2024. this patch mitigates those warning messages.
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 505cd7484c..6f1953e68d 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -719,7 +719,7 @@ build_BINUTILS() {
- 		--disable-werror --disable-nls --enable-lto --enable-gold \
- 		--enable-interwork --enable-multilib \
- 		--enable-plugins --enable-multilibs \
--		CFLAGS="$HOSTCFLAGS" \
-+		CFLAGS="$HOSTCFLAGS -Wno-error -w" \
- 		CXXFLAGS="$HOSTCFLAGS" \
- 		|| touch .failed
- 	# shellcheck disable=SC2086
--- 
-2.39.2
-
diff --git a/config/coreboot/fam15h_udimm/target.cfg b/config/coreboot/fam15h_udimm/target.cfg
deleted file mode 100644
index c3c76603..00000000
--- a/config/coreboot/fam15h_udimm/target.cfg
+++ /dev/null
@@ -1,4 +0,0 @@
-tree="fam15h_udimm"
-tree_depend="fam15h_rdimm"
-xtree="fam15h_rdimm"
-rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
diff --git a/config/coreboot/kcma_d8-udimm_16mb/target.cfg b/config/coreboot/kcma_d8-udimm_16mb/target.cfg
deleted file mode 100644
index 8be2926f..00000000
--- a/config/coreboot/kcma_d8-udimm_16mb/target.cfg
+++ /dev/null
@@ -1,11 +0,0 @@
-tree="fam15h_udimm"
-xtree="fam15h_rdimm"
-xarch="i386-elf"
-payload_seabios="y"
-payload_grub="y"
-payload_memtest="y"
-xlang="c"
-grub_timout=10
-grub_scan_disk="nvme ahci"
-grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kcma_d8-udimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kcma_d8_16mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/kcma_d8-udimm_16mb/config/libgfxinit_txtmode
rename to config/coreboot/kcma_d8_16mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kcma_d8_rdimm_2mb/target.cfg b/config/coreboot/kcma_d8_16mb/target.cfg
similarity index 90%
rename from config/coreboot/kcma_d8_rdimm_2mb/target.cfg
rename to config/coreboot/kcma_d8_16mb/target.cfg
index fbe50f7a..5f705f43 100644
--- a/config/coreboot/kcma_d8_rdimm_2mb/target.cfg
+++ b/config/coreboot/kcma_d8_16mb/target.cfg
@@ -1,4 +1,4 @@
-tree="fam15h_rdimm"
+tree="fam15h"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/kcma_d8_rdimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kcma_d8_2mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/kcma_d8_rdimm_2mb/config/libgfxinit_txtmode
rename to config/coreboot/kcma_d8_2mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg b/config/coreboot/kcma_d8_2mb/target.cfg
similarity index 90%
rename from config/coreboot/kgpe_d16_rdimm_2mb/target.cfg
rename to config/coreboot/kcma_d8_2mb/target.cfg
index fbe50f7a..5f705f43 100644
--- a/config/coreboot/kgpe_d16_rdimm_2mb/target.cfg
+++ b/config/coreboot/kcma_d8_2mb/target.cfg
@@ -1,4 +1,4 @@
-tree="fam15h_rdimm"
+tree="fam15h"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/kcma_d8_rdimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kcma_d8_rdimm_16mb/config/libgfxinit_txtmode
deleted file mode 100644
index 39cfe811..00000000
--- a/config/coreboot/kcma_d8_rdimm_16mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,704 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_NO_RELOCATABLE_RAMSTAGE=y
-# CONFIG_RELOCATABLE_RAMSTAGE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_ADI is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_ADVANSUS is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-CONFIG_VENDOR_ASUS=y
-# CONFIG_VENDOR_AVALUE is not set
-# CONFIG_VENDOR_BAP is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_ELMEX is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_ESD is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IEI is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_JETWAY is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIPPERT is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_TYAN is not set
-# CONFIG_VENDOR_UP is not set
-# CONFIG_VENDOR_VIA is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_DIR="asus/kcma-d8"
-CONFIG_MAINBOARD_PART_NUMBER="KCMA-D8"
-CONFIG_MAX_CPUS=16
-CONFIG_CBFS_SIZE=0x1000000
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_MAINBOARD_VENDOR="ASUS"
-CONFIG_APIC_ID_OFFSET=0x0
-CONFIG_HW_MEM_HOLE_SIZEK=0x100000
-CONFIG_MAX_PHYSICAL_CPUS=2
-CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
-CONFIG_HT_CHAIN_UNITID_BASE=0x0
-CONFIG_IRQ_SLOT_COUNT=13
-CONFIG_VGA_BIOS_ID="1000,0072"
-CONFIG_ONBOARD_VGA_IS_PRIMARY=y
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_VGA_BIOS=y
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-CONFIG_VGA_BIOS_FILE="/dev/null"
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
-CONFIG_DEVICETREE="devicetree.cb"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-# CONFIG_BOARD_ASUS_AM1I_A is not set
-# CONFIG_BOARD_ASUS_F2A85_M is not set
-# CONFIG_BOARD_ASUS_F2A85_M_PRO is not set
-# CONFIG_BOARD_ASUS_F2A85_M_LE is not set
-# CONFIG_BOARD_ASUS_H61M_CS is not set
-CONFIG_BOARD_ASUS_KCMA_D8=y
-# CONFIG_BOARD_ASUS_KFSN4_DRE is not set
-# CONFIG_BOARD_ASUS_KGPE_D16 is not set
-# CONFIG_BOARD_ASUS_M4A78_EM is not set
-# CONFIG_BOARD_ASUS_M4A785M is not set
-# CONFIG_BOARD_ASUS_M4A785TM is not set
-# CONFIG_BOARD_ASUS_M5A88_V is not set
-# CONFIG_BOARD_ASUS_MAXIMUS_IV_GENE_Z is not set
-# CONFIG_BOARD_ASUS_P2B_D is not set
-# CONFIG_BOARD_ASUS_P2B_DS is not set
-# CONFIG_BOARD_ASUS_P2B_F is not set
-# CONFIG_BOARD_ASUS_P2B_LS is not set
-# CONFIG_BOARD_ASUS_P2B is not set
-# CONFIG_BOARD_ASUS_P3B_F is not set
-# CONFIG_BOARD_ASUS_P5GC_MX is not set
-# CONFIG_BOARD_ASUS_P5QC is not set
-# CONFIG_BOARD_ASUS_P5Q_PRO is not set
-# CONFIG_BOARD_ASUS_P5QL_PRO is not set
-# CONFIG_BOARD_ASUS_P5QL_EM is not set
-# CONFIG_BOARD_ASUS_P5QPL_AM is not set
-# CONFIG_BOARD_ASUS_P5G41T_M_LX is not set
-# CONFIG_BOARD_ASUS_P8H61_M_LX is not set
-# CONFIG_BOARD_ASUS_P8H61_M_PRO is not set
-# CONFIG_BOARD_ASUS_P8Z77_M_PRO is not set
-CONFIG_POST_IO=y
-CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kcma-d8/bootblock.c"
-CONFIG_DCACHE_RAM_BASE=0xc2000
-CONFIG_DCACHE_RAM_SIZE=0x1e000
-CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f
-CONFIG_MAX_REBOOT_CNT=10
-CONFIG_OVERRIDE_DEVICETREE=""
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_FMDFILE=""
-# CONFIG_VBOOT is not set
-CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
-CONFIG_POST_DEVICE=y
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_DIMM_MAX=4
-CONFIG_TTYS0_LCS=3
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KCMA-D8"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-# CONFIG_USBDEBUG is not set
-CONFIG_MAINBOARD_VERSION="1.0"
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_PCIEXP_L1_SUB_STATE=y
-# CONFIG_NO_POST is not set
-CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
-CONFIG_HEAP_SIZE=0xc0000
-# CONFIG_CONSOLE_POST is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_BOARD_ROMSIZE_KB_2048=y
-# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=16384
-CONFIG_ROM_SIZE=0x1000000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
-CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
-# CONFIG_SYSTEM_TYPE_LAPTOP is not set
-# CONFIG_SYSTEM_TYPE_TABLET is not set
-# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
-# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
-# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_CPU_ADDR_BITS=48
-CONFIG_MMCONF_BUS_NUMBER=256
-CONFIG_EHCI_BAR=0xfef00000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
-# CONFIG_SOC_CAVIUM_CN81XX is not set
-CONFIG_ARCH_ARMV8_EXTENSION=0
-CONFIG_STACK_SIZE=0x1000
-# CONFIG_SOC_CAVIUM_COMMON is not set
-# CONFIG_SOC_INTEL_GLK is not set
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_TTYS0_BASE=0x3f8
-CONFIG_HPET_MIN_TICKS=0x14
-CONFIG_UART_PCI_ADDR=0x0
-# CONFIG_SOC_MEDIATEK_MT8173 is not set
-# CONFIG_SOC_MEDIATEK_MT8183 is not set
-# CONFIG_SOC_NVIDIA_TEGRA124 is not set
-# CONFIG_SOC_NVIDIA_TEGRA210 is not set
-# CONFIG_SOC_QUALCOMM_COMMON is not set
-# CONFIG_SOC_QC_IPQ40XX is not set
-# CONFIG_SOC_QC_IPQ806X is not set
-# CONFIG_SOC_QUALCOMM_QCS405 is not set
-# CONFIG_SOC_QUALCOMM_SC7180 is not set
-# CONFIG_SOC_QUALCOMM_SDM845 is not set
-# CONFIG_SOC_ROCKCHIP_RK3288 is not set
-# CONFIG_SOC_ROCKCHIP_RK3399 is not set
-# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
-# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
-# CONFIG_SOC_UCB_RISCV is not set
-
-#
-# CPU
-#
-CONFIG_CPU_SOCKET_TYPE=0x14
-# CONFIG_EXT_RT_TBL_SUPPORT is not set
-CONFIG_CBB=0x0
-CONFIG_CDB=0x18
-CONFIG_XIP_ROM_SIZE=0x80000
-CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA=y
-CONFIG_CPU_AMD_MODEL_10XXX=y
-CONFIG_USE_LARGE_DCACHE=y
-CONFIG_NUM_IPI_STARTS=1
-CONFIG_DCACHE_BSP_TOP_STACK_SIZE=0x4000
-CONFIG_DCACHE_BSP_TOP_STACK_SLUSH=0x4000
-CONFIG_DCACHE_AP_STACK_SIZE=0x500
-CONFIG_SET_FIDVID=y
-CONFIG_LIFT_BSP_APIC_ID=y
-CONFIG_SET_FIDVID_DEBUG=y
-CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y
-# CONFIG_SET_FIDVID_CORE0_ONLY is not set
-CONFIG_SET_FIDVID_CORE_RANGE=0
-CONFIG_UDELAY_LAPIC_FIXED_FSB=200
-# CONFIG_CPU_AMD_AGESA is not set
-# CONFIG_CPU_AMD_PI is not set
-# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
-CONFIG_SSE2=y
-# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
-# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
-# CONFIG_CPU_TI_AM335X is not set
-CONFIG_PARALLEL_CPU_INIT=y
-# CONFIG_PARALLEL_MP is not set
-CONFIG_UDELAY_LAPIC=y
-# CONFIG_LAPIC_MONOTONIC_TIMER is not set
-# CONFIG_UDELAY_TSC is not set
-CONFIG_TSC_SYNC_LFENCE=y
-# CONFIG_TSC_SYNC_MFENCE is not set
-# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
-CONFIG_LOGICAL_CPUS=y
-# CONFIG_HAVE_SMI_HANDLER is not set
-# CONFIG_NO_SMM is not set
-# CONFIG_SMM_ASEG is not set
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
-CONFIG_SMM_STUB_STACK_SIZE=0x400
-# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
-# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
-CONFIG_X86_AMD_FIXED_MTRRS=y
-# CONFIG_X86_AMD_INIT_SIPI is not set
-# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
-# CONFIG_SOC_SETS_MSRS is not set
-CONFIG_CAR_GLOBAL_MIGRATION=y
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-# CONFIG_USES_MICROCODE_HEADER_FILES is not set
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-CONFIG_CPU_MICROCODE_MULTIPLE_FILES=y
-
-#
-# Northbridge
-#
-# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
-CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y
-CONFIG_AGP_APERTURE_SIZE=0x4000000
-CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c"
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y
-# CONFIG_HT_CHAIN_DISTRIBUTE is not set
-# CONFIG_DIMM_DDR2 is not set
-CONFIG_DIMM_DDR3=y
-CONFIG_DIMM_REGISTERED=y
-CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y
-# CONFIG_SVI_HIGH_FREQ is not set
-
-#
-# HyperTransport setup
-#
-# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set
-CONFIG_LIMIT_HT_DOWN_WIDTH_16=y
-# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set
-CONFIG_LIMIT_HT_UP_WIDTH_16=y
-# CONFIG_NORTHBRIDGE_AMD_PI is not set
-
-#
-# Southbridge
-#
-CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
-CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
-# CONFIG_AMD_SB_CIMX is not set
-# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
-# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
-CONFIG_SOUTHBRIDGE_AMD_SB700=y
-CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
-CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
-# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set
-CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y
-CONFIG_SOUTHBRIDGE_AMD_SR5650=y
-CONFIG_EXT_CONF_SUPPORT=y
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
-# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
-# CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE is not set
-
-#
-# Super I/O
-#
-# CONFIG_SUPERIO_ASPEED_AST2400 is not set
-# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
-# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
-# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
-CONFIG_SUPERIO_WINBOND_COMMON_PRE_RAM=y
-CONFIG_SUPERIO_WINBOND_W83667HG_A=y
-
-#
-# Embedded Controllers
-#
-# CONFIG_EC_GOOGLE_WILCO is not set
-# CONFIG_CAVIUM_BDK is not set
-# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
-# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
-# CONFIG_UEFI_2_4_BINDING is not set
-# CONFIG_UDK_2015_BINDING is not set
-# CONFIG_UDK_2017_BINDING is not set
-# CONFIG_USE_SIEMENS_HWILIB is not set
-# CONFIG_ARM_LPAE is not set
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-# CONFIG_ARCH_POSTCAR_X86_32 is not set
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
-# CONFIG_ARCH_VERSTAGE_X86_64 is not set
-# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
-# CONFIG_ARCH_POSTCAR_X86_64 is not set
-# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
-# CONFIG_USE_MARCH_586 is not set
-# CONFIG_AP_IN_SIPI_WAIT is not set
-# CONFIG_SIPI_VECTOR_IN_ROM is not set
-CONFIG_RAMBASE=0xe00000
-CONFIG_RAMTOP=0x1000000
-# CONFIG_CBMEM_TOP_BACKUP is not set
-CONFIG_PC80_SYSTEM=y
-# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
-# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
-# CONFIG_HPET_ADDRESS_OVERRIDE is not set
-CONFIG_HPET_ADDRESS=0xfed00000
-CONFIG_ID_SECTION_OFFSET=0x80
-# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
-# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
-CONFIG_ACPI_HAVE_PCAT_8259=y
-# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
-# CONFIG_IDT_IN_EVERY_STAGE is not set
-# CONFIG_PIRQ_ROUTE is not set
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
-CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
-# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
-CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
-# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_SMBUS_HAS_AUX_CHANNELS=y
-CONFIG_PCI=y
-# CONFIG_NO_MMCONF_SUPPORT is not set
-CONFIG_MMCONF_SUPPORT=y
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_VGA_BIOS_DGPU=y
-CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
-CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
-# CONFIG_SOFTWARE_I2C is not set
-
-#
-# Generic Drivers
-#
-# CONFIG_DRIVERS_AS3722_RTC is not set
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
-# CONFIG_GIC is not set
-# CONFIG_IPMI_KCS is not set
-# CONFIG_DRIVERS_LENOVO_WACOM is not set
-# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
-# CONFIG_RT8168_SET_LED_MODE is not set
-# CONFIG_SMMSTORE_IN_CBFS is not set
-CONFIG_SPI_FLASH=y
-# CONFIG_SPI_SDCARD is not set
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
-# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
-# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
-# CONFIG_NO_UART_ON_SUPERIO is not set
-# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
-# CONFIG_UART_OVERRIDE_REFCLK is not set
-# CONFIG_DRIVERS_UART_8250MEM is not set
-# CONFIG_DRIVERS_UART_8250MEM_32 is not set
-# CONFIG_HAVE_UART_SPECIAL is not set
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-# CONFIG_DRIVERS_UART_PL011 is not set
-# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_WIFI is not set
-# CONFIG_DRIVERS_AMD_PI is not set
-CONFIG_DRIVERS_ASPEED_AST2050=y
-CONFIG_DRIVERS_ASPEED_AST_COMMON=y
-# CONFIG_DRIVERS_I2C_MAX98373 is not set
-# CONFIG_DRIVERS_I2C_MAX98927 is not set
-# CONFIG_DRIVERS_I2C_PCA9538 is not set
-# CONFIG_DRIVERS_I2C_PCF8523 is not set
-# CONFIG_DRIVERS_I2C_PTN3460 is not set
-# CONFIG_DRIVERS_I2C_RT1011 is not set
-# CONFIG_DRIVERS_I2C_RT5663 is not set
-# CONFIG_DRIVERS_I2C_RTD2132 is not set
-# CONFIG_DRIVERS_I2C_RX6110SA is not set
-# CONFIG_DRIVERS_I2C_SX9310 is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
-CONFIG_DRIVERS_I2C_W83795=y
-# CONFIG_PLATFORM_USES_FSP1_0 is not set
-# CONFIG_PLATFORM_USES_FSP2_0 is not set
-# CONFIG_PLATFORM_USES_FSP2_1 is not set
-# CONFIG_INTEL_DDI is not set
-# CONFIG_INTEL_EDID is not set
-# CONFIG_INTEL_INT15 is not set
-# CONFIG_INTEL_GMA_ACPI is not set
-# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
-# CONFIG_INTEL_GMA_SWSMISCI is not set
-# CONFIG_DRIVER_INTEL_I210 is not set
-# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
-# CONFIG_HAVE_INTEL_PTT is not set
-# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
-# CONFIG_DRIVER_MAXIM_MAX77686 is not set
-# CONFIG_DRIVER_PARADE_PS8625 is not set
-# CONFIG_DRIVER_PARADE_PS8640 is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_LPC_TPM is not set
-# CONFIG_MAINBOARD_HAS_LPC_TPM is not set
-CONFIG_VGA=y
-# CONFIG_DRIVERS_RICOH_RCE822 is not set
-# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
-# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
-# CONFIG_DRIVERS_SIL_3114 is not set
-# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
-# CONFIG_DRIVER_TI_TPS65090 is not set
-# CONFIG_DRIVERS_TI_TPS65913 is not set
-# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
-# CONFIG_DRIVERS_USB_ACPI is not set
-# CONFIG_COMMONLIB_STORAGE is not set
-
-#
-# Security
-#
-
-#
-# Verified Boot (vboot)
-#
-
-#
-# Trusted Platform Module
-#
-CONFIG_USER_NO_TPM=y
-
-#
-# Memory initialization
-#
-# CONFIG_STM is not set
-# CONFIG_ACPI_SATA_GENERATOR is not set
-# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
-# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
-# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
-# CONFIG_RTC is not set
-
-#
-# Console
-#
-CONFIG_SQUELCH_EARLY_SMP=y
-CONFIG_CONSOLE_SERIAL=y
-
-#
-# I/O mapped, 8250-compatible
-#
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_BAUD=115200
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-CONFIG_HWBASE_DEBUG_CB=y
-CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
-CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
-CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
-# CONFIG_NO_MONOTONIC_TIMER is not set
-CONFIG_HAVE_MONOTONIC_TIMER=y
-# CONFIG_TIMER_QUEUE is not set
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_PCI_IO_CFG_EXT=y
-CONFIG_IOAPIC=y
-# CONFIG_USE_WATCHDOG_ON_BOOT is not set
-# CONFIG_GFXUMA is not set
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_HAVE_MP_TABLE=y
-CONFIG_HAVE_PIRQ_TABLE=y
-# CONFIG_COMMON_FADT is not set
-# CONFIG_ACPI_NHLT is not set
-
-#
-# System tables
-#
-CONFIG_GENERATE_MP_TABLE=y
-CONFIG_GENERATE_PIRQ_TABLE=y
-CONFIG_GENERATE_SMBIOS_TABLES=y
-# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BAYOU is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-CONFIG_HAVE_DEBUG_CAR=y
-# CONFIG_DEBUG_CAR is not set
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_RAM_SETUP=y
-# CONFIG_DEBUG_RAM_SETUP is not set
-# CONFIG_DEBUG_PIRQ is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_TRACE is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_HAVE_EM100_SUPPORT is not set
-CONFIG_ENABLE_APIC_EXT_ID=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
-# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
-# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
-# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
-# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
-# CONFIG_REG_SCRIPT is not set
-# CONFIG_NO_XIP_EARLY_STAGES is not set
-# CONFIG_EARLY_CBMEM_LIST is not set
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_NO_STAGE_CACHE=y
-CONFIG_BOOTBLOCK_CUSTOM=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/kcma_d8_udimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kcma_d8_udimm_2mb/config/libgfxinit_txtmode
deleted file mode 100644
index 7949bcfd..00000000
--- a/config/coreboot/kcma_d8_udimm_2mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,704 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_NO_RELOCATABLE_RAMSTAGE=y
-# CONFIG_RELOCATABLE_RAMSTAGE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_ADI is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_ADVANSUS is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-CONFIG_VENDOR_ASUS=y
-# CONFIG_VENDOR_AVALUE is not set
-# CONFIG_VENDOR_BAP is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_ELMEX is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_ESD is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IEI is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_JETWAY is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIPPERT is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_TYAN is not set
-# CONFIG_VENDOR_UP is not set
-# CONFIG_VENDOR_VIA is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_DIR="asus/kcma-d8"
-CONFIG_MAINBOARD_PART_NUMBER="KCMA-D8"
-CONFIG_MAX_CPUS=16
-CONFIG_CBFS_SIZE=0x200000
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_MAINBOARD_VENDOR="ASUS"
-CONFIG_APIC_ID_OFFSET=0x0
-CONFIG_HW_MEM_HOLE_SIZEK=0x100000
-CONFIG_MAX_PHYSICAL_CPUS=2
-CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
-CONFIG_HT_CHAIN_UNITID_BASE=0x0
-CONFIG_IRQ_SLOT_COUNT=13
-CONFIG_VGA_BIOS_ID="1000,0072"
-CONFIG_ONBOARD_VGA_IS_PRIMARY=y
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_VGA_BIOS=y
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-CONFIG_VGA_BIOS_FILE="/dev/null"
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
-CONFIG_DEVICETREE="devicetree.cb"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-# CONFIG_BOARD_ASUS_AM1I_A is not set
-# CONFIG_BOARD_ASUS_F2A85_M is not set
-# CONFIG_BOARD_ASUS_F2A85_M_PRO is not set
-# CONFIG_BOARD_ASUS_F2A85_M_LE is not set
-# CONFIG_BOARD_ASUS_H61M_CS is not set
-CONFIG_BOARD_ASUS_KCMA_D8=y
-# CONFIG_BOARD_ASUS_KFSN4_DRE is not set
-# CONFIG_BOARD_ASUS_KGPE_D16 is not set
-# CONFIG_BOARD_ASUS_M4A78_EM is not set
-# CONFIG_BOARD_ASUS_M4A785M is not set
-# CONFIG_BOARD_ASUS_M4A785TM is not set
-# CONFIG_BOARD_ASUS_M5A88_V is not set
-# CONFIG_BOARD_ASUS_MAXIMUS_IV_GENE_Z is not set
-# CONFIG_BOARD_ASUS_P2B_D is not set
-# CONFIG_BOARD_ASUS_P2B_DS is not set
-# CONFIG_BOARD_ASUS_P2B_F is not set
-# CONFIG_BOARD_ASUS_P2B_LS is not set
-# CONFIG_BOARD_ASUS_P2B is not set
-# CONFIG_BOARD_ASUS_P3B_F is not set
-# CONFIG_BOARD_ASUS_P5GC_MX is not set
-# CONFIG_BOARD_ASUS_P5QC is not set
-# CONFIG_BOARD_ASUS_P5Q_PRO is not set
-# CONFIG_BOARD_ASUS_P5QL_PRO is not set
-# CONFIG_BOARD_ASUS_P5QL_EM is not set
-# CONFIG_BOARD_ASUS_P5QPL_AM is not set
-# CONFIG_BOARD_ASUS_P5G41T_M_LX is not set
-# CONFIG_BOARD_ASUS_P8H61_M_LX is not set
-# CONFIG_BOARD_ASUS_P8H61_M_PRO is not set
-# CONFIG_BOARD_ASUS_P8Z77_M_PRO is not set
-CONFIG_POST_IO=y
-CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kcma-d8/bootblock.c"
-CONFIG_DCACHE_RAM_BASE=0xc2000
-CONFIG_DCACHE_RAM_SIZE=0x1e000
-CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f
-CONFIG_MAX_REBOOT_CNT=10
-CONFIG_OVERRIDE_DEVICETREE=""
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_FMDFILE=""
-# CONFIG_VBOOT is not set
-CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
-CONFIG_POST_DEVICE=y
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_DIMM_MAX=4
-CONFIG_TTYS0_LCS=3
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KCMA-D8"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-# CONFIG_USBDEBUG is not set
-CONFIG_MAINBOARD_VERSION="1.0"
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_PCIEXP_L1_SUB_STATE=y
-# CONFIG_NO_POST is not set
-CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
-CONFIG_HEAP_SIZE=0xc0000
-# CONFIG_CONSOLE_POST is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_BOARD_ROMSIZE_KB_2048=y
-# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_2048=y
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=2048
-CONFIG_ROM_SIZE=0x200000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
-CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
-# CONFIG_SYSTEM_TYPE_LAPTOP is not set
-# CONFIG_SYSTEM_TYPE_TABLET is not set
-# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
-# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
-# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_CPU_ADDR_BITS=48
-CONFIG_MMCONF_BUS_NUMBER=256
-CONFIG_EHCI_BAR=0xfef00000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
-# CONFIG_SOC_CAVIUM_CN81XX is not set
-CONFIG_ARCH_ARMV8_EXTENSION=0
-CONFIG_STACK_SIZE=0x1000
-# CONFIG_SOC_CAVIUM_COMMON is not set
-# CONFIG_SOC_INTEL_GLK is not set
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_TTYS0_BASE=0x3f8
-CONFIG_HPET_MIN_TICKS=0x14
-CONFIG_UART_PCI_ADDR=0x0
-# CONFIG_SOC_MEDIATEK_MT8173 is not set
-# CONFIG_SOC_MEDIATEK_MT8183 is not set
-# CONFIG_SOC_NVIDIA_TEGRA124 is not set
-# CONFIG_SOC_NVIDIA_TEGRA210 is not set
-# CONFIG_SOC_QUALCOMM_COMMON is not set
-# CONFIG_SOC_QC_IPQ40XX is not set
-# CONFIG_SOC_QC_IPQ806X is not set
-# CONFIG_SOC_QUALCOMM_QCS405 is not set
-# CONFIG_SOC_QUALCOMM_SC7180 is not set
-# CONFIG_SOC_QUALCOMM_SDM845 is not set
-# CONFIG_SOC_ROCKCHIP_RK3288 is not set
-# CONFIG_SOC_ROCKCHIP_RK3399 is not set
-# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
-# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
-# CONFIG_SOC_UCB_RISCV is not set
-
-#
-# CPU
-#
-CONFIG_CPU_SOCKET_TYPE=0x14
-# CONFIG_EXT_RT_TBL_SUPPORT is not set
-CONFIG_CBB=0x0
-CONFIG_CDB=0x18
-CONFIG_XIP_ROM_SIZE=0x80000
-CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA=y
-CONFIG_CPU_AMD_MODEL_10XXX=y
-CONFIG_USE_LARGE_DCACHE=y
-CONFIG_NUM_IPI_STARTS=1
-CONFIG_DCACHE_BSP_TOP_STACK_SIZE=0x4000
-CONFIG_DCACHE_BSP_TOP_STACK_SLUSH=0x4000
-CONFIG_DCACHE_AP_STACK_SIZE=0x500
-CONFIG_SET_FIDVID=y
-CONFIG_LIFT_BSP_APIC_ID=y
-CONFIG_SET_FIDVID_DEBUG=y
-CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y
-# CONFIG_SET_FIDVID_CORE0_ONLY is not set
-CONFIG_SET_FIDVID_CORE_RANGE=0
-CONFIG_UDELAY_LAPIC_FIXED_FSB=200
-# CONFIG_CPU_AMD_AGESA is not set
-# CONFIG_CPU_AMD_PI is not set
-# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
-CONFIG_SSE2=y
-# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
-# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
-# CONFIG_CPU_TI_AM335X is not set
-CONFIG_PARALLEL_CPU_INIT=y
-# CONFIG_PARALLEL_MP is not set
-CONFIG_UDELAY_LAPIC=y
-# CONFIG_LAPIC_MONOTONIC_TIMER is not set
-# CONFIG_UDELAY_TSC is not set
-CONFIG_TSC_SYNC_LFENCE=y
-# CONFIG_TSC_SYNC_MFENCE is not set
-# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
-CONFIG_LOGICAL_CPUS=y
-# CONFIG_HAVE_SMI_HANDLER is not set
-# CONFIG_NO_SMM is not set
-# CONFIG_SMM_ASEG is not set
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
-CONFIG_SMM_STUB_STACK_SIZE=0x400
-# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
-# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
-CONFIG_X86_AMD_FIXED_MTRRS=y
-# CONFIG_X86_AMD_INIT_SIPI is not set
-# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
-# CONFIG_SOC_SETS_MSRS is not set
-CONFIG_CAR_GLOBAL_MIGRATION=y
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-# CONFIG_USES_MICROCODE_HEADER_FILES is not set
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-CONFIG_CPU_MICROCODE_MULTIPLE_FILES=y
-
-#
-# Northbridge
-#
-# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
-CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y
-CONFIG_AGP_APERTURE_SIZE=0x4000000
-CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c"
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y
-# CONFIG_HT_CHAIN_DISTRIBUTE is not set
-# CONFIG_DIMM_DDR2 is not set
-CONFIG_DIMM_DDR3=y
-CONFIG_DIMM_REGISTERED=y
-CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y
-# CONFIG_SVI_HIGH_FREQ is not set
-
-#
-# HyperTransport setup
-#
-# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set
-CONFIG_LIMIT_HT_DOWN_WIDTH_16=y
-# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set
-CONFIG_LIMIT_HT_UP_WIDTH_16=y
-# CONFIG_NORTHBRIDGE_AMD_PI is not set
-
-#
-# Southbridge
-#
-CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
-CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
-# CONFIG_AMD_SB_CIMX is not set
-# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
-# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
-CONFIG_SOUTHBRIDGE_AMD_SB700=y
-CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
-CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
-# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set
-CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y
-CONFIG_SOUTHBRIDGE_AMD_SR5650=y
-CONFIG_EXT_CONF_SUPPORT=y
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
-# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
-# CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE is not set
-
-#
-# Super I/O
-#
-# CONFIG_SUPERIO_ASPEED_AST2400 is not set
-# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
-# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
-# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
-CONFIG_SUPERIO_WINBOND_COMMON_PRE_RAM=y
-CONFIG_SUPERIO_WINBOND_W83667HG_A=y
-
-#
-# Embedded Controllers
-#
-# CONFIG_EC_GOOGLE_WILCO is not set
-# CONFIG_CAVIUM_BDK is not set
-# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
-# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
-# CONFIG_UEFI_2_4_BINDING is not set
-# CONFIG_UDK_2015_BINDING is not set
-# CONFIG_UDK_2017_BINDING is not set
-# CONFIG_USE_SIEMENS_HWILIB is not set
-# CONFIG_ARM_LPAE is not set
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-# CONFIG_ARCH_POSTCAR_X86_32 is not set
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
-# CONFIG_ARCH_VERSTAGE_X86_64 is not set
-# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
-# CONFIG_ARCH_POSTCAR_X86_64 is not set
-# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
-# CONFIG_USE_MARCH_586 is not set
-# CONFIG_AP_IN_SIPI_WAIT is not set
-# CONFIG_SIPI_VECTOR_IN_ROM is not set
-CONFIG_RAMBASE=0xe00000
-CONFIG_RAMTOP=0x1000000
-# CONFIG_CBMEM_TOP_BACKUP is not set
-CONFIG_PC80_SYSTEM=y
-# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
-# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
-# CONFIG_HPET_ADDRESS_OVERRIDE is not set
-CONFIG_HPET_ADDRESS=0xfed00000
-CONFIG_ID_SECTION_OFFSET=0x80
-# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
-# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
-CONFIG_ACPI_HAVE_PCAT_8259=y
-# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
-# CONFIG_IDT_IN_EVERY_STAGE is not set
-# CONFIG_PIRQ_ROUTE is not set
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
-CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
-# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
-CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
-# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_SMBUS_HAS_AUX_CHANNELS=y
-CONFIG_PCI=y
-# CONFIG_NO_MMCONF_SUPPORT is not set
-CONFIG_MMCONF_SUPPORT=y
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_VGA_BIOS_DGPU=y
-CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
-CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
-# CONFIG_SOFTWARE_I2C is not set
-
-#
-# Generic Drivers
-#
-# CONFIG_DRIVERS_AS3722_RTC is not set
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
-# CONFIG_GIC is not set
-# CONFIG_IPMI_KCS is not set
-# CONFIG_DRIVERS_LENOVO_WACOM is not set
-# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
-# CONFIG_RT8168_SET_LED_MODE is not set
-# CONFIG_SMMSTORE_IN_CBFS is not set
-CONFIG_SPI_FLASH=y
-# CONFIG_SPI_SDCARD is not set
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
-# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
-# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
-# CONFIG_NO_UART_ON_SUPERIO is not set
-# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
-# CONFIG_UART_OVERRIDE_REFCLK is not set
-# CONFIG_DRIVERS_UART_8250MEM is not set
-# CONFIG_DRIVERS_UART_8250MEM_32 is not set
-# CONFIG_HAVE_UART_SPECIAL is not set
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-# CONFIG_DRIVERS_UART_PL011 is not set
-# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_WIFI is not set
-# CONFIG_DRIVERS_AMD_PI is not set
-CONFIG_DRIVERS_ASPEED_AST2050=y
-CONFIG_DRIVERS_ASPEED_AST_COMMON=y
-# CONFIG_DRIVERS_I2C_MAX98373 is not set
-# CONFIG_DRIVERS_I2C_MAX98927 is not set
-# CONFIG_DRIVERS_I2C_PCA9538 is not set
-# CONFIG_DRIVERS_I2C_PCF8523 is not set
-# CONFIG_DRIVERS_I2C_PTN3460 is not set
-# CONFIG_DRIVERS_I2C_RT1011 is not set
-# CONFIG_DRIVERS_I2C_RT5663 is not set
-# CONFIG_DRIVERS_I2C_RTD2132 is not set
-# CONFIG_DRIVERS_I2C_RX6110SA is not set
-# CONFIG_DRIVERS_I2C_SX9310 is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
-CONFIG_DRIVERS_I2C_W83795=y
-# CONFIG_PLATFORM_USES_FSP1_0 is not set
-# CONFIG_PLATFORM_USES_FSP2_0 is not set
-# CONFIG_PLATFORM_USES_FSP2_1 is not set
-# CONFIG_INTEL_DDI is not set
-# CONFIG_INTEL_EDID is not set
-# CONFIG_INTEL_INT15 is not set
-# CONFIG_INTEL_GMA_ACPI is not set
-# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
-# CONFIG_INTEL_GMA_SWSMISCI is not set
-# CONFIG_DRIVER_INTEL_I210 is not set
-# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
-# CONFIG_HAVE_INTEL_PTT is not set
-# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
-# CONFIG_DRIVER_MAXIM_MAX77686 is not set
-# CONFIG_DRIVER_PARADE_PS8625 is not set
-# CONFIG_DRIVER_PARADE_PS8640 is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_LPC_TPM is not set
-# CONFIG_MAINBOARD_HAS_LPC_TPM is not set
-CONFIG_VGA=y
-# CONFIG_DRIVERS_RICOH_RCE822 is not set
-# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
-# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
-# CONFIG_DRIVERS_SIL_3114 is not set
-# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
-# CONFIG_DRIVER_TI_TPS65090 is not set
-# CONFIG_DRIVERS_TI_TPS65913 is not set
-# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
-# CONFIG_DRIVERS_USB_ACPI is not set
-# CONFIG_COMMONLIB_STORAGE is not set
-
-#
-# Security
-#
-
-#
-# Verified Boot (vboot)
-#
-
-#
-# Trusted Platform Module
-#
-CONFIG_USER_NO_TPM=y
-
-#
-# Memory initialization
-#
-# CONFIG_STM is not set
-# CONFIG_ACPI_SATA_GENERATOR is not set
-# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
-# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
-# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
-# CONFIG_RTC is not set
-
-#
-# Console
-#
-CONFIG_SQUELCH_EARLY_SMP=y
-CONFIG_CONSOLE_SERIAL=y
-
-#
-# I/O mapped, 8250-compatible
-#
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_BAUD=115200
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-CONFIG_HWBASE_DEBUG_CB=y
-CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
-CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
-CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
-# CONFIG_NO_MONOTONIC_TIMER is not set
-CONFIG_HAVE_MONOTONIC_TIMER=y
-# CONFIG_TIMER_QUEUE is not set
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_PCI_IO_CFG_EXT=y
-CONFIG_IOAPIC=y
-# CONFIG_USE_WATCHDOG_ON_BOOT is not set
-# CONFIG_GFXUMA is not set
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_HAVE_MP_TABLE=y
-CONFIG_HAVE_PIRQ_TABLE=y
-# CONFIG_COMMON_FADT is not set
-# CONFIG_ACPI_NHLT is not set
-
-#
-# System tables
-#
-CONFIG_GENERATE_MP_TABLE=y
-CONFIG_GENERATE_PIRQ_TABLE=y
-CONFIG_GENERATE_SMBIOS_TABLES=y
-# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BAYOU is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-CONFIG_HAVE_DEBUG_CAR=y
-# CONFIG_DEBUG_CAR is not set
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_RAM_SETUP=y
-# CONFIG_DEBUG_RAM_SETUP is not set
-# CONFIG_DEBUG_PIRQ is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_TRACE is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_HAVE_EM100_SUPPORT is not set
-CONFIG_ENABLE_APIC_EXT_ID=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
-# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
-# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
-# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
-# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
-# CONFIG_REG_SCRIPT is not set
-# CONFIG_NO_XIP_EARLY_STAGES is not set
-# CONFIG_EARLY_CBMEM_LIST is not set
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_NO_STAGE_CACHE=y
-CONFIG_BOOTBLOCK_CUSTOM=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/kcma_d8_udimm_2mb/target.cfg b/config/coreboot/kcma_d8_udimm_2mb/target.cfg
deleted file mode 100644
index 259dbb9b..00000000
--- a/config/coreboot/kcma_d8_udimm_2mb/target.cfg
+++ /dev/null
@@ -1,10 +0,0 @@
-tree="fam15h_udimm"
-xtree="fam15h_rdimm"
-xarch="i386-elf"
-payload_seabios="y"
-payload_grub="y"
-payload_memtest="y"
-xlang="c"
-grub_scan_disk="nvme ahci"
-grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kfsn4_dre_1mb/target.cfg b/config/coreboot/kfsn4_dre_1mb/target.cfg
index a7d7e297..57e64580 100644
--- a/config/coreboot/kfsn4_dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_1mb/target.cfg
@@ -1,4 +1,4 @@
-tree="fam15h_udimm"
+tree="fam15h"
 xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
diff --git a/config/coreboot/kfsn4_dre_2mb/target.cfg b/config/coreboot/kfsn4_dre_2mb/target.cfg
index ab87dd2f..606962a2 100644
--- a/config/coreboot/kfsn4_dre_2mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_2mb/target.cfg
@@ -1,4 +1,4 @@
-tree="fam15h_udimm"
+tree="fam15h"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/kgpe_d16_rdimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kgpe_d16_16mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/kgpe_d16_rdimm_16mb/config/libgfxinit_txtmode
rename to config/coreboot/kgpe_d16_16mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg b/config/coreboot/kgpe_d16_16mb/target.cfg
similarity index 90%
rename from config/coreboot/kgpe_d16_rdimm_16mb/target.cfg
rename to config/coreboot/kgpe_d16_16mb/target.cfg
index fbe50f7a..5f705f43 100644
--- a/config/coreboot/kgpe_d16_rdimm_16mb/target.cfg
+++ b/config/coreboot/kgpe_d16_16mb/target.cfg
@@ -1,4 +1,4 @@
-tree="fam15h_rdimm"
+tree="fam15h"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/kgpe_d16_rdimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kgpe_d16_2mb/config/libgfxinit_txtmode
similarity index 100%
rename from config/coreboot/kgpe_d16_rdimm_2mb/config/libgfxinit_txtmode
rename to config/coreboot/kgpe_d16_2mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kcma_d8_rdimm_16mb/target.cfg b/config/coreboot/kgpe_d16_2mb/target.cfg
similarity index 90%
rename from config/coreboot/kcma_d8_rdimm_16mb/target.cfg
rename to config/coreboot/kgpe_d16_2mb/target.cfg
index fbe50f7a..5f705f43 100644
--- a/config/coreboot/kcma_d8_rdimm_16mb/target.cfg
+++ b/config/coreboot/kgpe_d16_2mb/target.cfg
@@ -1,4 +1,4 @@
-tree="fam15h_rdimm"
+tree="fam15h"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/kgpe_d16_udimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kgpe_d16_udimm_16mb/config/libgfxinit_txtmode
deleted file mode 100644
index c29a71f8..00000000
--- a/config/coreboot/kgpe_d16_udimm_16mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,713 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_NO_RELOCATABLE_RAMSTAGE=y
-# CONFIG_RELOCATABLE_RAMSTAGE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_ADI is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_ADVANSUS is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-CONFIG_VENDOR_ASUS=y
-# CONFIG_VENDOR_AVALUE is not set
-# CONFIG_VENDOR_BAP is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_ELMEX is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_ESD is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IEI is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_JETWAY is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIPPERT is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_TYAN is not set
-# CONFIG_VENDOR_UP is not set
-# CONFIG_VENDOR_VIA is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_DIR="asus/kgpe-d16"
-CONFIG_MAINBOARD_PART_NUMBER="KGPE-D16"
-CONFIG_MAX_CPUS=32
-CONFIG_CBFS_SIZE=0x1000000
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_MAINBOARD_VENDOR="ASUS"
-CONFIG_APIC_ID_OFFSET=0x0
-CONFIG_HW_MEM_HOLE_SIZEK=0x100000
-CONFIG_MAX_PHYSICAL_CPUS=4
-CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
-CONFIG_HT_CHAIN_UNITID_BASE=0x0
-CONFIG_IRQ_SLOT_COUNT=13
-CONFIG_VGA_BIOS_ID="1000,0072"
-CONFIG_ONBOARD_VGA_IS_PRIMARY=y
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_VGA_BIOS=y
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-CONFIG_VGA_BIOS_FILE="/dev/null"
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
-CONFIG_DEVICETREE="devicetree.cb"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-# CONFIG_BOARD_ASUS_AM1I_A is not set
-# CONFIG_BOARD_ASUS_F2A85_M is not set
-# CONFIG_BOARD_ASUS_F2A85_M_PRO is not set
-# CONFIG_BOARD_ASUS_F2A85_M_LE is not set
-# CONFIG_BOARD_ASUS_H61M_CS is not set
-# CONFIG_BOARD_ASUS_KCMA_D8 is not set
-# CONFIG_BOARD_ASUS_KFSN4_DRE is not set
-CONFIG_BOARD_ASUS_KGPE_D16=y
-# CONFIG_BOARD_ASUS_M4A78_EM is not set
-# CONFIG_BOARD_ASUS_M4A785M is not set
-# CONFIG_BOARD_ASUS_M4A785TM is not set
-# CONFIG_BOARD_ASUS_M5A88_V is not set
-# CONFIG_BOARD_ASUS_MAXIMUS_IV_GENE_Z is not set
-# CONFIG_BOARD_ASUS_P2B_D is not set
-# CONFIG_BOARD_ASUS_P2B_DS is not set
-# CONFIG_BOARD_ASUS_P2B_F is not set
-# CONFIG_BOARD_ASUS_P2B_LS is not set
-# CONFIG_BOARD_ASUS_P2B is not set
-# CONFIG_BOARD_ASUS_P3B_F is not set
-# CONFIG_BOARD_ASUS_P5GC_MX is not set
-# CONFIG_BOARD_ASUS_P5QC is not set
-# CONFIG_BOARD_ASUS_P5Q_PRO is not set
-# CONFIG_BOARD_ASUS_P5QL_PRO is not set
-# CONFIG_BOARD_ASUS_P5QL_EM is not set
-# CONFIG_BOARD_ASUS_P5QPL_AM is not set
-# CONFIG_BOARD_ASUS_P5G41T_M_LX is not set
-# CONFIG_BOARD_ASUS_P8H61_M_LX is not set
-# CONFIG_BOARD_ASUS_P8H61_M_PRO is not set
-# CONFIG_BOARD_ASUS_P8Z77_M_PRO is not set
-CONFIG_POST_IO=y
-CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kgpe-d16/bootblock.c"
-CONFIG_DCACHE_RAM_BASE=0xc2000
-CONFIG_DCACHE_RAM_SIZE=0x1e000
-CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f
-CONFIG_MAX_REBOOT_CNT=10
-CONFIG_OVERRIDE_DEVICETREE=""
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_FMDFILE=""
-# CONFIG_VBOOT is not set
-CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
-CONFIG_POST_DEVICE=y
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_DIMM_MAX=4
-CONFIG_TPM_PIRQ=0x0
-CONFIG_TTYS0_LCS=3
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KGPE-D16"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-# CONFIG_USBDEBUG is not set
-CONFIG_IPMI_KCS_REGISTER_SPACING=1
-CONFIG_IPMI_FRU_SINGLE_RW_SZ=16
-CONFIG_MAINBOARD_VERSION="1.0"
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_PCIEXP_L1_SUB_STATE=y
-# CONFIG_NO_POST is not set
-CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
-CONFIG_HEAP_SIZE=0xc0000
-# CONFIG_CONSOLE_POST is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_BOARD_ROMSIZE_KB_2048=y
-# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=16384
-CONFIG_ROM_SIZE=0x1000000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
-CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
-# CONFIG_SYSTEM_TYPE_LAPTOP is not set
-# CONFIG_SYSTEM_TYPE_TABLET is not set
-# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
-# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
-# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_CPU_ADDR_BITS=48
-CONFIG_MMCONF_BUS_NUMBER=256
-CONFIG_EHCI_BAR=0xfef00000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
-# CONFIG_SOC_CAVIUM_CN81XX is not set
-CONFIG_ARCH_ARMV8_EXTENSION=0
-CONFIG_STACK_SIZE=0x1000
-# CONFIG_SOC_CAVIUM_COMMON is not set
-# CONFIG_SOC_INTEL_GLK is not set
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_TTYS0_BASE=0x3f8
-CONFIG_HPET_MIN_TICKS=0x14
-CONFIG_UART_PCI_ADDR=0x0
-# CONFIG_SOC_MEDIATEK_MT8173 is not set
-# CONFIG_SOC_MEDIATEK_MT8183 is not set
-# CONFIG_SOC_NVIDIA_TEGRA124 is not set
-# CONFIG_SOC_NVIDIA_TEGRA210 is not set
-# CONFIG_SOC_QUALCOMM_COMMON is not set
-# CONFIG_SOC_QC_IPQ40XX is not set
-# CONFIG_SOC_QC_IPQ806X is not set
-# CONFIG_SOC_QUALCOMM_QCS405 is not set
-# CONFIG_SOC_QUALCOMM_SC7180 is not set
-# CONFIG_SOC_QUALCOMM_SDM845 is not set
-# CONFIG_SOC_ROCKCHIP_RK3288 is not set
-# CONFIG_SOC_ROCKCHIP_RK3399 is not set
-# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
-# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
-# CONFIG_SOC_UCB_RISCV is not set
-
-#
-# CPU
-#
-CONFIG_CPU_SOCKET_TYPE=0x15
-# CONFIG_EXT_RT_TBL_SUPPORT is not set
-CONFIG_CBB=0x0
-CONFIG_CDB=0x18
-CONFIG_XIP_ROM_SIZE=0x80000
-CONFIG_CPU_AMD_SOCKET_G34_NON_AGESA=y
-CONFIG_CPU_AMD_MODEL_10XXX=y
-CONFIG_USE_LARGE_DCACHE=y
-CONFIG_NUM_IPI_STARTS=1
-CONFIG_DCACHE_BSP_TOP_STACK_SIZE=0x4000
-CONFIG_DCACHE_BSP_TOP_STACK_SLUSH=0x4000
-CONFIG_DCACHE_AP_STACK_SIZE=0x500
-CONFIG_SET_FIDVID=y
-CONFIG_LIFT_BSP_APIC_ID=y
-CONFIG_SET_FIDVID_DEBUG=y
-CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y
-# CONFIG_SET_FIDVID_CORE0_ONLY is not set
-CONFIG_SET_FIDVID_CORE_RANGE=0
-CONFIG_UDELAY_LAPIC_FIXED_FSB=200
-# CONFIG_CPU_AMD_AGESA is not set
-# CONFIG_CPU_AMD_PI is not set
-# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
-CONFIG_SSE2=y
-# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
-# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
-# CONFIG_CPU_TI_AM335X is not set
-CONFIG_PARALLEL_CPU_INIT=y
-# CONFIG_PARALLEL_MP is not set
-CONFIG_UDELAY_LAPIC=y
-# CONFIG_LAPIC_MONOTONIC_TIMER is not set
-# CONFIG_UDELAY_TSC is not set
-CONFIG_TSC_SYNC_LFENCE=y
-# CONFIG_TSC_SYNC_MFENCE is not set
-# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
-CONFIG_LOGICAL_CPUS=y
-# CONFIG_HAVE_SMI_HANDLER is not set
-# CONFIG_NO_SMM is not set
-# CONFIG_SMM_ASEG is not set
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
-CONFIG_SMM_STUB_STACK_SIZE=0x400
-# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
-# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
-CONFIG_X86_AMD_FIXED_MTRRS=y
-# CONFIG_X86_AMD_INIT_SIPI is not set
-# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
-# CONFIG_SOC_SETS_MSRS is not set
-CONFIG_CAR_GLOBAL_MIGRATION=y
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-# CONFIG_USES_MICROCODE_HEADER_FILES is not set
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-CONFIG_CPU_MICROCODE_MULTIPLE_FILES=y
-
-#
-# Northbridge
-#
-# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
-CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y
-CONFIG_AGP_APERTURE_SIZE=0x4000000
-CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c"
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y
-# CONFIG_HT_CHAIN_DISTRIBUTE is not set
-# CONFIG_DIMM_DDR2 is not set
-CONFIG_DIMM_DDR3=y
-CONFIG_DIMM_REGISTERED=y
-CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y
-# CONFIG_SVI_HIGH_FREQ is not set
-
-#
-# HyperTransport setup
-#
-# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set
-CONFIG_LIMIT_HT_DOWN_WIDTH_16=y
-# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set
-CONFIG_LIMIT_HT_UP_WIDTH_16=y
-# CONFIG_NORTHBRIDGE_AMD_PI is not set
-
-#
-# Southbridge
-#
-CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
-CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
-# CONFIG_AMD_SB_CIMX is not set
-# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
-# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
-CONFIG_SOUTHBRIDGE_AMD_SB700=y
-CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
-CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
-# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set
-CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y
-CONFIG_SOUTHBRIDGE_AMD_SR5650=y
-CONFIG_EXT_CONF_SUPPORT=y
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
-# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
-# CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE is not set
-
-#
-# Super I/O
-#
-# CONFIG_SUPERIO_ASPEED_AST2400 is not set
-# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
-# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
-# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
-CONFIG_SUPERIO_WINBOND_COMMON_PRE_RAM=y
-CONFIG_SUPERIO_WINBOND_W83667HG_A=y
-
-#
-# Embedded Controllers
-#
-# CONFIG_EC_GOOGLE_WILCO is not set
-# CONFIG_CAVIUM_BDK is not set
-# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
-# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
-# CONFIG_UEFI_2_4_BINDING is not set
-# CONFIG_UDK_2015_BINDING is not set
-# CONFIG_UDK_2017_BINDING is not set
-# CONFIG_USE_SIEMENS_HWILIB is not set
-# CONFIG_ARM_LPAE is not set
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-# CONFIG_ARCH_POSTCAR_X86_32 is not set
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
-# CONFIG_ARCH_VERSTAGE_X86_64 is not set
-# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
-# CONFIG_ARCH_POSTCAR_X86_64 is not set
-# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
-# CONFIG_USE_MARCH_586 is not set
-# CONFIG_AP_IN_SIPI_WAIT is not set
-# CONFIG_SIPI_VECTOR_IN_ROM is not set
-CONFIG_RAMBASE=0xe00000
-CONFIG_RAMTOP=0x1000000
-# CONFIG_CBMEM_TOP_BACKUP is not set
-CONFIG_PC80_SYSTEM=y
-# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
-# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
-# CONFIG_HPET_ADDRESS_OVERRIDE is not set
-CONFIG_HPET_ADDRESS=0xfed00000
-CONFIG_ID_SECTION_OFFSET=0x80
-# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
-# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
-CONFIG_ACPI_HAVE_PCAT_8259=y
-# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
-# CONFIG_IDT_IN_EVERY_STAGE is not set
-# CONFIG_PIRQ_ROUTE is not set
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
-CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
-# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
-CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
-# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_SMBUS_HAS_AUX_CHANNELS=y
-CONFIG_PCI=y
-# CONFIG_NO_MMCONF_SUPPORT is not set
-CONFIG_MMCONF_SUPPORT=y
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_VGA_BIOS_DGPU=y
-CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
-CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
-# CONFIG_SOFTWARE_I2C is not set
-
-#
-# Generic Drivers
-#
-# CONFIG_DRIVERS_AS3722_RTC is not set
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
-# CONFIG_GIC is not set
-CONFIG_IPMI_KCS=y
-CONFIG_IPMI_KCS_TIMEOUT_MS=5000
-# CONFIG_DRIVERS_LENOVO_WACOM is not set
-# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
-# CONFIG_RT8168_SET_LED_MODE is not set
-# CONFIG_SMMSTORE_IN_CBFS is not set
-CONFIG_SPI_FLASH=y
-# CONFIG_SPI_SDCARD is not set
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
-# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
-# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
-# CONFIG_NO_UART_ON_SUPERIO is not set
-# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
-# CONFIG_UART_OVERRIDE_REFCLK is not set
-# CONFIG_DRIVERS_UART_8250MEM is not set
-# CONFIG_DRIVERS_UART_8250MEM_32 is not set
-# CONFIG_HAVE_UART_SPECIAL is not set
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-# CONFIG_DRIVERS_UART_PL011 is not set
-# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_WIFI is not set
-# CONFIG_DRIVERS_AMD_PI is not set
-CONFIG_DRIVERS_ASPEED_AST2050=y
-CONFIG_DRIVERS_ASPEED_AST_COMMON=y
-# CONFIG_DRIVERS_I2C_MAX98373 is not set
-# CONFIG_DRIVERS_I2C_MAX98927 is not set
-# CONFIG_DRIVERS_I2C_PCA9538 is not set
-# CONFIG_DRIVERS_I2C_PCF8523 is not set
-# CONFIG_DRIVERS_I2C_PTN3460 is not set
-# CONFIG_DRIVERS_I2C_RT1011 is not set
-# CONFIG_DRIVERS_I2C_RT5663 is not set
-# CONFIG_DRIVERS_I2C_RTD2132 is not set
-# CONFIG_DRIVERS_I2C_RX6110SA is not set
-# CONFIG_DRIVERS_I2C_SX9310 is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
-CONFIG_DRIVERS_I2C_W83795=y
-# CONFIG_PLATFORM_USES_FSP1_0 is not set
-# CONFIG_PLATFORM_USES_FSP2_0 is not set
-# CONFIG_PLATFORM_USES_FSP2_1 is not set
-# CONFIG_INTEL_DDI is not set
-# CONFIG_INTEL_EDID is not set
-# CONFIG_INTEL_INT15 is not set
-# CONFIG_INTEL_GMA_ACPI is not set
-# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
-# CONFIG_INTEL_GMA_SWSMISCI is not set
-# CONFIG_DRIVER_INTEL_I210 is not set
-# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
-# CONFIG_HAVE_INTEL_PTT is not set
-# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
-# CONFIG_DRIVER_MAXIM_MAX77686 is not set
-# CONFIG_DRIVER_PARADE_PS8625 is not set
-# CONFIG_DRIVER_PARADE_PS8640 is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_LPC_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_MAINBOARD_HAS_LPC_TPM=y
-CONFIG_VGA=y
-# CONFIG_DRIVERS_RICOH_RCE822 is not set
-# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
-# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
-# CONFIG_DRIVERS_SIL_3114 is not set
-# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
-# CONFIG_DRIVER_TI_TPS65090 is not set
-# CONFIG_DRIVERS_TI_TPS65913 is not set
-# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
-# CONFIG_DRIVERS_USB_ACPI is not set
-# CONFIG_COMMONLIB_STORAGE is not set
-
-#
-# Security
-#
-
-#
-# Verified Boot (vboot)
-#
-
-#
-# Trusted Platform Module
-#
-CONFIG_USER_NO_TPM=y
-# CONFIG_USER_TPM1 is not set
-# CONFIG_USER_TPM2 is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-
-#
-# Memory initialization
-#
-# CONFIG_STM is not set
-# CONFIG_ACPI_SATA_GENERATOR is not set
-# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
-# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
-# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
-# CONFIG_RTC is not set
-
-#
-# Console
-#
-CONFIG_SQUELCH_EARLY_SMP=y
-CONFIG_CONSOLE_SERIAL=y
-
-#
-# I/O mapped, 8250-compatible
-#
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_BAUD=115200
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-CONFIG_HWBASE_DEBUG_CB=y
-CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
-CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
-CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
-# CONFIG_NO_MONOTONIC_TIMER is not set
-CONFIG_HAVE_MONOTONIC_TIMER=y
-# CONFIG_TIMER_QUEUE is not set
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_PCI_IO_CFG_EXT=y
-CONFIG_IOAPIC=y
-# CONFIG_USE_WATCHDOG_ON_BOOT is not set
-# CONFIG_GFXUMA is not set
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_HAVE_MP_TABLE=y
-CONFIG_HAVE_PIRQ_TABLE=y
-# CONFIG_COMMON_FADT is not set
-# CONFIG_ACPI_NHLT is not set
-
-#
-# System tables
-#
-CONFIG_GENERATE_MP_TABLE=y
-CONFIG_GENERATE_PIRQ_TABLE=y
-CONFIG_GENERATE_SMBIOS_TABLES=y
-# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BAYOU is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-CONFIG_HAVE_DEBUG_CAR=y
-# CONFIG_DEBUG_CAR is not set
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_RAM_SETUP=y
-# CONFIG_DEBUG_RAM_SETUP is not set
-# CONFIG_DEBUG_PIRQ is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_IPMI is not set
-# CONFIG_TRACE is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_HAVE_EM100_SUPPORT is not set
-CONFIG_ENABLE_APIC_EXT_ID=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
-# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
-# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
-# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
-# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
-# CONFIG_REG_SCRIPT is not set
-# CONFIG_NO_XIP_EARLY_STAGES is not set
-# CONFIG_EARLY_CBMEM_LIST is not set
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_NO_STAGE_CACHE=y
-CONFIG_BOOTBLOCK_CUSTOM=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/kgpe_d16_udimm_16mb/target.cfg b/config/coreboot/kgpe_d16_udimm_16mb/target.cfg
deleted file mode 100644
index 259dbb9b..00000000
--- a/config/coreboot/kgpe_d16_udimm_16mb/target.cfg
+++ /dev/null
@@ -1,10 +0,0 @@
-tree="fam15h_udimm"
-xtree="fam15h_rdimm"
-xarch="i386-elf"
-payload_seabios="y"
-payload_grub="y"
-payload_memtest="y"
-xlang="c"
-grub_scan_disk="nvme ahci"
-grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kgpe_d16_udimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kgpe_d16_udimm_2mb/config/libgfxinit_txtmode
deleted file mode 100644
index 060966a5..00000000
--- a/config/coreboot/kgpe_d16_udimm_2mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,713 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_NO_RELOCATABLE_RAMSTAGE=y
-# CONFIG_RELOCATABLE_RAMSTAGE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_ADI is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_ADVANSUS is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-CONFIG_VENDOR_ASUS=y
-# CONFIG_VENDOR_AVALUE is not set
-# CONFIG_VENDOR_BAP is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_ELMEX is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_ESD is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IEI is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_JETWAY is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIPPERT is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_TYAN is not set
-# CONFIG_VENDOR_UP is not set
-# CONFIG_VENDOR_VIA is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_DIR="asus/kgpe-d16"
-CONFIG_MAINBOARD_PART_NUMBER="KGPE-D16"
-CONFIG_MAX_CPUS=32
-CONFIG_CBFS_SIZE=0x200000
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_MAINBOARD_VENDOR="ASUS"
-CONFIG_APIC_ID_OFFSET=0x0
-CONFIG_HW_MEM_HOLE_SIZEK=0x100000
-CONFIG_MAX_PHYSICAL_CPUS=4
-CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
-CONFIG_HT_CHAIN_UNITID_BASE=0x0
-CONFIG_IRQ_SLOT_COUNT=13
-CONFIG_VGA_BIOS_ID="1000,0072"
-CONFIG_ONBOARD_VGA_IS_PRIMARY=y
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_VGA_BIOS=y
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-CONFIG_VGA_BIOS_FILE="/dev/null"
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
-CONFIG_DEVICETREE="devicetree.cb"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-# CONFIG_BOARD_ASUS_AM1I_A is not set
-# CONFIG_BOARD_ASUS_F2A85_M is not set
-# CONFIG_BOARD_ASUS_F2A85_M_PRO is not set
-# CONFIG_BOARD_ASUS_F2A85_M_LE is not set
-# CONFIG_BOARD_ASUS_H61M_CS is not set
-# CONFIG_BOARD_ASUS_KCMA_D8 is not set
-# CONFIG_BOARD_ASUS_KFSN4_DRE is not set
-CONFIG_BOARD_ASUS_KGPE_D16=y
-# CONFIG_BOARD_ASUS_M4A78_EM is not set
-# CONFIG_BOARD_ASUS_M4A785M is not set
-# CONFIG_BOARD_ASUS_M4A785TM is not set
-# CONFIG_BOARD_ASUS_M5A88_V is not set
-# CONFIG_BOARD_ASUS_MAXIMUS_IV_GENE_Z is not set
-# CONFIG_BOARD_ASUS_P2B_D is not set
-# CONFIG_BOARD_ASUS_P2B_DS is not set
-# CONFIG_BOARD_ASUS_P2B_F is not set
-# CONFIG_BOARD_ASUS_P2B_LS is not set
-# CONFIG_BOARD_ASUS_P2B is not set
-# CONFIG_BOARD_ASUS_P3B_F is not set
-# CONFIG_BOARD_ASUS_P5GC_MX is not set
-# CONFIG_BOARD_ASUS_P5QC is not set
-# CONFIG_BOARD_ASUS_P5Q_PRO is not set
-# CONFIG_BOARD_ASUS_P5QL_PRO is not set
-# CONFIG_BOARD_ASUS_P5QL_EM is not set
-# CONFIG_BOARD_ASUS_P5QPL_AM is not set
-# CONFIG_BOARD_ASUS_P5G41T_M_LX is not set
-# CONFIG_BOARD_ASUS_P8H61_M_LX is not set
-# CONFIG_BOARD_ASUS_P8H61_M_PRO is not set
-# CONFIG_BOARD_ASUS_P8Z77_M_PRO is not set
-CONFIG_POST_IO=y
-CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kgpe-d16/bootblock.c"
-CONFIG_DCACHE_RAM_BASE=0xc2000
-CONFIG_DCACHE_RAM_SIZE=0x1e000
-CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f
-CONFIG_MAX_REBOOT_CNT=10
-CONFIG_OVERRIDE_DEVICETREE=""
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_FMDFILE=""
-# CONFIG_VBOOT is not set
-CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
-CONFIG_POST_DEVICE=y
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_DIMM_MAX=4
-CONFIG_TPM_PIRQ=0x0
-CONFIG_TTYS0_LCS=3
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KGPE-D16"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-# CONFIG_USBDEBUG is not set
-CONFIG_IPMI_KCS_REGISTER_SPACING=1
-CONFIG_IPMI_FRU_SINGLE_RW_SZ=16
-CONFIG_MAINBOARD_VERSION="1.0"
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_PCIEXP_L1_SUB_STATE=y
-# CONFIG_NO_POST is not set
-CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
-CONFIG_HEAP_SIZE=0xc0000
-# CONFIG_CONSOLE_POST is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_BOARD_ROMSIZE_KB_2048=y
-# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_2048=y
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=2048
-CONFIG_ROM_SIZE=0x200000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
-CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
-# CONFIG_SYSTEM_TYPE_LAPTOP is not set
-# CONFIG_SYSTEM_TYPE_TABLET is not set
-# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
-# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
-# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_CPU_ADDR_BITS=48
-CONFIG_MMCONF_BUS_NUMBER=256
-CONFIG_EHCI_BAR=0xfef00000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
-# CONFIG_SOC_CAVIUM_CN81XX is not set
-CONFIG_ARCH_ARMV8_EXTENSION=0
-CONFIG_STACK_SIZE=0x1000
-# CONFIG_SOC_CAVIUM_COMMON is not set
-# CONFIG_SOC_INTEL_GLK is not set
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_TTYS0_BASE=0x3f8
-CONFIG_HPET_MIN_TICKS=0x14
-CONFIG_UART_PCI_ADDR=0x0
-# CONFIG_SOC_MEDIATEK_MT8173 is not set
-# CONFIG_SOC_MEDIATEK_MT8183 is not set
-# CONFIG_SOC_NVIDIA_TEGRA124 is not set
-# CONFIG_SOC_NVIDIA_TEGRA210 is not set
-# CONFIG_SOC_QUALCOMM_COMMON is not set
-# CONFIG_SOC_QC_IPQ40XX is not set
-# CONFIG_SOC_QC_IPQ806X is not set
-# CONFIG_SOC_QUALCOMM_QCS405 is not set
-# CONFIG_SOC_QUALCOMM_SC7180 is not set
-# CONFIG_SOC_QUALCOMM_SDM845 is not set
-# CONFIG_SOC_ROCKCHIP_RK3288 is not set
-# CONFIG_SOC_ROCKCHIP_RK3399 is not set
-# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
-# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
-# CONFIG_SOC_UCB_RISCV is not set
-
-#
-# CPU
-#
-CONFIG_CPU_SOCKET_TYPE=0x15
-# CONFIG_EXT_RT_TBL_SUPPORT is not set
-CONFIG_CBB=0x0
-CONFIG_CDB=0x18
-CONFIG_XIP_ROM_SIZE=0x80000
-CONFIG_CPU_AMD_SOCKET_G34_NON_AGESA=y
-CONFIG_CPU_AMD_MODEL_10XXX=y
-CONFIG_USE_LARGE_DCACHE=y
-CONFIG_NUM_IPI_STARTS=1
-CONFIG_DCACHE_BSP_TOP_STACK_SIZE=0x4000
-CONFIG_DCACHE_BSP_TOP_STACK_SLUSH=0x4000
-CONFIG_DCACHE_AP_STACK_SIZE=0x500
-CONFIG_SET_FIDVID=y
-CONFIG_LIFT_BSP_APIC_ID=y
-CONFIG_SET_FIDVID_DEBUG=y
-CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y
-# CONFIG_SET_FIDVID_CORE0_ONLY is not set
-CONFIG_SET_FIDVID_CORE_RANGE=0
-CONFIG_UDELAY_LAPIC_FIXED_FSB=200
-# CONFIG_CPU_AMD_AGESA is not set
-# CONFIG_CPU_AMD_PI is not set
-# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
-CONFIG_SSE2=y
-# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
-# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
-# CONFIG_CPU_TI_AM335X is not set
-CONFIG_PARALLEL_CPU_INIT=y
-# CONFIG_PARALLEL_MP is not set
-CONFIG_UDELAY_LAPIC=y
-# CONFIG_LAPIC_MONOTONIC_TIMER is not set
-# CONFIG_UDELAY_TSC is not set
-CONFIG_TSC_SYNC_LFENCE=y
-# CONFIG_TSC_SYNC_MFENCE is not set
-# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
-CONFIG_LOGICAL_CPUS=y
-# CONFIG_HAVE_SMI_HANDLER is not set
-# CONFIG_NO_SMM is not set
-# CONFIG_SMM_ASEG is not set
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
-CONFIG_SMM_STUB_STACK_SIZE=0x400
-# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
-# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
-CONFIG_X86_AMD_FIXED_MTRRS=y
-# CONFIG_X86_AMD_INIT_SIPI is not set
-# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
-# CONFIG_SOC_SETS_MSRS is not set
-CONFIG_CAR_GLOBAL_MIGRATION=y
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-# CONFIG_USES_MICROCODE_HEADER_FILES is not set
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-CONFIG_CPU_MICROCODE_MULTIPLE_FILES=y
-
-#
-# Northbridge
-#
-# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
-CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y
-CONFIG_AGP_APERTURE_SIZE=0x4000000
-CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c"
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y
-# CONFIG_HT_CHAIN_DISTRIBUTE is not set
-# CONFIG_DIMM_DDR2 is not set
-CONFIG_DIMM_DDR3=y
-CONFIG_DIMM_REGISTERED=y
-CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y
-# CONFIG_SVI_HIGH_FREQ is not set
-
-#
-# HyperTransport setup
-#
-# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set
-CONFIG_LIMIT_HT_DOWN_WIDTH_16=y
-# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set
-CONFIG_LIMIT_HT_UP_WIDTH_16=y
-# CONFIG_NORTHBRIDGE_AMD_PI is not set
-
-#
-# Southbridge
-#
-CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
-CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
-# CONFIG_AMD_SB_CIMX is not set
-# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
-# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
-CONFIG_SOUTHBRIDGE_AMD_SB700=y
-CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
-CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
-# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set
-CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y
-CONFIG_SOUTHBRIDGE_AMD_SR5650=y
-CONFIG_EXT_CONF_SUPPORT=y
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
-# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
-# CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE is not set
-
-#
-# Super I/O
-#
-# CONFIG_SUPERIO_ASPEED_AST2400 is not set
-# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
-# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
-# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
-CONFIG_SUPERIO_WINBOND_COMMON_PRE_RAM=y
-CONFIG_SUPERIO_WINBOND_W83667HG_A=y
-
-#
-# Embedded Controllers
-#
-# CONFIG_EC_GOOGLE_WILCO is not set
-# CONFIG_CAVIUM_BDK is not set
-# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
-# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
-# CONFIG_UEFI_2_4_BINDING is not set
-# CONFIG_UDK_2015_BINDING is not set
-# CONFIG_UDK_2017_BINDING is not set
-# CONFIG_USE_SIEMENS_HWILIB is not set
-# CONFIG_ARM_LPAE is not set
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-# CONFIG_ARCH_POSTCAR_X86_32 is not set
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
-# CONFIG_ARCH_VERSTAGE_X86_64 is not set
-# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
-# CONFIG_ARCH_POSTCAR_X86_64 is not set
-# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
-# CONFIG_USE_MARCH_586 is not set
-# CONFIG_AP_IN_SIPI_WAIT is not set
-# CONFIG_SIPI_VECTOR_IN_ROM is not set
-CONFIG_RAMBASE=0xe00000
-CONFIG_RAMTOP=0x1000000
-# CONFIG_CBMEM_TOP_BACKUP is not set
-CONFIG_PC80_SYSTEM=y
-# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
-# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
-# CONFIG_HPET_ADDRESS_OVERRIDE is not set
-CONFIG_HPET_ADDRESS=0xfed00000
-CONFIG_ID_SECTION_OFFSET=0x80
-# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
-# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
-CONFIG_ACPI_HAVE_PCAT_8259=y
-# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
-# CONFIG_IDT_IN_EVERY_STAGE is not set
-# CONFIG_PIRQ_ROUTE is not set
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
-CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
-# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
-CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
-# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_SMBUS_HAS_AUX_CHANNELS=y
-CONFIG_PCI=y
-# CONFIG_NO_MMCONF_SUPPORT is not set
-CONFIG_MMCONF_SUPPORT=y
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_VGA_BIOS_DGPU=y
-CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
-CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
-# CONFIG_SOFTWARE_I2C is not set
-
-#
-# Generic Drivers
-#
-# CONFIG_DRIVERS_AS3722_RTC is not set
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
-# CONFIG_GIC is not set
-CONFIG_IPMI_KCS=y
-CONFIG_IPMI_KCS_TIMEOUT_MS=5000
-# CONFIG_DRIVERS_LENOVO_WACOM is not set
-# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
-# CONFIG_RT8168_SET_LED_MODE is not set
-# CONFIG_SMMSTORE_IN_CBFS is not set
-CONFIG_SPI_FLASH=y
-# CONFIG_SPI_SDCARD is not set
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
-# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
-# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
-# CONFIG_NO_UART_ON_SUPERIO is not set
-# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
-# CONFIG_UART_OVERRIDE_REFCLK is not set
-# CONFIG_DRIVERS_UART_8250MEM is not set
-# CONFIG_DRIVERS_UART_8250MEM_32 is not set
-# CONFIG_HAVE_UART_SPECIAL is not set
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-# CONFIG_DRIVERS_UART_PL011 is not set
-# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_WIFI is not set
-# CONFIG_DRIVERS_AMD_PI is not set
-CONFIG_DRIVERS_ASPEED_AST2050=y
-CONFIG_DRIVERS_ASPEED_AST_COMMON=y
-# CONFIG_DRIVERS_I2C_MAX98373 is not set
-# CONFIG_DRIVERS_I2C_MAX98927 is not set
-# CONFIG_DRIVERS_I2C_PCA9538 is not set
-# CONFIG_DRIVERS_I2C_PCF8523 is not set
-# CONFIG_DRIVERS_I2C_PTN3460 is not set
-# CONFIG_DRIVERS_I2C_RT1011 is not set
-# CONFIG_DRIVERS_I2C_RT5663 is not set
-# CONFIG_DRIVERS_I2C_RTD2132 is not set
-# CONFIG_DRIVERS_I2C_RX6110SA is not set
-# CONFIG_DRIVERS_I2C_SX9310 is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
-CONFIG_DRIVERS_I2C_W83795=y
-# CONFIG_PLATFORM_USES_FSP1_0 is not set
-# CONFIG_PLATFORM_USES_FSP2_0 is not set
-# CONFIG_PLATFORM_USES_FSP2_1 is not set
-# CONFIG_INTEL_DDI is not set
-# CONFIG_INTEL_EDID is not set
-# CONFIG_INTEL_INT15 is not set
-# CONFIG_INTEL_GMA_ACPI is not set
-# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
-# CONFIG_INTEL_GMA_SWSMISCI is not set
-# CONFIG_DRIVER_INTEL_I210 is not set
-# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
-# CONFIG_HAVE_INTEL_PTT is not set
-# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
-# CONFIG_DRIVER_MAXIM_MAX77686 is not set
-# CONFIG_DRIVER_PARADE_PS8625 is not set
-# CONFIG_DRIVER_PARADE_PS8640 is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_LPC_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_MAINBOARD_HAS_LPC_TPM=y
-CONFIG_VGA=y
-# CONFIG_DRIVERS_RICOH_RCE822 is not set
-# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
-# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
-# CONFIG_DRIVERS_SIL_3114 is not set
-# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
-# CONFIG_DRIVER_TI_TPS65090 is not set
-# CONFIG_DRIVERS_TI_TPS65913 is not set
-# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
-# CONFIG_DRIVERS_USB_ACPI is not set
-# CONFIG_COMMONLIB_STORAGE is not set
-
-#
-# Security
-#
-
-#
-# Verified Boot (vboot)
-#
-
-#
-# Trusted Platform Module
-#
-CONFIG_USER_NO_TPM=y
-# CONFIG_USER_TPM1 is not set
-# CONFIG_USER_TPM2 is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-
-#
-# Memory initialization
-#
-# CONFIG_STM is not set
-# CONFIG_ACPI_SATA_GENERATOR is not set
-# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
-# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
-# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
-# CONFIG_RTC is not set
-
-#
-# Console
-#
-CONFIG_SQUELCH_EARLY_SMP=y
-CONFIG_CONSOLE_SERIAL=y
-
-#
-# I/O mapped, 8250-compatible
-#
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_BAUD=115200
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-CONFIG_HWBASE_DEBUG_CB=y
-CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
-CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
-CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
-# CONFIG_NO_MONOTONIC_TIMER is not set
-CONFIG_HAVE_MONOTONIC_TIMER=y
-# CONFIG_TIMER_QUEUE is not set
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_PCI_IO_CFG_EXT=y
-CONFIG_IOAPIC=y
-# CONFIG_USE_WATCHDOG_ON_BOOT is not set
-# CONFIG_GFXUMA is not set
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_HAVE_MP_TABLE=y
-CONFIG_HAVE_PIRQ_TABLE=y
-# CONFIG_COMMON_FADT is not set
-# CONFIG_ACPI_NHLT is not set
-
-#
-# System tables
-#
-CONFIG_GENERATE_MP_TABLE=y
-CONFIG_GENERATE_PIRQ_TABLE=y
-CONFIG_GENERATE_SMBIOS_TABLES=y
-# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BAYOU is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-CONFIG_HAVE_DEBUG_CAR=y
-# CONFIG_DEBUG_CAR is not set
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_RAM_SETUP=y
-# CONFIG_DEBUG_RAM_SETUP is not set
-# CONFIG_DEBUG_PIRQ is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_IPMI is not set
-# CONFIG_TRACE is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_HAVE_EM100_SUPPORT is not set
-CONFIG_ENABLE_APIC_EXT_ID=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
-# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
-# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
-# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
-# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
-# CONFIG_REG_SCRIPT is not set
-# CONFIG_NO_XIP_EARLY_STAGES is not set
-# CONFIG_EARLY_CBMEM_LIST is not set
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_NO_STAGE_CACHE=y
-CONFIG_BOOTBLOCK_CUSTOM=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/kgpe_d16_udimm_2mb/target.cfg b/config/coreboot/kgpe_d16_udimm_2mb/target.cfg
deleted file mode 100644
index 259dbb9b..00000000
--- a/config/coreboot/kgpe_d16_udimm_2mb/target.cfg
+++ /dev/null
@@ -1,10 +0,0 @@
-tree="fam15h_udimm"
-xtree="fam15h_rdimm"
-xarch="i386-elf"
-payload_seabios="y"
-payload_grub="y"
-payload_memtest="y"
-xlang="c"
-grub_scan_disk="nvme ahci"
-grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/submodule/coreboot/fam15h_rdimm/acpica-unix2-20190703.tar.gz/module.cfg b/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg
similarity index 100%
rename from config/submodule/coreboot/fam15h_rdimm/acpica-unix2-20190703.tar.gz/module.cfg
rename to config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg
diff --git a/config/submodule/coreboot/fam15h_rdimm/binutils-2.32.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg
similarity index 100%
rename from config/submodule/coreboot/fam15h_rdimm/binutils-2.32.tar.xz/module.cfg
rename to config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg
diff --git a/config/submodule/coreboot/fam15h_rdimm/blobs/module.cfg b/config/submodule/coreboot/fam15h/blobs/module.cfg
similarity index 100%
rename from config/submodule/coreboot/fam15h_rdimm/blobs/module.cfg
rename to config/submodule/coreboot/fam15h/blobs/module.cfg
diff --git a/config/submodule/coreboot/fam15h_rdimm/gcc-8.3.0.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg
similarity index 100%
rename from config/submodule/coreboot/fam15h_rdimm/gcc-8.3.0.tar.xz/module.cfg
rename to config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg
diff --git a/config/submodule/coreboot/fam15h_rdimm/gmp-6.1.2.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg
similarity index 100%
rename from config/submodule/coreboot/fam15h_rdimm/gmp-6.1.2.tar.xz/module.cfg
rename to config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg
diff --git a/config/submodule/coreboot/fam15h_rdimm/module.list b/config/submodule/coreboot/fam15h/module.list
similarity index 100%
rename from config/submodule/coreboot/fam15h_rdimm/module.list
rename to config/submodule/coreboot/fam15h/module.list
diff --git a/config/submodule/coreboot/fam15h_rdimm/mpc-1.1.0.tar.gz/module.cfg b/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg
similarity index 100%
rename from config/submodule/coreboot/fam15h_rdimm/mpc-1.1.0.tar.gz/module.cfg
rename to config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg
diff --git a/config/submodule/coreboot/fam15h_rdimm/mpfr-4.0.2.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg
similarity index 100%
rename from config/submodule/coreboot/fam15h_rdimm/mpfr-4.0.2.tar.xz/module.cfg
rename to config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg
diff --git a/config/submodule/coreboot/fam15h_rdimm/nasm-2.14.02.tar.bz2/module.cfg b/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg
similarity index 100%
rename from config/submodule/coreboot/fam15h_rdimm/nasm-2.14.02.tar.bz2/module.cfg
rename to config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg
diff --git a/config/submodule/coreboot/fam15h_rdimm/vboot/module.cfg b/config/submodule/coreboot/fam15h/vboot/module.cfg
similarity index 100%
rename from config/submodule/coreboot/fam15h_rdimm/vboot/module.cfg
rename to config/submodule/coreboot/fam15h/vboot/module.cfg
diff --git a/config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/fam15h/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
similarity index 100%
rename from config/submodule/coreboot/fam15h_rdimm/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
rename to config/submodule/coreboot/fam15h/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
diff --git a/config/submodule/coreboot/fam15h_udimm/blobs/module.cfg b/config/submodule/coreboot/fam15h_udimm/blobs/module.cfg
deleted file mode 100644
index 215caf4d..00000000
--- a/config/submodule/coreboot/fam15h_udimm/blobs/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/blobs.git"
-subrepo_bkup="https://github.com/coreboot/blobs"
-subhash="034b27818450428f70aa9316c8bd0d65bacd8ee8"
diff --git a/config/submodule/coreboot/fam15h_udimm/module.list b/config/submodule/coreboot/fam15h_udimm/module.list
deleted file mode 100644
index de2154e6..00000000
--- a/config/submodule/coreboot/fam15h_udimm/module.list
+++ /dev/null
@@ -1,2 +0,0 @@
-3rdparty/blobs
-3rdparty/vboot
diff --git a/config/submodule/coreboot/fam15h_udimm/vboot/module.cfg b/config/submodule/coreboot/fam15h_udimm/vboot/module.cfg
deleted file mode 100644
index 5fac75c3..00000000
--- a/config/submodule/coreboot/fam15h_udimm/vboot/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/vboot.git"
-subrepo_bkup="https://github.com/coreboot/vboot"
-subhash="ecdca931ae0637d1a9498f64862939bd5bb99e0b"
diff --git a/config/submodule/coreboot/fam15h_udimm/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/fam15h_udimm/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
deleted file mode 100644
index 1ac41de6..00000000
--- a/config/submodule/coreboot/fam15h_udimm/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
+++ /dev/null
@@ -1,178 +0,0 @@
-From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
-From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
-Date: Thu, 30 May 2024 14:08:33 -0600
-Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
- vmlinuz_header_{offset,size}
-
-The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
-wrong:
-
-	if (!vmlinuz_header_size ||
-	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
-	    kpart_data) {
-		return 1;
-	}
-
-`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
-unless something has overflowed!  And `vmlinuz_header_offset` hasn't even
-been set yet (besides being initialized to zero)!
-
-GCC will deduce that if the check didn't cause the function to bail, then
-vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
-[2GiB,4GiB).
-
-On platforms where size_t is 32-bits, this is *especially* broken.
-memcpy's size argument must be in the range [0,2GiB).  Because GCC has
-proved that vmlinuz_header_size is higher than that, it will fail to
-compile:
-
-	host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
-
-So, fix the check.
-
-I can now say that what I suspect the original author meant to write would
-be the following patch, if `vmlinuz_header_offset` were already set:
-
-	-kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
-	+now        + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
-
-This hypothesis is supported by `now` not getting incremented by
-`kblob_size` the way it is for the keyblock and preamble sizes.
-
-However, we can also see that even this "corrected" bounds check is
-insufficient: it does not detect the vmlinuz_header overflowing into
-kblob_data.
-
-OK, so let's describe the fix:
-
-Have a `*vmlinuz_header` pointer instead of a
-`uint64_t vmlinuz_header_offset`, to be more similar to all the other
-regions.  With this change, the correct check becomes a simple
-
-      vmlinuz_header + vmlinuz_header_size > kblob_data
-
-While we're at it, make some changes that could have helped avoid this in
-the first place:
-
- - Add comments.
- - Calculate the vmlinuz_header offset right away, instead of waiting.
- - Go ahead and increment `now` by `kblob_size`, to increase regularity.
-
-Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
----
- host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
- 1 file changed, 51 insertions(+), 21 deletions(-)
-
-diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
-index 4ccfcf33..d2c09443 100644
---- a/host/lib/extract_vmlinuz.c
-+++ b/host/lib/extract_vmlinuz.c
-@@ -15,16 +15,44 @@
- 
- int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
- 		   void **vmlinuz_out, size_t *vmlinuz_size) {
-+	// We're going to be extracting `vmlinuz_header` and
-+	// `kblob_data`, and returning the concatenation of them.
-+	//
-+	// kpart_data = +-[kpart_size]------------------------------------+
-+	//              |                                                 |
-+	//  keyblock  = | +-[keyblock->keyblock_size]-------------------+ |
-+	//              | | struct vb2_keyblock          keyblock       | |
-+	//              | | char []                      ...data...     | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//  preamble  = | +-[preamble->preamble_size]-------------------+ |
-+	//              | | struct vb2_kernel_preamble   preamble       | |
-+	//              | | char []                       ...data...    | |
-+	//              | | char []                      vmlinuz_header | |
-+	//              | | char []                       ...data...    | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//  kblob_data= | +-[preamble->body_signature.data_size]--------+ |
-+	//              | | char []                       ...data...    | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//              +-------------------------------------------------+
-+
- 	size_t now = 0;
-+	// The 3 sections of kpart_data.
-+	struct vb2_keyblock *keyblock = NULL;
- 	struct vb2_kernel_preamble *preamble = NULL;
- 	uint8_t *kblob_data = NULL;
- 	uint32_t kblob_size = 0;
-+	// vmlinuz_header
-+	uint8_t *vmlinuz_header = NULL;
- 	uint32_t vmlinuz_header_size = 0;
--	uint64_t vmlinuz_header_address = 0;
--	uint64_t vmlinuz_header_offset = 0;
-+	// The concatenated result.
- 	void *vmlinuz = NULL;
- 
--	struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
-+	// Isolate the 3 sections of kpart_data.
-+
-+	keyblock = (struct vb2_keyblock *)kpart_data;
- 	now += keyblock->keyblock_size;
- 	if (now > kpart_size)
- 		return 1;
-@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
- 
- 	kblob_data = kpart_data + now;
- 	kblob_size = preamble->body_signature.data_size;
--
--	if (!kblob_data || (now + kblob_size) > kpart_size)
-+	now += kblob_size;
-+	if (now > kpart_size)
- 		return 1;
- 
-+	// Find `vmlinuz_header` within `preamble`.
-+
- 	if (preamble->header_version_minor > 0) {
--		vmlinuz_header_address = preamble->vmlinuz_header_address;
-+		// calculate the vmlinuz_header offset from
-+		// the beginning of the kpart_data.  The kblob doesn't
-+		// include the body_load_offset, but does include
-+		// the keyblock and preamble sections.
-+		size_t vmlinuz_header_offset =
-+			preamble->vmlinuz_header_address -
-+			preamble->body_load_address +
-+			keyblock->keyblock_size +
-+			preamble->preamble_size;
-+
-+		vmlinuz_header = kpart_data + vmlinuz_header_offset;
- 		vmlinuz_header_size = preamble->vmlinuz_header_size;
- 	}
- 
--	if (!vmlinuz_header_size ||
--	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
--	    kpart_data) {
-+	if (!vmlinuz_header ||
-+	    !vmlinuz_header_size ||
-+	    vmlinuz_header + vmlinuz_header_size > kblob_data) {
- 		return 1;
- 	}
- 
--	// calculate the vmlinuz_header offset from
--	// the beginning of the kpart_data.  The kblob doesn't
--	// include the body_load_offset, but does include
--	// the keyblock and preamble sections.
--	vmlinuz_header_offset = vmlinuz_header_address -
--		preamble->body_load_address +
--		keyblock->keyblock_size +
--		preamble->preamble_size;
-+	// Concatenate and return.
- 
- 	vmlinuz = malloc(vmlinuz_header_size + kblob_size);
- 	if (vmlinuz == NULL)
- 		return 1;
--
--	memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
--	       vmlinuz_header_size);
--
-+	memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
- 	memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
- 
- 	*vmlinuz_out = vmlinuz;
--- 
-2.45.1
-

From 5b353a229066d1d440c8e9df9121468d53a08964 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 11 Aug 2024 16:11:31 +0100
Subject: [PATCH 0804/1549] grub/*: Bump to rev b53ec06a1 (2024-06-17)

Of note: upstream has made several improvements to memory
management, and several fixes to file systems.

User-friendly change to LUKS: if the passphrase input failed,
the user is prompted again for the correct passphrase, instead
of GRUB just failing. Similar to cryptsetup luksOpen behaviour
under Linux.

This pulls in the following changes from upstream (gnu.org):

* b53ec06a1 util/grub-mkrescue: Check existence of option arguments
* ab9fe8030 loader/efi/fdt: Add fdtdump command to access device tree
* 0cfec355d osdep/devmapper/getroot: Unmark 2 strings for translation
* f171122f0 loader/emu/linux: Fix determination of program name
* 828717833 disk/cryptodisk: Fix translatable message
* 9a2134a70 tests: Add test for ZFS zstd
* f96df6fe9 fs/zfs/zfs: Add support for zstd compression
* 55d35d628 kern/efi/mm: Detect calls to grub_efi_drop_alloc() with wrong page counts
* 61f1d0a61 kern/efi/mm: Change grub_efi_allocate_pages_real() to call semantically correct free function
* dc0a3a27d kern/efi/mm: Change grub_efi_mm_add_regions() to keep track of map allocation size
* b990df0be tests/util/grub-fs-tester: Fix EROFS label tests in grub-fs-tester
* d41c64811 tests: Switch to requiring exfatprogs from exfat-utils
* c1ee4da6a tests/util/grub-shell-luks-tester: Fix detached header test getting wrong header path
* c22e052fe tests/util/grub-shell: Add flexibility in QEMU firmware handling
* d2fc9dfcd tests/util/grub-shell: Use pflash instead of -bios to load UEFI firmware
* 88a7e64c2 tests/util/grub-shell: Print gdbinfo if on EFI platform
* b8d29f114 configure: Add Debian/Ubuntu DejaVu font path
* 13b315c0a term/ns8250-spcr: Add one more 16550 debug type
* 8abec8e15 loader/i386/multiboot_mbi: Fix handling of errors in broken aout-kludge
* d35ff2251 net/drivers/ieee1275/ofnet: Remove 200 ms timeout in get_card_packet() to reduce input latency
* 86df79275 commands/efi/tpm: Re-enable measurements on confidential computing platforms
* 0b4d01794 util/grub-mkpasswd-pbkdf2: Simplify the main function implementation
* fa36f6376 kern/ieee1275/init: Add IEEE 1275 Radix support for KVM on Power
* c464f1ec3 fs/zfs/zfs: Mark vdev_zaps_v2 and head_errlog as supported
* 2ffc14ba9 types: Add missing casts in compile-time byteswaps
* c6ac49120 font: Add Fedora-specific font paths
* 5e8989e4e fs/bfs: Fix improper grub_free() on non-existing files
* c806e4dc8 io/gzio: Properly init a table
* 243682baa io/gzio: Abort early when get_byte() reads nothing
* bb65d81fe cli_lock: Add build option to block command line interface
* 56e58828c fs/erofs: Add tests for EROFS in grub-fs-tester
* 9d603061a fs/erofs: Add support for the EROFS
* 1ba39de62 safemath: Add ALIGN_UP_OVF() which checks for an overflow
* d291449ba docs: Fix spelling mistakes
* 6cc2e4481 util/grub.d/00_header.in: Quote background image pathname in output
* f456add5f disk/lvm: GRUB fails to detect LVM volumes due to an incorrect computation of mda_end
* 386b59ddb disk/cryptodisk: Allow user to retry failed passphrase
* 99b4c0c38 disk/mdraid1x_linux: Prevent infinite recursion
* b272ed230 efi: Fix stack protector issues
* 6744840b1 build: Track explicit module dependencies in Makefile.core.def

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...grub-s-missing-characters-for-borders-arrow.patch | 10 +++++-----
 ...002-say-the-name-libreboot-in-the-grub-menu.patch |  8 ++++----
 .../patches}/0003-Add-CC0-license.patch              |  4 ++--
 .../patches}/0004-Define-GRUB_UINT32_MAX.patch       |  6 +++---
 .../{0002-luks2 => }/0005-Add-Argon2-algorithm.patch | 10 +++++-----
 .../0006-Error-on-missing-Argon2id-parameters.patch  |  4 ++--
 .../0007-Compile-with-Argon2id-support.patch         | 10 +++++-----
 .../0008-Make-grub-install-work-with-Argon2.patch    |  6 +++---
 ...yboard-coreboot-force-scancodes2-translate.patch} |  4 ++--
 ...keylayouts-don-t-print-Unknown-key-message.patch} |  4 ++--
 ...-print-missing-prefix-errors-on-the-screen.patch} |  4 ++--
 ...0012-don-t-print-error-if-module-not-found.patch} |  4 ++--
 ...h => 0013-don-t-print-empty-error-messages.patch} |  4 ++--
 config/grub/default/target.cfg                       |  2 +-
 ...grub-s-missing-characters-for-borders-arrow.patch | 10 +++++-----
 ...002-say-the-name-libreboot-in-the-grub-menu.patch |  8 ++++----
 .../{0002-luks2 => }/0003-Add-CC0-license.patch      |  4 ++--
 .../patches}/0004-Define-GRUB_UINT32_MAX.patch       |  6 +++---
 .../{0002-luks2 => }/0005-Add-Argon2-algorithm.patch | 10 +++++-----
 .../0006-Error-on-missing-Argon2id-parameters.patch  |  4 ++--
 .../0007-Compile-with-Argon2id-support.patch         | 10 +++++-----
 .../0008-Make-grub-install-work-with-Argon2.patch    |  6 +++---
 ...yboard-coreboot-force-scancodes2-translate.patch} |  4 ++--
 ...keylayouts-don-t-print-Unknown-key-message.patch} |  4 ++--
 ...-print-missing-prefix-errors-on-the-screen.patch} |  4 ++--
 ...0012-don-t-print-error-if-module-not-found.patch} |  4 ++--
 .../0013-don-t-print-empty-error-messages.patch}     |  4 ++--
 ...14-Add-native-NVMe-driver-based-on-SeaBIOS.patch} | 10 +++++-----
 config/grub/nvme/target.cfg                          |  2 +-
 ...grub-s-missing-characters-for-borders-arrow.patch | 10 +++++-----
 ...002-say-the-name-libreboot-in-the-grub-menu.patch |  8 ++++----
 .../patches}/0003-Add-CC0-license.patch              |  4 ++--
 .../patches}/0004-Define-GRUB_UINT32_MAX.patch       |  6 +++---
 .../{0002-luks2 => }/0005-Add-Argon2-algorithm.patch | 10 +++++-----
 .../0006-Error-on-missing-Argon2id-parameters.patch  |  4 ++--
 .../0007-Compile-with-Argon2id-support.patch         | 10 +++++-----
 .../0008-Make-grub-install-work-with-Argon2.patch    |  6 +++---
 ...yboard-coreboot-force-scancodes2-translate.patch} |  4 ++--
 ...keylayouts-don-t-print-Unknown-key-message.patch} |  4 ++--
 ...-print-missing-prefix-errors-on-the-screen.patch} |  4 ++--
 ...0012-don-t-print-error-if-module-not-found.patch} |  4 ++--
 .../0013-don-t-print-empty-error-messages.patch}     |  4 ++--
 ...bus-usb-Parse-SuperSpeed-companion-descrip.patch} |  5 +++--
 ...r-xHCI.patch => 0015-usb-Add-enum-for-xHCI.patch} |  4 ++--
 ...6-usbtrans-Set-default-maximum-packet-size.patch} |  4 ++--
 ...bus-usb-Add-function-pointer-for-attach-de.patch} |  6 +++---
 ...bus-usb-usbhub-Add-new-private-fields-for-.patch} |  6 +++---
 ...=> 0019-grub-core-bus-usb-Add-xhci-support.patch} |  6 +++---
 ...bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch} |  4 ++--
 ...64.patch => 0021-Fix-compilation-on-x86_64.patch} |  4 ++--
 ...22-Add-native-NVMe-driver-based-on-SeaBIOS.patch} | 12 ++++++------
 config/grub/xhci/target.cfg                          |  2 +-
 52 files changed, 151 insertions(+), 150 deletions(-)
 rename config/grub/default/patches/{0001-borderfix => }/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch (92%)
 rename config/grub/{xhci/patches/0001-borderfix => default/patches}/0002-say-the-name-libreboot-in-the-grub-menu.patch (78%)
 rename config/grub/{xhci/patches/0002-luks2 => default/patches}/0003-Add-CC0-license.patch (94%)
 rename config/grub/{nvme/patches/0002-luks2 => default/patches}/0004-Define-GRUB_UINT32_MAX.patch (89%)
 rename config/grub/default/patches/{0002-luks2 => }/0005-Add-Argon2-algorithm.patch (99%)
 rename config/grub/{xhci/patches/0002-luks2 => default/patches}/0006-Error-on-missing-Argon2id-parameters.patch (94%)
 rename config/grub/{xhci/patches/0002-luks2 => default/patches}/0007-Compile-with-Argon2id-support.patch (92%)
 rename config/grub/default/patches/{0002-luks2 => }/0008-Make-grub-install-work-with-Argon2.patch (79%)
 rename config/grub/{nvme/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch => default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch} (96%)
 rename config/grub/{xhci/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch => default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch} (89%)
 rename config/grub/{xhci/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch => default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch} (96%)
 rename config/grub/{nvme/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch => default/patches/0012-don-t-print-error-if-module-not-found.patch} (89%)
 rename config/grub/default/patches/{0004-prefix/0003-don-t-print-empty-error-messages.patch => 0013-don-t-print-empty-error-messages.patch} (87%)
 rename config/grub/{xhci/patches/0001-borderfix => nvme/patches}/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch (92%)
 rename config/grub/{default/patches/0001-borderfix => nvme/patches}/0002-say-the-name-libreboot-in-the-grub-menu.patch (78%)
 rename config/grub/nvme/patches/{0002-luks2 => }/0003-Add-CC0-license.patch (94%)
 rename config/grub/{xhci/patches/0002-luks2 => nvme/patches}/0004-Define-GRUB_UINT32_MAX.patch (89%)
 rename config/grub/nvme/patches/{0002-luks2 => }/0005-Add-Argon2-algorithm.patch (99%)
 rename config/grub/{default/patches/0002-luks2 => nvme/patches}/0006-Error-on-missing-Argon2id-parameters.patch (94%)
 rename config/grub/nvme/patches/{0002-luks2 => }/0007-Compile-with-Argon2id-support.patch (92%)
 rename config/grub/{xhci/patches/0002-luks2 => nvme/patches}/0008-Make-grub-install-work-with-Argon2.patch (79%)
 rename config/grub/{xhci/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch => nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch} (96%)
 rename config/grub/nvme/patches/{0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch => 0010-keylayouts-don-t-print-Unknown-key-message.patch} (89%)
 rename config/grub/nvme/patches/{0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch => 0011-don-t-print-missing-prefix-errors-on-the-screen.patch} (96%)
 rename config/grub/{xhci/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch => nvme/patches/0012-don-t-print-error-if-module-not-found.patch} (89%)
 rename config/grub/{xhci/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch => nvme/patches/0013-don-t-print-empty-error-messages.patch} (87%)
 rename config/grub/nvme/patches/{0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch => 0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch} (99%)
 rename config/grub/{nvme/patches/0001-borderfix => xhci/patches}/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch (92%)
 rename config/grub/{nvme/patches/0001-borderfix => xhci/patches}/0002-say-the-name-libreboot-in-the-grub-menu.patch (78%)
 rename config/grub/{default/patches/0002-luks2 => xhci/patches}/0003-Add-CC0-license.patch (94%)
 rename config/grub/{default/patches/0002-luks2 => xhci/patches}/0004-Define-GRUB_UINT32_MAX.patch (89%)
 rename config/grub/xhci/patches/{0002-luks2 => }/0005-Add-Argon2-algorithm.patch (99%)
 rename config/grub/{nvme/patches/0002-luks2 => xhci/patches}/0006-Error-on-missing-Argon2id-parameters.patch (94%)
 rename config/grub/{default/patches/0002-luks2 => xhci/patches}/0007-Compile-with-Argon2id-support.patch (92%)
 rename config/grub/{nvme/patches/0002-luks2 => xhci/patches}/0008-Make-grub-install-work-with-Argon2.patch (79%)
 rename config/grub/{default/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch => xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch} (96%)
 rename config/grub/{default/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch => xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch} (89%)
 rename config/grub/{default/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch => xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch} (96%)
 rename config/grub/{default/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch => xhci/patches/0012-don-t-print-error-if-module-not-found.patch} (89%)
 rename config/grub/{nvme/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch => xhci/patches/0013-don-t-print-empty-error-messages.patch} (87%)
 rename config/grub/xhci/patches/{0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch => 0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch} (98%)
 rename config/grub/xhci/patches/{0005-xhci/0002-usb-Add-enum-for-xHCI.patch => 0015-usb-Add-enum-for-xHCI.patch} (86%)
 rename config/grub/xhci/patches/{0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch => 0016-usbtrans-Set-default-maximum-packet-size.patch} (88%)
 rename config/grub/xhci/patches/{0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch => 0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch} (96%)
 rename config/grub/xhci/patches/{0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch => 0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch} (94%)
 rename config/grub/xhci/patches/{0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch => 0019-grub-core-bus-usb-Add-xhci-support.patch} (99%)
 rename config/grub/xhci/patches/{0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch => 0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch} (96%)
 rename config/grub/xhci/patches/{0005-xhci/0008-Fix-compilation-on-x86_64.patch => 0021-Fix-compilation-on-x86_64.patch} (96%)
 rename config/grub/xhci/patches/{0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch => 0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch} (99%)

diff --git a/config/grub/default/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
similarity index 92%
rename from config/grub/default/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
rename to config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
index 183f5a91..7aa0d568 100644
--- a/config/grub/default/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
+++ b/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -1,7 +1,7 @@
-From ce13539fe2103abbd991814d995e06cf96e485f7 Mon Sep 17 00:00:00 2001
+From 8b55c63ab6094bc9017eedd34bd7d0ae3c04cb9c Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 31 Oct 2021 03:47:05 +0000
-Subject: [PATCH 1/3] mitigate grub's missing characters for borders/arrow
+Subject: [PATCH 01/13] mitigate grub's missing characters for borders/arrow
  characters
 
 This cleans up the display on the main screen in GRUB.
@@ -12,7 +12,7 @@ Just don't draw a border, at all.
  1 file changed, 2 insertions(+), 47 deletions(-)
 
 diff --git a/grub-core/normal/menu_text.c b/grub-core/normal/menu_text.c
-index b1321eb26..e76094dfd 100644
+index 9c383e64a..8ec1dd1e8 100644
 --- a/grub-core/normal/menu_text.c
 +++ b/grub-core/normal/menu_text.c
 @@ -108,47 +108,6 @@ grub_print_message_indented (const char *msg, int margin_left, int margin_right,
@@ -76,7 +76,7 @@ index b1321eb26..e76094dfd 100644
        if (!msg_translated)
  	return 0;
        ret += grub_print_message_indented_real (msg_translated, STANDARD_MARGIN,
-@@ -410,8 +367,6 @@ grub_menu_init_page (int nested, int edit,
+@@ -413,8 +370,6 @@ grub_menu_init_page (int nested, int edit,
  
    grub_term_normal_color = grub_color_menu_normal;
    grub_term_highlight_color = grub_color_menu_highlight;
@@ -86,5 +86,5 @@ index b1321eb26..e76094dfd 100644
    grub_term_highlight_color = old_color_highlight;
    geo->timeout_y = geo->first_entry_y + geo->num_entries
 -- 
-2.25.1
+2.39.2
 
diff --git a/config/grub/xhci/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
similarity index 78%
rename from config/grub/xhci/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
rename to config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index b83565fe..f2afa38b 100644
--- a/config/grub/xhci/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -1,14 +1,14 @@
-From 70f9e72c3ff6381fe3519612de3b649c0cf26b9a Mon Sep 17 00:00:00 2001
+From 3b719f8153350f9bfac2cb889d37562cdf566cc8 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 19 Nov 2022 16:30:24 +0000
-Subject: [PATCH 2/3] say the name libreboot, in the grub menu
+Subject: [PATCH 02/13] say the name libreboot, in the grub menu
 
 ---
  grub-core/normal/main.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c
-index bd4431000..31308e16a 100644
+index bd4431000..300f55fe1 100644
 --- a/grub-core/normal/main.c
 +++ b/grub-core/normal/main.c
 @@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term,
@@ -21,5 +21,5 @@ index bd4431000..31308e16a 100644
      return;
  
 -- 
-2.25.1
+2.39.2
 
diff --git a/config/grub/xhci/patches/0002-luks2/0003-Add-CC0-license.patch b/config/grub/default/patches/0003-Add-CC0-license.patch
similarity index 94%
rename from config/grub/xhci/patches/0002-luks2/0003-Add-CC0-license.patch
rename to config/grub/default/patches/0003-Add-CC0-license.patch
index dc9060c3..5795b05c 100644
--- a/config/grub/xhci/patches/0002-luks2/0003-Add-CC0-license.patch
+++ b/config/grub/default/patches/0003-Add-CC0-license.patch
@@ -1,7 +1,7 @@
-From de6e7cc62522ce1be21bd2f06e7c15cd234b5426 Mon Sep 17 00:00:00 2001
+From 09cbe5c71236987605cd375c4f69c6a36401e81c Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 1/6] Add CC0 license
+Subject: [PATCH 03/13] Add CC0 license
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
diff --git a/config/grub/nvme/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch
similarity index 89%
rename from config/grub/nvme/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch
rename to config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch
index be875e67..cb910c85 100644
--- a/config/grub/nvme/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch
+++ b/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch
@@ -1,7 +1,7 @@
-From 9edaaffac91d593a439e44bac3b6f5558f5a8245 Mon Sep 17 00:00:00 2001
+From fb7e3d852bf3658b6e3cf4725c40f2a3eaa56c5b Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 2/6] Define GRUB_UINT32_MAX
+Subject: [PATCH 04/13] Define GRUB_UINT32_MAX
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  1 file changed, 8 insertions(+)
 
 diff --git a/include/grub/types.h b/include/grub/types.h
-index 0d96006fe..a13f3a60b 100644
+index 45079bf65..8c0b30395 100644
 --- a/include/grub/types.h
 +++ b/include/grub/types.h
 @@ -156,6 +156,7 @@ typedef grub_int32_t	grub_ssize_t;
diff --git a/config/grub/default/patches/0002-luks2/0005-Add-Argon2-algorithm.patch b/config/grub/default/patches/0005-Add-Argon2-algorithm.patch
similarity index 99%
rename from config/grub/default/patches/0002-luks2/0005-Add-Argon2-algorithm.patch
rename to config/grub/default/patches/0005-Add-Argon2-algorithm.patch
index 1c6b4f04..1adfdef7 100644
--- a/config/grub/default/patches/0002-luks2/0005-Add-Argon2-algorithm.patch
+++ b/config/grub/default/patches/0005-Add-Argon2-algorithm.patch
@@ -1,7 +1,7 @@
-From 5b63da5c4267933f573ca37ce39a073098c443ba Mon Sep 17 00:00:00 2001
+From 9bc9e32ace3f103ff12aab063c8a250c8ba6a642 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 3/6] Add Argon2 algorithm
+Subject: [PATCH 05/13] Add Argon2 algorithm
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
@@ -30,7 +30,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  create mode 100644 grub-core/lib/argon2/ref.c
 
 diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi
-index a695b02f0..313335a53 100644
+index 1276c5930..cd6fb0e1e 100644
 --- a/docs/grub-dev.texi
 +++ b/docs/grub-dev.texi
 @@ -503,11 +503,75 @@ GRUB includes some code from other projects, and it is sometimes necessary
@@ -110,10 +110,10 @@ index a695b02f0..313335a53 100644
  @section Gnulib
  
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index d2cf29584..4a06789e5 100644
+index 705d73fab..452f11b20 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
-@@ -1215,6 +1215,14 @@ module = {
+@@ -1219,6 +1219,14 @@ module = {
    common = lib/json/json.c;
  };
  
diff --git a/config/grub/xhci/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch
similarity index 94%
rename from config/grub/xhci/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch
rename to config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch
index 5d56bd61..6fb8fca2 100644
--- a/config/grub/xhci/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch
+++ b/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch
@@ -1,7 +1,7 @@
-From 0044d32121bf52c4547c6b3c78f12d7305f57e6b Mon Sep 17 00:00:00 2001
+From 7090ad00b4c3b4a9af3d7e9df245aed5969da79d Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 4/6] Error on missing Argon2id parameters
+Subject: [PATCH 06/13] Error on missing Argon2id parameters
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
diff --git a/config/grub/xhci/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch b/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch
similarity index 92%
rename from config/grub/xhci/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch
rename to config/grub/default/patches/0007-Compile-with-Argon2id-support.patch
index f2e26fd4..65d89c33 100644
--- a/config/grub/xhci/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch
+++ b/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch
@@ -1,7 +1,7 @@
-From 0a21695c55f76f1c958bb633481d55b3168562f7 Mon Sep 17 00:00:00 2001
+From 54bad25f08aab9bae2fbc2122aba9eb678549cc6 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 5/6] Compile with Argon2id support
+Subject: [PATCH 07/13] Compile with Argon2id support
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
@@ -11,7 +11,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  3 files changed, 17 insertions(+), 4 deletions(-)
 
 diff --git a/Makefile.util.def b/Makefile.util.def
-index 1e9a13d3e..a167825c3 100644
+index 0f74a1680..5a15e5637 100644
 --- a/Makefile.util.def
 +++ b/Makefile.util.def
 @@ -3,7 +3,7 @@ AutoGen definitions Makefile.tpl;
@@ -35,10 +35,10 @@ index 1e9a13d3e..a167825c3 100644
    common = grub-core/disk/luks.c;
    common = grub-core/disk/luks2.c;
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index 4a06789e5..e939dcc99 100644
+index 452f11b20..5c1af8682 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
-@@ -1238,7 +1238,7 @@ module = {
+@@ -1242,7 +1242,7 @@ module = {
    common = disk/luks2.c;
    common = lib/gnulib/base64.c;
    cflags = '$(CFLAGS_POSIX) $(CFLAGS_GNULIB)';
diff --git a/config/grub/default/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch
similarity index 79%
rename from config/grub/default/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch
rename to config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch
index dc65b7a6..83c268ed 100644
--- a/config/grub/default/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch
+++ b/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch
@@ -1,7 +1,7 @@
-From 6c9a6625c0dc038d1bdbdc13665f40e269e86496 Mon Sep 17 00:00:00 2001
+From a04a61ac008379d14749b0a1c47a8c9641c9eed5 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 6/6] Make grub-install work with Argon2
+Subject: [PATCH 08/13] Make grub-install work with Argon2
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  1 file changed, 2 insertions(+)
 
 diff --git a/util/grub-install.c b/util/grub-install.c
-index 1ad04db36..a8a3330b8 100644
+index 7dc5657bb..cf7315891 100644
 --- a/util/grub-install.c
 +++ b/util/grub-install.c
 @@ -448,6 +448,8 @@ probe_mods (grub_disk_t disk)
diff --git a/config/grub/nvme/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
similarity index 96%
rename from config/grub/nvme/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
rename to config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
index 21e8630b..2a728537 100644
--- a/config/grub/nvme/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
+++ b/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -1,7 +1,7 @@
-From 96c0bbe5d406b616360a7fce7cee67d7692c0d6d Mon Sep 17 00:00:00 2001
+From 68f1bf73366ee0da82676c076cd9f282f89a888b Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 30 Oct 2023 22:19:21 +0000
-Subject: [PATCH 1/1] at_keyboard coreboot: force scancodes2+translate
+Subject: [PATCH 09/13] at_keyboard coreboot: force scancodes2+translate
 
 Scan code set 2 with translation should be assumed in
 every case, as the default starting position.
diff --git a/config/grub/xhci/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
similarity index 89%
rename from config/grub/xhci/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
rename to config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
index fbef86a4..bd15fdd5 100644
--- a/config/grub/xhci/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
+++ b/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
@@ -1,7 +1,7 @@
-From 0a6abeb40ac4284fbff6ef5958989d561b6290a7 Mon Sep 17 00:00:00 2001
+From c0f2f1b156cbc6f89accf9ce827ae13e8a347969 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 31 Oct 2023 10:33:28 +0000
-Subject: [PATCH 1/1] keylayouts: don't print "Unknown key" message
+Subject: [PATCH 10/13] keylayouts: don't print "Unknown key" message
 
 on keyboards with stuck keys, this results in GRUB just
 spewing it repeatedly, preventing use of GRUB.
diff --git a/config/grub/xhci/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
similarity index 96%
rename from config/grub/xhci/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
rename to config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
index 25091d16..5031474a 100644
--- a/config/grub/xhci/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
+++ b/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -1,7 +1,7 @@
-From 9e7a651a0f15f2e9dec65a77765c3c4fd97b4165 Mon Sep 17 00:00:00 2001
+From 34cab10d16b45938be82705bc8720c76f2aa1542 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:14:58 +0000
-Subject: [PATCH 1/1] don't print missing prefix errors on the screen
+Subject: [PATCH 11/13] don't print missing prefix errors on the screen
 
 we do actually set the prefix. this patch modifies
 grub to still set grub_errno and return accordingly,
diff --git a/config/grub/nvme/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch b/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch
similarity index 89%
rename from config/grub/nvme/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
rename to config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch
index f4cf939e..9184e6fb 100644
--- a/config/grub/nvme/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
+++ b/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch
@@ -1,7 +1,7 @@
-From 6237c5762edccc1e1fa4746b1d4aa5e8d81e4883 Mon Sep 17 00:00:00 2001
+From bf4fbc14d4d9a4612b70531b9678676571a46818 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:36:22 +0000
-Subject: [PATCH 1/1] don't print error if module not found
+Subject: [PATCH 12/13] don't print error if module not found
 
 still set grub_errno accordingly, and otherwise
 behave the same. in libreboot, we remove a lot of
diff --git a/config/grub/default/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch b/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch
similarity index 87%
rename from config/grub/default/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
rename to config/grub/default/patches/0013-don-t-print-empty-error-messages.patch
index 25221c9c..1fc76bcd 100644
--- a/config/grub/default/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
+++ b/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch
@@ -1,7 +1,7 @@
-From e5b7ec81421487e71bcaf8b6b5a27f3649a62753 Mon Sep 17 00:00:00 2001
+From e920aefcca3ad131d0f14d02955c3420fb99ee85 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 17:25:20 +0000
-Subject: [PATCH 1/1] don't print empty error messages
+Subject: [PATCH 13/13] don't print empty error messages
 
 this is part two of the quest to kill the prefix
 error message. after i disabled prefix-related
diff --git a/config/grub/default/target.cfg b/config/grub/default/target.cfg
index e6ed598b..c546b1f9 100644
--- a/config/grub/default/target.cfg
+++ b/config/grub/default/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-rev="8719cc2040368d43ab2de0b6e1b850b2c9cfc5b7"
+rev="b53ec06a1d6f22ffc1139cbfc0f292e4ca2da9cd"
diff --git a/config/grub/xhci/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
similarity index 92%
rename from config/grub/xhci/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
rename to config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
index 183f5a91..b5ab0e5a 100644
--- a/config/grub/xhci/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
+++ b/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -1,7 +1,7 @@
-From ce13539fe2103abbd991814d995e06cf96e485f7 Mon Sep 17 00:00:00 2001
+From b89bf30d11fdc4fdc9bc5350621e73a2fc0d5b89 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 31 Oct 2021 03:47:05 +0000
-Subject: [PATCH 1/3] mitigate grub's missing characters for borders/arrow
+Subject: [PATCH 01/14] mitigate grub's missing characters for borders/arrow
  characters
 
 This cleans up the display on the main screen in GRUB.
@@ -12,7 +12,7 @@ Just don't draw a border, at all.
  1 file changed, 2 insertions(+), 47 deletions(-)
 
 diff --git a/grub-core/normal/menu_text.c b/grub-core/normal/menu_text.c
-index b1321eb26..e76094dfd 100644
+index 9c383e64a..8ec1dd1e8 100644
 --- a/grub-core/normal/menu_text.c
 +++ b/grub-core/normal/menu_text.c
 @@ -108,47 +108,6 @@ grub_print_message_indented (const char *msg, int margin_left, int margin_right,
@@ -76,7 +76,7 @@ index b1321eb26..e76094dfd 100644
        if (!msg_translated)
  	return 0;
        ret += grub_print_message_indented_real (msg_translated, STANDARD_MARGIN,
-@@ -410,8 +367,6 @@ grub_menu_init_page (int nested, int edit,
+@@ -413,8 +370,6 @@ grub_menu_init_page (int nested, int edit,
  
    grub_term_normal_color = grub_color_menu_normal;
    grub_term_highlight_color = grub_color_menu_highlight;
@@ -86,5 +86,5 @@ index b1321eb26..e76094dfd 100644
    grub_term_highlight_color = old_color_highlight;
    geo->timeout_y = geo->first_entry_y + geo->num_entries
 -- 
-2.25.1
+2.39.2
 
diff --git a/config/grub/default/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
similarity index 78%
rename from config/grub/default/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
rename to config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index b83565fe..01a94447 100644
--- a/config/grub/default/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -1,14 +1,14 @@
-From 70f9e72c3ff6381fe3519612de3b649c0cf26b9a Mon Sep 17 00:00:00 2001
+From e074baff4a8ab3a6f8e397b49f6b3eade8728e02 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 19 Nov 2022 16:30:24 +0000
-Subject: [PATCH 2/3] say the name libreboot, in the grub menu
+Subject: [PATCH 02/14] say the name libreboot, in the grub menu
 
 ---
  grub-core/normal/main.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c
-index bd4431000..31308e16a 100644
+index bd4431000..300f55fe1 100644
 --- a/grub-core/normal/main.c
 +++ b/grub-core/normal/main.c
 @@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term,
@@ -21,5 +21,5 @@ index bd4431000..31308e16a 100644
      return;
  
 -- 
-2.25.1
+2.39.2
 
diff --git a/config/grub/nvme/patches/0002-luks2/0003-Add-CC0-license.patch b/config/grub/nvme/patches/0003-Add-CC0-license.patch
similarity index 94%
rename from config/grub/nvme/patches/0002-luks2/0003-Add-CC0-license.patch
rename to config/grub/nvme/patches/0003-Add-CC0-license.patch
index dc9060c3..6434ed21 100644
--- a/config/grub/nvme/patches/0002-luks2/0003-Add-CC0-license.patch
+++ b/config/grub/nvme/patches/0003-Add-CC0-license.patch
@@ -1,7 +1,7 @@
-From de6e7cc62522ce1be21bd2f06e7c15cd234b5426 Mon Sep 17 00:00:00 2001
+From a62b61c5f3fda5a49e007095d79e654603c658d8 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 1/6] Add CC0 license
+Subject: [PATCH 03/14] Add CC0 license
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
diff --git a/config/grub/xhci/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch
similarity index 89%
rename from config/grub/xhci/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch
rename to config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch
index be875e67..310fe8bf 100644
--- a/config/grub/xhci/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch
+++ b/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch
@@ -1,7 +1,7 @@
-From 9edaaffac91d593a439e44bac3b6f5558f5a8245 Mon Sep 17 00:00:00 2001
+From c8c80f05753c26b7d7f5e3c3993039c565194875 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 2/6] Define GRUB_UINT32_MAX
+Subject: [PATCH 04/14] Define GRUB_UINT32_MAX
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  1 file changed, 8 insertions(+)
 
 diff --git a/include/grub/types.h b/include/grub/types.h
-index 0d96006fe..a13f3a60b 100644
+index 45079bf65..8c0b30395 100644
 --- a/include/grub/types.h
 +++ b/include/grub/types.h
 @@ -156,6 +156,7 @@ typedef grub_int32_t	grub_ssize_t;
diff --git a/config/grub/nvme/patches/0002-luks2/0005-Add-Argon2-algorithm.patch b/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch
similarity index 99%
rename from config/grub/nvme/patches/0002-luks2/0005-Add-Argon2-algorithm.patch
rename to config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch
index 1c6b4f04..b26e1f2c 100644
--- a/config/grub/nvme/patches/0002-luks2/0005-Add-Argon2-algorithm.patch
+++ b/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch
@@ -1,7 +1,7 @@
-From 5b63da5c4267933f573ca37ce39a073098c443ba Mon Sep 17 00:00:00 2001
+From d171eb927e33f20627797cdca0dc81a3f3f478e0 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 3/6] Add Argon2 algorithm
+Subject: [PATCH 05/14] Add Argon2 algorithm
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
@@ -30,7 +30,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  create mode 100644 grub-core/lib/argon2/ref.c
 
 diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi
-index a695b02f0..313335a53 100644
+index 1276c5930..cd6fb0e1e 100644
 --- a/docs/grub-dev.texi
 +++ b/docs/grub-dev.texi
 @@ -503,11 +503,75 @@ GRUB includes some code from other projects, and it is sometimes necessary
@@ -110,10 +110,10 @@ index a695b02f0..313335a53 100644
  @section Gnulib
  
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index d2cf29584..4a06789e5 100644
+index 705d73fab..452f11b20 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
-@@ -1215,6 +1215,14 @@ module = {
+@@ -1219,6 +1219,14 @@ module = {
    common = lib/json/json.c;
  };
  
diff --git a/config/grub/default/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch
similarity index 94%
rename from config/grub/default/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch
rename to config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch
index 5d56bd61..98a69414 100644
--- a/config/grub/default/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch
+++ b/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch
@@ -1,7 +1,7 @@
-From 0044d32121bf52c4547c6b3c78f12d7305f57e6b Mon Sep 17 00:00:00 2001
+From 916de62553b3bcc4a565e1ea8f562031fb2a7b0f Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 4/6] Error on missing Argon2id parameters
+Subject: [PATCH 06/14] Error on missing Argon2id parameters
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
diff --git a/config/grub/nvme/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch b/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch
similarity index 92%
rename from config/grub/nvme/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch
rename to config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch
index f2e26fd4..487ab2a2 100644
--- a/config/grub/nvme/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch
+++ b/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch
@@ -1,7 +1,7 @@
-From 0a21695c55f76f1c958bb633481d55b3168562f7 Mon Sep 17 00:00:00 2001
+From fa5deb59606422773ba8e77f3ab56226a10b116b Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 5/6] Compile with Argon2id support
+Subject: [PATCH 07/14] Compile with Argon2id support
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
@@ -11,7 +11,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  3 files changed, 17 insertions(+), 4 deletions(-)
 
 diff --git a/Makefile.util.def b/Makefile.util.def
-index 1e9a13d3e..a167825c3 100644
+index 0f74a1680..5a15e5637 100644
 --- a/Makefile.util.def
 +++ b/Makefile.util.def
 @@ -3,7 +3,7 @@ AutoGen definitions Makefile.tpl;
@@ -35,10 +35,10 @@ index 1e9a13d3e..a167825c3 100644
    common = grub-core/disk/luks.c;
    common = grub-core/disk/luks2.c;
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index 4a06789e5..e939dcc99 100644
+index 452f11b20..5c1af8682 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
-@@ -1238,7 +1238,7 @@ module = {
+@@ -1242,7 +1242,7 @@ module = {
    common = disk/luks2.c;
    common = lib/gnulib/base64.c;
    cflags = '$(CFLAGS_POSIX) $(CFLAGS_GNULIB)';
diff --git a/config/grub/xhci/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch
similarity index 79%
rename from config/grub/xhci/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch
rename to config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch
index dc65b7a6..327989fa 100644
--- a/config/grub/xhci/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch
+++ b/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch
@@ -1,7 +1,7 @@
-From 6c9a6625c0dc038d1bdbdc13665f40e269e86496 Mon Sep 17 00:00:00 2001
+From dad12fd3307bd15e55f5ea483f174a1d3eaa45f5 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 6/6] Make grub-install work with Argon2
+Subject: [PATCH 08/14] Make grub-install work with Argon2
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  1 file changed, 2 insertions(+)
 
 diff --git a/util/grub-install.c b/util/grub-install.c
-index 1ad04db36..a8a3330b8 100644
+index 7dc5657bb..cf7315891 100644
 --- a/util/grub-install.c
 +++ b/util/grub-install.c
 @@ -448,6 +448,8 @@ probe_mods (grub_disk_t disk)
diff --git a/config/grub/xhci/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
similarity index 96%
rename from config/grub/xhci/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
rename to config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
index 21e8630b..ddd3b85b 100644
--- a/config/grub/xhci/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
+++ b/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -1,7 +1,7 @@
-From 96c0bbe5d406b616360a7fce7cee67d7692c0d6d Mon Sep 17 00:00:00 2001
+From 55d2ea1ebaa6b399736aa24393e08d007fde988c Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 30 Oct 2023 22:19:21 +0000
-Subject: [PATCH 1/1] at_keyboard coreboot: force scancodes2+translate
+Subject: [PATCH 09/14] at_keyboard coreboot: force scancodes2+translate
 
 Scan code set 2 with translation should be assumed in
 every case, as the default starting position.
diff --git a/config/grub/nvme/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
similarity index 89%
rename from config/grub/nvme/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
rename to config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
index fbef86a4..ed3c1f4a 100644
--- a/config/grub/nvme/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
+++ b/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
@@ -1,7 +1,7 @@
-From 0a6abeb40ac4284fbff6ef5958989d561b6290a7 Mon Sep 17 00:00:00 2001
+From 4e89b0da7213b710bfb4d95a20e34b193f39e58c Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 31 Oct 2023 10:33:28 +0000
-Subject: [PATCH 1/1] keylayouts: don't print "Unknown key" message
+Subject: [PATCH 10/14] keylayouts: don't print "Unknown key" message
 
 on keyboards with stuck keys, this results in GRUB just
 spewing it repeatedly, preventing use of GRUB.
diff --git a/config/grub/nvme/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
similarity index 96%
rename from config/grub/nvme/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
rename to config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
index 25091d16..77cb7a64 100644
--- a/config/grub/nvme/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
+++ b/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -1,7 +1,7 @@
-From 9e7a651a0f15f2e9dec65a77765c3c4fd97b4165 Mon Sep 17 00:00:00 2001
+From d14c9af2656ee6b63b029ac28816f38d4ae26946 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:14:58 +0000
-Subject: [PATCH 1/1] don't print missing prefix errors on the screen
+Subject: [PATCH 11/14] don't print missing prefix errors on the screen
 
 we do actually set the prefix. this patch modifies
 grub to still set grub_errno and return accordingly,
diff --git a/config/grub/xhci/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch b/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch
similarity index 89%
rename from config/grub/xhci/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
rename to config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch
index f4cf939e..ada8288e 100644
--- a/config/grub/xhci/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
+++ b/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch
@@ -1,7 +1,7 @@
-From 6237c5762edccc1e1fa4746b1d4aa5e8d81e4883 Mon Sep 17 00:00:00 2001
+From d58c6298f62e70084a14aabc6c46b31d61f28152 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:36:22 +0000
-Subject: [PATCH 1/1] don't print error if module not found
+Subject: [PATCH 12/14] don't print error if module not found
 
 still set grub_errno accordingly, and otherwise
 behave the same. in libreboot, we remove a lot of
diff --git a/config/grub/xhci/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch b/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch
similarity index 87%
rename from config/grub/xhci/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
rename to config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch
index 25221c9c..f89977b4 100644
--- a/config/grub/xhci/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
+++ b/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch
@@ -1,7 +1,7 @@
-From e5b7ec81421487e71bcaf8b6b5a27f3649a62753 Mon Sep 17 00:00:00 2001
+From 031ee85c97452f6d1a5f341ff41c65aace5584c4 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 17:25:20 +0000
-Subject: [PATCH 1/1] don't print empty error messages
+Subject: [PATCH 13/14] don't print empty error messages
 
 this is part two of the quest to kill the prefix
 error message. after i disabled prefix-related
diff --git a/config/grub/nvme/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
similarity index 99%
rename from config/grub/nvme/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
rename to config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
index 4345ebae..bfe28efd 100644
--- a/config/grub/nvme/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
+++ b/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
@@ -1,7 +1,7 @@
-From 708c0092d44aec6409e0ecc1925cdbb3b76c6dfd Mon Sep 17 00:00:00 2001
+From 246a626a369fc3730c6b5c21982fd89ed19c6fe0 Mon Sep 17 00:00:00 2001
 From: Mate Kukri <km@mkukri.xyz>
 Date: Mon, 20 May 2024 11:43:35 +0100
-Subject: [PATCH 1/1] Add native NVMe driver based on SeaBIOS
+Subject: [PATCH 14/14] Add native NVMe driver based on SeaBIOS
 
 Tested to successfully boot Debian on QEMU and OptiPlex 3050.
 
@@ -31,12 +31,12 @@ index 43635d5ff..2c86dbbf6 100644
  
  endif
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index 560c66447..d3bf9f1c5 100644
+index 5c1af8682..02967d3ff 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
-@@ -2607,3 +2607,9 @@ module = {
-   efi = commands/bli.c;
+@@ -2614,3 +2614,9 @@ module = {
    enable = efi;
+   depends = part_gpt;
  };
 +
 +module = {
diff --git a/config/grub/nvme/target.cfg b/config/grub/nvme/target.cfg
index 97a0deb5..9177dbd7 100644
--- a/config/grub/nvme/target.cfg
+++ b/config/grub/nvme/target.cfg
@@ -1,2 +1,2 @@
 tree="nvme"
-rev="8719cc2040368d43ab2de0b6e1b850b2c9cfc5b7"
+rev="b53ec06a1d6f22ffc1139cbfc0f292e4ca2da9cd"
diff --git a/config/grub/nvme/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
similarity index 92%
rename from config/grub/nvme/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
rename to config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
index 183f5a91..0cc0cb34 100644
--- a/config/grub/nvme/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
+++ b/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -1,7 +1,7 @@
-From ce13539fe2103abbd991814d995e06cf96e485f7 Mon Sep 17 00:00:00 2001
+From 1ee64f2373af3ad992993f9cf103a29df0359c3c Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 31 Oct 2021 03:47:05 +0000
-Subject: [PATCH 1/3] mitigate grub's missing characters for borders/arrow
+Subject: [PATCH 01/22] mitigate grub's missing characters for borders/arrow
  characters
 
 This cleans up the display on the main screen in GRUB.
@@ -12,7 +12,7 @@ Just don't draw a border, at all.
  1 file changed, 2 insertions(+), 47 deletions(-)
 
 diff --git a/grub-core/normal/menu_text.c b/grub-core/normal/menu_text.c
-index b1321eb26..e76094dfd 100644
+index 9c383e64a..8ec1dd1e8 100644
 --- a/grub-core/normal/menu_text.c
 +++ b/grub-core/normal/menu_text.c
 @@ -108,47 +108,6 @@ grub_print_message_indented (const char *msg, int margin_left, int margin_right,
@@ -76,7 +76,7 @@ index b1321eb26..e76094dfd 100644
        if (!msg_translated)
  	return 0;
        ret += grub_print_message_indented_real (msg_translated, STANDARD_MARGIN,
-@@ -410,8 +367,6 @@ grub_menu_init_page (int nested, int edit,
+@@ -413,8 +370,6 @@ grub_menu_init_page (int nested, int edit,
  
    grub_term_normal_color = grub_color_menu_normal;
    grub_term_highlight_color = grub_color_menu_highlight;
@@ -86,5 +86,5 @@ index b1321eb26..e76094dfd 100644
    grub_term_highlight_color = old_color_highlight;
    geo->timeout_y = geo->first_entry_y + geo->num_entries
 -- 
-2.25.1
+2.39.2
 
diff --git a/config/grub/nvme/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
similarity index 78%
rename from config/grub/nvme/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
rename to config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index b83565fe..1b53b5ae 100644
--- a/config/grub/nvme/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -1,14 +1,14 @@
-From 70f9e72c3ff6381fe3519612de3b649c0cf26b9a Mon Sep 17 00:00:00 2001
+From 0e89a40423cdd6f8f20ad03d1c2f54ee7b5ea1b6 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 19 Nov 2022 16:30:24 +0000
-Subject: [PATCH 2/3] say the name libreboot, in the grub menu
+Subject: [PATCH 02/22] say the name libreboot, in the grub menu
 
 ---
  grub-core/normal/main.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c
-index bd4431000..31308e16a 100644
+index bd4431000..300f55fe1 100644
 --- a/grub-core/normal/main.c
 +++ b/grub-core/normal/main.c
 @@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term,
@@ -21,5 +21,5 @@ index bd4431000..31308e16a 100644
      return;
  
 -- 
-2.25.1
+2.39.2
 
diff --git a/config/grub/default/patches/0002-luks2/0003-Add-CC0-license.patch b/config/grub/xhci/patches/0003-Add-CC0-license.patch
similarity index 94%
rename from config/grub/default/patches/0002-luks2/0003-Add-CC0-license.patch
rename to config/grub/xhci/patches/0003-Add-CC0-license.patch
index dc9060c3..cf35c343 100644
--- a/config/grub/default/patches/0002-luks2/0003-Add-CC0-license.patch
+++ b/config/grub/xhci/patches/0003-Add-CC0-license.patch
@@ -1,7 +1,7 @@
-From de6e7cc62522ce1be21bd2f06e7c15cd234b5426 Mon Sep 17 00:00:00 2001
+From c9be46c903d4aabc88fe4d9394d7a8e024868c32 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 1/6] Add CC0 license
+Subject: [PATCH 03/22] Add CC0 license
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
diff --git a/config/grub/default/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
similarity index 89%
rename from config/grub/default/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch
rename to config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
index be875e67..08566ba9 100644
--- a/config/grub/default/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch
+++ b/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
@@ -1,7 +1,7 @@
-From 9edaaffac91d593a439e44bac3b6f5558f5a8245 Mon Sep 17 00:00:00 2001
+From c988b6b3bb7567f9ed6bb0332b992577011970c2 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 2/6] Define GRUB_UINT32_MAX
+Subject: [PATCH 04/22] Define GRUB_UINT32_MAX
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  1 file changed, 8 insertions(+)
 
 diff --git a/include/grub/types.h b/include/grub/types.h
-index 0d96006fe..a13f3a60b 100644
+index 45079bf65..8c0b30395 100644
 --- a/include/grub/types.h
 +++ b/include/grub/types.h
 @@ -156,6 +156,7 @@ typedef grub_int32_t	grub_ssize_t;
diff --git a/config/grub/xhci/patches/0002-luks2/0005-Add-Argon2-algorithm.patch b/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
similarity index 99%
rename from config/grub/xhci/patches/0002-luks2/0005-Add-Argon2-algorithm.patch
rename to config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
index 1c6b4f04..85a629c5 100644
--- a/config/grub/xhci/patches/0002-luks2/0005-Add-Argon2-algorithm.patch
+++ b/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
@@ -1,7 +1,7 @@
-From 5b63da5c4267933f573ca37ce39a073098c443ba Mon Sep 17 00:00:00 2001
+From e2cfe7dcdb384ce5268a7c6e5cc8a6e8e01fc05f Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 3/6] Add Argon2 algorithm
+Subject: [PATCH 05/22] Add Argon2 algorithm
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
@@ -30,7 +30,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  create mode 100644 grub-core/lib/argon2/ref.c
 
 diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi
-index a695b02f0..313335a53 100644
+index 1276c5930..cd6fb0e1e 100644
 --- a/docs/grub-dev.texi
 +++ b/docs/grub-dev.texi
 @@ -503,11 +503,75 @@ GRUB includes some code from other projects, and it is sometimes necessary
@@ -110,10 +110,10 @@ index a695b02f0..313335a53 100644
  @section Gnulib
  
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index d2cf29584..4a06789e5 100644
+index 705d73fab..452f11b20 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
-@@ -1215,6 +1215,14 @@ module = {
+@@ -1219,6 +1219,14 @@ module = {
    common = lib/json/json.c;
  };
  
diff --git a/config/grub/nvme/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
similarity index 94%
rename from config/grub/nvme/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch
rename to config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
index 5d56bd61..30de08cc 100644
--- a/config/grub/nvme/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch
+++ b/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
@@ -1,7 +1,7 @@
-From 0044d32121bf52c4547c6b3c78f12d7305f57e6b Mon Sep 17 00:00:00 2001
+From 08a2fce70c6e988eb0112d5ad2787843910811bc Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 4/6] Error on missing Argon2id parameters
+Subject: [PATCH 06/22] Error on missing Argon2id parameters
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
diff --git a/config/grub/default/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch b/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
similarity index 92%
rename from config/grub/default/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch
rename to config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
index f2e26fd4..23f361dc 100644
--- a/config/grub/default/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch
+++ b/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
@@ -1,7 +1,7 @@
-From 0a21695c55f76f1c958bb633481d55b3168562f7 Mon Sep 17 00:00:00 2001
+From 268da8d0ccce822ffa4c2d9d35fe717245daa726 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 5/6] Compile with Argon2id support
+Subject: [PATCH 07/22] Compile with Argon2id support
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
@@ -11,7 +11,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  3 files changed, 17 insertions(+), 4 deletions(-)
 
 diff --git a/Makefile.util.def b/Makefile.util.def
-index 1e9a13d3e..a167825c3 100644
+index 0f74a1680..5a15e5637 100644
 --- a/Makefile.util.def
 +++ b/Makefile.util.def
 @@ -3,7 +3,7 @@ AutoGen definitions Makefile.tpl;
@@ -35,10 +35,10 @@ index 1e9a13d3e..a167825c3 100644
    common = grub-core/disk/luks.c;
    common = grub-core/disk/luks2.c;
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index 4a06789e5..e939dcc99 100644
+index 452f11b20..5c1af8682 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
-@@ -1238,7 +1238,7 @@ module = {
+@@ -1242,7 +1242,7 @@ module = {
    common = disk/luks2.c;
    common = lib/gnulib/base64.c;
    cflags = '$(CFLAGS_POSIX) $(CFLAGS_GNULIB)';
diff --git a/config/grub/nvme/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
similarity index 79%
rename from config/grub/nvme/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch
rename to config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
index dc65b7a6..ffdb306c 100644
--- a/config/grub/nvme/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch
+++ b/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
@@ -1,7 +1,7 @@
-From 6c9a6625c0dc038d1bdbdc13665f40e269e86496 Mon Sep 17 00:00:00 2001
+From 5e540d3e4c01940c66425c4475a1cb6a35b188e8 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 6/6] Make grub-install work with Argon2
+Subject: [PATCH 08/22] Make grub-install work with Argon2
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  1 file changed, 2 insertions(+)
 
 diff --git a/util/grub-install.c b/util/grub-install.c
-index 1ad04db36..a8a3330b8 100644
+index 7dc5657bb..cf7315891 100644
 --- a/util/grub-install.c
 +++ b/util/grub-install.c
 @@ -448,6 +448,8 @@ probe_mods (grub_disk_t disk)
diff --git a/config/grub/default/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
similarity index 96%
rename from config/grub/default/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
rename to config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
index 21e8630b..e4b26a38 100644
--- a/config/grub/default/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
+++ b/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -1,7 +1,7 @@
-From 96c0bbe5d406b616360a7fce7cee67d7692c0d6d Mon Sep 17 00:00:00 2001
+From 9e9c69a74e5c14fd87ae56c8b9171a808d89742e Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 30 Oct 2023 22:19:21 +0000
-Subject: [PATCH 1/1] at_keyboard coreboot: force scancodes2+translate
+Subject: [PATCH 09/22] at_keyboard coreboot: force scancodes2+translate
 
 Scan code set 2 with translation should be assumed in
 every case, as the default starting position.
diff --git a/config/grub/default/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
similarity index 89%
rename from config/grub/default/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
rename to config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
index fbef86a4..e8a3ce14 100644
--- a/config/grub/default/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
+++ b/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
@@ -1,7 +1,7 @@
-From 0a6abeb40ac4284fbff6ef5958989d561b6290a7 Mon Sep 17 00:00:00 2001
+From ccbcdb93af6747fe77094dfa9e114a034420bdd5 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 31 Oct 2023 10:33:28 +0000
-Subject: [PATCH 1/1] keylayouts: don't print "Unknown key" message
+Subject: [PATCH 10/22] keylayouts: don't print "Unknown key" message
 
 on keyboards with stuck keys, this results in GRUB just
 spewing it repeatedly, preventing use of GRUB.
diff --git a/config/grub/default/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
similarity index 96%
rename from config/grub/default/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
rename to config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
index 25091d16..de68bb78 100644
--- a/config/grub/default/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
+++ b/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -1,7 +1,7 @@
-From 9e7a651a0f15f2e9dec65a77765c3c4fd97b4165 Mon Sep 17 00:00:00 2001
+From 21a829a3a6f5e7d9028059df8057fdf8bce8fe06 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:14:58 +0000
-Subject: [PATCH 1/1] don't print missing prefix errors on the screen
+Subject: [PATCH 11/22] don't print missing prefix errors on the screen
 
 we do actually set the prefix. this patch modifies
 grub to still set grub_errno and return accordingly,
diff --git a/config/grub/default/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch b/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
similarity index 89%
rename from config/grub/default/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
rename to config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
index f4cf939e..37f52e03 100644
--- a/config/grub/default/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
+++ b/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
@@ -1,7 +1,7 @@
-From 6237c5762edccc1e1fa4746b1d4aa5e8d81e4883 Mon Sep 17 00:00:00 2001
+From edb8208100c523b5776f2cb0712fdc0c9065e517 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:36:22 +0000
-Subject: [PATCH 1/1] don't print error if module not found
+Subject: [PATCH 12/22] don't print error if module not found
 
 still set grub_errno accordingly, and otherwise
 behave the same. in libreboot, we remove a lot of
diff --git a/config/grub/nvme/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch b/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
similarity index 87%
rename from config/grub/nvme/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
rename to config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
index 25221c9c..74d8bade 100644
--- a/config/grub/nvme/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
+++ b/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
@@ -1,7 +1,7 @@
-From e5b7ec81421487e71bcaf8b6b5a27f3649a62753 Mon Sep 17 00:00:00 2001
+From 65cb1871a3e125355df78a6d1d6f1bc7e356c4e8 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 17:25:20 +0000
-Subject: [PATCH 1/1] don't print empty error messages
+Subject: [PATCH 13/22] don't print empty error messages
 
 this is part two of the quest to kill the prefix
 error message. after i disabled prefix-related
diff --git a/config/grub/xhci/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch b/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
similarity index 98%
rename from config/grub/xhci/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
rename to config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
index f533269f..4c84b8c3 100644
--- a/config/grub/xhci/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
+++ b/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
@@ -1,7 +1,8 @@
-From 90c9011f2e0350a97e3df44b0fc6dd022e04c276 Mon Sep 17 00:00:00 2001
+From 3273128b6dc6df83ef6b1d54d009a1ae26844bff Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:00:27 +0100
-Subject: [PATCH 1/8] grub-core/bus/usb: Parse SuperSpeed companion descriptors
+Subject: [PATCH 14/22] grub-core/bus/usb: Parse SuperSpeed companion
+ descriptors
 
 Parse the SS_ENDPOINT_COMPANION descriptor, which is only present on USB 3.0
 capable devices and xHCI controllers. Make the descendp an array of pointers
diff --git a/config/grub/xhci/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch b/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
similarity index 86%
rename from config/grub/xhci/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch
rename to config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
index d61da615..937ff1af 100644
--- a/config/grub/xhci/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch
+++ b/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
@@ -1,7 +1,7 @@
-From e111983ca5e2a52bfe2bdc5cd639b06bb2f7902d Mon Sep 17 00:00:00 2001
+From 3b8f2defcda1a3b51ad0be8795a2338a0ed5ca59 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:47:06 +0100
-Subject: [PATCH 2/8] usb: Add enum for xHCI
+Subject: [PATCH 15/22] usb: Add enum for xHCI
 
 Will be used in future patches.
 
diff --git a/config/grub/xhci/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch b/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
similarity index 88%
rename from config/grub/xhci/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch
rename to config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
index 70e73ca2..8f6bb001 100644
--- a/config/grub/xhci/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch
+++ b/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
@@ -1,7 +1,7 @@
-From 3e25c83a1d1c6e149c7e9f0660ddadb2beca2476 Mon Sep 17 00:00:00 2001
+From ba7ce6daec155bc3deac4e0c48d470afa024ab94 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:48:03 +0100
-Subject: [PATCH 3/8] usbtrans: Set default maximum packet size
+Subject: [PATCH 16/22] usbtrans: Set default maximum packet size
 
 Set the maximum packet size to 512 for SuperSpeed devices.
 
diff --git a/config/grub/xhci/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch b/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
similarity index 96%
rename from config/grub/xhci/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
rename to config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
index a090e0ea..60680bd0 100644
--- a/config/grub/xhci/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
+++ b/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
@@ -1,8 +1,8 @@
-From 89701aba00caa81bb566ab10da0c89264393be30 Mon Sep 17 00:00:00 2001
+From c4cd7fbe3e2e8ff4cbe6d0db8c3356aeee614af5 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:51:42 +0100
-Subject: [PATCH 4/8] grub-core/bus/usb: Add function pointer for attach/detach
- events
+Subject: [PATCH 17/22] grub-core/bus/usb: Add function pointer for
+ attach/detach events
 
 The xHCI code needs to be called for attaching or detaching a device.
 Introduce two functions pointers and call it from the USB hub code.
diff --git a/config/grub/xhci/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch b/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
similarity index 94%
rename from config/grub/xhci/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
rename to config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
index 7d69c3a6..bc0f957f 100644
--- a/config/grub/xhci/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
+++ b/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
@@ -1,8 +1,8 @@
-From 5e5d74a4531770258e21dedd45c33f1a9d3afa6b Mon Sep 17 00:00:00 2001
+From 1ab23afbfa7ae436741947c0b9bdacc434ad6153 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:54:40 +0100
-Subject: [PATCH 5/8] grub-core/bus/usb/usbhub: Add new private fields for xHCI
- controller
+Subject: [PATCH 18/22] grub-core/bus/usb/usbhub: Add new private fields for
+ xHCI controller
 
 Store the root port number, the route, consisting out of the port ID
 in each nibble, and a pointer to driver private data.
diff --git a/config/grub/xhci/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch b/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
similarity index 99%
rename from config/grub/xhci/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch
rename to config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
index 11df42d8..02a24d5a 100644
--- a/config/grub/xhci/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch
+++ b/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
@@ -1,7 +1,7 @@
-From fe3a0bce527e059e9121eb5ad2c3cc099f07a4bf Mon Sep 17 00:00:00 2001
+From 8c9e61e7b0f28a66d0f63c07b10fc6617a709010 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:59:25 +0100
-Subject: [PATCH 6/8] grub-core/bus/usb: Add xhci support
+Subject: [PATCH 19/22] grub-core/bus/usb: Add xhci support
 
 Add support for xHCI USB controllers.
 The code is based on seabios implementation, but has been heavily
@@ -74,7 +74,7 @@ index 43635d5ff..65016f856 100644
  
  endif
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index fb6078a34..64c3806ab 100644
+index 5c1af8682..9d59acd1e 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
 @@ -667,6 +667,13 @@ module = {
diff --git a/config/grub/xhci/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch b/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
similarity index 96%
rename from config/grub/xhci/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
rename to config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
index a37bbd6b..735ef22d 100644
--- a/config/grub/xhci/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
+++ b/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
@@ -1,7 +1,7 @@
-From 2a2c64f6ea62337c1263a70f6ca9a9bade66b78b Mon Sep 17 00:00:00 2001
+From 127961742cf7992f6989c6e89a18ab6d8f0b297f Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Thu, 3 Dec 2020 13:44:55 +0100
-Subject: [PATCH 7/8] grub-core/bus/usb/usbhub: Add xHCI non root hub support
+Subject: [PATCH 20/22] grub-core/bus/usb/usbhub: Add xHCI non root hub support
 
 Tested on Intel PCH C246, the USB3 hub can be configured by grub.
 
diff --git a/config/grub/xhci/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch b/config/grub/xhci/patches/0021-Fix-compilation-on-x86_64.patch
similarity index 96%
rename from config/grub/xhci/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch
rename to config/grub/xhci/patches/0021-Fix-compilation-on-x86_64.patch
index af79c3d0..6a5f0502 100644
--- a/config/grub/xhci/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch
+++ b/config/grub/xhci/patches/0021-Fix-compilation-on-x86_64.patch
@@ -1,7 +1,7 @@
-From 871d768f8c5c960cb0d9761a9028b16882e1a7d3 Mon Sep 17 00:00:00 2001
+From 8d46c537d4df8c785af4b85644d311ba53af5964 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Wed, 24 Feb 2021 08:25:41 +0100
-Subject: [PATCH 8/8] Fix compilation on x86_64
+Subject: [PATCH 21/22] Fix compilation on x86_64
 
 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
 ---
diff --git a/config/grub/xhci/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch
similarity index 99%
rename from config/grub/xhci/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
rename to config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch
index b00611a0..82452f1c 100644
--- a/config/grub/xhci/patches/0006-nvme/0001-Add-native-NVMe-driver-based-on-SeaBIOS.patch
+++ b/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch
@@ -1,7 +1,7 @@
-From ef9d61ae9ed490301adf9ee064a9fc1190069d81 Mon Sep 17 00:00:00 2001
+From 394102db8f4de6782b628b29c59d2634f2c72674 Mon Sep 17 00:00:00 2001
 From: Mate Kukri <km@mkukri.xyz>
 Date: Mon, 20 May 2024 11:43:35 +0100
-Subject: Add native NVMe driver based on SeaBIOS
+Subject: [PATCH 22/22] Add native NVMe driver based on SeaBIOS
 
 Tested to successfully boot Debian on QEMU and OptiPlex 3050.
 
@@ -31,12 +31,12 @@ index 65016f856..7bc0866ba 100644
  
  endif
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index ea782666d..0f893369a 100644
+index 9d59acd1e..56076728b 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
-@@ -2602,3 +2602,9 @@ module = {
-   efi = commands/bli.c;
+@@ -2621,3 +2621,9 @@ module = {
    enable = efi;
+   depends = part_gpt;
  };
 +
 +module = {
@@ -45,7 +45,7 @@ index ea782666d..0f893369a 100644
 +  enable = pci;
 +};
 diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c
-index 580c8d3b0..a2c766fbd 100644
+index 6806bff9c..fd68a513e 100644
 --- a/grub-core/commands/nativedisk.c
 +++ b/grub-core/commands/nativedisk.c
 @@ -78,6 +78,7 @@ get_uuid (const char *name, char **uuid, int getnative)
diff --git a/config/grub/xhci/target.cfg b/config/grub/xhci/target.cfg
index 61ee9757..af33f65d 100644
--- a/config/grub/xhci/target.cfg
+++ b/config/grub/xhci/target.cfg
@@ -1,2 +1,2 @@
 tree="xhci"
-rev="8719cc2040368d43ab2de0b6e1b850b2c9cfc5b7"
+rev="b53ec06a1d6f22ffc1139cbfc0f292e4ca2da9cd"

From c3f6dd03cc9c2617f51335c899389ee6e91a931f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 11 Aug 2024 16:42:26 +0100
Subject: [PATCH 0805/1549] seabios/default: bump to ec0bc256 (2024-06-24)

This brings in a single change:

commit ec0bc256ae0ea08a32d3e854e329cfbc141f07ad
Author: Gerd Hoffmann <kraxel@redhat.com>
Date:   Mon Jun 24 10:44:09 2024 +0200

    limit address space used for pci devices, part two

This increases compatibility with i686 hosts, when allocating
memory for pci devices.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/seabios/default/target.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/seabios/default/target.cfg b/config/seabios/default/target.cfg
index bc7cc9fc..afa4a729 100644
--- a/config/seabios/default/target.cfg
+++ b/config/seabios/default/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-rev="e5f2e4c69643bc3cd385306a9e5d29e11578148c"
+rev="ec0bc256ae0ea08a32d3e854e329cfbc141f07ad"

From 3a5a1793796220938b6d4d56540abc86efdb8878 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 11 Aug 2024 18:16:39 +0100
Subject: [PATCH 0806/1549] flashprog: bump to 639d563 (2024-08-02)

The workaround-mx patch was rebased on one section in spi.c,
because that part in upstream added QPI support; in the newly
rebase mx patch, the workaround_mx behaviour is only
honoured if QPI (Quad SPI) is not in use.

Quad SPI is not used in practise, on the machines where this
workaround is intended (GM45 ThinkPads with Macronix chips).

This imports the following upstream changes:

* 639d563 README: Update flashprog.org URLs
* cbbd601 README: Update dependency list and Linux package names
* 79451f1 README: Rename "Packaging" -> "Source Packaging"
* 5b4695c README: Dial laptop warning down a little
* 7224085 udev rules: Add some more IDs
* 448457a ch347_spi: Add CH347F ID and loop over the entries
* e39549b ch347_spi: Search for compatible USB interface
* dfd0647 ich_descriptors: Refactor component density handling
* b2ad9fd ich_descriptors: Make use of SPI_ENGINE_PCH100 marker
* 140e22f chipset_enable: Make use of SPI_ENGINE_PCH100 marker
* 869f0e7 ichspi: Use `swseq_data' on ICH7 paths too
* eeee91b ichspi: Replace all switch/case on `ich_generation'
* ecba1d8 ichspi: Drop redundant bail-out cases in ich_set_bbar()
* e8babf4 ichspi: Use a single check to enable hwseq for PCH100+
* fda324b ichspi: Introduce SPI_ENGINE_PCH100 marker
* a1f6476 ichspi: Split ICH7 init out
* 3f75d44 ich_descriptors: Remove `Dual Output Fast Read' for newer gens
* 2862011 spi25: Try to set volatile quad-enable (QE) automatically
* 4ac536b spi25_statusreg: Allow to write (non-)volatile bits specifically
* b1d2bae dediprog: Fix and enable 4BA modes for SF600Plus-G2
* d0afeef dediprog: Disable 4BA modes for SF100 w/ protocol v2
* 1b1deda Implement QPI support
* a1b7f35 dediprog: Implement multi-i/o reads
* 008a44f dediprog: Split read/write command preparation by protocol
* 4760b6e spi25: Implement multi-i/o reads
* 0c9af0a spi25: Check quad-enable (QE) bit
* 930d421 spi25: Introduce generic spi_prepare_io()/spi_finish_io()
* 8d0f465 spi25: Extract 4BA preparations into new `spi25_prepare.c`
* 044c9dc Add FT4222H support
* fc7c13c linux_gpio2_spi: Implement multi i/o
* 5fc3154 bitbang_spi: Implement multi-i/o
* d16a911 bitbang_spi: Move API into its own header file
* 226bb87 flashchips: Add missing QE-bit definitions
* 4fa39c5 flashchips: Fill multi-i/o gaps in MX25U family
* 5f50999 flashchips: Fill multi-i/o gaps in MX25R family
* 46552c8 flashchips: Fill multi-i/o gaps in MX25L family
* 96786d0 flashchips: Fill quad-i/o gaps in XM25Q family
* a26a3c6 flashchips: Fill dual-i/o gaps in W25X family
* 2133f59 flashchips: Fill quad-i/o gaps in W25Q family
* 68573af flashchips: Split GD25Q127C and GD25Q128C
* 4da971f flashchips: Fill quad-i/o gaps in GD25*Q families
* f7e2d97 spi: Allow to define a quad-enable (QE) configuration bit
* 1412d9f spi: Rework FEATURE_QPI
* d518563 spi: Prepare for multi i/o and dummy bytes
* bd72a47 spi25_statusreg: support reading/writing configuration register
* 3d728e7 spi25_statusreg.c: support reading security register
* a358b14 flashchips: Split W25Q64.W -> W25Q64DW | W25Q64FW/W25Q64JW...Q
* 3127db1 manibuilder: Drop legacy flashrom tag collections
* 619d9c0 manibuilder: Use `test_build.sh'
* 6560bba manibuilder/almalinux: Install `diffutils' for new `test_build.sh'
* c7b549e test_build.sh: Compare output for -L of Make and Meson builds
* 72b30a0 test_build.sh: Don't try to run cross-compiled programs
* 3d2f212 test_build.sh: Allow to override Make and Meson commands
* 4eb9748 test_build.sh: Run tests for both Make and Meson builds
* 8279457 manibuilder: Add Alpine Linux 3.18 & 3.19 images
* 15e9b10 manibuilder/alpine: Install libjaylink-dev when available
* b8b3593 manibuilder: Add images for Fedora 38..40
* 7b05f09 manibuilder: Add images for Ubuntu 24.04 "Noble Numbat"
* 5e8b339 manibuilder/anita: Add NetBSD 10.0 i386 & amd64 images
* 61da8c7 manibuilder/anita: Export library path for libusb
* 39152af manibuilder: Set sourcearcade.org as default source
* 20073e7 Properly clear erase-block selection when bigger block is chosen
* 3824c8d ichspi: Allow all opcodes when the "opmenu" isn't locked
* 0d4354e flashchips: Add W25Q32JV-.M

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../0001-Workaround-for-MX25-chips.patch      | 26 +++++++++++--------
 config/git/flashprog/pkg.cfg                  |  2 +-
 2 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch b/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch
index ddbe90a6..fc3befb1 100644
--- a/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch
+++ b/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch
@@ -1,4 +1,4 @@
-From 25047d86c478beb58fd7c9a3539b03ea9426edb6 Mon Sep 17 00:00:00 2001
+From 9d8c79eecf760e4f963a0a7f29b577cd84962a2a Mon Sep 17 00:00:00 2001
 From: consts <grudnevkv@gmail.com>
 Date: Fri, 2 Mar 2018 07:03:37 +0000
 Subject: [PATCH 1/1] Workaround for MX25 chips
@@ -11,10 +11,10 @@ Chip: MX25L6405D
 Tested-by: Riku Viitanen <riku.viitanen@protonmail.com>
 Change-Id: I43a306b67862b59c1dcd02729e189f3bf73f481b
 ---
- cli_classic.c        | 5 +++++
- include/programmer.h | 1 +
- spi.c                | 9 +++++++++
- 3 files changed, 15 insertions(+)
+ cli_classic.c        |  5 +++++
+ include/programmer.h |  1 +
+ spi.c                | 11 ++++++++++-
+ 3 files changed, 16 insertions(+), 1 deletion(-)
 
 diff --git a/cli_classic.c b/cli_classic.c
 index ab5f8b1..2825033 100644
@@ -47,10 +47,10 @@ index ab5f8b1..2825033 100644
  			show_progress = true;
  			break;
 diff --git a/include/programmer.h b/include/programmer.h
-index edef52b..722e599 100644
+index 873dc37..2007fd6 100644
 --- a/include/programmer.h
 +++ b/include/programmer.h
-@@ -356,6 +356,7 @@ enum ich_chipset {
+@@ -364,6 +364,7 @@ enum ich_chipset {
  	CHIPSET_GEMINI_LAKE,
  	CHIPSET_ELKHART_LAKE,
  };
@@ -59,11 +59,11 @@ index edef52b..722e599 100644
  /* ichspi.c */
  #if CONFIG_INTERNAL == 1
 diff --git a/spi.c b/spi.c
-index ac51d87..be62588 100644
+index 748ef99..9bbdee9 100644
 --- a/spi.c
 +++ b/spi.c
-@@ -26,10 +26,19 @@
- #include "programmer.h"
+@@ -27,13 +27,22 @@
+ #include "spi_command.h"
  #include "spi.h"
  
 +int workaround_mx; /* Make operations with MX25* chips more reliable */
@@ -72,12 +72,16 @@ index ac51d87..be62588 100644
  		     unsigned int readcnt, const unsigned char *writearr,
  		     unsigned char *readarr)
  {
-+	if (workaround_mx) {
+-	if (spi_current_io_mode(flash) != SINGLE_IO_1_1_1)
++	if (spi_current_io_mode(flash) != SINGLE_IO_1_1_1) {
+ 		return default_spi_send_command(flash, writecnt, readcnt, writearr, readarr);
++	} else if (workaround_mx) {
 +		const unsigned char cmd[JEDEC_READ_OUTSIZE] = {JEDEC_READ, 0, 0, 0};
 +		unsigned char buf[256];
 +		/* keep flash busy for some time, keep CS warm before sending actual command */
 +		flash->mst.spi->command(flash, sizeof(cmd), sizeof(buf), cmd, buf);
 +	}
+ 
 +	/* actual command */
  	return flash->mst.spi->command(flash, writecnt, readcnt, writearr,
  				       readarr);
diff --git a/config/git/flashprog/pkg.cfg b/config/git/flashprog/pkg.cfg
index ddbd60a2..6a94b319 100644
--- a/config/git/flashprog/pkg.cfg
+++ b/config/git/flashprog/pkg.cfg
@@ -1,3 +1,3 @@
-rev="5b4fdd11dd74c7f018cb04f7a27a2badc02fe182"
+rev="639d563b3f0084ed053384c468663be342cba775"
 url="https://review.sourcearcade.org/flashprog"
 bkup_url="https://github.com/SourceArcade/flashprog.git"

From aae8cabe73675b0a2d15199ec5e1504837cd4080 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sun, 11 Aug 2024 21:19:04 +0100
Subject: [PATCH 0807/1549] lib.sh: more verbose error in x_

part of the command was cut off in the output

Signed-off-by: Leah Rowe <info@minifree.org>
---
 include/lib.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 2c9cd0d4..c5df639c 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -103,7 +103,8 @@ expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
     1>/dev/null 2>/dev/null || export XBMK_THREADS=1 # user gave a non-integer
 
 x_() {
-	[ $# -lt 1 ] || $@ || $err "Unhandled non-zero exit: $@"; return 0
+	[ $# -lt 1 ] || $@ || \
+	    $err "Unhandled non-zero exit: $(echo "$@")"; return 0
 }
 
 [ -e ".git" ] || [ -f "version" ] || printf "unknown\n" > version || \

From d66f6e0d5bf941e70f9126c19fb5608a3bbb4ade Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sun, 11 Aug 2024 21:19:33 +0100
Subject: [PATCH 0808/1549] vendor.sh: don't load entire coreboot configs

instead, only grep for the entries required, such
as Intel ME paths.

some variables in coreboot configs use $(), which
is used in *make*, on the coreboot build system, and
there refers to variables.

here, we are sourcing them from sh, which treats this
as a mini subshell to run a command; for example
CONFIG_FOO would be executed, which is bad.

The current logic still theoretically has this problem,
with this patch, but the entries we scan from the configs
do not currently have variable names in the strings.

So: filter out just what we need, into a temporary config,
when scanning for vendor files in coreboot configs, and
use the temporary config.

This fixes a build error when compiling for e5520_6mb.

Signed-off-by: Leah Rowe <info@minifree.org>
---
 include/vendor.sh | 32 +++++++++++++++++++++++---------
 1 file changed, 23 insertions(+), 9 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index ea1d4f0a..5d2b91b3 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -11,17 +11,19 @@ vendir="vendorfiles"
 appdir="$vendir/app"
 cbcfgsdir="config/coreboot"
 
+cv="CONFIG_HAVE_ME_BIN CONFIG_ME_BIN_PATH CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \
+    CONFIG_SMSC_SCH5545_EC_FW_FILE CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 \
+    CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2_OFFSET \
+    CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_BOARD_DELL_E6400 \
+    CONFIG_HAVE_MRC CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB \
+    CONFIG_REFCODE_BLOB_FILE CONFIG_GBE_BIN_PATH CONFIG_IFD_BIN_PATH"
+
 eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
-    E6400_VGA_romname CONFIG_HAVE_MRC SCH5545EC_DL_url_bkup SCH5545EC_DL_hash \
+    E6400_VGA_romname SCH5545EC_DL_url_bkup SCH5545EC_DL_hash _dest tree \
     mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl SCH5545EC_DL_url \
-    CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_ME_BIN archive EC_url boarddir rom \
-    CONFIG_ME_BIN_PATH CONFIG_KBC1126_FIRMWARE _dest tree CONFIG_GBE_BIN_PATH \
-    CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW2_OFFSET \
-    CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_KBC1126_FW1 cbdir DL_url \
-    CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE nukemode \
-    CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB cbfstoolref \
-    CONFIG_REFCODE_BLOB_FILE vrelease verify _7ztest`
+    archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref vrelease \
+    verify _7ztest $cv`
 
 vendor_download()
 {
@@ -32,10 +34,22 @@ vendor_download()
 readkconfig()
 {
 	check_defconfig "$boarddir" 1>"$TMPDIR/vendorcfg.list" && return 1
+
+	rm -f "$TMPDIR/tmpcbcfg" || $err "!rm -f \"$TMPDIR/tmpcbcfg\""
 	while read -r cbcfgfile; do
-		set +u +e; . "$cbcfgfile" 2>/dev/null; set -u -e
+		for cbc in $cv; do
+			rm -f "$TMPDIR/tmpcbcfg2" || \
+			    $err "!rm $TMPDIR/tmpcbcfg2"
+			grep "$cbc" "$cbcfgfile" 1>"$TMPDIR/tmpcbcfg2" \
+			    2>/dev/null || :
+			[ -f "$TMPDIR/tmpcbcfg2" ] || continue
+			cat "$TMPDIR/tmpcbcfg2" >> "$TMPDIR/tmpcbcfg" || \
+			    $err "!cat $TMPDIR/tmpcbcfg2"
+		done
 	done < "$TMPDIR/vendorcfg.list"
 
+	eval `setcfg "$TMPDIR/tmpcbcfg"`
+
 	for c in CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
 	    CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW; do
 		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"

From 7ab22503abb790948f6367dea5c4742ff7df6c88 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sun, 11 Aug 2024 22:04:08 +0100
Subject: [PATCH 0809/1549] vendor.sh: use readkconfig on inject too

same as the last change. we must avoid use of make variables,
in sh specifically, when handling these configuration files.

Signed-off-by: Leah Rowe <info@minifree.org>
---
 include/vendor.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 5d2b91b3..03c7ad7d 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -299,7 +299,8 @@ patch_release_roms()
 
 patch_rom()
 {
-	rom="$1"; . "$(check_defconfig "$boarddir")" 2>/dev/null || exit 0
+	rom="$1"
+	readkconfig || exit 0
 
 	[ "$CONFIG_HAVE_MRC" = "y" ] && inject "mrc.bin" "$CONFIG_MRC_FILE" \
 	    "mrc" "0xfffa0000"

From 3ee4cc9ddec62276c374f8c7f0c0b3322cfaa9f6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sun, 11 Aug 2024 22:04:40 +0100
Subject: [PATCH 0810/1549] fix typo in dell latitude coreboot coreboot config

these configs were otherwise correct, but i typo'd a variable
in them when manually rebasing the old configs, after switching
to nicholas's new ports implemented as variants, where the old
ones in lbmk were individual board ports for those same boards.

Signed-off-by: Leah Rowe <info@minifree.org>
---
 config/coreboot/e5520_6mb/config/libgfxinit_corebootfb  | 2 +-
 config/coreboot/e5520_6mb/config/libgfxinit_txtmode     | 2 +-
 config/coreboot/e5530_12mb/config/libgfxinit_corebootfb | 2 +-
 config/coreboot/e5530_12mb/config/libgfxinit_txtmode    | 2 +-
 config/coreboot/e6420_10mb/config/libgfxinit_corebootfb | 2 +-
 config/coreboot/e6420_10mb/config/libgfxinit_txtmode    | 2 +-
 config/coreboot/e6430_12mb/config/libgfxinit_corebootfb | 2 +-
 config/coreboot/e6430_12mb/config/libgfxinit_txtmode    | 2 +-
 config/coreboot/e6520_10mb/config/libgfxinit_corebootfb | 2 +-
 config/coreboot/e6520_10mb/config/libgfxinit_txtmode    | 2 +-
 config/coreboot/e6530_12mb/config/libgfxinit_corebootfb | 2 +-
 config/coreboot/e6530_12mb/config/libgfxinit_txtmode    | 2 +-
 12 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
index 224ee424..42039c3c 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
@@ -132,7 +132,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
index 9c70c9e0..a271d1a3 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
@@ -130,7 +130,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
index db053aa8..1f4a19c2 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
@@ -132,7 +132,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
index 5ca8d4bf..790eab27 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
@@ -130,7 +130,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
index d0c2a21a..b9cbb411 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
@@ -132,7 +132,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
index 2c9e7d23..59f17c4b 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
@@ -130,7 +130,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index a5d4d087..1c0acd16 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -132,7 +132,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index af1daf77..8cd87d11 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -130,7 +130,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
index 49bec327..1e47fd5f 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
@@ -132,7 +132,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
index 0e4d85b6..0989ac0f 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
@@ -130,7 +130,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index acba20f6..2d18bd06 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -132,7 +132,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index 81c91426..fbaaa51d 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -130,7 +130,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/${VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"

From 8ca56f96c12241aa36add827c489aeeed5260e22 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 11 Aug 2024 23:09:25 +0100
Subject: [PATCH 0811/1549] coreboot/default: fix build issue with DDR2 fix

some of my DDR2 checks were unnecessary, as nicholas pointed
out on irc, because they were in places that only ran if
DDR2 memory was used anyway.

in another, valid place, I was checking the wrong variable for
knowing what memory type is used.

this patch fixes build errors in lbmk:

src/northbridge/intel/gm45/raminit.c: In function 'dram_program_timings':
src/northbridge/intel/gm45/raminit.c:1120:29: error: 'sysinfo' undeclared (first use in this function); did you mean 'sysinfo_t'?
 1120 |                         if (sysinfo->spd_type == DDR2)
      |                             ^~~~~~~
      |                             sysinfo_t
src/northbridge/intel/gm45/raminit.c:1120:29: note: each undeclared identifier is reported only once for each function it appears in
src/northbridge/intel/gm45/raminit.c: In function 'ddr2_odt_setup':
src/northbridge/intel/gm45/raminit.c:1291:21: error: 'sysinfo' undeclared (first use in this function); did you mean 'sysinfo_t'?
 1291 |                 if (sysinfo->spd_type == DDR2) {
      |                     ^~~~~~~
      |                     sysinfo_t
make: *** [Makefile:423: build/romstage/northbridge/intel/gm45/raminit.o] Error 1

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...nb-intel-gm45-Make-DDR2-raminit-work.patch | 43 +++----------------
 1 file changed, 7 insertions(+), 36 deletions(-)

diff --git a/config/coreboot/default/patches/0041-nb-intel-gm45-Make-DDR2-raminit-work.patch b/config/coreboot/default/patches/0041-nb-intel-gm45-Make-DDR2-raminit-work.patch
index 2f50be66..30af9273 100644
--- a/config/coreboot/default/patches/0041-nb-intel-gm45-Make-DDR2-raminit-work.patch
+++ b/config/coreboot/default/patches/0041-nb-intel-gm45-Make-DDR2-raminit-work.patch
@@ -1,7 +1,7 @@
-From 65510f6ea53d6f23f47df69d623810aa87041918 Mon Sep 17 00:00:00 2001
+From 88a9c562b77316f1217139e62425f9af1c351c6f Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Tue, 6 Aug 2024 00:50:24 +0100
-Subject: [PATCH 2/3] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
+Subject: [PATCH 41/59] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
 
 We add this patch:
 
@@ -27,12 +27,12 @@ Angel's patch, only when DDR3 memory is used.
 
 Signed-off-by: Leah Rowe <info@minifree.org>
 ---
- src/northbridge/intel/gm45/raminit.c          | 182 ++++++++++--------
+ src/northbridge/intel/gm45/raminit.c          | 161 +++++++++---------
  .../intel/gm45/raminit_rcomp_calibration.c    |   9 +-
- 2 files changed, 104 insertions(+), 87 deletions(-)
+ 2 files changed, 88 insertions(+), 82 deletions(-)
 
 diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
-index df8f46fbbc..b051374eaa 100644
+index df8f46fbbc..433db3a68c 100644
 --- a/src/northbridge/intel/gm45/raminit.c
 +++ b/src/northbridge/intel/gm45/raminit.c
 @@ -1117,7 +1117,10 @@ static void dram_program_timings(const int spd_type, const timings_t *const timi
@@ -40,43 +40,14 @@ index df8f46fbbc..b051374eaa 100644
  			else
  				reg = (reg & ~(0xf << 10)) | (3 << 10);
 -			reg = (reg & ~(0x7 <<  5)) | (2 << 5);
-+			if (sysinfo->spd_type == DDR2)
++			if (spd_type == DDR2)
 +				reg = (reg & ~(0x7 <<  5)) | (2 << 5);
 +			else
 +				reg = (reg & ~(0x7 <<  5)) | (3 << 5);
  		} else if (timings->mem_clock != MEM_CLOCK_1067MT) {
  			reg = (reg & ~(0x7 << 15)) | ((9 - timings->CAS) << 15);
  			reg = (reg & ~(0xf << 10)) | ((timings->CAS - 3) << 10);
-@@ -1285,12 +1288,23 @@ static void ddr2_odt_setup(const timings_t *const timings, const int sff)
- 		reg = (reg & ~(0x7 << (48 - 32))) | ((timings->CAS - 2) << (48 - 32));
- 		reg = (reg & ~(0xf << (44 - 32))) | (8 << (44 - 32));
- 		reg = (reg & ~(0xf << (40 - 32))) | (7 << (40 - 32));
--		if (timings->mem_clock == MEM_CLOCK_667MT) {
--			reg = (reg & ~(0xf << (36 - 32))) | (8 << (36 - 32));
--			reg = (reg & ~(0xf << (32 - 32))) | (8 << (32 - 32));
-+		if (sysinfo->spd_type == DDR2) {
-+			if (timings->mem_clock == MEM_CLOCK_667MT) {
-+				reg = (reg & ~(0xf << (36 - 32))) | (8 << (36 - 32));
-+				reg = (reg & ~(0xf << (32 - 32))) | (8 << (32 - 32));
-+			} else {
-+				reg = (reg & ~(0xf << (36 - 32))) | (9 << (36 - 32));
-+				reg = (reg & ~(0xf << (32 - 32))) | (9 << (32 - 32));
-+			}
- 		} else {
--			reg = (reg & ~(0xf << (36 - 32))) | (9 << (36 - 32));
--			reg = (reg & ~(0xf << (32 - 32))) | (9 << (32 - 32));
-+			/* DDR3 */
-+			if (timings->mem_clock == MEM_CLOCK_667MT) {
-+				reg = (reg & ~(0xf << (36 - 32))) | (4 << (36 - 32));
-+				reg = (reg & ~(0xf << (32 - 32))) | (4 << (32 - 32));
-+			} else {
-+				reg = (reg & ~(0xf << (36 - 32))) | (5 << (36 - 32));
-+				reg = (reg & ~(0xf << (32 - 32))) | (5 << (32 - 32));
-+			}
- 		}
- 		mchbar_write32(CxODT_HIGH(ch), reg);
- 
-@@ -2209,83 +2223,85 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
+@@ -2209,83 +2212,85 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
  		raminit_write_training(timings->mem_clock, dimms, s3resume);
  	}
  

From 3f9d575cebc377de8eae7fe0406e7e8549318964 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 Aug 2024 02:19:38 +0100
Subject: [PATCH 0812/1549] coreboot/x4x: fix build error

see relevant patch added in the diff

set the clock on x4x boards to 96MHz like on GM45

fixes the following build error on x4x boards:

hw-gfx-gma-plls.adb:465:46: error: "INTEL_GMA_DPLL_REF_FREQ" not declared in "Config"
make: *** [Makefile:423: build/ramstage/libgfxinit/common/g45/hw-gfx-gma-plls.o] Error 1

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...b-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch | 52 +++++++++++++++++++
 .../g43t_am3/config/libgfxinit_txtmode        |  1 +
 .../g43t_am3_16mb/config/libgfxinit_txtmode   |  1 +
 .../ga_g41m_es2l/config/libgfxinit_txtmode    |  1 +
 4 files changed, 55 insertions(+)
 create mode 100644 config/coreboot/default/patches/0060-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch

diff --git a/config/coreboot/default/patches/0060-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch b/config/coreboot/default/patches/0060-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
new file mode 100644
index 00000000..21b0d40c
--- /dev/null
+++ b/config/coreboot/default/patches/0060-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
@@ -0,0 +1,52 @@
+From f52188b46ce60383b67aeea2bda7ec52d631c822 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Mon, 12 Aug 2024 02:15:24 +0100
+Subject: [PATCH 1/1] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
+
+set it to 96MHz. fixes the following build error when
+building for x4x boards e.g. gigabyte ga-g41m-es2l:
+
+hw-gfx-gma-plls.adb:465:46: error: "INTEL_GMA_DPLL_REF_FREQ" not declared in "Config"
+make: *** [Makefile:423: build/ramstage/libgfxinit/common/g45/hw-gfx-gma-plls.o] Error 1
+
+this error was introduced when merging coreboot/dell
+into coreboot/default in lbmk. nicholas chin's fix in lbmk
+was as follows:
+
+commit 8629873a6043067affc137be275b7aa69cb1f10c
+Author: Nicholas Chin <nic.c3.14@gmail.com>
+Date:   Mon May 20 10:46:25 2024 -0600
+
+    Fix E6400 display issue with 1440 x 900 panel
+
+this currently corresponds to the patch in lbmk,
+as of 12 august 2024:
+
+0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
+
+The assumption prior to Nicholas's fix was 96MHz, so set
+it accordingly on x4x northbridge.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/northbridge/intel/x4x/Kconfig | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
+index 9af063819b..93ba575b95 100644
+--- a/src/northbridge/intel/x4x/Kconfig
++++ b/src/northbridge/intel/x4x/Kconfig
+@@ -14,6 +14,10 @@ config NORTHBRIDGE_INTEL_X4X
+ 
+ if NORTHBRIDGE_INTEL_X4X
+ 
++config INTEL_GMA_DPLL_REF_FREQ
++	int
++	default 96000000
++
+ config CBFS_SIZE
+ 	default 0x100000 if !SOUTHBRIDGE_INTEL_I82801GX
+ 
+-- 
+2.39.2
+
diff --git a/config/coreboot/g43t_am3/config/libgfxinit_txtmode b/config/coreboot/g43t_am3/config/libgfxinit_txtmode
index 42abd3a3..cca1ebda 100644
--- a/config/coreboot/g43t_am3/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t_am3/config/libgfxinit_txtmode
@@ -137,6 +137,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
index f7c5ade5..563a47c7 100644
--- a/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
@@ -137,6 +137,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
diff --git a/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode b/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode
index e444f300..ade6b308 100644
--- a/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode
+++ b/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode
@@ -135,6 +135,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"

From 875e9cb2554a529d7a3b91a8a60782a7159ff516 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 29 May 2024 13:49:16 -0600
Subject: [PATCH 0813/1549] config/coreboot: Add config for Dell Latitude E6220

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 .../e6220_10mb/config/libgfxinit_corebootfb   | 639 ++++++++++++++++++
 .../e6220_10mb/config/libgfxinit_txtmode      | 636 +++++++++++++++++
 config/coreboot/e6220_10mb/target.cfg         |   7 +
 3 files changed, 1282 insertions(+)
 create mode 100644 config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/e6220_10mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/e6220_10mb/target.cfg

diff --git a/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..67f0dc85
--- /dev/null
+++ b/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
@@ -0,0 +1,639 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6220"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
+CONFIG_VGA_BIOS_ID="8086,0126"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x9E8000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e6220"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6220=y
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6220"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=10240
+CONFIG_ROM_SIZE=0x00a00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6220_10mb/config/libgfxinit_txtmode b/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..d2ae2afa
--- /dev/null
+++ b/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
@@ -0,0 +1,636 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6220"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
+CONFIG_VGA_BIOS_ID="8086,0126"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x9E8000
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e6220"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6220=y
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6220"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=10240
+CONFIG_ROM_SIZE=0x00a00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6220_10mb/target.cfg b/config/coreboot/e6220_10mb/target.cfg
new file mode 100644
index 00000000..4201beb1
--- /dev/null
+++ b/config/coreboot/e6220_10mb/target.cfg
@@ -0,0 +1,7 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
+vcfg="sandybridge"

From 0240be18332e61e81a6a1711b282ccbb071d7465 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 29 May 2024 13:49:42 -0600
Subject: [PATCH 0814/1549] config/coreboot: Add config for Dell Latitude E6320

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 .../e6320_10mb/config/libgfxinit_corebootfb   | 639 ++++++++++++++++++
 .../e6320_10mb/config/libgfxinit_txtmode      | 636 +++++++++++++++++
 config/coreboot/e6320_10mb/target.cfg         |   7 +
 3 files changed, 1282 insertions(+)
 create mode 100644 config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/e6320_10mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/e6320_10mb/target.cfg

diff --git a/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..c1abffcf
--- /dev/null
+++ b/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
@@ -0,0 +1,639 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6320"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
+CONFIG_VGA_BIOS_ID="8086,0126"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x9E8000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e6320"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6320=y
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6320"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=10240
+CONFIG_ROM_SIZE=0x00a00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6320_10mb/config/libgfxinit_txtmode b/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..17fe9e73
--- /dev/null
+++ b/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
@@ -0,0 +1,636 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6320"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
+CONFIG_VGA_BIOS_ID="8086,0126"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x9E8000
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e6320"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6320=y
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6320"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=10240
+CONFIG_ROM_SIZE=0x00a00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6320_10mb/target.cfg b/config/coreboot/e6320_10mb/target.cfg
new file mode 100644
index 00000000..4201beb1
--- /dev/null
+++ b/config/coreboot/e6320_10mb/target.cfg
@@ -0,0 +1,7 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
+vcfg="sandybridge"

From f51a9dee95abbf36bf016ecf3f942b50f61e732b Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 29 May 2024 13:52:09 -0600
Subject: [PATCH 0815/1549] config/coreboot: Add config for Dell Latitude E6330

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 .../e6330_12mb/config/libgfxinit_corebootfb   | 639 ++++++++++++++++++
 .../e6330_12mb/config/libgfxinit_txtmode      | 636 +++++++++++++++++
 config/coreboot/e6330_12mb/target.cfg         |   7 +
 3 files changed, 1282 insertions(+)
 create mode 100644 config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/e6330_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/e6330_12mb/target.cfg

diff --git a/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..551e083f
--- /dev/null
+++ b/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,639 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6330"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xBE5000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e6330"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6330=y
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6330"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6330_12mb/config/libgfxinit_txtmode b/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..580cf2db
--- /dev/null
+++ b/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,636 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6330"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xBE5000
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e6330"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6330=y
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6330"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6330_12mb/target.cfg b/config/coreboot/e6330_12mb/target.cfg
new file mode 100644
index 00000000..2556a4ce
--- /dev/null
+++ b/config/coreboot/e6330_12mb/target.cfg
@@ -0,0 +1,7 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
+vcfg="ivybridge"

From 73484d98ac7ce8380cc8aa0e936e1d6687725432 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 29 May 2024 13:55:40 -0600
Subject: [PATCH 0816/1549] config/coreboot: Add config for Dell Latitude E6230

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 .../e6230_12mb/config/libgfxinit_corebootfb   | 639 ++++++++++++++++++
 .../e6230_12mb/config/libgfxinit_txtmode      | 636 +++++++++++++++++
 config/coreboot/e6230_12mb/target.cfg         |   7 +
 3 files changed, 1282 insertions(+)
 create mode 100644 config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/e6230_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/e6230_12mb/target.cfg

diff --git a/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..a55d06a7
--- /dev/null
+++ b/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,639 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6230"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xBE5000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e6230"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6230=y
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6230"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6230_12mb/config/libgfxinit_txtmode b/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..7ebf6f66
--- /dev/null
+++ b/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,636 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6230"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xBE5000
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e6230"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6230=y
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6230"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6230_12mb/target.cfg b/config/coreboot/e6230_12mb/target.cfg
new file mode 100644
index 00000000..2556a4ce
--- /dev/null
+++ b/config/coreboot/e6230_12mb/target.cfg
@@ -0,0 +1,7 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
+vcfg="ivybridge"

From 4702e568c340e6cd7d3fb2a24fcbc5b0502a1de2 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Tue, 13 Aug 2024 22:28:05 -0600
Subject: [PATCH 0817/1549] config/coreboot: Fix INTEL_GMA_VBT_FILE in Latitude
 configs

Commit 3ee4cc9ddec62276c374f8c7f0c0b3322cfaa9f6 (fix typo in dell
latitude coreboot coreboot config) fixed a typo from ${VARIANT_DIR) to
$(CONFIG_VARIANT_DIR). While this does work, since CONFIG_VARIANT_DIR is
a valid variable, it is not technically correct, as the default VBT path
set by coreboot's Kconfig files uses $(VARIANT_DIR), which is the same
as CONFIG_VARIANT_DIR, but with quotes stripped out.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 config/coreboot/e5520_6mb/config/libgfxinit_corebootfb  | 2 +-
 config/coreboot/e5520_6mb/config/libgfxinit_txtmode     | 2 +-
 config/coreboot/e5530_12mb/config/libgfxinit_corebootfb | 2 +-
 config/coreboot/e5530_12mb/config/libgfxinit_txtmode    | 2 +-
 config/coreboot/e6420_10mb/config/libgfxinit_corebootfb | 2 +-
 config/coreboot/e6420_10mb/config/libgfxinit_txtmode    | 2 +-
 config/coreboot/e6430_12mb/config/libgfxinit_corebootfb | 2 +-
 config/coreboot/e6430_12mb/config/libgfxinit_txtmode    | 2 +-
 config/coreboot/e6520_10mb/config/libgfxinit_corebootfb | 2 +-
 config/coreboot/e6520_10mb/config/libgfxinit_txtmode    | 2 +-
 config/coreboot/e6530_12mb/config/libgfxinit_corebootfb | 2 +-
 config/coreboot/e6530_12mb/config/libgfxinit_txtmode    | 2 +-
 12 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
index 42039c3c..ec450455 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
@@ -132,7 +132,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
index a271d1a3..d4fb8a5d 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
@@ -130,7 +130,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
index 1f4a19c2..11ab7ac8 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
@@ -132,7 +132,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
index 790eab27..861444cf 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
@@ -130,7 +130,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
index b9cbb411..074aa0fd 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
@@ -132,7 +132,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
index 59f17c4b..9b5f0d47 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
@@ -130,7 +130,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 1c0acd16..101b8b6e 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -132,7 +132,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index 8cd87d11..96e9fcc9 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -130,7 +130,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
index 1e47fd5f..a1f675d2 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
@@ -132,7 +132,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
index 0989ac0f..92213d48 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
@@ -130,7 +130,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index 2d18bd06..060d9b39 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -132,7 +132,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index fbaaa51d..5b504b7c 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -130,7 +130,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"

From 72fa467cb79f7c42d61434e9ff2491e235ee37f5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 31 Aug 2024 01:17:57 +0100
Subject: [PATCH 0818/1549] vendor.sh: print extract errors to /dev/null

the output isn't really super critical, because it pertains
to files that would just result in a coreboot build error
if they didn't extract, which would still allow me to know
if a given extract function failed.

however, the extract function shows a lot of error output
because it literally bruteforces various extract methods,
when dealing with vendor files.

mitigate this by just printing the errors to /dev/null. this
will prevent users from erroneously thinking that lbmk is
operating under error condition, when it isn't. we do sometimes
get questions about it on irc.

fewer questions on irc is better.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 03c7ad7d..15514c91 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -143,8 +143,9 @@ extract_intel_me()
 
 extract_archive()
 {
-	innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
-	    "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
+	innoextract "$1" -d "$2" 2>/dev/null || python "$pfs_extract" "$1" \
+	    -e 2>/dev/null || 7z x "$1" -o"$2" 2>/dev/null || unar "$1" -o \
+	    "$2" 2>/dev/null || unzip "$1" -d "$2" 2>/dev/null || return 1
 }
 
 extract_kbc1126ec()

From 242b79aa254c3cf484b236e82d8af705c1d9ec36 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 5 Sep 2024 19:46:37 +0100
Subject: [PATCH 0819/1549] Revert "vendor.sh: print extract errors to
 /dev/null"

This reverts commit 72fa467cb79f7c42d61434e9ff2491e235ee37f5.
---
 include/vendor.sh | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 15514c91..03c7ad7d 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -143,9 +143,8 @@ extract_intel_me()
 
 extract_archive()
 {
-	innoextract "$1" -d "$2" 2>/dev/null || python "$pfs_extract" "$1" \
-	    -e 2>/dev/null || 7z x "$1" -o"$2" 2>/dev/null || unar "$1" -o \
-	    "$2" 2>/dev/null || unzip "$1" -d "$2" 2>/dev/null || return 1
+	innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
+	    "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
 }
 
 extract_kbc1126ec()

From 0266a4891328c22050e09f41d79fac5ef161efca Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 24 Sep 2024 13:41:01 +0100
Subject: [PATCH 0820/1549] Add Mate Kukri's deguard utility

This program disables the Intel Boot Guard on Dell
OptiPlex 3050 Micro, via Intel ME modification.

Using this hack, you can run unsigned code on the ME.
Mate disabled BootGuard this way.

This will be used to add Dell OptiPlex 3050 Micro
support in Libreboot.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/deguard/pkg.cfg | 3 +++
 1 file changed, 3 insertions(+)
 create mode 100644 config/git/deguard/pkg.cfg

diff --git a/config/git/deguard/pkg.cfg b/config/git/deguard/pkg.cfg
new file mode 100644
index 00000000..3da47380
--- /dev/null
+++ b/config/git/deguard/pkg.cfg
@@ -0,0 +1,3 @@
+rev="fc4c59ac35e6f38c195214d71340a6adade2689f"
+url="https://review.coreboot.org/deguard"
+bkup_url="https://codeberg.org/libreboot/deguard"

From e7c0109f5d97eb8eeaa2e2404be6bea2c56f1e0d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 24 Sep 2024 16:47:21 +0100
Subject: [PATCH 0821/1549] Add deguard logic for Dell OptiPlex 3050 Micro

Copy the downloaded deguard source code into appdir,
and patch it to run as part of lbmk, instead of
standalone. The archived one in src/ is not directly
used; instead, the hotpatched version is used.

This is because the standalone version already has
download logic for the .zip file, but we already
cache that file in cache/ and use that.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/deguard/appdir.patch | 131 +++++++++++++++++++++++++++++++
 config/vendor/3050micro/pkg.cfg  |   4 +
 include/vendor.sh                |  33 +++++++-
 3 files changed, 167 insertions(+), 1 deletion(-)
 create mode 100644 config/data/deguard/appdir.patch
 create mode 100644 config/vendor/3050micro/pkg.cfg

diff --git a/config/data/deguard/appdir.patch b/config/data/deguard/appdir.patch
new file mode 100644
index 00000000..722a6168
--- /dev/null
+++ b/config/data/deguard/appdir.patch
@@ -0,0 +1,131 @@
+From b978cbb651a4bdd84be4a92ae240c8ca99ef21eb Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 24 Sep 2024 16:44:51 +0100
+Subject: [PATCH 1/1] Patch to integrate with lbmk
+
+Deguard is a standalone utility, but the way it works
+doesn't integrate well with lbmk.
+
+Remove the download logic, because lbmk already downloads
+the requisite zip file.
+
+Also not required, but nice, and included in this patch:
+
+Detect what python version is available, and make sure it's
+python 3.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ RUNME.sh | 64 +++++++++++++++++++++++++++++++-------------------------
+ 1 file changed, 36 insertions(+), 28 deletions(-)
+
+diff --git a/RUNME.sh b/RUNME.sh
+index 9809f89..7404ba6 100755
+--- a/RUNME.sh
++++ b/RUNME.sh
+@@ -1,25 +1,33 @@
+ #!/bin/sh
+ # SPDX-License-Identifier: GPL-2.0-only
+ 
++# This version of deguard is patched to integrate with lbmk.
++# Do not run this version standalone. Please use src/deguard/ instead.
++
+ set -e
+ 
+-if [ ! -f "me.bin" ]; then
+-	wget "https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip"
+-	unzip "H110M-DGS(7.30)ROM.zip" H11MDGS7.30
+-	rm "H110M-DGS(7.30)ROM.zip"
+-	dd if=H11MDGS7.30 of=me.bin skip=1 count=511 bs=4096
+-	rm H11MDGS7.30
++pyver="2"
++python="python3"
++which python3 || python="python"
++which $python || pyver=""
++[ -n "$pyver" ] && pyver="$($python --version | awk '{print $2}')"
++if [ "${pyver%%.*}" != "3" ]; then
++	printf "Wrong python version, or python missing. Must be python 3.\n" 1>&2
++	exit 1
+ fi
+ 
++rm -f me.bin MFS.part
++dd if=../H11MDGS7.30 of=me.bin skip=1 count=511 bs=4096
++
+ dd if=me.bin of=MFS.part skip=168 count=100 bs=4096
+ 
+ # Extract file number 7 (fitc.cfg)
+-python3 MFSUtil.py -m MFS.part -x -i 7 -o fitc.cfg
++$python MFSUtil.py -m MFS.part -x -i 7 -o fitc.cfg
+ 
+ # Remove /home/mca/eom
+-python3 MFSUtil.py -c fitc.cfg -r -f /home/mca/eom -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg -r -f /home/mca/eom -o fitc.cfg
+ # Remove /home/bup/ct
+-python3 MFSUtil.py -c fitc.cfg -r -f /home/bup/ct -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg -r -f /home/bup/ct -o fitc.cfg
+ 
+ # list off files differing in optiplex 3050 fw vs donor
+ files="
+@@ -39,40 +47,40 @@ secureboot/pubkeyhash
+ 
+ for i in $files
+ do
+-	python3 MFSUtil.py -c fitc.cfg -r -f /home/$i -o fitc.cfg
++	$python MFSUtil.py -c fitc.cfg -r -f /home/$i -o fitc.cfg
+ done
+ 
+ # Add /home/mca/eom
+ dd if=/dev/zero of=eom count=1 bs=1
+-python3 MFSUtil.py -c fitc.cfg --add eom --alignment 2 --mode ' --Irw-r-----' \
++$python MFSUtil.py -c fitc.cfg --add eom --alignment 2 --mode ' --Irw-r-----' \
+ 	--opt '?!-F' --uid 0 --gid 238 -f /home/mca/eom -o fitc.cfg
+ 
+ # Add /home/bup/ct
+-python3 gen_shellcode.py -p H -v 11.6.0.1126 --fake-fpfs=fpfs/optiplex_3050 -o ct
+-python3 MFSUtil.py -c fitc.cfg --add ct  --alignment 2 --mode ' ---rwxr-----' \
++$python gen_shellcode.py -p H -v 11.6.0.1126 --fake-fpfs=fpfs/optiplex_3050 -o ct
++$python MFSUtil.py -c fitc.cfg --add ct  --alignment 2 --mode ' ---rwxr-----' \
+ 	--opt '?--F' --uid 3 --gid 351 -f /home/bup/ct -o fitc.cfg
+ 
+ # Add dell files
+-python3 MFSUtil.py -c fitc.cfg --add data/emu_fuse_map --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=3  --gid=238 -f /home/bup/bup_sku/emu_fuse_map -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/plat_n_sku   --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=3  --gid=238 -f /home/bup/bup_sku/plat_n_sku -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/fwuoemid     --alignment 2 --mode=' ---rw-rw----' --opt='?--F' --uid=32 --gid=238 -f /home/fwupdate/fwuoemid -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/prof0        --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=55 --gid=238 -f /home/icc/prof0 -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/device_ports --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=73 --gid=238 -f /home/mctp/device_ports -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/hdcp_ports   --alignment 2 --mode=' -EIrw-r-----' --opt='?!-F' --uid=80 --gid=238 -f /home/pavp/hdcp_ports -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/cfg_rules    --alignment 2 --mode=' ---rw-rw----' --opt='-!MF' --uid=85 --gid=238 -f /home/policy/cfgmgr/cfg_rules -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/bootpolres   --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/bootpolres -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/bootpoltype  --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/bootpoltype -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/enfpolicy    --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/enfpolicy -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/kmid         --alignment 2 --mode=' ---rw-r-----' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/kmid -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/pubkeyhash   --alignment 2 --mode=' ---rw-rw-r--' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/pubkeyhash -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/emu_fuse_map --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=3  --gid=238 -f /home/bup/bup_sku/emu_fuse_map -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/plat_n_sku   --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=3  --gid=238 -f /home/bup/bup_sku/plat_n_sku -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/fwuoemid     --alignment 2 --mode=' ---rw-rw----' --opt='?--F' --uid=32 --gid=238 -f /home/fwupdate/fwuoemid -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/prof0        --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=55 --gid=238 -f /home/icc/prof0 -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/device_ports --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=73 --gid=238 -f /home/mctp/device_ports -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/hdcp_ports   --alignment 2 --mode=' -EIrw-r-----' --opt='?!-F' --uid=80 --gid=238 -f /home/pavp/hdcp_ports -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/cfg_rules    --alignment 2 --mode=' ---rw-rw----' --opt='-!MF' --uid=85 --gid=238 -f /home/policy/cfgmgr/cfg_rules -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/bootpolres   --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/bootpolres -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/bootpoltype  --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/bootpoltype -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/enfpolicy    --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/enfpolicy -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/kmid         --alignment 2 --mode=' ---rw-r-----' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/kmid -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/pubkeyhash   --alignment 2 --mode=' ---rw-rw-r--' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/pubkeyhash -o fitc.cfg
+ 
+ # Delete file id 7 (fitc.cfg) from the MFS partition
+-python3 MFSUtil.py -m MFS.part -r -i 7 -o MFS.part
++$python MFSUtil.py -m MFS.part -r -i 7 -o MFS.part
+ # Delete file id 8 (home) from the MFS partition
+-python3 MFSUtil.py -m MFS.part -r -i 8 -o MFS.part
++$python MFSUtil.py -m MFS.part -r -i 8 -o MFS.part
+ 
+ # Add the modified fitc.cfg into the MFS partition
+-python3 MFSUtil.py -m MFS.part -a fitc.cfg --deoptimize -i 7 -o MFS.part
++$python MFSUtil.py -m MFS.part -a fitc.cfg --deoptimize -i 7 -o MFS.part
+ 
+ # Write
+ dd conv=notrunc if=MFS.part of=me.bin seek=168 count=100 bs=4096
+-- 
+2.39.5
+
diff --git a/config/vendor/3050micro/pkg.cfg b/config/vendor/3050micro/pkg.cfg
new file mode 100644
index 00000000..f1f7860b
--- /dev/null
+++ b/config/vendor/3050micro/pkg.cfg
@@ -0,0 +1,4 @@
+DL_hash="976bbb1e625f64df276d8343757d910c88b8a781f953bc2c41a7dd15184ec70d55f8081de2a0aaa83cddb8e73bdc2df6288fde6e0897e4928c48ca4bb30bea2d"
+DL_url="https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip"
+DL_url_bkup="https://web.archive.org/web/20230822134231/https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip"
+ME_bootguard="me11disreguard"
diff --git a/include/vendor.sh b/include/vendor.sh
index 03c7ad7d..c5b6560d 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -23,7 +23,7 @@ eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     E6400_VGA_romname SCH5545EC_DL_url_bkup SCH5545EC_DL_hash _dest tree \
     mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl SCH5545EC_DL_url \
     archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref vrelease \
-    verify _7ztest $cv`
+    verify _7ztest ME_bootguard $cv`
 
 vendor_download()
 {
@@ -107,6 +107,14 @@ extract_intel_me()
 	e "$mecleaner" f not && $err "$cbdir: me_cleaner missing"
 
 	_me="$PWD/$_dest"; cdir="$PWD/$appdir"
+	if [ "$ME_bootguard" = "me11disreguard" ]; then
+		# run mkukri's util to extract me.bin and disable bootguard
+		# for Dell OptiPlex 3050 Micro, using the deguard util.
+		extract_deguard_me "$cdir" "$_me"
+		return 0
+	fi
+	# All other ME setups are extracted with brute force and me_cleaner:
+
 	[ $# -gt 0 ] && _me="${1}" && cdir="$2"
 
 	e "$_me" f && return 0
@@ -141,6 +149,29 @@ extract_intel_me()
 	rm -Rf "$sdir" || $err "extract_intel_me: !rm -Rf $sdir"
 }
 
+extract_deguard_me()
+{
+	x_ ./mk -f deguard
+	cp -R src/deguard "$1/disreguard" || \
+	    $err "Cannot make temporary deguard clone in $1/disreguard"
+	if [ ! -e "$1/disreguard/.git" ]; then
+		git -C "$1/disreguard" init || $err "!init $1/disreguard"
+		git -C "$1/disreguard" add -A . || $err "!add $1/disreguard"
+		git -C "$1/disreguard" commit -m "tmp" || \
+		    $err "!commit $1/disreguard"
+	fi
+	git -C "$1/disreguard" am config/data/deguard/appdir.patch || \
+	    $err "Cannot temporarily patch deguard clone in $1/disreguard"
+	(
+	cd "$1/disreguard" || $err "Cannot cd to '$1/disreguard'"
+	x_ ./RUNME.sh
+	)
+	"$mecleaner" --whitelist MFS --truncate "$1/disreguard/me.bin" || \
+	    $err "extract_intel_me: Can't truncate disreguarded ME"
+	cp "$cdir/disreguard/me.bin" "$2" || \
+	    $err "extract_intel_me: Can't move disreguarded me.bin"
+}
+
 extract_archive()
 {
 	innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \

From c723ce56d2ae228fb0ead686ad0c6fa6e2a92c36 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 24 Sep 2024 20:31:12 +0100
Subject: [PATCH 0822/1549] coreboot/default: Import mkukri's 3050 micro port

Dell OptiPlex 3050 Micro

I ran ./mk -u coreboot, to update existing configs
after merging. Actualy IFD and coreboot configs will
be done in the next revision. I've already added logic
for handling deguard, in preparation for this.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../0061-WIP-OptiPlex-3050-Micro-port.patch   | 932 ++++++++++++++++++
 .../config/libgfxinit_corebootfb              |   1 +
 .../config/libgfxinit_txtmode                 |   1 +
 .../config/libgfxinit_corebootfb              |   1 +
 .../config/libgfxinit_txtmode                 |   1 +
 .../e5420_6mb/config/libgfxinit_corebootfb    |   1 +
 .../e5420_6mb/config/libgfxinit_txtmode       |   1 +
 .../e5520_6mb/config/libgfxinit_corebootfb    |   1 +
 .../e5520_6mb/config/libgfxinit_txtmode       |   1 +
 .../e5530_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e5530_12mb/config/libgfxinit_txtmode      |   1 +
 .../e6220_10mb/config/libgfxinit_corebootfb   |   1 +
 .../e6220_10mb/config/libgfxinit_txtmode      |   1 +
 .../e6230_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e6230_12mb/config/libgfxinit_txtmode      |   1 +
 .../e6320_10mb/config/libgfxinit_corebootfb   |   1 +
 .../e6320_10mb/config/libgfxinit_txtmode      |   1 +
 .../e6330_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e6330_12mb/config/libgfxinit_txtmode      |   1 +
 .../e6400_4mb/config/libgfxinit_corebootfb    |   1 +
 .../e6400_4mb/config/libgfxinit_txtmode       |   1 +
 config/coreboot/e6400nvidia_4mb/config/normal |   1 +
 .../e6420_10mb/config/libgfxinit_corebootfb   |   1 +
 .../e6420_10mb/config/libgfxinit_txtmode      |   1 +
 .../e6430_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e6430_12mb/config/libgfxinit_txtmode      |   1 +
 .../e6520_10mb/config/libgfxinit_corebootfb   |   1 +
 .../e6520_10mb/config/libgfxinit_txtmode      |   1 +
 .../e6530_12mb/config/libgfxinit_corebootfb   |   1 +
 .../e6530_12mb/config/libgfxinit_txtmode      |   1 +
 .../t1650_12mb/config/libgfxinit_txtmode      |   1 +
 31 files changed, 962 insertions(+)
 create mode 100644 config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch

diff --git a/config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch b/config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch
new file mode 100644
index 00000000..b09dac46
--- /dev/null
+++ b/config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch
@@ -0,0 +1,932 @@
+From 76a22c32d673f7e9afe66424512035586433a78c Mon Sep 17 00:00:00 2001
+From: Mate Kukri <kukri.mate@gmail.com>
+Date: Sun, 14 Jul 2024 14:24:12 +0100
+Subject: [PATCH 1/1] [WIP] OptiPlex 3050 Micro port
+
+- Boots Linux
+- SMSC SCH5553 SIO/EC
+  + Early EC init + HWM init implemented
+  + Console on serial port tested
+  + TODO: late HWM init for fan control (fan runs at low speed now)
+- Realtek Gigabit LAN works
+- WiFi slot works
+- NVMe SSD slot works
+- Extra: LPSS UART0
+  + Stock FW sets undocumented power gating bit, RTC battery needs to
+    be pulled for it to work.
+  + Signals exposed on test points on the back of the board.
+    FIXME: add documentation about this
+- Needs 'deguard' to bypass BootGuard
+  + See https://review.coreboot.org/plugins/gitiles/deguard
+- TODO: HDA verbs
+- TODO: USB ports
+- TODO: Add VBT
+- Currently limited to the Micro form factor, but others are very
+  similar
+
+Change-Id: I8d443e39ee684a4eaa19c835a945cfe569c051e2
+Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
+---
+ src/mainboard/dell/optiplex_3050/Kconfig      |  34 +++
+ src/mainboard/dell/optiplex_3050/Kconfig.name |   4 +
+ src/mainboard/dell/optiplex_3050/Makefile.mk  |   9 +
+ src/mainboard/dell/optiplex_3050/acpi/ec.asl  |   3 +
+ .../dell/optiplex_3050/acpi/superio.asl       |   3 +
+ .../dell/optiplex_3050/board_info.txt         |   7 +
+ src/mainboard/dell/optiplex_3050/bootblock.c  | 107 ++++++++
+ src/mainboard/dell/optiplex_3050/cmos.default |   5 +
+ src/mainboard/dell/optiplex_3050/cmos.layout  |  54 ++++
+ .../dell/optiplex_3050/devicetree.cb          | 123 +++++++++
+ src/mainboard/dell/optiplex_3050/dsdt.asl     |  27 ++
+ .../dell/optiplex_3050/gma-mainboard.ads      |  19 ++
+ .../dell/optiplex_3050/include/early_gpio.h   |  11 +
+ .../dell/optiplex_3050/include/gpio.h         | 241 ++++++++++++++++++
+ src/mainboard/dell/optiplex_3050/ramstage.c   |  17 ++
+ src/mainboard/dell/optiplex_3050/romstage.c   |  26 ++
+ src/mainboard/dell/optiplex_3050/sch5555_ec.c |  54 ++++
+ src/mainboard/dell/optiplex_3050/sch5555_ec.h |  10 +
+ 18 files changed, 754 insertions(+)
+ create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig
+ create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig.name
+ create mode 100644 src/mainboard/dell/optiplex_3050/Makefile.mk
+ create mode 100644 src/mainboard/dell/optiplex_3050/acpi/ec.asl
+ create mode 100644 src/mainboard/dell/optiplex_3050/acpi/superio.asl
+ create mode 100644 src/mainboard/dell/optiplex_3050/board_info.txt
+ create mode 100644 src/mainboard/dell/optiplex_3050/bootblock.c
+ create mode 100644 src/mainboard/dell/optiplex_3050/cmos.default
+ create mode 100644 src/mainboard/dell/optiplex_3050/cmos.layout
+ create mode 100644 src/mainboard/dell/optiplex_3050/devicetree.cb
+ create mode 100644 src/mainboard/dell/optiplex_3050/dsdt.asl
+ create mode 100644 src/mainboard/dell/optiplex_3050/gma-mainboard.ads
+ create mode 100644 src/mainboard/dell/optiplex_3050/include/early_gpio.h
+ create mode 100644 src/mainboard/dell/optiplex_3050/include/gpio.h
+ create mode 100644 src/mainboard/dell/optiplex_3050/ramstage.c
+ create mode 100644 src/mainboard/dell/optiplex_3050/romstage.c
+ create mode 100644 src/mainboard/dell/optiplex_3050/sch5555_ec.c
+ create mode 100644 src/mainboard/dell/optiplex_3050/sch5555_ec.h
+
+diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
+new file mode 100644
+index 0000000000..763acda0b2
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/Kconfig
+@@ -0,0 +1,34 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++if BOARD_DELL_OPTIPLEX_3050
++
++config BOARD_SPECIFIC_OPTIONS
++	def_bool y
++	select BOARD_ROMSIZE_KB_16384
++	select HAVE_ACPI_RESUME
++	select HAVE_ACPI_TABLES
++	select HAVE_CMOS_DEFAULT
++	select HAVE_OPTION_TABLE
++	# select INTEL_GMA_HAVE_VBT
++	select MAINBOARD_HAS_LIBGFXINIT
++	select MAINBOARD_HAS_TPM2
++	select MAINBOARD_SUPPORTS_KABYLAKE_CPU
++	select MAINBOARD_SUPPORTS_SKYLAKE_CPU
++	select MEMORY_MAPPED_TPM
++	select SKYLAKE_SOC_PCH_H
++	select SOC_INTEL_KABYLAKE
++	select SUPERIO_SMSC_SCH555x
++
++config CBFS_SIZE
++	default 0x900000
++
++config MAINBOARD_DIR
++	default "dell/optiplex_3050"
++
++config MAINBOARD_PART_NUMBER
++	default "OptiPlex 3050 Micro"
++
++config DIMM_SPD_SIZE
++	default 512	# DDR4
++
++endif
+diff --git a/src/mainboard/dell/optiplex_3050/Kconfig.name b/src/mainboard/dell/optiplex_3050/Kconfig.name
+new file mode 100644
+index 0000000000..14eab7f52c
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/Kconfig.name
+@@ -0,0 +1,4 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++config BOARD_DELL_OPTIPLEX_3050
++	bool "OptiPlex 3050 Micro"
+diff --git a/src/mainboard/dell/optiplex_3050/Makefile.mk b/src/mainboard/dell/optiplex_3050/Makefile.mk
+new file mode 100644
+index 0000000000..c078124332
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/Makefile.mk
+@@ -0,0 +1,9 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++bootblock-y += bootblock.c
++bootblock-y += sch5555_ec.c
++
++romstage-y += romstage.c
++
++ramstage-y += ramstage.c
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/dell/optiplex_3050/acpi/ec.asl b/src/mainboard/dell/optiplex_3050/acpi/ec.asl
+new file mode 100644
+index 0000000000..16990d45f4
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/acpi/ec.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: CC-PDDC */
++
++/* Please update the license if adding licensable material. */
+diff --git a/src/mainboard/dell/optiplex_3050/acpi/superio.asl b/src/mainboard/dell/optiplex_3050/acpi/superio.asl
+new file mode 100644
+index 0000000000..16990d45f4
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/acpi/superio.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: CC-PDDC */
++
++/* Please update the license if adding licensable material. */
+diff --git a/src/mainboard/dell/optiplex_3050/board_info.txt b/src/mainboard/dell/optiplex_3050/board_info.txt
+new file mode 100644
+index 0000000000..47a4a3a4f3
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/board_info.txt
+@@ -0,0 +1,7 @@
++Category: desktop
++Board URL: https://www.dell.com/support/kbdoc/en-uk/000124265/dell-optiplex-3050-system-guide
++ROM package: SOIC-8
++ROM protocol: SPI
++ROM socketed: n
++Flashrom support: y
++Release year: 2017
+diff --git a/src/mainboard/dell/optiplex_3050/bootblock.c b/src/mainboard/dell/optiplex_3050/bootblock.c
+new file mode 100644
+index 0000000000..10689c42a1
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/bootblock.c
+@@ -0,0 +1,107 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pnp_ops.h>
++#include <soc/gpio.h>
++#include <superio/smsc/sch555x/sch555x.h>
++#include "include/early_gpio.h"
++#include "sch5555_ec.h"
++
++struct ec_init_entry {
++	uint16_t addr;
++	uint8_t val;
++};
++
++static void bootblock_ec_init(void)
++{
++	/*
++	 * Early EC init
++	 */
++
++	static const struct ec_init_entry init_table1[] = {
++		{0x08cc, 0x11}, {0x08d0, 0x11}, {0x088c, 0x10}, {0x0890, 0x10},
++		{0x0894, 0x10}, {0x0898, 0x12}, {0x089c, 0x12}, {0x08a0, 0x10},
++		{0x08a4, 0x12}, {0x08a8, 0x10}, {0x0820, 0x12}, {0x0824, 0x12},
++		{0x0878, 0x12}, {0x0880, 0x12}, {0x0884, 0x12}, {0x08e0, 0x12},
++		{0x08e4, 0x12}, {0x083c, 0x10}, {0x0840, 0x10}, {0x0844, 0x10},
++		{0x0848, 0x10}, {0x084c, 0x10}, {0x0850, 0x10}, {0x0814, 0x11},
++	};
++
++	for (size_t i = 0; i < ARRAY_SIZE(init_table1); ++i)
++		sch5555_mbox_write(2, init_table1[i].addr, init_table1[i].val);
++
++	static const struct ec_init_entry init_table2[] = {
++		{0x0040, 0x00}, {0x00f8, 0x10}, {0x00f9, 0x00}, {0x00f0, 0x30},
++		{0x00fa, 0x00}, {0x00fb, 0x00}, {0x00ea, 0x00}, {0x00eb, 0x00},
++		{0x00ef, 0x7c}, {0x0005, 0x0f}, {0x0014, 0x01}, {0x0018, 0x2f},
++		{0x0019, 0x2f}, {0x001a, 0x2f}, {0x001b, 0x2f}, {0x01d8, 0x01},
++		{0x0040, 0x11},
++	};
++
++	for (size_t i = 0; i < ARRAY_SIZE(init_table2); ++i)
++		sch5555_mbox_write(1, init_table2[i].addr, init_table2[i].val);
++
++	sch5555_mbox_write(1, 0x000b, 0x01);
++	sch5555_mbox_write(4, 0x001a, 0x04);
++	sch5555_mbox_write(4, 0x0028, 0x18);
++	sch5555_mbox_write(4, 0x001a, 0x00);
++	sch5555_mbox_write(1, 0x000b, 0x03);
++
++	/*
++	 * Early HWM init
++	 */
++
++	sch5555_mbox_read(1, 0xcb);
++	sch5555_mbox_read(1, 0xb8);
++
++	static const struct ec_init_entry hwm_init_table[] = {
++		{0x02fc, 0xa0}, {0x02fd, 0x32}, {0x0005, 0x77}, {0x0019, 0x2f},
++		{0x001a, 0x2f}, {0x008a, 0x33}, {0x008b, 0x33}, {0x008c, 0x33},
++		{0x00ba, 0x10}, {0x00d1, 0xff}, {0x00d6, 0xff}, {0x00db, 0xff},
++		{0x0048, 0x00}, {0x0049, 0x00}, {0x007a, 0x00}, {0x007b, 0x00},
++		{0x007c, 0x00}, {0x0080, 0x00}, {0x0081, 0x00}, {0x0082, 0x00},
++		{0x0083, 0xbb}, {0x0084, 0xb0}, {0x01a1, 0x88}, {0x01a4, 0x80},
++		{0x0088, 0x00}, {0x0089, 0x00}, {0x00a0, 0x02}, {0x00a1, 0x02},
++		{0x00a2, 0x02}, {0x00a4, 0x04}, {0x00a5, 0x04}, {0x00a6, 0x04},
++		{0x00ab, 0x00}, {0x00ad, 0x3f}, {0x00b7, 0x07}, {0x0062, 0x50},
++		{0x0000, 0x46}, {0x0000, 0x50}, {0x0000, 0x46}, {0x0000, 0x50},
++		{0x0000, 0x46}, {0x0000, 0x98}, {0x0059, 0x98}, {0x0061, 0x7c},
++		{0x01bc, 0x00}, {0x01bd, 0x00}, {0x01bb, 0x00}, {0x0085, 0xdd},
++		{0x0086, 0xdd}, {0x0087, 0x07}, {0x0090, 0x82}, {0x0091, 0x5e},
++		{0x0095, 0x5d}, {0x0096, 0xa9}, {0x0097, 0x00}, {0x009b, 0x00},
++		{0x00ae, 0x86}, {0x00af, 0x86}, {0x00b3, 0x67}, {0x00c4, 0xff},
++		{0x00c5, 0xff}, {0x00c9, 0xff}, {0x0040, 0x01}, {0x02fc, 0x00},
++		{0x02b3, 0x9a}, {0x02b4, 0x05}, {0x02cc, 0x01}, {0x02d0, 0x4c},
++		{0x02d2, 0x01}, {0x02db, 0x01}, {0x006f, 0x01}, {0x0070, 0x02},
++		{0x0071, 0x03}, {0x018b, 0x03}, {0x018c, 0x03}, {0x0015, 0x33},
++		{0x018b, 0x00}, {0x018c, 0x00}, {0x02f8, 0x5e}, {0x02f9, 0x01},
++	};
++
++	for (size_t i = 0; i < ARRAY_SIZE(hwm_init_table); ++i)
++		sch5555_mbox_write(1, hwm_init_table[i].addr, hwm_init_table[i].val);
++}
++
++
++#define SCH555x_IOBASE	0x2e
++#define GLOBAL_DEV	PNP_DEV(SCH555x_IOBASE, SCH555x_LDN_GLOBAL)
++#define SERIAL_DEV	PNP_DEV(SCH555x_IOBASE, SCH555x_LDN_UART1)
++
++void bootblock_mainboard_early_init(void)
++{
++	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
++
++	// Super I/O early init will map Runtime and EMI registers
++	sch555x_early_init(GLOBAL_DEV);
++
++	// Changes LED color among a few other things
++	outb(1, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_STS);
++	outb(1, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_EN);
++	outb(0xf, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_LED);
++	outb(1, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_UNK1);
++
++	// Perform bootblock EC initialization
++	bootblock_ec_init();
++
++	// Bootblock EC initialization is required for UART1 to work
++	sch555x_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
++}
+diff --git a/src/mainboard/dell/optiplex_3050/cmos.default b/src/mainboard/dell/optiplex_3050/cmos.default
+new file mode 100644
+index 0000000000..79961f43d8
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/cmos.default
+@@ -0,0 +1,5 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++boot_option=Fallback
++debug_level=Debug
++power_on_after_fail=Disable
+diff --git a/src/mainboard/dell/optiplex_3050/cmos.layout b/src/mainboard/dell/optiplex_3050/cmos.layout
+new file mode 100644
+index 0000000000..54a5147b7d
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/cmos.layout
+@@ -0,0 +1,54 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++# -----------------------------------------------------------------
++entries
++
++#start-bit length  config config-ID	name
++
++# -----------------------------------------------------------------
++0	120	r	0	reserved_memory
++
++# -----------------------------------------------------------------
++# RTC_BOOT_BYTE (coreboot hardcoded)
++384	1	e	4	boot_option
++388	4	h	0	reboot_counter
++
++# -----------------------------------------------------------------
++# coreboot config options: console
++395	4	e	6	debug_level
++
++# coreboot config options: southbridge
++409	2	e	7	power_on_after_fail
++
++# coreboot config options: bootloader
++#Used by ChromeOS:
++416	128	r	0	vbnv
++
++# coreboot config options: check sums
++984	16	h	0	check_sum
++
++# -----------------------------------------------------------------
++
++enumerations
++
++#ID	value	text
++1	0	Disable
++1	1	Enable
++4	0	Fallback
++4	1	Normal
++6	0	Emergency
++6	1	Alert
++6	2	Critical
++6	3	Error
++6	4	Warning
++6	5	Notice
++6	6	Info
++6	7	Debug
++6	8	Spew
++7	0	Disable
++7	1	Enable
++7	2	Keep
++# -----------------------------------------------------------------
++checksums
++
++checksum 392 415 984
+diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb
+new file mode 100644
+index 0000000000..49b2d7f603
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/devicetree.cb
+@@ -0,0 +1,123 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++chip soc/intel/skylake
++	register "deep_sx_config" = "DSX_EN_WAKE_PIN | DSX_EN_LAN_WAKE_PIN"
++
++	# Enable Enhanced Intel SpeedStep
++	register "eist_enable" = "1"
++
++	device cpu_cluster 0 on end
++
++	device domain 0 on
++		device ref igpu on
++			register "PrimaryDisplay" = "Display_iGFX"
++		end
++
++		device ref south_xhci on
++			register "usb2_ports" = "{
++				[0] = USB2_PORT_MID(OC0),
++				[1] = USB2_PORT_MID(OC0),
++				[2] = USB2_PORT_MID(OC4),
++				[3] = USB2_PORT_MID(OC4),
++				[4] = USB2_PORT_MID(OC2),
++				[5] = USB2_PORT_MID(OC2),
++				[6] = USB2_PORT_MID(OC0),
++				[7] = USB2_PORT_MID(OC0),
++				[8] = USB2_PORT_MID(OC0),
++				[9] = USB2_PORT_MID(OC0),
++				[10] = USB2_PORT_MID(OC1),
++				[11] = USB2_PORT_MID(OC1),
++				[12] = USB2_PORT_MID(OC_SKIP),
++				[13] = USB2_PORT_MID(OC_SKIP),
++			}"
++			register "usb3_ports" = "{
++				[0] = USB3_PORT_DEFAULT(OC0),
++				[1] = USB3_PORT_DEFAULT(OC0),
++				[2] = USB3_PORT_DEFAULT(OC3),
++				[3] = USB3_PORT_DEFAULT(OC3),
++				[4] = USB3_PORT_DEFAULT(OC1),
++				[5] = USB3_PORT_DEFAULT(OC1),
++				[6] = USB3_PORT_DEFAULT(OC_SKIP),
++				[7] = USB3_PORT_DEFAULT(OC_SKIP),
++				[8] = USB3_PORT_DEFAULT(OC_SKIP),
++				[9] = USB3_PORT_DEFAULT(OC_SKIP),
++			}"
++		end
++
++		# ME interface is 'off' to avoid HECI reset delay due to HAP
++		device ref heci1 off end
++
++		device ref sata on
++			register "SataSalpSupport" = "1"
++			register "SataPortsEnable[0]" = "1"
++		end
++
++		device ref pcie_rp21 on
++			register "PcieRpEnable[20]"                     = "1"
++			register "PcieRpClkReqSupport[20]"              = "1"
++			register "PcieRpClkReqNumber[20]"               = "3"
++			register "PcieRpAdvancedErrorReporting[20]"     = "1"
++			register "PcieRpLtrEnable[20]"                  = "1"
++			register "PcieRpClkSrcNumber[20]"               = "3"
++			register "PcieRpHotPlug[20]"                    = "1"
++		end
++
++		# Realtek LAN
++		device ref pcie_rp5 on
++			register "PcieRpEnable[4]"			= "1"
++			register "PcieRpClkReqSupport[4]"		= "0"
++			register "PcieRpHotPlug[4]"			= "0"
++		end
++
++		# M.2 WiFi
++		device ref pcie_rp8 on
++			register "PcieRpEnable[7]"			= "1"
++			register "PcieRpClkReqSupport[7]"		= "0"
++			register "PcieRpHotPlug[7]"			= "1"
++		end
++
++		# UART0 is exposed on test points on the bottom of the board
++		device ref uart0 on
++			register "SerialIoDevMode[PchSerialIoIndexUart0]" = "PchSerialIoPci"
++		end
++
++		device ref lpc_espi on
++			register "serirq_mode" = "SERIRQ_CONTINUOUS"
++
++			# I/O decode for EMI/Runtime registers
++			register "gen1_dec" = "0x007c0a01"
++
++			# SCH5553
++			chip superio/smsc/sch555x
++				device pnp 2e.0 on		# EMI
++					io 0x60 = 0xa00
++				end
++				device pnp 2e.1 off end		# 8042
++				device pnp 2e.7 on		# UART1
++					io 0x60 = 0x3f8
++					irq 0x0f = 2
++					irq 0x70 = 4
++				end
++				device pnp 2e.8 off end 	# UART2
++				device pnp 2e.c on		# LPC interface
++					io 0x60 = 0x2e
++				end
++				device pnp 2e.a on		# Runtime registers
++					io 0x60 = 0xa40
++				end
++				device pnp 2e.b  off end	# Floppy Controller
++				device pnp 2e.11 off end	# Parallel Port
++			end
++
++			chip drivers/pc80/tpm
++				device pnp 0c31.0 on end
++			end
++		end
++
++		device ref hda on
++			register "PchHdaVcType" = "Vc1"
++		end
++
++		device ref smbus on end
++	end
++end
+diff --git a/src/mainboard/dell/optiplex_3050/dsdt.asl b/src/mainboard/dell/optiplex_3050/dsdt.asl
+new file mode 100644
+index 0000000000..9762f6ff74
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/dsdt.asl
+@@ -0,0 +1,27 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi.h>
++DefinitionBlock(
++	"dsdt.aml",
++	"DSDT",
++	ACPI_DSDT_REV_2,
++	OEM_ID,
++	ACPI_TABLE_CREATOR,
++	0x20110725
++)
++{
++	#include <acpi/dsdt_top.asl>
++	#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
++	#include <cpu/intel/common/acpi/cpu.asl>
++
++	Scope (\_SB)
++	{
++		Device (PCI0)
++		{
++			#include <soc/intel/skylake/acpi/systemagent.asl>
++			#include <soc/intel/skylake/acpi/pch.asl>
++		}
++	}
++
++	#include <southbridge/intel/common/acpi/sleepstates.asl>
++}
+diff --git a/src/mainboard/dell/optiplex_3050/gma-mainboard.ads b/src/mainboard/dell/optiplex_3050/gma-mainboard.ads
+new file mode 100644
+index 0000000000..cb4c22f285
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/gma-mainboard.ads
+@@ -0,0 +1,19 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++      (HDMI1,  -- External HDMI
++       DP2,    -- External DP (native)
++       HDMI2,  -- External DP (DP++)
++       DP3,    -- Video I/O card: VGA (0PKGGG), DP (H64DC)
++       HDMI3,  -- Video I/O card: VGA (0PKGGG), DP (H64DC)
++       others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/dell/optiplex_3050/include/early_gpio.h b/src/mainboard/dell/optiplex_3050/include/early_gpio.h
+new file mode 100644
+index 0000000000..17a16371e3
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/include/early_gpio.h
+@@ -0,0 +1,11 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#ifndef __OPTIPLEX_3050_EARLY_GPIO_H__
++#define __OPTIPLEX_3050_EARLY_GPIO_H__
++
++static const struct pad_config early_gpio_table[] = {
++	PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),	/* UART0_RXD */
++	PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),	/* UART0_TXD */
++};
++
++#endif
+diff --git a/src/mainboard/dell/optiplex_3050/include/gpio.h b/src/mainboard/dell/optiplex_3050/include/gpio.h
+new file mode 100644
+index 0000000000..83293c32a9
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/include/gpio.h
+@@ -0,0 +1,241 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#ifndef __OPTIPLEX_3050_GPIO_H__
++#define __OPTIPLEX_3050_GPIO_H__
++
++static const struct pad_config gpio_table[] = {
++
++	/* ------- GPIO Community 0 ------- */
++
++	/* ------- GPIO Group GPP_A ------- */
++	PAD_CFG_NF(GPP_A0, UP_20K, PLTRST, NF1),			/* RCIN# */
++	PAD_CFG_NF(GPP_A1, UP_20K, PLTRST, NF1),			/* LAD0 */
++	PAD_CFG_NF(GPP_A2, UP_20K, PLTRST, NF1),			/* LAD1 */
++	PAD_CFG_NF(GPP_A3, UP_20K, PLTRST, NF1),			/* LAD2 */
++	PAD_CFG_NF(GPP_A4, UP_20K, PLTRST, NF1),			/* LAD3 */
++	PAD_CFG_NF(GPP_A5, NONE, PLTRST, NF1),				/* LFRAME# */
++	PAD_CFG_NF(GPP_A6, NONE, PLTRST, NF1),				/* SERIRQ */
++	PAD_CFG_GPI_TRIG_OWN(GPP_A7, NONE, DEEP, OFF, ACPI),		/* GPIO */
++	PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),				/* CLKRUN# */
++	PAD_CFG_NF(GPP_A9, NONE, PLTRST, NF1),				/* CLKOUT_LPC0 */
++	PAD_CFG_NF(GPP_A10, NONE, PLTRST, NF1),				/* CLKOUT_LPC1 */
++	PAD_CFG_NF(GPP_A11, UP_20K, DEEP, NF1),				/* PME# */
++	PAD_CFG_GPO(GPP_A12, 0, PLTRST),				/* GPIO */
++	PAD_CFG_NF(GPP_A13, NONE, PLTRST, NF1),				/* SUSWARN#/SUSPWRDNACK */
++	PAD_CFG_GPI_TRIG_OWN(GPP_A14, NONE, PLTRST, OFF, ACPI),		/* GPIO */
++	PAD_CFG_NF(GPP_A15, UP_20K, PLTRST, NF1),			/* SUS_ACK# */
++	PAD_CFG_GPO(GPP_A16, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_A17, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_A18, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_A19, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_A20, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_A21, 1, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_A22, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_A23, 0, PLTRST),				/* GPIO */
++
++	/* ------- GPIO Group GPP_B ------- */
++	PAD_CFG_GPO(GPP_B0, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_B1, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_B2, 0, DEEP),					/* GPIO */
++	PAD_CFG_GPO(GPP_B3, 1, RSMRST),					/* GPIO (ME_CNTL, B3 -> LOW => HDA_SDO -> HIGH) */
++	PAD_CFG_GPI_TRIG_OWN(GPP_B4, NONE, DEEP, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPO(GPP_B5, 1, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_B6, 1, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_B7, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_B8, NONE, PLTRST, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPO(GPP_B9, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_B10, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_B11, NONE, PLTRST, OFF, ACPI),		/* GPIO */
++	PAD_CFG_NF(GPP_B12, NONE, PLTRST, NF1),				/* SLP_S0# */
++	PAD_CFG_NF(GPP_B13, NONE, PLTRST, NF1),				/* PLTRST# */
++	PAD_CFG_NF(GPP_B14, DN_20K, PLTRST, NF1),			/* SPKR */
++	PAD_CFG_GPO(GPP_B15, 1, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_B16, 1, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_B17, 0, PLTRST),				/* GPIO */
++	PAD_CFG_NF(GPP_B18, DN_20K, DEEP, NF1),				/* GSPIO_MOSI */
++	PAD_CFG_GPO(GPP_B19, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_B20, 1, DEEP),					/* GPIO */
++	PAD_CFG_GPO(GPP_B21, 0, DEEP),					/* GPIO */
++	PAD_CFG_NF(GPP_B22, DN_20K, DEEP, NF1),				/* GSPI1_MOSI */
++	PAD_CFG_NF(GPP_B23, DN_20K, DEEP, NF2),				/* PCHHOT# */
++
++	/* ------- GPIO Community 1 ------- */
++
++	/* ------- GPIO Group GPP_C ------- */
++	PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),				/* SMBCLK */
++	PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),				/* SMBDATA */
++	PAD_CFG_GPI_TRIG_OWN(GPP_C2, DN_20K, DEEP, OFF, ACPI),		/* GPIO */
++	PAD_CFG_NF(GPP_C3, NONE, PLTRST, NF1),				/* SML0CLK */
++	PAD_CFG_NF(GPP_C4, NONE, PLTRST, NF1),				/* SML0DATA */
++	PAD_CFG_GPI_TRIG_OWN(GPP_C5, DN_20K, DEEP, OFF, ACPI),		/* GPIO */
++	PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),				/* SML1CLK */
++	PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),				/* SML1DATA */
++	PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),				/* UART0_RXD */
++	PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),				/* UART0_TXD */
++	PAD_CFG_GPO(GPP_C10, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_C11, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_C12, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_C13, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_C14, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_C15, 0, PLTRST),				/* GPIO */
++	PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1),				/* I2C0_SDA */
++	PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1),				/* I2C0_SCL */
++	PAD_CFG_GPO(GPP_C18, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_C19, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_C20, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_C21, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_C22, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT),	/* GPIO */
++
++	/* ------- GPIO Group GPP_D ------- */
++	PAD_CFG_GPO(GPP_D0, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_D1, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_D2, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_D3, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_D4, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_D5, NONE, DEEP, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPO(GPP_D6, 0, DEEP),					/* GPIO */
++	PAD_CFG_GPO(GPP_D7, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_D8, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_D9, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_D10, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_D11, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_D12, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_D13, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_D14, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_D15, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_D16, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_D17, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_D18, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_D19, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_D20, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_D21, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_D22, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_D23, 0, PLTRST),				/* GPIO */
++
++	/* ------- GPIO Group GPP_E ------- */
++	PAD_CFG_NF(GPP_E0, NONE, DEEP, NF1),				/* SATAXPCIE0 */
++	PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1),				/* SATAXPCIE1 */
++	PAD_CFG_NF(GPP_E2, NONE, DEEP, NF1),				/* SATAXPCIE2 */
++	PAD_CFG_GPO(GPP_E3, 0, DEEP),					/* GPIO */
++	PAD_CFG_GPO(GPP_E4, 0, DEEP),					/* GPIO */
++	PAD_CFG_GPO(GPP_E5, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_E6, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_E7, NONE, DEEP, OFF, ACPI),		/* GPIO */
++	PAD_CFG_NF(GPP_E8, NONE, PLTRST, NF1),				/* SATA_LED# */
++	PAD_CFG_NF(GPP_E9, UP_20K, PLTRST, NF1),			/* USB_OC0# */
++	PAD_CFG_NF(GPP_E10, UP_20K, PLTRST, NF1),			/* USB_OC1# */
++	PAD_CFG_NF(GPP_E11, UP_20K, PLTRST, NF1),			/* USB_OC2# */
++	PAD_CFG_NF(GPP_E12, UP_20K, PLTRST, NF1),			/* USB_OC3# */
++
++	/* ------- GPIO Group GPP_F ------- */
++	PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),				/* SATAXPCIE3 */
++	PAD_CFG_NF(GPP_F1, NONE, DEEP, NF1),				/* SATAXPCIE4 */
++	PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1),				/* SATAXPCIE5 */
++	PAD_CFG_NF(GPP_F3, NONE, DEEP, NF1),				/* SATAXPCIE6 */
++	PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),				/* SATAXPCIE7 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F5, NONE, PLTRST, OFF, ACPI),		/* GPIO */
++	PAD_CFG_NF(GPP_F6, NONE, RSMRST, NF1),				/* SATA_DEVSLP4 */
++	PAD_CFG_GPO(GPP_F7, 1, PLTRST),					/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F8, NONE, DEEP, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPO(GPP_F9, 0, RSMRST),					/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F10, NONE, DEEP, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F11, NONE, PLTRST, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F12, NONE, PLTRST, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPO(GPP_F13, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F14, NONE, DEEP, OFF, ACPI),		/* GPIO */
++	PAD_CFG_NF(GPP_F15, UP_20K, DEEP, NF1),				/* USB_OC4# */
++	PAD_CFG_NF(GPP_F16, UP_20K, DEEP, NF1),				/* USB_OC5# */
++	PAD_CFG_NF(GPP_F17, UP_20K, PLTRST, NF1),			/* USB_OC6# */
++	PAD_CFG_TERM_GPO(GPP_F18, 0, UP_20K, DEEP),			/* GPIO */
++	PAD_CFG_GPO(GPP_F19, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_F20, 1, DEEP),					/* GPIO */
++	PAD_CFG_GPO(GPP_F21, 1, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_F22, 1, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_F23, 1, RSMRST),				/* GPIO */
++
++	/* ------- GPIO Group GPP_G ------- */
++	PAD_CFG_GPI_TRIG_OWN(GPP_G0, NONE, PLTRST, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_G1, NONE, PLTRST, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_G2, NONE, PLTRST, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_G3, NONE, PLTRST, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_G4, NONE, PLTRST, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_G5, NONE, PLTRST, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_G6, NONE, PLTRST, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_G7, NONE, PLTRST, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_G8, NONE, PLTRST, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPO(GPP_G9, 1, PLTRST),					/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_G10, NONE, DEEP, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_G11, NONE, DEEP, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPO(GPP_G12, 1, DEEP),					/* GPIO */
++	PAD_CFG_GPI_TRIG_OWN(GPP_G13, NONE, DEEP, OFF, ACPI),		/* GPIO */
++	PAD_CFG_GPO(GPP_G14, 0, DEEP),					/* GPIO */
++	PAD_CFG_GPO(GPP_G15, 1, DEEP),					/* GPIO */
++	PAD_CFG_GPO(GPP_G16, 1, DEEP),					/* GPIO */
++	PAD_CFG_GPO(GPP_G17, 1, DEEP),					/* GPIO */
++	PAD_CFG_GPO(GPP_G18, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_G19, 1, DEEP),					/* GPIO */
++	PAD_CFG_GPO(GPP_G20, 1, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_G21, 0, DEEP),					/* GPIO */
++	PAD_CFG_GPO(GPP_G22, 0, DEEP),					/* GPIO */
++	PAD_CFG_GPO(GPP_G23, 0, PLTRST),				/* GPIO */
++
++	/* ------- GPIO Group GPP_H ------- */
++	PAD_CFG_GPO(GPP_H0, 0, DEEP),					/* GPIO */
++	PAD_CFG_GPO(GPP_H1, 1, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_H2, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_H3, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_H4, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_H5, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_H6, 1, DEEP),					/* GPIO */
++	PAD_CFG_GPO(GPP_H7, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_H8, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_H9, 0, PLTRST),					/* GPIO */
++	PAD_CFG_GPO(GPP_H10, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_H11, 0, PLTRST),				/* GPIO */
++	PAD_CFG_TERM_GPO(GPP_H12, 1, DN_20K, DEEP),			/* GPIO */
++	PAD_CFG_GPO(GPP_H13, 1, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_H14, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_H15, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_H16, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_H17, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_H18, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_H19, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_H20, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_H21, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_H22, 0, PLTRST),				/* GPIO */
++	PAD_CFG_GPO(GPP_H23, 0, PLTRST),				/* GPIO */
++
++	/* ------- GPIO Community 2 ------- */
++
++	/* -------- GPIO Group GPD -------- */
++	PAD_CFG_NF(GPD0, NONE, RSMRST, NF1),				/* BATLOW# */
++	PAD_CFG_GPO(GPD1, 0, PWROK),					/* GPIO */
++	PAD_CFG_NF(GPD2, NONE, RSMRST, NF1),				/* LAN_WAKE# */
++	PAD_CFG_NF(GPD3, UP_20K, RSMRST, NF1),				/* PWRBTN# */
++	PAD_CFG_NF(GPD4, NONE, RSMRST, NF1),				/* SLP_S3# */
++	PAD_CFG_NF(GPD5, NONE, RSMRST, NF1),				/* SLP_S4# */
++	PAD_CFG_NF(GPD6, NONE, RSMRST, NF1),				/* SLP_A# */
++	PAD_CFG_GPO(GPD7, 1, RSMRST),					/* GPIO */
++	PAD_CFG_NF(GPD8, NONE, RSMRST, NF1),				/* SUSCLK */
++	PAD_CFG_NF(GPD9, NONE, RSMRST, NF1),				/* SLP_WLAN# */
++	PAD_CFG_NF(GPD10, NONE, RSMRST, NF1),				/* SLP_S5# */
++	PAD_CFG_GPO(GPD11, 1, RSMRST),					/* GPIO */
++
++	/* ------- GPIO Community 3 ------- */
++
++	/* ------- GPIO Group GPP_I ------- */
++	PAD_CFG_NF(GPP_I0, NONE, PLTRST, NF1),				/* DDPB_HPD0 */
++	PAD_CFG_NF(GPP_I1, NONE, PLTRST, NF1),				/* DDPC_HPD1 */
++	PAD_CFG_NF(GPP_I2, NONE, PLTRST, NF1),				/* DDPD_HPD2 */
++	PAD_CFG_NF(GPP_I3, NONE, PLTRST, NF1),				/* DDPE_HPD3 */
++	PAD_CFG_NF(GPP_I4, NONE, PLTRST, NF1),				/* EDP_HPD */
++	PAD_CFG_NF(GPP_I5, NONE, PLTRST, NF1),				/* DDPB_CTRLCLK */
++	PAD_CFG_NF(GPP_I6, DN_20K, PLTRST, NF1),			/* DDPB_CTRLDATA */
++	PAD_CFG_NF(GPP_I7, NONE, PLTRST, NF1),				/* DDPC_CTRLCLK */
++	PAD_CFG_NF(GPP_I8, DN_20K, PLTRST, NF1),			/* DDPC_CTRLDATA */
++	PAD_CFG_NF(GPP_I9, NONE, PLTRST, NF1),				/* DDPD_CTRLCLK */
++	PAD_CFG_NF(GPP_I10, DN_20K, PLTRST, NF1),			/* DDPD_CTRLDATA */
++};
++
++#endif
+diff --git a/src/mainboard/dell/optiplex_3050/ramstage.c b/src/mainboard/dell/optiplex_3050/ramstage.c
+new file mode 100644
+index 0000000000..0badd89620
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/ramstage.c
+@@ -0,0 +1,17 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <soc/ramstage.h>
++#include "include/gpio.h"
++
++void mainboard_silicon_init_params(FSP_SIL_UPD *params)
++{
++	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
++}
++
++static void init_mainboard(void *chip_info)
++{
++}
++
++struct chip_operations mainboard_ops = {
++	.init = init_mainboard,
++};
+diff --git a/src/mainboard/dell/optiplex_3050/romstage.c b/src/mainboard/dell/optiplex_3050/romstage.c
+new file mode 100644
+index 0000000000..a4734e5d61
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/romstage.c
+@@ -0,0 +1,26 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <assert.h>
++#include <soc/romstage.h>
++#include <stdint.h>
++#include <string.h>
++#include <spd_bin.h>
++#include <cbfs.h>
++
++void mainboard_memory_init_params(FSPM_UPD *mupd)
++{
++	struct spd_block blk = { .addr_map = { 0x50, 0x52, } };
++	get_spd_smbus(&blk);
++	dump_spd_info(&blk);
++
++	FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig;
++	mem_cfg->DqPinsInterleaved = true;
++	mem_cfg->CaVrefConfig      = 2;
++	mem_cfg->MemorySpdDataLen  = blk.len;
++	mem_cfg->MemorySpdPtr00    = (uintptr_t)blk.spd_array[0];
++	mem_cfg->MemorySpdPtr10    = (uintptr_t)blk.spd_array[1];
++
++	/* use virtual channel 1 for the dmi interface of the PCH
++	 * FIXME: do we need this? */
++	mupd->FspmTestConfig.DmiVc1 = 1;
++}
+diff --git a/src/mainboard/dell/optiplex_3050/sch5555_ec.c b/src/mainboard/dell/optiplex_3050/sch5555_ec.c
+new file mode 100644
+index 0000000000..1df5026531
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/sch5555_ec.c
+@@ -0,0 +1,54 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <arch/io.h>
++#include <device/pnp_ops.h>
++#include <superio/smsc/sch555x/sch555x.h>
++#include "sch5555_ec.h"
++
++uint8_t sch5555_mbox_read(uint8_t addr1, uint16_t addr2)
++{
++	// clear ec-to-host mailbox
++	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
++	outb(tmp, SCH555x_EMI_IOBASE + 1);
++
++	// send address
++	outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
++	outw((addr1 * 2) | 0x100, SCH555x_EMI_IOBASE + 4);
++
++	outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
++	outl(addr2 << 16, SCH555x_EMI_IOBASE + 4);
++
++	// send message to ec
++	outb(1, SCH555x_EMI_IOBASE);
++
++	// wait for ack
++	for (size_t retry = 0; retry < 0xfff; ++retry)
++		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
++			break;
++
++	// read result
++	outw(4 | 0x8000, SCH555x_EMI_IOBASE + 2);
++	return inb(SCH555x_EMI_IOBASE + 4);
++}
++
++void sch5555_mbox_write(uint8_t addr1, uint16_t addr2, uint8_t val)
++{
++	// clear ec-to-host mailbox
++	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
++	outb(tmp, SCH555x_EMI_IOBASE + 1);
++
++	// send address and value
++	outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
++	outw((addr1 * 2) | 0x101, SCH555x_EMI_IOBASE + 4);
++
++	outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
++	outl(val | (addr2 << 16), SCH555x_EMI_IOBASE + 4);
++
++	// send message to ec
++	outb(1, SCH555x_EMI_IOBASE);
++
++	// wait for ack
++	for (size_t retry = 0; retry < 0xfff; ++retry)
++		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
++			break;
++}
+diff --git a/src/mainboard/dell/optiplex_3050/sch5555_ec.h b/src/mainboard/dell/optiplex_3050/sch5555_ec.h
+new file mode 100644
+index 0000000000..9d262d5787
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/sch5555_ec.h
+@@ -0,0 +1,10 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#ifndef __SCH5555_EC_H__
++#define __SCH5555_EC_H__
++
++uint8_t sch5555_mbox_read(uint8_t addr1, uint16_t addr2);
++
++void sch5555_mbox_write(uint8_t addr1, uint16_t addr2, uint8_t val);
++
++#endif
+-- 
+2.39.5
+
diff --git a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
index c4929a14..92af8657 100644
--- a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
@@ -143,6 +143,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
index 14f8e433..7fdf766c 100644
--- a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
@@ -141,6 +141,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
index 4edbb341..341b34da 100644
--- a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
@@ -143,6 +143,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
index 6a454101..17c33085 100644
--- a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
@@ -141,6 +141,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
index 04a9519c..a609ac93 100644
--- a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
@@ -141,6 +141,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 CONFIG_BOARD_DELL_LATITUDE_E5420=y
diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
index 03accb19..9370d5eb 100644
--- a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
@@ -139,6 +139,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 CONFIG_BOARD_DELL_LATITUDE_E5420=y
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
index ec450455..c3a5b3fd 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
@@ -141,6 +141,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
index d4fb8a5d..a796ad77 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
@@ -139,6 +139,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
index 11ab7ac8..e334d6bb 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
@@ -141,6 +141,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
index 861444cf..04d2b2b9 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
@@ -139,6 +139,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
index 67f0dc85..49123c07 100644
--- a/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
@@ -141,6 +141,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6220_10mb/config/libgfxinit_txtmode b/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
index d2ae2afa..3ba27be7 100644
--- a/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
@@ -139,6 +139,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
index a55d06a7..39355064 100644
--- a/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
@@ -141,6 +141,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6230_12mb/config/libgfxinit_txtmode b/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
index 7ebf6f66..9ec25ddc 100644
--- a/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
@@ -139,6 +139,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
index c1abffcf..cbbc8b1c 100644
--- a/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
@@ -141,6 +141,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6320_10mb/config/libgfxinit_txtmode b/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
index 17fe9e73..21c371d9 100644
--- a/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
@@ -139,6 +139,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
index 551e083f..8163984c 100644
--- a/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
@@ -141,6 +141,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6330_12mb/config/libgfxinit_txtmode b/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
index 580cf2db..d4241b14 100644
--- a/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
@@ -139,6 +139,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
index 70eca296..020b6705 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
@@ -140,6 +140,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
index 2f8769cb..ed28df8d 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
@@ -138,6 +138,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6400nvidia_4mb/config/normal b/config/coreboot/e6400nvidia_4mb/config/normal
index f5d6b16f..0d617430 100644
--- a/config/coreboot/e6400nvidia_4mb/config/normal
+++ b/config/coreboot/e6400nvidia_4mb/config/normal
@@ -137,6 +137,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
index 074aa0fd..96ac77ab 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
@@ -141,6 +141,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
index 9b5f0d47..e5558336 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
@@ -139,6 +139,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 101b8b6e..8e11b5c9 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -141,6 +141,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index 96e9fcc9..9a78a250 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -139,6 +139,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
index a1f675d2..d13cfc04 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
@@ -141,6 +141,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
index 92213d48..53c515c4 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
@@ -139,6 +139,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index 060d9b39..cf6bc11d 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -141,6 +141,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index 5b504b7c..a0431ca3 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -139,6 +139,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index f5fd9edb..f368798b 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -142,6 +142,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set

From 2b0fe39acb4d911edd9d7631e8aa6b97778e68fa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 25 Sep 2024 22:21:59 +0100
Subject: [PATCH 0823/1549] config/git: Import pcsx-redux

We don't need the entire emulator, but we will be using
a specific part: src/mips/openbios

third_party/uC-sdk submodule is included, because it
contains the necessary header files when building open bios.

I will be adding Sony Playstation support to Libreboot,
alongside a new emulator project to be announced soon.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/arch                      | 2 +-
 config/dependencies/debian                    | 1 +
 config/dependencies/parabola                  | 2 ++
 config/dependencies/trisquel                  | 1 +
 config/dependencies/ubuntu2004                | 1 +
 config/dependencies/ubuntu2404                | 1 +
 config/git/pcsx-redux/pkg.cfg                 | 3 +++
 config/submodule/pcsx-redux/module.list       | 1 +
 config/submodule/pcsx-redux/uC-sdk/module.cfg | 3 +++
 9 files changed, 14 insertions(+), 1 deletion(-)
 create mode 100644 config/git/pcsx-redux/pkg.cfg
 create mode 100644 config/submodule/pcsx-redux/module.list
 create mode 100644 config/submodule/pcsx-redux/uC-sdk/module.cfg

diff --git a/config/dependencies/arch b/config/dependencies/arch
index 588f47b3..6a0f93b7 100644
--- a/config/dependencies/arch
+++ b/config/dependencies/arch
@@ -9,4 +9,4 @@ pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
 sharutils subversion swig texinfo ttf-dejavu unarchiver unzip wget xz zlib \
 "
 
-aur_notice="bdf-unifont unifont"
+aur_notice="bdf-unifont unifont cross-mipsel-linux-gnu-binutils cross-mipsel-linux-gnu-gcc"
diff --git a/config/dependencies/debian b/config/dependencies/debian
index 3375064f..387cb288 100755
--- a/config/dependencies/debian
+++ b/config/dependencies/debian
@@ -12,4 +12,5 @@ libusb-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted pciutils
 perl pkg-config python3 python3-distutils python3-pkg-resources python3-pycryptodome \
 python3-pyelftools python3-setuptools python-is-python3 sharutils swig unar \
 unifont unifont-bin unzip uuid-dev wget xfonts-unifont zlib1g-dev ccache \
+g++-mipsel-linux-gnu make \
 "
diff --git a/config/dependencies/parabola b/config/dependencies/parabola
index 50462afe..f598e491 100644
--- a/config/dependencies/parabola
+++ b/config/dependencies/parabola
@@ -9,3 +9,5 @@ pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
 sharutils subversion swig texinfo ttf-dejavu unarchiver unifont-utils unzip \
 wget xz zlib ccache \
 "
+
+aur_notice="cross-mipsel-linux-gnu-binutils cross-mipsel-linux-gnu-gcc"
diff --git a/config/dependencies/trisquel b/config/dependencies/trisquel
index c8e40b43..a5e1fa13 100755
--- a/config/dependencies/trisquel
+++ b/config/dependencies/trisquel
@@ -12,4 +12,5 @@ libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \
 pciutils perl pkg-config python3 python3-distutils python3-pkg-resources \
 python3-pycryptodome python3-pyelftools python3-setuptools python-is-python3 \
 sharutils swig fonts-unifont unar unifont unzip uuid-dev wget zlib1g-dev \
+g++-mipsel-linux-gnu make \
 "
diff --git a/config/dependencies/ubuntu2004 b/config/dependencies/ubuntu2004
index e4b3ef10..8fe09aef 100755
--- a/config/dependencies/ubuntu2004
+++ b/config/dependencies/ubuntu2004
@@ -11,4 +11,5 @@ libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \
 pciutils perl pkg-config python3 python3-distutils python3-pkg-resources \
 python3-pycryptodome python3-pyelftools python3-setuptools python-is-python3 \
 sharutils swig ttf-unifont unar unifont unzip uuid-dev wget zlib1g-dev ccache \
+g++-mipsel-linux-gnu make \
 "
diff --git a/config/dependencies/ubuntu2404 b/config/dependencies/ubuntu2404
index 01e15521..a93d0b49 100755
--- a/config/dependencies/ubuntu2404
+++ b/config/dependencies/ubuntu2404
@@ -11,4 +11,5 @@ libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \
 pciutils perl pkg-config python3 python3-pkg-resources python3-pycryptodome \
 python3-pyelftools python3-setuptools python-is-python3 sharutils swig \
 fonts-unifont unar unifont unzip uuid-dev wget zlib1g-dev ccache \
+g++-mipsel-linux-gnu make \
 "
diff --git a/config/git/pcsx-redux/pkg.cfg b/config/git/pcsx-redux/pkg.cfg
new file mode 100644
index 00000000..0ae9a205
--- /dev/null
+++ b/config/git/pcsx-redux/pkg.cfg
@@ -0,0 +1,3 @@
+rev="6ec5348058413619b290b069adbdae68180ce8c0"
+url="https://github.com/grumpycoders/pcsx-redux"
+bkup_url="https://codeberg.org/vimuser/pcsx-redux"
diff --git a/config/submodule/pcsx-redux/module.list b/config/submodule/pcsx-redux/module.list
new file mode 100644
index 00000000..9b1f70ee
--- /dev/null
+++ b/config/submodule/pcsx-redux/module.list
@@ -0,0 +1 @@
+third_party/uC-sdk
diff --git a/config/submodule/pcsx-redux/uC-sdk/module.cfg b/config/submodule/pcsx-redux/uC-sdk/module.cfg
new file mode 100644
index 00000000..dd112407
--- /dev/null
+++ b/config/submodule/pcsx-redux/uC-sdk/module.cfg
@@ -0,0 +1,3 @@
+subhash="7c6f1973a16893cf1f0868af6f8e60a028b933ad"
+subrepo="https://github.com/grumpycoders/uC-sdk.git"
+subrepo_bkup="https://codeberg.org/vimuser/uC-sdk"

From ff9c250a3ec05c9afa3faf84e2e5d793f68361b4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 25 Sep 2024 23:59:52 +0100
Subject: [PATCH 0824/1549] Add Sony PlayStation support to Libreboot

I also added a "cleanargs" argument, similar to the makeargs
argument, to work around a build error.

This builds the PCSX-Redux PS1 BIOS. They reverse engineered
the Sony PS1 BIOS and wrote a free one under MIT license.

Run this:

./mk -b pcsx-redux

The file will appear: bin/playstation/openbios.bin

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/pcsx-redux/mkhelper.cfg           |  3 ++
 .../0001-no-context-will-be-given.patch       | 36 +++++++++++++++++++
 config/pcsx-redux/target.cfg                  |  3 ++
 include/rom.sh                                |  7 ++++
 script/trees                                  | 14 ++++----
 5 files changed, 57 insertions(+), 6 deletions(-)
 create mode 100644 config/data/pcsx-redux/mkhelper.cfg
 create mode 100644 config/pcsx-redux/patches/0001-no-context-will-be-given.patch
 create mode 100644 config/pcsx-redux/target.cfg

diff --git a/config/data/pcsx-redux/mkhelper.cfg b/config/data/pcsx-redux/mkhelper.cfg
new file mode 100644
index 00000000..379ad032
--- /dev/null
+++ b/config/data/pcsx-redux/mkhelper.cfg
@@ -0,0 +1,3 @@
+. "include/rom.sh"
+
+postmake="copyps1bios"
diff --git a/config/pcsx-redux/patches/0001-no-context-will-be-given.patch b/config/pcsx-redux/patches/0001-no-context-will-be-given.patch
new file mode 100644
index 00000000..b2968c11
--- /dev/null
+++ b/config/pcsx-redux/patches/0001-no-context-will-be-given.patch
@@ -0,0 +1,36 @@
+From 6516ecaea03845cd07732bd4ca8c32cd08ea4281 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 25 Sep 2024 23:45:56 +0100
+Subject: [PATCH 1/1] no context will be given.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ lbmkbofhmakefile | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+ create mode 100644 lbmkbofhmakefile
+
+diff --git a/lbmkbofhmakefile b/lbmkbofhmakefile
+new file mode 100644
+index 00000000..fe2e36d2
+--- /dev/null
++++ b/lbmkbofhmakefile
+@@ -0,0 +1,16 @@
++# SPDX-License-Identifier: MIT
++# SPDX-FileCopyrightText: 2024 Leah Rowe <leah@libreboot.org>
++
++# This is not the original pcsx-redux Makefile.
++# We don't need to build all of PCSX-Redux, only the Open BIOS.
++# Due to idiosyncrasies of lbmk's design, it's simpler to just hack
++# the Makefile like this.
++
++all:
++	make -C src/mips/openbios
++
++clean:
++	make -C src/mips/openbios clean
++
++distclean:
++	make -C src/mips/openbios clean
+-- 
+2.39.5
+
diff --git a/config/pcsx-redux/target.cfg b/config/pcsx-redux/target.cfg
new file mode 100644
index 00000000..21dc4b2d
--- /dev/null
+++ b/config/pcsx-redux/target.cfg
@@ -0,0 +1,3 @@
+makeargs="-f lbmkbofhmakefile"
+cleanargs="-f lbmkbofhmakefile"
+mkhelper="copyps1bios"
diff --git a/include/rom.sh b/include/rom.sh
index 80643c48..cfd00a86 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -24,6 +24,13 @@ mkserprog()
 	[ "$XBMK_RELEASE" = "y" ] && mkrom_tarball "bin/serprog_$1"; return 0
 }
 
+copyps1bios()
+{
+	x_ rm -Rf bin/playstation
+	x_ mkdir -p bin/playstation
+	x_ cp src/pcsx-redux/src/mips/openbios/openbios.bin bin/playstation
+}
+
 mkpayload_grub()
 {
 	eval `setvars "" grub_modules grub_install_modules`
diff --git a/script/trees b/script/trees
index 01df28a0..5be43dcc 100755
--- a/script/trees
+++ b/script/trees
@@ -12,7 +12,7 @@ set -u -e
 eval `setvars "" xarch srcdir premake cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
-    defconfig postmake mkhelpercfg dry dest_dir mdir`; badhash="n"
+    defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs`; badhash="n"
 
 main()
 {
@@ -111,7 +111,8 @@ handle_defconfig()
 configure_project()
 {
 	eval `setvars "" xarch xlang build_depend autoconfargs xtree postmake \
-	    tree_depend makeargs btype mkhelper bootstrapargs premake release`
+	    tree_depend makeargs btype mkhelper bootstrapargs premake release \
+	    cleanargs`
 	_tcfg="$1/target.cfg"; badhash="n"; [ -f "$_tcfg" ] || btype="auto"
 	[ -f "$datadir/mkhelper.cfg" ] && eval `setcfg "$datadir/mkhelper.cfg"`
 
@@ -224,7 +225,7 @@ elfcheck()
 
 handle_makefile()
 {
-	$dry check_makefile "$srcdir" && x_ make clean -C "$srcdir"
+	$dry check_makefile "$srcdir" && x_ make -C "$srcdir" $cleanargs clean
 	[ -f "$defconfig" ] && x_ cp "$defconfig" "$srcdir/.config"
 	[ -n "$mode" ] || [ -n "$btype" ] || $dry make -C \
 	    "$srcdir" silentoldconfig || make -C "$srcdir" oldconfig || :
@@ -236,7 +237,7 @@ handle_makefile()
 	    $dry x_ cp "$srcdir/$_copy" "$defconfig"
 
 	[ -e "$srcdir/.git" ] && [ "$project" = "u-boot" ] && \
-	    [ "$mode" = "distclean" ] && $dry x_ git -C "$srcdir" clean -fdx; :
+	    [ "$mode" = "distclean" ] && $dry x_ git -C "$srcdir" $cleanargs clean -fdx; :
 }
 
 run_make_command()
@@ -248,7 +249,8 @@ run_make_command()
 	$dry make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs || $err "!$mode"
 	[ -z "$mkhelper" ] || [ -n "$mode" ] || $mkhelper || $err "!$mkhelper"
 
-	[ "$mode" = "clean" ] && $dry make -C "$srcdir" distclean || :; :
+	[ "$mode" = "clean" ] && \
+	    $dry make -C "$srcdir" $cleanargs distclean || :; :
 }
 
 check_cmake()
@@ -280,7 +282,7 @@ copy_elf()
 {
 	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do
 		[ -f "$srcdir/$f" ] && x_ cp "$srcdir/$f" "$dest_dir"
-	done < "$listfile"; x_ make clean -C "$srcdir"
+	done < "$listfile"; x_ make clean -C "$srcdir" $cleanargs
 }
 
 main $@ || exit 0

From e0e9c6ab3e463879c7b940717881b1826f05b485 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 27 Sep 2024 19:26:47 -0600
Subject: [PATCH 0825/1549] config/coreboot: Add Dell Latitude E4300

Add patches to convert the E6400 port into a GM45 Latitude variant and
add the E4300 as another variant, and create a config for the E4300.
Tested on my E6400 and E4300.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 ...mb-dell-Convert-E6400-into-a-variant.patch | 243 +++++++
 ...ell-gm45_latitudes-Add-E4300-variant.patch | 332 ++++++++++
 .../config/libgfxinit_corebootfb              |   3 +-
 .../config/libgfxinit_txtmode                 |   3 +-
 .../config/libgfxinit_corebootfb              |   3 +-
 .../config/libgfxinit_txtmode                 |   3 +-
 .../e4300_4mb/config/libgfxinit_corebootfb    | 623 ++++++++++++++++++
 .../e4300_4mb/config/libgfxinit_txtmode       | 619 +++++++++++++++++
 config/coreboot/e4300_4mb/target.cfg          |   6 +
 .../e5420_6mb/config/libgfxinit_corebootfb    |   3 +-
 .../e5420_6mb/config/libgfxinit_txtmode       |   3 +-
 .../e5520_6mb/config/libgfxinit_corebootfb    |   3 +-
 .../e5520_6mb/config/libgfxinit_txtmode       |   3 +-
 .../e5530_12mb/config/libgfxinit_corebootfb   |   3 +-
 .../e5530_12mb/config/libgfxinit_txtmode      |   3 +-
 .../e6220_10mb/config/libgfxinit_corebootfb   |   3 +-
 .../e6220_10mb/config/libgfxinit_txtmode      |   3 +-
 .../e6230_12mb/config/libgfxinit_corebootfb   |   3 +-
 .../e6230_12mb/config/libgfxinit_txtmode      |   3 +-
 .../e6320_10mb/config/libgfxinit_corebootfb   |   3 +-
 .../e6320_10mb/config/libgfxinit_txtmode      |   3 +-
 .../e6330_12mb/config/libgfxinit_corebootfb   |   3 +-
 .../e6330_12mb/config/libgfxinit_txtmode      |   3 +-
 .../e6400_4mb/config/libgfxinit_corebootfb    |  12 +-
 .../e6400_4mb/config/libgfxinit_txtmode       |  12 +-
 config/coreboot/e6400nvidia_4mb/config/normal |  10 +-
 .../e6420_10mb/config/libgfxinit_corebootfb   |   3 +-
 .../e6420_10mb/config/libgfxinit_txtmode      |   3 +-
 .../e6430_12mb/config/libgfxinit_corebootfb   |   3 +-
 .../e6430_12mb/config/libgfxinit_txtmode      |   3 +-
 .../e6520_10mb/config/libgfxinit_corebootfb   |   3 +-
 .../e6520_10mb/config/libgfxinit_txtmode      |   3 +-
 .../e6530_12mb/config/libgfxinit_corebootfb   |   3 +-
 .../e6530_12mb/config/libgfxinit_txtmode      |   3 +-
 .../t1650_12mb/config/libgfxinit_txtmode      |   3 +-
 35 files changed, 1897 insertions(+), 41 deletions(-)
 create mode 100644 config/coreboot/default/patches/0062-mb-dell-Convert-E6400-into-a-variant.patch
 create mode 100644 config/coreboot/default/patches/0063-mb-dell-gm45_latitudes-Add-E4300-variant.patch
 create mode 100644 config/coreboot/e4300_4mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/e4300_4mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/e4300_4mb/target.cfg

diff --git a/config/coreboot/default/patches/0062-mb-dell-Convert-E6400-into-a-variant.patch b/config/coreboot/default/patches/0062-mb-dell-Convert-E6400-into-a-variant.patch
new file mode 100644
index 00000000..2b705719
--- /dev/null
+++ b/config/coreboot/default/patches/0062-mb-dell-Convert-E6400-into-a-variant.patch
@@ -0,0 +1,243 @@
+From e74fe3cf69a9c44b226359814f0c177090e5a56c Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Thu, 26 Sep 2024 19:48:26 -0600
+Subject: [PATCH 62/63] mb/dell: Convert E6400 into a variant
+
+All the GM45 Dell Latitudes should be nearly identical, so convert the
+E6400 port into a variant so that future ports for the other systems can
+share code with each other.
+
+Change-Id: I8094fce56eaaadb20aef173644cd3b2c0b008e95
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e6400/Makefile.mk          |  10 --------
+ .../dell/{e6400 => gm45_latitude}/Kconfig     |  22 +++++++++++++-----
+ .../{e6400 => gm45_latitude}/Kconfig.name     |   0
+ src/mainboard/dell/gm45_latitude/Makefile.mk  |  11 +++++++++
+ .../dell/{e6400 => gm45_latitude}/acpi/ec.asl |   0
+ .../acpi/ich9_pci_irqs.asl                    |   0
+ .../{e6400 => gm45_latitude}/acpi/superio.asl |   0
+ .../dell/{e6400 => gm45_latitude}/blc.c       |   0
+ .../{e6400 => gm45_latitude}/board_info.txt   |   0
+ .../dell/{e6400 => gm45_latitude}/bootblock.c |   0
+ .../{e6400 => gm45_latitude}/cmos.default     |   0
+ .../dell/{e6400 => gm45_latitude}/cmos.layout |   0
+ .../dell/{e6400 => gm45_latitude}/cstates.c   |   0
+ .../{e6400 => gm45_latitude}/devicetree.cb    |   1 -
+ .../dell/{e6400 => gm45_latitude}/dsdt.asl    |   0
+ .../dell/{e6400 => gm45_latitude}/mainboard.c |   0
+ .../dell/{e6400 => gm45_latitude}/romstage.c  |   0
+ .../variants}/e6400/data.vbt                  | Bin
+ .../variants}/e6400/gma-mainboard.ads         |   0
+ .../{ => gm45_latitude/variants}/e6400/gpio.c |   0
+ .../variants}/e6400/hda_verb.c                |   0
+ .../variants/e6400/overridetree.cb            |   7 ++++++
+ 22 files changed, 34 insertions(+), 17 deletions(-)
+ delete mode 100644 src/mainboard/dell/e6400/Makefile.mk
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/Kconfig (64%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/Kconfig.name (100%)
+ create mode 100644 src/mainboard/dell/gm45_latitude/Makefile.mk
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/ec.asl (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/ich9_pci_irqs.asl (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/superio.asl (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/blc.c (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/board_info.txt (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/bootblock.c (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/cmos.default (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/cmos.layout (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/cstates.c (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/devicetree.cb (98%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/dsdt.asl (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/mainboard.c (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/romstage.c (100%)
+ rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/data.vbt (100%)
+ rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/gma-mainboard.ads (100%)
+ rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/gpio.c (100%)
+ rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/hda_verb.c (100%)
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
+
+diff --git a/src/mainboard/dell/e6400/Makefile.mk b/src/mainboard/dell/e6400/Makefile.mk
+deleted file mode 100644
+index ca3a82db48..0000000000
+--- a/src/mainboard/dell/e6400/Makefile.mk
++++ /dev/null
+@@ -1,10 +0,0 @@
+-## SPDX-License-Identifier: GPL-2.0-only
+-
+-bootblock-y += bootblock.c
+-
+-romstage-y += gpio.c
+-
+-ramstage-y += cstates.c
+-ramstage-y += blc.c
+-
+-ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/dell/e6400/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig
+similarity index 64%
+rename from src/mainboard/dell/e6400/Kconfig
+rename to src/mainboard/dell/gm45_latitude/Kconfig
+index 6fe1b1c456..ba76fb6e8c 100644
+--- a/src/mainboard/dell/e6400/Kconfig
++++ b/src/mainboard/dell/gm45_latitude/Kconfig
+@@ -1,9 +1,7 @@
+ ## SPDX-License-Identifier: GPL-2.0-only
+ 
+-if BOARD_DELL_E6400
+-
+-config BOARD_SPECIFIC_OPTIONS
+-	def_bool y
++config BOARD_DELL_GM45_LATITUDE_COMMON
++	def_bool n
+ 	select SYSTEM_TYPE_LAPTOP
+ 	select CPU_INTEL_SOCKET_P
+ 	select NORTHBRIDGE_INTEL_GM45
+@@ -19,19 +17,31 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select INTEL_GMA_HAVE_VBT
+ 	select EC_DELL_MEC5035
+ 
++
++config BOARD_DELL_E6400
++	select BOARD_DELL_GM45_LATITUDE_COMMON
++
++if BOARD_DELL_GM45_LATITUDE_COMMON
++
+ config INTEL_GMA_DPLL_REF_FREQ
+ 	default 100000000
+ 
+ config MAINBOARD_DIR
+-	default "dell/e6400"
++	default "dell/gm45_latitude"
+ 
+ config MAINBOARD_PART_NUMBER
+ 	default "Latitude E6400" if BOARD_DELL_E6400
+ 
++config OVERRIDE_DEVICETREE
++	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
++
++config VARIANT_DIR
++	default "e6400" if BOARD_DELL_E6400
++
+ config USBDEBUG_HCD_INDEX
+ 	default 1
+ 
+ config CBFS_SIZE
+ 	default 0x1A0000
+ 
+-endif # BOARD_DELL_E6400
++endif # BOARD_DELL_GM45_LATITUDE_COMMON
+diff --git a/src/mainboard/dell/e6400/Kconfig.name b/src/mainboard/dell/gm45_latitude/Kconfig.name
+similarity index 100%
+rename from src/mainboard/dell/e6400/Kconfig.name
+rename to src/mainboard/dell/gm45_latitude/Kconfig.name
+diff --git a/src/mainboard/dell/gm45_latitude/Makefile.mk b/src/mainboard/dell/gm45_latitude/Makefile.mk
+new file mode 100644
+index 0000000000..5295d5be22
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/Makefile.mk
+@@ -0,0 +1,11 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++bootblock-y += bootblock.c
++
++romstage-y += variants/$(VARIANT_DIR)/gpio.c
++
++ramstage-y += cstates.c
++ramstage-y += blc.c
++ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
++
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
+diff --git a/src/mainboard/dell/e6400/acpi/ec.asl b/src/mainboard/dell/gm45_latitude/acpi/ec.asl
+similarity index 100%
+rename from src/mainboard/dell/e6400/acpi/ec.asl
+rename to src/mainboard/dell/gm45_latitude/acpi/ec.asl
+diff --git a/src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl b/src/mainboard/dell/gm45_latitude/acpi/ich9_pci_irqs.asl
+similarity index 100%
+rename from src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl
+rename to src/mainboard/dell/gm45_latitude/acpi/ich9_pci_irqs.asl
+diff --git a/src/mainboard/dell/e6400/acpi/superio.asl b/src/mainboard/dell/gm45_latitude/acpi/superio.asl
+similarity index 100%
+rename from src/mainboard/dell/e6400/acpi/superio.asl
+rename to src/mainboard/dell/gm45_latitude/acpi/superio.asl
+diff --git a/src/mainboard/dell/e6400/blc.c b/src/mainboard/dell/gm45_latitude/blc.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/blc.c
+rename to src/mainboard/dell/gm45_latitude/blc.c
+diff --git a/src/mainboard/dell/e6400/board_info.txt b/src/mainboard/dell/gm45_latitude/board_info.txt
+similarity index 100%
+rename from src/mainboard/dell/e6400/board_info.txt
+rename to src/mainboard/dell/gm45_latitude/board_info.txt
+diff --git a/src/mainboard/dell/e6400/bootblock.c b/src/mainboard/dell/gm45_latitude/bootblock.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/bootblock.c
+rename to src/mainboard/dell/gm45_latitude/bootblock.c
+diff --git a/src/mainboard/dell/e6400/cmos.default b/src/mainboard/dell/gm45_latitude/cmos.default
+similarity index 100%
+rename from src/mainboard/dell/e6400/cmos.default
+rename to src/mainboard/dell/gm45_latitude/cmos.default
+diff --git a/src/mainboard/dell/e6400/cmos.layout b/src/mainboard/dell/gm45_latitude/cmos.layout
+similarity index 100%
+rename from src/mainboard/dell/e6400/cmos.layout
+rename to src/mainboard/dell/gm45_latitude/cmos.layout
+diff --git a/src/mainboard/dell/e6400/cstates.c b/src/mainboard/dell/gm45_latitude/cstates.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/cstates.c
+rename to src/mainboard/dell/gm45_latitude/cstates.c
+diff --git a/src/mainboard/dell/e6400/devicetree.cb b/src/mainboard/dell/gm45_latitude/devicetree.cb
+similarity index 98%
+rename from src/mainboard/dell/e6400/devicetree.cb
+rename to src/mainboard/dell/gm45_latitude/devicetree.cb
+index e9f3915d17..76dae87153 100644
+--- a/src/mainboard/dell/e6400/devicetree.cb
++++ b/src/mainboard/dell/gm45_latitude/devicetree.cb
+@@ -15,7 +15,6 @@ chip northbridge/intel/gm45
+ 	register "pci_mmio_size" = "2048"
+ 
+ 	device domain 0 on
+-		subsystemid 0x1028 0x0233 inherit
+ 		ops gm45_pci_domain_ops
+ 
+ 		device pci 00.0 on end # host bridge
+diff --git a/src/mainboard/dell/e6400/dsdt.asl b/src/mainboard/dell/gm45_latitude/dsdt.asl
+similarity index 100%
+rename from src/mainboard/dell/e6400/dsdt.asl
+rename to src/mainboard/dell/gm45_latitude/dsdt.asl
+diff --git a/src/mainboard/dell/e6400/mainboard.c b/src/mainboard/dell/gm45_latitude/mainboard.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/mainboard.c
+rename to src/mainboard/dell/gm45_latitude/mainboard.c
+diff --git a/src/mainboard/dell/e6400/romstage.c b/src/mainboard/dell/gm45_latitude/romstage.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/romstage.c
+rename to src/mainboard/dell/gm45_latitude/romstage.c
+diff --git a/src/mainboard/dell/e6400/data.vbt b/src/mainboard/dell/gm45_latitude/variants/e6400/data.vbt
+similarity index 100%
+rename from src/mainboard/dell/e6400/data.vbt
+rename to src/mainboard/dell/gm45_latitude/variants/e6400/data.vbt
+diff --git a/src/mainboard/dell/e6400/gma-mainboard.ads b/src/mainboard/dell/gm45_latitude/variants/e6400/gma-mainboard.ads
+similarity index 100%
+rename from src/mainboard/dell/e6400/gma-mainboard.ads
+rename to src/mainboard/dell/gm45_latitude/variants/e6400/gma-mainboard.ads
+diff --git a/src/mainboard/dell/e6400/gpio.c b/src/mainboard/dell/gm45_latitude/variants/e6400/gpio.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/gpio.c
+rename to src/mainboard/dell/gm45_latitude/variants/e6400/gpio.c
+diff --git a/src/mainboard/dell/e6400/hda_verb.c b/src/mainboard/dell/gm45_latitude/variants/e6400/hda_verb.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/hda_verb.c
+rename to src/mainboard/dell/gm45_latitude/variants/e6400/hda_verb.c
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb b/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
+new file mode 100644
+index 0000000000..acc34a2252
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
+@@ -0,0 +1,7 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/gm45
++	device domain 0 on
++		subsystemid 0x1028 0x0233 inherit
++	end
++end
+-- 
+2.46.1
+
diff --git a/config/coreboot/default/patches/0063-mb-dell-gm45_latitudes-Add-E4300-variant.patch b/config/coreboot/default/patches/0063-mb-dell-gm45_latitudes-Add-E4300-variant.patch
new file mode 100644
index 00000000..5cf3ea57
--- /dev/null
+++ b/config/coreboot/default/patches/0063-mb-dell-gm45_latitudes-Add-E4300-variant.patch
@@ -0,0 +1,332 @@
+From f8c8ab28f22c90e4104b272cb33c890d6fa1e940 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Thu, 26 Sep 2024 19:51:25 -0600
+Subject: [PATCH 63/63] mb/dell/gm45_latitudes: Add E4300 variant
+
+Change-Id: I0f2059501b11be103187e3ce1a7c04ab85ae63d2
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/gm45_latitude/Kconfig      |   5 +
+ src/mainboard/dell/gm45_latitude/Kconfig.name |   3 +
+ .../gm45_latitude/variants/e4300/data.vbt     | Bin 0 -> 3881 bytes
+ .../variants/e4300/gma-mainboard.ads          |  17 +++
+ .../dell/gm45_latitude/variants/e4300/gpio.c  | 138 ++++++++++++++++++
+ .../gm45_latitude/variants/e4300/hda_verb.c   |  37 +++++
+ .../variants/e4300/overridetree.cb            |  10 ++
+ 7 files changed, 210 insertions(+)
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/data.vbt
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/gma-mainboard.ads
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/gpio.c
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/hda_verb.c
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/overridetree.cb
+
+diff --git a/src/mainboard/dell/gm45_latitude/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig
+index ba76fb6e8c..144f9bcdf0 100644
+--- a/src/mainboard/dell/gm45_latitude/Kconfig
++++ b/src/mainboard/dell/gm45_latitude/Kconfig
+@@ -21,6 +21,9 @@ config BOARD_DELL_GM45_LATITUDE_COMMON
+ config BOARD_DELL_E6400
+ 	select BOARD_DELL_GM45_LATITUDE_COMMON
+ 
++config BOARD_DELL_E4300
++	select BOARD_DELL_GM45_LATITUDE_COMMON
++
+ if BOARD_DELL_GM45_LATITUDE_COMMON
+ 
+ config INTEL_GMA_DPLL_REF_FREQ
+@@ -31,12 +34,14 @@ config MAINBOARD_DIR
+ 
+ config MAINBOARD_PART_NUMBER
+ 	default "Latitude E6400" if BOARD_DELL_E6400
++	default "Latitude E4300" if BOARD_DELL_E4300
+ 
+ config OVERRIDE_DEVICETREE
+ 	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+ 
+ config VARIANT_DIR
+ 	default "e6400" if BOARD_DELL_E6400
++	default "e4300" if BOARD_DELL_E4300
+ 
+ config USBDEBUG_HCD_INDEX
+ 	default 1
+diff --git a/src/mainboard/dell/gm45_latitude/Kconfig.name b/src/mainboard/dell/gm45_latitude/Kconfig.name
+index aefe777109..4dc95f46be 100644
+--- a/src/mainboard/dell/gm45_latitude/Kconfig.name
++++ b/src/mainboard/dell/gm45_latitude/Kconfig.name
+@@ -1,4 +1,7 @@
+ ## SPDX-License-Identifier: GPL-2.0-only
+ 
++config BOARD_DELL_E4300
++	bool "Latitude E4300"
++
+ config BOARD_DELL_E6400
+ 	bool "Latitude E6400"
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e4300/data.vbt b/src/mainboard/dell/gm45_latitude/variants/e4300/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..fa2f3db13f688b5687df16a155781d8674ea26f3
+GIT binary patch
+literal 3881
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+z%xfIo$p$+0N}Qe(C7MY#!0SQ1({^-qFj5ylEHjhwn>8}OhGtOw#1e$Fn9w<r1Zp}l
+zPz$#mOP$ow*1(UHvmCGVz;T^IRnSxa*6jz+_oSD)xmT|Cbl&YcJ5M&d?&+&NDI2Y0
+zO0ai&>sUmbC8g}vF{$V$Y~rFp!qRJP)Z!2NYEhIpf^PzD_^ptxacQ#R+9@(N>ibe6
+z@|mz|d=bjIxSe3u0>+jxdmFQMG4?34k2C9i#y(>91!n!pSR`S$B&>T9Y*WHMl(1e%
+zuvZiInS^yV!G28GmAbW9XHB~OfNnjavje*Qrfz+xvyXNAl5R-`OBnW@hPA<9+YI|D
+z!+P0Z#|`^S!}`Hs7Yw^5X*DKUOVaL7TBAv}d|dV9^O8rYn%=4o&5GjdSWeb`yeyf7
+zk&0z-2#I*9^ljWL^79K!Ex#yORz2-nxRYGT$+NdKUcs>{SI2Fyx@<{2w?w*#&%hG*
+zeY&DumV{4Nw4(1*^g5r`avbR44Nj-miiQs;Ii;O}*rL^|oYl8hQ9P@{Qf5}Gn;uRg
+zI{c?gKNv~R$<jgIlQvzm9GD`y{Dh<T(H)!WlUUWvtFvzDqaVV>&eHj<So5w}UG%+7
+zt=J~1YHpT3TjRY{XlrmCz6QBZ$WqGr>8!uus22Br_GkCD$Q)pf!<P$30Ez;o=qDzr
+z7@f;LJ+ZPlo=?}4PvMm&OKLGLZ0h1&n7U8@9GP~;8!wz(OqQ<s6e;@8hfYU0ht*9>
+zGh%f}_&(hXOZrW-WCWJVw`DdrczV_sXGaOvzjt%F!O;{7J-K<j&AXad#XeO8mgw(v
+z_Gj1VBJZIpZ<>`tJBTNGZHe^T`VrkY0pv~u^?l~DG9UD8p8(692<oYlGx5_cte6LX
+JE5(FU=`RLB=-&VU
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e4300/gma-mainboard.ads b/src/mainboard/dell/gm45_latitude/variants/e4300/gma-mainboard.ads
+new file mode 100644
+index 0000000000..89b81b3d69
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/variants/e4300/gma-mainboard.ads
+@@ -0,0 +1,17 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (DP2, -- dock DP
++      Analog, -- mainboard VGA
++      LVDS,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e4300/gpio.c b/src/mainboard/dell/gm45_latitude/variants/e4300/gpio.c
+new file mode 100644
+index 0000000000..b50f8da0b5
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/variants/e4300/gpio.c
+@@ -0,0 +1,138 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0  = GPIO_MODE_NATIVE,
++	.gpio1  = GPIO_MODE_GPIO,
++	.gpio2  = GPIO_MODE_GPIO,
++	.gpio3  = GPIO_MODE_GPIO,
++	.gpio4  = GPIO_MODE_GPIO,
++	.gpio5  = GPIO_MODE_GPIO,
++	.gpio6  = GPIO_MODE_GPIO,
++	.gpio7  = GPIO_MODE_GPIO,
++	.gpio8  = GPIO_MODE_GPIO,
++	.gpio9  = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_NATIVE,
++	.gpio16 = GPIO_MODE_NATIVE,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_GPIO,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_GPIO,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_NATIVE,
++	.gpio30 = GPIO_MODE_NATIVE,
++	.gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio1  = GPIO_DIR_INPUT,
++	.gpio2  = GPIO_DIR_INPUT,
++	.gpio3  = GPIO_DIR_INPUT,
++	.gpio4  = GPIO_DIR_INPUT,
++	.gpio5  = GPIO_DIR_INPUT,
++	.gpio6  = GPIO_DIR_INPUT,
++	.gpio7  = GPIO_DIR_INPUT,
++	.gpio8  = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_INPUT,
++	.gpio18 = GPIO_DIR_INPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio20 = GPIO_DIR_INPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio1  = GPIO_INVERT,
++	.gpio7  = GPIO_INVERT,
++	.gpio8  = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_NATIVE,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_NATIVE,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_NATIVE,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_NATIVE,
++	.gpio52 = GPIO_MODE_GPIO,
++	.gpio53 = GPIO_MODE_GPIO,
++	.gpio54 = GPIO_MODE_NATIVE,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_GPIO,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_INPUT,
++	.gpio52 = GPIO_DIR_INPUT,
++	.gpio53 = GPIO_DIR_INPUT,
++	.gpio56 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode      = &pch_gpio_set1_mode,
++		.direction = &pch_gpio_set1_direction,
++		.level     = &pch_gpio_set1_level,
++		.blink     = &pch_gpio_set1_blink,
++		.invert    = &pch_gpio_set1_invert,
++	},
++	.set2 = {
++		.mode      = &pch_gpio_set2_mode,
++		.direction = &pch_gpio_set2_direction,
++		.level     = &pch_gpio_set2_level,
++	},
++};
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e4300/hda_verb.c b/src/mainboard/dell/gm45_latitude/variants/e4300/hda_verb.c
+new file mode 100644
+index 0000000000..a9948a93dd
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/variants/e4300/hda_verb.c
+@@ -0,0 +1,37 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	/* coreboot specific header */
++	0x111d76b2, /* IDT 92HD71B7X */
++	0x1028024d, /* Subsystem ID */
++	13,	    /* Number of entries */
++
++	/* Pin Widget Verb Table */
++
++	AZALIA_PIN_CFG(0, 0x0a, 0x0421101f),
++	AZALIA_PIN_CFG(0, 0x0b, 0x04a11021),
++	AZALIA_PIN_CFG(0, 0x0c, 0x40f000f0),
++	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x0e, 0x23a1102e),
++	AZALIA_PIN_CFG(0, 0x0f, 0x23011050),
++	AZALIA_PIN_CFG(0, 0x14, 0x40f000f2),
++	AZALIA_PIN_CFG(0, 0x18, 0x90a601a0),
++	AZALIA_PIN_CFG(0, 0x19, 0x40f000f4),
++	AZALIA_PIN_CFG(0, 0x1e, 0x40f000f5),
++	AZALIA_PIN_CFG(0, 0x1f, 0x40f000f6),
++	AZALIA_PIN_CFG(0, 0x20, 0x40f000f7),
++	AZALIA_PIN_CFG(0, 0x27, 0x40f000f0),
++};
++
++const u32 pc_beep_verbs[] = {
++	0x00170500, /* power up codec */
++	0x00d70500, /* power up speakers */
++	0x00d70102, /* select mixer (input 0x2) for speakers */
++	0x00d70740, /* enable speakers output */
++	0x02770720, /* enable beep input */
++	0x01737217, /* unmute beep (mixer's input 0x2), set amp 0dB */
++	0x00d37000, /* unmute speakers */
++};
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e4300/overridetree.cb b/src/mainboard/dell/gm45_latitude/variants/e4300/overridetree.cb
+new file mode 100644
+index 0000000000..20dfa245fb
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/variants/e4300/overridetree.cb
+@@ -0,0 +1,10 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/gm45
++	device domain 0 on
++		subsystemid 0x1028 0x024d inherit
++		chip southbridge/intel/i82801ix
++			device pci 1c.2 off end # PCIe Port #3
++		end
++	end
++end
+-- 
+2.46.1
+
diff --git a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
index 92af8657..7db6d89e 100644
--- a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
@@ -141,8 +141,9 @@ CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
diff --git a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
index 7fdf766c..831b4b29 100644
--- a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
@@ -139,8 +139,9 @@ CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
diff --git a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
index 341b34da..2c460c4b 100644
--- a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
@@ -141,8 +141,9 @@ CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
index 17c33085..3563bf2c 100644
--- a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
@@ -139,8 +139,9 @@ CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb b/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..43b5e1f5
--- /dev/null
+++ b/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb
@@ -0,0 +1,623 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E4300"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/gm45_latitude"
+CONFIG_VGA_BIOS_ID="8086,2a42"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x3FD000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e4300"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_E4300=y
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefc0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=4096
+CONFIG_ROM_SIZE=0x00400000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x61254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_SOCKET_P=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_GM45=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_EDID=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_NULL=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e4300_4mb/config/libgfxinit_txtmode b/config/coreboot/e4300_4mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..28caa370
--- /dev/null
+++ b/config/coreboot/e4300_4mb/config/libgfxinit_txtmode
@@ -0,0 +1,619 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E4300"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/gm45_latitude"
+CONFIG_VGA_BIOS_ID="8086,2a42"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x3FD000
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e4300"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_E4300=y
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefc0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=4096
+CONFIG_ROM_SIZE=0x00400000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x61254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_SOCKET_P=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_GM45=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_EDID=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_NULL=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e4300_4mb/target.cfg b/config/coreboot/e4300_4mb/target.cfg
new file mode 100644
index 00000000..4a9af479
--- /dev/null
+++ b/config/coreboot/e4300_4mb/target.cfg
@@ -0,0 +1,6 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
index a609ac93..af5b8906 100644
--- a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
@@ -139,8 +139,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
index 9370d5eb..72ebebc1 100644
--- a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
@@ -137,8 +137,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
index c3a5b3fd..911c6b65 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
@@ -139,8 +139,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
index a796ad77..eecdfd6c 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
@@ -137,8 +137,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
index e334d6bb..de00bd3b 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
@@ -139,8 +139,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
index 04d2b2b9..5bacbb59 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
@@ -137,8 +137,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
index 49123c07..67995fc1 100644
--- a/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
@@ -139,8 +139,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e6220_10mb/config/libgfxinit_txtmode b/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
index 3ba27be7..8a51ce95 100644
--- a/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
@@ -137,8 +137,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
index 39355064..c15da3a1 100644
--- a/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
@@ -139,8 +139,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e6230_12mb/config/libgfxinit_txtmode b/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
index 9ec25ddc..db76355a 100644
--- a/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
@@ -137,8 +137,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
index cbbc8b1c..75af1da9 100644
--- a/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
@@ -139,8 +139,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e6320_10mb/config/libgfxinit_txtmode b/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
index 21c371d9..bba8ac91 100644
--- a/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
@@ -137,8 +137,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
index 8163984c..6b00fa47 100644
--- a/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
@@ -139,8 +139,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e6330_12mb/config/libgfxinit_txtmode b/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
index d4241b14..b7dedfce 100644
--- a/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
@@ -137,8 +137,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
index 020b6705..4267793a 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
@@ -105,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6400"
+CONFIG_MAINBOARD_DIR="dell/gm45_latitude"
 CONFIG_VGA_BIOS_ID="10de,06eb"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -124,22 +123,24 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6400"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 CONFIG_VGA_BIOS=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_USBDEBUG_HCD_INDEX=1
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
@@ -157,6 +158,7 @@ CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
index ed28df8d..efd7fcef 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
@@ -105,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6400"
+CONFIG_MAINBOARD_DIR="dell/gm45_latitude"
 CONFIG_VGA_BIOS_ID="10de,06eb"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -122,22 +121,24 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6400"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 CONFIG_VGA_BIOS=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_USBDEBUG_HCD_INDEX=1
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
@@ -155,6 +156,7 @@ CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
diff --git a/config/coreboot/e6400nvidia_4mb/config/normal b/config/coreboot/e6400nvidia_4mb/config/normal
index 0d617430..455bb78f 100644
--- a/config/coreboot/e6400nvidia_4mb/config/normal
+++ b/config/coreboot/e6400nvidia_4mb/config/normal
@@ -105,10 +105,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6400"
+CONFIG_MAINBOARD_DIR="dell/gm45_latitude"
 CONFIG_VGA_BIOS_ID="10de,06eb"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -122,7 +121,8 @@ CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6400"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 CONFIG_VGA_BIOS=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
@@ -135,8 +135,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
@@ -154,6 +155,7 @@ CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
index 96ac77ab..b2cb70fe 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
@@ -139,8 +139,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
index e5558336..2ed613a2 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
@@ -137,8 +137,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 8e11b5c9..1f99865c 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -139,8 +139,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index 9a78a250..54d89ef4 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -137,8 +137,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
index d13cfc04..1eea8822 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
@@ -139,8 +139,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
index 53c515c4..3a8fc91c 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
@@ -137,8 +137,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index cf6bc11d..6cfb5add 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -139,8 +139,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index a0431ca3..ed32a935 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -137,8 +137,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index f368798b..9761efd6 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -140,8 +140,9 @@ CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set

From 02e76d09c1c91ca09c3487259b769ebd85c1915d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Sep 2024 09:35:46 +0100
Subject: [PATCH 0826/1549] add swig to fedora dependencies

needed when compiling u-boot

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/fedora38 |  2 +-
 config/dependencies/fedora40 |  2 +-
 include/git.sh               | 13 ++++++++-----
 3 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/config/dependencies/fedora38 b/config/dependencies/fedora38
index 5575a5f0..8f672205 100755
--- a/config/dependencies/fedora38
+++ b/config/dependencies/fedora38
@@ -8,5 +8,5 @@ innoextract intltool libftdi-devel libselinux-devel libusb1 libusb1-devel \
 nasm ncurses-devel openssl-devel p7zip p7zip-plugins pandoc parted \
 pciutils-devel perl perl-libwww-perl python-unversioned-command python3 \
 python3-setuptools rsync sharutils subversion texinfo unar unifont \
-unifont-fonts unifont-ttf-fonts unzip wget xz zlib-devel ccache \
+unifont-fonts unifont-ttf-fonts unzip wget xz zlib-devel ccache swig \
 "
diff --git a/config/dependencies/fedora40 b/config/dependencies/fedora40
index f39de483..f73595b8 100755
--- a/config/dependencies/fedora40
+++ b/config/dependencies/fedora40
@@ -9,5 +9,5 @@ libselinux-devel libusb1 libusb1-devel nasm ncurses-devel openssl-devel \
 p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \
 python-unversioned-command python3 python3-setuptools rsync sharutils \
 subversion systemd-devel texinfo unar unifont unifont-fonts \
-unifont-ttf-fonts unzip wget xz zlib-devel ccache
+unifont-ttf-fonts unzip wget xz zlib-devel ccache swig \
 "
diff --git a/include/git.sh b/include/git.sh
index 8c86b4c2..0c2f7acc 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -91,21 +91,24 @@ fetch_submodule()
 	    "$mdir/${1##*/}/patches"
 }
 
+livepull="n"
 tmpclone()
 {
 	[ "$repofail" = "y" ] && \
-	    printf "Cached clone failed; trying online.\n" 1>&2; repofail="n"
+	    printf "Cached clone failed; trying online.\n" 1>&2 && livepull="y"
+
+	repofail="n"
 
 	[ $# -lt 6 ] || rm -Rf "$3" || $err "git retry: !rm $3 ($1)"
 	repodir="$XBMK_CACHE/repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"
 	mkdir -p "$XBMK_CACHE/repo" || $err "!rmdir $XBMK_CACHE/repo"
 
-	if [ -d "$repodir" ] && [ $# -lt 6 ]; then
-		git -C "$repodir" pull || sleep 3 || git -C "$repodir" pull \
-		    || sleep 3 || git -C "$repodir" pull || :
-	else
+	if [ "$livepull" = "y" ]; then
 		git clone $1 "$repodir" || git clone $2 "$repodir" || \
 		    $err "!clone $1 $2 $repodir $4 $5"
+	elif [ -d "$repodir" ] && [ $# -lt 6 ]; then
+		git -C "$repodir" pull || sleep 3 || git -C "$repodir" pull \
+		    || sleep 3 || git -C "$repodir" pull || :
 	fi
 	(
 	[ $# -gt 5 ] || git clone "$repodir" "$3" || $err "!clone $repodir $3"

From 23e64192ed036a24181a49702655ffd7812fb2cb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 4 Oct 2024 22:24:57 +0100
Subject: [PATCH 0827/1549] Add Dell OptiPlex 7010/9010 SFF support

Pretty much just copied the T1650 directory in config/,
then changed the board to 9010 SFF in menuconfig.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_txtmode                 | 672 ++++++++++++++++++
 config/coreboot/dell7010sff_12mb/target.cfg   |   9 +
 2 files changed, 681 insertions(+)
 create mode 100644 config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/dell7010sff_12mb/target.cfg

diff --git a/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode b/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..3e4ee022
--- /dev/null
+++ b/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,672 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Precision T1650"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_workstations"
+CONFIG_VGA_BIOS_ID="8086,0106"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xBE5000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="variants/baseboard/devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="optiplex_9010_sff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9010=y
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_WORKSTATIONS=y
+CONFIG_INCLUDE_SMSC_SCH5545_EC_FW=y
+CONFIG_SMSC_SCH5545_EC_FW_FILE="../../../vendorfiles/t1650/sch5545ec.bin"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t1650/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t1650/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t1650/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Precision T1650"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH5545=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell7010sff_12mb/target.cfg b/config/coreboot/dell7010sff_12mb/target.cfg
new file mode 100644
index 00000000..abc1d14e
--- /dev/null
+++ b/config/coreboot/dell7010sff_12mb/target.cfg
@@ -0,0 +1,9 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="nvme"
+vcfg="t1650"
+build_depend="seabios/default grub/nvme memtest86plus"

From c3ef0a863912af184c4a49e4876c7845ba3100aa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 24 Sep 2024 21:42:43 +0100
Subject: [PATCH 0828/1549] Add config for Dell OptiPlex 3050 Micro

This is using Mate Kukri's port, which was added in
previous lbmk revisions. I've added an IFD that sets
the HAP bit, and unlocks regions as standard.

vcfg is set to 3050micro, which defines downloading
of the MEv11 image and it will run deguard automatically.

I made a small adjustment to vendor.sh, because the hotpatch
logic for deguard uses -C in git, and when doing that, the
specified directory path is relative to that Git repository;
the .patch path has been adjusted accordingly.

Also add 3rdparty/fsp to coreboot/default modules.

This board requires the ifdtool option: -p sklkbl

The -p option tells flashrom what quirks are present in a
given IFD. We don't normally need this on other Libreboot
targets that we currently support. The -p option was needed
for creating this modified IFD, and it is therefore needed in
the inject script. Therefore, an "IFD_platform" option is
specified in a given board's target.cfg file. If this is set,
another variable is set that makes -p be used.

In this case, 3050's target.cfg says:

IFD_platform="sklkbl"

This option enables quirks for skylake/kabylake descriptors,
as required when using ifdtool.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              | 798 ++++++++++++++++++
 .../config/libgfxinit_txtmode                 | 795 +++++++++++++++++
 .../dell3050micro_fsp_16mb/target.cfg         |  10 +
 config/ifd/3050micro/ifd                      | Bin 0 -> 4096 bytes
 .../submodule/coreboot/default/fsp/module.cfg |   3 +
 config/submodule/coreboot/default/module.list |   1 +
 include/vendor.sh                             |  16 +-
 7 files changed, 1616 insertions(+), 7 deletions(-)
 create mode 100644 config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/dell3050micro_fsp_16mb/target.cfg
 create mode 100644 config/ifd/3050micro/ifd
 create mode 100644 config/submodule/coreboot/default/fsp/module.cfg

diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..d46a9361
--- /dev/null
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
@@ -0,0 +1,798 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_3050"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=512
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xEEE000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+CONFIG_USE_PM_ACPI_TIMER=y
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_3050=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin"
+CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+# CONFIG_USE_LEGACY_8254_TIMER is not set
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
+CONFIG_TTYS0_BAUD=115200
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
+CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
+CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x200000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_BERT_SIZE=0x0
+CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IFD_CHIPSET="sklkbl"
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_MAX_ROOT_PORTS=24
+CONFIG_PCR_BASE_ADDRESS=0xfd000000
+CONFIG_CPU_BCLK_MHZ=100
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
+CONFIG_CPU_XTAL_HZ=24000000
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
+CONFIG_SOC_INTEL_I2C_DEV_MAX=6
+# CONFIG_ENABLE_SATA_TEST_MODE is not set
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
+CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_MAX_HECI_DEVICES=5
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_PAM0_REGISTER=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
+CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
+CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
+CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
+CONFIG_SOC_INTEL_KABYLAKE=y
+CONFIG_SKYLAKE_SOC_PCH_H=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
+# CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
+CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code for IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
+CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
+# CONFIG_USE_COREBOOT_MP_INIT is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
+CONFIG_INTEL_CAR_NEM_ENHANCED=y
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_INTEL_KEYLOCKER is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
+CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
+CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
+CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
+CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
+CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
+CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
+CONFIG_SOC_INTEL_CSE_RW_FILE=""
+CONFIG_SOC_INTEL_CSE_RW_VERSION=""
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
+CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
+CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
+CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
+# CONFIG_SOC_INTEL_DISABLE_IGD is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
+CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
+CONFIG_SA_ENABLE_DPR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
+
+#
+# Intel SoC Common PCH Code
+#
+CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
+CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
+CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
+CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
+
+#
+# Intel SoC Common coreboot stages and non-IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BASECODE=y
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+CONFIG_PAVP=y
+# CONFIG_MMA is not set
+CONFIG_SOC_INTEL_COMMON_NHLT=y
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_PARALLEL_MP_AP_WORK=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_UDK_BASE=y
+CONFIG_UDK_2017_BINDING=y
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_202005_VERSION=202005
+CONFIG_UDK_202111_VERSION=202111
+CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_VERSION=2017
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_HAVE_FSP_GOP=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+# CONFIG_INTEL_GMA_ADD_VBT is not set
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_DESIGNWARE=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_FSP_USE_REPO=y
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+# CONFIG_BMP_LOGO is not set
+CONFIG_PLATFORM_USES_FSP2_0=y
+CONFIG_PLATFORM_USES_FSP2_X86_32=y
+CONFIG_HAVE_INTEL_FSP_REPO=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_T_LOCATION=0xfffe0000
+CONFIG_FSP_S_CBFS="fsps.bin"
+CONFIG_FSP_M_CBFS="fspm.bin"
+CONFIG_FSP_FULL_FD=y
+CONFIG_FSP_T_RESERVED_SIZE=0x0
+CONFIG_FSP_M_XIP=y
+CONFIG_HAVE_FSP_LOGO_SUPPORT=y
+CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
+CONFIG_FSP_STATUS_GLOBAL_RESET_REQUIRED_3=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
+CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
+CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
+CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
+CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
+# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Skylake"
+CONFIG_GFX_GMA_PCH="Sunrise_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_TPM1 is not set
+CONFIG_TPM2=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM2=y
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_CUSTOM_MADT=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_ACPI_LPIT=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_ACPI_S1_NOT_SUPPORTED=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_ACPI_NHLT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
+# CONFIG_DISPLAY_FSP_HEADER is not set
+# CONFIG_VERIFY_HOBS is not set
+# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
+CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
+# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_HAVE_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..510deac5
--- /dev/null
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
@@ -0,0 +1,795 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_3050"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=512
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xEEE000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+CONFIG_USE_PM_ACPI_TIMER=y
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_3050=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin"
+CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+# CONFIG_USE_LEGACY_8254_TIMER is not set
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
+CONFIG_TTYS0_BAUD=115200
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
+CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
+CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x200000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_BERT_SIZE=0x0
+CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IFD_CHIPSET="sklkbl"
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_MAX_ROOT_PORTS=24
+CONFIG_PCR_BASE_ADDRESS=0xfd000000
+CONFIG_CPU_BCLK_MHZ=100
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
+CONFIG_CPU_XTAL_HZ=24000000
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
+CONFIG_SOC_INTEL_I2C_DEV_MAX=6
+# CONFIG_ENABLE_SATA_TEST_MODE is not set
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
+CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_MAX_HECI_DEVICES=5
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_PAM0_REGISTER=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
+CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
+CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
+CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
+CONFIG_SOC_INTEL_KABYLAKE=y
+CONFIG_SKYLAKE_SOC_PCH_H=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
+# CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
+CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code for IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
+CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
+# CONFIG_USE_COREBOOT_MP_INIT is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
+CONFIG_INTEL_CAR_NEM_ENHANCED=y
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_INTEL_KEYLOCKER is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
+CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
+CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
+CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
+CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
+CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
+CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
+CONFIG_SOC_INTEL_CSE_RW_FILE=""
+CONFIG_SOC_INTEL_CSE_RW_VERSION=""
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
+CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
+CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
+CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
+# CONFIG_SOC_INTEL_DISABLE_IGD is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
+CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
+CONFIG_SA_ENABLE_DPR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
+
+#
+# Intel SoC Common PCH Code
+#
+CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
+CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
+CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
+CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
+
+#
+# Intel SoC Common coreboot stages and non-IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BASECODE=y
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+CONFIG_PAVP=y
+# CONFIG_MMA is not set
+CONFIG_SOC_INTEL_COMMON_NHLT=y
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_PARALLEL_MP_AP_WORK=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_UDK_BASE=y
+CONFIG_UDK_2017_BINDING=y
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_202005_VERSION=202005
+CONFIG_UDK_202111_VERSION=202111
+CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_VERSION=2017
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_HAVE_FSP_GOP=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+# CONFIG_INTEL_GMA_ADD_VBT is not set
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_DESIGNWARE=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_FSP_USE_REPO=y
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+# CONFIG_BMP_LOGO is not set
+CONFIG_PLATFORM_USES_FSP2_0=y
+CONFIG_PLATFORM_USES_FSP2_X86_32=y
+CONFIG_HAVE_INTEL_FSP_REPO=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_T_LOCATION=0xfffe0000
+CONFIG_FSP_S_CBFS="fsps.bin"
+CONFIG_FSP_M_CBFS="fspm.bin"
+CONFIG_FSP_FULL_FD=y
+CONFIG_FSP_T_RESERVED_SIZE=0x0
+CONFIG_FSP_M_XIP=y
+CONFIG_HAVE_FSP_LOGO_SUPPORT=y
+CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
+CONFIG_FSP_STATUS_GLOBAL_RESET_REQUIRED_3=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
+CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
+CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
+CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
+CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
+# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Skylake"
+CONFIG_GFX_GMA_PCH="Sunrise_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_TPM1 is not set
+CONFIG_TPM2=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM2=y
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_CUSTOM_MADT=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_ACPI_LPIT=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_ACPI_S1_NOT_SUPPORTED=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_ACPI_NHLT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
+# CONFIG_DISPLAY_FSP_HEADER is not set
+# CONFIG_VERIFY_HOBS is not set
+# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
+CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
+# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_HAVE_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell3050micro_fsp_16mb/target.cfg b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
new file mode 100644
index 00000000..79dc358f
--- /dev/null
+++ b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
@@ -0,0 +1,10 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="3050micro"
+build_depend="seabios/default grub/xhci memtest86plus"
+IFD_platform="sklkbl"
diff --git a/config/ifd/3050micro/ifd b/config/ifd/3050micro/ifd
new file mode 100644
index 0000000000000000000000000000000000000000..782c5697e53a1b597623bbf037812d30fee4e008
GIT binary patch
literal 4096
zcmeHJJxc>Y5Ph5V@FKxY4urGHS_H9+wt^f&@E2?oEEKf26$B&r0}N<yV`(i~i3sLj
z<R_RSVso(0m?aoI6fIJOc`!3~Z*J$~ZFAmFqJ1+k8gqzC)pk>_V>0Xg8+MbG?Y-N(
z`{x(VfsiO~6l%(!0)I7bFg7k0YI5yq0O$gW8-E26-#A^sl?u3`v&9^p#u1sOhl9|5
zZ3|$&Le>o2I5=)cj<86^BUU0HTXHyIlHuy;4r2eF=lO{E#iyhE4uwZrk+G>Sa7Hl!
zsx%po0}S`e%M^~Cb9HL0=hXraT81I-VSwJ@`RA8dHP=)r!*Jsg2=%9Nm;dR(8z!Av
z=Zd!whytR3C?E=m0-}H@APR^AGp4|6mZD)B_Q|Gb*_Q2vcl(ecvXPy!b$?u^AIm@g
E2h=Vw9{>OV

literal 0
HcmV?d00001

diff --git a/config/submodule/coreboot/default/fsp/module.cfg b/config/submodule/coreboot/default/fsp/module.cfg
new file mode 100644
index 00000000..3373a1a9
--- /dev/null
+++ b/config/submodule/coreboot/default/fsp/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/fsp.git"
+subrepo_bkup="https://github.com/coreboot/fsp"
+subhash="800c85770b458ee7f7eeb1276b46e904590d3bd7"
diff --git a/config/submodule/coreboot/default/module.list b/config/submodule/coreboot/default/module.list
index 6f17b546..599df254 100644
--- a/config/submodule/coreboot/default/module.list
+++ b/config/submodule/coreboot/default/module.list
@@ -1,4 +1,5 @@
 3rdparty/arm-trusted-firmware
+3rdparty/fsp
 3rdparty/intel-microcode
 3rdparty/libgfxinit
 3rdparty/libhwbase
diff --git a/include/vendor.sh b/include/vendor.sh
index c5b6560d..36fa93d8 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -23,7 +23,7 @@ eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     E6400_VGA_romname SCH5545EC_DL_url_bkup SCH5545EC_DL_hash _dest tree \
     mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl SCH5545EC_DL_url \
     archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref vrelease \
-    verify _7ztest ME_bootguard $cv`
+    verify _7ztest ME_bootguard IFD_platform ifdprefix $cv`
 
 vendor_download()
 {
@@ -160,7 +160,7 @@ extract_deguard_me()
 		git -C "$1/disreguard" commit -m "tmp" || \
 		    $err "!commit $1/disreguard"
 	fi
-	git -C "$1/disreguard" am config/data/deguard/appdir.patch || \
+	git -C "$1/disreguard" am "$PWD/config/data/deguard/appdir.patch" || \
 	    $err "Cannot temporarily patch deguard clone in $1/disreguard"
 	(
 	cd "$1/disreguard" || $err "Cannot cd to '$1/disreguard'"
@@ -296,6 +296,7 @@ readcfg()
 	kbc1126_ec_dump="$PWD/$cbdir/util/kbc1126/kbc1126_ec_dump"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 	ifdtool="elf/ifdtool/$tree/ifdtool"
+	[ -n "$IFD_platform" ] && ifdprefix="-p $IFD_platform"
 
 	x_ ./mk -d coreboot $tree
 }
@@ -365,10 +366,11 @@ inject()
 	e "$_dest" f n && [ "$nukemode" != "nuke" ] && $err "!inject $dl_type"
 
 	if [ "$cbfsname" = "IFD" ]; then
-		[ "$nukemode" = "nuke" ] || "$ifdtool" -i $_t:$_dest "$rom" \
-		    -O "$rom" || $err "failed: inject '$_t' '$_dest' on '$rom'"
-		[ "$nukemode" != "nuke" ] || "$ifdtool" --nuke $_t "$rom" \
-		    -O "$rom" || $err "$rom: can't nuke $_t in IFD"; return 0
+		[ "$nukemode" = "nuke" ] || "$ifdtool" $ifdprefix -i \
+		    $_t:$_dest "$rom" -O "$rom" || \
+		    $err "failed: inject '$_t' '$_dest' on '$rom'"
+		[ "$nukemode" != "nuke" ] || "$ifdtool" $ifdprefix --nuke $_t \
+		    "$rom" -O "$rom" || $err "$rom: !nuke IFD/$_t"; return 0
 	elif [ "$nukemode" = "nuke" ]; then
 		"$cbfstool" "$rom" remove -n "$cbfsname" || \
 		    $err "inject $rom: can't remove $cbfsname"; return 0
@@ -388,5 +390,5 @@ modify_gbe()
 
 	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "$TMPDIR/gbe"
 	x_ "util/nvmutil/nvm" "$TMPDIR/gbe" setmac $new_mac
-	x_ "$ifdtool" -i GbE:"$TMPDIR/gbe" "$1" -O "$1"
+	x_ "$ifdtool" $ifdprefix -i GbE:"$TMPDIR/gbe" "$1" -O "$1"
 }

From 44473d6832dd827d9301ba50bbeb35a43a1c474c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 5 Oct 2024 03:52:50 +0100
Subject: [PATCH 0829/1549] git.sh: fix error with cache re-download

in some cases, on a fresh clone, the cached repo already
exists but lbmk tries to download it again. work around
this by checking that the directory exists; it's in the
main if statement, so that the "else" still applies. as
a result, the fallback to a live repo would un-fall back
to doing git-pull if the cached directory exists exists.

if it doesn't seem to make sense, it's because it doesn't.
this whole function needs to be rewritten better.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 0c2f7acc..2c43cd22 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -103,9 +103,9 @@ tmpclone()
 	repodir="$XBMK_CACHE/repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"
 	mkdir -p "$XBMK_CACHE/repo" || $err "!rmdir $XBMK_CACHE/repo"
 
-	if [ "$livepull" = "y" ]; then
+	if [ "$livepull" = "y" ] && [ ! -d "$repodir" ]; then
 		git clone $1 "$repodir" || git clone $2 "$repodir" || \
-		    $err "!clone $1 $2 $repodir $4 $5"
+		    $err "!clone $1 $2 $repodir $4 $5" #
 	elif [ -d "$repodir" ] && [ $# -lt 6 ]; then
 		git -C "$repodir" pull || sleep 3 || git -C "$repodir" pull \
 		    || sleep 3 || git -C "$repodir" pull || :

From 809e1d97aba576453b2701a27b4f54d3efca4bee Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 5 Oct 2024 03:56:03 +0100
Subject: [PATCH 0830/1549] fix 3050 config (./mk -u coreboot)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../dell3050micro_fsp_16mb/config/libgfxinit_corebootfb        | 3 ++-
 .../coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode  | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
index d46a9361..01e0f0c0 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
@@ -141,8 +141,9 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
 CONFIG_USE_PM_ACPI_TIMER=y
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_3050=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
index 510deac5..37592ef5 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
@@ -139,8 +139,9 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
 CONFIG_USE_PM_ACPI_TIMER=y
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_3050=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set

From d2939231ac800197861a4ccd4cddeb32ebbe7e4e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 5 Oct 2024 03:59:14 +0100
Subject: [PATCH 0831/1549] 3050micro: disable TPM to mitagate seabios hanging

SeaBIOS hangs without this. Thanks go to Mate Kukri who
suggested this workaround.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../dell3050micro_fsp_16mb/config/libgfxinit_corebootfb  | 9 ++-------
 .../dell3050micro_fsp_16mb/config/libgfxinit_txtmode     | 9 ++-------
 2 files changed, 4 insertions(+), 14 deletions(-)

diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
index 01e0f0c0..f52c07a7 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
@@ -199,7 +199,6 @@ CONFIG_EC_GPE_SCI=0x50
 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
 CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
 CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
-# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -555,8 +554,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 # CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
@@ -627,11 +624,10 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
+CONFIG_NO_TPM=y
 # CONFIG_TPM1 is not set
-CONFIG_TPM2=y
-CONFIG_TPM=y
+# CONFIG_TPM2 is not set
 CONFIG_MAINBOARD_HAS_TPM2=y
-# CONFIG_DEBUG_TPM is not set
 # CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
@@ -647,7 +643,6 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
 # end of Memory initialization
 
-# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
index 37592ef5..2b930c9c 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
@@ -197,7 +197,6 @@ CONFIG_EC_GPE_SCI=0x50
 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
 CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
 CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
-# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -551,8 +550,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 # CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
@@ -624,11 +621,10 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
+CONFIG_NO_TPM=y
 # CONFIG_TPM1 is not set
-CONFIG_TPM2=y
-CONFIG_TPM=y
+# CONFIG_TPM2 is not set
 CONFIG_MAINBOARD_HAS_TPM2=y
-# CONFIG_DEBUG_TPM is not set
 # CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
@@ -644,7 +640,6 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
 # end of Memory initialization
 
-# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y

From ed8178e83b8fe294094fbf797d0872125ea69c10 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 5 Oct 2024 19:04:57 +0100
Subject: [PATCH 0832/1549] disable dram clear on dell 3050 micro

otherwise it takes ages to boot

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../dell3050micro_fsp_16mb/config/libgfxinit_corebootfb         | 2 +-
 .../coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
index f52c07a7..8078148b 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
@@ -640,7 +640,7 @@ CONFIG_PCR_RUNTIME_DATA=3
 # Memory initialization
 #
 CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
 # end of Memory initialization
 
 # CONFIG_STM is not set
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
index 2b930c9c..c35fc7f8 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
@@ -637,7 +637,7 @@ CONFIG_PCR_RUNTIME_DATA=3
 # Memory initialization
 #
 CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
 # end of Memory initialization
 
 # CONFIG_STM is not set

From c99dced5b1022fd2053fa8e47785ce83f4e05f90 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 6 Oct 2024 09:21:08 +0100
Subject: [PATCH 0833/1549] dell3050micro: make GRUB the primary payload

SeaBIOS is known to hang on this board. It is being investigated.

Add two variable options for target.cfg files:

* seabiosname
* grubname

This string defines where it would be located in CBFS.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/dell3050micro_fsp_16mb/target.cfg | 2 ++
 include/rom.sh                                    | 6 ++++--
 script/trees                                      | 5 +++--
 3 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/config/coreboot/dell3050micro_fsp_16mb/target.cfg b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
index 79dc358f..03ad3ecb 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/target.cfg
+++ b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
@@ -8,3 +8,5 @@ grubtree="xhci"
 vcfg="3050micro"
 build_depend="seabios/default grub/xhci memtest86plus"
 IFD_platform="sklkbl"
+grubname="fallback/payload" # make GRUB the primary payload on this board
+seabiosname="seabios.elf" # seabios is known to hang on this board
diff --git a/include/rom.sh b/include/rom.sh
index cfd00a86..d4071169 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -118,9 +118,10 @@ mkcorebootbin()
 
 add_seabios()
 {
+	[ -n "$seabiosname" ] || seabiosname="fallback/payload"
 	_seabioself="elf/seabios/default/$initmode/bios.bin.elf"
 
-	cbfs "$tmprom" "$_seabioself" "fallback/payload"
+	cbfs "$tmprom" "$_seabioself" "$seabiosname"
 	x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
 
 	_z="2"; [ "$initmode" = "vgarom" ] && _z="0"
@@ -139,7 +140,8 @@ add_seabios()
 
 add_grub()
 {
-	cbfs "$tmprom" "$grubelf" "img/grub2"
+	[ -n "$grubname" ] || grubname="img/grub2"
+	cbfs "$tmprom" "$grubelf" "$grubname"
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
 	    > "$TMPDIR/tmpcfg" || $err "$target: !insert scandisk"
 	cbfs "$tmprom" "$TMPDIR/tmpcfg" scan.cfg raw
diff --git a/script/trees b/script/trees
index 5be43dcc..e219d649 100755
--- a/script/trees
+++ b/script/trees
@@ -12,7 +12,8 @@ set -u -e
 eval `setvars "" xarch srcdir premake cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
-    defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs`; badhash="n"
+    defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs seabiosname \
+    grubname`; badhash="n"
 
 main()
 {
@@ -112,7 +113,7 @@ configure_project()
 {
 	eval `setvars "" xarch xlang build_depend autoconfargs xtree postmake \
 	    tree_depend makeargs btype mkhelper bootstrapargs premake release \
-	    cleanargs`
+	    cleanargs grubname seabiosname`
 	_tcfg="$1/target.cfg"; badhash="n"; [ -f "$_tcfg" ] || btype="auto"
 	[ -f "$datadir/mkhelper.cfg" ] && eval `setcfg "$datadir/mkhelper.cfg"`
 

From f4de640e451ce3bb7b0bb19705ba3847471079d0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 6 Oct 2024 10:31:36 +0100
Subject: [PATCH 0834/1549] rom.sh: disable seabios-as-primary if grub is main

on 3050micro, we disable seabios as a primary payload,
making grub a pribary payload instead.

the way it worked, the roms were still named seagrub
and the seabios rom would be compiled, but with the wrong
path, so seabios wouldn't be executed; seabios would hang
anyway, on this board.

instead, engineer it in such a way as to disable seabios_
images on this board. also, rename seagrub_ to grub_.

i normally only permit seagrub, and not grub, but i make an
exception for 3050micro because we know grub works, but seabios
currently hangs on this board (which means no bsd).

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/dell3050micro_fsp_16mb/target.cfg | 2 +-
 include/rom.sh                                    | 4 +++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/config/coreboot/dell3050micro_fsp_16mb/target.cfg b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
index 03ad3ecb..12448aa7 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/target.cfg
+++ b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
@@ -9,4 +9,4 @@ vcfg="3050micro"
 build_depend="seabios/default grub/xhci memtest86plus"
 IFD_platform="sklkbl"
 grubname="fallback/payload" # make GRUB the primary payload on this board
-seabiosname="seabios.elf" # seabios is known to hang on this board
+seabiosname="seabios.elf" # this actually disables the seabios payload
diff --git a/include/rom.sh b/include/rom.sh
index d4071169..e7745271 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -135,7 +135,8 @@ add_seabios()
 
 	[ "$payload_grub" = "y" ] && add_grub
 
-	cprom && [ "$payload_grub" = "y" ] && pname="seagrub" && mkseagrub; :
+	[ "$seabiosname" = "fallback/payload" ] && cprom
+	[ "$payload_grub" = "y" ] && pname="seagrub" && mkseagrub; :
 }
 
 add_grub()
@@ -149,6 +150,7 @@ add_grub()
 
 mkseagrub()
 {
+	[ "$grubname" = "fallback/payload" ] && pname="grub"
 	cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
 	for keymap in config/data/grub/keymap/*.gkb; do
 		[ -f "$keymap" ] && cprom "${keymap##*/}"; :

From 217aa1735a55225f90b440ad95354c76697f875c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 6 Oct 2024 22:37:19 +0100
Subject: [PATCH 0835/1549] Add verb patch for Dell OptiPlex 3050 Micro

Thanks go to Nicholas Chin for helping me with this.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...64-dell-optiplex_3050-add-hda_verb.c.patch | 139 ++++++++++++++++++
 1 file changed, 139 insertions(+)
 create mode 100644 config/coreboot/default/patches/0064-dell-optiplex_3050-add-hda_verb.c.patch

diff --git a/config/coreboot/default/patches/0064-dell-optiplex_3050-add-hda_verb.c.patch b/config/coreboot/default/patches/0064-dell-optiplex_3050-add-hda_verb.c.patch
new file mode 100644
index 00000000..d1427e22
--- /dev/null
+++ b/config/coreboot/default/patches/0064-dell-optiplex_3050-add-hda_verb.c.patch
@@ -0,0 +1,139 @@
+From 6731fef7759f4c67a6d0e85d16de9d99302c9b49 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sun, 6 Oct 2024 17:25:27 +0100
+Subject: [PATCH 1/1] dell/optiplex_3050: add hda_verb.c
+
+Configured for the line jack at the front of the machine.
+
+Based on dumps from the vendor BIOS.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/dell/optiplex_3050/Kconfig     |  1 +
+ src/mainboard/dell/optiplex_3050/Makefile.mk |  2 +
+ src/mainboard/dell/optiplex_3050/hda_verb.c  | 90 ++++++++++++++++++++
+ 3 files changed, 93 insertions(+)
+ create mode 100644 src/mainboard/dell/optiplex_3050/hda_verb.c
+
+diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
+index 763acda0b2..777e29745a 100644
+--- a/src/mainboard/dell/optiplex_3050/Kconfig
++++ b/src/mainboard/dell/optiplex_3050/Kconfig
+@@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select SKYLAKE_SOC_PCH_H
+ 	select SOC_INTEL_KABYLAKE
+ 	select SUPERIO_SMSC_SCH555x
++	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
+ 
+ config CBFS_SIZE
+ 	default 0x900000
+diff --git a/src/mainboard/dell/optiplex_3050/Makefile.mk b/src/mainboard/dell/optiplex_3050/Makefile.mk
+index c078124332..1e2626967a 100644
+--- a/src/mainboard/dell/optiplex_3050/Makefile.mk
++++ b/src/mainboard/dell/optiplex_3050/Makefile.mk
+@@ -6,4 +6,6 @@ bootblock-y += sch5555_ec.c
+ romstage-y += romstage.c
+ 
+ ramstage-y += ramstage.c
++ramstage-y += hda_verb.c
++
+ ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/dell/optiplex_3050/hda_verb.c b/src/mainboard/dell/optiplex_3050/hda_verb.c
+new file mode 100644
+index 0000000000..621e4f7a52
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/hda_verb.c
+@@ -0,0 +1,90 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	/* coreboot specific header, codec 0 */
++	0x10ec0255, /* Realtek ALC3234 */
++	0x102807a3, /* Subsystem ID */
++	11,	    /* Number of entries */
++
++	/* Pin Widget Verb Table */
++
++	AZALIA_SUBVENDOR(0, 0x102807a3),
++
++	AZALIA_PIN_CFG(0, 0x12, 0x40000000), // does not describe a jack or internal device
++	AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_DESC(
++		AZALIA_INTEGRATED,
++		AZALIA_INTERNAL,
++		AZALIA_SPEAKER,
++		AZALIA_OTHER_ANALOG,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_NO_JACK_PRESENCE_DETECT,
++		5, 0
++	)),
++	AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_FRONT,
++		AZALIA_LINE_OUT,
++		AZALIA_STEREO_MONO_1_8,
++		AZALIA_BLACK,
++		AZALIA_JACK_PRESENCE_DETECT,
++		2, 0
++	)),
++	AZALIA_PIN_CFG(0, 0x1d, 0x4054c029), // does not describe a jack or internal device
++	AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_FRONT,
++		AZALIA_HP_OUT,
++		AZALIA_STEREO_MONO_1_8,
++		AZALIA_BLACK,
++		AZALIA_JACK_PRESENCE_DETECT,
++		5, 15
++	)),
++
++	/* coreboot specific header, codec 2 */
++	0x80862809, /* Intel Skylake HDMI */
++	0x80860101, /* Subsystem ID */
++	4,	    /* Number of entries */
++
++	/* Pin Widget Verb Table */
++
++	AZALIA_SUBVENDOR(2, 0x80860101),
++
++	AZALIA_PIN_CFG(2, 0x05, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_DIGITAL_DISPLAY,
++		AZALIA_DIGITAL_OTHER_OUT,
++		AZALIA_OTHER_DIGITAL,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_JACK_PRESENCE_DETECT,
++		1, 0
++	)),
++	AZALIA_PIN_CFG(2, 0x06, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_DIGITAL_DISPLAY,
++		AZALIA_DIGITAL_OTHER_OUT,
++		AZALIA_OTHER_DIGITAL,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_JACK_PRESENCE_DETECT,
++		1, 0
++	)),
++	AZALIA_PIN_CFG(2, 0x07, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_DIGITAL_DISPLAY,
++		AZALIA_DIGITAL_OTHER_OUT,
++		AZALIA_OTHER_DIGITAL,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_JACK_PRESENCE_DETECT,
++		1, 0
++	)),
++};
++
++const u32 pc_beep_verbs[] = {};
++
++AZALIA_ARRAY_SIZES;
+-- 
+2.39.5
+

From 09a8f2ea83e5f5e2eda448b8e57cf59108e68f62 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 6 Oct 2024 23:48:49 +0100
Subject: [PATCH 0836/1549] coreboot/dell3050micro: Add data.vbt file

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...0065-dell-optiplex_3050-Add-data.vbt.patch | 74 +++++++++++++++++++
 .../config/libgfxinit_corebootfb              |  9 ++-
 .../config/libgfxinit_txtmode                 |  9 ++-
 3 files changed, 90 insertions(+), 2 deletions(-)
 create mode 100644 config/coreboot/default/patches/0065-dell-optiplex_3050-Add-data.vbt.patch

diff --git a/config/coreboot/default/patches/0065-dell-optiplex_3050-Add-data.vbt.patch b/config/coreboot/default/patches/0065-dell-optiplex_3050-Add-data.vbt.patch
new file mode 100644
index 00000000..5cf44884
--- /dev/null
+++ b/config/coreboot/default/patches/0065-dell-optiplex_3050-Add-data.vbt.patch
@@ -0,0 +1,74 @@
+From bfce6c7e9464daa2756e34678d27e38946162132 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sun, 6 Oct 2024 23:48:05 +0100
+Subject: [PATCH 1/1] dell/optiplex_3050: Add data.vbt
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/dell/optiplex_3050/Kconfig  |   5 +++++
+ src/mainboard/dell/optiplex_3050/data.vbt | Bin 0 -> 4300 bytes
+ 2 files changed, 5 insertions(+)
+ create mode 100644 src/mainboard/dell/optiplex_3050/data.vbt
+
+diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
+index 777e29745a..c978626d55 100644
+--- a/src/mainboard/dell/optiplex_3050/Kconfig
++++ b/src/mainboard/dell/optiplex_3050/Kconfig
+@@ -19,6 +19,8 @@ config BOARD_SPECIFIC_OPTIONS
+ 	select SOC_INTEL_KABYLAKE
+ 	select SUPERIO_SMSC_SCH555x
+ 	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
++	select INTEL_GMA_HAVE_VBT
++	select INTEL_GMA_ADD_VBT
+ 
+ config CBFS_SIZE
+ 	default 0x900000
+@@ -29,6 +31,9 @@ config MAINBOARD_DIR
+ config MAINBOARD_PART_NUMBER
+ 	default "OptiPlex 3050 Micro"
+ 
++config INTEL_GMA_VBT_FILE
++	default "src/mainboard/\$(MAINBOARDDIR)/data.vbt"
++
+ config DIMM_SPD_SIZE
+ 	default 512	# DDR4
+ 
+diff --git a/src/mainboard/dell/optiplex_3050/data.vbt b/src/mainboard/dell/optiplex_3050/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..6dc40cd99563bcd957ec2a9c4567e3b21e5d1d1f
+GIT binary patch
+literal 4300
+zcmeHJZ)_A*5TD(>zi)T1ds~!pU>y<RuF$e~N-bJsuXmJ|7P*63&uGGx+#w{DmbQ?B
+ze^_HpNECA))Sw}xiC;|p(!}^ljU+}T!9QpeKH4uPN;EMM;}_tZeY@?IBiNH@l!V#L
+zn>X`jfBW9Nd2eS$e@7qg=y|L+*|P~<Du4l>Ybk24rH<}xJ9eg%eaW32z1vbf_%+-P
+zC$uXU01ASzM2Q>g;@$hkii6SZG3@E+#eVw*w9N;N1g6_?YiB3s;_)?@>DbVf-r9}P
+zO`Vx|jP%robSBQ#gsrAYO>p&IQpqWSxVK|yXmkvV`v!Im77N$TZXru*X!y{`-Y55r
+zVKf!Pgkc!X2_qgyK4nY|jSRP7a&Qp0+diYXy*OGNIan;Ts7z%5ry$@FKoGo8XMq5h
+z6OcC{V?x>l17U>+7I|RUgn|iuCftWGW>(Kf196=odH`0=A3;(GULp|y6Ks_T0R#_x
+zlLt);9A0GWnQsLE?*|8{0RgE`gv2JC<6bXwubJ}!0Qv+3{3xJE9q#3H2<s&G0tf>5
+z>@mL~p#5nF3*pl}^hKC<v1C31Ae!^M&^2;#l`=O_ZLQWF$7*Y}Uh$G>xt9(*`c-X6
+zFkpAE5jIOv7?VVJPHKbYp3@KrBCHN-@DOp9_>7mqcf{Wl|3v&7@nvGak3pDtDe*nT
+zYl+trr--)_KT146>^lIL%Ay5+{&h=mW!RCRdEk{8SSMWj3D+L{)!qr(URTPl<i;AB
+za@p^PE9Ea6pj-}YuxDTr0>wf|yGUKG?B!CDGOpf7(oT__tC!2cJgEtK{*6}R$n1=r
+z$PSguH+xU1hb?rHq(J+G2P}V^ryazPkEs%j0}In3b4gctpl8)ZC&3qS6o31yv0DC@
+zBN6*5So*Vg*3aOq|DtfT{{PvtW2P<e%*HkB(yV?<-ipBd2rTP@b3v<wGk0i#{Bmcc
+z@y0B7K0!Gt2Iyi?fd2i^HUB$v{Q!tv^fz~$94j}a>75FZ$;1Eo6%!)V*$4D5C>nt}
+z7_D}&ricJyuY&X-!vUs`GWIOPx0wDOV;?d6f$4uRCdjx-*4N7{CF5RMe_CcQ%J`0~
+ze<-uhWc)?e%Q6cpxK`1V3hPmDzoNgOuwx3otLUF7>?;L-S9HJ1!Ybac>fI{aq2eJ`
+ze@SJpsrbICf1$GTDqdFgx)56u!i^z48)A=#)F$0)i8F!~4)H=KFrv`ilM@v#FA5q-
+zZ`~^T%U!!Etw*TnvRA91loJ<5n5;vH=aymAq8i4g#?~Vu@R%z0b-pk{VF{Q?SZOpI
+zZFLYDT8~J)KBGPNg2zT^r<&>dt1z12coq!P7_N5^Xb$wE-B-rFk(v<3F&oiLZ61P9
+z^8O8kx7Uu(WFsrh-0{jBgc7g$6w^0d!yLLcn#Qi_glV3tAo!dLNa^?163N|n^-pD?
+z(daC>dtpbi#Q&W%m0IHPOiO7pA89lVboYWH=_yh1N|ChuwX7oAZcPqP-%SWj_FFt3
+zyd_?zD3jia8uH=I*yP#l#Bw9^#^N~y33zEtk*o#5XfjXdCkjSG)~N^WoRlb;h;B3|
+zIfCjSc(I06T!_GA1{WKOk*chsMCXx5vW@41o#fZgYViT9VSih*nQN}>g+zCejX>9!
+zZ{c$hGa+w5eO}YT_FH@}B)U(Dl-|zF&dk8R;^4yrPZe)YrI^k%j}0~VZ%*1PT98&h
+z556thD#%T3IZc)NKi{(4RJn@8Dq3?JywFKA?WW585y(IR)(Ee|k5bDtz|lFnDY}0G
+Ds8qe3
+
+literal 0
+HcmV?d00001
+
+-- 
+2.39.5
+
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
index 8078148b..1cc8edf7 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
@@ -132,6 +132,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 # CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
@@ -344,6 +345,7 @@ CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
 # CONFIG_SOC_INTEL_DISABLE_IGD is not set
 CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
@@ -535,7 +537,8 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
@@ -588,6 +591,10 @@ CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
 CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
 # CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Skylake"
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
index c35fc7f8..c34727d8 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
@@ -130,6 +130,7 @@ CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 # CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
@@ -342,6 +343,7 @@ CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
 # CONFIG_SOC_INTEL_DISABLE_IGD is not set
 CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
@@ -531,7 +533,8 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
@@ -584,6 +587,10 @@ CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
 CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
 # CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Skylake"

From d845791d6f194e0b36bce2f0aeddcb5addc926f4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 8 Oct 2024 13:18:20 +0100
Subject: [PATCH 0837/1549] rom.sh: support making pcsx-redux bios release

I also checked the copyright declarations in the
directory src/mips/openbios where the PCSX-Redux BIOS
is, gleaning all the copyright years: 2019-2024 at this
time.

The years will be updated as and when PCSX-Redux is
updated in lbmk. Their BIOS is under MIT so I made lbmk
generate an appropriate COPYING file alongside the binary,
containing:

Copyright (c) 2019-2024 PCSX-Redux authors

Along with the actual text of the MIT license. With all
of this, the PCSX-Redux BIOS can now be included in
Libreboot releases.

No actual tarball is created. The release script in lbmk
simply copies the bin/ directory to ../roms

I'm leaving the PCSX-Redux BIOS release uncompressed,
because, and this will sound patronising because that is
my precise intention: Windows users don't know how to do
anything. If I provide a tarball to Windows users, they
won't know what to do. Libreboot releases always go on rsync
mirrors, which also have HTTP servers with indexing enabled,
for browsing release files.

I mention Windows users, because most people who use the PCSX
Redux BIOS will probably use it on a PlayStation emulator, and
most emulator users are on Windows. I can't really be bothered
to provide it as a .zip archive, and it's only 512kb, so just
provide it uncompressed in Libreboot releases!

Releases were already possible under this scheme, so this
patch really just adds the COPYING file. It's simply a courtesy
to the PCSX-Redux developers, providing proper credit to them.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/snippet/mit | 17 +++++++++++++++++
 include/rom.sh     |  9 +++++++++
 2 files changed, 26 insertions(+)
 create mode 100644 config/snippet/mit

diff --git a/config/snippet/mit b/config/snippet/mit
new file mode 100644
index 00000000..969d061e
--- /dev/null
+++ b/config/snippet/mit
@@ -0,0 +1,17 @@
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
diff --git a/include/rom.sh b/include/rom.sh
index e7745271..808959d8 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -29,6 +29,15 @@ copyps1bios()
 	x_ rm -Rf bin/playstation
 	x_ mkdir -p bin/playstation
 	x_ cp src/pcsx-redux/src/mips/openbios/openbios.bin bin/playstation
+
+	printf "MIT License\n\nCopyright (c) 2019-2024 PCSX-Redux authors\n\n" \
+	    > bin/playstation/COPYING.txt || $err "!pcsx-redux copyright"
+	cat config/snippet/mit >>bin/playstation/COPYING.txt || $err "!pcsx MIT"
+
+	if [ -e "src/pcsx-redux/.git" ]; then
+		git -C src/pcsx-redux/src/mips/openbios shortlog -sne > \
+		    bin/playstation/AUTHORS.txt || $err "!pcsx-redux authors"
+	fi
 }
 
 mkpayload_grub()

From 6b40616a40c31c67d1b471cad2fb283b546b4a8f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 8 Oct 2024 16:16:30 +0100
Subject: [PATCH 0838/1549] build: actually build pcsx-redux bios on release

I added support earlier, on rom.sh, but the main build script
specifically defines which projects are to be compiled. I've
modified it so that pcsx-redux (just the BIOS part) will also
be compiled.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/build b/build
index ce744339..985bbe9e 100755
--- a/build
+++ b/build
@@ -108,7 +108,7 @@ build_release()
 	touch "$srcdir/lock" || $err "can't make lock file in $srcdir/"
 	(
 	cd "$srcdir" || $err "$vdir: 2 !cd \"$srcdir\""
-	mk -b coreboot pico-serprog stm32-vserprog
+	mk -b coreboot pico-serprog stm32-vserprog pcsx-redux
 	x_ mv bin ../roms
 	) || $err "can't build rom images"
 

From c1ff438c903ee47a5633326a9773f58aee13695a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 8 Oct 2024 19:50:44 +0100
Subject: [PATCH 0839/1549] Libreboot 20241008 release

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../patches/0002-say-the-name-libreboot-in-the-grub-menu.patch  | 2 +-
 .../patches/0002-say-the-name-libreboot-in-the-grub-menu.patch  | 2 +-
 .../patches/0002-say-the-name-libreboot-in-the-grub-menu.patch  | 2 +-
 config/submodule/docs/html/module.cfg                           | 2 +-
 config/submodule/docs/img/module.cfg                            | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index f2afa38b..99082320 100644
--- a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..300f55fe1 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20240612 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20241008 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 01a94447..d6bd2464 100644
--- a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..300f55fe1 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20240612 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20241008 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 1b53b5ae..bf2b5940 100644
--- a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..300f55fe1 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20240612 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20241008 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/submodule/docs/html/module.cfg b/config/submodule/docs/html/module.cfg
index b0539862..1b13b25d 100644
--- a/config/submodule/docs/html/module.cfg
+++ b/config/submodule/docs/html/module.cfg
@@ -1,3 +1,3 @@
-subhash="88ca46ad4ce0b79682ea88d97f8dbf801e846031"
+subhash="cef9c80c01dbcbe62b0cd63e5ebf03133f16ac1b"
 subrepo="https://codeberg.org/libreboot/lbwww"
 subrepo_bkup="https://git.disroot.org/libreboot/lbwww"
diff --git a/config/submodule/docs/img/module.cfg b/config/submodule/docs/img/module.cfg
index 07c4ab89..87c99fc1 100644
--- a/config/submodule/docs/img/module.cfg
+++ b/config/submodule/docs/img/module.cfg
@@ -1,3 +1,3 @@
-subhash="625bb7535d388a235bec47a8ce822cda10b53692"
+subhash="bd92e319bde851d567240452bb89299050a24f3f"
 subrepo="https://codeberg.org/libreboot/lbwww-img"
 subrepo_bkup="https://git.disroot.org/libreboot/lbwww-img"

From 147e034341674eada403b40a5c89906ab16c60b5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 13 Oct 2024 06:31:36 +0100
Subject: [PATCH 0840/1549] dependencies/fedora40: add python3-devel

I was build-testing gru_bob on an arm64 host, and got a
build error when compiling U-Boot.

Python.h missing - installing python3-devel fixes it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/fedora40 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/dependencies/fedora40 b/config/dependencies/fedora40
index f73595b8..6836b57b 100755
--- a/config/dependencies/fedora40
+++ b/config/dependencies/fedora40
@@ -9,5 +9,5 @@ libselinux-devel libusb1 libusb1-devel nasm ncurses-devel openssl-devel \
 p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \
 python-unversioned-command python3 python3-setuptools rsync sharutils \
 subversion systemd-devel texinfo unar unifont unifont-fonts \
-unifont-ttf-fonts unzip wget xz zlib-devel ccache swig \
+unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel \
 "

From 3b92b7b7236268c1a345bfd38e4a21e75b0c0864 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 14 Oct 2024 01:15:44 +0100
Subject: [PATCH 0841/1549] vendor.sh: Handle error status on RUNME.sh

The deguard utility is executed within a subshell, and
the subshell does not handle error status. This patch
fixes that, so that the main shell also exits non-zero.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 36fa93d8..03ce9801 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -165,7 +165,7 @@ extract_deguard_me()
 	(
 	cd "$1/disreguard" || $err "Cannot cd to '$1/disreguard'"
 	x_ ./RUNME.sh
-	)
+	) || $err "$1/disreguard: RUNME.sh returned error status"
 	"$mecleaner" --whitelist MFS --truncate "$1/disreguard/me.bin" || \
 	    $err "extract_intel_me: Can't truncate disreguarded ME"
 	cp "$cdir/disreguard/me.bin" "$2" || \

From c7a3a607f3d9b5639e8529d447acae5c74896b39 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 14 Oct 2024 16:24:21 +0100
Subject: [PATCH 0842/1549] bump flashprog revision to d128a0a

This brings in the following important fix:

commit d128a0ae87086b37c0e5d7a8d934bcdee173402f
Author: Nicholas Chin <nic.c3.14@gmail.com>
Date:   Fri Sep 27 22:57:22 2024 -0600

    flashchips: Remove unsupported erase blocks for Winbond W25X{16,32,64}

    This family of chips does not support the 0x52 (32 KiB block erase) and
    0x60 (chip erase) opcodes according to their datasheet.

The full list of changes this brings in is as follows:

* d128a0a flashchips: Remove unsupported erase blocks for Winbond W25X{16,32,64}
* c6a924a Don't mention writing when erasing only (-E)
* dac4239 ch347_spi: Add 'spimode' parameter
* 56d236b chipset_enable: Add some newer AMD code names
* 3b9f152 chipset_enable: Probe AMD SPIBAR first and bail on ff
* 522160f meson: Add ft4222_spi

Nicholas Chin's patch fixes a bug on GM45 ThinkPads, where WX25
ICs (Winbond) could be read, but writes would fail in certain
cases because flashchips.c provided incorrect block erase commands.

This is unrelated to the --workaround-mx patch, for Macronix ICs.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/flashprog/pkg.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/git/flashprog/pkg.cfg b/config/git/flashprog/pkg.cfg
index 6a94b319..ff45c7b6 100644
--- a/config/git/flashprog/pkg.cfg
+++ b/config/git/flashprog/pkg.cfg
@@ -1,3 +1,3 @@
-rev="639d563b3f0084ed053384c468663be342cba775"
+rev="d128a0ae87086b37c0e5d7a8d934bcdee173402f"
 url="https://review.sourcearcade.org/flashprog"
 bkup_url="https://github.com/SourceArcade/flashprog.git"

From 34f851742e15182c4b2ac9b6f638ff712c4e6afa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 16 Oct 2024 15:48:43 +0100
Subject: [PATCH 0843/1549] vendor.sh: Don't use x_ for image MAC address mod

The path might contain spaces and such, which breaks when
using the x_ prefix.

Call err instead.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 03ce9801..0f97a641 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -390,5 +390,6 @@ modify_gbe()
 
 	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "$TMPDIR/gbe"
 	x_ "util/nvmutil/nvm" "$TMPDIR/gbe" setmac $new_mac
-	x_ "$ifdtool" $ifdprefix -i GbE:"$TMPDIR/gbe" "$1" -O "$1"
+	"$ifdtool" $ifdprefix -i GbE:"$TMPDIR/gbe" "$1" -O "$1" || \
+	    $err "Cannot insert modified GbE region into target image."
 }

From 91a26ec36113544b4e56eca84faaa5004ffb0f63 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Oct 2024 23:22:44 +0100
Subject: [PATCH 0844/1549] bump seabios

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/seabios/default/target.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/seabios/default/target.cfg b/config/seabios/default/target.cfg
index afa4a729..6ab72947 100644
--- a/config/seabios/default/target.cfg
+++ b/config/seabios/default/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-rev="ec0bc256ae0ea08a32d3e854e329cfbc141f07ad"
+rev="2424e4c04aa30d90e85073ea41d18a7845460783"

From e8957b0833a5bdd44d5dbd00d587f90edd9c34c4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Oct 2024 23:28:18 +0100
Subject: [PATCH 0845/1549] import Riku's mxmdump utility

Used to dump MXM config for a given mainboard. We used this
for the HP EliteBook 8560w.

I meant to import this via config/git/ ages ago.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/mxmdump/pkg.cfg | 3 +++
 1 file changed, 3 insertions(+)
 create mode 100644 config/git/mxmdump/pkg.cfg

diff --git a/config/git/mxmdump/pkg.cfg b/config/git/mxmdump/pkg.cfg
new file mode 100644
index 00000000..98c98fcb
--- /dev/null
+++ b/config/git/mxmdump/pkg.cfg
@@ -0,0 +1,3 @@
+rev="ab3393c84fd3de01793bbfa2ec4caddfe0dc44f6"
+url="https://codeberg.org/Riku_V/mxmdump/"
+bkup_url="https://codeberg.org/Riku_V/mxmdump/"

From 441d21dc134da788536f27150e3093f0c97077a8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Oct 2024 23:30:51 +0100
Subject: [PATCH 0846/1549] import Riku's gpio-scripts

Based on hell's code, but parses inteltool logs.

This will be useful for ports that I have planned, so
I'd like this to be included with Libreboot releases.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/gpio-scripts/pkg.cfg | 3 +++
 1 file changed, 3 insertions(+)
 create mode 100644 config/git/gpio-scripts/pkg.cfg

diff --git a/config/git/gpio-scripts/pkg.cfg b/config/git/gpio-scripts/pkg.cfg
new file mode 100644
index 00000000..c076b196
--- /dev/null
+++ b/config/git/gpio-scripts/pkg.cfg
@@ -0,0 +1,3 @@
+rev="be2de1233a70e3cf05ad17b008fd85c862b1ecf9"
+url="https://codeberg.org/Riku_V/gpio-scripts"
+bkup_url="https://codeberg.org/Riku_V/gpio-scripts"

From 6eb2e98c0f0bfa8ee1901ba9b655bd3d6900fabb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Oct 2024 23:33:48 +0100
Subject: [PATCH 0847/1549] import Riku's int tool

Riku used this for debugging, when adding the MXM support
to the HP EliteBook 8560w port. It will be useful for other
work that I have planned, so I'm archiving this too!

Riku has a lot of useful code, that I meant to import ages ago.
Once I'm done importing these in lbmk, I'll add backup repos.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/int/pkg.cfg | 3 +++
 1 file changed, 3 insertions(+)
 create mode 100644 config/git/int/pkg.cfg

diff --git a/config/git/int/pkg.cfg b/config/git/int/pkg.cfg
new file mode 100644
index 00000000..921e1f11
--- /dev/null
+++ b/config/git/int/pkg.cfg
@@ -0,0 +1,3 @@
+rev="d1ac570549f00477d9ade21807f42f28a4864fcd"
+url="https://codeberg.org/Riku_V/int"
+bkup_url="https://codeberg.org/Riku_V/int"

From 38d37a340fb4c00107524fd8b971ea9cbb6ac2da Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Oct 2024 23:37:05 +0100
Subject: [PATCH 0848/1549] remove end slashes on repos in config/git/

Due to quirks in how caching works in lbmk, this may be
error-prone. I'll properly address it in the next audit.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/bios_extract/pkg.cfg | 2 +-
 config/git/mxmdump/pkg.cfg      | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/config/git/bios_extract/pkg.cfg b/config/git/bios_extract/pkg.cfg
index 4b203544..e77bf0a5 100644
--- a/config/git/bios_extract/pkg.cfg
+++ b/config/git/bios_extract/pkg.cfg
@@ -1,3 +1,3 @@
 rev="0a7bc1d71735ef97b00dfec0fd54a02fcc5d1bb0"
 url="https://review.coreboot.org/bios_extract"
-bkup_url="https://github.com/coreboot/bios_extract/"
+bkup_url="https://github.com/coreboot/bios_extract"
diff --git a/config/git/mxmdump/pkg.cfg b/config/git/mxmdump/pkg.cfg
index 98c98fcb..ad4fcfbd 100644
--- a/config/git/mxmdump/pkg.cfg
+++ b/config/git/mxmdump/pkg.cfg
@@ -1,3 +1,3 @@
 rev="ab3393c84fd3de01793bbfa2ec4caddfe0dc44f6"
-url="https://codeberg.org/Riku_V/mxmdump/"
-bkup_url="https://codeberg.org/Riku_V/mxmdump/"
+url="https://codeberg.org/Riku_V/mxmdump"
+bkup_url="https://codeberg.org/Riku_V/mxmdump"

From 56495c61e6c2bd96cd885e1e594045f99dbb2aae Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Oct 2024 23:48:32 +0100
Subject: [PATCH 0849/1549] use redundant mirrors for recent utils imports

i mirrored riku's utils int, mxmdump and gpio-scripts
to the codeberg and disroot libreboot sites.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/gpio-scripts/pkg.cfg | 4 ++--
 config/git/int/pkg.cfg          | 4 ++--
 config/git/mxmdump/pkg.cfg      | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/config/git/gpio-scripts/pkg.cfg b/config/git/gpio-scripts/pkg.cfg
index c076b196..60963e9d 100644
--- a/config/git/gpio-scripts/pkg.cfg
+++ b/config/git/gpio-scripts/pkg.cfg
@@ -1,3 +1,3 @@
 rev="be2de1233a70e3cf05ad17b008fd85c862b1ecf9"
-url="https://codeberg.org/Riku_V/gpio-scripts"
-bkup_url="https://codeberg.org/Riku_V/gpio-scripts"
+url="https://codeberg.org/libreboot/gpio-scripts"
+bkup_url="https://git.disroot.org/libreboot/gpio-scripts"
diff --git a/config/git/int/pkg.cfg b/config/git/int/pkg.cfg
index 921e1f11..d3c2958a 100644
--- a/config/git/int/pkg.cfg
+++ b/config/git/int/pkg.cfg
@@ -1,3 +1,3 @@
 rev="d1ac570549f00477d9ade21807f42f28a4864fcd"
-url="https://codeberg.org/Riku_V/int"
-bkup_url="https://codeberg.org/Riku_V/int"
+url="https://codeberg.org/libreboot/int"
+bkup_url="https://git.disroot.org/libreboot/int"
diff --git a/config/git/mxmdump/pkg.cfg b/config/git/mxmdump/pkg.cfg
index ad4fcfbd..19ede8d8 100644
--- a/config/git/mxmdump/pkg.cfg
+++ b/config/git/mxmdump/pkg.cfg
@@ -1,3 +1,3 @@
 rev="ab3393c84fd3de01793bbfa2ec4caddfe0dc44f6"
-url="https://codeberg.org/Riku_V/mxmdump"
-bkup_url="https://codeberg.org/Riku_V/mxmdump"
+url="https://codeberg.org/libreboot/mxmdump"
+bkup_url="https://git.disroot.org/libreboot/mxmdump"

From 3f63c6d12f6b9ad8e0d7846c313f5adfb46a942e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 20 Oct 2024 00:13:35 +0100
Subject: [PATCH 0850/1549] rom.sh: remove unnecessary logic from copyps1bios

the .git directory never exists anyway, when doing a release,
so the purpose this is intended is defeated by lbmk's design.

individual headers say "pcsx-redux team" as copyright anyway,
and the code for generating that COPYING file, with MIT license
and correct years (matching the entire source code for the
open bios) remains correct.

a mitigation instead of this patch might be to maintain a hardcoded
list of authors, and manually update it over time, but this is not
required. however, it may be good practise for upstream to maintain
such a file. perhaps i should contact them?

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index 808959d8..9d11e757 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -33,11 +33,6 @@ copyps1bios()
 	printf "MIT License\n\nCopyright (c) 2019-2024 PCSX-Redux authors\n\n" \
 	    > bin/playstation/COPYING.txt || $err "!pcsx-redux copyright"
 	cat config/snippet/mit >>bin/playstation/COPYING.txt || $err "!pcsx MIT"
-
-	if [ -e "src/pcsx-redux/.git" ]; then
-		git -C src/pcsx-redux/src/mips/openbios shortlog -sne > \
-		    bin/playstation/AUTHORS.txt || $err "!pcsx-redux authors"
-	fi
 }
 
 mkpayload_grub()

From 99a88ebfa20421909675e9de6ed9376049f433d4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Oct 2024 05:41:46 +0100
Subject: [PATCH 0851/1549] Update dell 3050 patch to patch 15 (pwm fix)

Use patchset 15 instead of 14:
config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch

Rebase the verb patch; patchset 15 modified the Makefile:
config/coreboot/default/patches/0064-dell-optiplex_3050-add-hda_verb.c.patch

We were using patchset 14 for the 3050 micro:
https://review.coreboot.org/c/coreboot/+/82053/14

Now we use patchset 15:
https://review.coreboot.org/c/coreboot/+/82053/15

Without this patch, the fans are always on a low setting, on
the Dell OptiPlex 3050 Micro, even under stress conditions. With
this patch, the fans change speed according to CPU temperature.

I had to rebase my verb patch, because Mate modified the Makefile
to add his sch5555 handler, on the same line where I add hda_verb.

Mate tells me he will merge my verb and vbt patches into a further
patchset later on. For now, I've simply rebased these patches on
top of Mate's newer work; I've told him he can use them in his port.

I'm probably going to now issue a new revision ROM image for
Libreboot 20241008, so that users can get this fix sooner.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...Set-default-VRAM-to-64MiB-instead-of.patch |   6 +-
 ...d-c3-and-clockgen-to-apple-macbook21.patch |   6 +-
 ...-Video-RAM-changed-to-default-previo.patch |   6 +-
 ...64MiB-VRAM-the-default-in-cmos.defau.patch |   6 +-
 ...0-set-VRAM-to-256MiB-VRAM-by-default.patch |   6 +-
 ...o-x200-set-VRAM-to-256MiB-by-default.patch |   6 +-
 ...m-es2l-set-VRAM-to-256MiB-by-default.patch |   6 +-
 ...3t-am3-set-VRAM-to-256MiB-by-default.patch |   6 +-
 ...09-lenovo-t400-Enable-all-SATA-ports.patch |   6 +-
 ...ovo-X230-patch-gfx_uma_size-224M-by-.patch |   6 +-
 ...et-me_state-Disabled-in-cmos.default.patch |   6 +-
 ...e-Disabled-on-all-cmos.default-files.patch |   6 +-
 ...ool-add-nuke-flag-all-0xFF-on-region.patch |   6 +-
 ...-x200-t400-Revert-cpu-intel-model_10.patch |   6 +-
 ...e-CPUs-don-t-enable-alternative-SMRR.patch |   6 +-
 ...able-01.0-device-in-devicetree-for-d.patch |   6 +-
 ...or-coreboot-images-built-without-a-p.patch |   6 +-
 ...b-dell-Add-Latitude-E6530-Ivy-Bridge.patch |   6 +-
 ...b-dell-Add-Latitude-E5530-Ivy-Bridge.patch |   6 +-
 ...dell-Add-Latitude-E6420-Sandy-Bridge.patch |   6 +-
 ...dell-Add-Latitude-E6520-Sandy-Bridge.patch |   6 +-
 ...dell-Add-Latitude-E5520-Sandy-Bridge.patch |   6 +-
 ...dell-Add-Latitude-E5420-Sandy-Bridge.patch |   6 +-
 ...dell-Add-Latitude-E6320-Sandy-Bridge.patch |   6 +-
 ...dell-Add-Latitude-E6220-Sandy-Bridge.patch |   6 +-
 ...b-dell-Add-Latitude-E6330-Ivy-Bridge.patch |   6 +-
 ...b-dell-Add-Latitude-E6230-Ivy-Bridge.patch |   6 +-
 ...sable-coreboot-related-BL31-features.patch |   6 +-
 ...0029-use-own-mirror-for-acpica-files.patch |   6 +-
 ...vram-allocation-on-more-intel-boards.patch |   6 +-
 ...-e6430-use-ME-Soft-Temporary-Disable.patch |   6 +-
 ...-mirrorservice.org-for-gcc-downloads.patch |   6 +-
 ...mb-hp-Add-Compaq-Elite-8300-CMT-port.patch |   6 +-
 ...-haswell-make-IOMMU-a-runtime-option.patch |   6 +-
 ...tiplex_9020-Disable-IOMMU-by-default.patch |   6 +-
 ...Fully-disable-iGPU-when-dGPU-is-used.patch |   6 +-
 ...l-mec5035-Add-S3-suspend-SMI-handler.patch |   6 +-
 ...S3-SMI-handler-for-SNB-IVB-Latitudes.patch |   6 +-
 ...ock-policy-regs-when-disabling-IOMMU.patch |   6 +-
 ...nb-intel-gm45-Make-DDR2-raminit-work.patch |   6 +-
 ...gel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch} |   6 +-
 ...e-100-MHz-reference-clock-for-displa.patch |   6 +-
 .../0043-haswell-NRI-Initialise-MPLL.patch    |   6 +-
 ...ll-NRI-Post-process-selected-timings.patch |   6 +-
 ...ll-NRI-Configure-initial-MC-settings.patch |   6 +-
 ...-NRI-Add-timings-refresh-programming.patch |   6 +-
 .../0047-haswell-NRI-Program-memory-map.patch |   6 +-
 ...ll-NRI-Add-DDR3-JEDEC-reset-and-init.patch |   6 +-
 ...9-haswell-NRI-Add-pre-training-steps.patch |   6 +-
 ...aswell-NRI-Add-REUT-I-O-test-library.patch |   6 +-
 ...swell-NRI-Add-range-tracking-library.patch |   6 +-
 ...ll-NRI-Add-library-to-change-margins.patch |   6 +-
 .../0053-haswell-NRI-Add-RcvEn-training.patch |   6 +-
 ...l-NRI-Add-function-to-change-margins.patch |   6 +-
 ...55-haswell-NRI-Add-read-MPR-training.patch |   6 +-
 .../0056-haswell-NRI-Add-write-leveling.patch |   6 +-
 ...-haswell-NRI-Add-final-raminit-steps.patch |   6 +-
 ...Haswell-NRI-Implement-fast-boot-path.patch |   6 +-
 ...I-Do-sense-amplifier-offset-training.patch |   6 +-
 ...b-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch |   6 +-
 .../0061-WIP-OptiPlex-3050-Micro-port.patch   | 559 ++++++++++++++++--
 ...mb-dell-Convert-E6400-into-a-variant.patch |   6 +-
 ...ell-gm45_latitudes-Add-E4300-variant.patch |   6 +-
 ...64-dell-optiplex_3050-add-hda_verb.c.patch |  21 +-
 ...0065-dell-optiplex_3050-Add-data.vbt.patch |  10 +-
 .../config/libgfxinit_corebootfb              |   7 -
 .../config/libgfxinit_txtmode                 |   7 -
 67 files changed, 726 insertions(+), 250 deletions(-)
 rename config/coreboot/default/patches/{0041-nb-intel-gm45-Make-DDR2-raminit-work.patch => 0041-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch} (98%)

diff --git a/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch b/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
index 8bbffb53..1876db23 100644
--- a/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
+++ b/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
@@ -1,7 +1,7 @@
-From 2d9f38a12b883e1ddcdae5de107f204e522146e2 Mon Sep 17 00:00:00 2001
+From e8eb37e87abfdf6d2bcf60cb15d35650fcfa6665 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@retroboot.org>
 Date: Fri, 19 Mar 2021 05:54:58 +0000
-Subject: [PATCH 01/39] apple/macbook21: Set default VRAM to 64MiB instead of
+Subject: [PATCH 01/65] apple/macbook21: Set default VRAM to 64MiB instead of
  8MiB
 
 ---
@@ -19,5 +19,5 @@ index b744b11cda..9749e26547 100644
 -gfx_uma_size=8M
 +gfx_uma_size=64M
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch b/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
index b163d5d2..b4ffe7fc 100644
--- a/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
+++ b/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
@@ -1,7 +1,7 @@
-From e60ec1c7304e3f167fd2bf762f28b7eacd0b169a Mon Sep 17 00:00:00 2001
+From 2533ed49003c470a8dbfbf17f6c6a5ef0672c2e2 Mon Sep 17 00:00:00 2001
 From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
 Date: Wed, 27 Oct 2021 13:36:01 +0200
-Subject: [PATCH 02/39] add c3 and clockgen to apple/macbook21
+Subject: [PATCH 02/65] add c3 and clockgen to apple/macbook21
 
 ---
  src/mainboard/apple/macbook21/Kconfig       |  1 +
@@ -64,5 +64,5 @@ index fd86e939b9..263fbabcd1 100644
  	end
  end
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch b/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
index 8bf9a049..db064a9d 100644
--- a/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
+++ b/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
@@ -1,7 +1,7 @@
-From 9a0157b1459365cf52f90e66b78dd6b60a259587 Mon Sep 17 00:00:00 2001
+From 14920409e51a9a0997d488b166d90bfad56f61f1 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@osboot.org>
 Date: Sun, 3 Jan 2021 03:34:01 +0000
-Subject: [PATCH 03/39] lenovo/x60: 64MiB Video RAM changed to default
+Subject: [PATCH 03/65] lenovo/x60: 64MiB Video RAM changed to default
  (previously it was 8MiB)
 
 ---
@@ -19,5 +19,5 @@ index 58825c8a36..8e0aaf427d 100644
 -gfx_uma_size=8M
 +gfx_uma_size=64M
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch b/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
index 80f3023d..738d486e 100644
--- a/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
+++ b/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
@@ -1,7 +1,7 @@
-From 5b2a26e72bce37f7b0a92f1ed93fd607cea8de9b Mon Sep 17 00:00:00 2001
+From 92b009babd1e4a63dd34638924b9559727713369 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@osboot.org>
 Date: Mon, 22 Feb 2021 22:16:59 +0000
-Subject: [PATCH 04/39] lenovo/t60: make 64MiB VRAM the default in cmos.default
+Subject: [PATCH 04/65] lenovo/t60: make 64MiB VRAM the default in cmos.default
 
 ---
  src/mainboard/lenovo/t60/cmos.default | 2 +-
@@ -18,5 +18,5 @@ index 283a5747ee..91f6c0e6e2 100644
 -gfx_uma_size=8M
 +gfx_uma_size=64M
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch b/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch
index 2140071d..439679e2 100644
--- a/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch
+++ b/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch
@@ -1,7 +1,7 @@
-From 945d84782e706e8f3effab57edca68d9463d21fc Mon Sep 17 00:00:00 2001
+From c7ad2407a7f515d487332382bb55025873c3d987 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:10:33 +0100
-Subject: [PATCH 05/39] lenovo/t400: set VRAM to 256MiB VRAM by default
+Subject: [PATCH 05/65] lenovo/t400: set VRAM to 256MiB VRAM by default
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -19,5 +19,5 @@ index a16d386dd1..e7bb32306c 100644
 -gfx_uma_size=32M
 +gfx_uma_size=256M
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch b/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch
index 07434470..477c1724 100644
--- a/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch
+++ b/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch
@@ -1,7 +1,7 @@
-From 112470b4f7b046ec2656699336211ba63ff448fa Mon Sep 17 00:00:00 2001
+From 79f686dae47d2ef934b5c95979195f9d3c1978e6 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:11:59 +0100
-Subject: [PATCH 06/39] lenovo/x200: set VRAM to 256MiB by default
+Subject: [PATCH 06/65] lenovo/x200: set VRAM to 256MiB by default
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -19,5 +19,5 @@ index 434af5d227..443ef54e41 100644
 -gfx_uma_size=32M
 +gfx_uma_size=256M
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch b/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch
index ad619606..e435726d 100644
--- a/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch
+++ b/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch
@@ -1,7 +1,7 @@
-From 37418629a56cb740cae2870317458ea52daad8c9 Mon Sep 17 00:00:00 2001
+From a79498ab8a7eac809d99db2fad5b0f8c63870e43 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:18:26 +0100
-Subject: [PATCH 07/39] gigabyte/ga-g41m-es2l: set VRAM to 256MiB by default
+Subject: [PATCH 07/65] gigabyte/ga-g41m-es2l: set VRAM to 256MiB by default
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -19,5 +19,5 @@ index fe79c83570..4a1f97a9d8 100644
 -gfx_uma_size=64M
 +gfx_uma_size=256M
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch b/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch
index e0ac6cf1..9aa1b1cb 100644
--- a/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch
+++ b/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch
@@ -1,7 +1,7 @@
-From e785387dffe382a02d4c0cb006cced48c235484c Mon Sep 17 00:00:00 2001
+From 5fbdbb11b215e3aa4256dfaa468224fd0c2a1fb0 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:21:39 +0100
-Subject: [PATCH 08/39] acer/g43t-am3: set VRAM to 256MiB by default
+Subject: [PATCH 08/65] acer/g43t-am3: set VRAM to 256MiB by default
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -19,5 +19,5 @@ index 23f0e55f3e..8d6c4db1ce 100644
 -gfx_uma_size=64M
 +gfx_uma_size=256M
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch b/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch
index f655f93c..7dead180 100644
--- a/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch
+++ b/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch
@@ -1,7 +1,7 @@
-From 3659aec797baa40e4336e88361a705295fb72b0f Mon Sep 17 00:00:00 2001
+From 15003992f57b62ce59dc282cd089987306126cc9 Mon Sep 17 00:00:00 2001
 From: persmule <persmule@gmail.com>
 Date: Sun, 31 Oct 2021 23:33:26 +0000
-Subject: [PATCH 09/39] lenovo/t400: Enable all SATA ports
+Subject: [PATCH 09/65] lenovo/t400: Enable all SATA ports
 
 There are 2 SATA ports on the chassis of t400(s), but at least one dock for
 t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
@@ -30,5 +30,5 @@ index 259c3e1b21..3d007533a4 100644
  			register "sata_traffic_monitor"		= "0"
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch b/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch
index db6d64f8..e5cac363 100644
--- a/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch
+++ b/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch
@@ -1,7 +1,7 @@
-From 820c2d64a7415f7159fd7cdac4746049c91f89a2 Mon Sep 17 00:00:00 2001
+From f8ea06883762c906a7f3ad7d286b628bca3443ab Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 20 Dec 2021 01:29:31 +0000
-Subject: [PATCH 10/39] coreboot: Add Lenovo X230 patch: gfx_uma_size 224M by
+Subject: [PATCH 10/65] coreboot: Add Lenovo X230 patch: gfx_uma_size 224M by
  default
 
 ---
@@ -18,5 +18,5 @@ index 732e214b32..3bb78960b9 100644
  me_state=Normal
 +gfx_uma_size=224M
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch b/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
index 868b65d5..375c14fc 100644
--- a/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
+++ b/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
@@ -1,7 +1,7 @@
-From 6bc13399517009917538cd4ddb426c4b1550bfad Mon Sep 17 00:00:00 2001
+From 47483865af46a3d1f8732d1bd97f4a7155cc24d6 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 3 Jan 2022 19:06:22 +0000
-Subject: [PATCH 11/39] lenovo/x230: set me_state=Disabled in cmos.default
+Subject: [PATCH 11/65] lenovo/x230: set me_state=Disabled in cmos.default
 
 I only recently found out about this. It's possible to use me_cleaner to
 do the same thing, but some people might just flash coreboot and not do
@@ -34,5 +34,5 @@ index 3bb78960b9..ae47202aac 100644
 +me_state=Disabled
  gfx_uma_size=224M
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch b/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch
index 09981df8..28a4a6a4 100644
--- a/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch
+++ b/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch
@@ -1,7 +1,7 @@
-From 72c9e1403fb93c025be75536f5520e2ef9d4da9e Mon Sep 17 00:00:00 2001
+From 84f7622ea0c3a78742f129d2ec9f437e6c424839 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Wed, 2 Mar 2022 21:50:01 +0000
-Subject: [PATCH 12/39] set me_state=Disabled on all cmos.default files!
+Subject: [PATCH 12/65] set me_state=Disabled on all cmos.default files!
 
 yeah. why the hell isn't this the default
 
@@ -120,5 +120,5 @@ index d61046df6b..8c793fd1c3 100644
 -me_state=Enable
 +me_state=Disabled
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0013-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/default/patches/0013-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
index 9d4270e7..a39d14bd 100644
--- a/config/coreboot/default/patches/0013-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ b/config/coreboot/default/patches/0013-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -1,7 +1,7 @@
-From 70cf6905b54d39285025373dae1c897c9c727f83 Mon Sep 17 00:00:00 2001
+From 851aa297808a4776634df5817cae54c226b4d750 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 13/39] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 13/65] util/ifdtool: add --nuke flag (all 0xFF on region)
 
 When this option is used, the region's contents are overwritten
 with all ones (0xFF).
@@ -201,5 +201,5 @@ index 32b2081d93..1473cf058b 100644
  		struct fpsba *fpsba = find_fpsba(image, size);
  		struct fmsba *fmsba = find_fmsba(image, size);
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0014-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch b/config/coreboot/default/patches/0014-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
index bfcc486a..23677556 100644
--- a/config/coreboot/default/patches/0014-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
+++ b/config/coreboot/default/patches/0014-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
@@ -1,7 +1,7 @@
-From c53e5035b612710595abc93f0b4c3c65ca61ebad Mon Sep 17 00:00:00 2001
+From a1a4312c9bea5b7fb5170174dbd14f914c11637c Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Wed, 1 Dec 2021 02:53:00 +0000
-Subject: [PATCH 14/39] fix speedstep on x200/t400: Revert
+Subject: [PATCH 14/65] fix speedstep on x200/t400: Revert
  "cpu/intel/model_1067x: enable PECI"
 
 This reverts commit 70fea013c7ebd6d85a7806748233fcfd76802f5f.
@@ -43,5 +43,5 @@ index d051e8915b..30ba2bf0c6 100644
  
  #define PIC_SENS_CFG	0x1aa
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0015-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch b/config/coreboot/default/patches/0015-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
index 4e0c8172..731742d3 100644
--- a/config/coreboot/default/patches/0015-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
+++ b/config/coreboot/default/patches/0015-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
@@ -1,7 +1,7 @@
-From dabe942b006082f6e592a26f1d0f13a2586b53d6 Mon Sep 17 00:00:00 2001
+From 7e366e5d4d56aade1cb8de8433eb2b02cc9aceef Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 17 Apr 2023 15:49:57 +0100
-Subject: [PATCH 15/39] GM45-type CPUs: don't enable alternative SMRR
+Subject: [PATCH 15/65] GM45-type CPUs: don't enable alternative SMRR
 
 This reverts the changes in coreboot revision:
 df7aecd92643d207feaf7fd840f8835097346644
@@ -169,5 +169,5 @@ index 535fb8fae7..f7b05facd2 100644
  	configure_c_states();
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0016-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch b/config/coreboot/default/patches/0016-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
index 9ebeffa2..040834db 100644
--- a/config/coreboot/default/patches/0016-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
+++ b/config/coreboot/default/patches/0016-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
@@ -1,7 +1,7 @@
-From 6426e07c7da50d588ee1ca30e0911040d89e4c96 Mon Sep 17 00:00:00 2001
+From b925e95cc9d750c56fdbfbd1838b77339c124139 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sat, 6 May 2023 15:53:41 -0600
-Subject: [PATCH 16/39] mb/dell/e6400: Enable 01.0 device in devicetree for
+Subject: [PATCH 16/65] mb/dell/e6400: Enable 01.0 device in devicetree for
  dGPU models
 
 Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
@@ -24,5 +24,5 @@ index bb954cbd7b..e9f3915d17 100644
  		device pci 02.1 on end # Display
  		device pci 03.0 on end # ME
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0017-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/default/patches/0017-Remove-warning-for-coreboot-images-built-without-a-p.patch
index b575453c..eb76118f 100644
--- a/config/coreboot/default/patches/0017-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ b/config/coreboot/default/patches/0017-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -1,7 +1,7 @@
-From 29a654eaaa7bf924f9681a2520dbabfe12619269 Mon Sep 17 00:00:00 2001
+From f440b426378314bfbc0f397fdd9bd5bd68d81483 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 17/39] Remove warning for coreboot images built without a
+Subject: [PATCH 17/65] Remove warning for coreboot images built without a
  payload
 
 I added this in upstream to prevent people from accidentally flashing
@@ -35,5 +35,5 @@ index 5f988dac1b..516133880f 100644
 -.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
 +.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0018-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch b/config/coreboot/default/patches/0018-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
index bfcdb6cf..4d8f0c21 100644
--- a/config/coreboot/default/patches/0018-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
+++ b/config/coreboot/default/patches/0018-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
@@ -1,7 +1,7 @@
-From 892b6244c27590cbf1d82125340c57273e42b911 Mon Sep 17 00:00:00 2001
+From e4509a2d3204d8798cc48be37f33e43d07ff5e3b Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sat, 19 Aug 2023 16:19:10 -0600
-Subject: [PATCH 18/39] mb/dell: Add Latitude E6530 (Ivy Bridge)
+Subject: [PATCH 18/65] mb/dell: Add Latitude E6530 (Ivy Bridge)
 
 Mainboard is QALA0/LA-7761P (UMA). The version with a Nvidia dGPU was
 not tested. I do not physically have this system; someone with physical
@@ -426,5 +426,5 @@ index 0000000000..8b9c82fba4
 +	end
 +end
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0019-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch b/config/coreboot/default/patches/0019-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
index 97055b7c..23eef96f 100644
--- a/config/coreboot/default/patches/0019-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
+++ b/config/coreboot/default/patches/0019-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
@@ -1,7 +1,7 @@
-From 9b0766b86ac010b7edfe27d1f7edbb3f27dc742e Mon Sep 17 00:00:00 2001
+From cfac9aa347e13065c2e24d62091636cc4d0e56be Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Wed, 31 Jan 2024 22:57:07 -0700
-Subject: [PATCH 19/39] mb/dell: Add Latitude E5530 (Ivy Bridge)
+Subject: [PATCH 19/65] mb/dell: Add Latitude E5530 (Ivy Bridge)
 
 Mainboard is QXW10/LA-7902P (UMA). I do not physically have this board;
 someone with physical access to one sent me the output of autoport which
@@ -426,5 +426,5 @@ index 0000000000..85c448d010
 +	end
 +end
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch b/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
index 2f6629b2..e42b7c9a 100644
--- a/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
+++ b/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
@@ -1,7 +1,7 @@
-From 5d8a651a71d19918130f58c637700539dd320789 Mon Sep 17 00:00:00 2001
+From e5ed7361d41b89ee38b572beb921924b33cc174d Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sun, 26 Nov 2023 17:08:52 -0700
-Subject: [PATCH 20/39] mb/dell: Add Latitude E6420 (Sandy Bridge)
+Subject: [PATCH 20/65] mb/dell: Add Latitude E6420 (Sandy Bridge)
 
 Mainboard is PAL50/LA-6591P (UMA). The version with an Nvidia dGPU was
 not tested. I do not physically have this system; someone with physical
@@ -431,5 +431,5 @@ index 0000000000..3012a3177f
 +	end
 +end
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0021-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch b/config/coreboot/default/patches/0021-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
index 5d4139e8..9c210c8c 100644
--- a/config/coreboot/default/patches/0021-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
+++ b/config/coreboot/default/patches/0021-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
@@ -1,7 +1,7 @@
-From 1111dcab65ca83f175f1bb9c0496cae24fbfb7c2 Mon Sep 17 00:00:00 2001
+From 73313e682ba8808f8db6259ac7d93f54c11cb884 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Wed, 31 Jan 2024 22:07:25 -0700
-Subject: [PATCH 21/39] mb/dell: Add Latitude E6520 (Sandy Bridge)
+Subject: [PATCH 21/65] mb/dell: Add Latitude E6520 (Sandy Bridge)
 
 Mainboard is PAL60/LA-6562P (UMA). The version with an Nvidia dGPU was
 not tested. I do not physically have this system; someone with physical
@@ -445,5 +445,5 @@ index 0000000000..f90f2dee1f
 +	end
 +end
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch b/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch
index cec59dbe..3a580662 100644
--- a/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch
+++ b/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch
@@ -1,7 +1,7 @@
-From 39dcb2dcada8821c49a3a042d9e70a6cda81a4ab Mon Sep 17 00:00:00 2001
+From a7e2fde426280a944916c341586361f3ac9fa9a8 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Wed, 7 Feb 2024 10:23:38 -0700
-Subject: [PATCH 22/39] mb/dell: Add Latitude E5520 (Sandy Bridge)
+Subject: [PATCH 22/65] mb/dell: Add Latitude E5520 (Sandy Bridge)
 
 Mainboard is Krug 15". I do not physically have this system; someone
 with physical access to one sent me the output of autoport which I then
@@ -438,5 +438,5 @@ index 0000000000..479d1b696e
 +	end
 +end
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0023-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch b/config/coreboot/default/patches/0023-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
index dda8313a..4a7a6bf9 100644
--- a/config/coreboot/default/patches/0023-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
+++ b/config/coreboot/default/patches/0023-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
@@ -1,7 +1,7 @@
-From 948221e226340c1c5852a73d005ada18120de393 Mon Sep 17 00:00:00 2001
+From f781a8bac250d4902ec3e7caa0628c77836a8ae3 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 4 Mar 2024 18:05:43 -0700
-Subject: [PATCH 23/39] mb/dell: Add Latitude E5420 (Sandy Bridge)
+Subject: [PATCH 23/65] mb/dell: Add Latitude E5420 (Sandy Bridge)
 
 Mainboard is Krug 14". I do not physically have this system; someone
 with physical access to one sent me the output of autoport which I then
@@ -438,5 +438,5 @@ index 0000000000..3f55bfd49d
 +	end
 +end
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0024-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch b/config/coreboot/default/patches/0024-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch
index 0b731f5a..9ae5ce64 100644
--- a/config/coreboot/default/patches/0024-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch
+++ b/config/coreboot/default/patches/0024-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch
@@ -1,7 +1,7 @@
-From 5ebb21be501cf43d41d1690c29d047bd98fbc942 Mon Sep 17 00:00:00 2001
+From 85a0905b600c1f532c462047941da6e7c2bb47c2 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Wed, 7 Feb 2024 15:23:46 -0700
-Subject: [PATCH 24/39] mb/dell: Add Latitude E6320 (Sandy Bridge)
+Subject: [PATCH 24/65] mb/dell: Add Latitude E6320 (Sandy Bridge)
 
 Mainboard is PAL70/LA-6611P. I do not physically have this system;
 someone with physical access to one sent me the output of autoport which
@@ -431,5 +431,5 @@ index 0000000000..3bfe6b57ed
 +	end
 +end
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0025-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch b/config/coreboot/default/patches/0025-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch
index 0df0a822..668c0063 100644
--- a/config/coreboot/default/patches/0025-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch
+++ b/config/coreboot/default/patches/0025-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch
@@ -1,7 +1,7 @@
-From fbe48205a55b4a03082affe9f66e81ee509d5f44 Mon Sep 17 00:00:00 2001
+From 817b0d543444e52ddfde536ded52509456dcbbf2 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 8 Mar 2024 09:27:36 -0700
-Subject: [PATCH 25/39] mb/dell: Add Latitude E6220 (Sandy Bridge)
+Subject: [PATCH 25/65] mb/dell: Add Latitude E6220 (Sandy Bridge)
 
 Mainboard is codenamed Vida. I do not physically have this system;
 someone with physical access to one sent me the output of autoport which
@@ -434,5 +434,5 @@ index 0000000000..9faf27e27b
 +	end
 +end
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch b/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch
index c542ef86..d88e97b3 100644
--- a/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch
+++ b/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch
@@ -1,7 +1,7 @@
-From 87e6f8bf38c5dcb4075d0df32507bf9151338b92 Mon Sep 17 00:00:00 2001
+From 48347cf8bc52db7a454a7be8cbc6f9d9eb67b8b0 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 8 Mar 2024 09:33:03 -0700
-Subject: [PATCH 26/39] mb/dell: Add Latitude E6330 (Ivy Bridge)
+Subject: [PATCH 26/65] mb/dell: Add Latitude E6330 (Ivy Bridge)
 
 Mainboard is QAL70/LA-7741P. I do not physically have this system;
 someone with physical access to one sent me the output of autoport which
@@ -432,5 +432,5 @@ index 0000000000..4125159367
 +	end
 +end
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0027-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch b/config/coreboot/default/patches/0027-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch
index 6e49c8c2..bd6f6218 100644
--- a/config/coreboot/default/patches/0027-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch
+++ b/config/coreboot/default/patches/0027-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch
@@ -1,7 +1,7 @@
-From 611b5b3b4794eeda7ffb0a1876e1033705c50545 Mon Sep 17 00:00:00 2001
+From 80af5303da07197a7da5262e82a59b691ffed5a2 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Thu, 26 Oct 2017 21:26:43 +0800
-Subject: [PATCH 27/39] mb/dell: Add Latitude E6230 (Ivy Bridge)
+Subject: [PATCH 27/65] mb/dell: Add Latitude E6230 (Ivy Bridge)
 
 This was adapted from CB:22693 from Iru Cai, which was based on
 autoport. I do not physically have this system. Someone with physical
@@ -436,5 +436,5 @@ index 0000000000..3a0fa720da
 +	end
 +end
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0028-HACK-Disable-coreboot-related-BL31-features.patch b/config/coreboot/default/patches/0028-HACK-Disable-coreboot-related-BL31-features.patch
index 04e4c6d0..e6ad26d1 100644
--- a/config/coreboot/default/patches/0028-HACK-Disable-coreboot-related-BL31-features.patch
+++ b/config/coreboot/default/patches/0028-HACK-Disable-coreboot-related-BL31-features.patch
@@ -1,7 +1,7 @@
-From ea6e8749112dee4f458e9cf591e13e9097d56bab Mon Sep 17 00:00:00 2001
+From 8fa72bedc6282ba581ede85d62a341917ec5d203 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Thu, 22 Jun 2023 16:44:27 +0300
-Subject: [PATCH 28/39] HACK: Disable coreboot related BL31 features
+Subject: [PATCH 28/65] HACK: Disable coreboot related BL31 features
 
 I don't know why, but removing this BL31 make argument lets gru-kevin
 power off properly when shut down from Linux. Needs investigation.
@@ -24,5 +24,5 @@ index cb43897efd..a9e5ff399a 100644
  BL31_MAKEARGS += BUILD_PLAT="$(BL31_BUILD)"
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0029-use-own-mirror-for-acpica-files.patch b/config/coreboot/default/patches/0029-use-own-mirror-for-acpica-files.patch
index a06a5d23..97d7def5 100644
--- a/config/coreboot/default/patches/0029-use-own-mirror-for-acpica-files.patch
+++ b/config/coreboot/default/patches/0029-use-own-mirror-for-acpica-files.patch
@@ -1,7 +1,7 @@
-From 5c385ef4b4424ed8c37e549a00866edda960563f Mon Sep 17 00:00:00 2001
+From 5b425149a2ba0d1c044c32f5e16ba4d4e59796a8 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Wed, 31 Jul 2024 00:03:02 +0100
-Subject: [PATCH 29/39] use own mirror for acpica files
+Subject: [PATCH 29/65] use own mirror for acpica files
 
 intel likes to break links for no reason,
 so we host our own backups of acpica.
@@ -25,5 +25,5 @@ index ad756652ed..5faff337b4 100755
  LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
  CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch b/config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
index 55c95022..fbf7962d 100644
--- a/config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
+++ b/config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
@@ -1,7 +1,7 @@
-From c1065a638f2af40d8ef2c8586074bb82b96c02db Mon Sep 17 00:00:00 2001
+From 253f8eeb895e50b3394b58268594acf9e9596bd2 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 31 Oct 2023 18:24:39 +0000
-Subject: [PATCH 30/39] crank up vram allocation on more intel boards
+Subject: [PATCH 30/65] crank up vram allocation on more intel boards
 
 these were added to libreboot, and it's a policy of
 libreboot to max out the vram settings. this was
@@ -138,5 +138,5 @@ index b318ab9772..82292ea5d6 100644
  me_state=Disabled
 +gfx_uma_size=224M
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch b/config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch
index 50fa15f2..ed0a7a08 100644
--- a/config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch
+++ b/config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch
@@ -1,7 +1,7 @@
-From dc02595f99566f71513ee16f1883e315b725241a Mon Sep 17 00:00:00 2001
+From 7b1caf7260ab468fa2f0e6d73090c5412bc0254d Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 11:41:41 +0000
-Subject: [PATCH 31/39] dell/e6430: use ME Soft Temporary Disable
+Subject: [PATCH 31/65] dell/e6430: use ME Soft Temporary Disable
 
 i overlooked this. it's set on other boards.
 
@@ -26,5 +26,5 @@ index 2a5b30f2b7..279415dfd1 100644
 -me_state=Normal
 +me_state=Disabled
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch b/config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch
index e7cfab6f..4fb0f8a0 100644
--- a/config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch
+++ b/config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch
@@ -1,7 +1,7 @@
-From adb6121970034aa63da8c6303292ff81f340d9db Mon Sep 17 00:00:00 2001
+From b769a682016b7d231bb3d004698c8a2059bbf363 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 22:57:08 +0000
-Subject: [PATCH 32/39] use mirrorservice.org for gcc downloads
+Subject: [PATCH 32/65] use mirrorservice.org for gcc downloads
 
 the gnu.org 302 redirect often fails
 
@@ -32,5 +32,5 @@ index 5faff337b4..2743f96903 100755
  # CLANG toolchain archive locations
  LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0033-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch b/config/coreboot/default/patches/0033-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
index beb65908..9b24c26e 100644
--- a/config/coreboot/default/patches/0033-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
+++ b/config/coreboot/default/patches/0033-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
@@ -1,7 +1,7 @@
-From 67b7a9e4d06d595adf8382ee83e82b5019e23afa Mon Sep 17 00:00:00 2001
+From 3697d2e2df764bd2f1b05a6856e035b606f6a360 Mon Sep 17 00:00:00 2001
 From: Riku Viitanen <riku.viitanen@protonmail.com>
 Date: Sat, 23 Dec 2023 19:02:10 +0200
-Subject: [PATCH 1/1] mb/hp: Add Compaq Elite 8300 CMT port
+Subject: [PATCH 33/65] mb/hp: Add Compaq Elite 8300 CMT port
 
 Based on autoport and Z220 SuperIO code.
 
@@ -868,5 +868,5 @@ index 0000000000..8dbd95ef96
 +	.enable_dev = mainboard_enable,
 +};
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0034-nb-intel-haswell-make-IOMMU-a-runtime-option.patch b/config/coreboot/default/patches/0034-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
index ed6c0d65..35d0046f 100644
--- a/config/coreboot/default/patches/0034-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
+++ b/config/coreboot/default/patches/0034-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
@@ -1,7 +1,7 @@
-From eef3e0d517bde40d4761a9af3c004801a89db887 Mon Sep 17 00:00:00 2001
+From 0ad294f2da8085d5612f7940ec8601d979cb2421 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 2 Mar 2024 22:51:09 +0000
-Subject: [PATCH 34/39] nb/intel/haswell: make IOMMU a runtime option
+Subject: [PATCH 34/65] nb/intel/haswell: make IOMMU a runtime option
 
 When I tested graphics cards on a coreboot port for Dell
 OptiPlex 9020 SFF, I could not use a graphics card unless
@@ -288,5 +288,5 @@ index e47deb5da6..1a7e0b1076 100644
  	if (capid0_a & VTD_DISABLE)
  		return;
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0035-dell-optiplex_9020-Disable-IOMMU-by-default.patch b/config/coreboot/default/patches/0035-dell-optiplex_9020-Disable-IOMMU-by-default.patch
index 1b9497c2..9596d6f3 100644
--- a/config/coreboot/default/patches/0035-dell-optiplex_9020-Disable-IOMMU-by-default.patch
+++ b/config/coreboot/default/patches/0035-dell-optiplex_9020-Disable-IOMMU-by-default.patch
@@ -1,7 +1,7 @@
-From b7a80abe673c279e755efbe92851ec0600467fae Mon Sep 17 00:00:00 2001
+From 80d728b91ec793f584bcf045f00e5fe4bba5e4ae Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 2 Mar 2024 23:00:09 +0000
-Subject: [PATCH 35/39] dell/optiplex_9020: Disable IOMMU by default
+Subject: [PATCH 35/65] dell/optiplex_9020: Disable IOMMU by default
 
 Needed to make graphics cards work. Turning it on is
 recommended if only using iGPU, otherwise leave it off
@@ -25,5 +25,5 @@ index 8000eea8c0..0700f971ee 100644
 -iommu=Enable
 +iommu=Disable
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0036-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch b/config/coreboot/default/patches/0036-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
index b5606617..cf6f20bb 100644
--- a/config/coreboot/default/patches/0036-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
+++ b/config/coreboot/default/patches/0036-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
@@ -1,7 +1,7 @@
-From 4c0f0d139cdc0fbfadf76ee576d69503b81dc9dc Mon Sep 17 00:00:00 2001
+From dba9c3776f90bf345070a90c048ff2bae7180f73 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 6 Apr 2024 01:22:47 +0100
-Subject: [PATCH 36/39] nb/haswell: Fully disable iGPU when dGPU is used
+Subject: [PATCH 36/65] nb/haswell: Fully disable iGPU when dGPU is used
 
 My earlier patch disabled decode *and* disabled the iGPU itself, but
 a subsequent revision disabled only VGA decode. Upon revisiting, I
@@ -47,5 +47,5 @@ index f7fad3183d..1b188e92e1 100644
  
  static struct device_operations gma_func0_ops = {
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0037-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch b/config/coreboot/default/patches/0037-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
index 8947fe3c..a4fce1d1 100644
--- a/config/coreboot/default/patches/0037-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
+++ b/config/coreboot/default/patches/0037-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
@@ -1,7 +1,7 @@
-From 7e921212d3113320b2d28e66cd6a6788533fcab7 Mon Sep 17 00:00:00 2001
+From 726d0001bda013a094779149828e2bc1be581fa8 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 3 May 2024 11:03:32 -0600
-Subject: [PATCH 37/39] ec/dell/mec5035: Add S3 suspend SMI handler
+Subject: [PATCH 37/65] ec/dell/mec5035: Add S3 suspend SMI handler
 
 Change-Id: I655868aba46911d128f6c24f410dc6fdf83f3070
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
@@ -113,5 +113,5 @@ index 0000000000..1db834773d
 +	}
 +}
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0038-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch b/config/coreboot/default/patches/0038-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch
index 8da97601..d1db5146 100644
--- a/config/coreboot/default/patches/0038-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch
+++ b/config/coreboot/default/patches/0038-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch
@@ -1,7 +1,7 @@
-From 53bddae0fc8436fe262ca7fc2e19049afa7a38f8 Mon Sep 17 00:00:00 2001
+From 451b3e3e334d350c060444d79bc964bd90ec1152 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 3 May 2024 16:31:12 -0600
-Subject: [PATCH 38/39] mb/dell/: Add S3 SMI handler for SNB/IVB Latitudes
+Subject: [PATCH 38/65] mb/dell/: Add S3 SMI handler for SNB/IVB Latitudes
 
 This should fix S3 suspend on these systems
 
@@ -27,5 +27,5 @@ index 0000000000..334d7b1a5f
 +	mec5035_sleep(slp_typ);
 +}
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0039-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch b/config/coreboot/default/patches/0039-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
index f658b6d0..2b5173c5 100644
--- a/config/coreboot/default/patches/0039-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
+++ b/config/coreboot/default/patches/0039-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
@@ -1,7 +1,7 @@
-From 919cbfa034db5d2ef9e56dd71ef329c38c5ede3c Mon Sep 17 00:00:00 2001
+From b24c5caf5a8f63555d3b71e7a786c822a4c262cc Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 4 May 2024 02:00:53 +0100
-Subject: [PATCH 39/39] nb/haswell: lock policy regs when disabling IOMMU
+Subject: [PATCH 39/65] nb/haswell: lock policy regs when disabling IOMMU
 
 Angel Pons told me I should do it. See comments here:
 https://review.coreboot.org/c/coreboot/+/81016
@@ -51,5 +51,5 @@ index 1a7e0b1076..e9506ee830 100644
  	/* Set L3HIT2PEND_DIS, lock GFXVTBAR policy config registers */
  	u32 reg32;
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0040-nb-intel-gm45-Make-DDR2-raminit-work.patch b/config/coreboot/default/patches/0040-nb-intel-gm45-Make-DDR2-raminit-work.patch
index b673b5f6..a75edd47 100644
--- a/config/coreboot/default/patches/0040-nb-intel-gm45-Make-DDR2-raminit-work.patch
+++ b/config/coreboot/default/patches/0040-nb-intel-gm45-Make-DDR2-raminit-work.patch
@@ -1,7 +1,7 @@
-From fe5e1655be8cdb8eff1659e5ce6acbd06b9a7620 Mon Sep 17 00:00:00 2001
+From c41e97f85f2a2677c742d62e3080af7cfeb2ef23 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Mon, 10 May 2021 22:40:59 +0200
-Subject: [PATCH 1/3] nb/intel/gm45: Make DDR2 raminit work
+Subject: [PATCH 40/65] nb/intel/gm45: Make DDR2 raminit work
 
 List of changes:
  - Update some timing and ODT values
@@ -219,5 +219,5 @@ index aef863f05a..b74765fd9c 100644
 +	mchbar_clrsetbits32(0x4d0, 0x3f << 20, magic_comp[1] << 20);
  }
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0041-nb-intel-gm45-Make-DDR2-raminit-work.patch b/config/coreboot/default/patches/0041-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
similarity index 98%
rename from config/coreboot/default/patches/0041-nb-intel-gm45-Make-DDR2-raminit-work.patch
rename to config/coreboot/default/patches/0041-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
index 30af9273..6ec32987 100644
--- a/config/coreboot/default/patches/0041-nb-intel-gm45-Make-DDR2-raminit-work.patch
+++ b/config/coreboot/default/patches/0041-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
@@ -1,7 +1,7 @@
-From 88a9c562b77316f1217139e62425f9af1c351c6f Mon Sep 17 00:00:00 2001
+From 3110c4392d40175716f167be5ef8234f2b4cd030 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Tue, 6 Aug 2024 00:50:24 +0100
-Subject: [PATCH 41/59] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
+Subject: [PATCH 41/65] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
 
 We add this patch:
 
@@ -236,5 +236,5 @@ index b74765fd9c..5d4505e063 100644
 +	}
  }
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch b/config/coreboot/default/patches/0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
index 991dcf44..0131af84 100644
--- a/config/coreboot/default/patches/0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
+++ b/config/coreboot/default/patches/0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
@@ -1,7 +1,7 @@
-From b42ca30081b25cbabfb2659adca9d935ef3a8399 Mon Sep 17 00:00:00 2001
+From 265fb9f4fd017de635bc44b5a762c69a8bec6158 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 20 May 2024 10:24:16 -0600
-Subject: [PATCH 3/3] mb/dell/e6400: Use 100 MHz reference clock for display
+Subject: [PATCH 42/65] mb/dell/e6400: Use 100 MHz reference clock for display
 
 The E6400 uses a 100 MHz reference clock for spread spectrum support on
 LVDS, whereas libgfxinit previously assumed a 96 MHz input clock. For
@@ -48,5 +48,5 @@ index 8059e7ee80..5df5a93296 100644
  	select VBOOT_STARTS_IN_BOOTBLOCK
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch b/config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch
index 9b733998..c571fe3b 100644
--- a/config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch
+++ b/config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch
@@ -1,7 +1,7 @@
-From 8b584165a99c69cc808f86efcdd55acb06a4464c Mon Sep 17 00:00:00 2001
+From ab36967cce0593dd17f3018ab4a6661e4219d242 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Thu, 11 Apr 2024 17:25:07 +0200
-Subject: [PATCH 01/17] haswell NRI: Initialise MPLL
+Subject: [PATCH 43/65] haswell NRI: Initialise MPLL
 
 Add code to initialise the MPLL (Memory PLL). The procedure is similar
 to the one for Sandy/Ivy Bridge, but it is not worth factoring out.
@@ -344,5 +344,5 @@ index 5610e7089a..45f8174995 100644
  #define SAPMCTL			0x5f00
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0044-haswell-NRI-Post-process-selected-timings.patch b/config/coreboot/default/patches/0044-haswell-NRI-Post-process-selected-timings.patch
index 924385ed..69e32d2f 100644
--- a/config/coreboot/default/patches/0044-haswell-NRI-Post-process-selected-timings.patch
+++ b/config/coreboot/default/patches/0044-haswell-NRI-Post-process-selected-timings.patch
@@ -1,7 +1,7 @@
-From adde2e8d038b2d07ab7287eedab5888d92a56a60 Mon Sep 17 00:00:00 2001
+From 876011559681881d950ad3b6742b40322f1f5a6d Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 16:29:55 +0200
-Subject: [PATCH 02/17] haswell NRI: Post-process selected timings
+Subject: [PATCH 44/65] haswell NRI: Post-process selected timings
 
 Once the MPLL has been initialised, convert the timings from the SPD to
 be in DCLKs, which is what the hardware expects. In addition, calculate
@@ -245,5 +245,5 @@ index eff993800b..4f7fe46494 100644
 +	return RAMINIT_STATUS_SUCCESS;
 +}
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0045-haswell-NRI-Configure-initial-MC-settings.patch b/config/coreboot/default/patches/0045-haswell-NRI-Configure-initial-MC-settings.patch
index b51839d2..eefd17a9 100644
--- a/config/coreboot/default/patches/0045-haswell-NRI-Configure-initial-MC-settings.patch
+++ b/config/coreboot/default/patches/0045-haswell-NRI-Configure-initial-MC-settings.patch
@@ -1,7 +1,7 @@
-From 0001039f5ea6be6700a453f511069be2ce1b4e7e Mon Sep 17 00:00:00 2001
+From e91b308fe5848b14cabbd29be4af60e3a9b7938d Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 17:22:07 +0200
-Subject: [PATCH 03/17] haswell NRI: Configure initial MC settings
+Subject: [PATCH 45/65] haswell NRI: Configure initial MC settings
 
 Program initial memory controller settings. Many of these values will be
 adjusted later during training.
@@ -1590,5 +1590,5 @@ index 45f8174995..4c3f399b5d 100644
  #define HDAUDRID		0x6008
  #define UMAGFXCTL		0x6020
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0046-haswell-NRI-Add-timings-refresh-programming.patch b/config/coreboot/default/patches/0046-haswell-NRI-Add-timings-refresh-programming.patch
index 2b8b453e..73234ac5 100644
--- a/config/coreboot/default/patches/0046-haswell-NRI-Add-timings-refresh-programming.patch
+++ b/config/coreboot/default/patches/0046-haswell-NRI-Add-timings-refresh-programming.patch
@@ -1,7 +1,7 @@
-From 44032c7df6f4537c43ba80ae2f4a239616bd8d2d Mon Sep 17 00:00:00 2001
+From 694d1650cad8573e899916c0d0a25604885f6e3b Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 20:59:58 +0200
-Subject: [PATCH 04/17] haswell NRI: Add timings/refresh programming
+Subject: [PATCH 46/65] haswell NRI: Add timings/refresh programming
 
 Program the registers with timing and refresh parameters.
 
@@ -537,5 +537,5 @@ index 4c3f399b5d..2acc5cbbc8 100644
  /* MCMAIN broadcast */
  #define MCSCHEDS_CBIT		0x4c20
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0047-haswell-NRI-Program-memory-map.patch b/config/coreboot/default/patches/0047-haswell-NRI-Program-memory-map.patch
index 5628286a..58a2f556 100644
--- a/config/coreboot/default/patches/0047-haswell-NRI-Program-memory-map.patch
+++ b/config/coreboot/default/patches/0047-haswell-NRI-Program-memory-map.patch
@@ -1,7 +1,7 @@
-From 406e474c7f9f83dc10c7c0fa7cd9765ae822ad4e Mon Sep 17 00:00:00 2001
+From 70d7333e1e0c2b0ce0f2a7e4c4c3ac5c1aca2094 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 21:24:50 +0200
-Subject: [PATCH 05/17] haswell NRI: Program memory map
+Subject: [PATCH 47/65] haswell NRI: Program memory map
 
 This is very similar to Sandy/Ivy Bridge, except that there's several
 registers to program in GDXCBAR. One of these GDXCBAR registers has a
@@ -259,5 +259,5 @@ index 1ee0ab2890..0228cf6bb9 100644
  #define PAM0		0x80
  #define PAM1		0x81
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0048-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch b/config/coreboot/default/patches/0048-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
index 9f074e17..b4108c7b 100644
--- a/config/coreboot/default/patches/0048-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
+++ b/config/coreboot/default/patches/0048-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
@@ -1,7 +1,7 @@
-From eb8150a07c472078ad37887de13a166e6cf8bdad Mon Sep 17 00:00:00 2001
+From cc302630662eee011a903df4fd7a36d82bd22203 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 21:49:40 +0200
-Subject: [PATCH 06/17] haswell NRI: Add DDR3 JEDEC reset and init
+Subject: [PATCH 48/65] haswell NRI: Add DDR3 JEDEC reset and init
 
 Implement JEDEC reset and init sequence for DDR3. The MRS commands are
 issued through the REUT (Robust Electrical Unified Testing) hardware.
@@ -1032,5 +1032,5 @@ index 07f4b9dc16..5b3696347c 100644
  #define PMSYNC_CONFIG2	0x33cc	/* 32bit */
  #define SOFT_RESET_CTRL 0x38f4
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0049-haswell-NRI-Add-pre-training-steps.patch b/config/coreboot/default/patches/0049-haswell-NRI-Add-pre-training-steps.patch
index c6beea66..ffec948d 100644
--- a/config/coreboot/default/patches/0049-haswell-NRI-Add-pre-training-steps.patch
+++ b/config/coreboot/default/patches/0049-haswell-NRI-Add-pre-training-steps.patch
@@ -1,7 +1,7 @@
-From 19890277e3a0d411b016efbe1b54e511d4f36c0d Mon Sep 17 00:00:00 2001
+From 0f160dee563155e93422fc77c53251419043d4dc Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 23:12:18 +0200
-Subject: [PATCH 07/17] haswell NRI: Add pre-training steps
+Subject: [PATCH 49/65] haswell NRI: Add pre-training steps
 
 Implement pre-training steps, which consist of enabling ECC I/O and
 filling the WDB (Write Data Buffer, stores test patterns) through a
@@ -388,5 +388,5 @@ index 4fc78a7f43..f8408e51a0 100644
  
  #define REUT_ch_SEQ_CFG(ch)			(0x48a8 + 8 * (ch))
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0050-haswell-NRI-Add-REUT-I-O-test-library.patch b/config/coreboot/default/patches/0050-haswell-NRI-Add-REUT-I-O-test-library.patch
index 6588c376..a65a6ea1 100644
--- a/config/coreboot/default/patches/0050-haswell-NRI-Add-REUT-I-O-test-library.patch
+++ b/config/coreboot/default/patches/0050-haswell-NRI-Add-REUT-I-O-test-library.patch
@@ -1,7 +1,7 @@
-From 5ea55ac3f02a8a10f05e84ab9fbace424194869f Mon Sep 17 00:00:00 2001
+From 78b25eb96baef7da2f5481572a6df2b88ee2b3d4 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 00:11:29 +0200
-Subject: [PATCH 08/17] haswell NRI: Add REUT I/O test library
+Subject: [PATCH 50/65] haswell NRI: Add REUT I/O test library
 
 Implement a library to run I/O tests using the REUT hardware.
 
@@ -1126,5 +1126,5 @@ index f8408e51a0..817a9f8bf8 100644
  #define MCSCHEDS_CBIT		0x4c20
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0051-haswell-NRI-Add-range-tracking-library.patch b/config/coreboot/default/patches/0051-haswell-NRI-Add-range-tracking-library.patch
index 3b78012f..2ec35e26 100644
--- a/config/coreboot/default/patches/0051-haswell-NRI-Add-range-tracking-library.patch
+++ b/config/coreboot/default/patches/0051-haswell-NRI-Add-range-tracking-library.patch
@@ -1,7 +1,7 @@
-From 07970f6dc64e5563c26013d842a929734e2bf8ed Mon Sep 17 00:00:00 2001
+From ca6d92e13278832dfddbe7dcb4cbefa5861041e8 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 00:56:00 +0200
-Subject: [PATCH 09/17] haswell NRI: Add range tracking library
+Subject: [PATCH 51/65] haswell NRI: Add range tracking library
 
 Implement a small library used to keep track of passing ranges. This
 will be used by 1D training algorithms when margining some parameter.
@@ -218,5 +218,5 @@ index 0000000000..235392df96
 +
 +#endif
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0052-haswell-NRI-Add-library-to-change-margins.patch b/config/coreboot/default/patches/0052-haswell-NRI-Add-library-to-change-margins.patch
index ac096936..ffd76fc4 100644
--- a/config/coreboot/default/patches/0052-haswell-NRI-Add-library-to-change-margins.patch
+++ b/config/coreboot/default/patches/0052-haswell-NRI-Add-library-to-change-margins.patch
@@ -1,7 +1,7 @@
-From 66db8447d6cf724c4b25618c94d5a53d501f214e Mon Sep 17 00:00:00 2001
+From f6d7bd420640a9ccb137113d69b97bc13fe6b0da Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 01:11:03 +0200
-Subject: [PATCH 10/17] haswell NRI: Add library to change margins
+Subject: [PATCH 52/65] haswell NRI: Add library to change margins
 
 Implement a library to change Rx/Tx margins. It will be expanded later.
 
@@ -290,5 +290,5 @@ index 817a9f8bf8..a81559bb1e 100644
  
  #define REUT_ch_SEQ_ADDR_INC_CTL(ch)		(0x4910 + 8 * (ch))
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0053-haswell-NRI-Add-RcvEn-training.patch b/config/coreboot/default/patches/0053-haswell-NRI-Add-RcvEn-training.patch
index a9821796..fdb8d270 100644
--- a/config/coreboot/default/patches/0053-haswell-NRI-Add-RcvEn-training.patch
+++ b/config/coreboot/default/patches/0053-haswell-NRI-Add-RcvEn-training.patch
@@ -1,7 +1,7 @@
-From 0826d1e9ba50daad13c3d5adccba4b180c82296b Mon Sep 17 00:00:00 2001
+From d3cd9ccb7d2eed7ecd5bcdc33d73a5e28b029dba Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 00:05:41 +0200
-Subject: [PATCH 11/17] haswell NRI: Add RcvEn training
+Subject: [PATCH 53/65] haswell NRI: Add RcvEn training
 
 Implement the RcvEn (Receive Enable) calibration procedure.
 
@@ -704,5 +704,5 @@ index a81559bb1e..9172d4f2b0 100644
  #define REUT_ch_PAT_WDB_CL_MUX_CFG(ch)		_MCMAIN_C(0x4040, ch)
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0054-haswell-NRI-Add-function-to-change-margins.patch b/config/coreboot/default/patches/0054-haswell-NRI-Add-function-to-change-margins.patch
index 881b81d6..58cc9d82 100644
--- a/config/coreboot/default/patches/0054-haswell-NRI-Add-function-to-change-margins.patch
+++ b/config/coreboot/default/patches/0054-haswell-NRI-Add-function-to-change-margins.patch
@@ -1,7 +1,7 @@
-From 36ec2cfa730ba720ef7ded21cc3e84c47f4e2623 Mon Sep 17 00:00:00 2001
+From dbf0fc28bbb939fe5a90c991b752f790828d462d Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 11:58:59 +0200
-Subject: [PATCH 12/17] haswell NRI: Add function to change margins
+Subject: [PATCH 54/65] haswell NRI: Add function to change margins
 
 Implement a function to change margin parameters. Haswell provides a
 register to apply an offset to margin parameters during training, so
@@ -268,5 +268,5 @@ index 9172d4f2b0..0acafbc826 100644
  
  /* DDR CKE per-channel */
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0055-haswell-NRI-Add-read-MPR-training.patch b/config/coreboot/default/patches/0055-haswell-NRI-Add-read-MPR-training.patch
index 8a9a3daa..be0ddd13 100644
--- a/config/coreboot/default/patches/0055-haswell-NRI-Add-read-MPR-training.patch
+++ b/config/coreboot/default/patches/0055-haswell-NRI-Add-read-MPR-training.patch
@@ -1,7 +1,7 @@
-From 87015f060aa208f37481deef460b3545ce2d757f Mon Sep 17 00:00:00 2001
+From 0a557e3d09a9a53bb085c43e6bdb99fa4cd78b85 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 11:35:49 +0200
-Subject: [PATCH 13/17] haswell NRI: Add read MPR training
+Subject: [PATCH 55/65] haswell NRI: Add read MPR training
 
 Implement read training using DDR3 MPR (Multi-Purpose Register).
 
@@ -328,5 +328,5 @@ index 0acafbc826..6a31d3a32c 100644
  #define REUT_ch_PAT_CADB_MRS(ch)		_MCMAIN_C(0x419c, ch)
  #define REUT_ch_PAT_CADB_MUX_CTRL(ch)		_MCMAIN_C(0x41a0, ch)
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0056-haswell-NRI-Add-write-leveling.patch b/config/coreboot/default/patches/0056-haswell-NRI-Add-write-leveling.patch
index a3f3e839..0791fb80 100644
--- a/config/coreboot/default/patches/0056-haswell-NRI-Add-write-leveling.patch
+++ b/config/coreboot/default/patches/0056-haswell-NRI-Add-write-leveling.patch
@@ -1,7 +1,7 @@
-From ce0ed94f993506e75b711c214b49ba480037e7d3 Mon Sep 17 00:00:00 2001
+From e8f50deac2a671f7ec3958b376c37dd6b9bad5bd Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 12:56:04 +0200
-Subject: [PATCH 14/17] haswell NRI: Add write leveling
+Subject: [PATCH 56/65] haswell NRI: Add write leveling
 
 Implement JEDEC write leveling, which is done in two steps. The first
 step uses the JEDEC procedure to do "fine" write leveling, i.e. align
@@ -685,5 +685,5 @@ index 6a31d3a32c..7c0b5a49de 100644
  #define REUT_ch_MISC_ODT_CTRL(ch)		_MCMAIN_C(0x4194, ch)
  #define REUT_ch_MISC_PAT_CADB_CTRL(ch)		_MCMAIN_C(0x4198, ch)
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0057-haswell-NRI-Add-final-raminit-steps.patch b/config/coreboot/default/patches/0057-haswell-NRI-Add-final-raminit-steps.patch
index db111ee1..3cd8c758 100644
--- a/config/coreboot/default/patches/0057-haswell-NRI-Add-final-raminit-steps.patch
+++ b/config/coreboot/default/patches/0057-haswell-NRI-Add-final-raminit-steps.patch
@@ -1,7 +1,7 @@
-From e30c9c431ef11d87c6f46071ec43cc34391b8349 Mon Sep 17 00:00:00 2001
+From 990ee284d48b66f06adb6c43a96439f7628390f5 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 14:29:05 +0200
-Subject: [PATCH 15/17] haswell NRI: Add final raminit steps
+Subject: [PATCH 57/65] haswell NRI: Add final raminit steps
 
 Implement the remaining raminit steps. Although many training steps are
 missing, this is enough to boot on the Asrock B85M Pro4.
@@ -566,5 +566,5 @@ index 7c0b5a49de..49a215aa71 100644
  #define RCOMP_TIMER		0x5084
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0058-Haswell-NRI-Implement-fast-boot-path.patch b/config/coreboot/default/patches/0058-Haswell-NRI-Implement-fast-boot-path.patch
index 40e86a7a..b5d04b99 100644
--- a/config/coreboot/default/patches/0058-Haswell-NRI-Implement-fast-boot-path.patch
+++ b/config/coreboot/default/patches/0058-Haswell-NRI-Implement-fast-boot-path.patch
@@ -1,7 +1,7 @@
-From 50c9d184cc89cd718c1cb95e1a3cabed24e09e1e Mon Sep 17 00:00:00 2001
+From 63e9aa1f998ebd41b4c638fa66bdb1a6272a9e85 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 13 Apr 2024 01:16:30 +0200
-Subject: [PATCH 16/17] Haswell NRI: Implement fast boot path
+Subject: [PATCH 58/65] Haswell NRI: Implement fast boot path
 
 When the memory configuration hasn't changed, there is no need to do
 full memory training. Instead, boot firmware can use saved training
@@ -718,5 +718,5 @@ index 0000000000..f1f50e3ff8
 +	return RAMINIT_STATUS_SUCCESS;
 +}
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0059-haswell-NRI-Do-sense-amplifier-offset-training.patch b/config/coreboot/default/patches/0059-haswell-NRI-Do-sense-amplifier-offset-training.patch
index c51560c7..0310e671 100644
--- a/config/coreboot/default/patches/0059-haswell-NRI-Do-sense-amplifier-offset-training.patch
+++ b/config/coreboot/default/patches/0059-haswell-NRI-Do-sense-amplifier-offset-training.patch
@@ -1,7 +1,7 @@
-From 8528c7aa2a3cfcf0fe494a515a2e531ff0f1dab8 Mon Sep 17 00:00:00 2001
+From c22e06a8ef87f74cc9955ffc259e7052742269c4 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Wed, 17 Apr 2024 13:20:32 +0200
-Subject: [PATCH 17/17] haswell NRI: Do sense amplifier offset training
+Subject: [PATCH 59/65] haswell NRI: Do sense amplifier offset training
 
 Quoting Wikipedia:
 
@@ -472,5 +472,5 @@ index 49a215aa71..1a168a3fc8 100644
  
  #define DQ_CONTROL_1(ch, byte)			_DDRIO_C_R_B(0x0060, ch, 0, byte)
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0060-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch b/config/coreboot/default/patches/0060-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
index 21b0d40c..a899693b 100644
--- a/config/coreboot/default/patches/0060-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
+++ b/config/coreboot/default/patches/0060-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
@@ -1,7 +1,7 @@
-From f52188b46ce60383b67aeea2bda7ec52d631c822 Mon Sep 17 00:00:00 2001
+From c0e95144b426ab323e0397942579261fbb7b922b Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Mon, 12 Aug 2024 02:15:24 +0100
-Subject: [PATCH 1/1] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
+Subject: [PATCH 60/65] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
 
 set it to 96MHz. fixes the following build error when
 building for x4x boards e.g. gigabyte ga-g41m-es2l:
@@ -48,5 +48,5 @@ index 9af063819b..93ba575b95 100644
  	default 0x100000 if !SOUTHBRIDGE_INTEL_I82801GX
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch b/config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch
index b09dac46..a808fb3f 100644
--- a/config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch
+++ b/config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch
@@ -1,13 +1,12 @@
-From 76a22c32d673f7e9afe66424512035586433a78c Mon Sep 17 00:00:00 2001
+From 66896f156eaade2c01636ac445cfd47afa6a32cc Mon Sep 17 00:00:00 2001
 From: Mate Kukri <kukri.mate@gmail.com>
-Date: Sun, 14 Jul 2024 14:24:12 +0100
-Subject: [PATCH 1/1] [WIP] OptiPlex 3050 Micro port
+Date: Thu, 24 Oct 2024 18:05:19 +0100
+Subject: [PATCH 61/65] [WIP] OptiPlex 3050 Micro port
 
 - Boots Linux
 - SMSC SCH5553 SIO/EC
-  + Early EC init + HWM init implemented
-  + Console on serial port tested
-  + TODO: late HWM init for fan control (fan runs at low speed now)
+  + Serial port works
+  + PWM fan control works
 - Realtek Gigabit LAN works
 - WiFi slot works
 - NVMe SSD slot works
@@ -27,25 +26,25 @@ Subject: [PATCH 1/1] [WIP] OptiPlex 3050 Micro port
 Change-Id: I8d443e39ee684a4eaa19c835a945cfe569c051e2
 Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
 ---
- src/mainboard/dell/optiplex_3050/Kconfig      |  34 +++
+ src/mainboard/dell/optiplex_3050/Kconfig      |  32 ++
  src/mainboard/dell/optiplex_3050/Kconfig.name |   4 +
  src/mainboard/dell/optiplex_3050/Makefile.mk  |   9 +
  src/mainboard/dell/optiplex_3050/acpi/ec.asl  |   3 +
  .../dell/optiplex_3050/acpi/superio.asl       |   3 +
  .../dell/optiplex_3050/board_info.txt         |   7 +
- src/mainboard/dell/optiplex_3050/bootblock.c  | 107 ++++++++
+ src/mainboard/dell/optiplex_3050/bootblock.c  | 107 ++++
  src/mainboard/dell/optiplex_3050/cmos.default |   5 +
- src/mainboard/dell/optiplex_3050/cmos.layout  |  54 ++++
- .../dell/optiplex_3050/devicetree.cb          | 123 +++++++++
- src/mainboard/dell/optiplex_3050/dsdt.asl     |  27 ++
- .../dell/optiplex_3050/gma-mainboard.ads      |  19 ++
+ src/mainboard/dell/optiplex_3050/cmos.layout  |  54 ++
+ .../dell/optiplex_3050/devicetree.cb          | 119 ++++
+ src/mainboard/dell/optiplex_3050/dsdt.asl     |  27 +
+ .../dell/optiplex_3050/gma-mainboard.ads      |  19 +
  .../dell/optiplex_3050/include/early_gpio.h   |  11 +
- .../dell/optiplex_3050/include/gpio.h         | 241 ++++++++++++++++++
- src/mainboard/dell/optiplex_3050/ramstage.c   |  17 ++
- src/mainboard/dell/optiplex_3050/romstage.c   |  26 ++
- src/mainboard/dell/optiplex_3050/sch5555_ec.c |  54 ++++
+ .../dell/optiplex_3050/include/gpio.h         | 241 ++++++++
+ src/mainboard/dell/optiplex_3050/ramstage.c   | 513 ++++++++++++++++++
+ src/mainboard/dell/optiplex_3050/romstage.c   |  26 +
+ src/mainboard/dell/optiplex_3050/sch5555_ec.c |  54 ++
  src/mainboard/dell/optiplex_3050/sch5555_ec.h |  10 +
- 18 files changed, 754 insertions(+)
+ 18 files changed, 1244 insertions(+)
  create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig
  create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig.name
  create mode 100644 src/mainboard/dell/optiplex_3050/Makefile.mk
@@ -67,10 +66,10 @@ Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
 
 diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
 new file mode 100644
-index 0000000000..763acda0b2
+index 0000000000..2f0dccb98d
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_3050/Kconfig
-@@ -0,0 +1,34 @@
+@@ -0,0 +1,32 @@
 +## SPDX-License-Identifier: GPL-2.0-only
 +
 +if BOARD_DELL_OPTIPLEX_3050
@@ -84,10 +83,8 @@ index 0000000000..763acda0b2
 +	select HAVE_OPTION_TABLE
 +	# select INTEL_GMA_HAVE_VBT
 +	select MAINBOARD_HAS_LIBGFXINIT
-+	select MAINBOARD_HAS_TPM2
 +	select MAINBOARD_SUPPORTS_KABYLAKE_CPU
 +	select MAINBOARD_SUPPORTS_SKYLAKE_CPU
-+	select MEMORY_MAPPED_TPM
 +	select SKYLAKE_SOC_PCH_H
 +	select SOC_INTEL_KABYLAKE
 +	select SUPERIO_SMSC_SCH555x
@@ -117,7 +114,7 @@ index 0000000000..14eab7f52c
 +	bool "OptiPlex 3050 Micro"
 diff --git a/src/mainboard/dell/optiplex_3050/Makefile.mk b/src/mainboard/dell/optiplex_3050/Makefile.mk
 new file mode 100644
-index 0000000000..c078124332
+index 0000000000..d50ea40879
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_3050/Makefile.mk
 @@ -0,0 +1,9 @@
@@ -128,7 +125,7 @@ index 0000000000..c078124332
 +
 +romstage-y += romstage.c
 +
-+ramstage-y += ramstage.c
++ramstage-y += ramstage.c sch5555_ec.c
 +ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
 diff --git a/src/mainboard/dell/optiplex_3050/acpi/ec.asl b/src/mainboard/dell/optiplex_3050/acpi/ec.asl
 new file mode 100644
@@ -347,10 +344,10 @@ index 0000000000..54a5147b7d
 +checksum 392 415 984
 diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb
 new file mode 100644
-index 0000000000..49b2d7f603
+index 0000000000..eb731fe48f
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_3050/devicetree.cb
-@@ -0,0 +1,123 @@
+@@ -0,0 +1,119 @@
 +## SPDX-License-Identifier: GPL-2.0-only
 +
 +chip soc/intel/skylake
@@ -461,10 +458,6 @@ index 0000000000..49b2d7f603
 +				device pnp 2e.b  off end	# Floppy Controller
 +				device pnp 2e.11 off end	# Parallel Port
 +			end
-+
-+			chip drivers/pc80/tpm
-+				device pnp 0c31.0 on end
-+			end
 +		end
 +
 +		device ref hda on
@@ -798,27 +791,523 @@ index 0000000000..83293c32a9
 +#endif
 diff --git a/src/mainboard/dell/optiplex_3050/ramstage.c b/src/mainboard/dell/optiplex_3050/ramstage.c
 new file mode 100644
-index 0000000000..0badd89620
+index 0000000000..5cf2c81e50
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_3050/ramstage.c
-@@ -0,0 +1,17 @@
+@@ -0,0 +1,513 @@
 +/* SPDX-License-Identifier: GPL-2.0-only */
 +
++#include <bootstate.h>
++#include <arch/cpuid.h>
++#include <cpu/x86/msr.h>
++#include <soc/gpio.h>
 +#include <soc/ramstage.h>
 +#include "include/gpio.h"
++#include "sch5555_ec.h"
 +
 +void mainboard_silicon_init_params(FSP_SIL_UPD *params)
 +{
 +	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
 +}
 +
-+static void init_mainboard(void *chip_info)
++#define FORM_FACTOR_MICRO	0
++#define FORM_FACTOR_SFF		1
++// NOTE: one of these is MT, but 2 and 3 both get the same table anyways
++#define FORM_FACTOR_UNK2	2
++#define FORM_FACTOR_UNK3	3
++
++#define HWM_TAB_ADD_TEMP_TARGET	1
++#define HWM_TAB_PKG_POWER_ANY	0xffff
++
++struct hwm_tab_entry {
++	uint16_t addr;
++	uint8_t val;
++	uint8_t flags;
++	uint16_t pkg_power;
++};
++
++static const struct hwm_tab_entry HWM_TAB_MICRO_BASE[] = {
++	{ 0x005, 0x33, 0, 0xffff },
++	{ 0x018, 0x2f, 0, 0xffff },
++	{ 0x019, 0x2f, 0, 0xffff },
++	{ 0x01a, 0x2f, 0, 0xffff },
++	{ 0x01b, 0x0f, 0, 0xffff },
++	{ 0x057, 0xff, 0, 0xffff },
++	{ 0x059, 0xff, 0, 0xffff },
++	{ 0x05b, 0xff, 0, 0xffff },
++	{ 0x05d, 0xff, 0, 0xffff },
++	{ 0x05f, 0xff, 0, 0xffff },
++	{ 0x061, 0xff, 0, 0xffff },
++	{ 0x06e, 0x00, 0, 0xffff },
++	{ 0x06f, 0x03, 0, 0xffff },
++	{ 0x070, 0x03, 0, 0xffff },
++	{ 0x071, 0x02, 0, 0xffff },
++	{ 0x072, 0x02, 0, 0xffff },
++	{ 0x073, 0x01, 0, 0xffff },
++	{ 0x074, 0x06, 0, 0xffff },
++	{ 0x075, 0x07, 0, 0xffff },
++	{ 0x080, 0x00, 0, 0xffff },
++	{ 0x081, 0x80, 0, 0xffff },
++	{ 0x082, 0x80, 0, 0xffff },
++	{ 0x083, 0xbb, 0, 0xffff },
++	{ 0x085, 0xf1, 0, 0xffff },
++	{ 0x086, 0x88, 0, 0xffff },
++	{ 0x087, 0x61, 0, 0xffff },
++	{ 0x088, 0x08, 0, 0xffff },
++	{ 0x089, 0x00, 0, 0xffff },
++	{ 0x08a, 0x73, 0, 0xffff },
++	{ 0x08b, 0x73, 0, 0xffff },
++	{ 0x08c, 0x73, 0, 0xffff },
++	{ 0x090, 0x6d, 0, 0xffff },
++	{ 0x091, 0x7e, 0, 0xffff },
++	{ 0x092, 0x66, 0, 0xffff },
++	{ 0x093, 0xa4, 0, 0xffff },
++	{ 0x094, 0x7c, 0, 0xffff },
++	{ 0x095, 0xa4, 0, 0xffff },
++	{ 0x096, 0xa4, 0, 0xffff },
++	{ 0x097, 0xa4, 0, 0xffff },
++	{ 0x098, 0xa4, 0, 0xffff },
++	{ 0x099, 0xa4, 0, 0xffff },
++	{ 0x09a, 0xa4, 0, 0xffff },
++	{ 0x09b, 0xa4, 0, 0xffff },
++	{ 0x0a0, 0x2e, 0, 0xffff },
++	{ 0x0a1, 0x00, 0, 0xffff },
++	{ 0x0a2, 0x00, 0, 0xffff },
++	{ 0x0ae, 0xa4, 0, 0xffff },
++	{ 0x0af, 0xa4, 0, 0xffff },
++	{ 0x0b0, 0xa4, 0, 0xffff },
++	{ 0x0b1, 0xa4, 0, 0xffff },
++	{ 0x0b2, 0xa4, 0, 0xffff },
++	{ 0x0b3, 0xa4, 0, 0xffff },
++	{ 0x0b6, 0x00, 0, 0xffff },
++	{ 0x0b7, 0x00, 0, 0xffff },
++	{ 0x0d1, 0xff, 0, 0xffff },
++	{ 0x0d6, 0xff, 0, 0xffff },
++	{ 0x0db, 0xff, 0, 0xffff },
++	{ 0x0ea, 0x5c, 0, 0xffff },
++	{ 0x0eb, 0x5c, 0, 0xffff },
++	{ 0x0ef, 0xff, 0, 0xffff },
++	{ 0x0f8, 0x15, 0, 0xffff },
++	{ 0x0f9, 0x00, 0, 0xffff },
++	{ 0x0f0, 0x30, 0, 0xffff },
++	{ 0x184, 0xff, 0, 0xffff },
++	{ 0x186, 0xff, 0, 0xffff },
++	{ 0x1a1, 0xce, 0, 0xffff },
++	{ 0x1a2, 0x0c, 0, 0xffff },
++	{ 0x1a3, 0x0c, 0, 0xffff },
++	{ 0x1a6, 0x00, 0, 0xffff },
++	{ 0x1a7, 0x00, 0, 0xffff },
++	{ 0x1a8, 0xa4, 0, 0xffff },
++	{ 0x1a9, 0xa4, 0, 0xffff },
++	{ 0x1ab, 0x2d, 0, 0xffff },
++	{ 0x1ac, 0x2d, 0, 0xffff },
++	{ 0x1b1, 0x00, 0, 0xffff },
++	{ 0x1bb, 0x00, 0, 0xffff },
++	{ 0x1bc, 0x00, 0, 0xffff },
++	{ 0x1bd, 0x00, 0, 0xffff },
++	{ 0x1be, 0x01, 0, 0xffff },
++	{ 0x1bf, 0x01, 0, 0xffff },
++	{ 0x1c0, 0x01, 0, 0xffff },
++	{ 0x1c1, 0x01, 0, 0xffff },
++	{ 0x1c2, 0x01, 0, 0xffff },
++	{ 0x280, 0x00, 0, 0xffff },
++	{ 0x281, 0x00, 0, 0xffff },
++	{ 0x282, 0x03, 0, 0xffff },
++	{ 0x283, 0x0a, 0, 0xffff },
++	{ 0x284, 0x80, 0, 0xffff },
++	{ 0x285, 0x03, 0, 0xffff },
++	{ 0x040, 0x01, 0, 0xffff },
++};
++
++static const struct hwm_tab_entry HWM_TAB_MICRO_TEMP80[] = {
++	{ 0x005, 0x33, 0, 0xffff },
++	{ 0x018, 0x2f, 0, 0xffff },
++	{ 0x019, 0x2f, 0, 0xffff },
++	{ 0x01a, 0x2f, 0, 0xffff },
++	{ 0x01b, 0x0f, 0, 0xffff },
++	{ 0x057, 0xff, 0, 0xffff },
++	{ 0x059, 0xff, 0, 0xffff },
++	{ 0x05b, 0xff, 0, 0xffff },
++	{ 0x05d, 0xff, 0, 0xffff },
++	{ 0x05f, 0xff, 0, 0xffff },
++	{ 0x061, 0xff, 0, 0xffff },
++	{ 0x06e, 0x00, 0, 0xffff },
++	{ 0x06f, 0x03, 0, 0xffff },
++	{ 0x070, 0x03, 0, 0xffff },
++	{ 0x071, 0x02, 0, 0xffff },
++	{ 0x072, 0x02, 0, 0xffff },
++	{ 0x073, 0x01, 0, 0xffff },
++	{ 0x074, 0x06, 0, 0xffff },
++	{ 0x075, 0x07, 0, 0xffff },
++	{ 0x080, 0x00, 0, 0xffff },
++	{ 0x081, 0x80, 0, 0xffff },
++	{ 0x082, 0x80, 0, 0xffff },
++	{ 0x083, 0xbb, 0, 0xffff },
++	{ 0x085, 0xf6, 0, 0xffff },
++	{ 0x086, 0x88, 0, 0xffff },
++	{ 0x087, 0x61, 0, 0xffff },
++	{ 0x088, 0x08, 0, 0xffff },
++	{ 0x089, 0x00, 0, 0xffff },
++	{ 0x08a, 0x73, 0, 0xffff },
++	{ 0x08b, 0x73, 0, 0xffff },
++	{ 0x08c, 0x73, 0, 0xffff },
++	{ 0x090, 0x6d, 0, 0xffff },
++	{ 0x091, 0x86, 0, 0xffff },
++	{ 0x092, 0x66, 0, 0xffff },
++	{ 0x093, 0xa4, 0, 0xffff },
++	{ 0x094, 0x7c, 0, 0xffff },
++	{ 0x095, 0xa4, 0, 0xffff },
++	{ 0x096, 0xa4, 0, 0xffff },
++	{ 0x097, 0xa4, 0, 0xffff },
++	{ 0x098, 0xa4, 0, 0xffff },
++	{ 0x099, 0xa4, 0, 0xffff },
++	{ 0x09a, 0xa4, 0, 0xffff },
++	{ 0x09b, 0xa4, 0, 0xffff },
++	{ 0x0a0, 0x2e, 0, 0xffff },
++	{ 0x0a1, 0x00, 0, 0xffff },
++	{ 0x0a2, 0x00, 0, 0xffff },
++	{ 0x0ae, 0xa4, 0, 0xffff },
++	{ 0x0af, 0xa4, 0, 0xffff },
++	{ 0x0b0, 0xa4, 0, 0xffff },
++	{ 0x0b1, 0xa4, 0, 0xffff },
++	{ 0x0b2, 0xa4, 0, 0xffff },
++	{ 0x0b3, 0xa4, 0, 0xffff },
++	{ 0x0b6, 0x00, 0, 0xffff },
++	{ 0x0b7, 0x00, 0, 0xffff },
++	{ 0x0d1, 0xff, 0, 0xffff },
++	{ 0x0d6, 0xff, 0, 0xffff },
++	{ 0x0db, 0xff, 0, 0xffff },
++	{ 0x0ea, 0x50, 0, 0xffff },
++	{ 0x0eb, 0x50, 0, 0xffff },
++	{ 0x0ef, 0xff, 0, 0xffff },
++	{ 0x0f8, 0x15, 0, 0xffff },
++	{ 0x0f9, 0x00, 0, 0xffff },
++	{ 0x0f0, 0x30, 0, 0xffff },
++	{ 0x184, 0xff, 0, 0xffff },
++	{ 0x186, 0xff, 0, 0xffff },
++	{ 0x1a1, 0xce, 0, 0xffff },
++	{ 0x1a2, 0x0c, 0, 0xffff },
++	{ 0x1a3, 0x0c, 0, 0xffff },
++	{ 0x1a6, 0x00, 0, 0xffff },
++	{ 0x1a7, 0x00, 0, 0xffff },
++	{ 0x1a8, 0xa4, 0, 0xffff },
++	{ 0x1a9, 0xa4, 0, 0xffff },
++	{ 0x1ab, 0x2d, 0, 0xffff },
++	{ 0x1ac, 0x2d, 0, 0xffff },
++	{ 0x1b1, 0x00, 0, 0xffff },
++	{ 0x1bb, 0x00, 0, 0xffff },
++	{ 0x1bc, 0x00, 0, 0xffff },
++	{ 0x1bd, 0x00, 0, 0xffff },
++	{ 0x1be, 0x01, 0, 0xffff },
++	{ 0x1bf, 0x01, 0, 0xffff },
++	{ 0x1c0, 0x01, 0, 0xffff },
++	{ 0x1c1, 0x01, 0, 0xffff },
++	{ 0x1c2, 0x01, 0, 0xffff },
++	{ 0x280, 0x00, 0, 0xffff },
++	{ 0x281, 0x00, 0, 0xffff },
++	{ 0x282, 0x03, 0, 0xffff },
++	{ 0x283, 0x0a, 0, 0xffff },
++	{ 0x284, 0x80, 0, 0xffff },
++	{ 0x285, 0x03, 0, 0xffff },
++	{ 0x040, 0x01, 0, 0xffff },
++};
++
++static const struct hwm_tab_entry HWM_TAB_MICRO_EARLY_STEPPING[] = {
++	{ 0x005, 0x33, 0, 0xffff },
++	{ 0x018, 0x2f, 0, 0xffff },
++	{ 0x019, 0x2f, 0, 0xffff },
++	{ 0x01a, 0x2f, 0, 0xffff },
++	{ 0x01b, 0x0f, 0, 0xffff },
++	{ 0x057, 0xff, 0, 0xffff },
++	{ 0x059, 0xff, 0, 0xffff },
++	{ 0x05b, 0xff, 0, 0xffff },
++	{ 0x05d, 0xff, 0, 0xffff },
++	{ 0x05f, 0xff, 0, 0xffff },
++	{ 0x061, 0xff, 0, 0xffff },
++	{ 0x06e, 0x01, 0, 0xffff },
++	{ 0x06f, 0x03, 0, 0xffff },
++	{ 0x070, 0x03, 0, 0xffff },
++	{ 0x071, 0x02, 0, 0xffff },
++	{ 0x072, 0x02, 0, 0xffff },
++	{ 0x073, 0x01, 0, 0xffff },
++	{ 0x074, 0x06, 0, 0xffff },
++	{ 0x075, 0x07, 0, 0xffff },
++	{ 0x080, 0x00, 0, 0xffff },
++	{ 0x081, 0x80, 0, 0xffff },
++	{ 0x082, 0x80, 0, 0xffff },
++	{ 0x083, 0xbb, 0, 0xffff },
++	{ 0x085, 0xfd, 0, 0xffff },
++	{ 0x086, 0x60, 0, 0xffff },
++	{ 0x087, 0x50, 0, 0xffff },
++	{ 0x088, 0x08, 0, 0xffff },
++	{ 0x089, 0x00, 0, 0xffff },
++	{ 0x08a, 0x73, 0, 0xffff },
++	{ 0x08b, 0x73, 0, 0xffff },
++	{ 0x08c, 0x73, 0, 0xffff },
++	{ 0x090, 0x6d, 0, 0xffff },
++	{ 0x091, 0x7a, 0, 0xffff },
++	{ 0x092, 0x6b, 0, 0xffff },
++	{ 0x093, 0xa4, 0, 0xffff },
++	{ 0x094, 0x78, 0, 0xffff },
++	{ 0x095, 0xa4, 0, 0xffff },
++	{ 0x096, 0xa4, 0, 0xffff },
++	{ 0x097, 0xa4, 0, 0xffff },
++	{ 0x098, 0xa4, 0, 0xffff },
++	{ 0x099, 0xa4, 0, 0xffff },
++	{ 0x09a, 0xa4, 0, 0xffff },
++	{ 0x09b, 0xa4, 0, 0xffff },
++	{ 0x0a0, 0x2e, 0, 0xffff },
++	{ 0x0a1, 0x00, 0, 0xffff },
++	{ 0x0a2, 0x00, 0, 0xffff },
++	{ 0x0ae, 0xa4, 0, 0xffff },
++	{ 0x0af, 0xa4, 0, 0xffff },
++	{ 0x0b0, 0xa4, 0, 0xffff },
++	{ 0x0b1, 0xa4, 0, 0xffff },
++	{ 0x0b2, 0xa4, 0, 0xffff },
++	{ 0x0b3, 0xa4, 0, 0xffff },
++	{ 0x0b6, 0x00, 0, 0xffff },
++	{ 0x0b7, 0x00, 0, 0xffff },
++	{ 0x0d1, 0xff, 0, 0xffff },
++	{ 0x0d6, 0xff, 0, 0xffff },
++	{ 0x0db, 0xff, 0, 0xffff },
++	{ 0x0ea, 0x64, 0, 0xffff },
++	{ 0x0eb, 0x64, 0, 0xffff },
++	{ 0x0ef, 0xff, 0, 0xffff },
++	{ 0x0f8, 0x15, 0, 0xffff },
++	{ 0x0f9, 0x00, 0, 0xffff },
++	{ 0x0f0, 0x30, 0, 0xffff },
++	{ 0x184, 0xff, 0, 0xffff },
++	{ 0x186, 0xff, 0, 0xffff },
++	{ 0x1a1, 0xce, 0, 0xffff },
++	{ 0x1a2, 0x0c, 0, 0xffff },
++	{ 0x1a3, 0x0c, 0, 0xffff },
++	{ 0x1a6, 0x00, 0, 0xffff },
++	{ 0x1a7, 0x00, 0, 0xffff },
++	{ 0x1a8, 0xa4, 0, 0xffff },
++	{ 0x1a9, 0xa4, 0, 0xffff },
++	{ 0x1ab, 0x2d, 0, 0xffff },
++	{ 0x1ac, 0x2d, 0, 0xffff },
++	{ 0x1b1, 0x00, 0, 0xffff },
++	{ 0x1bb, 0x00, 0, 0xffff },
++	{ 0x1bc, 0x00, 0, 0xffff },
++	{ 0x1bd, 0x00, 0, 0xffff },
++	{ 0x1be, 0x01, 0, 0xffff },
++	{ 0x1bf, 0x01, 0, 0xffff },
++	{ 0x1c0, 0x01, 0, 0xffff },
++	{ 0x1c1, 0x01, 0, 0xffff },
++	{ 0x1c2, 0x01, 0, 0xffff },
++	{ 0x280, 0x00, 0, 0xffff },
++	{ 0x281, 0x00, 0, 0xffff },
++	{ 0x282, 0x03, 0, 0xffff },
++	{ 0x283, 0x0a, 0, 0xffff },
++	{ 0x284, 0x80, 0, 0xffff },
++	{ 0x285, 0x03, 0, 0xffff },
++	{ 0x040, 0x01, 0, 0xffff },
++};
++
++static const struct hwm_tab_entry HWM_TAB_SFF[] = {
++	{ 0x019, 0x2f, 0, 0xffff },
++	{ 0x040, 0x01, 0, 0xffff },
++	{ 0x072, 0x03, 0, 0xffff },
++	{ 0x075, 0x06, 0, 0xffff },
++	{ 0x07c, 0x00, 0, 0xffff },
++	{ 0x080, 0x00, 0, 0xffff },
++	{ 0x081, 0x00, 0, 0xffff },
++	{ 0x083, 0xbb, 0, 0xffff },
++	{ 0x085, 0x59, 0, 0xffff },
++	{ 0x086, 0x6a, 0, 0xffff },
++	{ 0x087, 0xc0, 0, 0xffff },
++	{ 0x08a, 0x33, 0, 0xffff },
++	{ 0x090, 0x77, 0, 0xffff },
++	{ 0x091, 0x66, 0, 0xffff },
++	{ 0x092, 0x94, 0, 0xffff },
++	{ 0x093, 0x90, 0, 0xffff },
++	{ 0x094, 0x68, 0, 0xffff },
++	{ 0x096, 0xa4, 0, 0xffff },
++	{ 0x097, 0xa4, 0, 0xffff },
++	{ 0x098, 0xa4, 0, 0xffff },
++	{ 0x099, 0xa4, 0, 0xffff },
++	{ 0x09a, 0xa4, 0, 0xffff },
++	{ 0x09b, 0xa4, 0, 0xffff },
++	{ 0x0a0, 0x3e, 0, 0xffff },
++	{ 0x0ae, 0x86, 0, 0xffff },
++	{ 0x0af, 0x86, 0, 0xffff },
++	{ 0x0b0, 0xa4, 0, 0xffff },
++	{ 0x0b1, 0xa4, 0, 0xffff },
++	{ 0x0b2, 0x90, 0, 0xffff },
++	{ 0x0b6, 0x48, 0, 0xffff },
++	{ 0x0b7, 0x48, 0, 0xffff },
++	{ 0x0ea, 0x64, 0, 0xffff },
++	{ 0x0f0, 0x30, 0, 0xffff },
++	{ 0x1b1, 0x48, 0, 0xffff },
++	{ 0x1b8, 0x00, 0, 0xffff },
++	{ 0x1be, 0x95, 0, 0xffff },
++	{ 0x1c1, 0x90, 0, 0xffff },
++	{ 0x1c6, 0x00, 0, 0xffff },
++	{ 0x1c9, 0x00, 0, 0xffff },
++	{ 0x280, 0x68, 0, 0xffff },
++	{ 0x281, 0x10, 0, 0xffff },
++	{ 0x282, 0x03, 0, 0xffff },
++	{ 0x283, 0x0a, 0, 0xffff },
++	{ 0x284, 0x80, 0, 0xffff },
++	{ 0x285, 0x03, 0, 0xffff}
++};
++
++static const struct hwm_tab_entry HWM_TAB_MT[] = {
++	{ 0x005, 0x33, 0, 0xffff },
++	{ 0x018, 0x2f, 0, 0xffff },
++	{ 0x019, 0x2f, 0, 0xffff },
++	{ 0x01a, 0x2f, 0, 0xffff },
++	{ 0x080, 0x00, 0, 0xffff },
++	{ 0x081, 0x00, 0, 0xffff },
++	{ 0x082, 0x80, 0, 0xffff },
++	{ 0x083, 0xbb, 0, 0xffff },
++	{ 0x085, 0xb9, 0, 0x0010 },
++	{ 0x086, 0xac, 0, 0x0010 },
++	{ 0x087, 0x87, 0, 0x0010 },
++	{ 0x08a, 0x51, 0, 0x0010 },
++	{ 0x08b, 0x39, 0, 0x0010 },
++	{ 0x090, 0x78, 0, 0xffff },
++	{ 0x091, 0x6a, 0, 0xffff },
++	{ 0x092, 0x8f, 0, 0xffff },
++	{ 0x094, 0x68, 0, 0xffff },
++	{ 0x095, 0x5b, 0, 0xffff },
++	{ 0x096, 0x92, 0, 0xffff },
++	{ 0x097, 0x86, 0, 0xffff },
++	{ 0x098, 0xa4, 0, 0xffff },
++	{ 0x09a, 0x8b, 0, 0xffff },
++	{ 0x0a0, 0x0a, 0, 0xffff },
++	{ 0x0a1, 0x26, 0, 0xffff },
++	{ 0x0a2, 0xd1, 0, 0xffff },
++	{ 0x0ae, 0x7c, 0, 0xffff },
++	{ 0x0af, 0x7c, 0, 0xffff },
++	{ 0x0b0, 0x9a, 0, 0xffff },
++	{ 0x0b3, 0x7c, 0, 0xffff },
++	{ 0x0b6, 0x08, 0, 0xffff },
++	{ 0x0b7, 0x00, 0, 0xffff },
++	{ 0x0ea, 0x64, 0, 0xffff },
++	{ 0x0ef, 0xff, 0, 0xffff },
++	{ 0x0f8, 0x15, 0, 0xffff },
++	{ 0x0f9, 0x00, 0, 0xffff },
++	{ 0x0f0, 0x30, 0, 0xffff },
++	{ 0x0fd, 0x01, 0, 0xffff },
++	{ 0x1a1, 0x99, 0, 0xffff },
++	{ 0x1a2, 0x00, 0, 0xffff },
++	{ 0x1a4, 0x00, 0, 0xffff },
++	{ 0x1b1, 0x00, 0, 0xffff },
++	{ 0x1be, 0x90, 0, 0xffff },
++	{ 0x280, 0xc4, 0, 0xffff },
++	{ 0x281, 0x09, 0, 0xffff },
++	{ 0x282, 0x0a, 0, 0xffff },
++	{ 0x283, 0x14, 0, 0xffff },
++	{ 0x284, 0x01, 0, 0xffff },
++	{ 0x285, 0x01, 0, 0xffff },
++	{ 0x288, 0x94, 0, 0xffff },
++	{ 0x289, 0x11, 0, 0xffff },
++	{ 0x28a, 0x0a, 0, 0xffff },
++	{ 0x28b, 0x14, 0, 0xffff },
++	{ 0x28c, 0x01, 0, 0xffff },
++	{ 0x28d, 0x01, 0, 0xffff },
++	{ 0x294, 0x24, 0, 0xffff },
++};
++
++static uint8_t get_temp_target(void)
 +{
++	uint8_t val = rdmsr(0x1a2).lo >> 8 & 0xff;
++	if (!val)
++		val = 20;
++	return 0x95 - val;
 +}
 +
-+struct chip_operations mainboard_ops = {
-+	.init = init_mainboard,
-+};
++static uint16_t get_pkg_power(void)
++{
++	const unsigned int pkg_power = rdmsr(0x614).lo & 0x7fff;
++	const unsigned int power_unit = 1 << (rdmsr(0x606).lo & 0xf);
++	if (pkg_power / power_unit > 65)
++		return 32;
++	else
++		return 16;
++}
++
++static uint8_t get_core_cnt(void)
++{
++	// Intel describes this CPUID field as:
++	// > Maximum number of addressable IDs for processor cores in the physical package
++	if (cpuid(0).eax >= 4)
++		return cpuid_ext(4, 0).eax >> 26;
++	return 0;
++}
++
++static void apply_hwm_tab(const struct hwm_tab_entry *arr, size_t size)
++{
++	uint8_t temp_target = get_temp_target();
++	uint16_t pkg_power = get_pkg_power();
++
++	printk(BIOS_DEBUG, "Temp target = %#x\n", temp_target);
++	printk(BIOS_DEBUG, "Package power = %#x\n", pkg_power);
++
++	for (size_t i = 0; i < size; ++i) {
++		// Skip entry if it doesn't apply for this package power
++		if (arr[i].pkg_power != pkg_power &&
++		    arr[i].pkg_power != HWM_TAB_PKG_POWER_ANY)
++			continue;
++
++		uint8_t val = arr[i].val;
++
++		// Add temp target to value if requested (current tables never do)
++		if (arr[i].flags & HWM_TAB_ADD_TEMP_TARGET)
++			val += temp_target;
++
++		// Perform write
++		sch5555_mbox_write(1, arr[i].addr, val);
++
++	}
++}
++
++static void sch5555_ec_hwm_init(void *arg)
++{
++	uint8_t form_fac_id, saved_2fc, core_cnt;
++
++	printk(BIOS_DEBUG, "OptiPlex 3050 late HWM init\n");
++
++	form_fac_id = gpio_get(GPP_G2) | gpio_get(GPP_G3) << 1;
++	printk(BIOS_DEBUG, "Form Factor ID = %#x\n", form_fac_id);
++
++	saved_2fc = sch5555_mbox_read(1, 0x2fc);
++	sch5555_mbox_write(1, 0x2fc, 0xa0);
++	sch5555_mbox_write(1, 0x2fd, 0x32);
++
++	switch (form_fac_id) {
++	case FORM_FACTOR_MICRO:
++		// CPU stepping <= 3
++		if ((cpuid(1).eax & 0xf) <= 3)
++			apply_hwm_tab(HWM_TAB_MICRO_EARLY_STEPPING, ARRAY_SIZE(HWM_TAB_MICRO_EARLY_STEPPING));
++		// Tjunction == 80
++		else if ((rdmsr(0x1a2).lo >> 16 & 0xff) == 80)
++			apply_hwm_tab(HWM_TAB_MICRO_TEMP80, ARRAY_SIZE(HWM_TAB_MICRO_TEMP80));
++		else
++			apply_hwm_tab(HWM_TAB_MICRO_BASE, ARRAY_SIZE(HWM_TAB_MICRO_BASE));
++		break;
++	case FORM_FACTOR_SFF:
++		apply_hwm_tab(HWM_TAB_SFF, ARRAY_SIZE(HWM_TAB_SFF));
++		break;
++	default:
++		apply_hwm_tab(HWM_TAB_MT, ARRAY_SIZE(HWM_TAB_MT));
++		break;
++	}
++
++	core_cnt = get_core_cnt();
++	printk(BIOS_DEBUG, "CPU Core Count = %#x\n", core_cnt);
++	if (get_core_cnt() > 2) {
++		sch5555_mbox_write(1, 0x9e, 0x30);
++		sch5555_mbox_write(1, 0xeb, sch5555_mbox_read(1, 0xea));
++	}
++
++	sch5555_mbox_write(1, 0x2fc, saved_2fc);
++	sch5555_mbox_read(1, 0xb8);
++}
++
++BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL);
 diff --git a/src/mainboard/dell/optiplex_3050/romstage.c b/src/mainboard/dell/optiplex_3050/romstage.c
 new file mode 100644
 index 0000000000..a4734e5d61
diff --git a/config/coreboot/default/patches/0062-mb-dell-Convert-E6400-into-a-variant.patch b/config/coreboot/default/patches/0062-mb-dell-Convert-E6400-into-a-variant.patch
index 2b705719..acd7074c 100644
--- a/config/coreboot/default/patches/0062-mb-dell-Convert-E6400-into-a-variant.patch
+++ b/config/coreboot/default/patches/0062-mb-dell-Convert-E6400-into-a-variant.patch
@@ -1,7 +1,7 @@
-From e74fe3cf69a9c44b226359814f0c177090e5a56c Mon Sep 17 00:00:00 2001
+From 0caa5d97b67b2acf571e4fab2b7f85ef3d3a7260 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Thu, 26 Sep 2024 19:48:26 -0600
-Subject: [PATCH 62/63] mb/dell: Convert E6400 into a variant
+Subject: [PATCH 62/65] mb/dell: Convert E6400 into a variant
 
 All the GM45 Dell Latitudes should be nearly identical, so convert the
 E6400 port into a variant so that future ports for the other systems can
@@ -239,5 +239,5 @@ index 0000000000..acc34a2252
 +	end
 +end
 -- 
-2.46.1
+2.39.5
 
diff --git a/config/coreboot/default/patches/0063-mb-dell-gm45_latitudes-Add-E4300-variant.patch b/config/coreboot/default/patches/0063-mb-dell-gm45_latitudes-Add-E4300-variant.patch
index 5cf3ea57..1e76adfe 100644
--- a/config/coreboot/default/patches/0063-mb-dell-gm45_latitudes-Add-E4300-variant.patch
+++ b/config/coreboot/default/patches/0063-mb-dell-gm45_latitudes-Add-E4300-variant.patch
@@ -1,7 +1,7 @@
-From f8c8ab28f22c90e4104b272cb33c890d6fa1e940 Mon Sep 17 00:00:00 2001
+From bc9836ac2708687dfe43656adba2833493fa4199 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Thu, 26 Sep 2024 19:51:25 -0600
-Subject: [PATCH 63/63] mb/dell/gm45_latitudes: Add E4300 variant
+Subject: [PATCH 63/65] mb/dell/gm45_latitudes: Add E4300 variant
 
 Change-Id: I0f2059501b11be103187e3ce1a7c04ab85ae63d2
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
@@ -328,5 +328,5 @@ index 0000000000..20dfa245fb
 +	end
 +end
 -- 
-2.46.1
+2.39.5
 
diff --git a/config/coreboot/default/patches/0064-dell-optiplex_3050-add-hda_verb.c.patch b/config/coreboot/default/patches/0064-dell-optiplex_3050-add-hda_verb.c.patch
index d1427e22..df9accf8 100644
--- a/config/coreboot/default/patches/0064-dell-optiplex_3050-add-hda_verb.c.patch
+++ b/config/coreboot/default/patches/0064-dell-optiplex_3050-add-hda_verb.c.patch
@@ -1,7 +1,7 @@
-From 6731fef7759f4c67a6d0e85d16de9d99302c9b49 Mon Sep 17 00:00:00 2001
+From 782562bca3d9904e1e34f2cc6089876412b276cd Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 6 Oct 2024 17:25:27 +0100
-Subject: [PATCH 1/1] dell/optiplex_3050: add hda_verb.c
+Subject: [PATCH 64/65] dell/optiplex_3050: add hda_verb.c
 
 Configured for the line jack at the front of the machine.
 
@@ -10,16 +10,16 @@ Based on dumps from the vendor BIOS.
 Signed-off-by: Leah Rowe <info@minifree.org>
 ---
  src/mainboard/dell/optiplex_3050/Kconfig     |  1 +
- src/mainboard/dell/optiplex_3050/Makefile.mk |  2 +
+ src/mainboard/dell/optiplex_3050/Makefile.mk |  3 +-
  src/mainboard/dell/optiplex_3050/hda_verb.c  | 90 ++++++++++++++++++++
- 3 files changed, 93 insertions(+)
+ 3 files changed, 93 insertions(+), 1 deletion(-)
  create mode 100644 src/mainboard/dell/optiplex_3050/hda_verb.c
 
 diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
-index 763acda0b2..777e29745a 100644
+index 2f0dccb98d..eab6034158 100644
 --- a/src/mainboard/dell/optiplex_3050/Kconfig
 +++ b/src/mainboard/dell/optiplex_3050/Kconfig
-@@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS
+@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
  	select SKYLAKE_SOC_PCH_H
  	select SOC_INTEL_KABYLAKE
  	select SUPERIO_SMSC_SCH555x
@@ -28,14 +28,15 @@ index 763acda0b2..777e29745a 100644
  config CBFS_SIZE
  	default 0x900000
 diff --git a/src/mainboard/dell/optiplex_3050/Makefile.mk b/src/mainboard/dell/optiplex_3050/Makefile.mk
-index c078124332..1e2626967a 100644
+index d50ea40879..90b3cc4c48 100644
 --- a/src/mainboard/dell/optiplex_3050/Makefile.mk
 +++ b/src/mainboard/dell/optiplex_3050/Makefile.mk
-@@ -6,4 +6,6 @@ bootblock-y += sch5555_ec.c
+@@ -5,5 +5,6 @@ bootblock-y += sch5555_ec.c
+ 
  romstage-y += romstage.c
  
- ramstage-y += ramstage.c
-+ramstage-y += hda_verb.c
+-ramstage-y += ramstage.c sch5555_ec.c
++ramstage-y += ramstage.c sch5555_ec.c hda_verb.c
 +
  ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
 diff --git a/src/mainboard/dell/optiplex_3050/hda_verb.c b/src/mainboard/dell/optiplex_3050/hda_verb.c
diff --git a/config/coreboot/default/patches/0065-dell-optiplex_3050-Add-data.vbt.patch b/config/coreboot/default/patches/0065-dell-optiplex_3050-Add-data.vbt.patch
index 5cf44884..7c4fa56b 100644
--- a/config/coreboot/default/patches/0065-dell-optiplex_3050-Add-data.vbt.patch
+++ b/config/coreboot/default/patches/0065-dell-optiplex_3050-Add-data.vbt.patch
@@ -1,7 +1,7 @@
-From bfce6c7e9464daa2756e34678d27e38946162132 Mon Sep 17 00:00:00 2001
+From 60de0b27075ef9cc8339896e769e4231a43ceeea Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 6 Oct 2024 23:48:05 +0100
-Subject: [PATCH 1/1] dell/optiplex_3050: Add data.vbt
+Subject: [PATCH 65/65] dell/optiplex_3050: Add data.vbt
 
 Signed-off-by: Leah Rowe <info@minifree.org>
 ---
@@ -11,10 +11,10 @@ Signed-off-by: Leah Rowe <info@minifree.org>
  create mode 100644 src/mainboard/dell/optiplex_3050/data.vbt
 
 diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
-index 777e29745a..c978626d55 100644
+index eab6034158..523a160ae3 100644
 --- a/src/mainboard/dell/optiplex_3050/Kconfig
 +++ b/src/mainboard/dell/optiplex_3050/Kconfig
-@@ -19,6 +19,8 @@ config BOARD_SPECIFIC_OPTIONS
+@@ -17,6 +17,8 @@ config BOARD_SPECIFIC_OPTIONS
  	select SOC_INTEL_KABYLAKE
  	select SUPERIO_SMSC_SCH555x
  	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
@@ -23,7 +23,7 @@ index 777e29745a..c978626d55 100644
  
  config CBFS_SIZE
  	default 0x900000
-@@ -29,6 +31,9 @@ config MAINBOARD_DIR
+@@ -27,6 +29,9 @@ config MAINBOARD_DIR
  config MAINBOARD_PART_NUMBER
  	default "OptiPlex 3050 Micro"
  
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
index 1cc8edf7..a6d11f3f 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
@@ -140,7 +140,6 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
 CONFIG_USE_PM_ACPI_TIMER=y
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
@@ -606,8 +605,6 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
 CONFIG_DRIVERS_MTK_WIFI=y
@@ -632,10 +629,6 @@ CONFIG_DRIVERS_MTK_WIFI=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
-# CONFIG_TPM2 is not set
-CONFIG_MAINBOARD_HAS_TPM2=y
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
index c34727d8..7e1bc8d6 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
@@ -138,7 +138,6 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
 CONFIG_USE_PM_ACPI_TIMER=y
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
@@ -602,8 +601,6 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 CONFIG_DRIVERS_MC146818=y
 # CONFIG_USE_PC_CMOS_ALTCENTURY is not set
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
@@ -629,10 +626,6 @@ CONFIG_DRIVERS_MTK_WIFI=y
 # Trusted Platform Module
 #
 CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
-# CONFIG_TPM2 is not set
-CONFIG_MAINBOARD_HAS_TPM2=y
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2

From d8ac9d53b66a3a940962945c4102f1fcd644cde1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 27 Oct 2024 01:12:56 +0100
Subject: [PATCH 0852/1549] Switch Dell 3050 Micro to newer coreboot revision

Specifically, use the same revision that Mate used in patchset 15.

This will ensure that any issues are *not* caused by the coreboot
revision; this is being done, because the old coreboot revision was
from July, but patchset 15 from Mate is based on a September revision
of coreboot.

I've been eliminating as many variables as possible, trying to fix
SeaBIOS payload on this machine, because it hangs in Libreboot, but
not when building from gerrit directly, which means the coreboot
revision may be a factor (since I'm using his patches on an older
revision so upstream might have made some changes since then that
the port relies on).

For this, a new coreboot tree is used, called "dell7", referring to
the fact that Kabylake is Intel's 7th generation.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              |  40 ++--
 .../config/libgfxinit_txtmode                 |  36 ++--
 .../dell3050micro_fsp_16mb/target.cfg         |   4 +-
 .../0001-WIP-OptiPlex-3050-Micro-port.patch}  |   4 +-
 ...2-dell-optiplex_3050-add-hda_verb.c.patch} |   4 +-
 ...003-dell-optiplex_3050-Add-data.vbt.patch} |   4 +-
 ...or-coreboot-images-built-without-a-p.patch |  39 ++++
 config/coreboot/dell7/target.cfg              |   2 +
 .../config/libgfxinit_txtmode                 |   1 -
 .../config/libgfxinit_corebootfb              |   1 -
 .../config/libgfxinit_txtmode                 |   1 -
 .../config/libgfxinit_corebootfb              |   1 -
 .../config/libgfxinit_txtmode                 |   1 -
 .../e4300_4mb/config/libgfxinit_corebootfb    |   1 -
 .../e4300_4mb/config/libgfxinit_txtmode       |   1 -
 .../e5420_6mb/config/libgfxinit_corebootfb    |   1 -
 .../e5420_6mb/config/libgfxinit_txtmode       |   1 -
 .../e5520_6mb/config/libgfxinit_corebootfb    |   1 -
 .../e5520_6mb/config/libgfxinit_txtmode       |   1 -
 .../e5530_12mb/config/libgfxinit_corebootfb   |   1 -
 .../e5530_12mb/config/libgfxinit_txtmode      |   1 -
 .../e6220_10mb/config/libgfxinit_corebootfb   |   1 -
 .../e6220_10mb/config/libgfxinit_txtmode      |   1 -
 .../e6230_12mb/config/libgfxinit_corebootfb   |   1 -
 .../e6230_12mb/config/libgfxinit_txtmode      |   1 -
 .../e6320_10mb/config/libgfxinit_corebootfb   |   1 -
 .../e6320_10mb/config/libgfxinit_txtmode      |   1 -
 .../e6330_12mb/config/libgfxinit_corebootfb   |   1 -
 .../e6330_12mb/config/libgfxinit_txtmode      |   1 -
 .../e6400_4mb/config/libgfxinit_corebootfb    |   1 -
 .../e6400_4mb/config/libgfxinit_txtmode       |   1 -
 config/coreboot/e6400nvidia_4mb/config/normal |   1 -
 .../e6420_10mb/config/libgfxinit_corebootfb   |   1 -
 .../e6420_10mb/config/libgfxinit_txtmode      |   1 -
 .../e6430_12mb/config/libgfxinit_corebootfb   |   1 -
 .../e6430_12mb/config/libgfxinit_txtmode      |   1 -
 .../e6520_10mb/config/libgfxinit_corebootfb   |   1 -
 .../e6520_10mb/config/libgfxinit_txtmode      |   1 -
 .../e6530_12mb/config/libgfxinit_corebootfb   |   1 -
 .../e6530_12mb/config/libgfxinit_txtmode      |   1 -
 .../t1650_12mb/config/libgfxinit_txtmode      |   1 -
 .../acpica-unix-20230628.tar.gz/module.cfg    |   3 +
 .../dell7/binutils-2.43.1.tar.xz/module.cfg   |   3 +
 .../submodule/coreboot/dell7/fsp/module.cfg   |   3 +
 .../dell7/gcc-14.2.0.tar.xz/module.cfg        |   3 +
 .../dell7/gmp-6.3.0.tar.xz/module.cfg         |   3 +
 .../coreboot/dell7/intel-microcode/module.cfg |   3 +
 .../coreboot/dell7/libgfxinit/module.cfg      |   3 +
 ...lls.adb-Make-reference-clock-frequen.patch |  42 +++++
 .../coreboot/dell7/libhwbase/module.cfg       |   3 +
 config/submodule/coreboot/dell7/module.list   |  12 ++
 .../dell7/mpc-1.3.1.tar.gz/module.cfg         |   3 +
 .../dell7/mpfr-4.2.1.tar.xz/module.cfg        |   3 +
 .../dell7/nasm-2.16.03.tar.bz2/module.cfg     |   3 +
 .../submodule/coreboot/dell7/vboot/module.cfg |   3 +
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch | 178 ++++++++++++++++++
 56 files changed, 369 insertions(+), 65 deletions(-)
 rename config/coreboot/{default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch => dell7/patches/0001-WIP-OptiPlex-3050-Micro-port.patch} (99%)
 rename config/coreboot/{default/patches/0064-dell-optiplex_3050-add-hda_verb.c.patch => dell7/patches/0002-dell-optiplex_3050-add-hda_verb.c.patch} (97%)
 rename config/coreboot/{default/patches/0065-dell-optiplex_3050-Add-data.vbt.patch => dell7/patches/0003-dell-optiplex_3050-Add-data.vbt.patch} (96%)
 create mode 100644 config/coreboot/dell7/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch
 create mode 100644 config/coreboot/dell7/target.cfg
 create mode 100644 config/submodule/coreboot/dell7/acpica-unix-20230628.tar.gz/module.cfg
 create mode 100644 config/submodule/coreboot/dell7/binutils-2.43.1.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/dell7/fsp/module.cfg
 create mode 100644 config/submodule/coreboot/dell7/gcc-14.2.0.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/dell7/gmp-6.3.0.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/dell7/intel-microcode/module.cfg
 create mode 100644 config/submodule/coreboot/dell7/libgfxinit/module.cfg
 create mode 100644 config/submodule/coreboot/dell7/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
 create mode 100644 config/submodule/coreboot/dell7/libhwbase/module.cfg
 create mode 100644 config/submodule/coreboot/dell7/module.list
 create mode 100644 config/submodule/coreboot/dell7/mpc-1.3.1.tar.gz/module.cfg
 create mode 100644 config/submodule/coreboot/dell7/mpfr-4.2.1.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/dell7/nasm-2.16.03.tar.bz2/module.cfg
 create mode 100644 config/submodule/coreboot/dell7/vboot/module.cfg
 create mode 100644 config/submodule/coreboot/dell7/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch

diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
index a6d11f3f..1a04eaf7 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
@@ -10,9 +10,9 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
@@ -57,6 +57,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +69,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,12 +77,14 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
 # CONFIG_VENDOR_MSI is not set
@@ -124,14 +128,18 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 # CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
@@ -141,9 +149,8 @@ CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_USE_PM_ACPI_TIMER=y
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
-# CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_3050=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
@@ -161,15 +168,14 @@ CONFIG_BOARD_DELL_OPTIPLEX_3050=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=256
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfef00000
 CONFIG_DCACHE_RAM_SIZE=0x40000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
+# CONFIG_USE_LEGACY_8254_TIMER is not set
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
@@ -179,9 +185,7 @@ CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
-# CONFIG_USE_LEGACY_8254_TIMER is not set
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
 # CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PS2K_EISAID="PNP0303"
@@ -260,10 +264,13 @@ CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
 CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
 CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
 CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_FSP_PUBLISH_MBP_HOB=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
 CONFIG_MAX_HECI_DEVICES=5
 CONFIG_BOOTBLOCK_IN_CBFS=y
 CONFIG_HAVE_PAM0_REGISTER=y
@@ -372,6 +379,8 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
 CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
 CONFIG_SA_ENABLE_DPR=y
+CONFIG_HAVE_CAPID_A_REGISTER=y
+CONFIG_HAVE_BDSM_BGSM_REGISTER=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
@@ -498,6 +507,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -520,6 +532,11 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y
+# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set
+# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set
+# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -548,6 +565,7 @@ CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_SETTINGS_PROTECT=y
@@ -582,13 +600,12 @@ CONFIG_FSP_T_RESERVED_SIZE=0x0
 CONFIG_FSP_M_XIP=y
 CONFIG_HAVE_FSP_LOGO_SUPPORT=y
 CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
-CONFIG_FSP_STATUS_GLOBAL_RESET_REQUIRED_3=y
-CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
 CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
 CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
 CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
 # CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
 # CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
@@ -763,7 +780,6 @@ CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 CONFIG_HAVE_DEBUG_GPIO=y
 # CONFIG_DEBUG_GPIO is not set
 # CONFIG_DEBUG_CBFS is not set
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
index 7e1bc8d6..529cdd56 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
@@ -10,9 +10,9 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
@@ -57,6 +57,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +69,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,12 +77,14 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
 # CONFIG_VENDOR_MSI is not set
@@ -122,14 +126,18 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 # CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
@@ -139,9 +147,8 @@ CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 CONFIG_USE_PM_ACPI_TIMER=y
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
-# CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_3050=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
@@ -159,15 +166,14 @@ CONFIG_BOARD_DELL_OPTIPLEX_3050=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=256
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfef00000
 CONFIG_DCACHE_RAM_SIZE=0x40000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
+# CONFIG_USE_LEGACY_8254_TIMER is not set
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
@@ -177,9 +183,7 @@ CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
-# CONFIG_USE_LEGACY_8254_TIMER is not set
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
 # CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PS2K_EISAID="PNP0303"
@@ -258,10 +262,13 @@ CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
 CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
 CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
 CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
 CONFIG_INTEL_GMA_BCLV_WIDTH=16
 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
 CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_FSP_PUBLISH_MBP_HOB=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
 CONFIG_MAX_HECI_DEVICES=5
 CONFIG_BOOTBLOCK_IN_CBFS=y
 CONFIG_HAVE_PAM0_REGISTER=y
@@ -370,6 +377,8 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
 CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
 CONFIG_SA_ENABLE_DPR=y
+CONFIG_HAVE_CAPID_A_REGISTER=y
+CONFIG_HAVE_BDSM_BGSM_REGISTER=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
@@ -496,6 +505,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -516,6 +528,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -544,6 +557,7 @@ CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_DRIVERS_EFI_FW_INFO is not set
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_SETTINGS_PROTECT=y
@@ -578,13 +592,12 @@ CONFIG_FSP_T_RESERVED_SIZE=0x0
 CONFIG_FSP_M_XIP=y
 CONFIG_HAVE_FSP_LOGO_SUPPORT=y
 CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
-CONFIG_FSP_STATUS_GLOBAL_RESET_REQUIRED_3=y
-CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
 CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
 CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
 CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
 # CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
 CONFIG_INTEL_GMA_ACPI=y
 CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
 # CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
@@ -760,7 +773,6 @@ CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 CONFIG_HAVE_DEBUG_GPIO=y
 # CONFIG_DEBUG_GPIO is not set
 # CONFIG_DEBUG_CBFS is not set
diff --git a/config/coreboot/dell3050micro_fsp_16mb/target.cfg b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
index 12448aa7..b45300e9 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/target.cfg
+++ b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
@@ -1,4 +1,4 @@
-tree="default"
+tree="dell7"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
@@ -9,4 +9,4 @@ vcfg="3050micro"
 build_depend="seabios/default grub/xhci memtest86plus"
 IFD_platform="sklkbl"
 grubname="fallback/payload" # make GRUB the primary payload on this board
-seabiosname="seabios.elf" # this actually disables the seabios payload
+seabiosname="seabios.elf"
diff --git a/config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch b/config/coreboot/dell7/patches/0001-WIP-OptiPlex-3050-Micro-port.patch
similarity index 99%
rename from config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch
rename to config/coreboot/dell7/patches/0001-WIP-OptiPlex-3050-Micro-port.patch
index a808fb3f..e8a6bcc0 100644
--- a/config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch
+++ b/config/coreboot/dell7/patches/0001-WIP-OptiPlex-3050-Micro-port.patch
@@ -1,7 +1,7 @@
-From 66896f156eaade2c01636ac445cfd47afa6a32cc Mon Sep 17 00:00:00 2001
+From 2d266c50e2062dc202209494e9c1532ce8debd29 Mon Sep 17 00:00:00 2001
 From: Mate Kukri <kukri.mate@gmail.com>
 Date: Thu, 24 Oct 2024 18:05:19 +0100
-Subject: [PATCH 61/65] [WIP] OptiPlex 3050 Micro port
+Subject: [PATCH 1/4] [WIP] OptiPlex 3050 Micro port
 
 - Boots Linux
 - SMSC SCH5553 SIO/EC
diff --git a/config/coreboot/default/patches/0064-dell-optiplex_3050-add-hda_verb.c.patch b/config/coreboot/dell7/patches/0002-dell-optiplex_3050-add-hda_verb.c.patch
similarity index 97%
rename from config/coreboot/default/patches/0064-dell-optiplex_3050-add-hda_verb.c.patch
rename to config/coreboot/dell7/patches/0002-dell-optiplex_3050-add-hda_verb.c.patch
index df9accf8..376a8761 100644
--- a/config/coreboot/default/patches/0064-dell-optiplex_3050-add-hda_verb.c.patch
+++ b/config/coreboot/dell7/patches/0002-dell-optiplex_3050-add-hda_verb.c.patch
@@ -1,7 +1,7 @@
-From 782562bca3d9904e1e34f2cc6089876412b276cd Mon Sep 17 00:00:00 2001
+From 6140f780837726a24d6c473ac50a62fdd5ee8f2d Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 6 Oct 2024 17:25:27 +0100
-Subject: [PATCH 64/65] dell/optiplex_3050: add hda_verb.c
+Subject: [PATCH 2/4] dell/optiplex_3050: add hda_verb.c
 
 Configured for the line jack at the front of the machine.
 
diff --git a/config/coreboot/default/patches/0065-dell-optiplex_3050-Add-data.vbt.patch b/config/coreboot/dell7/patches/0003-dell-optiplex_3050-Add-data.vbt.patch
similarity index 96%
rename from config/coreboot/default/patches/0065-dell-optiplex_3050-Add-data.vbt.patch
rename to config/coreboot/dell7/patches/0003-dell-optiplex_3050-Add-data.vbt.patch
index 7c4fa56b..5ec93c6f 100644
--- a/config/coreboot/default/patches/0065-dell-optiplex_3050-Add-data.vbt.patch
+++ b/config/coreboot/dell7/patches/0003-dell-optiplex_3050-Add-data.vbt.patch
@@ -1,7 +1,7 @@
-From 60de0b27075ef9cc8339896e769e4231a43ceeea Mon Sep 17 00:00:00 2001
+From e8c7028be21084ef2f89140cccb393ca7a0ff327 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 6 Oct 2024 23:48:05 +0100
-Subject: [PATCH 65/65] dell/optiplex_3050: Add data.vbt
+Subject: [PATCH 3/4] dell/optiplex_3050: Add data.vbt
 
 Signed-off-by: Leah Rowe <info@minifree.org>
 ---
diff --git a/config/coreboot/dell7/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/dell7/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch
new file mode 100644
index 00000000..ece00c26
--- /dev/null
+++ b/config/coreboot/dell7/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -0,0 +1,39 @@
+From d7f20d6adf94e6c4736c55e88fcd1c8bde88994a Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 12 May 2023 19:55:15 -0600
+Subject: [PATCH 4/4] Remove warning for coreboot images built without a
+ payload
+
+I added this in upstream to prevent people from accidentally flashing
+roms without a payload resulting in a no boot situation, but in
+libreboot lbmk handles the payload and thus this warning always comes
+up. This has caused confusion and concern so just patch it out.
+---
+ payloads/Makefile.mk | 13 +------------
+ 1 file changed, 1 insertion(+), 12 deletions(-)
+
+diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
+index 5f988dac1b..516133880f 100644
+--- a/payloads/Makefile.mk
++++ b/payloads/Makefile.mk
+@@ -50,16 +50,5 @@ distclean-payloads:
+ print-repo-info-payloads:
+ 	-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
+ 
+-ifeq ($(CONFIG_PAYLOAD_NONE),y)
+-show_notices:: warn_no_payload
+-endif
+-
+-warn_no_payload:
+-	printf "\n\t** WARNING **\n"
+-	printf "coreboot has been built without a payload. Writing\n"
+-	printf "a coreboot image without a payload to your board's\n"
+-	printf "flash chip will result in a non-booting system. You\n"
+-	printf "can use cbfstool to add a payload to the image.\n\n"
+-
+ .PHONY: force-payload coreinfo nvramcui
+-.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
++.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
+-- 
+2.39.5
+
diff --git a/config/coreboot/dell7/target.cfg b/config/coreboot/dell7/target.cfg
new file mode 100644
index 00000000..366f8eff
--- /dev/null
+++ b/config/coreboot/dell7/target.cfg
@@ -0,0 +1,2 @@
+tree="dell7"
+rev="e81fdd74a930b0bf8105816ea115ceaeb99bae1d"
diff --git a/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode b/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
index 3e4ee022..05151e1f 100644
--- a/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
@@ -143,7 +143,6 @@ CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
index 7db6d89e..8d8c5c20 100644
--- a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
@@ -144,7 +144,6 @@ CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
index 831b4b29..231d6e94 100644
--- a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
@@ -142,7 +142,6 @@ CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
index 2c460c4b..8d5ecd79 100644
--- a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
@@ -144,7 +144,6 @@ CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
index 3563bf2c..272c35d5 100644
--- a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
@@ -142,7 +142,6 @@ CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb b/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb
index 43b5e1f5..67021be8 100644
--- a/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb
@@ -141,7 +141,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_E4300=y
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e4300_4mb/config/libgfxinit_txtmode b/config/coreboot/e4300_4mb/config/libgfxinit_txtmode
index 28caa370..e6309b47 100644
--- a/config/coreboot/e4300_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e4300_4mb/config/libgfxinit_txtmode
@@ -139,7 +139,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_E4300=y
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
index af5b8906..3367bc2b 100644
--- a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
@@ -142,7 +142,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 CONFIG_BOARD_DELL_LATITUDE_E5420=y
diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
index 72ebebc1..331dda80 100644
--- a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
@@ -140,7 +140,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 CONFIG_BOARD_DELL_LATITUDE_E5420=y
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
index 911c6b65..f6113581 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
@@ -142,7 +142,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
index eecdfd6c..96bd21fc 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
@@ -140,7 +140,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
index de00bd3b..7702f7bd 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
@@ -142,7 +142,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
index 5bacbb59..fa950439 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
@@ -140,7 +140,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
index 67995fc1..25c27fdb 100644
--- a/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
@@ -142,7 +142,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6220_10mb/config/libgfxinit_txtmode b/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
index 8a51ce95..3a79e7e3 100644
--- a/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
@@ -140,7 +140,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
index c15da3a1..7bc76f82 100644
--- a/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
@@ -142,7 +142,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6230_12mb/config/libgfxinit_txtmode b/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
index db76355a..2d578a57 100644
--- a/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
@@ -140,7 +140,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
index 75af1da9..e6867cd1 100644
--- a/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
@@ -142,7 +142,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6320_10mb/config/libgfxinit_txtmode b/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
index bba8ac91..ca030f32 100644
--- a/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
@@ -140,7 +140,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
index 6b00fa47..bd93e3bf 100644
--- a/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
@@ -142,7 +142,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6330_12mb/config/libgfxinit_txtmode b/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
index b7dedfce..ee4686da 100644
--- a/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
@@ -140,7 +140,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
index 4267793a..84809847 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
@@ -141,7 +141,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 CONFIG_BOARD_DELL_E6400=y
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
index efd7fcef..4b53f9a9 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
@@ -139,7 +139,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 CONFIG_BOARD_DELL_E6400=y
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6400nvidia_4mb/config/normal b/config/coreboot/e6400nvidia_4mb/config/normal
index 455bb78f..79c3790a 100644
--- a/config/coreboot/e6400nvidia_4mb/config/normal
+++ b/config/coreboot/e6400nvidia_4mb/config/normal
@@ -138,7 +138,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 CONFIG_BOARD_DELL_E6400=y
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
index b2cb70fe..f558eefd 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
@@ -142,7 +142,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
index 2ed613a2..2158736b 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
@@ -140,7 +140,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 1f99865c..593d294c 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -142,7 +142,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index 54d89ef4..e9211864 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -140,7 +140,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
index 1eea8822..381b7207 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
@@ -142,7 +142,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
index 3a8fc91c..92d54b1b 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
@@ -140,7 +140,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index 6cfb5add..4345d838 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -142,7 +142,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index ed32a935..d5a2b25b 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -140,7 +140,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index 9761efd6..e7358991 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -143,7 +143,6 @@ CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/submodule/coreboot/dell7/acpica-unix-20230628.tar.gz/module.cfg b/config/submodule/coreboot/dell7/acpica-unix-20230628.tar.gz/module.cfg
new file mode 100644
index 00000000..6dde459a
--- /dev/null
+++ b/config/submodule/coreboot/dell7/acpica-unix-20230628.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20230628.tar.gz"
+subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20230628.tar.gz"
+subhash="d726e69ebd8b8110690e3aff8d1919b43b0a2185efdeb9131ea8d89d321ca3a318a89c721ea740ae366f31ed3d1c11c2906f8807ee8a190e6f67fe5b2023cea4"
diff --git a/config/submodule/coreboot/dell7/binutils-2.43.1.tar.xz/module.cfg b/config/submodule/coreboot/dell7/binutils-2.43.1.tar.xz/module.cfg
new file mode 100644
index 00000000..f3e372a4
--- /dev/null
+++ b/config/submodule/coreboot/dell7/binutils-2.43.1.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.43.1.tar.xz"
+subfile_bkup="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.43.1.tar.xz"
+subhash="20977ad17729141a2c26d358628f44a0944b84dcfefdec2ba029c2d02f40dfc41cc91c0631044560d2bd6f9a51e1f15846b4b311befbe14f1239f14ff7d57824"
diff --git a/config/submodule/coreboot/dell7/fsp/module.cfg b/config/submodule/coreboot/dell7/fsp/module.cfg
new file mode 100644
index 00000000..8042a059
--- /dev/null
+++ b/config/submodule/coreboot/dell7/fsp/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/fsp.git"
+subrepo_bkup="https://github.com/coreboot/fsp"
+subhash="68328e297e195a6cfb1949b60d971c032a172ba3"
diff --git a/config/submodule/coreboot/dell7/gcc-14.2.0.tar.xz/module.cfg b/config/submodule/coreboot/dell7/gcc-14.2.0.tar.xz/module.cfg
new file mode 100644
index 00000000..9a4892f5
--- /dev/null
+++ b/config/submodule/coreboot/dell7/gcc-14.2.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
+subhash="932bdef0cda94bacedf452ab17f103c0cb511ff2cec55e9112fc0328cbf1d803b42595728ea7b200e0a057c03e85626f937012e49a7515bc5dd256b2bf4bc396"
diff --git a/config/submodule/coreboot/dell7/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/dell7/gmp-6.3.0.tar.xz/module.cfg
new file mode 100644
index 00000000..fe274faf
--- /dev/null
+++ b/config/submodule/coreboot/dell7/gmp-6.3.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz"
+subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2"
diff --git a/config/submodule/coreboot/dell7/intel-microcode/module.cfg b/config/submodule/coreboot/dell7/intel-microcode/module.cfg
new file mode 100644
index 00000000..cb6c6d46
--- /dev/null
+++ b/config/submodule/coreboot/dell7/intel-microcode/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/intel-microcode.git"
+subrepo_bkup="https://github.com/coreboot/intel-microcode"
+subhash="fbfe741896c55b36fcbf0560a68be96286103556"
diff --git a/config/submodule/coreboot/dell7/libgfxinit/module.cfg b/config/submodule/coreboot/dell7/libgfxinit/module.cfg
new file mode 100644
index 00000000..1ba41724
--- /dev/null
+++ b/config/submodule/coreboot/dell7/libgfxinit/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libgfxinit.git"
+subrepo_bkup="https://github.com/coreboot/libgfxinit"
+subhash="17cfc92f402493979783585b6581efbd98c0cf07"
diff --git a/config/submodule/coreboot/dell7/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch b/config/submodule/coreboot/dell7/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
new file mode 100644
index 00000000..2d248941
--- /dev/null
+++ b/config/submodule/coreboot/dell7/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
@@ -0,0 +1,42 @@
+From ba078864500de99c26b6ea7e3fdcef19bca582a7 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Mon, 20 May 2024 10:10:03 -0600
+Subject: [PATCH 1/1] g45/hw-gfx-gma-plls.adb: Make reference clock frequency
+ configurable
+
+Instead of assuming a 96 MHz reference clock frequency, use the value
+specified by the new INTEL_GMA_DPLL_REF_FREQ Kconfig. This defaults to
+96 MHz to preserve the existing behavior. An example of where this is
+needed is the DPLL_REF_SSCLK input, which will typically be 100 MHz
+to support LVDS spread spectrum clocking.
+
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ common/g45/hw-gfx-gma-plls.adb | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/common/g45/hw-gfx-gma-plls.adb b/common/g45/hw-gfx-gma-plls.adb
+index 67242f2..5e970d7 100644
+--- a/common/g45/hw-gfx-gma-plls.adb
++++ b/common/g45/hw-gfx-gma-plls.adb
+@@ -12,6 +12,8 @@
+ -- GNU General Public License for more details.
+ --
+ 
++with CB.Config;
++
+ with HW.Time;
+ with HW.GFX.GMA.Config;
+ with HW.GFX.GMA.Registers;
+@@ -460,7 +462,7 @@ is
+               (Display           => Port_Cfg.Display,
+                Target_Dotclock   => Target_Clock,
+                -- should be, but doesn't has to be always the same:
+-               Reference_Clock   => 96_000_000,
++               Reference_Clock   => CB.Config.INTEL_GMA_DPLL_REF_FREQ,
+                Best_Clock        => Clk,
+                Valid             => Success);
+          else
+-- 
+2.39.2
+
diff --git a/config/submodule/coreboot/dell7/libhwbase/module.cfg b/config/submodule/coreboot/dell7/libhwbase/module.cfg
new file mode 100644
index 00000000..2937b8b7
--- /dev/null
+++ b/config/submodule/coreboot/dell7/libhwbase/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libhwbase.git"
+subrepo_bkup="https://github.com/coreboot/libhwbase"
+subhash="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/dell7/module.list b/config/submodule/coreboot/dell7/module.list
new file mode 100644
index 00000000..1cc88fd6
--- /dev/null
+++ b/config/submodule/coreboot/dell7/module.list
@@ -0,0 +1,12 @@
+3rdparty/fsp
+3rdparty/intel-microcode
+3rdparty/libgfxinit
+3rdparty/libhwbase
+3rdparty/vboot
+util/crossgcc/tarballs/binutils-2.43.1.tar.xz
+util/crossgcc/tarballs/gcc-14.2.0.tar.xz
+util/crossgcc/tarballs/gmp-6.3.0.tar.xz
+util/crossgcc/tarballs/mpc-1.3.1.tar.gz
+util/crossgcc/tarballs/mpfr-4.2.1.tar.xz
+util/crossgcc/tarballs/nasm-2.16.03.tar.bz2
+util/crossgcc/tarballs/acpica-unix-20230628.tar.gz
diff --git a/config/submodule/coreboot/dell7/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/dell7/mpc-1.3.1.tar.gz/module.cfg
new file mode 100644
index 00000000..f98b6444
--- /dev/null
+++ b/config/submodule/coreboot/dell7/mpc-1.3.1.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
+subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97"
diff --git a/config/submodule/coreboot/dell7/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/dell7/mpfr-4.2.1.tar.xz/module.cfg
new file mode 100644
index 00000000..3419bc30
--- /dev/null
+++ b/config/submodule/coreboot/dell7/mpfr-4.2.1.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475"
diff --git a/config/submodule/coreboot/dell7/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/dell7/nasm-2.16.03.tar.bz2/module.cfg
new file mode 100644
index 00000000..c98cc71f
--- /dev/null
+++ b/config/submodule/coreboot/dell7/nasm-2.16.03.tar.bz2/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2"
+subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2"
+subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172"
diff --git a/config/submodule/coreboot/dell7/vboot/module.cfg b/config/submodule/coreboot/dell7/vboot/module.cfg
new file mode 100644
index 00000000..917d23fa
--- /dev/null
+++ b/config/submodule/coreboot/dell7/vboot/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/vboot.git"
+subrepo_bkup="https://github.com/coreboot/vboot"
+subhash="f1f70f46dc5482bb7c654e53ed58d4001e386df2"
diff --git a/config/submodule/coreboot/dell7/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/dell7/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
new file mode 100644
index 00000000..1ac41de6
--- /dev/null
+++ b/config/submodule/coreboot/dell7/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
@@ -0,0 +1,178 @@
+From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
+From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
+Date: Thu, 30 May 2024 14:08:33 -0600
+Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
+ vmlinuz_header_{offset,size}
+
+The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
+wrong:
+
+	if (!vmlinuz_header_size ||
+	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+	    kpart_data) {
+		return 1;
+	}
+
+`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
+unless something has overflowed!  And `vmlinuz_header_offset` hasn't even
+been set yet (besides being initialized to zero)!
+
+GCC will deduce that if the check didn't cause the function to bail, then
+vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
+[2GiB,4GiB).
+
+On platforms where size_t is 32-bits, this is *especially* broken.
+memcpy's size argument must be in the range [0,2GiB).  Because GCC has
+proved that vmlinuz_header_size is higher than that, it will fail to
+compile:
+
+	host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
+
+So, fix the check.
+
+I can now say that what I suspect the original author meant to write would
+be the following patch, if `vmlinuz_header_offset` were already set:
+
+	-kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
+	+now        + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
+
+This hypothesis is supported by `now` not getting incremented by
+`kblob_size` the way it is for the keyblock and preamble sizes.
+
+However, we can also see that even this "corrected" bounds check is
+insufficient: it does not detect the vmlinuz_header overflowing into
+kblob_data.
+
+OK, so let's describe the fix:
+
+Have a `*vmlinuz_header` pointer instead of a
+`uint64_t vmlinuz_header_offset`, to be more similar to all the other
+regions.  With this change, the correct check becomes a simple
+
+      vmlinuz_header + vmlinuz_header_size > kblob_data
+
+While we're at it, make some changes that could have helped avoid this in
+the first place:
+
+ - Add comments.
+ - Calculate the vmlinuz_header offset right away, instead of waiting.
+ - Go ahead and increment `now` by `kblob_size`, to increase regularity.
+
+Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
+---
+ host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
+ 1 file changed, 51 insertions(+), 21 deletions(-)
+
+diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
+index 4ccfcf33..d2c09443 100644
+--- a/host/lib/extract_vmlinuz.c
++++ b/host/lib/extract_vmlinuz.c
+@@ -15,16 +15,44 @@
+ 
+ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 		   void **vmlinuz_out, size_t *vmlinuz_size) {
++	// We're going to be extracting `vmlinuz_header` and
++	// `kblob_data`, and returning the concatenation of them.
++	//
++	// kpart_data = +-[kpart_size]------------------------------------+
++	//              |                                                 |
++	//  keyblock  = | +-[keyblock->keyblock_size]-------------------+ |
++	//              | | struct vb2_keyblock          keyblock       | |
++	//              | | char []                      ...data...     | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  preamble  = | +-[preamble->preamble_size]-------------------+ |
++	//              | | struct vb2_kernel_preamble   preamble       | |
++	//              | | char []                       ...data...    | |
++	//              | | char []                      vmlinuz_header | |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  kblob_data= | +-[preamble->body_signature.data_size]--------+ |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//              +-------------------------------------------------+
++
+ 	size_t now = 0;
++	// The 3 sections of kpart_data.
++	struct vb2_keyblock *keyblock = NULL;
+ 	struct vb2_kernel_preamble *preamble = NULL;
+ 	uint8_t *kblob_data = NULL;
+ 	uint32_t kblob_size = 0;
++	// vmlinuz_header
++	uint8_t *vmlinuz_header = NULL;
+ 	uint32_t vmlinuz_header_size = 0;
+-	uint64_t vmlinuz_header_address = 0;
+-	uint64_t vmlinuz_header_offset = 0;
++	// The concatenated result.
+ 	void *vmlinuz = NULL;
+ 
+-	struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
++	// Isolate the 3 sections of kpart_data.
++
++	keyblock = (struct vb2_keyblock *)kpart_data;
+ 	now += keyblock->keyblock_size;
+ 	if (now > kpart_size)
+ 		return 1;
+@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 
+ 	kblob_data = kpart_data + now;
+ 	kblob_size = preamble->body_signature.data_size;
+-
+-	if (!kblob_data || (now + kblob_size) > kpart_size)
++	now += kblob_size;
++	if (now > kpart_size)
+ 		return 1;
+ 
++	// Find `vmlinuz_header` within `preamble`.
++
+ 	if (preamble->header_version_minor > 0) {
+-		vmlinuz_header_address = preamble->vmlinuz_header_address;
++		// calculate the vmlinuz_header offset from
++		// the beginning of the kpart_data.  The kblob doesn't
++		// include the body_load_offset, but does include
++		// the keyblock and preamble sections.
++		size_t vmlinuz_header_offset =
++			preamble->vmlinuz_header_address -
++			preamble->body_load_address +
++			keyblock->keyblock_size +
++			preamble->preamble_size;
++
++		vmlinuz_header = kpart_data + vmlinuz_header_offset;
+ 		vmlinuz_header_size = preamble->vmlinuz_header_size;
+ 	}
+ 
+-	if (!vmlinuz_header_size ||
+-	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+-	    kpart_data) {
++	if (!vmlinuz_header ||
++	    !vmlinuz_header_size ||
++	    vmlinuz_header + vmlinuz_header_size > kblob_data) {
+ 		return 1;
+ 	}
+ 
+-	// calculate the vmlinuz_header offset from
+-	// the beginning of the kpart_data.  The kblob doesn't
+-	// include the body_load_offset, but does include
+-	// the keyblock and preamble sections.
+-	vmlinuz_header_offset = vmlinuz_header_address -
+-		preamble->body_load_address +
+-		keyblock->keyblock_size +
+-		preamble->preamble_size;
++	// Concatenate and return.
+ 
+ 	vmlinuz = malloc(vmlinuz_header_size + kblob_size);
+ 	if (vmlinuz == NULL)
+ 		return 1;
+-
+-	memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
+-	       vmlinuz_header_size);
+-
++	memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
+ 	memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
+ 
+ 	*vmlinuz_out = vmlinuz;
+-- 
+2.45.1
+

From b257662e55c7904b0d6f50ad688a5b8423503604 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sat, 26 Oct 2024 20:55:18 -0600
Subject: [PATCH 0853/1549] config/coreboot/default: Update MEC5035 patches

- Update the MEC5035 S3 patches to the versions that were sent upstream
  to prevent conflicts with subsequent patches for that EC.
- Update the patch that enables the S3 SMI handler in mainboard code so
  that all Latitudes use the handler.
- Add a new patch that tells the EC to route power button events to the
  host so that the OS can decide what to do. Without it, the EC powers
  off the system without letting the OS cleanly shut down.

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
 ...l-mec5035-Replace-defines-with-enums.patch | 91 ++++++++++++++++++
 ...-mec5035-Add-S3-suspend-SMI-handler.patch} | 74 ++++++++++-----
 ...S3-SMI-handler-for-SNB-IVB-Latitudes.patch | 31 -------
 ...dd-S3-SMI-handler-for-Dell-Latitudes.patch | 70 ++++++++++++++
 ...035-Route-power-button-event-to-host.patch | 92 +++++++++++++++++++
 5 files changed, 305 insertions(+), 53 deletions(-)
 create mode 100644 config/coreboot/default/patches/0037-ec-dell-mec5035-Replace-defines-with-enums.patch
 rename config/coreboot/default/patches/{0037-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch => 0038-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch} (61%)
 delete mode 100644 config/coreboot/default/patches/0038-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch
 create mode 100644 config/coreboot/default/patches/0066-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
 create mode 100644 config/coreboot/default/patches/0067-ec-dell-mec5035-Route-power-button-event-to-host.patch

diff --git a/config/coreboot/default/patches/0037-ec-dell-mec5035-Replace-defines-with-enums.patch b/config/coreboot/default/patches/0037-ec-dell-mec5035-Replace-defines-with-enums.patch
new file mode 100644
index 00000000..77011bce
--- /dev/null
+++ b/config/coreboot/default/patches/0037-ec-dell-mec5035-Replace-defines-with-enums.patch
@@ -0,0 +1,91 @@
+From 7420608acfca1790756fd80d718b737352379dbe Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Tue, 28 May 2024 17:23:21 -0600
+Subject: [PATCH 37/38] ec/dell/mec5035: Replace defines with enums
+
+Instead of using defines for command IDs and argument values, use enums
+to provide more type safety. This also has the effect of moving the
+command IDs to a more central location instead of defines spread out
+throughout the header.
+
+Change-Id: I788531e8b70e79541213853f177326d217235ef2
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+Reviewed-on: https://review.coreboot.org/c/coreboot/+/82998
+Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
+Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
+---
+ src/ec/dell/mec5035/mec5035.c | 10 +++++-----
+ src/ec/dell/mec5035/mec5035.h | 20 ++++++++++++--------
+ 2 files changed, 17 insertions(+), 13 deletions(-)
+
+diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
+index 68b6b2f7fb..dffbb7960c 100644
+--- a/src/ec/dell/mec5035/mec5035.c
++++ b/src/ec/dell/mec5035/mec5035.c
+@@ -66,17 +66,17 @@ static enum cb_err write_mailbox_regs(const u8 *data, u8 start, u8 count)
+ 	return CB_SUCCESS;
+ }
+ 
+-static void ec_command(u8 cmd)
++static void ec_command(enum mec5035_cmd cmd)
+ {
+ 	outb(0, MAILBOX_INDEX);
+-	outb(cmd, MAILBOX_DATA);
++	outb((u8)cmd, MAILBOX_DATA);
+ 	wait_ec();
+ }
+ 
+-u8 mec5035_mouse_touchpad(u8 setting)
++u8 mec5035_mouse_touchpad(enum ec_mouse_setting setting)
+ {
+-	u8 buf[15] = {0};
+-	write_mailbox_regs(&setting, 2, 1);
++	u8 buf[15] = {(u8)setting};
++	write_mailbox_regs(buf, 2, 1);
+ 	ec_command(CMD_MOUSE_TP);
+ 	/* The vendor firmware reads 15 bytes starting at index 1, presumably
+ 	   to get some sort of return code. Though I don't know for sure if
+diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
+index fa15a9d621..32f791cb01 100644
+--- a/src/ec/dell/mec5035/mec5035.h
++++ b/src/ec/dell/mec5035/mec5035.h
+@@ -7,16 +7,20 @@
+ 
+ #define NUM_REGISTERS	32
+ 
++enum mec5035_cmd {
++	CMD_MOUSE_TP = 0x1a,
++	CMD_RADIO_CTRL = 0x2b,
++	CMD_CPU_OK = 0xc2,
++};
++
+ /* Touchpad (TP) and mouse related. The EC seems to
+    default to 0 which results in the TP not working. */
+-#define CMD_MOUSE_TP	0x1a
+-#define SERIAL_MOUSE	0 /* Disable TP, force use of a serial mouse */
+-#define PS2_MOUSE	1 /* Disable TP when using a PS/2 mouse */
+-#define TP_PS2_MOUSE	2 /* Leave TP enabled when using a PS/2 mouse */
+-
+-#define CMD_CPU_OK	0xc2
++enum ec_mouse_setting {
++	SERIAL_MOUSE = 0, /* Disable TP, force use of a serial mouse */
++	PS2_MOUSE, /* Disable TP when using a PS/2 mouse */
++	TP_PS2_MOUSE /* Leave TP enabled when using a PS/2 mouse */
++};
+ 
+-#define CMD_RADIO_CTRL 0x2b
+ #define RADIO_CTRL_NUM_ARGS 3
+ enum ec_radio_dev {
+ 	RADIO_WLAN = 0,
+@@ -29,7 +33,7 @@ enum ec_radio_state {
+ 	RADIO_ON
+ };
+ 
+-u8 mec5035_mouse_touchpad(u8 setting);
++u8 mec5035_mouse_touchpad(enum ec_mouse_setting setting);
+ void mec5035_cpu_ok(void);
+ void mec5035_early_init(void);
+ void mec5035_control_radio(enum ec_radio_dev device, enum ec_radio_state state);
+-- 
+2.47.0
+
diff --git a/config/coreboot/default/patches/0037-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch b/config/coreboot/default/patches/0038-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
similarity index 61%
rename from config/coreboot/default/patches/0037-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
rename to config/coreboot/default/patches/0038-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
index a4fce1d1..7c96d9f9 100644
--- a/config/coreboot/default/patches/0037-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
+++ b/config/coreboot/default/patches/0038-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
@@ -1,16 +1,37 @@
-From 726d0001bda013a094779149828e2bc1be581fa8 Mon Sep 17 00:00:00 2001
+From 762f5d95d2314c3d09c1562d36d111dcdb9c8b93 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 3 May 2024 11:03:32 -0600
-Subject: [PATCH 37/65] ec/dell/mec5035: Add S3 suspend SMI handler
+Subject: [PATCH 38/38] ec/dell/mec5035: Add S3 suspend SMI handler
+
+This is necessary for S3 resume to work on SNB and newer Dell Latitude
+laptops. If a command isn't sent, the EC cuts power to the DIMMs,
+preventing the system from resuming. These commands were found using an
+FPGA to log all LPC bus transactions between the host and the EC and
+then narrowing down which ones were actually necessary.
+
+Interestingly, the command IDs appear to be identical to those in
+ec/google/wilco, the EC used on Dell Latitude Chromebooks, and that EC
+implements a similar S3 SMI handler as the one implemented in this
+commit. The Wilco EC Kconfig does suggest that its firmware is a
+modified version of Dell's usual Latitude EC firmware, so the
+similarities seem to be intentional.
+
+These similarities also identified a command to enable or disable wake
+sources like the power button and lid switch, and this was added to the
+SMI handler to disable lid wake as the system does not yet resume
+properly from a like wake with coreboot.
+
+Tested on the Latitude E6430 (Ivy Bridge) and the Precision M6800
+(Haswell, not yet pushed).
 
 Change-Id: I655868aba46911d128f6c24f410dc6fdf83f3070
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
 ---
  src/ec/dell/mec5035/Makefile.mk  |  1 +
  src/ec/dell/mec5035/mec5035.c    | 14 ++++++++++++++
- src/ec/dell/mec5035/mec5035.h    | 19 +++++++++++++++++++
+ src/ec/dell/mec5035/mec5035.h    | 22 ++++++++++++++++++++++
  src/ec/dell/mec5035/smihandler.c | 17 +++++++++++++++++
- 4 files changed, 51 insertions(+)
+ 4 files changed, 54 insertions(+)
  create mode 100644 src/ec/dell/mec5035/smihandler.c
 
 diff --git a/src/ec/dell/mec5035/Makefile.mk b/src/ec/dell/mec5035/Makefile.mk
@@ -25,35 +46,35 @@ index 4ebdd811f9..be557e4599 100644
  
  endif
 diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
-index 68b6b2f7fb..33bf046634 100644
+index dffbb7960c..85c2ab0140 100644
 --- a/src/ec/dell/mec5035/mec5035.c
 +++ b/src/ec/dell/mec5035/mec5035.c
 @@ -94,6 +94,20 @@ void mec5035_control_radio(enum ec_radio_dev dev, enum ec_radio_state state)
  	ec_command(CMD_RADIO_CTRL);
  }
  
-+void mec5035_sleep_enable(void)
-+{
-+	u8 buf[SLEEP_EN_NUM_ARGS] = {3, 0};
-+	write_mailbox_regs(buf, 2, SLEEP_EN_NUM_ARGS);
-+	ec_command(CMD_SLEEP_ENABLE);
-+}
-+
 +void mec5035_change_wake(u8 source, enum ec_wake_change change)
 +{
 +	u8 buf[ACPI_WAKEUP_NUM_ARGS] = {change, source, 0, 0x40};
 +	write_mailbox_regs(buf, 2, ACPI_WAKEUP_NUM_ARGS);
 +	ec_command(CMD_ACPI_WAKEUP_CHANGE);
 +}
++
++void mec5035_sleep_enable(void)
++{
++	u8 buf[SLEEP_EN_NUM_ARGS] = {3, 0};
++	write_mailbox_regs(buf, 2, SLEEP_EN_NUM_ARGS);
++	ec_command(CMD_SLEEP_ENABLE);
++}
 +
  void mec5035_early_init(void)
  {
  	/* If this isn't sent the EC shuts down the system after about 15
 diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
-index fa15a9d621..069616fbc5 100644
+index 32f791cb01..8d4fded28b 100644
 --- a/src/ec/dell/mec5035/mec5035.h
 +++ b/src/ec/dell/mec5035/mec5035.h
-@@ -4,6 +4,7 @@
+@@ -4,12 +4,15 @@
  #define _EC_DELL_MEC5035_H_
  
  #include <stdint.h>
@@ -61,37 +82,46 @@ index fa15a9d621..069616fbc5 100644
  
  #define NUM_REGISTERS	32
  
-@@ -29,9 +30,27 @@ enum ec_radio_state {
+ enum mec5035_cmd {
+ 	CMD_MOUSE_TP = 0x1a,
+ 	CMD_RADIO_CTRL = 0x2b,
++	CMD_ACPI_WAKEUP_CHANGE = 0x4a,
++	CMD_SLEEP_ENABLE = 0x64,
+ 	CMD_CPU_OK = 0xc2,
+ };
+ 
+@@ -33,9 +36,28 @@ enum ec_radio_state {
  	RADIO_ON
  };
  
-+#define CMD_ACPI_WAKEUP_CHANGE 0x4a
 +#define ACPI_WAKEUP_NUM_ARGS 4
 +enum ec_wake_change {
 +	WAKE_OFF = 0,
 +	WAKE_ON
 +};
++
++/* Copied from ec/google/wilco/commands.h. Not sure if these all apply */
 +enum ec_acpi_wake_events {
 +	EC_ACPI_WAKE_PWRB = BIT(0),     /* Wake up by power button */
 +	EC_ACPI_WAKE_LID = BIT(1),      /* Wake up by lid switch */
 +	EC_ACPI_WAKE_RTC = BIT(5),      /* Wake up by RTC */
 +};
 +
-+#define CMD_SLEEP_ENABLE 0x64
 +#define SLEEP_EN_NUM_ARGS 2
 +
- u8 mec5035_mouse_touchpad(u8 setting);
+ u8 mec5035_mouse_touchpad(enum ec_mouse_setting setting);
  void mec5035_cpu_ok(void);
  void mec5035_early_init(void);
  void mec5035_control_radio(enum ec_radio_dev device, enum ec_radio_state state);
-+void mec5035_sleep(int slp_type);
 +void mec5035_change_wake(u8 source, enum ec_wake_change change);
 +void mec5035_sleep_enable(void);
++
++void mec5035_smi_sleep(int slp_type);
  
  #endif /* _EC_DELL_MEC5035_H_ */
 diff --git a/src/ec/dell/mec5035/smihandler.c b/src/ec/dell/mec5035/smihandler.c
 new file mode 100644
-index 0000000000..1db834773d
+index 0000000000..958733bf97
 --- /dev/null
 +++ b/src/ec/dell/mec5035/smihandler.c
 @@ -0,0 +1,17 @@
@@ -102,7 +132,7 @@ index 0000000000..1db834773d
 +#include <ec/acpi/ec.h>
 +#include "mec5035.h"
 +
-+void mec5035_sleep(int slp_type)
++void mec5035_smi_sleep(int slp_type)
 +{
 +	switch (slp_type) {
 +	case ACPI_S3:
@@ -113,5 +143,5 @@ index 0000000000..1db834773d
 +	}
 +}
 -- 
-2.39.5
+2.47.0
 
diff --git a/config/coreboot/default/patches/0038-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch b/config/coreboot/default/patches/0038-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch
deleted file mode 100644
index d1db5146..00000000
--- a/config/coreboot/default/patches/0038-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 451b3e3e334d350c060444d79bc964bd90ec1152 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Fri, 3 May 2024 16:31:12 -0600
-Subject: [PATCH 38/65] mb/dell/: Add S3 SMI handler for SNB/IVB Latitudes
-
-This should fix S3 suspend on these systems
-
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/snb_ivb_latitude/smihandler.c | 9 +++++++++
- 1 file changed, 9 insertions(+)
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/smihandler.c
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/smihandler.c b/src/mainboard/dell/snb_ivb_latitude/smihandler.c
-new file mode 100644
-index 0000000000..334d7b1a5f
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/smihandler.c
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <cpu/x86/smm.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+
-+void mainboard_smi_sleep(u8 slp_typ)
-+{
-+	mec5035_sleep(slp_typ);
-+}
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0066-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch b/config/coreboot/default/patches/0066-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
new file mode 100644
index 00000000..d58968a1
--- /dev/null
+++ b/config/coreboot/default/patches/0066-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
@@ -0,0 +1,70 @@
+From 0fe1d4b9fe56a0f27a6ff39cfb94d63559b729b8 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 3 May 2024 16:31:12 -0600
+Subject: [PATCH 66/67] mb/dell: Add S3 SMI handler for Dell Latitudes
+
+Integrate the previously added mec5035_smi_sleep() function into
+mainboard code to fix S3 suspend on the SNB/IVB Latitudes and the E7240.
+The E6400 does not require the EC command to sucessfully suspend and
+resume from S3, though sending it does enable the breathing effect on
+the power LED while in S3. Without it, all LEDs turn off during S3.
+
+Change-Id: Ic0d887f75be13c3fb9f6df62153ac458895e0283
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e7240/smihandler.c            | 9 +++++++++
+ src/mainboard/dell/gm45_latitude/smihandler.c    | 9 +++++++++
+ src/mainboard/dell/snb_ivb_latitude/smihandler.c | 9 +++++++++
+ 3 files changed, 27 insertions(+)
+ create mode 100644 src/mainboard/dell/e7240/smihandler.c
+ create mode 100644 src/mainboard/dell/gm45_latitude/smihandler.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/smihandler.c
+
+diff --git a/src/mainboard/dell/e7240/smihandler.c b/src/mainboard/dell/e7240/smihandler.c
+new file mode 100644
+index 0000000000..00e55b51db
+--- /dev/null
++++ b/src/mainboard/dell/e7240/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++	mec5035_smi_sleep(slp_typ);
++}
+diff --git a/src/mainboard/dell/gm45_latitude/smihandler.c b/src/mainboard/dell/gm45_latitude/smihandler.c
+new file mode 100644
+index 0000000000..00e55b51db
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++	mec5035_smi_sleep(slp_typ);
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/smihandler.c b/src/mainboard/dell/snb_ivb_latitude/smihandler.c
+new file mode 100644
+index 0000000000..00e55b51db
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++	mec5035_smi_sleep(slp_typ);
++}
+-- 
+2.47.0
+
diff --git a/config/coreboot/default/patches/0067-ec-dell-mec5035-Route-power-button-event-to-host.patch b/config/coreboot/default/patches/0067-ec-dell-mec5035-Route-power-button-event-to-host.patch
new file mode 100644
index 00000000..d8662e40
--- /dev/null
+++ b/config/coreboot/default/patches/0067-ec-dell-mec5035-Route-power-button-event-to-host.patch
@@ -0,0 +1,92 @@
+From 32118fa1d21fad517f85cee5eb4edff5f2fd91ea Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Tue, 18 Jun 2024 21:31:08 -0600
+Subject: [PATCH 67/67] ec/dell/mec5035: Route power button event to host
+
+If command 0x3e with an argument of 1 isn't sent to the EC, pressing the
+power button results in the EC powering off the system without letting
+the OS cleanly shutting itself down. This command and argument tells the
+EC to route power button events to the host so that it can determine
+what to do.
+
+The EC command was identified from the ec/google/wilco code, which is
+used for Dell's Latitude Chromebooks. According to the EC_GOOGLE_WILCO
+Kconfig help text, those ECs run a modified version of Dell's typical
+Latitude EC firmware, so it is likely that the two firmware
+implementations use similar commands. Examining LPC traffic between the
+host and the EC on the Latitude E6400 did reveal that the same command
+was being sent by the vendor firmware to the EC, but this does not
+confirm that it has the same meaning as the command from the Wilco code.
+Sending the command using inb/outb calls in a userspace C program while
+running coreboot without this patch did allow subsequent power button
+events to be handled by the host, confirming that the command was indeed
+the same.
+
+Change-Id: I5ded315270c0e1efbbc90cfa9d9d894b872e99a2
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/ec/dell/mec5035/mec5035.c | 8 ++++++++
+ src/ec/dell/mec5035/mec5035.h | 7 +++++++
+ 2 files changed, 15 insertions(+)
+
+diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
+index 85c2ab0140..bdae929a27 100644
+--- a/src/ec/dell/mec5035/mec5035.c
++++ b/src/ec/dell/mec5035/mec5035.c
+@@ -94,6 +94,13 @@ void mec5035_control_radio(enum ec_radio_dev dev, enum ec_radio_state state)
+ 	ec_command(CMD_RADIO_CTRL);
+ }
+ 
++void mec5035_power_button_route(enum ec_power_button_route target)
++{
++	u8 buf = (u8)target;
++	write_mailbox_regs(&buf, 2, 1);
++	ec_command(CMD_POWER_BUTTON_TO_HOST);
++}
++
+ void mec5035_change_wake(u8 source, enum ec_wake_change change)
+ {
+ 	u8 buf[ACPI_WAKEUP_NUM_ARGS] = {change, source, 0, 0x40};
+@@ -121,6 +128,7 @@ static void mec5035_init(struct device *dev)
+ 	/* Unconditionally use this argument for now as this setting
+ 	   is probably the most sensible default out of the 3 choices. */
+ 	mec5035_mouse_touchpad(TP_PS2_MOUSE);
++	mec5035_power_button_route(HOST);
+ 
+ 	pc_keyboard_init(NO_AUX_DEVICE);
+ 
+diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
+index 8d4fded28b..51422598c4 100644
+--- a/src/ec/dell/mec5035/mec5035.h
++++ b/src/ec/dell/mec5035/mec5035.h
+@@ -11,6 +11,7 @@
+ enum mec5035_cmd {
+ 	CMD_MOUSE_TP = 0x1a,
+ 	CMD_RADIO_CTRL = 0x2b,
++	CMD_POWER_BUTTON_TO_HOST = 0x3e,
+ 	CMD_ACPI_WAKEUP_CHANGE = 0x4a,
+ 	CMD_SLEEP_ENABLE = 0x64,
+ 	CMD_CPU_OK = 0xc2,
+@@ -36,6 +37,11 @@ enum ec_radio_state {
+ 	RADIO_ON
+ };
+ 
++enum ec_power_button_route {
++	EC = 0,
++	HOST
++};
++
+ #define ACPI_WAKEUP_NUM_ARGS 4
+ enum ec_wake_change {
+ 	WAKE_OFF = 0,
+@@ -55,6 +61,7 @@ u8 mec5035_mouse_touchpad(enum ec_mouse_setting setting);
+ void mec5035_cpu_ok(void);
+ void mec5035_early_init(void);
+ void mec5035_control_radio(enum ec_radio_dev device, enum ec_radio_state state);
++void mec5035_power_button_route(enum ec_power_button_route target);
+ void mec5035_change_wake(u8 source, enum ec_wake_change change);
+ void mec5035_sleep_enable(void);
+ 
+-- 
+2.47.0
+

From c56f69871397aed102c262b7eb565b632f6a4b99 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 27 Oct 2024 16:05:25 +0000
Subject: [PATCH 0854/1549] Use SeaBIOS 1.16.3 and enable debugging

This diff matches the setup currently used in coreboot.

I'm eliminating as many differences as possible, while
I test the SeaBIOS hanging issue on Dell Optiplex 3050 Micro.

The actual SeaBIOS configs have also been modified, to match
the coreboot config.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/seabios/default/config/libgfxinit | 7 +++++--
 config/seabios/default/config/normal     | 7 +++++--
 config/seabios/default/config/vgarom     | 7 +++++--
 config/seabios/default/target.cfg        | 2 +-
 4 files changed, 16 insertions(+), 7 deletions(-)

diff --git a/config/seabios/default/config/libgfxinit b/config/seabios/default/config/libgfxinit
index 9c9fbe63..f1f4b0a6 100644
--- a/config/seabios/default/config/libgfxinit
+++ b/config/seabios/default/config/libgfxinit
@@ -28,7 +28,7 @@ CONFIG_ROM_SIZE=0
 # Hardware support
 #
 CONFIG_ATA=y
-CONFIG_ATA_DMA=y
+# CONFIG_ATA_DMA is not set
 # CONFIG_ATA_PIO32 is not set
 CONFIG_AHCI=y
 CONFIG_SDCARD=y
@@ -92,4 +92,7 @@ CONFIG_VGA_VBE=y
 #
 # Debugging
 #
-CONFIG_DEBUG_LEVEL=0
+CONFIG_DEBUG_LEVEL=1
+# CONFIG_DEBUG_SERIAL is not set
+# CONFIG_DEBUG_SERIAL_MMIO is not set
+CONFIG_DEBUG_COREBOOT=y
diff --git a/config/seabios/default/config/normal b/config/seabios/default/config/normal
index 92b9c56c..187a7501 100644
--- a/config/seabios/default/config/normal
+++ b/config/seabios/default/config/normal
@@ -28,7 +28,7 @@ CONFIG_ROM_SIZE=0
 # Hardware support
 #
 CONFIG_ATA=y
-CONFIG_ATA_DMA=y
+# CONFIG_ATA_DMA is not set
 # CONFIG_ATA_PIO32 is not set
 CONFIG_AHCI=y
 CONFIG_SDCARD=y
@@ -88,4 +88,7 @@ CONFIG_VGA_EXTRA_STACK_SIZE=512
 #
 # Debugging
 #
-CONFIG_DEBUG_LEVEL=0
+CONFIG_DEBUG_LEVEL=1
+# CONFIG_DEBUG_SERIAL is not set
+# CONFIG_DEBUG_SERIAL_MMIO is not set
+CONFIG_DEBUG_COREBOOT=y
diff --git a/config/seabios/default/config/vgarom b/config/seabios/default/config/vgarom
index 9f543cea..9e63e65c 100644
--- a/config/seabios/default/config/vgarom
+++ b/config/seabios/default/config/vgarom
@@ -28,7 +28,7 @@ CONFIG_ROM_SIZE=0
 # Hardware support
 #
 CONFIG_ATA=y
-CONFIG_ATA_DMA=y
+# CONFIG_ATA_DMA is not set
 # CONFIG_ATA_PIO32 is not set
 CONFIG_AHCI=y
 CONFIG_SDCARD=y
@@ -87,4 +87,7 @@ CONFIG_VGA_EXTRA_STACK_SIZE=512
 #
 # Debugging
 #
-CONFIG_DEBUG_LEVEL=0
+CONFIG_DEBUG_LEVEL=1
+# CONFIG_DEBUG_SERIAL is not set
+# CONFIG_DEBUG_SERIAL_MMIO is not set
+CONFIG_DEBUG_COREBOOT=y
diff --git a/config/seabios/default/target.cfg b/config/seabios/default/target.cfg
index 6ab72947..29f2c542 100644
--- a/config/seabios/default/target.cfg
+++ b/config/seabios/default/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-rev="2424e4c04aa30d90e85073ea41d18a7845460783"
+rev="a6ed6b701f0a57db0569ab98b0661c12a6ec3ff8"

From d1743d1f64720801146b162c01568ca0023dfb00 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 27 Oct 2024 16:21:14 +0000
Subject: [PATCH 0855/1549] 3050micro: Use alt century byte +legacy 8254 timer

I'm eliminating as many differences as possible between lbmk's
setup, and the setup that is default when simply building from
the gerrit patch, directly in coreboot, by just picking the
mainboard; in this way, coreboot picks SeaBIOS as payload. I
already changed the SeaBIOS configs, in the previous patch.

Upon testing, this seems to have fixed the SeaBIOS hanging. I
need to have both of these options selected, or SeaBIOS hangs
just after it says "Press ESC" for the boot menu.

With this config change, SeaBIOS does not hang; instead, it shows
the list of devices as normal, and boots your machine.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../dell3050micro_fsp_16mb/config/libgfxinit_corebootfb       | 4 ++--
 .../coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
index 1a04eaf7..ddae7077 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
@@ -175,7 +175,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
-# CONFIG_USE_LEGACY_8254_TIMER is not set
+CONFIG_USE_LEGACY_8254_TIMER=y
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
@@ -620,7 +620,7 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_WIFI_GENERIC=y
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
index 529cdd56..ebfae680 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
@@ -173,7 +173,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
-# CONFIG_USE_LEGACY_8254_TIMER is not set
+CONFIG_USE_LEGACY_8254_TIMER=y
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
@@ -612,7 +612,7 @@ CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
-# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set

From 237fa1e3c18365794bf5bf525df99a460c821192 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 27 Oct 2024 16:26:07 +0000
Subject: [PATCH 0856/1549] 3050micro: don't set static option table

Again, I'm adapting the config to be as close to the
coreboot one as possible. I compiled directly from coreboot
earlier, and got SeaBIOS to work on my 3050.

I'm matching the setup as closely as possible. Once it works,
I can use that in a Libreboot release but then debug why the
old config wasn't working.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../dell3050micro_fsp_16mb/config/libgfxinit_corebootfb      | 5 ++---
 .../dell3050micro_fsp_16mb/config/libgfxinit_txtmode         | 5 ++---
 2 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
index ddae7077..81dcd9da 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
@@ -16,9 +16,8 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
index ebfae680..1104bc31 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
@@ -16,9 +16,8 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
-# CONFIG_OPTION_BACKEND_NONE is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y

From 9bdec645a30ff81abb3f6d3db6c974bf6ab6321f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 27 Oct 2024 19:29:26 +0000
Subject: [PATCH 0857/1549] 3050micro: Re-enable SeaGRUB

Remove what is now unnecessary bloat, for ensuring that
GRUB is the primary payload; SeaGRUB is the only preference,
as per lbmk design.

The SeaBIOS hanging issue was fixed, so SeaGRUB is OK now.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/dell3050micro_fsp_16mb/target.cfg |  2 --
 include/rom.sh                                    | 10 +++-------
 script/trees                                      |  5 ++---
 3 files changed, 5 insertions(+), 12 deletions(-)

diff --git a/config/coreboot/dell3050micro_fsp_16mb/target.cfg b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
index b45300e9..539c0fb5 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/target.cfg
+++ b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
@@ -8,5 +8,3 @@ grubtree="xhci"
 vcfg="3050micro"
 build_depend="seabios/default grub/xhci memtest86plus"
 IFD_platform="sklkbl"
-grubname="fallback/payload" # make GRUB the primary payload on this board
-seabiosname="seabios.elf"
diff --git a/include/rom.sh b/include/rom.sh
index 9d11e757..1d7be098 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -122,10 +122,9 @@ mkcorebootbin()
 
 add_seabios()
 {
-	[ -n "$seabiosname" ] || seabiosname="fallback/payload"
 	_seabioself="elf/seabios/default/$initmode/bios.bin.elf"
 
-	cbfs "$tmprom" "$_seabioself" "$seabiosname"
+	cbfs "$tmprom" "$_seabioself" "fallback/payload"
 	x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
 
 	_z="2"; [ "$initmode" = "vgarom" ] && _z="0"
@@ -139,14 +138,12 @@ add_seabios()
 
 	[ "$payload_grub" = "y" ] && add_grub
 
-	[ "$seabiosname" = "fallback/payload" ] && cprom
-	[ "$payload_grub" = "y" ] && pname="seagrub" && mkseagrub; :
+	cprom && [ "$payload_grub" = "y" ] && pname="seagrub" && mkseagrub; :
 }
 
 add_grub()
 {
-	[ -n "$grubname" ] || grubname="img/grub2"
-	cbfs "$tmprom" "$grubelf" "$grubname"
+	cbfs "$tmprom" "$grubelf" "img/grub2"
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
 	    > "$TMPDIR/tmpcfg" || $err "$target: !insert scandisk"
 	cbfs "$tmprom" "$TMPDIR/tmpcfg" scan.cfg raw
@@ -154,7 +151,6 @@ add_grub()
 
 mkseagrub()
 {
-	[ "$grubname" = "fallback/payload" ] && pname="grub"
 	cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
 	for keymap in config/data/grub/keymap/*.gkb; do
 		[ -f "$keymap" ] && cprom "${keymap##*/}"; :
diff --git a/script/trees b/script/trees
index e219d649..5be43dcc 100755
--- a/script/trees
+++ b/script/trees
@@ -12,8 +12,7 @@ set -u -e
 eval `setvars "" xarch srcdir premake cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
-    defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs seabiosname \
-    grubname`; badhash="n"
+    defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs`; badhash="n"
 
 main()
 {
@@ -113,7 +112,7 @@ configure_project()
 {
 	eval `setvars "" xarch xlang build_depend autoconfargs xtree postmake \
 	    tree_depend makeargs btype mkhelper bootstrapargs premake release \
-	    cleanargs grubname seabiosname`
+	    cleanargs`
 	_tcfg="$1/target.cfg"; badhash="n"; [ -f "$_tcfg" ] || btype="auto"
 	[ -f "$datadir/mkhelper.cfg" ] && eval `setcfg "$datadir/mkhelper.cfg"`
 

From 19795bf980edf31958e85319d35700ce4d2feae4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 27 Oct 2024 20:06:16 +0000
Subject: [PATCH 0858/1549] re-update seabios to latest revision

I reset it temporarily back to 1.16.3 when testing the
SeaBIOS hanging bug on 3050 micro, but the revision had
no effect; the bug was caused by a bad coreboot config

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/seabios/default/target.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/seabios/default/target.cfg b/config/seabios/default/target.cfg
index 29f2c542..f80b9db2 100644
--- a/config/seabios/default/target.cfg
+++ b/config/seabios/default/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-rev="a6ed6b701f0a57db0569ab98b0661c12a6ec3ff8"
+rev="62a1429ec1ec67f14c039d97627a6a7ef70a983c"

From f3170fb06ebe5de0fc715dee429d07f44211b052 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 28 Oct 2024 01:16:25 +0000
Subject: [PATCH 0859/1549] coreboot/dell7: add missing ifdtool nuke patch

This is for blanking the ME region on release builds.

This is required for lbmk when doing Libreboot releases,
on images that use an Intel ME region.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...ool-add-nuke-flag-all-0xFF-on-region.patch | 205 ++++++++++++++++++
 1 file changed, 205 insertions(+)
 create mode 100644 config/coreboot/dell7/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch

diff --git a/config/coreboot/dell7/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/dell7/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
new file mode 100644
index 00000000..66059f24
--- /dev/null
+++ b/config/coreboot/dell7/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -0,0 +1,205 @@
+From ecedecb1224a04531ec544b76ef93efd33cd8f6d Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sun, 19 Feb 2023 18:21:43 +0000
+Subject: [PATCH 1/1] util/ifdtool: add --nuke flag (all 0xFF on region)
+
+When this option is used, the region's contents are overwritten
+with all ones (0xFF).
+
+Example:
+
+./ifdtool --nuke gbe coreboot.rom
+./ifdtool --nuke bios coreboot.com
+./ifdtool --nuke me coreboot.com
+
+Rebased since the last revision update in lbmk.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
+ 1 file changed, 83 insertions(+), 31 deletions(-)
+
+diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
+index 36477eef66..3ebef74042 100644
+--- a/util/ifdtool/ifdtool.c
++++ b/util/ifdtool/ifdtool.c
+@@ -2217,6 +2217,7 @@ static void print_usage(const char *name)
+ 	       "                                         tgl    - Tiger Lake\n"
+ 	       "                                         wbg    - Wellsburg\n"
+ 	       "   -S | --setpchstrap                    Write a PCH strap\n"
++	       "   -N | --nuke <region>                  Overwrite the specified region with 0xFF (all ones)\n"
+ 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
+ 	       "   -v | --version:                       print the version\n"
+ 	       "   -h | --help:                          print this help\n\n"
+@@ -2225,6 +2226,60 @@ static void print_usage(const char *name)
+ 	       "\n");
+ }
+ 
++static int
++get_region_type_string(const char *region_type_string)
++{
++       if (!strcasecmp("Descriptor", region_type_string))
++               return 0;
++       else if (!strcasecmp("BIOS", region_type_string))
++               return 1;
++       else if (!strcasecmp("ME", region_type_string))
++               return 2;
++       else if (!strcasecmp("GbE", region_type_string))
++               return 3;
++       else if (!strcasecmp("Platform Data", region_type_string))
++               return 4;
++       else if (!strcasecmp("Device Exp1", region_type_string))
++               return 5;
++       else if (!strcasecmp("Secondary BIOS", region_type_string))
++               return 6;
++       else if (!strcasecmp("Reserved", region_type_string))
++               return 7;
++       else if (!strcasecmp("EC", region_type_string))
++               return 8;
++       else if (!strcasecmp("Device Exp2", region_type_string))
++               return 9;
++       else if (!strcasecmp("IE", region_type_string))
++               return 10;
++       else if (!strcasecmp("10GbE_0", region_type_string))
++               return 11;
++       else if (!strcasecmp("10GbE_1", region_type_string))
++               return 12;
++       else if (!strcasecmp("PTT", region_type_string))
++               return 15;
++       return -1;
++}
++
++static void
++nuke(const char *filename, char *image, int size, int region_type)
++{
++       int i;
++       struct region region;
++       const struct frba *frba = find_frba(image, size);
++       if (!frba)
++               exit(EXIT_FAILURE);
++
++       region = get_region(frba, region_type);
++       if (region.size > 0) {
++               for (i = region.base; i <= region.limit; i++) {
++                       if ((i + 1) > (size))
++                               break;
++                       image[i] = 0xFF;
++               }
++               write_image(filename, image, size);
++       }
++}
++
+ int main(int argc, char *argv[])
+ {
+ 	int opt, option_index = 0;
+@@ -2232,6 +2287,7 @@ int main(int argc, char *argv[])
+ 	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
+ 	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
+ 	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
++	int mode_nuke = 0;
+ 	int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
+ 	char *region_type_string = NULL, *region_fname = NULL;
+ 	const char *layout_fname = NULL;
+@@ -2267,6 +2323,7 @@ int main(int argc, char *argv[])
+ 		{"validate", 0, NULL, 't'},
+ 		{"setpchstrap", 1, NULL, 'S'},
+ 		{"newvalue", 1, NULL, 'V'},
++		{"nuke", 1, NULL, 'N'},
+ 		{0, 0, 0, 0}
+ 	};
+ 
+@@ -2316,35 +2373,8 @@ int main(int argc, char *argv[])
+ 			region_fname++;
+ 			// Descriptor, BIOS, ME, GbE, Platform
+ 			// valid type?
+-			if (!strcasecmp("Descriptor", region_type_string))
+-				region_type = 0;
+-			else if (!strcasecmp("BIOS", region_type_string))
+-				region_type = 1;
+-			else if (!strcasecmp("ME", region_type_string))
+-				region_type = 2;
+-			else if (!strcasecmp("GbE", region_type_string))
+-				region_type = 3;
+-			else if (!strcasecmp("Platform Data", region_type_string))
+-				region_type = 4;
+-			else if (!strcasecmp("Device Exp1", region_type_string))
+-				region_type = 5;
+-			else if (!strcasecmp("Secondary BIOS", region_type_string))
+-				region_type = 6;
+-			else if (!strcasecmp("Reserved", region_type_string))
+-				region_type = 7;
+-			else if (!strcasecmp("EC", region_type_string))
+-				region_type = 8;
+-			else if (!strcasecmp("Device Exp2", region_type_string))
+-				region_type = 9;
+-			else if (!strcasecmp("IE", region_type_string))
+-				region_type = 10;
+-			else if (!strcasecmp("10GbE_0", region_type_string))
+-				region_type = 11;
+-			else if (!strcasecmp("10GbE_1", region_type_string))
+-				region_type = 12;
+-			else if (!strcasecmp("PTT", region_type_string))
+-				region_type = 15;
+-			if (region_type == -1) {
++			if ((region_type =
++			    get_region_type_string(region_type_string)) == -1) {
+ 				fprintf(stderr, "No such region type: '%s'\n\n",
+ 					region_type_string);
+ 				fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
+@@ -2521,6 +2551,22 @@ int main(int argc, char *argv[])
+ 		case 't':
+ 			mode_validate = 1;
+ 			break;
++               case 'N':
++                       region_type_string = strdup(optarg);
++                       if (!region_type_string) {
++                               fprintf(stderr, "No region specified\n");
++                               print_usage(argv[0]);
++                               exit(EXIT_FAILURE);
++                       }
++                       if ((region_type =
++                           get_region_type_string(region_type_string)) == -1) {
++                               fprintf(stderr, "No such region type: '%s'\n\n",
++                                       region_type_string);
++                               print_usage(argv[0]);
++                               exit(EXIT_FAILURE);
++                       }
++                       mode_nuke = 1;
++                       break;
+ 		case 'v':
+ 			print_version();
+ 			exit(EXIT_SUCCESS);
+@@ -2540,7 +2586,8 @@ int main(int argc, char *argv[])
+ 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
+ 			mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
+ 			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
+-			(mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) > 1) {
++			(mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
++			mode_nuke) > 1) {
+ 		fprintf(stderr, "You may not specify more than one mode.\n\n");
+ 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
+ 		exit(EXIT_FAILURE);
+@@ -2549,7 +2596,8 @@ int main(int argc, char *argv[])
+ 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
+ 			mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
+ 			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
+-			mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) == 0) {
++			mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
++			mode_nuke) == 0) {
+ 		fprintf(stderr, "You need to specify a mode.\n\n");
+ 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
+ 		exit(EXIT_FAILURE);
+@@ -2662,6 +2710,10 @@ int main(int argc, char *argv[])
+ 		write_image(new_filename, image, size);
+ 	}
+ 
++	if (mode_nuke) {
++		nuke(new_filename, image, size, region_type);
++	}
++
+ 	if (mode_altmedisable) {
+ 		struct fpsba *fpsba = find_fpsba(image, size);
+ 		struct fmsba *fmsba = find_fmsba(image, size);
+-- 
+2.39.5
+

From 97054498e9460b1cbc5800817fc0c9d64458536a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 28 Oct 2024 01:36:50 +0000
Subject: [PATCH 0860/1549] NEW MAINBOARD: Dell OptiPlex 780 MT

Thanks go to Lorenzo Aloe and Nicholas Chin for working on
and testing this code.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              | 652 ++++++++++++++++
 .../dell780mt_8mb/config/libgfxinit_txtmode   | 648 ++++++++++++++++
 config/coreboot/dell780mt_8mb/target.cfg      |   8 +
 .../config/libgfxinit_corebootfb              | 652 ++++++++++++++++
 .../config/libgfxinit_txtmode                 | 648 ++++++++++++++++
 .../dell780mt_truncate_8mb/target.cfg         |   8 +
 ...b-dell-Add-Optiplex-780-MT-x4x-ICH10.patch | 708 ++++++++++++++++++
 ...ool-add-nuke-flag-all-0xFF-on-region.patch | 205 +++++
 ...or-coreboot-images-built-without-a-p.patch |  39 +
 config/coreboot/next/target.cfg               |   2 +
 config/ifd/ich10/gbe                          | Bin 0 -> 8192 bytes
 config/ifd/ich10/ifd_8                        | Bin 0 -> 4096 bytes
 config/ifd/ich10/ifd_8_truncate               | Bin 0 -> 4096 bytes
 .../acpica-unix-20230628.tar.gz/module.cfg    |   3 +
 .../next/binutils-2.43.1.tar.xz/module.cfg    |   3 +
 .../next/gcc-14.2.0.tar.xz/module.cfg         |   3 +
 .../coreboot/next/gmp-6.3.0.tar.xz/module.cfg |   3 +
 .../coreboot/next/intel-microcode/module.cfg  |   3 +
 .../coreboot/next/libgfxinit/module.cfg       |   3 +
 .../coreboot/next/libhwbase/module.cfg        |   3 +
 config/submodule/coreboot/next/module.list    |  11 +
 .../coreboot/next/mpc-1.3.1.tar.gz/module.cfg |   3 +
 .../next/mpfr-4.2.1.tar.xz/module.cfg         |   3 +
 .../next/nasm-2.16.03.tar.bz2/module.cfg      |   3 +
 .../submodule/coreboot/next/vboot/module.cfg  |   3 +
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch | 178 +++++
 26 files changed, 3792 insertions(+)
 create mode 100644 config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/dell780mt_8mb/target.cfg
 create mode 100644 config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/dell780mt_truncate_8mb/target.cfg
 create mode 100644 config/coreboot/next/patches/0001-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
 create mode 100644 config/coreboot/next/patches/0002-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
 create mode 100644 config/coreboot/next/patches/0003-Remove-warning-for-coreboot-images-built-without-a-p.patch
 create mode 100644 config/coreboot/next/target.cfg
 create mode 100644 config/ifd/ich10/gbe
 create mode 100644 config/ifd/ich10/ifd_8
 create mode 100644 config/ifd/ich10/ifd_8_truncate
 create mode 100644 config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg
 create mode 100644 config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/next/intel-microcode/module.cfg
 create mode 100644 config/submodule/coreboot/next/libgfxinit/module.cfg
 create mode 100644 config/submodule/coreboot/next/libhwbase/module.cfg
 create mode 100644 config/submodule/coreboot/next/module.list
 create mode 100644 config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg
 create mode 100644 config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg
 create mode 100644 config/submodule/coreboot/next/vboot/module.cfg
 create mode 100644 config/submodule/coreboot/next/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch

diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..6731544b
--- /dev/null
+++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
@@ -0,0 +1,652 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_mt"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..9793414d
--- /dev/null
+++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
@@ -0,0 +1,648 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_mt"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell780mt_8mb/target.cfg b/config/coreboot/dell780mt_8mb/target.cfg
new file mode 100644
index 00000000..eca44aa2
--- /dev/null
+++ b/config/coreboot/dell780mt_8mb/target.cfg
@@ -0,0 +1,8 @@
+tree="next"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci ata"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..87b64924
--- /dev/null
+++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
@@ -0,0 +1,652 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x5FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_mt"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=6144
+CONFIG_ROM_SIZE=0x00600000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..cef9cdb9
--- /dev/null
+++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
@@ -0,0 +1,648 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x5FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_mt"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=6144
+CONFIG_ROM_SIZE=0x00600000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell780mt_truncate_8mb/target.cfg b/config/coreboot/dell780mt_truncate_8mb/target.cfg
new file mode 100644
index 00000000..eca44aa2
--- /dev/null
+++ b/config/coreboot/dell780mt_truncate_8mb/target.cfg
@@ -0,0 +1,8 @@
+tree="next"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci ata"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/next/patches/0001-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch b/config/coreboot/next/patches/0001-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
new file mode 100644
index 00000000..e6af410a
--- /dev/null
+++ b/config/coreboot/next/patches/0001-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
@@ -0,0 +1,708 @@
+From 8b951349f2ef77916633c817ad2fc1decd5c0920 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Mon, 30 Sep 2024 20:44:38 -0400
+Subject: [PATCH 1/3] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
+
+Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/optiplex_780/Kconfig       |  40 ++++
+ src/mainboard/dell/optiplex_780/Kconfig.name  |   4 +
+ src/mainboard/dell/optiplex_780/Makefile.mk   |  10 +
+ src/mainboard/dell/optiplex_780/acpi/ec.asl   |   5 +
+ .../dell/optiplex_780/acpi/ich10_pci_irqs.asl |  32 ++++
+ .../dell/optiplex_780/acpi/superio.asl        |  18 ++
+ .../dell/optiplex_780/board_info.txt          |   6 +
+ src/mainboard/dell/optiplex_780/cmos.default  |   8 +
+ src/mainboard/dell/optiplex_780/cmos.layout   |  72 ++++++++
+ src/mainboard/dell/optiplex_780/cstates.c     |   8 +
+ src/mainboard/dell/optiplex_780/devicetree.cb |  63 +++++++
+ src/mainboard/dell/optiplex_780/dsdt.asl      |  26 +++
+ .../dell/optiplex_780/gma-mainboard.ads       |  16 ++
+ .../optiplex_780/variants/780_mt/data.vbt     | Bin 0 -> 1917 bytes
+ .../optiplex_780/variants/780_mt/early_init.c |  12 ++
+ .../dell/optiplex_780/variants/780_mt/gpio.c  | 174 ++++++++++++++++++
+ .../optiplex_780/variants/780_mt/hda_verb.c   |  26 +++
+ .../variants/780_mt/overridetree.cb           |  10 +
+ 18 files changed, 530 insertions(+)
+ create mode 100644 src/mainboard/dell/optiplex_780/Kconfig
+ create mode 100644 src/mainboard/dell/optiplex_780/Kconfig.name
+ create mode 100644 src/mainboard/dell/optiplex_780/Makefile.mk
+ create mode 100644 src/mainboard/dell/optiplex_780/acpi/ec.asl
+ create mode 100644 src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl
+ create mode 100644 src/mainboard/dell/optiplex_780/acpi/superio.asl
+ create mode 100644 src/mainboard/dell/optiplex_780/board_info.txt
+ create mode 100644 src/mainboard/dell/optiplex_780/cmos.default
+ create mode 100644 src/mainboard/dell/optiplex_780/cmos.layout
+ create mode 100644 src/mainboard/dell/optiplex_780/cstates.c
+ create mode 100644 src/mainboard/dell/optiplex_780/devicetree.cb
+ create mode 100644 src/mainboard/dell/optiplex_780/dsdt.asl
+ create mode 100644 src/mainboard/dell/optiplex_780/gma-mainboard.ads
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/data.vbt
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb
+
+diff --git a/src/mainboard/dell/optiplex_780/Kconfig b/src/mainboard/dell/optiplex_780/Kconfig
+new file mode 100644
+index 0000000000..2d06c75c9a
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/Kconfig
+@@ -0,0 +1,40 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++config BOARD_DELL_OPTIPLEX_780_COMMON
++	def_bool n
++	select BOARD_ROMSIZE_KB_8192
++	select CPU_INTEL_SOCKET_LGA775
++	select DRIVERS_I2C_CK505
++	select HAVE_ACPI_RESUME
++	select HAVE_ACPI_TABLES
++	select HAVE_CMOS_DEFAULT
++	select HAVE_OPTION_TABLE
++	select INTEL_GMA_HAVE_VBT
++	select MAINBOARD_HAS_LIBGFXINIT
++	select MAINBOARD_USES_IFD_GBE_REGION
++	select NORTHBRIDGE_INTEL_X4X
++	select PCIEXP_ASPM
++	select PCIEXP_CLK_PM
++	select SOUTHBRIDGE_INTEL_I82801JX
++
++config BOARD_DELL_OPTIPLEX_780_MT
++	select BOARD_DELL_OPTIPLEX_780_COMMON
++
++if BOARD_DELL_OPTIPLEX_780_COMMON
++
++config VGA_BIOS_ID
++	default "8086,2e22"
++
++config MAINBOARD_DIR
++	default "dell/optiplex_780"
++
++config MAINBOARD_PART_NUMBER
++	default "OptiPlex 780 MT" if BOARD_DELL_OPTIPLEX_780_MT
++
++config OVERRIDE_DEVICETREE
++	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
++
++config VARIANT_DIR
++	default "780_mt" if BOARD_DELL_OPTIPLEX_780_MT
++
++endif # BOARD_DELL_OPTIPLEX_780_COMMON
+diff --git a/src/mainboard/dell/optiplex_780/Kconfig.name b/src/mainboard/dell/optiplex_780/Kconfig.name
+new file mode 100644
+index 0000000000..db7f2e8fe3
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/Kconfig.name
+@@ -0,0 +1,4 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++config BOARD_DELL_OPTIPLEX_780_MT
++	bool "OptiPlex 780 MT"
+diff --git a/src/mainboard/dell/optiplex_780/Makefile.mk b/src/mainboard/dell/optiplex_780/Makefile.mk
+new file mode 100644
+index 0000000000..d462995d75
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/Makefile.mk
+@@ -0,0 +1,10 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++ramstage-y += cstates.c
++romstage-y += variants/$(VARIANT_DIR)/gpio.c
++
++bootblock-y += variants/$(VARIANT_DIR)/early_init.c
++romstage-y += variants/$(VARIANT_DIR)/early_init.c
++
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
++ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
+diff --git a/src/mainboard/dell/optiplex_780/acpi/ec.asl b/src/mainboard/dell/optiplex_780/acpi/ec.asl
+new file mode 100644
+index 0000000000..479296cb76
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/acpi/ec.asl
+@@ -0,0 +1,5 @@
++/* SPDX-License-Identifier: CC-PDDC */
++
++/* Please update the license if adding licensable material. */
++
++/* dummy */
+diff --git a/src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl b/src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl
+new file mode 100644
+index 0000000000..b7588dcc41
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++/* This is board specific information:
++ * IRQ routing for the 0:1e.0 PCI bridge of the ICH10
++ */
++
++If (PICM) {
++	Return (Package() {
++		/* PCI slot */
++		Package() { 0x0001ffff, 0, 0, 0x14},
++		Package() { 0x0001ffff, 1, 0, 0x15},
++		Package() { 0x0001ffff, 2, 0, 0x16},
++		Package() { 0x0001ffff, 3, 0, 0x17},
++
++		Package() { 0x0002ffff, 0, 0, 0x15},
++		Package() { 0x0002ffff, 1, 0, 0x16},
++		Package() { 0x0002ffff, 2, 0, 0x17},
++		Package() { 0x0002ffff, 3, 0, 0x14},
++	})
++} Else {
++	Return (Package() {
++		Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKE, 0},
++		Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKF, 0},
++		Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKG, 0},
++		Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKH, 0},
++
++		Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKF, 0},
++		Package() { 0x0002ffff, 1, \_SB.PCI0.LPCB.LNKG, 0},
++		Package() { 0x0002ffff, 2, \_SB.PCI0.LPCB.LNKH, 0},
++		Package() { 0x0002ffff, 3, \_SB.PCI0.LPCB.LNKE, 0},
++	})
++}
+diff --git a/src/mainboard/dell/optiplex_780/acpi/superio.asl b/src/mainboard/dell/optiplex_780/acpi/superio.asl
+new file mode 100644
+index 0000000000..9f3900b86c
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/acpi/superio.asl
+@@ -0,0 +1,18 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#undef SUPERIO_DEV
++#undef SUPERIO_PNP_BASE
++#undef IT8720F_SHOW_SP1
++#undef IT8720F_SHOW_SP2
++#undef IT8720F_SHOW_EC
++#undef IT8720F_SHOW_KBCK
++#undef IT8720F_SHOW_KBCM
++#undef IT8720F_SHOW_GPIO
++#undef IT8720F_SHOW_CIR
++#define SUPERIO_DEV		SIO0
++#define SUPERIO_PNP_BASE	0x2e
++#define IT8720F_SHOW_EC		1
++#define IT8720F_SHOW_KBCK	1
++#define IT8720F_SHOW_KBCM	1
++#define IT8720F_SHOW_GPIO	1
++#include <superio/ite/it8720f/acpi/superio.asl>
+diff --git a/src/mainboard/dell/optiplex_780/board_info.txt b/src/mainboard/dell/optiplex_780/board_info.txt
+new file mode 100644
+index 0000000000..aaf657b583
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/board_info.txt
+@@ -0,0 +1,6 @@
++Category: desktop
++Board URL: https://www.acer.com/ac/en/GB/content/support-product/1137?b=1
++ROM package: SOIC-8
++ROM protocol: SPI
++ROM socketed: n
++Flashrom support: y
+diff --git a/src/mainboard/dell/optiplex_780/cmos.default b/src/mainboard/dell/optiplex_780/cmos.default
+new file mode 100644
+index 0000000000..23f0e55f3e
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/cmos.default
+@@ -0,0 +1,8 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++boot_option=Fallback
++debug_level=Debug
++power_on_after_fail=Disable
++nmi=Enable
++sata_mode=AHCI
++gfx_uma_size=64M
+diff --git a/src/mainboard/dell/optiplex_780/cmos.layout b/src/mainboard/dell/optiplex_780/cmos.layout
+new file mode 100644
+index 0000000000..9f5012adb4
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/cmos.layout
+@@ -0,0 +1,72 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++# -----------------------------------------------------------------
++entries
++
++# -----------------------------------------------------------------
++0	120	r	0	reserved_memory
++
++# -----------------------------------------------------------------
++# RTC_BOOT_BYTE (coreboot hardcoded)
++384	1	e	4	boot_option
++388	4	h	0	reboot_counter
++
++# -----------------------------------------------------------------
++# coreboot config options: console
++395	4	e	6	debug_level
++
++# coreboot config options: southbridge
++408	1	e	10	sata_mode
++409	2	e	7	power_on_after_fail
++411	1	e	1	nmi
++
++# coreboot config options: cpu
++
++# coreboot config options: northbridge
++432	4	e	11	gfx_uma_size
++
++# coreboot config options: check sums
++984	16	h	0	check_sum
++
++# -----------------------------------------------------------------
++
++enumerations
++
++#ID	value	text
++1	0	Disable
++1	1	Enable
++2	0	Enable
++2	1	Disable
++4	0	Fallback
++4	1	Normal
++6	0	Emergency
++6	1	Alert
++6	2	Critical
++6	3	Error
++6	4	Warning
++6	5	Notice
++6	6	Info
++6	7	Debug
++6	8	Spew
++7	0	Disable
++7	1	Enable
++7	2	Keep
++10	0	AHCI
++10	1	Compatible
++11	1	4M
++11	2	8M
++11	3	16M
++11	4	32M
++11	5	48M
++11	6	64M
++11	7	128M
++11	8	256M
++11	9	96M
++11	10	160M
++11	11	224M
++11	12	352M
++
++# -----------------------------------------------------------------
++checksums
++
++checksum 392 983 984
+diff --git a/src/mainboard/dell/optiplex_780/cstates.c b/src/mainboard/dell/optiplex_780/cstates.c
+new file mode 100644
+index 0000000000..4adf0edc63
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/cstates.c
+@@ -0,0 +1,8 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpigen.h>
++
++int get_cst_entries(const acpi_cstate_t **entries)
++{
++	return 0;
++}
+diff --git a/src/mainboard/dell/optiplex_780/devicetree.cb b/src/mainboard/dell/optiplex_780/devicetree.cb
+new file mode 100644
+index 0000000000..95e3bd517c
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/devicetree.cb
+@@ -0,0 +1,63 @@
++# SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/x4x
++	device cpu_cluster 0 on ops x4x_cpu_bus_ops end		# APIC cluster
++	device domain 0 on
++		ops x4x_pci_domain_ops		# PCI domain
++		subsystemid 0x8086 0x0028 inherit
++		device pci 0.0 on  end		# Host Bridge
++		device pci 1.0 on  end		# PCIe x16 2.0 slot
++		device pci 2.0 on  end		# Integrated graphics controller
++		device pci 2.1 on  end		# Integrated graphics controller 2
++		device pci 3.0 off end		# ME
++		device pci 3.1 off end		# ME
++		chip southbridge/intel/i82801jx	# ICH10
++			register "gpe0_en" = "0x40"
++
++			# Set AHCI mode.
++			register "sata_port_map"	= "0x3f"
++			register "sata_clock_request"	= "1"
++
++			# Enable PCIe ports 0,1 as slots.
++			register "pcie_slot_implemented" = "0x3"
++
++			device pci 19.0 on  end		# GBE
++			device pci 1a.0 on  end		# USB
++			device pci 1a.1 on  end		# USB
++			device pci 1a.2 on  end		# USB
++			device pci 1a.7 on  end		# USB
++			device pci 1b.0 on  end		# Audio
++			device pci 1c.0 off end		# PCIe 1
++			device pci 1c.1 off end		# PCIe 2
++			device pci 1c.2 off end		# PCIe 3
++			device pci 1c.3 off end		# PCIe 4
++			device pci 1c.4 off end		# PCIe 5
++			device pci 1c.5 off end		# PCIe 6
++			device pci 1d.0 on  end		# USB
++			device pci 1d.1 on  end		# USB
++			device pci 1d.2 on  end		# USB
++			device pci 1d.7 on  end		# USB
++			device pci 1e.0 on  end		# PCI bridge
++			device pci 1f.0 on  end		# LPC bridge
++			device pci 1f.2 on  end		# SATA (IDE: port 0-3, AHCI/RAID: 0-5)
++			device pci 1f.3 on		# SMBus
++				chip drivers/i2c/ck505	# IDT CV194
++					register "mask" = "{ 0xff, 0xff, 0xff, 0xff,
++							     0xff, 0xff, 0xff, 0xff,
++							     0xff, 0xff, 0xff, 0xff,
++							     0xff, 0xff, 0xff, 0xff,
++							     0xff, 0xff, 0xff }"
++					register "regs" = "{ 0x15, 0x82, 0xff, 0xff,
++							     0xff, 0x00, 0x00, 0x95,
++							     0x00, 0x65, 0x7d, 0x56,
++							     0x13, 0xc0, 0x00, 0x07,
++							     0x01, 0x0a, 0x64 }"
++					device i2c 69 on end
++				end
++			end
++			device pci 1f.4 off end
++			device pci 1f.5 off end		# SATA 2 (for port 4-5 in IDE mode)
++			device pci 1f.6 off end		# Thermal Subsystem
++		end
++	end
++end
+diff --git a/src/mainboard/dell/optiplex_780/dsdt.asl b/src/mainboard/dell/optiplex_780/dsdt.asl
+new file mode 100644
+index 0000000000..9ad70469de
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/dsdt.asl
+@@ -0,0 +1,26 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi.h>
++DefinitionBlock(
++	"dsdt.aml",
++	"DSDT",
++	ACPI_DSDT_REV_2,
++	OEM_ID,
++	ACPI_TABLE_CREATOR,
++	0x20090811	// OEM revision
++)
++{
++	#include <acpi/dsdt_top.asl>
++
++	OSYS = 2002
++	// global NVS and variables
++	#include <southbridge/intel/common/acpi/platform.asl>
++
++	Device (\_SB.PCI0)
++	{
++		#include <northbridge/intel/x4x/acpi/x4x.asl>
++		#include <southbridge/intel/i82801jx/acpi/ich10.asl>
++	}
++
++	#include <southbridge/intel/common/acpi/sleepstates.asl>
++}
+diff --git a/src/mainboard/dell/optiplex_780/gma-mainboard.ads b/src/mainboard/dell/optiplex_780/gma-mainboard.ads
+new file mode 100644
+index 0000000000..bc81cf4a40
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/gma-mainboard.ads
+@@ -0,0 +1,16 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (DP2,
++      Analog,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/data.vbt b/src/mainboard/dell/optiplex_780/variants/780_mt/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..fefda9d6f226b88ab67c5b044de30a707df22fbf
+GIT binary patch
+literal 1917
+zcmd6nO>7%Q6vzLwGv0Mv$FUpJ*ik4iQd_wnX*X`M0y3~p?8a$~>ZXxZMU`4dc9RGb
+zTXq_i1Bwd~aNr{c4i)r(goF^M-nek+sY0sMa}Sk>xFFy_FTEfX^Y+7unt+OgkeJbX
+zznS;`v-5V=o<pVaS;}Q53%NpOI!8{cz{K0eVfK65_|*A}SF)Me%$4!N`H5-z90%~a
+zvGog3fe5LjnM&o#3$<#k{6>{ZwwmnN>gY?}>{`7^JBpP$l`EBIwbi0*k&aU)n@v)E
+znI_A1T57efS5MG<y}m-_+CrVKE#0VADDft%nb#Y<<ao9;Mf?!XvM)_$Xla>NN5_ut
+zt=x`G)EjR#mlhURC^2!A3p33TcBg4-d8JyTiF&hfk}|a#&Dfe2%~V^}=4!QavNzBh
+z0Pae^5`gfb?<R!YN+PQ)U7<%H;73qF3iyQT71$?W2s|f{69_4sRY(x>7Q)c(LsP)8
+zQy)2gw<F#IP`I}U>gG1S^>aw&0D}Z+-SCcJJF;s)yXJeQ|4N{SU?$I`#$HZa<Jq(M
+zbA{r}Z0XY6<@U{Y-d!KWR>9dWBuxA$6X;VK;%W?Y>I;0P`|*vwAK$S(VB2JSq6g4n
+z>oEf8XCt;_Y-iYBWz#<re{?il1^f{S#nht`VW!62^5R*KQ6_?#8e&Qw=9%`og2x!s
+z&J)wlZ=a<yoJkutfwu4%aVXlu?i^8v?R77IyGvKcD|M`CFG$6FUmK8q<|o>3T9EmJ
+z2x?*GPeN%?=Fj3+fv~4%I(nv~XF7VOqi5RsAt%13JtW>q=<<<Gei4)FzWqGEt6P8D
+zA9m}s>;0IkLPSUGL%_1h)2kjaZzuV;`43yCV;I=#Jcyyw@xKE8GGX39@am|0GKhH`
+zawsKv^FvHqm+<DDPT)%}_kZ8^eT88YGmG-#)X3=RRB|L^Uj_{yd%JeO<1HRZVz=Fz
+z+aqUCWdF3_={#Q&&k)eF1i=WV`AbSlzo*bP?x?ir5BVVO`R34f89jWL{Z}or^BwmG
+z-E;A_iWVUUWnWQl3L|~0xA@rHJRA-;7V)Y6B5=@E8R@?(?5{Eh23RefpSOGX_F{8A
+z1PtU+iNng^h#C7J<vufJ9>c8*FfFsu??w)Oed@;Mg~21%rCZ%d{x!>-zmv4AyWL1E
+xfz+CGUnQ7Y^TD}&c_cQRYlBC+`?m?k6Nuw??s04gg4@4`<@FO{XEbO(<xf!`#Pk3F
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c b/src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c
+new file mode 100644
+index 0000000000..e2fa05cd8f
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c
+@@ -0,0 +1,12 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <northbridge/intel/x4x/x4x.h>
++
++void mb_get_spd_map(u8 spd_map[4])
++{
++	// BTX form factor
++	spd_map[0] = 0x53;
++	spd_map[1] = 0x52;
++	spd_map[2] = 0x51;
++	spd_map[3] = 0x50;
++}
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c b/src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c
+new file mode 100644
+index 0000000000..9993f17c55
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c
+@@ -0,0 +1,174 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0  = GPIO_MODE_NATIVE,
++	.gpio1  = GPIO_MODE_NATIVE,
++	.gpio2  = GPIO_MODE_GPIO,
++	.gpio3  = GPIO_MODE_GPIO,
++	.gpio4  = GPIO_MODE_GPIO,
++	.gpio5  = GPIO_MODE_GPIO,
++	.gpio6  = GPIO_MODE_GPIO,
++	.gpio7  = GPIO_MODE_NATIVE,
++	.gpio8  = GPIO_MODE_NATIVE,
++	.gpio9  = GPIO_MODE_GPIO,
++	.gpio10 = GPIO_MODE_GPIO,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_NATIVE,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_NATIVE,
++	.gpio18 = GPIO_MODE_GPIO,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_GPIO,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_GPIO,
++	.gpio31 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio2  = GPIO_DIR_INPUT,
++	.gpio3  = GPIO_DIR_INPUT,
++	.gpio4  = GPIO_DIR_INPUT,
++	.gpio5  = GPIO_DIR_INPUT,
++	.gpio6  = GPIO_DIR_INPUT,
++	.gpio9  = GPIO_DIR_OUTPUT,
++	.gpio10 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio18 = GPIO_DIR_OUTPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio20 = GPIO_DIR_OUTPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_OUTPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++	.gpio30 = GPIO_DIR_INPUT,
++	.gpio31 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio9  = GPIO_LEVEL_HIGH,
++	.gpio18 = GPIO_LEVEL_HIGH,
++	.gpio20 = GPIO_LEVEL_HIGH,
++	.gpio28 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio13 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_GPIO,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_NATIVE,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_NATIVE,
++	.gpio52 = GPIO_MODE_NATIVE,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_GPIO,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio32 = GPIO_DIR_INPUT,
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_INPUT,
++	.gpio35 = GPIO_DIR_OUTPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_OUTPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio56 = GPIO_DIR_OUTPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio35 = GPIO_LEVEL_LOW,
++	.gpio49 = GPIO_LEVEL_HIGH,
++	.gpio56 = GPIO_LEVEL_HIGH,
++	.gpio60 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_NATIVE,
++	.gpio69 = GPIO_MODE_NATIVE,
++	.gpio70 = GPIO_MODE_NATIVE,
++	.gpio71 = GPIO_MODE_NATIVE,
++	.gpio72 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio72 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode      = &pch_gpio_set1_mode,
++		.direction = &pch_gpio_set1_direction,
++		.level     = &pch_gpio_set1_level,
++		.blink     = &pch_gpio_set1_blink,
++		.invert    = &pch_gpio_set1_invert,
++	},
++	.set2 = {
++		.mode      = &pch_gpio_set2_mode,
++		.direction = &pch_gpio_set2_direction,
++		.level     = &pch_gpio_set2_level,
++	},
++	.set3 = {
++		.mode      = &pch_gpio_set3_mode,
++		.direction = &pch_gpio_set3_direction,
++		.level     = &pch_gpio_set3_level,
++	},
++};
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c b/src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c
+new file mode 100644
+index 0000000000..4158bcf899
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c
+@@ -0,0 +1,26 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	/* coreboot specific header */
++	0x11d4194a, /* Analog Devices AD1984A */
++	0xbfd40000, /*  Subsystem ID */
++	10,         /* Number of entries */
++
++	/* Pin Widget Verb Table */
++	AZALIA_PIN_CFG(0, 0x11, 0x032140f0),
++	AZALIA_PIN_CFG(0, 0x12, 0x21214010),
++	AZALIA_PIN_CFG(0, 0x13, 0x901701f0),
++	AZALIA_PIN_CFG(0, 0x14, 0x03a190f0),
++	AZALIA_PIN_CFG(0, 0x15, 0xb7a70121),
++	AZALIA_PIN_CFG(0, 0x16, 0x9933012e),
++	AZALIA_PIN_CFG(0, 0x17, 0x97a601f0),
++	AZALIA_PIN_CFG(0, 0x1a, 0x90f301f0),
++	AZALIA_PIN_CFG(0, 0x1b, 0x014510f0),
++	AZALIA_PIN_CFG(0, 0x1c, 0x21a19020),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb b/src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb
+new file mode 100644
+index 0000000000..555b1c1f5c
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb
+@@ -0,0 +1,10 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/x4x
++	device domain 0 on
++		chip southbridge/intel/i82801jx
++			device pci 1c.0 on  end		# PCIe 1
++			device pci 1c.1 on  end		# PCIe 2
++		end
++	end
++end
+-- 
+2.39.5
+
diff --git a/config/coreboot/next/patches/0002-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/next/patches/0002-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
new file mode 100644
index 00000000..5b77c0e6
--- /dev/null
+++ b/config/coreboot/next/patches/0002-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -0,0 +1,205 @@
+From 1b230f671ebc6e355a001ac7ffc9b031329de019 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sun, 19 Feb 2023 18:21:43 +0000
+Subject: [PATCH 2/3] util/ifdtool: add --nuke flag (all 0xFF on region)
+
+When this option is used, the region's contents are overwritten
+with all ones (0xFF).
+
+Example:
+
+./ifdtool --nuke gbe coreboot.rom
+./ifdtool --nuke bios coreboot.com
+./ifdtool --nuke me coreboot.com
+
+Rebased since the last revision update in lbmk.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
+ 1 file changed, 83 insertions(+), 31 deletions(-)
+
+diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
+index 36477eef66..3ebef74042 100644
+--- a/util/ifdtool/ifdtool.c
++++ b/util/ifdtool/ifdtool.c
+@@ -2217,6 +2217,7 @@ static void print_usage(const char *name)
+ 	       "                                         tgl    - Tiger Lake\n"
+ 	       "                                         wbg    - Wellsburg\n"
+ 	       "   -S | --setpchstrap                    Write a PCH strap\n"
++	       "   -N | --nuke <region>                  Overwrite the specified region with 0xFF (all ones)\n"
+ 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
+ 	       "   -v | --version:                       print the version\n"
+ 	       "   -h | --help:                          print this help\n\n"
+@@ -2225,6 +2226,60 @@ static void print_usage(const char *name)
+ 	       "\n");
+ }
+ 
++static int
++get_region_type_string(const char *region_type_string)
++{
++       if (!strcasecmp("Descriptor", region_type_string))
++               return 0;
++       else if (!strcasecmp("BIOS", region_type_string))
++               return 1;
++       else if (!strcasecmp("ME", region_type_string))
++               return 2;
++       else if (!strcasecmp("GbE", region_type_string))
++               return 3;
++       else if (!strcasecmp("Platform Data", region_type_string))
++               return 4;
++       else if (!strcasecmp("Device Exp1", region_type_string))
++               return 5;
++       else if (!strcasecmp("Secondary BIOS", region_type_string))
++               return 6;
++       else if (!strcasecmp("Reserved", region_type_string))
++               return 7;
++       else if (!strcasecmp("EC", region_type_string))
++               return 8;
++       else if (!strcasecmp("Device Exp2", region_type_string))
++               return 9;
++       else if (!strcasecmp("IE", region_type_string))
++               return 10;
++       else if (!strcasecmp("10GbE_0", region_type_string))
++               return 11;
++       else if (!strcasecmp("10GbE_1", region_type_string))
++               return 12;
++       else if (!strcasecmp("PTT", region_type_string))
++               return 15;
++       return -1;
++}
++
++static void
++nuke(const char *filename, char *image, int size, int region_type)
++{
++       int i;
++       struct region region;
++       const struct frba *frba = find_frba(image, size);
++       if (!frba)
++               exit(EXIT_FAILURE);
++
++       region = get_region(frba, region_type);
++       if (region.size > 0) {
++               for (i = region.base; i <= region.limit; i++) {
++                       if ((i + 1) > (size))
++                               break;
++                       image[i] = 0xFF;
++               }
++               write_image(filename, image, size);
++       }
++}
++
+ int main(int argc, char *argv[])
+ {
+ 	int opt, option_index = 0;
+@@ -2232,6 +2287,7 @@ int main(int argc, char *argv[])
+ 	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
+ 	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
+ 	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
++	int mode_nuke = 0;
+ 	int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
+ 	char *region_type_string = NULL, *region_fname = NULL;
+ 	const char *layout_fname = NULL;
+@@ -2267,6 +2323,7 @@ int main(int argc, char *argv[])
+ 		{"validate", 0, NULL, 't'},
+ 		{"setpchstrap", 1, NULL, 'S'},
+ 		{"newvalue", 1, NULL, 'V'},
++		{"nuke", 1, NULL, 'N'},
+ 		{0, 0, 0, 0}
+ 	};
+ 
+@@ -2316,35 +2373,8 @@ int main(int argc, char *argv[])
+ 			region_fname++;
+ 			// Descriptor, BIOS, ME, GbE, Platform
+ 			// valid type?
+-			if (!strcasecmp("Descriptor", region_type_string))
+-				region_type = 0;
+-			else if (!strcasecmp("BIOS", region_type_string))
+-				region_type = 1;
+-			else if (!strcasecmp("ME", region_type_string))
+-				region_type = 2;
+-			else if (!strcasecmp("GbE", region_type_string))
+-				region_type = 3;
+-			else if (!strcasecmp("Platform Data", region_type_string))
+-				region_type = 4;
+-			else if (!strcasecmp("Device Exp1", region_type_string))
+-				region_type = 5;
+-			else if (!strcasecmp("Secondary BIOS", region_type_string))
+-				region_type = 6;
+-			else if (!strcasecmp("Reserved", region_type_string))
+-				region_type = 7;
+-			else if (!strcasecmp("EC", region_type_string))
+-				region_type = 8;
+-			else if (!strcasecmp("Device Exp2", region_type_string))
+-				region_type = 9;
+-			else if (!strcasecmp("IE", region_type_string))
+-				region_type = 10;
+-			else if (!strcasecmp("10GbE_0", region_type_string))
+-				region_type = 11;
+-			else if (!strcasecmp("10GbE_1", region_type_string))
+-				region_type = 12;
+-			else if (!strcasecmp("PTT", region_type_string))
+-				region_type = 15;
+-			if (region_type == -1) {
++			if ((region_type =
++			    get_region_type_string(region_type_string)) == -1) {
+ 				fprintf(stderr, "No such region type: '%s'\n\n",
+ 					region_type_string);
+ 				fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
+@@ -2521,6 +2551,22 @@ int main(int argc, char *argv[])
+ 		case 't':
+ 			mode_validate = 1;
+ 			break;
++               case 'N':
++                       region_type_string = strdup(optarg);
++                       if (!region_type_string) {
++                               fprintf(stderr, "No region specified\n");
++                               print_usage(argv[0]);
++                               exit(EXIT_FAILURE);
++                       }
++                       if ((region_type =
++                           get_region_type_string(region_type_string)) == -1) {
++                               fprintf(stderr, "No such region type: '%s'\n\n",
++                                       region_type_string);
++                               print_usage(argv[0]);
++                               exit(EXIT_FAILURE);
++                       }
++                       mode_nuke = 1;
++                       break;
+ 		case 'v':
+ 			print_version();
+ 			exit(EXIT_SUCCESS);
+@@ -2540,7 +2586,8 @@ int main(int argc, char *argv[])
+ 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
+ 			mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
+ 			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
+-			(mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) > 1) {
++			(mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
++			mode_nuke) > 1) {
+ 		fprintf(stderr, "You may not specify more than one mode.\n\n");
+ 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
+ 		exit(EXIT_FAILURE);
+@@ -2549,7 +2596,8 @@ int main(int argc, char *argv[])
+ 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
+ 			mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
+ 			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
+-			mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) == 0) {
++			mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
++			mode_nuke) == 0) {
+ 		fprintf(stderr, "You need to specify a mode.\n\n");
+ 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
+ 		exit(EXIT_FAILURE);
+@@ -2662,6 +2710,10 @@ int main(int argc, char *argv[])
+ 		write_image(new_filename, image, size);
+ 	}
+ 
++	if (mode_nuke) {
++		nuke(new_filename, image, size, region_type);
++	}
++
+ 	if (mode_altmedisable) {
+ 		struct fpsba *fpsba = find_fpsba(image, size);
+ 		struct fmsba *fmsba = find_fmsba(image, size);
+-- 
+2.39.5
+
diff --git a/config/coreboot/next/patches/0003-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/next/patches/0003-Remove-warning-for-coreboot-images-built-without-a-p.patch
new file mode 100644
index 00000000..31bf5a42
--- /dev/null
+++ b/config/coreboot/next/patches/0003-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -0,0 +1,39 @@
+From ddc7390d7750eb3b29a6d6fe7bf2400121d639b5 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 12 May 2023 19:55:15 -0600
+Subject: [PATCH 3/3] Remove warning for coreboot images built without a
+ payload
+
+I added this in upstream to prevent people from accidentally flashing
+roms without a payload resulting in a no boot situation, but in
+libreboot lbmk handles the payload and thus this warning always comes
+up. This has caused confusion and concern so just patch it out.
+---
+ payloads/Makefile.mk | 13 +------------
+ 1 file changed, 1 insertion(+), 12 deletions(-)
+
+diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
+index 5f988dac1b..516133880f 100644
+--- a/payloads/Makefile.mk
++++ b/payloads/Makefile.mk
+@@ -50,16 +50,5 @@ distclean-payloads:
+ print-repo-info-payloads:
+ 	-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
+ 
+-ifeq ($(CONFIG_PAYLOAD_NONE),y)
+-show_notices:: warn_no_payload
+-endif
+-
+-warn_no_payload:
+-	printf "\n\t** WARNING **\n"
+-	printf "coreboot has been built without a payload. Writing\n"
+-	printf "a coreboot image without a payload to your board's\n"
+-	printf "flash chip will result in a non-booting system. You\n"
+-	printf "can use cbfstool to add a payload to the image.\n\n"
+-
+ .PHONY: force-payload coreinfo nvramcui
+-.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
++.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
+-- 
+2.39.5
+
diff --git a/config/coreboot/next/target.cfg b/config/coreboot/next/target.cfg
new file mode 100644
index 00000000..f8f6d074
--- /dev/null
+++ b/config/coreboot/next/target.cfg
@@ -0,0 +1,2 @@
+tree="next"
+rev="c21bed6de9359111afd5d6ed6e76b1d2116b216c"
diff --git a/config/ifd/ich10/gbe b/config/ifd/ich10/gbe
new file mode 100644
index 0000000000000000000000000000000000000000..f1f51129183a96debe4432a03eaa7a7879176261
GIT binary patch
literal 8192
zcmeI#y$QlV7{>7@0Z~NZVj!lG99DvjBLp&m1BgyxoytZWzzM8ez}7jE%pn$M;zyMx
zt?+*i?uD24j^o!|RE@Wfrv}bta&-dh+}-T`g(=M;*EhY3U1=zJr=!wkmP)0$-bz!|
z`)B<oTh&v#4*O|ycRQnv-6irBO8HDqk>=-Eft{)-VomDW^rhtew)S~C2q1s}0tg_0
p00IagfB*srAkal1;{V@;i5UbCKmY**5I_I{1Q0*~0R;Y9-~}wH28I9t

literal 0
HcmV?d00001

diff --git a/config/ifd/ich10/ifd_8 b/config/ifd/ich10/ifd_8
new file mode 100644
index 0000000000000000000000000000000000000000..2bc82d7f8beabe216cc38be1d23ee15ed6cc0f23
GIT binary patch
literal 4096
zcma!A`hlO3frW{UNq|{_k%2*k!GMzi3jPxTKuVbz{<Ht*XJBAtU}6B#$l5?W5SC!#
z;6N51ENo6bNd|@nC5GJ0)WpH!CVIN#EHM7)Y2T<_qaiRF0;3@?8UmvsFd71*Aut*O
xqaiRF0;3^7tq?e*AkM(5z^Wkc!N4G@Agb`*0K!)&gwXFDAT-Fnw_Kxr9{^jojeY<C

literal 0
HcmV?d00001

diff --git a/config/ifd/ich10/ifd_8_truncate b/config/ifd/ich10/ifd_8_truncate
new file mode 100644
index 0000000000000000000000000000000000000000..2a9c0932cd523d26673d757b9f53b2978939568a
GIT binary patch
literal 4096
zcma!A`hlO3frXikNq|{_k%2*k!GMzi3jPxTKuVbz{<Hq)XJBAtU}9ik`_GQ7je+6+
ze-M^n;^06QA1rK6K1l|K1|^2v%+$oe;wE~!<18@#=xN`mU85l|8UmvsFd71*Aut*O
zqaiRF0;3@?8UmvsK&=osq#(|~s=%rs@4>(zsvxTH-T=Z^D1^}O9UwHwzPDVXeIEcS
C)Qx)p

literal 0
HcmV?d00001

diff --git a/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg b/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg
new file mode 100644
index 00000000..6dde459a
--- /dev/null
+++ b/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20230628.tar.gz"
+subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20230628.tar.gz"
+subhash="d726e69ebd8b8110690e3aff8d1919b43b0a2185efdeb9131ea8d89d321ca3a318a89c721ea740ae366f31ed3d1c11c2906f8807ee8a190e6f67fe5b2023cea4"
diff --git a/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg b/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg
new file mode 100644
index 00000000..f3e372a4
--- /dev/null
+++ b/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.43.1.tar.xz"
+subfile_bkup="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.43.1.tar.xz"
+subhash="20977ad17729141a2c26d358628f44a0944b84dcfefdec2ba029c2d02f40dfc41cc91c0631044560d2bd6f9a51e1f15846b4b311befbe14f1239f14ff7d57824"
diff --git a/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg b/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg
new file mode 100644
index 00000000..9a4892f5
--- /dev/null
+++ b/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
+subhash="932bdef0cda94bacedf452ab17f103c0cb511ff2cec55e9112fc0328cbf1d803b42595728ea7b200e0a057c03e85626f937012e49a7515bc5dd256b2bf4bc396"
diff --git a/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg
new file mode 100644
index 00000000..fe274faf
--- /dev/null
+++ b/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz"
+subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2"
diff --git a/config/submodule/coreboot/next/intel-microcode/module.cfg b/config/submodule/coreboot/next/intel-microcode/module.cfg
new file mode 100644
index 00000000..cb6c6d46
--- /dev/null
+++ b/config/submodule/coreboot/next/intel-microcode/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/intel-microcode.git"
+subrepo_bkup="https://github.com/coreboot/intel-microcode"
+subhash="fbfe741896c55b36fcbf0560a68be96286103556"
diff --git a/config/submodule/coreboot/next/libgfxinit/module.cfg b/config/submodule/coreboot/next/libgfxinit/module.cfg
new file mode 100644
index 00000000..1ba41724
--- /dev/null
+++ b/config/submodule/coreboot/next/libgfxinit/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libgfxinit.git"
+subrepo_bkup="https://github.com/coreboot/libgfxinit"
+subhash="17cfc92f402493979783585b6581efbd98c0cf07"
diff --git a/config/submodule/coreboot/next/libhwbase/module.cfg b/config/submodule/coreboot/next/libhwbase/module.cfg
new file mode 100644
index 00000000..2937b8b7
--- /dev/null
+++ b/config/submodule/coreboot/next/libhwbase/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libhwbase.git"
+subrepo_bkup="https://github.com/coreboot/libhwbase"
+subhash="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/next/module.list b/config/submodule/coreboot/next/module.list
new file mode 100644
index 00000000..8c520e04
--- /dev/null
+++ b/config/submodule/coreboot/next/module.list
@@ -0,0 +1,11 @@
+3rdparty/intel-microcode
+3rdparty/libgfxinit
+3rdparty/libhwbase
+3rdparty/vboot
+util/crossgcc/tarballs/binutils-2.43.1.tar.xz
+util/crossgcc/tarballs/gcc-14.2.0.tar.xz
+util/crossgcc/tarballs/gmp-6.3.0.tar.xz
+util/crossgcc/tarballs/mpc-1.3.1.tar.gz
+util/crossgcc/tarballs/mpfr-4.2.1.tar.xz
+util/crossgcc/tarballs/nasm-2.16.03.tar.bz2
+util/crossgcc/tarballs/acpica-unix-20230628.tar.gz
diff --git a/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg
new file mode 100644
index 00000000..f98b6444
--- /dev/null
+++ b/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
+subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97"
diff --git a/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg
new file mode 100644
index 00000000..3419bc30
--- /dev/null
+++ b/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475"
diff --git a/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg
new file mode 100644
index 00000000..c98cc71f
--- /dev/null
+++ b/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2"
+subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2"
+subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172"
diff --git a/config/submodule/coreboot/next/vboot/module.cfg b/config/submodule/coreboot/next/vboot/module.cfg
new file mode 100644
index 00000000..917d23fa
--- /dev/null
+++ b/config/submodule/coreboot/next/vboot/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/vboot.git"
+subrepo_bkup="https://github.com/coreboot/vboot"
+subhash="f1f70f46dc5482bb7c654e53ed58d4001e386df2"
diff --git a/config/submodule/coreboot/next/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/next/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
new file mode 100644
index 00000000..1ac41de6
--- /dev/null
+++ b/config/submodule/coreboot/next/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
@@ -0,0 +1,178 @@
+From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
+From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
+Date: Thu, 30 May 2024 14:08:33 -0600
+Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
+ vmlinuz_header_{offset,size}
+
+The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
+wrong:
+
+	if (!vmlinuz_header_size ||
+	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+	    kpart_data) {
+		return 1;
+	}
+
+`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
+unless something has overflowed!  And `vmlinuz_header_offset` hasn't even
+been set yet (besides being initialized to zero)!
+
+GCC will deduce that if the check didn't cause the function to bail, then
+vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
+[2GiB,4GiB).
+
+On platforms where size_t is 32-bits, this is *especially* broken.
+memcpy's size argument must be in the range [0,2GiB).  Because GCC has
+proved that vmlinuz_header_size is higher than that, it will fail to
+compile:
+
+	host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
+
+So, fix the check.
+
+I can now say that what I suspect the original author meant to write would
+be the following patch, if `vmlinuz_header_offset` were already set:
+
+	-kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
+	+now        + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
+
+This hypothesis is supported by `now` not getting incremented by
+`kblob_size` the way it is for the keyblock and preamble sizes.
+
+However, we can also see that even this "corrected" bounds check is
+insufficient: it does not detect the vmlinuz_header overflowing into
+kblob_data.
+
+OK, so let's describe the fix:
+
+Have a `*vmlinuz_header` pointer instead of a
+`uint64_t vmlinuz_header_offset`, to be more similar to all the other
+regions.  With this change, the correct check becomes a simple
+
+      vmlinuz_header + vmlinuz_header_size > kblob_data
+
+While we're at it, make some changes that could have helped avoid this in
+the first place:
+
+ - Add comments.
+ - Calculate the vmlinuz_header offset right away, instead of waiting.
+ - Go ahead and increment `now` by `kblob_size`, to increase regularity.
+
+Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
+---
+ host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
+ 1 file changed, 51 insertions(+), 21 deletions(-)
+
+diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
+index 4ccfcf33..d2c09443 100644
+--- a/host/lib/extract_vmlinuz.c
++++ b/host/lib/extract_vmlinuz.c
+@@ -15,16 +15,44 @@
+ 
+ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 		   void **vmlinuz_out, size_t *vmlinuz_size) {
++	// We're going to be extracting `vmlinuz_header` and
++	// `kblob_data`, and returning the concatenation of them.
++	//
++	// kpart_data = +-[kpart_size]------------------------------------+
++	//              |                                                 |
++	//  keyblock  = | +-[keyblock->keyblock_size]-------------------+ |
++	//              | | struct vb2_keyblock          keyblock       | |
++	//              | | char []                      ...data...     | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  preamble  = | +-[preamble->preamble_size]-------------------+ |
++	//              | | struct vb2_kernel_preamble   preamble       | |
++	//              | | char []                       ...data...    | |
++	//              | | char []                      vmlinuz_header | |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//  kblob_data= | +-[preamble->body_signature.data_size]--------+ |
++	//              | | char []                       ...data...    | |
++	//              | +---------------------------------------------+ |
++	//              |                                                 |
++	//              +-------------------------------------------------+
++
+ 	size_t now = 0;
++	// The 3 sections of kpart_data.
++	struct vb2_keyblock *keyblock = NULL;
+ 	struct vb2_kernel_preamble *preamble = NULL;
+ 	uint8_t *kblob_data = NULL;
+ 	uint32_t kblob_size = 0;
++	// vmlinuz_header
++	uint8_t *vmlinuz_header = NULL;
+ 	uint32_t vmlinuz_header_size = 0;
+-	uint64_t vmlinuz_header_address = 0;
+-	uint64_t vmlinuz_header_offset = 0;
++	// The concatenated result.
+ 	void *vmlinuz = NULL;
+ 
+-	struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
++	// Isolate the 3 sections of kpart_data.
++
++	keyblock = (struct vb2_keyblock *)kpart_data;
+ 	now += keyblock->keyblock_size;
+ 	if (now > kpart_size)
+ 		return 1;
+@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ 
+ 	kblob_data = kpart_data + now;
+ 	kblob_size = preamble->body_signature.data_size;
+-
+-	if (!kblob_data || (now + kblob_size) > kpart_size)
++	now += kblob_size;
++	if (now > kpart_size)
+ 		return 1;
+ 
++	// Find `vmlinuz_header` within `preamble`.
++
+ 	if (preamble->header_version_minor > 0) {
+-		vmlinuz_header_address = preamble->vmlinuz_header_address;
++		// calculate the vmlinuz_header offset from
++		// the beginning of the kpart_data.  The kblob doesn't
++		// include the body_load_offset, but does include
++		// the keyblock and preamble sections.
++		size_t vmlinuz_header_offset =
++			preamble->vmlinuz_header_address -
++			preamble->body_load_address +
++			keyblock->keyblock_size +
++			preamble->preamble_size;
++
++		vmlinuz_header = kpart_data + vmlinuz_header_offset;
+ 		vmlinuz_header_size = preamble->vmlinuz_header_size;
+ 	}
+ 
+-	if (!vmlinuz_header_size ||
+-	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+-	    kpart_data) {
++	if (!vmlinuz_header ||
++	    !vmlinuz_header_size ||
++	    vmlinuz_header + vmlinuz_header_size > kblob_data) {
+ 		return 1;
+ 	}
+ 
+-	// calculate the vmlinuz_header offset from
+-	// the beginning of the kpart_data.  The kblob doesn't
+-	// include the body_load_offset, but does include
+-	// the keyblock and preamble sections.
+-	vmlinuz_header_offset = vmlinuz_header_address -
+-		preamble->body_load_address +
+-		keyblock->keyblock_size +
+-		preamble->preamble_size;
++	// Concatenate and return.
+ 
+ 	vmlinuz = malloc(vmlinuz_header_size + kblob_size);
+ 	if (vmlinuz == NULL)
+ 		return 1;
+-
+-	memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
+-	       vmlinuz_header_size);
+-
++	memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
+ 	memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
+ 
+ 	*vmlinuz_out = vmlinuz;
+-- 
+2.45.1
+

From 38006cb2bc0bbce3fae9b7663ad06c20b8ce1866 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 31 Oct 2024 02:36:55 +0000
Subject: [PATCH 0861/1549] coreboot/dell3050micro: enable coffeelake CPUs

pin mod needed (soldering) but according to mate, you
can use some coffeelake CPUs on these machines, despite
them being intel 7th gen. this includes 8-core chips.

this patch enables the software configuration in coreboot.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../dell3050micro_fsp_16mb/config/libgfxinit_corebootfb       | 4 ++--
 .../coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
index 81dcd9da..1604646b 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
@@ -122,7 +122,7 @@ CONFIG_CBFS_SIZE=0xEEE000
 CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
-CONFIG_MAX_CPUS=8
+CONFIG_MAX_CPUS=16
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
@@ -284,7 +284,7 @@ CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
 CONFIG_SOC_INTEL_KABYLAKE=y
 CONFIG_SKYLAKE_SOC_PCH_H=y
 CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
-# CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU is not set
+CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
 CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
 CONFIG_CBFS_CACHE_ALIGN=8
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
index 1104bc31..c9c4e16a 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
@@ -120,7 +120,7 @@ CONFIG_FMDFILE=""
 CONFIG_MAINBOARD_VENDOR="Dell Inc."
 CONFIG_CBFS_SIZE=0xEEE000
 CONFIG_CONSOLE_SERIAL=y
-CONFIG_MAX_CPUS=8
+CONFIG_MAX_CPUS=16
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
@@ -282,7 +282,7 @@ CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
 CONFIG_SOC_INTEL_KABYLAKE=y
 CONFIG_SKYLAKE_SOC_PCH_H=y
 CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
-# CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU is not set
+CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
 CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
 CONFIG_CBFS_CACHE_ALIGN=8

From 67c92889a866d67132bcc37de6444e0bc56f548c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 31 Oct 2024 05:30:10 +0000
Subject: [PATCH 0862/1549] NEW MAINBOARD: Dell OptiPlex 780 USFF

Thanks go to Nicholas Chin and Lorenzo Aloe for working on
and testing this code. Based on the 780 MT port.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              |   1 +
 .../dell780mt_8mb/config/libgfxinit_txtmode   |   1 +
 .../config/libgfxinit_corebootfb              |   1 +
 .../config/libgfxinit_txtmode                 |   1 +
 .../config/libgfxinit_corebootfb              | 653 ++++++++++++++++++
 .../dell780usff_8mb/config/libgfxinit_txtmode | 649 +++++++++++++++++
 config/coreboot/dell780usff_8mb/target.cfg    |   8 +
 .../config/libgfxinit_corebootfb              | 653 ++++++++++++++++++
 .../config/libgfxinit_txtmode                 | 649 +++++++++++++++++
 .../dell780usff_truncate_8mb/target.cfg       |   8 +
 ...b-dell-optiplex_780-Add-USFF-variant.patch | 326 +++++++++
 11 files changed, 2950 insertions(+)
 create mode 100644 config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/dell780usff_8mb/target.cfg
 create mode 100644 config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/dell780usff_truncate_8mb/target.cfg
 create mode 100644 config/coreboot/next/patches/0004-mb-dell-optiplex_780-Add-USFF-variant.patch

diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
index 6731544b..4174c6ff 100644
--- a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
@@ -150,6 +150,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
index 9793414d..088dd29e 100644
--- a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
@@ -148,6 +148,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
index 87b64924..227505a8 100644
--- a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
@@ -150,6 +150,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
index cef9cdb9..10472423 100644
--- a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
@@ -148,6 +148,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..4931a6ca
--- /dev/null
+++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
@@ -0,0 +1,653 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_usff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..ad8186eb
--- /dev/null
+++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
@@ -0,0 +1,649 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_usff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell780usff_8mb/target.cfg b/config/coreboot/dell780usff_8mb/target.cfg
new file mode 100644
index 00000000..eca44aa2
--- /dev/null
+++ b/config/coreboot/dell780usff_8mb/target.cfg
@@ -0,0 +1,8 @@
+tree="next"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci ata"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..9b4d346b
--- /dev/null
+++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
@@ -0,0 +1,653 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x5FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_usff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=6144
+CONFIG_ROM_SIZE=0x00600000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..bd98f32d
--- /dev/null
+++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
@@ -0,0 +1,649 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x5FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_usff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=6144
+CONFIG_ROM_SIZE=0x00600000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell780usff_truncate_8mb/target.cfg b/config/coreboot/dell780usff_truncate_8mb/target.cfg
new file mode 100644
index 00000000..eca44aa2
--- /dev/null
+++ b/config/coreboot/dell780usff_truncate_8mb/target.cfg
@@ -0,0 +1,8 @@
+tree="next"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci ata"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/next/patches/0004-mb-dell-optiplex_780-Add-USFF-variant.patch b/config/coreboot/next/patches/0004-mb-dell-optiplex_780-Add-USFF-variant.patch
new file mode 100644
index 00000000..875a4b2a
--- /dev/null
+++ b/config/coreboot/next/patches/0004-mb-dell-optiplex_780-Add-USFF-variant.patch
@@ -0,0 +1,326 @@
+From 300f73eae58bfcde26f82814a5e295585b3e3a2a Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Wed, 30 Oct 2024 20:55:25 -0600
+Subject: [PATCH 1/1] mb/dell/optiplex_780: Add USFF variant
+
+Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/optiplex_780/Kconfig       |   5 +
+ src/mainboard/dell/optiplex_780/Kconfig.name  |   3 +
+ .../optiplex_780/variants/780_usff/data.vbt   | Bin 0 -> 1917 bytes
+ .../variants/780_usff/early_init.c            |   9 +
+ .../optiplex_780/variants/780_usff/gpio.c     | 166 ++++++++++++++++++
+ .../optiplex_780/variants/780_usff/hda_verb.c |  26 +++
+ .../variants/780_usff/overridetree.cb         |  10 ++
+ 7 files changed, 219 insertions(+)
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/data.vbt
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb
+
+diff --git a/src/mainboard/dell/optiplex_780/Kconfig b/src/mainboard/dell/optiplex_780/Kconfig
+index 2d06c75c9a..fc649e35d5 100644
+--- a/src/mainboard/dell/optiplex_780/Kconfig
++++ b/src/mainboard/dell/optiplex_780/Kconfig
+@@ -20,6 +20,9 @@ config BOARD_DELL_OPTIPLEX_780_COMMON
+ config BOARD_DELL_OPTIPLEX_780_MT
+ 	select BOARD_DELL_OPTIPLEX_780_COMMON
+ 
++config BOARD_DELL_OPTIPLEX_780_USFF
++	select BOARD_DELL_OPTIPLEX_780_COMMON
++
+ if BOARD_DELL_OPTIPLEX_780_COMMON
+ 
+ config VGA_BIOS_ID
+@@ -30,11 +33,13 @@ config MAINBOARD_DIR
+ 
+ config MAINBOARD_PART_NUMBER
+ 	default "OptiPlex 780 MT" if BOARD_DELL_OPTIPLEX_780_MT
++	default "OptiPlex 780 USFF" if BOARD_DELL_OPTIPLEX_780_USFF
+ 
+ config OVERRIDE_DEVICETREE
+ 	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+ 
+ config VARIANT_DIR
+ 	default "780_mt" if BOARD_DELL_OPTIPLEX_780_MT
++	default "780_usff" if BOARD_DELL_OPTIPLEX_780_USFF
+ 
+ endif # BOARD_DELL_OPTIPLEX_780_COMMON
+diff --git a/src/mainboard/dell/optiplex_780/Kconfig.name b/src/mainboard/dell/optiplex_780/Kconfig.name
+index db7f2e8fe3..bc84c82a79 100644
+--- a/src/mainboard/dell/optiplex_780/Kconfig.name
++++ b/src/mainboard/dell/optiplex_780/Kconfig.name
+@@ -2,3 +2,6 @@
+ 
+ config BOARD_DELL_OPTIPLEX_780_MT
+ 	bool "OptiPlex 780 MT"
++
++config BOARD_DELL_OPTIPLEX_780_USFF
++	bool "OptiPlex 780 USFF"
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/data.vbt b/src/mainboard/dell/optiplex_780/variants/780_usff/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..dbd764f285ed18f7ee9c54bc777560138bd9b5f7
+GIT binary patch
+literal 1917
+zcmd6nO>7%Q6vzLwGv3{}j$^l`v7@w1q*9sEq+2(b3K>`@c5#TSx@i<uQKf!)+gO;|
+zveT#>P+W+B10OwbsGtX=N(gc4jSGjKDkP+yIUo^nsel8$^ny^9H?td8Ra=EiCEn=G
+z@6DV4?!2AdojnUv^Rirgvs$heXUkGs9S+{Jc2WPhP0buTak^BTFP@&N9-E$(UtuSX
+zS{r`=b+EX|Ig`2a*^5oDdG>8jE-1BBxs`*jgrf_sj_fP;%L|PwURRcCFBMCroNRQv
+zmp$2TUhc}qJMB(u#jDG@x6(N85thC4%Z=8hiN}lj&zb2~``u3C;?lCrPQOTnInFqB
+zhvdwqWv?lxTb=fVEH;~RPHDPw&g*&|s$pU<Iv53Rb6YTgMPOY8;~P1Yglh^6Fgt1^
+zCTz|SVPcSpZ44F@&oNPUMO@&BE3y(57YP_Y!4SZhE?GXYa7k+b0(X|s7u3GDRf^1#
+zOd2ZCCPO|I&sHEt;p8UshhHtYQ>7!7x2m<d`Gu2<r+Qc4|6pwd8&zFboH_W7XE7uU
+zWW-@Cim&mdY2!O{JANR)OTJG2z>LBtAF!g>K`zPnkx!DpPHuk6{_zc*0qi7)Aet$T
+z1ks@8hWS#+6cI5)j1oD86{5PX8Zu2(^OC6M`<pE+J?KFZ=&_JVP1YL=#z<-Q*24K4
+zn+$YxrHNJJc`k?_8N=Kres26_#E8GLn2{jfW5P%ge`kL(Btkt=>xo)V)Ow=U6P12c
+z=U0uNC9T9v{)-|#h(mSX*hSA8)ZeocL7l4J&!{RSO{6~oTtyn535j!RQh#GA*wTF8
+zvasRbO~d!?*FbM3K`W?lHx=v*(jiARIhWyh4^io|;n?@1H>uqJy>0sjV-Dt)_=%bE
+zgNO3D@uE5m+7aqi?Y8b+inye%Z=HUmgBtaZ3Lc%OLt+bo+)5BjVwT<{mxT`nde$vb
+zV99s{>`r76L#Hr6XW6r|<iq#4Jr?XsxKyeJKEj7;e4SZ^1B12u&iV_9M0*Kem@fmn
+z1C>>HT47I`**Q#Vu0QW!^VP-9S{xXzpq_zS#9k-;aXz?b+S!Ne$Kkk6dq<Gj{q2D(
+z>&Hj-x+kx1W-4#E&beDT*S)=&NoSE?<-w!G@~aW()0ZN4O&=Q+nZa)p%Vd$k-_$a=
+T#w3FFBiyj<XAh$hb(enud`r7S
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c b/src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c
+new file mode 100644
+index 0000000000..2a55fc3a6e
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <northbridge/intel/x4x/x4x.h>
++
++void mb_get_spd_map(u8 spd_map[4])
++{
++	spd_map[0] = 0x50;
++	spd_map[2] = 0x52;
++}
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c b/src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c
+new file mode 100644
+index 0000000000..389f4077d7
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c
+@@ -0,0 +1,166 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0  = GPIO_MODE_NATIVE,
++	.gpio1  = GPIO_MODE_NATIVE,
++	.gpio2  = GPIO_MODE_GPIO,
++	.gpio3  = GPIO_MODE_GPIO,
++	.gpio4  = GPIO_MODE_GPIO,
++	.gpio5  = GPIO_MODE_GPIO,
++	.gpio6  = GPIO_MODE_GPIO,
++	.gpio7  = GPIO_MODE_NATIVE,
++	.gpio8  = GPIO_MODE_NATIVE,
++	.gpio9  = GPIO_MODE_GPIO,
++	.gpio10 = GPIO_MODE_GPIO,
++	.gpio11 = GPIO_MODE_NATIVE,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_GPIO,
++	.gpio15 = GPIO_MODE_NATIVE,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_NATIVE,
++	.gpio18 = GPIO_MODE_GPIO,
++	.gpio19 = GPIO_MODE_GPIO,
++	.gpio20 = GPIO_MODE_GPIO,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_GPIO,
++	.gpio31 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio2  = GPIO_DIR_INPUT,
++	.gpio3  = GPIO_DIR_INPUT,
++	.gpio4  = GPIO_DIR_INPUT,
++	.gpio5  = GPIO_DIR_INPUT,
++	.gpio6  = GPIO_DIR_INPUT,
++	.gpio9  = GPIO_DIR_OUTPUT,
++	.gpio10 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio14 = GPIO_DIR_INPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio18 = GPIO_DIR_OUTPUT,
++	.gpio19 = GPIO_DIR_INPUT,
++	.gpio20 = GPIO_DIR_OUTPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_OUTPUT,
++	.gpio29 = GPIO_DIR_INPUT,
++	.gpio30 = GPIO_DIR_INPUT,
++	.gpio31 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio9  = GPIO_LEVEL_HIGH,
++	.gpio18 = GPIO_LEVEL_HIGH,
++	.gpio20 = GPIO_LEVEL_HIGH,
++	.gpio28 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio13 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_GPIO,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_NATIVE,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_NATIVE,
++	.gpio46 = GPIO_MODE_NATIVE,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_NATIVE,
++	.gpio52 = GPIO_MODE_NATIVE,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_GPIO,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_GPIO,
++	.gpio61 = GPIO_MODE_NATIVE,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio32 = GPIO_DIR_INPUT,
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_INPUT,
++	.gpio35 = GPIO_DIR_OUTPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_OUTPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio56 = GPIO_DIR_OUTPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++	.gpio35 = GPIO_LEVEL_LOW,
++	.gpio49 = GPIO_LEVEL_HIGH,
++	.gpio56 = GPIO_LEVEL_HIGH,
++	.gpio60 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio72 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio72 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode      = &pch_gpio_set1_mode,
++		.direction = &pch_gpio_set1_direction,
++		.level     = &pch_gpio_set1_level,
++		.blink     = &pch_gpio_set1_blink,
++		.invert    = &pch_gpio_set1_invert,
++	},
++	.set2 = {
++		.mode      = &pch_gpio_set2_mode,
++		.direction = &pch_gpio_set2_direction,
++		.level     = &pch_gpio_set2_level,
++	},
++	.set3 = {
++		.mode      = &pch_gpio_set3_mode,
++		.direction = &pch_gpio_set3_direction,
++		.level     = &pch_gpio_set3_level,
++	},
++};
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c b/src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c
+new file mode 100644
+index 0000000000..c94e06b156
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c
+@@ -0,0 +1,26 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	/* coreboot specific header */
++	0x11d4194a, /* Analog Devices AD1984A */
++	0x10280420, /*  Subsystem ID */
++	10,         /* Number of entries */
++
++	/* Pin Widget Verb Table */
++	AZALIA_PIN_CFG(0, 0x11, 0x02214040),
++	AZALIA_PIN_CFG(0, 0x12, 0x01014010),
++	AZALIA_PIN_CFG(0, 0x13, 0x991301f0),
++	AZALIA_PIN_CFG(0, 0x14, 0x02a19020),
++	AZALIA_PIN_CFG(0, 0x15, 0x01813030),
++	AZALIA_PIN_CFG(0, 0x16, 0x413301f0),
++	AZALIA_PIN_CFG(0, 0x17, 0x41a601f0),
++	AZALIA_PIN_CFG(0, 0x1a, 0x41f301f0),
++	AZALIA_PIN_CFG(0, 0x1b, 0x414501f0),
++	AZALIA_PIN_CFG(0, 0x1c, 0x413301f0),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb b/src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb
+new file mode 100644
+index 0000000000..555b1c1f5c
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb
+@@ -0,0 +1,10 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/x4x
++	device domain 0 on
++		chip southbridge/intel/i82801jx
++			device pci 1c.0 on  end		# PCIe 1
++			device pci 1c.1 on  end		# PCIe 2
++		end
++	end
++end
+-- 
+2.39.5
+

From 14b4838d49556eb544c0f6a96d72128c3480ec2c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 1 Nov 2024 15:59:30 +0000
Subject: [PATCH 0863/1549] coreboot/default: Re-base all patches

There were a lot of unnecessary patches, such as the VRAM
patches; as Nicholas Chin has explained to me, the drivers
for these machines will just allocate what RAM they want
anyway, so in a lot of cases the extra allocated Video RAM
simply reduces the total amount of memory for other uses.

In general, we have a lot of patches that have existed for
years. A much more aggressive sweep will be done in the next
major audit, especially when the revisions are updated again.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...-c3-and-clockgen-to-apple-macbook21.patch} |   4 +-
 ...Set-default-VRAM-to-64MiB-instead-of.patch |  23 ---
 ...2-lenovo-t400-Enable-all-SATA-ports.patch} |   4 +-
 ...t-me_state-Disabled-in-cmos.default.patch} |   9 +-
 ...-Video-RAM-changed-to-default-previo.patch |  23 ---
 ...64MiB-VRAM-the-default-in-cmos.defau.patch |  22 ---
 ...-Disabled-on-all-cmos.default-files.patch} |   4 +-
 ...0-set-VRAM-to-256MiB-VRAM-by-default.patch |  23 ---
 ...ol-add-nuke-flag-all-0xFF-on-region.patch} |   4 +-
 ...o-x200-set-VRAM-to-256MiB-by-default.patch |  23 ---
 ...ble-01.0-device-in-devicetree-for-d.patch} |   4 +-
 ...r-coreboot-images-built-without-a-p.patch} |   4 +-
 ...m-es2l-set-VRAM-to-256MiB-by-default.patch |  23 ---
 ...3t-am3-set-VRAM-to-256MiB-by-default.patch |  23 ---
 ...-dell-Add-Latitude-E6530-Ivy-Bridge.patch} |   4 +-
 ...-dell-Add-Latitude-E5530-Ivy-Bridge.patch} |   4 +-
 ...ovo-X230-patch-gfx_uma_size-224M-by-.patch |  22 ---
 ...ell-Add-Latitude-E6420-Sandy-Bridge.patch} |   4 +-
 ...ell-Add-Latitude-E6520-Sandy-Bridge.patch} |   4 +-
 ...ell-Add-Latitude-E5520-Sandy-Bridge.patch} |   4 +-
 ...ell-Add-Latitude-E5420-Sandy-Bridge.patch} |   4 +-
 ...-x200-t400-Revert-cpu-intel-model_10.patch |  47 -----
 ...ell-Add-Latitude-E6320-Sandy-Bridge.patch} |   4 +-
 ...e-CPUs-don-t-enable-alternative-SMRR.patch | 173 ------------------
 ...ell-Add-Latitude-E6220-Sandy-Bridge.patch} |   4 +-
 ...-dell-Add-Latitude-E6330-Ivy-Bridge.patch} |   4 +-
 ...-dell-Add-Latitude-E6230-Ivy-Bridge.patch} |   4 +-
 ...able-coreboot-related-BL31-features.patch} |   4 +-
 ...e6430-use-ME-Soft-Temporary-Disable.patch} |   4 +-
 ...b-hp-Add-Compaq-Elite-8300-CMT-port.patch} |   4 +-
 ...haswell-make-IOMMU-a-runtime-option.patch} |   4 +-
 ...iplex_9020-Disable-IOMMU-by-default.patch} |   4 +-
 ...ully-disable-iGPU-when-dGPU-is-used.patch} |   4 +-
 ...-mec5035-Replace-defines-with-enums.patch} |   6 +-
 ...-mec5035-Add-S3-suspend-SMI-handler.patch} |   6 +-
 ...ck-policy-regs-when-disabling-IOMMU.patch} |   4 +-
 ...b-intel-gm45-Make-DDR2-raminit-work.patch} |   4 +-
 ...gel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch} |   4 +-
 ...-100-MHz-reference-clock-for-displa.patch} |   4 +-
 ...0029-use-own-mirror-for-acpica-files.patch |  29 ---
 ...vram-allocation-on-more-intel-boards.patch | 142 --------------
 ...=> 0030-haswell-NRI-Initialise-MPLL.patch} |   4 +-
 ...l-NRI-Post-process-selected-timings.patch} |   4 +-
 ...l-NRI-Configure-initial-MC-settings.patch} |   4 +-
 ...-mirrorservice.org-for-gcc-downloads.patch |  36 ----
 ...NRI-Add-timings-refresh-programming.patch} |   4 +-
 ...0034-haswell-NRI-Program-memory-map.patch} |   4 +-
 ...l-NRI-Add-DDR3-JEDEC-reset-and-init.patch} |   4 +-
 ...-haswell-NRI-Add-pre-training-steps.patch} |   4 +-
 ...swell-NRI-Add-REUT-I-O-test-library.patch} |   4 +-
 ...well-NRI-Add-range-tracking-library.patch} |   4 +-
 ...l-NRI-Add-library-to-change-margins.patch} |   4 +-
 ...0040-haswell-NRI-Add-RcvEn-training.patch} |   4 +-
 ...-NRI-Add-function-to-change-margins.patch} |   4 +-
 ...2-haswell-NRI-Add-read-MPR-training.patch} |   4 +-
 ...0043-haswell-NRI-Add-write-leveling.patch} |   4 +-
 ...haswell-NRI-Add-final-raminit-steps.patch} |   4 +-
 ...aswell-NRI-Implement-fast-boot-path.patch} |   4 +-
 ...-Do-sense-amplifier-offset-training.patch} |   4 +-
 ...-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch} |   4 +-
 ...b-dell-Convert-E6400-into-a-variant.patch} |   4 +-
 ...ll-gm45_latitudes-Add-E4300-variant.patch} |   4 +-
 ...d-S3-SMI-handler-for-Dell-Latitudes.patch} |   6 +-
 ...35-Route-power-button-event-to-host.patch} |   6 +-
 64 files changed, 108 insertions(+), 718 deletions(-)
 rename config/coreboot/default/patches/{0002-add-c3-and-clockgen-to-apple-macbook21.patch => 0001-add-c3-and-clockgen-to-apple-macbook21.patch} (94%)
 delete mode 100644 config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
 rename config/coreboot/default/patches/{0009-lenovo-t400-Enable-all-SATA-ports.patch => 0002-lenovo-t400-Enable-all-SATA-ports.patch} (90%)
 rename config/coreboot/default/patches/{0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch => 0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch} (83%)
 delete mode 100644 config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
 delete mode 100644 config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
 rename config/coreboot/default/patches/{0012-set-me_state-Disabled-on-all-cmos.default-files.patch => 0004-set-me_state-Disabled-on-all-cmos.default-files.patch} (97%)
 delete mode 100644 config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch
 rename config/coreboot/default/patches/{0013-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch => 0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch} (98%)
 delete mode 100644 config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch
 rename config/coreboot/default/patches/{0016-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch => 0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch} (86%)
 rename config/coreboot/default/patches/{0017-Remove-warning-for-coreboot-images-built-without-a-p.patch => 0007-Remove-warning-for-coreboot-images-built-without-a-p.patch} (91%)
 delete mode 100644 config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch
 delete mode 100644 config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch
 rename config/coreboot/default/patches/{0018-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch => 0008-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch} (99%)
 rename config/coreboot/default/patches/{0019-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch => 0009-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch} (99%)
 delete mode 100644 config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch
 rename config/coreboot/default/patches/{0020-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch => 0010-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch} (99%)
 rename config/coreboot/default/patches/{0021-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch => 0011-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch} (99%)
 rename config/coreboot/default/patches/{0022-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch => 0012-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch} (99%)
 rename config/coreboot/default/patches/{0023-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch => 0013-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch} (99%)
 delete mode 100644 config/coreboot/default/patches/0014-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
 rename config/coreboot/default/patches/{0024-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch => 0014-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch} (99%)
 delete mode 100644 config/coreboot/default/patches/0015-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
 rename config/coreboot/default/patches/{0025-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch => 0015-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch} (99%)
 rename config/coreboot/default/patches/{0026-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch => 0016-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch} (99%)
 rename config/coreboot/default/patches/{0027-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch => 0017-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch} (99%)
 rename config/coreboot/default/patches/{0028-HACK-Disable-coreboot-related-BL31-features.patch => 0018-HACK-Disable-coreboot-related-BL31-features.patch} (87%)
 rename config/coreboot/default/patches/{0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch => 0019-dell-e6430-use-ME-Soft-Temporary-Disable.patch} (87%)
 rename config/coreboot/default/patches/{0033-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch => 0020-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch} (99%)
 rename config/coreboot/default/patches/{0034-nb-intel-haswell-make-IOMMU-a-runtime-option.patch => 0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch} (98%)
 rename config/coreboot/default/patches/{0035-dell-optiplex_9020-Disable-IOMMU-by-default.patch => 0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch} (87%)
 rename config/coreboot/default/patches/{0036-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch => 0023-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch} (92%)
 rename config/coreboot/default/patches/{0037-ec-dell-mec5035-Replace-defines-with-enums.patch => 0024-ec-dell-mec5035-Replace-defines-with-enums.patch} (95%)
 rename config/coreboot/default/patches/{0038-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch => 0025-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch} (97%)
 rename config/coreboot/default/patches/{0039-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch => 0026-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch} (93%)
 rename config/coreboot/default/patches/{0040-nb-intel-gm45-Make-DDR2-raminit-work.patch => 0027-nb-intel-gm45-Make-DDR2-raminit-work.patch} (98%)
 rename config/coreboot/default/patches/{0041-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch => 0028-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch} (98%)
 rename config/coreboot/default/patches/{0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch => 0029-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch} (92%)
 delete mode 100644 config/coreboot/default/patches/0029-use-own-mirror-for-acpica-files.patch
 delete mode 100644 config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
 rename config/coreboot/default/patches/{0043-haswell-NRI-Initialise-MPLL.patch => 0030-haswell-NRI-Initialise-MPLL.patch} (98%)
 rename config/coreboot/default/patches/{0044-haswell-NRI-Post-process-selected-timings.patch => 0031-haswell-NRI-Post-process-selected-timings.patch} (98%)
 rename config/coreboot/default/patches/{0045-haswell-NRI-Configure-initial-MC-settings.patch => 0032-haswell-NRI-Configure-initial-MC-settings.patch} (99%)
 delete mode 100644 config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch
 rename config/coreboot/default/patches/{0046-haswell-NRI-Add-timings-refresh-programming.patch => 0033-haswell-NRI-Add-timings-refresh-programming.patch} (99%)
 rename config/coreboot/default/patches/{0047-haswell-NRI-Program-memory-map.patch => 0034-haswell-NRI-Program-memory-map.patch} (98%)
 rename config/coreboot/default/patches/{0048-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch => 0035-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch} (99%)
 rename config/coreboot/default/patches/{0049-haswell-NRI-Add-pre-training-steps.patch => 0036-haswell-NRI-Add-pre-training-steps.patch} (99%)
 rename config/coreboot/default/patches/{0050-haswell-NRI-Add-REUT-I-O-test-library.patch => 0037-haswell-NRI-Add-REUT-I-O-test-library.patch} (99%)
 rename config/coreboot/default/patches/{0051-haswell-NRI-Add-range-tracking-library.patch => 0038-haswell-NRI-Add-range-tracking-library.patch} (98%)
 rename config/coreboot/default/patches/{0052-haswell-NRI-Add-library-to-change-margins.patch => 0039-haswell-NRI-Add-library-to-change-margins.patch} (98%)
 rename config/coreboot/default/patches/{0053-haswell-NRI-Add-RcvEn-training.patch => 0040-haswell-NRI-Add-RcvEn-training.patch} (99%)
 rename config/coreboot/default/patches/{0054-haswell-NRI-Add-function-to-change-margins.patch => 0041-haswell-NRI-Add-function-to-change-margins.patch} (98%)
 rename config/coreboot/default/patches/{0055-haswell-NRI-Add-read-MPR-training.patch => 0042-haswell-NRI-Add-read-MPR-training.patch} (99%)
 rename config/coreboot/default/patches/{0056-haswell-NRI-Add-write-leveling.patch => 0043-haswell-NRI-Add-write-leveling.patch} (99%)
 rename config/coreboot/default/patches/{0057-haswell-NRI-Add-final-raminit-steps.patch => 0044-haswell-NRI-Add-final-raminit-steps.patch} (99%)
 rename config/coreboot/default/patches/{0058-Haswell-NRI-Implement-fast-boot-path.patch => 0045-Haswell-NRI-Implement-fast-boot-path.patch} (99%)
 rename config/coreboot/default/patches/{0059-haswell-NRI-Do-sense-amplifier-offset-training.patch => 0046-haswell-NRI-Do-sense-amplifier-offset-training.patch} (99%)
 rename config/coreboot/default/patches/{0060-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch => 0047-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch} (92%)
 rename config/coreboot/default/patches/{0062-mb-dell-Convert-E6400-into-a-variant.patch => 0048-mb-dell-Convert-E6400-into-a-variant.patch} (98%)
 rename config/coreboot/default/patches/{0063-mb-dell-gm45_latitudes-Add-E4300-variant.patch => 0049-mb-dell-gm45_latitudes-Add-E4300-variant.patch} (98%)
 rename config/coreboot/default/patches/{0066-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch => 0050-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch} (94%)
 rename config/coreboot/default/patches/{0067-ec-dell-mec5035-Route-power-button-event-to-host.patch => 0051-ec-dell-mec5035-Route-power-button-event-to-host.patch} (96%)

diff --git a/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch b/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch
similarity index 94%
rename from config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
rename to config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch
index b4ffe7fc..da4ab420 100644
--- a/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
+++ b/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch
@@ -1,7 +1,7 @@
-From 2533ed49003c470a8dbfbf17f6c6a5ef0672c2e2 Mon Sep 17 00:00:00 2001
+From f625e31ee3abb867e775ab0cb724550825699c36 Mon Sep 17 00:00:00 2001
 From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
 Date: Wed, 27 Oct 2021 13:36:01 +0200
-Subject: [PATCH 02/65] add c3 and clockgen to apple/macbook21
+Subject: [PATCH 01/51] add c3 and clockgen to apple/macbook21
 
 ---
  src/mainboard/apple/macbook21/Kconfig       |  1 +
diff --git a/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch b/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
deleted file mode 100644
index 1876db23..00000000
--- a/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From e8eb37e87abfdf6d2bcf60cb15d35650fcfa6665 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@retroboot.org>
-Date: Fri, 19 Mar 2021 05:54:58 +0000
-Subject: [PATCH 01/65] apple/macbook21: Set default VRAM to 64MiB instead of
- 8MiB
-
----
- src/mainboard/apple/macbook21/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/apple/macbook21/cmos.default b/src/mainboard/apple/macbook21/cmos.default
-index b744b11cda..9749e26547 100644
---- a/src/mainboard/apple/macbook21/cmos.default
-+++ b/src/mainboard/apple/macbook21/cmos.default
-@@ -7,4 +7,4 @@ boot_devices=''
- boot_default=0x40
- cmos_defaults_loaded=Yes
- lpt=Enable
--gfx_uma_size=8M
-+gfx_uma_size=64M
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch b/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch
similarity index 90%
rename from config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch
rename to config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch
index 7dead180..ee605e58 100644
--- a/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch
+++ b/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch
@@ -1,7 +1,7 @@
-From 15003992f57b62ce59dc282cd089987306126cc9 Mon Sep 17 00:00:00 2001
+From 8821f229d4fe48153ec7a45e0e04c3b2a3cd8c7c Mon Sep 17 00:00:00 2001
 From: persmule <persmule@gmail.com>
 Date: Sun, 31 Oct 2021 23:33:26 +0000
-Subject: [PATCH 09/65] lenovo/t400: Enable all SATA ports
+Subject: [PATCH 02/51] lenovo/t400: Enable all SATA ports
 
 There are 2 SATA ports on the chassis of t400(s), but at least one dock for
 t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
diff --git a/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch b/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
similarity index 83%
rename from config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
rename to config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
index 375c14fc..a4b430fe 100644
--- a/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
+++ b/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
@@ -1,7 +1,7 @@
-From 47483865af46a3d1f8732d1bd97f4a7155cc24d6 Mon Sep 17 00:00:00 2001
+From 0298639b6e80c8950fbb4484180b7195883ab8c1 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 3 Jan 2022 19:06:22 +0000
-Subject: [PATCH 11/65] lenovo/x230: set me_state=Disabled in cmos.default
+Subject: [PATCH 03/51] lenovo/x230: set me_state=Disabled in cmos.default
 
 I only recently found out about this. It's possible to use me_cleaner to
 do the same thing, but some people might just flash coreboot and not do
@@ -23,16 +23,15 @@ Date:   Thu Nov 21 21:47:31 2019 +0300
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/src/mainboard/lenovo/x230/cmos.default b/src/mainboard/lenovo/x230/cmos.default
-index 3bb78960b9..ae47202aac 100644
+index 732e214b32..8454f0eac0 100644
 --- a/src/mainboard/lenovo/x230/cmos.default
 +++ b/src/mainboard/lenovo/x230/cmos.default
-@@ -17,5 +17,5 @@ trackpoint=Enable
+@@ -17,4 +17,4 @@ trackpoint=Enable
  backlight=Both
  usb_always_on=Disable
  f1_to_f12_as_primary=Enable
 -me_state=Normal
 +me_state=Disabled
- gfx_uma_size=224M
 -- 
 2.39.5
 
diff --git a/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch b/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
deleted file mode 100644
index db064a9d..00000000
--- a/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From 14920409e51a9a0997d488b166d90bfad56f61f1 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@osboot.org>
-Date: Sun, 3 Jan 2021 03:34:01 +0000
-Subject: [PATCH 03/65] lenovo/x60: 64MiB Video RAM changed to default
- (previously it was 8MiB)
-
----
- src/mainboard/lenovo/x60/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/lenovo/x60/cmos.default b/src/mainboard/lenovo/x60/cmos.default
-index 58825c8a36..8e0aaf427d 100644
---- a/src/mainboard/lenovo/x60/cmos.default
-+++ b/src/mainboard/lenovo/x60/cmos.default
-@@ -17,4 +17,4 @@ trackpoint=Enable
- sticky_fn=Disable
- power_management_beeps=Enable
- low_battery_beep=Enable
--gfx_uma_size=8M
-+gfx_uma_size=64M
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch b/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
deleted file mode 100644
index 738d486e..00000000
--- a/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
+++ /dev/null
@@ -1,22 +0,0 @@
-From 92b009babd1e4a63dd34638924b9559727713369 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@osboot.org>
-Date: Mon, 22 Feb 2021 22:16:59 +0000
-Subject: [PATCH 04/65] lenovo/t60: make 64MiB VRAM the default in cmos.default
-
----
- src/mainboard/lenovo/t60/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/lenovo/t60/cmos.default b/src/mainboard/lenovo/t60/cmos.default
-index 283a5747ee..91f6c0e6e2 100644
---- a/src/mainboard/lenovo/t60/cmos.default
-+++ b/src/mainboard/lenovo/t60/cmos.default
-@@ -17,4 +17,4 @@ trackpoint=Enable
- sticky_fn=Disable
- power_management_beeps=Enable
- low_battery_beep=Enable
--gfx_uma_size=8M
-+gfx_uma_size=64M
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch b/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch
similarity index 97%
rename from config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch
rename to config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch
index 28a4a6a4..71695404 100644
--- a/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch
+++ b/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch
@@ -1,7 +1,7 @@
-From 84f7622ea0c3a78742f129d2ec9f437e6c424839 Mon Sep 17 00:00:00 2001
+From c697c90ace86edfe724c86bd6a680cf0ae0e4b58 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Wed, 2 Mar 2022 21:50:01 +0000
-Subject: [PATCH 12/65] set me_state=Disabled on all cmos.default files!
+Subject: [PATCH 04/51] set me_state=Disabled on all cmos.default files!
 
 yeah. why the hell isn't this the default
 
diff --git a/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch b/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch
deleted file mode 100644
index 439679e2..00000000
--- a/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From c7ad2407a7f515d487332382bb55025873c3d987 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Fri, 14 May 2021 13:10:33 +0100
-Subject: [PATCH 05/65] lenovo/t400: set VRAM to 256MiB VRAM by default
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- src/mainboard/lenovo/t400/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/lenovo/t400/cmos.default b/src/mainboard/lenovo/t400/cmos.default
-index a16d386dd1..e7bb32306c 100644
---- a/src/mainboard/lenovo/t400/cmos.default
-+++ b/src/mainboard/lenovo/t400/cmos.default
-@@ -15,4 +15,4 @@ power_management_beeps=Enable
- low_battery_beep=Enable
- sata_mode=AHCI
- hybrid_graphics_mode=Integrated Only
--gfx_uma_size=32M
-+gfx_uma_size=256M
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0013-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
similarity index 98%
rename from config/coreboot/default/patches/0013-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
rename to config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
index a39d14bd..b7b514cd 100644
--- a/config/coreboot/default/patches/0013-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ b/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -1,7 +1,7 @@
-From 851aa297808a4776634df5817cae54c226b4d750 Mon Sep 17 00:00:00 2001
+From d2f579b82921c2c35e4cf756db0ca476fbadfac1 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 13/65] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 05/51] util/ifdtool: add --nuke flag (all 0xFF on region)
 
 When this option is used, the region's contents are overwritten
 with all ones (0xFF).
diff --git a/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch b/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch
deleted file mode 100644
index 477c1724..00000000
--- a/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From 79f686dae47d2ef934b5c95979195f9d3c1978e6 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Fri, 14 May 2021 13:11:59 +0100
-Subject: [PATCH 06/65] lenovo/x200: set VRAM to 256MiB by default
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- src/mainboard/lenovo/x200/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/lenovo/x200/cmos.default b/src/mainboard/lenovo/x200/cmos.default
-index 434af5d227..443ef54e41 100644
---- a/src/mainboard/lenovo/x200/cmos.default
-+++ b/src/mainboard/lenovo/x200/cmos.default
-@@ -14,4 +14,4 @@ sticky_fn=Disable
- power_management_beeps=Enable
- low_battery_beep=Enable
- sata_mode=AHCI
--gfx_uma_size=32M
-+gfx_uma_size=256M
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0016-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch b/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
similarity index 86%
rename from config/coreboot/default/patches/0016-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
rename to config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
index 040834db..71f2f22d 100644
--- a/config/coreboot/default/patches/0016-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
+++ b/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
@@ -1,7 +1,7 @@
-From b925e95cc9d750c56fdbfbd1838b77339c124139 Mon Sep 17 00:00:00 2001
+From a5bc59037dabd95b6595c5aaf38b83da2a91de54 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sat, 6 May 2023 15:53:41 -0600
-Subject: [PATCH 16/65] mb/dell/e6400: Enable 01.0 device in devicetree for
+Subject: [PATCH 06/51] mb/dell/e6400: Enable 01.0 device in devicetree for
  dGPU models
 
 Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
diff --git a/config/coreboot/default/patches/0017-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
similarity index 91%
rename from config/coreboot/default/patches/0017-Remove-warning-for-coreboot-images-built-without-a-p.patch
rename to config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
index eb76118f..fa364ca1 100644
--- a/config/coreboot/default/patches/0017-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ b/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -1,7 +1,7 @@
-From f440b426378314bfbc0f397fdd9bd5bd68d81483 Mon Sep 17 00:00:00 2001
+From f883599a362f1383f3712b72516f76187d0a9cbe Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 17/65] Remove warning for coreboot images built without a
+Subject: [PATCH 07/51] Remove warning for coreboot images built without a
  payload
 
 I added this in upstream to prevent people from accidentally flashing
diff --git a/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch b/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch
deleted file mode 100644
index e435726d..00000000
--- a/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From a79498ab8a7eac809d99db2fad5b0f8c63870e43 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Fri, 14 May 2021 13:18:26 +0100
-Subject: [PATCH 07/65] gigabyte/ga-g41m-es2l: set VRAM to 256MiB by default
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- src/mainboard/gigabyte/ga-g41m-es2l/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default b/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
-index fe79c83570..4a1f97a9d8 100644
---- a/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
-+++ b/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
-@@ -4,4 +4,4 @@ boot_option=Fallback
- debug_level=Debug
- power_on_after_fail=Enable
- nmi=Enable
--gfx_uma_size=64M
-+gfx_uma_size=256M
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch b/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch
deleted file mode 100644
index 9aa1b1cb..00000000
--- a/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From 5fbdbb11b215e3aa4256dfaa468224fd0c2a1fb0 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Fri, 14 May 2021 13:21:39 +0100
-Subject: [PATCH 08/65] acer/g43t-am3: set VRAM to 256MiB by default
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- src/mainboard/acer/g43t-am3/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/acer/g43t-am3/cmos.default b/src/mainboard/acer/g43t-am3/cmos.default
-index 23f0e55f3e..8d6c4db1ce 100644
---- a/src/mainboard/acer/g43t-am3/cmos.default
-+++ b/src/mainboard/acer/g43t-am3/cmos.default
-@@ -5,4 +5,4 @@ debug_level=Debug
- power_on_after_fail=Disable
- nmi=Enable
- sata_mode=AHCI
--gfx_uma_size=64M
-+gfx_uma_size=256M
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0018-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch b/config/coreboot/default/patches/0008-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
similarity index 99%
rename from config/coreboot/default/patches/0018-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
rename to config/coreboot/default/patches/0008-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
index 4d8f0c21..48b9d21e 100644
--- a/config/coreboot/default/patches/0018-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
+++ b/config/coreboot/default/patches/0008-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
@@ -1,7 +1,7 @@
-From e4509a2d3204d8798cc48be37f33e43d07ff5e3b Mon Sep 17 00:00:00 2001
+From 40545928c415c27d3a30748e4bfdee7f9d8f82f9 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sat, 19 Aug 2023 16:19:10 -0600
-Subject: [PATCH 18/65] mb/dell: Add Latitude E6530 (Ivy Bridge)
+Subject: [PATCH 08/51] mb/dell: Add Latitude E6530 (Ivy Bridge)
 
 Mainboard is QALA0/LA-7761P (UMA). The version with a Nvidia dGPU was
 not tested. I do not physically have this system; someone with physical
diff --git a/config/coreboot/default/patches/0019-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch b/config/coreboot/default/patches/0009-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
similarity index 99%
rename from config/coreboot/default/patches/0019-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
rename to config/coreboot/default/patches/0009-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
index 23eef96f..a2a13166 100644
--- a/config/coreboot/default/patches/0019-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
+++ b/config/coreboot/default/patches/0009-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
@@ -1,7 +1,7 @@
-From cfac9aa347e13065c2e24d62091636cc4d0e56be Mon Sep 17 00:00:00 2001
+From 423e2e28618b08a4107aea0a2fbc1096f5a8be02 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Wed, 31 Jan 2024 22:57:07 -0700
-Subject: [PATCH 19/65] mb/dell: Add Latitude E5530 (Ivy Bridge)
+Subject: [PATCH 09/51] mb/dell: Add Latitude E5530 (Ivy Bridge)
 
 Mainboard is QXW10/LA-7902P (UMA). I do not physically have this board;
 someone with physical access to one sent me the output of autoport which
diff --git a/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch b/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch
deleted file mode 100644
index e5cac363..00000000
--- a/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch
+++ /dev/null
@@ -1,22 +0,0 @@
-From f8ea06883762c906a7f3ad7d286b628bca3443ab Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Mon, 20 Dec 2021 01:29:31 +0000
-Subject: [PATCH 10/65] coreboot: Add Lenovo X230 patch: gfx_uma_size 224M by
- default
-
----
- src/mainboard/lenovo/x230/cmos.default | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/src/mainboard/lenovo/x230/cmos.default b/src/mainboard/lenovo/x230/cmos.default
-index 732e214b32..3bb78960b9 100644
---- a/src/mainboard/lenovo/x230/cmos.default
-+++ b/src/mainboard/lenovo/x230/cmos.default
-@@ -18,3 +18,4 @@ backlight=Both
- usb_always_on=Disable
- f1_to_f12_as_primary=Enable
- me_state=Normal
-+gfx_uma_size=224M
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch b/config/coreboot/default/patches/0010-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
similarity index 99%
rename from config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
rename to config/coreboot/default/patches/0010-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
index e42b7c9a..80b2c147 100644
--- a/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
+++ b/config/coreboot/default/patches/0010-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
@@ -1,7 +1,7 @@
-From e5ed7361d41b89ee38b572beb921924b33cc174d Mon Sep 17 00:00:00 2001
+From 200668a694f1c534a94a0bc8996416e246fe91b0 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sun, 26 Nov 2023 17:08:52 -0700
-Subject: [PATCH 20/65] mb/dell: Add Latitude E6420 (Sandy Bridge)
+Subject: [PATCH 10/51] mb/dell: Add Latitude E6420 (Sandy Bridge)
 
 Mainboard is PAL50/LA-6591P (UMA). The version with an Nvidia dGPU was
 not tested. I do not physically have this system; someone with physical
diff --git a/config/coreboot/default/patches/0021-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch b/config/coreboot/default/patches/0011-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
similarity index 99%
rename from config/coreboot/default/patches/0021-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
rename to config/coreboot/default/patches/0011-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
index 9c210c8c..2b378406 100644
--- a/config/coreboot/default/patches/0021-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
+++ b/config/coreboot/default/patches/0011-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
@@ -1,7 +1,7 @@
-From 73313e682ba8808f8db6259ac7d93f54c11cb884 Mon Sep 17 00:00:00 2001
+From 53abe363f2fa038080a976f2d3a2c63ee8da9022 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Wed, 31 Jan 2024 22:07:25 -0700
-Subject: [PATCH 21/65] mb/dell: Add Latitude E6520 (Sandy Bridge)
+Subject: [PATCH 11/51] mb/dell: Add Latitude E6520 (Sandy Bridge)
 
 Mainboard is PAL60/LA-6562P (UMA). The version with an Nvidia dGPU was
 not tested. I do not physically have this system; someone with physical
diff --git a/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch b/config/coreboot/default/patches/0012-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch
similarity index 99%
rename from config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch
rename to config/coreboot/default/patches/0012-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch
index 3a580662..4fd3bba2 100644
--- a/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch
+++ b/config/coreboot/default/patches/0012-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch
@@ -1,7 +1,7 @@
-From a7e2fde426280a944916c341586361f3ac9fa9a8 Mon Sep 17 00:00:00 2001
+From 3f8eade6150f582129332f6347e9a685f8a7b500 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Wed, 7 Feb 2024 10:23:38 -0700
-Subject: [PATCH 22/65] mb/dell: Add Latitude E5520 (Sandy Bridge)
+Subject: [PATCH 12/51] mb/dell: Add Latitude E5520 (Sandy Bridge)
 
 Mainboard is Krug 15". I do not physically have this system; someone
 with physical access to one sent me the output of autoport which I then
diff --git a/config/coreboot/default/patches/0023-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch b/config/coreboot/default/patches/0013-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
similarity index 99%
rename from config/coreboot/default/patches/0023-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
rename to config/coreboot/default/patches/0013-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
index 4a7a6bf9..5944535f 100644
--- a/config/coreboot/default/patches/0023-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
+++ b/config/coreboot/default/patches/0013-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
@@ -1,7 +1,7 @@
-From f781a8bac250d4902ec3e7caa0628c77836a8ae3 Mon Sep 17 00:00:00 2001
+From bbcd6a7f09ee99f3b26b0931f1dcd70970242ee8 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 4 Mar 2024 18:05:43 -0700
-Subject: [PATCH 23/65] mb/dell: Add Latitude E5420 (Sandy Bridge)
+Subject: [PATCH 13/51] mb/dell: Add Latitude E5420 (Sandy Bridge)
 
 Mainboard is Krug 14". I do not physically have this system; someone
 with physical access to one sent me the output of autoport which I then
diff --git a/config/coreboot/default/patches/0014-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch b/config/coreboot/default/patches/0014-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
deleted file mode 100644
index 23677556..00000000
--- a/config/coreboot/default/patches/0014-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From a1a4312c9bea5b7fb5170174dbd14f914c11637c Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Wed, 1 Dec 2021 02:53:00 +0000
-Subject: [PATCH 14/65] fix speedstep on x200/t400: Revert
- "cpu/intel/model_1067x: enable PECI"
-
-This reverts commit 70fea013c7ebd6d85a7806748233fcfd76802f5f.
-
-Enabling PECI without microcode updates loaded causes the CPUID feature set
-to become corrupted. And one consequence is broken SpeedStep. At least, that's
-my understanding looking at Intel Errata. This revert is not a fix, because
-upstream is correct (upstream assumes microcode updates). We will simply
-maintain this revert patch in Libreboot, from now on.
----
- src/cpu/intel/model_1067x/model_1067x_init.c | 9 ---------
- 1 file changed, 9 deletions(-)
-
-diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
-index d051e8915b..30ba2bf0c6 100644
---- a/src/cpu/intel/model_1067x/model_1067x_init.c
-+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
-@@ -141,8 +141,6 @@ static void configure_emttm_tables(void)
- 	wrmsr(MSR_EMTTM_CR_TABLE(5), msr);
- }
- 
--#define IA32_PECI_CTL		0x5a0
--
- static void configure_misc(const int eist, const int tm2, const int emttm)
- {
- 	msr_t msr;
-@@ -185,13 +183,6 @@ static void configure_misc(const int eist, const int tm2, const int emttm)
- 		msr.lo |= (1 << 20);	/* Lock Enhanced SpeedStep Enable */
- 		wrmsr(IA32_MISC_ENABLE, msr);
- 	}
--
--	/* Enable PECI
--	   WARNING: due to Erratum AW67 described in Intel document #318733
--	   the microcode must be updated before this MSR is written to. */
--	msr = rdmsr(IA32_PECI_CTL);
--	msr.lo |= 1;
--	wrmsr(IA32_PECI_CTL, msr);
- }
- 
- #define PIC_SENS_CFG	0x1aa
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0024-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch b/config/coreboot/default/patches/0014-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch
similarity index 99%
rename from config/coreboot/default/patches/0024-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch
rename to config/coreboot/default/patches/0014-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch
index 9ae5ce64..e8c46203 100644
--- a/config/coreboot/default/patches/0024-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch
+++ b/config/coreboot/default/patches/0014-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch
@@ -1,7 +1,7 @@
-From 85a0905b600c1f532c462047941da6e7c2bb47c2 Mon Sep 17 00:00:00 2001
+From cd6e699649459fa5ff2623018ccf3585eb3d3821 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Wed, 7 Feb 2024 15:23:46 -0700
-Subject: [PATCH 24/65] mb/dell: Add Latitude E6320 (Sandy Bridge)
+Subject: [PATCH 14/51] mb/dell: Add Latitude E6320 (Sandy Bridge)
 
 Mainboard is PAL70/LA-6611P. I do not physically have this system;
 someone with physical access to one sent me the output of autoport which
diff --git a/config/coreboot/default/patches/0015-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch b/config/coreboot/default/patches/0015-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
deleted file mode 100644
index 731742d3..00000000
--- a/config/coreboot/default/patches/0015-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
+++ /dev/null
@@ -1,173 +0,0 @@
-From 7e366e5d4d56aade1cb8de8433eb2b02cc9aceef Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Mon, 17 Apr 2023 15:49:57 +0100
-Subject: [PATCH 15/65] GM45-type CPUs: don't enable alternative SMRR
-
-This reverts the changes in coreboot revision:
-df7aecd92643d207feaf7fd840f8835097346644
-
-While this fix is *technically correct*, the one in
-coreboot, it breaks rebooting as tested on several
-GM45 ThinkPads e.g. X200, T400, when microcode
-updates are not applied.
-
-Since November 2022, Libreboot includes microcode
-updates by default, but it tells users how to remove
-it from the ROM (with cbfstool) if they wish.
-
-Well, with Libreboot 20221214, 20230319 and 20230413,
-mitigations present in Libreboot 20220710 (which did
-not have microcode updates) do not exist.
-
-This patch, along with the other patch to remove PECI
-support (which breaks speedstep when microcode updates
-are not applied) have now been re-added to Libreboot.
-
-It is still best to use microcode updates by default.
-These patches in coreboot are not critically urgent,
-and you can use the machines with or without them,
-regardless of ucode.
-
-I'll probably re-write this and the other patch at
-some point, applying the change conditionally upon
-whether or not microcode is applied.
-
-Pragmatism is a good thing. I recommend it.
----
- src/cpu/intel/model_1067x/model_1067x_init.c |  4 +++
- src/cpu/intel/model_1067x/mp_init.c          | 26 --------------------
- src/cpu/intel/model_106cx/model_106cx_init.c |  4 +++
- src/cpu/intel/model_6ex/model_6ex_init.c     |  4 +++
- src/cpu/intel/model_6fx/model_6fx_init.c     |  4 +++
- 5 files changed, 16 insertions(+), 26 deletions(-)
-
-diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
-index 30ba2bf0c6..312046901a 100644
---- a/src/cpu/intel/model_1067x/model_1067x_init.c
-+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
-@@ -8,6 +8,7 @@
- #include <cpu/x86/cache.h>
- #include <cpu/x86/name.h>
- #include <cpu/intel/smm_reloc.h>
-+#include <cpu/intel/common/common.h>
- 
- #define MSR_BBL_CR_CTL3		0x11e
- 
-@@ -234,6 +235,9 @@ static void model_1067x_init(struct device *cpu)
- 	fill_processor_name(processor_name);
- 	printk(BIOS_INFO, "CPU: %s.\n", processor_name);
- 
-+	/* Set virtualization based on Kconfig option */
-+	set_vmx_and_lock();
-+
- 	/* Configure C States */
- 	configure_c_states(quad);
- 
-diff --git a/src/cpu/intel/model_1067x/mp_init.c b/src/cpu/intel/model_1067x/mp_init.c
-index bc53214310..72f40f6762 100644
---- a/src/cpu/intel/model_1067x/mp_init.c
-+++ b/src/cpu/intel/model_1067x/mp_init.c
-@@ -43,34 +43,8 @@ static void pre_mp_smm_init(void)
- 	smm_initialize();
- }
- 
--#define SMRR_SUPPORTED (1 << 11)
--
- static void per_cpu_smm_trigger(void)
- {
--	msr_t mtrr_cap = rdmsr(MTRR_CAP_MSR);
--	if (cpu_has_alternative_smrr() && mtrr_cap.lo & SMRR_SUPPORTED) {
--		set_feature_ctrl_vmx();
--		msr_t ia32_ft_ctrl = rdmsr(IA32_FEATURE_CONTROL);
--		/* We don't care if the lock is already setting
--		   as our smm relocation handler is able to handle
--		   setups where SMRR is not enabled here. */
--		if (ia32_ft_ctrl.lo & (1 << 0)) {
--			/* IA32_FEATURE_CONTROL locked. If we set it again we
--			   get an illegal instruction. */
--			printk(BIOS_DEBUG, "IA32_FEATURE_CONTROL already locked\n");
--			printk(BIOS_DEBUG, "SMRR status: %senabled\n",
--			       ia32_ft_ctrl.lo & (1 << 3) ? "" : "not ");
--		} else {
--			if (!CONFIG(SET_IA32_FC_LOCK_BIT))
--				printk(BIOS_INFO,
--				       "Overriding CONFIG(SET_IA32_FC_LOCK_BIT) to enable SMRR\n");
--			ia32_ft_ctrl.lo |= (1 << 3) | (1 << 0);
--			wrmsr(IA32_FEATURE_CONTROL, ia32_ft_ctrl);
--		}
--	} else {
--		set_vmx_and_lock();
--	}
--
- 	/* Relocate the SMM handler. */
- 	smm_relocate();
- }
-diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
-index 05f5f327cc..0450c2ad83 100644
---- a/src/cpu/intel/model_106cx/model_106cx_init.c
-+++ b/src/cpu/intel/model_106cx/model_106cx_init.c
-@@ -7,6 +7,7 @@
- #include <cpu/intel/speedstep.h>
- #include <cpu/x86/cache.h>
- #include <cpu/x86/name.h>
-+#include <cpu/intel/common/common.h>
- 
- #define HIGHEST_CLEVEL		3
- static void configure_c_states(void)
-@@ -66,6 +67,9 @@ static void model_106cx_init(struct device *cpu)
- 	fill_processor_name(processor_name);
- 	printk(BIOS_INFO, "CPU: %s.\n", processor_name);
- 
-+	/* Set virtualization based on Kconfig option */
-+	set_vmx_and_lock();
-+
- 	/* Configure C States */
- 	configure_c_states();
- 
-diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c
-index 5bd1c32815..f3bb08cde3 100644
---- a/src/cpu/intel/model_6ex/model_6ex_init.c
-+++ b/src/cpu/intel/model_6ex/model_6ex_init.c
-@@ -7,6 +7,7 @@
- #include <cpu/intel/speedstep.h>
- #include <cpu/x86/cache.h>
- #include <cpu/x86/name.h>
-+#include <cpu/intel/common/common.h>
- 
- #define HIGHEST_CLEVEL		3
- static void configure_c_states(void)
-@@ -105,6 +106,9 @@ static void model_6ex_init(struct device *cpu)
- 	/* Setup Page Attribute Tables (PAT) */
- 	// TODO set up PAT
- 
-+	/* Set virtualization based on Kconfig option */
-+	set_vmx_and_lock();
-+
- 	/* Configure C States */
- 	configure_c_states();
- 
-diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c
-index 535fb8fae7..f7b05facd2 100644
---- a/src/cpu/intel/model_6fx/model_6fx_init.c
-+++ b/src/cpu/intel/model_6fx/model_6fx_init.c
-@@ -7,6 +7,7 @@
- #include <cpu/intel/speedstep.h>
- #include <cpu/x86/cache.h>
- #include <cpu/x86/name.h>
-+#include <cpu/intel/common/common.h>
- 
- #define HIGHEST_CLEVEL		3
- static void configure_c_states(void)
-@@ -118,6 +119,9 @@ static void model_6fx_init(struct device *cpu)
- 	/* Setup Page Attribute Tables (PAT) */
- 	// TODO set up PAT
- 
-+	/* Set virtualization based on Kconfig option */
-+	set_vmx_and_lock();
-+
- 	/* Configure C States */
- 	configure_c_states();
- 
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0025-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch b/config/coreboot/default/patches/0015-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch
similarity index 99%
rename from config/coreboot/default/patches/0025-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch
rename to config/coreboot/default/patches/0015-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch
index 668c0063..e2be42c9 100644
--- a/config/coreboot/default/patches/0025-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch
+++ b/config/coreboot/default/patches/0015-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch
@@ -1,7 +1,7 @@
-From 817b0d543444e52ddfde536ded52509456dcbbf2 Mon Sep 17 00:00:00 2001
+From a32431d5f7574ffa6391221c7740f1739203eaa7 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 8 Mar 2024 09:27:36 -0700
-Subject: [PATCH 25/65] mb/dell: Add Latitude E6220 (Sandy Bridge)
+Subject: [PATCH 15/51] mb/dell: Add Latitude E6220 (Sandy Bridge)
 
 Mainboard is codenamed Vida. I do not physically have this system;
 someone with physical access to one sent me the output of autoport which
diff --git a/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch b/config/coreboot/default/patches/0016-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch
similarity index 99%
rename from config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch
rename to config/coreboot/default/patches/0016-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch
index d88e97b3..7d2133ef 100644
--- a/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch
+++ b/config/coreboot/default/patches/0016-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch
@@ -1,7 +1,7 @@
-From 48347cf8bc52db7a454a7be8cbc6f9d9eb67b8b0 Mon Sep 17 00:00:00 2001
+From 0889cc6b6f62cba616feff5ae8558be31f298069 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 8 Mar 2024 09:33:03 -0700
-Subject: [PATCH 26/65] mb/dell: Add Latitude E6330 (Ivy Bridge)
+Subject: [PATCH 16/51] mb/dell: Add Latitude E6330 (Ivy Bridge)
 
 Mainboard is QAL70/LA-7741P. I do not physically have this system;
 someone with physical access to one sent me the output of autoport which
diff --git a/config/coreboot/default/patches/0027-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch b/config/coreboot/default/patches/0017-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch
similarity index 99%
rename from config/coreboot/default/patches/0027-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch
rename to config/coreboot/default/patches/0017-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch
index bd6f6218..412b8471 100644
--- a/config/coreboot/default/patches/0027-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch
+++ b/config/coreboot/default/patches/0017-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch
@@ -1,7 +1,7 @@
-From 80af5303da07197a7da5262e82a59b691ffed5a2 Mon Sep 17 00:00:00 2001
+From 84d7f3201eb4492acd7d290a02d19c4850c85791 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Thu, 26 Oct 2017 21:26:43 +0800
-Subject: [PATCH 27/65] mb/dell: Add Latitude E6230 (Ivy Bridge)
+Subject: [PATCH 17/51] mb/dell: Add Latitude E6230 (Ivy Bridge)
 
 This was adapted from CB:22693 from Iru Cai, which was based on
 autoport. I do not physically have this system. Someone with physical
diff --git a/config/coreboot/default/patches/0028-HACK-Disable-coreboot-related-BL31-features.patch b/config/coreboot/default/patches/0018-HACK-Disable-coreboot-related-BL31-features.patch
similarity index 87%
rename from config/coreboot/default/patches/0028-HACK-Disable-coreboot-related-BL31-features.patch
rename to config/coreboot/default/patches/0018-HACK-Disable-coreboot-related-BL31-features.patch
index e6ad26d1..9592215d 100644
--- a/config/coreboot/default/patches/0028-HACK-Disable-coreboot-related-BL31-features.patch
+++ b/config/coreboot/default/patches/0018-HACK-Disable-coreboot-related-BL31-features.patch
@@ -1,7 +1,7 @@
-From 8fa72bedc6282ba581ede85d62a341917ec5d203 Mon Sep 17 00:00:00 2001
+From ec27f5414c78d493ec7be4cd055ac877ce9ea178 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Thu, 22 Jun 2023 16:44:27 +0300
-Subject: [PATCH 28/65] HACK: Disable coreboot related BL31 features
+Subject: [PATCH 18/51] HACK: Disable coreboot related BL31 features
 
 I don't know why, but removing this BL31 make argument lets gru-kevin
 power off properly when shut down from Linux. Needs investigation.
diff --git a/config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch b/config/coreboot/default/patches/0019-dell-e6430-use-ME-Soft-Temporary-Disable.patch
similarity index 87%
rename from config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch
rename to config/coreboot/default/patches/0019-dell-e6430-use-ME-Soft-Temporary-Disable.patch
index ed0a7a08..b3d2d12c 100644
--- a/config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch
+++ b/config/coreboot/default/patches/0019-dell-e6430-use-ME-Soft-Temporary-Disable.patch
@@ -1,7 +1,7 @@
-From 7b1caf7260ab468fa2f0e6d73090c5412bc0254d Mon Sep 17 00:00:00 2001
+From a15b59616e00c43c05d7853080859d4aefe26c5d Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 11:41:41 +0000
-Subject: [PATCH 31/65] dell/e6430: use ME Soft Temporary Disable
+Subject: [PATCH 19/51] dell/e6430: use ME Soft Temporary Disable
 
 i overlooked this. it's set on other boards.
 
diff --git a/config/coreboot/default/patches/0033-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch b/config/coreboot/default/patches/0020-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
similarity index 99%
rename from config/coreboot/default/patches/0033-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
rename to config/coreboot/default/patches/0020-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
index 9b24c26e..46e38925 100644
--- a/config/coreboot/default/patches/0033-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
+++ b/config/coreboot/default/patches/0020-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
@@ -1,7 +1,7 @@
-From 3697d2e2df764bd2f1b05a6856e035b606f6a360 Mon Sep 17 00:00:00 2001
+From 440ebbe1e10911dc3d8c53cf9eecb5519c2ecd67 Mon Sep 17 00:00:00 2001
 From: Riku Viitanen <riku.viitanen@protonmail.com>
 Date: Sat, 23 Dec 2023 19:02:10 +0200
-Subject: [PATCH 33/65] mb/hp: Add Compaq Elite 8300 CMT port
+Subject: [PATCH 20/51] mb/hp: Add Compaq Elite 8300 CMT port
 
 Based on autoport and Z220 SuperIO code.
 
diff --git a/config/coreboot/default/patches/0034-nb-intel-haswell-make-IOMMU-a-runtime-option.patch b/config/coreboot/default/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
similarity index 98%
rename from config/coreboot/default/patches/0034-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
rename to config/coreboot/default/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
index 35d0046f..b3305e58 100644
--- a/config/coreboot/default/patches/0034-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
+++ b/config/coreboot/default/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
@@ -1,7 +1,7 @@
-From 0ad294f2da8085d5612f7940ec8601d979cb2421 Mon Sep 17 00:00:00 2001
+From 4c7577314f19e934d690c4cce3642fe693400c07 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 2 Mar 2024 22:51:09 +0000
-Subject: [PATCH 34/65] nb/intel/haswell: make IOMMU a runtime option
+Subject: [PATCH 21/51] nb/intel/haswell: make IOMMU a runtime option
 
 When I tested graphics cards on a coreboot port for Dell
 OptiPlex 9020 SFF, I could not use a graphics card unless
diff --git a/config/coreboot/default/patches/0035-dell-optiplex_9020-Disable-IOMMU-by-default.patch b/config/coreboot/default/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch
similarity index 87%
rename from config/coreboot/default/patches/0035-dell-optiplex_9020-Disable-IOMMU-by-default.patch
rename to config/coreboot/default/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch
index 9596d6f3..f18f119e 100644
--- a/config/coreboot/default/patches/0035-dell-optiplex_9020-Disable-IOMMU-by-default.patch
+++ b/config/coreboot/default/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch
@@ -1,7 +1,7 @@
-From 80d728b91ec793f584bcf045f00e5fe4bba5e4ae Mon Sep 17 00:00:00 2001
+From b5695d0f0dc44ed1eb1feac008e601040feda55d Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 2 Mar 2024 23:00:09 +0000
-Subject: [PATCH 35/65] dell/optiplex_9020: Disable IOMMU by default
+Subject: [PATCH 22/51] dell/optiplex_9020: Disable IOMMU by default
 
 Needed to make graphics cards work. Turning it on is
 recommended if only using iGPU, otherwise leave it off
diff --git a/config/coreboot/default/patches/0036-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch b/config/coreboot/default/patches/0023-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
similarity index 92%
rename from config/coreboot/default/patches/0036-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
rename to config/coreboot/default/patches/0023-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
index cf6f20bb..f9d80b9f 100644
--- a/config/coreboot/default/patches/0036-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
+++ b/config/coreboot/default/patches/0023-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
@@ -1,7 +1,7 @@
-From dba9c3776f90bf345070a90c048ff2bae7180f73 Mon Sep 17 00:00:00 2001
+From d86824305f11bc684f1e91e3826158b8c7d7e0ee Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 6 Apr 2024 01:22:47 +0100
-Subject: [PATCH 36/65] nb/haswell: Fully disable iGPU when dGPU is used
+Subject: [PATCH 23/51] nb/haswell: Fully disable iGPU when dGPU is used
 
 My earlier patch disabled decode *and* disabled the iGPU itself, but
 a subsequent revision disabled only VGA decode. Upon revisiting, I
diff --git a/config/coreboot/default/patches/0037-ec-dell-mec5035-Replace-defines-with-enums.patch b/config/coreboot/default/patches/0024-ec-dell-mec5035-Replace-defines-with-enums.patch
similarity index 95%
rename from config/coreboot/default/patches/0037-ec-dell-mec5035-Replace-defines-with-enums.patch
rename to config/coreboot/default/patches/0024-ec-dell-mec5035-Replace-defines-with-enums.patch
index 77011bce..6c1118bb 100644
--- a/config/coreboot/default/patches/0037-ec-dell-mec5035-Replace-defines-with-enums.patch
+++ b/config/coreboot/default/patches/0024-ec-dell-mec5035-Replace-defines-with-enums.patch
@@ -1,7 +1,7 @@
-From 7420608acfca1790756fd80d718b737352379dbe Mon Sep 17 00:00:00 2001
+From a1566875789469ebd91e472301be4b359aac0a4c Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Tue, 28 May 2024 17:23:21 -0600
-Subject: [PATCH 37/38] ec/dell/mec5035: Replace defines with enums
+Subject: [PATCH 24/51] ec/dell/mec5035: Replace defines with enums
 
 Instead of using defines for command IDs and argument values, use enums
 to provide more type safety. This also has the effect of moving the
@@ -87,5 +87,5 @@ index fa15a9d621..32f791cb01 100644
  void mec5035_early_init(void);
  void mec5035_control_radio(enum ec_radio_dev device, enum ec_radio_state state);
 -- 
-2.47.0
+2.39.5
 
diff --git a/config/coreboot/default/patches/0038-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch b/config/coreboot/default/patches/0025-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
similarity index 97%
rename from config/coreboot/default/patches/0038-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
rename to config/coreboot/default/patches/0025-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
index 7c96d9f9..ed620a3e 100644
--- a/config/coreboot/default/patches/0038-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
+++ b/config/coreboot/default/patches/0025-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
@@ -1,7 +1,7 @@
-From 762f5d95d2314c3d09c1562d36d111dcdb9c8b93 Mon Sep 17 00:00:00 2001
+From 2fdd5bbb2bbec76c3c2238c4cd471b9b63073942 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 3 May 2024 11:03:32 -0600
-Subject: [PATCH 38/38] ec/dell/mec5035: Add S3 suspend SMI handler
+Subject: [PATCH 25/51] ec/dell/mec5035: Add S3 suspend SMI handler
 
 This is necessary for S3 resume to work on SNB and newer Dell Latitude
 laptops. If a command isn't sent, the EC cuts power to the DIMMs,
@@ -143,5 +143,5 @@ index 0000000000..958733bf97
 +	}
 +}
 -- 
-2.47.0
+2.39.5
 
diff --git a/config/coreboot/default/patches/0039-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch b/config/coreboot/default/patches/0026-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
similarity index 93%
rename from config/coreboot/default/patches/0039-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
rename to config/coreboot/default/patches/0026-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
index 2b5173c5..fe9034b0 100644
--- a/config/coreboot/default/patches/0039-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
+++ b/config/coreboot/default/patches/0026-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
@@ -1,7 +1,7 @@
-From b24c5caf5a8f63555d3b71e7a786c822a4c262cc Mon Sep 17 00:00:00 2001
+From ce7d65790b9b8656ebbaa0ca715adff6a9c25588 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 4 May 2024 02:00:53 +0100
-Subject: [PATCH 39/65] nb/haswell: lock policy regs when disabling IOMMU
+Subject: [PATCH 26/51] nb/haswell: lock policy regs when disabling IOMMU
 
 Angel Pons told me I should do it. See comments here:
 https://review.coreboot.org/c/coreboot/+/81016
diff --git a/config/coreboot/default/patches/0040-nb-intel-gm45-Make-DDR2-raminit-work.patch b/config/coreboot/default/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch
similarity index 98%
rename from config/coreboot/default/patches/0040-nb-intel-gm45-Make-DDR2-raminit-work.patch
rename to config/coreboot/default/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch
index a75edd47..28fc679f 100644
--- a/config/coreboot/default/patches/0040-nb-intel-gm45-Make-DDR2-raminit-work.patch
+++ b/config/coreboot/default/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch
@@ -1,7 +1,7 @@
-From c41e97f85f2a2677c742d62e3080af7cfeb2ef23 Mon Sep 17 00:00:00 2001
+From c6181fe0c8b58cb5a4523d5763fc5fcdf61b3f10 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Mon, 10 May 2021 22:40:59 +0200
-Subject: [PATCH 40/65] nb/intel/gm45: Make DDR2 raminit work
+Subject: [PATCH 27/51] nb/intel/gm45: Make DDR2 raminit work
 
 List of changes:
  - Update some timing and ODT values
diff --git a/config/coreboot/default/patches/0041-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch b/config/coreboot/default/patches/0028-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
similarity index 98%
rename from config/coreboot/default/patches/0041-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
rename to config/coreboot/default/patches/0028-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
index 6ec32987..92e59129 100644
--- a/config/coreboot/default/patches/0041-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
+++ b/config/coreboot/default/patches/0028-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
@@ -1,7 +1,7 @@
-From 3110c4392d40175716f167be5ef8234f2b4cd030 Mon Sep 17 00:00:00 2001
+From b6f75374fa38e0b097c9eadb4916112707cb6747 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Tue, 6 Aug 2024 00:50:24 +0100
-Subject: [PATCH 41/65] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
+Subject: [PATCH 28/51] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
 
 We add this patch:
 
diff --git a/config/coreboot/default/patches/0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch b/config/coreboot/default/patches/0029-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
similarity index 92%
rename from config/coreboot/default/patches/0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
rename to config/coreboot/default/patches/0029-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
index 0131af84..e31cb64c 100644
--- a/config/coreboot/default/patches/0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
+++ b/config/coreboot/default/patches/0029-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
@@ -1,7 +1,7 @@
-From 265fb9f4fd017de635bc44b5a762c69a8bec6158 Mon Sep 17 00:00:00 2001
+From d3045b3dcebd94b78df2129cd81a20adf215e46a Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 20 May 2024 10:24:16 -0600
-Subject: [PATCH 42/65] mb/dell/e6400: Use 100 MHz reference clock for display
+Subject: [PATCH 29/51] mb/dell/e6400: Use 100 MHz reference clock for display
 
 The E6400 uses a 100 MHz reference clock for spread spectrum support on
 LVDS, whereas libgfxinit previously assumed a 96 MHz input clock. For
diff --git a/config/coreboot/default/patches/0029-use-own-mirror-for-acpica-files.patch b/config/coreboot/default/patches/0029-use-own-mirror-for-acpica-files.patch
deleted file mode 100644
index 97d7def5..00000000
--- a/config/coreboot/default/patches/0029-use-own-mirror-for-acpica-files.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 5b425149a2ba0d1c044c32f5e16ba4d4e59796a8 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Wed, 31 Jul 2024 00:03:02 +0100
-Subject: [PATCH 29/65] use own mirror for acpica files
-
-intel likes to break links for no reason,
-so we host our own backups of acpica.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- util/crossgcc/buildgcc | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index ad756652ed..5faff337b4 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -74,7 +74,7 @@ MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
- MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
- GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
- BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
--IASL_BASE_URL="https://downloadmirror.intel.com/783534"
-+IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
- CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch b/config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
deleted file mode 100644
index fbf7962d..00000000
--- a/config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
+++ /dev/null
@@ -1,142 +0,0 @@
-From 253f8eeb895e50b3394b58268594acf9e9596bd2 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Tue, 31 Oct 2023 18:24:39 +0000
-Subject: [PATCH 30/65] crank up vram allocation on more intel boards
-
-these were added to libreboot, and it's a policy of
-libreboot to max out the vram settings. this was
-overlooked, in prior revisions and releases.
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- src/mainboard/dell/e6400/cmos.default                | 2 +-
- src/mainboard/dell/snb_ivb_workstations/cmos.default | 2 +-
- src/mainboard/hp/compaq_8200_elite_sff/cmos.default  | 2 +-
- src/mainboard/hp/compaq_elite_8300_usdt/cmos.default | 2 +-
- src/mainboard/hp/snb_ivb_laptops/cmos.default        | 1 +
- src/mainboard/lenovo/t420/cmos.default               | 1 +
- src/mainboard/lenovo/t420s/cmos.default              | 1 +
- src/mainboard/lenovo/t430/cmos.default               | 1 +
- src/mainboard/lenovo/t520/cmos.default               | 1 +
- src/mainboard/lenovo/t530/cmos.default               | 1 +
- src/mainboard/lenovo/x201/cmos.default               | 1 +
- src/mainboard/lenovo/x220/cmos.default               | 1 +
- 12 files changed, 12 insertions(+), 4 deletions(-)
-
-diff --git a/src/mainboard/dell/e6400/cmos.default b/src/mainboard/dell/e6400/cmos.default
-index 744a599708..6b8d478f06 100644
---- a/src/mainboard/dell/e6400/cmos.default
-+++ b/src/mainboard/dell/e6400/cmos.default
-@@ -4,4 +4,4 @@ boot_option=Fallback
- debug_level=Debug
- power_on_after_fail=Disable
- sata_mode=AHCI
--gfx_uma_size=32M
-+gfx_uma_size=256M
-diff --git a/src/mainboard/dell/snb_ivb_workstations/cmos.default b/src/mainboard/dell/snb_ivb_workstations/cmos.default
-index 76c16e6a8d..19364aae6e 100644
---- a/src/mainboard/dell/snb_ivb_workstations/cmos.default
-+++ b/src/mainboard/dell/snb_ivb_workstations/cmos.default
-@@ -5,5 +5,5 @@ debug_level=Debug
- power_on_after_fail=Disable
- nmi=Enable
- sata_mode=AHCI
--gfx_uma_size=128M
-+gfx_uma_size=224M
- fan_full_speed=Disable
-diff --git a/src/mainboard/hp/compaq_8200_elite_sff/cmos.default b/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
-index 497ae92e1f..64d43a07f7 100644
---- a/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
-+++ b/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
-@@ -5,5 +5,5 @@ debug_level=Debug
- power_on_after_fail=Enable
- nmi=Enable
- sata_mode=AHCI
--gfx_uma_size=32M
-+gfx_uma_size=224M
- psu_fan_lvl=3
-diff --git a/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default b/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
-index f3dad88670..b60f28447b 100644
---- a/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
-+++ b/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
-@@ -5,4 +5,4 @@ debug_level=Debug
- power_on_after_fail=Enable
- nmi=Enable
- sata_mode=AHCI
--gfx_uma_size=32M
-+gfx_uma_size=224M
-diff --git a/src/mainboard/hp/snb_ivb_laptops/cmos.default b/src/mainboard/hp/snb_ivb_laptops/cmos.default
-index e6042c0c27..a04026b70c 100644
---- a/src/mainboard/hp/snb_ivb_laptops/cmos.default
-+++ b/src/mainboard/hp/snb_ivb_laptops/cmos.default
-@@ -5,3 +5,4 @@ debug_level=Debug
- power_on_after_fail=Disable
- nmi=Enable
- sata_mode=AHCI
-+gfx_uma_size=224M
-diff --git a/src/mainboard/lenovo/t420/cmos.default b/src/mainboard/lenovo/t420/cmos.default
-index 27a62d07b3..d1c9fcaaaf 100644
---- a/src/mainboard/lenovo/t420/cmos.default
-+++ b/src/mainboard/lenovo/t420/cmos.default
-@@ -17,3 +17,4 @@ trackpoint=Enable
- hybrid_graphics_mode=Integrated Only
- usb_always_on=Disable
- me_state=Disabled
-+gfx_uma_size=224M
-diff --git a/src/mainboard/lenovo/t420s/cmos.default b/src/mainboard/lenovo/t420s/cmos.default
-index 27a62d07b3..d1c9fcaaaf 100644
---- a/src/mainboard/lenovo/t420s/cmos.default
-+++ b/src/mainboard/lenovo/t420s/cmos.default
-@@ -17,3 +17,4 @@ trackpoint=Enable
- hybrid_graphics_mode=Integrated Only
- usb_always_on=Disable
- me_state=Disabled
-+gfx_uma_size=224M
-diff --git a/src/mainboard/lenovo/t430/cmos.default b/src/mainboard/lenovo/t430/cmos.default
-index 6d1e172056..c00b358314 100644
---- a/src/mainboard/lenovo/t430/cmos.default
-+++ b/src/mainboard/lenovo/t430/cmos.default
-@@ -18,3 +18,4 @@ backlight=Both
- usb_always_on=Disable
- hybrid_graphics_mode=Integrated Only
- me_state=Disabled
-+gfx_uma_size=224M
-diff --git a/src/mainboard/lenovo/t520/cmos.default b/src/mainboard/lenovo/t520/cmos.default
-index ab1be1a678..c7ee9564f3 100644
---- a/src/mainboard/lenovo/t520/cmos.default
-+++ b/src/mainboard/lenovo/t520/cmos.default
-@@ -18,3 +18,4 @@ backlight=Both
- hybrid_graphics_mode=Integrated Only
- usb_always_on=Disable
- me_state=Disabled
-+gfx_uma_size=224M
-diff --git a/src/mainboard/lenovo/t530/cmos.default b/src/mainboard/lenovo/t530/cmos.default
-index ab1be1a678..c7ee9564f3 100644
---- a/src/mainboard/lenovo/t530/cmos.default
-+++ b/src/mainboard/lenovo/t530/cmos.default
-@@ -18,3 +18,4 @@ backlight=Both
- hybrid_graphics_mode=Integrated Only
- usb_always_on=Disable
- me_state=Disabled
-+gfx_uma_size=224M
-diff --git a/src/mainboard/lenovo/x201/cmos.default b/src/mainboard/lenovo/x201/cmos.default
-index 94f8e08a75..a1f2eacf11 100644
---- a/src/mainboard/lenovo/x201/cmos.default
-+++ b/src/mainboard/lenovo/x201/cmos.default
-@@ -17,3 +17,4 @@ power_management_beeps=Enable
- low_battery_beep=Enable
- sata_mode=AHCI
- usb_always_on=Disable
-+gfx_uma_size=128M
-diff --git a/src/mainboard/lenovo/x220/cmos.default b/src/mainboard/lenovo/x220/cmos.default
-index b318ab9772..82292ea5d6 100644
---- a/src/mainboard/lenovo/x220/cmos.default
-+++ b/src/mainboard/lenovo/x220/cmos.default
-@@ -16,3 +16,4 @@ fn_ctrl_swap=Disable
- sticky_fn=Disable
- trackpoint=Enable
- me_state=Disabled
-+gfx_uma_size=224M
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch b/config/coreboot/default/patches/0030-haswell-NRI-Initialise-MPLL.patch
similarity index 98%
rename from config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch
rename to config/coreboot/default/patches/0030-haswell-NRI-Initialise-MPLL.patch
index c571fe3b..a1cf9b75 100644
--- a/config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch
+++ b/config/coreboot/default/patches/0030-haswell-NRI-Initialise-MPLL.patch
@@ -1,7 +1,7 @@
-From ab36967cce0593dd17f3018ab4a6661e4219d242 Mon Sep 17 00:00:00 2001
+From 0966980e52286985fcd0fac6325bdd99f35ebcb8 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Thu, 11 Apr 2024 17:25:07 +0200
-Subject: [PATCH 43/65] haswell NRI: Initialise MPLL
+Subject: [PATCH 30/51] haswell NRI: Initialise MPLL
 
 Add code to initialise the MPLL (Memory PLL). The procedure is similar
 to the one for Sandy/Ivy Bridge, but it is not worth factoring out.
diff --git a/config/coreboot/default/patches/0044-haswell-NRI-Post-process-selected-timings.patch b/config/coreboot/default/patches/0031-haswell-NRI-Post-process-selected-timings.patch
similarity index 98%
rename from config/coreboot/default/patches/0044-haswell-NRI-Post-process-selected-timings.patch
rename to config/coreboot/default/patches/0031-haswell-NRI-Post-process-selected-timings.patch
index 69e32d2f..426cef35 100644
--- a/config/coreboot/default/patches/0044-haswell-NRI-Post-process-selected-timings.patch
+++ b/config/coreboot/default/patches/0031-haswell-NRI-Post-process-selected-timings.patch
@@ -1,7 +1,7 @@
-From 876011559681881d950ad3b6742b40322f1f5a6d Mon Sep 17 00:00:00 2001
+From 1dc22174b9b28b9ea9af59183ffd5d86d19a2721 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 16:29:55 +0200
-Subject: [PATCH 44/65] haswell NRI: Post-process selected timings
+Subject: [PATCH 31/51] haswell NRI: Post-process selected timings
 
 Once the MPLL has been initialised, convert the timings from the SPD to
 be in DCLKs, which is what the hardware expects. In addition, calculate
diff --git a/config/coreboot/default/patches/0045-haswell-NRI-Configure-initial-MC-settings.patch b/config/coreboot/default/patches/0032-haswell-NRI-Configure-initial-MC-settings.patch
similarity index 99%
rename from config/coreboot/default/patches/0045-haswell-NRI-Configure-initial-MC-settings.patch
rename to config/coreboot/default/patches/0032-haswell-NRI-Configure-initial-MC-settings.patch
index eefd17a9..e16f4e3d 100644
--- a/config/coreboot/default/patches/0045-haswell-NRI-Configure-initial-MC-settings.patch
+++ b/config/coreboot/default/patches/0032-haswell-NRI-Configure-initial-MC-settings.patch
@@ -1,7 +1,7 @@
-From e91b308fe5848b14cabbd29be4af60e3a9b7938d Mon Sep 17 00:00:00 2001
+From a4f5deb78c2d4132bf857c57ffd53684f942ba62 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 17:22:07 +0200
-Subject: [PATCH 45/65] haswell NRI: Configure initial MC settings
+Subject: [PATCH 32/51] haswell NRI: Configure initial MC settings
 
 Program initial memory controller settings. Many of these values will be
 adjusted later during training.
diff --git a/config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch b/config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch
deleted file mode 100644
index 4fb0f8a0..00000000
--- a/config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From b769a682016b7d231bb3d004698c8a2059bbf363 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 5 Nov 2023 22:57:08 +0000
-Subject: [PATCH 32/65] use mirrorservice.org for gcc downloads
-
-the gnu.org 302 redirect often fails
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 5faff337b4..2743f96903 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -69,11 +69,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
- # to the jenkins build as well, or the builder won't download it.
- 
- # GCC toolchain archive locations
--GMP_BASE_URL="https://ftpmirror.gnu.org/gmp"
--MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
--MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
--GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
--BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
-+GMP_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp"
-+MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
-+MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
-+GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
-+BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
- IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0046-haswell-NRI-Add-timings-refresh-programming.patch b/config/coreboot/default/patches/0033-haswell-NRI-Add-timings-refresh-programming.patch
similarity index 99%
rename from config/coreboot/default/patches/0046-haswell-NRI-Add-timings-refresh-programming.patch
rename to config/coreboot/default/patches/0033-haswell-NRI-Add-timings-refresh-programming.patch
index 73234ac5..3ec3b57b 100644
--- a/config/coreboot/default/patches/0046-haswell-NRI-Add-timings-refresh-programming.patch
+++ b/config/coreboot/default/patches/0033-haswell-NRI-Add-timings-refresh-programming.patch
@@ -1,7 +1,7 @@
-From 694d1650cad8573e899916c0d0a25604885f6e3b Mon Sep 17 00:00:00 2001
+From 8f94c0428eea2145a97de943b093dee29001c4f9 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 20:59:58 +0200
-Subject: [PATCH 46/65] haswell NRI: Add timings/refresh programming
+Subject: [PATCH 33/51] haswell NRI: Add timings/refresh programming
 
 Program the registers with timing and refresh parameters.
 
diff --git a/config/coreboot/default/patches/0047-haswell-NRI-Program-memory-map.patch b/config/coreboot/default/patches/0034-haswell-NRI-Program-memory-map.patch
similarity index 98%
rename from config/coreboot/default/patches/0047-haswell-NRI-Program-memory-map.patch
rename to config/coreboot/default/patches/0034-haswell-NRI-Program-memory-map.patch
index 58a2f556..bb3ed03d 100644
--- a/config/coreboot/default/patches/0047-haswell-NRI-Program-memory-map.patch
+++ b/config/coreboot/default/patches/0034-haswell-NRI-Program-memory-map.patch
@@ -1,7 +1,7 @@
-From 70d7333e1e0c2b0ce0f2a7e4c4c3ac5c1aca2094 Mon Sep 17 00:00:00 2001
+From ded914f236f76715aa43cb439a3de7df9a3dfa11 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 21:24:50 +0200
-Subject: [PATCH 47/65] haswell NRI: Program memory map
+Subject: [PATCH 34/51] haswell NRI: Program memory map
 
 This is very similar to Sandy/Ivy Bridge, except that there's several
 registers to program in GDXCBAR. One of these GDXCBAR registers has a
diff --git a/config/coreboot/default/patches/0048-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch b/config/coreboot/default/patches/0035-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
similarity index 99%
rename from config/coreboot/default/patches/0048-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
rename to config/coreboot/default/patches/0035-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
index b4108c7b..29bdec9f 100644
--- a/config/coreboot/default/patches/0048-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
+++ b/config/coreboot/default/patches/0035-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
@@ -1,7 +1,7 @@
-From cc302630662eee011a903df4fd7a36d82bd22203 Mon Sep 17 00:00:00 2001
+From db2b383a8ee5a4fc45c9ce0003ae45f25ed51f86 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 21:49:40 +0200
-Subject: [PATCH 48/65] haswell NRI: Add DDR3 JEDEC reset and init
+Subject: [PATCH 35/51] haswell NRI: Add DDR3 JEDEC reset and init
 
 Implement JEDEC reset and init sequence for DDR3. The MRS commands are
 issued through the REUT (Robust Electrical Unified Testing) hardware.
diff --git a/config/coreboot/default/patches/0049-haswell-NRI-Add-pre-training-steps.patch b/config/coreboot/default/patches/0036-haswell-NRI-Add-pre-training-steps.patch
similarity index 99%
rename from config/coreboot/default/patches/0049-haswell-NRI-Add-pre-training-steps.patch
rename to config/coreboot/default/patches/0036-haswell-NRI-Add-pre-training-steps.patch
index ffec948d..1b58a1f1 100644
--- a/config/coreboot/default/patches/0049-haswell-NRI-Add-pre-training-steps.patch
+++ b/config/coreboot/default/patches/0036-haswell-NRI-Add-pre-training-steps.patch
@@ -1,7 +1,7 @@
-From 0f160dee563155e93422fc77c53251419043d4dc Mon Sep 17 00:00:00 2001
+From 19bc8d27c8f52b205df218d5917ae67ac4646024 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 7 May 2022 23:12:18 +0200
-Subject: [PATCH 49/65] haswell NRI: Add pre-training steps
+Subject: [PATCH 36/51] haswell NRI: Add pre-training steps
 
 Implement pre-training steps, which consist of enabling ECC I/O and
 filling the WDB (Write Data Buffer, stores test patterns) through a
diff --git a/config/coreboot/default/patches/0050-haswell-NRI-Add-REUT-I-O-test-library.patch b/config/coreboot/default/patches/0037-haswell-NRI-Add-REUT-I-O-test-library.patch
similarity index 99%
rename from config/coreboot/default/patches/0050-haswell-NRI-Add-REUT-I-O-test-library.patch
rename to config/coreboot/default/patches/0037-haswell-NRI-Add-REUT-I-O-test-library.patch
index a65a6ea1..eaafcde3 100644
--- a/config/coreboot/default/patches/0050-haswell-NRI-Add-REUT-I-O-test-library.patch
+++ b/config/coreboot/default/patches/0037-haswell-NRI-Add-REUT-I-O-test-library.patch
@@ -1,7 +1,7 @@
-From 78b25eb96baef7da2f5481572a6df2b88ee2b3d4 Mon Sep 17 00:00:00 2001
+From 460a092b22c9800c5ee9d8c4198e8b241664693f Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 00:11:29 +0200
-Subject: [PATCH 50/65] haswell NRI: Add REUT I/O test library
+Subject: [PATCH 37/51] haswell NRI: Add REUT I/O test library
 
 Implement a library to run I/O tests using the REUT hardware.
 
diff --git a/config/coreboot/default/patches/0051-haswell-NRI-Add-range-tracking-library.patch b/config/coreboot/default/patches/0038-haswell-NRI-Add-range-tracking-library.patch
similarity index 98%
rename from config/coreboot/default/patches/0051-haswell-NRI-Add-range-tracking-library.patch
rename to config/coreboot/default/patches/0038-haswell-NRI-Add-range-tracking-library.patch
index 2ec35e26..45fdc951 100644
--- a/config/coreboot/default/patches/0051-haswell-NRI-Add-range-tracking-library.patch
+++ b/config/coreboot/default/patches/0038-haswell-NRI-Add-range-tracking-library.patch
@@ -1,7 +1,7 @@
-From ca6d92e13278832dfddbe7dcb4cbefa5861041e8 Mon Sep 17 00:00:00 2001
+From 36b206a88281796458e6ebc30fe34a7c51c86548 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 00:56:00 +0200
-Subject: [PATCH 51/65] haswell NRI: Add range tracking library
+Subject: [PATCH 38/51] haswell NRI: Add range tracking library
 
 Implement a small library used to keep track of passing ranges. This
 will be used by 1D training algorithms when margining some parameter.
diff --git a/config/coreboot/default/patches/0052-haswell-NRI-Add-library-to-change-margins.patch b/config/coreboot/default/patches/0039-haswell-NRI-Add-library-to-change-margins.patch
similarity index 98%
rename from config/coreboot/default/patches/0052-haswell-NRI-Add-library-to-change-margins.patch
rename to config/coreboot/default/patches/0039-haswell-NRI-Add-library-to-change-margins.patch
index ffd76fc4..401433ac 100644
--- a/config/coreboot/default/patches/0052-haswell-NRI-Add-library-to-change-margins.patch
+++ b/config/coreboot/default/patches/0039-haswell-NRI-Add-library-to-change-margins.patch
@@ -1,7 +1,7 @@
-From f6d7bd420640a9ccb137113d69b97bc13fe6b0da Mon Sep 17 00:00:00 2001
+From 926b1af1033c26ad231587fd3a4506efb4b0d8a3 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 01:11:03 +0200
-Subject: [PATCH 52/65] haswell NRI: Add library to change margins
+Subject: [PATCH 39/51] haswell NRI: Add library to change margins
 
 Implement a library to change Rx/Tx margins. It will be expanded later.
 
diff --git a/config/coreboot/default/patches/0053-haswell-NRI-Add-RcvEn-training.patch b/config/coreboot/default/patches/0040-haswell-NRI-Add-RcvEn-training.patch
similarity index 99%
rename from config/coreboot/default/patches/0053-haswell-NRI-Add-RcvEn-training.patch
rename to config/coreboot/default/patches/0040-haswell-NRI-Add-RcvEn-training.patch
index fdb8d270..a40ffa69 100644
--- a/config/coreboot/default/patches/0053-haswell-NRI-Add-RcvEn-training.patch
+++ b/config/coreboot/default/patches/0040-haswell-NRI-Add-RcvEn-training.patch
@@ -1,7 +1,7 @@
-From d3cd9ccb7d2eed7ecd5bcdc33d73a5e28b029dba Mon Sep 17 00:00:00 2001
+From 61435822eb1d65b919bec45076737ce4ea91e1b1 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 00:05:41 +0200
-Subject: [PATCH 53/65] haswell NRI: Add RcvEn training
+Subject: [PATCH 40/51] haswell NRI: Add RcvEn training
 
 Implement the RcvEn (Receive Enable) calibration procedure.
 
diff --git a/config/coreboot/default/patches/0054-haswell-NRI-Add-function-to-change-margins.patch b/config/coreboot/default/patches/0041-haswell-NRI-Add-function-to-change-margins.patch
similarity index 98%
rename from config/coreboot/default/patches/0054-haswell-NRI-Add-function-to-change-margins.patch
rename to config/coreboot/default/patches/0041-haswell-NRI-Add-function-to-change-margins.patch
index 58cc9d82..296dbed6 100644
--- a/config/coreboot/default/patches/0054-haswell-NRI-Add-function-to-change-margins.patch
+++ b/config/coreboot/default/patches/0041-haswell-NRI-Add-function-to-change-margins.patch
@@ -1,7 +1,7 @@
-From dbf0fc28bbb939fe5a90c991b752f790828d462d Mon Sep 17 00:00:00 2001
+From fc6c3edf561dd11eeb2ebe7f4cb93542e664935a Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 11:58:59 +0200
-Subject: [PATCH 54/65] haswell NRI: Add function to change margins
+Subject: [PATCH 41/51] haswell NRI: Add function to change margins
 
 Implement a function to change margin parameters. Haswell provides a
 register to apply an offset to margin parameters during training, so
diff --git a/config/coreboot/default/patches/0055-haswell-NRI-Add-read-MPR-training.patch b/config/coreboot/default/patches/0042-haswell-NRI-Add-read-MPR-training.patch
similarity index 99%
rename from config/coreboot/default/patches/0055-haswell-NRI-Add-read-MPR-training.patch
rename to config/coreboot/default/patches/0042-haswell-NRI-Add-read-MPR-training.patch
index be0ddd13..f2ccb7ad 100644
--- a/config/coreboot/default/patches/0055-haswell-NRI-Add-read-MPR-training.patch
+++ b/config/coreboot/default/patches/0042-haswell-NRI-Add-read-MPR-training.patch
@@ -1,7 +1,7 @@
-From 0a557e3d09a9a53bb085c43e6bdb99fa4cd78b85 Mon Sep 17 00:00:00 2001
+From 8f07ea076572dd3371dca7b3dbd5ff9c9b332c55 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 11:35:49 +0200
-Subject: [PATCH 55/65] haswell NRI: Add read MPR training
+Subject: [PATCH 42/51] haswell NRI: Add read MPR training
 
 Implement read training using DDR3 MPR (Multi-Purpose Register).
 
diff --git a/config/coreboot/default/patches/0056-haswell-NRI-Add-write-leveling.patch b/config/coreboot/default/patches/0043-haswell-NRI-Add-write-leveling.patch
similarity index 99%
rename from config/coreboot/default/patches/0056-haswell-NRI-Add-write-leveling.patch
rename to config/coreboot/default/patches/0043-haswell-NRI-Add-write-leveling.patch
index 0791fb80..0202ed1b 100644
--- a/config/coreboot/default/patches/0056-haswell-NRI-Add-write-leveling.patch
+++ b/config/coreboot/default/patches/0043-haswell-NRI-Add-write-leveling.patch
@@ -1,7 +1,7 @@
-From e8f50deac2a671f7ec3958b376c37dd6b9bad5bd Mon Sep 17 00:00:00 2001
+From 6df4b7eb0512c24a5f53bc92e81ad6cf42cd28a7 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 12:56:04 +0200
-Subject: [PATCH 56/65] haswell NRI: Add write leveling
+Subject: [PATCH 43/51] haswell NRI: Add write leveling
 
 Implement JEDEC write leveling, which is done in two steps. The first
 step uses the JEDEC procedure to do "fine" write leveling, i.e. align
diff --git a/config/coreboot/default/patches/0057-haswell-NRI-Add-final-raminit-steps.patch b/config/coreboot/default/patches/0044-haswell-NRI-Add-final-raminit-steps.patch
similarity index 99%
rename from config/coreboot/default/patches/0057-haswell-NRI-Add-final-raminit-steps.patch
rename to config/coreboot/default/patches/0044-haswell-NRI-Add-final-raminit-steps.patch
index 3cd8c758..62cae936 100644
--- a/config/coreboot/default/patches/0057-haswell-NRI-Add-final-raminit-steps.patch
+++ b/config/coreboot/default/patches/0044-haswell-NRI-Add-final-raminit-steps.patch
@@ -1,7 +1,7 @@
-From 990ee284d48b66f06adb6c43a96439f7628390f5 Mon Sep 17 00:00:00 2001
+From 9d1b945702006db5678c5dc81699699bf6e6741a Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sun, 8 May 2022 14:29:05 +0200
-Subject: [PATCH 57/65] haswell NRI: Add final raminit steps
+Subject: [PATCH 44/51] haswell NRI: Add final raminit steps
 
 Implement the remaining raminit steps. Although many training steps are
 missing, this is enough to boot on the Asrock B85M Pro4.
diff --git a/config/coreboot/default/patches/0058-Haswell-NRI-Implement-fast-boot-path.patch b/config/coreboot/default/patches/0045-Haswell-NRI-Implement-fast-boot-path.patch
similarity index 99%
rename from config/coreboot/default/patches/0058-Haswell-NRI-Implement-fast-boot-path.patch
rename to config/coreboot/default/patches/0045-Haswell-NRI-Implement-fast-boot-path.patch
index b5d04b99..af614a5f 100644
--- a/config/coreboot/default/patches/0058-Haswell-NRI-Implement-fast-boot-path.patch
+++ b/config/coreboot/default/patches/0045-Haswell-NRI-Implement-fast-boot-path.patch
@@ -1,7 +1,7 @@
-From 63e9aa1f998ebd41b4c638fa66bdb1a6272a9e85 Mon Sep 17 00:00:00 2001
+From b6b89013630d535b68a005cede9e2540f273f4e7 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Sat, 13 Apr 2024 01:16:30 +0200
-Subject: [PATCH 58/65] Haswell NRI: Implement fast boot path
+Subject: [PATCH 45/51] Haswell NRI: Implement fast boot path
 
 When the memory configuration hasn't changed, there is no need to do
 full memory training. Instead, boot firmware can use saved training
diff --git a/config/coreboot/default/patches/0059-haswell-NRI-Do-sense-amplifier-offset-training.patch b/config/coreboot/default/patches/0046-haswell-NRI-Do-sense-amplifier-offset-training.patch
similarity index 99%
rename from config/coreboot/default/patches/0059-haswell-NRI-Do-sense-amplifier-offset-training.patch
rename to config/coreboot/default/patches/0046-haswell-NRI-Do-sense-amplifier-offset-training.patch
index 0310e671..c0945df9 100644
--- a/config/coreboot/default/patches/0059-haswell-NRI-Do-sense-amplifier-offset-training.patch
+++ b/config/coreboot/default/patches/0046-haswell-NRI-Do-sense-amplifier-offset-training.patch
@@ -1,7 +1,7 @@
-From c22e06a8ef87f74cc9955ffc259e7052742269c4 Mon Sep 17 00:00:00 2001
+From 02aa0c5612388e35f5dd1ff9c5f7a7b5b48fb9c0 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Wed, 17 Apr 2024 13:20:32 +0200
-Subject: [PATCH 59/65] haswell NRI: Do sense amplifier offset training
+Subject: [PATCH 46/51] haswell NRI: Do sense amplifier offset training
 
 Quoting Wikipedia:
 
diff --git a/config/coreboot/default/patches/0060-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch b/config/coreboot/default/patches/0047-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
similarity index 92%
rename from config/coreboot/default/patches/0060-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
rename to config/coreboot/default/patches/0047-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
index a899693b..988ae4e6 100644
--- a/config/coreboot/default/patches/0060-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
+++ b/config/coreboot/default/patches/0047-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
@@ -1,7 +1,7 @@
-From c0e95144b426ab323e0397942579261fbb7b922b Mon Sep 17 00:00:00 2001
+From 53f2d47ee6ebaa8d47b076a6c2a1514c91247b95 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Mon, 12 Aug 2024 02:15:24 +0100
-Subject: [PATCH 60/65] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
+Subject: [PATCH 47/51] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
 
 set it to 96MHz. fixes the following build error when
 building for x4x boards e.g. gigabyte ga-g41m-es2l:
diff --git a/config/coreboot/default/patches/0062-mb-dell-Convert-E6400-into-a-variant.patch b/config/coreboot/default/patches/0048-mb-dell-Convert-E6400-into-a-variant.patch
similarity index 98%
rename from config/coreboot/default/patches/0062-mb-dell-Convert-E6400-into-a-variant.patch
rename to config/coreboot/default/patches/0048-mb-dell-Convert-E6400-into-a-variant.patch
index acd7074c..156d5c8d 100644
--- a/config/coreboot/default/patches/0062-mb-dell-Convert-E6400-into-a-variant.patch
+++ b/config/coreboot/default/patches/0048-mb-dell-Convert-E6400-into-a-variant.patch
@@ -1,7 +1,7 @@
-From 0caa5d97b67b2acf571e4fab2b7f85ef3d3a7260 Mon Sep 17 00:00:00 2001
+From 92556743e92cc02524296b653de5241160876218 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Thu, 26 Sep 2024 19:48:26 -0600
-Subject: [PATCH 62/65] mb/dell: Convert E6400 into a variant
+Subject: [PATCH 48/51] mb/dell: Convert E6400 into a variant
 
 All the GM45 Dell Latitudes should be nearly identical, so convert the
 E6400 port into a variant so that future ports for the other systems can
diff --git a/config/coreboot/default/patches/0063-mb-dell-gm45_latitudes-Add-E4300-variant.patch b/config/coreboot/default/patches/0049-mb-dell-gm45_latitudes-Add-E4300-variant.patch
similarity index 98%
rename from config/coreboot/default/patches/0063-mb-dell-gm45_latitudes-Add-E4300-variant.patch
rename to config/coreboot/default/patches/0049-mb-dell-gm45_latitudes-Add-E4300-variant.patch
index 1e76adfe..2cdcd499 100644
--- a/config/coreboot/default/patches/0063-mb-dell-gm45_latitudes-Add-E4300-variant.patch
+++ b/config/coreboot/default/patches/0049-mb-dell-gm45_latitudes-Add-E4300-variant.patch
@@ -1,7 +1,7 @@
-From bc9836ac2708687dfe43656adba2833493fa4199 Mon Sep 17 00:00:00 2001
+From ac8ac2543e3ebbc05f79f37d1460cde532a7ee1c Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Thu, 26 Sep 2024 19:51:25 -0600
-Subject: [PATCH 63/65] mb/dell/gm45_latitudes: Add E4300 variant
+Subject: [PATCH 49/51] mb/dell/gm45_latitudes: Add E4300 variant
 
 Change-Id: I0f2059501b11be103187e3ce1a7c04ab85ae63d2
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
diff --git a/config/coreboot/default/patches/0066-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch b/config/coreboot/default/patches/0050-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
similarity index 94%
rename from config/coreboot/default/patches/0066-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
rename to config/coreboot/default/patches/0050-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
index d58968a1..71cc67c1 100644
--- a/config/coreboot/default/patches/0066-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
+++ b/config/coreboot/default/patches/0050-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
@@ -1,7 +1,7 @@
-From 0fe1d4b9fe56a0f27a6ff39cfb94d63559b729b8 Mon Sep 17 00:00:00 2001
+From 5e8b899654c31fe771e4b1e96c74c93d4509c3b2 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 3 May 2024 16:31:12 -0600
-Subject: [PATCH 66/67] mb/dell: Add S3 SMI handler for Dell Latitudes
+Subject: [PATCH 50/51] mb/dell: Add S3 SMI handler for Dell Latitudes
 
 Integrate the previously added mec5035_smi_sleep() function into
 mainboard code to fix S3 suspend on the SNB/IVB Latitudes and the E7240.
@@ -66,5 +66,5 @@ index 0000000000..00e55b51db
 +	mec5035_smi_sleep(slp_typ);
 +}
 -- 
-2.47.0
+2.39.5
 
diff --git a/config/coreboot/default/patches/0067-ec-dell-mec5035-Route-power-button-event-to-host.patch b/config/coreboot/default/patches/0051-ec-dell-mec5035-Route-power-button-event-to-host.patch
similarity index 96%
rename from config/coreboot/default/patches/0067-ec-dell-mec5035-Route-power-button-event-to-host.patch
rename to config/coreboot/default/patches/0051-ec-dell-mec5035-Route-power-button-event-to-host.patch
index d8662e40..65f90e2c 100644
--- a/config/coreboot/default/patches/0067-ec-dell-mec5035-Route-power-button-event-to-host.patch
+++ b/config/coreboot/default/patches/0051-ec-dell-mec5035-Route-power-button-event-to-host.patch
@@ -1,7 +1,7 @@
-From 32118fa1d21fad517f85cee5eb4edff5f2fd91ea Mon Sep 17 00:00:00 2001
+From 1a342c20b8705bbea02d27a73e383ee2808f2558 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Tue, 18 Jun 2024 21:31:08 -0600
-Subject: [PATCH 67/67] ec/dell/mec5035: Route power button event to host
+Subject: [PATCH 51/51] ec/dell/mec5035: Route power button event to host
 
 If command 0x3e with an argument of 1 isn't sent to the EC, pressing the
 power button results in the EC powering off the system without letting
@@ -88,5 +88,5 @@ index 8d4fded28b..51422598c4 100644
  void mec5035_sleep_enable(void);
  
 -- 
-2.47.0
+2.39.5
 

From c0017c73578a91c4a40bf033f641ce293cd3df2e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 3 Nov 2024 02:41:41 +0000
Subject: [PATCH 0864/1549] Experimental U-Boot payload (32-bit dtb, U-Boot)

NOTE: Support added for xarch target x86_64-elf,
but U-Boot failed to build with this error:

OBJCOPY lib/efi_loader/helloworld.efi
x86_64-elf-objcopy: lib/efi_loader/helloworld_efi.so: invalid bfd target
make[2]: *** [scripts/Makefile.lib:476: lib/efi_loader/helloworld.efi] Error 1

Since I'm building U-Boot for x86_64 *on* an x86-64
host, and since that is currently the recommended type
of machine to use for lbmk development, and since the
other x86 payloads currently don't cross compile anyway,
this is an acceptable compromise for now. This is because
at present, I'm not making U-Boot the primary payload on x86,
instead preferring to chain it from GRUB and SeaBIOS.

The target.cfg file for x86 u-boot shows xarch/xtree commented.
Uncomment these to compile on crossgcc instead of hostcc.

I mention 64-bit because I initially did this first, but decided
to do 32-bit first. I'll work on the 64-bit one next (SPL).

It's only enabled in QEMU for now.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/qemu_x86_12mb/target.cfg  |    1 +
 config/data/coreboot/mkhelper.cfg         |    2 +-
 config/data/u-boot/build.list             |    2 +
 config/grub/default/config/payload        |    6 +
 config/grub/nvme/config/payload           |    6 +
 config/grub/xhci/config/payload           |    6 +
 config/u-boot/i386coreboot/config/default | 1784 +++++++++++++++++++++
 config/u-boot/i386coreboot/target.cfg     |    5 +
 config/u-boot/x86/nuke.list               |    1 +
 config/u-boot/x86/target.cfg              |    2 +
 include/lib.sh                            |   19 +-
 include/rom.sh                            |   23 +-
 script/trees                              |    8 +-
 13 files changed, 1856 insertions(+), 9 deletions(-)
 create mode 100644 config/u-boot/i386coreboot/config/default
 create mode 100644 config/u-boot/i386coreboot/target.cfg
 create mode 100644 config/u-boot/x86/nuke.list
 create mode 100644 config/u-boot/x86/target.cfg

diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg
index 27921ff9..2aae2da9 100644
--- a/config/coreboot/qemu_x86_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_12mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_grub="y"
 payload_seabios="y"
 payload_memtest="y"
+payload_uboot_i386="y"
diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index 73cc957d..64ae4384 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -1,7 +1,7 @@
 . "include/rom.sh"
 
 makeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
-build_depend="seabios/default grub/default memtest86plus"
+build_depend="seabios/default grub/default memtest86plus u-boot/i386coreboot"
 
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 
diff --git a/config/data/u-boot/build.list b/config/data/u-boot/build.list
index 8d9a5cf0..5af3064a 100644
--- a/config/data/u-boot/build.list
+++ b/config/data/u-boot/build.list
@@ -4,3 +4,5 @@ u-boot.dtb
 u-boot.img
 u-boot.itb
 u-boot.elf
+u-boot-dtb.bin
+u-boot-x86-with-spl.bin
diff --git a/config/grub/default/config/payload b/config/grub/default/config/payload
index cdd6c0f0..e5bf52bd 100644
--- a/config/grub/default/config/payload
+++ b/config/grub/default/config/payload
@@ -216,6 +216,12 @@ menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey=
 	fi
 }
 fi
+if [ -f (cbfsdisk)/u-boot ]; then
+menuentry 'Load U-Boot (payload) [b]' --hotkey='u' {
+	set root='cbfsdisk'
+	chainloader /u-boot
+}
+fi
 if [ -f (cbfsdisk)/seabios.elf ]; then
 menuentry 'Load SeaBIOS (payload) [b]' --hotkey='b' {
 	set root='cbfsdisk'
diff --git a/config/grub/nvme/config/payload b/config/grub/nvme/config/payload
index 2f9c7114..aa1fcb91 100644
--- a/config/grub/nvme/config/payload
+++ b/config/grub/nvme/config/payload
@@ -234,6 +234,12 @@ menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey=
 	fi
 }
 fi
+if [ -f (cbfsdisk)/u-boot ]; then
+menuentry 'Load U-Boot (payload) [b]' --hotkey='u' {
+	set root='cbfsdisk'
+	chainloader /u-boot
+}
+fi
 if [ -f (cbfsdisk)/seabios.elf ]; then
 menuentry 'Load SeaBIOS (payload) [b]' --hotkey='b' {
 	set root='cbfsdisk'
diff --git a/config/grub/xhci/config/payload b/config/grub/xhci/config/payload
index 923e3551..ee3e6aaf 100644
--- a/config/grub/xhci/config/payload
+++ b/config/grub/xhci/config/payload
@@ -235,6 +235,12 @@ menuentry 'Load test configuration (grubtest.cfg) in CBFS  [t]' --hotkey='t' {
 	fi
 }
 fi
+if [ -f (cbfsdisk)/u-boot ]; then
+menuentry 'Load U-Boot (payload) [b]' --hotkey='u' {
+	set root='cbfsdisk'
+	chainloader /u-boot
+}
+fi
 if [ -f (cbfsdisk)/seabios.elf ]; then
 menuentry 'Load SeaBIOS (payload) [b]' --hotkey='b' {
 	set root='cbfsdisk'
diff --git a/config/u-boot/i386coreboot/config/default b/config/u-boot/i386coreboot/config/default
new file mode 100644
index 00000000..fce63efc
--- /dev/null
+++ b/config/u-boot/i386coreboot/config/default
@@ -0,0 +1,1784 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# U-Boot 2024.07 Configuration
+#
+
+#
+# Compiler: gcc (Debian 12.2.0-14) 12.2.0
+#
+CONFIG_CREATE_ARCH_SYMLINK=y
+CONFIG_SYS_CACHE_SHIFT_6=y
+CONFIG_SYS_CACHELINE_SIZE=64
+CONFIG_LINKER_LIST_ALIGN=8
+# CONFIG_ARC is not set
+# CONFIG_ARM is not set
+# CONFIG_M68K is not set
+# CONFIG_MICROBLAZE is not set
+# CONFIG_MIPS is not set
+# CONFIG_NIOS2 is not set
+# CONFIG_PPC is not set
+# CONFIG_RISCV is not set
+# CONFIG_SANDBOX is not set
+# CONFIG_SH is not set
+CONFIG_X86=y
+# CONFIG_XTENSA is not set
+CONFIG_SYS_ARCH="x86"
+CONFIG_SYS_SOC="coreboot"
+CONFIG_SYS_VENDOR="coreboot"
+CONFIG_SYS_BOARD="coreboot"
+CONFIG_TEXT_BASE=0x1110000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_ENV_SOURCE_FILE=""
+CONFIG_ENV_SIZE=0x1000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="coreboot"
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+# CONFIG_OF_LIBFDT_OVERLAY is not set
+CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
+# CONFIG_DM_RESET is not set
+CONFIG_SYS_MONITOR_LEN=1048576
+CONFIG_ERR_PTR_OFFSET=0x0
+# CONFIG_SPL is not set
+CONFIG_PRE_CON_BUF_ADDR=0x100000
+CONFIG_PRE_CON_BUF_SZ=4096
+CONFIG_BOOTSTAGE_STASH_ADDR=0x0
+CONFIG_IDENT_STRING=""
+CONFIG_SYS_CLK_FREQ=0
+CONFIG_SYS_MEM_TOP_HIDE=0x0
+CONFIG_SYS_LOAD_ADDR=0x02000000
+CONFIG_BUILD_TARGET=""
+# CONFIG_SYS_PCI_64BIT is not set
+CONFIG_PCI=y
+CONFIG_FWU_NUM_BANKS=2
+CONFIG_FWU_NUM_IMAGES_PER_BANK=2
+
+#
+# x86 architecture
+#
+CONFIG_X86_RUN_32BIT=y
+# CONFIG_X86_RUN_64BIT is not set
+# CONFIG_VENDOR_ADVANTECH is not set
+# CONFIG_VENDOR_CONGATEC is not set
+CONFIG_VENDOR_COREBOOT=y
+# CONFIG_VENDOR_DFI is not set
+# CONFIG_VENDOR_EFI is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_INTEL_MID is not set
+CONFIG_PCIE_ECAM_BASE=0xe0000000
+CONFIG_TARGET_COREBOOT=y
+CONFIG_SYS_CAR_ADDR=0x01920000
+CONFIG_SYS_CAR_SIZE=0x4000
+CONFIG_ROM_TABLE_ADDR=0xf0000
+CONFIG_ROM_TABLE_SIZE=0x10000
+CONFIG_CPU_ADDR_BITS=36
+# CONFIG_DEBUG_UART is not set
+CONFIG_SYS_COREBOOT=y
+CONFIG_X86_TSC_TIMER_FREQ=1000000000
+CONFIG_AHCI=y
+CONFIG_RAMBASE=0x100000
+CONFIG_HPET_ADDRESS=0xfed00000
+# CONFIG_X86_LOAD_FROM_32_BIT is not set
+# CONFIG_HAVE_INTEL_ME is not set
+# CONFIG_X86_RAMTEST is not set
+# CONFIG_USE_HOB is not set
+# CONFIG_HAVE_FSP is not set
+CONFIG_USE_CAR=y
+# CONFIG_HAVE_MRC is not set
+# CONFIG_HAVE_REFCODE is not set
+CONFIG_HAVE_MICROCODE=y
+# CONFIG_SMP is not set
+# CONFIG_HAVE_VGA_BIOS is not set
+CONFIG_X86_HARDFP=y
+# CONFIG_HAVE_ITSS is not set
+# CONFIG_HAVE_ACPI_RESUME is not set
+CONFIG_MAX_PIRQ_LINKS=8
+CONFIG_IRQ_SLOT_COUNT=128
+CONFIG_PCIE_ECAM_SIZE=0x10000000
+CONFIG_I8259_PIC=y
+CONFIG_APIC=y
+CONFIG_I8254_TIMER=y
+# CONFIG_SEABIOS is not set
+# CONFIG_INTEL_CAR_CQOS is not set
+CONFIG_X86_OFFSET_U_BOOT=0x1110000
+# CONFIG_ACPI_GPE is not set
+CONFIG_SA_PCIEX_LENGTH=0x10000000
+CONFIG_COREBOOT_SYSINFO=y
+CONFIG_ZBOOT=y
+# CONFIG_OF_BOARD_FIXUP is not set
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_CC_IS_GCC=y
+CONFIG_GCC_VERSION=120200
+CONFIG_CLANG_VERSION=0
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+# CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
+# CONFIG_CC_OPTIMIZE_FOR_DEBUG is not set
+# CONFIG_OPTIMIZE_INLINING is not set
+CONFIG_CC_HAS_ASM_INLINE=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+# CONFIG_SYS_BOOT_GET_CMDLINE is not set
+# CONFIG_SYS_BOOT_GET_KBD is not set
+CONFIG_SYS_MALLOC_F=y
+# CONFIG_VALGRIND is not set
+CONFIG_EXPERT=y
+CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y
+# CONFIG_SYS_MALLOC_DEFAULT_TO_INIT is not set
+# CONFIG_TOOLS_DEBUG is not set
+# CONFIG_PHYS_64BIT is not set
+# CONFIG_FDT_64BIT is not set
+# CONFIG_REMAKE_ELF is not set
+# CONFIG_HAS_BOARD_SIZE_LIMIT is not set
+# CONFIG_SYS_CUSTOM_LDSCRIPT is not set
+CONFIG_PLATFORM_ELFENTRY="_start"
+CONFIG_STACK_SIZE=0x1000000
+CONFIG_SYS_SRAM_BASE=0x0
+CONFIG_SYS_SRAM_SIZE=0x0
+# CONFIG_MP is not set
+CONFIG_HAVE_TEXT_BASE=y
+# CONFIG_HAVE_SYS_UBOOT_START is not set
+CONFIG_SYS_UBOOT_START=0x1110000
+CONFIG_HAVE_SYS_MONITOR_BASE=y
+CONFIG_SYS_MONITOR_BASE=0x01110000
+# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
+# CONFIG_API is not set
+
+#
+# Boot options
+#
+
+#
+# Boot images
+#
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_TIMESTAMP=y
+CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x0
+CONFIG_FIT_FULL_CHECK=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_SIGNATURE_MAX_SIZE=0x10000000
+# CONFIG_FIT_RSASSA_PSS is not set
+# CONFIG_FIT_CIPHER is not set
+# CONFIG_FIT_VERBOSE is not set
+# CONFIG_FIT_BEST_MATCH is not set
+CONFIG_FIT_PRINT=y
+# CONFIG_SPL_LOAD_FIT_FULL is not set
+CONFIG_PXE_UTILS=y
+CONFIG_BOOT_DEFAULTS_FEATURES=y
+CONFIG_BOOT_DEFAULTS_CMDS=y
+CONFIG_BOOT_DEFAULTS=y
+CONFIG_BOOTSTD=y
+CONFIG_BOOTSTD_FULL=y
+CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_BOOTSTD_BOOTCOMMAND=y
+CONFIG_BOOTMETH_GLOBAL=y
+CONFIG_BOOTMETH_CROS=y
+CONFIG_BOOTMETH_EXTLINUX=y
+CONFIG_BOOTMETH_EXTLINUX_PXE=y
+CONFIG_BOOTMETH_EFILOADER=y
+CONFIG_BOOTMETH_EFI_BOOTMGR=y
+CONFIG_BOOTMETH_VBE=y
+CONFIG_BOOTMETH_DISTRO=y
+CONFIG_BOOTMETH_VBE_REQUEST=y
+CONFIG_BOOTMETH_VBE_SIMPLE=y
+CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
+CONFIG_EXPO=y
+CONFIG_BOOTMETH_SCRIPT=y
+# CONFIG_LEGACY_IMAGE_FORMAT is not set
+CONFIG_SYS_BOOTM_LEN=0x1000000
+CONFIG_SUPPORT_RAW_INITRD=y
+# CONFIG_CHROMEOS is not set
+# CONFIG_CHROMEOS_VBOOT is not set
+# CONFIG_RAMBOOT_PBL is not set
+CONFIG_SYS_BOOT_RAMDISK_HIGH=y
+# CONFIG_DISTRO_DEFAULTS is not set
+
+#
+# Boot timing
+#
+# CONFIG_BOOTSTAGE is not set
+CONFIG_BOOTSTAGE_STASH_SIZE=0x1000
+CONFIG_SHOW_BOOT_PROGRESS=y
+
+#
+# Boot media
+#
+# CONFIG_NAND_BOOT is not set
+# CONFIG_ONENAND_BOOT is not set
+# CONFIG_QSPI_BOOT is not set
+# CONFIG_SATA_BOOT is not set
+# CONFIG_SD_BOOT is not set
+# CONFIG_SD_BOOT_QSPI is not set
+# CONFIG_SPI_BOOT is not set
+
+#
+# Autoboot options
+#
+CONFIG_AUTOBOOT=y
+CONFIG_BOOTDELAY=2
+# CONFIG_AUTOBOOT_KEYED is not set
+# CONFIG_AUTOBOOT_USE_MENUKEY is not set
+# CONFIG_BOOT_RETRY is not set
+
+#
+# Image support
+#
+# CONFIG_IMAGE_PRE_LOAD is not set
+
+#
+# Devicetree fixup
+#
+# CONFIG_OF_ENV_SETUP is not set
+# CONFIG_OF_BOARD_SETUP is not set
+# CONFIG_OF_SYSTEM_SETUP is not set
+# CONFIG_OF_STDOUT_VIA_ALIAS is not set
+# CONFIG_FDT_FIXUP_PARTITIONS is not set
+# CONFIG_FDT_SIMPLEFB is not set
+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
+# CONFIG_BOOTARGS_SUBST is not set
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
+CONFIG_USE_PREBOOT=y
+CONFIG_PREBOOT="usb start"
+CONFIG_PREBOOT_DEFINED=y
+CONFIG_DEFAULT_FDT_FILE=""
+
+#
+# Configuration editor
+#
+# CONFIG_CEDIT is not set
+
+#
+# Console
+#
+CONFIG_MENU=y
+# CONFIG_CONSOLE_RECORD is not set
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=1044
+# CONFIG_DISABLE_CONSOLE is not set
+CONFIG_LOGLEVEL=4
+# CONFIG_SILENT_CONSOLE is not set
+# CONFIG_SPL_SILENT_CONSOLE is not set
+# CONFIG_TPL_SILENT_CONSOLE is not set
+CONFIG_PRE_CONSOLE_BUFFER=y
+CONFIG_CONSOLE_FLUSH_SUPPORT=y
+# CONFIG_CONSOLE_FLUSH_ON_NEWLINE is not set
+CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
+# CONFIG_SYS_CONSOLE_ENV_OVERWRITE is not set
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_SYS_STDIO_DEREGISTER=y
+# CONFIG_SPL_SYS_STDIO_DEREGISTER is not set
+CONFIG_SYS_DEVICE_NULLDEV=y
+
+#
+# Logging
+#
+CONFIG_LOG=y
+CONFIG_LOG_MAX_LEVEL=6
+CONFIG_LOG_DEFAULT_LEVEL=6
+CONFIG_LOG_CONSOLE=y
+# CONFIG_LOGF_FILE is not set
+CONFIG_LOGF_LINE=y
+CONFIG_LOGF_FUNC=y
+CONFIG_LOGF_FUNC_PAD=20
+# CONFIG_LOG_SYSLOG is not set
+# CONFIG_LOG_ERROR_RETURN is not set
+
+#
+# Init options
+#
+# CONFIG_BOARD_TYPES is not set
+CONFIG_DISPLAY_CPUINFO=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+
+#
+# Start-up hooks
+#
+# CONFIG_CYCLIC is not set
+CONFIG_EVENT=y
+CONFIG_EVENT_DYNAMIC=y
+# CONFIG_EVENT_DEBUG is not set
+# CONFIG_ARCH_MISC_INIT is not set
+# CONFIG_BOARD_EARLY_INIT_F is not set
+CONFIG_BOARD_EARLY_INIT_R=y
+# CONFIG_BOARD_POSTCLK_INIT is not set
+# CONFIG_BOARD_LATE_INIT is not set
+# CONFIG_HWCONFIG is not set
+CONFIG_LAST_STAGE_INIT=y
+# CONFIG_MISC_INIT_R is not set
+# CONFIG_SYS_MALLOC_BOOTPARAMS is not set
+# CONFIG_ID_EEPROM is not set
+CONFIG_PCI_INIT_R=y
+# CONFIG_RESET_PHY_R is not set
+
+#
+# Security support
+#
+CONFIG_HASH=y
+# CONFIG_STACKPROTECTOR is not set
+# CONFIG_BOARD_RNG_SEED is not set
+
+#
+# Update support
+#
+# CONFIG_UPDATE_TFTP is not set
+# CONFIG_ANDROID_AB is not set
+
+#
+# Blob list
+#
+# CONFIG_BLOBLIST is not set
+CONFIG_SUPPORT_SPL=y
+CONFIG_SUPPORT_TPL=y
+# CONFIG_TPL is not set
+# CONFIG_VPL is not set
+CONFIG_IMAGE_SIGN_INFO=y
+CONFIG_CMDLINE=y
+CONFIG_HUSH_PARSER=y
+
+#
+# Hush flavor to use
+#
+CONFIG_HUSH_OLD_PARSER=y
+# CONFIG_HUSH_MODERN_PARSER is not set
+CONFIG_CMDLINE_EDITING=y
+# CONFIG_CMDLINE_PS_SUPPORT is not set
+CONFIG_AUTO_COMPLETE=y
+CONFIG_SYS_LONGHELP=y
+CONFIG_SYS_PROMPT="=> "
+CONFIG_SYS_PROMPT_HUSH_PS2="> "
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_XTRACE=y
+
+#
+# Commands
+#
+
+#
+# Info commands
+#
+CONFIG_CMD_ACPI=y
+CONFIG_CMD_BDI=y
+CONFIG_CMD_BDINFO_EXTRA=y
+# CONFIG_CMD_CONFIG is not set
+CONFIG_CMD_CONSOLE=y
+# CONFIG_CMD_HISTORY is not set
+# CONFIG_CMD_PMC is not set
+# CONFIG_CMD_SMBIOS is not set
+
+#
+# Boot commands
+#
+CONFIG_CMD_BOOTD=y
+CONFIG_CMD_BOOTM=y
+CONFIG_CMD_BOOTDEV=y
+CONFIG_CMD_BOOTFLOW=y
+CONFIG_CMD_BOOTFLOW_FULL=y
+CONFIG_CMD_BOOTMETH=y
+CONFIG_BOOTM_EFI=y
+# CONFIG_CMD_BOOTZ is not set
+CONFIG_BOOTM_LINUX=y
+CONFIG_BOOTM_NETBSD=y
+# CONFIG_BOOTM_OPENRTOS is not set
+# CONFIG_BOOTM_OSE is not set
+CONFIG_BOOTM_PLAN9=y
+CONFIG_BOOTM_RTEMS=y
+CONFIG_CMD_VBE=y
+CONFIG_BOOTM_VXWORKS=y
+CONFIG_CMD_BOOTEFI=y
+CONFIG_CMD_BOOTEFI_BINARY=y
+CONFIG_CMD_BOOTEFI_BOOTMGR=y
+CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
+# CONFIG_CMD_BOOTEFI_HELLO is not set
+# CONFIG_CMD_BOOTEFI_SELFTEST is not set
+# CONFIG_CMD_BOOTMENU is not set
+# CONFIG_CMD_ADTIMG is not set
+CONFIG_CMD_ELF=y
+# CONFIG_CMD_ELF_FDT_SETUP is not set
+CONFIG_CMD_FDT=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RUN=y
+CONFIG_CMD_IMI=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_XIMG=y
+CONFIG_CMD_ZBOOT=y
+
+#
+# Environment commands
+#
+# CONFIG_CMD_ASKENV is not set
+CONFIG_CMD_EXPORTENV=y
+CONFIG_CMD_IMPORTENV=y
+CONFIG_CMD_EDITENV=y
+# CONFIG_CMD_GREPENV is not set
+CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_ERASEENV is not set
+CONFIG_CMD_ENV_EXISTS=y
+# CONFIG_CMD_ENV_CALLBACK is not set
+# CONFIG_CMD_ENV_FLAGS is not set
+# CONFIG_CMD_NVEDIT_EFI is not set
+# CONFIG_CMD_NVEDIT_INDIRECT is not set
+# CONFIG_CMD_NVEDIT_INFO is not set
+# CONFIG_CMD_NVEDIT_LOAD is not set
+# CONFIG_CMD_NVEDIT_SELECT is not set
+
+#
+# Memory commands
+#
+# CONFIG_CMD_BINOP is not set
+CONFIG_CMD_CRC32=y
+# CONFIG_CRC32_VERIFY is not set
+# CONFIG_LOOPW is not set
+# CONFIG_CMD_MD5SUM is not set
+# CONFIG_CMD_MEMINFO is not set
+CONFIG_CMD_MEMORY=y
+# CONFIG_CMD_MEM_SEARCH is not set
+# CONFIG_CMD_MX_CYCLIC is not set
+CONFIG_CMD_RANDOM=y
+# CONFIG_CMD_MEMTEST is not set
+# CONFIG_CMD_SHA1SUM is not set
+# CONFIG_CMD_STRINGS is not set
+
+#
+# Compression commands
+#
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNLZ4 is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_ZIP is not set
+
+#
+# Device access commands
+#
+# CONFIG_CMD_ARMFLASH is not set
+# CONFIG_CMD_BCB is not set
+# CONFIG_CMD_BIND is not set
+# CONFIG_CMD_CLK is not set
+# CONFIG_CMD_DEMO is not set
+# CONFIG_CMD_DFU is not set
+CONFIG_CMD_DM=y
+# CONFIG_CMD_FPGAD is not set
+# CONFIG_CMD_FUSE is not set
+# CONFIG_CMD_GPIO is not set
+# CONFIG_CMD_GPT is not set
+CONFIG_CMD_IDE=y
+CONFIG_CMD_IO=y
+# CONFIG_CMD_IOTRACE is not set
+# CONFIG_CMD_I2C is not set
+CONFIG_CMD_LOADB=y
+# CONFIG_CMD_LOADM is not set
+CONFIG_CMD_LOADS=y
+# CONFIG_LOADS_ECHO is not set
+# CONFIG_CMD_SAVES is not set
+# CONFIG_SYS_LOADS_BAUD_CHANGE is not set
+CONFIG_CMD_LOADXY_TIMEOUT=90
+# CONFIG_CMD_LSBLK is not set
+# CONFIG_CMD_MBR is not set
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_BKOPS_ENABLE is not set
+# CONFIG_CMD_MMC_REG is not set
+# CONFIG_CMD_MMC_SWRITE is not set
+# CONFIG_CMD_CLONE is not set
+# CONFIG_CMD_MTD is not set
+CONFIG_CMD_NVME=y
+# CONFIG_CMD_ONENAND is not set
+# CONFIG_CMD_OSD is not set
+CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
+# CONFIG_CMD_PCI_MPS is not set
+# CONFIG_CMD_POWEROFF is not set
+# CONFIG_CMD_READ is not set
+CONFIG_CMD_SATA=y
+CONFIG_CMD_SCSI=y
+# CONFIG_CMD_SDRAM is not set
+# CONFIG_CMD_TSI148 is not set
+# CONFIG_CMD_UNIVERSE is not set
+CONFIG_CMD_USB=y
+# CONFIG_CMD_USB_SDP is not set
+# CONFIG_CMD_RKMTD is not set
+# CONFIG_CMD_WRITE is not set
+
+#
+# Shell scripting commands
+#
+# CONFIG_CMD_CAT is not set
+CONFIG_CMD_ECHO=y
+CONFIG_CMD_ITEST=y
+CONFIG_CMD_SOURCE=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_XXD is not set
+
+#
+# Android support commands
+#
+CONFIG_CMD_NET=y
+CONFIG_CMD_BOOTP=y
+CONFIG_CMD_DHCP=y
+# CONFIG_BOOTP_MAY_FAIL is not set
+CONFIG_BOOTP_BOOTPATH=y
+# CONFIG_BOOTP_VENDOREX is not set
+CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_BOOTP_DNS=y
+# CONFIG_BOOTP_DNS2 is not set
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
+# CONFIG_BOOTP_PREFER_SERVERIP is not set
+CONFIG_BOOTP_SUBNETMASK=y
+# CONFIG_BOOTP_NISDOMAIN is not set
+# CONFIG_BOOTP_NTPSERVER is not set
+# CONFIG_CMD_PCAP is not set
+CONFIG_BOOTP_PXE=y
+CONFIG_BOOTP_PXE_CLIENTARCH=0x0
+# CONFIG_BOOTP_PXE_DHCP_OPTION is not set
+CONFIG_BOOTP_VCI_STRING="U-Boot"
+CONFIG_CMD_TFTPBOOT=y
+# CONFIG_CMD_TFTPPUT is not set
+# CONFIG_CMD_TFTPSRV is not set
+CONFIG_NET_TFTP_VARS=y
+# CONFIG_CMD_RARP is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_SYS_DISABLE_AUTOLOAD is not set
+# CONFIG_CMD_WGET is not set
+CONFIG_CMD_MII=y
+CONFIG_CMD_MDIO=y
+CONFIG_CMD_PING=y
+# CONFIG_CMD_CDP is not set
+# CONFIG_CMD_SNTP is not set
+# CONFIG_CMD_DNS is not set
+# CONFIG_CMD_LINK_LOCAL is not set
+# CONFIG_CMD_ETHSW is not set
+CONFIG_CMD_PXE=y
+# CONFIG_CMD_WOL is not set
+
+#
+# Misc commands
+#
+# CONFIG_CMD_2048 is not set
+# CONFIG_CMD_BMP is not set
+# CONFIG_CMD_BSP is not set
+CONFIG_CMD_BLOCK_CACHE=y
+# CONFIG_CMD_CACHE is not set
+# CONFIG_CMD_CONITRACE is not set
+CONFIG_CMD_CLS=y
+# CONFIG_CMD_EFIDEBUG is not set
+CONFIG_CMD_EFICONFIG=y
+# CONFIG_CMD_EXCEPTION is not set
+# CONFIG_CMD_INI is not set
+CONFIG_CMD_DATE=y
+# CONFIG_CMD_RTC is not set
+CONFIG_CMD_TIME=y
+CONFIG_CMD_GETTIME=y
+# CONFIG_CMD_PAUSE is not set
+CONFIG_CMD_SLEEP=y
+# CONFIG_CMD_TIMER is not set
+CONFIG_CMD_SOUND=y
+# CONFIG_CMD_SYSBOOT is not set
+# CONFIG_CMD_QFW is not set
+# CONFIG_CMD_PSTORE is not set
+# CONFIG_CMD_TERMINAL is not set
+# CONFIG_CMD_UUID is not set
+CONFIG_CMD_VIDCONSOLE=y
+CONFIG_CMD_SELECT_FONT=y
+
+#
+# TI specific command line interface
+#
+
+#
+# Power commands
+#
+
+#
+# Security commands
+#
+# CONFIG_CMD_AES is not set
+# CONFIG_CMD_BLOB is not set
+# CONFIG_CMD_HASH is not set
+
+#
+# Firmware commands
+#
+
+#
+# Filesystem commands
+#
+# CONFIG_CMD_BTRFS is not set
+CONFIG_CMD_CBFS=y
+# CONFIG_CMD_EROFS is not set
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+# CONFIG_CMD_SQUASHFS is not set
+CONFIG_CMD_FS_GENERIC=y
+# CONFIG_CMD_FS_UUID is not set
+# CONFIG_CMD_JFFS2 is not set
+# CONFIG_CMD_MTDPARTS is not set
+CONFIG_MTDIDS_DEFAULT=""
+CONFIG_MTDPARTS_DEFAULT=""
+# CONFIG_CMD_ZFS is not set
+
+#
+# Debug commands
+#
+CONFIG_CMD_CBSYSINFO=y
+# CONFIG_CMD_DIAG is not set
+# CONFIG_CMD_EVENT is not set
+CONFIG_CMD_IRQ=y
+# CONFIG_CMD_LOG is not set
+# CONFIG_CMD_UBI is not set
+# CONFIG_MMC_SPEED_MODE_SET is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITIONS=y
+CONFIG_MAC_PARTITION=y
+CONFIG_DOS_PARTITION=y
+CONFIG_ISO_PARTITION=y
+# CONFIG_AMIGA_PARTITION is not set
+CONFIG_EFI_PARTITION=y
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=128
+CONFIG_EFI_PARTITION_ENTRIES_OFF=0
+CONFIG_PARTITION_UUIDS=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_SUPPORT_OF_CONTROL=y
+
+#
+# Device Tree Control
+#
+CONFIG_OF_CONTROL=y
+CONFIG_OF_REAL=y
+# CONFIG_OF_LIVE is not set
+# CONFIG_OF_UPSTREAM is not set
+CONFIG_OF_SEPARATE=y
+# CONFIG_OF_EMBED is not set
+# CONFIG_OF_BOARD is not set
+# CONFIG_OF_OMIT_DTB is not set
+CONFIG_DEVICE_TREE_INCLUDES=""
+CONFIG_OF_LIST="coreboot"
+# CONFIG_MULTI_DTB_FIT is not set
+CONFIG_OF_TAG_MIGRATE=y
+# CONFIG_OF_DTB_PROPS_REMOVE is not set
+
+#
+# Environment
+#
+CONFIG_ENV_SUPPORT=y
+CONFIG_SAVEENV=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_MIN_ENTRIES=64
+CONFIG_ENV_MAX_ENTRIES=512
+CONFIG_ENV_IS_DEFAULT=y
+CONFIG_ENV_IS_NOWHERE=y
+# CONFIG_ENV_IS_IN_EEPROM is not set
+# CONFIG_ENV_IS_IN_FAT is not set
+# CONFIG_ENV_IS_IN_EXT4 is not set
+# CONFIG_ENV_IS_IN_FLASH is not set
+# CONFIG_ENV_IS_IN_MMC is not set
+# CONFIG_ENV_IS_IN_NAND is not set
+# CONFIG_ENV_IS_IN_NVRAM is not set
+# CONFIG_ENV_IS_IN_ONENAND is not set
+# CONFIG_ENV_IS_IN_REMOTE is not set
+# CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_USE_DEFAULT_ENV_FILE is not set
+# CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set
+# CONFIG_ENV_IMPORT_FDT is not set
+# CONFIG_ENV_APPEND is not set
+# CONFIG_ENV_WRITEABLE_LIST is not set
+# CONFIG_ENV_ACCESS_IGNORE_FORCE is not set
+CONFIG_USE_BOOTFILE=y
+CONFIG_BOOTFILE="bzImage"
+# CONFIG_USE_ETHPRIME is not set
+CONFIG_USE_HOSTNAME=y
+CONFIG_HOSTNAME="x86"
+# CONFIG_VERSION_VARIABLE is not set
+CONFIG_NET=y
+CONFIG_ARP_TIMEOUT=5000
+CONFIG_NET_RETRY_COUNT=5
+# CONFIG_PROT_UDP is not set
+CONFIG_BOOTDEV_ETH=y
+# CONFIG_BOOTP_SEND_HOSTNAME is not set
+# CONFIG_NET_RANDOM_ETHADDR is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_IP_DEFRAG is not set
+# CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set
+CONFIG_TFTP_BLOCKSIZE=1468
+# CONFIG_TFTP_PORT is not set
+CONFIG_TFTP_WINDOWSIZE=1
+CONFIG_TFTP_TSIZE=y
+# CONFIG_SERVERIP_FROM_PROXYDHCP is not set
+CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS=100
+# CONFIG_KEEP_SERVERADDR is not set
+# CONFIG_UDP_CHECKSUM is not set
+# CONFIG_BOOTP_SERVERIP is not set
+CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64
+# CONFIG_USE_GATEWAYIP is not set
+# CONFIG_USE_IPADDR is not set
+# CONFIG_USE_NETMASK is not set
+CONFIG_USE_ROOTPATH=y
+CONFIG_ROOTPATH="/opt/nfsroot"
+# CONFIG_USE_SERVERIP is not set
+# CONFIG_PROT_TCP is not set
+# CONFIG_IPV6 is not set
+CONFIG_SYS_RX_ETH_BUFFER=4
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_DM=y
+# CONFIG_DM_WARN is not set
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_STATS is not set
+CONFIG_DM_DEVICE_REMOVE=y
+CONFIG_DM_EVENT=y
+CONFIG_DM_STDIO=y
+CONFIG_DM_SEQ_ALIAS=y
+# CONFIG_DM_DMA is not set
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+# CONFIG_DEVRES is not set
+CONFIG_SIMPLE_BUS=y
+# CONFIG_SIMPLE_BUS_CORRECT_RANGE is not set
+CONFIG_OF_TRANSLATE=y
+# CONFIG_TRANSLATION_OFFSET is not set
+CONFIG_DM_DEV_READ_INLINE=y
+# CONFIG_OFNODE_MULTI_TREE is not set
+# CONFIG_ACPIGEN is not set
+# CONFIG_BOUNCE_BUFFER is not set
+# CONFIG_ADC is not set
+CONFIG_SATA=y
+CONFIG_LIBATA=y
+CONFIG_SCSI_AHCI=y
+
+#
+# SATA/SCSI device support
+#
+CONFIG_AHCI_PCI=y
+# CONFIG_DWC_AHCI is not set
+# CONFIG_DWC_AHSATA is not set
+# CONFIG_MTK_AHCI is not set
+# CONFIG_SUNXI_AHCI is not set
+# CONFIG_SATA_CEVA is not set
+# CONFIG_SATA_MV is not set
+# CONFIG_SATA_SIL is not set
+# CONFIG_AXI is not set
+
+#
+# Bus devices
+#
+CONFIG_BLK=y
+CONFIG_BLOCK_CACHE=y
+# CONFIG_BLKMAP is not set
+# CONFIG_EFI_MEDIA is not set
+CONFIG_IDE=y
+CONFIG_SYS_IDE_MAXBUS=0x2
+CONFIG_SYS_IDE_MAXDEVICE=4
+CONFIG_SYS_ATA_BASE_ADDR=0x0
+CONFIG_SYS_ATA_STRIDE=0x1
+CONFIG_SYS_ATA_DATA_OFFSET=0
+CONFIG_SYS_ATA_REG_OFFSET=0
+CONFIG_SYS_ATA_ALT_OFFSET=0
+CONFIG_SYS_ATA_IDE0_OFFSET=0x1f0
+CONFIG_SYS_ATA_IDE1_OFFSET=0x170
+CONFIG_ATAPI=y
+# CONFIG_IDE_RESET is not set
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
+# CONFIG_RKMTD is not set
+# CONFIG_BOOTCOUNT_LIMIT is not set
+
+#
+# Button Support
+#
+# CONFIG_BUTTON is not set
+
+#
+# Cache Controller drivers
+#
+# CONFIG_CACHE is not set
+# CONFIG_ANDES_L2_CACHE is not set
+# CONFIG_NCORE_CACHE is not set
+# CONFIG_SIFIVE_CCACHE is not set
+# CONFIG_SIFIVE_PL2 is not set
+
+#
+# Clock
+#
+# CONFIG_CLK is not set
+# CONFIG_CLK_CCF is not set
+# CONFIG_CLK_RCAR is not set
+# CONFIG_CLK_RCAR_CPG_LIB is not set
+# CONFIG_CPU is not set
+
+#
+# Hardware crypto devices
+#
+# CONFIG_DM_HASH is not set
+# CONFIG_FSL_CAAM is not set
+# CONFIG_SYS_FSL_SEC_BE is not set
+# CONFIG_SYS_FSL_SEC_LE is not set
+# CONFIG_NPCM_AES is not set
+# CONFIG_NPCM_SHA is not set
+# CONFIG_DDR_SPD is not set
+# CONFIG_IMX_SNPS_DDR_PHY is not set
+
+#
+# Demo for driver model
+#
+# CONFIG_DM_DEMO is not set
+
+#
+# DFU support
+#
+
+#
+# DMA Support
+#
+# CONFIG_DMA is not set
+# CONFIG_DMA_LPC32XX is not set
+# CONFIG_TI_EDMA3 is not set
+# CONFIG_DMA_LEGACY is not set
+
+#
+# Extcon Support
+#
+# CONFIG_EXTCON is not set
+
+#
+# Fastboot support
+#
+# CONFIG_UDP_FUNCTION_FASTBOOT is not set
+# CONFIG_TCP_FUNCTION_FASTBOOT is not set
+# CONFIG_FIRMWARE is not set
+# CONFIG_ZYNQMP_FIRMWARE is not set
+# CONFIG_DM_FUZZING_ENGINE is not set
+
+#
+# FPGA support
+#
+# CONFIG_FPGA_ALTERA is not set
+# CONFIG_FPGA_SOCFPGA is not set
+# CONFIG_FPGA_LATTICE is not set
+# CONFIG_FPGA_XILINX is not set
+# CONFIG_DM_FPGA is not set
+# CONFIG_FWU_MDATA is not set
+CONFIG_GPIO=y
+# CONFIG_GPIO_HOG is not set
+# CONFIG_DM_GPIO_LOOKUP_LABEL is not set
+# CONFIG_ALTERA_PIO is not set
+# CONFIG_BCM2835_GPIO is not set
+# CONFIG_DWAPB_GPIO is not set
+# CONFIG_AT91_GPIO is not set
+# CONFIG_ATMEL_PIO4 is not set
+# CONFIG_ASPEED_GPIO is not set
+# CONFIG_DA8XX_GPIO is not set
+# CONFIG_HIKEY_GPIO is not set
+# CONFIG_INTEL_BROADWELL_GPIO is not set
+# CONFIG_INTEL_GPIO is not set
+# CONFIG_INTEL_ICH6_GPIO is not set
+# CONFIG_IMX_RGPIO2P is not set
+# CONFIG_IPROC_GPIO is not set
+# CONFIG_HSDK_CREG_GPIO is not set
+# CONFIG_KIRKWOOD_GPIO is not set
+# CONFIG_LPC32XX_GPIO is not set
+# CONFIG_MCP230XX_GPIO is not set
+# CONFIG_MSM_GPIO is not set
+# CONFIG_MXC_GPIO is not set
+# CONFIG_MXS_GPIO is not set
+# CONFIG_NPCM_GPIO is not set
+# CONFIG_CMD_PCA953X is not set
+# CONFIG_ROCKCHIP_GPIO is not set
+# CONFIG_XILINX_GPIO is not set
+# CONFIG_TCA642X is not set
+# CONFIG_TEGRA_GPIO is not set
+# CONFIG_TEGRA186_GPIO is not set
+# CONFIG_VYBRID_GPIO is not set
+# CONFIG_SIFIVE_GPIO is not set
+# CONFIG_ZYNQ_GPIO is not set
+# CONFIG_DM_74X164 is not set
+# CONFIG_PCA953X is not set
+# CONFIG_MPC8XXX_GPIO is not set
+# CONFIG_MPC8XX_GPIO is not set
+# CONFIG_NX_GPIO is not set
+# CONFIG_NOMADIK_GPIO is not set
+# CONFIG_ZYNQMP_GPIO_MODEPIN is not set
+# CONFIG_SLG7XL45106_I2C_GPO is not set
+# CONFIG_FTGPIO010 is not set
+
+#
+# Hardware Spinlock Support
+#
+# CONFIG_DM_HWSPINLOCK is not set
+CONFIG_I2C=y
+# CONFIG_DM_I2C is not set
+# CONFIG_SYS_I2C_LEGACY is not set
+# CONFIG_SPL_SYS_I2C_LEGACY is not set
+# CONFIG_TPL_SYS_I2C_LEGACY is not set
+# CONFIG_SYS_I2C_FSL is not set
+# CONFIG_SYS_I2C_DW is not set
+# CONFIG_SYS_I2C_IMX_LPI2C is not set
+# CONFIG_SYS_I2C_MTK is not set
+# CONFIG_SYS_I2C_MICROCHIP is not set
+# CONFIG_SYS_I2C_MXC is not set
+# CONFIG_SYS_I2C_NPCM is not set
+# CONFIG_SYS_I2C_SOFT is not set
+# CONFIG_SYS_I2C_MV is not set
+# CONFIG_SYS_I2C_MVTWSI is not set
+CONFIG_INPUT=y
+CONFIG_DM_KEYBOARD=y
+# CONFIG_BUTTON_KEYBOARD is not set
+# CONFIG_CROS_EC_KEYB is not set
+CONFIG_I8042_KEYB=y
+# CONFIG_TEGRA_KEYBOARD is not set
+# CONFIG_TWL4030_INPUT is not set
+
+#
+# IOMMU device drivers
+#
+# CONFIG_IOMMU is not set
+
+#
+# LED Support
+#
+# CONFIG_LED is not set
+# CONFIG_LED_STATUS is not set
+
+#
+# Mailbox Controller Support
+#
+# CONFIG_DM_MAILBOX is not set
+
+#
+# Memory Controller drivers
+#
+# CONFIG_MEMORY is not set
+# CONFIG_ATMEL_EBI is not set
+# CONFIG_MFD_ATMEL_SMC is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MISC is not set
+# CONFIG_NVMEM is not set
+# CONFIG_SPL_NVMEM is not set
+# CONFIG_SMSC_LPC47M is not set
+# CONFIG_SMSC_SIO1007 is not set
+CONFIG_CBMEM_CONSOLE=y
+# CONFIG_CROS_EC is not set
+# CONFIG_DS4510 is not set
+# CONFIG_FSL_SEC_MON is not set
+CONFIG_IRQ=y
+# CONFIG_NPCM_HOST is not set
+# CONFIG_NUVOTON_NCT6102D is not set
+# CONFIG_P2SB is not set
+# CONFIG_PWRSEQ is not set
+# CONFIG_PCA9551_LED is not set
+# CONFIG_TEST_DRV is not set
+# CONFIG_USB_HUB_USB251XB is not set
+# CONFIG_TWL4030_LED is not set
+# CONFIG_WINBOND_W83627 is not set
+# CONFIG_FS_LOADER is not set
+
+#
+# MMC Host controller Support
+#
+CONFIG_MMC=y
+CONFIG_MMC_WRITE=y
+# CONFIG_MMC_BROKEN_CD is not set
+CONFIG_DM_MMC=y
+# CONFIG_ARM_PL180_MMCI is not set
+CONFIG_MMC_QUIRKS=y
+CONFIG_SYS_MMC_MAX_BLK_COUNT=65535
+CONFIG_MMC_HW_PARTITIONING=y
+# CONFIG_SUPPORT_EMMC_RPMB is not set
+# CONFIG_SUPPORT_EMMC_BOOT is not set
+# CONFIG_MMC_IO_VOLTAGE is not set
+# CONFIG_MMC_HS400_ES_SUPPORT is not set
+# CONFIG_MMC_HS400_SUPPORT is not set
+# CONFIG_MMC_HS200_SUPPORT is not set
+CONFIG_MMC_VERBOSE=y
+# CONFIG_MMC_TRACE is not set
+# CONFIG_MMC_DW is not set
+# CONFIG_MMC_MXC is not set
+CONFIG_MMC_PCI=y
+# CONFIG_MMC_OMAP_HS is not set
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+# CONFIG_MMC_SDHCI_ADMA is not set
+# CONFIG_MMC_SDHCI_ADMA_FORCE_32BIT is not set
+# CONFIG_MMC_SDHCI_ADMA_64BIT is not set
+# CONFIG_MMC_SDHCI_BCMSTB is not set
+# CONFIG_MMC_SDHCI_CADENCE is not set
+# CONFIG_MMC_SDHCI_CV1800B is not set
+# CONFIG_MMC_SDHCI_IPROC is not set
+# CONFIG_MMC_SDHCI_F_SDH30 is not set
+# CONFIG_MMC_SDHCI_KONA is not set
+# CONFIG_MMC_SDHCI_MSM is not set
+# CONFIG_MMC_SDHCI_NPCM is not set
+# CONFIG_MMC_SDHCI_S5P is not set
+# CONFIG_MMC_SDHCI_STI is not set
+# CONFIG_MMC_SDHCI_XENON is not set
+# CONFIG_MMC_SDHCI_TANGIER is not set
+# CONFIG_MMC_SDHCI_ZYNQ is not set
+# CONFIG_MMC_PITON is not set
+# CONFIG_STM32_SDMMC2 is not set
+# CONFIG_FTSDC010 is not set
+# CONFIG_FSL_ESDHC is not set
+# CONFIG_FSL_ESDHC_IMX is not set
+
+#
+# MTD Support
+#
+CONFIG_MTD=y
+# CONFIG_DM_MTD is not set
+# CONFIG_MTD_NOR_FLASH is not set
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_SYS_MTDPARTS_RUNTIME is not set
+# CONFIG_FLASH_CFI_DRIVER is not set
+# CONFIG_HBMC_AM654 is not set
+# CONFIG_SAMSUNG_ONENAND is not set
+# CONFIG_USE_SYS_MAX_FLASH_BANKS is not set
+# CONFIG_MTD_RAW_NAND is not set
+
+#
+# SPI Flash Support
+#
+# CONFIG_SPI_FLASH is not set
+
+#
+# UBI support
+#
+# CONFIG_UBI_SILENCE_MSG is not set
+# CONFIG_MTD_UBI is not set
+# CONFIG_NVMXIP is not set
+# CONFIG_NVMXIP_QSPI is not set
+
+#
+# Multiplexer drivers
+#
+# CONFIG_MULTIPLEXER is not set
+# CONFIG_BITBANGMII is not set
+# CONFIG_MV88E6352_SWITCH is not set
+CONFIG_PHYLIB=y
+# CONFIG_PHY_ADDR_ENABLE is not set
+# CONFIG_B53_SWITCH is not set
+# CONFIG_MV88E61XX_SWITCH is not set
+# CONFIG_PHYLIB_10G is not set
+# CONFIG_PHY_ADIN is not set
+# CONFIG_PHY_AQUANTIA is not set
+# CONFIG_PHY_ATHEROS is not set
+# CONFIG_SPL_PHY_ATHEROS is not set
+# CONFIG_PHY_BROADCOM is not set
+# CONFIG_PHY_CORTINA is not set
+# CONFIG_PHY_DAVICOM is not set
+# CONFIG_PHY_ET1011C is not set
+# CONFIG_PHY_LXT is not set
+# CONFIG_PHY_MARVELL is not set
+# CONFIG_PHY_MARVELL_10G is not set
+# CONFIG_PHY_MESON_GXL is not set
+# CONFIG_PHY_MICREL is not set
+# CONFIG_PHY_MOTORCOMM is not set
+# CONFIG_PHY_MSCC is not set
+# CONFIG_PHY_NATSEMI is not set
+# CONFIG_PHY_NXP_C45_TJA11XX is not set
+# CONFIG_PHY_NXP_TJA11XX is not set
+# CONFIG_PHY_REALTEK is not set
+# CONFIG_PHY_SMSC is not set
+# CONFIG_PHY_TERANETICS is not set
+# CONFIG_PHY_TI is not set
+# CONFIG_PHY_TI_DP83867 is not set
+# CONFIG_PHY_TI_DP83869 is not set
+# CONFIG_PHY_TI_GENERIC is not set
+# CONFIG_PHY_VITESSE is not set
+# CONFIG_PHY_XILINX is not set
+# CONFIG_PHY_XILINX_GMII2RGMII is not set
+# CONFIG_PHY_XWAY is not set
+# CONFIG_PHY_ETHERNET_ID is not set
+# CONFIG_PHY_FIXED is not set
+# CONFIG_PHY_NCSI is not set
+# CONFIG_FSL_MEMAC is not set
+CONFIG_PHY_RESET_DELAY=0
+# CONFIG_FSL_PFE is not set
+CONFIG_ETH=y
+CONFIG_DM_ETH=y
+# CONFIG_DM_MDIO is not set
+# CONFIG_DM_ETH_PHY is not set
+CONFIG_NETDEVICES=y
+# CONFIG_PHY_GIGE is not set
+# CONFIG_ALTERA_TSE is not set
+# CONFIG_BCM_SF2_ETH is not set
+# CONFIG_BCMGENET is not set
+# CONFIG_BNXT_ETH is not set
+# CONFIG_CALXEDA_XGMAC is not set
+# CONFIG_DRIVER_DM9000 is not set
+# CONFIG_DWC_ETH_QOS is not set
+CONFIG_E1000=y
+# CONFIG_E1000_NO_NVM is not set
+# CONFIG_E1000_SPI_GENERIC is not set
+# CONFIG_E1000_SPI is not set
+# CONFIG_CMD_E1000 is not set
+# CONFIG_EEPRO100 is not set
+CONFIG_ETH_DESIGNWARE=y
+# CONFIG_ETH_DESIGNWARE_MESON8B is not set
+# CONFIG_ETH_DESIGNWARE_SOCFPGA is not set
+# CONFIG_ETH_DESIGNWARE_S700 is not set
+# CONFIG_DW_ALTDESCRIPTOR is not set
+# CONFIG_ETHOC is not set
+# CONFIG_FTMAC100 is not set
+# CONFIG_FTGMAC100 is not set
+# CONFIG_MCFFEC is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_LITEETH is not set
+# CONFIG_MACB is not set
+# CONFIG_NET_NPCM750 is not set
+CONFIG_PCH_GBE=y
+# CONFIG_RGMII is not set
+# CONFIG_MII is not set
+# CONFIG_RMII is not set
+# CONFIG_PCNET is not set
+# CONFIG_QE_UEC is not set
+# CONFIG_RTL8139 is not set
+CONFIG_RTL8169=y
+# CONFIG_SMC911X is not set
+# CONFIG_SUN7I_GMAC is not set
+# CONFIG_SUN4I_EMAC is not set
+# CONFIG_SUN8I_EMAC is not set
+# CONFIG_SH_ETHER is not set
+# CONFIG_DRIVER_TI_CPSW is not set
+# CONFIG_DRIVER_TI_EMAC is not set
+# CONFIG_DRIVER_TI_KEYSTONE_NET is not set
+# CONFIG_TULIP is not set
+# CONFIG_XILINX_AXIEMAC is not set
+# CONFIG_VSC7385_ENET is not set
+# CONFIG_XILINX_EMACLITE is not set
+# CONFIG_ZYNQ_GEM is not set
+# CONFIG_GMAC_ROCKCHIP is not set
+# CONFIG_TSEC_ENET is not set
+# CONFIG_MEDIATEK_ETH is not set
+# CONFIG_HIFEMAC_ETH is not set
+# CONFIG_HIGMACV300_ETH is not set
+CONFIG_NVME=y
+# CONFIG_NVME_APPLE is not set
+CONFIG_NVME_PCI=y
+# CONFIG_DM_PCI_COMPAT is not set
+# CONFIG_PCI_PNP is not set
+# CONFIG_PCI_REGION_MULTI_ENTRY is not set
+CONFIG_PCI_CONFIG_HOST_BRIDGE=y
+# CONFIG_PCI_SRIOV is not set
+CONFIG_PCI_ENHANCED_ALLOCATION=y
+# CONFIG_PCI_ARID is not set
+# CONFIG_PCIE_ECAM_GENERIC is not set
+# CONFIG_PCIE_ECAM_SYNQUACER is not set
+# CONFIG_PCI_FTPCI100 is not set
+# CONFIG_PCI_PHYTIUM is not set
+# CONFIG_PCIE_FSL is not set
+# CONFIG_PCI_MPC85XX is not set
+# CONFIG_PCI_XILINX is not set
+# CONFIG_PCIE_LAYERSCAPE_RC is not set
+# CONFIG_PCIE_LAYERSCAPE_EP is not set
+# CONFIG_PCIE_LAYERSCAPE_GEN4 is not set
+# CONFIG_PCIE_INTEL_FPGA is not set
+# CONFIG_PCIE_IPROC is not set
+# CONFIG_PCI_KEYSTONE is not set
+# CONFIG_PCIE_STARFIVE_JH7110 is not set
+
+#
+# PCI Endpoint
+#
+# CONFIG_PCI_ENDPOINT is not set
+CONFIG_PCH=y
+CONFIG_X86_PCH7=y
+CONFIG_X86_PCH9=y
+
+#
+# PHY Subsystem
+#
+# CONFIG_PHY is not set
+# CONFIG_MIPI_DPHY_HELPERS is not set
+
+#
+# Rockchip PHY driver
+#
+# CONFIG_MVEBU_COMPHY_SUPPORT is not set
+
+#
+# Pin controllers
+#
+# CONFIG_PINCTRL is not set
+# CONFIG_PINCTRL_TEGRA is not set
+CONFIG_POWER=y
+# CONFIG_POWER_LEGACY is not set
+# CONFIG_ACPI_PMC is not set
+
+#
+# Power Domain Support
+#
+# CONFIG_POWER_DOMAIN is not set
+# CONFIG_DM_PMIC is not set
+# CONFIG_PMIC_TPS65217 is not set
+# CONFIG_POWER_TPS65218 is not set
+# CONFIG_POWER_TPS62362 is not set
+# CONFIG_DM_REGULATOR is not set
+# CONFIG_TPS6586X_POWER is not set
+# CONFIG_POWER_MT6323 is not set
+# CONFIG_DM_PWM is not set
+# CONFIG_PWM_IMX is not set
+# CONFIG_PWM_SANDBOX is not set
+# CONFIG_U_QE is not set
+# CONFIG_RAM is not set
+
+#
+# Reboot Mode Support
+#
+# CONFIG_DM_REBOOT_MODE is not set
+
+#
+# Remote Processor drivers
+#
+CONFIG_REMOTEPROC_MAX_FW_SIZE=0x10000
+
+#
+# Reset Controller Support
+#
+# CONFIG_RESET_SCMI is not set
+# CONFIG_DM_RNG is not set
+
+#
+# Real Time Clock
+#
+CONFIG_DM_RTC=y
+# CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set
+# CONFIG_RTC_PCF2127 is not set
+# CONFIG_RTC_DS1307 is not set
+# CONFIG_RTC_DS1337 is not set
+# CONFIG_RTC_DS1338 is not set
+# CONFIG_RTC_DS3231 is not set
+# CONFIG_RTC_EMULATION is not set
+# CONFIG_RTC_GOLDFISH is not set
+# CONFIG_RTC_ISL1208 is not set
+# CONFIG_RTC_PCF8563 is not set
+# CONFIG_RTC_PT7C4338 is not set
+# CONFIG_RTC_RV3028 is not set
+# CONFIG_RTC_RV3029 is not set
+# CONFIG_RTC_RV8803 is not set
+# CONFIG_RTC_RX8010SJ is not set
+# CONFIG_RTC_RX8025 is not set
+# CONFIG_RTC_PL031 is not set
+# CONFIG_RTC_MV is not set
+# CONFIG_RTC_S35392A is not set
+CONFIG_RTC_MC146818=y
+# CONFIG_RTC_M41T62 is not set
+# CONFIG_RTC_STM32 is not set
+# CONFIG_RTC_ABX80X is not set
+# CONFIG_RTC_HT1380 is not set
+CONFIG_SCSI=y
+CONFIG_SERIAL=y
+CONFIG_BAUDRATE=115200
+# CONFIG_DEFAULT_ENV_IS_RW is not set
+CONFIG_REQUIRE_SERIAL_CONSOLE=y
+# CONFIG_SPECIFY_CONSOLE_INDEX is not set
+CONFIG_SERIAL_PRESENT=y
+CONFIG_DM_SERIAL=y
+# CONFIG_SERIAL_RX_BUFFER is not set
+# CONFIG_SERIAL_PUTS is not set
+# CONFIG_SERIAL_SEARCH_ALL is not set
+# CONFIG_SERIAL_PROBE_ALL is not set
+# CONFIG_VPL_DM_SERIAL is not set
+# CONFIG_ALTERA_JTAG_UART is not set
+# CONFIG_ALTERA_UART is not set
+# CONFIG_ARC_SERIAL is not set
+# CONFIG_ATMEL_USART is not set
+# CONFIG_BCM6345_SERIAL is not set
+CONFIG_COREBOOT_SERIAL=y
+CONFIG_COREBOOT_SERIAL_FROM_DBG2=y
+# CONFIG_CORTINA_UART is not set
+# CONFIG_FSL_LINFLEXUART is not set
+# CONFIG_FSL_LPUART is not set
+# CONFIG_MVEBU_A3700_UART is not set
+# CONFIG_MCFUART is not set
+# CONFIG_NULLDEV_SERIAL is not set
+CONFIG_SYS_NS16550=y
+CONFIG_NS16550_DYNAMIC=y
+CONFIG_SYS_NS16550_MEM32=y
+# CONFIG_SYS_NS16550_PORT_MAPPED is not set
+# CONFIG_PL01X_SERIAL is not set
+# CONFIG_ROCKCHIP_SERIAL is not set
+# CONFIG_XILINX_UARTLITE is not set
+# CONFIG_MSM_SERIAL is not set
+# CONFIG_MSM_GENI_SERIAL is not set
+# CONFIG_MXS_AUART_SERIAL is not set
+# CONFIG_OMAP_SERIAL is not set
+# CONFIG_SIFIVE_SERIAL is not set
+# CONFIG_ZYNQ_SERIAL is not set
+# CONFIG_MTK_SERIAL is not set
+# CONFIG_MT7620_SERIAL is not set
+# CONFIG_NPCM_SERIAL is not set
+# CONFIG_SM is not set
+# CONFIG_MESON_SM is not set
+# CONFIG_SMEM is not set
+
+#
+# Sound support
+#
+CONFIG_SOUND=y
+# CONFIG_I2S is not set
+# CONFIG_SOUND_DA7219 is not set
+CONFIG_SOUND_I8254=y
+# CONFIG_SOUND_INTEL_HDA is not set
+# CONFIG_SOUND_IVYBRIDGE is not set
+# CONFIG_SOUND_MAX98357A is not set
+# CONFIG_SOUND_RT5677 is not set
+
+#
+# SOC (System On Chip) specific Drivers
+#
+# CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_SAMSUNG is not set
+# CONFIG_SOC_TI is not set
+# CONFIG_SPI is not set
+
+#
+# SPMI support
+#
+# CONFIG_SPMI is not set
+CONFIG_SYSINFO=y
+CONFIG_SYSINFO_EXTRA=y
+# CONFIG_SYSINFO_GAZERBEAM is not set
+# CONFIG_SYSINFO_SANDBOX is not set
+# CONFIG_SYSINFO_SMBIOS is not set
+# CONFIG_SYSINFO_GPIO is not set
+
+#
+# System reset device drivers
+#
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_CMD_RESET=y
+# CONFIG_SYSRESET_CV1800B is not set
+# CONFIG_POWEROFF_GPIO is not set
+# CONFIG_SYSRESET_GPIO is not set
+# CONFIG_SYSRESET_SYSCON is not set
+# CONFIG_SYSRESET_WATCHDOG is not set
+# CONFIG_SYSRESET_RESETCTL is not set
+CONFIG_SYSRESET_X86=y
+# CONFIG_SYSRESET_SPL_X86 is not set
+# CONFIG_SYSRESET_TPL_X86 is not set
+# CONFIG_SYSRESET_MPC83XX is not set
+# CONFIG_DM_THERMAL is not set
+
+#
+# Timer Support
+#
+CONFIG_TIMER=y
+# CONFIG_TIMER_EARLY is not set
+# CONFIG_ALTERA_TIMER is not set
+# CONFIG_AST_TIMER is not set
+# CONFIG_ATCPIT100_TIMER is not set
+# CONFIG_ATMEL_PIT_TIMER is not set
+# CONFIG_CADENCE_TTC_TIMER is not set
+# CONFIG_DESIGNWARE_APB_TIMER is not set
+# CONFIG_FTTMR010_TIMER is not set
+# CONFIG_GXP_TIMER is not set
+# CONFIG_MPC83XX_TIMER is not set
+# CONFIG_RENESAS_OSTM_TIMER is not set
+# CONFIG_NOMADIK_MTU_TIMER is not set
+# CONFIG_NPCM_TIMER is not set
+# CONFIG_OMAP_TIMER is not set
+# CONFIG_ORION_TIMER is not set
+# CONFIG_ROCKCHIP_TIMER is not set
+# CONFIG_SP804_TIMER is not set
+# CONFIG_STM32_TIMER is not set
+# CONFIG_TEGRA_TIMER is not set
+CONFIG_X86_TSC_TIMER=y
+CONFIG_X86_TSC_READ_BASE=y
+# CONFIG_MTK_TIMER is not set
+# CONFIG_MCHP_PIT64B_TIMER is not set
+# CONFIG_IMX_GPT_TIMER is not set
+# CONFIG_XILINX_TIMER is not set
+# CONFIG_STARFIVE_TIMER is not set
+
+#
+# TPM support
+#
+CONFIG_USB=y
+CONFIG_DM_USB=y
+# CONFIG_DM_USB_GADGET is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_HOST=y
+CONFIG_USB_XHCI_HCD=y
+# CONFIG_USB_XHCI_DWC3 is not set
+# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
+CONFIG_USB_XHCI_PCI=y
+# CONFIG_USB_XHCI_FSL is not set
+# CONFIG_USB_XHCI_BRCM is not set
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_MSM is not set
+CONFIG_USB_EHCI_PCI=y
+# CONFIG_USB_EHCI_ZYNQ is not set
+# CONFIG_USB_EHCI_GENERIC is not set
+# CONFIG_USB_EHCI_FSL is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_DWC2 is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_ISP1760 is not set
+# CONFIG_USB_CDNS3 is not set
+# CONFIG_USB_DWC3 is not set
+
+#
+# Legacy MUSB Support
+#
+# CONFIG_USB_MUSB_HCD is not set
+# CONFIG_USB_MUSB_UDC is not set
+
+#
+# MUSB Controller Driver
+#
+# CONFIG_USB_MUSB_HOST is not set
+# CONFIG_USB_MUSB_PIO_ONLY is not set
+
+#
+# USB Phy
+#
+# CONFIG_TWL4030_USB is not set
+# CONFIG_ROCKCHIP_USB2_PHY is not set
+
+#
+# ULPI drivers
+#
+
+#
+# USB peripherals
+#
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+# CONFIG_USB_ONBOARD_HUB is not set
+CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=1000
+CONFIG_USB_KEYBOARD_FN_KEYS=y
+CONFIG_SYS_USB_EVENT_POLL=y
+# CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE is not set
+# CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is not set
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+# CONFIG_USB_ETHER_ASIX88179 is not set
+# CONFIG_USB_ETHER_LAN75XX is not set
+# CONFIG_USB_ETHER_LAN78XX is not set
+# CONFIG_USB_ETHER_MCS7830 is not set
+# CONFIG_USB_ETHER_RTL8152 is not set
+CONFIG_USB_ETHER_SMSC95XX=y
+# CONFIG_USB_GADGET is not set
+# CONFIG_SPL_USB_GADGET is not set
+
+#
+# UFS Host Controller Support
+#
+# CONFIG_UFS is not set
+# CONFIG_TI_J721E_UFS is not set
+
+#
+# Graphics support
+#
+CONFIG_VIDEO=y
+# CONFIG_VIDEO_FONT_4X6 is not set
+CONFIG_VIDEO_FONT_8X16=y
+# CONFIG_VIDEO_FONT_SUN12X22 is not set
+# CONFIG_VIDEO_FONT_16X32 is not set
+CONFIG_VIDEO_LOGO=y
+CONFIG_BACKLIGHT=y
+CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x1000000
+CONFIG_VIDEO_COPY=y
+# CONFIG_BACKLIGHT_GPIO is not set
+CONFIG_VIDEO_BPP8=y
+CONFIG_VIDEO_BPP16=y
+CONFIG_VIDEO_BPP32=y
+CONFIG_VIDEO_ANSI=y
+# CONFIG_VIDEO_MIPI_DSI is not set
+CONFIG_CONSOLE_NORMAL=y
+# CONFIG_CONSOLE_ROTATION is not set
+CONFIG_CONSOLE_TRUETYPE=y
+CONFIG_CONSOLE_TRUETYPE_SIZE=18
+CONFIG_CONSOLE_TRUETYPE_MAX_METRICS=10
+CONFIG_SYS_WHITE_ON_BLACK=y
+# CONFIG_NO_FB_CLEAR is not set
+CONFIG_PANEL=y
+CONFIG_SIMPLE_PANEL=y
+# CONFIG_PANEL_HX8238D is not set
+
+#
+# TrueType Fonts
+#
+CONFIG_CONSOLE_TRUETYPE_NIMBUS=y
+# CONFIG_CONSOLE_TRUETYPE_ANKACODER is not set
+# CONFIG_CONSOLE_TRUETYPE_RUFSCRIPT is not set
+# CONFIG_CONSOLE_TRUETYPE_CANTORAONE is not set
+# CONFIG_VIDCONSOLE_AS_LCD is not set
+# CONFIG_VIDEO_BOCHS is not set
+CONFIG_VIDEO_COREBOOT=y
+# CONFIG_VIDEO_VESA is not set
+# CONFIG_VIDEO_LCD_ANX9804 is not set
+# CONFIG_ATMEL_LCD_BGR555 is not set
+# CONFIG_VIDEO_BCM2835 is not set
+# CONFIG_VIDEO_LCD_ENDEAVORU is not set
+# CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
+# CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
+# CONFIG_VIDEO_LCD_LG_LD070WX3 is not set
+# CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
+# CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
+# CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
+# CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set
+# CONFIG_VIDEO_LCD_SSD2828 is not set
+# CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
+# CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
+# CONFIG_VIDEO_MESON is not set
+# CONFIG_VIDEO_MVEBU is not set
+# CONFIG_I2C_EDID is not set
+# CONFIG_DISPLAY is not set
+# CONFIG_ATMEL_HLCD is not set
+# CONFIG_BACKLIGHT_LM3533 is not set
+# CONFIG_AM335X_LCD is not set
+# CONFIG_VIDEO_EXYNOS is not set
+# CONFIG_VIDEO_BROADWELL_IGD is not set
+# CONFIG_VIDEO_IVYBRIDGE_IGD is not set
+# CONFIG_VIDEO_ROCKCHIP is not set
+# CONFIG_VIDEO_ARM_MALIDP is not set
+# CONFIG_VIDEO_STM32 is not set
+# CONFIG_VIDEO_TIDSS is not set
+# CONFIG_VIDEO_TEGRA124 is not set
+# CONFIG_VIDEO_BRIDGE is not set
+# CONFIG_VIDEO_BRIDGE_PARADE_DP501 is not set
+# CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825 is not set
+# CONFIG_VIDEO_BRIDGE_TOSHIBA_TC358768 is not set
+# CONFIG_VIDEO_TEGRA20 is not set
+# CONFIG_VIDEO_DSI_TEGRA30 is not set
+# CONFIG_TEGRA_BACKLIGHT_PWM is not set
+# CONFIG_VIDEO_MXS is not set
+# CONFIG_VIDEO_SEPS525 is not set
+CONFIG_CONSOLE_SCROLL_LINES=5
+# CONFIG_VIDEO_SIMPLE is not set
+# CONFIG_VIDEO_DT_SIMPLEFB is not set
+# CONFIG_VIDEO_MCDE_SIMPLE is not set
+# CONFIG_OSD is not set
+# CONFIG_VIDEO_REMOVE is not set
+# CONFIG_SPLASH_SCREEN is not set
+# CONFIG_BMP is not set
+CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
+CONFIG_VIDEO_BMP_RLE8=y
+# CONFIG_BMP_16BPP is not set
+# CONFIG_BMP_24BPP is not set
+# CONFIG_BMP_32BPP is not set
+
+#
+# VirtIO Drivers
+#
+# CONFIG_VIRTIO_MMIO is not set
+# CONFIG_VIRTIO_PCI is not set
+# CONFIG_VIRTIO_PCI_LEGACY is not set
+
+#
+# 1-Wire support
+#
+# CONFIG_W1 is not set
+
+#
+# 1-wire EEPROM support
+#
+# CONFIG_W1_EEPROM is not set
+
+#
+# Watchdog Timer Support
+#
+# CONFIG_WATCHDOG is not set
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
+# CONFIG_IMX_WATCHDOG is not set
+# CONFIG_ULP_WATCHDOG is not set
+# CONFIG_WDT is not set
+# CONFIG_PHYS_TO_BUS is not set
+
+#
+# File systems
+#
+# CONFIG_FS_BTRFS is not set
+CONFIG_FS_CBFS=y
+CONFIG_FS_EXT4=y
+CONFIG_EXT4_WRITE=y
+CONFIG_FS_FAT=y
+CONFIG_FAT_WRITE=y
+CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
+# CONFIG_FS_JFFS2 is not set
+# CONFIG_UBIFS_SILENCE_MSG is not set
+# CONFIG_UBIFS_SILENCE_DEBUG_DUMP is not set
+# CONFIG_FS_CRAMFS is not set
+# CONFIG_YAFFS2 is not set
+# CONFIG_FS_SQUASHFS is not set
+# CONFIG_FS_EROFS is not set
+
+#
+# Library routines
+#
+# CONFIG_ADDR_MAP is not set
+# CONFIG_SYS_TIMER_COUNTS_DOWN is not set
+CONFIG_PHYSMEM=y
+# CONFIG_BCH is not set
+# CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set
+CONFIG_CHARSET=y
+# CONFIG_DYNAMIC_CRC_TABLE is not set
+CONFIG_HAVE_ARCH_IOMAP=y
+CONFIG_HAVE_PRIVATE_LIBGCC=y
+CONFIG_LIB_UUID=y
+# CONFIG_RANDOM_UUID is not set
+CONFIG_PRINTF=y
+CONFIG_SPRINTF=y
+CONFIG_STRTO=y
+CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_SYS_HZ=1000
+# CONFIG_PANIC_HANG is not set
+CONFIG_REGEX=y
+CONFIG_LIB_RAND=y
+# CONFIG_LIB_HW_RAND is not set
+CONFIG_SUPPORT_ACPI=y
+CONFIG_ACPI=y
+# CONFIG_GENERATE_ACPI_TABLE is not set
+# CONFIG_BITREVERSE is not set
+# CONFIG_TRACE is not set
+# CONFIG_CIRCBUF is not set
+CONFIG_CMD_DHRYSTONE=y
+
+#
+# Security support
+#
+# CONFIG_AES is not set
+# CONFIG_ECDSA is not set
+CONFIG_RSA=y
+CONFIG_RSA_VERIFY=y
+# CONFIG_RSA_VERIFY_WITH_PKEY is not set
+CONFIG_RSA_SOFTWARE_EXP=y
+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
+# CONFIG_TPM is not set
+
+#
+# Android Verified Boot
+#
+
+#
+# Hashing Support
+#
+# CONFIG_BLAKE2 is not set
+CONFIG_SHA1=y
+CONFIG_SHA256=y
+# CONFIG_SHA512 is not set
+# CONFIG_SHA384 is not set
+# CONFIG_SHA_HW_ACCEL is not set
+CONFIG_MD5=y
+CONFIG_CRC8=y
+CONFIG_CRC32=y
+
+#
+# Compression Support
+#
+# CONFIG_LZ4 is not set
+# CONFIG_LZMA is not set
+# CONFIG_LZO is not set
+# CONFIG_GZIP is not set
+# CONFIG_ZLIB_UNCOMPRESS is not set
+# CONFIG_BZIP2 is not set
+CONFIG_ZLIB=y
+# CONFIG_ZSTD is not set
+# CONFIG_VPL_LZMA is not set
+# CONFIG_SPL_GZIP is not set
+# CONFIG_ERRNO_STR is not set
+# CONFIG_HEXDUMP is not set
+# CONFIG_GETOPT is not set
+CONFIG_OF_LIBFDT=y
+CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
+CONFIG_SYS_FDT_PAD=0x3000
+# CONFIG_LIB_RATIONAL is not set
+CONFIG_SMBIOS=y
+CONFIG_SMBIOS_PARSER=y
+# CONFIG_EFI is not set
+CONFIG_EFI_LOADER=y
+CONFIG_EFI_BINARY_EXEC=y
+CONFIG_EFI_BOOTMGR=y
+CONFIG_EFI_VARIABLE_FILE_STORE=y
+# CONFIG_EFI_RT_VOLATILE_STORE is not set
+# CONFIG_EFI_VARIABLE_NO_STORE is not set
+# CONFIG_EFI_VARIABLES_PRESEED is not set
+CONFIG_EFI_VAR_BUF_SIZE=131072
+CONFIG_EFI_GET_TIME=y
+# CONFIG_EFI_SET_TIME is not set
+# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
+# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
+# CONFIG_EFI_CAPSULE_ON_DISK is not set
+CONFIG_EFI_CAPSULE_MAX=15
+CONFIG_EFI_DEVICE_PATH_TO_TEXT=y
+CONFIG_EFI_DEVICE_PATH_UTIL=y
+CONFIG_EFI_DT_FIXUP=y
+CONFIG_EFI_LOADER_HII=y
+CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y
+CONFIG_EFI_UNICODE_CAPITALIZATION=y
+CONFIG_EFI_PLATFORM_LANG_CODES="en-US"
+CONFIG_EFI_HAVE_RUNTIME_RESET=y
+CONFIG_EFI_LOAD_FILE2_INITRD=y
+# CONFIG_EFI_SECURE_BOOT is not set
+CONFIG_EFI_ECPT=y
+CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
+# CONFIG_EFI_HTTP_BOOT is not set
+# CONFIG_OPTEE_LIB is not set
+# CONFIG_OPTEE_IMAGE is not set
+# CONFIG_BOOTM_OPTEE is not set
+# CONFIG_TEST_FDTDEC is not set
+CONFIG_LIB_DATE=y
+CONFIG_LIB_ELF=y
+CONFIG_LMB=y
+CONFIG_LMB_USE_MAX_REGIONS=y
+CONFIG_LMB_MAX_REGIONS=16
+# CONFIG_PHANDLE_CHECK_SEQ is not set
+
+#
+# Testing
+#
+# CONFIG_UNIT_TEST is not set
+# CONFIG_POST is not set
+
+#
+# Tools options
+#
+CONFIG_MKIMAGE_DTC_PATH="dtc"
+CONFIG_TOOLS_CRC32=y
+CONFIG_TOOLS_LIBCRYPTO=y
+CONFIG_TOOLS_KWBIMAGE=y
+CONFIG_TOOLS_FIT=y
+CONFIG_TOOLS_FIT_FULL_CHECK=y
+CONFIG_TOOLS_FIT_PRINT=y
+CONFIG_TOOLS_FIT_RSASSA_PSS=y
+CONFIG_TOOLS_FIT_SIGNATURE=y
+CONFIG_TOOLS_FIT_SIGNATURE_MAX_SIZE=0x10000000
+CONFIG_TOOLS_FIT_VERBOSE=y
+CONFIG_TOOLS_MD5=y
+CONFIG_TOOLS_OF_LIBFDT=y
+CONFIG_TOOLS_SHA1=y
+CONFIG_TOOLS_SHA256=y
+CONFIG_TOOLS_SHA384=y
+CONFIG_TOOLS_SHA512=y
+# CONFIG_TOOLS_MKEFICAPSULE is not set
+# CONFIG_FSPI_CONF_HEADER is not set
+# CONFIG_TOOLS_MKFWUMDATA is not set
diff --git a/config/u-boot/i386coreboot/target.cfg b/config/u-boot/i386coreboot/target.cfg
new file mode 100644
index 00000000..cf3b36be
--- /dev/null
+++ b/config/u-boot/i386coreboot/target.cfg
@@ -0,0 +1,5 @@
+tree="x86"
+# test building with x86_64 hostcc by commenting these:
+# xtree="default" # coreboot tree containing crossgcc
+# xarch="i386-elf"
+# or uncomment them to use crossgcc(buggy)
diff --git a/config/u-boot/x86/nuke.list b/config/u-boot/x86/nuke.list
new file mode 100644
index 00000000..f3a3fcc3
--- /dev/null
+++ b/config/u-boot/x86/nuke.list
@@ -0,0 +1 @@
+test/lib/strlcat.c
diff --git a/config/u-boot/x86/target.cfg b/config/u-boot/x86/target.cfg
new file mode 100644
index 00000000..c9978dca
--- /dev/null
+++ b/config/u-boot/x86/target.cfg
@@ -0,0 +1,2 @@
+tree="x86"
+rev="3f772959501c99fbe5aa0b22a36efe3478d1ae1c" # v2024.07
diff --git a/include/lib.sh b/include/lib.sh
index c5df639c..9a5faabb 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -209,9 +209,24 @@ vendor_checksum()
 
 cbfs()
 {
+	fRom="$1" # image to operate on
+	fAdd="$2" # file to add
+	fName="$3" # filename when added in CBFS
+
 	ccmd="add-payload" && [ $# -gt 3 ] && ccmd="add"
-	lzma="-c lzma" && [ $# -gt 3 ] && lzma="-t raw"
-	x_ "$cbfstool" "$1" $ccmd -f "$2" -n "$3" $lzma
+	lzma="-c lzma" && [ $# -gt 3 ] && [ $# -lt 5 ] && lzma="-t $4"
+
+	# hack. TODO: do it better. this whole function is cursed
+	if [ $# -gt 4 ]; then
+		# add flat binary for U-Boot (u-boot.bin) on x86
+		if [ "$5" = "0x1110000" ]; then
+			ccmd="add-flat-binary"
+			lzma="-c lzma -l 0x1110000 -e 0x1110000"
+		fi
+	fi
+
+	"$cbfstool" "$fRom" $ccmd -f "$fAdd" -n "$fName" $lzma || \
+	    $err "CBFS fail: $fRom $ccmd -f '$fAdd' -n '$fName' $lzma"; :
 }
 
 mk()
diff --git a/include/rom.sh b/include/rom.sh
index 1d7be098..d04e9ee4 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -111,6 +111,7 @@ mkcorebootbin()
 
 	[ "$payload_memtest" = "y" ] || payload_memtest="n"
 	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"
+
 	if $dry grep "CONFIG_PAYLOAD_NONE=y" "$defconfig"; then
 		[ "$payload_seabios" = "y" ] && pname="seabios" && \
 		    $dry add_seabios
@@ -136,6 +137,8 @@ add_seabios()
 	[ "$payload_memtest" = "y" ] && cbfs "$tmprom" \
 	    "elf/memtest86plus/memtest.bin" img/memtest
 
+	[ "$payload_uboot_i386" = "y" ] && $dry add_uboot
+
 	[ "$payload_grub" = "y" ] && add_grub
 
 	cprom && [ "$payload_grub" = "y" ] && pname="seagrub" && mkseagrub; :
@@ -159,12 +162,26 @@ mkseagrub()
 
 add_uboot()
 {
-	ubdir="elf/u-boot/$target/$uboot_config"
+	# TODO: re-work to allow each coreboot target to say which ub tree
+	# instead of hardcoding as in the current logic below:
+
+	ubcbfsargs=""
+	[ "$payload_uboot_i386" = "y" ] && \
+	    ubcbfsargs="-l 0x1110000 -e 0x1110000"
+
+	ubpath="fallback/payload"
+	[ "$payload_uboot_i386" = "y" ] && ubpath="u-boot"
+
+	ubtarget="$target"
+	[ "$payload_uboot_i386" = "y" ] && ubtarget="i386coreboot"
+
+	ubdir="elf/u-boot/$ubtarget/$uboot_config"
 	ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \
 	    ubootelf="$ubdir/u-boot"
-	[ -f "$ubootelf" ] || $err "cb/$target: Can't find u-boot"
+	[ "$payload_uboot_i386" = "y" ] && ubootelf="$ubdir/u-boot-dtb.bin"
 
-	cbfs "$tmprom" "$ubootelf" "fallback/payload"; cprom
+	[ -f "$ubootelf" ] || $err "cb/$ubtarget: Can't find u-boot"
+	cbfs "$tmprom" "$ubootelf" "$ubpath" $ubcbfsargs; cprom
 }
 
 cprom()
diff --git a/script/trees b/script/trees
index 5be43dcc..726f7332 100755
--- a/script/trees
+++ b/script/trees
@@ -199,10 +199,12 @@ check_cross_compiler()
 		export CROSS_COMPILE="${xarch% *}-"
 		[ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
 
+		xfix="${_xarch%-*}" && [ "$xfix" = "x86_64" ] && xfix="x64"
+
 		# sometimes buildgcc fails for like no reason. try twice.
-		make -C "$cbdir" crossgcc-${_xarch%-*} $xgccargs || \
-		    make -C "$cbdir" crossgcc-${_xarch%-*} $xgccargs || \
-		    $err "!mkxgcc $project/$xtree '${_xarch%-*}' '$xgccargs'"
+		make -C "$cbdir" crossgcc-$xfix $xgccargs || \
+		    make -C "$cbdir" crossgcc-$xfix $xgccargs || \
+		    $err "!mkxgcc $project/$xtree '$xfix' '$xgccargs'"
 	done; return 0
 }
 

From cdd8cb9086f44cfc6e44fb195186727b1cb60d61 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 4 Nov 2024 05:44:39 +0000
Subject: [PATCH 0865/1549] coreboot/default: remove unnecessary module

The fsp module is unnecessary on coreboot/default, and
therefore constitutes a waste of disk space.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/submodule/coreboot/default/fsp/module.cfg | 3 ---
 config/submodule/coreboot/default/module.list    | 1 -
 2 files changed, 4 deletions(-)
 delete mode 100644 config/submodule/coreboot/default/fsp/module.cfg

diff --git a/config/submodule/coreboot/default/fsp/module.cfg b/config/submodule/coreboot/default/fsp/module.cfg
deleted file mode 100644
index 3373a1a9..00000000
--- a/config/submodule/coreboot/default/fsp/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/fsp.git"
-subrepo_bkup="https://github.com/coreboot/fsp"
-subhash="800c85770b458ee7f7eeb1276b46e904590d3bd7"
diff --git a/config/submodule/coreboot/default/module.list b/config/submodule/coreboot/default/module.list
index 599df254..6f17b546 100644
--- a/config/submodule/coreboot/default/module.list
+++ b/config/submodule/coreboot/default/module.list
@@ -1,5 +1,4 @@
 3rdparty/arm-trusted-firmware
-3rdparty/fsp
 3rdparty/intel-microcode
 3rdparty/libgfxinit
 3rdparty/libhwbase

From 8c4cacba27c82010e65b575f849bf135385abfe0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 5 Nov 2024 19:33:49 +0000
Subject: [PATCH 0866/1549] data/coreboot: add missing variable

payload_uboot_i386 must be defined here, or the
build will fail for coreboot targets

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/coreboot/mkhelper.cfg | 1 +
 1 file changed, 1 insertion(+)

diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index 64ae4384..fce1cec8 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -6,6 +6,7 @@ build_depend="seabios/default grub/default memtest86plus u-boot/i386coreboot"
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 
 pv="payload_uboot payload_seabios payload_memtest payload_grub"
+pv="$pv payload_uboot_i386"
 v="initmode ubootelf grub_scan_disk uboot_config grubtree grubelf pname"
 v="$v displaymode tmprom newrom"
 eval `setvars "n" $pv`

From 9abddb82b9228be738382ddc178a9562926404b3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 6 Nov 2024 22:28:45 +0000
Subject: [PATCH 0867/1549] Bump coreboot/next and merge coreboot/dell7

coreboot/dell7 is now part of coreboot/next, which in turn
has been updated, to accomodate 3050 micro patchset 18:

https://review.coreboot.org/c/coreboot/+/82053/18

It incorporates my Verb/VBT patches, which are therefore
no longer included separately.

Mate has fixed the USB config; see diff for details.
The configuration of USB ports was wrong, before.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              |   2 +
 .../config/libgfxinit_txtmode                 |   2 +
 .../dell3050micro_fsp_16mb/target.cfg         |   2 +-
 ...02-dell-optiplex_3050-add-hda_verb.c.patch | 140 ----------
 ...0003-dell-optiplex_3050-Add-data.vbt.patch |  74 ------
 ...ool-add-nuke-flag-all-0xFF-on-region.patch | 205 --------------
 config/coreboot/dell7/target.cfg              |   2 -
 .../config/libgfxinit_corebootfb              |   1 +
 .../dell780mt_8mb/config/libgfxinit_txtmode   |   1 +
 .../config/libgfxinit_corebootfb              |   1 +
 .../config/libgfxinit_txtmode                 |   1 +
 .../config/libgfxinit_corebootfb              |   1 +
 .../dell780usff_8mb/config/libgfxinit_txtmode |   1 +
 .../config/libgfxinit_corebootfb              |   1 +
 .../config/libgfxinit_txtmode                 |   1 +
 ...Plex-3050-Micro-port-Intel-KabyLake.patch} | 250 +++++++++++++-----
 ...-dell-Add-Optiplex-780-MT-x4x-ICH10.patch} |   4 +-
 ...or-coreboot-images-built-without-a-p.patch |  39 ---
 ...ol-add-nuke-flag-all-0xFF-on-region.patch} |   4 +-
 ...or-coreboot-images-built-without-a-p.patch |   4 +-
 ...-dell-optiplex_780-Add-USFF-variant.patch} |   4 +-
 config/coreboot/next/target.cfg               |   2 +-
 22 files changed, 207 insertions(+), 535 deletions(-)
 delete mode 100644 config/coreboot/dell7/patches/0002-dell-optiplex_3050-add-hda_verb.c.patch
 delete mode 100644 config/coreboot/dell7/patches/0003-dell-optiplex_3050-Add-data.vbt.patch
 delete mode 100644 config/coreboot/dell7/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
 delete mode 100644 config/coreboot/dell7/target.cfg
 rename config/coreboot/{dell7/patches/0001-WIP-OptiPlex-3050-Micro-port.patch => next/patches/0001-mb-dell-OptiPlex-3050-Micro-port-Intel-KabyLake.patch} (87%)
 rename config/coreboot/next/patches/{0001-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch => 0002-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch} (99%)
 delete mode 100644 config/coreboot/next/patches/0003-Remove-warning-for-coreboot-images-built-without-a-p.patch
 rename config/coreboot/next/patches/{0002-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch => 0003-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch} (98%)
 rename config/coreboot/{dell7 => next}/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch (91%)
 rename config/coreboot/next/patches/{0004-mb-dell-optiplex_780-Add-USFF-variant.patch => 0005-mb-dell-optiplex_780-Add-USFF-variant.patch} (98%)

diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
index 1604646b..b0fee42b 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
@@ -151,6 +151,8 @@ CONFIG_USE_PM_ACPI_TIMER=y
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_3050=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
index c9c4e16a..90202dc3 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
@@ -149,6 +149,8 @@ CONFIG_USE_PM_ACPI_TIMER=y
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_3050=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell3050micro_fsp_16mb/target.cfg b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
index 539c0fb5..d6bd3872 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/target.cfg
+++ b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
@@ -1,4 +1,4 @@
-tree="dell7"
+tree="next"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/dell7/patches/0002-dell-optiplex_3050-add-hda_verb.c.patch b/config/coreboot/dell7/patches/0002-dell-optiplex_3050-add-hda_verb.c.patch
deleted file mode 100644
index 376a8761..00000000
--- a/config/coreboot/dell7/patches/0002-dell-optiplex_3050-add-hda_verb.c.patch
+++ /dev/null
@@ -1,140 +0,0 @@
-From 6140f780837726a24d6c473ac50a62fdd5ee8f2d Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sun, 6 Oct 2024 17:25:27 +0100
-Subject: [PATCH 2/4] dell/optiplex_3050: add hda_verb.c
-
-Configured for the line jack at the front of the machine.
-
-Based on dumps from the vendor BIOS.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/mainboard/dell/optiplex_3050/Kconfig     |  1 +
- src/mainboard/dell/optiplex_3050/Makefile.mk |  3 +-
- src/mainboard/dell/optiplex_3050/hda_verb.c  | 90 ++++++++++++++++++++
- 3 files changed, 93 insertions(+), 1 deletion(-)
- create mode 100644 src/mainboard/dell/optiplex_3050/hda_verb.c
-
-diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
-index 2f0dccb98d..eab6034158 100644
---- a/src/mainboard/dell/optiplex_3050/Kconfig
-+++ b/src/mainboard/dell/optiplex_3050/Kconfig
-@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
- 	select SKYLAKE_SOC_PCH_H
- 	select SOC_INTEL_KABYLAKE
- 	select SUPERIO_SMSC_SCH555x
-+	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
- 
- config CBFS_SIZE
- 	default 0x900000
-diff --git a/src/mainboard/dell/optiplex_3050/Makefile.mk b/src/mainboard/dell/optiplex_3050/Makefile.mk
-index d50ea40879..90b3cc4c48 100644
---- a/src/mainboard/dell/optiplex_3050/Makefile.mk
-+++ b/src/mainboard/dell/optiplex_3050/Makefile.mk
-@@ -5,5 +5,6 @@ bootblock-y += sch5555_ec.c
- 
- romstage-y += romstage.c
- 
--ramstage-y += ramstage.c sch5555_ec.c
-+ramstage-y += ramstage.c sch5555_ec.c hda_verb.c
-+
- ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/optiplex_3050/hda_verb.c b/src/mainboard/dell/optiplex_3050/hda_verb.c
-new file mode 100644
-index 0000000000..621e4f7a52
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/hda_verb.c
-@@ -0,0 +1,90 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	/* coreboot specific header, codec 0 */
-+	0x10ec0255, /* Realtek ALC3234 */
-+	0x102807a3, /* Subsystem ID */
-+	11,	    /* Number of entries */
-+
-+	/* Pin Widget Verb Table */
-+
-+	AZALIA_SUBVENDOR(0, 0x102807a3),
-+
-+	AZALIA_PIN_CFG(0, 0x12, 0x40000000), // does not describe a jack or internal device
-+	AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_DESC(
-+		AZALIA_INTEGRATED,
-+		AZALIA_INTERNAL,
-+		AZALIA_SPEAKER,
-+		AZALIA_OTHER_ANALOG,
-+		AZALIA_COLOR_UNKNOWN,
-+		AZALIA_NO_JACK_PRESENCE_DETECT,
-+		5, 0
-+	)),
-+	AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
-+	AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
-+	AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
-+	AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
-+	AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_DESC(
-+		AZALIA_JACK,
-+		AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_FRONT,
-+		AZALIA_LINE_OUT,
-+		AZALIA_STEREO_MONO_1_8,
-+		AZALIA_BLACK,
-+		AZALIA_JACK_PRESENCE_DETECT,
-+		2, 0
-+	)),
-+	AZALIA_PIN_CFG(0, 0x1d, 0x4054c029), // does not describe a jack or internal device
-+	AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
-+	AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_DESC(
-+		AZALIA_JACK,
-+		AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_FRONT,
-+		AZALIA_HP_OUT,
-+		AZALIA_STEREO_MONO_1_8,
-+		AZALIA_BLACK,
-+		AZALIA_JACK_PRESENCE_DETECT,
-+		5, 15
-+	)),
-+
-+	/* coreboot specific header, codec 2 */
-+	0x80862809, /* Intel Skylake HDMI */
-+	0x80860101, /* Subsystem ID */
-+	4,	    /* Number of entries */
-+
-+	/* Pin Widget Verb Table */
-+
-+	AZALIA_SUBVENDOR(2, 0x80860101),
-+
-+	AZALIA_PIN_CFG(2, 0x05, AZALIA_PIN_DESC(
-+		AZALIA_JACK,
-+		AZALIA_DIGITAL_DISPLAY,
-+		AZALIA_DIGITAL_OTHER_OUT,
-+		AZALIA_OTHER_DIGITAL,
-+		AZALIA_COLOR_UNKNOWN,
-+		AZALIA_JACK_PRESENCE_DETECT,
-+		1, 0
-+	)),
-+	AZALIA_PIN_CFG(2, 0x06, AZALIA_PIN_DESC(
-+		AZALIA_JACK,
-+		AZALIA_DIGITAL_DISPLAY,
-+		AZALIA_DIGITAL_OTHER_OUT,
-+		AZALIA_OTHER_DIGITAL,
-+		AZALIA_COLOR_UNKNOWN,
-+		AZALIA_JACK_PRESENCE_DETECT,
-+		1, 0
-+	)),
-+	AZALIA_PIN_CFG(2, 0x07, AZALIA_PIN_DESC(
-+		AZALIA_JACK,
-+		AZALIA_DIGITAL_DISPLAY,
-+		AZALIA_DIGITAL_OTHER_OUT,
-+		AZALIA_OTHER_DIGITAL,
-+		AZALIA_COLOR_UNKNOWN,
-+		AZALIA_JACK_PRESENCE_DETECT,
-+		1, 0
-+	)),
-+};
-+
-+const u32 pc_beep_verbs[] = {};
-+
-+AZALIA_ARRAY_SIZES;
--- 
-2.39.5
-
diff --git a/config/coreboot/dell7/patches/0003-dell-optiplex_3050-Add-data.vbt.patch b/config/coreboot/dell7/patches/0003-dell-optiplex_3050-Add-data.vbt.patch
deleted file mode 100644
index 5ec93c6f..00000000
--- a/config/coreboot/dell7/patches/0003-dell-optiplex_3050-Add-data.vbt.patch
+++ /dev/null
@@ -1,74 +0,0 @@
-From e8c7028be21084ef2f89140cccb393ca7a0ff327 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sun, 6 Oct 2024 23:48:05 +0100
-Subject: [PATCH 3/4] dell/optiplex_3050: Add data.vbt
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/mainboard/dell/optiplex_3050/Kconfig  |   5 +++++
- src/mainboard/dell/optiplex_3050/data.vbt | Bin 0 -> 4300 bytes
- 2 files changed, 5 insertions(+)
- create mode 100644 src/mainboard/dell/optiplex_3050/data.vbt
-
-diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
-index eab6034158..523a160ae3 100644
---- a/src/mainboard/dell/optiplex_3050/Kconfig
-+++ b/src/mainboard/dell/optiplex_3050/Kconfig
-@@ -17,6 +17,8 @@ config BOARD_SPECIFIC_OPTIONS
- 	select SOC_INTEL_KABYLAKE
- 	select SUPERIO_SMSC_SCH555x
- 	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
-+	select INTEL_GMA_HAVE_VBT
-+	select INTEL_GMA_ADD_VBT
- 
- config CBFS_SIZE
- 	default 0x900000
-@@ -27,6 +29,9 @@ config MAINBOARD_DIR
- config MAINBOARD_PART_NUMBER
- 	default "OptiPlex 3050 Micro"
- 
-+config INTEL_GMA_VBT_FILE
-+	default "src/mainboard/\$(MAINBOARDDIR)/data.vbt"
-+
- config DIMM_SPD_SIZE
- 	default 512	# DDR4
- 
-diff --git a/src/mainboard/dell/optiplex_3050/data.vbt b/src/mainboard/dell/optiplex_3050/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..6dc40cd99563bcd957ec2a9c4567e3b21e5d1d1f
-GIT binary patch
-literal 4300
-zcmeHJZ)_A*5TD(>zi)T1ds~!pU>y<RuF$e~N-bJsuXmJ|7P*63&uGGx+#w{DmbQ?B
-ze^_HpNECA))Sw}xiC;|p(!}^ljU+}T!9QpeKH4uPN;EMM;}_tZeY@?IBiNH@l!V#L
-zn>X`jfBW9Nd2eS$e@7qg=y|L+*|P~<Du4l>Ybk24rH<}xJ9eg%eaW32z1vbf_%+-P
-zC$uXU01ASzM2Q>g;@$hkii6SZG3@E+#eVw*w9N;N1g6_?YiB3s;_)?@>DbVf-r9}P
-zO`Vx|jP%robSBQ#gsrAYO>p&IQpqWSxVK|yXmkvV`v!Im77N$TZXru*X!y{`-Y55r
-zVKf!Pgkc!X2_qgyK4nY|jSRP7a&Qp0+diYXy*OGNIan;Ts7z%5ry$@FKoGo8XMq5h
-z6OcC{V?x>l17U>+7I|RUgn|iuCftWGW>(Kf196=odH`0=A3;(GULp|y6Ks_T0R#_x
-zlLt);9A0GWnQsLE?*|8{0RgE`gv2JC<6bXwubJ}!0Qv+3{3xJE9q#3H2<s&G0tf>5
-z>@mL~p#5nF3*pl}^hKC<v1C31Ae!^M&^2;#l`=O_ZLQWF$7*Y}Uh$G>xt9(*`c-X6
-zFkpAE5jIOv7?VVJPHKbYp3@KrBCHN-@DOp9_>7mqcf{Wl|3v&7@nvGak3pDtDe*nT
-zYl+trr--)_KT146>^lIL%Ay5+{&h=mW!RCRdEk{8SSMWj3D+L{)!qr(URTPl<i;AB
-za@p^PE9Ea6pj-}YuxDTr0>wf|yGUKG?B!CDGOpf7(oT__tC!2cJgEtK{*6}R$n1=r
-z$PSguH+xU1hb?rHq(J+G2P}V^ryazPkEs%j0}In3b4gctpl8)ZC&3qS6o31yv0DC@
-zBN6*5So*Vg*3aOq|DtfT{{PvtW2P<e%*HkB(yV?<-ipBd2rTP@b3v<wGk0i#{Bmcc
-z@y0B7K0!Gt2Iyi?fd2i^HUB$v{Q!tv^fz~$94j}a>75FZ$;1Eo6%!)V*$4D5C>nt}
-z7_D}&ricJyuY&X-!vUs`GWIOPx0wDOV;?d6f$4uRCdjx-*4N7{CF5RMe_CcQ%J`0~
-ze<-uhWc)?e%Q6cpxK`1V3hPmDzoNgOuwx3otLUF7>?;L-S9HJ1!Ybac>fI{aq2eJ`
-ze@SJpsrbICf1$GTDqdFgx)56u!i^z48)A=#)F$0)i8F!~4)H=KFrv`ilM@v#FA5q-
-zZ`~^T%U!!Etw*TnvRA91loJ<5n5;vH=aymAq8i4g#?~Vu@R%z0b-pk{VF{Q?SZOpI
-zZFLYDT8~J)KBGPNg2zT^r<&>dt1z12coq!P7_N5^Xb$wE-B-rFk(v<3F&oiLZ61P9
-z^8O8kx7Uu(WFsrh-0{jBgc7g$6w^0d!yLLcn#Qi_glV3tAo!dLNa^?163N|n^-pD?
-z(daC>dtpbi#Q&W%m0IHPOiO7pA89lVboYWH=_yh1N|ChuwX7oAZcPqP-%SWj_FFt3
-zyd_?zD3jia8uH=I*yP#l#Bw9^#^N~y33zEtk*o#5XfjXdCkjSG)~N^WoRlb;h;B3|
-zIfCjSc(I06T!_GA1{WKOk*chsMCXx5vW@41o#fZgYViT9VSih*nQN}>g+zCejX>9!
-zZ{c$hGa+w5eO}YT_FH@}B)U(Dl-|zF&dk8R;^4yrPZe)YrI^k%j}0~VZ%*1PT98&h
-z556thD#%T3IZc)NKi{(4RJn@8Dq3?JywFKA?WW585y(IR)(Ee|k5bDtz|lFnDY}0G
-Ds8qe3
-
-literal 0
-HcmV?d00001
-
--- 
-2.39.5
-
diff --git a/config/coreboot/dell7/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/dell7/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
deleted file mode 100644
index 66059f24..00000000
--- a/config/coreboot/dell7/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ /dev/null
@@ -1,205 +0,0 @@
-From ecedecb1224a04531ec544b76ef93efd33cd8f6d Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 1/1] util/ifdtool: add --nuke flag (all 0xFF on region)
-
-When this option is used, the region's contents are overwritten
-with all ones (0xFF).
-
-Example:
-
-./ifdtool --nuke gbe coreboot.rom
-./ifdtool --nuke bios coreboot.com
-./ifdtool --nuke me coreboot.com
-
-Rebased since the last revision update in lbmk.
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
- 1 file changed, 83 insertions(+), 31 deletions(-)
-
-diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index 36477eef66..3ebef74042 100644
---- a/util/ifdtool/ifdtool.c
-+++ b/util/ifdtool/ifdtool.c
-@@ -2217,6 +2217,7 @@ static void print_usage(const char *name)
- 	       "                                         tgl    - Tiger Lake\n"
- 	       "                                         wbg    - Wellsburg\n"
- 	       "   -S | --setpchstrap                    Write a PCH strap\n"
-+	       "   -N | --nuke <region>                  Overwrite the specified region with 0xFF (all ones)\n"
- 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
- 	       "   -v | --version:                       print the version\n"
- 	       "   -h | --help:                          print this help\n\n"
-@@ -2225,6 +2226,60 @@ static void print_usage(const char *name)
- 	       "\n");
- }
- 
-+static int
-+get_region_type_string(const char *region_type_string)
-+{
-+       if (!strcasecmp("Descriptor", region_type_string))
-+               return 0;
-+       else if (!strcasecmp("BIOS", region_type_string))
-+               return 1;
-+       else if (!strcasecmp("ME", region_type_string))
-+               return 2;
-+       else if (!strcasecmp("GbE", region_type_string))
-+               return 3;
-+       else if (!strcasecmp("Platform Data", region_type_string))
-+               return 4;
-+       else if (!strcasecmp("Device Exp1", region_type_string))
-+               return 5;
-+       else if (!strcasecmp("Secondary BIOS", region_type_string))
-+               return 6;
-+       else if (!strcasecmp("Reserved", region_type_string))
-+               return 7;
-+       else if (!strcasecmp("EC", region_type_string))
-+               return 8;
-+       else if (!strcasecmp("Device Exp2", region_type_string))
-+               return 9;
-+       else if (!strcasecmp("IE", region_type_string))
-+               return 10;
-+       else if (!strcasecmp("10GbE_0", region_type_string))
-+               return 11;
-+       else if (!strcasecmp("10GbE_1", region_type_string))
-+               return 12;
-+       else if (!strcasecmp("PTT", region_type_string))
-+               return 15;
-+       return -1;
-+}
-+
-+static void
-+nuke(const char *filename, char *image, int size, int region_type)
-+{
-+       int i;
-+       struct region region;
-+       const struct frba *frba = find_frba(image, size);
-+       if (!frba)
-+               exit(EXIT_FAILURE);
-+
-+       region = get_region(frba, region_type);
-+       if (region.size > 0) {
-+               for (i = region.base; i <= region.limit; i++) {
-+                       if ((i + 1) > (size))
-+                               break;
-+                       image[i] = 0xFF;
-+               }
-+               write_image(filename, image, size);
-+       }
-+}
-+
- int main(int argc, char *argv[])
- {
- 	int opt, option_index = 0;
-@@ -2232,6 +2287,7 @@ int main(int argc, char *argv[])
- 	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
- 	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
- 	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
-+	int mode_nuke = 0;
- 	int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
- 	char *region_type_string = NULL, *region_fname = NULL;
- 	const char *layout_fname = NULL;
-@@ -2267,6 +2323,7 @@ int main(int argc, char *argv[])
- 		{"validate", 0, NULL, 't'},
- 		{"setpchstrap", 1, NULL, 'S'},
- 		{"newvalue", 1, NULL, 'V'},
-+		{"nuke", 1, NULL, 'N'},
- 		{0, 0, 0, 0}
- 	};
- 
-@@ -2316,35 +2373,8 @@ int main(int argc, char *argv[])
- 			region_fname++;
- 			// Descriptor, BIOS, ME, GbE, Platform
- 			// valid type?
--			if (!strcasecmp("Descriptor", region_type_string))
--				region_type = 0;
--			else if (!strcasecmp("BIOS", region_type_string))
--				region_type = 1;
--			else if (!strcasecmp("ME", region_type_string))
--				region_type = 2;
--			else if (!strcasecmp("GbE", region_type_string))
--				region_type = 3;
--			else if (!strcasecmp("Platform Data", region_type_string))
--				region_type = 4;
--			else if (!strcasecmp("Device Exp1", region_type_string))
--				region_type = 5;
--			else if (!strcasecmp("Secondary BIOS", region_type_string))
--				region_type = 6;
--			else if (!strcasecmp("Reserved", region_type_string))
--				region_type = 7;
--			else if (!strcasecmp("EC", region_type_string))
--				region_type = 8;
--			else if (!strcasecmp("Device Exp2", region_type_string))
--				region_type = 9;
--			else if (!strcasecmp("IE", region_type_string))
--				region_type = 10;
--			else if (!strcasecmp("10GbE_0", region_type_string))
--				region_type = 11;
--			else if (!strcasecmp("10GbE_1", region_type_string))
--				region_type = 12;
--			else if (!strcasecmp("PTT", region_type_string))
--				region_type = 15;
--			if (region_type == -1) {
-+			if ((region_type =
-+			    get_region_type_string(region_type_string)) == -1) {
- 				fprintf(stderr, "No such region type: '%s'\n\n",
- 					region_type_string);
- 				fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
-@@ -2521,6 +2551,22 @@ int main(int argc, char *argv[])
- 		case 't':
- 			mode_validate = 1;
- 			break;
-+               case 'N':
-+                       region_type_string = strdup(optarg);
-+                       if (!region_type_string) {
-+                               fprintf(stderr, "No region specified\n");
-+                               print_usage(argv[0]);
-+                               exit(EXIT_FAILURE);
-+                       }
-+                       if ((region_type =
-+                           get_region_type_string(region_type_string)) == -1) {
-+                               fprintf(stderr, "No such region type: '%s'\n\n",
-+                                       region_type_string);
-+                               print_usage(argv[0]);
-+                               exit(EXIT_FAILURE);
-+                       }
-+                       mode_nuke = 1;
-+                       break;
- 		case 'v':
- 			print_version();
- 			exit(EXIT_SUCCESS);
-@@ -2540,7 +2586,8 @@ int main(int argc, char *argv[])
- 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
- 			mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
- 			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
--			(mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) > 1) {
-+			(mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
-+			mode_nuke) > 1) {
- 		fprintf(stderr, "You may not specify more than one mode.\n\n");
- 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
- 		exit(EXIT_FAILURE);
-@@ -2549,7 +2596,8 @@ int main(int argc, char *argv[])
- 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
- 			mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
- 			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
--			mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) == 0) {
-+			mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
-+			mode_nuke) == 0) {
- 		fprintf(stderr, "You need to specify a mode.\n\n");
- 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
- 		exit(EXIT_FAILURE);
-@@ -2662,6 +2710,10 @@ int main(int argc, char *argv[])
- 		write_image(new_filename, image, size);
- 	}
- 
-+	if (mode_nuke) {
-+		nuke(new_filename, image, size, region_type);
-+	}
-+
- 	if (mode_altmedisable) {
- 		struct fpsba *fpsba = find_fpsba(image, size);
- 		struct fmsba *fmsba = find_fmsba(image, size);
--- 
-2.39.5
-
diff --git a/config/coreboot/dell7/target.cfg b/config/coreboot/dell7/target.cfg
deleted file mode 100644
index 366f8eff..00000000
--- a/config/coreboot/dell7/target.cfg
+++ /dev/null
@@ -1,2 +0,0 @@
-tree="dell7"
-rev="e81fdd74a930b0bf8105816ea115ceaeb99bae1d"
diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
index 4174c6ff..87cbe2c8 100644
--- a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
@@ -149,6 +149,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
index 088dd29e..c9881447 100644
--- a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
@@ -147,6 +147,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
index 227505a8..cb297f87 100644
--- a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
@@ -149,6 +149,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
index 10472423..5ce36d0d 100644
--- a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
@@ -147,6 +147,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
index 4931a6ca..54c0d66a 100644
--- a/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
@@ -149,6 +149,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
index ad8186eb..9d397cf8 100644
--- a/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
@@ -147,6 +147,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
index 9b4d346b..362b09ea 100644
--- a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
@@ -149,6 +149,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
index bd98f32d..079e8982 100644
--- a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
@@ -147,6 +147,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
diff --git a/config/coreboot/dell7/patches/0001-WIP-OptiPlex-3050-Micro-port.patch b/config/coreboot/next/patches/0001-mb-dell-OptiPlex-3050-Micro-port-Intel-KabyLake.patch
similarity index 87%
rename from config/coreboot/dell7/patches/0001-WIP-OptiPlex-3050-Micro-port.patch
rename to config/coreboot/next/patches/0001-mb-dell-OptiPlex-3050-Micro-port-Intel-KabyLake.patch
index e8a6bcc0..99bd2b69 100644
--- a/config/coreboot/dell7/patches/0001-WIP-OptiPlex-3050-Micro-port.patch
+++ b/config/coreboot/next/patches/0001-mb-dell-OptiPlex-3050-Micro-port-Intel-KabyLake.patch
@@ -1,9 +1,10 @@
-From 2d266c50e2062dc202209494e9c1532ce8debd29 Mon Sep 17 00:00:00 2001
+From 496cdb9ccfe8908ec0fe7f703ce6f25e5abf1c18 Mon Sep 17 00:00:00 2001
 From: Mate Kukri <kukri.mate@gmail.com>
 Date: Thu, 24 Oct 2024 18:05:19 +0100
-Subject: [PATCH 1/4] [WIP] OptiPlex 3050 Micro port
+Subject: [PATCH 1/5] mb/dell: OptiPlex 3050 Micro port (Intel KabyLake)
 
-- Boots Linux
+- Boots Linux 6.11 (Debian)
+- GRUB and SeaBIOS payloads work
 - SMSC SCH5553 SIO/EC
   + Serial port works
   + PWM fan control works
@@ -17,34 +18,36 @@ Subject: [PATCH 1/4] [WIP] OptiPlex 3050 Micro port
     FIXME: add documentation about this
 - Needs 'deguard' to bypass BootGuard
   + See https://review.coreboot.org/plugins/gitiles/deguard
-- TODO: HDA verbs
-- TODO: USB ports
-- TODO: Add VBT
+- Audio works
+- All USB ports work
 - Currently limited to the Micro form factor, but others are very
   similar
+- HDA verbs and VBT by Leah Rowe
 
 Change-Id: I8d443e39ee684a4eaa19c835a945cfe569c051e2
 Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
 ---
- src/mainboard/dell/optiplex_3050/Kconfig      |  32 ++
+ src/mainboard/dell/optiplex_3050/Kconfig      |  37 ++
  src/mainboard/dell/optiplex_3050/Kconfig.name |   4 +
- src/mainboard/dell/optiplex_3050/Makefile.mk  |   9 +
+ src/mainboard/dell/optiplex_3050/Makefile.mk  |  12 +
  src/mainboard/dell/optiplex_3050/acpi/ec.asl  |   3 +
  .../dell/optiplex_3050/acpi/superio.asl       |   3 +
  .../dell/optiplex_3050/board_info.txt         |   7 +
  src/mainboard/dell/optiplex_3050/bootblock.c  | 107 ++++
  src/mainboard/dell/optiplex_3050/cmos.default |   5 +
  src/mainboard/dell/optiplex_3050/cmos.layout  |  54 ++
- .../dell/optiplex_3050/devicetree.cb          | 119 ++++
+ src/mainboard/dell/optiplex_3050/data.vbt     | Bin 0 -> 4300 bytes
+ .../dell/optiplex_3050/devicetree.cb          | 103 ++++
  src/mainboard/dell/optiplex_3050/dsdt.asl     |  27 +
  .../dell/optiplex_3050/gma-mainboard.ads      |  19 +
+ src/mainboard/dell/optiplex_3050/hda_verb.c   |  90 +++
  .../dell/optiplex_3050/include/early_gpio.h   |  11 +
- .../dell/optiplex_3050/include/gpio.h         | 241 ++++++++
- src/mainboard/dell/optiplex_3050/ramstage.c   | 513 ++++++++++++++++++
- src/mainboard/dell/optiplex_3050/romstage.c   |  26 +
+ .../dell/optiplex_3050/include/gpio.h         | 241 +++++++++
+ src/mainboard/dell/optiplex_3050/ramstage.c   | 512 ++++++++++++++++++
+ src/mainboard/dell/optiplex_3050/romstage.c   |  18 +
  src/mainboard/dell/optiplex_3050/sch5555_ec.c |  54 ++
  src/mainboard/dell/optiplex_3050/sch5555_ec.h |  10 +
- 18 files changed, 1244 insertions(+)
+ 20 files changed, 1317 insertions(+)
  create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig
  create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig.name
  create mode 100644 src/mainboard/dell/optiplex_3050/Makefile.mk
@@ -54,9 +57,11 @@ Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
  create mode 100644 src/mainboard/dell/optiplex_3050/bootblock.c
  create mode 100644 src/mainboard/dell/optiplex_3050/cmos.default
  create mode 100644 src/mainboard/dell/optiplex_3050/cmos.layout
+ create mode 100644 src/mainboard/dell/optiplex_3050/data.vbt
  create mode 100644 src/mainboard/dell/optiplex_3050/devicetree.cb
  create mode 100644 src/mainboard/dell/optiplex_3050/dsdt.asl
  create mode 100644 src/mainboard/dell/optiplex_3050/gma-mainboard.ads
+ create mode 100644 src/mainboard/dell/optiplex_3050/hda_verb.c
  create mode 100644 src/mainboard/dell/optiplex_3050/include/early_gpio.h
  create mode 100644 src/mainboard/dell/optiplex_3050/include/gpio.h
  create mode 100644 src/mainboard/dell/optiplex_3050/ramstage.c
@@ -66,10 +71,10 @@ Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
 
 diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
 new file mode 100644
-index 0000000000..2f0dccb98d
+index 0000000000..6c8e72956e
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_3050/Kconfig
-@@ -0,0 +1,32 @@
+@@ -0,0 +1,37 @@
 +## SPDX-License-Identifier: GPL-2.0-only
 +
 +if BOARD_DELL_OPTIPLEX_3050
@@ -81,11 +86,13 @@ index 0000000000..2f0dccb98d
 +	select HAVE_ACPI_TABLES
 +	select HAVE_CMOS_DEFAULT
 +	select HAVE_OPTION_TABLE
-+	# select INTEL_GMA_HAVE_VBT
++	select INTEL_GMA_ADD_VBT
++	select INTEL_GMA_HAVE_VBT
 +	select MAINBOARD_HAS_LIBGFXINIT
 +	select MAINBOARD_SUPPORTS_KABYLAKE_CPU
 +	select MAINBOARD_SUPPORTS_SKYLAKE_CPU
 +	select SKYLAKE_SOC_PCH_H
++	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
 +	select SOC_INTEL_KABYLAKE
 +	select SUPERIO_SMSC_SCH555x
 +
@@ -98,6 +105,9 @@ index 0000000000..2f0dccb98d
 +config MAINBOARD_PART_NUMBER
 +	default "OptiPlex 3050 Micro"
 +
++config INTEL_GMA_VBT_FILE
++	default "src/mainboard/\$(MAINBOARDDIR)/data.vbt"
++
 +config DIMM_SPD_SIZE
 +	default 512	# DDR4
 +
@@ -114,10 +124,10 @@ index 0000000000..14eab7f52c
 +	bool "OptiPlex 3050 Micro"
 diff --git a/src/mainboard/dell/optiplex_3050/Makefile.mk b/src/mainboard/dell/optiplex_3050/Makefile.mk
 new file mode 100644
-index 0000000000..d50ea40879
+index 0000000000..0bd72fe691
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_3050/Makefile.mk
-@@ -0,0 +1,9 @@
+@@ -0,0 +1,12 @@
 +## SPDX-License-Identifier: GPL-2.0-only
 +
 +bootblock-y += bootblock.c
@@ -125,7 +135,10 @@ index 0000000000..d50ea40879
 +
 +romstage-y += romstage.c
 +
-+ramstage-y += ramstage.c sch5555_ec.c
++ramstage-y += ramstage.c
++ramstage-y += sch5555_ec.c
++ramstage-y += hda_verb.c
++
 +ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
 diff --git a/src/mainboard/dell/optiplex_3050/acpi/ec.asl b/src/mainboard/dell/optiplex_3050/acpi/ec.asl
 new file mode 100644
@@ -342,12 +355,48 @@ index 0000000000..54a5147b7d
 +checksums
 +
 +checksum 392 415 984
+diff --git a/src/mainboard/dell/optiplex_3050/data.vbt b/src/mainboard/dell/optiplex_3050/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..6dc40cd99563bcd957ec2a9c4567e3b21e5d1d1f
+GIT binary patch
+literal 4300
+zcmeHJZ)_A*5TD(>zi)T1ds~!pU>y<RuF$e~N-bJsuXmJ|7P*63&uGGx+#w{DmbQ?B
+ze^_HpNECA))Sw}xiC;|p(!}^ljU+}T!9QpeKH4uPN;EMM;}_tZeY@?IBiNH@l!V#L
+zn>X`jfBW9Nd2eS$e@7qg=y|L+*|P~<Du4l>Ybk24rH<}xJ9eg%eaW32z1vbf_%+-P
+zC$uXU01ASzM2Q>g;@$hkii6SZG3@E+#eVw*w9N;N1g6_?YiB3s;_)?@>DbVf-r9}P
+zO`Vx|jP%robSBQ#gsrAYO>p&IQpqWSxVK|yXmkvV`v!Im77N$TZXru*X!y{`-Y55r
+zVKf!Pgkc!X2_qgyK4nY|jSRP7a&Qp0+diYXy*OGNIan;Ts7z%5ry$@FKoGo8XMq5h
+z6OcC{V?x>l17U>+7I|RUgn|iuCftWGW>(Kf196=odH`0=A3;(GULp|y6Ks_T0R#_x
+zlLt);9A0GWnQsLE?*|8{0RgE`gv2JC<6bXwubJ}!0Qv+3{3xJE9q#3H2<s&G0tf>5
+z>@mL~p#5nF3*pl}^hKC<v1C31Ae!^M&^2;#l`=O_ZLQWF$7*Y}Uh$G>xt9(*`c-X6
+zFkpAE5jIOv7?VVJPHKbYp3@KrBCHN-@DOp9_>7mqcf{Wl|3v&7@nvGak3pDtDe*nT
+zYl+trr--)_KT146>^lIL%Ay5+{&h=mW!RCRdEk{8SSMWj3D+L{)!qr(URTPl<i;AB
+za@p^PE9Ea6pj-}YuxDTr0>wf|yGUKG?B!CDGOpf7(oT__tC!2cJgEtK{*6}R$n1=r
+z$PSguH+xU1hb?rHq(J+G2P}V^ryazPkEs%j0}In3b4gctpl8)ZC&3qS6o31yv0DC@
+zBN6*5So*Vg*3aOq|DtfT{{PvtW2P<e%*HkB(yV?<-ipBd2rTP@b3v<wGk0i#{Bmcc
+z@y0B7K0!Gt2Iyi?fd2i^HUB$v{Q!tv^fz~$94j}a>75FZ$;1Eo6%!)V*$4D5C>nt}
+z7_D}&ricJyuY&X-!vUs`GWIOPx0wDOV;?d6f$4uRCdjx-*4N7{CF5RMe_CcQ%J`0~
+ze<-uhWc)?e%Q6cpxK`1V3hPmDzoNgOuwx3otLUF7>?;L-S9HJ1!Ybac>fI{aq2eJ`
+ze@SJpsrbICf1$GTDqdFgx)56u!i^z48)A=#)F$0)i8F!~4)H=KFrv`ilM@v#FA5q-
+zZ`~^T%U!!Etw*TnvRA91loJ<5n5;vH=aymAq8i4g#?~Vu@R%z0b-pk{VF{Q?SZOpI
+zZFLYDT8~J)KBGPNg2zT^r<&>dt1z12coq!P7_N5^Xb$wE-B-rFk(v<3F&oiLZ61P9
+z^8O8kx7Uu(WFsrh-0{jBgc7g$6w^0d!yLLcn#Qi_glV3tAo!dLNa^?163N|n^-pD?
+z(daC>dtpbi#Q&W%m0IHPOiO7pA89lVboYWH=_yh1N|ChuwX7oAZcPqP-%SWj_FFt3
+zyd_?zD3jia8uH=I*yP#l#Bw9^#^N~y33zEtk*o#5XfjXdCkjSG)~N^WoRlb;h;B3|
+zIfCjSc(I06T!_GA1{WKOk*chsMCXx5vW@41o#fZgYViT9VSih*nQN}>g+zCejX>9!
+zZ{c$hGa+w5eO}YT_FH@}B)U(Dl-|zF&dk8R;^4yrPZe)YrI^k%j}0~VZ%*1PT98&h
+z556thD#%T3IZc)NKi{(4RJn@8Dq3?JywFKA?WW585y(IR)(Ee|k5bDtz|lFnDY}0G
+Ds8qe3
+
+literal 0
+HcmV?d00001
+
 diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb
 new file mode 100644
-index 0000000000..eb731fe48f
+index 0000000000..039709aa4a
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_3050/devicetree.cb
-@@ -0,0 +1,119 @@
+@@ -0,0 +1,103 @@
 +## SPDX-License-Identifier: GPL-2.0-only
 +
 +chip soc/intel/skylake
@@ -356,8 +405,6 @@ index 0000000000..eb731fe48f
 +	# Enable Enhanced Intel SpeedStep
 +	register "eist_enable" = "1"
 +
-+	device cpu_cluster 0 on end
-+
 +	device domain 0 on
 +		device ref igpu on
 +			register "PrimaryDisplay" = "Display_iGFX"
@@ -365,32 +412,19 @@ index 0000000000..eb731fe48f
 +
 +		device ref south_xhci on
 +			register "usb2_ports" = "{
-+				[0] = USB2_PORT_MID(OC0),
-+				[1] = USB2_PORT_MID(OC0),
-+				[2] = USB2_PORT_MID(OC4),
-+				[3] = USB2_PORT_MID(OC4),
-+				[4] = USB2_PORT_MID(OC2),
-+				[5] = USB2_PORT_MID(OC2),
-+				[6] = USB2_PORT_MID(OC0),
-+				[7] = USB2_PORT_MID(OC0),
-+				[8] = USB2_PORT_MID(OC0),
-+				[9] = USB2_PORT_MID(OC0),
-+				[10] = USB2_PORT_MID(OC1),
-+				[11] = USB2_PORT_MID(OC1),
-+				[12] = USB2_PORT_MID(OC_SKIP),
-+				[13] = USB2_PORT_MID(OC_SKIP),
++				[0] = USB2_PORT_MID(OC0),	// Front panel (blue)
++				[1] = USB2_PORT_MID(OC0),	// Front panel (blue)
++				[2] = USB2_PORT_MID(OC3),	// Back panel (black)
++				[3] = USB2_PORT_MID(OC2),	// Back panel (blue)
++				[4] = USB2_PORT_MID(OC1),	// Back panel (blue)
++				[6] = USB2_PORT_MID(OC1),	// Back panel (black)
++				[8] = USB2_PORT_MID(OC_SKIP),	// WiFi slot
 +			}"
 +			register "usb3_ports" = "{
-+				[0] = USB3_PORT_DEFAULT(OC0),
-+				[1] = USB3_PORT_DEFAULT(OC0),
-+				[2] = USB3_PORT_DEFAULT(OC3),
-+				[3] = USB3_PORT_DEFAULT(OC3),
-+				[4] = USB3_PORT_DEFAULT(OC1),
-+				[5] = USB3_PORT_DEFAULT(OC1),
-+				[6] = USB3_PORT_DEFAULT(OC_SKIP),
-+				[7] = USB3_PORT_DEFAULT(OC_SKIP),
-+				[8] = USB3_PORT_DEFAULT(OC_SKIP),
-+				[9] = USB3_PORT_DEFAULT(OC_SKIP),
++				[0] = USB3_PORT_DEFAULT(OC0),	// Front panel (blue)
++				[1] = USB3_PORT_DEFAULT(OC0),	// Front panel (blue)
++				[2] = USB3_PORT_DEFAULT(OC2),	// Back panel (blue)
++				[3] = USB3_PORT_DEFAULT(OC1),	// Back panel (blue)
 +			}"
 +		end
 +
@@ -402,6 +436,7 @@ index 0000000000..eb731fe48f
 +			register "SataPortsEnable[0]" = "1"
 +		end
 +
++		# M.2 SSD
 +		device ref pcie_rp21 on
 +			register "PcieRpEnable[20]"                     = "1"
 +			register "PcieRpClkReqSupport[20]"              = "1"
@@ -460,9 +495,7 @@ index 0000000000..eb731fe48f
 +			end
 +		end
 +
-+		device ref hda on
-+			register "PchHdaVcType" = "Vc1"
-+		end
++		device ref hda on end
 +
 +		device ref smbus on end
 +	end
@@ -525,6 +558,102 @@ index 0000000000..cb4c22f285
 +       others => Disabled);
 +
 +end GMA.Mainboard;
+diff --git a/src/mainboard/dell/optiplex_3050/hda_verb.c b/src/mainboard/dell/optiplex_3050/hda_verb.c
+new file mode 100644
+index 0000000000..621e4f7a52
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/hda_verb.c
+@@ -0,0 +1,90 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	/* coreboot specific header, codec 0 */
++	0x10ec0255, /* Realtek ALC3234 */
++	0x102807a3, /* Subsystem ID */
++	11,	    /* Number of entries */
++
++	/* Pin Widget Verb Table */
++
++	AZALIA_SUBVENDOR(0, 0x102807a3),
++
++	AZALIA_PIN_CFG(0, 0x12, 0x40000000), // does not describe a jack or internal device
++	AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_DESC(
++		AZALIA_INTEGRATED,
++		AZALIA_INTERNAL,
++		AZALIA_SPEAKER,
++		AZALIA_OTHER_ANALOG,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_NO_JACK_PRESENCE_DETECT,
++		5, 0
++	)),
++	AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_FRONT,
++		AZALIA_LINE_OUT,
++		AZALIA_STEREO_MONO_1_8,
++		AZALIA_BLACK,
++		AZALIA_JACK_PRESENCE_DETECT,
++		2, 0
++	)),
++	AZALIA_PIN_CFG(0, 0x1d, 0x4054c029), // does not describe a jack or internal device
++	AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_FRONT,
++		AZALIA_HP_OUT,
++		AZALIA_STEREO_MONO_1_8,
++		AZALIA_BLACK,
++		AZALIA_JACK_PRESENCE_DETECT,
++		5, 15
++	)),
++
++	/* coreboot specific header, codec 2 */
++	0x80862809, /* Intel Skylake HDMI */
++	0x80860101, /* Subsystem ID */
++	4,	    /* Number of entries */
++
++	/* Pin Widget Verb Table */
++
++	AZALIA_SUBVENDOR(2, 0x80860101),
++
++	AZALIA_PIN_CFG(2, 0x05, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_DIGITAL_DISPLAY,
++		AZALIA_DIGITAL_OTHER_OUT,
++		AZALIA_OTHER_DIGITAL,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_JACK_PRESENCE_DETECT,
++		1, 0
++	)),
++	AZALIA_PIN_CFG(2, 0x06, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_DIGITAL_DISPLAY,
++		AZALIA_DIGITAL_OTHER_OUT,
++		AZALIA_OTHER_DIGITAL,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_JACK_PRESENCE_DETECT,
++		1, 0
++	)),
++	AZALIA_PIN_CFG(2, 0x07, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_DIGITAL_DISPLAY,
++		AZALIA_DIGITAL_OTHER_OUT,
++		AZALIA_OTHER_DIGITAL,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_JACK_PRESENCE_DETECT,
++		1, 0
++	)),
++};
++
++const u32 pc_beep_verbs[] = {};
++
++AZALIA_ARRAY_SIZES;
 diff --git a/src/mainboard/dell/optiplex_3050/include/early_gpio.h b/src/mainboard/dell/optiplex_3050/include/early_gpio.h
 new file mode 100644
 index 0000000000..17a16371e3
@@ -791,10 +920,10 @@ index 0000000000..83293c32a9
 +#endif
 diff --git a/src/mainboard/dell/optiplex_3050/ramstage.c b/src/mainboard/dell/optiplex_3050/ramstage.c
 new file mode 100644
-index 0000000000..5cf2c81e50
+index 0000000000..94778f60c9
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_3050/ramstage.c
-@@ -0,0 +1,513 @@
+@@ -0,0 +1,512 @@
 +/* SPDX-License-Identifier: GPL-2.0-only */
 +
 +#include <bootstate.h>
@@ -812,7 +941,7 @@ index 0000000000..5cf2c81e50
 +
 +#define FORM_FACTOR_MICRO	0
 +#define FORM_FACTOR_SFF		1
-+// NOTE: one of these is MT, but 2 and 3 both get the same table anyways
++// Probably DT and MT
 +#define FORM_FACTOR_UNK2	2
 +#define FORM_FACTOR_UNK3	3
 +
@@ -1260,7 +1389,6 @@ index 0000000000..5cf2c81e50
 +
 +		// Perform write
 +		sch5555_mbox_write(1, arr[i].addr, val);
-+
 +	}
 +}
 +
@@ -1298,7 +1426,7 @@ index 0000000000..5cf2c81e50
 +
 +	core_cnt = get_core_cnt();
 +	printk(BIOS_DEBUG, "CPU Core Count = %#x\n", core_cnt);
-+	if (get_core_cnt() > 2) {
++	if (core_cnt > 2) {
 +		sch5555_mbox_write(1, 0x9e, 0x30);
 +		sch5555_mbox_write(1, 0xeb, sch5555_mbox_read(1, 0xea));
 +	}
@@ -1310,18 +1438,14 @@ index 0000000000..5cf2c81e50
 +BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL);
 diff --git a/src/mainboard/dell/optiplex_3050/romstage.c b/src/mainboard/dell/optiplex_3050/romstage.c
 new file mode 100644
-index 0000000000..a4734e5d61
+index 0000000000..501b254232
 --- /dev/null
 +++ b/src/mainboard/dell/optiplex_3050/romstage.c
-@@ -0,0 +1,26 @@
+@@ -0,0 +1,18 @@
 +/* SPDX-License-Identifier: GPL-2.0-only */
 +
-+#include <assert.h>
 +#include <soc/romstage.h>
-+#include <stdint.h>
-+#include <string.h>
 +#include <spd_bin.h>
-+#include <cbfs.h>
 +
 +void mainboard_memory_init_params(FSPM_UPD *mupd)
 +{
@@ -1335,10 +1459,6 @@ index 0000000000..a4734e5d61
 +	mem_cfg->MemorySpdDataLen  = blk.len;
 +	mem_cfg->MemorySpdPtr00    = (uintptr_t)blk.spd_array[0];
 +	mem_cfg->MemorySpdPtr10    = (uintptr_t)blk.spd_array[1];
-+
-+	/* use virtual channel 1 for the dmi interface of the PCH
-+	 * FIXME: do we need this? */
-+	mupd->FspmTestConfig.DmiVc1 = 1;
 +}
 diff --git a/src/mainboard/dell/optiplex_3050/sch5555_ec.c b/src/mainboard/dell/optiplex_3050/sch5555_ec.c
 new file mode 100644
diff --git a/config/coreboot/next/patches/0001-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch b/config/coreboot/next/patches/0002-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
similarity index 99%
rename from config/coreboot/next/patches/0001-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
rename to config/coreboot/next/patches/0002-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
index e6af410a..7e2ce1f3 100644
--- a/config/coreboot/next/patches/0001-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
+++ b/config/coreboot/next/patches/0002-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
@@ -1,7 +1,7 @@
-From 8b951349f2ef77916633c817ad2fc1decd5c0920 Mon Sep 17 00:00:00 2001
+From 53151be243024957386012a099ccf3858f830555 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 30 Sep 2024 20:44:38 -0400
-Subject: [PATCH 1/3] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
+Subject: [PATCH 2/5] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
 
 Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
diff --git a/config/coreboot/next/patches/0003-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/next/patches/0003-Remove-warning-for-coreboot-images-built-without-a-p.patch
deleted file mode 100644
index 31bf5a42..00000000
--- a/config/coreboot/next/patches/0003-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From ddc7390d7750eb3b29a6d6fe7bf2400121d639b5 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 3/3] Remove warning for coreboot images built without a
- payload
-
-I added this in upstream to prevent people from accidentally flashing
-roms without a payload resulting in a no boot situation, but in
-libreboot lbmk handles the payload and thus this warning always comes
-up. This has caused confusion and concern so just patch it out.
----
- payloads/Makefile.mk | 13 +------------
- 1 file changed, 1 insertion(+), 12 deletions(-)
-
-diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
-index 5f988dac1b..516133880f 100644
---- a/payloads/Makefile.mk
-+++ b/payloads/Makefile.mk
-@@ -50,16 +50,5 @@ distclean-payloads:
- print-repo-info-payloads:
- 	-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
- 
--ifeq ($(CONFIG_PAYLOAD_NONE),y)
--show_notices:: warn_no_payload
--endif
--
--warn_no_payload:
--	printf "\n\t** WARNING **\n"
--	printf "coreboot has been built without a payload. Writing\n"
--	printf "a coreboot image without a payload to your board's\n"
--	printf "flash chip will result in a non-booting system. You\n"
--	printf "can use cbfstool to add a payload to the image.\n\n"
--
- .PHONY: force-payload coreinfo nvramcui
--.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
-+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
--- 
-2.39.5
-
diff --git a/config/coreboot/next/patches/0002-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/next/patches/0003-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
similarity index 98%
rename from config/coreboot/next/patches/0002-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
rename to config/coreboot/next/patches/0003-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
index 5b77c0e6..afa778a5 100644
--- a/config/coreboot/next/patches/0002-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ b/config/coreboot/next/patches/0003-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -1,7 +1,7 @@
-From 1b230f671ebc6e355a001ac7ffc9b031329de019 Mon Sep 17 00:00:00 2001
+From 50ae904625d6917c68ff8f8f50c280d79842142b Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 2/3] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 3/5] util/ifdtool: add --nuke flag (all 0xFF on region)
 
 When this option is used, the region's contents are overwritten
 with all ones (0xFF).
diff --git a/config/coreboot/dell7/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/next/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch
similarity index 91%
rename from config/coreboot/dell7/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch
rename to config/coreboot/next/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch
index ece00c26..ef561b42 100644
--- a/config/coreboot/dell7/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ b/config/coreboot/next/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -1,7 +1,7 @@
-From d7f20d6adf94e6c4736c55e88fcd1c8bde88994a Mon Sep 17 00:00:00 2001
+From 895f9a49fb73d000178d8422b9d0c7e0ef71ae03 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 4/4] Remove warning for coreboot images built without a
+Subject: [PATCH 4/5] Remove warning for coreboot images built without a
  payload
 
 I added this in upstream to prevent people from accidentally flashing
diff --git a/config/coreboot/next/patches/0004-mb-dell-optiplex_780-Add-USFF-variant.patch b/config/coreboot/next/patches/0005-mb-dell-optiplex_780-Add-USFF-variant.patch
similarity index 98%
rename from config/coreboot/next/patches/0004-mb-dell-optiplex_780-Add-USFF-variant.patch
rename to config/coreboot/next/patches/0005-mb-dell-optiplex_780-Add-USFF-variant.patch
index 875a4b2a..d63e2061 100644
--- a/config/coreboot/next/patches/0004-mb-dell-optiplex_780-Add-USFF-variant.patch
+++ b/config/coreboot/next/patches/0005-mb-dell-optiplex_780-Add-USFF-variant.patch
@@ -1,7 +1,7 @@
-From 300f73eae58bfcde26f82814a5e295585b3e3a2a Mon Sep 17 00:00:00 2001
+From 0b26b89118b9bde0a722b9743b9871aa68f8ca38 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Wed, 30 Oct 2024 20:55:25 -0600
-Subject: [PATCH 1/1] mb/dell/optiplex_780: Add USFF variant
+Subject: [PATCH 5/5] mb/dell/optiplex_780: Add USFF variant
 
 Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
diff --git a/config/coreboot/next/target.cfg b/config/coreboot/next/target.cfg
index f8f6d074..80044097 100644
--- a/config/coreboot/next/target.cfg
+++ b/config/coreboot/next/target.cfg
@@ -1,2 +1,2 @@
 tree="next"
-rev="c21bed6de9359111afd5d6ed6e76b1d2116b216c"
+rev="d28fedf4f2cb7e4475a6cdfcab37d64cc60bba1f"

From 2deab8572db934dd808d3130199985803ebb9195 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 7 Nov 2024 00:26:20 +0000
Subject: [PATCH 0868/1549] clean up the coreboot submodules

also bring the coreboot/next modules in line with
the recent merge that did away with coreboot/dell7

the submodules for coreboot/haswell were still there,
and have now been deleted; the haswell tree was used
for the NRI patches, which were moved to /default some
time ago

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../acpica-unix-20230628.tar.gz/module.cfg    |   3 -
 .../dell7/binutils-2.43.1.tar.xz/module.cfg   |   3 -
 .../dell7/gcc-14.2.0.tar.xz/module.cfg        |   3 -
 .../dell7/gmp-6.3.0.tar.xz/module.cfg         |   3 -
 .../coreboot/dell7/intel-microcode/module.cfg |   3 -
 .../coreboot/dell7/libgfxinit/module.cfg      |   3 -
 ...lls.adb-Make-reference-clock-frequen.patch |  42 -----
 .../coreboot/dell7/libhwbase/module.cfg       |   3 -
 config/submodule/coreboot/dell7/module.list   |  12 --
 .../dell7/mpc-1.3.1.tar.gz/module.cfg         |   3 -
 .../dell7/mpfr-4.2.1.tar.xz/module.cfg        |   3 -
 .../dell7/nasm-2.16.03.tar.bz2/module.cfg     |   3 -
 .../submodule/coreboot/dell7/vboot/module.cfg |   3 -
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch | 178 ------------------
 .../haswell/R06_28_23.tar.gz/module.cfg       |   3 -
 .../haswell/binutils-2.42.tar.xz/module.cfg   |   3 -
 .../haswell/gcc-13.2.0.tar.xz/module.cfg      |   3 -
 .../haswell/gmp-6.3.0.tar.xz/module.cfg       |   3 -
 .../haswell/intel-microcode/module.cfg        |   3 -
 .../coreboot/haswell/libgfxinit/module.cfg    |   3 -
 .../coreboot/haswell/libhwbase/module.cfg     |   3 -
 config/submodule/coreboot/haswell/module.list |  11 --
 .../haswell/mpc-1.3.1.tar.gz/module.cfg       |   3 -
 .../haswell/mpfr-4.2.1.tar.xz/module.cfg      |   3 -
 .../haswell/nasm-2.16.01.tar.bz2/module.cfg   |   3 -
 .../coreboot/haswell/vboot/module.cfg         |   3 -
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch | 178 ------------------
 .../coreboot/{dell7 => next}/fsp/module.cfg   |   0
 .../coreboot/next/intel-microcode/module.cfg  |   2 +-
 config/submodule/coreboot/next/module.list    |   1 +
 30 files changed, 2 insertions(+), 488 deletions(-)
 delete mode 100644 config/submodule/coreboot/dell7/acpica-unix-20230628.tar.gz/module.cfg
 delete mode 100644 config/submodule/coreboot/dell7/binutils-2.43.1.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/dell7/gcc-14.2.0.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/dell7/gmp-6.3.0.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/dell7/intel-microcode/module.cfg
 delete mode 100644 config/submodule/coreboot/dell7/libgfxinit/module.cfg
 delete mode 100644 config/submodule/coreboot/dell7/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
 delete mode 100644 config/submodule/coreboot/dell7/libhwbase/module.cfg
 delete mode 100644 config/submodule/coreboot/dell7/module.list
 delete mode 100644 config/submodule/coreboot/dell7/mpc-1.3.1.tar.gz/module.cfg
 delete mode 100644 config/submodule/coreboot/dell7/mpfr-4.2.1.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/dell7/nasm-2.16.03.tar.bz2/module.cfg
 delete mode 100644 config/submodule/coreboot/dell7/vboot/module.cfg
 delete mode 100644 config/submodule/coreboot/dell7/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
 delete mode 100644 config/submodule/coreboot/haswell/R06_28_23.tar.gz/module.cfg
 delete mode 100644 config/submodule/coreboot/haswell/binutils-2.42.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/haswell/gcc-13.2.0.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/haswell/gmp-6.3.0.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/haswell/intel-microcode/module.cfg
 delete mode 100644 config/submodule/coreboot/haswell/libgfxinit/module.cfg
 delete mode 100644 config/submodule/coreboot/haswell/libhwbase/module.cfg
 delete mode 100644 config/submodule/coreboot/haswell/module.list
 delete mode 100644 config/submodule/coreboot/haswell/mpc-1.3.1.tar.gz/module.cfg
 delete mode 100644 config/submodule/coreboot/haswell/mpfr-4.2.1.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg
 delete mode 100644 config/submodule/coreboot/haswell/vboot/module.cfg
 delete mode 100644 config/submodule/coreboot/haswell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
 rename config/submodule/coreboot/{dell7 => next}/fsp/module.cfg (100%)

diff --git a/config/submodule/coreboot/dell7/acpica-unix-20230628.tar.gz/module.cfg b/config/submodule/coreboot/dell7/acpica-unix-20230628.tar.gz/module.cfg
deleted file mode 100644
index 6dde459a..00000000
--- a/config/submodule/coreboot/dell7/acpica-unix-20230628.tar.gz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20230628.tar.gz"
-subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20230628.tar.gz"
-subhash="d726e69ebd8b8110690e3aff8d1919b43b0a2185efdeb9131ea8d89d321ca3a318a89c721ea740ae366f31ed3d1c11c2906f8807ee8a190e6f67fe5b2023cea4"
diff --git a/config/submodule/coreboot/dell7/binutils-2.43.1.tar.xz/module.cfg b/config/submodule/coreboot/dell7/binutils-2.43.1.tar.xz/module.cfg
deleted file mode 100644
index f3e372a4..00000000
--- a/config/submodule/coreboot/dell7/binutils-2.43.1.tar.xz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.43.1.tar.xz"
-subfile_bkup="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.43.1.tar.xz"
-subhash="20977ad17729141a2c26d358628f44a0944b84dcfefdec2ba029c2d02f40dfc41cc91c0631044560d2bd6f9a51e1f15846b4b311befbe14f1239f14ff7d57824"
diff --git a/config/submodule/coreboot/dell7/gcc-14.2.0.tar.xz/module.cfg b/config/submodule/coreboot/dell7/gcc-14.2.0.tar.xz/module.cfg
deleted file mode 100644
index 9a4892f5..00000000
--- a/config/submodule/coreboot/dell7/gcc-14.2.0.tar.xz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
-subhash="932bdef0cda94bacedf452ab17f103c0cb511ff2cec55e9112fc0328cbf1d803b42595728ea7b200e0a057c03e85626f937012e49a7515bc5dd256b2bf4bc396"
diff --git a/config/submodule/coreboot/dell7/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/dell7/gmp-6.3.0.tar.xz/module.cfg
deleted file mode 100644
index fe274faf..00000000
--- a/config/submodule/coreboot/dell7/gmp-6.3.0.tar.xz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz"
-subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2"
diff --git a/config/submodule/coreboot/dell7/intel-microcode/module.cfg b/config/submodule/coreboot/dell7/intel-microcode/module.cfg
deleted file mode 100644
index cb6c6d46..00000000
--- a/config/submodule/coreboot/dell7/intel-microcode/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/intel-microcode.git"
-subrepo_bkup="https://github.com/coreboot/intel-microcode"
-subhash="fbfe741896c55b36fcbf0560a68be96286103556"
diff --git a/config/submodule/coreboot/dell7/libgfxinit/module.cfg b/config/submodule/coreboot/dell7/libgfxinit/module.cfg
deleted file mode 100644
index 1ba41724..00000000
--- a/config/submodule/coreboot/dell7/libgfxinit/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/libgfxinit.git"
-subrepo_bkup="https://github.com/coreboot/libgfxinit"
-subhash="17cfc92f402493979783585b6581efbd98c0cf07"
diff --git a/config/submodule/coreboot/dell7/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch b/config/submodule/coreboot/dell7/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
deleted file mode 100644
index 2d248941..00000000
--- a/config/submodule/coreboot/dell7/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From ba078864500de99c26b6ea7e3fdcef19bca582a7 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Mon, 20 May 2024 10:10:03 -0600
-Subject: [PATCH 1/1] g45/hw-gfx-gma-plls.adb: Make reference clock frequency
- configurable
-
-Instead of assuming a 96 MHz reference clock frequency, use the value
-specified by the new INTEL_GMA_DPLL_REF_FREQ Kconfig. This defaults to
-96 MHz to preserve the existing behavior. An example of where this is
-needed is the DPLL_REF_SSCLK input, which will typically be 100 MHz
-to support LVDS spread spectrum clocking.
-
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- common/g45/hw-gfx-gma-plls.adb | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/common/g45/hw-gfx-gma-plls.adb b/common/g45/hw-gfx-gma-plls.adb
-index 67242f2..5e970d7 100644
---- a/common/g45/hw-gfx-gma-plls.adb
-+++ b/common/g45/hw-gfx-gma-plls.adb
-@@ -12,6 +12,8 @@
- -- GNU General Public License for more details.
- --
- 
-+with CB.Config;
-+
- with HW.Time;
- with HW.GFX.GMA.Config;
- with HW.GFX.GMA.Registers;
-@@ -460,7 +462,7 @@ is
-               (Display           => Port_Cfg.Display,
-                Target_Dotclock   => Target_Clock,
-                -- should be, but doesn't has to be always the same:
--               Reference_Clock   => 96_000_000,
-+               Reference_Clock   => CB.Config.INTEL_GMA_DPLL_REF_FREQ,
-                Best_Clock        => Clk,
-                Valid             => Success);
-          else
--- 
-2.39.2
-
diff --git a/config/submodule/coreboot/dell7/libhwbase/module.cfg b/config/submodule/coreboot/dell7/libhwbase/module.cfg
deleted file mode 100644
index 2937b8b7..00000000
--- a/config/submodule/coreboot/dell7/libhwbase/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/libhwbase.git"
-subrepo_bkup="https://github.com/coreboot/libhwbase"
-subhash="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/dell7/module.list b/config/submodule/coreboot/dell7/module.list
deleted file mode 100644
index 1cc88fd6..00000000
--- a/config/submodule/coreboot/dell7/module.list
+++ /dev/null
@@ -1,12 +0,0 @@
-3rdparty/fsp
-3rdparty/intel-microcode
-3rdparty/libgfxinit
-3rdparty/libhwbase
-3rdparty/vboot
-util/crossgcc/tarballs/binutils-2.43.1.tar.xz
-util/crossgcc/tarballs/gcc-14.2.0.tar.xz
-util/crossgcc/tarballs/gmp-6.3.0.tar.xz
-util/crossgcc/tarballs/mpc-1.3.1.tar.gz
-util/crossgcc/tarballs/mpfr-4.2.1.tar.xz
-util/crossgcc/tarballs/nasm-2.16.03.tar.bz2
-util/crossgcc/tarballs/acpica-unix-20230628.tar.gz
diff --git a/config/submodule/coreboot/dell7/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/dell7/mpc-1.3.1.tar.gz/module.cfg
deleted file mode 100644
index f98b6444..00000000
--- a/config/submodule/coreboot/dell7/mpc-1.3.1.tar.gz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
-subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97"
diff --git a/config/submodule/coreboot/dell7/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/dell7/mpfr-4.2.1.tar.xz/module.cfg
deleted file mode 100644
index 3419bc30..00000000
--- a/config/submodule/coreboot/dell7/mpfr-4.2.1.tar.xz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz"
-subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475"
diff --git a/config/submodule/coreboot/dell7/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/dell7/nasm-2.16.03.tar.bz2/module.cfg
deleted file mode 100644
index c98cc71f..00000000
--- a/config/submodule/coreboot/dell7/nasm-2.16.03.tar.bz2/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2"
-subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2"
-subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172"
diff --git a/config/submodule/coreboot/dell7/vboot/module.cfg b/config/submodule/coreboot/dell7/vboot/module.cfg
deleted file mode 100644
index 917d23fa..00000000
--- a/config/submodule/coreboot/dell7/vboot/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/vboot.git"
-subrepo_bkup="https://github.com/coreboot/vboot"
-subhash="f1f70f46dc5482bb7c654e53ed58d4001e386df2"
diff --git a/config/submodule/coreboot/dell7/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/dell7/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
deleted file mode 100644
index 1ac41de6..00000000
--- a/config/submodule/coreboot/dell7/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
+++ /dev/null
@@ -1,178 +0,0 @@
-From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
-From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
-Date: Thu, 30 May 2024 14:08:33 -0600
-Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
- vmlinuz_header_{offset,size}
-
-The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
-wrong:
-
-	if (!vmlinuz_header_size ||
-	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
-	    kpart_data) {
-		return 1;
-	}
-
-`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
-unless something has overflowed!  And `vmlinuz_header_offset` hasn't even
-been set yet (besides being initialized to zero)!
-
-GCC will deduce that if the check didn't cause the function to bail, then
-vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
-[2GiB,4GiB).
-
-On platforms where size_t is 32-bits, this is *especially* broken.
-memcpy's size argument must be in the range [0,2GiB).  Because GCC has
-proved that vmlinuz_header_size is higher than that, it will fail to
-compile:
-
-	host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
-
-So, fix the check.
-
-I can now say that what I suspect the original author meant to write would
-be the following patch, if `vmlinuz_header_offset` were already set:
-
-	-kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
-	+now        + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
-
-This hypothesis is supported by `now` not getting incremented by
-`kblob_size` the way it is for the keyblock and preamble sizes.
-
-However, we can also see that even this "corrected" bounds check is
-insufficient: it does not detect the vmlinuz_header overflowing into
-kblob_data.
-
-OK, so let's describe the fix:
-
-Have a `*vmlinuz_header` pointer instead of a
-`uint64_t vmlinuz_header_offset`, to be more similar to all the other
-regions.  With this change, the correct check becomes a simple
-
-      vmlinuz_header + vmlinuz_header_size > kblob_data
-
-While we're at it, make some changes that could have helped avoid this in
-the first place:
-
- - Add comments.
- - Calculate the vmlinuz_header offset right away, instead of waiting.
- - Go ahead and increment `now` by `kblob_size`, to increase regularity.
-
-Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
----
- host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
- 1 file changed, 51 insertions(+), 21 deletions(-)
-
-diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
-index 4ccfcf33..d2c09443 100644
---- a/host/lib/extract_vmlinuz.c
-+++ b/host/lib/extract_vmlinuz.c
-@@ -15,16 +15,44 @@
- 
- int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
- 		   void **vmlinuz_out, size_t *vmlinuz_size) {
-+	// We're going to be extracting `vmlinuz_header` and
-+	// `kblob_data`, and returning the concatenation of them.
-+	//
-+	// kpart_data = +-[kpart_size]------------------------------------+
-+	//              |                                                 |
-+	//  keyblock  = | +-[keyblock->keyblock_size]-------------------+ |
-+	//              | | struct vb2_keyblock          keyblock       | |
-+	//              | | char []                      ...data...     | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//  preamble  = | +-[preamble->preamble_size]-------------------+ |
-+	//              | | struct vb2_kernel_preamble   preamble       | |
-+	//              | | char []                       ...data...    | |
-+	//              | | char []                      vmlinuz_header | |
-+	//              | | char []                       ...data...    | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//  kblob_data= | +-[preamble->body_signature.data_size]--------+ |
-+	//              | | char []                       ...data...    | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//              +-------------------------------------------------+
-+
- 	size_t now = 0;
-+	// The 3 sections of kpart_data.
-+	struct vb2_keyblock *keyblock = NULL;
- 	struct vb2_kernel_preamble *preamble = NULL;
- 	uint8_t *kblob_data = NULL;
- 	uint32_t kblob_size = 0;
-+	// vmlinuz_header
-+	uint8_t *vmlinuz_header = NULL;
- 	uint32_t vmlinuz_header_size = 0;
--	uint64_t vmlinuz_header_address = 0;
--	uint64_t vmlinuz_header_offset = 0;
-+	// The concatenated result.
- 	void *vmlinuz = NULL;
- 
--	struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
-+	// Isolate the 3 sections of kpart_data.
-+
-+	keyblock = (struct vb2_keyblock *)kpart_data;
- 	now += keyblock->keyblock_size;
- 	if (now > kpart_size)
- 		return 1;
-@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
- 
- 	kblob_data = kpart_data + now;
- 	kblob_size = preamble->body_signature.data_size;
--
--	if (!kblob_data || (now + kblob_size) > kpart_size)
-+	now += kblob_size;
-+	if (now > kpart_size)
- 		return 1;
- 
-+	// Find `vmlinuz_header` within `preamble`.
-+
- 	if (preamble->header_version_minor > 0) {
--		vmlinuz_header_address = preamble->vmlinuz_header_address;
-+		// calculate the vmlinuz_header offset from
-+		// the beginning of the kpart_data.  The kblob doesn't
-+		// include the body_load_offset, but does include
-+		// the keyblock and preamble sections.
-+		size_t vmlinuz_header_offset =
-+			preamble->vmlinuz_header_address -
-+			preamble->body_load_address +
-+			keyblock->keyblock_size +
-+			preamble->preamble_size;
-+
-+		vmlinuz_header = kpart_data + vmlinuz_header_offset;
- 		vmlinuz_header_size = preamble->vmlinuz_header_size;
- 	}
- 
--	if (!vmlinuz_header_size ||
--	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
--	    kpart_data) {
-+	if (!vmlinuz_header ||
-+	    !vmlinuz_header_size ||
-+	    vmlinuz_header + vmlinuz_header_size > kblob_data) {
- 		return 1;
- 	}
- 
--	// calculate the vmlinuz_header offset from
--	// the beginning of the kpart_data.  The kblob doesn't
--	// include the body_load_offset, but does include
--	// the keyblock and preamble sections.
--	vmlinuz_header_offset = vmlinuz_header_address -
--		preamble->body_load_address +
--		keyblock->keyblock_size +
--		preamble->preamble_size;
-+	// Concatenate and return.
- 
- 	vmlinuz = malloc(vmlinuz_header_size + kblob_size);
- 	if (vmlinuz == NULL)
- 		return 1;
--
--	memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
--	       vmlinuz_header_size);
--
-+	memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
- 	memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
- 
- 	*vmlinuz_out = vmlinuz;
--- 
-2.45.1
-
diff --git a/config/submodule/coreboot/haswell/R06_28_23.tar.gz/module.cfg b/config/submodule/coreboot/haswell/R06_28_23.tar.gz/module.cfg
deleted file mode 100644
index 71ab78bc..00000000
--- a/config/submodule/coreboot/haswell/R06_28_23.tar.gz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/R06_28_23.tar.gz"
-subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/R06_28_23.tar.gz"
-subhash="d64091202866cd306fef08bbf95b585584331704fdbe5ef0bfa99c8f9cb188e51a52880625c8d6bc971b3d251c8b13686b43a013058cadda861efe09b219c1b0"
diff --git a/config/submodule/coreboot/haswell/binutils-2.42.tar.xz/module.cfg b/config/submodule/coreboot/haswell/binutils-2.42.tar.xz/module.cfg
deleted file mode 100644
index 370a52ec..00000000
--- a/config/submodule/coreboot/haswell/binutils-2.42.tar.xz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.42.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.42.tar.xz"
-subhash="155f3ba14cd220102f4f29a4f1e5cfee3c48aa03b74603460d05afb73c70d6657a9d87eee6eb88bf13203fe6f31177a5c9addc04384e956e7da8069c8ecd20a6"
diff --git a/config/submodule/coreboot/haswell/gcc-13.2.0.tar.xz/module.cfg b/config/submodule/coreboot/haswell/gcc-13.2.0.tar.xz/module.cfg
deleted file mode 100644
index dbcc0805..00000000
--- a/config/submodule/coreboot/haswell/gcc-13.2.0.tar.xz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-13.2.0/gcc-13.2.0.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-13.2.0/gcc-13.2.0.tar.xz"
-subhash="d99e4826a70db04504467e349e9fbaedaa5870766cda7c5cab50cdebedc4be755ebca5b789e1232a34a20be1a0b60097de9280efe47bdb71c73251e30b0862a2"
diff --git a/config/submodule/coreboot/haswell/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/haswell/gmp-6.3.0.tar.xz/module.cfg
deleted file mode 100644
index fe274faf..00000000
--- a/config/submodule/coreboot/haswell/gmp-6.3.0.tar.xz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz"
-subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2"
diff --git a/config/submodule/coreboot/haswell/intel-microcode/module.cfg b/config/submodule/coreboot/haswell/intel-microcode/module.cfg
deleted file mode 100644
index 90f7d273..00000000
--- a/config/submodule/coreboot/haswell/intel-microcode/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/intel-microcode.git"
-subrepo_bkup="https://github.com/coreboot/intel-microcode"
-subhash="41af34500598418150aa298bb04e7edacc547897"
diff --git a/config/submodule/coreboot/haswell/libgfxinit/module.cfg b/config/submodule/coreboot/haswell/libgfxinit/module.cfg
deleted file mode 100644
index 7e2536f9..00000000
--- a/config/submodule/coreboot/haswell/libgfxinit/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/libgfxinit.git"
-subrepo_bkup="https://github.com/coreboot/libgfxinit"
-subhash="a4be8a21b0e2c752da0042c79aae5942418f53e2"
diff --git a/config/submodule/coreboot/haswell/libhwbase/module.cfg b/config/submodule/coreboot/haswell/libhwbase/module.cfg
deleted file mode 100644
index 2937b8b7..00000000
--- a/config/submodule/coreboot/haswell/libhwbase/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/libhwbase.git"
-subrepo_bkup="https://github.com/coreboot/libhwbase"
-subhash="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/haswell/module.list b/config/submodule/coreboot/haswell/module.list
deleted file mode 100644
index 80e2cede..00000000
--- a/config/submodule/coreboot/haswell/module.list
+++ /dev/null
@@ -1,11 +0,0 @@
-3rdparty/intel-microcode
-3rdparty/libgfxinit
-3rdparty/libhwbase
-3rdparty/vboot
-util/crossgcc/tarballs/binutils-2.42.tar.xz
-util/crossgcc/tarballs/gcc-13.2.0.tar.xz
-util/crossgcc/tarballs/gmp-6.3.0.tar.xz
-util/crossgcc/tarballs/mpc-1.3.1.tar.gz
-util/crossgcc/tarballs/mpfr-4.2.1.tar.xz
-util/crossgcc/tarballs/nasm-2.16.01.tar.bz2
-util/crossgcc/tarballs/R06_28_23.tar.gz
diff --git a/config/submodule/coreboot/haswell/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/haswell/mpc-1.3.1.tar.gz/module.cfg
deleted file mode 100644
index f98b6444..00000000
--- a/config/submodule/coreboot/haswell/mpc-1.3.1.tar.gz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
-subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97"
diff --git a/config/submodule/coreboot/haswell/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/haswell/mpfr-4.2.1.tar.xz/module.cfg
deleted file mode 100644
index 3419bc30..00000000
--- a/config/submodule/coreboot/haswell/mpfr-4.2.1.tar.xz/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz"
-subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475"
diff --git a/config/submodule/coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg b/config/submodule/coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg
deleted file mode 100644
index a98cab0b..00000000
--- a/config/submodule/coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.01/nasm-2.16.01.tar.bz2"
-subfile_bkup="https://coreboot.org/releases/crossgcc-sources/nasm-2.16.01.tar.bz2"
-subhash="daecc50d0c04cfa1e8a09bbece808548478fc03834b0c3fb06a9da56d3b51697e2d09a469cef8a4761290cdfc65e0eb46d76b6ca11dfa1dcd1051882c5e7fd88"
diff --git a/config/submodule/coreboot/haswell/vboot/module.cfg b/config/submodule/coreboot/haswell/vboot/module.cfg
deleted file mode 100644
index 5ef2153c..00000000
--- a/config/submodule/coreboot/haswell/vboot/module.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-subrepo="https://review.coreboot.org/vboot.git"
-subrepo_bkup="https://github.com/coreboot/vboot"
-subhash="09fcd2184f9c714829503e84b8a7dfe7f2584e00"
diff --git a/config/submodule/coreboot/haswell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/haswell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
deleted file mode 100644
index 1ac41de6..00000000
--- a/config/submodule/coreboot/haswell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
+++ /dev/null
@@ -1,178 +0,0 @@
-From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
-From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
-Date: Thu, 30 May 2024 14:08:33 -0600
-Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
- vmlinuz_header_{offset,size}
-
-The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
-wrong:
-
-	if (!vmlinuz_header_size ||
-	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
-	    kpart_data) {
-		return 1;
-	}
-
-`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
-unless something has overflowed!  And `vmlinuz_header_offset` hasn't even
-been set yet (besides being initialized to zero)!
-
-GCC will deduce that if the check didn't cause the function to bail, then
-vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
-[2GiB,4GiB).
-
-On platforms where size_t is 32-bits, this is *especially* broken.
-memcpy's size argument must be in the range [0,2GiB).  Because GCC has
-proved that vmlinuz_header_size is higher than that, it will fail to
-compile:
-
-	host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
-
-So, fix the check.
-
-I can now say that what I suspect the original author meant to write would
-be the following patch, if `vmlinuz_header_offset` were already set:
-
-	-kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
-	+now        + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
-
-This hypothesis is supported by `now` not getting incremented by
-`kblob_size` the way it is for the keyblock and preamble sizes.
-
-However, we can also see that even this "corrected" bounds check is
-insufficient: it does not detect the vmlinuz_header overflowing into
-kblob_data.
-
-OK, so let's describe the fix:
-
-Have a `*vmlinuz_header` pointer instead of a
-`uint64_t vmlinuz_header_offset`, to be more similar to all the other
-regions.  With this change, the correct check becomes a simple
-
-      vmlinuz_header + vmlinuz_header_size > kblob_data
-
-While we're at it, make some changes that could have helped avoid this in
-the first place:
-
- - Add comments.
- - Calculate the vmlinuz_header offset right away, instead of waiting.
- - Go ahead and increment `now` by `kblob_size`, to increase regularity.
-
-Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
----
- host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
- 1 file changed, 51 insertions(+), 21 deletions(-)
-
-diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
-index 4ccfcf33..d2c09443 100644
---- a/host/lib/extract_vmlinuz.c
-+++ b/host/lib/extract_vmlinuz.c
-@@ -15,16 +15,44 @@
- 
- int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
- 		   void **vmlinuz_out, size_t *vmlinuz_size) {
-+	// We're going to be extracting `vmlinuz_header` and
-+	// `kblob_data`, and returning the concatenation of them.
-+	//
-+	// kpart_data = +-[kpart_size]------------------------------------+
-+	//              |                                                 |
-+	//  keyblock  = | +-[keyblock->keyblock_size]-------------------+ |
-+	//              | | struct vb2_keyblock          keyblock       | |
-+	//              | | char []                      ...data...     | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//  preamble  = | +-[preamble->preamble_size]-------------------+ |
-+	//              | | struct vb2_kernel_preamble   preamble       | |
-+	//              | | char []                       ...data...    | |
-+	//              | | char []                      vmlinuz_header | |
-+	//              | | char []                       ...data...    | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//  kblob_data= | +-[preamble->body_signature.data_size]--------+ |
-+	//              | | char []                       ...data...    | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//              +-------------------------------------------------+
-+
- 	size_t now = 0;
-+	// The 3 sections of kpart_data.
-+	struct vb2_keyblock *keyblock = NULL;
- 	struct vb2_kernel_preamble *preamble = NULL;
- 	uint8_t *kblob_data = NULL;
- 	uint32_t kblob_size = 0;
-+	// vmlinuz_header
-+	uint8_t *vmlinuz_header = NULL;
- 	uint32_t vmlinuz_header_size = 0;
--	uint64_t vmlinuz_header_address = 0;
--	uint64_t vmlinuz_header_offset = 0;
-+	// The concatenated result.
- 	void *vmlinuz = NULL;
- 
--	struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
-+	// Isolate the 3 sections of kpart_data.
-+
-+	keyblock = (struct vb2_keyblock *)kpart_data;
- 	now += keyblock->keyblock_size;
- 	if (now > kpart_size)
- 		return 1;
-@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
- 
- 	kblob_data = kpart_data + now;
- 	kblob_size = preamble->body_signature.data_size;
--
--	if (!kblob_data || (now + kblob_size) > kpart_size)
-+	now += kblob_size;
-+	if (now > kpart_size)
- 		return 1;
- 
-+	// Find `vmlinuz_header` within `preamble`.
-+
- 	if (preamble->header_version_minor > 0) {
--		vmlinuz_header_address = preamble->vmlinuz_header_address;
-+		// calculate the vmlinuz_header offset from
-+		// the beginning of the kpart_data.  The kblob doesn't
-+		// include the body_load_offset, but does include
-+		// the keyblock and preamble sections.
-+		size_t vmlinuz_header_offset =
-+			preamble->vmlinuz_header_address -
-+			preamble->body_load_address +
-+			keyblock->keyblock_size +
-+			preamble->preamble_size;
-+
-+		vmlinuz_header = kpart_data + vmlinuz_header_offset;
- 		vmlinuz_header_size = preamble->vmlinuz_header_size;
- 	}
- 
--	if (!vmlinuz_header_size ||
--	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
--	    kpart_data) {
-+	if (!vmlinuz_header ||
-+	    !vmlinuz_header_size ||
-+	    vmlinuz_header + vmlinuz_header_size > kblob_data) {
- 		return 1;
- 	}
- 
--	// calculate the vmlinuz_header offset from
--	// the beginning of the kpart_data.  The kblob doesn't
--	// include the body_load_offset, but does include
--	// the keyblock and preamble sections.
--	vmlinuz_header_offset = vmlinuz_header_address -
--		preamble->body_load_address +
--		keyblock->keyblock_size +
--		preamble->preamble_size;
-+	// Concatenate and return.
- 
- 	vmlinuz = malloc(vmlinuz_header_size + kblob_size);
- 	if (vmlinuz == NULL)
- 		return 1;
--
--	memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
--	       vmlinuz_header_size);
--
-+	memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
- 	memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
- 
- 	*vmlinuz_out = vmlinuz;
--- 
-2.45.1
-
diff --git a/config/submodule/coreboot/dell7/fsp/module.cfg b/config/submodule/coreboot/next/fsp/module.cfg
similarity index 100%
rename from config/submodule/coreboot/dell7/fsp/module.cfg
rename to config/submodule/coreboot/next/fsp/module.cfg
diff --git a/config/submodule/coreboot/next/intel-microcode/module.cfg b/config/submodule/coreboot/next/intel-microcode/module.cfg
index cb6c6d46..8a364c43 100644
--- a/config/submodule/coreboot/next/intel-microcode/module.cfg
+++ b/config/submodule/coreboot/next/intel-microcode/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/intel-microcode.git"
 subrepo_bkup="https://github.com/coreboot/intel-microcode"
-subhash="fbfe741896c55b36fcbf0560a68be96286103556"
+subhash="129f82f7429c29976b15d6837d2f573cc6a02c26"
diff --git a/config/submodule/coreboot/next/module.list b/config/submodule/coreboot/next/module.list
index 8c520e04..1cc88fd6 100644
--- a/config/submodule/coreboot/next/module.list
+++ b/config/submodule/coreboot/next/module.list
@@ -1,3 +1,4 @@
+3rdparty/fsp
 3rdparty/intel-microcode
 3rdparty/libgfxinit
 3rdparty/libhwbase

From 3bf3ef557e4533af1e638b8f25e27c7cde0a418b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 9 Nov 2024 15:36:36 +0000
Subject: [PATCH 0869/1549] add arm-none-eabi-gcc-cs-c++ to fedora dependency

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/fedora41 | 13 +++++++++++++
 1 file changed, 13 insertions(+)
 create mode 100755 config/dependencies/fedora41

diff --git a/config/dependencies/fedora41 b/config/dependencies/fedora41
new file mode 100755
index 00000000..7c227fdc
--- /dev/null
+++ b/config/dependencies/fedora41
@@ -0,0 +1,13 @@
+pkg_add="dnf -y install"
+pkglist=" \
+acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-gcc-cs-c++ \
+arm-none-eabi-gcc arm-none-eabi-newlib autogen bison bzip2 cmake curl \
+dejavu-fonts-all device-mapper doxygen e2fsprogs flex freetype-devel fuse \
+gawk gcc gcc-gnat gdb gettext gettext-devel git gprbuild help2man \
+innoextract intltool libftdi-devel libgpiod-devel libjaylink-devel \
+libselinux-devel libusb1 libusb1-devel nasm ncurses-devel openssl-devel \
+p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \
+python-unversioned-command python3 python3-setuptools rsync sharutils \
+subversion systemd-devel texinfo unar unifont unifont-fonts \
+unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel \
+"

From 747b6514eaf00ac71af475daab98509bf8870b23 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 18 Nov 2024 22:33:26 +0000
Subject: [PATCH 0870/1549] Add U-Boot x86_64 payload

Currently seems to stall when booted from the GRUB
payload, but works when booted from the SeaBIOS menu.

I also tested it as a standalone payload and it seems
to boot. Will test on hardware next, and start adding
it to more mainboards.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              |  505 +++++
 .../config/libgfxinit_txtmode                 |  501 +++++
 config/coreboot/qemu_x86_64_12mb/target.cfg   |    6 +
 config/data/coreboot/mkhelper.cfg             |    4 +-
 config/grub/default/config/payload            |    4 +-
 config/grub/nvme/config/payload               |    4 +-
 config/grub/xhci/config/payload               |    4 +-
 config/u-boot/amd64coreboot/config/default    | 1995 +++++++++++++++++
 config/u-boot/amd64coreboot/target.cfg        |    5 +
 config/u-boot/x86_64/nuke.list                |    1 +
 config/u-boot/x86_64/target.cfg               |    2 +
 include/lib.sh                                |    2 +-
 include/rom.sh                                |   38 +-
 13 files changed, 3054 insertions(+), 17 deletions(-)
 create mode 100644 config/coreboot/qemu_x86_64_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/qemu_x86_64_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/qemu_x86_64_12mb/target.cfg
 create mode 100644 config/u-boot/amd64coreboot/config/default
 create mode 100644 config/u-boot/amd64coreboot/target.cfg
 create mode 100644 config/u-boot/x86_64/nuke.list
 create mode 100644 config/u-boot/x86_64/target.cfg

diff --git a/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..951bd326
--- /dev/null
+++ b/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,505 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_CBMEM_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+# CONFIG_VENDOR_DELL is not set
+CONFIG_VENDOR_EMULATION=y
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="QEMU x86 i440fx/piix4"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="emulation/qemu-i440fx"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="QEMU"
+CONFIG_CBFS_SIZE=0xBE0000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VBOOT_VBNV_OFFSET=0x2c
+CONFIG_IRQ_SLOT_COUNT=6
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="QEMU"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set
+# CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
+CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
+# CONFIG_BOARD_EMULATION_QEMU_POWER8 is not set
+# CONFIG_BOARD_EMULATION_QEMU_POWER9 is not set
+# CONFIG_BOARD_EMULATION_QEMU_X86_Q35 is not set
+# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV64 is not set
+# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set
+# CONFIG_BOARD_EMULATION_QEMU_SBSA is not set
+# CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0x10000
+CONFIG_DCACHE_RAM_SIZE=0x90000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86"
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_QEMU_X86=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_UNKNOWN_TSC_RATE=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_NO_SMM=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82371EB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
+CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
+CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_NO_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y
+CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y
+CONFIG_DRIVERS_EMULATION_QEMU_XRES=800
+CONFIG_DRIVERS_EMULATION_QEMU_YRES=600
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+CONFIG_CONSOLE_QEMU_DEBUGCON=y
+CONFIG_CONSOLE_QEMU_DEBUGCON_PORT=0x402
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_NULL=y
+# end of Console
+
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_HAVE_PIRQ_TABLE=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+# CONFIG_DEBUG_PIRQ is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_PROBE_RAM=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_txtmode b/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..64afd0a0
--- /dev/null
+++ b/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,501 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_CBMEM_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+# CONFIG_VENDOR_DELL is not set
+CONFIG_VENDOR_EMULATION=y
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="QEMU x86 i440fx/piix4"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="emulation/qemu-i440fx"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="QEMU"
+CONFIG_CBFS_SIZE=0xBE0000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VBOOT_VBNV_OFFSET=0x2c
+CONFIG_IRQ_SLOT_COUNT=6
+CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="QEMU"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set
+# CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
+CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
+# CONFIG_BOARD_EMULATION_QEMU_POWER8 is not set
+# CONFIG_BOARD_EMULATION_QEMU_POWER9 is not set
+# CONFIG_BOARD_EMULATION_QEMU_X86_Q35 is not set
+# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV64 is not set
+# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set
+# CONFIG_BOARD_EMULATION_QEMU_SBSA is not set
+# CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0x10000
+CONFIG_DCACHE_RAM_SIZE=0x90000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86"
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_QEMU_X86=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_UNKNOWN_TSC_RATE=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_NO_SMM=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82371EB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
+CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
+CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_NO_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y
+CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+CONFIG_CONSOLE_QEMU_DEBUGCON=y
+CONFIG_CONSOLE_QEMU_DEBUGCON_PORT=0x402
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_NULL=y
+# end of Console
+
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_HAVE_PIRQ_TABLE=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_PIRQ_TABLE=y
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+# CONFIG_DEBUG_PIRQ is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_PROBE_RAM=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/qemu_x86_64_12mb/target.cfg b/config/coreboot/qemu_x86_64_12mb/target.cfg
new file mode 100644
index 00000000..5c1a733f
--- /dev/null
+++ b/config/coreboot/qemu_x86_64_12mb/target.cfg
@@ -0,0 +1,6 @@
+tree="default"
+xarch="i386-elf"
+payload_grub="y"
+payload_seabios="y"
+payload_memtest="y"
+payload_uboot_amd64="y"
diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index fce1cec8..a218e0e7 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -1,12 +1,12 @@
 . "include/rom.sh"
 
 makeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
-build_depend="seabios/default grub/default memtest86plus u-boot/i386coreboot"
+build_depend="seabios/default grub/default memtest86plus u-boot/amd64coreboot"
 
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 
 pv="payload_uboot payload_seabios payload_memtest payload_grub"
-pv="$pv payload_uboot_i386"
+pv="$pv payload_uboot_i386 payload_uboot_amd64"
 v="initmode ubootelf grub_scan_disk uboot_config grubtree grubelf pname"
 v="$v displaymode tmprom newrom"
 eval `setvars "n" $pv`
diff --git a/config/grub/default/config/payload b/config/grub/default/config/payload
index e5bf52bd..bd908bd9 100644
--- a/config/grub/default/config/payload
+++ b/config/grub/default/config/payload
@@ -216,10 +216,10 @@ menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey=
 	fi
 }
 fi
-if [ -f (cbfsdisk)/u-boot ]; then
+if [ -f (cbfsdisk)/img/u-boot ]; then
 menuentry 'Load U-Boot (payload) [b]' --hotkey='u' {
 	set root='cbfsdisk'
-	chainloader /u-boot
+	chainloader /img/u-boot
 }
 fi
 if [ -f (cbfsdisk)/seabios.elf ]; then
diff --git a/config/grub/nvme/config/payload b/config/grub/nvme/config/payload
index aa1fcb91..5eb34368 100644
--- a/config/grub/nvme/config/payload
+++ b/config/grub/nvme/config/payload
@@ -234,10 +234,10 @@ menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey=
 	fi
 }
 fi
-if [ -f (cbfsdisk)/u-boot ]; then
+if [ -f (cbfsdisk)/img/u-boot ]; then
 menuentry 'Load U-Boot (payload) [b]' --hotkey='u' {
 	set root='cbfsdisk'
-	chainloader /u-boot
+	chainloader /img/u-boot
 }
 fi
 if [ -f (cbfsdisk)/seabios.elf ]; then
diff --git a/config/grub/xhci/config/payload b/config/grub/xhci/config/payload
index ee3e6aaf..75d932ed 100644
--- a/config/grub/xhci/config/payload
+++ b/config/grub/xhci/config/payload
@@ -235,10 +235,10 @@ menuentry 'Load test configuration (grubtest.cfg) in CBFS  [t]' --hotkey='t' {
 	fi
 }
 fi
-if [ -f (cbfsdisk)/u-boot ]; then
+if [ -f (cbfsdisk)/img/u-boot ]; then
 menuentry 'Load U-Boot (payload) [b]' --hotkey='u' {
 	set root='cbfsdisk'
-	chainloader /u-boot
+	chainloader /img/u-boot
 }
 fi
 if [ -f (cbfsdisk)/seabios.elf ]; then
diff --git a/config/u-boot/amd64coreboot/config/default b/config/u-boot/amd64coreboot/config/default
new file mode 100644
index 00000000..4c0585a7
--- /dev/null
+++ b/config/u-boot/amd64coreboot/config/default
@@ -0,0 +1,1995 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# U-Boot 2024.07 Configuration
+#
+
+#
+# Compiler: gcc (Debian 12.2.0-14) 12.2.0
+#
+CONFIG_CREATE_ARCH_SYMLINK=y
+CONFIG_SYS_CACHE_SHIFT_6=y
+CONFIG_SYS_CACHELINE_SIZE=64
+CONFIG_LINKER_LIST_ALIGN=8
+# CONFIG_ARC is not set
+# CONFIG_ARM is not set
+# CONFIG_M68K is not set
+# CONFIG_MICROBLAZE is not set
+# CONFIG_MIPS is not set
+# CONFIG_NIOS2 is not set
+# CONFIG_PPC is not set
+# CONFIG_RISCV is not set
+# CONFIG_SANDBOX is not set
+# CONFIG_SH is not set
+CONFIG_X86=y
+# CONFIG_XTENSA is not set
+CONFIG_SYS_ARCH="x86"
+CONFIG_SYS_SOC="coreboot"
+CONFIG_SYS_VENDOR="coreboot"
+CONFIG_SYS_BOARD="coreboot"
+CONFIG_TEXT_BASE=0x1120000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_SPL_LDSCRIPT="arch/$(ARCH)/cpu/u-boot-spl.lds"
+CONFIG_ENV_SOURCE_FILE=""
+CONFIG_ENV_SIZE=0x1000
+CONFIG_DM_GPIO=y
+# CONFIG_SPL_DM_SPI is not set
+CONFIG_DEFAULT_DEVICE_TREE="coreboot"
+CONFIG_SPL_TEXT_BASE=0x1110000
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+# CONFIG_OF_LIBFDT_OVERLAY is not set
+CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
+# CONFIG_DM_RESET is not set
+CONFIG_SYS_MONITOR_LEN=1048576
+# CONFIG_SPL_MMC is not set
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x800
+# CONFIG_SPL_HAS_BSS_LINKER_SECTION is not set
+# CONFIG_SPL_STACK_R is not set
+CONFIG_SPL_SYS_MALLOC_F=y
+CONFIG_ERR_PTR_OFFSET=0x0
+CONFIG_SPL_SIZE_LIMIT=0x0
+CONFIG_SPL=y
+CONFIG_PRE_CON_BUF_ADDR=0x100000
+CONFIG_PRE_CON_BUF_SZ=4096
+CONFIG_BOOTSTAGE_STASH_ADDR=0x0
+CONFIG_IDENT_STRING=""
+CONFIG_SYS_CLK_FREQ=0
+# CONFIG_SPL_FS_FAT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
+CONFIG_SYS_MEM_TOP_HIDE=0x0
+CONFIG_SYS_LOAD_ADDR=0x02000000
+CONFIG_SPL_PAYLOAD="u-boot.bin"
+CONFIG_BUILD_TARGET=""
+# CONFIG_SYS_PCI_64BIT is not set
+CONFIG_PCI=y
+CONFIG_FWU_NUM_BANKS=2
+CONFIG_FWU_NUM_IMAGES_PER_BANK=2
+
+#
+# x86 architecture
+#
+# CONFIG_X86_RUN_32BIT is not set
+CONFIG_X86_RUN_64BIT=y
+CONFIG_X86_64=y
+# CONFIG_VENDOR_ADVANTECH is not set
+# CONFIG_VENDOR_CONGATEC is not set
+CONFIG_VENDOR_COREBOOT=y
+# CONFIG_VENDOR_DFI is not set
+# CONFIG_VENDOR_EFI is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_INTEL_MID is not set
+CONFIG_PCIE_ECAM_BASE=0xe0000000
+CONFIG_TARGET_COREBOOT=y
+CONFIG_SYS_CAR_ADDR=0x01920000
+CONFIG_SYS_CAR_SIZE=0x4000
+CONFIG_ROM_TABLE_ADDR=0xf0000
+CONFIG_ROM_TABLE_SIZE=0x10000
+CONFIG_CPU_ADDR_BITS=36
+# CONFIG_DEBUG_UART is not set
+CONFIG_SYS_COREBOOT=y
+CONFIG_X86_TSC_TIMER_FREQ=1000000000
+CONFIG_AHCI=y
+CONFIG_RAMBASE=0x100000
+CONFIG_HPET_ADDRESS=0xfed00000
+# CONFIG_X86_LOAD_FROM_32_BIT is not set
+# CONFIG_HAVE_INTEL_ME is not set
+# CONFIG_X86_RAMTEST is not set
+# CONFIG_USE_HOB is not set
+# CONFIG_HAVE_FSP is not set
+CONFIG_USE_CAR=y
+# CONFIG_HAVE_MRC is not set
+# CONFIG_HAVE_REFCODE is not set
+CONFIG_HAVE_MICROCODE=y
+# CONFIG_SMP is not set
+# CONFIG_HAVE_VGA_BIOS is not set
+CONFIG_X86_HARDFP=y
+# CONFIG_HAVE_ITSS is not set
+# CONFIG_HAVE_ACPI_RESUME is not set
+CONFIG_MAX_PIRQ_LINKS=8
+CONFIG_IRQ_SLOT_COUNT=128
+CONFIG_PCIE_ECAM_SIZE=0x10000000
+CONFIG_I8259_PIC=y
+CONFIG_APIC=y
+CONFIG_I8254_TIMER=y
+# CONFIG_SEABIOS is not set
+# CONFIG_INTEL_CAR_CQOS is not set
+CONFIG_X86_OFFSET_U_BOOT=0x1120000
+CONFIG_X86_OFFSET_SPL=0x1110000
+# CONFIG_ACPI_GPE is not set
+# CONFIG_SPL_ACPI_GPE is not set
+CONFIG_SA_PCIEX_LENGTH=0x10000000
+CONFIG_COREBOOT_SYSINFO=y
+CONFIG_SPL_COREBOOT_SYSINFO=y
+CONFIG_ZBOOT=y
+# CONFIG_OF_BOARD_FIXUP is not set
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_CC_IS_GCC=y
+CONFIG_GCC_VERSION=120200
+CONFIG_CLANG_VERSION=0
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+# CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
+# CONFIG_CC_OPTIMIZE_FOR_DEBUG is not set
+# CONFIG_OPTIMIZE_INLINING is not set
+# CONFIG_SPL_OPTIMIZE_INLINING is not set
+CONFIG_CC_HAS_ASM_INLINE=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+# CONFIG_SYS_BOOT_GET_CMDLINE is not set
+# CONFIG_SYS_BOOT_GET_KBD is not set
+CONFIG_SYS_MALLOC_F=y
+# CONFIG_VALGRIND is not set
+CONFIG_EXPERT=y
+CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y
+CONFIG_SPL_SYS_MALLOC_CLEAR_ON_INIT=y
+# CONFIG_SYS_MALLOC_DEFAULT_TO_INIT is not set
+# CONFIG_TOOLS_DEBUG is not set
+# CONFIG_PHYS_64BIT is not set
+# CONFIG_FDT_64BIT is not set
+CONFIG_SPL_IMAGE="spl/u-boot-spl.bin"
+# CONFIG_REMAKE_ELF is not set
+# CONFIG_HAS_BOARD_SIZE_LIMIT is not set
+# CONFIG_SYS_CUSTOM_LDSCRIPT is not set
+CONFIG_PLATFORM_ELFENTRY="_start"
+CONFIG_STACK_SIZE=0x1000000
+CONFIG_SYS_SRAM_BASE=0x0
+CONFIG_SYS_SRAM_SIZE=0x0
+# CONFIG_MP is not set
+CONFIG_HAVE_TEXT_BASE=y
+# CONFIG_HAVE_SYS_UBOOT_START is not set
+CONFIG_SYS_UBOOT_START=0x1120000
+CONFIG_HAVE_SYS_MONITOR_BASE=y
+CONFIG_SYS_MONITOR_BASE=0x01120000
+# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
+# CONFIG_API is not set
+
+#
+# Boot options
+#
+
+#
+# Boot images
+#
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_TIMESTAMP=y
+CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x0
+CONFIG_FIT_FULL_CHECK=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_SIGNATURE_MAX_SIZE=0x10000000
+# CONFIG_FIT_RSASSA_PSS is not set
+# CONFIG_FIT_CIPHER is not set
+# CONFIG_FIT_VERBOSE is not set
+# CONFIG_FIT_BEST_MATCH is not set
+CONFIG_FIT_PRINT=y
+# CONFIG_SPL_FIT is not set
+# CONFIG_SPL_LOAD_FIT is not set
+# CONFIG_SPL_LOAD_FIT_FULL is not set
+CONFIG_PXE_UTILS=y
+CONFIG_BOOT_DEFAULTS_FEATURES=y
+CONFIG_BOOT_DEFAULTS_CMDS=y
+CONFIG_BOOT_DEFAULTS=y
+CONFIG_BOOTSTD=y
+# CONFIG_SPL_BOOTSTD is not set
+CONFIG_BOOTSTD_FULL=y
+CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_BOOTSTD_BOOTCOMMAND=y
+CONFIG_BOOTMETH_GLOBAL=y
+CONFIG_BOOTMETH_CROS=y
+CONFIG_BOOTMETH_EXTLINUX=y
+CONFIG_BOOTMETH_EXTLINUX_PXE=y
+CONFIG_BOOTMETH_EFILOADER=y
+CONFIG_BOOTMETH_EFI_BOOTMGR=y
+CONFIG_BOOTMETH_VBE=y
+CONFIG_BOOTMETH_DISTRO=y
+# CONFIG_SPL_BOOTMETH_VBE is not set
+CONFIG_BOOTMETH_VBE_REQUEST=y
+# CONFIG_SPL_BOOTMETH_VBE_REQUEST is not set
+CONFIG_BOOTMETH_VBE_SIMPLE=y
+CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
+# CONFIG_SPL_BOOTMETH_VBE_SIMPLE is not set
+CONFIG_EXPO=y
+CONFIG_BOOTMETH_SCRIPT=y
+# CONFIG_LEGACY_IMAGE_FORMAT is not set
+CONFIG_SYS_BOOTM_LEN=0x1000000
+CONFIG_SUPPORT_RAW_INITRD=y
+# CONFIG_CHROMEOS is not set
+# CONFIG_CHROMEOS_VBOOT is not set
+# CONFIG_RAMBOOT_PBL is not set
+CONFIG_SYS_BOOT_RAMDISK_HIGH=y
+# CONFIG_DISTRO_DEFAULTS is not set
+
+#
+# Boot timing
+#
+# CONFIG_BOOTSTAGE is not set
+CONFIG_BOOTSTAGE_STASH_SIZE=0x1000
+CONFIG_SHOW_BOOT_PROGRESS=y
+# CONFIG_SPL_SHOW_BOOT_PROGRESS is not set
+
+#
+# Boot media
+#
+# CONFIG_NAND_BOOT is not set
+# CONFIG_ONENAND_BOOT is not set
+# CONFIG_QSPI_BOOT is not set
+# CONFIG_SATA_BOOT is not set
+# CONFIG_SD_BOOT is not set
+# CONFIG_SD_BOOT_QSPI is not set
+# CONFIG_SPI_BOOT is not set
+
+#
+# Autoboot options
+#
+CONFIG_AUTOBOOT=y
+CONFIG_BOOTDELAY=2
+# CONFIG_AUTOBOOT_KEYED is not set
+# CONFIG_AUTOBOOT_USE_MENUKEY is not set
+# CONFIG_BOOT_RETRY is not set
+
+#
+# Image support
+#
+# CONFIG_IMAGE_PRE_LOAD is not set
+
+#
+# Devicetree fixup
+#
+# CONFIG_OF_ENV_SETUP is not set
+# CONFIG_OF_BOARD_SETUP is not set
+# CONFIG_OF_SYSTEM_SETUP is not set
+# CONFIG_OF_STDOUT_VIA_ALIAS is not set
+# CONFIG_FDT_FIXUP_PARTITIONS is not set
+# CONFIG_FDT_SIMPLEFB is not set
+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
+# CONFIG_BOOTARGS_SUBST is not set
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
+CONFIG_USE_PREBOOT=y
+CONFIG_PREBOOT="usb start"
+CONFIG_PREBOOT_DEFINED=y
+CONFIG_DEFAULT_FDT_FILE=""
+
+#
+# Configuration editor
+#
+# CONFIG_CEDIT is not set
+
+#
+# Console
+#
+CONFIG_MENU=y
+# CONFIG_CONSOLE_RECORD is not set
+CONFIG_SYS_CBSIZE=512
+CONFIG_SYS_PBSIZE=532
+# CONFIG_DISABLE_CONSOLE is not set
+CONFIG_LOGLEVEL=4
+CONFIG_SPL_LOGLEVEL=4
+# CONFIG_SILENT_CONSOLE is not set
+# CONFIG_SPL_SILENT_CONSOLE is not set
+# CONFIG_TPL_SILENT_CONSOLE is not set
+CONFIG_PRE_CONSOLE_BUFFER=y
+CONFIG_CONSOLE_FLUSH_SUPPORT=y
+# CONFIG_CONSOLE_FLUSH_ON_NEWLINE is not set
+CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
+# CONFIG_SYS_CONSOLE_ENV_OVERWRITE is not set
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_SYS_STDIO_DEREGISTER=y
+# CONFIG_SPL_SYS_STDIO_DEREGISTER is not set
+CONFIG_SYS_DEVICE_NULLDEV=y
+
+#
+# Logging
+#
+CONFIG_LOG=y
+CONFIG_LOG_MAX_LEVEL=6
+CONFIG_LOG_DEFAULT_LEVEL=6
+CONFIG_LOG_CONSOLE=y
+# CONFIG_LOGF_FILE is not set
+CONFIG_LOGF_LINE=y
+CONFIG_LOGF_FUNC=y
+CONFIG_LOGF_FUNC_PAD=20
+# CONFIG_LOG_SYSLOG is not set
+# CONFIG_SPL_LOG is not set
+# CONFIG_LOG_ERROR_RETURN is not set
+
+#
+# Init options
+#
+# CONFIG_BOARD_TYPES is not set
+CONFIG_DISPLAY_CPUINFO=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+
+#
+# Start-up hooks
+#
+# CONFIG_CYCLIC is not set
+CONFIG_EVENT=y
+CONFIG_EVENT_DYNAMIC=y
+# CONFIG_EVENT_DEBUG is not set
+# CONFIG_ARCH_MISC_INIT is not set
+# CONFIG_BOARD_EARLY_INIT_F is not set
+CONFIG_BOARD_EARLY_INIT_R=y
+# CONFIG_BOARD_POSTCLK_INIT is not set
+# CONFIG_BOARD_LATE_INIT is not set
+# CONFIG_HWCONFIG is not set
+CONFIG_LAST_STAGE_INIT=y
+# CONFIG_MISC_INIT_R is not set
+# CONFIG_SYS_MALLOC_BOOTPARAMS is not set
+# CONFIG_ID_EEPROM is not set
+# CONFIG_PCI_INIT_R is not set
+# CONFIG_RESET_PHY_R is not set
+
+#
+# Security support
+#
+CONFIG_HASH=y
+# CONFIG_STACKPROTECTOR is not set
+# CONFIG_BOARD_RNG_SEED is not set
+
+#
+# Update support
+#
+# CONFIG_UPDATE_TFTP is not set
+# CONFIG_ANDROID_AB is not set
+
+#
+# Blob list
+#
+# CONFIG_BLOBLIST is not set
+CONFIG_SUPPORT_SPL=y
+CONFIG_SUPPORT_TPL=y
+
+#
+# SPL configuration options
+#
+CONFIG_SPL_FRAMEWORK=y
+# CONFIG_SPL_FRAMEWORK_BOARD_INIT_F is not set
+CONFIG_SPL_MAX_SIZE=0x0
+CONFIG_SPL_PAD_TO=0x0
+CONFIG_SPL_NO_BSS_LIMIT=y
+# CONFIG_SPL_BSS_LIMIT is not set
+# CONFIG_SPL_FOOTPRINT_LIMIT is not set
+CONFIG_SPL_SYS_STACK_F_CHECK_BYTE=0xaa
+# CONFIG_SPL_SYS_REPORT_STACK_F_USAGE is not set
+# CONFIG_SPL_SHOW_ERRORS is not set
+CONFIG_SPL_BINMAN_SYMBOLS=y
+CONFIG_SPL_BINMAN_UBOOT_SYMBOLS=y
+# CONFIG_SPL_BOARD_INIT is not set
+# CONFIG_SPL_BOOTROM_SUPPORT is not set
+CONFIG_SPL_RAW_IMAGE_SUPPORT=y
+CONFIG_SPL_LEGACY_IMAGE_FORMAT=y
+# CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK is not set
+# CONFIG_SPL_LOAD_IMX_CONTAINER is not set
+# CONFIG_SPL_SYS_MALLOC_SIMPLE is not set
+CONFIG_SPL_SEPARATE_BSS=y
+# CONFIG_SPL_SYS_MALLOC is not set
+CONFIG_SPL_BANNER_PRINT=y
+# CONFIG_SPL_DISPLAY_PRINT is not set
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set
+# CONFIG_SPL_CACHE is not set
+# CONFIG_SPL_CPU is not set
+# CONFIG_SPL_CRYPTO is not set
+# CONFIG_SPL_DMA is not set
+# CONFIG_SPL_ENV_SUPPORT is not set
+# CONFIG_SPL_FS_EXT4 is not set
+# CONFIG_SPL_FS_SQUASHFS is not set
+# CONFIG_SPL_FAT_WRITE is not set
+# CONFIG_SPL_FPGA is not set
+# CONFIG_SPL_I2C is not set
+# CONFIG_SPL_DM_MAILBOX is not set
+# CONFIG_SPL_MEMORY is not set
+# CONFIG_SPL_MPC8XXX_INIT_DDR is not set
+# CONFIG_SPL_MTD is not set
+# CONFIG_SPL_MUSB_NEW is not set
+# CONFIG_SPL_NAND_SUPPORT is not set
+# CONFIG_SPL_NAND_DRIVERS is not set
+# CONFIG_SPL_NAND_ECC is not set
+# CONFIG_SPL_NAND_SIMPLE is not set
+# CONFIG_SPL_UBI is not set
+# CONFIG_SPL_DM_SPI_FLASH is not set
+# CONFIG_SPL_NET is not set
+# CONFIG_SPL_NOR_SUPPORT is not set
+# CONFIG_SPL_XIP_SUPPORT is not set
+# CONFIG_SPL_ONENAND_SUPPORT is not set
+# CONFIG_SPL_OS_BOOT is not set
+# CONFIG_SPL_PCI is not set
+# CONFIG_SPL_PCH is not set
+# CONFIG_SPL_POST_MEM_SUPPORT is not set
+# CONFIG_SPL_DM_RESET is not set
+# CONFIG_SPL_POWER is not set
+# CONFIG_SPL_POWER_DOMAIN is not set
+# CONFIG_SPL_RAM_SUPPORT is not set
+# CONFIG_SPL_REMOTEPROC is not set
+# CONFIG_SPL_RTC is not set
+# CONFIG_SPL_SATA is not set
+# CONFIG_SPL_NVME is not set
+# CONFIG_SPL_SPI_FLASH_TINY is not set
+# CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT is not set
+# CONFIG_SPL_SPI_FLASH_MTD is not set
+# CONFIG_SPL_SPI_LOAD is not set
+# CONFIG_SPL_THERMAL is not set
+# CONFIG_SPL_WATCHDOG is not set
+# CONFIG_SPL_YMODEM_SUPPORT is not set
+CONFIG_SPL_TARGET=""
+# CONFIG_TPL is not set
+# CONFIG_VPL is not set
+CONFIG_IMAGE_SIGN_INFO=y
+CONFIG_CMDLINE=y
+CONFIG_HUSH_PARSER=y
+
+#
+# Hush flavor to use
+#
+CONFIG_HUSH_OLD_PARSER=y
+# CONFIG_HUSH_MODERN_PARSER is not set
+CONFIG_CMDLINE_EDITING=y
+# CONFIG_CMDLINE_PS_SUPPORT is not set
+CONFIG_AUTO_COMPLETE=y
+CONFIG_SYS_LONGHELP=y
+CONFIG_SYS_PROMPT="=> "
+CONFIG_SYS_PROMPT_HUSH_PS2="> "
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_XTRACE=y
+
+#
+# Commands
+#
+
+#
+# Info commands
+#
+CONFIG_CMD_ACPI=y
+CONFIG_CMD_BDI=y
+CONFIG_CMD_BDINFO_EXTRA=y
+# CONFIG_CMD_CONFIG is not set
+CONFIG_CMD_CONSOLE=y
+# CONFIG_CMD_HISTORY is not set
+# CONFIG_CMD_PMC is not set
+# CONFIG_CMD_SMBIOS is not set
+
+#
+# Boot commands
+#
+CONFIG_CMD_BOOTD=y
+CONFIG_CMD_BOOTM=y
+CONFIG_CMD_BOOTDEV=y
+CONFIG_CMD_BOOTFLOW=y
+CONFIG_CMD_BOOTFLOW_FULL=y
+CONFIG_CMD_BOOTMETH=y
+CONFIG_BOOTM_EFI=y
+# CONFIG_CMD_BOOTZ is not set
+CONFIG_BOOTM_LINUX=y
+CONFIG_BOOTM_NETBSD=y
+# CONFIG_BOOTM_OPENRTOS is not set
+# CONFIG_BOOTM_OSE is not set
+CONFIG_BOOTM_PLAN9=y
+CONFIG_BOOTM_RTEMS=y
+CONFIG_CMD_VBE=y
+CONFIG_BOOTM_VXWORKS=y
+CONFIG_CMD_BOOTEFI=y
+CONFIG_CMD_BOOTEFI_BINARY=y
+CONFIG_CMD_BOOTEFI_BOOTMGR=y
+CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
+# CONFIG_CMD_BOOTEFI_HELLO is not set
+# CONFIG_CMD_BOOTEFI_SELFTEST is not set
+# CONFIG_CMD_BOOTMENU is not set
+# CONFIG_CMD_ADTIMG is not set
+CONFIG_CMD_ELF=y
+# CONFIG_CMD_ELF_FDT_SETUP is not set
+CONFIG_CMD_FDT=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RUN=y
+CONFIG_CMD_IMI=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_XIMG=y
+# CONFIG_CMD_SPL is not set
+CONFIG_CMD_ZBOOT=y
+
+#
+# Environment commands
+#
+# CONFIG_CMD_ASKENV is not set
+CONFIG_CMD_EXPORTENV=y
+CONFIG_CMD_IMPORTENV=y
+CONFIG_CMD_EDITENV=y
+# CONFIG_CMD_GREPENV is not set
+CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_ERASEENV is not set
+CONFIG_CMD_ENV_EXISTS=y
+# CONFIG_CMD_ENV_CALLBACK is not set
+# CONFIG_CMD_ENV_FLAGS is not set
+# CONFIG_CMD_NVEDIT_EFI is not set
+# CONFIG_CMD_NVEDIT_INDIRECT is not set
+# CONFIG_CMD_NVEDIT_INFO is not set
+# CONFIG_CMD_NVEDIT_LOAD is not set
+# CONFIG_CMD_NVEDIT_SELECT is not set
+
+#
+# Memory commands
+#
+# CONFIG_CMD_BINOP is not set
+CONFIG_CMD_CRC32=y
+# CONFIG_CRC32_VERIFY is not set
+# CONFIG_LOOPW is not set
+# CONFIG_CMD_MD5SUM is not set
+# CONFIG_CMD_MEMINFO is not set
+CONFIG_CMD_MEMORY=y
+# CONFIG_CMD_MEM_SEARCH is not set
+# CONFIG_CMD_MX_CYCLIC is not set
+CONFIG_CMD_RANDOM=y
+# CONFIG_CMD_MEMTEST is not set
+# CONFIG_CMD_SHA1SUM is not set
+# CONFIG_CMD_STRINGS is not set
+
+#
+# Compression commands
+#
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNLZ4 is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_ZIP is not set
+
+#
+# Device access commands
+#
+# CONFIG_CMD_ARMFLASH is not set
+# CONFIG_CMD_BCB is not set
+# CONFIG_CMD_BIND is not set
+# CONFIG_CMD_CLK is not set
+# CONFIG_CMD_DEMO is not set
+# CONFIG_CMD_DFU is not set
+CONFIG_CMD_DM=y
+# CONFIG_CMD_FPGAD is not set
+# CONFIG_CMD_FUSE is not set
+# CONFIG_CMD_GPIO is not set
+# CONFIG_CMD_GPT is not set
+CONFIG_CMD_IDE=y
+CONFIG_CMD_IO=y
+# CONFIG_CMD_IOTRACE is not set
+# CONFIG_CMD_I2C is not set
+CONFIG_CMD_LOADB=y
+# CONFIG_CMD_LOADM is not set
+CONFIG_CMD_LOADS=y
+# CONFIG_LOADS_ECHO is not set
+# CONFIG_CMD_SAVES is not set
+# CONFIG_SYS_LOADS_BAUD_CHANGE is not set
+CONFIG_CMD_LOADXY_TIMEOUT=90
+# CONFIG_CMD_LSBLK is not set
+# CONFIG_CMD_MBR is not set
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_BKOPS_ENABLE is not set
+# CONFIG_CMD_MMC_REG is not set
+# CONFIG_CMD_MMC_SWRITE is not set
+# CONFIG_CMD_CLONE is not set
+# CONFIG_CMD_MTD is not set
+CONFIG_CMD_NVME=y
+# CONFIG_CMD_ONENAND is not set
+# CONFIG_CMD_OSD is not set
+CONFIG_CMD_PART=y
+CONFIG_CMD_PCI=y
+# CONFIG_CMD_PCI_MPS is not set
+# CONFIG_CMD_POWEROFF is not set
+# CONFIG_CMD_READ is not set
+CONFIG_CMD_SATA=y
+CONFIG_CMD_SCSI=y
+# CONFIG_CMD_SDRAM is not set
+# CONFIG_CMD_TSI148 is not set
+# CONFIG_CMD_UNIVERSE is not set
+CONFIG_CMD_USB=y
+# CONFIG_CMD_USB_SDP is not set
+# CONFIG_CMD_RKMTD is not set
+# CONFIG_CMD_WRITE is not set
+
+#
+# Shell scripting commands
+#
+# CONFIG_CMD_CAT is not set
+CONFIG_CMD_ECHO=y
+CONFIG_CMD_ITEST=y
+CONFIG_CMD_SOURCE=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_XXD is not set
+
+#
+# Android support commands
+#
+CONFIG_CMD_NET=y
+CONFIG_CMD_BOOTP=y
+CONFIG_CMD_DHCP=y
+# CONFIG_BOOTP_MAY_FAIL is not set
+CONFIG_BOOTP_BOOTPATH=y
+# CONFIG_BOOTP_VENDOREX is not set
+CONFIG_BOOTP_BOOTFILESIZE=y
+CONFIG_BOOTP_DNS=y
+# CONFIG_BOOTP_DNS2 is not set
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
+# CONFIG_BOOTP_PREFER_SERVERIP is not set
+CONFIG_BOOTP_SUBNETMASK=y
+# CONFIG_BOOTP_NISDOMAIN is not set
+# CONFIG_BOOTP_NTPSERVER is not set
+# CONFIG_CMD_PCAP is not set
+CONFIG_BOOTP_PXE=y
+CONFIG_BOOTP_PXE_CLIENTARCH=0x0
+# CONFIG_BOOTP_PXE_DHCP_OPTION is not set
+CONFIG_BOOTP_VCI_STRING="U-Boot"
+CONFIG_CMD_TFTPBOOT=y
+# CONFIG_CMD_TFTPPUT is not set
+# CONFIG_CMD_TFTPSRV is not set
+CONFIG_NET_TFTP_VARS=y
+# CONFIG_CMD_RARP is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_SYS_DISABLE_AUTOLOAD is not set
+# CONFIG_CMD_WGET is not set
+CONFIG_CMD_MII=y
+CONFIG_CMD_MDIO=y
+CONFIG_CMD_PING=y
+# CONFIG_CMD_CDP is not set
+# CONFIG_CMD_SNTP is not set
+# CONFIG_CMD_DNS is not set
+# CONFIG_CMD_LINK_LOCAL is not set
+# CONFIG_CMD_ETHSW is not set
+CONFIG_CMD_PXE=y
+# CONFIG_CMD_WOL is not set
+
+#
+# Misc commands
+#
+# CONFIG_CMD_2048 is not set
+# CONFIG_CMD_BMP is not set
+# CONFIG_CMD_BSP is not set
+CONFIG_CMD_BLOCK_CACHE=y
+# CONFIG_CMD_CACHE is not set
+# CONFIG_CMD_CONITRACE is not set
+CONFIG_CMD_CLS=y
+# CONFIG_CMD_EFIDEBUG is not set
+CONFIG_CMD_EFICONFIG=y
+# CONFIG_CMD_EXCEPTION is not set
+# CONFIG_CMD_INI is not set
+CONFIG_CMD_DATE=y
+# CONFIG_CMD_RTC is not set
+CONFIG_CMD_TIME=y
+CONFIG_CMD_GETTIME=y
+# CONFIG_CMD_PAUSE is not set
+CONFIG_CMD_SLEEP=y
+# CONFIG_CMD_TIMER is not set
+CONFIG_CMD_SOUND=y
+# CONFIG_CMD_SYSBOOT is not set
+# CONFIG_CMD_QFW is not set
+# CONFIG_CMD_PSTORE is not set
+# CONFIG_CMD_TERMINAL is not set
+# CONFIG_CMD_UUID is not set
+CONFIG_CMD_VIDCONSOLE=y
+CONFIG_CMD_SELECT_FONT=y
+
+#
+# TI specific command line interface
+#
+
+#
+# Power commands
+#
+
+#
+# Security commands
+#
+# CONFIG_CMD_AES is not set
+# CONFIG_CMD_BLOB is not set
+# CONFIG_CMD_HASH is not set
+
+#
+# Firmware commands
+#
+
+#
+# Filesystem commands
+#
+# CONFIG_CMD_BTRFS is not set
+CONFIG_CMD_CBFS=y
+# CONFIG_CMD_EROFS is not set
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+# CONFIG_CMD_SQUASHFS is not set
+CONFIG_CMD_FS_GENERIC=y
+# CONFIG_CMD_FS_UUID is not set
+# CONFIG_CMD_JFFS2 is not set
+# CONFIG_CMD_MTDPARTS is not set
+CONFIG_MTDIDS_DEFAULT=""
+CONFIG_MTDPARTS_DEFAULT=""
+# CONFIG_CMD_ZFS is not set
+
+#
+# Debug commands
+#
+CONFIG_CMD_CBSYSINFO=y
+# CONFIG_CMD_DIAG is not set
+# CONFIG_CMD_EVENT is not set
+CONFIG_CMD_IRQ=y
+# CONFIG_CMD_LOG is not set
+# CONFIG_CMD_UBI is not set
+# CONFIG_MMC_SPEED_MODE_SET is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITIONS=y
+CONFIG_MAC_PARTITION=y
+# CONFIG_SPL_MAC_PARTITION is not set
+CONFIG_DOS_PARTITION=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_ISO_PARTITION=y
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_SPL_AMIGA_PARTITION is not set
+CONFIG_EFI_PARTITION=y
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=128
+CONFIG_EFI_PARTITION_ENTRIES_OFF=0
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_PARTITION_UUIDS=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_SUPPORT_OF_CONTROL=y
+CONFIG_PYLIBFDT=y
+CONFIG_DTOC=y
+CONFIG_BINMAN=y
+
+#
+# Device Tree Control
+#
+CONFIG_OF_CONTROL=y
+CONFIG_OF_REAL=y
+CONFIG_SPL_OF_CONTROL=y
+# CONFIG_OF_LIVE is not set
+# CONFIG_OF_UPSTREAM is not set
+CONFIG_OF_SEPARATE=y
+# CONFIG_OF_EMBED is not set
+# CONFIG_OF_BOARD is not set
+# CONFIG_OF_OMIT_DTB is not set
+CONFIG_DEVICE_TREE_INCLUDES=""
+CONFIG_OF_LIST="coreboot"
+# CONFIG_MULTI_DTB_FIT is not set
+CONFIG_SPL_OF_LIST="coreboot"
+CONFIG_OF_TAG_MIGRATE=y
+CONFIG_OF_SPL_REMOVE_PROPS="clocks clock-names interrupt-parent interrupts"
+# CONFIG_OF_DTB_PROPS_REMOVE is not set
+# CONFIG_SPL_OF_PLATDATA is not set
+CONFIG_SPL_OF_REAL=y
+
+#
+# Environment
+#
+CONFIG_ENV_SUPPORT=y
+CONFIG_SAVEENV=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_MIN_ENTRIES=64
+CONFIG_ENV_MAX_ENTRIES=512
+CONFIG_ENV_IS_DEFAULT=y
+CONFIG_ENV_IS_NOWHERE=y
+# CONFIG_ENV_IS_IN_EEPROM is not set
+# CONFIG_ENV_IS_IN_FAT is not set
+# CONFIG_ENV_IS_IN_EXT4 is not set
+# CONFIG_ENV_IS_IN_FLASH is not set
+# CONFIG_ENV_IS_IN_MMC is not set
+# CONFIG_ENV_IS_IN_NAND is not set
+# CONFIG_ENV_IS_IN_NVRAM is not set
+# CONFIG_ENV_IS_IN_ONENAND is not set
+# CONFIG_ENV_IS_IN_REMOTE is not set
+# CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_USE_DEFAULT_ENV_FILE is not set
+# CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set
+# CONFIG_ENV_IMPORT_FDT is not set
+# CONFIG_ENV_APPEND is not set
+# CONFIG_ENV_WRITEABLE_LIST is not set
+# CONFIG_ENV_ACCESS_IGNORE_FORCE is not set
+CONFIG_USE_BOOTFILE=y
+CONFIG_BOOTFILE="bzImage"
+# CONFIG_USE_ETHPRIME is not set
+CONFIG_USE_HOSTNAME=y
+CONFIG_HOSTNAME="x86"
+# CONFIG_VERSION_VARIABLE is not set
+CONFIG_NET=y
+CONFIG_ARP_TIMEOUT=5000
+CONFIG_NET_RETRY_COUNT=5
+# CONFIG_PROT_UDP is not set
+CONFIG_BOOTDEV_ETH=y
+# CONFIG_BOOTP_SEND_HOSTNAME is not set
+# CONFIG_NET_RANDOM_ETHADDR is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_IP_DEFRAG is not set
+# CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set
+CONFIG_TFTP_BLOCKSIZE=1468
+# CONFIG_TFTP_PORT is not set
+CONFIG_TFTP_WINDOWSIZE=1
+CONFIG_TFTP_TSIZE=y
+# CONFIG_SERVERIP_FROM_PROXYDHCP is not set
+CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS=100
+# CONFIG_KEEP_SERVERADDR is not set
+# CONFIG_UDP_CHECKSUM is not set
+# CONFIG_BOOTP_SERVERIP is not set
+CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64
+# CONFIG_USE_GATEWAYIP is not set
+# CONFIG_USE_IPADDR is not set
+# CONFIG_USE_NETMASK is not set
+CONFIG_USE_ROOTPATH=y
+CONFIG_ROOTPATH="/opt/nfsroot"
+# CONFIG_USE_SERVERIP is not set
+# CONFIG_PROT_TCP is not set
+# CONFIG_IPV6 is not set
+CONFIG_SYS_RX_ETH_BUFFER=4
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+# CONFIG_DM_WARN is not set
+# CONFIG_SPL_DM_WARN is not set
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_STATS is not set
+# CONFIG_SPL_DM_STATS is not set
+CONFIG_DM_DEVICE_REMOVE=y
+CONFIG_DM_EVENT=y
+# CONFIG_SPL_DM_DEVICE_REMOVE is not set
+CONFIG_DM_STDIO=y
+CONFIG_DM_SEQ_ALIAS=y
+# CONFIG_SPL_DM_SEQ_ALIAS is not set
+CONFIG_SPL_DM_INLINE_OFNODE=y
+# CONFIG_DM_DMA is not set
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+# CONFIG_DEVRES is not set
+CONFIG_SIMPLE_BUS=y
+CONFIG_SPL_SIMPLE_BUS=y
+# CONFIG_SIMPLE_BUS_CORRECT_RANGE is not set
+CONFIG_OF_TRANSLATE=y
+# CONFIG_SPL_OF_TRANSLATE is not set
+# CONFIG_TRANSLATION_OFFSET is not set
+CONFIG_DM_DEV_READ_INLINE=y
+# CONFIG_OFNODE_MULTI_TREE is not set
+# CONFIG_ACPIGEN is not set
+# CONFIG_BOUNCE_BUFFER is not set
+# CONFIG_ADC is not set
+CONFIG_SATA=y
+CONFIG_LIBATA=y
+CONFIG_SCSI_AHCI=y
+
+#
+# SATA/SCSI device support
+#
+CONFIG_AHCI_PCI=y
+# CONFIG_DWC_AHCI is not set
+# CONFIG_DWC_AHSATA is not set
+# CONFIG_MTK_AHCI is not set
+# CONFIG_SUNXI_AHCI is not set
+# CONFIG_SATA_CEVA is not set
+# CONFIG_SATA_MV is not set
+# CONFIG_SATA_SIL is not set
+# CONFIG_AXI is not set
+
+#
+# Bus devices
+#
+CONFIG_BLK=y
+CONFIG_SPL_LEGACY_BLOCK=y
+CONFIG_SPL_BLK=y
+CONFIG_BLOCK_CACHE=y
+# CONFIG_BLKMAP is not set
+# CONFIG_SPL_BLOCK_CACHE is not set
+# CONFIG_EFI_MEDIA is not set
+# CONFIG_SPL_BLK_FS is not set
+CONFIG_IDE=y
+CONFIG_SYS_IDE_MAXBUS=2
+CONFIG_SYS_IDE_MAXDEVICE=4
+CONFIG_SYS_ATA_BASE_ADDR=0x0
+CONFIG_SYS_ATA_STRIDE=0x1
+CONFIG_SYS_ATA_DATA_OFFSET=0
+CONFIG_SYS_ATA_REG_OFFSET=0
+CONFIG_SYS_ATA_ALT_OFFSET=0
+CONFIG_SYS_ATA_IDE0_OFFSET=0x1f0
+CONFIG_SYS_ATA_IDE1_OFFSET=0x170
+CONFIG_ATAPI=y
+# CONFIG_IDE_RESET is not set
+CONFIG_LBA48=y
+CONFIG_SYS_64BIT_LBA=y
+# CONFIG_RKMTD is not set
+# CONFIG_BOOTCOUNT_LIMIT is not set
+
+#
+# Button Support
+#
+# CONFIG_BUTTON is not set
+
+#
+# Cache Controller drivers
+#
+# CONFIG_CACHE is not set
+# CONFIG_ANDES_L2_CACHE is not set
+# CONFIG_NCORE_CACHE is not set
+# CONFIG_SIFIVE_CCACHE is not set
+# CONFIG_SIFIVE_PL2 is not set
+
+#
+# Clock
+#
+# CONFIG_CLK is not set
+# CONFIG_SPL_CLK_CCF is not set
+# CONFIG_CLK_CCF is not set
+# CONFIG_CLK_RCAR is not set
+# CONFIG_CLK_RCAR_CPG_LIB is not set
+# CONFIG_CPU is not set
+
+#
+# Hardware crypto devices
+#
+# CONFIG_DM_HASH is not set
+# CONFIG_FSL_CAAM is not set
+# CONFIG_SYS_FSL_SEC_BE is not set
+# CONFIG_SYS_FSL_SEC_LE is not set
+# CONFIG_NPCM_AES is not set
+# CONFIG_NPCM_SHA is not set
+# CONFIG_DDR_SPD is not set
+# CONFIG_IMX_SNPS_DDR_PHY is not set
+
+#
+# Demo for driver model
+#
+# CONFIG_DM_DEMO is not set
+
+#
+# DFU support
+#
+
+#
+# DMA Support
+#
+# CONFIG_DMA is not set
+# CONFIG_DMA_LPC32XX is not set
+# CONFIG_TI_EDMA3 is not set
+# CONFIG_DMA_LEGACY is not set
+
+#
+# Extcon Support
+#
+# CONFIG_EXTCON is not set
+
+#
+# Fastboot support
+#
+# CONFIG_UDP_FUNCTION_FASTBOOT is not set
+# CONFIG_TCP_FUNCTION_FASTBOOT is not set
+# CONFIG_FIRMWARE is not set
+# CONFIG_ZYNQMP_FIRMWARE is not set
+# CONFIG_DM_FUZZING_ENGINE is not set
+
+#
+# FPGA support
+#
+# CONFIG_FPGA_ALTERA is not set
+# CONFIG_FPGA_SOCFPGA is not set
+# CONFIG_FPGA_LATTICE is not set
+# CONFIG_FPGA_XILINX is not set
+# CONFIG_DM_FPGA is not set
+# CONFIG_FWU_MDATA is not set
+CONFIG_GPIO=y
+CONFIG_SPL_DM_GPIO=y
+# CONFIG_GPIO_HOG is not set
+# CONFIG_SPL_GPIO_HOG is not set
+# CONFIG_DM_GPIO_LOOKUP_LABEL is not set
+# CONFIG_SPL_DM_GPIO_LOOKUP_LABEL is not set
+# CONFIG_ALTERA_PIO is not set
+# CONFIG_BCM2835_GPIO is not set
+# CONFIG_DWAPB_GPIO is not set
+# CONFIG_AT91_GPIO is not set
+# CONFIG_ATMEL_PIO4 is not set
+# CONFIG_ASPEED_GPIO is not set
+# CONFIG_DA8XX_GPIO is not set
+# CONFIG_HIKEY_GPIO is not set
+# CONFIG_INTEL_BROADWELL_GPIO is not set
+# CONFIG_INTEL_GPIO is not set
+# CONFIG_INTEL_ICH6_GPIO is not set
+# CONFIG_IMX_RGPIO2P is not set
+# CONFIG_IPROC_GPIO is not set
+# CONFIG_HSDK_CREG_GPIO is not set
+# CONFIG_KIRKWOOD_GPIO is not set
+# CONFIG_LPC32XX_GPIO is not set
+# CONFIG_MCP230XX_GPIO is not set
+# CONFIG_MSM_GPIO is not set
+# CONFIG_MXC_GPIO is not set
+# CONFIG_MXS_GPIO is not set
+# CONFIG_NPCM_GPIO is not set
+# CONFIG_CMD_PCA953X is not set
+# CONFIG_ROCKCHIP_GPIO is not set
+# CONFIG_XILINX_GPIO is not set
+# CONFIG_TCA642X is not set
+# CONFIG_TEGRA_GPIO is not set
+# CONFIG_TEGRA186_GPIO is not set
+# CONFIG_VYBRID_GPIO is not set
+# CONFIG_SIFIVE_GPIO is not set
+# CONFIG_ZYNQ_GPIO is not set
+# CONFIG_DM_74X164 is not set
+# CONFIG_SPL_DM_PCA953X is not set
+# CONFIG_PCA953X is not set
+# CONFIG_MPC8XXX_GPIO is not set
+# CONFIG_MPC8XX_GPIO is not set
+# CONFIG_NX_GPIO is not set
+# CONFIG_NOMADIK_GPIO is not set
+# CONFIG_ZYNQMP_GPIO_MODEPIN is not set
+# CONFIG_SLG7XL45106_I2C_GPO is not set
+# CONFIG_FTGPIO010 is not set
+
+#
+# Hardware Spinlock Support
+#
+# CONFIG_DM_HWSPINLOCK is not set
+CONFIG_I2C=y
+# CONFIG_DM_I2C is not set
+# CONFIG_SYS_I2C_LEGACY is not set
+# CONFIG_SPL_SYS_I2C_LEGACY is not set
+# CONFIG_TPL_SYS_I2C_LEGACY is not set
+# CONFIG_SYS_I2C_FSL is not set
+# CONFIG_SYS_I2C_DW is not set
+# CONFIG_SYS_I2C_IMX_LPI2C is not set
+# CONFIG_SYS_I2C_MTK is not set
+# CONFIG_SYS_I2C_MICROCHIP is not set
+# CONFIG_SYS_I2C_MXC is not set
+# CONFIG_SYS_I2C_NPCM is not set
+# CONFIG_SYS_I2C_SOFT is not set
+# CONFIG_SYS_I2C_MV is not set
+# CONFIG_SYS_I2C_MVTWSI is not set
+CONFIG_INPUT=y
+# CONFIG_SPL_INPUT is not set
+CONFIG_DM_KEYBOARD=y
+# CONFIG_SPL_DM_KEYBOARD is not set
+# CONFIG_BUTTON_KEYBOARD is not set
+# CONFIG_CROS_EC_KEYB is not set
+CONFIG_I8042_KEYB=y
+# CONFIG_TEGRA_KEYBOARD is not set
+# CONFIG_TWL4030_INPUT is not set
+
+#
+# IOMMU device drivers
+#
+# CONFIG_IOMMU is not set
+
+#
+# LED Support
+#
+# CONFIG_LED is not set
+# CONFIG_SPL_LED is not set
+# CONFIG_LED_STATUS is not set
+
+#
+# Mailbox Controller Support
+#
+# CONFIG_DM_MAILBOX is not set
+
+#
+# Memory Controller drivers
+#
+# CONFIG_MEMORY is not set
+# CONFIG_ATMEL_EBI is not set
+# CONFIG_MFD_ATMEL_SMC is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MISC is not set
+# CONFIG_SPL_MISC is not set
+# CONFIG_NVMEM is not set
+# CONFIG_SPL_NVMEM is not set
+# CONFIG_SMSC_LPC47M is not set
+# CONFIG_SMSC_SIO1007 is not set
+CONFIG_CBMEM_CONSOLE=y
+# CONFIG_CROS_EC is not set
+# CONFIG_DS4510 is not set
+# CONFIG_FSL_SEC_MON is not set
+CONFIG_IRQ=y
+# CONFIG_NPCM_HOST is not set
+# CONFIG_NUVOTON_NCT6102D is not set
+# CONFIG_P2SB is not set
+# CONFIG_PWRSEQ is not set
+# CONFIG_PCA9551_LED is not set
+# CONFIG_TEST_DRV is not set
+# CONFIG_USB_HUB_USB251XB is not set
+# CONFIG_TWL4030_LED is not set
+# CONFIG_WINBOND_W83627 is not set
+# CONFIG_FS_LOADER is not set
+# CONFIG_SPL_FS_LOADER is not set
+# CONFIG_SPL_SOCFPGA_DT_REG is not set
+
+#
+# MMC Host controller Support
+#
+CONFIG_MMC=y
+CONFIG_MMC_WRITE=y
+# CONFIG_MMC_BROKEN_CD is not set
+CONFIG_DM_MMC=y
+CONFIG_SPL_DM_MMC=y
+# CONFIG_ARM_PL180_MMCI is not set
+CONFIG_MMC_QUIRKS=y
+CONFIG_SYS_MMC_MAX_BLK_COUNT=65535
+CONFIG_MMC_HW_PARTITIONING=y
+# CONFIG_SUPPORT_EMMC_RPMB is not set
+# CONFIG_SUPPORT_EMMC_BOOT is not set
+# CONFIG_MMC_IO_VOLTAGE is not set
+# CONFIG_MMC_HS400_ES_SUPPORT is not set
+# CONFIG_MMC_HS400_SUPPORT is not set
+# CONFIG_MMC_HS200_SUPPORT is not set
+CONFIG_MMC_VERBOSE=y
+# CONFIG_MMC_TRACE is not set
+# CONFIG_MMC_DW is not set
+# CONFIG_MMC_MXC is not set
+CONFIG_MMC_PCI=y
+# CONFIG_MMC_OMAP_HS is not set
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+# CONFIG_MMC_SDHCI_ADMA is not set
+# CONFIG_MMC_SDHCI_ADMA_FORCE_32BIT is not set
+# CONFIG_MMC_SDHCI_ADMA_64BIT is not set
+# CONFIG_MMC_SDHCI_BCMSTB is not set
+# CONFIG_MMC_SDHCI_CADENCE is not set
+# CONFIG_MMC_SDHCI_CV1800B is not set
+# CONFIG_MMC_SDHCI_IPROC is not set
+# CONFIG_MMC_SDHCI_F_SDH30 is not set
+# CONFIG_MMC_SDHCI_KONA is not set
+# CONFIG_MMC_SDHCI_MSM is not set
+# CONFIG_MMC_SDHCI_NPCM is not set
+# CONFIG_MMC_SDHCI_S5P is not set
+# CONFIG_MMC_SDHCI_STI is not set
+# CONFIG_MMC_SDHCI_XENON is not set
+# CONFIG_MMC_SDHCI_TANGIER is not set
+# CONFIG_MMC_SDHCI_ZYNQ is not set
+# CONFIG_MMC_PITON is not set
+# CONFIG_STM32_SDMMC2 is not set
+# CONFIG_FTSDC010 is not set
+# CONFIG_FSL_ESDHC is not set
+# CONFIG_FSL_ESDHC_IMX is not set
+
+#
+# MTD Support
+#
+CONFIG_MTD=y
+# CONFIG_DM_MTD is not set
+# CONFIG_MTD_NOR_FLASH is not set
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_SYS_MTDPARTS_RUNTIME is not set
+# CONFIG_FLASH_CFI_DRIVER is not set
+# CONFIG_HBMC_AM654 is not set
+# CONFIG_SAMSUNG_ONENAND is not set
+# CONFIG_USE_SYS_MAX_FLASH_BANKS is not set
+# CONFIG_MTD_RAW_NAND is not set
+
+#
+# SPI Flash Support
+#
+# CONFIG_SPI_FLASH is not set
+
+#
+# UBI support
+#
+# CONFIG_UBI_SILENCE_MSG is not set
+# CONFIG_MTD_UBI is not set
+# CONFIG_NVMXIP is not set
+# CONFIG_NVMXIP_QSPI is not set
+
+#
+# Multiplexer drivers
+#
+# CONFIG_MULTIPLEXER is not set
+# CONFIG_BITBANGMII is not set
+# CONFIG_MV88E6352_SWITCH is not set
+CONFIG_PHYLIB=y
+# CONFIG_PHY_ADDR_ENABLE is not set
+# CONFIG_B53_SWITCH is not set
+# CONFIG_MV88E61XX_SWITCH is not set
+# CONFIG_PHYLIB_10G is not set
+# CONFIG_PHY_ADIN is not set
+# CONFIG_PHY_AQUANTIA is not set
+# CONFIG_PHY_ATHEROS is not set
+# CONFIG_SPL_PHY_ATHEROS is not set
+# CONFIG_PHY_BROADCOM is not set
+# CONFIG_PHY_CORTINA is not set
+# CONFIG_PHY_DAVICOM is not set
+# CONFIG_PHY_ET1011C is not set
+# CONFIG_PHY_LXT is not set
+# CONFIG_PHY_MARVELL is not set
+# CONFIG_PHY_MARVELL_10G is not set
+# CONFIG_PHY_MESON_GXL is not set
+# CONFIG_PHY_MICREL is not set
+# CONFIG_PHY_MOTORCOMM is not set
+# CONFIG_PHY_MSCC is not set
+# CONFIG_PHY_NATSEMI is not set
+# CONFIG_PHY_NXP_C45_TJA11XX is not set
+# CONFIG_PHY_NXP_TJA11XX is not set
+# CONFIG_PHY_REALTEK is not set
+# CONFIG_PHY_SMSC is not set
+# CONFIG_PHY_TERANETICS is not set
+# CONFIG_PHY_TI is not set
+# CONFIG_PHY_TI_DP83867 is not set
+# CONFIG_PHY_TI_DP83869 is not set
+# CONFIG_PHY_TI_GENERIC is not set
+# CONFIG_PHY_VITESSE is not set
+# CONFIG_PHY_XILINX is not set
+# CONFIG_PHY_XILINX_GMII2RGMII is not set
+# CONFIG_PHY_XWAY is not set
+# CONFIG_PHY_ETHERNET_ID is not set
+# CONFIG_PHY_FIXED is not set
+# CONFIG_PHY_NCSI is not set
+# CONFIG_FSL_MEMAC is not set
+CONFIG_PHY_RESET_DELAY=0
+# CONFIG_FSL_PFE is not set
+CONFIG_ETH=y
+CONFIG_DM_ETH=y
+# CONFIG_DM_MDIO is not set
+# CONFIG_DM_ETH_PHY is not set
+CONFIG_NETDEVICES=y
+# CONFIG_PHY_GIGE is not set
+# CONFIG_ALTERA_TSE is not set
+# CONFIG_BCM_SF2_ETH is not set
+# CONFIG_BCMGENET is not set
+# CONFIG_BNXT_ETH is not set
+# CONFIG_CALXEDA_XGMAC is not set
+# CONFIG_DRIVER_DM9000 is not set
+# CONFIG_DWC_ETH_QOS is not set
+CONFIG_E1000=y
+# CONFIG_E1000_NO_NVM is not set
+# CONFIG_E1000_SPI_GENERIC is not set
+# CONFIG_E1000_SPI is not set
+# CONFIG_CMD_E1000 is not set
+# CONFIG_EEPRO100 is not set
+CONFIG_ETH_DESIGNWARE=y
+# CONFIG_ETH_DESIGNWARE_MESON8B is not set
+# CONFIG_ETH_DESIGNWARE_SOCFPGA is not set
+# CONFIG_ETH_DESIGNWARE_S700 is not set
+# CONFIG_DW_ALTDESCRIPTOR is not set
+# CONFIG_ETHOC is not set
+# CONFIG_FTMAC100 is not set
+# CONFIG_FTGMAC100 is not set
+# CONFIG_MCFFEC is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_LITEETH is not set
+# CONFIG_MACB is not set
+# CONFIG_NET_NPCM750 is not set
+CONFIG_PCH_GBE=y
+# CONFIG_RGMII is not set
+# CONFIG_MII is not set
+# CONFIG_RMII is not set
+# CONFIG_PCNET is not set
+# CONFIG_QE_UEC is not set
+# CONFIG_RTL8139 is not set
+CONFIG_RTL8169=y
+# CONFIG_SMC911X is not set
+# CONFIG_SUN7I_GMAC is not set
+# CONFIG_SUN4I_EMAC is not set
+# CONFIG_SUN8I_EMAC is not set
+# CONFIG_SH_ETHER is not set
+# CONFIG_DRIVER_TI_CPSW is not set
+# CONFIG_DRIVER_TI_EMAC is not set
+# CONFIG_DRIVER_TI_KEYSTONE_NET is not set
+# CONFIG_TULIP is not set
+# CONFIG_XILINX_AXIEMAC is not set
+# CONFIG_VSC7385_ENET is not set
+# CONFIG_XILINX_EMACLITE is not set
+# CONFIG_ZYNQ_GEM is not set
+# CONFIG_GMAC_ROCKCHIP is not set
+# CONFIG_TSEC_ENET is not set
+# CONFIG_MEDIATEK_ETH is not set
+# CONFIG_HIFEMAC_ETH is not set
+# CONFIG_HIGMACV300_ETH is not set
+CONFIG_NVME=y
+# CONFIG_NVME_APPLE is not set
+CONFIG_NVME_PCI=y
+# CONFIG_DM_PCI_COMPAT is not set
+# CONFIG_PCI_PNP is not set
+# CONFIG_PCI_REGION_MULTI_ENTRY is not set
+CONFIG_PCI_CONFIG_HOST_BRIDGE=y
+# CONFIG_PCI_SRIOV is not set
+CONFIG_PCI_ENHANCED_ALLOCATION=y
+# CONFIG_PCI_ARID is not set
+# CONFIG_PCIE_ECAM_GENERIC is not set
+# CONFIG_PCIE_ECAM_SYNQUACER is not set
+# CONFIG_PCI_FTPCI100 is not set
+# CONFIG_PCI_PHYTIUM is not set
+# CONFIG_PCIE_FSL is not set
+# CONFIG_PCI_MPC85XX is not set
+# CONFIG_PCI_XILINX is not set
+# CONFIG_PCIE_LAYERSCAPE_RC is not set
+# CONFIG_PCIE_LAYERSCAPE_EP is not set
+# CONFIG_PCIE_LAYERSCAPE_GEN4 is not set
+# CONFIG_PCIE_INTEL_FPGA is not set
+# CONFIG_PCIE_IPROC is not set
+# CONFIG_PCI_KEYSTONE is not set
+# CONFIG_PCIE_STARFIVE_JH7110 is not set
+
+#
+# PCI Endpoint
+#
+# CONFIG_PCI_ENDPOINT is not set
+CONFIG_PCH=y
+CONFIG_X86_PCH7=y
+CONFIG_X86_PCH9=y
+
+#
+# PHY Subsystem
+#
+# CONFIG_PHY is not set
+# CONFIG_SPL_PHY is not set
+# CONFIG_MIPI_DPHY_HELPERS is not set
+
+#
+# Rockchip PHY driver
+#
+# CONFIG_MVEBU_COMPHY_SUPPORT is not set
+
+#
+# Pin controllers
+#
+# CONFIG_PINCTRL is not set
+CONFIG_SPL_PINCTRL=y
+CONFIG_SPL_PINCTRL_FULL=y
+CONFIG_SPL_PINCTRL_GENERIC=y
+CONFIG_SPL_PINMUX=y
+# CONFIG_SPL_PINCONF is not set
+CONFIG_SPL_PINCONF_RECURSIVE=y
+# CONFIG_PINCTRL_AT91 is not set
+# CONFIG_PINCTRL_AT91PIO4 is not set
+# CONFIG_PINCTRL_INTEL is not set
+# CONFIG_PINCTRL_QE is not set
+# CONFIG_PINCTRL_ROCKCHIP_RV1108 is not set
+# CONFIG_PINCTRL_SINGLE is not set
+# CONFIG_PINCTRL_STM32 is not set
+# CONFIG_SPL_PINCTRL_STMFX is not set
+# CONFIG_PINCTRL_TEGRA is not set
+# CONFIG_SPL_PINCTRL_TEGRA is not set
+CONFIG_POWER=y
+# CONFIG_POWER_LEGACY is not set
+# CONFIG_SPL_POWER_LEGACY is not set
+# CONFIG_ACPI_PMC is not set
+# CONFIG_SPL_ACPI_PMC is not set
+
+#
+# Power Domain Support
+#
+# CONFIG_POWER_DOMAIN is not set
+# CONFIG_DM_PMIC is not set
+# CONFIG_PMIC_TPS65217 is not set
+# CONFIG_POWER_TPS65218 is not set
+# CONFIG_POWER_TPS62362 is not set
+# CONFIG_SPL_POWER_TPS62362 is not set
+# CONFIG_SPL_POWER_TPS65910 is not set
+# CONFIG_DM_REGULATOR is not set
+# CONFIG_TPS6586X_POWER is not set
+# CONFIG_POWER_MT6323 is not set
+# CONFIG_DM_PWM is not set
+# CONFIG_PWM_IMX is not set
+# CONFIG_PWM_SANDBOX is not set
+# CONFIG_U_QE is not set
+# CONFIG_RAM is not set
+
+#
+# Reboot Mode Support
+#
+# CONFIG_DM_REBOOT_MODE is not set
+
+#
+# Remote Processor drivers
+#
+CONFIG_REMOTEPROC_MAX_FW_SIZE=0x10000
+
+#
+# Reset Controller Support
+#
+# CONFIG_RESET_SCMI is not set
+# CONFIG_DM_RNG is not set
+# CONFIG_SPL_DM_RNG is not set
+
+#
+# Real Time Clock
+#
+CONFIG_DM_RTC=y
+# CONFIG_SPL_DM_RTC is not set
+# CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set
+# CONFIG_RTC_PCF2127 is not set
+# CONFIG_RTC_DS1307 is not set
+# CONFIG_RTC_DS1337 is not set
+# CONFIG_RTC_DS1338 is not set
+# CONFIG_RTC_DS3231 is not set
+# CONFIG_RTC_EMULATION is not set
+# CONFIG_RTC_GOLDFISH is not set
+# CONFIG_RTC_ISL1208 is not set
+# CONFIG_RTC_PCF8563 is not set
+# CONFIG_RTC_PT7C4338 is not set
+# CONFIG_RTC_RV3028 is not set
+# CONFIG_RTC_RV3029 is not set
+# CONFIG_RTC_RV8803 is not set
+# CONFIG_RTC_RX8010SJ is not set
+# CONFIG_RTC_RX8025 is not set
+# CONFIG_RTC_PL031 is not set
+# CONFIG_RTC_MV is not set
+# CONFIG_RTC_S35392A is not set
+CONFIG_RTC_MC146818=y
+# CONFIG_RTC_M41T62 is not set
+# CONFIG_RTC_STM32 is not set
+# CONFIG_RTC_ABX80X is not set
+# CONFIG_RTC_HT1380 is not set
+CONFIG_SCSI=y
+CONFIG_SERIAL=y
+CONFIG_BAUDRATE=115200
+# CONFIG_DEFAULT_ENV_IS_RW is not set
+CONFIG_REQUIRE_SERIAL_CONSOLE=y
+# CONFIG_SPECIFY_CONSOLE_INDEX is not set
+CONFIG_SERIAL_PRESENT=y
+CONFIG_SPL_SERIAL_PRESENT=y
+CONFIG_DM_SERIAL=y
+# CONFIG_SERIAL_RX_BUFFER is not set
+# CONFIG_SERIAL_PUTS is not set
+# CONFIG_SERIAL_SEARCH_ALL is not set
+# CONFIG_SERIAL_PROBE_ALL is not set
+CONFIG_SPL_DM_SERIAL=y
+# CONFIG_VPL_DM_SERIAL is not set
+# CONFIG_ALTERA_JTAG_UART is not set
+# CONFIG_ALTERA_UART is not set
+# CONFIG_ARC_SERIAL is not set
+# CONFIG_ATMEL_USART is not set
+# CONFIG_BCM6345_SERIAL is not set
+CONFIG_COREBOOT_SERIAL=y
+CONFIG_COREBOOT_SERIAL_FROM_DBG2=y
+# CONFIG_CORTINA_UART is not set
+# CONFIG_FSL_LINFLEXUART is not set
+# CONFIG_FSL_LPUART is not set
+# CONFIG_MVEBU_A3700_UART is not set
+# CONFIG_MCFUART is not set
+# CONFIG_NULLDEV_SERIAL is not set
+CONFIG_SYS_NS16550=y
+CONFIG_NS16550_DYNAMIC=y
+CONFIG_SYS_NS16550_MEM32=y
+# CONFIG_SYS_NS16550_PORT_MAPPED is not set
+# CONFIG_PL01X_SERIAL is not set
+# CONFIG_ROCKCHIP_SERIAL is not set
+# CONFIG_XILINX_UARTLITE is not set
+# CONFIG_MSM_SERIAL is not set
+# CONFIG_MSM_GENI_SERIAL is not set
+# CONFIG_MXS_AUART_SERIAL is not set
+# CONFIG_OMAP_SERIAL is not set
+# CONFIG_SIFIVE_SERIAL is not set
+# CONFIG_ZYNQ_SERIAL is not set
+# CONFIG_MTK_SERIAL is not set
+# CONFIG_MT7620_SERIAL is not set
+# CONFIG_NPCM_SERIAL is not set
+# CONFIG_SM is not set
+# CONFIG_MESON_SM is not set
+# CONFIG_SMEM is not set
+
+#
+# Sound support
+#
+CONFIG_SOUND=y
+# CONFIG_I2S is not set
+# CONFIG_SOUND_DA7219 is not set
+CONFIG_SOUND_I8254=y
+# CONFIG_SOUND_INTEL_HDA is not set
+# CONFIG_SOUND_IVYBRIDGE is not set
+# CONFIG_SOUND_MAX98357A is not set
+# CONFIG_SOUND_RT5677 is not set
+
+#
+# SOC (System On Chip) specific Drivers
+#
+# CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_SAMSUNG is not set
+# CONFIG_SOC_TI is not set
+# CONFIG_SPI is not set
+
+#
+# SPMI support
+#
+# CONFIG_SPMI is not set
+CONFIG_SYSINFO=y
+CONFIG_SYSINFO_EXTRA=y
+# CONFIG_SPL_SYSINFO is not set
+# CONFIG_SYSINFO_GAZERBEAM is not set
+# CONFIG_SYSINFO_SANDBOX is not set
+# CONFIG_SYSINFO_SMBIOS is not set
+# CONFIG_SYSINFO_GPIO is not set
+
+#
+# System reset device drivers
+#
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_CMD_RESET=y
+# CONFIG_SYSRESET_CV1800B is not set
+# CONFIG_POWEROFF_GPIO is not set
+# CONFIG_SYSRESET_GPIO is not set
+# CONFIG_SYSRESET_SYSCON is not set
+# CONFIG_SYSRESET_WATCHDOG is not set
+# CONFIG_SYSRESET_RESETCTL is not set
+CONFIG_SYSRESET_X86=y
+# CONFIG_SYSRESET_SPL_X86 is not set
+# CONFIG_SYSRESET_TPL_X86 is not set
+# CONFIG_SYSRESET_MPC83XX is not set
+# CONFIG_DM_THERMAL is not set
+
+#
+# Timer Support
+#
+CONFIG_TIMER=y
+CONFIG_SPL_TIMER=y
+# CONFIG_TIMER_EARLY is not set
+# CONFIG_ALTERA_TIMER is not set
+# CONFIG_AST_TIMER is not set
+# CONFIG_ATCPIT100_TIMER is not set
+# CONFIG_ATMEL_PIT_TIMER is not set
+# CONFIG_SPL_ATMEL_PIT_TIMER is not set
+# CONFIG_CADENCE_TTC_TIMER is not set
+# CONFIG_DESIGNWARE_APB_TIMER is not set
+# CONFIG_FTTMR010_TIMER is not set
+# CONFIG_GXP_TIMER is not set
+# CONFIG_MPC83XX_TIMER is not set
+# CONFIG_RENESAS_OSTM_TIMER is not set
+# CONFIG_NOMADIK_MTU_TIMER is not set
+# CONFIG_NPCM_TIMER is not set
+# CONFIG_OMAP_TIMER is not set
+# CONFIG_ORION_TIMER is not set
+# CONFIG_ROCKCHIP_TIMER is not set
+# CONFIG_SP804_TIMER is not set
+# CONFIG_STM32_TIMER is not set
+# CONFIG_TEGRA_TIMER is not set
+CONFIG_X86_TSC_TIMER=y
+CONFIG_X86_TSC_READ_BASE=y
+# CONFIG_MTK_TIMER is not set
+# CONFIG_MCHP_PIT64B_TIMER is not set
+# CONFIG_IMX_GPT_TIMER is not set
+# CONFIG_XILINX_TIMER is not set
+# CONFIG_STARFIVE_TIMER is not set
+
+#
+# TPM support
+#
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_SPL_DM_USB=y
+# CONFIG_DM_USB_GADGET is not set
+# CONFIG_SPL_DM_USB_GADGET is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_HOST=y
+# CONFIG_SPL_USB_HOST is not set
+CONFIG_USB_XHCI_HCD=y
+# CONFIG_USB_XHCI_DWC3 is not set
+# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
+CONFIG_USB_XHCI_PCI=y
+# CONFIG_USB_XHCI_FSL is not set
+# CONFIG_USB_XHCI_BRCM is not set
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_MSM is not set
+CONFIG_USB_EHCI_PCI=y
+# CONFIG_USB_EHCI_ZYNQ is not set
+# CONFIG_USB_EHCI_GENERIC is not set
+# CONFIG_USB_EHCI_FSL is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_DWC2 is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_ISP1760 is not set
+# CONFIG_USB_CDNS3 is not set
+# CONFIG_USB_DWC3 is not set
+
+#
+# Legacy MUSB Support
+#
+# CONFIG_USB_MUSB_HCD is not set
+# CONFIG_USB_MUSB_UDC is not set
+
+#
+# MUSB Controller Driver
+#
+# CONFIG_USB_MUSB_HOST is not set
+# CONFIG_USB_MUSB_PIO_ONLY is not set
+
+#
+# USB Phy
+#
+# CONFIG_TWL4030_USB is not set
+# CONFIG_ROCKCHIP_USB2_PHY is not set
+
+#
+# ULPI drivers
+#
+
+#
+# USB peripherals
+#
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+# CONFIG_USB_ONBOARD_HUB is not set
+CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=1000
+CONFIG_USB_KEYBOARD_FN_KEYS=y
+CONFIG_SYS_USB_EVENT_POLL=y
+# CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE is not set
+# CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is not set
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+# CONFIG_USB_ETHER_ASIX88179 is not set
+# CONFIG_USB_ETHER_LAN75XX is not set
+# CONFIG_USB_ETHER_LAN78XX is not set
+# CONFIG_USB_ETHER_MCS7830 is not set
+# CONFIG_USB_ETHER_RTL8152 is not set
+CONFIG_USB_ETHER_SMSC95XX=y
+# CONFIG_USB_GADGET is not set
+# CONFIG_SPL_USB_GADGET is not set
+
+#
+# UFS Host Controller Support
+#
+# CONFIG_UFS is not set
+# CONFIG_TI_J721E_UFS is not set
+
+#
+# Graphics support
+#
+CONFIG_VIDEO=y
+# CONFIG_VIDEO_FONT_4X6 is not set
+CONFIG_VIDEO_FONT_8X16=y
+# CONFIG_VIDEO_FONT_SUN12X22 is not set
+# CONFIG_VIDEO_FONT_16X32 is not set
+CONFIG_VIDEO_LOGO=y
+CONFIG_BACKLIGHT=y
+CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x1000000
+CONFIG_VIDEO_COPY=y
+# CONFIG_BACKLIGHT_GPIO is not set
+CONFIG_VIDEO_BPP8=y
+CONFIG_VIDEO_BPP16=y
+CONFIG_VIDEO_BPP32=y
+CONFIG_VIDEO_ANSI=y
+# CONFIG_VIDEO_MIPI_DSI is not set
+CONFIG_CONSOLE_NORMAL=y
+# CONFIG_CONSOLE_ROTATION is not set
+CONFIG_CONSOLE_TRUETYPE=y
+CONFIG_CONSOLE_TRUETYPE_SIZE=18
+CONFIG_CONSOLE_TRUETYPE_MAX_METRICS=10
+CONFIG_SYS_WHITE_ON_BLACK=y
+# CONFIG_NO_FB_CLEAR is not set
+CONFIG_PANEL=y
+CONFIG_SIMPLE_PANEL=y
+# CONFIG_PANEL_HX8238D is not set
+
+#
+# TrueType Fonts
+#
+CONFIG_CONSOLE_TRUETYPE_NIMBUS=y
+# CONFIG_CONSOLE_TRUETYPE_ANKACODER is not set
+# CONFIG_CONSOLE_TRUETYPE_RUFSCRIPT is not set
+# CONFIG_CONSOLE_TRUETYPE_CANTORAONE is not set
+# CONFIG_VIDCONSOLE_AS_LCD is not set
+# CONFIG_VIDEO_BOCHS is not set
+CONFIG_VIDEO_COREBOOT=y
+# CONFIG_VIDEO_VESA is not set
+# CONFIG_VIDEO_LCD_ANX9804 is not set
+# CONFIG_ATMEL_LCD_BGR555 is not set
+# CONFIG_VIDEO_BCM2835 is not set
+# CONFIG_VIDEO_LCD_ENDEAVORU is not set
+# CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
+# CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
+# CONFIG_VIDEO_LCD_LG_LD070WX3 is not set
+# CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
+# CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
+# CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
+# CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set
+# CONFIG_VIDEO_LCD_SSD2828 is not set
+# CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
+# CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
+# CONFIG_VIDEO_MESON is not set
+# CONFIG_VIDEO_MVEBU is not set
+# CONFIG_I2C_EDID is not set
+# CONFIG_DISPLAY is not set
+# CONFIG_ATMEL_HLCD is not set
+# CONFIG_BACKLIGHT_LM3533 is not set
+# CONFIG_AM335X_LCD is not set
+# CONFIG_VIDEO_EXYNOS is not set
+# CONFIG_VIDEO_BROADWELL_IGD is not set
+# CONFIG_VIDEO_IVYBRIDGE_IGD is not set
+# CONFIG_VIDEO_ROCKCHIP is not set
+# CONFIG_VIDEO_ARM_MALIDP is not set
+# CONFIG_VIDEO_STM32 is not set
+# CONFIG_VIDEO_TIDSS is not set
+# CONFIG_VIDEO_TEGRA124 is not set
+# CONFIG_VIDEO_BRIDGE is not set
+# CONFIG_VIDEO_BRIDGE_PARADE_DP501 is not set
+# CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825 is not set
+# CONFIG_VIDEO_BRIDGE_TOSHIBA_TC358768 is not set
+# CONFIG_VIDEO_TEGRA20 is not set
+# CONFIG_VIDEO_DSI_TEGRA30 is not set
+# CONFIG_TEGRA_BACKLIGHT_PWM is not set
+# CONFIG_VIDEO_MXS is not set
+# CONFIG_VIDEO_SEPS525 is not set
+CONFIG_CONSOLE_SCROLL_LINES=5
+# CONFIG_VIDEO_SIMPLE is not set
+# CONFIG_VIDEO_DT_SIMPLEFB is not set
+# CONFIG_VIDEO_MCDE_SIMPLE is not set
+# CONFIG_OSD is not set
+# CONFIG_VIDEO_REMOVE is not set
+# CONFIG_SPLASH_SCREEN is not set
+# CONFIG_BMP is not set
+CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
+CONFIG_VIDEO_BMP_RLE8=y
+# CONFIG_BMP_16BPP is not set
+# CONFIG_BMP_24BPP is not set
+# CONFIG_BMP_32BPP is not set
+# CONFIG_SPL_VIDEO is not set
+
+#
+# VirtIO Drivers
+#
+# CONFIG_VIRTIO_MMIO is not set
+# CONFIG_VIRTIO_PCI is not set
+# CONFIG_VIRTIO_PCI_LEGACY is not set
+
+#
+# 1-Wire support
+#
+# CONFIG_W1 is not set
+
+#
+# 1-wire EEPROM support
+#
+# CONFIG_W1_EEPROM is not set
+
+#
+# Watchdog Timer Support
+#
+# CONFIG_WATCHDOG is not set
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
+# CONFIG_IMX_WATCHDOG is not set
+# CONFIG_ULP_WATCHDOG is not set
+# CONFIG_WDT is not set
+# CONFIG_SPL_WDT is not set
+# CONFIG_PHYS_TO_BUS is not set
+
+#
+# File systems
+#
+# CONFIG_FS_BTRFS is not set
+CONFIG_FS_CBFS=y
+# CONFIG_SPL_FS_CBFS is not set
+CONFIG_FS_EXT4=y
+CONFIG_EXT4_WRITE=y
+CONFIG_FS_FAT=y
+CONFIG_FAT_WRITE=y
+CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
+# CONFIG_FS_JFFS2 is not set
+# CONFIG_UBIFS_SILENCE_MSG is not set
+# CONFIG_UBIFS_SILENCE_DEBUG_DUMP is not set
+# CONFIG_FS_CRAMFS is not set
+# CONFIG_YAFFS2 is not set
+# CONFIG_FS_SQUASHFS is not set
+# CONFIG_FS_EROFS is not set
+
+#
+# Library routines
+#
+# CONFIG_ADDR_MAP is not set
+# CONFIG_SYS_TIMER_COUNTS_DOWN is not set
+CONFIG_PHYSMEM=y
+# CONFIG_BCH is not set
+CONFIG_BINMAN_FDT=y
+# CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set
+CONFIG_CHARSET=y
+# CONFIG_DYNAMIC_CRC_TABLE is not set
+CONFIG_HAVE_ARCH_IOMAP=y
+CONFIG_HAVE_PRIVATE_LIBGCC=y
+CONFIG_LIB_UUID=y
+# CONFIG_RANDOM_UUID is not set
+CONFIG_PRINTF=y
+CONFIG_SPL_PRINTF=y
+CONFIG_SPRINTF=y
+CONFIG_SPL_SPRINTF=y
+CONFIG_STRTO=y
+CONFIG_SPL_STRTO=y
+CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_SYS_HZ=1000
+CONFIG_SPL_USE_TINY_PRINTF=y
+# CONFIG_PANIC_HANG is not set
+CONFIG_REGEX=y
+CONFIG_LIB_RAND=y
+# CONFIG_LIB_HW_RAND is not set
+CONFIG_SUPPORT_ACPI=y
+CONFIG_ACPI=y
+CONFIG_SPL_ACPI=y
+# CONFIG_GENERATE_ACPI_TABLE is not set
+# CONFIG_SPL_TINY_MEMSET is not set
+# CONFIG_BITREVERSE is not set
+# CONFIG_TRACE is not set
+# CONFIG_CIRCBUF is not set
+CONFIG_CMD_DHRYSTONE=y
+
+#
+# Security support
+#
+# CONFIG_AES is not set
+# CONFIG_ECDSA is not set
+CONFIG_RSA=y
+# CONFIG_SPL_RSA is not set
+CONFIG_RSA_VERIFY=y
+# CONFIG_RSA_VERIFY_WITH_PKEY is not set
+# CONFIG_SPL_RSA_VERIFY_WITH_PKEY is not set
+CONFIG_RSA_SOFTWARE_EXP=y
+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
+# CONFIG_TPM is not set
+# CONFIG_SPL_TPM is not set
+
+#
+# Android Verified Boot
+#
+
+#
+# Hashing Support
+#
+# CONFIG_BLAKE2 is not set
+CONFIG_SHA1=y
+CONFIG_SHA256=y
+# CONFIG_SHA512 is not set
+# CONFIG_SHA384 is not set
+# CONFIG_SHA_HW_ACCEL is not set
+# CONFIG_SPL_CRC32 is not set
+CONFIG_SPL_SHA1=y
+CONFIG_SPL_SHA256=y
+# CONFIG_SPL_SHA512 is not set
+# CONFIG_SPL_SHA384 is not set
+# CONFIG_SPL_SHA_HW_ACCEL is not set
+CONFIG_MD5=y
+# CONFIG_SPL_MD5 is not set
+CONFIG_CRC8=y
+# CONFIG_SPL_CRC8 is not set
+# CONFIG_SPL_CRC16 is not set
+CONFIG_CRC32=y
+
+#
+# Compression Support
+#
+# CONFIG_LZ4 is not set
+# CONFIG_LZMA is not set
+# CONFIG_LZO is not set
+# CONFIG_GZIP is not set
+# CONFIG_ZLIB_UNCOMPRESS is not set
+# CONFIG_BZIP2 is not set
+CONFIG_ZLIB=y
+# CONFIG_ZSTD is not set
+# CONFIG_SPL_BZIP2 is not set
+# CONFIG_SPL_LZ4 is not set
+# CONFIG_SPL_LZMA is not set
+# CONFIG_VPL_LZMA is not set
+# CONFIG_SPL_LZO is not set
+# CONFIG_SPL_GZIP is not set
+# CONFIG_SPL_ZSTD is not set
+# CONFIG_ERRNO_STR is not set
+# CONFIG_HEXDUMP is not set
+# CONFIG_GETOPT is not set
+CONFIG_OF_LIBFDT=y
+CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
+CONFIG_SYS_FDT_PAD=0x3000
+CONFIG_SPL_OF_LIBFDT=y
+CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff
+# CONFIG_LIB_RATIONAL is not set
+# CONFIG_SPL_LIB_RATIONAL is not set
+CONFIG_SMBIOS=y
+CONFIG_SMBIOS_PARSER=y
+# CONFIG_EFI is not set
+CONFIG_EFI_LOADER=y
+CONFIG_EFI_BINARY_EXEC=y
+CONFIG_EFI_BOOTMGR=y
+CONFIG_EFI_VARIABLE_FILE_STORE=y
+# CONFIG_EFI_RT_VOLATILE_STORE is not set
+# CONFIG_EFI_VARIABLE_NO_STORE is not set
+# CONFIG_EFI_VARIABLES_PRESEED is not set
+CONFIG_EFI_VAR_BUF_SIZE=131072
+CONFIG_EFI_GET_TIME=y
+# CONFIG_EFI_SET_TIME is not set
+# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
+# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
+# CONFIG_EFI_CAPSULE_ON_DISK is not set
+CONFIG_EFI_CAPSULE_MAX=15
+CONFIG_EFI_DEVICE_PATH_TO_TEXT=y
+CONFIG_EFI_DEVICE_PATH_UTIL=y
+CONFIG_EFI_DT_FIXUP=y
+CONFIG_EFI_LOADER_HII=y
+CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y
+CONFIG_EFI_UNICODE_CAPITALIZATION=y
+CONFIG_EFI_PLATFORM_LANG_CODES="en-US"
+CONFIG_EFI_HAVE_RUNTIME_RESET=y
+CONFIG_EFI_LOAD_FILE2_INITRD=y
+# CONFIG_EFI_SECURE_BOOT is not set
+CONFIG_EFI_ECPT=y
+CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
+# CONFIG_EFI_HTTP_BOOT is not set
+# CONFIG_OPTEE_LIB is not set
+# CONFIG_OPTEE_IMAGE is not set
+# CONFIG_BOOTM_OPTEE is not set
+# CONFIG_TEST_FDTDEC is not set
+CONFIG_LIB_DATE=y
+CONFIG_LIB_ELF=y
+CONFIG_LMB=y
+CONFIG_LMB_USE_MAX_REGIONS=y
+CONFIG_LMB_MAX_REGIONS=16
+# CONFIG_PHANDLE_CHECK_SEQ is not set
+
+#
+# Testing
+#
+# CONFIG_UNIT_TEST is not set
+# CONFIG_SPL_UNIT_TEST is not set
+# CONFIG_POST is not set
+
+#
+# Tools options
+#
+CONFIG_MKIMAGE_DTC_PATH="dtc"
+CONFIG_TOOLS_CRC32=y
+CONFIG_TOOLS_LIBCRYPTO=y
+CONFIG_TOOLS_KWBIMAGE=y
+CONFIG_TOOLS_FIT=y
+CONFIG_TOOLS_FIT_FULL_CHECK=y
+CONFIG_TOOLS_FIT_PRINT=y
+CONFIG_TOOLS_FIT_RSASSA_PSS=y
+CONFIG_TOOLS_FIT_SIGNATURE=y
+CONFIG_TOOLS_FIT_SIGNATURE_MAX_SIZE=0x10000000
+CONFIG_TOOLS_FIT_VERBOSE=y
+CONFIG_TOOLS_MD5=y
+CONFIG_TOOLS_OF_LIBFDT=y
+CONFIG_TOOLS_SHA1=y
+CONFIG_TOOLS_SHA256=y
+CONFIG_TOOLS_SHA384=y
+CONFIG_TOOLS_SHA512=y
+# CONFIG_TOOLS_MKEFICAPSULE is not set
+# CONFIG_FSPI_CONF_HEADER is not set
+# CONFIG_TOOLS_MKFWUMDATA is not set
diff --git a/config/u-boot/amd64coreboot/target.cfg b/config/u-boot/amd64coreboot/target.cfg
new file mode 100644
index 00000000..80e024ea
--- /dev/null
+++ b/config/u-boot/amd64coreboot/target.cfg
@@ -0,0 +1,5 @@
+tree="x86_64"
+# test building with x86_64 hostcc by commenting these:
+# xtree="default" # coreboot tree containing crossgcc
+# xarch="x86_64-elf"
+# or uncomment them to use crossgcc(buggy)
diff --git a/config/u-boot/x86_64/nuke.list b/config/u-boot/x86_64/nuke.list
new file mode 100644
index 00000000..f3a3fcc3
--- /dev/null
+++ b/config/u-boot/x86_64/nuke.list
@@ -0,0 +1 @@
+test/lib/strlcat.c
diff --git a/config/u-boot/x86_64/target.cfg b/config/u-boot/x86_64/target.cfg
new file mode 100644
index 00000000..dd554fcb
--- /dev/null
+++ b/config/u-boot/x86_64/target.cfg
@@ -0,0 +1,2 @@
+tree="x86_64"
+rev="3f772959501c99fbe5aa0b22a36efe3478d1ae1c" # v2024.07
diff --git a/include/lib.sh b/include/lib.sh
index 9a5faabb..e439ef8b 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -213,7 +213,7 @@ cbfs()
 	fAdd="$2" # file to add
 	fName="$3" # filename when added in CBFS
 
-	ccmd="add-payload" && [ $# -gt 3 ] && ccmd="add"
+	ccmd="add-payload" && [ $# -gt 3 ] && [ $# -lt 5 ] && ccmd="add"
 	lzma="-c lzma" && [ $# -gt 3 ] && [ $# -lt 5 ] && lzma="-t $4"
 
 	# hack. TODO: do it better. this whole function is cursed
diff --git a/include/rom.sh b/include/rom.sh
index d04e9ee4..808f83a4 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -98,11 +98,21 @@ mkcorebootbin()
 	[ -n "$displaymode" ] && displaymode="_$displaymode"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 
+	[ "$payload_uboot_i386" = "y" ] && \
+	    [ "$payload_uboot_amd64" = "y" ] && \
+		$err "'$target' enables 32- and 64-bit x86 U-Boot"
+
+	if [ "$payload_uboot_i386" = "y" ] || \
+	    [ "$payload_uboot_amd64" = "y" ]; then
+		printf "'$target' has x86 U-Boot; assuming SeaBIOS=y\n" 1>&2
+		payload_seabios="y"
+	fi
+
 	[ -n "$uboot_config" ] || uboot_config="default"
 	[ "$payload_uboot" = "y" ] || payload_seabios="y"
 	[ "$payload_grub" = "y" ] && payload_seabios="y"
 	[ "$payload_seabios" = "y" ] && [ "$payload_uboot" = "y" ] && \
-	    $dry $err "$target: U-Boot and SeaBIOS/GRUB are both enabled."
+	    $dry $err "$target: U-Boot(arm64) and SeaBIOS/GRUB both enabled."
 
 	[ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata"
 
@@ -137,7 +147,10 @@ add_seabios()
 	[ "$payload_memtest" = "y" ] && cbfs "$tmprom" \
 	    "elf/memtest86plus/memtest.bin" img/memtest
 
-	[ "$payload_uboot_i386" = "y" ] && $dry add_uboot
+	if [ "$payload_uboot_i386" = "y" ] || \
+	    [ "$payload_uboot_amd64" = "y" ]; then
+		$dry add_uboot
+	fi
 
 	[ "$payload_grub" = "y" ] && add_grub
 
@@ -165,20 +178,29 @@ add_uboot()
 	# TODO: re-work to allow each coreboot target to say which ub tree
 	# instead of hardcoding as in the current logic below:
 
+	# aarch64 targets:
 	ubcbfsargs=""
-	[ "$payload_uboot_i386" = "y" ] && \
-	    ubcbfsargs="-l 0x1110000 -e 0x1110000"
-
 	ubpath="fallback/payload"
-	[ "$payload_uboot_i386" = "y" ] && ubpath="u-boot"
-
 	ubtarget="$target"
-	[ "$payload_uboot_i386" = "y" ] && ubtarget="i386coreboot"
+	# override for x86/x86_64 targets:
+	if [ "$payload_uboot_i386" = "y" ] || \
+	    [ "$payload_uboot_amd64" = "y" ]; then
+		ubcbfsargs="-l 0x1110000 -e 0x1110000" # 64-bit and 32-bit
+			# on 64-bit, 0x1120000 is the SPL, and stub before that
+		ubpath="img/u-boot"
+		ubtarget="amd64coreboot"
+		[ "$payload_uboot_i386" = "y" ] && ubtarget="i386coreboot"; :
+	fi
 
 	ubdir="elf/u-boot/$ubtarget/$uboot_config"
+
+	# aarch64 targets:
 	ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \
 	    ubootelf="$ubdir/u-boot"
+	# override for x86/x86_64 targets:
 	[ "$payload_uboot_i386" = "y" ] && ubootelf="$ubdir/u-boot-dtb.bin"
+	[ "$payload_uboot_amd64" = "y" ] && \
+	    ubootelf="$ubdir/u-boot-x86-with-spl.bin" # EFI-compatible
 
 	[ -f "$ubootelf" ] || $err "cb/$ubtarget: Can't find u-boot"
 	cbfs "$tmprom" "$ubootelf" "$ubpath" $ubcbfsargs; cprom

From f13819386bf35f081eecbacea965549b7df75e24 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Nov 2024 02:04:57 +0000
Subject: [PATCH 0871/1549] Enable x86 U-Boot payload on every x86 board

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/dell3050micro_fsp_16mb/target.cfg   | 3 ++-
 config/coreboot/dell7010sff_12mb/target.cfg         | 3 ++-
 config/coreboot/dell780mt_8mb/target.cfg            | 3 ++-
 config/coreboot/dell780mt_truncate_8mb/target.cfg   | 3 ++-
 config/coreboot/dell780usff_8mb/target.cfg          | 3 ++-
 config/coreboot/dell780usff_truncate_8mb/target.cfg | 3 ++-
 config/coreboot/dell9020mt_nri_12mb/target.cfg      | 3 ++-
 config/coreboot/dell9020sff_nri_12mb/target.cfg     | 3 ++-
 config/coreboot/e4300_4mb/target.cfg                | 1 +
 config/coreboot/e5420_6mb/target.cfg                | 1 +
 config/coreboot/e5520_6mb/target.cfg                | 1 +
 config/coreboot/e5530_12mb/target.cfg               | 1 +
 config/coreboot/e6220_10mb/target.cfg               | 1 +
 config/coreboot/e6230_12mb/target.cfg               | 2 ++
 config/coreboot/e6320_10mb/target.cfg               | 1 +
 config/coreboot/e6330_12mb/target.cfg               | 1 +
 config/coreboot/e6400_4mb/target.cfg                | 1 +
 config/coreboot/e6400nvidia_4mb/target.cfg          | 1 +
 config/coreboot/e6420_10mb/target.cfg               | 1 +
 config/coreboot/e6430_12mb/target.cfg               | 1 +
 config/coreboot/e6520_10mb/target.cfg               | 1 +
 config/coreboot/e6530_12mb/target.cfg               | 1 +
 config/coreboot/g43t_am3/target.cfg                 | 3 ++-
 config/coreboot/g43t_am3_16mb/target.cfg            | 3 ++-
 config/coreboot/hp2170p_16mb/target.cfg             | 1 +
 config/coreboot/hp2560p_8mb/target.cfg              | 1 +
 config/coreboot/hp2570p_16mb/target.cfg             | 1 +
 config/coreboot/hp8200sff_4mb/target.cfg            | 3 ++-
 config/coreboot/hp8200sff_8mb/target.cfg            | 3 ++-
 config/coreboot/hp820g2_12mb/target.cfg             | 3 ++-
 config/coreboot/hp8300cmt_16mb/target.cfg           | 3 ++-
 config/coreboot/hp8300usdt_16mb/target.cfg          | 1 +
 config/coreboot/hp8460pintel_8mb/target.cfg         | 1 +
 config/coreboot/hp8470pintel_16mb/target.cfg        | 1 +
 config/coreboot/hp8560w_8mb/target.cfg              | 1 +
 config/coreboot/hp9470m_16mb/target.cfg             | 1 +
 config/coreboot/kcma_d8_16mb/target.cfg             | 3 ++-
 config/coreboot/kcma_d8_2mb/target.cfg              | 3 ++-
 config/coreboot/kfsn4_dre_1mb/target.cfg            | 3 ++-
 config/coreboot/kfsn4_dre_2mb/target.cfg            | 1 +
 config/coreboot/kgpe_d16_16mb/target.cfg            | 3 ++-
 config/coreboot/kgpe_d16_2mb/target.cfg             | 3 ++-
 config/coreboot/macbook11/target.cfg                | 3 ++-
 config/coreboot/macbook11_16mb/target.cfg           | 3 ++-
 config/coreboot/macbook21/target.cfg                | 1 +
 config/coreboot/macbook21_16mb/target.cfg           | 1 +
 config/coreboot/qemu_x86_12mb/target.cfg            | 1 +
 config/coreboot/r400_16mb/target.cfg                | 1 +
 config/coreboot/r400_4mb/target.cfg                 | 1 +
 config/coreboot/r400_8mb/target.cfg                 | 1 +
 config/coreboot/r500_4mb/target.cfg                 | 1 +
 config/coreboot/t1650_12mb/target.cfg               | 3 ++-
 config/coreboot/t400_16mb/target.cfg                | 1 +
 config/coreboot/t400_4mb/target.cfg                 | 1 +
 config/coreboot/t400_8mb/target.cfg                 | 1 +
 config/coreboot/t420_8mb/target.cfg                 | 1 +
 config/coreboot/t420s_8mb/target.cfg                | 1 +
 config/coreboot/t430_12mb/target.cfg                | 1 +
 config/coreboot/t440plibremrc_12mb/target.cfg       | 3 ++-
 config/coreboot/t500_16mb/target.cfg                | 1 +
 config/coreboot/t500_4mb/target.cfg                 | 1 +
 config/coreboot/t500_8mb/target.cfg                 | 1 +
 config/coreboot/t520_8mb/target.cfg                 | 1 +
 config/coreboot/t530_12mb/target.cfg                | 1 +
 config/coreboot/t60_16mb_intelgpu/target.cfg        | 3 ++-
 config/coreboot/t60_intelgpu/target.cfg             | 3 ++-
 config/coreboot/w500_16mb/target.cfg                | 1 +
 config/coreboot/w500_4mb/target.cfg                 | 1 +
 config/coreboot/w500_8mb/target.cfg                 | 1 +
 config/coreboot/w530_12mb/target.cfg                | 1 +
 config/coreboot/w541_12mb/target.cfg                | 3 ++-
 config/coreboot/x200_16mb/target.cfg                | 1 +
 config/coreboot/x200_4mb/target.cfg                 | 1 +
 config/coreboot/x200_8mb/target.cfg                 | 1 +
 config/coreboot/x220_8mb/target.cfg                 | 1 +
 config/coreboot/x230_12mb/target.cfg                | 1 +
 config/coreboot/x230_16mb/target.cfg                | 1 +
 config/coreboot/x230t_12mb/target.cfg               | 1 +
 config/coreboot/x230t_16mb/target.cfg               | 1 +
 config/coreboot/x301_16mb/target.cfg                | 1 +
 config/coreboot/x301_4mb/target.cfg                 | 1 +
 config/coreboot/x301_8mb/target.cfg                 | 1 +
 config/coreboot/x60/target.cfg                      | 3 ++-
 config/coreboot/x60_16mb/target.cfg                 | 3 ++-
 84 files changed, 113 insertions(+), 28 deletions(-)

diff --git a/config/coreboot/dell3050micro_fsp_16mb/target.cfg b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
index d6bd3872..8ab796e4 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/target.cfg
+++ b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
@@ -6,5 +6,6 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="3050micro"
-build_depend="seabios/default grub/xhci memtest86plus"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
 IFD_platform="sklkbl"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/dell7010sff_12mb/target.cfg b/config/coreboot/dell7010sff_12mb/target.cfg
index abc1d14e..aa08547a 100644
--- a/config/coreboot/dell7010sff_12mb/target.cfg
+++ b/config/coreboot/dell7010sff_12mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="t1650"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/dell780mt_8mb/target.cfg b/config/coreboot/dell780mt_8mb/target.cfg
index eca44aa2..50ea82b6 100644
--- a/config/coreboot/dell780mt_8mb/target.cfg
+++ b/config/coreboot/dell780mt_8mb/target.cfg
@@ -5,4 +5,5 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/dell780mt_truncate_8mb/target.cfg b/config/coreboot/dell780mt_truncate_8mb/target.cfg
index eca44aa2..50ea82b6 100644
--- a/config/coreboot/dell780mt_truncate_8mb/target.cfg
+++ b/config/coreboot/dell780mt_truncate_8mb/target.cfg
@@ -5,4 +5,5 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/dell780usff_8mb/target.cfg b/config/coreboot/dell780usff_8mb/target.cfg
index eca44aa2..50ea82b6 100644
--- a/config/coreboot/dell780usff_8mb/target.cfg
+++ b/config/coreboot/dell780usff_8mb/target.cfg
@@ -5,4 +5,5 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/dell780usff_truncate_8mb/target.cfg b/config/coreboot/dell780usff_truncate_8mb/target.cfg
index eca44aa2..50ea82b6 100644
--- a/config/coreboot/dell780usff_truncate_8mb/target.cfg
+++ b/config/coreboot/dell780usff_truncate_8mb/target.cfg
@@ -5,4 +5,5 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/dell9020mt_nri_12mb/target.cfg b/config/coreboot/dell9020mt_nri_12mb/target.cfg
index e7411d7f..5be15ac2 100644
--- a/config/coreboot/dell9020mt_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_nri_12mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
-build_depend="seabios/default grub/xhci memtest86plus"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/dell9020sff_nri_12mb/target.cfg b/config/coreboot/dell9020sff_nri_12mb/target.cfg
index e7411d7f..5be15ac2 100644
--- a/config/coreboot/dell9020sff_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_nri_12mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
-build_depend="seabios/default grub/xhci memtest86plus"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e4300_4mb/target.cfg b/config/coreboot/e4300_4mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/e4300_4mb/target.cfg
+++ b/config/coreboot/e4300_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6220_10mb/target.cfg b/config/coreboot/e6220_10mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/e6220_10mb/target.cfg
+++ b/config/coreboot/e6220_10mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6230_12mb/target.cfg b/config/coreboot/e6230_12mb/target.cfg
index 2556a4ce..5bd85905 100644
--- a/config/coreboot/e6230_12mb/target.cfg
+++ b/config/coreboot/e6230_12mb/target.cfg
@@ -5,3 +5,5 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6320_10mb/target.cfg b/config/coreboot/e6320_10mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/e6320_10mb/target.cfg
+++ b/config/coreboot/e6320_10mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6330_12mb/target.cfg b/config/coreboot/e6330_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/e6330_12mb/target.cfg
+++ b/config/coreboot/e6330_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index 98eb8d3b..a0b322d3 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="e6400"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
index 98eb8d3b..a0b322d3 100644
--- a/config/coreboot/e6400nvidia_4mb/target.cfg
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="e6400"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/g43t_am3/target.cfg b/config/coreboot/g43t_am3/target.cfg
index 7f3d7886..7bc27788 100644
--- a/config/coreboot/g43t_am3/target.cfg
+++ b/config/coreboot/g43t_am3/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/g43t_am3_16mb/target.cfg b/config/coreboot/g43t_am3_16mb/target.cfg
index 594b6612..bef863ee 100644
--- a/config/coreboot/g43t_am3_16mb/target.cfg
+++ b/config/coreboot/g43t_am3_16mb/target.cfg
@@ -4,4 +4,5 @@ payload_seabios="y"
 payload_memtest="y"
 release="n"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index f7544548..f12beab7 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2170p"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index a9dfe4e4..a3f8ba84 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2560p"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index 928527da..d899d7d9 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2570p"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 54966da1..8d18ae23 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="hp8200sff"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 54966da1..8d18ae23 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="hp8200sff"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index 99be701a..be150000 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -7,4 +7,5 @@ release="n"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="hp820g2"
-build_depend="seabios/default grub/xhci memtest86plus"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index d0e19b73..7cbc8dad 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="ivybridge"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index b39036ba..5897b9bc 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8460pintel"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index d960f36b..72e64b8a 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8470pintel"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg
index 7bad4889..dcdd1dc8 100644
--- a/config/coreboot/hp8560w_8mb/target.cfg
+++ b/config/coreboot/hp8560w_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8560w"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index 35a0a6fd..4580be7b 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp9470m"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/kcma_d8_16mb/target.cfg b/config/coreboot/kcma_d8_16mb/target.cfg
index 5f705f43..b0ab3d02 100644
--- a/config/coreboot/kcma_d8_16mb/target.cfg
+++ b/config/coreboot/kcma_d8_16mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/kcma_d8_2mb/target.cfg b/config/coreboot/kcma_d8_2mb/target.cfg
index 5f705f43..b0ab3d02 100644
--- a/config/coreboot/kcma_d8_2mb/target.cfg
+++ b/config/coreboot/kcma_d8_2mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/kfsn4_dre_1mb/target.cfg b/config/coreboot/kfsn4_dre_1mb/target.cfg
index 57e64580..c5759ac8 100644
--- a/config/coreboot/kfsn4_dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_1mb/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
-build_depend="seabios/default memtest86plus"
+build_depend="seabios/default memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/kfsn4_dre_2mb/target.cfg b/config/coreboot/kfsn4_dre_2mb/target.cfg
index 606962a2..94601104 100644
--- a/config/coreboot/kfsn4_dre_2mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_2mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 xlang="c"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/kgpe_d16_16mb/target.cfg b/config/coreboot/kgpe_d16_16mb/target.cfg
index 5f705f43..b0ab3d02 100644
--- a/config/coreboot/kgpe_d16_16mb/target.cfg
+++ b/config/coreboot/kgpe_d16_16mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/kgpe_d16_2mb/target.cfg b/config/coreboot/kgpe_d16_2mb/target.cfg
index 5f705f43..b0ab3d02 100644
--- a/config/coreboot/kgpe_d16_2mb/target.cfg
+++ b/config/coreboot/kgpe_d16_2mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index 9ceb99e8..2661c6b2 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
-build_depend="seabios/default grub/default"
+build_depend="seabios/default grub/default u-boot/i386coreboot"
+payload_uboot_i386="y"
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index a53a1668..e37b6307 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 scan_scan_disk="ahci"
-build_depend="seabios/default grub/default"
+build_depend="seabios/default grub/default u-boot/i386coreboot"
+payload_uboot_i386="y"
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg
index 2aae2da9..218f2fd4 100644
--- a/config/coreboot/qemu_x86_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_12mb/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_grub="y"
 payload_seabios="y"
 payload_memtest="y"
+build_depend="seabios/default grub/default memtest86plus u-boot/i386coreboot"
 payload_uboot_i386="y"
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index f596cc06..ba490833 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index abc1d14e..aa08547a 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="t1650"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index e7411d7f..5be15ac2 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
-build_depend="seabios/default grub/xhci memtest86plus"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 9ceb99e8..2661c6b2 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
-build_depend="seabios/default grub/default"
+build_depend="seabios/default grub/default u-boot/i386coreboot"
+payload_uboot_i386="y"
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 9ceb99e8..2661c6b2 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
-build_depend="seabios/default grub/default"
+build_depend="seabios/default grub/default u-boot/i386coreboot"
+payload_uboot_i386="y"
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index e7411d7f..5be15ac2 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
-build_depend="seabios/default grub/xhci memtest86plus"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/x230_12mb/target.cfg
+++ b/config/coreboot/x230_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/x230t_12mb/target.cfg
+++ b/config/coreboot/x230t_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index 16ffc818..a364653c 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index 16ffc818..a364653c 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index 16ffc818..a364653c 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 9ceb99e8..2661c6b2 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
-build_depend="seabios/default grub/default"
+build_depend="seabios/default grub/default u-boot/i386coreboot"
+payload_uboot_i386="y"
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 9ceb99e8..2661c6b2 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
-build_depend="seabios/default grub/default"
+build_depend="seabios/default grub/default u-boot/i386coreboot"
+payload_uboot_i386="y"

From 637c0a1521a03e3f65de85dcc5ffd478b37a5360 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Nov 2024 02:52:28 +0000
Subject: [PATCH 0872/1549] trees: unset CROSS_COMPILE per target

When building a coreboot image, if they enable the
x86 U-Boot payloads, sometimes what happens is you
have CROSS_COMPILE set, for i386-elf, but then it's
still set to that when later building 64-bit U-Boot,
which needs x86_64-elf.

We currently rely on hostcc to build U-Boot.

To mitigate this, unset CROSS_COMPILE in the main
loop of the trees script, for building project targets.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 1 +
 1 file changed, 1 insertion(+)

diff --git a/script/trees b/script/trees
index 726f7332..8f468d49 100755
--- a/script/trees
+++ b/script/trees
@@ -73,6 +73,7 @@ build_targets()
 	[ $# -gt 0 ] || targets="$(ls -1 "$configdir")" || $err "!o $configdir"
 
 	for x in $targets; do
+		unset CROSS_COMPILE
 		[ "$x" = "list" ] && x_ ls -1 "config/$project" && \
 		    listfile="" && break
 		target="$x"

From 709bbebdcf26d6e116ba759e93f089d7a03753f9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Nov 2024 04:55:46 +0000
Subject: [PATCH 0873/1549] grub.cfg: mark U-Boot as experimental in the menu

it's important that we maintain realistic expectations.
x86 u-boot is not yet fully stable, so mark it as such.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/default/config/payload | 2 +-
 config/grub/nvme/config/payload    | 2 +-
 config/grub/xhci/config/payload    | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/config/grub/default/config/payload b/config/grub/default/config/payload
index bd908bd9..21e12734 100644
--- a/config/grub/default/config/payload
+++ b/config/grub/default/config/payload
@@ -217,7 +217,7 @@ menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey=
 }
 fi
 if [ -f (cbfsdisk)/img/u-boot ]; then
-menuentry 'Load U-Boot (payload) [b]' --hotkey='u' {
+menuentry 'Highly experimental U-Boot payload [b]' --hotkey='u' {
 	set root='cbfsdisk'
 	chainloader /img/u-boot
 }
diff --git a/config/grub/nvme/config/payload b/config/grub/nvme/config/payload
index 5eb34368..50a46c05 100644
--- a/config/grub/nvme/config/payload
+++ b/config/grub/nvme/config/payload
@@ -235,7 +235,7 @@ menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey=
 }
 fi
 if [ -f (cbfsdisk)/img/u-boot ]; then
-menuentry 'Load U-Boot (payload) [b]' --hotkey='u' {
+menuentry 'Highly experimental U-Boot payload [b]' --hotkey='u' {
 	set root='cbfsdisk'
 	chainloader /img/u-boot
 }
diff --git a/config/grub/xhci/config/payload b/config/grub/xhci/config/payload
index 75d932ed..ee31a245 100644
--- a/config/grub/xhci/config/payload
+++ b/config/grub/xhci/config/payload
@@ -236,7 +236,7 @@ menuentry 'Load test configuration (grubtest.cfg) in CBFS  [t]' --hotkey='t' {
 }
 fi
 if [ -f (cbfsdisk)/img/u-boot ]; then
-menuentry 'Load U-Boot (payload) [b]' --hotkey='u' {
+menuentry 'Highly experimental U-Boot payload [b]' --hotkey='u' {
 	set root='cbfsdisk'
 	chainloader /img/u-boot
 }

From 6d629a8496ca1840a70218aba6970596f6a64a5d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Nov 2024 09:52:40 +0000
Subject: [PATCH 0874/1549] Update x86 U-Boot to v2024.10 (was v2024.07)

It's a new experimental payload in Libreboot, so we may aswell
start with the very latest release of U-Boot.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/u-boot/amd64coreboot/config/default | 35 ++++++++++++++--------
 config/u-boot/i386coreboot/config/default  | 35 +++++++++++++---------
 config/u-boot/x86/target.cfg               |  2 +-
 config/u-boot/x86_64/target.cfg            |  2 +-
 4 files changed, 45 insertions(+), 29 deletions(-)

diff --git a/config/u-boot/amd64coreboot/config/default b/config/u-boot/amd64coreboot/config/default
index 4c0585a7..fdd0ccf2 100644
--- a/config/u-boot/amd64coreboot/config/default
+++ b/config/u-boot/amd64coreboot/config/default
@@ -1,12 +1,13 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# U-Boot 2024.07 Configuration
+# U-Boot 2024.10 Configuration
 #
 
 #
 # Compiler: gcc (Debian 12.2.0-14) 12.2.0
 #
 CONFIG_CREATE_ARCH_SYMLINK=y
+CONFIG_SUPPORT_LITTLE_ENDIAN=y
 CONFIG_SYS_CACHE_SHIFT_6=y
 CONFIG_SYS_CACHELINE_SIZE=64
 CONFIG_LINKER_LIST_ALIGN=8
@@ -51,13 +52,13 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_SYS_MALLOC_F_LEN=0x800
 # CONFIG_SPL_HAS_BSS_LINKER_SECTION is not set
 # CONFIG_SPL_STACK_R is not set
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
 CONFIG_SPL_SYS_MALLOC_F=y
 CONFIG_ERR_PTR_OFFSET=0x0
 CONFIG_SPL_SIZE_LIMIT=0x0
 CONFIG_SPL=y
 CONFIG_PRE_CON_BUF_ADDR=0x100000
 CONFIG_PRE_CON_BUF_SZ=4096
-CONFIG_BOOTSTAGE_STASH_ADDR=0x0
 CONFIG_IDENT_STRING=""
 CONFIG_SYS_CLK_FREQ=0
 # CONFIG_SPL_FS_FAT is not set
@@ -132,6 +133,7 @@ CONFIG_COREBOOT_SYSINFO=y
 CONFIG_SPL_COREBOOT_SYSINFO=y
 CONFIG_ZBOOT=y
 # CONFIG_OF_BOARD_FIXUP is not set
+CONFIG_SYS_LITTLE_ENDIAN=y
 
 #
 # General setup
@@ -208,6 +210,7 @@ CONFIG_BOOTSTD_FULL=y
 CONFIG_BOOTSTD_DEFAULTS=y
 CONFIG_BOOTSTD_BOOTCOMMAND=y
 CONFIG_BOOTMETH_GLOBAL=y
+# CONFIG_BOOTMETH_ANDROID is not set
 CONFIG_BOOTMETH_CROS=y
 CONFIG_BOOTMETH_EXTLINUX=y
 CONFIG_BOOTMETH_EXTLINUX_PXE=y
@@ -236,7 +239,6 @@ CONFIG_SYS_BOOT_RAMDISK_HIGH=y
 # Boot timing
 #
 # CONFIG_BOOTSTAGE is not set
-CONFIG_BOOTSTAGE_STASH_SIZE=0x1000
 CONFIG_SHOW_BOOT_PROGRESS=y
 # CONFIG_SPL_SHOW_BOOT_PROGRESS is not set
 
@@ -341,7 +343,9 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
 #
 # Start-up hooks
 #
-# CONFIG_CYCLIC is not set
+CONFIG_CYCLIC=y
+# CONFIG_SPL_CYCLIC is not set
+CONFIG_CYCLIC_MAX_CPU_TIME_US=5000
 CONFIG_EVENT=y
 CONFIG_EVENT_DYNAMIC=y
 # CONFIG_EVENT_DEBUG is not set
@@ -393,6 +397,7 @@ CONFIG_SPL_SYS_STACK_F_CHECK_BYTE=0xaa
 # CONFIG_SPL_SHOW_ERRORS is not set
 CONFIG_SPL_BINMAN_SYMBOLS=y
 CONFIG_SPL_BINMAN_UBOOT_SYMBOLS=y
+# CONFIG_SPL_SOC_INIT is not set
 # CONFIG_SPL_BOARD_INIT is not set
 # CONFIG_SPL_BOOTROM_SUPPORT is not set
 CONFIG_SPL_RAW_IMAGE_SUPPORT=y
@@ -497,6 +502,7 @@ CONFIG_CMD_BOOTFLOW=y
 CONFIG_CMD_BOOTFLOW_FULL=y
 CONFIG_CMD_BOOTMETH=y
 CONFIG_BOOTM_EFI=y
+CONFIG_BOOTM_ELF=y
 # CONFIG_CMD_BOOTZ is not set
 CONFIG_BOOTM_LINUX=y
 CONFIG_BOOTM_NETBSD=y
@@ -520,7 +526,6 @@ CONFIG_CMD_FDT=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_RUN=y
 CONFIG_CMD_IMI=y
-# CONFIG_CMD_IMLS is not set
 CONFIG_CMD_XIMG=y
 # CONFIG_CMD_SPL is not set
 CONFIG_CMD_ZBOOT=y
@@ -572,14 +577,12 @@ CONFIG_CMD_RANDOM=y
 #
 # Device access commands
 #
-# CONFIG_CMD_ARMFLASH is not set
 # CONFIG_CMD_BCB is not set
 # CONFIG_CMD_BIND is not set
 # CONFIG_CMD_CLK is not set
 # CONFIG_CMD_DEMO is not set
 # CONFIG_CMD_DFU is not set
 CONFIG_CMD_DM=y
-# CONFIG_CMD_FPGAD is not set
 # CONFIG_CMD_FUSE is not set
 # CONFIG_CMD_GPIO is not set
 # CONFIG_CMD_GPT is not set
@@ -613,8 +616,6 @@ CONFIG_CMD_PCI=y
 CONFIG_CMD_SATA=y
 CONFIG_CMD_SCSI=y
 # CONFIG_CMD_SDRAM is not set
-# CONFIG_CMD_TSI148 is not set
-# CONFIG_CMD_UNIVERSE is not set
 CONFIG_CMD_USB=y
 # CONFIG_CMD_USB_SDP is not set
 # CONFIG_CMD_RKMTD is not set
@@ -744,6 +745,7 @@ CONFIG_MTDPARTS_DEFAULT=""
 # Debug commands
 #
 CONFIG_CMD_CBSYSINFO=y
+CONFIG_CMD_CYCLIC=y
 # CONFIG_CMD_DIAG is not set
 # CONFIG_CMD_EVENT is not set
 CONFIG_CMD_IRQ=y
@@ -784,6 +786,7 @@ CONFIG_SPL_OF_CONTROL=y
 # CONFIG_OF_UPSTREAM is not set
 CONFIG_OF_SEPARATE=y
 # CONFIG_OF_EMBED is not set
+# CONFIG_OF_INITIAL_DTB_READONLY is not set
 # CONFIG_OF_BOARD is not set
 # CONFIG_OF_OMIT_DTB is not set
 CONFIG_DEVICE_TREE_INCLUDES=""
@@ -813,7 +816,6 @@ CONFIG_ENV_IS_NOWHERE=y
 # CONFIG_ENV_IS_IN_MMC is not set
 # CONFIG_ENV_IS_IN_NAND is not set
 # CONFIG_ENV_IS_IN_NVRAM is not set
-# CONFIG_ENV_IS_IN_ONENAND is not set
 # CONFIG_ENV_IS_IN_REMOTE is not set
 # CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
@@ -897,6 +899,7 @@ CONFIG_DM_DEV_READ_INLINE=y
 # CONFIG_ACPIGEN is not set
 # CONFIG_BOUNCE_BUFFER is not set
 # CONFIG_ADC is not set
+# CONFIG_SPL_ADC is not set
 CONFIG_SATA=y
 CONFIG_LIBATA=y
 CONFIG_SCSI_AHCI=y
@@ -962,6 +965,7 @@ CONFIG_SYS_64BIT_LBA=y
 # CONFIG_CLK is not set
 # CONFIG_SPL_CLK_CCF is not set
 # CONFIG_CLK_CCF is not set
+# CONFIG_COMMON_CLK_ADI_SHARED is not set
 # CONFIG_CLK_RCAR is not set
 # CONFIG_CLK_RCAR_CPG_LIB is not set
 # CONFIG_CPU is not set
@@ -1061,7 +1065,6 @@ CONFIG_SPL_DM_GPIO=y
 # CONFIG_MPC8XX_GPIO is not set
 # CONFIG_NX_GPIO is not set
 # CONFIG_NOMADIK_GPIO is not set
-# CONFIG_ZYNQMP_GPIO_MODEPIN is not set
 # CONFIG_SLG7XL45106_I2C_GPO is not set
 # CONFIG_FTGPIO010 is not set
 
@@ -1200,6 +1203,7 @@ CONFIG_MTD=y
 # CONFIG_DM_MTD is not set
 # CONFIG_MTD_NOR_FLASH is not set
 # CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_BLOCK is not set
 # CONFIG_SYS_MTDPARTS_RUNTIME is not set
 # CONFIG_FLASH_CFI_DRIVER is not set
 # CONFIG_HBMC_AM654 is not set
@@ -1228,6 +1232,7 @@ CONFIG_MTD=y
 # CONFIG_MV88E6352_SWITCH is not set
 CONFIG_PHYLIB=y
 # CONFIG_PHY_ADDR_ENABLE is not set
+CONFIG_PHY_ANEG_TIMEOUT=4000
 # CONFIG_B53_SWITCH is not set
 # CONFIG_MV88E61XX_SWITCH is not set
 # CONFIG_PHYLIB_10G is not set
@@ -1277,6 +1282,7 @@ CONFIG_NETDEVICES=y
 # CONFIG_BCMGENET is not set
 # CONFIG_BNXT_ETH is not set
 # CONFIG_CALXEDA_XGMAC is not set
+# CONFIG_DWC_ETH_XGMAC is not set
 # CONFIG_DRIVER_DM9000 is not set
 # CONFIG_DWC_ETH_QOS is not set
 CONFIG_E1000=y
@@ -1524,6 +1530,7 @@ CONFIG_SOUND_I8254=y
 # SOC (System On Chip) specific Drivers
 #
 # CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_QCOM is not set
 # CONFIG_SOC_SAMSUNG is not set
 # CONFIG_SOC_TI is not set
 # CONFIG_SPI is not set
@@ -1700,6 +1707,8 @@ CONFIG_CONSOLE_TRUETYPE_SIZE=18
 CONFIG_CONSOLE_TRUETYPE_MAX_METRICS=10
 CONFIG_SYS_WHITE_ON_BLACK=y
 # CONFIG_NO_FB_CLEAR is not set
+CONFIG_VIDEO_SYNC_MS=100
+CONFIG_VIDEO_SYNC_CYCLIC_MS=10
 CONFIG_PANEL=y
 CONFIG_SIMPLE_PANEL=y
 # CONFIG_PANEL_HX8238D is not set
@@ -1789,7 +1798,6 @@ CONFIG_VIDEO_BMP_RLE8=y
 # Watchdog Timer Support
 #
 # CONFIG_WATCHDOG is not set
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
 # CONFIG_IMX_WATCHDOG is not set
 # CONFIG_ULP_WATCHDOG is not set
 # CONFIG_WDT is not set
@@ -1945,6 +1953,7 @@ CONFIG_EFI_DT_FIXUP=y
 CONFIG_EFI_LOADER_HII=y
 CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y
 CONFIG_EFI_UNICODE_CAPITALIZATION=y
+# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set
 CONFIG_EFI_PLATFORM_LANG_CODES="en-US"
 CONFIG_EFI_HAVE_RUNTIME_RESET=y
 CONFIG_EFI_LOAD_FILE2_INITRD=y
@@ -1990,6 +1999,6 @@ CONFIG_TOOLS_SHA1=y
 CONFIG_TOOLS_SHA256=y
 CONFIG_TOOLS_SHA384=y
 CONFIG_TOOLS_SHA512=y
-# CONFIG_TOOLS_MKEFICAPSULE is not set
+CONFIG_TOOLS_MKEFICAPSULE=y
 # CONFIG_FSPI_CONF_HEADER is not set
 # CONFIG_TOOLS_MKFWUMDATA is not set
diff --git a/config/u-boot/i386coreboot/config/default b/config/u-boot/i386coreboot/config/default
index fce63efc..d01984d5 100644
--- a/config/u-boot/i386coreboot/config/default
+++ b/config/u-boot/i386coreboot/config/default
@@ -1,12 +1,13 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# U-Boot 2024.07 Configuration
+# U-Boot 2024.10 Configuration
 #
 
 #
 # Compiler: gcc (Debian 12.2.0-14) 12.2.0
 #
 CONFIG_CREATE_ARCH_SYMLINK=y
+CONFIG_SUPPORT_LITTLE_ENDIAN=y
 CONFIG_SYS_CACHE_SHIFT_6=y
 CONFIG_SYS_CACHELINE_SIZE=64
 CONFIG_LINKER_LIST_ALIGN=8
@@ -39,11 +40,11 @@ CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
 # CONFIG_DM_RESET is not set
 CONFIG_SYS_MONITOR_LEN=1048576
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
 CONFIG_ERR_PTR_OFFSET=0x0
 # CONFIG_SPL is not set
 CONFIG_PRE_CON_BUF_ADDR=0x100000
 CONFIG_PRE_CON_BUF_SZ=4096
-CONFIG_BOOTSTAGE_STASH_ADDR=0x0
 CONFIG_IDENT_STRING=""
 CONFIG_SYS_CLK_FREQ=0
 CONFIG_SYS_MEM_TOP_HIDE=0x0
@@ -109,6 +110,7 @@ CONFIG_SA_PCIEX_LENGTH=0x10000000
 CONFIG_COREBOOT_SYSINFO=y
 CONFIG_ZBOOT=y
 # CONFIG_OF_BOARD_FIXUP is not set
+CONFIG_SYS_LITTLE_ENDIAN=y
 
 #
 # General setup
@@ -179,6 +181,7 @@ CONFIG_BOOTSTD_FULL=y
 CONFIG_BOOTSTD_DEFAULTS=y
 CONFIG_BOOTSTD_BOOTCOMMAND=y
 CONFIG_BOOTMETH_GLOBAL=y
+# CONFIG_BOOTMETH_ANDROID is not set
 CONFIG_BOOTMETH_CROS=y
 CONFIG_BOOTMETH_EXTLINUX=y
 CONFIG_BOOTMETH_EXTLINUX_PXE=y
@@ -204,7 +207,6 @@ CONFIG_SYS_BOOT_RAMDISK_HIGH=y
 # Boot timing
 #
 # CONFIG_BOOTSTAGE is not set
-CONFIG_BOOTSTAGE_STASH_SIZE=0x1000
 CONFIG_SHOW_BOOT_PROGRESS=y
 
 #
@@ -306,7 +308,9 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
 #
 # Start-up hooks
 #
-# CONFIG_CYCLIC is not set
+CONFIG_CYCLIC=y
+# CONFIG_SPL_CYCLIC is not set
+CONFIG_CYCLIC_MAX_CPU_TIME_US=5000
 CONFIG_EVENT=y
 CONFIG_EVENT_DYNAMIC=y
 # CONFIG_EVENT_DEBUG is not set
@@ -388,6 +392,7 @@ CONFIG_CMD_BOOTFLOW=y
 CONFIG_CMD_BOOTFLOW_FULL=y
 CONFIG_CMD_BOOTMETH=y
 CONFIG_BOOTM_EFI=y
+CONFIG_BOOTM_ELF=y
 # CONFIG_CMD_BOOTZ is not set
 CONFIG_BOOTM_LINUX=y
 CONFIG_BOOTM_NETBSD=y
@@ -411,7 +416,6 @@ CONFIG_CMD_FDT=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_RUN=y
 CONFIG_CMD_IMI=y
-# CONFIG_CMD_IMLS is not set
 CONFIG_CMD_XIMG=y
 CONFIG_CMD_ZBOOT=y
 
@@ -462,14 +466,12 @@ CONFIG_CMD_RANDOM=y
 #
 # Device access commands
 #
-# CONFIG_CMD_ARMFLASH is not set
 # CONFIG_CMD_BCB is not set
 # CONFIG_CMD_BIND is not set
 # CONFIG_CMD_CLK is not set
 # CONFIG_CMD_DEMO is not set
 # CONFIG_CMD_DFU is not set
 CONFIG_CMD_DM=y
-# CONFIG_CMD_FPGAD is not set
 # CONFIG_CMD_FUSE is not set
 # CONFIG_CMD_GPIO is not set
 # CONFIG_CMD_GPT is not set
@@ -503,8 +505,6 @@ CONFIG_CMD_PCI=y
 CONFIG_CMD_SATA=y
 CONFIG_CMD_SCSI=y
 # CONFIG_CMD_SDRAM is not set
-# CONFIG_CMD_TSI148 is not set
-# CONFIG_CMD_UNIVERSE is not set
 CONFIG_CMD_USB=y
 # CONFIG_CMD_USB_SDP is not set
 # CONFIG_CMD_RKMTD is not set
@@ -634,6 +634,7 @@ CONFIG_MTDPARTS_DEFAULT=""
 # Debug commands
 #
 CONFIG_CMD_CBSYSINFO=y
+CONFIG_CMD_CYCLIC=y
 # CONFIG_CMD_DIAG is not set
 # CONFIG_CMD_EVENT is not set
 CONFIG_CMD_IRQ=y
@@ -665,6 +666,7 @@ CONFIG_OF_REAL=y
 # CONFIG_OF_UPSTREAM is not set
 CONFIG_OF_SEPARATE=y
 # CONFIG_OF_EMBED is not set
+# CONFIG_OF_INITIAL_DTB_READONLY is not set
 # CONFIG_OF_BOARD is not set
 # CONFIG_OF_OMIT_DTB is not set
 CONFIG_DEVICE_TREE_INCLUDES=""
@@ -690,7 +692,6 @@ CONFIG_ENV_IS_NOWHERE=y
 # CONFIG_ENV_IS_IN_MMC is not set
 # CONFIG_ENV_IS_IN_NAND is not set
 # CONFIG_ENV_IS_IN_NVRAM is not set
-# CONFIG_ENV_IS_IN_ONENAND is not set
 # CONFIG_ENV_IS_IN_REMOTE is not set
 # CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
@@ -789,7 +790,7 @@ CONFIG_BLOCK_CACHE=y
 # CONFIG_BLKMAP is not set
 # CONFIG_EFI_MEDIA is not set
 CONFIG_IDE=y
-CONFIG_SYS_IDE_MAXBUS=0x2
+CONFIG_SYS_IDE_MAXBUS=2
 CONFIG_SYS_IDE_MAXDEVICE=4
 CONFIG_SYS_ATA_BASE_ADDR=0x0
 CONFIG_SYS_ATA_STRIDE=0x1
@@ -824,6 +825,7 @@ CONFIG_SYS_64BIT_LBA=y
 #
 # CONFIG_CLK is not set
 # CONFIG_CLK_CCF is not set
+# CONFIG_COMMON_CLK_ADI_SHARED is not set
 # CONFIG_CLK_RCAR is not set
 # CONFIG_CLK_RCAR_CPG_LIB is not set
 # CONFIG_CPU is not set
@@ -919,7 +921,6 @@ CONFIG_GPIO=y
 # CONFIG_MPC8XX_GPIO is not set
 # CONFIG_NX_GPIO is not set
 # CONFIG_NOMADIK_GPIO is not set
-# CONFIG_ZYNQMP_GPIO_MODEPIN is not set
 # CONFIG_SLG7XL45106_I2C_GPO is not set
 # CONFIG_FTGPIO010 is not set
 
@@ -1051,6 +1052,7 @@ CONFIG_MTD=y
 # CONFIG_DM_MTD is not set
 # CONFIG_MTD_NOR_FLASH is not set
 # CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_BLOCK is not set
 # CONFIG_SYS_MTDPARTS_RUNTIME is not set
 # CONFIG_FLASH_CFI_DRIVER is not set
 # CONFIG_HBMC_AM654 is not set
@@ -1079,6 +1081,7 @@ CONFIG_MTD=y
 # CONFIG_MV88E6352_SWITCH is not set
 CONFIG_PHYLIB=y
 # CONFIG_PHY_ADDR_ENABLE is not set
+CONFIG_PHY_ANEG_TIMEOUT=4000
 # CONFIG_B53_SWITCH is not set
 # CONFIG_MV88E61XX_SWITCH is not set
 # CONFIG_PHYLIB_10G is not set
@@ -1128,6 +1131,7 @@ CONFIG_NETDEVICES=y
 # CONFIG_BCMGENET is not set
 # CONFIG_BNXT_ETH is not set
 # CONFIG_CALXEDA_XGMAC is not set
+# CONFIG_DWC_ETH_XGMAC is not set
 # CONFIG_DRIVER_DM9000 is not set
 # CONFIG_DWC_ETH_QOS is not set
 CONFIG_E1000=y
@@ -1351,6 +1355,7 @@ CONFIG_SOUND_I8254=y
 # SOC (System On Chip) specific Drivers
 #
 # CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_QCOM is not set
 # CONFIG_SOC_SAMSUNG is not set
 # CONFIG_SOC_TI is not set
 # CONFIG_SPI is not set
@@ -1520,6 +1525,8 @@ CONFIG_CONSOLE_TRUETYPE_SIZE=18
 CONFIG_CONSOLE_TRUETYPE_MAX_METRICS=10
 CONFIG_SYS_WHITE_ON_BLACK=y
 # CONFIG_NO_FB_CLEAR is not set
+CONFIG_VIDEO_SYNC_MS=100
+CONFIG_VIDEO_SYNC_CYCLIC_MS=10
 CONFIG_PANEL=y
 CONFIG_SIMPLE_PANEL=y
 # CONFIG_PANEL_HX8238D is not set
@@ -1608,7 +1615,6 @@ CONFIG_VIDEO_BMP_RLE8=y
 # Watchdog Timer Support
 #
 # CONFIG_WATCHDOG is not set
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
 # CONFIG_IMX_WATCHDOG is not set
 # CONFIG_ULP_WATCHDOG is not set
 # CONFIG_WDT is not set
@@ -1735,6 +1741,7 @@ CONFIG_EFI_DT_FIXUP=y
 CONFIG_EFI_LOADER_HII=y
 CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y
 CONFIG_EFI_UNICODE_CAPITALIZATION=y
+# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set
 CONFIG_EFI_PLATFORM_LANG_CODES="en-US"
 CONFIG_EFI_HAVE_RUNTIME_RESET=y
 CONFIG_EFI_LOAD_FILE2_INITRD=y
@@ -1779,6 +1786,6 @@ CONFIG_TOOLS_SHA1=y
 CONFIG_TOOLS_SHA256=y
 CONFIG_TOOLS_SHA384=y
 CONFIG_TOOLS_SHA512=y
-# CONFIG_TOOLS_MKEFICAPSULE is not set
+CONFIG_TOOLS_MKEFICAPSULE=y
 # CONFIG_FSPI_CONF_HEADER is not set
 # CONFIG_TOOLS_MKFWUMDATA is not set
diff --git a/config/u-boot/x86/target.cfg b/config/u-boot/x86/target.cfg
index c9978dca..2a547e87 100644
--- a/config/u-boot/x86/target.cfg
+++ b/config/u-boot/x86/target.cfg
@@ -1,2 +1,2 @@
 tree="x86"
-rev="3f772959501c99fbe5aa0b22a36efe3478d1ae1c" # v2024.07
+rev="f919c3a889f0ec7d63a48b5d0ed064386b0980bd" # v2024.10
diff --git a/config/u-boot/x86_64/target.cfg b/config/u-boot/x86_64/target.cfg
index dd554fcb..45e85c2e 100644
--- a/config/u-boot/x86_64/target.cfg
+++ b/config/u-boot/x86_64/target.cfg
@@ -1,2 +1,2 @@
 tree="x86_64"
-rev="3f772959501c99fbe5aa0b22a36efe3478d1ae1c" # v2024.07
+rev="f919c3a889f0ec7d63a48b5d0ed064386b0980bd" # v2024.10

From 4bc6ca545e792bb70d19cae519872430e1a07c7b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Nov 2024 10:56:54 +0000
Subject: [PATCH 0875/1549] fix U-Boot hotkey mention in grub.cfg

it's u, not b, for the U-Boot hotkey

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/default/config/payload | 2 +-
 config/grub/nvme/config/payload    | 2 +-
 config/grub/xhci/config/payload    | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/config/grub/default/config/payload b/config/grub/default/config/payload
index 21e12734..a05cbfda 100644
--- a/config/grub/default/config/payload
+++ b/config/grub/default/config/payload
@@ -217,7 +217,7 @@ menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey=
 }
 fi
 if [ -f (cbfsdisk)/img/u-boot ]; then
-menuentry 'Highly experimental U-Boot payload [b]' --hotkey='u' {
+menuentry 'Highly experimental U-Boot payload [u]' --hotkey='u' {
 	set root='cbfsdisk'
 	chainloader /img/u-boot
 }
diff --git a/config/grub/nvme/config/payload b/config/grub/nvme/config/payload
index 50a46c05..7f44b2bd 100644
--- a/config/grub/nvme/config/payload
+++ b/config/grub/nvme/config/payload
@@ -235,7 +235,7 @@ menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey=
 }
 fi
 if [ -f (cbfsdisk)/img/u-boot ]; then
-menuentry 'Highly experimental U-Boot payload [b]' --hotkey='u' {
+menuentry 'Highly experimental U-Boot payload [u]' --hotkey='u' {
 	set root='cbfsdisk'
 	chainloader /img/u-boot
 }
diff --git a/config/grub/xhci/config/payload b/config/grub/xhci/config/payload
index ee31a245..4093edee 100644
--- a/config/grub/xhci/config/payload
+++ b/config/grub/xhci/config/payload
@@ -236,7 +236,7 @@ menuentry 'Load test configuration (grubtest.cfg) in CBFS  [t]' --hotkey='t' {
 }
 fi
 if [ -f (cbfsdisk)/img/u-boot ]; then
-menuentry 'Highly experimental U-Boot payload [b]' --hotkey='u' {
+menuentry 'Highly experimental U-Boot payload [u]' --hotkey='u' {
 	set root='cbfsdisk'
 	chainloader /img/u-boot
 }

From eba73c778a85d1c6ad2f0de57c82a8775cdd1c17 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Nov 2024 16:22:14 +0000
Subject: [PATCH 0876/1549] Disable U-Boot x86 except on Qemu

It's really buggy on hardware. Disable for now.

I've contacted Simon Glass on IRC, asking about hardware.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/dell3050micro_fsp_16mb/target.cfg   | 3 +--
 config/coreboot/dell7010sff_12mb/target.cfg         | 3 +--
 config/coreboot/dell780mt_8mb/target.cfg            | 3 +--
 config/coreboot/dell780mt_truncate_8mb/target.cfg   | 3 +--
 config/coreboot/dell780usff_8mb/target.cfg          | 3 +--
 config/coreboot/dell780usff_truncate_8mb/target.cfg | 3 +--
 config/coreboot/dell9020mt_nri_12mb/target.cfg      | 3 +--
 config/coreboot/dell9020sff_nri_12mb/target.cfg     | 3 +--
 config/coreboot/e4300_4mb/target.cfg                | 1 -
 config/coreboot/e5420_6mb/target.cfg                | 1 -
 config/coreboot/e5520_6mb/target.cfg                | 1 -
 config/coreboot/e5530_12mb/target.cfg               | 1 -
 config/coreboot/e6220_10mb/target.cfg               | 1 -
 config/coreboot/e6230_12mb/target.cfg               | 2 --
 config/coreboot/e6320_10mb/target.cfg               | 1 -
 config/coreboot/e6330_12mb/target.cfg               | 1 -
 config/coreboot/e6400_4mb/target.cfg                | 1 -
 config/coreboot/e6400nvidia_4mb/target.cfg          | 1 -
 config/coreboot/e6420_10mb/target.cfg               | 1 -
 config/coreboot/e6430_12mb/target.cfg               | 1 -
 config/coreboot/e6520_10mb/target.cfg               | 1 -
 config/coreboot/e6530_12mb/target.cfg               | 1 -
 config/coreboot/g43t_am3/target.cfg                 | 3 +--
 config/coreboot/g43t_am3_16mb/target.cfg            | 3 +--
 config/coreboot/hp2170p_16mb/target.cfg             | 1 -
 config/coreboot/hp2560p_8mb/target.cfg              | 1 -
 config/coreboot/hp2570p_16mb/target.cfg             | 1 -
 config/coreboot/hp8200sff_4mb/target.cfg            | 3 +--
 config/coreboot/hp8200sff_8mb/target.cfg            | 3 +--
 config/coreboot/hp820g2_12mb/target.cfg             | 3 +--
 config/coreboot/hp8300cmt_16mb/target.cfg           | 3 +--
 config/coreboot/hp8300usdt_16mb/target.cfg          | 1 -
 config/coreboot/hp8460pintel_8mb/target.cfg         | 1 -
 config/coreboot/hp8470pintel_16mb/target.cfg        | 1 -
 config/coreboot/hp8560w_8mb/target.cfg              | 1 -
 config/coreboot/hp9470m_16mb/target.cfg             | 1 -
 config/coreboot/kcma_d8_16mb/target.cfg             | 3 +--
 config/coreboot/kcma_d8_2mb/target.cfg              | 3 +--
 config/coreboot/kfsn4_dre_1mb/target.cfg            | 3 +--
 config/coreboot/kfsn4_dre_2mb/target.cfg            | 1 -
 config/coreboot/kgpe_d16_16mb/target.cfg            | 3 +--
 config/coreboot/kgpe_d16_2mb/target.cfg             | 3 +--
 config/coreboot/macbook11/target.cfg                | 3 +--
 config/coreboot/macbook11_16mb/target.cfg           | 3 +--
 config/coreboot/macbook21/target.cfg                | 1 -
 config/coreboot/macbook21_16mb/target.cfg           | 1 -
 config/coreboot/qemu_x86_64_12mb/target.cfg         | 1 +
 config/coreboot/r400_16mb/target.cfg                | 1 -
 config/coreboot/r400_4mb/target.cfg                 | 1 -
 config/coreboot/r400_8mb/target.cfg                 | 1 -
 config/coreboot/r500_4mb/target.cfg                 | 1 -
 config/coreboot/t1650_12mb/target.cfg               | 3 +--
 config/coreboot/t400_16mb/target.cfg                | 1 -
 config/coreboot/t400_4mb/target.cfg                 | 1 -
 config/coreboot/t400_8mb/target.cfg                 | 1 -
 config/coreboot/t420_8mb/target.cfg                 | 1 -
 config/coreboot/t420s_8mb/target.cfg                | 1 -
 config/coreboot/t430_12mb/target.cfg                | 1 -
 config/coreboot/t440plibremrc_12mb/target.cfg       | 3 +--
 config/coreboot/t500_16mb/target.cfg                | 1 -
 config/coreboot/t500_4mb/target.cfg                 | 1 -
 config/coreboot/t500_8mb/target.cfg                 | 1 -
 config/coreboot/t520_8mb/target.cfg                 | 1 -
 config/coreboot/t530_12mb/target.cfg                | 1 -
 config/coreboot/t60_16mb_intelgpu/target.cfg        | 3 +--
 config/coreboot/t60_intelgpu/target.cfg             | 3 +--
 config/coreboot/w500_16mb/target.cfg                | 1 -
 config/coreboot/w500_4mb/target.cfg                 | 1 -
 config/coreboot/w500_8mb/target.cfg                 | 1 -
 config/coreboot/w530_12mb/target.cfg                | 1 -
 config/coreboot/w541_12mb/target.cfg                | 3 +--
 config/coreboot/x200_16mb/target.cfg                | 1 -
 config/coreboot/x200_4mb/target.cfg                 | 1 -
 config/coreboot/x200_8mb/target.cfg                 | 1 -
 config/coreboot/x220_8mb/target.cfg                 | 1 -
 config/coreboot/x230_12mb/target.cfg                | 1 -
 config/coreboot/x230_16mb/target.cfg                | 1 -
 config/coreboot/x230t_12mb/target.cfg               | 1 -
 config/coreboot/x230t_16mb/target.cfg               | 1 -
 config/coreboot/x301_16mb/target.cfg                | 1 -
 config/coreboot/x301_4mb/target.cfg                 | 1 -
 config/coreboot/x301_8mb/target.cfg                 | 1 -
 config/coreboot/x60/target.cfg                      | 3 +--
 config/coreboot/x60_16mb/target.cfg                 | 3 +--
 config/data/coreboot/mkhelper.cfg                   | 2 +-
 85 files changed, 30 insertions(+), 113 deletions(-)

diff --git a/config/coreboot/dell3050micro_fsp_16mb/target.cfg b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
index 8ab796e4..d6bd3872 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/target.cfg
+++ b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
@@ -6,6 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="3050micro"
-build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+build_depend="seabios/default grub/xhci memtest86plus"
 IFD_platform="sklkbl"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/dell7010sff_12mb/target.cfg b/config/coreboot/dell7010sff_12mb/target.cfg
index aa08547a..abc1d14e 100644
--- a/config/coreboot/dell7010sff_12mb/target.cfg
+++ b/config/coreboot/dell7010sff_12mb/target.cfg
@@ -6,5 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="t1650"
-build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/dell780mt_8mb/target.cfg b/config/coreboot/dell780mt_8mb/target.cfg
index 50ea82b6..eca44aa2 100644
--- a/config/coreboot/dell780mt_8mb/target.cfg
+++ b/config/coreboot/dell780mt_8mb/target.cfg
@@ -5,5 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/dell780mt_truncate_8mb/target.cfg b/config/coreboot/dell780mt_truncate_8mb/target.cfg
index 50ea82b6..eca44aa2 100644
--- a/config/coreboot/dell780mt_truncate_8mb/target.cfg
+++ b/config/coreboot/dell780mt_truncate_8mb/target.cfg
@@ -5,5 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/dell780usff_8mb/target.cfg b/config/coreboot/dell780usff_8mb/target.cfg
index 50ea82b6..eca44aa2 100644
--- a/config/coreboot/dell780usff_8mb/target.cfg
+++ b/config/coreboot/dell780usff_8mb/target.cfg
@@ -5,5 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/dell780usff_truncate_8mb/target.cfg b/config/coreboot/dell780usff_truncate_8mb/target.cfg
index 50ea82b6..eca44aa2 100644
--- a/config/coreboot/dell780usff_truncate_8mb/target.cfg
+++ b/config/coreboot/dell780usff_truncate_8mb/target.cfg
@@ -5,5 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/dell9020mt_nri_12mb/target.cfg b/config/coreboot/dell9020mt_nri_12mb/target.cfg
index 5be15ac2..e7411d7f 100644
--- a/config/coreboot/dell9020mt_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_nri_12mb/target.cfg
@@ -6,5 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
-build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/xhci memtest86plus"
diff --git a/config/coreboot/dell9020sff_nri_12mb/target.cfg b/config/coreboot/dell9020sff_nri_12mb/target.cfg
index 5be15ac2..e7411d7f 100644
--- a/config/coreboot/dell9020sff_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_nri_12mb/target.cfg
@@ -6,5 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
-build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/xhci memtest86plus"
diff --git a/config/coreboot/e4300_4mb/target.cfg b/config/coreboot/e4300_4mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/e4300_4mb/target.cfg
+++ b/config/coreboot/e4300_4mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index 27291f4d..4201beb1 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index 27291f4d..4201beb1 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index c0b56379..2556a4ce 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6220_10mb/target.cfg b/config/coreboot/e6220_10mb/target.cfg
index 27291f4d..4201beb1 100644
--- a/config/coreboot/e6220_10mb/target.cfg
+++ b/config/coreboot/e6220_10mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6230_12mb/target.cfg b/config/coreboot/e6230_12mb/target.cfg
index 5bd85905..2556a4ce 100644
--- a/config/coreboot/e6230_12mb/target.cfg
+++ b/config/coreboot/e6230_12mb/target.cfg
@@ -5,5 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6320_10mb/target.cfg b/config/coreboot/e6320_10mb/target.cfg
index 27291f4d..4201beb1 100644
--- a/config/coreboot/e6320_10mb/target.cfg
+++ b/config/coreboot/e6320_10mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6330_12mb/target.cfg b/config/coreboot/e6330_12mb/target.cfg
index c0b56379..2556a4ce 100644
--- a/config/coreboot/e6330_12mb/target.cfg
+++ b/config/coreboot/e6330_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index a0b322d3..98eb8d3b 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="e6400"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
index a0b322d3..98eb8d3b 100644
--- a/config/coreboot/e6400nvidia_4mb/target.cfg
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="e6400"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index 27291f4d..4201beb1 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index c0b56379..2556a4ce 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index 27291f4d..4201beb1 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index c0b56379..2556a4ce 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/g43t_am3/target.cfg b/config/coreboot/g43t_am3/target.cfg
index 7bc27788..7f3d7886 100644
--- a/config/coreboot/g43t_am3/target.cfg
+++ b/config/coreboot/g43t_am3/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/g43t_am3_16mb/target.cfg b/config/coreboot/g43t_am3_16mb/target.cfg
index bef863ee..594b6612 100644
--- a/config/coreboot/g43t_am3_16mb/target.cfg
+++ b/config/coreboot/g43t_am3_16mb/target.cfg
@@ -4,5 +4,4 @@ payload_seabios="y"
 payload_memtest="y"
 release="n"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index f12beab7..f7544548 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2170p"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index a3f8ba84..a9dfe4e4 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2560p"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index d899d7d9..928527da 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2570p"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 8d18ae23..54966da1 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -6,5 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="hp8200sff"
-build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 8d18ae23..54966da1 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -6,5 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="hp8200sff"
-build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index be150000..99be701a 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -7,5 +7,4 @@ release="n"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="hp820g2"
-build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/xhci memtest86plus"
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index 7cbc8dad..d0e19b73 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -6,5 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="ivybridge"
-build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index c0b56379..2556a4ce 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index 5897b9bc..b39036ba 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8460pintel"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index 72e64b8a..d960f36b 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8470pintel"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg
index dcdd1dc8..7bad4889 100644
--- a/config/coreboot/hp8560w_8mb/target.cfg
+++ b/config/coreboot/hp8560w_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8560w"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index 4580be7b..35a0a6fd 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp9470m"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/kcma_d8_16mb/target.cfg b/config/coreboot/kcma_d8_16mb/target.cfg
index b0ab3d02..5f705f43 100644
--- a/config/coreboot/kcma_d8_16mb/target.cfg
+++ b/config/coreboot/kcma_d8_16mb/target.cfg
@@ -6,5 +6,4 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kcma_d8_2mb/target.cfg b/config/coreboot/kcma_d8_2mb/target.cfg
index b0ab3d02..5f705f43 100644
--- a/config/coreboot/kcma_d8_2mb/target.cfg
+++ b/config/coreboot/kcma_d8_2mb/target.cfg
@@ -6,5 +6,4 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kfsn4_dre_1mb/target.cfg b/config/coreboot/kfsn4_dre_1mb/target.cfg
index c5759ac8..57e64580 100644
--- a/config/coreboot/kfsn4_dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_1mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
-build_depend="seabios/default memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default memtest86plus"
diff --git a/config/coreboot/kfsn4_dre_2mb/target.cfg b/config/coreboot/kfsn4_dre_2mb/target.cfg
index 94601104..606962a2 100644
--- a/config/coreboot/kfsn4_dre_2mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_2mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 xlang="c"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/kgpe_d16_16mb/target.cfg b/config/coreboot/kgpe_d16_16mb/target.cfg
index b0ab3d02..5f705f43 100644
--- a/config/coreboot/kgpe_d16_16mb/target.cfg
+++ b/config/coreboot/kgpe_d16_16mb/target.cfg
@@ -6,5 +6,4 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kgpe_d16_2mb/target.cfg b/config/coreboot/kgpe_d16_2mb/target.cfg
index b0ab3d02..5f705f43 100644
--- a/config/coreboot/kgpe_d16_2mb/target.cfg
+++ b/config/coreboot/kgpe_d16_2mb/target.cfg
@@ -6,5 +6,4 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index 2661c6b2..9ceb99e8 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
-build_depend="seabios/default grub/default u-boot/i386coreboot"
-payload_uboot_i386="y"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index e37b6307..a53a1668 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 scan_scan_disk="ahci"
-build_depend="seabios/default grub/default u-boot/i386coreboot"
-payload_uboot_i386="y"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/qemu_x86_64_12mb/target.cfg b/config/coreboot/qemu_x86_64_12mb/target.cfg
index 5c1a733f..3db013b4 100644
--- a/config/coreboot/qemu_x86_64_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_64_12mb/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_grub="y"
 payload_seabios="y"
 payload_memtest="y"
+build_depend="seabios/default grub/default memtest86plus u-boot/amd64coreboot"
 payload_uboot_amd64="y"
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index ba490833..f596cc06 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -3,4 +3,3 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index aa08547a..abc1d14e 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -6,5 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="t1650"
-build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index 27291f4d..4201beb1 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index 27291f4d..4201beb1 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index c0b56379..2556a4ce 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index 5be15ac2..e7411d7f 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -6,5 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
-build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/xhci memtest86plus"
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index 27291f4d..4201beb1 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index c0b56379..2556a4ce 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 2661c6b2..9ceb99e8 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
-build_depend="seabios/default grub/default u-boot/i386coreboot"
-payload_uboot_i386="y"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 2661c6b2..9ceb99e8 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
-build_depend="seabios/default grub/default u-boot/i386coreboot"
-payload_uboot_i386="y"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index c0b56379..2556a4ce 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index 5be15ac2..e7411d7f 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -6,5 +6,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
-build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+build_depend="seabios/default grub/xhci memtest86plus"
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index 0b81f02f..4a9af479 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -4,4 +4,3 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index 27291f4d..4201beb1 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg
index c0b56379..2556a4ce 100644
--- a/config/coreboot/x230_12mb/target.cfg
+++ b/config/coreboot/x230_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index c0b56379..2556a4ce 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg
index c0b56379..2556a4ce 100644
--- a/config/coreboot/x230t_12mb/target.cfg
+++ b/config/coreboot/x230t_12mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index c0b56379..2556a4ce 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index a364653c..16ffc818 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index a364653c..16ffc818 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index a364653c..16ffc818 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 2661c6b2..9ceb99e8 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
-build_depend="seabios/default grub/default u-boot/i386coreboot"
-payload_uboot_i386="y"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 2661c6b2..9ceb99e8 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
-build_depend="seabios/default grub/default u-boot/i386coreboot"
-payload_uboot_i386="y"
+build_depend="seabios/default grub/default"
diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index a218e0e7..a912400f 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -1,7 +1,7 @@
 . "include/rom.sh"
 
 makeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
-build_depend="seabios/default grub/default memtest86plus u-boot/amd64coreboot"
+build_depend="seabios/default grub/default memtest86plus"
 
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 

From b549d1e5f3838575d3ff1f9c6c6fd595b49b1b3a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Nov 2024 22:45:43 +0000
Subject: [PATCH 0877/1549] u-boot x86 serial/ns16550: disable UART as needed

U-Boot was hanging on hardware, but not Qemu. This is because on
the machines tested, namely the X200 and E6230 laptops supported
in Libreboot, the UART was disabled from coreboot.

This U-Boot patch from Simon Glass works around the issue by
silently disabling the UART when it isn't there. Instead,
output is sent to the display and U-Boot no longer hangs.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...50-Allow-the-UART-to-be-silently-dis.patch | 116 ++++++++++++++++++
 ...50-Allow-the-UART-to-be-silently-dis.patch | 116 ++++++++++++++++++
 2 files changed, 232 insertions(+)
 create mode 100644 config/u-boot/x86/patches/0001-x86-serial-ns16550-Allow-the-UART-to-be-silently-dis.patch
 create mode 100644 config/u-boot/x86_64/patches/0001-x86-serial-ns16550-Allow-the-UART-to-be-silently-dis.patch

diff --git a/config/u-boot/x86/patches/0001-x86-serial-ns16550-Allow-the-UART-to-be-silently-dis.patch b/config/u-boot/x86/patches/0001-x86-serial-ns16550-Allow-the-UART-to-be-silently-dis.patch
new file mode 100644
index 00000000..e3969d03
--- /dev/null
+++ b/config/u-boot/x86/patches/0001-x86-serial-ns16550-Allow-the-UART-to-be-silently-dis.patch
@@ -0,0 +1,116 @@
+From 13263cb35e8fc82f15aad2c1091f2b05342fbe0f Mon Sep 17 00:00:00 2001
+From: Simon Glass <sjg@chromium.org>
+Date: Wed, 1 Nov 2023 12:04:42 -0600
+Subject: [PATCH 1/1] x86: serial: ns16550: Allow the UART to be silently
+ disabled
+
+U-Boot normally requires a UART. When booting from coreboot it is
+sometimes just not available, e.g. when no sysinfo or DBG2 information
+is provided.
+
+In this case we need to continue running, since the display can be used.
+Add a flag to disable serial for this case.
+
+This allows U-Boot to start up and operation from the display, instead
+of hanging on start-up.
+
+This could perhaps be hidden behind a Kconfig option to reduce code
+size.
+
+Signed-off-by: Simon Glass <sjg@chromium.org>
+---
+ drivers/serial/ns16550.c         | 17 +++++++++++++++--
+ drivers/serial/serial_coreboot.c |  1 +
+ include/ns16550.h                |  1 +
+ 3 files changed, 17 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
+index 6fcb5b523a..891124fc62 100644
+--- a/drivers/serial/ns16550.c
++++ b/drivers/serial/ns16550.c
+@@ -384,6 +384,8 @@ static int ns16550_serial_putc(struct udevice *dev, const char ch)
+ {
+ 	struct ns16550 *const com_port = dev_get_priv(dev);
+ 
++	if (com_port->plat->flags & NS16550_FLAG_DISABLE)
++		return 0;
+ 	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
+ 		return -EAGAIN;
+ 	serial_out(ch, &com_port->thr);
+@@ -404,6 +406,9 @@ static int ns16550_serial_pending(struct udevice *dev, bool input)
+ {
+ 	struct ns16550 *const com_port = dev_get_priv(dev);
+ 
++	if (com_port->plat->flags & NS16550_FLAG_DISABLE)
++		return 0;
++
+ 	if (input)
+ 		return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0;
+ 	else
+@@ -414,6 +419,9 @@ static int ns16550_serial_getc(struct udevice *dev)
+ {
+ 	struct ns16550 *const com_port = dev_get_priv(dev);
+ 
++	if (com_port->plat->flags & NS16550_FLAG_DISABLE)
++		return 0;
++
+ 	if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
+ 		return -EAGAIN;
+ 
+@@ -428,7 +436,8 @@ static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
+ 
+ 	clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
+ 
+-	ns16550_setbrg(com_port, clock_divisor);
++	if (!(plat->flags & NS16550_FLAG_DISABLE))
++		ns16550_setbrg(com_port, clock_divisor);
+ 
+ 	return 0;
+ }
+@@ -441,6 +450,9 @@ static int ns16550_serial_setconfig(struct udevice *dev, uint serial_config)
+ 	uint bits = SERIAL_GET_BITS(serial_config);
+ 	uint stop = SERIAL_GET_STOP(serial_config);
+ 
++	if (com_port->plat->flags & NS16550_FLAG_DISABLE)
++		return 0;
++
+ 	/*
+ 	 * only parity config is implemented, check if other serial settings
+ 	 * are the default one.
+@@ -533,7 +545,8 @@ int ns16550_serial_probe(struct udevice *dev)
+ 		reset_deassert_bulk(&reset_bulk);
+ 
+ 	com_port->plat = dev_get_plat(dev);
+-	ns16550_init(com_port, -1);
++	if (!(plat->flags & NS16550_FLAG_DISABLE))
++		ns16550_init(com_port, -1);
+ 
+ 	return 0;
+ }
+diff --git a/drivers/serial/serial_coreboot.c b/drivers/serial/serial_coreboot.c
+index b1f69f6998..a885809abd 100644
+--- a/drivers/serial/serial_coreboot.c
++++ b/drivers/serial/serial_coreboot.c
+@@ -119,6 +119,7 @@ static int coreboot_of_to_plat(struct udevice *dev)
+ 		 * there is no UART, which may panic. So stay silent and
+ 		 * pray that the video console will work.
+ 		 */
++		plat->flags |= NS16550_FLAG_DISABLE;
+ 		log_debug("Cannot detect UART\n");
+ 	}
+ 
+diff --git a/include/ns16550.h b/include/ns16550.h
+index 7f48130008..3c4f3e7539 100644
+--- a/include/ns16550.h
++++ b/include/ns16550.h
+@@ -52,6 +52,7 @@ enum ns16550_flags {
+ 	NS16550_FLAG_IO		= 1 << 0, /* Use I/O access (else mem-mapped) */
+ 	NS16550_FLAG_ENDIAN	= 1 << 1, /* Use out_le/be_32() */
+ 	NS16550_FLAG_BE		= 1 << 2, /* Big-endian access (else little) */
++	NS16550_FLAG_DISABLE	= BIT(3), /* No output or input */
+ };
+ 
+ /**
+-- 
+2.39.5
+
diff --git a/config/u-boot/x86_64/patches/0001-x86-serial-ns16550-Allow-the-UART-to-be-silently-dis.patch b/config/u-boot/x86_64/patches/0001-x86-serial-ns16550-Allow-the-UART-to-be-silently-dis.patch
new file mode 100644
index 00000000..e3969d03
--- /dev/null
+++ b/config/u-boot/x86_64/patches/0001-x86-serial-ns16550-Allow-the-UART-to-be-silently-dis.patch
@@ -0,0 +1,116 @@
+From 13263cb35e8fc82f15aad2c1091f2b05342fbe0f Mon Sep 17 00:00:00 2001
+From: Simon Glass <sjg@chromium.org>
+Date: Wed, 1 Nov 2023 12:04:42 -0600
+Subject: [PATCH 1/1] x86: serial: ns16550: Allow the UART to be silently
+ disabled
+
+U-Boot normally requires a UART. When booting from coreboot it is
+sometimes just not available, e.g. when no sysinfo or DBG2 information
+is provided.
+
+In this case we need to continue running, since the display can be used.
+Add a flag to disable serial for this case.
+
+This allows U-Boot to start up and operation from the display, instead
+of hanging on start-up.
+
+This could perhaps be hidden behind a Kconfig option to reduce code
+size.
+
+Signed-off-by: Simon Glass <sjg@chromium.org>
+---
+ drivers/serial/ns16550.c         | 17 +++++++++++++++--
+ drivers/serial/serial_coreboot.c |  1 +
+ include/ns16550.h                |  1 +
+ 3 files changed, 17 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
+index 6fcb5b523a..891124fc62 100644
+--- a/drivers/serial/ns16550.c
++++ b/drivers/serial/ns16550.c
+@@ -384,6 +384,8 @@ static int ns16550_serial_putc(struct udevice *dev, const char ch)
+ {
+ 	struct ns16550 *const com_port = dev_get_priv(dev);
+ 
++	if (com_port->plat->flags & NS16550_FLAG_DISABLE)
++		return 0;
+ 	if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
+ 		return -EAGAIN;
+ 	serial_out(ch, &com_port->thr);
+@@ -404,6 +406,9 @@ static int ns16550_serial_pending(struct udevice *dev, bool input)
+ {
+ 	struct ns16550 *const com_port = dev_get_priv(dev);
+ 
++	if (com_port->plat->flags & NS16550_FLAG_DISABLE)
++		return 0;
++
+ 	if (input)
+ 		return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0;
+ 	else
+@@ -414,6 +419,9 @@ static int ns16550_serial_getc(struct udevice *dev)
+ {
+ 	struct ns16550 *const com_port = dev_get_priv(dev);
+ 
++	if (com_port->plat->flags & NS16550_FLAG_DISABLE)
++		return 0;
++
+ 	if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
+ 		return -EAGAIN;
+ 
+@@ -428,7 +436,8 @@ static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
+ 
+ 	clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
+ 
+-	ns16550_setbrg(com_port, clock_divisor);
++	if (!(plat->flags & NS16550_FLAG_DISABLE))
++		ns16550_setbrg(com_port, clock_divisor);
+ 
+ 	return 0;
+ }
+@@ -441,6 +450,9 @@ static int ns16550_serial_setconfig(struct udevice *dev, uint serial_config)
+ 	uint bits = SERIAL_GET_BITS(serial_config);
+ 	uint stop = SERIAL_GET_STOP(serial_config);
+ 
++	if (com_port->plat->flags & NS16550_FLAG_DISABLE)
++		return 0;
++
+ 	/*
+ 	 * only parity config is implemented, check if other serial settings
+ 	 * are the default one.
+@@ -533,7 +545,8 @@ int ns16550_serial_probe(struct udevice *dev)
+ 		reset_deassert_bulk(&reset_bulk);
+ 
+ 	com_port->plat = dev_get_plat(dev);
+-	ns16550_init(com_port, -1);
++	if (!(plat->flags & NS16550_FLAG_DISABLE))
++		ns16550_init(com_port, -1);
+ 
+ 	return 0;
+ }
+diff --git a/drivers/serial/serial_coreboot.c b/drivers/serial/serial_coreboot.c
+index b1f69f6998..a885809abd 100644
+--- a/drivers/serial/serial_coreboot.c
++++ b/drivers/serial/serial_coreboot.c
+@@ -119,6 +119,7 @@ static int coreboot_of_to_plat(struct udevice *dev)
+ 		 * there is no UART, which may panic. So stay silent and
+ 		 * pray that the video console will work.
+ 		 */
++		plat->flags |= NS16550_FLAG_DISABLE;
+ 		log_debug("Cannot detect UART\n");
+ 	}
+ 
+diff --git a/include/ns16550.h b/include/ns16550.h
+index 7f48130008..3c4f3e7539 100644
+--- a/include/ns16550.h
++++ b/include/ns16550.h
+@@ -52,6 +52,7 @@ enum ns16550_flags {
+ 	NS16550_FLAG_IO		= 1 << 0, /* Use I/O access (else mem-mapped) */
+ 	NS16550_FLAG_ENDIAN	= 1 << 1, /* Use out_le/be_32() */
+ 	NS16550_FLAG_BE		= 1 << 2, /* Big-endian access (else little) */
++	NS16550_FLAG_DISABLE	= BIT(3), /* No output or input */
+ };
+ 
+ /**
+-- 
+2.39.5
+

From fdbdf0449b3c3860b21cfab210f232378449542f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Nov 2024 22:48:21 +0000
Subject: [PATCH 0878/1549] Re-enable U-Boot x86 on real mainboards

The previous stability issues were resolved, thanks to
the previous revision which added a fix courtesy Simon Glass.

This reverts commit eba73c778a85d1c6ad2f0de57c82a8775cdd1c17.
---
 config/coreboot/dell3050micro_fsp_16mb/target.cfg   | 3 ++-
 config/coreboot/dell7010sff_12mb/target.cfg         | 3 ++-
 config/coreboot/dell780mt_8mb/target.cfg            | 3 ++-
 config/coreboot/dell780mt_truncate_8mb/target.cfg   | 3 ++-
 config/coreboot/dell780usff_8mb/target.cfg          | 3 ++-
 config/coreboot/dell780usff_truncate_8mb/target.cfg | 3 ++-
 config/coreboot/dell9020mt_nri_12mb/target.cfg      | 3 ++-
 config/coreboot/dell9020sff_nri_12mb/target.cfg     | 3 ++-
 config/coreboot/e4300_4mb/target.cfg                | 1 +
 config/coreboot/e5420_6mb/target.cfg                | 1 +
 config/coreboot/e5520_6mb/target.cfg                | 1 +
 config/coreboot/e5530_12mb/target.cfg               | 1 +
 config/coreboot/e6220_10mb/target.cfg               | 1 +
 config/coreboot/e6230_12mb/target.cfg               | 2 ++
 config/coreboot/e6320_10mb/target.cfg               | 1 +
 config/coreboot/e6330_12mb/target.cfg               | 1 +
 config/coreboot/e6400_4mb/target.cfg                | 1 +
 config/coreboot/e6400nvidia_4mb/target.cfg          | 1 +
 config/coreboot/e6420_10mb/target.cfg               | 1 +
 config/coreboot/e6430_12mb/target.cfg               | 1 +
 config/coreboot/e6520_10mb/target.cfg               | 1 +
 config/coreboot/e6530_12mb/target.cfg               | 1 +
 config/coreboot/g43t_am3/target.cfg                 | 3 ++-
 config/coreboot/g43t_am3_16mb/target.cfg            | 3 ++-
 config/coreboot/hp2170p_16mb/target.cfg             | 1 +
 config/coreboot/hp2560p_8mb/target.cfg              | 1 +
 config/coreboot/hp2570p_16mb/target.cfg             | 1 +
 config/coreboot/hp8200sff_4mb/target.cfg            | 3 ++-
 config/coreboot/hp8200sff_8mb/target.cfg            | 3 ++-
 config/coreboot/hp820g2_12mb/target.cfg             | 3 ++-
 config/coreboot/hp8300cmt_16mb/target.cfg           | 3 ++-
 config/coreboot/hp8300usdt_16mb/target.cfg          | 1 +
 config/coreboot/hp8460pintel_8mb/target.cfg         | 1 +
 config/coreboot/hp8470pintel_16mb/target.cfg        | 1 +
 config/coreboot/hp8560w_8mb/target.cfg              | 1 +
 config/coreboot/hp9470m_16mb/target.cfg             | 1 +
 config/coreboot/kcma_d8_16mb/target.cfg             | 3 ++-
 config/coreboot/kcma_d8_2mb/target.cfg              | 3 ++-
 config/coreboot/kfsn4_dre_1mb/target.cfg            | 3 ++-
 config/coreboot/kfsn4_dre_2mb/target.cfg            | 1 +
 config/coreboot/kgpe_d16_16mb/target.cfg            | 3 ++-
 config/coreboot/kgpe_d16_2mb/target.cfg             | 3 ++-
 config/coreboot/macbook11/target.cfg                | 3 ++-
 config/coreboot/macbook11_16mb/target.cfg           | 3 ++-
 config/coreboot/macbook21/target.cfg                | 1 +
 config/coreboot/macbook21_16mb/target.cfg           | 1 +
 config/coreboot/qemu_x86_64_12mb/target.cfg         | 1 -
 config/coreboot/r400_16mb/target.cfg                | 1 +
 config/coreboot/r400_4mb/target.cfg                 | 1 +
 config/coreboot/r400_8mb/target.cfg                 | 1 +
 config/coreboot/r500_4mb/target.cfg                 | 1 +
 config/coreboot/t1650_12mb/target.cfg               | 3 ++-
 config/coreboot/t400_16mb/target.cfg                | 1 +
 config/coreboot/t400_4mb/target.cfg                 | 1 +
 config/coreboot/t400_8mb/target.cfg                 | 1 +
 config/coreboot/t420_8mb/target.cfg                 | 1 +
 config/coreboot/t420s_8mb/target.cfg                | 1 +
 config/coreboot/t430_12mb/target.cfg                | 1 +
 config/coreboot/t440plibremrc_12mb/target.cfg       | 3 ++-
 config/coreboot/t500_16mb/target.cfg                | 1 +
 config/coreboot/t500_4mb/target.cfg                 | 1 +
 config/coreboot/t500_8mb/target.cfg                 | 1 +
 config/coreboot/t520_8mb/target.cfg                 | 1 +
 config/coreboot/t530_12mb/target.cfg                | 1 +
 config/coreboot/t60_16mb_intelgpu/target.cfg        | 3 ++-
 config/coreboot/t60_intelgpu/target.cfg             | 3 ++-
 config/coreboot/w500_16mb/target.cfg                | 1 +
 config/coreboot/w500_4mb/target.cfg                 | 1 +
 config/coreboot/w500_8mb/target.cfg                 | 1 +
 config/coreboot/w530_12mb/target.cfg                | 1 +
 config/coreboot/w541_12mb/target.cfg                | 3 ++-
 config/coreboot/x200_16mb/target.cfg                | 1 +
 config/coreboot/x200_4mb/target.cfg                 | 1 +
 config/coreboot/x200_8mb/target.cfg                 | 1 +
 config/coreboot/x220_8mb/target.cfg                 | 1 +
 config/coreboot/x230_12mb/target.cfg                | 1 +
 config/coreboot/x230_16mb/target.cfg                | 1 +
 config/coreboot/x230t_12mb/target.cfg               | 1 +
 config/coreboot/x230t_16mb/target.cfg               | 1 +
 config/coreboot/x301_16mb/target.cfg                | 1 +
 config/coreboot/x301_4mb/target.cfg                 | 1 +
 config/coreboot/x301_8mb/target.cfg                 | 1 +
 config/coreboot/x60/target.cfg                      | 3 ++-
 config/coreboot/x60_16mb/target.cfg                 | 3 ++-
 config/data/coreboot/mkhelper.cfg                   | 2 +-
 85 files changed, 113 insertions(+), 30 deletions(-)

diff --git a/config/coreboot/dell3050micro_fsp_16mb/target.cfg b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
index d6bd3872..8ab796e4 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/target.cfg
+++ b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
@@ -6,5 +6,6 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="3050micro"
-build_depend="seabios/default grub/xhci memtest86plus"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
 IFD_platform="sklkbl"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/dell7010sff_12mb/target.cfg b/config/coreboot/dell7010sff_12mb/target.cfg
index abc1d14e..aa08547a 100644
--- a/config/coreboot/dell7010sff_12mb/target.cfg
+++ b/config/coreboot/dell7010sff_12mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="t1650"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/dell780mt_8mb/target.cfg b/config/coreboot/dell780mt_8mb/target.cfg
index eca44aa2..50ea82b6 100644
--- a/config/coreboot/dell780mt_8mb/target.cfg
+++ b/config/coreboot/dell780mt_8mb/target.cfg
@@ -5,4 +5,5 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/dell780mt_truncate_8mb/target.cfg b/config/coreboot/dell780mt_truncate_8mb/target.cfg
index eca44aa2..50ea82b6 100644
--- a/config/coreboot/dell780mt_truncate_8mb/target.cfg
+++ b/config/coreboot/dell780mt_truncate_8mb/target.cfg
@@ -5,4 +5,5 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/dell780usff_8mb/target.cfg b/config/coreboot/dell780usff_8mb/target.cfg
index eca44aa2..50ea82b6 100644
--- a/config/coreboot/dell780usff_8mb/target.cfg
+++ b/config/coreboot/dell780usff_8mb/target.cfg
@@ -5,4 +5,5 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/dell780usff_truncate_8mb/target.cfg b/config/coreboot/dell780usff_truncate_8mb/target.cfg
index eca44aa2..50ea82b6 100644
--- a/config/coreboot/dell780usff_truncate_8mb/target.cfg
+++ b/config/coreboot/dell780usff_truncate_8mb/target.cfg
@@ -5,4 +5,5 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/dell9020mt_nri_12mb/target.cfg b/config/coreboot/dell9020mt_nri_12mb/target.cfg
index e7411d7f..5be15ac2 100644
--- a/config/coreboot/dell9020mt_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_nri_12mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
-build_depend="seabios/default grub/xhci memtest86plus"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/dell9020sff_nri_12mb/target.cfg b/config/coreboot/dell9020sff_nri_12mb/target.cfg
index e7411d7f..5be15ac2 100644
--- a/config/coreboot/dell9020sff_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_nri_12mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
-build_depend="seabios/default grub/xhci memtest86plus"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e4300_4mb/target.cfg b/config/coreboot/e4300_4mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/e4300_4mb/target.cfg
+++ b/config/coreboot/e4300_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6220_10mb/target.cfg b/config/coreboot/e6220_10mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/e6220_10mb/target.cfg
+++ b/config/coreboot/e6220_10mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6230_12mb/target.cfg b/config/coreboot/e6230_12mb/target.cfg
index 2556a4ce..5bd85905 100644
--- a/config/coreboot/e6230_12mb/target.cfg
+++ b/config/coreboot/e6230_12mb/target.cfg
@@ -5,3 +5,5 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6320_10mb/target.cfg b/config/coreboot/e6320_10mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/e6320_10mb/target.cfg
+++ b/config/coreboot/e6320_10mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6330_12mb/target.cfg b/config/coreboot/e6330_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/e6330_12mb/target.cfg
+++ b/config/coreboot/e6330_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index 98eb8d3b..a0b322d3 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="e6400"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
index 98eb8d3b..a0b322d3 100644
--- a/config/coreboot/e6400nvidia_4mb/target.cfg
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="e6400"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/g43t_am3/target.cfg b/config/coreboot/g43t_am3/target.cfg
index 7f3d7886..7bc27788 100644
--- a/config/coreboot/g43t_am3/target.cfg
+++ b/config/coreboot/g43t_am3/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/g43t_am3_16mb/target.cfg b/config/coreboot/g43t_am3_16mb/target.cfg
index 594b6612..bef863ee 100644
--- a/config/coreboot/g43t_am3_16mb/target.cfg
+++ b/config/coreboot/g43t_am3_16mb/target.cfg
@@ -4,4 +4,5 @@ payload_seabios="y"
 payload_memtest="y"
 release="n"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index f7544548..f12beab7 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2170p"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index a9dfe4e4..a3f8ba84 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2560p"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index 928527da..d899d7d9 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2570p"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 54966da1..8d18ae23 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="hp8200sff"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 54966da1..8d18ae23 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="hp8200sff"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index 99be701a..be150000 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -7,4 +7,5 @@ release="n"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="hp820g2"
-build_depend="seabios/default grub/xhci memtest86plus"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index d0e19b73..7cbc8dad 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="ivybridge"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index b39036ba..5897b9bc 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8460pintel"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index d960f36b..72e64b8a 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8470pintel"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg
index 7bad4889..dcdd1dc8 100644
--- a/config/coreboot/hp8560w_8mb/target.cfg
+++ b/config/coreboot/hp8560w_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8560w"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index 35a0a6fd..4580be7b 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp9470m"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/kcma_d8_16mb/target.cfg b/config/coreboot/kcma_d8_16mb/target.cfg
index 5f705f43..b0ab3d02 100644
--- a/config/coreboot/kcma_d8_16mb/target.cfg
+++ b/config/coreboot/kcma_d8_16mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/kcma_d8_2mb/target.cfg b/config/coreboot/kcma_d8_2mb/target.cfg
index 5f705f43..b0ab3d02 100644
--- a/config/coreboot/kcma_d8_2mb/target.cfg
+++ b/config/coreboot/kcma_d8_2mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/kfsn4_dre_1mb/target.cfg b/config/coreboot/kfsn4_dre_1mb/target.cfg
index 57e64580..c5759ac8 100644
--- a/config/coreboot/kfsn4_dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_1mb/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
-build_depend="seabios/default memtest86plus"
+build_depend="seabios/default memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/kfsn4_dre_2mb/target.cfg b/config/coreboot/kfsn4_dre_2mb/target.cfg
index 606962a2..94601104 100644
--- a/config/coreboot/kfsn4_dre_2mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_2mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 xlang="c"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/kgpe_d16_16mb/target.cfg b/config/coreboot/kgpe_d16_16mb/target.cfg
index 5f705f43..b0ab3d02 100644
--- a/config/coreboot/kgpe_d16_16mb/target.cfg
+++ b/config/coreboot/kgpe_d16_16mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/kgpe_d16_2mb/target.cfg b/config/coreboot/kgpe_d16_2mb/target.cfg
index 5f705f43..b0ab3d02 100644
--- a/config/coreboot/kgpe_d16_2mb/target.cfg
+++ b/config/coreboot/kgpe_d16_2mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index 9ceb99e8..2661c6b2 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
-build_depend="seabios/default grub/default"
+build_depend="seabios/default grub/default u-boot/i386coreboot"
+payload_uboot_i386="y"
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index a53a1668..e37b6307 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 scan_scan_disk="ahci"
-build_depend="seabios/default grub/default"
+build_depend="seabios/default grub/default u-boot/i386coreboot"
+payload_uboot_i386="y"
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/qemu_x86_64_12mb/target.cfg b/config/coreboot/qemu_x86_64_12mb/target.cfg
index 3db013b4..5c1a733f 100644
--- a/config/coreboot/qemu_x86_64_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_64_12mb/target.cfg
@@ -3,5 +3,4 @@ xarch="i386-elf"
 payload_grub="y"
 payload_seabios="y"
 payload_memtest="y"
-build_depend="seabios/default grub/default memtest86plus u-boot/amd64coreboot"
 payload_uboot_amd64="y"
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index f596cc06..ba490833 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -3,3 +3,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index abc1d14e..aa08547a 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="t1650"
-build_depend="seabios/default grub/nvme memtest86plus"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index e7411d7f..5be15ac2 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
-build_depend="seabios/default grub/xhci memtest86plus"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 9ceb99e8..2661c6b2 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
-build_depend="seabios/default grub/default"
+build_depend="seabios/default grub/default u-boot/i386coreboot"
+payload_uboot_i386="y"
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 9ceb99e8..2661c6b2 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
-build_depend="seabios/default grub/default"
+build_depend="seabios/default grub/default u-boot/i386coreboot"
+payload_uboot_i386="y"
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index e7411d7f..5be15ac2 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -6,4 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
-build_depend="seabios/default grub/xhci memtest86plus"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index 4a9af479..0b81f02f 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -4,3 +4,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index 4201beb1..27291f4d 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/x230_12mb/target.cfg
+++ b/config/coreboot/x230_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/x230t_12mb/target.cfg
+++ b/config/coreboot/x230t_12mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index 2556a4ce..c0b56379 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index 16ffc818..a364653c 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index 16ffc818..a364653c 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index 16ffc818..a364653c 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -5,3 +5,4 @@ payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 9ceb99e8..2661c6b2 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
-build_depend="seabios/default grub/default"
+build_depend="seabios/default grub/default u-boot/i386coreboot"
+payload_uboot_i386="y"
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 9ceb99e8..2661c6b2 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -3,4 +3,5 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
-build_depend="seabios/default grub/default"
+build_depend="seabios/default grub/default u-boot/i386coreboot"
+payload_uboot_i386="y"
diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index a912400f..a218e0e7 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -1,7 +1,7 @@
 . "include/rom.sh"
 
 makeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
-build_depend="seabios/default grub/default memtest86plus"
+build_depend="seabios/default grub/default memtest86plus u-boot/amd64coreboot"
 
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 

From 279e69172f724eab326b52f0aa2c64003c4e1f7f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 19 Nov 2024 23:26:28 +0000
Subject: [PATCH 0879/1549] make the u-boot grub menuentry more useful

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/default/config/payload | 2 +-
 config/grub/nvme/config/payload    | 2 +-
 config/grub/xhci/config/payload    | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/config/grub/default/config/payload b/config/grub/default/config/payload
index a05cbfda..c2036c72 100644
--- a/config/grub/default/config/payload
+++ b/config/grub/default/config/payload
@@ -217,7 +217,7 @@ menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey=
 }
 fi
 if [ -f (cbfsdisk)/img/u-boot ]; then
-menuentry 'Highly experimental U-Boot payload [u]' --hotkey='u' {
+menuentry 'Experimental U-Boot UEFI payload (try from SeaBIOS ESC menu if GRUB fails) [u]' --hotkey='u' {
 	set root='cbfsdisk'
 	chainloader /img/u-boot
 }
diff --git a/config/grub/nvme/config/payload b/config/grub/nvme/config/payload
index 7f44b2bd..1d7c06d4 100644
--- a/config/grub/nvme/config/payload
+++ b/config/grub/nvme/config/payload
@@ -235,7 +235,7 @@ menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey=
 }
 fi
 if [ -f (cbfsdisk)/img/u-boot ]; then
-menuentry 'Highly experimental U-Boot payload [u]' --hotkey='u' {
+menuentry 'Experimental U-Boot UEFI payload (try from SeaBIOS ESC menu if GRUB fails) [u]' --hotkey='u' {
 	set root='cbfsdisk'
 	chainloader /img/u-boot
 }
diff --git a/config/grub/xhci/config/payload b/config/grub/xhci/config/payload
index 4093edee..dea4cdce 100644
--- a/config/grub/xhci/config/payload
+++ b/config/grub/xhci/config/payload
@@ -236,7 +236,7 @@ menuentry 'Load test configuration (grubtest.cfg) in CBFS  [t]' --hotkey='t' {
 }
 fi
 if [ -f (cbfsdisk)/img/u-boot ]; then
-menuentry 'Highly experimental U-Boot payload [u]' --hotkey='u' {
+menuentry 'Experimental U-Boot UEFI payload (try from SeaBIOS ESC menu if GRUB fails) [u]' --hotkey='u' {
 	set root='cbfsdisk'
 	chainloader /img/u-boot
 }

From eb14a176bc8e2b943ab0e36159fd86b4a556708e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 20 Nov 2024 01:19:27 +0000
Subject: [PATCH 0880/1549] Only boot 32-bit u-boot from grub, 64 from seabios

For some reason, 32-bit U-Boot only works when executed from
GRUB, but not SeaBIOS; 64-bit U-Boot only works from SeaBIOS!

This will have to be investigated. Standalone U-Boot, where
U-Boot is the primary payload, has not yet been tested in
Libreboot, and will not be provided for some time due to
stability concerns. More testing is needed!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/default/config/payload | 22 ++++++++++++++++++----
 config/grub/nvme/config/payload    | 22 ++++++++++++++++++----
 config/grub/xhci/config/payload    | 22 ++++++++++++++++++----
 include/rom.sh                     |  3 ++-
 4 files changed, 56 insertions(+), 13 deletions(-)

diff --git a/config/grub/default/config/payload b/config/grub/default/config/payload
index c2036c72..05e64bbd 100644
--- a/config/grub/default/config/payload
+++ b/config/grub/default/config/payload
@@ -216,24 +216,38 @@ menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey=
 	fi
 }
 fi
-if [ -f (cbfsdisk)/img/u-boot ]; then
-menuentry 'Experimental U-Boot UEFI payload (try from SeaBIOS ESC menu if GRUB fails) [u]' --hotkey='u' {
+if [ -f (cbfsdisk)/u-boot ]; then
+menuentry 'U-Boot i386 payload (experimental) [u]' --hotkey='u' {
 	set root='cbfsdisk'
-	chainloader /img/u-boot
+	chainloader /u-boot
 }
 fi
 if [ -f (cbfsdisk)/seabios.elf ]; then
-menuentry 'Load SeaBIOS (payload) [b]' --hotkey='b' {
+if [ -f (cbfsdisk)/img/u-boot ]; then
+menuentry 'Load SeaBIOS (U-Boot UEFI available in the ESC menu) [b]' --hotkey='b' {
+	set root='cbfsdisk'
+	chainloader /seabios.elf
+}
+else
+menuentry 'Load SeaBIOS [b]' --hotkey='b' {
 	set root='cbfsdisk'
 	chainloader /seabios.elf
 }
 fi
+fi
 if [ -f (cbfsdisk)/img/grub2 ]; then
+if [ -f (cbfsdisk)/img/u-boot ]; then
+menuentry 'Return to SeaBIOS (U-Boot UEFI available in the ESC menu) [b]' --hotkey='b' {
+	set root='cbfsdisk'
+	chainloader /fallback/payload
+}
+else
 menuentry 'Return to SeaBIOS [b]' --hotkey='b' {
 	set root='cbfsdisk'
 	chainloader /fallback/payload
 }
 fi
+fi
 menuentry 'Poweroff  [p]' --hotkey='p' {
 	halt
 }
diff --git a/config/grub/nvme/config/payload b/config/grub/nvme/config/payload
index 1d7c06d4..52b8dfd9 100644
--- a/config/grub/nvme/config/payload
+++ b/config/grub/nvme/config/payload
@@ -234,24 +234,38 @@ menuentry 'Load test configuration (grubtest.cfg) inside of CBFS  [t]' --hotkey=
 	fi
 }
 fi
-if [ -f (cbfsdisk)/img/u-boot ]; then
-menuentry 'Experimental U-Boot UEFI payload (try from SeaBIOS ESC menu if GRUB fails) [u]' --hotkey='u' {
+if [ -f (cbfsdisk)/u-boot ]; then
+menuentry 'U-Boot i386 payload (experimental) [u]' --hotkey='u' {
 	set root='cbfsdisk'
-	chainloader /img/u-boot
+	chainloader /u-boot
 }
 fi
 if [ -f (cbfsdisk)/seabios.elf ]; then
-menuentry 'Load SeaBIOS (payload) [b]' --hotkey='b' {
+if [ -f (cbfsdisk)/img/u-boot ]; then
+menuentry 'Load SeaBIOS (U-Boot UEFI available in the ESC menu) [b]' --hotkey='b' {
+	set root='cbfsdisk'
+	chainloader /seabios.elf
+}
+else
+menuentry 'Load SeaBIOS [b]' --hotkey='b' {
 	set root='cbfsdisk'
 	chainloader /seabios.elf
 }
 fi
+fi
 if [ -f (cbfsdisk)/img/grub2 ]; then
+if [ -f (cbfsdisk)/img/u-boot ]; then
+menuentry 'Return to SeaBIOS (U-Boot UEFI available in the ESC menu) [b]' --hotkey='b' {
+	set root='cbfsdisk'
+	chainloader /fallback/payload
+}
+else
 menuentry 'Return to SeaBIOS [b]' --hotkey='b' {
 	set root='cbfsdisk'
 	chainloader /fallback/payload
 }
 fi
+fi
 menuentry 'Poweroff  [p]' --hotkey='p' {
 	halt
 }
diff --git a/config/grub/xhci/config/payload b/config/grub/xhci/config/payload
index dea4cdce..6a0fc250 100644
--- a/config/grub/xhci/config/payload
+++ b/config/grub/xhci/config/payload
@@ -235,24 +235,38 @@ menuentry 'Load test configuration (grubtest.cfg) in CBFS  [t]' --hotkey='t' {
 	fi
 }
 fi
-if [ -f (cbfsdisk)/img/u-boot ]; then
-menuentry 'Experimental U-Boot UEFI payload (try from SeaBIOS ESC menu if GRUB fails) [u]' --hotkey='u' {
+if [ -f (cbfsdisk)/u-boot ]; then
+menuentry 'U-Boot i386 payload (experimental) [u]' --hotkey='u' {
 	set root='cbfsdisk'
-	chainloader /img/u-boot
+	chainloader /u-boot
 }
 fi
 if [ -f (cbfsdisk)/seabios.elf ]; then
-menuentry 'Load SeaBIOS (payload) [b]' --hotkey='b' {
+if [ -f (cbfsdisk)/img/u-boot ]; then
+menuentry 'Load SeaBIOS (U-Boot UEFI available in the ESC menu) [b]' --hotkey='b' {
+	set root='cbfsdisk'
+	chainloader /seabios.elf
+}
+else
+menuentry 'Load SeaBIOS [b]' --hotkey='b' {
 	set root='cbfsdisk'
 	chainloader /seabios.elf
 }
 fi
+fi
 if [ -f (cbfsdisk)/img/grub2 ]; then
+if [ -f (cbfsdisk)/img/u-boot ]; then
+menuentry 'Return to SeaBIOS (U-Boot UEFI available in the ESC menu) [b]' --hotkey='b' {
+	set root='cbfsdisk'
+	chainloader /fallback/payload
+}
+else
 menuentry 'Return to SeaBIOS [b]' --hotkey='b' {
 	set root='cbfsdisk'
 	chainloader /fallback/payload
 }
 fi
+fi
 menuentry 'Poweroff  [p]' --hotkey='p' {
 	halt
 }
diff --git a/include/rom.sh b/include/rom.sh
index 808f83a4..96c7081a 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -187,8 +187,9 @@ add_uboot()
 	    [ "$payload_uboot_amd64" = "y" ]; then
 		ubcbfsargs="-l 0x1110000 -e 0x1110000" # 64-bit and 32-bit
 			# on 64-bit, 0x1120000 is the SPL, and stub before that
-		ubpath="img/u-boot"
+		ubpath="img/u-boot" # 64-bit
 		ubtarget="amd64coreboot"
+		[ "$payload_uboot_i386" = "y" ] && ubpath="u-boot" # 32-bit
 		[ "$payload_uboot_i386" = "y" ] && ubtarget="i386coreboot"; :
 	fi
 

From 0c7fb21a06294d973abaae8c01b5c21b3614ccd7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 20 Nov 2024 11:29:53 +0000
Subject: [PATCH 0881/1549] enable the serial console on thinkpad t60

it has one on the docking station

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              | 35 +++++++++++++++----
 .../config/libgfxinit_txtmode                 | 35 +++++++++++++++----
 .../t60_intelgpu/config/libgfxinit_corebootfb | 35 +++++++++++++++----
 .../t60_intelgpu/config/libgfxinit_txtmode    | 35 +++++++++++++++----
 4 files changed, 116 insertions(+), 24 deletions(-)

diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
index 4db373a7..2568061d 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
@@ -117,10 +117,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x01000000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t60"
@@ -200,8 +202,9 @@ CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x100000
@@ -447,6 +450,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -534,22 +538,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -557,7 +578,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -604,12 +625,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
index 1829c377..0092e5fd 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
@@ -117,10 +117,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x01000000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t60"
@@ -200,8 +202,9 @@ CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x100000
@@ -445,6 +448,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -532,22 +536,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -555,7 +576,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -602,12 +623,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
index 55f101f6..b1cc51c6 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
@@ -117,10 +117,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x00200000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t60"
@@ -200,8 +202,9 @@ CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x100000
@@ -447,6 +450,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -534,22 +538,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -557,7 +578,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -604,12 +625,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
index 7e1a8807..1b4b4202 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
@@ -117,10 +117,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x00200000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t60"
@@ -200,8 +202,9 @@ CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x100000
@@ -445,6 +448,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -532,22 +536,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -555,7 +576,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -602,12 +623,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set

From b109617752f913c9a1f83b51ae974b98746345c4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 20 Nov 2024 11:31:37 +0000
Subject: [PATCH 0882/1549] enable the serial console on thinkpad x60

it has one on the docking station

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../coreboot/x60/config/libgfxinit_corebootfb | 35 +++++++++++++++----
 config/coreboot/x60/config/libgfxinit_txtmode | 35 +++++++++++++++----
 .../x60_16mb/config/libgfxinit_corebootfb     | 35 +++++++++++++++----
 .../x60_16mb/config/libgfxinit_txtmode        | 35 +++++++++++++++----
 4 files changed, 116 insertions(+), 24 deletions(-)

diff --git a/config/coreboot/x60/config/libgfxinit_corebootfb b/config/coreboot/x60/config/libgfxinit_corebootfb
index 432da395..243333dd 100644
--- a/config/coreboot/x60/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60/config/libgfxinit_corebootfb
@@ -117,10 +117,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x00200000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_IRQ_SLOT_COUNT=18
@@ -201,8 +203,9 @@ CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x100000
@@ -453,6 +456,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -540,22 +544,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -563,7 +584,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -612,6 +633,7 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
@@ -619,6 +641,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x60/config/libgfxinit_txtmode b/config/coreboot/x60/config/libgfxinit_txtmode
index 9cbd428a..a984779c 100644
--- a/config/coreboot/x60/config/libgfxinit_txtmode
+++ b/config/coreboot/x60/config/libgfxinit_txtmode
@@ -117,10 +117,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x00200000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_IRQ_SLOT_COUNT=18
@@ -201,8 +203,9 @@ CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x100000
@@ -451,6 +454,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -538,22 +542,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -561,7 +582,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -610,6 +631,7 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
@@ -617,6 +639,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
index 93d86ad5..617e05b2 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
@@ -117,10 +117,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x01000000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_IRQ_SLOT_COUNT=18
@@ -201,8 +203,9 @@ CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x100000
@@ -453,6 +456,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -540,22 +544,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -563,7 +584,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -612,6 +633,7 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
@@ -619,6 +641,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_txtmode b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
index d46b991e..f9063d40 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
@@ -117,10 +117,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
 CONFIG_CBFS_SIZE=0x01000000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_IRQ_SLOT_COUNT=18
@@ -201,8 +203,9 @@ CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
 CONFIG_HEAP_SIZE=0x100000
@@ -451,6 +454,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
@@ -538,22 +542,39 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -561,7 +582,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -610,6 +631,7 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
@@ -617,6 +639,7 @@ CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set

From b79bd736e70ee33a466499e7cf4d35daf06f2b2e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 20 Nov 2024 12:02:45 +0000
Subject: [PATCH 0883/1549] enable serial debug on hp elite 8200 sff

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              | 35 +++++++++++++++----
 .../hp8200sff_4mb/config/libgfxinit_txtmode   | 35 +++++++++++++++----
 .../config/libgfxinit_corebootfb              | 35 +++++++++++++++----
 .../hp8200sff_8mb/config/libgfxinit_txtmode   | 35 +++++++++++++++----
 4 files changed, 116 insertions(+), 24 deletions(-)

diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
index fee1b405..81ca81de 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
@@ -116,12 +116,14 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="HP"
 CONFIG_CBFS_SIZE=0x3DFE00
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -190,9 +192,10 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
@@ -454,6 +457,7 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -554,22 +558,39 @@ CONFIG_RTC=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -577,7 +598,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -621,12 +642,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
index 8ec24130..cacd0278 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
@@ -116,10 +116,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="HP"
 CONFIG_CBFS_SIZE=0x3DFE00
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -188,9 +190,10 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
@@ -450,6 +453,7 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -551,22 +555,39 @@ CONFIG_RTC=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -574,7 +595,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -618,12 +639,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
index 7adc1b3b..44097f5c 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
@@ -116,12 +116,14 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="HP"
 CONFIG_CBFS_SIZE=0x7E9000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -190,9 +192,10 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
@@ -454,6 +457,7 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -554,22 +558,39 @@ CONFIG_RTC=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -577,7 +598,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -621,12 +642,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
index fe2ed050..c5fb624b 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
@@ -116,10 +116,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="HP"
 CONFIG_CBFS_SIZE=0x7E9000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_OVERRIDE_DEVICETREE=""
@@ -188,9 +190,10 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
@@ -450,6 +453,7 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -551,22 +555,39 @@ CONFIG_RTC=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
 CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
 # CONFIG_CMOS_POST is not set
@@ -574,7 +595,7 @@ CONFIG_POST_DEVICE_NONE=y
 # CONFIG_POST_DEVICE_LPC is not set
 # CONFIG_POST_DEVICE_PCI_PCIE is not set
 CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_NULL=y
+CONFIG_HWBASE_DEBUG_CB=y
 # end of Console
 
 CONFIG_HAVE_ACPI_RESUME=y
@@ -618,12 +639,14 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set

From a68b468964de7bb84977a592538fc5904ee69c21 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 20 Nov 2024 12:07:18 +0000
Subject: [PATCH 0884/1549] enable serial debug on HP EliteBook 8460p

there's a uart on the docking station

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              | 26 +++++++++++++++++--
 .../config/libgfxinit_txtmode                 | 26 +++++++++++++++++--
 2 files changed, 48 insertions(+), 4 deletions(-)

diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
index e6dc0b34..eacdf0c2 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
@@ -115,12 +115,14 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="HP"
 CONFIG_CBFS_SIZE=0x7E9000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
 CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="8460p"
@@ -193,8 +195,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
@@ -470,6 +473,7 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -571,10 +575,27 @@ CONFIG_RTC=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
@@ -638,6 +659,7 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
index 19d012f2..d4ad6fd6 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
@@ -115,10 +115,12 @@ CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="HP"
 CONFIG_CBFS_SIZE=0x7E9000
+CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="8460p"
@@ -191,8 +193,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_TTYS0_BAUD=115200
 CONFIG_D3COLD_SUPPORT=y
-# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_DRIVERS_UART_8250IO=y
 CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
 CONFIG_HEAP_SIZE=0x100000
 CONFIG_EC_GPE_SCI=0x50
@@ -466,6 +469,7 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_TPM_INIT_RAMSTAGE=y
 # CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
@@ -568,10 +572,27 @@ CONFIG_RTC=y
 CONFIG_BOOTBLOCK_CONSOLE=y
 CONFIG_POSTCAR_CONSOLE=y
 CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
 # CONFIG_SPKMODEM is not set
 # CONFIG_CONSOLE_NE2K is not set
 CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
 # CONFIG_CONSOLE_SPI_FLASH is not set
 # CONFIG_CONSOLE_I2C_SMBUS is not set
 # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
@@ -635,6 +656,7 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
+# CONFIG_GDB_STUB is not set
 # CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y

From 32dced8cd833b40d375aaa33d604771e8390cd0b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 20 Nov 2024 13:24:14 +0000
Subject: [PATCH 0885/1549] disable U-Boot for now on HP EliteBook 8560w

dGPU only, and starts in text mode.

will have to test with vesa framebuffer later on.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/hp8560w_8mb/target.cfg | 1 -
 1 file changed, 1 deletion(-)

diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg
index dcdd1dc8..7bad4889 100644
--- a/config/coreboot/hp8560w_8mb/target.cfg
+++ b/config/coreboot/hp8560w_8mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8560w"
-payload_uboot_amd64="y"
\ No newline at end of file

From 02e66ae01ae7bb9ae0dbab2903a2080f575151e1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 20 Nov 2024 15:44:35 +0000
Subject: [PATCH 0886/1549] U-Boot x86: Avoid clearing the VESA display

This is a patch from Simon Glass. U-Boot clears the display
when it starts up, but was asking the VESA driver to do the
same, needlessly; this patch avoids the latter.

A further patch is also included, which provides a better
message when jumping into long mode on the SPL (64-bit) target,
dumping it on the serial console instead of using printf.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...-x86-Avoid-clearing-the-VESA-display.patch | 34 +++++++++++++++++++
 ...-x86-Avoid-clearing-the-VESA-display.patch | 29 ++++++++++++++++
 ...-x86-Avoid-clearing-the-VESA-display.patch | 34 +++++++++++++++++++
 ...-x86-Avoid-clearing-the-VESA-display.patch | 29 ++++++++++++++++
 4 files changed, 126 insertions(+)
 create mode 100644 config/u-boot/x86/patches/0002-x86-Avoid-clearing-the-VESA-display.patch
 create mode 100644 config/u-boot/x86/patches/0003-x86-Avoid-clearing-the-VESA-display.patch
 create mode 100644 config/u-boot/x86_64/patches/0002-x86-Avoid-clearing-the-VESA-display.patch
 create mode 100644 config/u-boot/x86_64/patches/0003-x86-Avoid-clearing-the-VESA-display.patch

diff --git a/config/u-boot/x86/patches/0002-x86-Avoid-clearing-the-VESA-display.patch b/config/u-boot/x86/patches/0002-x86-Avoid-clearing-the-VESA-display.patch
new file mode 100644
index 00000000..7fb75772
--- /dev/null
+++ b/config/u-boot/x86/patches/0002-x86-Avoid-clearing-the-VESA-display.patch
@@ -0,0 +1,34 @@
+From a6b9e69a21970951252419b5b5fa9c04fabbf1a4 Mon Sep 17 00:00:00 2001
+From: Simon Glass <sjg@chromium.org>
+Date: Tue, 12 Nov 2024 06:59:02 -0700
+Subject: [PATCH 1/2] x86: Avoid clearing the VESA display
+
+U-Boot clears the display when it starts up, so there is no need to ask
+the VESA driver to do this. Fix this and add a comment explaining the
+flags.
+
+Signed-off-by: Simon Glass <sjg@chromium.org>
+---
+ arch/x86/lib/bios.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/arch/x86/lib/bios.c b/arch/x86/lib/bios.c
+index 03f7360032..374f4f20b8 100644
+--- a/arch/x86/lib/bios.c
++++ b/arch/x86/lib/bios.c
+@@ -228,7 +228,11 @@ static void vbe_set_graphics(int vesa_mode, struct vesa_state *mode_info)
+ {
+ 	unsigned char *framebuffer;
+ 
+-	mode_info->video_mode = (1 << 14) | vesa_mode;
++	/*
++	 * bit 14 is linear-framebuffer mode
++	 * bit 15 means don't clear the display
++	 */
++	mode_info->video_mode = (1 << 14) | (1 << 15) | vesa_mode;
+ 	vbe_get_mode_info(mode_info);
+ 
+ 	framebuffer = (unsigned char *)(ulong)mode_info->vesa.phys_base_ptr;
+-- 
+2.39.5
+
diff --git a/config/u-boot/x86/patches/0003-x86-Avoid-clearing-the-VESA-display.patch b/config/u-boot/x86/patches/0003-x86-Avoid-clearing-the-VESA-display.patch
new file mode 100644
index 00000000..bb33d6fd
--- /dev/null
+++ b/config/u-boot/x86/patches/0003-x86-Avoid-clearing-the-VESA-display.patch
@@ -0,0 +1,29 @@
+From d098961a91c8f410f50ae31e60300c0ef1f67075 Mon Sep 17 00:00:00 2001
+From: Simon Glass <sjg@chromium.org>
+Date: Tue, 12 Nov 2024 06:59:06 -0700
+Subject: [PATCH 2/2] x86: Drop the message about features missing in 64-bit
+
+This functions normally and has done for a while, so drop this scary
+message.
+
+Signed-off-by: Simon Glass <sjg@chromium.org>
+---
+ arch/x86/lib/spl.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c
+index f761fbc8bc..656f59ede0 100644
+--- a/arch/x86/lib/spl.c
++++ b/arch/x86/lib/spl.c
+@@ -283,7 +283,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
+ {
+ 	int ret;
+ 
+-	printf("Jumping to 64-bit U-Boot: Note many features are missing\n");
++	log_debug("Jumping to 64-bit U-Boot\n");
+ 	ret = cpu_jump_to_64bit_uboot(spl_image->entry_point);
+ 	debug("ret=%d\n", ret);
+ 	hang();
+-- 
+2.39.5
+
diff --git a/config/u-boot/x86_64/patches/0002-x86-Avoid-clearing-the-VESA-display.patch b/config/u-boot/x86_64/patches/0002-x86-Avoid-clearing-the-VESA-display.patch
new file mode 100644
index 00000000..7fb75772
--- /dev/null
+++ b/config/u-boot/x86_64/patches/0002-x86-Avoid-clearing-the-VESA-display.patch
@@ -0,0 +1,34 @@
+From a6b9e69a21970951252419b5b5fa9c04fabbf1a4 Mon Sep 17 00:00:00 2001
+From: Simon Glass <sjg@chromium.org>
+Date: Tue, 12 Nov 2024 06:59:02 -0700
+Subject: [PATCH 1/2] x86: Avoid clearing the VESA display
+
+U-Boot clears the display when it starts up, so there is no need to ask
+the VESA driver to do this. Fix this and add a comment explaining the
+flags.
+
+Signed-off-by: Simon Glass <sjg@chromium.org>
+---
+ arch/x86/lib/bios.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/arch/x86/lib/bios.c b/arch/x86/lib/bios.c
+index 03f7360032..374f4f20b8 100644
+--- a/arch/x86/lib/bios.c
++++ b/arch/x86/lib/bios.c
+@@ -228,7 +228,11 @@ static void vbe_set_graphics(int vesa_mode, struct vesa_state *mode_info)
+ {
+ 	unsigned char *framebuffer;
+ 
+-	mode_info->video_mode = (1 << 14) | vesa_mode;
++	/*
++	 * bit 14 is linear-framebuffer mode
++	 * bit 15 means don't clear the display
++	 */
++	mode_info->video_mode = (1 << 14) | (1 << 15) | vesa_mode;
+ 	vbe_get_mode_info(mode_info);
+ 
+ 	framebuffer = (unsigned char *)(ulong)mode_info->vesa.phys_base_ptr;
+-- 
+2.39.5
+
diff --git a/config/u-boot/x86_64/patches/0003-x86-Avoid-clearing-the-VESA-display.patch b/config/u-boot/x86_64/patches/0003-x86-Avoid-clearing-the-VESA-display.patch
new file mode 100644
index 00000000..bb33d6fd
--- /dev/null
+++ b/config/u-boot/x86_64/patches/0003-x86-Avoid-clearing-the-VESA-display.patch
@@ -0,0 +1,29 @@
+From d098961a91c8f410f50ae31e60300c0ef1f67075 Mon Sep 17 00:00:00 2001
+From: Simon Glass <sjg@chromium.org>
+Date: Tue, 12 Nov 2024 06:59:06 -0700
+Subject: [PATCH 2/2] x86: Drop the message about features missing in 64-bit
+
+This functions normally and has done for a while, so drop this scary
+message.
+
+Signed-off-by: Simon Glass <sjg@chromium.org>
+---
+ arch/x86/lib/spl.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c
+index f761fbc8bc..656f59ede0 100644
+--- a/arch/x86/lib/spl.c
++++ b/arch/x86/lib/spl.c
+@@ -283,7 +283,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
+ {
+ 	int ret;
+ 
+-	printf("Jumping to 64-bit U-Boot: Note many features are missing\n");
++	log_debug("Jumping to 64-bit U-Boot\n");
+ 	ret = cpu_jump_to_64bit_uboot(spl_image->entry_point);
+ 	debug("ret=%d\n", ret);
+ 	hang();
+-- 
+2.39.5
+

From 7d1fd1cc6a176d15d8a938cd0df9868cbbb86d8f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 21 Nov 2024 12:29:05 +0000
Subject: [PATCH 0887/1549] rom.sh: Support SeaUBoot for 64-bit x86 U-Boot

Same concept as SeaGRUB, but for U-Boot. SeaBIOS starts, but
has a bootorder file loading U-Boot first, from flash.

You can interrupt it with the ESC menu, to boot something else
in SeaBIOS, including GRUB.

With this, we can effectively provide extremely user-friendly
UEFI-first setups in Libreboot.

Take that, edk2!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/grub/bootorder_uboot |   1 +
 config/ifd/dell9020mt/gbe        | Bin 8192 -> 8192 bytes
 include/rom.sh                   |  11 ++++++++---
 3 files changed, 9 insertions(+), 3 deletions(-)
 create mode 100644 config/data/grub/bootorder_uboot

diff --git a/config/data/grub/bootorder_uboot b/config/data/grub/bootorder_uboot
new file mode 100644
index 00000000..80641a36
--- /dev/null
+++ b/config/data/grub/bootorder_uboot
@@ -0,0 +1 @@
+/rom@img/u-boot
diff --git a/config/ifd/dell9020mt/gbe b/config/ifd/dell9020mt/gbe
index aed6737de3940f31912ce53e0f098ce51119d76d..88aa36c410b6242f6636f639dc4f348cc793e77b 100644
GIT binary patch
delta 46
jcmZp0XmDV=C0bmfx^5y{1=IP|$%0H`8>eOQV-*AdhdmHs

delta 46
jcmZp0XmDVY+wXh(;=PG%6-=zElLeW?Hcrdp$0`T_l3WmD

diff --git a/include/rom.sh b/include/rom.sh
index 96c7081a..c2896b85 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -154,7 +154,9 @@ add_seabios()
 
 	[ "$payload_grub" = "y" ] && add_grub
 
-	cprom && [ "$payload_grub" = "y" ] && pname="seagrub" && mkseagrub; :
+	cprom
+	[ "$payload_uboot_amd64" = "y" ] && pname="seauboot" && cprom "seauboot"
+	[ "$payload_grub" = "y" ] && pname="seagrub" && mkseagrub; :
 }
 
 add_grub()
@@ -210,11 +212,14 @@ add_uboot()
 cprom()
 {
 	newrom="bin/$target/${pname}_${target}_$initmode$displaymode.rom"
-	[ $# -gt 0 ] && newrom="${newrom%.rom}_${1%.gkb}.rom"
+	[ $# -gt 0 ] && [ "$1" != "seauboot" ] && \
+	    newrom="${newrom%.rom}_${1%.gkb}.rom"
 
 	x_ mkdir -p "bin/$target"
-	x_ cp "$tmprom" "$newrom" && [ $# -gt 0 ] && \
+	x_ cp "$tmprom" "$newrom" && [ $# -gt 0 ] && [ "$1" != "seauboot" ] && \
 	    cbfs "$newrom" "config/data/grub/keymap/$1" keymap.gkb raw
+	[ $# -gt 0 ] && [ "$1" = "seauboot" ] && \
+	    cbfs "$newrom" "config/data/grub/bootorder_uboot" "bootorder" raw
 
 	[ "$XBMK_RELEASE" = "y" ] || return 0
 	$dry mksha512sum "$newrom" "vendorhashes"; $dry ./vendor inject \

From 587d588fe4ccc1587a2ad189863aeb82a41e7252 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 21 Nov 2024 17:56:50 +0000
Subject: [PATCH 0888/1549] rom.sh: Don't build txtmode U-Boot images

U-Boot needs a VESA framebuffer or native coreboot
framebuffer to work properly.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index c2896b85..6ffbb228 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -95,7 +95,6 @@ mkcorebootbin()
 
 	initmode="${defconfig##*/}"; displaymode="${initmode##*_}"
 	initmode="${initmode%%_*}"
-	[ -n "$displaymode" ] && displaymode="_$displaymode"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 
 	[ "$payload_uboot_i386" = "y" ] && \
@@ -155,7 +154,8 @@ add_seabios()
 	[ "$payload_grub" = "y" ] && add_grub
 
 	cprom
-	[ "$payload_uboot_amd64" = "y" ] && pname="seauboot" && cprom "seauboot"
+	[ "$payload_uboot_amd64" = "y" ] && [ "$displaymode" != "txtmode" ] && \
+	    pname="seauboot" && cprom "seauboot"
 	[ "$payload_grub" = "y" ] && pname="seagrub" && mkseagrub; :
 }
 
@@ -177,6 +177,11 @@ mkseagrub()
 
 add_uboot()
 {
+	if [ "$displaymode" = "txtmode" ]; then
+		printf "cb/$target: Cannot use U-Boot in text mode\n" 1>&2
+		return 0
+	fi
+
 	# TODO: re-work to allow each coreboot target to say which ub tree
 	# instead of hardcoding as in the current logic below:
 
@@ -211,7 +216,8 @@ add_uboot()
 
 cprom()
 {
-	newrom="bin/$target/${pname}_${target}_$initmode$displaymode.rom"
+	newrom="bin/$target/${pname}_${target}_$initmode.rom"
+	[ -n "$displaymode" ] && newrom="${newrom%.rom}_$displaymode.rom"
 	[ $# -gt 0 ] && [ "$1" != "seauboot" ] && \
 	    newrom="${newrom%.rom}_${1%.gkb}.rom"
 

From f312e6026f926450a3d2fff29803c78099e8c3f8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 21 Nov 2024 18:24:50 +0000
Subject: [PATCH 0889/1549] rom.sh: Don't build U-Boot on normal initmode

The "normal" mode in lbmk is where no built-in GPU exists,
or no libgfxinit is used, and SeaBIOS is the first payload,
and SeaBIOS executes VGA ROMs (can't know if it'll start
in VESA or text mode).

U-Boot needs a VESA framebuffer or native coreboot
framebuffer to work correctly.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/include/rom.sh b/include/rom.sh
index 6ffbb228..c6cb2f5a 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -155,7 +155,7 @@ add_seabios()
 
 	cprom
 	[ "$payload_uboot_amd64" = "y" ] && [ "$displaymode" != "txtmode" ] && \
-	    pname="seauboot" && cprom "seauboot"
+	    [ "$initmode" != "normal" ] && pname="seauboot" && cprom "seauboot"
 	[ "$payload_grub" = "y" ] && pname="seagrub" && mkseagrub; :
 }
 
@@ -180,6 +180,9 @@ add_uboot()
 	if [ "$displaymode" = "txtmode" ]; then
 		printf "cb/$target: Cannot use U-Boot in text mode\n" 1>&2
 		return 0
+	elif [ "$initmode" = "normal" ]; then
+		printf "cb/$target: Cannot use U-Boot in normal initmode\n" 1>&2
+		return 0
 	fi
 
 	# TODO: re-work to allow each coreboot target to say which ub tree

From eea9fc40975a674c9a0c089a9c5f09598d29a80f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 21 Nov 2024 18:34:08 +0000
Subject: [PATCH 0890/1549] rom.sh: unset displaymode on normal initmode

Otherwise, you get "normal_normal" in the image name.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/rom.sh b/include/rom.sh
index c6cb2f5a..db6ce01d 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -94,6 +94,7 @@ mkcorebootbin()
 	$dry x_ cp "$srcdir/build/coreboot.rom" "$tmprom"
 
 	initmode="${defconfig##*/}"; displaymode="${initmode##*_}"
+	[ "$displaymode" = "$initmode" ] && displaymode="" # "normal" config
 	initmode="${initmode%%_*}"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 

From ef7db2054639d9dde6e23186c63d83a11b3310a4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 21 Nov 2024 18:35:59 +0000
Subject: [PATCH 0891/1549] e6400nvidia: Disable U-Boot

This uses the "normal" config. Previous changes prevent
U-Boot images being built for this anyway, but it does
yield a warning message.

Remove the warning at the source.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/e6400nvidia_4mb/target.cfg | 1 -
 1 file changed, 1 deletion(-)

diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
index a0b322d3..98eb8d3b 100644
--- a/config/coreboot/e6400nvidia_4mb/target.cfg
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -5,4 +5,3 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="e6400"
-payload_uboot_amd64="y"
\ No newline at end of file

From 98c5e43628279aa09d6678a56ccc2474af28e732 Mon Sep 17 00:00:00 2001
From: Mate Kukri <km@mkukri.xyz>
Date: Sun, 24 Nov 2024 11:59:46 +0000
Subject: [PATCH 0892/1549] config/deps/fedora41: Add openssl-devel-engine to
 dependency list

openssl-devel was split up in Fedora 41, and this package is required to build libreboot
on Fedora 41.

This was reported by "tweezers" on #libreboot.

Signed-off-by: Mate Kukri <km@mkukri.xyz>
---
 config/dependencies/fedora41 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/dependencies/fedora41 b/config/dependencies/fedora41
index 7c227fdc..0650ba8e 100755
--- a/config/dependencies/fedora41
+++ b/config/dependencies/fedora41
@@ -5,7 +5,7 @@ arm-none-eabi-gcc arm-none-eabi-newlib autogen bison bzip2 cmake curl \
 dejavu-fonts-all device-mapper doxygen e2fsprogs flex freetype-devel fuse \
 gawk gcc gcc-gnat gdb gettext gettext-devel git gprbuild help2man \
 innoextract intltool libftdi-devel libgpiod-devel libjaylink-devel \
-libselinux-devel libusb1 libusb1-devel nasm ncurses-devel openssl-devel \
+libselinux-devel libusb1 libusb1-devel nasm ncurses-devel openssl-devel openssl-devel-engine \
 p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \
 python-unversioned-command python3 python3-setuptools rsync sharutils \
 subversion systemd-devel texinfo unar unifont unifont-fonts \

From 7014b303f98021011e0c016524e30bcccb3dc200 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 26 Nov 2024 23:28:42 +0000
Subject: [PATCH 0893/1549] rom.sh: Remove unnecessary shebang

This is not a main script, and should not be treated as such;
it must never be directly executed by the user.

This script was only ever used inside other scripts, so the
shebang didn't seem to do much at all, but it shouldn't be
there anyway.

Remove it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/rom.sh b/include/rom.sh
index db6ce01d..eb75d411 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -1,4 +1,3 @@
-#!/usr/bin/env sh
 # SPDX-License-Identifier: GPL-3.0-or-later
 # Copyright (c) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2021-2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>

From f4b6aeea281407d2dd5aafcd823b2d5ca8c9131f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 27 Nov 2024 02:41:39 +0000
Subject: [PATCH 0894/1549] rom.sh: Add U-Boot before SeaBIOS and GRUB (x86)

Since U-Boot must be inserted at a specific offset, it's
theoretically possible that other files might overlap, but
cbfstool will work around wherever U-Boot was inserted if
it was inserted first; we don't use specific offsets for
the other files.

This is technically a preventative bug fix, but it fixes
a bug that would probably never occur in practise.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index eb75d411..f86e5e1a 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -132,6 +132,11 @@ mkcorebootbin()
 
 add_seabios()
 {
+	if [ "$payload_uboot_i386" = "y" ] || \
+	    [ "$payload_uboot_amd64" = "y" ]; then
+		$dry add_uboot
+	fi
+
 	_seabioself="elf/seabios/default/$initmode/bios.bin.elf"
 
 	cbfs "$tmprom" "$_seabioself" "fallback/payload"
@@ -146,11 +151,6 @@ add_seabios()
 	[ "$payload_memtest" = "y" ] && cbfs "$tmprom" \
 	    "elf/memtest86plus/memtest.bin" img/memtest
 
-	if [ "$payload_uboot_i386" = "y" ] || \
-	    [ "$payload_uboot_amd64" = "y" ]; then
-		$dry add_uboot
-	fi
-
 	[ "$payload_grub" = "y" ] && add_grub
 
 	cprom

From 7f6e47d27c673e29250cbdac03e326b9ba044b05 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 29 Nov 2024 00:36:40 +0000
Subject: [PATCH 0895/1549] trees: reset PATH per-target

Otherwise, if PATH was set before, it will be re-used
again in the next pass. We previously unset CROSS_COMPILE
to avoid using the wrong cross-compiler when switching to
another target within a multi-tree project such as U-Boot.

Well, PATH was also being set, to use coreboot xgcc first.
This is fine, but the next target may not use the same one.

This patch solves a similar problem to the following patch
which was mentioned above:

commit 637c0a1521a03e3f65de85dcc5ffd478b37a5360
Author: Leah Rowe <leah@libreboot.org>
Date:   Tue Nov 19 02:52:28 2024 +0000

    trees: unset CROSS_COMPILE per target

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/script/trees b/script/trees
index 8f468d49..698d2b34 100755
--- a/script/trees
+++ b/script/trees
@@ -9,6 +9,8 @@ set -u -e
 . "include/lib.sh"
 . "include/git.sh"
 
+XBMKPATH="$PATH"
+
 eval `setvars "" xarch srcdir premake cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
@@ -74,6 +76,7 @@ build_targets()
 
 	for x in $targets; do
 		unset CROSS_COMPILE
+		export PATH="$XBMKPATH"
 		[ "$x" = "list" ] && x_ ls -1 "config/$project" && \
 		    listfile="" && break
 		target="$x"

From ba772eb6acd854d6a90f97823ca98b2f1d2eb656 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Sat, 30 Nov 2024 19:46:36 +0300
Subject: [PATCH 0896/1549] u-boot: Update ARM64 boards to v2024.10

Set default U-Boot revision to v2024.10 and rebase patches on top of
that. The video subsystem now has switched to using the 'cyclic'
mechanism, so the code around one of the video patches changed a bit.

x86 boards were already switched to v2024.10. Update U-Boot for the
remaining ARM64 boards as usual:

- Turn old configs into defconfigs (./update trees -s u-boot)
- Save the diff from old upstream defconfig (diffconfig $theirs $ours)
- Update U-Boot revision, rebase patches, and clean old trees
- Prepare new U-Boot tree (./update trees -f u-boot)
- Review the diffconfigs to see if any options were renamed upstream
- Copy over the new upstream defconfigs and apply earlier diff
- Turn new defconfigs into configs (./update trees -l u-boot)

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 ...399-Set-hardcoded-clock-rates-same-a.patch |  10 +-
 ...-improve-UEFI-experience-on-DM_VIDEO.patch |   8 +-
 .../0003-Add-video-damage-tracking.patch      | 197 ++++++++----------
 ...gnore-missing-input-files-for-binman.patch |   4 +-
 ...Remove-assigned-clock-dt-properties-.patch |   6 +-
 config/u-boot/default/target.cfg              |   2 +-
 config/u-boot/gru_bob/config/default          |  47 +++--
 config/u-boot/gru_kevin/config/default        |  47 +++--
 config/u-boot/qemu_arm64_12mb/config/default  |  51 +++--
 9 files changed, 196 insertions(+), 176 deletions(-)

diff --git a/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch b/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch
index 4ceeac59..32647ed0 100644
--- a/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch
+++ b/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch
@@ -1,4 +1,4 @@
-From f98475a64fcfe6ef710acb29391c33c17903e580 Mon Sep 17 00:00:00 2001
+From bc5204d0d28bb431186fd106f9a79f69bfad005d Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Fri, 8 Oct 2021 17:33:22 +0300
 Subject: [PATCH] clk: rockchip: rk3399: Set hardcoded clock rates same as
@@ -60,10 +60,10 @@ index d941a129f3e5..54035c0df1f3 100644
  #define PWM_CLOCK_HZ    PMU_PCLK_HZ
  
 diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
-index 67b2c05ec9ed..754b35c23197 100644
+index 24cefebd1b2a..6f874bd347e0 100644
 --- a/drivers/clk/rockchip/clk_rk3399.c
 +++ b/drivers/clk/rockchip/clk_rk3399.c
-@@ -54,10 +54,11 @@ struct pll_div {
+@@ -53,10 +53,11 @@ struct pll_div {
  	.fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
  	.postdiv1 = _postdiv1, .postdiv2 = _postdiv2};
  
@@ -78,7 +78,7 @@ index 67b2c05ec9ed..754b35c23197 100644
  #endif
  
  static const struct pll_div apll_l_1600_cfg = PLL_DIVISORS(1600 * MHz, 3, 1, 1);
-@@ -682,7 +683,7 @@ static ulong rk3399_spi_set_clk(struct rockchip_cru *cru, ulong clk_id, uint hz)
+@@ -681,7 +682,7 @@ static ulong rk3399_spi_set_clk(struct rockchip_cru *cru, ulong clk_id, uint hz)
  static ulong rk3399_vop_set_clk(struct rockchip_cru *cru, ulong clk_id, u32 hz)
  {
  	struct pll_div vpll_config = {0};
@@ -87,7 +87,7 @@ index 67b2c05ec9ed..754b35c23197 100644
  	void *aclkreg_addr, *dclkreg_addr;
  	u32 div;
  
-@@ -1395,6 +1396,7 @@ static void rkclk_init(struct rockchip_cru *cru)
+@@ -1394,6 +1395,7 @@ static void rkclk_init(struct rockchip_cru *cru)
  	/* configure gpll cpll */
  	rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);
  	rkclk_set_pll(&cru->cpll_con[0], &cpll_init_cfg);
diff --git a/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch b/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch
index d5c6788a..bb264b00 100644
--- a/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch
+++ b/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch
@@ -1,4 +1,4 @@
-From 3e1e14e0b14539ca42db40488c7b1067eb01dea4 Mon Sep 17 00:00:00 2001
+From 03750188cbe305cd8383178a1ee476de2aa5953e Mon Sep 17 00:00:00 2001
 From: Andre Przywara <andre.przywara@arm.com>
 Date: Mon, 10 Jan 2022 00:56:31 +0000
 Subject: [PATCH 1/3] video: Add cursor support for video consoles
@@ -156,13 +156,11 @@ index 8b5928dc5ebb..00c5ecb664b9 100644
  	char escape_buf[32];
  	char utf8_buf[5];
  };
-
-base-commit: 475aa8345a78396d39b42f96eccecd37ebe24e99
 -- 
 2.45.2
 
 
-From 0dd4fb08993b01d36e491705b24063834dcb618e Mon Sep 17 00:00:00 2001
+From f63a54996fdaac7ff995e26fd4318a09a9c14dff Mon Sep 17 00:00:00 2001
 From: Andre Przywara <andre.przywara@arm.com>
 Date: Mon, 10 Jan 2022 00:56:36 +0000
 Subject: [PATCH 2/3] efi-selftest: Add international characters test
@@ -201,7 +199,7 @@ index a3023c82567c..2f8d8d323c2b 100644
 2.45.2
 
 
-From 13101947807bec7ceaf3231d94e943b9b29a7369 Mon Sep 17 00:00:00 2001
+From cc05aa26c43c35e9155d958400532005ae7eeede Mon Sep 17 00:00:00 2001
 From: Andre Przywara <andre.przywara@arm.com>
 Date: Mon, 10 Jan 2022 00:56:37 +0000
 Subject: [PATCH 3/3] efi_selftest: Add box drawing character selftest
diff --git a/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch b/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch
index 616efa0f..07a5fe8c 100644
--- a/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch
+++ b/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch
@@ -1,4 +1,4 @@
-From 3efc90a6ea3bb88b66af7f7096e8168c2cc34aa6 Mon Sep 17 00:00:00 2001
+From c3ae7d7f7af47e747f85f06662e26f434c25c891 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Fri, 18 Aug 2023 13:31:36 +0300
 Subject: [PATCH 01/13] video: test: Split copy frame buffer check into a
@@ -300,13 +300,11 @@ index 7dfbeb9555d1..14e6af5181f1 100644
  
  	return 0;
  }
-
-base-commit: 475aa8345a78396d39b42f96eccecd37ebe24e99
 -- 
 2.45.2
 
 
-From 19c878635c1271c79a017ea3a860b9a2f1a3fed9 Mon Sep 17 00:00:00 2001
+From 575ebe8b5d9ae9c9818b4deb708f8a69f9f9a9b1 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Sun, 20 Aug 2023 17:46:46 +0300
 Subject: [PATCH 02/13] video: test: Support checking copy frame buffer
@@ -619,7 +617,7 @@ index 14e6af5181f1..50374cafc009 100644
 2.45.2
 
 
-From 173f97f38d1c6621acd9f24f8956c3a7d808cdd7 Mon Sep 17 00:00:00 2001
+From d1fddc8cbe64a5532ddc43d0b1413ff7cc1bf618 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Fri, 18 Aug 2023 17:31:27 +0300
 Subject: [PATCH 03/13] video: test: Test partial updates of hardware frame
@@ -704,7 +702,7 @@ index 50374cafc009..4798f2205a99 100644
 2.45.2
 
 
-From 11066af4f8d7a9c6b4729ce2647eb6251397423d Mon Sep 17 00:00:00 2001
+From 700a7cdc62fa08f425c05db2061f06c56d96d5b6 Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:15 +0200
 Subject: [PATCH 04/13] dm: video: Add damage tracking API
@@ -725,15 +723,15 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-5-alpernebiyasak@gma
 Reviewed-by: Simon Glass <sjg@chromium.org>
 ---
  drivers/video/Kconfig        | 13 ++++++++++++
- drivers/video/video-uclass.c | 40 +++++++++++++++++++++++++++++++++---
+ drivers/video/video-uclass.c | 35 +++++++++++++++++++++++++++++++
  include/video.h              | 40 ++++++++++++++++++++++++++++++++++--
- 3 files changed, 88 insertions(+), 5 deletions(-)
+ 3 files changed, 86 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
-index 7808ae7919e0..7815b590481e 100644
+index 6e79694fd192..d7da655cea62 100644
 --- a/drivers/video/Kconfig
 +++ b/drivers/video/Kconfig
-@@ -92,6 +92,19 @@ config VIDEO_COPY
+@@ -98,6 +98,19 @@ config VIDEO_COPY
  	  To use this, your video driver must set @copy_base in
  	  struct video_uc_plat.
  
@@ -754,10 +752,10 @@ index 7808ae7919e0..7815b590481e 100644
  	bool "Generic PWM based Backlight Driver"
  	depends on BACKLIGHT && DM_PWM
 diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index ff1382f4a43b..75ab5f5ba9d7 100644
+index a5aa8dd52954..b95f2dbc7703 100644
 --- a/drivers/video/video-uclass.c
 +++ b/drivers/video/video-uclass.c
-@@ -346,9 +346,38 @@ void video_set_default_colors(struct udevice *dev, bool invert)
+@@ -352,6 +352,34 @@ void video_set_default_colors(struct udevice *dev, bool invert)
  	priv->colour_bg = video_index_to_colour(priv, back);
  }
  
@@ -792,31 +790,10 @@ index ff1382f4a43b..75ab5f5ba9d7 100644
  /* Flush video activity to the caches */
  int video_sync(struct udevice *vid, bool force)
  {
-+	struct video_priv *priv = dev_get_uclass_priv(vid);
- 	struct video_ops *ops = video_get_ops(vid);
- 	int ret;
- 
-@@ -364,15 +393,12 @@ int video_sync(struct udevice *vid, bool force)
- 	 * out whether it exists? For now, ARM is safe.
- 	 */
- #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
--	struct video_priv *priv = dev_get_uclass_priv(vid);
--
- 	if (priv->flush_dcache) {
- 		flush_dcache_range((ulong)priv->fb,
- 				   ALIGN((ulong)priv->fb + priv->fb_size,
- 					 CONFIG_SYS_CACHELINE_SIZE));
- 	}
- #elif defined(CONFIG_VIDEO_SANDBOX_SDL)
--	struct video_priv *priv = dev_get_uclass_priv(vid);
- 	static ulong last_sync;
- 
- 	if (force || get_timer(last_sync) > 100) {
-@@ -380,6 +406,14 @@ int video_sync(struct udevice *vid, bool force)
- 		last_sync = get_timer(0);
- 	}
+@@ -385,6 +413,13 @@ int video_sync(struct udevice *vid, bool force)
  #endif
-+
+ 	priv->last_sync = get_timer(0);
+ 
 +	if (IS_ENABLED(CONFIG_VIDEO_DAMAGE)) {
 +		priv->damage.xstart = priv->xsize;
 +		priv->damage.ystart = priv->ysize;
@@ -828,7 +805,7 @@ index ff1382f4a43b..75ab5f5ba9d7 100644
  }
  
 diff --git a/include/video.h b/include/video.h
-index 4d8df9baaada..d2dabb66e9e6 100644
+index 4013a949983f..835d7734cb75 100644
 --- a/include/video.h
 +++ b/include/video.h
 @@ -88,6 +88,11 @@ enum video_format {
@@ -843,7 +820,7 @@ index 4d8df9baaada..d2dabb66e9e6 100644
   * @line_length:	Length of each frame buffer line, in bytes. This can be
   *		set by the driver, but if not, the uclass will set it after
   *		probing
-@@ -115,6 +120,12 @@ struct video_priv {
+@@ -116,6 +121,12 @@ struct video_priv {
  	void *fb;
  	int fb_size;
  	void *copy_fb;
@@ -856,7 +833,7 @@ index 4d8df9baaada..d2dabb66e9e6 100644
  	int line_length;
  	u32 colour_fg;
  	u32 colour_bg;
-@@ -257,8 +268,9 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+@@ -259,8 +270,9 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
   * @return: 0 on success, error code otherwise
   *
   * Some frame buffers are cached or have a secondary frame buffer. This
@@ -868,7 +845,7 @@ index 4d8df9baaada..d2dabb66e9e6 100644
   */
  int video_sync(struct udevice *vid, bool force);
  
-@@ -378,6 +390,30 @@ static inline int video_sync_copy_all(struct udevice *dev)
+@@ -380,6 +392,30 @@ static inline int video_sync_copy_all(struct udevice *dev)
  
  #endif
  
@@ -903,7 +880,7 @@ index 4d8df9baaada..d2dabb66e9e6 100644
 2.45.2
 
 
-From 5613cd630801ccb329895f62c27b8690a2cbf74c Mon Sep 17 00:00:00 2001
+From b84ee524454fbfebd71532532bf2e28ad97ef676 Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:16 +0200
 Subject: [PATCH 05/13] dm: video: Add damage notification on display fills
@@ -922,10 +899,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-6-alpernebiyasak@gma
  1 file changed, 4 insertions(+)
 
 diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index 75ab5f5ba9d7..ca348101817a 100644
+index b95f2dbc7703..6906b2b83623 100644
 --- a/drivers/video/video-uclass.c
 +++ b/drivers/video/video-uclass.c
-@@ -195,6 +195,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+@@ -201,6 +201,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
  	if (ret)
  		return ret;
  
@@ -934,7 +911,7 @@ index 75ab5f5ba9d7..ca348101817a 100644
  	return 0;
  }
  
-@@ -244,6 +246,8 @@ int video_fill(struct udevice *dev, u32 colour)
+@@ -250,6 +252,8 @@ int video_fill(struct udevice *dev, u32 colour)
  	if (ret)
  		return ret;
  
@@ -947,7 +924,7 @@ index 75ab5f5ba9d7..ca348101817a 100644
 2.45.2
 
 
-From 4e29f9d2190f2ea390d5321192f5e71193d62f71 Mon Sep 17 00:00:00 2001
+From b18a1ef92e2a003771a4a846c592302c1e92bd83 Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:17 +0200
 Subject: [PATCH 06/13] vidconsole: Add damage notifications to all vidconsole
@@ -1014,7 +991,7 @@ index 6f4194a18147..51ac8cc78e9d 100644
  	if (ret)
  		return ret;
 diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c
-index dc9698362741..5c4a98f6cad0 100644
+index a3f8c6352f83..f11dc3a0b075 100644
 --- a/drivers/video/console_rotate.c
 +++ b/drivers/video/console_rotate.c
 @@ -36,6 +36,12 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr)
@@ -1056,7 +1033,7 @@ index dc9698362741..5c4a98f6cad0 100644
  	return VID_TO_POS(fontdata->width);
  }
  
-@@ -122,6 +140,12 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
+@@ -121,6 +139,12 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
  	if (ret)
  		return ret;
  
@@ -1069,7 +1046,7 @@ index dc9698362741..5c4a98f6cad0 100644
  	return 0;
  }
  
-@@ -143,6 +167,12 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc,
+@@ -142,6 +166,12 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc,
  	vidconsole_memmove(dev, dst, src,
  			   fontdata->height * vid_priv->line_length * count);
  
@@ -1082,7 +1059,7 @@ index dc9698362741..5c4a98f6cad0 100644
  	return 0;
  }
  
-@@ -176,6 +206,12 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp)
+@@ -175,6 +205,12 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp)
  	if (ret)
  		return ret;
  
@@ -1095,7 +1072,7 @@ index dc9698362741..5c4a98f6cad0 100644
  	return VID_TO_POS(fontdata->width);
  }
  
-@@ -200,6 +236,12 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
+@@ -199,6 +235,12 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
  	if (ret)
  		return ret;
  
@@ -1108,7 +1085,7 @@ index dc9698362741..5c4a98f6cad0 100644
  	return 0;
  }
  
-@@ -226,6 +268,12 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc,
+@@ -225,6 +267,12 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc,
  		dst += vid_priv->line_length;
  	}
  
@@ -1121,7 +1098,7 @@ index dc9698362741..5c4a98f6cad0 100644
  	return 0;
  }
  
-@@ -258,6 +306,12 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp)
+@@ -257,6 +305,12 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp)
  	if (ret)
  		return ret;
  
@@ -1198,7 +1175,7 @@ index c435162d3f94..6a17f732fc26 100644
 2.45.2
 
 
-From 11fa5d7c68878f629c8fff7dc28a76acaf1252ab Mon Sep 17 00:00:00 2001
+From 991d7e646de88fd019059679f659761072412e15 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Fri, 18 Aug 2023 17:55:08 +0300
 Subject: [PATCH 07/13] video: test: Test video damage tracking via vidconsole
@@ -1217,7 +1194,7 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-8-alpernebiyasak@gma
  2 files changed, 57 insertions(+)
 
 diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
-index da8c1976d7bd..6bc20ec34169 100644
+index dc5fcdbd1c9e..5e5ad60ee057 100644
 --- a/configs/sandbox_defconfig
 +++ b/configs/sandbox_defconfig
 @@ -319,6 +319,7 @@ CONFIG_USB_ETH_CDC=y
@@ -1296,7 +1273,7 @@ index 4798f2205a99..119c43153165 100644
 2.45.2
 
 
-From 80a32fe8f34466e6b86553018f47192a1fef3c6a Mon Sep 17 00:00:00 2001
+From f74688b9828f83306dea8553eafe61b5d81fbbe0 Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:18 +0200
 Subject: [PATCH 08/13] video: Add damage notification on bmp display
@@ -1329,7 +1306,7 @@ index ad512d99a1b9..78de95607924 100644
 2.45.2
 
 
-From 7afe761e51bfb0f24fd4547e8bec1826aaf2e6a0 Mon Sep 17 00:00:00 2001
+From 791b0accde45ada93fdf61773f8c7e69b934e55e Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:19 +0200
 Subject: [PATCH 09/13] efi_loader: GOP: Add damage notification on BLT
@@ -1398,7 +1375,7 @@ index 41e12fa72460..1694e23dcc62 100644
 2.45.2
 
 
-From 134415d6cbe38f7ab630f978a602b6e15929feea Mon Sep 17 00:00:00 2001
+From 1b0905d54711c6c170de575a36e66006b8a6583a Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:20 +0200
 Subject: [PATCH 10/13] video: Only dcache flush damaged lines
@@ -1419,10 +1396,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-11-alpernebiyasak@gm
  1 file changed, 38 insertions(+), 5 deletions(-)
 
 diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index ca348101817a..add7a85b20fe 100644
+index 6906b2b83623..3f6572a124ea 100644
 --- a/drivers/video/video-uclass.c
 +++ b/drivers/video/video-uclass.c
-@@ -378,6 +378,40 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height)
+@@ -384,6 +384,40 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height)
  }
  #endif
  
@@ -1463,7 +1440,7 @@ index ca348101817a..add7a85b20fe 100644
  /* Flush video activity to the caches */
  int video_sync(struct udevice *vid, bool force)
  {
-@@ -397,11 +431,10 @@ int video_sync(struct udevice *vid, bool force)
+@@ -407,11 +441,10 @@ int video_sync(struct udevice *vid, bool force)
  	 * out whether it exists? For now, ARM is safe.
  	 */
  #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
@@ -1477,13 +1454,13 @@ index ca348101817a..add7a85b20fe 100644
 +	if (IS_ENABLED(CONFIG_VIDEO_COPY))
 +		video_flush_dcache(vid, true);
  #elif defined(CONFIG_VIDEO_SANDBOX_SDL)
- 	static ulong last_sync;
- 
+ 	sandbox_sdl_sync(priv->fb);
+ #endif
 -- 
 2.45.2
 
 
-From d3f1653a87d51c5ecf187b19ecb60a2f740fb8e2 Mon Sep 17 00:00:00 2001
+From 4c02e522cb00b84cfa61004c32b4e5ae28457c58 Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:21 +0200
 Subject: [PATCH 11/13] video: Use VIDEO_DAMAGE for VIDEO_COPY
@@ -1526,7 +1503,7 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-12-alpernebiyasak@gm
  11 files changed, 43 insertions(+), 247 deletions(-)
 
 diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
-index 6bc20ec34169..da8c1976d7bd 100644
+index 5e5ad60ee057..dc5fcdbd1c9e 100644
 --- a/configs/sandbox_defconfig
 +++ b/configs/sandbox_defconfig
 @@ -319,7 +319,6 @@ CONFIG_USB_ETH_CDC=y
@@ -1538,10 +1515,10 @@ index 6bc20ec34169..da8c1976d7bd 100644
  CONFIG_CONSOLE_TRUETYPE=y
  CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
 diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
-index 7815b590481e..88c6f8e68976 100644
+index d7da655cea62..d6497819ea73 100644
 --- a/drivers/video/Kconfig
 +++ b/drivers/video/Kconfig
-@@ -83,11 +83,14 @@ config VIDEO_PCI_DEFAULT_FB_SIZE
+@@ -89,11 +89,14 @@ config VIDEO_PCI_DEFAULT_FB_SIZE
  
  config VIDEO_COPY
  	bool "Enable copying the frame buffer to a hardware copy"
@@ -1556,7 +1533,7 @@ index 7815b590481e..88c6f8e68976 100644
  
  	  To use this, your video driver must set @copy_base in
  	  struct video_uc_plat.
-@@ -105,6 +108,8 @@ config VIDEO_DAMAGE
+@@ -111,6 +114,8 @@ config VIDEO_DAMAGE
  	  regions of the frame buffer that were modified before, speeding up
  	  screen refreshes significantly.
  
@@ -1608,7 +1585,7 @@ index 51ac8cc78e9d..07db613ac53c 100644
  }
  
 diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c
-index 5c4a98f6cad0..9f8e1b92770c 100644
+index f11dc3a0b075..886b25dcfafc 100644
 --- a/drivers/video/console_rotate.c
 +++ b/drivers/video/console_rotate.c
 @@ -21,7 +21,6 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr)
@@ -1661,7 +1638,7 @@ index 5c4a98f6cad0..9f8e1b92770c 100644
  	video_damage(dev->parent,
  		     vid_priv->xsize - y - fontdata->height,
  		     linenum - 1,
-@@ -126,7 +115,7 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
+@@ -125,7 +114,7 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
  	struct video_fontdata *fontdata = priv->fontdata;
  	void *start, *line, *dst, *end;
  	int pixels = fontdata->height * vid_priv->xsize;
@@ -1670,7 +1647,7 @@ index 5c4a98f6cad0..9f8e1b92770c 100644
  	int pbytes = VNBYTES(vid_priv->bpix);
  
  	start = vid_priv->fb + vid_priv->ysize * vid_priv->line_length -
-@@ -136,9 +125,6 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
+@@ -135,9 +124,6 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
  	for (i = 0; i < pixels; i++)
  		fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes);
  	end = dst;
@@ -1680,7 +1657,7 @@ index 5c4a98f6cad0..9f8e1b92770c 100644
  
  	video_damage(dev->parent,
  		     0,
-@@ -164,8 +150,7 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc,
+@@ -163,8 +149,7 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc,
  		vid_priv->line_length;
  	src = end - (rowsrc + count) * fontdata->height *
  		vid_priv->line_length;
@@ -1690,7 +1667,7 @@ index 5c4a98f6cad0..9f8e1b92770c 100644
  
  	video_damage(dev->parent,
  		     0,
-@@ -201,11 +186,6 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp)
+@@ -200,11 +185,6 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp)
  	if (ret)
  		return ret;
  
@@ -1702,7 +1679,7 @@ index 5c4a98f6cad0..9f8e1b92770c 100644
  	video_damage(dev->parent,
  		     x - fontdata->width + 1,
  		     linenum - fontdata->height + 1,
-@@ -222,7 +202,7 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
+@@ -221,7 +201,7 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
  	struct video_fontdata *fontdata = priv->fontdata;
  	int pbytes = VNBYTES(vid_priv->bpix);
  	void *start, *dst, *line;
@@ -1711,7 +1688,7 @@ index 5c4a98f6cad0..9f8e1b92770c 100644
  
  	start = vid_priv->fb + row * fontdata->height * pbytes;
  	line = start;
-@@ -232,9 +212,6 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
+@@ -231,9 +211,6 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
  			fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes);
  		line += vid_priv->line_length;
  	}
@@ -1721,7 +1698,7 @@ index 5c4a98f6cad0..9f8e1b92770c 100644
  
  	video_damage(dev->parent,
  		     row * fontdata->height,
-@@ -254,16 +231,13 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc,
+@@ -253,16 +230,13 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc,
  	int pbytes = VNBYTES(vid_priv->bpix);
  	void *dst;
  	void *src;
@@ -1740,7 +1717,7 @@ index 5c4a98f6cad0..9f8e1b92770c 100644
  		src += vid_priv->line_length;
  		dst += vid_priv->line_length;
  	}
-@@ -299,10 +273,6 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp)
+@@ -298,10 +272,6 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp)
  	line = start;
  
  	ret = fill_char_horizontally(pfont, &line, vid_priv, fontdata, NORMAL_DIRECTION);
@@ -1810,10 +1787,10 @@ index 6a17f732fc26..58dcd8e050c3 100644
  
  	return width_frac;
 diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c
-index 80e7adf6a1a4..6dc5162804aa 100644
+index 8b2ef51f1b3b..bcc46a08cbbd 100644
 --- a/drivers/video/vidconsole-uclass.c
 +++ b/drivers/video/vidconsole-uclass.c
-@@ -759,22 +759,6 @@ UCLASS_DRIVER(vidconsole) = {
+@@ -801,22 +801,6 @@ UCLASS_DRIVER(vidconsole) = {
  	.per_device_auto	= sizeof(struct vidconsole_priv),
  };
  
@@ -1837,10 +1814,10 @@ index 80e7adf6a1a4..6dc5162804aa 100644
  {
  	int ret;
 diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index add7a85b20fe..3b9b9fad0975 100644
+index 3f6572a124ea..845db1c9b6d3 100644
 --- a/drivers/video/video-uclass.c
 +++ b/drivers/video/video-uclass.c
-@@ -152,7 +152,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+@@ -158,7 +158,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
  	struct video_priv *priv = dev_get_uclass_priv(dev);
  	void *start, *line;
  	int pixels = xend - xstart;
@@ -1849,7 +1826,7 @@ index add7a85b20fe..3b9b9fad0975 100644
  
  	start = priv->fb + ystart * priv->line_length;
  	start += xstart * VNBYTES(priv->bpix);
-@@ -191,9 +191,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+@@ -197,9 +197,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
  		}
  		line += priv->line_length;
  	}
@@ -1859,7 +1836,7 @@ index add7a85b20fe..3b9b9fad0975 100644
  
  	video_damage(dev, xstart, ystart, xend - xstart, yend - ystart);
  
-@@ -217,7 +214,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho)
+@@ -223,7 +220,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho)
  int video_fill(struct udevice *dev, u32 colour)
  {
  	struct video_priv *priv = dev_get_uclass_priv(dev);
@@ -1867,7 +1844,7 @@ index add7a85b20fe..3b9b9fad0975 100644
  
  	switch (priv->bpix) {
  	case VIDEO_BPP16:
-@@ -242,9 +238,6 @@ int video_fill(struct udevice *dev, u32 colour)
+@@ -248,9 +244,6 @@ int video_fill(struct udevice *dev, u32 colour)
  		memset(priv->fb, colour, priv->fb_size);
  		break;
  	}
@@ -1877,7 +1854,7 @@ index add7a85b20fe..3b9b9fad0975 100644
  
  	video_damage(dev, 0, 0, priv->xsize, priv->ysize);
  
-@@ -412,6 +405,27 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy)
+@@ -418,6 +411,27 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy)
  }
  #endif
  
@@ -1905,7 +1882,7 @@ index add7a85b20fe..3b9b9fad0975 100644
  /* Flush video activity to the caches */
  int video_sync(struct udevice *vid, bool force)
  {
-@@ -419,6 +433,9 @@ int video_sync(struct udevice *vid, bool force)
+@@ -425,6 +439,9 @@ int video_sync(struct udevice *vid, bool force)
  	struct video_ops *ops = video_get_ops(vid);
  	int ret;
  
@@ -1915,7 +1892,7 @@ index add7a85b20fe..3b9b9fad0975 100644
  	if (ops && ops->video_sync) {
  		ret = ops->video_sync(vid);
  		if (ret)
-@@ -502,69 +519,6 @@ int video_get_ysize(struct udevice *dev)
+@@ -508,69 +525,6 @@ int video_get_ysize(struct udevice *dev)
  	return priv->ysize;
  }
  
@@ -2010,10 +1987,10 @@ index 78de95607924..1f267d45812c 100644
  	return video_sync(dev, false);
  }
 diff --git a/include/video.h b/include/video.h
-index d2dabb66e9e6..44557457bf80 100644
+index 835d7734cb75..705076facfb5 100644
 --- a/include/video.h
 +++ b/include/video.h
-@@ -353,43 +353,6 @@ void video_set_default_colors(struct udevice *dev, bool invert);
+@@ -355,43 +355,6 @@ void video_set_default_colors(struct udevice *dev, bool invert);
   */
  int video_default_font_height(struct udevice *dev);
  
@@ -2058,10 +2035,10 @@ index d2dabb66e9e6..44557457bf80 100644
  /**
   * video_damage() - Notify the video subsystem about screen updates.
 diff --git a/include/video_console.h b/include/video_console.h
-index 8b5928dc5ebb..8806d10f946d 100644
+index 00c5ecb664b9..ead0e05e4003 100644
 --- a/include/video_console.h
 +++ b/include/video_console.h
-@@ -529,56 +529,4 @@ void vidconsole_list_fonts(struct udevice *dev);
+@@ -530,56 +530,4 @@ void vidconsole_list_fonts(struct udevice *dev);
   */
  int vidconsole_get_font_size(struct udevice *dev, const char **name, uint *sizep);
  
@@ -2143,7 +2120,7 @@ index 119c43153165..9b7bb51a3dd9 100644
 2.45.2
 
 
-From d0b64a4e493b665d7abafc185d88f533ebc27f2f Mon Sep 17 00:00:00 2001
+From 174b8b118c02e7cadf9ad56462b481c91f4a3343 Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Tue, 3 Jan 2023 22:50:03 +0100
 Subject: [PATCH 12/13] video: Always compile cache flushing code
@@ -2168,10 +2145,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-13-alpernebiyasak@gm
  1 file changed, 5 insertions(+), 7 deletions(-)
 
 diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index 3b9b9fad0975..f050ed1f67cb 100644
+index 845db1c9b6d3..5416e0d9030b 100644
 --- a/drivers/video/video-uclass.c
 +++ b/drivers/video/video-uclass.c
-@@ -377,6 +377,9 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy)
+@@ -383,6 +383,9 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy)
  	struct video_priv *priv = dev_get_uclass_priv(vid);
  	ulong fb = use_copy ? (ulong)priv->copy_fb : (ulong)priv->fb;
  
@@ -2181,9 +2158,9 @@ index 3b9b9fad0975..f050ed1f67cb 100644
  	if (!priv->flush_dcache)
  		return;
  
-@@ -442,17 +445,12 @@ int video_sync(struct udevice *vid, bool force)
- 			return ret;
- 	}
+@@ -452,17 +455,12 @@ int video_sync(struct udevice *vid, bool force)
+ 	    get_timer(priv->last_sync) < CONFIG_VIDEO_SYNC_MS)
+ 		return 0;
  
 -	/*
 -	 * flush_dcache_range() is declared in common.h but it seems that some
@@ -2198,14 +2175,14 @@ index 3b9b9fad0975..f050ed1f67cb 100644
 -#elif defined(CONFIG_VIDEO_SANDBOX_SDL)
 +
 +#if defined(CONFIG_VIDEO_SANDBOX_SDL)
- 	static ulong last_sync;
- 
- 	if (force || get_timer(last_sync) > 100) {
+ 	sandbox_sdl_sync(priv->fb);
+ #endif
+ 	priv->last_sync = get_timer(0);
 -- 
 2.45.2
 
 
-From e6b053a9d59d0b4ea0936edee5be2fadf0b8efc2 Mon Sep 17 00:00:00 2001
+From 2a1af00665464023c38903eeb75a0c89099892fb Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Tue, 3 Jan 2023 22:50:04 +0100
 Subject: [PATCH 13/13] video: Enable VIDEO_DAMAGE for drivers that need it
@@ -2237,7 +2214,7 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-14-alpernebiyasak@gm
  9 files changed, 16 insertions(+)
 
 diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
-index ddf9414b08e7..3c9745065bab 100644
+index 17666814c52e..1ba0d2c1c8d7 100644
 --- a/arch/arm/mach-sunxi/Kconfig
 +++ b/arch/arm/mach-sunxi/Kconfig
 @@ -863,6 +863,7 @@ config VIDEO_SUNXI
@@ -2249,10 +2226,10 @@ index ddf9414b08e7..3c9745065bab 100644
  	default y
  	---help---
 diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
-index 88c6f8e68976..06d3ed8a736e 100644
+index d6497819ea73..8fb69e0b16c2 100644
 --- a/drivers/video/Kconfig
 +++ b/drivers/video/Kconfig
-@@ -499,6 +499,7 @@ config VIDEO_LCD_ANX9804
+@@ -534,6 +534,7 @@ config VIDEO_LCD_ANX9804
  
  config ATMEL_LCD
  	bool "Atmel LCD panel support"
@@ -2260,7 +2237,7 @@ index 88c6f8e68976..06d3ed8a736e 100644
  	depends on ARCH_AT91
  
  config ATMEL_LCD_BGR555
-@@ -508,6 +509,7 @@ config ATMEL_LCD_BGR555
+@@ -543,6 +544,7 @@ config ATMEL_LCD_BGR555
  
  config VIDEO_BCM2835
  	bool "Display support for BCM2835"
@@ -2268,7 +2245,7 @@ index 88c6f8e68976..06d3ed8a736e 100644
  	help
  	  The graphics processor already sets up the display so this driver
  	  simply checks the resolution and then sets up the frame buffer with
-@@ -671,6 +673,7 @@ source "drivers/video/meson/Kconfig"
+@@ -706,6 +708,7 @@ source "drivers/video/meson/Kconfig"
  
  config VIDEO_MVEBU
  	bool "Armada XP LCD controller"
@@ -2276,7 +2253,7 @@ index 88c6f8e68976..06d3ed8a736e 100644
  	---help---
  	Support for the LCD controller integrated in the Marvell
  	Armada XP SoC.
-@@ -705,6 +708,7 @@ config NXP_TDA19988
+@@ -740,6 +743,7 @@ config NXP_TDA19988
  
  config ATMEL_HLCD
  	bool "Enable ATMEL video support using HLCDC"
@@ -2284,7 +2261,7 @@ index 88c6f8e68976..06d3ed8a736e 100644
  	help
  	   HLCDC supports video output to an attached LCD panel.
  
-@@ -781,6 +785,7 @@ source "drivers/video/tidss/Kconfig"
+@@ -816,6 +820,7 @@ source "drivers/video/tidss/Kconfig"
  
  config VIDEO_TEGRA124
  	bool "Enable video support on Tegra124"
@@ -2292,7 +2269,7 @@ index 88c6f8e68976..06d3ed8a736e 100644
  	help
  	   Tegra124 supports many video output options including eDP and
  	   HDMI. At present only eDP is supported by U-Boot. This option
-@@ -795,6 +800,7 @@ source "drivers/video/imx/Kconfig"
+@@ -830,6 +835,7 @@ source "drivers/video/imx/Kconfig"
  
  config VIDEO_MXS
  	bool "Enable video support on i.MX28/i.MX6UL/i.MX7 SoCs"
@@ -2300,7 +2277,7 @@ index 88c6f8e68976..06d3ed8a736e 100644
  	help
  	  Enable framebuffer driver for i.MX28/i.MX6UL/i.MX7 processors
  
-@@ -857,6 +863,7 @@ config VIDEO_DW_MIPI_DSI
+@@ -892,6 +898,7 @@ config VIDEO_DW_MIPI_DSI
  
  config VIDEO_SIMPLE
  	bool "Simple display driver for preconfigured display"
@@ -2308,7 +2285,7 @@ index 88c6f8e68976..06d3ed8a736e 100644
  	help
  	  Enables a simple generic display driver which utilizes the
  	  simple-framebuffer devicetree bindings.
-@@ -875,6 +882,7 @@ config VIDEO_DT_SIMPLEFB
+@@ -910,6 +917,7 @@ config VIDEO_DT_SIMPLEFB
  
  config VIDEO_MCDE_SIMPLE
  	bool "Simple driver for ST-Ericsson MCDE with preconfigured display"
diff --git a/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch b/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch
index e1a26bb4..fc3dea4d 100644
--- a/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch
+++ b/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch
@@ -1,4 +1,4 @@
-From ba34d29274c23c52be957ea040539dccbab09765 Mon Sep 17 00:00:00 2001
+From ec8f5b8e949995eb34b7e54b9f06894eb38d02b4 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Wed, 10 Jul 2024 17:37:56 +0300
 Subject: [PATCH] HACK: Makefile: Ignore missing input files for binman images
@@ -17,7 +17,7 @@ Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/Makefile b/Makefile
-index 1c754ceb5953..fec8d9b2d2b1 100644
+index 34dd029d0cda..d5d89bd2e35c 100644
 --- a/Makefile
 +++ b/Makefile
 @@ -1375,7 +1375,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \
diff --git a/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch b/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch
index 73789811..45a6ab4a 100644
--- a/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch
+++ b/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch
@@ -1,4 +1,4 @@
-From 1107dc81b24743e77374f1b484a843d81fa0348a Mon Sep 17 00:00:00 2001
+From 9685041c19bcc61ca847a59e93c716d23df51898 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Wed, 10 Jul 2024 14:32:19 +0300
 Subject: [PATCH] HACK: rk3399: gru: Remove assigned clock dt properties for
@@ -18,10 +18,10 @@ Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
  1 file changed, 3 insertions(+)
 
 diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi
-index 487dde38d86a..30cfb58aca12 100644
+index 6bdc892bd913..f4457c1b9b48 100644
 --- a/arch/arm/dts/rk3399-gru-u-boot.dtsi
 +++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi
-@@ -28,6 +28,9 @@ &cros_ec {
+@@ -27,6 +27,9 @@ &cros_ec {
  
  &edp {
  	rockchip,panel = <&edp_panel>;
diff --git a/config/u-boot/default/target.cfg b/config/u-boot/default/target.cfg
index 8d6af6d9..29c24af2 100644
--- a/config/u-boot/default/target.cfg
+++ b/config/u-boot/default/target.cfg
@@ -1,2 +1,2 @@
 tree="default"
-rev="3f772959501c99fbe5aa0b22a36efe3478d1ae1c" # v2024.07
+rev="f919c3a889f0ec7d63a48b5d0ed064386b0980bd" # v2024.10
diff --git a/config/u-boot/gru_bob/config/default b/config/u-boot/gru_bob/config/default
index da088ef0..54ad1e4f 100644
--- a/config/u-boot/gru_bob/config/default
+++ b/config/u-boot/gru_bob/config/default
@@ -1,12 +1,13 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# U-Boot 2024.07 Configuration
+# U-Boot 2024.10 Configuration
 #
 
 #
-# Compiler: gcc (Debian 13.3.0-2) 13.3.0
+# Compiler: gcc (Debian 14.2.0-8) 14.2.0
 #
 CONFIG_CREATE_ARCH_SYMLINK=y
+CONFIG_SUPPORT_LITTLE_ENDIAN=y
 CONFIG_SYS_CACHE_SHIFT_6=y
 CONFIG_64BIT=y
 CONFIG_SYS_CACHELINE_SIZE=64
@@ -123,6 +124,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y
 # CONFIG_ARCH_SUNXI is not set
 # CONFIG_ARCH_U8500 is not set
 # CONFIG_ARCH_VERSAL is not set
+# CONFIG_ARCH_VERSAL2 is not set
 # CONFIG_ARCH_VERSAL_NET is not set
 # CONFIG_ARCH_VF610 is not set
 # CONFIG_ARCH_ZYNQ is not set
@@ -162,6 +164,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y
 # CONFIG_TARGET_LS1046AQDS is not set
 # CONFIG_TARGET_LS1046ARDB is not set
 # CONFIG_TARGET_LS1046AFRWY is not set
+# CONFIG_ARCH_SC5XX is not set
 # CONFIG_TARGET_SL28 is not set
 # CONFIG_TARGET_TEN64 is not set
 # CONFIG_ARCH_UNIPHIER is not set
@@ -192,7 +195,7 @@ CONFIG_SPL_LDSCRIPT="arch/arm/cpu/armv8/u-boot-spl.lds"
 CONFIG_ENV_SOURCE_FILE=""
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SF_DEFAULT_MODE=0x0
-CONFIG_ENV_SIZE=0x8000
+CONFIG_ENV_SIZE=0x1f000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-bob"
@@ -254,13 +257,13 @@ CONFIG_SPL_BSS_START_ADDR=0xff8e0000
 CONFIG_SPL_BSS_MAX_SIZE=0x10000
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
 CONFIG_SPL_SYS_MALLOC_F=y
 CONFIG_ERR_PTR_OFFSET=0x0
 CONFIG_SPL_SIZE_LIMIT=0x0
 CONFIG_SPL=y
 CONFIG_PRE_CON_BUF_ADDR=0x0f200000
 CONFIG_PRE_CON_BUF_SZ=4096
-CONFIG_BOOTSTAGE_STASH_ADDR=0x0
 CONFIG_DEBUG_UART_BASE=0xff1a0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -286,6 +289,7 @@ CONFIG_ARMV8_SET_SMPEN=y
 CONFIG_PSCI_RESET=y
 # CONFIG_ARMV8_PSCI is not set
 # CONFIG_ARMV8_EA_EL3_FIRST is not set
+# CONFIG_ARMV8_UDELAY_EVENT_STREAM is not set
 CONFIG_ARMV8_CRYPTO=y
 CONFIG_ARMV8_CE_SHA1=y
 CONFIG_ARMV8_CE_SHA256=y
@@ -315,6 +319,7 @@ CONFIG_DEBUG_UART=y
 # Functionality shared between NXP SoCs
 #
 # CONFIG_NXP_ESBC is not set
+CONFIG_SYS_LITTLE_ENDIAN=y
 
 #
 # General setup
@@ -322,7 +327,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
 CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=130300
+CONFIG_GCC_VERSION=140200
 CONFIG_CLANG_VERSION=0
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
@@ -399,6 +404,7 @@ CONFIG_BOOTSTD_FULL=y
 CONFIG_BOOTSTD_DEFAULTS=y
 CONFIG_BOOTSTD_BOOTCOMMAND=y
 CONFIG_BOOTMETH_GLOBAL=y
+# CONFIG_BOOTMETH_ANDROID is not set
 # CONFIG_BOOTMETH_CROS is not set
 CONFIG_BOOTMETH_EXTLINUX=y
 CONFIG_BOOTMETH_EXTLINUX_PXE=y
@@ -427,7 +433,6 @@ CONFIG_SYS_BOOT_RAMDISK_HIGH=y
 # Boot timing
 #
 # CONFIG_BOOTSTAGE is not set
-CONFIG_BOOTSTAGE_STASH_SIZE=0x1000
 # CONFIG_SHOW_BOOT_PROGRESS is not set
 # CONFIG_SPL_SHOW_BOOT_PROGRESS is not set
 
@@ -532,7 +537,9 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
 #
 # Start-up hooks
 #
-# CONFIG_CYCLIC is not set
+CONFIG_CYCLIC=y
+# CONFIG_SPL_CYCLIC is not set
+CONFIG_CYCLIC_MAX_CPU_TIME_US=5000
 CONFIG_EVENT=y
 CONFIG_EVENT_DYNAMIC=y
 # CONFIG_EVENT_DEBUG is not set
@@ -595,6 +602,7 @@ CONFIG_SPL_BINMAN_SYMBOLS=y
 CONFIG_SPL_BINMAN_UBOOT_SYMBOLS=y
 CONFIG_HANDOFF=y
 CONFIG_SPL_HANDOFF=y
+# CONFIG_SPL_SOC_INIT is not set
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_BOOTROM_SUPPORT is not set
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
@@ -705,6 +713,7 @@ CONFIG_CMD_BOOTFLOW=y
 CONFIG_CMD_BOOTFLOW_FULL=y
 CONFIG_CMD_BOOTMETH=y
 CONFIG_BOOTM_EFI=y
+CONFIG_BOOTM_ELF=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_BOOTI=y
 CONFIG_BOOTM_LINUX=y
@@ -729,7 +738,6 @@ CONFIG_CMD_FDT=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_RUN=y
 CONFIG_CMD_IMI=y
-# CONFIG_CMD_IMLS is not set
 CONFIG_CMD_XIMG=y
 CONFIG_SYS_XIMG_LEN=0x800000
 # CONFIG_CMD_SPL is not set
@@ -784,7 +792,6 @@ CONFIG_CMD_UNZIP=y
 #
 # Device access commands
 #
-# CONFIG_CMD_ARMFLASH is not set
 # CONFIG_CMD_ADC is not set
 # CONFIG_CMD_BCB is not set
 # CONFIG_CMD_BIND is not set
@@ -792,7 +799,6 @@ CONFIG_CMD_UNZIP=y
 # CONFIG_CMD_DEMO is not set
 # CONFIG_CMD_DFU is not set
 CONFIG_CMD_DM=y
-# CONFIG_CMD_FPGAD is not set
 # CONFIG_CMD_FUSE is not set
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_GPIO_READ is not set
@@ -833,8 +839,6 @@ CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SPI=y
 CONFIG_DEFAULT_SPI_BUS=0
 CONFIG_DEFAULT_SPI_MODE=0x0
-# CONFIG_CMD_TSI148 is not set
-# CONFIG_CMD_UNIVERSE is not set
 CONFIG_CMD_USB=y
 # CONFIG_CMD_USB_SDP is not set
 # CONFIG_CMD_RKMTD is not set
@@ -967,6 +971,7 @@ CONFIG_MTDPARTS_DEFAULT=""
 #
 # Debug commands
 #
+CONFIG_CMD_CYCLIC=y
 # CONFIG_CMD_DIAG is not set
 # CONFIG_CMD_EVENT is not set
 CONFIG_CMD_LOG=y
@@ -1010,6 +1015,7 @@ CONFIG_OF_UPSTREAM=y
 # CONFIG_OF_UPSTREAM_BUILD_VENDOR is not set
 CONFIG_OF_SEPARATE=y
 # CONFIG_OF_EMBED is not set
+# CONFIG_OF_INITIAL_DTB_READONLY is not set
 # CONFIG_OF_BOARD is not set
 # CONFIG_OF_OMIT_DTB is not set
 CONFIG_DEVICE_TREE_INCLUDES=""
@@ -1041,7 +1047,6 @@ CONFIG_ENV_IS_NOWHERE=y
 # CONFIG_ENV_IS_IN_MMC is not set
 # CONFIG_ENV_IS_IN_NAND is not set
 # CONFIG_ENV_IS_IN_NVRAM is not set
-# CONFIG_ENV_IS_IN_ONENAND is not set
 # CONFIG_ENV_IS_IN_REMOTE is not set
 # CONFIG_ENV_IS_IN_SPI_FLASH is not set
 # CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set
@@ -1122,6 +1127,7 @@ CONFIG_OFNODE_MULTI_TREE=y
 CONFIG_OFNODE_MULTI_TREE_MAX=4
 CONFIG_BOUNCE_BUFFER=y
 CONFIG_ADC=y
+# CONFIG_SPL_ADC is not set
 # CONFIG_ADC_EXYNOS is not set
 # CONFIG_ADC_SANDBOX is not set
 # CONFIG_SARADC_MESON is not set
@@ -1180,6 +1186,7 @@ CONFIG_SPL_CLK=y
 # CONFIG_CLK_K210 is not set
 # CONFIG_CLK_MPC83XX is not set
 # CONFIG_CLK_XLNX_CLKWZRD is not set
+# CONFIG_COMMON_CLK_ADI_SHARED is not set
 # CONFIG_CLK_AT91 is not set
 # CONFIG_CLK_RCAR is not set
 # CONFIG_CLK_RCAR_CPG_LIB is not set
@@ -1297,7 +1304,6 @@ CONFIG_ROCKCHIP_GPIO=y
 # CONFIG_MPC8XX_GPIO is not set
 # CONFIG_NX_GPIO is not set
 # CONFIG_NOMADIK_GPIO is not set
-# CONFIG_ZYNQMP_GPIO_MODEPIN is not set
 # CONFIG_SLG7XL45106_I2C_GPO is not set
 # CONFIG_FTGPIO010 is not set
 # CONFIG_ADP5585_GPIO is not set
@@ -1327,6 +1333,7 @@ CONFIG_I2C_CROS_EC_TUNNEL=y
 # CONFIG_SYS_I2C_OCORES is not set
 CONFIG_SYS_I2C_ROCKCHIP=y
 # CONFIG_SYS_I2C_SOFT is not set
+# CONFIG_SYS_I2C_S3C24X0 is not set
 # CONFIG_SYS_I2C_MV is not set
 # CONFIG_SYS_I2C_MVTWSI is not set
 # CONFIG_SYS_I2C_XILINX_XIIC is not set
@@ -1438,6 +1445,7 @@ CONFIG_MMC_HW_PARTITIONING=y
 # CONFIG_SUPPORT_EMMC_RPMB is not set
 # CONFIG_SUPPORT_EMMC_BOOT is not set
 CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_SUPPORTS_TUNING=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
@@ -1484,6 +1492,7 @@ CONFIG_MTD=y
 # CONFIG_DM_MTD is not set
 # CONFIG_MTD_NOR_FLASH is not set
 # CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_BLOCK is not set
 # CONFIG_SYS_MTDPARTS_RUNTIME is not set
 # CONFIG_FLASH_CFI_DRIVER is not set
 # CONFIG_HBMC_AM654 is not set
@@ -1539,6 +1548,7 @@ CONFIG_SPI_FLASH_USE_4K_SECTORS=y
 # CONFIG_MV88E6352_SWITCH is not set
 CONFIG_PHYLIB=y
 # CONFIG_PHY_ADDR_ENABLE is not set
+CONFIG_PHY_ANEG_TIMEOUT=4000
 # CONFIG_B53_SWITCH is not set
 # CONFIG_MV88E61XX_SWITCH is not set
 # CONFIG_PHYLIB_10G is not set
@@ -1588,6 +1598,7 @@ CONFIG_PHY_GIGE=y
 # CONFIG_BCMGENET is not set
 # CONFIG_BNXT_ETH is not set
 # CONFIG_CALXEDA_XGMAC is not set
+# CONFIG_DWC_ETH_XGMAC is not set
 # CONFIG_DRIVER_DM9000 is not set
 # CONFIG_DWC_ETH_QOS is not set
 # CONFIG_EEPRO100 is not set
@@ -1828,6 +1839,7 @@ CONFIG_RNG_ROCKCHIP=y
 # CONFIG_RNG_IPROC200 is not set
 # CONFIG_RNG_SMCCC_TRNG is not set
 # CONFIG_RNG_ARM_RNDR is not set
+# CONFIG_RNG_EXYNOS is not set
 
 #
 # Real Time Clock
@@ -1910,6 +1922,7 @@ CONFIG_SYS_NS16550_MEM32=y
 # SOC (System On Chip) specific Drivers
 #
 # CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_QCOM is not set
 # CONFIG_SOC_SAMSUNG is not set
 # CONFIG_SOC_TI is not set
 CONFIG_SPI=y
@@ -2037,6 +2050,7 @@ CONFIG_USB_DWC3=y
 # CONFIG_USB_DWC3_OMAP is not set
 CONFIG_USB_DWC3_GENERIC=y
 # CONFIG_SPL_USB_DWC3_GENERIC is not set
+# CONFIG_USB_DWC3_AM62 is not set
 # CONFIG_USB_DWC3_LAYERSCAPE is not set
 
 #
@@ -2119,6 +2133,8 @@ CONFIG_CONSOLE_NORMAL=y
 # CONFIG_CONSOLE_TRUETYPE is not set
 CONFIG_SYS_WHITE_ON_BLACK=y
 # CONFIG_NO_FB_CLEAR is not set
+CONFIG_VIDEO_SYNC_MS=100
+CONFIG_VIDEO_SYNC_CYCLIC_MS=10
 CONFIG_PANEL=y
 CONFIG_SIMPLE_PANEL=y
 # CONFIG_PANEL_HX8238D is not set
@@ -2208,7 +2224,6 @@ CONFIG_VIDEO_BMP_RLE8=y
 # Watchdog Timer Support
 #
 # CONFIG_WATCHDOG is not set
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
 # CONFIG_IMX_WATCHDOG is not set
 # CONFIG_ULP_WATCHDOG is not set
 # CONFIG_WDT is not set
@@ -2403,6 +2418,6 @@ CONFIG_TOOLS_SHA1=y
 CONFIG_TOOLS_SHA256=y
 CONFIG_TOOLS_SHA384=y
 CONFIG_TOOLS_SHA512=y
-# CONFIG_TOOLS_MKEFICAPSULE is not set
+CONFIG_TOOLS_MKEFICAPSULE=y
 # CONFIG_FSPI_CONF_HEADER is not set
 # CONFIG_TOOLS_MKFWUMDATA is not set
diff --git a/config/u-boot/gru_kevin/config/default b/config/u-boot/gru_kevin/config/default
index 1bf46d24..397e387a 100644
--- a/config/u-boot/gru_kevin/config/default
+++ b/config/u-boot/gru_kevin/config/default
@@ -1,12 +1,13 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# U-Boot 2024.07 Configuration
+# U-Boot 2024.10 Configuration
 #
 
 #
-# Compiler: gcc (Debian 13.3.0-2) 13.3.0
+# Compiler: gcc (Debian 14.2.0-8) 14.2.0
 #
 CONFIG_CREATE_ARCH_SYMLINK=y
+CONFIG_SUPPORT_LITTLE_ENDIAN=y
 CONFIG_SYS_CACHE_SHIFT_6=y
 CONFIG_64BIT=y
 CONFIG_SYS_CACHELINE_SIZE=64
@@ -123,6 +124,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y
 # CONFIG_ARCH_SUNXI is not set
 # CONFIG_ARCH_U8500 is not set
 # CONFIG_ARCH_VERSAL is not set
+# CONFIG_ARCH_VERSAL2 is not set
 # CONFIG_ARCH_VERSAL_NET is not set
 # CONFIG_ARCH_VF610 is not set
 # CONFIG_ARCH_ZYNQ is not set
@@ -162,6 +164,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y
 # CONFIG_TARGET_LS1046AQDS is not set
 # CONFIG_TARGET_LS1046ARDB is not set
 # CONFIG_TARGET_LS1046AFRWY is not set
+# CONFIG_ARCH_SC5XX is not set
 # CONFIG_TARGET_SL28 is not set
 # CONFIG_TARGET_TEN64 is not set
 # CONFIG_ARCH_UNIPHIER is not set
@@ -192,7 +195,7 @@ CONFIG_SPL_LDSCRIPT="arch/arm/cpu/armv8/u-boot-spl.lds"
 CONFIG_ENV_SOURCE_FILE=""
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SF_DEFAULT_MODE=0x0
-CONFIG_ENV_SIZE=0x8000
+CONFIG_ENV_SIZE=0x1f000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-kevin"
@@ -254,13 +257,13 @@ CONFIG_SPL_BSS_START_ADDR=0xff8e0000
 CONFIG_SPL_BSS_MAX_SIZE=0x10000
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
 CONFIG_SPL_SYS_MALLOC_F=y
 CONFIG_ERR_PTR_OFFSET=0x0
 CONFIG_SPL_SIZE_LIMIT=0x0
 CONFIG_SPL=y
 CONFIG_PRE_CON_BUF_ADDR=0x0f200000
 CONFIG_PRE_CON_BUF_SZ=4096
-CONFIG_BOOTSTAGE_STASH_ADDR=0x0
 CONFIG_DEBUG_UART_BASE=0xff1a0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -286,6 +289,7 @@ CONFIG_ARMV8_SET_SMPEN=y
 CONFIG_PSCI_RESET=y
 # CONFIG_ARMV8_PSCI is not set
 # CONFIG_ARMV8_EA_EL3_FIRST is not set
+# CONFIG_ARMV8_UDELAY_EVENT_STREAM is not set
 CONFIG_ARMV8_CRYPTO=y
 CONFIG_ARMV8_CE_SHA1=y
 CONFIG_ARMV8_CE_SHA256=y
@@ -315,6 +319,7 @@ CONFIG_DEBUG_UART=y
 # Functionality shared between NXP SoCs
 #
 # CONFIG_NXP_ESBC is not set
+CONFIG_SYS_LITTLE_ENDIAN=y
 
 #
 # General setup
@@ -322,7 +327,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
 CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=130300
+CONFIG_GCC_VERSION=140200
 CONFIG_CLANG_VERSION=0
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
@@ -399,6 +404,7 @@ CONFIG_BOOTSTD_FULL=y
 CONFIG_BOOTSTD_DEFAULTS=y
 CONFIG_BOOTSTD_BOOTCOMMAND=y
 CONFIG_BOOTMETH_GLOBAL=y
+# CONFIG_BOOTMETH_ANDROID is not set
 # CONFIG_BOOTMETH_CROS is not set
 CONFIG_BOOTMETH_EXTLINUX=y
 CONFIG_BOOTMETH_EXTLINUX_PXE=y
@@ -427,7 +433,6 @@ CONFIG_SYS_BOOT_RAMDISK_HIGH=y
 # Boot timing
 #
 # CONFIG_BOOTSTAGE is not set
-CONFIG_BOOTSTAGE_STASH_SIZE=0x1000
 # CONFIG_SHOW_BOOT_PROGRESS is not set
 # CONFIG_SPL_SHOW_BOOT_PROGRESS is not set
 
@@ -532,7 +537,9 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
 #
 # Start-up hooks
 #
-# CONFIG_CYCLIC is not set
+CONFIG_CYCLIC=y
+# CONFIG_SPL_CYCLIC is not set
+CONFIG_CYCLIC_MAX_CPU_TIME_US=5000
 CONFIG_EVENT=y
 CONFIG_EVENT_DYNAMIC=y
 # CONFIG_EVENT_DEBUG is not set
@@ -595,6 +602,7 @@ CONFIG_SPL_BINMAN_SYMBOLS=y
 CONFIG_SPL_BINMAN_UBOOT_SYMBOLS=y
 CONFIG_HANDOFF=y
 CONFIG_SPL_HANDOFF=y
+# CONFIG_SPL_SOC_INIT is not set
 CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_BOOTROM_SUPPORT is not set
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
@@ -705,6 +713,7 @@ CONFIG_CMD_BOOTFLOW=y
 CONFIG_CMD_BOOTFLOW_FULL=y
 CONFIG_CMD_BOOTMETH=y
 CONFIG_BOOTM_EFI=y
+CONFIG_BOOTM_ELF=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_BOOTI=y
 CONFIG_BOOTM_LINUX=y
@@ -729,7 +738,6 @@ CONFIG_CMD_FDT=y
 CONFIG_CMD_GO=y
 CONFIG_CMD_RUN=y
 CONFIG_CMD_IMI=y
-# CONFIG_CMD_IMLS is not set
 CONFIG_CMD_XIMG=y
 CONFIG_SYS_XIMG_LEN=0x800000
 # CONFIG_CMD_SPL is not set
@@ -784,7 +792,6 @@ CONFIG_CMD_UNZIP=y
 #
 # Device access commands
 #
-# CONFIG_CMD_ARMFLASH is not set
 # CONFIG_CMD_ADC is not set
 # CONFIG_CMD_BCB is not set
 # CONFIG_CMD_BIND is not set
@@ -792,7 +799,6 @@ CONFIG_CMD_UNZIP=y
 # CONFIG_CMD_DEMO is not set
 # CONFIG_CMD_DFU is not set
 CONFIG_CMD_DM=y
-# CONFIG_CMD_FPGAD is not set
 # CONFIG_CMD_FUSE is not set
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_GPIO_READ is not set
@@ -833,8 +839,6 @@ CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SPI=y
 CONFIG_DEFAULT_SPI_BUS=0
 CONFIG_DEFAULT_SPI_MODE=0x0
-# CONFIG_CMD_TSI148 is not set
-# CONFIG_CMD_UNIVERSE is not set
 CONFIG_CMD_USB=y
 # CONFIG_CMD_USB_SDP is not set
 # CONFIG_CMD_RKMTD is not set
@@ -967,6 +971,7 @@ CONFIG_MTDPARTS_DEFAULT=""
 #
 # Debug commands
 #
+CONFIG_CMD_CYCLIC=y
 # CONFIG_CMD_DIAG is not set
 # CONFIG_CMD_EVENT is not set
 CONFIG_CMD_LOG=y
@@ -1010,6 +1015,7 @@ CONFIG_OF_UPSTREAM=y
 # CONFIG_OF_UPSTREAM_BUILD_VENDOR is not set
 CONFIG_OF_SEPARATE=y
 # CONFIG_OF_EMBED is not set
+# CONFIG_OF_INITIAL_DTB_READONLY is not set
 # CONFIG_OF_BOARD is not set
 # CONFIG_OF_OMIT_DTB is not set
 CONFIG_DEVICE_TREE_INCLUDES=""
@@ -1041,7 +1047,6 @@ CONFIG_ENV_IS_NOWHERE=y
 # CONFIG_ENV_IS_IN_MMC is not set
 # CONFIG_ENV_IS_IN_NAND is not set
 # CONFIG_ENV_IS_IN_NVRAM is not set
-# CONFIG_ENV_IS_IN_ONENAND is not set
 # CONFIG_ENV_IS_IN_REMOTE is not set
 # CONFIG_ENV_IS_IN_SPI_FLASH is not set
 # CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set
@@ -1122,6 +1127,7 @@ CONFIG_OFNODE_MULTI_TREE=y
 CONFIG_OFNODE_MULTI_TREE_MAX=4
 CONFIG_BOUNCE_BUFFER=y
 CONFIG_ADC=y
+# CONFIG_SPL_ADC is not set
 # CONFIG_ADC_EXYNOS is not set
 # CONFIG_ADC_SANDBOX is not set
 # CONFIG_SARADC_MESON is not set
@@ -1180,6 +1186,7 @@ CONFIG_SPL_CLK=y
 # CONFIG_CLK_K210 is not set
 # CONFIG_CLK_MPC83XX is not set
 # CONFIG_CLK_XLNX_CLKWZRD is not set
+# CONFIG_COMMON_CLK_ADI_SHARED is not set
 # CONFIG_CLK_AT91 is not set
 # CONFIG_CLK_RCAR is not set
 # CONFIG_CLK_RCAR_CPG_LIB is not set
@@ -1297,7 +1304,6 @@ CONFIG_ROCKCHIP_GPIO=y
 # CONFIG_MPC8XX_GPIO is not set
 # CONFIG_NX_GPIO is not set
 # CONFIG_NOMADIK_GPIO is not set
-# CONFIG_ZYNQMP_GPIO_MODEPIN is not set
 # CONFIG_SLG7XL45106_I2C_GPO is not set
 # CONFIG_FTGPIO010 is not set
 # CONFIG_ADP5585_GPIO is not set
@@ -1327,6 +1333,7 @@ CONFIG_I2C_CROS_EC_TUNNEL=y
 # CONFIG_SYS_I2C_OCORES is not set
 CONFIG_SYS_I2C_ROCKCHIP=y
 # CONFIG_SYS_I2C_SOFT is not set
+# CONFIG_SYS_I2C_S3C24X0 is not set
 # CONFIG_SYS_I2C_MV is not set
 # CONFIG_SYS_I2C_MVTWSI is not set
 # CONFIG_SYS_I2C_XILINX_XIIC is not set
@@ -1438,6 +1445,7 @@ CONFIG_MMC_HW_PARTITIONING=y
 # CONFIG_SUPPORT_EMMC_RPMB is not set
 # CONFIG_SUPPORT_EMMC_BOOT is not set
 CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_SUPPORTS_TUNING=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
@@ -1484,6 +1492,7 @@ CONFIG_MTD=y
 # CONFIG_DM_MTD is not set
 # CONFIG_MTD_NOR_FLASH is not set
 # CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_BLOCK is not set
 # CONFIG_SYS_MTDPARTS_RUNTIME is not set
 # CONFIG_FLASH_CFI_DRIVER is not set
 # CONFIG_HBMC_AM654 is not set
@@ -1539,6 +1548,7 @@ CONFIG_SPI_FLASH_USE_4K_SECTORS=y
 # CONFIG_MV88E6352_SWITCH is not set
 CONFIG_PHYLIB=y
 # CONFIG_PHY_ADDR_ENABLE is not set
+CONFIG_PHY_ANEG_TIMEOUT=4000
 # CONFIG_B53_SWITCH is not set
 # CONFIG_MV88E61XX_SWITCH is not set
 # CONFIG_PHYLIB_10G is not set
@@ -1588,6 +1598,7 @@ CONFIG_PHY_GIGE=y
 # CONFIG_BCMGENET is not set
 # CONFIG_BNXT_ETH is not set
 # CONFIG_CALXEDA_XGMAC is not set
+# CONFIG_DWC_ETH_XGMAC is not set
 # CONFIG_DRIVER_DM9000 is not set
 # CONFIG_DWC_ETH_QOS is not set
 # CONFIG_EEPRO100 is not set
@@ -1828,6 +1839,7 @@ CONFIG_RNG_ROCKCHIP=y
 # CONFIG_RNG_IPROC200 is not set
 # CONFIG_RNG_SMCCC_TRNG is not set
 # CONFIG_RNG_ARM_RNDR is not set
+# CONFIG_RNG_EXYNOS is not set
 
 #
 # Real Time Clock
@@ -1910,6 +1922,7 @@ CONFIG_SYS_NS16550_MEM32=y
 # SOC (System On Chip) specific Drivers
 #
 # CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_QCOM is not set
 # CONFIG_SOC_SAMSUNG is not set
 # CONFIG_SOC_TI is not set
 CONFIG_SPI=y
@@ -2037,6 +2050,7 @@ CONFIG_USB_DWC3=y
 # CONFIG_USB_DWC3_OMAP is not set
 CONFIG_USB_DWC3_GENERIC=y
 # CONFIG_SPL_USB_DWC3_GENERIC is not set
+# CONFIG_USB_DWC3_AM62 is not set
 # CONFIG_USB_DWC3_LAYERSCAPE is not set
 
 #
@@ -2119,6 +2133,8 @@ CONFIG_CONSOLE_NORMAL=y
 # CONFIG_CONSOLE_TRUETYPE is not set
 CONFIG_SYS_WHITE_ON_BLACK=y
 # CONFIG_NO_FB_CLEAR is not set
+CONFIG_VIDEO_SYNC_MS=100
+CONFIG_VIDEO_SYNC_CYCLIC_MS=10
 CONFIG_PANEL=y
 CONFIG_SIMPLE_PANEL=y
 # CONFIG_PANEL_HX8238D is not set
@@ -2208,7 +2224,6 @@ CONFIG_VIDEO_BMP_RLE8=y
 # Watchdog Timer Support
 #
 # CONFIG_WATCHDOG is not set
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
 # CONFIG_IMX_WATCHDOG is not set
 # CONFIG_ULP_WATCHDOG is not set
 # CONFIG_WDT is not set
@@ -2403,6 +2418,6 @@ CONFIG_TOOLS_SHA1=y
 CONFIG_TOOLS_SHA256=y
 CONFIG_TOOLS_SHA384=y
 CONFIG_TOOLS_SHA512=y
-# CONFIG_TOOLS_MKEFICAPSULE is not set
+CONFIG_TOOLS_MKEFICAPSULE=y
 # CONFIG_FSPI_CONF_HEADER is not set
 # CONFIG_TOOLS_MKFWUMDATA is not set
diff --git a/config/u-boot/qemu_arm64_12mb/config/default b/config/u-boot/qemu_arm64_12mb/config/default
index 65c6e684..ecdef9e4 100644
--- a/config/u-boot/qemu_arm64_12mb/config/default
+++ b/config/u-boot/qemu_arm64_12mb/config/default
@@ -1,12 +1,13 @@
 #
 # Automatically generated file; DO NOT EDIT.
-# U-Boot 2024.07 Configuration
+# U-Boot 2024.10 Configuration
 #
 
 #
-# Compiler: gcc (Debian 13.3.0-2) 13.3.0
+# Compiler: gcc (Debian 14.2.0-8) 14.2.0
 #
 CONFIG_CREATE_ARCH_SYMLINK=y
+CONFIG_SUPPORT_LITTLE_ENDIAN=y
 CONFIG_SYS_CACHE_SHIFT_6=y
 CONFIG_64BIT=y
 CONFIG_SYS_CACHELINE_SIZE=64
@@ -113,6 +114,7 @@ CONFIG_ARCH_QEMU=y
 # CONFIG_ARCH_SUNXI is not set
 # CONFIG_ARCH_U8500 is not set
 # CONFIG_ARCH_VERSAL is not set
+# CONFIG_ARCH_VERSAL2 is not set
 # CONFIG_ARCH_VERSAL_NET is not set
 # CONFIG_ARCH_VF610 is not set
 # CONFIG_ARCH_ZYNQ is not set
@@ -152,6 +154,7 @@ CONFIG_ARCH_QEMU=y
 # CONFIG_TARGET_LS1046AQDS is not set
 # CONFIG_TARGET_LS1046ARDB is not set
 # CONFIG_TARGET_LS1046AFRWY is not set
+# CONFIG_ARCH_SC5XX is not set
 # CONFIG_TARGET_SL28 is not set
 # CONFIG_TARGET_TEN64 is not set
 # CONFIG_ARCH_UNIPHIER is not set
@@ -188,10 +191,10 @@ CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
 CONFIG_SYS_MONITOR_LEN=0
 # CONFIG_TARGET_QEMU_ARM_32BIT is not set
 CONFIG_TARGET_QEMU_ARM_64BIT=y
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
 CONFIG_ERR_PTR_OFFSET=0x0
 CONFIG_PRE_CON_BUF_ADDR=0x40100000
 CONFIG_PRE_CON_BUF_SZ=4096
-CONFIG_BOOTSTAGE_STASH_ADDR=0x0
 CONFIG_DEBUG_UART_BASE=0x9000000
 CONFIG_DEBUG_UART_CLOCK=0
 # CONFIG_DEBUG_UART_BOARD_INIT is not set
@@ -210,6 +213,7 @@ CONFIG_SYS_CLK_FREQ=0
 CONFIG_PSCI_RESET=y
 # CONFIG_ARMV8_PSCI is not set
 # CONFIG_ARMV8_EA_EL3_FIRST is not set
+# CONFIG_ARMV8_UDELAY_EVENT_STREAM is not set
 CONFIG_ARMV8_CRYPTO=y
 CONFIG_ARMV8_CE_SHA1=y
 CONFIG_ARMV8_CE_SHA256=y
@@ -241,6 +245,7 @@ CONFIG_AHCI=y
 # Functionality shared between NXP SoCs
 #
 # CONFIG_NXP_ESBC is not set
+CONFIG_SYS_LITTLE_ENDIAN=y
 
 #
 # General setup
@@ -248,7 +253,7 @@ CONFIG_AHCI=y
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
 CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=130300
+CONFIG_GCC_VERSION=140200
 CONFIG_CLANG_VERSION=0
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
@@ -314,11 +319,13 @@ CONFIG_BOOTSTD_FULL=y
 CONFIG_BOOTSTD_DEFAULTS=y
 CONFIG_BOOTSTD_BOOTCOMMAND=y
 CONFIG_BOOTMETH_GLOBAL=y
+# CONFIG_BOOTMETH_ANDROID is not set
 # CONFIG_BOOTMETH_CROS is not set
 CONFIG_BOOTMETH_EXTLINUX=y
 CONFIG_BOOTMETH_EXTLINUX_PXE=y
 CONFIG_BOOTMETH_EFILOADER=y
 CONFIG_BOOTMETH_EFI_BOOTMGR=y
+CONFIG_BOOTMETH_QFW=y
 CONFIG_BOOTMETH_VBE=y
 CONFIG_BOOTMETH_DISTRO=y
 CONFIG_BOOTMETH_VBE_REQUEST=y
@@ -340,7 +347,6 @@ CONFIG_SYS_BOOT_RAMDISK_HIGH=y
 # Boot timing
 #
 # CONFIG_BOOTSTAGE is not set
-CONFIG_BOOTSTAGE_STASH_SIZE=0x1000
 # CONFIG_SHOW_BOOT_PROGRESS is not set
 
 #
@@ -434,7 +440,9 @@ CONFIG_SYS_DEVICE_NULLDEV=y
 #
 # Start-up hooks
 #
-# CONFIG_CYCLIC is not set
+CONFIG_CYCLIC=y
+# CONFIG_SPL_CYCLIC is not set
+CONFIG_CYCLIC_MAX_CPU_TIME_US=5000
 CONFIG_EVENT=y
 CONFIG_EVENT_DYNAMIC=y
 # CONFIG_EVENT_DEBUG is not set
@@ -517,6 +525,7 @@ CONFIG_CMD_BOOTFLOW=y
 CONFIG_CMD_BOOTFLOW_FULL=y
 CONFIG_CMD_BOOTMETH=y
 CONFIG_BOOTM_EFI=y
+CONFIG_BOOTM_ELF=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_BOOTI=y
 CONFIG_BOOTM_LINUX=y
@@ -600,7 +609,6 @@ CONFIG_CMD_UNZIP=y
 CONFIG_CMD_DFU=y
 CONFIG_CMD_DM=y
 CONFIG_CMD_FLASH=y
-# CONFIG_CMD_FPGAD is not set
 # CONFIG_CMD_FUSE is not set
 # CONFIG_CMD_GPIO is not set
 # CONFIG_CMD_GPT is not set
@@ -631,8 +639,6 @@ CONFIG_CMD_POWEROFF=y
 # CONFIG_CMD_SATA is not set
 CONFIG_CMD_SCSI=y
 # CONFIG_CMD_SDRAM is not set
-# CONFIG_CMD_TSI148 is not set
-# CONFIG_CMD_UNIVERSE is not set
 CONFIG_CMD_USB=y
 # CONFIG_CMD_USB_SDP is not set
 # CONFIG_CMD_RKMTD is not set
@@ -680,12 +686,12 @@ CONFIG_NET_TFTP_VARS=y
 # CONFIG_CMD_RARP is not set
 # CONFIG_CMD_NFS is not set
 # CONFIG_SYS_DISABLE_AUTOLOAD is not set
-# CONFIG_CMD_WGET is not set
+CONFIG_CMD_WGET=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 # CONFIG_CMD_CDP is not set
 # CONFIG_CMD_SNTP is not set
-# CONFIG_CMD_DNS is not set
+CONFIG_CMD_DNS=y
 # CONFIG_CMD_LINK_LOCAL is not set
 # CONFIG_CMD_ETHSW is not set
 CONFIG_CMD_PXE=y
@@ -698,10 +704,11 @@ CONFIG_CMD_PXE=y
 # CONFIG_CMD_BMP is not set
 # CONFIG_CMD_BSP is not set
 CONFIG_CMD_BLOCK_CACHE=y
+CONFIG_CMD_BLKMAP=y
 # CONFIG_CMD_CACHE is not set
 # CONFIG_CMD_CONITRACE is not set
 CONFIG_CMD_CLS=y
-# CONFIG_CMD_EFIDEBUG is not set
+CONFIG_CMD_EFIDEBUG=y
 CONFIG_CMD_EFICONFIG=y
 # CONFIG_CMD_EXCEPTION is not set
 # CONFIG_CMD_INI is not set
@@ -768,6 +775,7 @@ CONFIG_CMD_MTDPARTS=y
 #
 # Debug commands
 #
+CONFIG_CMD_CYCLIC=y
 # CONFIG_CMD_DIAG is not set
 # CONFIG_CMD_EVENT is not set
 # CONFIG_CMD_LOG is not set
@@ -797,6 +805,7 @@ CONFIG_OF_REAL=y
 # CONFIG_OF_UPSTREAM is not set
 CONFIG_OF_SEPARATE=y
 # CONFIG_OF_EMBED is not set
+# CONFIG_OF_INITIAL_DTB_READONLY is not set
 CONFIG_OF_BOARD=y
 CONFIG_OF_HAS_PRIOR_STAGE=y
 CONFIG_OF_OMIT_DTB=y
@@ -823,7 +832,6 @@ CONFIG_ENV_IS_NOWHERE=y
 # CONFIG_ENV_IS_IN_FLASH is not set
 # CONFIG_ENV_IS_IN_NAND is not set
 # CONFIG_ENV_IS_IN_NVRAM is not set
-# CONFIG_ENV_IS_IN_ONENAND is not set
 # CONFIG_ENV_IS_IN_REMOTE is not set
 # CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set
 # CONFIG_SYS_RELOC_GD_ENV_ADDR is not set
@@ -862,7 +870,8 @@ CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64
 # CONFIG_USE_NETMASK is not set
 # CONFIG_USE_ROOTPATH is not set
 # CONFIG_USE_SERVERIP is not set
-# CONFIG_PROT_TCP is not set
+CONFIG_PROT_TCP=y
+# CONFIG_PROT_TCP_SACK is not set
 # CONFIG_IPV6 is not set
 CONFIG_SYS_RX_ETH_BUFFER=4
 
@@ -911,7 +920,7 @@ CONFIG_AHCI_PCI=y
 #
 CONFIG_BLK=y
 CONFIG_BLOCK_CACHE=y
-# CONFIG_BLKMAP is not set
+CONFIG_BLKMAP=y
 # CONFIG_EFI_MEDIA is not set
 # CONFIG_IDE is not set
 # CONFIG_LBA48 is not set
@@ -939,6 +948,7 @@ CONFIG_BLOCK_CACHE=y
 #
 # CONFIG_CLK is not set
 # CONFIG_CLK_CCF is not set
+# CONFIG_COMMON_CLK_ADI_SHARED is not set
 # CONFIG_CLK_RCAR is not set
 # CONFIG_CLK_RCAR_CPG_LIB is not set
 # CONFIG_CPU is not set
@@ -1119,6 +1129,7 @@ CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 # CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_BLOCK is not set
 CONFIG_SYS_MTDPARTS_RUNTIME=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI_WIDTH_8BIT=y
@@ -1180,6 +1191,7 @@ CONFIG_NETDEVICES=y
 # CONFIG_BCMGENET is not set
 # CONFIG_BNXT_ETH is not set
 # CONFIG_CALXEDA_XGMAC is not set
+# CONFIG_DWC_ETH_XGMAC is not set
 # CONFIG_DRIVER_DM9000 is not set
 # CONFIG_DWC_ETH_QOS is not set
 CONFIG_E1000=y
@@ -1315,6 +1327,7 @@ CONFIG_DM_RNG=y
 # CONFIG_RNG_SMCCC_TRNG is not set
 # CONFIG_RNG_ARM_RNDR is not set
 CONFIG_TPM_RNG=y
+# CONFIG_RNG_EXYNOS is not set
 
 #
 # Real Time Clock
@@ -1403,6 +1416,7 @@ CONFIG_PL01X_SERIAL=y
 # SOC (System On Chip) specific Drivers
 #
 # CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_QCOM is not set
 # CONFIG_SOC_SAMSUNG is not set
 # CONFIG_SOC_TI is not set
 # CONFIG_SPI is not set
@@ -1539,6 +1553,8 @@ CONFIG_CONSOLE_NORMAL=y
 # CONFIG_CONSOLE_TRUETYPE is not set
 CONFIG_SYS_WHITE_ON_BLACK=y
 # CONFIG_NO_FB_CLEAR is not set
+CONFIG_VIDEO_SYNC_MS=100
+CONFIG_VIDEO_SYNC_CYCLIC_MS=10
 CONFIG_PANEL=y
 # CONFIG_PANEL_HX8238D is not set
 
@@ -1620,7 +1636,6 @@ CONFIG_VIRTIO_RNG=y
 # Watchdog Timer Support
 #
 # CONFIG_WATCHDOG is not set
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
 # CONFIG_IMX_WATCHDOG is not set
 # CONFIG_ULP_WATCHDOG is not set
 # CONFIG_WDT is not set
@@ -1760,7 +1775,7 @@ CONFIG_EFI_LOAD_FILE2_INITRD=y
 # CONFIG_EFI_SECURE_BOOT is not set
 CONFIG_EFI_ECPT=y
 CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
-# CONFIG_EFI_HTTP_BOOT is not set
+CONFIG_EFI_HTTP_BOOT=y
 # CONFIG_OPTEE_LIB is not set
 # CONFIG_OPTEE_IMAGE is not set
 # CONFIG_BOOTM_OPTEE is not set
@@ -1798,6 +1813,6 @@ CONFIG_TOOLS_SHA1=y
 CONFIG_TOOLS_SHA256=y
 CONFIG_TOOLS_SHA384=y
 CONFIG_TOOLS_SHA512=y
-# CONFIG_TOOLS_MKEFICAPSULE is not set
+CONFIG_TOOLS_MKEFICAPSULE=y
 # CONFIG_FSPI_CONF_HEADER is not set
 # CONFIG_TOOLS_MKFWUMDATA is not set

From 3dd77b33a720b77386c67a8489aa410dc8be427a Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Sat, 30 Nov 2024 21:50:33 +0300
Subject: [PATCH 0897/1549] u-boot: Enable USB with a preboot command

We need to initialize the USB subsystem before we can use USB devices
like keyboards and external disks, by running `usb start`. Use the
PREBOOT config option to run the necessary command before U-Boot tries
to automatically boot anything. It's already enabled for boards other
than gru_kevin and gru_bob, so just update those two configs.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 config/u-boot/gru_bob/config/default   | 4 +++-
 config/u-boot/gru_kevin/config/default | 4 +++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/config/u-boot/gru_bob/config/default b/config/u-boot/gru_bob/config/default
index 54ad1e4f..863a0fee 100644
--- a/config/u-boot/gru_bob/config/default
+++ b/config/u-boot/gru_bob/config/default
@@ -476,7 +476,9 @@ CONFIG_ARCH_FIXUP_FDT_MEMORY=y
 # CONFIG_BOOTARGS_SUBST is not set
 CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="bootflow scan -lb"
-# CONFIG_USE_PREBOOT is not set
+CONFIG_USE_PREBOOT=y
+CONFIG_PREBOOT="usb start"
+CONFIG_PREBOOT_DEFINED=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
 # CONFIG_SAVE_PREV_BL_FDT_ADDR is not set
 # CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR is not set
diff --git a/config/u-boot/gru_kevin/config/default b/config/u-boot/gru_kevin/config/default
index 397e387a..1e14cdba 100644
--- a/config/u-boot/gru_kevin/config/default
+++ b/config/u-boot/gru_kevin/config/default
@@ -476,7 +476,9 @@ CONFIG_ARCH_FIXUP_FDT_MEMORY=y
 # CONFIG_BOOTARGS_SUBST is not set
 CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="bootflow scan -lb"
-# CONFIG_USE_PREBOOT is not set
+CONFIG_USE_PREBOOT=y
+CONFIG_PREBOOT="usb start"
+CONFIG_PREBOOT_DEFINED=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb"
 # CONFIG_SAVE_PREV_BL_FDT_ADDR is not set
 # CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR is not set

From 28d8dc93a52abea5ddb3467be6e7ce92b25a40d1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 1 Dec 2024 00:39:52 +0000
Subject: [PATCH 0898/1549] vendor.sh: Use the new deguard for 3050micro

I'm adding ThinkPad T480 support next, which requires
the new revision of deguard. Mate Kukri changed the way
deguard is used, in a rewrite of the project, so lbmk
has to change too.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/deguard/pkg.cfg      |  2 +-
 config/vendor/3050micro/pkg.cfg |  8 +++-
 include/vendor.sh               | 76 +++++++++++++++++----------------
 3 files changed, 47 insertions(+), 39 deletions(-)

diff --git a/config/git/deguard/pkg.cfg b/config/git/deguard/pkg.cfg
index 3da47380..f6d24cf6 100644
--- a/config/git/deguard/pkg.cfg
+++ b/config/git/deguard/pkg.cfg
@@ -1,3 +1,3 @@
-rev="fc4c59ac35e6f38c195214d71340a6adade2689f"
+rev="de176a7f20650b272a01efb633931a63128c1647"
 url="https://review.coreboot.org/deguard"
 bkup_url="https://codeberg.org/libreboot/deguard"
diff --git a/config/vendor/3050micro/pkg.cfg b/config/vendor/3050micro/pkg.cfg
index f1f7860b..1756958d 100644
--- a/config/vendor/3050micro/pkg.cfg
+++ b/config/vendor/3050micro/pkg.cfg
@@ -1,4 +1,10 @@
 DL_hash="976bbb1e625f64df276d8343757d910c88b8a781f953bc2c41a7dd15184ec70d55f8081de2a0aaa83cddb8e73bdc2df6288fde6e0897e4928c48ca4bb30bea2d"
 DL_url="https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip"
 DL_url_bkup="https://web.archive.org/web/20230822134231/https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip"
-ME_bootguard="me11disreguard"
+
+# We will use deguard to disable the Intel Boot Guard:
+ME11bootguard="y"
+ME11delta="optiplex_3050" # subdirectory under deguard's data/delta/
+ME11version="11.6.0.1126"
+ME11sku="2M"
+ME11pch="H"
diff --git a/include/vendor.sh b/include/vendor.sh
index 0f97a641..8c1ddcd4 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -23,7 +23,8 @@ eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     E6400_VGA_romname SCH5545EC_DL_url_bkup SCH5545EC_DL_hash _dest tree \
     mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl SCH5545EC_DL_url \
     archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref vrelease \
-    verify _7ztest ME_bootguard IFD_platform ifdprefix $cv`
+    verify _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch \
+    IFD_platform ifdprefix cdir sdir _me _metmp mfs $cv`
 
 vendor_download()
 {
@@ -106,20 +107,31 @@ extract_intel_me()
 {
 	e "$mecleaner" f not && $err "$cbdir: me_cleaner missing"
 
-	_me="$PWD/$_dest"; cdir="$PWD/$appdir"
-	if [ "$ME_bootguard" = "me11disreguard" ]; then
-		# run mkukri's util to extract me.bin and disable bootguard
-		# for Dell OptiPlex 3050 Micro, using the deguard util.
-		extract_deguard_me "$cdir" "$_me"
-		return 0
+	cdir="$PWD/$appdir"
+	_me="$PWD/$_dest"
+	_metmp="$PWD/tmp/me.bin"
+
+	mfs="" && [ "$ME11bootguard" = "y" ] && mfs="--whitelist MFS" && \
+	    chkvars ME11delta ME11version ME11sku ME11pch
+	[ "$ME11bootguard" = "y" ] && x_ ./mk -f deguard
+
+	x_ mkdir -p tmp
+
+	extract_intel_me_bruteforce
+	if [ "$ME11bootguard" = "y" ]; then
+		apply_me11_deguard_mod
+	else
+		mv "$_metmp" "$_me" || $err "!mv $_metmp" "$_me"
 	fi
-	# All other ME setups are extracted with brute force and me_cleaner:
+}
 
-	[ $# -gt 0 ] && _me="${1}" && cdir="$2"
+extract_intel_me_bruteforce()
+{
+	[ $# -gt 0 ] && cdir="$1"
 
-	e "$_me" f && return 0
+	e "$_metmp" f && return 0
 
-	sdir="$(mktemp -d)"; [ -z "$sdir" ] && return 0
+	[ -z "$sdir" ] && sdir="$(mktemp -d)"
 	mkdir -p "$sdir" || $err "extract_intel_me: !mkdir -p \"$sdir\""
 
 	set +u +e
@@ -127,18 +139,19 @@ extract_intel_me()
 	[ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
 	cd "$cdir" || $err "extract_intel_me: !cd \"$cdir\""
 	for i in *; do
-		[ -f "$_me" ] && break
+		[ -f "$_metmp" ] && break
 		[ -L "$i" ] && continue
 		if [ -f "$i" ]; then
-			"$mecleaner" -r -t -O "$sdir/vendorfile" \
-			    -M "$_me" "$i" && break
-			"$mecleaner" -r -t -O "$_me" "$i" && break
-			"$me7updateparser" -O "$_me" "$i" && break
+			_r="-r" && [ -n "$mfs" ] && _r=""
+			"$mecleaner" $mfs $_r -t -O "$sdir/vendorfile" \
+			    -M "$_metmp" "$i" && break
+			"$mecleaner" $mfs $_r -t -O "$_metmp" "$i" && break
+			"$me7updateparser" -O "$_metmp" "$i" && break
 			_7ztest="${_7ztest}a"
 			extract_archive "$i" "$_7ztest" || continue
-			extract_intel_me "$_me" "$cdir/$_7ztest"
+			extract_intel_me_bruteforce "$cdir/$_7ztest"
 		elif [ -d "$i" ]; then
-			extract_intel_me "$_me" "$cdir/$i"
+			extract_intel_me_bruteforce "$cdir/$i"
 		else
 			continue
 		fi
@@ -149,27 +162,16 @@ extract_intel_me()
 	rm -Rf "$sdir" || $err "extract_intel_me: !rm -Rf $sdir"
 }
 
-extract_deguard_me()
+apply_me11_deguard_mod()
 {
-	x_ ./mk -f deguard
-	cp -R src/deguard "$1/disreguard" || \
-	    $err "Cannot make temporary deguard clone in $1/disreguard"
-	if [ ! -e "$1/disreguard/.git" ]; then
-		git -C "$1/disreguard" init || $err "!init $1/disreguard"
-		git -C "$1/disreguard" add -A . || $err "!add $1/disreguard"
-		git -C "$1/disreguard" commit -m "tmp" || \
-		    $err "!commit $1/disreguard"
-	fi
-	git -C "$1/disreguard" am "$PWD/config/data/deguard/appdir.patch" || \
-	    $err "Cannot temporarily patch deguard clone in $1/disreguard"
 	(
-	cd "$1/disreguard" || $err "Cannot cd to '$1/disreguard'"
-	x_ ./RUNME.sh
-	) || $err "$1/disreguard: RUNME.sh returned error status"
-	"$mecleaner" --whitelist MFS --truncate "$1/disreguard/me.bin" || \
-	    $err "extract_intel_me: Can't truncate disreguarded ME"
-	cp "$cdir/disreguard/me.bin" "$2" || \
-	    $err "extract_intel_me: Can't move disreguarded me.bin"
+	x_ cd src/deguard/
+	./finalimage.py --delta "data/delta/$ME11delta" \
+	    --version "$ME11version" \
+	    --pch "$ME11pch" --sku "$ME11sku" --fake-fpfs data/fpfs/zero \
+	    --input "$_metmp" --output "$_me" || \
+	    $err "Error running deguard for $_me"
+	) || $err "Error running deguard for $_me"
 }
 
 extract_archive()

From 264928c6cdefb0b7a3c3ff01d4fe16fa4cc3cbd8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 1 Dec 2024 05:45:06 +0000
Subject: [PATCH 0899/1549] NEW MAINBOARD: ThinkPad T480

This uses the excellent deguard utility, written by
the excellent Mate Kukri.

A few bugs but it mostly works. Documentation to come
shortly, in lbwww.git.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              |   12 +-
 .../config/libgfxinit_txtmode                 |   12 +-
 .../config/libgfxinit_corebootfb              |    8 +-
 .../dell780mt_8mb/config/libgfxinit_txtmode   |    8 +-
 .../config/libgfxinit_corebootfb              |    8 +-
 .../config/libgfxinit_txtmode                 |    8 +-
 .../config/libgfxinit_corebootfb              |    8 +-
 .../dell780usff_8mb/config/libgfxinit_txtmode |    8 +-
 .../config/libgfxinit_corebootfb              |    8 +-
 .../config/libgfxinit_txtmode                 |    8 +-
 ...iPlex-3050-Micro-port-Intel-KabyLake.patch | 1541 -----------------
 ...soc-intel-skylake-configure-usb-acpi.patch |   94 +
 ...nitial-code-for-Lenovo-ThinkPad-E460.patch |  308 ++++
 ...e-Enable-4E-4F-PNP-I-O-ports-in-boot.patch |   30 +
 .../0004-mb-lenovo-Add-ThinkPad-T480.patch    | 1175 +++++++++++++
 ...-dell-Add-Optiplex-780-MT-x4x-ICH10.patch} |    4 +-
 ...ol-add-nuke-flag-all-0xFF-on-region.patch} |   24 +-
 ...r-coreboot-images-built-without-a-p.patch} |    4 +-
 ...-dell-optiplex_780-Add-USFF-variant.patch} |    4 +-
 ...80-Add-MAINBOARD_USES_IFD_GBE_REGION.patch |   27 +
 .../0010-t480-hack-turn-off-the-dgpu.patch    |   45 +
 config/coreboot/next/target.cfg               |    2 +-
 config/coreboot/t480_fsp_16mb/config/normal   |  827 +++++++++
 config/coreboot/t480_fsp_16mb/target.cfg      |   11 +
 config/dependencies/arch                      |    4 +-
 config/dependencies/debian                    |    2 +-
 config/dependencies/fedora38                  |    2 +-
 config/dependencies/fedora40                  |    2 +-
 config/dependencies/fedora41                  |    2 +-
 config/dependencies/parabola                  |    4 +-
 config/dependencies/trisquel                  |    2 +-
 config/dependencies/ubuntu2004                |    2 +-
 config/dependencies/ubuntu2404                |    2 +-
 config/dependencies/void                      |    2 +-
 config/ifd/t480/gbe                           |  Bin 0 -> 8192 bytes
 config/ifd/t480/ifd_16                        |  Bin 0 -> 4096 bytes
 config/submodule/coreboot/next/fsp/module.cfg |    2 +-
 .../coreboot/next/intel-microcode/module.cfg  |    2 +-
 config/vendor/t480/pkg.cfg                    |   15 +
 include/vendor.sh                             |   60 +-
 40 files changed, 2678 insertions(+), 1609 deletions(-)
 delete mode 100644 config/coreboot/next/patches/0001-mb-dell-OptiPlex-3050-Micro-port-Intel-KabyLake.patch
 create mode 100644 config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch
 create mode 100644 config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch
 create mode 100644 config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
 create mode 100644 config/coreboot/next/patches/0004-mb-lenovo-Add-ThinkPad-T480.patch
 rename config/coreboot/next/patches/{0002-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch => 0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch} (99%)
 rename config/coreboot/next/patches/{0003-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch => 0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch} (91%)
 rename config/coreboot/next/patches/{0004-Remove-warning-for-coreboot-images-built-without-a-p.patch => 0007-Remove-warning-for-coreboot-images-built-without-a-p.patch} (91%)
 rename config/coreboot/next/patches/{0005-mb-dell-optiplex_780-Add-USFF-variant.patch => 0008-mb-dell-optiplex_780-Add-USFF-variant.patch} (98%)
 create mode 100644 config/coreboot/next/patches/0009-lenovo-t480-Add-MAINBOARD_USES_IFD_GBE_REGION.patch
 create mode 100644 config/coreboot/next/patches/0010-t480-hack-turn-off-the-dgpu.patch
 create mode 100644 config/coreboot/t480_fsp_16mb/config/normal
 create mode 100644 config/coreboot/t480_fsp_16mb/target.cfg
 create mode 100644 config/ifd/t480/gbe
 create mode 100644 config/ifd/t480/ifd_16
 create mode 100644 config/vendor/t480/pkg.cfg

diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
index b0fee42b..cd2152eb 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
@@ -107,7 +107,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -142,11 +144,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 # CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_USE_PM_ACPI_TIMER=y
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
@@ -175,7 +178,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
 CONFIG_USE_LEGACY_8254_TIMER=y
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_DRIVERS_INTEL_WIFI=y
@@ -183,7 +185,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin"
 CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
 # CONFIG_DEBUG_SMI is not set
@@ -287,6 +288,7 @@ CONFIG_SOC_INTEL_KABYLAKE=y
 CONFIG_SKYLAKE_SOC_PCH_H=y
 CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
 CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
+CONFIG_FSP_T_LOCATION=0xfffe0000
 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
 CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
 CONFIG_CBFS_CACHE_ALIGN=8
@@ -478,6 +480,7 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_UDK_BASE=y
 CONFIG_UDK_2017_BINDING=y
 CONFIG_UDK_2013_VERSION=2013
@@ -485,6 +488,7 @@ CONFIG_UDK_2017_VERSION=2017
 CONFIG_UDK_202005_VERSION=202005
 CONFIG_UDK_202111_VERSION=202111
 CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_202305_VERSION=202305
 CONFIG_UDK_VERSION=2017
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
@@ -593,7 +597,6 @@ CONFIG_PLATFORM_USES_FSP2_0=y
 CONFIG_PLATFORM_USES_FSP2_X86_32=y
 CONFIG_HAVE_INTEL_FSP_REPO=y
 CONFIG_ADD_FSP_BINARIES=y
-CONFIG_FSP_T_LOCATION=0xfffe0000
 CONFIG_FSP_S_CBFS="fsps.bin"
 CONFIG_FSP_M_CBFS="fspm.bin"
 CONFIG_FSP_FULL_FD=y
@@ -624,6 +627,7 @@ CONFIG_DRIVERS_MC146818=y
 CONFIG_USE_PC_CMOS_ALTCENTURY=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_USB_ACPI=y
 CONFIG_DRIVERS_WIFI_GENERIC=y
 CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
index 90202dc3..412c1dec 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
@@ -107,7 +107,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -140,11 +142,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 # CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_USE_PM_ACPI_TIMER=y
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
@@ -173,7 +176,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
 CONFIG_USE_LEGACY_8254_TIMER=y
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_DRIVERS_INTEL_WIFI=y
@@ -181,7 +183,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin"
 CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
 # CONFIG_DEBUG_SMI is not set
@@ -285,6 +286,7 @@ CONFIG_SOC_INTEL_KABYLAKE=y
 CONFIG_SKYLAKE_SOC_PCH_H=y
 CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
 CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
+CONFIG_FSP_T_LOCATION=0xfffe0000
 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
 CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
 CONFIG_CBFS_CACHE_ALIGN=8
@@ -476,6 +478,7 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_UDK_BASE=y
 CONFIG_UDK_2017_BINDING=y
 CONFIG_UDK_2013_VERSION=2013
@@ -483,6 +486,7 @@ CONFIG_UDK_2017_VERSION=2017
 CONFIG_UDK_202005_VERSION=202005
 CONFIG_UDK_202111_VERSION=202111
 CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_202305_VERSION=202305
 CONFIG_UDK_VERSION=2017
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
@@ -585,7 +589,6 @@ CONFIG_PLATFORM_USES_FSP2_0=y
 CONFIG_PLATFORM_USES_FSP2_X86_32=y
 CONFIG_HAVE_INTEL_FSP_REPO=y
 CONFIG_ADD_FSP_BINARIES=y
-CONFIG_FSP_T_LOCATION=0xfffe0000
 CONFIG_FSP_S_CBFS="fsps.bin"
 CONFIG_FSP_M_CBFS="fspm.bin"
 CONFIG_FSP_FULL_FD=y
@@ -617,6 +620,7 @@ CONFIG_USE_PC_CMOS_ALTCENTURY=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_USB_ACPI=y
 CONFIG_DRIVERS_WIFI_GENERIC=y
 CONFIG_DRIVERS_MTK_WIFI=y
 # end of Generic Drivers
diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
index 87cbe2c8..55182e49 100644
--- a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
@@ -108,7 +108,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/optiplex_780"
@@ -142,11 +144,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
@@ -175,7 +178,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
@@ -183,7 +185,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -351,6 +352,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
index c9881447..7f808162 100644
--- a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
@@ -108,7 +108,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/optiplex_780"
@@ -140,11 +142,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
@@ -173,7 +176,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
@@ -181,7 +183,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -349,6 +350,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
index cb297f87..6e81e246 100644
--- a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
@@ -108,7 +108,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/optiplex_780"
@@ -142,11 +144,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
@@ -175,7 +178,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
@@ -183,7 +185,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -351,6 +352,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
index 5ce36d0d..bfd63d0c 100644
--- a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
@@ -108,7 +108,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/optiplex_780"
@@ -140,11 +142,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
@@ -173,7 +176,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
@@ -181,7 +183,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -349,6 +350,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
index 54c0d66a..3c0deb88 100644
--- a/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
@@ -108,7 +108,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/optiplex_780"
@@ -142,11 +144,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
@@ -175,7 +178,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
@@ -183,7 +185,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -351,6 +352,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
index 9d397cf8..a6236e58 100644
--- a/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
@@ -108,7 +108,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/optiplex_780"
@@ -140,11 +142,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
@@ -173,7 +176,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
@@ -181,7 +183,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -349,6 +350,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
index 362b09ea..05bcf124 100644
--- a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
@@ -108,7 +108,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/optiplex_780"
@@ -142,11 +144,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
@@ -175,7 +178,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
@@ -183,7 +185,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -351,6 +352,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
index 079e8982..aca67948 100644
--- a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
@@ -108,7 +108,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/optiplex_780"
@@ -140,11 +142,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
@@ -173,7 +176,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
@@ -181,7 +183,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -349,6 +350,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
diff --git a/config/coreboot/next/patches/0001-mb-dell-OptiPlex-3050-Micro-port-Intel-KabyLake.patch b/config/coreboot/next/patches/0001-mb-dell-OptiPlex-3050-Micro-port-Intel-KabyLake.patch
deleted file mode 100644
index 99bd2b69..00000000
--- a/config/coreboot/next/patches/0001-mb-dell-OptiPlex-3050-Micro-port-Intel-KabyLake.patch
+++ /dev/null
@@ -1,1541 +0,0 @@
-From 496cdb9ccfe8908ec0fe7f703ce6f25e5abf1c18 Mon Sep 17 00:00:00 2001
-From: Mate Kukri <kukri.mate@gmail.com>
-Date: Thu, 24 Oct 2024 18:05:19 +0100
-Subject: [PATCH 1/5] mb/dell: OptiPlex 3050 Micro port (Intel KabyLake)
-
-- Boots Linux 6.11 (Debian)
-- GRUB and SeaBIOS payloads work
-- SMSC SCH5553 SIO/EC
-  + Serial port works
-  + PWM fan control works
-- Realtek Gigabit LAN works
-- WiFi slot works
-- NVMe SSD slot works
-- Extra: LPSS UART0
-  + Stock FW sets undocumented power gating bit, RTC battery needs to
-    be pulled for it to work.
-  + Signals exposed on test points on the back of the board.
-    FIXME: add documentation about this
-- Needs 'deguard' to bypass BootGuard
-  + See https://review.coreboot.org/plugins/gitiles/deguard
-- Audio works
-- All USB ports work
-- Currently limited to the Micro form factor, but others are very
-  similar
-- HDA verbs and VBT by Leah Rowe
-
-Change-Id: I8d443e39ee684a4eaa19c835a945cfe569c051e2
-Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
----
- src/mainboard/dell/optiplex_3050/Kconfig      |  37 ++
- src/mainboard/dell/optiplex_3050/Kconfig.name |   4 +
- src/mainboard/dell/optiplex_3050/Makefile.mk  |  12 +
- src/mainboard/dell/optiplex_3050/acpi/ec.asl  |   3 +
- .../dell/optiplex_3050/acpi/superio.asl       |   3 +
- .../dell/optiplex_3050/board_info.txt         |   7 +
- src/mainboard/dell/optiplex_3050/bootblock.c  | 107 ++++
- src/mainboard/dell/optiplex_3050/cmos.default |   5 +
- src/mainboard/dell/optiplex_3050/cmos.layout  |  54 ++
- src/mainboard/dell/optiplex_3050/data.vbt     | Bin 0 -> 4300 bytes
- .../dell/optiplex_3050/devicetree.cb          | 103 ++++
- src/mainboard/dell/optiplex_3050/dsdt.asl     |  27 +
- .../dell/optiplex_3050/gma-mainboard.ads      |  19 +
- src/mainboard/dell/optiplex_3050/hda_verb.c   |  90 +++
- .../dell/optiplex_3050/include/early_gpio.h   |  11 +
- .../dell/optiplex_3050/include/gpio.h         | 241 +++++++++
- src/mainboard/dell/optiplex_3050/ramstage.c   | 512 ++++++++++++++++++
- src/mainboard/dell/optiplex_3050/romstage.c   |  18 +
- src/mainboard/dell/optiplex_3050/sch5555_ec.c |  54 ++
- src/mainboard/dell/optiplex_3050/sch5555_ec.h |  10 +
- 20 files changed, 1317 insertions(+)
- create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig
- create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig.name
- create mode 100644 src/mainboard/dell/optiplex_3050/Makefile.mk
- create mode 100644 src/mainboard/dell/optiplex_3050/acpi/ec.asl
- create mode 100644 src/mainboard/dell/optiplex_3050/acpi/superio.asl
- create mode 100644 src/mainboard/dell/optiplex_3050/board_info.txt
- create mode 100644 src/mainboard/dell/optiplex_3050/bootblock.c
- create mode 100644 src/mainboard/dell/optiplex_3050/cmos.default
- create mode 100644 src/mainboard/dell/optiplex_3050/cmos.layout
- create mode 100644 src/mainboard/dell/optiplex_3050/data.vbt
- create mode 100644 src/mainboard/dell/optiplex_3050/devicetree.cb
- create mode 100644 src/mainboard/dell/optiplex_3050/dsdt.asl
- create mode 100644 src/mainboard/dell/optiplex_3050/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/optiplex_3050/hda_verb.c
- create mode 100644 src/mainboard/dell/optiplex_3050/include/early_gpio.h
- create mode 100644 src/mainboard/dell/optiplex_3050/include/gpio.h
- create mode 100644 src/mainboard/dell/optiplex_3050/ramstage.c
- create mode 100644 src/mainboard/dell/optiplex_3050/romstage.c
- create mode 100644 src/mainboard/dell/optiplex_3050/sch5555_ec.c
- create mode 100644 src/mainboard/dell/optiplex_3050/sch5555_ec.h
-
-diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
-new file mode 100644
-index 0000000000..6c8e72956e
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/Kconfig
-@@ -0,0 +1,37 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+if BOARD_DELL_OPTIPLEX_3050
-+
-+config BOARD_SPECIFIC_OPTIONS
-+	def_bool y
-+	select BOARD_ROMSIZE_KB_16384
-+	select HAVE_ACPI_RESUME
-+	select HAVE_ACPI_TABLES
-+	select HAVE_CMOS_DEFAULT
-+	select HAVE_OPTION_TABLE
-+	select INTEL_GMA_ADD_VBT
-+	select INTEL_GMA_HAVE_VBT
-+	select MAINBOARD_HAS_LIBGFXINIT
-+	select MAINBOARD_SUPPORTS_KABYLAKE_CPU
-+	select MAINBOARD_SUPPORTS_SKYLAKE_CPU
-+	select SKYLAKE_SOC_PCH_H
-+	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
-+	select SOC_INTEL_KABYLAKE
-+	select SUPERIO_SMSC_SCH555x
-+
-+config CBFS_SIZE
-+	default 0x900000
-+
-+config MAINBOARD_DIR
-+	default "dell/optiplex_3050"
-+
-+config MAINBOARD_PART_NUMBER
-+	default "OptiPlex 3050 Micro"
-+
-+config INTEL_GMA_VBT_FILE
-+	default "src/mainboard/\$(MAINBOARDDIR)/data.vbt"
-+
-+config DIMM_SPD_SIZE
-+	default 512	# DDR4
-+
-+endif
-diff --git a/src/mainboard/dell/optiplex_3050/Kconfig.name b/src/mainboard/dell/optiplex_3050/Kconfig.name
-new file mode 100644
-index 0000000000..14eab7f52c
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/Kconfig.name
-@@ -0,0 +1,4 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+config BOARD_DELL_OPTIPLEX_3050
-+	bool "OptiPlex 3050 Micro"
-diff --git a/src/mainboard/dell/optiplex_3050/Makefile.mk b/src/mainboard/dell/optiplex_3050/Makefile.mk
-new file mode 100644
-index 0000000000..0bd72fe691
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/Makefile.mk
-@@ -0,0 +1,12 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+bootblock-y += bootblock.c
-+bootblock-y += sch5555_ec.c
-+
-+romstage-y += romstage.c
-+
-+ramstage-y += ramstage.c
-+ramstage-y += sch5555_ec.c
-+ramstage-y += hda_verb.c
-+
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/optiplex_3050/acpi/ec.asl b/src/mainboard/dell/optiplex_3050/acpi/ec.asl
-new file mode 100644
-index 0000000000..16990d45f4
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/acpi/ec.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: CC-PDDC */
-+
-+/* Please update the license if adding licensable material. */
-diff --git a/src/mainboard/dell/optiplex_3050/acpi/superio.asl b/src/mainboard/dell/optiplex_3050/acpi/superio.asl
-new file mode 100644
-index 0000000000..16990d45f4
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: CC-PDDC */
-+
-+/* Please update the license if adding licensable material. */
-diff --git a/src/mainboard/dell/optiplex_3050/board_info.txt b/src/mainboard/dell/optiplex_3050/board_info.txt
-new file mode 100644
-index 0000000000..47a4a3a4f3
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/board_info.txt
-@@ -0,0 +1,7 @@
-+Category: desktop
-+Board URL: https://www.dell.com/support/kbdoc/en-uk/000124265/dell-optiplex-3050-system-guide
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2017
-diff --git a/src/mainboard/dell/optiplex_3050/bootblock.c b/src/mainboard/dell/optiplex_3050/bootblock.c
-new file mode 100644
-index 0000000000..10689c42a1
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/bootblock.c
-@@ -0,0 +1,107 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <bootblock_common.h>
-+#include <device/pnp_ops.h>
-+#include <soc/gpio.h>
-+#include <superio/smsc/sch555x/sch555x.h>
-+#include "include/early_gpio.h"
-+#include "sch5555_ec.h"
-+
-+struct ec_init_entry {
-+	uint16_t addr;
-+	uint8_t val;
-+};
-+
-+static void bootblock_ec_init(void)
-+{
-+	/*
-+	 * Early EC init
-+	 */
-+
-+	static const struct ec_init_entry init_table1[] = {
-+		{0x08cc, 0x11}, {0x08d0, 0x11}, {0x088c, 0x10}, {0x0890, 0x10},
-+		{0x0894, 0x10}, {0x0898, 0x12}, {0x089c, 0x12}, {0x08a0, 0x10},
-+		{0x08a4, 0x12}, {0x08a8, 0x10}, {0x0820, 0x12}, {0x0824, 0x12},
-+		{0x0878, 0x12}, {0x0880, 0x12}, {0x0884, 0x12}, {0x08e0, 0x12},
-+		{0x08e4, 0x12}, {0x083c, 0x10}, {0x0840, 0x10}, {0x0844, 0x10},
-+		{0x0848, 0x10}, {0x084c, 0x10}, {0x0850, 0x10}, {0x0814, 0x11},
-+	};
-+
-+	for (size_t i = 0; i < ARRAY_SIZE(init_table1); ++i)
-+		sch5555_mbox_write(2, init_table1[i].addr, init_table1[i].val);
-+
-+	static const struct ec_init_entry init_table2[] = {
-+		{0x0040, 0x00}, {0x00f8, 0x10}, {0x00f9, 0x00}, {0x00f0, 0x30},
-+		{0x00fa, 0x00}, {0x00fb, 0x00}, {0x00ea, 0x00}, {0x00eb, 0x00},
-+		{0x00ef, 0x7c}, {0x0005, 0x0f}, {0x0014, 0x01}, {0x0018, 0x2f},
-+		{0x0019, 0x2f}, {0x001a, 0x2f}, {0x001b, 0x2f}, {0x01d8, 0x01},
-+		{0x0040, 0x11},
-+	};
-+
-+	for (size_t i = 0; i < ARRAY_SIZE(init_table2); ++i)
-+		sch5555_mbox_write(1, init_table2[i].addr, init_table2[i].val);
-+
-+	sch5555_mbox_write(1, 0x000b, 0x01);
-+	sch5555_mbox_write(4, 0x001a, 0x04);
-+	sch5555_mbox_write(4, 0x0028, 0x18);
-+	sch5555_mbox_write(4, 0x001a, 0x00);
-+	sch5555_mbox_write(1, 0x000b, 0x03);
-+
-+	/*
-+	 * Early HWM init
-+	 */
-+
-+	sch5555_mbox_read(1, 0xcb);
-+	sch5555_mbox_read(1, 0xb8);
-+
-+	static const struct ec_init_entry hwm_init_table[] = {
-+		{0x02fc, 0xa0}, {0x02fd, 0x32}, {0x0005, 0x77}, {0x0019, 0x2f},
-+		{0x001a, 0x2f}, {0x008a, 0x33}, {0x008b, 0x33}, {0x008c, 0x33},
-+		{0x00ba, 0x10}, {0x00d1, 0xff}, {0x00d6, 0xff}, {0x00db, 0xff},
-+		{0x0048, 0x00}, {0x0049, 0x00}, {0x007a, 0x00}, {0x007b, 0x00},
-+		{0x007c, 0x00}, {0x0080, 0x00}, {0x0081, 0x00}, {0x0082, 0x00},
-+		{0x0083, 0xbb}, {0x0084, 0xb0}, {0x01a1, 0x88}, {0x01a4, 0x80},
-+		{0x0088, 0x00}, {0x0089, 0x00}, {0x00a0, 0x02}, {0x00a1, 0x02},
-+		{0x00a2, 0x02}, {0x00a4, 0x04}, {0x00a5, 0x04}, {0x00a6, 0x04},
-+		{0x00ab, 0x00}, {0x00ad, 0x3f}, {0x00b7, 0x07}, {0x0062, 0x50},
-+		{0x0000, 0x46}, {0x0000, 0x50}, {0x0000, 0x46}, {0x0000, 0x50},
-+		{0x0000, 0x46}, {0x0000, 0x98}, {0x0059, 0x98}, {0x0061, 0x7c},
-+		{0x01bc, 0x00}, {0x01bd, 0x00}, {0x01bb, 0x00}, {0x0085, 0xdd},
-+		{0x0086, 0xdd}, {0x0087, 0x07}, {0x0090, 0x82}, {0x0091, 0x5e},
-+		{0x0095, 0x5d}, {0x0096, 0xa9}, {0x0097, 0x00}, {0x009b, 0x00},
-+		{0x00ae, 0x86}, {0x00af, 0x86}, {0x00b3, 0x67}, {0x00c4, 0xff},
-+		{0x00c5, 0xff}, {0x00c9, 0xff}, {0x0040, 0x01}, {0x02fc, 0x00},
-+		{0x02b3, 0x9a}, {0x02b4, 0x05}, {0x02cc, 0x01}, {0x02d0, 0x4c},
-+		{0x02d2, 0x01}, {0x02db, 0x01}, {0x006f, 0x01}, {0x0070, 0x02},
-+		{0x0071, 0x03}, {0x018b, 0x03}, {0x018c, 0x03}, {0x0015, 0x33},
-+		{0x018b, 0x00}, {0x018c, 0x00}, {0x02f8, 0x5e}, {0x02f9, 0x01},
-+	};
-+
-+	for (size_t i = 0; i < ARRAY_SIZE(hwm_init_table); ++i)
-+		sch5555_mbox_write(1, hwm_init_table[i].addr, hwm_init_table[i].val);
-+}
-+
-+
-+#define SCH555x_IOBASE	0x2e
-+#define GLOBAL_DEV	PNP_DEV(SCH555x_IOBASE, SCH555x_LDN_GLOBAL)
-+#define SERIAL_DEV	PNP_DEV(SCH555x_IOBASE, SCH555x_LDN_UART1)
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
-+
-+	// Super I/O early init will map Runtime and EMI registers
-+	sch555x_early_init(GLOBAL_DEV);
-+
-+	// Changes LED color among a few other things
-+	outb(1, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_STS);
-+	outb(1, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_EN);
-+	outb(0xf, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_LED);
-+	outb(1, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_UNK1);
-+
-+	// Perform bootblock EC initialization
-+	bootblock_ec_init();
-+
-+	// Bootblock EC initialization is required for UART1 to work
-+	sch555x_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-+}
-diff --git a/src/mainboard/dell/optiplex_3050/cmos.default b/src/mainboard/dell/optiplex_3050/cmos.default
-new file mode 100644
-index 0000000000..79961f43d8
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/cmos.default
-@@ -0,0 +1,5 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+boot_option=Fallback
-+debug_level=Debug
-+power_on_after_fail=Disable
-diff --git a/src/mainboard/dell/optiplex_3050/cmos.layout b/src/mainboard/dell/optiplex_3050/cmos.layout
-new file mode 100644
-index 0000000000..54a5147b7d
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/cmos.layout
-@@ -0,0 +1,54 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+#start-bit length  config config-ID	name
-+
-+# -----------------------------------------------------------------
-+0	120	r	0	reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384	1	e	4	boot_option
-+388	4	h	0	reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395	4	e	6	debug_level
-+
-+# coreboot config options: southbridge
-+409	2	e	7	power_on_after_fail
-+
-+# coreboot config options: bootloader
-+#Used by ChromeOS:
-+416	128	r	0	vbnv
-+
-+# coreboot config options: check sums
-+984	16	h	0	check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID	value	text
-+1	0	Disable
-+1	1	Enable
-+4	0	Fallback
-+4	1	Normal
-+6	0	Emergency
-+6	1	Alert
-+6	2	Critical
-+6	3	Error
-+6	4	Warning
-+6	5	Notice
-+6	6	Info
-+6	7	Debug
-+6	8	Spew
-+7	0	Disable
-+7	1	Enable
-+7	2	Keep
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 415 984
-diff --git a/src/mainboard/dell/optiplex_3050/data.vbt b/src/mainboard/dell/optiplex_3050/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..6dc40cd99563bcd957ec2a9c4567e3b21e5d1d1f
-GIT binary patch
-literal 4300
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-ze^_HpNECA))Sw}xiC;|p(!}^ljU+}T!9QpeKH4uPN;EMM;}_tZeY@?IBiNH@l!V#L
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-zC$uXU01ASzM2Q>g;@$hkii6SZG3@E+#eVw*w9N;N1g6_?YiB3s;_)?@>DbVf-r9}P
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-zVKf!Pgkc!X2_qgyK4nY|jSRP7a&Qp0+diYXy*OGNIan;Ts7z%5ry$@FKoGo8XMq5h
-z6OcC{V?x>l17U>+7I|RUgn|iuCftWGW>(Kf196=odH`0=A3;(GULp|y6Ks_T0R#_x
-zlLt);9A0GWnQsLE?*|8{0RgE`gv2JC<6bXwubJ}!0Qv+3{3xJE9q#3H2<s&G0tf>5
-z>@mL~p#5nF3*pl}^hKC<v1C31Ae!^M&^2;#l`=O_ZLQWF$7*Y}Uh$G>xt9(*`c-X6
-zFkpAE5jIOv7?VVJPHKbYp3@KrBCHN-@DOp9_>7mqcf{Wl|3v&7@nvGak3pDtDe*nT
-zYl+trr--)_KT146>^lIL%Ay5+{&h=mW!RCRdEk{8SSMWj3D+L{)!qr(URTPl<i;AB
-za@p^PE9Ea6pj-}YuxDTr0>wf|yGUKG?B!CDGOpf7(oT__tC!2cJgEtK{*6}R$n1=r
-z$PSguH+xU1hb?rHq(J+G2P}V^ryazPkEs%j0}In3b4gctpl8)ZC&3qS6o31yv0DC@
-zBN6*5So*Vg*3aOq|DtfT{{PvtW2P<e%*HkB(yV?<-ipBd2rTP@b3v<wGk0i#{Bmcc
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-zZ`~^T%U!!Etw*TnvRA91loJ<5n5;vH=aymAq8i4g#?~Vu@R%z0b-pk{VF{Q?SZOpI
-zZFLYDT8~J)KBGPNg2zT^r<&>dt1z12coq!P7_N5^Xb$wE-B-rFk(v<3F&oiLZ61P9
-z^8O8kx7Uu(WFsrh-0{jBgc7g$6w^0d!yLLcn#Qi_glV3tAo!dLNa^?163N|n^-pD?
-z(daC>dtpbi#Q&W%m0IHPOiO7pA89lVboYWH=_yh1N|ChuwX7oAZcPqP-%SWj_FFt3
-zyd_?zD3jia8uH=I*yP#l#Bw9^#^N~y33zEtk*o#5XfjXdCkjSG)~N^WoRlb;h;B3|
-zIfCjSc(I06T!_GA1{WKOk*chsMCXx5vW@41o#fZgYViT9VSih*nQN}>g+zCejX>9!
-zZ{c$hGa+w5eO}YT_FH@}B)U(Dl-|zF&dk8R;^4yrPZe)YrI^k%j}0~VZ%*1PT98&h
-z556thD#%T3IZc)NKi{(4RJn@8Dq3?JywFKA?WW585y(IR)(Ee|k5bDtz|lFnDY}0G
-Ds8qe3
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb
-new file mode 100644
-index 0000000000..039709aa4a
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/devicetree.cb
-@@ -0,0 +1,103 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+chip soc/intel/skylake
-+	register "deep_sx_config" = "DSX_EN_WAKE_PIN | DSX_EN_LAN_WAKE_PIN"
-+
-+	# Enable Enhanced Intel SpeedStep
-+	register "eist_enable" = "1"
-+
-+	device domain 0 on
-+		device ref igpu on
-+			register "PrimaryDisplay" = "Display_iGFX"
-+		end
-+
-+		device ref south_xhci on
-+			register "usb2_ports" = "{
-+				[0] = USB2_PORT_MID(OC0),	// Front panel (blue)
-+				[1] = USB2_PORT_MID(OC0),	// Front panel (blue)
-+				[2] = USB2_PORT_MID(OC3),	// Back panel (black)
-+				[3] = USB2_PORT_MID(OC2),	// Back panel (blue)
-+				[4] = USB2_PORT_MID(OC1),	// Back panel (blue)
-+				[6] = USB2_PORT_MID(OC1),	// Back panel (black)
-+				[8] = USB2_PORT_MID(OC_SKIP),	// WiFi slot
-+			}"
-+			register "usb3_ports" = "{
-+				[0] = USB3_PORT_DEFAULT(OC0),	// Front panel (blue)
-+				[1] = USB3_PORT_DEFAULT(OC0),	// Front panel (blue)
-+				[2] = USB3_PORT_DEFAULT(OC2),	// Back panel (blue)
-+				[3] = USB3_PORT_DEFAULT(OC1),	// Back panel (blue)
-+			}"
-+		end
-+
-+		# ME interface is 'off' to avoid HECI reset delay due to HAP
-+		device ref heci1 off end
-+
-+		device ref sata on
-+			register "SataSalpSupport" = "1"
-+			register "SataPortsEnable[0]" = "1"
-+		end
-+
-+		# M.2 SSD
-+		device ref pcie_rp21 on
-+			register "PcieRpEnable[20]"                     = "1"
-+			register "PcieRpClkReqSupport[20]"              = "1"
-+			register "PcieRpClkReqNumber[20]"               = "3"
-+			register "PcieRpAdvancedErrorReporting[20]"     = "1"
-+			register "PcieRpLtrEnable[20]"                  = "1"
-+			register "PcieRpClkSrcNumber[20]"               = "3"
-+			register "PcieRpHotPlug[20]"                    = "1"
-+		end
-+
-+		# Realtek LAN
-+		device ref pcie_rp5 on
-+			register "PcieRpEnable[4]"			= "1"
-+			register "PcieRpClkReqSupport[4]"		= "0"
-+			register "PcieRpHotPlug[4]"			= "0"
-+		end
-+
-+		# M.2 WiFi
-+		device ref pcie_rp8 on
-+			register "PcieRpEnable[7]"			= "1"
-+			register "PcieRpClkReqSupport[7]"		= "0"
-+			register "PcieRpHotPlug[7]"			= "1"
-+		end
-+
-+		# UART0 is exposed on test points on the bottom of the board
-+		device ref uart0 on
-+			register "SerialIoDevMode[PchSerialIoIndexUart0]" = "PchSerialIoPci"
-+		end
-+
-+		device ref lpc_espi on
-+			register "serirq_mode" = "SERIRQ_CONTINUOUS"
-+
-+			# I/O decode for EMI/Runtime registers
-+			register "gen1_dec" = "0x007c0a01"
-+
-+			# SCH5553
-+			chip superio/smsc/sch555x
-+				device pnp 2e.0 on		# EMI
-+					io 0x60 = 0xa00
-+				end
-+				device pnp 2e.1 off end		# 8042
-+				device pnp 2e.7 on		# UART1
-+					io 0x60 = 0x3f8
-+					irq 0x0f = 2
-+					irq 0x70 = 4
-+				end
-+				device pnp 2e.8 off end 	# UART2
-+				device pnp 2e.c on		# LPC interface
-+					io 0x60 = 0x2e
-+				end
-+				device pnp 2e.a on		# Runtime registers
-+					io 0x60 = 0xa40
-+				end
-+				device pnp 2e.b  off end	# Floppy Controller
-+				device pnp 2e.11 off end	# Parallel Port
-+			end
-+		end
-+
-+		device ref hda on end
-+
-+		device ref smbus on end
-+	end
-+end
-diff --git a/src/mainboard/dell/optiplex_3050/dsdt.asl b/src/mainboard/dell/optiplex_3050/dsdt.asl
-new file mode 100644
-index 0000000000..9762f6ff74
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/dsdt.asl
-@@ -0,0 +1,27 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi.h>
-+DefinitionBlock(
-+	"dsdt.aml",
-+	"DSDT",
-+	ACPI_DSDT_REV_2,
-+	OEM_ID,
-+	ACPI_TABLE_CREATOR,
-+	0x20110725
-+)
-+{
-+	#include <acpi/dsdt_top.asl>
-+	#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
-+	#include <cpu/intel/common/acpi/cpu.asl>
-+
-+	Scope (\_SB)
-+	{
-+		Device (PCI0)
-+		{
-+			#include <soc/intel/skylake/acpi/systemagent.asl>
-+			#include <soc/intel/skylake/acpi/pch.asl>
-+		}
-+	}
-+
-+	#include <southbridge/intel/common/acpi/sleepstates.asl>
-+}
-diff --git a/src/mainboard/dell/optiplex_3050/gma-mainboard.ads b/src/mainboard/dell/optiplex_3050/gma-mainboard.ads
-new file mode 100644
-index 0000000000..cb4c22f285
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/gma-mainboard.ads
-@@ -0,0 +1,19 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+   ports : constant Port_List :=
-+      (HDMI1,  -- External HDMI
-+       DP2,    -- External DP (native)
-+       HDMI2,  -- External DP (DP++)
-+       DP3,    -- Video I/O card: VGA (0PKGGG), DP (H64DC)
-+       HDMI3,  -- Video I/O card: VGA (0PKGGG), DP (H64DC)
-+       others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/optiplex_3050/hda_verb.c b/src/mainboard/dell/optiplex_3050/hda_verb.c
-new file mode 100644
-index 0000000000..621e4f7a52
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/hda_verb.c
-@@ -0,0 +1,90 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	/* coreboot specific header, codec 0 */
-+	0x10ec0255, /* Realtek ALC3234 */
-+	0x102807a3, /* Subsystem ID */
-+	11,	    /* Number of entries */
-+
-+	/* Pin Widget Verb Table */
-+
-+	AZALIA_SUBVENDOR(0, 0x102807a3),
-+
-+	AZALIA_PIN_CFG(0, 0x12, 0x40000000), // does not describe a jack or internal device
-+	AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_DESC(
-+		AZALIA_INTEGRATED,
-+		AZALIA_INTERNAL,
-+		AZALIA_SPEAKER,
-+		AZALIA_OTHER_ANALOG,
-+		AZALIA_COLOR_UNKNOWN,
-+		AZALIA_NO_JACK_PRESENCE_DETECT,
-+		5, 0
-+	)),
-+	AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
-+	AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
-+	AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
-+	AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
-+	AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_DESC(
-+		AZALIA_JACK,
-+		AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_FRONT,
-+		AZALIA_LINE_OUT,
-+		AZALIA_STEREO_MONO_1_8,
-+		AZALIA_BLACK,
-+		AZALIA_JACK_PRESENCE_DETECT,
-+		2, 0
-+	)),
-+	AZALIA_PIN_CFG(0, 0x1d, 0x4054c029), // does not describe a jack or internal device
-+	AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
-+	AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_DESC(
-+		AZALIA_JACK,
-+		AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_FRONT,
-+		AZALIA_HP_OUT,
-+		AZALIA_STEREO_MONO_1_8,
-+		AZALIA_BLACK,
-+		AZALIA_JACK_PRESENCE_DETECT,
-+		5, 15
-+	)),
-+
-+	/* coreboot specific header, codec 2 */
-+	0x80862809, /* Intel Skylake HDMI */
-+	0x80860101, /* Subsystem ID */
-+	4,	    /* Number of entries */
-+
-+	/* Pin Widget Verb Table */
-+
-+	AZALIA_SUBVENDOR(2, 0x80860101),
-+
-+	AZALIA_PIN_CFG(2, 0x05, AZALIA_PIN_DESC(
-+		AZALIA_JACK,
-+		AZALIA_DIGITAL_DISPLAY,
-+		AZALIA_DIGITAL_OTHER_OUT,
-+		AZALIA_OTHER_DIGITAL,
-+		AZALIA_COLOR_UNKNOWN,
-+		AZALIA_JACK_PRESENCE_DETECT,
-+		1, 0
-+	)),
-+	AZALIA_PIN_CFG(2, 0x06, AZALIA_PIN_DESC(
-+		AZALIA_JACK,
-+		AZALIA_DIGITAL_DISPLAY,
-+		AZALIA_DIGITAL_OTHER_OUT,
-+		AZALIA_OTHER_DIGITAL,
-+		AZALIA_COLOR_UNKNOWN,
-+		AZALIA_JACK_PRESENCE_DETECT,
-+		1, 0
-+	)),
-+	AZALIA_PIN_CFG(2, 0x07, AZALIA_PIN_DESC(
-+		AZALIA_JACK,
-+		AZALIA_DIGITAL_DISPLAY,
-+		AZALIA_DIGITAL_OTHER_OUT,
-+		AZALIA_OTHER_DIGITAL,
-+		AZALIA_COLOR_UNKNOWN,
-+		AZALIA_JACK_PRESENCE_DETECT,
-+		1, 0
-+	)),
-+};
-+
-+const u32 pc_beep_verbs[] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/optiplex_3050/include/early_gpio.h b/src/mainboard/dell/optiplex_3050/include/early_gpio.h
-new file mode 100644
-index 0000000000..17a16371e3
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/include/early_gpio.h
-@@ -0,0 +1,11 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#ifndef __OPTIPLEX_3050_EARLY_GPIO_H__
-+#define __OPTIPLEX_3050_EARLY_GPIO_H__
-+
-+static const struct pad_config early_gpio_table[] = {
-+	PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),	/* UART0_RXD */
-+	PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),	/* UART0_TXD */
-+};
-+
-+#endif
-diff --git a/src/mainboard/dell/optiplex_3050/include/gpio.h b/src/mainboard/dell/optiplex_3050/include/gpio.h
-new file mode 100644
-index 0000000000..83293c32a9
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/include/gpio.h
-@@ -0,0 +1,241 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#ifndef __OPTIPLEX_3050_GPIO_H__
-+#define __OPTIPLEX_3050_GPIO_H__
-+
-+static const struct pad_config gpio_table[] = {
-+
-+	/* ------- GPIO Community 0 ------- */
-+
-+	/* ------- GPIO Group GPP_A ------- */
-+	PAD_CFG_NF(GPP_A0, UP_20K, PLTRST, NF1),			/* RCIN# */
-+	PAD_CFG_NF(GPP_A1, UP_20K, PLTRST, NF1),			/* LAD0 */
-+	PAD_CFG_NF(GPP_A2, UP_20K, PLTRST, NF1),			/* LAD1 */
-+	PAD_CFG_NF(GPP_A3, UP_20K, PLTRST, NF1),			/* LAD2 */
-+	PAD_CFG_NF(GPP_A4, UP_20K, PLTRST, NF1),			/* LAD3 */
-+	PAD_CFG_NF(GPP_A5, NONE, PLTRST, NF1),				/* LFRAME# */
-+	PAD_CFG_NF(GPP_A6, NONE, PLTRST, NF1),				/* SERIRQ */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_A7, NONE, DEEP, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),				/* CLKRUN# */
-+	PAD_CFG_NF(GPP_A9, NONE, PLTRST, NF1),				/* CLKOUT_LPC0 */
-+	PAD_CFG_NF(GPP_A10, NONE, PLTRST, NF1),				/* CLKOUT_LPC1 */
-+	PAD_CFG_NF(GPP_A11, UP_20K, DEEP, NF1),				/* PME# */
-+	PAD_CFG_GPO(GPP_A12, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_NF(GPP_A13, NONE, PLTRST, NF1),				/* SUSWARN#/SUSPWRDNACK */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_A14, NONE, PLTRST, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_NF(GPP_A15, UP_20K, PLTRST, NF1),			/* SUS_ACK# */
-+	PAD_CFG_GPO(GPP_A16, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_A17, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_A18, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_A19, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_A20, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_A21, 1, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_A22, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_A23, 0, PLTRST),				/* GPIO */
-+
-+	/* ------- GPIO Group GPP_B ------- */
-+	PAD_CFG_GPO(GPP_B0, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_B1, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_B2, 0, DEEP),					/* GPIO */
-+	PAD_CFG_GPO(GPP_B3, 1, RSMRST),					/* GPIO (ME_CNTL, B3 -> LOW => HDA_SDO -> HIGH) */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_B4, NONE, DEEP, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPO(GPP_B5, 1, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_B6, 1, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_B7, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_B8, NONE, PLTRST, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPO(GPP_B9, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_B10, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_B11, NONE, PLTRST, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_NF(GPP_B12, NONE, PLTRST, NF1),				/* SLP_S0# */
-+	PAD_CFG_NF(GPP_B13, NONE, PLTRST, NF1),				/* PLTRST# */
-+	PAD_CFG_NF(GPP_B14, DN_20K, PLTRST, NF1),			/* SPKR */
-+	PAD_CFG_GPO(GPP_B15, 1, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_B16, 1, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_B17, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_NF(GPP_B18, DN_20K, DEEP, NF1),				/* GSPIO_MOSI */
-+	PAD_CFG_GPO(GPP_B19, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_B20, 1, DEEP),					/* GPIO */
-+	PAD_CFG_GPO(GPP_B21, 0, DEEP),					/* GPIO */
-+	PAD_CFG_NF(GPP_B22, DN_20K, DEEP, NF1),				/* GSPI1_MOSI */
-+	PAD_CFG_NF(GPP_B23, DN_20K, DEEP, NF2),				/* PCHHOT# */
-+
-+	/* ------- GPIO Community 1 ------- */
-+
-+	/* ------- GPIO Group GPP_C ------- */
-+	PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),				/* SMBCLK */
-+	PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),				/* SMBDATA */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_C2, DN_20K, DEEP, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_NF(GPP_C3, NONE, PLTRST, NF1),				/* SML0CLK */
-+	PAD_CFG_NF(GPP_C4, NONE, PLTRST, NF1),				/* SML0DATA */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_C5, DN_20K, DEEP, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),				/* SML1CLK */
-+	PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),				/* SML1DATA */
-+	PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),				/* UART0_RXD */
-+	PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),				/* UART0_TXD */
-+	PAD_CFG_GPO(GPP_C10, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_C11, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_C12, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_C13, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_C14, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_C15, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1),				/* I2C0_SDA */
-+	PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1),				/* I2C0_SCL */
-+	PAD_CFG_GPO(GPP_C18, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_C19, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_C20, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_C21, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_C22, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT),	/* GPIO */
-+
-+	/* ------- GPIO Group GPP_D ------- */
-+	PAD_CFG_GPO(GPP_D0, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_D1, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_D2, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_D3, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_D4, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_D5, NONE, DEEP, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPO(GPP_D6, 0, DEEP),					/* GPIO */
-+	PAD_CFG_GPO(GPP_D7, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_D8, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_D9, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_D10, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_D11, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_D12, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_D13, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_D14, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_D15, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_D16, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_D17, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_D18, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_D19, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_D20, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_D21, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_D22, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_D23, 0, PLTRST),				/* GPIO */
-+
-+	/* ------- GPIO Group GPP_E ------- */
-+	PAD_CFG_NF(GPP_E0, NONE, DEEP, NF1),				/* SATAXPCIE0 */
-+	PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1),				/* SATAXPCIE1 */
-+	PAD_CFG_NF(GPP_E2, NONE, DEEP, NF1),				/* SATAXPCIE2 */
-+	PAD_CFG_GPO(GPP_E3, 0, DEEP),					/* GPIO */
-+	PAD_CFG_GPO(GPP_E4, 0, DEEP),					/* GPIO */
-+	PAD_CFG_GPO(GPP_E5, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_E6, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_E7, NONE, DEEP, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_NF(GPP_E8, NONE, PLTRST, NF1),				/* SATA_LED# */
-+	PAD_CFG_NF(GPP_E9, UP_20K, PLTRST, NF1),			/* USB_OC0# */
-+	PAD_CFG_NF(GPP_E10, UP_20K, PLTRST, NF1),			/* USB_OC1# */
-+	PAD_CFG_NF(GPP_E11, UP_20K, PLTRST, NF1),			/* USB_OC2# */
-+	PAD_CFG_NF(GPP_E12, UP_20K, PLTRST, NF1),			/* USB_OC3# */
-+
-+	/* ------- GPIO Group GPP_F ------- */
-+	PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),				/* SATAXPCIE3 */
-+	PAD_CFG_NF(GPP_F1, NONE, DEEP, NF1),				/* SATAXPCIE4 */
-+	PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1),				/* SATAXPCIE5 */
-+	PAD_CFG_NF(GPP_F3, NONE, DEEP, NF1),				/* SATAXPCIE6 */
-+	PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),				/* SATAXPCIE7 */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F5, NONE, PLTRST, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_NF(GPP_F6, NONE, RSMRST, NF1),				/* SATA_DEVSLP4 */
-+	PAD_CFG_GPO(GPP_F7, 1, PLTRST),					/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F8, NONE, DEEP, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPO(GPP_F9, 0, RSMRST),					/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F10, NONE, DEEP, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F11, NONE, PLTRST, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F12, NONE, PLTRST, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPO(GPP_F13, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F14, NONE, DEEP, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_NF(GPP_F15, UP_20K, DEEP, NF1),				/* USB_OC4# */
-+	PAD_CFG_NF(GPP_F16, UP_20K, DEEP, NF1),				/* USB_OC5# */
-+	PAD_CFG_NF(GPP_F17, UP_20K, PLTRST, NF1),			/* USB_OC6# */
-+	PAD_CFG_TERM_GPO(GPP_F18, 0, UP_20K, DEEP),			/* GPIO */
-+	PAD_CFG_GPO(GPP_F19, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_F20, 1, DEEP),					/* GPIO */
-+	PAD_CFG_GPO(GPP_F21, 1, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_F22, 1, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_F23, 1, RSMRST),				/* GPIO */
-+
-+	/* ------- GPIO Group GPP_G ------- */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_G0, NONE, PLTRST, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_G1, NONE, PLTRST, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_G2, NONE, PLTRST, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_G3, NONE, PLTRST, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_G4, NONE, PLTRST, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_G5, NONE, PLTRST, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_G6, NONE, PLTRST, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_G7, NONE, PLTRST, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_G8, NONE, PLTRST, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPO(GPP_G9, 1, PLTRST),					/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_G10, NONE, DEEP, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_G11, NONE, DEEP, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPO(GPP_G12, 1, DEEP),					/* GPIO */
-+	PAD_CFG_GPI_TRIG_OWN(GPP_G13, NONE, DEEP, OFF, ACPI),		/* GPIO */
-+	PAD_CFG_GPO(GPP_G14, 0, DEEP),					/* GPIO */
-+	PAD_CFG_GPO(GPP_G15, 1, DEEP),					/* GPIO */
-+	PAD_CFG_GPO(GPP_G16, 1, DEEP),					/* GPIO */
-+	PAD_CFG_GPO(GPP_G17, 1, DEEP),					/* GPIO */
-+	PAD_CFG_GPO(GPP_G18, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_G19, 1, DEEP),					/* GPIO */
-+	PAD_CFG_GPO(GPP_G20, 1, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_G21, 0, DEEP),					/* GPIO */
-+	PAD_CFG_GPO(GPP_G22, 0, DEEP),					/* GPIO */
-+	PAD_CFG_GPO(GPP_G23, 0, PLTRST),				/* GPIO */
-+
-+	/* ------- GPIO Group GPP_H ------- */
-+	PAD_CFG_GPO(GPP_H0, 0, DEEP),					/* GPIO */
-+	PAD_CFG_GPO(GPP_H1, 1, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_H2, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_H3, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_H4, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_H5, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_H6, 1, DEEP),					/* GPIO */
-+	PAD_CFG_GPO(GPP_H7, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_H8, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_H9, 0, PLTRST),					/* GPIO */
-+	PAD_CFG_GPO(GPP_H10, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_H11, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_TERM_GPO(GPP_H12, 1, DN_20K, DEEP),			/* GPIO */
-+	PAD_CFG_GPO(GPP_H13, 1, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_H14, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_H15, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_H16, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_H17, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_H18, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_H19, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_H20, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_H21, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_H22, 0, PLTRST),				/* GPIO */
-+	PAD_CFG_GPO(GPP_H23, 0, PLTRST),				/* GPIO */
-+
-+	/* ------- GPIO Community 2 ------- */
-+
-+	/* -------- GPIO Group GPD -------- */
-+	PAD_CFG_NF(GPD0, NONE, RSMRST, NF1),				/* BATLOW# */
-+	PAD_CFG_GPO(GPD1, 0, PWROK),					/* GPIO */
-+	PAD_CFG_NF(GPD2, NONE, RSMRST, NF1),				/* LAN_WAKE# */
-+	PAD_CFG_NF(GPD3, UP_20K, RSMRST, NF1),				/* PWRBTN# */
-+	PAD_CFG_NF(GPD4, NONE, RSMRST, NF1),				/* SLP_S3# */
-+	PAD_CFG_NF(GPD5, NONE, RSMRST, NF1),				/* SLP_S4# */
-+	PAD_CFG_NF(GPD6, NONE, RSMRST, NF1),				/* SLP_A# */
-+	PAD_CFG_GPO(GPD7, 1, RSMRST),					/* GPIO */
-+	PAD_CFG_NF(GPD8, NONE, RSMRST, NF1),				/* SUSCLK */
-+	PAD_CFG_NF(GPD9, NONE, RSMRST, NF1),				/* SLP_WLAN# */
-+	PAD_CFG_NF(GPD10, NONE, RSMRST, NF1),				/* SLP_S5# */
-+	PAD_CFG_GPO(GPD11, 1, RSMRST),					/* GPIO */
-+
-+	/* ------- GPIO Community 3 ------- */
-+
-+	/* ------- GPIO Group GPP_I ------- */
-+	PAD_CFG_NF(GPP_I0, NONE, PLTRST, NF1),				/* DDPB_HPD0 */
-+	PAD_CFG_NF(GPP_I1, NONE, PLTRST, NF1),				/* DDPC_HPD1 */
-+	PAD_CFG_NF(GPP_I2, NONE, PLTRST, NF1),				/* DDPD_HPD2 */
-+	PAD_CFG_NF(GPP_I3, NONE, PLTRST, NF1),				/* DDPE_HPD3 */
-+	PAD_CFG_NF(GPP_I4, NONE, PLTRST, NF1),				/* EDP_HPD */
-+	PAD_CFG_NF(GPP_I5, NONE, PLTRST, NF1),				/* DDPB_CTRLCLK */
-+	PAD_CFG_NF(GPP_I6, DN_20K, PLTRST, NF1),			/* DDPB_CTRLDATA */
-+	PAD_CFG_NF(GPP_I7, NONE, PLTRST, NF1),				/* DDPC_CTRLCLK */
-+	PAD_CFG_NF(GPP_I8, DN_20K, PLTRST, NF1),			/* DDPC_CTRLDATA */
-+	PAD_CFG_NF(GPP_I9, NONE, PLTRST, NF1),				/* DDPD_CTRLCLK */
-+	PAD_CFG_NF(GPP_I10, DN_20K, PLTRST, NF1),			/* DDPD_CTRLDATA */
-+};
-+
-+#endif
-diff --git a/src/mainboard/dell/optiplex_3050/ramstage.c b/src/mainboard/dell/optiplex_3050/ramstage.c
-new file mode 100644
-index 0000000000..94778f60c9
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/ramstage.c
-@@ -0,0 +1,512 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <bootstate.h>
-+#include <arch/cpuid.h>
-+#include <cpu/x86/msr.h>
-+#include <soc/gpio.h>
-+#include <soc/ramstage.h>
-+#include "include/gpio.h"
-+#include "sch5555_ec.h"
-+
-+void mainboard_silicon_init_params(FSP_SIL_UPD *params)
-+{
-+	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
-+}
-+
-+#define FORM_FACTOR_MICRO	0
-+#define FORM_FACTOR_SFF		1
-+// Probably DT and MT
-+#define FORM_FACTOR_UNK2	2
-+#define FORM_FACTOR_UNK3	3
-+
-+#define HWM_TAB_ADD_TEMP_TARGET	1
-+#define HWM_TAB_PKG_POWER_ANY	0xffff
-+
-+struct hwm_tab_entry {
-+	uint16_t addr;
-+	uint8_t val;
-+	uint8_t flags;
-+	uint16_t pkg_power;
-+};
-+
-+static const struct hwm_tab_entry HWM_TAB_MICRO_BASE[] = {
-+	{ 0x005, 0x33, 0, 0xffff },
-+	{ 0x018, 0x2f, 0, 0xffff },
-+	{ 0x019, 0x2f, 0, 0xffff },
-+	{ 0x01a, 0x2f, 0, 0xffff },
-+	{ 0x01b, 0x0f, 0, 0xffff },
-+	{ 0x057, 0xff, 0, 0xffff },
-+	{ 0x059, 0xff, 0, 0xffff },
-+	{ 0x05b, 0xff, 0, 0xffff },
-+	{ 0x05d, 0xff, 0, 0xffff },
-+	{ 0x05f, 0xff, 0, 0xffff },
-+	{ 0x061, 0xff, 0, 0xffff },
-+	{ 0x06e, 0x00, 0, 0xffff },
-+	{ 0x06f, 0x03, 0, 0xffff },
-+	{ 0x070, 0x03, 0, 0xffff },
-+	{ 0x071, 0x02, 0, 0xffff },
-+	{ 0x072, 0x02, 0, 0xffff },
-+	{ 0x073, 0x01, 0, 0xffff },
-+	{ 0x074, 0x06, 0, 0xffff },
-+	{ 0x075, 0x07, 0, 0xffff },
-+	{ 0x080, 0x00, 0, 0xffff },
-+	{ 0x081, 0x80, 0, 0xffff },
-+	{ 0x082, 0x80, 0, 0xffff },
-+	{ 0x083, 0xbb, 0, 0xffff },
-+	{ 0x085, 0xf1, 0, 0xffff },
-+	{ 0x086, 0x88, 0, 0xffff },
-+	{ 0x087, 0x61, 0, 0xffff },
-+	{ 0x088, 0x08, 0, 0xffff },
-+	{ 0x089, 0x00, 0, 0xffff },
-+	{ 0x08a, 0x73, 0, 0xffff },
-+	{ 0x08b, 0x73, 0, 0xffff },
-+	{ 0x08c, 0x73, 0, 0xffff },
-+	{ 0x090, 0x6d, 0, 0xffff },
-+	{ 0x091, 0x7e, 0, 0xffff },
-+	{ 0x092, 0x66, 0, 0xffff },
-+	{ 0x093, 0xa4, 0, 0xffff },
-+	{ 0x094, 0x7c, 0, 0xffff },
-+	{ 0x095, 0xa4, 0, 0xffff },
-+	{ 0x096, 0xa4, 0, 0xffff },
-+	{ 0x097, 0xa4, 0, 0xffff },
-+	{ 0x098, 0xa4, 0, 0xffff },
-+	{ 0x099, 0xa4, 0, 0xffff },
-+	{ 0x09a, 0xa4, 0, 0xffff },
-+	{ 0x09b, 0xa4, 0, 0xffff },
-+	{ 0x0a0, 0x2e, 0, 0xffff },
-+	{ 0x0a1, 0x00, 0, 0xffff },
-+	{ 0x0a2, 0x00, 0, 0xffff },
-+	{ 0x0ae, 0xa4, 0, 0xffff },
-+	{ 0x0af, 0xa4, 0, 0xffff },
-+	{ 0x0b0, 0xa4, 0, 0xffff },
-+	{ 0x0b1, 0xa4, 0, 0xffff },
-+	{ 0x0b2, 0xa4, 0, 0xffff },
-+	{ 0x0b3, 0xa4, 0, 0xffff },
-+	{ 0x0b6, 0x00, 0, 0xffff },
-+	{ 0x0b7, 0x00, 0, 0xffff },
-+	{ 0x0d1, 0xff, 0, 0xffff },
-+	{ 0x0d6, 0xff, 0, 0xffff },
-+	{ 0x0db, 0xff, 0, 0xffff },
-+	{ 0x0ea, 0x5c, 0, 0xffff },
-+	{ 0x0eb, 0x5c, 0, 0xffff },
-+	{ 0x0ef, 0xff, 0, 0xffff },
-+	{ 0x0f8, 0x15, 0, 0xffff },
-+	{ 0x0f9, 0x00, 0, 0xffff },
-+	{ 0x0f0, 0x30, 0, 0xffff },
-+	{ 0x184, 0xff, 0, 0xffff },
-+	{ 0x186, 0xff, 0, 0xffff },
-+	{ 0x1a1, 0xce, 0, 0xffff },
-+	{ 0x1a2, 0x0c, 0, 0xffff },
-+	{ 0x1a3, 0x0c, 0, 0xffff },
-+	{ 0x1a6, 0x00, 0, 0xffff },
-+	{ 0x1a7, 0x00, 0, 0xffff },
-+	{ 0x1a8, 0xa4, 0, 0xffff },
-+	{ 0x1a9, 0xa4, 0, 0xffff },
-+	{ 0x1ab, 0x2d, 0, 0xffff },
-+	{ 0x1ac, 0x2d, 0, 0xffff },
-+	{ 0x1b1, 0x00, 0, 0xffff },
-+	{ 0x1bb, 0x00, 0, 0xffff },
-+	{ 0x1bc, 0x00, 0, 0xffff },
-+	{ 0x1bd, 0x00, 0, 0xffff },
-+	{ 0x1be, 0x01, 0, 0xffff },
-+	{ 0x1bf, 0x01, 0, 0xffff },
-+	{ 0x1c0, 0x01, 0, 0xffff },
-+	{ 0x1c1, 0x01, 0, 0xffff },
-+	{ 0x1c2, 0x01, 0, 0xffff },
-+	{ 0x280, 0x00, 0, 0xffff },
-+	{ 0x281, 0x00, 0, 0xffff },
-+	{ 0x282, 0x03, 0, 0xffff },
-+	{ 0x283, 0x0a, 0, 0xffff },
-+	{ 0x284, 0x80, 0, 0xffff },
-+	{ 0x285, 0x03, 0, 0xffff },
-+	{ 0x040, 0x01, 0, 0xffff },
-+};
-+
-+static const struct hwm_tab_entry HWM_TAB_MICRO_TEMP80[] = {
-+	{ 0x005, 0x33, 0, 0xffff },
-+	{ 0x018, 0x2f, 0, 0xffff },
-+	{ 0x019, 0x2f, 0, 0xffff },
-+	{ 0x01a, 0x2f, 0, 0xffff },
-+	{ 0x01b, 0x0f, 0, 0xffff },
-+	{ 0x057, 0xff, 0, 0xffff },
-+	{ 0x059, 0xff, 0, 0xffff },
-+	{ 0x05b, 0xff, 0, 0xffff },
-+	{ 0x05d, 0xff, 0, 0xffff },
-+	{ 0x05f, 0xff, 0, 0xffff },
-+	{ 0x061, 0xff, 0, 0xffff },
-+	{ 0x06e, 0x00, 0, 0xffff },
-+	{ 0x06f, 0x03, 0, 0xffff },
-+	{ 0x070, 0x03, 0, 0xffff },
-+	{ 0x071, 0x02, 0, 0xffff },
-+	{ 0x072, 0x02, 0, 0xffff },
-+	{ 0x073, 0x01, 0, 0xffff },
-+	{ 0x074, 0x06, 0, 0xffff },
-+	{ 0x075, 0x07, 0, 0xffff },
-+	{ 0x080, 0x00, 0, 0xffff },
-+	{ 0x081, 0x80, 0, 0xffff },
-+	{ 0x082, 0x80, 0, 0xffff },
-+	{ 0x083, 0xbb, 0, 0xffff },
-+	{ 0x085, 0xf6, 0, 0xffff },
-+	{ 0x086, 0x88, 0, 0xffff },
-+	{ 0x087, 0x61, 0, 0xffff },
-+	{ 0x088, 0x08, 0, 0xffff },
-+	{ 0x089, 0x00, 0, 0xffff },
-+	{ 0x08a, 0x73, 0, 0xffff },
-+	{ 0x08b, 0x73, 0, 0xffff },
-+	{ 0x08c, 0x73, 0, 0xffff },
-+	{ 0x090, 0x6d, 0, 0xffff },
-+	{ 0x091, 0x86, 0, 0xffff },
-+	{ 0x092, 0x66, 0, 0xffff },
-+	{ 0x093, 0xa4, 0, 0xffff },
-+	{ 0x094, 0x7c, 0, 0xffff },
-+	{ 0x095, 0xa4, 0, 0xffff },
-+	{ 0x096, 0xa4, 0, 0xffff },
-+	{ 0x097, 0xa4, 0, 0xffff },
-+	{ 0x098, 0xa4, 0, 0xffff },
-+	{ 0x099, 0xa4, 0, 0xffff },
-+	{ 0x09a, 0xa4, 0, 0xffff },
-+	{ 0x09b, 0xa4, 0, 0xffff },
-+	{ 0x0a0, 0x2e, 0, 0xffff },
-+	{ 0x0a1, 0x00, 0, 0xffff },
-+	{ 0x0a2, 0x00, 0, 0xffff },
-+	{ 0x0ae, 0xa4, 0, 0xffff },
-+	{ 0x0af, 0xa4, 0, 0xffff },
-+	{ 0x0b0, 0xa4, 0, 0xffff },
-+	{ 0x0b1, 0xa4, 0, 0xffff },
-+	{ 0x0b2, 0xa4, 0, 0xffff },
-+	{ 0x0b3, 0xa4, 0, 0xffff },
-+	{ 0x0b6, 0x00, 0, 0xffff },
-+	{ 0x0b7, 0x00, 0, 0xffff },
-+	{ 0x0d1, 0xff, 0, 0xffff },
-+	{ 0x0d6, 0xff, 0, 0xffff },
-+	{ 0x0db, 0xff, 0, 0xffff },
-+	{ 0x0ea, 0x50, 0, 0xffff },
-+	{ 0x0eb, 0x50, 0, 0xffff },
-+	{ 0x0ef, 0xff, 0, 0xffff },
-+	{ 0x0f8, 0x15, 0, 0xffff },
-+	{ 0x0f9, 0x00, 0, 0xffff },
-+	{ 0x0f0, 0x30, 0, 0xffff },
-+	{ 0x184, 0xff, 0, 0xffff },
-+	{ 0x186, 0xff, 0, 0xffff },
-+	{ 0x1a1, 0xce, 0, 0xffff },
-+	{ 0x1a2, 0x0c, 0, 0xffff },
-+	{ 0x1a3, 0x0c, 0, 0xffff },
-+	{ 0x1a6, 0x00, 0, 0xffff },
-+	{ 0x1a7, 0x00, 0, 0xffff },
-+	{ 0x1a8, 0xa4, 0, 0xffff },
-+	{ 0x1a9, 0xa4, 0, 0xffff },
-+	{ 0x1ab, 0x2d, 0, 0xffff },
-+	{ 0x1ac, 0x2d, 0, 0xffff },
-+	{ 0x1b1, 0x00, 0, 0xffff },
-+	{ 0x1bb, 0x00, 0, 0xffff },
-+	{ 0x1bc, 0x00, 0, 0xffff },
-+	{ 0x1bd, 0x00, 0, 0xffff },
-+	{ 0x1be, 0x01, 0, 0xffff },
-+	{ 0x1bf, 0x01, 0, 0xffff },
-+	{ 0x1c0, 0x01, 0, 0xffff },
-+	{ 0x1c1, 0x01, 0, 0xffff },
-+	{ 0x1c2, 0x01, 0, 0xffff },
-+	{ 0x280, 0x00, 0, 0xffff },
-+	{ 0x281, 0x00, 0, 0xffff },
-+	{ 0x282, 0x03, 0, 0xffff },
-+	{ 0x283, 0x0a, 0, 0xffff },
-+	{ 0x284, 0x80, 0, 0xffff },
-+	{ 0x285, 0x03, 0, 0xffff },
-+	{ 0x040, 0x01, 0, 0xffff },
-+};
-+
-+static const struct hwm_tab_entry HWM_TAB_MICRO_EARLY_STEPPING[] = {
-+	{ 0x005, 0x33, 0, 0xffff },
-+	{ 0x018, 0x2f, 0, 0xffff },
-+	{ 0x019, 0x2f, 0, 0xffff },
-+	{ 0x01a, 0x2f, 0, 0xffff },
-+	{ 0x01b, 0x0f, 0, 0xffff },
-+	{ 0x057, 0xff, 0, 0xffff },
-+	{ 0x059, 0xff, 0, 0xffff },
-+	{ 0x05b, 0xff, 0, 0xffff },
-+	{ 0x05d, 0xff, 0, 0xffff },
-+	{ 0x05f, 0xff, 0, 0xffff },
-+	{ 0x061, 0xff, 0, 0xffff },
-+	{ 0x06e, 0x01, 0, 0xffff },
-+	{ 0x06f, 0x03, 0, 0xffff },
-+	{ 0x070, 0x03, 0, 0xffff },
-+	{ 0x071, 0x02, 0, 0xffff },
-+	{ 0x072, 0x02, 0, 0xffff },
-+	{ 0x073, 0x01, 0, 0xffff },
-+	{ 0x074, 0x06, 0, 0xffff },
-+	{ 0x075, 0x07, 0, 0xffff },
-+	{ 0x080, 0x00, 0, 0xffff },
-+	{ 0x081, 0x80, 0, 0xffff },
-+	{ 0x082, 0x80, 0, 0xffff },
-+	{ 0x083, 0xbb, 0, 0xffff },
-+	{ 0x085, 0xfd, 0, 0xffff },
-+	{ 0x086, 0x60, 0, 0xffff },
-+	{ 0x087, 0x50, 0, 0xffff },
-+	{ 0x088, 0x08, 0, 0xffff },
-+	{ 0x089, 0x00, 0, 0xffff },
-+	{ 0x08a, 0x73, 0, 0xffff },
-+	{ 0x08b, 0x73, 0, 0xffff },
-+	{ 0x08c, 0x73, 0, 0xffff },
-+	{ 0x090, 0x6d, 0, 0xffff },
-+	{ 0x091, 0x7a, 0, 0xffff },
-+	{ 0x092, 0x6b, 0, 0xffff },
-+	{ 0x093, 0xa4, 0, 0xffff },
-+	{ 0x094, 0x78, 0, 0xffff },
-+	{ 0x095, 0xa4, 0, 0xffff },
-+	{ 0x096, 0xa4, 0, 0xffff },
-+	{ 0x097, 0xa4, 0, 0xffff },
-+	{ 0x098, 0xa4, 0, 0xffff },
-+	{ 0x099, 0xa4, 0, 0xffff },
-+	{ 0x09a, 0xa4, 0, 0xffff },
-+	{ 0x09b, 0xa4, 0, 0xffff },
-+	{ 0x0a0, 0x2e, 0, 0xffff },
-+	{ 0x0a1, 0x00, 0, 0xffff },
-+	{ 0x0a2, 0x00, 0, 0xffff },
-+	{ 0x0ae, 0xa4, 0, 0xffff },
-+	{ 0x0af, 0xa4, 0, 0xffff },
-+	{ 0x0b0, 0xa4, 0, 0xffff },
-+	{ 0x0b1, 0xa4, 0, 0xffff },
-+	{ 0x0b2, 0xa4, 0, 0xffff },
-+	{ 0x0b3, 0xa4, 0, 0xffff },
-+	{ 0x0b6, 0x00, 0, 0xffff },
-+	{ 0x0b7, 0x00, 0, 0xffff },
-+	{ 0x0d1, 0xff, 0, 0xffff },
-+	{ 0x0d6, 0xff, 0, 0xffff },
-+	{ 0x0db, 0xff, 0, 0xffff },
-+	{ 0x0ea, 0x64, 0, 0xffff },
-+	{ 0x0eb, 0x64, 0, 0xffff },
-+	{ 0x0ef, 0xff, 0, 0xffff },
-+	{ 0x0f8, 0x15, 0, 0xffff },
-+	{ 0x0f9, 0x00, 0, 0xffff },
-+	{ 0x0f0, 0x30, 0, 0xffff },
-+	{ 0x184, 0xff, 0, 0xffff },
-+	{ 0x186, 0xff, 0, 0xffff },
-+	{ 0x1a1, 0xce, 0, 0xffff },
-+	{ 0x1a2, 0x0c, 0, 0xffff },
-+	{ 0x1a3, 0x0c, 0, 0xffff },
-+	{ 0x1a6, 0x00, 0, 0xffff },
-+	{ 0x1a7, 0x00, 0, 0xffff },
-+	{ 0x1a8, 0xa4, 0, 0xffff },
-+	{ 0x1a9, 0xa4, 0, 0xffff },
-+	{ 0x1ab, 0x2d, 0, 0xffff },
-+	{ 0x1ac, 0x2d, 0, 0xffff },
-+	{ 0x1b1, 0x00, 0, 0xffff },
-+	{ 0x1bb, 0x00, 0, 0xffff },
-+	{ 0x1bc, 0x00, 0, 0xffff },
-+	{ 0x1bd, 0x00, 0, 0xffff },
-+	{ 0x1be, 0x01, 0, 0xffff },
-+	{ 0x1bf, 0x01, 0, 0xffff },
-+	{ 0x1c0, 0x01, 0, 0xffff },
-+	{ 0x1c1, 0x01, 0, 0xffff },
-+	{ 0x1c2, 0x01, 0, 0xffff },
-+	{ 0x280, 0x00, 0, 0xffff },
-+	{ 0x281, 0x00, 0, 0xffff },
-+	{ 0x282, 0x03, 0, 0xffff },
-+	{ 0x283, 0x0a, 0, 0xffff },
-+	{ 0x284, 0x80, 0, 0xffff },
-+	{ 0x285, 0x03, 0, 0xffff },
-+	{ 0x040, 0x01, 0, 0xffff },
-+};
-+
-+static const struct hwm_tab_entry HWM_TAB_SFF[] = {
-+	{ 0x019, 0x2f, 0, 0xffff },
-+	{ 0x040, 0x01, 0, 0xffff },
-+	{ 0x072, 0x03, 0, 0xffff },
-+	{ 0x075, 0x06, 0, 0xffff },
-+	{ 0x07c, 0x00, 0, 0xffff },
-+	{ 0x080, 0x00, 0, 0xffff },
-+	{ 0x081, 0x00, 0, 0xffff },
-+	{ 0x083, 0xbb, 0, 0xffff },
-+	{ 0x085, 0x59, 0, 0xffff },
-+	{ 0x086, 0x6a, 0, 0xffff },
-+	{ 0x087, 0xc0, 0, 0xffff },
-+	{ 0x08a, 0x33, 0, 0xffff },
-+	{ 0x090, 0x77, 0, 0xffff },
-+	{ 0x091, 0x66, 0, 0xffff },
-+	{ 0x092, 0x94, 0, 0xffff },
-+	{ 0x093, 0x90, 0, 0xffff },
-+	{ 0x094, 0x68, 0, 0xffff },
-+	{ 0x096, 0xa4, 0, 0xffff },
-+	{ 0x097, 0xa4, 0, 0xffff },
-+	{ 0x098, 0xa4, 0, 0xffff },
-+	{ 0x099, 0xa4, 0, 0xffff },
-+	{ 0x09a, 0xa4, 0, 0xffff },
-+	{ 0x09b, 0xa4, 0, 0xffff },
-+	{ 0x0a0, 0x3e, 0, 0xffff },
-+	{ 0x0ae, 0x86, 0, 0xffff },
-+	{ 0x0af, 0x86, 0, 0xffff },
-+	{ 0x0b0, 0xa4, 0, 0xffff },
-+	{ 0x0b1, 0xa4, 0, 0xffff },
-+	{ 0x0b2, 0x90, 0, 0xffff },
-+	{ 0x0b6, 0x48, 0, 0xffff },
-+	{ 0x0b7, 0x48, 0, 0xffff },
-+	{ 0x0ea, 0x64, 0, 0xffff },
-+	{ 0x0f0, 0x30, 0, 0xffff },
-+	{ 0x1b1, 0x48, 0, 0xffff },
-+	{ 0x1b8, 0x00, 0, 0xffff },
-+	{ 0x1be, 0x95, 0, 0xffff },
-+	{ 0x1c1, 0x90, 0, 0xffff },
-+	{ 0x1c6, 0x00, 0, 0xffff },
-+	{ 0x1c9, 0x00, 0, 0xffff },
-+	{ 0x280, 0x68, 0, 0xffff },
-+	{ 0x281, 0x10, 0, 0xffff },
-+	{ 0x282, 0x03, 0, 0xffff },
-+	{ 0x283, 0x0a, 0, 0xffff },
-+	{ 0x284, 0x80, 0, 0xffff },
-+	{ 0x285, 0x03, 0, 0xffff}
-+};
-+
-+static const struct hwm_tab_entry HWM_TAB_MT[] = {
-+	{ 0x005, 0x33, 0, 0xffff },
-+	{ 0x018, 0x2f, 0, 0xffff },
-+	{ 0x019, 0x2f, 0, 0xffff },
-+	{ 0x01a, 0x2f, 0, 0xffff },
-+	{ 0x080, 0x00, 0, 0xffff },
-+	{ 0x081, 0x00, 0, 0xffff },
-+	{ 0x082, 0x80, 0, 0xffff },
-+	{ 0x083, 0xbb, 0, 0xffff },
-+	{ 0x085, 0xb9, 0, 0x0010 },
-+	{ 0x086, 0xac, 0, 0x0010 },
-+	{ 0x087, 0x87, 0, 0x0010 },
-+	{ 0x08a, 0x51, 0, 0x0010 },
-+	{ 0x08b, 0x39, 0, 0x0010 },
-+	{ 0x090, 0x78, 0, 0xffff },
-+	{ 0x091, 0x6a, 0, 0xffff },
-+	{ 0x092, 0x8f, 0, 0xffff },
-+	{ 0x094, 0x68, 0, 0xffff },
-+	{ 0x095, 0x5b, 0, 0xffff },
-+	{ 0x096, 0x92, 0, 0xffff },
-+	{ 0x097, 0x86, 0, 0xffff },
-+	{ 0x098, 0xa4, 0, 0xffff },
-+	{ 0x09a, 0x8b, 0, 0xffff },
-+	{ 0x0a0, 0x0a, 0, 0xffff },
-+	{ 0x0a1, 0x26, 0, 0xffff },
-+	{ 0x0a2, 0xd1, 0, 0xffff },
-+	{ 0x0ae, 0x7c, 0, 0xffff },
-+	{ 0x0af, 0x7c, 0, 0xffff },
-+	{ 0x0b0, 0x9a, 0, 0xffff },
-+	{ 0x0b3, 0x7c, 0, 0xffff },
-+	{ 0x0b6, 0x08, 0, 0xffff },
-+	{ 0x0b7, 0x00, 0, 0xffff },
-+	{ 0x0ea, 0x64, 0, 0xffff },
-+	{ 0x0ef, 0xff, 0, 0xffff },
-+	{ 0x0f8, 0x15, 0, 0xffff },
-+	{ 0x0f9, 0x00, 0, 0xffff },
-+	{ 0x0f0, 0x30, 0, 0xffff },
-+	{ 0x0fd, 0x01, 0, 0xffff },
-+	{ 0x1a1, 0x99, 0, 0xffff },
-+	{ 0x1a2, 0x00, 0, 0xffff },
-+	{ 0x1a4, 0x00, 0, 0xffff },
-+	{ 0x1b1, 0x00, 0, 0xffff },
-+	{ 0x1be, 0x90, 0, 0xffff },
-+	{ 0x280, 0xc4, 0, 0xffff },
-+	{ 0x281, 0x09, 0, 0xffff },
-+	{ 0x282, 0x0a, 0, 0xffff },
-+	{ 0x283, 0x14, 0, 0xffff },
-+	{ 0x284, 0x01, 0, 0xffff },
-+	{ 0x285, 0x01, 0, 0xffff },
-+	{ 0x288, 0x94, 0, 0xffff },
-+	{ 0x289, 0x11, 0, 0xffff },
-+	{ 0x28a, 0x0a, 0, 0xffff },
-+	{ 0x28b, 0x14, 0, 0xffff },
-+	{ 0x28c, 0x01, 0, 0xffff },
-+	{ 0x28d, 0x01, 0, 0xffff },
-+	{ 0x294, 0x24, 0, 0xffff },
-+};
-+
-+static uint8_t get_temp_target(void)
-+{
-+	uint8_t val = rdmsr(0x1a2).lo >> 8 & 0xff;
-+	if (!val)
-+		val = 20;
-+	return 0x95 - val;
-+}
-+
-+static uint16_t get_pkg_power(void)
-+{
-+	const unsigned int pkg_power = rdmsr(0x614).lo & 0x7fff;
-+	const unsigned int power_unit = 1 << (rdmsr(0x606).lo & 0xf);
-+	if (pkg_power / power_unit > 65)
-+		return 32;
-+	else
-+		return 16;
-+}
-+
-+static uint8_t get_core_cnt(void)
-+{
-+	// Intel describes this CPUID field as:
-+	// > Maximum number of addressable IDs for processor cores in the physical package
-+	if (cpuid(0).eax >= 4)
-+		return cpuid_ext(4, 0).eax >> 26;
-+	return 0;
-+}
-+
-+static void apply_hwm_tab(const struct hwm_tab_entry *arr, size_t size)
-+{
-+	uint8_t temp_target = get_temp_target();
-+	uint16_t pkg_power = get_pkg_power();
-+
-+	printk(BIOS_DEBUG, "Temp target = %#x\n", temp_target);
-+	printk(BIOS_DEBUG, "Package power = %#x\n", pkg_power);
-+
-+	for (size_t i = 0; i < size; ++i) {
-+		// Skip entry if it doesn't apply for this package power
-+		if (arr[i].pkg_power != pkg_power &&
-+		    arr[i].pkg_power != HWM_TAB_PKG_POWER_ANY)
-+			continue;
-+
-+		uint8_t val = arr[i].val;
-+
-+		// Add temp target to value if requested (current tables never do)
-+		if (arr[i].flags & HWM_TAB_ADD_TEMP_TARGET)
-+			val += temp_target;
-+
-+		// Perform write
-+		sch5555_mbox_write(1, arr[i].addr, val);
-+	}
-+}
-+
-+static void sch5555_ec_hwm_init(void *arg)
-+{
-+	uint8_t form_fac_id, saved_2fc, core_cnt;
-+
-+	printk(BIOS_DEBUG, "OptiPlex 3050 late HWM init\n");
-+
-+	form_fac_id = gpio_get(GPP_G2) | gpio_get(GPP_G3) << 1;
-+	printk(BIOS_DEBUG, "Form Factor ID = %#x\n", form_fac_id);
-+
-+	saved_2fc = sch5555_mbox_read(1, 0x2fc);
-+	sch5555_mbox_write(1, 0x2fc, 0xa0);
-+	sch5555_mbox_write(1, 0x2fd, 0x32);
-+
-+	switch (form_fac_id) {
-+	case FORM_FACTOR_MICRO:
-+		// CPU stepping <= 3
-+		if ((cpuid(1).eax & 0xf) <= 3)
-+			apply_hwm_tab(HWM_TAB_MICRO_EARLY_STEPPING, ARRAY_SIZE(HWM_TAB_MICRO_EARLY_STEPPING));
-+		// Tjunction == 80
-+		else if ((rdmsr(0x1a2).lo >> 16 & 0xff) == 80)
-+			apply_hwm_tab(HWM_TAB_MICRO_TEMP80, ARRAY_SIZE(HWM_TAB_MICRO_TEMP80));
-+		else
-+			apply_hwm_tab(HWM_TAB_MICRO_BASE, ARRAY_SIZE(HWM_TAB_MICRO_BASE));
-+		break;
-+	case FORM_FACTOR_SFF:
-+		apply_hwm_tab(HWM_TAB_SFF, ARRAY_SIZE(HWM_TAB_SFF));
-+		break;
-+	default:
-+		apply_hwm_tab(HWM_TAB_MT, ARRAY_SIZE(HWM_TAB_MT));
-+		break;
-+	}
-+
-+	core_cnt = get_core_cnt();
-+	printk(BIOS_DEBUG, "CPU Core Count = %#x\n", core_cnt);
-+	if (core_cnt > 2) {
-+		sch5555_mbox_write(1, 0x9e, 0x30);
-+		sch5555_mbox_write(1, 0xeb, sch5555_mbox_read(1, 0xea));
-+	}
-+
-+	sch5555_mbox_write(1, 0x2fc, saved_2fc);
-+	sch5555_mbox_read(1, 0xb8);
-+}
-+
-+BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL);
-diff --git a/src/mainboard/dell/optiplex_3050/romstage.c b/src/mainboard/dell/optiplex_3050/romstage.c
-new file mode 100644
-index 0000000000..501b254232
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/romstage.c
-@@ -0,0 +1,18 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <soc/romstage.h>
-+#include <spd_bin.h>
-+
-+void mainboard_memory_init_params(FSPM_UPD *mupd)
-+{
-+	struct spd_block blk = { .addr_map = { 0x50, 0x52, } };
-+	get_spd_smbus(&blk);
-+	dump_spd_info(&blk);
-+
-+	FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig;
-+	mem_cfg->DqPinsInterleaved = true;
-+	mem_cfg->CaVrefConfig      = 2;
-+	mem_cfg->MemorySpdDataLen  = blk.len;
-+	mem_cfg->MemorySpdPtr00    = (uintptr_t)blk.spd_array[0];
-+	mem_cfg->MemorySpdPtr10    = (uintptr_t)blk.spd_array[1];
-+}
-diff --git a/src/mainboard/dell/optiplex_3050/sch5555_ec.c b/src/mainboard/dell/optiplex_3050/sch5555_ec.c
-new file mode 100644
-index 0000000000..1df5026531
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/sch5555_ec.c
-@@ -0,0 +1,54 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <arch/io.h>
-+#include <device/pnp_ops.h>
-+#include <superio/smsc/sch555x/sch555x.h>
-+#include "sch5555_ec.h"
-+
-+uint8_t sch5555_mbox_read(uint8_t addr1, uint16_t addr2)
-+{
-+	// clear ec-to-host mailbox
-+	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
-+	outb(tmp, SCH555x_EMI_IOBASE + 1);
-+
-+	// send address
-+	outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
-+	outw((addr1 * 2) | 0x100, SCH555x_EMI_IOBASE + 4);
-+
-+	outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
-+	outl(addr2 << 16, SCH555x_EMI_IOBASE + 4);
-+
-+	// send message to ec
-+	outb(1, SCH555x_EMI_IOBASE);
-+
-+	// wait for ack
-+	for (size_t retry = 0; retry < 0xfff; ++retry)
-+		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
-+			break;
-+
-+	// read result
-+	outw(4 | 0x8000, SCH555x_EMI_IOBASE + 2);
-+	return inb(SCH555x_EMI_IOBASE + 4);
-+}
-+
-+void sch5555_mbox_write(uint8_t addr1, uint16_t addr2, uint8_t val)
-+{
-+	// clear ec-to-host mailbox
-+	uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
-+	outb(tmp, SCH555x_EMI_IOBASE + 1);
-+
-+	// send address and value
-+	outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
-+	outw((addr1 * 2) | 0x101, SCH555x_EMI_IOBASE + 4);
-+
-+	outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
-+	outl(val | (addr2 << 16), SCH555x_EMI_IOBASE + 4);
-+
-+	// send message to ec
-+	outb(1, SCH555x_EMI_IOBASE);
-+
-+	// wait for ack
-+	for (size_t retry = 0; retry < 0xfff; ++retry)
-+		if (inb(SCH555x_EMI_IOBASE + 1) & 1)
-+			break;
-+}
-diff --git a/src/mainboard/dell/optiplex_3050/sch5555_ec.h b/src/mainboard/dell/optiplex_3050/sch5555_ec.h
-new file mode 100644
-index 0000000000..9d262d5787
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_3050/sch5555_ec.h
-@@ -0,0 +1,10 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#ifndef __SCH5555_EC_H__
-+#define __SCH5555_EC_H__
-+
-+uint8_t sch5555_mbox_read(uint8_t addr1, uint16_t addr2);
-+
-+void sch5555_mbox_write(uint8_t addr1, uint16_t addr2, uint8_t val);
-+
-+#endif
--- 
-2.39.5
-
diff --git a/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch b/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch
new file mode 100644
index 00000000..1b6b5372
--- /dev/null
+++ b/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch
@@ -0,0 +1,94 @@
+From 18b68185f44599cf6ea6a20816bf6a5eb7aeda17 Mon Sep 17 00:00:00 2001
+From: Felix Singer <felixsinger@posteo.net>
+Date: Wed, 26 Jun 2024 04:24:31 +0200
+Subject: [PATCH 1/8] soc/intel/skylake: configure usb acpi
+
+Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d
+Signed-off-by: Felix Singer <felixsinger@posteo.net>
+---
+ src/soc/intel/skylake/Kconfig    |  1 +
+ src/soc/intel/skylake/chipset.cb | 56 +++++++++++++++++++++++++++++++-
+ 2 files changed, 56 insertions(+), 1 deletion(-)
+
+diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
+index 22017c848b..c24df2ef75 100644
+--- a/src/soc/intel/skylake/Kconfig
++++ b/src/soc/intel/skylake/Kconfig
+@@ -10,6 +10,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
+ 	select CPU_INTEL_COMMON
+ 	select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
+ 	select CPU_SUPPORTS_PM_TIMER_EMULATION
++	select DRIVERS_USB_ACPI
+ 	select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
+ 	select FSP_COMPRESS_FSP_S_LZ4
+ 	select FSP_M_XIP
+diff --git a/src/soc/intel/skylake/chipset.cb b/src/soc/intel/skylake/chipset.cb
+index 6538a1475b..dfb81d496e 100644
+--- a/src/soc/intel/skylake/chipset.cb
++++ b/src/soc/intel/skylake/chipset.cb
+@@ -13,7 +13,61 @@ chip soc/intel/skylake
+ 		device pci 07.0 alias chap         off                     end
+ 		device pci 08.0 alias gmm          off                     end # Gaussian Mixture Model
+ 		device pci 13.0 alias ish          off                     end # SensorHub
+-		device pci 14.0 alias south_xhci   off ops usb_xhci_ops    end
++		device pci 14.0 alias south_xhci   off ops usb_xhci_ops
++			chip drivers/usb/acpi
++				register "type" = "UPC_TYPE_HUB"
++				device usb 0.0 alias xhci_root_hub off
++					chip drivers/usb/acpi
++						device usb 2.0 alias usb2_port1 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.1 alias usb2_port2 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.2 alias usb2_port3 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.3 alias usb2_port4 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.4 alias usb2_port5 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.5 alias usb2_port6 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.6 alias usb2_port7 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.7 alias usb2_port8 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.8 alias usb2_port9 off end
++					end
++					chip drivers/usb/acpi
++						device usb 2.9 alias usb2_port10 off end
++					end
++					chip drivers/usb/acpi
++						device usb 3.0 alias usb3_port1 off end
++					end
++					chip drivers/usb/acpi
++						device usb 3.1 alias usb3_port2 off end
++					end
++					chip drivers/usb/acpi
++						device usb 3.2 alias usb3_port3 off end
++					end
++					chip drivers/usb/acpi
++						device usb 3.3 alias usb3_port4 off end
++					end
++					chip drivers/usb/acpi
++						device usb 3.4 alias usb3_port5 off end
++					end
++					chip drivers/usb/acpi
++						device usb 3.5 alias usb3_port6 off end
++					end
++				end
++			end
++		end
+ 		device pci 14.1 alias south_xdci   off ops usb_xdci_ops    end
+ 		device pci 14.2 alias thermal      off                     end
+ 		device pci 14.3 alias cio          off                     end
+-- 
+2.39.5
+
diff --git a/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch b/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch
new file mode 100644
index 00000000..77d7b080
--- /dev/null
+++ b/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch
@@ -0,0 +1,308 @@
+From a7cbcbc7037fe3473e5ebe475cbfd12f653e9827 Mon Sep 17 00:00:00 2001
+From: Felix Singer <felixsinger@posteo.net>
+Date: Wed, 26 Jun 2024 00:59:03 +0200
+Subject: [PATCH 2/8] mb/lenovo: Add initial code for Lenovo ThinkPad E460
+
+Change-Id: Ia02f81750105c95c867d961dbdadcd5991ad371f
+Signed-off-by: Felix Singer <felixsinger@posteo.net>
+---
+ src/mainboard/lenovo/sklkbl_thinkpad/Kconfig  | 47 +++++++++++++++++++
+ .../lenovo/sklkbl_thinkpad/Kconfig.name       |  4 ++
+ .../lenovo/sklkbl_thinkpad/Makefile.mk        |  7 +++
+ .../lenovo/sklkbl_thinkpad/acpi/ec.asl        |  3 ++
+ .../lenovo/sklkbl_thinkpad/acpi/superio.asl   |  3 ++
+ .../lenovo/sklkbl_thinkpad/bootblock.c        |  7 +++
+ .../lenovo/sklkbl_thinkpad/devicetree.cb      | 17 +++++++
+ src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl | 23 +++++++++
+ .../lenovo/sklkbl_thinkpad/ramstage.c         | 11 +++++
+ .../lenovo/sklkbl_thinkpad/romstage.c         |  7 +++
+ .../variants/e460/gma-mainboard.ads           | 15 ++++++
+ .../sklkbl_thinkpad/variants/e460/hda_verb.c  | 10 ++++
+ .../variants/e460/overridetree.cb             | 37 +++++++++++++++
+ 13 files changed, 191 insertions(+)
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
+new file mode 100644
+index 0000000000..fcc80dffe3
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
+@@ -0,0 +1,47 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
++	bool
++	select BOARD_ROMSIZE_KB_12288
++	select HAVE_ACPI_RESUME
++	select HAVE_ACPI_TABLES
++#	select HAVE_CMOS_DEFAULT
++#	select INTEL_GMA_HAVE_VBT
++	select INTEL_LPSS_UART_FOR_CONSOLE
++	select MAINBOARD_HAS_LIBGFXINIT
++	select MEMORY_MAPPED_TPM
++	select MAINBOARD_HAS_TPM2
++	select NO_UART_ON_SUPERIO
++	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
++	select SPD_READ_BY_WORD
++	select SYSTEM_TYPE_LAPTOP
++
++config BOARD_LENOVO_E460
++	bool
++	select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
++	select SOC_INTEL_SKYLAKE
++
++if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
++
++config MAINBOARD_DIR
++	default "lenovo/sklkbl_thinkpad"
++
++config VARIANT_DIR
++	default "e460" if BOARD_LENOVO_E460
++
++config MAINBOARD_PART_NUMBER
++	default "E460" if BOARD_LENOVO_E460
++
++config CBFS_SIZE
++	default 0x600000 if BOARD_LENOVO_E460
++
++config DIMM_MAX
++	default 4
++
++config DIMM_SPD_SIZE
++	default 256
++
++config UART_FOR_CONSOLE
++	default 2
++
++endif
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
+new file mode 100644
+index 0000000000..61d971fe8d
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
+@@ -0,0 +1,4 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++config BOARD_LENOVO_E460
++	bool "ThinkPad E460"
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
+new file mode 100644
+index 0000000000..6e544fd6b9
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
+@@ -0,0 +1,7 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++bootblock-y += bootblock.c
++
++ramstage-y += ramstage.c
++ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
+new file mode 100644
+index 0000000000..16990d45f4
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: CC-PDDC */
++
++/* Please update the license if adding licensable material. */
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl
+new file mode 100644
+index 0000000000..55b1db5b11
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <drivers/pc80/pc/ps2_controller.asl>
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
+new file mode 100644
+index 0000000000..ccd8ec1b40
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
+@@ -0,0 +1,7 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++
++void bootblock_mainboard_early_init(void)
++{
++}
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
+new file mode 100644
+index 0000000000..ddb6e8aaa5
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
+@@ -0,0 +1,17 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++chip soc/intel/skylake
++	device domain 0 on
++		device ref igpu on end
++		device ref sa_thermal on end
++		device ref thermal on end
++		device ref south_xhci on end
++		device ref lpc_espi on
++			register "serirq_mode" = "SERIRQ_CONTINUOUS"
++			chip drivers/pc80/tpm
++				device pnp 0c31.0 on end
++			end
++		end
++		device ref hda on end
++	end
++end
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
+new file mode 100644
+index 0000000000..967b652853
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
+@@ -0,0 +1,23 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi.h>
++DefinitionBlock(
++	"dsdt.aml",
++	"DSDT",
++	ACPI_DSDT_REV_2,
++	OEM_ID,
++	ACPI_TABLE_CREATOR,
++	0x20110725
++)
++{
++	#include <acpi/dsdt_top.asl>
++	#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
++	#include <cpu/intel/common/acpi/cpu.asl>
++
++	Device (\_SB.PCI0) {
++		#include <soc/intel/skylake/acpi/systemagent.asl>
++		#include <soc/intel/skylake/acpi/pch.asl>
++	}
++
++	#include <southbridge/intel/common/acpi/sleepstates.asl>
++}
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
+new file mode 100644
+index 0000000000..6c3b077cc4
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
+@@ -0,0 +1,11 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/device.h>
++
++static void init_mainboard(void *chip_info)
++{
++}
++
++struct chip_operations mainboard_ops = {
++	.init = init_mainboard,
++};
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
+new file mode 100644
+index 0000000000..59a62f484e
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
+@@ -0,0 +1,7 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <soc/romstage.h>
++
++void mainboard_memory_init_params(FSPM_UPD *mupd)
++{
++}
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads
+new file mode 100644
+index 0000000000..e0a166fe55
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads
+@@ -0,0 +1,15 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (eDP,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c
+new file mode 100644
+index 0000000000..d9d103f862
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c
+@@ -0,0 +1,10 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++};
++
++const u32 pc_beep_verbs[] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb
+new file mode 100644
+index 0000000000..a7384848a6
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb
+@@ -0,0 +1,37 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++chip soc/intel/skylake
++	device domain 0 on
++		device ref south_xhci on
++			register "usb2_ports" = "{
++				[0] = USB2_PORT_MID(OC_SKIP),	// On board, right front
++				[1] = USB2_PORT_MID(OC_SKIP),	// On board, right back
++				[2] = USB2_PORT_MID(OC_SKIP),	// Charger port
++				[3] = USB2_PORT_MID(OC_SKIP),	// Docking
++				[4] = USB2_PORT_MID(OC_SKIP),	// Touch panel
++				[5] = USB2_PORT_MID(OC_SKIP),	// Bluetooth
++				[6] = USB2_PORT_MID(OC_SKIP),	// Camera
++				[7] = USB2_PORT_MID(OC_SKIP),	// Fingerprint
++			}"
++			register "usb3_ports" = "{
++				[0] = USB3_PORT_DEFAULT(OC_SKIP),	// On board, right front
++				[1] = USB3_PORT_DEFAULT(OC_SKIP),	// On board, right back
++				[2] = USB3_PORT_DEFAULT(OC_SKIP),	// Charger port
++				[3] = USB3_PORT_DEFAULT(OC_SKIP),	// Docking
++			}"
++		end
++		device ref sata on
++			register "SataPortsEnable[0]" = "1"
++			register "SataPortsDevSlp[0]" = "1"
++		end
++		device ref pcie_rp3 on
++			# WLAN
++		end
++		device ref pcie_rp4 on
++			# LAN
++		end
++		device ref pcie_rp6 on
++			# Card reader
++		end
++	end
++end
+-- 
+2.39.5
+
diff --git a/config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch b/config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
new file mode 100644
index 00000000..6e7d4b7c
--- /dev/null
+++ b/config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
@@ -0,0 +1,30 @@
+From b3049cfd11aa0f3c124ed8f87e98a200201ecbdc Mon Sep 17 00:00:00 2001
+From: Mate Kukri <km@mkukri.xyz>
+Date: Fri, 22 Nov 2024 21:26:48 +0000
+Subject: [PATCH 3/8] soc/intel/skylake: Enable 4E/4F PNP I/O ports in
+ bootblock
+
+Change-Id: I57c9d8a9513a268e2ca6a0abd1306cd038598173
+Signed-off-by: Mate Kukri <km@mkukri.xyz>
+---
+ src/soc/intel/skylake/bootblock/pch.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c
+index df00bb85a9..beaece960b 100644
+--- a/src/soc/intel/skylake/bootblock/pch.c
++++ b/src/soc/intel/skylake/bootblock/pch.c
+@@ -100,8 +100,8 @@ static void soc_config_pwrmbase(void)
+ 
+ void pch_early_iorange_init(void)
+ {
+-	uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 |
+-			LPC_IOE_EC_62_66;
++	uint16_t io_enables = LPC_IOE_EC_4E_4F | LPC_IOE_SUPERIO_2E_2F |
++			LPC_IOE_KBC_60_64 | LPC_IOE_EC_62_66;
+ 
+ 	const config_t *config = config_of_soc();
+ 
+-- 
+2.39.5
+
diff --git a/config/coreboot/next/patches/0004-mb-lenovo-Add-ThinkPad-T480.patch b/config/coreboot/next/patches/0004-mb-lenovo-Add-ThinkPad-T480.patch
new file mode 100644
index 00000000..115635f1
--- /dev/null
+++ b/config/coreboot/next/patches/0004-mb-lenovo-Add-ThinkPad-T480.patch
@@ -0,0 +1,1175 @@
+From c4efef17d76623916f69de0bdaf24565e02f8e3e Mon Sep 17 00:00:00 2001
+From: Mate Kukri <kukri.mate@gmail.com>
+Date: Sat, 30 Nov 2024 19:44:36 +0000
+Subject: [PATCH 4/8] mb/lenovo: Add ThinkPad T480
+
+This machine has BootGuard fused and requires deguard to boot coreboot.
+
+Works:
+- Internal screen with VGA ROM executed by SeaBIOS
+- Intel iGPU
+- Nvidia dGPU (on some models)
+- Ethernet
+- USB
+- EC
+  + Fan control
+  + Keyboard
+  + Both batteries
+  + Charging via both Type-C ports
+  + Debug UART
+- WLAN card:
+  + WiFi works
+  + Bluetooth works
+- M.2 main SSD
+- Speakers, headphone jack
+- S3 sleep
+
+Known issues:
+- libgfxinit does not work
+- VGA ROM executed by coreboot does not work
+- Alpine Ridge Thunderbolt 3 controller does not work
+- Missing HDA verbs, audio still works
+- Missing VBT
+- Function keys are handled differently from stock firmware
+  + These should inject XF86 keycodes instead of directly
+    controlling, volume, brightness, etc in hardware.
+
+Untested (should work):
+- SATA main SSD
+- WWAN slot
+  + PCIe x2 NVME drive
+  + WWAN card (bus)
+- SD reader (USB)
+- Webcam (USB)
+- External video outputs
+
+Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
+Change-Id: I19d421412c771c1f242f6ff39453f824fa866163
+---
+ src/ec/lenovo/h8/bluetooth.c                  |  12 +-
+ src/ec/lenovo/h8/wwan.c                       |  12 +-
+ src/mainboard/lenovo/sklkbl_thinkpad/Kconfig  |  29 ++-
+ .../lenovo/sklkbl_thinkpad/Kconfig.name       |   3 +
+ .../lenovo/sklkbl_thinkpad/Makefile.mk        |   8 +-
+ .../lenovo/sklkbl_thinkpad/acpi/ec.asl        |  13 +-
+ .../lenovo/sklkbl_thinkpad/bootblock.c        |  50 +++++
+ .../lenovo/sklkbl_thinkpad/devicetree.cb      |  36 ++++
+ src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl |   5 +
+ src/mainboard/lenovo/sklkbl_thinkpad/ec.c     | 151 +++++++++++++
+ src/mainboard/lenovo/sklkbl_thinkpad/ec.h     |  94 ++++++++
+ src/mainboard/lenovo/sklkbl_thinkpad/gpio.h   |   8 +
+ .../lenovo/sklkbl_thinkpad/ramstage.c         |  96 ++++++++-
+ .../lenovo/sklkbl_thinkpad/romstage.c         |  24 +++
+ .../variants/t480/gma-mainboard.ads           |  15 ++
+ .../sklkbl_thinkpad/variants/t480/gpio.c      | 203 ++++++++++++++++++
+ .../sklkbl_thinkpad/variants/t480/hda_verb.c  |  10 +
+ .../variants/t480/overridetree.cb             | 114 ++++++++++
+ 18 files changed, 860 insertions(+), 23 deletions(-)
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ec.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ec.h
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/gpio.h
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
+
+diff --git a/src/ec/lenovo/h8/bluetooth.c b/src/ec/lenovo/h8/bluetooth.c
+index 16fc8dce39..ef4f6ad1f5 100644
+--- a/src/ec/lenovo/h8/bluetooth.c
++++ b/src/ec/lenovo/h8/bluetooth.c
+@@ -1,6 +1,6 @@
+ /* SPDX-License-Identifier: GPL-2.0-only */
+ 
+-#include <southbridge/intel/common/gpio.h>
++// #include <southbridge/intel/common/gpio.h>
+ #include <console/console.h>
+ #include <device/device.h>
+ #include <ec/acpi/ec.h>
+@@ -28,16 +28,16 @@ bool h8_has_bdc(const struct device *dev)
+ {
+ 	struct ec_lenovo_h8_config *conf = dev->chip_info;
+ 
+-	if (!conf->has_bdc_detection) {
++	if (1 || !conf->has_bdc_detection) {
+ 		printk(BIOS_INFO, "H8: BDC detection not implemented. "
+ 				  "Assuming BDC installed\n");
+ 		return true;
+ 	}
+ 
+-	if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) {
+-		printk(BIOS_INFO, "H8: BDC installed\n");
+-		return true;
+-	}
++	// if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) {
++	// 	printk(BIOS_INFO, "H8: BDC installed\n");
++	// 	return true;
++	// }
+ 
+ 	printk(BIOS_INFO, "H8: BDC not installed\n");
+ 	return false;
+diff --git a/src/ec/lenovo/h8/wwan.c b/src/ec/lenovo/h8/wwan.c
+index 685886fcce..5e0ae030e2 100644
+--- a/src/ec/lenovo/h8/wwan.c
++++ b/src/ec/lenovo/h8/wwan.c
+@@ -1,6 +1,6 @@
+ /* SPDX-License-Identifier: GPL-2.0-only */
+ 
+-#include <southbridge/intel/common/gpio.h>
++// #include <southbridge/intel/common/gpio.h>
+ #include <console/console.h>
+ #include <device/device.h>
+ #include <ec/acpi/ec.h>
+@@ -26,16 +26,16 @@ bool h8_has_wwan(const struct device *dev)
+ {
+ 	struct ec_lenovo_h8_config *conf = dev->chip_info;
+ 
+-	if (!conf->has_wwan_detection) {
++	if (1 || !conf->has_wwan_detection) {
+ 		printk(BIOS_INFO, "H8: WWAN detection not implemented. "
+ 				  "Assuming WWAN installed\n");
+ 		return true;
+ 	}
+ 
+-	if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) {
+-		printk(BIOS_INFO, "H8: WWAN installed\n");
+-		return true;
+-	}
++	// if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) {
++	// 	printk(BIOS_INFO, "H8: WWAN installed\n");
++	// 	return true;
++	// }
+ 
+ 	printk(BIOS_INFO, "H8: WWAN not installed\n");
+ 	return false;
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
+index fcc80dffe3..08273c5d27 100644
+--- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
+@@ -2,16 +2,19 @@
+ 
+ config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
+ 	bool
+-	select BOARD_ROMSIZE_KB_12288
++	select EC_LENOVO_H8
++	select EC_LENOVO_PMH7
++	select H8_HAS_BAT_THRESHOLDS_IMPL
++	select H8_HAS_LEDLOGO
++	select H8_HAS_PRIMARY_FN_KEYS
+ 	select HAVE_ACPI_RESUME
+ 	select HAVE_ACPI_TABLES
+ #	select HAVE_CMOS_DEFAULT
+ #	select INTEL_GMA_HAVE_VBT
+-	select INTEL_LPSS_UART_FOR_CONSOLE
++	select INTEL_INT15
+ 	select MAINBOARD_HAS_LIBGFXINIT
+ 	select MEMORY_MAPPED_TPM
+ 	select MAINBOARD_HAS_TPM2
+-	select NO_UART_ON_SUPERIO
+ 	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
+ 	select SPD_READ_BY_WORD
+ 	select SYSTEM_TYPE_LAPTOP
+@@ -19,8 +22,16 @@ config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
+ config BOARD_LENOVO_E460
+ 	bool
+ 	select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
++	select BOARD_ROMSIZE_KB_12288
++	select INTEL_LPSS_UART_FOR_CONSOLE
+ 	select SOC_INTEL_SKYLAKE
+ 
++config BOARD_LENOVO_T480
++	bool
++	select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
++	select BOARD_ROMSIZE_KB_16384
++	select SOC_INTEL_KABYLAKE
++
+ if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
+ 
+ config MAINBOARD_DIR
+@@ -28,19 +39,29 @@ config MAINBOARD_DIR
+ 
+ config VARIANT_DIR
+ 	default "e460" if BOARD_LENOVO_E460
++	default "t480" if BOARD_LENOVO_T480
++
++config OVERRIDE_DEVICETREE
++	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+ 
+ config MAINBOARD_PART_NUMBER
+ 	default "E460" if BOARD_LENOVO_E460
++	default "T480" if BOARD_LENOVO_T480
+ 
+ config CBFS_SIZE
+ 	default 0x600000 if BOARD_LENOVO_E460
++	default 0x900000 if BOARD_LENOVO_T480
+ 
+ config DIMM_MAX
+-	default 4
++	default 2
+ 
+ config DIMM_SPD_SIZE
+ 	default 256
+ 
++endif
++
++if BOARD_LENOVO_E460
++
+ config UART_FOR_CONSOLE
+ 	default 2
+ 
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
+index 61d971fe8d..7b813be284 100644
+--- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
+@@ -2,3 +2,6 @@
+ 
+ config BOARD_LENOVO_E460
+ 	bool "ThinkPad E460"
++
++config BOARD_LENOVO_T480
++	bool "ThinkPad T480"
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
+index 6e544fd6b9..348e3d4582 100644
+--- a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
+@@ -1,7 +1,9 @@
+ ## SPDX-License-Identifier: GPL-2.0-only
+ 
+-bootblock-y += bootblock.c
++bootblock-y += bootblock.c ec.c
+ 
+-ramstage-y += ramstage.c
+-ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
++romstage-y += romstage.c
++
++ramstage-y += ramstage.c ec.c
++ramstage-y += variants/$(VARIANT_DIR)/gpio.c variants/$(VARIANT_DIR)/hda_verb.c
+ ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
+index 16990d45f4..514b95a60f 100644
+--- a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
+@@ -1,3 +1,12 @@
+-/* SPDX-License-Identifier: CC-PDDC */
++/* SPDX-License-Identifier: GPL-2.0-only */
+ 
+-/* Please update the license if adding licensable material. */
++#define BRIGHTNESS_UP()
++#define BRIGHTNESS_DOWN()
++#define THINKPAD_EC_GPE 22
++
++Name(\TCRT, 100)
++Name(\TPSV, 90)
++Name(\FLVL, 0)
++
++#include <ec/lenovo/h8/acpi/ec.asl>
++#include <ec/lenovo/h8/acpi/thinkpad_bat_thresholds_b0.asl>
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
+index ccd8ec1b40..55afd3d048 100644
+--- a/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
+@@ -1,7 +1,57 @@
+ /* SPDX-License-Identifier: GPL-2.0-only */
+ 
++#include <arch/io.h>
+ #include <bootblock_common.h>
++#include <device/pci.h>
++#include <soc/pci_devs.h>
++#include "ec.h"
++
++static void configure_uart(uint16_t port, uint16_t iobase, uint8_t irqno)
++{
++	microchip_pnp_enter_conf_state(port);
++
++	// Select LPC I/F LDN
++	pnp_write(port, PNP_LDN_SELECT, LDN_LPCIF);
++	// Write UART BAR
++	pnp_write_le32(port, LPCIF_BAR_UART, (uint32_t) iobase << 16 | 0x8707);
++	// Set SIRQ4 to UART
++	pnp_write(port, LPCIF_SIRQ(irqno), LDN_UART);
++
++	// Configure UART LDN
++	pnp_write(port, PNP_LDN_SELECT, LDN_UART);
++	pnp_write(port, UART_ACTIVATE, 0x01);
++	pnp_write(port, UART_CONFIG_SELECT, 0x00);
++
++	microchip_pnp_exit_conf_state(port);
++
++	// NOTE: this is incredibly hacky and uses a debug backdoor in the EC
++	// firmware to control the UART GPIOs.
++	// Unfortunately production EC firmware has no way to do this via regular EC
++	// commands.
++
++	// Supply debug unlock key
++	debug_write_key(DEBUG_RW_KEY_IDX, debug_rw_key);
++
++	// Use debug writes to set UART_TX and UART_RX GPIOs
++	debug_write_dword(0xf0c400 + 0x110, 0x00001000);
++	debug_write_dword(0xf0c400 + 0x114, 0x00001000);
++}
++
++
++#define UART_PORT	0x3f8
++#define UART_IRQ	4
+ 
+ void bootblock_mainboard_early_init(void)
+ {
++	// Tell EC via BIOS Debug Port 1 that the world isn't on fire
++
++	// Let the EC know that BIOS code is running
++	outb(0x11, 0x86);
++	outb(0x6e, 0x86);
++
++	// Enable accesses to EC1 interface
++	ec0_write(0, ec0_read(0) | 0x20);
++
++	// Setup debug UART
++	configure_uart(EC_CFG_PORT, UART_PORT, UART_IRQ);
+ }
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
+index ddb6e8aaa5..745af8c8cd 100644
+--- a/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
+@@ -8,6 +8,42 @@ chip soc/intel/skylake
+ 		device ref south_xhci on end
+ 		device ref lpc_espi on
+ 			register "serirq_mode" = "SERIRQ_CONTINUOUS"
++
++			register "gen1_dec" = "0x007c1601"
++			register "gen2_dec" = "0x000c15e1"
++
++			chip ec/lenovo/pmh7
++				register "backlight_enable" = "true"
++				register "dock_event_enable" = "true"
++				device pnp ff.1 on end # dummy
++			end
++
++			chip ec/lenovo/h8
++				register "beepmask0" = "0x00"
++				register "beepmask1" = "0x86"
++				register "config0" = "0xa6"
++				register "config1" = "0x0d"
++				register "config2" = "0xa8"
++				register "config3" = "0xc4"
++				register "has_keyboard_backlight" = "1"
++				register "event2_enable" = "0xff"
++				register "event3_enable" = "0xff"
++				register "event4_enable" = "0xd0"
++				register "event5_enable" = "0x3c"
++				register "event7_enable" = "0x01"
++				register "event8_enable" = "0x7b"
++				register "event9_enable" = "0xff"
++				register "eventc_enable" = "0xff"
++				register "eventd_enable" = "0xff"
++				register "evente_enable" = "0x9d"
++				device pnp ff.2 on # dummy
++					io 0x60 = 0x62
++					io 0x62 = 0x66
++					io 0x64 = 0x1600
++					io 0x66 = 0x1604
++				end
++			end
++
+ 			chip drivers/pc80/tpm
+ 				device pnp 0c31.0 on end
+ 			end
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
+index 967b652853..e8dc4cbae2 100644
+--- a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
+@@ -1,5 +1,10 @@
+ /* SPDX-License-Identifier: GPL-2.0-only */
+ 
++#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
++#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
++#define EC_LENOVO_H8_ME_WORKAROUND 1
++#define THINKPAD_EC_GPE 17
++
+ #include <acpi/acpi.h>
+ DefinitionBlock(
+ 	"dsdt.aml",
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ec.c b/src/mainboard/lenovo/sklkbl_thinkpad/ec.c
+new file mode 100644
+index 0000000000..47449eabd6
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/ec.c
+@@ -0,0 +1,151 @@
++#include <arch/io.h>
++#include "ec.h"
++
++#define MICROCHIP_CONFIGURATION_ENTRY_KEY	0x55
++#define MICROCHIP_CONFIGURATION_EXIT_KEY	0xaa
++
++void microchip_pnp_enter_conf_state(uint16_t port)
++{
++	outb(MICROCHIP_CONFIGURATION_ENTRY_KEY, port);
++}
++
++void microchip_pnp_exit_conf_state(uint16_t port)
++{
++	outb(MICROCHIP_CONFIGURATION_EXIT_KEY, port);
++}
++
++uint8_t pnp_read(uint16_t port, uint8_t index)
++{
++	outb(index, port);
++	return inb(port + 1);
++}
++
++uint32_t pnp_read_le32(uint16_t port, uint8_t index)
++{
++	return (uint32_t) pnp_read(port, index) |
++			(uint32_t) pnp_read(port, index + 1) << 8 |
++			(uint32_t) pnp_read(port, index + 2) << 16 |
++			(uint32_t) pnp_read(port, index + 3) << 24;
++}
++
++void pnp_write(uint16_t port, uint8_t index, uint8_t value)
++{
++	outb(index, port);
++	outb(value, port + 1);
++}
++
++void pnp_write_le32(uint16_t port, uint8_t index, uint32_t value)
++{
++	pnp_write(port, index, value & 0xff);
++	pnp_write(port, index + 1, value >> 8 & 0xff);
++	pnp_write(port, index + 2, value >> 16 & 0xff);
++	pnp_write(port, index + 3, value >> 24 & 0xff);
++}
++
++static void ecN_clear_out_queue(uint16_t cmd_port, uint16_t data_port)
++{
++	while (inb(cmd_port) & EC_OBF)
++		inb(data_port);
++}
++
++static void ecN_wait_to_send(uint16_t cmd_port, uint16_t data_port)
++{
++	while (inb(cmd_port) & EC_IBF)
++		;
++}
++
++static void ecN_wait_to_recv(uint16_t cmd_port, uint16_t data_port)
++{
++	while (!(inb(cmd_port) & EC_OBF))
++		;
++}
++
++uint8_t ecN_read(uint16_t cmd_port, uint16_t data_port, uint8_t addr)
++{
++	ecN_clear_out_queue(cmd_port, data_port);
++	ecN_wait_to_send(cmd_port, data_port);
++	outb(EC_READ, cmd_port);
++	ecN_wait_to_send(cmd_port, data_port);
++	outb(addr, data_port);
++	ecN_wait_to_recv(cmd_port, data_port);
++	return inb(data_port);
++}
++
++void ecN_write(uint16_t cmd_port, uint16_t data_port, uint8_t addr, uint8_t val)
++{
++	ecN_clear_out_queue(cmd_port, data_port);
++	ecN_wait_to_send(cmd_port, data_port);
++	outb(EC_WRITE, cmd_port);
++	ecN_wait_to_send(cmd_port, data_port);
++	outb(addr, data_port);
++	ecN_wait_to_send(cmd_port, data_port);
++	outb(val, data_port);
++}
++
++uint8_t eeprom_read(uint16_t addr)
++{
++	ecN_clear_out_queue(EC2_CMD, EC2_DATA);
++	ecN_wait_to_send(EC2_CMD, EC2_DATA);
++	outl(1, EC2_CMD);
++	ecN_wait_to_send(EC2_CMD, EC2_DATA);
++	outl(addr, EC2_DATA);
++	ecN_wait_to_recv(EC2_CMD, EC2_DATA);
++	return inl(EC2_DATA);
++}
++
++void eeprom_write(uint16_t addr, uint8_t val)
++{
++	ecN_clear_out_queue(EC2_CMD, EC2_DATA);
++	ecN_wait_to_send(EC2_CMD, EC2_DATA);
++	outl(2, EC2_CMD);
++	ecN_wait_to_send(EC2_CMD, EC2_DATA);
++	outl((uint32_t) addr | (uint32_t) val << 16, EC2_DATA);
++	ecN_wait_to_recv(EC2_CMD, EC2_DATA);
++	inl(EC2_DATA);
++}
++
++uint16_t debug_loaded_keys(void)
++{
++	return (uint16_t) ec0_read(0x87) << 8 | (uint16_t) ec0_read(0x86);
++}
++
++static void debug_cmd(uint8_t cmd)
++{
++	ec0_write(EC_DEBUG_CMD, cmd);
++	while (ec0_read(EC_DEBUG_CMD) & 0x80)
++		;
++}
++
++void debug_read_key(uint8_t i, uint8_t *key)
++{
++	debug_cmd(0x80 | (i & 0xf));
++	for (int j = 0; j < 8; ++j)
++		key[j] = ec0_read(0x3e + j);
++}
++
++void debug_write_key(uint8_t i, const uint8_t *key)
++{
++	for (int j = 0; j < 8; ++j)
++		ec0_write(0x3e + j, key[j]);
++	debug_cmd(0xc0 |  (i & 0xf));
++}
++
++uint32_t debug_read_dword(uint32_t addr)
++{
++	ecN_clear_out_queue(EC3_CMD, EC3_DATA);
++	ecN_wait_to_send(EC3_CMD, EC3_DATA);
++	outl(addr << 8 | 0xE2, EC3_DATA);
++	ecN_wait_to_recv(EC3_CMD, EC3_DATA);
++	return inl(EC3_DATA);
++}
++
++void debug_write_dword(uint32_t addr, uint32_t val)
++{
++	ecN_clear_out_queue(EC3_CMD, EC3_DATA);
++	ecN_wait_to_send(EC3_CMD, EC3_DATA);
++	outl(addr << 8 | 0xEA, EC3_DATA);
++	ecN_wait_to_send(EC3_CMD, EC3_DATA);
++	outl(val, EC3_DATA);
++}
++
++const uint8_t debug_rw_key[8] = { 0x7a, 0x41, 0xb1, 0x49, 0xfe, 0x21, 0x01, 0xcf };
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ec.h b/src/mainboard/lenovo/sklkbl_thinkpad/ec.h
+new file mode 100644
+index 0000000000..aa5582f30b
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/ec.h
+@@ -0,0 +1,94 @@
++#pragma once
++
++// EC configuration base address
++#define EC_CFG_PORT		0x4e
++
++// Chip global registers
++#define PNP_LDN_SELECT		0x07
++# define LDN_UART		0x07
++# define LDN_LPCIF		0x0c
++#define EC_DEVICE_ID		0x20
++#define EC_DEVICE_REV		0x21
++
++// LPC I/F registers
++#define LPCIF_SIRQ(i)		(0x40 + (i))
++
++#define LPCIF_BAR_CFG		0x60
++#define LPCIF_BAR_MAILBOX	0x64
++#define LPCIF_BAR_8042		0x68
++#define LPCIF_BAR_ACPI_EC0	0x6c
++#define LPCIF_BAR_ACPI_EC1	0x70
++#define LPCIF_BAR_ACPI_EC2	0x74
++#define LPCIF_BAR_ACPI_EC3	0x78
++#define LPCIF_BAR_ACPI_PM0	0x7c
++#define LPCIF_BAR_UART		0x80
++#define LPCIF_BAR_FAST_KYBD	0x84
++#define LPCIF_BAR_EMBED_FLASH	0x88
++#define LPCIF_BAR_GP_SPI	0x8c
++#define LPCIF_BAR_EMI		0x90
++#define LPCIF_BAR_PMH7		0x94
++#define LPCIF_BAR_PORT80_DBG0	0x98
++#define LPCIF_BAR_PORT80_DBG1	0x9c
++#define LPCIF_BAR_RTC		0xa0
++
++// UART registers
++#define UART_ACTIVATE		0x30
++#define UART_CONFIG_SELECT	0xf0
++
++void microchip_pnp_enter_conf_state(uint16_t port);
++void microchip_pnp_exit_conf_state(uint16_t port);
++uint8_t pnp_read(uint16_t port, uint8_t index);
++uint32_t pnp_read_le32(uint16_t port, uint8_t index);
++void pnp_write(uint16_t port, uint8_t index, uint8_t value);
++void pnp_write_le32(uint16_t port, uint8_t index, uint32_t value);
++
++#define EC0_CMD		0x0066
++#define EC0_DATA	0x0062
++#define EC1_CMD		0x1604
++#define EC1_DATA	0x1600
++#define EC2_CMD		0x1634
++#define EC2_DATA	0x1630
++#define EC3_CMD		0x161c
++#define EC3_DATA	0x1618
++
++#define EC_OBF		(1 << 0)
++#define EC_IBF		(1 << 1)
++
++#define EC_READ		0x80
++#define EC_WRITE	0x81
++
++uint8_t ecN_read(uint16_t cmd_port, uint16_t data_port, uint8_t addr);
++
++void ecN_write(uint16_t cmd_port, uint16_t data_port, uint8_t addr, uint8_t val);
++
++// EC0 and EC1 mostly are useful with the READ/WRITE commands
++#define ec0_read(addr) ecN_read(EC0_CMD, EC0_DATA, addr)
++#define ec0_write(addr, val) ecN_write(EC0_CMD, EC0_DATA, addr, val)
++#define ec1_read(addr) ecN_read(EC1_CMD, EC1_DATA, addr)
++#define ec1_write(addr, val) ecN_write(EC1_CMD, EC1_DATA, addr, val)
++
++// Read from the emulated EEPROM
++uint8_t eeprom_read(uint16_t addr);
++
++// Write to the emulated EEPROM
++void eeprom_write(uint16_t addr, uint8_t val);
++
++// Read loaded debug key mask
++uint16_t debug_loaded_keys(void);
++
++// The following location (via either EC0 or EC1) can be used to interact with the debug interface
++#define EC_DEBUG_CMD 0x3d
++
++void debug_read_key(uint8_t i, uint8_t *key);
++
++void debug_write_key(uint8_t i, const uint8_t *key);
++
++uint32_t debug_read_dword(uint32_t addr);
++
++void debug_write_dword(uint32_t addr, uint32_t val);
++
++// RW unlock key index
++#define DEBUG_RW_KEY_IDX 1
++
++// RW unlock key for EC version N24HT37W
++extern const uint8_t debug_rw_key[8];
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/gpio.h b/src/mainboard/lenovo/sklkbl_thinkpad/gpio.h
+new file mode 100644
+index 0000000000..d89ed712d4
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/gpio.h
+@@ -0,0 +1,8 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#ifndef GPIO_H
++#define GPIO_H
++
++void variant_config_gpios(void);
++
++#endif
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
+index 6c3b077cc4..9526642c57 100644
+--- a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
+@@ -1,11 +1,103 @@
+ /* SPDX-License-Identifier: GPL-2.0-only */
+ 
++#include <arch/io.h>
+ #include <device/device.h>
++#include <drivers/intel/gma/int15.h>
++#include <option.h>
++#include <soc/ramstage.h>
++#include "ec.h"
++#include "gpio.h"
+ 
+-static void init_mainboard(void *chip_info)
++#define GPIO_GPU_RST		GPP_E22 // active low
++#define GPIO_1R8VIDEO_AON_ON	GPP_E23
++
++#define GPIO_DGFX_PWRGD		GPP_F3
++
++#define GPIO_DISCRETE_PRESENCE	GPP_D9	// active low
++#define GPIO_DGFX_VRAM_ID0	GPP_D11
++#define GPIO_DGFX_VRAM_ID1	GPP_D12
++
++void mainboard_silicon_init_params(FSP_SIL_UPD *params)
++{
++	static const char *dgfx_vram_id_str[] = { "1GB", "2GB", "4GB", "N/A" };
++
++	int dgfx_vram_id;
++
++	// Setup GPIOs
++	variant_config_gpios();
++
++	// Detect and enable dGPU
++	if (gpio_get(GPIO_DISCRETE_PRESENCE) == 0) { // active low
++		dgfx_vram_id = gpio_get(GPIO_DGFX_VRAM_ID0) | gpio_get(GPIO_DGFX_VRAM_ID1) << 1;
++		printk(BIOS_DEBUG, "Discrete GPU present with %s VRAM\n", dgfx_vram_id_str[dgfx_vram_id]);
++
++		if (get_uint_option("dgpu_enable", 1)) {
++			printk(BIOS_DEBUG, "Enabling discrete GPU\n");
++			// NOTE: i pulled this GPU enable sequence from thin air but it seems to work
++			gpio_set(GPIO_1R8VIDEO_AON_ON, 1);	// Enable GPU power rail
++			while (!gpio_get(GPIO_DGFX_PWRGD))	// Wait for power good signal from GPU
++				;
++			gpio_set(GPIO_GPU_RST, 1);		// Release GPU from reset
++		} else {
++			printk(BIOS_DEBUG, "Discrete GPU will remain disabled\n");
++		}
++
++	} else {
++		printk(BIOS_DEBUG, "Discrete GPU not present\n");
++	}
++}
++
++static void dump_ec_cfg(uint16_t port)
++{
++	microchip_pnp_enter_conf_state(port);
++
++	// Device info
++	printk(BIOS_DEBUG, "Device id  %02x\n", pnp_read(port, EC_DEVICE_ID));
++	printk(BIOS_DEBUG, "Device rev %02x\n", pnp_read(port, EC_DEVICE_REV));
++
++	// Switch to LPCIF LDN
++	pnp_write(port, PNP_LDN_SELECT, LDN_LPCIF);
++
++	// Dump SIRQs
++	for (int i = 0; i <= 15; i += 1)
++		printk(BIOS_DEBUG, "SIRQ%d = %02x\n", i, pnp_read(port, LPCIF_SIRQ(i)));
++
++	// Dump BARs
++	printk(BIOS_DEBUG, "BAR CFG = %08x\n", pnp_read_le32(port, LPCIF_BAR_CFG));
++	printk(BIOS_DEBUG, "BAR MAILBOX = %08x\n", pnp_read_le32(port, LPCIF_BAR_MAILBOX));
++	printk(BIOS_DEBUG, "BAR 8042 = %08x\n", pnp_read_le32(port, LPCIF_BAR_8042));
++	printk(BIOS_DEBUG, "BAR ACPI_EC0 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_EC0));
++	printk(BIOS_DEBUG, "BAR ACPI_EC1 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_EC1));
++	printk(BIOS_DEBUG, "BAR ACPI_EC2 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_EC2));
++	printk(BIOS_DEBUG, "BAR ACPI_EC3 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_EC3));
++	printk(BIOS_DEBUG, "BAR ACPI_PM0 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_PM0));
++	printk(BIOS_DEBUG, "BAR UART = %08x\n", pnp_read_le32(port, LPCIF_BAR_UART));
++	printk(BIOS_DEBUG, "BAR FAST_KYBD = %08x\n", pnp_read_le32(port, LPCIF_BAR_FAST_KYBD));
++	printk(BIOS_DEBUG, "BAR EMBED_FLASH = %08x\n", pnp_read_le32(port, LPCIF_BAR_EMBED_FLASH));
++	printk(BIOS_DEBUG, "BAR GP_SPI = %08x\n", pnp_read_le32(port, LPCIF_BAR_GP_SPI));
++	printk(BIOS_DEBUG, "BAR EMI = %08x\n", pnp_read_le32(port, LPCIF_BAR_EMI));
++	printk(BIOS_DEBUG, "BAR PMH7 = %08x\n", pnp_read_le32(port, LPCIF_BAR_PMH7));
++	printk(BIOS_DEBUG, "BAR PORT80_DBG0 = %08x\n", pnp_read_le32(port, LPCIF_BAR_PORT80_DBG0));
++	printk(BIOS_DEBUG, "BAR PORT80_DBG1 = %08x\n", pnp_read_le32(port, LPCIF_BAR_PORT80_DBG1));
++	printk(BIOS_DEBUG, "BAR RTC = %08x\n", pnp_read_le32(port, LPCIF_BAR_RTC));
++
++	microchip_pnp_exit_conf_state(port);
++}
++
++static void mainboard_enable(struct device *dev)
++{
++	if (CONFIG(VGA_ROM_RUN))
++		install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP,
++						GMA_INT15_PANEL_FIT_DEFAULT,
++						GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
++}
++
++static void mainboard_init(void *chip_info)
+ {
++	dump_ec_cfg(EC_CFG_PORT);
+ }
+ 
+ struct chip_operations mainboard_ops = {
+-	.init = init_mainboard,
++	.enable_dev = mainboard_enable,
++	.init = mainboard_init,
+ };
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
+index 59a62f484e..4cc0591b4f 100644
+--- a/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
+@@ -1,7 +1,31 @@
+ /* SPDX-License-Identifier: GPL-2.0-only */
+ 
+ #include <soc/romstage.h>
++#include <spd_bin.h>
++
++// FIXME: verify SPD addrs, DQ interleave, and CA vref for other SKL/KBL ThinkPads
+ 
+ void mainboard_memory_init_params(FSPM_UPD *mupd)
+ {
++	/* T480
++	 *  JDDR1 - 0x50
++	 *  JDDR2 - 0x51 */
++	struct spd_block blk = { .addr_map = { 0x50, 0x51, } };
++	get_spd_smbus(&blk);
++	dump_spd_info(&blk);
++
++	FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig;
++
++	/* T480 (DDR_DQ pins wired in interleave mode) */
++	mem_cfg->DqPinsInterleaved = true;
++
++	/* T480 (VREF_CA to CH_A and VREF_DQ_B to CH_B)
++	 *  DDR_VREF_CA  -> M_A_VREF_CA_CPU
++	 *  DDR0_VREF_DQ -> NC
++	 *  DDR1_VREF_DQ -> M_B_VREF_CA_CPU */
++	mem_cfg->CaVrefConfig      = 2;
++
++	mem_cfg->MemorySpdDataLen  = blk.len;
++	mem_cfg->MemorySpdPtr00    = (uintptr_t)blk.spd_array[0];
++	mem_cfg->MemorySpdPtr10    = (uintptr_t)blk.spd_array[1];
+ }
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads
+new file mode 100644
+index 0000000000..e0a166fe55
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads
+@@ -0,0 +1,15 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (eDP,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c
+new file mode 100644
+index 0000000000..f7c29e1f39
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c
+@@ -0,0 +1,203 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <soc/gpio.h>
++#include "../../gpio.h"
++
++/* FIXME: There are multiple GPIOs here that should be locked to prevent "TPM GPIO fail" style
++ * attacks. Unfortunately SKL/KBL GPIO locking *does not* work currently. */
++
++static const struct pad_config gpio_table[] = {
++
++	/* ------- GPIO Community 0 ------- */
++
++	/* ------- GPIO Group GPP_A ------- */
++	PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),				/* -KBRC */
++	PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),				/* LPC_AD0 */
++	PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),				/* LPC_AD1 */
++	PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),				/* LPC_AD2 */
++	PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),				/* LPC_AD3 */
++	PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),				/* -LPC_FRAME */
++	PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),				/* IRQSER */
++	PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1),				/* -TPM_IRQ */
++	PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),				/* -CLKRUN */
++	PAD_CFG_NF(GPP_A9, NATIVE, DEEP, NF1),				/* LPCCLK_EC_24M */
++	PAD_CFG_NF(GPP_A10, NATIVE, DEEP, NF1),				/* LPCCLK_DEBUG_24M */
++	PAD_NC(GPP_A11, NONE),
++	PAD_NC(GPP_A12, NONE),
++	PAD_CFG_NF(GPP_A13, NATIVE, DEEP, NF1),				/* -SUSWARN */
++	PAD_CFG_NF(GPP_A14, NATIVE, DEEP, NF1),				/* -SUS_STAT */
++	PAD_CFG_NF(GPP_A15, NATIVE, DEEP, NF1),				/* -SUSWARN */
++	PAD_NC(GPP_A16, NONE),
++	PAD_NC(GPP_A17, NONE),
++	PAD_NC(GPP_A18, NONE),
++	PAD_NC(GPP_A19, NONE),
++	PAD_NC(GPP_A20, NONE),
++	PAD_NC(GPP_A21, NONE),
++	PAD_NC(GPP_A22, NONE),
++	PAD_NC(GPP_A23, NONE),
++
++	/* ------- GPIO Group GPP_B ------- */
++	PAD_NC(GPP_B0, NONE),
++	PAD_NC(GPP_B1, NONE),
++	PAD_NC(GPP_B2, NONE),
++	PAD_NC(GPP_B3, NONE),
++	PAD_CFG_GPI_SCI(GPP_B4, NONE, DEEP, EDGE_SINGLE, INVERT),	/* -TBT_PLUG_EVENT */
++	PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),				/* -CLKREQ_PCIE0 */
++	PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1),				/* -CLKREQ_PCIE4 */
++	PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1),				/* -CLKREQ_PCIE5 */
++	PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1),				/* -CLKREQ_PCIE6 */
++	PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),				/* -CLKREQ_PCIE8 */
++	PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),				/* -CLKREQ_PCIE10 */
++	PAD_NC(GPP_B11, NONE),
++	PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),				/* -PCH_SLP_S0 */
++	PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),				/* -PLTRST */
++	PAD_CFG_NF(GPP_B14, NATIVE, DEEP, NF1),				/* PCH_SPKR */
++	PAD_CFG_GPO(GPP_B15, 1, DEEP),					/* NFC_DLREQ */
++	PAD_NC(GPP_B16, NONE),
++	PAD_NC(GPP_B17, NONE),
++	PAD_NC(GPP_B18, NONE),
++	PAD_NC(GPP_B19, NONE),
++	PAD_NC(GPP_B20, NONE),
++	PAD_NC(GPP_B21, NONE),
++	PAD_NC(GPP_B22, NONE),
++	PAD_NC(GPP_B23, NONE),
++
++	/* ------- GPIO Community 1 ------- */
++
++	/* ------- GPIO Group GPP_C ------- */
++	PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),				/* SMB_CLK */
++	PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),				/* SMB_DATA */
++	PAD_NC(GPP_C2, NONE),
++	PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),				/* SML0_CLK */
++	PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),				/* SML0_DATA */
++	PAD_NC(GPP_C5, NONE),
++	PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),				/* EC_SCL2 */
++	PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),				/* EC_SDA2 */
++	PAD_NC(GPP_C8, NONE),
++	PAD_NC(GPP_C9, NONE),
++	PAD_NC(GPP_C10, NONE),
++	PAD_NC(GPP_C11, NONE),
++	PAD_NC(GPP_C12, NONE),
++	PAD_NC(GPP_C13, NONE),
++	PAD_NC(GPP_C14, NONE),
++	PAD_NC(GPP_C15, NONE),
++	PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),				/* I2C0_DATA */
++	PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),				/* I2C0_CLK */
++	PAD_NC(GPP_C18, NONE),
++	PAD_NC(GPP_C19, NONE),
++	PAD_CFG_GPO(GPP_C20, 0, DEEP),					/* EPRIVACY_ON */
++	PAD_CFG_GPO(GPP_C21, 0, DEEP),					/* TBT_FORCE_PWR */
++	PAD_CFG_GPI_SCI(GPP_C22, NONE, DEEP, EDGE_SINGLE, INVERT),	/* -EC_SCI */
++	PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT),	/* -EC_WAKE */
++
++	/* ------- GPIO Group GPP_D ------- */
++	PAD_NC(GPP_D0, NONE),
++	PAD_NC(GPP_D1, NONE),
++	PAD_NC(GPP_D2, NONE),
++	PAD_NC(GPP_D3, NONE),
++	PAD_NC(GPP_D4, NONE),
++	PAD_NC(GPP_D5, NONE),
++	PAD_NC(GPP_D6, NONE),
++	PAD_NC(GPP_D7, NONE),
++	PAD_NC(GPP_D8, NONE),
++	PAD_CFG_GPI_TRIG_OWN(GPP_D9, UP_20K, DEEP, OFF, ACPI),		/* -DISCRETE_PRESENCE */
++	PAD_NC(GPP_D10, NONE),
++	PAD_CFG_GPI_TRIG_OWN(GPP_D11, UP_20K, DEEP, OFF, ACPI),		/* DGFX_VRAM_ID0 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_D12, UP_20K, DEEP, OFF, ACPI),		/* DGFX_VRAM_ID1 */
++	PAD_NC(GPP_D13, NONE),
++	PAD_NC(GPP_D14, NONE),
++	PAD_NC(GPP_D15, NONE),
++	PAD_NC(GPP_D16, NONE),
++	PAD_CFG_GPO(GPP_D17, 0, DEEP),					/* DDI_PRIORITY1 */
++	PAD_NC(GPP_D18, NONE),
++	PAD_NC(GPP_D19, NONE),
++	PAD_NC(GPP_D20, NONE),
++	PAD_NC(GPP_D21, NONE),
++	PAD_CFG_GPI_TRIG_OWN(GPP_D22, UP_20K, DEEP, OFF, ACPI),		/* -NFC_DTCT */
++	PAD_NC(GPP_D23, NONE),
++
++	/* ------- GPIO Group GPP_E ------- */
++	PAD_NC(GPP_E0, NONE),
++	PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1),				/* -WWAN_SATA_DTCT (always HIGH) */
++	PAD_CFG_NF(GPP_E2, NONE, DEEP, NF1),				/* -PE_DTCT */
++	PAD_CFG_GPI_TRIG_OWN(GPP_E3, NONE, DEEP, EDGE_SINGLE, ACPI),	/* -TBT_PLUG_EVENT */
++	PAD_CFG_GPO(GPP_E4, 1, DEEP),					/* NFC_ON */
++	PAD_NC(GPP_E5, NONE),
++	PAD_CFG_NF(GPP_E6, NONE, RSMRST, NF1),				/* SATA2_DEVSLP */
++	PAD_NC(GPP_E7, NONE),
++	PAD_NC(GPP_E8, NONE),
++	PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),				/* -USB_PORT0_OC0 (AON port) */
++	PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1),				/* -USB_PORT1_OC1 (regular port) */
++	PAD_NC(GPP_E11, NONE),
++	PAD_CFG_GPI_APIC_HIGH(GPP_E12, NONE, DEEP),			/* NFC_INT */
++	PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),				/* DDIP1_HPD */
++	PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),				/* DDIP2_HPD */
++	PAD_NC(GPP_E15, NONE),
++	PAD_NC(GPP_E16, NONE),
++	PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),				/* EDP_HPD */
++	PAD_NC(GPP_E18, NONE),
++	PAD_NC(GPP_E19, NONE),
++	PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1),				/* DDIP2_CTRLCLK */
++	PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1),				/* DDIP2_CTRLDATA */
++	PAD_CFG_TERM_GPO(GPP_E22, 0, UP_20K, RSMRST),			/* -GPU_RST */
++	PAD_CFG_TERM_GPO(GPP_E23, 0, UP_20K, RSMRST),			/* 1R8VIDEO_AON_ON */
++
++	/* ------- GPIO Community 2 ------- */
++
++	/* -------- GPIO Group GPD -------- */
++	PAD_CFG_NF(GPD0, NONE, PWROK, NF1),				/* -BATLOW */
++	PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1),				/* AC_PRESENT */
++	PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1),				/* -LANWAKE */
++	PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),				/* -PWRSW_EC */
++	PAD_CFG_NF(GPD4, NONE, PWROK, NF1),				/* -PCH_SLP_S3 */
++	PAD_CFG_NF(GPD5, NONE, PWROK, NF1),				/* -PCH_SLP_S4 */
++	PAD_CFG_NF(GPD6, NONE, PWROK, NF1),				/* -PCH_SLP_M */
++	PAD_NC(GPD7, NONE),
++	PAD_CFG_NF(GPD8, NONE, PWROK, NF1),				/* SUSCLK_32K */
++	PAD_CFG_NF(GPD9, NONE, PWROK, NF1),				/* -PCH_SLP_WLAN */
++	PAD_CFG_NF(GPD10, NONE, PWROK, NF1),				/* -PCH_SLP_S5 */
++	PAD_CFG_NF(GPD11, NONE, PWROK, NF1),				/* LANPHYPC */
++
++	/* ------- GPIO Community 3 ------- */
++
++	/* ------- GPIO Group GPP_F ------- */
++	PAD_NC(GPP_F0, NONE),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F1, NONE, DEEP, OFF, ACPI),		/* GC6_FB_EN */
++	PAD_CFG_GPO(GPP_F2, 1, DEEP),					/* -GPU_EVENT */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F3, NONE, DEEP, OFF, ACPI),		/* DGFX_PWRGD */
++	PAD_CFG_GPO(GPP_F4, 1, DEEP),					/* -WWAN_RESET */
++	PAD_NC(GPP_F5, NONE),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F6, UP_20K, DEEP, OFF, ACPI),		/* -MIC_HW_EN (R961 to GND) */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F7, UP_20K, DEEP, OFF, ACPI),		/* -INT_MIC_DTCT */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F8, UP_20K, DEEP, OFF, ACPI),		/* WWAN_CFG0 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F9, UP_20K, DEEP, OFF, ACPI),		/* WWAN_CFG1 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F10, UP_20K, DEEP, OFF, ACPI),		/* WWAN_CFG2 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F11, UP_20K, DEEP, OFF, ACPI),		/* WWAN_CFG3 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F12, UP_20K, DEEP, OFF, ACPI),		/* PLANARID0 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F13, UP_20K, DEEP, OFF, ACPI),		/* PLANARID1 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F14, UP_20K, DEEP, OFF, ACPI),		/* PLANARID2 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F15, UP_20K, DEEP, OFF, ACPI),		/* PLANARID3 */
++	PAD_NC(GPP_F16, NONE),
++	PAD_NC(GPP_F17, NONE),
++	PAD_NC(GPP_F18, NONE),
++	PAD_NC(GPP_F19, NONE),
++	PAD_NC(GPP_F20, NONE),
++	PAD_NC(GPP_F21, NONE),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F22, UP_20K, DEEP, OFF, ACPI),		/* -INTRUDER_PCH */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F23, UP_20K, DEEP, OFF, ACPI),		/* -SC_DTCT */
++
++	/* ------- GPIO Group GPP_G ------- */
++	PAD_NC(GPP_G0, NONE),
++	PAD_NC(GPP_G1, NONE),
++	PAD_NC(GPP_G2, NONE),
++	PAD_NC(GPP_G3, NONE),
++	PAD_CFG_GPO(GPP_G4, 0, DEEP),					/* TBT_RTD3_PWR_EN */
++	PAD_CFG_GPO(GPP_G5, 0, DEEP),					/* TBT_FORCE_USB_PWR */
++	PAD_CFG_GPO(GPP_G6, 0, DEEP),					/* -TBT_PERST */
++	PAD_CFG_GPI_SCI(GPP_G7, NONE, DEEP, LEVEL, INVERT),		/* -TBT_PCIE_WAKE */
++};
++
++void variant_config_gpios(void)
++{
++	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
++}
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c
+new file mode 100644
+index 0000000000..d9d103f862
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c
+@@ -0,0 +1,10 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++};
++
++const u32 pc_beep_verbs[] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
+new file mode 100644
+index 0000000000..f1f19bc3bf
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
+@@ -0,0 +1,114 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++chip soc/intel/skylake
++        # Power
++        register "PmConfigSlpS3MinAssert" = "2"         # 50ms
++        register "PmConfigSlpS4MinAssert" = "1"         # 1s
++        register "PmConfigSlpSusMinAssert" = "3"        # 500ms
++        register "PmConfigSlpAMinAssert" = "3"          # 2s
++
++	device domain 0 on
++		device ref south_xhci on
++			register "usb2_ports" = "{
++				[0] = USB2_PORT_MID(OC1),		// USB-A
++				[1] = USB2_PORT_MID(OC0),		// USB-A (always on)
++				[2] = USB2_PORT_MID(OC_SKIP),		// JSC-1 (smartcard slot)
++				[3] = USB2_PORT_MID(OC_SKIP),		// USB-C (charging port)
++				[4] = USB2_PORT_MID(OC_SKIP),		// JCAM1 (IR camera)
++				[5] = USB2_PORT_MID(OC_SKIP),		// JWWAN1 (M.2 WWAN USB)
++				[6] = USB2_PORT_MID(OC_SKIP),		// JWLAN1 (M.2 WLAN USB)
++				[7] = USB2_PORT_MID(OC_SKIP),		// JCAM1 (webcam)
++				[8] = USB2_PORT_MID(OC_SKIP),		// JFPR1 (fingerprint reader)
++				[9] = USB2_PORT_MID(OC_SKIP),		// JLCD1 (touch panel)
++			}"
++			register "usb3_ports" = "{
++				[0] = USB3_PORT_DEFAULT(OC1),		// USB-A
++				[1] = USB3_PORT_DEFAULT(OC0),		// USB-A (always on)
++				[2] = USB3_PORT_DEFAULT(OC_SKIP),	// RTS5344S (SD card reader)
++				[3] = USB3_PORT_DEFAULT(OC_SKIP),	// USB-C (charging port)
++			}"
++		end
++
++		device ref sata on
++			# SATA_0  - NC
++			# SATA_1A - NC
++			# SATA_1B - NC
++			# SATA_2  - SATA caddy
++			register "SataPortsEnable[3]" = "1"
++			register "SataPortsDevSlp[3]" = "1"
++		end
++
++		# The PCIe lane routing is a bit convoluted on this board:
++		#
++		# PCIe controller 1 - 1x4
++		#   PCIE 1-4   - RP1  - dGPU - CLKOUT0 - CLKREQ0
++		#
++		# PCIe controller 2 - 2x1+1x2 (lane reversal)
++		#   PCIE 5     - GBE  - GBE  - CLKOUT1 - CLKREQ1 (clobbers RP8)
++		#   PCIE 6     - RP7  - WLAN - CLKOUT2 - CLKREQ2
++		#   PCIE 7-8   - RP5  - WWAN - CLKOUT3 - CLKREQ3
++		#
++		# PCIe controller 3 - 2x2
++		#   PCIE 9-10  - RP9  - TB3  - CLKOUT4 - CLKREQ4
++		#   PCIE 11-12 - RP11 - SSD  - CLKOUT5 - CLKREQ5
++
++		# dGPU - x4
++		device ref pcie_rp1 on
++			register "PcieRpEnable[0]"			= "1"
++			register "PcieRpClkReqSupport[0]"		= "1"
++			register "PcieRpClkReqNumber[0]"		= "0"
++			register "PcieRpClkSrcNumber[0]"		= "0"
++			register "PcieRpAdvancedErrorReporting[0]"	= "1"
++			register "PcieRpLtrEnable[0]"			= "1"
++		end
++
++		# Ethernet (clobbers RP8)
++		device ref gbe on
++			register "LanClkReqSupported"			= "1"
++			register "LanClkReqNumber"			= "1"
++			register "EnableLanLtr"				= "1"
++			register "EnableLanK1Off"			= "1"
++		end
++
++		# M.2 WLAN - x1
++		device ref pcie_rp7 on
++			register "PcieRpEnable[6]"			= "1"
++			register "PcieRpClkReqSupport[6]"		= "1"
++			register "PcieRpClkReqNumber[6]"		= "2"
++			register "PcieRpClkSrcNumber[6]"		= "2"
++			register "PcieRpAdvancedErrorReporting[6]"	= "1"
++			register "PcieRpLtrEnable[6]"			= "1"
++		end
++
++		# M.2 WWAN - x2
++		device ref pcie_rp5 on
++			register "PcieRpEnable[4]"			= "1"
++			register "PcieRpClkReqSupport[4]"		= "1"
++			register "PcieRpClkReqNumber[4]"		= "3"
++			register "PcieRpClkSrcNumber[4]"		= "3"
++			register "PcieRpAdvancedErrorReporting[4]"	= "1"
++			register "PcieRpLtrEnable[4]"			= "1"
++		end
++
++		# TB3 (Alpine Ridge LP) - x2
++		device ref pcie_rp9 on
++			register "PcieRpEnable[8]"			= "1"
++			register "PcieRpClkReqSupport[8]"		= "1"
++			register "PcieRpClkReqNumber[8]"		= "4"
++			register "PcieRpClkSrcNumber[8]"		= "4"
++			register "PcieRpAdvancedErrorReporting[8]"	= "1"
++			register "PcieRpLtrEnable[8]"			= "1"
++			register "PcieRpHotPlug[8]"			= "1"
++		end
++
++		# M.2 caddy - x2
++		device ref pcie_rp11 on
++			register "PcieRpEnable[10]"			= "1"
++			register "PcieRpClkReqSupport[10]"		= "1"
++			register "PcieRpClkReqNumber[10]"		= "5"
++			register "PcieRpClkSrcNumber[10]"		= "5"
++			register "PcieRpAdvancedErrorReporting[10]"	= "1"
++			register "PcieRpLtrEnable[10]"			= "1"
++		end
++	end
++end
+-- 
+2.39.5
+
diff --git a/config/coreboot/next/patches/0002-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch b/config/coreboot/next/patches/0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
similarity index 99%
rename from config/coreboot/next/patches/0002-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
rename to config/coreboot/next/patches/0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
index 7e2ce1f3..fa5ac312 100644
--- a/config/coreboot/next/patches/0002-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
+++ b/config/coreboot/next/patches/0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
@@ -1,7 +1,7 @@
-From 53151be243024957386012a099ccf3858f830555 Mon Sep 17 00:00:00 2001
+From 1e10400616ab16e17980af23c91a8efc633529e8 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 30 Sep 2024 20:44:38 -0400
-Subject: [PATCH 2/5] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
+Subject: [PATCH 5/8] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
 
 Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
diff --git a/config/coreboot/next/patches/0003-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/next/patches/0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
similarity index 91%
rename from config/coreboot/next/patches/0003-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
rename to config/coreboot/next/patches/0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
index afa778a5..39a8e2be 100644
--- a/config/coreboot/next/patches/0003-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ b/config/coreboot/next/patches/0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -1,7 +1,7 @@
-From 50ae904625d6917c68ff8f8f50c280d79842142b Mon Sep 17 00:00:00 2001
+From c900ff6f05ee431c7bf6ab31bc0215faa4ad6971 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 3/5] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 6/8] util/ifdtool: add --nuke flag (all 0xFF on region)
 
 When this option is used, the region's contents are overwritten
 with all ones (0xFF).
@@ -20,10 +20,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 83 insertions(+), 31 deletions(-)
 
 diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index 36477eef66..3ebef74042 100644
+index ace05e2265..ba292fd142 100644
 --- a/util/ifdtool/ifdtool.c
 +++ b/util/ifdtool/ifdtool.c
-@@ -2217,6 +2217,7 @@ static void print_usage(const char *name)
+@@ -2230,6 +2230,7 @@ static void print_usage(const char *name)
  	       "                                         tgl    - Tiger Lake\n"
  	       "                                         wbg    - Wellsburg\n"
  	       "   -S | --setpchstrap                    Write a PCH strap\n"
@@ -31,7 +31,7 @@ index 36477eef66..3ebef74042 100644
  	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
  	       "   -v | --version:                       print the version\n"
  	       "   -h | --help:                          print this help\n\n"
-@@ -2225,6 +2226,60 @@ static void print_usage(const char *name)
+@@ -2238,6 +2239,60 @@ static void print_usage(const char *name)
  	       "\n");
  }
  
@@ -92,7 +92,7 @@ index 36477eef66..3ebef74042 100644
  int main(int argc, char *argv[])
  {
  	int opt, option_index = 0;
-@@ -2232,6 +2287,7 @@ int main(int argc, char *argv[])
+@@ -2245,6 +2300,7 @@ int main(int argc, char *argv[])
  	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
  	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
  	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
@@ -100,7 +100,7 @@ index 36477eef66..3ebef74042 100644
  	int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
  	char *region_type_string = NULL, *region_fname = NULL;
  	const char *layout_fname = NULL;
-@@ -2267,6 +2323,7 @@ int main(int argc, char *argv[])
+@@ -2280,6 +2336,7 @@ int main(int argc, char *argv[])
  		{"validate", 0, NULL, 't'},
  		{"setpchstrap", 1, NULL, 'S'},
  		{"newvalue", 1, NULL, 'V'},
@@ -108,7 +108,7 @@ index 36477eef66..3ebef74042 100644
  		{0, 0, 0, 0}
  	};
  
-@@ -2316,35 +2373,8 @@ int main(int argc, char *argv[])
+@@ -2329,35 +2386,8 @@ int main(int argc, char *argv[])
  			region_fname++;
  			// Descriptor, BIOS, ME, GbE, Platform
  			// valid type?
@@ -146,7 +146,7 @@ index 36477eef66..3ebef74042 100644
  				fprintf(stderr, "No such region type: '%s'\n\n",
  					region_type_string);
  				fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
-@@ -2521,6 +2551,22 @@ int main(int argc, char *argv[])
+@@ -2534,6 +2564,22 @@ int main(int argc, char *argv[])
  		case 't':
  			mode_validate = 1;
  			break;
@@ -169,7 +169,7 @@ index 36477eef66..3ebef74042 100644
  		case 'v':
  			print_version();
  			exit(EXIT_SUCCESS);
-@@ -2540,7 +2586,8 @@ int main(int argc, char *argv[])
+@@ -2553,7 +2599,8 @@ int main(int argc, char *argv[])
  	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
  			mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
  			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
@@ -179,7 +179,7 @@ index 36477eef66..3ebef74042 100644
  		fprintf(stderr, "You may not specify more than one mode.\n\n");
  		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
  		exit(EXIT_FAILURE);
-@@ -2549,7 +2596,8 @@ int main(int argc, char *argv[])
+@@ -2562,7 +2609,8 @@ int main(int argc, char *argv[])
  	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
  			mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
  			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
@@ -189,7 +189,7 @@ index 36477eef66..3ebef74042 100644
  		fprintf(stderr, "You need to specify a mode.\n\n");
  		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
  		exit(EXIT_FAILURE);
-@@ -2662,6 +2710,10 @@ int main(int argc, char *argv[])
+@@ -2675,6 +2723,10 @@ int main(int argc, char *argv[])
  		write_image(new_filename, image, size);
  	}
  
diff --git a/config/coreboot/next/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/next/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
similarity index 91%
rename from config/coreboot/next/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch
rename to config/coreboot/next/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
index ef561b42..b28a7165 100644
--- a/config/coreboot/next/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ b/config/coreboot/next/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -1,7 +1,7 @@
-From 895f9a49fb73d000178d8422b9d0c7e0ef71ae03 Mon Sep 17 00:00:00 2001
+From 4102bedd708450a83e1cf4c59743bbf65a46413a Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 4/5] Remove warning for coreboot images built without a
+Subject: [PATCH 7/8] Remove warning for coreboot images built without a
  payload
 
 I added this in upstream to prevent people from accidentally flashing
diff --git a/config/coreboot/next/patches/0005-mb-dell-optiplex_780-Add-USFF-variant.patch b/config/coreboot/next/patches/0008-mb-dell-optiplex_780-Add-USFF-variant.patch
similarity index 98%
rename from config/coreboot/next/patches/0005-mb-dell-optiplex_780-Add-USFF-variant.patch
rename to config/coreboot/next/patches/0008-mb-dell-optiplex_780-Add-USFF-variant.patch
index d63e2061..3d1e1e31 100644
--- a/config/coreboot/next/patches/0005-mb-dell-optiplex_780-Add-USFF-variant.patch
+++ b/config/coreboot/next/patches/0008-mb-dell-optiplex_780-Add-USFF-variant.patch
@@ -1,7 +1,7 @@
-From 0b26b89118b9bde0a722b9743b9871aa68f8ca38 Mon Sep 17 00:00:00 2001
+From 4215d9db7515b1c03646ff0a98a99eb4398c1dee Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Wed, 30 Oct 2024 20:55:25 -0600
-Subject: [PATCH 5/5] mb/dell/optiplex_780: Add USFF variant
+Subject: [PATCH 8/8] mb/dell/optiplex_780: Add USFF variant
 
 Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
diff --git a/config/coreboot/next/patches/0009-lenovo-t480-Add-MAINBOARD_USES_IFD_GBE_REGION.patch b/config/coreboot/next/patches/0009-lenovo-t480-Add-MAINBOARD_USES_IFD_GBE_REGION.patch
new file mode 100644
index 00000000..8ec2cde9
--- /dev/null
+++ b/config/coreboot/next/patches/0009-lenovo-t480-Add-MAINBOARD_USES_IFD_GBE_REGION.patch
@@ -0,0 +1,27 @@
+From 519d79d0d33a63082e474938fa2850044095732e Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sun, 1 Dec 2024 07:16:20 +0000
+Subject: [PATCH 1/1] lenovo/t480: Add MAINBOARD_USES_IFD_GBE_REGION
+
+This board does use a GbE region, so support it in menuconfig.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/lenovo/sklkbl_thinkpad/Kconfig | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
+index 08273c5d27..a83e17b71f 100644
+--- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
+@@ -15,6 +15,7 @@ config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
+ 	select MAINBOARD_HAS_LIBGFXINIT
+ 	select MEMORY_MAPPED_TPM
+ 	select MAINBOARD_HAS_TPM2
++	select MAINBOARD_USES_IFD_GBE_REGION
+ 	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
+ 	select SPD_READ_BY_WORD
+ 	select SYSTEM_TYPE_LAPTOP
+-- 
+2.39.5
+
diff --git a/config/coreboot/next/patches/0010-t480-hack-turn-off-the-dgpu.patch b/config/coreboot/next/patches/0010-t480-hack-turn-off-the-dgpu.patch
new file mode 100644
index 00000000..eaddf398
--- /dev/null
+++ b/config/coreboot/next/patches/0010-t480-hack-turn-off-the-dgpu.patch
@@ -0,0 +1,45 @@
+From 7c386cbe38fc42c036bd14b9048b13f1a1d45877 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sun, 1 Dec 2024 23:40:08 +0000
+Subject: [PATCH 1/1] t480 hack: turn off the dgpu
+
+too buggy, in mkukri's testing. just turn it off.
+
+thanks go to mkukri for showing me how to turn this off.
+as nicholas explained to me, if there's no nvram on this board,
+coreboot can't use a static option table, because that works by
+copying those settings to the nvram.
+
+so we just have to hardcode for the time being
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ 3rdparty/vboot                                  | 2 +-
+ src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c | 4 +++-
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/3rdparty/vboot b/3rdparty/vboot
+index f1f70f46dc..1f53ea9b7f 160000
+--- a/3rdparty/vboot
++++ b/3rdparty/vboot
+@@ -1 +1 @@
+-Subproject commit f1f70f46dc5482bb7c654e53ed58d4001e386df2
++Subproject commit 1f53ea9b7f398884f722fca046129eae5ea6a71c
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
+index 9526642c57..bf5da12689 100644
+--- a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
+@@ -31,7 +31,9 @@ void mainboard_silicon_init_params(FSP_SIL_UPD *params)
+ 		dgfx_vram_id = gpio_get(GPIO_DGFX_VRAM_ID0) | gpio_get(GPIO_DGFX_VRAM_ID1) << 1;
+ 		printk(BIOS_DEBUG, "Discrete GPU present with %s VRAM\n", dgfx_vram_id_str[dgfx_vram_id]);
+ 
+-		if (get_uint_option("dgpu_enable", 1)) {
++//		if (get_uint_option("dgpu_enable", 1)) {
++		if (get_uint_option("dgpu_enable", 0)) { // HACK: no option table due to no nvram.
++						// (turn off the dgpu by default due to bugs)
+ 			printk(BIOS_DEBUG, "Enabling discrete GPU\n");
+ 			// NOTE: i pulled this GPU enable sequence from thin air but it seems to work
+ 			gpio_set(GPIO_1R8VIDEO_AON_ON, 1);	// Enable GPU power rail
+-- 
+2.39.5
+
diff --git a/config/coreboot/next/target.cfg b/config/coreboot/next/target.cfg
index 80044097..be61aab7 100644
--- a/config/coreboot/next/target.cfg
+++ b/config/coreboot/next/target.cfg
@@ -1,2 +1,2 @@
 tree="next"
-rev="d28fedf4f2cb7e4475a6cdfcab37d64cc60bba1f"
+rev="9992a98c671d356b9770282df5d58a302b6dbeda"
diff --git a/config/coreboot/t480_fsp_16mb/config/normal b/config/coreboot/t480_fsp_16mb/config/normal
new file mode 100644
index 00000000..79b67cac
--- /dev/null
+++ b/config/coreboot/t480_fsp_16mb/config/normal
@@ -0,0 +1,827 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_FAMILY="T480"
+CONFIG_MAINBOARD_PART_NUMBER="T480"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
+CONFIG_VGA_BIOS_ID="8086,5917"
+CONFIG_DIMM_MAX=2
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0xEEC000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="t480"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VGA_BIOS=y
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+CONFIG_USE_PM_ACPI_TIMER=y
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+# CONFIG_USE_LEGACY_8254_TIMER is not set
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t480/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t480/gbe"
+CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_VGA_BIOS_FILE="../../../pciroms/pci8086,5917.rom"
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
+CONFIG_HAVE_IFD_BIN=y
+# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_E460 is not set
+CONFIG_BOARD_LENOVO_T480=y
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
+CONFIG_TTYS0_BAUD=115200
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
+CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
+CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x200000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_BERT_SIZE=0x0
+CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
+CONFIG_VGA_BIOS_SECOND=y
+CONFIG_VGA_BIOS_SECOND_ID="10de,1d10"
+CONFIG_VGA_BIOS_SECOND_FILE="../../../pciroms/pci10de,1d10.rom"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IFD_CHIPSET="sklkbl"
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_MAX_ROOT_PORTS=24
+CONFIG_PCR_BASE_ADDRESS=0xfd000000
+CONFIG_CPU_BCLK_MHZ=100
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
+CONFIG_CPU_XTAL_HZ=24000000
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
+CONFIG_SOC_INTEL_I2C_DEV_MAX=6
+# CONFIG_ENABLE_SATA_TEST_MODE is not set
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
+CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_FSP_PUBLISH_MBP_HOB=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
+CONFIG_MAX_HECI_DEVICES=5
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_PAM0_REGISTER=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
+CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
+CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
+CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
+CONFIG_SOC_INTEL_KABYLAKE=y
+CONFIG_FSP_T_LOCATION=0xfffe0000
+CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
+CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code for IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
+CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
+# CONFIG_USE_COREBOOT_MP_INIT is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
+CONFIG_INTEL_CAR_NEM_ENHANCED=y
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_INTEL_KEYLOCKER is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
+CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
+CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
+CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
+CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
+CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
+CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
+CONFIG_SOC_INTEL_CSE_RW_FILE=""
+CONFIG_SOC_INTEL_CSE_RW_VERSION=""
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
+CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
+CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
+CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
+# CONFIG_SOC_INTEL_DISABLE_IGD is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
+CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
+CONFIG_SA_ENABLE_DPR=y
+CONFIG_HAVE_CAPID_A_REGISTER=y
+CONFIG_HAVE_BDSM_BGSM_REGISTER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
+
+#
+# Intel SoC Common PCH Code
+#
+CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
+CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
+CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
+CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
+
+#
+# Intel SoC Common coreboot stages and non-IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BASECODE=y
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+CONFIG_PAVP=y
+# CONFIG_MMA is not set
+CONFIG_SOC_INTEL_COMMON_NHLT=y
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_PARALLEL_MP_AP_WORK=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
+CONFIG_H8_HAS_LEDLOGO=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_UDK_BASE=y
+CONFIG_UDK_2017_BINDING=y
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_202005_VERSION=202005
+CONFIG_UDK_202111_VERSION=202111
+CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_202305_VERSION=202305
+CONFIG_UDK_VERSION=2017
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_FSP_GOP=y
+CONFIG_VGA_ROM_RUN_DEFAULT=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+# CONFIG_MAINBOARD_USE_LIBGFXINIT is not set
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+CONFIG_NO_GFX_INIT=y
+CONFIG_NO_EARLY_GFX_INIT=y
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+# CONFIG_VGA_BIOS_DGPU is not set
+# CONFIG_INTEL_GMA_ADD_VBT is not set
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_DRIVERS_EFI_FW_INFO is not set
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_DESIGNWARE=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_FSP_USE_REPO=y
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+# CONFIG_BMP_LOGO is not set
+CONFIG_PLATFORM_USES_FSP2_0=y
+CONFIG_PLATFORM_USES_FSP2_X86_32=y
+CONFIG_HAVE_INTEL_FSP_REPO=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_S_CBFS="fsps.bin"
+CONFIG_FSP_M_CBFS="fspm.bin"
+CONFIG_FSP_FULL_FD=y
+CONFIG_FSP_T_RESERVED_SIZE=0x0
+CONFIG_FSP_M_XIP=y
+CONFIG_HAVE_FSP_LOGO_SUPPORT=y
+CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
+CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
+CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
+CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
+CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
+# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_USB_ACPI=y
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_TPM1 is not set
+CONFIG_TPM2=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM2=y
+# CONFIG_DEBUG_TPM is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_CUSTOM_MADT=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_ACPI_LPIT=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_ACPI_S1_NOT_SUPPORTED=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_IOAPIC=y
+CONFIG_ACPI_NHLT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
+# CONFIG_DISPLAY_FSP_HEADER is not set
+# CONFIG_VERIFY_HOBS is not set
+# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
+CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
+# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+CONFIG_HAVE_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_SPD_READ_BY_WORD=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t480_fsp_16mb/target.cfg b/config/coreboot/t480_fsp_16mb/target.cfg
new file mode 100644
index 00000000..af8d71e3
--- /dev/null
+++ b/config/coreboot/t480_fsp_16mb/target.cfg
@@ -0,0 +1,11 @@
+tree="next"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="t480"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+IFD_platform="sklkbl"
+payload_uboot_amd64="y"
diff --git a/config/dependencies/arch b/config/dependencies/arch
index 6a0f93b7..4d624860 100644
--- a/config/dependencies/arch
+++ b/config/dependencies/arch
@@ -6,7 +6,7 @@ dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \
 help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \
 ncurses openssl p7zip ccache \
 pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
-sharutils subversion swig texinfo ttf-dejavu unarchiver unzip wget xz zlib \
+sharutils subversion swig texinfo ttf-dejavu unarchiver unzip wget xz zlib mtools \
 "
 
-aur_notice="bdf-unifont unifont cross-mipsel-linux-gnu-binutils cross-mipsel-linux-gnu-gcc"
+aur_notice="bdf-unifont unifont cross-mipsel-linux-gnu-binutils cross-mipsel-linux-gnu-gcc genisoimage"
diff --git a/config/dependencies/debian b/config/dependencies/debian
index 387cb288..04d018dc 100755
--- a/config/dependencies/debian
+++ b/config/dependencies/debian
@@ -12,5 +12,5 @@ libusb-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted pciutils
 perl pkg-config python3 python3-distutils python3-pkg-resources python3-pycryptodome \
 python3-pyelftools python3-setuptools python-is-python3 sharutils swig unar \
 unifont unifont-bin unzip uuid-dev wget xfonts-unifont zlib1g-dev ccache \
-g++-mipsel-linux-gnu make \
+g++-mipsel-linux-gnu make genisoimage mtools \
 "
diff --git a/config/dependencies/fedora38 b/config/dependencies/fedora38
index 8f672205..dbd79329 100755
--- a/config/dependencies/fedora38
+++ b/config/dependencies/fedora38
@@ -8,5 +8,5 @@ innoextract intltool libftdi-devel libselinux-devel libusb1 libusb1-devel \
 nasm ncurses-devel openssl-devel p7zip p7zip-plugins pandoc parted \
 pciutils-devel perl perl-libwww-perl python-unversioned-command python3 \
 python3-setuptools rsync sharutils subversion texinfo unar unifont \
-unifont-fonts unifont-ttf-fonts unzip wget xz zlib-devel ccache swig \
+unifont-fonts unifont-ttf-fonts unzip wget xz zlib-devel ccache swig geteltorito mtools \
 "
diff --git a/config/dependencies/fedora40 b/config/dependencies/fedora40
index 6836b57b..32526752 100755
--- a/config/dependencies/fedora40
+++ b/config/dependencies/fedora40
@@ -9,5 +9,5 @@ libselinux-devel libusb1 libusb1-devel nasm ncurses-devel openssl-devel \
 p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \
 python-unversioned-command python3 python3-setuptools rsync sharutils \
 subversion systemd-devel texinfo unar unifont unifont-fonts \
-unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel \
+unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel geteltorito mtools \
 "
diff --git a/config/dependencies/fedora41 b/config/dependencies/fedora41
index 0650ba8e..e051c665 100755
--- a/config/dependencies/fedora41
+++ b/config/dependencies/fedora41
@@ -9,5 +9,5 @@ libselinux-devel libusb1 libusb1-devel nasm ncurses-devel openssl-devel openssl-
 p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \
 python-unversioned-command python3 python3-setuptools rsync sharutils \
 subversion systemd-devel texinfo unar unifont unifont-fonts \
-unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel \
+unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel mtools geteltorito mtools \
 "
diff --git a/config/dependencies/parabola b/config/dependencies/parabola
index f598e491..d62caf21 100644
--- a/config/dependencies/parabola
+++ b/config/dependencies/parabola
@@ -7,7 +7,7 @@ help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \
 ncurses openssl p7zip \
 pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
 sharutils subversion swig texinfo ttf-dejavu unarchiver unifont-utils unzip \
-wget xz zlib ccache \
+wget xz zlib ccache mtools \
 "
 
-aur_notice="cross-mipsel-linux-gnu-binutils cross-mipsel-linux-gnu-gcc"
+aur_notice="cross-mipsel-linux-gnu-binutils cross-mipsel-linux-gnu-gcc geteltorito"
diff --git a/config/dependencies/trisquel b/config/dependencies/trisquel
index a5e1fa13..027c7ef1 100755
--- a/config/dependencies/trisquel
+++ b/config/dependencies/trisquel
@@ -12,5 +12,5 @@ libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \
 pciutils perl pkg-config python3 python3-distutils python3-pkg-resources \
 python3-pycryptodome python3-pyelftools python3-setuptools python-is-python3 \
 sharutils swig fonts-unifont unar unifont unzip uuid-dev wget zlib1g-dev \
-g++-mipsel-linux-gnu make \
+g++-mipsel-linux-gnu make genisoimage mtools \
 "
diff --git a/config/dependencies/ubuntu2004 b/config/dependencies/ubuntu2004
index 8fe09aef..c9d8a550 100755
--- a/config/dependencies/ubuntu2004
+++ b/config/dependencies/ubuntu2004
@@ -11,5 +11,5 @@ libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \
 pciutils perl pkg-config python3 python3-distutils python3-pkg-resources \
 python3-pycryptodome python3-pyelftools python3-setuptools python-is-python3 \
 sharutils swig ttf-unifont unar unifont unzip uuid-dev wget zlib1g-dev ccache \
-g++-mipsel-linux-gnu make \
+g++-mipsel-linux-gnu make genisoimage mtools \
 "
diff --git a/config/dependencies/ubuntu2404 b/config/dependencies/ubuntu2404
index a93d0b49..9f33964a 100755
--- a/config/dependencies/ubuntu2404
+++ b/config/dependencies/ubuntu2404
@@ -11,5 +11,5 @@ libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \
 pciutils perl pkg-config python3 python3-pkg-resources python3-pycryptodome \
 python3-pyelftools python3-setuptools python-is-python3 sharutils swig \
 fonts-unifont unar unifont unzip uuid-dev wget zlib1g-dev ccache \
-g++-mipsel-linux-gnu make \
+g++-mipsel-linux-gnu make genisoimage mtools \
 "
diff --git a/config/dependencies/void b/config/dependencies/void
index 79a12328..44a5676b 100644
--- a/config/dependencies/void
+++ b/config/dependencies/void
@@ -8,5 +8,5 @@ freetype freetype-devel fuse gawk gcc-ada gdb gettext gettext-devel git \
 help2man innoextract libftdi1 libpciaccess libusb nasm ncurses \
 ncurses-devel openssl openssl-devel p7zip parted pciutils perl perl-LWP \
 python python3 python3-setuptools rsync sharutils subversion texinfo \
-unar unzip wget xz zlib ccache
+unar unzip wget xz zlib ccache geteltorito mtools
 "
diff --git a/config/ifd/t480/gbe b/config/ifd/t480/gbe
new file mode 100644
index 0000000000000000000000000000000000000000..dfb2300d7734e85cb289ae431b3237604a0ce73d
GIT binary patch
literal 8192
zcmb2DX|I0V&B*cpzX-#528IR(f&c#x3&bj|62C6W00RxI%XJJG1b|$gBrPT`XAWV;
z>!NFST^GFpCP6Hq)&>T@HV%*$b_NCo1rUP|h#46iG=$h4{$l_JrvLw~LqW<g0YdSV
z4GbJy3@j5ixI3sEI;i-&Awiyj!9#$-0Z6l46l7rL5&~+MXW-sq0JPVTfdxn#18FuO
zEeoU>{~9pp%rRu}*=E4N3gjb99%YS&z-S0$2DdOXVrIZm5ws9swnY;Fa`*6Hij9hl
zh5)G{Fj@+YhQMeDjE2By2#kinXb6m~5b!fH334?s4)^i(ar6T=9O&(PsnPyFy@Pzz
zzR?gEG$AnB|0k}uHroFuE}TYHksbnrrZ5<F$Y=<RhQMeDjE2By2#kgRT|!`>`~LtM
CN`F28

literal 0
HcmV?d00001

diff --git a/config/ifd/t480/ifd_16 b/config/ifd/t480/ifd_16
new file mode 100644
index 0000000000000000000000000000000000000000..9d535d6090e14ab2d9c0cd6374ca838b4cd9b97b
GIT binary patch
literal 4096
zcmeH~K}!Nr5Xb+!&n1<}4HGs9dO=<~h^r}eN~}eKwA3Vs4h4MxFC9ARse7kBLC4Nf
z#|ZiueS|z1U4&`g?h=XRQA*w{{~31Xy_xrZds?DlJHG8D1R{u<b~!6t3|EQXagtjp
zpWfX+Jin+K*cJ@pJxRlW3F_b%QRk;e4fv937WP!VCt*MxFx24h#)*-f;M~pLa3NUK
z=A<xz^RPu~4NL-vvLvg-DzE^{_jByk&chTS!kj8xaQV6yr;ov4px)v59+(ZI9mEQU
zENe^H=yFW5c)A)1^v`0894=d})-n$fGe%q;CWZui@~3%M{z|N>gRu4Uk&*8_3HE<s
z2AHYYorkUHXww8V0Zl*?&;&FAO+XXS1g4C@lXT!oPrj8Lq-9#lM+cU)<Wf6`Q+D04
w*Lme1v|4VxQFYxTa^1{ErdY`23!7PTi`6nUcPlk-hw4q*-ftX??eu?(pZx%KeE<Le

literal 0
HcmV?d00001

diff --git a/config/submodule/coreboot/next/fsp/module.cfg b/config/submodule/coreboot/next/fsp/module.cfg
index 8042a059..2807b268 100644
--- a/config/submodule/coreboot/next/fsp/module.cfg
+++ b/config/submodule/coreboot/next/fsp/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/fsp.git"
 subrepo_bkup="https://github.com/coreboot/fsp"
-subhash="68328e297e195a6cfb1949b60d971c032a172ba3"
+subhash="d7931859bfb1f7949bb455d53b9494dd731e9642"
diff --git a/config/submodule/coreboot/next/intel-microcode/module.cfg b/config/submodule/coreboot/next/intel-microcode/module.cfg
index 8a364c43..0c66e086 100644
--- a/config/submodule/coreboot/next/intel-microcode/module.cfg
+++ b/config/submodule/coreboot/next/intel-microcode/module.cfg
@@ -1,3 +1,3 @@
 subrepo="https://review.coreboot.org/intel-microcode.git"
 subrepo_bkup="https://github.com/coreboot/intel-microcode"
-subhash="129f82f7429c29976b15d6837d2f573cc6a02c26"
+subhash="8ac9378a84879e81c503e09f344560b3dd7f72df"
diff --git a/config/vendor/t480/pkg.cfg b/config/vendor/t480/pkg.cfg
new file mode 100644
index 00000000..c528ce02
--- /dev/null
+++ b/config/vendor/t480/pkg.cfg
@@ -0,0 +1,15 @@
+DL_hash="df735a24242792bf4150f30bf0bd4fdbdc0fb6bf0f897ea533df32567be8e084006d692fb6351677f8cc976878c5018667901dbd407b0a77805754f7c101497c"
+DL_url="https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
+DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
+
+# VGA ROM, Intel VGA pci8086,5917.rom
+T480_VGA_DL_hash="cedf859b95b96f09135c1a4824b25c0204f598e2b5a2d5d5adc6ef3401e8e3c4204a55ebc6c9d85c25c618c616c122d2a2239916be7164ada22c357e68136c1d"
+T480_VGA_DL_url="https://download.lenovo.com/pccbbs/mobiles/n24ur39w.iso"
+T480_VGA_DL_url_bkup="https://web.archive.org/web/20241005213051/https://download.lenovo.com/pccbbs/mobiles/n24ur39w.iso"
+
+# We will use deguard to disable the Intel Boot Guard:
+ME11bootguard="y"
+ME11delta="thinkpad_t480" # subdirectory under deguard's data/delta/
+ME11version="11.6.0.1126"
+ME11sku="2M"
+ME11pch="LP"
diff --git a/include/vendor.sh b/include/vendor.sh
index 8c1ddcd4..1ee92f46 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -79,12 +79,34 @@ getfiles()
 	    "$CONFIG_SMSC_SCH5545_EC_FW_FILE"
 	[ -z "$CONFIG_KBC1126_FIRMWARE" ] || fetch kbc1126ec "$EC_url" \
 	    "$EC_url_bkup" "$EC_hash" "$CONFIG_KBC1126_FW1"
-	[ -z "$CONFIG_VGA_BIOS_FILE" ] || fetch e6400vga "$E6400_VGA_DL_url" \
-	  "$E6400_VGA_DL_url_bkup" "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
+	[ -z "$CONFIG_VGA_BIOS_FILE" ] || fetch_vgarom
 	[ -z "$CONFIG_HAVE_MRC" ] || fetch "mrc" "$MRC_url" "$MRC_url_bkup" \
 	    "$MRC_hash" "$CONFIG_MRC_FILE"; return 0
 }
 
+fetch_vgarom()
+{
+	if [ "$board" = "e6400_4mb" ] || [ "$board" = "e6400nvidia_4mb" ]; then
+		fetch_vgarom_e6400
+	elif [ "$board" = "t480_fsp_16mb" ]; then
+		fetch_vgarom_t480
+	else
+		$err "coreboot/$board: VGA ROM extraction not supported yet!"
+	fi
+}
+
+fetch_vgarom_e6400()
+{
+	fetch e6400vga "$E6400_VGA_DL_url" "$E6400_VGA_DL_url_bkup" \
+	    "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
+}
+
+fetch_vgarom_t480()
+{
+	fetch t480vga "$T480_VGA_DL_url" "$T480_VGA_DL_url_bkup" \
+	    "$T480_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
+}
+
 fetch()
 {
 	dl_type="$1"; dl="$2"; dl_bkup="$3"; dlsum="$4"; _dest="${5##*../}"
@@ -176,8 +198,12 @@ apply_me11_deguard_mod()
 
 extract_archive()
 {
-	innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
+	geteltorito "$1" > "$2/vendor.img" || \
+	    innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
 	    "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
+
+	[ ! -d "${_dl}_extracted" ] || mv "${_dl}_extracted" "$2" || \
+	    $err "!mv '${_dl}_extracted' '$2'"; :
 }
 
 extract_kbc1126ec()
@@ -214,6 +240,34 @@ extract_e6400vga()
 	    $err "extract_e6400vga $board: can't copy vga rom to $_dest"
 }
 
+extract_t480vga()
+{
+	_img="$appdir/vendor.img"
+	_imgp1="$appdir/vendor_p1.img"
+	_imguefi="$appdir/update.cap"
+	_intelvga="$appdir/intelvga/body.bin"
+	_nvvga="$appdir/nvvga/body.bin"
+	_intelrom="pciroms/pci8086,5917.rom"
+	_nvrom="pciroms/pci10de,1d10.rom"
+
+	[ -f "$_nvrom" ] && [ "$_intelrom" ] && return 0
+
+	x_ mkdir -p pciroms
+
+	# extract the system rom (i.e. factory.rom)
+	dd skip=32 if="$appdir/vendor.img" of="$_imgp1"
+	mcopy -i "$_imgp1" ::/FLASH/N24ET77W/\$0AN2400.FL1 "$_imguefi"
+
+	# extract vga roms from system rom
+	$uefiextract "$_imguefi" 6A5F1EF9-C478-42BA-A4DB-C7846CC7DB57 \
+	    -m body -t 0x19 -o "${_intelvga%/body.bin}"
+	$uefiextract "$_imguefi" 8B9BEF90-5FAF-46CF-A32A-7E1B7D33CC87 \
+	    -m body -t 0x19 -o "${_nvvga%/body.bin}"
+
+	x_ mv "$_nvvga" "$_nvrom"
+	x_ mv "$_intelvga" "$_intelrom"
+}
+
 extract_sch5545ec()
 {
 	# full system ROM (UEFI), to extract with UEFIExtract:

From c1b73269726a00255aa31ec02b3e55d281b397e6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 2 Dec 2024 02:01:09 +0000
Subject: [PATCH 0900/1549] NEW MAINBOARD: ThinkPad T480S

Added t480s delta to deguard, for MFS config.

Updated coreboot/next to latest t480 patch set,
which includes t480s. This porting was done by
Mate Kukri.

also includes experimental t480s support

Also added a data.vbt file (not in the gerrit patch)
for the T480s.

I had to turn on 8254 legacy timer on t480s, otherwise
SeaBIOS would hang. Same issue I saw on OptiPlex 3050 Micro.

Minor issue:

On S3 resume, nvme0n1 for example got renamed to nvme0n2.
This caused a crash if running Linux from the nvme. I confirmed
this via live USB distro. So this port will need some tweaking
before it can be considered stable.

Also uses libgfxinit, which Mate recently fixed. I'm
going to enable libgfxinit on regular T480 next.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...soc-intel-skylake-configure-usb-acpi.patch |   4 +-
 ...nitial-code-for-Lenovo-ThinkPad-E460.patch |   4 +-
 ...e-Enable-4E-4F-PNP-I-O-ports-in-boot.patch |   4 +-
 ...-dell-Add-Optiplex-780-MT-x4x-ICH10.patch} |   4 +-
 ...ol-add-nuke-flag-all-0xFF-on-region.patch} |   4 +-
 ...r-coreboot-images-built-without-a-p.patch} |   4 +-
 ...-dell-optiplex_780-Add-USFF-variant.patch} |   4 +-
 ...=> 0008-mb-lenovo-Add-ThinkPad-T480.patch} | 597 +++++++++++-
 ...80-Add-MAINBOARD_USES_IFD_GBE_REGION.patch |   6 +-
 ...0010-add-vbt-file-for-thinkpad-t480s.patch |  49 +
 .../0010-t480-hack-turn-off-the-dgpu.patch    |  45 -
 config/coreboot/t480_fsp_16mb/config/normal   |   2 +
 .../config/libgfxinit_corebootfb              | 859 ++++++++++++++++++
 .../t480s_fsp_16mb/config/libgfxinit_txtmode  | 852 +++++++++++++++++
 config/coreboot/t480s_fsp_16mb/target.cfg     |  11 +
 config/deguard/patches/0001-t480s-delta.patch | 221 +++++
 config/ifd/t480/ifd_16                        | Bin 4096 -> 4096 bytes
 config/ifd/t480s/gbe                          | Bin 0 -> 8192 bytes
 config/ifd/t480s/ifd_16                       | Bin 0 -> 4096 bytes
 config/vendor/t480s/pkg.cfg                   |  10 +
 20 files changed, 2577 insertions(+), 103 deletions(-)
 rename config/coreboot/next/patches/{0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch => 0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch} (99%)
 rename config/coreboot/next/patches/{0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch => 0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch} (98%)
 rename config/coreboot/next/patches/{0007-Remove-warning-for-coreboot-images-built-without-a-p.patch => 0006-Remove-warning-for-coreboot-images-built-without-a-p.patch} (91%)
 rename config/coreboot/next/patches/{0008-mb-dell-optiplex_780-Add-USFF-variant.patch => 0007-mb-dell-optiplex_780-Add-USFF-variant.patch} (98%)
 rename config/coreboot/next/patches/{0004-mb-lenovo-Add-ThinkPad-T480.patch => 0008-mb-lenovo-Add-ThinkPad-T480.patch} (66%)
 create mode 100644 config/coreboot/next/patches/0010-add-vbt-file-for-thinkpad-t480s.patch
 delete mode 100644 config/coreboot/next/patches/0010-t480-hack-turn-off-the-dgpu.patch
 create mode 100644 config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/t480s_fsp_16mb/target.cfg
 create mode 100644 config/deguard/patches/0001-t480s-delta.patch
 create mode 100644 config/ifd/t480s/gbe
 create mode 100644 config/ifd/t480s/ifd_16
 create mode 100644 config/vendor/t480s/pkg.cfg

diff --git a/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch b/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch
index 1b6b5372..b5a157a1 100644
--- a/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch
+++ b/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch
@@ -1,7 +1,7 @@
-From 18b68185f44599cf6ea6a20816bf6a5eb7aeda17 Mon Sep 17 00:00:00 2001
+From b7b4f05005bfe46fc5ce67ae1f04d225e35cbd4d Mon Sep 17 00:00:00 2001
 From: Felix Singer <felixsinger@posteo.net>
 Date: Wed, 26 Jun 2024 04:24:31 +0200
-Subject: [PATCH 1/8] soc/intel/skylake: configure usb acpi
+Subject: [PATCH 1/9] soc/intel/skylake: configure usb acpi
 
 Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d
 Signed-off-by: Felix Singer <felixsinger@posteo.net>
diff --git a/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch b/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch
index 77d7b080..d268ddf3 100644
--- a/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch
+++ b/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch
@@ -1,7 +1,7 @@
-From a7cbcbc7037fe3473e5ebe475cbfd12f653e9827 Mon Sep 17 00:00:00 2001
+From 86a721209951605ad59aff31639a6be954a0fab8 Mon Sep 17 00:00:00 2001
 From: Felix Singer <felixsinger@posteo.net>
 Date: Wed, 26 Jun 2024 00:59:03 +0200
-Subject: [PATCH 2/8] mb/lenovo: Add initial code for Lenovo ThinkPad E460
+Subject: [PATCH 2/9] mb/lenovo: Add initial code for Lenovo ThinkPad E460
 
 Change-Id: Ia02f81750105c95c867d961dbdadcd5991ad371f
 Signed-off-by: Felix Singer <felixsinger@posteo.net>
diff --git a/config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch b/config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
index 6e7d4b7c..56834e40 100644
--- a/config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
+++ b/config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
@@ -1,7 +1,7 @@
-From b3049cfd11aa0f3c124ed8f87e98a200201ecbdc Mon Sep 17 00:00:00 2001
+From 46da5bb38caf3b5d523e79ca0e17b125179daaaf Mon Sep 17 00:00:00 2001
 From: Mate Kukri <km@mkukri.xyz>
 Date: Fri, 22 Nov 2024 21:26:48 +0000
-Subject: [PATCH 3/8] soc/intel/skylake: Enable 4E/4F PNP I/O ports in
+Subject: [PATCH 3/9] soc/intel/skylake: Enable 4E/4F PNP I/O ports in
  bootblock
 
 Change-Id: I57c9d8a9513a268e2ca6a0abd1306cd038598173
diff --git a/config/coreboot/next/patches/0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch b/config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
similarity index 99%
rename from config/coreboot/next/patches/0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
rename to config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
index fa5ac312..33e7a55d 100644
--- a/config/coreboot/next/patches/0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
+++ b/config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
@@ -1,7 +1,7 @@
-From 1e10400616ab16e17980af23c91a8efc633529e8 Mon Sep 17 00:00:00 2001
+From bc884fae79664c0d606991b5e0d62c608f3bef35 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 30 Sep 2024 20:44:38 -0400
-Subject: [PATCH 5/8] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
+Subject: [PATCH 4/9] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
 
 Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
diff --git a/config/coreboot/next/patches/0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
similarity index 98%
rename from config/coreboot/next/patches/0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
rename to config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
index 39a8e2be..d623f57f 100644
--- a/config/coreboot/next/patches/0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ b/config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -1,7 +1,7 @@
-From c900ff6f05ee431c7bf6ab31bc0215faa4ad6971 Mon Sep 17 00:00:00 2001
+From 13da22a18b2c13b8676c69e929ba51f2d5d188cf Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 6/8] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 5/9] util/ifdtool: add --nuke flag (all 0xFF on region)
 
 When this option is used, the region's contents are overwritten
 with all ones (0xFF).
diff --git a/config/coreboot/next/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch
similarity index 91%
rename from config/coreboot/next/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
rename to config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch
index b28a7165..6ca8bee8 100644
--- a/config/coreboot/next/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ b/config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -1,7 +1,7 @@
-From 4102bedd708450a83e1cf4c59743bbf65a46413a Mon Sep 17 00:00:00 2001
+From bc1c834506a749eb2b235e51bb75b04b5b939ad5 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 7/8] Remove warning for coreboot images built without a
+Subject: [PATCH 6/9] Remove warning for coreboot images built without a
  payload
 
 I added this in upstream to prevent people from accidentally flashing
diff --git a/config/coreboot/next/patches/0008-mb-dell-optiplex_780-Add-USFF-variant.patch b/config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch
similarity index 98%
rename from config/coreboot/next/patches/0008-mb-dell-optiplex_780-Add-USFF-variant.patch
rename to config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch
index 3d1e1e31..17168733 100644
--- a/config/coreboot/next/patches/0008-mb-dell-optiplex_780-Add-USFF-variant.patch
+++ b/config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch
@@ -1,7 +1,7 @@
-From 4215d9db7515b1c03646ff0a98a99eb4398c1dee Mon Sep 17 00:00:00 2001
+From 1fa342e9462503c871bc5f4a0e4508ff8eac3e68 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Wed, 30 Oct 2024 20:55:25 -0600
-Subject: [PATCH 8/8] mb/dell/optiplex_780: Add USFF variant
+Subject: [PATCH 7/9] mb/dell/optiplex_780: Add USFF variant
 
 Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
diff --git a/config/coreboot/next/patches/0004-mb-lenovo-Add-ThinkPad-T480.patch b/config/coreboot/next/patches/0008-mb-lenovo-Add-ThinkPad-T480.patch
similarity index 66%
rename from config/coreboot/next/patches/0004-mb-lenovo-Add-ThinkPad-T480.patch
rename to config/coreboot/next/patches/0008-mb-lenovo-Add-ThinkPad-T480.patch
index 115635f1..a956a392 100644
--- a/config/coreboot/next/patches/0004-mb-lenovo-Add-ThinkPad-T480.patch
+++ b/config/coreboot/next/patches/0008-mb-lenovo-Add-ThinkPad-T480.patch
@@ -1,14 +1,13 @@
-From c4efef17d76623916f69de0bdaf24565e02f8e3e Mon Sep 17 00:00:00 2001
+From cc9876a374db2515cefc1e3a3a1745d643b19554 Mon Sep 17 00:00:00 2001
 From: Mate Kukri <kukri.mate@gmail.com>
-Date: Sat, 30 Nov 2024 19:44:36 +0000
-Subject: [PATCH 4/8] mb/lenovo: Add ThinkPad T480
+Date: Mon, 2 Dec 2024 01:36:35 +0000
+Subject: [PATCH 8/9] mb/lenovo: Add ThinkPad T480
 
 This machine has BootGuard fused and requires deguard to boot coreboot.
 
 Works:
-- Internal screen with VGA ROM executed by SeaBIOS
-- Intel iGPU
-- Nvidia dGPU (on some models)
+- Intel GPU
+- Internal screen
 - Ethernet
 - USB
 - EC
@@ -25,14 +24,15 @@ Works:
 - S3 sleep
 
 Known issues:
-- libgfxinit does not work
-- VGA ROM executed by coreboot does not work
 - Alpine Ridge Thunderbolt 3 controller does not work
 - Missing HDA verbs, audio still works
-- Missing VBT
 - Function keys are handled differently from stock firmware
   + These should inject XF86 keycodes instead of directly
     controlling, volume, brightness, etc in hardware.
+- Nvidia dGPU
+  - Needs option ROM
+  - Power enable code is buggy
+  - Nouveau only works on linux 6.8-6.9
 
 Untested (should work):
 - SATA main SSD
@@ -46,33 +46,88 @@ Untested (should work):
 Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
 Change-Id: I19d421412c771c1f242f6ff39453f824fa866163
 ---
+ src/device/pci_rom.c                          |  12 +-
+ src/ec/lenovo/h8/acpi/ec.asl                  |   2 +-
  src/ec/lenovo/h8/bluetooth.c                  |  12 +-
  src/ec/lenovo/h8/wwan.c                       |  12 +-
- src/mainboard/lenovo/sklkbl_thinkpad/Kconfig  |  29 ++-
- .../lenovo/sklkbl_thinkpad/Kconfig.name       |   3 +
+ src/mainboard/lenovo/sklkbl_thinkpad/Kconfig  |  39 +++-
+ .../lenovo/sklkbl_thinkpad/Kconfig.name       |   6 +
  .../lenovo/sklkbl_thinkpad/Makefile.mk        |   8 +-
  .../lenovo/sklkbl_thinkpad/acpi/ec.asl        |  13 +-
  .../lenovo/sklkbl_thinkpad/bootblock.c        |  50 +++++
  .../lenovo/sklkbl_thinkpad/devicetree.cb      |  36 ++++
- src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl |   5 +
- src/mainboard/lenovo/sklkbl_thinkpad/ec.c     | 151 +++++++++++++
- src/mainboard/lenovo/sklkbl_thinkpad/ec.h     |  94 ++++++++
+ src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl |  17 +-
+ src/mainboard/lenovo/sklkbl_thinkpad/ec.c     | 153 +++++++++++++
+ src/mainboard/lenovo/sklkbl_thinkpad/ec.h     |  99 +++++++++
  src/mainboard/lenovo/sklkbl_thinkpad/gpio.h   |   8 +
- .../lenovo/sklkbl_thinkpad/ramstage.c         |  96 ++++++++-
+ .../lenovo/sklkbl_thinkpad/ramstage.c         |  98 ++++++++-
  .../lenovo/sklkbl_thinkpad/romstage.c         |  24 +++
- .../variants/t480/gma-mainboard.ads           |  15 ++
+ .../sklkbl_thinkpad/variants/t480/data.vbt    | Bin 0 -> 4106 bytes
+ .../variants/t480/gma-mainboard.ads           |  19 ++
  .../sklkbl_thinkpad/variants/t480/gpio.c      | 203 ++++++++++++++++++
  .../sklkbl_thinkpad/variants/t480/hda_verb.c  |  10 +
- .../variants/t480/overridetree.cb             | 114 ++++++++++
- 18 files changed, 860 insertions(+), 23 deletions(-)
+ .../variants/t480/overridetree.cb             | 124 +++++++++++
+ .../variants/t480s/gma-mainboard.ads          |  15 ++
+ .../sklkbl_thinkpad/variants/t480s/gpio.c     | 199 +++++++++++++++++
+ .../sklkbl_thinkpad/variants/t480s/hda_verb.c |  10 +
+ .../variants/t480s/overridetree.cb            | 121 +++++++++++
+ 25 files changed, 1258 insertions(+), 32 deletions(-)
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ec.c
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ec.h
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/gpio.h
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
 
+diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
+index d60720eb49..b18dfdd287 100644
+--- a/src/device/pci_rom.c
++++ b/src/device/pci_rom.c
+@@ -304,11 +304,11 @@ void pci_rom_ssdt(const struct device *device)
+ 		return;
+ 	}
+ 
+-	const char *scope = acpi_device_path(device);
+-	if (!scope) {
+-		printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device));
+-		return;
+-	}
++	// const char *scope = acpi_device_path(device);
++	// if (!scope) {
++	// 	printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device));
++	// 	return;
++	// }
+ 
+ 	/* Supports up to four devices. */
+ 	if ((CBMEM_ID_ROM0 + ngfx) > CBMEM_ID_ROM3) {
+@@ -336,7 +336,7 @@ void pci_rom_ssdt(const struct device *device)
+ 	memcpy(cbrom, rom, cbrom_length);
+ 
+ 	/* write _ROM method */
+-	acpigen_write_scope(scope);
++	acpigen_write_scope("\\_SB.PCI0.RP01.PEGP");
+ 	acpigen_write_rom(cbrom, cbrom_length);
+ 	acpigen_pop_len(); /* pop scope */
+ }
+diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl
+index bc54d3b422..8f4a8e1986 100644
+--- a/src/ec/lenovo/h8/acpi/ec.asl
++++ b/src/ec/lenovo/h8/acpi/ec.asl
+@@ -331,7 +331,7 @@ Device(EC)
+ #include "sleepbutton.asl"
+ #include "lid.asl"
+ #include "beep.asl"
+-#include "thermal.asl"
++//#include "thermal.asl"
+ #include "systemstatus.asl"
+ #include "thinkpad.asl"
+ }
 diff --git a/src/ec/lenovo/h8/bluetooth.c b/src/ec/lenovo/h8/bluetooth.c
 index 16fc8dce39..ef4f6ad1f5 100644
 --- a/src/ec/lenovo/h8/bluetooth.c
@@ -142,7 +197,7 @@ index 685886fcce..5e0ae030e2 100644
  	printk(BIOS_INFO, "H8: WWAN not installed\n");
  	return false;
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
-index fcc80dffe3..08273c5d27 100644
+index fcc80dffe3..13d71670e3 100644
 --- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
 @@ -2,16 +2,19 @@
@@ -158,8 +213,9 @@ index fcc80dffe3..08273c5d27 100644
  	select HAVE_ACPI_RESUME
  	select HAVE_ACPI_TABLES
  #	select HAVE_CMOS_DEFAULT
- #	select INTEL_GMA_HAVE_VBT
+-#	select INTEL_GMA_HAVE_VBT
 -	select INTEL_LPSS_UART_FOR_CONSOLE
++	select INTEL_GMA_HAVE_VBT
 +	select INTEL_INT15
  	select MAINBOARD_HAS_LIBGFXINIT
  	select MEMORY_MAPPED_TPM
@@ -168,7 +224,7 @@ index fcc80dffe3..08273c5d27 100644
  	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
  	select SPD_READ_BY_WORD
  	select SYSTEM_TYPE_LAPTOP
-@@ -19,8 +22,16 @@ config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
+@@ -19,8 +22,22 @@ config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
  config BOARD_LENOVO_E460
  	bool
  	select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
@@ -181,15 +237,22 @@ index fcc80dffe3..08273c5d27 100644
 +	select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
 +	select BOARD_ROMSIZE_KB_16384
 +	select SOC_INTEL_KABYLAKE
++
++config BOARD_LENOVO_T480S
++	bool
++	select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
++	select BOARD_ROMSIZE_KB_16384
++	select SOC_INTEL_KABYLAKE
 +
  if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
  
  config MAINBOARD_DIR
-@@ -28,19 +39,29 @@ config MAINBOARD_DIR
+@@ -28,19 +45,31 @@ config MAINBOARD_DIR
  
  config VARIANT_DIR
  	default "e460" if BOARD_LENOVO_E460
 +	default "t480" if BOARD_LENOVO_T480
++	default "t480s" if BOARD_LENOVO_T480S
 +
 +config OVERRIDE_DEVICETREE
 +	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
@@ -197,10 +260,11 @@ index fcc80dffe3..08273c5d27 100644
  config MAINBOARD_PART_NUMBER
  	default "E460" if BOARD_LENOVO_E460
 +	default "T480" if BOARD_LENOVO_T480
++	default "T480S" if BOARD_LENOVO_T480S
  
  config CBFS_SIZE
  	default 0x600000 if BOARD_LENOVO_E460
-+	default 0x900000 if BOARD_LENOVO_T480
++	default 0x900000 if BOARD_LENOVO_T480 || BOARD_LENOVO_T480S
  
  config DIMM_MAX
 -	default 4
@@ -217,16 +281,19 @@ index fcc80dffe3..08273c5d27 100644
  	default 2
  
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
-index 61d971fe8d..7b813be284 100644
+index 61d971fe8d..54fc4f0065 100644
 --- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
-@@ -2,3 +2,6 @@
+@@ -2,3 +2,9 @@
  
  config BOARD_LENOVO_E460
  	bool "ThinkPad E460"
 +
 +config BOARD_LENOVO_T480
 +	bool "ThinkPad T480"
++
++config BOARD_LENOVO_T480S
++	bool "ThinkPad T480S"
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
 index 6e544fd6b9..348e3d4582 100644
 --- a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
@@ -373,7 +440,7 @@ index ddb6e8aaa5..745af8c8cd 100644
  				device pnp 0c31.0 on end
  			end
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
-index 967b652853..e8dc4cbae2 100644
+index 967b652853..237500775f 100644
 --- a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
 @@ -1,5 +1,10 @@
@@ -387,12 +454,35 @@ index 967b652853..e8dc4cbae2 100644
  #include <acpi/acpi.h>
  DefinitionBlock(
  	"dsdt.aml",
+@@ -14,9 +19,19 @@ DefinitionBlock(
+ 	#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ 	#include <cpu/intel/common/acpi/cpu.asl>
+ 
+-	Device (\_SB.PCI0) {
++	Device (\_SB.PCI0)
++	{
+ 		#include <soc/intel/skylake/acpi/systemagent.asl>
+ 		#include <soc/intel/skylake/acpi/pch.asl>
++		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
++	}
++
++	Scope (\_SB.PCI0.RP01)
++	{
++		Device (PEGP)
++		{
++			Name (_ADR, Zero)
++		}
+ 	}
+ 
+ 	#include <southbridge/intel/common/acpi/sleepstates.asl>
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ec.c b/src/mainboard/lenovo/sklkbl_thinkpad/ec.c
 new file mode 100644
-index 0000000000..47449eabd6
+index 0000000000..adb6a60324
 --- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/ec.c
-@@ -0,0 +1,151 @@
+@@ -0,0 +1,153 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
 +#include <arch/io.h>
 +#include "ec.h"
 +
@@ -546,11 +636,14 @@ index 0000000000..47449eabd6
 +const uint8_t debug_rw_key[8] = { 0x7a, 0x41, 0xb1, 0x49, 0xfe, 0x21, 0x01, 0xcf };
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ec.h b/src/mainboard/lenovo/sklkbl_thinkpad/ec.h
 new file mode 100644
-index 0000000000..aa5582f30b
+index 0000000000..d2963c8962
 --- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/ec.h
-@@ -0,0 +1,94 @@
-+#pragma once
+@@ -0,0 +1,99 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#ifndef SKLKBL_THINKPAD_EC_H
++#define SKLKBL_THINKPAD_EC_H
 +
 +// EC configuration base address
 +#define EC_CFG_PORT		0x4e
@@ -644,6 +737,8 @@ index 0000000000..aa5582f30b
 +
 +// RW unlock key for EC version N24HT37W
 +extern const uint8_t debug_rw_key[8];
++
++#endif
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/gpio.h b/src/mainboard/lenovo/sklkbl_thinkpad/gpio.h
 new file mode 100644
 index 0000000000..d89ed712d4
@@ -659,10 +754,10 @@ index 0000000000..d89ed712d4
 +
 +#endif
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
-index 6c3b077cc4..9526642c57 100644
+index 6c3b077cc4..b41cca02a7 100644
 --- a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
-@@ -1,11 +1,103 @@
+@@ -1,11 +1,105 @@
  /* SPDX-License-Identifier: GPL-2.0-only */
  
 +#include <arch/io.h>
@@ -697,9 +792,11 @@ index 6c3b077cc4..9526642c57 100644
 +		dgfx_vram_id = gpio_get(GPIO_DGFX_VRAM_ID0) | gpio_get(GPIO_DGFX_VRAM_ID1) << 1;
 +		printk(BIOS_DEBUG, "Discrete GPU present with %s VRAM\n", dgfx_vram_id_str[dgfx_vram_id]);
 +
-+		if (get_uint_option("dgpu_enable", 1)) {
++		// NOTE: i pulled this GPU enable sequence from thin air
++		// it sometimes works but is buggy and the GPU disappears in some cases so disabling it by default.
++		// also unrelated to this enable sequence the nouveau driver only works on 6.8-6.9 kernels
++		if (get_uint_option("dgpu_enable", 0)) {
 +			printk(BIOS_DEBUG, "Enabling discrete GPU\n");
-+			// NOTE: i pulled this GPU enable sequence from thin air but it seems to work
 +			gpio_set(GPIO_1R8VIDEO_AON_ON, 1);	// Enable GPU power rail
 +			while (!gpio_get(GPIO_DGFX_PWRGD))	// Wait for power good signal from GPU
 +				;
@@ -804,12 +901,47 @@ index 59a62f484e..4cc0591b4f 100644
 +	mem_cfg->MemorySpdPtr00    = (uintptr_t)blk.spd_array[0];
 +	mem_cfg->MemorySpdPtr10    = (uintptr_t)blk.spd_array[1];
  }
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..4db4202961d0be67b75f52b28f2111d5655595c3
+GIT binary patch
+literal 4106
+zcmeHJU2GIp6h5=FKeKmc=rAo()>4l^U|XP_ZDGYy!|YE>mu}hZ4|PdQy1<TF-O}0?
+zDF)LeX(GlTYoZ2xkUp4bc(Fbi;|s>bV0gipVB&+pHzmFpc`=IXxii}qiqH*)7}PU+
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+zR{e1eASVcGl#mf_O&p%I^1;3af=xDeN0ZnydT=;zHOH-q=O;(UFda)^<j^52Z;c<A
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+z-Vsanq!Y==Kq9plQ+*gu^hf&pJ9?tY{h01cbtR&SfsVM!_*!D4W5>papLuo?gRur|
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+zC9IXSxZB*|#u~SlHnpsY25L#Sxy6ljl16gI)H0f>for?qaszCX;ESpG=pqROFWR~Z
+zTqQzcH(berra`9K(R~0OJ_eeA<Ovbd&vdN3&y}qtJ`q3y6wpP2V}*{Dbi8b357>=>
+z&R-)LYP^U3@%6h}+0)7m-mEOhOM92<j^WbYrTU_kNXz~GCDNT`I|IC3AsFzURKM6k
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+zE`}D<k1}?G;rmSggt5;V{>b#-81u-uS=OJB*=`v}WPMs@ugdtLtbZo6OEUf}>!QL`
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+zp|Em=T_#B53Y|R}mtw!K3mUyWRhytxx_wi^(}HurDkx@L%OlKIA%rq@7%bE{p{Wl~
+zJJ%lV6&>fxBjnbA8G(&P?a8o%P#c~Wo$7|%1UE-$r;6jwt1uejOfMLwF-BDgC-Q+N
+za!Hx;1S&$9!rlNCTsI*IMZ0#Y5aEO7sjIz#jb`S|q7OpRYx`h&=PK}_YnN#poNF=7
+z3yTO|pc0N&G3cozl21Q6c)l0vjm~0uFL)%2_T5RYR1$~dO~u)4px!jFycZNnchPVA
+z!0+Vc_afL{m>rv2PY8{Cma`W{yG~JNJu?;L!#fSLmwRW{8R@gD7Z5~{xvZGpN)U`j
+z^I~=;XVmtVzgSv@Na@HC?lC8A1l2+CU<IqV7J%6_t~L}S#%I}a5R3FZk`D#n4m*-O
+z$?u%iuC_w$3p=)&nXQX^AwrdnK*hRu`Mqc`AzOgztfsBxvm77j5G7KQo#~<Ufx}jQ
+z?|~8PU!d?s-JLd{0Ph}c6J*Zsxd^=dPINEGPS4+NOQoUG&E#4_TUNoTPI5CrmHR%r
+VymGKbcpH8Yo8|ycF3<xZ{s}94r0@U$
+
+literal 0
+HcmV?d00001
+
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads
 new file mode 100644
-index 0000000000..e0a166fe55
+index 0000000000..fcfbd75a92
 --- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads
-@@ -0,0 +1,15 @@
+@@ -0,0 +1,19 @@
 +-- SPDX-License-Identifier: GPL-2.0-or-later
 +
 +with HW.GFX.GMA;
@@ -822,6 +954,10 @@ index 0000000000..e0a166fe55
 +
 +   ports : constant Port_List :=
 +     (eDP,
++      DP1,
++      DP2,
++      HDMI1,
++      HDMI2,
 +      others => Disabled);
 +
 +end GMA.Mainboard;
@@ -1052,13 +1188,25 @@ index 0000000000..d9d103f862
 +AZALIA_ARRAY_SIZES;
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
 new file mode 100644
-index 0000000000..f1f19bc3bf
+index 0000000000..c20f36fbfc
 --- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
-@@ -0,0 +1,114 @@
+@@ -0,0 +1,124 @@
 +# SPDX-License-Identifier: GPL-2.0-only
 +
 +chip soc/intel/skylake
++	# IGD Displays
++	register "gfx" = "GMA_STATIC_DISPLAYS(0)"
++
++	register "panel_cfg" = "{
++		.up_delay_ms		= 200,
++		.down_delay_ms		=  50,
++		.cycle_delay_ms		= 600,
++		.backlight_on_delay_ms	=   1,
++		.backlight_off_delay_ms	= 200,
++		.backlight_pwm_hz	= 200,
++	}"
++
 +        # Power
 +        register "PmConfigSlpS3MinAssert" = "2"         # 50ms
 +        register "PmConfigSlpS4MinAssert" = "1"         # 1s
@@ -1096,8 +1244,6 @@ index 0000000000..f1f19bc3bf
 +			register "SataPortsDevSlp[3]" = "1"
 +		end
 +
-+		# The PCIe lane routing is a bit convoluted on this board:
-+		#
 +		# PCIe controller 1 - 1x4
 +		#   PCIE 1-4   - RP1  - dGPU - CLKOUT0 - CLKREQ0
 +		#
@@ -1170,6 +1316,375 @@ index 0000000000..f1f19bc3bf
 +		end
 +	end
 +end
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads
+new file mode 100644
+index 0000000000..e0a166fe55
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads
+@@ -0,0 +1,15 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (eDP,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c
+new file mode 100644
+index 0000000000..fd9cdbef6b
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c
+@@ -0,0 +1,199 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <soc/gpio.h>
++#include "../../gpio.h"
++
++static const struct pad_config gpio_table[] = {
++	/* ------- GPIO Community 0 ------- */
++
++	/* ------- GPIO Group GPP_A ------- */
++	PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),
++	PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),
++	PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),
++	PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),
++	PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
++	PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
++	PAD_NC(GPP_A11, NONE),
++	PAD_NC(GPP_A12, NONE),
++	PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),
++	PAD_NC(GPP_A16, NONE),
++	PAD_NC(GPP_A17, NONE),
++	PAD_NC(GPP_A18, NONE),
++	PAD_NC(GPP_A19, NONE),
++	PAD_NC(GPP_A20, NONE),
++	PAD_NC(GPP_A21, NONE),
++	PAD_NC(GPP_A22, NONE),
++	PAD_NC(GPP_A23, NONE),
++
++	/* ------- GPIO Group GPP_B ------- */
++	PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1),
++	PAD_NC(GPP_B2, NONE),
++	PAD_NC(GPP_B3, NONE),
++	PAD_CFG_GPI_SCI(GPP_B4, NONE, DEEP, EDGE_SINGLE, INVERT),
++	PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
++	PAD_NC(GPP_B11, NONE),
++	PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
++	PAD_CFG_GPO(GPP_B15, 0, DEEP),
++	PAD_NC(GPP_B16, NONE),
++	PAD_NC(GPP_B17, NONE),
++	PAD_NC(GPP_B18, NONE),
++	PAD_NC(GPP_B19, NONE),
++	PAD_NC(GPP_B20, NONE),
++	PAD_NC(GPP_B21, NONE),
++	PAD_NC(GPP_B22, NONE),
++	PAD_NC(GPP_B23, NONE),
++
++	/* ------- GPIO Community 1 ------- */
++
++	/* ------- GPIO Group GPP_C ------- */
++	PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
++	PAD_CFG_GPO(GPP_C2, 1, DEEP),
++	PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
++	PAD_NC(GPP_C5, NONE),
++	/* GPP_C6 - RESERVED */
++	/* GPP_C7 - RESERVED */
++	PAD_NC(GPP_C8, NONE),
++	PAD_NC(GPP_C9, NONE),
++	PAD_NC(GPP_C10, NONE),
++	PAD_NC(GPP_C11, NONE),
++	PAD_NC(GPP_C12, NONE),
++	PAD_NC(GPP_C13, NONE),
++	PAD_NC(GPP_C14, NONE),
++	PAD_NC(GPP_C15, NONE),
++	PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
++	PAD_NC(GPP_C18, NONE),
++	PAD_NC(GPP_C19, NONE),
++	PAD_CFG_GPO(GPP_C20, 0, DEEP),
++	PAD_CFG_GPO(GPP_C21, 0, DEEP),
++	PAD_CFG_GPI_SCI(GPP_C22, NONE, DEEP, EDGE_SINGLE, INVERT),
++	PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT),
++
++	/* ------- GPIO Group GPP_D ------- */
++	PAD_NC(GPP_D0, NONE),
++	PAD_NC(GPP_D1, NONE),
++	PAD_NC(GPP_D2, NONE),
++	PAD_NC(GPP_D3, NONE),
++	PAD_NC(GPP_D4, NONE),
++	PAD_NC(GPP_D5, NONE),
++	PAD_NC(GPP_D6, NONE),
++	PAD_NC(GPP_D7, NONE),
++	PAD_NC(GPP_D8, NONE),
++	PAD_CFG_GPI_TRIG_OWN(GPP_D9, UP_20K, DEEP, OFF, ACPI),
++	PAD_NC(GPP_D10, NONE),
++	PAD_CFG_GPI_TRIG_OWN(GPP_D11, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_D12, UP_20K, DEEP, OFF, ACPI),
++	PAD_NC(GPP_D13, NONE),
++	PAD_NC(GPP_D14, NONE),
++	PAD_NC(GPP_D15, NONE),
++	PAD_NC(GPP_D16, NONE),
++	PAD_CFG_GPO(GPP_D17, 0, DEEP),
++	PAD_NC(GPP_D18, NONE),
++	PAD_NC(GPP_D19, NONE),
++	PAD_NC(GPP_D20, NONE),
++	PAD_NC(GPP_D21, NONE),
++	PAD_CFG_GPI_TRIG_OWN(GPP_D22, UP_20K, DEEP, OFF, ACPI),
++	PAD_NC(GPP_D23, NONE),
++
++	/* ------- GPIO Group GPP_E ------- */
++	PAD_CFG_GPO(GPP_E0, 1, DEEP),
++	PAD_NC(GPP_E1, NONE),
++	PAD_CFG_NF(GPP_E2, NONE, DEEP, NF1),
++	PAD_CFG_GPI_TRIG_OWN(GPP_E3, NONE, DEEP, EDGE_SINGLE, ACPI),
++	PAD_CFG_GPO(GPP_E4, 1, DEEP),
++	PAD_NC(GPP_E5, NONE),
++	PAD_CFG_NF(GPP_E6, NONE, RSMRST, NF1),
++	PAD_NC(GPP_E7, NONE),
++	PAD_NC(GPP_E8, NONE),
++	PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1),
++	PAD_NC(GPP_E11, NONE),
++	PAD_CFG_GPI_APIC_HIGH(GPP_E12, NONE, DEEP),
++	PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
++	PAD_NC(GPP_E15, NONE),
++	PAD_NC(GPP_E16, NONE),
++	PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
++	PAD_NC(GPP_E18, NONE),
++	PAD_CFG_GPO(GPP_E19, 0, DEEP),
++	PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1),
++	PAD_CFG_TERM_GPO(GPP_E22, 0, UP_20K, RSMRST),
++	PAD_CFG_TERM_GPO(GPP_E23, 0, UP_20K, RSMRST),
++
++	/* ------- GPIO Community 2 ------- */
++
++	/* -------- GPIO Group GPD -------- */
++	PAD_CFG_NF(GPD0, NONE, PWROK, NF1),
++	PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1),
++	PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1),
++	PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),
++	PAD_CFG_NF(GPD4, NONE, PWROK, NF1),
++	PAD_CFG_NF(GPD5, NONE, PWROK, NF1),
++	PAD_CFG_NF(GPD6, NONE, PWROK, NF1),
++	PAD_NC(GPD7, NONE),
++	PAD_CFG_NF(GPD8, NONE, PWROK, NF1),
++	PAD_CFG_NF(GPD9, NONE, PWROK, NF1),
++	PAD_CFG_NF(GPD10, NONE, PWROK, NF1),
++	PAD_CFG_NF(GPD11, NONE, PWROK, NF1),
++
++	/* ------- GPIO Community 3 ------- */
++
++	/* ------- GPIO Group GPP_F ------- */
++	PAD_CFG_GPO(GPP_F0, 0, DEEP),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F1, NONE, DEEP, OFF, ACPI),
++	PAD_CFG_GPO(GPP_F2, 1, DEEP),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F3, NONE, PLTRST, OFF, ACPI),
++	PAD_NC(GPP_F4, NONE),
++	PAD_NC(GPP_F5, NONE),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F6, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F7, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F8, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F9, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F10, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F11, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F12, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F13, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F14, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F15, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F16, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F17, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F18, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F19, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F20, UP_20K, DEEP, OFF, ACPI),
++	PAD_NC(GPP_F21, NONE),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F22, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F23, UP_20K, DEEP, OFF, ACPI),
++
++	/* ------- GPIO Group GPP_G ------- */
++	PAD_NC(GPP_G0, NONE),
++	PAD_NC(GPP_G1, NONE),
++	PAD_NC(GPP_G2, NONE),
++	PAD_NC(GPP_G3, NONE),
++	PAD_CFG_GPO(GPP_G4, 0, DEEP),
++	PAD_CFG_GPO(GPP_G5, 0, DEEP),
++	PAD_CFG_GPO(GPP_G6, 0, DEEP),
++	PAD_CFG_GPI_SCI(GPP_G7, NONE, DEEP, LEVEL, INVERT),
++};
++
++void variant_config_gpios(void)
++{
++	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
++}
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c
+new file mode 100644
+index 0000000000..d9d103f862
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c
+@@ -0,0 +1,10 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++};
++
++const u32 pc_beep_verbs[] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
+new file mode 100644
+index 0000000000..2cac8c4a75
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
+@@ -0,0 +1,121 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++chip soc/intel/skylake
++	# IGD Displays
++	register "gfx" = "GMA_STATIC_DISPLAYS(0)"
++
++	register "panel_cfg" = "{
++		.up_delay_ms		= 200,
++		.down_delay_ms		=  50,
++		.cycle_delay_ms		= 600,
++		.backlight_on_delay_ms	=   1,
++		.backlight_off_delay_ms	= 200,
++		.backlight_pwm_hz	= 200,
++	}"
++
++        # Power
++        register "PmConfigSlpS3MinAssert" = "2"         # 50ms
++        register "PmConfigSlpS4MinAssert" = "1"         # 1s
++        register "PmConfigSlpSusMinAssert" = "3"        # 500ms
++        register "PmConfigSlpAMinAssert" = "3"          # 2s
++
++	device domain 0 on
++		device ref south_xhci on
++			# TODO: USB ports
++			register "usb2_ports" = "{
++				[0] = USB2_PORT_MID(OC_SKIP),
++				[1] = USB2_PORT_MID(OC_SKIP),
++				[2] = USB2_PORT_MID(OC_SKIP),
++				[3] = USB2_PORT_MID(OC_SKIP),
++				[4] = USB2_PORT_MID(OC_SKIP),
++				[5] = USB2_PORT_MID(OC_SKIP),
++				[6] = USB2_PORT_MID(OC_SKIP),
++				[7] = USB2_PORT_MID(OC_SKIP),
++				[8] = USB2_PORT_MID(OC_SKIP),
++				[9] = USB2_PORT_MID(OC_SKIP),
++			}"
++			register "usb3_ports" = "{
++				[0] = USB3_PORT_DEFAULT(OC_SKIP),
++				[1] = USB3_PORT_DEFAULT(OC_SKIP),
++				[2] = USB3_PORT_DEFAULT(OC_SKIP),
++				[3] = USB3_PORT_DEFAULT(OC_SKIP),
++			}"
++		end
++
++		device ref sata on
++			# TODO: sata ports
++		end
++
++		# PCIe controller 1 - 1x2+2x1
++		#   PCIE 1-2   - RP1  - dGPU - CLKOUT0 - CLKREQ0
++		#   PCIE 4     - RP4  - WWAN - CLKOUT1 - CLKREQ1
++		#
++		# PCIe controller 2 - 2x1+1x2 (lane reversal)
++		#   PCIE 5     - GBE  - GBE  - CLKOUT2 - CLKREQ2 (clobbers RP8)
++		#   PCIE 6     - RP7  - WLAN - CLKOUT3 - CLKREQ3
++		#   PCIE 7-8   - RP5  - TB3  - CLKOUT4 - CLKREQ4
++		#
++		# PCIe controller 3 - 1x4 (lane reversal)
++		#   PCIE 9-12  - RP9  - SSD  - CLKOUT5 - CLKREQ5
++
++		# dGPU - x2
++		device ref pcie_rp1 on
++			register "PcieRpEnable[0]"			= "1"
++			register "PcieRpClkReqSupport[0]"		= "1"
++			register "PcieRpClkReqNumber[0]"		= "0"
++			register "PcieRpClkSrcNumber[0]"		= "0"
++			register "PcieRpAdvancedErrorReporting[0]"	= "1"
++			register "PcieRpLtrEnable[0]"			= "1"
++		end
++
++		# M.2 WWAN - x1
++		device ref pcie_rp4 on
++			register "PcieRpEnable[3]"			= "1"
++			register "PcieRpClkReqSupport[3]"		= "1"
++			register "PcieRpClkReqNumber[3]"		= "1"
++			register "PcieRpClkSrcNumber[3]"		= "1"
++			register "PcieRpAdvancedErrorReporting[3]"	= "1"
++			register "PcieRpLtrEnable[3]"			= "1"
++		end
++
++		# Ethernet (clobbers RP8)
++		device ref gbe on
++			register "LanClkReqSupported"			= "1"
++			register "LanClkReqNumber"			= "2"
++			register "EnableLanLtr"				= "1"
++			register "EnableLanK1Off"			= "1"
++		end
++
++		# M.2 WLAN - x1
++		device ref pcie_rp7 on
++			register "PcieRpEnable[6]"			= "1"
++			register "PcieRpClkReqSupport[6]"		= "1"
++			register "PcieRpClkReqNumber[6]"		= "3"
++			register "PcieRpClkSrcNumber[6]"		= "3"
++			register "PcieRpAdvancedErrorReporting[6]"	= "1"
++			register "PcieRpLtrEnable[6]"			= "1"
++		end
++
++		# TB3 (Alpine Ridge LP) - x2
++		device ref pcie_rp5 on
++			register "PcieRpEnable[4]"			= "1"
++			register "PcieRpClkReqSupport[4]"		= "1"
++			register "PcieRpClkReqNumber[4]"		= "4"
++			register "PcieRpClkSrcNumber[4]"		= "4"
++			register "PcieRpAdvancedErrorReporting[4]"	= "1"
++			register "PcieRpLtrEnable[4]"			= "1"
++			register "PcieRpHotPlug[4]"			= "1"
++		end
++
++		# M.2 caddy - x2
++		device ref pcie_rp9 on
++			register "PcieRpEnable[8]"			= "1"
++			register "PcieRpClkReqSupport[8]"		= "1"
++			register "PcieRpClkReqNumber[8]"		= "5"
++			register "PcieRpClkSrcNumber[8]"		= "5"
++			register "PcieRpAdvancedErrorReporting[8]"	= "1"
++			register "PcieRpLtrEnable[8]"			= "1"
++			register "PcieRpHotPlug[8]"			= "1"
++		end
++	end
++end
 -- 
 2.39.5
 
diff --git a/config/coreboot/next/patches/0009-lenovo-t480-Add-MAINBOARD_USES_IFD_GBE_REGION.patch b/config/coreboot/next/patches/0009-lenovo-t480-Add-MAINBOARD_USES_IFD_GBE_REGION.patch
index 8ec2cde9..ee0e2785 100644
--- a/config/coreboot/next/patches/0009-lenovo-t480-Add-MAINBOARD_USES_IFD_GBE_REGION.patch
+++ b/config/coreboot/next/patches/0009-lenovo-t480-Add-MAINBOARD_USES_IFD_GBE_REGION.patch
@@ -1,7 +1,7 @@
-From 519d79d0d33a63082e474938fa2850044095732e Mon Sep 17 00:00:00 2001
+From 4bd27d11c2ccd65a3b2a2e465aab9922e8aee31a Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 1 Dec 2024 07:16:20 +0000
-Subject: [PATCH 1/1] lenovo/t480: Add MAINBOARD_USES_IFD_GBE_REGION
+Subject: [PATCH 9/9] lenovo/t480: Add MAINBOARD_USES_IFD_GBE_REGION
 
 This board does use a GbE region, so support it in menuconfig.
 
@@ -11,7 +11,7 @@ Signed-off-by: Leah Rowe <info@minifree.org>
  1 file changed, 1 insertion(+)
 
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
-index 08273c5d27..a83e17b71f 100644
+index 13d71670e3..a3593e3785 100644
 --- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
 @@ -15,6 +15,7 @@ config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
diff --git a/config/coreboot/next/patches/0010-add-vbt-file-for-thinkpad-t480s.patch b/config/coreboot/next/patches/0010-add-vbt-file-for-thinkpad-t480s.patch
new file mode 100644
index 00000000..b9bde459
--- /dev/null
+++ b/config/coreboot/next/patches/0010-add-vbt-file-for-thinkpad-t480s.patch
@@ -0,0 +1,49 @@
+From c865010771f413d532713319b7b01e9da9dbf495 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Mon, 2 Dec 2024 03:12:52 +0000
+Subject: [PATCH 1/1] add vbt file for thinkpad t480s
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ .../sklkbl_thinkpad/variants/t480s/data.vbt      | Bin 0 -> 4106 bytes
+ 1 file changed, 0 insertions(+), 0 deletions(-)
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..47732e37d5b2bad4e674fd10eafa605d26f97840
+GIT binary patch
+literal 4106
+zcmeHJUu+a*5TCu>yW9JAmoD2P<t%lC2CfC#y%tU^HSGOq>9tqx`iFWXCLD09R<E?S
+zMT)`nNScT-%9*GEA8a2?G`v`!jPV6yVlcd5OnC6Y;F}U&jJz1db9VRID@E)DLk#NN
+z&9^i2&Hiq_`R2ZF8ipf7IM{nI5$^585@kULrrx0OPKv~ngNI__q41$dA{p()ui+v1
+zw(9rm09lUPAP4nOTm0CRnF|aw5^SQSH<G}<u_Gfnvn6IuK0h@!j;UxI!$*&rIdkIh
+zl$piB;eBDWa1|CgK9bAg{^O%Z%!ziiz{neeJDb~fBI?1GV5p^44?a$ETl=n1d+;%Z
+z#X6(OzEnIB9*QUTV{!mv@xk!mU}s+>aS&4j$?kY0KGYdgn6;MZ*!anbk!PNr!a%eU
+zTXkLEL3ly5L&oUX#CS7?b2%Kad?s<goHQq1G_%bLv);c5qQC)gZtxnw!L3%1MWI_X
+z0wUImYD_R11gsI%l%Zw})KN_c#&!YgM3v;Up{7+s1=lXlB>-#@;mhg8>>>#S&)d2I
+zmP&-g0$k02szSQj(Y*j}YYtQnDH0;2ui<!ko-28Y){6ilAcrmz951v4RTWQ_ye!or
+z4xOJya#Sr7{o)%XFUfJCndM%KM(c^ol_hzlb*1h&uC%Vy%U(P!_qUfwcb4r;SmPQ_
+zhxf($vVo)we+jxogb`7NQ^aS9eQpNT#2bmX5(kO*5O)$Mi4PJVB_1U{L42C{HR894
+z=ZJk70(Q~o{*COiRR#_fix0XaS3?igAuo2!)<NF8ARGWF&M7=h16xZaS|UxpZA)w3
+z1CQUC@^&oxtbG2HGk&WA9=_qa;$?8fdy_j;eY+H3ciR5U?|$2?oT;mPoV=Dx&CwUf
+zv~zYWs{cR#vl*!ChO54O0k3UT#mpur4fXeCdE_aoNtZ|mgF!ck3Nmy<0BRuy4NwCa
+zNZDP7XrHsU<-0NyB2=wXwgEqZPukelExAY+hyWVj0{)~A=X~17KK7XpzxQcB``9fX
+zZf4pp#`ZEanRbG)(+odg+NX?t!SF|>{mPhI!flfFgv9nqI4Wr~5_?s`k0kALiCvcP
+zCrRUFrpVYPYn?Jn%6MGXUXj_GGJYa!U&-tn8Gn&ANnz_0+@olH3VTw)mlf@-!p<v7
+zljhF5u5tObYwR{boRI14NxNkGd6QG=>8{!e#p0ct5}M(h16D>p?OGjSz6v3juERjS
+z#z{?mXvVqrXs_rvUmYR40gNzg(QD6y9E94?4DWO|6eb83LI-smcVC6x1n2reH}rAp
+zLM);f=tWDCr``UF5T>!;PYu^H1g>EBP8A}2*fM>s-@nC3pDV|}6+CtfhG(II7`pcw
+z`jLfJ!?;*R@Bp=Nw2EPOC7FEs(cugIP_K6tN_$~tvS8nx6iOv|IMrO3&-m*N9ZP#b
+znG^~>I|l1cUVSeD9r^k3h0TP}WWD9=MZxY<<azgO1@-W5<NTHW*-d)t{Q4yX9_+?a
+zHawLe=uO6@%xqS#?JxafX%#$`BhkIqq>Z3B2yU!k71#YRpThOJtVheMDA50rV#s@U
+z+nKbA{O(olYR}icuzQD*-cjBQ9;%!eMDVP>7mWsF@=%>o)wSgq=n%DHNOYwRr4Ao6
+zbNdgEn*RdDS>Rud+fIY0N8JkP3q6;>8o%R(CE2n3?Xg%qP+U%~6|{XFyxv7Y#;J2Z
+XK$lk*wsY^m4}9|iz?mg_AjCfat$CyH
+
+literal 0
+HcmV?d00001
+
+-- 
+2.39.5
+
diff --git a/config/coreboot/next/patches/0010-t480-hack-turn-off-the-dgpu.patch b/config/coreboot/next/patches/0010-t480-hack-turn-off-the-dgpu.patch
deleted file mode 100644
index eaddf398..00000000
--- a/config/coreboot/next/patches/0010-t480-hack-turn-off-the-dgpu.patch
+++ /dev/null
@@ -1,45 +0,0 @@
-From 7c386cbe38fc42c036bd14b9048b13f1a1d45877 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sun, 1 Dec 2024 23:40:08 +0000
-Subject: [PATCH 1/1] t480 hack: turn off the dgpu
-
-too buggy, in mkukri's testing. just turn it off.
-
-thanks go to mkukri for showing me how to turn this off.
-as nicholas explained to me, if there's no nvram on this board,
-coreboot can't use a static option table, because that works by
-copying those settings to the nvram.
-
-so we just have to hardcode for the time being
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- 3rdparty/vboot                                  | 2 +-
- src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c | 4 +++-
- 2 files changed, 4 insertions(+), 2 deletions(-)
-
-diff --git a/3rdparty/vboot b/3rdparty/vboot
-index f1f70f46dc..1f53ea9b7f 160000
---- a/3rdparty/vboot
-+++ b/3rdparty/vboot
-@@ -1 +1 @@
--Subproject commit f1f70f46dc5482bb7c654e53ed58d4001e386df2
-+Subproject commit 1f53ea9b7f398884f722fca046129eae5ea6a71c
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
-index 9526642c57..bf5da12689 100644
---- a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
-@@ -31,7 +31,9 @@ void mainboard_silicon_init_params(FSP_SIL_UPD *params)
- 		dgfx_vram_id = gpio_get(GPIO_DGFX_VRAM_ID0) | gpio_get(GPIO_DGFX_VRAM_ID1) << 1;
- 		printk(BIOS_DEBUG, "Discrete GPU present with %s VRAM\n", dgfx_vram_id_str[dgfx_vram_id]);
- 
--		if (get_uint_option("dgpu_enable", 1)) {
-+//		if (get_uint_option("dgpu_enable", 1)) {
-+		if (get_uint_option("dgpu_enable", 0)) { // HACK: no option table due to no nvram.
-+						// (turn off the dgpu by default due to bugs)
- 			printk(BIOS_DEBUG, "Enabling discrete GPU\n");
- 			// NOTE: i pulled this GPU enable sequence from thin air but it seems to work
- 			gpio_set(GPIO_1R8VIDEO_AON_ON, 1);	// Enable GPU power rail
--- 
-2.39.5
-
diff --git a/config/coreboot/t480_fsp_16mb/config/normal b/config/coreboot/t480_fsp_16mb/config/normal
index 79b67cac..6ea85a24 100644
--- a/config/coreboot/t480_fsp_16mb/config/normal
+++ b/config/coreboot/t480_fsp_16mb/config/normal
@@ -177,6 +177,7 @@ CONFIG_HAVE_IFD_BIN=y
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_E460 is not set
 CONFIG_BOARD_LENOVO_T480=y
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
@@ -576,6 +577,7 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 # CONFIG_VGA_BIOS_DGPU is not set
+CONFIG_INTEL_GMA_HAVE_VBT=y
 # CONFIG_INTEL_GMA_ADD_VBT is not set
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..8d33544d
--- /dev/null
+++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
@@ -0,0 +1,859 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_FAMILY="T480S"
+CONFIG_MAINBOARD_PART_NUMBER="T480S"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=2
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0xEEC000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="t480s"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480S"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+CONFIG_USE_PM_ACPI_TIMER=y
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_USE_LEGACY_8254_TIMER=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t480s/ifd_16"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t480s/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t480s/gbe"
+CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
+CONFIG_HAVE_IFD_BIN=y
+# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_E460 is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+CONFIG_BOARD_LENOVO_T480S=y
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
+CONFIG_TTYS0_BAUD=115200
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
+CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
+CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x200000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_BERT_SIZE=0x0
+CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IFD_CHIPSET="sklkbl"
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_MAX_ROOT_PORTS=24
+CONFIG_PCR_BASE_ADDRESS=0xfd000000
+CONFIG_CPU_BCLK_MHZ=100
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
+CONFIG_CPU_XTAL_HZ=24000000
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
+CONFIG_SOC_INTEL_I2C_DEV_MAX=6
+# CONFIG_ENABLE_SATA_TEST_MODE is not set
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
+CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_FSP_PUBLISH_MBP_HOB=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
+CONFIG_MAX_HECI_DEVICES=5
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_PAM0_REGISTER=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
+CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
+CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
+CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
+CONFIG_SOC_INTEL_KABYLAKE=y
+CONFIG_FSP_T_LOCATION=0xfffe0000
+CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
+CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code for IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
+CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
+# CONFIG_USE_COREBOOT_MP_INIT is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
+CONFIG_INTEL_CAR_NEM_ENHANCED=y
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_INTEL_KEYLOCKER is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
+CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
+CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
+CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
+CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
+CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
+CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
+CONFIG_SOC_INTEL_CSE_RW_FILE=""
+CONFIG_SOC_INTEL_CSE_RW_VERSION=""
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
+CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
+CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
+CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
+# CONFIG_SOC_INTEL_DISABLE_IGD is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
+CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
+CONFIG_SA_ENABLE_DPR=y
+CONFIG_HAVE_CAPID_A_REGISTER=y
+CONFIG_HAVE_BDSM_BGSM_REGISTER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
+
+#
+# Intel SoC Common PCH Code
+#
+CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
+CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
+CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
+CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
+
+#
+# Intel SoC Common coreboot stages and non-IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BASECODE=y
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+CONFIG_PAVP=y
+# CONFIG_MMA is not set
+CONFIG_SOC_INTEL_COMMON_NHLT=y
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_PARALLEL_MP_AP_WORK=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
+CONFIG_H8_HAS_LEDLOGO=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_UDK_BASE=y
+CONFIG_UDK_2017_BINDING=y
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_202005_VERSION=202005
+CONFIG_UDK_202111_VERSION=202111
+CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_202305_VERSION=202305
+CONFIG_UDK_VERSION=2017
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_HAVE_FSP_GOP=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y
+# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set
+# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set
+# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_DRIVERS_EFI_FW_INFO is not set
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_DESIGNWARE=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_FSP_USE_REPO=y
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+# CONFIG_BMP_LOGO is not set
+CONFIG_PLATFORM_USES_FSP2_0=y
+CONFIG_PLATFORM_USES_FSP2_X86_32=y
+CONFIG_HAVE_INTEL_FSP_REPO=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_S_CBFS="fsps.bin"
+CONFIG_FSP_M_CBFS="fspm.bin"
+CONFIG_FSP_FULL_FD=y
+CONFIG_FSP_T_RESERVED_SIZE=0x0
+CONFIG_FSP_M_XIP=y
+CONFIG_HAVE_FSP_LOGO_SUPPORT=y
+CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
+CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
+CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
+CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
+CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
+# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Skylake"
+CONFIG_GFX_GMA_PCH="Sunrise_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_USB_ACPI=y
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_TPM1 is not set
+CONFIG_TPM2=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM2=y
+# CONFIG_DEBUG_TPM is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_CUSTOM_MADT=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_ACPI_LPIT=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_ACPI_S1_NOT_SUPPORTED=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_IOAPIC=y
+CONFIG_ACPI_NHLT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
+# CONFIG_DISPLAY_FSP_HEADER is not set
+# CONFIG_VERIFY_HOBS is not set
+# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
+CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
+# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+CONFIG_HAVE_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_SPD_READ_BY_WORD=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..8714de3e
--- /dev/null
+++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
@@ -0,0 +1,852 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_FAMILY="T480S"
+CONFIG_MAINBOARD_PART_NUMBER="T480S"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=2
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0xEEC000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="t480s"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480S"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+CONFIG_USE_PM_ACPI_TIMER=y
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_USE_LEGACY_8254_TIMER=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t480s/ifd_16"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t480s/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t480s/gbe"
+CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
+CONFIG_HAVE_IFD_BIN=y
+# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_E460 is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+CONFIG_BOARD_LENOVO_T480S=y
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
+CONFIG_TTYS0_BAUD=115200
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
+CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
+CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x200000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_BERT_SIZE=0x0
+CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IFD_CHIPSET="sklkbl"
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_MAX_ROOT_PORTS=24
+CONFIG_PCR_BASE_ADDRESS=0xfd000000
+CONFIG_CPU_BCLK_MHZ=100
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
+CONFIG_CPU_XTAL_HZ=24000000
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
+CONFIG_SOC_INTEL_I2C_DEV_MAX=6
+# CONFIG_ENABLE_SATA_TEST_MODE is not set
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
+CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_FSP_PUBLISH_MBP_HOB=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
+CONFIG_MAX_HECI_DEVICES=5
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_PAM0_REGISTER=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
+CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
+CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
+CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
+CONFIG_SOC_INTEL_KABYLAKE=y
+CONFIG_FSP_T_LOCATION=0xfffe0000
+CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
+CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code for IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
+CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
+# CONFIG_USE_COREBOOT_MP_INIT is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
+CONFIG_INTEL_CAR_NEM_ENHANCED=y
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_INTEL_KEYLOCKER is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
+CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
+CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
+CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
+CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
+CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
+CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
+CONFIG_SOC_INTEL_CSE_RW_FILE=""
+CONFIG_SOC_INTEL_CSE_RW_VERSION=""
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
+CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
+CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
+CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
+# CONFIG_SOC_INTEL_DISABLE_IGD is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
+CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
+CONFIG_SA_ENABLE_DPR=y
+CONFIG_HAVE_CAPID_A_REGISTER=y
+CONFIG_HAVE_BDSM_BGSM_REGISTER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
+
+#
+# Intel SoC Common PCH Code
+#
+CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
+CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
+CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
+CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
+
+#
+# Intel SoC Common coreboot stages and non-IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BASECODE=y
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+CONFIG_PAVP=y
+# CONFIG_MMA is not set
+CONFIG_SOC_INTEL_COMMON_NHLT=y
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_PARALLEL_MP_AP_WORK=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
+CONFIG_H8_HAS_LEDLOGO=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_UDK_BASE=y
+CONFIG_UDK_2017_BINDING=y
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_202005_VERSION=202005
+CONFIG_UDK_202111_VERSION=202111
+CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_202305_VERSION=202305
+CONFIG_UDK_VERSION=2017
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_HAVE_FSP_GOP=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_DRIVERS_EFI_FW_INFO is not set
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_DESIGNWARE=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_FSP_USE_REPO=y
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+# CONFIG_BMP_LOGO is not set
+CONFIG_PLATFORM_USES_FSP2_0=y
+CONFIG_PLATFORM_USES_FSP2_X86_32=y
+CONFIG_HAVE_INTEL_FSP_REPO=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_S_CBFS="fsps.bin"
+CONFIG_FSP_M_CBFS="fspm.bin"
+CONFIG_FSP_FULL_FD=y
+CONFIG_FSP_T_RESERVED_SIZE=0x0
+CONFIG_FSP_M_XIP=y
+CONFIG_HAVE_FSP_LOGO_SUPPORT=y
+CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
+CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
+CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
+CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
+CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
+# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Skylake"
+CONFIG_GFX_GMA_PCH="Sunrise_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_USB_ACPI=y
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_TPM1 is not set
+CONFIG_TPM2=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM2=y
+# CONFIG_DEBUG_TPM is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_CUSTOM_MADT=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_ACPI_LPIT=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_ACPI_S1_NOT_SUPPORTED=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_IOAPIC=y
+CONFIG_ACPI_NHLT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
+# CONFIG_DISPLAY_FSP_HEADER is not set
+# CONFIG_VERIFY_HOBS is not set
+# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
+CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
+# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+CONFIG_HAVE_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_SPD_READ_BY_WORD=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t480s_fsp_16mb/target.cfg b/config/coreboot/t480s_fsp_16mb/target.cfg
new file mode 100644
index 00000000..05450bf6
--- /dev/null
+++ b/config/coreboot/t480s_fsp_16mb/target.cfg
@@ -0,0 +1,11 @@
+tree="next"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="t480s"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+IFD_platform="sklkbl"
+payload_uboot_amd64="y"
diff --git a/config/deguard/patches/0001-t480s-delta.patch b/config/deguard/patches/0001-t480s-delta.patch
new file mode 100644
index 00000000..741ee08d
--- /dev/null
+++ b/config/deguard/patches/0001-t480s-delta.patch
@@ -0,0 +1,221 @@
+From 054a4ffdfef9a649f5668c379cb68b5342d02e3f Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Mon, 2 Dec 2024 01:59:43 +0000
+Subject: [PATCH 1/1] t480s delta
+
+thank you mkukri for guiding me through this
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ .../thinkpad_t480s/home/bup/bup_sku/plat_n_sku    | Bin 0 -> 4 bytes
+ data/delta/thinkpad_t480s/home/bup/mbp            | Bin 0 -> 44 bytes
+ data/delta/thinkpad_t480s/home/gpio/csme_pins     |   0
+ data/delta/thinkpad_t480s/home/icc/dynregs        | Bin 0 -> 28 bytes
+ data/delta/thinkpad_t480s/home/icc/header         | Bin 0 -> 4 bytes
+ data/delta/thinkpad_t480s/home/icc/namestr        | Bin 0 -> 48 bytes
+ data/delta/thinkpad_t480s/home/icc/prof1          |   0
+ data/delta/thinkpad_t480s/home/icc/prof10         |   0
+ data/delta/thinkpad_t480s/home/icc/prof2          |   0
+ data/delta/thinkpad_t480s/home/icc/prof3          |   0
+ data/delta/thinkpad_t480s/home/icc/prof4          |   0
+ data/delta/thinkpad_t480s/home/icc/prof5          |   0
+ data/delta/thinkpad_t480s/home/icc/prof6          |   0
+ data/delta/thinkpad_t480s/home/icc/prof7          |   0
+ data/delta/thinkpad_t480s/home/icc/prof8          |   0
+ data/delta/thinkpad_t480s/home/icc/prof9          |   0
+ data/delta/thinkpad_t480s/home/mca/eom            |   1 +
+ data/delta/thinkpad_t480s/home/mca/ish_policy     | Bin 0 -> 1 bytes
+ data/delta/thinkpad_t480s/home/mctp/device_ports  | Bin 0 -> 4 bytes
+ .../thinkpad_t480s/home/policy/Bist/auto_config   | Bin 0 -> 4 bytes
+ .../thinkpad_t480s/home/policy/cfgmgr/cfg_rules   | Bin 0 -> 660 bytes
+ .../thinkpad_t480s/home/policy/hci/sysintid1      |   1 +
+ .../thinkpad_t480s/home/policy/hci/sysintid2      |   1 +
+ .../thinkpad_t480s/home/policy/hci/sysintid3      |   1 +
+ 24 files changed, 4 insertions(+)
+ create mode 100644 data/delta/thinkpad_t480s/home/bup/bup_sku/plat_n_sku
+ create mode 100644 data/delta/thinkpad_t480s/home/bup/mbp
+ create mode 100644 data/delta/thinkpad_t480s/home/gpio/csme_pins
+ create mode 100644 data/delta/thinkpad_t480s/home/icc/dynregs
+ create mode 100644 data/delta/thinkpad_t480s/home/icc/header
+ create mode 100644 data/delta/thinkpad_t480s/home/icc/namestr
+ create mode 100644 data/delta/thinkpad_t480s/home/icc/prof1
+ create mode 100644 data/delta/thinkpad_t480s/home/icc/prof10
+ create mode 100644 data/delta/thinkpad_t480s/home/icc/prof2
+ create mode 100644 data/delta/thinkpad_t480s/home/icc/prof3
+ create mode 100644 data/delta/thinkpad_t480s/home/icc/prof4
+ create mode 100644 data/delta/thinkpad_t480s/home/icc/prof5
+ create mode 100644 data/delta/thinkpad_t480s/home/icc/prof6
+ create mode 100644 data/delta/thinkpad_t480s/home/icc/prof7
+ create mode 100644 data/delta/thinkpad_t480s/home/icc/prof8
+ create mode 100644 data/delta/thinkpad_t480s/home/icc/prof9
+ create mode 100644 data/delta/thinkpad_t480s/home/mca/eom
+ create mode 100644 data/delta/thinkpad_t480s/home/mca/ish_policy
+ create mode 100644 data/delta/thinkpad_t480s/home/mctp/device_ports
+ create mode 100644 data/delta/thinkpad_t480s/home/policy/Bist/auto_config
+ create mode 100644 data/delta/thinkpad_t480s/home/policy/cfgmgr/cfg_rules
+ create mode 100644 data/delta/thinkpad_t480s/home/policy/hci/sysintid1
+ create mode 100644 data/delta/thinkpad_t480s/home/policy/hci/sysintid2
+ create mode 100644 data/delta/thinkpad_t480s/home/policy/hci/sysintid3
+
+diff --git a/data/delta/thinkpad_t480s/home/bup/bup_sku/plat_n_sku b/data/delta/thinkpad_t480s/home/bup/bup_sku/plat_n_sku
+new file mode 100644
+index 0000000000000000000000000000000000000000..d0514be7b35d1d6ca7a4e09603bf1ce50d764720
+GIT binary patch
+literal 4
+LcmZQ(U}yjU0FVHL
+
+literal 0
+HcmV?d00001
+
+diff --git a/data/delta/thinkpad_t480s/home/bup/mbp b/data/delta/thinkpad_t480s/home/bup/mbp
+new file mode 100644
+index 0000000000000000000000000000000000000000..f5f419c14e67bb40eca97369288637203849b165
+GIT binary patch
+literal 44
+tcmd;PWnf_BU}69PMph;UMP^|~MkXc(2O$ALMouOM=YW5WY>Z&}1^_We1G@kK
+
+literal 0
+HcmV?d00001
+
+diff --git a/data/delta/thinkpad_t480s/home/gpio/csme_pins b/data/delta/thinkpad_t480s/home/gpio/csme_pins
+new file mode 100644
+index 0000000..e69de29
+diff --git a/data/delta/thinkpad_t480s/home/icc/dynregs b/data/delta/thinkpad_t480s/home/icc/dynregs
+new file mode 100644
+index 0000000000000000000000000000000000000000..912ab3579185250403dc1db1cb95ed24b1e7f2ab
+GIT binary patch
+literal 28
+icmb1PU}RuoU|?VpV7)W*<V*&8AX`m<@s5B|NErY;Qw3}Q
+
+literal 0
+HcmV?d00001
+
+diff --git a/data/delta/thinkpad_t480s/home/icc/header b/data/delta/thinkpad_t480s/home/icc/header
+new file mode 100644
+index 0000000000000000000000000000000000000000..4b75556082e2c00ea8a888450d05627b20f0ec61
+GIT binary patch
+literal 4
+LcmZQ%U|<9Q00{sC
+
+literal 0
+HcmV?d00001
+
+diff --git a/data/delta/thinkpad_t480s/home/icc/namestr b/data/delta/thinkpad_t480s/home/icc/namestr
+new file mode 100644
+index 0000000000000000000000000000000000000000..b0f3735c08f70e800a5dcce8ba8a2ef5ac9b075e
+GIT binary patch
+literal 48
+ZcmeZC&C4&#XTSi#C5d?{iA5>s5&*Dj1*HH0
+
+literal 0
+HcmV?d00001
+
+diff --git a/data/delta/thinkpad_t480s/home/icc/prof1 b/data/delta/thinkpad_t480s/home/icc/prof1
+new file mode 100644
+index 0000000..e69de29
+diff --git a/data/delta/thinkpad_t480s/home/icc/prof10 b/data/delta/thinkpad_t480s/home/icc/prof10
+new file mode 100644
+index 0000000..e69de29
+diff --git a/data/delta/thinkpad_t480s/home/icc/prof2 b/data/delta/thinkpad_t480s/home/icc/prof2
+new file mode 100644
+index 0000000..e69de29
+diff --git a/data/delta/thinkpad_t480s/home/icc/prof3 b/data/delta/thinkpad_t480s/home/icc/prof3
+new file mode 100644
+index 0000000..e69de29
+diff --git a/data/delta/thinkpad_t480s/home/icc/prof4 b/data/delta/thinkpad_t480s/home/icc/prof4
+new file mode 100644
+index 0000000..e69de29
+diff --git a/data/delta/thinkpad_t480s/home/icc/prof5 b/data/delta/thinkpad_t480s/home/icc/prof5
+new file mode 100644
+index 0000000..e69de29
+diff --git a/data/delta/thinkpad_t480s/home/icc/prof6 b/data/delta/thinkpad_t480s/home/icc/prof6
+new file mode 100644
+index 0000000..e69de29
+diff --git a/data/delta/thinkpad_t480s/home/icc/prof7 b/data/delta/thinkpad_t480s/home/icc/prof7
+new file mode 100644
+index 0000000..e69de29
+diff --git a/data/delta/thinkpad_t480s/home/icc/prof8 b/data/delta/thinkpad_t480s/home/icc/prof8
+new file mode 100644
+index 0000000..e69de29
+diff --git a/data/delta/thinkpad_t480s/home/icc/prof9 b/data/delta/thinkpad_t480s/home/icc/prof9
+new file mode 100644
+index 0000000..e69de29
+diff --git a/data/delta/thinkpad_t480s/home/mca/eom b/data/delta/thinkpad_t480s/home/mca/eom
+new file mode 100644
+index 0000000..6b2aaa7
+--- /dev/null
++++ b/data/delta/thinkpad_t480s/home/mca/eom
+@@ -0,0 +1 @@
++

+\ No newline at end of file
+diff --git a/data/delta/thinkpad_t480s/home/mca/ish_policy b/data/delta/thinkpad_t480s/home/mca/ish_policy
+new file mode 100644
+index 0000000000000000000000000000000000000000..f76dd238ade08917e6712764a16a22005a50573d
+GIT binary patch
+literal 1
+IcmZPo000310RR91
+
+literal 0
+HcmV?d00001
+
+diff --git a/data/delta/thinkpad_t480s/home/mctp/device_ports b/data/delta/thinkpad_t480s/home/mctp/device_ports
+new file mode 100644
+index 0000000000000000000000000000000000000000..593f4708db84ac8fd0f5cc47c634f38c013fe9e4
+GIT binary patch
+literal 4
+LcmZQzU|;|M00aO5
+
+literal 0
+HcmV?d00001
+
+diff --git a/data/delta/thinkpad_t480s/home/policy/Bist/auto_config b/data/delta/thinkpad_t480s/home/policy/Bist/auto_config
+new file mode 100644
+index 0000000000000000000000000000000000000000..f66c9cf4c9672fa2832bce76f4082fd97b823506
+GIT binary patch
+literal 4
+LcmZQ%U|;|M00;mA
+
+literal 0
+HcmV?d00001
+
+diff --git a/data/delta/thinkpad_t480s/home/policy/cfgmgr/cfg_rules b/data/delta/thinkpad_t480s/home/policy/cfgmgr/cfg_rules
+new file mode 100644
+index 0000000000000000000000000000000000000000..6243fe92703b15ca1f7f387ba5c4d899a79c569b
+GIT binary patch
+literal 660
+zcmY+=OHKk|5Cq^>K!kw6@D_P1@<u>igPOP^;RM`;4F~aZ-U6s51t}Jj`cnC)|Cu&3
+zOPGZhK{|6oBkY#;E<__NOnV=p5q3v=9~Iw=W3<os$56i)yfV5=pA<icQ?!3qn%*HZ
+z^Z^;r2+N9dw4cd~3*sW}|5Bn6R;Imwq~pj6?K7X~ul0UarJJGbvPS#6b#Vj6j!ye;
+z(%<X-wsr22ZTk0T^Y=_6?1lE39X!5I_bYpZb;UjSyz{<zAZLc+k$BAWK7S(pn|Lao
+NiRa>X@rU?Rd<6FI7iRzf
+
+literal 0
+HcmV?d00001
+
+diff --git a/data/delta/thinkpad_t480s/home/policy/hci/sysintid1 b/data/delta/thinkpad_t480s/home/policy/hci/sysintid1
+new file mode 100644
+index 0000000..b508e57
+--- /dev/null
++++ b/data/delta/thinkpad_t480s/home/policy/hci/sysintid1
+@@ -0,0 +1 @@
++Zâ�#
+\ No newline at end of file
+diff --git a/data/delta/thinkpad_t480s/home/policy/hci/sysintid2 b/data/delta/thinkpad_t480s/home/policy/hci/sysintid2
+new file mode 100644
+index 0000000..9611653
+--- /dev/null
++++ b/data/delta/thinkpad_t480s/home/policy/hci/sysintid2
+@@ -0,0 +1 @@
++²R˦
+\ No newline at end of file
+diff --git a/data/delta/thinkpad_t480s/home/policy/hci/sysintid3 b/data/delta/thinkpad_t480s/home/policy/hci/sysintid3
+new file mode 100644
+index 0000000..7f55b1e
+--- /dev/null
++++ b/data/delta/thinkpad_t480s/home/policy/hci/sysintid3
+@@ -0,0 +1 @@
++Œ¼6
+\ No newline at end of file
+-- 
+2.39.5
+
diff --git a/config/ifd/t480/ifd_16 b/config/ifd/t480/ifd_16
index 9d535d6090e14ab2d9c0cd6374ca838b4cd9b97b..cdeaee4a484065cb6ab65e22c9d28d63117a1ddc 100644
GIT binary patch
delta 10
RcmZorXi!+dzgUo&5daa}0;m80

delta 52
zcmZorXi!+dujyxG669-W82;bTP|rfo%v8_V)Y9O;p_#AK|6osdKUbIkfx-Ws{euD~
I3o=~?0IJ>*g#Z8m

diff --git a/config/ifd/t480s/gbe b/config/ifd/t480s/gbe
new file mode 100644
index 0000000000000000000000000000000000000000..3b45d172a37aa7664f642c620e754a9894419e57
GIT binary patch
literal 8192
zcmZ2>NxkgLK}L@M|3w%sGB7kS2>kzlSRg`amG})&1{i2yU9MxmAOPg@Bxx~lIdcdz
zUKd@v>$>O-FbQG-wKg#LwQ+#7urn|yD1aDzK+MSCpdrNW@E-#(F#Z3}bPl8p6Ce~%
z*}%ZT#lSLQgS&&up@WLQ8xrIh7(4_R9Dp>-ML`B;E+L?Hc?Rw+20(ia8CZa{F_2~h
z(y~CB@vi}c&KyGqpKS&VtUx}(<WbgW2#kh6W^fBLBW4C16+sIDW?M7?Aa@TBrr4;+
zXb6xR0;8qSXb6mkz-S1JhQMeDjE2C-3IRVOqaarU<M1#BA4fl6!-3wuUpCtRr+1K#
z+BX^kgC+z<`~SrC)<*mP#D&wSD$+w>&=dxv4jB!B(GVC7fzc2c4S~@Rpi2l0bpIa!
DOg(_K

literal 0
HcmV?d00001

diff --git a/config/ifd/t480s/ifd_16 b/config/ifd/t480s/ifd_16
new file mode 100644
index 0000000000000000000000000000000000000000..dbbd99cb0e80d664d1ca1430a982a52b64ee5b0d
GIT binary patch
literal 4096
zcmeHKu}T9$6r8=yVG_igMBxGf*CMS%#o7=!Y-|Lt5eo%BAdQ7pQrTPi1(w#Lr3ik8
zpJ0lJ&A~cvFN#MrWstaY%zH3z_r2ZO>Z~o|=w?{cD4`rg-L~FDv1;ubj<?pkC%1R^
zPtQ^Vv7#*Z)RjU2+s7}o{hvM=@I`4h?kT-z0pI{oGWa_vOlX?g^?tFCFX~a$0dO{M
z(bxc;02WC@cE}wP2whxal%0pGfTmV<DsY|vSHr4(&$7%(p9N_oXy$2;sZH+c2m|Ii
z$>}l@7@bxcOc!aIu5pN7P*pih1vN(NPLN!>l`wJ;VzgbFc;{Jo{}*N;;#&=t5s5n<
z-U07`cfdQ~9q<l#2fPE`fjM*F(ZonhVqQBjTBc>pLyXXbrrFE$oLzV7bzb;?HFd#1
GD1HDphmo-W

literal 0
HcmV?d00001

diff --git a/config/vendor/t480s/pkg.cfg b/config/vendor/t480s/pkg.cfg
new file mode 100644
index 00000000..67f000da
--- /dev/null
+++ b/config/vendor/t480s/pkg.cfg
@@ -0,0 +1,10 @@
+DL_hash="df735a24242792bf4150f30bf0bd4fdbdc0fb6bf0f897ea533df32567be8e084006d692fb6351677f8cc976878c5018667901dbd407b0a77805754f7c101497c"
+DL_url="https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
+DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
+
+# We will use deguard to disable the Intel Boot Guard:
+ME11bootguard="y"
+ME11delta="thinkpad_t480s" # subdirectory under deguard's data/delta/
+ME11version="11.6.0.1126"
+ME11sku="2M"
+ME11pch="LP"

From cde9594aab52b8898e1b38495ac2f0a45ae51185 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 2 Dec 2024 06:04:20 +0000
Subject: [PATCH 0901/1549] libgfxinit on Thinkpad T480

was previously using the VGA ROM.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              | 859 ++++++++++++++++++
 .../config/{normal => libgfxinit_txtmode}     |  45 +-
 2 files changed, 893 insertions(+), 11 deletions(-)
 create mode 100644 config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
 rename config/coreboot/t480_fsp_16mb/config/{normal => libgfxinit_txtmode} (96%)

diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..ebafdb0f
--- /dev/null
+++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
@@ -0,0 +1,859 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_FAMILY="T480"
+CONFIG_MAINBOARD_PART_NUMBER="T480"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=2
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0xEEC000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="t480"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+CONFIG_USE_PM_ACPI_TIMER=y
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+# CONFIG_USE_LEGACY_8254_TIMER is not set
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t480/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t480/gbe"
+CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
+CONFIG_HAVE_IFD_BIN=y
+# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_E460 is not set
+CONFIG_BOARD_LENOVO_T480=y
+# CONFIG_BOARD_LENOVO_T480S is not set
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
+CONFIG_TTYS0_BAUD=115200
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
+CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
+CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x200000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_BERT_SIZE=0x0
+CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IFD_CHIPSET="sklkbl"
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_MAX_ROOT_PORTS=24
+CONFIG_PCR_BASE_ADDRESS=0xfd000000
+CONFIG_CPU_BCLK_MHZ=100
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
+CONFIG_CPU_XTAL_HZ=24000000
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
+CONFIG_SOC_INTEL_I2C_DEV_MAX=6
+# CONFIG_ENABLE_SATA_TEST_MODE is not set
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
+CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_FSP_PUBLISH_MBP_HOB=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
+CONFIG_MAX_HECI_DEVICES=5
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_PAM0_REGISTER=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
+CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
+CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
+CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
+CONFIG_SOC_INTEL_KABYLAKE=y
+CONFIG_FSP_T_LOCATION=0xfffe0000
+CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
+CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code for IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
+CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
+# CONFIG_USE_COREBOOT_MP_INIT is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
+CONFIG_INTEL_CAR_NEM_ENHANCED=y
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_INTEL_KEYLOCKER is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
+CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
+CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
+CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
+CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
+CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
+CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
+CONFIG_SOC_INTEL_CSE_RW_FILE=""
+CONFIG_SOC_INTEL_CSE_RW_VERSION=""
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
+CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
+CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
+CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
+# CONFIG_SOC_INTEL_DISABLE_IGD is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
+CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
+CONFIG_SA_ENABLE_DPR=y
+CONFIG_HAVE_CAPID_A_REGISTER=y
+CONFIG_HAVE_BDSM_BGSM_REGISTER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
+
+#
+# Intel SoC Common PCH Code
+#
+CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
+CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
+CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
+CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
+
+#
+# Intel SoC Common coreboot stages and non-IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BASECODE=y
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+CONFIG_PAVP=y
+# CONFIG_MMA is not set
+CONFIG_SOC_INTEL_COMMON_NHLT=y
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_PARALLEL_MP_AP_WORK=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
+CONFIG_H8_HAS_LEDLOGO=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_UDK_BASE=y
+CONFIG_UDK_2017_BINDING=y
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_202005_VERSION=202005
+CONFIG_UDK_202111_VERSION=202111
+CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_202305_VERSION=202305
+CONFIG_UDK_VERSION=2017
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_HAVE_FSP_GOP=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y
+# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set
+# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set
+# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_DRIVERS_EFI_FW_INFO is not set
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_DESIGNWARE=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_FSP_USE_REPO=y
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+# CONFIG_BMP_LOGO is not set
+CONFIG_PLATFORM_USES_FSP2_0=y
+CONFIG_PLATFORM_USES_FSP2_X86_32=y
+CONFIG_HAVE_INTEL_FSP_REPO=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_S_CBFS="fsps.bin"
+CONFIG_FSP_M_CBFS="fspm.bin"
+CONFIG_FSP_FULL_FD=y
+CONFIG_FSP_T_RESERVED_SIZE=0x0
+CONFIG_FSP_M_XIP=y
+CONFIG_HAVE_FSP_LOGO_SUPPORT=y
+CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
+CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
+CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
+CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
+CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
+# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Skylake"
+CONFIG_GFX_GMA_PCH="Sunrise_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_USB_ACPI=y
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_TPM1 is not set
+CONFIG_TPM2=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM2=y
+# CONFIG_DEBUG_TPM is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_CUSTOM_MADT=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_ACPI_LPIT=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_ACPI_S1_NOT_SUPPORTED=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_IOAPIC=y
+CONFIG_ACPI_NHLT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
+# CONFIG_DISPLAY_FSP_HEADER is not set
+# CONFIG_VERIFY_HOBS is not set
+# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
+CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
+# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+CONFIG_HAVE_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_SPD_READ_BY_WORD=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t480_fsp_16mb/config/normal b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
similarity index 96%
rename from config/coreboot/t480_fsp_16mb/config/normal
rename to config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
index 6ea85a24..ad43bbfb 100644
--- a/config/coreboot/t480_fsp_16mb/config/normal
+++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
@@ -113,7 +113,7 @@ CONFIG_MAINBOARD_FAMILY="T480"
 CONFIG_MAINBOARD_PART_NUMBER="T480"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
-CONFIG_VGA_BIOS_ID="8086,5917"
+CONFIG_VGA_BIOS_ID="8086,0406"
 CONFIG_DIMM_MAX=2
 CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
@@ -132,7 +132,7 @@ CONFIG_VARIANT_DIR="t480"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_VGA_BIOS=y
+# CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
@@ -141,6 +141,7 @@ CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 # CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480"
@@ -163,7 +164,6 @@ CONFIG_ME_BIN_PATH="../../../vendorfiles/t480/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/t480/gbe"
 CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_VGA_BIOS_FILE="../../../pciroms/pci8086,5917.rom"
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
 # CONFIG_DEBUG_SMI is not set
@@ -214,6 +214,7 @@ CONFIG_BOARD_LENOVO_T480=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
 # CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
@@ -273,9 +274,6 @@ CONFIG_SMM_RESERVED_SIZE=0x200000
 CONFIG_SMM_MODULE_STACK_SIZE=0x800
 CONFIG_ACPI_BERT_SIZE=0x0
 CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
-CONFIG_VGA_BIOS_SECOND=y
-CONFIG_VGA_BIOS_SECOND_ID="10de,1d10"
-CONFIG_VGA_BIOS_SECOND_FILE="../../../pciroms/pci10de,1d10.rom"
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
@@ -554,14 +552,24 @@ CONFIG_DEFAULT_EBDA_SIZE=0x400
 #
 # Devices
 #
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
 CONFIG_HAVE_FSP_GOP=y
-CONFIG_VGA_ROM_RUN_DEFAULT=y
 CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-# CONFIG_MAINBOARD_USE_LIBGFXINIT is not set
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
 # CONFIG_VGA_ROM_RUN is not set
 # CONFIG_RUN_FSP_GOP is not set
-CONFIG_NO_GFX_INIT=y
+# CONFIG_NO_GFX_INIT is not set
 CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
 CONFIG_PCI=y
 CONFIG_ECAM_MMCONF_SUPPORT=y
 CONFIG_PCIX_PLUGIN_SUPPORT=y
@@ -576,9 +584,8 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
 # CONFIG_EARLY_PCI_BRIDGE is not set
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-# CONFIG_VGA_BIOS_DGPU is not set
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
@@ -633,6 +640,16 @@ CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
 # CONFIG_BUILDING_WITH_DEBUG_FSP is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Skylake"
+CONFIG_GFX_GMA_PCH="Sunrise_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
 # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
 # CONFIG_DRIVERS_PS2_KEYBOARD is not set
 CONFIG_DRIVERS_MC146818=y
@@ -640,6 +657,7 @@ CONFIG_USE_PC_CMOS_ALTCENTURY=y
 CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
 CONFIG_MEMORY_MAPPED_TPM=y
 CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
 # CONFIG_DRIVERS_SIL_3114 is not set
 CONFIG_DRIVERS_USB_ACPI=y
 CONFIG_DRIVERS_WIFI_GENERIC=y
@@ -818,7 +836,12 @@ CONFIG_HAVE_EM100_SUPPORT=y
 # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
 CONFIG_SPD_READ_BY_WORD=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3

From 33efe45b149558853a292c4b67f2f392e6c6fd27 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 2 Dec 2024 06:09:03 +0000
Subject: [PATCH 0902/1549] Enable legacy 8254 timer on ThinkPad T480

I also enabled this on T480S, because otherwise SeaBIOS hung.

Enabling it shouldn't cause any harm on the T480, though Mate
did say that his machine seemed to work with my setup.

However, I believe that was when I gave him the ones that lbmk
built with the VGA ROM. Now it builds with libgfxinit, because
Mate was able to fix libgfxinit on this machine.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb | 2 +-
 config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
index ebafdb0f..2be0ecec 100644
--- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
@@ -158,7 +158,7 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-# CONFIG_USE_LEGACY_8254_TIMER is not set
+CONFIG_USE_LEGACY_8254_TIMER=y
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16"
diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
index ad43bbfb..95989094 100644
--- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
@@ -156,7 +156,7 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-# CONFIG_USE_LEGACY_8254_TIMER is not set
+CONFIG_USE_LEGACY_8254_TIMER=y
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16"

From 9dc3c86ae37db781b6bc4e745a57217c3511074b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 2 Dec 2024 06:12:59 +0000
Subject: [PATCH 0903/1549] vendor.sh: Remove T480 VGA ROM download handling

Libreboot's binary blob reduction policy is crystal clear:

If a blob can be avoided, it must be avoided.

The ThinkPad T480 was using Intel's VGA ROM for graphics
initialisation very briefly, before Mate fixed libgfxinit.

Since libgfxinit is fixed, the Intel VGA ROM is obsolete,
so we should not be handling this at all.

Similarly, the Nvidia ROM handling has been removed, because
Mate is hard-disabling that in the coreboot code anyway, since
the Nvidia dGPU didn't work when tested anyway.

Even if it did, Libreboot's blob policy makes it clear
that Intel graphics with native init from coreboot is to
be the preferred option.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/vendor/t480/pkg.cfg |  5 ----
 include/vendor.sh          | 54 ++------------------------------------
 2 files changed, 2 insertions(+), 57 deletions(-)

diff --git a/config/vendor/t480/pkg.cfg b/config/vendor/t480/pkg.cfg
index c528ce02..0088b2b5 100644
--- a/config/vendor/t480/pkg.cfg
+++ b/config/vendor/t480/pkg.cfg
@@ -2,11 +2,6 @@ DL_hash="df735a24242792bf4150f30bf0bd4fdbdc0fb6bf0f897ea533df32567be8e084006d692
 DL_url="https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
 DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
 
-# VGA ROM, Intel VGA pci8086,5917.rom
-T480_VGA_DL_hash="cedf859b95b96f09135c1a4824b25c0204f598e2b5a2d5d5adc6ef3401e8e3c4204a55ebc6c9d85c25c618c616c122d2a2239916be7164ada22c357e68136c1d"
-T480_VGA_DL_url="https://download.lenovo.com/pccbbs/mobiles/n24ur39w.iso"
-T480_VGA_DL_url_bkup="https://web.archive.org/web/20241005213051/https://download.lenovo.com/pccbbs/mobiles/n24ur39w.iso"
-
 # We will use deguard to disable the Intel Boot Guard:
 ME11bootguard="y"
 ME11delta="thinkpad_t480" # subdirectory under deguard's data/delta/
diff --git a/include/vendor.sh b/include/vendor.sh
index 1ee92f46..201359d7 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -79,34 +79,12 @@ getfiles()
 	    "$CONFIG_SMSC_SCH5545_EC_FW_FILE"
 	[ -z "$CONFIG_KBC1126_FIRMWARE" ] || fetch kbc1126ec "$EC_url" \
 	    "$EC_url_bkup" "$EC_hash" "$CONFIG_KBC1126_FW1"
-	[ -z "$CONFIG_VGA_BIOS_FILE" ] || fetch_vgarom
+	[ -z "$CONFIG_VGA_BIOS_FILE" ] || fetch e6400vga "$E6400_VGA_DL_url" \
+	  "$E6400_VGA_DL_url_bkup" "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
 	[ -z "$CONFIG_HAVE_MRC" ] || fetch "mrc" "$MRC_url" "$MRC_url_bkup" \
 	    "$MRC_hash" "$CONFIG_MRC_FILE"; return 0
 }
 
-fetch_vgarom()
-{
-	if [ "$board" = "e6400_4mb" ] || [ "$board" = "e6400nvidia_4mb" ]; then
-		fetch_vgarom_e6400
-	elif [ "$board" = "t480_fsp_16mb" ]; then
-		fetch_vgarom_t480
-	else
-		$err "coreboot/$board: VGA ROM extraction not supported yet!"
-	fi
-}
-
-fetch_vgarom_e6400()
-{
-	fetch e6400vga "$E6400_VGA_DL_url" "$E6400_VGA_DL_url_bkup" \
-	    "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
-}
-
-fetch_vgarom_t480()
-{
-	fetch t480vga "$T480_VGA_DL_url" "$T480_VGA_DL_url_bkup" \
-	    "$T480_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
-}
-
 fetch()
 {
 	dl_type="$1"; dl="$2"; dl_bkup="$3"; dlsum="$4"; _dest="${5##*../}"
@@ -240,34 +218,6 @@ extract_e6400vga()
 	    $err "extract_e6400vga $board: can't copy vga rom to $_dest"
 }
 
-extract_t480vga()
-{
-	_img="$appdir/vendor.img"
-	_imgp1="$appdir/vendor_p1.img"
-	_imguefi="$appdir/update.cap"
-	_intelvga="$appdir/intelvga/body.bin"
-	_nvvga="$appdir/nvvga/body.bin"
-	_intelrom="pciroms/pci8086,5917.rom"
-	_nvrom="pciroms/pci10de,1d10.rom"
-
-	[ -f "$_nvrom" ] && [ "$_intelrom" ] && return 0
-
-	x_ mkdir -p pciroms
-
-	# extract the system rom (i.e. factory.rom)
-	dd skip=32 if="$appdir/vendor.img" of="$_imgp1"
-	mcopy -i "$_imgp1" ::/FLASH/N24ET77W/\$0AN2400.FL1 "$_imguefi"
-
-	# extract vga roms from system rom
-	$uefiextract "$_imguefi" 6A5F1EF9-C478-42BA-A4DB-C7846CC7DB57 \
-	    -m body -t 0x19 -o "${_intelvga%/body.bin}"
-	$uefiextract "$_imguefi" 8B9BEF90-5FAF-46CF-A32A-7E1B7D33CC87 \
-	    -m body -t 0x19 -o "${_nvvga%/body.bin}"
-
-	x_ mv "$_nvvga" "$_nvrom"
-	x_ mv "$_intelvga" "$_intelrom"
-}
-
 extract_sch5545ec()
 {
 	# full system ROM (UEFI), to extract with UEFIExtract:

From 046529abd98d7a98b57cfe9113f8c61dc3353cfc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 2 Dec 2024 11:29:19 +0000
Subject: [PATCH 0904/1549] Disable m2 caddy hotplug on T480S

This fixes an error where nvme disappears and gets renamed
on s3 resume. Mate Kukri told me to test that and it worked.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...2-hotplug-in-lenovo-t480s-devicetree.patch | 30 +++++++++++++++++++
 1 file changed, 30 insertions(+)
 create mode 100644 config/coreboot/next/patches/0011-Disable-m2-hotplug-in-lenovo-t480s-devicetree.patch

diff --git a/config/coreboot/next/patches/0011-Disable-m2-hotplug-in-lenovo-t480s-devicetree.patch b/config/coreboot/next/patches/0011-Disable-m2-hotplug-in-lenovo-t480s-devicetree.patch
new file mode 100644
index 00000000..00a844c1
--- /dev/null
+++ b/config/coreboot/next/patches/0011-Disable-m2-hotplug-in-lenovo-t480s-devicetree.patch
@@ -0,0 +1,30 @@
+From 44d0703b61156a19c6cbfb5cfe3f5d58e328daae Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Mon, 2 Dec 2024 11:16:43 +0000
+Subject: [PATCH 1/1] Disable m2 hotplug in lenovo t480s devicetree
+
+This fixes a bug where nvme disappears and gets renamed on
+s3 resume.
+
+Thanks go to Mate Kukri who suggested this.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ .../lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb        | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
+index 2cac8c4a75..9129d3a1b8 100644
+--- a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
+@@ -115,7 +115,6 @@ chip soc/intel/skylake
+ 			register "PcieRpClkSrcNumber[8]"		= "5"
+ 			register "PcieRpAdvancedErrorReporting[8]"	= "1"
+ 			register "PcieRpLtrEnable[8]"			= "1"
+-			register "PcieRpHotPlug[8]"			= "1"
+ 		end
+ 	end
+ end
+-- 
+2.39.5
+

From b95a411a3645b72036101aaa8f8ad28758eefd15 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 2 Dec 2024 16:32:15 +0000
Subject: [PATCH 0905/1549] Add SPD support for onboard ThinkPad T480S RAM

Patchset 20 from:

https://review.coreboot.org/c/coreboot/+/83274/18..20

Updated to that. A bunch of changes I made locally have been
copied here, thus removed from lbmk.

The previous setup in lbmk was to have only the DIMM slot work,
on the ThinkPad T480S, without setting up SPD for the onboard RAM>

Mate Kukri reverse engineered the scheme by which the SPDs are
chosen at boot, based on the wiring of the board. This should
just about match the way Lenovo did it in their firmware.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...soc-intel-skylake-configure-usb-acpi.patch |   4 +-
 ...nitial-code-for-Lenovo-ThinkPad-E460.patch |   4 +-
 ...e-Enable-4E-4F-PNP-I-O-ports-in-boot.patch |   4 +-
 ...dd-ThinkPad-T480-and-ThinkPad-T480s.patch} | 981 ++++++++++++++----
 ...-dell-Add-Optiplex-780-MT-x4x-ICH10.patch} |   4 +-
 ...ol-add-nuke-flag-all-0xFF-on-region.patch} |   4 +-
 ...r-coreboot-images-built-without-a-p.patch} |   4 +-
 ...-dell-optiplex_780-Add-USFF-variant.patch} |   4 +-
 ...80-Add-MAINBOARD_USES_IFD_GBE_REGION.patch |  27 -
 ...0010-add-vbt-file-for-thinkpad-t480s.patch |  49 -
 ...2-hotplug-in-lenovo-t480s-devicetree.patch |  30 -
 11 files changed, 809 insertions(+), 306 deletions(-)
 rename config/coreboot/next/patches/{0008-mb-lenovo-Add-ThinkPad-T480.patch => 0004-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch} (60%)
 rename config/coreboot/next/patches/{0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch => 0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch} (99%)
 rename config/coreboot/next/patches/{0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch => 0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch} (98%)
 rename config/coreboot/next/patches/{0006-Remove-warning-for-coreboot-images-built-without-a-p.patch => 0007-Remove-warning-for-coreboot-images-built-without-a-p.patch} (91%)
 rename config/coreboot/next/patches/{0007-mb-dell-optiplex_780-Add-USFF-variant.patch => 0008-mb-dell-optiplex_780-Add-USFF-variant.patch} (98%)
 delete mode 100644 config/coreboot/next/patches/0009-lenovo-t480-Add-MAINBOARD_USES_IFD_GBE_REGION.patch
 delete mode 100644 config/coreboot/next/patches/0010-add-vbt-file-for-thinkpad-t480s.patch
 delete mode 100644 config/coreboot/next/patches/0011-Disable-m2-hotplug-in-lenovo-t480s-devicetree.patch

diff --git a/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch b/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch
index b5a157a1..1b6b5372 100644
--- a/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch
+++ b/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch
@@ -1,7 +1,7 @@
-From b7b4f05005bfe46fc5ce67ae1f04d225e35cbd4d Mon Sep 17 00:00:00 2001
+From 18b68185f44599cf6ea6a20816bf6a5eb7aeda17 Mon Sep 17 00:00:00 2001
 From: Felix Singer <felixsinger@posteo.net>
 Date: Wed, 26 Jun 2024 04:24:31 +0200
-Subject: [PATCH 1/9] soc/intel/skylake: configure usb acpi
+Subject: [PATCH 1/8] soc/intel/skylake: configure usb acpi
 
 Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d
 Signed-off-by: Felix Singer <felixsinger@posteo.net>
diff --git a/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch b/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch
index d268ddf3..77d7b080 100644
--- a/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch
+++ b/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch
@@ -1,7 +1,7 @@
-From 86a721209951605ad59aff31639a6be954a0fab8 Mon Sep 17 00:00:00 2001
+From a7cbcbc7037fe3473e5ebe475cbfd12f653e9827 Mon Sep 17 00:00:00 2001
 From: Felix Singer <felixsinger@posteo.net>
 Date: Wed, 26 Jun 2024 00:59:03 +0200
-Subject: [PATCH 2/9] mb/lenovo: Add initial code for Lenovo ThinkPad E460
+Subject: [PATCH 2/8] mb/lenovo: Add initial code for Lenovo ThinkPad E460
 
 Change-Id: Ia02f81750105c95c867d961dbdadcd5991ad371f
 Signed-off-by: Felix Singer <felixsinger@posteo.net>
diff --git a/config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch b/config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
index 56834e40..6e7d4b7c 100644
--- a/config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
+++ b/config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
@@ -1,7 +1,7 @@
-From 46da5bb38caf3b5d523e79ca0e17b125179daaaf Mon Sep 17 00:00:00 2001
+From b3049cfd11aa0f3c124ed8f87e98a200201ecbdc Mon Sep 17 00:00:00 2001
 From: Mate Kukri <km@mkukri.xyz>
 Date: Fri, 22 Nov 2024 21:26:48 +0000
-Subject: [PATCH 3/9] soc/intel/skylake: Enable 4E/4F PNP I/O ports in
+Subject: [PATCH 3/8] soc/intel/skylake: Enable 4E/4F PNP I/O ports in
  bootblock
 
 Change-Id: I57c9d8a9513a268e2ca6a0abd1306cd038598173
diff --git a/config/coreboot/next/patches/0008-mb-lenovo-Add-ThinkPad-T480.patch b/config/coreboot/next/patches/0004-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch
similarity index 60%
rename from config/coreboot/next/patches/0008-mb-lenovo-Add-ThinkPad-T480.patch
rename to config/coreboot/next/patches/0004-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch
index a956a392..1ac1a536 100644
--- a/config/coreboot/next/patches/0008-mb-lenovo-Add-ThinkPad-T480.patch
+++ b/config/coreboot/next/patches/0004-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch
@@ -1,9 +1,9 @@
-From cc9876a374db2515cefc1e3a3a1745d643b19554 Mon Sep 17 00:00:00 2001
+From e905d7fd1ee1a791f27285715d420263e422ebee Mon Sep 17 00:00:00 2001
 From: Mate Kukri <kukri.mate@gmail.com>
-Date: Mon, 2 Dec 2024 01:36:35 +0000
-Subject: [PATCH 8/9] mb/lenovo: Add ThinkPad T480
+Date: Mon, 2 Dec 2024 16:10:22 +0000
+Subject: [PATCH 4/8] mb/lenovo: Add ThinkPad T480 and ThinkPad T480s
 
-This machine has BootGuard fused and requires deguard to boot coreboot.
+These machine have BootGuard fused and requires deguard to boot coreboot.
 
 Works:
 - Intel GPU
@@ -13,19 +13,18 @@ Works:
 - EC
   + Fan control
   + Keyboard
-  + Both batteries
+  + Battery (T480 has two)
   + Charging via both Type-C ports
-  + Debug UART
+  + Debug UART (on T480)
 - WLAN card:
   + WiFi works
   + Bluetooth works
 - M.2 main SSD
-- Speakers, headphone jack
+- HDA verbs, Speakers, headphone jack
 - S3 sleep
 
 Known issues:
 - Alpine Ridge Thunderbolt 3 controller does not work
-- Missing HDA verbs, audio still works
 - Function keys are handled differently from stock firmware
   + These should inject XF86 keycodes instead of directly
     controlling, volume, brightness, etc in hardware.
@@ -43,6 +42,8 @@ Untested (should work):
 - Webcam (USB)
 - External video outputs
 
+Thanks to Leah Rowe for helping with the T480s.
+
 Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
 Change-Id: I19d421412c771c1f242f6ff39453f824fa866163
 ---
@@ -50,9 +51,9 @@ Change-Id: I19d421412c771c1f242f6ff39453f824fa866163
  src/ec/lenovo/h8/acpi/ec.asl                  |   2 +-
  src/ec/lenovo/h8/bluetooth.c                  |  12 +-
  src/ec/lenovo/h8/wwan.c                       |  12 +-
- src/mainboard/lenovo/sklkbl_thinkpad/Kconfig  |  39 +++-
+ src/mainboard/lenovo/sklkbl_thinkpad/Kconfig  |  42 +++-
  .../lenovo/sklkbl_thinkpad/Kconfig.name       |   6 +
- .../lenovo/sklkbl_thinkpad/Makefile.mk        |   8 +-
+ .../lenovo/sklkbl_thinkpad/Makefile.mk        |  72 ++++++-
  .../lenovo/sklkbl_thinkpad/acpi/ec.asl        |  13 +-
  .../lenovo/sklkbl_thinkpad/bootblock.c        |  50 +++++
  .../lenovo/sklkbl_thinkpad/devicetree.cb      |  36 ++++
@@ -61,29 +62,78 @@ Change-Id: I19d421412c771c1f242f6ff39453f824fa866163
  src/mainboard/lenovo/sklkbl_thinkpad/ec.h     |  99 +++++++++
  src/mainboard/lenovo/sklkbl_thinkpad/gpio.h   |   8 +
  .../lenovo/sklkbl_thinkpad/ramstage.c         |  98 ++++++++-
- .../lenovo/sklkbl_thinkpad/romstage.c         |  24 +++
+ .../lenovo/sklkbl_thinkpad/romstage.c         |   7 -
  .../sklkbl_thinkpad/variants/t480/data.vbt    | Bin 0 -> 4106 bytes
  .../variants/t480/gma-mainboard.ads           |  19 ++
  .../sklkbl_thinkpad/variants/t480/gpio.c      | 203 ++++++++++++++++++
- .../sklkbl_thinkpad/variants/t480/hda_verb.c  |  10 +
+ .../sklkbl_thinkpad/variants/t480/hda_verb.c  |  90 ++++++++
+ .../variants/t480/memory_init_params.c        |  20 ++
  .../variants/t480/overridetree.cb             | 124 +++++++++++
- .../variants/t480s/gma-mainboard.ads          |  15 ++
+ .../sklkbl_thinkpad/variants/t480s/data.vbt   | Bin 0 -> 4106 bytes
+ .../variants/t480s/gma-mainboard.ads          |  19 ++
  .../sklkbl_thinkpad/variants/t480s/gpio.c     | 199 +++++++++++++++++
- .../sklkbl_thinkpad/variants/t480s/hda_verb.c |  10 +
- .../variants/t480s/overridetree.cb            | 121 +++++++++++
- 25 files changed, 1258 insertions(+), 32 deletions(-)
+ .../sklkbl_thinkpad/variants/t480s/hda_verb.c |  90 ++++++++
+ .../variants/t480s/memory_init_params.c       |  44 ++++
+ .../variants/t480s/overridetree.cb            | 124 +++++++++++
+ .../sklkbl_thinkpad/variants/t480s/spd_0.bin  | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_1.bin  | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_10.bin | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_11.bin | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_12.bin | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_13.bin | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_14.bin | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_15.bin | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_16.bin | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_17.bin | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_18.bin | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_19.bin | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_2.bin  | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_20.bin | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_3.bin  | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_4.bin  | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_5.bin  | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_6.bin  | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_7.bin  | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_8.bin  | Bin 0 -> 512 bytes
+ .../sklkbl_thinkpad/variants/t480s/spd_9.bin  | Bin 0 -> 512 bytes
+ 49 files changed, 1531 insertions(+), 40 deletions(-)
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ec.c
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ec.h
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/gpio.h
+ delete mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_0.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_1.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_10.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_11.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_12.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_13.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_14.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_15.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_16.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_17.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_18.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_19.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_2.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_20.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_3.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_4.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_5.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_6.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_7.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_8.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_9.bin
 
 diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
 index d60720eb49..b18dfdd287 100644
@@ -197,10 +247,10 @@ index 685886fcce..5e0ae030e2 100644
  	printk(BIOS_INFO, "H8: WWAN not installed\n");
  	return false;
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
-index fcc80dffe3..13d71670e3 100644
+index fcc80dffe3..21076315ab 100644
 --- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
-@@ -2,16 +2,19 @@
+@@ -2,16 +2,20 @@
  
  config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
  	bool
@@ -221,10 +271,11 @@ index fcc80dffe3..13d71670e3 100644
  	select MEMORY_MAPPED_TPM
  	select MAINBOARD_HAS_TPM2
 -	select NO_UART_ON_SUPERIO
++	select MAINBOARD_USES_IFD_GBE_REGION
  	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
  	select SPD_READ_BY_WORD
  	select SYSTEM_TYPE_LAPTOP
-@@ -19,8 +22,22 @@ config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
+@@ -19,8 +23,22 @@ config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
  config BOARD_LENOVO_E460
  	bool
  	select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
@@ -247,7 +298,7 @@ index fcc80dffe3..13d71670e3 100644
  if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
  
  config MAINBOARD_DIR
-@@ -28,19 +45,31 @@ config MAINBOARD_DIR
+@@ -28,18 +46,30 @@ config MAINBOARD_DIR
  
  config VARIANT_DIR
  	default "e460" if BOARD_LENOVO_E460
@@ -260,7 +311,7 @@ index fcc80dffe3..13d71670e3 100644
  config MAINBOARD_PART_NUMBER
  	default "E460" if BOARD_LENOVO_E460
 +	default "T480" if BOARD_LENOVO_T480
-+	default "T480S" if BOARD_LENOVO_T480S
++	default "T480s" if BOARD_LENOVO_T480S
  
  config CBFS_SIZE
  	default 0x600000 if BOARD_LENOVO_E460
@@ -271,17 +322,17 @@ index fcc80dffe3..13d71670e3 100644
 +	default 2
  
  config DIMM_SPD_SIZE
- 	default 256
- 
+-	default 256
++	default 512	# DDR4
++
 +endif
 +
 +if BOARD_LENOVO_E460
-+
+ 
  config UART_FOR_CONSOLE
  	default 2
- 
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
-index 61d971fe8d..54fc4f0065 100644
+index 61d971fe8d..15441c4264 100644
 --- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
 @@ -2,3 +2,9 @@
@@ -293,12 +344,12 @@ index 61d971fe8d..54fc4f0065 100644
 +	bool "ThinkPad T480"
 +
 +config BOARD_LENOVO_T480S
-+	bool "ThinkPad T480S"
++	bool "ThinkPad T480s"
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
-index 6e544fd6b9..348e3d4582 100644
+index 6e544fd6b9..49d6ebdb4e 100644
 --- a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
-@@ -1,7 +1,9 @@
+@@ -1,7 +1,73 @@
  ## SPDX-License-Identifier: GPL-2.0-only
  
 -bootblock-y += bootblock.c
@@ -306,11 +357,75 @@ index 6e544fd6b9..348e3d4582 100644
  
 -ramstage-y += ramstage.c
 -ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
-+romstage-y += romstage.c
++romstage-y += variants/$(VARIANT_DIR)/memory_init_params.c
 +
 +ramstage-y += ramstage.c ec.c
 +ramstage-y += variants/$(VARIANT_DIR)/gpio.c variants/$(VARIANT_DIR)/hda_verb.c
  ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
++
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_0.bin
++spd_0.bin-file := variants/$(VARIANT_DIR)/spd_0.bin
++spd_0.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_1.bin
++spd_1.bin-file := variants/$(VARIANT_DIR)/spd_1.bin
++spd_1.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_2.bin
++spd_2.bin-file := variants/$(VARIANT_DIR)/spd_2.bin
++spd_2.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_3.bin
++spd_3.bin-file := variants/$(VARIANT_DIR)/spd_3.bin
++spd_3.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_4.bin
++spd_4.bin-file := variants/$(VARIANT_DIR)/spd_4.bin
++spd_4.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_5.bin
++spd_5.bin-file := variants/$(VARIANT_DIR)/spd_5.bin
++spd_5.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_6.bin
++spd_6.bin-file := variants/$(VARIANT_DIR)/spd_6.bin
++spd_6.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_7.bin
++spd_7.bin-file := variants/$(VARIANT_DIR)/spd_7.bin
++spd_7.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_8.bin
++spd_8.bin-file := variants/$(VARIANT_DIR)/spd_8.bin
++spd_8.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_9.bin
++spd_9.bin-file := variants/$(VARIANT_DIR)/spd_9.bin
++spd_9.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_10.bin
++spd_10.bin-file := variants/$(VARIANT_DIR)/spd_10.bin
++spd_10.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_11.bin
++spd_11.bin-file := variants/$(VARIANT_DIR)/spd_11.bin
++spd_11.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_12.bin
++spd_12.bin-file := variants/$(VARIANT_DIR)/spd_12.bin
++spd_12.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_13.bin
++spd_13.bin-file := variants/$(VARIANT_DIR)/spd_13.bin
++spd_13.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_14.bin
++spd_14.bin-file := variants/$(VARIANT_DIR)/spd_14.bin
++spd_14.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_15.bin
++spd_15.bin-file := variants/$(VARIANT_DIR)/spd_15.bin
++spd_15.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_16.bin
++spd_16.bin-file := variants/$(VARIANT_DIR)/spd_16.bin
++spd_16.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_17.bin
++spd_17.bin-file := variants/$(VARIANT_DIR)/spd_17.bin
++spd_17.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_18.bin
++spd_18.bin-file := variants/$(VARIANT_DIR)/spd_18.bin
++spd_18.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_19.bin
++spd_19.bin-file := variants/$(VARIANT_DIR)/spd_19.bin
++spd_19.bin-type := raw
++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_20.bin
++spd_20.bin-file := variants/$(VARIANT_DIR)/spd_20.bin
++spd_20.bin-type := raw
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
 index 16990d45f4..514b95a60f 100644
 --- a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
@@ -866,41 +981,18 @@ index 6c3b077cc4..b41cca02a7 100644
 +	.init = mainboard_init,
  };
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
-index 59a62f484e..4cc0591b4f 100644
+deleted file mode 100644
+index 59a62f484e..0000000000
 --- a/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
-@@ -1,7 +1,31 @@
- /* SPDX-License-Identifier: GPL-2.0-only */
- 
- #include <soc/romstage.h>
-+#include <spd_bin.h>
-+
-+// FIXME: verify SPD addrs, DQ interleave, and CA vref for other SKL/KBL ThinkPads
- 
- void mainboard_memory_init_params(FSPM_UPD *mupd)
- {
-+	/* T480
-+	 *  JDDR1 - 0x50
-+	 *  JDDR2 - 0x51 */
-+	struct spd_block blk = { .addr_map = { 0x50, 0x51, } };
-+	get_spd_smbus(&blk);
-+	dump_spd_info(&blk);
-+
-+	FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig;
-+
-+	/* T480 (DDR_DQ pins wired in interleave mode) */
-+	mem_cfg->DqPinsInterleaved = true;
-+
-+	/* T480 (VREF_CA to CH_A and VREF_DQ_B to CH_B)
-+	 *  DDR_VREF_CA  -> M_A_VREF_CA_CPU
-+	 *  DDR0_VREF_DQ -> NC
-+	 *  DDR1_VREF_DQ -> M_B_VREF_CA_CPU */
-+	mem_cfg->CaVrefConfig      = 2;
-+
-+	mem_cfg->MemorySpdDataLen  = blk.len;
-+	mem_cfg->MemorySpdPtr00    = (uintptr_t)blk.spd_array[0];
-+	mem_cfg->MemorySpdPtr10    = (uintptr_t)blk.spd_array[1];
- }
++++ /dev/null
+@@ -1,7 +0,0 @@
+-/* SPDX-License-Identifier: GPL-2.0-only */
+-
+-#include <soc/romstage.h>
+-
+-void mainboard_memory_init_params(FSPM_UPD *mupd)
+-{
+-}
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt
 new file mode 100644
 index 0000000000000000000000000000000000000000..4db4202961d0be67b75f52b28f2111d5655595c3
@@ -1172,23 +1264,129 @@ index 0000000000..f7c29e1f39
 +}
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c
 new file mode 100644
-index 0000000000..d9d103f862
+index 0000000000..3a951ce0da
 --- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c
-@@ -0,0 +1,10 @@
+@@ -0,0 +1,90 @@
 +/* SPDX-License-Identifier: GPL-2.0-only */
 +
 +#include <device/azalia_device.h>
 +
 +const u32 cim_verb_data[] = {
++	0x10ec0257, // Vendor/Device ID: Realtek ALC257
++	0x17aa225d, // Subsystem ID
++	11,
++	AZALIA_SUBVENDOR(0, 0x17aa225d),
++
++	AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_DESC(
++		AZALIA_INTEGRATED,
++		AZALIA_INTERNAL,
++		AZALIA_MIC_IN,
++		AZALIA_OTHER_DIGITAL,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_NO_JACK_PRESENCE_DETECT,
++		2, 0
++	)),
++	AZALIA_PIN_CFG(0, 0x13, 0x40000000), // does not describe a jack or internal device
++	AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_DESC(
++		AZALIA_INTEGRATED,
++		AZALIA_INTERNAL,
++		AZALIA_SPEAKER,
++		AZALIA_OTHER_ANALOG,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_NO_JACK_PRESENCE_DETECT,
++		1, 0
++	)),
++	AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT,
++		AZALIA_MIC_IN,
++		AZALIA_STEREO_MONO_1_8,
++		AZALIA_BLACK,
++		AZALIA_JACK_PRESENCE_DETECT,
++		3, 0
++	)),
++	AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x1d, 0x40661b45), // does not describe a jack or internal device
++	AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT,
++		AZALIA_HP_OUT,
++		AZALIA_STEREO_MONO_1_8,
++		AZALIA_BLACK,
++		AZALIA_JACK_PRESENCE_DETECT,
++		1, 15
++	)),
++
++	0x8086280b, // Vendor/Device ID: Intel Kabylake HDMI
++	0x80860101, // Subsystem ID
++	4,
++	AZALIA_SUBVENDOR(2, 0x80860101),
++
++	AZALIA_PIN_CFG(2, 0x05, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_DIGITAL_DISPLAY,
++		AZALIA_DIGITAL_OTHER_OUT,
++		AZALIA_OTHER_DIGITAL,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_JACK_PRESENCE_DETECT,
++		1, 0
++	)),
++	AZALIA_PIN_CFG(2, 0x06, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_DIGITAL_DISPLAY,
++		AZALIA_DIGITAL_OTHER_OUT,
++		AZALIA_OTHER_DIGITAL,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_JACK_PRESENCE_DETECT,
++		2, 0
++	)),
++	AZALIA_PIN_CFG(2, 0x07, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_DIGITAL_DISPLAY,
++		AZALIA_DIGITAL_OTHER_OUT,
++		AZALIA_OTHER_DIGITAL,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_JACK_PRESENCE_DETECT,
++		3, 0
++	)),
 +};
 +
 +const u32 pc_beep_verbs[] = {};
 +
 +AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c
+new file mode 100644
+index 0000000000..5252a402f9
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c
+@@ -0,0 +1,20 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <soc/romstage.h>
++#include <spd_bin.h>
++
++void mainboard_memory_init_params(FSPM_UPD *mupd)
++{
++	FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig;
++	mem_cfg->DqPinsInterleaved = true;			/* DDR_DQ in interleave mode */
++	mem_cfg->CaVrefConfig      = 2;				/* VREF_CA to CH_A and VREF_DQ_B to CH_B */
++	mem_cfg->MemorySpdDataLen  = CONFIG_DIMM_SPD_SIZE;
++
++	/* Get SPD for memory slots */
++	struct spd_block blk = { .addr_map = { 0x50, 0x51, } };
++	get_spd_smbus(&blk);
++	dump_spd_info(&blk);
++
++	mem_cfg->MemorySpdPtr00    = (uintptr_t)blk.spd_array[0];
++	mem_cfg->MemorySpdPtr10    = (uintptr_t)blk.spd_array[1];
++}
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
 new file mode 100644
-index 0000000000..c20f36fbfc
+index 0000000000..4b68ec3f49
 --- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
 @@ -0,0 +1,124 @@
@@ -1305,7 +1503,7 @@ index 0000000000..c20f36fbfc
 +			register "PcieRpHotPlug[8]"			= "1"
 +		end
 +
-+		# M.2 caddy - x2
++		# M.2 2280 caddy - x2
 +		device ref pcie_rp11 on
 +			register "PcieRpEnable[10]"			= "1"
 +			register "PcieRpClkReqSupport[10]"		= "1"
@@ -1316,12 +1514,47 @@ index 0000000000..c20f36fbfc
 +		end
 +	end
 +end
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..47732e37d5b2bad4e674fd10eafa605d26f97840
+GIT binary patch
+literal 4106
+zcmeHJUu+a*5TCu>yW9JAmoD2P<t%lC2CfC#y%tU^HSGOq>9tqx`iFWXCLD09R<E?S
+zMT)`nNScT-%9*GEA8a2?G`v`!jPV6yVlcd5OnC6Y;F}U&jJz1db9VRID@E)DLk#NN
+z&9^i2&Hiq_`R2ZF8ipf7IM{nI5$^585@kULrrx0OPKv~ngNI__q41$dA{p()ui+v1
+zw(9rm09lUPAP4nOTm0CRnF|aw5^SQSH<G}<u_Gfnvn6IuK0h@!j;UxI!$*&rIdkIh
+zl$piB;eBDWa1|CgK9bAg{^O%Z%!ziiz{neeJDb~fBI?1GV5p^44?a$ETl=n1d+;%Z
+z#X6(OzEnIB9*QUTV{!mv@xk!mU}s+>aS&4j$?kY0KGYdgn6;MZ*!anbk!PNr!a%eU
+zTXkLEL3ly5L&oUX#CS7?b2%Kad?s<goHQq1G_%bLv);c5qQC)gZtxnw!L3%1MWI_X
+z0wUImYD_R11gsI%l%Zw})KN_c#&!YgM3v;Up{7+s1=lXlB>-#@;mhg8>>>#S&)d2I
+zmP&-g0$k02szSQj(Y*j}YYtQnDH0;2ui<!ko-28Y){6ilAcrmz951v4RTWQ_ye!or
+z4xOJya#Sr7{o)%XFUfJCndM%KM(c^ol_hzlb*1h&uC%Vy%U(P!_qUfwcb4r;SmPQ_
+zhxf($vVo)we+jxogb`7NQ^aS9eQpNT#2bmX5(kO*5O)$Mi4PJVB_1U{L42C{HR894
+z=ZJk70(Q~o{*COiRR#_fix0XaS3?igAuo2!)<NF8ARGWF&M7=h16xZaS|UxpZA)w3
+z1CQUC@^&oxtbG2HGk&WA9=_qa;$?8fdy_j;eY+H3ciR5U?|$2?oT;mPoV=Dx&CwUf
+zv~zYWs{cR#vl*!ChO54O0k3UT#mpur4fXeCdE_aoNtZ|mgF!ck3Nmy<0BRuy4NwCa
+zNZDP7XrHsU<-0NyB2=wXwgEqZPukelExAY+hyWVj0{)~A=X~17KK7XpzxQcB``9fX
+zZf4pp#`ZEanRbG)(+odg+NX?t!SF|>{mPhI!flfFgv9nqI4Wr~5_?s`k0kALiCvcP
+zCrRUFrpVYPYn?Jn%6MGXUXj_GGJYa!U&-tn8Gn&ANnz_0+@olH3VTw)mlf@-!p<v7
+zljhF5u5tObYwR{boRI14NxNkGd6QG=>8{!e#p0ct5}M(h16D>p?OGjSz6v3juERjS
+z#z{?mXvVqrXs_rvUmYR40gNzg(QD6y9E94?4DWO|6eb83LI-smcVC6x1n2reH}rAp
+zLM);f=tWDCr``UF5T>!;PYu^H1g>EBP8A}2*fM>s-@nC3pDV|}6+CtfhG(II7`pcw
+z`jLfJ!?;*R@Bp=Nw2EPOC7FEs(cugIP_K6tN_$~tvS8nx6iOv|IMrO3&-m*N9ZP#b
+znG^~>I|l1cUVSeD9r^k3h0TP}WWD9=MZxY<<azgO1@-W5<NTHW*-d)t{Q4yX9_+?a
+zHawLe=uO6@%xqS#?JxafX%#$`BhkIqq>Z3B2yU!k71#YRpThOJtVheMDA50rV#s@U
+z+nKbA{O(olYR}icuzQD*-cjBQ9;%!eMDVP>7mWsF@=%>o)wSgq=n%DHNOYwRr4Ao6
+zbNdgEn*RdDS>Rud+fIY0N8JkP3q6;>8o%R(CE2n3?Xg%qP+U%~6|{XFyxv7Y#;J2Z
+XK$lk*wsY^m4}9|iz?mg_AjCfat$CyH
+
+literal 0
+HcmV?d00001
+
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads
 new file mode 100644
-index 0000000000..e0a166fe55
+index 0000000000..fcfbd75a92
 --- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads
-@@ -0,0 +1,15 @@
+@@ -0,0 +1,19 @@
 +-- SPDX-License-Identifier: GPL-2.0-or-later
 +
 +with HW.GFX.GMA;
@@ -1334,12 +1567,16 @@ index 0000000000..e0a166fe55
 +
 +   ports : constant Port_List :=
 +     (eDP,
++      DP1,
++      DP2,
++      HDMI1,
++      HDMI2,
 +      others => Disabled);
 +
 +end GMA.Mainboard;
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c
 new file mode 100644
-index 0000000000..fd9cdbef6b
+index 0000000000..a98dd2bc4e
 --- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c
 @@ -0,0 +1,199 @@
@@ -1352,22 +1589,22 @@ index 0000000000..fd9cdbef6b
 +	/* ------- GPIO Community 0 ------- */
 +
 +	/* ------- GPIO Group GPP_A ------- */
-+	PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),
-+	PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
++	PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),				/* -KBRC */
++	PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1),				/* LPC_AD0 */
++	PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1),				/* LPC_AD1 */
++	PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1),				/* LPC_AD2 */
++	PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1),				/* LPC_AD3 */
++	PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),				/* -LPC_FRAME */
++	PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),				/* IRQSER */
++	PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1),				/* -TPM_IRQ */
++	PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),				/* -CLKRUN */
++	PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1),				/* LPCCLK_EC_24M */
++	PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),				/* LPCCLK_DEBUG_24M */
 +	PAD_NC(GPP_A11, NONE),
 +	PAD_NC(GPP_A12, NONE),
-+	PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),
++	PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),				/* -SUSWARN */
++	PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),				/* -SUS_STAT */
++	PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),				/* -SUSWARN */
 +	PAD_NC(GPP_A16, NONE),
 +	PAD_NC(GPP_A17, NONE),
 +	PAD_NC(GPP_A18, NONE),
@@ -1382,18 +1619,18 @@ index 0000000000..fd9cdbef6b
 +	PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1),
 +	PAD_NC(GPP_B2, NONE),
 +	PAD_NC(GPP_B3, NONE),
-+	PAD_CFG_GPI_SCI(GPP_B4, NONE, DEEP, EDGE_SINGLE, INVERT),
-+	PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
++	PAD_CFG_GPI_SCI(GPP_B4, NONE, DEEP, EDGE_SINGLE, INVERT),	/* -TBT_PLUG_EVENT */
++	PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),				/* -CLKREQ_PCIE0 (dGPU) */
++	PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1),				/* -CLKREQ_PCIE3 (WWAN) */
++	PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1),				/* -CLKREQ_PCIE4 (GBE) */
++	PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1),				/* -CLKREQ_PCIE5 (WLAN) */
++	PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),				/* -CLKREQ_PCIE6 (TB3) */
++	PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),				/* -CLKREQ_PCIE8 (SSD) */
 +	PAD_NC(GPP_B11, NONE),
-+	PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),
-+	PAD_CFG_GPO(GPP_B15, 0, DEEP),
++	PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),				/* -PCH_SLP_S0 */
++	PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),				/* -PLTRST */
++	PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1),				/* PCH_SPKR */
++	PAD_CFG_GPO(GPP_B15, 0, DEEP),					/* NFC_DLREQ */
 +	PAD_NC(GPP_B16, NONE),
 +	PAD_NC(GPP_B17, NONE),
 +	PAD_NC(GPP_B18, NONE),
@@ -1406,14 +1643,14 @@ index 0000000000..fd9cdbef6b
 +	/* ------- GPIO Community 1 ------- */
 +
 +	/* ------- GPIO Group GPP_C ------- */
-+	PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),				/* SMB_CLK */
++	PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),				/* SMB_DATA */
 +	PAD_CFG_GPO(GPP_C2, 1, DEEP),
-+	PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),				/* SML0_CLK */
++	PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),				/* SML0_DATA */
 +	PAD_NC(GPP_C5, NONE),
-+	/* GPP_C6 - RESERVED */
-+	/* GPP_C7 - RESERVED */
++	PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),				/* EC_SCL2 */
++	PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),				/* EC_SDA2 */
 +	PAD_NC(GPP_C8, NONE),
 +	PAD_NC(GPP_C9, NONE),
 +	PAD_NC(GPP_C10, NONE),
@@ -1422,14 +1659,14 @@ index 0000000000..fd9cdbef6b
 +	PAD_NC(GPP_C13, NONE),
 +	PAD_NC(GPP_C14, NONE),
 +	PAD_NC(GPP_C15, NONE),
-+	PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),				/* I2C0_DATA */
++	PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),				/* I2C0_CLK */
 +	PAD_NC(GPP_C18, NONE),
 +	PAD_NC(GPP_C19, NONE),
-+	PAD_CFG_GPO(GPP_C20, 0, DEEP),
-+	PAD_CFG_GPO(GPP_C21, 0, DEEP),
-+	PAD_CFG_GPI_SCI(GPP_C22, NONE, DEEP, EDGE_SINGLE, INVERT),
-+	PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT),
++	PAD_CFG_GPO(GPP_C20, 0, DEEP),					/* EPRIVACY_ON */
++	PAD_CFG_GPO(GPP_C21, 0, DEEP),					/* TBT_FORCE_PWR */
++	PAD_CFG_GPI_SCI(GPP_C22, NONE, DEEP, EDGE_SINGLE, INVERT),	/* -EC_SCI */
++	PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT),	/* -EC_WAKE */
 +
 +	/* ------- GPIO Group GPP_D ------- */
 +	PAD_NC(GPP_D0, NONE),
@@ -1441,101 +1678,101 @@ index 0000000000..fd9cdbef6b
 +	PAD_NC(GPP_D6, NONE),
 +	PAD_NC(GPP_D7, NONE),
 +	PAD_NC(GPP_D8, NONE),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_D9, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_D9, UP_20K, DEEP, OFF, ACPI),		/* -DISCRETE_PRESENCE */
 +	PAD_NC(GPP_D10, NONE),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_D11, UP_20K, DEEP, OFF, ACPI),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_D12, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_D11, UP_20K, DEEP, OFF, ACPI),		/* DGFX_VRAM_ID0 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_D12, UP_20K, DEEP, OFF, ACPI),		/* DGFX_VRAM_ID1 */
 +	PAD_NC(GPP_D13, NONE),
 +	PAD_NC(GPP_D14, NONE),
 +	PAD_NC(GPP_D15, NONE),
 +	PAD_NC(GPP_D16, NONE),
-+	PAD_CFG_GPO(GPP_D17, 0, DEEP),
++	PAD_CFG_GPO(GPP_D17, 0, DEEP),					/* DDI_PRIORITY */
 +	PAD_NC(GPP_D18, NONE),
 +	PAD_NC(GPP_D19, NONE),
 +	PAD_NC(GPP_D20, NONE),
 +	PAD_NC(GPP_D21, NONE),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_D22, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_D22, UP_20K, DEEP, OFF, ACPI),		/* -NFC_DTCT */
 +	PAD_NC(GPP_D23, NONE),
 +
 +	/* ------- GPIO Group GPP_E ------- */
-+	PAD_CFG_GPO(GPP_E0, 1, DEEP),
++	PAD_CFG_GPO(GPP_E0, 1, DEEP),					/* BDC_ON */
 +	PAD_NC(GPP_E1, NONE),
-+	PAD_CFG_NF(GPP_E2, NONE, DEEP, NF1),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_E3, NONE, DEEP, EDGE_SINGLE, ACPI),
-+	PAD_CFG_GPO(GPP_E4, 1, DEEP),
++	PAD_CFG_NF(GPP_E2, NONE, DEEP, NF1),				/* -SATA2_DTCT */
++	PAD_CFG_GPI_TRIG_OWN(GPP_E3, NONE, DEEP, EDGE_SINGLE, ACPI),	/* -TBT_PLUG_EVENT */
++	PAD_CFG_GPO(GPP_E4, 1, DEEP),					/* NFC_ON */
 +	PAD_NC(GPP_E5, NONE),
-+	PAD_CFG_NF(GPP_E6, NONE, RSMRST, NF1),
++	PAD_CFG_NF(GPP_E6, NONE, RSMRST, NF1),				/* SATA2_DEVSLP */
 +	PAD_NC(GPP_E7, NONE),
 +	PAD_NC(GPP_E8, NONE),
-+	PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),				/* -USB_PORT0_OC0 */
++	PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1),				/* -USB_PORT1_OC1 */
 +	PAD_NC(GPP_E11, NONE),
-+	PAD_CFG_GPI_APIC_HIGH(GPP_E12, NONE, DEEP),
-+	PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
++	PAD_CFG_GPI_APIC_HIGH(GPP_E12, NONE, DEEP),			/* NFC_INT */
++	PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),				/* DDIP1_HPD */
++	PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),				/* DDIP2_HPD */
 +	PAD_NC(GPP_E15, NONE),
 +	PAD_NC(GPP_E16, NONE),
-+	PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
++	PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),				/* EDP_HPD */
 +	PAD_NC(GPP_E18, NONE),
 +	PAD_CFG_GPO(GPP_E19, 0, DEEP),
-+	PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1),
-+	PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1),
-+	PAD_CFG_TERM_GPO(GPP_E22, 0, UP_20K, RSMRST),
-+	PAD_CFG_TERM_GPO(GPP_E23, 0, UP_20K, RSMRST),
++	PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1),				/* DDIP2_CTRLCLK */
++	PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1),				/* DDIP2_CTRLDATA */
++	PAD_CFG_TERM_GPO(GPP_E22, 0, UP_20K, RSMRST),			/* -GPU_RST */
++	PAD_CFG_TERM_GPO(GPP_E23, 0, UP_20K, RSMRST),			/* 1R8VIDEO_AON_ON */
 +
 +	/* ------- GPIO Community 2 ------- */
 +
 +	/* -------- GPIO Group GPD -------- */
-+	PAD_CFG_NF(GPD0, NONE, PWROK, NF1),
-+	PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1),
-+	PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1),
-+	PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),
-+	PAD_CFG_NF(GPD4, NONE, PWROK, NF1),
-+	PAD_CFG_NF(GPD5, NONE, PWROK, NF1),
-+	PAD_CFG_NF(GPD6, NONE, PWROK, NF1),
++	PAD_CFG_NF(GPD0, NONE, PWROK, NF1),				/* -BATLOW */
++	PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1),				/* AC_PRESENT */
++	PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1),				/* -LANWAKE */
++	PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),				/* -PWRSW_EC */
++	PAD_CFG_NF(GPD4, NONE, PWROK, NF1),				/* -PCH_SLP_S3 */
++	PAD_CFG_NF(GPD5, NONE, PWROK, NF1),				/* -PCH_SLP_S4 */
++	PAD_CFG_NF(GPD6, NONE, PWROK, NF1),				/* -PCH_SLP_M */
 +	PAD_NC(GPD7, NONE),
-+	PAD_CFG_NF(GPD8, NONE, PWROK, NF1),
-+	PAD_CFG_NF(GPD9, NONE, PWROK, NF1),
-+	PAD_CFG_NF(GPD10, NONE, PWROK, NF1),
-+	PAD_CFG_NF(GPD11, NONE, PWROK, NF1),
++	PAD_CFG_NF(GPD8, NONE, PWROK, NF1),				/* SUSCLK_32K */
++	PAD_CFG_NF(GPD9, NONE, PWROK, NF1),				/* -PCH_SLP_WLAN */
++	PAD_CFG_NF(GPD10, NONE, PWROK, NF1),				/* -PCH_SLP_S5 */
++	PAD_CFG_NF(GPD11, NONE, PWROK, NF1),				/* LANPHYPC */
 +
 +	/* ------- GPIO Community 3 ------- */
 +
 +	/* ------- GPIO Group GPP_F ------- */
 +	PAD_CFG_GPO(GPP_F0, 0, DEEP),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F1, NONE, DEEP, OFF, ACPI),
-+	PAD_CFG_GPO(GPP_F2, 1, DEEP),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F3, NONE, PLTRST, OFF, ACPI),
-+	PAD_NC(GPP_F4, NONE),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F1, NONE, DEEP, OFF, ACPI),		/* GC6_FB_EN */
++	PAD_CFG_GPO(GPP_F2, 1, DEEP),					/* -GPU_EVENT */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F3, NONE, PLTRST, OFF, ACPI),		/* DGFX_PWRGD */
++	PAD_NC(GPP_F4, NONE),						/* -WWAN_RESET */
 +	PAD_NC(GPP_F5, NONE),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F6, UP_20K, DEEP, OFF, ACPI),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F7, UP_20K, DEEP, OFF, ACPI),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F8, UP_20K, DEEP, OFF, ACPI),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F9, UP_20K, DEEP, OFF, ACPI),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F10, UP_20K, DEEP, OFF, ACPI),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F11, UP_20K, DEEP, OFF, ACPI),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F12, UP_20K, DEEP, OFF, ACPI),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F13, UP_20K, DEEP, OFF, ACPI),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F14, UP_20K, DEEP, OFF, ACPI),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F15, UP_20K, DEEP, OFF, ACPI),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F16, UP_20K, DEEP, OFF, ACPI),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F17, UP_20K, DEEP, OFF, ACPI),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F18, UP_20K, DEEP, OFF, ACPI),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F19, UP_20K, DEEP, OFF, ACPI),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F20, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F6, UP_20K, DEEP, OFF, ACPI),		/* -MIC_HW_EN (R37 to GND) */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F7, UP_20K, DEEP, OFF, ACPI),		/* -INT_MIC_DTCT */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F8, UP_20K, DEEP, OFF, ACPI),		/* WWAN_CFG0 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F9, UP_20K, DEEP, OFF, ACPI),		/* WWAN_CFG1 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F10, UP_20K, DEEP, OFF, ACPI),		/* WWAN_CFG2 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F11, UP_20K, DEEP, OFF, ACPI),		/* WWAN_CFG3 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F12, UP_20K, DEEP, OFF, ACPI),		/* PLANARID0 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F13, UP_20K, DEEP, OFF, ACPI),		/* PLANARID1 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F14, UP_20K, DEEP, OFF, ACPI),		/* PLANARID2 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F15, UP_20K, DEEP, OFF, ACPI),		/* PLANARID3 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F16, UP_20K, DEEP, OFF, ACPI),		/* MEMORYID0 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F17, UP_20K, DEEP, OFF, ACPI),		/* MEMORYID1 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F18, UP_20K, DEEP, OFF, ACPI),		/* MEMORYID2 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F19, UP_20K, DEEP, OFF, ACPI),		/* MEMORYID3 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F20, UP_20K, DEEP, OFF, ACPI),		/* MEMORYID4 */
 +	PAD_NC(GPP_F21, NONE),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F22, UP_20K, DEEP, OFF, ACPI),
-+	PAD_CFG_GPI_TRIG_OWN(GPP_F23, UP_20K, DEEP, OFF, ACPI),
++	PAD_CFG_GPI_TRIG_OWN(GPP_F22, UP_20K, DEEP, OFF, ACPI),		/* -TAMPER_SW_DTCT */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F23, UP_20K, DEEP, OFF, ACPI),		/* -SC_DTCT */
 +
 +	/* ------- GPIO Group GPP_G ------- */
 +	PAD_NC(GPP_G0, NONE),
 +	PAD_NC(GPP_G1, NONE),
 +	PAD_NC(GPP_G2, NONE),
 +	PAD_NC(GPP_G3, NONE),
-+	PAD_CFG_GPO(GPP_G4, 0, DEEP),
-+	PAD_CFG_GPO(GPP_G5, 0, DEEP),
-+	PAD_CFG_GPO(GPP_G6, 0, DEEP),
-+	PAD_CFG_GPI_SCI(GPP_G7, NONE, DEEP, LEVEL, INVERT),
++	PAD_CFG_GPO(GPP_G4, 0, DEEP),					/* TBT_RTD3_PWR_EN */
++	PAD_CFG_GPO(GPP_G5, 0, DEEP),					/* TBT_FORCE_USB_PWR */
++	PAD_CFG_GPO(GPP_G6, 0, DEEP),					/* -TBT_PERST */
++	PAD_CFG_GPI_SCI(GPP_G7, NONE, DEEP, LEVEL, INVERT),		/* -TBT_PCIE_WAKE */
 +};
 +
 +void variant_config_gpios(void)
@@ -1544,26 +1781,156 @@ index 0000000000..fd9cdbef6b
 +}
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c
 new file mode 100644
-index 0000000000..d9d103f862
+index 0000000000..b1d96c5a76
 --- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c
-@@ -0,0 +1,10 @@
+@@ -0,0 +1,90 @@
 +/* SPDX-License-Identifier: GPL-2.0-only */
 +
 +#include <device/azalia_device.h>
 +
 +const u32 cim_verb_data[] = {
++	0x10ec0257, // Vendor/Device ID: Realtek ALC257
++	0x17aa2258, // Subsystem ID
++	11,
++	AZALIA_SUBVENDOR(0, 0x17aa2258),
++
++	AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_DESC(
++		AZALIA_INTEGRATED,
++		AZALIA_INTERNAL,
++		AZALIA_MIC_IN,
++		AZALIA_OTHER_DIGITAL,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_NO_JACK_PRESENCE_DETECT,
++		2, 0
++	)),
++	AZALIA_PIN_CFG(0, 0x13, 0x40000000), // does not describe a jack or internal device
++	AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_DESC(
++		AZALIA_INTEGRATED,
++		AZALIA_INTERNAL,
++		AZALIA_SPEAKER,
++		AZALIA_OTHER_ANALOG,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_NO_JACK_PRESENCE_DETECT,
++		1, 0
++	)),
++	AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT,
++		AZALIA_MIC_IN,
++		AZALIA_STEREO_MONO_1_8,
++		AZALIA_BLACK,
++		AZALIA_JACK_PRESENCE_DETECT,
++		3, 0
++	)),
++	AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x1d, 0x40661b45), // does not describe a jack or internal device
++	AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
++	AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT,
++		AZALIA_HP_OUT,
++		AZALIA_STEREO_MONO_1_8,
++		AZALIA_BLACK,
++		AZALIA_JACK_PRESENCE_DETECT,
++		1, 15
++	)),
++
++	0x8086280b, // Vendor/Device ID: Intel Kabylake HDMI
++	0x80860101, // Subsystem ID
++	4,
++	AZALIA_SUBVENDOR(2, 0x80860101),
++
++	AZALIA_PIN_CFG(2, 0x05, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_DIGITAL_DISPLAY,
++		AZALIA_DIGITAL_OTHER_OUT,
++		AZALIA_OTHER_DIGITAL,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_JACK_PRESENCE_DETECT,
++		1, 0
++	)),
++	AZALIA_PIN_CFG(2, 0x06, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_DIGITAL_DISPLAY,
++		AZALIA_DIGITAL_OTHER_OUT,
++		AZALIA_OTHER_DIGITAL,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_JACK_PRESENCE_DETECT,
++		1, 0
++	)),
++	AZALIA_PIN_CFG(2, 0x07, AZALIA_PIN_DESC(
++		AZALIA_JACK,
++		AZALIA_DIGITAL_DISPLAY,
++		AZALIA_DIGITAL_OTHER_OUT,
++		AZALIA_OTHER_DIGITAL,
++		AZALIA_COLOR_UNKNOWN,
++		AZALIA_JACK_PRESENCE_DETECT,
++		1, 0
++	)),
 +};
 +
 +const u32 pc_beep_verbs[] = {};
 +
 +AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c
+new file mode 100644
+index 0000000000..085abebbcb
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c
+@@ -0,0 +1,44 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cbfs.h>
++#include <gpio.h>
++#include <soc/gpio.h>
++#include <soc/romstage.h>
++#include <spd_bin.h>
++#include <stdio.h>
++
++static const struct pad_config memory_id_gpio_table[] = {
++	PAD_CFG_GPI_TRIG_OWN(GPP_F16, UP_20K, DEEP, OFF, ACPI),		/* MEMORYID0 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F17, UP_20K, DEEP, OFF, ACPI),		/* MEMORYID1 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F18, UP_20K, DEEP, OFF, ACPI),		/* MEMORYID2 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F19, UP_20K, DEEP, OFF, ACPI),		/* MEMORYID3 */
++	PAD_CFG_GPI_TRIG_OWN(GPP_F20, UP_20K, DEEP, OFF, ACPI),		/* MEMORYID4 */
++};
++
++void mainboard_memory_init_params(FSPM_UPD *mupd)
++{
++	int spd_idx;
++	char spd_name[20];
++	size_t spd_size;
++
++	FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig;
++	mem_cfg->DqPinsInterleaved = true;			/* DDR_DQ in interleave mode */
++	mem_cfg->CaVrefConfig      = 2;				/* VREF_CA to CH_A and VREF_DQ_B to CH_B */
++	mem_cfg->MemorySpdDataLen  = CONFIG_DIMM_SPD_SIZE;
++
++	/* Get SPD for soldered RAM SPD (CH A) */
++	gpio_configure_pads(memory_id_gpio_table, ARRAY_SIZE(memory_id_gpio_table));
++
++	spd_idx = gpio_get(GPP_F16) | gpio_get(GPP_F17) << 1 | gpio_get(GPP_F18) << 2 |
++		  gpio_get(GPP_F19) << 3 | gpio_get(GPP_F20) << 4;
++	printk(BIOS_DEBUG, "Detected MEMORY_ID = %d\n", spd_idx);
++	snprintf(spd_name, sizeof spd_name, "spd_%d.bin", spd_idx);
++	mem_cfg->MemorySpdPtr00    = (uintptr_t)cbfs_map(spd_name, &spd_size);
++
++	/* Get SPD for memory slot (CH B) */
++	struct spd_block blk = { .addr_map = { [1] = 0x51, } };
++	get_spd_smbus(&blk);
++	dump_spd_info(&blk);
++
++	mem_cfg->MemorySpdPtr10    = (uintptr_t)blk.spd_array[1];
++}
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
 new file mode 100644
-index 0000000000..2cac8c4a75
+index 0000000000..5f1c38bc03
 --- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
-@@ -0,0 +1,121 @@
+@@ -0,0 +1,124 @@
 +# SPDX-License-Identifier: GPL-2.0-only
 +
 +chip soc/intel/skylake
@@ -1587,29 +1954,33 @@ index 0000000000..2cac8c4a75
 +
 +	device domain 0 on
 +		device ref south_xhci on
-+			# TODO: USB ports
 +			register "usb2_ports" = "{
-+				[0] = USB2_PORT_MID(OC_SKIP),
-+				[1] = USB2_PORT_MID(OC_SKIP),
-+				[2] = USB2_PORT_MID(OC_SKIP),
-+				[3] = USB2_PORT_MID(OC_SKIP),
-+				[4] = USB2_PORT_MID(OC_SKIP),
-+				[5] = USB2_PORT_MID(OC_SKIP),
-+				[6] = USB2_PORT_MID(OC_SKIP),
-+				[7] = USB2_PORT_MID(OC_SKIP),
-+				[8] = USB2_PORT_MID(OC_SKIP),
-+				[9] = USB2_PORT_MID(OC_SKIP),
++				[0] = USB2_PORT_MID(OC0),		// JUSB1 (USB-A always on)
++				[1] = USB2_PORT_MID(OC1),		// JUSB2 (USB-A)
++				[2] = USB2_PORT_MID(OC_SKIP),		// JFPR (smartcard slot)
++				[3] = USB2_PORT_MID(OC_SKIP),		// JUSBC (USB-C)
++				[4] = USB2_PORT_MID(OC_SKIP),		// JCAM (IR camera)
++				[5] = USB2_PORT_MID(OC_SKIP),		// JWWAN (M.2 WWAN USB)
++				[6] = USB2_PORT_MID(OC_SKIP),		// JWLAN (M.2 WLAN USB)
++				[7] = USB2_PORT_MID(OC_SKIP),		// JCAM (webcam)
++				[8] = USB2_PORT_MID(OC_SKIP),		// JFPR (fingerprint reader)
++				[9] = USB2_PORT_MID(OC_SKIP),		// JLCD (touch panel)
 +			}"
 +			register "usb3_ports" = "{
-+				[0] = USB3_PORT_DEFAULT(OC_SKIP),
-+				[1] = USB3_PORT_DEFAULT(OC_SKIP),
-+				[2] = USB3_PORT_DEFAULT(OC_SKIP),
-+				[3] = USB3_PORT_DEFAULT(OC_SKIP),
++				[0] = USB3_PORT_DEFAULT(OC0),		// JUSB1 (USB-A always on)
++				[1] = USB3_PORT_DEFAULT(OC1),		// JUSB2 (USB-A)
++				[2] = USB3_PORT_DEFAULT(OC_SKIP),	// JSD (SD card reader)
++				[3] = USB3_PORT_DEFAULT(OC_SKIP),	// JUSBC (USB-C)
 +			}"
 +		end
 +
 +		device ref sata on
-+			# TODO: sata ports
++			# SATA_0  - NC
++			# SATA_1A - NC
++			# SATA_1B - NC
++			# SATA_2  - M.2 2280 SATA
++			register "SataPortsEnable[3]" = "1"
++			register "SataPortsDevSlp[3]" = "1"
 +		end
 +
 +		# PCIe controller 1 - 1x2+2x1
@@ -1673,7 +2044,7 @@ index 0000000000..2cac8c4a75
 +			register "PcieRpHotPlug[4]"			= "1"
 +		end
 +
-+		# M.2 caddy - x2
++		# M.2 2280 SSD - x2
 +		device ref pcie_rp9 on
 +			register "PcieRpEnable[8]"			= "1"
 +			register "PcieRpClkReqSupport[8]"		= "1"
@@ -1681,10 +2052,248 @@ index 0000000000..2cac8c4a75
 +			register "PcieRpClkSrcNumber[8]"		= "5"
 +			register "PcieRpAdvancedErrorReporting[8]"	= "1"
 +			register "PcieRpLtrEnable[8]"			= "1"
-+			register "PcieRpHotPlug[8]"			= "1"
 +		end
 +	end
 +end
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_0.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_0.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..86f39ddb55ea9fb58d5e5699637636ef597c734e
+GIT binary patch
+literal 512
+zcmY!u;9+)EWZ+<6U|?oq29gXMJYRrxPEL*>N67~+1r7#Qh7a1t+8`-(puhlu3{YAD
+YT>%dM8_BI;nL`dsaHtp+rc($20I8n}l>h($
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_1.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_1.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..df0f6e58b79286a4aeb690c5027adf7a1f5f668b
+GIT binary patch
+literal 512
+zcmY!u;9+i6oWQ}rz`)GN3?vyic)kGXoSYm%j*<^t3LFfq3@hZcwLwzoK!E`Q8KATR
+Yx&j>hH(SqvWezd%<4`dwOs5b40B_I==>Px#
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_10.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_10.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..24f0d8992bc5244c62488da9633e4885f52f3e22
+GIT binary patch
+literal 512
+zcmY!u<Y9JIWZ+;(U|?oqW&i?q-XHu740(BZf(&^dxD+@TSQ$QOn`kgpFo@WI<Pkv3
+zjN25185j^Oge*SRoUI_)=hwI&^9wTJQ%GaE+Z>cy&~OfFg0G3Wp`)phiHWn5fv$6q
+PvjPw>z-1}5hGzN!nb#F$
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_11.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_11.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..59b6b9e78263c42aae367ab7d4a784d888f30efe
+GIT binary patch
+literal 512
+zcmY!u<Y8`AWZ+;(U|?osW&i?q-XHu740(BZf(&^dxD+@TSQ%DGYiKZ3Fo@WI<Pm^J
+zTbD)5RGF87L5G`J#gvCx7a@nAHD@bG{`ob#fBb?9_?6OB_I)U&#y6aUn&4|<Zs=&}
+YZDQ=?WT@*L<g5S$3~*UWt)ZEI0F{0fq5uE@
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_12.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_12.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..93be0ac94fc57222cd29e34eee11042d7842ac25
+GIT binary patch
+literal 512
+zcmY!u<Y9JIWZ+;(U|?oqW&i?q-XHu740(BZf(&^dxD+@TSQ$QOn`kgpFo@WI<Pkv3
+zjN25185j^Oge*SRoUI_)=hwI&^9wTJQ%GaE+Z>cy(6E*fVuXjUqlKwqu$iM<keQ!u
+VsD}a&Ff^?FkI#a;_$28g2LQ`x7jOUo
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_13.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_13.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..171a272bc734b72395622bf889d24972ef2d14f7
+GIT binary patch
+literal 512
+zcmY!u<Y8`AWZ+;(U|?osW&i?q-XHu740(BZf(&^dxD+@TSQ%DGYiKZ3Fo@WI<Pkv3
+zjN25185j^Oge*SRoUI_)=hr%!_!*h-DWtL7fk%{D(6E*fVuXjUqob)|u$iN8keQ!u
+VsD}a&Ff^?FkI#a;_$28g2LP>g7pDLK
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_14.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_14.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..a2a64a5e1adada3fc00b2e4edc60c77e610881a9
+GIT binary patch
+literal 512
+zcmY!u<Y9JIWZ+;(U|?oqW&i><-XH%N8S?V-1R3%^a4B#wurhqmHql_HU=XnZ$x{Q&
+z*$Oh{IYWaWKO+-03?$Qx1CPkm2-nu217(^xhPas;8kw1RMCls2o4FbS#SI&DT;VDQ
+GCj$V){1T)9
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_15.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_15.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..a2a64a5e1adada3fc00b2e4edc60c77e610881a9
+GIT binary patch
+literal 512
+zcmY!u<Y9JIWZ+;(U|?oqW&i><-XH%N8S?V-1R3%^a4B#wurhqmHql_HU=XnZ$x{Q&
+z*$Oh{IYWaWKO+-03?$Qx1CPkm2-nu217(^xhPas;8kw1RMCls2o4FbS#SI&DT;VDQ
+GCj$V){1T)9
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_16.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_16.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..a64a5a93fb4aef4d5f63d79cb2582731b9ac5063
+GIT binary patch
+literal 512
+NcmZQz7zHCa1ONg600961
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_17.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_17.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..5f23e86606094d3e5d2011db902ebd4a500bbffa
+GIT binary patch
+literal 512
+zcmY!u<Y9JIWZ+;(U|?oqW&i><-XHc140(BZf(&^dxD+@TSQ$QOn`kgpFo@WI<Pkv3
+zjN25185j^Oge*SRoUI_)=M3$7{ESTa6w+Akz#~d6Xjsb#F~Y;w(ZbX)*v#20$jnbS
+V%v%8n7#i08$7jJ^e3JB$0{}ZV7fApB
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_18.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_18.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..05633943eb5af166da66a2e1f4e74948f75782fb
+GIT binary patch
+literal 512
+zcmY!u<Y9JIoXEkDz`)GN%m4&zyg%$281nM+1R3%^a4B#wurhqmHql_HU=XnZ$s>T6
+z8Mi42GcX`n2w8lrIa@)p&l&!{<7bq|r;x^SwThHl(6E*fVuXjUqobjFu$i-OkeQ!u
+Vn70BDFf^?FkI#a;_$28g2LNS*7)Ag9
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_19.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_19.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..857da9c9828cdac842329f6cef4539283777268b
+GIT binary patch
+literal 512
+zcmY!u<Y9JIWZ+;(U|?oqW&i?K-XH(98S?V-1R3%^a4B#wurhqmHql_HU=XnZ$x{Q&
+z*$Oh{Il~1>enuv07)YiW2Og2B5w5L42g)>Y3~@6xG%_>sh|)E7H}WzBiW@fQc)?W;
+GP6hy+m=i1j
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_2.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_2.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..b5b14cf2dfa06ae183b0379da4dc825129e1589f
+GIT binary patch
+literal 512
+zcmY!u;9+)EWZ+<6U|?oq29gXMJU@VRUS6IcN7)B11r7#Qh7a1tdLSuupuhlu3{YAD
+XT>%b$v*cE=%%S%6I8=-Z(<uZ1pPdSg
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_20.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_20.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..a64a5a93fb4aef4d5f63d79cb2582731b9ac5063
+GIT binary patch
+literal 512
+NcmZQz7zHCa1ONg600961
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_3.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_3.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..d73736008af1eb67456b2fd66f7dec3b6669a442
+GIT binary patch
+literal 512
+zcmY!u;9+i&oWQ}rz`)GN3?vyic)kGXoSYm%juHh92G#;*h81$!dLSuupuhlu3{YAD
+YT>%b$+tzbnnL|62aHtp+rc($20QGqazW@LL
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_4.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_4.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..829f149547bc24859646c33d5926938d7a1b90cb
+GIT binary patch
+literal 512
+zcmY!u;9+)EWZ+<6U|?oq29gXMJYRrxPEL*>N67~+1r7#Qh7a1tdLSuupuhlu3{YAD
+XT>%b$o8(ro%%OI594bbI=@bG0z{d&v
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_5.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_5.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..a64a5a93fb4aef4d5f63d79cb2582731b9ac5063
+GIT binary patch
+literal 512
+NcmZQz7zHCa1ONg600961
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_6.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_6.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..a64a5a93fb4aef4d5f63d79cb2582731b9ac5063
+GIT binary patch
+literal 512
+NcmZQz7zHCa1ONg600961
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_7.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_7.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..940f1e3cd8e5bd9ea32a82a14edcdcbc8132d8c7
+GIT binary patch
+literal 512
+zcmY!u<Y8`AWZ+;(U|?osW&i><-XH%N8S?V-1R3%^a4B#wurjQW(9mG0U=XnZ$x{Q&
+z0UPq1A)%L_QJxwGl4(Y*BAFWD+8T7AOcTeDU_*B^6OSleBX=`bLy)jxgN`d)<=|uh
+E020*^DF6Tf
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_8.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_8.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..30c84410d417ef7afa8705c93cdb64a9f4e915a0
+GIT binary patch
+literal 512
+zcmY!u<Y9JIWZ+;(U|?oqW&i?q-XHZ040(BZf(&^dxD+@TSQ$QOn`kgpFo@WI<f#GX
+zYz3L}{MzzRenxp}7)YiWinU~FgllWifig`TL)=Uajm%6uqI8Yijh&1X6cmgabe!NS
+H2PXpn6CD!Q
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_9.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_9.bin
+new file mode 100644
+index 0000000000000000000000000000000000000000..7facef55b93fe1f67411c00bab84862769461f63
+GIT binary patch
+literal 512
+zcmY!u<Y8`AWZ+;(U|?osW&i?q-XHZ040(BZf(&^dxD+@TSQ%DGYiKZ3Fo@WI<f#GX
+zYz3L}{F>W!enxp}7)YiWinU~FgllWifig`TLxK(6%}hL^bdB7N9Ss$Lz^FmT39fQ*
+FG5`?&65ap+
+
+literal 0
+HcmV?d00001
+
 -- 
 2.39.5
 
diff --git a/config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch b/config/coreboot/next/patches/0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
similarity index 99%
rename from config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
rename to config/coreboot/next/patches/0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
index 33e7a55d..e490a807 100644
--- a/config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
+++ b/config/coreboot/next/patches/0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
@@ -1,7 +1,7 @@
-From bc884fae79664c0d606991b5e0d62c608f3bef35 Mon Sep 17 00:00:00 2001
+From 534d696a570a50057153669247933ec1a4a2480f Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 30 Sep 2024 20:44:38 -0400
-Subject: [PATCH 4/9] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
+Subject: [PATCH 5/8] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
 
 Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
diff --git a/config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/next/patches/0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
similarity index 98%
rename from config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
rename to config/coreboot/next/patches/0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
index d623f57f..51bbfa5c 100644
--- a/config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ b/config/coreboot/next/patches/0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -1,7 +1,7 @@
-From 13da22a18b2c13b8676c69e929ba51f2d5d188cf Mon Sep 17 00:00:00 2001
+From 851043846f589e718a69009a6b157b4ff5315471 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 5/9] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 6/8] util/ifdtool: add --nuke flag (all 0xFF on region)
 
 When this option is used, the region's contents are overwritten
 with all ones (0xFF).
diff --git a/config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/next/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
similarity index 91%
rename from config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch
rename to config/coreboot/next/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
index 6ca8bee8..47f549a1 100644
--- a/config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ b/config/coreboot/next/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -1,7 +1,7 @@
-From bc1c834506a749eb2b235e51bb75b04b5b939ad5 Mon Sep 17 00:00:00 2001
+From fa6ac5b7f134b98a4f68f0f6b8bdeb6c7b6871ab Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 6/9] Remove warning for coreboot images built without a
+Subject: [PATCH 7/8] Remove warning for coreboot images built without a
  payload
 
 I added this in upstream to prevent people from accidentally flashing
diff --git a/config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch b/config/coreboot/next/patches/0008-mb-dell-optiplex_780-Add-USFF-variant.patch
similarity index 98%
rename from config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch
rename to config/coreboot/next/patches/0008-mb-dell-optiplex_780-Add-USFF-variant.patch
index 17168733..d49e0e9d 100644
--- a/config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch
+++ b/config/coreboot/next/patches/0008-mb-dell-optiplex_780-Add-USFF-variant.patch
@@ -1,7 +1,7 @@
-From 1fa342e9462503c871bc5f4a0e4508ff8eac3e68 Mon Sep 17 00:00:00 2001
+From 636cb8ae8610cd99b637448add778c8e4f364f3e Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Wed, 30 Oct 2024 20:55:25 -0600
-Subject: [PATCH 7/9] mb/dell/optiplex_780: Add USFF variant
+Subject: [PATCH 8/8] mb/dell/optiplex_780: Add USFF variant
 
 Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
diff --git a/config/coreboot/next/patches/0009-lenovo-t480-Add-MAINBOARD_USES_IFD_GBE_REGION.patch b/config/coreboot/next/patches/0009-lenovo-t480-Add-MAINBOARD_USES_IFD_GBE_REGION.patch
deleted file mode 100644
index ee0e2785..00000000
--- a/config/coreboot/next/patches/0009-lenovo-t480-Add-MAINBOARD_USES_IFD_GBE_REGION.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-From 4bd27d11c2ccd65a3b2a2e465aab9922e8aee31a Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sun, 1 Dec 2024 07:16:20 +0000
-Subject: [PATCH 9/9] lenovo/t480: Add MAINBOARD_USES_IFD_GBE_REGION
-
-This board does use a GbE region, so support it in menuconfig.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/mainboard/lenovo/sklkbl_thinkpad/Kconfig | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
-index 13d71670e3..a3593e3785 100644
---- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
-@@ -15,6 +15,7 @@ config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
- 	select MAINBOARD_HAS_LIBGFXINIT
- 	select MEMORY_MAPPED_TPM
- 	select MAINBOARD_HAS_TPM2
-+	select MAINBOARD_USES_IFD_GBE_REGION
- 	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
- 	select SPD_READ_BY_WORD
- 	select SYSTEM_TYPE_LAPTOP
--- 
-2.39.5
-
diff --git a/config/coreboot/next/patches/0010-add-vbt-file-for-thinkpad-t480s.patch b/config/coreboot/next/patches/0010-add-vbt-file-for-thinkpad-t480s.patch
deleted file mode 100644
index b9bde459..00000000
--- a/config/coreboot/next/patches/0010-add-vbt-file-for-thinkpad-t480s.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From c865010771f413d532713319b7b01e9da9dbf495 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Mon, 2 Dec 2024 03:12:52 +0000
-Subject: [PATCH 1/1] add vbt file for thinkpad t480s
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- .../sklkbl_thinkpad/variants/t480s/data.vbt      | Bin 0 -> 4106 bytes
- 1 file changed, 0 insertions(+), 0 deletions(-)
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt
-
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..47732e37d5b2bad4e674fd10eafa605d26f97840
-GIT binary patch
-literal 4106
-zcmeHJUu+a*5TCu>yW9JAmoD2P<t%lC2CfC#y%tU^HSGOq>9tqx`iFWXCLD09R<E?S
-zMT)`nNScT-%9*GEA8a2?G`v`!jPV6yVlcd5OnC6Y;F}U&jJz1db9VRID@E)DLk#NN
-z&9^i2&Hiq_`R2ZF8ipf7IM{nI5$^585@kULrrx0OPKv~ngNI__q41$dA{p()ui+v1
-zw(9rm09lUPAP4nOTm0CRnF|aw5^SQSH<G}<u_Gfnvn6IuK0h@!j;UxI!$*&rIdkIh
-zl$piB;eBDWa1|CgK9bAg{^O%Z%!ziiz{neeJDb~fBI?1GV5p^44?a$ETl=n1d+;%Z
-z#X6(OzEnIB9*QUTV{!mv@xk!mU}s+>aS&4j$?kY0KGYdgn6;MZ*!anbk!PNr!a%eU
-zTXkLEL3ly5L&oUX#CS7?b2%Kad?s<goHQq1G_%bLv);c5qQC)gZtxnw!L3%1MWI_X
-z0wUImYD_R11gsI%l%Zw})KN_c#&!YgM3v;Up{7+s1=lXlB>-#@;mhg8>>>#S&)d2I
-zmP&-g0$k02szSQj(Y*j}YYtQnDH0;2ui<!ko-28Y){6ilAcrmz951v4RTWQ_ye!or
-z4xOJya#Sr7{o)%XFUfJCndM%KM(c^ol_hzlb*1h&uC%Vy%U(P!_qUfwcb4r;SmPQ_
-zhxf($vVo)we+jxogb`7NQ^aS9eQpNT#2bmX5(kO*5O)$Mi4PJVB_1U{L42C{HR894
-z=ZJk70(Q~o{*COiRR#_fix0XaS3?igAuo2!)<NF8ARGWF&M7=h16xZaS|UxpZA)w3
-z1CQUC@^&oxtbG2HGk&WA9=_qa;$?8fdy_j;eY+H3ciR5U?|$2?oT;mPoV=Dx&CwUf
-zv~zYWs{cR#vl*!ChO54O0k3UT#mpur4fXeCdE_aoNtZ|mgF!ck3Nmy<0BRuy4NwCa
-zNZDP7XrHsU<-0NyB2=wXwgEqZPukelExAY+hyWVj0{)~A=X~17KK7XpzxQcB``9fX
-zZf4pp#`ZEanRbG)(+odg+NX?t!SF|>{mPhI!flfFgv9nqI4Wr~5_?s`k0kALiCvcP
-zCrRUFrpVYPYn?Jn%6MGXUXj_GGJYa!U&-tn8Gn&ANnz_0+@olH3VTw)mlf@-!p<v7
-zljhF5u5tObYwR{boRI14NxNkGd6QG=>8{!e#p0ct5}M(h16D>p?OGjSz6v3juERjS
-z#z{?mXvVqrXs_rvUmYR40gNzg(QD6y9E94?4DWO|6eb83LI-smcVC6x1n2reH}rAp
-zLM);f=tWDCr``UF5T>!;PYu^H1g>EBP8A}2*fM>s-@nC3pDV|}6+CtfhG(II7`pcw
-z`jLfJ!?;*R@Bp=Nw2EPOC7FEs(cugIP_K6tN_$~tvS8nx6iOv|IMrO3&-m*N9ZP#b
-znG^~>I|l1cUVSeD9r^k3h0TP}WWD9=MZxY<<azgO1@-W5<NTHW*-d)t{Q4yX9_+?a
-zHawLe=uO6@%xqS#?JxafX%#$`BhkIqq>Z3B2yU!k71#YRpThOJtVheMDA50rV#s@U
-z+nKbA{O(olYR}icuzQD*-cjBQ9;%!eMDVP>7mWsF@=%>o)wSgq=n%DHNOYwRr4Ao6
-zbNdgEn*RdDS>Rud+fIY0N8JkP3q6;>8o%R(CE2n3?Xg%qP+U%~6|{XFyxv7Y#;J2Z
-XK$lk*wsY^m4}9|iz?mg_AjCfat$CyH
-
-literal 0
-HcmV?d00001
-
--- 
-2.39.5
-
diff --git a/config/coreboot/next/patches/0011-Disable-m2-hotplug-in-lenovo-t480s-devicetree.patch b/config/coreboot/next/patches/0011-Disable-m2-hotplug-in-lenovo-t480s-devicetree.patch
deleted file mode 100644
index 00a844c1..00000000
--- a/config/coreboot/next/patches/0011-Disable-m2-hotplug-in-lenovo-t480s-devicetree.patch
+++ /dev/null
@@ -1,30 +0,0 @@
-From 44d0703b61156a19c6cbfb5cfe3f5d58e328daae Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Mon, 2 Dec 2024 11:16:43 +0000
-Subject: [PATCH 1/1] Disable m2 hotplug in lenovo t480s devicetree
-
-This fixes a bug where nvme disappears and gets renamed on
-s3 resume.
-
-Thanks go to Mate Kukri who suggested this.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- .../lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb        | 1 -
- 1 file changed, 1 deletion(-)
-
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
-index 2cac8c4a75..9129d3a1b8 100644
---- a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
-@@ -115,7 +115,6 @@ chip soc/intel/skylake
- 			register "PcieRpClkSrcNumber[8]"		= "5"
- 			register "PcieRpAdvancedErrorReporting[8]"	= "1"
- 			register "PcieRpLtrEnable[8]"			= "1"
--			register "PcieRpHotPlug[8]"			= "1"
- 		end
- 	end
- end
--- 
-2.39.5
-

From 5b4c9158e5a79f8d7e776c8c4ece69dda5aa8690 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 2 Dec 2024 20:37:26 +0000
Subject: [PATCH 0906/1549] trees: Allow using a custom clean command

On coreboot for example, as Mate has told me, if you're
making Kconfig changes and re-compiling, sometimes the
actual image that you build might still have the old one
in it, due to how coreboot's build system works.

To mitigate this, you can just always run distclean before
doing the build, but lbmk was doing just clean.

In practise, we did not find any issues, but this change should
be harmless, and might prevent such issues in the future. It's
even possible that we might have already encountered this before
and not realised, and we were just lucky that no noticeable issues
were caused.

It's *also* possible that the reverse is true: an issue that
was previously covered up, then that issue will now be exposed.
However, if that turns out to be true, then that is good because
we are exposing said bugs and then we will know to fix them!

Anyway, the variable in target.cfg is:

cleancmd="whatever_you_want"

e.g.

cleancmd="distclean"

You may also specify this in global mkhelper.cfg files, per
project; I've already done this for SeaBIOS, coreboot
and U-Boot, since all of these use Kconfig files.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/coreboot/mkhelper.cfg |  1 +
 config/data/seabios/mkhelper.cfg  |  1 +
 config/data/u-boot/mkhelper.cfg   |  1 +
 script/trees                      | 10 +++++++---
 4 files changed, 10 insertions(+), 3 deletions(-)
 create mode 100644 config/data/u-boot/mkhelper.cfg

diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index a218e0e7..8d892fc4 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -2,6 +2,7 @@
 
 makeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 build_depend="seabios/default grub/default memtest86plus u-boot/amd64coreboot"
+cleancmd="distclean"
 
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 
diff --git a/config/data/seabios/mkhelper.cfg b/config/data/seabios/mkhelper.cfg
index e69de29b..86c74456 100644
--- a/config/data/seabios/mkhelper.cfg
+++ b/config/data/seabios/mkhelper.cfg
@@ -0,0 +1 @@
+cleancmd="distclean"
diff --git a/config/data/u-boot/mkhelper.cfg b/config/data/u-boot/mkhelper.cfg
new file mode 100644
index 00000000..86c74456
--- /dev/null
+++ b/config/data/u-boot/mkhelper.cfg
@@ -0,0 +1 @@
+cleancmd="distclean"
diff --git a/script/trees b/script/trees
index 698d2b34..b40c00db 100755
--- a/script/trees
+++ b/script/trees
@@ -14,7 +14,8 @@ XBMKPATH="$PATH"
 eval `setvars "" xarch srcdir premake cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
-    defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs`; badhash="n"
+    defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs cleancmd`
+badhash="n"
 
 main()
 {
@@ -116,7 +117,7 @@ configure_project()
 {
 	eval `setvars "" xarch xlang build_depend autoconfargs xtree postmake \
 	    tree_depend makeargs btype mkhelper bootstrapargs premake release \
-	    cleanargs`
+	    cleanargs cleancmd`
 	_tcfg="$1/target.cfg"; badhash="n"; [ -f "$_tcfg" ] || btype="auto"
 	[ -f "$datadir/mkhelper.cfg" ] && eval `setcfg "$datadir/mkhelper.cfg"`
 
@@ -231,7 +232,10 @@ elfcheck()
 
 handle_makefile()
 {
-	$dry check_makefile "$srcdir" && x_ make -C "$srcdir" $cleanargs clean
+	_cleancmd="clean"
+	[ -n "$cleancmd" ] && _cleancmd="$cleancmd"
+	$dry check_makefile "$srcdir" && \
+	    x_ make -C "$srcdir" $cleanargs $_cleancmd
 	[ -f "$defconfig" ] && x_ cp "$defconfig" "$srcdir/.config"
 	[ -n "$mode" ] || [ -n "$btype" ] || $dry make -C \
 	    "$srcdir" silentoldconfig || make -C "$srcdir" oldconfig || :

From efebfa992b6f64d610115502d47468bc039b3a59 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 2 Dec 2024 21:22:36 +0000
Subject: [PATCH 0907/1549] Revert "trees: Allow using a custom clean command"

This reverts commit 5b4c9158e5a79f8d7e776c8c4ece69dda5aa8690.
---
 config/data/coreboot/mkhelper.cfg |  1 -
 config/data/seabios/mkhelper.cfg  |  1 -
 config/data/u-boot/mkhelper.cfg   |  1 -
 script/trees                      | 10 +++-------
 4 files changed, 3 insertions(+), 10 deletions(-)
 delete mode 100644 config/data/u-boot/mkhelper.cfg

diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index 8d892fc4..a218e0e7 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -2,7 +2,6 @@
 
 makeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 build_depend="seabios/default grub/default memtest86plus u-boot/amd64coreboot"
-cleancmd="distclean"
 
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 
diff --git a/config/data/seabios/mkhelper.cfg b/config/data/seabios/mkhelper.cfg
index 86c74456..e69de29b 100644
--- a/config/data/seabios/mkhelper.cfg
+++ b/config/data/seabios/mkhelper.cfg
@@ -1 +0,0 @@
-cleancmd="distclean"
diff --git a/config/data/u-boot/mkhelper.cfg b/config/data/u-boot/mkhelper.cfg
deleted file mode 100644
index 86c74456..00000000
--- a/config/data/u-boot/mkhelper.cfg
+++ /dev/null
@@ -1 +0,0 @@
-cleancmd="distclean"
diff --git a/script/trees b/script/trees
index b40c00db..698d2b34 100755
--- a/script/trees
+++ b/script/trees
@@ -14,8 +14,7 @@ XBMKPATH="$PATH"
 eval `setvars "" xarch srcdir premake cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
-    defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs cleancmd`
-badhash="n"
+    defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs`; badhash="n"
 
 main()
 {
@@ -117,7 +116,7 @@ configure_project()
 {
 	eval `setvars "" xarch xlang build_depend autoconfargs xtree postmake \
 	    tree_depend makeargs btype mkhelper bootstrapargs premake release \
-	    cleanargs cleancmd`
+	    cleanargs`
 	_tcfg="$1/target.cfg"; badhash="n"; [ -f "$_tcfg" ] || btype="auto"
 	[ -f "$datadir/mkhelper.cfg" ] && eval `setcfg "$datadir/mkhelper.cfg"`
 
@@ -232,10 +231,7 @@ elfcheck()
 
 handle_makefile()
 {
-	_cleancmd="clean"
-	[ -n "$cleancmd" ] && _cleancmd="$cleancmd"
-	$dry check_makefile "$srcdir" && \
-	    x_ make -C "$srcdir" $cleanargs $_cleancmd
+	$dry check_makefile "$srcdir" && x_ make -C "$srcdir" $cleanargs clean
 	[ -f "$defconfig" ] && x_ cp "$defconfig" "$srcdir/.config"
 	[ -n "$mode" ] || [ -n "$btype" ] || $dry make -C \
 	    "$srcdir" silentoldconfig || make -C "$srcdir" oldconfig || :

From 8314fbc67ebba9af8e52b8c119dd2097b7f06ad4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 3 Dec 2024 15:15:24 +0000
Subject: [PATCH 0908/1549] add /dump/ to .gitignore

this is used for factoryy bios dumps, in cases where
boards require extraction of ME and so on,
instead of downloading online.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .gitignore | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.gitignore b/.gitignore
index 03bb21cc..9921172d 100644
--- a/.gitignore
+++ b/.gitignore
@@ -34,3 +34,4 @@
 /todo.txt
 /lock
 /hash/
+/dump/

From 90850eb859c644f12abc641c1e62c974cad72bcd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 3 Dec 2024 15:33:27 +0000
Subject: [PATCH 0909/1549] fix board name for coreboot/dell7010sff

i'd copied the t1650 config and reselected the board lazily.

this fixes the issue:

https://codeberg.org/libreboot/lbmk/issues/242

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode b/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
index 05151e1f..6364bc56 100644
--- a/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
@@ -105,7 +105,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_MAINBOARD_PART_NUMBER="Precision T1650"
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 9010"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_workstations"
 CONFIG_VGA_BIOS_ID="8086,0106"

From 7a6e47c24fe88f44138a8e6e3360fc796445c933 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 3 Dec 2024 21:40:15 +0000
Subject: [PATCH 0910/1549] 8-sec auto-boot timeout for U-Boot's bootflow menu

Otherwise, you have to press enter to boot, which is unacceptable
for headless operation.

Pressing anything other than enter an an option, such as the arrow
keys, will disable the timeout.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .gitignore                                    |  1 +
 ...utoboot-timeout-on-the-bootflow-menu.patch | 65 +++++++++++++++++++
 ...utoboot-timeout-on-the-bootflow-menu.patch | 65 +++++++++++++++++++
 3 files changed, 131 insertions(+)
 create mode 100644 config/u-boot/x86/patches/0004-Add-an-8sec-autoboot-timeout-on-the-bootflow-menu.patch
 create mode 100644 config/u-boot/x86_64/patches/0004-Add-an-8sec-autoboot-timeout-on-the-bootflow-menu.patch

diff --git a/.gitignore b/.gitignore
index 9921172d..60ad4f10 100644
--- a/.gitignore
+++ b/.gitignore
@@ -35,3 +35,4 @@
 /lock
 /hash/
 /dump/
+/qrun.sh
diff --git a/config/u-boot/x86/patches/0004-Add-an-8sec-autoboot-timeout-on-the-bootflow-menu.patch b/config/u-boot/x86/patches/0004-Add-an-8sec-autoboot-timeout-on-the-bootflow-menu.patch
new file mode 100644
index 00000000..3790e6ed
--- /dev/null
+++ b/config/u-boot/x86/patches/0004-Add-an-8sec-autoboot-timeout-on-the-bootflow-menu.patch
@@ -0,0 +1,65 @@
+From 1b1673e76dae73885089415132284e9a14ecd4ac Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 3 Dec 2024 20:31:32 +0000
+Subject: [PATCH 1/1] Add an 8sec autoboot timeout on the bootflow menu
+
+Otherwise, you have to press enter to load from a boot option,
+which is unacceptable on headless setups.
+
+If you press the arrow keys to interrupt it, the timer will stop
+and you must then press enter to boot an option.
+
+Otherwise, if you just leave U-Boot to do its thing, it will
+automatically boot what was selected, e.g. installed OS.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ boot/bootflow_menu.c | 11 ++++++++++-
+ 1 file changed, 10 insertions(+), 1 deletion(-)
+
+diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c
+index 9d0dc352f9..c788b86cdc 100644
+--- a/boot/bootflow_menu.c
++++ b/boot/bootflow_menu.c
+@@ -59,7 +59,7 @@ int bootflow_menu_new(struct expo **expp)
+ 	ret = scene_menu(scn, "main", OBJ_MENU, &menu);
+ 	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
+ 	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
+-			     "U-Boot - Boot Menu", NULL);
++			     "****  The selected menu item will autoboot in a few seconds unless interrupted! ****", NULL);
+ 	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
+ 
+ 	logo = video_get_u_boot_logo();
+@@ -185,6 +185,8 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 	uint sel_id;
+ 	bool done;
+ 	int ret;
++	int bootflow_delay=8000;
++	bool bootflow_countdown=true;
+ 
+ 	cli_ch_init(cch);
+ 
+@@ -231,6 +233,12 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 				schedule();
+ 				mdelay(2);
+ 				ichar = cli_ch_process(cch, -ETIMEDOUT);
++				if (bootflow_countdown == true) {
++					bootflow_delay -= 2;
++					if (bootflow_delay <= 0) {
++						ichar='\n';
++					}
++				}
+ 			}
+ 			if (!ichar) {
+ 				ichar = getchar();
+@@ -265,6 +273,7 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 				break;
+ 			}
+ 		}
++		bootflow_countdown = false;
+ 	} while (!done);
+ 
+ 	if (ret)
+-- 
+2.39.5
+
diff --git a/config/u-boot/x86_64/patches/0004-Add-an-8sec-autoboot-timeout-on-the-bootflow-menu.patch b/config/u-boot/x86_64/patches/0004-Add-an-8sec-autoboot-timeout-on-the-bootflow-menu.patch
new file mode 100644
index 00000000..3790e6ed
--- /dev/null
+++ b/config/u-boot/x86_64/patches/0004-Add-an-8sec-autoboot-timeout-on-the-bootflow-menu.patch
@@ -0,0 +1,65 @@
+From 1b1673e76dae73885089415132284e9a14ecd4ac Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 3 Dec 2024 20:31:32 +0000
+Subject: [PATCH 1/1] Add an 8sec autoboot timeout on the bootflow menu
+
+Otherwise, you have to press enter to load from a boot option,
+which is unacceptable on headless setups.
+
+If you press the arrow keys to interrupt it, the timer will stop
+and you must then press enter to boot an option.
+
+Otherwise, if you just leave U-Boot to do its thing, it will
+automatically boot what was selected, e.g. installed OS.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ boot/bootflow_menu.c | 11 ++++++++++-
+ 1 file changed, 10 insertions(+), 1 deletion(-)
+
+diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c
+index 9d0dc352f9..c788b86cdc 100644
+--- a/boot/bootflow_menu.c
++++ b/boot/bootflow_menu.c
+@@ -59,7 +59,7 @@ int bootflow_menu_new(struct expo **expp)
+ 	ret = scene_menu(scn, "main", OBJ_MENU, &menu);
+ 	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
+ 	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
+-			     "U-Boot - Boot Menu", NULL);
++			     "****  The selected menu item will autoboot in a few seconds unless interrupted! ****", NULL);
+ 	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
+ 
+ 	logo = video_get_u_boot_logo();
+@@ -185,6 +185,8 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 	uint sel_id;
+ 	bool done;
+ 	int ret;
++	int bootflow_delay=8000;
++	bool bootflow_countdown=true;
+ 
+ 	cli_ch_init(cch);
+ 
+@@ -231,6 +233,12 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 				schedule();
+ 				mdelay(2);
+ 				ichar = cli_ch_process(cch, -ETIMEDOUT);
++				if (bootflow_countdown == true) {
++					bootflow_delay -= 2;
++					if (bootflow_delay <= 0) {
++						ichar='\n';
++					}
++				}
+ 			}
+ 			if (!ichar) {
+ 				ichar = getchar();
+@@ -265,6 +273,7 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 				break;
+ 			}
+ 		}
++		bootflow_countdown = false;
+ 	} while (!done);
+ 
+ 	if (ret)
+-- 
+2.39.5
+

From c038b653ac1fed329c8577df3b19bad8d594c98a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 4 Dec 2024 06:55:48 +0000
Subject: [PATCH 0911/1549] Add auto-boot timeout for U-Boot's bootflow menu

Otherwise, you have to press enter to boot your distro.

With this, a timeout is created. After a number of seconds,
which can be reconfigured, the first option selected will be booted,
when generating a bootflow menu.

The timeout is disabled when you navigate the menu; it only
kicks in if you don't input anything on the keyboard.

More information about how this works is in the U-Boot patches,
within this patch. I've set the timeout to 8 seconds.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/u-boot/amd64coreboot/config/default    |   1 +
 config/u-boot/i386coreboot/config/default     |   1 +
 ...utoboot-timeout-on-the-bootflow-menu.patch |  65 ----
 ...uto-boot-timeout-delay-bootflow-menu.patch | 302 ++++++++++++++++++
 ...utoboot-timeout-on-the-bootflow-menu.patch |  65 ----
 ...uto-boot-timeout-delay-bootflow-menu.patch | 302 ++++++++++++++++++
 6 files changed, 606 insertions(+), 130 deletions(-)
 delete mode 100644 config/u-boot/x86/patches/0004-Add-an-8sec-autoboot-timeout-on-the-bootflow-menu.patch
 create mode 100644 config/u-boot/x86/patches/0004-Support-auto-boot-timeout-delay-bootflow-menu.patch
 delete mode 100644 config/u-boot/x86_64/patches/0004-Add-an-8sec-autoboot-timeout-on-the-bootflow-menu.patch
 create mode 100644 config/u-boot/x86_64/patches/0004-Support-auto-boot-timeout-delay-bootflow-menu.patch

diff --git a/config/u-boot/amd64coreboot/config/default b/config/u-boot/amd64coreboot/config/default
index fdd0ccf2..d44de2d3 100644
--- a/config/u-boot/amd64coreboot/config/default
+++ b/config/u-boot/amd64coreboot/config/default
@@ -500,6 +500,7 @@ CONFIG_CMD_BOOTM=y
 CONFIG_CMD_BOOTDEV=y
 CONFIG_CMD_BOOTFLOW=y
 CONFIG_CMD_BOOTFLOW_FULL=y
+CONFIG_CMD_BOOTFLOW_BOOTDELAY=8
 CONFIG_CMD_BOOTMETH=y
 CONFIG_BOOTM_EFI=y
 CONFIG_BOOTM_ELF=y
diff --git a/config/u-boot/i386coreboot/config/default b/config/u-boot/i386coreboot/config/default
index d01984d5..ba4fd18b 100644
--- a/config/u-boot/i386coreboot/config/default
+++ b/config/u-boot/i386coreboot/config/default
@@ -390,6 +390,7 @@ CONFIG_CMD_BOOTM=y
 CONFIG_CMD_BOOTDEV=y
 CONFIG_CMD_BOOTFLOW=y
 CONFIG_CMD_BOOTFLOW_FULL=y
+CONFIG_CMD_BOOTFLOW_BOOTDELAY=8
 CONFIG_CMD_BOOTMETH=y
 CONFIG_BOOTM_EFI=y
 CONFIG_BOOTM_ELF=y
diff --git a/config/u-boot/x86/patches/0004-Add-an-8sec-autoboot-timeout-on-the-bootflow-menu.patch b/config/u-boot/x86/patches/0004-Add-an-8sec-autoboot-timeout-on-the-bootflow-menu.patch
deleted file mode 100644
index 3790e6ed..00000000
--- a/config/u-boot/x86/patches/0004-Add-an-8sec-autoboot-timeout-on-the-bootflow-menu.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 1b1673e76dae73885089415132284e9a14ecd4ac Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Tue, 3 Dec 2024 20:31:32 +0000
-Subject: [PATCH 1/1] Add an 8sec autoboot timeout on the bootflow menu
-
-Otherwise, you have to press enter to load from a boot option,
-which is unacceptable on headless setups.
-
-If you press the arrow keys to interrupt it, the timer will stop
-and you must then press enter to boot an option.
-
-Otherwise, if you just leave U-Boot to do its thing, it will
-automatically boot what was selected, e.g. installed OS.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- boot/bootflow_menu.c | 11 ++++++++++-
- 1 file changed, 10 insertions(+), 1 deletion(-)
-
-diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c
-index 9d0dc352f9..c788b86cdc 100644
---- a/boot/bootflow_menu.c
-+++ b/boot/bootflow_menu.c
-@@ -59,7 +59,7 @@ int bootflow_menu_new(struct expo **expp)
- 	ret = scene_menu(scn, "main", OBJ_MENU, &menu);
- 	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
- 	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
--			     "U-Boot - Boot Menu", NULL);
-+			     "****  The selected menu item will autoboot in a few seconds unless interrupted! ****", NULL);
- 	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
- 
- 	logo = video_get_u_boot_logo();
-@@ -185,6 +185,8 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
- 	uint sel_id;
- 	bool done;
- 	int ret;
-+	int bootflow_delay=8000;
-+	bool bootflow_countdown=true;
- 
- 	cli_ch_init(cch);
- 
-@@ -231,6 +233,12 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
- 				schedule();
- 				mdelay(2);
- 				ichar = cli_ch_process(cch, -ETIMEDOUT);
-+				if (bootflow_countdown == true) {
-+					bootflow_delay -= 2;
-+					if (bootflow_delay <= 0) {
-+						ichar='\n';
-+					}
-+				}
- 			}
- 			if (!ichar) {
- 				ichar = getchar();
-@@ -265,6 +273,7 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
- 				break;
- 			}
- 		}
-+		bootflow_countdown = false;
- 	} while (!done);
- 
- 	if (ret)
--- 
-2.39.5
-
diff --git a/config/u-boot/x86/patches/0004-Support-auto-boot-timeout-delay-bootflow-menu.patch b/config/u-boot/x86/patches/0004-Support-auto-boot-timeout-delay-bootflow-menu.patch
new file mode 100644
index 00000000..ffc7b581
--- /dev/null
+++ b/config/u-boot/x86/patches/0004-Support-auto-boot-timeout-delay-bootflow-menu.patch
@@ -0,0 +1,302 @@
+From d9371422ac74ea73d1620f01300a7136a7649754 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 4 Dec 2024 06:52:39 +0000
+Subject: [PATCH 1/1] Support auto-boot timeout delay bootflow menu
+
+The bootflow menu cannot currently auto-boot a selected entry,
+which means that the user must press enter to boot their system.
+This can be a problem on headless setups; for example, it is not
+currently feasible to set up a headless server with U-Boot, when
+using it to boot via UEFI on a coreboot setup.
+
+This patch adds the following build-time configuration option:
+
+CONFIG_CMD_BOOTFLOW_BOOTDELAY
+
+This creates a timeout delay in the given number of seconds.
+If an arrow key is press to navigate the menu, the timer is
+disabled and the user must then press enter to boot the selected
+option. When this happens, the timeout display is replaced by
+the old message indicating that the user should press enter.
+
+The default boot delay is 30 seconds, and the timeout is enabled
+by default. Setting it to zero will restore the old behaviour,
+whereby no timeout is provided and the user must press enter.
+
+If a negative integer is provided, the timer will default to
+zero. The timer value is further filtered by modulus of 100,
+so that the maximum number of seconds allowed is 99 seconds.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ boot/bootflow_menu.c       | 117 +++++++++++++++++++++++++++++++++++--
+ cmd/Kconfig                |  12 ++++
+ doc/usage/cmd/bootflow.rst |  11 ++++
+ include/bootflow.h         |  10 +++-
+ 4 files changed, 143 insertions(+), 7 deletions(-)
+
+diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c
+index 9d0dc352f9..172139b187 100644
+--- a/boot/bootflow_menu.c
++++ b/boot/bootflow_menu.c
+@@ -30,7 +30,7 @@ struct menu_priv {
+ 	int num_bootflows;
+ };
+ 
+-int bootflow_menu_new(struct expo **expp)
++int bootflow_menu_new(struct expo **expp, const char *prompt)
+ {
+ 	struct udevice *last_bootdev;
+ 	struct scene_obj_menu *menu;
+@@ -54,7 +54,7 @@ int bootflow_menu_new(struct expo **expp)
+ 		return log_msg_ret("scn", ret);
+ 
+ 	ret |= scene_txt_str(scn, "prompt", OBJ_PROMPT, STR_PROMPT,
+-			     "UP and DOWN to choose, ENTER to select", NULL);
++			     prompt, NULL);
+ 
+ 	ret = scene_menu(scn, "main", OBJ_MENU, &menu);
+ 	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
+@@ -138,6 +138,29 @@ int bootflow_menu_new(struct expo **expp)
+ 	return 0;
+ }
+ 
++int bootflow_menu_show_countdown(struct expo *exp, char *prompt,
++    char bootflow_delay)
++{
++	char *i;
++
++	if (prompt == NULL)
++		return 0;
++	if (strlen(prompt) < 2)
++		return 0;
++
++	i = prompt + strlen(prompt) - 2;
++
++	if (bootflow_delay >= 10) {
++		*(i) = 48 + (bootflow_delay / 10);
++		*(i + 1) = 48 + (bootflow_delay % 10);
++	} else {
++		*(i) = 48 + bootflow_delay;
++		*(i + 1) = ' ';
++	}
++
++	return expo_render(exp);
++}
++
+ int bootflow_menu_apply_theme(struct expo *exp, ofnode node)
+ {
+ 	struct menu_priv *priv = exp->priv;
+@@ -184,14 +207,62 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 	struct expo *exp;
+ 	uint sel_id;
+ 	bool done;
+-	int ret;
++	int i, ret;
++
++	/* Auto-boot countdown */
++	char bootflow_delay_secs, *prompt;
++	int bootflow_time, bootflow_delay;
++	bool skip_render_once = false;
++	bool bootflow_countdown = false;
++
++	/* TODO: perhaps set based on defconfig? */
++	/* WARNING: These two strings must be of the same length. */
++	char promptChoice[] = "UP and DOWN to choose, ENTER to select";
++	char promptTimeout[] = "UP and DOWN to choose. Auto-boot in   ";
++/*
++	// Uncomment if the strings become configurable (defconfig):
++	// (to prevent buffer overflows)
++	char promptDefault[] = "UP and DOWN to choose, ENTER to select";
++	if (promptTimeout = NULL)
++		promptTimeout = promptDefault;
++	if (promptChoice = NULL)
++		promptChoice = promptDefault;
++	if (strlen(promptChoice) < 2)
++		promptChoice = promptDefault;
++	if (strlen(promptTimeout) < 2)
++		promptTimeout = promptDefault;
++	if (strlen(promptChoice) != strlen(promptTimeout))
++		promptChoice = promptTimeout;
++*/
++	prompt = promptChoice;
++
++	bootflow_delay_secs = 15; /* TODO: set based on defconfig. */
++
++#if defined(CONFIG_CMD_BOOTFLOW_BOOTDELAY)
++	/* If set to zero, the auto-boot timeout is disabled. */
++	bootflow_delay_secs = CONFIG_CMD_BOOTFLOW_BOOTDELAY;
++#else
++	bootflow_delay_secs = 30;
++#endif
++
++	if (bootflow_delay_secs < 0)
++		bootflow_delay_secs = 0; /* disable countdown if negative */
++	bootflow_delay_secs %= 100; /* No higher than 99 seconds */
++
++	if (bootflow_delay_secs > 0) {
++		bootflow_countdown = true; /* enable auto-boot countdown */
++		prompt = promptTimeout;
++		bootflow_time = 0; /* Time elapsed in milliseconds */
++		bootflow_delay =
++		    (int)bootflow_delay_secs * 1000; /* milliseconds */
++	}
+ 
+ 	cli_ch_init(cch);
+ 
+ 	sel_bflow = NULL;
+ 	*bflowp = NULL;
+ 
+-	ret = bootflow_menu_new(&exp);
++	ret = bootflow_menu_new(&exp, prompt);
+ 	if (ret)
+ 		return log_msg_ret("exp", ret);
+ 
+@@ -216,12 +287,20 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 	if (text_mode)
+ 		expo_set_text_mode(exp, text_mode);
+ 
++	if (bootflow_countdown) {
++		ret = bootflow_menu_show_countdown(exp, prompt,
++		    bootflow_delay_secs);
++		skip_render_once = true; /* Don't print menu twice on start */
++	}
+ 	done = false;
+ 	do {
+ 		struct expo_action act;
+ 		int ichar, key;
+ 
+-		ret = expo_render(exp);
++		if (skip_render_once)
++			skip_render_once = false;
++		else
++			ret = expo_render(exp);
+ 		if (ret)
+ 			break;
+ 
+@@ -231,7 +310,23 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 				schedule();
+ 				mdelay(2);
+ 				ichar = cli_ch_process(cch, -ETIMEDOUT);
++				if (bootflow_countdown) {
++					bootflow_delay -= 2;
++					bootflow_time += 2;
++					if (bootflow_delay <= 0)
++						ichar='\n';
++					if (bootflow_time < 1000)
++						continue;
++					bootflow_time = 0;
++					--bootflow_delay_secs;
++					ret = bootflow_menu_show_countdown(exp,
++					    prompt, bootflow_delay_secs);
++					if (ret)
++						break;
++				}
+ 			}
++			if (ret)
++				break;
+ 			if (!ichar) {
+ 				ichar = getchar();
+ 				ichar = cli_ch_process(cch, ichar);
+@@ -265,6 +360,17 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 				break;
+ 			}
+ 		}
++		if (bootflow_countdown) {
++			/* A key press interrupted the auto-boot timeout */
++			bootflow_countdown = false;
++			if (strlen(prompt) == strlen(promptChoice)) {
++				/* "Auto-boot in" becomes "Press ENTER" */
++				(void) memcpy(prompt, promptChoice,
++				    strlen(promptChoice));
++				ret = expo_render(exp);
++				skip_render_once = true;
++			}
++		}
+ 	} while (!done);
+ 
+ 	if (ret)
+@@ -272,7 +378,6 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 
+ 	if (sel_id) {
+ 		struct bootflow *bflow;
+-		int i;
+ 
+ 		for (ret = bootflow_first_glob(&bflow), i = 0; !ret && i < 36;
+ 		     ret = bootflow_next_glob(&bflow), i++) {
+diff --git a/cmd/Kconfig b/cmd/Kconfig
+index 978f44eda4..0303869625 100644
+--- a/cmd/Kconfig
++++ b/cmd/Kconfig
+@@ -288,6 +288,7 @@ config CMD_BOOTDEV
+ config CMD_BOOTFLOW
+ 	bool "bootflow"
+ 	depends on BOOTSTD
++	select CMD_BOOTFLOW_BOOTDELAY
+ 	default y
+ 	help
+ 	  Support scanning for bootflows available with the bootdevs. The
+@@ -303,6 +304,17 @@ config CMD_BOOTFLOW_FULL
+ 
+ 	  This command is not necessary for bootstd to work.
+ 
++config CMD_BOOTFLOW_BOOTDELAY
++	int "bootflow - delay in seconds before booting the first menu option"
++	depends on CMD_BOOTFLOW
++	default 30
++	help
++	  On the bootflow menu, wait for the defined number of seconds before
++	  automatically booting. Unless interrupted, this will auto-boot the
++	  first option in the generated list of boot options.
++
++	  Set this to zero if you wish to disable the auto-boot timeout.
++
+ config CMD_BOOTMETH
+ 	bool "bootmeth"
+ 	depends on BOOTSTD
+diff --git a/doc/usage/cmd/bootflow.rst b/doc/usage/cmd/bootflow.rst
+index 5d41fe37a7..728f294274 100644
+--- a/doc/usage/cmd/bootflow.rst
++++ b/doc/usage/cmd/bootflow.rst
+@@ -32,6 +32,17 @@ Note that `CONFIG_BOOTSTD_FULL` (which enables `CONFIG_CMD_BOOTFLOW_FULL) must
+ be enabled to obtain full functionality with this command. Otherwise, it only
+ supports `bootflow scan` which scans and boots the first available bootflow.
+ 
++The `CONFIG_CMD_BOOTFLOW_BOOTDELAY` option can be set, defining (in seconds) the
++amount of time that U-Boot will wait; after this time passes, it will
++automatically boot the first item when generating a bootflow menu. If the value
++is set to zero, the timeout is disabled and the user must press enter; if it's
++negative, the timeout is disabled, and the maximum number of seconds is 99
++seconds. If a value higher than 100 is provided, the value is changed to a
++modulus of 100 (remainder of the value divided by 100).
++
++If the `CONFIG_BOOTFLOW_BOOTFLOW` option is undefined, the timeout will default
++to 30 seconds.
++
+ bootflow scan
+ ~~~~~~~~~~~~~
+ 
+diff --git a/include/bootflow.h b/include/bootflow.h
+index 4d2fc7b69b..9f4245caa7 100644
+--- a/include/bootflow.h
++++ b/include/bootflow.h
+@@ -452,7 +452,15 @@ int bootflow_iter_check_system(const struct bootflow_iter *iter);
+  * @expp: Returns the expo created
+  * Returns 0 on success, -ve on error
+  */
+-int bootflow_menu_new(struct expo **expp);
++int bootflow_menu_new(struct expo **expp, const char *prompt);
++
++/**
++ * bootflow_menu_show_countdown() - Show countdown timer for auto-boot
++ *
++ * Returns the value of expo_render()
++ */
++int bootflow_menu_show_countdown(struct expo *exp, char *prompt,
++    char bootflow_delay);
+ 
+ /**
+  * bootflow_menu_apply_theme() - Apply a theme to a bootmenu
+-- 
+2.39.5
+
diff --git a/config/u-boot/x86_64/patches/0004-Add-an-8sec-autoboot-timeout-on-the-bootflow-menu.patch b/config/u-boot/x86_64/patches/0004-Add-an-8sec-autoboot-timeout-on-the-bootflow-menu.patch
deleted file mode 100644
index 3790e6ed..00000000
--- a/config/u-boot/x86_64/patches/0004-Add-an-8sec-autoboot-timeout-on-the-bootflow-menu.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 1b1673e76dae73885089415132284e9a14ecd4ac Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Tue, 3 Dec 2024 20:31:32 +0000
-Subject: [PATCH 1/1] Add an 8sec autoboot timeout on the bootflow menu
-
-Otherwise, you have to press enter to load from a boot option,
-which is unacceptable on headless setups.
-
-If you press the arrow keys to interrupt it, the timer will stop
-and you must then press enter to boot an option.
-
-Otherwise, if you just leave U-Boot to do its thing, it will
-automatically boot what was selected, e.g. installed OS.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- boot/bootflow_menu.c | 11 ++++++++++-
- 1 file changed, 10 insertions(+), 1 deletion(-)
-
-diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c
-index 9d0dc352f9..c788b86cdc 100644
---- a/boot/bootflow_menu.c
-+++ b/boot/bootflow_menu.c
-@@ -59,7 +59,7 @@ int bootflow_menu_new(struct expo **expp)
- 	ret = scene_menu(scn, "main", OBJ_MENU, &menu);
- 	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
- 	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
--			     "U-Boot - Boot Menu", NULL);
-+			     "****  The selected menu item will autoboot in a few seconds unless interrupted! ****", NULL);
- 	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
- 
- 	logo = video_get_u_boot_logo();
-@@ -185,6 +185,8 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
- 	uint sel_id;
- 	bool done;
- 	int ret;
-+	int bootflow_delay=8000;
-+	bool bootflow_countdown=true;
- 
- 	cli_ch_init(cch);
- 
-@@ -231,6 +233,12 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
- 				schedule();
- 				mdelay(2);
- 				ichar = cli_ch_process(cch, -ETIMEDOUT);
-+				if (bootflow_countdown == true) {
-+					bootflow_delay -= 2;
-+					if (bootflow_delay <= 0) {
-+						ichar='\n';
-+					}
-+				}
- 			}
- 			if (!ichar) {
- 				ichar = getchar();
-@@ -265,6 +273,7 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
- 				break;
- 			}
- 		}
-+		bootflow_countdown = false;
- 	} while (!done);
- 
- 	if (ret)
--- 
-2.39.5
-
diff --git a/config/u-boot/x86_64/patches/0004-Support-auto-boot-timeout-delay-bootflow-menu.patch b/config/u-boot/x86_64/patches/0004-Support-auto-boot-timeout-delay-bootflow-menu.patch
new file mode 100644
index 00000000..ffc7b581
--- /dev/null
+++ b/config/u-boot/x86_64/patches/0004-Support-auto-boot-timeout-delay-bootflow-menu.patch
@@ -0,0 +1,302 @@
+From d9371422ac74ea73d1620f01300a7136a7649754 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 4 Dec 2024 06:52:39 +0000
+Subject: [PATCH 1/1] Support auto-boot timeout delay bootflow menu
+
+The bootflow menu cannot currently auto-boot a selected entry,
+which means that the user must press enter to boot their system.
+This can be a problem on headless setups; for example, it is not
+currently feasible to set up a headless server with U-Boot, when
+using it to boot via UEFI on a coreboot setup.
+
+This patch adds the following build-time configuration option:
+
+CONFIG_CMD_BOOTFLOW_BOOTDELAY
+
+This creates a timeout delay in the given number of seconds.
+If an arrow key is press to navigate the menu, the timer is
+disabled and the user must then press enter to boot the selected
+option. When this happens, the timeout display is replaced by
+the old message indicating that the user should press enter.
+
+The default boot delay is 30 seconds, and the timeout is enabled
+by default. Setting it to zero will restore the old behaviour,
+whereby no timeout is provided and the user must press enter.
+
+If a negative integer is provided, the timer will default to
+zero. The timer value is further filtered by modulus of 100,
+so that the maximum number of seconds allowed is 99 seconds.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ boot/bootflow_menu.c       | 117 +++++++++++++++++++++++++++++++++++--
+ cmd/Kconfig                |  12 ++++
+ doc/usage/cmd/bootflow.rst |  11 ++++
+ include/bootflow.h         |  10 +++-
+ 4 files changed, 143 insertions(+), 7 deletions(-)
+
+diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c
+index 9d0dc352f9..172139b187 100644
+--- a/boot/bootflow_menu.c
++++ b/boot/bootflow_menu.c
+@@ -30,7 +30,7 @@ struct menu_priv {
+ 	int num_bootflows;
+ };
+ 
+-int bootflow_menu_new(struct expo **expp)
++int bootflow_menu_new(struct expo **expp, const char *prompt)
+ {
+ 	struct udevice *last_bootdev;
+ 	struct scene_obj_menu *menu;
+@@ -54,7 +54,7 @@ int bootflow_menu_new(struct expo **expp)
+ 		return log_msg_ret("scn", ret);
+ 
+ 	ret |= scene_txt_str(scn, "prompt", OBJ_PROMPT, STR_PROMPT,
+-			     "UP and DOWN to choose, ENTER to select", NULL);
++			     prompt, NULL);
+ 
+ 	ret = scene_menu(scn, "main", OBJ_MENU, &menu);
+ 	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
+@@ -138,6 +138,29 @@ int bootflow_menu_new(struct expo **expp)
+ 	return 0;
+ }
+ 
++int bootflow_menu_show_countdown(struct expo *exp, char *prompt,
++    char bootflow_delay)
++{
++	char *i;
++
++	if (prompt == NULL)
++		return 0;
++	if (strlen(prompt) < 2)
++		return 0;
++
++	i = prompt + strlen(prompt) - 2;
++
++	if (bootflow_delay >= 10) {
++		*(i) = 48 + (bootflow_delay / 10);
++		*(i + 1) = 48 + (bootflow_delay % 10);
++	} else {
++		*(i) = 48 + bootflow_delay;
++		*(i + 1) = ' ';
++	}
++
++	return expo_render(exp);
++}
++
+ int bootflow_menu_apply_theme(struct expo *exp, ofnode node)
+ {
+ 	struct menu_priv *priv = exp->priv;
+@@ -184,14 +207,62 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 	struct expo *exp;
+ 	uint sel_id;
+ 	bool done;
+-	int ret;
++	int i, ret;
++
++	/* Auto-boot countdown */
++	char bootflow_delay_secs, *prompt;
++	int bootflow_time, bootflow_delay;
++	bool skip_render_once = false;
++	bool bootflow_countdown = false;
++
++	/* TODO: perhaps set based on defconfig? */
++	/* WARNING: These two strings must be of the same length. */
++	char promptChoice[] = "UP and DOWN to choose, ENTER to select";
++	char promptTimeout[] = "UP and DOWN to choose. Auto-boot in   ";
++/*
++	// Uncomment if the strings become configurable (defconfig):
++	// (to prevent buffer overflows)
++	char promptDefault[] = "UP and DOWN to choose, ENTER to select";
++	if (promptTimeout = NULL)
++		promptTimeout = promptDefault;
++	if (promptChoice = NULL)
++		promptChoice = promptDefault;
++	if (strlen(promptChoice) < 2)
++		promptChoice = promptDefault;
++	if (strlen(promptTimeout) < 2)
++		promptTimeout = promptDefault;
++	if (strlen(promptChoice) != strlen(promptTimeout))
++		promptChoice = promptTimeout;
++*/
++	prompt = promptChoice;
++
++	bootflow_delay_secs = 15; /* TODO: set based on defconfig. */
++
++#if defined(CONFIG_CMD_BOOTFLOW_BOOTDELAY)
++	/* If set to zero, the auto-boot timeout is disabled. */
++	bootflow_delay_secs = CONFIG_CMD_BOOTFLOW_BOOTDELAY;
++#else
++	bootflow_delay_secs = 30;
++#endif
++
++	if (bootflow_delay_secs < 0)
++		bootflow_delay_secs = 0; /* disable countdown if negative */
++	bootflow_delay_secs %= 100; /* No higher than 99 seconds */
++
++	if (bootflow_delay_secs > 0) {
++		bootflow_countdown = true; /* enable auto-boot countdown */
++		prompt = promptTimeout;
++		bootflow_time = 0; /* Time elapsed in milliseconds */
++		bootflow_delay =
++		    (int)bootflow_delay_secs * 1000; /* milliseconds */
++	}
+ 
+ 	cli_ch_init(cch);
+ 
+ 	sel_bflow = NULL;
+ 	*bflowp = NULL;
+ 
+-	ret = bootflow_menu_new(&exp);
++	ret = bootflow_menu_new(&exp, prompt);
+ 	if (ret)
+ 		return log_msg_ret("exp", ret);
+ 
+@@ -216,12 +287,20 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 	if (text_mode)
+ 		expo_set_text_mode(exp, text_mode);
+ 
++	if (bootflow_countdown) {
++		ret = bootflow_menu_show_countdown(exp, prompt,
++		    bootflow_delay_secs);
++		skip_render_once = true; /* Don't print menu twice on start */
++	}
+ 	done = false;
+ 	do {
+ 		struct expo_action act;
+ 		int ichar, key;
+ 
+-		ret = expo_render(exp);
++		if (skip_render_once)
++			skip_render_once = false;
++		else
++			ret = expo_render(exp);
+ 		if (ret)
+ 			break;
+ 
+@@ -231,7 +310,23 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 				schedule();
+ 				mdelay(2);
+ 				ichar = cli_ch_process(cch, -ETIMEDOUT);
++				if (bootflow_countdown) {
++					bootflow_delay -= 2;
++					bootflow_time += 2;
++					if (bootflow_delay <= 0)
++						ichar='\n';
++					if (bootflow_time < 1000)
++						continue;
++					bootflow_time = 0;
++					--bootflow_delay_secs;
++					ret = bootflow_menu_show_countdown(exp,
++					    prompt, bootflow_delay_secs);
++					if (ret)
++						break;
++				}
+ 			}
++			if (ret)
++				break;
+ 			if (!ichar) {
+ 				ichar = getchar();
+ 				ichar = cli_ch_process(cch, ichar);
+@@ -265,6 +360,17 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 				break;
+ 			}
+ 		}
++		if (bootflow_countdown) {
++			/* A key press interrupted the auto-boot timeout */
++			bootflow_countdown = false;
++			if (strlen(prompt) == strlen(promptChoice)) {
++				/* "Auto-boot in" becomes "Press ENTER" */
++				(void) memcpy(prompt, promptChoice,
++				    strlen(promptChoice));
++				ret = expo_render(exp);
++				skip_render_once = true;
++			}
++		}
+ 	} while (!done);
+ 
+ 	if (ret)
+@@ -272,7 +378,6 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 
+ 	if (sel_id) {
+ 		struct bootflow *bflow;
+-		int i;
+ 
+ 		for (ret = bootflow_first_glob(&bflow), i = 0; !ret && i < 36;
+ 		     ret = bootflow_next_glob(&bflow), i++) {
+diff --git a/cmd/Kconfig b/cmd/Kconfig
+index 978f44eda4..0303869625 100644
+--- a/cmd/Kconfig
++++ b/cmd/Kconfig
+@@ -288,6 +288,7 @@ config CMD_BOOTDEV
+ config CMD_BOOTFLOW
+ 	bool "bootflow"
+ 	depends on BOOTSTD
++	select CMD_BOOTFLOW_BOOTDELAY
+ 	default y
+ 	help
+ 	  Support scanning for bootflows available with the bootdevs. The
+@@ -303,6 +304,17 @@ config CMD_BOOTFLOW_FULL
+ 
+ 	  This command is not necessary for bootstd to work.
+ 
++config CMD_BOOTFLOW_BOOTDELAY
++	int "bootflow - delay in seconds before booting the first menu option"
++	depends on CMD_BOOTFLOW
++	default 30
++	help
++	  On the bootflow menu, wait for the defined number of seconds before
++	  automatically booting. Unless interrupted, this will auto-boot the
++	  first option in the generated list of boot options.
++
++	  Set this to zero if you wish to disable the auto-boot timeout.
++
+ config CMD_BOOTMETH
+ 	bool "bootmeth"
+ 	depends on BOOTSTD
+diff --git a/doc/usage/cmd/bootflow.rst b/doc/usage/cmd/bootflow.rst
+index 5d41fe37a7..728f294274 100644
+--- a/doc/usage/cmd/bootflow.rst
++++ b/doc/usage/cmd/bootflow.rst
+@@ -32,6 +32,17 @@ Note that `CONFIG_BOOTSTD_FULL` (which enables `CONFIG_CMD_BOOTFLOW_FULL) must
+ be enabled to obtain full functionality with this command. Otherwise, it only
+ supports `bootflow scan` which scans and boots the first available bootflow.
+ 
++The `CONFIG_CMD_BOOTFLOW_BOOTDELAY` option can be set, defining (in seconds) the
++amount of time that U-Boot will wait; after this time passes, it will
++automatically boot the first item when generating a bootflow menu. If the value
++is set to zero, the timeout is disabled and the user must press enter; if it's
++negative, the timeout is disabled, and the maximum number of seconds is 99
++seconds. If a value higher than 100 is provided, the value is changed to a
++modulus of 100 (remainder of the value divided by 100).
++
++If the `CONFIG_BOOTFLOW_BOOTFLOW` option is undefined, the timeout will default
++to 30 seconds.
++
+ bootflow scan
+ ~~~~~~~~~~~~~
+ 
+diff --git a/include/bootflow.h b/include/bootflow.h
+index 4d2fc7b69b..9f4245caa7 100644
+--- a/include/bootflow.h
++++ b/include/bootflow.h
+@@ -452,7 +452,15 @@ int bootflow_iter_check_system(const struct bootflow_iter *iter);
+  * @expp: Returns the expo created
+  * Returns 0 on success, -ve on error
+  */
+-int bootflow_menu_new(struct expo **expp);
++int bootflow_menu_new(struct expo **expp, const char *prompt);
++
++/**
++ * bootflow_menu_show_countdown() - Show countdown timer for auto-boot
++ *
++ * Returns the value of expo_render()
++ */
++int bootflow_menu_show_countdown(struct expo *exp, char *prompt,
++    char bootflow_delay);
+ 
+ /**
+  * bootflow_menu_apply_theme() - Apply a theme to a bootmenu
+-- 
+2.39.5
+

From 44e6a0c09050a2e13af2294a59aaac6b0bc707dd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 4 Dec 2024 18:51:45 +0000
Subject: [PATCH 0912/1549] Add libreboot branding/version to U-Boot bootflow

Show it in the bootflow menu

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...randing-version-on-the-bootflow-menu.patch | 213 ++++++++++++++++++
 ...randing-version-on-the-bootflow-menu.patch | 213 ++++++++++++++++++
 2 files changed, 426 insertions(+)
 create mode 100644 config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
 create mode 100644 config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch

diff --git a/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
new file mode 100644
index 00000000..f913572f
--- /dev/null
+++ b/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
@@ -0,0 +1,213 @@
+From 4ff0f509aa28eb8e85f1c0c9929c63996c646bb8 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 4 Dec 2024 18:20:19 +0000
+Subject: [PATCH 1/1] Libreboot branding/version on the bootflow menu
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ boot/bootflow_menu.c          |   2 +-
+ drivers/video/u_boot_logo.bmp | Bin 6932 -> 27350 bytes
+ 2 files changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c
+index 84831915a2..8e26ec2aef 100644
+--- a/boot/bootflow_menu.c
++++ b/boot/bootflow_menu.c
+@@ -59,7 +59,7 @@ int bootflow_menu_new(struct expo **expp, const char *prompt)
+ 	ret = scene_menu(scn, "main", OBJ_MENU, &menu);
+ 	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
+ 	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
+-			     "U-Boot - Boot Menu", NULL);
++	    "Libreboot 20241205 release (U-Boot Menu)                                                    https://libreboot.org/", NULL);
+ 	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
+ 
+ 	logo = video_get_u_boot_logo();
+diff --git a/drivers/video/u_boot_logo.bmp b/drivers/video/u_boot_logo.bmp
+index 47f1e9b99789584d2f6dd71e954b51927b35d783..bc9ae001badb25bc900058c167a47247ef91dc7c 100644
+GIT binary patch
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+
+-- 
+2.39.5
+
diff --git a/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
new file mode 100644
index 00000000..f913572f
--- /dev/null
+++ b/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
@@ -0,0 +1,213 @@
+From 4ff0f509aa28eb8e85f1c0c9929c63996c646bb8 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 4 Dec 2024 18:20:19 +0000
+Subject: [PATCH 1/1] Libreboot branding/version on the bootflow menu
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ boot/bootflow_menu.c          |   2 +-
+ drivers/video/u_boot_logo.bmp | Bin 6932 -> 27350 bytes
+ 2 files changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c
+index 84831915a2..8e26ec2aef 100644
+--- a/boot/bootflow_menu.c
++++ b/boot/bootflow_menu.c
+@@ -59,7 +59,7 @@ int bootflow_menu_new(struct expo **expp, const char *prompt)
+ 	ret = scene_menu(scn, "main", OBJ_MENU, &menu);
+ 	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
+ 	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
+-			     "U-Boot - Boot Menu", NULL);
++	    "Libreboot 20241205 release (U-Boot Menu)                                                    https://libreboot.org/", NULL);
+ 	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
+ 
+ 	logo = video_get_u_boot_logo();
+diff --git a/drivers/video/u_boot_logo.bmp b/drivers/video/u_boot_logo.bmp
+index 47f1e9b99789584d2f6dd71e954b51927b35d783..bc9ae001badb25bc900058c167a47247ef91dc7c 100644
+GIT binary patch
+literal 27350
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+zBwDi38i*~z{|rJfHW@Eo!ARu#)VrE`4NNfJ?S^2T@jf^dYm8UO5X2cTnS4{#Vnw}*
+z-h-Z3*4}s5`>>EG>Ls@Kbv6tOjMv)U*V_?zUes%DIA)7_-|c<#<twn(^9szDVQq?x
+wA@94_V)cG3+BniCF!%phCa^V`EuNoDjq0U&Do6FaK0m2mbu}=?pJWRCZ}IWH!~g&Q
+
+-- 
+2.39.5
+

From 965f9bd03351c9809b7074ae85dfbecb3e37e548 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 4 Dec 2024 18:54:01 +0000
Subject: [PATCH 0913/1549] Add bootflow/branding patches to arm64 U-Boot too

U-Boot on ARM64 also enables the bootflow menu.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...uto-boot-timeout-delay-bootflow-menu.patch | 302 ++++++++++++++++++
 ...randing-version-on-the-bootflow-menu.patch | 213 ++++++++++++
 config/u-boot/gru_bob/config/default          |   5 +-
 config/u-boot/gru_kevin/config/default        |   5 +-
 config/u-boot/qemu_arm64_12mb/config/default  |   5 +-
 5 files changed, 524 insertions(+), 6 deletions(-)
 create mode 100644 config/u-boot/default/patches/0006-Support-auto-boot-timeout-delay-bootflow-menu.patch
 create mode 100644 config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch

diff --git a/config/u-boot/default/patches/0006-Support-auto-boot-timeout-delay-bootflow-menu.patch b/config/u-boot/default/patches/0006-Support-auto-boot-timeout-delay-bootflow-menu.patch
new file mode 100644
index 00000000..ffc7b581
--- /dev/null
+++ b/config/u-boot/default/patches/0006-Support-auto-boot-timeout-delay-bootflow-menu.patch
@@ -0,0 +1,302 @@
+From d9371422ac74ea73d1620f01300a7136a7649754 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 4 Dec 2024 06:52:39 +0000
+Subject: [PATCH 1/1] Support auto-boot timeout delay bootflow menu
+
+The bootflow menu cannot currently auto-boot a selected entry,
+which means that the user must press enter to boot their system.
+This can be a problem on headless setups; for example, it is not
+currently feasible to set up a headless server with U-Boot, when
+using it to boot via UEFI on a coreboot setup.
+
+This patch adds the following build-time configuration option:
+
+CONFIG_CMD_BOOTFLOW_BOOTDELAY
+
+This creates a timeout delay in the given number of seconds.
+If an arrow key is press to navigate the menu, the timer is
+disabled and the user must then press enter to boot the selected
+option. When this happens, the timeout display is replaced by
+the old message indicating that the user should press enter.
+
+The default boot delay is 30 seconds, and the timeout is enabled
+by default. Setting it to zero will restore the old behaviour,
+whereby no timeout is provided and the user must press enter.
+
+If a negative integer is provided, the timer will default to
+zero. The timer value is further filtered by modulus of 100,
+so that the maximum number of seconds allowed is 99 seconds.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ boot/bootflow_menu.c       | 117 +++++++++++++++++++++++++++++++++++--
+ cmd/Kconfig                |  12 ++++
+ doc/usage/cmd/bootflow.rst |  11 ++++
+ include/bootflow.h         |  10 +++-
+ 4 files changed, 143 insertions(+), 7 deletions(-)
+
+diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c
+index 9d0dc352f9..172139b187 100644
+--- a/boot/bootflow_menu.c
++++ b/boot/bootflow_menu.c
+@@ -30,7 +30,7 @@ struct menu_priv {
+ 	int num_bootflows;
+ };
+ 
+-int bootflow_menu_new(struct expo **expp)
++int bootflow_menu_new(struct expo **expp, const char *prompt)
+ {
+ 	struct udevice *last_bootdev;
+ 	struct scene_obj_menu *menu;
+@@ -54,7 +54,7 @@ int bootflow_menu_new(struct expo **expp)
+ 		return log_msg_ret("scn", ret);
+ 
+ 	ret |= scene_txt_str(scn, "prompt", OBJ_PROMPT, STR_PROMPT,
+-			     "UP and DOWN to choose, ENTER to select", NULL);
++			     prompt, NULL);
+ 
+ 	ret = scene_menu(scn, "main", OBJ_MENU, &menu);
+ 	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
+@@ -138,6 +138,29 @@ int bootflow_menu_new(struct expo **expp)
+ 	return 0;
+ }
+ 
++int bootflow_menu_show_countdown(struct expo *exp, char *prompt,
++    char bootflow_delay)
++{
++	char *i;
++
++	if (prompt == NULL)
++		return 0;
++	if (strlen(prompt) < 2)
++		return 0;
++
++	i = prompt + strlen(prompt) - 2;
++
++	if (bootflow_delay >= 10) {
++		*(i) = 48 + (bootflow_delay / 10);
++		*(i + 1) = 48 + (bootflow_delay % 10);
++	} else {
++		*(i) = 48 + bootflow_delay;
++		*(i + 1) = ' ';
++	}
++
++	return expo_render(exp);
++}
++
+ int bootflow_menu_apply_theme(struct expo *exp, ofnode node)
+ {
+ 	struct menu_priv *priv = exp->priv;
+@@ -184,14 +207,62 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 	struct expo *exp;
+ 	uint sel_id;
+ 	bool done;
+-	int ret;
++	int i, ret;
++
++	/* Auto-boot countdown */
++	char bootflow_delay_secs, *prompt;
++	int bootflow_time, bootflow_delay;
++	bool skip_render_once = false;
++	bool bootflow_countdown = false;
++
++	/* TODO: perhaps set based on defconfig? */
++	/* WARNING: These two strings must be of the same length. */
++	char promptChoice[] = "UP and DOWN to choose, ENTER to select";
++	char promptTimeout[] = "UP and DOWN to choose. Auto-boot in   ";
++/*
++	// Uncomment if the strings become configurable (defconfig):
++	// (to prevent buffer overflows)
++	char promptDefault[] = "UP and DOWN to choose, ENTER to select";
++	if (promptTimeout = NULL)
++		promptTimeout = promptDefault;
++	if (promptChoice = NULL)
++		promptChoice = promptDefault;
++	if (strlen(promptChoice) < 2)
++		promptChoice = promptDefault;
++	if (strlen(promptTimeout) < 2)
++		promptTimeout = promptDefault;
++	if (strlen(promptChoice) != strlen(promptTimeout))
++		promptChoice = promptTimeout;
++*/
++	prompt = promptChoice;
++
++	bootflow_delay_secs = 15; /* TODO: set based on defconfig. */
++
++#if defined(CONFIG_CMD_BOOTFLOW_BOOTDELAY)
++	/* If set to zero, the auto-boot timeout is disabled. */
++	bootflow_delay_secs = CONFIG_CMD_BOOTFLOW_BOOTDELAY;
++#else
++	bootflow_delay_secs = 30;
++#endif
++
++	if (bootflow_delay_secs < 0)
++		bootflow_delay_secs = 0; /* disable countdown if negative */
++	bootflow_delay_secs %= 100; /* No higher than 99 seconds */
++
++	if (bootflow_delay_secs > 0) {
++		bootflow_countdown = true; /* enable auto-boot countdown */
++		prompt = promptTimeout;
++		bootflow_time = 0; /* Time elapsed in milliseconds */
++		bootflow_delay =
++		    (int)bootflow_delay_secs * 1000; /* milliseconds */
++	}
+ 
+ 	cli_ch_init(cch);
+ 
+ 	sel_bflow = NULL;
+ 	*bflowp = NULL;
+ 
+-	ret = bootflow_menu_new(&exp);
++	ret = bootflow_menu_new(&exp, prompt);
+ 	if (ret)
+ 		return log_msg_ret("exp", ret);
+ 
+@@ -216,12 +287,20 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 	if (text_mode)
+ 		expo_set_text_mode(exp, text_mode);
+ 
++	if (bootflow_countdown) {
++		ret = bootflow_menu_show_countdown(exp, prompt,
++		    bootflow_delay_secs);
++		skip_render_once = true; /* Don't print menu twice on start */
++	}
+ 	done = false;
+ 	do {
+ 		struct expo_action act;
+ 		int ichar, key;
+ 
+-		ret = expo_render(exp);
++		if (skip_render_once)
++			skip_render_once = false;
++		else
++			ret = expo_render(exp);
+ 		if (ret)
+ 			break;
+ 
+@@ -231,7 +310,23 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 				schedule();
+ 				mdelay(2);
+ 				ichar = cli_ch_process(cch, -ETIMEDOUT);
++				if (bootflow_countdown) {
++					bootflow_delay -= 2;
++					bootflow_time += 2;
++					if (bootflow_delay <= 0)
++						ichar='\n';
++					if (bootflow_time < 1000)
++						continue;
++					bootflow_time = 0;
++					--bootflow_delay_secs;
++					ret = bootflow_menu_show_countdown(exp,
++					    prompt, bootflow_delay_secs);
++					if (ret)
++						break;
++				}
+ 			}
++			if (ret)
++				break;
+ 			if (!ichar) {
+ 				ichar = getchar();
+ 				ichar = cli_ch_process(cch, ichar);
+@@ -265,6 +360,17 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 				break;
+ 			}
+ 		}
++		if (bootflow_countdown) {
++			/* A key press interrupted the auto-boot timeout */
++			bootflow_countdown = false;
++			if (strlen(prompt) == strlen(promptChoice)) {
++				/* "Auto-boot in" becomes "Press ENTER" */
++				(void) memcpy(prompt, promptChoice,
++				    strlen(promptChoice));
++				ret = expo_render(exp);
++				skip_render_once = true;
++			}
++		}
+ 	} while (!done);
+ 
+ 	if (ret)
+@@ -272,7 +378,6 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode,
+ 
+ 	if (sel_id) {
+ 		struct bootflow *bflow;
+-		int i;
+ 
+ 		for (ret = bootflow_first_glob(&bflow), i = 0; !ret && i < 36;
+ 		     ret = bootflow_next_glob(&bflow), i++) {
+diff --git a/cmd/Kconfig b/cmd/Kconfig
+index 978f44eda4..0303869625 100644
+--- a/cmd/Kconfig
++++ b/cmd/Kconfig
+@@ -288,6 +288,7 @@ config CMD_BOOTDEV
+ config CMD_BOOTFLOW
+ 	bool "bootflow"
+ 	depends on BOOTSTD
++	select CMD_BOOTFLOW_BOOTDELAY
+ 	default y
+ 	help
+ 	  Support scanning for bootflows available with the bootdevs. The
+@@ -303,6 +304,17 @@ config CMD_BOOTFLOW_FULL
+ 
+ 	  This command is not necessary for bootstd to work.
+ 
++config CMD_BOOTFLOW_BOOTDELAY
++	int "bootflow - delay in seconds before booting the first menu option"
++	depends on CMD_BOOTFLOW
++	default 30
++	help
++	  On the bootflow menu, wait for the defined number of seconds before
++	  automatically booting. Unless interrupted, this will auto-boot the
++	  first option in the generated list of boot options.
++
++	  Set this to zero if you wish to disable the auto-boot timeout.
++
+ config CMD_BOOTMETH
+ 	bool "bootmeth"
+ 	depends on BOOTSTD
+diff --git a/doc/usage/cmd/bootflow.rst b/doc/usage/cmd/bootflow.rst
+index 5d41fe37a7..728f294274 100644
+--- a/doc/usage/cmd/bootflow.rst
++++ b/doc/usage/cmd/bootflow.rst
+@@ -32,6 +32,17 @@ Note that `CONFIG_BOOTSTD_FULL` (which enables `CONFIG_CMD_BOOTFLOW_FULL) must
+ be enabled to obtain full functionality with this command. Otherwise, it only
+ supports `bootflow scan` which scans and boots the first available bootflow.
+ 
++The `CONFIG_CMD_BOOTFLOW_BOOTDELAY` option can be set, defining (in seconds) the
++amount of time that U-Boot will wait; after this time passes, it will
++automatically boot the first item when generating a bootflow menu. If the value
++is set to zero, the timeout is disabled and the user must press enter; if it's
++negative, the timeout is disabled, and the maximum number of seconds is 99
++seconds. If a value higher than 100 is provided, the value is changed to a
++modulus of 100 (remainder of the value divided by 100).
++
++If the `CONFIG_BOOTFLOW_BOOTFLOW` option is undefined, the timeout will default
++to 30 seconds.
++
+ bootflow scan
+ ~~~~~~~~~~~~~
+ 
+diff --git a/include/bootflow.h b/include/bootflow.h
+index 4d2fc7b69b..9f4245caa7 100644
+--- a/include/bootflow.h
++++ b/include/bootflow.h
+@@ -452,7 +452,15 @@ int bootflow_iter_check_system(const struct bootflow_iter *iter);
+  * @expp: Returns the expo created
+  * Returns 0 on success, -ve on error
+  */
+-int bootflow_menu_new(struct expo **expp);
++int bootflow_menu_new(struct expo **expp, const char *prompt);
++
++/**
++ * bootflow_menu_show_countdown() - Show countdown timer for auto-boot
++ *
++ * Returns the value of expo_render()
++ */
++int bootflow_menu_show_countdown(struct expo *exp, char *prompt,
++    char bootflow_delay);
+ 
+ /**
+  * bootflow_menu_apply_theme() - Apply a theme to a bootmenu
+-- 
+2.39.5
+
diff --git a/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch
new file mode 100644
index 00000000..f913572f
--- /dev/null
+++ b/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch
@@ -0,0 +1,213 @@
+From 4ff0f509aa28eb8e85f1c0c9929c63996c646bb8 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 4 Dec 2024 18:20:19 +0000
+Subject: [PATCH 1/1] Libreboot branding/version on the bootflow menu
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ boot/bootflow_menu.c          |   2 +-
+ drivers/video/u_boot_logo.bmp | Bin 6932 -> 27350 bytes
+ 2 files changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c
+index 84831915a2..8e26ec2aef 100644
+--- a/boot/bootflow_menu.c
++++ b/boot/bootflow_menu.c
+@@ -59,7 +59,7 @@ int bootflow_menu_new(struct expo **expp, const char *prompt)
+ 	ret = scene_menu(scn, "main", OBJ_MENU, &menu);
+ 	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
+ 	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
+-			     "U-Boot - Boot Menu", NULL);
++	    "Libreboot 20241205 release (U-Boot Menu)                                                    https://libreboot.org/", NULL);
+ 	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
+ 
+ 	logo = video_get_u_boot_logo();
+diff --git a/drivers/video/u_boot_logo.bmp b/drivers/video/u_boot_logo.bmp
+index 47f1e9b99789584d2f6dd71e954b51927b35d783..bc9ae001badb25bc900058c167a47247ef91dc7c 100644
+GIT binary patch
+literal 27350
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+zI4i2_>T9kR7nHaM=&&`i;i_q@bCo%np-J)Us3<6`q)c^XQ9*edSICpPpJ9J$ID*zR
+zH&f;HV8xIxjm!w%9ko}>KdW@Pd0Kckxhl&lTy>qywcf4OmE~oX)ve3`N5#haj(f;h
+zF~#d$)9HQb^dc>{vKwoueb;JDRsP1=z%xHwLU@AjV^vcqt*mNFC7jiR!KGA+zw(>P
+zl^l0#u}Rg_y_{97qa0GN>ZtClAXZ=Ba-LxI<&;`geRXGtf<DwcX2<}=sf!}#_JLuz
+z%fk_+Pl~Gbwy$n5YP~NKgD`~Lo{<Ls0aY#DBbHewyIC!oZXcay3b{jqw}@4&IG3ob
+z;5+9uW>Kd5bY$Q?-<Pq<3#@H-h*j0D!E=w^RJCjKtFr@H4;iy*>IO5wr~-FM0HeWd
+z9=q|}H<(Ddrq$uv{ol&bN;XNN-8P6-Rn(U7n4D`E!`N!8VTjmA7&Vthn?W;8*r!f6
+zZU3VhYgkxpqvw3u)EP$Ejz-r-=W)xo($Z%DHM9J5<zdE&>9rLPvtouV$!^arC@iV0
+zu5WT1zG>}ne_2;uSyEV#OYeA{_ntngk~Hx)1Cw>o04vu$Pvw~7CkhH2FgvvZIWBnv
+z?ef}iPfh!%$P+)YOZpxCk?cp^(KpG<W9;(4{hrF2Bc_hFOUm%?`X<>hikLFEhh_m~
+ztdjJgT@K0p!#%bB6k5Ri^kIxtx0?YYJXFzs#zf;gc}3E$LwnLqDYD<kAusr*z<bB8
+zgNL@Rdh+g(T$Q>}c;RW*iaf)^CVOrm>`!AqVv^@3^pvpbW5s+&-y*je4c&6rL_@|0
+zlsQeAstKMO7yB`+T+WGU9OqHDFe{!k-it{6N~S;JxzSN>H#4UB*2gc6)bJ2<h`Q<d
+zD%l{pscM?WJiC3Jd6aPz?5pUJ%)I%`%#Z)rb6X@$lcSuyh86dI(H=1FoHiwEG2R6$
+zm}UKXsD6rSlMi{`m5@3(+;i)t9u~=9mZ&7v+C%kMmYE{zO|ON>N#Vw=x*w^~EOV}?
+z`s^&vog;GpNY9=BS=xNW@?%wJ?R$O_ZqWK;r}3^3fE~t5MIh3Q*N`Bj7_Te?u+{TI
+zBwDi38i*~z{|rJfHW@Eo!ARu#)VrE`4NNfJ?S^2T@jf^dYm8UO5X2cTnS4{#Vnw}*
+z-h-Z3*4}s5`>>EG>Ls@Kbv6tOjMv)U*V_?zUes%DIA)7_-|c<#<twn(^9szDVQq?x
+wA@94_V)cG3+BniCF!%phCa^V`EuNoDjq0U&Do6FaK0m2mbu}=?pJWRCZ}IWH!~g&Q
+
+-- 
+2.39.5
+
diff --git a/config/u-boot/gru_bob/config/default b/config/u-boot/gru_bob/config/default
index 863a0fee..0d42fc98 100644
--- a/config/u-boot/gru_bob/config/default
+++ b/config/u-boot/gru_bob/config/default
@@ -4,7 +4,7 @@
 #
 
 #
-# Compiler: gcc (Debian 14.2.0-8) 14.2.0
+# Compiler: gcc (Debian 12.2.0-14) 12.2.0
 #
 CONFIG_CREATE_ARCH_SYMLINK=y
 CONFIG_SUPPORT_LITTLE_ENDIAN=y
@@ -327,7 +327,7 @@ CONFIG_SYS_LITTLE_ENDIAN=y
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
 CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=140200
+CONFIG_GCC_VERSION=120200
 CONFIG_CLANG_VERSION=0
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
@@ -713,6 +713,7 @@ CONFIG_CMD_BOOTM=y
 CONFIG_CMD_BOOTDEV=y
 CONFIG_CMD_BOOTFLOW=y
 CONFIG_CMD_BOOTFLOW_FULL=y
+CONFIG_CMD_BOOTFLOW_BOOTDELAY=8
 CONFIG_CMD_BOOTMETH=y
 CONFIG_BOOTM_EFI=y
 CONFIG_BOOTM_ELF=y
diff --git a/config/u-boot/gru_kevin/config/default b/config/u-boot/gru_kevin/config/default
index 1e14cdba..ccd9436e 100644
--- a/config/u-boot/gru_kevin/config/default
+++ b/config/u-boot/gru_kevin/config/default
@@ -4,7 +4,7 @@
 #
 
 #
-# Compiler: gcc (Debian 14.2.0-8) 14.2.0
+# Compiler: gcc (Debian 12.2.0-14) 12.2.0
 #
 CONFIG_CREATE_ARCH_SYMLINK=y
 CONFIG_SUPPORT_LITTLE_ENDIAN=y
@@ -327,7 +327,7 @@ CONFIG_SYS_LITTLE_ENDIAN=y
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
 CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=140200
+CONFIG_GCC_VERSION=120200
 CONFIG_CLANG_VERSION=0
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
@@ -713,6 +713,7 @@ CONFIG_CMD_BOOTM=y
 CONFIG_CMD_BOOTDEV=y
 CONFIG_CMD_BOOTFLOW=y
 CONFIG_CMD_BOOTFLOW_FULL=y
+CONFIG_CMD_BOOTFLOW_BOOTDELAY=8
 CONFIG_CMD_BOOTMETH=y
 CONFIG_BOOTM_EFI=y
 CONFIG_BOOTM_ELF=y
diff --git a/config/u-boot/qemu_arm64_12mb/config/default b/config/u-boot/qemu_arm64_12mb/config/default
index ecdef9e4..3216a984 100644
--- a/config/u-boot/qemu_arm64_12mb/config/default
+++ b/config/u-boot/qemu_arm64_12mb/config/default
@@ -4,7 +4,7 @@
 #
 
 #
-# Compiler: gcc (Debian 14.2.0-8) 14.2.0
+# Compiler: gcc (Debian 12.2.0-14) 12.2.0
 #
 CONFIG_CREATE_ARCH_SYMLINK=y
 CONFIG_SUPPORT_LITTLE_ENDIAN=y
@@ -253,7 +253,7 @@ CONFIG_SYS_LITTLE_ENDIAN=y
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
 CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=140200
+CONFIG_GCC_VERSION=120200
 CONFIG_CLANG_VERSION=0
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
@@ -523,6 +523,7 @@ CONFIG_CMD_BOOTM=y
 CONFIG_CMD_BOOTDEV=y
 CONFIG_CMD_BOOTFLOW=y
 CONFIG_CMD_BOOTFLOW_FULL=y
+CONFIG_CMD_BOOTFLOW_BOOTDELAY=8
 CONFIG_CMD_BOOTMETH=y
 CONFIG_BOOTM_EFI=y
 CONFIG_BOOTM_ELF=y

From f26752fd854fd26b102ba9f23c6dfae9486e31c3 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Wed, 4 Dec 2024 22:48:13 +0300
Subject: [PATCH 0914/1549] u-boot: Use bootflow menu by default for ARM64
 boards

The bootflow menu is already the default boot command on x86. Switch
arm64 boards to that as well, so instead of booting the first thing we
find, we can easily choose what to boot.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 config/u-boot/gru_bob/config/default         | 2 +-
 config/u-boot/gru_kevin/config/default       | 2 +-
 config/u-boot/qemu_arm64_12mb/config/default | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/config/u-boot/gru_bob/config/default b/config/u-boot/gru_bob/config/default
index 0d42fc98..bdd3ee98 100644
--- a/config/u-boot/gru_bob/config/default
+++ b/config/u-boot/gru_bob/config/default
@@ -475,7 +475,7 @@ CONFIG_ARCH_FIXUP_FDT_MEMORY=y
 # CONFIG_USE_BOOTARGS is not set
 # CONFIG_BOOTARGS_SUBST is not set
 CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="bootflow scan -lb"
+CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
 CONFIG_USE_PREBOOT=y
 CONFIG_PREBOOT="usb start"
 CONFIG_PREBOOT_DEFINED=y
diff --git a/config/u-boot/gru_kevin/config/default b/config/u-boot/gru_kevin/config/default
index ccd9436e..2a15b9bf 100644
--- a/config/u-boot/gru_kevin/config/default
+++ b/config/u-boot/gru_kevin/config/default
@@ -475,7 +475,7 @@ CONFIG_ARCH_FIXUP_FDT_MEMORY=y
 # CONFIG_USE_BOOTARGS is not set
 # CONFIG_BOOTARGS_SUBST is not set
 CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="bootflow scan -lb"
+CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
 CONFIG_USE_PREBOOT=y
 CONFIG_PREBOOT="usb start"
 CONFIG_PREBOOT_DEFINED=y
diff --git a/config/u-boot/qemu_arm64_12mb/config/default b/config/u-boot/qemu_arm64_12mb/config/default
index 3216a984..4824cc79 100644
--- a/config/u-boot/qemu_arm64_12mb/config/default
+++ b/config/u-boot/qemu_arm64_12mb/config/default
@@ -387,7 +387,7 @@ CONFIG_ARCH_FIXUP_FDT_MEMORY=y
 # CONFIG_USE_BOOTARGS is not set
 # CONFIG_BOOTARGS_SUBST is not set
 CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="bootflow scan -lb"
+CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
 CONFIG_USE_PREBOOT=y
 CONFIG_PREBOOT="usb start"
 CONFIG_PREBOOT_DEFINED=y

From bef2890233e8fcd96249671185a44732f79215fe Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 4 Dec 2024 20:14:59 +0000
Subject: [PATCH 0915/1549] i made u-boot purple

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../patches/0008-i-made-it-purple.patch       | 33 +++++++++++++++++++
 .../x86/patches/0006-i-made-it-purple.patch   | 33 +++++++++++++++++++
 .../patches/0006-i-made-it-purple.patch       | 33 +++++++++++++++++++
 3 files changed, 99 insertions(+)
 create mode 100644 config/u-boot/default/patches/0008-i-made-it-purple.patch
 create mode 100644 config/u-boot/x86/patches/0006-i-made-it-purple.patch
 create mode 100644 config/u-boot/x86_64/patches/0006-i-made-it-purple.patch

diff --git a/config/u-boot/default/patches/0008-i-made-it-purple.patch b/config/u-boot/default/patches/0008-i-made-it-purple.patch
new file mode 100644
index 00000000..594a1b35
--- /dev/null
+++ b/config/u-boot/default/patches/0008-i-made-it-purple.patch
@@ -0,0 +1,33 @@
+From 9c1ceb5a5b302275da146149001f4210a1d7fc86 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 4 Dec 2024 20:13:42 +0000
+Subject: [PATCH 1/1] i made it purple
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ boot/expo.c | 7 ++-----
+ 1 file changed, 2 insertions(+), 5 deletions(-)
+
+diff --git a/boot/expo.c b/boot/expo.c
+index ed01483f1d..04726d1c9a 100644
+--- a/boot/expo.c
++++ b/boot/expo.c
+@@ -189,13 +189,10 @@ int expo_render(struct expo *exp)
+ 	struct udevice *dev = exp->display;
+ 	struct video_priv *vid_priv = dev_get_uclass_priv(dev);
+ 	struct scene *scn = NULL;
+-	enum colour_idx back;
+-	u32 colour;
+ 	int ret;
+ 
+-	back = CONFIG_IS_ENABLED(SYS_WHITE_ON_BLACK) ? VID_BLACK : VID_WHITE;
+-	colour = video_index_to_colour(vid_priv, back);
+-	ret = video_fill(dev, colour);
++	/* sexy libreboot purple background */
++	ret = video_fill(dev, 0x280b22); /* #280b22 in HTML RGB notation */
+ 	if (ret)
+ 		return log_msg_ret("fill", ret);
+ 
+-- 
+2.39.5
+
diff --git a/config/u-boot/x86/patches/0006-i-made-it-purple.patch b/config/u-boot/x86/patches/0006-i-made-it-purple.patch
new file mode 100644
index 00000000..594a1b35
--- /dev/null
+++ b/config/u-boot/x86/patches/0006-i-made-it-purple.patch
@@ -0,0 +1,33 @@
+From 9c1ceb5a5b302275da146149001f4210a1d7fc86 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 4 Dec 2024 20:13:42 +0000
+Subject: [PATCH 1/1] i made it purple
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ boot/expo.c | 7 ++-----
+ 1 file changed, 2 insertions(+), 5 deletions(-)
+
+diff --git a/boot/expo.c b/boot/expo.c
+index ed01483f1d..04726d1c9a 100644
+--- a/boot/expo.c
++++ b/boot/expo.c
+@@ -189,13 +189,10 @@ int expo_render(struct expo *exp)
+ 	struct udevice *dev = exp->display;
+ 	struct video_priv *vid_priv = dev_get_uclass_priv(dev);
+ 	struct scene *scn = NULL;
+-	enum colour_idx back;
+-	u32 colour;
+ 	int ret;
+ 
+-	back = CONFIG_IS_ENABLED(SYS_WHITE_ON_BLACK) ? VID_BLACK : VID_WHITE;
+-	colour = video_index_to_colour(vid_priv, back);
+-	ret = video_fill(dev, colour);
++	/* sexy libreboot purple background */
++	ret = video_fill(dev, 0x280b22); /* #280b22 in HTML RGB notation */
+ 	if (ret)
+ 		return log_msg_ret("fill", ret);
+ 
+-- 
+2.39.5
+
diff --git a/config/u-boot/x86_64/patches/0006-i-made-it-purple.patch b/config/u-boot/x86_64/patches/0006-i-made-it-purple.patch
new file mode 100644
index 00000000..594a1b35
--- /dev/null
+++ b/config/u-boot/x86_64/patches/0006-i-made-it-purple.patch
@@ -0,0 +1,33 @@
+From 9c1ceb5a5b302275da146149001f4210a1d7fc86 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 4 Dec 2024 20:13:42 +0000
+Subject: [PATCH 1/1] i made it purple
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ boot/expo.c | 7 ++-----
+ 1 file changed, 2 insertions(+), 5 deletions(-)
+
+diff --git a/boot/expo.c b/boot/expo.c
+index ed01483f1d..04726d1c9a 100644
+--- a/boot/expo.c
++++ b/boot/expo.c
+@@ -189,13 +189,10 @@ int expo_render(struct expo *exp)
+ 	struct udevice *dev = exp->display;
+ 	struct video_priv *vid_priv = dev_get_uclass_priv(dev);
+ 	struct scene *scn = NULL;
+-	enum colour_idx back;
+-	u32 colour;
+ 	int ret;
+ 
+-	back = CONFIG_IS_ENABLED(SYS_WHITE_ON_BLACK) ? VID_BLACK : VID_WHITE;
+-	colour = video_index_to_colour(vid_priv, back);
+-	ret = video_fill(dev, colour);
++	/* sexy libreboot purple background */
++	ret = video_fill(dev, 0x280b22); /* #280b22 in HTML RGB notation */
+ 	if (ret)
+ 		return log_msg_ret("fill", ret);
+ 
+-- 
+2.39.5
+

From 8065b9842b58e566bf1b7b37dac2c413e39f96f8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 4 Dec 2024 22:16:32 +0000
Subject: [PATCH 0916/1549] remove the purple patch on arm64 u-boot

it's green there. different colour scheme apparently.

still works on x86. alper said his kevin chromebook was green!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .gitignore                                    |  2 +-
 .../patches/0008-i-made-it-purple.patch       | 33 -------------------
 2 files changed, 1 insertion(+), 34 deletions(-)
 delete mode 100644 config/u-boot/default/patches/0008-i-made-it-purple.patch

diff --git a/.gitignore b/.gitignore
index 60ad4f10..84724cfb 100644
--- a/.gitignore
+++ b/.gitignore
@@ -35,4 +35,4 @@
 /lock
 /hash/
 /dump/
-/qrun.sh
+/qrun*.sh
diff --git a/config/u-boot/default/patches/0008-i-made-it-purple.patch b/config/u-boot/default/patches/0008-i-made-it-purple.patch
deleted file mode 100644
index 594a1b35..00000000
--- a/config/u-boot/default/patches/0008-i-made-it-purple.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 9c1ceb5a5b302275da146149001f4210a1d7fc86 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Wed, 4 Dec 2024 20:13:42 +0000
-Subject: [PATCH 1/1] i made it purple
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- boot/expo.c | 7 ++-----
- 1 file changed, 2 insertions(+), 5 deletions(-)
-
-diff --git a/boot/expo.c b/boot/expo.c
-index ed01483f1d..04726d1c9a 100644
---- a/boot/expo.c
-+++ b/boot/expo.c
-@@ -189,13 +189,10 @@ int expo_render(struct expo *exp)
- 	struct udevice *dev = exp->display;
- 	struct video_priv *vid_priv = dev_get_uclass_priv(dev);
- 	struct scene *scn = NULL;
--	enum colour_idx back;
--	u32 colour;
- 	int ret;
- 
--	back = CONFIG_IS_ENABLED(SYS_WHITE_ON_BLACK) ? VID_BLACK : VID_WHITE;
--	colour = video_index_to_colour(vid_priv, back);
--	ret = video_fill(dev, colour);
-+	/* sexy libreboot purple background */
-+	ret = video_fill(dev, 0x280b22); /* #280b22 in HTML RGB notation */
- 	if (ret)
- 		return log_msg_ret("fill", ret);
- 
--- 
-2.39.5
-

From cd9baca5d664d392316d94ccaa7deb209d4e1828 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 5 Dec 2024 09:29:59 +0000
Subject: [PATCH 0917/1549] disable u-boot on thinkpad t480

it just bootloops and doesn't seem reliable at the moment

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/t480_fsp_16mb/target.cfg  | 3 +--
 config/coreboot/t480s_fsp_16mb/target.cfg | 3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/config/coreboot/t480_fsp_16mb/target.cfg b/config/coreboot/t480_fsp_16mb/target.cfg
index af8d71e3..af89a367 100644
--- a/config/coreboot/t480_fsp_16mb/target.cfg
+++ b/config/coreboot/t480_fsp_16mb/target.cfg
@@ -6,6 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="t480"
-build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+build_depend="seabios/default grub/xhci memtest86plus"
 IFD_platform="sklkbl"
-payload_uboot_amd64="y"
diff --git a/config/coreboot/t480s_fsp_16mb/target.cfg b/config/coreboot/t480s_fsp_16mb/target.cfg
index 05450bf6..c8835c8f 100644
--- a/config/coreboot/t480s_fsp_16mb/target.cfg
+++ b/config/coreboot/t480s_fsp_16mb/target.cfg
@@ -6,6 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="t480s"
-build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+build_depend="seabios/default grub/xhci memtest86plus"
 IFD_platform="sklkbl"
-payload_uboot_amd64="y"

From 99513c3bf674950232cc5aaba4ee15ae790310d0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 5 Dec 2024 09:33:51 +0000
Subject: [PATCH 0918/1549] add patch from mkukri fixing t480 sata

nvme worked but not sata. with this, t480 users with sata
ssds should be able to boot linux nicely

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../coreboot/next/patches/0009-sata-fix.patch | 54 +++++++++++++++++++
 1 file changed, 54 insertions(+)
 create mode 100644 config/coreboot/next/patches/0009-sata-fix.patch

diff --git a/config/coreboot/next/patches/0009-sata-fix.patch b/config/coreboot/next/patches/0009-sata-fix.patch
new file mode 100644
index 00000000..d67b38eb
--- /dev/null
+++ b/config/coreboot/next/patches/0009-sata-fix.patch
@@ -0,0 +1,54 @@
+From fb58f84592fbba25abafaccd9e868afa107c1051 Mon Sep 17 00:00:00 2001
+From: Mate Kukri <km@mkukri.xyz>
+Date: Thu, 5 Dec 2024 08:11:05 +0000
+Subject: [PATCH] sata fix
+
+Change-Id: I0eab7aaf9cf00085c97c637c9ffa14e38cf6d738
+---
+ .../lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb | 9 +++------
+ .../sklkbl_thinkpad/variants/t480s/overridetree.cb       | 9 +++------
+ 2 files changed, 6 insertions(+), 12 deletions(-)
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
+index 4b68ec3f49..2f0b20d91a 100644
+--- a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
+@@ -42,12 +42,9 @@ chip soc/intel/skylake
+ 		end
+ 
+ 		device ref sata on
+-			# SATA_0  - NC
+-			# SATA_1A - NC
+-			# SATA_1B - NC
+-			# SATA_2  - SATA caddy
+-			register "SataPortsEnable[3]" = "1"
+-			register "SataPortsDevSlp[3]" = "1"
++			# SATA_2 - JHDD1 SATA SSD
++			register "SataPortsEnable[2]" = "1"
++			register "SataPortsDevSlp[2]" = "1"
+ 		end
+ 
+ 		# PCIe controller 1 - 1x4
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
+index 5f1c38bc03..cea5e485d2 100644
+--- a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
+@@ -42,12 +42,9 @@ chip soc/intel/skylake
+ 		end
+ 
+ 		device ref sata on
+-			# SATA_0  - NC
+-			# SATA_1A - NC
+-			# SATA_1B - NC
+-			# SATA_2  - M.2 2280 SATA
+-			register "SataPortsEnable[3]" = "1"
+-			register "SataPortsDevSlp[3]" = "1"
++			# SATA_2 - Main M.2 SATA SSD
++			register "SataPortsEnable[2]" = "1"
++			register "SataPortsDevSlp[2]" = "1"
+ 		end
+ 
+ 		# PCIe controller 1 - 1x2+2x1
+-- 
+2.39.5
+

From 19ec440a6f79dcbb089715fef814808a0fd40ae0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 5 Dec 2024 09:53:45 +0000
Subject: [PATCH 0919/1549] Revert "disable u-boot on thinkpad t480"

u-boot does work after a few reboots. it just boot loops.

let it run. it should be able to boot from nvme. sata still needs
some work (sata only works in grub, on this machine)

This reverts commit cd9baca5d664d392316d94ccaa7deb209d4e1828.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/t480_fsp_16mb/target.cfg  | 3 ++-
 config/coreboot/t480s_fsp_16mb/target.cfg | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/config/coreboot/t480_fsp_16mb/target.cfg b/config/coreboot/t480_fsp_16mb/target.cfg
index af89a367..af8d71e3 100644
--- a/config/coreboot/t480_fsp_16mb/target.cfg
+++ b/config/coreboot/t480_fsp_16mb/target.cfg
@@ -6,5 +6,6 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="t480"
-build_depend="seabios/default grub/xhci memtest86plus"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
 IFD_platform="sklkbl"
+payload_uboot_amd64="y"
diff --git a/config/coreboot/t480s_fsp_16mb/target.cfg b/config/coreboot/t480s_fsp_16mb/target.cfg
index c8835c8f..05450bf6 100644
--- a/config/coreboot/t480s_fsp_16mb/target.cfg
+++ b/config/coreboot/t480s_fsp_16mb/target.cfg
@@ -6,5 +6,6 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="t480s"
-build_depend="seabios/default grub/xhci memtest86plus"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
 IFD_platform="sklkbl"
+payload_uboot_amd64="y"

From 07983c1d882180a301e7be9dcf68e155c6c5a7f7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 5 Dec 2024 13:01:31 +0000
Subject: [PATCH 0920/1549] Revert "Revert "disable u-boot on thinkpad t480""

Nope! Bootflow menu is cursed on this machine.

Too many issues in U-Boot on this machine. I did however
boot a Debian installer after it booted, using bootflow.

The installed system wouldn't boot with bootflow, but I could
then boot it with "bootefi bootmgr".

I'll rig up a uart on the T480 when I get round to it and
start investigating U-Boot bugs on this board.

I don't want people flashing something that doesn't work.
GRUB and SeaBIOS work, so ship those, and don't ship U-Boot.

This reverts commit 19ec440a6f79dcbb089715fef814808a0fd40ae0.
---
 config/coreboot/t480_fsp_16mb/target.cfg  | 3 +--
 config/coreboot/t480s_fsp_16mb/target.cfg | 3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/config/coreboot/t480_fsp_16mb/target.cfg b/config/coreboot/t480_fsp_16mb/target.cfg
index af8d71e3..af89a367 100644
--- a/config/coreboot/t480_fsp_16mb/target.cfg
+++ b/config/coreboot/t480_fsp_16mb/target.cfg
@@ -6,6 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="t480"
-build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+build_depend="seabios/default grub/xhci memtest86plus"
 IFD_platform="sklkbl"
-payload_uboot_amd64="y"
diff --git a/config/coreboot/t480s_fsp_16mb/target.cfg b/config/coreboot/t480s_fsp_16mb/target.cfg
index 05450bf6..c8835c8f 100644
--- a/config/coreboot/t480s_fsp_16mb/target.cfg
+++ b/config/coreboot/t480s_fsp_16mb/target.cfg
@@ -6,6 +6,5 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="t480s"
-build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+build_depend="seabios/default grub/xhci memtest86plus"
 IFD_platform="sklkbl"
-payload_uboot_amd64="y"

From 56b35bd9d8d6189c6bf905716bf8f946a6c88a0f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 5 Dec 2024 23:45:01 +0000
Subject: [PATCH 0921/1549] Libreboot 20241205 release

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../patches/0002-say-the-name-libreboot-in-the-grub-menu.patch  | 2 +-
 .../patches/0002-say-the-name-libreboot-in-the-grub-menu.patch  | 2 +-
 .../patches/0002-say-the-name-libreboot-in-the-grub-menu.patch  | 2 +-
 config/submodule/docs/html/module.cfg                           | 2 +-
 config/submodule/docs/img/module.cfg                            | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 99082320..0749bb8c 100644
--- a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..300f55fe1 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20241008 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20241205 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index d6bd2464..3bfef3d7 100644
--- a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..300f55fe1 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20241008 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20241205 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index bf2b5940..af1046d1 100644
--- a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..300f55fe1 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20241008 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20241205 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/submodule/docs/html/module.cfg b/config/submodule/docs/html/module.cfg
index 1b13b25d..85dc1d5d 100644
--- a/config/submodule/docs/html/module.cfg
+++ b/config/submodule/docs/html/module.cfg
@@ -1,3 +1,3 @@
-subhash="cef9c80c01dbcbe62b0cd63e5ebf03133f16ac1b"
+subhash="3787d9eade2409ff5192fb86bd4c6c5b025c3c5a"
 subrepo="https://codeberg.org/libreboot/lbwww"
 subrepo_bkup="https://git.disroot.org/libreboot/lbwww"
diff --git a/config/submodule/docs/img/module.cfg b/config/submodule/docs/img/module.cfg
index 87c99fc1..82fde655 100644
--- a/config/submodule/docs/img/module.cfg
+++ b/config/submodule/docs/img/module.cfg
@@ -1,3 +1,3 @@
-subhash="bd92e319bde851d567240452bb89299050a24f3f"
+subhash="8dcb3e11a579e29bc5a16ba1ba5b473164d2e9e4"
 subrepo="https://codeberg.org/libreboot/lbwww-img"
 subrepo_bkup="https://git.disroot.org/libreboot/lbwww-img"

From 2dc7c5fa7203b20c9251f72d99c4e4c7e07c4b72 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 6 Dec 2024 01:24:35 +0000
Subject: [PATCH 0922/1549] vendor.sh: fix minor release bug

I should have copied the extract directory, in cases
where it appears as filename_extracted/ under cache/,
but I was moving it instead.

Both locations (cache/file/*_extracted/
and vendorfiles/appdir/) get deleted, on every run of
the vendor script, per target, so this is OK.

The only sin is additional use of disk space, for
archives that are mostly very small and get immediately
deleted anyway.

This one lbmk bug, minor though it may be, prevented
the Libreboot 20241205 release, which (since it's now
the 6th of December) will become Libreboot 20241206
instead - and that gives me time to contemplate whether
I want to do one more change that I had planned for the 5th!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 201359d7..3f78c368 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -180,7 +180,7 @@ extract_archive()
 	    innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
 	    "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
 
-	[ ! -d "${_dl}_extracted" ] || mv "${_dl}_extracted" "$2" || \
+	[ ! -d "${_dl}_extracted" ] || cp -R "${_dl}_extracted" "$2" || \
 	    $err "!mv '${_dl}_extracted' '$2'"; :
 }
 

From 2d96fe2a1d13486d3ea6577beedcf3b2babf6cab Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 6 Dec 2024 01:53:44 +0000
Subject: [PATCH 0923/1549] vendor.sh: avoid unnecessary directory copy

the previous commit changed an mv to a cp. what it hacked
was actually a relic of the vgarom download patch that i
did for t480, before mate got native video init working.

this patch is the better fix. i double checked to be sure,
and nothing was using the files at the copied location.
the _extracted directory under cache gets deleted later on,
so it's perfectly acceptable to keep.

the other alternative would have been to simply change
the path in the sch5545 function to appdir, instead of
the cache dir, but who really cares?

this patch removes bloat from lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 3f78c368..8c1ddcd4 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -176,12 +176,8 @@ apply_me11_deguard_mod()
 
 extract_archive()
 {
-	geteltorito "$1" > "$2/vendor.img" || \
-	    innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
+	innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
 	    "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
-
-	[ ! -d "${_dl}_extracted" ] || cp -R "${_dl}_extracted" "$2" || \
-	    $err "!mv '${_dl}_extracted' '$2'"; :
 }
 
 extract_kbc1126ec()

From ec581bde4753365df7c5509bce600ad6134693fe Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 6 Dec 2024 10:06:38 +0000
Subject: [PATCH 0924/1549] Libreboot 20241206 release

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../patches/0002-say-the-name-libreboot-in-the-grub-menu.patch  | 2 +-
 .../patches/0002-say-the-name-libreboot-in-the-grub-menu.patch  | 2 +-
 .../patches/0002-say-the-name-libreboot-in-the-grub-menu.patch  | 2 +-
 .../0007-Libreboot-branding-version-on-the-bootflow-menu.patch  | 2 +-
 .../0005-Libreboot-branding-version-on-the-bootflow-menu.patch  | 2 +-
 .../0005-Libreboot-branding-version-on-the-bootflow-menu.patch  | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 0749bb8c..66e68f5c 100644
--- a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..300f55fe1 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20241205 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20241206 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 3bfef3d7..c1a674ec 100644
--- a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..300f55fe1 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20241205 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20241206 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index af1046d1..26c7df43 100644
--- a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..300f55fe1 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20241205 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20241206 release, based on coreboot.    https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch
index f913572f..53a9b90d 100644
--- a/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch
+++ b/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch
@@ -18,7 +18,7 @@ index 84831915a2..8e26ec2aef 100644
  	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
  	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
 -			     "U-Boot - Boot Menu", NULL);
-+	    "Libreboot 20241205 release (U-Boot Menu)                                                    https://libreboot.org/", NULL);
++	    "Libreboot 20241206 release (U-Boot Menu)                                                    https://libreboot.org/", NULL);
  	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
  
  	logo = video_get_u_boot_logo();
diff --git a/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
index f913572f..53a9b90d 100644
--- a/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
+++ b/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
@@ -18,7 +18,7 @@ index 84831915a2..8e26ec2aef 100644
  	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
  	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
 -			     "U-Boot - Boot Menu", NULL);
-+	    "Libreboot 20241205 release (U-Boot Menu)                                                    https://libreboot.org/", NULL);
++	    "Libreboot 20241206 release (U-Boot Menu)                                                    https://libreboot.org/", NULL);
  	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
  
  	logo = video_get_u_boot_logo();
diff --git a/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
index f913572f..53a9b90d 100644
--- a/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
+++ b/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
@@ -18,7 +18,7 @@ index 84831915a2..8e26ec2aef 100644
  	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
  	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
 -			     "U-Boot - Boot Menu", NULL);
-+	    "Libreboot 20241205 release (U-Boot Menu)                                                    https://libreboot.org/", NULL);
++	    "Libreboot 20241206 release (U-Boot Menu)                                                    https://libreboot.org/", NULL);
  	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
  
  	logo = video_get_u_boot_logo();

From e80261dd5451c7a0d16e34b11bb3b7ce07364b51 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 6 Dec 2024 10:34:36 +0000
Subject: [PATCH 0925/1549] Revert "vendor.sh: avoid unnecessary directory
 copy"

Nope. It was correct before. fml

This reverts commit 2d96fe2a1d13486d3ea6577beedcf3b2babf6cab.
---
 include/vendor.sh | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 8c1ddcd4..3f78c368 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -176,8 +176,12 @@ apply_me11_deguard_mod()
 
 extract_archive()
 {
-	innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
+	geteltorito "$1" > "$2/vendor.img" || \
+	    innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
 	    "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
+
+	[ ! -d "${_dl}_extracted" ] || cp -R "${_dl}_extracted" "$2" || \
+	    $err "!mv '${_dl}_extracted' '$2'"; :
 }
 
 extract_kbc1126ec()

From e3b77b132e6b5981c09bc1ce282afaae64058ab3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 8 Dec 2024 18:04:51 +0000
Subject: [PATCH 0926/1549] fix the stupidest bug ever

no context given, but every rom needs to be re-built.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/rom.sh b/include/rom.sh
index f86e5e1a..a7e920e0 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -214,7 +214,7 @@ add_uboot()
 	    ubootelf="$ubdir/u-boot-x86-with-spl.bin" # EFI-compatible
 
 	[ -f "$ubootelf" ] || $err "cb/$ubtarget: Can't find u-boot"
-	cbfs "$tmprom" "$ubootelf" "$ubpath" $ubcbfsargs; cprom
+	cbfs "$tmprom" "$ubootelf" "$ubpath" $ubcbfsargs
 }
 
 cprom()

From b910424b5df8ed7c931a7b8f5cc8e34eacf0ca3e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 8 Dec 2024 18:24:57 +0000
Subject: [PATCH 0927/1549] fix another very stupid mistake

the last revision disabled building arm64 images!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/rom.sh b/include/rom.sh
index a7e920e0..2d20a8a7 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -215,6 +215,7 @@ add_uboot()
 
 	[ -f "$ubootelf" ] || $err "cb/$ubtarget: Can't find u-boot"
 	cbfs "$tmprom" "$ubootelf" "$ubpath" $ubcbfsargs
+	[ "$payload_seabios" = "y" ] || cprom; :
 }
 
 cprom()

From da527459b68f2e7a1e6a902fdb5b7d89e8b69dd6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 8 Dec 2024 21:31:06 +0000
Subject: [PATCH 0928/1549] add tarballs and signatures to gitignore

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .gitignore | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.gitignore b/.gitignore
index 84724cfb..b6aca3b2 100644
--- a/.gitignore
+++ b/.gitignore
@@ -36,3 +36,4 @@
 /hash/
 /dump/
 /qrun*.sh
+*.tar.*

From c2023921893f8ee11a9a611469bb8350ef1692be Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 10 Dec 2024 23:45:59 +0000
Subject: [PATCH 0929/1549] fix t480 spd size (512, not 256)

this was done with the following command:

./mk -u coreboot t480s_fsp_16mb t480_fsp_16mb

it was set to 256 but should be 512. the SPD is what
contains configuration data for raminit, which training
code uses so that the timings will be correct. if the SPD
size is wrong, the machine won't boot

in practise, lbmk always runs "make oldconfig" on
a coreboot config, before building it, so this was
already being corrected automatically at build time.

however, if that fact ever changes in the future, this
wrong configuration would cause the machines not to boot.

therefore, this can be considered a preventative or perhaps
pre-emptive bug fix.

this fix does not need to be applied to the 20241206 release,
because of the behaviour described above. the final ROM images
do have the spd size set correctly to 512, because of this
design feature in lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb  | 2 +-
 config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode     | 2 +-
 config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb | 2 +-
 config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode    | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
index 2be0ecec..769d53eb 100644
--- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
@@ -115,7 +115,7 @@ CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
 CONFIG_VGA_BIOS_ID="8086,0406"
 CONFIG_DIMM_MAX=2
-CONFIG_DIMM_SPD_SIZE=256
+CONFIG_DIMM_SPD_SIZE=512
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
index 95989094..e21749fe 100644
--- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
@@ -115,7 +115,7 @@ CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
 CONFIG_VGA_BIOS_ID="8086,0406"
 CONFIG_DIMM_MAX=2
-CONFIG_DIMM_SPD_SIZE=256
+CONFIG_DIMM_SPD_SIZE=512
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
index 8d33544d..9eb3bf31 100644
--- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
@@ -115,7 +115,7 @@ CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
 CONFIG_VGA_BIOS_ID="8086,0406"
 CONFIG_DIMM_MAX=2
-CONFIG_DIMM_SPD_SIZE=256
+CONFIG_DIMM_SPD_SIZE=512
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"
diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
index 8714de3e..9bd3bcdd 100644
--- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
@@ -115,7 +115,7 @@ CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
 CONFIG_VGA_BIOS_ID="8086,0406"
 CONFIG_DIMM_MAX=2
-CONFIG_DIMM_SPD_SIZE=256
+CONFIG_DIMM_SPD_SIZE=512
 CONFIG_FMDFILE=""
 # CONFIG_NO_POST is not set
 CONFIG_MAINBOARD_VENDOR="LENOVO"

From 3b6b283eabe7a655c861d1543aeae49d27566f53 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 11 Dec 2024 01:11:08 +0000
Subject: [PATCH 0930/1549] disable 3050micro nvme hotplug

see patch for rationale. this should prevent instability caused
when the nvme randomly replugs under linux. sometimes e.g. nvme0n1
becomes nvme0n2 while the system is running.

in my case, that caused my raid1 to become unsynced every few days.
this issue was fixed on t480 by disabling pcie hotplug for its nvme
device, so the same fix has been applied for dell optiplex 3050 micro.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...-dell-3050micro-disable-nvme-hotplug.patch | 57 +++++++++++++++++++
 1 file changed, 57 insertions(+)
 create mode 100644 config/coreboot/next/patches/0010-dell-3050micro-disable-nvme-hotplug.patch

diff --git a/config/coreboot/next/patches/0010-dell-3050micro-disable-nvme-hotplug.patch b/config/coreboot/next/patches/0010-dell-3050micro-disable-nvme-hotplug.patch
new file mode 100644
index 00000000..0408d114
--- /dev/null
+++ b/config/coreboot/next/patches/0010-dell-3050micro-disable-nvme-hotplug.patch
@@ -0,0 +1,57 @@
+From adfeaeabcf98878814b463f14aba7871721d7606 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 11 Dec 2024 01:06:01 +0000
+Subject: [PATCH 1/1] dell/3050micro: disable nvme hotplug
+
+in my testing, when running my 3050micro for a few days,
+the nvme would sometimes randomly rename.
+
+e.g. nvme0n1 renamed to nvme0n2
+
+this might cause crashes in linux, if booting only from the
+nvme. in my case, i was booting from mdraid (sata+nvme) and
+every few days, the nvme would rename at least once, causing
+my RAID to become unsynced. since i'm using RAID1, this was
+OK and I could simply re-sync the array, but this is quite
+precarious indeed. if you're using raid0, that will potentially
+corrupt your RAID array indefinitely.
+
+this same issue manifested on the T480/T480 thinkpads, and
+S3 resume would break because of that, when booting from nvme,
+because the nvme would be "unplugged" and appear to linux as a
+new device (the one that you booted from).
+
+the fix there was to disable hotplugging on that pci-e slot
+for the nvme, so apply the same fix here for 3050 micro
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ 3rdparty/vboot                                 | 2 +-
+ src/mainboard/dell/optiplex_3050/devicetree.cb | 4 +++-
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/3rdparty/vboot b/3rdparty/vboot
+index f1f70f46dc..902fe8af96 160000
+--- a/3rdparty/vboot
++++ b/3rdparty/vboot
+@@ -1 +1 @@
+-Subproject commit f1f70f46dc5482bb7c654e53ed58d4001e386df2
++Subproject commit 902fe8af96ad662fac127cb8f51596491cf8272f
+diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb
+index 039709aa4a..0678ed1765 100644
+--- a/src/mainboard/dell/optiplex_3050/devicetree.cb
++++ b/src/mainboard/dell/optiplex_3050/devicetree.cb
+@@ -45,7 +45,9 @@ chip soc/intel/skylake
+ 			register "PcieRpAdvancedErrorReporting[20]"     = "1"
+ 			register "PcieRpLtrEnable[20]"                  = "1"
+ 			register "PcieRpClkSrcNumber[20]"               = "3"
+-			register "PcieRpHotPlug[20]"                    = "1"
++# disable hotplug on nvme to prevent renaming e.g. nvme0n1 rename to nvme0n2,
++# which could cause crashes in linux if booting from nvme
++			register "PcieRpHotPlug[20]"                    = "0"
+ 		end
+ 
+ 		# Realtek LAN
+-- 
+2.39.5
+

From dc27cb91784302cba0a2932891ade9abaf76d712 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 13 Dec 2024 06:28:05 +0000
Subject: [PATCH 0931/1549] add some scripts to .gitignore

f/m are scripts i'm gradually working on. easy flash scripts
for lbmk. no promises when/if i push them.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .gitignore | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/.gitignore b/.gitignore
index b6aca3b2..a4dbea58 100644
--- a/.gitignore
+++ b/.gitignore
@@ -37,3 +37,5 @@
 /dump/
 /qrun*.sh
 *.tar.*
+/m
+/f

From 401efb24b2213454732e769531f660605771e538 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 17 Dec 2024 00:57:05 +0000
Subject: [PATCH 0932/1549] use rainbow deer on the grub background

same as on u-boot recently

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../grub/background/background1024x768.png    | Bin 4935 -> 18662 bytes
 .../grub/background/background1280x800.png    | Bin 3451 -> 20038 bytes
 2 files changed, 0 insertions(+), 0 deletions(-)

diff --git a/config/data/grub/background/background1024x768.png b/config/data/grub/background/background1024x768.png
index 181909db09460c745024eba369234750a0d1ad3c..e2ad85faa33e03549c18c472210ea09d96ae41c6 100644
GIT binary patch
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tGq%fC0o`2j@1+$-g6Pi?{m_3AK<dvaSA6ade*gMAf5_I+hIfE{=|5hE)WiS)


From 44969c73bd2d85fd79aa4a431a8169c48375886f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 17 Dec 2024 01:02:03 +0000
Subject: [PATCH 0933/1549] rom.sh: insert grub background in cbfs not memdisk

for some reason, when the background is in memdisk, inserting
it into cbfs afterward doesn't override, despite this
being the behaviour in grub.cfg

put it in cbfs explicitly, and skip inserting into memdisk

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index 2d20a8a7..8d9cdf40 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -44,8 +44,7 @@ mkpayload_grub()
 	    --fonts= --themes= --locales=  --modules="$grub_modules" \
 	    --install-modules="$grub_install_modules" \
 	    "/boot/grub/grub_default.cfg=${srcdir}/.config" \
-	    "/boot/grub/grub.cfg=$grubdata/memdisk.cfg" \
-	    "/background.png=$grubdata/background/background1280x800.png" || \
+	    "/boot/grub/grub.cfg=$grubdata/memdisk.cfg" || \
 	    $err "$tree: cannot build grub.elf"; return 0
 }
 
@@ -165,6 +164,9 @@ add_grub()
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
 	    > "$TMPDIR/tmpcfg" || $err "$target: !insert scandisk"
 	cbfs "$tmprom" "$TMPDIR/tmpcfg" scan.cfg raw
+	[ "$initmode" != "normal" ] && [ "$displaymode" != "txtmode" ] && \
+	    cbfs "$tmprom" "$grubdata/background/background1280x800.png" \
+	    "background.png" raw; :
 }
 
 mkseagrub()

From eafc82028a42a6bfad563c8f071cb2fc7fe40e27 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 17 Dec 2024 12:32:17 +0000
Subject: [PATCH 0934/1549] Revert "use rainbow deer on the grub background"

libreboot has a lot of users worldwide, some of whom live in
countries that punish being gay; if they look at libreboot or
boot it and it has the pride colours on it, it could actually
get them in trouble.

this fact occured to me, and i've decided therefore to revert
back to the boring plain logo.

though, perhaps we could actually properly design a new logo?
a new, modern logo, and a nicer website.

we'll see!

This reverts commit 401efb24b2213454732e769531f660605771e538.
---
 .../grub/background/background1024x768.png    | Bin 18662 -> 4935 bytes
 .../grub/background/background1280x800.png    | Bin 20038 -> 3451 bytes
 2 files changed, 0 insertions(+), 0 deletions(-)

diff --git a/config/data/grub/background/background1024x768.png b/config/data/grub/background/background1024x768.png
index e2ad85faa33e03549c18c472210ea09d96ae41c6..181909db09460c745024eba369234750a0d1ad3c 100644
GIT binary patch
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From 36b42dd1c116a1e28a7b20c740d69aff7f0ce492 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 17 Dec 2024 13:02:37 +0000
Subject: [PATCH 0935/1549] also de-rainbow the u-boot menu

boring is good

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...logo-back-to-the-plain-libreboot-one.patch | 157 ++++++++++++++++++
 ...logo-back-to-the-plain-libreboot-one.patch | 157 ++++++++++++++++++
 ...logo-back-to-the-plain-libreboot-one.patch | 157 ++++++++++++++++++
 3 files changed, 471 insertions(+)
 create mode 100644 config/u-boot/default/patches/0008-change-the-logo-back-to-the-plain-libreboot-one.patch
 create mode 100644 config/u-boot/x86/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch
 create mode 100644 config/u-boot/x86_64/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch

diff --git a/config/u-boot/default/patches/0008-change-the-logo-back-to-the-plain-libreboot-one.patch b/config/u-boot/default/patches/0008-change-the-logo-back-to-the-plain-libreboot-one.patch
new file mode 100644
index 00000000..febc2372
--- /dev/null
+++ b/config/u-boot/default/patches/0008-change-the-logo-back-to-the-plain-libreboot-one.patch
@@ -0,0 +1,157 @@
+From d721edb391618fca096ec7f63a2fbc9df0af9231 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 17 Dec 2024 12:59:54 +0000
+Subject: [PATCH 1/1] change the logo back to the plain libreboot one
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ drivers/video/u_boot_logo.bmp | Bin 27350 -> 27350 bytes
+ 1 file changed, 0 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/video/u_boot_logo.bmp b/drivers/video/u_boot_logo.bmp
+index bc9ae001badb25bc900058c167a47247ef91dc7c..c9262cd206cc3cf5297daa94b696fcf102fc22b5 100644
+GIT binary patch
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+
+-- 
+2.39.5
+
diff --git a/config/u-boot/x86/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch b/config/u-boot/x86/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch
new file mode 100644
index 00000000..febc2372
--- /dev/null
+++ b/config/u-boot/x86/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch
@@ -0,0 +1,157 @@
+From d721edb391618fca096ec7f63a2fbc9df0af9231 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 17 Dec 2024 12:59:54 +0000
+Subject: [PATCH 1/1] change the logo back to the plain libreboot one
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ drivers/video/u_boot_logo.bmp | Bin 27350 -> 27350 bytes
+ 1 file changed, 0 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/video/u_boot_logo.bmp b/drivers/video/u_boot_logo.bmp
+index bc9ae001badb25bc900058c167a47247ef91dc7c..c9262cd206cc3cf5297daa94b696fcf102fc22b5 100644
+GIT binary patch
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+
+-- 
+2.39.5
+
diff --git a/config/u-boot/x86_64/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch b/config/u-boot/x86_64/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch
new file mode 100644
index 00000000..febc2372
--- /dev/null
+++ b/config/u-boot/x86_64/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch
@@ -0,0 +1,157 @@
+From d721edb391618fca096ec7f63a2fbc9df0af9231 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 17 Dec 2024 12:59:54 +0000
+Subject: [PATCH 1/1] change the logo back to the plain libreboot one
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ drivers/video/u_boot_logo.bmp | Bin 27350 -> 27350 bytes
+ 1 file changed, 0 insertions(+), 0 deletions(-)
+
+diff --git a/drivers/video/u_boot_logo.bmp b/drivers/video/u_boot_logo.bmp
+index bc9ae001badb25bc900058c167a47247ef91dc7c..c9262cd206cc3cf5297daa94b696fcf102fc22b5 100644
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+zYT8b_DIU)?*iuLN*q`p<{XD%6!#nrjo!jw_3cMqeKB65|Cf-kM0~~|q)V6L*(mb(A
+z7m$v>Z}#VxFaLKY7E{j>{j=fa%YS_L^5s9TW3Bv8L{Dm*@Bio;(ZauBdxLXZ^i})<
+z?=aEBUgx&*Z-_d+!UXY;JIiXz#C7<$o%$_Xi2kRAC~z(Q%FKV^NB*UXZrI2B>BjFd
+h=Y>|w|C6Zk68;X)R-AjChtJK+<qqA3JjSNqzW{|XuQ>n!
+
+-- 
+2.39.5
+

From 9884e5ed1b0b6e5be00cd5cd7fd52454518e8dad Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 18 Dec 2024 02:20:08 +0000
Subject: [PATCH 0936/1549] T480/T480S: Support fetching ThunderBolt firmware

Though not used in coreboot builds, and not injected into the
builds in any way, these files are now created seperately when
handling T480/T480s vendor files:

vendorfiles/t480/tb.bin
vendorfiles/t480s/tb.bin

These are created by extracting Lenovo's ThunderBolt firmware
from update files. The updated firmware fixes a bug; older firmware
enabled debug commands that wrote logs to the TB controller's
own flash IC, and it'd get full up with logs, bricking the controller.
If you've already been screwed by this, you must flash externally,
using a padded firmware from Lenovo's updates.

Lenovo's own updater requires creating a boot CD or booting
Windows. This patch in lbmk auto-downloads just the firmware,
and you can flash it externally.

You could simply do this as a matter of course, when installing
Libreboot. You are recommended to update the Lenovo UEFI/EC firmwares
first, before installing Libreboot; please look at the Libreboot
documentation to know exactly which versions.

Then dump the ThunderBolt firmware first, to be sure, and then you
can flash these files. Flashing these updates will prevent the bug
described here:

https://pcsupport.lenovo.com/us/en/products/laptops-and-netbooks/thinkpad-t-series-laptops/thinkpad-t480-type-20l5-20l6/20l5/solutions/ht508988

You can download Lenovo's installers for various ThinkPad models
there, including T480s/T480s. It is these downloads that this lbmk
patch uses, to extract those files directly.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...config-option-CONFIG_LENOVO_TBFW_BIN.patch | 78 +++++++++++++++++++
 .../config/libgfxinit_corebootfb              |  1 +
 .../t480_fsp_16mb/config/libgfxinit_txtmode   |  1 +
 .../config/libgfxinit_corebootfb              |  1 +
 .../t480s_fsp_16mb/config/libgfxinit_txtmode  |  1 +
 config/vendor/t480/pkg.cfg                    |  9 +++
 config/vendor/t480s/pkg.cfg                   |  8 ++
 include/vendor.sh                             | 32 +++++++-
 8 files changed, 127 insertions(+), 4 deletions(-)
 create mode 100644 config/coreboot/next/patches/0011-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch

diff --git a/config/coreboot/next/patches/0011-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch b/config/coreboot/next/patches/0011-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch
new file mode 100644
index 00000000..542b6608
--- /dev/null
+++ b/config/coreboot/next/patches/0011-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch
@@ -0,0 +1,78 @@
+From 91c7d772f4803a94950b3224ccd11ffd162b4e36 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 18 Dec 2024 02:06:18 +0000
+Subject: [PATCH 1/1] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN
+
+This is used by lbmk to know where a tb.bin file goes,
+when extracting and padding TBT.bin from Lenovo ThunderBolt
+firmware updates on T480/T480s and other machines, grabbing
+Lenovo update files.
+
+Not used in any builds, so it's not relevant for ./mk inject
+
+However, the ThunderBolt firmware is now auto-downloaded on
+T480/T480s. This is not inserted, because it doesn't go in
+the main flash, but the resulting ROM image can be flashed
+on the TB controller's separate flash chip.
+
+Locations are as follows:
+
+vendorfiles/t480s/tb.bin
+vendorfiles/t480/tb.bin
+
+This can be used for other affected ThinkPads when they're
+added to Libreboot, but note that Lenovo provides different
+TB firmware files for each machine.
+
+Since I assume it's the same TB controller on all of those
+machines, I have to wonder: what difference is there between
+the various TBT.bin files provided by Lenovo, and how do they
+differ in terms of actual flashed configuration?
+
+We simply flash the padded TBT.bin when updating the firmware,
+flashing externally. That's what this patch is for, so that
+lbmk can auto-download them.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/lenovo/Kconfig | 26 ++++++++++++++++++++++++++
+ 1 file changed, 26 insertions(+)
+
+diff --git a/src/mainboard/lenovo/Kconfig b/src/mainboard/lenovo/Kconfig
+index 2ffbaab85f..512b326381 100644
+--- a/src/mainboard/lenovo/Kconfig
++++ b/src/mainboard/lenovo/Kconfig
+@@ -18,4 +18,30 @@ config MAINBOARD_FAMILY
+ 	string
+ 	default MAINBOARD_PART_NUMBER
+ 
++config LENOVO_TBFW_BIN
++	string "Lenovo ThunderBolt firmware bin file"
++	default ""
++	help
++	  ThunderBolt firmware for certain ThinkPad models e.g. T480.
++	  Not used in the actual build. Libreboot's build system uses this
++	  along with config/vendor/*/pkg.cfg entries defining a URL to the
++	  Lenovo download link and hash. The resulting file when processed by
++	  lbmk can be flashed to the ThunderBolt firmware's 25XX NOR device.
++	  Earlier versions of this firmware had debug commands enabled that
++	  sent logs to said flash IC, and it would quickly fill up, bricking
++	  the ThunderBolt controller. With these updates, flashed externally,
++	  you can fix the issue if present or otherwise prevent it. The benefit
++	  here is that you then don't need to use Windows or a boot disk. You
++	  can flash the TB firmware while flashing Libreboot firmware. Easy!
++	  Look for these variables in lbmk:
++	  TBFW_url TBFW_url_bkup TBFW_hash and look at how it handles that and
++	  CONFIG_LENOVO_TBFW_BIN, in lbmk's include/vendor.sh file.
++	  The path set by CONFIG_LENOVO_TBFW_BIN is used by lbmk when extracting
++	  the firmware, putting it at that desired location. In this way, lbmk
++	  can auto-download such firmware. E.g. ./mk -d coreboot t480_fsp_16mb
++	  and it appears at vendorfiles/t480/tb.bin fully padded and everything!
++
++	  Just leave this blank if you don't care about this option. It's not
++	  useful for every ThinkPad, only certain models.
++
+ endif # VENDOR_LENOVO
+-- 
+2.39.5
+
diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
index 769d53eb..c4550f1d 100644
--- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
@@ -218,6 +218,7 @@ CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
+CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin"
 # CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
 CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
index e21749fe..83a8ecd6 100644
--- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
@@ -216,6 +216,7 @@ CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
+CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin"
 # CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
 CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
index 9eb3bf31..2e29a0a7 100644
--- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
@@ -218,6 +218,7 @@ CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
+CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin"
 # CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
 CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
index 9bd3bcdd..84ac6177 100644
--- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
@@ -216,6 +216,7 @@ CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
+CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin"
 # CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
 CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
diff --git a/config/vendor/t480/pkg.cfg b/config/vendor/t480/pkg.cfg
index 0088b2b5..59280a8a 100644
--- a/config/vendor/t480/pkg.cfg
+++ b/config/vendor/t480/pkg.cfg
@@ -1,3 +1,4 @@
+# ME firmware (deguard will be used)
 DL_hash="df735a24242792bf4150f30bf0bd4fdbdc0fb6bf0f897ea533df32567be8e084006d692fb6351677f8cc976878c5018667901dbd407b0a77805754f7c101497c"
 DL_url="https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
 DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
@@ -8,3 +9,11 @@ ME11delta="thinkpad_t480" # subdirectory under deguard's data/delta/
 ME11version="11.6.0.1126"
 ME11sku="2M"
 ME11pch="LP"
+
+# ThunderBolt firmware
+# (flashed on the 1MB chip, not main 16MB; not used by coreboot)
+# (padded firmware will appear at vendorfiles/t480/tb.bin)
+# 
+TBFW_url="https://download.lenovo.com/pccbbs/mobiles/n24th13w.exe"
+TBFW_url_bkup="https://web.archive.org/web/20241004165955/https://download.lenovo.com/pccbbs/mobiles/n24th13w.exe"
+TBFW_hash="906d916e8ae77e6d146c67c3113cd904e735a7f28cb2fc37e2284758ead5cda8dd4025c1c741fac9162b1eb01cff08fc39a0d4e79c5cec0515f1d3e6447d1323"
diff --git a/config/vendor/t480s/pkg.cfg b/config/vendor/t480s/pkg.cfg
index 67f000da..bbe2c5e9 100644
--- a/config/vendor/t480s/pkg.cfg
+++ b/config/vendor/t480s/pkg.cfg
@@ -8,3 +8,11 @@ ME11delta="thinkpad_t480s" # subdirectory under deguard's data/delta/
 ME11version="11.6.0.1126"
 ME11sku="2M"
 ME11pch="LP"
+
+# ThunderBolt firmware
+# (flashed on the 1MB chip, not main 16MB; not used by coreboot)
+# (padded firmware will appear at vendorfiles/t480s/tb.bin)
+# 
+TBFW_url="https://download.lenovo.com/pccbbs/mobiles/n22th11w.exe"
+TBFW_url_bkup="https://web.archive.org/web/20230319003752/https://download.lenovo.com/pccbbs/mobiles/n22th11w.exe"
+TBFW_hash="ef8ec0a41d7faaa0ce514cfb6f8e7e10669c878eff69fbe1b821443b6218f5b31e1b910c8abceecf38d4b11a6e552d90f277c96c7a9c512d605c8b8aea9c1c0c"
diff --git a/include/vendor.sh b/include/vendor.sh
index 3f78c368..b1f47d6d 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -16,7 +16,8 @@ cv="CONFIG_HAVE_ME_BIN CONFIG_ME_BIN_PATH CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \
     CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2_OFFSET \
     CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_BOARD_DELL_E6400 \
     CONFIG_HAVE_MRC CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB \
-    CONFIG_REFCODE_BLOB_FILE CONFIG_GBE_BIN_PATH CONFIG_IFD_BIN_PATH"
+    CONFIG_REFCODE_BLOB_FILE CONFIG_GBE_BIN_PATH CONFIG_IFD_BIN_PATH \
+    CONFIG_LENOVO_TBFW_BIN"
 
 eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
@@ -24,7 +25,8 @@ eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl SCH5545EC_DL_url \
     archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref vrelease \
     verify _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch \
-    IFD_platform ifdprefix cdir sdir _me _metmp mfs $cv`
+    IFD_platform ifdprefix cdir sdir _me _metmp mfs TBFW_url_bkup TBFW_url \
+    TBFW_hash $cv`
 
 vendor_download()
 {
@@ -52,7 +54,8 @@ readkconfig()
 	eval `setcfg "$TMPDIR/tmpcbcfg"`
 
 	for c in CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
-	    CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW; do
+	    CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \
+	    CONFIG_LENOVO_TBFW_BIN; do
 		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
 		eval "[ -z \"\${$c}\" ] && continue"
 		eval `setcfg "config/vendor/$vcfg/pkg.cfg"`; return 0
@@ -82,7 +85,9 @@ getfiles()
 	[ -z "$CONFIG_VGA_BIOS_FILE" ] || fetch e6400vga "$E6400_VGA_DL_url" \
 	  "$E6400_VGA_DL_url_bkup" "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
 	[ -z "$CONFIG_HAVE_MRC" ] || fetch "mrc" "$MRC_url" "$MRC_url_bkup" \
-	    "$MRC_hash" "$CONFIG_MRC_FILE"; return 0
+	    "$MRC_hash" "$CONFIG_MRC_FILE"
+	[ -z "$CONFIG_LENOVO_TBFW_BIN" ] || fetch "tbfw" "$TBFW_url" \
+	    "$TBFW_url_bkup" "$TBFW_hash" "$CONFIG_LENOVO_TBFW_BIN"; return 0
 }
 
 fetch()
@@ -231,6 +236,25 @@ extract_sch5545ec()
 	cp "$_sch5545ec_fw" "$_dest" || $err "$_dest: !sch5545 copy"
 }
 
+# Lenovo ThunderBolt firmware updates:
+# https://pcsupport.lenovo.com/us/en/products/laptops-and-netbooks/thinkpad-t-series-laptops/thinkpad-t480-type-20l5-20l6/20l5/solutions/ht508988
+extract_tbfw()
+{
+	x_ mkdir -p tmp
+	find "$appdir" -type f -name "TBT.bin" > "tmp/tb.txt" || \
+	    $err "extract_tbfw $_dest: Can't extract TBT.bin"
+	while read -r f; do
+		[ -f "$f" ] || continue
+		[ -L "$f" ] && continue
+		cp "$f" "tmp/tb.bin" || \
+		    $err "extract_tbfw $_dest: Can't copy TBT.bin"
+		break
+	done < "tmp/tb.txt"
+	dd if=/dev/null of=tmp/tb.bin bs=1 seek=1048576 || \
+	    $err "extract_tbfw $_dest: Can't pad TBT.bin"
+	cp "tmp/tb.bin" "$_dest" || $err "extract_tbfw $_dest: copy error"; :
+}
+
 vendor_inject()
 {
 	set +u +e; [ $# -lt 1 ] && $err "No options specified."

From 02cbf8a729dd08be8a212695a9fcf93f05a8cec9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 18 Dec 2024 03:42:45 +0000
Subject: [PATCH 0937/1549] vendor.sh: make TBFW pad size configurable

we encountered 1MB flash so far, but we may encounter other
sizes on other machines when added to libreboot later on

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/vendor/t480/pkg.cfg  | 1 +
 config/vendor/t480s/pkg.cfg | 1 +
 include/vendor.sh           | 5 +++--
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/config/vendor/t480/pkg.cfg b/config/vendor/t480/pkg.cfg
index 59280a8a..d692821d 100644
--- a/config/vendor/t480/pkg.cfg
+++ b/config/vendor/t480/pkg.cfg
@@ -17,3 +17,4 @@ ME11pch="LP"
 TBFW_url="https://download.lenovo.com/pccbbs/mobiles/n24th13w.exe"
 TBFW_url_bkup="https://web.archive.org/web/20241004165955/https://download.lenovo.com/pccbbs/mobiles/n24th13w.exe"
 TBFW_hash="906d916e8ae77e6d146c67c3113cd904e735a7f28cb2fc37e2284758ead5cda8dd4025c1c741fac9162b1eb01cff08fc39a0d4e79c5cec0515f1d3e6447d1323"
+TBFW_size=1048576 # size in bytes, when padding, matching TBFW's flash IC
diff --git a/config/vendor/t480s/pkg.cfg b/config/vendor/t480s/pkg.cfg
index bbe2c5e9..e88b2f00 100644
--- a/config/vendor/t480s/pkg.cfg
+++ b/config/vendor/t480s/pkg.cfg
@@ -16,3 +16,4 @@ ME11pch="LP"
 TBFW_url="https://download.lenovo.com/pccbbs/mobiles/n22th11w.exe"
 TBFW_url_bkup="https://web.archive.org/web/20230319003752/https://download.lenovo.com/pccbbs/mobiles/n22th11w.exe"
 TBFW_hash="ef8ec0a41d7faaa0ce514cfb6f8e7e10669c878eff69fbe1b821443b6218f5b31e1b910c8abceecf38d4b11a6e552d90f277c96c7a9c512d605c8b8aea9c1c0c"
+TBFW_size=1048576 # size in bytes, when padding, matching TBFW's flash IC
diff --git a/include/vendor.sh b/include/vendor.sh
index b1f47d6d..bd06af25 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -26,7 +26,7 @@ eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref vrelease \
     verify _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch \
     IFD_platform ifdprefix cdir sdir _me _metmp mfs TBFW_url_bkup TBFW_url \
-    TBFW_hash $cv`
+    TBFW_hash TBFW_size $cv`
 
 vendor_download()
 {
@@ -240,6 +240,7 @@ extract_sch5545ec()
 # https://pcsupport.lenovo.com/us/en/products/laptops-and-netbooks/thinkpad-t-series-laptops/thinkpad-t480-type-20l5-20l6/20l5/solutions/ht508988
 extract_tbfw()
 {
+	chkvars TBFW_size # size in bytes, matching TBFW's flash IC
 	x_ mkdir -p tmp
 	find "$appdir" -type f -name "TBT.bin" > "tmp/tb.txt" || \
 	    $err "extract_tbfw $_dest: Can't extract TBT.bin"
@@ -250,7 +251,7 @@ extract_tbfw()
 		    $err "extract_tbfw $_dest: Can't copy TBT.bin"
 		break
 	done < "tmp/tb.txt"
-	dd if=/dev/null of=tmp/tb.bin bs=1 seek=1048576 || \
+	dd if=/dev/null of=tmp/tb.bin bs=1 seek=$TBFW_size || \
 	    $err "extract_tbfw $_dest: Can't pad TBT.bin"
 	cp "tmp/tb.bin" "$_dest" || $err "extract_tbfw $_dest: copy error"; :
 }

From f7801ef4770c7ffc51cf1db40d0a2021a2a6273a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 18 Dec 2024 03:49:58 +0000
Subject: [PATCH 0938/1549] vendor.sh: delete old tb.bin first, just in case

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/vendor.sh b/include/vendor.sh
index bd06af25..165b9a96 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -242,6 +242,7 @@ extract_tbfw()
 {
 	chkvars TBFW_size # size in bytes, matching TBFW's flash IC
 	x_ mkdir -p tmp
+	x_ rm -f tmp/tb.bin
 	find "$appdir" -type f -name "TBT.bin" > "tmp/tb.txt" || \
 	    $err "extract_tbfw $_dest: Can't extract TBT.bin"
 	while read -r f; do

From 1dd32ea548739c7e1daf0283697189b44e71d7c6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 18 Dec 2024 06:49:08 +0000
Subject: [PATCH 0939/1549] rom.sh: support grub-first setups

in this setup, seabios is never the default payload, grub is,
but only if grub is enabled.

set this in target.cfg:

payload_grubsea="y"

if payload_grub isn't enabled, this is auto-set to n

ditto if initmode=normal

NOTE: if flashing libgfx setups, you should make sure
that you're not booting with a graphics card, only intel
graphics. this setting will intentionally not be documented,
because it's not recommended, but is being implemented for
testing purposes (and i implemented it for some guy who i
think is cool). i'll probably also use this myself, since
i already do grub-only setups on all my own machines.

seagrub is the default on x86 because of past instabilities
with grub. to mitigate in case of future issues, since seabios
is always stable, we reduce the chance of bricks.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/coreboot/mkhelper.cfg |  2 +-
 include/rom.sh                    | 23 ++++++++++++++++++-----
 2 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index a218e0e7..a344674c 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -6,7 +6,7 @@ build_depend="seabios/default grub/default memtest86plus u-boot/amd64coreboot"
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 
 pv="payload_uboot payload_seabios payload_memtest payload_grub"
-pv="$pv payload_uboot_i386 payload_uboot_amd64"
+pv="$pv payload_uboot_i386 payload_uboot_amd64 payload_grubsea"
 v="initmode ubootelf grub_scan_disk uboot_config grubtree grubelf pname"
 v="$v displaymode tmprom newrom"
 eval `setvars "n" $pv`
diff --git a/include/rom.sh b/include/rom.sh
index 8d9cdf40..f21b6302 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -120,6 +120,10 @@ mkcorebootbin()
 	[ "$payload_memtest" = "y" ] || payload_memtest="n"
 	[ "$(uname -m)" = "x86_64" ] || payload_memtest="n"
 
+	[ "$payload_grubsea" = "y" ] && [ "$initmode" = "normal" ] && \
+	    payload_grubsea="n"
+	[ "$payload_grub" = "y" ] || payload_grubsea="n"
+
 	if $dry grep "CONFIG_PAYLOAD_NONE=y" "$defconfig"; then
 		[ "$payload_seabios" = "y" ] && pname="seabios" && \
 		    $dry add_seabios
@@ -138,7 +142,9 @@ add_seabios()
 
 	_seabioself="elf/seabios/default/$initmode/bios.bin.elf"
 
-	cbfs "$tmprom" "$_seabioself" "fallback/payload"
+	_seaname="fallback/payload" && [ "$payload_grubsea" = "y" ] && \
+	    _seaname="seabios.elf"
+	cbfs "$tmprom" "$_seabioself" "$_seaname"
 	x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
 
 	_z="2"; [ "$initmode" = "vgarom" ] && _z="0"
@@ -152,15 +158,18 @@ add_seabios()
 
 	[ "$payload_grub" = "y" ] && add_grub
 
-	cprom
+	[ "$payload_grubsea" != "y" ] && cprom
 	[ "$payload_uboot_amd64" = "y" ] && [ "$displaymode" != "txtmode" ] && \
-	    [ "$initmode" != "normal" ] && pname="seauboot" && cprom "seauboot"
+	    [ "$initmode" != "normal" ] && [ "$payload_grubsea" != "y" ] && \
+	    pname="seauboot" && cprom "seauboot"
 	[ "$payload_grub" = "y" ] && pname="seagrub" && mkseagrub; :
 }
 
 add_grub()
 {
-	cbfs "$tmprom" "$grubelf" "img/grub2"
+	_grubname="img/grub2" && [ "$payload_grubsea" = "y" ] && \
+	    _grubname="fallback/payload"
+	cbfs "$tmprom" "$grubelf" "$_grubname"
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
 	    > "$TMPDIR/tmpcfg" || $err "$target: !insert scandisk"
 	cbfs "$tmprom" "$TMPDIR/tmpcfg" scan.cfg raw
@@ -171,7 +180,11 @@ add_grub()
 
 mkseagrub()
 {
-	cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
+	if [ "$payload_grubsea" = "y" ]; then
+		pname="grub"
+	else
+		cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
+	fi
 	for keymap in config/data/grub/keymap/*.gkb; do
 		[ -f "$keymap" ] && cprom "${keymap##*/}"; :
 	done; :

From a8b35c88cf132aab6704c3babbc109de4f7cc520 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 22 Dec 2024 23:13:43 +0000
Subject: [PATCH 0940/1549] remove geteltorito and mtools from lbmk

we needed these for extracting intel vga roms from
lenovoo updates, for t480, very briefly. about an hour
after i pushed that patch, mate kukri fixed libgfxinit
and then i removed the vgarom integration because it
wasn't needed anymore.

however, i forgot to remove geteltorito/mtools from
dependencies. some distros like fedora were problematic
about it.

the best thing about bugs is when you don't have to fix them.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .gitignore                   | 2 ++
 config/dependencies/fedora38 | 2 +-
 config/dependencies/fedora40 | 2 +-
 config/dependencies/fedora41 | 2 +-
 config/dependencies/parabola | 4 ++--
 config/dependencies/void     | 2 +-
 include/vendor.sh            | 3 +--
 7 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/.gitignore b/.gitignore
index a4dbea58..28671db8 100644
--- a/.gitignore
+++ b/.gitignore
@@ -39,3 +39,5 @@
 *.tar.*
 /m
 /f
+/r
+/e
diff --git a/config/dependencies/fedora38 b/config/dependencies/fedora38
index dbd79329..8f672205 100755
--- a/config/dependencies/fedora38
+++ b/config/dependencies/fedora38
@@ -8,5 +8,5 @@ innoextract intltool libftdi-devel libselinux-devel libusb1 libusb1-devel \
 nasm ncurses-devel openssl-devel p7zip p7zip-plugins pandoc parted \
 pciutils-devel perl perl-libwww-perl python-unversioned-command python3 \
 python3-setuptools rsync sharutils subversion texinfo unar unifont \
-unifont-fonts unifont-ttf-fonts unzip wget xz zlib-devel ccache swig geteltorito mtools \
+unifont-fonts unifont-ttf-fonts unzip wget xz zlib-devel ccache swig \
 "
diff --git a/config/dependencies/fedora40 b/config/dependencies/fedora40
index 32526752..6836b57b 100755
--- a/config/dependencies/fedora40
+++ b/config/dependencies/fedora40
@@ -9,5 +9,5 @@ libselinux-devel libusb1 libusb1-devel nasm ncurses-devel openssl-devel \
 p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \
 python-unversioned-command python3 python3-setuptools rsync sharutils \
 subversion systemd-devel texinfo unar unifont unifont-fonts \
-unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel geteltorito mtools \
+unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel \
 "
diff --git a/config/dependencies/fedora41 b/config/dependencies/fedora41
index e051c665..0650ba8e 100755
--- a/config/dependencies/fedora41
+++ b/config/dependencies/fedora41
@@ -9,5 +9,5 @@ libselinux-devel libusb1 libusb1-devel nasm ncurses-devel openssl-devel openssl-
 p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \
 python-unversioned-command python3 python3-setuptools rsync sharutils \
 subversion systemd-devel texinfo unar unifont unifont-fonts \
-unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel mtools geteltorito mtools \
+unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel \
 "
diff --git a/config/dependencies/parabola b/config/dependencies/parabola
index d62caf21..f598e491 100644
--- a/config/dependencies/parabola
+++ b/config/dependencies/parabola
@@ -7,7 +7,7 @@ help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \
 ncurses openssl p7zip \
 pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
 sharutils subversion swig texinfo ttf-dejavu unarchiver unifont-utils unzip \
-wget xz zlib ccache mtools \
+wget xz zlib ccache \
 "
 
-aur_notice="cross-mipsel-linux-gnu-binutils cross-mipsel-linux-gnu-gcc geteltorito"
+aur_notice="cross-mipsel-linux-gnu-binutils cross-mipsel-linux-gnu-gcc"
diff --git a/config/dependencies/void b/config/dependencies/void
index 44a5676b..5eb65d14 100644
--- a/config/dependencies/void
+++ b/config/dependencies/void
@@ -8,5 +8,5 @@ freetype freetype-devel fuse gawk gcc-ada gdb gettext gettext-devel git \
 help2man innoextract libftdi1 libpciaccess libusb nasm ncurses \
 ncurses-devel openssl openssl-devel p7zip parted pciutils perl perl-LWP \
 python python3 python3-setuptools rsync sharutils subversion texinfo \
-unar unzip wget xz zlib ccache geteltorito mtools
+unar unzip wget xz zlib ccache \
 "
diff --git a/include/vendor.sh b/include/vendor.sh
index 165b9a96..570048e2 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -181,8 +181,7 @@ apply_me11_deguard_mod()
 
 extract_archive()
 {
-	geteltorito "$1" > "$2/vendor.img" || \
-	    innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
+	innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
 	    "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
 
 	[ ! -d "${_dl}_extracted" ] || cp -R "${_dl}_extracted" "$2" || \

From ee8f53b96ff8bf756af1143ed0c0163a0650774c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 24 Dec 2024 12:37:33 +0000
Subject: [PATCH 0941/1549] lib.sh: Safer exit from ./mk dependencies

The exit was dependent upon install_packages returning
zero status, which it always would in practise, due to
its design, but this exit must always be observed, so
the code has been modified to honour this design.

A direct exit violates lbmk's design in most instances,
where a temporary directory and lock file has already
been created; at this stage, no such act was performed,
so a direct exit is perfectly acceptable.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index e439ef8b..c765f6b8 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -69,7 +69,10 @@ install_packages()
 	[ -n "$aur_notice" ] && \
 	printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; return 0
 }
-[ $# -gt 0 ] && [ "$1" = "dependencies" ] && install_packages $@ && exit 0
+if [ $# -gt 0 ] && [ "$1" = "dependencies" ]; then
+	install_packages $@ || exit 1
+	exit 0
+fi
 
 id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
 [ "$(id -u)" != "0" ] || $err "this command as root is not permitted"

From a18175a5df960e0098945e8be0f3f7fd275c07a1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 24 Dec 2024 12:40:53 +0000
Subject: [PATCH 0942/1549] data/deguard: Remove unused patch

The appdir.patch file was used on the older deguard
version, prior to Mate Kukri's rewrite. This patch is
no longer required, and no longer used, so it can be
removed safely from lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/deguard/appdir.patch | 131 -------------------------------
 1 file changed, 131 deletions(-)
 delete mode 100644 config/data/deguard/appdir.patch

diff --git a/config/data/deguard/appdir.patch b/config/data/deguard/appdir.patch
deleted file mode 100644
index 722a6168..00000000
--- a/config/data/deguard/appdir.patch
+++ /dev/null
@@ -1,131 +0,0 @@
-From b978cbb651a4bdd84be4a92ae240c8ca99ef21eb Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Tue, 24 Sep 2024 16:44:51 +0100
-Subject: [PATCH 1/1] Patch to integrate with lbmk
-
-Deguard is a standalone utility, but the way it works
-doesn't integrate well with lbmk.
-
-Remove the download logic, because lbmk already downloads
-the requisite zip file.
-
-Also not required, but nice, and included in this patch:
-
-Detect what python version is available, and make sure it's
-python 3.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- RUNME.sh | 64 +++++++++++++++++++++++++++++++-------------------------
- 1 file changed, 36 insertions(+), 28 deletions(-)
-
-diff --git a/RUNME.sh b/RUNME.sh
-index 9809f89..7404ba6 100755
---- a/RUNME.sh
-+++ b/RUNME.sh
-@@ -1,25 +1,33 @@
- #!/bin/sh
- # SPDX-License-Identifier: GPL-2.0-only
- 
-+# This version of deguard is patched to integrate with lbmk.
-+# Do not run this version standalone. Please use src/deguard/ instead.
-+
- set -e
- 
--if [ ! -f "me.bin" ]; then
--	wget "https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip"
--	unzip "H110M-DGS(7.30)ROM.zip" H11MDGS7.30
--	rm "H110M-DGS(7.30)ROM.zip"
--	dd if=H11MDGS7.30 of=me.bin skip=1 count=511 bs=4096
--	rm H11MDGS7.30
-+pyver="2"
-+python="python3"
-+which python3 || python="python"
-+which $python || pyver=""
-+[ -n "$pyver" ] && pyver="$($python --version | awk '{print $2}')"
-+if [ "${pyver%%.*}" != "3" ]; then
-+	printf "Wrong python version, or python missing. Must be python 3.\n" 1>&2
-+	exit 1
- fi
- 
-+rm -f me.bin MFS.part
-+dd if=../H11MDGS7.30 of=me.bin skip=1 count=511 bs=4096
-+
- dd if=me.bin of=MFS.part skip=168 count=100 bs=4096
- 
- # Extract file number 7 (fitc.cfg)
--python3 MFSUtil.py -m MFS.part -x -i 7 -o fitc.cfg
-+$python MFSUtil.py -m MFS.part -x -i 7 -o fitc.cfg
- 
- # Remove /home/mca/eom
--python3 MFSUtil.py -c fitc.cfg -r -f /home/mca/eom -o fitc.cfg
-+$python MFSUtil.py -c fitc.cfg -r -f /home/mca/eom -o fitc.cfg
- # Remove /home/bup/ct
--python3 MFSUtil.py -c fitc.cfg -r -f /home/bup/ct -o fitc.cfg
-+$python MFSUtil.py -c fitc.cfg -r -f /home/bup/ct -o fitc.cfg
- 
- # list off files differing in optiplex 3050 fw vs donor
- files="
-@@ -39,40 +47,40 @@ secureboot/pubkeyhash
- 
- for i in $files
- do
--	python3 MFSUtil.py -c fitc.cfg -r -f /home/$i -o fitc.cfg
-+	$python MFSUtil.py -c fitc.cfg -r -f /home/$i -o fitc.cfg
- done
- 
- # Add /home/mca/eom
- dd if=/dev/zero of=eom count=1 bs=1
--python3 MFSUtil.py -c fitc.cfg --add eom --alignment 2 --mode ' --Irw-r-----' \
-+$python MFSUtil.py -c fitc.cfg --add eom --alignment 2 --mode ' --Irw-r-----' \
- 	--opt '?!-F' --uid 0 --gid 238 -f /home/mca/eom -o fitc.cfg
- 
- # Add /home/bup/ct
--python3 gen_shellcode.py -p H -v 11.6.0.1126 --fake-fpfs=fpfs/optiplex_3050 -o ct
--python3 MFSUtil.py -c fitc.cfg --add ct  --alignment 2 --mode ' ---rwxr-----' \
-+$python gen_shellcode.py -p H -v 11.6.0.1126 --fake-fpfs=fpfs/optiplex_3050 -o ct
-+$python MFSUtil.py -c fitc.cfg --add ct  --alignment 2 --mode ' ---rwxr-----' \
- 	--opt '?--F' --uid 3 --gid 351 -f /home/bup/ct -o fitc.cfg
- 
- # Add dell files
--python3 MFSUtil.py -c fitc.cfg --add data/emu_fuse_map --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=3  --gid=238 -f /home/bup/bup_sku/emu_fuse_map -o fitc.cfg
--python3 MFSUtil.py -c fitc.cfg --add data/plat_n_sku   --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=3  --gid=238 -f /home/bup/bup_sku/plat_n_sku -o fitc.cfg
--python3 MFSUtil.py -c fitc.cfg --add data/fwuoemid     --alignment 2 --mode=' ---rw-rw----' --opt='?--F' --uid=32 --gid=238 -f /home/fwupdate/fwuoemid -o fitc.cfg
--python3 MFSUtil.py -c fitc.cfg --add data/prof0        --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=55 --gid=238 -f /home/icc/prof0 -o fitc.cfg
--python3 MFSUtil.py -c fitc.cfg --add data/device_ports --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=73 --gid=238 -f /home/mctp/device_ports -o fitc.cfg
--python3 MFSUtil.py -c fitc.cfg --add data/hdcp_ports   --alignment 2 --mode=' -EIrw-r-----' --opt='?!-F' --uid=80 --gid=238 -f /home/pavp/hdcp_ports -o fitc.cfg
--python3 MFSUtil.py -c fitc.cfg --add data/cfg_rules    --alignment 2 --mode=' ---rw-rw----' --opt='-!MF' --uid=85 --gid=238 -f /home/policy/cfgmgr/cfg_rules -o fitc.cfg
--python3 MFSUtil.py -c fitc.cfg --add data/bootpolres   --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/bootpolres -o fitc.cfg
--python3 MFSUtil.py -c fitc.cfg --add data/bootpoltype  --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/bootpoltype -o fitc.cfg
--python3 MFSUtil.py -c fitc.cfg --add data/enfpolicy    --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/enfpolicy -o fitc.cfg
--python3 MFSUtil.py -c fitc.cfg --add data/kmid         --alignment 2 --mode=' ---rw-r-----' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/kmid -o fitc.cfg
--python3 MFSUtil.py -c fitc.cfg --add data/pubkeyhash   --alignment 2 --mode=' ---rw-rw-r--' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/pubkeyhash -o fitc.cfg
-+$python MFSUtil.py -c fitc.cfg --add data/emu_fuse_map --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=3  --gid=238 -f /home/bup/bup_sku/emu_fuse_map -o fitc.cfg
-+$python MFSUtil.py -c fitc.cfg --add data/plat_n_sku   --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=3  --gid=238 -f /home/bup/bup_sku/plat_n_sku -o fitc.cfg
-+$python MFSUtil.py -c fitc.cfg --add data/fwuoemid     --alignment 2 --mode=' ---rw-rw----' --opt='?--F' --uid=32 --gid=238 -f /home/fwupdate/fwuoemid -o fitc.cfg
-+$python MFSUtil.py -c fitc.cfg --add data/prof0        --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=55 --gid=238 -f /home/icc/prof0 -o fitc.cfg
-+$python MFSUtil.py -c fitc.cfg --add data/device_ports --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=73 --gid=238 -f /home/mctp/device_ports -o fitc.cfg
-+$python MFSUtil.py -c fitc.cfg --add data/hdcp_ports   --alignment 2 --mode=' -EIrw-r-----' --opt='?!-F' --uid=80 --gid=238 -f /home/pavp/hdcp_ports -o fitc.cfg
-+$python MFSUtil.py -c fitc.cfg --add data/cfg_rules    --alignment 2 --mode=' ---rw-rw----' --opt='-!MF' --uid=85 --gid=238 -f /home/policy/cfgmgr/cfg_rules -o fitc.cfg
-+$python MFSUtil.py -c fitc.cfg --add data/bootpolres   --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/bootpolres -o fitc.cfg
-+$python MFSUtil.py -c fitc.cfg --add data/bootpoltype  --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/bootpoltype -o fitc.cfg
-+$python MFSUtil.py -c fitc.cfg --add data/enfpolicy    --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/enfpolicy -o fitc.cfg
-+$python MFSUtil.py -c fitc.cfg --add data/kmid         --alignment 2 --mode=' ---rw-r-----' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/kmid -o fitc.cfg
-+$python MFSUtil.py -c fitc.cfg --add data/pubkeyhash   --alignment 2 --mode=' ---rw-rw-r--' --opt='?-MF' --uid=3  --gid=238 -f /home/secureboot/pubkeyhash -o fitc.cfg
- 
- # Delete file id 7 (fitc.cfg) from the MFS partition
--python3 MFSUtil.py -m MFS.part -r -i 7 -o MFS.part
-+$python MFSUtil.py -m MFS.part -r -i 7 -o MFS.part
- # Delete file id 8 (home) from the MFS partition
--python3 MFSUtil.py -m MFS.part -r -i 8 -o MFS.part
-+$python MFSUtil.py -m MFS.part -r -i 8 -o MFS.part
- 
- # Add the modified fitc.cfg into the MFS partition
--python3 MFSUtil.py -m MFS.part -a fitc.cfg --deoptimize -i 7 -o MFS.part
-+$python MFSUtil.py -m MFS.part -a fitc.cfg --deoptimize -i 7 -o MFS.part
- 
- # Write
- dd conv=notrunc if=MFS.part of=me.bin seek=168 count=100 bs=4096
--- 
-2.39.5
-

From 5d1f1823067d81867ab226a4d0e7c515e6a56e6a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 24 Dec 2024 13:33:20 +0000
Subject: [PATCH 0943/1549] vendor.sh: Safer exit when vendorfiles not needed

When vendor files were not needed on a given board,
the script would directly exit. This is bad, because
the inject functions are called directly from the main
script, which means the parent instance of lbmk.

This means that the lock file and temporary files were
not being removed on exit. On a subsequent run, this
would cause the error stating that a lock file is present,
which would cause further error, making the user believe
something is broken in lbmk.

Modify the behaviour accordingly; exits are now returns,
and these are handled in the calling functions, in such
a way that a proper exit occurs, whereby temporary files
and the lock file are deleted.

For context, please read the main "build" script where
it calls vendor_inject and vendor_download. At the end
of that script, it calls tmp_cleanup, which removes the
TMPDIR that was created, and the lock file. In lbmk,
the TMPDIR is not /tmp, but rather a subdirectory
under /tmp, so that further calls to mktemp create
everything under one single temporary directory, which
lbmk automatically removes on exit.

Therefore, this patch also avoids leaving temporary files
laying around on the disk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 570048e2..d12d94e3 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -259,7 +259,7 @@ extract_tbfw()
 vendor_inject()
 {
 	set +u +e; [ $# -lt 1 ] && $err "No options specified."
-	[ "$1" = "listboards" ] && eval "ls -1 config/coreboot || :; exit 0"
+	[ "$1" = "listboards" ] && eval "ls -1 config/coreboot || :; return 0"
 
 	archive="$1"; while getopts n:r:b:m: option; do
 		case "$option" in
@@ -273,8 +273,11 @@ vendor_inject()
 
 	check_board || return 0
 	[ "$nukemode" = "nuke" ] || x_ ./vendor download $board
-	[ "$vrelease" != "y" ] && patch_rom "$rom"
-	[ "$vrelease" = "y" ] && patch_release_roms; :
+	if [ "$vrelease" = "y" ]; then
+		patch_release_roms
+	else
+		patch_rom "$rom" || :
+	fi; :
 }
 
 check_board()
@@ -338,7 +341,7 @@ patch_release_roms()
 	    $err "patch_release_roms: !tar -xf \"$archive\" -C \"tmp/romdir\""
 
 	for x in "tmp/romdir/bin/"*/*.rom ; do
-		patch_rom "$x"
+		patch_rom "$x" || return 0
 	done
 
 	(
@@ -363,7 +366,7 @@ patch_release_roms()
 patch_rom()
 {
 	rom="$1"
-	readkconfig || exit 0
+	readkconfig || return 1
 
 	[ "$CONFIG_HAVE_MRC" = "y" ] && inject "mrc.bin" "$CONFIG_MRC_FILE" \
 	    "mrc" "0xfffa0000"

From 07037561bd6b40dfd5fce8f66affd64bd6dcdbe4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 24 Dec 2024 16:58:23 +0000
Subject: [PATCH 0944/1549] lbmk: remove use of deprecated ./vendor command

use ./mk instead, because in a future change to lbmk,
only ./mk will be used and the other commands will
be removed.

with this change, the ./vendor, ./build and ./update
commands are no longer used. these commands still work,
for backwards compatibility, but they are deprecated.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh    | 4 ++--
 include/vendor.sh | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index f21b6302..ec2ad650 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -55,7 +55,7 @@ mkvendorfiles()
 	printf "%s\n" "${version%%-*}" > "$srcdir/.coreboot-version" || \
 	    $err "!mk $srcdir .coreboot-version"
 	[ -z "$mode" ] && [ "$target" != "$tree" ] && \
-	    x_ ./vendor download $target; return 0
+	    x_ ./mk download $target; return 0
 }
 
 cook_coreboot_config()
@@ -247,7 +247,7 @@ cprom()
 	    cbfs "$newrom" "config/data/grub/bootorder_uboot" "bootorder" raw
 
 	[ "$XBMK_RELEASE" = "y" ] || return 0
-	$dry mksha512sum "$newrom" "vendorhashes"; $dry ./vendor inject \
+	$dry mksha512sum "$newrom" "vendorhashes"; $dry ./mk inject \
 	    -r "$newrom" -b "$target" -n nuke || $err "!nuke $newrom"
 }
 
diff --git a/include/vendor.sh b/include/vendor.sh
index d12d94e3..43f77f84 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -272,7 +272,7 @@ vendor_inject()
 	done
 
 	check_board || return 0
-	[ "$nukemode" = "nuke" ] || x_ ./vendor download $board
+	[ "$nukemode" = "nuke" ] || x_ ./mk download $board
 	if [ "$vrelease" = "y" ]; then
 		patch_release_roms
 	else

From 781320514623653077cda2d910b9baf150949bd1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 25 Dec 2024 09:10:57 +0000
Subject: [PATCH 0945/1549] Remove legacy update/vendor commands

We only use ./mk now.

./build still exists for now. This will be removed
in a future revision, when the trees script is removed
and merged with the main script.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 update | 1 -
 vendor | 1 -
 2 files changed, 2 deletions(-)
 delete mode 120000 update
 delete mode 120000 vendor

diff --git a/update b/update
deleted file mode 120000
index c795b054..00000000
--- a/update
+++ /dev/null
@@ -1 +0,0 @@
-build
\ No newline at end of file
diff --git a/vendor b/vendor
deleted file mode 120000
index c795b054..00000000
--- a/vendor
+++ /dev/null
@@ -1 +0,0 @@
-build
\ No newline at end of file

From 12c6259cb2f8a3a580d30e52ee2a6c9e8ece2cc3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 26 Dec 2024 17:11:10 +0000
Subject: [PATCH 0946/1549] vendor.sh: Handle FSP insertion post-release

The Libreboot 20241206 release provided FSP pre-assembled
and inserted into the ROM images; the only file inserted
by vendor.sh was the Intel ME.

Direct distribution of an unmodified FSP image is permitted
by Intel, provided that the license notice is given among
other requirements. Due to how coreboot works, it must split
up the FSP into subcomponents, and adjust certain pointers
within the -M component (for raminit).

Such build-time modifications are perfectly fine in a coreboot
context, where it is expected that you are building from source.
The end result is simply what you use.

In a distribution such as Libreboot, where we provide pre-built
images, this becomes problematic. It's a technicality of the
license, and it seems that Intel themselves probably intended
for Libreboot to use the FSP this way anyway, since it is they
who seem to be the author of SplitFspBin.py, which is the
utility that coreboot uses for splitting up the FSP image.

Due to the technicality of the licensing, the FSP shall now
be scrubbed from releases, and re-inserted.

Coreboot was inserting the -S component with LZ4 compression,
which is bad news for ./mk inject beacuse the act of compression
is currently not reproducible. Therefore, coreboot has been
modified not to compress this section, and the inject command
doesn't compress it either. This means that the S file is using
about 180KB in flash, instead of about 140KB. This is totally OK.

The _fsp targets are retained, but set to release=n, because these
targets *still* don't scrub fsp.bin; if released, they would
include fsp files, so they've been set to release=n. These can
be used on older Libreboot release archives, for compatibility.

The new ROM images released for the affected machines are:

t480_vfsp_16mb
t480s_vfsp_16mb
dell3050micro_vfsp_16mb

Note the use of _vfsp instead of _fsp. These images are released,
unlike _fsp, and they lack fspm/fsps in the image. FSP S/M must
be inserted using ./mk inject.

This has been tested and confirmed to boot just fine.
The 20241206 images will be re-compiled and re-uploaded with this
and other recent changes, to make Libreboot 20241206 rev8.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              |   5 +-
 .../config/libgfxinit_txtmode                 |   5 +-
 .../dell3050micro_fsp_16mb/target.cfg         |   3 +-
 .../config/libgfxinit_corebootfb              | 814 +++++++++++++++++
 .../config/libgfxinit_txtmode                 | 807 ++++++++++++++++
 .../dell3050micro_vfsp_16mb/target.cfg        |  11 +
 ...c-intel-skylake-Don-t-compress-FSP-S.patch |  36 +
 .../config/libgfxinit_corebootfb              |   5 +-
 .../t480_fsp_16mb/config/libgfxinit_txtmode   |   5 +-
 config/coreboot/t480_fsp_16mb/target.cfg      |   1 +
 .../config/libgfxinit_corebootfb              | 859 ++++++++++++++++++
 .../t480_vfsp_16mb/config/libgfxinit_txtmode  | 852 +++++++++++++++++
 config/coreboot/t480_vfsp_16mb/target.cfg     |  10 +
 .../config/libgfxinit_corebootfb              |   5 +-
 .../t480s_fsp_16mb/config/libgfxinit_txtmode  |   5 +-
 config/coreboot/t480s_fsp_16mb/target.cfg     |   1 +
 .../config/libgfxinit_corebootfb              | 859 ++++++++++++++++++
 .../t480s_vfsp_16mb/config/libgfxinit_txtmode | 852 +++++++++++++++++
 config/coreboot/t480s_vfsp_16mb/target.cfg    |  10 +
 config/vendor/3050micro/pkg.cfg               |   7 +
 config/vendor/t480/pkg.cfg                    |   7 +
 config/vendor/t480s/pkg.cfg                   |   7 +
 include/lib.sh                                |  30 +-
 include/vendor.sh                             |  91 +-
 24 files changed, 5258 insertions(+), 29 deletions(-)
 create mode 100644 config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/dell3050micro_vfsp_16mb/target.cfg
 create mode 100644 config/coreboot/next/patches/0012-soc-intel-skylake-Don-t-compress-FSP-S.patch
 create mode 100644 config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/t480_vfsp_16mb/target.cfg
 create mode 100644 config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/t480s_vfsp_16mb/target.cfg

diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
index cd2152eb..0a5401d6 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
@@ -238,8 +238,8 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
 # SoC
 #
 CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
-CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
-CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
+CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
+CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
 CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
@@ -603,7 +603,6 @@ CONFIG_FSP_FULL_FD=y
 CONFIG_FSP_T_RESERVED_SIZE=0x0
 CONFIG_FSP_M_XIP=y
 CONFIG_HAVE_FSP_LOGO_SUPPORT=y
-CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
 CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
 CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
index 412c1dec..33e2c3a3 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
@@ -236,8 +236,8 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
 # SoC
 #
 CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
-CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
-CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
+CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
+CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
 CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
@@ -595,7 +595,6 @@ CONFIG_FSP_FULL_FD=y
 CONFIG_FSP_T_RESERVED_SIZE=0x0
 CONFIG_FSP_M_XIP=y
 CONFIG_HAVE_FSP_LOGO_SUPPORT=y
-CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
 CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
 CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
diff --git a/config/coreboot/dell3050micro_fsp_16mb/target.cfg b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
index 8ab796e4..910d2b38 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/target.cfg
+++ b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
@@ -8,4 +8,5 @@ grubtree="xhci"
 vcfg="3050micro"
 build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
 IFD_platform="sklkbl"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
+release="n" # dell3050micro_vfsp_16mb is released instead
diff --git a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..2c14d09f
--- /dev/null
+++ b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb
@@ -0,0 +1,814 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_3050"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=512
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xEEE000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=16
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_USE_PM_ACPI_TIMER=y
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_3050=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_USE_LEGACY_8254_TIMER=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin"
+CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
+CONFIG_TTYS0_BAUD=115200
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
+CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
+CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x200000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_BERT_SIZE=0x0
+CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IFD_CHIPSET="sklkbl"
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_MAX_ROOT_PORTS=24
+CONFIG_PCR_BASE_ADDRESS=0xfd000000
+CONFIG_CPU_BCLK_MHZ=100
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
+CONFIG_CPU_XTAL_HZ=24000000
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
+CONFIG_SOC_INTEL_I2C_DEV_MAX=6
+# CONFIG_ENABLE_SATA_TEST_MODE is not set
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
+CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_FSP_PUBLISH_MBP_HOB=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
+CONFIG_MAX_HECI_DEVICES=5
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_PAM0_REGISTER=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
+CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
+CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
+CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
+CONFIG_SOC_INTEL_KABYLAKE=y
+CONFIG_SKYLAKE_SOC_PCH_H=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
+CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
+CONFIG_FSP_T_LOCATION=0xfffe0000
+CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
+CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code for IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
+CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
+# CONFIG_USE_COREBOOT_MP_INIT is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
+CONFIG_INTEL_CAR_NEM_ENHANCED=y
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_INTEL_KEYLOCKER is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
+CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
+CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
+CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
+CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
+CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
+CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
+CONFIG_SOC_INTEL_CSE_RW_FILE=""
+CONFIG_SOC_INTEL_CSE_RW_VERSION=""
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
+CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
+CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
+CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
+# CONFIG_SOC_INTEL_DISABLE_IGD is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
+CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
+CONFIG_SA_ENABLE_DPR=y
+CONFIG_HAVE_CAPID_A_REGISTER=y
+CONFIG_HAVE_BDSM_BGSM_REGISTER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
+
+#
+# Intel SoC Common PCH Code
+#
+CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
+CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
+CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
+CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
+
+#
+# Intel SoC Common coreboot stages and non-IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BASECODE=y
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+CONFIG_PAVP=y
+# CONFIG_MMA is not set
+CONFIG_SOC_INTEL_COMMON_NHLT=y
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_PARALLEL_MP_AP_WORK=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_UDK_BASE=y
+CONFIG_UDK_2017_BINDING=y
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_202005_VERSION=202005
+CONFIG_UDK_202111_VERSION=202111
+CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_202305_VERSION=202305
+CONFIG_UDK_VERSION=2017
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_HAVE_FSP_GOP=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y
+# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set
+# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set
+# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_DRIVERS_EFI_FW_INFO is not set
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_DESIGNWARE=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+# CONFIG_FSP_USE_REPO is not set
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+# CONFIG_BMP_LOGO is not set
+CONFIG_PLATFORM_USES_FSP2_0=y
+CONFIG_PLATFORM_USES_FSP2_X86_32=y
+CONFIG_HAVE_INTEL_FSP_REPO=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_S_CBFS="fsps.bin"
+CONFIG_FSP_M_CBFS="fspm.bin"
+# CONFIG_FSP_FULL_FD is not set
+CONFIG_FSP_T_RESERVED_SIZE=0x0
+CONFIG_FSP_M_XIP=y
+CONFIG_HAVE_FSP_LOGO_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
+CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
+CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
+CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
+# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Skylake"
+CONFIG_GFX_GMA_PCH="Sunrise_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_USB_ACPI=y
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_CUSTOM_MADT=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_ACPI_LPIT=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_ACPI_S1_NOT_SUPPORTED=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_ACPI_NHLT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
+# CONFIG_DISPLAY_FSP_HEADER is not set
+# CONFIG_VERIFY_HOBS is not set
+# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
+CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
+# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+CONFIG_HAVE_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..e52d3968
--- /dev/null
+++ b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode
@@ -0,0 +1,807 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_3050"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=512
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xEEE000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=16
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_USE_PM_ACPI_TIMER=y
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_3050=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_USE_LEGACY_8254_TIMER=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin"
+CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
+CONFIG_TTYS0_BAUD=115200
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
+CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
+CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x200000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_BERT_SIZE=0x0
+CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IFD_CHIPSET="sklkbl"
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_MAX_ROOT_PORTS=24
+CONFIG_PCR_BASE_ADDRESS=0xfd000000
+CONFIG_CPU_BCLK_MHZ=100
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
+CONFIG_CPU_XTAL_HZ=24000000
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
+CONFIG_SOC_INTEL_I2C_DEV_MAX=6
+# CONFIG_ENABLE_SATA_TEST_MODE is not set
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
+CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_FSP_PUBLISH_MBP_HOB=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
+CONFIG_MAX_HECI_DEVICES=5
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_PAM0_REGISTER=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
+CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
+CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
+CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
+CONFIG_SOC_INTEL_KABYLAKE=y
+CONFIG_SKYLAKE_SOC_PCH_H=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
+CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
+CONFIG_FSP_T_LOCATION=0xfffe0000
+CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
+CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code for IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
+CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
+# CONFIG_USE_COREBOOT_MP_INIT is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
+CONFIG_INTEL_CAR_NEM_ENHANCED=y
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_INTEL_KEYLOCKER is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
+CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
+CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
+CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
+CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
+CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
+CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
+CONFIG_SOC_INTEL_CSE_RW_FILE=""
+CONFIG_SOC_INTEL_CSE_RW_VERSION=""
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
+CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
+CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
+CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
+# CONFIG_SOC_INTEL_DISABLE_IGD is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
+CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
+CONFIG_SA_ENABLE_DPR=y
+CONFIG_HAVE_CAPID_A_REGISTER=y
+CONFIG_HAVE_BDSM_BGSM_REGISTER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
+
+#
+# Intel SoC Common PCH Code
+#
+CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
+CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
+CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
+CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
+
+#
+# Intel SoC Common coreboot stages and non-IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BASECODE=y
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+CONFIG_PAVP=y
+# CONFIG_MMA is not set
+CONFIG_SOC_INTEL_COMMON_NHLT=y
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_PARALLEL_MP_AP_WORK=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_UDK_BASE=y
+CONFIG_UDK_2017_BINDING=y
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_202005_VERSION=202005
+CONFIG_UDK_202111_VERSION=202111
+CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_202305_VERSION=202305
+CONFIG_UDK_VERSION=2017
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_HAVE_FSP_GOP=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_DRIVERS_EFI_FW_INFO is not set
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_DESIGNWARE=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+# CONFIG_FSP_USE_REPO is not set
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+# CONFIG_BMP_LOGO is not set
+CONFIG_PLATFORM_USES_FSP2_0=y
+CONFIG_PLATFORM_USES_FSP2_X86_32=y
+CONFIG_HAVE_INTEL_FSP_REPO=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_S_CBFS="fsps.bin"
+CONFIG_FSP_M_CBFS="fspm.bin"
+# CONFIG_FSP_FULL_FD is not set
+CONFIG_FSP_T_RESERVED_SIZE=0x0
+CONFIG_FSP_M_XIP=y
+CONFIG_HAVE_FSP_LOGO_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
+CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
+CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
+CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
+# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Skylake"
+CONFIG_GFX_GMA_PCH="Sunrise_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_USB_ACPI=y
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_CUSTOM_MADT=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_ACPI_LPIT=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_ACPI_S1_NOT_SUPPORTED=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_ACPI_NHLT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
+# CONFIG_DISPLAY_FSP_HEADER is not set
+# CONFIG_VERIFY_HOBS is not set
+# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
+CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
+# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+CONFIG_HAVE_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell3050micro_vfsp_16mb/target.cfg b/config/coreboot/dell3050micro_vfsp_16mb/target.cfg
new file mode 100644
index 00000000..8ab796e4
--- /dev/null
+++ b/config/coreboot/dell3050micro_vfsp_16mb/target.cfg
@@ -0,0 +1,11 @@
+tree="next"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="3050micro"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+IFD_platform="sklkbl"
+payload_uboot_amd64="y"
\ No newline at end of file
diff --git a/config/coreboot/next/patches/0012-soc-intel-skylake-Don-t-compress-FSP-S.patch b/config/coreboot/next/patches/0012-soc-intel-skylake-Don-t-compress-FSP-S.patch
new file mode 100644
index 00000000..a96f8ba8
--- /dev/null
+++ b/config/coreboot/next/patches/0012-soc-intel-skylake-Don-t-compress-FSP-S.patch
@@ -0,0 +1,36 @@
+From 68f16ef46890dd08a2d03034ad6f352699282e00 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Thu, 26 Dec 2024 19:45:20 +0000
+Subject: [PATCH 1/1] soc/intel/skylake: Don't compress FSP-S
+
+Build systems like lbmk need to reproducibly insert
+certain vendor files on release images.
+
+Compression isn't always reproducible, and making it
+so costs a lot more time than simply disabling compression.
+
+With this change, the FSP-S module will now be inserted
+without compression, which means that there will now be
+about 40KB of extra space used in the flash.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/soc/intel/skylake/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
+index c24df2ef75..8e25f796ed 100644
+--- a/src/soc/intel/skylake/Kconfig
++++ b/src/soc/intel/skylake/Kconfig
+@@ -12,7 +12,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
+ 	select CPU_SUPPORTS_PM_TIMER_EMULATION
+ 	select DRIVERS_USB_ACPI
+ 	select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
+-	select FSP_COMPRESS_FSP_S_LZ4
++#	select FSP_COMPRESS_FSP_S_LZ4
+ 	select FSP_M_XIP
+ 	select GENERIC_GPIO_LIB
+ 	select HAVE_FSP_GOP
+-- 
+2.39.5
+
diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
index c4550f1d..a9f090a9 100644
--- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
@@ -267,8 +267,8 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
 # SoC
 #
 CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
-CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
-CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
+CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
+CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
 CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
@@ -640,7 +640,6 @@ CONFIG_FSP_FULL_FD=y
 CONFIG_FSP_T_RESERVED_SIZE=0x0
 CONFIG_FSP_M_XIP=y
 CONFIG_HAVE_FSP_LOGO_SUPPORT=y
-CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
 CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
 CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
index 83a8ecd6..42bf3336 100644
--- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
@@ -265,8 +265,8 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
 # SoC
 #
 CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
-CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
-CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
+CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
+CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
 CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
@@ -632,7 +632,6 @@ CONFIG_FSP_FULL_FD=y
 CONFIG_FSP_T_RESERVED_SIZE=0x0
 CONFIG_FSP_M_XIP=y
 CONFIG_HAVE_FSP_LOGO_SUPPORT=y
-CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
 CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
 CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
diff --git a/config/coreboot/t480_fsp_16mb/target.cfg b/config/coreboot/t480_fsp_16mb/target.cfg
index af89a367..4cd8adec 100644
--- a/config/coreboot/t480_fsp_16mb/target.cfg
+++ b/config/coreboot/t480_fsp_16mb/target.cfg
@@ -8,3 +8,4 @@ grubtree="xhci"
 vcfg="t480"
 build_depend="seabios/default grub/xhci memtest86plus"
 IFD_platform="sklkbl"
+release="n" # t480_vfsp_16mb is released instead
diff --git a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..66bfbf5b
--- /dev/null
+++ b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb
@@ -0,0 +1,859 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_FAMILY="T480"
+CONFIG_MAINBOARD_PART_NUMBER="T480"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=2
+CONFIG_DIMM_SPD_SIZE=512
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0xEEC000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="t480"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+CONFIG_USE_PM_ACPI_TIMER=y
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_USE_LEGACY_8254_TIMER=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t480/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t480/gbe"
+CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
+CONFIG_HAVE_IFD_BIN=y
+# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_E460 is not set
+CONFIG_BOARD_LENOVO_T480=y
+# CONFIG_BOARD_LENOVO_T480S is not set
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
+CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin"
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
+CONFIG_TTYS0_BAUD=115200
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
+CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
+CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x200000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_BERT_SIZE=0x0
+CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IFD_CHIPSET="sklkbl"
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_MAX_ROOT_PORTS=24
+CONFIG_PCR_BASE_ADDRESS=0xfd000000
+CONFIG_CPU_BCLK_MHZ=100
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
+CONFIG_CPU_XTAL_HZ=24000000
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
+CONFIG_SOC_INTEL_I2C_DEV_MAX=6
+# CONFIG_ENABLE_SATA_TEST_MODE is not set
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
+CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_FSP_PUBLISH_MBP_HOB=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
+CONFIG_MAX_HECI_DEVICES=5
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_PAM0_REGISTER=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
+CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
+CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
+CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
+CONFIG_SOC_INTEL_KABYLAKE=y
+CONFIG_FSP_T_LOCATION=0xfffe0000
+CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
+CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code for IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
+CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
+# CONFIG_USE_COREBOOT_MP_INIT is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
+CONFIG_INTEL_CAR_NEM_ENHANCED=y
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_INTEL_KEYLOCKER is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
+CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
+CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
+CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
+CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
+CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
+CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
+CONFIG_SOC_INTEL_CSE_RW_FILE=""
+CONFIG_SOC_INTEL_CSE_RW_VERSION=""
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
+CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
+CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
+CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
+# CONFIG_SOC_INTEL_DISABLE_IGD is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
+CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
+CONFIG_SA_ENABLE_DPR=y
+CONFIG_HAVE_CAPID_A_REGISTER=y
+CONFIG_HAVE_BDSM_BGSM_REGISTER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
+
+#
+# Intel SoC Common PCH Code
+#
+CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
+CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
+CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
+CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
+
+#
+# Intel SoC Common coreboot stages and non-IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BASECODE=y
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+CONFIG_PAVP=y
+# CONFIG_MMA is not set
+CONFIG_SOC_INTEL_COMMON_NHLT=y
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_PARALLEL_MP_AP_WORK=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
+CONFIG_H8_HAS_LEDLOGO=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_UDK_BASE=y
+CONFIG_UDK_2017_BINDING=y
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_202005_VERSION=202005
+CONFIG_UDK_202111_VERSION=202111
+CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_202305_VERSION=202305
+CONFIG_UDK_VERSION=2017
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_HAVE_FSP_GOP=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y
+# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set
+# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set
+# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_DRIVERS_EFI_FW_INFO is not set
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_DESIGNWARE=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+# CONFIG_FSP_USE_REPO is not set
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+# CONFIG_BMP_LOGO is not set
+CONFIG_PLATFORM_USES_FSP2_0=y
+CONFIG_PLATFORM_USES_FSP2_X86_32=y
+CONFIG_HAVE_INTEL_FSP_REPO=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_S_CBFS="fsps.bin"
+CONFIG_FSP_M_CBFS="fspm.bin"
+# CONFIG_FSP_FULL_FD is not set
+CONFIG_FSP_T_RESERVED_SIZE=0x0
+CONFIG_FSP_M_XIP=y
+CONFIG_HAVE_FSP_LOGO_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
+CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
+CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
+CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
+# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Skylake"
+CONFIG_GFX_GMA_PCH="Sunrise_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_USB_ACPI=y
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_TPM1 is not set
+CONFIG_TPM2=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM2=y
+# CONFIG_DEBUG_TPM is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_CUSTOM_MADT=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_ACPI_LPIT=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_ACPI_S1_NOT_SUPPORTED=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_IOAPIC=y
+CONFIG_ACPI_NHLT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
+# CONFIG_DISPLAY_FSP_HEADER is not set
+# CONFIG_VERIFY_HOBS is not set
+# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
+CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
+# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+CONFIG_HAVE_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_SPD_READ_BY_WORD=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..4a0de4b7
--- /dev/null
+++ b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode
@@ -0,0 +1,852 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_FAMILY="T480"
+CONFIG_MAINBOARD_PART_NUMBER="T480"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=2
+CONFIG_DIMM_SPD_SIZE=512
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0xEEC000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="t480"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+CONFIG_USE_PM_ACPI_TIMER=y
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_USE_LEGACY_8254_TIMER=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t480/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t480/gbe"
+CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
+CONFIG_HAVE_IFD_BIN=y
+# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_E460 is not set
+CONFIG_BOARD_LENOVO_T480=y
+# CONFIG_BOARD_LENOVO_T480S is not set
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
+CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin"
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
+CONFIG_TTYS0_BAUD=115200
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
+CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
+CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x200000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_BERT_SIZE=0x0
+CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IFD_CHIPSET="sklkbl"
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_MAX_ROOT_PORTS=24
+CONFIG_PCR_BASE_ADDRESS=0xfd000000
+CONFIG_CPU_BCLK_MHZ=100
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
+CONFIG_CPU_XTAL_HZ=24000000
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
+CONFIG_SOC_INTEL_I2C_DEV_MAX=6
+# CONFIG_ENABLE_SATA_TEST_MODE is not set
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
+CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_FSP_PUBLISH_MBP_HOB=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
+CONFIG_MAX_HECI_DEVICES=5
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_PAM0_REGISTER=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
+CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
+CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
+CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
+CONFIG_SOC_INTEL_KABYLAKE=y
+CONFIG_FSP_T_LOCATION=0xfffe0000
+CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
+CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code for IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
+CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
+# CONFIG_USE_COREBOOT_MP_INIT is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
+CONFIG_INTEL_CAR_NEM_ENHANCED=y
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_INTEL_KEYLOCKER is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
+CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
+CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
+CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
+CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
+CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
+CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
+CONFIG_SOC_INTEL_CSE_RW_FILE=""
+CONFIG_SOC_INTEL_CSE_RW_VERSION=""
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
+CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
+CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
+CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
+# CONFIG_SOC_INTEL_DISABLE_IGD is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
+CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
+CONFIG_SA_ENABLE_DPR=y
+CONFIG_HAVE_CAPID_A_REGISTER=y
+CONFIG_HAVE_BDSM_BGSM_REGISTER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
+
+#
+# Intel SoC Common PCH Code
+#
+CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
+CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
+CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
+CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
+
+#
+# Intel SoC Common coreboot stages and non-IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BASECODE=y
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+CONFIG_PAVP=y
+# CONFIG_MMA is not set
+CONFIG_SOC_INTEL_COMMON_NHLT=y
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_PARALLEL_MP_AP_WORK=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
+CONFIG_H8_HAS_LEDLOGO=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_UDK_BASE=y
+CONFIG_UDK_2017_BINDING=y
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_202005_VERSION=202005
+CONFIG_UDK_202111_VERSION=202111
+CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_202305_VERSION=202305
+CONFIG_UDK_VERSION=2017
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_HAVE_FSP_GOP=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_DRIVERS_EFI_FW_INFO is not set
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_DESIGNWARE=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+# CONFIG_FSP_USE_REPO is not set
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+# CONFIG_BMP_LOGO is not set
+CONFIG_PLATFORM_USES_FSP2_0=y
+CONFIG_PLATFORM_USES_FSP2_X86_32=y
+CONFIG_HAVE_INTEL_FSP_REPO=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_S_CBFS="fsps.bin"
+CONFIG_FSP_M_CBFS="fspm.bin"
+# CONFIG_FSP_FULL_FD is not set
+CONFIG_FSP_T_RESERVED_SIZE=0x0
+CONFIG_FSP_M_XIP=y
+CONFIG_HAVE_FSP_LOGO_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
+CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
+CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
+CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
+# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Skylake"
+CONFIG_GFX_GMA_PCH="Sunrise_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_USB_ACPI=y
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_TPM1 is not set
+CONFIG_TPM2=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM2=y
+# CONFIG_DEBUG_TPM is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_CUSTOM_MADT=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_ACPI_LPIT=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_ACPI_S1_NOT_SUPPORTED=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_IOAPIC=y
+CONFIG_ACPI_NHLT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
+# CONFIG_DISPLAY_FSP_HEADER is not set
+# CONFIG_VERIFY_HOBS is not set
+# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
+CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
+# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+CONFIG_HAVE_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_SPD_READ_BY_WORD=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t480_vfsp_16mb/target.cfg b/config/coreboot/t480_vfsp_16mb/target.cfg
new file mode 100644
index 00000000..af89a367
--- /dev/null
+++ b/config/coreboot/t480_vfsp_16mb/target.cfg
@@ -0,0 +1,10 @@
+tree="next"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="t480"
+build_depend="seabios/default grub/xhci memtest86plus"
+IFD_platform="sklkbl"
diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
index 2e29a0a7..36e2fc66 100644
--- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
@@ -267,8 +267,8 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
 # SoC
 #
 CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
-CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
-CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
+CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
+CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
 CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
@@ -640,7 +640,6 @@ CONFIG_FSP_FULL_FD=y
 CONFIG_FSP_T_RESERVED_SIZE=0x0
 CONFIG_FSP_M_XIP=y
 CONFIG_HAVE_FSP_LOGO_SUPPORT=y
-CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
 CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
 CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
index 84ac6177..d2078475 100644
--- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
@@ -265,8 +265,8 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y
 # SoC
 #
 CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
-CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
-CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
+CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
+CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
 CONFIG_CBFS_MCACHE_SIZE=0x4000
 CONFIG_ROMSTAGE_ADDR=0x2000000
 CONFIG_VERSTAGE_ADDR=0x2000000
@@ -632,7 +632,6 @@ CONFIG_FSP_FULL_FD=y
 CONFIG_FSP_T_RESERVED_SIZE=0x0
 CONFIG_FSP_M_XIP=y
 CONFIG_HAVE_FSP_LOGO_SUPPORT=y
-CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
 CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
 CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
diff --git a/config/coreboot/t480s_fsp_16mb/target.cfg b/config/coreboot/t480s_fsp_16mb/target.cfg
index c8835c8f..26139a9d 100644
--- a/config/coreboot/t480s_fsp_16mb/target.cfg
+++ b/config/coreboot/t480s_fsp_16mb/target.cfg
@@ -8,3 +8,4 @@ grubtree="xhci"
 vcfg="t480s"
 build_depend="seabios/default grub/xhci memtest86plus"
 IFD_platform="sklkbl"
+release="n" # t480s_vfsp_16mb is released instead
diff --git a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..25b6e792
--- /dev/null
+++ b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb
@@ -0,0 +1,859 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_FAMILY="T480S"
+CONFIG_MAINBOARD_PART_NUMBER="T480S"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=2
+CONFIG_DIMM_SPD_SIZE=512
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0xEEC000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="t480s"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480S"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+CONFIG_USE_PM_ACPI_TIMER=y
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_USE_LEGACY_8254_TIMER=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t480s/ifd_16"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t480s/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t480s/gbe"
+CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
+CONFIG_HAVE_IFD_BIN=y
+# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_E460 is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+CONFIG_BOARD_LENOVO_T480S=y
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
+CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin"
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
+CONFIG_TTYS0_BAUD=115200
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
+CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
+CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x200000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_BERT_SIZE=0x0
+CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IFD_CHIPSET="sklkbl"
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_MAX_ROOT_PORTS=24
+CONFIG_PCR_BASE_ADDRESS=0xfd000000
+CONFIG_CPU_BCLK_MHZ=100
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
+CONFIG_CPU_XTAL_HZ=24000000
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
+CONFIG_SOC_INTEL_I2C_DEV_MAX=6
+# CONFIG_ENABLE_SATA_TEST_MODE is not set
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
+CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_FSP_PUBLISH_MBP_HOB=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
+CONFIG_MAX_HECI_DEVICES=5
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_PAM0_REGISTER=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
+CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
+CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
+CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
+CONFIG_SOC_INTEL_KABYLAKE=y
+CONFIG_FSP_T_LOCATION=0xfffe0000
+CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
+CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code for IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
+CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
+# CONFIG_USE_COREBOOT_MP_INIT is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
+CONFIG_INTEL_CAR_NEM_ENHANCED=y
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_INTEL_KEYLOCKER is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
+CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
+CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
+CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
+CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
+CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
+CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
+CONFIG_SOC_INTEL_CSE_RW_FILE=""
+CONFIG_SOC_INTEL_CSE_RW_VERSION=""
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
+CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
+CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
+CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
+# CONFIG_SOC_INTEL_DISABLE_IGD is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
+CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
+CONFIG_SA_ENABLE_DPR=y
+CONFIG_HAVE_CAPID_A_REGISTER=y
+CONFIG_HAVE_BDSM_BGSM_REGISTER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
+
+#
+# Intel SoC Common PCH Code
+#
+CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
+CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
+CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
+CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
+
+#
+# Intel SoC Common coreboot stages and non-IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BASECODE=y
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+CONFIG_PAVP=y
+# CONFIG_MMA is not set
+CONFIG_SOC_INTEL_COMMON_NHLT=y
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_PARALLEL_MP_AP_WORK=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
+CONFIG_H8_HAS_LEDLOGO=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_UDK_BASE=y
+CONFIG_UDK_2017_BINDING=y
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_202005_VERSION=202005
+CONFIG_UDK_202111_VERSION=202111
+CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_202305_VERSION=202305
+CONFIG_UDK_VERSION=2017
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_HAVE_FSP_GOP=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y
+# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set
+# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set
+# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_DRIVERS_EFI_FW_INFO is not set
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_DESIGNWARE=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+# CONFIG_FSP_USE_REPO is not set
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+# CONFIG_BMP_LOGO is not set
+CONFIG_PLATFORM_USES_FSP2_0=y
+CONFIG_PLATFORM_USES_FSP2_X86_32=y
+CONFIG_HAVE_INTEL_FSP_REPO=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_S_CBFS="fsps.bin"
+CONFIG_FSP_M_CBFS="fspm.bin"
+# CONFIG_FSP_FULL_FD is not set
+CONFIG_FSP_T_RESERVED_SIZE=0x0
+CONFIG_FSP_M_XIP=y
+CONFIG_HAVE_FSP_LOGO_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
+CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
+CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
+CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
+# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Skylake"
+CONFIG_GFX_GMA_PCH="Sunrise_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_USB_ACPI=y
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_TPM1 is not set
+CONFIG_TPM2=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM2=y
+# CONFIG_DEBUG_TPM is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_CUSTOM_MADT=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_ACPI_LPIT=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_ACPI_S1_NOT_SUPPORTED=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_IOAPIC=y
+CONFIG_ACPI_NHLT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
+# CONFIG_DISPLAY_FSP_HEADER is not set
+# CONFIG_VERIFY_HOBS is not set
+# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
+CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
+# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+CONFIG_HAVE_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_SPD_READ_BY_WORD=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..f0633633
--- /dev/null
+++ b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode
@@ -0,0 +1,852 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_MAINBOARD_FAMILY="T480S"
+CONFIG_MAINBOARD_PART_NUMBER="T480S"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=2
+CONFIG_DIMM_SPD_SIZE=512
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0xEEC000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="t480s"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480S"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+CONFIG_USE_PM_ACPI_TIMER=y
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_USE_LEGACY_8254_TIMER=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t480s/ifd_16"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t480s/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t480s/gbe"
+CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
+CONFIG_HAVE_IFD_BIN=y
+# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_E460 is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+CONFIG_BOARD_LENOVO_T480S=y
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+# CONFIG_BOARD_LENOVO_T420 is not set
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
+CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin"
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
+CONFIG_TTYS0_BAUD=115200
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
+CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
+CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x200000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_BERT_SIZE=0x0
+CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IFD_CHIPSET="sklkbl"
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_MAX_ROOT_PORTS=24
+CONFIG_PCR_BASE_ADDRESS=0xfd000000
+CONFIG_CPU_BCLK_MHZ=100
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
+CONFIG_CPU_XTAL_HZ=24000000
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
+CONFIG_SOC_INTEL_I2C_DEV_MAX=6
+# CONFIG_ENABLE_SATA_TEST_MODE is not set
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
+CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_FSP_PUBLISH_MBP_HOB=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
+CONFIG_MAX_HECI_DEVICES=5
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_PAM0_REGISTER=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
+CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
+CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
+CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
+CONFIG_SOC_INTEL_KABYLAKE=y
+CONFIG_FSP_T_LOCATION=0xfffe0000
+CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
+CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code for IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
+CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
+# CONFIG_USE_COREBOOT_MP_INIT is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
+CONFIG_INTEL_CAR_NEM_ENHANCED=y
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_INTEL_KEYLOCKER is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
+CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
+CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
+CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
+CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
+CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
+CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
+CONFIG_SOC_INTEL_CSE_RW_FILE=""
+CONFIG_SOC_INTEL_CSE_RW_VERSION=""
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
+CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
+CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
+CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
+# CONFIG_SOC_INTEL_DISABLE_IGD is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
+CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
+CONFIG_SA_ENABLE_DPR=y
+CONFIG_HAVE_CAPID_A_REGISTER=y
+CONFIG_HAVE_BDSM_BGSM_REGISTER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
+
+#
+# Intel SoC Common PCH Code
+#
+CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
+CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
+CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
+CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
+
+#
+# Intel SoC Common coreboot stages and non-IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BASECODE=y
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+CONFIG_PAVP=y
+# CONFIG_MMA is not set
+CONFIG_SOC_INTEL_COMMON_NHLT=y
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_PARALLEL_MP_AP_WORK=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+CONFIG_H8_BEEP_ON_DEATH=y
+CONFIG_H8_FLASH_LEDS_ON_DEATH=y
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
+CONFIG_H8_HAS_LEDLOGO=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_UDK_BASE=y
+CONFIG_UDK_2017_BINDING=y
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_202005_VERSION=202005
+CONFIG_UDK_202111_VERSION=202111
+CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_202305_VERSION=202305
+CONFIG_UDK_VERSION=2017
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_HAVE_FSP_GOP=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_DRIVERS_EFI_FW_INFO is not set
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_DESIGNWARE=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+# CONFIG_FSP_USE_REPO is not set
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+# CONFIG_BMP_LOGO is not set
+CONFIG_PLATFORM_USES_FSP2_0=y
+CONFIG_PLATFORM_USES_FSP2_X86_32=y
+CONFIG_HAVE_INTEL_FSP_REPO=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_S_CBFS="fsps.bin"
+CONFIG_FSP_M_CBFS="fspm.bin"
+# CONFIG_FSP_FULL_FD is not set
+CONFIG_FSP_T_RESERVED_SIZE=0x0
+CONFIG_FSP_M_XIP=y
+CONFIG_HAVE_FSP_LOGO_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
+CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
+CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
+CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
+# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Skylake"
+CONFIG_GFX_GMA_PCH="Sunrise_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_USB_ACPI=y
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_TPM1 is not set
+CONFIG_TPM2=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM2=y
+# CONFIG_DEBUG_TPM is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_CUSTOM_MADT=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_ACPI_LPIT=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_ACPI_S1_NOT_SUPPORTED=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_IOAPIC=y
+CONFIG_ACPI_NHLT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
+# CONFIG_DISPLAY_FSP_HEADER is not set
+# CONFIG_VERIFY_HOBS is not set
+# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
+CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
+# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+CONFIG_HAVE_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_SPD_READ_BY_WORD=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t480s_vfsp_16mb/target.cfg b/config/coreboot/t480s_vfsp_16mb/target.cfg
new file mode 100644
index 00000000..c8835c8f
--- /dev/null
+++ b/config/coreboot/t480s_vfsp_16mb/target.cfg
@@ -0,0 +1,10 @@
+tree="next"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="t480s"
+build_depend="seabios/default grub/xhci memtest86plus"
+IFD_platform="sklkbl"
diff --git a/config/vendor/3050micro/pkg.cfg b/config/vendor/3050micro/pkg.cfg
index 1756958d..5ecff50b 100644
--- a/config/vendor/3050micro/pkg.cfg
+++ b/config/vendor/3050micro/pkg.cfg
@@ -2,6 +2,13 @@ DL_hash="976bbb1e625f64df276d8343757d910c88b8a781f953bc2c41a7dd15184ec70d55f8081
 DL_url="https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip"
 DL_url_bkup="https://web.archive.org/web/20230822134231/https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip"
 
+# for Fsp.fd, we don't rely on a download. Instead,
+# we copy from coreboot.git. The file is defined
+# by CONFIG_FSP_FD_PATH, split to CONFIG_FSP_M_FILE and CONFIG_FSP_S_FILE
+# and inserted to CBFS with names CONFIG_FSP_S_CBFS and CONFIG_FSP_M_CBFS
+#
+FSPFD_hash="c500166a8553a80ba8db8b8185a896e0ae1562ea3c139e07acd9e7937baf8110ba743cc79b69db09a5f39c076d1d22bc45045223975f46aea2034ba82a6b0360"
+
 # We will use deguard to disable the Intel Boot Guard:
 ME11bootguard="y"
 ME11delta="optiplex_3050" # subdirectory under deguard's data/delta/
diff --git a/config/vendor/t480/pkg.cfg b/config/vendor/t480/pkg.cfg
index d692821d..0ccb7e3b 100644
--- a/config/vendor/t480/pkg.cfg
+++ b/config/vendor/t480/pkg.cfg
@@ -3,6 +3,13 @@ DL_hash="df735a24242792bf4150f30bf0bd4fdbdc0fb6bf0f897ea533df32567be8e084006d692
 DL_url="https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
 DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
 
+# for Fsp.fd, we don't rely on a download. Instead,
+# we copy from coreboot.git. The file is defined
+# by CONFIG_FSP_FD_PATH, split to CONFIG_FSP_M_FILE and CONFIG_FSP_S_FILE
+# and inserted to CBFS with names CONFIG_FSP_S_CBFS and CONFIG_FSP_M_CBFS
+#
+FSPFD_hash="c500166a8553a80ba8db8b8185a896e0ae1562ea3c139e07acd9e7937baf8110ba743cc79b69db09a5f39c076d1d22bc45045223975f46aea2034ba82a6b0360"
+
 # We will use deguard to disable the Intel Boot Guard:
 ME11bootguard="y"
 ME11delta="thinkpad_t480" # subdirectory under deguard's data/delta/
diff --git a/config/vendor/t480s/pkg.cfg b/config/vendor/t480s/pkg.cfg
index e88b2f00..0a75e0b3 100644
--- a/config/vendor/t480s/pkg.cfg
+++ b/config/vendor/t480s/pkg.cfg
@@ -2,6 +2,13 @@ DL_hash="df735a24242792bf4150f30bf0bd4fdbdc0fb6bf0f897ea533df32567be8e084006d692
 DL_url="https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
 DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
 
+# for Fsp.fd, we don't rely on a download. Instead,
+# we copy from coreboot.git. The file is defined
+# by CONFIG_FSP_FD_PATH, split to CONFIG_FSP_M_FILE and CONFIG_FSP_S_FILE
+# and inserted to CBFS with names CONFIG_FSP_S_CBFS and CONFIG_FSP_M_CBFS
+#
+FSPFD_hash="c500166a8553a80ba8db8b8185a896e0ae1562ea3c139e07acd9e7937baf8110ba743cc79b69db09a5f39c076d1d22bc45045223975f46aea2034ba82a6b0360"
+
 # We will use deguard to disable the Intel Boot Guard:
 ME11bootguard="y"
 ME11delta="thinkpad_t480s" # subdirectory under deguard's data/delta/
diff --git a/include/lib.sh b/include/lib.sh
index c765f6b8..92651c84 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -14,6 +14,16 @@ tmpgit="$PWD/tmp/gitclone"
 grubdata="config/data/grub"
 err="err_"
 
+pyver="2"
+python="python3"
+which python3 1>/dev/null || python="python"
+which $python 1>/dev/null || pyver=""
+[ -n "$pyver" ] && pyver="$($python --version | awk '{print $2}')"
+if [ "${pyver%%.*}" != "3" ]; then
+	printf "Wrong python version, or python missing. Must be v 3.x.\n" 1>&2
+	exit 1
+fi
+
 err_()
 {
 	printf "ERROR %s: %s\n" "$0" "$1" 1>&2; exit 1
@@ -185,8 +195,11 @@ singletree()
 	done; return 0
 }
 
+# can grab from the internet, or copy locally.
+# if copying locally, it can only copy a file.
 download()
 {
+	_dlop="curl" && [ $# -gt 4 ] && _dlop="$5"
 	cached="$XBMK_CACHE/file/$4"
 	dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum
 	vendor_checksum "$4" "$cached" 2>/dev/null && dl_fail="y"
@@ -197,8 +210,21 @@ download()
 		[ "$dl_fail" = "n" ] && break
 		[ -z "$url" ] && continue
 		rm -f "$cached" || $err "!rm -f '$cached'"
-		curl --location --retry 3 -A "$_ua" "$url" -o "$cached" || \
-		    wget --tries 3 -U "$_ua" "$url" -O "$cached" || continue
+		if [ "$_dlop" = "curl" ]; then
+			curl --location --retry 3 -A "$_ua" "$url" \
+			    -o "$cached" || wget --tries 3 -U "$_ua" "$url" \
+			    -O "$cached" || continue
+		elif [ "$_dlop" = "copy" ]; then
+			[ -L "$url" ] && \
+				printf "dl %s %s %s %s: '%s' is a symlink\n" \
+				    "$1" "$2" "$3" "$4" "$url" 1>&2 && continue
+			[ ! -f "$url" ] && \
+				printf "dl %s %s %s %s: '%s' not a file\n" \
+				    "$1" "$2" "$3" "$4" "$url" 1>&2 && continue
+			cp "$url" "$cached" || continue
+		else
+			$err "$1 $2 $3 $4: Unsupported dlop type: '$_dlop'"
+		fi
 		vendor_checksum "$4" "$cached" || dl_fail="n"
 	done; [ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: not downloaded"
 	[ "$cached" = "$3" ] || cp "$cached" "$3" || $err "!d cp $cached $3"; :
diff --git a/include/vendor.sh b/include/vendor.sh
index 43f77f84..0af6059b 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -17,7 +17,9 @@ cv="CONFIG_HAVE_ME_BIN CONFIG_ME_BIN_PATH CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \
     CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_BOARD_DELL_E6400 \
     CONFIG_HAVE_MRC CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB \
     CONFIG_REFCODE_BLOB_FILE CONFIG_GBE_BIN_PATH CONFIG_IFD_BIN_PATH \
-    CONFIG_LENOVO_TBFW_BIN"
+    CONFIG_LENOVO_TBFW_BIN CONFIG_FSP_FD_PATH CONFIG_FSP_M_FILE \
+    CONFIG_FSP_S_FILE CONFIG_FSP_S_CBFS CONFIG_FSP_M_CBFS CONFIG_FSP_USE_REPO \
+    CONFIG_FSP_FULL_FD"
 
 eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
@@ -26,7 +28,7 @@ eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref vrelease \
     verify _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch \
     IFD_platform ifdprefix cdir sdir _me _metmp mfs TBFW_url_bkup TBFW_url \
-    TBFW_hash TBFW_size $cv`
+    TBFW_hash TBFW_size FSPFD_hash $cv`
 
 vendor_download()
 {
@@ -55,7 +57,7 @@ readkconfig()
 
 	for c in CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
 	    CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \
-	    CONFIG_LENOVO_TBFW_BIN; do
+	    CONFIG_LENOVO_TBFW_BIN CONFIG_FSP_M_FILE CONFIG_FSP_S_FILE; do
 		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
 		eval "[ -z \"\${$c}\" ] && continue"
 		eval `setcfg "config/vendor/$vcfg/pkg.cfg"`; return 0
@@ -87,21 +89,39 @@ getfiles()
 	[ -z "$CONFIG_HAVE_MRC" ] || fetch "mrc" "$MRC_url" "$MRC_url_bkup" \
 	    "$MRC_hash" "$CONFIG_MRC_FILE"
 	[ -z "$CONFIG_LENOVO_TBFW_BIN" ] || fetch "tbfw" "$TBFW_url" \
-	    "$TBFW_url_bkup" "$TBFW_hash" "$CONFIG_LENOVO_TBFW_BIN"; return 0
+	    "$TBFW_url_bkup" "$TBFW_hash" "$CONFIG_LENOVO_TBFW_BIN"
+	#
+	# in the future, we might have libre fsp-s and then fsp-m.
+	# therefore, handle them separately, in case one of them is libre; if
+	# one of them was, the path wouldn't be set.
+	#
+	[ -z "$CONFIG_FSP_M_FILE" ] || fetch "fspm" "$CONFIG_FSP_FD_PATH" \
+	    "$CONFIG_FSP_FD_PATH" "$FSPFD_hash" "$CONFIG_FSP_M_FILE" copy
+	[ -z "$CONFIG_FSP_S_FILE" ] || fetch "fsps" "$CONFIG_FSP_FD_PATH" \
+	    "$CONFIG_FSP_FD_PATH" "$FSPFD_hash" "$CONFIG_FSP_S_FILE" copy; :
 }
 
 fetch()
 {
 	dl_type="$1"; dl="$2"; dl_bkup="$3"; dlsum="$4"; _dest="${5##*../}"
 	[ "$5" = "/dev/null" ] && return 0; _dl="$XBMK_CACHE/file/$dlsum"
+	if [ "$dl_type" = "fspm" ] || [ "$dl_type" = "fsps" ]; then
+		# HACK: if grabbing fsp from coreboot, fix the path for lbmk
+		for _cdl in dl dl_bkup; do
+			eval "$_cdl=\"\${$_cdl##*../}\"; _cdp=\"\$$_cdl\""
+			[ -f "$_cdp" ] || _cdp="$cbdir/$_cdp"
+			[ -f "$_cdp" ] && eval "$_cdl=\"$_cdp\""
+		done
+	fi
 
-	download "$dl" "$dl_bkup" "$_dl" "$dlsum"
+	dlop="curl" && [ $# -gt 5 ] && dlop="$6"
+	download "$dl" "$dl_bkup" "$_dl" "$dlsum" "$dlop"
 
 	rm -Rf "${_dl}_extracted" || $err "!rm -Rf ${_ul}_extracted"
 	e "$_dest" f && return 0
 
 	mkdir -p "${_dest%/*}" || $err "mkdirs: !mkdir -p ${_dest%/*}"
-	remkdir "$appdir"; extract_archive "$_dl" "$appdir" || \
+	remkdir "$appdir"; extract_archive "$_dl" "$appdir" "$dl_type" || \
 	    [ "$dl_type" = "e6400vga" ] || $err "mkd $_dest $dl_type: !extract"
 
 	eval "extract_$dl_type"; set -u -e
@@ -181,6 +201,13 @@ apply_me11_deguard_mod()
 
 extract_archive()
 {
+	if [ $# -gt 2 ]; then
+		if [ "$3" = "fspm" ] || [ "$3" = "fsps" ]; then
+			decat_fspfd "$1" "$2"
+			return 0
+		fi
+	fi
+
 	innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
 	    "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
 
@@ -188,6 +215,16 @@ extract_archive()
 	    $err "!mv '${_dl}_extracted' '$2'"; :
 }
 
+decat_fspfd()
+{
+	_fspfd="$1"
+	_fspdir="$2"
+	_fspsplit="$cbdir/3rdparty/fsp/Tools/SplitFspBin.py"
+
+	$python "$_fspsplit" split -f "$_fspfd" -o "$_fspdir" -n "Fsp.fd" || \
+	    $err "decat_fspfd '$1' '$2': Cannot de-concatenate"; :
+}
+
 extract_kbc1126ec()
 {
 	e "$kbc1126_ec_dump" f missing && $err "$cbdir: kbc1126 util missing"
@@ -256,6 +293,23 @@ extract_tbfw()
 	cp "tmp/tb.bin" "$_dest" || $err "extract_tbfw $_dest: copy error"; :
 }
 
+extract_fspm()
+{
+	copy_fsp M; :
+}
+
+extract_fsps()
+{
+	copy_fsp S; :
+}
+
+# this copies the fsp s/m; re-base is handled by ./mk inject
+copy_fsp()
+{
+	cp "$appdir/Fsp_$1.fd" "$_dest" || \
+	    $err "copy_fsp: Can't copy $1 to $_dest"; :
+}
+
 vendor_inject()
 {
 	set +u +e; [ $# -lt 1 ] && $err "No options specified."
@@ -381,6 +435,23 @@ patch_rom()
 	[ "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" = "y" ] && \
 	    [ -n "$CONFIG_SMSC_SCH5545_EC_FW_FILE" ] && \
 		inject sch5545_ecfw.bin "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
+	#
+	# coreboot adds FSP-M first. so we shall add it first, then S:
+	# NOTE:
+	# We skip the fetch if CONFIG_FSP_USE_REPO or CONFIG_FSP_FULL_FD is set
+	# but only for inject/nuke. we still run fetch (see above) because on
+	# _fsp targets, coreboot still needs them, but coreboot Kconfig uses
+	# makefile syntax and puts $(obj) in the path, which makes no sense
+	# in sh. So we modify the path there, but lbmk only uses the file
+	# in vendorfiles/ if neither CONFIG_FSP_USE_REPO nor CONFIG_FSP_FULL_FD
+	# are set
+	#
+	[ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \
+	   [ -n "$CONFIG_FSP_M_FILE" ] && \
+		inject "$CONFIG_FSP_M_CBFS" "$CONFIG_FSP_M_FILE" fsp --xip
+	[ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \
+	   [ -n "$CONFIG_FSP_S_FILE" ] && \
+		inject "$CONFIG_FSP_S_CBFS" "$CONFIG_FSP_S_FILE" fsp
 	[ -n "$new_mac" ] && [ "$vrelease" != "y" ] && modify_gbe "$rom"
 
 	printf "ROM image successfully patched: %s\n" "$rom"
@@ -394,8 +465,12 @@ inject()
 	eval `setvars "" cbfsname _dest _t _offset`
 	cbfsname="$1"; _dest="${2##*../}"; _t="$3"
 
-	[ $# -gt 3 ] && _offset="-b $4" && [ -z "$4" ] && \
-	    $err "inject $@, $rom: offset passed, but empty (not defined)"
+	if [ "$_t" = "fsp" ]; then
+		[ $# -gt 3 ] && _offset="$4"
+	else
+		[ $# -gt 3 ] && _offset="-b $4" && [ -z "$4" ] && \
+		    $err "inject $@, $rom: offset given but empty (undefined)"
+	fi
 
 	e "$_dest" f n && [ "$nukemode" != "nuke" ] && $err "!inject $dl_type"
 

From b5da9feba3b147019384e198c310209746337d62 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 26 Dec 2024 22:13:46 +0000
Subject: [PATCH 0947/1549] vendor.sh: Print useful message on ./mk inject

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/vendor.sh b/include/vendor.sh
index 0af6059b..aa7256c4 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -329,6 +329,8 @@ vendor_inject()
 	[ "$nukemode" = "nuke" ] || x_ ./mk download $board
 	if [ "$vrelease" = "y" ]; then
 		patch_release_roms
+		printf "\nPatched images saved to bin/release/%s/\n" \
+		    "$board"
 	else
 		patch_rom "$rom" || :
 	fi; :

From d591ea4c5dc90cfea96b780278fb36eafae03f0a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 26 Dec 2024 23:47:48 +0000
Subject: [PATCH 0948/1549] git.sh: don't initialise livepull globally

set this variable in the tmpclone function. otherwise,
certain submodules might always download every time,
when handling multiple projects.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 2c43cd22..77a22763 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -91,10 +91,9 @@ fetch_submodule()
 	    "$mdir/${1##*/}/patches"
 }
 
-livepull="n"
 tmpclone()
 {
-	[ "$repofail" = "y" ] && \
+	livepull="n" && [ "$repofail" = "y" ] && \
 	    printf "Cached clone failed; trying online.\n" 1>&2 && livepull="y"
 
 	repofail="n"

From 8f370cb60d9386bf584036245a8e5c273e8d393c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 27 Dec 2024 02:23:13 +0000
Subject: [PATCH 0949/1549] add spdx headers to various config files

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/coreboot413/target.cfg                        | 2 ++
 config/coreboot/d510mo/target.cfg                             | 2 ++
 config/coreboot/d510mo_16mb/target.cfg                        | 2 ++
 config/coreboot/d945gclf_512kb/target.cfg                     | 2 ++
 config/coreboot/d945gclf_8mb/target.cfg                       | 2 ++
 config/coreboot/default/target.cfg                            | 2 ++
 config/coreboot/dell3050micro_fsp_16mb/target.cfg             | 2 ++
 config/coreboot/dell3050micro_vfsp_16mb/target.cfg            | 4 +++-
 config/coreboot/dell7010sff_12mb/target.cfg                   | 4 +++-
 config/coreboot/dell780mt_8mb/target.cfg                      | 4 +++-
 config/coreboot/dell780mt_truncate_8mb/target.cfg             | 4 +++-
 config/coreboot/dell780usff_8mb/target.cfg                    | 4 +++-
 config/coreboot/dell780usff_truncate_8mb/target.cfg           | 4 +++-
 config/coreboot/dell9020mt_nri_12mb/target.cfg                | 4 +++-
 config/coreboot/dell9020sff_nri_12mb/target.cfg               | 4 +++-
 config/coreboot/e4300_4mb/target.cfg                          | 4 +++-
 config/coreboot/e5420_6mb/target.cfg                          | 4 +++-
 config/coreboot/e5520_6mb/target.cfg                          | 4 +++-
 config/coreboot/e5530_12mb/target.cfg                         | 4 +++-
 config/coreboot/e6220_10mb/target.cfg                         | 4 +++-
 config/coreboot/e6230_12mb/target.cfg                         | 4 +++-
 config/coreboot/e6320_10mb/target.cfg                         | 4 +++-
 config/coreboot/e6330_12mb/target.cfg                         | 4 +++-
 config/coreboot/e6400_4mb/target.cfg                          | 4 +++-
 config/coreboot/e6400nvidia_4mb/target.cfg                    | 2 ++
 config/coreboot/e6420_10mb/target.cfg                         | 4 +++-
 config/coreboot/e6430_12mb/target.cfg                         | 4 +++-
 config/coreboot/e6520_10mb/target.cfg                         | 4 +++-
 config/coreboot/e6530_12mb/target.cfg                         | 4 +++-
 config/coreboot/fam15h/target.cfg                             | 2 ++
 config/coreboot/g43t_am3/target.cfg                           | 4 +++-
 config/coreboot/g43t_am3_16mb/target.cfg                      | 4 +++-
 config/coreboot/ga_g41m_es2l/target.cfg                       | 2 ++
 config/coreboot/gru_bob/target.cfg                            | 2 ++
 config/coreboot/gru_kevin/target.cfg                          | 2 ++
 config/coreboot/hp2170p_16mb/target.cfg                       | 4 +++-
 config/coreboot/hp2560p_8mb/target.cfg                        | 4 +++-
 config/coreboot/hp2570p_16mb/target.cfg                       | 4 +++-
 config/coreboot/hp8200sff_4mb/target.cfg                      | 4 +++-
 config/coreboot/hp8200sff_8mb/target.cfg                      | 4 +++-
 config/coreboot/hp820g2_12mb/target.cfg                       | 4 +++-
 config/coreboot/hp8300cmt_16mb/target.cfg                     | 4 +++-
 config/coreboot/hp8300usdt_16mb/target.cfg                    | 4 +++-
 config/coreboot/hp8460pintel_8mb/target.cfg                   | 4 +++-
 config/coreboot/hp8470pintel_16mb/target.cfg                  | 4 +++-
 config/coreboot/hp8560w_8mb/target.cfg                        | 2 ++
 config/coreboot/hp9470m_16mb/target.cfg                       | 4 +++-
 config/coreboot/kcma_d8_16mb/target.cfg                       | 4 +++-
 config/coreboot/kcma_d8_2mb/target.cfg                        | 4 +++-
 config/coreboot/kfsn4_dre_1mb/target.cfg                      | 4 +++-
 config/coreboot/kfsn4_dre_2mb/target.cfg                      | 4 +++-
 config/coreboot/kgpe_d16_16mb/target.cfg                      | 4 +++-
 config/coreboot/kgpe_d16_2mb/target.cfg                       | 4 +++-
 config/coreboot/macbook11/target.cfg                          | 2 ++
 config/coreboot/macbook11_16mb/target.cfg                     | 2 ++
 config/coreboot/macbook21/target.cfg                          | 4 +++-
 config/coreboot/macbook21_16mb/target.cfg                     | 4 +++-
 config/coreboot/next/target.cfg                               | 2 ++
 config/coreboot/qemu_arm64_12mb/target.cfg                    | 2 ++
 config/coreboot/qemu_x86_12mb/target.cfg                      | 2 ++
 config/coreboot/qemu_x86_64_12mb/target.cfg                   | 2 ++
 config/coreboot/r400_16mb/target.cfg                          | 4 +++-
 config/coreboot/r400_4mb/target.cfg                           | 4 +++-
 config/coreboot/r400_8mb/target.cfg                           | 4 +++-
 config/coreboot/r500_4mb/target.cfg                           | 4 +++-
 config/coreboot/t1650_12mb/target.cfg                         | 4 +++-
 config/coreboot/t400_16mb/target.cfg                          | 4 +++-
 config/coreboot/t400_4mb/target.cfg                           | 4 +++-
 config/coreboot/t400_8mb/target.cfg                           | 4 +++-
 config/coreboot/t420_8mb/target.cfg                           | 4 +++-
 config/coreboot/t420s_8mb/target.cfg                          | 4 +++-
 config/coreboot/t430_12mb/target.cfg                          | 4 +++-
 config/coreboot/t440plibremrc_12mb/target.cfg                 | 4 +++-
 config/coreboot/t480_fsp_16mb/target.cfg                      | 2 ++
 config/coreboot/t480_vfsp_16mb/target.cfg                     | 2 ++
 config/coreboot/t480s_fsp_16mb/target.cfg                     | 2 ++
 config/coreboot/t480s_vfsp_16mb/target.cfg                    | 2 ++
 config/coreboot/t500_16mb/target.cfg                          | 4 +++-
 config/coreboot/t500_4mb/target.cfg                           | 4 +++-
 config/coreboot/t500_8mb/target.cfg                           | 4 +++-
 config/coreboot/t520_8mb/target.cfg                           | 4 +++-
 config/coreboot/t530_12mb/target.cfg                          | 4 +++-
 config/coreboot/t60_16mb_intelgpu/target.cfg                  | 2 ++
 config/coreboot/t60_intelgpu/target.cfg                       | 2 ++
 config/coreboot/w500_16mb/target.cfg                          | 4 +++-
 config/coreboot/w500_4mb/target.cfg                           | 4 +++-
 config/coreboot/w500_8mb/target.cfg                           | 4 +++-
 config/coreboot/w530_12mb/target.cfg                          | 4 +++-
 config/coreboot/w541_12mb/target.cfg                          | 4 +++-
 config/coreboot/x200_16mb/target.cfg                          | 4 +++-
 config/coreboot/x200_4mb/target.cfg                           | 4 +++-
 config/coreboot/x200_8mb/target.cfg                           | 4 +++-
 config/coreboot/x220_8mb/target.cfg                           | 4 +++-
 config/coreboot/x230_12mb/target.cfg                          | 4 +++-
 config/coreboot/x230_16mb/target.cfg                          | 4 +++-
 config/coreboot/x230t_12mb/target.cfg                         | 4 +++-
 config/coreboot/x230t_16mb/target.cfg                         | 4 +++-
 config/coreboot/x301_16mb/target.cfg                          | 4 +++-
 config/coreboot/x301_4mb/target.cfg                           | 4 +++-
 config/coreboot/x301_8mb/target.cfg                           | 4 +++-
 config/coreboot/x60/target.cfg                                | 2 ++
 config/coreboot/x60_16mb/target.cfg                           | 2 ++
 config/data/coreboot/mkhelper.cfg                             | 2 ++
 config/data/grub/mkhelper.cfg                                 | 2 ++
 config/data/grub/module/default                               | 2 ++
 config/data/grub/module/nvme                                  | 2 ++
 config/data/grub/module/xhci                                  | 2 ++
 config/data/pcsx-redux/mkhelper.cfg                           | 2 ++
 config/data/pico-serprog/mkhelper.cfg                         | 2 ++
 config/data/seabios/mkhelper.cfg                              | 0
 config/data/stm32-vserprog/mkhelper.cfg                       | 2 ++
 config/git/bios_extract/pkg.cfg                               | 2 ++
 config/git/biosutilities/pkg.cfg                              | 2 ++
 config/git/coreboot/pkg.cfg                                   | 2 ++
 config/git/deguard/pkg.cfg                                    | 2 ++
 config/git/docs/pkg.cfg                                       | 2 ++
 config/git/flashprog/pkg.cfg                                  | 2 ++
 config/git/gpio-scripts/pkg.cfg                               | 2 ++
 config/git/grub/pkg.cfg                                       | 2 ++
 config/git/int/pkg.cfg                                        | 2 ++
 config/git/memtest86plus/pkg.cfg                              | 2 ++
 config/git/mxmdump/pkg.cfg                                    | 2 ++
 config/git/pcsx-redux/pkg.cfg                                 | 2 ++
 config/git/pico-sdk/pkg.cfg                                   | 2 ++
 config/git/pico-serprog/pkg.cfg                               | 2 ++
 config/git/seabios/pkg.cfg                                    | 2 ++
 config/git/stm32-vserprog/pkg.cfg                             | 2 ++
 config/git/u-boot/pkg.cfg                                     | 2 ++
 config/git/uefitool/pkg.cfg                                   | 2 ++
 config/grub/default/target.cfg                                | 2 ++
 config/grub/nvme/target.cfg                                   | 2 ++
 config/grub/xhci/target.cfg                                   | 2 ++
 config/pcsx-redux/target.cfg                                  | 2 ++
 config/seabios/default/target.cfg                             | 2 ++
 config/submodule/coreboot/coreboot413/vboot/module.cfg        | 2 ++
 .../coreboot/default/acpica-unix-20230628.tar.gz/module.cfg   | 2 ++
 .../coreboot/default/arm-trusted-firmware/module.cfg          | 2 ++
 .../coreboot/default/binutils-2.42.tar.xz/module.cfg          | 2 ++
 .../submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg   | 2 ++
 config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg | 2 ++
 config/submodule/coreboot/default/intel-microcode/module.cfg  | 2 ++
 config/submodule/coreboot/default/libgfxinit/module.cfg       | 2 ++
 config/submodule/coreboot/default/libhwbase/module.cfg        | 2 ++
 config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg | 2 ++
 .../submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg   | 2 ++
 .../coreboot/default/nasm-2.16.03.tar.bz2/module.cfg          | 2 ++
 config/submodule/coreboot/default/vboot/module.cfg            | 2 ++
 .../coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg   | 2 ++
 .../submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg | 2 ++
 config/submodule/coreboot/fam15h/blobs/module.cfg             | 2 ++
 config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg  | 2 ++
 config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg  | 2 ++
 config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg  | 2 ++
 config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg | 2 ++
 .../submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg | 2 ++
 config/submodule/coreboot/fam15h/vboot/module.cfg             | 2 ++
 .../coreboot/next/acpica-unix-20230628.tar.gz/module.cfg      | 2 ++
 .../submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg | 2 ++
 config/submodule/coreboot/next/fsp/module.cfg                 | 2 ++
 config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg   | 2 ++
 config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg    | 2 ++
 config/submodule/coreboot/next/intel-microcode/module.cfg     | 2 ++
 config/submodule/coreboot/next/libgfxinit/module.cfg          | 2 ++
 config/submodule/coreboot/next/libhwbase/module.cfg           | 2 ++
 config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg    | 2 ++
 config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg   | 2 ++
 .../submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg   | 2 ++
 config/submodule/coreboot/next/vboot/module.cfg               | 2 ++
 config/submodule/docs/html/module.cfg                         | 2 ++
 config/submodule/docs/img/module.cfg                          | 2 ++
 config/submodule/docs/untitled/module.cfg                     | 2 ++
 config/submodule/grub/default/gnulib/module.cfg               | 2 ++
 config/submodule/grub/nvme/gnulib/module.cfg                  | 2 ++
 config/submodule/grub/xhci/gnulib/module.cfg                  | 2 ++
 config/submodule/pcsx-redux/uC-sdk/module.cfg                 | 2 ++
 config/submodule/pico-sdk/tinyusb/module.cfg                  | 2 ++
 config/submodule/stm32-vserprog/libopencm3/module.cfg         | 2 ++
 config/u-boot/amd64coreboot/target.cfg                        | 2 ++
 config/u-boot/default/target.cfg                              | 2 ++
 config/u-boot/gru_bob/target.cfg                              | 2 ++
 config/u-boot/gru_kevin/target.cfg                            | 2 ++
 config/u-boot/i386coreboot/target.cfg                         | 2 ++
 config/u-boot/qemu_arm64_12mb/target.cfg                      | 2 ++
 config/u-boot/x86/target.cfg                                  | 2 ++
 config/u-boot/x86_64/target.cfg                               | 2 ++
 config/uefitool/target.cfg                                    | 2 ++
 config/vendor/3050micro/pkg.cfg                               | 2 ++
 config/vendor/e6400/pkg.cfg                                   | 2 ++
 config/vendor/haswell/pkg.cfg                                 | 2 ++
 config/vendor/hp2170p/pkg.cfg                                 | 2 ++
 config/vendor/hp2560p/pkg.cfg                                 | 2 ++
 config/vendor/hp2570p/pkg.cfg                                 | 2 ++
 config/vendor/hp8200sff/pkg.cfg                               | 2 ++
 config/vendor/hp820g2/pkg.cfg                                 | 2 ++
 config/vendor/hp8460pintel/pkg.cfg                            | 2 ++
 config/vendor/hp8470pintel/pkg.cfg                            | 2 ++
 config/vendor/hp8560w/pkg.cfg                                 | 2 ++
 config/vendor/hp9470m/pkg.cfg                                 | 2 ++
 config/vendor/ivybridge/pkg.cfg                               | 2 ++
 config/vendor/sandybridge/pkg.cfg                             | 2 ++
 config/vendor/t1650/pkg.cfg                                   | 2 ++
 config/vendor/t480/pkg.cfg                                    | 2 ++
 config/vendor/t480s/pkg.cfg                                   | 2 ++
 203 files changed, 479 insertions(+), 75 deletions(-)
 delete mode 100644 config/data/seabios/mkhelper.cfg

diff --git a/config/coreboot/coreboot413/target.cfg b/config/coreboot/coreboot413/target.cfg
index 5c2823e3..a0aae341 100644
--- a/config/coreboot/coreboot413/target.cfg
+++ b/config/coreboot/coreboot413/target.cfg
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="coreboot413"
 rev="5c186c6777c9438ff4681929c9c25c98dee28bef"
diff --git a/config/coreboot/d510mo/target.cfg b/config/coreboot/d510mo/target.cfg
index bb79aee5..e6c6d033 100644
--- a/config/coreboot/d510mo/target.cfg
+++ b/config/coreboot/d510mo/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/d510mo_16mb/target.cfg b/config/coreboot/d510mo_16mb/target.cfg
index 62768ec7..cbb93fc1 100644
--- a/config/coreboot/d510mo_16mb/target.cfg
+++ b/config/coreboot/d510mo_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/d945gclf_512kb/target.cfg b/config/coreboot/d945gclf_512kb/target.cfg
index d2d78f7a..8bddc19c 100644
--- a/config/coreboot/d945gclf_512kb/target.cfg
+++ b/config/coreboot/d945gclf_512kb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/d945gclf_8mb/target.cfg b/config/coreboot/d945gclf_8mb/target.cfg
index 0d97499e..447dc86b 100644
--- a/config/coreboot/d945gclf_8mb/target.cfg
+++ b/config/coreboot/d945gclf_8mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/default/target.cfg b/config/coreboot/default/target.cfg
index 3a773b43..9de01b28 100644
--- a/config/coreboot/default/target.cfg
+++ b/config/coreboot/default/target.cfg
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 rev="97bc693abc482139774a656212935387d43df8e2"
diff --git a/config/coreboot/dell3050micro_fsp_16mb/target.cfg b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
index 910d2b38..b6e6c722 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/target.cfg
+++ b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="next"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/dell3050micro_vfsp_16mb/target.cfg b/config/coreboot/dell3050micro_vfsp_16mb/target.cfg
index 8ab796e4..d08c4eb5 100644
--- a/config/coreboot/dell3050micro_vfsp_16mb/target.cfg
+++ b/config/coreboot/dell3050micro_vfsp_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="next"
 xarch="i386-elf"
 payload_seabios="y"
@@ -8,4 +10,4 @@ grubtree="xhci"
 vcfg="3050micro"
 build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
 IFD_platform="sklkbl"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/dell7010sff_12mb/target.cfg b/config/coreboot/dell7010sff_12mb/target.cfg
index aa08547a..de6a8af8 100644
--- a/config/coreboot/dell7010sff_12mb/target.cfg
+++ b/config/coreboot/dell7010sff_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="t1650"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/dell780mt_8mb/target.cfg b/config/coreboot/dell780mt_8mb/target.cfg
index 50ea82b6..e2f4d8a3 100644
--- a/config/coreboot/dell780mt_8mb/target.cfg
+++ b/config/coreboot/dell780mt_8mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="next"
 xarch="i386-elf"
 payload_seabios="y"
@@ -6,4 +8,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/dell780mt_truncate_8mb/target.cfg b/config/coreboot/dell780mt_truncate_8mb/target.cfg
index 50ea82b6..e2f4d8a3 100644
--- a/config/coreboot/dell780mt_truncate_8mb/target.cfg
+++ b/config/coreboot/dell780mt_truncate_8mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="next"
 xarch="i386-elf"
 payload_seabios="y"
@@ -6,4 +8,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/dell780usff_8mb/target.cfg b/config/coreboot/dell780usff_8mb/target.cfg
index 50ea82b6..e2f4d8a3 100644
--- a/config/coreboot/dell780usff_8mb/target.cfg
+++ b/config/coreboot/dell780usff_8mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="next"
 xarch="i386-elf"
 payload_seabios="y"
@@ -6,4 +8,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/dell780usff_truncate_8mb/target.cfg b/config/coreboot/dell780usff_truncate_8mb/target.cfg
index 50ea82b6..e2f4d8a3 100644
--- a/config/coreboot/dell780usff_truncate_8mb/target.cfg
+++ b/config/coreboot/dell780usff_truncate_8mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="next"
 xarch="i386-elf"
 payload_seabios="y"
@@ -6,4 +8,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/dell9020mt_nri_12mb/target.cfg b/config/coreboot/dell9020mt_nri_12mb/target.cfg
index 5be15ac2..96fbb9e3 100644
--- a/config/coreboot/dell9020mt_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_nri_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
 build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/dell9020sff_nri_12mb/target.cfg b/config/coreboot/dell9020sff_nri_12mb/target.cfg
index 5be15ac2..96fbb9e3 100644
--- a/config/coreboot/dell9020sff_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_nri_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
 build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/e4300_4mb/target.cfg b/config/coreboot/e4300_4mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/e4300_4mb/target.cfg
+++ b/config/coreboot/e4300_4mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index 27291f4d..333030ce 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index 27291f4d..333030ce 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index c0b56379..6cbab731 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/e6220_10mb/target.cfg b/config/coreboot/e6220_10mb/target.cfg
index 27291f4d..333030ce 100644
--- a/config/coreboot/e6220_10mb/target.cfg
+++ b/config/coreboot/e6220_10mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/e6230_12mb/target.cfg b/config/coreboot/e6230_12mb/target.cfg
index 5bd85905..b491fdc8 100644
--- a/config/coreboot/e6230_12mb/target.cfg
+++ b/config/coreboot/e6230_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -6,4 +8,4 @@ payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
 payload_uboot_amd64="y"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/e6320_10mb/target.cfg b/config/coreboot/e6320_10mb/target.cfg
index 27291f4d..333030ce 100644
--- a/config/coreboot/e6320_10mb/target.cfg
+++ b/config/coreboot/e6320_10mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/e6330_12mb/target.cfg b/config/coreboot/e6330_12mb/target.cfg
index c0b56379..6cbab731 100644
--- a/config/coreboot/e6330_12mb/target.cfg
+++ b/config/coreboot/e6330_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index a0b322d3..b999b10c 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="e6400"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
index 98eb8d3b..e87c8f32 100644
--- a/config/coreboot/e6400nvidia_4mb/target.cfg
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index 27291f4d..333030ce 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index c0b56379..6cbab731 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index 27291f4d..333030ce 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index c0b56379..6cbab731 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/fam15h/target.cfg b/config/coreboot/fam15h/target.cfg
index 1056920a..1d4271e4 100644
--- a/config/coreboot/fam15h/target.cfg
+++ b/config/coreboot/fam15h/target.cfg
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="fam15h"
 rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
diff --git a/config/coreboot/g43t_am3/target.cfg b/config/coreboot/g43t_am3/target.cfg
index 7bc27788..3379b716 100644
--- a/config/coreboot/g43t_am3/target.cfg
+++ b/config/coreboot/g43t_am3/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/g43t_am3_16mb/target.cfg b/config/coreboot/g43t_am3_16mb/target.cfg
index bef863ee..f2f0a52d 100644
--- a/config/coreboot/g43t_am3_16mb/target.cfg
+++ b/config/coreboot/g43t_am3_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_memtest="y"
 release="n"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/ga_g41m_es2l/target.cfg b/config/coreboot/ga_g41m_es2l/target.cfg
index 7f3d7886..3d046df2 100644
--- a/config/coreboot/ga_g41m_es2l/target.cfg
+++ b/config/coreboot/ga_g41m_es2l/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/gru_bob/target.cfg b/config/coreboot/gru_bob/target.cfg
index 482ff306..e5866cb7 100644
--- a/config/coreboot/gru_bob/target.cfg
+++ b/config/coreboot/gru_bob/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
diff --git a/config/coreboot/gru_kevin/target.cfg b/config/coreboot/gru_kevin/target.cfg
index 993bf617..81a93f27 100644
--- a/config/coreboot/gru_kevin/target.cfg
+++ b/config/coreboot/gru_kevin/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index f12beab7..e1cffa41 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2170p"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index a3f8ba84..5715390e 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2560p"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index d899d7d9..fb5d41e1 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2570p"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 8d18ae23..521ba0ec 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="hp8200sff"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 8d18ae23..521ba0ec 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="hp8200sff"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index be150000..f94fb6aa 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -8,4 +10,4 @@ grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="hp820g2"
 build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index 7cbc8dad..5bd323c9 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="ivybridge"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index c0b56379..6cbab731 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index 5897b9bc..d6179420 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8460pintel"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index 72e64b8a..65828b25 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8470pintel"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg
index 7bad4889..d1eb695f 100644
--- a/config/coreboot/hp8560w_8mb/target.cfg
+++ b/config/coreboot/hp8560w_8mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index 4580be7b..e4dbdc93 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp9470m"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/kcma_d8_16mb/target.cfg b/config/coreboot/kcma_d8_16mb/target.cfg
index b0ab3d02..112c101f 100644
--- a/config/coreboot/kcma_d8_16mb/target.cfg
+++ b/config/coreboot/kcma_d8_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="fam15h"
 xarch="i386-elf"
 payload_seabios="y"
@@ -7,4 +9,4 @@ xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/kcma_d8_2mb/target.cfg b/config/coreboot/kcma_d8_2mb/target.cfg
index b0ab3d02..112c101f 100644
--- a/config/coreboot/kcma_d8_2mb/target.cfg
+++ b/config/coreboot/kcma_d8_2mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="fam15h"
 xarch="i386-elf"
 payload_seabios="y"
@@ -7,4 +9,4 @@ xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/kfsn4_dre_1mb/target.cfg b/config/coreboot/kfsn4_dre_1mb/target.cfg
index c5759ac8..a87ac1ad 100644
--- a/config/coreboot/kfsn4_dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_1mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="fam15h"
 xarch="i386-elf"
 payload_seabios="y"
 payload_memtest="y"
 xlang="c"
 build_depend="seabios/default memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/kfsn4_dre_2mb/target.cfg b/config/coreboot/kfsn4_dre_2mb/target.cfg
index 94601104..17021b47 100644
--- a/config/coreboot/kfsn4_dre_2mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_2mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="fam15h"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 xlang="c"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/kgpe_d16_16mb/target.cfg b/config/coreboot/kgpe_d16_16mb/target.cfg
index b0ab3d02..112c101f 100644
--- a/config/coreboot/kgpe_d16_16mb/target.cfg
+++ b/config/coreboot/kgpe_d16_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="fam15h"
 xarch="i386-elf"
 payload_seabios="y"
@@ -7,4 +9,4 @@ xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/kgpe_d16_2mb/target.cfg b/config/coreboot/kgpe_d16_2mb/target.cfg
index b0ab3d02..112c101f 100644
--- a/config/coreboot/kgpe_d16_2mb/target.cfg
+++ b/config/coreboot/kgpe_d16_2mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="fam15h"
 xarch="i386-elf"
 payload_seabios="y"
@@ -7,4 +9,4 @@ xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index 2661c6b2..c1e3a3c6 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index e37b6307..e0d1afbf 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/next/target.cfg b/config/coreboot/next/target.cfg
index be61aab7..371ff259 100644
--- a/config/coreboot/next/target.cfg
+++ b/config/coreboot/next/target.cfg
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="next"
 rev="9992a98c671d356b9770282df5d58a302b6dbeda"
diff --git a/config/coreboot/qemu_arm64_12mb/target.cfg b/config/coreboot/qemu_arm64_12mb/target.cfg
index 980de84f..5d8f0db2 100644
--- a/config/coreboot/qemu_arm64_12mb/target.cfg
+++ b/config/coreboot/qemu_arm64_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="aarch64-elf arm-eabi"
 payload_uboot="y"
diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg
index 218f2fd4..2074beca 100644
--- a/config/coreboot/qemu_x86_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_grub="y"
diff --git a/config/coreboot/qemu_x86_64_12mb/target.cfg b/config/coreboot/qemu_x86_64_12mb/target.cfg
index 5c1a733f..7855bd6f 100644
--- a/config/coreboot/qemu_x86_64_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_64_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_grub="y"
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index ba490833..ef878ea1 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -1,6 +1,8 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index aa08547a..de6a8af8 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="t1650"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index 27291f4d..333030ce 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index 27291f4d..333030ce 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index c0b56379..6cbab731 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index 5be15ac2..96fbb9e3 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
 build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/t480_fsp_16mb/target.cfg b/config/coreboot/t480_fsp_16mb/target.cfg
index 4cd8adec..d0ddd743 100644
--- a/config/coreboot/t480_fsp_16mb/target.cfg
+++ b/config/coreboot/t480_fsp_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="next"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/t480_vfsp_16mb/target.cfg b/config/coreboot/t480_vfsp_16mb/target.cfg
index af89a367..9ac608b7 100644
--- a/config/coreboot/t480_vfsp_16mb/target.cfg
+++ b/config/coreboot/t480_vfsp_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="next"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/t480s_fsp_16mb/target.cfg b/config/coreboot/t480s_fsp_16mb/target.cfg
index 26139a9d..855b0c70 100644
--- a/config/coreboot/t480s_fsp_16mb/target.cfg
+++ b/config/coreboot/t480s_fsp_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="next"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/t480s_vfsp_16mb/target.cfg b/config/coreboot/t480s_vfsp_16mb/target.cfg
index c8835c8f..a7d63ae1 100644
--- a/config/coreboot/t480s_vfsp_16mb/target.cfg
+++ b/config/coreboot/t480s_vfsp_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="next"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index 27291f4d..333030ce 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index c0b56379..6cbab731 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 2661c6b2..c1e3a3c6 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 2661c6b2..c1e3a3c6 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index c0b56379..6cbab731 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index 5be15ac2..96fbb9e3 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
 build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index 0b81f02f..53a597b6 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -1,7 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index 27291f4d..333030ce 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg
index c0b56379..6cbab731 100644
--- a/config/coreboot/x230_12mb/target.cfg
+++ b/config/coreboot/x230_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index c0b56379..6cbab731 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg
index c0b56379..6cbab731 100644
--- a/config/coreboot/x230t_12mb/target.cfg
+++ b/config/coreboot/x230t_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index c0b56379..6cbab731 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index a364653c..4d4a4c25 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index a364653c..4d4a4c25 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index a364653c..4d4a4c25 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
@@ -5,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
\ No newline at end of file
+payload_uboot_amd64="y"
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 2661c6b2..c1e3a3c6 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 2661c6b2..c1e3a3c6 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xarch="i386-elf"
 payload_seabios="y"
diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index a344674c..624d4ec2 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 . "include/rom.sh"
 
 makeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
diff --git a/config/data/grub/mkhelper.cfg b/config/data/grub/mkhelper.cfg
index b75cf9d7..5d66f42f 100644
--- a/config/data/grub/mkhelper.cfg
+++ b/config/data/grub/mkhelper.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 . "include/rom.sh"
 
 bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
diff --git a/config/data/grub/module/default b/config/data/grub/module/default
index 3555ad11..1ee5327f 100755
--- a/config/data/grub/module/default
+++ b/config/data/grub/module/default
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 # Install modules (installed, but not automatically loaded)
 grub_install_modules=" \
 hexdump \
diff --git a/config/data/grub/module/nvme b/config/data/grub/module/nvme
index 503c61c8..a3a2847c 100755
--- a/config/data/grub/module/nvme
+++ b/config/data/grub/module/nvme
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 # Install modules (installed, but not automatically loaded)
 grub_install_modules=" \
 hexdump \
diff --git a/config/data/grub/module/xhci b/config/data/grub/module/xhci
index 6235bbad..ee4d10f7 100755
--- a/config/data/grub/module/xhci
+++ b/config/data/grub/module/xhci
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 # Install modules (installed, but not automatically loaded)
 grub_install_modules=" \
 hexdump \
diff --git a/config/data/pcsx-redux/mkhelper.cfg b/config/data/pcsx-redux/mkhelper.cfg
index 379ad032..af744685 100644
--- a/config/data/pcsx-redux/mkhelper.cfg
+++ b/config/data/pcsx-redux/mkhelper.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 . "include/rom.sh"
 
 postmake="copyps1bios"
diff --git a/config/data/pico-serprog/mkhelper.cfg b/config/data/pico-serprog/mkhelper.cfg
index e424e2f4..d81f1e85 100644
--- a/config/data/pico-serprog/mkhelper.cfg
+++ b/config/data/pico-serprog/mkhelper.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 . "include/rom.sh"
 
 sersrc="src/pico-serprog"
diff --git a/config/data/seabios/mkhelper.cfg b/config/data/seabios/mkhelper.cfg
deleted file mode 100644
index e69de29b..00000000
diff --git a/config/data/stm32-vserprog/mkhelper.cfg b/config/data/stm32-vserprog/mkhelper.cfg
index 8f45d7fd..54b05caf 100644
--- a/config/data/stm32-vserprog/mkhelper.cfg
+++ b/config/data/stm32-vserprog/mkhelper.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 . "include/rom.sh"
 
 sersrc="src/stm32-vserprog"
diff --git a/config/git/bios_extract/pkg.cfg b/config/git/bios_extract/pkg.cfg
index e77bf0a5..8489f385 100644
--- a/config/git/bios_extract/pkg.cfg
+++ b/config/git/bios_extract/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="0a7bc1d71735ef97b00dfec0fd54a02fcc5d1bb0"
 url="https://review.coreboot.org/bios_extract"
 bkup_url="https://github.com/coreboot/bios_extract"
diff --git a/config/git/biosutilities/pkg.cfg b/config/git/biosutilities/pkg.cfg
index a1c02015..7b9ea9d6 100644
--- a/config/git/biosutilities/pkg.cfg
+++ b/config/git/biosutilities/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="03ae0cf0706ede5a2a15da0986c19c776d0e6b26"
 url="https://codeberg.org/libreboot/BIOSUtilities"
 bkup_url="https://github.com/platomav/BIOSUtilities"
diff --git a/config/git/coreboot/pkg.cfg b/config/git/coreboot/pkg.cfg
index f4ed31e8..2a23ee5c 100644
--- a/config/git/coreboot/pkg.cfg
+++ b/config/git/coreboot/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="HEAD"
 url="https://review.coreboot.org/coreboot"
 bkup_url="https://github.com/coreboot/coreboot.git"
diff --git a/config/git/deguard/pkg.cfg b/config/git/deguard/pkg.cfg
index f6d24cf6..300417ca 100644
--- a/config/git/deguard/pkg.cfg
+++ b/config/git/deguard/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="de176a7f20650b272a01efb633931a63128c1647"
 url="https://review.coreboot.org/deguard"
 bkup_url="https://codeberg.org/libreboot/deguard"
diff --git a/config/git/docs/pkg.cfg b/config/git/docs/pkg.cfg
index 9913ee5f..144292fd 100644
--- a/config/git/docs/pkg.cfg
+++ b/config/git/docs/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="e72d055915c3a9ffe739982946e101b146b2483c"
 url="https://codeberg.org/vimuser/untitled"
 bkup_url="https://notabug.org/untitled/untitled"
diff --git a/config/git/flashprog/pkg.cfg b/config/git/flashprog/pkg.cfg
index ff45c7b6..e1a89795 100644
--- a/config/git/flashprog/pkg.cfg
+++ b/config/git/flashprog/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="d128a0ae87086b37c0e5d7a8d934bcdee173402f"
 url="https://review.sourcearcade.org/flashprog"
 bkup_url="https://github.com/SourceArcade/flashprog.git"
diff --git a/config/git/gpio-scripts/pkg.cfg b/config/git/gpio-scripts/pkg.cfg
index 60963e9d..be491070 100644
--- a/config/git/gpio-scripts/pkg.cfg
+++ b/config/git/gpio-scripts/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="be2de1233a70e3cf05ad17b008fd85c862b1ecf9"
 url="https://codeberg.org/libreboot/gpio-scripts"
 bkup_url="https://git.disroot.org/libreboot/gpio-scripts"
diff --git a/config/git/grub/pkg.cfg b/config/git/grub/pkg.cfg
index ed26a766..88bc45d8 100644
--- a/config/git/grub/pkg.cfg
+++ b/config/git/grub/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="HEAD"
 url="git://git.savannah.gnu.org/grub.git"
 bkup_url="https://codeberg.org/libreboot/grub"
diff --git a/config/git/int/pkg.cfg b/config/git/int/pkg.cfg
index d3c2958a..367acc9b 100644
--- a/config/git/int/pkg.cfg
+++ b/config/git/int/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="d1ac570549f00477d9ade21807f42f28a4864fcd"
 url="https://codeberg.org/libreboot/int"
 bkup_url="https://git.disroot.org/libreboot/int"
diff --git a/config/git/memtest86plus/pkg.cfg b/config/git/memtest86plus/pkg.cfg
index 4bf44294..07887ab7 100644
--- a/config/git/memtest86plus/pkg.cfg
+++ b/config/git/memtest86plus/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="5dcd424ea7afb857c1171e747ef064d98d26afeb"
 url="https://codeberg.org/libreboot/memtest86plus"
 bkup_url="https://github.com/memtest86plus/memtest86plus.git"
diff --git a/config/git/mxmdump/pkg.cfg b/config/git/mxmdump/pkg.cfg
index 19ede8d8..792a7cfd 100644
--- a/config/git/mxmdump/pkg.cfg
+++ b/config/git/mxmdump/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="ab3393c84fd3de01793bbfa2ec4caddfe0dc44f6"
 url="https://codeberg.org/libreboot/mxmdump"
 bkup_url="https://git.disroot.org/libreboot/mxmdump"
diff --git a/config/git/pcsx-redux/pkg.cfg b/config/git/pcsx-redux/pkg.cfg
index 0ae9a205..88443cb3 100644
--- a/config/git/pcsx-redux/pkg.cfg
+++ b/config/git/pcsx-redux/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="6ec5348058413619b290b069adbdae68180ce8c0"
 url="https://github.com/grumpycoders/pcsx-redux"
 bkup_url="https://codeberg.org/vimuser/pcsx-redux"
diff --git a/config/git/pico-sdk/pkg.cfg b/config/git/pico-sdk/pkg.cfg
index 68b5bca6..284ee057 100644
--- a/config/git/pico-sdk/pkg.cfg
+++ b/config/git/pico-sdk/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="6a7db34ff63345a7badec79ebea3aaef1712f374"
 url="https://codeberg.org/libreboot/pico-sdk"
 bkup_url="https://github.com/raspberrypi/pico-sdk"
diff --git a/config/git/pico-serprog/pkg.cfg b/config/git/pico-serprog/pkg.cfg
index 54c5fa44..7c54e9c2 100644
--- a/config/git/pico-serprog/pkg.cfg
+++ b/config/git/pico-serprog/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="e75e3a20e63269a5e3189bc2e49a6a81d45a636a"
 url="https://codeberg.org/libreboot/pico-serprog"
 bkup_url="https://git.disroot.org/libreboot/pico-serprog"
diff --git a/config/git/seabios/pkg.cfg b/config/git/seabios/pkg.cfg
index d8c6932b..0ee91a00 100644
--- a/config/git/seabios/pkg.cfg
+++ b/config/git/seabios/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="HEAD"
 url="https://review.coreboot.org/seabios"
 bkup_url="https://github.com/coreboot/seabios"
diff --git a/config/git/stm32-vserprog/pkg.cfg b/config/git/stm32-vserprog/pkg.cfg
index 9fb12c63..9fc1de0c 100644
--- a/config/git/stm32-vserprog/pkg.cfg
+++ b/config/git/stm32-vserprog/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="8fcf0a4d41800631b571fa7bbd1d8b251f0a2111"
 url="https://codeberg.org/libreboot/stm32-vserprog"
 bkup_url="https://git.disroot.org/libreboot/stm32-vserprog"
diff --git a/config/git/u-boot/pkg.cfg b/config/git/u-boot/pkg.cfg
index e65ad63a..ddccbc02 100644
--- a/config/git/u-boot/pkg.cfg
+++ b/config/git/u-boot/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="HEAD"
 url="https://source.denx.de/u-boot/u-boot.git"
 bkup_url="https://github.com/u-boot/u-boot.git"
diff --git a/config/git/uefitool/pkg.cfg b/config/git/uefitool/pkg.cfg
index 1602e6be..8b269666 100644
--- a/config/git/uefitool/pkg.cfg
+++ b/config/git/uefitool/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 rev="4a41c33596e9bc3ae812e763965d91ac57553e02"
 url="https://codeberg.org/libreboot/UEFITool"
 bkup_url="https://github.com/LongSoft/UEFITool"
diff --git a/config/grub/default/target.cfg b/config/grub/default/target.cfg
index c546b1f9..b06d8e64 100644
--- a/config/grub/default/target.cfg
+++ b/config/grub/default/target.cfg
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 rev="b53ec06a1d6f22ffc1139cbfc0f292e4ca2da9cd"
diff --git a/config/grub/nvme/target.cfg b/config/grub/nvme/target.cfg
index 9177dbd7..331070b0 100644
--- a/config/grub/nvme/target.cfg
+++ b/config/grub/nvme/target.cfg
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="nvme"
 rev="b53ec06a1d6f22ffc1139cbfc0f292e4ca2da9cd"
diff --git a/config/grub/xhci/target.cfg b/config/grub/xhci/target.cfg
index af33f65d..f1ff519b 100644
--- a/config/grub/xhci/target.cfg
+++ b/config/grub/xhci/target.cfg
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="xhci"
 rev="b53ec06a1d6f22ffc1139cbfc0f292e4ca2da9cd"
diff --git a/config/pcsx-redux/target.cfg b/config/pcsx-redux/target.cfg
index 21dc4b2d..36e2a055 100644
--- a/config/pcsx-redux/target.cfg
+++ b/config/pcsx-redux/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 makeargs="-f lbmkbofhmakefile"
 cleanargs="-f lbmkbofhmakefile"
 mkhelper="copyps1bios"
diff --git a/config/seabios/default/target.cfg b/config/seabios/default/target.cfg
index f80b9db2..2ee6cf6f 100644
--- a/config/seabios/default/target.cfg
+++ b/config/seabios/default/target.cfg
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 rev="62a1429ec1ec67f14c039d97627a6a7ef70a983c"
diff --git a/config/submodule/coreboot/coreboot413/vboot/module.cfg b/config/submodule/coreboot/coreboot413/vboot/module.cfg
index 34656ba9..79c98870 100644
--- a/config/submodule/coreboot/coreboot413/vboot/module.cfg
+++ b/config/submodule/coreboot/coreboot413/vboot/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subrepo="https://review.coreboot.org/vboot.git"
 subrepo_bkup="https://github.com/coreboot/vboot"
 subhash="4c523ed10f25de872ac0513ebd6ca53d3970b9de"
diff --git a/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg b/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg
index 6dde459a..aec8ffba 100644
--- a/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg
+++ b/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20230628.tar.gz"
 subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20230628.tar.gz"
 subhash="d726e69ebd8b8110690e3aff8d1919b43b0a2185efdeb9131ea8d89d321ca3a318a89c721ea740ae366f31ed3d1c11c2906f8807ee8a190e6f67fe5b2023cea4"
diff --git a/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
index d7864542..ef9a598f 100644
--- a/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
+++ b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subrepo="https://review.coreboot.org/arm-trusted-firmware.git"
 subrepo_bkup="https://github.com/coreboot/arm-trusted-firmware"
 subhash="c5b8de86c8838d08d5d8c9d67c7a432817ee62b8"
diff --git a/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg b/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg
index 370a52ec..3473c884 100644
--- a/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg
+++ b/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.42.tar.xz"
 subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.42.tar.xz"
 subhash="155f3ba14cd220102f4f29a4f1e5cfee3c48aa03b74603460d05afb73c70d6657a9d87eee6eb88bf13203fe6f31177a5c9addc04384e956e7da8069c8ecd20a6"
diff --git a/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg
index 1e4037e8..20942b4b 100644
--- a/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg
+++ b/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.1.0/gcc-14.1.0.tar.xz"
 subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.1.0/gcc-14.1.0.tar.xz"
 subhash="e9e224f2b26646fcf038d28dfa08b94c623bc57941f99894a321d01c600f7c68aff6b8837fd25e73e540de1f8de5606e98694a62cdcdfb525ce768b3ef6879ea"
diff --git a/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg
index fe274faf..46b55c01 100644
--- a/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg
+++ b/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz"
 subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz"
 subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2"
diff --git a/config/submodule/coreboot/default/intel-microcode/module.cfg b/config/submodule/coreboot/default/intel-microcode/module.cfg
index be106f7d..f7d6d283 100644
--- a/config/submodule/coreboot/default/intel-microcode/module.cfg
+++ b/config/submodule/coreboot/default/intel-microcode/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subrepo="https://review.coreboot.org/intel-microcode.git"
 subrepo_bkup="https://github.com/coreboot/intel-microcode"
 subhash="5278dfcf98e89098326b3eb8a85d07120a8730f8"
diff --git a/config/submodule/coreboot/default/libgfxinit/module.cfg b/config/submodule/coreboot/default/libgfxinit/module.cfg
index 1ba41724..93383129 100644
--- a/config/submodule/coreboot/default/libgfxinit/module.cfg
+++ b/config/submodule/coreboot/default/libgfxinit/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subrepo="https://review.coreboot.org/libgfxinit.git"
 subrepo_bkup="https://github.com/coreboot/libgfxinit"
 subhash="17cfc92f402493979783585b6581efbd98c0cf07"
diff --git a/config/submodule/coreboot/default/libhwbase/module.cfg b/config/submodule/coreboot/default/libhwbase/module.cfg
index 2937b8b7..4995e70f 100644
--- a/config/submodule/coreboot/default/libhwbase/module.cfg
+++ b/config/submodule/coreboot/default/libhwbase/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subrepo="https://review.coreboot.org/libhwbase.git"
 subrepo_bkup="https://github.com/coreboot/libhwbase"
 subhash="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg
index f98b6444..9b6cc57a 100644
--- a/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg
+++ b/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
 subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
 subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97"
diff --git a/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg
index 3419bc30..93cc1a05 100644
--- a/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg
+++ b/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz"
 subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz"
 subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475"
diff --git a/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg
index c98cc71f..3895e2ef 100644
--- a/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg
+++ b/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2"
 subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2"
 subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172"
diff --git a/config/submodule/coreboot/default/vboot/module.cfg b/config/submodule/coreboot/default/vboot/module.cfg
index 1dc4c904..32a10913 100644
--- a/config/submodule/coreboot/default/vboot/module.cfg
+++ b/config/submodule/coreboot/default/vboot/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subrepo="https://review.coreboot.org/vboot.git"
 subrepo_bkup="https://github.com/coreboot/vboot"
 subhash="4b12d392e5b12de29c582df4e717b1228e9f1594"
diff --git a/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg b/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg
index e839b77e..50e6989e 100644
--- a/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg
+++ b/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-20190703.tar.gz"
 subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix2-20190703.tar.gz"
 subhash="8445a6d354ce3bcbfb5159f4ec0312b1e910c0b1b2033a2300f892e4ac580abab4e3f5b4ded379f0036299359d307330511ab7053678cfd9031d7df4c365f555"
diff --git a/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg
index b549e139..6e86543f 100644
--- a/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg
+++ b/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.32.tar.xz"
 subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.32.tar.xz"
 subhash="d326408f12a03d9a61a9de56584c2af12f81c2e50d2d7e835d51565df8314df01575724afa1e43bd0db45cfc9916b41519b67dfce03232aa4978704492a6994a"
diff --git a/config/submodule/coreboot/fam15h/blobs/module.cfg b/config/submodule/coreboot/fam15h/blobs/module.cfg
index 215caf4d..f649cab2 100644
--- a/config/submodule/coreboot/fam15h/blobs/module.cfg
+++ b/config/submodule/coreboot/fam15h/blobs/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subrepo="https://review.coreboot.org/blobs.git"
 subrepo_bkup="https://github.com/coreboot/blobs"
 subhash="034b27818450428f70aa9316c8bd0d65bacd8ee8"
diff --git a/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg
index 6ce00577..1a111581 100644
--- a/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg
+++ b/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-8.3.0/gcc-8.3.0.tar.xz"
 subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-8.3.0/gcc-8.3.0.tar.xz"
 subhash="1811337ae3add9680cec64968a2509d085b6dc5b6783fc1e8c295e3e47416196fd1a3ad8dfe7e10be2276b4f62c357659ce2902f239f60a8648548231b4b5802"
diff --git a/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg
index 7caf1845..08926b6a 100644
--- a/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg
+++ b/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.1.2.tar.xz"
 subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.1.2.tar.xz"
 subhash="9f098281c0593b76ee174b722936952671fab1dae353ce3ed436a31fe2bc9d542eca752353f6645b7077c1f395ab4fdd355c58e08e2a801368f1375690eee2c6"
diff --git a/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg b/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg
index 34e77772..89cfabc7 100644
--- a/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg
+++ b/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.1.0.tar.gz"
 subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.1.0.tar.gz"
 subhash="72d657958b07c7812dc9c7cbae093118ce0e454c68a585bfb0e2fa559f1bf7c5f49b93906f580ab3f1073e5b595d23c6494d4d76b765d16dde857a18dd239628"
diff --git a/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg
index e33b1804..c6ebf4de 100644
--- a/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg
+++ b/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.0.2.tar.xz"
 subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.0.2.tar.xz"
 subhash="d583555d08863bf36c89b289ae26bae353d9a31f08ee3894520992d2c26e5683c4c9c193d7ad139632f71c0a476d85ea76182702a98bf08dde7b6f65a54f8b88"
diff --git a/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg b/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg
index fecb3cba..4c91ec05 100644
--- a/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg
+++ b/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.14.02/nasm-2.14.02.tar.bz2"
 subfile_bkup="https://coreboot.org/releases/crossgcc-sources/nasm-2.14.02.tar.bz2"
 subhash="71e3d44736493b1a56d4230bc2e5519e858aaadde5d89a692f1472fad6755084460e36b42852707f4c862eff75d3f2c232aedcc4e61e9d9ffcc8c9ca6498292b"
diff --git a/config/submodule/coreboot/fam15h/vboot/module.cfg b/config/submodule/coreboot/fam15h/vboot/module.cfg
index 5fac75c3..b0897e4f 100644
--- a/config/submodule/coreboot/fam15h/vboot/module.cfg
+++ b/config/submodule/coreboot/fam15h/vboot/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subrepo="https://review.coreboot.org/vboot.git"
 subrepo_bkup="https://github.com/coreboot/vboot"
 subhash="ecdca931ae0637d1a9498f64862939bd5bb99e0b"
diff --git a/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg b/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg
index 6dde459a..aec8ffba 100644
--- a/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg
+++ b/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20230628.tar.gz"
 subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20230628.tar.gz"
 subhash="d726e69ebd8b8110690e3aff8d1919b43b0a2185efdeb9131ea8d89d321ca3a318a89c721ea740ae366f31ed3d1c11c2906f8807ee8a190e6f67fe5b2023cea4"
diff --git a/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg b/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg
index f3e372a4..2117a540 100644
--- a/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg
+++ b/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.43.1.tar.xz"
 subfile_bkup="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.43.1.tar.xz"
 subhash="20977ad17729141a2c26d358628f44a0944b84dcfefdec2ba029c2d02f40dfc41cc91c0631044560d2bd6f9a51e1f15846b4b311befbe14f1239f14ff7d57824"
diff --git a/config/submodule/coreboot/next/fsp/module.cfg b/config/submodule/coreboot/next/fsp/module.cfg
index 2807b268..c402d9dc 100644
--- a/config/submodule/coreboot/next/fsp/module.cfg
+++ b/config/submodule/coreboot/next/fsp/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subrepo="https://review.coreboot.org/fsp.git"
 subrepo_bkup="https://github.com/coreboot/fsp"
 subhash="d7931859bfb1f7949bb455d53b9494dd731e9642"
diff --git a/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg b/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg
index 9a4892f5..4ef88d1d 100644
--- a/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg
+++ b/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
 subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
 subhash="932bdef0cda94bacedf452ab17f103c0cb511ff2cec55e9112fc0328cbf1d803b42595728ea7b200e0a057c03e85626f937012e49a7515bc5dd256b2bf4bc396"
diff --git a/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg
index fe274faf..46b55c01 100644
--- a/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg
+++ b/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz"
 subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz"
 subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2"
diff --git a/config/submodule/coreboot/next/intel-microcode/module.cfg b/config/submodule/coreboot/next/intel-microcode/module.cfg
index 0c66e086..ef649800 100644
--- a/config/submodule/coreboot/next/intel-microcode/module.cfg
+++ b/config/submodule/coreboot/next/intel-microcode/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subrepo="https://review.coreboot.org/intel-microcode.git"
 subrepo_bkup="https://github.com/coreboot/intel-microcode"
 subhash="8ac9378a84879e81c503e09f344560b3dd7f72df"
diff --git a/config/submodule/coreboot/next/libgfxinit/module.cfg b/config/submodule/coreboot/next/libgfxinit/module.cfg
index 1ba41724..93383129 100644
--- a/config/submodule/coreboot/next/libgfxinit/module.cfg
+++ b/config/submodule/coreboot/next/libgfxinit/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subrepo="https://review.coreboot.org/libgfxinit.git"
 subrepo_bkup="https://github.com/coreboot/libgfxinit"
 subhash="17cfc92f402493979783585b6581efbd98c0cf07"
diff --git a/config/submodule/coreboot/next/libhwbase/module.cfg b/config/submodule/coreboot/next/libhwbase/module.cfg
index 2937b8b7..4995e70f 100644
--- a/config/submodule/coreboot/next/libhwbase/module.cfg
+++ b/config/submodule/coreboot/next/libhwbase/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subrepo="https://review.coreboot.org/libhwbase.git"
 subrepo_bkup="https://github.com/coreboot/libhwbase"
 subhash="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg
index f98b6444..9b6cc57a 100644
--- a/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg
+++ b/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
 subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
 subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97"
diff --git a/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg
index 3419bc30..93cc1a05 100644
--- a/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg
+++ b/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz"
 subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz"
 subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475"
diff --git a/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg
index c98cc71f..3895e2ef 100644
--- a/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg
+++ b/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2"
 subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2"
 subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172"
diff --git a/config/submodule/coreboot/next/vboot/module.cfg b/config/submodule/coreboot/next/vboot/module.cfg
index 917d23fa..dc8d630b 100644
--- a/config/submodule/coreboot/next/vboot/module.cfg
+++ b/config/submodule/coreboot/next/vboot/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subrepo="https://review.coreboot.org/vboot.git"
 subrepo_bkup="https://github.com/coreboot/vboot"
 subhash="f1f70f46dc5482bb7c654e53ed58d4001e386df2"
diff --git a/config/submodule/docs/html/module.cfg b/config/submodule/docs/html/module.cfg
index 85dc1d5d..9d2b20c4 100644
--- a/config/submodule/docs/html/module.cfg
+++ b/config/submodule/docs/html/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subhash="3787d9eade2409ff5192fb86bd4c6c5b025c3c5a"
 subrepo="https://codeberg.org/libreboot/lbwww"
 subrepo_bkup="https://git.disroot.org/libreboot/lbwww"
diff --git a/config/submodule/docs/img/module.cfg b/config/submodule/docs/img/module.cfg
index 82fde655..c65a6dbf 100644
--- a/config/submodule/docs/img/module.cfg
+++ b/config/submodule/docs/img/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subhash="8dcb3e11a579e29bc5a16ba1ba5b473164d2e9e4"
 subrepo="https://codeberg.org/libreboot/lbwww-img"
 subrepo_bkup="https://git.disroot.org/libreboot/lbwww-img"
diff --git a/config/submodule/docs/untitled/module.cfg b/config/submodule/docs/untitled/module.cfg
index 35e950e7..3c14f225 100644
--- a/config/submodule/docs/untitled/module.cfg
+++ b/config/submodule/docs/untitled/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subhash="d8e2043c1512eb1171c274559ce82e8093ef393f"
 subrepo="https://codeberg.org/vimuser/untitled-website"
 subrepo_bkup="https://notabug.org/untitled/untitled-website"
diff --git a/config/submodule/grub/default/gnulib/module.cfg b/config/submodule/grub/default/gnulib/module.cfg
index 6fd77871..ca09e0ba 100644
--- a/config/submodule/grub/default/gnulib/module.cfg
+++ b/config/submodule/grub/default/gnulib/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subrepo="git://git.sv.gnu.org/gnulib"
 subrepo_bkup="https://codeberg.org/libreboot/gnulib"
 subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
diff --git a/config/submodule/grub/nvme/gnulib/module.cfg b/config/submodule/grub/nvme/gnulib/module.cfg
index 6fd77871..ca09e0ba 100644
--- a/config/submodule/grub/nvme/gnulib/module.cfg
+++ b/config/submodule/grub/nvme/gnulib/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subrepo="git://git.sv.gnu.org/gnulib"
 subrepo_bkup="https://codeberg.org/libreboot/gnulib"
 subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
diff --git a/config/submodule/grub/xhci/gnulib/module.cfg b/config/submodule/grub/xhci/gnulib/module.cfg
index 6fd77871..ca09e0ba 100644
--- a/config/submodule/grub/xhci/gnulib/module.cfg
+++ b/config/submodule/grub/xhci/gnulib/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subrepo="git://git.sv.gnu.org/gnulib"
 subrepo_bkup="https://codeberg.org/libreboot/gnulib"
 subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
diff --git a/config/submodule/pcsx-redux/uC-sdk/module.cfg b/config/submodule/pcsx-redux/uC-sdk/module.cfg
index dd112407..f8f44850 100644
--- a/config/submodule/pcsx-redux/uC-sdk/module.cfg
+++ b/config/submodule/pcsx-redux/uC-sdk/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subhash="7c6f1973a16893cf1f0868af6f8e60a028b933ad"
 subrepo="https://github.com/grumpycoders/uC-sdk.git"
 subrepo_bkup="https://codeberg.org/vimuser/uC-sdk"
diff --git a/config/submodule/pico-sdk/tinyusb/module.cfg b/config/submodule/pico-sdk/tinyusb/module.cfg
index 43b71534..988d68ba 100644
--- a/config/submodule/pico-sdk/tinyusb/module.cfg
+++ b/config/submodule/pico-sdk/tinyusb/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subhash="86c416d4c0fb38432460b3e11b08b9de76941bf5"
 subrepo="https://codeberg.org/libreboot/tinyusb"
 subrepo_bkup="https://github.com/hathach/tinyusb.git"
diff --git a/config/submodule/stm32-vserprog/libopencm3/module.cfg b/config/submodule/stm32-vserprog/libopencm3/module.cfg
index 9fb3460b..069020cc 100644
--- a/config/submodule/stm32-vserprog/libopencm3/module.cfg
+++ b/config/submodule/stm32-vserprog/libopencm3/module.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 subhash="458250dc6147dc807eec9e4d5a6caf38a699ecb1"
 subrepo="https://codeberg.org/libreboot/libopencm3"
 subrepo_bkup="https://github.com/libopencm3/libopencm3"
diff --git a/config/u-boot/amd64coreboot/target.cfg b/config/u-boot/amd64coreboot/target.cfg
index 80e024ea..8b89408e 100644
--- a/config/u-boot/amd64coreboot/target.cfg
+++ b/config/u-boot/amd64coreboot/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="x86_64"
 # test building with x86_64 hostcc by commenting these:
 # xtree="default" # coreboot tree containing crossgcc
diff --git a/config/u-boot/default/target.cfg b/config/u-boot/default/target.cfg
index 29c24af2..c0fb6209 100644
--- a/config/u-boot/default/target.cfg
+++ b/config/u-boot/default/target.cfg
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 rev="f919c3a889f0ec7d63a48b5d0ed064386b0980bd" # v2024.10
diff --git a/config/u-boot/gru_bob/target.cfg b/config/u-boot/gru_bob/target.cfg
index f7d4d7d9..e19603c2 100644
--- a/config/u-boot/gru_bob/target.cfg
+++ b/config/u-boot/gru_bob/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xtree="default"
 xarch="aarch64-elf arm-eabi"
diff --git a/config/u-boot/gru_kevin/target.cfg b/config/u-boot/gru_kevin/target.cfg
index f7d4d7d9..e19603c2 100644
--- a/config/u-boot/gru_kevin/target.cfg
+++ b/config/u-boot/gru_kevin/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xtree="default"
 xarch="aarch64-elf arm-eabi"
diff --git a/config/u-boot/i386coreboot/target.cfg b/config/u-boot/i386coreboot/target.cfg
index cf3b36be..71cdde44 100644
--- a/config/u-boot/i386coreboot/target.cfg
+++ b/config/u-boot/i386coreboot/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="x86"
 # test building with x86_64 hostcc by commenting these:
 # xtree="default" # coreboot tree containing crossgcc
diff --git a/config/u-boot/qemu_arm64_12mb/target.cfg b/config/u-boot/qemu_arm64_12mb/target.cfg
index f7d4d7d9..e19603c2 100644
--- a/config/u-boot/qemu_arm64_12mb/target.cfg
+++ b/config/u-boot/qemu_arm64_12mb/target.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="default"
 xtree="default"
 xarch="aarch64-elf arm-eabi"
diff --git a/config/u-boot/x86/target.cfg b/config/u-boot/x86/target.cfg
index 2a547e87..bf19e4a5 100644
--- a/config/u-boot/x86/target.cfg
+++ b/config/u-boot/x86/target.cfg
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="x86"
 rev="f919c3a889f0ec7d63a48b5d0ed064386b0980bd" # v2024.10
diff --git a/config/u-boot/x86_64/target.cfg b/config/u-boot/x86_64/target.cfg
index 45e85c2e..a1e15d12 100644
--- a/config/u-boot/x86_64/target.cfg
+++ b/config/u-boot/x86_64/target.cfg
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 tree="x86_64"
 rev="f919c3a889f0ec7d63a48b5d0ed064386b0980bd" # v2024.10
diff --git a/config/uefitool/target.cfg b/config/uefitool/target.cfg
index 909568a7..ce1ff3af 100644
--- a/config/uefitool/target.cfg
+++ b/config/uefitool/target.cfg
@@ -1,2 +1,4 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 cmakedir="UEFIExtract"
 btype="cmake"
diff --git a/config/vendor/3050micro/pkg.cfg b/config/vendor/3050micro/pkg.cfg
index 5ecff50b..497a27a6 100644
--- a/config/vendor/3050micro/pkg.cfg
+++ b/config/vendor/3050micro/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 DL_hash="976bbb1e625f64df276d8343757d910c88b8a781f953bc2c41a7dd15184ec70d55f8081de2a0aaa83cddb8e73bdc2df6288fde6e0897e4928c48ca4bb30bea2d"
 DL_url="https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip"
 DL_url_bkup="https://web.archive.org/web/20230822134231/https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip"
diff --git a/config/vendor/e6400/pkg.cfg b/config/vendor/e6400/pkg.cfg
index 5274f51b..c5962480 100644
--- a/config/vendor/e6400/pkg.cfg
+++ b/config/vendor/e6400/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 E6400_VGA_DL_hash="6217d5fce2291d15bb0649fd2faaeb78e4c48962b07a2bea6af60466bfdc5f233af0d077c2c6e71dd96047bdbb1f612324cef0a5e728ba9a9ec5c69a4022cd8d"
 E6400_VGA_DL_url="https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe"
 E6400_VGA_DL_url_bkup="https://web.archive.org/web/20230506014903/https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe"
diff --git a/config/vendor/haswell/pkg.cfg b/config/vendor/haswell/pkg.cfg
index d43fab3c..e9722a11 100644
--- a/config/vendor/haswell/pkg.cfg
+++ b/config/vendor/haswell/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 DL_hash="f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe"
 DL_url_bkup="https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe"
diff --git a/config/vendor/hp2170p/pkg.cfg b/config/vendor/hp2170p/pkg.cfg
index 71c4d637..77cbd08b 100644
--- a/config/vendor/hp2170p/pkg.cfg
+++ b/config/vendor/hp2170p/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
diff --git a/config/vendor/hp2560p/pkg.cfg b/config/vendor/hp2560p/pkg.cfg
index 21d00424..f7c7cd14 100644
--- a/config/vendor/hp2560p/pkg.cfg
+++ b/config/vendor/hp2560p/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3"
 DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
 DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
diff --git a/config/vendor/hp2570p/pkg.cfg b/config/vendor/hp2570p/pkg.cfg
index de7f768e..9f1a85aa 100644
--- a/config/vendor/hp2570p/pkg.cfg
+++ b/config/vendor/hp2570p/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
diff --git a/config/vendor/hp8200sff/pkg.cfg b/config/vendor/hp8200sff/pkg.cfg
index 079bd0be..9d0a34de 100644
--- a/config/vendor/hp8200sff/pkg.cfg
+++ b/config/vendor/hp8200sff/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 DL_hash="8fcb691bf84dc1feefc3c84f7cc59eadaabb200477bb3ecba1b050f23f133b0a8c2539015a523f676544c2dff64599bcba7e844e8c31757b90d70bb4485b5664"
 DL_url="https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe"
 DL_url_bkup="https://web.archive.org/web/20220708171920/https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe"
diff --git a/config/vendor/hp820g2/pkg.cfg b/config/vendor/hp820g2/pkg.cfg
index 3a95b5ea..89303ad3 100644
--- a/config/vendor/hp820g2/pkg.cfg
+++ b/config/vendor/hp820g2/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 DL_hash="1ac05a3e4f46426eeb77f89c4aca25ed1ad64479d8fcba6a3ab63a944512bacbc5d148cc7b9c4ff4b8c90a1fb1de4776e46f14aca8021900e0df37246aa0b717"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe"
 DL_url_bkup="https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe"
diff --git a/config/vendor/hp8460pintel/pkg.cfg b/config/vendor/hp8460pintel/pkg.cfg
index d818a00b..1e1da34e 100644
--- a/config/vendor/hp8460pintel/pkg.cfg
+++ b/config/vendor/hp8460pintel/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3"
 DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
 DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
diff --git a/config/vendor/hp8470pintel/pkg.cfg b/config/vendor/hp8470pintel/pkg.cfg
index 3dce5557..1170f56b 100644
--- a/config/vendor/hp8470pintel/pkg.cfg
+++ b/config/vendor/hp8470pintel/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
diff --git a/config/vendor/hp8560w/pkg.cfg b/config/vendor/hp8560w/pkg.cfg
index b9dc94c5..629d96d1 100644
--- a/config/vendor/hp8560w/pkg.cfg
+++ b/config/vendor/hp8560w/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3"
 DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
 DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
diff --git a/config/vendor/hp9470m/pkg.cfg b/config/vendor/hp9470m/pkg.cfg
index 756e64bf..9cdb8143 100644
--- a/config/vendor/hp9470m/pkg.cfg
+++ b/config/vendor/hp9470m/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
diff --git a/config/vendor/ivybridge/pkg.cfg b/config/vendor/ivybridge/pkg.cfg
index 92b1eb43..d9b2200b 100644
--- a/config/vendor/ivybridge/pkg.cfg
+++ b/config/vendor/ivybridge/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
diff --git a/config/vendor/sandybridge/pkg.cfg b/config/vendor/sandybridge/pkg.cfg
index 34add8d3..bb022043 100644
--- a/config/vendor/sandybridge/pkg.cfg
+++ b/config/vendor/sandybridge/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3"
 DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
 DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
diff --git a/config/vendor/t1650/pkg.cfg b/config/vendor/t1650/pkg.cfg
index e4a49126..f994b942 100644
--- a/config/vendor/t1650/pkg.cfg
+++ b/config/vendor/t1650/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
diff --git a/config/vendor/t480/pkg.cfg b/config/vendor/t480/pkg.cfg
index 0ccb7e3b..3071f83d 100644
--- a/config/vendor/t480/pkg.cfg
+++ b/config/vendor/t480/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 # ME firmware (deguard will be used)
 DL_hash="df735a24242792bf4150f30bf0bd4fdbdc0fb6bf0f897ea533df32567be8e084006d692fb6351677f8cc976878c5018667901dbd407b0a77805754f7c101497c"
 DL_url="https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
diff --git a/config/vendor/t480s/pkg.cfg b/config/vendor/t480s/pkg.cfg
index 0a75e0b3..a9e3e48b 100644
--- a/config/vendor/t480s/pkg.cfg
+++ b/config/vendor/t480s/pkg.cfg
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 DL_hash="df735a24242792bf4150f30bf0bd4fdbdc0fb6bf0f897ea533df32567be8e084006d692fb6351677f8cc976878c5018667901dbd407b0a77805754f7c101497c"
 DL_url="https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
 DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"

From a3969701e6b6072111757a84a58a67538bd53b05 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 27 Dec 2024 13:58:29 +0000
Subject: [PATCH 0950/1549] dependencies/debian: fix debian sid

change python3-distutils to python3-distutils-extra

the latter is still available in debian sid, but not
the former. however, installing this should still
provide the additional files required.

with this, the debian script is now compatible with
both debian sid and debian stable(bookworm, presently).

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/debian | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/dependencies/debian b/config/dependencies/debian
index 04d018dc..819f3196 100755
--- a/config/dependencies/debian
+++ b/config/dependencies/debian
@@ -9,7 +9,7 @@ libjaylink-dev libgnutls28-dev libgpiod-dev liblz4-tool liblzma-dev libncurses5-
 libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev libpython3-dev \
 libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0 libusb-1.0-0-dev \
 libusb-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted pciutils \
-perl pkg-config python3 python3-distutils python3-pkg-resources python3-pycryptodome \
+perl pkg-config python3 python3-distutils-extra python3-pkg-resources python3-pycryptodome \
 python3-pyelftools python3-setuptools python-is-python3 sharutils swig unar \
 unifont unifont-bin unzip uuid-dev wget xfonts-unifont zlib1g-dev ccache \
 g++-mipsel-linux-gnu make genisoimage mtools \

From ccc2b4d589fb3315f43443e74c861c47fa2d5ff4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 27 Dec 2024 14:01:07 +0000
Subject: [PATCH 0951/1549] add spdx headers to dependencies configs

these used to be separate scripts under gpl 3+, so it makes
sense to clarify the licensing situation

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/arch       | 2 ++
 config/dependencies/debian     | 2 ++
 config/dependencies/fedora38   | 2 ++
 config/dependencies/fedora40   | 2 ++
 config/dependencies/fedora41   | 2 ++
 config/dependencies/parabola   | 2 ++
 config/dependencies/trisquel   | 2 ++
 config/dependencies/ubuntu2004 | 2 ++
 config/dependencies/ubuntu2404 | 2 ++
 config/dependencies/void       | 2 ++
 10 files changed, 20 insertions(+)

diff --git a/config/dependencies/arch b/config/dependencies/arch
index 4d624860..ec75425a 100644
--- a/config/dependencies/arch
+++ b/config/dependencies/arch
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 pkg_add="pacman -S --needed --noconfirm"
 pkglist=" \
 acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
diff --git a/config/dependencies/debian b/config/dependencies/debian
index 819f3196..d147673c 100755
--- a/config/dependencies/debian
+++ b/config/dependencies/debian
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 pkg_add="apt-get -y install"
 pkglist=" \
 acpica-tools autoconf autogen automake autopoint autotools-dev bc \
diff --git a/config/dependencies/fedora38 b/config/dependencies/fedora38
index 8f672205..2e192e6f 100755
--- a/config/dependencies/fedora38
+++ b/config/dependencies/fedora38
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 pkg_add="dnf -y install"
 pkglist=" \
 acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc \
diff --git a/config/dependencies/fedora40 b/config/dependencies/fedora40
index 6836b57b..297c0266 100755
--- a/config/dependencies/fedora40
+++ b/config/dependencies/fedora40
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 pkg_add="dnf -y install"
 pkglist=" \
 acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc \
diff --git a/config/dependencies/fedora41 b/config/dependencies/fedora41
index 0650ba8e..5ba6f552 100755
--- a/config/dependencies/fedora41
+++ b/config/dependencies/fedora41
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 pkg_add="dnf -y install"
 pkglist=" \
 acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-gcc-cs-c++ \
diff --git a/config/dependencies/parabola b/config/dependencies/parabola
index f598e491..17aca3ae 100644
--- a/config/dependencies/parabola
+++ b/config/dependencies/parabola
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 pkg_add="pacman -S --needed --noconfirm"
 pkglist=" \
 acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
diff --git a/config/dependencies/trisquel b/config/dependencies/trisquel
index 027c7ef1..a6d5e3ca 100755
--- a/config/dependencies/trisquel
+++ b/config/dependencies/trisquel
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 pkg_add="apt-get -y install"
 pkglist=" \
 autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \
diff --git a/config/dependencies/ubuntu2004 b/config/dependencies/ubuntu2004
index c9d8a550..a328b999 100755
--- a/config/dependencies/ubuntu2004
+++ b/config/dependencies/ubuntu2004
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 pkg_add="apt-get -y install"
 pkglist=" \
 autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \
diff --git a/config/dependencies/ubuntu2404 b/config/dependencies/ubuntu2404
index 9f33964a..f1a1aff1 100755
--- a/config/dependencies/ubuntu2404
+++ b/config/dependencies/ubuntu2404
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 pkg_add="apt-get -y install"
 pkglist=" \
 autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \
diff --git a/config/dependencies/void b/config/dependencies/void
index 5eb65d14..9060b7c1 100644
--- a/config/dependencies/void
+++ b/config/dependencies/void
@@ -1,3 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
 pkg_add="xbps-install -y"
 pkglist=" \
 acpica-utils autogen base-devel bison cmake \

From e2f8cc7f3ee772520d51ccec81960de10472fd53 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sat, 28 Dec 2024 03:53:25 +0200
Subject: [PATCH 0952/1549] pico-serprog: enable building for multiple pico
 chips

rp2040 and rp2530 platforms can't share a cmake build directory. we
could just delete the build directory after every compilation, but that
would be really wasteful (every tool would need to be recomiled every
time. instead create new build directories as new plaforms are found
and symlink them to the point where the build directory used to be.

to find out which platform we're compiling for, we crudely parse the
board headers file.

there surely would be better ways to do this, but this hack works
with all the boards in pico-sdk 2.1.0.

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 include/rom.sh | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/include/rom.sh b/include/rom.sh
index ec2ad650..215b9eab 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -11,7 +11,14 @@ mkserprog()
 	basename -as .h "$serdir/"*.h > "$TMPDIR/ser" || $err "!mk $1 $TMPDIR"
 
 	while read -r sertarget; do
-		[ "$1" = "rp2040" ] && x_ cmake -DPICO_BOARD="$sertarget" \
+		[ "$1" = "rp2040" ] &&
+		    x_ rm -rf "$sersrc/build" \
+		    && (pt=$(x_ grep "pico_cmake_set" \
+		          "$picosdk/src/boards/include/boards/$sertarget.h" \
+		        | grep "PICO_PLATFORM" | cut -d= -f2 | tr -d [:blank:])
+		        mkdir -p "$sersrc/build_$pt"
+			ln -srf "$sersrc/build_$pt/" "$sersrc/build") \
+		    && x_ cmake -DPICO_BOARD="$sertarget" \
 		    -DPICO_SDK_PATH="$picosdk" -B "$sersrc/build" "$sersrc" \
 		    && x_ cmake --build "$sersrc/build"
 		[ "$1" = "stm32" ] && x_ make -C "$sersrc" \

From a5e0360992d5411c098e4434c8617c234932ede8 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sat, 28 Dec 2024 04:02:08 +0200
Subject: [PATCH 0953/1549] pico-sdk: update to 2.1.0

this brings support for a new microcontroller platform rp2530.

total number of pico boards supported now: 97

TEST: built them all

Tested-by: Riku Viitanen <riku.viitanen@protonmail.com>
Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 config/git/pico-sdk/pkg.cfg            | 2 +-
 config/git/pico-serprog/rp2040-serprog | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)
 create mode 120000 config/git/pico-serprog/rp2040-serprog

diff --git a/config/git/pico-sdk/pkg.cfg b/config/git/pico-sdk/pkg.cfg
index 284ee057..8af13d09 100644
--- a/config/git/pico-sdk/pkg.cfg
+++ b/config/git/pico-sdk/pkg.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-rev="6a7db34ff63345a7badec79ebea3aaef1712f374"
+rev="95ea6acad131124694cda1c162c52cd30e0aece0"
 url="https://codeberg.org/libreboot/pico-sdk"
 bkup_url="https://github.com/raspberrypi/pico-sdk"
diff --git a/config/git/pico-serprog/rp2040-serprog b/config/git/pico-serprog/rp2040-serprog
new file mode 120000
index 00000000..25af91dc
--- /dev/null
+++ b/config/git/pico-serprog/rp2040-serprog
@@ -0,0 +1 @@
+config/git/rp2040-serprog
\ No newline at end of file

From db22308eba516a85044ed738f0c9205d41701b33 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 28 Dec 2024 13:24:01 +0000
Subject: [PATCH 0954/1549] add 2024 to Riku's copyright header on rom.sh

he forgot to do this in the recently merged pico2
support. i'm doing it for him as a matter of courtesy.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/rom.sh b/include/rom.sh
index 215b9eab..f1b8fa65 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -3,7 +3,7 @@
 # Copyright (c) 2021-2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 # Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
-# Copyright (c) 2023 Riku Viitanen <riku.viitanen@protonmail.com>
+# Copyright (c) 2023-2024 Riku Viitanen <riku.viitanen@protonmail.com>
 
 mkserprog()
 {

From 754bd1e6ca3aa95bb1aa44b97612762e37c957b8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 28 Dec 2024 16:46:59 +0000
Subject: [PATCH 0955/1549] rom.sh: Name pico directory serprog_pico

Previously serprog_rp2040, but we now also support
the RP2530 boards.

Therefore, serprog_pico is a nice generic name. The
directory on release archives will now be serprog_pico
instead of serprog_rp2040; it will contain serprog images
for both RP2040 and RP2530 devices.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/pico-serprog/mkhelper.cfg | 2 +-
 include/rom.sh                        | 2 +-
 include/vendor.sh                     | 3 ++-
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/config/data/pico-serprog/mkhelper.cfg b/config/data/pico-serprog/mkhelper.cfg
index d81f1e85..ccfdc0df 100644
--- a/config/data/pico-serprog/mkhelper.cfg
+++ b/config/data/pico-serprog/mkhelper.cfg
@@ -6,4 +6,4 @@ sersrc="src/pico-serprog"
 serx="$sersrc/build/pico_serprog.uf2"
 picosdk="src/pico-sdk"
 serdir="$picosdk/src/boards/include/boards"
-premake="mkserprog rp2040"
+premake="mkserprog pico"
diff --git a/include/rom.sh b/include/rom.sh
index f1b8fa65..0ea791d2 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -11,7 +11,7 @@ mkserprog()
 	basename -as .h "$serdir/"*.h > "$TMPDIR/ser" || $err "!mk $1 $TMPDIR"
 
 	while read -r sertarget; do
-		[ "$1" = "rp2040" ] &&
+		[ "$1" = "pico" ] &&
 		    x_ rm -rf "$sersrc/build" \
 		    && (pt=$(x_ grep "pico_cmake_set" \
 		          "$picosdk/src/boards/include/boards/$sertarget.h" \
diff --git a/include/vendor.sh b/include/vendor.sh
index aa7256c4..7d1356f2 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -375,7 +375,8 @@ detect_board()
 readcfg()
 {
 	if [ "$board" = "serprog_rp2040" ] || \
-	    [ "$board" = "serprog_stm32" ]; then
+	    [ "$board" = "serprog_stm32" ] || \
+	    [ "$board" = "serprog_pico" ]; then
 		return 1
 	fi; boarddir="$cbcfgsdir/$board"
 	eval `setcfg "$boarddir/target.cfg"`; chkvars vcfg tree

From 603105f3b4e1bc312f4c782f752007f64bb9c4f0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 29 Dec 2024 01:20:33 +0000
Subject: [PATCH 0956/1549] t480/t480s: Disable TPM2 to mitigate SeaBIOS lag

SeaBIOS was lagging a lot, on startup and when executing
almost any payload, especially when doing anything in the
ESC menu.

I set the debug level to *21*, and thoroughly analysed the
logs. I found entries such as this:

Checking for bootsplash
WARNING - Timeout at wait_reg8:81!
TCGBIOS: Return value from sending TPM2_CC_StirRandom = 0x00000000
WARNING - Timeout at wait_reg8:81!
TCGBIOS: Return value from sending TPM2_CC_GetRandom = 0x00000000
WARNING - Timeout at wait_reg8:81!
TCGBIOS: Return value from sending TPM2_CC_HierarchyChangeAuth = 0x00000000
WARNING - Timeout at wait_reg8:81!
TCGBIOS: LASA = 0x7a9fc000, next entry = 0x7a9fc16e
WARNING - Timeout at wait_reg8:81!
TCGBIOS: LASA = 0x7a9fc000, next entry = 0x7a9fc1c5
WARNING - Timeout at wait_reg8:81!
TCGBIOS: LASA = 0x7a9fc000, next entry = 0x7a9fc211
WARNING - Timeout at wait_reg8:81!
TCGBIOS: LASA = 0x7a9fc000, next entry = 0x7a9fc25d
WARNING - Timeout at wait_reg8:81!
TCGBIOS: LASA = 0x7a9fc000, next entry = 0x7a9fc2a9
WARNING - Timeout at wait_reg8:81!
TCGBIOS: LASA = 0x7a9fc000, next entry = 0x7a9fc2f5
WARNING - Timeout at wait_reg8:81!
TCGBIOS: LASA = 0x7a9fc000, next entry = 0x7a9fc341
WARNING - Timeout at wait_reg8:81!
TCGBIOS: LASA = 0x7a9fc000, next entry = 0x7a9fc38d
WARNING - Timeout at wait_reg8:81!
TCGBIOS: LASA = 0x7a9fc000, next entry = 0x7a9fc3d9
Searching bootorder for: HALT
Mapping hd drive 0x000f49e0 to 0

I'm not quite certain what the problem is, but disabling TPM2
made the problem go away; SeaBIOS is snappy again.

TPM is security threatre anyway.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb  | 9 ++-------
 config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode  | 9 ++-------
 .../coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb | 9 ++-------
 config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode | 9 ++-------
 .../coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb | 9 ++-------
 config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode | 9 ++-------
 .../t480s_vfsp_16mb/config/libgfxinit_corebootfb         | 9 ++-------
 .../coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode   | 9 ++-------
 8 files changed, 16 insertions(+), 56 deletions(-)

diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
index a9f090a9..d23ba10c 100644
--- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
@@ -231,7 +231,6 @@ CONFIG_EC_GPE_SCI=0x50
 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
 CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
 CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
-# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -614,8 +613,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 # CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
@@ -689,11 +686,10 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
+CONFIG_NO_TPM=y
 # CONFIG_TPM1 is not set
-CONFIG_TPM2=y
-CONFIG_TPM=y
+# CONFIG_TPM2 is not set
 CONFIG_MAINBOARD_HAS_TPM2=y
-# CONFIG_DEBUG_TPM is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -708,7 +704,6 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 # CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
 # end of Memory initialization
 
-# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
index 42bf3336..6f4430f8 100644
--- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
@@ -229,7 +229,6 @@ CONFIG_EC_GPE_SCI=0x50
 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
 CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
 CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
-# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -606,8 +605,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 # CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
@@ -682,11 +679,10 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
+CONFIG_NO_TPM=y
 # CONFIG_TPM1 is not set
-CONFIG_TPM2=y
-CONFIG_TPM=y
+# CONFIG_TPM2 is not set
 CONFIG_MAINBOARD_HAS_TPM2=y
-# CONFIG_DEBUG_TPM is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -701,7 +697,6 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 # CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
 # end of Memory initialization
 
-# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb
index 66bfbf5b..297659bd 100644
--- a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb
@@ -231,7 +231,6 @@ CONFIG_EC_GPE_SCI=0x50
 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
 CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
 CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
-# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -614,8 +613,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 # CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
@@ -689,11 +686,10 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
+CONFIG_NO_TPM=y
 # CONFIG_TPM1 is not set
-CONFIG_TPM2=y
-CONFIG_TPM=y
+# CONFIG_TPM2 is not set
 CONFIG_MAINBOARD_HAS_TPM2=y
-# CONFIG_DEBUG_TPM is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -708,7 +704,6 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 # CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
 # end of Memory initialization
 
-# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode
index 4a0de4b7..897e81a2 100644
--- a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode
@@ -229,7 +229,6 @@ CONFIG_EC_GPE_SCI=0x50
 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
 CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
 CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
-# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -606,8 +605,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 # CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
@@ -682,11 +679,10 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
+CONFIG_NO_TPM=y
 # CONFIG_TPM1 is not set
-CONFIG_TPM2=y
-CONFIG_TPM=y
+# CONFIG_TPM2 is not set
 CONFIG_MAINBOARD_HAS_TPM2=y
-# CONFIG_DEBUG_TPM is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -701,7 +697,6 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 # CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
 # end of Memory initialization
 
-# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
index 36e2fc66..f5c0e0d5 100644
--- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
@@ -231,7 +231,6 @@ CONFIG_EC_GPE_SCI=0x50
 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
 CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
 CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
-# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -614,8 +613,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 # CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
@@ -689,11 +686,10 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
+CONFIG_NO_TPM=y
 # CONFIG_TPM1 is not set
-CONFIG_TPM2=y
-CONFIG_TPM=y
+# CONFIG_TPM2 is not set
 CONFIG_MAINBOARD_HAS_TPM2=y
-# CONFIG_DEBUG_TPM is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -708,7 +704,6 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 # CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
 # end of Memory initialization
 
-# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
index d2078475..2e765f2c 100644
--- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
@@ -229,7 +229,6 @@ CONFIG_EC_GPE_SCI=0x50
 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
 CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
 CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
-# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -606,8 +605,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 # CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
@@ -682,11 +679,10 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
+CONFIG_NO_TPM=y
 # CONFIG_TPM1 is not set
-CONFIG_TPM2=y
-CONFIG_TPM=y
+# CONFIG_TPM2 is not set
 CONFIG_MAINBOARD_HAS_TPM2=y
-# CONFIG_DEBUG_TPM is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -701,7 +697,6 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 # CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
 # end of Memory initialization
 
-# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb
index 25b6e792..84f351c0 100644
--- a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb
@@ -231,7 +231,6 @@ CONFIG_EC_GPE_SCI=0x50
 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
 CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
 CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
-# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -614,8 +613,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 # CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
@@ -689,11 +686,10 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
+CONFIG_NO_TPM=y
 # CONFIG_TPM1 is not set
-CONFIG_TPM2=y
-CONFIG_TPM=y
+# CONFIG_TPM2 is not set
 CONFIG_MAINBOARD_HAS_TPM2=y
-# CONFIG_DEBUG_TPM is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -708,7 +704,6 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 # CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
 # end of Memory initialization
 
-# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y
diff --git a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode
index f0633633..6b31994c 100644
--- a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode
@@ -229,7 +229,6 @@ CONFIG_EC_GPE_SCI=0x50
 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
 CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
 CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
-# CONFIG_TPM_MEASURED_BOOT is not set
 CONFIG_BOARD_ROMSIZE_KB_16384=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -606,8 +605,6 @@ CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 # CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_TPM_INIT_RAMSTAGE=y
-# CONFIG_TPM_PPI is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
@@ -682,11 +679,10 @@ CONFIG_DRIVERS_MTK_WIFI=y
 #
 # Trusted Platform Module
 #
+CONFIG_NO_TPM=y
 # CONFIG_TPM1 is not set
-CONFIG_TPM2=y
-CONFIG_TPM=y
+# CONFIG_TPM2 is not set
 CONFIG_MAINBOARD_HAS_TPM2=y
-# CONFIG_DEBUG_TPM is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -701,7 +697,6 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
 # CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
 # end of Memory initialization
 
-# CONFIG_INTEL_TXT is not set
 # CONFIG_STM is not set
 # CONFIG_INTEL_CBNT_SUPPORT is not set
 CONFIG_BOOTMEDIA_LOCK_NONE=y

From 424b0c7103b71c50396219352cc5f13a9078a461 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 29 Dec 2024 02:10:03 +0000
Subject: [PATCH 0957/1549] t480/3050micro: disable hyperthreading

Hyperthreading is a risk factor for spectre/meltdown
and other attacks.

Disabling it is a best practise. Those who need it
can always turn this option back on. Otherwise, disabling
it by default is a simply courtesy to the average user,
in the interest of security.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../dell3050micro_fsp_16mb/config/libgfxinit_corebootfb         | 2 +-
 .../coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode   | 2 +-
 .../dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb        | 2 +-
 .../coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode  | 2 +-
 config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb      | 2 +-
 config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode         | 2 +-
 config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb     | 2 +-
 config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode        | 2 +-
 config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb     | 2 +-
 config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode        | 2 +-
 config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb    | 2 +-
 config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode       | 2 +-
 12 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
index 0a5401d6..576ab534 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
@@ -314,7 +314,7 @@ CONFIG_INTEL_CAR_NEM_ENHANCED=y
 # CONFIG_USE_INTEL_FSP_MP_INIT is not set
 CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
 CONFIG_HAVE_HYPERTHREADING=y
-CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_FSP_HYPERTHREADING is not set
 # CONFIG_INTEL_KEYLOCKER is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
index 33e2c3a3..6207ecd3 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
@@ -312,7 +312,7 @@ CONFIG_INTEL_CAR_NEM_ENHANCED=y
 # CONFIG_USE_INTEL_FSP_MP_INIT is not set
 CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
 CONFIG_HAVE_HYPERTHREADING=y
-CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_FSP_HYPERTHREADING is not set
 # CONFIG_INTEL_KEYLOCKER is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
diff --git a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb
index 2c14d09f..e8d7edee 100644
--- a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb
@@ -314,7 +314,7 @@ CONFIG_INTEL_CAR_NEM_ENHANCED=y
 # CONFIG_USE_INTEL_FSP_MP_INIT is not set
 CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
 CONFIG_HAVE_HYPERTHREADING=y
-CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_FSP_HYPERTHREADING is not set
 # CONFIG_INTEL_KEYLOCKER is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
diff --git a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode
index e52d3968..8bb5603c 100644
--- a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode
@@ -312,7 +312,7 @@ CONFIG_INTEL_CAR_NEM_ENHANCED=y
 # CONFIG_USE_INTEL_FSP_MP_INIT is not set
 CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
 CONFIG_HAVE_HYPERTHREADING=y
-CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_FSP_HYPERTHREADING is not set
 # CONFIG_INTEL_KEYLOCKER is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
index d23ba10c..af1b04ef 100644
--- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
@@ -339,7 +339,7 @@ CONFIG_INTEL_CAR_NEM_ENHANCED=y
 # CONFIG_USE_INTEL_FSP_MP_INIT is not set
 CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
 CONFIG_HAVE_HYPERTHREADING=y
-CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_FSP_HYPERTHREADING is not set
 # CONFIG_INTEL_KEYLOCKER is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
index 6f4430f8..46306c80 100644
--- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
@@ -337,7 +337,7 @@ CONFIG_INTEL_CAR_NEM_ENHANCED=y
 # CONFIG_USE_INTEL_FSP_MP_INIT is not set
 CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
 CONFIG_HAVE_HYPERTHREADING=y
-CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_FSP_HYPERTHREADING is not set
 # CONFIG_INTEL_KEYLOCKER is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
diff --git a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb
index 297659bd..f379acda 100644
--- a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb
@@ -339,7 +339,7 @@ CONFIG_INTEL_CAR_NEM_ENHANCED=y
 # CONFIG_USE_INTEL_FSP_MP_INIT is not set
 CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
 CONFIG_HAVE_HYPERTHREADING=y
-CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_FSP_HYPERTHREADING is not set
 # CONFIG_INTEL_KEYLOCKER is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
diff --git a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode
index 897e81a2..3b70bc4e 100644
--- a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode
@@ -337,7 +337,7 @@ CONFIG_INTEL_CAR_NEM_ENHANCED=y
 # CONFIG_USE_INTEL_FSP_MP_INIT is not set
 CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
 CONFIG_HAVE_HYPERTHREADING=y
-CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_FSP_HYPERTHREADING is not set
 # CONFIG_INTEL_KEYLOCKER is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
index f5c0e0d5..b88dd06c 100644
--- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
@@ -339,7 +339,7 @@ CONFIG_INTEL_CAR_NEM_ENHANCED=y
 # CONFIG_USE_INTEL_FSP_MP_INIT is not set
 CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
 CONFIG_HAVE_HYPERTHREADING=y
-CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_FSP_HYPERTHREADING is not set
 # CONFIG_INTEL_KEYLOCKER is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
index 2e765f2c..a1e48c43 100644
--- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
@@ -337,7 +337,7 @@ CONFIG_INTEL_CAR_NEM_ENHANCED=y
 # CONFIG_USE_INTEL_FSP_MP_INIT is not set
 CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
 CONFIG_HAVE_HYPERTHREADING=y
-CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_FSP_HYPERTHREADING is not set
 # CONFIG_INTEL_KEYLOCKER is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
diff --git a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb
index 84f351c0..bf364714 100644
--- a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb
@@ -339,7 +339,7 @@ CONFIG_INTEL_CAR_NEM_ENHANCED=y
 # CONFIG_USE_INTEL_FSP_MP_INIT is not set
 CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
 CONFIG_HAVE_HYPERTHREADING=y
-CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_FSP_HYPERTHREADING is not set
 # CONFIG_INTEL_KEYLOCKER is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
diff --git a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode
index 6b31994c..ad6e60ee 100644
--- a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode
@@ -337,7 +337,7 @@ CONFIG_INTEL_CAR_NEM_ENHANCED=y
 # CONFIG_USE_INTEL_FSP_MP_INIT is not set
 CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
 CONFIG_HAVE_HYPERTHREADING=y
-CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_FSP_HYPERTHREADING is not set
 # CONFIG_INTEL_KEYLOCKER is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set

From 01fc65a0a9d5310732b95ce3cd2c96ad01479c25 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 27 Dec 2024 15:44:51 +0000
Subject: [PATCH 0958/1549] Mitigate Debian Trixie/Sid GCC/GNAT version
 mismatch

When I tested Debian Trixie, and Debian Sid, I saw that
GCC in PATH pointed to gcc-14, but gnat in path pointed
to GNAT-13, even if you manually install gnat-14.

GNAT 14 was marked experimental, but GCC 14 was marked
for use, in the apt repositories.

So this patch doesn't address the mismatch when doing e.g.
apt-get install gcc gnat

I will address the actual package dependency in a follow-up
patch, on the Debian dependencies config.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .gitignore      |  1 +
 include/lib.sh  |  3 +++
 include/path.sh | 46 ++++++++++++++++++++++++++++++++++++++++++++++
 script/trees    |  3 +++
 4 files changed, 53 insertions(+)
 create mode 100644 include/path.sh

diff --git a/.gitignore b/.gitignore
index 28671db8..177512a7 100644
--- a/.gitignore
+++ b/.gitignore
@@ -41,3 +41,4 @@
 /f
 /r
 /e
+/xbmkpath/
diff --git a/include/lib.sh b/include/lib.sh
index 92651c84..f204309d 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -95,6 +95,9 @@ if [ -z "${TMPDIR+x}" ]; then
 	export TMPDIR="/tmp"
 	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
 	touch lock || $err "cannot create 'lock' file"
+	rm -Rf xbmkpath || $err "cannot create xbmkpath"
+	mkdir -p xbmkpath || $err "cannot create xbmkpath"
+	export PATH="$PWD/xbmkpath:$PATH" || $err "Can't create xbmkpath"
 	xbmk_parent="y"
 fi
 
diff --git a/include/path.sh b/include/path.sh
new file mode 100644
index 00000000..04e1d887
--- /dev/null
+++ b/include/path.sh
@@ -0,0 +1,46 @@
+#!/usr/bin/env sh
+# SPDX-License-Identifier: MIT
+# Copyright (c) 2024 Leah Rowe <leah@libreboot.org>
+
+# debian trixie/sid ship with gcc 14 when running "gcc",
+# but (as of December 2024) gnat is gnat-13. we must create
+# a symlink accordingly.
+# however, the user may also have gcc 13+14, but only gnat 13
+check_gnat_path()
+{
+	eval `setvars "" gccver gnatver gccdir`
+	command -v gcc 1>/dev/null || $err "Command 'gcc' unavailable."
+
+	for _util in gcc gnat; do
+		eval "$_util --version 1>/dev/null 2>/dev/null || continue"
+		eval "${_util}ver=\"`$_util --version 2>/dev/null | head -n1`\""
+		eval "${_util}ver=\"\${${_util}ver##* }\""
+		eval "${_util}ver=\"\${${_util}ver%%.*}\""
+	done
+
+	[ -z "$gccver" ] && $err "Cannot detect host GCC version"
+	[ "$gnatver" = "$gccver" ] && return 0
+
+	gccdir="$(dirname "$(command -v gcc)")"
+
+	for _gnatbin in "$gccdir/gnat-"*; do
+		[ -f "$_gnatbin" ] || continue
+		[ "${_gnatbin#"$gccdir/gnat-"}" = "$gccver" ] || continue
+		gnatver="${_gnatbin#"$gccdir/gnat-"}"
+		break
+	done
+
+	[ "$gnatver" = "$gccver" ] || $err "GCC/GNAT versions do not match."
+
+	# we already established that the versions match, but if gnat isn't
+	# in path, then we assume it's in e.g. /usr/bin/gnat-14
+	(
+	x_ cd xbmkpath
+	for _gnatbin in "$gccdir/gnat"*"-$gccver"; do
+		[ -e "$_gnatbin" ] || continue
+		_gnatutil="${_gnatbin##*/}"
+		ln -s "$_gnatbin" "${_gnatutil%"-$gccver"}" || \
+		    $err "E: ln -s \"$_gnatbin\" \"${_gnatutil%"-$gccver"}\""
+	done
+	) || $err "Cannot create gnat-$gccver link in $gccdir"
+}
diff --git a/script/trees b/script/trees
index 698d2b34..b9fd21eb 100755
--- a/script/trees
+++ b/script/trees
@@ -8,6 +8,7 @@ set -u -e
 
 . "include/lib.sh"
 . "include/git.sh"
+. "include/path.sh"
 
 XBMKPATH="$PATH"
 
@@ -205,6 +206,8 @@ check_cross_compiler()
 
 		xfix="${_xarch%-*}" && [ "$xfix" = "x86_64" ] && xfix="x64"
 
+		check_gnat_path
+
 		# sometimes buildgcc fails for like no reason. try twice.
 		make -C "$cbdir" crossgcc-$xfix $xgccargs || \
 		    make -C "$cbdir" crossgcc-$xfix $xgccargs || \

From c80cc0a00b6fbe5e94bb35c5760e224ce70c09f0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 00:29:04 +0000
Subject: [PATCH 0959/1549] remove auto-confirm on distro dependencies

because if it says yes to everything, and the package
manager would otherwise ask whether you want to give
it your first born son, you are therefore agreeing to it.

so remove -y for safety

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/arch       | 2 +-
 config/dependencies/debian     | 2 +-
 config/dependencies/fedora38   | 2 +-
 config/dependencies/fedora40   | 2 +-
 config/dependencies/fedora41   | 2 +-
 config/dependencies/parabola   | 2 +-
 config/dependencies/trisquel   | 2 +-
 config/dependencies/ubuntu2004 | 2 +-
 config/dependencies/ubuntu2404 | 2 +-
 config/dependencies/void       | 2 +-
 10 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/config/dependencies/arch b/config/dependencies/arch
index ec75425a..ff20ecd8 100644
--- a/config/dependencies/arch
+++ b/config/dependencies/arch
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="pacman -S --needed --noconfirm"
+pkg_add="pacman -S --needed"
 pkglist=" \
 acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
 autogen base-devel bison cmake curl device-mapper doxygen \
diff --git a/config/dependencies/debian b/config/dependencies/debian
index d147673c..94ff104c 100755
--- a/config/dependencies/debian
+++ b/config/dependencies/debian
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="apt-get -y install"
+pkg_add="apt-get install"
 pkglist=" \
 acpica-tools autoconf autogen automake autopoint autotools-dev bc \
 binutils-arm-none-eabi bison build-essential cmake curl device-tree-compiler \
diff --git a/config/dependencies/fedora38 b/config/dependencies/fedora38
index 2e192e6f..8af77879 100755
--- a/config/dependencies/fedora38
+++ b/config/dependencies/fedora38
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="dnf -y install"
+pkg_add="dnf install"
 pkglist=" \
 acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc \
 arm-none-eabi-gcc arm-none-eabi-newlib autogen bison bzip2 cmake curl \
diff --git a/config/dependencies/fedora40 b/config/dependencies/fedora40
index 297c0266..fa99b6fa 100755
--- a/config/dependencies/fedora40
+++ b/config/dependencies/fedora40
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="dnf -y install"
+pkg_add="dnf install"
 pkglist=" \
 acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc \
 arm-none-eabi-gcc arm-none-eabi-newlib autogen bison bzip2 cmake curl \
diff --git a/config/dependencies/fedora41 b/config/dependencies/fedora41
index 5ba6f552..486674b4 100755
--- a/config/dependencies/fedora41
+++ b/config/dependencies/fedora41
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="dnf -y install"
+pkg_add="dnf install"
 pkglist=" \
 acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-gcc-cs-c++ \
 arm-none-eabi-gcc arm-none-eabi-newlib autogen bison bzip2 cmake curl \
diff --git a/config/dependencies/parabola b/config/dependencies/parabola
index 17aca3ae..9a4006a4 100644
--- a/config/dependencies/parabola
+++ b/config/dependencies/parabola
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="pacman -S --needed --noconfirm"
+pkg_add="pacman -S --needed"
 pkglist=" \
 acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
 autogen base-devel bdf-unifont bison cmake curl device-mapper doxygen \
diff --git a/config/dependencies/trisquel b/config/dependencies/trisquel
index a6d5e3ca..e8110260 100755
--- a/config/dependencies/trisquel
+++ b/config/dependencies/trisquel
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="apt-get -y install"
+pkg_add="apt-get install"
 pkglist=" \
 autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \
 bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \
diff --git a/config/dependencies/ubuntu2004 b/config/dependencies/ubuntu2004
index a328b999..d22cafdd 100755
--- a/config/dependencies/ubuntu2004
+++ b/config/dependencies/ubuntu2004
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="apt-get -y install"
+pkg_add="apt-get install"
 pkglist=" \
 autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \
 bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \
diff --git a/config/dependencies/ubuntu2404 b/config/dependencies/ubuntu2404
index f1a1aff1..cb44fbf5 100755
--- a/config/dependencies/ubuntu2404
+++ b/config/dependencies/ubuntu2404
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="apt-get -y install"
+pkg_add="apt-get install"
 pkglist=" \
 autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \
 bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \
diff --git a/config/dependencies/void b/config/dependencies/void
index 9060b7c1..a02d706e 100644
--- a/config/dependencies/void
+++ b/config/dependencies/void
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="xbps-install -y"
+pkg_add="xbps-install"
 pkglist=" \
 acpica-utils autogen base-devel bison cmake \
 cross-arm-none-eabi-binutils cross-arm-none-eabi-gcc \

From e565df94fd7a6a4fb2b6a51c3cd938825c66390e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 00:50:53 +0000
Subject: [PATCH 0960/1549] Fix globbing issue in lbmk

When doing e.g. $@ we should use double quotes to prevent globbing.

Thanks go to XRevan86 for pointing this out.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build          | 12 ++++++------
 include/git.sh |  2 +-
 include/lib.sh |  4 ++--
 script/trees   |  2 +-
 4 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/build b/build
index 985bbe9e..6f435b68 100755
--- a/build
+++ b/build
@@ -32,16 +32,16 @@ main()
 
 	case "${spath#script/}" in
 	version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
-	release) shift 1; mkrelease $@ ;;
-	inject) shift 1; vendor_inject $@ ;;
-	download) shift 1; vendor_download $@ ;;
+	release) shift 1; mkrelease "$@" ;;
+	inject) shift 1; vendor_inject "$@" ;;
+	download) shift 1; vendor_download "$@" ;;
 	roms)
 		[ $# -gt 1 ] && [ "$2" = "serprog" ] && \
 		    mk -b stm32-vserprog pico-serprog && return 0
-		shift 1; x_ ./mk -b coreboot $@ ;;
+		shift 1; x_ ./mk -b coreboot "$@" ;;
 	*)
 		[ -f "$spath" ] || $err "bad command"
-		$shcmd; "$spath" $@ || $err "excmd: $spath $(echo "$@")" ;;
+		$shcmd; "$spath" "$@" || $err "excmd: $spath $(echo "$@")" ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
 }
@@ -128,5 +128,5 @@ tmp_cleanup()
 	rm -f lock || return 1
 }
 
-main $@
+main "$@"
 tmp_cleanup || err_ "can't rm TMPDIR upon non-zero exit: $TMPDIR"
diff --git a/include/git.sh b/include/git.sh
index 77a22763..aaeabcd4 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -115,7 +115,7 @@ tmpclone()
 	git_am_patches "$3" "$5"
 	) || repofail="y"
 
-	[ "$repofail" = "y" ] && [ $# -lt 6 ] && tmpclone $@ retry
+	[ "$repofail" = "y" ] && [ $# -lt 6 ] && tmpclone "$@" retry
 	[ "$repofail" = "y" ] && $err "!clone $1 $2 $3 $4 $5"; :
 }
 
diff --git a/include/lib.sh b/include/lib.sh
index f204309d..07b9a8da 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -80,7 +80,7 @@ install_packages()
 	printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; return 0
 }
 if [ $# -gt 0 ] && [ "$1" = "dependencies" ]; then
-	install_packages $@ || exit 1
+	install_packages "$@" || exit 1
 	exit 0
 fi
 
@@ -119,7 +119,7 @@ expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
     1>/dev/null 2>/dev/null || export XBMK_THREADS=1 # user gave a non-integer
 
 x_() {
-	[ $# -lt 1 ] || $@ || \
+	[ $# -lt 1 ] || "$@" || \
 	    $err "Unhandled non-zero exit: $(echo "$@")"; return 0
 }
 
diff --git a/script/trees b/script/trees
index b9fd21eb..57e19b63 100755
--- a/script/trees
+++ b/script/trees
@@ -294,6 +294,6 @@ copy_elf()
 	done < "$listfile"; x_ make clean -C "$srcdir" $cleanargs
 }
 
-main $@ || exit 0
+main "$@" || exit 0
 . "$mkhelpercfg"
 $cmd

From 17168a87dbfe969fdf388530f1bd38be1d7db884 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 02:24:23 +0000
Subject: [PATCH 0961/1549] path.sh: remove unnecessary shebang

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/path.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/path.sh b/include/path.sh
index 04e1d887..ee921716 100644
--- a/include/path.sh
+++ b/include/path.sh
@@ -1,4 +1,3 @@
-#!/usr/bin/env sh
 # SPDX-License-Identifier: MIT
 # Copyright (c) 2024 Leah Rowe <leah@libreboot.org>
 

From 7849a07588654c03a0df4c30cc9b772b7c338f7c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 13:18:57 +0000
Subject: [PATCH 0962/1549] path.sh: minor cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/path.sh | 9 +--------
 1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/include/path.sh b/include/path.sh
index ee921716..56756bbd 100644
--- a/include/path.sh
+++ b/include/path.sh
@@ -1,10 +1,7 @@
 # SPDX-License-Identifier: MIT
 # Copyright (c) 2024 Leah Rowe <leah@libreboot.org>
 
-# debian trixie/sid ship with gcc 14 when running "gcc",
-# but (as of December 2024) gnat is gnat-13. we must create
-# a symlink accordingly.
-# however, the user may also have gcc 13+14, but only gnat 13
+# fix mismatching gcc/gnat versions on debian trixie/sid
 check_gnat_path()
 {
 	eval `setvars "" gccver gnatver gccdir`
@@ -21,18 +18,14 @@ check_gnat_path()
 	[ "$gnatver" = "$gccver" ] && return 0
 
 	gccdir="$(dirname "$(command -v gcc)")"
-
 	for _gnatbin in "$gccdir/gnat-"*; do
 		[ -f "$_gnatbin" ] || continue
 		[ "${_gnatbin#"$gccdir/gnat-"}" = "$gccver" ] || continue
 		gnatver="${_gnatbin#"$gccdir/gnat-"}"
 		break
 	done
-
 	[ "$gnatver" = "$gccver" ] || $err "GCC/GNAT versions do not match."
 
-	# we already established that the versions match, but if gnat isn't
-	# in path, then we assume it's in e.g. /usr/bin/gnat-14
 	(
 	x_ cd xbmkpath
 	for _gnatbin in "$gccdir/gnat"*"-$gccver"; do

From 5b24e0a5a96096273b8b662edf3b2f7ff204c00c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 13:36:34 +0000
Subject: [PATCH 0963/1549] path.sh: More thorough gcc/gnat version check

We were checking the shorthand version number, but
the precise version numbers need to match.

Also: when we searched $PATH/gnat-$gccver, we assumed
that the full version would then match, without checking
it, so now it is checked precisely.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/path.sh | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/include/path.sh b/include/path.sh
index 56756bbd..98f536c1 100644
--- a/include/path.sh
+++ b/include/path.sh
@@ -4,27 +4,37 @@
 # fix mismatching gcc/gnat versions on debian trixie/sid
 check_gnat_path()
 {
-	eval `setvars "" gccver gnatver gccdir`
+	eval `setvars "" gccver gccfull gnatver gnatfull gccdir`
 	command -v gcc 1>/dev/null || $err "Command 'gcc' unavailable."
 
 	for _util in gcc gnat; do
 		eval "$_util --version 1>/dev/null 2>/dev/null || continue"
 		eval "${_util}ver=\"`$_util --version 2>/dev/null | head -n1`\""
 		eval "${_util}ver=\"\${${_util}ver##* }\""
+		eval "${_util}full=\"\${$_util}ver\""
 		eval "${_util}ver=\"\${${_util}ver%%.*}\""
 	done
 
 	[ -z "$gccver" ] && $err "Cannot detect host GCC version"
-	[ "$gnatver" = "$gccver" ] && return 0
+	[ "$gnatfull" = "$gccfull" ] && return 0
 
 	gccdir="$(dirname "$(command -v gcc)")"
+	[ -d "$gccdir" ] || $err "gcc PATH dir \"$gccdir\" does not exist."
+
 	for _gnatbin in "$gccdir/gnat-"*; do
 		[ -f "$_gnatbin" ] || continue
 		[ "${_gnatbin#"$gccdir/gnat-"}" = "$gccver" ] || continue
 		gnatver="${_gnatbin#"$gccdir/gnat-"}"
 		break
 	done
-	[ "$gnatver" = "$gccver" ] || $err "GCC/GNAT versions do not match."
+	[ -x "$gccdir/gnat-$gccver" ] || \
+	    $err "$gccdir/gnat-$gccver not executable"
+	gnatfull="`"$gccdir/gnat-$gccver" --version | head -n1`"
+	gnatfull="${gnatfull##* }"
+	[ "${gnatfull%%.*}" = "$gnatver" ] || \
+	    $err "$gccdir/gnat-$gccver v${gnatfull%%.*}; expected v$gnatver"
+
+	[ "$gnatfull" = "$gccfull" ] || $err "GCC/GNAT versions do not match."
 
 	(
 	x_ cd xbmkpath

From 295463d281e4beeb0ad3aa9d0fe390227e0d5ddc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 14:10:32 +0000
Subject: [PATCH 0964/1549] path.sh: Further cleanup

Remove all symlinks each time, to ensure that no
stragglers are left behind, since they are being
re-generated each time anyway.

The code for determining version numbers has now
been unified under gnu_setver()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh  |  2 +-
 include/path.sh | 45 ++++++++++++++++++++-------------------------
 2 files changed, 21 insertions(+), 26 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 07b9a8da..f0126457 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -95,7 +95,7 @@ if [ -z "${TMPDIR+x}" ]; then
 	export TMPDIR="/tmp"
 	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
 	touch lock || $err "cannot create 'lock' file"
-	rm -Rf xbmkpath || $err "cannot create xbmkpath"
+	rm -Rf xbmkpath || $err "cannot remove xbmkpath"
 	mkdir -p xbmkpath || $err "cannot create xbmkpath"
 	export PATH="$PWD/xbmkpath:$PATH" || $err "Can't create xbmkpath"
 	xbmk_parent="y"
diff --git a/include/path.sh b/include/path.sh
index 98f536c1..17e58fd7 100644
--- a/include/path.sh
+++ b/include/path.sh
@@ -1,48 +1,43 @@
 # SPDX-License-Identifier: MIT
 # Copyright (c) 2024 Leah Rowe <leah@libreboot.org>
 
+eval `setvars "" gccver gccfull gnatver gnatfull gccdir`
+
 # fix mismatching gcc/gnat versions on debian trixie/sid
 check_gnat_path()
 {
-	eval `setvars "" gccver gccfull gnatver gnatfull gccdir`
-	command -v gcc 1>/dev/null || $err "Command 'gcc' unavailable."
+	rm -f xbmkpath/* || $err "Cannot clear xbmkpath/"
 
-	for _util in gcc gnat; do
-		eval "$_util --version 1>/dev/null 2>/dev/null || continue"
-		eval "${_util}ver=\"`$_util --version 2>/dev/null | head -n1`\""
-		eval "${_util}ver=\"\${${_util}ver##* }\""
-		eval "${_util}full=\"\${$_util}ver\""
-		eval "${_util}ver=\"\${${_util}ver%%.*}\""
-	done
+	eval `setvars "" gccver gccfull gnatver gnatfull gccdir`
+	gnu_setver gcc gcc || $err "Command 'gcc' unavailable."
+	gnu_setver gnat gnat || :
 
 	[ -z "$gccver" ] && $err "Cannot detect host GCC version"
 	[ "$gnatfull" = "$gccfull" ] && return 0
 
 	gccdir="$(dirname "$(command -v gcc)")"
-	[ -d "$gccdir" ] || $err "gcc PATH dir \"$gccdir\" does not exist."
-
 	for _gnatbin in "$gccdir/gnat-"*; do
 		[ -f "$_gnatbin" ] || continue
 		[ "${_gnatbin#"$gccdir/gnat-"}" = "$gccver" ] || continue
-		gnatver="${_gnatbin#"$gccdir/gnat-"}"
-		break
+		gnatver="${_gnatbin#"$gccdir/gnat-"}"; break
 	done
-	[ -x "$gccdir/gnat-$gccver" ] || \
-	    $err "$gccdir/gnat-$gccver not executable"
-	gnatfull="`"$gccdir/gnat-$gccver" --version | head -n1`"
-	gnatfull="${gnatfull##* }"
-	[ "${gnatfull%%.*}" = "$gnatver" ] || \
-	    $err "$gccdir/gnat-$gccver v${gnatfull%%.*}; expected v$gnatver"
-
+	gnu_setver "gnat" "$gccdir/gnat-$gccver" || $err "Unknown gnat version"
 	[ "$gnatfull" = "$gccfull" ] || $err "GCC/GNAT versions do not match."
 
 	(
 	x_ cd xbmkpath
 	for _gnatbin in "$gccdir/gnat"*"-$gccver"; do
-		[ -e "$_gnatbin" ] || continue
-		_gnatutil="${_gnatbin##*/}"
-		ln -s "$_gnatbin" "${_gnatutil%"-$gccver"}" || \
-		    $err "E: ln -s \"$_gnatbin\" \"${_gnatutil%"-$gccver"}\""
+		[ -e "$_gnatbin" ] || continue; _gnatutil="${_gnatbin##*/}"
+		x_ ln -s "$_gnatbin" "${_gnatutil%"-$gccver"}"
 	done
-	) || $err "Cannot create gnat-$gccver link in $gccdir"
+	) || $err "Cannot create gnat-$gccver link in $gccdir"; :
+}
+
+gnu_setver()
+{
+	eval "$2 --version 1>/dev/null 2>/dev/null || return 1"
+	eval "${1}ver=\"`$2 --version 2>/dev/null | head -n1`\""
+	eval "${1}ver=\"\${${1}ver##* }\""
+	eval "${1}full=\"\${$1}ver\""
+	eval "${1}ver=\"\${${1}ver%%.*}\""; :
 }

From f64b59962790936f49399b13f9a940d5e6230d32 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 14:13:49 +0000
Subject: [PATCH 0965/1549] Merge path.sh into script/trees

The code is simple enough now that I'm happy for it
to just be part of the main script.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/path.sh | 43 -------------------------------------------
 script/trees    | 43 +++++++++++++++++++++++++++++++++++++++++--
 2 files changed, 41 insertions(+), 45 deletions(-)
 delete mode 100644 include/path.sh

diff --git a/include/path.sh b/include/path.sh
deleted file mode 100644
index 17e58fd7..00000000
--- a/include/path.sh
+++ /dev/null
@@ -1,43 +0,0 @@
-# SPDX-License-Identifier: MIT
-# Copyright (c) 2024 Leah Rowe <leah@libreboot.org>
-
-eval `setvars "" gccver gccfull gnatver gnatfull gccdir`
-
-# fix mismatching gcc/gnat versions on debian trixie/sid
-check_gnat_path()
-{
-	rm -f xbmkpath/* || $err "Cannot clear xbmkpath/"
-
-	eval `setvars "" gccver gccfull gnatver gnatfull gccdir`
-	gnu_setver gcc gcc || $err "Command 'gcc' unavailable."
-	gnu_setver gnat gnat || :
-
-	[ -z "$gccver" ] && $err "Cannot detect host GCC version"
-	[ "$gnatfull" = "$gccfull" ] && return 0
-
-	gccdir="$(dirname "$(command -v gcc)")"
-	for _gnatbin in "$gccdir/gnat-"*; do
-		[ -f "$_gnatbin" ] || continue
-		[ "${_gnatbin#"$gccdir/gnat-"}" = "$gccver" ] || continue
-		gnatver="${_gnatbin#"$gccdir/gnat-"}"; break
-	done
-	gnu_setver "gnat" "$gccdir/gnat-$gccver" || $err "Unknown gnat version"
-	[ "$gnatfull" = "$gccfull" ] || $err "GCC/GNAT versions do not match."
-
-	(
-	x_ cd xbmkpath
-	for _gnatbin in "$gccdir/gnat"*"-$gccver"; do
-		[ -e "$_gnatbin" ] || continue; _gnatutil="${_gnatbin##*/}"
-		x_ ln -s "$_gnatbin" "${_gnatutil%"-$gccver"}"
-	done
-	) || $err "Cannot create gnat-$gccver link in $gccdir"; :
-}
-
-gnu_setver()
-{
-	eval "$2 --version 1>/dev/null 2>/dev/null || return 1"
-	eval "${1}ver=\"`$2 --version 2>/dev/null | head -n1`\""
-	eval "${1}ver=\"\${${1}ver##* }\""
-	eval "${1}full=\"\${$1}ver\""
-	eval "${1}ver=\"\${${1}ver%%.*}\""; :
-}
diff --git a/script/trees b/script/trees
index 57e19b63..786461dc 100755
--- a/script/trees
+++ b/script/trees
@@ -8,14 +8,14 @@ set -u -e
 
 . "include/lib.sh"
 . "include/git.sh"
-. "include/path.sh"
 
 XBMKPATH="$PATH"
 
 eval `setvars "" xarch srcdir premake cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
-    defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs`; badhash="n"
+    defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs gccver gccfull \
+    gnatver gnatfull gccdir`; badhash="n"
 
 main()
 {
@@ -215,6 +215,45 @@ check_cross_compiler()
 	done; return 0
 }
 
+# fix mismatching gcc/gnat versions on debian trixie/sid
+check_gnat_path()
+{
+	rm -f xbmkpath/* || $err "Cannot clear xbmkpath/"
+
+	eval `setvars "" gccver gccfull gnatver gnatfull gccdir`
+	gnu_setver gcc gcc || $err "Command 'gcc' unavailable."
+	gnu_setver gnat gnat || :
+
+	[ -z "$gccver" ] && $err "Cannot detect host GCC version"
+	[ "$gnatfull" = "$gccfull" ] && return 0
+
+	gccdir="$(dirname "$(command -v gcc)")"
+	for _gnatbin in "$gccdir/gnat-"*; do
+		[ -f "$_gnatbin" ] || continue
+		[ "${_gnatbin#"$gccdir/gnat-"}" = "$gccver" ] || continue
+		gnatver="${_gnatbin#"$gccdir/gnat-"}"; break
+	done
+	gnu_setver "gnat" "$gccdir/gnat-$gccver" || $err "Unknown gnat version"
+	[ "$gnatfull" = "$gccfull" ] || $err "GCC/GNAT versions do not match."
+
+	(
+	x_ cd xbmkpath
+	for _gnatbin in "$gccdir/gnat"*"-$gccver"; do
+		[ -e "$_gnatbin" ] || continue; _gnatutil="${_gnatbin##*/}"
+		x_ ln -s "$_gnatbin" "${_gnatutil%"-$gccver"}"
+	done
+	) || $err "Cannot create gnat-$gccver link in $gccdir"; :
+}
+
+gnu_setver()
+{
+	eval "$2 --version 1>/dev/null 2>/dev/null || return 1"
+	eval "${1}ver=\"`$2 --version 2>/dev/null | head -n1`\""
+	eval "${1}ver=\"\${${1}ver##* }\""
+	eval "${1}full=\"\${$1}ver\""
+	eval "${1}ver=\"\${${1}ver%%.*}\""; :
+}
+
 check_defconfig()
 {
 	[ -f "$defconfig" ] || $dry $err "$project/$target: missing defconfig"

From ec2f07166624634d937715f4407cd19c0aaa8996 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 15:08:54 +0000
Subject: [PATCH 0966/1549] trees: match gcc/gnat versions both ways

on debian trixie/sid after updating from stable,
sometimes gcc 13 and gnat 13 are both available, but
gcc resolves to gcc-14 and gnat-14 isn't available.

even when gnat-14 and gcc-14 are available, gnat will
still either resolve to gnat-13, or nothing at all.

in cases where gnat-14 is unavailable, but gcc and gnat 13
are both available, we should match gcc to gnat.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 64 ++++++++++++++++++++++++++++++++--------------------
 1 file changed, 40 insertions(+), 24 deletions(-)

diff --git a/script/trees b/script/trees
index 786461dc..d07f3254 100755
--- a/script/trees
+++ b/script/trees
@@ -15,7 +15,7 @@ eval `setvars "" xarch srcdir premake cmakedir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
     defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs gccver gccfull \
-    gnatver gnatfull gccdir`; badhash="n"
+    gnatver gnatfull gccdir gnatdir`; badhash="n"
 
 main()
 {
@@ -206,7 +206,11 @@ check_cross_compiler()
 
 		xfix="${_xarch%-*}" && [ "$xfix" = "x86_64" ] && xfix="x64"
 
-		check_gnat_path
+		# match gnat-X to gcc
+		(
+		check_gnu_path gcc gnat || check_gnu_path gnat gcc || \
+		    $err "Host GCC/GNAT mismatch"
+		) || $err "Cannot match host GCC/GNAT versions"
 
 		# sometimes buildgcc fails for like no reason. try twice.
 		make -C "$cbdir" crossgcc-$xfix $xgccargs || \
@@ -215,43 +219,55 @@ check_cross_compiler()
 	done; return 0
 }
 
-# fix mismatching gcc/gnat versions on debian trixie/sid
-check_gnat_path()
+# fix mismatching gcc/gnat versions on debian trixie/sid. as of december 2024,
+# trixie/sid had gnat-13 as gnat and gcc-14 as gcc, but has gnat-14 in apt. in
+# some cases, gcc 13+14 and gnat-13 are present; or gnat-14 and gcc-14, but
+# gnat in PATH never resolves to gnat-14, because gnat-14 was "experimental"
+check_gnu_path()
 {
-	rm -f xbmkpath/* || $err "Cannot clear xbmkpath/"
+	[ $# -lt 2 ] && $err "check_gnu_path: Too few arguments"
+	[ "$1" = "$2" ] && $err "check_gnu_path: Both arguments identical"
+	for _gnuarg in 1 2; do
+		eval "[ \"\$$_gnuarg\" = \"gcc\" ] && continue"
+		eval "[ \"\$$_gnuarg\" = \"gnat\" ] && continue"
+		$err "check_gnu_path: Invalid argument \"$_gnuarg\""
+	done
+	command -v $1 1>/dev/null || $err "Host gcc unavailable"
 
-	eval `setvars "" gccver gccfull gnatver gnatfull gccdir`
-	gnu_setver gcc gcc || $err "Command 'gcc' unavailable."
-	gnu_setver gnat gnat || :
+	eval `setvars "" gccver gccfull gnatver gnatfull gccdir gnatdir`
+	gnu_setver "$1" "$1" || $err "Command '$1' unavailable."
+	gnu_setver "$2" "$2" || :
 
-	[ -z "$gccver" ] && $err "Cannot detect host GCC version"
+	eval "[ -z \"\$$1ver\" ] && $err \"Cannot detect host '$1' version\""
 	[ "$gnatfull" = "$gccfull" ] && return 0
 
-	gccdir="$(dirname "$(command -v gcc)")"
-	for _gnatbin in "$gccdir/gnat-"*; do
-		[ -f "$_gnatbin" ] || continue
-		[ "${_gnatbin#"$gccdir/gnat-"}" = "$gccver" ] || continue
-		gnatver="${_gnatbin#"$gccdir/gnat-"}"; break
+	eval "$1dir="$(dirname "$(command -v $1)")""
+	eval "_gnudir=\"\$$1dir\"; _gnuver=\"\$$1ver\""
+	for _gnubin in "$_gnudir/$2-"*; do
+		[ -f "$_gnubin" ] || continue
+		[ "${_gnubin#"$_gnudir/$2-"}" = "$_gnuver" ] || continue
+		gnatver="${_gnubin#"$_gnudir/$2-"}"; break
 	done
-	gnu_setver "gnat" "$gccdir/gnat-$gccver" || $err "Unknown gnat version"
-	[ "$gnatfull" = "$gccfull" ] || $err "GCC/GNAT versions do not match."
+	gnu_setver "$2" "$_gnudir/$2-$_gnuver" || return 1
+	[ "$gnatfull" = "$gccfull" ] || return 1
 
 	(
+	rm -f xbmkpath/* || $err "Cannot clear xbmkpath/"
 	x_ cd xbmkpath
-	for _gnatbin in "$gccdir/gnat"*"-$gccver"; do
-		[ -e "$_gnatbin" ] || continue; _gnatutil="${_gnatbin##*/}"
-		x_ ln -s "$_gnatbin" "${_gnatutil%"-$gccver"}"
+	for _gnubin in "$_gnudir/$2"*"-$_gnuver"; do
+		[ -e "$_gnubin" ] || continue; _gnuutil="${_gnubin##*/}"
+		x_ ln -s "$_gnubin" "${_gnuutil%"-$_gnuver"}"
 	done
-	) || $err "Cannot create gnat-$gccver link in $gccdir"; :
+	) || $err "Cannot create $2-$_gnuver link in $_gnudir"; :
 }
 
 gnu_setver()
 {
 	eval "$2 --version 1>/dev/null 2>/dev/null || return 1"
-	eval "${1}ver=\"`$2 --version 2>/dev/null | head -n1`\""
-	eval "${1}ver=\"\${${1}ver##* }\""
-	eval "${1}full=\"\${$1}ver\""
-	eval "${1}ver=\"\${${1}ver%%.*}\""; :
+	eval "$1ver=\"`$2 --version 2>/dev/null | head -n1`\""
+	eval "$1ver=\"\${$1ver##* }\""
+	eval "$1full=\"\$$1ver\""
+	eval "$1ver=\"\${$1ver%%.*}\""; :
 }
 
 check_defconfig()

From cfb6de94c3367d761e3db4d549c03e1a8360b0a3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 17:59:19 +0000
Subject: [PATCH 0967/1549] trees: correction on check_gnu_path

i intend for this function to work generically,
matching gnat to gcc or gcc to gnat, but there was
a hangover from the previous code where it specifically
assumed we were matching gnat

this bug manifested when i tested with gnat being v13
and gcc being v14 in path, where gcc-13 was also
available in path.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/script/trees b/script/trees
index d07f3254..09240af0 100755
--- a/script/trees
+++ b/script/trees
@@ -232,7 +232,7 @@ check_gnu_path()
 		eval "[ \"\$$_gnuarg\" = \"gnat\" ] && continue"
 		$err "check_gnu_path: Invalid argument \"$_gnuarg\""
 	done
-	command -v $1 1>/dev/null || $err "Host gcc unavailable"
+	command -v $1 1>/dev/null || $err "Host '$1' unavailable"
 
 	eval `setvars "" gccver gccfull gnatver gnatfull gccdir gnatdir`
 	gnu_setver "$1" "$1" || $err "Command '$1' unavailable."
@@ -246,7 +246,7 @@ check_gnu_path()
 	for _gnubin in "$_gnudir/$2-"*; do
 		[ -f "$_gnubin" ] || continue
 		[ "${_gnubin#"$_gnudir/$2-"}" = "$_gnuver" ] || continue
-		gnatver="${_gnubin#"$_gnudir/$2-"}"; break
+		_gnuver="${_gnubin#"$_gnudir/$2-"}"; break
 	done
 	gnu_setver "$2" "$_gnudir/$2-$_gnuver" || return 1
 	[ "$gnatfull" = "$gccfull" ] || return 1

From ad137eae89dd05254b7cfe9cc5816616f640749e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 18:36:46 +0000
Subject: [PATCH 0968/1549] trees: only symlink host gcc/gnat to build xgcc

In general, we don't want to mess with the hostcc, unless
we have to. To avoid other breakage, clear what we did
after crossgcc has compiled.

This is a follow-up to the previous patches, matching gcc
to gnat versions and vice versa, when compiling crossgcc.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/script/trees b/script/trees
index 09240af0..a86048b4 100755
--- a/script/trees
+++ b/script/trees
@@ -216,6 +216,9 @@ check_cross_compiler()
 		make -C "$cbdir" crossgcc-$xfix $xgccargs || \
 		    make -C "$cbdir" crossgcc-$xfix $xgccargs || \
 		    $err "!mkxgcc $project/$xtree '$xfix' '$xgccargs'"
+
+		# we only want to mess with hostcc to build xgcc
+		rm -f xbmkpath/* || $err "Cannot clear xbmkpath/"; :
 	done; return 0
 }
 

From 6c7e3ce2d6e92e916a55eb96a86f1c67de590bfc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 18:38:42 +0000
Subject: [PATCH 0969/1549] trees: remove unnecessary subshell

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index a86048b4..6bf00e18 100755
--- a/script/trees
+++ b/script/trees
@@ -207,10 +207,8 @@ check_cross_compiler()
 		xfix="${_xarch%-*}" && [ "$xfix" = "x86_64" ] && xfix="x64"
 
 		# match gnat-X to gcc
-		(
 		check_gnu_path gcc gnat || check_gnu_path gnat gcc || \
-		    $err "Host GCC/GNAT mismatch"
-		) || $err "Cannot match host GCC/GNAT versions"
+		    $err "Cannot match host GCC/GNAT versions"
 
 		# sometimes buildgcc fails for like no reason. try twice.
 		make -C "$cbdir" crossgcc-$xfix $xgccargs || \

From 0c8107474691a6da793dbc6c6ac18c36ec7ec4a3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 19:23:27 +0000
Subject: [PATCH 0970/1549] use command -v instead of which

which is a non-standard command, whereas command is part of posix

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build          | 2 +-
 include/lib.sh | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/build b/build
index 6f435b68..3194397f 100755
--- a/build
+++ b/build
@@ -25,7 +25,7 @@ main()
 	spath="script/$1"; shcmd="shift 1"
 	[ "${1#-*}" != "$1" ] && spath="script/trees" && shcmd=":"
 
-	for g in "which git" "git config --global user.name" \
+	for g in "command -v git" "git config --global user.name" \
 	    "git config --global user.email" "git_init"; do
 		eval "$g 1>/dev/null 2>/dev/null || $err \"Unconfigured: $g\""
 	done
diff --git a/include/lib.sh b/include/lib.sh
index f0126457..ef54f143 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -16,8 +16,8 @@ err="err_"
 
 pyver="2"
 python="python3"
-which python3 1>/dev/null || python="python"
-which $python 1>/dev/null || pyver=""
+command -v python3 1>/dev/null || python="python"
+command -v $python 1>/dev/null || pyver=""
 [ -n "$pyver" ] && pyver="$($python --version | awk '{print $2}')"
 if [ "${pyver%%.*}" != "3" ]; then
 	printf "Wrong python version, or python missing. Must be v 3.x.\n" 1>&2

From 3d7dd4aa9fe65ebd5b3d4df9919b2c738880a123 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 20:24:46 +0000
Subject: [PATCH 0971/1549] Fix U-Boot build issue with Swig 4.3.0

Tested on Debian Sid, as of 30 December 2024, which uses
Swig 4.3.0. Context here:

commit a63456b9191fae2fe49f4b121e025792022e3950
Author: Markus Volk <f_l_k@t-online.de>
Date:   Wed Oct 30 06:07:16 2024 +0100

    scripts/dtc/pylibfdt/libfdt.i_shipped: Use SWIG_AppendOutput

This patch from U-Boot upstream has been backported to the
release revision used by Libreboot. Swig has, since 4.3.0,
changed the language-specific AppendOutput functions, but
the helper macro SWIG_AppendOutput is identical; therefore,
upstream switched to this function.

The benefit of this fix is that since the newly used macro
is also the same on older Swig versions, and behaves the same,
this shouldn't fix building on older Swig versions. For reference,
the initial Libreboot 20241206 release, and revisions of it before
revision 8, was built on Debian 12 which uses Swig 4.1.0.

The rev8 release will still be compiled on Debian 12, but with
this change, it should also compile on Debian Sid, and bleeding
edge distros like Arch Linux.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...bfdt-libfdt.i_shipped-Use-SWIG_Appen.patch | 61 +++++++++++++++++++
 ...bfdt-libfdt.i_shipped-Use-SWIG_Appen.patch | 61 +++++++++++++++++++
 ...bfdt-libfdt.i_shipped-Use-SWIG_Appen.patch | 61 +++++++++++++++++++
 3 files changed, 183 insertions(+)
 create mode 100644 config/u-boot/default/patches/0009-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch
 create mode 100644 config/u-boot/x86/patches/0008-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch
 create mode 100644 config/u-boot/x86_64/patches/0008-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch

diff --git a/config/u-boot/default/patches/0009-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch b/config/u-boot/default/patches/0009-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch
new file mode 100644
index 00000000..905b311c
--- /dev/null
+++ b/config/u-boot/default/patches/0009-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch
@@ -0,0 +1,61 @@
+From 3c61a3257ad5799202cac64020d3b4af21b72de3 Mon Sep 17 00:00:00 2001
+From: Markus Volk <f_l_k@t-online.de>
+Date: Wed, 30 Oct 2024 06:07:16 +0100
+Subject: [PATCH 1/1] scripts/dtc/pylibfdt/libfdt.i_shipped: Use
+ SWIG_AppendOutput
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Swig has changed language specific AppendOutput functions. The helper
+macro SWIG_AppendOutput remains unchanged. Use that instead
+of SWIG_Python_AppendOutput, which would require an extra parameter
+since swig 4.3.0.
+
+/home/flk/poky/build-test/tmp/work/qemux86_64-poky-linux/u-boot/2024.10/git/arch/x86/cpu/u-boot-64.lds
+| scripts/dtc/pylibfdt/libfdt_wrap.c: In function ‘_wrap_fdt_next_node’:
+| scripts/dtc/pylibfdt/libfdt_wrap.c:5581:17: error: too few arguments to function ‘SWIG_Python_AppendOutput’
+|  5581 |     resultobj = SWIG_Python_AppendOutput(resultobj, val);
+|       |                 ^~~~~~~~~~~~~~~~~~~~~~~~
+
+Signed-off-by: Markus Volk <f_l_k@t-online.de>
+Reported-by: Rudi Heitbaum <rudi@heitbaum.com>
+Link: https://github.com/dgibson/dtc/pull/154
+---
+ scripts/dtc/pylibfdt/libfdt.i_shipped | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/scripts/dtc/pylibfdt/libfdt.i_shipped b/scripts/dtc/pylibfdt/libfdt.i_shipped
+index 56cc5d48f4..e4659489a9 100644
+--- a/scripts/dtc/pylibfdt/libfdt.i_shipped
++++ b/scripts/dtc/pylibfdt/libfdt.i_shipped
+@@ -1037,7 +1037,7 @@ typedef uint32_t fdt32_t;
+ 			fdt_string(fdt1, fdt32_to_cpu($1->nameoff)));
+ 		buff = PyByteArray_FromStringAndSize(
+ 			(const char *)($1 + 1), fdt32_to_cpu($1->len));
+-		resultobj = SWIG_Python_AppendOutput(resultobj, buff);
++		resultobj = SWIG_AppendOutput(resultobj, buff);
+ 	}
+ }
+ 
+@@ -1076,7 +1076,7 @@ typedef uint32_t fdt32_t;
+ 
+ %typemap(argout) int *depth {
+         PyObject *val = Py_BuildValue("i", *arg$argnum);
+-        resultobj = SWIG_Python_AppendOutput(resultobj, val);
++        resultobj = SWIG_AppendOutput(resultobj, val);
+ }
+ 
+ %apply int *depth { int *depth };
+@@ -1092,7 +1092,7 @@ typedef uint32_t fdt32_t;
+            if (PyTuple_GET_SIZE(resultobj) == 0)
+               resultobj = val;
+            else
+-              resultobj = SWIG_Python_AppendOutput(resultobj, val);
++              resultobj = SWIG_AppendOutput(resultobj, val);
+         }
+ }
+ 
+-- 
+2.39.5
+
diff --git a/config/u-boot/x86/patches/0008-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch b/config/u-boot/x86/patches/0008-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch
new file mode 100644
index 00000000..905b311c
--- /dev/null
+++ b/config/u-boot/x86/patches/0008-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch
@@ -0,0 +1,61 @@
+From 3c61a3257ad5799202cac64020d3b4af21b72de3 Mon Sep 17 00:00:00 2001
+From: Markus Volk <f_l_k@t-online.de>
+Date: Wed, 30 Oct 2024 06:07:16 +0100
+Subject: [PATCH 1/1] scripts/dtc/pylibfdt/libfdt.i_shipped: Use
+ SWIG_AppendOutput
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Swig has changed language specific AppendOutput functions. The helper
+macro SWIG_AppendOutput remains unchanged. Use that instead
+of SWIG_Python_AppendOutput, which would require an extra parameter
+since swig 4.3.0.
+
+/home/flk/poky/build-test/tmp/work/qemux86_64-poky-linux/u-boot/2024.10/git/arch/x86/cpu/u-boot-64.lds
+| scripts/dtc/pylibfdt/libfdt_wrap.c: In function ‘_wrap_fdt_next_node’:
+| scripts/dtc/pylibfdt/libfdt_wrap.c:5581:17: error: too few arguments to function ‘SWIG_Python_AppendOutput’
+|  5581 |     resultobj = SWIG_Python_AppendOutput(resultobj, val);
+|       |                 ^~~~~~~~~~~~~~~~~~~~~~~~
+
+Signed-off-by: Markus Volk <f_l_k@t-online.de>
+Reported-by: Rudi Heitbaum <rudi@heitbaum.com>
+Link: https://github.com/dgibson/dtc/pull/154
+---
+ scripts/dtc/pylibfdt/libfdt.i_shipped | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/scripts/dtc/pylibfdt/libfdt.i_shipped b/scripts/dtc/pylibfdt/libfdt.i_shipped
+index 56cc5d48f4..e4659489a9 100644
+--- a/scripts/dtc/pylibfdt/libfdt.i_shipped
++++ b/scripts/dtc/pylibfdt/libfdt.i_shipped
+@@ -1037,7 +1037,7 @@ typedef uint32_t fdt32_t;
+ 			fdt_string(fdt1, fdt32_to_cpu($1->nameoff)));
+ 		buff = PyByteArray_FromStringAndSize(
+ 			(const char *)($1 + 1), fdt32_to_cpu($1->len));
+-		resultobj = SWIG_Python_AppendOutput(resultobj, buff);
++		resultobj = SWIG_AppendOutput(resultobj, buff);
+ 	}
+ }
+ 
+@@ -1076,7 +1076,7 @@ typedef uint32_t fdt32_t;
+ 
+ %typemap(argout) int *depth {
+         PyObject *val = Py_BuildValue("i", *arg$argnum);
+-        resultobj = SWIG_Python_AppendOutput(resultobj, val);
++        resultobj = SWIG_AppendOutput(resultobj, val);
+ }
+ 
+ %apply int *depth { int *depth };
+@@ -1092,7 +1092,7 @@ typedef uint32_t fdt32_t;
+            if (PyTuple_GET_SIZE(resultobj) == 0)
+               resultobj = val;
+            else
+-              resultobj = SWIG_Python_AppendOutput(resultobj, val);
++              resultobj = SWIG_AppendOutput(resultobj, val);
+         }
+ }
+ 
+-- 
+2.39.5
+
diff --git a/config/u-boot/x86_64/patches/0008-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch b/config/u-boot/x86_64/patches/0008-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch
new file mode 100644
index 00000000..905b311c
--- /dev/null
+++ b/config/u-boot/x86_64/patches/0008-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch
@@ -0,0 +1,61 @@
+From 3c61a3257ad5799202cac64020d3b4af21b72de3 Mon Sep 17 00:00:00 2001
+From: Markus Volk <f_l_k@t-online.de>
+Date: Wed, 30 Oct 2024 06:07:16 +0100
+Subject: [PATCH 1/1] scripts/dtc/pylibfdt/libfdt.i_shipped: Use
+ SWIG_AppendOutput
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Swig has changed language specific AppendOutput functions. The helper
+macro SWIG_AppendOutput remains unchanged. Use that instead
+of SWIG_Python_AppendOutput, which would require an extra parameter
+since swig 4.3.0.
+
+/home/flk/poky/build-test/tmp/work/qemux86_64-poky-linux/u-boot/2024.10/git/arch/x86/cpu/u-boot-64.lds
+| scripts/dtc/pylibfdt/libfdt_wrap.c: In function ‘_wrap_fdt_next_node’:
+| scripts/dtc/pylibfdt/libfdt_wrap.c:5581:17: error: too few arguments to function ‘SWIG_Python_AppendOutput’
+|  5581 |     resultobj = SWIG_Python_AppendOutput(resultobj, val);
+|       |                 ^~~~~~~~~~~~~~~~~~~~~~~~
+
+Signed-off-by: Markus Volk <f_l_k@t-online.de>
+Reported-by: Rudi Heitbaum <rudi@heitbaum.com>
+Link: https://github.com/dgibson/dtc/pull/154
+---
+ scripts/dtc/pylibfdt/libfdt.i_shipped | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/scripts/dtc/pylibfdt/libfdt.i_shipped b/scripts/dtc/pylibfdt/libfdt.i_shipped
+index 56cc5d48f4..e4659489a9 100644
+--- a/scripts/dtc/pylibfdt/libfdt.i_shipped
++++ b/scripts/dtc/pylibfdt/libfdt.i_shipped
+@@ -1037,7 +1037,7 @@ typedef uint32_t fdt32_t;
+ 			fdt_string(fdt1, fdt32_to_cpu($1->nameoff)));
+ 		buff = PyByteArray_FromStringAndSize(
+ 			(const char *)($1 + 1), fdt32_to_cpu($1->len));
+-		resultobj = SWIG_Python_AppendOutput(resultobj, buff);
++		resultobj = SWIG_AppendOutput(resultobj, buff);
+ 	}
+ }
+ 
+@@ -1076,7 +1076,7 @@ typedef uint32_t fdt32_t;
+ 
+ %typemap(argout) int *depth {
+         PyObject *val = Py_BuildValue("i", *arg$argnum);
+-        resultobj = SWIG_Python_AppendOutput(resultobj, val);
++        resultobj = SWIG_AppendOutput(resultobj, val);
+ }
+ 
+ %apply int *depth { int *depth };
+@@ -1092,7 +1092,7 @@ typedef uint32_t fdt32_t;
+            if (PyTuple_GET_SIZE(resultobj) == 0)
+               resultobj = val;
+            else
+-              resultobj = SWIG_Python_AppendOutput(resultobj, val);
++              resultobj = SWIG_AppendOutput(resultobj, val);
+         }
+ }
+ 
+-- 
+2.39.5
+

From b0a23840327f7df97d3b4ea03d0e3f3fe93291c9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 21:02:32 +0000
Subject: [PATCH 0972/1549] Revert "Remove legacy update/vendor commands"

This reverts commit 781320514623653077cda2d910b9baf150949bd1.

I'm doing changes for 20241206 rev8. It was a mistake to
remove these; they will be removed again, after rev8.

The documentation standardised on ./mk a while ago now, and
it's almost time to remove these commands. However, anyone
using the old commands ought to be able to, up to and including
any revision of the Libreboot 20241206 release.

It is my intention that these legacy commands finally be
removed for the next testing release, as part of a much wider
build system audit that I'm doing between now and then.

(Libreboot Build System Audit 7 is underway, and several of
these early audit7 changes are going on 20241206 rev8; after
that, I will create a branch named 20241206_branch off of rev8,
and anything in master from then on will contain much wilder
changes, with more conservative changes in 20241206_branch)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build        | 4 +---
 script/trees | 7 ++++---
 update       | 1 +
 vendor       | 1 +
 4 files changed, 7 insertions(+), 6 deletions(-)
 create mode 120000 update
 create mode 120000 vendor

diff --git a/build b/build
index 3194397f..033cb433 100755
--- a/build
+++ b/build
@@ -1,8 +1,6 @@
 #!/usr/bin/env sh
 # SPDX-License-Identifier: GPL-3.0-or-later
-# Copyright (c) 2014-2015,2020-2024 Leah Rowe <leah@libreboot.org>
-# Copyright (c) 2015 Patrick "P. J." McDermott <pj@pehjota.net>
-# Copyright (c) 2015-2016 Klemens Nanni <contact@autoboot.org>
+# Copyright (c) 2020-2024 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
 set -u -e
diff --git a/script/trees b/script/trees
index 6bf00e18..1c38aa48 100755
--- a/script/trees
+++ b/script/trees
@@ -17,7 +17,7 @@ eval `setvars "" xarch srcdir premake cmakedir xlang mode makeargs elfdir cmd \
     defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs gccver gccfull \
     gnatver gnatfull gccdir gnatdir`; badhash="n"
 
-main()
+tree()
 {
 	while getopts f:b:m:u:c:x:s:l:n:d: option; do
 		[ -n "$_f" ] && $err "only one flag is permitted"
@@ -302,7 +302,8 @@ handle_makefile()
 	    $dry x_ cp "$srcdir/$_copy" "$defconfig"
 
 	[ -e "$srcdir/.git" ] && [ "$project" = "u-boot" ] && \
-	    [ "$mode" = "distclean" ] && $dry x_ git -C "$srcdir" $cleanargs clean -fdx; :
+	    [ "$mode" = "distclean" ] && \
+		$dry x_ git -C "$srcdir" $cleanargs clean -fdx; :
 }
 
 run_make_command()
@@ -350,6 +351,6 @@ copy_elf()
 	done < "$listfile"; x_ make clean -C "$srcdir" $cleanargs
 }
 
-main "$@" || exit 0
+tree "$@" || exit 0
 . "$mkhelpercfg"
 $cmd
diff --git a/update b/update
new file mode 120000
index 00000000..c795b054
--- /dev/null
+++ b/update
@@ -0,0 +1 @@
+build
\ No newline at end of file
diff --git a/vendor b/vendor
new file mode 120000
index 00000000..c795b054
--- /dev/null
+++ b/vendor
@@ -0,0 +1 @@
+build
\ No newline at end of file

From 466ada423ddabacd6d7c8488b32ca1812f134033 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 21:25:55 +0000
Subject: [PATCH 0973/1549] move xbmkpath to XBMK_CACHE/

When doing ./mk release, the build system would create
symlinks inside xbmkpath/ relative to the current work tree,
which will differ from what's in PATH.

Since XBMK_CACHE is already set globally, from the main work
tree and the release-build work tree, that means we can know
reliably that PATH is always correct if we put xbmkpath/
inside XBMK_CACHE.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 29 +++++++++++++++--------------
 script/trees   |  7 ++++---
 2 files changed, 19 insertions(+), 17 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index ef54f143..2c86e37d 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -87,20 +87,6 @@ fi
 id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
 [ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
 
-[ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || unset TMPDIR
-[ -n "${TMPDIR+x}" ] && export TMPDIR="$TMPDIR"
-
-if [ -z "${TMPDIR+x}" ]; then
-	[ -f "lock" ] && $err "$PWD/lock exists. Is a build running?"
-	export TMPDIR="/tmp"
-	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
-	touch lock || $err "cannot create 'lock' file"
-	rm -Rf xbmkpath || $err "cannot remove xbmkpath"
-	mkdir -p xbmkpath || $err "cannot create xbmkpath"
-	export PATH="$PWD/xbmkpath:$PATH" || $err "Can't create xbmkpath"
-	xbmk_parent="y"
-fi
-
 # XBMK_CACHE is a directory, for caching downloads and git repositories
 [ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$PWD/cache"
 [ -z "$XBMK_CACHE" ] && export XBMK_CACHE="$PWD/cache"
@@ -109,6 +95,21 @@ fi
 [ -L "$XBMK_CACHE" ] && export XBMK_CACHE="$PWD/cache"
 [ -f "$XBMK_CACHE" ] && $err "cachedir '$XBMK_CACHE' exists but it's a file"
 
+# unify all temporary files/directories in a single TMPDIR
+[ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || unset TMPDIR
+[ -n "${TMPDIR+x}" ] && export TMPDIR="$TMPDIR"
+if [ -z "${TMPDIR+x}" ]; then
+	[ -f "lock" ] && $err "$PWD/lock exists. Is a build running?"
+	export TMPDIR="/tmp"
+	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
+	touch lock || $err "cannot create 'lock' file"
+	rm -Rf "$XBMK_CACHE/xbmkpath" || $err "cannot remove xbmkpath"
+	mkdir -p "$XBMK_CACHE/xbmkpath" || $err "cannot create xbmkpath"
+	export PATH="$XBMK_CACHE/xbmkpath:$PATH" || \
+	    $err "Can't create xbmkpath"
+	xbmk_parent="y"
+fi
+
 # if "y": a coreboot target won't be built if target.cfg says release="n"
 # (this is used to exclude certain build targets from releases)
 [ -z "${XBMK_RELEASE+x}" ] && export XBMK_RELEASE="n"
diff --git a/script/trees b/script/trees
index 1c38aa48..a3ea1e6f 100755
--- a/script/trees
+++ b/script/trees
@@ -216,7 +216,8 @@ check_cross_compiler()
 		    $err "!mkxgcc $project/$xtree '$xfix' '$xgccargs'"
 
 		# we only want to mess with hostcc to build xgcc
-		rm -f xbmkpath/* || $err "Cannot clear xbmkpath/"; :
+		rm -f "$XBMK_CACHE/xbmkpath/"* || \
+		    $err "Cannot clear xbmkpath/"; :
 	done; return 0
 }
 
@@ -253,8 +254,8 @@ check_gnu_path()
 	[ "$gnatfull" = "$gccfull" ] || return 1
 
 	(
-	rm -f xbmkpath/* || $err "Cannot clear xbmkpath/"
-	x_ cd xbmkpath
+	rm -f "$XBMK_CACHE/xbmkpath/"* || $err "Cannot clear xbmkpath/"
+	cd "$XBMK_CACHE/xbmkpath" || $err "Can't cd to xbmkpath/"
 	for _gnubin in "$_gnudir/$2"*"-$_gnuver"; do
 		[ -e "$_gnubin" ] || continue; _gnuutil="${_gnubin##*/}"
 		x_ ln -s "$_gnubin" "${_gnuutil%"-$_gnuver"}"

From d3a732a64db0f40a90648106436097373225d00a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 21:53:55 +0000
Subject: [PATCH 0974/1549] lib.sh dependencies: support --reinstall argument

./mk dependencies debian --reinstall

Add --reinstall and it'll do:

apt-get install --reinstall

This can be useful when updating from a stable release
to a testing release. The variable, "reinstall" can be
configured for other distros, but it's currently only
configured for Debian-based distros.

Also, it can be anything. For example, you could add -y;
however, a 4th argument will not be accepted. For example,
you cannot do:

./mk dependencies debian --reinstall -y

If you do this, it'll only see --reinstall; similarly, if
you did this command:

./mk dependencies debian -y --reinstall

then -y would be passed, but not --reinstall. This is an
intentional design decision, in case you accidentally pasted
or subshelled something that outputted something undesirable,
to prevent possible abuse.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/debian     | 2 +-
 config/dependencies/trisquel   | 2 +-
 config/dependencies/ubuntu2004 | 2 +-
 config/dependencies/ubuntu2404 | 2 +-
 include/lib.sh                 | 4 +++-
 5 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/config/dependencies/debian b/config/dependencies/debian
index 94ff104c..48dab1c9 100755
--- a/config/dependencies/debian
+++ b/config/dependencies/debian
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="apt-get install"
+pkg_add="apt-get install $reinstall"
 pkglist=" \
 acpica-tools autoconf autogen automake autopoint autotools-dev bc \
 binutils-arm-none-eabi bison build-essential cmake curl device-tree-compiler \
diff --git a/config/dependencies/trisquel b/config/dependencies/trisquel
index e8110260..5575cd38 100755
--- a/config/dependencies/trisquel
+++ b/config/dependencies/trisquel
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="apt-get install"
+pkg_add="apt-get install $reinstall"
 pkglist=" \
 autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \
 bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \
diff --git a/config/dependencies/ubuntu2004 b/config/dependencies/ubuntu2004
index d22cafdd..de4e3449 100755
--- a/config/dependencies/ubuntu2004
+++ b/config/dependencies/ubuntu2004
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="apt-get install"
+pkg_add="apt-get install $reinstall"
 pkglist=" \
 autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \
 bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \
diff --git a/config/dependencies/ubuntu2404 b/config/dependencies/ubuntu2404
index cb44fbf5..4d9add19 100755
--- a/config/dependencies/ubuntu2404
+++ b/config/dependencies/ubuntu2404
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="apt-get install"
+pkg_add="apt-get install $reinstall"
 pkglist=" \
 autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \
 bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \
diff --git a/include/lib.sh b/include/lib.sh
index 2c86e37d..4911c34f 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -45,7 +45,7 @@ chkvars()
 }
 
 eval `setvars "" _nogit board xbmk_parent versiondate projectsite projectname \
-    aur_notice configdir datadir version relname`
+    aur_notice configdir datadir version relname reinstall`
 
 for fv in projectname projectsite version versiondate; do
 	eval "[ ! -f "$fv" ] || read -r $fv < \"$fv\" || :"
@@ -72,6 +72,8 @@ e()
 install_packages()
 {
 	[ $# -lt 2 ] && $err "fewer than two arguments"
+	[ $# -gt 2 ] && reinstall="$3"
+
 	eval `setcfg "config/dependencies/$2"`
 
 	$pkg_add $pkglist || $err "Cannot install packages"

From 27c8c1c16bae2cec7d3d7eab05fc0071e6195e02 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Dec 2024 22:31:24 +0000
Subject: [PATCH 0975/1549] replace liblz4-tool with lz4 and liblz4-dev

In Debian dependencies files. These are available in
Debian Stable, but liblz4-tool is a transitional
package referring to lz4; liblz4-tool transition
package is unavailable in Debian sid, so remove it
from the dependencies files.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/debian     | 2 +-
 config/dependencies/trisquel   | 4 ++--
 config/dependencies/ubuntu2004 | 2 +-
 config/dependencies/ubuntu2404 | 2 +-
 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/config/dependencies/debian b/config/dependencies/debian
index 48dab1c9..00ccfc1a 100755
--- a/config/dependencies/debian
+++ b/config/dependencies/debian
@@ -7,7 +7,7 @@ binutils-arm-none-eabi bison build-essential cmake curl device-tree-compiler \
 doxygen e2fsprogs efitools flex fonts-unifont gawk gcc-arm-linux-gnueabi \
 gcc-arm-none-eabi gdb gettext git gnat help2man innoextract libdevmapper-dev \
 libfdt-dev libfont-freetype-perl libfreetype-dev libftdi-dev libftdi1-dev libfuse-dev \
-libjaylink-dev libgnutls28-dev libgpiod-dev liblz4-tool liblzma-dev libncurses5-dev
+libjaylink-dev libgnutls28-dev libgpiod-dev lz4 liblz4-dev liblzma-dev libncurses5-dev
 libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev libpython3-dev \
 libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0 libusb-1.0-0-dev \
 libusb-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted pciutils \
diff --git a/config/dependencies/trisquel b/config/dependencies/trisquel
index 5575cd38..fb364c28 100755
--- a/config/dependencies/trisquel
+++ b/config/dependencies/trisquel
@@ -6,8 +6,8 @@ autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \
 bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \
 flex gawk gcc-arm-linux-gnueabi gcc-arm-none-eabi gdb gettext git gnat help2man \
 innoextract libdevmapper-dev libfdt-dev libfont-freetype-perl libfreetype6-dev \
-libftdi-dev libfuse-dev libgnutls28-dev libgpiod-dev libjaylink-dev liblz4-tool \
-liblzma-dev libncurses5-dev ccache \
+libftdi-dev libfuse-dev libgnutls28-dev libgpiod-dev libjaylink-dev \
+liblzma-dev libncurses5-dev ccache lz4 liblz4-dev \
 libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev \
 libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \
 libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \
diff --git a/config/dependencies/ubuntu2004 b/config/dependencies/ubuntu2004
index de4e3449..ce69a4d9 100755
--- a/config/dependencies/ubuntu2004
+++ b/config/dependencies/ubuntu2004
@@ -6,7 +6,7 @@ autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \
 bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \
 flex gawk gcc-arm-linux-gnueabi gcc-arm-none-eabi gdb gettext git gnat help2man \
 innoextract libdevmapper-dev libfdt-dev libfont-freetype-perl libfreetype6-dev \
-libftdi-dev libfuse-dev libgnutls28-dev liblz4-tool liblzma-dev libncurses5-dev \
+libftdi-dev libfuse-dev libgnutls28-dev lz4 liblz4-dev liblzma-dev libncurses5-dev \
 libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev \
 libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \
 libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \
diff --git a/config/dependencies/ubuntu2404 b/config/dependencies/ubuntu2404
index 4d9add19..b0633e69 100755
--- a/config/dependencies/ubuntu2404
+++ b/config/dependencies/ubuntu2404
@@ -6,7 +6,7 @@ autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \
 bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \
 flex gawk gcc-arm-linux-gnueabi gcc-arm-none-eabi gdb gettext git gnat help2man \
 innoextract libdevmapper-dev libfdt-dev libfont-freetype-perl libfreetype6-dev \
-libftdi-dev libfuse-dev libgnutls28-dev liblz4-tool liblzma-dev libncurses5-dev \
+libftdi-dev libfuse-dev libgnutls28-dev lz4 liblz4-dev liblzma-dev libncurses5-dev \
 libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev \
 libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \
 libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \

From dc95e912bfe6b7a360916ab409be2de5b9b16eeb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Dec 2024 00:01:05 +0000
Subject: [PATCH 0976/1549] bump flashprog to revision eb2c041 (14 Nov 2024)

This brings in several important bug fixes from upstream.

With this, the following upstream changes have been imported:

* eb2c041 cli_wp: Fix bail-out when multiple chips are detected
* e05e334 cli_common: Rename local `optarg' variable
* efad610 manibuilder: Include NetBSD (anita tags) in `native' target
* 09289fb manibuilder: Replace unmaintained DEFAULT_TAGS list
* 1457cc6 manibuilder: Stop build testing oldest, EOL targets
* 1faffa5 manibuilder: Fix Ubuntu Noble Numbat (24.04) for amd64
* 61dbe36 udev rules: Use `uaccess' tag instead of `plugdev' group
* 63d30a2 install: Install binary into bin/, not sbin/
* 6ce26a7 flashchips: add Winbond W25R512NW / W74M51NW
* 612519b ichspi: Add Intel Arrow Lake support
* d5a61ef ichspi: Add Intel Lunar Lake support
* 5e0d9b0 ichspi: Add Intel Meteor Lake SoC
* 0ef2eb8 ichspi: Add Intel Snow Ridge SoC
* 42daab1 ichspi: Properly add Emmitsburg PCH
* af26008 ich_descriptors_tool: Add missing options for EHL & C620
* 82fe123 ich_descriptors: Hard code number of masters for newer gens
* 157b818 ich_descriptors: Guard MCH strap handling by chipset version
* db878fb ich_descriptors: Drop chipset detection based on `freq_read`
* b3cc2c6 ich_descriptors: Unify pretty printing of PCH100+ masters
* 8e4151d chipset_enable: Remove hidden-spidev workaround for Elkhart Lake
* 6d72efa chipset_enable: Remove hidden-spidev workaround for all 14nm PCHs
* 092a699 chipset_enable: Remove hidden-spidev workaround for TGP+
* 5bbd324 chipset_enable: Add missing PCI ID for Intel PCH H410
* a088475 chipset_enable: Factor PCH100 hidden-spidev workaround out
* 5eb7a58 Drop 1s delay before automatic verification
* 7427569 libflashprog: Run programmer_shutdown() on failed setup
* 5a9d6ea chipset_enable: Fix memory leaks introduced with AMD SPI100
* e149fbe Only try to check erase opcodes for SPI25 chips
* 07ebc68 Avoid NULL deref in check_block_eraser()
* 2405310 chipset_enable: Mark Intel QM87 as DEP
* 9897063 flashchips: Allow volatile register writes for W25Q128.V
* c972aed flashchips: Configure WP for MX25L25635F/45G
* 8f7122c cli: Add new write-protect CLI
* eed122d layout: Implement flashprog_layout_get_region_range()
* 1f693db cli: Add new `config' CLI for status/config registers
* 85c2cf8 cli: Implement "command" option parser
* 24c0977 cli: Add print function for generic CLI options
* b82aadc cli: Move some declarations into `cli.h`
* a705043 cli: Add a new CLI wrapper
* d39c7d6 cli: Extract basic CLI init into cli_common
* df6ce9f cli: Extract log argument parsing into cli_common
* 0da839b cli: Extract layout argument processing
* d91822a cli: Extract layout argument parsing into cli_common
* e7899a9 cli: Move all long-option keys into cli.h
* 34e783a cli: Extract flash argument parsing into cli_common
* e68b08b cli_classic: Rewrite programmer argument parsing
* 6898f5b spi25_statusreg: Prefer volatile status register writes
* 55e7884 Introduce FLASHPROG_FLAG_NON_VOLATILE_WRSR
* fbba454 Install udev rules
* 768cfc4 flashchips: Add GigaDevice GD25LR512ME

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../0001-Workaround-for-MX25-chips.patch      | 24 +++++++++----------
 config/git/flashprog/pkg.cfg                  |  2 +-
 2 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch b/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch
index fc3befb1..f7b9ad79 100644
--- a/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch
+++ b/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch
@@ -1,4 +1,4 @@
-From 9d8c79eecf760e4f963a0a7f29b577cd84962a2a Mon Sep 17 00:00:00 2001
+From 9d7b97a0f08a3f0f62c389aee61e92377d82d645 Mon Sep 17 00:00:00 2001
 From: consts <grudnevkv@gmail.com>
 Date: Fri, 2 Mar 2018 07:03:37 +0000
 Subject: [PATCH 1/1] Workaround for MX25 chips
@@ -17,10 +17,10 @@ Change-Id: I43a306b67862b59c1dcd02729e189f3bf73f481b
  3 files changed, 16 insertions(+), 1 deletion(-)
 
 diff --git a/cli_classic.c b/cli_classic.c
-index ab5f8b1..2825033 100644
+index 26253dc..5a80394 100644
 --- a/cli_classic.c
 +++ b/cli_classic.c
-@@ -67,6 +67,7 @@ static void cli_classic_usage(const char *name)
+@@ -68,6 +68,7 @@ static void cli_classic_usage(const char *name)
  	       " -o | --output <logfile>            log output to <logfile>\n"
  	       "      --flash-contents <ref-file>   assume flash contents to be <ref-file>\n"
  	       " -L | --list-supported              print supported devices\n"
@@ -28,7 +28,7 @@ index ab5f8b1..2825033 100644
  #if CONFIG_PRINT_WIKI == 1
  	       " -z | --list-supported-wiki         print supported devices in wiki syntax\n"
  #endif
-@@ -262,6 +263,7 @@ int main(int argc, char *argv[])
+@@ -231,6 +232,7 @@ int flashprog_classic_main(int argc, char *argv[])
  		{"version",		0, NULL, 'R'},
  		{"output",		1, NULL, 'o'},
  		{"progress",		0, NULL, OPTION_PROGRESS},
@@ -36,9 +36,9 @@ index ab5f8b1..2825033 100644
  		{NULL,			0, NULL, 0},
  	};
  
-@@ -478,6 +480,9 @@ int main(int argc, char *argv[])
- 				cli_classic_abort_usage("No log filename specified.\n");
- 			}
+@@ -357,6 +359,9 @@ int flashprog_classic_main(int argc, char *argv[])
+ 			cli_classic_usage(argv[0]);
+ 			exit(0);
  			break;
 +		case 'm': /* --workaround-mx */
 +			workaround_mx = 1;
@@ -47,12 +47,12 @@ index ab5f8b1..2825033 100644
  			show_progress = true;
  			break;
 diff --git a/include/programmer.h b/include/programmer.h
-index 873dc37..2007fd6 100644
+index 11d15a8..3b33d5a 100644
 --- a/include/programmer.h
 +++ b/include/programmer.h
-@@ -364,6 +364,7 @@ enum ich_chipset {
- 	CHIPSET_GEMINI_LAKE,
- 	CHIPSET_ELKHART_LAKE,
+@@ -372,6 +372,7 @@ enum ich_chipset {
+ 	CHIPSET_LUNAR_LAKE,
+ 	CHIPSET_ARROW_LAKE,
  };
 +extern int workaround_mx; /* workaround for MX25* chips, makes flash operations more reliable, less failures */
  
@@ -87,5 +87,5 @@ index 748ef99..9bbdee9 100644
  				       readarr);
  }
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/git/flashprog/pkg.cfg b/config/git/flashprog/pkg.cfg
index e1a89795..6cfbdb38 100644
--- a/config/git/flashprog/pkg.cfg
+++ b/config/git/flashprog/pkg.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-rev="d128a0ae87086b37c0e5d7a8d934bcdee173402f"
+rev="eb2c04185f8f471c768b742d66e4c552effdd9cb"
 url="https://review.sourcearcade.org/flashprog"
 bkup_url="https://github.com/SourceArcade/flashprog.git"

From d344cd95eac4be79efc6cb2ebbed788519f69cb3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Dec 2024 00:11:26 +0000
Subject: [PATCH 0977/1549] flashprog: Disable -Werror

We haven't seen any build errors, but it seems flashprog
sets -Werror on CFLAGS. If you provide WARNERROR=no as
a make argument, it avoids -Werror entirely.

This is a preventative fix, for over-zealous compilers.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/flashprog/target.cfg | 3 +++
 1 file changed, 3 insertions(+)
 create mode 100644 config/flashprog/target.cfg

diff --git a/config/flashprog/target.cfg b/config/flashprog/target.cfg
new file mode 100644
index 00000000..2d9243b7
--- /dev/null
+++ b/config/flashprog/target.cfg
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+makeargs="WARNERROR=no"

From 09a01477df67e3ddc36e11123c537332d7813c50 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Dec 2024 01:45:45 +0000
Subject: [PATCH 0978/1549] t480/3050micro: force power off post power failure

The T480 has no option table, because it lacks nvram, so the
default option applies, which seems to be power on after power
failure. This is undesirable on a laptop.

It's triggered simply when your laptop battery runs out, and
once triggered, it couldn't be configured at all.

Hard-code this. The documentation will be updated later on
after this patch is pushed, telling those users who want
to change this behaviour how to modify/remove the patch,
if they wish to to do so, because some people may actually
want to run a server on the OptiPlex 3050 Micro (or if they're
crazy like I am, they will host libreboot.org on a ThinkPad).

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...-Hardcoded-poweroff-after-power-fail.patch | 82 +++++++++++++++++++
 1 file changed, 82 insertions(+)
 create mode 100644 config/coreboot/next/patches/0013-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch

diff --git a/config/coreboot/next/patches/0013-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch b/config/coreboot/next/patches/0013-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch
new file mode 100644
index 00000000..6ea65c8d
--- /dev/null
+++ b/config/coreboot/next/patches/0013-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch
@@ -0,0 +1,82 @@
+From aa13bb380d8286373089de291b62c6070df20573 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 31 Dec 2024 01:40:42 +0000
+Subject: [PATCH 1/1] soc/intel/pmc: Hardcoded poweroff after power fail
+
+Coreboot can set the power state for power on after previous
+power failure, based on the option table. On the ThinkPad T480,
+we have no nvram and, due to coreboot's design, we therefore
+have no option table, so the default setting is enabled.
+
+In my testing, this seems to be that the system will turn on
+after a power failure. If your ThinkPad was previously in a state
+where it wouldn't turn on when plugging in the power, it'd be fine.
+
+If your battery ran out later on, this would be triggered and
+your ThinkPad would permanently turn on, when plugging in a charger,
+and there is currently no way to configure this behaviour.
+
+We currently only use the common SoC PMC code on the ThinkPad
+T480, T480s and the Dell OptiPlex 3050 Micro, at the time of
+this patch, and it is desirable that the system be set to power
+off after power fail anyway.
+
+In some cases, you might want the opposite, for example if you're
+running a server. This will be documented on the website, for that
+reason.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/soc/intel/common/block/pmc/pmclib.c | 36 +++----------------------
+ 1 file changed, 4 insertions(+), 32 deletions(-)
+
+diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
+index c51a960854..a836932fe5 100644
+--- a/src/soc/intel/common/block/pmc/pmclib.c
++++ b/src/soc/intel/common/block/pmc/pmclib.c
+@@ -760,38 +760,10 @@ void pmc_clear_pmcon_sts(void)
+ 
+ void pmc_set_power_failure_state(const bool target_on)
+ {
+-	const unsigned int state = get_uint_option("power_on_after_fail",
+-					 CONFIG_MAINBOARD_POWER_FAILURE_STATE);
+-
+-	/*
+-	 * On the shutdown path (target_on == false), we only need to
+-	 * update the register for MAINBOARD_POWER_STATE_PREVIOUS. For
+-	 * all other cases, we don't write the register to avoid clob-
+-	 * bering the value set on the boot path. This is necessary,
+-	 * for instance, when we can't access the option backend in SMM.
+-	 */
+-
+-	switch (state) {
+-	case MAINBOARD_POWER_STATE_OFF:
+-		if (!target_on)
+-			break;
+-		printk(BIOS_INFO, "Set power off after power failure.\n");
+-		pmc_soc_set_afterg3_en(false);
+-		break;
+-	case MAINBOARD_POWER_STATE_ON:
+-		if (!target_on)
+-			break;
+-		printk(BIOS_INFO, "Set power on after power failure.\n");
+-		pmc_soc_set_afterg3_en(true);
+-		break;
+-	case MAINBOARD_POWER_STATE_PREVIOUS:
+-		printk(BIOS_INFO, "Keep power state after power failure.\n");
+-		pmc_soc_set_afterg3_en(target_on);
+-		break;
+-	default:
+-		printk(BIOS_WARNING, "Unknown power-failure state: %d\n", state);
+-		break;
+-	}
++	if (!target_on)
++		return;
++	printk(BIOS_INFO, "Set power off after power failure.\n");
++	pmc_soc_set_afterg3_en(false);
+ }
+ 
+ /* This function returns the highest assertion duration of the SLP_Sx assertion widths */
+-- 
+2.39.5
+

From 6d7e6c361b339e9eedcb4f9201444f16b8a4b3f6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Dec 2024 03:12:44 +0000
Subject: [PATCH 0979/1549] Bump GRUB revision to 6811f6f09 (26 November 2024)

Although this is for a stable release revision, namely
Libreboot 20241206 revision 8, I've carefully audited the
upstream changes and they all seem fine.

Several important bug fixes have been imported with this change.
Most interestly, GRUB has also added support for TPM2 Key
Protectors; we don't use this feature yet, and probably won't
for the time being, since TPM is largely security threatre for
our purposes anyway. There's no harm including all upstream
revisions, up to those ones, since those modules are not yet
added in lbmk.

Most notably, there are several file system fixes, and minor fixes
to the graphics terminal of GRUB. Minor fixes only, in terms of
what Libreboot actually uses at present.

The full list of imported changes are as follows, relative to the
previous GRUB revision, which was b53ec06a1 from 17 June 2024:

* 6811f6f09 tpm2_key_protector: Enable build for powerpc_ieee1275
* ff14b89bd ieee1275/tcg2: Add TCG2 driver for ieee1275 PowerPC firmware
* 72092a864 ieee1275/tcg2: Refactor grub_ieee1275_tpm_init()
* 8c0b5f200 ieee1275/ibmvpm: Move TPM initialization functions to own file
* 7344b3c7c ieee1275: Consolidate repeated definitions of IEEE1275_IHANDLE_INVALID
* 29d1bd2a9 term/ieee1275/serial: Cast 0 to proper type
* 99ee68a01 tss2: Adjust bit fields for big endian targets
* 3770a6905 docs: Document TPM2 key protector
* f898440cc tests: Add tpm2_key_protector_test
* 76a2bcb99 tpm2_key_protector: Add grub-emu support
* 135e0bc88 diskfilter: Look up cryptodisk devices first
* b35480b48 cryptodisk: Wipe out the cached keys from protectors
* 6abf8af3c cryptodisk: Fallback to passphrase
* fba3a474e tpm2_key_protector: Implement NV index
* 550ada7d6 tpm2_key_protector: Support authorized policy
* 5f6a2fd51 util/grub-protect: Add new tool
* ad0c52784 cryptodisk: Support key protectors
* 48e230c31 key_protector: Add TPM2 Key Protector
* 35c9904df tss2: Add TPM2 Software Stack (TSS2) support
* 63a78f4b4 tss2: Add TPM2 types and Marshal/Unmarshal functions
* 2ad159d9b tss2: Add TPM2 buffer handling functions
* 5d260302d key_protector: Add key protectors framework
* 3d60732f9 libtasn1: Add the documentation
* 99cda6788 asn1_test: Test module for libtasn1
* 504058e82 libtasn1: Compile into asn1 module
* 8a0fedef2 asn1_test: Enable the testcase only when GRUB_LONG_MAX is larger than GRUB_INT_MAX
* 66cf4cb14 asn1_test: Use the grub-specific functions and types
* 0d0913fc6 asn1_test: Print the error messages with grub_printf()
* 2e93a8e4b asn1_test: Remove "verbose" and the unnecessary printf()
* b7568e335 asn1_test: Return either 0 or 1 to reflect the results
* d60a04bae asn1_test: Rename the main functions to the test names
* 54e0e19a2 asn1_test: Include asn1_test.h only
* 0ad1d4ba8 libtasn1: Fix the potential buffer overrun
* 4160ca983 libtasn1: Use grub_divmod64() for division
* 8f56e5e5c libtasn1: Adjust the header paths in libtasn1.h
* d86df91cb libtasn1: Replace strcat() with _asn1_str_cat()
* 32fdfe600 libtasn1: Replace strcat() with strcpy() in _asn1_str_cat()
* fa498af7b libtasn1: Disable code not needed in GRUB
* 9a26abbc3 libtasn1: Import libtasn1-4.19.0
* c85c2b9f5 posix_wrap: Tweaks in preparation for libtasn1
* 4f6c46091 kern/fs: Honour file->read_hook() in grub_fs_blocklist_read()
* 792132c72 docs: Fix incorrect and potentially confusing language and minor formatting
* 1763d83f5 docs: Correct GRUB config file name for network boot
* 097fd9d9a docs: Correct chainloader UEFI secure boot info
* f48e6af11 docs: Correct PXE environment variables descriptions
* dd743ba42 loader/multiboot: Do not add modules before successful download
* 9a9082b50 grub-mkimage: Add SBAT metadata into ELF note for PowerPC targets
* f97d4618a grub-mkimage: Create new ELF note for SBAT
* f26b39860 commands/legacycfg: Avoid closing file twice
* 337cb2486 nx: Rename GRUB_DL_ALIGN to DL_ALIGN
* 31de991de kern/acpi: Fix out of bounds access in grub_acpi_xsdt_find_table()
* f5bb766e6 nx: Set the NX compatible flag for the GRUB EFI images
* 94649c026 nx: Set page permissions for loaded modules
* 09ca66673 nx: Add memory attribute get/set API
* 9fb80dd57 modules: Load module sections at page-aligned addresses
* 6e2fe134e modules: Don't allocate space for non-allocable sections
* 2b79d550f modules: Strip .llvm_addrsig sections and similar
* 246c82cda modules: Make .module_license read-only
* 616adeb80 i386/memory: Rename PAGE_SIZE to GRUB_PAGE_SIZE and make it global
* 95a7bfef5 i386/memory: Rename PAGE_SHIFT to GRUB_PAGE_SHIFT
* 1b1061409 i386/msr: Extract and improve MSR support detection code
* 929fafdf5 i386/msr: Rename grub_msr_read() and grub_msr_write()
* d96cfd7bf i386/msr: Merge rdmsr.h and wrmsr.h into msr.h
* 86ec48882 commands/tpm: Skip loopback image measurement
* 3808b1a9b net/drivers/efi/efinet: Skip virtual VLAN devices during card enumeration
* e5f047be0 efi/console: Properly clear leftover artifacts from the screen
* c5ae124e1 kern/riscv/efi/init: Use time register in grub_efi_get_time_ms()
* 9c34d56c2 loader/efi/linux: Reset freed pointer
* 92bed41bf loader/efi/linux: Reuse len variable
* 33cb8aecd lib/x86_64/relocator_asm: Use .quad instead of .long
* 77cd623de lib/x86_64/relocator_asm: Fix comment in code
* 95145eea5 loader/efi/linux: Update comment
* d333e8bb3 util/grub-mkimagexx: Explicitly move modules to __bss_start for MIPS targets
* 34b7f3721 include/grub/offsets.h: Set mod_align to 4 on MIPS
* ed0651673 gentpl: Put boot/mips/startup_raw.S into beginning of the image
* 648f2d16c configure: Add -mno-gpopt option for mips and mipsel targets
* f0710d2d8 lib/xzembed/xz_dec_bcj: Silence warning when no BCJ is available
* e61157bbd fs/erofs: Replace 64-bit modulo with bitwise operations
* 5313fa839 configure: Look for .otf fonts
* 33b94f2a9 loader/efi/chainloader: Do not print device path of chainloaded file
* ab1e6fc04 docs: Document all GRUB modules
* 9537f4403 commands/bli: Fix crash in get_part_uuid()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...s-missing-characters-for-borders-arrow.patch |  4 ++--
 ...ay-the-name-libreboot-in-the-grub-menu.patch |  6 +++---
 .../default/patches/0003-Add-CC0-license.patch  |  8 ++++----
 .../patches/0004-Define-GRUB_UINT32_MAX.patch   |  4 ++--
 .../patches/0005-Add-Argon2-algorithm.patch     | 11 ++++++-----
 ...6-Error-on-missing-Argon2id-parameters.patch |  4 ++--
 .../0007-Compile-with-Argon2id-support.patch    |  8 ++++----
 ...008-Make-grub-install-work-with-Argon2.patch |  4 ++--
 ...rd-coreboot-force-scancodes2-translate.patch |  4 ++--
 ...ayouts-don-t-print-Unknown-key-message.patch |  4 ++--
 ...nt-missing-prefix-errors-on-the-screen.patch |  8 ++++----
 ...-don-t-print-error-if-module-not-found.patch |  8 ++++----
 .../0013-don-t-print-empty-error-messages.patch |  4 ++--
 config/grub/default/target.cfg                  |  2 +-
 ...s-missing-characters-for-borders-arrow.patch |  4 ++--
 ...ay-the-name-libreboot-in-the-grub-menu.patch |  6 +++---
 .../nvme/patches/0003-Add-CC0-license.patch     |  8 ++++----
 .../patches/0004-Define-GRUB_UINT32_MAX.patch   |  4 ++--
 .../patches/0005-Add-Argon2-algorithm.patch     | 11 ++++++-----
 ...6-Error-on-missing-Argon2id-parameters.patch |  4 ++--
 .../0007-Compile-with-Argon2id-support.patch    |  8 ++++----
 ...008-Make-grub-install-work-with-Argon2.patch |  4 ++--
 ...rd-coreboot-force-scancodes2-translate.patch |  4 ++--
 ...ayouts-don-t-print-Unknown-key-message.patch |  4 ++--
 ...nt-missing-prefix-errors-on-the-screen.patch |  8 ++++----
 ...-don-t-print-error-if-module-not-found.patch |  8 ++++----
 .../0013-don-t-print-empty-error-messages.patch |  4 ++--
 ...dd-native-NVMe-driver-based-on-SeaBIOS.patch | 17 +++++++++--------
 config/grub/nvme/target.cfg                     |  2 +-
 ...s-missing-characters-for-borders-arrow.patch |  4 ++--
 ...ay-the-name-libreboot-in-the-grub-menu.patch |  6 +++---
 .../xhci/patches/0003-Add-CC0-license.patch     |  8 ++++----
 .../patches/0004-Define-GRUB_UINT32_MAX.patch   |  4 ++--
 .../patches/0005-Add-Argon2-algorithm.patch     | 11 ++++++-----
 ...6-Error-on-missing-Argon2id-parameters.patch |  4 ++--
 .../0007-Compile-with-Argon2id-support.patch    |  8 ++++----
 ...008-Make-grub-install-work-with-Argon2.patch |  4 ++--
 ...rd-coreboot-force-scancodes2-translate.patch |  4 ++--
 ...ayouts-don-t-print-Unknown-key-message.patch |  4 ++--
 ...nt-missing-prefix-errors-on-the-screen.patch |  8 ++++----
 ...-don-t-print-error-if-module-not-found.patch |  8 ++++----
 .../0013-don-t-print-empty-error-messages.patch |  4 ++--
 ...usb-Parse-SuperSpeed-companion-descrip.patch |  4 ++--
 .../patches/0015-usb-Add-enum-for-xHCI.patch    |  4 ++--
 ...btrans-Set-default-maximum-packet-size.patch |  4 ++--
 ...usb-Add-function-pointer-for-attach-de.patch |  4 ++--
 ...usb-usbhub-Add-new-private-fields-for-.patch |  4 ++--
 ...019-grub-core-bus-usb-Add-xhci-support.patch |  6 +++---
 ...usb-usbhub-Add-xHCI-non-root-hub-suppo.patch |  4 ++--
 .../0021-Fix-compilation-on-x86_64.patch        |  4 ++--
 ...dd-native-NVMe-driver-based-on-SeaBIOS.patch | 17 +++++++++--------
 config/grub/xhci/target.cfg                     |  2 +-
 52 files changed, 155 insertions(+), 150 deletions(-)

diff --git a/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
index 7aa0d568..e5d24e7e 100644
--- a/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
+++ b/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -1,4 +1,4 @@
-From 8b55c63ab6094bc9017eedd34bd7d0ae3c04cb9c Mon Sep 17 00:00:00 2001
+From 26b89e90c8d6d89f2e52b00ad15ba58fd2e1fbfb Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 31 Oct 2021 03:47:05 +0000
 Subject: [PATCH 01/13] mitigate grub's missing characters for borders/arrow
@@ -86,5 +86,5 @@ index 9c383e64a..8ec1dd1e8 100644
    grub_term_highlight_color = old_color_highlight;
    geo->timeout_y = geo->first_entry_y + geo->num_entries
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 66e68f5c..6b0665db 100644
--- a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -1,4 +1,4 @@
-From 3b719f8153350f9bfac2cb889d37562cdf566cc8 Mon Sep 17 00:00:00 2001
+From 10d264bdfde24fcf78da6f641898eb267f83066f Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 19 Nov 2022 16:30:24 +0000
 Subject: [PATCH 02/13] say the name libreboot, in the grub menu
@@ -8,7 +8,7 @@ Subject: [PATCH 02/13] say the name libreboot, in the grub menu
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c
-index bd4431000..300f55fe1 100644
+index bd4431000..ff16e0f2e 100644
 --- a/grub-core/normal/main.c
 +++ b/grub-core/normal/main.c
 @@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term,
@@ -21,5 +21,5 @@ index bd4431000..300f55fe1 100644
      return;
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/default/patches/0003-Add-CC0-license.patch b/config/grub/default/patches/0003-Add-CC0-license.patch
index 5795b05c..a5f75eb4 100644
--- a/config/grub/default/patches/0003-Add-CC0-license.patch
+++ b/config/grub/default/patches/0003-Add-CC0-license.patch
@@ -1,4 +1,4 @@
-From 09cbe5c71236987605cd375c4f69c6a36401e81c Mon Sep 17 00:00:00 2001
+From 689c09a6b675ba52318cd879b289ac3d67073cd4 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 03/13] Add CC0 license
@@ -10,10 +10,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  2 files changed, 4 insertions(+), 2 deletions(-)
 
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index 0bf40caa6..4011e2d15 100644
+index 8ad015b07..9980bae90 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -470,7 +470,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e)
+@@ -494,7 +494,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e)
  
    if (grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3") == 0
        || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3+") == 0
@@ -38,5 +38,5 @@ index a42c20bd1..7157a30aa 100644
    grub_util_error ("%s: incompatible license", filename);
  }
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch
index cb910c85..9550110e 100644
--- a/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch
+++ b/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch
@@ -1,4 +1,4 @@
-From fb7e3d852bf3658b6e3cf4725c40f2a3eaa56c5b Mon Sep 17 00:00:00 2001
+From 63dc3c9ca6e5635b5c7e7ba24c996b23e79a92e3 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 04/13] Define GRUB_UINT32_MAX
@@ -35,5 +35,5 @@ index 45079bf65..8c0b30395 100644
  
  #define GRUB_PROPERLY_ALIGNED_ARRAY(name, size) grub_properly_aligned_t name[((size) + sizeof (grub_properly_aligned_t) - 1) / sizeof (grub_properly_aligned_t)]
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/default/patches/0005-Add-Argon2-algorithm.patch b/config/grub/default/patches/0005-Add-Argon2-algorithm.patch
index 1adfdef7..fef68ee3 100644
--- a/config/grub/default/patches/0005-Add-Argon2-algorithm.patch
+++ b/config/grub/default/patches/0005-Add-Argon2-algorithm.patch
@@ -1,4 +1,4 @@
-From 9bc9e32ace3f103ff12aab063c8a250c8ba6a642 Mon Sep 17 00:00:00 2001
+From be6452a88ff3cbe033d37b739829e41798682510 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 05/13] Add Argon2 algorithm
@@ -30,10 +30,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  create mode 100644 grub-core/lib/argon2/ref.c
 
 diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi
-index 1276c5930..cd6fb0e1e 100644
+index 3ad8e3efa..d7c6232af 100644
 --- a/docs/grub-dev.texi
 +++ b/docs/grub-dev.texi
-@@ -503,11 +503,75 @@ GRUB includes some code from other projects, and it is sometimes necessary
+@@ -503,12 +503,76 @@ GRUB includes some code from other projects, and it is sometimes necessary
  to update it.
  
  @menu
@@ -41,6 +41,7 @@ index 1276c5930..cd6fb0e1e 100644
  * Gnulib::
  * jsmn::
  * minilzo::
+ * libtasn1::
  @end menu
  
 +@node Argon2
@@ -110,7 +111,7 @@ index 1276c5930..cd6fb0e1e 100644
  @section Gnulib
  
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index 705d73fab..452f11b20 100644
+index f70e02e69..f5f9b040c 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
 @@ -1219,6 +1219,14 @@ module = {
@@ -2607,5 +2608,5 @@ index 000000000..c933df80d
 +    }
 +}
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch
index 6fb8fca2..8abe7669 100644
--- a/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch
+++ b/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch
@@ -1,4 +1,4 @@
-From 7090ad00b4c3b4a9af3d7e9df245aed5969da79d Mon Sep 17 00:00:00 2001
+From 39f620fbe7c4a791062b59d4a8d26c35408aca45 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 06/13] Error on missing Argon2id parameters
@@ -54,5 +54,5 @@ index d5106402f..bc818ea69 100644
  	goto err;
        case LUKS2_KDF_TYPE_PBKDF2:
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch
index 65d89c33..19da5e51 100644
--- a/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch
+++ b/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch
@@ -1,4 +1,4 @@
-From 54bad25f08aab9bae2fbc2122aba9eb678549cc6 Mon Sep 17 00:00:00 2001
+From c192948ea0329d06cf4706667305b473b48c15f5 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 07/13] Compile with Argon2id support
@@ -11,7 +11,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  3 files changed, 17 insertions(+), 4 deletions(-)
 
 diff --git a/Makefile.util.def b/Makefile.util.def
-index 0f74a1680..5a15e5637 100644
+index 038253b37..2f19569c9 100644
 --- a/Makefile.util.def
 +++ b/Makefile.util.def
 @@ -3,7 +3,7 @@ AutoGen definitions Makefile.tpl;
@@ -35,7 +35,7 @@ index 0f74a1680..5a15e5637 100644
    common = grub-core/disk/luks.c;
    common = grub-core/disk/luks2.c;
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index 452f11b20..5c1af8682 100644
+index f5f9b040c..f1f38d8d3 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
 @@ -1242,7 +1242,7 @@ module = {
@@ -79,5 +79,5 @@ index bc818ea69..5b9eaa599 100644
  	hash = grub_crypto_lookup_md_by_name (k->kdf.u.pbkdf2.hash);
  	if (!hash)
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch
index 83c268ed..cb954976 100644
--- a/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch
+++ b/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch
@@ -1,4 +1,4 @@
-From a04a61ac008379d14749b0a1c47a8c9641c9eed5 Mon Sep 17 00:00:00 2001
+From 2887e35e882a86e474052112a23608570b3f41b2 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 08/13] Make grub-install work with Argon2
@@ -22,5 +22,5 @@ index 7dc5657bb..cf7315891 100644
        have_cryptodisk = 1;
      }
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
index 2a728537..763fea91 100644
--- a/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
+++ b/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -1,4 +1,4 @@
-From 68f1bf73366ee0da82676c076cd9f282f89a888b Mon Sep 17 00:00:00 2001
+From 548c5b227718783776b81d1e074b1982e76f2327 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 30 Oct 2023 22:19:21 +0000
 Subject: [PATCH 09/13] at_keyboard coreboot: force scancodes2+translate
@@ -103,5 +103,5 @@ index f8a129eb7..8207225c2 100644
    grub_dprintf ("atkeyb", "returned set %d\n", ps2_state.current_set);
    if (ps2_state.current_set == 2)
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
index bd15fdd5..a0eff28d 100644
--- a/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
+++ b/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
@@ -1,4 +1,4 @@
-From c0f2f1b156cbc6f89accf9ce827ae13e8a347969 Mon Sep 17 00:00:00 2001
+From 89764949b2bcfaad122800f336aa205fea4a1fed Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 31 Oct 2023 10:33:28 +0000
 Subject: [PATCH 10/13] keylayouts: don't print "Unknown key" message
@@ -34,5 +34,5 @@ index aa3ba34f2..445fa0601 100644
    }
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
index 5031474a..d2ed0055 100644
--- a/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
+++ b/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -1,4 +1,4 @@
-From 34cab10d16b45938be82705bc8720c76f2aa1542 Mon Sep 17 00:00:00 2001
+From c6de75a3369aebb51df1659d89a6d7024c84d85e Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:14:58 +0000
 Subject: [PATCH 11/13] don't print missing prefix errors on the screen
@@ -85,10 +85,10 @@ index 18de52562..2a0fea6c8 100644
  	    }
  	  file = try_open_from_prefix (prefix, filename);
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index 4011e2d15..af3bd00d0 100644
+index 9980bae90..4457cad7c 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -758,7 +758,7 @@ grub_dl_load (const char *name)
+@@ -871,7 +871,7 @@ grub_dl_load (const char *name)
      return 0;
  
    if (! grub_dl_dir) {
@@ -98,5 +98,5 @@ index 4011e2d15..af3bd00d0 100644
    }
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch
index 9184e6fb..85cde7a7 100644
--- a/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch
+++ b/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch
@@ -1,4 +1,4 @@
-From bf4fbc14d4d9a4612b70531b9678676571a46818 Mon Sep 17 00:00:00 2001
+From e8e419fe16843e7b7d8c614531df9447db689d28 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:36:22 +0000
 Subject: [PATCH 12/13] don't print error if module not found
@@ -17,10 +17,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index af3bd00d0..21d0cedb1 100644
+index 4457cad7c..ea9fe8019 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -486,7 +486,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
+@@ -510,7 +510,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
  
    s = grub_dl_find_section (e, ".modname");
    if (!s)
@@ -30,5 +30,5 @@ index af3bd00d0..21d0cedb1 100644
    mod->name = grub_strdup ((char *) e + s->sh_offset);
    if (! mod->name)
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch
index 1fc76bcd..70ce3059 100644
--- a/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch
+++ b/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch
@@ -1,4 +1,4 @@
-From e920aefcca3ad131d0f14d02955c3420fb99ee85 Mon Sep 17 00:00:00 2001
+From 6eb22aa4110b99245fd31dcaad979d5049d398d6 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 17:25:20 +0000
 Subject: [PATCH 13/13] don't print empty error messages
@@ -27,5 +27,5 @@ index 53c734de7..7cac53983 100644
  	}
      }
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/default/target.cfg b/config/grub/default/target.cfg
index b06d8e64..300fdd7e 100644
--- a/config/grub/default/target.cfg
+++ b/config/grub/default/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="default"
-rev="b53ec06a1d6f22ffc1139cbfc0f292e4ca2da9cd"
+rev="6811f6f09d61996a3acbc4fc0414e45964f0e2d9"
diff --git a/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
index b5ab0e5a..e7f71551 100644
--- a/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
+++ b/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -1,4 +1,4 @@
-From b89bf30d11fdc4fdc9bc5350621e73a2fc0d5b89 Mon Sep 17 00:00:00 2001
+From 985e87b15e60edb31d8b70f765b97cc8d436d10e Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 31 Oct 2021 03:47:05 +0000
 Subject: [PATCH 01/14] mitigate grub's missing characters for borders/arrow
@@ -86,5 +86,5 @@ index 9c383e64a..8ec1dd1e8 100644
    grub_term_highlight_color = old_color_highlight;
    geo->timeout_y = geo->first_entry_y + geo->num_entries
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index c1a674ec..5036a859 100644
--- a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -1,4 +1,4 @@
-From e074baff4a8ab3a6f8e397b49f6b3eade8728e02 Mon Sep 17 00:00:00 2001
+From f9ae737976ff52fc656459942dd0bdbd763e66df Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 19 Nov 2022 16:30:24 +0000
 Subject: [PATCH 02/14] say the name libreboot, in the grub menu
@@ -8,7 +8,7 @@ Subject: [PATCH 02/14] say the name libreboot, in the grub menu
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c
-index bd4431000..300f55fe1 100644
+index bd4431000..ff16e0f2e 100644
 --- a/grub-core/normal/main.c
 +++ b/grub-core/normal/main.c
 @@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term,
@@ -21,5 +21,5 @@ index bd4431000..300f55fe1 100644
      return;
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/nvme/patches/0003-Add-CC0-license.patch b/config/grub/nvme/patches/0003-Add-CC0-license.patch
index 6434ed21..cfb8f56a 100644
--- a/config/grub/nvme/patches/0003-Add-CC0-license.patch
+++ b/config/grub/nvme/patches/0003-Add-CC0-license.patch
@@ -1,4 +1,4 @@
-From a62b61c5f3fda5a49e007095d79e654603c658d8 Mon Sep 17 00:00:00 2001
+From 40c559b7f1e402520a9044b4d3e22b7afd1bb981 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 03/14] Add CC0 license
@@ -10,10 +10,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  2 files changed, 4 insertions(+), 2 deletions(-)
 
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index 0bf40caa6..4011e2d15 100644
+index 8ad015b07..9980bae90 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -470,7 +470,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e)
+@@ -494,7 +494,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e)
  
    if (grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3") == 0
        || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3+") == 0
@@ -38,5 +38,5 @@ index a42c20bd1..7157a30aa 100644
    grub_util_error ("%s: incompatible license", filename);
  }
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch
index 310fe8bf..bdd6d4de 100644
--- a/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch
+++ b/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch
@@ -1,4 +1,4 @@
-From c8c80f05753c26b7d7f5e3c3993039c565194875 Mon Sep 17 00:00:00 2001
+From 2d5493a02da107e7f3673b0ff5f0920ad557df78 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 04/14] Define GRUB_UINT32_MAX
@@ -35,5 +35,5 @@ index 45079bf65..8c0b30395 100644
  
  #define GRUB_PROPERLY_ALIGNED_ARRAY(name, size) grub_properly_aligned_t name[((size) + sizeof (grub_properly_aligned_t) - 1) / sizeof (grub_properly_aligned_t)]
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch b/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch
index b26e1f2c..d816825e 100644
--- a/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch
+++ b/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch
@@ -1,4 +1,4 @@
-From d171eb927e33f20627797cdca0dc81a3f3f478e0 Mon Sep 17 00:00:00 2001
+From 520573cfa2b370a7d72102321bb0735a86e2999c Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 05/14] Add Argon2 algorithm
@@ -30,10 +30,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  create mode 100644 grub-core/lib/argon2/ref.c
 
 diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi
-index 1276c5930..cd6fb0e1e 100644
+index 3ad8e3efa..d7c6232af 100644
 --- a/docs/grub-dev.texi
 +++ b/docs/grub-dev.texi
-@@ -503,11 +503,75 @@ GRUB includes some code from other projects, and it is sometimes necessary
+@@ -503,12 +503,76 @@ GRUB includes some code from other projects, and it is sometimes necessary
  to update it.
  
  @menu
@@ -41,6 +41,7 @@ index 1276c5930..cd6fb0e1e 100644
  * Gnulib::
  * jsmn::
  * minilzo::
+ * libtasn1::
  @end menu
  
 +@node Argon2
@@ -110,7 +111,7 @@ index 1276c5930..cd6fb0e1e 100644
  @section Gnulib
  
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index 705d73fab..452f11b20 100644
+index f70e02e69..f5f9b040c 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
 @@ -1219,6 +1219,14 @@ module = {
@@ -2607,5 +2608,5 @@ index 000000000..c933df80d
 +    }
 +}
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch
index 98a69414..c94c7580 100644
--- a/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch
+++ b/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch
@@ -1,4 +1,4 @@
-From 916de62553b3bcc4a565e1ea8f562031fb2a7b0f Mon Sep 17 00:00:00 2001
+From d3b500914ce84be6bcae0f4f5fefff21e4e0ca63 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 06/14] Error on missing Argon2id parameters
@@ -54,5 +54,5 @@ index d5106402f..bc818ea69 100644
  	goto err;
        case LUKS2_KDF_TYPE_PBKDF2:
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch
index 487ab2a2..cd4b6e49 100644
--- a/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch
+++ b/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch
@@ -1,4 +1,4 @@
-From fa5deb59606422773ba8e77f3ab56226a10b116b Mon Sep 17 00:00:00 2001
+From 5774fd23a381d7d96e65ede9dd300b7e83fa1f06 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 07/14] Compile with Argon2id support
@@ -11,7 +11,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  3 files changed, 17 insertions(+), 4 deletions(-)
 
 diff --git a/Makefile.util.def b/Makefile.util.def
-index 0f74a1680..5a15e5637 100644
+index 038253b37..2f19569c9 100644
 --- a/Makefile.util.def
 +++ b/Makefile.util.def
 @@ -3,7 +3,7 @@ AutoGen definitions Makefile.tpl;
@@ -35,7 +35,7 @@ index 0f74a1680..5a15e5637 100644
    common = grub-core/disk/luks.c;
    common = grub-core/disk/luks2.c;
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index 452f11b20..5c1af8682 100644
+index f5f9b040c..f1f38d8d3 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
 @@ -1242,7 +1242,7 @@ module = {
@@ -79,5 +79,5 @@ index bc818ea69..5b9eaa599 100644
  	hash = grub_crypto_lookup_md_by_name (k->kdf.u.pbkdf2.hash);
  	if (!hash)
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch
index 327989fa..7e240cc8 100644
--- a/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch
+++ b/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch
@@ -1,4 +1,4 @@
-From dad12fd3307bd15e55f5ea483f174a1d3eaa45f5 Mon Sep 17 00:00:00 2001
+From b8b9be1749d4802dde57f3547a1ee91c8fec1c3e Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 08/14] Make grub-install work with Argon2
@@ -22,5 +22,5 @@ index 7dc5657bb..cf7315891 100644
        have_cryptodisk = 1;
      }
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
index ddd3b85b..0fea10a5 100644
--- a/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
+++ b/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -1,4 +1,4 @@
-From 55d2ea1ebaa6b399736aa24393e08d007fde988c Mon Sep 17 00:00:00 2001
+From 93790c5686ea2ac4da8d2c67377fe84fd37df953 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 30 Oct 2023 22:19:21 +0000
 Subject: [PATCH 09/14] at_keyboard coreboot: force scancodes2+translate
@@ -103,5 +103,5 @@ index f8a129eb7..8207225c2 100644
    grub_dprintf ("atkeyb", "returned set %d\n", ps2_state.current_set);
    if (ps2_state.current_set == 2)
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
index ed3c1f4a..06c308d1 100644
--- a/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
+++ b/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
@@ -1,4 +1,4 @@
-From 4e89b0da7213b710bfb4d95a20e34b193f39e58c Mon Sep 17 00:00:00 2001
+From a18f0ddb9a396828bd11f540ed134047efe4b2bd Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 31 Oct 2023 10:33:28 +0000
 Subject: [PATCH 10/14] keylayouts: don't print "Unknown key" message
@@ -34,5 +34,5 @@ index aa3ba34f2..445fa0601 100644
    }
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
index 77cb7a64..f2b8de10 100644
--- a/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
+++ b/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -1,4 +1,4 @@
-From d14c9af2656ee6b63b029ac28816f38d4ae26946 Mon Sep 17 00:00:00 2001
+From 233c4f1a1182fd10ef60da98dd00b687c9edbee4 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:14:58 +0000
 Subject: [PATCH 11/14] don't print missing prefix errors on the screen
@@ -85,10 +85,10 @@ index 18de52562..2a0fea6c8 100644
  	    }
  	  file = try_open_from_prefix (prefix, filename);
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index 4011e2d15..af3bd00d0 100644
+index 9980bae90..4457cad7c 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -758,7 +758,7 @@ grub_dl_load (const char *name)
+@@ -871,7 +871,7 @@ grub_dl_load (const char *name)
      return 0;
  
    if (! grub_dl_dir) {
@@ -98,5 +98,5 @@ index 4011e2d15..af3bd00d0 100644
    }
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch
index ada8288e..41b0c2a8 100644
--- a/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch
+++ b/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch
@@ -1,4 +1,4 @@
-From d58c6298f62e70084a14aabc6c46b31d61f28152 Mon Sep 17 00:00:00 2001
+From c5ef7185f0e32a1a33aca181427cbee8f22af8d2 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:36:22 +0000
 Subject: [PATCH 12/14] don't print error if module not found
@@ -17,10 +17,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index af3bd00d0..21d0cedb1 100644
+index 4457cad7c..ea9fe8019 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -486,7 +486,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
+@@ -510,7 +510,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
  
    s = grub_dl_find_section (e, ".modname");
    if (!s)
@@ -30,5 +30,5 @@ index af3bd00d0..21d0cedb1 100644
    mod->name = grub_strdup ((char *) e + s->sh_offset);
    if (! mod->name)
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch
index f89977b4..0c9c7f80 100644
--- a/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch
+++ b/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch
@@ -1,4 +1,4 @@
-From 031ee85c97452f6d1a5f341ff41c65aace5584c4 Mon Sep 17 00:00:00 2001
+From 8e8d7a4f391538e4c0d42226ac48f5a1325deeb5 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 17:25:20 +0000
 Subject: [PATCH 13/14] don't print empty error messages
@@ -27,5 +27,5 @@ index 53c734de7..7cac53983 100644
  	}
      }
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
index bfe28efd..5e25096b 100644
--- a/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
+++ b/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
@@ -1,4 +1,4 @@
-From 246a626a369fc3730c6b5c21982fd89ed19c6fe0 Mon Sep 17 00:00:00 2001
+From 0e358c800b58f8122e8d333541eba08cf1b4dbef Mon Sep 17 00:00:00 2001
 From: Mate Kukri <km@mkukri.xyz>
 Date: Mon, 20 May 2024 11:43:35 +0100
 Subject: [PATCH 14/14] Add native NVMe driver based on SeaBIOS
@@ -31,19 +31,20 @@ index 43635d5ff..2c86dbbf6 100644
  
  endif
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index 5c1af8682..02967d3ff 100644
+index f1f38d8d3..d09f9ffbc 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
-@@ -2614,3 +2614,9 @@ module = {
-   enable = efi;
-   depends = part_gpt;
- };
+@@ -2676,4 +2676,10 @@ module = {
+   common = tests/asn1/asn1_test.c;
+   cflags = '-Wno-uninitialized';
+   cppflags = '-I$(srcdir)/lib/libtasn1-grub -I$(srcdir)/tests/asn1/';
++}
 +
 +module = {
 +  name = nvme;
 +  common = disk/nvme.c;
 +  enable = pci;
-+};
+ };
 diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c
 index 6806bff9c..fd68a513e 100644
 --- a/grub-core/commands/nativedisk.c
@@ -1070,5 +1071,5 @@ index fbf23df7f..186e76f0b 100644
  
  struct grub_disk;
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/nvme/target.cfg b/config/grub/nvme/target.cfg
index 331070b0..ea4018df 100644
--- a/config/grub/nvme/target.cfg
+++ b/config/grub/nvme/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="nvme"
-rev="b53ec06a1d6f22ffc1139cbfc0f292e4ca2da9cd"
+rev="6811f6f09d61996a3acbc4fc0414e45964f0e2d9"
diff --git a/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
index 0cc0cb34..757c8e03 100644
--- a/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
+++ b/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -1,4 +1,4 @@
-From 1ee64f2373af3ad992993f9cf103a29df0359c3c Mon Sep 17 00:00:00 2001
+From c94b9ea258feb53773bab06bc2a6c6e66a44f867 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 31 Oct 2021 03:47:05 +0000
 Subject: [PATCH 01/22] mitigate grub's missing characters for borders/arrow
@@ -86,5 +86,5 @@ index 9c383e64a..8ec1dd1e8 100644
    grub_term_highlight_color = old_color_highlight;
    geo->timeout_y = geo->first_entry_y + geo->num_entries
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 26c7df43..c6da216d 100644
--- a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -1,4 +1,4 @@
-From 0e89a40423cdd6f8f20ad03d1c2f54ee7b5ea1b6 Mon Sep 17 00:00:00 2001
+From da775eafbe79e3100ca2262bde49e3e65978e83f Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 19 Nov 2022 16:30:24 +0000
 Subject: [PATCH 02/22] say the name libreboot, in the grub menu
@@ -8,7 +8,7 @@ Subject: [PATCH 02/22] say the name libreboot, in the grub menu
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c
-index bd4431000..300f55fe1 100644
+index bd4431000..ff16e0f2e 100644
 --- a/grub-core/normal/main.c
 +++ b/grub-core/normal/main.c
 @@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term,
@@ -21,5 +21,5 @@ index bd4431000..300f55fe1 100644
      return;
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0003-Add-CC0-license.patch b/config/grub/xhci/patches/0003-Add-CC0-license.patch
index cf35c343..44d27eb5 100644
--- a/config/grub/xhci/patches/0003-Add-CC0-license.patch
+++ b/config/grub/xhci/patches/0003-Add-CC0-license.patch
@@ -1,4 +1,4 @@
-From c9be46c903d4aabc88fe4d9394d7a8e024868c32 Mon Sep 17 00:00:00 2001
+From b91e5cafa7863b5a61e97d483f98dcece374721a Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 03/22] Add CC0 license
@@ -10,10 +10,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  2 files changed, 4 insertions(+), 2 deletions(-)
 
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index 0bf40caa6..4011e2d15 100644
+index 8ad015b07..9980bae90 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -470,7 +470,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e)
+@@ -494,7 +494,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e)
  
    if (grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3") == 0
        || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3+") == 0
@@ -38,5 +38,5 @@ index a42c20bd1..7157a30aa 100644
    grub_util_error ("%s: incompatible license", filename);
  }
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
index 08566ba9..2d830d43 100644
--- a/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
+++ b/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
@@ -1,4 +1,4 @@
-From c988b6b3bb7567f9ed6bb0332b992577011970c2 Mon Sep 17 00:00:00 2001
+From 58e0d7b7bcec2392b81dda613d070804f7c68cf5 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 04/22] Define GRUB_UINT32_MAX
@@ -35,5 +35,5 @@ index 45079bf65..8c0b30395 100644
  
  #define GRUB_PROPERLY_ALIGNED_ARRAY(name, size) grub_properly_aligned_t name[((size) + sizeof (grub_properly_aligned_t) - 1) / sizeof (grub_properly_aligned_t)]
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch b/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
index 85a629c5..ff2dc74e 100644
--- a/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
+++ b/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
@@ -1,4 +1,4 @@
-From e2cfe7dcdb384ce5268a7c6e5cc8a6e8e01fc05f Mon Sep 17 00:00:00 2001
+From 65a9b252b79d5d1fa022e3da9ef91459ad8efb94 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 05/22] Add Argon2 algorithm
@@ -30,10 +30,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  create mode 100644 grub-core/lib/argon2/ref.c
 
 diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi
-index 1276c5930..cd6fb0e1e 100644
+index 3ad8e3efa..d7c6232af 100644
 --- a/docs/grub-dev.texi
 +++ b/docs/grub-dev.texi
-@@ -503,11 +503,75 @@ GRUB includes some code from other projects, and it is sometimes necessary
+@@ -503,12 +503,76 @@ GRUB includes some code from other projects, and it is sometimes necessary
  to update it.
  
  @menu
@@ -41,6 +41,7 @@ index 1276c5930..cd6fb0e1e 100644
  * Gnulib::
  * jsmn::
  * minilzo::
+ * libtasn1::
  @end menu
  
 +@node Argon2
@@ -110,7 +111,7 @@ index 1276c5930..cd6fb0e1e 100644
  @section Gnulib
  
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index 705d73fab..452f11b20 100644
+index f70e02e69..f5f9b040c 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
 @@ -1219,6 +1219,14 @@ module = {
@@ -2607,5 +2608,5 @@ index 000000000..c933df80d
 +    }
 +}
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
index 30de08cc..22553006 100644
--- a/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
+++ b/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
@@ -1,4 +1,4 @@
-From 08a2fce70c6e988eb0112d5ad2787843910811bc Mon Sep 17 00:00:00 2001
+From 809908898f9d67979885a651b295ca1fa066039c Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 06/22] Error on missing Argon2id parameters
@@ -54,5 +54,5 @@ index d5106402f..bc818ea69 100644
  	goto err;
        case LUKS2_KDF_TYPE_PBKDF2:
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
index 23f361dc..b77a5751 100644
--- a/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
+++ b/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
@@ -1,4 +1,4 @@
-From 268da8d0ccce822ffa4c2d9d35fe717245daa726 Mon Sep 17 00:00:00 2001
+From 26ae5da9ed8382869b699a653988e6c8f32bd3d1 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 07/22] Compile with Argon2id support
@@ -11,7 +11,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  3 files changed, 17 insertions(+), 4 deletions(-)
 
 diff --git a/Makefile.util.def b/Makefile.util.def
-index 0f74a1680..5a15e5637 100644
+index 038253b37..2f19569c9 100644
 --- a/Makefile.util.def
 +++ b/Makefile.util.def
 @@ -3,7 +3,7 @@ AutoGen definitions Makefile.tpl;
@@ -35,7 +35,7 @@ index 0f74a1680..5a15e5637 100644
    common = grub-core/disk/luks.c;
    common = grub-core/disk/luks2.c;
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index 452f11b20..5c1af8682 100644
+index f5f9b040c..f1f38d8d3 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
 @@ -1242,7 +1242,7 @@ module = {
@@ -79,5 +79,5 @@ index bc818ea69..5b9eaa599 100644
  	hash = grub_crypto_lookup_md_by_name (k->kdf.u.pbkdf2.hash);
  	if (!hash)
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
index ffdb306c..00f94eef 100644
--- a/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
+++ b/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
@@ -1,4 +1,4 @@
-From 5e540d3e4c01940c66425c4475a1cb6a35b188e8 Mon Sep 17 00:00:00 2001
+From 6ce0b0629aa1377237c19290f33008ff81969962 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 08/22] Make grub-install work with Argon2
@@ -22,5 +22,5 @@ index 7dc5657bb..cf7315891 100644
        have_cryptodisk = 1;
      }
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
index e4b26a38..31798205 100644
--- a/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
+++ b/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -1,4 +1,4 @@
-From 9e9c69a74e5c14fd87ae56c8b9171a808d89742e Mon Sep 17 00:00:00 2001
+From 3f69e2c35ccf2a37fd35f1821c7b85cc6df07ca7 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 30 Oct 2023 22:19:21 +0000
 Subject: [PATCH 09/22] at_keyboard coreboot: force scancodes2+translate
@@ -103,5 +103,5 @@ index f8a129eb7..8207225c2 100644
    grub_dprintf ("atkeyb", "returned set %d\n", ps2_state.current_set);
    if (ps2_state.current_set == 2)
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
index e8a3ce14..742aae38 100644
--- a/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
+++ b/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
@@ -1,4 +1,4 @@
-From ccbcdb93af6747fe77094dfa9e114a034420bdd5 Mon Sep 17 00:00:00 2001
+From 44befdaa1ee588591f46c13d057fdef56b87218c Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 31 Oct 2023 10:33:28 +0000
 Subject: [PATCH 10/22] keylayouts: don't print "Unknown key" message
@@ -34,5 +34,5 @@ index aa3ba34f2..445fa0601 100644
    }
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
index de68bb78..960c693d 100644
--- a/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
+++ b/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -1,4 +1,4 @@
-From 21a829a3a6f5e7d9028059df8057fdf8bce8fe06 Mon Sep 17 00:00:00 2001
+From bfecf6d86ccf82fb85af93600931cee589891089 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:14:58 +0000
 Subject: [PATCH 11/22] don't print missing prefix errors on the screen
@@ -85,10 +85,10 @@ index 18de52562..2a0fea6c8 100644
  	    }
  	  file = try_open_from_prefix (prefix, filename);
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index 4011e2d15..af3bd00d0 100644
+index 9980bae90..4457cad7c 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -758,7 +758,7 @@ grub_dl_load (const char *name)
+@@ -871,7 +871,7 @@ grub_dl_load (const char *name)
      return 0;
  
    if (! grub_dl_dir) {
@@ -98,5 +98,5 @@ index 4011e2d15..af3bd00d0 100644
    }
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
index 37f52e03..c098f7e8 100644
--- a/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
+++ b/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
@@ -1,4 +1,4 @@
-From edb8208100c523b5776f2cb0712fdc0c9065e517 Mon Sep 17 00:00:00 2001
+From f44fc56f06559313841de2b53637020fbe139803 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:36:22 +0000
 Subject: [PATCH 12/22] don't print error if module not found
@@ -17,10 +17,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index af3bd00d0..21d0cedb1 100644
+index 4457cad7c..ea9fe8019 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -486,7 +486,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
+@@ -510,7 +510,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
  
    s = grub_dl_find_section (e, ".modname");
    if (!s)
@@ -30,5 +30,5 @@ index af3bd00d0..21d0cedb1 100644
    mod->name = grub_strdup ((char *) e + s->sh_offset);
    if (! mod->name)
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
index 74d8bade..23672773 100644
--- a/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
+++ b/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
@@ -1,4 +1,4 @@
-From 65cb1871a3e125355df78a6d1d6f1bc7e356c4e8 Mon Sep 17 00:00:00 2001
+From e459ed55902003644e7bcd76361cc43247231a99 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 17:25:20 +0000
 Subject: [PATCH 13/22] don't print empty error messages
@@ -27,5 +27,5 @@ index 53c734de7..7cac53983 100644
  	}
      }
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch b/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
index 4c84b8c3..bc18cb13 100644
--- a/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
+++ b/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
@@ -1,4 +1,4 @@
-From 3273128b6dc6df83ef6b1d54d009a1ae26844bff Mon Sep 17 00:00:00 2001
+From 85fdf29d37b58be96042d6df24f8bc08bba9906d Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:00:27 +0100
 Subject: [PATCH 14/22] grub-core/bus/usb: Parse SuperSpeed companion
@@ -242,5 +242,5 @@ index aac5ab05a..bb2ab2e27 100644
  {
    grub_uint8_t length;
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch b/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
index 937ff1af..d8330e59 100644
--- a/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
+++ b/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
@@ -1,4 +1,4 @@
-From 3b8f2defcda1a3b51ad0be8795a2338a0ed5ca59 Mon Sep 17 00:00:00 2001
+From 26a5ed135c94b295b9a0037f5e7201eb5d38fde4 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:47:06 +0100
 Subject: [PATCH 15/22] usb: Add enum for xHCI
@@ -25,5 +25,5 @@ index 688c11f6d..ea6ee8c2c 100644
  
  typedef int (*grub_usb_iterate_hook_t) (grub_usb_device_t dev, void *data);
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch b/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
index 8f6bb001..27402534 100644
--- a/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
+++ b/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
@@ -1,4 +1,4 @@
-From ba7ce6daec155bc3deac4e0c48d470afa024ab94 Mon Sep 17 00:00:00 2001
+From 13bc84d9f43328ba47273cbcf87c517398dcfc93 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:48:03 +0100
 Subject: [PATCH 16/22] usbtrans: Set default maximum packet size
@@ -29,5 +29,5 @@ index c5680b33a..c1080bb33 100644
      max = 64;
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch b/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
index 60680bd0..eede3791 100644
--- a/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
+++ b/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
@@ -1,4 +1,4 @@
-From c4cd7fbe3e2e8ff4cbe6d0db8c3356aeee614af5 Mon Sep 17 00:00:00 2001
+From 1518589ff286b54a27d4b11f017cb43c90cbf566 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:51:42 +0100
 Subject: [PATCH 17/22] grub-core/bus/usb: Add function pointer for
@@ -117,5 +117,5 @@ index ea6ee8c2c..4dd179db2 100644
    grub_uint64_t pending_reset;
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch b/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
index bc0f957f..099ef79d 100644
--- a/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
+++ b/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
@@ -1,4 +1,4 @@
-From 1ab23afbfa7ae436741947c0b9bdacc434ad6153 Mon Sep 17 00:00:00 2001
+From 8dd981a95cc7731b63b2d79ce6f98ce2d6b5a993 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:54:40 +0100
 Subject: [PATCH 18/22] grub-core/bus/usb/usbhub: Add new private fields for
@@ -73,5 +73,5 @@ index 4dd179db2..609faf7d0 100644
  
  
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch b/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
index 02a24d5a..aaabb3da 100644
--- a/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
+++ b/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
@@ -1,4 +1,4 @@
-From 8c9e61e7b0f28a66d0f63c07b10fc6617a709010 Mon Sep 17 00:00:00 2001
+From dde187c07a8f2a1d3357aa362ffcc0fe8dab72d7 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:59:25 +0100
 Subject: [PATCH 19/22] grub-core/bus/usb: Add xhci support
@@ -74,7 +74,7 @@ index 43635d5ff..65016f856 100644
  
  endif
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index 5c1af8682..9d59acd1e 100644
+index f1f38d8d3..fda723f0c 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
 @@ -667,6 +667,13 @@ module = {
@@ -2810,5 +2810,5 @@ index 609faf7d0..eb71fa1c7 100644
  
  #endif /* GRUB_USB_H */
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch b/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
index 735ef22d..6a3266b2 100644
--- a/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
+++ b/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
@@ -1,4 +1,4 @@
-From 127961742cf7992f6989c6e89a18ab6d8f0b297f Mon Sep 17 00:00:00 2001
+From 28856bd0646e0396b3d5249a99b731f2743aec5a Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Thu, 3 Dec 2020 13:44:55 +0100
 Subject: [PATCH 20/22] grub-core/bus/usb/usbhub: Add xHCI non root hub support
@@ -123,5 +123,5 @@ index 039ebed65..d6c3f71dc 100644
  #define GRUB_USB_FEATURE_ENDP_HALT	0x00
  #define GRUB_USB_FEATURE_DEV_REMOTE_WU	0x01
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0021-Fix-compilation-on-x86_64.patch b/config/grub/xhci/patches/0021-Fix-compilation-on-x86_64.patch
index 6a5f0502..8f80664c 100644
--- a/config/grub/xhci/patches/0021-Fix-compilation-on-x86_64.patch
+++ b/config/grub/xhci/patches/0021-Fix-compilation-on-x86_64.patch
@@ -1,4 +1,4 @@
-From 8d46c537d4df8c785af4b85644d311ba53af5964 Mon Sep 17 00:00:00 2001
+From 040942842dc05c9b94c9be21f01b08da3e25fe6d Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Wed, 24 Feb 2021 08:25:41 +0100
 Subject: [PATCH 21/22] Fix compilation on x86_64
@@ -86,5 +86,5 @@ index f4591ffb5..3495bb919 100644
  	  }
  	else
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch
index 82452f1c..0e120088 100644
--- a/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch
+++ b/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch
@@ -1,4 +1,4 @@
-From 394102db8f4de6782b628b29c59d2634f2c72674 Mon Sep 17 00:00:00 2001
+From 2fb0de8881bd2fe637d05bec0ae887f380434b7d Mon Sep 17 00:00:00 2001
 From: Mate Kukri <km@mkukri.xyz>
 Date: Mon, 20 May 2024 11:43:35 +0100
 Subject: [PATCH 22/22] Add native NVMe driver based on SeaBIOS
@@ -31,19 +31,20 @@ index 65016f856..7bc0866ba 100644
  
  endif
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index 9d59acd1e..56076728b 100644
+index fda723f0c..27a707fda 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
-@@ -2621,3 +2621,9 @@ module = {
-   enable = efi;
-   depends = part_gpt;
- };
+@@ -2683,4 +2683,10 @@ module = {
+   common = tests/asn1/asn1_test.c;
+   cflags = '-Wno-uninitialized';
+   cppflags = '-I$(srcdir)/lib/libtasn1-grub -I$(srcdir)/tests/asn1/';
++}
 +
 +module = {
 +  name = nvme;
 +  common = disk/nvme.c;
 +  enable = pci;
-+};
+ };
 diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c
 index 6806bff9c..fd68a513e 100644
 --- a/grub-core/commands/nativedisk.c
@@ -1070,5 +1071,5 @@ index fbf23df7f..186e76f0b 100644
  
  struct grub_disk;
 -- 
-2.39.2
+2.39.5
 
diff --git a/config/grub/xhci/target.cfg b/config/grub/xhci/target.cfg
index f1ff519b..540f11f7 100644
--- a/config/grub/xhci/target.cfg
+++ b/config/grub/xhci/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="xhci"
-rev="b53ec06a1d6f22ffc1139cbfc0f292e4ca2da9cd"
+rev="6811f6f09d61996a3acbc4fc0414e45964f0e2d9"

From 95ea3293df58d42ef288543a85344b4731338f91 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Dec 2024 03:31:37 +0000
Subject: [PATCH 0980/1549] bump seabios to rev 1602647f1 (7 November 2024)

This brings in a *single* change from SeaBIOS, because there
has only been one change in the main branch, and it's a bug fix.

The change from upstream is as follows:

commit 1602647f1be24fe63d11138d802e735c8e674e63
Author: Daniel Khodabakhsh <d.khodabakhsh@gmail.com>
Date:   Thu Nov 7 18:46:16 2024 -0800

    boot: Force display of the boot menu when boot-menu-wait is a negative number

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/seabios/default/target.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/seabios/default/target.cfg b/config/seabios/default/target.cfg
index 2ee6cf6f..9ff1db3e 100644
--- a/config/seabios/default/target.cfg
+++ b/config/seabios/default/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="default"
-rev="62a1429ec1ec67f14c039d97627a6a7ef70a983c"
+rev="1602647f1be24fe63d11138d802e735c8e674e63"

From d58d63569f1083d5a6d179517d7a7d4447d0c564 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Dec 2024 04:22:11 +0000
Subject: [PATCH 0981/1549] fix missing semicolon in grub nvme patch

i  forgot this when rebasing on the recent uprev

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch  | 2 +-
 .../patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
index 5e25096b..c6b7bb87 100644
--- a/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
+++ b/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
@@ -38,7 +38,7 @@ index f1f38d8d3..d09f9ffbc 100644
    common = tests/asn1/asn1_test.c;
    cflags = '-Wno-uninitialized';
    cppflags = '-I$(srcdir)/lib/libtasn1-grub -I$(srcdir)/tests/asn1/';
-+}
++};
 +
 +module = {
 +  name = nvme;
diff --git a/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch
index 0e120088..c105dd19 100644
--- a/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch
+++ b/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch
@@ -38,7 +38,7 @@ index fda723f0c..27a707fda 100644
    common = tests/asn1/asn1_test.c;
    cflags = '-Wno-uninitialized';
    cppflags = '-I$(srcdir)/lib/libtasn1-grub -I$(srcdir)/tests/asn1/';
-+}
++};
 +
 +module = {
 +  name = nvme;

From 1a46c04738664ace196c9b48b830f24b18a7c3a0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Dec 2024 04:25:27 +0000
Subject: [PATCH 0982/1549] support ./mk dependencies fedora reinstall

dnf reinstall package

or

dnf install package

for reinstall, do this:

./mk dependencies fedora41 re

this is an example command

the 4th argument prefixes "install" in dnf install

a bit hacky but it should work

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/fedora38 | 2 +-
 config/dependencies/fedora40 | 2 +-
 config/dependencies/fedora41 | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/config/dependencies/fedora38 b/config/dependencies/fedora38
index 8af77879..a34bbbf0 100755
--- a/config/dependencies/fedora38
+++ b/config/dependencies/fedora38
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="dnf install"
+pkg_add="dnf ${reinstall}install"
 pkglist=" \
 acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc \
 arm-none-eabi-gcc arm-none-eabi-newlib autogen bison bzip2 cmake curl \
diff --git a/config/dependencies/fedora40 b/config/dependencies/fedora40
index fa99b6fa..3ca84aa0 100755
--- a/config/dependencies/fedora40
+++ b/config/dependencies/fedora40
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="dnf install"
+pkg_add="dnf ${reinstall}install"
 pkglist=" \
 acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc \
 arm-none-eabi-gcc arm-none-eabi-newlib autogen bison bzip2 cmake curl \
diff --git a/config/dependencies/fedora41 b/config/dependencies/fedora41
index 486674b4..0c55ee35 100755
--- a/config/dependencies/fedora41
+++ b/config/dependencies/fedora41
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-pkg_add="dnf install"
+pkg_add="dnf ${reinstall}install"
 pkglist=" \
 acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-gcc-cs-c++ \
 arm-none-eabi-gcc arm-none-eabi-newlib autogen bison bzip2 cmake curl \

From 661591f9f0b4621c60f94ebf1276713e9e24e062 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Dec 2024 04:27:11 +0000
Subject: [PATCH 0983/1549] add uuid-devel to fedora41 dependencies

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/fedora41 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/dependencies/fedora41 b/config/dependencies/fedora41
index 0c55ee35..b2c2bb5a 100755
--- a/config/dependencies/fedora41
+++ b/config/dependencies/fedora41
@@ -10,6 +10,6 @@ innoextract intltool libftdi-devel libgpiod-devel libjaylink-devel \
 libselinux-devel libusb1 libusb1-devel nasm ncurses-devel openssl-devel openssl-devel-engine \
 p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \
 python-unversioned-command python3 python3-setuptools rsync sharutils \
-subversion systemd-devel texinfo unar unifont unifont-fonts \
+subversion systemd-devel texinfo unar unifont unifont-fonts uuid-devel \
 unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel \
 "

From f9ab082ec19e02f3b1193a3bb3fe6accbaf27e64 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Dec 2024 04:57:00 +0000
Subject: [PATCH 0984/1549] fedora41/dependencies: add libuuid-devel

it seems to be required for uuid/uuid.h

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/fedora41 | 1 +
 1 file changed, 1 insertion(+)

diff --git a/config/dependencies/fedora41 b/config/dependencies/fedora41
index b2c2bb5a..4c06b199 100755
--- a/config/dependencies/fedora41
+++ b/config/dependencies/fedora41
@@ -12,4 +12,5 @@ p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \
 python-unversioned-command python3 python3-setuptools rsync sharutils \
 subversion systemd-devel texinfo unar unifont unifont-fonts uuid-devel \
 unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel \
+libuuid-devel \
 "

From e8799310db26df89720e8476a701f1904932234b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Dec 2024 14:44:31 +0000
Subject: [PATCH 0985/1549] hp820g2: fix vendorfile inject and set release=y

I believed that the compressed nature of refcode was the only
non-reproducible thing, but turns out you also need to run
rmodtool on the refcode to make the binary relocatable in
cbfs. This is based on my reading of the coreboot Makefile.

With this change, I can now provide release binaries for
the HP EliteBook 820 G2.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...ble-compression-on-refcode-insertion.patch | 31 +++++++++++++++++++
 config/coreboot/hp820g2_12mb/target.cfg       |  1 -
 include/lib.sh                                |  1 +
 include/rom.sh                                | 12 ++++---
 include/vendor.sh                             | 18 +++++++----
 5 files changed, 52 insertions(+), 11 deletions(-)
 create mode 100644 config/coreboot/default/patches/0052-Disable-compression-on-refcode-insertion.patch

diff --git a/config/coreboot/default/patches/0052-Disable-compression-on-refcode-insertion.patch b/config/coreboot/default/patches/0052-Disable-compression-on-refcode-insertion.patch
new file mode 100644
index 00000000..1c089279
--- /dev/null
+++ b/config/coreboot/default/patches/0052-Disable-compression-on-refcode-insertion.patch
@@ -0,0 +1,31 @@
+From 1e72e6df7f5d71fd41350e34d0a8bd5230349235 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 31 Dec 2024 14:42:24 +0000
+Subject: [PATCH 1/1] Disable compression on refcode insertion
+
+Compression is not reliably reproducible. In an lbmk release
+context, this means we cannot rely on vendorfile insertion.
+
+Therefore, use uncompressed refcode.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ Makefile.mk | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/Makefile.mk b/Makefile.mk
+index e9ad2ccbb2..6a96d45a83 100644
+--- a/Makefile.mk
++++ b/Makefile.mk
+@@ -1364,7 +1364,7 @@ endif
+ cbfs-files-$(CONFIG_HAVE_REFCODE_BLOB) += $(CONFIG_CBFS_PREFIX)/refcode
+ $(CONFIG_CBFS_PREFIX)/refcode-file := $(REFCODE_BLOB)
+ $(CONFIG_CBFS_PREFIX)/refcode-type := stage
+-$(CONFIG_CBFS_PREFIX)/refcode-compression := $(CBFS_COMPRESS_FLAG)
++$(CONFIG_CBFS_PREFIX)/refcode-compression := none
+ 
+ cbfs-files-$(CONFIG_SEABIOS_VGA_COREBOOT) += vgaroms/seavgabios.bin
+ vgaroms/seavgabios.bin-file := $(CONFIG_PAYLOAD_VGABIOS_FILE)
+-- 
+2.39.5
+
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index f94fb6aa..7fe45119 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -5,7 +5,6 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
-release="n"
 grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="hp820g2"
diff --git a/include/lib.sh b/include/lib.sh
index 4911c34f..4e56b34a 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -10,6 +10,7 @@ _ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
 
 ifdtool="elf/ifdtool/default/ifdtool"
 cbfstool="elf/cbfstool/default/cbfstool"
+rmodtool="elf/cbfstool/default/rmodtool"
 tmpgit="$PWD/tmp/gitclone"
 grubdata="config/data/grub"
 err="err_"
diff --git a/include/rom.sh b/include/rom.sh
index 0ea791d2..01a8607f 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -84,10 +84,14 @@ check_coreboot_utils()
 
 		utilmode="" && [ -n "$mode" ] && utilmode="clean"
 		x_ make -C "$utilsrcdir" $utilmode -j$XBMK_THREADS $makeargs
-		[ -z "$mode" ] && [ ! -f "$utilelfdir/$util" ] && \
-			x_ mkdir -p "$utilelfdir" && \
-			x_ cp "$utilsrcdir/$util" "elf/$util/$1"
-		[ -z "$mode" ] || x_ rm -Rf "$utilelfdir"; continue
+		if [ -z "$mode" ] && [ ! -f "$utilelfdir/$util" ]; then
+			x_ mkdir -p "$utilelfdir"
+			x_ cp "$utilsrcdir/$util" "$utilelfdir"
+			[ "$util" = "cbfstool" ] || continue
+			x_ cp "$utilsrcdir/rmodtool" "$utilelfdir"
+		elif [ -n "$mode" ]; then
+			x_ rm -Rf "$utilelfdir"
+		fi; continue
 	done; return 0
 }
 
diff --git a/include/vendor.sh b/include/vendor.sh
index 7d1356f2..5fad62fb 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -383,6 +383,7 @@ readcfg()
 
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
+	rmodtool="elf/cbfstool/$tree/rmodtool"
 	mecleaner="$PWD/$cbdir/util/me_cleaner/me_cleaner.py"
 	kbc1126_ec_dump="$PWD/$cbdir/util/kbc1126/kbc1126_ec_dump"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
@@ -425,10 +426,10 @@ patch_rom()
 	rom="$1"
 	readkconfig || return 1
 
-	[ "$CONFIG_HAVE_MRC" = "y" ] && inject "mrc.bin" "$CONFIG_MRC_FILE" \
-	    "mrc" "0xfffa0000"
 	[ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && inject "fallback/refcode" \
 	    "$CONFIG_REFCODE_BLOB_FILE" "stage"
+	[ "$CONFIG_HAVE_MRC" = "y" ] && inject "mrc.bin" "$CONFIG_MRC_FILE" \
+	    "mrc" "0xfffa0000"
 	[ "$CONFIG_HAVE_ME_BIN" = "y" ] && inject IFD "$CONFIG_ME_BIN_PATH" me
 	[ "$CONFIG_KBC1126_FIRMWARE" = "y" ] && inject ecfw1.bin \
 	    "$CONFIG_KBC1126_FW1" raw "$CONFIG_KBC1126_FW1_OFFSET" && inject \
@@ -487,10 +488,15 @@ inject()
 		"$cbfstool" "$rom" remove -n "$cbfsname" || \
 		    $err "inject $rom: can't remove $cbfsname"; return 0
 	fi
-	[ "$_t" != "stage" ] || "$cbfstool" "$rom" add-stage -f \
-	    "$_dest" -n "$cbfsname" -t stage -c lzma || $err "$rom: !add ref"
-	[ "$_t" = "stage" ] || "$cbfstool" "$rom" add -f "$_dest" \
-	    -n "$cbfsname" -t $_t $_offset || $err "$rom !add $_t ($_dest)"; :
+	if [ "$_t" = "stage" ]; then # the only stage we handle in refcode
+		x_ mkdir -p tmp; x_ rm -f "tmp/refcode"
+		"$rmodtool" -i "$_dest" -o "tmp/refcode" || "!reloc refcode"
+		"$cbfstool" "$rom" add-stage -f "tmp/refcode" -n "$cbfsname" \
+		    -t stage || $err "$rom: !add ref"
+	else
+		"$cbfstool" "$rom" add -f "$_dest" -n "$cbfsname" \
+		    -t $_t $_offset || $err "$rom !add $_t ($_dest)"
+	fi; :
 }
 
 modify_gbe()

From 15b37b2a1ab286c550a43276f238a09766e12049 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Dec 2024 21:14:24 +0000
Subject: [PATCH 0986/1549] util/nvmutil: Tidy up pledge calls

I wasn't too happy using shorthand for strings like that.

Tidy it up and use good old fashioned if/else.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 35abbfae..c7de5e0f 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -77,8 +77,11 @@ main(int argc, char *argv[])
 #ifdef __OpenBSD__
 	err_if(unveil("/dev/urandom", "r") == -1);
 	err_if(unveil(filename, flags == O_RDONLY ? "r" : "rw") == -1);
-	err_if(pledge(flags == O_RDONLY ? "stdio rpath" : "stdio rpath wpath",
-	    NULL) == -1);
+	if (flags == O_RDONLY) {
+		err_if(pledge("stdio rpath", NULL) == -1);
+	} else {
+		err_if(pledge("stdio rpath wpath", NULL) == -1);
+	}
 #endif
 	openFiles(filename);
 #ifdef __OpenBSD__

From 57971ceb227f45f8568a15a46bdee789eff20cf5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 Jan 2025 14:48:29 +0000
Subject: [PATCH 0987/1549] util/nvmutil: Fix another straggler

I don't like using strings this way, it looks unclean.

Once again, use good old fashioned if/else.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index c7de5e0f..7f6b8782 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: MIT */
-/* SPDX-FileCopyrightText: 2022, 2023 Leah Rowe <leah@libreboot.org> */
+/* SPDX-FileCopyrightText: 2022, 2023, 2025 Leah Rowe <leah@libreboot.org> */
 /* SPDX-FileCopyrightText: 2023 Riku Viitanen <riku.viitanen@protonmail.com> */
 
 #include <sys/stat.h>
@@ -76,10 +76,11 @@ main(int argc, char *argv[])
 	filename = argv[1];
 #ifdef __OpenBSD__
 	err_if(unveil("/dev/urandom", "r") == -1);
-	err_if(unveil(filename, flags == O_RDONLY ? "r" : "rw") == -1);
 	if (flags == O_RDONLY) {
+		err_if(unveil(filename, "r") == -1);
 		err_if(pledge("stdio rpath", NULL) == -1);
 	} else {
+		err_if(unveil(filename, "rw") == -1);
 		err_if(pledge("stdio rpath wpath", NULL) == -1);
 	}
 #endif

From cd28db883e2fd3db8e09ef6e90aad00aac4feb06 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 Jan 2025 18:30:57 +0000
Subject: [PATCH 0988/1549] vendor.sh: fix comment

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 5fad62fb..b44fb66f 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -488,7 +488,7 @@ inject()
 		"$cbfstool" "$rom" remove -n "$cbfsname" || \
 		    $err "inject $rom: can't remove $cbfsname"; return 0
 	fi
-	if [ "$_t" = "stage" ]; then # the only stage we handle in refcode
+	if [ "$_t" = "stage" ]; then # the only stage we handle is refcode
 		x_ mkdir -p tmp; x_ rm -f "tmp/refcode"
 		"$rmodtool" -i "$_dest" -o "tmp/refcode" || "!reloc refcode"
 		"$cbfstool" "$rom" add-stage -f "tmp/refcode" -n "$cbfsname" \

From 637b5e36fd29b2079c7f2a9bbb6ffe35803a2cde Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 Jan 2025 20:55:58 +0000
Subject: [PATCH 0989/1549] util/nvmutil: Tidy up copyright header

I don't like using SPDX for actual copyright declarations.

I only want it to be used for the license identifier.

Also:

I made a *single* change to nvmutil.c in 2024, which means
that I have copyright in all years since and including 2022;
the file said 2022, 2023, 2025, but it's actually 2022-2025.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 7f6b8782..00c20a1b 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: MIT */
-/* SPDX-FileCopyrightText: 2022, 2023, 2025 Leah Rowe <leah@libreboot.org> */
-/* SPDX-FileCopyrightText: 2023 Riku Viitanen <riku.viitanen@protonmail.com> */
+/* Copyright (c) 2022-2025 Leah Rowe <leah@libreboot.org> */
+/* Copyright (c) 2023 Riku Viitanen <riku.viitanen@protonmail.com> */
 
 #include <sys/stat.h>
 

From ed7293494e351fd8eb9aff4649d53782640e52b3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 Jan 2025 21:10:56 +0000
Subject: [PATCH 0990/1549] util/nvmutil: Obey the 79-character per line limit

Must not exceed 79 lines. Some variables and functions have
been renamed, and there has been some minor re-factoring.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 65 +++++++++++++++++++++---------------------
 1 file changed, 33 insertions(+), 32 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 00c20a1b..f95df4cf 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -14,22 +14,22 @@
 #include <string.h>
 #include <unistd.h>
 
-void cmd_setchecksum(void), cmd_brick(void), cmd_copy(void), writeGbeFile(void),
-    cmd_dump(void), cmd_setmac(void), readGbeFile(void), showmac(int partnum),
-    hexdump(int partnum), handle_endianness(int partnum), openFiles(const char *path);
-int macAddress(const char *strMac, uint16_t *mac), validChecksum(int partnum);
+void cmd_setchecksum(void), cmd_brick(void), swap(int partnum), writeGbe(void),
+    cmd_dump(void), cmd_setmac(void), readGbe(void), cmd_copy(void),
+    macf(int partnum), hexdump(int partnum), openFiles(const char *path);
+int macAddress(const char *strMac, uint16_t *mac), goodChecksum(int partnum);
 uint8_t hextonum(char chs), rhex(void);
 
 #define COMMAND argv[2]
 #define MAC_ADDRESS argv[3]
-#define PARTNUM argv[3]
+#define PARTN argv[3]
 #define SIZE_4KB 0x1000
 
 uint16_t buf16[SIZE_4KB], mac[3] = {0, 0, 0};
 uint8_t *buf = (uint8_t *) &buf16;
 size_t nf = 128, gbe[2];
-uint8_t nvmPartModified[2] = {0, 0}, skipread[2] = {0, 0};
-int e = 1, flags = O_RDWR, rfd, fd, part, gbeFileModified = 0;
+uint8_t nvmPartChanged[2] = {0, 0}, skipread[2] = {0, 0};
+int e = 1, flags = O_RDWR, rfd, fd, part, gbeFileChanged = 0;
 
 const char *strMac = NULL, *strRMac = "??:??:??:??:??:??", *filename = NULL;
 
@@ -41,7 +41,7 @@ typedef struct op {
 op_t op[] = {
 { .str = "dump", .cmd = cmd_dump, .args = 3},
 { .str = "setmac", .cmd = cmd_setmac, .args = 3},
-{ .str = "swap", .cmd = writeGbeFile, .args = 3},
+{ .str = "swap", .cmd = writeGbe, .args = 3},
 { .str = "copy", .cmd = cmd_copy, .args = 4},
 { .str = "brick", .cmd = cmd_brick, .args = 4},
 { .str = "setchecksum", .cmd = cmd_setchecksum, .args = 4},
@@ -56,8 +56,8 @@ void (*cmd)(void) = NULL;
     if (fstat(f, &st) == -1) err(ERR(), "%s", l)
 
 #define word(pos16, partnum) buf16[pos16 + (partnum << 11)]
-#define setWord(pos16, p, val16) if ((gbeFileModified = 1) && \
-    word(pos16, p) != val16) nvmPartModified[p] = 1 | (word(pos16, p) = val16)
+#define setWord(pos16, p, val16) if ((gbeFileChanged = 1) && \
+    word(pos16, p) != val16) nvmPartChanged[p] = 1 | (word(pos16, p) = val16)
 
 int
 main(int argc, char *argv[])
@@ -96,15 +96,15 @@ main(int argc, char *argv[])
 	if (cmd == cmd_setmac)
 		strMac = (argc > 3) ? MAC_ADDRESS : strRMac;
 	else if ((cmd != NULL) && (argc > 3))
-		err_if((errno = (!((part = PARTNUM[0] - '0') == 0 || part == 1))
-		    || PARTNUM[1] ? EINVAL : errno));
+		err_if((errno = (!((part = PARTN[0] - '0') == 0 || part == 1))
+		    || PARTN[1] ? EINVAL : errno));
 	err_if((errno = (cmd == NULL) ? EINVAL : errno));
 
-	readGbeFile();
+	readGbe();
 	(*cmd)();
 
-	if ((gbeFileModified) && (flags != O_RDONLY) && (cmd != writeGbeFile))
-		writeGbeFile();
+	if ((gbeFileChanged) && (flags != O_RDONLY) && (cmd != writeGbe))
+		writeGbe();
 	err_if((errno != 0) && (cmd != cmd_dump));
 	return errno;
 }
@@ -121,9 +121,9 @@ openFiles(const char *path)
 }
 
 void
-readGbeFile(void)
+readGbe(void)
 {
-	nf = ((cmd == writeGbeFile) || (cmd == cmd_copy)) ? SIZE_4KB : nf;
+	nf = ((cmd == writeGbe) || (cmd == cmd_copy)) ? SIZE_4KB : nf;
 	skipread[part ^ 1] = (cmd == cmd_copy) | (cmd == cmd_setchecksum)
 	    | (cmd == cmd_brick);
 	gbe[1] = (gbe[0] = (size_t) buf) + SIZE_4KB;
@@ -131,7 +131,7 @@ readGbeFile(void)
 		if (skipread[p])
 			continue;
 		err_if(pread(fd, (uint8_t *) gbe[p], nf, p << 12) == -1);
-		handle_endianness(p);
+		swap(p);
 	}
 }
 
@@ -141,7 +141,7 @@ cmd_setmac(void)
 	if (macAddress(strMac, mac))
 		err(errno = ECANCELED, "Bad MAC address");
 	for (int partnum = 0; partnum < 2; partnum++) {
-		if (!validChecksum(part = partnum))
+		if (!goodChecksum(part = partnum))
 			continue;
 		for (int w = 0; w < 3; w++)
 			setWord(w, partnum, mac[w]);
@@ -197,16 +197,16 @@ void
 cmd_dump(void)
 {
 	for (int partnum = 0, numInvalid = 0; partnum < 2; partnum++) {
-		if (!validChecksum(partnum))
+		if (!goodChecksum(partnum))
 			++numInvalid;
 		printf("MAC (part %d): ", partnum);
-		showmac(partnum), hexdump(partnum);
+		macf(partnum), hexdump(partnum);
 		errno = ((numInvalid < 2) && (partnum)) ? 0 : errno;
 	}
 }
 
 void
-showmac(int partnum)
+macf(int partnum)
 {
 	for (int c = 0; c < 3; c++) {
 		uint16_t val16 = word(c, partnum);
@@ -239,19 +239,19 @@ cmd_setchecksum(void)
 void
 cmd_brick(void)
 {
-	if (validChecksum(part))
+	if (goodChecksum(part))
 		setWord(0x3F, part, ((word(0x3F, part)) ^ 0xFF));
 }
 
 void
 cmd_copy(void)
 {
-	if ((gbeFileModified = nvmPartModified[part ^ 1] = validChecksum(part)))
+	if ((gbeFileChanged = nvmPartChanged[part ^ 1] = goodChecksum(part)))
 		gbe[part ^ 1] = gbe[part]; /* speedhack: copy ptr, not words */
 }
 
 int
-validChecksum(int partnum)
+goodChecksum(int partnum)
 {
 	uint16_t total = 0;
 	for(int w = 0; w <= 0x3F; w++)
@@ -263,13 +263,13 @@ validChecksum(int partnum)
 }
 
 void
-writeGbeFile(void)
+writeGbe(void)
 {
-	err_if((cmd == writeGbeFile) && !(validChecksum(0) || validChecksum(1)));
-	for (int p = 0, x = (cmd == writeGbeFile) ? 1 : 0; p < 2; p++) {
-		if ((!nvmPartModified[p]) && (cmd != writeGbeFile))
+	err_if((cmd == writeGbe) && !(goodChecksum(0) || goodChecksum(1)));
+	for (int p = 0, x = (cmd == writeGbe) ? 1 : 0; p < 2; p++) {
+		if ((!nvmPartChanged[p]) && (cmd != writeGbe))
 			continue;
-		handle_endianness(p^x);
+		swap(p^x);
 		err_if(pwrite(fd, (uint8_t *) gbe[p^x], nf, p << 12) == -1);
 	}
 	errno = 0;
@@ -277,9 +277,10 @@ writeGbeFile(void)
 }
 
 void
-handle_endianness(int partnum)
+swap(int partnum)
 {
+	size_t w, x;
 	uint8_t *n = (uint8_t *) gbe[partnum];
-	for (size_t w = nf * ((uint8_t *) &e)[0], x = 1; w < nf; w += 2, x += 2)
+	for (w = nf * ((uint8_t *) &e)[0], x = 1; w < nf; w += 2, x += 2)
 		n[w] ^= n[x], n[x] ^= n[w], n[w] ^= n[x];
 }

From 41275d699ca38307225f950252ce0c446dc5aea8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 2 Jan 2025 02:25:24 +0000
Subject: [PATCH 0991/1549] vendor.sh: MUCH, MUCH, MUCH safer ./mk inject

Don't extract to bin/release/

Modify the tarball instead. Previously, the tarball would
not be modified, but a lot of users thought the tarball was
being modified and ignored bin/release/, where the injected
images were actually being saved to.

Don't copy the tarball either. Just modify it in-place.

Don't allow single-rom injection either; only allow the
tarball-based method.

The command syntax has changed, but:
./mk inject tarball.tar.xz

This is the same. What has changed is nuke, and MAC address
modification. Observe:

./mk inject tarball.tar.xz nuke
./mk inject tarball.tar.xz setmac
./mk inject tarball.tar.xz setmac ??:??:??:??:??:??
./mk inject tarball.tar.xz setmac 00:1f:16:??:22:aa

These are just a few examples. The MAC address syntax is
the same as used for nvmutil, which means you can set it
randomly. Also:

./mk inject tarball.tar.xz setmac

You can use the *setmac* command *repeatedly*, even if
you've already injected a given archive. It'll just
update the archive, but skip injecting other files
that were already injected.

If you use setmac without a MAC address, it will randomise
the MAC address. This is therefore very similar to the
command structure used in nvmutil.

The code for injection is generally more robust, with
stronger error checks. This design change was done, so
that the user doesn't accidentally brick their machine.

The non-injected images have a prefix in the file name
saying "DO_NOT_FLASH", and those non-injected images are
padded by 1 byte. That way, the user knows not to flash it
and if they try, flashprog will throw an error.

The prefix and padding is removed on injection. Old images
without the padding/prefix can still be injected, via
tarballs; this new code is backwards-compatible with tarballs
from older Libreboot releases.

A common thing I see sometimes is a user will say they have
a black screen or something, and I say: did you insert vendor
files? And they say yes. And they did. But they extracted and
flashed from the tarball, which wasn't injected, because
they didn't release about bin/release/

No amount of RTFM is justified. The previous design flaw
is a bug. We must always observe user safety first, no matter
what, so that has now been done.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh    |   1 -
 include/rom.sh    |  15 +-
 include/vendor.sh | 383 ++++++++++++++++++++++++++++++++--------------
 3 files changed, 277 insertions(+), 122 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 4e56b34a..0af8db49 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -173,7 +173,6 @@ mktarball()
 		mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
 	printf "\nCreating archive: %s\n\n" "$2"
 	tar -c "$1" | xz -T$XBMK_THREADS -9e > "$2" || $err "mktarball 2, $1"
-	mksha512sum "$2" "${2##*/}.sha512"
 }
 
 mksha512sum()
diff --git a/include/rom.sh b/include/rom.sh
index 01a8607f..60980d22 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -255,15 +255,16 @@ cprom()
 	x_ cp "$tmprom" "$newrom" && [ $# -gt 0 ] && [ "$1" != "seauboot" ] && \
 	    cbfs "$newrom" "config/data/grub/keymap/$1" keymap.gkb raw
 	[ $# -gt 0 ] && [ "$1" = "seauboot" ] && \
-	    cbfs "$newrom" "config/data/grub/bootorder_uboot" "bootorder" raw
-
-	[ "$XBMK_RELEASE" = "y" ] || return 0
-	$dry mksha512sum "$newrom" "vendorhashes"; $dry ./mk inject \
-	    -r "$newrom" -b "$target" -n nuke || $err "!nuke $newrom"
+	    cbfs "$newrom" "config/data/grub/bootorder_uboot" bootorder raw; :
 }
 
 mkcoreboottar()
 {
-	[ "$target" = "$tree" ] && return 0; [ "$XBMK_RELEASE" = "y" ] && \
-	    [ "$release" != "n" ] && $dry mkrom_tarball "bin/$target"; :
+	[ "$target" = "$tree" ] && return 0
+	[ "$XBMK_RELEASE" = "y" ] || return 0
+	[ "$release" != "n" ] || return 0
+	$dry mkrom_tarball "bin/$target"
+	$dry ./mk inject "bin/${relname}_${target}.tar.xz" nuke || \
+	    $err "Can't delete vendorfiles in 'bin/${relname}_$target.tar.xz'"
+	return 0
 }
diff --git a/include/vendor.sh b/include/vendor.sh
index b44fb66f..d6306256 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-3.0-only
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 # Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# Copyright (c) 2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org>
 
 e6400_unpack="$PWD/src/bios_extract/dell_inspiron_1100_unpacker.py"
 me7updateparser="$PWD/util/me7_update_parser/me7_update_parser.py"
@@ -10,6 +10,11 @@ uefiextract="$PWD/elf/uefitool/uefiextract"
 vendir="vendorfiles"
 appdir="$vendir/app"
 cbcfgsdir="config/coreboot"
+hashfiles="vendorhashes blobhashes" # blobhashes for backwards compatibility
+dontflash="!!! AN ERROR OCCURED! Please DO NOT flash if injection failed. !!!"
+vfix="DO_NOT_FLASH_YET._FIRST,_INJECT_BLOBS_VIA_INSTRUCTIONS_ON_LIBREBOOT.ORG_"
+vguide="https://libreboot.org/docs/install/ivy_has_common.html"
+tmpromdel="$PWD/tmp/DO_NOT_FLASH"
 
 cv="CONFIG_HAVE_ME_BIN CONFIG_ME_BIN_PATH CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \
     CONFIG_SMSC_SCH5545_EC_FW_FILE CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 \
@@ -25,10 +30,10 @@ eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
     E6400_VGA_romname SCH5545EC_DL_url_bkup SCH5545EC_DL_hash _dest tree \
     mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl SCH5545EC_DL_url \
-    archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref vrelease \
-    verify _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch \
+    archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref FSPFD_hash \
+    _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch tmpromdir \
     IFD_platform ifdprefix cdir sdir _me _metmp mfs TBFW_url_bkup TBFW_url \
-    TBFW_hash TBFW_size FSPFD_hash $cv`
+    TBFW_hash TBFW_size hashfile has_hashes xromsize xchanged $cv`
 
 vendor_download()
 {
@@ -40,16 +45,16 @@ readkconfig()
 {
 	check_defconfig "$boarddir" 1>"$TMPDIR/vendorcfg.list" && return 1
 
-	rm -f "$TMPDIR/tmpcbcfg" || $err "!rm -f \"$TMPDIR/tmpcbcfg\""
+	rm -f "$TMPDIR/tmpcbcfg" || $err "!rm $TMPDIR/tmpcbcfg - $dontflash"
 	while read -r cbcfgfile; do
 		for cbc in $cv; do
 			rm -f "$TMPDIR/tmpcbcfg2" || \
-			    $err "!rm $TMPDIR/tmpcbcfg2"
+			    $err "!rm $TMPDIR/tmpcbcfg2 - $dontflash"
 			grep "$cbc" "$cbcfgfile" 1>"$TMPDIR/tmpcbcfg2" \
 			    2>/dev/null || :
 			[ -f "$TMPDIR/tmpcbcfg2" ] || continue
 			cat "$TMPDIR/tmpcbcfg2" >> "$TMPDIR/tmpcbcfg" || \
-			    $err "!cat $TMPDIR/tmpcbcfg2"
+			    $err "!cat $TMPDIR/tmpcbcfg2 - $dontflash"
 		done
 	done < "$TMPDIR/vendorcfg.list"
 
@@ -117,20 +122,22 @@ fetch()
 	dlop="curl" && [ $# -gt 5 ] && dlop="$6"
 	download "$dl" "$dl_bkup" "$_dl" "$dlsum" "$dlop"
 
-	rm -Rf "${_dl}_extracted" || $err "!rm -Rf ${_ul}_extracted"
+	rm -Rf "${_dl}_extracted" || $err "!rm ${_ul}_extracted. $dontflash"
 	e "$_dest" f && return 0
 
-	mkdir -p "${_dest%/*}" || $err "mkdirs: !mkdir -p ${_dest%/*}"
+	mkdir -p "${_dest%/*}" || \
+	    $err "mkdirs: !mkdir -p ${_dest%/*} - $dontflash"
 	remkdir "$appdir"; extract_archive "$_dl" "$appdir" "$dl_type" || \
-	    [ "$dl_type" = "e6400vga" ] || $err "mkd $_dest $dl_type: !extract"
+	    [ "$dl_type" = "e6400vga" ] || \
+	    $err "mkd $_dest $dl_type: !extract. $dontflash"
 
 	eval "extract_$dl_type"; set -u -e
-	e "$_dest" f missing && $err "!extract_$dl_type"; :
+	e "$_dest" f missing && $err "!extract_$dl_type. $dontflash"; :
 }
 
 extract_intel_me()
 {
-	e "$mecleaner" f not && $err "$cbdir: me_cleaner missing"
+	e "$mecleaner" f not && $err "$cbdir: me_cleaner missing. $dontflash"
 
 	cdir="$PWD/$appdir"
 	_me="$PWD/$_dest"
@@ -146,7 +153,7 @@ extract_intel_me()
 	if [ "$ME11bootguard" = "y" ]; then
 		apply_me11_deguard_mod
 	else
-		mv "$_metmp" "$_me" || $err "!mv $_metmp" "$_me"
+		mv "$_metmp" "$_me" || $err "!mv $_metmp $_me - $dontflash"
 	fi
 }
 
@@ -157,12 +164,13 @@ extract_intel_me_bruteforce()
 	e "$_metmp" f && return 0
 
 	[ -z "$sdir" ] && sdir="$(mktemp -d)"
-	mkdir -p "$sdir" || $err "extract_intel_me: !mkdir -p \"$sdir\""
+	mkdir -p "$sdir" || \
+	    $err "extract_intel_me: !mkdir -p \"$sdir\" - $dontflash"
 
 	set +u +e
 	(
 	[ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
-	cd "$cdir" || $err "extract_intel_me: !cd \"$cdir\""
+	cd "$cdir" || $err "extract_intel_me: !cd \"$cdir\" - $dontflash"
 	for i in *; do
 		[ -f "$_metmp" ] && break
 		[ -L "$i" ] && continue
@@ -184,7 +192,7 @@ extract_intel_me_bruteforce()
 		cd "$cdir" || :
 	done
 	)
-	rm -Rf "$sdir" || $err "extract_intel_me: !rm -Rf $sdir"
+	rm -Rf "$sdir" || $err "extract_intel_me: !rm -Rf $sdir - $dontflash"
 }
 
 apply_me11_deguard_mod()
@@ -195,8 +203,8 @@ apply_me11_deguard_mod()
 	    --version "$ME11version" \
 	    --pch "$ME11pch" --sku "$ME11sku" --fake-fpfs data/fpfs/zero \
 	    --input "$_metmp" --output "$_me" || \
-	    $err "Error running deguard for $_me"
-	) || $err "Error running deguard for $_me"
+	    $err "Error running deguard for $_me - $dontflash"
+	) || $err "Error running deguard for $_me - $dontflash"
 }
 
 extract_archive()
@@ -212,7 +220,7 @@ extract_archive()
 	    "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
 
 	[ ! -d "${_dl}_extracted" ] || cp -R "${_dl}_extracted" "$2" || \
-	    $err "!mv '${_dl}_extracted' '$2'"; :
+	    $err "!mv '${_dl}_extracted' '$2' - $dontflash"; :
 }
 
 decat_fspfd()
@@ -222,27 +230,34 @@ decat_fspfd()
 	_fspsplit="$cbdir/3rdparty/fsp/Tools/SplitFspBin.py"
 
 	$python "$_fspsplit" split -f "$_fspfd" -o "$_fspdir" -n "Fsp.fd" || \
-	    $err "decat_fspfd '$1' '$2': Cannot de-concatenate"; :
+	    $err "decat_fspfd '$1' '$2': Can't de-concatenate; $dontflash"; :
 }
 
 extract_kbc1126ec()
 {
-	e "$kbc1126_ec_dump" f missing && $err "$cbdir: kbc1126 util missing"
+	e "$kbc1126_ec_dump" f missing && \
+	    $err "$cbdir: kbc1126 util missing - $dontflash"
 	(
 	x_ cd "$appdir/"; mv Rompaq/68*.BIN ec.bin || :
 	if [ ! -f "ec.bin" ]; then
 		unar -D ROM.CAB Rom.bin || unar -D Rom.CAB Rom.bin || \
-		    unar -D 68*.CAB Rom.bin || $err "can't extract Rom.bin"
+		    unar -D 68*.CAB Rom.bin || \
+		    $err "can't extract Rom.bin - $dontflash"
 		x_ mv Rom.bin ec.bin
 	fi
-	[ -f ec.bin ] || $err "extract_kbc1126_ec $board: can't extract"
-	"$kbc1126_ec_dump" ec.bin || $err "!1126ec $board extract ecfw"
-	) || $err "can't extract kbc1126 ec firmware"
+	[ -f ec.bin ] || \
+	    $err "extract_kbc1126_ec $board: can't extract - $dontflash"
+	"$kbc1126_ec_dump" ec.bin || \
+	    $err "!1126ec $board extract ecfw - $dontflash"
+	) || $err "can't extract kbc1126 ec firmware - $dontflash"
 
-	e "$appdir/ec.bin.fw1" f not && $err "$board: kbc1126ec fetch failed"
-	e "$appdir/ec.bin.fw2" f not && $err "$board: kbc1126ec fetch failed"
+	e "$appdir/ec.bin.fw1" f not && \
+	    $err "$board: kbc1126ec fetch failed - $dontflash"
+	e "$appdir/ec.bin.fw2" f not && \
+	    $err "$board: kbc1126ec fetch failed - $dontflash"
 
-	cp "$appdir/"ec.bin.fw* "${_dest%/*}/" || $err "!cp 1126ec $_dest"
+	cp "$appdir/"ec.bin.fw* "${_dest%/*}/" || \
+	    $err "!cp 1126ec $_dest - $dontflash"; :
 }
 
 extract_e6400vga()
@@ -252,11 +267,12 @@ extract_e6400vga()
 	tail -c +$E6400_VGA_offset "$_dl" | gunzip > "$appdir/bios.bin" || :
 	(
 	x_ cd "$appdir"
-	[ -f "bios.bin" ] || $err "extract_e6400vga: can't extract bios.bin"
+	[ -f "bios.bin" ] || \
+	    $err "extract_e6400vga: can't extract bios.bin - $dontflash"
 	"$e6400_unpack" bios.bin || printf "TODO: fix dell extract util\n"
-	) || $err "can't extract e6400 vga rom"
+	) || $err "can't extract e6400 vga rom - $dontflosh"
 	cp "$appdir/$E6400_VGA_romname" "$_dest" || \
-	    $err "extract_e6400vga $board: can't copy vga rom to $_dest"
+	    $err "extract_e6400vga $board: can't cp $_dest - $dontflash"; :
 }
 
 extract_sch5545ec()
@@ -268,8 +284,9 @@ extract_sch5545ec()
 	_sch5545ec_fw="$_sch5545ec_fw/54 D386BEB8-4B54-4E69-94F5-06091F67E0D3"
 	_sch5545ec_fw="$_sch5545ec_fw/0 Raw section/body.bin" # <-- this!
 
-	"$uefiextract" "$_bios" || $err "sch5545 !extract"
-	cp "$_sch5545ec_fw" "$_dest" || $err "$_dest: !sch5545 copy"
+	"$uefiextract" "$_bios" || $err "sch5545 !extract - $dontflash"
+	cp "$_sch5545ec_fw" "$_dest" || \
+	    $err "$_dest: !sch5545 copy - $dontflash"; :
 }
 
 # Lenovo ThunderBolt firmware updates:
@@ -280,17 +297,18 @@ extract_tbfw()
 	x_ mkdir -p tmp
 	x_ rm -f tmp/tb.bin
 	find "$appdir" -type f -name "TBT.bin" > "tmp/tb.txt" || \
-	    $err "extract_tbfw $_dest: Can't extract TBT.bin"
+	    $err "extract_tbfw $_dest: Can't extract TBT.bin - $dontflash"
 	while read -r f; do
 		[ -f "$f" ] || continue
 		[ -L "$f" ] && continue
 		cp "$f" "tmp/tb.bin" || \
-		    $err "extract_tbfw $_dest: Can't copy TBT.bin"
+		    $err "extract_tbfw $_dest: Can't copy TBT.bin - $dontflash"
 		break
 	done < "tmp/tb.txt"
 	dd if=/dev/null of=tmp/tb.bin bs=1 seek=$TBFW_size || \
-	    $err "extract_tbfw $_dest: Can't pad TBT.bin"
-	cp "tmp/tb.bin" "$_dest" || $err "extract_tbfw $_dest: copy error"; :
+	    $err "extract_tbfw $_dest: Can't pad TBT.bin - $dontflash"
+	cp "tmp/tb.bin" "$_dest" || \
+	    $err "extract_tbfw $_dest: copy error - $dontflash "; :
 }
 
 extract_fspm()
@@ -307,69 +325,76 @@ extract_fsps()
 copy_fsp()
 {
 	cp "$appdir/Fsp_$1.fd" "$_dest" || \
-	    $err "copy_fsp: Can't copy $1 to $_dest"; :
+	    $err "copy_fsp: Can't copy $1 to $_dest - $dontflash"; :
+}
+
+fail_inject()
+{
+	[ -L "$tmpromdel" ] || [ ! -d "$tmpromdel" ] || \
+	    rm -Rf "$tmpromdel" || :
+	printf "\n\n%s\n\n" "$dontflash" 1>&2
+	printf "WARNING: File '%s' was NOT modified.\n\n" "$archive" 1>&2
+	printf "Please MAKE SURE vendor files are inserted before flashing\n\n"
+	fail "$1"
 }
 
 vendor_inject()
 {
-	set +u +e; [ $# -lt 1 ] && $err "No options specified."
-	[ "$1" = "listboards" ] && eval "ls -1 config/coreboot || :; return 0"
+	err="fail_inject"
+	remkdir "$tmpromdel"
 
-	archive="$1"; while getopts n:r:b:m: option; do
-		case "$option" in
-		n) nukemode="$OPTARG" ;;
-		r) rom="$OPTARG" ;;
-		b) board="$OPTARG" ;;
-		m) new_mac="$OPTARG"; chkvars new_mac ;;
-		*) : ;;
-		esac
-	done
+	set +u +e; [ $# -lt 1 ] && $err "No options specified. - $dontflash"
+	eval `setvars "" nukemode new_mac xchanged`
 
-	check_board || return 0
-	[ "$nukemode" = "nuke" ] || x_ ./mk download $board
-	if [ "$vrelease" = "y" ]; then
+	archive="$1";
+	[ $# -gt 1 ] && case "$2" in
+	nuke) nukemode="nuke" ;;
+	setmac)
+		new_mac="??:??:??:??:??:??"
+		[ $# -gt 2 ] && new_mac="$3" ;;
+	*) $err "Unrecognised inject mode: '$2'"
+	esac
+
+	check_release "$archive" || \
+	    $err "You must run this script on a release archive. - $dontflash"
+	if readcfg; then
+		[ "$nukemode" = "nuke" ] || x_ ./mk download $board
 		patch_release_roms
-		printf "\nPatched images saved to bin/release/%s/\n" \
-		    "$board"
 	else
-		patch_rom "$rom" || :
-	fi; :
-}
-
-check_board()
-{
-	failcheck="y" && check_release "$archive" && failcheck="n"
-	if [ "$failcheck" = "y" ]; then
-		[ -f "$rom" ] || $err "check_board \"$rom\": invalid path"
-		[ -z "${rom+x}" ] && $err "check_board: no rom specified"
-		[ -n "${board+x}" ] || board="$(detect_board "$rom")"
-	else
-		vrelease="y"; board="$(detect_board "$archive")"
+		printf "Tarball '%s' (board '%s) doesn't need vendorfiles.\n" \
+		    "$archive" "$board"
+		return 0
 	fi
-	readcfg || return 1; return 0
+
+	xtype="patched" && [ "$nukemode" = "nuke" ] && xtype="nuked"
+	[ "$xchanged" = "y" ] || \
+		printf "\nRelease archive '%s' was not modified.\n" "$archive"
+	[ "$xchanged" = "y" ] && \
+		printf "\nRelease archive '%s' successfully %s.\n" \
+		    "$archive" "$xtype"
+	[ "$xchanged" = "y" ] && [ "$nukemode" = "nuke" ] && \
+		printf "!!!WARNING!!! -> Vendor files removed. DO NOT FLASH.\n"
+	return 0
 }
 
 check_release()
 {
+	[ -L "$archive" ] && \
+	    $err "'$archive' is a symlink, not a file - $dontflash"
 	[ -f "$archive" ] || return 1
-	[ "${archive##*.}" = "xz" ] || return 1
-	printf "%s\n" "Release archive $archive detected"
-}
+	archivename="`basename "$archive"`"
+	[ -z "$archivename" ] && \
+	    $err "Cannot determine archive file name - $dontflash"
 
-# This function tries to determine the board from the filename of the rom.
-# It will only succeed if the filename is not changed from the build/download
-detect_board()
-{
-	path="$1"; filename="$(basename "$path")"
-	case "$filename" in
-	grub_*|seagrub_*|custom_*)
-		board="$(echo "$filename" | cut -d '_' -f2-3)" ;;
-	seabios_withgrub_*)
-		board="$(echo "$filename" | cut -d '_' -f3-4)" ;;
-	*.tar.xz) _stripped_prefix="${filename#*_}"
+	case "$archivename" in
+	*_src.tar.xz)
+		$err "'$archive' is a src archive, silly!" ;;
+	grub_*|seagrub_*|custom_*|seauboot_*|seabios_withgrub_*)
+		return 1 ;;
+	*.tar.xz) _stripped_prefix="${archivename#*_}"
 		board="${_stripped_prefix%.tar.xz}" ;;
-	*) $err "detect_board $filename: could not detect board type"
-	esac; printf "%s\n" "$board"
+	*) $err "'$archive': could not detect board type - $dontflash"
+	esac; :
 }
 
 readcfg()
@@ -395,36 +420,139 @@ readcfg()
 
 patch_release_roms()
 {
-	remkdir "tmp/romdir"; tar -xf "$archive" -C "tmp/romdir" || \
-	    $err "patch_release_roms: !tar -xf \"$archive\" -C \"tmp/romdir\""
+	has_hashes="n"
 
-	for x in "tmp/romdir/bin/"*/*.rom ; do
-		patch_rom "$x" || return 0
+	tmpromdir="tmp/DO_NOT_FLASH/bin/$board"
+	remkdir "${tmpromdir%"/bin/$board"}"
+	tar -xf "$archive" -C "${tmpromdir%"/bin/$board"}" || \
+		$err "Can't extract '$archive'"
+
+	for _hashes in $hashfiles; do
+		[ -L "$tmpromdir/$_hashes" ] && \
+		    $err "'$archive' -> the hashfile is a symlink. $dontflash"
+		[ -f "$tmpromdir/$_hashes" ] && has_hashes="y" && \
+		    hashfile="$_hashes" && break; :
 	done
 
+	x_ mkdir -p "tmp"; [ -L "tmp/rom.list" ] && \
+	    $err "'$archive' -> tmp/rom.list is a symlink - $dontflash"
+	x_ rm -f "tmp/rom.list" "tmp/zero.1b"
+	x_ dd if=/dev/zero of=tmp/zero.1b bs=1 count=1
+
+	find "$tmpromdir" -maxdepth 1 -type f -name "*.rom" > "tmp/rom.list" \
+	    || $err "'$archive' -> Can't make tmp/rom.list - $dontflash"
+
+	if readkconfig; then
+		while read -r _xrom ; do
+			process_release_rom "$_xrom" || break
+		done < "tmp/rom.list"
+		rm -f "$tmpromdir/README.md" || :
+		[ "$nukemode" != "nuke" ] || \
+		    printf "Make sure you inserted vendor files: %s\n" \
+		    "$vguide" > "$tmpromdir/README.md" || :
+	else
+		printf "Skipping vendorfiles on '$archive'"
+	fi
+
 	(
-	cd "tmp/romdir/bin/"* || $err "patch roms: !cd tmp/romdir/bin/*"
-
+	cd "$tmpromdir" || $err "patch '$archive': can't cd $tmpromdir"
 	# NOTE: For compatibility with older rom releases, defer to sha1
-	[ "$verify" != "y" ] || [ "$nukemode" = "nuke" ] || \
-	    sha512sum --status -c vendorhashes || \
-	    sha1sum --status -c vendorhashes || sha512sum --status -c \
-	    blobhashes || sha1sum --status -c blobhashes || \
-	    $err "patch_release_roms: ROMs did not match expected hashes"
-	) || $err "can't verify vendor hashes"
+	if [ "$has_hashes" = "y" ] && [ "$nukemode" != "nuke" ]; then
+		sha512sum --status -c "$hashfile" || \
+		    sha1sum --status -c "$hashfile" || \
+		    $err "'$archive' -> Can't verify vendor hashes. $dontflash"
+		rm -f "$hashfile" || \
+		    $err "$archive: Can't rm hashfile. $dontflash"
+	fi
+	) || $err "'$archive' -> Can't verify vendor hashes. $dontflash"
 
-	[ -n "$new_mac" ] && for x in "tmp/romdir/bin/"*/*.rom ; do
-		[ -f "$x" ] && modify_gbe "$x"
-	done
+	if [ -n "$new_mac" ]; then
+		if ! modify_mac_addresses; then
+			printf "\nNo GbE region defined for '$board'\n" \
+			    1>&2
+			printf "Therefore, changing the MAC is impossible.\n" \
+			    1>&2
+			printf "This board probably lacks Intel ethernet.\n" \
+			    1>&2
+		fi
+	fi
 
-	x_ mkdir -p bin/release
-	mv tmp/romdir/bin/* bin/release/ || $err "$board: !mv release roms"
+	[ "$xchanged" = "y" ] || rm -Rf "$tmpromdel" || :
+	[ "$xchanged" = "y" ] || return 0
+	(
+		cd "${tmpromdir%"/bin/$board"}" || \
+		    $err "Can't cd '${tmpromdir%"/bin/$board"}'; $dontflash"
+		# ../../ is the root of lbmk
+		mkrom_tarball "bin/$board"
+	) || $err "Cannot re-generate '$archive' - $dontflash"
+
+	mv "${tmpromdir%"/bin/$board"}/bin/${relname}_${board}.tar.xz" \
+	    "$archive" || \
+	    $err "'$archive' -> Cannot overwrite - $dontflash"; :
+}
+
+process_release_rom()
+{
+	_xrom="$1"; _xromname="${1##*/}"
+	[ -L "$_xrom" ] && \
+	    $err "$archive -> '${_xrom#"tmp/DO_NOT_FLASH/"}' is a symlink"
+	[ -f "$_xrom" ] || return 0
+
+	[ -z "${_xromname#"$vfix"}" ] && \
+	    $err "'$_xromname'->'"${_xromname#"$vfix"}"' empty. $dontflash"
+	# Remove the prefix and 1-byte pad
+	if [ "$nukemode" != "nuke" ] && \
+	    [ "${_xromname#"$vfix"}" != "$_xromname" ]; then
+		_xromnew="${_xrom%/*}/${_xromname#"$vfix"}"
+
+		# Remove the 1-byte padding
+		stat -c '%s' "$_xrom" > "tmp/rom.size" || \
+		    $err "$_xrom: Can't get rom size. $dontflash"
+		read -r xromsize < "tmp/rom.size" || \
+		    $err "$_xrom: Can't read rom size. $dontflash"
+
+		expr "X$xromsize" : "X-\{0,1\}[0123456789][0123456789]*$" \
+		    1>/dev/null 2>/dev/null || $err "$_xrom size non-integer"
+		[ $xromsize -lt 2 ] && $err \
+		    "$_xrom: Will not create empty file. $dontflash"
+
+		# TODO: check whether the size would be a multiple of 64KB
+		# the smallest rom images we do are 512kb	
+		xromsize="`expr $xromsize - 1`"
+		[ $xromsize -lt 524288 ] && \
+		    $err "$_xrom size too small; likely not a rom. $dontflash"
+
+		dd if="$_xrom" of="$_xromnew" bs=$xromsize count=1 || \
+		    $err "$_xrom: Can't resize. $dontflash"
+		rm -f "$_xrom" || $err "Can't rm $_xrom - $dontflash"
+
+		_xrom="$_xromnew"
+	fi
+
+	[ "$nukemode" = "nuke" ] && \
+		mksha512sum "$_xrom" "vendorhashes"
+
+	patch_rom "$_xrom" || return 1 # if break return, can still change MAC
+	[ "$nukemode" != "nuke" ] && return 0
+
+	# Rename the file, prefixing a warning saying not to flash
+	# the target image, which now has vendor files removed. Also
+	# pad it so that flashprog returns an error if the user tries
+	# to flash it, due to mismatching ROM size vs chip size
+	cat "$_xrom" tmp/zero.1b > "${_xrom%/*}/$vfix${_xrom##*/}" || \
+	    $err "'$archive' -> can't pad/rename '$_xrom'. $dontflash"
+	rm -f "$_xrom" || $err "'$archive' -> can't rm '$_xrom'. $dontflash"
 }
 
 patch_rom()
 {
 	rom="$1"
-	readkconfig || return 1
+
+	if [ "$has_hashes" != "y" ] && [ "$nukemode" != "nuke" ]; then
+		printf "inject: '%s' has no hash file. Skipping.\n" \
+		    "$archive" 1>&2
+		return 1
+	fi
 
 	[ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && inject "fallback/refcode" \
 	    "$CONFIG_REFCODE_BLOB_FILE" "stage"
@@ -456,15 +584,17 @@ patch_rom()
 	[ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \
 	   [ -n "$CONFIG_FSP_S_FILE" ] && \
 		inject "$CONFIG_FSP_S_CBFS" "$CONFIG_FSP_S_FILE" fsp
-	[ -n "$new_mac" ] && [ "$vrelease" != "y" ] && modify_gbe "$rom"
+	# TODO: modify gbe *after checksum verification only*
+	# TODO: insert default gbe if doing -n nuke
 
 	printf "ROM image successfully patched: %s\n" "$rom"
+	xchanged="y"
 }
 
 inject()
 {
 	[ $# -lt 3 ] && $err "$@, $rom: usage: inject name path type (offset)"
-	[ "$2" = "/dev/null" ] && return 0; verify="y"
+	[ "$2" = "/dev/null" ] && return 0
 
 	eval `setvars "" cbfsname _dest _t _offset`
 	cbfsname="$1"; _dest="${2##*../}"; _t="$3"
@@ -483,10 +613,14 @@ inject()
 		    $_t:$_dest "$rom" -O "$rom" || \
 		    $err "failed: inject '$_t' '$_dest' on '$rom'"
 		[ "$nukemode" != "nuke" ] || "$ifdtool" $ifdprefix --nuke $_t \
-		    "$rom" -O "$rom" || $err "$rom: !nuke IFD/$_t"; return 0
+		    "$rom" -O "$rom" || $err "$rom: !nuke IFD/$_t"
+		xchanged="y"
+		return 0
 	elif [ "$nukemode" = "nuke" ]; then
 		"$cbfstool" "$rom" remove -n "$cbfsname" || \
-		    $err "inject $rom: can't remove $cbfsname"; return 0
+		    $err "inject $rom: can't remove $cbfsname"
+		xchanged="y"
+		return 0
 	fi
 	if [ "$_t" = "stage" ]; then # the only stage we handle is refcode
 		x_ mkdir -p tmp; x_ rm -f "tmp/refcode"
@@ -496,18 +630,39 @@ inject()
 	else
 		"$cbfstool" "$rom" add -f "$_dest" -n "$cbfsname" \
 		    -t $_t $_offset || $err "$rom !add $_t ($_dest)"
-	fi; :
+	fi; xchanged="y"; :
 }
 
-modify_gbe()
+modify_mac_addresses()
 {
-	chkvars CONFIG_GBE_BIN_PATH
+	[ "$nukemode" = "nuke" ] && \
+	    $err "Cannot modify MAC addresses while nuking vendor files"
 
+	# chkvars CONFIG_GBE_BIN_PATH
+	[ -n "$CONFIG_GBE_BIN_PATH" ] || return 1
 	e "${CONFIG_GBE_BIN_PATH##*../}" f n && $err "missing gbe file"
-	x_ make -C util/nvmutil
 
-	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "$TMPDIR/gbe"
-	x_ "util/nvmutil/nvm" "$TMPDIR/gbe" setmac $new_mac
-	"$ifdtool" $ifdprefix -i GbE:"$TMPDIR/gbe" "$1" -O "$1" || \
-	    $err "Cannot insert modified GbE region into target image."
+	x_ make -C util/nvmutil
+	x_ mkdir -p tmp
+	[ -L "tmp/gbe" ] && $err "tmp/gbe exists but is a symlink"
+	[ -d "tmp/gbe" ] && $err "tmp/gbe exists but is a directory"
+	if [ -e "tmp/gbe" ]; then
+		[ -f "tmp/gbe" ] || $err "tmp/gbe exists and is not a file"
+	fi
+	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "tmp/gbe"
+
+	x_ "util/nvmutil/nvm" "tmp/gbe" setmac "$new_mac"
+
+	find "$tmpromdir" -maxdepth 1 -type f -name "*.rom" > "tmp/rom.list" \
+	    || $err "'$archive' -> Can't make tmp/rom.list - $dontflash"
+
+	while read -r _xrom; do
+		[ -L "$_xrom" ] && continue
+		[ -f "$_xrom" ] || continue
+		"$ifdtool" $ifdprefix -i GbE:"tmp/gbe" "$_xrom" -O \
+		    "$_xrom" || $err "'$_xrom': Can't insert new GbE file"
+		xchanged="y"
+	done < "tmp/rom.list"
+	printf "\nThe following GbE NVM words were written in '$archive':\n"
+	x_ util/nvmutil/nvm tmp/gbe dump
 }

From 08e86d2218c0804f3628c39c67fa8677cbc75067 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 2 Jan 2025 10:17:39 +0000
Subject: [PATCH 0992/1549] vendor.sh inject: reset err upon return

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/vendor.sh b/include/vendor.sh
index d6306256..29b991cd 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -340,6 +340,7 @@ fail_inject()
 
 vendor_inject()
 {
+	_olderr="$err"
 	err="fail_inject"
 	remkdir "$tmpromdel"
 
@@ -363,6 +364,7 @@ vendor_inject()
 	else
 		printf "Tarball '%s' (board '%s) doesn't need vendorfiles.\n" \
 		    "$archive" "$board"
+		err="$_olderr"
 		return 0
 	fi
 
@@ -374,6 +376,7 @@ vendor_inject()
 		    "$archive" "$xtype"
 	[ "$xchanged" = "y" ] && [ "$nukemode" = "nuke" ] && \
 		printf "!!!WARNING!!! -> Vendor files removed. DO NOT FLASH.\n"
+	err="$_olderr"
 	return 0
 }
 

From 8276560cc998e8eb1f935cbbe7551d2fbdc65d39 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 2 Jan 2025 18:33:55 +0000
Subject: [PATCH 0993/1549] lib.sh and rom.sh: update my header

i made modifications to them in 2025, so
update them to 2025

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 include/rom.sh | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 0af8db49..5a32d592 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-3.0-only
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 # Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# Copyright (c) 2020-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2020-2025 Leah Rowe <leah@libreboot.org>
 
 export LC_COLLATE=C
 export LC_ALL=C
diff --git a/include/rom.sh b/include/rom.sh
index 60980d22..a53a6d8c 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
-# Copyright (c) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2014-2016,2020-2021,2023-2025 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2021-2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 # Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>

From 0cf58c22734b19293f4cbef83add59b031ca1773 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 2 Jan 2025 23:52:45 +0000
Subject: [PATCH 0994/1549] fix lbmk shellcheck errors

There was also a condition in run_make_command that is now
an OR, where it was an AND, on script/trees, to fix the use
of mixed (and erroneous) OR/AND operators.

I'm planning a much more invasive audit than this. These are
light fixes, intended for Libreboot 20241206 rev8.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             |  4 ++--
 include/git.sh    | 13 +++++++------
 include/lib.sh    | 17 +++++++++--------
 include/mrc.sh    |  2 +-
 include/rom.sh    | 16 ++++++++++------
 include/vendor.sh | 31 ++++++++++++++++---------------
 script/trees      | 33 +++++++++++++++++----------------
 7 files changed, 62 insertions(+), 54 deletions(-)

diff --git a/build b/build
index 033cb433..2fab248b 100755
--- a/build
+++ b/build
@@ -14,7 +14,7 @@ fi
 . "include/vendor.sh"
 . "include/mrc.sh"
 
-eval `setvars "" vdir src_dirname srcdir mode xp ser`
+eval "`setvars "" vdir src_dirname srcdir mode xp ser`"
 err="fail"
 
 main()
@@ -48,7 +48,7 @@ git_init()
 {
 	[ -L ".git" ] && return 1
 	[ -e ".git" ] && return 0
-	eval `setvars "$(date -Rud @$versiondate)" cdate _nogit`
+	eval "`setvars "$(date -Rud @$versiondate)" cdate _nogit`"
 
 	git init || return 1
 	git add -A . || return 1
diff --git a/include/git.sh b/include/git.sh
index aaeabcd4..fb0b2b42 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -2,8 +2,8 @@
 # Copyright (c) 2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
-eval `setvars "" loc url bkup_url subfile subhash subrepo subrepo_bkup \
-    depend subfile_bkup repofail`
+eval "`setvars "" loc url bkup_url subfile subhash subrepo subrepo_bkup \
+    depend subfile_bkup repofail`"
 
 fetch_targets()
 {
@@ -18,8 +18,8 @@ fetch_targets()
 
 fetch_project()
 {
-	eval `setvars "" xtree tree_depend`
-	eval `setcfg "config/git/$project/pkg.cfg"`
+	eval "`setvars "" xtree tree_depend`"
+	eval "`setcfg "config/git/$project/pkg.cfg"`"
 
 	chkvars url
 
@@ -71,7 +71,8 @@ prep_submodules()
 fetch_submodule()
 {
 	mcfgdir="$mdir/${1##*/}"
-	eval `setvars "" subhash subrepo subrepo_bkup subfile subfile_bkup st`
+	eval "`setvars "" subhash subrepo subrepo_bkup subfile subfile_bkup \
+	    st`"
 	[ ! -f "$mcfgdir/module.cfg" ] || . "$mcfgdir/module.cfg" || \
 	    $err "! . $mcfgdir/module.cfg"
 
@@ -103,7 +104,7 @@ tmpclone()
 	mkdir -p "$XBMK_CACHE/repo" || $err "!rmdir $XBMK_CACHE/repo"
 
 	if [ "$livepull" = "y" ] && [ ! -d "$repodir" ]; then
-		git clone $1 "$repodir" || git clone $2 "$repodir" || \
+		git clone "$1" "$repodir" || git clone $2 "$repodir" || \
 		    $err "!clone $1 $2 $repodir $4 $5" #
 	elif [ -d "$repodir" ] && [ $# -lt 6 ]; then
 		git -C "$repodir" pull || sleep 3 || git -C "$repodir" pull \
diff --git a/include/lib.sh b/include/lib.sh
index 5a32d592..790f4fe9 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -33,23 +33,23 @@ err_()
 setvars()
 {
 	_setvars="" && [ $# -lt 2 ] && $err "setvars: too few arguments"
-	val="$1" && shift 1 && for var in $@; do
+	val="$1" && shift 1 && for var in "$@"; do
 		_setvars="$var=\"$val\"; $_setvars"
 	done; printf "%s\n" "${_setvars% }"
 }
 chkvars()
 {
-	for var in $@; do
+	for var in "$@"; do
 		eval "[ -n "\${$var+x}" ] || \$err \"$var unset\""
 		eval "[ -n "\$$var" ] || \$err \"$var unset\""
 	done; return 0
 }
 
-eval `setvars "" _nogit board xbmk_parent versiondate projectsite projectname \
-    aur_notice configdir datadir version relname reinstall`
+eval "`setvars "" _nogit board reinstall versiondate projectsite projectname \
+    aur_notice configdir datadir version relname xbmk_parent`"
 
 for fv in projectname projectsite version versiondate; do
-	eval "[ ! -f "$fv" ] || read -r $fv < \"$fv\" || :"
+	eval "[ ! -f \"$fv\" ] || read -r $fv < \"$fv\" || :"
 done; chkvars projectname projectsite
 
 setcfg()
@@ -75,12 +75,13 @@ install_packages()
 	[ $# -lt 2 ] && $err "fewer than two arguments"
 	[ $# -gt 2 ] && reinstall="$3"
 
-	eval `setcfg "config/dependencies/$2"`
+	eval "`setcfg "config/dependencies/$2"`"
 
+	chkvars pkg_add pkglist
 	$pkg_add $pkglist || $err "Cannot install packages"
 
 	[ -n "$aur_notice" ] && \
-	printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; return 0
+	    printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; :
 }
 if [ $# -gt 0 ] && [ "$1" = "dependencies" ]; then
 	install_packages "$@" || exit 1
@@ -267,7 +268,7 @@ cbfs()
 mk()
 {
 	mk_flag="$1" || $err "No argument given"
-	shift 1 && for mk_arg in $@; do
+	shift 1 && for mk_arg in "$@"; do
 		./mk $mk_flag $mk_arg || $err "./mk $mk_flag $mk_arg"; :
 	done; :
 }
diff --git a/include/mrc.sh b/include/mrc.sh
index 2e00d9f9..f5db2ff0 100644
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -4,7 +4,7 @@
 # Modifications in this version are Copyright 2021, 2023 and 2024 Leah Rowe.
 # Original copyright detailed in repo: https://review.coreboot.org/coreboot/
 
-eval `setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL`
+eval "`setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL`"
 
 extract_mrc()
 {
diff --git a/include/rom.sh b/include/rom.sh
index a53a6d8c..6c1d2b05 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -43,8 +43,9 @@ copyps1bios()
 
 mkpayload_grub()
 {
-	eval `setvars "" grub_modules grub_install_modules`
-	$dry eval `setcfg "$grubdata/module/$tree"`
+	eval "`setvars "" grub_modules grub_install_modules`"
+	$dry eval "`setcfg "$grubdata/module/$tree"`"
+	$dry chkvars grub_modules grub_install_modules
 	$dry x_ rm -f "$srcdir/grub.elf"; $dry \
 	"$srcdir/grub-mkstandalone" --grub-mkimage="$srcdir/grub-mkimage" \
 	    -O i386-coreboot -o "$srcdir/grub.elf" -d "${srcdir}/grub-core/" \
@@ -62,7 +63,7 @@ mkvendorfiles()
 	printf "%s\n" "${version%%-*}" > "$srcdir/.coreboot-version" || \
 	    $err "!mk $srcdir .coreboot-version"
 	[ -z "$mode" ] && [ "$target" != "$tree" ] && \
-	    x_ ./mk download $target; return 0
+	    x_ ./mk download "$target"; return 0
 }
 
 cook_coreboot_config()
@@ -113,7 +114,8 @@ mkcorebootbin()
 
 	if [ "$payload_uboot_i386" = "y" ] || \
 	    [ "$payload_uboot_amd64" = "y" ]; then
-		printf "'$target' has x86 U-Boot; assuming SeaBIOS=y\n" 1>&2
+		printf "'%s' has x86 U-Boot; assuming SeaBIOS=y\n" \
+		    "$target" 1>&2
 		payload_seabios="y"
 	fi
 
@@ -204,10 +206,12 @@ mkseagrub()
 add_uboot()
 {
 	if [ "$displaymode" = "txtmode" ]; then
-		printf "cb/$target: Cannot use U-Boot in text mode\n" 1>&2
+		printf "cb/%s: Cannot use U-Boot in text mode\n" \
+		    "$target" 1>&2
 		return 0
 	elif [ "$initmode" = "normal" ]; then
-		printf "cb/$target: Cannot use U-Boot in normal initmode\n" 1>&2
+		printf "cb/%s: Cannot use U-Boot in normal initmode\n" \
+		    "$target" 1>&2
 		return 0
 	fi
 
diff --git a/include/vendor.sh b/include/vendor.sh
index 29b991cd..15d4e5cb 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -26,14 +26,14 @@ cv="CONFIG_HAVE_ME_BIN CONFIG_ME_BIN_PATH CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \
     CONFIG_FSP_S_FILE CONFIG_FSP_S_CBFS CONFIG_FSP_M_CBFS CONFIG_FSP_USE_REPO \
     CONFIG_FSP_FULL_FD"
 
-eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
+eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
     E6400_VGA_romname SCH5545EC_DL_url_bkup SCH5545EC_DL_hash _dest tree \
     mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl SCH5545EC_DL_url \
     archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref FSPFD_hash \
     _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch tmpromdir \
     IFD_platform ifdprefix cdir sdir _me _metmp mfs TBFW_url_bkup TBFW_url \
-    TBFW_hash TBFW_size hashfile has_hashes xromsize xchanged $cv`
+    TBFW_hash TBFW_size hashfile xromsize xchanged EC_url_bkup $cv`"
 
 vendor_download()
 {
@@ -58,14 +58,14 @@ readkconfig()
 		done
 	done < "$TMPDIR/vendorcfg.list"
 
-	eval `setcfg "$TMPDIR/tmpcbcfg"`
+	eval "`setcfg "$TMPDIR/tmpcbcfg"`"
 
 	for c in CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
 	    CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \
 	    CONFIG_LENOVO_TBFW_BIN CONFIG_FSP_M_FILE CONFIG_FSP_S_FILE; do
 		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
 		eval "[ -z \"\${$c}\" ] && continue"
-		eval `setcfg "config/vendor/$vcfg/pkg.cfg"`; return 0
+		eval "`setcfg "config/vendor/$vcfg/pkg.cfg"`"; return 0
 	done
 	printf "Vendor files not needed for: %s\n" "$board" 1>&2; return 1
 }
@@ -77,7 +77,7 @@ bootstrap()
 	[ -d "${kbc1126_ec_dump%/*}" ] && x_ make -C "$cbdir/util/kbc1126"
 	[ -n "$MRC_refcode_cbtree" ] && \
 	    cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
-	    x_ ./mk -d coreboot $MRC_refcode_cbtree; return 0
+	    x_ ./mk -d coreboot "$MRC_refcode_cbtree"; return 0
 }
 
 getfiles()
@@ -345,7 +345,7 @@ vendor_inject()
 	remkdir "$tmpromdel"
 
 	set +u +e; [ $# -lt 1 ] && $err "No options specified. - $dontflash"
-	eval `setvars "" nukemode new_mac xchanged`
+	eval "`setvars "" nukemode new_mac xchanged`"
 
 	archive="$1";
 	[ $# -gt 1 ] && case "$2" in
@@ -359,7 +359,7 @@ vendor_inject()
 	check_release "$archive" || \
 	    $err "You must run this script on a release archive. - $dontflash"
 	if readcfg; then
-		[ "$nukemode" = "nuke" ] || x_ ./mk download $board
+		[ "$nukemode" = "nuke" ] || x_ ./mk download "$board"
 		patch_release_roms
 	else
 		printf "Tarball '%s' (board '%s) doesn't need vendorfiles.\n" \
@@ -407,7 +407,7 @@ readcfg()
 	    [ "$board" = "serprog_pico" ]; then
 		return 1
 	fi; boarddir="$cbcfgsdir/$board"
-	eval `setcfg "$boarddir/target.cfg"`; chkvars vcfg tree
+	eval "`setcfg "$boarddir/target.cfg"`"; chkvars vcfg tree
 
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
@@ -418,7 +418,7 @@ readcfg()
 	ifdtool="elf/ifdtool/$tree/ifdtool"
 	[ -n "$IFD_platform" ] && ifdprefix="-p $IFD_platform"
 
-	x_ ./mk -d coreboot $tree
+	x_ ./mk -d coreboot "$tree"
 }
 
 patch_release_roms()
@@ -454,7 +454,7 @@ patch_release_roms()
 		    printf "Make sure you inserted vendor files: %s\n" \
 		    "$vguide" > "$tmpromdir/README.md" || :
 	else
-		printf "Skipping vendorfiles on '$archive'"
+		printf "Skipping vendorfiles on '%s'\n" "$archive" 1>&2
 	fi
 
 	(
@@ -471,7 +471,7 @@ patch_release_roms()
 
 	if [ -n "$new_mac" ]; then
 		if ! modify_mac_addresses; then
-			printf "\nNo GbE region defined for '$board'\n" \
+			printf "\nNo GbE region defined for '%s'\n" "$board" \
 			    1>&2
 			printf "Therefore, changing the MAC is impossible.\n" \
 			    1>&2
@@ -596,17 +596,17 @@ patch_rom()
 
 inject()
 {
-	[ $# -lt 3 ] && $err "$@, $rom: usage: inject name path type (offset)"
+	[ $# -lt 3 ] && $err "$*, $rom: usage: inject name path type (offset)"
 	[ "$2" = "/dev/null" ] && return 0
 
-	eval `setvars "" cbfsname _dest _t _offset`
+	eval "`setvars "" cbfsname _dest _t _offset`"
 	cbfsname="$1"; _dest="${2##*../}"; _t="$3"
 
 	if [ "$_t" = "fsp" ]; then
 		[ $# -gt 3 ] && _offset="$4"
 	else
 		[ $# -gt 3 ] && _offset="-b $4" && [ -z "$4" ] && \
-		    $err "inject $@, $rom: offset given but empty (undefined)"
+		    $err "inject $*, $rom: offset given but empty (undefined)"
 	fi
 
 	e "$_dest" f n && [ "$nukemode" != "nuke" ] && $err "!inject $dl_type"
@@ -666,6 +666,7 @@ modify_mac_addresses()
 		    "$_xrom" || $err "'$_xrom': Can't insert new GbE file"
 		xchanged="y"
 	done < "tmp/rom.list"
-	printf "\nThe following GbE NVM words were written in '$archive':\n"
+	printf "\nThe following GbE NVM words were written in '%s':\n" \
+	    "$archive"
 	x_ util/nvmutil/nvm tmp/gbe dump
 }
diff --git a/script/trees b/script/trees
index a3ea1e6f..e674282c 100755
--- a/script/trees
+++ b/script/trees
@@ -11,13 +11,13 @@ set -u -e
 
 XBMKPATH="$PATH"
 
-eval `setvars "" xarch srcdir premake cmakedir xlang mode makeargs elfdir cmd \
+eval "`setvars "" xarch srcdir premake gnatdir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
     defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs gccver gccfull \
-    gnatver gnatfull gccdir gnatdir`; badhash="n"
+    gnatver gnatfull gccdir cmakedir`"; badhash="n"
 
-tree()
+main()
 {
 	while getopts f:b:m:u:c:x:s:l:n:d: option; do
 		[ -n "$_f" ] && $err "only one flag is permitted"
@@ -53,7 +53,7 @@ tree()
 	e "$mkhelpercfg" f missing && mkhelpercfg="$TMPDIR/mkhelper.cfg" && \
 	    x_ touch "$mkhelpercfg"
 
-	targets="$@"; cmd="build_targets $targets"
+	targets="$*"; cmd="build_targets $targets"
 	singletree "$project" && cmd="build_project"
 
 	remkdir "${tmpgit%/*}"
@@ -115,14 +115,15 @@ handle_defconfig()
 
 configure_project()
 {
-	eval `setvars "" xarch xlang build_depend autoconfargs xtree postmake \
+	eval "`setvars "" cleanargs build_depend autoconfargs xtree postmake \
 	    tree_depend makeargs btype mkhelper bootstrapargs premake release \
-	    cleanargs`
+	    xarch xlang`"
 	_tcfg="$1/target.cfg"; badhash="n"; [ -f "$_tcfg" ] || btype="auto"
-	[ -f "$datadir/mkhelper.cfg" ] && eval `setcfg "$datadir/mkhelper.cfg"`
+	[ -f "$datadir/mkhelper.cfg" ] && \
+	    eval "`setcfg "$datadir/mkhelper.cfg"`"
 
 	while [ -f "$_tcfg" ] || [ "$cmd" != "build_project" ]; do
-		eval `setvars "" rev tree`; eval `setcfg "$_tcfg"`
+		eval "`setvars "" rev tree`"; eval "`setcfg "$_tcfg"`"
 		printf "Loading %s config: %s\n" "$project" "$_tcfg"
 
 		[ "$_f" = "-d" ] && build_depend="" # dry run
@@ -140,7 +141,7 @@ configure_project()
 	[ -n "$tree" ] && mdir="$mdir/$tree"
 	[ -f "CHANGELOG" ] || check_project_hashes
 
-	[ "$mode" = "fetch" ] || x_ ./mk -f "$project" $target
+	[ "$mode" = "fetch" ] || x_ ./mk -f "$project" "$target"
 	[ "$mode" = "fetch" ] || return 0
 	[ -f "CHANGELOG" ] && return 1; fetch_${cmd#build_}; return 1
 }
@@ -198,7 +199,7 @@ check_cross_compiler()
 		[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
 		[ -n "$xtree" ] && cbdir="src/coreboot/$xtree"
 
-		x_ ./mk -f coreboot ${cbdir#src/coreboot/}
+		x_ ./mk -f coreboot "${cbdir#src/coreboot/}"
 
 		export PATH="$PWD/$cbdir/util/crossgcc/xgcc/bin:$PATH"
 		export CROSS_COMPILE="${xarch% *}-"
@@ -234,16 +235,16 @@ check_gnu_path()
 		eval "[ \"\$$_gnuarg\" = \"gnat\" ] && continue"
 		$err "check_gnu_path: Invalid argument \"$_gnuarg\""
 	done
-	command -v $1 1>/dev/null || $err "Host '$1' unavailable"
+	command -v "$1" 1>/dev/null || $err "Host '$1' unavailable"
 
-	eval `setvars "" gccver gccfull gnatver gnatfull gccdir gnatdir`
+	eval "`setvars "" gccver gccfull gnatver gnatfull gccdir gnatdir`"
 	gnu_setver "$1" "$1" || $err "Command '$1' unavailable."
 	gnu_setver "$2" "$2" || :
 
 	eval "[ -z \"\$$1ver\" ] && $err \"Cannot detect host '$1' version\""
 	[ "$gnatfull" = "$gccfull" ] && return 0
 
-	eval "$1dir="$(dirname "$(command -v $1)")""
+	eval "$1dir=\"$(dirname "$(command -v "$1")")\""
 	eval "_gnudir=\"\$$1dir\"; _gnuver=\"\$$1ver\""
 	for _gnubin in "$_gnudir/$2-"*; do
 		[ -f "$_gnubin" ] || continue
@@ -266,7 +267,7 @@ check_gnu_path()
 gnu_setver()
 {
 	eval "$2 --version 1>/dev/null 2>/dev/null || return 1"
-	eval "$1ver=\"`$2 --version 2>/dev/null | head -n1`\""
+	eval "$1ver=\"`"$2" --version 2>/dev/null | head -n1`\""
 	eval "$1ver=\"\${$1ver##* }\""
 	eval "$1full=\"\$$1ver\""
 	eval "$1ver=\"\${$1ver%%.*}\""; :
@@ -316,7 +317,7 @@ run_make_command()
 	$dry make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs || $err "!$mode"
 	[ -z "$mkhelper" ] || [ -n "$mode" ] || $mkhelper || $err "!$mkhelper"
 
-	[ "$mode" = "clean" ] && \
+	[ "$mode" != "clean" ] || \
 	    $dry make -C "$srcdir" $cleanargs distclean || :; :
 }
 
@@ -352,6 +353,6 @@ copy_elf()
 	done < "$listfile"; x_ make clean -C "$srcdir" $cleanargs
 }
 
-tree "$@" || exit 0
+main "$@" || exit 0
 . "$mkhelpercfg"
 $cmd

From b032e483ef16ae77e2856c44c107428720561d40 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 2 Jan 2025 23:58:37 +0000
Subject: [PATCH 0995/1549] lib.sh mktarball: cleaner if statement

i also removed that printf, because the path it prints is
actually wrong sometimes; in the recent re-write of vendor.sh,
it prints the correct path instead

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 790f4fe9..8886cfc8 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -170,9 +170,9 @@ mkrom_tarball()
 
 mktarball()
 {
-	[ "${2%/*}" = "$2" ] || \
+	if [ "${2%/*}" != "$2" ]; then
 		mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
-	printf "\nCreating archive: %s\n\n" "$2"
+	fi
 	tar -c "$1" | xz -T$XBMK_THREADS -9e > "$2" || $err "mktarball 2, $1"
 }
 

From a338e585eed0ab8589909925582dc29d885665b9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 00:26:32 +0000
Subject: [PATCH 0996/1549] util/nvmutil: show the correct hexdump order

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index f95df4cf..6c4ebcd6 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -222,7 +222,7 @@ hexdump(int partnum)
 		printf("%07x", row << 4);
 		for (int c = 0; c < 8; c++) {
 			uint16_t val16 = word((row << 3) + c, partnum);
-			printf(" %02x%02x", val16 >> 8, val16 & 0xff);
+			printf(" %02x%02x", val16 & 0xff, val16 >> 8);
 		} printf("\n");
 	}
 }

From 874317c4e591bc5485ac2b248b4e82b8f7646027 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 00:36:17 +0000
Subject: [PATCH 0997/1549] util/nvmutil: nicer hexdump display

make it look like hexdump -C, where individual bytes are
spaced, and there is an additional space after 8 bytes,
per row.

i won't bother with a character display, since that is
meaningless on gbe nvm words.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 6c4ebcd6..33cea8e6 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -219,10 +219,12 @@ void
 hexdump(int partnum)
 {
 	for (int row = 0; row < 8; row++) {
-		printf("%07x", row << 4);
+		printf("%08x ", row << 4);
 		for (int c = 0; c < 8; c++) {
 			uint16_t val16 = word((row << 3) + c, partnum);
-			printf(" %02x%02x", val16 & 0xff, val16 >> 8);
+			if (c == 4)
+				printf(" ");
+			printf(" %02x %02x", val16 & 0xff, val16 >> 8);
 		} printf("\n");
 	}
 }

From 033e4cd9d50767b3e9d8d9d950c622c2f075a878 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 01:36:20 +0000
Subject: [PATCH 0998/1549] util/nvmutil: Make the GbE checksum a define

This makes the code easier to understand.

All 2-byte words, stored in little endian order within
the 128-byte GbE NVM area, must add up to 0xBABA.

If it doesn't, then software is supposed to reject that
GbE config. The nvmutil software works on that basis.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 33cea8e6..950fc2e8 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -24,6 +24,7 @@ uint8_t hextonum(char chs), rhex(void);
 #define MAC_ADDRESS argv[3]
 #define PARTN argv[3]
 #define SIZE_4KB 0x1000
+#define NVM_CHECKSUM 0xbaba
 
 uint16_t buf16[SIZE_4KB], mac[3] = {0, 0, 0};
 uint8_t *buf = (uint8_t *) &buf16;
@@ -235,7 +236,7 @@ cmd_setchecksum(void)
 	uint16_t val16 = 0;
 	for (int c = 0; c < 0x3F; c++)
 		val16 += word(c, part);
-	setWord(0x3F, part, 0xBABA - val16);
+	setWord(0x3F, part, NVM_CHECKSUM - val16);
 }
 
 void
@@ -258,7 +259,7 @@ goodChecksum(int partnum)
 	uint16_t total = 0;
 	for(int w = 0; w <= 0x3F; w++)
 		total += word(w, partnum);
-	if (total == 0xBABA)
+	if (total == NVM_CHECKSUM)
 		return 1;
 	fprintf(stderr, "WARNING: BAD checksum in part %d\n", partnum);
 	return (errno = ECANCELED) & 0;

From 4defe2c6085f72f6fb9132aaa876f1ac2ab29657 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 01:39:46 +0000
Subject: [PATCH 0999/1549] util/nvmutil: Add distclean to Makefile

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/Makefile | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/util/nvmutil/Makefile b/util/nvmutil/Makefile
index f25f6dd5..2d646a44 100644
--- a/util/nvmutil/Makefile
+++ b/util/nvmutil/Makefile
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: MIT
-# SPDX-FileCopyrightText: 2022 Leah Rowe <leah@libreboot.org>
+# SPDX-FileCopyrightText: 2022,2025 Leah Rowe <leah@libreboot.org>
 # SPDX-FileCopyrightText: 2023 Riku Viitanen <riku.viitanen@protonmail.com>
 
 CC=cc
@@ -12,5 +12,8 @@ nvm: nvmutil.c
 install: nvm
 	install nvm $(PREFIX)/nvm
 
+distclean:
+	rm -f nvm
+
 clean:
 	rm -f nvm

From 57f9906f6d148d2c302e38923a64664c74b4934a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 01:41:46 +0000
Subject: [PATCH 1000/1549] util/nvmutil: Add uninstall to Makefile

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/Makefile | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/util/nvmutil/Makefile b/util/nvmutil/Makefile
index 2d646a44..ca23c714 100644
--- a/util/nvmutil/Makefile
+++ b/util/nvmutil/Makefile
@@ -12,6 +12,9 @@ nvm: nvmutil.c
 install: nvm
 	install nvm $(PREFIX)/nvm
 
+uninstall: clean
+	rm -f $(PREFIX)/nvm
+
 distclean:
 	rm -f nvm
 

From 2c7b9fb9412cd24c2fbf2191cb9b012faf8ad441 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 01:45:55 +0000
Subject: [PATCH 1001/1549] util/nvmutil: Capitalise BABA

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 950fc2e8..460bd2b2 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -24,7 +24,7 @@ uint8_t hextonum(char chs), rhex(void);
 #define MAC_ADDRESS argv[3]
 #define PARTN argv[3]
 #define SIZE_4KB 0x1000
-#define NVM_CHECKSUM 0xbaba
+#define NVM_CHECKSUM 0xBABA
 
 uint16_t buf16[SIZE_4KB], mac[3] = {0, 0, 0};
 uint8_t *buf = (uint8_t *) &buf16;

From 3f85ae5f853ce7c4b7fea92af112fad26e811ebf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 01:48:52 +0000
Subject: [PATCH 1002/1549] util/nvmutil: Set CC and CFLAGS only if unset

We don't want to clobber anything that the user set themselves.

Instead, we should respect the user's choice.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/util/nvmutil/Makefile b/util/nvmutil/Makefile
index ca23c714..a1999d7e 100644
--- a/util/nvmutil/Makefile
+++ b/util/nvmutil/Makefile
@@ -2,8 +2,8 @@
 # SPDX-FileCopyrightText: 2022,2025 Leah Rowe <leah@libreboot.org>
 # SPDX-FileCopyrightText: 2023 Riku Viitanen <riku.viitanen@protonmail.com>
 
-CC=cc
-CFLAGS=-Os -Wall -Wextra -Werror -pedantic
+CC?=cc
+CFLAGS?=-Os -Wall -Wextra -Werror -pedantic
 PREFIX?=/usr/bin
 
 nvm: nvmutil.c

From 982f257f58acc729cbb93c239b1fa37d9bef5834 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 02:03:44 +0000
Subject: [PATCH 1003/1549] util/nvmutil: Proper DESTDIR/PREFIX handling

DESTDIR is the root directory where it goes, which
is normally an empty string; PREFIX is where the
bin directory is located, relative to DESTDIR

Default to /usr/local for PREFIX, not /usr, because
/usr/bin is for system utilities.

nvmutil is a local utility.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/Makefile | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/util/nvmutil/Makefile b/util/nvmutil/Makefile
index a1999d7e..317635f3 100644
--- a/util/nvmutil/Makefile
+++ b/util/nvmutil/Makefile
@@ -4,16 +4,17 @@
 
 CC?=cc
 CFLAGS?=-Os -Wall -Wextra -Werror -pedantic
-PREFIX?=/usr/bin
+DESTDIR?=
+PREFIX?=/usr/local
 
 nvm: nvmutil.c
 	$(CC) $(CFLAGS) nvmutil.c -o nvm
 
-install: nvm
-	install nvm $(PREFIX)/nvm
+install:
+	install nvm $(DESTDIR)$(PREFIX)/bin/nvm
 
 uninstall: clean
-	rm -f $(PREFIX)/nvm
+	rm -f $(DESTDIR)$(PREFIX)/nvm
 
 distclean:
 	rm -f nvm

From 8008838abbc659e81de07075f3939b0b8af5ca12 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 02:05:49 +0000
Subject: [PATCH 1004/1549] util/nvmutil: Don't clean when doing uninstall

The user might wish to uninstall, but not remove the
build that they just did.

The user can still do make clean if they wish.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/util/nvmutil/Makefile b/util/nvmutil/Makefile
index 317635f3..bd1d70fa 100644
--- a/util/nvmutil/Makefile
+++ b/util/nvmutil/Makefile
@@ -13,7 +13,7 @@ nvm: nvmutil.c
 install:
 	install nvm $(DESTDIR)$(PREFIX)/bin/nvm
 
-uninstall: clean
+uninstall:
 	rm -f $(DESTDIR)$(PREFIX)/nvm
 
 distclean:

From efd50ee548b0f8d9d048e822cc54f0f0d3d19185 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 02:08:38 +0000
Subject: [PATCH 1005/1549] util/nvmutil: Honour the INSTALL variable

Don't assume "install" is the correct command.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/Makefile | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/util/nvmutil/Makefile b/util/nvmutil/Makefile
index bd1d70fa..b946a193 100644
--- a/util/nvmutil/Makefile
+++ b/util/nvmutil/Makefile
@@ -6,12 +6,13 @@ CC?=cc
 CFLAGS?=-Os -Wall -Wextra -Werror -pedantic
 DESTDIR?=
 PREFIX?=/usr/local
+INSTALL?=install
 
 nvm: nvmutil.c
 	$(CC) $(CFLAGS) nvmutil.c -o nvm
 
 install:
-	install nvm $(DESTDIR)$(PREFIX)/bin/nvm
+	$(INSTALL) nvm $(DESTDIR)$(PREFIX)/bin/nvm
 
 uninstall:
 	rm -f $(DESTDIR)$(PREFIX)/nvm

From e63fe256dfc5d0c75235974960412b3ac83e2e3c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 02:09:55 +0000
Subject: [PATCH 1006/1549] util/spkmodem-recv: More correct Makefile

Set up the DESTDIR variable properly. Otherwise,
this is just style changes.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/spkmodem_recv/Makefile | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/util/spkmodem_recv/Makefile b/util/spkmodem_recv/Makefile
index 1bba727c..3c5dc51f 100644
--- a/util/spkmodem_recv/Makefile
+++ b/util/spkmodem_recv/Makefile
@@ -1,8 +1,9 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
-CC ?= cc
-PREFIX  ?= /usr/local
-INSTALL ?= install
-CFLAGS ?= -Os -Wall -Wextra -Werror -pedantic
+CC?=cc
+CFLAGS?=-Os -Wall -Wextra -Werror -pedantic
+DESTDIR?=
+PREFIX?=/usr/local
+INSTALL?=install
 
 spkmodem-recv:
 	$(CC) $(CFLAGS) -o $@ $@.c

From d1ca21628cb2c3eb32e65159065209b678ba2e59 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 02:13:01 +0000
Subject: [PATCH 1007/1549] util/nvmutil: Remove the correct binary on
 uninstall

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/util/nvmutil/Makefile b/util/nvmutil/Makefile
index b946a193..b8ec2ad3 100644
--- a/util/nvmutil/Makefile
+++ b/util/nvmutil/Makefile
@@ -15,7 +15,7 @@ install:
 	$(INSTALL) nvm $(DESTDIR)$(PREFIX)/bin/nvm
 
 uninstall:
-	rm -f $(DESTDIR)$(PREFIX)/nvm
+	rm -f $(DESTDIR)$(PREFIX)/bin/nvm
 
 distclean:
 	rm -f nvm

From 20b192e13bd3812f3df337c059a0fdb551f2d72c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 02:15:18 +0000
Subject: [PATCH 1008/1549] util/nvmutil: Describe nvmutil in help output

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 460bd2b2..68bb95da 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -64,6 +64,7 @@ int
 main(int argc, char *argv[])
 {
 	if (argc < 3) {
+		fprintf(stderr, "Modify Intel GbE NVM images e.g. set MAC\n");
 		fprintf(stderr, "USAGE:\n");
 		fprintf(stderr, " %s FILE dump\n", argv[0]);
 		fprintf(stderr, " %s FILE setmac [MAC]\n", argv[0]);

From 0305975e7052bd3f988b11f0dca89af56a2bfd82 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 02:24:09 +0000
Subject: [PATCH 1009/1549] util/nvmutil: Update AUTHORS and COPYING files

Mention Riku's copyright in the COPYING file, and update
my years in that file. Add Riku to the AUTHORS file.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/AUTHORS | 1 +
 util/nvmutil/COPYING | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/util/nvmutil/AUTHORS b/util/nvmutil/AUTHORS
index f3c00385..f38ea210 100644
--- a/util/nvmutil/AUTHORS
+++ b/util/nvmutil/AUTHORS
@@ -1 +1,2 @@
 Leah Rowe
+Riku Viitanen
diff --git a/util/nvmutil/COPYING b/util/nvmutil/COPYING
index 784581dd..a6ecf266 100644
--- a/util/nvmutil/COPYING
+++ b/util/nvmutil/COPYING
@@ -1,4 +1,5 @@
-Copyright (C) 2022, 2023 Leah Rowe <leah@libreboot.org>
+Copyright (C) 2022-2025 Leah Rowe <leah@libreboot.org>
+Copyright (c) 2023 Riku Viitanen <riku.viitanen@protonmail.com>
 
 Permission is hereby granted, free of charge, to any person obtaining a
 copy of this software and associated documentation files (the

From 4149f3dc81a5157b08a8f1e297fd6c78811cf170 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 09:19:59 +0000
Subject: [PATCH 1010/1549] submodule/grub: use codeberg for 1st gnulib mirror

the gnu.org mirror is always slow for some reason, but only
for gnulib. it may only be for me, because routing in other
countries/networks may differ.

when i'm freshly cloning lbmk modules, gnulib is always really
slow, like 300KB/s (bytes, not bits)

i have 1gbps internet and wish to not have 2005-era speeds,
thank you kindly!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/submodule/grub/default/gnulib/module.cfg | 4 ++--
 config/submodule/grub/nvme/gnulib/module.cfg    | 4 ++--
 config/submodule/grub/xhci/gnulib/module.cfg    | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/config/submodule/grub/default/gnulib/module.cfg b/config/submodule/grub/default/gnulib/module.cfg
index ca09e0ba..eaf40b24 100644
--- a/config/submodule/grub/default/gnulib/module.cfg
+++ b/config/submodule/grub/default/gnulib/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subrepo="git://git.sv.gnu.org/gnulib"
-subrepo_bkup="https://codeberg.org/libreboot/gnulib"
+subrepo="https://codeberg.org/libreboot/gnulib"
+subrepo_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup!
 subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
diff --git a/config/submodule/grub/nvme/gnulib/module.cfg b/config/submodule/grub/nvme/gnulib/module.cfg
index ca09e0ba..eaf40b24 100644
--- a/config/submodule/grub/nvme/gnulib/module.cfg
+++ b/config/submodule/grub/nvme/gnulib/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subrepo="git://git.sv.gnu.org/gnulib"
-subrepo_bkup="https://codeberg.org/libreboot/gnulib"
+subrepo="https://codeberg.org/libreboot/gnulib"
+subrepo_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup!
 subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
diff --git a/config/submodule/grub/xhci/gnulib/module.cfg b/config/submodule/grub/xhci/gnulib/module.cfg
index ca09e0ba..eaf40b24 100644
--- a/config/submodule/grub/xhci/gnulib/module.cfg
+++ b/config/submodule/grub/xhci/gnulib/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subrepo="git://git.sv.gnu.org/gnulib"
-subrepo_bkup="https://codeberg.org/libreboot/gnulib"
+subrepo="https://codeberg.org/libreboot/gnulib"
+subrepo_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup!
 subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"

From d825f9a9683c0d7996f532223c43c14f30b411b9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 09:34:42 +0000
Subject: [PATCH 1011/1549] rom.sh: Remove errant GRUB modules check

This check is a good idea, but not viable here,
because the modules naturally aren't set in all
circumstances, so it just causes a build error.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/rom.sh b/include/rom.sh
index 6c1d2b05..2a7bc837 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -45,7 +45,6 @@ mkpayload_grub()
 {
 	eval "`setvars "" grub_modules grub_install_modules`"
 	$dry eval "`setcfg "$grubdata/module/$tree"`"
-	$dry chkvars grub_modules grub_install_modules
 	$dry x_ rm -f "$srcdir/grub.elf"; $dry \
 	"$srcdir/grub-mkstandalone" --grub-mkimage="$srcdir/grub-mkimage" \
 	    -O i386-coreboot -o "$srcdir/grub.elf" -d "${srcdir}/grub-core/" \

From 5284f20b9811a65120837ab60e3ce02ca6937c37 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 14:34:42 +0000
Subject: [PATCH 1012/1549] fix ./mk dependencies build issue

the bug was actually caused by chkvars

add an escape for the quotes and bam. fixed.

without this, i got the following e.g.

For command: ./mk dependencies debian

Output:

./mk: 1: [: apt-get: unexpected operator
ERROR ./mk: pkg_add unset

Someone reported a similar issue with the Arch one,
which is also now fixed. This regression was caused
by the previous commit:

commit 0cf58c22734b19293f4cbef83add59b031ca1773
Author: Leah Rowe <leah@libreboot.org>
Date:   Thu Jan 2 23:52:45 2025 +0000

    fix lbmk shellcheck errors

I forgot to escape the double quotes in an eval.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 8886cfc8..2b630797 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -41,7 +41,7 @@ chkvars()
 {
 	for var in "$@"; do
 		eval "[ -n "\${$var+x}" ] || \$err \"$var unset\""
-		eval "[ -n "\$$var" ] || \$err \"$var unset\""
+		eval "[ -n \"\$$var\" ] || \$err \"$var unset\""
 	done; return 0
 }
 

From ec6bcc1fba5fbdf8b19b3d1cf9711f3d4c9c3741 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 15:43:27 +0000
Subject: [PATCH 1013/1549] fix more unescaped quotes in eval

it should fix more build errors that might have appeared
in the aforementioned revision, mentioned in the previous
commit message

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build          | 2 +-
 include/lib.sh | 2 +-
 script/trees   | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/build b/build
index 2fab248b..05fa0445 100755
--- a/build
+++ b/build
@@ -25,7 +25,7 @@ main()
 
 	for g in "command -v git" "git config --global user.name" \
 	    "git config --global user.email" "git_init"; do
-		eval "$g 1>/dev/null 2>/dev/null || $err \"Unconfigured: $g\""
+		eval "\"$g\" 1>/dev/null 2>/dev/null || $err \"FAILED: $g\""
 	done
 
 	case "${spath#script/}" in
diff --git a/include/lib.sh b/include/lib.sh
index 2b630797..857857d2 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -40,7 +40,7 @@ setvars()
 chkvars()
 {
 	for var in "$@"; do
-		eval "[ -n "\${$var+x}" ] || \$err \"$var unset\""
+		eval "[ -n \"\${$var+x}\" ] || \$err \"$var unset\""
 		eval "[ -n \"\$$var\" ] || \$err \"$var unset\""
 	done; return 0
 }
diff --git a/script/trees b/script/trees
index e674282c..1ff94562 100755
--- a/script/trees
+++ b/script/trees
@@ -266,7 +266,7 @@ check_gnu_path()
 
 gnu_setver()
 {
-	eval "$2 --version 1>/dev/null 2>/dev/null || return 1"
+	eval "\"$2\" --version 1>/dev/null 2>/dev/null || return 1"
 	eval "$1ver=\"`"$2" --version 2>/dev/null | head -n1`\""
 	eval "$1ver=\"\${$1ver##* }\""
 	eval "$1full=\"\$$1ver\""

From a73b0fd910a249c60d25dce7ab289ab53a4a07df Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 15:56:41 +0000
Subject: [PATCH 1014/1549] Revert "fix more unescaped quotes in eval"

This reverts commit ec6bcc1fba5fbdf8b19b3d1cf9711f3d4c9c3741.
---
 build          | 2 +-
 include/lib.sh | 2 +-
 script/trees   | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/build b/build
index 05fa0445..2fab248b 100755
--- a/build
+++ b/build
@@ -25,7 +25,7 @@ main()
 
 	for g in "command -v git" "git config --global user.name" \
 	    "git config --global user.email" "git_init"; do
-		eval "\"$g\" 1>/dev/null 2>/dev/null || $err \"FAILED: $g\""
+		eval "$g 1>/dev/null 2>/dev/null || $err \"Unconfigured: $g\""
 	done
 
 	case "${spath#script/}" in
diff --git a/include/lib.sh b/include/lib.sh
index 857857d2..2b630797 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -40,7 +40,7 @@ setvars()
 chkvars()
 {
 	for var in "$@"; do
-		eval "[ -n \"\${$var+x}\" ] || \$err \"$var unset\""
+		eval "[ -n "\${$var+x}" ] || \$err \"$var unset\""
 		eval "[ -n \"\$$var\" ] || \$err \"$var unset\""
 	done; return 0
 }
diff --git a/script/trees b/script/trees
index 1ff94562..e674282c 100755
--- a/script/trees
+++ b/script/trees
@@ -266,7 +266,7 @@ check_gnu_path()
 
 gnu_setver()
 {
-	eval "\"$2\" --version 1>/dev/null 2>/dev/null || return 1"
+	eval "$2 --version 1>/dev/null 2>/dev/null || return 1"
 	eval "$1ver=\"`"$2" --version 2>/dev/null | head -n1`\""
 	eval "$1ver=\"\${$1ver##* }\""
 	eval "$1full=\"\$$1ver\""

From 432a1a5bca71dfc1b5e5f97240b84545fbe6d1fd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 16:00:11 +0000
Subject: [PATCH 1015/1549] lib.sh: Fix unescaped quotes in chkvars()

This should be the proper fix now

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 2b630797..857857d2 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -40,7 +40,7 @@ setvars()
 chkvars()
 {
 	for var in "$@"; do
-		eval "[ -n "\${$var+x}" ] || \$err \"$var unset\""
+		eval "[ -n \"\${$var+x}\" ] || \$err \"$var unset\""
 		eval "[ -n \"\$$var\" ] || \$err \"$var unset\""
 	done; return 0
 }

From 818f3d630c268742cf046523e24c7b000e06ec69 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 17:06:14 +0000
Subject: [PATCH 1016/1549] vendor.sh: Don't error if vcfg is unset

It should return 1 instead, in readcfg(), because this
is not an error condition; vcfg not being set means
that the board doesn't use vendor files, which is
perfectly normal and should not yield an error.

This fixes a build error under certain conditions,
found during release-build testing.

This bug was exposed when I fixed double quoting issues
as per shellcheck tests.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 15d4e5cb..7fc283b8 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -407,7 +407,9 @@ readcfg()
 	    [ "$board" = "serprog_pico" ]; then
 		return 1
 	fi; boarddir="$cbcfgsdir/$board"
-	eval "`setcfg "$boarddir/target.cfg"`"; chkvars vcfg tree
+	eval "`setcfg "$boarddir/target.cfg"`"
+	[ -z "$vcfg" ] && return 1
+	chkvars tree
 
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"

From 44b6df7c24cc0af6d12bec698408666dd8819df8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 18:09:03 +0000
Subject: [PATCH 1017/1549] update my copyright years on modified scripts

there are some lbmk scripts that i modified, starting
this year. update the headers.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build          | 2 +-
 include/git.sh | 2 +-
 script/trees   | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/build b/build
index 2fab248b..2e04f59f 100755
--- a/build
+++ b/build
@@ -1,6 +1,6 @@
 #!/usr/bin/env sh
 # SPDX-License-Identifier: GPL-3.0-or-later
-# Copyright (c) 2020-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2020-2025 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
 set -u -e
diff --git a/include/git.sh b/include/git.sh
index fb0b2b42..21a1f3b7 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
-# Copyright (c) 2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2020-2021,2023-2025 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
 eval "`setvars "" loc url bkup_url subfile subhash subrepo subrepo_bkup \
diff --git a/script/trees b/script/trees
index e674282c..045a49f7 100755
--- a/script/trees
+++ b/script/trees
@@ -2,7 +2,7 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 # Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
 # Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# Copyright (c) 2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org>
 
 set -u -e
 

From 8bd028ec15325c633c5066b5dfbbd2794d2abc3c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 3 Jan 2025 20:53:05 +0000
Subject: [PATCH 1018/1549] lib.sh: Set python after dependencies

otherwise, the user can't install python, which is
in the dependencies. an irony!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 857857d2..a9a292c2 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -15,16 +15,6 @@ tmpgit="$PWD/tmp/gitclone"
 grubdata="config/data/grub"
 err="err_"
 
-pyver="2"
-python="python3"
-command -v python3 1>/dev/null || python="python"
-command -v $python 1>/dev/null || pyver=""
-[ -n "$pyver" ] && pyver="$($python --version | awk '{print $2}')"
-if [ "${pyver%%.*}" != "3" ]; then
-	printf "Wrong python version, or python missing. Must be v 3.x.\n" 1>&2
-	exit 1
-fi
-
 err_()
 {
 	printf "ERROR %s: %s\n" "$0" "$1" 1>&2; exit 1
@@ -88,6 +78,16 @@ if [ $# -gt 0 ] && [ "$1" = "dependencies" ]; then
 	exit 0
 fi
 
+pyver="2"
+python="python3"
+command -v python3 1>/dev/null || python="python"
+command -v $python 1>/dev/null || pyver=""
+[ -n "$pyver" ] && pyver="$($python --version | awk '{print $2}')"
+if [ "${pyver%%.*}" != "3" ]; then
+	printf "Wrong python version, or python missing. Must be v 3.x.\n" 1>&2
+	exit 1
+fi
+
 id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
 [ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
 

From 4b51787d0781c59798cb6b636a61445b2ae5ea34 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Jan 2025 00:59:33 +0000
Subject: [PATCH 1019/1549] add less to arch dependencies

probably not actually needed, but it annoys me that it doesn't
come installed by default, and it's needed for certain git
operations

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/arch     | 2 +-
 config/dependencies/parabola | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/dependencies/arch b/config/dependencies/arch
index ff20ecd8..8278486b 100644
--- a/config/dependencies/arch
+++ b/config/dependencies/arch
@@ -6,7 +6,7 @@ acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
 autogen base-devel bison cmake curl device-mapper doxygen \
 dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \
 help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \
-ncurses openssl p7zip ccache \
+ncurses openssl p7zip ccache less \
 pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
 sharutils subversion swig texinfo ttf-dejavu unarchiver unzip wget xz zlib mtools \
 "
diff --git a/config/dependencies/parabola b/config/dependencies/parabola
index 9a4006a4..0a7ae49a 100644
--- a/config/dependencies/parabola
+++ b/config/dependencies/parabola
@@ -6,7 +6,7 @@ acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
 autogen base-devel bdf-unifont bison cmake curl device-mapper doxygen \
 dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \
 help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \
-ncurses openssl p7zip \
+ncurses openssl p7zip less \
 pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
 sharutils subversion swig texinfo ttf-dejavu unarchiver unifont-utils unzip \
 wget xz zlib ccache \

From ce16856a2421db6d9dd3b04b18f05e6fcc3886da Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Jan 2025 02:23:07 +0000
Subject: [PATCH 1020/1549] vendor.sh: Allow setmac if vendorfiles not needed

Observe the following prior patch:

commit 818f3d630c268742cf046523e24c7b000e06ec69
Author: Leah Rowe <leah@libreboot.org>
Date:   Fri Jan 3 17:06:14 2025 +0000

    vendor.sh: Don't error if vcfg is unset

Now:

This patch made vendor inject more robust, and speeds
up the processing of images where no vendor files are
needed, but it broke setmac on such tar archives.

This new patch works around it. For example, I was
able to run ./mk inject on an X200 tarball to change
the MAC address; no vendorfiles are inserted, because
it's not needed.

The further check for whether a board uses Intel GbE
still protects against accidental modification.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 7fc283b8..67625949 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -358,7 +358,7 @@ vendor_inject()
 
 	check_release "$archive" || \
 	    $err "You must run this script on a release archive. - $dontflash"
-	if readcfg; then
+	if readcfg || [ -n "$new_mac" ]; then
 		[ "$nukemode" = "nuke" ] || x_ ./mk download "$board"
 		patch_release_roms
 	else

From c858099b35904a0bf7c388047613e32237769e89 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Jan 2025 02:33:32 +0000
Subject: [PATCH 1021/1549] vendor.sh: Download utils even if vcfg unset

This is because the user may have specified setmac.

I tried without this change, on a fresh lbmk, setting
the MAC address on an X200 tarball, and it produced an
error that ifdtool was unavailable.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 67625949..08e0bfc3 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -406,10 +406,14 @@ readcfg()
 	    [ "$board" = "serprog_stm32" ] || \
 	    [ "$board" = "serprog_pico" ]; then
 		return 1
-	fi; boarddir="$cbcfgsdir/$board"
+	fi
+	boarddir="$cbcfgsdir/$board"
+
 	eval "`setcfg "$boarddir/target.cfg"`"
-	[ -z "$vcfg" ] && return 1
 	chkvars tree
+	x_ ./mk -d coreboot "$tree" # even if vendorfiles not used, see: setmac
+
+	[ -z "$vcfg" ] && return 1
 
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
@@ -418,9 +422,7 @@ readcfg()
 	kbc1126_ec_dump="$PWD/$cbdir/util/kbc1126/kbc1126_ec_dump"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 	ifdtool="elf/ifdtool/$tree/ifdtool"
-	[ -n "$IFD_platform" ] && ifdprefix="-p $IFD_platform"
-
-	x_ ./mk -d coreboot "$tree"
+	[ -n "$IFD_platform" ] && ifdprefix="-p $IFD_platform"; :
 }
 
 patch_release_roms()

From cf8ad497b4e5f13eb289c0d846e4e5b34b9e81e6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Jan 2025 02:36:50 +0000
Subject: [PATCH 1022/1549] vendor.sh: Remove unnecessary return

The message at the end that states a file was
not modified, is not currently printed when vendor
files are not needed, and setmac is not used.

This patch fixes that, so the user now sees a
confirmation of such change, or lack thereof.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 08e0bfc3..73293d6e 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -364,8 +364,6 @@ vendor_inject()
 	else
 		printf "Tarball '%s' (board '%s) doesn't need vendorfiles.\n" \
 		    "$archive" "$board"
-		err="$_olderr"
-		return 0
 	fi
 
 	xtype="patched" && [ "$nukemode" = "nuke" ] && xtype="nuked"

From b8e6d12f3d90e70b6d7a32cc8dc9d1eb8d96c26d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Jan 2025 14:21:24 +0000
Subject: [PATCH 1023/1549] add libx86 to arch dependencies

needed to compile the "int" tool defined
under config/git/

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/arch     | 2 +-
 config/dependencies/parabola | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/dependencies/arch b/config/dependencies/arch
index 8278486b..feb38d49 100644
--- a/config/dependencies/arch
+++ b/config/dependencies/arch
@@ -6,7 +6,7 @@ acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
 autogen base-devel bison cmake curl device-mapper doxygen \
 dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \
 help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \
-ncurses openssl p7zip ccache less \
+ncurses openssl p7zip ccache less libx86 \
 pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
 sharutils subversion swig texinfo ttf-dejavu unarchiver unzip wget xz zlib mtools \
 "
diff --git a/config/dependencies/parabola b/config/dependencies/parabola
index 0a7ae49a..eb7115f7 100644
--- a/config/dependencies/parabola
+++ b/config/dependencies/parabola
@@ -6,7 +6,7 @@ acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
 autogen base-devel bdf-unifont bison cmake curl device-mapper doxygen \
 dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \
 help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \
-ncurses openssl p7zip less \
+ncurses openssl p7zip less libx86 \
 pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
 sharutils subversion swig texinfo ttf-dejavu unarchiver unifont-utils unzip \
 wget xz zlib ccache \

From 68299ad05caa68ccf30a52bbb5de0c57a0aa1504 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Jan 2025 16:15:43 +0000
Subject: [PATCH 1024/1549] vendor.sh: much more verbose errors/confirmation

the user must be well-informed as to the next step, which
this script directly influences

guide the user accordingly

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 30 +++++++++++++++++++++---------
 1 file changed, 21 insertions(+), 9 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 73293d6e..f3195c75 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -33,7 +33,7 @@ eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref FSPFD_hash \
     _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch tmpromdir \
     IFD_platform ifdprefix cdir sdir _me _metmp mfs TBFW_url_bkup TBFW_url \
-    TBFW_hash TBFW_size hashfile xromsize xchanged EC_url_bkup $cv`"
+    TBFW_hash TBFW_size hashfile xromsize xchanged EC_url_bkup need_files $cv`"
 
 vendor_download()
 {
@@ -340,6 +340,7 @@ fail_inject()
 
 vendor_inject()
 {
+	need_files="n" # will be set to "y" if vendorfiles needed
 	_olderr="$err"
 	err="fail_inject"
 	remkdir "$tmpromdel"
@@ -358,22 +359,33 @@ vendor_inject()
 
 	check_release "$archive" || \
 	    $err "You must run this script on a release archive. - $dontflash"
-	if readcfg || [ -n "$new_mac" ]; then
+
+	readcfg && need_files="y"
+	if [ "$need_files" = "y" ] || [ -n "$new_mac" ]; then
 		[ "$nukemode" = "nuke" ] || x_ ./mk download "$board"
 		patch_release_roms
-	else
-		printf "Tarball '%s' (board '%s) doesn't need vendorfiles.\n" \
-		    "$archive" "$board"
 	fi
+	[ "$need_files" != "y" ] && printf \
+	    "\nTarball '%s' (board '%s) doesn't need vendorfiles.\n" \
+	    "$archive" "$board" 1>&2
 
 	xtype="patched" && [ "$nukemode" = "nuke" ] && xtype="nuked"
-	[ "$xchanged" = "y" ] || \
-		printf "\nRelease archive '%s' was not modified.\n" "$archive"
+	[ "$xchanged" != "y" ] && \
+		printf "\nRelease archive '%s' was *NOT* modified.\n" \
+		    "$archive" && [ "$has_hashes" = "y" ] && \
+		    printf "WARNING: '%s' contains file '%s'. DO NOT FLASH!" \
+		    "$archive" "$hashfile" 1>&2 && \
+		    printf "(vendorfiles may be needed and weren't inserted)" \
+		    1>&2
 	[ "$xchanged" = "y" ] && \
 		printf "\nRelease archive '%s' successfully %s.\n" \
-		    "$archive" "$xtype"
+		    "$archive" "$xtype" && [ "$nukemode" != "nuke" ] && \
+		printf "You may now extract '%s' and flash images from it.\n" \
+		    "$archive"
 	[ "$xchanged" = "y" ] && [ "$nukemode" = "nuke" ] && \
-		printf "!!!WARNING!!! -> Vendor files removed. DO NOT FLASH.\n"
+		printf "WARNING! Vendorfiles *removed*. DO NOT FLASH.\n" 1>&2 \
+		    && printf "DO NOT flash images from '%s'\n" \
+		    "$archive" 1>&2
 	err="$_olderr"
 	return 0
 }

From c762850311a53fe0a19cac9eeb3a21c321188cf0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Jan 2025 16:26:22 +0000
Subject: [PATCH 1025/1549] vendor.sh: prevent double-nuke

where the nuke command is used, we need the files to be
there; if they're not, it will try to nuke them, which will result
in an error in most cases, but there may be some cases where that
isn't true, for instance if only the Intel ME is needed; it'll be
writing zeroes over zeroes.

we want to only allow technically correct behaviour, because
technically correct is the best kind of correct.

it is theoretically possible that a double-nuke might affect
certain behaviours unpredictably. for example, if vendor.sh
later integrates another tool that works whereby the same command
inserts or nukes depending on a certain condition, but with the
same command, and where that command would return zero in both
cases.

this is a preventative bug fix, because it fixes an issue that
does not yet actually occur in practise.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/include/vendor.sh b/include/vendor.sh
index f3195c75..f7798edf 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -565,11 +565,23 @@ patch_rom()
 {
 	rom="$1"
 
+	# regarding ifs below:
+	# if a hash file exists, we only want to allow inject.
+	# if a hash file is missing, we only want to allow nuke.
+	# this logical rule prevents double-nuke and double-inject
+
+	# if injecting without a hash file
 	if [ "$has_hashes" != "y" ] && [ "$nukemode" != "nuke" ]; then
 		printf "inject: '%s' has no hash file. Skipping.\n" \
 		    "$archive" 1>&2
 		return 1
 	fi
+	# nuking *with* a hash file, i.e. nuking what was nuked before
+	if [ "$has_hashes" = "y" ] && [ "$nukemode" = "nuke" ]; then
+		printf "inject nuke: '%s' has a hash file. Skipping nuke." \
+		    "$archive" 1>&2
+		return 1
+	fi
 
 	[ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && inject "fallback/refcode" \
 	    "$CONFIG_REFCODE_BLOB_FILE" "stage"

From bc2c14e76a8a39f4cceb2a45c0b3c4bc46f1ad70 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Jan 2025 16:30:23 +0000
Subject: [PATCH 1026/1549] add line break

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index f7798edf..242175e8 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -570,7 +570,8 @@ patch_rom()
 	# if a hash file is missing, we only want to allow nuke.
 	# this logical rule prevents double-nuke and double-inject
 
-	# if injecting without a hash file
+	# if injecting without a hash file i.e. inject what was injected
+	# (or inject where no vendor files are needed, covered previously)
 	if [ "$has_hashes" != "y" ] && [ "$nukemode" != "nuke" ]; then
 		printf "inject: '%s' has no hash file. Skipping.\n" \
 		    "$archive" 1>&2
@@ -578,7 +579,7 @@ patch_rom()
 	fi
 	# nuking *with* a hash file, i.e. nuking what was nuked before
 	if [ "$has_hashes" = "y" ] && [ "$nukemode" = "nuke" ]; then
-		printf "inject nuke: '%s' has a hash file. Skipping nuke." \
+		printf "inject nuke: '%s' has a hash file. Skipping nuke.\n" \
 		    "$archive" 1>&2
 		return 1
 	fi

From 8ce1a00f517dee3dbbd0019c58865dd2c2cc8dc2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Jan 2025 16:32:13 +0000
Subject: [PATCH 1027/1549] add line break, part 2

because printf

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 242175e8..36ba68b0 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -375,7 +375,7 @@ vendor_inject()
 		    "$archive" && [ "$has_hashes" = "y" ] && \
 		    printf "WARNING: '%s' contains file '%s'. DO NOT FLASH!" \
 		    "$archive" "$hashfile" 1>&2 && \
-		    printf "(vendorfiles may be needed and weren't inserted)" \
+		    printf "(vendorfiles may be needed and aren't there)\n" \
 		    1>&2
 	[ "$xchanged" = "y" ] && \
 		printf "\nRelease archive '%s' successfully %s.\n" \

From 8819a93d89bbb2aa7136b22d1b71a04a2dc28cc8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Jan 2025 16:33:18 +0000
Subject: [PATCH 1028/1549] add line break, part 3

forgot a line break, three times in a rowe

you got a problem with that?

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 36ba68b0..93acf64d 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -373,7 +373,7 @@ vendor_inject()
 	[ "$xchanged" != "y" ] && \
 		printf "\nRelease archive '%s' was *NOT* modified.\n" \
 		    "$archive" && [ "$has_hashes" = "y" ] && \
-		    printf "WARNING: '%s' contains file '%s'. DO NOT FLASH!" \
+		    printf "WARNING: '%s' contains '%s'. DO NOT FLASH!\n" \
 		    "$archive" "$hashfile" 1>&2 && \
 		    printf "(vendorfiles may be needed and aren't there)\n" \
 		    1>&2

From fc4ee88e167c8a8a537a57e7d44f643ffff19385 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Jan 2025 19:24:53 +0000
Subject: [PATCH 1029/1549] vendor.sh: error out if nuking failed

We already have code to handle this, but it's possible
that I might break it in the future, due to the complex
logic of this script.

So, I've implemented this catch-all check at the end of
the process. It still relies on the actual setting of
the variables, upon which this check is based, to be set
correctly.

This condition will most certainly never be met, unless
I break some other part of the code in the future. That
is precisely what this overly pedantic check is for.

Example scenarios:

I forget to set xchanged=y, on a new modification.

I set has_hashes erroneously.

The variables are re-used between runs, and not properly
reset; at present, a given run of ./mk inject only
operates on a single target, but this latter fact could
change in the future.

need_files is set erroneously; vendorfiles detected as
being required, when they aren't.

These are just a few examples. As such, this is a preventative
bug fix, because it's preventing a bug.

The main reason I want this i n here is because I need to ensure
that vendor files are properly deleted, for a given release.
If I accidentally includes ones that I'm not supposed to,
inside ROM images, that could be a big problem.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/include/vendor.sh b/include/vendor.sh
index 93acf64d..cefed456 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -386,6 +386,23 @@ vendor_inject()
 		printf "WARNING! Vendorfiles *removed*. DO NOT FLASH.\n" 1>&2 \
 		    && printf "DO NOT flash images from '%s'\n" \
 		    "$archive" 1>&2
+
+	#
+	# catch-all error handler, for libreboot release opsec:
+	#
+	# if vendor files defined, and a hash file was missing, that means
+	# a nuke must succeed, if specified. if no hashfile was present,
+	# that means vendorfiles had been injected, so a nuke must succeed.
+	# this check is here in case of future bugs in lbmk's handling
+	# of vendorfile deletions on release archives, which absolutely
+	# must always be 100% reliable, so paranoia is paramount:
+	#
+	if [ "$xchanged" != "y" ] && [ "$need_files" = "y" ] && \
+	    [ "$nukemode" = "nuke" ] && [ "$has_hashes" != "y" ]; then
+		printf "FAILED NUKE: tarball '$archive', board '$board'\n" 1>&2
+		$err "Unhandled vendorfile deletion: DO NOT RELEASE TO RSYNC"
+	fi # of course, we assume that those variables are also set right
+
 	err="$_olderr"
 	return 0
 }

From 4d5caf1dcfc974e097a1fbe2d9265e612b0566d8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 4 Jan 2025 19:32:39 +0000
Subject: [PATCH 1030/1549] vendor.sh: check that the vcfg file exists

setcfg already checks it, but it's good to check anyway

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index cefed456..f83bf290 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -33,7 +33,8 @@ eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref FSPFD_hash \
     _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch tmpromdir \
     IFD_platform ifdprefix cdir sdir _me _metmp mfs TBFW_url_bkup TBFW_url \
-    TBFW_hash TBFW_size hashfile xromsize xchanged EC_url_bkup need_files $cv`"
+    TBFW_hash TBFW_size hashfile xromsize xchanged EC_url_bkup need_files \
+    vfile $cv`"
 
 vendor_download()
 {
@@ -65,7 +66,7 @@ readkconfig()
 	    CONFIG_LENOVO_TBFW_BIN CONFIG_FSP_M_FILE CONFIG_FSP_S_FILE; do
 		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
 		eval "[ -z \"\${$c}\" ] && continue"
-		eval "`setcfg "config/vendor/$vcfg/pkg.cfg"`"; return 0
+		eval "`setcfg "$vfile"`"; return 0
 	done
 	printf "Vendor files not needed for: %s\n" "$board" 1>&2; return 1
 }
@@ -441,6 +442,9 @@ readcfg()
 	x_ ./mk -d coreboot "$tree" # even if vendorfiles not used, see: setmac
 
 	[ -z "$vcfg" ] && return 1
+	vfile="config/vendor/$vcfg/pkg.cfg"
+	[ -L "$vfile" ] && $err "'$archive', '$board': $vfile is a symlink"
+	[ -f "$vfile" ] || $err "'$archive', '$board': $vfile doesn't exist"
 
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"

From 0ceaa01d45dc0f1556247440c0ce31b13aed942b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Jan 2025 07:31:14 +0000
Subject: [PATCH 1031/1549] vendor.sh: add clarification to nogbe warning

if the user ran this on an x60 tarball, the no-gbe
warning seems confusing since that one has intel gbe,
but pre-ifd, so no gbe region in the flash; on pre-ifd
systems e.g. ich7 southbridge, the mac address was baked
into a separate gbe nvm on mask rom, inaccessible to users

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/vendor.sh b/include/vendor.sh
index f83bf290..525d04ad 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -512,6 +512,8 @@ patch_release_roms()
 			    1>&2
 			printf "This board probably lacks Intel ethernet.\n" \
 			    1>&2
+			printf "(or it's pre-IFD Intel with Intel GbE NIC)\n" \
+			    1>&2
 		fi
 	fi
 

From ab8feff92e06d872259014220bbe0a2a5a12dede Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Jan 2025 07:48:50 +0000
Subject: [PATCH 1032/1549] vendor.sh: set random MAC address *by default*

MAC addresses are generic, inside Libreboot images where
an Intel GbE region is specified.

We commonly get users flashing multiple systems for their
own use, and sometimes they complain that they networking
broke, because they don't know that the MAC address is
identical on each machine.

This still doesn't work around the case where the same machine
is used, e.g. multiple T440p thinkpads, but if they have one
of each model, it can work nicely, because we do in fact
change it for various platforms.

This change will also reduce the number of people at conferences
in the future, where there are multiple Libreboot users, having
MAC address conflicts.

Changing the MAC address is a good practise, so we enforce good
practise. The user can still retain the old behaviour by
using this command:

./mk inject libreboot-YYYYMMDD_boardname.tar.xz setmac keep

The "keep" argument clears new_mac, which will then skip
changing the MAC address. They can also still set an arbitrary
MAC address as an argument for setmac, e.g.:

./mk inject libreboot-YYYYMMDD_boardname.tar.xz setmac 00:de:ad:c0:ff:ee

This change will be covered in the documentation.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 25 ++++++++++++++++++++++---
 1 file changed, 22 insertions(+), 3 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 525d04ad..b7a54caf 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -349,15 +349,34 @@ vendor_inject()
 	set +u +e; [ $# -lt 1 ] && $err "No options specified. - $dontflash"
 	eval "`setvars "" nukemode new_mac xchanged`"
 
+	# randomise the MAC address by default
+	# TODO: support setting CBFS MAC address for GA-G41M-ES2L
+	new_mac="??:??:??:??:??:??"
+
 	archive="$1";
 	[ $# -gt 1 ] && case "$2" in
-	nuke) nukemode="nuke" ;;
+	nuke)
+		new_mac=""
+		nukemode="nuke" ;;
 	setmac)
-		new_mac="??:??:??:??:??:??"
-		[ $# -gt 2 ] && new_mac="$3" ;;
+		[ $# -gt 2 ] && new_mac="$3" && \
+		    [ -z "$new_mac" ] && $err \
+		    "You set an empty MAC address string" ;;
 	*) $err "Unrecognised inject mode: '$2'"
 	esac
 
+	# allow the user to skip setting MAC addresses.
+	# if new_mac is empty, this script skips running nvmutil
+	[ "$new_mac" = "keep" ] && new_mac=""
+
+	# we don't allow the *user* to clear new_mac, in the setmac
+	# command, in case the build system is being integrated with
+	# another, where setmac is relied upon and is being set
+	# explicitly. this is a preventative error handle, as a courtes
+	# to that hypothetical user e.g. Linux distro package maintainer
+	# integrating this build system into their distro. if they used
+	# a variable for that, and they forgot to initialise it, they'll know.
+
 	check_release "$archive" || \
 	    $err "You must run this script on a release archive. - $dontflash"
 

From 13b06ae130fe7b507849606d1414036d8b33d154 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Jan 2025 08:13:28 +0000
Subject: [PATCH 1033/1549] vendor.sh: Allow restoring the default GbE file

./mk inject libreboot-YYYYMMDD_board.tar.xz setmac restore

This does the same thing as a normal setmac command, except
that it does not alter the MAC address; it is also not the
same as "keep", which skips *writing* the GbE region in-ROM.

The *restore* argument writes the default, unmodified GbE file
kept by lbmk, unmodified because nvmutil is skipped when the
user specifies this argument.

This option is useful for debugging purposes, because it can
be used to verify whether anything else is being wrongly
modified by the script; the "nuke" command can be executed
afterward, and the hash file inspected versus release.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index b7a54caf..b5feb8b0 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -380,6 +380,9 @@ vendor_inject()
 	check_release "$archive" || \
 	    $err "You must run this script on a release archive. - $dontflash"
 
+	[ "$new_mac" = "restore" ] && \
+	    printf "Restoring default GbE for '$archive', board '$board'\n"
+
 	readcfg && need_files="y"
 	if [ "$need_files" = "y" ] || [ -n "$new_mac" ]; then
 		[ "$nukemode" = "nuke" ] || x_ ./mk download "$board"
@@ -714,7 +717,9 @@ modify_mac_addresses()
 	[ -n "$CONFIG_GBE_BIN_PATH" ] || return 1
 	e "${CONFIG_GBE_BIN_PATH##*../}" f n && $err "missing gbe file"
 
-	x_ make -C util/nvmutil
+	[ "$new_mac" != "restore" ] && \
+	    x_ make -C util/nvmutil
+
 	x_ mkdir -p tmp
 	[ -L "tmp/gbe" ] && $err "tmp/gbe exists but is a symlink"
 	[ -d "tmp/gbe" ] && $err "tmp/gbe exists but is a directory"
@@ -723,7 +728,8 @@ modify_mac_addresses()
 	fi
 	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "tmp/gbe"
 
-	x_ "util/nvmutil/nvm" "tmp/gbe" setmac "$new_mac"
+	[ "$new_mac" != "restore" ] && \
+	    x_ "util/nvmutil/nvm" "tmp/gbe" setmac "$new_mac"
 
 	find "$tmpromdir" -maxdepth 1 -type f -name "*.rom" > "tmp/rom.list" \
 	    || $err "'$archive' -> Can't make tmp/rom.list - $dontflash"
@@ -738,4 +744,9 @@ modify_mac_addresses()
 	printf "\nThe following GbE NVM words were written in '%s':\n" \
 	    "$archive"
 	x_ util/nvmutil/nvm tmp/gbe dump
+
+	[ "$new_mac" = "restore" ] && \
+	    printf "\nNOTE: User specified setmac 'restore' argument.\n" && \
+	    printf "Default GbE file '%s' written without running nvmutil.\n" \
+	    "${CONFIG_GBE_BIN_PATH##*../}"; :
 }

From 63f4578263897ddca3f1ce43db7c20a49a0c0c0c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Jan 2025 08:20:53 +0000
Subject: [PATCH 1034/1549] vendor.sh: Confirm if need_files=n

Users running setmac on an X200 tarball for example, will
now see it being modified, if they didn't specify
setmac keep, so they might think vendor files are being
inserted, which they are not.

Therefore, a confirmation is provided at the end of the output.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/include/vendor.sh b/include/vendor.sh
index b5feb8b0..53203724 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -410,6 +410,10 @@ vendor_inject()
 		    && printf "DO NOT flash images from '%s'\n" \
 		    "$archive" 1>&2
 
+	[ "$need_files" = "n" ] && printf \
+	    "Board '%s' doesn't use vendorfiles, so none were inserted.\n" \
+	    "$board"
+
 	#
 	# catch-all error handler, for libreboot release opsec:
 	#

From e8336bcc3caaa7c3dad1d8e2324ba8977bf5aadb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Jan 2025 08:56:23 +0000
Subject: [PATCH 1035/1549] vendor.sh: Proper semantics on prefix file names

They may not actually always be binary blobs, at least not
software. I started referring to these as "vendor files" some
time ago, for this reason.

With this terminology, it applies properly to any sort of file
from the vendor. For example, it may be that in the future, we
start inserting the MFS section of an an Intel ME image, into
the Intel ME.

We already do that with deguard for example (set MFS config),
on MEv11 based setup. That is a vendor *file*, and though it
may still actually be a binary blob, it's not software, but
configuration.

The term "blob" normally means compiled software, in most people's
minds, but the term blob is technically accurate for any blob,
not just software; however, we have to keep people's perception
in mind.

Whereas, "vendor file" is also understood by most people to
include code supplied by the vendor.

We haven't done any releases yet with this ROM image file name
prefix, so it's perfectly OK to handle it now, without handling
the old one for backwards compatibility.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 53203724..bde245d9 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -12,7 +12,7 @@ appdir="$vendir/app"
 cbcfgsdir="config/coreboot"
 hashfiles="vendorhashes blobhashes" # blobhashes for backwards compatibility
 dontflash="!!! AN ERROR OCCURED! Please DO NOT flash if injection failed. !!!"
-vfix="DO_NOT_FLASH_YET._FIRST,_INJECT_BLOBS_VIA_INSTRUCTIONS_ON_LIBREBOOT.ORG_"
+vfix="DO_NOT_FLASH_YET._FIRST,_INJECT_FILES_VIA_INSTRUCTIONS_ON_LIBREBOOT.ORG_"
 vguide="https://libreboot.org/docs/install/ivy_has_common.html"
 tmpromdel="$PWD/tmp/DO_NOT_FLASH"
 

From 411fb697dfce1733c7c572205e3bdddd005d8c08 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Jan 2025 21:48:45 +0000
Subject: [PATCH 1036/1549] set up python in PATH, ensuring that it is python3

we already check the python version, and set a variable
for it, so that we can reliably use python3, even if
python in PATH doesn't correspond to python3. for
example if a system has python as python2 and python3
as python3

well, we use that when running deguard for example, but
various upstream projects that we use may need python,
and all of them use python3, not 2

so, re-use the python variable set up by lbmk, and
set it up in PATH accordingly. this now makes the note
about python3 obsolete, on docs/build.md in lbwww.git

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 17 +++++++++++++----
 script/trees   |  8 ++++----
 2 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index a9a292c2..894a2cac 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -107,10 +107,19 @@ if [ -z "${TMPDIR+x}" ]; then
 	export TMPDIR="/tmp"
 	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
 	touch lock || $err "cannot create 'lock' file"
-	rm -Rf "$XBMK_CACHE/xbmkpath" || $err "cannot remove xbmkpath"
-	mkdir -p "$XBMK_CACHE/xbmkpath" || $err "cannot create xbmkpath"
-	export PATH="$XBMK_CACHE/xbmkpath:$PATH" || \
-	    $err "Can't create xbmkpath"
+	rm -Rf "$XBMK_CACHE/xbmkpath" "$XBMK_CACHE/gnupath" || \
+	    $err "cannot remove xbmkpath"
+	mkdir -p "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath" || \
+	    $err "cannot create gnupath"
+	export PATH="$XBMK_CACHE/xbmkpath:$XBMK_CACHE/gnupath:$PATH" || \
+	    $err "Can't create gnupath/xbmkpath"
+	(
+	# set up python v3.x in PATH, in case it's not set up correctly.
+	# see code above that detected the correct python3 command.
+	cd "$XBMK_CACHE/xbmkpath" || $err "can't cd $XBMK_CACHE/xbmkpath"
+	ln -s "`command -v "$python"`" python || \
+	    $err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"
+	) || $err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"
 	xbmk_parent="y"
 fi
 
diff --git a/script/trees b/script/trees
index 045a49f7..43cd39cc 100755
--- a/script/trees
+++ b/script/trees
@@ -217,8 +217,8 @@ check_cross_compiler()
 		    $err "!mkxgcc $project/$xtree '$xfix' '$xgccargs'"
 
 		# we only want to mess with hostcc to build xgcc
-		rm -f "$XBMK_CACHE/xbmkpath/"* || \
-		    $err "Cannot clear xbmkpath/"; :
+		rm -f "$XBMK_CACHE/gnupath/"* || \
+		    $err "Cannot clear gnupath/"; :
 	done; return 0
 }
 
@@ -255,8 +255,8 @@ check_gnu_path()
 	[ "$gnatfull" = "$gccfull" ] || return 1
 
 	(
-	rm -f "$XBMK_CACHE/xbmkpath/"* || $err "Cannot clear xbmkpath/"
-	cd "$XBMK_CACHE/xbmkpath" || $err "Can't cd to xbmkpath/"
+	rm -f "$XBMK_CACHE/gnupath/"* || $err "Cannot clear gnupath/"
+	cd "$XBMK_CACHE/gnupath" || $err "Can't cd to gnupath/"
 	for _gnubin in "$_gnudir/$2"*"-$_gnuver"; do
 		[ -e "$_gnubin" ] || continue; _gnuutil="${_gnubin##*/}"
 		x_ ln -s "$_gnubin" "${_gnuutil%"-$_gnuver"}"

From 8c7ba6131cc0bd5fb31bbe80ec5f526f3c9b6843 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Jan 2025 23:54:39 +0000
Subject: [PATCH 1037/1549] coreboot/next uprev: Fix T480 backlight keys

Backlight controls already worked on the T480/T480s, if you
used software-based controls e.g. set a hotkey for
xbacklight, but the actual Fn buttons on the keyboard did
not function at all; this patch fixes that issue

This also fixes LEDs on T480, on warm reboot, which are
otherwise off. It sets them back to the state they were
at on cold boot.

Both fixes are from Mate Kukri in the new T480 patchset.
In addition to these fixes, Mate made several code quality
improvements as part of efforts to upstream this code into
coreboot's main branch.

Updated coreboot T480 patchset to patchset 25. This change
will be reflected next in a modification to the Libreboot
documentation.

I had to make several other fixes on top of this; see diff.
A debug option was being enabled relating to stack overflow
detection, which we ought to avoid to mitigate over-zealous
build errors and stack corruption at boot; an errant option
for an EC we don't use was also being enabled, by some code
in coreboot relating to a Dasharo board; both issues have
been mitigated in this lbmk patch, by patching the upstream
coreboot build system in this patch.

As part of this change, the coreboot/next tree within lbmk
has been updated. Existing patches have been rebased.

This brings in the following changes from upstream, relative
to the previous revision used on coreboot/next:

* 2f1e4e5e85 mb/hp/snb_ivb_desktops/z220*: Remove leftover old usb configurations
* 9e859154ea mb/hp/snb_ivb_desktops: Remove unused includes
* 70b33cb38d ec/google/chromeec/acpi: Add support for generic LPC memory range
* f2ad73b5d1 mb/google/rauru: Raise little core CPU frequency from 700MHz to 2.4GHz
* 044017b4cd mb/google/rauru: Initialize PMICs in romstage
* 397c3e3c52 mb/google/fatcat/var/fatcat: Add touchpad wake source
* e18f0f53cb mb/google/fatcat/var/fatcat: Change touchpad interrupt to edge trigger
* a8b4ee246d mb/google/nissa/var/rull: Configure Acoustic noise mitigation
* c09fd09edf tree: Use "true", "false" for has_power_resource
* 1e64875265 mb/google/fatcat: Remove unused <stdio.h>
* f316ab6796 mb/google/fatcat/var/francka: Fix early pad configuration for TPM
* 6ca2c3c415 soc/mediatek/mt8196: Fix indentation in Makefile.mk
* 94c1307fdb soc/mediatek/mt8196: Add dynamic power-saving for peripheral clocks
* 67b140a949 tree: Use "true", "false" for fine_grained_control
* 97923aebe1 mb/prodrive/atlas: Add initial support for options
* 1a16146795 Fix up CFR's open issues
* 7e8d8cdea2 mb/google/rauru: Initialize SPM
* 3153432b83 soc/intel/alderlake: Add function to force disable memory channels
* 8ea2b0ab46 mb/google/fatcat/var/francka: Use RAM ID 2 for MT62F2G32D4DS-020 WT:F
* 5f600a8ee9 mb/google/fatcat: Limit Power Limit when battery is missing
* 5213646241 ec/google/chromeec: Add function to detect barrel charger
* 5ef70e5f22 ec/google/chromeec: Add API to check if battery is critically low
* 42fd35b486 ec/google/chromeec: Add API to check if charger is present
* 56370d0283 ec/google/chromeec: Add API to check if a USB PD charger is attached
* 001e7a0b45 soc/mediatek/mt8196: Add MT6685 Clock IC driver
* 5852841ca7 soc/intel/meteorlake: Use ASPM helpers from Alder Lake
* b04f057efd mb/google/rex/var/kanix: Add Synaptics touchpad
* af0c2e7a2e mb/prodrive/atlas: Remove the workaround for CLKREQ pins
* 13316c644b mb/google/fatcat/var/fatcat: Modify interrupt GPIO for LPSS I2C touchpad
* 825e9173b4 soc/mediatek: Distinguish pmic_init_setting function name
* d65ff8492c soc/intel/xeon_sp/spr/acpi: Fix regression
* 291778a1bd mb/google/corsola: Add new board variant Wyrdeer
* 745dcc861d mb/google/corsola: Refactor mipi_panel_power_on function
* 79f60c6b22 mb/google/nissa/var/telith: Disable stylus function
* d7934bdd53 Doc/soc/amd/family15h: Fix URLs to AMD documents
* 3cb7db4075 soc/mediatek/mt8196: Add PMIC MT6316 driver
* 60bce10750 drivers/mipi: Add support for KD_KD110N11_51IE panel
* d4c80054a4 soc/mediatek/mt8189: Enable timer compensation v2.5
* 403846f177 soc/mediatek/mt8196: Define MFGPLL_*_BASE using MFGSYS_BASE
* b3edaa7b10 mb/google/rauru: Implement SKU ID
* b470b48718 mb/google/rauru: Add support for getting storage id
* 24a5048948 mb/google/nissa/var/pujjo: Add new supported memory part
* c6e27c5fbf mb/google/nissa/var/rull: Add G2 touchscreen to devicetree
* 639def1d84 mb/google/fatcat/var/fatcat: Enable FPS
* acb8c870b2 mb/google/fatcat: Suppress unnecessary extra space in device trees
* d79ba5565d mb/google/nissa/var/telith: Modify PLD for typeC and typeA
* 620d2fab06 soc/mediatek/mt8189: Replace SPDX identifiers to GPL-2.0-only OR MIT
* d90b1322ab commonlib: Refactor CSE sync eventLog
* 4ef6c13b38 mb/google/brya: Adjust EC memory map range to support indexed IO
* 1e90bbadfa ec/google/chromeec: Add indexed IO support
* a8ab708584 mb/google/nissa/var/quandiso2: Create a quandiso2 variant
* 78f610a0ae util/docker/doc.coreboot.org: Allow git to work in envs owned by root
* 38ee22f6da util/docker/doc.coreboot.org: Use Alpine minor instead of point releases
* 0196c3b6a4 util/docker/doc.coreboot.org: Get rid of bash workarounds
* 897b46693b util/docker/doc.coreboot.org: Don't create volumes
* a0c45cbf1f 3rdparty/fsp: Update submodule to upstream master
* aa562d2881 soc/mediatek/mt8189: Add GPIO driver
* 40a863cd60 soc/mediatek/mt8189: Initialize watchdog
* 1380ed0cd2 soc/mediatek: Add support for MediaTek firmware support package
* 4f92943c89 soc/mediatek/common: Rename GPT_MHZ to TIMER_MHZ for readability
* 5a73692e0c soc/mediatek/mt8196: Add SPM loader
* 306660c2de util/crossgcc: Update CMake from 3.30.2 to 3.31.3
* f3adc74e44 mb/google/fatcat: Keep GSPIx interface default PCI
* 809e704101 soc/intel/pantherlake: Rename GSPI2 to GSPI0A
* 222ef676f9 soc/intel/pantherlake: Add ACPI name for GSPI2
* 1fda7027c0 util/crossgcc: Update ACPICA from 20230628 to 20241212
* e35175bb38 Update vboot submodule to upstream main
* 9eb4c5aff8 util/ifdtool: Fix memory leaks
* 87ae3573b5 mb/starlabs/starlite_adl: Configure GPIO interrupt for Virtual Button
* eaf87422b1 ec/starlabs/merlin: Add Intel Virtual Button Driver for Tablet Mode
* a1532790b9 docs: Add 24.12 release notes
* 8c0df740c7 mb/google/nissa/var/gothrax: Add probe and GPIO config for HDMI and  touchpanel
* f6fcff5511 docs/security/vboot: Update supported boards
* 0dba17da0c mb/google/brya/uldrenite: Add WWAN RW350R-GL power on sequence
* 2c4af7cd29 mb/topton/adl: Enable TPM2 (Intel fTPM/PTT)
* c11558d4c7 mb/asus/p8z77-m: Drop GPIO by I/O
* 4f1a1adef6 mb/topton/adl: Disable mapped SATA port
* 81cbe11361 mb/asus/p8z77-m: Revert SIO IRQ settings carried from OEM
* 9578c67c77 mb/google/brox: Include CSE reset in mainboard reset expectation
* 5af5e66686 util/cbfstool: eliminate late sign of life event
* 0797c40d52 src/soc/intel/cmn/blk/cse: Log cse sync information
* 9a15a1ed21 soc/intel: Log CSE Sync Early Sign of Life event from a better place
* c812c78618 mb/trulo/var/uldrenite: Support USB_OC on the A0 port
* ee1a766f05 mb/trulo/var/uldrenite: Set GPP_B5 and B6 to ISH function
* 87c9d93a62 mb/google/skywalker: Add MediaTek MT8189 reference board
* 6bd51ce42a soc/mediatek/mt8189: Add a stub implementation of MT8189 SoC
* ea646c0514 mb/google/rauru: Add pwrsel init in romstage
* c3265da005 soc/mediatek/mt8196: Add pwrsel driver
* 30d8e1880a ec/google/chromeec: Publish LPC GMR address range via CREC _CRS
* bb85775d92 soc/intel/cmn/acpi: Add ACPI method to get LGMR address
* 84347d0b45 payloads/Linuxboot: Fix u-root build
* 7bcec7a2ef payloads/LinuxBoot: Build x86_64 with host toolchain
* e3150e819d util/crossgcc: Add libstdcxx target
* 61385c4976 soc/mediatek/common: Move SPM_SYSTEM_BASE_OFFSET to soc folders
* 6625dee027 soc/mediatek/common: Use array to represent spm_sw_rsv registers
* cd8d6861f6 soc/mediatek/common: Move some functions to spm_v1.c
* 91fe658714 drivers/option: Add forms in cbtables
* 4d4776f320 mb/emulation/qemu-sbsa: Configure flash region for MMU
* dfef1895f2 mainboard: Add MiTAC Computing Whitestone-2 (LGA-4677)
* caf8f9f60f mb/google/brya/var/uldrenite: Enable PMC, HECI and SRAM devices
* b668c756bf mb/trulo/var/uldrenite: Configure audio (max9360a, rt5682)
* 941f994809 mb/trulo/var/uldrenite: Configure Network
* 600e7810fb mb/trulo/var/uldrenite: Configure USB ports and mapping
* 0261cbe8e9 mb/trulo/var/uldrenite: Configure serial_io and I2C
* 113205bcd1 mb/trulo/var/uldrenite: Enable eMMC and DLL tuning parameters
* 0dd227f9c1 mb/trulo/var/uldrenite: Enable DPTF, S0ix and configure FIVR setting
* 0ce153c8df mb/google/nissa/var/rull: For probe, change unprovisioned to unknown
* b57308f437 mb/google/rauru: Add SD card configurations
* e969a3df87 soc/mediatek/mt8196: Add SD card configurations
* 8be835ce3c soc/mediatek/mt8196: Add tracker driver
* 78560f9958 soc/mediatek/mt8196: Add MMinfra driver support
* 0b252ef8b4 util/mtkheader: Add GFH header for mt8189 bootblock code
* 540eb5ba73 cpu/qemu: Enable IDT_IN_EVERY_STAGE
* f9d6fd4e0f soc/intel/xeon_sp: Enable IDT_IN_EVERY_STAGE
* c3dee9eaba cpu/intel/car/romstage: Fix false-positive stack corruption
* b659fb5cea mb/ocp/tiogapass: Wait for BMC
* 7c0556244d drivers/wifi: Update Drive Strength BRI Rsp Table revision
* 70bdd2e1fa cpu/x86/topology: Simplify CPU topology initialization
* 3a2ffba231 soc/intel/xeon_sp: Introduce early_pch_init
* 48ed4b0f85 soc/intel/xeon_sp/lbg: Add support to hide HDA
* a857c81122 arch/x86: Disable DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
* 45dabe846d mb/google/brox: Apply ISH_FW_VERSION in Kconfig
* e0b1a0dbec vc/intel/fsp/mtl: Update MTL fsp header files from 3471_91 to 4122_21
* c20fd2fc3f 3rdparty/fsp: Update submodule to upstream master
* e5b5fc345a soc/intel/xeon_sp: Improve PCI INTx IRQ routing for Gen6
* 673075f102 util/cbfstool: Add eventLog support for ELOG_TYPE_FW_CSE_SYNC
* 3235b7c6d5 commonlib: Add ELOG_TYPE_FW_CSE_SYNC eventLog type
* 4a0c49e671 soc/intel/pantherlake: Keep image clock configuration enable
* 51cc2bacb6 soc/intel/pantherlake: Disable stack overflow debug options
* eeb6f67eec Docs: Convert bare URLs into hyperlinks
* 2609519704 mb/google/rauru: Implement regulator interface
* 8c6426c1b4 soc/mediatek/mt8196: Add PMIC MT6373 driver
* bda5b83661 mb/google/brya/var/uldrenite: update gpio settings
* afb11d05b9 mb/google/trulo/var/uldrenite: Add memory config
* 46df9e1d38 mb/google/brya/var/marasov: Enable GPP_F9 GPIO for early panel power-on
* 04d33b90ec mb/google/fatcat: config GPP_F23 as ISH gpio pin
* 16ab83b34a soc/mediatek/mt8196: Initialize SSPM
* b793209b80 mb/google/brox/var/jubilant: Disable Tccold Handshake
* 2f1e67bbc7 mb/google/nissa/var/glassway: Modify touch screen ILIT2901 sequence
* a1c50f233d soc/mediatek/mt8196: Add PMIC MT6363 ADC driver
* 8910b6ba7d soc/mediatek/mt8196: Add PMIC MT6363 driver
* c215889442 soc/mediatek/mt8196: Add PMIF and PMIC driver support
* 27fa0595de soc/mediatek/mt8196: Add mtcmos init support
* 61a00269a2 mb/amb/birman*/gpio: remove configuration for VDD_MEM_VID[0,1]
* 38b59164ca ec/google/chromeec: Define ACPI_NOTIFY_CROS_EC_MKBP constant
* 50c9747d87 drivers/usb/intel_bluetooth: Add GBTR Method
* 0bb4a220a8 soc/intel/common/cnvi: Fix GBTE path in comment
* d33244c3af drivers/usb/intel_bluetooth: Relocate BTRK to \_SB.PCI0
* 04b9627e07 drivers/usb/intel_bluetooth: Fix GBTE to return Local0
* c3f9dd3af3 drivers/usb/intel_bluetooth: Change the Power Resource to S0
* 1cf8d84f3b mb/google/nissa/var/rull: Add 6W and 15W DPTF parameters
* 62a9d670bf mb/google/brya/var/uldrenite: Add HDA verb tables
* 56278eeed8 mb/google/rex/var/kanix: Enable/Disable PCIE WLAN based on fw_config
* 6d3346068b intel/common/block: Program the right power_limits_config entry
* 35bf4bc59c commonlib: Add generic word-at-a-time optimization to ipchksum()
* e987ba45d6 soc/mediatek/mt8196: Add booker driver
* aa3cfd5c69 haswell NRI: Post-process selected timings
* 4a4ad2b1e6 haswell NRI: Initialise MPLL
* 41c2e1685e soc/intel/xeon_sp: Add PCU PCI drivers
* 8721757aca soc/intel/xeon_sp/skx: Configure IOAPICs
* e9c546b153 arch/x86: Rename breakpoint removal function
* 0351872731 arch/x86: Add breakpoint to stack canary
* 572da7c524 acpi/acpigen: generate Create*Field() from name string directly
* 2e9aebf63f mb/google/fatcat: Enable Intel DPTF support and configure policies
* a8ff286185 mb/google/fatcat: Enable Bayhub Level 2 errata
* 230e646d98 mb/google/fatcat: Remove redundant GPIOs for x1 slot
* fbacae625a soc/intel/ptl: Enable UFS functionality by adding IRQ programming
* b67e001a85 soc/intel/pantherlake: Fix UFS ACPI _ADR calculation
* 2496943b5c mb/google/brox/var/jubilant: Set PCIe root port 5 speed to Gen2
* dfdb210e26 soc/intel/common/block: Fixup itss_get_on_chip_dev_pirq
* 223dabef56 soc/intel/common/block: Add const qualifier for input of pirq ops
* afc49fa013 soc/intel/xeon_sp: Remove lpc_lockdown_config
* 1a4ab38035 soc/mediatek/mt8196: Rename SCP to SPM base variables
* 3189afbdee soc/intel/common: Drop locking function fast_spi_set_vcl
* 01bf34cb28 soc/intel/xeon_sp: Support _PRT reporting for domain
* 1399dd8086 soc/intel/xeon_sp: Skip not pre-routed devices in _PRT reporting
* a5362f6d73 soc/mediatek/mt8196: Enable ARM Trusted Firmware integration
* 42a696090f Update arm-trusted-firmware submodule to upstream master
* 861413b295 mb/google/nissa/var/riven: Set PCIe root port 4 speed to Gen2
* d5a11293ff soc/intel/alderlake: Add support for PCIe speed setting
* 5b447d00f5 soc/intel/pantherlake: Fix UFS ACPI inclusion in southbridge.asl
* 1c51c3e57f device/pci_ids: Add Pantherlake-H GT2 (DID2)
* 15109603c6 mainboard/ocp/tiogapass: Enable TPM
* 94d200c394 soc/intel/xeon_sp/cpx: Add missing FADT fields
* 534585d7bd soc/intel/xeon_sp/skx: Drop ACPI_FADT_8042
* 98ca450a53 soc/intel/xeon_sp: Use generate_p_state_entries
* 28c03b501e mb/ocp/tiogapass: Implement mainboard_dimm_slot_exists
* 74ee80d207 soc/intel/xeon_sp/cpx: Fix register lock
* e1a0e6b738 soc/intel/xeon_sp/skx: Fix CPU init
* b04ecb2a5f arch/x86: Enable support for IOAPIC devices
* a7437ca340 soc/intel/common/block/cse: allow CSE telemetry on non-lite CSE SKU
* 0d284bfc36 soc/intel/mtl/acpi/gpio.asl: fix missing gpio.h include
* aeb5ccd129 ec/dasharo/ec: add Dasharo features
* 820c7e06d2 soc/mediatek/mt8196: Set DRAMC_PARAM_HEADER_VERSION to 4
* d8104af174 mb/google/rex/var/kanix: Disable FP_MCU based on fw_config
* 075a13b775 mb/google/fatcat: Update Soundwire codec address based on devicetree
* 2411942a05 drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs
* 534f81d165 mb/google/fatcat: Update flash layout
* 1b175a64e3 soc/intel/ptl: Populate SMBIOS Type 4 with unique serial number
* 4b574281f0 soc/intel/cmn/pmc: Retrieve SoC QDF information via PMC IPC
* 4ce5304879 soc/intel/xeon_sp: Advertise DIMMs on skylake_sp as well
* 5613f0e6be soc/intel/xeon_sp: Fix debug print
* 0d827a5810 soc/intel/xeon_sp: Drop SOC_INTEL_MMAPVTD_ONLY_FOR_DPR
* d3aa108acf drivers/ipmi/ocp: Add missing include
* 37e9c22089 libpayload: configs: Add new config.featuretest to broaden CI
* bcced7caea commonlib/device_tree: Make END token part of struct_size
* 8ad1ee9b0a util/intelp2m: Print the current project version
* 1b9c312273 intelp2m/patform/sunrise: Add unit tests
* 2394795279 intelp2m/patform/lewisburg: Add unit tests
* bce3363412 intelp2m/patform/apollolake: Add unit tests
* 6abf66c8f3 util/intelp2m/parser/template: Add unit test
* 6b43e4ba33 MAINTAINERS: Add Yuchi and Vasiliy for Intel Atom Snow Ridge SoC
* 5cedebf874 soc/intel/xeon_xp: Remove 1 bytes losing in lower DRAM
* cd30d94ae5 mb/google/brya/var/uldrenite: Generate RAM ID and SPD file
* cda1e7e553 mb/google/nissa: Create pujjogatwin variant
* c0ccace4d5 .checkpatch.conf: Set max line length to 96
* 6f2a8ee8cc soc/mediatek/mt8196: Require DRAM blob to exist
* 850cf7d07a Update blobs submodule to upstream main
* 75424efdc4 soc/amd/common/psp/psp_def.h: increase P2C_BUFFER_MAXSIZE
* 179945291c soc/amd/common/psp/rpmc: fix printk format string
* 9b308f4d54 soc/amd/common/psp/psp_smi: report errors in 'handle_psp_command'
* 5613f209c7 soc/amd/common/psp_smi_flash: implement SPI flash RPMC command handling
* b1f954bc6c soc/amd/common/block/psp/psp_smi_flash.h: fix struct element types
* ce01117aa5 drivers/spi: add RPMC support
* 78270ef3f1 Documentation/tutorial/managing_local_additions.md: Add symlink info
* 0a7c3ed514 soc/mediatek/mt8195: Fix SCP register address
* 4c8547704f mb/google/rauru: Add 2nd source TAS2563 amps to support beep
* ac83b48cba soc/mediatek/mt8196: Add audio base address definition
* c661933a24 soc/mediatek/common: Add read16/write16 support for PMIF
* c107755701 vc/intel/fsp: Update PTL FSP headers from 2382_01 to 2431.00
* a417acdfbc mb/google/fatcat: Remove unnecessary prototype
* d095f1ea45 soc/amd/glinda: Update MCA banks
* 8df4eefd44 soc/mediatek/mt8196: Reserve DRAM buffers for HW TX TRACKING
* 5c766bc150 mb/purism/librem_cnl: Add ramtop to cmos.layout for librem_mini
* 2007792b08 mb/purism/librem_l1um_v2/ramstage.c: Use DEV_PTR macro
* 7f54139a81 Docs/mb/starlabs/labtop_cml.md: Fix footnote syntax

Signed-off-by: Leah Rowe <leah@libreboot.org>

wip2

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              |   4 +-
 .../config/libgfxinit_txtmode                 |   4 +-
 .../config/libgfxinit_corebootfb              |   4 +-
 .../config/libgfxinit_txtmode                 |   4 +-
 .../config/libgfxinit_corebootfb              |   2 +
 .../dell780mt_8mb/config/libgfxinit_txtmode   |   2 +
 .../config/libgfxinit_corebootfb              |   2 +
 .../config/libgfxinit_txtmode                 |   2 +
 .../config/libgfxinit_corebootfb              |   2 +
 .../dell780usff_8mb/config/libgfxinit_txtmode |   2 +
 .../config/libgfxinit_corebootfb              |   2 +
 .../config/libgfxinit_txtmode                 |   2 +
 ...soc-intel-skylake-configure-usb-acpi.patch |   4 +-
 ...nitial-code-for-Lenovo-ThinkPad-E460.patch | 308 --------
 ...-Enable-4E-4F-PNP-I-O-ports-in-boot.patch} |   4 +-
 ...dd-ThinkPad-T480-and-ThinkPad-T480s.patch} | 694 ++++++++----------
 ...-dell-Add-Optiplex-780-MT-x4x-ICH10.patch} |   4 +-
 ...ol-add-nuke-flag-all-0xFF-on-region.patch} |  22 +-
 ...r-coreboot-images-built-without-a-p.patch} |   4 +-
 ...-dell-optiplex_780-Add-USFF-variant.patch} |   4 +-
 ...dell-3050micro-disable-nvme-hotplug.patch} |  16 +-
 ...onfig-option-CONFIG_LENOVO_TBFW_BIN.patch} |   4 +-
 .../coreboot/next/patches/0009-sata-fix.patch |  54 --
 ...-intel-skylake-Don-t-compress-FSP-S.patch} |   4 +-
 ...Hardcoded-poweroff-after-power-fail.patch} |   6 +-
 ...aro-Comment-EC_DASHARO_EC_FLASH_SIZE.patch |  32 +
 ...e-Disable-stack-overflow-debug-optio.patch |  61 ++
 ...tel-x4x-Disable-stack-overflow-debug.patch |  33 +
 config/coreboot/next/target.cfg               |   2 +-
 .../config/libgfxinit_corebootfb              |   5 +-
 .../t480_fsp_16mb/config/libgfxinit_txtmode   |   5 +-
 .../config/libgfxinit_corebootfb              |   5 +-
 .../t480_vfsp_16mb/config/libgfxinit_txtmode  |   5 +-
 .../config/libgfxinit_corebootfb              |   5 +-
 .../t480s_fsp_16mb/config/libgfxinit_txtmode  |   5 +-
 .../config/libgfxinit_corebootfb              |   5 +-
 .../t480s_vfsp_16mb/config/libgfxinit_txtmode |   5 +-
 .../acpica-unix-20230628.tar.gz/module.cfg    |   5 -
 .../acpica-unix-20241212.tar.gz/module.cfg    |   5 +
 config/submodule/coreboot/next/fsp/module.cfg |   2 +-
 config/submodule/coreboot/next/module.list    |   2 +-
 .../submodule/coreboot/next/vboot/module.cfg  |   2 +-
 42 files changed, 535 insertions(+), 809 deletions(-)
 delete mode 100644 config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch
 rename config/coreboot/next/patches/{0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch => 0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch} (86%)
 rename config/coreboot/next/patches/{0004-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch => 0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch} (84%)
 rename config/coreboot/next/patches/{0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch => 0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch} (99%)
 rename config/coreboot/next/patches/{0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch => 0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch} (92%)
 rename config/coreboot/next/patches/{0007-Remove-warning-for-coreboot-images-built-without-a-p.patch => 0006-Remove-warning-for-coreboot-images-built-without-a-p.patch} (90%)
 rename config/coreboot/next/patches/{0008-mb-dell-optiplex_780-Add-USFF-variant.patch => 0007-mb-dell-optiplex_780-Add-USFF-variant.patch} (98%)
 rename config/coreboot/next/patches/{0010-dell-3050micro-disable-nvme-hotplug.patch => 0008-dell-3050micro-disable-nvme-hotplug.patch} (77%)
 rename config/coreboot/next/patches/{0011-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch => 0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch} (95%)
 delete mode 100644 config/coreboot/next/patches/0009-sata-fix.patch
 rename config/coreboot/next/patches/{0012-soc-intel-skylake-Don-t-compress-FSP-S.patch => 0010-soc-intel-skylake-Don-t-compress-FSP-S.patch} (89%)
 rename config/coreboot/next/patches/{0013-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch => 0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch} (94%)
 create mode 100644 config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch
 create mode 100644 config/coreboot/next/patches/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch
 create mode 100644 config/coreboot/next/patches/0014-src-intel-x4x-Disable-stack-overflow-debug.patch
 delete mode 100644 config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg
 create mode 100644 config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg

diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
index 576ab534..f6ce2076 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
@@ -86,6 +86,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -193,8 +194,8 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -574,6 +575,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
index 6207ecd3..593237f1 100644
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
@@ -86,6 +86,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -191,8 +192,8 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -566,6 +567,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb
index e8d7edee..87918a5f 100644
--- a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb
@@ -86,6 +86,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -193,8 +194,8 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -574,6 +575,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode
index 8bb5603c..b55261a4 100644
--- a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode
@@ -86,6 +86,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -191,8 +192,8 @@ CONFIG_HAVE_IFD_BIN=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -566,6 +567,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
index 55182e49..8d9cb74b 100644
--- a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
@@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -438,6 +439,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
 CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
index 7f808162..48210da8 100644
--- a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
@@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -434,6 +435,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
 CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
index 6e81e246..cf288873 100644
--- a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
@@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -438,6 +439,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
 CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
index bfd63d0c..39650339 100644
--- a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
@@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -434,6 +435,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
 CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
index 3c0deb88..93a87b24 100644
--- a/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
@@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -438,6 +439,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
 CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
index a6236e58..e92c5b5b 100644
--- a/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
@@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -434,6 +435,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
 CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
index 05bcf124..80f35e59 100644
--- a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
@@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -438,6 +439,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
 CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
index aca67948..3550d507 100644
--- a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
@@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -434,6 +435,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
 CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch b/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch
index 1b6b5372..215a4e6d 100644
--- a/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch
+++ b/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch
@@ -1,7 +1,7 @@
-From 18b68185f44599cf6ea6a20816bf6a5eb7aeda17 Mon Sep 17 00:00:00 2001
+From 0a28ea805e3dddfaa89e6c4255506a390bc7ce04 Mon Sep 17 00:00:00 2001
 From: Felix Singer <felixsinger@posteo.net>
 Date: Wed, 26 Jun 2024 04:24:31 +0200
-Subject: [PATCH 1/8] soc/intel/skylake: configure usb acpi
+Subject: [PATCH 01/11] soc/intel/skylake: configure usb acpi
 
 Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d
 Signed-off-by: Felix Singer <felixsinger@posteo.net>
diff --git a/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch b/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch
deleted file mode 100644
index 77d7b080..00000000
--- a/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch
+++ /dev/null
@@ -1,308 +0,0 @@
-From a7cbcbc7037fe3473e5ebe475cbfd12f653e9827 Mon Sep 17 00:00:00 2001
-From: Felix Singer <felixsinger@posteo.net>
-Date: Wed, 26 Jun 2024 00:59:03 +0200
-Subject: [PATCH 2/8] mb/lenovo: Add initial code for Lenovo ThinkPad E460
-
-Change-Id: Ia02f81750105c95c867d961dbdadcd5991ad371f
-Signed-off-by: Felix Singer <felixsinger@posteo.net>
----
- src/mainboard/lenovo/sklkbl_thinkpad/Kconfig  | 47 +++++++++++++++++++
- .../lenovo/sklkbl_thinkpad/Kconfig.name       |  4 ++
- .../lenovo/sklkbl_thinkpad/Makefile.mk        |  7 +++
- .../lenovo/sklkbl_thinkpad/acpi/ec.asl        |  3 ++
- .../lenovo/sklkbl_thinkpad/acpi/superio.asl   |  3 ++
- .../lenovo/sklkbl_thinkpad/bootblock.c        |  7 +++
- .../lenovo/sklkbl_thinkpad/devicetree.cb      | 17 +++++++
- src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl | 23 +++++++++
- .../lenovo/sklkbl_thinkpad/ramstage.c         | 11 +++++
- .../lenovo/sklkbl_thinkpad/romstage.c         |  7 +++
- .../variants/e460/gma-mainboard.ads           | 15 ++++++
- .../sklkbl_thinkpad/variants/e460/hda_verb.c  | 10 ++++
- .../variants/e460/overridetree.cb             | 37 +++++++++++++++
- 13 files changed, 191 insertions(+)
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb
-
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
-new file mode 100644
-index 0000000000..fcc80dffe3
---- /dev/null
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
-@@ -0,0 +1,47 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+
-+config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
-+	bool
-+	select BOARD_ROMSIZE_KB_12288
-+	select HAVE_ACPI_RESUME
-+	select HAVE_ACPI_TABLES
-+#	select HAVE_CMOS_DEFAULT
-+#	select INTEL_GMA_HAVE_VBT
-+	select INTEL_LPSS_UART_FOR_CONSOLE
-+	select MAINBOARD_HAS_LIBGFXINIT
-+	select MEMORY_MAPPED_TPM
-+	select MAINBOARD_HAS_TPM2
-+	select NO_UART_ON_SUPERIO
-+	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
-+	select SPD_READ_BY_WORD
-+	select SYSTEM_TYPE_LAPTOP
-+
-+config BOARD_LENOVO_E460
-+	bool
-+	select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
-+	select SOC_INTEL_SKYLAKE
-+
-+if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
-+
-+config MAINBOARD_DIR
-+	default "lenovo/sklkbl_thinkpad"
-+
-+config VARIANT_DIR
-+	default "e460" if BOARD_LENOVO_E460
-+
-+config MAINBOARD_PART_NUMBER
-+	default "E460" if BOARD_LENOVO_E460
-+
-+config CBFS_SIZE
-+	default 0x600000 if BOARD_LENOVO_E460
-+
-+config DIMM_MAX
-+	default 4
-+
-+config DIMM_SPD_SIZE
-+	default 256
-+
-+config UART_FOR_CONSOLE
-+	default 2
-+
-+endif
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
-new file mode 100644
-index 0000000000..61d971fe8d
---- /dev/null
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
-@@ -0,0 +1,4 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+
-+config BOARD_LENOVO_E460
-+	bool "ThinkPad E460"
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
-new file mode 100644
-index 0000000000..6e544fd6b9
---- /dev/null
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
-@@ -0,0 +1,7 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+bootblock-y += bootblock.c
-+
-+ramstage-y += ramstage.c
-+ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
-new file mode 100644
-index 0000000000..16990d45f4
---- /dev/null
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: CC-PDDC */
-+
-+/* Please update the license if adding licensable material. */
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl
-new file mode 100644
-index 0000000000..55b1db5b11
---- /dev/null
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <drivers/pc80/pc/ps2_controller.asl>
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
-new file mode 100644
-index 0000000000..ccd8ec1b40
---- /dev/null
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
-@@ -0,0 +1,7 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <bootblock_common.h>
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+}
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
-new file mode 100644
-index 0000000000..ddb6e8aaa5
---- /dev/null
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
-@@ -0,0 +1,17 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+
-+chip soc/intel/skylake
-+	device domain 0 on
-+		device ref igpu on end
-+		device ref sa_thermal on end
-+		device ref thermal on end
-+		device ref south_xhci on end
-+		device ref lpc_espi on
-+			register "serirq_mode" = "SERIRQ_CONTINUOUS"
-+			chip drivers/pc80/tpm
-+				device pnp 0c31.0 on end
-+			end
-+		end
-+		device ref hda on end
-+	end
-+end
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
-new file mode 100644
-index 0000000000..967b652853
---- /dev/null
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
-@@ -0,0 +1,23 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi.h>
-+DefinitionBlock(
-+	"dsdt.aml",
-+	"DSDT",
-+	ACPI_DSDT_REV_2,
-+	OEM_ID,
-+	ACPI_TABLE_CREATOR,
-+	0x20110725
-+)
-+{
-+	#include <acpi/dsdt_top.asl>
-+	#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
-+	#include <cpu/intel/common/acpi/cpu.asl>
-+
-+	Device (\_SB.PCI0) {
-+		#include <soc/intel/skylake/acpi/systemagent.asl>
-+		#include <soc/intel/skylake/acpi/pch.asl>
-+	}
-+
-+	#include <southbridge/intel/common/acpi/sleepstates.asl>
-+}
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
-new file mode 100644
-index 0000000000..6c3b077cc4
---- /dev/null
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
-@@ -0,0 +1,11 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+
-+static void init_mainboard(void *chip_info)
-+{
-+}
-+
-+struct chip_operations mainboard_ops = {
-+	.init = init_mainboard,
-+};
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
-new file mode 100644
-index 0000000000..59a62f484e
---- /dev/null
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
-@@ -0,0 +1,7 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <soc/romstage.h>
-+
-+void mainboard_memory_init_params(FSPM_UPD *mupd)
-+{
-+}
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads
-new file mode 100644
-index 0000000000..e0a166fe55
---- /dev/null
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads
-@@ -0,0 +1,15 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+   ports : constant Port_List :=
-+     (eDP,
-+      others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c
-new file mode 100644
-index 0000000000..d9d103f862
---- /dev/null
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c
-@@ -0,0 +1,10 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+};
-+
-+const u32 pc_beep_verbs[] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb
-new file mode 100644
-index 0000000000..a7384848a6
---- /dev/null
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb
-@@ -0,0 +1,37 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+
-+chip soc/intel/skylake
-+	device domain 0 on
-+		device ref south_xhci on
-+			register "usb2_ports" = "{
-+				[0] = USB2_PORT_MID(OC_SKIP),	// On board, right front
-+				[1] = USB2_PORT_MID(OC_SKIP),	// On board, right back
-+				[2] = USB2_PORT_MID(OC_SKIP),	// Charger port
-+				[3] = USB2_PORT_MID(OC_SKIP),	// Docking
-+				[4] = USB2_PORT_MID(OC_SKIP),	// Touch panel
-+				[5] = USB2_PORT_MID(OC_SKIP),	// Bluetooth
-+				[6] = USB2_PORT_MID(OC_SKIP),	// Camera
-+				[7] = USB2_PORT_MID(OC_SKIP),	// Fingerprint
-+			}"
-+			register "usb3_ports" = "{
-+				[0] = USB3_PORT_DEFAULT(OC_SKIP),	// On board, right front
-+				[1] = USB3_PORT_DEFAULT(OC_SKIP),	// On board, right back
-+				[2] = USB3_PORT_DEFAULT(OC_SKIP),	// Charger port
-+				[3] = USB3_PORT_DEFAULT(OC_SKIP),	// Docking
-+			}"
-+		end
-+		device ref sata on
-+			register "SataPortsEnable[0]" = "1"
-+			register "SataPortsDevSlp[0]" = "1"
-+		end
-+		device ref pcie_rp3 on
-+			# WLAN
-+		end
-+		device ref pcie_rp4 on
-+			# LAN
-+		end
-+		device ref pcie_rp6 on
-+			# Card reader
-+		end
-+	end
-+end
--- 
-2.39.5
-
diff --git a/config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch b/config/coreboot/next/patches/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
similarity index 86%
rename from config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
rename to config/coreboot/next/patches/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
index 6e7d4b7c..f60aa74a 100644
--- a/config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
+++ b/config/coreboot/next/patches/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
@@ -1,7 +1,7 @@
-From b3049cfd11aa0f3c124ed8f87e98a200201ecbdc Mon Sep 17 00:00:00 2001
+From aa6dd7aa4693bd9ce1fe7f35b9532e5411fc1098 Mon Sep 17 00:00:00 2001
 From: Mate Kukri <km@mkukri.xyz>
 Date: Fri, 22 Nov 2024 21:26:48 +0000
-Subject: [PATCH 3/8] soc/intel/skylake: Enable 4E/4F PNP I/O ports in
+Subject: [PATCH 02/11] soc/intel/skylake: Enable 4E/4F PNP I/O ports in
  bootblock
 
 Change-Id: I57c9d8a9513a268e2ca6a0abd1306cd038598173
diff --git a/config/coreboot/next/patches/0004-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch b/config/coreboot/next/patches/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch
similarity index 84%
rename from config/coreboot/next/patches/0004-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch
rename to config/coreboot/next/patches/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch
index 1ac1a536..108f688d 100644
--- a/config/coreboot/next/patches/0004-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch
+++ b/config/coreboot/next/patches/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch
@@ -1,106 +1,87 @@
-From e905d7fd1ee1a791f27285715d420263e422ebee Mon Sep 17 00:00:00 2001
-From: Mate Kukri <kukri.mate@gmail.com>
-Date: Mon, 2 Dec 2024 16:10:22 +0000
-Subject: [PATCH 4/8] mb/lenovo: Add ThinkPad T480 and ThinkPad T480s
+From 1652c22825d3001e77159aa539dfa49d2389c775 Mon Sep 17 00:00:00 2001
+From: Mate Kukri <km@mkukri.xyz>
+Date: Tue, 31 Dec 2024 22:49:15 +0000
+Subject: [PATCH 03/11] mb/lenovo: Add ThinkPad T480 and ThinkPad T480s
 
-These machine have BootGuard fused and requires deguard to boot coreboot.
-
-Works:
-- Intel GPU
-- Internal screen
-- Ethernet
-- USB
-- EC
-  + Fan control
-  + Keyboard
-  + Battery (T480 has two)
-  + Charging via both Type-C ports
-  + Debug UART (on T480)
-- WLAN card:
-  + WiFi works
-  + Bluetooth works
-- M.2 main SSD
-- HDA verbs, Speakers, headphone jack
-- S3 sleep
+These machine have BootGuard fused and requires deguard to
+boot coreboot.
 
 Known issues:
 - Alpine Ridge Thunderbolt 3 controller does not work
-- Function keys are handled differently from stock firmware
-  + These should inject XF86 keycodes instead of directly
-    controlling, volume, brightness, etc in hardware.
-- Nvidia dGPU
+- Some Fn+F{1-12} keys aren't handled correctly
+- Nvidia dGPU is finicky
   - Needs option ROM
   - Power enable code is buggy
   - Nouveau only works on linux 6.8-6.9
-
-Untested (should work):
-- SATA main SSD
-- WWAN slot
-  + PCIe x2 NVME drive
-  + WWAN card (bus)
-- SD reader (USB)
-- Webcam (USB)
-- External video outputs
+- Headphone jack isn't detected as plugged in despite correct verbs
 
 Thanks to Leah Rowe for helping with the T480s.
 
-Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
+Signed-off-by: Mate Kukri <km@mkukri.xyz>
 Change-Id: I19d421412c771c1f242f6ff39453f824fa866163
 ---
- src/device/pci_rom.c                          |  12 +-
+ src/device/pci_rom.c                          |   4 +-
  src/ec/lenovo/h8/acpi/ec.asl                  |   2 +-
- src/ec/lenovo/h8/bluetooth.c                  |  12 +-
- src/ec/lenovo/h8/wwan.c                       |  12 +-
- src/mainboard/lenovo/sklkbl_thinkpad/Kconfig  |  42 +++-
- .../lenovo/sklkbl_thinkpad/Kconfig.name       |   6 +
- .../lenovo/sklkbl_thinkpad/Makefile.mk        |  72 ++++++-
- .../lenovo/sklkbl_thinkpad/acpi/ec.asl        |  13 +-
- .../lenovo/sklkbl_thinkpad/bootblock.c        |  50 +++++
- .../lenovo/sklkbl_thinkpad/devicetree.cb      |  36 ++++
- src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl |  17 +-
+ src/ec/lenovo/h8/bluetooth.c                  |   6 +-
+ src/ec/lenovo/h8/wwan.c                       |   6 +-
+ src/mainboard/lenovo/sklkbl_thinkpad/Kconfig  |  57 +++++
+ .../lenovo/sklkbl_thinkpad/Kconfig.name       |   7 +
+ .../lenovo/sklkbl_thinkpad/Makefile.mk        |  73 +++++++
+ .../lenovo/sklkbl_thinkpad/acpi/ec.asl        |  12 ++
+ .../lenovo/sklkbl_thinkpad/acpi/superio.asl   |   3 +
+ .../lenovo/sklkbl_thinkpad/bootblock.c        |  60 ++++++
+ .../lenovo/sklkbl_thinkpad/devicetree.cb      |  71 ++++++
+ src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl |  33 +++
  src/mainboard/lenovo/sklkbl_thinkpad/ec.c     | 153 +++++++++++++
  src/mainboard/lenovo/sklkbl_thinkpad/ec.h     |  99 +++++++++
  src/mainboard/lenovo/sklkbl_thinkpad/gpio.h   |   8 +
- .../lenovo/sklkbl_thinkpad/ramstage.c         |  98 ++++++++-
- .../lenovo/sklkbl_thinkpad/romstage.c         |   7 -
+ .../lenovo/sklkbl_thinkpad/ramstage.c         | 105 +++++++++
  .../sklkbl_thinkpad/variants/t480/data.vbt    | Bin 0 -> 4106 bytes
  .../variants/t480/gma-mainboard.ads           |  19 ++
  .../sklkbl_thinkpad/variants/t480/gpio.c      | 203 ++++++++++++++++++
  .../sklkbl_thinkpad/variants/t480/hda_verb.c  |  90 ++++++++
  .../variants/t480/memory_init_params.c        |  20 ++
- .../variants/t480/overridetree.cb             | 124 +++++++++++
+ .../variants/t480/overridetree.cb             | 103 +++++++++
  .../sklkbl_thinkpad/variants/t480s/data.vbt   | Bin 0 -> 4106 bytes
  .../variants/t480s/gma-mainboard.ads          |  19 ++
  .../sklkbl_thinkpad/variants/t480s/gpio.c     | 199 +++++++++++++++++
  .../sklkbl_thinkpad/variants/t480s/hda_verb.c |  90 ++++++++
  .../variants/t480s/memory_init_params.c       |  44 ++++
- .../variants/t480s/overridetree.cb            | 124 +++++++++++
- .../sklkbl_thinkpad/variants/t480s/spd_0.bin  | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_1.bin  | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_10.bin | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_11.bin | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_12.bin | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_13.bin | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_14.bin | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_15.bin | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_16.bin | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_17.bin | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_18.bin | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_19.bin | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_2.bin  | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_20.bin | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_3.bin  | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_4.bin  | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_5.bin  | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_6.bin  | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_7.bin  | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_8.bin  | Bin 0 -> 512 bytes
- .../sklkbl_thinkpad/variants/t480s/spd_9.bin  | Bin 0 -> 512 bytes
- 49 files changed, 1531 insertions(+), 40 deletions(-)
+ .../variants/t480s/overridetree.cb            | 103 +++++++++
+ .../variants/t480s/spd/spd_0.bin              | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_1.bin              | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_10.bin             | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_11.bin             | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_12.bin             | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_13.bin             | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_14.bin             | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_15.bin             | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_16.bin             | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_17.bin             | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_18.bin             | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_19.bin             | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_2.bin              | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_20.bin             | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_3.bin              | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_4.bin              | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_5.bin              | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_6.bin              | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_7.bin              | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_8.bin              | Bin 0 -> 512 bytes
+ .../variants/t480s/spd/spd_9.bin              | Bin 0 -> 512 bytes
+ 49 files changed, 1583 insertions(+), 6 deletions(-)
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ec.c
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ec.h
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/gpio.h
- delete mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c
@@ -113,50 +94,47 @@ Change-Id: I19d421412c771c1f242f6ff39453f824fa866163
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_0.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_1.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_10.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_11.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_12.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_13.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_14.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_15.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_16.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_17.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_18.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_19.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_2.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_20.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_3.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_4.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_5.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_6.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_7.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_8.bin
- create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_9.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_1.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_10.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_11.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_12.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_13.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_14.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_15.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_16.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_17.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_18.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_19.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_2.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_20.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_3.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_4.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_5.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_6.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_7.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_8.bin
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_9.bin
 
 diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
-index d60720eb49..b18dfdd287 100644
+index d60720eb49..cc6b9b068a 100644
 --- a/src/device/pci_rom.c
 +++ b/src/device/pci_rom.c
-@@ -304,11 +304,11 @@ void pci_rom_ssdt(const struct device *device)
+@@ -304,11 +304,13 @@ void pci_rom_ssdt(const struct device *device)
  		return;
  	}
  
--	const char *scope = acpi_device_path(device);
--	if (!scope) {
--		printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device));
--		return;
--	}
-+	// const char *scope = acpi_device_path(device);
-+	// if (!scope) {
-+	// 	printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device));
-+	// 	return;
-+	// }
++#if 0
+ 	const char *scope = acpi_device_path(device);
+ 	if (!scope) {
+ 		printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device));
+ 		return;
+ 	}
++#endif
  
  	/* Supports up to four devices. */
  	if ((CBMEM_ID_ROM0 + ngfx) > CBMEM_ID_ROM3) {
-@@ -336,7 +336,7 @@ void pci_rom_ssdt(const struct device *device)
+@@ -336,7 +338,7 @@ void pci_rom_ssdt(const struct device *device)
  	memcpy(cbrom, rom, cbrom_length);
  
  	/* write _ROM method */
@@ -179,7 +157,7 @@ index bc54d3b422..8f4a8e1986 100644
  #include "thinkpad.asl"
  }
 diff --git a/src/ec/lenovo/h8/bluetooth.c b/src/ec/lenovo/h8/bluetooth.c
-index 16fc8dce39..ef4f6ad1f5 100644
+index 16fc8dce39..be71a24ced 100644
 --- a/src/ec/lenovo/h8/bluetooth.c
 +++ b/src/ec/lenovo/h8/bluetooth.c
 @@ -1,6 +1,6 @@
@@ -190,7 +168,7 @@ index 16fc8dce39..ef4f6ad1f5 100644
  #include <console/console.h>
  #include <device/device.h>
  #include <ec/acpi/ec.h>
-@@ -28,16 +28,16 @@ bool h8_has_bdc(const struct device *dev)
+@@ -28,16 +28,18 @@ bool h8_has_bdc(const struct device *dev)
  {
  	struct ec_lenovo_h8_config *conf = dev->chip_info;
  
@@ -201,19 +179,17 @@ index 16fc8dce39..ef4f6ad1f5 100644
  		return true;
  	}
  
--	if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) {
--		printk(BIOS_INFO, "H8: BDC installed\n");
--		return true;
--	}
-+	// if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) {
-+	// 	printk(BIOS_INFO, "H8: BDC installed\n");
-+	// 	return true;
-+	// }
++#if 0
+ 	if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) {
+ 		printk(BIOS_INFO, "H8: BDC installed\n");
+ 		return true;
+ 	}
++#endif
  
  	printk(BIOS_INFO, "H8: BDC not installed\n");
  	return false;
 diff --git a/src/ec/lenovo/h8/wwan.c b/src/ec/lenovo/h8/wwan.c
-index 685886fcce..5e0ae030e2 100644
+index 685886fcce..5cdcf77406 100644
 --- a/src/ec/lenovo/h8/wwan.c
 +++ b/src/ec/lenovo/h8/wwan.c
 @@ -1,6 +1,6 @@
@@ -224,7 +200,7 @@ index 685886fcce..5e0ae030e2 100644
  #include <console/console.h>
  #include <device/device.h>
  #include <ec/acpi/ec.h>
-@@ -26,16 +26,16 @@ bool h8_has_wwan(const struct device *dev)
+@@ -26,16 +26,18 @@ bool h8_has_wwan(const struct device *dev)
  {
  	struct ec_lenovo_h8_config *conf = dev->chip_info;
  
@@ -235,110 +211,85 @@ index 685886fcce..5e0ae030e2 100644
  		return true;
  	}
  
--	if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) {
--		printk(BIOS_INFO, "H8: WWAN installed\n");
--		return true;
--	}
-+	// if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) {
-+	// 	printk(BIOS_INFO, "H8: WWAN installed\n");
-+	// 	return true;
-+	// }
++#if 0
+ 	if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) {
+ 		printk(BIOS_INFO, "H8: WWAN installed\n");
+ 		return true;
+ 	}
++#endif
  
  	printk(BIOS_INFO, "H8: WWAN not installed\n");
  	return false;
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
-index fcc80dffe3..21076315ab 100644
---- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
+new file mode 100644
+index 0000000000..4998672943
+--- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
-@@ -2,16 +2,20 @@
- 
- config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
- 	bool
--	select BOARD_ROMSIZE_KB_12288
+@@ -0,0 +1,57 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
++	bool
++	select BOARD_ROMSIZE_KB_16384
 +	select EC_LENOVO_H8
 +	select EC_LENOVO_PMH7
 +	select H8_HAS_BAT_THRESHOLDS_IMPL
 +	select H8_HAS_LEDLOGO
 +	select H8_HAS_PRIMARY_FN_KEYS
- 	select HAVE_ACPI_RESUME
- 	select HAVE_ACPI_TABLES
- #	select HAVE_CMOS_DEFAULT
--#	select INTEL_GMA_HAVE_VBT
--	select INTEL_LPSS_UART_FOR_CONSOLE
++	select HAVE_ACPI_RESUME
++	select HAVE_ACPI_TABLES
 +	select INTEL_GMA_HAVE_VBT
 +	select INTEL_INT15
- 	select MAINBOARD_HAS_LIBGFXINIT
- 	select MEMORY_MAPPED_TPM
- 	select MAINBOARD_HAS_TPM2
--	select NO_UART_ON_SUPERIO
++	select MAINBOARD_HAS_LIBGFXINIT
++	select MAINBOARD_HAS_TPM2
 +	select MAINBOARD_USES_IFD_GBE_REGION
- 	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
- 	select SPD_READ_BY_WORD
- 	select SYSTEM_TYPE_LAPTOP
-@@ -19,8 +23,22 @@ config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
- config BOARD_LENOVO_E460
- 	bool
- 	select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
-+	select BOARD_ROMSIZE_KB_12288
-+	select INTEL_LPSS_UART_FOR_CONSOLE
- 	select SOC_INTEL_SKYLAKE
- 
++	select MEMORY_MAPPED_TPM
++	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
++	select SOC_INTEL_KABYLAKE
++	select SPD_READ_BY_WORD
++	select SYSTEM_TYPE_LAPTOP
++
 +config BOARD_LENOVO_T480
 +	bool
 +	select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
-+	select BOARD_ROMSIZE_KB_16384
-+	select SOC_INTEL_KABYLAKE
 +
 +config BOARD_LENOVO_T480S
 +	bool
 +	select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
-+	select BOARD_ROMSIZE_KB_16384
-+	select SOC_INTEL_KABYLAKE
 +
- if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
- 
- config MAINBOARD_DIR
-@@ -28,18 +46,30 @@ config MAINBOARD_DIR
- 
- config VARIANT_DIR
- 	default "e460" if BOARD_LENOVO_E460
++if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
++
++config MAINBOARD_DIR
++	default "lenovo/sklkbl_thinkpad"
++
++config VARIANT_DIR
 +	default "t480" if BOARD_LENOVO_T480
 +	default "t480s" if BOARD_LENOVO_T480S
 +
 +config OVERRIDE_DEVICETREE
 +	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
- 
- config MAINBOARD_PART_NUMBER
- 	default "E460" if BOARD_LENOVO_E460
++
++config MAINBOARD_PART_NUMBER
 +	default "T480" if BOARD_LENOVO_T480
 +	default "T480s" if BOARD_LENOVO_T480S
- 
- config CBFS_SIZE
- 	default 0x600000 if BOARD_LENOVO_E460
-+	default 0x900000 if BOARD_LENOVO_T480 || BOARD_LENOVO_T480S
- 
- config DIMM_MAX
--	default 4
++
++config CBFS_SIZE
++	default 0x900000
++
++config DIMM_MAX
 +	default 2
- 
- config DIMM_SPD_SIZE
--	default 256
++
++config DIMM_SPD_SIZE
 +	default 512	# DDR4
 +
 +endif
-+
-+if BOARD_LENOVO_E460
- 
- config UART_FOR_CONSOLE
- 	default 2
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
-index 61d971fe8d..15441c4264 100644
---- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
+new file mode 100644
+index 0000000000..abc273f387
+--- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
-@@ -2,3 +2,9 @@
- 
- config BOARD_LENOVO_E460
- 	bool "ThinkPad E460"
+@@ -0,0 +1,7 @@
++# SPDX-License-Identifier: GPL-2.0-only
 +
 +config BOARD_LENOVO_T480
 +	bool "ThinkPad T480"
@@ -346,97 +297,94 @@ index 61d971fe8d..15441c4264 100644
 +config BOARD_LENOVO_T480S
 +	bool "ThinkPad T480s"
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
-index 6e544fd6b9..49d6ebdb4e 100644
---- a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
+new file mode 100644
+index 0000000000..c308239177
+--- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
-@@ -1,7 +1,73 @@
- ## SPDX-License-Identifier: GPL-2.0-only
- 
--bootblock-y += bootblock.c
+@@ -0,0 +1,73 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
 +bootblock-y += bootblock.c ec.c
- 
--ramstage-y += ramstage.c
--ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
++
 +romstage-y += variants/$(VARIANT_DIR)/memory_init_params.c
 +
 +ramstage-y += ramstage.c ec.c
 +ramstage-y += variants/$(VARIANT_DIR)/gpio.c variants/$(VARIANT_DIR)/hda_verb.c
- ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
 +
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_0.bin
-+spd_0.bin-file := variants/$(VARIANT_DIR)/spd_0.bin
++spd_0.bin-file := variants/$(VARIANT_DIR)/spd/spd_0.bin
 +spd_0.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_1.bin
-+spd_1.bin-file := variants/$(VARIANT_DIR)/spd_1.bin
++spd_1.bin-file := variants/$(VARIANT_DIR)/spd/spd_1.bin
 +spd_1.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_2.bin
-+spd_2.bin-file := variants/$(VARIANT_DIR)/spd_2.bin
++spd_2.bin-file := variants/$(VARIANT_DIR)/spd/spd_2.bin
 +spd_2.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_3.bin
-+spd_3.bin-file := variants/$(VARIANT_DIR)/spd_3.bin
++spd_3.bin-file := variants/$(VARIANT_DIR)/spd/spd_3.bin
 +spd_3.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_4.bin
-+spd_4.bin-file := variants/$(VARIANT_DIR)/spd_4.bin
++spd_4.bin-file := variants/$(VARIANT_DIR)/spd/spd_4.bin
 +spd_4.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_5.bin
-+spd_5.bin-file := variants/$(VARIANT_DIR)/spd_5.bin
++spd_5.bin-file := variants/$(VARIANT_DIR)/spd/spd_5.bin
 +spd_5.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_6.bin
-+spd_6.bin-file := variants/$(VARIANT_DIR)/spd_6.bin
++spd_6.bin-file := variants/$(VARIANT_DIR)/spd/spd_6.bin
 +spd_6.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_7.bin
-+spd_7.bin-file := variants/$(VARIANT_DIR)/spd_7.bin
++spd_7.bin-file := variants/$(VARIANT_DIR)/spd/spd_7.bin
 +spd_7.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_8.bin
-+spd_8.bin-file := variants/$(VARIANT_DIR)/spd_8.bin
++spd_8.bin-file := variants/$(VARIANT_DIR)/spd/spd_8.bin
 +spd_8.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_9.bin
-+spd_9.bin-file := variants/$(VARIANT_DIR)/spd_9.bin
++spd_9.bin-file := variants/$(VARIANT_DIR)/spd/spd_9.bin
 +spd_9.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_10.bin
-+spd_10.bin-file := variants/$(VARIANT_DIR)/spd_10.bin
++spd_10.bin-file := variants/$(VARIANT_DIR)/spd/spd_10.bin
 +spd_10.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_11.bin
-+spd_11.bin-file := variants/$(VARIANT_DIR)/spd_11.bin
++spd_11.bin-file := variants/$(VARIANT_DIR)/spd/spd_11.bin
 +spd_11.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_12.bin
-+spd_12.bin-file := variants/$(VARIANT_DIR)/spd_12.bin
++spd_12.bin-file := variants/$(VARIANT_DIR)/spd/spd_12.bin
 +spd_12.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_13.bin
-+spd_13.bin-file := variants/$(VARIANT_DIR)/spd_13.bin
++spd_13.bin-file := variants/$(VARIANT_DIR)/spd/spd_13.bin
 +spd_13.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_14.bin
-+spd_14.bin-file := variants/$(VARIANT_DIR)/spd_14.bin
++spd_14.bin-file := variants/$(VARIANT_DIR)/spd/spd_14.bin
 +spd_14.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_15.bin
-+spd_15.bin-file := variants/$(VARIANT_DIR)/spd_15.bin
++spd_15.bin-file := variants/$(VARIANT_DIR)/spd/spd_15.bin
 +spd_15.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_16.bin
-+spd_16.bin-file := variants/$(VARIANT_DIR)/spd_16.bin
++spd_16.bin-file := variants/$(VARIANT_DIR)/spd/spd_16.bin
 +spd_16.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_17.bin
-+spd_17.bin-file := variants/$(VARIANT_DIR)/spd_17.bin
++spd_17.bin-file := variants/$(VARIANT_DIR)/spd/spd_17.bin
 +spd_17.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_18.bin
-+spd_18.bin-file := variants/$(VARIANT_DIR)/spd_18.bin
++spd_18.bin-file := variants/$(VARIANT_DIR)/spd/spd_18.bin
 +spd_18.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_19.bin
-+spd_19.bin-file := variants/$(VARIANT_DIR)/spd_19.bin
++spd_19.bin-file := variants/$(VARIANT_DIR)/spd/spd_19.bin
 +spd_19.bin-type := raw
 +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_20.bin
-+spd_20.bin-file := variants/$(VARIANT_DIR)/spd_20.bin
++spd_20.bin-file := variants/$(VARIANT_DIR)/spd/spd_20.bin
 +spd_20.bin-type := raw
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
-index 16990d45f4..514b95a60f 100644
---- a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
+new file mode 100644
+index 0000000000..3a949a2fca
+--- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
-@@ -1,3 +1,12 @@
--/* SPDX-License-Identifier: CC-PDDC */
+@@ -0,0 +1,12 @@
 +/* SPDX-License-Identifier: GPL-2.0-only */
- 
--/* Please update the license if adding licensable material. */
-+#define BRIGHTNESS_UP()
-+#define BRIGHTNESS_DOWN()
++
++#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
++#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
 +#define THINKPAD_EC_GPE 22
 +
 +Name(\TCRT, 100)
@@ -445,15 +393,25 @@ index 16990d45f4..514b95a60f 100644
 +
 +#include <ec/lenovo/h8/acpi/ec.asl>
 +#include <ec/lenovo/h8/acpi/thinkpad_bat_thresholds_b0.asl>
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl
+new file mode 100644
+index 0000000000..55b1db5b11
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <drivers/pc80/pc/ps2_controller.asl>
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
-index ccd8ec1b40..55afd3d048 100644
---- a/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
+new file mode 100644
+index 0000000000..fb660dbdfa
+--- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
-@@ -1,7 +1,57 @@
- /* SPDX-License-Identifier: GPL-2.0-only */
- 
+@@ -0,0 +1,60 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
 +#include <arch/io.h>
- #include <bootblock_common.h>
++#include <bootblock_common.h>
 +#include <device/pci.h>
 +#include <soc/pci_devs.h>
 +#include "ec.h"
@@ -476,25 +434,22 @@ index ccd8ec1b40..55afd3d048 100644
 +
 +	microchip_pnp_exit_conf_state(port);
 +
-+	// NOTE: this is incredibly hacky and uses a debug backdoor in the EC
-+	// firmware to control the UART GPIOs.
-+	// Unfortunately production EC firmware has no way to do this via regular EC
-+	// commands.
-+
++#ifdef CONFIG_BOARD_LENOVO_T480
 +	// Supply debug unlock key
 +	debug_write_key(DEBUG_RW_KEY_IDX, debug_rw_key);
 +
 +	// Use debug writes to set UART_TX and UART_RX GPIOs
 +	debug_write_dword(0xf0c400 + 0x110, 0x00001000);
 +	debug_write_dword(0xf0c400 + 0x114, 0x00001000);
++#endif
 +}
 +
 +
 +#define UART_PORT	0x3f8
 +#define UART_IRQ	4
- 
- void bootblock_mainboard_early_init(void)
- {
++
++void bootblock_mainboard_early_init(void)
++{
 +	// Tell EC via BIOS Debug Port 1 that the world isn't on fire
 +
 +	// Let the EC know that BIOS code is running
@@ -504,17 +459,49 @@ index ccd8ec1b40..55afd3d048 100644
 +	// Enable accesses to EC1 interface
 +	ec0_write(0, ec0_read(0) | 0x20);
 +
++	// Reset LEDs to power on state
++	// (Without this warm reboot leaves LEDs off)
++	ec0_write(0x0c, 0x80);
++	ec0_write(0x0c, 0x07);
++	ec0_write(0x0c, 0x8a);
++
 +	// Setup debug UART
 +	configure_uart(EC_CFG_PORT, UART_PORT, UART_IRQ);
- }
++}
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
-index ddb6e8aaa5..745af8c8cd 100644
---- a/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
+new file mode 100644
+index 0000000000..c07d4d53ca
+--- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
-@@ -8,6 +8,42 @@ chip soc/intel/skylake
- 		device ref south_xhci on end
- 		device ref lpc_espi on
- 			register "serirq_mode" = "SERIRQ_CONTINUOUS"
+@@ -0,0 +1,71 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++chip soc/intel/skylake
++	# IGD Displays
++	register "gfx" = "GMA_STATIC_DISPLAYS(0)"
++
++	register "panel_cfg" = "{
++		.up_delay_ms		= 200,
++		.down_delay_ms		=  50,
++		.cycle_delay_ms		= 600,
++		.backlight_on_delay_ms	=   1,
++		.backlight_off_delay_ms	= 200,
++		.backlight_pwm_hz	= 200,
++	}"
++
++        # Power
++        register "PmConfigSlpS3MinAssert" = "2"         # 50ms
++        register "PmConfigSlpS4MinAssert" = "1"         # 1s
++        register "PmConfigSlpSusMinAssert" = "3"        # 500ms
++        register "PmConfigSlpAMinAssert" = "3"          # 2s
++
++	device domain 0 on
++		device ref igpu on end
++		device ref sa_thermal on end
++		device ref thermal on end
++		device ref south_xhci on end
++		device ref lpc_espi on
++			register "serirq_mode" = "SERIRQ_CONTINUOUS"
 +
 +			register "gen1_dec" = "0x007c1601"
 +			register "gen2_dec" = "0x000c15e1"
@@ -551,33 +538,39 @@ index ddb6e8aaa5..745af8c8cd 100644
 +				end
 +			end
 +
- 			chip drivers/pc80/tpm
- 				device pnp 0c31.0 on end
- 			end
++			chip drivers/pc80/tpm
++				device pnp 0c31.0 on end
++			end
++		end
++		device ref hda on end
++	end
++end
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
-index 967b652853..237500775f 100644
---- a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
+new file mode 100644
+index 0000000000..aa4d4de2a6
+--- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
-@@ -1,5 +1,10 @@
- /* SPDX-License-Identifier: GPL-2.0-only */
- 
-+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-+#define EC_LENOVO_H8_ME_WORKAROUND 1
-+#define THINKPAD_EC_GPE 17
+@@ -0,0 +1,33 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi.h>
++DefinitionBlock(
++	"dsdt.aml",
++	"DSDT",
++	ACPI_DSDT_REV_2,
++	OEM_ID,
++	ACPI_TABLE_CREATOR,
++	0x20110725
++)
++{
++	#include <acpi/dsdt_top.asl>
++	#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
++	#include <cpu/intel/common/acpi/cpu.asl>
 +
- #include <acpi/acpi.h>
- DefinitionBlock(
- 	"dsdt.aml",
-@@ -14,9 +19,19 @@ DefinitionBlock(
- 	#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
- 	#include <cpu/intel/common/acpi/cpu.asl>
- 
--	Device (\_SB.PCI0) {
 +	Device (\_SB.PCI0)
 +	{
- 		#include <soc/intel/skylake/acpi/systemagent.asl>
- 		#include <soc/intel/skylake/acpi/pch.asl>
++		#include <soc/intel/skylake/acpi/systemagent.asl>
++		#include <soc/intel/skylake/acpi/pch.asl>
 +		#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
 +	}
 +
@@ -587,9 +580,10 @@ index 967b652853..237500775f 100644
 +		{
 +			Name (_ADR, Zero)
 +		}
- 	}
- 
- 	#include <southbridge/intel/common/acpi/sleepstates.asl>
++	}
++
++	#include <southbridge/intel/common/acpi/sleepstates.asl>
++}
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ec.c b/src/mainboard/lenovo/sklkbl_thinkpad/ec.c
 new file mode 100644
 index 0000000000..adb6a60324
@@ -869,21 +863,21 @@ index 0000000000..d89ed712d4
 +
 +#endif
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
-index 6c3b077cc4..b41cca02a7 100644
---- a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
+new file mode 100644
+index 0000000000..44c8578852
+--- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
-@@ -1,11 +1,105 @@
- /* SPDX-License-Identifier: GPL-2.0-only */
- 
+@@ -0,0 +1,105 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
 +#include <arch/io.h>
- #include <device/device.h>
++#include <device/device.h>
 +#include <drivers/intel/gma/int15.h>
 +#include <option.h>
 +#include <soc/ramstage.h>
 +#include "ec.h"
 +#include "gpio.h"
- 
--static void init_mainboard(void *chip_info)
++
 +#define GPIO_GPU_RST		GPP_E22 // active low
 +#define GPIO_1R8VIDEO_AON_ON	GPP_E23
 +
@@ -895,7 +889,7 @@ index 6c3b077cc4..b41cca02a7 100644
 +
 +void mainboard_silicon_init_params(FSP_SIL_UPD *params)
 +{
-+	static const char *dgfx_vram_id_str[] = { "1GB", "2GB", "4GB", "N/A" };
++	static const char * const dgfx_vram_id_str[] = { "1GB", "2GB", "4GB", "N/A" };
 +
 +	int dgfx_vram_id;
 +
@@ -971,28 +965,14 @@ index 6c3b077cc4..b41cca02a7 100644
 +}
 +
 +static void mainboard_init(void *chip_info)
- {
++{
 +	dump_ec_cfg(EC_CFG_PORT);
- }
- 
- struct chip_operations mainboard_ops = {
--	.init = init_mainboard,
++}
++
++struct chip_operations mainboard_ops = {
 +	.enable_dev = mainboard_enable,
 +	.init = mainboard_init,
- };
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
-deleted file mode 100644
-index 59a62f484e..0000000000
---- a/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
-+++ /dev/null
-@@ -1,7 +0,0 @@
--/* SPDX-License-Identifier: GPL-2.0-only */
--
--#include <soc/romstage.h>
--
--void mainboard_memory_init_params(FSPM_UPD *mupd)
--{
--}
++};
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt
 new file mode 100644
 index 0000000000000000000000000000000000000000..4db4202961d0be67b75f52b28f2111d5655595c3
@@ -1386,31 +1366,13 @@ index 0000000000..5252a402f9
 +}
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
 new file mode 100644
-index 0000000000..4b68ec3f49
+index 0000000000..bf66bd3a69
 --- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
-@@ -0,0 +1,124 @@
+@@ -0,0 +1,103 @@
 +# SPDX-License-Identifier: GPL-2.0-only
 +
 +chip soc/intel/skylake
-+	# IGD Displays
-+	register "gfx" = "GMA_STATIC_DISPLAYS(0)"
-+
-+	register "panel_cfg" = "{
-+		.up_delay_ms		= 200,
-+		.down_delay_ms		=  50,
-+		.cycle_delay_ms		= 600,
-+		.backlight_on_delay_ms	=   1,
-+		.backlight_off_delay_ms	= 200,
-+		.backlight_pwm_hz	= 200,
-+	}"
-+
-+        # Power
-+        register "PmConfigSlpS3MinAssert" = "2"         # 50ms
-+        register "PmConfigSlpS4MinAssert" = "1"         # 1s
-+        register "PmConfigSlpSusMinAssert" = "3"        # 500ms
-+        register "PmConfigSlpAMinAssert" = "3"          # 2s
-+
 +	device domain 0 on
 +		device ref south_xhci on
 +			register "usb2_ports" = "{
@@ -1434,12 +1396,9 @@ index 0000000000..4b68ec3f49
 +		end
 +
 +		device ref sata on
-+			# SATA_0  - NC
-+			# SATA_1A - NC
-+			# SATA_1B - NC
-+			# SATA_2  - SATA caddy
-+			register "SataPortsEnable[3]" = "1"
-+			register "SataPortsDevSlp[3]" = "1"
++			# SATA_2 - JHDD1 SATA SSD
++			register "SataPortsEnable[2]" = "1"
++			register "SataPortsDevSlp[2]" = "1"
 +		end
 +
 +		# PCIe controller 1 - 1x4
@@ -1877,7 +1836,7 @@ index 0000000000..b1d96c5a76
 +AZALIA_ARRAY_SIZES;
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c
 new file mode 100644
-index 0000000000..085abebbcb
+index 0000000000..001e934b3a
 --- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c
 @@ -0,0 +1,44 @@
@@ -1915,7 +1874,7 @@ index 0000000000..085abebbcb
 +	spd_idx = gpio_get(GPP_F16) | gpio_get(GPP_F17) << 1 | gpio_get(GPP_F18) << 2 |
 +		  gpio_get(GPP_F19) << 3 | gpio_get(GPP_F20) << 4;
 +	printk(BIOS_DEBUG, "Detected MEMORY_ID = %d\n", spd_idx);
-+	snprintf(spd_name, sizeof spd_name, "spd_%d.bin", spd_idx);
++	snprintf(spd_name, sizeof(spd_name), "spd_%d.bin", spd_idx);
 +	mem_cfg->MemorySpdPtr00    = (uintptr_t)cbfs_map(spd_name, &spd_size);
 +
 +	/* Get SPD for memory slot (CH B) */
@@ -1927,31 +1886,13 @@ index 0000000000..085abebbcb
 +}
 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
 new file mode 100644
-index 0000000000..5f1c38bc03
+index 0000000000..d4afca20c4
 --- /dev/null
 +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
-@@ -0,0 +1,124 @@
+@@ -0,0 +1,103 @@
 +# SPDX-License-Identifier: GPL-2.0-only
 +
 +chip soc/intel/skylake
-+	# IGD Displays
-+	register "gfx" = "GMA_STATIC_DISPLAYS(0)"
-+
-+	register "panel_cfg" = "{
-+		.up_delay_ms		= 200,
-+		.down_delay_ms		=  50,
-+		.cycle_delay_ms		= 600,
-+		.backlight_on_delay_ms	=   1,
-+		.backlight_off_delay_ms	= 200,
-+		.backlight_pwm_hz	= 200,
-+	}"
-+
-+        # Power
-+        register "PmConfigSlpS3MinAssert" = "2"         # 50ms
-+        register "PmConfigSlpS4MinAssert" = "1"         # 1s
-+        register "PmConfigSlpSusMinAssert" = "3"        # 500ms
-+        register "PmConfigSlpAMinAssert" = "3"          # 2s
-+
 +	device domain 0 on
 +		device ref south_xhci on
 +			register "usb2_ports" = "{
@@ -1975,12 +1916,9 @@ index 0000000000..5f1c38bc03
 +		end
 +
 +		device ref sata on
-+			# SATA_0  - NC
-+			# SATA_1A - NC
-+			# SATA_1B - NC
-+			# SATA_2  - M.2 2280 SATA
-+			register "SataPortsEnable[3]" = "1"
-+			register "SataPortsDevSlp[3]" = "1"
++			# SATA_2 - Main M.2 SATA SSD
++			register "SataPortsEnable[2]" = "1"
++			register "SataPortsDevSlp[2]" = "1"
 +		end
 +
 +		# PCIe controller 1 - 1x2+2x1
@@ -2055,7 +1993,7 @@ index 0000000000..5f1c38bc03
 +		end
 +	end
 +end
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_0.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_0.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..86f39ddb55ea9fb58d5e5699637636ef597c734e
 GIT binary patch
@@ -2066,7 +2004,7 @@ YT>%dM8_BI;nL`dsaHtp+rc($20I8n}l>h($
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_1.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_1.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_1.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_1.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..df0f6e58b79286a4aeb690c5027adf7a1f5f668b
 GIT binary patch
@@ -2077,7 +2015,7 @@ Yx&j>hH(SqvWezd%<4`dwOs5b40B_I==>Px#
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_10.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_10.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_10.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_10.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..24f0d8992bc5244c62488da9633e4885f52f3e22
 GIT binary patch
@@ -2089,7 +2027,7 @@ PvjPw>z-1}5hGzN!nb#F$
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_11.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_11.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_11.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_11.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..59b6b9e78263c42aae367ab7d4a784d888f30efe
 GIT binary patch
@@ -2101,7 +2039,7 @@ YZDQ=?WT@*L<g5S$3~*UWt)ZEI0F{0fq5uE@
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_12.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_12.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_12.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_12.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..93be0ac94fc57222cd29e34eee11042d7842ac25
 GIT binary patch
@@ -2113,7 +2051,7 @@ VsD}a&Ff^?FkI#a;_$28g2LQ`x7jOUo
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_13.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_13.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_13.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_13.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..171a272bc734b72395622bf889d24972ef2d14f7
 GIT binary patch
@@ -2125,7 +2063,7 @@ VsD}a&Ff^?FkI#a;_$28g2LP>g7pDLK
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_14.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_14.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_14.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_14.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..a2a64a5e1adada3fc00b2e4edc60c77e610881a9
 GIT binary patch
@@ -2137,7 +2075,7 @@ GCj$V){1T)9
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_15.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_15.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_15.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_15.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..a2a64a5e1adada3fc00b2e4edc60c77e610881a9
 GIT binary patch
@@ -2149,7 +2087,7 @@ GCj$V){1T)9
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_16.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_16.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_16.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_16.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..a64a5a93fb4aef4d5f63d79cb2582731b9ac5063
 GIT binary patch
@@ -2159,7 +2097,7 @@ NcmZQz7zHCa1ONg600961
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_17.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_17.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_17.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_17.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..5f23e86606094d3e5d2011db902ebd4a500bbffa
 GIT binary patch
@@ -2171,7 +2109,7 @@ V%v%8n7#i08$7jJ^e3JB$0{}ZV7fApB
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_18.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_18.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_18.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_18.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..05633943eb5af166da66a2e1f4e74948f75782fb
 GIT binary patch
@@ -2183,7 +2121,7 @@ Vn70BDFf^?FkI#a;_$28g2LNS*7)Ag9
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_19.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_19.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_19.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_19.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..857da9c9828cdac842329f6cef4539283777268b
 GIT binary patch
@@ -2195,7 +2133,7 @@ GP6hy+m=i1j
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_2.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_2.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_2.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_2.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..b5b14cf2dfa06ae183b0379da4dc825129e1589f
 GIT binary patch
@@ -2206,7 +2144,7 @@ XT>%b$v*cE=%%S%6I8=-Z(<uZ1pPdSg
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_20.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_20.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_20.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_20.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..a64a5a93fb4aef4d5f63d79cb2582731b9ac5063
 GIT binary patch
@@ -2216,7 +2154,7 @@ NcmZQz7zHCa1ONg600961
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_3.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_3.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_3.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_3.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..d73736008af1eb67456b2fd66f7dec3b6669a442
 GIT binary patch
@@ -2227,7 +2165,7 @@ YT>%b$+tzbnnL|62aHtp+rc($20QGqazW@LL
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_4.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_4.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_4.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_4.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..829f149547bc24859646c33d5926938d7a1b90cb
 GIT binary patch
@@ -2238,7 +2176,7 @@ XT>%b$o8(ro%%OI594bbI=@bG0z{d&v
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_5.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_5.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_5.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_5.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..a64a5a93fb4aef4d5f63d79cb2582731b9ac5063
 GIT binary patch
@@ -2248,7 +2186,7 @@ NcmZQz7zHCa1ONg600961
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_6.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_6.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_6.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_6.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..a64a5a93fb4aef4d5f63d79cb2582731b9ac5063
 GIT binary patch
@@ -2258,7 +2196,7 @@ NcmZQz7zHCa1ONg600961
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_7.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_7.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_7.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_7.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..940f1e3cd8e5bd9ea32a82a14edcdcbc8132d8c7
 GIT binary patch
@@ -2270,7 +2208,7 @@ E020*^DF6Tf
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_8.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_8.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_8.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_8.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..30c84410d417ef7afa8705c93cdb64a9f4e915a0
 GIT binary patch
@@ -2282,7 +2220,7 @@ H2PXpn6CD!Q
 literal 0
 HcmV?d00001
 
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_9.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_9.bin
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_9.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_9.bin
 new file mode 100644
 index 0000000000000000000000000000000000000000..7facef55b93fe1f67411c00bab84862769461f63
 GIT binary patch
diff --git a/config/coreboot/next/patches/0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch b/config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
similarity index 99%
rename from config/coreboot/next/patches/0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
rename to config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
index e490a807..77513b77 100644
--- a/config/coreboot/next/patches/0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
+++ b/config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
@@ -1,7 +1,7 @@
-From 534d696a570a50057153669247933ec1a4a2480f Mon Sep 17 00:00:00 2001
+From 2527c4a5131d7b33e43bbc03a94921e7e59b4b02 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 30 Sep 2024 20:44:38 -0400
-Subject: [PATCH 5/8] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
+Subject: [PATCH 04/11] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
 
 Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
diff --git a/config/coreboot/next/patches/0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
similarity index 92%
rename from config/coreboot/next/patches/0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
rename to config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
index 51bbfa5c..d5896fdc 100644
--- a/config/coreboot/next/patches/0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ b/config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -1,7 +1,7 @@
-From 851043846f589e718a69009a6b157b4ff5315471 Mon Sep 17 00:00:00 2001
+From 27b2f2bc24e5e860b87119c963e534fb0d3e55f2 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 6/8] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 05/11] util/ifdtool: add --nuke flag (all 0xFF on region)
 
 When this option is used, the region's contents are overwritten
 with all ones (0xFF).
@@ -20,7 +20,7 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 83 insertions(+), 31 deletions(-)
 
 diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index ace05e2265..ba292fd142 100644
+index 94105efe52..0706496af2 100644
 --- a/util/ifdtool/ifdtool.c
 +++ b/util/ifdtool/ifdtool.c
 @@ -2230,6 +2230,7 @@ static void print_usage(const char *name)
@@ -98,9 +98,9 @@ index ace05e2265..ba292fd142 100644
  	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
 +	int mode_nuke = 0;
  	int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
- 	char *region_type_string = NULL, *region_fname = NULL;
- 	const char *layout_fname = NULL;
-@@ -2280,6 +2336,7 @@ int main(int argc, char *argv[])
+ 	char *region_type_string = NULL, *region_fname = NULL, *layout_fname = NULL;
+ 	char *new_filename = NULL;
+@@ -2279,6 +2335,7 @@ int main(int argc, char *argv[])
  		{"validate", 0, NULL, 't'},
  		{"setpchstrap", 1, NULL, 'S'},
  		{"newvalue", 1, NULL, 'V'},
@@ -108,7 +108,7 @@ index ace05e2265..ba292fd142 100644
  		{0, 0, 0, 0}
  	};
  
-@@ -2329,35 +2386,8 @@ int main(int argc, char *argv[])
+@@ -2328,35 +2385,8 @@ int main(int argc, char *argv[])
  			region_fname++;
  			// Descriptor, BIOS, ME, GbE, Platform
  			// valid type?
@@ -146,7 +146,7 @@ index ace05e2265..ba292fd142 100644
  				fprintf(stderr, "No such region type: '%s'\n\n",
  					region_type_string);
  				fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
-@@ -2534,6 +2564,22 @@ int main(int argc, char *argv[])
+@@ -2533,6 +2563,22 @@ int main(int argc, char *argv[])
  		case 't':
  			mode_validate = 1;
  			break;
@@ -169,7 +169,7 @@ index ace05e2265..ba292fd142 100644
  		case 'v':
  			print_version();
  			exit(EXIT_SUCCESS);
-@@ -2553,7 +2599,8 @@ int main(int argc, char *argv[])
+@@ -2552,7 +2598,8 @@ int main(int argc, char *argv[])
  	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
  			mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
  			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
@@ -179,7 +179,7 @@ index ace05e2265..ba292fd142 100644
  		fprintf(stderr, "You may not specify more than one mode.\n\n");
  		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
  		exit(EXIT_FAILURE);
-@@ -2562,7 +2609,8 @@ int main(int argc, char *argv[])
+@@ -2561,7 +2608,8 @@ int main(int argc, char *argv[])
  	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
  			mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
  			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
@@ -189,7 +189,7 @@ index ace05e2265..ba292fd142 100644
  		fprintf(stderr, "You need to specify a mode.\n\n");
  		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
  		exit(EXIT_FAILURE);
-@@ -2675,6 +2723,10 @@ int main(int argc, char *argv[])
+@@ -2674,6 +2722,10 @@ int main(int argc, char *argv[])
  		write_image(new_filename, image, size);
  	}
  
diff --git a/config/coreboot/next/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch
similarity index 90%
rename from config/coreboot/next/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
rename to config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch
index 47f549a1..3ff12724 100644
--- a/config/coreboot/next/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ b/config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -1,7 +1,7 @@
-From fa6ac5b7f134b98a4f68f0f6b8bdeb6c7b6871ab Mon Sep 17 00:00:00 2001
+From 8230acfb9e1f692202b306ffb10fe89f783ab4e8 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 7/8] Remove warning for coreboot images built without a
+Subject: [PATCH 06/11] Remove warning for coreboot images built without a
  payload
 
 I added this in upstream to prevent people from accidentally flashing
diff --git a/config/coreboot/next/patches/0008-mb-dell-optiplex_780-Add-USFF-variant.patch b/config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch
similarity index 98%
rename from config/coreboot/next/patches/0008-mb-dell-optiplex_780-Add-USFF-variant.patch
rename to config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch
index d49e0e9d..637b7266 100644
--- a/config/coreboot/next/patches/0008-mb-dell-optiplex_780-Add-USFF-variant.patch
+++ b/config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch
@@ -1,7 +1,7 @@
-From 636cb8ae8610cd99b637448add778c8e4f364f3e Mon Sep 17 00:00:00 2001
+From 41b93b8786ba14830648cd166f86b6317d655359 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Wed, 30 Oct 2024 20:55:25 -0600
-Subject: [PATCH 8/8] mb/dell/optiplex_780: Add USFF variant
+Subject: [PATCH 07/11] mb/dell/optiplex_780: Add USFF variant
 
 Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
diff --git a/config/coreboot/next/patches/0010-dell-3050micro-disable-nvme-hotplug.patch b/config/coreboot/next/patches/0008-dell-3050micro-disable-nvme-hotplug.patch
similarity index 77%
rename from config/coreboot/next/patches/0010-dell-3050micro-disable-nvme-hotplug.patch
rename to config/coreboot/next/patches/0008-dell-3050micro-disable-nvme-hotplug.patch
index 0408d114..daeb0fa1 100644
--- a/config/coreboot/next/patches/0010-dell-3050micro-disable-nvme-hotplug.patch
+++ b/config/coreboot/next/patches/0008-dell-3050micro-disable-nvme-hotplug.patch
@@ -1,7 +1,7 @@
-From adfeaeabcf98878814b463f14aba7871721d7606 Mon Sep 17 00:00:00 2001
+From c8192c52b2bfa93aeb6c6639476ca217e33c4313 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Wed, 11 Dec 2024 01:06:01 +0000
-Subject: [PATCH 1/1] dell/3050micro: disable nvme hotplug
+Subject: [PATCH 08/11] dell/3050micro: disable nvme hotplug
 
 in my testing, when running my 3050micro for a few days,
 the nvme would sometimes randomly rename.
@@ -24,19 +24,11 @@ new device (the one that you booted from).
 the fix there was to disable hotplugging on that pci-e slot
 for the nvme, so apply the same fix here for 3050 micro
 
-Signed-off-by: Leah Rowe <info@minifree.org>
+Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
- 3rdparty/vboot                                 | 2 +-
  src/mainboard/dell/optiplex_3050/devicetree.cb | 4 +++-
- 2 files changed, 4 insertions(+), 2 deletions(-)
+ 1 file changed, 3 insertions(+), 1 deletion(-)
 
-diff --git a/3rdparty/vboot b/3rdparty/vboot
-index f1f70f46dc..902fe8af96 160000
---- a/3rdparty/vboot
-+++ b/3rdparty/vboot
-@@ -1 +1 @@
--Subproject commit f1f70f46dc5482bb7c654e53ed58d4001e386df2
-+Subproject commit 902fe8af96ad662fac127cb8f51596491cf8272f
 diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb
 index 039709aa4a..0678ed1765 100644
 --- a/src/mainboard/dell/optiplex_3050/devicetree.cb
diff --git a/config/coreboot/next/patches/0011-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch b/config/coreboot/next/patches/0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch
similarity index 95%
rename from config/coreboot/next/patches/0011-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch
rename to config/coreboot/next/patches/0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch
index 542b6608..cd6cdb02 100644
--- a/config/coreboot/next/patches/0011-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch
+++ b/config/coreboot/next/patches/0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch
@@ -1,7 +1,7 @@
-From 91c7d772f4803a94950b3224ccd11ffd162b4e36 Mon Sep 17 00:00:00 2001
+From 35295d97b08ee659b6770ce39003732a4bdfb6a0 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Wed, 18 Dec 2024 02:06:18 +0000
-Subject: [PATCH 1/1] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN
+Subject: [PATCH 09/11] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN
 
 This is used by lbmk to know where a tb.bin file goes,
 when extracting and padding TBT.bin from Lenovo ThunderBolt
diff --git a/config/coreboot/next/patches/0009-sata-fix.patch b/config/coreboot/next/patches/0009-sata-fix.patch
deleted file mode 100644
index d67b38eb..00000000
--- a/config/coreboot/next/patches/0009-sata-fix.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From fb58f84592fbba25abafaccd9e868afa107c1051 Mon Sep 17 00:00:00 2001
-From: Mate Kukri <km@mkukri.xyz>
-Date: Thu, 5 Dec 2024 08:11:05 +0000
-Subject: [PATCH] sata fix
-
-Change-Id: I0eab7aaf9cf00085c97c637c9ffa14e38cf6d738
----
- .../lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb | 9 +++------
- .../sklkbl_thinkpad/variants/t480s/overridetree.cb       | 9 +++------
- 2 files changed, 6 insertions(+), 12 deletions(-)
-
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
-index 4b68ec3f49..2f0b20d91a 100644
---- a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
-@@ -42,12 +42,9 @@ chip soc/intel/skylake
- 		end
- 
- 		device ref sata on
--			# SATA_0  - NC
--			# SATA_1A - NC
--			# SATA_1B - NC
--			# SATA_2  - SATA caddy
--			register "SataPortsEnable[3]" = "1"
--			register "SataPortsDevSlp[3]" = "1"
-+			# SATA_2 - JHDD1 SATA SSD
-+			register "SataPortsEnable[2]" = "1"
-+			register "SataPortsDevSlp[2]" = "1"
- 		end
- 
- 		# PCIe controller 1 - 1x4
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
-index 5f1c38bc03..cea5e485d2 100644
---- a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
-@@ -42,12 +42,9 @@ chip soc/intel/skylake
- 		end
- 
- 		device ref sata on
--			# SATA_0  - NC
--			# SATA_1A - NC
--			# SATA_1B - NC
--			# SATA_2  - M.2 2280 SATA
--			register "SataPortsEnable[3]" = "1"
--			register "SataPortsDevSlp[3]" = "1"
-+			# SATA_2 - Main M.2 SATA SSD
-+			register "SataPortsEnable[2]" = "1"
-+			register "SataPortsDevSlp[2]" = "1"
- 		end
- 
- 		# PCIe controller 1 - 1x2+2x1
--- 
-2.39.5
-
diff --git a/config/coreboot/next/patches/0012-soc-intel-skylake-Don-t-compress-FSP-S.patch b/config/coreboot/next/patches/0010-soc-intel-skylake-Don-t-compress-FSP-S.patch
similarity index 89%
rename from config/coreboot/next/patches/0012-soc-intel-skylake-Don-t-compress-FSP-S.patch
rename to config/coreboot/next/patches/0010-soc-intel-skylake-Don-t-compress-FSP-S.patch
index a96f8ba8..228170eb 100644
--- a/config/coreboot/next/patches/0012-soc-intel-skylake-Don-t-compress-FSP-S.patch
+++ b/config/coreboot/next/patches/0010-soc-intel-skylake-Don-t-compress-FSP-S.patch
@@ -1,7 +1,7 @@
-From 68f16ef46890dd08a2d03034ad6f352699282e00 Mon Sep 17 00:00:00 2001
+From f08dbaacf747eb198bbc8f83e0220ca803f19116 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Thu, 26 Dec 2024 19:45:20 +0000
-Subject: [PATCH 1/1] soc/intel/skylake: Don't compress FSP-S
+Subject: [PATCH 10/11] soc/intel/skylake: Don't compress FSP-S
 
 Build systems like lbmk need to reproducibly insert
 certain vendor files on release images.
diff --git a/config/coreboot/next/patches/0013-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch b/config/coreboot/next/patches/0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch
similarity index 94%
rename from config/coreboot/next/patches/0013-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch
rename to config/coreboot/next/patches/0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch
index 6ea65c8d..7dae2d6a 100644
--- a/config/coreboot/next/patches/0013-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch
+++ b/config/coreboot/next/patches/0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch
@@ -1,7 +1,7 @@
-From aa13bb380d8286373089de291b62c6070df20573 Mon Sep 17 00:00:00 2001
+From 12ff6e798d1cefc5b888e6035e52bf6d70c9ca47 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Tue, 31 Dec 2024 01:40:42 +0000
-Subject: [PATCH 1/1] soc/intel/pmc: Hardcoded poweroff after power fail
+Subject: [PATCH 11/11] soc/intel/pmc: Hardcoded poweroff after power fail
 
 Coreboot can set the power state for power on after previous
 power failure, based on the option table. On the ThinkPad T480,
@@ -31,7 +31,7 @@ Signed-off-by: Leah Rowe <info@minifree.org>
  1 file changed, 4 insertions(+), 32 deletions(-)
 
 diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
-index c51a960854..a836932fe5 100644
+index 0fadd6e409..843581b285 100644
 --- a/src/soc/intel/common/block/pmc/pmclib.c
 +++ b/src/soc/intel/common/block/pmc/pmclib.c
 @@ -760,38 +760,10 @@ void pmc_clear_pmcon_sts(void)
diff --git a/config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch b/config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch
new file mode 100644
index 00000000..5e4e6edb
--- /dev/null
+++ b/config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch
@@ -0,0 +1,32 @@
+From 916c7b027faba625b922e74e45e50f9ceab64a64 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 6 Jan 2025 01:16:01 +0000
+Subject: [PATCH 1/1] ec/dasharo: Comment EC_DASHARO_EC_FLASH_SIZE
+
+We don't use anything dasharo in Libreboot.
+
+This patch prevents the following config item appearing
+in T480 and 3050 Micro configs:
+
+CONFIG_EC_DASHARO_EC_FLASH_SIZE=0x20000
+
+Otherwise, make-oldconfig adds it automatically.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/ec/dasharo/ec/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/ec/dasharo/ec/Kconfig b/src/ec/dasharo/ec/Kconfig
+index 901d3ce514..071e37f95e 100644
+--- a/src/ec/dasharo/ec/Kconfig
++++ b/src/ec/dasharo/ec/Kconfig
+@@ -28,4 +28,4 @@ config EC_DASHARO_EC_UPDATE_FILE
+ 
+ config EC_DASHARO_EC_FLASH_SIZE
+ 	hex
+-	default 0x20000
++	# default 0x20000
+-- 
+2.39.5
+
diff --git a/config/coreboot/next/patches/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch b/config/coreboot/next/patches/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch
new file mode 100644
index 00000000..84370089
--- /dev/null
+++ b/config/coreboot/next/patches/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch
@@ -0,0 +1,61 @@
+From 00b6459a9b360b16529036d9b1e10c977228a7ff Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 6 Jan 2025 01:36:23 +0000
+Subject: [PATCH 1/1] src/intel/skylake: Disable stack overflow debug options
+
+The option was appearing in T480/3050micro configs of lbmk,
+after updating on the coreboot/next uprev for 20241206 rev8:
+
+CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y
+
+I did some digging. See coreboot commit:
+
+commit 51cc2bacb6b07279b97e9934d079060475481fb6
+Author: Subrata Banik <subratabanik@google.com>
+Date:   Fri Dec 13 13:07:28 2024 +0530
+
+    soc/intel/pantherlake: Disable stack overflow debug options
+
+Well now:
+
+I'm disabling this behaviour on Skylake, for the same
+behaviour, because I want as few behaviour changes in general,
+as possible, for the rev8 release.
+
+According to Subrata's patch, which was for Pantherlake,
+without this change, stack corruption can occur on verstage
+and romstage early on. Please look at that coreboot patch,
+referenced above, for clarity.
+
+I see no harm in disabling this option for Skylake, since
+the behaviour that it otherwise enables was not present
+before.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/soc/intel/skylake/Kconfig | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
+index 8e25f796ed..7d324e15ea 100644
+--- a/src/soc/intel/skylake/Kconfig
++++ b/src/soc/intel/skylake/Kconfig
+@@ -130,6 +130,15 @@ config DCACHE_RAM_SIZE
+ 	  The size of the cache-as-ram region required during bootblock
+ 	  and/or romstage.
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++	bool
++	default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++	bool
++	default n
++
+ config DCACHE_BSP_STACK_SIZE
+ 	hex
+ 	default 0x20400 if FSP_USES_CB_STACK
+-- 
+2.39.5
+
diff --git a/config/coreboot/next/patches/0014-src-intel-x4x-Disable-stack-overflow-debug.patch b/config/coreboot/next/patches/0014-src-intel-x4x-Disable-stack-overflow-debug.patch
new file mode 100644
index 00000000..e2eae2a9
--- /dev/null
+++ b/config/coreboot/next/patches/0014-src-intel-x4x-Disable-stack-overflow-debug.patch
@@ -0,0 +1,33 @@
+From 5671d54d347b110ffade5b8b6e2d052612a8716c Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 6 Jan 2025 01:53:53 +0000
+Subject: [PATCH 1/1] src/intel/x4x: Disable stack overflow debug
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/northbridge/intel/x4x/Kconfig | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
+index 097e11126c..7e4e14cf94 100644
+--- a/src/northbridge/intel/x4x/Kconfig
++++ b/src/northbridge/intel/x4x/Kconfig
+@@ -28,6 +28,15 @@ config ECAM_MMCONF_BUS_NUMBER
+ 	int
+ 	default 256
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++	bool
++	default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++	bool
++	default n
++
+ # This number must be equal or lower than what's reported in ACPI PCI _CRS
+ config DOMAIN_RESOURCE_32BIT_LIMIT
+ 	default 0xfec00000
+-- 
+2.39.5
+
diff --git a/config/coreboot/next/target.cfg b/config/coreboot/next/target.cfg
index 371ff259..1d01e623 100644
--- a/config/coreboot/next/target.cfg
+++ b/config/coreboot/next/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="next"
-rev="9992a98c671d356b9770282df5d58a302b6dbeda"
+rev="2f1e4e5e8515dd350cc9d68b48d32a5b6b02ae6a"
diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
index af1b04ef..5191da57 100644
--- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
@@ -85,6 +85,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -177,7 +178,6 @@ CONFIG_HAVE_IFD_BIN=y
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_E460 is not set
 CONFIG_BOARD_LENOVO_T480=y
 # CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
@@ -219,8 +219,8 @@ CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
 CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin"
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -608,6 +608,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
index 46306c80..7596816a 100644
--- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
@@ -85,6 +85,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -175,7 +176,6 @@ CONFIG_HAVE_IFD_BIN=y
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_E460 is not set
 CONFIG_BOARD_LENOVO_T480=y
 # CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
@@ -217,8 +217,8 @@ CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
 CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin"
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -600,6 +600,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb
index f379acda..5dea5962 100644
--- a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb
@@ -85,6 +85,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -177,7 +178,6 @@ CONFIG_HAVE_IFD_BIN=y
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_E460 is not set
 CONFIG_BOARD_LENOVO_T480=y
 # CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
@@ -219,8 +219,8 @@ CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
 CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin"
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -608,6 +608,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode
index 3b70bc4e..1aedc109 100644
--- a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode
@@ -85,6 +85,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -175,7 +176,6 @@ CONFIG_HAVE_IFD_BIN=y
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_E460 is not set
 CONFIG_BOARD_LENOVO_T480=y
 # CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
@@ -217,8 +217,8 @@ CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
 CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin"
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -600,6 +600,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
index b88dd06c..2505b389 100644
--- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
@@ -85,6 +85,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -177,7 +178,6 @@ CONFIG_HAVE_IFD_BIN=y
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_E460 is not set
 # CONFIG_BOARD_LENOVO_T480 is not set
 CONFIG_BOARD_LENOVO_T480S=y
 # CONFIG_BOARD_LENOVO_T400 is not set
@@ -219,8 +219,8 @@ CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
 CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin"
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -608,6 +608,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
index a1e48c43..407be629 100644
--- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
@@ -85,6 +85,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -175,7 +176,6 @@ CONFIG_HAVE_IFD_BIN=y
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_E460 is not set
 # CONFIG_BOARD_LENOVO_T480 is not set
 CONFIG_BOARD_LENOVO_T480S=y
 # CONFIG_BOARD_LENOVO_T400 is not set
@@ -217,8 +217,8 @@ CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
 CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin"
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -600,6 +600,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb
index bf364714..ee006e59 100644
--- a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb
@@ -85,6 +85,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -177,7 +178,6 @@ CONFIG_HAVE_IFD_BIN=y
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_E460 is not set
 # CONFIG_BOARD_LENOVO_T480 is not set
 CONFIG_BOARD_LENOVO_T480S=y
 # CONFIG_BOARD_LENOVO_T400 is not set
@@ -219,8 +219,8 @@ CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
 CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin"
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -608,6 +608,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode
index ad6e60ee..30a69e6a 100644
--- a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode
@@ -85,6 +85,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
@@ -175,7 +176,6 @@ CONFIG_HAVE_IFD_BIN=y
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_E460 is not set
 # CONFIG_BOARD_LENOVO_T480 is not set
 CONFIG_BOARD_LENOVO_T480S=y
 # CONFIG_BOARD_LENOVO_T400 is not set
@@ -217,8 +217,8 @@ CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
 CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
 CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
 CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin"
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_TTYS0_BAUD=115200
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
 CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
 CONFIG_D3COLD_SUPPORT=y
 CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
@@ -600,6 +600,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
diff --git a/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg b/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg
deleted file mode 100644
index aec8ffba..00000000
--- a/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20230628.tar.gz"
-subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20230628.tar.gz"
-subhash="d726e69ebd8b8110690e3aff8d1919b43b0a2185efdeb9131ea8d89d321ca3a318a89c721ea740ae366f31ed3d1c11c2906f8807ee8a190e6f67fe5b2023cea4"
diff --git a/config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg b/config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg
new file mode 100644
index 00000000..30baf001
--- /dev/null
+++ b/config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20241212.tar.gz"
+subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20241212.tar.gz"
+subhash="daa4243f927451ac18c337cf17c27849e68329b3f7eb25b8c3379fda9c6a484201b73d4ffccab89a0ae22cc5e432f141ba149015a003834b0515bdb3d4efe0a8"
diff --git a/config/submodule/coreboot/next/fsp/module.cfg b/config/submodule/coreboot/next/fsp/module.cfg
index c402d9dc..a380ddda 100644
--- a/config/submodule/coreboot/next/fsp/module.cfg
+++ b/config/submodule/coreboot/next/fsp/module.cfg
@@ -2,4 +2,4 @@
 
 subrepo="https://review.coreboot.org/fsp.git"
 subrepo_bkup="https://github.com/coreboot/fsp"
-subhash="d7931859bfb1f7949bb455d53b9494dd731e9642"
+subhash="909cf43ad6ccebb6adee482bc0a4f098c32c9a6d"
diff --git a/config/submodule/coreboot/next/module.list b/config/submodule/coreboot/next/module.list
index 1cc88fd6..36f05dbe 100644
--- a/config/submodule/coreboot/next/module.list
+++ b/config/submodule/coreboot/next/module.list
@@ -9,4 +9,4 @@ util/crossgcc/tarballs/gmp-6.3.0.tar.xz
 util/crossgcc/tarballs/mpc-1.3.1.tar.gz
 util/crossgcc/tarballs/mpfr-4.2.1.tar.xz
 util/crossgcc/tarballs/nasm-2.16.03.tar.bz2
-util/crossgcc/tarballs/acpica-unix-20230628.tar.gz
+util/crossgcc/tarballs/acpica-unix-20241212.tar.gz
diff --git a/config/submodule/coreboot/next/vboot/module.cfg b/config/submodule/coreboot/next/vboot/module.cfg
index dc8d630b..d13a1b29 100644
--- a/config/submodule/coreboot/next/vboot/module.cfg
+++ b/config/submodule/coreboot/next/vboot/module.cfg
@@ -2,4 +2,4 @@
 
 subrepo="https://review.coreboot.org/vboot.git"
 subrepo_bkup="https://github.com/coreboot/vboot"
-subhash="f1f70f46dc5482bb7c654e53ed58d4001e386df2"
+subhash="3f94e2c7ed58c4e67d6e7dc6052ec615dbbb9bb4"

From 4210ee68ea25dd41c05f3a2a6d8880e5aedeb2c3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 Jan 2025 03:54:38 +0000
Subject: [PATCH 1038/1549] lib.sh: Much safer python version check

See:
https://docs.python.org/3/library/sys.html#sys.version_info

The sys.version_info tuple is a more reliable way to
get the version. Our previous logic assumed that Python
would always output "Python versionnumber", but this may
not always be how it works. We've seen this for example
where Debian modifies some GNU toolchains to include Debian
something in the output.

Python has a standard method built in for outputting exact
the information we need. In my system, what I got was this:

(3, 11, 2, 'final', 0)

That output was from running this command:

python -c 'import sys; print(sys.version_info[:])'

This is much more robust, so use this instead.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 894a2cac..b43d83f3 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -82,7 +82,13 @@ pyver="2"
 python="python3"
 command -v python3 1>/dev/null || python="python"
 command -v $python 1>/dev/null || pyver=""
-[ -n "$pyver" ] && pyver="$($python --version | awk '{print $2}')"
+[ -z "$pyver" ] || \
+	python -c 'import sys; print(sys.version_info[:])' 1>/dev/null \
+	    2>/dev/null || $err "Cannot determine which Python version."
+[ -n "$pyver" ] && \
+	pyver="`python -c 'import sys; print(sys.version_info[:])' | \
+	    awk '{print $1}'`" && \
+	pyver="${pyver#(}" && pyver="${pyver%,}"
 if [ "${pyver%%.*}" != "3" ]; then
 	printf "Wrong python version, or python missing. Must be v 3.x.\n" 1>&2
 	exit 1

From de6d2f556f16cae1a2c038f50d90a3a3945e3d42 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 Jan 2025 16:53:12 +0000
Subject: [PATCH 1039/1549] pico-sdk: Import picotool as a dependency

We were previously not handling picotool at all, and
pico-sdk would download picotool itself, at build time.

This means that the source archive, if created, would
not contain picotool. While not strictly required, for
complete corresponding source, since it's a toolchain
and not the actual pico-serprog firmware, it is my policy
that releases must include full corresponding source code,
when it is feasible to do so.

I must say, I intensely dislike cmake, with such burning
passion; I am thoroughly displeased by how hacky this is,
but it works and now nothing is in my way for a Libreboot
20241206 rev8 release!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/pico-serprog/mkhelper.cfg  |  1 +
 config/git/pico-serprog/pkg.cfg        |  2 +-
 config/git/pico-serprog/rp2040-serprog |  1 -
 config/git/picotool/pkg.cfg            |  5 +++++
 include/rom.sh                         | 16 ++++++++++++++++
 5 files changed, 23 insertions(+), 2 deletions(-)
 delete mode 120000 config/git/pico-serprog/rp2040-serprog
 create mode 100644 config/git/picotool/pkg.cfg

diff --git a/config/data/pico-serprog/mkhelper.cfg b/config/data/pico-serprog/mkhelper.cfg
index ccfdc0df..f4733dd9 100644
--- a/config/data/pico-serprog/mkhelper.cfg
+++ b/config/data/pico-serprog/mkhelper.cfg
@@ -7,3 +7,4 @@ serx="$sersrc/build/pico_serprog.uf2"
 picosdk="src/pico-sdk"
 serdir="$picosdk/src/boards/include/boards"
 premake="mkserprog pico"
+picotool="$PWD/src/picotool/xbmkbin"
diff --git a/config/git/pico-serprog/pkg.cfg b/config/git/pico-serprog/pkg.cfg
index 7c54e9c2..64c26297 100644
--- a/config/git/pico-serprog/pkg.cfg
+++ b/config/git/pico-serprog/pkg.cfg
@@ -3,4 +3,4 @@
 rev="e75e3a20e63269a5e3189bc2e49a6a81d45a636a"
 url="https://codeberg.org/libreboot/pico-serprog"
 bkup_url="https://git.disroot.org/libreboot/pico-serprog"
-depend="pico-sdk"
+depend="pico-sdk picotool"
diff --git a/config/git/pico-serprog/rp2040-serprog b/config/git/pico-serprog/rp2040-serprog
deleted file mode 120000
index 25af91dc..00000000
--- a/config/git/pico-serprog/rp2040-serprog
+++ /dev/null
@@ -1 +0,0 @@
-config/git/rp2040-serprog
\ No newline at end of file
diff --git a/config/git/picotool/pkg.cfg b/config/git/picotool/pkg.cfg
new file mode 100644
index 00000000..3711ce04
--- /dev/null
+++ b/config/git/picotool/pkg.cfg
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+rev="df21059f7ca6f1babc7f1f3b92122cacffc85951"
+url="https://github.com/raspberrypi/picotool"
+bkup_url="https://codeberg.org/libreboot/picotool"
diff --git a/include/rom.sh b/include/rom.sh
index 2a7bc837..52e39b52 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -7,6 +7,9 @@
 
 mkserprog()
 {
+	[ $# -lt 1 ] && $err "mkserprog: no arguments provided"
+	[ "$1" = "pico" ] && mkpicotool
+
 	[ "$_f" = "-d" ] && return 0 # dry run
 	basename -as .h "$serdir/"*.h > "$TMPDIR/ser" || $err "!mk $1 $TMPDIR"
 
@@ -20,6 +23,7 @@ mkserprog()
 			ln -srf "$sersrc/build_$pt/" "$sersrc/build") \
 		    && x_ cmake -DPICO_BOARD="$sertarget" \
 		    -DPICO_SDK_PATH="$picosdk" -B "$sersrc/build" "$sersrc" \
+		    -Dpicotool_DIR="$picotool/picotool" \
 		    && x_ cmake --build "$sersrc/build"
 		[ "$1" = "stm32" ] && x_ make -C "$sersrc" \
 		    libopencm3-just-make BOARD=$sertarget && x_ make -C \
@@ -30,6 +34,18 @@ mkserprog()
 	[ "$XBMK_RELEASE" = "y" ] && mkrom_tarball "bin/serprog_$1"; return 0
 }
 
+mkpicotool()
+{
+	rm -Rf "$picotool" || $err "Can't remove picotool builddir"
+	(
+	x_ cd src/picotool
+	cmake -DCMAKE_INSTALL_PREFIX=xbmkbin -DPICOTOOL_FLAT_INSTALL=1 \
+	    -DPICO_SDK_PATH=../pico-sdk || \
+	    $err "Can't prep picotool"
+	make install || $err "Can't build picotool"; :
+	) || $err "Can't build picotool"; :
+}
+
 copyps1bios()
 {
 	x_ rm -Rf bin/playstation

From d4cc94d6b449060db7c2224e584b2e84d04e6d1f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 Jan 2025 18:15:22 +0000
Subject: [PATCH 1040/1549] rom.sh: don't run mkpicotool on dry builds

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/rom.sh b/include/rom.sh
index 52e39b52..3e8c9c9b 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -8,9 +8,10 @@
 mkserprog()
 {
 	[ $# -lt 1 ] && $err "mkserprog: no arguments provided"
+	[ "$_f" = "-d" ] && return 0 # dry run
+
 	[ "$1" = "pico" ] && mkpicotool
 
-	[ "$_f" = "-d" ] && return 0 # dry run
 	basename -as .h "$serdir/"*.h > "$TMPDIR/ser" || $err "!mk $1 $TMPDIR"
 
 	while read -r sertarget; do

From 3c9f4be76f61c80060b4238eff96ef268272cffb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 Jan 2025 19:04:02 +0000
Subject: [PATCH 1041/1549] Libreboot 20241206, 8th revision

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...-the-name-libreboot-in-the-grub-menu.patch |  2 +-
 ...-the-name-libreboot-in-the-grub-menu.patch |  2 +-
 ...-the-name-libreboot-in-the-grub-menu.patch |  2 +-
 ...ibreboot-version-in-the-SeaBIOS-menu.patch | 26 +++++++++++++++++++
 config/submodule/docs/html/module.cfg         |  2 +-
 config/submodule/docs/img/module.cfg          |  2 +-
 ...randing-version-on-the-bootflow-menu.patch |  2 +-
 ...randing-version-on-the-bootflow-menu.patch |  2 +-
 ...randing-version-on-the-bootflow-menu.patch |  2 +-
 9 files changed, 34 insertions(+), 8 deletions(-)
 create mode 100644 config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch

diff --git a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 6b0665db..d8c3b33f 100644
--- a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..ff16e0f2e 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20241206 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20241206, 8th revision (GRUB menu): https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 5036a859..259301cc 100644
--- a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..ff16e0f2e 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20241206 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20241206, 8th revision (GRUB menu): https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index c6da216d..23f84212 100644
--- a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index bd4431000..ff16e0f2e 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20241206 release, based on coreboot.    https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 20241206, 8th revision (GRUB menu): https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
new file mode 100644
index 00000000..5cf60763
--- /dev/null
+++ b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
@@ -0,0 +1,26 @@
+From ebd8293eb1af20c204beb3aa1394865185e2f3f0 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 6 Jan 2025 18:49:58 +0000
+Subject: [PATCH 1/1] Print the Libreboot version in the SeaBIOS menu
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/bootsplash.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/bootsplash.c b/src/bootsplash.c
+index 538b316d..8746098c 100644
+--- a/src/bootsplash.c
++++ b/src/bootsplash.c
+@@ -48,7 +48,7 @@ enable_vga_console(void)
+     call16_int10(&br);
+ 
+     // Write to screen.
+-    printf("SeaBIOS (version %s)\n", VERSION);
++    printf("Libreboot 20241206, 8th revision (SeaBIOS menu): https://libreboot.org/\n");
+     display_uuid();
+ }
+ 
+-- 
+2.39.5
+
diff --git a/config/submodule/docs/html/module.cfg b/config/submodule/docs/html/module.cfg
index 9d2b20c4..c9ff5c75 100644
--- a/config/submodule/docs/html/module.cfg
+++ b/config/submodule/docs/html/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subhash="3787d9eade2409ff5192fb86bd4c6c5b025c3c5a"
+subhash="090e58d4f84125bdcf035efcadd1cd5c13a03c77"
 subrepo="https://codeberg.org/libreboot/lbwww"
 subrepo_bkup="https://git.disroot.org/libreboot/lbwww"
diff --git a/config/submodule/docs/img/module.cfg b/config/submodule/docs/img/module.cfg
index c65a6dbf..034de191 100644
--- a/config/submodule/docs/img/module.cfg
+++ b/config/submodule/docs/img/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subhash="8dcb3e11a579e29bc5a16ba1ba5b473164d2e9e4"
+subhash="2bf719e6542c3ffa6df0bdcb77ef1619cb2dce01"
 subrepo="https://codeberg.org/libreboot/lbwww-img"
 subrepo_bkup="https://git.disroot.org/libreboot/lbwww-img"
diff --git a/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch
index 53a9b90d..2f903cd7 100644
--- a/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch
+++ b/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch
@@ -18,7 +18,7 @@ index 84831915a2..8e26ec2aef 100644
  	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
  	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
 -			     "U-Boot - Boot Menu", NULL);
-+	    "Libreboot 20241206 release (U-Boot Menu)                                                    https://libreboot.org/", NULL);
++	    "Libreboot 20241206, 8th revision (U-Boot menu): https://libreboot.org/", NULL);
  	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
  
  	logo = video_get_u_boot_logo();
diff --git a/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
index 53a9b90d..2f903cd7 100644
--- a/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
+++ b/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
@@ -18,7 +18,7 @@ index 84831915a2..8e26ec2aef 100644
  	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
  	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
 -			     "U-Boot - Boot Menu", NULL);
-+	    "Libreboot 20241206 release (U-Boot Menu)                                                    https://libreboot.org/", NULL);
++	    "Libreboot 20241206, 8th revision (U-Boot menu): https://libreboot.org/", NULL);
  	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
  
  	logo = video_get_u_boot_logo();
diff --git a/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
index 53a9b90d..2f903cd7 100644
--- a/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
+++ b/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
@@ -18,7 +18,7 @@ index 84831915a2..8e26ec2aef 100644
  	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
  	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
 -			     "U-Boot - Boot Menu", NULL);
-+	    "Libreboot 20241206 release (U-Boot Menu)                                                    https://libreboot.org/", NULL);
++	    "Libreboot 20241206, 8th revision (U-Boot menu): https://libreboot.org/", NULL);
  	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
  
  	logo = video_get_u_boot_logo();

From 5a3b0dab9668bbdc96d2bcf7e541fe0d99035b98 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 12 Jan 2025 13:19:48 +0000
Subject: [PATCH 1042/1549] grub.cfg: Scan *every* LVM device

We were scanning a hardcoded set up LVM volumes, so in practise,
LVM boot didn't really work. We did this because scanning for
asterisk is slow on some machines. However, since LVM is the last
one, and since most users don't boot directly from LVM, it wasn't
that much of an issue in practise.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/default/config/payload | 29 ++++++++++++++---------------
 config/grub/nvme/config/payload    | 26 +++++++++++---------------
 config/grub/xhci/config/payload    | 26 +++++++++++---------------
 3 files changed, 36 insertions(+), 45 deletions(-)

diff --git a/config/grub/default/config/payload b/config/grub/default/config/payload
index 05e64bbd..91afcc7b 100644
--- a/config/grub/default/config/payload
+++ b/config/grub/default/config/payload
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
-# Copyright (C) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (C) 2014-2016,2020-2021,2023-2025 Leah Rowe <leah@libreboot.org>
 # Copyright (C) 2015 Klemens Nanni <contact@autoboot.org>
 
 set prefix=(memdisk)/boot/grub
@@ -143,16 +143,12 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 
 	# grub device enumeration is very slow, so checks are hardcoded
 
-	# TODO: add more strings, based on what distros set up when
-	# the user select auto-partitioning on those installers
-	lvmvol="lvm/grubcrypt-bootvol lvm/grubcrypt-rootvol"
-
 	raidvol="md/0 md/1 md/2 md/3 md/4 md/5 md/6 md/7 md/8 md/9"
 
-	# in practise, doing multiple redundant checks is perfectly fast and
+	# in practise, doing multiple redundant checks is perfectly fast
 	# TODO: optimize grub itself, and use */? here for everything
 
-	for vol in ${lvmvol} ${raidvol} ; do
+	for vol in ${raidvol} ; do
 		try_bootcfg "${vol}"
 	done
 
@@ -164,6 +160,9 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 					bootdev="${bootdev} (ahci${i},${part})"
 				elif [ "${grub_disk}" = "ata" ]; then
 					bootdev="${bootdev} (ata${i},${part})"
+				elif [ "${grub_disk}" = "nvme" ]; then
+					# TODO: do we care about other namesapces
+					bootdev="${bootdev} (nvme${i}n1,${part})"
 				fi
 			done
 		done
@@ -171,21 +170,21 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 
 	set pager=0
 	echo -n "Attempting to unlock encrypted volumes"
-	for dev in ${bootdev} ${lvmvol} ${raidvol}; do
+	for dev in ${bootdev} ${raidvol}; do
 		if cryptomount "${dev}" ; then break ; fi
 	done
 	set pager=1
 	echo
 
-	# after cryptomount, lvm volumes might be available
-	for vol in ${lvmvol}; do
-		try_bootcfg "${vol}"
-	done
-
 	search_bootcfg crypto
 
-	for vol in lvm/* ; do
-		try_bootcfg "${vol}"
+	# after cryptomount, lvm volumes might be available
+	# using * is slow on some machines, but we use it here,
+	# just once. in so doing, we find every lvm volume
+	for vol in (*); do
+		if regexp ^lvm/ $vol; then
+			try_bootcfg "${vol}"
+		fi
 	done
 
 	true # Prevent pager requiring to accept each line instead of whole screen
diff --git a/config/grub/nvme/config/payload b/config/grub/nvme/config/payload
index 52b8dfd9..68e6b52a 100644
--- a/config/grub/nvme/config/payload
+++ b/config/grub/nvme/config/payload
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
-# Copyright (C) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (C) 2014-2016,2020-2021,2023-2025 Leah Rowe <leah@libreboot.org>
 # Copyright (C) 2015 Klemens Nanni <contact@autoboot.org>
 
 set prefix=(memdisk)/boot/grub
@@ -155,16 +155,12 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 
 	# grub device enumeration is very slow, so checks are hardcoded
 
-	# TODO: add more strings, based on what distros set up when
-	# the user select auto-partitioning on those installers
-	lvmvol="lvm/grubcrypt-bootvol lvm/grubcrypt-rootvol"
-
 	raidvol="md/0 md/1 md/2 md/3 md/4 md/5 md/6 md/7 md/8 md/9"
 
-	# in practise, doing multiple redundant checks is perfectly fast and
+	# in practise, doing multiple redundant checks is perfectly fast
 	# TODO: optimize grub itself, and use */? here for everything
 
-	for vol in ${lvmvol} ${raidvol} ; do
+	for vol in ${raidvol} ; do
 		try_bootcfg "${vol}"
 	done
 
@@ -186,21 +182,21 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 
 	set pager=0
 	echo -n "Attempting to unlock encrypted volumes"
-	for dev in ${bootdev} ${lvmvol} ${raidvol}; do
+	for dev in ${bootdev} ${raidvol}; do
 		if cryptomount "${dev}" ; then break ; fi
 	done
 	set pager=1
 	echo
 
-	# after cryptomount, lvm volumes might be available
-	for vol in ${lvmvol}; do
-		try_bootcfg "${vol}"
-	done
-
 	search_bootcfg crypto
 
-	for vol in lvm/* ; do
-		try_bootcfg "${vol}"
+	# after cryptomount, lvm volumes might be available
+	# using * is slow on some machines, but we use it here,
+	# just once. in so doing, we find every lvm volume
+	for vol in (*); do
+		if regexp ^lvm/ $vol; then
+			try_bootcfg "${vol}"
+		fi
 	done
 
 	true # Prevent pager requiring to accept each line instead of whole screen
diff --git a/config/grub/xhci/config/payload b/config/grub/xhci/config/payload
index 6a0fc250..ebfd1fea 100644
--- a/config/grub/xhci/config/payload
+++ b/config/grub/xhci/config/payload
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
-# Copyright (C) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (C) 2014-2016,2020-2021,2023-2025 Leah Rowe <leah@libreboot.org>
 # Copyright (C) 2015 Klemens Nanni <contact@autoboot.org>
 
 set prefix=(memdisk)/boot/grub
@@ -156,16 +156,12 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 
 	# grub device enumeration is very slow, so checks are hardcoded
 
-	# TODO: add more strings, based on what distros set up when
-	# the user select auto-partitioning on those installers
-	lvmvol="lvm/grubcrypt-bootvol lvm/grubcrypt-rootvol"
-
 	raidvol="md/0 md/1 md/2 md/3 md/4 md/5 md/6 md/7 md/8 md/9"
 
-	# in practise, doing multiple redundant checks is perfectly fast and
+	# in practise, doing multiple redundant checks is perfectly fast
 	# TODO: optimize grub itself, and use */? here for everything
 
-	for vol in ${lvmvol} ${raidvol} ; do
+	for vol in ${raidvol} ; do
 		try_bootcfg "${vol}"
 	done
 
@@ -187,21 +183,21 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 
 	set pager=0
 	echo -n "Attempting to unlock encrypted volumes"
-	for dev in ${bootdev} ${lvmvol} ${raidvol}; do
+	for dev in ${bootdev} ${raidvol}; do
 		if cryptomount "${dev}" ; then break ; fi
 	done
 	set pager=1
 	echo
 
-	# after cryptomount, lvm volumes might be available
-	for vol in ${lvmvol}; do
-		try_bootcfg "${vol}"
-	done
-
 	search_bootcfg crypto
 
-	for vol in lvm/* ; do
-		try_bootcfg "${vol}"
+	# after cryptomount, lvm volumes might be available
+	# using * is slow on some machines, but we use it here,
+	# just once. in so doing, we find every lvm volume
+	for vol in (*); do
+		if regexp ^lvm/ $vol; then
+			try_bootcfg "${vol}"
+		fi
 	done
 
 	true # Prevent pager requiring to accept each line instead of whole screen

From 66d084e7f7cba7a38e43de5204f439dd4ed4255b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 12 Jan 2025 13:45:00 +0000
Subject: [PATCH 1043/1549] grub.cfg: scan luks *inside lvm*

the user might have boot their kernel inside luks
inside lvm for some dumb reason

it's theoretically possible that the user would be
so silly indeed

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/default/config/payload | 14 ++++++++++++++
 config/grub/nvme/config/payload    | 14 ++++++++++++++
 config/grub/xhci/config/payload    | 14 ++++++++++++++
 3 files changed, 42 insertions(+)

diff --git a/config/grub/default/config/payload b/config/grub/default/config/payload
index 91afcc7b..3f134f1d 100644
--- a/config/grub/default/config/payload
+++ b/config/grub/default/config/payload
@@ -178,15 +178,29 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 
 	search_bootcfg crypto
 
+	lvmvol=""
+
 	# after cryptomount, lvm volumes might be available
 	# using * is slow on some machines, but we use it here,
 	# just once. in so doing, we find every lvm volume
 	for vol in (*); do
 		if regexp ^lvm/ $vol; then
+			lvmvol="${lvmvol} ${vol}"
 			try_bootcfg "${vol}"
 		fi
 	done
 
+	# user might have put luks inside lvm
+	set pager=0
+	echo "Attempting to unlock encrypted LVMs"
+	for vol in ${lvmvol}; do
+		cryptomount "$vol"
+	done
+	set pager=1
+	echo
+
+	search_bootcfg crypto
+
 	true # Prevent pager requiring to accept each line instead of whole screen
 }
 
diff --git a/config/grub/nvme/config/payload b/config/grub/nvme/config/payload
index 68e6b52a..22dd8fe1 100644
--- a/config/grub/nvme/config/payload
+++ b/config/grub/nvme/config/payload
@@ -190,15 +190,29 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 
 	search_bootcfg crypto
 
+	lvmvol=""
+
 	# after cryptomount, lvm volumes might be available
 	# using * is slow on some machines, but we use it here,
 	# just once. in so doing, we find every lvm volume
 	for vol in (*); do
 		if regexp ^lvm/ $vol; then
+			lvmvol="${lvmvol} ${vol}"
 			try_bootcfg "${vol}"
 		fi
 	done
 
+	# user might have put luks inside lvm
+	set pager=0
+	echo "Attempting to unlock encrypted LVMs"
+	for vol in ${lvmvol}; do
+		cryptomount "$vol"
+	done
+	set pager=1
+	echo
+
+	search_bootcfg crypto
+
 	true # Prevent pager requiring to accept each line instead of whole screen
 }
 
diff --git a/config/grub/xhci/config/payload b/config/grub/xhci/config/payload
index ebfd1fea..d1f81fd3 100644
--- a/config/grub/xhci/config/payload
+++ b/config/grub/xhci/config/payload
@@ -191,15 +191,29 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 
 	search_bootcfg crypto
 
+	lvmvol=""
+
 	# after cryptomount, lvm volumes might be available
 	# using * is slow on some machines, but we use it here,
 	# just once. in so doing, we find every lvm volume
 	for vol in (*); do
 		if regexp ^lvm/ $vol; then
+			lvmvol="${lvmvol} ${vol}"
 			try_bootcfg "${vol}"
 		fi
 	done
 
+	# user might have put luks inside lvm
+	set pager=0
+	echo "Attempting to unlock encrypted LVMs"
+	for vol in ${lvmvol}; do
+		cryptomount "$vol"
+	done
+	set pager=1
+	echo
+
+	search_bootcfg crypto
+
 	true # Prevent pager requiring to accept each line instead of whole screen
 }
 

From 7bf0d4c2ed5a6efe0a09cbd7ea75962e7a618095 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 12 Jan 2025 23:59:44 +0000
Subject: [PATCH 1044/1549] add gnults-devel to fedora 41 dependencies

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/fedora41 | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/dependencies/fedora41 b/config/dependencies/fedora41
index 4c06b199..e49a50b2 100755
--- a/config/dependencies/fedora41
+++ b/config/dependencies/fedora41
@@ -12,5 +12,5 @@ p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \
 python-unversioned-command python3 python3-setuptools rsync sharutils \
 subversion systemd-devel texinfo unar unifont unifont-fonts uuid-devel \
 unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel \
-libuuid-devel \
+libuuid-devel gnutls-devel \
 "

From 64d3c7b5150c8556361cede3d12b4fd6a6ff546e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 14 Jan 2025 20:24:00 +0000
Subject: [PATCH 1045/1549] grub/xhci: Add xHCI non-root-hub fixes from
 Nitrokey

See:
https://github.com/Nitrokey/nethsm-grub/commits/nethsm-z790?since=2025-01-13&until=2025-01-13

And more generally, see branch:
https://github.com/Nitrokey/nethsm-grub/commits/nethsm-z790

This brings in a few minor fixes, and also a not-so-minor fix:
Add TT (transaction translation) handling for non-SuperSpeed
devices in xhci.c

More generally, this patchset will improve non-root hub support
in the xHCI code. There is also a patch to work around a quirk
on the MSI Z790-P mainboard, which I'm planning to add to Libreboot
at a later date.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...missing-characters-for-borders-arrow.patch |  4 +-
 ...-the-name-libreboot-in-the-grub-menu.patch |  6 +-
 .../xhci/patches/0003-Add-CC0-license.patch   |  4 +-
 .../patches/0004-Define-GRUB_UINT32_MAX.patch |  4 +-
 .../patches/0005-Add-Argon2-algorithm.patch   |  4 +-
 ...Error-on-missing-Argon2id-parameters.patch |  4 +-
 .../0007-Compile-with-Argon2id-support.patch  |  4 +-
 ...8-Make-grub-install-work-with-Argon2.patch |  4 +-
 ...-coreboot-force-scancodes2-translate.patch |  4 +-
 ...outs-don-t-print-Unknown-key-message.patch |  4 +-
 ...-missing-prefix-errors-on-the-screen.patch |  4 +-
 ...on-t-print-error-if-module-not-found.patch |  4 +-
 ...013-don-t-print-empty-error-messages.patch |  4 +-
 ...b-Parse-SuperSpeed-companion-descrip.patch |  4 +-
 .../patches/0015-usb-Add-enum-for-xHCI.patch  |  6 +-
 ...rans-Set-default-maximum-packet-size.patch |  6 +-
 ...b-Add-function-pointer-for-attach-de.patch |  4 +-
 ...b-usbhub-Add-new-private-fields-for-.patch |  6 +-
 ...9-grub-core-bus-usb-Add-xhci-support.patch | 13 +--
 ...b-usbhub-Add-xHCI-non-root-hub-suppo.patch |  6 +-
 ...-xHCI-also-accept-SBRN-0x31-and-0x32.patch | 26 +++++
 .../patches/0022-xhci-fix-port-indexing.patch | 43 ++++++++
 ...nd-z790-non-root-hub-speed-detection.patch | 28 ++++++
 ...-xhci-configure-TT-for-non-root-hubs.patch | 98 +++++++++++++++++++
 ...h => 0025-Fix-compilation-on-x86_64.patch} | 16 +--
 ...native-NVMe-driver-based-on-SeaBIOS.patch} | 13 ++-
 26 files changed, 255 insertions(+), 68 deletions(-)
 create mode 100644 config/grub/xhci/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch
 create mode 100644 config/grub/xhci/patches/0022-xhci-fix-port-indexing.patch
 create mode 100644 config/grub/xhci/patches/0023-xhci-workaround-z790-non-root-hub-speed-detection.patch
 create mode 100644 config/grub/xhci/patches/0024-xhci-configure-TT-for-non-root-hubs.patch
 rename config/grub/xhci/patches/{0021-Fix-compilation-on-x86_64.patch => 0025-Fix-compilation-on-x86_64.patch} (87%)
 rename config/grub/xhci/patches/{0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch => 0026-Add-native-NVMe-driver-based-on-SeaBIOS.patch} (99%)

diff --git a/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
index 757c8e03..a5ddd68f 100644
--- a/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
+++ b/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -1,7 +1,7 @@
-From c94b9ea258feb53773bab06bc2a6c6e66a44f867 Mon Sep 17 00:00:00 2001
+From 98b66bcfe063a4035f851a542e57dc2c4bd51a57 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 31 Oct 2021 03:47:05 +0000
-Subject: [PATCH 01/22] mitigate grub's missing characters for borders/arrow
+Subject: [PATCH 01/26] mitigate grub's missing characters for borders/arrow
  characters
 
 This cleans up the display on the main screen in GRUB.
diff --git a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 23f84212..f262b303 100644
--- a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -1,14 +1,14 @@
-From da775eafbe79e3100ca2262bde49e3e65978e83f Mon Sep 17 00:00:00 2001
+From 71b146159e0aad33b267d062885ca0635aa23283 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 19 Nov 2022 16:30:24 +0000
-Subject: [PATCH 02/22] say the name libreboot, in the grub menu
+Subject: [PATCH 02/26] say the name libreboot, in the grub menu
 
 ---
  grub-core/normal/main.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c
-index bd4431000..ff16e0f2e 100644
+index bd4431000..74cfc49c0 100644
 --- a/grub-core/normal/main.c
 +++ b/grub-core/normal/main.c
 @@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term,
diff --git a/config/grub/xhci/patches/0003-Add-CC0-license.patch b/config/grub/xhci/patches/0003-Add-CC0-license.patch
index 44d27eb5..e0a0cd63 100644
--- a/config/grub/xhci/patches/0003-Add-CC0-license.patch
+++ b/config/grub/xhci/patches/0003-Add-CC0-license.patch
@@ -1,7 +1,7 @@
-From b91e5cafa7863b5a61e97d483f98dcece374721a Mon Sep 17 00:00:00 2001
+From ba1b693f60ab68af207d8f39a5d6e28f74872031 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 03/22] Add CC0 license
+Subject: [PATCH 03/26] Add CC0 license
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
diff --git a/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
index 2d830d43..6fd54747 100644
--- a/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
+++ b/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
@@ -1,7 +1,7 @@
-From 58e0d7b7bcec2392b81dda613d070804f7c68cf5 Mon Sep 17 00:00:00 2001
+From a3c13eb165cb375017a76b219f1de1604a9dc156 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 04/22] Define GRUB_UINT32_MAX
+Subject: [PATCH 04/26] Define GRUB_UINT32_MAX
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
diff --git a/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch b/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
index ff2dc74e..4900eed2 100644
--- a/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
+++ b/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
@@ -1,7 +1,7 @@
-From 65a9b252b79d5d1fa022e3da9ef91459ad8efb94 Mon Sep 17 00:00:00 2001
+From 176751e11424f75155ce64311923acf48fc4ec3c Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 05/22] Add Argon2 algorithm
+Subject: [PATCH 05/26] Add Argon2 algorithm
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
diff --git a/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
index 22553006..559080cf 100644
--- a/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
+++ b/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
@@ -1,7 +1,7 @@
-From 809908898f9d67979885a651b295ca1fa066039c Mon Sep 17 00:00:00 2001
+From a779f27023bee409d06f6b9023cd907d2f3b959d Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 06/22] Error on missing Argon2id parameters
+Subject: [PATCH 06/26] Error on missing Argon2id parameters
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
diff --git a/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
index b77a5751..95fda3c6 100644
--- a/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
+++ b/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
@@ -1,7 +1,7 @@
-From 26ae5da9ed8382869b699a653988e6c8f32bd3d1 Mon Sep 17 00:00:00 2001
+From 3ab4a66104c772241e42b1f4f42a5890f3059164 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 07/22] Compile with Argon2id support
+Subject: [PATCH 07/26] Compile with Argon2id support
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
diff --git a/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
index 00f94eef..37de98c5 100644
--- a/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
+++ b/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
@@ -1,7 +1,7 @@
-From 6ce0b0629aa1377237c19290f33008ff81969962 Mon Sep 17 00:00:00 2001
+From 94a89aea5118294173d29bdf49e41f7801e3df48 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 08/22] Make grub-install work with Argon2
+Subject: [PATCH 08/26] Make grub-install work with Argon2
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
diff --git a/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
index 31798205..847d2291 100644
--- a/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
+++ b/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -1,7 +1,7 @@
-From 3f69e2c35ccf2a37fd35f1821c7b85cc6df07ca7 Mon Sep 17 00:00:00 2001
+From ddd9c783a8b6dec9e116930f2a8ccfac354d7e29 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 30 Oct 2023 22:19:21 +0000
-Subject: [PATCH 09/22] at_keyboard coreboot: force scancodes2+translate
+Subject: [PATCH 09/26] at_keyboard coreboot: force scancodes2+translate
 
 Scan code set 2 with translation should be assumed in
 every case, as the default starting position.
diff --git a/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
index 742aae38..c2cec5d4 100644
--- a/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
+++ b/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
@@ -1,7 +1,7 @@
-From 44befdaa1ee588591f46c13d057fdef56b87218c Mon Sep 17 00:00:00 2001
+From 1391cfd14088e90e01a477269e2892c89ba2536d Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 31 Oct 2023 10:33:28 +0000
-Subject: [PATCH 10/22] keylayouts: don't print "Unknown key" message
+Subject: [PATCH 10/26] keylayouts: don't print "Unknown key" message
 
 on keyboards with stuck keys, this results in GRUB just
 spewing it repeatedly, preventing use of GRUB.
diff --git a/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
index 960c693d..b1877070 100644
--- a/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
+++ b/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -1,7 +1,7 @@
-From bfecf6d86ccf82fb85af93600931cee589891089 Mon Sep 17 00:00:00 2001
+From 3f1eb3f472d2c92e5a2a14c7c3469154ae450df6 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:14:58 +0000
-Subject: [PATCH 11/22] don't print missing prefix errors on the screen
+Subject: [PATCH 11/26] don't print missing prefix errors on the screen
 
 we do actually set the prefix. this patch modifies
 grub to still set grub_errno and return accordingly,
diff --git a/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
index c098f7e8..24a1ce4b 100644
--- a/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
+++ b/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
@@ -1,7 +1,7 @@
-From f44fc56f06559313841de2b53637020fbe139803 Mon Sep 17 00:00:00 2001
+From 5a2700d29f8145d94886aa369e4c68d57295d44a Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:36:22 +0000
-Subject: [PATCH 12/22] don't print error if module not found
+Subject: [PATCH 12/26] don't print error if module not found
 
 still set grub_errno accordingly, and otherwise
 behave the same. in libreboot, we remove a lot of
diff --git a/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
index 23672773..d7a52bce 100644
--- a/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
+++ b/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
@@ -1,7 +1,7 @@
-From e459ed55902003644e7bcd76361cc43247231a99 Mon Sep 17 00:00:00 2001
+From 376f1dbf2c56623e9b9bda3a4079b4b970ab2ebd Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 17:25:20 +0000
-Subject: [PATCH 13/22] don't print empty error messages
+Subject: [PATCH 13/26] don't print empty error messages
 
 this is part two of the quest to kill the prefix
 error message. after i disabled prefix-related
diff --git a/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch b/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
index bc18cb13..d8e1c766 100644
--- a/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
+++ b/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
@@ -1,7 +1,7 @@
-From 85fdf29d37b58be96042d6df24f8bc08bba9906d Mon Sep 17 00:00:00 2001
+From 8094d43abecf758617aec1d4f8c9b1099cb4e67e Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:00:27 +0100
-Subject: [PATCH 14/22] grub-core/bus/usb: Parse SuperSpeed companion
+Subject: [PATCH 14/26] grub-core/bus/usb: Parse SuperSpeed companion
  descriptors
 
 Parse the SS_ENDPOINT_COMPANION descriptor, which is only present on USB 3.0
diff --git a/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch b/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
index d8330e59..30133543 100644
--- a/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
+++ b/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
@@ -1,7 +1,7 @@
-From 26a5ed135c94b295b9a0037f5e7201eb5d38fde4 Mon Sep 17 00:00:00 2001
+From fd92646af5b9a5cc027ce0bd6afa5cc7bc8f46a3 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
-Date: Sun, 15 Nov 2020 19:47:06 +0100
-Subject: [PATCH 15/22] usb: Add enum for xHCI
+Date: Mon, 7 Dec 2020 08:41:22 +0100
+Subject: [PATCH 15/26] usb: Add enum for xHCI
 
 Will be used in future patches.
 
diff --git a/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch b/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
index 27402534..a4abb713 100644
--- a/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
+++ b/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
@@ -1,7 +1,7 @@
-From 13bc84d9f43328ba47273cbcf87c517398dcfc93 Mon Sep 17 00:00:00 2001
+From f7c7c25e274b79a7c8e62250fa9bc49f81bd4456 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
-Date: Sun, 15 Nov 2020 19:48:03 +0100
-Subject: [PATCH 16/22] usbtrans: Set default maximum packet size
+Date: Mon, 7 Dec 2020 08:41:23 +0100
+Subject: [PATCH 16/26] usbtrans: Set default maximum packet size
 
 Set the maximum packet size to 512 for SuperSpeed devices.
 
diff --git a/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch b/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
index eede3791..6d4ed855 100644
--- a/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
+++ b/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
@@ -1,7 +1,7 @@
-From 1518589ff286b54a27d4b11f017cb43c90cbf566 Mon Sep 17 00:00:00 2001
+From c3d70163d472953b705ff1250e3c4bfec8cb52ad Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:51:42 +0100
-Subject: [PATCH 17/22] grub-core/bus/usb: Add function pointer for
+Subject: [PATCH 17/26] grub-core/bus/usb: Add function pointer for
  attach/detach events
 
 The xHCI code needs to be called for attaching or detaching a device.
diff --git a/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch b/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
index 099ef79d..e68985b0 100644
--- a/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
+++ b/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
@@ -1,7 +1,7 @@
-From 8dd981a95cc7731b63b2d79ce6f98ce2d6b5a993 Mon Sep 17 00:00:00 2001
+From 4b21796042db28db773534d5f0cf83738a72b929 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
-Date: Sun, 15 Nov 2020 19:54:40 +0100
-Subject: [PATCH 18/22] grub-core/bus/usb/usbhub: Add new private fields for
+Date: Mon, 7 Dec 2020 08:41:25 +0100
+Subject: [PATCH 18/26] grub-core/bus/usb/usbhub: Add new private fields for
  xHCI controller
 
 Store the root port number, the route, consisting out of the port ID
diff --git a/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch b/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
index aaabb3da..0cf2bda7 100644
--- a/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
+++ b/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
@@ -1,7 +1,7 @@
-From dde187c07a8f2a1d3357aa362ffcc0fe8dab72d7 Mon Sep 17 00:00:00 2001
+From 75b3d347ea5f3c51615f8ccb670b9f2033f8594f Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
-Date: Sun, 15 Nov 2020 19:59:25 +0100
-Subject: [PATCH 19/22] grub-core/bus/usb: Add xhci support
+Date: Mon, 7 Dec 2020 08:41:26 +0100
+Subject: [PATCH 19/26] grub-core/bus/usb: Add xhci support
 
 Add support for xHCI USB controllers.
 The code is based on seabios implementation, but has been heavily
@@ -41,13 +41,6 @@ TODO:
   * Test on USB3 hubs
   * Support for USB 3.1 and USB 3.2 controllers
 
-Tested on qemu using coreboot and grub as payload:
-
-qemu-system-x86_64 -M q35 -bios $firmware -device qemu-xhci,id=xhci -accel kvm -m 1024M \
-	-device usb-storage,drive=thumbdrive,bus=xhci.0,port=3 \
-	-drive if=none,format=raw,id=thumbdrive,file=ubuntu-20.04.1-desktop-amd64.iso \
-	-device usb-kbd,bus=xhci.0
-
 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
 Signed-off-by: sylv <sylv@sylv.io>
 ---
diff --git a/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch b/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
index 6a3266b2..f27e5428 100644
--- a/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
+++ b/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
@@ -1,7 +1,7 @@
-From 28856bd0646e0396b3d5249a99b731f2743aec5a Mon Sep 17 00:00:00 2001
+From 6d05a393bf192bb5ae3ba1f7d653617b7ab9bb2e Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
-Date: Thu, 3 Dec 2020 13:44:55 +0100
-Subject: [PATCH 20/22] grub-core/bus/usb/usbhub: Add xHCI non root hub support
+Date: Mon, 7 Dec 2020 08:41:27 +0100
+Subject: [PATCH 20/26] grub-core/bus/usb/usbhub: Add xHCI non root hub support
 
 Tested on Intel PCH C246, the USB3 hub can be configured by grub.
 
diff --git a/config/grub/xhci/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch b/config/grub/xhci/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch
new file mode 100644
index 00000000..3bc5f0b2
--- /dev/null
+++ b/config/grub/xhci/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch
@@ -0,0 +1,26 @@
+From 3fa33c091866b13c452b7a39ecee291e5901ff22 Mon Sep 17 00:00:00 2001
+From: Sven Anderson <sven@anderson.de>
+Date: Sat, 28 May 2022 21:39:23 +0200
+Subject: [PATCH 21/26] xHCI: also accept SBRN 0x31 and 0x32
+
+Signed-off-by: Sven Anderson <sven@anderson.de>
+---
+ grub-core/bus/usb/xhci-pci.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/grub-core/bus/usb/xhci-pci.c b/grub-core/bus/usb/xhci-pci.c
+index a5bd3c97d..cde21f57a 100644
+--- a/grub-core/bus/usb/xhci-pci.c
++++ b/grub-core/bus/usb/xhci-pci.c
+@@ -76,7 +76,7 @@ grub_xhci_pci_iter (grub_pci_device_t dev, grub_pci_id_t pciid,
+       /* Check Serial Bus Release Number */
+       addr = grub_pci_make_address (dev, GRUB_XHCI_PCI_SBRN_REG);
+       release = grub_pci_read_byte (addr);
+-      if (release != 0x30)
++      if (release != 0x30 && release != 0x31 &&release != 0x32)
+ 	{
+ 	  grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: Wrong SBRN: %0x\n",
+ 			release);
+-- 
+2.39.5
+
diff --git a/config/grub/xhci/patches/0022-xhci-fix-port-indexing.patch b/config/grub/xhci/patches/0022-xhci-fix-port-indexing.patch
new file mode 100644
index 00000000..83427fcc
--- /dev/null
+++ b/config/grub/xhci/patches/0022-xhci-fix-port-indexing.patch
@@ -0,0 +1,43 @@
+From c455091ce40ffd8218802aaadeacf2039fea5036 Mon Sep 17 00:00:00 2001
+From: Sven Anderson <sven@anderson.de>
+Date: Mon, 13 Jan 2025 19:51:41 +0100
+Subject: [PATCH 22/26] xhci: fix port indexing
+
+---
+ grub-core/bus/usb/xhci.c | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c
+index f4591ffb5..dc89b9619 100644
+--- a/grub-core/bus/usb/xhci.c
++++ b/grub-core/bus/usb/xhci.c
+@@ -2250,7 +2250,7 @@ grub_xhci_detect_dev (grub_usb_controller_t dev, int port, int *changed)
+ 
+   *changed = 0;
+   grub_dprintf("xhci", "%s: dev=%p USB%d_%d port %d\n", __func__, dev,
+-	       x->psids[port-1].major, x->psids[port-1].minor, port);
++	       x->psids[port].major, x->psids[port].minor, port);
+ 
+   /* On shutdown advertise all ports as disconnected. This will trigger
+    * a gracefull detatch. */
+@@ -2285,13 +2285,13 @@ grub_xhci_detect_dev (grub_usb_controller_t dev, int port, int *changed)
+   if (!(portsc & GRUB_XHCI_PORTSC_CCS))
+     return GRUB_USB_SPEED_NONE;
+ 
+-  for (grub_uint8_t i = 0; i < 16 && x->psids[port-1].psids[i].id > 0; i++)
++  for (grub_uint8_t i = 0; i < 16 && x->psids[port].psids[i].id > 0; i++)
+     {
+-      if (x->psids[port-1].psids[i].id == speed)
++      if (x->psids[port].psids[i].id == speed)
+         {
+ 	  grub_dprintf("xhci", "%s: grub_usb_speed = %d\n", __func__,
+-		       x->psids[port-1].psids[i].grub_usb_speed );
+-	  return x->psids[port-1].psids[i].grub_usb_speed;
++		       x->psids[port].psids[i].grub_usb_speed );
++	  return x->psids[port].psids[i].grub_usb_speed;
+ 	}
+     }
+ 
+-- 
+2.39.5
+
diff --git a/config/grub/xhci/patches/0023-xhci-workaround-z790-non-root-hub-speed-detection.patch b/config/grub/xhci/patches/0023-xhci-workaround-z790-non-root-hub-speed-detection.patch
new file mode 100644
index 00000000..0181f3bd
--- /dev/null
+++ b/config/grub/xhci/patches/0023-xhci-workaround-z790-non-root-hub-speed-detection.patch
@@ -0,0 +1,28 @@
+From b033ef3b4b2384df4165ae7829155cafd4ee3488 Mon Sep 17 00:00:00 2001
+From: Sven Anderson <sven@anderson.de>
+Date: Mon, 13 Jan 2025 19:55:15 +0100
+Subject: [PATCH 23/26] xhci: workaround z790 non-root-hub speed detection
+
+---
+ grub-core/bus/usb/xhci.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c
+index dc89b9619..d13a7c39d 100644
+--- a/grub-core/bus/usb/xhci.c
++++ b/grub-core/bus/usb/xhci.c
+@@ -2285,6 +2285,11 @@ grub_xhci_detect_dev (grub_usb_controller_t dev, int port, int *changed)
+   if (!(portsc & GRUB_XHCI_PORTSC_CCS))
+     return GRUB_USB_SPEED_NONE;
+ 
++  if (port == 4 || port == 12 && speed < XHCI_USB_HIGHSPEED) { // inital hub speed detection on Z790 is too low
++    grub_dprintf("xhci", "%s: setting internal hub speed to high\n", __func__);
++    return GRUB_USB_SPEED_HIGH;
++  }
++
+   for (grub_uint8_t i = 0; i < 16 && x->psids[port].psids[i].id > 0; i++)
+     {
+       if (x->psids[port].psids[i].id == speed)
+-- 
+2.39.5
+
diff --git a/config/grub/xhci/patches/0024-xhci-configure-TT-for-non-root-hubs.patch b/config/grub/xhci/patches/0024-xhci-configure-TT-for-non-root-hubs.patch
new file mode 100644
index 00000000..5f612885
--- /dev/null
+++ b/config/grub/xhci/patches/0024-xhci-configure-TT-for-non-root-hubs.patch
@@ -0,0 +1,98 @@
+From 7748bcc0e7cef17dbf626f83cc03e56a17075330 Mon Sep 17 00:00:00 2001
+From: Sven Anderson <sven@anderson.de>
+Date: Mon, 13 Jan 2025 20:26:32 +0100
+Subject: [PATCH 24/26] xhci: configure TT for non-root-hubs
+
+---
+ grub-core/bus/usb/usbhub.c |  6 +++++
+ grub-core/bus/usb/xhci.c   | 45 +++++++++++++++++++++++++++++++++-----
+ include/grub/usb.h         |  2 ++
+ 3 files changed, 47 insertions(+), 6 deletions(-)
+
+diff --git a/grub-core/bus/usb/usbhub.c b/grub-core/bus/usb/usbhub.c
+index e96505aa9..629b3ed53 100644
+--- a/grub-core/bus/usb/usbhub.c
++++ b/grub-core/bus/usb/usbhub.c
+@@ -818,3 +818,9 @@ grub_usb_iterate (grub_usb_iterate_hook_t hook, void *hook_data)
+ 
+   return 0;
+ }
++
++grub_usb_device_t
++grub_usb_get_dev (int addr)
++{
++  return grub_usb_devs[addr];
++}
+diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c
+index d13a7c39d..8ad2a10f9 100644
+--- a/grub-core/bus/usb/xhci.c
++++ b/grub-core/bus/usb/xhci.c
+@@ -623,13 +623,46 @@ grub_xhci_alloc_inctx(struct grub_xhci *x, int maxepid,
+       break;
+   }
+ 
+-  /* Route is greater zero on devices that are connected to a non root hub */
+-  if (dev->route)
+-    {
+-      /* FIXME: Implement this code for non SuperSpeed hub devices */
++  /* Set routing string */
++  slot->ctx[0] |= dev->route;
++
++  /* Set root hub port number */
++  slot->ctx[1] |= (dev->root_port + 1) << 16;
++
++  if (dev->split_hubaddr && (dev->speed == GRUB_USB_SPEED_LOW ||
++                            dev->speed == GRUB_USB_SPEED_FULL)) {
++
++    grub_usb_device_t hubdev = grub_usb_get_dev(dev->split_hubaddr);
++
++    if (!hubdev || hubdev->descdev.class != GRUB_USB_CLASS_HUB) {
++      grub_dprintf("xhci", "Invalid hub device at addr %d!\n", dev->split_hubaddr);
++      return NULL;
++    }
++
++    struct grub_xhci_priv *hub_priv = hubdev->xhci_priv;
++    if (!hub_priv) {
++      grub_dprintf("xhci", "Hub has no xhci_priv!\n"); 
++      return NULL;
++    }
++
++    if (hubdev->speed == GRUB_USB_SPEED_HIGH) {
++      /* Direct connection to high-speed hub - set up TT */
++      grub_dprintf("xhci", "Direct high-speed hub connection - configuring TT with "
++                   "hub slot %d port %d\n", hub_priv->slotid, dev->split_hubport);
++      slot->ctx[2] |= hub_priv->slotid;
++      slot->ctx[2] |= dev->split_hubport << 8;
+     }
+-  slot->ctx[0]    |= dev->route;
+-  slot->ctx[1]    |= (dev->root_port+1) << 16;
++    else {
++      /* Hub is not high-speed, inherit TT settings from parent */
++      volatile struct grub_xhci_slotctx *hubslot;
++      grub_dprintf("xhci", "Non high-speed hub - inheriting TT settings from parent\n");
++      hubslot = grub_dma_phys2virt(x->devs[hub_priv->slotid].ptr_low, x->devs_dma);
++      slot->ctx[2] = hubslot->ctx[2];
++    }
++  }
++
++  grub_dprintf("xhci", "Slot context: ctx[0]=0x%08x ctx[1]=0x%08x ctx[2]=0x%08x\n",
++               slot->ctx[0], slot->ctx[1], slot->ctx[2]);
+ 
+   grub_arch_sync_dma_caches(in, size);
+ 
+diff --git a/include/grub/usb.h b/include/grub/usb.h
+index eb71fa1c7..df97a60cc 100644
+--- a/include/grub/usb.h
++++ b/include/grub/usb.h
+@@ -62,6 +62,8 @@ typedef int (*grub_usb_controller_iterate_hook_t) (grub_usb_controller_t dev,
+ /* Call HOOK with each device, until HOOK returns non-zero.  */
+ int grub_usb_iterate (grub_usb_iterate_hook_t hook, void *hook_data);
+ 
++grub_usb_device_t grub_usb_get_dev (int addr);
++
+ grub_usb_err_t grub_usb_device_initialize (grub_usb_device_t dev);
+ 
+ grub_usb_err_t grub_usb_get_descriptor (grub_usb_device_t dev,
+-- 
+2.39.5
+
diff --git a/config/grub/xhci/patches/0021-Fix-compilation-on-x86_64.patch b/config/grub/xhci/patches/0025-Fix-compilation-on-x86_64.patch
similarity index 87%
rename from config/grub/xhci/patches/0021-Fix-compilation-on-x86_64.patch
rename to config/grub/xhci/patches/0025-Fix-compilation-on-x86_64.patch
index 8f80664c..409f16e5 100644
--- a/config/grub/xhci/patches/0021-Fix-compilation-on-x86_64.patch
+++ b/config/grub/xhci/patches/0025-Fix-compilation-on-x86_64.patch
@@ -1,7 +1,7 @@
-From 040942842dc05c9b94c9be21f01b08da3e25fe6d Mon Sep 17 00:00:00 2001
+From 915d9b148cb57e22bb58505f72bc81add2479a73 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Wed, 24 Feb 2021 08:25:41 +0100
-Subject: [PATCH 21/22] Fix compilation on x86_64
+Subject: [PATCH 25/26] Fix compilation on x86_64
 
 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
  1 file changed, 16 insertions(+), 8 deletions(-)
 
 diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c
-index f4591ffb5..3495bb919 100644
+index 8ad2a10f9..ceb57c9b3 100644
 --- a/grub-core/bus/usb/xhci.c
 +++ b/grub-core/bus/usb/xhci.c
 @@ -184,7 +184,7 @@ enum
@@ -36,7 +36,7 @@ index f4591ffb5..3495bb919 100644
  static inline grub_uint32_t
  grub_xhci_port_read (struct grub_xhci *x, grub_uint32_t port)
  {
-@@ -664,7 +672,7 @@ static void xhci_process_events(struct grub_xhci *x)
+@@ -697,7 +705,7 @@ static void xhci_process_events(struct grub_xhci *x)
  	    case ER_TRANSFER:
  	    case ER_COMMAND_COMPLETE:
  	      {
@@ -45,7 +45,7 @@ index f4591ffb5..3495bb919 100644
  		struct grub_xhci_ring *ring = XHCI_RING(rtrb);
  		volatile struct grub_xhci_trb  *evt = &ring->evt;
  		grub_uint32_t eidx = rtrb - ring->ring + 1;
-@@ -697,9 +705,9 @@ static void xhci_process_events(struct grub_xhci *x)
+@@ -730,9 +738,9 @@ static void xhci_process_events(struct grub_xhci *x)
  	  }
  	grub_xhci_write32(&evts->nidx, nidx);
  	volatile struct grub_xhci_ir *ir = x->ir;
@@ -58,7 +58,7 @@ index f4591ffb5..3495bb919 100644
      }
  }
  
-@@ -800,7 +808,7 @@ static void xhci_trb_queue(volatile struct grub_xhci_ring *ring,
+@@ -833,7 +841,7 @@ static void xhci_trb_queue(volatile struct grub_xhci_ring *ring,
  			   grub_uint32_t xferlen, grub_uint32_t flags)
  {
    grub_dprintf("xhci", "%s: ring %p data %llx len %d flags 0x%x remain 0x%x\n", __func__,
@@ -67,7 +67,7 @@ index f4591ffb5..3495bb919 100644
  
    if (xhci_ring_full(ring))
      {
-@@ -1907,7 +1915,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev,
+@@ -1940,7 +1948,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev,
    if (transfer->type == GRUB_USB_TRANSACTION_TYPE_CONTROL)
    {
      volatile struct grub_usb_packet_setup *setupdata;
@@ -76,7 +76,7 @@ index f4591ffb5..3495bb919 100644
      grub_dprintf("xhci", "%s: CONTROLL TRANS req %d\n", __func__, setupdata->request);
      grub_dprintf("xhci", "%s: CONTROLL TRANS length %d\n", __func__, setupdata->length);
  
-@@ -1974,7 +1982,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev,
+@@ -2007,7 +2015,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev,
  	/* Assume the ring has enough free space for all TRBs */
  	if (flags & TRB_TR_IDT && tr->size <= (int)sizeof(inline_data))
  	  {
diff --git a/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/xhci/patches/0026-Add-native-NVMe-driver-based-on-SeaBIOS.patch
similarity index 99%
rename from config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch
rename to config/grub/xhci/patches/0026-Add-native-NVMe-driver-based-on-SeaBIOS.patch
index c105dd19..ffb1a8a4 100644
--- a/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch
+++ b/config/grub/xhci/patches/0026-Add-native-NVMe-driver-based-on-SeaBIOS.patch
@@ -1,7 +1,7 @@
-From 2fb0de8881bd2fe637d05bec0ae887f380434b7d Mon Sep 17 00:00:00 2001
+From a4e50d731ed687420850a10a84415b9cb9c6cf13 Mon Sep 17 00:00:00 2001
 From: Mate Kukri <km@mkukri.xyz>
 Date: Mon, 20 May 2024 11:43:35 +0100
-Subject: [PATCH 22/22] Add native NVMe driver based on SeaBIOS
+Subject: [PATCH 26/26] Add native NVMe driver based on SeaBIOS
 
 Tested to successfully boot Debian on QEMU and OptiPlex 3050.
 
@@ -31,20 +31,19 @@ index 65016f856..7bc0866ba 100644
  
  endif
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index fda723f0c..27a707fda 100644
+index fda723f0c..367e4b5e6 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
-@@ -2683,4 +2683,10 @@ module = {
-   common = tests/asn1/asn1_test.c;
+@@ -2684,3 +2684,9 @@ module = {
    cflags = '-Wno-uninitialized';
    cppflags = '-I$(srcdir)/lib/libtasn1-grub -I$(srcdir)/tests/asn1/';
-+};
+ };
 +
 +module = {
 +  name = nvme;
 +  common = disk/nvme.c;
 +  enable = pci;
- };
++};
 diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c
 index 6806bff9c..fd68a513e 100644
 --- a/grub-core/commands/nativedisk.c

From f666652fe1597e59b47054ea45db4a892c4edd9b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 18 Jan 2025 01:43:02 +0000
Subject: [PATCH 1046/1549] snip

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../0010-coreboot-fam15h-use-new-upstream-for-acpica.patch     | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/config/coreboot/fam15h/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch b/config/coreboot/fam15h/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
index 2f95297d..b48e88cd 100644
--- a/config/coreboot/fam15h/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
+++ b/config/coreboot/fam15h/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
@@ -8,9 +8,6 @@ the original upstream died
 i decided to host it myself, on libreboot rsync,
 for use by mirrors.
 
-this is also useful for GNU Boot, when downloading
-acpica on coreboot 4.11_branch, for fam15h boards
-
 this change is not necessary on other coreboot trees,
 which adhere to new coreboot policy (newer coreboot
 pulls acpica from github, which is fairly reliable)

From 8c65e64e398cc03cfc94c1c0153a68183ee275b7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 18 Jan 2025 05:06:34 +0000
Subject: [PATCH 1047/1549] snip

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.md b/README.md
index 7f29bc14..f8de18aa 100644
--- a/README.md
+++ b/README.md
@@ -46,7 +46,7 @@ more robust installation. Documentation is provided.
 How does Libreboot differ from coreboot?
 ========================================
 
-In the same way that *Debian* is a GNU+Linux distribution, `libreboot` is
+In the same way that *Debian* is a Linux distribution, `libreboot` is
 a *coreboot distribution*. If you want to build a ROM image from scratch, you
 otherwise have to perform expert-level configuration of coreboot, GRUB and
 whatever other software you need, to prepare the ROM image. With *libreboot*,

From c944c2bbac7f6b956a1b46f8a49e506e3cbf3608 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 Jan 2025 11:33:30 +0000
Subject: [PATCH 1048/1549] util/nvmutil: General code cleanup

A lot of size-coding was performed in prior audits, to
make the sloccount lower on nvmutil, but this resulted in
code that wasn't very human readable.

I've reversed some of it and added comments, for clarity.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 92 +++++++++++++++++++++++++++++-------------
 1 file changed, 65 insertions(+), 27 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 68bb95da..520b2078 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -28,12 +28,13 @@ uint8_t hextonum(char chs), rhex(void);
 
 uint16_t buf16[SIZE_4KB], mac[3] = {0, 0, 0};
 uint8_t *buf = (uint8_t *) &buf16;
-size_t nf = 128, gbe[2];
+size_t nf, gbe[2];
 uint8_t nvmPartChanged[2] = {0, 0}, skipread[2] = {0, 0};
-int e = 1, flags = O_RDWR, rfd, fd, part, gbeFileChanged = 0;
+int e = 1, flags, rfd, fd, part, gbeFileChanged = 0;
 
 const char *strMac = NULL, *strRMac = "??:??:??:??:??:??", *filename = NULL;
 
+/* available commands, set a pointer based on user command */
 typedef struct op {
 	char *str;
 	void (*cmd)(void);
@@ -49,13 +50,16 @@ op_t op[] = {
 };
 void (*cmd)(void) = NULL;
 
+/* wrappers for BSD-style err() function (error handling) */
 #define ERR() errno = errno ? errno : ECANCELED
 #define err_if(x) if (x) err(ERR(), "%s", filename)
 
+/* Macro for opening a file with errors properly handled */
 #define xopen(f,l,p) if (opendir(l) != NULL) err(errno = EISDIR, "%s", l); \
     if ((f = open(l, p)) == -1) err(ERR(), "%s", l); \
     if (fstat(f, &st) == -1) err(ERR(), "%s", l)
 
+/* Macros for reading/writing the GbE file in memory */
 #define word(pos16, partnum) buf16[pos16 + (partnum << 11)]
 #define setWord(pos16, p, val16) if ((gbeFileChanged = 1) && \
     word(pos16, p) != val16) nvmPartChanged[p] = 1 | (word(pos16, p) = val16)
@@ -63,7 +67,7 @@ void (*cmd)(void) = NULL;
 int
 main(int argc, char *argv[])
 {
-	if (argc < 3) {
+	if (argc < 3) { /* TODO: manpage! */
 		fprintf(stderr, "Modify Intel GbE NVM images e.g. set MAC\n");
 		fprintf(stderr, "USAGE:\n");
 		fprintf(stderr, " %s FILE dump\n", argv[0]);
@@ -74,43 +78,54 @@ main(int argc, char *argv[])
 		fprintf(stderr, " %s FILE setchecksum 0|1\n", argv[0]);
 		err(errno = ECANCELED, "Too few arguments");
 	}
-	flags = (strcmp(COMMAND, "dump") == 0) ? O_RDONLY : flags;
+	if (strcmp(COMMAND, "dump") == 0)
+		flags = O_RDONLY; /* write not needed for dump cmd */
+	else
+		flags = O_RDWR;
 	filename = argv[1];
 #ifdef __OpenBSD__
+	/* OpenBSD sandboxing: https://man.openbsd.org/pledge.2 */
+	/* Also: https://man.openbsd.org/unveil.2 */
 	err_if(unveil("/dev/urandom", "r") == -1);
-	if (flags == O_RDONLY) {
+	if (flags == O_RDONLY) { /* write not needed for dump command */
 		err_if(unveil(filename, "r") == -1);
 		err_if(pledge("stdio rpath", NULL) == -1);
-	} else {
+	} else { /* not dump command, so pledge read-write instead */
 		err_if(unveil(filename, "rw") == -1);
 		err_if(pledge("stdio rpath wpath", NULL) == -1);
 	}
 #endif
+	/* open files, but don't read yet; do pledge after, *then* read */
 	openFiles(filename);
 #ifdef __OpenBSD__
+	/* OpenBSD sandboxing: https://man.openbsd.org/pledge.2 */
 	err_if(pledge("stdio", NULL) == -1);
 #endif
 
-	for (int i = 0; i < 6; i++)
+	for (int i = 0; i < 6; i++) /* detect user-supplied command */
 		if (strcmp(COMMAND, op[i].str) == 0)
 			if ((cmd = argc >= op[i].args ? op[i].cmd : NULL))
-				break;
-	if (cmd == cmd_setmac)
-		strMac = (argc > 3) ? MAC_ADDRESS : strRMac;
-	else if ((cmd != NULL) && (argc > 3))
+				break; /* function ptr set, as per user cmd */
+	if (cmd == cmd_setmac) { /* user wishes to set the MAC address */
+		strMac = strRMac; /* random mac */
+		if (argc > 3) /* user-supplied mac (can be random) */
+			strMac = MAC_ADDRESS;
+	} else if ((cmd != NULL) && (argc > 3)) { /* user-supplied partnum */
 		err_if((errno = (!((part = PARTN[0] - '0') == 0 || part == 1))
-		    || PARTN[1] ? EINVAL : errno));
-	err_if((errno = (cmd == NULL) ? EINVAL : errno));
+		    || PARTN[1] ? EINVAL : errno)); /* only allow '0' or '1' */
+	}
+	err_if((errno = (cmd == NULL) ? EINVAL : errno)); /* bad user arg */
 
-	readGbe();
-	(*cmd)();
+	readGbe(); /* read gbe file into memory */
+	(*cmd)(); /* operate on gbe file in memory, as per user command */
 
 	if ((gbeFileChanged) && (flags != O_RDONLY) && (cmd != writeGbe))
-		writeGbe();
-	err_if((errno != 0) && (cmd != cmd_dump));
-	return errno;
+		writeGbe(); /* not called for swap cmd; swap calls writeGbe */
+	err_if((errno != 0) && (cmd != cmd_dump)); /* don't err on dump */
+	return errno; /* errno can be set by the dump command */
 }
 
+/* open gbe file and /dev/urandom, setting permissions */
 void
 openFiles(const char *path)
 {
@@ -119,13 +134,18 @@ openFiles(const char *path)
 	if ((st.st_size != (SIZE_4KB << 1)))
 		err(errno = ECANCELED, "File `%s` not 8KiB", path);
 	xopen(rfd, "/dev/urandom", O_RDONLY);
-	errno = errno != ENOTDIR ? errno : 0;
+	if (errno == ENOTDIR)
+		errno = 0;
 }
 
+/* read gbe file into memory buffer */
 void
 readGbe(void)
 {
-	nf = ((cmd == writeGbe) || (cmd == cmd_copy)) ? SIZE_4KB : nf;
+	if ((cmd == writeGbe) || (cmd == cmd_copy))
+		nf = SIZE_4KB;
+	else
+		nf = 128;
 	skipread[part ^ 1] = (cmd == cmd_copy) | (cmd == cmd_setchecksum)
 	    | (cmd == cmd_brick);
 	gbe[1] = (gbe[0] = (size_t) buf) + SIZE_4KB;
@@ -133,10 +153,11 @@ readGbe(void)
 		if (skipread[p])
 			continue;
 		err_if(pread(fd, (uint8_t *) gbe[p], nf, p << 12) == -1);
-		swap(p);
+		swap(p); /* handle big-endian host CPU */
 	}
 }
 
+/* set MAC address and checksum on nvm part */
 void
 cmd_setmac(void)
 {
@@ -151,6 +172,7 @@ cmd_setmac(void)
 	}
 }
 
+/* parse MAC string, write to char buffer */
 int
 macAddress(const char *strMac, uint16_t *mac)
 {
@@ -174,6 +196,7 @@ macAddress(const char *strMac, uint16_t *mac)
 	return ((total == 0) | (mac[0] & 1)); /* multicast/all-zero banned */
 }
 
+/* convert hex char to char value (0-15) */
 uint8_t
 hextonum(char ch)
 {
@@ -183,9 +206,10 @@ hextonum(char ch)
 		return ch - 'A' + 10;
 	else if ((ch >= 'a') && (ch <= 'f'))
 		return ch - 'a' + 10;
-	return (ch == '?') ? rhex() : 16;
+	return (ch == '?') ? rhex() : 16; /* 16 for error (invalid char) */
 }
 
+/* random number generator */
 uint8_t
 rhex(void)
 {
@@ -195,6 +219,7 @@ rhex(void)
 	return rnum[n--] & 0xf;
 }
 
+/* print mac address and hexdump of parts */
 void
 cmd_dump(void)
 {
@@ -203,20 +228,26 @@ cmd_dump(void)
 			++numInvalid;
 		printf("MAC (part %d): ", partnum);
 		macf(partnum), hexdump(partnum);
-		errno = ((numInvalid < 2) && (partnum)) ? 0 : errno;
+		if ((numInvalid < 2) && (partnum))
+			errno = 0;
 	}
 }
 
+/* print mac address of part */
 void
 macf(int partnum)
 {
 	for (int c = 0; c < 3; c++) {
 		uint16_t val16 = word(c, partnum);
 		printf("%02x:%02x", val16 & 0xff, val16 >> 8);
-		printf(c == 2 ? "\n" : ":");
+		if (c == 2)
+			printf("\n");
+		else
+			printf(":");
 	}
 }
 
+/* print hexdump of nvm part */
 void
 hexdump(int partnum)
 {
@@ -227,10 +258,12 @@ hexdump(int partnum)
 			if (c == 4)
 				printf(" ");
 			printf(" %02x %02x", val16 & 0xff, val16 >> 8);
-		} printf("\n");
+		}
+		printf("\n");
 	}
 }
 
+/* correct the checksum on part */
 void
 cmd_setchecksum(void)
 {
@@ -240,6 +273,7 @@ cmd_setchecksum(void)
 	setWord(0x3F, part, NVM_CHECKSUM - val16);
 }
 
+/* intentionally set wrong checksum on part */
 void
 cmd_brick(void)
 {
@@ -247,6 +281,7 @@ cmd_brick(void)
 		setWord(0x3F, part, ((word(0x3F, part)) ^ 0xFF));
 }
 
+/* overwrite the contents of one part with the other */
 void
 cmd_copy(void)
 {
@@ -254,6 +289,7 @@ cmd_copy(void)
 		gbe[part ^ 1] = gbe[part]; /* speedhack: copy ptr, not words */
 }
 
+/* verify nvme part checksum (return 1 if valid) */
 int
 goodChecksum(int partnum)
 {
@@ -266,6 +302,7 @@ goodChecksum(int partnum)
 	return (errno = ECANCELED) & 0;
 }
 
+/* write the nvm parts back to the file */
 void
 writeGbe(void)
 {
@@ -273,13 +310,14 @@ writeGbe(void)
 	for (int p = 0, x = (cmd == writeGbe) ? 1 : 0; p < 2; p++) {
 		if ((!nvmPartChanged[p]) && (cmd != writeGbe))
 			continue;
-		swap(p^x);
-		err_if(pwrite(fd, (uint8_t *) gbe[p^x], nf, p << 12) == -1);
+		swap(p ^ x);
+		err_if(pwrite(fd, (uint8_t *) gbe[p ^ x], nf, p << 12) == -1);
 	}
 	errno = 0;
 	err_if(close(fd) == -1);
 }
 
+/* swap byte order on big-endian CPUs. swap skipped on little endian */
 void
 swap(int partnum)
 {

From 68c32034a00e4cf37fa5550d85970cb73c5a62a4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 Jan 2025 11:37:26 +0000
Subject: [PATCH 1049/1549] typo: nvme should say nvm in nvmutil.c

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 520b2078..83e8d6e9 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -289,7 +289,7 @@ cmd_copy(void)
 		gbe[part ^ 1] = gbe[part]; /* speedhack: copy ptr, not words */
 }
 
-/* verify nvme part checksum (return 1 if valid) */
+/* verify nvm part checksum (return 1 if valid) */
 int
 goodChecksum(int partnum)
 {

From a98ca5bf65c6c195995493056625649b70030076 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 Jan 2025 12:18:45 +0000
Subject: [PATCH 1050/1549] util/nvmutil: Prevent unveil allowing dir access

We were checking directories *after* calling unveil, which
means that the sandboxing was incomplete; we only want files
to be accessed, not directories.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 28 +++++++++++++++++++++++-----
 1 file changed, 23 insertions(+), 5 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 83e8d6e9..28096c9f 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -16,7 +16,8 @@
 
 void cmd_setchecksum(void), cmd_brick(void), swap(int partnum), writeGbe(void),
     cmd_dump(void), cmd_setmac(void), readGbe(void), cmd_copy(void),
-    macf(int partnum), hexdump(int partnum), openFiles(const char *path);
+    macf(int partnum), hexdump(int partnum), openFiles(const char *path),
+    checkdir(const char *path);
 int macAddress(const char *strMac, uint16_t *mac), goodChecksum(int partnum);
 uint8_t hextonum(char chs), rhex(void);
 
@@ -55,8 +56,7 @@ void (*cmd)(void) = NULL;
 #define err_if(x) if (x) err(ERR(), "%s", filename)
 
 /* Macro for opening a file with errors properly handled */
-#define xopen(f,l,p) if (opendir(l) != NULL) err(errno = EISDIR, "%s", l); \
-    if ((f = open(l, p)) == -1) err(ERR(), "%s", l); \
+#define xopen(f,l,p) if ((f = open(l, p)) == -1) err(ERR(), "%s", l); \
     if (fstat(f, &st) == -1) err(ERR(), "%s", l)
 
 /* Macros for reading/writing the GbE file in memory */
@@ -83,6 +83,11 @@ main(int argc, char *argv[])
 	else
 		flags = O_RDWR;
 	filename = argv[1];
+	/* Err if files are actually directories; this also
+	   prevents unveil allowing directory accesses, which
+	   is critical because we only want *file* accesses. */
+	checkdir("/dev/urandom");
+	checkdir(filename); /* Must be a file, not a directory */
 #ifdef __OpenBSD__
 	/* OpenBSD sandboxing: https://man.openbsd.org/pledge.2 */
 	/* Also: https://man.openbsd.org/unveil.2 */
@@ -125,6 +130,21 @@ main(int argc, char *argv[])
 	return errno; /* errno can be set by the dump command */
 }
 
+/*
+ * check whether urandom/file is a directory, and err if so,
+ * to prevent later unveil calls from permitting directory access
+ * on OpenBSD
+ */
+void
+checkdir(const char *path)
+{
+	if (opendir(path) != NULL)
+		err(errno = EISDIR, "%s", path);
+	if (errno = ENOTDIR)
+		errno = 0;
+	err_if(errno);
+}
+
 /* open gbe file and /dev/urandom, setting permissions */
 void
 openFiles(const char *path)
@@ -134,8 +154,6 @@ openFiles(const char *path)
 	if ((st.st_size != (SIZE_4KB << 1)))
 		err(errno = ECANCELED, "File `%s` not 8KiB", path);
 	xopen(rfd, "/dev/urandom", O_RDONLY);
-	if (errno == ENOTDIR)
-		errno = 0;
 }
 
 /* read gbe file into memory buffer */

From c829b45c17c529563823045d7dbee592983bdd21 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 Jan 2025 13:13:28 +0000
Subject: [PATCH 1051/1549] util/nvmutil: support 16kb and 128kb gbe files

See:
https://edc.intel.com/content/www/us/en/design/ipla/software-development-platforms/client/platforms/alder-lake-mobile-p/intel-600-series-chipset-family-on-package-platform-controller-hub-pch-datash/spi0-for-flash/

The rules described there are universal, and replicated elsewhere
for many other platforms. The rules are simply:

* Flash descriptor is one block size, e.g. 4KB
* GbE is two block sizes, so if IfD is 4KB, GbE is 8KB

Intel defines 16KB and 128KB GbE files in specs, pertaining to
8KB and 64KB block sizes respectively.

The minimum size is 4KB blocksize, for 8KB GbE files which
we already supported. On larger block sizes, the same 4KB
parts are observed: a single 4KB IfD area at the start of
the block, and:

4KB GbE part at the start of the GbE region, and:
4KB GbE part at the start of GbE region plus block size

The empty space inbetween is padding, and we ignore it,
except when running swap/copy commands.

The nvmutil code has been modified, to create a 128KB buffer in
memory instead of 8KB, for loading GbE files.

Partsize is set to GbE file size divided by 2, and only the
area of memory we need to use is mapped; for example, if
we're loading a 8KB GbE file into memory, we only touch
the first 8KB part of the buffer, or first 16KB for 128KB
files.

In practise, we almost never see GbE files with sizes higher
than 8KB, but *we have seen it*, *AND NOW IT'S SUPPORTED!"

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 34 ++++++++++++++++++++++++----------
 1 file changed, 24 insertions(+), 10 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 28096c9f..24ee9f91 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -24,12 +24,17 @@ uint8_t hextonum(char chs), rhex(void);
 #define COMMAND argv[2]
 #define MAC_ADDRESS argv[3]
 #define PARTN argv[3]
-#define SIZE_4KB 0x1000
 #define NVM_CHECKSUM 0xBABA
 
-uint16_t buf16[SIZE_4KB], mac[3] = {0, 0, 0};
+/* gbe is two block sizes, i.e. one of the following multiplied by two: */
+#define SIZE_8KB 0x2000
+#define SIZE_16KB 0x4000
+#define SIZE_64KB 0x10000
+#define SIZE_128KB 0x20000
+
+uint16_t buf16[SIZE_64KB], mac[3] = {0, 0, 0};
 uint8_t *buf = (uint8_t *) &buf16;
-size_t nf, gbe[2];
+size_t partsize, nf, gbe[2];
 uint8_t nvmPartChanged[2] = {0, 0}, skipread[2] = {0, 0};
 int e = 1, flags, rfd, fd, part, gbeFileChanged = 0;
 
@@ -60,7 +65,7 @@ void (*cmd)(void) = NULL;
     if (fstat(f, &st) == -1) err(ERR(), "%s", l)
 
 /* Macros for reading/writing the GbE file in memory */
-#define word(pos16, partnum) buf16[pos16 + (partnum << 11)]
+#define word(pos16, partnum) buf16[pos16 + (partnum * (partsize >> 1))]
 #define setWord(pos16, p, val16) if ((gbeFileChanged = 1) && \
     word(pos16, p) != val16) nvmPartChanged[p] = 1 | (word(pos16, p) = val16)
 
@@ -151,8 +156,16 @@ openFiles(const char *path)
 {
 	struct stat st;
 	xopen(fd, path, flags);
-	if ((st.st_size != (SIZE_4KB << 1)))
-		err(errno = ECANCELED, "File `%s` not 8KiB", path);
+	switch(st.st_size) {
+	case SIZE_8KB:
+	case SIZE_16KB:
+	case SIZE_128KB:
+		partsize = st.st_size >> 1;
+		break;
+	default:
+		err(errno = ECANCELED, "Invalid file size (not 8/16/128KiB)");
+		break;
+	}
 	xopen(rfd, "/dev/urandom", O_RDONLY);
 }
 
@@ -161,16 +174,16 @@ void
 readGbe(void)
 {
 	if ((cmd == writeGbe) || (cmd == cmd_copy))
-		nf = SIZE_4KB;
+		nf = partsize;
 	else
 		nf = 128;
 	skipread[part ^ 1] = (cmd == cmd_copy) | (cmd == cmd_setchecksum)
 	    | (cmd == cmd_brick);
-	gbe[1] = (gbe[0] = (size_t) buf) + SIZE_4KB;
+	gbe[1] = (gbe[0] = (size_t) buf) + partsize;
 	for (int p = 0; p < 2; p++) {
 		if (skipread[p])
 			continue;
-		err_if(pread(fd, (uint8_t *) gbe[p], nf, p << 12) == -1);
+		err_if(pread(fd, (uint8_t *) gbe[p], nf, p * partsize) == -1);
 		swap(p); /* handle big-endian host CPU */
 	}
 }
@@ -329,7 +342,8 @@ writeGbe(void)
 		if ((!nvmPartChanged[p]) && (cmd != writeGbe))
 			continue;
 		swap(p ^ x);
-		err_if(pwrite(fd, (uint8_t *) gbe[p ^ x], nf, p << 12) == -1);
+		err_if(pwrite(fd, (uint8_t *) gbe[p ^ x], nf, p * partsize)
+		    == -1);
 	}
 	errno = 0;
 	err_if(close(fd) == -1);

From 5aaf27f80c387e7c6fa332efe3e564217b89908f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 Jan 2025 13:34:07 +0000
Subject: [PATCH 1052/1549] remove errant comment in nvmutil

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 24ee9f91..6f08a859 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -26,7 +26,6 @@ uint8_t hextonum(char chs), rhex(void);
 #define PARTN argv[3]
 #define NVM_CHECKSUM 0xBABA
 
-/* gbe is two block sizes, i.e. one of the following multiplied by two: */
 #define SIZE_8KB 0x2000
 #define SIZE_16KB 0x4000
 #define SIZE_64KB 0x10000

From 88fb9cc90ea6643dc88f5c24864c33dd0b0a14f7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 Jan 2025 16:45:08 +0000
Subject: [PATCH 1053/1549] util/nvmutil: more cleanup

spread out a few lines, so that they are more
readable, and more thoroughly comment some parts.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 87 ++++++++++++++++++++++++++++++------------
 1 file changed, 62 insertions(+), 25 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 6f08a859..cd98a870 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -82,11 +82,13 @@ main(int argc, char *argv[])
 		fprintf(stderr, " %s FILE setchecksum 0|1\n", argv[0]);
 		err(errno = ECANCELED, "Too few arguments");
 	}
+
+	filename = argv[1];
 	if (strcmp(COMMAND, "dump") == 0)
 		flags = O_RDONLY; /* write not needed for dump cmd */
 	else
 		flags = O_RDWR;
-	filename = argv[1];
+
 	/* Err if files are actually directories; this also
 	   prevents unveil allowing directory accesses, which
 	   is critical because we only want *file* accesses. */
@@ -104,8 +106,8 @@ main(int argc, char *argv[])
 		err_if(pledge("stdio rpath wpath", NULL) == -1);
 	}
 #endif
-	/* open files, but don't read yet; do pledge after, *then* read */
-	openFiles(filename);
+
+	openFiles(filename); /* open files first, to allow harder pledge: */
 #ifdef __OpenBSD__
 	/* OpenBSD sandboxing: https://man.openbsd.org/pledge.2 */
 	err_if(pledge("stdio", NULL) == -1);
@@ -115,9 +117,10 @@ main(int argc, char *argv[])
 		if (strcmp(COMMAND, op[i].str) == 0)
 			if ((cmd = argc >= op[i].args ? op[i].cmd : NULL))
 				break; /* function ptr set, as per user cmd */
-	if (cmd == cmd_setmac) { /* user wishes to set the MAC address */
-		strMac = strRMac; /* random mac */
-		if (argc > 3) /* user-supplied mac (can be random) */
+
+	if (cmd == cmd_setmac) {
+		strMac = strRMac; /* random MAC */
+		if (argc > 3) /* user-supplied MAC (can be random) */
 			strMac = MAC_ADDRESS;
 	} else if ((cmd != NULL) && (argc > 3)) { /* user-supplied partnum */
 		err_if((errno = (!((part = PARTN[0] - '0') == 0 || part == 1))
@@ -130,6 +133,7 @@ main(int argc, char *argv[])
 
 	if ((gbeFileChanged) && (flags != O_RDONLY) && (cmd != writeGbe))
 		writeGbe(); /* not called for swap cmd; swap calls writeGbe */
+
 	err_if((errno != 0) && (cmd != cmd_dump)); /* don't err on dump */
 	return errno; /* errno can be set by the dump command */
 }
@@ -154,7 +158,9 @@ void
 openFiles(const char *path)
 {
 	struct stat st;
-	xopen(fd, path, flags);
+
+	xopen(fd, path, flags); /* gbe file */
+
 	switch(st.st_size) {
 	case SIZE_8KB:
 	case SIZE_16KB:
@@ -165,6 +171,8 @@ openFiles(const char *path)
 		err(errno = ECANCELED, "Invalid file size (not 8/16/128KiB)");
 		break;
 	}
+
+	/* the MAC address randomiser relies on reading urandom */
 	xopen(rfd, "/dev/urandom", O_RDONLY);
 }
 
@@ -173,15 +181,21 @@ void
 readGbe(void)
 {
 	if ((cmd == writeGbe) || (cmd == cmd_copy))
-		nf = partsize;
+		nf = partsize; /* read/write the entire block */
 	else
-		nf = 128;
-	skipread[part ^ 1] = (cmd == cmd_copy) | (cmd == cmd_setchecksum)
-	    | (cmd == cmd_brick);
-	gbe[1] = (gbe[0] = (size_t) buf) + partsize;
+		nf = 128; /* only read/write the nvm part of the block */
+
+	if ((cmd == cmd_copy) || (cmd == cmd_setchecksum) || (cmd == cmd_brick))
+		skipread[part ^ 1] = 1; /* only read the user-specified part */
+
+	/* we pread per-part, so each part has its own pointer: */
+	gbe[0] = (size_t) buf;
+	gbe[1] = gbe[0] + partsize;
+
 	for (int p = 0; p < 2; p++) {
 		if (skipread[p])
-			continue;
+			continue; /* avoid unnecessary reads */
+
 		err_if(pread(fd, (uint8_t *) gbe[p], nf, p * partsize) == -1);
 		swap(p); /* handle big-endian host CPU */
 	}
@@ -193,12 +207,15 @@ cmd_setmac(void)
 {
 	if (macAddress(strMac, mac))
 		err(errno = ECANCELED, "Bad MAC address");
+
 	for (int partnum = 0; partnum < 2; partnum++) {
 		if (!goodChecksum(part = partnum))
 			continue;
-		for (int w = 0; w < 3; w++)
+
+		for (int w = 0; w < 3; w++) /* write MAC to gbe part */
 			setWord(w, partnum, mac[w]);
-		cmd_setchecksum();
+
+		cmd_setchecksum(); /* MAC updated; need valid checksum */
 	}
 }
 
@@ -207,23 +224,33 @@ int
 macAddress(const char *strMac, uint16_t *mac)
 {
 	uint64_t total = 0;
-	if (strnlen(strMac, 20) == 17) {
+	if (strnlen(strMac, 20) != 17)
+		return 1; /* 1 means error */
+
 	for (uint8_t h, i = 0; i < 16; i += 3) {
 		if (i != 15)
 			if (strMac[i + 2] != ':')
 				return 1;
+
 		int byte = i / 3;
+
+		/* Update MAC buffer per-nibble from a given string */
 		for (int nib = 0; nib < 2; nib++, total += h) {
 			if ((h = hextonum(strMac[i + nib])) > 15)
-				return 1;
-			if ((byte == 0) && (nib == 1))
-				if (strMac[i + nib] == '?')
+				return 1; /* invalid character, MAC string */
+
+			/* if random: ensure local-only, unicast MAC */
+			if ((byte == 0) && (nib == 1)) /* unicast/local nib */
+				if (strMac[i + nib] == '?') /* ?=random */
 					h = (h & 0xE) | 2; /* local, unicast */
+
 			mac[byte >> 1] |= ((uint16_t ) h)
 			    << ((8 * (byte % 2)) + (4 * (nib ^ 1)));
 		}
-	}}
-	return ((total == 0) | (mac[0] & 1)); /* multicast/all-zero banned */
+	}
+
+	/* do not permit multicast/all-zero MAC: */
+	return ((total == 0) || (mac[0] & 1)) ? 1 : 0;
 }
 
 /* convert hex char to char value (0-15) */
@@ -300,7 +327,8 @@ cmd_setchecksum(void)
 	uint16_t val16 = 0;
 	for (int c = 0; c < 0x3F; c++)
 		val16 += word(c, part);
-	setWord(0x3F, part, NVM_CHECKSUM - val16);
+
+	setWord(0x3F, part, NVM_CHECKSUM - val16); /* correct the checksum */
 }
 
 /* intentionally set wrong checksum on part */
@@ -326,24 +354,32 @@ goodChecksum(int partnum)
 	uint16_t total = 0;
 	for(int w = 0; w <= 0x3F; w++)
 		total += word(w, partnum);
+
 	if (total == NVM_CHECKSUM)
 		return 1;
+
 	fprintf(stderr, "WARNING: BAD checksum in part %d\n", partnum);
-	return (errno = ECANCELED) & 0;
+	errno = ECANCELED;
+	return 0;
 }
 
 /* write the nvm parts back to the file */
 void
 writeGbe(void)
 {
-	err_if((cmd == writeGbe) && !(goodChecksum(0) || goodChecksum(1)));
+	if (cmd == writeGbe) /* cmd swap calls writeGbE; need valid checksum */
+		err_if(!(goodChecksum(0) || goodChecksum(1)));
+
 	for (int p = 0, x = (cmd == writeGbe) ? 1 : 0; p < 2; p++) {
 		if ((!nvmPartChanged[p]) && (cmd != writeGbe))
 			continue;
-		swap(p ^ x);
+
+		swap(p ^ x); /* swap bytes on big-endian host CPUs */
+
 		err_if(pwrite(fd, (uint8_t *) gbe[p ^ x], nf, p * partsize)
 		    == -1);
 	}
+
 	errno = 0;
 	err_if(close(fd) == -1);
 }
@@ -354,6 +390,7 @@ swap(int partnum)
 {
 	size_t w, x;
 	uint8_t *n = (uint8_t *) gbe[partnum];
+
 	for (w = nf * ((uint8_t *) &e)[0], x = 1; w < nf; w += 2, x += 2)
 		n[w] ^= n[x], n[x] ^= n[w], n[w] ^= n[x];
 }

From c14eccaf153d56f01af8cba685a21df486f4dd5e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 Jan 2025 16:58:51 +0000
Subject: [PATCH 1054/1549] util/nvmutil: more granular MAC parsing errors

tell the user exactly what they got wrong, instead
of simply printing "bad mac address", which is not
very helpful to the user

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 28 ++++++++++++++++------------
 1 file changed, 16 insertions(+), 12 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index cd98a870..250350a6 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -15,10 +15,10 @@
 #include <unistd.h>
 
 void cmd_setchecksum(void), cmd_brick(void), swap(int partnum), writeGbe(void),
-    cmd_dump(void), cmd_setmac(void), readGbe(void), cmd_copy(void),
+    cmd_dump(void), cmd_setmac(void), readGbe(void), checkdir(const char *path),
     macf(int partnum), hexdump(int partnum), openFiles(const char *path),
-    checkdir(const char *path);
-int macAddress(const char *strMac, uint16_t *mac), goodChecksum(int partnum);
+    cmd_copy(void), parseMacString(const char *strMac, uint16_t *mac);
+int goodChecksum(int partnum);
 uint8_t hextonum(char chs), rhex(void);
 
 #define COMMAND argv[2]
@@ -205,8 +205,7 @@ readGbe(void)
 void
 cmd_setmac(void)
 {
-	if (macAddress(strMac, mac))
-		err(errno = ECANCELED, "Bad MAC address");
+	parseMacString(strMac, mac);
 
 	for (int partnum = 0; partnum < 2; partnum++) {
 		if (!goodChecksum(part = partnum))
@@ -220,24 +219,27 @@ cmd_setmac(void)
 }
 
 /* parse MAC string, write to char buffer */
-int
-macAddress(const char *strMac, uint16_t *mac)
+void
+parseMacString(const char *strMac, uint16_t *mac)
 {
 	uint64_t total = 0;
 	if (strnlen(strMac, 20) != 17)
-		return 1; /* 1 means error */
+		err(errno = EINVAL, "Invalid MAC address string length");
 
 	for (uint8_t h, i = 0; i < 16; i += 3) {
 		if (i != 15)
 			if (strMac[i + 2] != ':')
-				return 1;
+				err(errno = EINVAL,
+				    "Invalid MAC address separator '%c'",
+				    strMac[i + 2]);
 
 		int byte = i / 3;
 
 		/* Update MAC buffer per-nibble from a given string */
 		for (int nib = 0; nib < 2; nib++, total += h) {
 			if ((h = hextonum(strMac[i + nib])) > 15)
-				return 1; /* invalid character, MAC string */
+				err(errno = EINVAL, "Invalid character '%c'",
+				    strMac[i + nib]);
 
 			/* if random: ensure local-only, unicast MAC */
 			if ((byte == 0) && (nib == 1)) /* unicast/local nib */
@@ -249,8 +251,10 @@ macAddress(const char *strMac, uint16_t *mac)
 		}
 	}
 
-	/* do not permit multicast/all-zero MAC: */
-	return ((total == 0) || (mac[0] & 1)) ? 1 : 0;
+	if (total == 0)
+		err(errno = EINVAL, "Invalid MAC (all-zero MAC address)");
+	if (mac[0] & 1)
+		err(errno = EINVAL, "Invalid MAC (multicast bit set)");
 }
 
 /* convert hex char to char value (0-15) */

From deb307eaf6312f06ee445bf21c617c079d0cd679 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 Jan 2025 17:03:31 +0000
Subject: [PATCH 1055/1549] util/nvmutil: more minor cleanup

just some line breaks

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 250350a6..1eefa08b 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -94,10 +94,13 @@ main(int argc, char *argv[])
 	   is critical because we only want *file* accesses. */
 	checkdir("/dev/urandom");
 	checkdir(filename); /* Must be a file, not a directory */
+
 #ifdef __OpenBSD__
 	/* OpenBSD sandboxing: https://man.openbsd.org/pledge.2 */
 	/* Also: https://man.openbsd.org/unveil.2 */
+
 	err_if(unveil("/dev/urandom", "r") == -1);
+
 	if (flags == O_RDONLY) { /* write not needed for dump command */
 		err_if(unveil(filename, "r") == -1);
 		err_if(pledge("stdio rpath", NULL) == -1);

From a6c18734e70757973f4f9d816bdb4fa205ef173d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 Jan 2025 17:58:42 +0000
Subject: [PATCH 1056/1549] util/nvmutil: extreme pledge/unveil hardening

call pledge *much* earlier, and and lock everything down
much sooner. the point of pledge/unveil is precisely that
your program must operate under the most restrictive set
of conditions possible, and still function.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 43 ++++++++++++++++++++++++++----------------
 1 file changed, 27 insertions(+), 16 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 1eefa08b..7fbf1664 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -71,6 +71,11 @@ void (*cmd)(void) = NULL;
 int
 main(int argc, char *argv[])
 {
+#ifdef __OpenBSD__
+	/* OpenBSD pledge (sandboxing): https://man.openbsd.org/pledge.2 */
+	err_if(pledge("stdio rpath wpath unveil", NULL) == -1);
+#endif
+
 	if (argc < 3) { /* TODO: manpage! */
 		fprintf(stderr, "Modify Intel GbE NVM images e.g. set MAC\n");
 		fprintf(stderr, "USAGE:\n");
@@ -84,29 +89,35 @@ main(int argc, char *argv[])
 	}
 
 	filename = argv[1];
-	if (strcmp(COMMAND, "dump") == 0)
-		flags = O_RDONLY; /* write not needed for dump cmd */
-	else
-		flags = O_RDWR;
 
-	/* Err if files are actually directories; this also
-	   prevents unveil allowing directory accesses, which
-	   is critical because we only want *file* accesses. */
+	if (strcmp(COMMAND, "dump") == 0) {
+		flags = O_RDONLY; /* write not needed for dump cmd */
+#ifdef __OpenBSD__
+		/* writes not needed for the dump command */
+		err_if(pledge("stdio rpath unveil", NULL) == -1);
+#endif
+	} else {
+		flags = O_RDWR;
+	}
+
+	/* check for dir first, to prevent unveil from
+	   permitting directory access on OpenBSD */
 	checkdir("/dev/urandom");
 	checkdir(filename); /* Must be a file, not a directory */
 
 #ifdef __OpenBSD__
-	/* OpenBSD sandboxing: https://man.openbsd.org/pledge.2 */
-	/* Also: https://man.openbsd.org/unveil.2 */
-
+	/* OpenBSD unveil: https://man.openbsd.org/unveil.2 */
 	err_if(unveil("/dev/urandom", "r") == -1);
 
-	if (flags == O_RDONLY) { /* write not needed for dump command */
-		err_if(unveil(filename, "r") == -1);
-		err_if(pledge("stdio rpath", NULL) == -1);
-	} else { /* not dump command, so pledge read-write instead */
+	/* Only allow access to /dev/urandom and the gbe file */
+	if (flags == O_RDONLY) { /* dump command */
+		err_if(unveil(filename, "r") == -1); /* write not needed */
+		err_if(unveil(NULL, NULL) == -1); /* lock unveil */
+		err_if(pledge("stdio rpath", NULL) == -1); /* lock unveil */
+	} else { /* other commands need read-write */
 		err_if(unveil(filename, "rw") == -1);
-		err_if(pledge("stdio rpath wpath", NULL) == -1);
+		err_if(unveil(NULL, NULL) == -1); /* lock unveil */
+		err_if(pledge("stdio rpath wpath", NULL) == -1); /* no unveil */
 	}
 #endif
 
@@ -119,7 +130,7 @@ main(int argc, char *argv[])
 	for (int i = 0; i < 6; i++) /* detect user-supplied command */
 		if (strcmp(COMMAND, op[i].str) == 0)
 			if ((cmd = argc >= op[i].args ? op[i].cmd : NULL))
-				break; /* function ptr set, as per user cmd */
+				break;
 
 	if (cmd == cmd_setmac) {
 		strMac = strRMac; /* random MAC */

From 073420d30563407f336e28e3df4eacd020e838b5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 Jan 2025 18:10:17 +0000
Subject: [PATCH 1057/1549] util/nvmutil: cleaner argument handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 7fbf1664..c3d242d8 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -127,10 +127,12 @@ main(int argc, char *argv[])
 	err_if(pledge("stdio", NULL) == -1);
 #endif
 
-	for (int i = 0; i < 6; i++) /* detect user-supplied command */
-		if (strcmp(COMMAND, op[i].str) == 0)
-			if ((cmd = argc >= op[i].args ? op[i].cmd : NULL))
-				break;
+	for (int i = 0; (i < 6) && (cmd == NULL); i++) {
+		if (strcmp(COMMAND, op[i].str) != 0)
+			continue;
+		if (argc >= op[i].args)
+			cmd = op[i].cmd;
+	}
 
 	if (cmd == cmd_setmac) {
 		strMac = strRMac; /* random MAC */

From ec3148dc3b5d4fd392ef9cbfe31051e54503768e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 24 Jan 2025 18:14:25 +0000
Subject: [PATCH 1058/1549] util/nvmutil: Show specific error for bad cmd argc

For example, if the brick command is used without specifying
a part number. Instead of saying "Invalid argument", show a
much more useful error message to help the user adapt.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index c3d242d8..c2839c45 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -130,8 +130,11 @@ main(int argc, char *argv[])
 	for (int i = 0; (i < 6) && (cmd == NULL); i++) {
 		if (strcmp(COMMAND, op[i].str) != 0)
 			continue;
-		if (argc >= op[i].args)
+		if (argc >= op[i].args) {
 			cmd = op[i].cmd;
+			break;
+		}
+		err(errno = EINVAL, "Too few args on command '%s'", op[i].str);
 	}
 
 	if (cmd == cmd_setmac) {

From ed45da9cae530925a5bc633ed080a6a04fb3c7dd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 25 Jan 2025 06:23:22 +0000
Subject: [PATCH 1059/1549] util/nvmutil: Remove unnecessary buffer

The buf variable is only used once, and only so
that we can get a pointer. We can point to buf16
instead, for the same result.

The gbe pointer (size_t) is later converter to
a char * when writing back to the file.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index c2839c45..7662e446 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -32,7 +32,6 @@ uint8_t hextonum(char chs), rhex(void);
 #define SIZE_128KB 0x20000
 
 uint16_t buf16[SIZE_64KB], mac[3] = {0, 0, 0};
-uint8_t *buf = (uint8_t *) &buf16;
 size_t partsize, nf, gbe[2];
 uint8_t nvmPartChanged[2] = {0, 0}, skipread[2] = {0, 0};
 int e = 1, flags, rfd, fd, part, gbeFileChanged = 0;
@@ -208,7 +207,7 @@ readGbe(void)
 		skipread[part ^ 1] = 1; /* only read the user-specified part */
 
 	/* we pread per-part, so each part has its own pointer: */
-	gbe[0] = (size_t) buf;
+	gbe[0] = (size_t) buf16;
 	gbe[1] = gbe[0] + partsize;
 
 	for (int p = 0; p < 2; p++) {

From cdf23975bc1aa5a2a90272662c151fd192e57d3c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 26 Jan 2025 06:00:49 +0000
Subject: [PATCH 1060/1549] util/nvmutil: Only allocate needed memory for file

We were allocating 128KB even if we only needed 8KB, for
example. It's not a lot of memory, but the principle of
the matter is that we must respect the user by not wasting
their memory.

The design of nvmutil is that it will never overflow, because
operations are mapped in memory to the exact size of the gbe
file, which can be 8KB, 16KB or 128KB, and this is enforced.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 7662e446..36862f9d 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -31,7 +31,7 @@ uint8_t hextonum(char chs), rhex(void);
 #define SIZE_64KB 0x10000
 #define SIZE_128KB 0x20000
 
-uint16_t buf16[SIZE_64KB], mac[3] = {0, 0, 0};
+uint16_t mac[3] = {0, 0, 0}, *buf16;
 size_t partsize, nf, gbe[2];
 uint8_t nvmPartChanged[2] = {0, 0}, skipread[2] = {0, 0};
 int e = 1, flags, rfd, fd, part, gbeFileChanged = 0;
@@ -198,6 +198,10 @@ openFiles(const char *path)
 void
 readGbe(void)
 {
+	char *buf = malloc(partsize << 1);
+	if (buf == NULL)
+		err(errno, "Can't malloc %ld B for '%s'", partsize, filename);
+
 	if ((cmd == writeGbe) || (cmd == cmd_copy))
 		nf = partsize; /* read/write the entire block */
 	else
@@ -207,8 +211,9 @@ readGbe(void)
 		skipread[part ^ 1] = 1; /* only read the user-specified part */
 
 	/* we pread per-part, so each part has its own pointer: */
-	gbe[0] = (size_t) buf16;
+	gbe[0] = (size_t) buf;
 	gbe[1] = gbe[0] + partsize;
+	buf16 = (uint16_t *) buf;
 
 	for (int p = 0; p < 2; p++) {
 		if (skipread[p])

From 7a7d356824e436d3df41c84de59ca30e5d95be6b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 26 Jan 2025 06:26:53 +0000
Subject: [PATCH 1061/1549] util/nvmutil: Remove unnecessary buf16 variable

We can just point to gbe[] directly, in the word macro.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 36862f9d..abb55602 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -31,7 +31,7 @@ uint8_t hextonum(char chs), rhex(void);
 #define SIZE_64KB 0x10000
 #define SIZE_128KB 0x20000
 
-uint16_t mac[3] = {0, 0, 0}, *buf16;
+uint16_t mac[3] = {0, 0, 0};
 size_t partsize, nf, gbe[2];
 uint8_t nvmPartChanged[2] = {0, 0}, skipread[2] = {0, 0};
 int e = 1, flags, rfd, fd, part, gbeFileChanged = 0;
@@ -63,7 +63,7 @@ void (*cmd)(void) = NULL;
     if (fstat(f, &st) == -1) err(ERR(), "%s", l)
 
 /* Macros for reading/writing the GbE file in memory */
-#define word(pos16, partnum) buf16[pos16 + (partnum * (partsize >> 1))]
+#define word(pos16, partnum) ((uint16_t *) gbe[partnum])[pos16]
 #define setWord(pos16, p, val16) if ((gbeFileChanged = 1) && \
     word(pos16, p) != val16) nvmPartChanged[p] = 1 | (word(pos16, p) = val16)
 
@@ -213,7 +213,6 @@ readGbe(void)
 	/* we pread per-part, so each part has its own pointer: */
 	gbe[0] = (size_t) buf;
 	gbe[1] = gbe[0] + partsize;
-	buf16 = (uint16_t *) buf;
 
 	for (int p = 0; p < 2; p++) {
 		if (skipread[p])

From 52e8ea57f7b1cef262939696e8012835dc4f7e59 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 26 Jan 2025 07:05:06 +0000
Subject: [PATCH 1062/1549] util/nvmutil: Further reduce memory usage

Allocate memory based on nf instead of partsize.

nf is the number of bytes actually read from each
part of the file.

Now if the user is running setmac for example,
256 bytes of memory will be allocated regardless
of gbe file size, whereas it would have previously
allocated 8KB, 16KB or 128KB depending on the file.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index abb55602..9b672ae0 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -198,10 +198,6 @@ openFiles(const char *path)
 void
 readGbe(void)
 {
-	char *buf = malloc(partsize << 1);
-	if (buf == NULL)
-		err(errno, "Can't malloc %ld B for '%s'", partsize, filename);
-
 	if ((cmd == writeGbe) || (cmd == cmd_copy))
 		nf = partsize; /* read/write the entire block */
 	else
@@ -210,9 +206,13 @@ readGbe(void)
 	if ((cmd == cmd_copy) || (cmd == cmd_setchecksum) || (cmd == cmd_brick))
 		skipread[part ^ 1] = 1; /* only read the user-specified part */
 
+	char *buf = malloc(nf << 1);
+	if (buf == NULL)
+		err(errno, "Can't malloc %ld B for '%s'", partsize, filename);
+
 	/* we pread per-part, so each part has its own pointer: */
 	gbe[0] = (size_t) buf;
-	gbe[1] = gbe[0] + partsize;
+	gbe[1] = gbe[0] + nf;
 
 	for (int p = 0; p < 2; p++) {
 		if (skipread[p])

From 98e105ac4f186428bc9df238507c64b5f51ff12a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 26 Jan 2025 07:25:26 +0000
Subject: [PATCH 1063/1549] util/nvmutil: allocate less memory for setchecksum

also cmd_brick

where the checksum is being corrected or bricked, we
only need to handle the 128-byte nvm area on one of
the parts

similarly, we only need to allocate half the gbe file
size when doing a copy command.

256 bytes still allocated for setmac (see previous
commit), because we verify both checksums and set both
parts if possible.

with this, nvmutil is now much more memory-efficient.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 20 +++++++++++++-------
 1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 9b672ae0..f5f80875 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -33,7 +33,7 @@ uint8_t hextonum(char chs), rhex(void);
 
 uint16_t mac[3] = {0, 0, 0};
 size_t partsize, nf, gbe[2];
-uint8_t nvmPartChanged[2] = {0, 0}, skipread[2] = {0, 0};
+uint8_t nvmPartChanged[2] = {0, 0}, do_read[2] = {1, 1};
 int e = 1, flags, rfd, fd, part, gbeFileChanged = 0;
 
 const char *strMac = NULL, *strRMac = "??:??:??:??:??:??", *filename = NULL;
@@ -204,18 +204,22 @@ readGbe(void)
 		nf = 128; /* only read/write the nvm part of the block */
 
 	if ((cmd == cmd_copy) || (cmd == cmd_setchecksum) || (cmd == cmd_brick))
-		skipread[part ^ 1] = 1; /* only read the user-specified part */
+		do_read[part ^ 1] = 0; /* only read the user-specified part */
 
-	char *buf = malloc(nf << 1);
+	/* AND do_read[*] to avoid wasteful malloc */
+	/* cmd_copy also relies on this */
+	char *buf = malloc(nf << (do_read[0] & do_read[1]));
 	if (buf == NULL)
 		err(errno, "Can't malloc %ld B for '%s'", partsize, filename);
 
 	/* we pread per-part, so each part has its own pointer: */
+	/* if a do_read is 0, both pointers are the same; this accomplishes
+	   the desired result for cmd_copy (see cmd_copy function) */
 	gbe[0] = (size_t) buf;
-	gbe[1] = gbe[0] + nf;
+	gbe[1] = gbe[0] + (nf * (do_read[0] & do_read[1]));
 
 	for (int p = 0; p < 2; p++) {
-		if (skipread[p])
+		if (!do_read[p])
 			continue; /* avoid unnecessary reads */
 
 		err_if(pread(fd, (uint8_t *) gbe[p], nf, p * partsize) == -1);
@@ -369,8 +373,10 @@ cmd_brick(void)
 void
 cmd_copy(void)
 {
-	if ((gbeFileChanged = nvmPartChanged[part ^ 1] = goodChecksum(part)))
-		gbe[part ^ 1] = gbe[part]; /* speedhack: copy ptr, not words */
+	gbeFileChanged = nvmPartChanged[part ^ 1] = goodChecksum(part);
+
+	/* no need to actually copy because gbe[] pointers are both the same */
+	/* we simply set the right nvm part as changed, and write the file */
 }
 
 /* verify nvm part checksum (return 1 if valid) */

From 6e134c9f4bfe0cb37e3f10fceb4d2cd61a1e156b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 26 Jan 2025 08:03:27 +0000
Subject: [PATCH 1064/1549] util/nvmutil: minor cleanup

SIZE_64KB no longer needed, and the malloc error
is needlessly verbose

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index f5f80875..5b541179 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -28,7 +28,6 @@ uint8_t hextonum(char chs), rhex(void);
 
 #define SIZE_8KB 0x2000
 #define SIZE_16KB 0x4000
-#define SIZE_64KB 0x10000
 #define SIZE_128KB 0x20000
 
 uint16_t mac[3] = {0, 0, 0};
@@ -210,7 +209,7 @@ readGbe(void)
 	/* cmd_copy also relies on this */
 	char *buf = malloc(nf << (do_read[0] & do_read[1]));
 	if (buf == NULL)
-		err(errno, "Can't malloc %ld B for '%s'", partsize, filename);
+		err(errno, NULL);
 
 	/* we pread per-part, so each part has its own pointer: */
 	/* if a do_read is 0, both pointers are the same; this accomplishes

From 948377b0e7ef939ff24dc7a0a8dc84440c848ec4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 26 Jan 2025 08:47:01 +0000
Subject: [PATCH 1065/1549] util/nvmutil: make cmd_swap its own function again

previous audits sizecoded nvmutil.c, reducing the sloccount,
but this resulted in unreadable code.

move the swap logic (swap parts) back to its own function,
for clarity.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 40 ++++++++++++++++++++++++++--------------
 1 file changed, 26 insertions(+), 14 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 5b541179..be02961c 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -17,7 +17,8 @@
 void cmd_setchecksum(void), cmd_brick(void), swap(int partnum), writeGbe(void),
     cmd_dump(void), cmd_setmac(void), readGbe(void), checkdir(const char *path),
     macf(int partnum), hexdump(int partnum), openFiles(const char *path),
-    cmd_copy(void), parseMacString(const char *strMac, uint16_t *mac);
+    cmd_copy(void), parseMacString(const char *strMac, uint16_t *mac),
+    cmd_swap(void);
 int goodChecksum(int partnum);
 uint8_t hextonum(char chs), rhex(void);
 
@@ -46,7 +47,7 @@ typedef struct op {
 op_t op[] = {
 { .str = "dump", .cmd = cmd_dump, .args = 3},
 { .str = "setmac", .cmd = cmd_setmac, .args = 3},
-{ .str = "swap", .cmd = writeGbe, .args = 3},
+{ .str = "swap", .cmd = cmd_swap, .args = 3},
 { .str = "copy", .cmd = cmd_copy, .args = 4},
 { .str = "brick", .cmd = cmd_brick, .args = 4},
 { .str = "setchecksum", .cmd = cmd_setchecksum, .args = 4},
@@ -148,8 +149,8 @@ main(int argc, char *argv[])
 	readGbe(); /* read gbe file into memory */
 	(*cmd)(); /* operate on gbe file in memory, as per user command */
 
-	if ((gbeFileChanged) && (flags != O_RDONLY) && (cmd != writeGbe))
-		writeGbe(); /* not called for swap cmd; swap calls writeGbe */
+	if ((gbeFileChanged) && (flags != O_RDONLY))
+		writeGbe();
 
 	err_if((errno != 0) && (cmd != cmd_dump)); /* don't err on dump */
 	return errno; /* errno can be set by the dump command */
@@ -197,7 +198,7 @@ openFiles(const char *path)
 void
 readGbe(void)
 {
-	if ((cmd == writeGbe) || (cmd == cmd_copy))
+	if ((cmd == cmd_swap) || (cmd == cmd_copy))
 		nf = partsize; /* read/write the entire block */
 	else
 		nf = 128; /* only read/write the nvm part of the block */
@@ -378,6 +379,20 @@ cmd_copy(void)
 	/* we simply set the right nvm part as changed, and write the file */
 }
 
+/* swap contents between the two parts */
+void
+cmd_swap(void) {
+	err_if(!(goodChecksum(0) || goodChecksum(1)));
+	errno = 0;
+
+	/* speedhack: swap pointers, not words. (xor swap) */
+	gbe[0] ^= gbe[1];
+	gbe[1] ^= gbe[0];
+	gbe[0] ^= gbe[1];
+
+	gbeFileChanged = nvmPartChanged[0] = nvmPartChanged[1] = 1;
+}
+
 /* verify nvm part checksum (return 1 if valid) */
 int
 goodChecksum(int partnum)
@@ -398,16 +413,13 @@ goodChecksum(int partnum)
 void
 writeGbe(void)
 {
-	if (cmd == writeGbe) /* cmd swap calls writeGbE; need valid checksum */
-		err_if(!(goodChecksum(0) || goodChecksum(1)));
-
-	for (int p = 0, x = (cmd == writeGbe) ? 1 : 0; p < 2; p++) {
-		if ((!nvmPartChanged[p]) && (cmd != writeGbe))
+	for (int p = 0; p < 2; p++) {
+		if ((!nvmPartChanged[p]))
 			continue;
 
-		swap(p ^ x); /* swap bytes on big-endian host CPUs */
+		swap(p); /* swap bytes on big-endian host CPUs */
 
-		err_if(pwrite(fd, (uint8_t *) gbe[p ^ x], nf, p * partsize)
+		err_if(pwrite(fd, (uint8_t *) gbe[p], nf, p * partsize)
 		    == -1);
 	}
 
@@ -417,8 +429,8 @@ writeGbe(void)
 
 /* swap byte order on big-endian CPUs. swap skipped on little endian */
 void
-swap(int partnum)
-{
+swap(int partnum) /* swaps bytes in words, not pointers. */
+{		/* not to be confused with cmd_swap */
 	size_t w, x;
 	uint8_t *n = (uint8_t *) gbe[partnum];
 

From 49506a883283ebb3716de812fd809fba67da602c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 26 Jan 2025 08:52:26 +0000
Subject: [PATCH 1066/1549] util/nvmutil: move write checks to writeGbe

doing it in main() is messy. better do it from the
actual function. now the logic in main is clearer.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index be02961c..8e1fef4f 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -147,10 +147,10 @@ main(int argc, char *argv[])
 	err_if((errno = (cmd == NULL) ? EINVAL : errno)); /* bad user arg */
 
 	readGbe(); /* read gbe file into memory */
-	(*cmd)(); /* operate on gbe file in memory, as per user command */
 
-	if ((gbeFileChanged) && (flags != O_RDONLY))
-		writeGbe();
+	(*cmd)(); /* operate on gbe file in memory */
+
+	writeGbe(); /* write changes back to file */
 
 	err_if((errno != 0) && (cmd != cmd_dump)); /* don't err on dump */
 	return errno; /* errno can be set by the dump command */
@@ -413,6 +413,9 @@ goodChecksum(int partnum)
 void
 writeGbe(void)
 {
+	if ((!gbeFileChanged) || (flags == O_RDONLY))
+		return;
+
 	for (int p = 0; p < 2; p++) {
 		if ((!nvmPartChanged[p]))
 			continue;

From 8850acc7da6a37859258c14b72dad267b3714c20 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 03:56:13 +0000
Subject: [PATCH 1067/1549] util/nvmutil swap(): Only handle the nvm area

The 128-byte nvm area is all that we need to handle,
since that is the only thing we actually work on in
nvmutil, based on checksum verification; the latter
implies that bytes must be in the correct order.

The swap() function previously worked on the entire
block, e.g. 4KB on 8KB files, 8KB on 16KB files and
64KB on 128KB files, and it did this twice, so it would
have operated on anywhere between 8KB to 128KB of data.

It now only operates on 256 bytes at a maximum, or 128
bytes if only handling one block. This is a significant
performance optimisation, on big endian host CPUs.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 8e1fef4f..8350504b 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -437,6 +437,6 @@ swap(int partnum) /* swaps bytes in words, not pointers. */
 	size_t w, x;
 	uint8_t *n = (uint8_t *) gbe[partnum];
 
-	for (w = nf * ((uint8_t *) &e)[0], x = 1; w < nf; w += 2, x += 2)
+	for (w = nf * ((uint8_t *) &e)[0], x = 1; w < 128; w += 2, x += 2)
 		n[w] ^= n[x], n[x] ^= n[w], n[w] ^= n[x];
 }

From 5ddf7f251d6eec465be7d659cb357576406b69ae Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 04:03:34 +0000
Subject: [PATCH 1068/1549] util/nvmutil: make 128 (nvm area) a define

for code clarity

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 8350504b..0ae964e2 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -26,6 +26,7 @@ uint8_t hextonum(char chs), rhex(void);
 #define MAC_ADDRESS argv[3]
 #define PARTN argv[3]
 #define NVM_CHECKSUM 0xBABA
+#define NVM_SIZE 128 /* Area containing NVM words */
 
 #define SIZE_8KB 0x2000
 #define SIZE_16KB 0x4000
@@ -201,7 +202,7 @@ readGbe(void)
 	if ((cmd == cmd_swap) || (cmd == cmd_copy))
 		nf = partsize; /* read/write the entire block */
 	else
-		nf = 128; /* only read/write the nvm part of the block */
+		nf = NVM_SIZE; /* only read/write the nvm part of the block */
 
 	if ((cmd == cmd_copy) || (cmd == cmd_setchecksum) || (cmd == cmd_brick))
 		do_read[part ^ 1] = 0; /* only read the user-specified part */
@@ -437,6 +438,6 @@ swap(int partnum) /* swaps bytes in words, not pointers. */
 	size_t w, x;
 	uint8_t *n = (uint8_t *) gbe[partnum];
 
-	for (w = nf * ((uint8_t *) &e)[0], x = 1; w < 128; w += 2, x += 2)
+	for (w = nf * ((uint8_t *) &e)[0], x = 1; w < NVM_SIZE; w += 2, x += 2)
 		n[w] ^= n[x], n[x] ^= n[w], n[w] ^= n[x];
 }

From fd1bbdc96cb218bc3d550202aba363e47b4dcbce Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 04:06:12 +0000
Subject: [PATCH 1069/1549] util/nvmutil: make 0x3f checksum position a define

for code clarity

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 0ae964e2..c2b563e0 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -25,7 +25,8 @@ uint8_t hextonum(char chs), rhex(void);
 #define COMMAND argv[2]
 #define MAC_ADDRESS argv[3]
 #define PARTN argv[3]
-#define NVM_CHECKSUM 0xBABA
+#define NVM_CHECKSUM 0xBABA /* checksum value */
+#define NVM_CHECKSUM_WORD 0x3F /* checksum word position */
 #define NVM_SIZE 128 /* Area containing NVM words */
 
 #define SIZE_8KB 0x2000
@@ -356,10 +357,11 @@ void
 cmd_setchecksum(void)
 {
 	uint16_t val16 = 0;
-	for (int c = 0; c < 0x3F; c++)
+	for (int c = 0; c < NVM_CHECKSUM_WORD; c++)
 		val16 += word(c, part);
 
-	setWord(0x3F, part, NVM_CHECKSUM - val16); /* correct the checksum */
+	/* correct the checksum */
+	setWord(NVM_CHECKSUM_WORD, part, NVM_CHECKSUM - val16);
 }
 
 /* intentionally set wrong checksum on part */
@@ -367,7 +369,8 @@ void
 cmd_brick(void)
 {
 	if (goodChecksum(part))
-		setWord(0x3F, part, ((word(0x3F, part)) ^ 0xFF));
+		setWord(NVM_CHECKSUM_WORD, part,
+		    ((word(NVM_CHECKSUM_WORD, part)) ^ 0xFF));
 }
 
 /* overwrite the contents of one part with the other */
@@ -399,7 +402,7 @@ int
 goodChecksum(int partnum)
 {
 	uint16_t total = 0;
-	for(int w = 0; w <= 0x3F; w++)
+	for(int w = 0; w <= NVM_CHECKSUM_WORD; w++)
 		total += word(w, partnum);
 
 	if (total == NVM_CHECKSUM)

From 063fef14d3457fb5324848183fb49d5d47391e54 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 04:09:09 +0000
Subject: [PATCH 1070/1549] util/nvmutil: make swap() a bit clearer

don't sizecode. show the individual steps clearly.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index c2b563e0..f8eb3844 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -441,6 +441,10 @@ swap(int partnum) /* swaps bytes in words, not pointers. */
 	size_t w, x;
 	uint8_t *n = (uint8_t *) gbe[partnum];
 
-	for (w = nf * ((uint8_t *) &e)[0], x = 1; w < NVM_SIZE; w += 2, x += 2)
-		n[w] ^= n[x], n[x] ^= n[w], n[w] ^= n[x];
+	for (w = nf * ((uint8_t *) &e)[0], x = 1; w < NVM_SIZE;
+	    w += 2, x += 2) {
+		n[w] ^= n[x];
+		n[x] ^= n[w];
+		n[w] ^= n[x];
+	}
 }

From b2d6393ed5fe110f446b22902b840336253f4faf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 04:09:48 +0000
Subject: [PATCH 1071/1549] util/nvmutil swap(): ensure that no overflow occurs

it wouldn't occur, on the current logic, but i wasn't
comfortable having the starting point (on little endian)
being higher than the checked endpoint, in case of
possible integer overflow as a result of future
modifications.

this is therefore a pre-emptive bug fix, because it doesn't
yet fix a bug, but it prevents a bug from being introduced.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index f8eb3844..729f2830 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -441,7 +441,7 @@ swap(int partnum) /* swaps bytes in words, not pointers. */
 	size_t w, x;
 	uint8_t *n = (uint8_t *) gbe[partnum];
 
-	for (w = nf * ((uint8_t *) &e)[0], x = 1; w < NVM_SIZE;
+	for (w = NVM_SIZE * ((uint8_t *) &e)[0], x = 1; w < NVM_SIZE;
 	    w += 2, x += 2) {
 		n[w] ^= n[x];
 		n[x] ^= n[w];

From d666f67ebe5648ac72de698ff61d6593a8ea83ea Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 04:47:49 +0000
Subject: [PATCH 1072/1549] util/nvmutil: Show bytes written in writeGbe

This will be useful for future debugging, and future
work on optimisations.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 729f2830..a7aee76f 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -420,16 +420,24 @@ writeGbe(void)
 	if ((!gbeFileChanged) || (flags == O_RDONLY))
 		return;
 
+	size_t tbw = 0; /* total bytes written */
+
 	for (int p = 0; p < 2; p++) {
 		if ((!nvmPartChanged[p]))
 			continue;
 
 		swap(p); /* swap bytes on big-endian host CPUs */
-
 		err_if(pwrite(fd, (uint8_t *) gbe[p], nf, p * partsize)
 		    == -1);
+
+		tbw += nf;
 	}
 
+	if ((!tbw) && (gbeFileChanged))
+		fprintf(stderr, "No changes needed on file '%s'\n", filename);
+	else if (tbw)
+		printf("%ld bytes written to file '%s'\n", tbw, filename);
+
 	errno = 0;
 	err_if(close(fd) == -1);
 }

From c72f699d368e88dcfc48316fae8b1f16393d3d9f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 04:55:05 +0000
Subject: [PATCH 1073/1549] util/nvmutil: err if fewer bytes written

it will probably never happen, and this is technically
not an error condition of pread/pwrite, but we need it
to read and write that exact number of bytes, as per nf

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index a7aee76f..15090a5a 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -34,7 +34,8 @@ uint8_t hextonum(char chs), rhex(void);
 #define SIZE_128KB 0x20000
 
 uint16_t mac[3] = {0, 0, 0};
-size_t partsize, nf, gbe[2];
+ssize_t nf;
+size_t partsize, gbe[2];
 uint8_t nvmPartChanged[2] = {0, 0}, do_read[2] = {1, 1};
 int e = 1, flags, rfd, fd, part, gbeFileChanged = 0;
 
@@ -420,15 +421,19 @@ writeGbe(void)
 	if ((!gbeFileChanged) || (flags == O_RDONLY))
 		return;
 
-	size_t tbw = 0; /* total bytes written */
+	ssize_t tbw = 0; /* total bytes written */
 
 	for (int p = 0; p < 2; p++) {
 		if ((!nvmPartChanged[p]))
 			continue;
 
 		swap(p); /* swap bytes on big-endian host CPUs */
-		err_if(pwrite(fd, (uint8_t *) gbe[p], nf, p * partsize)
-		    == -1);
+		ssize_t bw = pwrite(fd, (uint8_t *) gbe[p], nf, p * partsize);
+		err_if(bw == -1);
+		if (bw != nf)
+			err(errno == ECANCELED,
+			    "%ld bytes written on '%s', expected %ld bytes\n",
+			    bw, filename, nf);
 
 		tbw += nf;
 	}

From 906071083306722e43cd5d3c0bdf2fc2ad3b69c8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 04:57:32 +0000
Subject: [PATCH 1074/1549] util/nvmutil: err if bytes read lower than nf

same as the last change. just covering edge cases.

we will likely never trigger this error.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 15090a5a..13fce715 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -225,7 +225,13 @@ readGbe(void)
 		if (!do_read[p])
 			continue; /* avoid unnecessary reads */
 
-		err_if(pread(fd, (uint8_t *) gbe[p], nf, p * partsize) == -1);
+		ssize_t nr = pread(fd, (uint8_t *) gbe[p], nf, p * partsize);
+		err_if(nr == -1);
+		if (nr != nf)
+			err(errno == ECANCELED,
+			    "%ld bytes written on '%s', expected %ld bytes\n",
+			    nr, filename, nf);
+
 		swap(p); /* handle big-endian host CPU */
 	}
 }

From c91cc329cf8bdb8df55207908eb47cdcae3d3498 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 04:59:17 +0000
Subject: [PATCH 1075/1549] util/nvmutil: rename tbw/bw to tnw/nw

to match nr in the readGbe function

number of bytes written, and total number
of bytes written.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 13fce715..76ad14ce 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -427,27 +427,27 @@ writeGbe(void)
 	if ((!gbeFileChanged) || (flags == O_RDONLY))
 		return;
 
-	ssize_t tbw = 0; /* total bytes written */
+	ssize_t tnw = 0; /* total bytes written */
 
 	for (int p = 0; p < 2; p++) {
 		if ((!nvmPartChanged[p]))
 			continue;
 
 		swap(p); /* swap bytes on big-endian host CPUs */
-		ssize_t bw = pwrite(fd, (uint8_t *) gbe[p], nf, p * partsize);
-		err_if(bw == -1);
-		if (bw != nf)
+		ssize_t nw = pwrite(fd, (uint8_t *) gbe[p], nf, p * partsize);
+		err_if(nw == -1);
+		if (nw != nf)
 			err(errno == ECANCELED,
 			    "%ld bytes written on '%s', expected %ld bytes\n",
-			    bw, filename, nf);
+			    nw, filename, nf);
 
-		tbw += nf;
+		tnw += nf;
 	}
 
-	if ((!tbw) && (gbeFileChanged))
+	if ((!tnw) && (gbeFileChanged))
 		fprintf(stderr, "No changes needed on file '%s'\n", filename);
-	else if (tbw)
-		printf("%ld bytes written to file '%s'\n", tbw, filename);
+	else if (tnw)
+		printf("%ld bytes written to file '%s'\n", tnw, filename);
 
 	errno = 0;
 	err_if(close(fd) == -1);

From bcf53cc2cc0c73ec99886fa8c6e4d43dba7b894c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 05:02:54 +0000
Subject: [PATCH 1076/1549] util/nvmutil: show total number of bytes read

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 76ad14ce..f1004ae5 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -221,6 +221,8 @@ readGbe(void)
 	gbe[0] = (size_t) buf;
 	gbe[1] = gbe[0] + (nf * (do_read[0] & do_read[1]));
 
+	ssize_t tnr = 0; /* total bytes read */
+
 	for (int p = 0; p < 2; p++) {
 		if (!do_read[p])
 			continue; /* avoid unnecessary reads */
@@ -232,8 +234,12 @@ readGbe(void)
 			    "%ld bytes written on '%s', expected %ld bytes\n",
 			    nr, filename, nf);
 
+		tnr += nr;
+
 		swap(p); /* handle big-endian host CPU */
 	}
+
+	printf("%ld bytes read from file '%s'\n", tnr, filename);
 }
 
 /* set MAC address and checksum on nvm part */

From 3e86bf5ce25881dcc50149be62ccc778e640833e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 05:05:20 +0000
Subject: [PATCH 1077/1549] util/nvmutil: reset errno when writing a MAC

if checksum verification passed, then we should reset
in case we're operating on a given part and the last
one checked was bad.

a catch-all reset is already performed in writeGbe,
but it's good to do it here too.

in practise, if the 2nd part (part 1) is what failed,
errno still wouldn't be reset.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index f1004ae5..b7174133 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -251,6 +251,7 @@ cmd_setmac(void)
 	for (int partnum = 0; partnum < 2; partnum++) {
 		if (!goodChecksum(part = partnum))
 			continue;
+		errno = 0;
 
 		for (int w = 0; w < 3; w++) /* write MAC to gbe part */
 			setWord(w, partnum, mac[w]);

From 83601aa524b6772f4310f257408f62ace19a00d6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 05:07:27 +0000
Subject: [PATCH 1078/1549] util/nvmutil: reset errno if any MAC updated

instead of setting errno in the for loop, set a variable
declaring that the mac was updated, and reset errno based
on that.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index b7174133..f32350ba 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -246,18 +246,22 @@ readGbe(void)
 void
 cmd_setmac(void)
 {
+	int mac_updated = 0;
 	parseMacString(strMac, mac);
 
 	for (int partnum = 0; partnum < 2; partnum++) {
 		if (!goodChecksum(part = partnum))
 			continue;
-		errno = 0;
+		mac_updated = 1;
 
 		for (int w = 0; w < 3; w++) /* write MAC to gbe part */
 			setWord(w, partnum, mac[w]);
 
 		cmd_setchecksum(); /* MAC updated; need valid checksum */
 	}
+
+	if (mac_updated)
+		errno = 0; /* reset in case one of the checksums failed */
 }
 
 /* parse MAC string, write to char buffer */

From cf5a63e65ca0c08e88525567b8de50e875f996b5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 05:13:20 +0000
Subject: [PATCH 1079/1549] util/nvmutil: Remove useless gbeFileChanged var

We don't need it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index f32350ba..b88375a5 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -37,7 +37,7 @@ uint16_t mac[3] = {0, 0, 0};
 ssize_t nf;
 size_t partsize, gbe[2];
 uint8_t nvmPartChanged[2] = {0, 0}, do_read[2] = {1, 1};
-int e = 1, flags, rfd, fd, part, gbeFileChanged = 0;
+int e = 1, flags, rfd, fd, part;
 
 const char *strMac = NULL, *strRMac = "??:??:??:??:??:??", *filename = NULL;
 
@@ -67,8 +67,8 @@ void (*cmd)(void) = NULL;
 
 /* Macros for reading/writing the GbE file in memory */
 #define word(pos16, partnum) ((uint16_t *) gbe[partnum])[pos16]
-#define setWord(pos16, p, val16) if ((gbeFileChanged = 1) && \
-    word(pos16, p) != val16) nvmPartChanged[p] = 1 | (word(pos16, p) = val16)
+#define setWord(pos16, p, val16) if (word(pos16, p) != val16) \
+    nvmPartChanged[p] = 1 | (word(pos16, p) = val16)
 
 int
 main(int argc, char *argv[])
@@ -395,7 +395,7 @@ cmd_brick(void)
 void
 cmd_copy(void)
 {
-	gbeFileChanged = nvmPartChanged[part ^ 1] = goodChecksum(part);
+	nvmPartChanged[part ^ 1] = goodChecksum(part);
 
 	/* no need to actually copy because gbe[] pointers are both the same */
 	/* we simply set the right nvm part as changed, and write the file */
@@ -412,7 +412,7 @@ cmd_swap(void) {
 	gbe[1] ^= gbe[0];
 	gbe[0] ^= gbe[1];
 
-	gbeFileChanged = nvmPartChanged[0] = nvmPartChanged[1] = 1;
+	nvmPartChanged[0] = nvmPartChanged[1] = 1;
 }
 
 /* verify nvm part checksum (return 1 if valid) */
@@ -435,7 +435,7 @@ goodChecksum(int partnum)
 void
 writeGbe(void)
 {
-	if ((!gbeFileChanged) || (flags == O_RDONLY))
+	if ((flags == O_RDONLY))
 		return;
 
 	ssize_t tnw = 0; /* total bytes written */
@@ -455,7 +455,7 @@ writeGbe(void)
 		tnw += nf;
 	}
 
-	if ((!tnw) && (gbeFileChanged))
+	if ((!tnw) && !(nvmPartChanged[0] || nvmPartChanged[1]))
 		fprintf(stderr, "No changes needed on file '%s'\n", filename);
 	else if (tnw)
 		printf("%ld bytes written to file '%s'\n", tnw, filename);

From c70117c79c4818ccd7bc9dd43331119525bfddad Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 05:18:38 +0000
Subject: [PATCH 1080/1549] util/nvmutil: clean up readonly check on writeGbe

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index b88375a5..4eecebe6 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -435,13 +435,10 @@ goodChecksum(int partnum)
 void
 writeGbe(void)
 {
-	if ((flags == O_RDONLY))
-		return;
-
 	ssize_t tnw = 0; /* total bytes written */
 
 	for (int p = 0; p < 2; p++) {
-		if ((!nvmPartChanged[p]))
+		if ((!nvmPartChanged[p]) || (flags == O_RDONLY))
 			continue;
 
 		swap(p); /* swap bytes on big-endian host CPUs */
@@ -455,7 +452,7 @@ writeGbe(void)
 		tnw += nf;
 	}
 
-	if ((!tnw) && !(nvmPartChanged[0] || nvmPartChanged[1]))
+	if ((!tnw) && (flags != O_RDONLY))
 		fprintf(stderr, "No changes needed on file '%s'\n", filename);
 	else if (tnw)
 		printf("%ld bytes written to file '%s'\n", tnw, filename);

From bd7215d1eb74895103fb481d4b258419344e121b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 05:26:59 +0000
Subject: [PATCH 1081/1549] util/nvmutil: show nvm words written on writeGbe

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 4eecebe6..98003795 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -331,6 +331,10 @@ void
 cmd_dump(void)
 {
 	for (int partnum = 0, numInvalid = 0; partnum < 2; partnum++) {
+		if ((cmd != cmd_dump) && (flags != O_RDONLY) &&
+		    (!nvmPartChanged[partnum]))
+			continue;
+
 		if (!goodChecksum(partnum))
 			++numInvalid;
 		printf("MAC (part %d): ", partnum);
@@ -437,6 +441,13 @@ writeGbe(void)
 {
 	ssize_t tnw = 0; /* total bytes written */
 
+	if ((flags != O_RDONLY) && (cmd != cmd_dump)) {
+		if (nvmPartChanged[0] || nvmPartChanged[1])
+			printf("The following nvm words will be written:\n");
+		cmd_dump();
+		errno = 0; /* reset for cmd_brick */
+	}
+
 	for (int p = 0; p < 2; p++) {
 		if ((!nvmPartChanged[p]) || (flags == O_RDONLY))
 			continue;

From db5879c6b5a25290c08d38f7c9bf56c8461255c1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 05:29:14 +0000
Subject: [PATCH 1082/1549] util/nvmutil: minor cleanup in cmd_dump

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 98003795..2821e71a 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -337,8 +337,11 @@ cmd_dump(void)
 
 		if (!goodChecksum(partnum))
 			++numInvalid;
+
 		printf("MAC (part %d): ", partnum);
-		macf(partnum), hexdump(partnum);
+		macf(partnum);
+		hexdump(partnum);
+
 		if ((numInvalid < 2) && (partnum))
 			errno = 0;
 	}

From da0a6c216cf7de6442fdba8ce1b4801e0c19d9bb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 05:36:25 +0000
Subject: [PATCH 1083/1549] util/nvmutil: verbosely print the written MAC

This is for user friendliness. Otherwise, many users
might try to dump afterward if they specified a random
MAC address.

This saves the user from having to re-run with the dump
command, thus saving time for the user.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 2821e71a..70571bee 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -249,6 +249,8 @@ cmd_setmac(void)
 	int mac_updated = 0;
 	parseMacString(strMac, mac);
 
+	printf("MAC address to be written: %s\n", strMac);
+
 	for (int partnum = 0; partnum < 2; partnum++) {
 		if (!goodChecksum(part = partnum))
 			continue;
@@ -257,6 +259,9 @@ cmd_setmac(void)
 		for (int w = 0; w < 3; w++) /* write MAC to gbe part */
 			setWord(w, partnum, mac[w]);
 
+		printf("Wrote MAC address to part %d: ", partnum);
+		macf(partnum);
+
 		cmd_setchecksum(); /* MAC updated; need valid checksum */
 	}
 

From 6841a351ebc5ffe32182c3f7079ec41f8dfbdcd0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 05:50:34 +0000
Subject: [PATCH 1084/1549] util/nvmutil: print dump *after* modification

this way, we still get an error exit for example
when trying to invalidate an already invalid
checksum; this error exit was disabled by the
last revisions.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 70571bee..88ac24dc 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -449,13 +449,6 @@ writeGbe(void)
 {
 	ssize_t tnw = 0; /* total bytes written */
 
-	if ((flags != O_RDONLY) && (cmd != cmd_dump)) {
-		if (nvmPartChanged[0] || nvmPartChanged[1])
-			printf("The following nvm words will be written:\n");
-		cmd_dump();
-		errno = 0; /* reset for cmd_brick */
-	}
-
 	for (int p = 0; p < 2; p++) {
 		if ((!nvmPartChanged[p]) || (flags == O_RDONLY))
 			continue;
@@ -471,12 +464,20 @@ writeGbe(void)
 		tnw += nf;
 	}
 
+	if ((flags != O_RDONLY) && (cmd != cmd_dump)) {
+		if (nvmPartChanged[0] || nvmPartChanged[1])
+			printf("The following nvm words were written:\n");
+		cmd_dump();
+	}
+
 	if ((!tnw) && (flags != O_RDONLY))
 		fprintf(stderr, "No changes needed on file '%s'\n", filename);
 	else if (tnw)
 		printf("%ld bytes written to file '%s'\n", tnw, filename);
 
-	errno = 0;
+	if (tnw)
+		errno = 0;
+
 	err_if(close(fd) == -1);
 }
 

From a08748a9edac08d7f1d40234e04a97692a6e0b37 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 05:54:06 +0000
Subject: [PATCH 1085/1549] util/nvmutil: don't say write not needed if errno

otherwise, the output is confusing

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 88ac24dc..16841427 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -470,7 +470,7 @@ writeGbe(void)
 		cmd_dump();
 	}
 
-	if ((!tnw) && (flags != O_RDONLY))
+	if ((!tnw) && (flags != O_RDONLY) && (!errno))
 		fprintf(stderr, "No changes needed on file '%s'\n", filename);
 	else if (tnw)
 		printf("%ld bytes written to file '%s'\n", tnw, filename);

From 6ebdd3c72ba9c2af8fee953218785dee96e3dec6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 06:49:45 +0000
Subject: [PATCH 1086/1549] vendor.sh: Don't show gbe filename on inject

it's a temporary file, so printing it may confuse
the user. hide it from the output.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index bde245d9..d03434cb 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -747,7 +747,7 @@ modify_mac_addresses()
 	done < "tmp/rom.list"
 	printf "\nThe following GbE NVM words were written in '%s':\n" \
 	    "$archive"
-	x_ util/nvmutil/nvm tmp/gbe dump
+	x_ util/nvmutil/nvm tmp/gbe dump | grep -v "bytes read from file"
 
 	[ "$new_mac" = "restore" ] && \
 	    printf "\nNOTE: User specified setmac 'restore' argument.\n" && \

From d94b274fd9f4e7a4ef71e25832ab7baedf10bd50 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 06:57:30 +0000
Subject: [PATCH 1087/1549] vendor.sh: don't error if grep -v fails

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index d03434cb..fb7d7cdf 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -747,7 +747,7 @@ modify_mac_addresses()
 	done < "tmp/rom.list"
 	printf "\nThe following GbE NVM words were written in '%s':\n" \
 	    "$archive"
-	x_ util/nvmutil/nvm tmp/gbe dump | grep -v "bytes read from file"
+	x_ util/nvmutil/nvm tmp/gbe dump | grep -v "bytes read from file" || :
 
 	[ "$new_mac" = "restore" ] && \
 	    printf "\nNOTE: User specified setmac 'restore' argument.\n" && \

From 3bb7520f6d921bb71fa8206387a52cef405a788c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 18:40:44 +0000
Subject: [PATCH 1088/1549] util/nvmutil: do setmac if only filename given

./nvm gbe.bin

with this patch, the above example does the same as:

./nvm gbe.bin setmac

now you can simply specify the gbe file, and it will
randomise the mac address within it, and update the
nvm checksum word.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 37 +++++++++++++++++++++++--------------
 1 file changed, 23 insertions(+), 14 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 16841427..6da8e64c 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -78,10 +78,12 @@ main(int argc, char *argv[])
 	err_if(pledge("stdio rpath wpath unveil", NULL) == -1);
 #endif
 
-	if (argc < 3) { /* TODO: manpage! */
+	if (argc < 2) { /* TODO: manpage! */
 		fprintf(stderr, "Modify Intel GbE NVM images e.g. set MAC\n");
 		fprintf(stderr, "USAGE:\n");
 		fprintf(stderr, " %s FILE dump\n", argv[0]);
+		fprintf(stderr, " %s FILE\n # does same as setmac without arg",
+		    argv[0]);
 		fprintf(stderr, " %s FILE setmac [MAC]\n", argv[0]);
 		fprintf(stderr, " %s FILE swap\n", argv[0]);
 		fprintf(stderr, " %s FILE copy 0|1\n", argv[0]);
@@ -92,14 +94,16 @@ main(int argc, char *argv[])
 
 	filename = argv[1];
 
-	if (strcmp(COMMAND, "dump") == 0) {
-		flags = O_RDONLY; /* write not needed for dump cmd */
+	flags = O_RDWR;
+
+	if (argc > 2) {
+		if (strcmp(COMMAND, "dump") == 0) {
+			flags = O_RDONLY; /* write not needed for dump cmd */
 #ifdef __OpenBSD__
-		/* writes not needed for the dump command */
-		err_if(pledge("stdio rpath unveil", NULL) == -1);
+			/* writes not needed for the dump command */
+			err_if(pledge("stdio rpath unveil", NULL) == -1);
 #endif
-	} else {
-		flags = O_RDWR;
+		}
 	}
 
 	/* check for dir first, to prevent unveil from
@@ -129,14 +133,19 @@ main(int argc, char *argv[])
 	err_if(pledge("stdio", NULL) == -1);
 #endif
 
-	for (int i = 0; (i < 6) && (cmd == NULL); i++) {
-		if (strcmp(COMMAND, op[i].str) != 0)
-			continue;
-		if (argc >= op[i].args) {
-			cmd = op[i].cmd;
-			break;
+	if (argc > 2) {
+		for (int i = 0; (i < 6) && (cmd == NULL); i++) {
+			if (strcmp(COMMAND, op[i].str) != 0)
+				continue;
+			if (argc >= op[i].args) {
+				cmd = op[i].cmd;
+				break;
+			}
+			err(errno = EINVAL, "Too few args on command '%s'",
+			    op[i].str);
 		}
-		err(errno = EINVAL, "Too few args on command '%s'", op[i].str);
+	} else {
+		cmd = cmd_setmac;
 	}
 
 	if (cmd == cmd_setmac) {

From 6821659bcb205c0c1fc796fd7a9543f42b7bacc7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 27 Jan 2025 18:46:36 +0000
Subject: [PATCH 1089/1549] util/nvmutil: fix minor mistake (line break)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 6da8e64c..dacfeaaf 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -82,7 +82,7 @@ main(int argc, char *argv[])
 		fprintf(stderr, "Modify Intel GbE NVM images e.g. set MAC\n");
 		fprintf(stderr, "USAGE:\n");
 		fprintf(stderr, " %s FILE dump\n", argv[0]);
-		fprintf(stderr, " %s FILE\n # does same as setmac without arg",
+		fprintf(stderr, " %s FILE\n # same as setmac without arg\n",
 		    argv[0]);
 		fprintf(stderr, " %s FILE setmac [MAC]\n", argv[0]);
 		fprintf(stderr, " %s FILE swap\n", argv[0]);

From b1d8975959dc942bb8691253f3599e4ac99932eb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 29 Jan 2025 03:41:55 +0000
Subject: [PATCH 1090/1549] util/nvmutil: Only read up to 4KB on larger gbe

On the 16KB and 128KB files, we still only need to
operate on 4KB at the start of each block, where the
block size is larger than 4KB.

The reason we deal with the entire 4KB block is because
the nvm words (in the 128 byte section) can define an
extended nvm area anywhere after 128 bytes, within the
128 byte block.

We could systematically read where that is being handled,
and handle it; we could then allocate less memory, and
read/write fewer bytes, but many block devices like SSDs
and flash drives have at least a 4KB erase block anyway,
so it's kinda pointless. saving memory would be nice, but
I don't really want to bloat the code.

This is a nice easy optimisation, to avoid wasting an
additional 8KB of memory when handling 16KB files, and
additional 120KB if handling 128KB files, since nf is
what determines how much memory will be allocated.

the alternative would be to use an mmap, and then we
could reasonably handle the idea above for only writing,
surgically, what we need: nvm words and extended nvm
words.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/ifd/xx30/gbe    | Bin 8192 -> 8192 bytes
 util/nvmutil/nvmutil.c |   4 +++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/config/ifd/xx30/gbe b/config/ifd/xx30/gbe
index 0c9dfa1df053c351547cf46596df7cab4c9e8500..a4758cba88b8d7fcfa9f68b9964b6f891a0de2f5 100644
GIT binary patch
delta 44
hcmZp0XmDWLB^YGo5;~Esf+?n8Vx#EBsoDJ4!~jY04)p*4

delta 44
icmZp0XmDU-xVQGe|92DFDwr5rCN_$0oSMy#O$-3BZ4&hW

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index dacfeaaf..5ee990f2 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -29,6 +29,7 @@ uint8_t hextonum(char chs), rhex(void);
 #define NVM_CHECKSUM_WORD 0x3F /* checksum word position */
 #define NVM_SIZE 128 /* Area containing NVM words */
 
+#define SIZE_4KB 0x1000
 #define SIZE_8KB 0x2000
 #define SIZE_16KB 0x4000
 #define SIZE_128KB 0x20000
@@ -211,7 +212,8 @@ void
 readGbe(void)
 {
 	if ((cmd == cmd_swap) || (cmd == cmd_copy))
-		nf = partsize; /* read/write the entire block */
+		nf = SIZE_4KB; /* read/write the entire block */
+			/* only need to do 4KB even on larger gbe files */
 	else
 		nf = NVM_SIZE; /* only read/write the nvm part of the block */
 

From 96356ce94f66ee55a35d40e2098ebb9bfba173c7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 29 Jan 2025 03:47:20 +0000
Subject: [PATCH 1091/1549] util/nvmutil: move "e" to swap()

we only use it there, so we should only define it
there. it's used to detect host CPU endianness.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 5ee990f2..0576167f 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -38,7 +38,7 @@ uint16_t mac[3] = {0, 0, 0};
 ssize_t nf;
 size_t partsize, gbe[2];
 uint8_t nvmPartChanged[2] = {0, 0}, do_read[2] = {1, 1};
-int e = 1, flags, rfd, fd, part;
+int flags, rfd, fd, part;
 
 const char *strMac = NULL, *strRMac = "??:??:??:??:??:??", *filename = NULL;
 
@@ -498,6 +498,7 @@ swap(int partnum) /* swaps bytes in words, not pointers. */
 {		/* not to be confused with cmd_swap */
 	size_t w, x;
 	uint8_t *n = (uint8_t *) gbe[partnum];
+	int e = 1;
 
 	for (w = NVM_SIZE * ((uint8_t *) &e)[0], x = 1; w < NVM_SIZE;
 	    w += 2, x += 2) {

From a65a0c2f963491798d82d5012bcf09e40538a34c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 29 Jan 2025 04:07:54 +0000
Subject: [PATCH 1092/1549] util/nvmutil: allow ./nvm gbe MAC

previously, if the user ran:

./nvm GBE [MAC address]

it would error, treating the MAC as a command

now if only 3 arguments are provided, and the
3rd argument ins't a valid command, it's treated
as a MAC address and validated accordingly.

this should make nvmutil easier to use, because
I imagine a lot of users forget to use setmac

there's no reason we should be so pedantic. we
should allow it to be used flexibly like this

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 0576167f..b8319a0d 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -149,7 +149,10 @@ main(int argc, char *argv[])
 		cmd = cmd_setmac;
 	}
 
-	if (cmd == cmd_setmac) {
+	if ((cmd == NULL) && (argc > 2)) { /* nvm gbe [MAC] */
+		strMac = COMMAND;
+		cmd = cmd_setmac;
+	} else if (cmd == cmd_setmac) { /* nvm gbe setmac [MAC] */
 		strMac = strRMac; /* random MAC */
 		if (argc > 3) /* user-supplied MAC (can be random) */
 			strMac = MAC_ADDRESS;

From 8a435355135daf19040fcc6b02e6570d918958fd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 29 Jan 2025 04:10:52 +0000
Subject: [PATCH 1093/1549] util/nvmutil: Fix bad comparison

We're checking if errno is ENOTDIR, not setting it;
the previous code would always return true, and then
set errno 0, which in the context of this code was
actually OK, so this patch makes no functional difference
in practise.

However, I'm a stickler for technical correctness. I caught
this when trying to compile with clang, because clang is
quite pedantic about checking for exactly this type of bug.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index b8319a0d..b016e419 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -182,7 +182,7 @@ checkdir(const char *path)
 {
 	if (opendir(path) != NULL)
 		err(errno = EISDIR, "%s", path);
-	if (errno = ENOTDIR)
+	if (errno == ENOTDIR)
 		errno = 0;
 	err_if(errno);
 }

From 6b9cf09ca21987363ad11b8396aa4a9ba19a6ee3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 29 Jan 2025 04:17:07 +0000
Subject: [PATCH 1094/1549] restore old x230 gbe file

i accidentally committed one where i'd changed
the mac address, on a previous revision to nvmutil

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/ifd/xx30/gbe | Bin 8192 -> 8192 bytes
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/config/ifd/xx30/gbe b/config/ifd/xx30/gbe
index a4758cba88b8d7fcfa9f68b9964b6f891a0de2f5..0c9dfa1df053c351547cf46596df7cab4c9e8500 100644
GIT binary patch
delta 44
icmZp0XmDU-xVQGe|92DFDwr5rCN_$0oSMy#O$-3BZ4&hW

delta 44
hcmZp0XmDWLB^YGo5;~Esf+?n8Vx#EBsoDJ4!~jY04)p*4


From a98490573be7c0ac779cfc3e70220984ece486d5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 29 Jan 2025 04:45:57 +0000
Subject: [PATCH 1095/1549] util/nvmutil: only set mac_updated at the end

after setting the checksum too

this is functionally no different, but setting it
at the start didn't sit right with me.

it's more logically correct to set it at the end,
in case any error did not result in an exit.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index b016e419..a28a117e 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -268,7 +268,6 @@ cmd_setmac(void)
 	for (int partnum = 0; partnum < 2; partnum++) {
 		if (!goodChecksum(part = partnum))
 			continue;
-		mac_updated = 1;
 
 		for (int w = 0; w < 3; w++) /* write MAC to gbe part */
 			setWord(w, partnum, mac[w]);
@@ -277,6 +276,7 @@ cmd_setmac(void)
 		macf(partnum);
 
 		cmd_setchecksum(); /* MAC updated; need valid checksum */
+		mac_updated = 1;
 	}
 
 	if (mac_updated)

From fa9a0df2458e9ce0b7e4896885bdef54549d7595 Mon Sep 17 00:00:00 2001
From: Runxi Yu <me@runxiyu.org>
Date: Fri, 31 Jan 2025 16:36:53 +0800
Subject: [PATCH 1096/1549] deps/arch: genisoimage belongs to cdrtools

genisoimage is not a an AUR package as suggested by aur_notice. It is
available in the "cdrtools" package in the repositories.

References: https://archlinux.org/packages/extra/x86_64/cdrtools/
Signed-off-by: Runxi Yu <me@runxiyu.org>
---
 config/dependencies/arch | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/dependencies/arch b/config/dependencies/arch
index feb38d49..2b1b7157 100644
--- a/config/dependencies/arch
+++ b/config/dependencies/arch
@@ -3,7 +3,7 @@
 pkg_add="pacman -S --needed"
 pkglist=" \
 acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
-autogen base-devel bison cmake curl device-mapper doxygen \
+autogen base-devel bison cdrtools cmake curl device-mapper doxygen \
 dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \
 help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \
 ncurses openssl p7zip ccache less libx86 \
@@ -11,4 +11,4 @@ pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
 sharutils subversion swig texinfo ttf-dejavu unarchiver unzip wget xz zlib mtools \
 "
 
-aur_notice="bdf-unifont unifont cross-mipsel-linux-gnu-binutils cross-mipsel-linux-gnu-gcc genisoimage"
+aur_notice="bdf-unifont unifont cross-mipsel-linux-gnu-binutils cross-mipsel-linux-gnu-gcc"

From c17f4381ce5db4c13476fdadf140dc5bb9445d7c Mon Sep 17 00:00:00 2001
From: Runxi Yu <me@runxiyu.org>
Date: Fri, 31 Jan 2025 16:43:27 +0800
Subject: [PATCH 1097/1549] README.md: Mention SeaBIOS and U-Boot instead of
 Tianocore as payloads

SeaBIOS has been supported for a long time and seems to be the
"recommended" payload nowadays (though usually with GRUB too). I haven't
seen Tianocore / EDK II been mentioned in a while. U-Boot support was
added as of Libreboot 20241206-rev8.

Signed-off-by: Runxi Yu <me@runxiyu.org>
---
 README.md | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/README.md b/README.md
index f8de18aa..ee2019db 100644
--- a/README.md
+++ b/README.md
@@ -37,8 +37,9 @@ initialisation](https://doc.coreboot.org/getting_started/architecture.html).
 Coreboot is notoriously difficult to install for most non-technical users; it
 handles only basic initialization and jumps to a separate
 [payload](https://doc.coreboot.org/payloads.html) program (e.g.
+[SeaBIOS](https://www.seabios.org/SeaBIOS),
 [GRUB](https://www.gnu.org/software/grub/),
-[Tianocore](https://www.tianocore.org/)), which must also be configured.
+[U-Boot](https://docs.u-boot.org/en/latest/)), which must also be configured.
 *The libreboot software solves this problem*; it is a *coreboot distribution* with
 an automated build system (named *lbmk*) that builds complete *ROM images*, for
 more robust installation. Documentation is provided.

From e36aa8c5a5c916c89ed22a2945de1a9a9a553a8c Mon Sep 17 00:00:00 2001
From: Runxi Yu <me@runxiyu.org>
Date: Sat, 1 Feb 2025 00:04:28 +0800
Subject: [PATCH 1098/1549] README.md: Vastly simplify it

---
 README.md | 145 +++++++++++++++---------------------------------------
 1 file changed, 39 insertions(+), 106 deletions(-)

diff --git a/README.md b/README.md
index ee2019db..887c37a6 100644
--- a/README.md
+++ b/README.md
@@ -1,124 +1,57 @@
 Libreboot
 =========
 
-Find libreboot documentation at <https://libreboot.org/>
+* Documentation: [libreboot.org](https://libreboot.org)
+* Support: [\#libreboot](https://web.libera.chat/#libreboot) on
+  [Libera](https://libera.chat/) IRC
 
-The `libreboot` project provides
-[libre](https://libreboot.org/freedom-status.html) *boot
-firmware* that initializes the hardware (e.g. memory controller, CPU,
-peripherals) on specific Intel/AMD x86 and ARM targets, which
-then starts a bootloader for your operating system. Linux/BSD are
-well-supported. It replaces proprietary BIOS/UEFI firmware. Help is available
-via [\#libreboot IRC](https://web.libera.chat/#libreboot)
-on [Libera](https://libera.chat/) IRC.
+Libreboot provides 
+[libre](https://libreboot.org/freedom-status.html)
+boot firmware on
+[supported motherboards](https://libreboot.org/docs/install/#which-systems-are-supported-by-libreboot). It replaces proprietary vendor BIOS/UEFI implementations, by
+* Using coreboot to initialize the hardware (e.g. memory controller, CPU, etc.) while
+  minimizing unwanted functionality (e.g. backdoors such as the Intel Management Engine)
+* ... which runs a payload such as SeaBIOS, GRUB, or U-Boot
+* ... which loads your operating system's boot loader (BSD and Linux-based
+  [systems](systems) are supported).
 
-Why use Libreboot?
-==================
+Why use Libreboot, and what is coreboot?
+----------------------------------------
 
-Why should you use *libreboot*?
-----------------------------
+A lot of users who use libre operating systems still use proprietary boot
+firmware, which often contain backdoors and bugs, hampering
+[user freedom](https://writefreesoftware.org) and
+[right to repair](https://vid.puffyan.us/watch?v=Npd_xDuNi9k).
 
-Libreboot gives you freedoms that you otherwise can't get with most other
-boot firmware. It's extremely powerful and configurable for many use cases.
+[coreboot](https://coreboot.org) provides libre boot firmware by initializing
+the hardware then running a payload. However, coreboot is notoriously difficult
+to configure and install for most non-technical users, requiring detailed
+technical knowledge of hardware.
 
-You have rights. The right to privacy, freedom of thought, freedom of speech
-and the right to read. In this context, Libreboot gives you these rights.
-Your freedom matters.
-[Right to repair](https://vid.puffyan.us/watch?v=Npd_xDuNi9k) matters.
-Many people use proprietary (non-libre)
-boot firmware, even if they use [a libre OS](https://www.openbsd.org/).
-Proprietary firmware often contains backdoors (more info on the FAQ), and it
-and can be buggy. The libreboot project was founded in December 2013,
-with the express purpose of making coreboot firmware accessible for
-non-technical users.
+Libreboot solves this by being **a coreboot distribution** (in the same way
+that Alpine Linux is a Linux distribution). It provides a fully automated build
+system that downloads and compiles pre-configured ROM images for supported
+motherboards, so end-users could easily fetch images to flash onto their
+devices.
 
-The `libreboot` project uses [coreboot](https://www.coreboot.org/) for [hardware
-initialisation](https://doc.coreboot.org/getting_started/architecture.html).
-Coreboot is notoriously difficult to install for most non-technical users; it
-handles only basic initialization and jumps to a separate
-[payload](https://doc.coreboot.org/payloads.html) program (e.g.
-[SeaBIOS](https://www.seabios.org/SeaBIOS),
-[GRUB](https://www.gnu.org/software/grub/),
-[U-Boot](https://docs.u-boot.org/en/latest/)), which must also be configured.
-*The libreboot software solves this problem*; it is a *coreboot distribution* with
-an automated build system (named *lbmk*) that builds complete *ROM images*, for
-more robust installation. Documentation is provided.
+Libreboot also produces documentation aimed at non-technical users and
+excellent user support via IRC.
 
-How does Libreboot differ from coreboot?
-========================================
-
-In the same way that *Debian* is a Linux distribution, `libreboot` is
-a *coreboot distribution*. If you want to build a ROM image from scratch, you
-otherwise have to perform expert-level configuration of coreboot, GRUB and
-whatever other software you need, to prepare the ROM image. With *libreboot*,
-you can literally download from Git or a source archive, and run `make`, and it
-will build entire ROM images. An automated build system, named `lbmk`
-(Libreboot MaKe), builds these ROM images automatically, without any user input
-or intervention required. Configuration has already been performed in advance.
-
-If you were to build regular coreboot, without using libreboot's automated
-build system, it would require a lot more intervention and decent technical
-knowledge to produce a working configuration.
-
-Regular binary releases of `libreboot` provide these
-ROM images pre-compiled, and you can simply install them, with no special
-knowledge or skill except the ability to follow installation instructions
-and run commands BSD/Linux.
-
-Project goals
-=============
-
--   *Support as much hardware as possible!* Libreboot aims to eventually
-    have *maintainers* for every board supported by coreboot, at every
-    point in time.
--   *Make coreboot easy to use*. Coreboot is notoriously difficult
-    to install, due to an overall lack of user-focused documentation
-    and support. Most people will simply give up before attempting to
-    install coreboot. Libreboot's automated build system and user-friendly
-    installation instructions solves this problem.
-
-Libreboot attempts to bridge this divide by providing a build system
-automating much of the coreboot image creation and customization.
-Secondly, the project produces documentation aimed at non-technical users.
-Thirdly, the project attempts to provide excellent user support via IRC.
-
-Libreboot already comes with a payload (GRUB), flashprog and other
-needed parts. Everything is fully integrated, in a way where most of
-the complicated steps that are otherwise required, are instead done
-for the user in advance.
-
-You can download ROM images for your libreboot system and install
-them without having to build anything from source. If, however, you are
-interested in building your own image, the build system makes it relatively
-easy to do so.
-
-Not a coreboot fork!
---------------------
-
-Libreboot is *not a fork of coreboot*. Every so often, the project
-re-bases on the latest version of coreboot, with the number of custom
-patches in use minimized. Tested, *stable* (static) releases are then provided
-in Libreboot, based on specific coreboot revisions.
-
-How to help
-===========
+Contribute
+----------
 
 You can check bugs listed on
 the [bug tracker](https://codeberg.org/libreboot/lbmk/issues).
 
-If you spot a bug and have a fix, the website has instructions for how to send
-patches, and you can also report it. Also, this entire website is
-written in Markdown and hosted in a [separate
-repository](https://codeberg.org/libreboot/lbwww) where you can send patches.
+You may use Codeberg pull requests to send patches with bug fixes or other
+improvements. This repository hosts the code for the main build system.
+The website lives in [a separate repository](https://codeberg.org/libreboot/lbwww).
 
-Any and all development discussion and user support are all done on the IRC
-channel. More information is on <https://libreboot.org/contact.html>.
+Development is also done on the IRC channel.
 
-LICENSE FOR THIS README
-=======================
+License for this README
+-----------------------
 
-It's just a README file. This README file is released under the terms of the
-Creative Commons Zero license, version 1.0 of the license, which you can
-read here:
+It's just a README file. It is released under
+[Creative Commons Zero, version 1.0](https://creativecommons.org/publicdomain/zero/1.0/legalcode.txt).
 
-<https://creativecommons.org/publicdomain/zero/1.0/legalcode.txt>

From 266122592cdef3c1f4b6a9cf6dd3489d7509fff1 Mon Sep 17 00:00:00 2001
From: Runxi Yu <me@runxiyu.org>
Date: Sun, 2 Feb 2025 15:19:26 +0800
Subject: [PATCH 1099/1549] README.md: Use the EFF's page on Right to Repair

---
 README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.md b/README.md
index 887c37a6..a04dda7f 100644
--- a/README.md
+++ b/README.md
@@ -21,7 +21,7 @@ Why use Libreboot, and what is coreboot?
 A lot of users who use libre operating systems still use proprietary boot
 firmware, which often contain backdoors and bugs, hampering
 [user freedom](https://writefreesoftware.org) and
-[right to repair](https://vid.puffyan.us/watch?v=Npd_xDuNi9k).
+[right to repair](https://www.eff.org/issues/right-to-repair).
 
 [coreboot](https://coreboot.org) provides libre boot firmware by initializing
 the hardware then running a payload. However, coreboot is notoriously difficult

From 9ced146b47c1dd12ce68c6d9e65a3afc33394452 Mon Sep 17 00:00:00 2001
From: runxiyu <me@runxiyu.org>
Date: Sun, 2 Feb 2025 07:56:24 +0000
Subject: [PATCH 1100/1549] README.md: Use newlines instead of bulleted list
 for docs/support links

I think newlines look better here. The indent that bullet-pointed lists
have, does not seem natural at the start of the document.

Signed-off-by: runxiyu <me@runxiyu.org>
---
 README.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/README.md b/README.md
index a04dda7f..e6452dbd 100644
--- a/README.md
+++ b/README.md
@@ -1,8 +1,8 @@
 Libreboot
 =========
 
-* Documentation: [libreboot.org](https://libreboot.org)
-* Support: [\#libreboot](https://web.libera.chat/#libreboot) on
+Documentation: [libreboot.org](https://libreboot.org)\
+Support: [\#libreboot](https://web.libera.chat/#libreboot) on
   [Libera](https://libera.chat/) IRC
 
 Libreboot provides 

From e1e515bd22ad8452e73404d7dc9b291938ae7010 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 7 Feb 2025 12:31:46 +0000
Subject: [PATCH 1101/1549] util/nvmutil: hardened pledge on help output

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index a28a117e..499ae65e 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -80,6 +80,9 @@ main(int argc, char *argv[])
 #endif
 
 	if (argc < 2) { /* TODO: manpage! */
+#ifdef __OpenBSD__
+		err_if(pledge("stdio", NULL) == -1);
+#endif
 		fprintf(stderr, "Modify Intel GbE NVM images e.g. set MAC\n");
 		fprintf(stderr, "USAGE:\n");
 		fprintf(stderr, " %s FILE dump\n", argv[0]);

From d2cb954933b24be9eb95d832cf25df13361afafd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 10 Feb 2025 20:27:48 +0000
Subject: [PATCH 1102/1549] util/nvmutil: Fix bad error messages on R/W

The messages didn't really make sense.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 499ae65e..f51bafeb 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -248,7 +248,7 @@ readGbe(void)
 		err_if(nr == -1);
 		if (nr != nf)
 			err(errno == ECANCELED,
-			    "%ld bytes written on '%s', expected %ld bytes\n",
+			    "%ld bytes read from '%s', expected %ld bytes\n",
 			    nr, filename, nf);
 
 		tnr += nr;
@@ -475,7 +475,7 @@ writeGbe(void)
 		err_if(nw == -1);
 		if (nw != nf)
 			err(errno == ECANCELED,
-			    "%ld bytes written on '%s', expected %ld bytes\n",
+			    "%ld bytes written to '%s', expected %ld bytes\n",
 			    nw, filename, nf);
 
 		tnw += nf;

From a8359e30b27c2158ba703faac88436479032e0e5 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Wed, 12 Feb 2025 22:19:11 +0200
Subject: [PATCH 1103/1549] Update pico-serprog revision

Most importantly this should fix issues with rp2350 boards
not synchronizing properly.

Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
 config/git/pico-serprog/pkg.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/git/pico-serprog/pkg.cfg b/config/git/pico-serprog/pkg.cfg
index 64c26297..3d3e0f19 100644
--- a/config/git/pico-serprog/pkg.cfg
+++ b/config/git/pico-serprog/pkg.cfg
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-rev="e75e3a20e63269a5e3189bc2e49a6a81d45a636a"
+rev="3ea792664ed29ca1ff3e2e78d1d16099684781bd"
 url="https://codeberg.org/libreboot/pico-serprog"
 bkup_url="https://git.disroot.org/libreboot/pico-serprog"
 depend="pico-sdk picotool"

From e348ea0381aa1172ba5b28b0283f8b812fa34561 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 19 Feb 2025 21:07:26 +0000
Subject: [PATCH 1104/1549] Bump GRUB revision to add 73 security patches

You can find information about these patches here:
https://lists.gnu.org/archive/html/grub-devel/2025-02/msg00024.html

GRUB has been on a crusade as of late, to proactively audit
and fix many security vulnerabilities. This lbmk change brings
in a comprehensive series of patches that fix bugs ranging from
possible buffer overflows, use-after frees, null derefs and so on.

These changes are critical, so a revision release *will* be issued,
for the Libreboot 20241206 release series.

This change imports the following 73 patches which
are present on the upstream GRUB repository (commit IDs
matched to upstream):

* 4dc616657 loader/i386/bsd: Use safe math to avoid underflow
* 490a6ab71 loader/i386/linux: Cast left shift to grub_uint32_t
* a8d6b0633 kern/misc: Add sanity check after grub_strtoul() call
* 8e6e87e79 kern/partition: Add sanity check after grub_strtoul() call
* 5b36a5210 normal/menu: Use safe math to avoid an integer overflow
* 9907d9c27 bus/usb/ehci: Define GRUB_EHCI_TOGGLE as grub_uint32_t
* f8795cde2 misc: Ensure consistent overflow error messages
* 66733f7c7 osdep/unix/getroot: Fix potential underflow
* d13b6e8eb script/execute: Fix potential underflow and NULL dereference
* e3c578a56 fs/sfs: Check if allocated memory is NULL
* 1c06ec900 net: Check if returned pointer for allocated memory is NULL
* dee2c14fd net: Prevent overflows when allocating memory for arrays
* 4beeff8a3 net: Use safe math macros to prevent overflows
* dd6a4c8d1 fs/zfs: Add missing NULL check after grub_strdup() call
* 13065f69d fs/zfs: Check if returned pointer for allocated memory is NULL
* 7f38e32c7 fs/zfs: Prevent overflows when allocating memory for arrays
* 88e491a0f fs/zfs: Use safe math macros to prevent overflows
* cde9f7f33 fs: Prevent overflows when assigning returned values from read_number()
* 84bc0a9a6 fs: Prevent overflows when allocating memory for arrays
* 6608163b0 fs: Use safe math macros to prevent overflows
* fbaddcca5 disk/ieee1275/ofdisk: Call grub_ieee1275_close() when grub_malloc() fails
* 33bd6b5ac disk: Check if returned pointer for allocated memory is NULL
* d8151f983 disk: Prevent overflows when allocating memory for arrays
* c407724da disk: Use safe math macros to prevent overflows
* c4bc55da2 fs: Disable many filesystems under lockdown
* 26db66050 fs/bfs: Disable under lockdown
* 5f31164ae commands/hexdump: Disable memory reading in lockdown mode
* 340e4d058 commands/memrw: Disable memory reading in lockdown mode
* 34824806a commands/minicmd: Block the dump command in lockdown mode
* c68b7d236 commands/test: Stack overflow due to unlimited recursion depth
* dad8f5029 commands/read: Fix an integer overflow when supplying more than 2^31 characters
* b970a5ed9 gettext: Integer overflow leads to heap OOB write
* 09bd6eb58 gettext: Integer overflow leads to heap OOB write or read
* 7580addfc gettext: Remove variables hooks on module unload
* 9c1619773 normal: Remove variables hooks on module unload
* 2123c5bca commands/pgp: Unregister the "check_signatures" hooks on module unload
* 0bf56bce4 commands/ls: Fix NULL dereference
* 05be856a8 commands/extcmd: Missing check for failed allocation
* 98ad84328 kern/dl: Check for the SHF_INFO_LINK flag in grub_dl_relocate_symbols()
* d72208423 kern/dl: Use correct segment in grub_dl_set_mem_attrs()
* 500e5fdd8 kern/dl: Fix for an integer overflow in grub_dl_ref()
* 2c34af908 video/readers/jpeg: Do not permit duplicate SOF0 markers in JPEG
* 0707accab net/tftp: Fix stack buffer overflow in tftp_open()
* 5eef88152 net: Fix OOB write in grub_net_search_config_file()
* aa8b4d7fa net: Remove variables hooks when interface is unregisted
* a1dd8e59d net: Unregister net_default_ip and net_default_mac variables hooks on unload
* d8a937cca script/execute: Limit the recursion depth
* 8a7103fdd kern/partition: Limit recursion in part_iterate()
* 18212f064 kern/disk: Limit recursion depth
* 67f70f70a disk/loopback: Reference tracking for the loopback
* 13febd78d disk/cryptodisk: Require authentication after TPM unlock for CLI access
* 16f196874 kern/file: Implement filesystem reference counting
* a79106872 kern/file: Ensure file->data is set
* d1d6b7ea5 fs/xfs: Ensuring failing to mount sets a grub_errno
* 6ccc77b59 fs/xfs: Fix out-of-bounds read
* 067b6d225 fs/ntfs: Implement attribute verification
* 048777bc2 fs/ntfs: Use a helper function to access attributes
* 237a71184 fs/ntfs: Track the end of the MFT attribute buffer
* aff263187 fs/ntfs: Fix out-of-bounds read
* 7e2f750f0 fs/ext2: Fix out-of-bounds read for inline extents
* edd995a26 fs/jfs: Inconsistent signed/unsigned types usage in return values
* bd999310f fs/jfs: Use full 40 bits offset and address for a data extent
* ab09fd053 fs/jfs: Fix OOB read caused by invalid dir slot index
* 66175696f fs/jfs: Fix OOB read in jfs_getent()
* 1443833a9 fs/iso9660: Fix invalid free
* 965db5970 fs/iso9660: Set a grub_errno if mount fails
* f7c070a2e fs/hfsplus: Set a grub_errno if mount fails
* 563436258 fs/f2fs: Set a grub_errno if mount fails
* 0087bc690 fs/tar: Integer overflow leads to heap OOB write
* 2c8ac08c9 fs/tar: Initialize name in grub_cpio_find_file()
* 417547c10 fs/hfs: Fix stack OOB write with grub_strcpy()
* c1a291b01 fs/ufs: Fix a heap OOB write
* ea703528a misc: Implement grub_strlcpy()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...grub-s-missing-characters-for-borders-arrow.patch |  2 +-
 ...002-say-the-name-libreboot-in-the-grub-menu.patch |  4 ++--
 .../grub/default/patches/0003-Add-CC0-license.patch  |  6 +++---
 .../patches/0004-Define-GRUB_UINT32_MAX.patch        |  2 +-
 .../default/patches/0005-Add-Argon2-algorithm.patch  |  2 +-
 .../0006-Error-on-missing-Argon2id-parameters.patch  | 12 ++++++------
 .../patches/0007-Compile-with-Argon2id-support.patch | 10 +++++-----
 .../0008-Make-grub-install-work-with-Argon2.patch    |  2 +-
 ...eyboard-coreboot-force-scancodes2-translate.patch |  2 +-
 ...-keylayouts-don-t-print-Unknown-key-message.patch |  2 +-
 ...t-print-missing-prefix-errors-on-the-screen.patch |  6 +++---
 .../0012-don-t-print-error-if-module-not-found.patch |  6 +++---
 .../0013-don-t-print-empty-error-messages.patch      |  2 +-
 config/grub/default/target.cfg                       |  2 +-
 ...grub-s-missing-characters-for-borders-arrow.patch |  2 +-
 ...002-say-the-name-libreboot-in-the-grub-menu.patch |  4 ++--
 config/grub/nvme/patches/0003-Add-CC0-license.patch  |  6 +++---
 .../nvme/patches/0004-Define-GRUB_UINT32_MAX.patch   |  2 +-
 .../nvme/patches/0005-Add-Argon2-algorithm.patch     |  2 +-
 .../0006-Error-on-missing-Argon2id-parameters.patch  | 12 ++++++------
 .../patches/0007-Compile-with-Argon2id-support.patch | 10 +++++-----
 .../0008-Make-grub-install-work-with-Argon2.patch    |  2 +-
 ...eyboard-coreboot-force-scancodes2-translate.patch |  2 +-
 ...-keylayouts-don-t-print-Unknown-key-message.patch |  2 +-
 ...t-print-missing-prefix-errors-on-the-screen.patch |  6 +++---
 .../0012-don-t-print-error-if-module-not-found.patch |  6 +++---
 .../0013-don-t-print-empty-error-messages.patch      |  2 +-
 ...014-Add-native-NVMe-driver-based-on-SeaBIOS.patch | 11 +++++------
 config/grub/nvme/target.cfg                          |  2 +-
 ...grub-s-missing-characters-for-borders-arrow.patch |  2 +-
 ...002-say-the-name-libreboot-in-the-grub-menu.patch |  4 ++--
 config/grub/xhci/patches/0003-Add-CC0-license.patch  |  6 +++---
 .../xhci/patches/0004-Define-GRUB_UINT32_MAX.patch   |  2 +-
 .../xhci/patches/0005-Add-Argon2-algorithm.patch     |  2 +-
 .../0006-Error-on-missing-Argon2id-parameters.patch  | 12 ++++++------
 .../patches/0007-Compile-with-Argon2id-support.patch | 10 +++++-----
 .../0008-Make-grub-install-work-with-Argon2.patch    |  2 +-
 ...eyboard-coreboot-force-scancodes2-translate.patch |  2 +-
 ...-keylayouts-don-t-print-Unknown-key-message.patch |  2 +-
 ...t-print-missing-prefix-errors-on-the-screen.patch |  6 +++---
 .../0012-don-t-print-error-if-module-not-found.patch |  6 +++---
 .../0013-don-t-print-empty-error-messages.patch      |  2 +-
 ...-bus-usb-Parse-SuperSpeed-companion-descrip.patch |  2 +-
 .../xhci/patches/0015-usb-Add-enum-for-xHCI.patch    |  2 +-
 ...16-usbtrans-Set-default-maximum-packet-size.patch |  2 +-
 ...-bus-usb-Add-function-pointer-for-attach-de.patch |  4 ++--
 ...-bus-usb-usbhub-Add-new-private-fields-for-.patch |  2 +-
 .../0019-grub-core-bus-usb-Add-xhci-support.patch    |  2 +-
 ...-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch |  2 +-
 .../0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch   |  2 +-
 .../xhci/patches/0022-xhci-fix-port-indexing.patch   |  2 +-
 ...orkaround-z790-non-root-hub-speed-detection.patch |  2 +-
 .../0024-xhci-configure-TT-for-non-root-hubs.patch   |  2 +-
 .../patches/0025-Fix-compilation-on-x86_64.patch     |  2 +-
 ...026-Add-native-NVMe-driver-based-on-SeaBIOS.patch |  2 +-
 config/grub/xhci/target.cfg                          |  2 +-
 56 files changed, 109 insertions(+), 110 deletions(-)

diff --git a/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
index e5d24e7e..391beaf1 100644
--- a/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
+++ b/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -1,4 +1,4 @@
-From 26b89e90c8d6d89f2e52b00ad15ba58fd2e1fbfb Mon Sep 17 00:00:00 2001
+From 016f8655f5bed2b65c19e0e127b72ba3cfbcfb7d Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 31 Oct 2021 03:47:05 +0000
 Subject: [PATCH 01/13] mitigate grub's missing characters for borders/arrow
diff --git a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index d8c3b33f..149b719d 100644
--- a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -1,4 +1,4 @@
-From 10d264bdfde24fcf78da6f641898eb267f83066f Mon Sep 17 00:00:00 2001
+From d7f6f258ea14ec47d586eccbd0f5d96784e8bd15 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 19 Nov 2022 16:30:24 +0000
 Subject: [PATCH 02/13] say the name libreboot, in the grub menu
@@ -8,7 +8,7 @@ Subject: [PATCH 02/13] say the name libreboot, in the grub menu
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c
-index bd4431000..ff16e0f2e 100644
+index 04d058f55..b1cc8f236 100644
 --- a/grub-core/normal/main.c
 +++ b/grub-core/normal/main.c
 @@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term,
diff --git a/config/grub/default/patches/0003-Add-CC0-license.patch b/config/grub/default/patches/0003-Add-CC0-license.patch
index a5f75eb4..09c55867 100644
--- a/config/grub/default/patches/0003-Add-CC0-license.patch
+++ b/config/grub/default/patches/0003-Add-CC0-license.patch
@@ -1,4 +1,4 @@
-From 689c09a6b675ba52318cd879b289ac3d67073cd4 Mon Sep 17 00:00:00 2001
+From 85a88ecf10e1dd5cef7244aedaf7db76e845045f Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 03/13] Add CC0 license
@@ -10,10 +10,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  2 files changed, 4 insertions(+), 2 deletions(-)
 
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index 8ad015b07..9980bae90 100644
+index de8c3aa8d..4a3be8568 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -494,7 +494,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e)
+@@ -495,7 +495,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e)
  
    if (grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3") == 0
        || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3+") == 0
diff --git a/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch
index 9550110e..8277df92 100644
--- a/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch
+++ b/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch
@@ -1,4 +1,4 @@
-From 63dc3c9ca6e5635b5c7e7ba24c996b23e79a92e3 Mon Sep 17 00:00:00 2001
+From bb12d671182c455c894979a8a5890f5f4baa02dc Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 04/13] Define GRUB_UINT32_MAX
diff --git a/config/grub/default/patches/0005-Add-Argon2-algorithm.patch b/config/grub/default/patches/0005-Add-Argon2-algorithm.patch
index fef68ee3..452c0937 100644
--- a/config/grub/default/patches/0005-Add-Argon2-algorithm.patch
+++ b/config/grub/default/patches/0005-Add-Argon2-algorithm.patch
@@ -1,4 +1,4 @@
-From be6452a88ff3cbe033d37b739829e41798682510 Mon Sep 17 00:00:00 2001
+From 216e1351e5957e0589d488427a6dfee246705d0d Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 05/13] Add Argon2 algorithm
diff --git a/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch
index 8abe7669..33bc9417 100644
--- a/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch
+++ b/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch
@@ -1,4 +1,4 @@
-From 39f620fbe7c4a791062b59d4a8d26c35408aca45 Mon Sep 17 00:00:00 2001
+From a2687cc594714ff33a4c50d40222c113768ed826 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 06/13] Error on missing Argon2id parameters
@@ -9,10 +9,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  1 file changed, 8 insertions(+), 5 deletions(-)
 
 diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c
-index d5106402f..bc818ea69 100644
+index 8036d76ff..efae8ac65 100644
 --- a/grub-core/disk/luks2.c
 +++ b/grub-core/disk/luks2.c
-@@ -38,6 +38,7 @@ GRUB_MOD_LICENSE ("GPLv3+");
+@@ -39,6 +39,7 @@ GRUB_MOD_LICENSE ("GPLv3+");
  enum grub_luks2_kdf_type
  {
    LUKS2_KDF_TYPE_ARGON2I,
@@ -20,7 +20,7 @@ index d5106402f..bc818ea69 100644
    LUKS2_KDF_TYPE_PBKDF2
  };
  typedef enum grub_luks2_kdf_type grub_luks2_kdf_type_t;
-@@ -90,7 +91,7 @@ struct grub_luks2_keyslot
+@@ -91,7 +92,7 @@ struct grub_luks2_keyslot
  	grub_int64_t time;
  	grub_int64_t memory;
  	grub_int64_t cpus;
@@ -29,7 +29,7 @@ index d5106402f..bc818ea69 100644
        struct
        {
  	const char   *hash;
-@@ -160,10 +161,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot)
+@@ -161,10 +162,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot)
      return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing or invalid KDF");
    else if (!grub_strcmp (type, "argon2i") || !grub_strcmp (type, "argon2id"))
      {
@@ -45,7 +45,7 @@ index d5106402f..bc818ea69 100644
  	return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing Argon2i parameters");
      }
    else if (!grub_strcmp (type, "pbkdf2"))
-@@ -459,6 +461,7 @@ luks2_decrypt_key (grub_uint8_t *out_key,
+@@ -460,6 +462,7 @@ luks2_decrypt_key (grub_uint8_t *out_key,
    switch (k->kdf.type)
      {
        case LUKS2_KDF_TYPE_ARGON2I:
diff --git a/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch
index 19da5e51..7d22cc74 100644
--- a/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch
+++ b/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch
@@ -1,4 +1,4 @@
-From c192948ea0329d06cf4706667305b473b48c15f5 Mon Sep 17 00:00:00 2001
+From 2d1af8f5dfd1492ac95bcf7db4e6c789aa83018e Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 07/13] Compile with Argon2id support
@@ -48,18 +48,18 @@ index f5f9b040c..f1f38d8d3 100644
  
  module = {
 diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c
-index bc818ea69..5b9eaa599 100644
+index efae8ac65..2e742f5be 100644
 --- a/grub-core/disk/luks2.c
 +++ b/grub-core/disk/luks2.c
-@@ -27,6 +27,7 @@
- #include <grub/partition.h>
+@@ -28,6 +28,7 @@
  #include <grub/i18n.h>
+ #include <grub/safemath.h>
  
 +#include <argon2.h>
  #include <base64.h>
  #include <json.h>
  
-@@ -462,8 +463,16 @@ luks2_decrypt_key (grub_uint8_t *out_key,
+@@ -463,8 +464,16 @@ luks2_decrypt_key (grub_uint8_t *out_key,
      {
        case LUKS2_KDF_TYPE_ARGON2I:
        case LUKS2_KDF_TYPE_ARGON2ID:
diff --git a/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch
index cb954976..e73a7ccb 100644
--- a/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch
+++ b/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch
@@ -1,4 +1,4 @@
-From 2887e35e882a86e474052112a23608570b3f41b2 Mon Sep 17 00:00:00 2001
+From 67900e39bd45018b5611862b9438081c618b916f Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 08/13] Make grub-install work with Argon2
diff --git a/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
index 763fea91..d1973955 100644
--- a/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
+++ b/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -1,4 +1,4 @@
-From 548c5b227718783776b81d1e074b1982e76f2327 Mon Sep 17 00:00:00 2001
+From e8ae938700e715194e47d346c43aa4be23f1b4bf Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 30 Oct 2023 22:19:21 +0000
 Subject: [PATCH 09/13] at_keyboard coreboot: force scancodes2+translate
diff --git a/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
index a0eff28d..c9e41d8e 100644
--- a/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
+++ b/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
@@ -1,4 +1,4 @@
-From 89764949b2bcfaad122800f336aa205fea4a1fed Mon Sep 17 00:00:00 2001
+From dfd1639bb999e3dbbd346cc97f4bbaf32d129cd6 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 31 Oct 2023 10:33:28 +0000
 Subject: [PATCH 10/13] keylayouts: don't print "Unknown key" message
diff --git a/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
index d2ed0055..72c51f8b 100644
--- a/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
+++ b/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -1,4 +1,4 @@
-From c6de75a3369aebb51df1659d89a6d7024c84d85e Mon Sep 17 00:00:00 2001
+From 8421c59fa62ce954dcba05ad04591c651d6dcf43 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:14:58 +0000
 Subject: [PATCH 11/13] don't print missing prefix errors on the screen
@@ -85,10 +85,10 @@ index 18de52562..2a0fea6c8 100644
  	    }
  	  file = try_open_from_prefix (prefix, filename);
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index 9980bae90..4457cad7c 100644
+index 4a3be8568..6ae3d73f8 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -871,7 +871,7 @@ grub_dl_load (const char *name)
+@@ -881,7 +881,7 @@ grub_dl_load (const char *name)
      return 0;
  
    if (! grub_dl_dir) {
diff --git a/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch
index 85cde7a7..dab4318c 100644
--- a/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch
+++ b/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch
@@ -1,4 +1,4 @@
-From e8e419fe16843e7b7d8c614531df9447db689d28 Mon Sep 17 00:00:00 2001
+From c377f3c025101da17252a43449cc58fdd44c44af Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:36:22 +0000
 Subject: [PATCH 12/13] don't print error if module not found
@@ -17,10 +17,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index 4457cad7c..ea9fe8019 100644
+index 6ae3d73f8..4c15027fe 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -510,7 +510,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
+@@ -511,7 +511,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
  
    s = grub_dl_find_section (e, ".modname");
    if (!s)
diff --git a/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch
index 70ce3059..c351a74a 100644
--- a/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch
+++ b/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch
@@ -1,4 +1,4 @@
-From 6eb22aa4110b99245fd31dcaad979d5049d398d6 Mon Sep 17 00:00:00 2001
+From 664ce75106049547d7595fc021a0a1f9a69e585a Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 17:25:20 +0000
 Subject: [PATCH 13/13] don't print empty error messages
diff --git a/config/grub/default/target.cfg b/config/grub/default/target.cfg
index 300fdd7e..8264d306 100644
--- a/config/grub/default/target.cfg
+++ b/config/grub/default/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="default"
-rev="6811f6f09d61996a3acbc4fc0414e45964f0e2d9"
+rev="4dc6166571645780c459dde2cdc1b001a5ec844c"
diff --git a/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
index e7f71551..1421d21b 100644
--- a/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
+++ b/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -1,4 +1,4 @@
-From 985e87b15e60edb31d8b70f765b97cc8d436d10e Mon Sep 17 00:00:00 2001
+From 07cd05c1756cdb18cf5e55d72e4002e271e8af12 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 31 Oct 2021 03:47:05 +0000
 Subject: [PATCH 01/14] mitigate grub's missing characters for borders/arrow
diff --git a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 259301cc..fd77218a 100644
--- a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -1,4 +1,4 @@
-From f9ae737976ff52fc656459942dd0bdbd763e66df Mon Sep 17 00:00:00 2001
+From c1617d04ac24544d578643863c545bb885444030 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 19 Nov 2022 16:30:24 +0000
 Subject: [PATCH 02/14] say the name libreboot, in the grub menu
@@ -8,7 +8,7 @@ Subject: [PATCH 02/14] say the name libreboot, in the grub menu
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c
-index bd4431000..ff16e0f2e 100644
+index 04d058f55..b1cc8f236 100644
 --- a/grub-core/normal/main.c
 +++ b/grub-core/normal/main.c
 @@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term,
diff --git a/config/grub/nvme/patches/0003-Add-CC0-license.patch b/config/grub/nvme/patches/0003-Add-CC0-license.patch
index cfb8f56a..e4704e6e 100644
--- a/config/grub/nvme/patches/0003-Add-CC0-license.patch
+++ b/config/grub/nvme/patches/0003-Add-CC0-license.patch
@@ -1,4 +1,4 @@
-From 40c559b7f1e402520a9044b4d3e22b7afd1bb981 Mon Sep 17 00:00:00 2001
+From 4987b1725277f0e16895b7a67b8b2af9de3183ed Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 03/14] Add CC0 license
@@ -10,10 +10,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  2 files changed, 4 insertions(+), 2 deletions(-)
 
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index 8ad015b07..9980bae90 100644
+index de8c3aa8d..4a3be8568 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -494,7 +494,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e)
+@@ -495,7 +495,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e)
  
    if (grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3") == 0
        || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3+") == 0
diff --git a/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch
index bdd6d4de..ff11241f 100644
--- a/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch
+++ b/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch
@@ -1,4 +1,4 @@
-From 2d5493a02da107e7f3673b0ff5f0920ad557df78 Mon Sep 17 00:00:00 2001
+From 6e3672bcba5075908f2a3b2ec235168bf2a4b1ed Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 04/14] Define GRUB_UINT32_MAX
diff --git a/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch b/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch
index d816825e..1bdc0717 100644
--- a/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch
+++ b/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch
@@ -1,4 +1,4 @@
-From 520573cfa2b370a7d72102321bb0735a86e2999c Mon Sep 17 00:00:00 2001
+From ec94eb604358bd87236fc3cce9d14770c3595461 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 05/14] Add Argon2 algorithm
diff --git a/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch
index c94c7580..ffacb5fa 100644
--- a/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch
+++ b/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch
@@ -1,4 +1,4 @@
-From d3b500914ce84be6bcae0f4f5fefff21e4e0ca63 Mon Sep 17 00:00:00 2001
+From e02e392863dd30f40c538770c31268a8337433c5 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 06/14] Error on missing Argon2id parameters
@@ -9,10 +9,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  1 file changed, 8 insertions(+), 5 deletions(-)
 
 diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c
-index d5106402f..bc818ea69 100644
+index 8036d76ff..efae8ac65 100644
 --- a/grub-core/disk/luks2.c
 +++ b/grub-core/disk/luks2.c
-@@ -38,6 +38,7 @@ GRUB_MOD_LICENSE ("GPLv3+");
+@@ -39,6 +39,7 @@ GRUB_MOD_LICENSE ("GPLv3+");
  enum grub_luks2_kdf_type
  {
    LUKS2_KDF_TYPE_ARGON2I,
@@ -20,7 +20,7 @@ index d5106402f..bc818ea69 100644
    LUKS2_KDF_TYPE_PBKDF2
  };
  typedef enum grub_luks2_kdf_type grub_luks2_kdf_type_t;
-@@ -90,7 +91,7 @@ struct grub_luks2_keyslot
+@@ -91,7 +92,7 @@ struct grub_luks2_keyslot
  	grub_int64_t time;
  	grub_int64_t memory;
  	grub_int64_t cpus;
@@ -29,7 +29,7 @@ index d5106402f..bc818ea69 100644
        struct
        {
  	const char   *hash;
-@@ -160,10 +161,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot)
+@@ -161,10 +162,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot)
      return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing or invalid KDF");
    else if (!grub_strcmp (type, "argon2i") || !grub_strcmp (type, "argon2id"))
      {
@@ -45,7 +45,7 @@ index d5106402f..bc818ea69 100644
  	return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing Argon2i parameters");
      }
    else if (!grub_strcmp (type, "pbkdf2"))
-@@ -459,6 +461,7 @@ luks2_decrypt_key (grub_uint8_t *out_key,
+@@ -460,6 +462,7 @@ luks2_decrypt_key (grub_uint8_t *out_key,
    switch (k->kdf.type)
      {
        case LUKS2_KDF_TYPE_ARGON2I:
diff --git a/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch
index cd4b6e49..e34fd631 100644
--- a/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch
+++ b/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch
@@ -1,4 +1,4 @@
-From 5774fd23a381d7d96e65ede9dd300b7e83fa1f06 Mon Sep 17 00:00:00 2001
+From 67a96fa1d99ebf28dbdaefbce57e6f3cba2f6bf3 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 07/14] Compile with Argon2id support
@@ -48,18 +48,18 @@ index f5f9b040c..f1f38d8d3 100644
  
  module = {
 diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c
-index bc818ea69..5b9eaa599 100644
+index efae8ac65..2e742f5be 100644
 --- a/grub-core/disk/luks2.c
 +++ b/grub-core/disk/luks2.c
-@@ -27,6 +27,7 @@
- #include <grub/partition.h>
+@@ -28,6 +28,7 @@
  #include <grub/i18n.h>
+ #include <grub/safemath.h>
  
 +#include <argon2.h>
  #include <base64.h>
  #include <json.h>
  
-@@ -462,8 +463,16 @@ luks2_decrypt_key (grub_uint8_t *out_key,
+@@ -463,8 +464,16 @@ luks2_decrypt_key (grub_uint8_t *out_key,
      {
        case LUKS2_KDF_TYPE_ARGON2I:
        case LUKS2_KDF_TYPE_ARGON2ID:
diff --git a/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch
index 7e240cc8..c1726631 100644
--- a/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch
+++ b/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch
@@ -1,4 +1,4 @@
-From b8b9be1749d4802dde57f3547a1ee91c8fec1c3e Mon Sep 17 00:00:00 2001
+From de000f70873b61d62b0d561e0af5302e178c4e42 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 08/14] Make grub-install work with Argon2
diff --git a/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
index 0fea10a5..bc1fa260 100644
--- a/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
+++ b/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -1,4 +1,4 @@
-From 93790c5686ea2ac4da8d2c67377fe84fd37df953 Mon Sep 17 00:00:00 2001
+From 5b239742565ed20fce545aa32952a37bbb45beb8 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 30 Oct 2023 22:19:21 +0000
 Subject: [PATCH 09/14] at_keyboard coreboot: force scancodes2+translate
diff --git a/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
index 06c308d1..62c320ba 100644
--- a/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
+++ b/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
@@ -1,4 +1,4 @@
-From a18f0ddb9a396828bd11f540ed134047efe4b2bd Mon Sep 17 00:00:00 2001
+From f8c3f597daf62a13f1c1169fddd78c833dd05cf1 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 31 Oct 2023 10:33:28 +0000
 Subject: [PATCH 10/14] keylayouts: don't print "Unknown key" message
diff --git a/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
index f2b8de10..db720a76 100644
--- a/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
+++ b/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -1,4 +1,4 @@
-From 233c4f1a1182fd10ef60da98dd00b687c9edbee4 Mon Sep 17 00:00:00 2001
+From 27c79cf561fd5eef0c8eb5dda9f536cee3926b57 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:14:58 +0000
 Subject: [PATCH 11/14] don't print missing prefix errors on the screen
@@ -85,10 +85,10 @@ index 18de52562..2a0fea6c8 100644
  	    }
  	  file = try_open_from_prefix (prefix, filename);
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index 9980bae90..4457cad7c 100644
+index 4a3be8568..6ae3d73f8 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -871,7 +871,7 @@ grub_dl_load (const char *name)
+@@ -881,7 +881,7 @@ grub_dl_load (const char *name)
      return 0;
  
    if (! grub_dl_dir) {
diff --git a/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch
index 41b0c2a8..63e4b39c 100644
--- a/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch
+++ b/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch
@@ -1,4 +1,4 @@
-From c5ef7185f0e32a1a33aca181427cbee8f22af8d2 Mon Sep 17 00:00:00 2001
+From 752ac0c09c7ac3f1ecc5d3d4d8410d424b433da2 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:36:22 +0000
 Subject: [PATCH 12/14] don't print error if module not found
@@ -17,10 +17,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index 4457cad7c..ea9fe8019 100644
+index 6ae3d73f8..4c15027fe 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -510,7 +510,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
+@@ -511,7 +511,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
  
    s = grub_dl_find_section (e, ".modname");
    if (!s)
diff --git a/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch
index 0c9c7f80..bbc9410e 100644
--- a/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch
+++ b/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch
@@ -1,4 +1,4 @@
-From 8e8d7a4f391538e4c0d42226ac48f5a1325deeb5 Mon Sep 17 00:00:00 2001
+From ac7a47b0a80a0f398c1250384fd5bc8c228c5d09 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 17:25:20 +0000
 Subject: [PATCH 13/14] don't print empty error messages
diff --git a/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
index c6b7bb87..3d7db82c 100644
--- a/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
+++ b/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
@@ -1,4 +1,4 @@
-From 0e358c800b58f8122e8d333541eba08cf1b4dbef Mon Sep 17 00:00:00 2001
+From 421a826c41882baafb2c5710959810657f24a52e Mon Sep 17 00:00:00 2001
 From: Mate Kukri <km@mkukri.xyz>
 Date: Mon, 20 May 2024 11:43:35 +0100
 Subject: [PATCH 14/14] Add native NVMe driver based on SeaBIOS
@@ -31,20 +31,19 @@ index 43635d5ff..2c86dbbf6 100644
  
  endif
 diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index f1f38d8d3..d09f9ffbc 100644
+index f1f38d8d3..6f45989f8 100644
 --- a/grub-core/Makefile.core.def
 +++ b/grub-core/Makefile.core.def
-@@ -2676,4 +2676,10 @@ module = {
-   common = tests/asn1/asn1_test.c;
+@@ -2677,3 +2677,9 @@ module = {
    cflags = '-Wno-uninitialized';
    cppflags = '-I$(srcdir)/lib/libtasn1-grub -I$(srcdir)/tests/asn1/';
-+};
+ };
 +
 +module = {
 +  name = nvme;
 +  common = disk/nvme.c;
 +  enable = pci;
- };
++};
 diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c
 index 6806bff9c..fd68a513e 100644
 --- a/grub-core/commands/nativedisk.c
diff --git a/config/grub/nvme/target.cfg b/config/grub/nvme/target.cfg
index ea4018df..822d27b6 100644
--- a/config/grub/nvme/target.cfg
+++ b/config/grub/nvme/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="nvme"
-rev="6811f6f09d61996a3acbc4fc0414e45964f0e2d9"
+rev="4dc6166571645780c459dde2cdc1b001a5ec844c"
diff --git a/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
index a5ddd68f..d1ddc352 100644
--- a/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
+++ b/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -1,4 +1,4 @@
-From 98b66bcfe063a4035f851a542e57dc2c4bd51a57 Mon Sep 17 00:00:00 2001
+From 96e8baf58dcae1dbc016420ea1972d50f09f8f9b Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 31 Oct 2021 03:47:05 +0000
 Subject: [PATCH 01/26] mitigate grub's missing characters for borders/arrow
diff --git a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index f262b303..74970882 100644
--- a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -1,4 +1,4 @@
-From 71b146159e0aad33b267d062885ca0635aa23283 Mon Sep 17 00:00:00 2001
+From f23a77c22e61e466c081d2b81b968bac4812e6b6 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 19 Nov 2022 16:30:24 +0000
 Subject: [PATCH 02/26] say the name libreboot, in the grub menu
@@ -8,7 +8,7 @@ Subject: [PATCH 02/26] say the name libreboot, in the grub menu
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c
-index bd4431000..74cfc49c0 100644
+index 04d058f55..b1cc8f236 100644
 --- a/grub-core/normal/main.c
 +++ b/grub-core/normal/main.c
 @@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term,
diff --git a/config/grub/xhci/patches/0003-Add-CC0-license.patch b/config/grub/xhci/patches/0003-Add-CC0-license.patch
index e0a0cd63..1903a465 100644
--- a/config/grub/xhci/patches/0003-Add-CC0-license.patch
+++ b/config/grub/xhci/patches/0003-Add-CC0-license.patch
@@ -1,4 +1,4 @@
-From ba1b693f60ab68af207d8f39a5d6e28f74872031 Mon Sep 17 00:00:00 2001
+From 4e2ba04266f006369dc10b981803ba3a237f2ad8 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 03/26] Add CC0 license
@@ -10,10 +10,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  2 files changed, 4 insertions(+), 2 deletions(-)
 
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index 8ad015b07..9980bae90 100644
+index de8c3aa8d..4a3be8568 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -494,7 +494,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e)
+@@ -495,7 +495,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e)
  
    if (grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3") == 0
        || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3+") == 0
diff --git a/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
index 6fd54747..2adba78b 100644
--- a/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
+++ b/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
@@ -1,4 +1,4 @@
-From a3c13eb165cb375017a76b219f1de1604a9dc156 Mon Sep 17 00:00:00 2001
+From c0b5c14042ee44e0e3ed814ebba3190b47514d82 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 04/26] Define GRUB_UINT32_MAX
diff --git a/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch b/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
index 4900eed2..0db13c60 100644
--- a/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
+++ b/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
@@ -1,4 +1,4 @@
-From 176751e11424f75155ce64311923acf48fc4ec3c Mon Sep 17 00:00:00 2001
+From 46aa2f307de53b305045f7706b38a4e0d198875e Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 05/26] Add Argon2 algorithm
diff --git a/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
index 559080cf..b9da0bec 100644
--- a/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
+++ b/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
@@ -1,4 +1,4 @@
-From a779f27023bee409d06f6b9023cd907d2f3b959d Mon Sep 17 00:00:00 2001
+From c3a68f158725a858206c1fc91407b4993142a4a5 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 06/26] Error on missing Argon2id parameters
@@ -9,10 +9,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  1 file changed, 8 insertions(+), 5 deletions(-)
 
 diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c
-index d5106402f..bc818ea69 100644
+index 8036d76ff..efae8ac65 100644
 --- a/grub-core/disk/luks2.c
 +++ b/grub-core/disk/luks2.c
-@@ -38,6 +38,7 @@ GRUB_MOD_LICENSE ("GPLv3+");
+@@ -39,6 +39,7 @@ GRUB_MOD_LICENSE ("GPLv3+");
  enum grub_luks2_kdf_type
  {
    LUKS2_KDF_TYPE_ARGON2I,
@@ -20,7 +20,7 @@ index d5106402f..bc818ea69 100644
    LUKS2_KDF_TYPE_PBKDF2
  };
  typedef enum grub_luks2_kdf_type grub_luks2_kdf_type_t;
-@@ -90,7 +91,7 @@ struct grub_luks2_keyslot
+@@ -91,7 +92,7 @@ struct grub_luks2_keyslot
  	grub_int64_t time;
  	grub_int64_t memory;
  	grub_int64_t cpus;
@@ -29,7 +29,7 @@ index d5106402f..bc818ea69 100644
        struct
        {
  	const char   *hash;
-@@ -160,10 +161,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot)
+@@ -161,10 +162,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot)
      return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing or invalid KDF");
    else if (!grub_strcmp (type, "argon2i") || !grub_strcmp (type, "argon2id"))
      {
@@ -45,7 +45,7 @@ index d5106402f..bc818ea69 100644
  	return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing Argon2i parameters");
      }
    else if (!grub_strcmp (type, "pbkdf2"))
-@@ -459,6 +461,7 @@ luks2_decrypt_key (grub_uint8_t *out_key,
+@@ -460,6 +462,7 @@ luks2_decrypt_key (grub_uint8_t *out_key,
    switch (k->kdf.type)
      {
        case LUKS2_KDF_TYPE_ARGON2I:
diff --git a/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
index 95fda3c6..c6369367 100644
--- a/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
+++ b/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
@@ -1,4 +1,4 @@
-From 3ab4a66104c772241e42b1f4f42a5890f3059164 Mon Sep 17 00:00:00 2001
+From 13f149fa5fe4e2ae0e95b3055584335beb9bdee8 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 07/26] Compile with Argon2id support
@@ -48,18 +48,18 @@ index f5f9b040c..f1f38d8d3 100644
  
  module = {
 diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c
-index bc818ea69..5b9eaa599 100644
+index efae8ac65..2e742f5be 100644
 --- a/grub-core/disk/luks2.c
 +++ b/grub-core/disk/luks2.c
-@@ -27,6 +27,7 @@
- #include <grub/partition.h>
+@@ -28,6 +28,7 @@
  #include <grub/i18n.h>
+ #include <grub/safemath.h>
  
 +#include <argon2.h>
  #include <base64.h>
  #include <json.h>
  
-@@ -462,8 +463,16 @@ luks2_decrypt_key (grub_uint8_t *out_key,
+@@ -463,8 +464,16 @@ luks2_decrypt_key (grub_uint8_t *out_key,
      {
        case LUKS2_KDF_TYPE_ARGON2I:
        case LUKS2_KDF_TYPE_ARGON2ID:
diff --git a/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
index 37de98c5..b0e36f9e 100644
--- a/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
+++ b/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
@@ -1,4 +1,4 @@
-From 94a89aea5118294173d29bdf49e41f7801e3df48 Mon Sep 17 00:00:00 2001
+From 068442a692ab28298eab6bfd89a286c1d2ab91e0 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 08/26] Make grub-install work with Argon2
diff --git a/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
index 847d2291..9d7a9387 100644
--- a/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
+++ b/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -1,4 +1,4 @@
-From ddd9c783a8b6dec9e116930f2a8ccfac354d7e29 Mon Sep 17 00:00:00 2001
+From 063d8d5fe39d2addca7806ca0a7c6f0544affa8f Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 30 Oct 2023 22:19:21 +0000
 Subject: [PATCH 09/26] at_keyboard coreboot: force scancodes2+translate
diff --git a/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
index c2cec5d4..b116ea52 100644
--- a/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
+++ b/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
@@ -1,4 +1,4 @@
-From 1391cfd14088e90e01a477269e2892c89ba2536d Mon Sep 17 00:00:00 2001
+From cb7d93059959eb921328bd285f18e363f0f44aec Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 31 Oct 2023 10:33:28 +0000
 Subject: [PATCH 10/26] keylayouts: don't print "Unknown key" message
diff --git a/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
index b1877070..655e0005 100644
--- a/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
+++ b/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -1,4 +1,4 @@
-From 3f1eb3f472d2c92e5a2a14c7c3469154ae450df6 Mon Sep 17 00:00:00 2001
+From 2ca7390361d1ff8ea18399b41e38436c8d506d60 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:14:58 +0000
 Subject: [PATCH 11/26] don't print missing prefix errors on the screen
@@ -85,10 +85,10 @@ index 18de52562..2a0fea6c8 100644
  	    }
  	  file = try_open_from_prefix (prefix, filename);
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index 9980bae90..4457cad7c 100644
+index 4a3be8568..6ae3d73f8 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -871,7 +871,7 @@ grub_dl_load (const char *name)
+@@ -881,7 +881,7 @@ grub_dl_load (const char *name)
      return 0;
  
    if (! grub_dl_dir) {
diff --git a/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
index 24a1ce4b..589dd4d7 100644
--- a/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
+++ b/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
@@ -1,4 +1,4 @@
-From 5a2700d29f8145d94886aa369e4c68d57295d44a Mon Sep 17 00:00:00 2001
+From 51b439fc0aea4ef2c52c80fa765d9bda992a8ac2 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:36:22 +0000
 Subject: [PATCH 12/26] don't print error if module not found
@@ -17,10 +17,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
-index 4457cad7c..ea9fe8019 100644
+index 6ae3d73f8..4c15027fe 100644
 --- a/grub-core/kern/dl.c
 +++ b/grub-core/kern/dl.c
-@@ -510,7 +510,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
+@@ -511,7 +511,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
  
    s = grub_dl_find_section (e, ".modname");
    if (!s)
diff --git a/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
index d7a52bce..7cd354e3 100644
--- a/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
+++ b/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
@@ -1,4 +1,4 @@
-From 376f1dbf2c56623e9b9bda3a4079b4b970ab2ebd Mon Sep 17 00:00:00 2001
+From 88c2d1618283c7f1c3b4adbce532789b0ca2447d Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 17:25:20 +0000
 Subject: [PATCH 13/26] don't print empty error messages
diff --git a/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch b/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
index d8e1c766..a35a16e9 100644
--- a/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
+++ b/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
@@ -1,4 +1,4 @@
-From 8094d43abecf758617aec1d4f8c9b1099cb4e67e Mon Sep 17 00:00:00 2001
+From 2472f3c2e465863c51a3cacf96ab910c015cfa8e Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:00:27 +0100
 Subject: [PATCH 14/26] grub-core/bus/usb: Parse SuperSpeed companion
diff --git a/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch b/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
index 30133543..84b81df7 100644
--- a/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
+++ b/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
@@ -1,4 +1,4 @@
-From fd92646af5b9a5cc027ce0bd6afa5cc7bc8f46a3 Mon Sep 17 00:00:00 2001
+From 681a247209c83451cdebf6fc02cee6737a1921b6 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Mon, 7 Dec 2020 08:41:22 +0100
 Subject: [PATCH 15/26] usb: Add enum for xHCI
diff --git a/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch b/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
index a4abb713..611db609 100644
--- a/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
+++ b/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
@@ -1,4 +1,4 @@
-From f7c7c25e274b79a7c8e62250fa9bc49f81bd4456 Mon Sep 17 00:00:00 2001
+From 8af01b2548f61a9197b9f931831ca397a7e7c9b3 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Mon, 7 Dec 2020 08:41:23 +0100
 Subject: [PATCH 16/26] usbtrans: Set default maximum packet size
diff --git a/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch b/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
index 6d4ed855..05540fa6 100644
--- a/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
+++ b/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
@@ -1,4 +1,4 @@
-From c3d70163d472953b705ff1250e3c4bfec8cb52ad Mon Sep 17 00:00:00 2001
+From 7a977001a1574c884c4f711686c2de01386b9230 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:51:42 +0100
 Subject: [PATCH 17/26] grub-core/bus/usb: Add function pointer for
@@ -19,7 +19,7 @@ Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
  5 files changed, 29 insertions(+)
 
 diff --git a/grub-core/bus/usb/ehci.c b/grub-core/bus/usb/ehci.c
-index 9abebc6bd..953b851c0 100644
+index 2db07c7c0..1ee056015 100644
 --- a/grub-core/bus/usb/ehci.c
 +++ b/grub-core/bus/usb/ehci.c
 @@ -1812,6 +1812,8 @@ static struct grub_usb_controller_dev usb_controller = {
diff --git a/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch b/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
index e68985b0..a3eaba15 100644
--- a/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
+++ b/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
@@ -1,4 +1,4 @@
-From 4b21796042db28db773534d5f0cf83738a72b929 Mon Sep 17 00:00:00 2001
+From e8a237ffb5bd3ba5258ce5c173b31424f3a39392 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Mon, 7 Dec 2020 08:41:25 +0100
 Subject: [PATCH 18/26] grub-core/bus/usb/usbhub: Add new private fields for
diff --git a/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch b/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
index 0cf2bda7..e6c0d474 100644
--- a/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
+++ b/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
@@ -1,4 +1,4 @@
-From 75b3d347ea5f3c51615f8ccb670b9f2033f8594f Mon Sep 17 00:00:00 2001
+From badcc0d5ff1d4b194c93a530344788c4231d8789 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Mon, 7 Dec 2020 08:41:26 +0100
 Subject: [PATCH 19/26] grub-core/bus/usb: Add xhci support
diff --git a/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch b/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
index f27e5428..01d7d008 100644
--- a/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
+++ b/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
@@ -1,4 +1,4 @@
-From 6d05a393bf192bb5ae3ba1f7d653617b7ab9bb2e Mon Sep 17 00:00:00 2001
+From e4416b166e501777e53de387ac4329150483a160 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Mon, 7 Dec 2020 08:41:27 +0100
 Subject: [PATCH 20/26] grub-core/bus/usb/usbhub: Add xHCI non root hub support
diff --git a/config/grub/xhci/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch b/config/grub/xhci/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch
index 3bc5f0b2..d0874f85 100644
--- a/config/grub/xhci/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch
+++ b/config/grub/xhci/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch
@@ -1,4 +1,4 @@
-From 3fa33c091866b13c452b7a39ecee291e5901ff22 Mon Sep 17 00:00:00 2001
+From 8e6d5b598b3e21c905023b438110d71f487a2289 Mon Sep 17 00:00:00 2001
 From: Sven Anderson <sven@anderson.de>
 Date: Sat, 28 May 2022 21:39:23 +0200
 Subject: [PATCH 21/26] xHCI: also accept SBRN 0x31 and 0x32
diff --git a/config/grub/xhci/patches/0022-xhci-fix-port-indexing.patch b/config/grub/xhci/patches/0022-xhci-fix-port-indexing.patch
index 83427fcc..7e0bcb74 100644
--- a/config/grub/xhci/patches/0022-xhci-fix-port-indexing.patch
+++ b/config/grub/xhci/patches/0022-xhci-fix-port-indexing.patch
@@ -1,4 +1,4 @@
-From c455091ce40ffd8218802aaadeacf2039fea5036 Mon Sep 17 00:00:00 2001
+From 32c6d97e2a80c2e74dd9daf74281a89d1a05faaa Mon Sep 17 00:00:00 2001
 From: Sven Anderson <sven@anderson.de>
 Date: Mon, 13 Jan 2025 19:51:41 +0100
 Subject: [PATCH 22/26] xhci: fix port indexing
diff --git a/config/grub/xhci/patches/0023-xhci-workaround-z790-non-root-hub-speed-detection.patch b/config/grub/xhci/patches/0023-xhci-workaround-z790-non-root-hub-speed-detection.patch
index 0181f3bd..f07500fd 100644
--- a/config/grub/xhci/patches/0023-xhci-workaround-z790-non-root-hub-speed-detection.patch
+++ b/config/grub/xhci/patches/0023-xhci-workaround-z790-non-root-hub-speed-detection.patch
@@ -1,4 +1,4 @@
-From b033ef3b4b2384df4165ae7829155cafd4ee3488 Mon Sep 17 00:00:00 2001
+From 70731c46da05311edb639ce1349bb6dd3279031e Mon Sep 17 00:00:00 2001
 From: Sven Anderson <sven@anderson.de>
 Date: Mon, 13 Jan 2025 19:55:15 +0100
 Subject: [PATCH 23/26] xhci: workaround z790 non-root-hub speed detection
diff --git a/config/grub/xhci/patches/0024-xhci-configure-TT-for-non-root-hubs.patch b/config/grub/xhci/patches/0024-xhci-configure-TT-for-non-root-hubs.patch
index 5f612885..a605e210 100644
--- a/config/grub/xhci/patches/0024-xhci-configure-TT-for-non-root-hubs.patch
+++ b/config/grub/xhci/patches/0024-xhci-configure-TT-for-non-root-hubs.patch
@@ -1,4 +1,4 @@
-From 7748bcc0e7cef17dbf626f83cc03e56a17075330 Mon Sep 17 00:00:00 2001
+From 233f7dd274ef2ccac7b1fc0f5cfdeb7c01aef58b Mon Sep 17 00:00:00 2001
 From: Sven Anderson <sven@anderson.de>
 Date: Mon, 13 Jan 2025 20:26:32 +0100
 Subject: [PATCH 24/26] xhci: configure TT for non-root-hubs
diff --git a/config/grub/xhci/patches/0025-Fix-compilation-on-x86_64.patch b/config/grub/xhci/patches/0025-Fix-compilation-on-x86_64.patch
index 409f16e5..e75cc5e9 100644
--- a/config/grub/xhci/patches/0025-Fix-compilation-on-x86_64.patch
+++ b/config/grub/xhci/patches/0025-Fix-compilation-on-x86_64.patch
@@ -1,4 +1,4 @@
-From 915d9b148cb57e22bb58505f72bc81add2479a73 Mon Sep 17 00:00:00 2001
+From 0441e7eff7950bfd47fc2f5533ce2c64b785dc1d Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Wed, 24 Feb 2021 08:25:41 +0100
 Subject: [PATCH 25/26] Fix compilation on x86_64
diff --git a/config/grub/xhci/patches/0026-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/xhci/patches/0026-Add-native-NVMe-driver-based-on-SeaBIOS.patch
index ffb1a8a4..36bbecd9 100644
--- a/config/grub/xhci/patches/0026-Add-native-NVMe-driver-based-on-SeaBIOS.patch
+++ b/config/grub/xhci/patches/0026-Add-native-NVMe-driver-based-on-SeaBIOS.patch
@@ -1,4 +1,4 @@
-From a4e50d731ed687420850a10a84415b9cb9c6cf13 Mon Sep 17 00:00:00 2001
+From 4440b01a702368c81520f630aa16852de55bb808 Mon Sep 17 00:00:00 2001
 From: Mate Kukri <km@mkukri.xyz>
 Date: Mon, 20 May 2024 11:43:35 +0100
 Subject: [PATCH 26/26] Add native NVMe driver based on SeaBIOS
diff --git a/config/grub/xhci/target.cfg b/config/grub/xhci/target.cfg
index 540f11f7..aca71fca 100644
--- a/config/grub/xhci/target.cfg
+++ b/config/grub/xhci/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="xhci"
-rev="6811f6f09d61996a3acbc4fc0414e45964f0e2d9"
+rev="4dc6166571645780c459dde2cdc1b001a5ec844c"

From d7312260e7eabcb8f3e36a7a5951655c38af4bdd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 25 Feb 2025 13:29:16 +0000
Subject: [PATCH 1105/1549] util/nvmutil: remove excessive comments

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 util/nvmutil/nvmutil.c | 119 ++++++++++++-----------------------------
 1 file changed, 35 insertions(+), 84 deletions(-)

diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index f51bafeb..12aabe4d 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -25,9 +25,9 @@ uint8_t hextonum(char chs), rhex(void);
 #define COMMAND argv[2]
 #define MAC_ADDRESS argv[3]
 #define PARTN argv[3]
-#define NVM_CHECKSUM 0xBABA /* checksum value */
-#define NVM_CHECKSUM_WORD 0x3F /* checksum word position */
-#define NVM_SIZE 128 /* Area containing NVM words */
+#define NVM_CHECKSUM 0xBABA
+#define NVM_CHECKSUM_WORD 0x3F
+#define NVM_SIZE 128
 
 #define SIZE_4KB 0x1000
 #define SIZE_8KB 0x2000
@@ -42,7 +42,6 @@ int flags, rfd, fd, part;
 
 const char *strMac = NULL, *strRMac = "??:??:??:??:??:??", *filename = NULL;
 
-/* available commands, set a pointer based on user command */
 typedef struct op {
 	char *str;
 	void (*cmd)(void);
@@ -58,15 +57,12 @@ op_t op[] = {
 };
 void (*cmd)(void) = NULL;
 
-/* wrappers for BSD-style err() function (error handling) */
 #define ERR() errno = errno ? errno : ECANCELED
 #define err_if(x) if (x) err(ERR(), "%s", filename)
 
-/* Macro for opening a file with errors properly handled */
 #define xopen(f,l,p) if ((f = open(l, p)) == -1) err(ERR(), "%s", l); \
     if (fstat(f, &st) == -1) err(ERR(), "%s", l)
 
-/* Macros for reading/writing the GbE file in memory */
 #define word(pos16, partnum) ((uint16_t *) gbe[partnum])[pos16]
 #define setWord(pos16, p, val16) if (word(pos16, p) != val16) \
     nvmPartChanged[p] = 1 | (word(pos16, p) = val16)
@@ -75,11 +71,10 @@ int
 main(int argc, char *argv[])
 {
 #ifdef __OpenBSD__
-	/* OpenBSD pledge (sandboxing): https://man.openbsd.org/pledge.2 */
 	err_if(pledge("stdio rpath wpath unveil", NULL) == -1);
 #endif
 
-	if (argc < 2) { /* TODO: manpage! */
+	if (argc < 2) {
 #ifdef __OpenBSD__
 		err_if(pledge("stdio", NULL) == -1);
 #endif
@@ -102,38 +97,32 @@ main(int argc, char *argv[])
 
 	if (argc > 2) {
 		if (strcmp(COMMAND, "dump") == 0) {
-			flags = O_RDONLY; /* write not needed for dump cmd */
+			flags = O_RDONLY;
 #ifdef __OpenBSD__
-			/* writes not needed for the dump command */
 			err_if(pledge("stdio rpath unveil", NULL) == -1);
 #endif
 		}
 	}
 
-	/* check for dir first, to prevent unveil from
-	   permitting directory access on OpenBSD */
 	checkdir("/dev/urandom");
-	checkdir(filename); /* Must be a file, not a directory */
+	checkdir(filename);
 
 #ifdef __OpenBSD__
-	/* OpenBSD unveil: https://man.openbsd.org/unveil.2 */
 	err_if(unveil("/dev/urandom", "r") == -1);
 
-	/* Only allow access to /dev/urandom and the gbe file */
-	if (flags == O_RDONLY) { /* dump command */
-		err_if(unveil(filename, "r") == -1); /* write not needed */
-		err_if(unveil(NULL, NULL) == -1); /* lock unveil */
-		err_if(pledge("stdio rpath", NULL) == -1); /* lock unveil */
-	} else { /* other commands need read-write */
+	if (flags == O_RDONLY) {
+		err_if(unveil(filename, "r") == -1);
+		err_if(unveil(NULL, NULL) == -1);
+		err_if(pledge("stdio rpath", NULL) == -1);
+	} else {
 		err_if(unveil(filename, "rw") == -1);
-		err_if(unveil(NULL, NULL) == -1); /* lock unveil */
-		err_if(pledge("stdio rpath wpath", NULL) == -1); /* no unveil */
+		err_if(unveil(NULL, NULL) == -1);
+		err_if(pledge("stdio rpath wpath", NULL) == -1);
 	}
 #endif
 
-	openFiles(filename); /* open files first, to allow harder pledge: */
+	openFiles(filename);
 #ifdef __OpenBSD__
-	/* OpenBSD sandboxing: https://man.openbsd.org/pledge.2 */
 	err_if(pledge("stdio", NULL) == -1);
 #endif
 
@@ -157,29 +146,22 @@ main(int argc, char *argv[])
 		cmd = cmd_setmac;
 	} else if (cmd == cmd_setmac) { /* nvm gbe setmac [MAC] */
 		strMac = strRMac; /* random MAC */
-		if (argc > 3) /* user-supplied MAC (can be random) */
+		if (argc > 3)
 			strMac = MAC_ADDRESS;
 	} else if ((cmd != NULL) && (argc > 3)) { /* user-supplied partnum */
 		err_if((errno = (!((part = PARTN[0] - '0') == 0 || part == 1))
 		    || PARTN[1] ? EINVAL : errno)); /* only allow '0' or '1' */
 	}
-	err_if((errno = (cmd == NULL) ? EINVAL : errno)); /* bad user arg */
+	err_if((errno = (cmd == NULL) ? EINVAL : errno));
 
-	readGbe(); /* read gbe file into memory */
+	readGbe();
+	(*cmd)();
+	writeGbe();
 
-	(*cmd)(); /* operate on gbe file in memory */
-
-	writeGbe(); /* write changes back to file */
-
-	err_if((errno != 0) && (cmd != cmd_dump)); /* don't err on dump */
-	return errno; /* errno can be set by the dump command */
+	err_if((errno != 0) && (cmd != cmd_dump));
+	return errno;
 }
 
-/*
- * check whether urandom/file is a directory, and err if so,
- * to prevent later unveil calls from permitting directory access
- * on OpenBSD
- */
 void
 checkdir(const char *path)
 {
@@ -190,13 +172,12 @@ checkdir(const char *path)
 	err_if(errno);
 }
 
-/* open gbe file and /dev/urandom, setting permissions */
 void
 openFiles(const char *path)
 {
 	struct stat st;
 
-	xopen(fd, path, flags); /* gbe file */
+	xopen(fd, path, flags);
 
 	switch(st.st_size) {
 	case SIZE_8KB:
@@ -209,40 +190,32 @@ openFiles(const char *path)
 		break;
 	}
 
-	/* the MAC address randomiser relies on reading urandom */
 	xopen(rfd, "/dev/urandom", O_RDONLY);
 }
 
-/* read gbe file into memory buffer */
 void
 readGbe(void)
 {
 	if ((cmd == cmd_swap) || (cmd == cmd_copy))
-		nf = SIZE_4KB; /* read/write the entire block */
-			/* only need to do 4KB even on larger gbe files */
+		nf = SIZE_4KB;
 	else
-		nf = NVM_SIZE; /* only read/write the nvm part of the block */
+		nf = NVM_SIZE;
 
 	if ((cmd == cmd_copy) || (cmd == cmd_setchecksum) || (cmd == cmd_brick))
-		do_read[part ^ 1] = 0; /* only read the user-specified part */
+		do_read[part ^ 1] = 0;
 
-	/* AND do_read[*] to avoid wasteful malloc */
-	/* cmd_copy also relies on this */
 	char *buf = malloc(nf << (do_read[0] & do_read[1]));
 	if (buf == NULL)
 		err(errno, NULL);
 
-	/* we pread per-part, so each part has its own pointer: */
-	/* if a do_read is 0, both pointers are the same; this accomplishes
-	   the desired result for cmd_copy (see cmd_copy function) */
 	gbe[0] = (size_t) buf;
 	gbe[1] = gbe[0] + (nf * (do_read[0] & do_read[1]));
 
-	ssize_t tnr = 0; /* total bytes read */
+	ssize_t tnr = 0;
 
 	for (int p = 0; p < 2; p++) {
 		if (!do_read[p])
-			continue; /* avoid unnecessary reads */
+			continue;
 
 		ssize_t nr = pread(fd, (uint8_t *) gbe[p], nf, p * partsize);
 		err_if(nr == -1);
@@ -252,14 +225,12 @@ readGbe(void)
 			    nr, filename, nf);
 
 		tnr += nr;
-
 		swap(p); /* handle big-endian host CPU */
 	}
 
 	printf("%ld bytes read from file '%s'\n", tnr, filename);
 }
 
-/* set MAC address and checksum on nvm part */
 void
 cmd_setmac(void)
 {
@@ -272,21 +243,20 @@ cmd_setmac(void)
 		if (!goodChecksum(part = partnum))
 			continue;
 
-		for (int w = 0; w < 3; w++) /* write MAC to gbe part */
+		for (int w = 0; w < 3; w++)
 			setWord(w, partnum, mac[w]);
 
 		printf("Wrote MAC address to part %d: ", partnum);
 		macf(partnum);
 
-		cmd_setchecksum(); /* MAC updated; need valid checksum */
+		cmd_setchecksum();
 		mac_updated = 1;
 	}
 
 	if (mac_updated)
-		errno = 0; /* reset in case one of the checksums failed */
+		errno = 0;
 }
 
-/* parse MAC string, write to char buffer */
 void
 parseMacString(const char *strMac, uint16_t *mac)
 {
@@ -303,14 +273,12 @@ parseMacString(const char *strMac, uint16_t *mac)
 
 		int byte = i / 3;
 
-		/* Update MAC buffer per-nibble from a given string */
 		for (int nib = 0; nib < 2; nib++, total += h) {
 			if ((h = hextonum(strMac[i + nib])) > 15)
 				err(errno = EINVAL, "Invalid character '%c'",
 				    strMac[i + nib]);
 
-			/* if random: ensure local-only, unicast MAC */
-			if ((byte == 0) && (nib == 1)) /* unicast/local nib */
+			if ((byte == 0) && (nib == 1))
 				if (strMac[i + nib] == '?') /* ?=random */
 					h = (h & 0xE) | 2; /* local, unicast */
 
@@ -325,7 +293,6 @@ parseMacString(const char *strMac, uint16_t *mac)
 		err(errno = EINVAL, "Invalid MAC (multicast bit set)");
 }
 
-/* convert hex char to char value (0-15) */
 uint8_t
 hextonum(char ch)
 {
@@ -335,10 +302,9 @@ hextonum(char ch)
 		return ch - 'A' + 10;
 	else if ((ch >= 'a') && (ch <= 'f'))
 		return ch - 'a' + 10;
-	return (ch == '?') ? rhex() : 16; /* 16 for error (invalid char) */
+	return (ch == '?') ? rhex() : 16;
 }
 
-/* random number generator */
 uint8_t
 rhex(void)
 {
@@ -348,7 +314,6 @@ rhex(void)
 	return rnum[n--] & 0xf;
 }
 
-/* print mac address and hexdump of parts */
 void
 cmd_dump(void)
 {
@@ -369,7 +334,6 @@ cmd_dump(void)
 	}
 }
 
-/* print mac address of part */
 void
 macf(int partnum)
 {
@@ -383,7 +347,6 @@ macf(int partnum)
 	}
 }
 
-/* print hexdump of nvm part */
 void
 hexdump(int partnum)
 {
@@ -399,7 +362,6 @@ hexdump(int partnum)
 	}
 }
 
-/* correct the checksum on part */
 void
 cmd_setchecksum(void)
 {
@@ -407,11 +369,9 @@ cmd_setchecksum(void)
 	for (int c = 0; c < NVM_CHECKSUM_WORD; c++)
 		val16 += word(c, part);
 
-	/* correct the checksum */
 	setWord(NVM_CHECKSUM_WORD, part, NVM_CHECKSUM - val16);
 }
 
-/* intentionally set wrong checksum on part */
 void
 cmd_brick(void)
 {
@@ -420,23 +380,17 @@ cmd_brick(void)
 		    ((word(NVM_CHECKSUM_WORD, part)) ^ 0xFF));
 }
 
-/* overwrite the contents of one part with the other */
 void
 cmd_copy(void)
 {
 	nvmPartChanged[part ^ 1] = goodChecksum(part);
-
-	/* no need to actually copy because gbe[] pointers are both the same */
-	/* we simply set the right nvm part as changed, and write the file */
 }
 
-/* swap contents between the two parts */
 void
 cmd_swap(void) {
 	err_if(!(goodChecksum(0) || goodChecksum(1)));
 	errno = 0;
 
-	/* speedhack: swap pointers, not words. (xor swap) */
 	gbe[0] ^= gbe[1];
 	gbe[1] ^= gbe[0];
 	gbe[0] ^= gbe[1];
@@ -444,7 +398,6 @@ cmd_swap(void) {
 	nvmPartChanged[0] = nvmPartChanged[1] = 1;
 }
 
-/* verify nvm part checksum (return 1 if valid) */
 int
 goodChecksum(int partnum)
 {
@@ -460,11 +413,10 @@ goodChecksum(int partnum)
 	return 0;
 }
 
-/* write the nvm parts back to the file */
 void
 writeGbe(void)
 {
-	ssize_t tnw = 0; /* total bytes written */
+	ssize_t tnw = 0;
 
 	for (int p = 0; p < 2; p++) {
 		if ((!nvmPartChanged[p]) || (flags == O_RDONLY))
@@ -498,10 +450,9 @@ writeGbe(void)
 	err_if(close(fd) == -1);
 }
 
-/* swap byte order on big-endian CPUs. swap skipped on little endian */
 void
-swap(int partnum) /* swaps bytes in words, not pointers. */
-{		/* not to be confused with cmd_swap */
+swap(int partnum)
+{
 	size_t w, x;
 	uint8_t *n = (uint8_t *) gbe[partnum];
 	int e = 1;

From 3f14a470a2eab47c7a57bc0e352000e5a7acbe0d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 1 Apr 2025 08:45:41 +0100
Subject: [PATCH 1106/1549] remove _fsp targets (keep _vfsp)

_fsp is obsolete. people should use _vfsp

_fsp was kept for a short while, for backward compatibility,
but nobody really uses it now and it just causes confusion

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              | 816 -----------------
 .../config/libgfxinit_txtmode                 | 809 -----------------
 .../dell3050micro_fsp_16mb/target.cfg         |  14 -
 .../config/libgfxinit_corebootfb              | 855 ------------------
 .../t480_fsp_16mb/config/libgfxinit_txtmode   | 848 -----------------
 config/coreboot/t480_fsp_16mb/target.cfg      |  13 -
 .../config/libgfxinit_corebootfb              | 855 ------------------
 .../t480s_fsp_16mb/config/libgfxinit_txtmode  | 848 -----------------
 config/coreboot/t480s_fsp_16mb/target.cfg     |  13 -
 9 files changed, 5071 deletions(-)
 delete mode 100644 config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
 delete mode 100644 config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/dell3050micro_fsp_16mb/target.cfg
 delete mode 100644 config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
 delete mode 100644 config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/t480_fsp_16mb/target.cfg
 delete mode 100644 config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
 delete mode 100644 config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
 delete mode 100644 config/coreboot/t480s_fsp_16mb/target.cfg

diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
deleted file mode 100644
index f6ce2076..00000000
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
+++ /dev/null
@@ -1,816 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_LTO is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-CONFIG_OPTION_BACKEND_NONE=y
-# CONFIG_USE_OPTION_TABLE is not set
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOOSTAR is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ARM is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_CWWK is not set
-CONFIG_VENDOR_DELL=y
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_ERYING is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_FRAMEWORK is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HARDKERNEL is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LATTEPANDA is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MITAC_COMPUTING is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAPTOR_CS is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_TOPTON is not set
-# CONFIG_VENDOR_UP is not set
-# CONFIG_VENDOR_VIA is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/optiplex_3050"
-CONFIG_VGA_BIOS_ID="8086,0406"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=512
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="Dell Inc."
-CONFIG_CBFS_SIZE=0xEEE000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
-CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
-CONFIG_MAX_CPUS=16
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_OVERRIDE_DEVICETREE=""
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-# CONFIG_VGA_BIOS is not set
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=256
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-# CONFIG_FATAL_ASSERTS is not set
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
-# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
-# CONFIG_CONSOLE_POST is not set
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_MAX_SOCKET=1
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_USE_PM_ACPI_TIMER=y
-# CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
-CONFIG_BOARD_DELL_OPTIPLEX_3050=y
-# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
-# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-# CONFIG_BOARD_DELL_XPS_8300 is not set
-CONFIG_DCACHE_RAM_BASE=0xfef00000
-CONFIG_DCACHE_RAM_SIZE=0x40000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_USE_LEGACY_8254_TIMER=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin"
-CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_TTYS0_BAUD=115200
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
-CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x100000
-CONFIG_EC_GPE_SCI=0x50
-CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
-CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
-CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
-CONFIG_BOARD_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=16384
-CONFIG_ROM_SIZE=0x01000000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
-CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
-# end of Mainboard
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
-CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
-CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x200000
-CONFIG_SMM_MODULE_STACK_SIZE=0x800
-CONFIG_ACPI_BERT_SIZE=0x0
-CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IFD_CHIPSET="sklkbl"
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_MAX_ROOT_PORTS=24
-CONFIG_PCR_BASE_ADDRESS=0xfd000000
-CONFIG_CPU_BCLK_MHZ=100
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
-CONFIG_CPU_XTAL_HZ=24000000
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
-CONFIG_SOC_INTEL_I2C_DEV_MAX=6
-# CONFIG_ENABLE_SATA_TEST_MODE is not set
-CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
-CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
-CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
-CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
-CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
-CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_FSP_PUBLISH_MBP_HOB=y
-CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
-CONFIG_MAX_HECI_DEVICES=5
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_HAVE_PAM0_REGISTER=y
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
-CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
-CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
-CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
-CONFIG_SOC_INTEL_KABYLAKE=y
-CONFIG_SKYLAKE_SOC_PCH_H=y
-CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
-CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
-CONFIG_FSP_T_LOCATION=0xfffe0000
-CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
-CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_SOC_INTEL_COMMON=y
-
-#
-# Intel SoC Common Code for IP blocks
-#
-CONFIG_SOC_INTEL_COMMON_BLOCK=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
-CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
-# CONFIG_USE_COREBOOT_MP_INIT is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
-CONFIG_INTEL_CAR_NEM_ENHANCED=y
-# CONFIG_USE_INTEL_FSP_MP_INIT is not set
-CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
-CONFIG_HAVE_HYPERTHREADING=y
-# CONFIG_FSP_HYPERTHREADING is not set
-# CONFIG_INTEL_KEYLOCKER is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
-CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
-CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
-CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
-CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
-CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
-CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
-CONFIG_SOC_INTEL_CSE_RW_FILE=""
-CONFIG_SOC_INTEL_CSE_RW_VERSION=""
-CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
-CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
-CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
-CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
-CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
-CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
-CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
-# CONFIG_SOC_INTEL_DISABLE_IGD is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
-CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
-# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
-CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
-CONFIG_SA_ENABLE_DPR=y
-CONFIG_HAVE_CAPID_A_REGISTER=y
-CONFIG_HAVE_BDSM_BGSM_REGISTER=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
-
-#
-# Intel SoC Common PCH Code
-#
-CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
-CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
-CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
-CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
-CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
-CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
-
-#
-# Intel SoC Common coreboot stages and non-IP blocks
-#
-CONFIG_SOC_INTEL_COMMON_BASECODE=y
-CONFIG_SOC_INTEL_COMMON_RESET=y
-CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
-CONFIG_PAVP=y
-# CONFIG_MMA is not set
-CONFIG_SOC_INTEL_COMMON_NHLT=y
-# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_PARALLEL_MP_AP_WORK=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-CONFIG_SUPERIO_SMSC_SCH555x=y
-
-#
-# Embedded Controllers
-#
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
-CONFIG_UDK_BASE=y
-CONFIG_UDK_2017_BINDING=y
-CONFIG_UDK_2013_VERSION=2013
-CONFIG_UDK_2017_VERSION=2017
-CONFIG_UDK_202005_VERSION=202005
-CONFIG_UDK_202111_VERSION=202111
-CONFIG_UDK_202302_VERSION=202302
-CONFIG_UDK_202305_VERSION=202305
-CONFIG_UDK_VERSION=2017
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
-CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
-CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
-CONFIG_DEFAULT_EBDA_SIZE=0x400
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_HAVE_FSP_GOP=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_RUN_FSP_GOP is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-CONFIG_LINEAR_FRAMEBUFFER=y
-# CONFIG_BOOTSPLASH is not set
-CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y
-# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set
-# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set
-# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set
-CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x10000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-CONFIG_MRC_SETTINGS_PROTECT=y
-# CONFIG_DRIVERS_OPTION_CFR is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-CONFIG_DRIVERS_I2C_DESIGNWARE=y
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_FSP_USE_REPO=y
-# CONFIG_DISPLAY_HOBS is not set
-# CONFIG_DISPLAY_UPD_DATA is not set
-# CONFIG_BMP_LOGO is not set
-CONFIG_PLATFORM_USES_FSP2_0=y
-CONFIG_PLATFORM_USES_FSP2_X86_32=y
-CONFIG_HAVE_INTEL_FSP_REPO=y
-CONFIG_ADD_FSP_BINARIES=y
-CONFIG_FSP_S_CBFS="fsps.bin"
-CONFIG_FSP_M_CBFS="fspm.bin"
-CONFIG_FSP_FULL_FD=y
-CONFIG_FSP_T_RESERVED_SIZE=0x0
-CONFIG_FSP_M_XIP=y
-CONFIG_HAVE_FSP_LOGO_SUPPORT=y
-CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
-CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
-CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
-CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
-# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
-# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Skylake"
-CONFIG_GFX_GMA_PCH="Sunrise_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_USB_ACPI=y
-CONFIG_DRIVERS_WIFI_GENERIC=y
-CONFIG_DRIVERS_MTK_WIFI=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
-# end of Memory initialization
-
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_CUSTOM_MADT=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_ACPI_LPIT=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_ACPI_S1_NOT_SUPPORTED=y
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_ACPI_NHLT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
-# CONFIG_DISPLAY_FSP_HEADER is not set
-# CONFIG_VERIFY_HOBS is not set
-# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
-CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
-# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-CONFIG_HAVE_DEBUG_GPIO=y
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_GENERIC_GPIO_LIB=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
deleted file mode 100644
index 593237f1..00000000
--- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,809 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_LTO is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-CONFIG_OPTION_BACKEND_NONE=y
-# CONFIG_USE_OPTION_TABLE is not set
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOOSTAR is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ARM is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_CWWK is not set
-CONFIG_VENDOR_DELL=y
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_ERYING is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_FRAMEWORK is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HARDKERNEL is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LATTEPANDA is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MITAC_COMPUTING is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAPTOR_CS is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_TOPTON is not set
-# CONFIG_VENDOR_UP is not set
-# CONFIG_VENDOR_VIA is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/optiplex_3050"
-CONFIG_VGA_BIOS_ID="8086,0406"
-CONFIG_DIMM_MAX=4
-CONFIG_DIMM_SPD_SIZE=512
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="Dell Inc."
-CONFIG_CBFS_SIZE=0xEEE000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_MAX_CPUS=16
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_OVERRIDE_DEVICETREE=""
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-# CONFIG_VGA_BIOS is not set
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=256
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-# CONFIG_FATAL_ASSERTS is not set
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
-# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
-# CONFIG_CONSOLE_POST is not set
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_MAX_SOCKET=1
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_USE_PM_ACPI_TIMER=y
-# CONFIG_BOARD_DELL_E6400 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
-CONFIG_BOARD_DELL_OPTIPLEX_3050=y
-# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
-# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-# CONFIG_BOARD_DELL_XPS_8300 is not set
-CONFIG_DCACHE_RAM_BASE=0xfef00000
-CONFIG_DCACHE_RAM_SIZE=0x40000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_USE_LEGACY_8254_TIMER=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin"
-CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
-CONFIG_HAVE_IFD_BIN=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_TTYS0_BAUD=115200
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
-CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x100000
-CONFIG_EC_GPE_SCI=0x50
-CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
-CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
-CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
-CONFIG_BOARD_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=16384
-CONFIG_ROM_SIZE=0x01000000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
-CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
-# end of Mainboard
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
-CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
-CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x200000
-CONFIG_SMM_MODULE_STACK_SIZE=0x800
-CONFIG_ACPI_BERT_SIZE=0x0
-CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IFD_CHIPSET="sklkbl"
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_MAX_ROOT_PORTS=24
-CONFIG_PCR_BASE_ADDRESS=0xfd000000
-CONFIG_CPU_BCLK_MHZ=100
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
-CONFIG_CPU_XTAL_HZ=24000000
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
-CONFIG_SOC_INTEL_I2C_DEV_MAX=6
-# CONFIG_ENABLE_SATA_TEST_MODE is not set
-CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
-CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
-CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
-CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
-CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
-CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_FSP_PUBLISH_MBP_HOB=y
-CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
-CONFIG_MAX_HECI_DEVICES=5
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_HAVE_PAM0_REGISTER=y
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
-CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
-CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
-CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
-CONFIG_SOC_INTEL_KABYLAKE=y
-CONFIG_SKYLAKE_SOC_PCH_H=y
-CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
-CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
-CONFIG_FSP_T_LOCATION=0xfffe0000
-CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
-CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_SOC_INTEL_COMMON=y
-
-#
-# Intel SoC Common Code for IP blocks
-#
-CONFIG_SOC_INTEL_COMMON_BLOCK=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
-CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
-# CONFIG_USE_COREBOOT_MP_INIT is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
-CONFIG_INTEL_CAR_NEM_ENHANCED=y
-# CONFIG_USE_INTEL_FSP_MP_INIT is not set
-CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
-CONFIG_HAVE_HYPERTHREADING=y
-# CONFIG_FSP_HYPERTHREADING is not set
-# CONFIG_INTEL_KEYLOCKER is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
-CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
-CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
-CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
-CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
-CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
-CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
-CONFIG_SOC_INTEL_CSE_RW_FILE=""
-CONFIG_SOC_INTEL_CSE_RW_VERSION=""
-CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
-CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
-CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
-CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
-CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
-CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
-CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
-# CONFIG_SOC_INTEL_DISABLE_IGD is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
-CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
-# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
-CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
-CONFIG_SA_ENABLE_DPR=y
-CONFIG_HAVE_CAPID_A_REGISTER=y
-CONFIG_HAVE_BDSM_BGSM_REGISTER=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
-
-#
-# Intel SoC Common PCH Code
-#
-CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
-CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
-CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
-CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
-CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
-CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
-
-#
-# Intel SoC Common coreboot stages and non-IP blocks
-#
-CONFIG_SOC_INTEL_COMMON_BASECODE=y
-CONFIG_SOC_INTEL_COMMON_RESET=y
-CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
-CONFIG_PAVP=y
-# CONFIG_MMA is not set
-CONFIG_SOC_INTEL_COMMON_NHLT=y
-# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_PARALLEL_MP_AP_WORK=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-CONFIG_SUPERIO_SMSC_SCH555x=y
-
-#
-# Embedded Controllers
-#
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
-CONFIG_UDK_BASE=y
-CONFIG_UDK_2017_BINDING=y
-CONFIG_UDK_2013_VERSION=2013
-CONFIG_UDK_2017_VERSION=2017
-CONFIG_UDK_202005_VERSION=202005
-CONFIG_UDK_202111_VERSION=202111
-CONFIG_UDK_202302_VERSION=202302
-CONFIG_UDK_202305_VERSION=202305
-CONFIG_UDK_VERSION=2017
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
-CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
-CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
-CONFIG_DEFAULT_EBDA_SIZE=0x400
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_HAVE_FSP_GOP=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_RUN_FSP_GOP is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
-CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x10000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-CONFIG_MRC_SETTINGS_PROTECT=y
-# CONFIG_DRIVERS_OPTION_CFR is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-CONFIG_DRIVERS_I2C_DESIGNWARE=y
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_FSP_USE_REPO=y
-# CONFIG_DISPLAY_HOBS is not set
-# CONFIG_DISPLAY_UPD_DATA is not set
-# CONFIG_BMP_LOGO is not set
-CONFIG_PLATFORM_USES_FSP2_0=y
-CONFIG_PLATFORM_USES_FSP2_X86_32=y
-CONFIG_HAVE_INTEL_FSP_REPO=y
-CONFIG_ADD_FSP_BINARIES=y
-CONFIG_FSP_S_CBFS="fsps.bin"
-CONFIG_FSP_M_CBFS="fspm.bin"
-CONFIG_FSP_FULL_FD=y
-CONFIG_FSP_T_RESERVED_SIZE=0x0
-CONFIG_FSP_M_XIP=y
-CONFIG_HAVE_FSP_LOGO_SUPPORT=y
-CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
-CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
-CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
-CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
-# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
-# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Skylake"
-CONFIG_GFX_GMA_PCH="Sunrise_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_VGA=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_USB_ACPI=y
-CONFIG_DRIVERS_WIFI_GENERIC=y
-CONFIG_DRIVERS_MTK_WIFI=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-CONFIG_NO_TPM=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
-# end of Memory initialization
-
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_CUSTOM_MADT=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_ACPI_LPIT=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_ACPI_S1_NOT_SUPPORTED=y
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_IOAPIC=y
-CONFIG_ACPI_NHLT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
-# CONFIG_DISPLAY_FSP_HEADER is not set
-# CONFIG_VERIFY_HOBS is not set
-# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
-CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
-# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-CONFIG_HAVE_DEBUG_GPIO=y
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_GENERIC_GPIO_LIB=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell3050micro_fsp_16mb/target.cfg b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
deleted file mode 100644
index b6e6c722..00000000
--- a/config/coreboot/dell3050micro_fsp_16mb/target.cfg
+++ /dev/null
@@ -1,14 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-tree="next"
-xarch="i386-elf"
-payload_seabios="y"
-payload_grub="y"
-payload_memtest="y"
-grub_scan_disk="nvme ahci"
-grubtree="xhci"
-vcfg="3050micro"
-build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-IFD_platform="sklkbl"
-payload_uboot_amd64="y"
-release="n" # dell3050micro_vfsp_16mb is released instead
diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
deleted file mode 100644
index 5191da57..00000000
--- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb
+++ /dev/null
@@ -1,855 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_LTO is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-CONFIG_OPTION_BACKEND_NONE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOOSTAR is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ARM is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_CWWK is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_ERYING is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_FRAMEWORK is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HARDKERNEL is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LATTEPANDA is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MITAC_COMPUTING is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAPTOR_CS is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_TOPTON is not set
-# CONFIG_VENDOR_UP is not set
-# CONFIG_VENDOR_VIA is not set
-CONFIG_MAINBOARD_FAMILY="T480"
-CONFIG_MAINBOARD_PART_NUMBER="T480"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
-CONFIG_VGA_BIOS_ID="8086,0406"
-CONFIG_DIMM_MAX=2
-CONFIG_DIMM_SPD_SIZE=512
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0xEEC000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
-CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
-CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y
-CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_VARIANT_DIR="t480"
-CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-# CONFIG_VGA_BIOS is not set
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=256
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-# CONFIG_FATAL_ASSERTS is not set
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
-# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480"
-# CONFIG_CONSOLE_POST is not set
-CONFIG_MAX_SOCKET=1
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_TPM_PIRQ=0x0
-CONFIG_USE_PM_ACPI_TIMER=y
-CONFIG_DCACHE_RAM_BASE=0xfef00000
-CONFIG_DCACHE_RAM_SIZE=0x40000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_USE_LEGACY_8254_TIMER=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t480/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/t480/gbe"
-CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
-CONFIG_HAVE_IFD_BIN=y
-# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
-# CONFIG_BOARD_LENOVO_M920Q is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-CONFIG_BOARD_LENOVO_T480=y
-# CONFIG_BOARD_LENOVO_T480S is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
-CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin"
-CONFIG_TTYS0_BAUD=115200
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
-CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x100000
-CONFIG_EC_GPE_SCI=0x50
-CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
-CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
-CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
-CONFIG_BOARD_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=16384
-CONFIG_ROM_SIZE=0x01000000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
-CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
-CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
-CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x200000
-CONFIG_SMM_MODULE_STACK_SIZE=0x800
-CONFIG_ACPI_BERT_SIZE=0x0
-CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IFD_CHIPSET="sklkbl"
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_MAX_ROOT_PORTS=24
-CONFIG_PCR_BASE_ADDRESS=0xfd000000
-CONFIG_CPU_BCLK_MHZ=100
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
-CONFIG_CPU_XTAL_HZ=24000000
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
-CONFIG_SOC_INTEL_I2C_DEV_MAX=6
-# CONFIG_ENABLE_SATA_TEST_MODE is not set
-CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
-CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
-CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
-CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
-CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
-CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_FSP_PUBLISH_MBP_HOB=y
-CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
-CONFIG_MAX_HECI_DEVICES=5
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_HAVE_PAM0_REGISTER=y
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
-CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
-CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
-CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
-CONFIG_SOC_INTEL_KABYLAKE=y
-CONFIG_FSP_T_LOCATION=0xfffe0000
-CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
-CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_SOC_INTEL_COMMON=y
-
-#
-# Intel SoC Common Code for IP blocks
-#
-CONFIG_SOC_INTEL_COMMON_BLOCK=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
-CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
-# CONFIG_USE_COREBOOT_MP_INIT is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
-CONFIG_INTEL_CAR_NEM_ENHANCED=y
-# CONFIG_USE_INTEL_FSP_MP_INIT is not set
-CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
-CONFIG_HAVE_HYPERTHREADING=y
-# CONFIG_FSP_HYPERTHREADING is not set
-# CONFIG_INTEL_KEYLOCKER is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
-CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
-CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
-CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
-CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
-CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
-CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
-CONFIG_SOC_INTEL_CSE_RW_FILE=""
-CONFIG_SOC_INTEL_CSE_RW_VERSION=""
-CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
-CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
-CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
-CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
-CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
-CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
-CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
-# CONFIG_SOC_INTEL_DISABLE_IGD is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
-CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
-# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
-CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
-CONFIG_SA_ENABLE_DPR=y
-CONFIG_HAVE_CAPID_A_REGISTER=y
-CONFIG_HAVE_BDSM_BGSM_REGISTER=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
-
-#
-# Intel SoC Common PCH Code
-#
-CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
-CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
-CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
-CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
-CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
-CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
-
-#
-# Intel SoC Common coreboot stages and non-IP blocks
-#
-CONFIG_SOC_INTEL_COMMON_BASECODE=y
-CONFIG_SOC_INTEL_COMMON_RESET=y
-CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
-CONFIG_PAVP=y
-# CONFIG_MMA is not set
-CONFIG_SOC_INTEL_COMMON_NHLT=y
-# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_PARALLEL_MP_AP_WORK=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
-CONFIG_H8_HAS_LEDLOGO=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
-CONFIG_UDK_BASE=y
-CONFIG_UDK_2017_BINDING=y
-CONFIG_UDK_2013_VERSION=2013
-CONFIG_UDK_2017_VERSION=2017
-CONFIG_UDK_202005_VERSION=202005
-CONFIG_UDK_202111_VERSION=202111
-CONFIG_UDK_202302_VERSION=202302
-CONFIG_UDK_202305_VERSION=202305
-CONFIG_UDK_VERSION=2017
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
-CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
-CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
-CONFIG_DEFAULT_EBDA_SIZE=0x400
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_HAVE_FSP_GOP=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_RUN_FSP_GOP is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-CONFIG_LINEAR_FRAMEBUFFER=y
-# CONFIG_BOOTSPLASH is not set
-CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y
-# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set
-# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set
-# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set
-CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x10000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-CONFIG_MRC_SETTINGS_PROTECT=y
-# CONFIG_DRIVERS_OPTION_CFR is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-CONFIG_DRIVERS_I2C_DESIGNWARE=y
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_FSP_USE_REPO=y
-# CONFIG_DISPLAY_HOBS is not set
-# CONFIG_DISPLAY_UPD_DATA is not set
-# CONFIG_BMP_LOGO is not set
-CONFIG_PLATFORM_USES_FSP2_0=y
-CONFIG_PLATFORM_USES_FSP2_X86_32=y
-CONFIG_HAVE_INTEL_FSP_REPO=y
-CONFIG_ADD_FSP_BINARIES=y
-CONFIG_FSP_S_CBFS="fsps.bin"
-CONFIG_FSP_M_CBFS="fspm.bin"
-CONFIG_FSP_FULL_FD=y
-CONFIG_FSP_T_RESERVED_SIZE=0x0
-CONFIG_FSP_M_XIP=y
-CONFIG_HAVE_FSP_LOGO_SUPPORT=y
-CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
-CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
-CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
-CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
-# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
-# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Skylake"
-CONFIG_GFX_GMA_PCH="Sunrise_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_USB_ACPI=y
-CONFIG_DRIVERS_WIFI_GENERIC=y
-CONFIG_DRIVERS_MTK_WIFI=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
-# CONFIG_TPM2 is not set
-CONFIG_MAINBOARD_HAS_TPM2=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
-# end of Memory initialization
-
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_CUSTOM_MADT=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_ACPI_LPIT=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_ACPI_S1_NOT_SUPPORTED=y
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_IOAPIC=y
-CONFIG_ACPI_NHLT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
-# CONFIG_DISPLAY_FSP_HEADER is not set
-# CONFIG_VERIFY_HOBS is not set
-# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
-CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
-# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-CONFIG_HAVE_DEBUG_GPIO=y
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_SPD_READ_BY_WORD=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_GENERIC_GPIO_LIB=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
deleted file mode 100644
index 7596816a..00000000
--- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,848 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_LTO is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-CONFIG_OPTION_BACKEND_NONE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOOSTAR is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ARM is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_CWWK is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_ERYING is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_FRAMEWORK is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HARDKERNEL is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LATTEPANDA is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MITAC_COMPUTING is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAPTOR_CS is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_TOPTON is not set
-# CONFIG_VENDOR_UP is not set
-# CONFIG_VENDOR_VIA is not set
-CONFIG_MAINBOARD_FAMILY="T480"
-CONFIG_MAINBOARD_PART_NUMBER="T480"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
-CONFIG_VGA_BIOS_ID="8086,0406"
-CONFIG_DIMM_MAX=2
-CONFIG_DIMM_SPD_SIZE=512
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0xEEC000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y
-CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_VARIANT_DIR="t480"
-CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-# CONFIG_VGA_BIOS is not set
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=256
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-# CONFIG_FATAL_ASSERTS is not set
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
-# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480"
-# CONFIG_CONSOLE_POST is not set
-CONFIG_MAX_SOCKET=1
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_TPM_PIRQ=0x0
-CONFIG_USE_PM_ACPI_TIMER=y
-CONFIG_DCACHE_RAM_BASE=0xfef00000
-CONFIG_DCACHE_RAM_SIZE=0x40000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_USE_LEGACY_8254_TIMER=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t480/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/t480/gbe"
-CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
-CONFIG_HAVE_IFD_BIN=y
-# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
-# CONFIG_BOARD_LENOVO_M920Q is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-CONFIG_BOARD_LENOVO_T480=y
-# CONFIG_BOARD_LENOVO_T480S is not set
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
-CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin"
-CONFIG_TTYS0_BAUD=115200
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
-CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x100000
-CONFIG_EC_GPE_SCI=0x50
-CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
-CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
-CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
-CONFIG_BOARD_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=16384
-CONFIG_ROM_SIZE=0x01000000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
-CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
-CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
-CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x200000
-CONFIG_SMM_MODULE_STACK_SIZE=0x800
-CONFIG_ACPI_BERT_SIZE=0x0
-CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IFD_CHIPSET="sklkbl"
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_MAX_ROOT_PORTS=24
-CONFIG_PCR_BASE_ADDRESS=0xfd000000
-CONFIG_CPU_BCLK_MHZ=100
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
-CONFIG_CPU_XTAL_HZ=24000000
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
-CONFIG_SOC_INTEL_I2C_DEV_MAX=6
-# CONFIG_ENABLE_SATA_TEST_MODE is not set
-CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
-CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
-CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
-CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
-CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
-CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_FSP_PUBLISH_MBP_HOB=y
-CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
-CONFIG_MAX_HECI_DEVICES=5
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_HAVE_PAM0_REGISTER=y
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
-CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
-CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
-CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
-CONFIG_SOC_INTEL_KABYLAKE=y
-CONFIG_FSP_T_LOCATION=0xfffe0000
-CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
-CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_SOC_INTEL_COMMON=y
-
-#
-# Intel SoC Common Code for IP blocks
-#
-CONFIG_SOC_INTEL_COMMON_BLOCK=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
-CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
-# CONFIG_USE_COREBOOT_MP_INIT is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
-CONFIG_INTEL_CAR_NEM_ENHANCED=y
-# CONFIG_USE_INTEL_FSP_MP_INIT is not set
-CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
-CONFIG_HAVE_HYPERTHREADING=y
-# CONFIG_FSP_HYPERTHREADING is not set
-# CONFIG_INTEL_KEYLOCKER is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
-CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
-CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
-CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
-CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
-CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
-CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
-CONFIG_SOC_INTEL_CSE_RW_FILE=""
-CONFIG_SOC_INTEL_CSE_RW_VERSION=""
-CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
-CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
-CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
-CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
-CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
-CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
-CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
-# CONFIG_SOC_INTEL_DISABLE_IGD is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
-CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
-# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
-CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
-CONFIG_SA_ENABLE_DPR=y
-CONFIG_HAVE_CAPID_A_REGISTER=y
-CONFIG_HAVE_BDSM_BGSM_REGISTER=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
-
-#
-# Intel SoC Common PCH Code
-#
-CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
-CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
-CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
-CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
-CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
-CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
-
-#
-# Intel SoC Common coreboot stages and non-IP blocks
-#
-CONFIG_SOC_INTEL_COMMON_BASECODE=y
-CONFIG_SOC_INTEL_COMMON_RESET=y
-CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
-CONFIG_PAVP=y
-# CONFIG_MMA is not set
-CONFIG_SOC_INTEL_COMMON_NHLT=y
-# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_PARALLEL_MP_AP_WORK=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
-CONFIG_H8_HAS_LEDLOGO=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
-CONFIG_UDK_BASE=y
-CONFIG_UDK_2017_BINDING=y
-CONFIG_UDK_2013_VERSION=2013
-CONFIG_UDK_2017_VERSION=2017
-CONFIG_UDK_202005_VERSION=202005
-CONFIG_UDK_202111_VERSION=202111
-CONFIG_UDK_202302_VERSION=202302
-CONFIG_UDK_202305_VERSION=202305
-CONFIG_UDK_VERSION=2017
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
-CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
-CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
-CONFIG_DEFAULT_EBDA_SIZE=0x400
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_HAVE_FSP_GOP=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_RUN_FSP_GOP is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
-CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x10000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-CONFIG_MRC_SETTINGS_PROTECT=y
-# CONFIG_DRIVERS_OPTION_CFR is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-CONFIG_DRIVERS_I2C_DESIGNWARE=y
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_FSP_USE_REPO=y
-# CONFIG_DISPLAY_HOBS is not set
-# CONFIG_DISPLAY_UPD_DATA is not set
-# CONFIG_BMP_LOGO is not set
-CONFIG_PLATFORM_USES_FSP2_0=y
-CONFIG_PLATFORM_USES_FSP2_X86_32=y
-CONFIG_HAVE_INTEL_FSP_REPO=y
-CONFIG_ADD_FSP_BINARIES=y
-CONFIG_FSP_S_CBFS="fsps.bin"
-CONFIG_FSP_M_CBFS="fspm.bin"
-CONFIG_FSP_FULL_FD=y
-CONFIG_FSP_T_RESERVED_SIZE=0x0
-CONFIG_FSP_M_XIP=y
-CONFIG_HAVE_FSP_LOGO_SUPPORT=y
-CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
-CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
-CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
-CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
-# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
-# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Skylake"
-CONFIG_GFX_GMA_PCH="Sunrise_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_VGA=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_USB_ACPI=y
-CONFIG_DRIVERS_WIFI_GENERIC=y
-CONFIG_DRIVERS_MTK_WIFI=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
-# CONFIG_TPM2 is not set
-CONFIG_MAINBOARD_HAS_TPM2=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
-# end of Memory initialization
-
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_CUSTOM_MADT=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_ACPI_LPIT=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_ACPI_S1_NOT_SUPPORTED=y
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_IOAPIC=y
-CONFIG_ACPI_NHLT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
-# CONFIG_DISPLAY_FSP_HEADER is not set
-# CONFIG_VERIFY_HOBS is not set
-# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
-CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
-# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-CONFIG_HAVE_DEBUG_GPIO=y
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_SPD_READ_BY_WORD=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_GENERIC_GPIO_LIB=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t480_fsp_16mb/target.cfg b/config/coreboot/t480_fsp_16mb/target.cfg
deleted file mode 100644
index d0ddd743..00000000
--- a/config/coreboot/t480_fsp_16mb/target.cfg
+++ /dev/null
@@ -1,13 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-tree="next"
-xarch="i386-elf"
-payload_seabios="y"
-payload_grub="y"
-payload_memtest="y"
-grub_scan_disk="nvme ahci"
-grubtree="xhci"
-vcfg="t480"
-build_depend="seabios/default grub/xhci memtest86plus"
-IFD_platform="sklkbl"
-release="n" # t480_vfsp_16mb is released instead
diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
deleted file mode 100644
index 2505b389..00000000
--- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb
+++ /dev/null
@@ -1,855 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_LTO is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-CONFIG_OPTION_BACKEND_NONE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOOSTAR is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ARM is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_CWWK is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_ERYING is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_FRAMEWORK is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HARDKERNEL is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LATTEPANDA is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MITAC_COMPUTING is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAPTOR_CS is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_TOPTON is not set
-# CONFIG_VENDOR_UP is not set
-# CONFIG_VENDOR_VIA is not set
-CONFIG_MAINBOARD_FAMILY="T480S"
-CONFIG_MAINBOARD_PART_NUMBER="T480S"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
-CONFIG_VGA_BIOS_ID="8086,0406"
-CONFIG_DIMM_MAX=2
-CONFIG_DIMM_SPD_SIZE=512
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0xEEC000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
-CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
-CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y
-CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_VARIANT_DIR="t480s"
-CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-# CONFIG_VGA_BIOS is not set
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=256
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-# CONFIG_FATAL_ASSERTS is not set
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
-# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480S"
-# CONFIG_CONSOLE_POST is not set
-CONFIG_MAX_SOCKET=1
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_TPM_PIRQ=0x0
-CONFIG_USE_PM_ACPI_TIMER=y
-CONFIG_DCACHE_RAM_BASE=0xfef00000
-CONFIG_DCACHE_RAM_SIZE=0x40000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_USE_LEGACY_8254_TIMER=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/t480s/ifd_16"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t480s/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/t480s/gbe"
-CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
-CONFIG_HAVE_IFD_BIN=y
-# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
-# CONFIG_BOARD_LENOVO_M920Q is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T480 is not set
-CONFIG_BOARD_LENOVO_T480S=y
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
-CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin"
-CONFIG_TTYS0_BAUD=115200
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
-CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x100000
-CONFIG_EC_GPE_SCI=0x50
-CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
-CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
-CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
-CONFIG_BOARD_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=16384
-CONFIG_ROM_SIZE=0x01000000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
-CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
-CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
-CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x200000
-CONFIG_SMM_MODULE_STACK_SIZE=0x800
-CONFIG_ACPI_BERT_SIZE=0x0
-CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IFD_CHIPSET="sklkbl"
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_MAX_ROOT_PORTS=24
-CONFIG_PCR_BASE_ADDRESS=0xfd000000
-CONFIG_CPU_BCLK_MHZ=100
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
-CONFIG_CPU_XTAL_HZ=24000000
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
-CONFIG_SOC_INTEL_I2C_DEV_MAX=6
-# CONFIG_ENABLE_SATA_TEST_MODE is not set
-CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
-CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
-CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
-CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
-CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
-CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_FSP_PUBLISH_MBP_HOB=y
-CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
-CONFIG_MAX_HECI_DEVICES=5
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_HAVE_PAM0_REGISTER=y
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
-CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
-CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
-CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
-CONFIG_SOC_INTEL_KABYLAKE=y
-CONFIG_FSP_T_LOCATION=0xfffe0000
-CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
-CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_SOC_INTEL_COMMON=y
-
-#
-# Intel SoC Common Code for IP blocks
-#
-CONFIG_SOC_INTEL_COMMON_BLOCK=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
-CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
-# CONFIG_USE_COREBOOT_MP_INIT is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
-CONFIG_INTEL_CAR_NEM_ENHANCED=y
-# CONFIG_USE_INTEL_FSP_MP_INIT is not set
-CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
-CONFIG_HAVE_HYPERTHREADING=y
-# CONFIG_FSP_HYPERTHREADING is not set
-# CONFIG_INTEL_KEYLOCKER is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
-CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
-CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
-CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
-CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
-CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
-CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
-CONFIG_SOC_INTEL_CSE_RW_FILE=""
-CONFIG_SOC_INTEL_CSE_RW_VERSION=""
-CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
-CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
-CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
-CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
-CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
-CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
-CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
-# CONFIG_SOC_INTEL_DISABLE_IGD is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
-CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
-# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
-CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
-CONFIG_SA_ENABLE_DPR=y
-CONFIG_HAVE_CAPID_A_REGISTER=y
-CONFIG_HAVE_BDSM_BGSM_REGISTER=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
-
-#
-# Intel SoC Common PCH Code
-#
-CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
-CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
-CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
-CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
-CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
-CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
-
-#
-# Intel SoC Common coreboot stages and non-IP blocks
-#
-CONFIG_SOC_INTEL_COMMON_BASECODE=y
-CONFIG_SOC_INTEL_COMMON_RESET=y
-CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
-CONFIG_PAVP=y
-# CONFIG_MMA is not set
-CONFIG_SOC_INTEL_COMMON_NHLT=y
-# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_PARALLEL_MP_AP_WORK=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
-CONFIG_H8_HAS_LEDLOGO=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
-CONFIG_UDK_BASE=y
-CONFIG_UDK_2017_BINDING=y
-CONFIG_UDK_2013_VERSION=2013
-CONFIG_UDK_2017_VERSION=2017
-CONFIG_UDK_202005_VERSION=202005
-CONFIG_UDK_202111_VERSION=202111
-CONFIG_UDK_202302_VERSION=202302
-CONFIG_UDK_202305_VERSION=202305
-CONFIG_UDK_VERSION=2017
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
-CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
-CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
-CONFIG_DEFAULT_EBDA_SIZE=0x400
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_HAVE_FSP_GOP=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_RUN_FSP_GOP is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
-CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
-CONFIG_LINEAR_FRAMEBUFFER=y
-# CONFIG_BOOTSPLASH is not set
-CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y
-# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set
-# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set
-# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set
-CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x10000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-CONFIG_MRC_SETTINGS_PROTECT=y
-# CONFIG_DRIVERS_OPTION_CFR is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-CONFIG_DRIVERS_I2C_DESIGNWARE=y
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_FSP_USE_REPO=y
-# CONFIG_DISPLAY_HOBS is not set
-# CONFIG_DISPLAY_UPD_DATA is not set
-# CONFIG_BMP_LOGO is not set
-CONFIG_PLATFORM_USES_FSP2_0=y
-CONFIG_PLATFORM_USES_FSP2_X86_32=y
-CONFIG_HAVE_INTEL_FSP_REPO=y
-CONFIG_ADD_FSP_BINARIES=y
-CONFIG_FSP_S_CBFS="fsps.bin"
-CONFIG_FSP_M_CBFS="fspm.bin"
-CONFIG_FSP_FULL_FD=y
-CONFIG_FSP_T_RESERVED_SIZE=0x0
-CONFIG_FSP_M_XIP=y
-CONFIG_HAVE_FSP_LOGO_SUPPORT=y
-CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
-CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
-CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
-CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
-# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
-# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Skylake"
-CONFIG_GFX_GMA_PCH="Sunrise_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_USB_ACPI=y
-CONFIG_DRIVERS_WIFI_GENERIC=y
-CONFIG_DRIVERS_MTK_WIFI=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
-# CONFIG_TPM2 is not set
-CONFIG_MAINBOARD_HAS_TPM2=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
-# end of Memory initialization
-
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_CUSTOM_MADT=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_ACPI_LPIT=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_ACPI_S1_NOT_SUPPORTED=y
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_IOAPIC=y
-CONFIG_ACPI_NHLT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
-# CONFIG_DISPLAY_FSP_HEADER is not set
-# CONFIG_VERIFY_HOBS is not set
-# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
-CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
-# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-CONFIG_HAVE_DEBUG_GPIO=y
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_SPD_READ_BY_WORD=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_GENERIC_GPIO_LIB=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
deleted file mode 100644
index 407be629..00000000
--- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,848 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_LTO is not set
-# CONFIG_IWYU is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-CONFIG_OPTION_BACKEND_NONE=y
-CONFIG_COMPRESS_RAMSTAGE_LZMA=y
-# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
-CONFIG_SEPARATE_ROMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_USE_QC_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
-# CONFIG_ASAN is not set
-# CONFIG_NO_STAGE_CACHE is not set
-CONFIG_TSEG_STAGE_CACHE=y
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-
-#
-# Software Bill Of Materials (SBOM)
-#
-# CONFIG_SBOM is not set
-# end of Software Bill Of Materials (SBOM)
-# end of General setup
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_51NB is not set
-# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOOSTAR is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ARM is not set
-# CONFIG_VENDOR_ASROCK is not set
-# CONFIG_VENDOR_ASUS is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_BOSTENTECH is not set
-# CONFIG_VENDOR_BYTEDANCE is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_CLEVO is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_CWWK is not set
-# CONFIG_VENDOR_DELL is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_ERYING is not set
-# CONFIG_VENDOR_EXAMPLE is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_FRAMEWORK is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HARDKERNEL is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IBM is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_INVENTEC is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LATTEPANDA is not set
-CONFIG_VENDOR_LENOVO=y
-# CONFIG_VENDOR_LIBRETREND is not set
-# CONFIG_VENDOR_MITAC_COMPUTING is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PINE64 is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PRODRIVE is not set
-# CONFIG_VENDOR_PROTECTLI is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAPTOR_CS is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_STARLABS is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_SYSTEM76 is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_TOPTON is not set
-# CONFIG_VENDOR_UP is not set
-# CONFIG_VENDOR_VIA is not set
-CONFIG_MAINBOARD_FAMILY="T480S"
-CONFIG_MAINBOARD_PART_NUMBER="T480S"
-CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad"
-CONFIG_VGA_BIOS_ID="8086,0406"
-CONFIG_DIMM_MAX=2
-CONFIG_DIMM_SPD_SIZE=512
-CONFIG_FMDFILE=""
-# CONFIG_NO_POST is not set
-CONFIG_MAINBOARD_VENDOR="LENOVO"
-CONFIG_CBFS_SIZE=0xEEC000
-CONFIG_CONSOLE_SERIAL=y
-CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y
-CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y
-CONFIG_MAX_CPUS=8
-# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
-CONFIG_POST_DEVICE=y
-CONFIG_POST_IO=y
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_VARIANT_DIR="t480s"
-CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
-# CONFIG_VGA_BIOS is not set
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=256
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
-# CONFIG_FATAL_ASSERTS is not set
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
-# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480S"
-# CONFIG_CONSOLE_POST is not set
-CONFIG_MAX_SOCKET=1
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_TPM_PIRQ=0x0
-CONFIG_USE_PM_ACPI_TIMER=y
-CONFIG_DCACHE_RAM_BASE=0xfef00000
-CONFIG_DCACHE_RAM_SIZE=0x40000
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
-CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
-CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_USE_LEGACY_8254_TIMER=y
-CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
-CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../../config/ifd/t480s/ifd_16"
-CONFIG_ME_BIN_PATH="../../../vendorfiles/t480s/me.bin"
-CONFIG_GBE_BIN_PATH="../../../config/ifd/t480s/gbe"
-CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
-CONFIG_HAVE_IFD_BIN=y
-# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
-# CONFIG_BOARD_LENOVO_L520 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
-# CONFIG_BOARD_LENOVO_M920Q is not set
-# CONFIG_BOARD_LENOVO_S230U is not set
-# CONFIG_BOARD_LENOVO_T480 is not set
-CONFIG_BOARD_LENOVO_T480S=y
-# CONFIG_BOARD_LENOVO_T400 is not set
-# CONFIG_BOARD_LENOVO_T500 is not set
-# CONFIG_BOARD_LENOVO_R400 is not set
-# CONFIG_BOARD_LENOVO_R500 is not set
-# CONFIG_BOARD_LENOVO_W500 is not set
-# CONFIG_BOARD_LENOVO_T410 is not set
-# CONFIG_BOARD_LENOVO_T420 is not set
-# CONFIG_BOARD_LENOVO_T420S is not set
-# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
-# CONFIG_BOARD_LENOVO_T430S is not set
-# CONFIG_BOARD_LENOVO_T431S is not set
-# CONFIG_BOARD_LENOVO_T520 is not set
-# CONFIG_BOARD_LENOVO_W520 is not set
-# CONFIG_BOARD_LENOVO_T530 is not set
-# CONFIG_BOARD_LENOVO_W530 is not set
-# CONFIG_BOARD_LENOVO_T60 is not set
-# CONFIG_BOARD_LENOVO_Z61T is not set
-# CONFIG_BOARD_LENOVO_R60 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
-# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
-# CONFIG_BOARD_LENOVO_X131E is not set
-# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
-# CONFIG_BOARD_LENOVO_X200 is not set
-# CONFIG_BOARD_LENOVO_X301 is not set
-# CONFIG_BOARD_LENOVO_X201 is not set
-# CONFIG_BOARD_LENOVO_X220 is not set
-# CONFIG_BOARD_LENOVO_X220I is not set
-# CONFIG_BOARD_LENOVO_X1 is not set
-# CONFIG_BOARD_LENOVO_X230 is not set
-# CONFIG_BOARD_LENOVO_X230T is not set
-# CONFIG_BOARD_LENOVO_X230S is not set
-# CONFIG_BOARD_LENOVO_X230_EDP is not set
-# CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
-CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
-CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y
-CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin"
-CONFIG_TTYS0_BAUD=115200
-# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
-CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
-CONFIG_D3COLD_SUPPORT=y
-CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x100000
-CONFIG_EC_GPE_SCI=0x50
-CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
-CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
-CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
-CONFIG_BOARD_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=16384
-CONFIG_ROM_SIZE=0x01000000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
-CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
-# end of Mainboard
-
-CONFIG_SYSTEM_TYPE_LAPTOP=y
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
-CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd"
-CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd"
-CONFIG_CBFS_MCACHE_SIZE=0x4000
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_SMM_TSEG_SIZE=0x800000
-CONFIG_SMM_RESERVED_SIZE=0x200000
-CONFIG_SMM_MODULE_STACK_SIZE=0x800
-CONFIG_ACPI_BERT_SIZE=0x0
-CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
-CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
-CONFIG_ACPI_CPU_STRING="CP%02X"
-CONFIG_STACK_SIZE=0x2000
-CONFIG_IFD_CHIPSET="sklkbl"
-CONFIG_IED_REGION_SIZE=0x400000
-CONFIG_MAX_ROOT_PORTS=24
-CONFIG_PCR_BASE_ADDRESS=0xfd000000
-CONFIG_CPU_BCLK_MHZ=100
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
-CONFIG_CPU_XTAL_HZ=24000000
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
-CONFIG_SOC_INTEL_I2C_DEV_MAX=6
-# CONFIG_ENABLE_SATA_TEST_MODE is not set
-CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
-CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
-CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
-CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
-CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
-CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
-CONFIG_INTEL_GMA_BCLV_WIDTH=16
-CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
-CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_FSP_PUBLISH_MBP_HOB=y
-CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
-CONFIG_MAX_HECI_DEVICES=5
-CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_HAVE_PAM0_REGISTER=y
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
-CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
-CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
-CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
-CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
-CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
-CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
-CONFIG_SOC_INTEL_KABYLAKE=y
-CONFIG_FSP_T_LOCATION=0xfffe0000
-CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
-CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
-CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_SOC_INTEL_COMMON=y
-
-#
-# Intel SoC Common Code for IP blocks
-#
-CONFIG_SOC_INTEL_COMMON_BLOCK=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
-CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
-# CONFIG_USE_COREBOOT_MP_INIT is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
-CONFIG_INTEL_CAR_NEM_ENHANCED=y
-# CONFIG_USE_INTEL_FSP_MP_INIT is not set
-CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
-CONFIG_HAVE_HYPERTHREADING=y
-# CONFIG_FSP_HYPERTHREADING is not set
-# CONFIG_INTEL_KEYLOCKER is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
-# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
-CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
-CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
-CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
-CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
-CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
-CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
-CONFIG_SOC_INTEL_CSE_RW_FILE=""
-CONFIG_SOC_INTEL_CSE_RW_VERSION=""
-CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
-CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
-CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
-CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
-CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
-CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
-CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
-# CONFIG_SOC_INTEL_DISABLE_IGD is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
-CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
-# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
-CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
-CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
-CONFIG_SA_ENABLE_DPR=y
-CONFIG_HAVE_CAPID_A_REGISTER=y
-CONFIG_HAVE_BDSM_BGSM_REGISTER=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
-CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
-
-#
-# Intel SoC Common PCH Code
-#
-CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
-CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
-CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
-CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
-CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
-CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
-
-#
-# Intel SoC Common coreboot stages and non-IP blocks
-#
-CONFIG_SOC_INTEL_COMMON_BASECODE=y
-CONFIG_SOC_INTEL_COMMON_RESET=y
-CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
-CONFIG_PAVP=y
-# CONFIG_MMA is not set
-CONFIG_SOC_INTEL_COMMON_NHLT=y
-# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
-
-#
-# CPU
-#
-CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
-CONFIG_CPU_INTEL_COMMON=y
-CONFIG_ENABLE_VMX=y
-CONFIG_SET_IA32_FC_LOCK_BIT=y
-CONFIG_SET_MSR_AESNI_LOCK_BIT=y
-CONFIG_CPU_INTEL_COMMON_SMM=y
-CONFIG_PARALLEL_MP=y
-CONFIG_PARALLEL_MP_AP_WORK=y
-CONFIG_XAPIC_ONLY=y
-# CONFIG_X2APIC_ONLY is not set
-# CONFIG_X2APIC_RUNTIME is not set
-# CONFIG_X2APIC_LATE_WORKAROUND is not set
-CONFIG_UDELAY_TSC=y
-CONFIG_TSC_MONOTONIC_TIMER=y
-CONFIG_TSC_SYNC_MFENCE=y
-CONFIG_HAVE_SMI_HANDLER=y
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
-CONFIG_AP_STACK_SIZE=0x800
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SSE2=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
-# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-
-#
-# Northbridge
-#
-
-#
-# Southbridge
-#
-# CONFIG_PCIEXP_HOTPLUG is not set
-CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
-CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
-CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
-# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
-CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
-CONFIG_RCBA_LENGTH=0x4000
-
-#
-# Super I/O
-#
-
-#
-# Embedded Controllers
-#
-CONFIG_EC_ACPI=y
-CONFIG_EC_LENOVO_H8=y
-CONFIG_H8_BEEP_ON_DEATH=y
-CONFIG_H8_FLASH_LEDS_ON_DEATH=y
-# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
-# CONFIG_H8_FN_CTRL_SWAP is not set
-CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
-CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
-CONFIG_H8_HAS_LEDLOGO=y
-CONFIG_EC_LENOVO_PMH7=y
-
-#
-# Intel Firmware
-#
-CONFIG_HAVE_ME_BIN=y
-# CONFIG_STITCH_ME_BIN is not set
-# CONFIG_CHECK_ME is not set
-# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
-# CONFIG_USE_ME_CLEANER is not set
-CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
-CONFIG_HAVE_GBE_BIN=y
-# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
-# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
-CONFIG_UNLOCK_FLASH_REGIONS=y
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
-CONFIG_UDK_BASE=y
-CONFIG_UDK_2017_BINDING=y
-CONFIG_UDK_2013_VERSION=2013
-CONFIG_UDK_2017_VERSION=2017
-CONFIG_UDK_202005_VERSION=202005
-CONFIG_UDK_202111_VERSION=202111
-CONFIG_UDK_202302_VERSION=202302
-CONFIG_UDK_202305_VERSION=202305
-CONFIG_UDK_VERSION=2017
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-CONFIG_ARCH_POSTCAR_X86_32=y
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
-CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
-CONFIG_PC80_SYSTEM=y
-CONFIG_POSTCAR_STAGE=y
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-CONFIG_HAVE_CF9_RESET=y
-CONFIG_DEBUG_HW_BREAKPOINTS=y
-CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
-# CONFIG_DUMP_SMBIOS_TYPE17 is not set
-CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
-CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
-CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
-CONFIG_DEFAULT_EBDA_SIZE=0x400
-# end of Chipset
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
-CONFIG_HAVE_FSP_GOP=y
-CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
-CONFIG_MAINBOARD_USE_LIBGFXINIT=y
-# CONFIG_VGA_ROM_RUN is not set
-# CONFIG_RUN_FSP_GOP is not set
-# CONFIG_NO_GFX_INIT is not set
-CONFIG_NO_EARLY_GFX_INIT=y
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
-CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
-# end of Display
-
-CONFIG_PCI=y
-CONFIG_ECAM_MMCONF_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-CONFIG_ECAM_MMCONF_LENGTH=0x10000000
-CONFIG_PCI_ALLOW_BUS_MASTER=y
-CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
-CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
-# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
-# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_INTEL_GMA_HAVE_VBT=y
-CONFIG_INTEL_GMA_ADD_VBT=y
-# CONFIG_SOFTWARE_I2C is not set
-CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
-CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
-# end of Devices
-
-#
-# Generic Drivers
-#
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
-# CONFIG_DRIVERS_EFI_FW_INFO is not set
-# CONFIG_ELOG is not set
-CONFIG_CACHE_MRC_SETTINGS=y
-CONFIG_MRC_SETTINGS_PROTECT=y
-# CONFIG_DRIVERS_OPTION_CFR is not set
-# CONFIG_SMMSTORE is not set
-CONFIG_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
-# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
-# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
-CONFIG_DRIVERS_I2C_DESIGNWARE=y
-# CONFIG_DRIVERS_I2C_MAX98396 is not set
-CONFIG_FSP_USE_REPO=y
-# CONFIG_DISPLAY_HOBS is not set
-# CONFIG_DISPLAY_UPD_DATA is not set
-# CONFIG_BMP_LOGO is not set
-CONFIG_PLATFORM_USES_FSP2_0=y
-CONFIG_PLATFORM_USES_FSP2_X86_32=y
-CONFIG_HAVE_INTEL_FSP_REPO=y
-CONFIG_ADD_FSP_BINARIES=y
-CONFIG_FSP_S_CBFS="fsps.bin"
-CONFIG_FSP_M_CBFS="fspm.bin"
-CONFIG_FSP_FULL_FD=y
-CONFIG_FSP_T_RESERVED_SIZE=0x0
-CONFIG_FSP_M_XIP=y
-CONFIG_HAVE_FSP_LOGO_SUPPORT=y
-CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
-CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
-CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
-CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
-# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
-# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
-CONFIG_INTEL_INT15=y
-CONFIG_INTEL_GMA_ACPI=y
-CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
-# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
-# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
-CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
-CONFIG_GFX_GMA=y
-CONFIG_GFX_GMA_DYN_CPU=y
-CONFIG_GFX_GMA_GENERATION="Skylake"
-CONFIG_GFX_GMA_PCH="Sunrise_Point"
-CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
-CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
-# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_USE_PC_CMOS_ALTCENTURY=y
-CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
-CONFIG_MEMORY_MAPPED_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_VGA=y
-# CONFIG_DRIVERS_SIL_3114 is not set
-CONFIG_DRIVERS_USB_ACPI=y
-CONFIG_DRIVERS_WIFI_GENERIC=y
-CONFIG_DRIVERS_MTK_WIFI=y
-# end of Generic Drivers
-
-#
-# Security
-#
-
-#
-# CBFS verification
-#
-# CONFIG_CBFS_VERIFICATION is not set
-# end of CBFS verification
-
-#
-# Verified Boot (vboot)
-#
-# end of Verified Boot (vboot)
-
-#
-# Trusted Platform Module
-#
-CONFIG_NO_TPM=y
-# CONFIG_TPM1 is not set
-# CONFIG_TPM2 is not set
-CONFIG_MAINBOARD_HAS_TPM2=y
-CONFIG_PCR_BOOT_MODE=1
-CONFIG_PCR_HWID=1
-CONFIG_PCR_SRTM=2
-CONFIG_PCR_FW_VER=10
-CONFIG_PCR_RUNTIME_DATA=3
-# end of Trusted Platform Module
-
-#
-# Memory initialization
-#
-CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
-# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
-# end of Memory initialization
-
-# CONFIG_STM is not set
-# CONFIG_INTEL_CBNT_SUPPORT is not set
-CONFIG_BOOTMEDIA_LOCK_NONE=y
-# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
-# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
-# CONFIG_BOOTMEDIA_SMM_BWP is not set
-# end of Security
-
-CONFIG_ACPI_HAVE_PCAT_8259=y
-CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
-CONFIG_ACPI_SOC_NVS=y
-CONFIG_ACPI_CUSTOM_MADT=y
-CONFIG_ACPI_NO_CUSTOM_MADT=y
-CONFIG_ACPI_COMMON_MADT_LAPIC=y
-CONFIG_ACPI_COMMON_MADT_IOAPIC=y
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_ACPI_LPIT=y
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_RTC=y
-
-#
-# Console
-#
-CONFIG_BOOTBLOCK_CONSOLE=y
-CONFIG_POSTCAR_CONSOLE=y
-CONFIG_SQUELCH_EARLY_SMP=y
-
-#
-# I/O mapped, 8250-compatible
-#
-CONFIG_TTYS0_BASE=0x3f8
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_LCS=3
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_CONSOLE_I2C_SMBUS is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
-CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-CONFIG_HWBASE_DEBUG_CB=y
-# end of Console
-
-CONFIG_ACPI_S1_NOT_SUPPORTED=y
-CONFIG_HAVE_ACPI_RESUME=y
-CONFIG_RESUME_PATH_SAME_AS_BOOT=y
-CONFIG_HAVE_MONOTONIC_TIMER=y
-CONFIG_IOAPIC=y
-CONFIG_ACPI_NHLT=y
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLES=y
-CONFIG_BIOS_VENDOR="coreboot"
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-# end of System tables
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# end of Payload
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-# CONFIG_DISPLAY_MTRRS is not set
-
-#
-# Vendorcode Debug Settings
-#
-
-#
-# BLOB Debug Settings
-#
-# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
-# CONFIG_DISPLAY_FSP_HEADER is not set
-# CONFIG_VERIFY_HOBS is not set
-# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
-CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
-# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-CONFIG_HAVE_DEBUG_GPIO=y
-# CONFIG_DEBUG_GPIO is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-CONFIG_HAVE_EM100_SUPPORT=y
-# CONFIG_EM100 is not set
-# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
-# end of Debugging
-
-CONFIG_RAMSTAGE_ADA=y
-CONFIG_RAMSTAGE_LIBHWBASE=y
-CONFIG_SPD_READ_BY_WORD=y
-CONFIG_HWBASE_DYNAMIC_MMIO=y
-CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
-CONFIG_HWBASE_DIRECT_PCIDEV=y
-CONFIG_DECOMPRESS_OFAST=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-CONFIG_MAX_REBOOT_CNT=3
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_GENERIC_GPIO_LIB=y
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t480s_fsp_16mb/target.cfg b/config/coreboot/t480s_fsp_16mb/target.cfg
deleted file mode 100644
index 855b0c70..00000000
--- a/config/coreboot/t480s_fsp_16mb/target.cfg
+++ /dev/null
@@ -1,13 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-tree="next"
-xarch="i386-elf"
-payload_seabios="y"
-payload_grub="y"
-payload_memtest="y"
-grub_scan_disk="nvme ahci"
-grubtree="xhci"
-vcfg="t480s"
-build_depend="seabios/default grub/xhci memtest86plus"
-IFD_platform="sklkbl"
-release="n" # t480s_vfsp_16mb is released instead

From 70cef71dbab96c4ea0134aa08c7ed91c42e19234 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 4 Apr 2025 13:57:09 +0100
Subject: [PATCH 1107/1549] grub/xhci: Remove unused patch

I was importing a patch for the z790 boards, but
Libreboot doesn't support this board yet, and the
patch was a hack that may affect other boards.

When I do later merge that board, and I find that the
hack is needed, I'll simply make another grub tree
within lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...nd-z790-non-root-hub-speed-detection.patch | 28 -------------------
 1 file changed, 28 deletions(-)
 delete mode 100644 config/grub/xhci/patches/0023-xhci-workaround-z790-non-root-hub-speed-detection.patch

diff --git a/config/grub/xhci/patches/0023-xhci-workaround-z790-non-root-hub-speed-detection.patch b/config/grub/xhci/patches/0023-xhci-workaround-z790-non-root-hub-speed-detection.patch
deleted file mode 100644
index f07500fd..00000000
--- a/config/grub/xhci/patches/0023-xhci-workaround-z790-non-root-hub-speed-detection.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 70731c46da05311edb639ce1349bb6dd3279031e Mon Sep 17 00:00:00 2001
-From: Sven Anderson <sven@anderson.de>
-Date: Mon, 13 Jan 2025 19:55:15 +0100
-Subject: [PATCH 23/26] xhci: workaround z790 non-root-hub speed detection
-
----
- grub-core/bus/usb/xhci.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c
-index dc89b9619..d13a7c39d 100644
---- a/grub-core/bus/usb/xhci.c
-+++ b/grub-core/bus/usb/xhci.c
-@@ -2285,6 +2285,11 @@ grub_xhci_detect_dev (grub_usb_controller_t dev, int port, int *changed)
-   if (!(portsc & GRUB_XHCI_PORTSC_CCS))
-     return GRUB_USB_SPEED_NONE;
- 
-+  if (port == 4 || port == 12 && speed < XHCI_USB_HIGHSPEED) { // inital hub speed detection on Z790 is too low
-+    grub_dprintf("xhci", "%s: setting internal hub speed to high\n", __func__);
-+    return GRUB_USB_SPEED_HIGH;
-+  }
-+
-   for (grub_uint8_t i = 0; i < 16 && x->psids[port].psids[i].id > 0; i++)
-     {
-       if (x->psids[port].psids[i].id == speed)
--- 
-2.39.5
-

From 5ebcae5235f6b4ec0781c34a7faef2bbbdc901e4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 6 Apr 2025 23:17:33 +0100
Subject: [PATCH 1108/1549] lbmk: minor code formatting cleanup

some lines were needlessly condensed, and less readable

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             | 25 ++++++++++++++++------
 include/git.sh    |  6 ++++--
 include/rom.sh    |  3 ++-
 include/vendor.sh |  8 +++++--
 script/trees      | 54 ++++++++++++++++++++++++++++++++++-------------
 5 files changed, 69 insertions(+), 27 deletions(-)

diff --git a/build b/build
index 2e04f59f..7a3ec3e9 100755
--- a/build
+++ b/build
@@ -20,8 +20,13 @@ err="fail"
 main()
 {
 	[ $# -lt 1 ] && $err "bad command"
-	spath="script/$1"; shcmd="shift 1"
-	[ "${1#-*}" != "$1" ] && spath="script/trees" && shcmd=":"
+
+	spath="script/$1"
+	shcmd="shift 1"
+	if [ "${1#-*}" != "$1" ]; then
+		spath="script/trees"
+		shcmd=":"
+	fi
 
 	for g in "command -v git" "git config --global user.name" \
 	    "git config --global user.email" "git_init"; do
@@ -34,12 +39,16 @@ main()
 	inject) shift 1; vendor_inject "$@" ;;
 	download) shift 1; vendor_download "$@" ;;
 	roms)
-		[ $# -gt 1 ] && [ "$2" = "serprog" ] && \
-		    mk -b stm32-vserprog pico-serprog && return 0
-		shift 1; x_ ./mk -b coreboot "$@" ;;
+		if [ $# -gt 1 ] && [ "$2" = "serprog" ]; then
+			mk -b stm32-vserprog pico-serprog
+			return 0
+		fi
+		shift 1
+		x_ ./mk -b coreboot "$@" ;;
 	*)
 		[ -f "$spath" ] || $err "bad command"
-		$shcmd; "$spath" "$@" || $err "excmd: $spath $(echo "$@")" ;;
+		$shcmd
+		"$spath" "$@" || $err "excmd: $spath $(echo "$@")" ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
 }
@@ -89,7 +98,9 @@ build_release()
 {
 	(
 	cd "$srcdir" || $err "$vdir: !cd \"$srcdir\""
-	./mk -f; x_ rm -Rf tmp; rmgit .
+	./mk -f
+	x_ rm -Rf tmp
+	rmgit .
 	x_ mv src/docs docs
 	) || $err "can't create release files"
 
diff --git a/include/git.sh b/include/git.sh
index 21a1f3b7..e5aa4861 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -51,12 +51,14 @@ git_prep()
 
 	chkvars rev; tmpclone "$1" "$2" "$tmpgit" "$rev" "$_patchdir"
 	if singletree "$project" || [ $# -gt 4 ]; then
-		prep_submodules "$_loc"; fi
+		prep_submodules "$_loc"
+	fi
 
 	[ "$project" = "coreboot" ] && [ -n "$xtree" ] && [ $# -gt 2 ] && \
 	    [ "$xtree" != "$tree" ] && link_crossgcc "$_loc"
 	[ "$XBMK_RELEASE" = "y" ] && \
-	    [ "$_loc" != "$XBMK_CACHE/repo/$project" ] && rmgit "$tmpgit"
+	    [ "$_loc" != "$XBMK_CACHE/repo/$project" ] && \
+	    rmgit "$tmpgit"
 
 	move_repo "$_loc"
 }
diff --git a/include/rom.sh b/include/rom.sh
index 3e8c9c9b..dde17b69 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -119,7 +119,8 @@ mkcorebootbin()
 	tmprom="$TMPDIR/coreboot.rom"
 	$dry x_ cp "$srcdir/build/coreboot.rom" "$tmprom"
 
-	initmode="${defconfig##*/}"; displaymode="${initmode##*_}"
+	initmode="${defconfig##*/}"
+	displaymode="${initmode##*_}"
 	[ "$displaymode" = "$initmode" ] && displaymode="" # "normal" config
 	initmode="${initmode%%_*}"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
diff --git a/include/vendor.sh b/include/vendor.sh
index fb7d7cdf..018e734b 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -110,6 +110,7 @@ getfiles()
 fetch()
 {
 	dl_type="$1"; dl="$2"; dl_bkup="$3"; dlsum="$4"; _dest="${5##*../}"
+
 	[ "$5" = "/dev/null" ] && return 0; _dl="$XBMK_CACHE/file/$dlsum"
 	if [ "$dl_type" = "fspm" ] || [ "$dl_type" = "fsps" ]; then
 		# HACK: if grabbing fsp from coreboot, fix the path for lbmk
@@ -559,7 +560,9 @@ patch_release_roms()
 
 process_release_rom()
 {
-	_xrom="$1"; _xromname="${1##*/}"
+	_xrom="$1"
+	_xromname="${1##*/}"
+
 	[ -L "$_xrom" ] && \
 	    $err "$archive -> '${_xrom#"tmp/DO_NOT_FLASH/"}' is a symlink"
 	[ -f "$_xrom" ] || return 0
@@ -709,7 +712,8 @@ inject()
 	else
 		"$cbfstool" "$rom" add -f "$_dest" -n "$cbfsname" \
 		    -t $_t $_offset || $err "$rom !add $_t ($_dest)"
-	fi; xchanged="y"; :
+	fi
+	xchanged="y"; :
 }
 
 modify_mac_addresses()
diff --git a/script/trees b/script/trees
index 43cd39cc..0b6f9fba 100755
--- a/script/trees
+++ b/script/trees
@@ -22,6 +22,7 @@ main()
 	while getopts f:b:m:u:c:x:s:l:n:d: option; do
 		[ -n "$_f" ] && $err "only one flag is permitted"
 		_f="$1" && [ "$_f" = "-d" ] && dry=":"
+
 		case "$1" in
 		-d) mode="" ;;
 		-b) mode="" ;;
@@ -35,23 +36,36 @@ main()
 		-n) mode="nconfig" ;;
 		*) $err "invalid option '-$option'" ;;
 		esac
-		[ -z "${OPTARG+x}" ] && shift 1 && break
-		project="${OPTARG#src/}"; shift 2
+
+		if [ -z "${OPTARG+x}" ]; then
+			shift 1
+			break
+		fi
+
+		project="${OPTARG#src/}"
+		shift 2
 	done
 	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
-	[ -z "$project" ] && mk $_f $(ls -1 config/git) && return 1
+	if [ -z "$project" ]; then
+		mk $_f $(ls -1 config/git)
+		return 1
+	fi
 
 	[ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined"
 
 	for d in "elf" "config/data" "config" "src"; do
 		eval "${d#*/}dir=\"$d/$project\""
-	done; dest_dir="$elfdir"
+	done
+	dest_dir="$elfdir"
+
 	listfile="$datadir/build.list"
 	[ -f "$listfile" ] || listfile="" # optional on all projects
 
 	mkhelpercfg="$datadir/mkhelper.cfg"
-	e "$mkhelpercfg" f missing && mkhelpercfg="$TMPDIR/mkhelper.cfg" && \
-	    x_ touch "$mkhelpercfg"
+	if e "$mkhelpercfg" f missing; then
+		mkhelpercfg="$TMPDIR/mkhelper.cfg"
+		x_ touch "$mkhelpercfg"
+	fi
 
 	targets="$*"; cmd="build_targets $targets"
 	singletree "$project" && cmd="build_project"
@@ -118,12 +132,15 @@ configure_project()
 	eval "`setvars "" cleanargs build_depend autoconfargs xtree postmake \
 	    tree_depend makeargs btype mkhelper bootstrapargs premake release \
 	    xarch xlang`"
-	_tcfg="$1/target.cfg"; badhash="n"; [ -f "$_tcfg" ] || btype="auto"
+	_tcfg="$1/target.cfg"
+	badhash="n"
+	[ -f "$_tcfg" ] || btype="auto"
 	[ -f "$datadir/mkhelper.cfg" ] && \
 	    eval "`setcfg "$datadir/mkhelper.cfg"`"
 
 	while [ -f "$_tcfg" ] || [ "$cmd" != "build_project" ]; do
-		eval "`setvars "" rev tree`"; eval "`setcfg "$_tcfg"`"
+		eval "`setvars "" rev tree`"
+		eval "`setcfg "$_tcfg"`"
 		printf "Loading %s config: %s\n" "$project" "$_tcfg"
 
 		[ "$_f" = "-d" ] && build_depend="" # dry run
@@ -131,7 +148,8 @@ configure_project()
 		[ "$mode" = "fetch" ] || break
 
 		[ "${_tcfg%/*/target.cfg}" = "${_tcfg%"/$tree/target.cfg"}" ] \
-		    && break; _tcfg="${_tcfg%/*/target.cfg}/$tree/target.cfg"
+		    && break
+		_tcfg="${_tcfg%/*/target.cfg}/$tree/target.cfg"
 	done
 	[ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1
 	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
@@ -141,15 +159,19 @@ configure_project()
 	[ -n "$tree" ] && mdir="$mdir/$tree"
 	[ -f "CHANGELOG" ] || check_project_hashes
 
-	[ "$mode" = "fetch" ] || x_ ./mk -f "$project" "$target"
-	[ "$mode" = "fetch" ] || return 0
-	[ -f "CHANGELOG" ] && return 1; fetch_${cmd#build_}; return 1
+	if [ "$mode" != "fetch" ]; then
+		x_ ./mk -f "$project" "$target"
+		return 0
+	fi
+	[ -f "CHANGELOG" ] || fetch_${cmd#build_}
+	return 1
 }
 
 build_dependencies()
 {
 	for bd in $build_depend; do
-		bd_p="${bd%%/*}"; bd_t="${bd##*/}"
+		bd_p="${bd%%/*}"
+		bd_t="${bd##*/}"
 		[ -z "$bd_p" ] && $dry $err "$project/$tree: !bd '$bd'"
 		[ "${bd##*/}" = "$bd" ] && bd_t=""
 		[ -z "$bd_p" ] || $dry ./mk -b $bd_p $bd_t \
@@ -160,7 +182,8 @@ build_dependencies()
 check_project_hashes()
 {
 	mkdir -p "$XBMK_CACHE/hash" || $err "!mkdir '$XBMK_CACHE/hash'"
-	old_pjhash=""; [ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
+	old_pjhash=""
+	[ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
 	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
 
 	x_ rm -f "$TMPDIR/project.list" "$TMPDIR/project.hash" \
@@ -171,7 +194,8 @@ check_project_hashes()
 		[ -d "$rmchk" ] || continue
 		find "$rmchk" -type f -not -path "*/.git*/*" >> \
 		    "$TMPDIR/project.tmp" || $err "!find $rmchk > project.tmp"
-	done; sort "$TMPDIR/project.tmp" > "$TMPDIR/project.list" || \
+	done
+	sort "$TMPDIR/project.tmp" > "$TMPDIR/project.list" || \
 	    $err "!sort project tmp/list"
 
 	while read -r rmchk; do

From c4cd876c609631fa88066cc30f31b62d7c138635 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 9 Apr 2025 09:38:59 +0100
Subject: [PATCH 1109/1549] trees: Add missing flag to error output

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index 0b6f9fba..3b4cce15 100755
--- a/script/trees
+++ b/script/trees
@@ -45,7 +45,7 @@ main()
 		project="${OPTARG#src/}"
 		shift 2
 	done
-	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
+	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n/-d)"
 	if [ -z "$project" ]; then
 		mk $_f $(ls -1 config/git)
 		return 1

From d0bd12631a6bb4d3035fa85e4446d128de803b0f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 11 Apr 2025 04:44:24 +0100
Subject: [PATCH 1110/1549] trees: don't abuse the mode variable on -f

The "mode" variable is used as a suffix for make commands,
for example ./mk -m sets mode to "menuconfig", which means
you want to run "make menuconfig".

When fetching sources (./mk -f), I was setting mode to "fetch",
and putting checks in code to avoid use of make when mode was
set to "fetch".

The behaviour now is identical, except that a new variable
called "do_make" is set to "n" when doing ./mk -f, otherwise
set to "y", and this is checked instead. This should make
the meaning of the code somewhat clearer.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index 3b4cce15..1907dea9 100755
--- a/script/trees
+++ b/script/trees
@@ -17,6 +17,10 @@ eval "`setvars "" xarch srcdir premake gnatdir xlang mode makeargs elfdir cmd \
     defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs gccver gccfull \
     gnatver gnatfull gccdir cmakedir`"; badhash="n"
 
+# ./mk -f will set this to "n", thus
+# disabling the use of make commands
+do_make="y"
+
 main()
 {
 	while getopts f:b:m:u:c:x:s:l:n:d: option; do
@@ -30,7 +34,7 @@ main()
 		-m) mode="menuconfig" ;;
 		-c) mode="distclean" ;;
 		-x) mode="crossgcc-clean" ;;
-		-f) mode="fetch" ;;
+		-f) do_make="n"	 ;;
 		-s) mode="savedefconfig" ;;
 		-l) mode="olddefconfig" ;;
 		-n) mode="nconfig" ;;
@@ -145,7 +149,7 @@ configure_project()
 
 		[ "$_f" = "-d" ] && build_depend="" # dry run
 		[ "$cmd" = "build_project" ] && break
-		[ "$mode" = "fetch" ] || break
+		[ "$do_make" = "y" ] && break
 
 		[ "${_tcfg%/*/target.cfg}" = "${_tcfg%"/$tree/target.cfg"}" ] \
 		    && break
@@ -159,7 +163,7 @@ configure_project()
 	[ -n "$tree" ] && mdir="$mdir/$tree"
 	[ -f "CHANGELOG" ] || check_project_hashes
 
-	if [ "$mode" != "fetch" ]; then
+	if [ "$do_make" = "y" ]; then
 		x_ ./mk -f "$project" "$target"
 		return 0
 	fi

From c7636ff1dfc4f4006ded8664d598b2d9f0458ef7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 11 Apr 2025 13:39:55 +0100
Subject: [PATCH 1111/1549] trees: initialise mode to "all", not ""

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 1 +
 1 file changed, 1 insertion(+)

diff --git a/script/trees b/script/trees
index 1907dea9..d1aa6feb 100755
--- a/script/trees
+++ b/script/trees
@@ -20,6 +20,7 @@ eval "`setvars "" xarch srcdir premake gnatdir xlang mode makeargs elfdir cmd \
 # ./mk -f will set this to "n", thus
 # disabling the use of make commands
 do_make="y"
+mode="all" # make all
 
 main()
 {

From 33bb0ecf7640f6fea9c1d90939a40167f59e5907 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 11 Apr 2025 14:09:36 +0100
Subject: [PATCH 1112/1549] trees: clean up initialisation of the dry variable

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index d1aa6feb..ee3d2ee0 100755
--- a/script/trees
+++ b/script/trees
@@ -26,10 +26,12 @@ main()
 {
 	while getopts f:b:m:u:c:x:s:l:n:d: option; do
 		[ -n "$_f" ] && $err "only one flag is permitted"
-		_f="$1" && [ "$_f" = "-d" ] && dry=":"
+		_f="$1"
 
-		case "$1" in
-		-d) mode="" ;;
+		case "$_f" in
+		-d)
+			mode=""
+			dry=":" ;;
 		-b) mode="" ;;
 		-u) mode="oldconfig" ;;
 		-m) mode="menuconfig" ;;

From edbbde0b12d55b1277ed41ef0fcd15c287270f43 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 11 Apr 2025 14:11:24 +0100
Subject: [PATCH 1113/1549] trees: set dry=":" on ./mk -f

We don't want any build commands to run, when
the -f flag is used.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index ee3d2ee0..306f189f 100755
--- a/script/trees
+++ b/script/trees
@@ -37,7 +37,9 @@ main()
 		-m) mode="menuconfig" ;;
 		-c) mode="distclean" ;;
 		-x) mode="crossgcc-clean" ;;
-		-f) do_make="n"	 ;;
+		-f)
+			do_make="n"
+			dry=":" ;;
 		-s) mode="savedefconfig" ;;
 		-l) mode="olddefconfig" ;;
 		-n) mode="nconfig" ;;

From 947c3e1a1766eb67d07a4d529fc20269ad71bee3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 11 Apr 2025 14:17:12 +0100
Subject: [PATCH 1114/1549] trees: err if no argument given

We were already covering this from the main build
script, but it's good to also check it here.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/script/trees b/script/trees
index 306f189f..f224f94f 100755
--- a/script/trees
+++ b/script/trees
@@ -24,6 +24,8 @@ mode="all" # make all
 
 main()
 {
+	[ $# -lt 1 ] && $err "No argument provided"
+
 	while getopts f:b:m:u:c:x:s:l:n:d: option; do
 		[ -n "$_f" ] && $err "only one flag is permitted"
 		_f="$1"

From 8ccb61cc718fac3e4f62be772a3540b5aba2098c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 11 Apr 2025 14:21:39 +0100
Subject: [PATCH 1115/1549] trees: err if first argument is not a flag

E.g. ./mk -f coreboot is valid

./mk coreboot -f is not valid

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index f224f94f..d53dd4f7 100755
--- a/script/trees
+++ b/script/trees
@@ -22,9 +22,13 @@ eval "`setvars "" xarch srcdir premake gnatdir xlang mode makeargs elfdir cmd \
 do_make="y"
 mode="all" # make all
 
+flags="-m/-u/-b/-c/-x/-f/-s/-l/-n/-d"
+
 main()
 {
 	[ $# -lt 1 ] && $err "No argument provided"
+	[ "${1%-*}" = "$1" ] && $err \
+	    "First argument must be a flag ($flags)"
 
 	while getopts f:b:m:u:c:x:s:l:n:d: option; do
 		[ -n "$_f" ] && $err "only one flag is permitted"
@@ -56,7 +60,7 @@ main()
 		project="${OPTARG#src/}"
 		shift 2
 	done
-	[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n/-d)"
+	[ -z "$_f" ] && $err "missing flag ($flags)"
 	if [ -z "$project" ]; then
 		mk $_f $(ls -1 config/git)
 		return 1

From f98b9b0110770f5381055fbaa20610130131df62 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 11 Apr 2025 17:15:00 +0100
Subject: [PATCH 1116/1549] clean up a few semicolons in the build system

several code lines were condensed together, which
make them less readable. make the code more readable
by having separate commands on separate lines.

i previously did this during my manic build system
audits of 2023 and 2024; condensing lines like this
is overly pedantic and serves no real purpose.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build             | 12 +++++++++---
 include/git.sh    | 20 ++++++++++++--------
 include/lib.sh    | 27 ++++++++++++++++----------
 include/mrc.sh    |  4 ++--
 include/rom.sh    | 16 +++++++++-------
 include/vendor.sh | 45 ++++++++++++++++++++++++++++++--------------
 script/trees      | 48 ++++++++++++++++++++++++++++-------------------
 7 files changed, 109 insertions(+), 63 deletions(-)

diff --git a/build b/build
index 7a3ec3e9..f61018c6 100755
--- a/build
+++ b/build
@@ -35,9 +35,15 @@ main()
 
 	case "${spath#script/}" in
 	version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
-	release) shift 1; mkrelease "$@" ;;
-	inject) shift 1; vendor_inject "$@" ;;
-	download) shift 1; vendor_download "$@" ;;
+	release)
+		shift 1
+		mkrelease "$@" ;;
+	inject)
+		shift 1
+		vendor_inject "$@" ;;
+	download)
+		shift 1
+		vendor_download "$@" ;;
 	roms)
 		if [ $# -gt 1 ] && [ "$2" = "serprog" ]; then
 			mk -b stm32-vserprog pico-serprog
diff --git a/include/git.sh b/include/git.sh
index e5aa4861..1933a4ec 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -13,7 +13,8 @@ fetch_targets()
 
 	printf "Creating %s tree %s\n" "$project" "$tree"
 	git_prep "$loc" "$loc" "$PWD/$configdir/$tree/patches" \
-	    "src/$project/$tree" u; nuke "$project/$tree" "$project/$tree"
+	    "src/$project/$tree" u
+	nuke "$project/$tree" "$project/$tree"
 }
 
 fetch_project()
@@ -47,9 +48,11 @@ clone_project()
 
 git_prep()
 {
-	_patchdir="$3"; _loc="$4" # $1 and $2 are gitrepo and gitrepo_backup
+	_patchdir="$3"
+	_loc="$4" # $1 and $2 are gitrepo and gitrepo_backup
 
-	chkvars rev; tmpclone "$1" "$2" "$tmpgit" "$rev" "$_patchdir"
+	chkvars rev
+	tmpclone "$1" "$2" "$tmpgit" "$rev" "$_patchdir"
 	if singletree "$project" || [ $# -gt 4 ]; then
 		prep_submodules "$_loc"
 	fi
@@ -67,7 +70,7 @@ prep_submodules()
 {
 	[ -f "$mdir/module.list" ] && while read -r msrcdir; do
 		fetch_submodule "$msrcdir"
-	done < "$mdir/module.list"; return 0
+	done < "$mdir/module.list"; :
 }
 
 fetch_submodule()
@@ -125,10 +128,11 @@ tmpclone()
 git_am_patches()
 {
 	for p in "$2/"*; do
-		[ -L "$p" ] && continue; [ -e "$p" ] || continue
+		[ -L "$p" ] && continue
+		[ -e "$p" ] || continue
 		[ -d "$p" ] && git_am_patches "$1" "$p" && continue
 		[ ! -f "$p" ] || git -C "$1" am "$p" || $err "$1 $2: !am $p"
-	done; return 0
+	done; :
 }
 
 link_crossgcc()
@@ -136,7 +140,7 @@ link_crossgcc()
 	(
 	x_ cd "$tmpgit/util" && x_ rm -Rf crossgcc
 	ln -s "../../$xtree/util/crossgcc" crossgcc || $err "$1: !xgcc link"
-	) || $err "$1: !xgcc link"
+	) || $err "$1: !xgcc link"; :
 }
 
 move_repo()
@@ -152,5 +156,5 @@ nuke()
 	e "config/${1%/}/nuke.list" f missing || while read -r nukefile; do
 		rmf="src/${2%/}/$nukefile" && [ -L "$rmf" ] && continue
 		e "$rmf" e missing || rm -Rf "$rmf" || $err "!rm $rmf, ${2%/}"
-	done < "config/${1%/}/nuke.list"; return 0
+	done < "config/${1%/}/nuke.list"; :
 }
diff --git a/include/lib.sh b/include/lib.sh
index b43d83f3..31c9fd02 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -17,7 +17,8 @@ err="err_"
 
 err_()
 {
-	printf "ERROR %s: %s\n" "$0" "$1" 1>&2; exit 1
+	printf "ERROR %s: %s\n" "$0" "$1" 1>&2
+	exit 1
 }
 
 setvars()
@@ -25,14 +26,15 @@ setvars()
 	_setvars="" && [ $# -lt 2 ] && $err "setvars: too few arguments"
 	val="$1" && shift 1 && for var in "$@"; do
 		_setvars="$var=\"$val\"; $_setvars"
-	done; printf "%s\n" "${_setvars% }"
+	done
+	printf "%s\n" "${_setvars% }"
 }
 chkvars()
 {
 	for var in "$@"; do
 		eval "[ -n \"\${$var+x}\" ] || \$err \"$var unset\""
 		eval "[ -n \"\$$var\" ] || \$err \"$var unset\""
-	done; return 0
+	done; :
 }
 
 eval "`setvars "" _nogit board reinstall versiondate projectsite projectname \
@@ -40,7 +42,8 @@ eval "`setvars "" _nogit board reinstall versiondate projectsite projectname \
 
 for fv in projectname projectsite version versiondate; do
 	eval "[ ! -f \"$fv\" ] || read -r $fv < \"$fv\" || :"
-done; chkvars projectname projectsite
+done
+chkvars projectname projectsite
 
 setcfg()
 {
@@ -57,7 +60,8 @@ e()
 	estr="[ -$es_t \"\$1\" ] || return 1"
 	[ $# -gt 2 ] && estr="[ -$es_t \"\$1\" ] && return 1" && es2="missing"
 
-	eval "$estr"; printf "%s %s\n" "$1" "$es2" 1>&2
+	eval "$estr"
+	printf "%s %s\n" "$1" "$es2" 1>&2
 }
 
 install_packages()
@@ -140,7 +144,7 @@ expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
 
 x_() {
 	[ $# -lt 1 ] || "$@" || \
-	    $err "Unhandled non-zero exit: $(echo "$@")"; return 0
+	    $err "Unhandled non-zero exit: $(echo "$@")"; :
 }
 
 [ -e ".git" ] || [ -f "version" ] || printf "unknown\n" > version || \
@@ -155,7 +159,8 @@ versiondate_="$versiondate"
 [ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
     --pretty='%ct' HEAD)" || versiondate="$versiondate_"
 for p in projectname version versiondate projectsite; do
-	chkvars "$p"; eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
+	chkvars "$p"
+	eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
 done
 relname="$projectname-$version"
 export LOCALVERSION="-$projectname-${version%%-*}"
@@ -165,7 +170,7 @@ check_defconfig()
 	[ -d "$1" ] || $err "Target '$1' not defined."
 	for x in "$1"/config/*; do
 		[ -f "$x" ] && printf "%s\n" "$x" && return 1
-	done; return 0
+	done; :
 }
 
 remkdir()
@@ -180,7 +185,8 @@ mkrom_tarball()
 	printf "%s\n" "$versiondate" > "$1/versiondate" || $err "$1 !vdate"
 	printf "%s\n" "$projectname" > "$1/projectname" || $err "$1 !pname"
 
-	mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz"; x_ rm -Rf "$1"; :
+	mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz"
+	x_ rm -Rf "$1"
 }
 
 mktarball()
@@ -248,7 +254,8 @@ download()
 			$err "$1 $2 $3 $4: Unsupported dlop type: '$_dlop'"
 		fi
 		vendor_checksum "$4" "$cached" || dl_fail="n"
-	done; [ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: not downloaded"
+	done
+	[ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: not downloaded"
 	[ "$cached" = "$3" ] || cp "$cached" "$3" || $err "!d cp $cached $3"; :
 }
 
diff --git a/include/mrc.sh b/include/mrc.sh
index f5db2ff0..e08a0f0e 100644
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -20,7 +20,7 @@ extract_mrc()
 	"$cbfstool" "$appdir/"bios.bin extract -n mrc.bin \
 	    -f "$_dest" -r RO_SECTION || $err "extract_mrc: !$cbfstool $_dest"
 
-	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && extract_refcode; return 0
+	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && extract_refcode; :
 }
 
 extract_partition()
@@ -57,5 +57,5 @@ extract_refcode()
 	# enable the Intel GbE device, if told by offset MRC_refcode_gbe
 	[ -z "$MRC_refcode_gbe" ] || dd if="config/ifd/hp820g2/1.bin" \
 	    of="$_refdest" bs=1 seek=$MRC_refcode_gbe count=1 conv=notrunc || \
-	    $err "extract_refcode $_refdest: byte $MRC_refcode_gbe"; return 0
+	    $err "extract_refcode $_refdest: byte $MRC_refcode_gbe"; :
 }
diff --git a/include/rom.sh b/include/rom.sh
index dde17b69..7102953f 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -28,11 +28,12 @@ mkserprog()
 		    && x_ cmake --build "$sersrc/build"
 		[ "$1" = "stm32" ] && x_ make -C "$sersrc" \
 		    libopencm3-just-make BOARD=$sertarget && x_ make -C \
-		    "$sersrc" BOARD=$sertarget; x_ mkdir -p "bin/serprog_$1"
+		    "$sersrc" BOARD=$sertarget
+		x_ mkdir -p "bin/serprog_$1"
 		x_ mv "$serx" "bin/serprog_$1/serprog_$sertarget.${serx##*.}"
 	done < "$TMPDIR/ser"
 
-	[ "$XBMK_RELEASE" = "y" ] && mkrom_tarball "bin/serprog_$1"; return 0
+	[ "$XBMK_RELEASE" = "y" ] && mkrom_tarball "bin/serprog_$1"; :
 }
 
 mkpicotool()
@@ -69,7 +70,7 @@ mkpayload_grub()
 	    --install-modules="$grub_install_modules" \
 	    "/boot/grub/grub_default.cfg=${srcdir}/.config" \
 	    "/boot/grub/grub.cfg=$grubdata/memdisk.cfg" || \
-	    $err "$tree: cannot build grub.elf"; return 0
+	    $err "$tree: cannot build grub.elf"; :
 }
 
 mkvendorfiles()
@@ -79,7 +80,7 @@ mkvendorfiles()
 	printf "%s\n" "${version%%-*}" > "$srcdir/.coreboot-version" || \
 	    $err "!mk $srcdir .coreboot-version"
 	[ -z "$mode" ] && [ "$target" != "$tree" ] && \
-	    x_ ./mk download "$target"; return 0
+	    x_ ./mk download "$target"; :
 }
 
 cook_coreboot_config()
@@ -108,8 +109,8 @@ check_coreboot_utils()
 			x_ cp "$utilsrcdir/rmodtool" "$utilelfdir"
 		elif [ -n "$mode" ]; then
 			x_ rm -Rf "$utilelfdir"
-		fi; continue
-	done; return 0
+		fi; :
+	done; :
 }
 
 mkcorebootbin()
@@ -177,7 +178,8 @@ add_seabios()
 	cbfs "$tmprom" "$_seabioself" "$_seaname"
 	x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
 
-	_z="2"; [ "$initmode" = "vgarom" ] && _z="0"
+	_z="2"
+	[ "$initmode" = "vgarom" ] && _z="0"
 	x_ "$cbfstool" "$tmprom" add-int -i $_z -n etc/pci-optionrom-exec
 	x_ "$cbfstool" "$tmprom" add-int -i 0 -n etc/optionroms-checksum
 	[ "$initmode" = "libgfxinit" ] && \
diff --git a/include/vendor.sh b/include/vendor.sh
index 018e734b..53fe5a27 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -38,8 +38,10 @@ eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
 
 vendor_download()
 {
-	[ $# -gt 0 ] || $err "No argument given"; export PATH="$PATH:/sbin"
-	board="$1"; readcfg && readkconfig && bootstrap && getfiles; :
+	[ $# -gt 0 ] || $err "No argument given"
+	export PATH="$PATH:/sbin"
+	board="$1"
+	readcfg && readkconfig && bootstrap && getfiles; :
 }
 
 readkconfig()
@@ -66,9 +68,11 @@ readkconfig()
 	    CONFIG_LENOVO_TBFW_BIN CONFIG_FSP_M_FILE CONFIG_FSP_S_FILE; do
 		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
 		eval "[ -z \"\${$c}\" ] && continue"
-		eval "`setcfg "$vfile"`"; return 0
+		eval "`setcfg "$vfile"`"
+		return 0
 	done
-	printf "Vendor files not needed for: %s\n" "$board" 1>&2; return 1
+	printf "Vendor files not needed for: %s\n" "$board" 1>&2
+	return 1
 }
 
 bootstrap()
@@ -78,7 +82,7 @@ bootstrap()
 	[ -d "${kbc1126_ec_dump%/*}" ] && x_ make -C "$cbdir/util/kbc1126"
 	[ -n "$MRC_refcode_cbtree" ] && \
 	    cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
-	    x_ ./mk -d coreboot "$MRC_refcode_cbtree"; return 0
+	    x_ ./mk -d coreboot "$MRC_refcode_cbtree"; :
 }
 
 getfiles()
@@ -109,9 +113,14 @@ getfiles()
 
 fetch()
 {
-	dl_type="$1"; dl="$2"; dl_bkup="$3"; dlsum="$4"; _dest="${5##*../}"
+	dl_type="$1"
+	dl="$2"
+	dl_bkup="$3"
+	dlsum="$4"
+	_dest="${5##*../}"
 
-	[ "$5" = "/dev/null" ] && return 0; _dl="$XBMK_CACHE/file/$dlsum"
+	[ "$5" = "/dev/null" ] && return 0
+	_dl="$XBMK_CACHE/file/$dlsum"
 	if [ "$dl_type" = "fspm" ] || [ "$dl_type" = "fsps" ]; then
 		# HACK: if grabbing fsp from coreboot, fix the path for lbmk
 		for _cdl in dl dl_bkup; do
@@ -129,11 +138,13 @@ fetch()
 
 	mkdir -p "${_dest%/*}" || \
 	    $err "mkdirs: !mkdir -p ${_dest%/*} - $dontflash"
-	remkdir "$appdir"; extract_archive "$_dl" "$appdir" "$dl_type" || \
+	remkdir "$appdir"
+	extract_archive "$_dl" "$appdir" "$dl_type" || \
 	    [ "$dl_type" = "e6400vga" ] || \
 	    $err "mkd $_dest $dl_type: !extract. $dontflash"
 
-	eval "extract_$dl_type"; set -u -e
+	eval "extract_$dl_type"
+	set -u -e
 	e "$_dest" f missing && $err "!extract_$dl_type. $dontflash"; :
 }
 
@@ -240,7 +251,8 @@ extract_kbc1126ec()
 	e "$kbc1126_ec_dump" f missing && \
 	    $err "$cbdir: kbc1126 util missing - $dontflash"
 	(
-	x_ cd "$appdir/"; mv Rompaq/68*.BIN ec.bin || :
+	x_ cd "$appdir/"
+	mv Rompaq/68*.BIN ec.bin || :
 	if [ ! -f "ec.bin" ]; then
 		unar -D ROM.CAB Rom.bin || unar -D Rom.CAB Rom.bin || \
 		    unar -D 68*.CAB Rom.bin || \
@@ -347,7 +359,8 @@ vendor_inject()
 	err="fail_inject"
 	remkdir "$tmpromdel"
 
-	set +u +e; [ $# -lt 1 ] && $err "No options specified. - $dontflash"
+	set +u +e
+	[ $# -lt 1 ] && $err "No options specified. - $dontflash"
 	eval "`setvars "" nukemode new_mac xchanged`"
 
 	# randomise the MAC address by default
@@ -499,7 +512,8 @@ patch_release_roms()
 		    hashfile="$_hashes" && break; :
 	done
 
-	x_ mkdir -p "tmp"; [ -L "tmp/rom.list" ] && \
+	x_ mkdir -p "tmp"
+	[ -L "tmp/rom.list" ] && \
 	    $err "'$archive' -> tmp/rom.list is a symlink - $dontflash"
 	x_ rm -f "tmp/rom.list" "tmp/zero.1b"
 	x_ dd if=/dev/zero of=tmp/zero.1b bs=1 count=1
@@ -679,7 +693,9 @@ inject()
 	[ "$2" = "/dev/null" ] && return 0
 
 	eval "`setvars "" cbfsname _dest _t _offset`"
-	cbfsname="$1"; _dest="${2##*../}"; _t="$3"
+	cbfsname="$1"
+	_dest="${2##*../}"
+	_t="$3"
 
 	if [ "$_t" = "fsp" ]; then
 		[ $# -gt 3 ] && _offset="$4"
@@ -705,7 +721,8 @@ inject()
 		return 0
 	fi
 	if [ "$_t" = "stage" ]; then # the only stage we handle is refcode
-		x_ mkdir -p tmp; x_ rm -f "tmp/refcode"
+		x_ mkdir -p tmp
+		x_ rm -f "tmp/refcode"
 		"$rmodtool" -i "$_dest" -o "tmp/refcode" || "!reloc refcode"
 		"$cbfstool" "$rom" add-stage -f "tmp/refcode" -n "$cbfsname" \
 		    -t stage || $err "$rom: !add ref"
diff --git a/script/trees b/script/trees
index d53dd4f7..3eb9d054 100755
--- a/script/trees
+++ b/script/trees
@@ -15,13 +15,17 @@ eval "`setvars "" xarch srcdir premake gnatdir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
     defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs gccver gccfull \
-    gnatver gnatfull gccdir cmakedir`"; badhash="n"
+    gnatver gnatfull gccdir cmakedir`"
 
 # ./mk -f will set this to "n", thus
 # disabling the use of make commands
 do_make="y"
 mode="all" # make all
 
+# badhash changes to "y" when project
+# files change, e.g. config files, patches
+badhash="n"
+
 flags="-m/-u/-b/-c/-x/-f/-s/-l/-n/-d"
 
 main()
@@ -82,7 +86,8 @@ main()
 		x_ touch "$mkhelpercfg"
 	fi
 
-	targets="$*"; cmd="build_targets $targets"
+	targets="$*"
+	cmd="build_targets $targets"
 	singletree "$project" && cmd="build_project"
 
 	remkdir "${tmpgit%/*}"
@@ -96,7 +101,7 @@ build_project()
 	[ "$mode" = "distclean" ] && mode="clean"
 	run_make_command || return 0
 
-	[ -n "$mode" ] || $dry copy_elf; return 0
+	[ -n "$mode" ] || $dry copy_elf; :
 }
 
 build_targets()
@@ -113,7 +118,7 @@ build_targets()
 		printf "'make %s', '%s', '%s'\n" "$mode" "$project" "$target"
 		x_ handle_defconfig
 		[ -n "$mode" ] || [ -z "$postmake" ] || $postmake || \
-		    $err "$project/$target: !postmake: $postmake"; continue
+		    $err "$project/$target: !postmake: $postmake"; :
 	done; return 0
 }
 
@@ -125,7 +130,8 @@ handle_defconfig()
 	configure_project "$target_dir" || return 0
 	x_ mkdir -p "$elfdir/$target"
 
-	chkvars tree; srcdir="src/$project/$tree"
+	chkvars tree
+	srcdir="src/$project/$tree"
 
 	if [ "$mode" = "distclean" ] || [ "$mode" = "crossgcc-clean" ]; then
 		[ -d "$srcdir" ] || return 0
@@ -139,7 +145,7 @@ handle_defconfig()
 		[ -n "$mode" ] || check_defconfig || continue
 		handle_makefile
 		[ -n "$mode" ] || $dry copy_elf
-	done; return 0
+	done; :
 }
 
 configure_project()
@@ -190,8 +196,8 @@ build_dependencies()
 		[ -z "$bd_p" ] && $dry $err "$project/$tree: !bd '$bd'"
 		[ "${bd##*/}" = "$bd" ] && bd_t=""
 		[ -z "$bd_p" ] || $dry ./mk -b $bd_p $bd_t \
-		    || $err "!mk $project/$tree $bd_p/$bd_t"; continue
-	done; return 0
+		    || $err "!mk $project/$tree $bd_p/$bd_t"; :
+	done; :
 }
 
 check_project_hashes()
@@ -202,7 +208,8 @@ check_project_hashes()
 	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
 
 	x_ rm -f "$TMPDIR/project.list" "$TMPDIR/project.hash" \
-	    "$TMPDIR/project.tmp"; x_ touch "$TMPDIR/project.tmp"
+	    "$TMPDIR/project.tmp"
+	x_ touch "$TMPDIR/project.tmp"
 	x_ touch "$TMPDIR/project.hash"
 
 	for rmchk in "$datadir" "$configdir/$tree" "$mdir"; do
@@ -258,7 +265,7 @@ check_cross_compiler()
 		# we only want to mess with hostcc to build xgcc
 		rm -f "$XBMK_CACHE/gnupath/"* || \
 		    $err "Cannot clear gnupath/"; :
-	done; return 0
+	done; :
 }
 
 # fix mismatching gcc/gnat versions on debian trixie/sid. as of december 2024,
@@ -297,7 +304,8 @@ check_gnu_path()
 	rm -f "$XBMK_CACHE/gnupath/"* || $err "Cannot clear gnupath/"
 	cd "$XBMK_CACHE/gnupath" || $err "Can't cd to gnupath/"
 	for _gnubin in "$_gnudir/$2"*"-$_gnuver"; do
-		[ -e "$_gnubin" ] || continue; _gnuutil="${_gnubin##*/}"
+		[ -e "$_gnubin" ] || continue
+		_gnuutil="${_gnubin##*/}"
 		x_ ln -s "$_gnubin" "${_gnuutil%"-$_gnuver"}"
 	done
 	) || $err "Cannot create $2-$_gnuver link in $_gnudir"; :
@@ -326,7 +334,7 @@ elfcheck()
 	# TODO: very hacky check. do it properly (based on build.list)
 	for elftest in "$dest_dir"/*; do
 		[ -e "$elftest" ] && e "$elftest" f && return 1
-	done; return 0
+	done; :
 }
 
 handle_makefile()
@@ -350,8 +358,9 @@ handle_makefile()
 run_make_command()
 {
 	[ -z "$premake" ] || [ -n "$mode" ] || $premake || $err "!$premake"
-	$dry check_cmake "$srcdir" && [ -z "$mode" ] && $dry check_autoconf \
-	    "$srcdir"; $dry check_makefile "$srcdir" || return 1
+	$dry check_cmake "$srcdir" && [ -z "$mode" ] && \
+	    $dry check_autoconf "$srcdir"
+	$dry check_makefile "$srcdir" || return 1
 
 	$dry make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs || $err "!$mode"
 	[ -z "$mkhelper" ] || [ -n "$mode" ] || $mkhelper || $err "!$mkhelper"
@@ -366,7 +375,7 @@ check_cmake()
 	    "$1/$cmakedir" || $dry check_makefile "$1" || $err \
 	    "$1: !cmk $cmakedir"
 	[ -z "$cmakedir" ] || $dry check_makefile "$1" || \
-	    $err "check_cmake $1: can't generate Makefile"; return 0
+	    $err "check_cmake $1: can't generate Makefile"; :
 }
 
 check_autoconf()
@@ -375,21 +384,22 @@ check_autoconf()
 	cd "$1" || $err "!cd $1"
 	[ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs
 	[ -f "autogen.sh" ] && x_ ./autogen.sh $autogenargs
-	[ -f "configure" ] && x_ ./configure $autoconfargs; return 0
-	) || $err "can't bootstrap project: $1"
+	[ -f "configure" ] && x_ ./configure $autoconfargs; :
+	) || $err "can't bootstrap project: $1"; :
 }
 
 check_makefile()
 {
 	[ -f "$1/Makefile" ] || [ -f "$1/makefile" ] || \
-	    [ -f "$1/GNUmakefile" ] || return 1; return 0
+	    [ -f "$1/GNUmakefile" ] || return 1; :
 }
 
 copy_elf()
 {
 	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do
 		[ -f "$srcdir/$f" ] && x_ cp "$srcdir/$f" "$dest_dir"
-	done < "$listfile"; x_ make clean -C "$srcdir" $cleanargs
+	done < "$listfile"
+	x_ make clean -C "$srcdir" $cleanargs
 }
 
 main "$@" || exit 0

From 0764c969a29b54166bb64e24e257f15a536a8be4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 11 Apr 2025 17:52:18 +0100
Subject: [PATCH 1117/1549] lbmk: use pwd util, not PWD environmental variable

PWD could be anything, if the user manually exported
it before running lbmk.

always run pwd instead, to get the real string.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/pico-serprog/mkhelper.cfg |  2 +-
 include/git.sh                        |  4 ++--
 include/lib.sh                        | 14 +++++++-------
 include/vendor.sh                     | 20 ++++++++++----------
 script/trees                          |  4 ++--
 5 files changed, 22 insertions(+), 22 deletions(-)

diff --git a/config/data/pico-serprog/mkhelper.cfg b/config/data/pico-serprog/mkhelper.cfg
index f4733dd9..15f766b7 100644
--- a/config/data/pico-serprog/mkhelper.cfg
+++ b/config/data/pico-serprog/mkhelper.cfg
@@ -7,4 +7,4 @@ serx="$sersrc/build/pico_serprog.uf2"
 picosdk="src/pico-sdk"
 serdir="$picosdk/src/boards/include/boards"
 premake="mkserprog pico"
-picotool="$PWD/src/picotool/xbmkbin"
+picotool="`pwd`/src/picotool/xbmkbin"
diff --git a/include/git.sh b/include/git.sh
index 1933a4ec..31f8562d 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -12,7 +12,7 @@ fetch_targets()
 	e "src/$project/$tree" d && return 0
 
 	printf "Creating %s tree %s\n" "$project" "$tree"
-	git_prep "$loc" "$loc" "$PWD/$configdir/$tree/patches" \
+	git_prep "$loc" "$loc" "`pwd`/$configdir/$tree/patches" \
 	    "src/$project/$tree" u
 	nuke "$project/$tree" "$project/$tree"
 }
@@ -43,7 +43,7 @@ clone_project()
 	printf "Downloading project '%s' to '%s'\n" "$project" "$loc"
 
 	e "$loc" d missing && remkdir "${tmpgit%/*}" && git_prep \
-	    "$url" "$bkup_url" "$PWD/config/$project/patches" "$loc"; :
+	    "$url" "$bkup_url" "`pwd`/config/$project/patches" "$loc"; :
 }
 
 git_prep()
diff --git a/include/lib.sh b/include/lib.sh
index 31c9fd02..4e527845 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -11,7 +11,7 @@ _ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
 ifdtool="elf/ifdtool/default/ifdtool"
 cbfstool="elf/cbfstool/default/cbfstool"
 rmodtool="elf/cbfstool/default/rmodtool"
-tmpgit="$PWD/tmp/gitclone"
+tmpgit="`pwd`/tmp/gitclone"
 grubdata="config/data/grub"
 err="err_"
 
@@ -102,18 +102,18 @@ id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
 [ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
 
 # XBMK_CACHE is a directory, for caching downloads and git repositories
-[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$PWD/cache"
-[ -z "$XBMK_CACHE" ] && export XBMK_CACHE="$PWD/cache"
-[ -L "$XBMK_CACHE" ] && [ "$XBMK_CACHE" = "$PWD/cache" ] && \
-    $err "cachedir is default, $PWD/cache, but it exists and is a symlink"
-[ -L "$XBMK_CACHE" ] && export XBMK_CACHE="$PWD/cache"
+[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="`pwd`/cache"
+[ -z "$XBMK_CACHE" ] && export XBMK_CACHE="`pwd`/cache"
+[ -L "$XBMK_CACHE" ] && [ "$XBMK_CACHE" = "`pwd`/cache" ] && \
+    $err "cachedir is default, `pwd`/cache, but it exists and is a symlink"
+[ -L "$XBMK_CACHE" ] && export XBMK_CACHE="`pwd`/cache"
 [ -f "$XBMK_CACHE" ] && $err "cachedir '$XBMK_CACHE' exists but it's a file"
 
 # unify all temporary files/directories in a single TMPDIR
 [ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || unset TMPDIR
 [ -n "${TMPDIR+x}" ] && export TMPDIR="$TMPDIR"
 if [ -z "${TMPDIR+x}" ]; then
-	[ -f "lock" ] && $err "$PWD/lock exists. Is a build running?"
+	[ -f "lock" ] && $err "`pwd`/lock exists. Is a build running?"
 	export TMPDIR="/tmp"
 	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
 	touch lock || $err "cannot create 'lock' file"
diff --git a/include/vendor.sh b/include/vendor.sh
index 53fe5a27..9cb872a5 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -3,10 +3,10 @@
 # Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
 # Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org>
 
-e6400_unpack="$PWD/src/bios_extract/dell_inspiron_1100_unpacker.py"
-me7updateparser="$PWD/util/me7_update_parser/me7_update_parser.py"
-pfs_extract="$PWD/src/biosutilities/Dell_PFS_Extract.py"
-uefiextract="$PWD/elf/uefitool/uefiextract"
+e6400_unpack="`pwd`/src/bios_extract/dell_inspiron_1100_unpacker.py"
+me7updateparser="`pwd`/util/me7_update_parser/me7_update_parser.py"
+pfs_extract="`pwd`/src/biosutilities/Dell_PFS_Extract.py"
+uefiextract="`pwd`/elf/uefitool/uefiextract"
 vendir="vendorfiles"
 appdir="$vendir/app"
 cbcfgsdir="config/coreboot"
@@ -14,7 +14,7 @@ hashfiles="vendorhashes blobhashes" # blobhashes for backwards compatibility
 dontflash="!!! AN ERROR OCCURED! Please DO NOT flash if injection failed. !!!"
 vfix="DO_NOT_FLASH_YET._FIRST,_INJECT_FILES_VIA_INSTRUCTIONS_ON_LIBREBOOT.ORG_"
 vguide="https://libreboot.org/docs/install/ivy_has_common.html"
-tmpromdel="$PWD/tmp/DO_NOT_FLASH"
+tmpromdel="`pwd`/tmp/DO_NOT_FLASH"
 
 cv="CONFIG_HAVE_ME_BIN CONFIG_ME_BIN_PATH CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \
     CONFIG_SMSC_SCH5545_EC_FW_FILE CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 \
@@ -152,9 +152,9 @@ extract_intel_me()
 {
 	e "$mecleaner" f not && $err "$cbdir: me_cleaner missing. $dontflash"
 
-	cdir="$PWD/$appdir"
-	_me="$PWD/$_dest"
-	_metmp="$PWD/tmp/me.bin"
+	cdir="`pwd`/$appdir"
+	_me="`pwd`/$_dest"
+	_metmp="`pwd`/tmp/me.bin"
 
 	mfs="" && [ "$ME11bootguard" = "y" ] && mfs="--whitelist MFS" && \
 	    chkvars ME11delta ME11version ME11sku ME11pch
@@ -489,8 +489,8 @@ readcfg()
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 	rmodtool="elf/cbfstool/$tree/rmodtool"
-	mecleaner="$PWD/$cbdir/util/me_cleaner/me_cleaner.py"
-	kbc1126_ec_dump="$PWD/$cbdir/util/kbc1126/kbc1126_ec_dump"
+	mecleaner="`pwd`/$cbdir/util/me_cleaner/me_cleaner.py"
+	kbc1126_ec_dump="`pwd`/$cbdir/util/kbc1126/kbc1126_ec_dump"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 	ifdtool="elf/ifdtool/$tree/ifdtool"
 	[ -n "$IFD_platform" ] && ifdprefix="-p $IFD_platform"; :
diff --git a/script/trees b/script/trees
index 3eb9d054..8e53949b 100755
--- a/script/trees
+++ b/script/trees
@@ -176,7 +176,7 @@ configure_project()
 	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
 	[ -z "$mode" ] && build_dependencies
 
-	mdir="$PWD/config/submodule/$project"
+	mdir="`pwd`/config/submodule/$project"
 	[ -n "$tree" ] && mdir="$mdir/$tree"
 	[ -f "CHANGELOG" ] || check_project_hashes
 
@@ -247,7 +247,7 @@ check_cross_compiler()
 
 		x_ ./mk -f coreboot "${cbdir#src/coreboot/}"
 
-		export PATH="$PWD/$cbdir/util/crossgcc/xgcc/bin:$PATH"
+		export PATH="`pwd`/$cbdir/util/crossgcc/xgcc/bin:$PATH"
 		export CROSS_COMPILE="${xarch% *}-"
 		[ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
 

From 1022abf69914f77dbcb360d885cae4c22ea3a223 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 11 Apr 2025 19:22:23 +0100
Subject: [PATCH 1118/1549] move XBMKPATH to include/lib.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 ++
 script/trees   | 4 +---
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 4e527845..47fc7d7f 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -6,6 +6,8 @@
 export LC_COLLATE=C
 export LC_ALL=C
 
+xbmkpath="$PATH"
+
 _ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
 
 ifdtool="elf/ifdtool/default/ifdtool"
diff --git a/script/trees b/script/trees
index 8e53949b..48d1603a 100755
--- a/script/trees
+++ b/script/trees
@@ -9,8 +9,6 @@ set -u -e
 . "include/lib.sh"
 . "include/git.sh"
 
-XBMKPATH="$PATH"
-
 eval "`setvars "" xarch srcdir premake gnatdir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
@@ -111,7 +109,7 @@ build_targets()
 
 	for x in $targets; do
 		unset CROSS_COMPILE
-		export PATH="$XBMKPATH"
+		export PATH="$xbmkpath"
 		[ "$x" = "list" ] && x_ ls -1 "config/$project" && \
 		    listfile="" && break
 		target="$x"

From a25a29cfbb7578ed44e862cc6a4ff019c340f499 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 11 Apr 2025 19:31:26 +0100
Subject: [PATCH 1119/1549] lib.sh: initialise PATH if it's unset

it's incorrect for PATH not to be set, but some users
may foolishly blank it out before running lbmk.

prevent such issues, by initialising it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/lib.sh b/include/lib.sh
index 47fc7d7f..5f87b9fa 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -6,6 +6,8 @@
 export LC_COLLATE=C
 export LC_ALL=C
 
+[ -z "${PATH+x}" ] && \
+    export PATH="/usr/local/bin:/usr/bin:/bin:/usr/local/games:/usr/games"
 xbmkpath="$PATH"
 
 _ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"

From 5a0a24f555985c772b8414fe88a5862d23491956 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 11 Apr 2025 20:04:53 +0100
Subject: [PATCH 1120/1549] lbmk: unified PWD handling (work directory)

instead of running pwd all the time, run it once in lib.sh,
and export PWD.

for lbmk-specific use of PWD, use xbmkpwd, which contains
the value of PWD as was set by the pwd utility in lib.sh.

many parts of lbmk rely on pwd, and it *must* be correct.
this change adds basic error handling, since pwd can in
fact return errors in some cases.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/pico-serprog/mkhelper.cfg |  2 +-
 include/git.sh                        |  6 ++++--
 include/lib.sh                        | 16 +++++++++-------
 include/vendor.sh                     | 20 ++++++++++----------
 script/trees                          |  4 ++--
 5 files changed, 26 insertions(+), 22 deletions(-)

diff --git a/config/data/pico-serprog/mkhelper.cfg b/config/data/pico-serprog/mkhelper.cfg
index 15f766b7..c913767c 100644
--- a/config/data/pico-serprog/mkhelper.cfg
+++ b/config/data/pico-serprog/mkhelper.cfg
@@ -7,4 +7,4 @@ serx="$sersrc/build/pico_serprog.uf2"
 picosdk="src/pico-sdk"
 serdir="$picosdk/src/boards/include/boards"
 premake="mkserprog pico"
-picotool="`pwd`/src/picotool/xbmkbin"
+picotool="$xbmkpwd/src/picotool/xbmkbin"
diff --git a/include/git.sh b/include/git.sh
index 31f8562d..30f9729a 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -5,6 +5,8 @@
 eval "`setvars "" loc url bkup_url subfile subhash subrepo subrepo_bkup \
     depend subfile_bkup repofail`"
 
+tmpgit="$xbmkpwd/tmp/gitclone"
+
 fetch_targets()
 {
 	[ -n "$tree_depend" ] && [ "$tree_depend" != "$tree" ] && \
@@ -12,7 +14,7 @@ fetch_targets()
 	e "src/$project/$tree" d && return 0
 
 	printf "Creating %s tree %s\n" "$project" "$tree"
-	git_prep "$loc" "$loc" "`pwd`/$configdir/$tree/patches" \
+	git_prep "$loc" "$loc" "$xbmkpwd/$configdir/$tree/patches" \
 	    "src/$project/$tree" u
 	nuke "$project/$tree" "$project/$tree"
 }
@@ -43,7 +45,7 @@ clone_project()
 	printf "Downloading project '%s' to '%s'\n" "$project" "$loc"
 
 	e "$loc" d missing && remkdir "${tmpgit%/*}" && git_prep \
-	    "$url" "$bkup_url" "`pwd`/config/$project/patches" "$loc"; :
+	    "$url" "$bkup_url" "$xbmkpwd/config/$project/patches" "$loc"; :
 }
 
 git_prep()
diff --git a/include/lib.sh b/include/lib.sh
index 5f87b9fa..a3cdf554 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -15,7 +15,6 @@ _ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
 ifdtool="elf/ifdtool/default/ifdtool"
 cbfstool="elf/cbfstool/default/cbfstool"
 rmodtool="elf/cbfstool/default/rmodtool"
-tmpgit="`pwd`/tmp/gitclone"
 grubdata="config/data/grub"
 err="err_"
 
@@ -25,6 +24,9 @@ err_()
 	exit 1
 }
 
+xbmkpwd=`pwd` || $err "Cannot generate PWD"
+export PWD="$xbmkpwd"
+
 setvars()
 {
 	_setvars="" && [ $# -lt 2 ] && $err "setvars: too few arguments"
@@ -106,18 +108,18 @@ id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
 [ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
 
 # XBMK_CACHE is a directory, for caching downloads and git repositories
-[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="`pwd`/cache"
-[ -z "$XBMK_CACHE" ] && export XBMK_CACHE="`pwd`/cache"
-[ -L "$XBMK_CACHE" ] && [ "$XBMK_CACHE" = "`pwd`/cache" ] && \
-    $err "cachedir is default, `pwd`/cache, but it exists and is a symlink"
-[ -L "$XBMK_CACHE" ] && export XBMK_CACHE="`pwd`/cache"
+[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$xbmkpwd/cache"
+[ -z "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
+[ -L "$XBMK_CACHE" ] && [ "$XBMK_CACHE" = "$xbmkpwd/cache" ] && \
+    $err "cachedir is default, $xbmkpwd/cache, but it exists and is a symlink"
+[ -L "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
 [ -f "$XBMK_CACHE" ] && $err "cachedir '$XBMK_CACHE' exists but it's a file"
 
 # unify all temporary files/directories in a single TMPDIR
 [ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || unset TMPDIR
 [ -n "${TMPDIR+x}" ] && export TMPDIR="$TMPDIR"
 if [ -z "${TMPDIR+x}" ]; then
-	[ -f "lock" ] && $err "`pwd`/lock exists. Is a build running?"
+	[ -f "lock" ] && $err "$xbmkpwd/lock exists. Is a build running?"
 	export TMPDIR="/tmp"
 	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
 	touch lock || $err "cannot create 'lock' file"
diff --git a/include/vendor.sh b/include/vendor.sh
index 9cb872a5..740f01b0 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -3,10 +3,10 @@
 # Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
 # Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org>
 
-e6400_unpack="`pwd`/src/bios_extract/dell_inspiron_1100_unpacker.py"
-me7updateparser="`pwd`/util/me7_update_parser/me7_update_parser.py"
-pfs_extract="`pwd`/src/biosutilities/Dell_PFS_Extract.py"
-uefiextract="`pwd`/elf/uefitool/uefiextract"
+e6400_unpack="$xbmkpwd/src/bios_extract/dell_inspiron_1100_unpacker.py"
+me7updateparser="$xbmkpwd/util/me7_update_parser/me7_update_parser.py"
+pfs_extract="$xbmkpwd/src/biosutilities/Dell_PFS_Extract.py"
+uefiextract="$xbmkpwd/elf/uefitool/uefiextract"
 vendir="vendorfiles"
 appdir="$vendir/app"
 cbcfgsdir="config/coreboot"
@@ -14,7 +14,7 @@ hashfiles="vendorhashes blobhashes" # blobhashes for backwards compatibility
 dontflash="!!! AN ERROR OCCURED! Please DO NOT flash if injection failed. !!!"
 vfix="DO_NOT_FLASH_YET._FIRST,_INJECT_FILES_VIA_INSTRUCTIONS_ON_LIBREBOOT.ORG_"
 vguide="https://libreboot.org/docs/install/ivy_has_common.html"
-tmpromdel="`pwd`/tmp/DO_NOT_FLASH"
+tmpromdel="$xbmkpwd/tmp/DO_NOT_FLASH"
 
 cv="CONFIG_HAVE_ME_BIN CONFIG_ME_BIN_PATH CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \
     CONFIG_SMSC_SCH5545_EC_FW_FILE CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 \
@@ -152,9 +152,9 @@ extract_intel_me()
 {
 	e "$mecleaner" f not && $err "$cbdir: me_cleaner missing. $dontflash"
 
-	cdir="`pwd`/$appdir"
-	_me="`pwd`/$_dest"
-	_metmp="`pwd`/tmp/me.bin"
+	cdir="$xbmkpwd/$appdir"
+	_me="$xbmkpwd/$_dest"
+	_metmp="$xbmkpwd/tmp/me.bin"
 
 	mfs="" && [ "$ME11bootguard" = "y" ] && mfs="--whitelist MFS" && \
 	    chkvars ME11delta ME11version ME11sku ME11pch
@@ -489,8 +489,8 @@ readcfg()
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 	rmodtool="elf/cbfstool/$tree/rmodtool"
-	mecleaner="`pwd`/$cbdir/util/me_cleaner/me_cleaner.py"
-	kbc1126_ec_dump="`pwd`/$cbdir/util/kbc1126/kbc1126_ec_dump"
+	mecleaner="$xbmkpwd/$cbdir/util/me_cleaner/me_cleaner.py"
+	kbc1126_ec_dump="$xbmkpwd/$cbdir/util/kbc1126/kbc1126_ec_dump"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 	ifdtool="elf/ifdtool/$tree/ifdtool"
 	[ -n "$IFD_platform" ] && ifdprefix="-p $IFD_platform"; :
diff --git a/script/trees b/script/trees
index 48d1603a..3cdd8dd4 100755
--- a/script/trees
+++ b/script/trees
@@ -174,7 +174,7 @@ configure_project()
 	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
 	[ -z "$mode" ] && build_dependencies
 
-	mdir="`pwd`/config/submodule/$project"
+	mdir="$xbmkpwd/config/submodule/$project"
 	[ -n "$tree" ] && mdir="$mdir/$tree"
 	[ -f "CHANGELOG" ] || check_project_hashes
 
@@ -245,7 +245,7 @@ check_cross_compiler()
 
 		x_ ./mk -f coreboot "${cbdir#src/coreboot/}"
 
-		export PATH="`pwd`/$cbdir/util/crossgcc/xgcc/bin:$PATH"
+		export PATH="$xbmkpwd/$cbdir/util/crossgcc/xgcc/bin:$PATH"
 		export CROSS_COMPILE="${xarch% *}-"
 		[ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
 

From 5b697b93a2d7b10ab232fce905171d9a5bc9b25c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 11 Apr 2025 20:11:51 +0100
Subject: [PATCH 1121/1549] lib.sh: double-quote pwd to prevent globbing

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index a3cdf554..68c2b847 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -24,7 +24,7 @@ err_()
 	exit 1
 }
 
-xbmkpwd=`pwd` || $err "Cannot generate PWD"
+xbmkpwd="`pwd`" || $err "Cannot generate PWD"
 export PWD="$xbmkpwd"
 
 setvars()

From cfb14fd8dd8cfb26aa65edd0aec6ad2523cc8ed3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 00:57:33 +0100
Subject: [PATCH 1122/1549] vendor.sh: simplified readkconfig()

So much bloat

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 46 +++++++++++++++++-----------------------------
 1 file changed, 17 insertions(+), 29 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 740f01b0..f965effe 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -16,15 +16,16 @@ vfix="DO_NOT_FLASH_YET._FIRST,_INJECT_FILES_VIA_INSTRUCTIONS_ON_LIBREBOOT.ORG_"
 vguide="https://libreboot.org/docs/install/ivy_has_common.html"
 tmpromdel="$xbmkpwd/tmp/DO_NOT_FLASH"
 
-cv="CONFIG_HAVE_ME_BIN CONFIG_ME_BIN_PATH CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \
-    CONFIG_SMSC_SCH5545_EC_FW_FILE CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 \
+cvchk="CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
+	CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \
+	CONFIG_LENOVO_TBFW_BIN CONFIG_FSP_M_FILE CONFIG_FSP_S_FILE"
+
+cv="CONFIG_ME_BIN_PATH CONFIG_SMSC_SCH5545_EC_FW_FILE CONFIG_KBC1126_FW1 \
     CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2_OFFSET \
-    CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_BOARD_DELL_E6400 \
-    CONFIG_HAVE_MRC CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB \
-    CONFIG_REFCODE_BLOB_FILE CONFIG_GBE_BIN_PATH CONFIG_IFD_BIN_PATH \
-    CONFIG_LENOVO_TBFW_BIN CONFIG_FSP_FD_PATH CONFIG_FSP_M_FILE \
-    CONFIG_FSP_S_FILE CONFIG_FSP_S_CBFS CONFIG_FSP_M_CBFS CONFIG_FSP_USE_REPO \
-    CONFIG_FSP_FULL_FD"
+    CONFIG_VGA_BIOS_ID CONFIG_BOARD_DELL_E6400 CONFIG_FSP_S_CBFS \
+    CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE CONFIG_GBE_BIN_PATH \
+    CONFIG_IFD_BIN_PATH CONFIG_FSP_FD_PATH CONFIG_MRC_FILE CONFIG_FSP_M_CBFS \
+    CONFIG_FSP_USE_REPO CONFIG_FSP_FULL_FD $cvchk"
 
 eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
@@ -34,7 +35,7 @@ eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch tmpromdir \
     IFD_platform ifdprefix cdir sdir _me _metmp mfs TBFW_url_bkup TBFW_url \
     TBFW_hash TBFW_size hashfile xromsize xchanged EC_url_bkup need_files \
-    vfile $cv`"
+    vfile cbcfg $cv`"
 
 vendor_download()
 {
@@ -46,32 +47,18 @@ vendor_download()
 
 readkconfig()
 {
-	check_defconfig "$boarddir" 1>"$TMPDIR/vendorcfg.list" && return 1
+	x_ rm -f "$TMPDIR/cbcfg"
+	cbcfg="`check_defconfig "$boarddir"`" || for cbc in $cv; do
+		grep "$cbc" "$cbcfg" 1>>"$TMPDIR/cbcfg" 2>/dev/null || :
+	done
+	eval "`setcfg "$TMPDIR/cbcfg" 1`"
 
-	rm -f "$TMPDIR/tmpcbcfg" || $err "!rm $TMPDIR/tmpcbcfg - $dontflash"
-	while read -r cbcfgfile; do
-		for cbc in $cv; do
-			rm -f "$TMPDIR/tmpcbcfg2" || \
-			    $err "!rm $TMPDIR/tmpcbcfg2 - $dontflash"
-			grep "$cbc" "$cbcfgfile" 1>"$TMPDIR/tmpcbcfg2" \
-			    2>/dev/null || :
-			[ -f "$TMPDIR/tmpcbcfg2" ] || continue
-			cat "$TMPDIR/tmpcbcfg2" >> "$TMPDIR/tmpcbcfg" || \
-			    $err "!cat $TMPDIR/tmpcbcfg2 - $dontflash"
-		done
-	done < "$TMPDIR/vendorcfg.list"
-
-	eval "`setcfg "$TMPDIR/tmpcbcfg"`"
-
-	for c in CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
-	    CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \
-	    CONFIG_LENOVO_TBFW_BIN CONFIG_FSP_M_FILE CONFIG_FSP_S_FILE; do
+	for c in $cvchk; do
 		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
 		eval "[ -z \"\${$c}\" ] && continue"
 		eval "`setcfg "$vfile"`"
 		return 0
 	done
-	printf "Vendor files not needed for: %s\n" "$board" 1>&2
 	return 1
 }
 
@@ -482,6 +469,7 @@ readcfg()
 	x_ ./mk -d coreboot "$tree" # even if vendorfiles not used, see: setmac
 
 	[ -z "$vcfg" ] && return 1
+
 	vfile="config/vendor/$vcfg/pkg.cfg"
 	[ -L "$vfile" ] && $err "'$archive', '$board': $vfile is a symlink"
 	[ -f "$vfile" ] || $err "'$archive', '$board': $vfile doesn't exist"

From 97c50a39a60734630a3b48e94105fea05dddc33f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 01:45:10 +0100
Subject: [PATCH 1123/1549] trees: clean up some comments

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/script/trees b/script/trees
index 3cdd8dd4..ddaaa6b5 100755
--- a/script/trees
+++ b/script/trees
@@ -15,13 +15,11 @@ eval "`setvars "" xarch srcdir premake gnatdir xlang mode makeargs elfdir cmd \
     defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs gccver gccfull \
     gnatver gnatfull gccdir cmakedir`"
 
-# ./mk -f will set this to "n", thus
-# disabling the use of make commands
+# ./mk -f will set this to "n"
 do_make="y"
 mode="all" # make all
 
-# badhash changes to "y" when project
-# files change, e.g. config files, patches
+# badhash changes to "y" when sources change
 badhash="n"
 
 flags="-m/-u/-b/-c/-x/-f/-s/-l/-n/-d"

From 244489484199d8e5bcda4a821970be023f7b905b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 01:45:36 +0100
Subject: [PATCH 1124/1549] trees: don't initialise mode to "all"

this is not necessary. the fetch mode is still handled,
as before, and no make commands will run in this case.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 1 -
 1 file changed, 1 deletion(-)

diff --git a/script/trees b/script/trees
index ddaaa6b5..f8fad0a3 100755
--- a/script/trees
+++ b/script/trees
@@ -17,7 +17,6 @@ eval "`setvars "" xarch srcdir premake gnatdir xlang mode makeargs elfdir cmd \
 
 # ./mk -f will set this to "n"
 do_make="y"
-mode="all" # make all
 
 # badhash changes to "y" when sources change
 badhash="n"

From 67ad7c2635c8d2da442c328cc9f11f4d0330a0a7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 01:48:13 +0100
Subject: [PATCH 1125/1549] trees: don't set mod on ./mk -d

mode is already initialised as an empty string

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index f8fad0a3..9cc6f9a2 100755
--- a/script/trees
+++ b/script/trees
@@ -34,9 +34,7 @@ main()
 		_f="$1"
 
 		case "$_f" in
-		-d)
-			mode=""
-			dry=":" ;;
+		-d) dry=":" ;;
 		-b) mode="" ;;
 		-u) mode="oldconfig" ;;
 		-m) mode="menuconfig" ;;

From 9be40e94a2bae62ec3335a4922d1e84bef1db098 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 01:48:42 +0100
Subject: [PATCH 1126/1549] trees: don't set mode on ./mk -b

mode is already initialised as an empty string

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index 9cc6f9a2..67bba7c1 100755
--- a/script/trees
+++ b/script/trees
@@ -35,7 +35,7 @@ main()
 
 		case "$_f" in
 		-d) dry=":" ;;
-		-b) mode="" ;;
+		-b) : ;;
 		-u) mode="oldconfig" ;;
 		-m) mode="menuconfig" ;;
 		-c) mode="distclean" ;;

From 3ea633cc791d56a769a58a3e8d889d9048cd8d74 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 01:56:14 +0100
Subject: [PATCH 1127/1549] trees: simplified handling of badhash/do_make

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 19 ++++++-------------
 1 file changed, 6 insertions(+), 13 deletions(-)

diff --git a/script/trees b/script/trees
index 67bba7c1..ea161368 100755
--- a/script/trees
+++ b/script/trees
@@ -13,13 +13,7 @@ eval "`setvars "" xarch srcdir premake gnatdir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
     autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
     defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs gccver gccfull \
-    gnatver gnatfull gccdir cmakedir`"
-
-# ./mk -f will set this to "n"
-do_make="y"
-
-# badhash changes to "y" when sources change
-badhash="n"
+    gnatver gnatfull gccdir cmakedir do_make badhash`"
 
 flags="-m/-u/-b/-c/-x/-f/-s/-l/-n/-d"
 
@@ -145,9 +139,8 @@ configure_project()
 {
 	eval "`setvars "" cleanargs build_depend autoconfargs xtree postmake \
 	    tree_depend makeargs btype mkhelper bootstrapargs premake release \
-	    xarch xlang`"
+	    xarch xlang badhash`"
 	_tcfg="$1/target.cfg"
-	badhash="n"
 	[ -f "$_tcfg" ] || btype="auto"
 	[ -f "$datadir/mkhelper.cfg" ] && \
 	    eval "`setcfg "$datadir/mkhelper.cfg"`"
@@ -159,7 +152,7 @@ configure_project()
 
 		[ "$_f" = "-d" ] && build_depend="" # dry run
 		[ "$cmd" = "build_project" ] && break
-		[ "$do_make" = "y" ] && break
+		[ "$do_make" != "n" ] && break
 
 		[ "${_tcfg%/*/target.cfg}" = "${_tcfg%"/$tree/target.cfg"}" ] \
 		    && break
@@ -173,7 +166,7 @@ configure_project()
 	[ -n "$tree" ] && mdir="$mdir/$tree"
 	[ -f "CHANGELOG" ] || check_project_hashes
 
-	if [ "$do_make" = "y" ]; then
+	if [ "$do_make" != "n" ]; then
 		x_ ./mk -f "$project" "$target"
 		return 0
 	fi
@@ -219,13 +212,13 @@ check_project_hashes()
 	done < "$TMPDIR/project.list"
 
 	pjhash="$(sha512sum "$TMPDIR/project.hash" | awk '{print $1}')" || :
-	badhash="y" && [ "$pjhash" = "$old_pjhash" ] && badhash="n"
+	[ "$pjhash" != "$old_pjhash" ] && badhash="y"
 	[ -f "$XBMK_CACHE/hash/$project$tree" ] || badhash="y"
 
 	printf "%s\n" "$pjhash" > "$XBMK_CACHE/hash/$project$tree" || \
 	    $err "!mk $XBMK_CACHE/hash/$project$tree"
 
-	[ "$badhash" = "n" ] || rm -Rf "src/$project/$tree" \
+	[ "$badhash" != "y" ] || rm -Rf "src/$project/$tree" \
 	    "elf/$project/$tree" "elf/$project/$target" || \
 	    $err "!rm $project $tree"; :
 }

From 115a66fddd3422c84e3911252dfb0c89febb9514 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 02:18:15 +0100
Subject: [PATCH 1128/1549] trees: unified handling of flags

this way, the error message will never be incorrect,
which i had to fix in a recent patch.

now, the same string is used for error messages and getopt.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/script/trees b/script/trees
index ea161368..9776d6c0 100755
--- a/script/trees
+++ b/script/trees
@@ -15,15 +15,15 @@ eval "`setvars "" xarch srcdir premake gnatdir xlang mode makeargs elfdir cmd \
     defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs gccver gccfull \
     gnatver gnatfull gccdir cmakedir do_make badhash`"
 
-flags="-m/-u/-b/-c/-x/-f/-s/-l/-n/-d"
-
 main()
 {
+	flags="f:b:m:u:c:x:s:l:n:d:"
+
 	[ $# -lt 1 ] && $err "No argument provided"
 	[ "${1%-*}" = "$1" ] && $err \
 	    "First argument must be a flag ($flags)"
 
-	while getopts f:b:m:u:c:x:s:l:n:d: option; do
+	while getopts $flags option; do
 		[ -n "$_f" ] && $err "only one flag is permitted"
 		_f="$1"
 

From c189257888af33a435ca483838ae44069585d227 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 02:28:14 +0100
Subject: [PATCH 1129/1549] trees: don't build dependencies if dry=":"

build_depend is already blanked anyway, but it can't
hurt to have an extra check here.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/script/trees b/script/trees
index 9776d6c0..07991199 100755
--- a/script/trees
+++ b/script/trees
@@ -160,7 +160,7 @@ configure_project()
 	done
 	[ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1
 	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
-	[ -z "$mode" ] && build_dependencies
+	[ -z "$mode" ] && $dry build_dependencies
 
 	mdir="$xbmkpwd/config/submodule/$project"
 	[ -n "$tree" ] && mdir="$mdir/$tree"

From 51798278397ce0bc55648feee4e2dd7e4f12ebf0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 12:56:05 +0100
Subject: [PATCH 1130/1549] build: make coreboot building an else in "roms"

Otherwise, the current return prevents set -u -e
after the case/switch block, which is a problem if
set +u +e was done at any point before the return.

Remove the return in the roms) section of the case/switch
block, and make the building of coreboot images part of
an else clause.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/build b/build
index f61018c6..809db781 100755
--- a/build
+++ b/build
@@ -47,10 +47,10 @@ main()
 	roms)
 		if [ $# -gt 1 ] && [ "$2" = "serprog" ]; then
 			mk -b stm32-vserprog pico-serprog
-			return 0
-		fi
-		shift 1
-		x_ ./mk -b coreboot "$@" ;;
+		else
+			shift 1
+			x_ ./mk -b coreboot "$@"
+		fi ;;
 	*)
 		[ -f "$spath" ] || $err "bad command"
 		$shcmd

From e5262da4be7f1d5bd88b3bec0c600e92643b9f20 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 13:07:27 +0100
Subject: [PATCH 1131/1549] trees: tidy up configure_project()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/script/trees b/script/trees
index 07991199..3397f301 100755
--- a/script/trees
+++ b/script/trees
@@ -166,12 +166,11 @@ configure_project()
 	[ -n "$tree" ] && mdir="$mdir/$tree"
 	[ -f "CHANGELOG" ] || check_project_hashes
 
-	if [ "$do_make" != "n" ]; then
-		x_ ./mk -f "$project" "$target"
-		return 0
+	if [ "$do_make" = "n" ]; then
+		[ -f "CHANGELOG" ] || fetch_${cmd#build_}
+		return 1
 	fi
-	[ -f "CHANGELOG" ] || fetch_${cmd#build_}
-	return 1
+	x_ ./mk -f "$project" "$target"
 }
 
 build_dependencies()

From 57d58527fd05a71d3b6e4bc825ff47e28241da32 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 13:17:13 +0100
Subject: [PATCH 1132/1549] trees: unify the execution of mkhelper commands

provide it in a new function: mkhelp()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 script/trees | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/script/trees b/script/trees
index 3397f301..bdc72a53 100755
--- a/script/trees
+++ b/script/trees
@@ -104,9 +104,8 @@ build_targets()
 		target="$x"
 		printf "'make %s', '%s', '%s'\n" "$mode" "$project" "$target"
 		x_ handle_defconfig
-		[ -n "$mode" ] || [ -z "$postmake" ] || $postmake || \
-		    $err "$project/$target: !postmake: $postmake"; :
-	done; return 0
+		mkhelp "$postmake"
+	done; :
 }
 
 handle_defconfig()
@@ -342,13 +341,13 @@ handle_makefile()
 
 run_make_command()
 {
-	[ -z "$premake" ] || [ -n "$mode" ] || $premake || $err "!$premake"
+	mkhelp "$premake"
 	$dry check_cmake "$srcdir" && [ -z "$mode" ] && \
 	    $dry check_autoconf "$srcdir"
 	$dry check_makefile "$srcdir" || return 1
 
 	$dry make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs || $err "!$mode"
-	[ -z "$mkhelper" ] || [ -n "$mode" ] || $mkhelper || $err "!$mkhelper"
+	mkhelp "$mkhelper"
 
 	[ "$mode" != "clean" ] || \
 	    $dry make -C "$srcdir" $cleanargs distclean || :; :
@@ -379,6 +378,11 @@ check_makefile()
 	    [ -f "$1/GNUmakefile" ] || return 1; :
 }
 
+mkhelp()
+{
+	[ -z "$1" ] || [ -n "$mode" ] || "$1" || $err "mkhelp: !$1"; :
+}
+
 copy_elf()
 {
 	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do

From d7f80ebe71e07552459a6913cf89996dd002a1d2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 13:31:28 +0100
Subject: [PATCH 1133/1549] move build to mk

i'm removing all the backward-compatibility in the
build system, so that only the ./mk command is available

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 build | 147 ---------------------------------------------------------
 mk    | 148 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 147 insertions(+), 148 deletions(-)
 delete mode 100755 build
 mode change 120000 => 100755 mk

diff --git a/build b/build
deleted file mode 100755
index 809db781..00000000
--- a/build
+++ /dev/null
@@ -1,147 +0,0 @@
-#!/usr/bin/env sh
-# SPDX-License-Identifier: GPL-3.0-or-later
-# Copyright (c) 2020-2025 Leah Rowe <leah@libreboot.org>
-# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
-
-set -u -e
-
-if [ "./${0##*/}" != "${0}" ] || [ ! -f "build" ] || [ -L "build" ]; then
-	printf "You must run this in the proper work directory.\n" 1>&2
-	exit 1
-fi
-
-. "include/lib.sh"
-. "include/vendor.sh"
-. "include/mrc.sh"
-
-eval "`setvars "" vdir src_dirname srcdir mode xp ser`"
-err="fail"
-
-main()
-{
-	[ $# -lt 1 ] && $err "bad command"
-
-	spath="script/$1"
-	shcmd="shift 1"
-	if [ "${1#-*}" != "$1" ]; then
-		spath="script/trees"
-		shcmd=":"
-	fi
-
-	for g in "command -v git" "git config --global user.name" \
-	    "git config --global user.email" "git_init"; do
-		eval "$g 1>/dev/null 2>/dev/null || $err \"Unconfigured: $g\""
-	done
-
-	case "${spath#script/}" in
-	version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
-	release)
-		shift 1
-		mkrelease "$@" ;;
-	inject)
-		shift 1
-		vendor_inject "$@" ;;
-	download)
-		shift 1
-		vendor_download "$@" ;;
-	roms)
-		if [ $# -gt 1 ] && [ "$2" = "serprog" ]; then
-			mk -b stm32-vserprog pico-serprog
-		else
-			shift 1
-			x_ ./mk -b coreboot "$@"
-		fi ;;
-	*)
-		[ -f "$spath" ] || $err "bad command"
-		$shcmd
-		"$spath" "$@" || $err "excmd: $spath $(echo "$@")" ;;
-	esac
-	set -u -e # some commands disable them. turn them on!
-}
-
-git_init()
-{
-	[ -L ".git" ] && return 1
-	[ -e ".git" ] && return 0
-	eval "`setvars "$(date -Rud @$versiondate)" cdate _nogit`"
-
-	git init || return 1
-	git add -A . || return 1
-	git commit -m "$projectname $version" --date "$cdate" \
-	    --author="xbmk <xbmk@example.com>" || return 1
-	git tag -a "$version" -m "$projectname $version" || return 1
-}
-
-mkrelease()
-{
-	export XBMK_RELEASE="y"
-
-	vdir="release"
-	while getopts d:m: option; do
-		[ -z "$OPTARG" ] && $err "empty argument not allowed"
-		case "$option" in
-		d) vdir="$OPTARG" ;;
-		m) mode="$OPTARG" ;;
-		*) $err "invalid option '-$option'" ;;
-		esac
-	done
-
-	vdir="$vdir/$version"
-	src_dirname="${relname}_src"
-	srcdir="$vdir/$src_dirname"
-
-	[ -e "$vdir" ] && $err "already exists: \"$vdir\""
-	mkdir -p "$vdir" || $err "mkvdir: !mkdir -p \"$vdir\""
-	git clone . "$srcdir" || $err "mkdir: !gitclone \"$srcdir\""
-	touch "$srcdir/lock" || $err "can't make lock file in $srcdir/"
-
-	build_release
-
-	printf "\n\nDONE! Check release files under %s\n" "$vdir"
-}
-
-build_release()
-{
-	(
-	cd "$srcdir" || $err "$vdir: !cd \"$srcdir\""
-	./mk -f
-	x_ rm -Rf tmp
-	rmgit .
-	x_ mv src/docs docs
-	) || $err "can't create release files"
-
-	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
-	    --abbrev-commit > "$srcdir/CHANGELOG" || $err "!gitlog $srcdir"
-	rm -f "$srcdir/lock" || $err "can't remove lock file in $srcdir"
-
-	(
-	cd "${srcdir%/*}" || $err "$vdir: mktarball \"$srcdir\""
-	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || $err "$vdir: mksrc"
-	) || $err "can't create src tarball"
-	[ "$mode" = "src" ] && return 0
-
-	touch "$srcdir/lock" || $err "can't make lock file in $srcdir/"
-	(
-	cd "$srcdir" || $err "$vdir: 2 !cd \"$srcdir\""
-	mk -b coreboot pico-serprog stm32-vserprog pcsx-redux
-	x_ mv bin ../roms
-	) || $err "can't build rom images"
-
-	rm -Rf "$srcdir" || $err "!rm -Rf $srcdir"
-}
-
-fail()
-{
-	tmp_cleanup || printf "WARNING: can't rm tmpfiles: %s\n" "$TMPDIR" 1>&2
-	err_ "${1}"
-}
-
-tmp_cleanup()
-{
-	[ "$xbmk_parent" = "y" ] || return 0
-	[ "$TMPDIR" = "/tmp" ] || rm -Rf "$TMPDIR" || return 1
-	rm -f lock || return 1
-}
-
-main "$@"
-tmp_cleanup || err_ "can't rm TMPDIR upon non-zero exit: $TMPDIR"
diff --git a/mk b/mk
deleted file mode 120000
index c795b054..00000000
--- a/mk
+++ /dev/null
@@ -1 +0,0 @@
-build
\ No newline at end of file
diff --git a/mk b/mk
new file mode 100755
index 00000000..6dfe0382
--- /dev/null
+++ b/mk
@@ -0,0 +1,147 @@
+#!/usr/bin/env sh
+# SPDX-License-Identifier: GPL-3.0-or-later
+# Copyright (c) 2020-2025 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
+
+set -u -e
+
+if [ "./${0##*/}" != "${0}" ] || [ ! -f "mk" ] || [ -L "mk" ]; then
+	printf "You must run this in the proper work directory.\n" 1>&2
+	exit 1
+fi
+
+. "include/lib.sh"
+. "include/vendor.sh"
+. "include/mrc.sh"
+
+eval "`setvars "" vdir src_dirname srcdir mode xp ser`"
+err="fail"
+
+main()
+{
+	[ $# -lt 1 ] && $err "bad command"
+
+	spath="script/$1"
+	shcmd="shift 1"
+	if [ "${1#-*}" != "$1" ]; then
+		spath="script/trees"
+		shcmd=":"
+	fi
+
+	for g in "command -v git" "git config --global user.name" \
+	    "git config --global user.email" "git_init"; do
+		eval "$g 1>/dev/null 2>/dev/null || $err \"Unconfigured: $g\""
+	done
+
+	case "${spath#script/}" in
+	version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
+	release)
+		shift 1
+		mkrelease "$@" ;;
+	inject)
+		shift 1
+		vendor_inject "$@" ;;
+	download)
+		shift 1
+		vendor_download "$@" ;;
+	roms)
+		if [ $# -gt 1 ] && [ "$2" = "serprog" ]; then
+			mk -b stm32-vserprog pico-serprog
+		else
+			shift 1
+			x_ ./mk -b coreboot "$@"
+		fi ;;
+	*)
+		[ -f "$spath" ] || $err "bad command"
+		$shcmd
+		"$spath" "$@" || $err "excmd: $spath $(echo "$@")" ;;
+	esac
+	set -u -e # some commands disable them. turn them on!
+}
+
+git_init()
+{
+	[ -L ".git" ] && return 1
+	[ -e ".git" ] && return 0
+	eval "`setvars "$(date -Rud @$versiondate)" cdate _nogit`"
+
+	git init || return 1
+	git add -A . || return 1
+	git commit -m "$projectname $version" --date "$cdate" \
+	    --author="xbmk <xbmk@example.com>" || return 1
+	git tag -a "$version" -m "$projectname $version" || return 1
+}
+
+mkrelease()
+{
+	export XBMK_RELEASE="y"
+
+	vdir="release"
+	while getopts d:m: option; do
+		[ -z "$OPTARG" ] && $err "empty argument not allowed"
+		case "$option" in
+		d) vdir="$OPTARG" ;;
+		m) mode="$OPTARG" ;;
+		*) $err "invalid option '-$option'" ;;
+		esac
+	done
+
+	vdir="$vdir/$version"
+	src_dirname="${relname}_src"
+	srcdir="$vdir/$src_dirname"
+
+	[ -e "$vdir" ] && $err "already exists: \"$vdir\""
+	mkdir -p "$vdir" || $err "mkvdir: !mkdir -p \"$vdir\""
+	git clone . "$srcdir" || $err "mkdir: !gitclone \"$srcdir\""
+	touch "$srcdir/lock" || $err "can't make lock file in $srcdir/"
+
+	build_release
+
+	printf "\n\nDONE! Check release files under %s\n" "$vdir"
+}
+
+build_release()
+{
+	(
+	cd "$srcdir" || $err "$vdir: !cd \"$srcdir\""
+	./mk -f
+	x_ rm -Rf tmp
+	rmgit .
+	x_ mv src/docs docs
+	) || $err "can't create release files"
+
+	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
+	    --abbrev-commit > "$srcdir/CHANGELOG" || $err "!gitlog $srcdir"
+	rm -f "$srcdir/lock" || $err "can't remove lock file in $srcdir"
+
+	(
+	cd "${srcdir%/*}" || $err "$vdir: mktarball \"$srcdir\""
+	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || $err "$vdir: mksrc"
+	) || $err "can't create src tarball"
+	[ "$mode" = "src" ] && return 0
+
+	touch "$srcdir/lock" || $err "can't make lock file in $srcdir/"
+	(
+	cd "$srcdir" || $err "$vdir: 2 !cd \"$srcdir\""
+	mk -b coreboot pico-serprog stm32-vserprog pcsx-redux
+	x_ mv bin ../roms
+	) || $err "can't build rom images"
+
+	rm -Rf "$srcdir" || $err "!rm -Rf $srcdir"
+}
+
+fail()
+{
+	tmp_cleanup || printf "WARNING: can't rm tmpfiles: %s\n" "$TMPDIR" 1>&2
+	err_ "${1}"
+}
+
+tmp_cleanup()
+{
+	[ "$xbmk_parent" = "y" ] || return 0
+	[ "$TMPDIR" = "/tmp" ] || rm -Rf "$TMPDIR" || return 1
+	rm -f lock || return 1
+}
+
+main "$@"
+tmp_cleanup || err_ "can't rm TMPDIR upon non-zero exit: $TMPDIR"

From a03bb793aeaa497b03f9addca16e70644d8ec288 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 13:37:21 +0100
Subject: [PATCH 1134/1549] remove update/vendor symlinks

these are obsolete commands for backward compatibility,
but they are being removed before the next release.

the documentation has for some now only referenced use
of the ./mk commands, making lbmk live up to its name!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 update | 1 -
 vendor | 1 -
 2 files changed, 2 deletions(-)
 delete mode 120000 update
 delete mode 120000 vendor

diff --git a/update b/update
deleted file mode 120000
index c795b054..00000000
--- a/update
+++ /dev/null
@@ -1 +0,0 @@
-build
\ No newline at end of file
diff --git a/vendor b/vendor
deleted file mode 120000
index c795b054..00000000
--- a/vendor
+++ /dev/null
@@ -1 +0,0 @@
-build
\ No newline at end of file

From 23b942c83e93f529f255005d37f7ca8dea9a2ccf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 13:44:05 +0100
Subject: [PATCH 1135/1549] lib.sh: hardcode projectname/projectsite

remove the corresponding files, containing these strings

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 13 +++++++------
 projectname    |  1 -
 projectsite    |  1 -
 3 files changed, 7 insertions(+), 8 deletions(-)
 delete mode 100644 projectname
 delete mode 100644 projectsite

diff --git a/include/lib.sh b/include/lib.sh
index 68c2b847..e36f8e1d 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -6,6 +6,9 @@
 export LC_COLLATE=C
 export LC_ALL=C
 
+projectname="libreboot"
+projectsite="https://libreboot.org/"
+
 [ -z "${PATH+x}" ] && \
     export PATH="/usr/local/bin:/usr/bin:/bin:/usr/local/games:/usr/games"
 xbmkpath="$PATH"
@@ -43,13 +46,12 @@ chkvars()
 	done; :
 }
 
-eval "`setvars "" _nogit board reinstall versiondate projectsite projectname \
-    aur_notice configdir datadir version relname xbmk_parent`"
+eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
+    datadir version relname xbmk_parent`"
 
-for fv in projectname projectsite version versiondate; do
+for fv in version versiondate; do
 	eval "[ ! -f \"$fv\" ] || read -r $fv < \"$fv\" || :"
 done
-chkvars projectname projectsite
 
 setcfg()
 {
@@ -164,7 +166,7 @@ version_="$version"
 versiondate_="$versiondate"
 [ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
     --pretty='%ct' HEAD)" || versiondate="$versiondate_"
-for p in projectname version versiondate projectsite; do
+for p in version versiondate; do
 	chkvars "$p"
 	eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
 done
@@ -189,7 +191,6 @@ mkrom_tarball()
 {
 	printf "%s\n" "$version" > "$1/version" || $err "$1 !version"
 	printf "%s\n" "$versiondate" > "$1/versiondate" || $err "$1 !vdate"
-	printf "%s\n" "$projectname" > "$1/projectname" || $err "$1 !pname"
 
 	mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz"
 	x_ rm -Rf "$1"
diff --git a/projectname b/projectname
deleted file mode 100644
index aa4ff178..00000000
--- a/projectname
+++ /dev/null
@@ -1 +0,0 @@
-libreboot
diff --git a/projectsite b/projectsite
deleted file mode 100644
index bb74f9d7..00000000
--- a/projectsite
+++ /dev/null
@@ -1 +0,0 @@
-https://libreboot.org/

From f0c629dcc6c3f2242a735567cdd6855fa108d1a5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 13:51:49 +0100
Subject: [PATCH 1136/1549] lib.sh: write version/versiondate to dotfiles

write to .version and .versiondate, instead
of version and versiondate.

this will hide them to avoid visual clutter while
analysing files within lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .gitignore     |  2 ++
 include/lib.sh | 16 ++++++++--------
 2 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/.gitignore b/.gitignore
index 177512a7..4979e1f9 100644
--- a/.gitignore
+++ b/.gitignore
@@ -24,6 +24,8 @@
 /push
 /version
 /versiondate
+/.version
+/.versiondate
 /vendorfiles/
 *me.bin
 *sch5545ec.bin
diff --git a/include/lib.sh b/include/lib.sh
index e36f8e1d..d4d7127e 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -50,7 +50,7 @@ eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
     datadir version relname xbmk_parent`"
 
 for fv in version versiondate; do
-	eval "[ ! -f \"$fv\" ] || read -r $fv < \"$fv\" || :"
+	eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
 done
 
 setcfg()
@@ -155,10 +155,10 @@ x_() {
 	    $err "Unhandled non-zero exit: $(echo "$@")"; :
 }
 
-[ -e ".git" ] || [ -f "version" ] || printf "unknown\n" > version || \
-    $err "Cannot generate unknown version file"
-[ -e ".git" ] || [ -f "versiondate" ] || printf "1716415872\n" > versiondate \
-    || $err "Cannot generate unknown versiondate file"
+[ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > .version || \
+    $err "Cannot generate unknown .version file"
+[ -e ".git" ] || [ -f ".versiondate" ] || printf "1716415872\n" > \
+    .versiondate || $err "Cannot generate unknown .versiondate file"
 
 version_="$version"
 [ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
@@ -168,7 +168,7 @@ versiondate_="$versiondate"
     --pretty='%ct' HEAD)" || versiondate="$versiondate_"
 for p in version versiondate; do
 	chkvars "$p"
-	eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
+	eval "x_ printf \"%s\\n\" \"\$$p\" > .$p"
 done
 relname="$projectname-$version"
 export LOCALVERSION="-$projectname-${version%%-*}"
@@ -189,8 +189,8 @@ remkdir()
 
 mkrom_tarball()
 {
-	printf "%s\n" "$version" > "$1/version" || $err "$1 !version"
-	printf "%s\n" "$versiondate" > "$1/versiondate" || $err "$1 !vdate"
+	printf "%s\n" "$version" > "$1/.version" || $err "$1 !version"
+	printf "%s\n" "$versiondate" > "$1/.versiondate" || $err "$1 !vdate"
 
 	mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz"
 	x_ rm -Rf "$1"

From 3d03dd1a507e1d7469abb1a4dbae06ef39f11e5b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 14:24:10 +0100
Subject: [PATCH 1137/1549] mk: remove the legacy "roms" command

we don't need it. the documentation only tells you
now to run ./mk -b coreboot target1 target2 etc

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/mk b/mk
index 6dfe0382..72dae8b2 100755
--- a/mk
+++ b/mk
@@ -44,13 +44,6 @@ main()
 	download)
 		shift 1
 		vendor_download "$@" ;;
-	roms)
-		if [ $# -gt 1 ] && [ "$2" = "serprog" ]; then
-			mk -b stm32-vserprog pico-serprog
-		else
-			shift 1
-			x_ ./mk -b coreboot "$@"
-		fi ;;
 	*)
 		[ -f "$spath" ] || $err "bad command"
 		$shcmd

From 3181ac501269aedea3bdde41718800a34417e140 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 14:44:21 +0100
Subject: [PATCH 1138/1549] script/trees: merge with mk and delete script/

script/ no longer exists. this means that the
only executable script in lbmk is now mk.

script/trees was never called directly; instead,
we used ./update trees in the past, then just ./mk.

this is part of a larger audit to simplify lbmk,
in preparation for the next Libreboot release.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk           | 417 +++++++++++++++++++++++++++++++++++++++++++++++++--
 script/trees | 396 ------------------------------------------------
 2 files changed, 404 insertions(+), 409 deletions(-)
 delete mode 100755 script/trees

diff --git a/mk b/mk
index 72dae8b2..c8fdffa7 100755
--- a/mk
+++ b/mk
@@ -2,6 +2,8 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 # Copyright (c) 2020-2025 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
+# Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
+# Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
 
 set -u -e
 
@@ -20,20 +22,14 @@ err="fail"
 main()
 {
 	[ $# -lt 1 ] && $err "bad command"
-
-	spath="script/$1"
-	shcmd="shift 1"
-	if [ "${1#-*}" != "$1" ]; then
-		spath="script/trees"
-		shcmd=":"
-	fi
+	rval=0
 
 	for g in "command -v git" "git config --global user.name" \
 	    "git config --global user.email" "git_init"; do
 		eval "$g 1>/dev/null 2>/dev/null || $err \"Unconfigured: $g\""
 	done
 
-	case "${spath#script/}" in
+	case "$1" in
 	version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
 	release)
 		shift 1
@@ -44,12 +40,12 @@ main()
 	download)
 		shift 1
 		vendor_download "$@" ;;
-	*)
-		[ -f "$spath" ] || $err "bad command"
-		$shcmd
-		"$spath" "$@" || $err "excmd: $spath $(echo "$@")" ;;
+	-*)
+		rval=1 ;;
+	*) $err "bad command"
 	esac
 	set -u -e # some commands disable them. turn them on!
+	return $rval
 }
 
 git_init()
@@ -136,5 +132,400 @@ tmp_cleanup()
 	rm -f lock || return 1
 }
 
-main "$@"
+if main "$@"; then
+	tmp_cleanup || err_ "can't rm TMPDIR upon non-zero exit: $TMPDIR"
+	exit 0
+fi
+
+# what follows was formerly script/trees, whose main() is now trees()
+
+. "include/git.sh"
+
+eval "`setvars "" xarch srcdir premake gnatdir xlang mode makeargs elfdir cmd \
+    project target target_dir targets xtree _f release bootstrapargs mkhelper \
+    autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
+    defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs gccver gccfull \
+    gnatver gnatfull gccdir cmakedir do_make badhash`"
+
+trees()
+{
+	flags="f:b:m:u:c:x:s:l:n:d:"
+
+	[ $# -lt 1 ] && $err "No argument provided"
+	[ "${1%-*}" = "$1" ] && $err \
+	    "First argument must be a flag ($flags)"
+
+	while getopts $flags option; do
+		[ -n "$_f" ] && $err "only one flag is permitted"
+		_f="$1"
+
+		case "$_f" in
+		-d) dry=":" ;;
+		-b) : ;;
+		-u) mode="oldconfig" ;;
+		-m) mode="menuconfig" ;;
+		-c) mode="distclean" ;;
+		-x) mode="crossgcc-clean" ;;
+		-f)
+			do_make="n"
+			dry=":" ;;
+		-s) mode="savedefconfig" ;;
+		-l) mode="olddefconfig" ;;
+		-n) mode="nconfig" ;;
+		*) $err "invalid option '-$option'" ;;
+		esac
+
+		if [ -z "${OPTARG+x}" ]; then
+			shift 1
+			break
+		fi
+
+		project="${OPTARG#src/}"
+		shift 2
+	done
+	[ -z "$_f" ] && $err "missing flag ($flags)"
+	if [ -z "$project" ]; then
+		mk $_f $(ls -1 config/git)
+		return 1
+	fi
+
+	[ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined"
+
+	for d in "elf" "config/data" "config" "src"; do
+		eval "${d#*/}dir=\"$d/$project\""
+	done
+	dest_dir="$elfdir"
+
+	listfile="$datadir/build.list"
+	[ -f "$listfile" ] || listfile="" # optional on all projects
+
+	mkhelpercfg="$datadir/mkhelper.cfg"
+	if e "$mkhelpercfg" f missing; then
+		mkhelpercfg="$TMPDIR/mkhelper.cfg"
+		x_ touch "$mkhelpercfg"
+	fi
+
+	targets="$*"
+	cmd="build_targets $targets"
+	singletree "$project" && cmd="build_project"
+
+	remkdir "${tmpgit%/*}"
+}
+
+build_project()
+{
+	configure_project "$configdir" || return 0
+	[ ! -f "$listfile" ] || $dry elfcheck || return 0
+
+	[ "$mode" = "distclean" ] && mode="clean"
+	run_make_command || return 0
+
+	[ -n "$mode" ] || $dry copy_elf; :
+}
+
+build_targets()
+{
+	[ -d "$configdir" ] || $err "directory, $configdir, does not exist"
+	[ $# -gt 0 ] || targets="$(ls -1 "$configdir")" || $err "!o $configdir"
+
+	for x in $targets; do
+		unset CROSS_COMPILE
+		export PATH="$xbmkpath"
+		[ "$x" = "list" ] && x_ ls -1 "config/$project" && \
+		    listfile="" && break
+		target="$x"
+		printf "'make %s', '%s', '%s'\n" "$mode" "$project" "$target"
+		x_ handle_defconfig
+		mkhelp "$postmake"
+	done; :
+}
+
+handle_defconfig()
+{
+	target_dir="$configdir/$target"
+
+	[ -f "CHANGELOG" ] || fetch_project "$project"
+	configure_project "$target_dir" || return 0
+	x_ mkdir -p "$elfdir/$target"
+
+	chkvars tree
+	srcdir="src/$project/$tree"
+
+	if [ "$mode" = "distclean" ] || [ "$mode" = "crossgcc-clean" ]; then
+		[ -d "$srcdir" ] || return 0
+	fi
+	[ -z "$mode" ] && $dry check_cross_compiler
+
+	for y in "$target_dir/config"/*; do
+		[ "$_f" = "-d" ] || [ -f "$y" ] || continue
+		[ "$_f" = "-d" ] || defconfig="$y"
+
+		[ -n "$mode" ] || check_defconfig || continue
+		handle_makefile
+		[ -n "$mode" ] || $dry copy_elf
+	done; :
+}
+
+configure_project()
+{
+	eval "`setvars "" cleanargs build_depend autoconfargs xtree postmake \
+	    tree_depend makeargs btype mkhelper bootstrapargs premake release \
+	    xarch xlang badhash`"
+	_tcfg="$1/target.cfg"
+	[ -f "$_tcfg" ] || btype="auto"
+	[ -f "$datadir/mkhelper.cfg" ] && \
+	    eval "`setcfg "$datadir/mkhelper.cfg"`"
+
+	while [ -f "$_tcfg" ] || [ "$cmd" != "build_project" ]; do
+		eval "`setvars "" rev tree`"
+		eval "`setcfg "$_tcfg"`"
+		printf "Loading %s config: %s\n" "$project" "$_tcfg"
+
+		[ "$_f" = "-d" ] && build_depend="" # dry run
+		[ "$cmd" = "build_project" ] && break
+		[ "$do_make" != "n" ] && break
+
+		[ "${_tcfg%/*/target.cfg}" = "${_tcfg%"/$tree/target.cfg"}" ] \
+		    && break
+		_tcfg="${_tcfg%/*/target.cfg}/$tree/target.cfg"
+	done
+	[ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1
+	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
+	[ -z "$mode" ] && $dry build_dependencies
+
+	mdir="$xbmkpwd/config/submodule/$project"
+	[ -n "$tree" ] && mdir="$mdir/$tree"
+	[ -f "CHANGELOG" ] || check_project_hashes
+
+	if [ "$do_make" = "n" ]; then
+		[ -f "CHANGELOG" ] || fetch_${cmd#build_}
+		return 1
+	fi
+	x_ ./mk -f "$project" "$target"
+}
+
+build_dependencies()
+{
+	for bd in $build_depend; do
+		bd_p="${bd%%/*}"
+		bd_t="${bd##*/}"
+		[ -z "$bd_p" ] && $dry $err "$project/$tree: !bd '$bd'"
+		[ "${bd##*/}" = "$bd" ] && bd_t=""
+		[ -z "$bd_p" ] || $dry ./mk -b $bd_p $bd_t \
+		    || $err "!mk $project/$tree $bd_p/$bd_t"; :
+	done; :
+}
+
+check_project_hashes()
+{
+	mkdir -p "$XBMK_CACHE/hash" || $err "!mkdir '$XBMK_CACHE/hash'"
+	old_pjhash=""
+	[ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
+	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
+
+	x_ rm -f "$TMPDIR/project.list" "$TMPDIR/project.hash" \
+	    "$TMPDIR/project.tmp"
+	x_ touch "$TMPDIR/project.tmp"
+	x_ touch "$TMPDIR/project.hash"
+
+	for rmchk in "$datadir" "$configdir/$tree" "$mdir"; do
+		[ -d "$rmchk" ] || continue
+		find "$rmchk" -type f -not -path "*/.git*/*" >> \
+		    "$TMPDIR/project.tmp" || $err "!find $rmchk > project.tmp"
+	done
+	sort "$TMPDIR/project.tmp" > "$TMPDIR/project.list" || \
+	    $err "!sort project tmp/list"
+
+	while read -r rmchk; do
+		[ ! -f "$rmchk" ] || sha512sum "$rmchk" | awk \
+		    '{print $1}' >> "$TMPDIR/project.hash" || $err "!h $rmchk"
+	done < "$TMPDIR/project.list"
+
+	pjhash="$(sha512sum "$TMPDIR/project.hash" | awk '{print $1}')" || :
+	[ "$pjhash" != "$old_pjhash" ] && badhash="y"
+	[ -f "$XBMK_CACHE/hash/$project$tree" ] || badhash="y"
+
+	printf "%s\n" "$pjhash" > "$XBMK_CACHE/hash/$project$tree" || \
+	    $err "!mk $XBMK_CACHE/hash/$project$tree"
+
+	[ "$badhash" != "y" ] || rm -Rf "src/$project/$tree" \
+	    "elf/$project/$tree" "elf/$project/$target" || \
+	    $err "!rm $project $tree"; :
+}
+
+check_cross_compiler()
+{
+	xgccargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
+	for _xarch in $xarch; do
+		cbdir="src/coreboot/$tree"
+		[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
+		[ -n "$xtree" ] && cbdir="src/coreboot/$xtree"
+
+		x_ ./mk -f coreboot "${cbdir#src/coreboot/}"
+
+		export PATH="$xbmkpwd/$cbdir/util/crossgcc/xgcc/bin:$PATH"
+		export CROSS_COMPILE="${xarch% *}-"
+		[ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
+
+		xfix="${_xarch%-*}" && [ "$xfix" = "x86_64" ] && xfix="x64"
+
+		# match gnat-X to gcc
+		check_gnu_path gcc gnat || check_gnu_path gnat gcc || \
+		    $err "Cannot match host GCC/GNAT versions"
+
+		# sometimes buildgcc fails for like no reason. try twice.
+		make -C "$cbdir" crossgcc-$xfix $xgccargs || \
+		    make -C "$cbdir" crossgcc-$xfix $xgccargs || \
+		    $err "!mkxgcc $project/$xtree '$xfix' '$xgccargs'"
+
+		# we only want to mess with hostcc to build xgcc
+		rm -f "$XBMK_CACHE/gnupath/"* || \
+		    $err "Cannot clear gnupath/"; :
+	done; :
+}
+
+# fix mismatching gcc/gnat versions on debian trixie/sid. as of december 2024,
+# trixie/sid had gnat-13 as gnat and gcc-14 as gcc, but has gnat-14 in apt. in
+# some cases, gcc 13+14 and gnat-13 are present; or gnat-14 and gcc-14, but
+# gnat in PATH never resolves to gnat-14, because gnat-14 was "experimental"
+check_gnu_path()
+{
+	[ $# -lt 2 ] && $err "check_gnu_path: Too few arguments"
+	[ "$1" = "$2" ] && $err "check_gnu_path: Both arguments identical"
+	for _gnuarg in 1 2; do
+		eval "[ \"\$$_gnuarg\" = \"gcc\" ] && continue"
+		eval "[ \"\$$_gnuarg\" = \"gnat\" ] && continue"
+		$err "check_gnu_path: Invalid argument \"$_gnuarg\""
+	done
+	command -v "$1" 1>/dev/null || $err "Host '$1' unavailable"
+
+	eval "`setvars "" gccver gccfull gnatver gnatfull gccdir gnatdir`"
+	gnu_setver "$1" "$1" || $err "Command '$1' unavailable."
+	gnu_setver "$2" "$2" || :
+
+	eval "[ -z \"\$$1ver\" ] && $err \"Cannot detect host '$1' version\""
+	[ "$gnatfull" = "$gccfull" ] && return 0
+
+	eval "$1dir=\"$(dirname "$(command -v "$1")")\""
+	eval "_gnudir=\"\$$1dir\"; _gnuver=\"\$$1ver\""
+	for _gnubin in "$_gnudir/$2-"*; do
+		[ -f "$_gnubin" ] || continue
+		[ "${_gnubin#"$_gnudir/$2-"}" = "$_gnuver" ] || continue
+		_gnuver="${_gnubin#"$_gnudir/$2-"}"; break
+	done
+	gnu_setver "$2" "$_gnudir/$2-$_gnuver" || return 1
+	[ "$gnatfull" = "$gccfull" ] || return 1
+
+	(
+	rm -f "$XBMK_CACHE/gnupath/"* || $err "Cannot clear gnupath/"
+	cd "$XBMK_CACHE/gnupath" || $err "Can't cd to gnupath/"
+	for _gnubin in "$_gnudir/$2"*"-$_gnuver"; do
+		[ -e "$_gnubin" ] || continue
+		_gnuutil="${_gnubin##*/}"
+		x_ ln -s "$_gnubin" "${_gnuutil%"-$_gnuver"}"
+	done
+	) || $err "Cannot create $2-$_gnuver link in $_gnudir"; :
+}
+
+gnu_setver()
+{
+	eval "$2 --version 1>/dev/null 2>/dev/null || return 1"
+	eval "$1ver=\"`"$2" --version 2>/dev/null | head -n1`\""
+	eval "$1ver=\"\${$1ver##* }\""
+	eval "$1full=\"\$$1ver\""
+	eval "$1ver=\"\${$1ver%%.*}\""; :
+}
+
+check_defconfig()
+{
+	[ -f "$defconfig" ] || $dry $err "$project/$target: missing defconfig"
+	dest_dir="$elfdir/$target/${defconfig#"$target_dir/config/"}"
+
+	$dry elfcheck || return 1 # skip build if a previous one exists
+	$dry x_ mkdir -p "$dest_dir"
+}
+
+elfcheck()
+{
+	# TODO: very hacky check. do it properly (based on build.list)
+	for elftest in "$dest_dir"/*; do
+		[ -e "$elftest" ] && e "$elftest" f && return 1
+	done; :
+}
+
+handle_makefile()
+{
+	$dry check_makefile "$srcdir" && x_ make -C "$srcdir" $cleanargs clean
+	[ -f "$defconfig" ] && x_ cp "$defconfig" "$srcdir/.config"
+	[ -n "$mode" ] || [ -n "$btype" ] || $dry make -C \
+	    "$srcdir" silentoldconfig || make -C "$srcdir" oldconfig || :
+
+	run_make_command || $err "handle_makefile $srcdir: no makefile!"
+
+	_copy=".config" && [ "$mode" = "savedefconfig" ] && _copy="defconfig"
+	[ "${mode%config}" = "$mode" ] || \
+	    $dry x_ cp "$srcdir/$_copy" "$defconfig"
+
+	[ -e "$srcdir/.git" ] && [ "$project" = "u-boot" ] && \
+	    [ "$mode" = "distclean" ] && \
+		$dry x_ git -C "$srcdir" $cleanargs clean -fdx; :
+}
+
+run_make_command()
+{
+	mkhelp "$premake"
+	$dry check_cmake "$srcdir" && [ -z "$mode" ] && \
+	    $dry check_autoconf "$srcdir"
+	$dry check_makefile "$srcdir" || return 1
+
+	$dry make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs || $err "!$mode"
+	mkhelp "$mkhelper"
+
+	[ "$mode" != "clean" ] || \
+	    $dry make -C "$srcdir" $cleanargs distclean || :; :
+}
+
+check_cmake()
+{
+	[ -z "$cmakedir" ] || $dry check_makefile "$1" || cmake -B "$1" \
+	    "$1/$cmakedir" || $dry check_makefile "$1" || $err \
+	    "$1: !cmk $cmakedir"
+	[ -z "$cmakedir" ] || $dry check_makefile "$1" || \
+	    $err "check_cmake $1: can't generate Makefile"; :
+}
+
+check_autoconf()
+{
+	(
+	cd "$1" || $err "!cd $1"
+	[ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs
+	[ -f "autogen.sh" ] && x_ ./autogen.sh $autogenargs
+	[ -f "configure" ] && x_ ./configure $autoconfargs; :
+	) || $err "can't bootstrap project: $1"; :
+}
+
+check_makefile()
+{
+	[ -f "$1/Makefile" ] || [ -f "$1/makefile" ] || \
+	    [ -f "$1/GNUmakefile" ] || return 1; :
+}
+
+mkhelp()
+{
+	[ -z "$1" ] || [ -n "$mode" ] || "$1" || $err "mkhelp: !$1"; :
+}
+
+copy_elf()
+{
+	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do
+		[ -f "$srcdir/$f" ] && x_ cp "$srcdir/$f" "$dest_dir"
+	done < "$listfile"
+	x_ make clean -C "$srcdir" $cleanargs
+}
+
+if trees "$@"; then
+	. "$mkhelpercfg"
+	$cmd
+fi
+
 tmp_cleanup || err_ "can't rm TMPDIR upon non-zero exit: $TMPDIR"
diff --git a/script/trees b/script/trees
deleted file mode 100755
index bdc72a53..00000000
--- a/script/trees
+++ /dev/null
@@ -1,396 +0,0 @@
-#!/usr/bin/env sh
-# SPDX-License-Identifier: GPL-3.0-or-later
-# Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
-# Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org>
-
-set -u -e
-
-. "include/lib.sh"
-. "include/git.sh"
-
-eval "`setvars "" xarch srcdir premake gnatdir xlang mode makeargs elfdir cmd \
-    project target target_dir targets xtree _f release bootstrapargs mkhelper \
-    autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
-    defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs gccver gccfull \
-    gnatver gnatfull gccdir cmakedir do_make badhash`"
-
-main()
-{
-	flags="f:b:m:u:c:x:s:l:n:d:"
-
-	[ $# -lt 1 ] && $err "No argument provided"
-	[ "${1%-*}" = "$1" ] && $err \
-	    "First argument must be a flag ($flags)"
-
-	while getopts $flags option; do
-		[ -n "$_f" ] && $err "only one flag is permitted"
-		_f="$1"
-
-		case "$_f" in
-		-d) dry=":" ;;
-		-b) : ;;
-		-u) mode="oldconfig" ;;
-		-m) mode="menuconfig" ;;
-		-c) mode="distclean" ;;
-		-x) mode="crossgcc-clean" ;;
-		-f)
-			do_make="n"
-			dry=":" ;;
-		-s) mode="savedefconfig" ;;
-		-l) mode="olddefconfig" ;;
-		-n) mode="nconfig" ;;
-		*) $err "invalid option '-$option'" ;;
-		esac
-
-		if [ -z "${OPTARG+x}" ]; then
-			shift 1
-			break
-		fi
-
-		project="${OPTARG#src/}"
-		shift 2
-	done
-	[ -z "$_f" ] && $err "missing flag ($flags)"
-	if [ -z "$project" ]; then
-		mk $_f $(ls -1 config/git)
-		return 1
-	fi
-
-	[ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined"
-
-	for d in "elf" "config/data" "config" "src"; do
-		eval "${d#*/}dir=\"$d/$project\""
-	done
-	dest_dir="$elfdir"
-
-	listfile="$datadir/build.list"
-	[ -f "$listfile" ] || listfile="" # optional on all projects
-
-	mkhelpercfg="$datadir/mkhelper.cfg"
-	if e "$mkhelpercfg" f missing; then
-		mkhelpercfg="$TMPDIR/mkhelper.cfg"
-		x_ touch "$mkhelpercfg"
-	fi
-
-	targets="$*"
-	cmd="build_targets $targets"
-	singletree "$project" && cmd="build_project"
-
-	remkdir "${tmpgit%/*}"
-}
-
-build_project()
-{
-	configure_project "$configdir" || return 0
-	[ ! -f "$listfile" ] || $dry elfcheck || return 0
-
-	[ "$mode" = "distclean" ] && mode="clean"
-	run_make_command || return 0
-
-	[ -n "$mode" ] || $dry copy_elf; :
-}
-
-build_targets()
-{
-	[ -d "$configdir" ] || $err "directory, $configdir, does not exist"
-	[ $# -gt 0 ] || targets="$(ls -1 "$configdir")" || $err "!o $configdir"
-
-	for x in $targets; do
-		unset CROSS_COMPILE
-		export PATH="$xbmkpath"
-		[ "$x" = "list" ] && x_ ls -1 "config/$project" && \
-		    listfile="" && break
-		target="$x"
-		printf "'make %s', '%s', '%s'\n" "$mode" "$project" "$target"
-		x_ handle_defconfig
-		mkhelp "$postmake"
-	done; :
-}
-
-handle_defconfig()
-{
-	target_dir="$configdir/$target"
-
-	[ -f "CHANGELOG" ] || fetch_project "$project"
-	configure_project "$target_dir" || return 0
-	x_ mkdir -p "$elfdir/$target"
-
-	chkvars tree
-	srcdir="src/$project/$tree"
-
-	if [ "$mode" = "distclean" ] || [ "$mode" = "crossgcc-clean" ]; then
-		[ -d "$srcdir" ] || return 0
-	fi
-	[ -z "$mode" ] && $dry check_cross_compiler
-
-	for y in "$target_dir/config"/*; do
-		[ "$_f" = "-d" ] || [ -f "$y" ] || continue
-		[ "$_f" = "-d" ] || defconfig="$y"
-
-		[ -n "$mode" ] || check_defconfig || continue
-		handle_makefile
-		[ -n "$mode" ] || $dry copy_elf
-	done; :
-}
-
-configure_project()
-{
-	eval "`setvars "" cleanargs build_depend autoconfargs xtree postmake \
-	    tree_depend makeargs btype mkhelper bootstrapargs premake release \
-	    xarch xlang badhash`"
-	_tcfg="$1/target.cfg"
-	[ -f "$_tcfg" ] || btype="auto"
-	[ -f "$datadir/mkhelper.cfg" ] && \
-	    eval "`setcfg "$datadir/mkhelper.cfg"`"
-
-	while [ -f "$_tcfg" ] || [ "$cmd" != "build_project" ]; do
-		eval "`setvars "" rev tree`"
-		eval "`setcfg "$_tcfg"`"
-		printf "Loading %s config: %s\n" "$project" "$_tcfg"
-
-		[ "$_f" = "-d" ] && build_depend="" # dry run
-		[ "$cmd" = "build_project" ] && break
-		[ "$do_make" != "n" ] && break
-
-		[ "${_tcfg%/*/target.cfg}" = "${_tcfg%"/$tree/target.cfg"}" ] \
-		    && break
-		_tcfg="${_tcfg%/*/target.cfg}/$tree/target.cfg"
-	done
-	[ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1
-	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
-	[ -z "$mode" ] && $dry build_dependencies
-
-	mdir="$xbmkpwd/config/submodule/$project"
-	[ -n "$tree" ] && mdir="$mdir/$tree"
-	[ -f "CHANGELOG" ] || check_project_hashes
-
-	if [ "$do_make" = "n" ]; then
-		[ -f "CHANGELOG" ] || fetch_${cmd#build_}
-		return 1
-	fi
-	x_ ./mk -f "$project" "$target"
-}
-
-build_dependencies()
-{
-	for bd in $build_depend; do
-		bd_p="${bd%%/*}"
-		bd_t="${bd##*/}"
-		[ -z "$bd_p" ] && $dry $err "$project/$tree: !bd '$bd'"
-		[ "${bd##*/}" = "$bd" ] && bd_t=""
-		[ -z "$bd_p" ] || $dry ./mk -b $bd_p $bd_t \
-		    || $err "!mk $project/$tree $bd_p/$bd_t"; :
-	done; :
-}
-
-check_project_hashes()
-{
-	mkdir -p "$XBMK_CACHE/hash" || $err "!mkdir '$XBMK_CACHE/hash'"
-	old_pjhash=""
-	[ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
-	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
-
-	x_ rm -f "$TMPDIR/project.list" "$TMPDIR/project.hash" \
-	    "$TMPDIR/project.tmp"
-	x_ touch "$TMPDIR/project.tmp"
-	x_ touch "$TMPDIR/project.hash"
-
-	for rmchk in "$datadir" "$configdir/$tree" "$mdir"; do
-		[ -d "$rmchk" ] || continue
-		find "$rmchk" -type f -not -path "*/.git*/*" >> \
-		    "$TMPDIR/project.tmp" || $err "!find $rmchk > project.tmp"
-	done
-	sort "$TMPDIR/project.tmp" > "$TMPDIR/project.list" || \
-	    $err "!sort project tmp/list"
-
-	while read -r rmchk; do
-		[ ! -f "$rmchk" ] || sha512sum "$rmchk" | awk \
-		    '{print $1}' >> "$TMPDIR/project.hash" || $err "!h $rmchk"
-	done < "$TMPDIR/project.list"
-
-	pjhash="$(sha512sum "$TMPDIR/project.hash" | awk '{print $1}')" || :
-	[ "$pjhash" != "$old_pjhash" ] && badhash="y"
-	[ -f "$XBMK_CACHE/hash/$project$tree" ] || badhash="y"
-
-	printf "%s\n" "$pjhash" > "$XBMK_CACHE/hash/$project$tree" || \
-	    $err "!mk $XBMK_CACHE/hash/$project$tree"
-
-	[ "$badhash" != "y" ] || rm -Rf "src/$project/$tree" \
-	    "elf/$project/$tree" "elf/$project/$target" || \
-	    $err "!rm $project $tree"; :
-}
-
-check_cross_compiler()
-{
-	xgccargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
-	for _xarch in $xarch; do
-		cbdir="src/coreboot/$tree"
-		[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
-		[ -n "$xtree" ] && cbdir="src/coreboot/$xtree"
-
-		x_ ./mk -f coreboot "${cbdir#src/coreboot/}"
-
-		export PATH="$xbmkpwd/$cbdir/util/crossgcc/xgcc/bin:$PATH"
-		export CROSS_COMPILE="${xarch% *}-"
-		[ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
-
-		xfix="${_xarch%-*}" && [ "$xfix" = "x86_64" ] && xfix="x64"
-
-		# match gnat-X to gcc
-		check_gnu_path gcc gnat || check_gnu_path gnat gcc || \
-		    $err "Cannot match host GCC/GNAT versions"
-
-		# sometimes buildgcc fails for like no reason. try twice.
-		make -C "$cbdir" crossgcc-$xfix $xgccargs || \
-		    make -C "$cbdir" crossgcc-$xfix $xgccargs || \
-		    $err "!mkxgcc $project/$xtree '$xfix' '$xgccargs'"
-
-		# we only want to mess with hostcc to build xgcc
-		rm -f "$XBMK_CACHE/gnupath/"* || \
-		    $err "Cannot clear gnupath/"; :
-	done; :
-}
-
-# fix mismatching gcc/gnat versions on debian trixie/sid. as of december 2024,
-# trixie/sid had gnat-13 as gnat and gcc-14 as gcc, but has gnat-14 in apt. in
-# some cases, gcc 13+14 and gnat-13 are present; or gnat-14 and gcc-14, but
-# gnat in PATH never resolves to gnat-14, because gnat-14 was "experimental"
-check_gnu_path()
-{
-	[ $# -lt 2 ] && $err "check_gnu_path: Too few arguments"
-	[ "$1" = "$2" ] && $err "check_gnu_path: Both arguments identical"
-	for _gnuarg in 1 2; do
-		eval "[ \"\$$_gnuarg\" = \"gcc\" ] && continue"
-		eval "[ \"\$$_gnuarg\" = \"gnat\" ] && continue"
-		$err "check_gnu_path: Invalid argument \"$_gnuarg\""
-	done
-	command -v "$1" 1>/dev/null || $err "Host '$1' unavailable"
-
-	eval "`setvars "" gccver gccfull gnatver gnatfull gccdir gnatdir`"
-	gnu_setver "$1" "$1" || $err "Command '$1' unavailable."
-	gnu_setver "$2" "$2" || :
-
-	eval "[ -z \"\$$1ver\" ] && $err \"Cannot detect host '$1' version\""
-	[ "$gnatfull" = "$gccfull" ] && return 0
-
-	eval "$1dir=\"$(dirname "$(command -v "$1")")\""
-	eval "_gnudir=\"\$$1dir\"; _gnuver=\"\$$1ver\""
-	for _gnubin in "$_gnudir/$2-"*; do
-		[ -f "$_gnubin" ] || continue
-		[ "${_gnubin#"$_gnudir/$2-"}" = "$_gnuver" ] || continue
-		_gnuver="${_gnubin#"$_gnudir/$2-"}"; break
-	done
-	gnu_setver "$2" "$_gnudir/$2-$_gnuver" || return 1
-	[ "$gnatfull" = "$gccfull" ] || return 1
-
-	(
-	rm -f "$XBMK_CACHE/gnupath/"* || $err "Cannot clear gnupath/"
-	cd "$XBMK_CACHE/gnupath" || $err "Can't cd to gnupath/"
-	for _gnubin in "$_gnudir/$2"*"-$_gnuver"; do
-		[ -e "$_gnubin" ] || continue
-		_gnuutil="${_gnubin##*/}"
-		x_ ln -s "$_gnubin" "${_gnuutil%"-$_gnuver"}"
-	done
-	) || $err "Cannot create $2-$_gnuver link in $_gnudir"; :
-}
-
-gnu_setver()
-{
-	eval "$2 --version 1>/dev/null 2>/dev/null || return 1"
-	eval "$1ver=\"`"$2" --version 2>/dev/null | head -n1`\""
-	eval "$1ver=\"\${$1ver##* }\""
-	eval "$1full=\"\$$1ver\""
-	eval "$1ver=\"\${$1ver%%.*}\""; :
-}
-
-check_defconfig()
-{
-	[ -f "$defconfig" ] || $dry $err "$project/$target: missing defconfig"
-	dest_dir="$elfdir/$target/${defconfig#"$target_dir/config/"}"
-
-	$dry elfcheck || return 1 # skip build if a previous one exists
-	$dry x_ mkdir -p "$dest_dir"
-}
-
-elfcheck()
-{
-	# TODO: very hacky check. do it properly (based on build.list)
-	for elftest in "$dest_dir"/*; do
-		[ -e "$elftest" ] && e "$elftest" f && return 1
-	done; :
-}
-
-handle_makefile()
-{
-	$dry check_makefile "$srcdir" && x_ make -C "$srcdir" $cleanargs clean
-	[ -f "$defconfig" ] && x_ cp "$defconfig" "$srcdir/.config"
-	[ -n "$mode" ] || [ -n "$btype" ] || $dry make -C \
-	    "$srcdir" silentoldconfig || make -C "$srcdir" oldconfig || :
-
-	run_make_command || $err "handle_makefile $srcdir: no makefile!"
-
-	_copy=".config" && [ "$mode" = "savedefconfig" ] && _copy="defconfig"
-	[ "${mode%config}" = "$mode" ] || \
-	    $dry x_ cp "$srcdir/$_copy" "$defconfig"
-
-	[ -e "$srcdir/.git" ] && [ "$project" = "u-boot" ] && \
-	    [ "$mode" = "distclean" ] && \
-		$dry x_ git -C "$srcdir" $cleanargs clean -fdx; :
-}
-
-run_make_command()
-{
-	mkhelp "$premake"
-	$dry check_cmake "$srcdir" && [ -z "$mode" ] && \
-	    $dry check_autoconf "$srcdir"
-	$dry check_makefile "$srcdir" || return 1
-
-	$dry make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs || $err "!$mode"
-	mkhelp "$mkhelper"
-
-	[ "$mode" != "clean" ] || \
-	    $dry make -C "$srcdir" $cleanargs distclean || :; :
-}
-
-check_cmake()
-{
-	[ -z "$cmakedir" ] || $dry check_makefile "$1" || cmake -B "$1" \
-	    "$1/$cmakedir" || $dry check_makefile "$1" || $err \
-	    "$1: !cmk $cmakedir"
-	[ -z "$cmakedir" ] || $dry check_makefile "$1" || \
-	    $err "check_cmake $1: can't generate Makefile"; :
-}
-
-check_autoconf()
-{
-	(
-	cd "$1" || $err "!cd $1"
-	[ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs
-	[ -f "autogen.sh" ] && x_ ./autogen.sh $autogenargs
-	[ -f "configure" ] && x_ ./configure $autoconfargs; :
-	) || $err "can't bootstrap project: $1"; :
-}
-
-check_makefile()
-{
-	[ -f "$1/Makefile" ] || [ -f "$1/makefile" ] || \
-	    [ -f "$1/GNUmakefile" ] || return 1; :
-}
-
-mkhelp()
-{
-	[ -z "$1" ] || [ -n "$mode" ] || "$1" || $err "mkhelp: !$1"; :
-}
-
-copy_elf()
-{
-	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do
-		[ -f "$srcdir/$f" ] && x_ cp "$srcdir/$f" "$dest_dir"
-	done < "$listfile"
-	x_ make clean -C "$srcdir" $cleanargs
-}
-
-main "$@" || exit 0
-. "$mkhelpercfg"
-$cmd

From e1f91f30372d52b276a4617acb67a3d0e38e1ad0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 16:43:59 +0100
Subject: [PATCH 1139/1549] vendor.sh: tidy up modify_mac_addresses()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 41 ++++++++++++++---------------------------
 1 file changed, 14 insertions(+), 27 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index f965effe..9c83d3d8 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -15,6 +15,7 @@ dontflash="!!! AN ERROR OCCURED! Please DO NOT flash if injection failed. !!!"
 vfix="DO_NOT_FLASH_YET._FIRST,_INJECT_FILES_VIA_INSTRUCTIONS_ON_LIBREBOOT.ORG_"
 vguide="https://libreboot.org/docs/install/ivy_has_common.html"
 tmpromdel="$xbmkpwd/tmp/DO_NOT_FLASH"
+nvm="util/nvmutil/nvm"
 
 cvchk="CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
 	CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \
@@ -723,43 +724,29 @@ inject()
 
 modify_mac_addresses()
 {
-	[ "$nukemode" = "nuke" ] && \
-	    $err "Cannot modify MAC addresses while nuking vendor files"
-
-	# chkvars CONFIG_GBE_BIN_PATH
 	[ -n "$CONFIG_GBE_BIN_PATH" ] || return 1
-	e "${CONFIG_GBE_BIN_PATH##*../}" f n && $err "missing gbe file"
-
-	[ "$new_mac" != "restore" ] && \
-	    x_ make -C util/nvmutil
 
 	x_ mkdir -p tmp
-	[ -L "tmp/gbe" ] && $err "tmp/gbe exists but is a symlink"
-	[ -d "tmp/gbe" ] && $err "tmp/gbe exists but is a directory"
-	if [ -e "tmp/gbe" ]; then
-		[ -f "tmp/gbe" ] || $err "tmp/gbe exists and is not a file"
-	fi
-	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "tmp/gbe"
+	e tmp/gbe && x_ e tmp/gbe f
+	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" tmp/gbe
 
-	[ "$new_mac" != "restore" ] && \
-	    x_ "util/nvmutil/nvm" "tmp/gbe" setmac "$new_mac"
+	if [ "$new_mac" != "restore" ]; then
+		x_ make -C util/nvmutil
+		x_ "$nvm" tmp/gbe setmac "$new_mac"
+	fi
 
 	find "$tmpromdir" -maxdepth 1 -type f -name "*.rom" > "tmp/rom.list" \
 	    || $err "'$archive' -> Can't make tmp/rom.list - $dontflash"
 
 	while read -r _xrom; do
-		[ -L "$_xrom" ] && continue
-		[ -f "$_xrom" ] || continue
-		"$ifdtool" $ifdprefix -i GbE:"tmp/gbe" "$_xrom" -O \
-		    "$_xrom" || $err "'$_xrom': Can't insert new GbE file"
-		xchanged="y"
+		e "$_xrom" f && xchanged="y" && x_ \
+		    "$ifdtool" $ifdprefix -i GbE:tmp/gbe "$_xrom" -O "$_xrom"
 	done < "tmp/rom.list"
-	printf "\nThe following GbE NVM words were written in '%s':\n" \
-	    "$archive"
-	x_ util/nvmutil/nvm tmp/gbe dump | grep -v "bytes read from file" || :
+
+	printf "\nGbE NVM written to '%s':\n" "$archive"
+	x_ "$nvm" tmp/gbe dump | grep -v "bytes read from file" || :
 
 	[ "$new_mac" = "restore" ] && \
-	    printf "\nNOTE: User specified setmac 'restore' argument.\n" && \
-	    printf "Default GbE file '%s' written without running nvmutil.\n" \
-	    "${CONFIG_GBE_BIN_PATH##*../}"; :
+		printf "\nDefault GbE file '%s' written, unmodified.\n" \
+		    "${CONFIG_GBE_BIN_PATH##*../}"; :
 }

From 082930ce0e7235d8569155601812cde58ad74c93 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 16:50:54 +0100
Subject: [PATCH 1140/1549] vendor.sh: tidy up inject()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 9c83d3d8..0fbc6efc 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -678,14 +678,15 @@ patch_rom()
 
 inject()
 {
-	[ $# -lt 3 ] && $err "$*, $rom: usage: inject name path type (offset)"
+	[ $# -lt 3 ] && $err "bad command: $*, $rom"
 	[ "$2" = "/dev/null" ] && return 0
 
-	eval "`setvars "" cbfsname _dest _t _offset`"
 	cbfsname="$1"
 	_dest="${2##*../}"
 	_t="$3"
 
+	_offset=""
+
 	if [ "$_t" = "fsp" ]; then
 		[ $# -gt 3 ] && _offset="$4"
 	else
@@ -693,7 +694,7 @@ inject()
 		    $err "inject $*, $rom: offset given but empty (undefined)"
 	fi
 
-	e "$_dest" f n && [ "$nukemode" != "nuke" ] && $err "!inject $dl_type"
+	[ "$nukemode" = "nuke" ] || x_ e "$_dest" f
 
 	if [ "$cbfsname" = "IFD" ]; then
 		[ "$nukemode" = "nuke" ] || "$ifdtool" $ifdprefix -i \
@@ -708,8 +709,7 @@ inject()
 		    $err "inject $rom: can't remove $cbfsname"
 		xchanged="y"
 		return 0
-	fi
-	if [ "$_t" = "stage" ]; then # the only stage we handle is refcode
+	elif [ "$_t" = "stage" ]; then # the only stage we handle is refcode
 		x_ mkdir -p tmp
 		x_ rm -f "tmp/refcode"
 		"$rmodtool" -i "$_dest" -o "tmp/refcode" || "!reloc refcode"

From 5901f36e49d423fc967f6d97de749230549420ef Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 16:53:34 +0100
Subject: [PATCH 1141/1549] vendor.sh: tidy up patch_rom()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 24 +-----------------------
 1 file changed, 1 insertion(+), 23 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 0fbc6efc..8e1e00ff 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -620,20 +620,11 @@ patch_rom()
 {
 	rom="$1"
 
-	# regarding ifs below:
-	# if a hash file exists, we only want to allow inject.
-	# if a hash file is missing, we only want to allow nuke.
-	# this logical rule prevents double-nuke and double-inject
-
-	# if injecting without a hash file i.e. inject what was injected
-	# (or inject where no vendor files are needed, covered previously)
 	if [ "$has_hashes" != "y" ] && [ "$nukemode" != "nuke" ]; then
 		printf "inject: '%s' has no hash file. Skipping.\n" \
 		    "$archive" 1>&2
 		return 1
-	fi
-	# nuking *with* a hash file, i.e. nuking what was nuked before
-	if [ "$has_hashes" = "y" ] && [ "$nukemode" = "nuke" ]; then
+	elif [ "$has_hashes" = "y" ] && [ "$nukemode" = "nuke" ]; then
 		printf "inject nuke: '%s' has a hash file. Skipping nuke.\n" \
 		    "$archive" 1>&2
 		return 1
@@ -652,25 +643,12 @@ patch_rom()
 	[ "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" = "y" ] && \
 	    [ -n "$CONFIG_SMSC_SCH5545_EC_FW_FILE" ] && \
 		inject sch5545_ecfw.bin "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
-	#
-	# coreboot adds FSP-M first. so we shall add it first, then S:
-	# NOTE:
-	# We skip the fetch if CONFIG_FSP_USE_REPO or CONFIG_FSP_FULL_FD is set
-	# but only for inject/nuke. we still run fetch (see above) because on
-	# _fsp targets, coreboot still needs them, but coreboot Kconfig uses
-	# makefile syntax and puts $(obj) in the path, which makes no sense
-	# in sh. So we modify the path there, but lbmk only uses the file
-	# in vendorfiles/ if neither CONFIG_FSP_USE_REPO nor CONFIG_FSP_FULL_FD
-	# are set
-	#
 	[ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \
 	   [ -n "$CONFIG_FSP_M_FILE" ] && \
 		inject "$CONFIG_FSP_M_CBFS" "$CONFIG_FSP_M_FILE" fsp --xip
 	[ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \
 	   [ -n "$CONFIG_FSP_S_FILE" ] && \
 		inject "$CONFIG_FSP_S_CBFS" "$CONFIG_FSP_S_FILE" fsp
-	# TODO: modify gbe *after checksum verification only*
-	# TODO: insert default gbe if doing -n nuke
 
 	printf "ROM image successfully patched: %s\n" "$rom"
 	xchanged="y"

From 61f201410288748e4bb0f4f5664490bd7eb7c090 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 16:57:29 +0100
Subject: [PATCH 1142/1549] vendor.sh: tidy up process_release_roms()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 11 ++---------
 1 file changed, 2 insertions(+), 9 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 8e1e00ff..c2b1c112 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -566,18 +566,16 @@ process_release_rom()
 	_xrom="$1"
 	_xromname="${1##*/}"
 
-	[ -L "$_xrom" ] && \
-	    $err "$archive -> '${_xrom#"tmp/DO_NOT_FLASH/"}' is a symlink"
-	[ -f "$_xrom" ] || return 0
+	e "$_xrom" f missing && return 0
 
 	[ -z "${_xromname#"$vfix"}" ] && \
 	    $err "'$_xromname'->'"${_xromname#"$vfix"}"' empty. $dontflash"
+
 	# Remove the prefix and 1-byte pad
 	if [ "$nukemode" != "nuke" ] && \
 	    [ "${_xromname#"$vfix"}" != "$_xromname" ]; then
 		_xromnew="${_xrom%/*}/${_xromname#"$vfix"}"
 
-		# Remove the 1-byte padding
 		stat -c '%s' "$_xrom" > "tmp/rom.size" || \
 		    $err "$_xrom: Can't get rom size. $dontflash"
 		read -r xromsize < "tmp/rom.size" || \
@@ -588,8 +586,6 @@ process_release_rom()
 		[ $xromsize -lt 2 ] && $err \
 		    "$_xrom: Will not create empty file. $dontflash"
 
-		# TODO: check whether the size would be a multiple of 64KB
-		# the smallest rom images we do are 512kb	
 		xromsize="`expr $xromsize - 1`"
 		[ $xromsize -lt 524288 ] && \
 		    $err "$_xrom size too small; likely not a rom. $dontflash"
@@ -608,9 +604,6 @@ process_release_rom()
 	[ "$nukemode" != "nuke" ] && return 0
 
 	# Rename the file, prefixing a warning saying not to flash
-	# the target image, which now has vendor files removed. Also
-	# pad it so that flashprog returns an error if the user tries
-	# to flash it, due to mismatching ROM size vs chip size
 	cat "$_xrom" tmp/zero.1b > "${_xrom%/*}/$vfix${_xrom##*/}" || \
 	    $err "'$archive' -> can't pad/rename '$_xrom'. $dontflash"
 	rm -f "$_xrom" || $err "'$archive' -> can't rm '$_xrom'. $dontflash"

From 0d85f061e2ee191b23ecef86af9e14135a94f89e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 17:02:07 +0100
Subject: [PATCH 1143/1549] vendor.sh: tidy up patch_release_roms()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 25 +++++--------------------
 1 file changed, 5 insertions(+), 20 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index c2b1c112..ff5e6e51 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -491,13 +491,10 @@ patch_release_roms()
 
 	tmpromdir="tmp/DO_NOT_FLASH/bin/$board"
 	remkdir "${tmpromdir%"/bin/$board"}"
-	tar -xf "$archive" -C "${tmpromdir%"/bin/$board"}" || \
-		$err "Can't extract '$archive'"
+	x_ tar -xf "$archive" -C "${tmpromdir%"/bin/$board"}"
 
 	for _hashes in $hashfiles; do
-		[ -L "$tmpromdir/$_hashes" ] && \
-		    $err "'$archive' -> the hashfile is a symlink. $dontflash"
-		[ -f "$tmpromdir/$_hashes" ] && has_hashes="y" && \
+		e "$tmpromdir/$_hashes" f && has_hashes="y" && \
 		    hashfile="$_hashes" && break; :
 	done
 
@@ -534,31 +531,19 @@ patch_release_roms()
 	fi
 	) || $err "'$archive' -> Can't verify vendor hashes. $dontflash"
 
-	if [ -n "$new_mac" ]; then
-		if ! modify_mac_addresses; then
-			printf "\nNo GbE region defined for '%s'\n" "$board" \
-			    1>&2
-			printf "Therefore, changing the MAC is impossible.\n" \
-			    1>&2
-			printf "This board probably lacks Intel ethernet.\n" \
-			    1>&2
-			printf "(or it's pre-IFD Intel with Intel GbE NIC)\n" \
-			    1>&2
-		fi
-	fi
+	[ -z "$new_mac" ] || modify_mac_addresses || printf \
+	    "\nNo GbE region defined for '%s'\n" "$board" 1>&2
 
 	[ "$xchanged" = "y" ] || rm -Rf "$tmpromdel" || :
 	[ "$xchanged" = "y" ] || return 0
 	(
 		cd "${tmpromdir%"/bin/$board"}" || \
 		    $err "Can't cd '${tmpromdir%"/bin/$board"}'; $dontflash"
-		# ../../ is the root of lbmk
 		mkrom_tarball "bin/$board"
 	) || $err "Cannot re-generate '$archive' - $dontflash"
 
 	mv "${tmpromdir%"/bin/$board"}/bin/${relname}_${board}.tar.xz" \
-	    "$archive" || \
-	    $err "'$archive' -> Cannot overwrite - $dontflash"; :
+	    "$archive" || $err "'$archive' -> Can't overwrite - $dontflash"; :
 }
 
 process_release_rom()

From 12b1623e47321013b6ef912cfec0af1b3c7ecc68 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 17:05:12 +0100
Subject: [PATCH 1144/1549] vendor.sh: tidy up readcfg()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index ff5e6e51..2f1febd0 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -458,9 +458,8 @@ check_release()
 
 readcfg()
 {
-	if [ "$board" = "serprog_rp2040" ] || \
-	    [ "$board" = "serprog_stm32" ] || \
-	    [ "$board" = "serprog_pico" ]; then
+	if [ "$board" = "serprog_rp2040" ] || [ "$board" = "serprog_stm32" ] \
+	    || [ "$board" = "serprog_pico" ]; then
 		return 1
 	fi
 	boarddir="$cbcfgsdir/$board"

From 409cab39c56a9769021551103890795e8443a5a7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 17:08:30 +0100
Subject: [PATCH 1145/1549] vendor.sh: tidy up vendor_inject()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 34 +++++-----------------------------
 1 file changed, 5 insertions(+), 29 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 2f1febd0..e6485cb4 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -342,7 +342,7 @@ fail_inject()
 
 vendor_inject()
 {
-	need_files="n" # will be set to "y" if vendorfiles needed
+	need_files="n"
 	_olderr="$err"
 	err="fail_inject"
 	remkdir "$tmpromdel"
@@ -351,34 +351,21 @@ vendor_inject()
 	[ $# -lt 1 ] && $err "No options specified. - $dontflash"
 	eval "`setvars "" nukemode new_mac xchanged`"
 
-	# randomise the MAC address by default
-	# TODO: support setting CBFS MAC address for GA-G41M-ES2L
+	archive="$1";
 	new_mac="??:??:??:??:??:??"
 
-	archive="$1";
 	[ $# -gt 1 ] && case "$2" in
 	nuke)
 		new_mac=""
 		nukemode="nuke" ;;
 	setmac)
 		[ $# -gt 2 ] && new_mac="$3" && \
-		    [ -z "$new_mac" ] && $err \
-		    "You set an empty MAC address string" ;;
+		    [ -z "$new_mac" ] && $err "Empty MAC address specified" ;;
 	*) $err "Unrecognised inject mode: '$2'"
 	esac
 
-	# allow the user to skip setting MAC addresses.
-	# if new_mac is empty, this script skips running nvmutil
 	[ "$new_mac" = "keep" ] && new_mac=""
 
-	# we don't allow the *user* to clear new_mac, in the setmac
-	# command, in case the build system is being integrated with
-	# another, where setmac is relied upon and is being set
-	# explicitly. this is a preventative error handle, as a courtes
-	# to that hypothetical user e.g. Linux distro package maintainer
-	# integrating this build system into their distro. if they used
-	# a variable for that, and they forgot to initialise it, they'll know.
-
 	check_release "$archive" || \
 	    $err "You must run this script on a release archive. - $dontflash"
 
@@ -416,24 +403,13 @@ vendor_inject()
 	    "Board '%s' doesn't use vendorfiles, so none were inserted.\n" \
 	    "$board"
 
-	#
-	# catch-all error handler, for libreboot release opsec:
-	#
-	# if vendor files defined, and a hash file was missing, that means
-	# a nuke must succeed, if specified. if no hashfile was present,
-	# that means vendorfiles had been injected, so a nuke must succeed.
-	# this check is here in case of future bugs in lbmk's handling
-	# of vendorfile deletions on release archives, which absolutely
-	# must always be 100% reliable, so paranoia is paramount:
-	#
 	if [ "$xchanged" != "y" ] && [ "$need_files" = "y" ] && \
 	    [ "$nukemode" = "nuke" ] && [ "$has_hashes" != "y" ]; then
 		printf "FAILED NUKE: tarball '$archive', board '$board'\n" 1>&2
 		$err "Unhandled vendorfile deletion: DO NOT RELEASE TO RSYNC"
-	fi # of course, we assume that those variables are also set right
+	fi
 
-	err="$_olderr"
-	return 0
+	err="$_olderr"; :
 }
 
 check_release()

From cb36248c8c06d76274b2f2bb315bbbde50b9ce70 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 17:10:49 +0100
Subject: [PATCH 1146/1549] vendor.sh: tidy up check_release()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index e6485cb4..d98bde7e 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -416,7 +416,8 @@ check_release()
 {
 	[ -L "$archive" ] && \
 	    $err "'$archive' is a symlink, not a file - $dontflash"
-	[ -f "$archive" ] || return 1
+	e "$archive" f missing && return 1
+
 	archivename="`basename "$archive"`"
 	[ -z "$archivename" ] && \
 	    $err "Cannot determine archive file name - $dontflash"

From c158d82298bb04ffc73eb38868fea3c8a28059bf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 17:29:35 +0100
Subject: [PATCH 1147/1549] rom.sh: minor cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 19 ++++++++-----------
 1 file changed, 8 insertions(+), 11 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index 7102953f..f2609bba 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -41,9 +41,8 @@ mkpicotool()
 	rm -Rf "$picotool" || $err "Can't remove picotool builddir"
 	(
 	x_ cd src/picotool
-	cmake -DCMAKE_INSTALL_PREFIX=xbmkbin -DPICOTOOL_FLAT_INSTALL=1 \
-	    -DPICO_SDK_PATH=../pico-sdk || \
-	    $err "Can't prep picotool"
+	x_ cmake -DCMAKE_INSTALL_PREFIX=xbmkbin -DPICOTOOL_FLAT_INSTALL=1 \
+	    -DPICO_SDK_PATH=../pico-sdk
 	make install || $err "Can't build picotool"; :
 	) || $err "Can't build picotool"; :
 }
@@ -160,7 +159,8 @@ mkcorebootbin()
 		    $dry add_seabios
 		[ "$payload_uboot" = "y" ] && pname="uboot" && $dry add_uboot
 	else
-		pname="custom" && $dry cprom; :
+		pname="custom"
+		$dry cprom
 	fi; :
 }
 
@@ -212,11 +212,9 @@ add_grub()
 
 mkseagrub()
 {
-	if [ "$payload_grubsea" = "y" ]; then
-		pname="grub"
-	else
-		cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
-	fi
+	[ "$payload_grubsea" = "y" ] && pname="grub"
+	[ "$payload_grubsea" = "y" ] || \
+	    cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
 	for keymap in config/data/grub/keymap/*.gkb; do
 		[ -f "$keymap" ] && cprom "${keymap##*/}"; :
 	done; :
@@ -288,6 +286,5 @@ mkcoreboottar()
 	[ "$release" != "n" ] || return 0
 	$dry mkrom_tarball "bin/$target"
 	$dry ./mk inject "bin/${relname}_${target}.tar.xz" nuke || \
-	    $err "Can't delete vendorfiles in 'bin/${relname}_$target.tar.xz'"
-	return 0
+	    $err "Can't nuke vendorfiles in 'bin/${relname}_$target.tar.xz'"; :
 }

From 49939502648163f26464a4e2d706f3aa75e27947 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 17:32:18 +0100
Subject: [PATCH 1148/1549] mrc.sh: minor cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/mrc.sh | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/include/mrc.sh b/include/mrc.sh
index e08a0f0e..a5f1b37c 100644
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -50,12 +50,10 @@ extract_refcode()
 	chkvars cbfstoolref
 	mkdir -p "${_refdest%/*}" || $err "ref: !mkdir -p ${_refdest%/*}"
 
-	"$cbfstoolref" "$appdir/bios.bin" extract \
-	    -m x86 -n fallback/refcode -f "$_refdest" -r RO_SECTION \
-	    || $err "extract_refcode $board: !cbfstoolref $_refdest"
+	x_ "$cbfstoolref" "$appdir/bios.bin" extract \
+	    -m x86 -n fallback/refcode -f "$_refdest" -r RO_SECTION
 
 	# enable the Intel GbE device, if told by offset MRC_refcode_gbe
-	[ -z "$MRC_refcode_gbe" ] || dd if="config/ifd/hp820g2/1.bin" \
-	    of="$_refdest" bs=1 seek=$MRC_refcode_gbe count=1 conv=notrunc || \
-	    $err "extract_refcode $_refdest: byte $MRC_refcode_gbe"; :
+	[ -z "$MRC_refcode_gbe" ] || x_ dd if="config/ifd/hp820g2/1.bin" \
+	    of="$_refdest" bs=1 seek=$MRC_refcode_gbe count=1 conv=notrunc; :
 }

From b41cd39b686e66d1801e5b32fb7da763b98d934a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 17:35:30 +0100
Subject: [PATCH 1149/1549] lib.sh: minor cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index d4d7127e..62bea2c5 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -135,8 +135,7 @@ if [ -z "${TMPDIR+x}" ]; then
 	# set up python v3.x in PATH, in case it's not set up correctly.
 	# see code above that detected the correct python3 command.
 	cd "$XBMK_CACHE/xbmkpath" || $err "can't cd $XBMK_CACHE/xbmkpath"
-	ln -s "`command -v "$python"`" python || \
-	    $err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"
+	x_ ln -s "`command -v "$python"`" python
 	) || $err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"
 	xbmk_parent="y"
 fi
@@ -151,8 +150,7 @@ expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
     1>/dev/null 2>/dev/null || export XBMK_THREADS=1 # user gave a non-integer
 
 x_() {
-	[ $# -lt 1 ] || "$@" || \
-	    $err "Unhandled non-zero exit: $(echo "$@")"; :
+	[ $# -lt 1 ] || "$@" || $err "Unhandled error for: $(echo "$@")"; :
 }
 
 [ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > .version || \
@@ -227,7 +225,7 @@ singletree()
 {
 	for targetfile in "config/${1}/"*/target.cfg; do
 		[ -e "$targetfile" ] && [ -f "$targetfile" ] && return 1; :
-	done; return 0
+	done; :
 }
 
 # can grab from the internet, or copy locally.
@@ -263,7 +261,7 @@ download()
 		vendor_checksum "$4" "$cached" || dl_fail="n"
 	done
 	[ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: not downloaded"
-	[ "$cached" = "$3" ] || cp "$cached" "$3" || $err "!d cp $cached $3"; :
+	[ "$cached" = "$3" ] || x_ cp "$cached" "$3"; :
 }
 
 vendor_checksum()
@@ -290,8 +288,7 @@ cbfs()
 		fi
 	fi
 
-	"$cbfstool" "$fRom" $ccmd -f "$fAdd" -n "$fName" $lzma || \
-	    $err "CBFS fail: $fRom $ccmd -f '$fAdd' -n '$fName' $lzma"; :
+	x_ "$cbfstool" "$fRom" $ccmd -f "$fAdd" -n "$fName" $lzma
 }
 
 mk()

From 972681a127bbade608b5abd5ec94a6a74597f2b6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 17:38:14 +0100
Subject: [PATCH 1150/1549] mk: minor cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/mk b/mk
index c8fdffa7..b1d6cea0 100755
--- a/mk
+++ b/mk
@@ -348,9 +348,8 @@ check_project_hashes()
 	printf "%s\n" "$pjhash" > "$XBMK_CACHE/hash/$project$tree" || \
 	    $err "!mk $XBMK_CACHE/hash/$project$tree"
 
-	[ "$badhash" != "y" ] || rm -Rf "src/$project/$tree" \
-	    "elf/$project/$tree" "elf/$project/$target" || \
-	    $err "!rm $project $tree"; :
+	[ "$badhash" != "y" ] || x_ rm -Rf "src/$project/$tree" \
+	    "elf/$project/$tree" "elf/$project/$target"; :
 }
 
 check_cross_compiler()
@@ -375,8 +374,7 @@ check_cross_compiler()
 
 		# sometimes buildgcc fails for like no reason. try twice.
 		make -C "$cbdir" crossgcc-$xfix $xgccargs || \
-		    make -C "$cbdir" crossgcc-$xfix $xgccargs || \
-		    $err "!mkxgcc $project/$xtree '$xfix' '$xgccargs'"
+		    x_ make -C "$cbdir" crossgcc-$xfix $xgccargs
 
 		# we only want to mess with hostcc to build xgcc
 		rm -f "$XBMK_CACHE/gnupath/"* || \

From fd5431db05dcaa11e45e1e35f987d5cef9ce088f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 17:40:51 +0100
Subject: [PATCH 1151/1549] lib.sh: define x_ right after err_

because the top-down function order isn't as reliable
in lib.sh, since this is what first runs, included
in every other script

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 62bea2c5..ac0003f0 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -26,6 +26,9 @@ err_()
 	printf "ERROR %s: %s\n" "$0" "$1" 1>&2
 	exit 1
 }
+x_() {
+	[ $# -lt 1 ] || "$@" || $err "Unhandled error for: $(echo "$@")"; :
+}
 
 xbmkpwd="`pwd`" || $err "Cannot generate PWD"
 export PWD="$xbmkpwd"
@@ -149,10 +152,6 @@ fi
 expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
     1>/dev/null 2>/dev/null || export XBMK_THREADS=1 # user gave a non-integer
 
-x_() {
-	[ $# -lt 1 ] || "$@" || $err "Unhandled error for: $(echo "$@")"; :
-}
-
 [ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > .version || \
     $err "Cannot generate unknown .version file"
 [ -e ".git" ] || [ -f ".versiondate" ] || printf "1716415872\n" > \

From c4c6692b761a50838deab5ed5ce5d3ff521fab7d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 19:57:40 +0100
Subject: [PATCH 1152/1549] remove xbmk_parent, handle forking in lib.sh

I was using a complicated method of knowing whether
the current instance was parent or a child, to know
whether the lock file and TMPDIR needed to be purged.

It was quite error-prone too. Instead, I'm now handling
it directly from within the if statement that previously
initialised xbmk_parent=y, forking ./mk from there.

The forked instance would not trigger that if clause
again, since then TMPDIR is created, thus avoiding
recursion.

This is an improvement because it doesn't rely on how
the parent handles exit statuses, and it ensures that
the lock/tmp files are never accidentally deleted.

Even if a given program/script that lbmk runs would
export TMPDIR, it doesn't matter because lbmk doesn't,
so it would be unaffected.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh    |  9 +++++++--
 include/vendor.sh |  2 +-
 mk                | 21 +--------------------
 3 files changed, 9 insertions(+), 23 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index ac0003f0..19bd9357 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -50,7 +50,7 @@ chkvars()
 }
 
 eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
-    datadir version relname xbmk_parent`"
+    datadir version relname`"
 
 for fv in version versiondate; do
 	eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
@@ -140,7 +140,12 @@ if [ -z "${TMPDIR+x}" ]; then
 	cd "$XBMK_CACHE/xbmkpath" || $err "can't cd $XBMK_CACHE/xbmkpath"
 	x_ ln -s "`command -v "$python"`" python
 	) || $err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"
-	xbmk_parent="y"
+
+	xbmk_rval=0
+	./mk "$@" || xbmk_rval=1
+	rm -Rf "$TMPDIR" || xbmk_rval=1
+	rm -f lock || xbmk_rval=1
+	exit $xbmk_rval
 fi
 
 # if "y": a coreboot target won't be built if target.cfg says release="n"
diff --git a/include/vendor.sh b/include/vendor.sh
index d98bde7e..6af25935 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -337,7 +337,7 @@ fail_inject()
 	printf "\n\n%s\n\n" "$dontflash" 1>&2
 	printf "WARNING: File '%s' was NOT modified.\n\n" "$archive" 1>&2
 	printf "Please MAKE SURE vendor files are inserted before flashing\n\n"
-	fail "$1"
+	$err "$1"
 }
 
 vendor_inject()
diff --git a/mk b/mk
index b1d6cea0..63b87d3b 100755
--- a/mk
+++ b/mk
@@ -17,7 +17,6 @@ fi
 . "include/mrc.sh"
 
 eval "`setvars "" vdir src_dirname srcdir mode xp ser`"
-err="fail"
 
 main()
 {
@@ -119,23 +118,7 @@ build_release()
 	rm -Rf "$srcdir" || $err "!rm -Rf $srcdir"
 }
 
-fail()
-{
-	tmp_cleanup || printf "WARNING: can't rm tmpfiles: %s\n" "$TMPDIR" 1>&2
-	err_ "${1}"
-}
-
-tmp_cleanup()
-{
-	[ "$xbmk_parent" = "y" ] || return 0
-	[ "$TMPDIR" = "/tmp" ] || rm -Rf "$TMPDIR" || return 1
-	rm -f lock || return 1
-}
-
-if main "$@"; then
-	tmp_cleanup || err_ "can't rm TMPDIR upon non-zero exit: $TMPDIR"
-	exit 0
-fi
+main "$@" && exit 0
 
 # what follows was formerly script/trees, whose main() is now trees()
 
@@ -525,5 +508,3 @@ if trees "$@"; then
 	. "$mkhelpercfg"
 	$cmd
 fi
-
-tmp_cleanup || err_ "can't rm TMPDIR upon non-zero exit: $TMPDIR"

From 52f3d54116f2efc05c38efb0ab92439ce267662e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 20:19:48 +0100
Subject: [PATCH 1153/1549] vendor.sh: properly call err_ in fail_inject

i can't call $err (variable), because it's set
to fail_inject. fix this infinite loop, which
was an oversight in the previous commit.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 6af25935..31b1f76d 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -337,7 +337,7 @@ fail_inject()
 	printf "\n\n%s\n\n" "$dontflash" 1>&2
 	printf "WARNING: File '%s' was NOT modified.\n\n" "$archive" 1>&2
 	printf "Please MAKE SURE vendor files are inserted before flashing\n\n"
-	$err "$1"
+	err_ "$1"
 }
 
 vendor_inject()

From 9eb8856b3c5c9df751399096f8f0d87c56bcb7e0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 21:59:08 +0100
Subject: [PATCH 1154/1549] mk: Remove unnecessary argument checks on trees()

These checks are no longer necessary, because these
checks are already properly handled in main().

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/mk b/mk
index 63b87d3b..67261386 100755
--- a/mk
+++ b/mk
@@ -134,10 +134,6 @@ trees()
 {
 	flags="f:b:m:u:c:x:s:l:n:d:"
 
-	[ $# -lt 1 ] && $err "No argument provided"
-	[ "${1%-*}" = "$1" ] && $err \
-	    "First argument must be a flag ($flags)"
-
 	while getopts $flags option; do
 		[ -n "$_f" ] && $err "only one flag is permitted"
 		_f="$1"

From 0c87fdf96adc0c072577992e312ba2342d39ecdd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 22:01:12 +0100
Subject: [PATCH 1155/1549] git.sh: clean up fetch_project()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 30f9729a..42b04010 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -34,8 +34,8 @@ fetch_project()
 	clone_project
 
 	for x in config/git/*; do
-		[ -d "$x" ] && nuke "${x##*/}" "src/${x##*/}" 2>/dev/null
-	done; return 0
+		[ -d "$x" ] && nuke "${x##*/}" "src/${x##*/}" 2>/dev/null; :
+	done; :
 }
 
 clone_project()

From 04ebb3b91a06e55ddcf2f3a620f53fcb0863e4be Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 22:05:35 +0100
Subject: [PATCH 1156/1549] vendor.sh: tidy up decat_fspfd()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 31b1f76d..a085096d 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -230,8 +230,7 @@ decat_fspfd()
 	_fspdir="$2"
 	_fspsplit="$cbdir/3rdparty/fsp/Tools/SplitFspBin.py"
 
-	$python "$_fspsplit" split -f "$_fspfd" -o "$_fspdir" -n "Fsp.fd" || \
-	    $err "decat_fspfd '$1' '$2': Can't de-concatenate; $dontflash"; :
+	x_ $python "$_fspsplit" split -f "$_fspfd" -o "$_fspdir" -n "Fsp.fd"
 }
 
 extract_kbc1126ec()

From 7af46721bcbd3f864d76da7f14a5c44586294d37 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 22:15:58 +0100
Subject: [PATCH 1157/1549] vendor.sh: tidy up error handling

x_ can be used nowadays on any function, because it
properly handles globbing.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 46 ++++++++++++++++------------------------------
 1 file changed, 16 insertions(+), 30 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index a085096d..6f7852d5 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -124,8 +124,7 @@ fetch()
 	rm -Rf "${_dl}_extracted" || $err "!rm ${_ul}_extracted. $dontflash"
 	e "$_dest" f && return 0
 
-	mkdir -p "${_dest%/*}" || \
-	    $err "mkdirs: !mkdir -p ${_dest%/*} - $dontflash"
+	x_ mkdir -p "${_dest%/*}"
 	remkdir "$appdir"
 	extract_archive "$_dl" "$appdir" "$dl_type" || \
 	    [ "$dl_type" = "e6400vga" ] || \
@@ -165,8 +164,7 @@ extract_intel_me_bruteforce()
 	e "$_metmp" f && return 0
 
 	[ -z "$sdir" ] && sdir="$(mktemp -d)"
-	mkdir -p "$sdir" || \
-	    $err "extract_intel_me: !mkdir -p \"$sdir\" - $dontflash"
+	x_ mkdir -p "$sdir"
 
 	set +u +e
 	(
@@ -200,11 +198,10 @@ apply_me11_deguard_mod()
 {
 	(
 	x_ cd src/deguard/
-	./finalimage.py --delta "data/delta/$ME11delta" \
+	x_ ./finalimage.py --delta "data/delta/$ME11delta" \
 	    --version "$ME11version" \
 	    --pch "$ME11pch" --sku "$ME11sku" --fake-fpfs data/fpfs/zero \
-	    --input "$_metmp" --output "$_me" || \
-	    $err "Error running deguard for $_me - $dontflash"
+	    --input "$_metmp" --output "$_me"
 	) || $err "Error running deguard for $_me - $dontflash"
 }
 
@@ -272,8 +269,7 @@ extract_e6400vga()
 	    $err "extract_e6400vga: can't extract bios.bin - $dontflash"
 	"$e6400_unpack" bios.bin || printf "TODO: fix dell extract util\n"
 	) || $err "can't extract e6400 vga rom - $dontflosh"
-	cp "$appdir/$E6400_VGA_romname" "$_dest" || \
-	    $err "extract_e6400vga $board: can't cp $_dest - $dontflash"; :
+	x_ cp "$appdir/$E6400_VGA_romname" "$_dest"
 }
 
 extract_sch5545ec()
@@ -286,8 +282,7 @@ extract_sch5545ec()
 	_sch5545ec_fw="$_sch5545ec_fw/0 Raw section/body.bin" # <-- this!
 
 	"$uefiextract" "$_bios" || $err "sch5545 !extract - $dontflash"
-	cp "$_sch5545ec_fw" "$_dest" || \
-	    $err "$_dest: !sch5545 copy - $dontflash"; :
+	x_ cp "$_sch5545ec_fw" "$_dest"
 }
 
 # Lenovo ThunderBolt firmware updates:
@@ -302,14 +297,11 @@ extract_tbfw()
 	while read -r f; do
 		[ -f "$f" ] || continue
 		[ -L "$f" ] && continue
-		cp "$f" "tmp/tb.bin" || \
-		    $err "extract_tbfw $_dest: Can't copy TBT.bin - $dontflash"
+		x_ cp "$f" "tmp/tb.bin"
 		break
 	done < "tmp/tb.txt"
-	dd if=/dev/null of=tmp/tb.bin bs=1 seek=$TBFW_size || \
-	    $err "extract_tbfw $_dest: Can't pad TBT.bin - $dontflash"
-	cp "tmp/tb.bin" "$_dest" || \
-	    $err "extract_tbfw $_dest: copy error - $dontflash "; :
+	x_ dd if=/dev/null of=tmp/tb.bin bs=1 seek=$TBFW_size
+	x_ cp "tmp/tb.bin" "$_dest"
 }
 
 extract_fspm()
@@ -325,8 +317,7 @@ extract_fsps()
 # this copies the fsp s/m; re-base is handled by ./mk inject
 copy_fsp()
 {
-	cp "$appdir/Fsp_$1.fd" "$_dest" || \
-	    $err "copy_fsp: Can't copy $1 to $_dest - $dontflash"; :
+	x_ cp "$appdir/Fsp_$1.fd" "$_dest"
 }
 
 fail_inject()
@@ -501,8 +492,7 @@ patch_release_roms()
 		sha512sum --status -c "$hashfile" || \
 		    sha1sum --status -c "$hashfile" || \
 		    $err "'$archive' -> Can't verify vendor hashes. $dontflash"
-		rm -f "$hashfile" || \
-		    $err "$archive: Can't rm hashfile. $dontflash"
+		x_ rm -f "$hashfile"
 	fi
 	) || $err "'$archive' -> Can't verify vendor hashes. $dontflash"
 
@@ -512,8 +502,7 @@ patch_release_roms()
 	[ "$xchanged" = "y" ] || rm -Rf "$tmpromdel" || :
 	[ "$xchanged" = "y" ] || return 0
 	(
-		cd "${tmpromdir%"/bin/$board"}" || \
-		    $err "Can't cd '${tmpromdir%"/bin/$board"}'; $dontflash"
+		x_ cd "${tmpromdir%"/bin/$board"}"
 		mkrom_tarball "bin/$board"
 	) || $err "Cannot re-generate '$archive' - $dontflash"
 
@@ -536,8 +525,7 @@ process_release_rom()
 	    [ "${_xromname#"$vfix"}" != "$_xromname" ]; then
 		_xromnew="${_xrom%/*}/${_xromname#"$vfix"}"
 
-		stat -c '%s' "$_xrom" > "tmp/rom.size" || \
-		    $err "$_xrom: Can't get rom size. $dontflash"
+		x_ stat -c '%s' "$_xrom" > "tmp/rom.size"
 		read -r xromsize < "tmp/rom.size" || \
 		    $err "$_xrom: Can't read rom size. $dontflash"
 
@@ -550,8 +538,7 @@ process_release_rom()
 		[ $xromsize -lt 524288 ] && \
 		    $err "$_xrom size too small; likely not a rom. $dontflash"
 
-		dd if="$_xrom" of="$_xromnew" bs=$xromsize count=1 || \
-		    $err "$_xrom: Can't resize. $dontflash"
+		x_ dd if="$_xrom" of="$_xromnew" bs=$xromsize count=1
 		rm -f "$_xrom" || $err "Can't rm $_xrom - $dontflash"
 
 		_xrom="$_xromnew"
@@ -566,7 +553,7 @@ process_release_rom()
 	# Rename the file, prefixing a warning saying not to flash
 	cat "$_xrom" tmp/zero.1b > "${_xrom%/*}/$vfix${_xrom##*/}" || \
 	    $err "'$archive' -> can't pad/rename '$_xrom'. $dontflash"
-	rm -f "$_xrom" || $err "'$archive' -> can't rm '$_xrom'. $dontflash"
+	x_ rm -f "$_xrom"
 }
 
 patch_rom()
@@ -636,8 +623,7 @@ inject()
 		xchanged="y"
 		return 0
 	elif [ "$nukemode" = "nuke" ]; then
-		"$cbfstool" "$rom" remove -n "$cbfsname" || \
-		    $err "inject $rom: can't remove $cbfsname"
+		x_ "$cbfstool" "$rom" remove -n "$cbfsname"
 		xchanged="y"
 		return 0
 	elif [ "$_t" = "stage" ]; then # the only stage we handle is refcode

From cb3253befb9e3424ff009e3f4c894b1609dc3db0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 22:19:44 +0100
Subject: [PATCH 1158/1549] rom.sh: tidy up error handling

same as the last change

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index f2609bba..7e2271f1 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -63,13 +63,12 @@ mkpayload_grub()
 	eval "`setvars "" grub_modules grub_install_modules`"
 	$dry eval "`setcfg "$grubdata/module/$tree"`"
 	$dry x_ rm -f "$srcdir/grub.elf"; $dry \
-	"$srcdir/grub-mkstandalone" --grub-mkimage="$srcdir/grub-mkimage" \
+	x_ "$srcdir/grub-mkstandalone" --grub-mkimage="$srcdir/grub-mkimage" \
 	    -O i386-coreboot -o "$srcdir/grub.elf" -d "${srcdir}/grub-core/" \
 	    --fonts= --themes= --locales=  --modules="$grub_modules" \
 	    --install-modules="$grub_install_modules" \
 	    "/boot/grub/grub_default.cfg=${srcdir}/.config" \
-	    "/boot/grub/grub.cfg=$grubdata/memdisk.cfg" || \
-	    $err "$tree: cannot build grub.elf"; :
+	    "/boot/grub/grub.cfg=$grubdata/memdisk.cfg"; :
 }
 
 mkvendorfiles()
@@ -285,6 +284,5 @@ mkcoreboottar()
 	[ "$XBMK_RELEASE" = "y" ] || return 0
 	[ "$release" != "n" ] || return 0
 	$dry mkrom_tarball "bin/$target"
-	$dry ./mk inject "bin/${relname}_${target}.tar.xz" nuke || \
-	    $err "Can't nuke vendorfiles in 'bin/${relname}_$target.tar.xz'"; :
+	$dry x_ ./mk inject "bin/${relname}_${target}.tar.xz" nuke; :
 }

From 023f9cf0498f28aa8d19de251e3f62639afd22f9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 22:24:34 +0100
Subject: [PATCH 1159/1549] lib.sh: tidy up the error handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 19bd9357..44b6a138 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -128,12 +128,9 @@ if [ -z "${TMPDIR+x}" ]; then
 	export TMPDIR="/tmp"
 	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
 	touch lock || $err "cannot create 'lock' file"
-	rm -Rf "$XBMK_CACHE/xbmkpath" "$XBMK_CACHE/gnupath" || \
-	    $err "cannot remove xbmkpath"
-	mkdir -p "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath" || \
-	    $err "cannot create gnupath"
-	export PATH="$XBMK_CACHE/xbmkpath:$XBMK_CACHE/gnupath:$PATH" || \
-	    $err "Can't create gnupath/xbmkpath"
+	x_ rm -Rf "$XBMK_CACHE/xbmkpath" "$XBMK_CACHE/gnupath"
+	x_ mkdir -p "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
+	export PATH="$XBMK_CACHE/xbmkpath:$XBMK_CACHE/gnupath:$PATH"
 	(
 	# set up python v3.x in PATH, in case it's not set up correctly.
 	# see code above that detected the correct python3 command.
@@ -241,8 +238,7 @@ download()
 	dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum
 	vendor_checksum "$4" "$cached" 2>/dev/null && dl_fail="y"
 	[ "$dl_fail" = "n" ] && e "$3" f && return 0
-	mkdir -p "${3%/*}" "$XBMK_CACHE/file" || \
-	    $err "!mkdir '$3' '$XBMK_CACHE/file'"
+	x_ mkdir -p "${3%/*}" "$XBMK_CACHE/file"
 	for url in "$1" "$2"; do
 		[ "$dl_fail" = "n" ] && break
 		[ -z "$url" ] && continue

From 0c381028abc16de9ec421bf06e2a3b80ba3097dd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 22:29:21 +0100
Subject: [PATCH 1160/1549] mk: tidier error handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 16 ++++++----------
 1 file changed, 6 insertions(+), 10 deletions(-)

diff --git a/mk b/mk
index 67261386..68979258 100755
--- a/mk
+++ b/mk
@@ -290,14 +290,13 @@ build_dependencies()
 		bd_t="${bd##*/}"
 		[ -z "$bd_p" ] && $dry $err "$project/$tree: !bd '$bd'"
 		[ "${bd##*/}" = "$bd" ] && bd_t=""
-		[ -z "$bd_p" ] || $dry ./mk -b $bd_p $bd_t \
-		    || $err "!mk $project/$tree $bd_p/$bd_t"; :
+		[ -z "$bd_p" ] || $dry x_ ./mk -b $bd_p $bd_t; :
 	done; :
 }
 
 check_project_hashes()
 {
-	mkdir -p "$XBMK_CACHE/hash" || $err "!mkdir '$XBMK_CACHE/hash'"
+	x_ mkdir -p "$XBMK_CACHE/hash"
 	old_pjhash=""
 	[ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
 	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
@@ -348,8 +347,7 @@ check_cross_compiler()
 		xfix="${_xarch%-*}" && [ "$xfix" = "x86_64" ] && xfix="x64"
 
 		# match gnat-X to gcc
-		check_gnu_path gcc gnat || check_gnu_path gnat gcc || \
-		    $err "Cannot match host GCC/GNAT versions"
+		check_gnu_path gcc gnat || x_ check_gnu_path gnat gcc
 
 		# sometimes buildgcc fails for like no reason. try twice.
 		make -C "$cbdir" crossgcc-$xfix $xgccargs || \
@@ -455,7 +453,7 @@ run_make_command()
 	    $dry check_autoconf "$srcdir"
 	$dry check_makefile "$srcdir" || return 1
 
-	$dry make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs || $err "!$mode"
+	$dry x_ make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs
 	mkhelp "$mkhelper"
 
 	[ "$mode" != "clean" ] || \
@@ -465,10 +463,8 @@ run_make_command()
 check_cmake()
 {
 	[ -z "$cmakedir" ] || $dry check_makefile "$1" || cmake -B "$1" \
-	    "$1/$cmakedir" || $dry check_makefile "$1" || $err \
-	    "$1: !cmk $cmakedir"
-	[ -z "$cmakedir" ] || $dry check_makefile "$1" || \
-	    $err "check_cmake $1: can't generate Makefile"; :
+	    "$1/$cmakedir" || $dry x_ check_makefile "$1"
+	[ -z "$cmakedir" ] || $dry x_ check_makefile "$1"; :
 }
 
 check_autoconf()

From 9b3635718a89c3cdb523e3d9ac478180fd53cb86 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 12 Apr 2025 22:43:28 +0100
Subject: [PATCH 1161/1549] mk: tidy up the switch/case block in main()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 16 +++++-----------
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/mk b/mk
index 68979258..b5dd7db7 100755
--- a/mk
+++ b/mk
@@ -30,18 +30,12 @@ main()
 
 	case "$1" in
 	version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
-	release)
+	release|download|inject)
+		cmd="vendor_$1" && [ "$1" = "release" ] && cmd="mkrelease"
 		shift 1
-		mkrelease "$@" ;;
-	inject)
-		shift 1
-		vendor_inject "$@" ;;
-	download)
-		shift 1
-		vendor_download "$@" ;;
-	-*)
-		rval=1 ;;
-	*) $err "bad command"
+		$cmd "$@" ;;
+	-*) rval=1 ;;
+	*) $err "bad command" ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
 	return $rval

From 4fa3bb9e5b18c7812d56b3713a4e0213879a0dc6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 13 Apr 2025 02:25:01 +0100
Subject: [PATCH 1162/1549] mk: use eval to run mkhelp commands

directly quoting it and running it quoted means
that the shell way try to execute it as a file.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mk b/mk
index b5dd7db7..29c8ee5d 100755
--- a/mk
+++ b/mk
@@ -479,7 +479,7 @@ check_makefile()
 
 mkhelp()
 {
-	[ -z "$1" ] || [ -n "$mode" ] || "$1" || $err "mkhelp: !$1"; :
+	[ -z "$1" ] || [ -n "$mode" ] || eval "$1" || $err "mkhelp: !$1"; :
 }
 
 copy_elf()

From 3bfdecdc75bbc77f795736ac282f858f2eb7ab94 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 13 Apr 2025 02:31:25 +0100
Subject: [PATCH 1163/1549] lib.sh: use eval for the command in x_

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 44b6a138..cb42c3d4 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -27,7 +27,7 @@ err_()
 	exit 1
 }
 x_() {
-	[ $# -lt 1 ] || "$@" || $err "Unhandled error for: $(echo "$@")"; :
+	[ $# -lt 1 ] || eval "$@" || $err "Unhandled error on: $(echo "$@")"; :
 }
 
 xbmkpwd="`pwd`" || $err "Cannot generate PWD"

From eb9e5d2d5d4cac5d07ab1b8160bcf929020927e3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 13 Apr 2025 03:57:04 +0100
Subject: [PATCH 1164/1549] lib.sh: fix bad eval writing version/versiondate

x_ cannot be used, where output is redirected to a file;
only the convention piping can be used, for errors.

relying on x_ in these cases will cause unpredictable bugs.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index cb42c3d4..99401259 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -167,7 +167,7 @@ versiondate_="$versiondate"
     --pretty='%ct' HEAD)" || versiondate="$versiondate_"
 for p in version versiondate; do
 	chkvars "$p"
-	eval "x_ printf \"%s\\n\" \"\$$p\" > .$p"
+	eval "printf \"%s\\n\" \"\$$p\" > .$p || $err \"can't save $p\""
 done
 relname="$projectname-$version"
 export LOCALVERSION="-$projectname-${version%%-*}"

From 738d4bb6b6d090d4e33b75a3ac14e655b9d20cb9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 13 Apr 2025 04:01:45 +0100
Subject: [PATCH 1165/1549] lib.sh: fix bad eval writing resized file

x_ cannot be used, where output is redirectod to a file;
only the conventional piping can be used.

same as the last change. this and the other fix were caught
during testing.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 6f7852d5..3693b5dc 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -525,7 +525,8 @@ process_release_rom()
 	    [ "${_xromname#"$vfix"}" != "$_xromname" ]; then
 		_xromnew="${_xrom%/*}/${_xromname#"$vfix"}"
 
-		x_ stat -c '%s' "$_xrom" > "tmp/rom.size"
+		stat -c '%s' "$_xrom" > "tmp/rom.size" || \
+		    $err "$_xrom: Can't resize '$_xrom' (out: tmp/rom.size)"
 		read -r xromsize < "tmp/rom.size" || \
 		    $err "$_xrom: Can't read rom size. $dontflash"
 

From 2e10a45fa3627cfd16fc4b0e76b52e23372449aa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 13 Apr 2025 05:15:13 +0100
Subject: [PATCH 1166/1549] Revert "lib.sh: use eval for the command in x_"

This reverts commit 3bfdecdc75bbc77f795736ac282f858f2eb7ab94.

The commit that this reverses, caused sch5545 ec firmware
downloads to fail, due to globbing.
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 99401259..cb8e0303 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -27,7 +27,7 @@ err_()
 	exit 1
 }
 x_() {
-	[ $# -lt 1 ] || eval "$@" || $err "Unhandled error on: $(echo "$@")"; :
+	[ $# -lt 1 ] || "$@" || $err "Unhandled error for: $(echo "$@")"; :
 }
 
 xbmkpwd="`pwd`" || $err "Cannot generate PWD"

From e90657cc734057bc947a5dbcb953b9b450597ce0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 13 Apr 2025 14:09:31 +0100
Subject: [PATCH 1167/1549] vendor.sh: Don't handle vendor files if not needed

This should speed up automated tests. Otherwise, it goes
through all the extra checks that aren't needed, for each
individual type of vendor file, and also errors out when
handling pico serprog images; during automated testing,
on the bin directory, you might try on every tarball, one
of which is the pico tarball and this patch makes lbmk skip
that one too.

In general, we must not perform unnecessary tasks. Doing so
may even cause other bugs that we couldn't easily detect.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 3693b5dc..412105c7 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -364,7 +364,9 @@ vendor_inject()
 
 	readcfg && need_files="y"
 	if [ "$need_files" = "y" ] || [ -n "$new_mac" ]; then
-		[ "$nukemode" = "nuke" ] || x_ ./mk download "$board"
+		if [ "$nukemode" != "nuke" ] && [ "$need_files" = "y" ]; then
+			x_ ./mk download "$board"
+		fi
 		patch_release_roms
 	fi
 	[ "$need_files" != "y" ] && printf \
@@ -460,6 +462,7 @@ patch_release_roms()
 	x_ tar -xf "$archive" -C "${tmpromdir%"/bin/$board"}"
 
 	for _hashes in $hashfiles; do
+		[ "$need_files" = "y" ] || break
 		e "$tmpromdir/$_hashes" f && has_hashes="y" && \
 		    hashfile="$_hashes" && break; :
 	done
@@ -486,6 +489,7 @@ patch_release_roms()
 	fi
 
 	(
+	[ "$need_files" = "y" ] || exit 0
 	cd "$tmpromdir" || $err "patch '$archive': can't cd $tmpromdir"
 	# NOTE: For compatibility with older rom releases, defer to sha1
 	if [ "$has_hashes" = "y" ] && [ "$nukemode" != "nuke" ]; then

From 166dbb04c9250e44da40faec6ac294966377781e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 13 Apr 2025 15:48:41 +0100
Subject: [PATCH 1168/1549] vendor.sh: set need_files="n" if skipping patch

This change finally ensures that no insertions will be
attempted, on the basis that readkconfig failed; this
covers the instance whereby vcfg was set, but no scanned
items were indicated e.g. Intel ME files not specified.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/vendor.sh b/include/vendor.sh
index 412105c7..eadbfbeb 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -486,6 +486,7 @@ patch_release_roms()
 		    "$vguide" > "$tmpromdir/README.md" || :
 	else
 		printf "Skipping vendorfiles on '%s'\n" "$archive" 1>&2
+		need_files="n"
 	fi
 
 	(

From 8b4b069e3f6abcdf9582f5a8fd7e14fb44c07ec3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 13 Apr 2025 15:53:36 +0100
Subject: [PATCH 1169/1549] vendor.sh: remove unnecessary xchanged="y"

in these if clauses, what follows afterward is exactly
the same: set xchanged and return.

Therefore, these lines are redundant and they can be
removed.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index eadbfbeb..3204654b 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -626,12 +626,8 @@ inject()
 		    $err "failed: inject '$_t' '$_dest' on '$rom'"
 		[ "$nukemode" != "nuke" ] || "$ifdtool" $ifdprefix --nuke $_t \
 		    "$rom" -O "$rom" || $err "$rom: !nuke IFD/$_t"
-		xchanged="y"
-		return 0
 	elif [ "$nukemode" = "nuke" ]; then
 		x_ "$cbfstool" "$rom" remove -n "$cbfsname"
-		xchanged="y"
-		return 0
 	elif [ "$_t" = "stage" ]; then # the only stage we handle is refcode
 		x_ mkdir -p tmp
 		x_ rm -f "tmp/refcode"

From 958fa34832a2c8b242ec1d885e0890ebaee2aae6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 13 Apr 2025 17:08:25 +0100
Subject: [PATCH 1170/1549] mk check_project_hashes: handle error on sha512sum

We can't do set -o pipefail in POSIX sh, which we're using,
but the build system has x_ which wraps around a command
and executes it, exiting with non-zero status if it does.

This fact enables lbmk to have functionality that is actually
superior to pipefail, since you can more easily control
specifically which parts error.

For example:

foo | bar | foo2 | bar2 | $err "error"

ERROR exits with non-zero status, but foo2, bar and foo
would not exit on error, only bar2 would. In *bash*, which
we avoid, set -o pipefail would make all of them exit on
error, but what if you wanted "bar" to not exit?

With lbmk, you could do, in the above example, and with the
above question asked ("what if you wanted bar not to exit"):

x_ foo | bar | x_ foo2 | bar2 > file | $err "error"

of course, you could also do, if not outputting to "file":

x_ foo | bar | x_ foo2 | x_ bar2

NOTE: in lbmk, $err is a variable containing the name of
a function that does something (whatever you want) and
then exits with non-zero status.

This entire explanation is beyond the scope of simply
providing (and explaining) this fix, but I also wanted to
use this commit as an example of the power of lbmk with
regards to POSIX shell scripting.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mk b/mk
index 29c8ee5d..2f5b6057 100755
--- a/mk
+++ b/mk
@@ -309,7 +309,7 @@ check_project_hashes()
 	    $err "!sort project tmp/list"
 
 	while read -r rmchk; do
-		[ ! -f "$rmchk" ] || sha512sum "$rmchk" | awk \
+		[ ! -f "$rmchk" ] || x_ sha512sum "$rmchk" | awk \
 		    '{print $1}' >> "$TMPDIR/project.hash" || $err "!h $rmchk"
 	done < "$TMPDIR/project.list"
 

From 58a53d7046fdfe8ff4e8a16d3a5f6c2562699384 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 13 Apr 2025 17:58:59 +0100
Subject: [PATCH 1171/1549] vendor.sh: don't err on bruteforce me extract

it wouldn't exit with error status anyway, since i'm
setting +e here, but if that accidentally changed in
the future, i still wouldn't want this to exit.

the bruteforce me extraction naturally throws a lot of
errors, hence +e, because of how the extraction works,
but the result is checked at the end of the process,
to compensate. hence +e, because otherwise this brute
force extraction would never work.

therefore, this is an extremely theoretical bug fix, the
most quintessential of preemptive bug fixes, to the point
that it is actually rather pedantic.

The ":" in "|| :" will likely *never* be executed, but it
handles the theoretical case where the subshell exits with
non-zero status and +e is set; subshells aren't meant to
behave this way anyway, but who knows what cursed sh
implementation the user is on?

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 3204654b..ceea429a 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -190,7 +190,7 @@ extract_intel_me_bruteforce()
 		cdir="$1"; [ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
 		cd "$cdir" || :
 	done
-	)
+	) || :
 	rm -Rf "$sdir" || $err "extract_intel_me: !rm -Rf $sdir - $dontflash"
 }
 

From c8dc701f3ebf3de75b4461e15f7324400240d064 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 16 Apr 2025 00:57:54 +0100
Subject: [PATCH 1172/1549] lib.sh mktarball: stricter tar error handling

There was no error handling, *at all*, on the actual tar
command, due to the lack of set -o pipefail, which we cannot
rely on in sh.

The x_ wrapper can be used in this case, as a mitigation.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index cb8e0303..e0c9b1a2 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -200,7 +200,7 @@ mktarball()
 	if [ "${2%/*}" != "$2" ]; then
 		mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
 	fi
-	tar -c "$1" | xz -T$XBMK_THREADS -9e > "$2" || $err "mktarball 2, $1"
+	x_ tar -c "$1" | xz -T$XBMK_THREADS -9e > "$2" || $err "mktarball2, $1"
 }
 
 mksha512sum()

From 39640d76a75098e7acf1cf2e3616978a5b0978f1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 04:22:03 +0100
Subject: [PATCH 1173/1549] lbmk: minor cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh    | 10 ++++------
 include/rom.sh    |  1 +
 include/vendor.sh |  5 ++---
 mk                |  8 ++++++--
 4 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 42b04010..a30d3aa4 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -61,9 +61,8 @@ git_prep()
 
 	[ "$project" = "coreboot" ] && [ -n "$xtree" ] && [ $# -gt 2 ] && \
 	    [ "$xtree" != "$tree" ] && link_crossgcc "$_loc"
-	[ "$XBMK_RELEASE" = "y" ] && \
-	    [ "$_loc" != "$XBMK_CACHE/repo/$project" ] && \
-	    rmgit "$tmpgit"
+	[ "$_loc" != "$XBMK_CACHE/repo/$project" ] && \
+	    [ "$XBMK_RELEASE" = "y" ] && rmgit "$tmpgit"
 
 	move_repo "$_loc"
 }
@@ -77,9 +76,8 @@ prep_submodules()
 
 fetch_submodule()
 {
-	mcfgdir="$mdir/${1##*/}"
-	eval "`setvars "" subhash subrepo subrepo_bkup subfile subfile_bkup \
-	    st`"
+	mcfgdir="$mdir/${1##*/}"; eval \
+	    "`setvars "" subhash subrepo subrepo_bkup subfile subfile_bkup st`"
 	[ ! -f "$mcfgdir/module.cfg" ] || . "$mcfgdir/module.cfg" || \
 	    $err "! . $mcfgdir/module.cfg"
 
diff --git a/include/rom.sh b/include/rom.sh
index 7e2271f1..0f6fafbf 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -283,6 +283,7 @@ mkcoreboottar()
 	[ "$target" = "$tree" ] && return 0
 	[ "$XBMK_RELEASE" = "y" ] || return 0
 	[ "$release" != "n" ] || return 0
+
 	$dry mkrom_tarball "bin/$target"
 	$dry x_ ./mk inject "bin/${relname}_${target}.tar.xz" nuke; :
 }
diff --git a/include/vendor.sh b/include/vendor.sh
index ceea429a..21b6e806 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -160,7 +160,6 @@ extract_intel_me()
 extract_intel_me_bruteforce()
 {
 	[ $# -gt 0 ] && cdir="$1"
-
 	e "$_metmp" f && return 0
 
 	[ -z "$sdir" ] && sdir="$(mktemp -d)"
@@ -537,8 +536,8 @@ process_release_rom()
 
 		expr "X$xromsize" : "X-\{0,1\}[0123456789][0123456789]*$" \
 		    1>/dev/null 2>/dev/null || $err "$_xrom size non-integer"
-		[ $xromsize -lt 2 ] && $err \
-		    "$_xrom: Will not create empty file. $dontflash"
+		[ $xromsize -lt 2 ] && \
+		    $err "$_xrom: Will not create empty file. $dontflash"
 
 		xromsize="`expr $xromsize - 1`"
 		[ $xromsize -lt 524288 ] && \
diff --git a/mk b/mk
index 2f5b6057..84778600 100755
--- a/mk
+++ b/mk
@@ -86,6 +86,7 @@ build_release()
 {
 	(
 	cd "$srcdir" || $err "$vdir: !cd \"$srcdir\""
+
 	./mk -f
 	x_ rm -Rf tmp
 	rmgit .
@@ -206,9 +207,11 @@ build_targets()
 		export PATH="$xbmkpath"
 		[ "$x" = "list" ] && x_ ls -1 "config/$project" && \
 		    listfile="" && break
+
 		target="$x"
 		printf "'make %s', '%s', '%s'\n" "$mode" "$project" "$target"
 		x_ handle_defconfig
+
 		mkhelp "$postmake"
 	done; :
 }
@@ -348,8 +351,7 @@ check_cross_compiler()
 		    x_ make -C "$cbdir" crossgcc-$xfix $xgccargs
 
 		# we only want to mess with hostcc to build xgcc
-		rm -f "$XBMK_CACHE/gnupath/"* || \
-		    $err "Cannot clear gnupath/"; :
+		rm -f "$XBMK_CACHE/gnupath/"* || $err "Can't clear gnupath/"; :
 	done; :
 }
 
@@ -425,6 +427,7 @@ elfcheck()
 handle_makefile()
 {
 	$dry check_makefile "$srcdir" && x_ make -C "$srcdir" $cleanargs clean
+
 	[ -f "$defconfig" ] && x_ cp "$defconfig" "$srcdir/.config"
 	[ -n "$mode" ] || [ -n "$btype" ] || $dry make -C \
 	    "$srcdir" silentoldconfig || make -C "$srcdir" oldconfig || :
@@ -443,6 +446,7 @@ handle_makefile()
 run_make_command()
 {
 	mkhelp "$premake"
+
 	$dry check_cmake "$srcdir" && [ -z "$mode" ] && \
 	    $dry check_autoconf "$srcdir"
 	$dry check_makefile "$srcdir" || return 1

From b2255425ebaa551c6c16a2f4d7682b4bd0be8996 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 04:22:25 +0100
Subject: [PATCH 1174/1549] rom.sh: remove unnecessary check

the cbfs function will call cbfstool, which will perform
the same check, and the same error condition would cause
the same exit behaviour in lbmk. the error message would
also provide output that is just as useful for debugging.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/rom.sh b/include/rom.sh
index 0f6fafbf..45ca5fd8 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -259,7 +259,6 @@ add_uboot()
 	[ "$payload_uboot_amd64" = "y" ] && \
 	    ubootelf="$ubdir/u-boot-x86-with-spl.bin" # EFI-compatible
 
-	[ -f "$ubootelf" ] || $err "cb/$ubtarget: Can't find u-boot"
 	cbfs "$tmprom" "$ubootelf" "$ubpath" $ubcbfsargs
 	[ "$payload_seabios" = "y" ] || cprom; :
 }

From 075902c3ea770985ee093dee3dc2252501dd37a7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 04:49:17 +0100
Subject: [PATCH 1175/1549] simplify a few file checks

the combination of x_ with the "e" function enables
for much simpler file-check error handling, which is
a unique innovation of lbmk as it pertains to sh.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 23 +++++++----------------
 mk                |  7 +++----
 2 files changed, 10 insertions(+), 20 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 21b6e806..dee6d389 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -170,7 +170,7 @@ extract_intel_me_bruteforce()
 	[ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
 	cd "$cdir" || $err "extract_intel_me: !cd \"$cdir\" - $dontflash"
 	for i in *; do
-		[ -f "$_metmp" ] && break
+		e "$_metmp" f && break
 		[ -L "$i" ] && continue
 		if [ -f "$i" ]; then
 			_r="-r" && [ -n "$mfs" ] && _r=""
@@ -231,27 +231,19 @@ decat_fspfd()
 
 extract_kbc1126ec()
 {
-	e "$kbc1126_ec_dump" f missing && \
-	    $err "$cbdir: kbc1126 util missing - $dontflash"
+	x_ e "$kbc1126_ec_dump" f
 	(
 	x_ cd "$appdir/"
 	mv Rompaq/68*.BIN ec.bin || :
 	if [ ! -f "ec.bin" ]; then
 		unar -D ROM.CAB Rom.bin || unar -D Rom.CAB Rom.bin || \
-		    unar -D 68*.CAB Rom.bin || \
-		    $err "can't extract Rom.bin - $dontflash"
+		    unar -D 68*.CAB Rom.bin || $err "kbc1126 unar failed"
 		x_ mv Rom.bin ec.bin
 	fi
-	[ -f ec.bin ] || \
-	    $err "extract_kbc1126_ec $board: can't extract - $dontflash"
-	"$kbc1126_ec_dump" ec.bin || \
-	    $err "!1126ec $board extract ecfw - $dontflash"
-	) || $err "can't extract kbc1126 ec firmware - $dontflash"
+	x_ e ec.bin f && x_ "$kbc1126_ec_dump" ec.bin
+	) || $err "$board: can't extract kbc1126 ec firmware - $dontflash"
 
-	e "$appdir/ec.bin.fw1" f not && \
-	    $err "$board: kbc1126ec fetch failed - $dontflash"
-	e "$appdir/ec.bin.fw2" f not && \
-	    $err "$board: kbc1126ec fetch failed - $dontflash"
+	x_ e "$appdir/ec.bin.fw1" f && x_ e "$appdir/ec.bin.fw2" f
 
 	cp "$appdir/"ec.bin.fw* "${_dest%/*}/" || \
 	    $err "!cp 1126ec $_dest - $dontflash"; :
@@ -264,8 +256,7 @@ extract_e6400vga()
 	tail -c +$E6400_VGA_offset "$_dl" | gunzip > "$appdir/bios.bin" || :
 	(
 	x_ cd "$appdir"
-	[ -f "bios.bin" ] || \
-	    $err "extract_e6400vga: can't extract bios.bin - $dontflash"
+	x_ e "bios.bin" f
 	"$e6400_unpack" bios.bin || printf "TODO: fix dell extract util\n"
 	) || $err "can't extract e6400 vga rom - $dontflosh"
 	x_ cp "$appdir/$E6400_VGA_romname" "$_dest"
diff --git a/mk b/mk
index 84778600..8460773e 100755
--- a/mk
+++ b/mk
@@ -163,7 +163,7 @@ trees()
 		return 1
 	fi
 
-	[ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined"
+	x_ e "config/git/$project/pkg.cfg" f
 
 	for d in "elf" "config/data" "config" "src"; do
 		eval "${d#*/}dir=\"$d/$project\""
@@ -249,10 +249,9 @@ configure_project()
 	    xarch xlang badhash`"
 	_tcfg="$1/target.cfg"
 	[ -f "$_tcfg" ] || btype="auto"
-	[ -f "$datadir/mkhelper.cfg" ] && \
-	    eval "`setcfg "$datadir/mkhelper.cfg"`"
+	e "$datadir/mkhelper.cfg" f && eval "`setcfg "$datadir/mkhelper.cfg"`"
 
-	while [ -f "$_tcfg" ] || [ "$cmd" != "build_project" ]; do
+	while e "$_tcfg" f || [ "$cmd" != "build_project" ]; do
 		eval "`setvars "" rev tree`"
 		eval "`setcfg "$_tcfg"`"
 		printf "Loading %s config: %s\n" "$project" "$_tcfg"

From 410fa702c9cf3b107b5e92379ace85e05c06603a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 05:06:21 +0100
Subject: [PATCH 1176/1549] mrc.sh: Make proper use of variable inside printf

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/mrc.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/mrc.sh b/include/mrc.sh
index a5f1b37c..6e00292b 100644
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -35,8 +35,8 @@ extract_partition()
 	dd if="${1%.zip}" of="root-a.ext2" bs=1024 skip=$(( $START / 1024 )) \
 	    count=$(( $SIZE / 1024 )) || $err "ex dd ${1%.zip}, root-a.ext2"
 
-	printf "cd /usr/sbin\ndump chromeos-firmwareupdate $SHELLBALL\nquit" \
-	    | debugfs "root-a.ext2" || $err "can't extract shellball"
+	printf "cd /usr/sbin\ndump chromeos-firmwareupdate %s\nquit" \
+	    "$SHELLBALL" | debugfs "root-a.ext2" || $err "!extract shellball"
 }
 
 extract_refcode()

From 2839feb9e43e44dd3f8ecbc2398dae8c0e78f3d0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 16:32:21 +0100
Subject: [PATCH 1177/1549] git.sh: make git_prep command clearer

the "u" argument can actually be any thing. git_prep
handles git submodules only for single-tree projects,
under any candition, or on multi-tree projects if
the number of arguments to git_prep is above four.

"u" is the 5th argument, meant to enable submodule
downloads. it really doesn't matter what this string
says, so let's just make it as clear as possible.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/git.sh b/include/git.sh
index a30d3aa4..22c8ee70 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -15,7 +15,7 @@ fetch_targets()
 
 	printf "Creating %s tree %s\n" "$project" "$tree"
 	git_prep "$loc" "$loc" "$xbmkpwd/$configdir/$tree/patches" \
-	    "src/$project/$tree" u
+	    "src/$project/$tree" with_submodules
 	nuke "$project/$tree" "$project/$tree"
 }
 

From e4aa62f79a814929808a4598240dca7ce8ba876a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 16:45:00 +0100
Subject: [PATCH 1178/1549] git.sh: remove prep_submodule()

merge it with git_prep, since it's only a tiny
function and only called from there. the for
loop moved to the if block still makes sense
on casual reading.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 11 +++--------
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 22c8ee70..e81c7a0d 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -56,7 +56,9 @@ git_prep()
 	chkvars rev
 	tmpclone "$1" "$2" "$tmpgit" "$rev" "$_patchdir"
 	if singletree "$project" || [ $# -gt 4 ]; then
-		prep_submodules "$_loc"
+		[ -f "$mdir/module.list" ] && while read -r msrcdir; do
+			fetch_submodule "$msrcdir"
+		done < "$mdir/module.list"; :
 	fi
 
 	[ "$project" = "coreboot" ] && [ -n "$xtree" ] && [ $# -gt 2 ] && \
@@ -67,13 +69,6 @@ git_prep()
 	move_repo "$_loc"
 }
 
-prep_submodules()
-{
-	[ -f "$mdir/module.list" ] && while read -r msrcdir; do
-		fetch_submodule "$msrcdir"
-	done < "$mdir/module.list"; :
-}
-
 fetch_submodule()
 {
 	mcfgdir="$mdir/${1##*/}"; eval \

From a685654b90f4d5a32740a89bdc7a363568478085 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 16:54:59 +0100
Subject: [PATCH 1179/1549] git.sh: remove move_repo()

merge it with git_prep, since it's only a small
function and only called from there. the merged
code still makes sense and its purpose is still
quite clear on casual reading.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index e81c7a0d..5efde03f 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -66,7 +66,8 @@ git_prep()
 	[ "$_loc" != "$XBMK_CACHE/repo/$project" ] && \
 	    [ "$XBMK_RELEASE" = "y" ] && rmgit "$tmpgit"
 
-	move_repo "$_loc"
+	[ "$_loc" = "${_loc%/*}" ] || x_ mkdir -p "${_loc%/*}"
+	mv "$tmpgit" "$_loc" || $err "git_prep: !mv $tmpgit $_loc"
 }
 
 fetch_submodule()
@@ -138,12 +139,6 @@ link_crossgcc()
 	) || $err "$1: !xgcc link"; :
 }
 
-move_repo()
-{
-	[ "$1" = "${1%/*}" ] || x_ mkdir -p "${1%/*}"
-	mv "$tmpgit" "$1" || $err "git_prep: !mv $tmpgit $1"
-}
-
 # can delete from multi- and single-tree projects.
 # called from script/trees when downloading sources.
 nuke()

From f5891fb69914cf3fbb33ead92e8709684d7fbdf8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 17:10:19 +0100
Subject: [PATCH 1180/1549] git.sh: remove link_crossgcc()

merge it with git_prep

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 16 ++++++----------
 1 file changed, 6 insertions(+), 10 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 5efde03f..7b0e9a4e 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -61,8 +61,12 @@ git_prep()
 		done < "$mdir/module.list"; :
 	fi
 
-	[ "$project" = "coreboot" ] && [ -n "$xtree" ] && [ $# -gt 2 ] && \
-	    [ "$xtree" != "$tree" ] && link_crossgcc "$_loc"
+	if [ "$project" = "coreboot" ] && [ -n "$xtree" ] && [ $# -gt 2 ] && \
+	    [ "$xtree" != "$tree" ]; then (
+		x_ cd "$tmpgit/util" && x_ rm -Rf crossgcc
+		x_ ln -s "../../$xtree/util/crossgcc" crossgcc
+	) || $err "$_loc: !xgcc link"; fi
+
 	[ "$_loc" != "$XBMK_CACHE/repo/$project" ] && \
 	    [ "$XBMK_RELEASE" = "y" ] && rmgit "$tmpgit"
 
@@ -131,14 +135,6 @@ git_am_patches()
 	done; :
 }
 
-link_crossgcc()
-{
-	(
-	x_ cd "$tmpgit/util" && x_ rm -Rf crossgcc
-	ln -s "../../$xtree/util/crossgcc" crossgcc || $err "$1: !xgcc link"
-	) || $err "$1: !xgcc link"; :
-}
-
 # can delete from multi- and single-tree projects.
 # called from script/trees when downloading sources.
 nuke()

From 38df7275f1263bc64bbf87e6ee7576aa6de176d2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 17:14:11 +0100
Subject: [PATCH 1181/1549] git.sh: remove unnecessary comment

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 7b0e9a4e..4fa904ba 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -135,8 +135,6 @@ git_am_patches()
 	done; :
 }
 
-# can delete from multi- and single-tree projects.
-# called from script/trees when downloading sources.
 nuke()
 {
 	e "config/${1%/}/nuke.list" f missing || while read -r nukefile; do

From 30213a96883c6affe622d7f2855d350d733c4e75 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 18:04:51 +0100
Subject: [PATCH 1182/1549] vendor.sh: remove unnecessary check

the next part checks whether the file is below 512k,
so there's no point checking if it's below 2, because
the lowest a file size can be is zero, and expr will
produce a result of -1 if decrementing from zero.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index dee6d389..5523cc6b 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -527,8 +527,6 @@ process_release_rom()
 
 		expr "X$xromsize" : "X-\{0,1\}[0123456789][0123456789]*$" \
 		    1>/dev/null 2>/dev/null || $err "$_xrom size non-integer"
-		[ $xromsize -lt 2 ] && \
-		    $err "$_xrom: Will not create empty file. $dontflash"
 
 		xromsize="`expr $xromsize - 1`"
 		[ $xromsize -lt 524288 ] && \

From a3acf4c3f95a77bc61d903db25a9434a7b611866 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 18:11:55 +0100
Subject: [PATCH 1183/1549] vendor.sh: simplify process_release_roms

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 5523cc6b..2e71a76a 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -520,17 +520,13 @@ process_release_rom()
 	    [ "${_xromname#"$vfix"}" != "$_xromname" ]; then
 		_xromnew="${_xrom%/*}/${_xromname#"$vfix"}"
 
-		stat -c '%s' "$_xrom" > "tmp/rom.size" || \
-		    $err "$_xrom: Can't resize '$_xrom' (out: tmp/rom.size)"
-		read -r xromsize < "tmp/rom.size" || \
-		    $err "$_xrom: Can't read rom size. $dontflash"
-
+		stat -c '%s' "$_xrom" > "tmp/rom.size" || $err "!resize $_xrom"
+		read -r xromsize < "tmp/rom.size" || $err "!readsize $_xrom"
 		expr "X$xromsize" : "X-\{0,1\}[0123456789][0123456789]*$" \
 		    1>/dev/null 2>/dev/null || $err "$_xrom size non-integer"
 
 		xromsize="`expr $xromsize - 1`"
-		[ $xromsize -lt 524288 ] && \
-		    $err "$_xrom size too small; likely not a rom. $dontflash"
+		[ $xromsize -lt 524288 ] && $err "too small, $xromsize: $_xrom"
 
 		x_ dd if="$_xrom" of="$_xromnew" bs=$xromsize count=1
 		rm -f "$_xrom" || $err "Can't rm $_xrom - $dontflash"

From 4e2b59ed3ff5a64d958ee5425f3532d6c6acf324 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 18:20:14 +0100
Subject: [PATCH 1184/1549] vendor.sh: minor cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 2e71a76a..8f4a37cc 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -551,12 +551,10 @@ patch_rom()
 	rom="$1"
 
 	if [ "$has_hashes" != "y" ] && [ "$nukemode" != "nuke" ]; then
-		printf "inject: '%s' has no hash file. Skipping.\n" \
-		    "$archive" 1>&2
+		printf "'%s' has no hash file. Skipping.\n" "$archive" 1>&2
 		return 1
 	elif [ "$has_hashes" = "y" ] && [ "$nukemode" = "nuke" ]; then
-		printf "inject nuke: '%s' has a hash file. Skipping nuke.\n" \
-		    "$archive" 1>&2
+		printf "'%s' has a hash file. Skipping nuke.\n" "$archive" 1>&2
 		return 1
 	fi
 
@@ -629,9 +627,7 @@ modify_mac_addresses()
 {
 	[ -n "$CONFIG_GBE_BIN_PATH" ] || return 1
 
-	x_ mkdir -p tmp
-	e tmp/gbe && x_ e tmp/gbe f
-	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" tmp/gbe
+	x_ mkdir -p tmp && x_ cp "${CONFIG_GBE_BIN_PATH##*../}" tmp/gbe
 
 	if [ "$new_mac" != "restore" ]; then
 		x_ make -C util/nvmutil

From fcedb17a9a10116d16d723f7209f16c8afa090f5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 18:38:20 +0100
Subject: [PATCH 1185/1549] vendor.sh: more cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 17 +++++------------
 1 file changed, 5 insertions(+), 12 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 8f4a37cc..c5bd40df 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -457,8 +457,7 @@ patch_release_roms()
 		    hashfile="$_hashes" && break; :
 	done
 
-	x_ mkdir -p "tmp"
-	[ -L "tmp/rom.list" ] && \
+	x_ mkdir -p "tmp" && [ -L "tmp/rom.list" ] && \
 	    $err "'$archive' -> tmp/rom.list is a symlink - $dontflash"
 	x_ rm -f "tmp/rom.list" "tmp/zero.1b"
 	x_ dd if=/dev/zero of=tmp/zero.1b bs=1 count=1
@@ -522,10 +521,8 @@ process_release_rom()
 
 		stat -c '%s' "$_xrom" > "tmp/rom.size" || $err "!resize $_xrom"
 		read -r xromsize < "tmp/rom.size" || $err "!readsize $_xrom"
-		expr "X$xromsize" : "X-\{0,1\}[0123456789][0123456789]*$" \
-		    1>/dev/null 2>/dev/null || $err "$_xrom size non-integer"
 
-		xromsize="`expr $xromsize - 1`"
+		xromsize="`expr $xromsize - 1`" || $err "!integer, $_xrom"
 		[ $xromsize -lt 524288 ] && $err "too small, $xromsize: $_xrom"
 
 		x_ dd if="$_xrom" of="$_xromnew" bs=$xromsize count=1
@@ -534,8 +531,7 @@ process_release_rom()
 		_xrom="$_xromnew"
 	fi
 
-	[ "$nukemode" = "nuke" ] && \
-		mksha512sum "$_xrom" "vendorhashes"
+	[ "$nukemode" = "nuke" ] && mksha512sum "$_xrom" "vendorhashes"
 
 	patch_rom "$_xrom" || return 1 # if break return, can still change MAC
 	[ "$nukemode" != "nuke" ] && return 0
@@ -628,11 +624,8 @@ modify_mac_addresses()
 	[ -n "$CONFIG_GBE_BIN_PATH" ] || return 1
 
 	x_ mkdir -p tmp && x_ cp "${CONFIG_GBE_BIN_PATH##*../}" tmp/gbe
-
-	if [ "$new_mac" != "restore" ]; then
-		x_ make -C util/nvmutil
-		x_ "$nvm" tmp/gbe setmac "$new_mac"
-	fi
+	[ "$new_mac" != "restore" ] && x_ make -C util/nvmutil && \
+	    x_ "$nvm" tmp/gbe setmac "$new_mac"
 
 	find "$tmpromdir" -maxdepth 1 -type f -name "*.rom" > "tmp/rom.list" \
 	    || $err "'$archive' -> Can't make tmp/rom.list - $dontflash"

From fe5bdc7633dafdcc9d1edbded9d5d9904ac89ce3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 21:59:02 +0100
Subject: [PATCH 1186/1549] vendor.sh: even more cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 70 ++++++++++++-----------------------------------
 1 file changed, 17 insertions(+), 53 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index c5bd40df..38e25348 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -343,66 +343,38 @@ vendor_inject()
 		    [ -z "$new_mac" ] && $err "Empty MAC address specified" ;;
 	*) $err "Unrecognised inject mode: '$2'"
 	esac
-
 	[ "$new_mac" = "keep" ] && new_mac=""
 
-	check_release "$archive" || \
-	    $err "You must run this script on a release archive. - $dontflash"
-
-	[ "$new_mac" = "restore" ] && \
-	    printf "Restoring default GbE for '$archive', board '$board'\n"
+	check_release "$archive" || $err "'$archive' is not a release archive"
 
 	readcfg && need_files="y"
 	if [ "$need_files" = "y" ] || [ -n "$new_mac" ]; then
-		if [ "$nukemode" != "nuke" ] && [ "$need_files" = "y" ]; then
-			x_ ./mk download "$board"
-		fi
+		[ "$nukemode" != "nuke" ] && [ "$need_files" = "y" ] && \
+		    x_ ./mk download "$board"
 		patch_release_roms
 	fi
-	[ "$need_files" != "y" ] && printf \
-	    "\nTarball '%s' (board '%s) doesn't need vendorfiles.\n" \
-	    "$archive" "$board" 1>&2
 
 	xtype="patched" && [ "$nukemode" = "nuke" ] && xtype="nuked"
 	[ "$xchanged" != "y" ] && \
-		printf "\nRelease archive '%s' was *NOT* modified.\n" \
-		    "$archive" && [ "$has_hashes" = "y" ] && \
-		    printf "WARNING: '%s' contains '%s'. DO NOT FLASH!\n" \
-		    "$archive" "$hashfile" 1>&2 && \
-		    printf "(vendorfiles may be needed and aren't there)\n" \
-		    1>&2
+		printf "\nArchive '%s' was *NOT* modified.\n" "$archive"
 	[ "$xchanged" = "y" ] && \
-		printf "\nRelease archive '%s' successfully %s.\n" \
-		    "$archive" "$xtype" && [ "$nukemode" != "nuke" ] && \
-		printf "You may now extract '%s' and flash images from it.\n" \
-		    "$archive"
+		printf "\nArchive '%s' successfully %s.\n" "$archive" "$xtype"
 	[ "$xchanged" = "y" ] && [ "$nukemode" = "nuke" ] && \
-		printf "WARNING! Vendorfiles *removed*. DO NOT FLASH.\n" 1>&2 \
-		    && printf "DO NOT flash images from '%s'\n" \
-		    "$archive" 1>&2
+		printf "WARNING! Vendorfiles *removed*. DO NOT FLASH.\n" 1>&2
 
 	[ "$need_files" = "n" ] && printf \
-	    "Board '%s' doesn't use vendorfiles, so none were inserted.\n" \
-	    "$board"
-
-	if [ "$xchanged" != "y" ] && [ "$need_files" = "y" ] && \
-	    [ "$nukemode" = "nuke" ] && [ "$has_hashes" != "y" ]; then
-		printf "FAILED NUKE: tarball '$archive', board '$board'\n" 1>&2
-		$err "Unhandled vendorfile deletion: DO NOT RELEASE TO RSYNC"
-	fi
+	    "Board '%s' doesn't use vendorfiles.\n" "$board"
 
 	err="$_olderr"; :
 }
 
 check_release()
 {
-	[ -L "$archive" ] && \
-	    $err "'$archive' is a symlink, not a file - $dontflash"
+	[ -L "$archive" ] && $err "'$archive' is a symlink. $dontflash"
 	e "$archive" f missing && return 1
 
 	archivename="`basename "$archive"`"
-	[ -z "$archivename" ] && \
-	    $err "Cannot determine archive file name - $dontflash"
+	[ -z "$archivename" ] && $err "Can't determine archive name. $dontflash"
 
 	case "$archivename" in
 	*_src.tar.xz)
@@ -424,8 +396,7 @@ readcfg()
 	boarddir="$cbcfgsdir/$board"
 
 	eval "`setcfg "$boarddir/target.cfg"`"
-	chkvars tree
-	x_ ./mk -d coreboot "$tree" # even if vendorfiles not used, see: setmac
+	chkvars tree && x_ ./mk -d coreboot "$tree"
 
 	[ -z "$vcfg" ] && return 1
 
@@ -446,8 +417,8 @@ readcfg()
 patch_release_roms()
 {
 	has_hashes="n"
-
 	tmpromdir="tmp/DO_NOT_FLASH/bin/$board"
+
 	remkdir "${tmpromdir%"/bin/$board"}"
 	x_ tar -xf "$archive" -C "${tmpromdir%"/bin/$board"}"
 
@@ -484,8 +455,7 @@ patch_release_roms()
 	# NOTE: For compatibility with older rom releases, defer to sha1
 	if [ "$has_hashes" = "y" ] && [ "$nukemode" != "nuke" ]; then
 		sha512sum --status -c "$hashfile" || \
-		    sha1sum --status -c "$hashfile" || \
-		    $err "'$archive' -> Can't verify vendor hashes. $dontflash"
+		    x_ sha1sum --status -c "$hashfile"
 		x_ rm -f "$hashfile"
 	fi
 	) || $err "'$archive' -> Can't verify vendor hashes. $dontflash"
@@ -508,21 +478,16 @@ process_release_rom()
 {
 	_xrom="$1"
 	_xromname="${1##*/}"
+	_xromnew="${_xrom%/*}/${_xromname#"$vfix"}"
+	[ "$nukemode" = "nuke" ] && _xromnew="${_xrom%/*}/$vfix${_xrom##*/}"
 
 	e "$_xrom" f missing && return 0
-
-	[ -z "${_xromname#"$vfix"}" ] && \
-	    $err "'$_xromname'->'"${_xromname#"$vfix"}"' empty. $dontflash"
+	[ -z "${_xromname#"$vfix"}" ] && $err "$_xromname / $vfix: name match"
 
 	# Remove the prefix and 1-byte pad
 	if [ "$nukemode" != "nuke" ] && \
 	    [ "${_xromname#"$vfix"}" != "$_xromname" ]; then
-		_xromnew="${_xrom%/*}/${_xromname#"$vfix"}"
-
-		stat -c '%s' "$_xrom" > "tmp/rom.size" || $err "!resize $_xrom"
-		read -r xromsize < "tmp/rom.size" || $err "!readsize $_xrom"
-
-		xromsize="`expr $xromsize - 1`" || $err "!integer, $_xrom"
+		xromsize="$(expr $(stat -c '%s' "$_xrom") - 1)" || $err "!int"
 		[ $xromsize -lt 524288 ] && $err "too small, $xromsize: $_xrom"
 
 		x_ dd if="$_xrom" of="$_xromnew" bs=$xromsize count=1
@@ -537,8 +502,7 @@ process_release_rom()
 	[ "$nukemode" != "nuke" ] && return 0
 
 	# Rename the file, prefixing a warning saying not to flash
-	cat "$_xrom" tmp/zero.1b > "${_xrom%/*}/$vfix${_xrom##*/}" || \
-	    $err "'$archive' -> can't pad/rename '$_xrom'. $dontflash"
+	cat "$_xrom" tmp/zero.1b > "$_xromnew" || $err "$archive: !pad $_xrom"
 	x_ rm -f "$_xrom"
 }
 

From b4402c5425829caf07bc94918d9c43814c41f360 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 22:14:19 +0100
Subject: [PATCH 1187/1549] vendor.sh: yet even more code cleanup

code equals bugs. code that doesn't exist can't
have bugs, so it is superior by definition.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/coreboot/0 | Bin 0 -> 1 bytes
 include/vendor.sh      |  37 +++++++++++--------------------------
 2 files changed, 11 insertions(+), 26 deletions(-)
 create mode 100644 config/data/coreboot/0

diff --git a/config/data/coreboot/0 b/config/data/coreboot/0
new file mode 100644
index 0000000000000000000000000000000000000000..f76dd238ade08917e6712764a16a22005a50573d
GIT binary patch
literal 1
IcmZPo000310RR91

literal 0
HcmV?d00001

diff --git a/include/vendor.sh b/include/vendor.sh
index 38e25348..239b0e52 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -127,8 +127,7 @@ fetch()
 	x_ mkdir -p "${_dest%/*}"
 	remkdir "$appdir"
 	extract_archive "$_dl" "$appdir" "$dl_type" || \
-	    [ "$dl_type" = "e6400vga" ] || \
-	    $err "mkd $_dest $dl_type: !extract. $dontflash"
+	    [ "$dl_type" = "e6400vga" ] || $err "$_dest $dl_type: !extract"
 
 	eval "extract_$dl_type"
 	set -u -e
@@ -323,7 +322,6 @@ fail_inject()
 vendor_inject()
 {
 	need_files="n"
-	_olderr="$err"
 	err="fail_inject"
 	remkdir "$tmpromdel"
 
@@ -355,17 +353,8 @@ vendor_inject()
 	fi
 
 	xtype="patched" && [ "$nukemode" = "nuke" ] && xtype="nuked"
-	[ "$xchanged" != "y" ] && \
-		printf "\nArchive '%s' was *NOT* modified.\n" "$archive"
-	[ "$xchanged" = "y" ] && \
-		printf "\nArchive '%s' successfully %s.\n" "$archive" "$xtype"
-	[ "$xchanged" = "y" ] && [ "$nukemode" = "nuke" ] && \
-		printf "WARNING! Vendorfiles *removed*. DO NOT FLASH.\n" 1>&2
-
-	[ "$need_files" = "n" ] && printf \
-	    "Board '%s' doesn't use vendorfiles.\n" "$board"
-
-	err="$_olderr"; :
+	[ "$xchanged" != "y" ] && printf "\n'%s' *NOT* modified.\n" "$archive"
+	[ "$xchanged" = "y" ] && printf "\n'%s' %s.\n" "$archive" "$xtype"; :
 }
 
 check_release()
@@ -430,8 +419,6 @@ patch_release_roms()
 
 	x_ mkdir -p "tmp" && [ -L "tmp/rom.list" ] && \
 	    $err "'$archive' -> tmp/rom.list is a symlink - $dontflash"
-	x_ rm -f "tmp/rom.list" "tmp/zero.1b"
-	x_ dd if=/dev/zero of=tmp/zero.1b bs=1 count=1
 
 	find "$tmpromdir" -maxdepth 1 -type f -name "*.rom" > "tmp/rom.list" \
 	    || $err "'$archive' -> Can't make tmp/rom.list - $dontflash"
@@ -440,10 +427,9 @@ patch_release_roms()
 		while read -r _xrom ; do
 			process_release_rom "$_xrom" || break
 		done < "tmp/rom.list"
-		rm -f "$tmpromdir/README.md" || :
 		[ "$nukemode" != "nuke" ] || \
-		    printf "Make sure you inserted vendor files: %s\n" \
-		    "$vguide" > "$tmpromdir/README.md" || :
+			printf "Make sure you inserted vendor files: %s\n" \
+			    "$vguide" > "$tmpromdir/README.md" || :
 	else
 		printf "Skipping vendorfiles on '%s'\n" "$archive" 1>&2
 		need_files="n"
@@ -460,14 +446,14 @@ patch_release_roms()
 	fi
 	) || $err "'$archive' -> Can't verify vendor hashes. $dontflash"
 
-	[ -z "$new_mac" ] || modify_mac_addresses || printf \
-	    "\nNo GbE region defined for '%s'\n" "$board" 1>&2
+	[ -z "$new_mac" ] || modify_mac || printf "\nGbE not defined\n" 1>&2
 
 	[ "$xchanged" = "y" ] || rm -Rf "$tmpromdel" || :
 	[ "$xchanged" = "y" ] || return 0
+
 	(
-		x_ cd "${tmpromdir%"/bin/$board"}"
-		mkrom_tarball "bin/$board"
+	x_ cd "${tmpromdir%"/bin/$board"}"
+	mkrom_tarball "bin/$board"
 	) || $err "Cannot re-generate '$archive' - $dontflash"
 
 	mv "${tmpromdir%"/bin/$board"}/bin/${relname}_${board}.tar.xz" \
@@ -502,7 +488,7 @@ process_release_rom()
 	[ "$nukemode" != "nuke" ] && return 0
 
 	# Rename the file, prefixing a warning saying not to flash
-	cat "$_xrom" tmp/zero.1b > "$_xromnew" || $err "$archive: !pad $_xrom"
+	cat "$_xrom" config/data/coreboot/0 > "$_xromnew" || $err "!pad $_xrom"
 	x_ rm -f "$_xrom"
 }
 
@@ -544,7 +530,6 @@ patch_rom()
 
 inject()
 {
-	[ $# -lt 3 ] && $err "bad command: $*, $rom"
 	[ "$2" = "/dev/null" ] && return 0
 
 	cbfsname="$1"
@@ -583,7 +568,7 @@ inject()
 	xchanged="y"; :
 }
 
-modify_mac_addresses()
+modify_mac()
 {
 	[ -n "$CONFIG_GBE_BIN_PATH" ] || return 1
 

From 9d3b52cd1d2c91912476ac4622ef33726e349e54 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 23:31:26 +0100
Subject: [PATCH 1188/1549] rom.sh: minor cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index 45ca5fd8..4ec473e5 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -43,7 +43,7 @@ mkpicotool()
 	x_ cd src/picotool
 	x_ cmake -DCMAKE_INSTALL_PREFIX=xbmkbin -DPICOTOOL_FLAT_INSTALL=1 \
 	    -DPICO_SDK_PATH=../pico-sdk
-	make install || $err "Can't build picotool"; :
+	x_ make install
 	) || $err "Can't build picotool"; :
 }
 
@@ -171,14 +171,13 @@ add_seabios()
 	fi
 
 	_seabioself="elf/seabios/default/$initmode/bios.bin.elf"
-
 	_seaname="fallback/payload" && [ "$payload_grubsea" = "y" ] && \
 	    _seaname="seabios.elf"
+
 	cbfs "$tmprom" "$_seabioself" "$_seaname"
 	x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
 
-	_z="2"
-	[ "$initmode" = "vgarom" ] && _z="0"
+	_z="2" && [ "$initmode" = "vgarom" ] && _z="0"
 	x_ "$cbfstool" "$tmprom" add-int -i $_z -n etc/pci-optionrom-exec
 	x_ "$cbfstool" "$tmprom" add-int -i 0 -n etc/optionroms-checksum
 	[ "$initmode" = "libgfxinit" ] && \

From e07a2adb130e86cf78fc1ee77a4d8b233a65cedf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 17 Apr 2025 23:43:22 +0100
Subject: [PATCH 1189/1549] lbmk: don't handle TMPDIR directly

lbmk creates TMPDIR as /tmp/xbmk_*, but it's theoretically
possible that something could re-export it by mistake.

this change retains the same initialisation, but further
use is now via a new variable "xbmktmp", that stores the
value of TMPDIR upon lbmk's initialisation of it.

this reduces the chance of such a bug in the future, as
described above, so it is a preemptive/preventative fix.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh    |  4 +++-
 include/rom.sh    | 11 ++++++-----
 include/vendor.sh |  6 +++---
 mk                | 20 ++++++++++----------
 4 files changed, 22 insertions(+), 19 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index e0c9b1a2..8de19d2a 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -50,7 +50,7 @@ chkvars()
 }
 
 eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
-    datadir version relname`"
+    datadir version relname xbmktmp`"
 
 for fv in version versiondate; do
 	eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
@@ -127,6 +127,7 @@ if [ -z "${TMPDIR+x}" ]; then
 	[ -f "lock" ] && $err "$xbmkpwd/lock exists. Is a build running?"
 	export TMPDIR="/tmp"
 	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
+	xbmktmp="$TMPDIR"
 	touch lock || $err "cannot create 'lock' file"
 	x_ rm -Rf "$XBMK_CACHE/xbmkpath" "$XBMK_CACHE/gnupath"
 	x_ mkdir -p "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
@@ -144,6 +145,7 @@ if [ -z "${TMPDIR+x}" ]; then
 	rm -f lock || xbmk_rval=1
 	exit $xbmk_rval
 fi
+xbmktmp="$TMPDIR"
 
 # if "y": a coreboot target won't be built if target.cfg says release="n"
 # (this is used to exclude certain build targets from releases)
diff --git a/include/rom.sh b/include/rom.sh
index 4ec473e5..710df853 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -12,7 +12,8 @@ mkserprog()
 
 	[ "$1" = "pico" ] && mkpicotool
 
-	basename -as .h "$serdir/"*.h > "$TMPDIR/ser" || $err "!mk $1 $TMPDIR"
+	basename -as .h "$serdir/"*.h > "$xbmktmp/ser" || \
+	    $err "!mk $1 $xbmktmp"
 
 	while read -r sertarget; do
 		[ "$1" = "pico" ] &&
@@ -31,7 +32,7 @@ mkserprog()
 		    "$sersrc" BOARD=$sertarget
 		x_ mkdir -p "bin/serprog_$1"
 		x_ mv "$serx" "bin/serprog_$1/serprog_$sertarget.${serx##*.}"
-	done < "$TMPDIR/ser"
+	done < "$xbmktmp/ser"
 
 	[ "$XBMK_RELEASE" = "y" ] && mkrom_tarball "bin/serprog_$1"; :
 }
@@ -115,7 +116,7 @@ mkcorebootbin()
 {
 	[ "$target" = "$tree" ] && return 0
 
-	tmprom="$TMPDIR/coreboot.rom"
+	tmprom="$xbmktmp/coreboot.rom"
 	$dry x_ cp "$srcdir/build/coreboot.rom" "$tmprom"
 
 	initmode="${defconfig##*/}"
@@ -201,8 +202,8 @@ add_grub()
 	    _grubname="fallback/payload"
 	cbfs "$tmprom" "$grubelf" "$_grubname"
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
-	    > "$TMPDIR/tmpcfg" || $err "$target: !insert scandisk"
-	cbfs "$tmprom" "$TMPDIR/tmpcfg" scan.cfg raw
+	    > "$xbmktmp/tmpcfg" || $err "$target: !insert scandisk"
+	cbfs "$tmprom" "$xbmktmp/tmpcfg" scan.cfg raw
 	[ "$initmode" != "normal" ] && [ "$displaymode" != "txtmode" ] && \
 	    cbfs "$tmprom" "$grubdata/background/background1280x800.png" \
 	    "background.png" raw; :
diff --git a/include/vendor.sh b/include/vendor.sh
index 239b0e52..a761cfaa 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -48,11 +48,11 @@ vendor_download()
 
 readkconfig()
 {
-	x_ rm -f "$TMPDIR/cbcfg"
+	x_ rm -f "$xbmktmp/cbcfg"
 	cbcfg="`check_defconfig "$boarddir"`" || for cbc in $cv; do
-		grep "$cbc" "$cbcfg" 1>>"$TMPDIR/cbcfg" 2>/dev/null || :
+		grep "$cbc" "$cbcfg" 1>>"$xbmktmp/cbcfg" 2>/dev/null || :
 	done
-	eval "`setcfg "$TMPDIR/cbcfg" 1`"
+	eval "`setcfg "$xbmktmp/cbcfg" 1`"
 
 	for c in $cvchk; do
 		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
diff --git a/mk b/mk
index 8460773e..9f4da41b 100755
--- a/mk
+++ b/mk
@@ -175,7 +175,7 @@ trees()
 
 	mkhelpercfg="$datadir/mkhelper.cfg"
 	if e "$mkhelpercfg" f missing; then
-		mkhelpercfg="$TMPDIR/mkhelper.cfg"
+		mkhelpercfg="$xbmktmp/mkhelper.cfg"
 		x_ touch "$mkhelpercfg"
 	fi
 
@@ -297,25 +297,25 @@ check_project_hashes()
 	[ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
 	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
 
-	x_ rm -f "$TMPDIR/project.list" "$TMPDIR/project.hash" \
-	    "$TMPDIR/project.tmp"
-	x_ touch "$TMPDIR/project.tmp"
-	x_ touch "$TMPDIR/project.hash"
+	x_ rm -f "$xbmktmp/project.list" "$xbmktmp/project.hash" \
+	    "$xbmktmp/project.tmp"
+	x_ touch "$xbmktmp/project.tmp"
+	x_ touch "$xbmktmp/project.hash"
 
 	for rmchk in "$datadir" "$configdir/$tree" "$mdir"; do
 		[ -d "$rmchk" ] || continue
 		find "$rmchk" -type f -not -path "*/.git*/*" >> \
-		    "$TMPDIR/project.tmp" || $err "!find $rmchk > project.tmp"
+		    "$xbmktmp/project.tmp" || $err "!find $rmchk > project.tmp"
 	done
-	sort "$TMPDIR/project.tmp" > "$TMPDIR/project.list" || \
+	sort "$xbmktmp/project.tmp" > "$xbmktmp/project.list" || \
 	    $err "!sort project tmp/list"
 
 	while read -r rmchk; do
 		[ ! -f "$rmchk" ] || x_ sha512sum "$rmchk" | awk \
-		    '{print $1}' >> "$TMPDIR/project.hash" || $err "!h $rmchk"
-	done < "$TMPDIR/project.list"
+		    '{print $1}' >> "$xbmktmp/project.hash" || $err "!h $rmchk"
+	done < "$xbmktmp/project.list"
 
-	pjhash="$(sha512sum "$TMPDIR/project.hash" | awk '{print $1}')" || :
+	pjhash="$(sha512sum "$xbmktmp/project.hash" | awk '{print $1}')" || :
 	[ "$pjhash" != "$old_pjhash" ] && badhash="y"
 	[ -f "$XBMK_CACHE/hash/$project$tree" ] || badhash="y"
 

From 6b6a0fa607ce23cc295b0987679fbe924701a803 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 18 Apr 2025 00:17:11 +0100
Subject: [PATCH 1190/1549] lib.sh: fix missing s/TMPDIR/xbmktmp

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 8de19d2a..7832db8e 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -141,7 +141,7 @@ if [ -z "${TMPDIR+x}" ]; then
 
 	xbmk_rval=0
 	./mk "$@" || xbmk_rval=1
-	rm -Rf "$TMPDIR" || xbmk_rval=1
+	rm -Rf "$xbmktmp" || xbmk_rval=1
 	rm -f lock || xbmk_rval=1
 	exit $xbmk_rval
 fi

From 3442f4278ed8536215125ade04a754b99bc24fde Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 18 Apr 2025 00:23:32 +0100
Subject: [PATCH 1191/1549] mk: simplify check_project_hashes()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 14 +++++---------
 1 file changed, 5 insertions(+), 9 deletions(-)

diff --git a/mk b/mk
index 9f4da41b..96d762a2 100755
--- a/mk
+++ b/mk
@@ -292,23 +292,19 @@ build_dependencies()
 
 check_project_hashes()
 {
-	x_ mkdir -p "$XBMK_CACHE/hash"
-	old_pjhash=""
+	old_pjhash="" && x_ mkdir -p "$XBMK_CACHE/hash"
 	[ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
 	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
 
 	x_ rm -f "$xbmktmp/project.list" "$xbmktmp/project.hash" \
 	    "$xbmktmp/project.tmp"
-	x_ touch "$xbmktmp/project.tmp"
-	x_ touch "$xbmktmp/project.hash"
+	x_ touch "$xbmktmp/project.tmp" "$xbmktmp/project.hash"
 
 	for rmchk in "$datadir" "$configdir/$tree" "$mdir"; do
-		[ -d "$rmchk" ] || continue
-		find "$rmchk" -type f -not -path "*/.git*/*" >> \
-		    "$xbmktmp/project.tmp" || $err "!find $rmchk > project.tmp"
+		[ ! -d "$rmchk" ] || find "$rmchk" -type f -not -path \
+		    "*/.git*/*" >> "$xbmktmp/project.tmp" || $err "!fh $rmchk"
 	done
-	sort "$xbmktmp/project.tmp" > "$xbmktmp/project.list" || \
-	    $err "!sort project tmp/list"
+	sort "$xbmktmp/project.tmp" > "$xbmktmp/project.list" || $err "!pj srt"
 
 	while read -r rmchk; do
 		[ ! -f "$rmchk" ] || x_ sha512sum "$rmchk" | awk \

From e11fd52d958d93590a499a2d88139302dd057f5c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 18 Apr 2025 00:27:33 +0100
Subject: [PATCH 1192/1549] mk: tidy up check_gnu_path()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/mk b/mk
index 96d762a2..a8e4e617 100755
--- a/mk
+++ b/mk
@@ -386,9 +386,8 @@ check_gnu_path()
 	rm -f "$XBMK_CACHE/gnupath/"* || $err "Cannot clear gnupath/"
 	cd "$XBMK_CACHE/gnupath" || $err "Can't cd to gnupath/"
 	for _gnubin in "$_gnudir/$2"*"-$_gnuver"; do
-		[ -e "$_gnubin" ] || continue
-		_gnuutil="${_gnubin##*/}"
-		x_ ln -s "$_gnubin" "${_gnuutil%"-$_gnuver"}"
+		_gnuutil="${_gnubin##*/}" && [ -e "$_gnubin" ] && \
+		    x_ ln -s "$_gnubin" "${_gnuutil%"-$_gnuver"}"
 	done
 	) || $err "Cannot create $2-$_gnuver link in $_gnudir"; :
 }

From 087bbedc5f80d8f7e326032f418aa802228a4a3c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 18 Apr 2025 00:35:48 +0100
Subject: [PATCH 1193/1549] vendor.sh: tidy up vendor_download()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index a761cfaa..c4e57069 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -42,8 +42,7 @@ vendor_download()
 {
 	[ $# -gt 0 ] || $err "No argument given"
 	export PATH="$PATH:/sbin"
-	board="$1"
-	readcfg && readkconfig && bootstrap && getfiles; :
+	board="$1" && readcfg && readkconfig && bootstrap && getfiles; :
 }
 
 readkconfig()

From 11078508a25a6d4b58de8b4364780929b87ef6e6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 18 Apr 2025 01:33:45 +0100
Subject: [PATCH 1194/1549] lib.sh: simplify mktarball()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 7832db8e..4d7001cf 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -199,9 +199,7 @@ mkrom_tarball()
 
 mktarball()
 {
-	if [ "${2%/*}" != "$2" ]; then
-		mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
-	fi
+	[ "${2%/*}" = "$2" ] || x_ mkdir -p "${2%/*}"
 	x_ tar -c "$1" | xz -T$XBMK_THREADS -9e > "$2" || $err "mktarball2, $1"
 }
 

From e63d8dd20d99ec18ef03699516fd800a81b7f1df Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 18 Apr 2025 01:52:44 +0100
Subject: [PATCH 1195/1549] git.sh: minor cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 4fa904ba..74942414 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -99,24 +99,21 @@ fetch_submodule()
 
 tmpclone()
 {
-	livepull="n" && [ "$repofail" = "y" ] && \
-	    printf "Cached clone failed; trying online.\n" 1>&2 && livepull="y"
-
-	repofail="n"
+	eval "`setvars "n" livepull repofail`"
+	[ "$repofail" = "y" ] && livepull="y"
 
 	[ $# -lt 6 ] || rm -Rf "$3" || $err "git retry: !rm $3 ($1)"
 	repodir="$XBMK_CACHE/repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"
 	mkdir -p "$XBMK_CACHE/repo" || $err "!rmdir $XBMK_CACHE/repo"
 
 	if [ "$livepull" = "y" ] && [ ! -d "$repodir" ]; then
-		git clone "$1" "$repodir" || git clone $2 "$repodir" || \
-		    $err "!clone $1 $2 $repodir $4 $5" #
+		git clone "$1" "$repodir" || x_ git clone $2 "$repodir"
 	elif [ -d "$repodir" ] && [ $# -lt 6 ]; then
 		git -C "$repodir" pull || sleep 3 || git -C "$repodir" pull \
 		    || sleep 3 || git -C "$repodir" pull || :
 	fi
 	(
-	[ $# -gt 5 ] || git clone "$repodir" "$3" || $err "!clone $repodir $3"
+	[ $# -gt 5 ] || x_ git clone "$repodir" "$3"
 	git -C "$3" reset --hard "$4" || $err "!reset $1 $2 $3 $4 $5"
 	git_am_patches "$3" "$5"
 	) || repofail="y"

From bac4be99c20cc74365d8f6b6fbb9087cef15a9d4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 18 Apr 2025 02:02:10 +0100
Subject: [PATCH 1196/1549] lib.sh: do root check before python check

we don't need python before the root check

principle of least privilege

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 4d7001cf..1fea3640 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -93,6 +93,9 @@ if [ $# -gt 0 ] && [ "$1" = "dependencies" ]; then
 	exit 0
 fi
 
+id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
+[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
+
 pyver="2"
 python="python3"
 command -v python3 1>/dev/null || python="python"
@@ -109,9 +112,6 @@ if [ "${pyver%%.*}" != "3" ]; then
 	exit 1
 fi
 
-id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
-[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
-
 # XBMK_CACHE is a directory, for caching downloads and git repositories
 [ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$xbmkpwd/cache"
 [ -z "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"

From 779f6003421ab939f0c7227940f39da9c7787997 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 18 Apr 2025 02:09:47 +0100
Subject: [PATCH 1197/1549] lib.sh: tidy up opening logic (put it together)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 21 +++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 1fea3640..7f8adcc6 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -30,9 +30,6 @@ x_() {
 	[ $# -lt 1 ] || "$@" || $err "Unhandled error for: $(echo "$@")"; :
 }
 
-xbmkpwd="`pwd`" || $err "Cannot generate PWD"
-export PWD="$xbmkpwd"
-
 setvars()
 {
 	_setvars="" && [ $# -lt 2 ] && $err "setvars: too few arguments"
@@ -49,13 +46,6 @@ chkvars()
 	done; :
 }
 
-eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
-    datadir version relname xbmktmp`"
-
-for fv in version versiondate; do
-	eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
-done
-
 setcfg()
 {
 	[ $# -gt 1 ] && printf "e \"%s\" f missing && return %s;\n" "$1" "$2"
@@ -88,6 +78,17 @@ install_packages()
 	[ -n "$aur_notice" ] && \
 	    printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; :
 }
+
+xbmkpwd="`pwd`" || $err "Cannot generate PWD"
+export PWD="$xbmkpwd"
+
+eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
+    datadir version relname xbmktmp`"
+
+for fv in version versiondate; do
+	eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
+done
+
 if [ $# -gt 0 ] && [ "$1" = "dependencies" ]; then
 	install_packages "$@" || exit 1
 	exit 0

From a2898771f6e3950cca9f6ba0e6510e06064d6256 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 18 Apr 2025 02:16:21 +0100
Subject: [PATCH 1198/1549] lib.sh: perform root check even earlier

initialising variables, setting PWD, setting version,
this is all unnecessary before the root check, because
the dependencies commands use none of these.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 7f8adcc6..21066ecc 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -79,16 +79,9 @@ install_packages()
 	    printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; :
 }
 
-xbmkpwd="`pwd`" || $err "Cannot generate PWD"
-export PWD="$xbmkpwd"
-
 eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
     datadir version relname xbmktmp`"
 
-for fv in version versiondate; do
-	eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
-done
-
 if [ $# -gt 0 ] && [ "$1" = "dependencies" ]; then
 	install_packages "$@" || exit 1
 	exit 0
@@ -97,6 +90,13 @@ fi
 id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
 [ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
 
+xbmkpwd="`pwd`" || $err "Cannot generate PWD"
+export PWD="$xbmkpwd"
+
+for fv in version versiondate; do
+	eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
+done
+
 pyver="2"
 python="python3"
 command -v python3 1>/dev/null || python="python"

From 8d57bf6009e3eb6ed0dfab042981a700e9f093a3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 18 Apr 2025 02:25:16 +0100
Subject: [PATCH 1199/1549] Revert "git.sh: minor cleanup"

This reverts commit e63d8dd20d99ec18ef03699516fd800a81b7f1df.
---
 include/git.sh | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 74942414..4fa904ba 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -99,21 +99,24 @@ fetch_submodule()
 
 tmpclone()
 {
-	eval "`setvars "n" livepull repofail`"
-	[ "$repofail" = "y" ] && livepull="y"
+	livepull="n" && [ "$repofail" = "y" ] && \
+	    printf "Cached clone failed; trying online.\n" 1>&2 && livepull="y"
+
+	repofail="n"
 
 	[ $# -lt 6 ] || rm -Rf "$3" || $err "git retry: !rm $3 ($1)"
 	repodir="$XBMK_CACHE/repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"
 	mkdir -p "$XBMK_CACHE/repo" || $err "!rmdir $XBMK_CACHE/repo"
 
 	if [ "$livepull" = "y" ] && [ ! -d "$repodir" ]; then
-		git clone "$1" "$repodir" || x_ git clone $2 "$repodir"
+		git clone "$1" "$repodir" || git clone $2 "$repodir" || \
+		    $err "!clone $1 $2 $repodir $4 $5" #
 	elif [ -d "$repodir" ] && [ $# -lt 6 ]; then
 		git -C "$repodir" pull || sleep 3 || git -C "$repodir" pull \
 		    || sleep 3 || git -C "$repodir" pull || :
 	fi
 	(
-	[ $# -gt 5 ] || x_ git clone "$repodir" "$3"
+	[ $# -gt 5 ] || git clone "$repodir" "$3" || $err "!clone $repodir $3"
 	git -C "$3" reset --hard "$4" || $err "!reset $1 $2 $3 $4 $5"
 	git_am_patches "$3" "$5"
 	) || repofail="y"

From 86e7aa80c51979767208b858dac5f38d7e83914e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 20 Apr 2025 05:42:50 +0100
Subject: [PATCH 1200/1549] Update the GRUB revisions

A number of regressions were caused by the recent CVE fixes,
many of which have since been fixed upstream. This includes
several ext4 file system bugs, which caused some systems not
to boot properly, when dealing with very large initramfs files.

No additional patching has been made. This will be tested, and
then used to provide a revision update for Libreboot 20241206.

After this, there are several additional OOT patches that will
be merged, for the next *testing release* of Libreboot.

Update to this revision, for all GRUB trees:
a4da71dafeea519b034beb159dfe80c486c2107c

This brings in the following changes from upstream:
* a4da71daf util/grub-install: Include raid5rec module for RAID 4 as well
* 223fcf808 loader/ia64/efi/linux: Reset grub_errno on failure to allocate
* 6504a8d4b lib/datetime: Specify license in emu module
* 8fef533cf configure: Add -mno-relax on riscv*
* 1fe094855 docs: Document the long options of tpm2_key_protect_init
* 6252eb97c INSTALL: Document the packages needed for TPM2 key protector tests
* 9d4b382aa docs: Update NV index mode of TPM2 key protector
* 2043b6899 tests/tpm2_key_protector_test: Add more NV index mode tests
* 9f66a4719 tests/tpm2_key_protector_test: Reset "ret" on fail
* b7d89e667 tests/tpm2_key_protector_test: Simplify the NV index mode test
* 5934bf51c util/grub-protect: Support NV index mode
* cd9cb944d tpm2_key_protector: Support NV index handles
* fa69deac5 tpm2_key_protector: Unseal key from a buffer
* 75c480885 tss2: Add TPM 2.0 NV index commands
* 041164d00 tss2: Fix the missing authCommand
* 46c9f3a8d tpm2_key_protector: Add tpm2_dump_pcr command
* 617dab9e4 tpm2_key_protector: Dump PCRs on policy fail
* 204a6ddfb loader/i386/linux: Update linux_kernel_params to match upstream
* 6b64f297e loader/xnu: Fix memory leak
* f94d257e8 fs/btrfs: Fix memory leaks
* 81146fb62 loader/i386/linux: Fix resource leak
* 1d0059447 lib/reloacator: Fix memory leaks
* f3f1fcecd disk/ldm: Fix memory leaks
* aae2ea619 fs/ntfs: Fix NULL pointer dereference and possible infinite loop
* 3b25e494d net/drivers/ieee1275/ofnet: Add missing grub_malloc()
* fee6081ec kern/ieee1275/init: Increase MIN_RMA size for CAS negotiation on PowerPC machines
* b66c6f918 fs/zfs: Fix a number of memory leaks in ZFS code
* 1d59f39b5 tests/util/grub-shell: Remove the work directory on successful run and debug is not on
* e0116f3bd tests/grub_cmd_cryptomount: Remove temporary directories if successful and debug is not on
* e6e2b73db tests/grub_cmd_cryptomount: Default TMPDIR to /tmp
* 32b02bb92 tests/grub_cmd_cryptomount: Cleanup the cryptsetup script unless debug is enabled
* c188ca5d5 tests: Cleanup generated files on expected failure in grub_cmd_cryptomount
* 50320c093 tests/util/grub-shell-luks-tester: Add missing line to create RET variable in cleanup
* bb6d3199b tests/util/grub-shell-luks-tester: Find cryptodisk by UUID
* 3fd163e45 tests/util/grub-shell: Default qemuopts to envvar $GRUB_QEMU_OPTS
* ff7f55307 disk/lvm: Add informational messages in error cases of ignored features
* a16b4304a disk/lvm: Add support for cachevol LV
* 9a37d6114 disk/lvm: Add support for integrity LV
* 6c14b87d6 lvm: Match all LVM segments before validation
* d34b9120e disk/lvm: Remove unused cache_pool
* 90848a1f7 disk/lvm: Make cache_lv more generic as ignored_feature_lv
* 488ac8bda commands/ls: Add directory header for dir args
* 096bf59e4 commands/ls: Print full paths for file args
* 90288fc48 commands/ls: Output path for single file arguments given with path
* 6337d84af commands/ls: Show modification time for file paths
* cbfb031b1 commands/ls: Merge print_files_long() and print_files() into print_file()
* 112d2069c commands/ls: Return proper GRUB_ERR_* for functions returning type grub_err_t
* da9740cd5 commands/acpi: Use options enum to index command options
* 1acf11fe4 docs: Capture additional commands restricted by lockdown
* 6a168afd3 docs: Document restricted filesystems in lockdown
* be0ae9583 loader/i386/bsd: Fix type passed for the kernel
* ee27f07a6 kern/partition: Unbreak support for nested partitions
* cb639acea lib/tss2/tss2_structs.h: Fix clang build - remove duplicate typedef
* 696e35b7f include/grub/mm.h: Remove duplicate inclusion of grub/err.h
* 187338f1a script/execute: Don't let trailing blank lines determine the return code
* ff173a1c0 gitignore: Ignore generated files from libtasn
* fbcc38891 util/grub.d/30_os-prober.in: Conditionally show or hide chain and efi menu entries
* 56ccc5ed5 util/grub.d/30_os-prober.in: Fix GRUB_OS_PROBER_SKIP_LIST for non-EFI
* 01f064064 docs: Do not reference non-existent --dumb option
* 3f440b5a5 docs: Replace @lbracechar{} and @rbracechar{} with @{ and @}
* f20988738 fs/xfs: Fix grub_xfs_iterate_dir() return value in case of failure
* 1ed2628b5 fs/xfs: Add new superblock features added in Linux 6.12/6.13
* 348cd416a fs/ext2: Rework out-of-bounds read for inline and external extents
* c730eddd2 disk/ahci: Remove conditional operator for endtime
* f0a08324d term/ns8250-spcr: Return if redirection is disabled
* 7161e2437 commands/file: Fix NULL dereference in the knetbsd tests
* 11b9c2dd0 gdb_helper: Typo hueristic
* 224aefd05 kern/efi/mm: Reset grub_mm_add_region_fn after ExitBootServices() call
* 531750f7b i386/tsc: The GRUB menu gets stuck due to unserialized rdtsc
* f2a1f66e7 kern/i386/tsc_pmtimer: The GRUB menu gets stuck due to failed calibration
* 13f005ed8 loader/i386/linux: Fix cleanup if kernel doesn't support 64-bit addressing

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...tigate-grub-s-missing-characters-for-borders-arrow.patch | 2 +-
 .../0002-say-the-name-libreboot-in-the-grub-menu.patch      | 2 +-
 config/grub/default/patches/0003-Add-CC0-license.patch      | 2 +-
 .../grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch  | 2 +-
 config/grub/default/patches/0005-Add-Argon2-algorithm.patch | 4 ++--
 .../patches/0006-Error-on-missing-Argon2id-parameters.patch | 2 +-
 .../patches/0007-Compile-with-Argon2id-support.patch        | 2 +-
 .../patches/0008-Make-grub-install-work-with-Argon2.patch   | 4 ++--
 ...09-at_keyboard-coreboot-force-scancodes2-translate.patch | 2 +-
 .../0010-keylayouts-don-t-print-Unknown-key-message.patch   | 2 +-
 ...11-don-t-print-missing-prefix-errors-on-the-screen.patch | 2 +-
 .../0012-don-t-print-error-if-module-not-found.patch        | 2 +-
 .../patches/0013-don-t-print-empty-error-messages.patch     | 2 +-
 config/grub/default/target.cfg                              | 2 +-
 ...tigate-grub-s-missing-characters-for-borders-arrow.patch | 2 +-
 .../0002-say-the-name-libreboot-in-the-grub-menu.patch      | 2 +-
 config/grub/nvme/patches/0003-Add-CC0-license.patch         | 2 +-
 config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch  | 2 +-
 config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch    | 4 ++--
 .../patches/0006-Error-on-missing-Argon2id-parameters.patch | 2 +-
 .../nvme/patches/0007-Compile-with-Argon2id-support.patch   | 2 +-
 .../patches/0008-Make-grub-install-work-with-Argon2.patch   | 4 ++--
 ...09-at_keyboard-coreboot-force-scancodes2-translate.patch | 2 +-
 .../0010-keylayouts-don-t-print-Unknown-key-message.patch   | 2 +-
 ...11-don-t-print-missing-prefix-errors-on-the-screen.patch | 2 +-
 .../0012-don-t-print-error-if-module-not-found.patch        | 2 +-
 .../patches/0013-don-t-print-empty-error-messages.patch     | 2 +-
 .../0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch      | 2 +-
 config/grub/nvme/target.cfg                                 | 2 +-
 ...tigate-grub-s-missing-characters-for-borders-arrow.patch | 4 ++--
 .../0002-say-the-name-libreboot-in-the-grub-menu.patch      | 4 ++--
 config/grub/xhci/patches/0003-Add-CC0-license.patch         | 4 ++--
 config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch  | 4 ++--
 config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch    | 6 +++---
 .../patches/0006-Error-on-missing-Argon2id-parameters.patch | 4 ++--
 .../xhci/patches/0007-Compile-with-Argon2id-support.patch   | 4 ++--
 .../patches/0008-Make-grub-install-work-with-Argon2.patch   | 6 +++---
 ...09-at_keyboard-coreboot-force-scancodes2-translate.patch | 4 ++--
 .../0010-keylayouts-don-t-print-Unknown-key-message.patch   | 4 ++--
 ...11-don-t-print-missing-prefix-errors-on-the-screen.patch | 4 ++--
 .../0012-don-t-print-error-if-module-not-found.patch        | 4 ++--
 .../patches/0013-don-t-print-empty-error-messages.patch     | 4 ++--
 ...ub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch | 4 ++--
 config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch   | 4 ++--
 .../0016-usbtrans-Set-default-maximum-packet-size.patch     | 4 ++--
 ...ub-core-bus-usb-Add-function-pointer-for-attach-de.patch | 4 ++--
 ...ub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch | 4 ++--
 .../patches/0019-grub-core-bus-usb-Add-xhci-support.patch   | 4 ++--
 ...ub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch | 4 ++--
 .../patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch  | 4 ++--
 config/grub/xhci/patches/0022-xhci-fix-port-indexing.patch  | 4 ++--
 ...patch => 0023-xhci-configure-TT-for-non-root-hubs.patch} | 6 +++---
 ...on-x86_64.patch => 0024-Fix-compilation-on-x86_64.patch} | 6 +++---
 ...h => 0025-Add-native-NVMe-driver-based-on-SeaBIOS.patch} | 4 ++--
 config/grub/xhci/target.cfg                                 | 2 +-
 55 files changed, 88 insertions(+), 88 deletions(-)
 rename config/grub/xhci/patches/{0024-xhci-configure-TT-for-non-root-hubs.patch => 0023-xhci-configure-TT-for-non-root-hubs.patch} (95%)
 rename config/grub/xhci/patches/{0025-Fix-compilation-on-x86_64.patch => 0024-Fix-compilation-on-x86_64.patch} (95%)
 rename config/grub/xhci/patches/{0026-Add-native-NVMe-driver-based-on-SeaBIOS.patch => 0025-Add-native-NVMe-driver-based-on-SeaBIOS.patch} (99%)

diff --git a/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
index 391beaf1..ffd2c537 100644
--- a/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
+++ b/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -1,4 +1,4 @@
-From 016f8655f5bed2b65c19e0e127b72ba3cfbcfb7d Mon Sep 17 00:00:00 2001
+From 8ccafb60665bba3759248b13d2d1683818aaf4ee Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 31 Oct 2021 03:47:05 +0000
 Subject: [PATCH 01/13] mitigate grub's missing characters for borders/arrow
diff --git a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 149b719d..933e7dfa 100644
--- a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -1,4 +1,4 @@
-From d7f6f258ea14ec47d586eccbd0f5d96784e8bd15 Mon Sep 17 00:00:00 2001
+From 3fb09986e62a9945862456d5f1d63a6ccba2c861 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 19 Nov 2022 16:30:24 +0000
 Subject: [PATCH 02/13] say the name libreboot, in the grub menu
diff --git a/config/grub/default/patches/0003-Add-CC0-license.patch b/config/grub/default/patches/0003-Add-CC0-license.patch
index 09c55867..c074099a 100644
--- a/config/grub/default/patches/0003-Add-CC0-license.patch
+++ b/config/grub/default/patches/0003-Add-CC0-license.patch
@@ -1,4 +1,4 @@
-From 85a88ecf10e1dd5cef7244aedaf7db76e845045f Mon Sep 17 00:00:00 2001
+From dc790ff2ba2702ee863c9d16e05cf843a152f3d4 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 03/13] Add CC0 license
diff --git a/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch
index 8277df92..af617683 100644
--- a/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch
+++ b/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch
@@ -1,4 +1,4 @@
-From bb12d671182c455c894979a8a5890f5f4baa02dc Mon Sep 17 00:00:00 2001
+From 298eaaca770545e19dfacd47511c2081c1fece08 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 04/13] Define GRUB_UINT32_MAX
diff --git a/config/grub/default/patches/0005-Add-Argon2-algorithm.patch b/config/grub/default/patches/0005-Add-Argon2-algorithm.patch
index 452c0937..dacd83ee 100644
--- a/config/grub/default/patches/0005-Add-Argon2-algorithm.patch
+++ b/config/grub/default/patches/0005-Add-Argon2-algorithm.patch
@@ -1,4 +1,4 @@
-From 216e1351e5957e0589d488427a6dfee246705d0d Mon Sep 17 00:00:00 2001
+From 378aa081ac1211d0bf4043eeb0bb7d4aa534043f Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 05/13] Add Argon2 algorithm
@@ -30,7 +30,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  create mode 100644 grub-core/lib/argon2/ref.c
 
 diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi
-index 3ad8e3efa..d7c6232af 100644
+index f4367f895..9d96cedf9 100644
 --- a/docs/grub-dev.texi
 +++ b/docs/grub-dev.texi
 @@ -503,12 +503,76 @@ GRUB includes some code from other projects, and it is sometimes necessary
diff --git a/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch
index 33bc9417..f1ea10c2 100644
--- a/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch
+++ b/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch
@@ -1,4 +1,4 @@
-From a2687cc594714ff33a4c50d40222c113768ed826 Mon Sep 17 00:00:00 2001
+From febaf431d235f07b97f07f935611dc168b0b35bb Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 06/13] Error on missing Argon2id parameters
diff --git a/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch
index 7d22cc74..c0a8fffb 100644
--- a/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch
+++ b/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch
@@ -1,4 +1,4 @@
-From 2d1af8f5dfd1492ac95bcf7db4e6c789aa83018e Mon Sep 17 00:00:00 2001
+From 12d3e4dfff3f92daf2f3f73cc0797425f7bb9df6 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 07/13] Compile with Argon2id support
diff --git a/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch
index e73a7ccb..12e78752 100644
--- a/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch
+++ b/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch
@@ -1,4 +1,4 @@
-From 67900e39bd45018b5611862b9438081c618b916f Mon Sep 17 00:00:00 2001
+From 8e639e9558c98019566743cc5723e641b1726d15 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 08/13] Make grub-install work with Argon2
@@ -9,7 +9,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  1 file changed, 2 insertions(+)
 
 diff --git a/util/grub-install.c b/util/grub-install.c
-index 7dc5657bb..cf7315891 100644
+index 060246589..059036d3c 100644
 --- a/util/grub-install.c
 +++ b/util/grub-install.c
 @@ -448,6 +448,8 @@ probe_mods (grub_disk_t disk)
diff --git a/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
index d1973955..50195201 100644
--- a/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
+++ b/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -1,4 +1,4 @@
-From e8ae938700e715194e47d346c43aa4be23f1b4bf Mon Sep 17 00:00:00 2001
+From 8a098ee241040ccfdf03636f558ef6a3b431bb90 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 30 Oct 2023 22:19:21 +0000
 Subject: [PATCH 09/13] at_keyboard coreboot: force scancodes2+translate
diff --git a/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
index c9e41d8e..685e21c4 100644
--- a/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
+++ b/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
@@ -1,4 +1,4 @@
-From dfd1639bb999e3dbbd346cc97f4bbaf32d129cd6 Mon Sep 17 00:00:00 2001
+From d86b69fa2c0d73440e5b990d8ab4b66c5c23fa46 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 31 Oct 2023 10:33:28 +0000
 Subject: [PATCH 10/13] keylayouts: don't print "Unknown key" message
diff --git a/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
index 72c51f8b..f15d78e1 100644
--- a/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
+++ b/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -1,4 +1,4 @@
-From 8421c59fa62ce954dcba05ad04591c651d6dcf43 Mon Sep 17 00:00:00 2001
+From 3726c1e12b8896e4a77cc7a2b490e933dc2c08da Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:14:58 +0000
 Subject: [PATCH 11/13] don't print missing prefix errors on the screen
diff --git a/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch
index dab4318c..713f1244 100644
--- a/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch
+++ b/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch
@@ -1,4 +1,4 @@
-From c377f3c025101da17252a43449cc58fdd44c44af Mon Sep 17 00:00:00 2001
+From c86a635609a4623baa9312f5c1bebfd51f5883a1 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:36:22 +0000
 Subject: [PATCH 12/13] don't print error if module not found
diff --git a/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch
index c351a74a..d23ea109 100644
--- a/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch
+++ b/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch
@@ -1,4 +1,4 @@
-From 664ce75106049547d7595fc021a0a1f9a69e585a Mon Sep 17 00:00:00 2001
+From 715ba566042aa140cbeb06836c558460ef6f446f Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 17:25:20 +0000
 Subject: [PATCH 13/13] don't print empty error messages
diff --git a/config/grub/default/target.cfg b/config/grub/default/target.cfg
index 8264d306..a9dab736 100644
--- a/config/grub/default/target.cfg
+++ b/config/grub/default/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="default"
-rev="4dc6166571645780c459dde2cdc1b001a5ec844c"
+rev="a4da71dafeea519b034beb159dfe80c486c2107c"
diff --git a/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
index 1421d21b..dff2503c 100644
--- a/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
+++ b/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -1,4 +1,4 @@
-From 07cd05c1756cdb18cf5e55d72e4002e271e8af12 Mon Sep 17 00:00:00 2001
+From 5f8189d928309146675a56279458d8bb7534ec0c Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 31 Oct 2021 03:47:05 +0000
 Subject: [PATCH 01/14] mitigate grub's missing characters for borders/arrow
diff --git a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index fd77218a..8a1203d7 100644
--- a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -1,4 +1,4 @@
-From c1617d04ac24544d578643863c545bb885444030 Mon Sep 17 00:00:00 2001
+From fce8730b8c20b7de0394976861b3d2ebcc21f425 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 19 Nov 2022 16:30:24 +0000
 Subject: [PATCH 02/14] say the name libreboot, in the grub menu
diff --git a/config/grub/nvme/patches/0003-Add-CC0-license.patch b/config/grub/nvme/patches/0003-Add-CC0-license.patch
index e4704e6e..5a664f32 100644
--- a/config/grub/nvme/patches/0003-Add-CC0-license.patch
+++ b/config/grub/nvme/patches/0003-Add-CC0-license.patch
@@ -1,4 +1,4 @@
-From 4987b1725277f0e16895b7a67b8b2af9de3183ed Mon Sep 17 00:00:00 2001
+From 088901d1a7577b52d110803d3c6a0e198130e524 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 03/14] Add CC0 license
diff --git a/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch
index ff11241f..9e7b2b99 100644
--- a/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch
+++ b/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch
@@ -1,4 +1,4 @@
-From 6e3672bcba5075908f2a3b2ec235168bf2a4b1ed Mon Sep 17 00:00:00 2001
+From 1a3fdb4075f32eab6ebda0c813720f0336f1bde7 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 04/14] Define GRUB_UINT32_MAX
diff --git a/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch b/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch
index 1bdc0717..df088e63 100644
--- a/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch
+++ b/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch
@@ -1,4 +1,4 @@
-From ec94eb604358bd87236fc3cce9d14770c3595461 Mon Sep 17 00:00:00 2001
+From 490fb23a8bd4d669a3dc48f0581321f08f6f2020 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 05/14] Add Argon2 algorithm
@@ -30,7 +30,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  create mode 100644 grub-core/lib/argon2/ref.c
 
 diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi
-index 3ad8e3efa..d7c6232af 100644
+index f4367f895..9d96cedf9 100644
 --- a/docs/grub-dev.texi
 +++ b/docs/grub-dev.texi
 @@ -503,12 +503,76 @@ GRUB includes some code from other projects, and it is sometimes necessary
diff --git a/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch
index ffacb5fa..ef109bd3 100644
--- a/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch
+++ b/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch
@@ -1,4 +1,4 @@
-From e02e392863dd30f40c538770c31268a8337433c5 Mon Sep 17 00:00:00 2001
+From c8fac788716d0c8723149eee205f1f0bdc92efbe Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 06/14] Error on missing Argon2id parameters
diff --git a/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch
index e34fd631..517752ee 100644
--- a/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch
+++ b/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch
@@ -1,4 +1,4 @@
-From 67a96fa1d99ebf28dbdaefbce57e6f3cba2f6bf3 Mon Sep 17 00:00:00 2001
+From c9046b0a40ddc43d97e93127538bec0fde62d04e Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 07/14] Compile with Argon2id support
diff --git a/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch
index c1726631..1cf06602 100644
--- a/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch
+++ b/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch
@@ -1,4 +1,4 @@
-From de000f70873b61d62b0d561e0af5302e178c4e42 Mon Sep 17 00:00:00 2001
+From bc99124fb0de2e4b0407f5b8591306241ffc7dc1 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
 Subject: [PATCH 08/14] Make grub-install work with Argon2
@@ -9,7 +9,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  1 file changed, 2 insertions(+)
 
 diff --git a/util/grub-install.c b/util/grub-install.c
-index 7dc5657bb..cf7315891 100644
+index 060246589..059036d3c 100644
 --- a/util/grub-install.c
 +++ b/util/grub-install.c
 @@ -448,6 +448,8 @@ probe_mods (grub_disk_t disk)
diff --git a/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
index bc1fa260..9a1d866b 100644
--- a/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
+++ b/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -1,4 +1,4 @@
-From 5b239742565ed20fce545aa32952a37bbb45beb8 Mon Sep 17 00:00:00 2001
+From 47ee3e0a5635e99d04fb1248a4896c24ff5bc746 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 30 Oct 2023 22:19:21 +0000
 Subject: [PATCH 09/14] at_keyboard coreboot: force scancodes2+translate
diff --git a/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
index 62c320ba..d11d424f 100644
--- a/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
+++ b/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
@@ -1,4 +1,4 @@
-From f8c3f597daf62a13f1c1169fddd78c833dd05cf1 Mon Sep 17 00:00:00 2001
+From 1934b92519503bfbb8c2f331afab6a34255250ad Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 31 Oct 2023 10:33:28 +0000
 Subject: [PATCH 10/14] keylayouts: don't print "Unknown key" message
diff --git a/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
index db720a76..3315f731 100644
--- a/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
+++ b/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -1,4 +1,4 @@
-From 27c79cf561fd5eef0c8eb5dda9f536cee3926b57 Mon Sep 17 00:00:00 2001
+From 6f48f88cd472729f0274f36cef87e76a31b6db35 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:14:58 +0000
 Subject: [PATCH 11/14] don't print missing prefix errors on the screen
diff --git a/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch
index 63e4b39c..26e08383 100644
--- a/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch
+++ b/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch
@@ -1,4 +1,4 @@
-From 752ac0c09c7ac3f1ecc5d3d4d8410d424b433da2 Mon Sep 17 00:00:00 2001
+From aab095ed496aec3be4428b48a36a502426e0d275 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:36:22 +0000
 Subject: [PATCH 12/14] don't print error if module not found
diff --git a/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch
index bbc9410e..2519d1cc 100644
--- a/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch
+++ b/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch
@@ -1,4 +1,4 @@
-From ac7a47b0a80a0f398c1250384fd5bc8c228c5d09 Mon Sep 17 00:00:00 2001
+From 703903ca50b9a5705db0cf5dad1ed2561b28d886 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 17:25:20 +0000
 Subject: [PATCH 13/14] don't print empty error messages
diff --git a/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
index 3d7db82c..9f2ee88f 100644
--- a/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
+++ b/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
@@ -1,4 +1,4 @@
-From 421a826c41882baafb2c5710959810657f24a52e Mon Sep 17 00:00:00 2001
+From e2d0d0695ded985463aac53f6fec5ce945bd4893 Mon Sep 17 00:00:00 2001
 From: Mate Kukri <km@mkukri.xyz>
 Date: Mon, 20 May 2024 11:43:35 +0100
 Subject: [PATCH 14/14] Add native NVMe driver based on SeaBIOS
diff --git a/config/grub/nvme/target.cfg b/config/grub/nvme/target.cfg
index 822d27b6..aa86509f 100644
--- a/config/grub/nvme/target.cfg
+++ b/config/grub/nvme/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="nvme"
-rev="4dc6166571645780c459dde2cdc1b001a5ec844c"
+rev="a4da71dafeea519b034beb159dfe80c486c2107c"
diff --git a/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
index d1ddc352..5ce90533 100644
--- a/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
+++ b/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -1,7 +1,7 @@
-From 96e8baf58dcae1dbc016420ea1972d50f09f8f9b Mon Sep 17 00:00:00 2001
+From 836f5ba3fe25ef53b4cfcd8a0a1f7a6fb9bcb21c Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 31 Oct 2021 03:47:05 +0000
-Subject: [PATCH 01/26] mitigate grub's missing characters for borders/arrow
+Subject: [PATCH 01/25] mitigate grub's missing characters for borders/arrow
  characters
 
 This cleans up the display on the main screen in GRUB.
diff --git a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 74970882..14163ab0 100644
--- a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -1,7 +1,7 @@
-From f23a77c22e61e466c081d2b81b968bac4812e6b6 Mon Sep 17 00:00:00 2001
+From cb5fe4b9cae34e6ebb12953f62328c883a89a9f2 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sat, 19 Nov 2022 16:30:24 +0000
-Subject: [PATCH 02/26] say the name libreboot, in the grub menu
+Subject: [PATCH 02/25] say the name libreboot, in the grub menu
 
 ---
  grub-core/normal/main.c | 2 +-
diff --git a/config/grub/xhci/patches/0003-Add-CC0-license.patch b/config/grub/xhci/patches/0003-Add-CC0-license.patch
index 1903a465..19e195fa 100644
--- a/config/grub/xhci/patches/0003-Add-CC0-license.patch
+++ b/config/grub/xhci/patches/0003-Add-CC0-license.patch
@@ -1,7 +1,7 @@
-From 4e2ba04266f006369dc10b981803ba3a237f2ad8 Mon Sep 17 00:00:00 2001
+From ef94d2c0a9dab9cb1a6888b07893fa341c463649 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 03/26] Add CC0 license
+Subject: [PATCH 03/25] Add CC0 license
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
diff --git a/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
index 2adba78b..cc309abd 100644
--- a/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
+++ b/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
@@ -1,7 +1,7 @@
-From c0b5c14042ee44e0e3ed814ebba3190b47514d82 Mon Sep 17 00:00:00 2001
+From aebfb4ee87203cc0dbe53ae1e951061efb73452f Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 04/26] Define GRUB_UINT32_MAX
+Subject: [PATCH 04/25] Define GRUB_UINT32_MAX
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
diff --git a/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch b/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
index 0db13c60..35b96718 100644
--- a/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
+++ b/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
@@ -1,7 +1,7 @@
-From 46aa2f307de53b305045f7706b38a4e0d198875e Mon Sep 17 00:00:00 2001
+From 22a609e508350e2606f90f96d9d0569b2294cfcf Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 05/26] Add Argon2 algorithm
+Subject: [PATCH 05/25] Add Argon2 algorithm
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
@@ -30,7 +30,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  create mode 100644 grub-core/lib/argon2/ref.c
 
 diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi
-index 3ad8e3efa..d7c6232af 100644
+index f4367f895..9d96cedf9 100644
 --- a/docs/grub-dev.texi
 +++ b/docs/grub-dev.texi
 @@ -503,12 +503,76 @@ GRUB includes some code from other projects, and it is sometimes necessary
diff --git a/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
index b9da0bec..5f487314 100644
--- a/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
+++ b/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
@@ -1,7 +1,7 @@
-From c3a68f158725a858206c1fc91407b4993142a4a5 Mon Sep 17 00:00:00 2001
+From 0c0da88e7619e5424ef062ea6867dfe32f032164 Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 06/26] Error on missing Argon2id parameters
+Subject: [PATCH 06/25] Error on missing Argon2id parameters
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
diff --git a/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
index c6369367..a809e2e4 100644
--- a/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
+++ b/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
@@ -1,7 +1,7 @@
-From 13f149fa5fe4e2ae0e95b3055584335beb9bdee8 Mon Sep 17 00:00:00 2001
+From 2a52c5c4f481469667c7c00e43befac28645d57f Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 07/26] Compile with Argon2id support
+Subject: [PATCH 07/25] Compile with Argon2id support
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
diff --git a/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
index b0e36f9e..7948ec91 100644
--- a/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
+++ b/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
@@ -1,7 +1,7 @@
-From 068442a692ab28298eab6bfd89a286c1d2ab91e0 Mon Sep 17 00:00:00 2001
+From 15076c6c38f4b7bc8e684974a908295478fbae9d Mon Sep 17 00:00:00 2001
 From: Ax333l <main@axelen.xyz>
 Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 08/26] Make grub-install work with Argon2
+Subject: [PATCH 08/25] Make grub-install work with Argon2
 
 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
  1 file changed, 2 insertions(+)
 
 diff --git a/util/grub-install.c b/util/grub-install.c
-index 7dc5657bb..cf7315891 100644
+index 060246589..059036d3c 100644
 --- a/util/grub-install.c
 +++ b/util/grub-install.c
 @@ -448,6 +448,8 @@ probe_mods (grub_disk_t disk)
diff --git a/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
index 9d7a9387..c18061ba 100644
--- a/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
+++ b/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -1,7 +1,7 @@
-From 063d8d5fe39d2addca7806ca0a7c6f0544affa8f Mon Sep 17 00:00:00 2001
+From 696f0d54d306472ad00b46e5a702080ae16d0101 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 30 Oct 2023 22:19:21 +0000
-Subject: [PATCH 09/26] at_keyboard coreboot: force scancodes2+translate
+Subject: [PATCH 09/25] at_keyboard coreboot: force scancodes2+translate
 
 Scan code set 2 with translation should be assumed in
 every case, as the default starting position.
diff --git a/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
index b116ea52..80f04547 100644
--- a/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
+++ b/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
@@ -1,7 +1,7 @@
-From cb7d93059959eb921328bd285f18e363f0f44aec Mon Sep 17 00:00:00 2001
+From 907e8f373bac0c618c491a3a5cb4137d4446de05 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Tue, 31 Oct 2023 10:33:28 +0000
-Subject: [PATCH 10/26] keylayouts: don't print "Unknown key" message
+Subject: [PATCH 10/25] keylayouts: don't print "Unknown key" message
 
 on keyboards with stuck keys, this results in GRUB just
 spewing it repeatedly, preventing use of GRUB.
diff --git a/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
index 655e0005..a89f9e29 100644
--- a/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
+++ b/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -1,7 +1,7 @@
-From 2ca7390361d1ff8ea18399b41e38436c8d506d60 Mon Sep 17 00:00:00 2001
+From b5693f53db4d337b4345192da08130b0f2f9bd08 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:14:58 +0000
-Subject: [PATCH 11/26] don't print missing prefix errors on the screen
+Subject: [PATCH 11/25] don't print missing prefix errors on the screen
 
 we do actually set the prefix. this patch modifies
 grub to still set grub_errno and return accordingly,
diff --git a/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
index 589dd4d7..913e148c 100644
--- a/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
+++ b/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
@@ -1,7 +1,7 @@
-From 51b439fc0aea4ef2c52c80fa765d9bda992a8ac2 Mon Sep 17 00:00:00 2001
+From 55c2e4b1d413fa03d9597007b16d136b3a6fa713 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 16:36:22 +0000
-Subject: [PATCH 12/26] don't print error if module not found
+Subject: [PATCH 12/25] don't print error if module not found
 
 still set grub_errno accordingly, and otherwise
 behave the same. in libreboot, we remove a lot of
diff --git a/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
index 7cd354e3..381bca8b 100644
--- a/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
+++ b/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
@@ -1,7 +1,7 @@
-From 88c2d1618283c7f1c3b4adbce532789b0ca2447d Mon Sep 17 00:00:00 2001
+From 93210cf7c046c0c9c8c77ffde4397a25d391c64d Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 17:25:20 +0000
-Subject: [PATCH 13/26] don't print empty error messages
+Subject: [PATCH 13/25] don't print empty error messages
 
 this is part two of the quest to kill the prefix
 error message. after i disabled prefix-related
diff --git a/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch b/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
index a35a16e9..a2df041f 100644
--- a/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
+++ b/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
@@ -1,7 +1,7 @@
-From 2472f3c2e465863c51a3cacf96ab910c015cfa8e Mon Sep 17 00:00:00 2001
+From a216d09bffcb2f2bff96445cca412c9328b4a6bf Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:00:27 +0100
-Subject: [PATCH 14/26] grub-core/bus/usb: Parse SuperSpeed companion
+Subject: [PATCH 14/25] grub-core/bus/usb: Parse SuperSpeed companion
  descriptors
 
 Parse the SS_ENDPOINT_COMPANION descriptor, which is only present on USB 3.0
diff --git a/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch b/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
index 84b81df7..1e45acc8 100644
--- a/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
+++ b/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
@@ -1,7 +1,7 @@
-From 681a247209c83451cdebf6fc02cee6737a1921b6 Mon Sep 17 00:00:00 2001
+From cb56fbac65869f04fcf9b0b4b360f4ccc6deabed Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Mon, 7 Dec 2020 08:41:22 +0100
-Subject: [PATCH 15/26] usb: Add enum for xHCI
+Subject: [PATCH 15/25] usb: Add enum for xHCI
 
 Will be used in future patches.
 
diff --git a/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch b/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
index 611db609..537ed958 100644
--- a/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
+++ b/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
@@ -1,7 +1,7 @@
-From 8af01b2548f61a9197b9f931831ca397a7e7c9b3 Mon Sep 17 00:00:00 2001
+From 3c735bf84a74e5a5612ca9b59868e050da8a46fe Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Mon, 7 Dec 2020 08:41:23 +0100
-Subject: [PATCH 16/26] usbtrans: Set default maximum packet size
+Subject: [PATCH 16/25] usbtrans: Set default maximum packet size
 
 Set the maximum packet size to 512 for SuperSpeed devices.
 
diff --git a/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch b/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
index 05540fa6..d61f2a8a 100644
--- a/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
+++ b/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
@@ -1,7 +1,7 @@
-From 7a977001a1574c884c4f711686c2de01386b9230 Mon Sep 17 00:00:00 2001
+From c01366a852d40e060fc060dda6cf2891c9c50bd0 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Sun, 15 Nov 2020 19:51:42 +0100
-Subject: [PATCH 17/26] grub-core/bus/usb: Add function pointer for
+Subject: [PATCH 17/25] grub-core/bus/usb: Add function pointer for
  attach/detach events
 
 The xHCI code needs to be called for attaching or detaching a device.
diff --git a/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch b/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
index a3eaba15..75314780 100644
--- a/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
+++ b/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
@@ -1,7 +1,7 @@
-From e8a237ffb5bd3ba5258ce5c173b31424f3a39392 Mon Sep 17 00:00:00 2001
+From 1ec77a83178e5c1c005b6b27139287f1463f1b49 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Mon, 7 Dec 2020 08:41:25 +0100
-Subject: [PATCH 18/26] grub-core/bus/usb/usbhub: Add new private fields for
+Subject: [PATCH 18/25] grub-core/bus/usb/usbhub: Add new private fields for
  xHCI controller
 
 Store the root port number, the route, consisting out of the port ID
diff --git a/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch b/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
index e6c0d474..043320b9 100644
--- a/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
+++ b/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
@@ -1,7 +1,7 @@
-From badcc0d5ff1d4b194c93a530344788c4231d8789 Mon Sep 17 00:00:00 2001
+From 03998bc9b74366ecf64d5f76fe4b398ec7fc5d31 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Mon, 7 Dec 2020 08:41:26 +0100
-Subject: [PATCH 19/26] grub-core/bus/usb: Add xhci support
+Subject: [PATCH 19/25] grub-core/bus/usb: Add xhci support
 
 Add support for xHCI USB controllers.
 The code is based on seabios implementation, but has been heavily
diff --git a/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch b/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
index 01d7d008..6c5c1731 100644
--- a/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
+++ b/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
@@ -1,7 +1,7 @@
-From e4416b166e501777e53de387ac4329150483a160 Mon Sep 17 00:00:00 2001
+From 7571efed2cdd949a203401630a19f42c74095797 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Mon, 7 Dec 2020 08:41:27 +0100
-Subject: [PATCH 20/26] grub-core/bus/usb/usbhub: Add xHCI non root hub support
+Subject: [PATCH 20/25] grub-core/bus/usb/usbhub: Add xHCI non root hub support
 
 Tested on Intel PCH C246, the USB3 hub can be configured by grub.
 
diff --git a/config/grub/xhci/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch b/config/grub/xhci/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch
index d0874f85..587782c2 100644
--- a/config/grub/xhci/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch
+++ b/config/grub/xhci/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch
@@ -1,7 +1,7 @@
-From 8e6d5b598b3e21c905023b438110d71f487a2289 Mon Sep 17 00:00:00 2001
+From 0c58853bd1e4ca63cdeb5b5ef949d78cbd9028d0 Mon Sep 17 00:00:00 2001
 From: Sven Anderson <sven@anderson.de>
 Date: Sat, 28 May 2022 21:39:23 +0200
-Subject: [PATCH 21/26] xHCI: also accept SBRN 0x31 and 0x32
+Subject: [PATCH 21/25] xHCI: also accept SBRN 0x31 and 0x32
 
 Signed-off-by: Sven Anderson <sven@anderson.de>
 ---
diff --git a/config/grub/xhci/patches/0022-xhci-fix-port-indexing.patch b/config/grub/xhci/patches/0022-xhci-fix-port-indexing.patch
index 7e0bcb74..64872650 100644
--- a/config/grub/xhci/patches/0022-xhci-fix-port-indexing.patch
+++ b/config/grub/xhci/patches/0022-xhci-fix-port-indexing.patch
@@ -1,7 +1,7 @@
-From 32c6d97e2a80c2e74dd9daf74281a89d1a05faaa Mon Sep 17 00:00:00 2001
+From 0da64bd7a144361198ee3dbcd4921fbbdf5c08fa Mon Sep 17 00:00:00 2001
 From: Sven Anderson <sven@anderson.de>
 Date: Mon, 13 Jan 2025 19:51:41 +0100
-Subject: [PATCH 22/26] xhci: fix port indexing
+Subject: [PATCH 22/25] xhci: fix port indexing
 
 ---
  grub-core/bus/usb/xhci.c | 10 +++++-----
diff --git a/config/grub/xhci/patches/0024-xhci-configure-TT-for-non-root-hubs.patch b/config/grub/xhci/patches/0023-xhci-configure-TT-for-non-root-hubs.patch
similarity index 95%
rename from config/grub/xhci/patches/0024-xhci-configure-TT-for-non-root-hubs.patch
rename to config/grub/xhci/patches/0023-xhci-configure-TT-for-non-root-hubs.patch
index a605e210..c63850d6 100644
--- a/config/grub/xhci/patches/0024-xhci-configure-TT-for-non-root-hubs.patch
+++ b/config/grub/xhci/patches/0023-xhci-configure-TT-for-non-root-hubs.patch
@@ -1,7 +1,7 @@
-From 233f7dd274ef2ccac7b1fc0f5cfdeb7c01aef58b Mon Sep 17 00:00:00 2001
+From fa9c2124b1ca476f8b2ce168d56527100757ef90 Mon Sep 17 00:00:00 2001
 From: Sven Anderson <sven@anderson.de>
 Date: Mon, 13 Jan 2025 20:26:32 +0100
-Subject: [PATCH 24/26] xhci: configure TT for non-root-hubs
+Subject: [PATCH 23/25] xhci: configure TT for non-root-hubs
 
 ---
  grub-core/bus/usb/usbhub.c |  6 +++++
@@ -24,7 +24,7 @@ index e96505aa9..629b3ed53 100644
 +  return grub_usb_devs[addr];
 +}
 diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c
-index d13a7c39d..8ad2a10f9 100644
+index dc89b9619..88c9ac57f 100644
 --- a/grub-core/bus/usb/xhci.c
 +++ b/grub-core/bus/usb/xhci.c
 @@ -623,13 +623,46 @@ grub_xhci_alloc_inctx(struct grub_xhci *x, int maxepid,
diff --git a/config/grub/xhci/patches/0025-Fix-compilation-on-x86_64.patch b/config/grub/xhci/patches/0024-Fix-compilation-on-x86_64.patch
similarity index 95%
rename from config/grub/xhci/patches/0025-Fix-compilation-on-x86_64.patch
rename to config/grub/xhci/patches/0024-Fix-compilation-on-x86_64.patch
index e75cc5e9..d03db740 100644
--- a/config/grub/xhci/patches/0025-Fix-compilation-on-x86_64.patch
+++ b/config/grub/xhci/patches/0024-Fix-compilation-on-x86_64.patch
@@ -1,7 +1,7 @@
-From 0441e7eff7950bfd47fc2f5533ce2c64b785dc1d Mon Sep 17 00:00:00 2001
+From b049a11e2cf54e51b3a9fd4d3435089999e61702 Mon Sep 17 00:00:00 2001
 From: Patrick Rudolph <patrick.rudolph@9elements.com>
 Date: Wed, 24 Feb 2021 08:25:41 +0100
-Subject: [PATCH 25/26] Fix compilation on x86_64
+Subject: [PATCH 24/25] Fix compilation on x86_64
 
 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
  1 file changed, 16 insertions(+), 8 deletions(-)
 
 diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c
-index 8ad2a10f9..ceb57c9b3 100644
+index 88c9ac57f..9b9bae6e5 100644
 --- a/grub-core/bus/usb/xhci.c
 +++ b/grub-core/bus/usb/xhci.c
 @@ -184,7 +184,7 @@ enum
diff --git a/config/grub/xhci/patches/0026-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/xhci/patches/0025-Add-native-NVMe-driver-based-on-SeaBIOS.patch
similarity index 99%
rename from config/grub/xhci/patches/0026-Add-native-NVMe-driver-based-on-SeaBIOS.patch
rename to config/grub/xhci/patches/0025-Add-native-NVMe-driver-based-on-SeaBIOS.patch
index 36bbecd9..96ecbaaf 100644
--- a/config/grub/xhci/patches/0026-Add-native-NVMe-driver-based-on-SeaBIOS.patch
+++ b/config/grub/xhci/patches/0025-Add-native-NVMe-driver-based-on-SeaBIOS.patch
@@ -1,7 +1,7 @@
-From 4440b01a702368c81520f630aa16852de55bb808 Mon Sep 17 00:00:00 2001
+From 7bb8bb98b86fc97e1ce04e6169d517acbd476e1e Mon Sep 17 00:00:00 2001
 From: Mate Kukri <km@mkukri.xyz>
 Date: Mon, 20 May 2024 11:43:35 +0100
-Subject: [PATCH 26/26] Add native NVMe driver based on SeaBIOS
+Subject: [PATCH 25/25] Add native NVMe driver based on SeaBIOS
 
 Tested to successfully boot Debian on QEMU and OptiPlex 3050.
 
diff --git a/config/grub/xhci/target.cfg b/config/grub/xhci/target.cfg
index aca71fca..5727e70b 100644
--- a/config/grub/xhci/target.cfg
+++ b/config/grub/xhci/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="xhci"
-rev="4dc6166571645780c459dde2cdc1b001a5ec844c"
+rev="a4da71dafeea519b034beb159dfe80c486c2107c"

From 762c7ff43ebd065de62f26fbe5729d221110c5a0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 21 Apr 2025 02:22:40 +0100
Subject: [PATCH 1201/1549] coreboot/default: Update, c247f62749b (8 Feb 2025)

This is currently the latest revision of coreboot.

Other coreboot trees to follow. The "next" tree will
also be merged with coreboot/default, in a follow-up
commit.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../coreboot/d510mo/config/libgfxinit_txtmode |   51 +-
 .../d510mo_16mb/config/libgfxinit_txtmode     |   51 +-
 .../d945gclf_512kb/config/libgfxinit_txtmode  |   51 +-
 .../d945gclf_8mb/config/libgfxinit_txtmode    |   51 +-
 ...d-c3-and-clockgen-to-apple-macbook21.patch |    4 +-
 ...02-lenovo-t400-Enable-all-SATA-ports.patch |    4 +-
 ...et-me_state-Disabled-in-cmos.default.patch |    4 +-
 ...e-Disabled-on-all-cmos.default-files.patch |    4 +-
 ...ool-add-nuke-flag-all-0xFF-on-region.patch |   28 +-
 ...able-01.0-device-in-devicetree-for-d.patch |    4 +-
 ...or-coreboot-images-built-without-a-p.patch |    4 +-
 ...able-coreboot-related-BL31-features.patch} |    8 +-
 ...b-dell-Add-Latitude-E6530-Ivy-Bridge.patch |  430 -----
 ...e6430-use-ME-Soft-Temporary-Disable.patch} |    4 +-
 ...b-dell-Add-Latitude-E5530-Ivy-Bridge.patch |  430 -----
 ...dell-Add-Latitude-E6420-Sandy-Bridge.patch |  435 -----
 ...b-hp-Add-Compaq-Elite-8300-CMT-port.patch} |    4 +-
 ...dell-Add-Latitude-E6520-Sandy-Bridge.patch |  449 -----
 ...haswell-make-IOMMU-a-runtime-option.patch} |    4 +-
 ...iplex_9020-Disable-IOMMU-by-default.patch} |    4 +-
 ...dell-Add-Latitude-E5520-Sandy-Bridge.patch |  442 -----
 ...dell-Add-Latitude-E5420-Sandy-Bridge.patch |  442 -----
 ...ully-disable-iGPU-when-dGPU-is-used.patch} |    4 +-
 ...-mec5035-Add-S3-suspend-SMI-handler.patch} |    4 +-
 ...dell-Add-Latitude-E6320-Sandy-Bridge.patch |  435 -----
 ...dell-Add-Latitude-E6220-Sandy-Bridge.patch |  438 -----
 ...ck-policy-regs-when-disabling-IOMMU.patch} |    4 +-
 ...b-dell-Add-Latitude-E6330-Ivy-Bridge.patch |  436 -----
 ...b-intel-gm45-Make-DDR2-raminit-work.patch} |    4 +-
 ...b-dell-Add-Latitude-E6230-Ivy-Bridge.patch |  440 -----
 ...gel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch} |    4 +-
 ...-100-MHz-reference-clock-for-displa.patch} |    6 +-
 ...-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch} |    6 +-
 ...b-dell-Convert-E6400-into-a-variant.patch} |    4 +-
 ...ll-gm45_latitudes-Add-E4300-variant.patch} |    4 +-
 ...d-S3-SMI-handler-for-Dell-Latitudes.patch} |    4 +-
 ...35-Route-power-button-event-to-host.patch} |    4 +-
 ...le-compression-on-refcode-insertion.patch} |    8 +-
 ...l-mec5035-Replace-defines-with-enums.patch |   91 -
 ...Disable-stack-overflow-debug-options.patch |  187 ++
 .../0030-haswell-NRI-Initialise-MPLL.patch    |  348 ----
 ...ll-NRI-Post-process-selected-timings.patch |  249 ---
 ...ll-NRI-Configure-initial-MC-settings.patch | 1594 -----------------
 ...-NRI-Add-timings-refresh-programming.patch |  541 ------
 .../0034-haswell-NRI-Program-memory-map.patch |  263 ---
 ...ll-NRI-Add-DDR3-JEDEC-reset-and-init.patch | 1036 -----------
 ...6-haswell-NRI-Add-pre-training-steps.patch |  392 ----
 ...aswell-NRI-Add-REUT-I-O-test-library.patch | 1130 ------------
 ...swell-NRI-Add-range-tracking-library.patch |  222 ---
 ...ll-NRI-Add-library-to-change-margins.patch |  294 ---
 .../0040-haswell-NRI-Add-RcvEn-training.patch |  708 --------
 ...l-NRI-Add-function-to-change-margins.patch |  272 ---
 ...42-haswell-NRI-Add-read-MPR-training.patch |  332 ----
 .../0043-haswell-NRI-Add-write-leveling.patch |  689 -------
 ...-haswell-NRI-Add-final-raminit-steps.patch |  570 ------
 ...Haswell-NRI-Implement-fast-boot-path.patch |  722 --------
 ...I-Do-sense-amplifier-offset-training.patch |  476 -----
 config/coreboot/default/target.cfg            |    2 +-
 .../config/libgfxinit_txtmode                 |   54 +-
 .../config/libgfxinit_corebootfb              |   47 +-
 .../config/libgfxinit_txtmode                 |   47 +-
 .../config/libgfxinit_corebootfb              |   47 +-
 .../config/libgfxinit_txtmode                 |   47 +-
 .../e4300_4mb/config/libgfxinit_corebootfb    |   48 +-
 .../e4300_4mb/config/libgfxinit_txtmode       |   48 +-
 .../e5420_6mb/config/libgfxinit_corebootfb    |   53 +-
 .../e5420_6mb/config/libgfxinit_txtmode       |   53 +-
 .../e5520_6mb/config/libgfxinit_corebootfb    |   53 +-
 .../e5520_6mb/config/libgfxinit_txtmode       |   53 +-
 .../e5530_12mb/config/libgfxinit_corebootfb   |   53 +-
 .../e5530_12mb/config/libgfxinit_txtmode      |   53 +-
 .../e6220_10mb/config/libgfxinit_corebootfb   |   53 +-
 .../e6220_10mb/config/libgfxinit_txtmode      |   53 +-
 .../e6230_12mb/config/libgfxinit_corebootfb   |   53 +-
 .../e6230_12mb/config/libgfxinit_txtmode      |   53 +-
 .../e6320_10mb/config/libgfxinit_corebootfb   |   53 +-
 .../e6320_10mb/config/libgfxinit_txtmode      |   53 +-
 .../e6330_12mb/config/libgfxinit_corebootfb   |   53 +-
 .../e6330_12mb/config/libgfxinit_txtmode      |   53 +-
 .../e6400_4mb/config/libgfxinit_corebootfb    |   48 +-
 .../e6400_4mb/config/libgfxinit_txtmode       |   48 +-
 config/coreboot/e6400nvidia_4mb/config/normal |   47 +-
 .../e6420_10mb/config/libgfxinit_corebootfb   |   53 +-
 .../e6420_10mb/config/libgfxinit_txtmode      |   53 +-
 .../e6430_12mb/config/libgfxinit_corebootfb   |   53 +-
 .../e6430_12mb/config/libgfxinit_txtmode      |   53 +-
 .../e6520_10mb/config/libgfxinit_corebootfb   |   53 +-
 .../e6520_10mb/config/libgfxinit_txtmode      |   53 +-
 .../e6530_12mb/config/libgfxinit_corebootfb   |   53 +-
 .../e6530_12mb/config/libgfxinit_txtmode      |   53 +-
 .../g43t_am3/config/libgfxinit_txtmode        |   47 +-
 .../g43t_am3_16mb/config/libgfxinit_txtmode   |   47 +-
 .../ga_g41m_es2l/config/libgfxinit_txtmode    |   46 +-
 .../gru_bob/config/libgfxinit_corebootfb      |   73 +-
 .../gru_kevin/config/libgfxinit_corebootfb    |   72 +-
 .../hp2170p_16mb/config/libgfxinit_corebootfb |   60 +-
 .../hp2170p_16mb/config/libgfxinit_txtmode    |   60 +-
 .../hp2560p_8mb/config/libgfxinit_corebootfb  |   60 +-
 .../hp2560p_8mb/config/libgfxinit_txtmode     |   60 +-
 .../hp2570p_16mb/config/libgfxinit_corebootfb |   60 +-
 .../hp2570p_16mb/config/libgfxinit_txtmode    |   60 +-
 .../config/libgfxinit_corebootfb              |   63 +-
 .../hp8200sff_4mb/config/libgfxinit_txtmode   |   63 +-
 .../config/libgfxinit_corebootfb              |   63 +-
 .../hp8200sff_8mb/config/libgfxinit_txtmode   |   63 +-
 .../hp820g2_12mb/config/libgfxinit_corebootfb |   55 +-
 .../hp820g2_12mb/config/libgfxinit_txtmode    |   55 +-
 .../config/libgfxinit_corebootfb              |   58 +-
 .../hp8300cmt_16mb/config/libgfxinit_txtmode  |   58 +-
 .../config/libgfxinit_corebootfb              |   66 +-
 .../hp8300usdt_16mb/config/libgfxinit_txtmode |   66 +-
 .../config/libgfxinit_corebootfb              |   60 +-
 .../config/libgfxinit_txtmode                 |   60 +-
 .../config/libgfxinit_corebootfb              |   60 +-
 .../config/libgfxinit_txtmode                 |   60 +-
 config/coreboot/hp8560w_8mb/config/normal     |   59 +-
 .../hp9470m_16mb/config/libgfxinit_corebootfb |   60 +-
 .../hp9470m_16mb/config/libgfxinit_txtmode    |   60 +-
 .../macbook11/config/libgfxinit_corebootfb    |   45 +-
 .../macbook11/config/libgfxinit_txtmode       |   45 +-
 .../config/libgfxinit_corebootfb              |   45 +-
 .../macbook11_16mb/config/libgfxinit_txtmode  |   45 +-
 .../macbook21/config/libgfxinit_corebootfb    |   45 +-
 .../macbook21/config/libgfxinit_txtmode       |   45 +-
 .../config/libgfxinit_corebootfb              |   45 +-
 .../macbook21_16mb/config/libgfxinit_txtmode  |   45 +-
 .../config/libgfxinit_corebootfb              |   42 +-
 .../config/libgfxinit_corebootfb              |   44 +-
 .../qemu_x86_12mb/config/libgfxinit_txtmode   |   44 +-
 .../config/libgfxinit_corebootfb              |   44 +-
 .../config/libgfxinit_txtmode                 |   44 +-
 .../r400_16mb/config/libgfxinit_corebootfb    |   51 +-
 .../r400_16mb/config/libgfxinit_txtmode       |   51 +-
 .../r400_4mb/config/libgfxinit_corebootfb     |   51 +-
 .../r400_4mb/config/libgfxinit_txtmode        |   51 +-
 .../r400_8mb/config/libgfxinit_corebootfb     |   51 +-
 .../r400_8mb/config/libgfxinit_txtmode        |   51 +-
 .../r500_4mb/config/libgfxinit_corebootfb     |   51 +-
 .../r500_4mb/config/libgfxinit_txtmode        |   51 +-
 .../t1650_12mb/config/libgfxinit_txtmode      |   54 +-
 .../t400_16mb/config/libgfxinit_corebootfb    |   51 +-
 .../t400_16mb/config/libgfxinit_txtmode       |   51 +-
 .../t400_4mb/config/libgfxinit_corebootfb     |   51 +-
 .../t400_4mb/config/libgfxinit_txtmode        |   51 +-
 .../t400_8mb/config/libgfxinit_corebootfb     |   51 +-
 .../t400_8mb/config/libgfxinit_txtmode        |   51 +-
 .../t420_8mb/config/libgfxinit_corebootfb     |   55 +-
 .../t420s_8mb/config/libgfxinit_corebootfb    |   55 +-
 .../t420s_8mb/config/libgfxinit_txtmode       |   55 +-
 .../t430_12mb/config/libgfxinit_corebootfb    |   55 +-
 .../t430_12mb/config/libgfxinit_txtmode       |   55 +-
 .../config/libgfxinit_corebootfb              |   50 +-
 .../config/libgfxinit_txtmode                 |   50 +-
 .../t500_16mb/config/libgfxinit_corebootfb    |   51 +-
 .../t500_16mb/config/libgfxinit_txtmode       |   51 +-
 .../t500_4mb/config/libgfxinit_corebootfb     |   51 +-
 .../t500_4mb/config/libgfxinit_txtmode        |   51 +-
 .../t500_8mb/config/libgfxinit_corebootfb     |   51 +-
 .../t500_8mb/config/libgfxinit_txtmode        |   51 +-
 .../t520_8mb/config/libgfxinit_corebootfb     |   57 +-
 .../t520_8mb/config/libgfxinit_txtmode        |   57 +-
 .../t530_12mb/config/libgfxinit_corebootfb    |   57 +-
 .../t530_12mb/config/libgfxinit_txtmode       |   57 +-
 .../config/libgfxinit_corebootfb              |   51 +-
 .../config/libgfxinit_txtmode                 |   51 +-
 .../t60_intelgpu/config/libgfxinit_corebootfb |   51 +-
 .../t60_intelgpu/config/libgfxinit_txtmode    |   51 +-
 .../w500_16mb/config/libgfxinit_corebootfb    |   51 +-
 .../w500_16mb/config/libgfxinit_txtmode       |   51 +-
 .../w500_4mb/config/libgfxinit_corebootfb     |   51 +-
 .../w500_4mb/config/libgfxinit_txtmode        |   51 +-
 .../w500_8mb/config/libgfxinit_corebootfb     |   51 +-
 .../w500_8mb/config/libgfxinit_txtmode        |   51 +-
 .../w530_12mb/config/libgfxinit_corebootfb    |   57 +-
 .../w530_12mb/config/libgfxinit_txtmode       |   57 +-
 .../w541_12mb/config/libgfxinit_corebootfb    |   50 +-
 .../w541_12mb/config/libgfxinit_txtmode       |   50 +-
 .../x200_16mb/config/libgfxinit_corebootfb    |   51 +-
 .../x200_16mb/config/libgfxinit_txtmode       |   51 +-
 .../x200_4mb/config/libgfxinit_corebootfb     |   51 +-
 .../x200_4mb/config/libgfxinit_txtmode        |   51 +-
 .../x200_8mb/config/libgfxinit_corebootfb     |   51 +-
 .../x200_8mb/config/libgfxinit_txtmode        |   51 +-
 .../x220_8mb/config/libgfxinit_corebootfb     |   57 +-
 .../x220_8mb/config/libgfxinit_txtmode        |   57 +-
 .../x230_12mb/config/libgfxinit_corebootfb    |   57 +-
 .../x230_12mb/config/libgfxinit_txtmode       |   57 +-
 .../x230_16mb/config/libgfxinit_corebootfb    |   57 +-
 .../x230_16mb/config/libgfxinit_txtmode       |   57 +-
 .../x230t_12mb/config/libgfxinit_corebootfb   |   57 +-
 .../x230t_12mb/config/libgfxinit_txtmode      |   57 +-
 .../x230t_16mb/config/libgfxinit_corebootfb   |   57 +-
 .../x230t_16mb/config/libgfxinit_txtmode      |   57 +-
 .../x301_16mb/config/libgfxinit_corebootfb    |   51 +-
 .../x301_16mb/config/libgfxinit_txtmode       |   51 +-
 .../x301_4mb/config/libgfxinit_corebootfb     |   51 +-
 .../x301_4mb/config/libgfxinit_txtmode        |   51 +-
 .../x301_8mb/config/libgfxinit_corebootfb     |   51 +-
 .../x301_8mb/config/libgfxinit_txtmode        |   51 +-
 .../coreboot/x60/config/libgfxinit_corebootfb |   49 +-
 config/coreboot/x60/config/libgfxinit_txtmode |   49 +-
 .../x60_16mb/config/libgfxinit_corebootfb     |   49 +-
 .../x60_16mb/config/libgfxinit_txtmode        |   49 +-
 config/data/coreboot/0                        |  Bin 1 -> 0 bytes
 .../acpica-unix-20230628.tar.gz/module.cfg    |    5 -
 .../default/arm-trusted-firmware/module.cfg   |    2 +-
 .../default/binutils-2.42.tar.xz/module.cfg   |    5 -
 .../default/gcc-14.1.0.tar.xz/module.cfg      |    5 -
 .../default/intel-microcode/module.cfg        |    2 +-
 config/submodule/coreboot/default/module.list |    6 +-
 .../coreboot/default/vboot/module.cfg         |    2 +-
 211 files changed, 6381 insertions(+), 16155 deletions(-)
 rename config/coreboot/default/patches/{0018-HACK-Disable-coreboot-related-BL31-features.patch => 0008-HACK-Disable-coreboot-related-BL31-features.patch} (78%)
 delete mode 100644 config/coreboot/default/patches/0008-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
 rename config/coreboot/default/patches/{0019-dell-e6430-use-ME-Soft-Temporary-Disable.patch => 0009-dell-e6430-use-ME-Soft-Temporary-Disable.patch} (87%)
 delete mode 100644 config/coreboot/default/patches/0009-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
 delete mode 100644 config/coreboot/default/patches/0010-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
 rename config/coreboot/default/patches/{0020-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch => 0010-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch} (99%)
 delete mode 100644 config/coreboot/default/patches/0011-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
 rename config/coreboot/default/patches/{0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch => 0011-nb-intel-haswell-make-IOMMU-a-runtime-option.patch} (98%)
 rename config/coreboot/default/patches/{0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch => 0012-dell-optiplex_9020-Disable-IOMMU-by-default.patch} (87%)
 delete mode 100644 config/coreboot/default/patches/0012-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch
 delete mode 100644 config/coreboot/default/patches/0013-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
 rename config/coreboot/default/patches/{0023-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch => 0013-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch} (92%)
 rename config/coreboot/default/patches/{0025-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch => 0014-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch} (97%)
 delete mode 100644 config/coreboot/default/patches/0014-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch
 delete mode 100644 config/coreboot/default/patches/0015-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch
 rename config/coreboot/default/patches/{0026-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch => 0015-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch} (93%)
 delete mode 100644 config/coreboot/default/patches/0016-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch
 rename config/coreboot/default/patches/{0027-nb-intel-gm45-Make-DDR2-raminit-work.patch => 0016-nb-intel-gm45-Make-DDR2-raminit-work.patch} (98%)
 delete mode 100644 config/coreboot/default/patches/0017-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch
 rename config/coreboot/default/patches/{0028-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch => 0017-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch} (98%)
 rename config/coreboot/default/patches/{0029-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch => 0018-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch} (90%)
 rename config/coreboot/default/patches/{0047-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch => 0019-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch} (89%)
 rename config/coreboot/default/patches/{0048-mb-dell-Convert-E6400-into-a-variant.patch => 0020-mb-dell-Convert-E6400-into-a-variant.patch} (98%)
 rename config/coreboot/default/patches/{0049-mb-dell-gm45_latitudes-Add-E4300-variant.patch => 0021-mb-dell-gm45_latitudes-Add-E4300-variant.patch} (98%)
 rename config/coreboot/default/patches/{0050-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch => 0022-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch} (94%)
 rename config/coreboot/default/patches/{0051-ec-dell-mec5035-Route-power-button-event-to-host.patch => 0023-ec-dell-mec5035-Route-power-button-event-to-host.patch} (96%)
 rename config/coreboot/default/patches/{0052-Disable-compression-on-refcode-insertion.patch => 0024-Disable-compression-on-refcode-insertion.patch} (81%)
 delete mode 100644 config/coreboot/default/patches/0024-ec-dell-mec5035-Replace-defines-with-enums.patch
 create mode 100644 config/coreboot/default/patches/0025-nb-intel-Disable-stack-overflow-debug-options.patch
 delete mode 100644 config/coreboot/default/patches/0030-haswell-NRI-Initialise-MPLL.patch
 delete mode 100644 config/coreboot/default/patches/0031-haswell-NRI-Post-process-selected-timings.patch
 delete mode 100644 config/coreboot/default/patches/0032-haswell-NRI-Configure-initial-MC-settings.patch
 delete mode 100644 config/coreboot/default/patches/0033-haswell-NRI-Add-timings-refresh-programming.patch
 delete mode 100644 config/coreboot/default/patches/0034-haswell-NRI-Program-memory-map.patch
 delete mode 100644 config/coreboot/default/patches/0035-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
 delete mode 100644 config/coreboot/default/patches/0036-haswell-NRI-Add-pre-training-steps.patch
 delete mode 100644 config/coreboot/default/patches/0037-haswell-NRI-Add-REUT-I-O-test-library.patch
 delete mode 100644 config/coreboot/default/patches/0038-haswell-NRI-Add-range-tracking-library.patch
 delete mode 100644 config/coreboot/default/patches/0039-haswell-NRI-Add-library-to-change-margins.patch
 delete mode 100644 config/coreboot/default/patches/0040-haswell-NRI-Add-RcvEn-training.patch
 delete mode 100644 config/coreboot/default/patches/0041-haswell-NRI-Add-function-to-change-margins.patch
 delete mode 100644 config/coreboot/default/patches/0042-haswell-NRI-Add-read-MPR-training.patch
 delete mode 100644 config/coreboot/default/patches/0043-haswell-NRI-Add-write-leveling.patch
 delete mode 100644 config/coreboot/default/patches/0044-haswell-NRI-Add-final-raminit-steps.patch
 delete mode 100644 config/coreboot/default/patches/0045-Haswell-NRI-Implement-fast-boot-path.patch
 delete mode 100644 config/coreboot/default/patches/0046-haswell-NRI-Do-sense-amplifier-offset-training.patch
 delete mode 100644 config/data/coreboot/0
 delete mode 100644 config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg
 delete mode 100644 config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg

diff --git a/config/coreboot/d510mo/config/libgfxinit_txtmode b/config/coreboot/d510mo/config/libgfxinit_txtmode
index 34c747c2..f3c3f17f 100644
--- a/config/coreboot/d510mo/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="D510MO"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -120,24 +129,26 @@ CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=256
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -147,7 +158,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -182,6 +192,7 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_DQ67SW is not set
 # CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set
 # CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set
+# CONFIG_BOARD_INTEL_FROST_CREEK is not set
 # CONFIG_BOARD_INTEL_GLKRVP is not set
 # CONFIG_BOARD_INTEL_HARCUVAR is not set
 # CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
@@ -197,6 +208,11 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_MTLRVP4ES_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set
+
+#
+# Ptlrvp
+#
+# CONFIG_BOARD_INTEL_PTLRVP is not set
 # CONFIG_BOARD_INTEL_SKLSDLBRK is not set
 # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
 # CONFIG_BOARD_INTEL_STRAGO is not set
@@ -204,7 +220,6 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
 # CONFIG_BOARD_INTEL_WTM2 is not set
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -257,7 +272,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x80000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -272,6 +287,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -301,6 +317,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -355,6 +372,8 @@ CONFIG_SUPERIO_WINBOND_W83627THG=y
 #
 # Embedded Controllers
 #
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -379,6 +398,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -395,6 +417,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 # Display
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -428,6 +451,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -445,6 +469,7 @@ CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -594,7 +619,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -608,6 +632,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
index 85f39cd7..ab549bef 100644
--- a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="D510MO"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -120,24 +129,26 @@ CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=256
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -147,7 +158,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -182,6 +192,7 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_DQ67SW is not set
 # CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set
 # CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set
+# CONFIG_BOARD_INTEL_FROST_CREEK is not set
 # CONFIG_BOARD_INTEL_GLKRVP is not set
 # CONFIG_BOARD_INTEL_HARCUVAR is not set
 # CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
@@ -197,6 +208,11 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_MTLRVP4ES_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set
+
+#
+# Ptlrvp
+#
+# CONFIG_BOARD_INTEL_PTLRVP is not set
 # CONFIG_BOARD_INTEL_SKLSDLBRK is not set
 # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
 # CONFIG_BOARD_INTEL_STRAGO is not set
@@ -204,7 +220,6 @@ CONFIG_BOARD_INTEL_D510MO=y
 # CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
 # CONFIG_BOARD_INTEL_WTM2 is not set
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -257,7 +272,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x80000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -272,6 +287,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -301,6 +317,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -355,6 +372,8 @@ CONFIG_SUPERIO_WINBOND_W83627THG=y
 #
 # Embedded Controllers
 #
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -379,6 +398,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -395,6 +417,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 # Display
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -428,6 +451,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -445,6 +469,7 @@ CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -594,7 +619,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -608,6 +632,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode b/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode
index d019ca59..8d3e113d 100644
--- a/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode
+++ b/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="D945GCLF"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -120,25 +129,27 @@ CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_IRQ_SLOT_COUNT=18
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -148,7 +159,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -183,6 +193,7 @@ CONFIG_BOARD_INTEL_D945GCLF=y
 # CONFIG_BOARD_INTEL_DQ67SW is not set
 # CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set
 # CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set
+# CONFIG_BOARD_INTEL_FROST_CREEK is not set
 # CONFIG_BOARD_INTEL_GLKRVP is not set
 # CONFIG_BOARD_INTEL_HARCUVAR is not set
 # CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
@@ -198,6 +209,11 @@ CONFIG_BOARD_INTEL_D945GCLF=y
 # CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_MTLRVP4ES_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set
+
+#
+# Ptlrvp
+#
+# CONFIG_BOARD_INTEL_PTLRVP is not set
 # CONFIG_BOARD_INTEL_SKLSDLBRK is not set
 # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
 # CONFIG_BOARD_INTEL_STRAGO is not set
@@ -205,7 +221,6 @@ CONFIG_BOARD_INTEL_D945GCLF=y
 # CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
 # CONFIG_BOARD_INTEL_WTM2 is not set
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_D3COLD_SUPPORT=y
@@ -256,7 +271,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -271,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -300,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -354,6 +371,8 @@ CONFIG_SUPERIO_SMSC_LPC47M15X=y
 #
 # Embedded Controllers
 #
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -378,6 +397,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -394,6 +416,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 # Display
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -423,6 +446,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -440,6 +464,7 @@ CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -592,7 +617,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -607,6 +631,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode b/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
index e3aa695c..fe65123e 100644
--- a/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_INTEL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="D945GCLF"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -120,25 +129,27 @@ CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_IRQ_SLOT_COUNT=18
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -148,7 +159,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -183,6 +193,7 @@ CONFIG_BOARD_INTEL_D945GCLF=y
 # CONFIG_BOARD_INTEL_DQ67SW is not set
 # CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set
 # CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set
+# CONFIG_BOARD_INTEL_FROST_CREEK is not set
 # CONFIG_BOARD_INTEL_GLKRVP is not set
 # CONFIG_BOARD_INTEL_HARCUVAR is not set
 # CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set
@@ -198,6 +209,11 @@ CONFIG_BOARD_INTEL_D945GCLF=y
 # CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_MTLRVP4ES_P_EXT_EC is not set
 # CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set
+
+#
+# Ptlrvp
+#
+# CONFIG_BOARD_INTEL_PTLRVP is not set
 # CONFIG_BOARD_INTEL_SKLSDLBRK is not set
 # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set
 # CONFIG_BOARD_INTEL_STRAGO is not set
@@ -205,7 +221,6 @@ CONFIG_BOARD_INTEL_D945GCLF=y
 # CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
 # CONFIG_BOARD_INTEL_WTM2 is not set
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_D3COLD_SUPPORT=y
@@ -256,7 +271,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -271,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -300,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -354,6 +371,8 @@ CONFIG_SUPERIO_SMSC_LPC47M15X=y
 #
 # Embedded Controllers
 #
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -378,6 +397,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -394,6 +416,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 # Display
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -423,6 +446,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -440,6 +464,7 @@ CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -592,7 +617,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -607,6 +631,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch b/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch
index da4ab420..c908a185 100644
--- a/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch
+++ b/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch
@@ -1,7 +1,7 @@
-From f625e31ee3abb867e775ab0cb724550825699c36 Mon Sep 17 00:00:00 2001
+From 857f80c0f41908c2672bd71e161b421676c1f22b Mon Sep 17 00:00:00 2001
 From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
 Date: Wed, 27 Oct 2021 13:36:01 +0200
-Subject: [PATCH 01/51] add c3 and clockgen to apple/macbook21
+Subject: [PATCH 01/24] add c3 and clockgen to apple/macbook21
 
 ---
  src/mainboard/apple/macbook21/Kconfig       |  1 +
diff --git a/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch b/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch
index ee605e58..e48d1d77 100644
--- a/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch
+++ b/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch
@@ -1,7 +1,7 @@
-From 8821f229d4fe48153ec7a45e0e04c3b2a3cd8c7c Mon Sep 17 00:00:00 2001
+From 055da4d70c9857b6e301a1fca61e7bf39b8ed788 Mon Sep 17 00:00:00 2001
 From: persmule <persmule@gmail.com>
 Date: Sun, 31 Oct 2021 23:33:26 +0000
-Subject: [PATCH 02/51] lenovo/t400: Enable all SATA ports
+Subject: [PATCH 02/24] lenovo/t400: Enable all SATA ports
 
 There are 2 SATA ports on the chassis of t400(s), but at least one dock for
 t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
diff --git a/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch b/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
index a4b430fe..3a4916ba 100644
--- a/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
+++ b/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
@@ -1,7 +1,7 @@
-From 0298639b6e80c8950fbb4484180b7195883ab8c1 Mon Sep 17 00:00:00 2001
+From c0246706b784309729194a8e7dd12e130eb74130 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 3 Jan 2022 19:06:22 +0000
-Subject: [PATCH 03/51] lenovo/x230: set me_state=Disabled in cmos.default
+Subject: [PATCH 03/24] lenovo/x230: set me_state=Disabled in cmos.default
 
 I only recently found out about this. It's possible to use me_cleaner to
 do the same thing, but some people might just flash coreboot and not do
diff --git a/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch b/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch
index 71695404..d3eaa5a8 100644
--- a/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch
+++ b/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch
@@ -1,7 +1,7 @@
-From c697c90ace86edfe724c86bd6a680cf0ae0e4b58 Mon Sep 17 00:00:00 2001
+From b84b1d40d5fef3278d9ea218e92576c095d8814c Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Wed, 2 Mar 2022 21:50:01 +0000
-Subject: [PATCH 04/51] set me_state=Disabled on all cmos.default files!
+Subject: [PATCH 04/24] set me_state=Disabled on all cmos.default files!
 
 yeah. why the hell isn't this the default
 
diff --git a/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
index b7b514cd..0938b9f2 100644
--- a/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ b/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -1,7 +1,7 @@
-From d2f579b82921c2c35e4cf756db0ca476fbadfac1 Mon Sep 17 00:00:00 2001
+From f6593dd2146657ee39e2ac3f4b4bac5e7569df67 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 05/51] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 05/24] util/ifdtool: add --nuke flag (all 0xFF on region)
 
 When this option is used, the region's contents are overwritten
 with all ones (0xFF).
@@ -20,10 +20,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 83 insertions(+), 31 deletions(-)
 
 diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index 32b2081d93..1473cf058b 100644
+index b21a89c0e1..fc91d4c239 100644
 --- a/util/ifdtool/ifdtool.c
 +++ b/util/ifdtool/ifdtool.c
-@@ -2204,6 +2204,7 @@ static void print_usage(const char *name)
+@@ -2230,6 +2230,7 @@ static void print_usage(const char *name)
  	       "                                         tgl    - Tiger Lake\n"
  	       "                                         wbg    - Wellsburg\n"
  	       "   -S | --setpchstrap                    Write a PCH strap\n"
@@ -31,7 +31,7 @@ index 32b2081d93..1473cf058b 100644
  	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
  	       "   -v | --version:                       print the version\n"
  	       "   -h | --help:                          print this help\n\n"
-@@ -2212,6 +2213,60 @@ static void print_usage(const char *name)
+@@ -2238,6 +2239,60 @@ static void print_usage(const char *name)
  	       "\n");
  }
  
@@ -92,15 +92,15 @@ index 32b2081d93..1473cf058b 100644
  int main(int argc, char *argv[])
  {
  	int opt, option_index = 0;
-@@ -2219,6 +2274,7 @@ int main(int argc, char *argv[])
+@@ -2245,6 +2300,7 @@ int main(int argc, char *argv[])
  	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
  	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
  	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
 +	int mode_nuke = 0;
  	int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
- 	char *region_type_string = NULL, *region_fname = NULL;
- 	const char *layout_fname = NULL;
-@@ -2254,6 +2310,7 @@ int main(int argc, char *argv[])
+ 	char *region_type_string = NULL, *region_fname = NULL, *layout_fname = NULL;
+ 	char *new_filename = NULL;
+@@ -2279,6 +2335,7 @@ int main(int argc, char *argv[])
  		{"validate", 0, NULL, 't'},
  		{"setpchstrap", 1, NULL, 'S'},
  		{"newvalue", 1, NULL, 'V'},
@@ -108,7 +108,7 @@ index 32b2081d93..1473cf058b 100644
  		{0, 0, 0, 0}
  	};
  
-@@ -2303,35 +2360,8 @@ int main(int argc, char *argv[])
+@@ -2328,35 +2385,8 @@ int main(int argc, char *argv[])
  			region_fname++;
  			// Descriptor, BIOS, ME, GbE, Platform
  			// valid type?
@@ -146,7 +146,7 @@ index 32b2081d93..1473cf058b 100644
  				fprintf(stderr, "No such region type: '%s'\n\n",
  					region_type_string);
  				fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
-@@ -2508,6 +2538,22 @@ int main(int argc, char *argv[])
+@@ -2533,6 +2563,22 @@ int main(int argc, char *argv[])
  		case 't':
  			mode_validate = 1;
  			break;
@@ -169,7 +169,7 @@ index 32b2081d93..1473cf058b 100644
  		case 'v':
  			print_version();
  			exit(EXIT_SUCCESS);
-@@ -2524,7 +2570,8 @@ int main(int argc, char *argv[])
+@@ -2552,7 +2598,8 @@ int main(int argc, char *argv[])
  	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
  			mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
  			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
@@ -179,7 +179,7 @@ index 32b2081d93..1473cf058b 100644
  		fprintf(stderr, "You may not specify more than one mode.\n\n");
  		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
  		exit(EXIT_FAILURE);
-@@ -2533,7 +2580,8 @@ int main(int argc, char *argv[])
+@@ -2561,7 +2608,8 @@ int main(int argc, char *argv[])
  	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
  			mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
  			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
@@ -189,7 +189,7 @@ index 32b2081d93..1473cf058b 100644
  		fprintf(stderr, "You need to specify a mode.\n\n");
  		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
  		exit(EXIT_FAILURE);
-@@ -2646,6 +2694,10 @@ int main(int argc, char *argv[])
+@@ -2674,6 +2722,10 @@ int main(int argc, char *argv[])
  		write_image(new_filename, image, size);
  	}
  
diff --git a/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch b/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
index 71f2f22d..b6f44a1a 100644
--- a/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
+++ b/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
@@ -1,7 +1,7 @@
-From a5bc59037dabd95b6595c5aaf38b83da2a91de54 Mon Sep 17 00:00:00 2001
+From c730bc21c276376baa36956548af1e8412325a9e Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sat, 6 May 2023 15:53:41 -0600
-Subject: [PATCH 06/51] mb/dell/e6400: Enable 01.0 device in devicetree for
+Subject: [PATCH 06/24] mb/dell/e6400: Enable 01.0 device in devicetree for
  dGPU models
 
 Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
diff --git a/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
index fa364ca1..793abd91 100644
--- a/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ b/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -1,7 +1,7 @@
-From f883599a362f1383f3712b72516f76187d0a9cbe Mon Sep 17 00:00:00 2001
+From b109338522d997dd1b1f705891f000c2f8bfe457 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 07/51] Remove warning for coreboot images built without a
+Subject: [PATCH 07/24] Remove warning for coreboot images built without a
  payload
 
 I added this in upstream to prevent people from accidentally flashing
diff --git a/config/coreboot/default/patches/0018-HACK-Disable-coreboot-related-BL31-features.patch b/config/coreboot/default/patches/0008-HACK-Disable-coreboot-related-BL31-features.patch
similarity index 78%
rename from config/coreboot/default/patches/0018-HACK-Disable-coreboot-related-BL31-features.patch
rename to config/coreboot/default/patches/0008-HACK-Disable-coreboot-related-BL31-features.patch
index 9592215d..e4fc4f35 100644
--- a/config/coreboot/default/patches/0018-HACK-Disable-coreboot-related-BL31-features.patch
+++ b/config/coreboot/default/patches/0008-HACK-Disable-coreboot-related-BL31-features.patch
@@ -1,7 +1,7 @@
-From ec27f5414c78d493ec7be4cd055ac877ce9ea178 Mon Sep 17 00:00:00 2001
+From 243d3b1892d33b4eccc9c48333fbc137c4294a73 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Thu, 22 Jun 2023 16:44:27 +0300
-Subject: [PATCH 18/51] HACK: Disable coreboot related BL31 features
+Subject: [PATCH 08/24] HACK: Disable coreboot related BL31 features
 
 I don't know why, but removing this BL31 make argument lets gru-kevin
 power off properly when shut down from Linux. Needs investigation.
@@ -10,10 +10,10 @@ power off properly when shut down from Linux. Needs investigation.
  1 file changed, 3 deletions(-)
 
 diff --git a/src/arch/arm64/Makefile.mk b/src/arch/arm64/Makefile.mk
-index cb43897efd..a9e5ff399a 100644
+index f54c6d22fc..b075abfd42 100644
 --- a/src/arch/arm64/Makefile.mk
 +++ b/src/arch/arm64/Makefile.mk
-@@ -173,9 +173,6 @@ BL31_MAKEARGS += LOG_LEVEL=40
+@@ -162,9 +162,6 @@ BL31_MAKEARGS += LOG_LEVEL=40
  # Always enable crash reporting, even on a release build
  BL31_MAKEARGS += CRASH_REPORTING=1
  
diff --git a/config/coreboot/default/patches/0008-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch b/config/coreboot/default/patches/0008-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
deleted file mode 100644
index 48b9d21e..00000000
--- a/config/coreboot/default/patches/0008-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
+++ /dev/null
@@ -1,430 +0,0 @@
-From 40545928c415c27d3a30748e4bfdee7f9d8f82f9 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sat, 19 Aug 2023 16:19:10 -0600
-Subject: [PATCH 08/51] mb/dell: Add Latitude E6530 (Ivy Bridge)
-
-Mainboard is QALA0/LA-7761P (UMA). The version with a Nvidia dGPU was
-not tested. I do not physically have this system; someone with physical
-access to one sent me the output of autoport which I then modified to
-produce this port.
-
-I was also sent the vbios obtained using intel_bios_dumper while running
-version A22 of the vendor firmware, which I then processed using
-`intelvbttool --inoprom vbios.bin --outvbt data.vbt` to obtain data.vbt.
-
-This was originally tested and found to be working as a standalone board
-port in Libreboot, though this variant based port in upstream coreboot
-has not been tested.
-
-This can be internally flashed by sending a command to the EC, which
-causes the EC to pull the FDO pin low and the firmware to skip setting
-up any chipset based write protections [1]. The EC is the SMSC MEC5055,
-which seems to be compatible with the existing MEC5035 code.
-
-[1] https://gitlab.com/nic3-14159/dell-flash-unlock
-
-Change-Id: I9fcd73416018574f8934962f92c8222d0101cb71
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/snb_ivb_latitude/Kconfig   |   8 +
- .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
- .../snb_ivb_latitude/variants/e6530/data.vbt  | Bin 0 -> 4280 bytes
- .../variants/e6530/early_init.c               |  14 ++
- .../snb_ivb_latitude/variants/e6530/gpio.c    | 192 ++++++++++++++++++
- .../variants/e6530/hda_verb.c                 |  32 +++
- .../variants/e6530/overridetree.cb            |  37 ++++
- 7 files changed, 286 insertions(+)
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/data.vbt
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/gpio.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-index be9ac37845..03377275f0 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-@@ -23,6 +23,12 @@ config BOARD_DELL_LATITUDE_E6430
- 	select MAINBOARD_USES_IFD_GBE_REGION
- 	select SOUTHBRIDGE_INTEL_C216
- 
-+config BOARD_DELL_LATITUDE_E6530
-+	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
-+	select BOARD_ROMSIZE_KB_12288
-+	select MAINBOARD_USES_IFD_GBE_REGION
-+	select SOUTHBRIDGE_INTEL_C216
-+
- if BOARD_DELL_SNB_IVB_LATITUDE_COMMON
- 
- config DRAM_RESET_GATE_GPIO
-@@ -33,6 +39,7 @@ config MAINBOARD_DIR
- 
- config MAINBOARD_PART_NUMBER
- 	default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
-+	default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
- 
- config OVERRIDE_DEVICETREE
- 	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
-@@ -42,6 +49,7 @@ config USBDEBUG_HCD_INDEX
- 
- config VARIANT_DIR
- 	default "e6430" if BOARD_DELL_LATITUDE_E6430
-+	default "e6530" if BOARD_DELL_LATITUDE_E6530
- 
- config VGA_BIOS_ID
- 	default "8086,0166"
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-index 183252630a..d89185d670 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-@@ -2,3 +2,6 @@
- 
- config BOARD_DELL_LATITUDE_E6430
- 	bool "Latitude E6430"
-+
-+config BOARD_DELL_LATITUDE_E6530
-+	bool "Latitude E6530"
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..af64a913d521fe240ce30e114e90fe75d3841bbc
-GIT binary patch
-literal 4280
-zcmdT{U2GiH75-*te`aTAcGqJQY$rA+e`ZbWcy_TDH@NC}cbl$*NjAn^RtPm->J7GV
-zY_m3jN`RN*h9FvG3Do9+qP$c^s1;PLB3@br9>Ag%La5?TLP`-2DDaR65U2_)=g!QU
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-zTMlK0$A=H4Mh~QKqCa92jz_;d3rtFqp(o-4gCnzxrJ2}Rw@^!haWp<ahv&+aDb5_3
-zE0-vq=pkms7Ves!pD#^PA#PF^_wjBTO=oC(ayR{asyKURiBdh3?x76Ll#Z5WXklvl
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-z1x-OrK~}*8L07Po(5+xZL6I<}phTEf5QRsVJYHa{f^AXPFaoSsnJ0feXUdB=CJ>Fv
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-eZvUbDHC^NLu5~gtzg|!EqSkX2ep9pg!tpEeo1jDh
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c
-new file mode 100644
-index 0000000000..ff83db095b
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c
-@@ -0,0 +1,14 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+			| COMB_LPC_EN | COMA_LPC_EN);
-+	mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/gpio.c
-new file mode 100644
-index 0000000000..777570765a
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/gpio.c
-@@ -0,0 +1,192 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_GPIO,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_GPIO,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_NATIVE,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_GPIO,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_NATIVE,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio1 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio3 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio16 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_OUTPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio28 = GPIO_LEVEL_LOW,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+	.gpio30 = GPIO_RESET_RSMRST,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio13 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_GPIO,
-+	.gpio46 = GPIO_MODE_NATIVE,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_GPIO,
-+	.gpio50 = GPIO_MODE_NATIVE,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_NATIVE,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_NATIVE,
-+	.gpio56 = GPIO_MODE_NATIVE,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_INPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio45 = GPIO_DIR_OUTPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio49 = GPIO_DIR_INPUT,
-+	.gpio51 = GPIO_DIR_INPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio34 = GPIO_LEVEL_HIGH,
-+	.gpio45 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_GPIO,
-+	.gpio69 = GPIO_MODE_GPIO,
-+	.gpio70 = GPIO_MODE_GPIO,
-+	.gpio71 = GPIO_MODE_GPIO,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_NATIVE,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio68 = GPIO_DIR_INPUT,
-+	.gpio69 = GPIO_DIR_INPUT,
-+	.gpio70 = GPIO_DIR_INPUT,
-+	.gpio71 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c
-new file mode 100644
-index 0000000000..3ebccff81d
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76df,	/* Codec Vendor / Device ID: IDT */
-+	0x10280535,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x10280535),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+	0x80862806,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb
-new file mode 100644
-index 0000000000..8b9c82fba4
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb
-@@ -0,0 +1,37 @@
-+## SPDX-License-Identifier: GPL-2.0-or-later
-+
-+chip northbridge/intel/sandybridge
-+	device domain 0 on
-+		subsystemid 0x1028 0x0535 inherit
-+
-+		device ref igd on
-+			register "gpu_cpu_backlight" = "0x00000251"
-+			register "gpu_pch_backlight" = "0x13121312"
-+		end
-+
-+		chip southbridge/intel/bd82x6x
-+			register "usb_port_config" = "{
-+				{ 1, 1, 0 },
-+				{ 1, 1, 0 },
-+				{ 1, 1, 1 },
-+				{ 1, 1, 1 },
-+				{ 1, 1, 2 },
-+				{ 1, 1, 2 },
-+				{ 1, 0, 3 },
-+				{ 1, 1, 3 },
-+				{ 1, 1, 4 },
-+				{ 1, 1, 4 },
-+				{ 1, 1, 5 },
-+				{ 1, 1, 5 },
-+				{ 1, 2, 6 },
-+				{ 1, 2, 6 },
-+			}"
-+
-+			device ref xhci on
-+				register "superspeed_capable_ports" = "0x0000000f"
-+				register "xhci_overcurrent_mapping" = "0x00000c03"
-+				register "xhci_switchable_ports" = "0x0000000f"
-+			end
-+		end
-+	end
-+end
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0019-dell-e6430-use-ME-Soft-Temporary-Disable.patch b/config/coreboot/default/patches/0009-dell-e6430-use-ME-Soft-Temporary-Disable.patch
similarity index 87%
rename from config/coreboot/default/patches/0019-dell-e6430-use-ME-Soft-Temporary-Disable.patch
rename to config/coreboot/default/patches/0009-dell-e6430-use-ME-Soft-Temporary-Disable.patch
index b3d2d12c..afada4b5 100644
--- a/config/coreboot/default/patches/0019-dell-e6430-use-ME-Soft-Temporary-Disable.patch
+++ b/config/coreboot/default/patches/0009-dell-e6430-use-ME-Soft-Temporary-Disable.patch
@@ -1,7 +1,7 @@
-From a15b59616e00c43c05d7853080859d4aefe26c5d Mon Sep 17 00:00:00 2001
+From ef4f92299f18c5f28bfe8392cbc0e27d48c03415 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 11:41:41 +0000
-Subject: [PATCH 19/51] dell/e6430: use ME Soft Temporary Disable
+Subject: [PATCH 09/24] dell/e6430: use ME Soft Temporary Disable
 
 i overlooked this. it's set on other boards.
 
diff --git a/config/coreboot/default/patches/0009-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch b/config/coreboot/default/patches/0009-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
deleted file mode 100644
index a2a13166..00000000
--- a/config/coreboot/default/patches/0009-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
+++ /dev/null
@@ -1,430 +0,0 @@
-From 423e2e28618b08a4107aea0a2fbc1096f5a8be02 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Wed, 31 Jan 2024 22:57:07 -0700
-Subject: [PATCH 09/51] mb/dell: Add Latitude E5530 (Ivy Bridge)
-
-Mainboard is QXW10/LA-7902P (UMA). I do not physically have this board;
-someone with physical access to one sent me the output of autoport which
-I then modified to produce this port. I was also sent the VBT binary,
-which was obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running
-version A21 of the vendor firmware.
-
-This was originally tested and found to be working as a standalone board
-port in Libreboot, but this variant based port in upstream coreboot has
-not been tested.
-
-This can be internally flashed by sending a command to the EC, which
-causes the EC to pull the FDO pin low and the firmware to skip setting
-up any chipset based write protections [1]. The EC is the SMSC MEC5055,
-which seems to be compatible with the existing MEC5035 code.
-
-Change-Id: Idaf6618df70aa19d8e60b2263088737712dec5f0
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/snb_ivb_latitude/Kconfig   |   7 +
- .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
- .../snb_ivb_latitude/variants/e5530/data.vbt  | Bin 0 -> 6144 bytes
- .../variants/e5530/early_init.c               |  14 ++
- .../snb_ivb_latitude/variants/e5530/gpio.c    | 194 ++++++++++++++++++
- .../variants/e5530/hda_verb.c                 |  32 +++
- .../variants/e5530/overridetree.cb            |  39 ++++
- 7 files changed, 289 insertions(+)
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/data.vbt
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/gpio.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-index 03377275f0..183a67bec3 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-@@ -17,6 +17,11 @@ config BOARD_DELL_SNB_IVB_LATITUDE_COMMON
- 	select SYSTEM_TYPE_LAPTOP
- 	select USE_NATIVE_RAMINIT
- 
-+config BOARD_DELL_LATITUDE_E5530
-+	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
-+	select BOARD_ROMSIZE_KB_12288
-+	select SOUTHBRIDGE_INTEL_C216
-+
- config BOARD_DELL_LATITUDE_E6430
- 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
- 	select BOARD_ROMSIZE_KB_12288
-@@ -38,6 +43,7 @@ config MAINBOARD_DIR
- 	default "dell/snb_ivb_latitude"
- 
- config MAINBOARD_PART_NUMBER
-+	default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
- 	default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
- 	default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
- 
-@@ -48,6 +54,7 @@ config USBDEBUG_HCD_INDEX
- 	default 2
- 
- config VARIANT_DIR
-+	default "e5530" if BOARD_DELL_LATITUDE_E5530
- 	default "e6430" if BOARD_DELL_LATITUDE_E6430
- 	default "e6530" if BOARD_DELL_LATITUDE_E6530
- 
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-index d89185d670..c15ef4028f 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-@@ -1,5 +1,8 @@
- ## SPDX-License-Identifier: GPL-2.0-only
- 
-+config BOARD_DELL_LATITUDE_E5530
-+	bool "Latitude E5530"
-+
- config BOARD_DELL_LATITUDE_E6430
- 	bool "Latitude E6430"
- 
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..3c54b70be7856a6420d001112d7f17f8bab46ed3
-GIT binary patch
-literal 6144
-zcmeHKU2Gdg5dO}0w$JA~+qs02q)iz56C9e5vuQ#oL0l3O+%|395Q2peO{y4(2uX0t
-zuMja1N)bPb1cE+5)fYsCK!89MFQAGChyWpk5PuR<K|G+sLmxmOR4}u5=Rg`mj70g7
-zvgdDic6N4dW^QKhynd)>kS^cR)3#-(r*-?zo-O^C(kLvv8XM<+Y3tdt^YY!P?!oTe
-zJ^ed-x6w0Lh5fN#jsv5TWE#mtd*_yky}9xDK(kOwLt+C7_AQAd#iwr=o0`gvQZ`{x
-z6ZeT`x^^;8+a~jSa^o~PF@8J6N5;o#dhCwebaM;!_oisw1#O9K={qQM<@Oeu$lXeN
-z#wJGcW4Y<2)-A{Bot(NoKX%>qdnw-AOi9bKT9Z~HL5|7PJDHz4kGlEx143q+26EH6
-z{4KfB^9;?<fTOaiNPy%=@LovL&q<^d1Qdi+Xex9SvIM^ZLq%9cP{A1rE>#dw(WfA;
-zBCR3@pCS1a;A|CZW1h7H*l#mW{%y{bf)9ofiz!EHzyiac@{RpMzz>O-<~{hx5tw%b
-z3ZJWD4_g-`iF`tUJb}+Vfe;XI1T2Y4_Y!iVk<<T4ce(^PWKh<?N^a`t+}vgNr25iZ
-z`!fTBL)ojYF5G?3y|eW=`9>MLB9et&!A7LDDE7&5ye#|hn%s#IWgagDEPNHHMUhb-
-ztc9t?uz{bD#kh#kpsE;AO-wWHV?4olPStRPag^~k<737bjBgm<GlC%vRgBe)4U9I%
-zg^XUtcE**A5ylOSn;A2V2N;hso?--U#>t|ufS}_`LGs2bcSKCVBh4s0>G7ZR_@NWx
-zkph}GhP}~YR?roT!61GqzQ?gBsuv3jY}UXbmr|alv^VxUqbz5<`5=!hhpaa*7DK~4
-zP4ad6dhH!>nYpc4{J&G-w{UiWo$zXnTz{tAq0|?c_`QJ7pKmCwIpe7Uix$P?9}v*1
-z(aVR6OkMkQ6oM}*UC@j78!~>7=OZCVYXeu|u0SiI4}w$uw6&0P09LF%Hp}O&IA3gl
-z4@ap0NfAe+q(ZVm{Bwe*Do~kbCc$Q!x7b3Sk9tLgVmsR<Q4H=9Nl;mmf2xpY<*d*-
-z`yI_BR#`La=Oxxt#qgS`3pER^nh^CZ%*qlq2N9@uSAtz-C7AhduB_U|{>#oOrY`tq
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-zL>Q#%k_O0@^DN5S@MXi$D;acJ>#cTV-(U@Offv4ACp4hO4$Ll!WO)s3P4=t9vpWBC
-zSckhlcD?xUuX=Gx96Dx{IsQ23r&;o1*+^Cp2RA3nd$A-RIHP2Q7uitC>c67FIR*5}
-zB3a%B!?6K=TJ$W+SJv@*9Lms{mTvWmU4Zanj_Z*lSqOGISzYp?yawOqLhVhRt#-E6
-zd)YW~h&meh-5prIE}Cr&7f?MMi&cqTt_^%Fa?>k(=`9jVoIf@}{g+WX#TpWuc+!2v
-zPG^>A|NZ2GlGsKdGqN{7>Fr7+Hc_^3z}uBhC4?nzOQ*!QyVugGjkK_~$bvtfY`h79
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-Jz~2*rUjdP?m;3+#
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c
-new file mode 100644
-index 0000000000..ff83db095b
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c
-@@ -0,0 +1,14 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+			| COMB_LPC_EN | COMA_LPC_EN);
-+	mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/gpio.c
-new file mode 100644
-index 0000000000..0599f13921
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/gpio.c
-@@ -0,0 +1,194 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_GPIO,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_GPIO,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_GPIO,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_GPIO,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_NATIVE,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio1 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio3 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio12 = GPIO_DIR_OUTPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio16 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_OUTPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio12 = GPIO_LEVEL_HIGH,
-+	.gpio28 = GPIO_LEVEL_LOW,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+	.gpio30 = GPIO_RESET_RSMRST,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio13 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_GPIO,
-+	.gpio46 = GPIO_MODE_NATIVE,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_GPIO,
-+	.gpio50 = GPIO_MODE_NATIVE,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_GPIO,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_NATIVE,
-+	.gpio56 = GPIO_MODE_NATIVE,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_INPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_INPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio45 = GPIO_DIR_INPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio49 = GPIO_DIR_INPUT,
-+	.gpio51 = GPIO_DIR_INPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio53 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_GPIO,
-+	.gpio69 = GPIO_MODE_GPIO,
-+	.gpio70 = GPIO_MODE_GPIO,
-+	.gpio71 = GPIO_MODE_GPIO,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_GPIO,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio68 = GPIO_DIR_INPUT,
-+	.gpio69 = GPIO_DIR_INPUT,
-+	.gpio70 = GPIO_DIR_INPUT,
-+	.gpio71 = GPIO_DIR_INPUT,
-+	.gpio74 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c
-new file mode 100644
-index 0000000000..3e89a6d75f
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76df,	/* Codec Vendor / Device ID: IDT */
-+	0x1028053d,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x1028053d),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0xd5a301a0),
-+
-+	0x80862806,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb
-new file mode 100644
-index 0000000000..85c448d010
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb
-@@ -0,0 +1,39 @@
-+## SPDX-License-Identifier: GPL-2.0-or-later
-+
-+chip northbridge/intel/sandybridge
-+	device domain 0 on
-+		subsystemid 0x1028 0x053d inherit
-+
-+		device ref igd on
-+			register "gpu_cpu_backlight" = "0x00000000"
-+			register "gpu_pch_backlight" = "0x03d003d0"
-+		end
-+
-+		chip southbridge/intel/bd82x6x
-+			register "usb_port_config" = "{
-+				{ 1, 1, 0 },
-+				{ 1, 1, 0 },
-+				{ 1, 1, 1 },
-+				{ 1, 1, 1 },
-+				{ 1, 1, 2 },
-+				{ 1, 1, 2 },
-+				{ 1, 1, 3 },
-+				{ 1, 0, 3 },
-+				{ 1, 2, 4 },
-+				{ 1, 1, 4 },
-+				{ 1, 1, 5 },
-+				{ 1, 1, 5 },
-+				{ 1, 0, 6 },
-+				{ 1, 1, 6 },
-+			}"
-+
-+			device ref xhci on
-+				register "superspeed_capable_ports" = "0x0000000f"
-+				register "xhci_overcurrent_mapping" = "0x00000c03"
-+				register "xhci_switchable_ports" = "0x0000000f"
-+			end
-+			device ref gbe off end
-+			device ref pcie_rp7 on end # BCM5761 Ethernet
-+		end
-+	end
-+end
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0010-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch b/config/coreboot/default/patches/0010-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
deleted file mode 100644
index 80b2c147..00000000
--- a/config/coreboot/default/patches/0010-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
+++ /dev/null
@@ -1,435 +0,0 @@
-From 200668a694f1c534a94a0bc8996416e246fe91b0 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sun, 26 Nov 2023 17:08:52 -0700
-Subject: [PATCH 10/51] mb/dell: Add Latitude E6420 (Sandy Bridge)
-
-Mainboard is PAL50/LA-6591P (UMA). The version with an Nvidia dGPU was
-not tested. I do not physically have this system; someone with physical
-access to one sent me the output of autoport which I then modified to
-produce this port. I was also sent the VBT binary, which was obtained
-from `/sys/kernel/debug/dri/0/i915_vbt` while running version A25 of the
-vendor firmware.
-
-This was originally tested and found to be working as a standalone board
-port in Libreboot, but this variant based port in upstream coreboot has
-not been tested.
-
-This can be internally flashed by sending a command to the EC, which
-causes the EC to pull the FDO pin low and the firmware to skip setting
-up any chipset based write protections [1]. The EC is the SMSC MEC5055,
-which seems to be compatible with the existing MEC5035 code.
-
-[1] https://gitlab.com/nic3-14159/dell-flash-unlock
-
-Change-Id: Ic48d9ea58172a5b13958c8afebcb19c8929c4394
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/snb_ivb_latitude/Kconfig   |  13 +-
- .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
- .../snb_ivb_latitude/variants/e6420/data.vbt  | Bin 0 -> 6144 bytes
- .../variants/e6420/early_init.c               |  14 ++
- .../snb_ivb_latitude/variants/e6420/gpio.c    | 191 ++++++++++++++++++
- .../variants/e6420/hda_verb.c                 |  32 +++
- .../variants/e6420/overridetree.cb            |  35 ++++
- 7 files changed, 287 insertions(+), 1 deletion(-)
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/data.vbt
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/gpio.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/overridetree.cb
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-index 183a67bec3..d2786970ee 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-@@ -17,6 +17,12 @@ config BOARD_DELL_SNB_IVB_LATITUDE_COMMON
- 	select SYSTEM_TYPE_LAPTOP
- 	select USE_NATIVE_RAMINIT
- 
-+config BOARD_DELL_LATITUDE_E6420
-+	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
-+	select BOARD_ROMSIZE_KB_10240
-+	select MAINBOARD_USES_IFD_GBE_REGION
-+	select SOUTHBRIDGE_INTEL_BD82X6X
-+
- config BOARD_DELL_LATITUDE_E5530
- 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
- 	select BOARD_ROMSIZE_KB_12288
-@@ -43,6 +49,7 @@ config MAINBOARD_DIR
- 	default "dell/snb_ivb_latitude"
- 
- config MAINBOARD_PART_NUMBER
-+	default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
- 	default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
- 	default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
- 	default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
-@@ -54,11 +61,15 @@ config USBDEBUG_HCD_INDEX
- 	default 2
- 
- config VARIANT_DIR
-+	default "e6420" if BOARD_DELL_LATITUDE_E6420
- 	default "e5530" if BOARD_DELL_LATITUDE_E5530
- 	default "e6430" if BOARD_DELL_LATITUDE_E6430
- 	default "e6530" if BOARD_DELL_LATITUDE_E6530
- 
- config VGA_BIOS_ID
--	default "8086,0166"
-+	default "8086,0166" if BOARD_DELL_LATITUDE_E5530
-+	default "8086,0126" if BOARD_DELL_LATITUDE_E6420
-+	default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
-+		|| BOARD_DELL_LATITUDE_E6530
- 
- endif
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-index c15ef4028f..257d428a70 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-@@ -1,5 +1,8 @@
- ## SPDX-License-Identifier: GPL-2.0-only
- 
-+config BOARD_DELL_LATITUDE_E6420
-+	bool "Latitude E6420"
-+
- config BOARD_DELL_LATITUDE_E5530
- 	bool "Latitude E5530"
- 
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..d3662eea1bc78b60be6d0bd2cc38bb46b654afbd
-GIT binary patch
-literal 6144
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-ziekMa&kvRFruRcKCevGy5)TxUBDlur@E{TtQ^NQ>nO+Cgl)&Ga(PxqVW?e3TLH-UY
-zdL3T{z^xdd`$(STFUb8R*cKa}r>n{Wk+MXRH~o-hN}#9OF*>T#>rfhiRs(Wc-R^9@
-z%F=<}dn(E}ADc03zJ>JvZe;_8f+WFLL4%qNYs`_aa`a$Pl5H;iO^Wt*cP3W(d=(g}
-zZ%nKT1$|r-tAv8($u2-BI2Uiz#%OT&!Q3b~Ru2P2j;Gem!@wfPsTR%J>W{8z)oq^J
-k^Qm&?O@bFkw4CTocwoW<6CRlGz=Q`TJTT#bN9KWl0rH4|j{pDw
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c
-new file mode 100644
-index 0000000000..ff83db095b
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c
-@@ -0,0 +1,14 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+			| COMB_LPC_EN | COMA_LPC_EN);
-+	mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/gpio.c
-new file mode 100644
-index 0000000000..943c743f48
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/gpio.c
-@@ -0,0 +1,191 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_NATIVE,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_NATIVE,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_NATIVE,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_GPIO,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_GPIO,
-+	.gpio31 = GPIO_MODE_GPIO,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio16 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_INPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+	.gpio30 = GPIO_DIR_OUTPUT,
-+	.gpio31 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio30 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_GPIO,
-+	.gpio46 = GPIO_MODE_NATIVE,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_GPIO,
-+	.gpio50 = GPIO_MODE_NATIVE,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_NATIVE,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_NATIVE,
-+	.gpio56 = GPIO_MODE_NATIVE,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_INPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio45 = GPIO_DIR_OUTPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio49 = GPIO_DIR_OUTPUT,
-+	.gpio51 = GPIO_DIR_INPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio34 = GPIO_LEVEL_HIGH,
-+	.gpio45 = GPIO_LEVEL_LOW,
-+	.gpio49 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_GPIO,
-+	.gpio69 = GPIO_MODE_GPIO,
-+	.gpio70 = GPIO_MODE_GPIO,
-+	.gpio71 = GPIO_MODE_GPIO,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_NATIVE,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio68 = GPIO_DIR_INPUT,
-+	.gpio69 = GPIO_DIR_INPUT,
-+	.gpio70 = GPIO_DIR_INPUT,
-+	.gpio71 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c
-new file mode 100644
-index 0000000000..ede8445aaf
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
-+	0x10280493,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x10280493),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+	0x80862805,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/overridetree.cb
-new file mode 100644
-index 0000000000..3012a3177f
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/overridetree.cb
-@@ -0,0 +1,35 @@
-+## SPDX-License-Identifier: GPL-2.0-or-later
-+
-+chip northbridge/intel/sandybridge
-+	device domain 0 on
-+		subsystemid 0x1028 0x0493 inherit
-+
-+		device ref igd on
-+			register "gpu_cpu_backlight" = "0x0000054f"
-+			register "gpu_pch_backlight" = "0x13121312"
-+		end
-+
-+		chip southbridge/intel/bd82x6x
-+			register "usb_port_config" = "{
-+				{ 1, 1, 0 },
-+				{ 1, 1, 0 },
-+				{ 1, 1, 1 },
-+				{ 1, 1, 1 },
-+				{ 1, 0, 2 },
-+				{ 1, 1, 2 },
-+				{ 1, 1, 3 },
-+				{ 1, 1, 3 },
-+				{ 1, 1, 5 },
-+				{ 1, 1, 5 },
-+				{ 1, 1, 7 },
-+				{ 1, 1, 6 },
-+				{ 1, 0, 6 },
-+				{ 1, 0, 7 },
-+			}"
-+
-+			device ref sata1 on
-+				register "sata_port_map" = "0x3b"
-+			end
-+		end
-+	end
-+end
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0020-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch b/config/coreboot/default/patches/0010-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
similarity index 99%
rename from config/coreboot/default/patches/0020-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
rename to config/coreboot/default/patches/0010-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
index 46e38925..96a1881c 100644
--- a/config/coreboot/default/patches/0020-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
+++ b/config/coreboot/default/patches/0010-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
@@ -1,7 +1,7 @@
-From 440ebbe1e10911dc3d8c53cf9eecb5519c2ecd67 Mon Sep 17 00:00:00 2001
+From 0cf8b5be9187a6d54e100483943c72f550bc2690 Mon Sep 17 00:00:00 2001
 From: Riku Viitanen <riku.viitanen@protonmail.com>
 Date: Sat, 23 Dec 2023 19:02:10 +0200
-Subject: [PATCH 20/51] mb/hp: Add Compaq Elite 8300 CMT port
+Subject: [PATCH 10/24] mb/hp: Add Compaq Elite 8300 CMT port
 
 Based on autoport and Z220 SuperIO code.
 
diff --git a/config/coreboot/default/patches/0011-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch b/config/coreboot/default/patches/0011-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
deleted file mode 100644
index 2b378406..00000000
--- a/config/coreboot/default/patches/0011-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
+++ /dev/null
@@ -1,449 +0,0 @@
-From 53abe363f2fa038080a976f2d3a2c63ee8da9022 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Wed, 31 Jan 2024 22:07:25 -0700
-Subject: [PATCH 11/51] mb/dell: Add Latitude E6520 (Sandy Bridge)
-
-Mainboard is PAL60/LA-6562P (UMA). The version with an Nvidia dGPU was
-not tested. I do not physically have this system; someone with physical
-access to one sent me the output of autoport which I then modified to
-produce this port. I was also sent the VBT binary, which was obtained
-from `/sys/kernel/debug/dri/0/i915_vbt` while running version A08 of the
-vendor firmware.
-
-This was originally tested and found to be working as a standalone board
-port in Libreboot, but this variant based port in upstream coreboot has
-not been tested.
-
-This can be internally flashed by sending a command to the EC, which
-causes the EC to pull the FDO pin low and the firmware to skip setting
-up any chipset based write protections [1]. The EC is the SMSC MEC5055,
-which seems to be compatible with the existing MEC5035 code.
-
-[1] https://gitlab.com/nic3-14159/dell-flash-unlock
-
-Change-Id: Ibdd40cc15642b8d404159d5962670ccc4167a9ec
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/snb_ivb_latitude/Kconfig   |   9 +
- .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
- .../snb_ivb_latitude/variants/e6520/data.vbt  | Bin 0 -> 6144 bytes
- .../variants/e6520/early_init.c               |  31 +++
- .../snb_ivb_latitude/variants/e6520/gpio.c    | 190 ++++++++++++++++++
- .../variants/e6520/hda_verb.c                 |  32 +++
- .../variants/e6520/overridetree.cb            |  35 ++++
- 7 files changed, 300 insertions(+)
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/data.vbt
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/gpio.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/overridetree.cb
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-index d2786970ee..72bdc96c0a 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-@@ -23,6 +23,12 @@ config BOARD_DELL_LATITUDE_E6420
- 	select MAINBOARD_USES_IFD_GBE_REGION
- 	select SOUTHBRIDGE_INTEL_BD82X6X
- 
-+config BOARD_DELL_LATITUDE_E6520
-+	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
-+	select BOARD_ROMSIZE_KB_10240
-+	select MAINBOARD_USES_IFD_GBE_REGION
-+	select SOUTHBRIDGE_INTEL_BD82X6X
-+
- config BOARD_DELL_LATITUDE_E5530
- 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
- 	select BOARD_ROMSIZE_KB_12288
-@@ -50,6 +56,7 @@ config MAINBOARD_DIR
- 
- config MAINBOARD_PART_NUMBER
- 	default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
-+	default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
- 	default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
- 	default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
- 	default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
-@@ -62,11 +69,13 @@ config USBDEBUG_HCD_INDEX
- 
- config VARIANT_DIR
- 	default "e6420" if BOARD_DELL_LATITUDE_E6420
-+	default "e6520" if BOARD_DELL_LATITUDE_E6520
- 	default "e5530" if BOARD_DELL_LATITUDE_E5530
- 	default "e6430" if BOARD_DELL_LATITUDE_E6430
- 	default "e6530" if BOARD_DELL_LATITUDE_E6530
- 
- config VGA_BIOS_ID
-+	default "8086,0116" if BOARD_DELL_LATITUDE_E6520
- 	default "8086,0166" if BOARD_DELL_LATITUDE_E5530
- 	default "8086,0126" if BOARD_DELL_LATITUDE_E6420
- 	default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-index 257d428a70..c7665ac263 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-@@ -3,6 +3,9 @@
- config BOARD_DELL_LATITUDE_E6420
- 	bool "Latitude E6420"
- 
-+config BOARD_DELL_LATITUDE_E6520
-+	bool "Latitude E6520"
-+
- config BOARD_DELL_LATITUDE_E5530
- 	bool "Latitude E5530"
- 
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..0ef16ee7cb482d2cb91ea80c3f419759355f7ba0
-GIT binary patch
-literal 6144
-zcmeHKZ){Ul6hE);wSB#PZ|mL$bQ^!}HW(eF@H)0JafGfbqsZ9G21{L7Sg{or$5uN)
-z_QgG55e!O(8p8*oBhhF`l$n^QF%rN;rzFNqqcPzFCd5QSB1Y7RKt1=pmTk1aFo9^Y
-z+x+gi_nvdlJ@?#m&wZWW=G#bH>ze$J`&!oe*Q|E0r!)d89LYY8b$aowZEoG-uiIF+
-z#n;$ezm6V<nGnvtc?lrGaf)1_);!W0?uqnojdw-1MQM|dwy`OcF?M@A)KgVV*N2}7
-zcXx+--0R}IwzW3-+`f2k?^Av5V7MpRO-q(9rn_R1@Xlz2Ztdy`$Gf6^w6~|bKi!!7
-z9;xq*^~bxmZQn^<^<`+2s=BdSM%VW2#FguN<FO^QuDhGIFquBu677q|cSj>jWFixQ
-z)4V8f0Gt`D`+>9Fr~tnJ76EJ`5D_F1cn-`0$RgN9unI6kfYkzIiO?W`ON4+34lv1_
-zNdPDkq1cf$p8^EW;TS*O$CdzNo#1fbIG_Oi0T(ti0jwyt0le_p_HlvX^CFvr)>$b>
-zO-z8^CSU`w=mIK7Q)@9fR;XUzrFu{T=rRyygIZBpU9+Or>+?4R9%~G?Y-|g)Z`Sti
-z+do(U*Wb-xR~DzjS<75#=Us4sH^C9U2FCbND7L7u$>M|<;t=AnRfI9C0v8c~AVg7t
-zIU<3D2oK^>L;%r(*o=4*u?Mja@dDyi#4zFn;(f#^#3*76aUSs#;tJv#La-6YLRdQB
-zdcvfERkvH?k~GJlfM<HR476j(@nfm+47<!Ult@^ua5M3h6A}q=C0ognX9aX4mxq)U
-zXOhm=DbLene?C%_16Q)2NRV@Yacz`D;{V>Ve-1?&ZXy}n)YwnVAgNlz#zX;=IX)-F
-z)9LL3lbEdY5Co)LsK?vP)7s}G(5xduE!Y!#Wgh<IN3(3ey=-oWU(9aEJ_HzV53Jbq
-zj5B5RjzLUt>_T&xi$uUA#0e}X3D~`J(bHz;DgTa@GrpW6=>eZwJeNYYo*GjF=``;(
-zuoQ3|V5YoKd$j=KK{`uSX*DeU1oJg=+RT6)rLe6%2>Ci^!5ao=*gS}wFN=nUf`fTF
-zM?Gb5ycWjM7I?MJ!2;w|LFg=UoLq-ytr2iemG)AsW}bI4X9PK}T5UKsQi7anu=tD6
-zf|={kXkNeQBD>6bQ3taC8XJOJ^e40_ydyfr&a41L^1)jNrK<B_wV}+ZE`p;QK=rDz
-zTw`SJ+e`Oc*icaF4INF51Xg*~ts@m)@9ETt(*@N7yy0)Ddce%i9{^k2kbd8=Wns~P
-zWBD$~himxDharxF@f!ti^0$~9Zxt{tg`@Dbl_0Ki2Xp_MEw-<z6qgep;XYmR%Dl-F
-z%3cBfcN;Avikpz-gmw_6mymu!Unk0YgnUfsk3{*6kQ;=S*p(_fS!JhDyYh^k?6uRk
-z?8--W@~NHvY*+ra6SG9iC1s^V)<|@Rqzp*pd5NBslrs`JC(&Oeg~v}CnJ$x+)iP<8
-z=`LA0Ad@39{XkZ}kjXbP{YzHtS!70*yy%LcnJ#cz4u%*Wq!^d*AVMZdr&l=#Qgik~
-ze2l)cX+!kF9EaFhY;0^Uo_#VNC?7K2Tf=ZR1y5);b!mCGG?<cc#M0rtHKYeKi%BE?
-z@Y6|P8fx#li}c`Uv24UGyZaM0To;Ep<_AWZA1t~bFgI)uf}&Eq=L_Cs89=>wnT0Vx
-z-jp>o1ffJNommZ4?=TIPlePIw0hgQ706f*tBC`#pg>9&zRHe>J2%RxBTrOc6Adh9E
-ziJr`?VQH!N!_GkoKaoq|+3$^Ae0#sUxXlmM1Huq~g<=Ls?ILv+nQcH%PQedGOlH=Q
-z77rMcJlH4Mkc#U2(IDv>rsm1aHpsdL_RdT^i_ACcQUMIJcSus}*(?CIiy^#^=t=g1
-z+*^Zbh30&^#_bKclSy9pL$<B~pK8m*sLpIdnHM@W$nA7Ea@Z`x27K?aNK<@lCW(2L
-zb@kB3H8kKy4W3Hu)NN|kd!DL^o#iR9a{QYV-Wl&r&hmIFX{ezkIV<4zFiVUQ@K>ao
-z00DnFy~Uek!JRwhVX!of0)$Sa*X^S~LMQH0<E(UUx}L=|;Kgw(r(4q=nD)T52c|tR
-O?SW|zOncy=dEg(6JAK&z
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c
-new file mode 100644
-index 0000000000..b6415a428b
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c
-@@ -0,0 +1,31 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+	{ 1, 1, 0 },
-+	{ 1, 1, 0 },
-+	{ 1, 1, 1 },
-+	{ 1, 1, 1 },
-+	{ 1, 0, 2 },
-+	{ 1, 1, 2 },
-+	{ 1, 0, 3 },
-+	{ 1, 0, 3 },
-+	{ 1, 1, 5 },
-+	{ 1, 1, 5 },
-+	{ 1, 1, 7 },
-+	{ 1, 1, 6 },
-+	{ 1, 0, 6 },
-+	{ 1, 0, 7 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+			| COMB_LPC_EN | COMA_LPC_EN);
-+	mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/gpio.c
-new file mode 100644
-index 0000000000..61f01816c4
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/gpio.c
-@@ -0,0 +1,190 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_NATIVE,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_NATIVE,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_NATIVE,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_GPIO,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_GPIO,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio16 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_INPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+	.gpio30 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio30 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_GPIO,
-+	.gpio46 = GPIO_MODE_NATIVE,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_GPIO,
-+	.gpio50 = GPIO_MODE_NATIVE,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_NATIVE,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_NATIVE,
-+	.gpio56 = GPIO_MODE_NATIVE,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_INPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio45 = GPIO_DIR_OUTPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio49 = GPIO_DIR_OUTPUT,
-+	.gpio51 = GPIO_DIR_INPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio34 = GPIO_LEVEL_HIGH,
-+	.gpio45 = GPIO_LEVEL_LOW,
-+	.gpio49 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_GPIO,
-+	.gpio69 = GPIO_MODE_GPIO,
-+	.gpio70 = GPIO_MODE_GPIO,
-+	.gpio71 = GPIO_MODE_GPIO,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_NATIVE,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio68 = GPIO_DIR_INPUT,
-+	.gpio69 = GPIO_DIR_INPUT,
-+	.gpio70 = GPIO_DIR_INPUT,
-+	.gpio71 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c
-new file mode 100644
-index 0000000000..ae376691e7
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
-+	0x10280494,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x10280494),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0x400000f2),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+	0x80862805,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/overridetree.cb
-new file mode 100644
-index 0000000000..f90f2dee1f
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/overridetree.cb
-@@ -0,0 +1,35 @@
-+## SPDX-License-Identifier: GPL-2.0-or-later
-+
-+chip northbridge/intel/sandybridge
-+	device domain 0 on
-+		subsystemid 0x1028 0x0494 inherit
-+
-+		device ref igd on
-+			register "gpu_cpu_backlight" = "0x00001312"
-+			register "gpu_pch_backlight" = "0x13121312"
-+		end
-+
-+		chip southbridge/intel/bd82x6x
-+			register "usb_port_config" = "{
-+				{ 1, 1, 0 },
-+				{ 1, 1, 0 },
-+				{ 1, 1, 1 },
-+				{ 1, 1, 1 },
-+				{ 1, 0, 2 },
-+				{ 1, 1, 2 },
-+				{ 1, 1, 3 },
-+				{ 1, 1, 3 },
-+				{ 1, 1, 5 },
-+				{ 1, 1, 5 },
-+				{ 1, 1, 7 },
-+				{ 1, 1, 6 },
-+				{ 1, 0, 6 },
-+				{ 1, 0, 7 },
-+			}"
-+
-+			device ref sata1 on
-+				register "sata_port_map" = "0x3b"
-+			end
-+		end
-+	end
-+end
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch b/config/coreboot/default/patches/0011-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
similarity index 98%
rename from config/coreboot/default/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
rename to config/coreboot/default/patches/0011-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
index b3305e58..564cb74c 100644
--- a/config/coreboot/default/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
+++ b/config/coreboot/default/patches/0011-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
@@ -1,7 +1,7 @@
-From 4c7577314f19e934d690c4cce3642fe693400c07 Mon Sep 17 00:00:00 2001
+From a4ffe8da011550fdeacae85ebf642ff57ffb08cc Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 2 Mar 2024 22:51:09 +0000
-Subject: [PATCH 21/51] nb/intel/haswell: make IOMMU a runtime option
+Subject: [PATCH 11/24] nb/intel/haswell: make IOMMU a runtime option
 
 When I tested graphics cards on a coreboot port for Dell
 OptiPlex 9020 SFF, I could not use a graphics card unless
diff --git a/config/coreboot/default/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch b/config/coreboot/default/patches/0012-dell-optiplex_9020-Disable-IOMMU-by-default.patch
similarity index 87%
rename from config/coreboot/default/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch
rename to config/coreboot/default/patches/0012-dell-optiplex_9020-Disable-IOMMU-by-default.patch
index f18f119e..06316010 100644
--- a/config/coreboot/default/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch
+++ b/config/coreboot/default/patches/0012-dell-optiplex_9020-Disable-IOMMU-by-default.patch
@@ -1,7 +1,7 @@
-From b5695d0f0dc44ed1eb1feac008e601040feda55d Mon Sep 17 00:00:00 2001
+From bcb2017f4c583742bc60179e6f7c7381e1fa0a39 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 2 Mar 2024 23:00:09 +0000
-Subject: [PATCH 22/51] dell/optiplex_9020: Disable IOMMU by default
+Subject: [PATCH 12/24] dell/optiplex_9020: Disable IOMMU by default
 
 Needed to make graphics cards work. Turning it on is
 recommended if only using iGPU, otherwise leave it off
diff --git a/config/coreboot/default/patches/0012-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch b/config/coreboot/default/patches/0012-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch
deleted file mode 100644
index 4fd3bba2..00000000
--- a/config/coreboot/default/patches/0012-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch
+++ /dev/null
@@ -1,442 +0,0 @@
-From 3f8eade6150f582129332f6347e9a685f8a7b500 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Wed, 7 Feb 2024 10:23:38 -0700
-Subject: [PATCH 12/51] mb/dell: Add Latitude E5520 (Sandy Bridge)
-
-Mainboard is Krug 15". I do not physically have this system; someone
-with physical access to one sent me the output of autoport which I then
-modified to produce this port. I was also sent the VBT binary, which was
-obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running version
-A14 of the vendor firmware.
-
-This was originally tested and found to be working as a standalone
-board port in Libreboot, but this variant based port in upstream
-coreboot has not been tested.
-
-This can be internally flashed by sending a command to the EC, which
-causes the EC to pull the FDO pin low and the firmware to skip setting
-up any chipset based write protections [1]. The EC is the SMSC MEC5055,
-which seems to be compatible with the existing MEC5035 code.
-
-[1] https://gitlab.com/nic3-14159/dell-flash-unlock
-
-Change-Id: Ic9bfc028d4b8ae01ccc019157bb53e7764671134
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/snb_ivb_latitude/Kconfig   |  10 +-
- .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
- .../snb_ivb_latitude/variants/e5520/data.vbt  | Bin 0 -> 6144 bytes
- .../variants/e5520/early_init.c               |  14 ++
- .../snb_ivb_latitude/variants/e5520/gpio.c    | 195 ++++++++++++++++++
- .../variants/e5520/hda_verb.c                 |  32 +++
- .../variants/e5520/overridetree.cb            |  39 ++++
- 7 files changed, 292 insertions(+), 1 deletion(-)
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/data.vbt
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/gpio.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/overridetree.cb
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-index 72bdc96c0a..4e94a7ef80 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-@@ -17,6 +17,11 @@ config BOARD_DELL_SNB_IVB_LATITUDE_COMMON
- 	select SYSTEM_TYPE_LAPTOP
- 	select USE_NATIVE_RAMINIT
- 
-+config BOARD_DELL_LATITUDE_E5520
-+	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
-+	select BOARD_ROMSIZE_KB_6144
-+	select SOUTHBRIDGE_INTEL_BD82X6X
-+
- config BOARD_DELL_LATITUDE_E6420
- 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
- 	select BOARD_ROMSIZE_KB_10240
-@@ -55,6 +60,7 @@ config MAINBOARD_DIR
- 	default "dell/snb_ivb_latitude"
- 
- config MAINBOARD_PART_NUMBER
-+	default "Latitude E5520" if BOARD_DELL_LATITUDE_E5520
- 	default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
- 	default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
- 	default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
-@@ -68,6 +74,7 @@ config USBDEBUG_HCD_INDEX
- 	default 2
- 
- config VARIANT_DIR
-+	default "e5520" if BOARD_DELL_LATITUDE_E5520
- 	default "e6420" if BOARD_DELL_LATITUDE_E6420
- 	default "e6520" if BOARD_DELL_LATITUDE_E6520
- 	default "e5530" if BOARD_DELL_LATITUDE_E5530
-@@ -77,7 +84,8 @@ config VARIANT_DIR
- config VGA_BIOS_ID
- 	default "8086,0116" if BOARD_DELL_LATITUDE_E6520
- 	default "8086,0166" if BOARD_DELL_LATITUDE_E5530
--	default "8086,0126" if BOARD_DELL_LATITUDE_E6420
-+	default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \
-+		|| BOARD_DELL_LATITUDE_E5520
- 	default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
- 		|| BOARD_DELL_LATITUDE_E6530
- 
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-index c7665ac263..7976691f21 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-@@ -1,5 +1,8 @@
- ## SPDX-License-Identifier: GPL-2.0-only
- 
-+config BOARD_DELL_LATITUDE_E5520
-+	bool "Latitude E5520"
-+
- config BOARD_DELL_LATITUDE_E6420
- 	bool "Latitude E6420"
- 
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..b511e75262e37fa123d674e9a7b21a8dfe427729
-GIT binary patch
-literal 6144
-zcmeHKZ){Ul6hE);wSBvNZ|mL$bmQOM2BTvXUI!}^N9ejTij1vnu+)Wx6<c9(Y_%K6
-zzOV-@f<ehpWB5RHBpMBgG7}RuMuM2=l*E{6G$wq&gqTQ3#E2RZsOP@dvW*rP7>Fjj
-z&F`Lj?>YC}bI(2Z+}C+6zKyiGrosQXuW7A+&1%<rN+Y1ck(}dLrx)Ma#^x>lnvFGE
-zeD#gB>*#Tq4&j^|7Xcz1r^pp*)g#T}u1Me3ct>Pgls5Qi3!6e2W0%`a-Ic|3efWuR
-zXJ@#}wJyGMTXTcY<%@TBKh@(3hP$Gjv}E}rx-%9D_eLXhYe!c&-VyDg-Cdo1>Biji
-zNNsnlFW#|jdoOj?mZ43m>cVO%UE9@*E7x|%V~c4`XD4l9GCi~@+7pfMibfX8L?!^I
-zc~Rg1I5SxH1DAEZ0{jA41jrJBh#-l;b6^%g7QrThRe)&%tQH_!ggOD7A_PRRgGuI0
-z0zi=n#rCB66d-sO$M~^6wgeb$2fH1|0R`v}xUiWCU`4SF;Dyh&j|mK&6WJWJ&Pq9I
-zVgmFQfh+)vE}(KWwHA|Oh3fSkss|;2E(2i}s1?gRRV%8!K7U={vHD=s#+Fd)W^M1j
-z{R4$??VSvEWpgT=vCM&1-U$bI6CB~IV3Z$$Vv7o!EDnev4j~R(MHsazZ~^fLLKGF4
-zEfQFOa3dZ?1Q1P#&4?!vyAk^k&m&$z3?WV+-b0*1j37o4=MX<3E+eiYge(Ht2umAW
-zOPDmU>UL{flI9u|@JtVvfp#o8ek?VfVV9YP5(%pnZX~{PKq4WoWGmV8t$=Ri@{zLQ
-zNYYt4<$0Ry&qIoG;7s-t333)Nu8opN{NG!)&!I@eO(cVx8vBVEBvotJ7%yNl$7iQ_
-zI=xk30+V$ff`F6<wRoF(TK%j9nsr#H23umU%)_7jNOl%*FPU567qbg;4gtp711nj2
-z#+kHw`v4|5cA+`UMIvAl;slnH1nl0v=xH<al>1}ljxDE1dcda^&!do|r^eJkI?aC-
-zEQMSfm?<w*Unzumkj_w5>VYL6W4=aCiy4rk%xq~5LV?bi|GL2$G7li<%c7yd;6T34
-zQBN5huZ3~6`ChGkpb$Bg5ITb#2iK-qs|1`=sl6Dhn(Lj&8Agt?S{sTDmmtRj7Jm_1
-zFnt{w&FdFkWS3bl>OeL?eO+*i{)9G!cSI-InGt|U0eEYmRCOHm7|I;#LO8ksRIeJ#
-zGe+jTwPg4C4TYuN(9zULV3k+hI$YuPo=%N8oZ#u_4S!3Xelt6N0BmuC`hCNeg+&97
-z6*!>)uHvr%2004GZv?!_-y&|TRmil=9D%Q`1aXBsnD^gov3*UZI34&1_vn(B=T4kZ
-z_A>ClXVIBNaS^hd&^DrU6VgZMYeadMkdFxcktn|ra-Gl;n^I{bt86rCQ=YMry*B!$
-zP5ID9KDE)GZOY#^VwPyRq^y+48j0?ZlzxdkC()CV@`*&wO7vGr;qjA3rb}gIwM-gi
-zx>HsT$mEDj-<OpyWb%zn|B@A3Hkp<!FT5;hrt_SZiy?*wDaIu{h>%Ir=@rh7)SR;b
-zAEWQGv_X1)wq0y5Ha0c~&psIsln<Hiu3;#Lf;%*eI<@?p8cfMJV(IYi8q$NA#iS8`
-z_~|4t4b^wtMSAeFST^F8-Tm<zu8D&j^8=&I4;I}Im>aeSK~X8*^Z9SE44_`P#KIUL
-zf6^N2f>5HCPWM3N+f0MyWOV^kz~!-wVc4MRXOY>4Jsxd1RyBKEMzNf{RKhesKFdbq
-zJ(*d<l2Y#n?E?~iBA39P?~Pr2d#}5=#Sfl-VGzGUF$4U2KcqCIVlwkC(&7PQk_X!a
-z8}3Jgq-&U*Co|h1>l)ZQGyW_x->i#;FvQ*=Nv&nG0N5@D@jjv_Q}K}6MP?1A6`JGe
-zDwj9pN+x;T4>`I9e5x(uqdK#OGB31ikk@Xv=dxLb4fx(;ktX@rOb~M~?dYQQYiPia
-z8r;jUQ?sd2@3||-cb2Eb%JFYfxHsONoaJ^eqoKN{<g9?-%`7oWz+aJS0tEc!^d@hD
-z1-I{%hr!Y?0uVZpUbl__37xn@jkD6Z>3SATgBQlEoN7&ZV9Eni9+>jLln16fFy(=V
-H=7E0zE^L4Z
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c
-new file mode 100644
-index 0000000000..ff83db095b
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c
-@@ -0,0 +1,14 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+			| COMB_LPC_EN | COMA_LPC_EN);
-+	mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/gpio.c
-new file mode 100644
-index 0000000000..f76b93d9f0
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/gpio.c
-@@ -0,0 +1,195 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_NATIVE,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_GPIO,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_GPIO,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_NATIVE,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_GPIO,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio3 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio12 = GPIO_DIR_OUTPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_INPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+	.gpio30 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio12 = GPIO_LEVEL_HIGH,
-+	.gpio30 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_NATIVE,
-+	.gpio46 = GPIO_MODE_GPIO,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_NATIVE,
-+	.gpio50 = GPIO_MODE_GPIO,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_GPIO,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_GPIO,
-+	.gpio56 = GPIO_MODE_GPIO,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_OUTPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio46 = GPIO_DIR_OUTPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio50 = GPIO_DIR_OUTPUT,
-+	.gpio51 = GPIO_DIR_OUTPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio53 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio55 = GPIO_DIR_OUTPUT,
-+	.gpio56 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio34 = GPIO_LEVEL_LOW,
-+	.gpio37 = GPIO_LEVEL_LOW,
-+	.gpio46 = GPIO_LEVEL_HIGH,
-+	.gpio50 = GPIO_LEVEL_HIGH,
-+	.gpio51 = GPIO_LEVEL_LOW,
-+	.gpio55 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_NATIVE,
-+	.gpio69 = GPIO_MODE_NATIVE,
-+	.gpio70 = GPIO_MODE_NATIVE,
-+	.gpio71 = GPIO_MODE_NATIVE,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_GPIO,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio74 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c
-new file mode 100644
-index 0000000000..1373975352
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
-+	0x1028049a,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x1028049a),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0xd5a301a0),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+	0x80862805,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/overridetree.cb
-new file mode 100644
-index 0000000000..479d1b696e
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/overridetree.cb
-@@ -0,0 +1,39 @@
-+## SPDX-License-Identifier: GPL-2.0-or-later
-+
-+chip northbridge/intel/sandybridge
-+	device domain 0 on
-+		subsystemid 0x1028 0x049a inherit
-+
-+		device ref igd on
-+			register "gpu_cpu_backlight" = "0x00000218"
-+			register "gpu_pch_backlight" = "0x13121312"
-+		end
-+
-+		chip southbridge/intel/bd82x6x
-+			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 1, 0 }"
-+			register "usb_port_config" = "{
-+				{ 1, 1, 0 },
-+				{ 1, 1, 0 },
-+				{ 1, 1, 1 },
-+				{ 1, 1, 1 },
-+				{ 1, 1, 2 },
-+				{ 1, 1, 2 },
-+				{ 1, 1, 3 },
-+				{ 1, 1, 3 },
-+				{ 1, 1, 5 },
-+				{ 1, 1, 5 },
-+				{ 1, 1, 7 },
-+				{ 1, 1, 6 },
-+				{ 1, 1, 6 },
-+				{ 1, 1, 7 },
-+			}"
-+
-+			device ref gbe off end
-+			device ref pcie_rp4 off end
-+			device ref pcie_rp7 on end # Broadcom BCM5761 Gigabit Ethernet
-+			device ref sata1 on
-+				register "sata_port_map" = "0x3b"
-+			end
-+		end
-+	end
-+end
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0013-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch b/config/coreboot/default/patches/0013-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
deleted file mode 100644
index 5944535f..00000000
--- a/config/coreboot/default/patches/0013-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
+++ /dev/null
@@ -1,442 +0,0 @@
-From bbcd6a7f09ee99f3b26b0931f1dcd70970242ee8 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Mon, 4 Mar 2024 18:05:43 -0700
-Subject: [PATCH 13/51] mb/dell: Add Latitude E5420 (Sandy Bridge)
-
-Mainboard is Krug 14". I do not physically have this system; someone
-with physical access to one sent me the output of autoport which I then
-modified to produce this port. I was also sent the VBT binary, which was
-obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running version
-A02 of the vendor firmware.
-
-This was originally tested and found to be working as a standalone board
-port in Libreboot, but this variant based port in upstream coreboot has
-not been tested.
-
-This can be internally flashed by sending a command to the EC, which
-causes the EC to pull the FDO pin low and the firmware to skip setting
-up any chipset based write protections [1]. The EC is the SMSC MEC5055,
-which seems to be compatible with the existing MEC5035 code.
-
-[1] https://gitlab.com/nic3-14159/dell-flash-unlock
-
-Change-Id: I0283653156083768e1fd451bcf539b4e028589f4
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/snb_ivb_latitude/Kconfig   |  10 +-
- .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
- .../snb_ivb_latitude/variants/e5420/data.vbt  | Bin 0 -> 6144 bytes
- .../variants/e5420/early_init.c               |  14 ++
- .../snb_ivb_latitude/variants/e5420/gpio.c    | 195 ++++++++++++++++++
- .../variants/e5420/hda_verb.c                 |  32 +++
- .../variants/e5420/overridetree.cb            |  39 ++++
- 7 files changed, 292 insertions(+), 1 deletion(-)
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/data.vbt
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-index 4e94a7ef80..e6a21ffb99 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-@@ -17,6 +17,11 @@ config BOARD_DELL_SNB_IVB_LATITUDE_COMMON
- 	select SYSTEM_TYPE_LAPTOP
- 	select USE_NATIVE_RAMINIT
- 
-+config BOARD_DELL_LATITUDE_E5420
-+	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
-+	select BOARD_ROMSIZE_KB_6144
-+	select SOUTHBRIDGE_INTEL_BD82X6X
-+
- config BOARD_DELL_LATITUDE_E5520
- 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
- 	select BOARD_ROMSIZE_KB_6144
-@@ -60,6 +65,7 @@ config MAINBOARD_DIR
- 	default "dell/snb_ivb_latitude"
- 
- config MAINBOARD_PART_NUMBER
-+	default "Latitude E5420" if BOARD_DELL_LATITUDE_E5420
- 	default "Latitude E5520" if BOARD_DELL_LATITUDE_E5520
- 	default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
- 	default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
-@@ -74,6 +80,7 @@ config USBDEBUG_HCD_INDEX
- 	default 2
- 
- config VARIANT_DIR
-+	default "e5420" if BOARD_DELL_LATITUDE_E5420
- 	default "e5520" if BOARD_DELL_LATITUDE_E5520
- 	default "e6420" if BOARD_DELL_LATITUDE_E6420
- 	default "e6520" if BOARD_DELL_LATITUDE_E6520
-@@ -82,7 +89,8 @@ config VARIANT_DIR
- 	default "e6530" if BOARD_DELL_LATITUDE_E6530
- 
- config VGA_BIOS_ID
--	default "8086,0116" if BOARD_DELL_LATITUDE_E6520
-+	default "8086,0116" if BOARD_DELL_LATITUDE_E6520 \
-+		|| BOARD_DELL_LATITUDE_E5420
- 	default "8086,0166" if BOARD_DELL_LATITUDE_E5530
- 	default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \
- 		|| BOARD_DELL_LATITUDE_E5520
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-index 7976691f21..a3fa2b1837 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-@@ -1,5 +1,8 @@
- ## SPDX-License-Identifier: GPL-2.0-only
- 
-+config BOARD_DELL_LATITUDE_E5420
-+	bool "Latitude E5420"
-+
- config BOARD_DELL_LATITUDE_E5520
- 	bool "Latitude E5520"
- 
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..98b82fe6110fd295b5749041ec7f8c084ace5f57
-GIT binary patch
-literal 6144
-zcmeHKeQZ-z6hE);wSBvNZ!2$ObQ^;MgV6zl*Rhp}BXnCCMZU^_r7jRwT!kfLo8?3H
-zk9)u(7?cb(hChhTM57@QFfmbMB!G!dNsO6BW5OSp5EGF^jHnTTdhUBI+h`e+1ft1q
-z^SfW?+;h)4_uO+|XEfEV$91)<gOArWE)OnSTD}Ug6?8a~vz+SmQn!4~y3N7b^|hPp
-zR<5aEfv-b8M00Lk251!oO|8(YA6XaeXzkt-Z)@Ee!_{@z#Fro^?DqN4SGjRIu8KYp
-zZEufuU@5MM@7jv%h;75FS}ezKv?JDzCH}d%tE)A-GuDb*+B%}~w%88r>}c;!*XQ5O
-z)OU7u$J@4U+lk)#GSW%c%c)v`%R6?`w)LIyu6bD7-j0o&X9qUMcEsYlW3BU4rZRvt
-zqAUpjf*qXuLCCsU0YM2I5@gB1WKd)f1+Yt?%HWd0DZxYumP(K<LxTif8A39+!KMl}
-z31FHG)7?qk5g>e?=ER{f^&}W<0k@mxff(?6+Stw+s6y%k1mM$cLk#^FWWI*9bE1GY
-z&VY9?WC1u#23^3^UYw5?H0x2S2gN`x18Fko6_x(#MKyuCU_<D!mEp$qO_An}#@>DV
-zdkf*li41yW3p$*0Oo3+63kO6S91*KwP#l2i4jnc)JkUirL^$k}VbH0;CBh#BS=OLf
-zW-yE3BRon75gG{_2~QIC5cUzCC%i)FCmbidM>tIwAPf>N5Pl?FC0r*+Sq!oXj!keQ
-zVKcyK>TL+gc7oLco$28+FpeeXkEP}_Sea=mk#IWUR^m$!BogvszLPu83FJm0k6K<l
-z$#$~YiXtY*GpHp#@FvHJ1UnBD*H%d+{_j24XE4nmBa*?5mOWiold28s3}>*}<HaeO
-z+1|-8g2)FCfkDZIdb-Ub);z0#;XEbPfGe?A72!{DAUg|$m+Z~(i@h9j4gtm611ni(
-z#u>ACcP}M4exU`*MKVwl5+t6JBpTkmm}xWflKUe~7}`!#%z#gAo{NxUrpDAndYktu
-zI0}VLU`J7^xmF1AFiz5S^uzp*DPI$%$qq!(ikh0kP+(GKzF|@N?Y%_#Vp@M+xHr$F
-z=%+18z`-fT%z)9-TS$~Dh@2yeN7!UIt0h`fWxUu`JvA_ra*8P48l%7KR0&c1;0R75
-z4f0oz(xQ3MWqz5>qW5M4tZWExHs8<H(e1G@4km@5wEzOOP^x<l`YmA|eKs6j3wl8B
-z%C%;uygh%<#kGZ{fymL+OlV0!-*T!V5IB>X@p!@CBU=7e{5^Jl{s7by`po-AJqM2l
-znk(=^0bHkF0rUw7)^7j;$=_UIs8`6P6b-;vPDZ#U9L)W1_PAYRDP9k~;5$stt5ZiV
-zD0>;i-?OlYY2}P9WVnfGos4xee2r=EGWHR}ADH$VV>cO=xU?!4TjIi)OMBYI_PX#b
-zm-eBHed5BOT-x6*W>;{IqAga~G6lCQT93k>Q}CpsomJR*1%FjEkv?fuT%c-8RklXO
-zU8;6KWk*zeU)4TW+1D!mrE0EhHZfbBeN{4S7X@Pig%};A99QTdA~wZruL*8y?K!jP
-zG5R*k=);S}Zn<T;W!Mxt`(!+z7_r@3LVpf|FESauM&4}+wqzXfba-zG>A}on(uzNF
-zyu>BcjA})C@bg%<;+Eh2;Sz4heFFCbZ@C{FrXMIbYzu>?Bi-|vZ}JSFU%JA>7$7et
-z0Yo%CnOVZm#ZA}4kWZOn15};h5*#OM3b+6vHzgruMP>=5MNJK1y42{YgveP-!j%#(
-z0rGe@8t%!=66Ti%K4|Gx=o7gFp83wQ;+s3H7+r^SKlpp3KKcr!3@|n;NCH_=qL=3T
-zq3WH?en`b+W-HR-fnrhw*9aZ%M}lHX7@H?E>!6wv_&YQFEHdA$%Z1R--yub>=c@p?
-z6@7Fc$&>sAxwiz{BE$1kb$K9Co=ozlA973y^i(^BM|EZ$$^y`0KyHiMJ%O*XbfEX1
-ziZaH>W(1pWL0bo|T!x__N$^$DpmxI=bL6WUK3JGyn?rw-qC4ZA$yGjIB}N(=ldD2O
-zAJ@bxp<qR-3lIv<!P~SE8r*#_Ckl?$0|1fZ>2>n}u*mUIYFd>}O_wuwBD^r9<#=!0
-X1LGbT_rSOZ#yv3ZfpHH!G!Og(1Xg~J
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c
-new file mode 100644
-index 0000000000..ff83db095b
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c
-@@ -0,0 +1,14 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+			| COMB_LPC_EN | COMA_LPC_EN);
-+	mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c
-new file mode 100644
-index 0000000000..f76b93d9f0
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c
-@@ -0,0 +1,195 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_NATIVE,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_GPIO,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_GPIO,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_NATIVE,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_GPIO,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio3 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio12 = GPIO_DIR_OUTPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_INPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+	.gpio30 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio12 = GPIO_LEVEL_HIGH,
-+	.gpio30 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_NATIVE,
-+	.gpio46 = GPIO_MODE_GPIO,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_NATIVE,
-+	.gpio50 = GPIO_MODE_GPIO,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_GPIO,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_GPIO,
-+	.gpio56 = GPIO_MODE_GPIO,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_OUTPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio46 = GPIO_DIR_OUTPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio50 = GPIO_DIR_OUTPUT,
-+	.gpio51 = GPIO_DIR_OUTPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio53 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio55 = GPIO_DIR_OUTPUT,
-+	.gpio56 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio34 = GPIO_LEVEL_LOW,
-+	.gpio37 = GPIO_LEVEL_LOW,
-+	.gpio46 = GPIO_LEVEL_HIGH,
-+	.gpio50 = GPIO_LEVEL_HIGH,
-+	.gpio51 = GPIO_LEVEL_LOW,
-+	.gpio55 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_NATIVE,
-+	.gpio69 = GPIO_MODE_NATIVE,
-+	.gpio70 = GPIO_MODE_NATIVE,
-+	.gpio71 = GPIO_MODE_NATIVE,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_GPIO,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio74 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c
-new file mode 100644
-index 0000000000..0bc6c35a63
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
-+	0x1028049b,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x1028049b),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0xd5a30130),
-+
-+	0x80862805,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb
-new file mode 100644
-index 0000000000..3f55bfd49d
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb
-@@ -0,0 +1,39 @@
-+## SPDX-License-Identifier: GPL-2.0-or-later
-+
-+chip northbridge/intel/sandybridge
-+	device domain 0 on
-+		subsystemid 0x1028 0x049b inherit
-+
-+		device ref igd on
-+			register "gpu_cpu_backlight" = "0x00000c31"
-+			register "gpu_pch_backlight" = "0x13121312"
-+		end
-+
-+		chip southbridge/intel/bd82x6x
-+			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 1, 0 }"
-+			register "usb_port_config" = "{
-+				{ 1, 1, 0 },
-+				{ 1, 1, 0 },
-+				{ 1, 1, 1 },
-+				{ 1, 1, 1 },
-+				{ 1, 1, 2 },
-+				{ 1, 1, 2 },
-+				{ 1, 1, 3 },
-+				{ 1, 1, 3 },
-+				{ 1, 1, 5 },
-+				{ 1, 1, 5 },
-+				{ 1, 1, 7 },
-+				{ 1, 1, 6 },
-+				{ 1, 1, 6 },
-+				{ 1, 1, 7 },
-+			}"
-+
-+			device ref gbe off end
-+			device ref pcie_rp4 off end
-+			device ref pcie_rp7 on end # Broadcom BCM5761 Gigabit Ethernet
-+			device ref sata1 on
-+				register "sata_port_map" = "0x3b"
-+			end
-+		end
-+	end
-+end
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0023-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch b/config/coreboot/default/patches/0013-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
similarity index 92%
rename from config/coreboot/default/patches/0023-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
rename to config/coreboot/default/patches/0013-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
index f9d80b9f..1b4f7327 100644
--- a/config/coreboot/default/patches/0023-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
+++ b/config/coreboot/default/patches/0013-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
@@ -1,7 +1,7 @@
-From d86824305f11bc684f1e91e3826158b8c7d7e0ee Mon Sep 17 00:00:00 2001
+From 1515f6f416a75ecf6de0615f30fc1c5c6696e4d8 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 6 Apr 2024 01:22:47 +0100
-Subject: [PATCH 23/51] nb/haswell: Fully disable iGPU when dGPU is used
+Subject: [PATCH 13/24] nb/haswell: Fully disable iGPU when dGPU is used
 
 My earlier patch disabled decode *and* disabled the iGPU itself, but
 a subsequent revision disabled only VGA decode. Upon revisiting, I
diff --git a/config/coreboot/default/patches/0025-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch b/config/coreboot/default/patches/0014-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
similarity index 97%
rename from config/coreboot/default/patches/0025-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
rename to config/coreboot/default/patches/0014-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
index ed620a3e..fe9c4731 100644
--- a/config/coreboot/default/patches/0025-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
+++ b/config/coreboot/default/patches/0014-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
@@ -1,7 +1,7 @@
-From 2fdd5bbb2bbec76c3c2238c4cd471b9b63073942 Mon Sep 17 00:00:00 2001
+From 7eb31625fc82a8f697a2f7972b24a4dd19effe5b Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 3 May 2024 11:03:32 -0600
-Subject: [PATCH 25/51] ec/dell/mec5035: Add S3 suspend SMI handler
+Subject: [PATCH 14/24] ec/dell/mec5035: Add S3 suspend SMI handler
 
 This is necessary for S3 resume to work on SNB and newer Dell Latitude
 laptops. If a command isn't sent, the EC cuts power to the DIMMs,
diff --git a/config/coreboot/default/patches/0014-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch b/config/coreboot/default/patches/0014-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch
deleted file mode 100644
index e8c46203..00000000
--- a/config/coreboot/default/patches/0014-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch
+++ /dev/null
@@ -1,435 +0,0 @@
-From cd6e699649459fa5ff2623018ccf3585eb3d3821 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Wed, 7 Feb 2024 15:23:46 -0700
-Subject: [PATCH 14/51] mb/dell: Add Latitude E6320 (Sandy Bridge)
-
-Mainboard is PAL70/LA-6611P. I do not physically have this system;
-someone with physical access to one sent me the output of autoport which
-I then modified to produce this port. I was also sent the VBT binary,
-which was obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running
-version A22 of the vendor firmware. This port has not been tested.
-
-The EC is the SMSC MEC5055, which seems to be compatible with the
-existing MEC5035 code. As with the other Dell systems with this EC, this
-board is assumed to be internally flashable using an EC command that
-tells it to pull the FDO pin low on the next boot, which also tells the
-vendor firmware to disable all write protections to the flash [1].
-
-[1] https://gitlab.com/nic3-14159/dell-flash-unlock
-
-Change-Id: I5905f8c6a8dbad56e03bdeedc2179600d0c4ba46
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/snb_ivb_latitude/Kconfig   |  11 +-
- .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
- .../snb_ivb_latitude/variants/e6320/data.vbt  | Bin 0 -> 6144 bytes
- .../variants/e6320/early_init.c               |  17 ++
- .../snb_ivb_latitude/variants/e6320/gpio.c    | 190 ++++++++++++++++++
- .../variants/e6320/hda_verb.c                 |  32 +++
- .../variants/e6320/overridetree.cb            |  35 ++++
- 7 files changed, 287 insertions(+), 1 deletion(-)
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/data.vbt
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-index e6a21ffb99..84ffe1d33a 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-@@ -27,6 +27,12 @@ config BOARD_DELL_LATITUDE_E5520
- 	select BOARD_ROMSIZE_KB_6144
- 	select SOUTHBRIDGE_INTEL_BD82X6X
- 
-+config BOARD_DELL_LATITUDE_E6320
-+	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
-+	select BOARD_ROMSIZE_KB_10240
-+	select MAINBOARD_USES_IFD_GBE_REGION
-+	select SOUTHBRIDGE_INTEL_BD82X6X
-+
- config BOARD_DELL_LATITUDE_E6420
- 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
- 	select BOARD_ROMSIZE_KB_10240
-@@ -67,6 +73,7 @@ config MAINBOARD_DIR
- config MAINBOARD_PART_NUMBER
- 	default "Latitude E5420" if BOARD_DELL_LATITUDE_E5420
- 	default "Latitude E5520" if BOARD_DELL_LATITUDE_E5520
-+	default "Latitude E6320" if BOARD_DELL_LATITUDE_E6320
- 	default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
- 	default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
- 	default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
-@@ -82,6 +89,7 @@ config USBDEBUG_HCD_INDEX
- config VARIANT_DIR
- 	default "e5420" if BOARD_DELL_LATITUDE_E5420
- 	default "e5520" if BOARD_DELL_LATITUDE_E5520
-+	default "e6320" if BOARD_DELL_LATITUDE_E6320
- 	default "e6420" if BOARD_DELL_LATITUDE_E6420
- 	default "e6520" if BOARD_DELL_LATITUDE_E6520
- 	default "e5530" if BOARD_DELL_LATITUDE_E5530
-@@ -93,7 +101,8 @@ config VGA_BIOS_ID
- 		|| BOARD_DELL_LATITUDE_E5420
- 	default "8086,0166" if BOARD_DELL_LATITUDE_E5530
- 	default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \
--		|| BOARD_DELL_LATITUDE_E5520
-+		|| BOARD_DELL_LATITUDE_E5520 \
-+		|| BOARD_DELL_LATITUDE_E6320
- 	default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
- 		|| BOARD_DELL_LATITUDE_E6530
- 
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-index a3fa2b1837..ef6a1329a9 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-@@ -6,6 +6,9 @@ config BOARD_DELL_LATITUDE_E5420
- config BOARD_DELL_LATITUDE_E5520
- 	bool "Latitude E5520"
- 
-+config BOARD_DELL_LATITUDE_E6320
-+	bool "Latitude E6320"
-+
- config BOARD_DELL_LATITUDE_E6420
- 	bool "Latitude E6420"
- 
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..471a9e29da639dd496f3ecebd5d0754a9045c00b
-GIT binary patch
-literal 6144
-zcmeHKeP|p-6#wn*-rZ(yH@R-odPzTgZEU>S#_pv}j2iKhT+^%8_DtJw21|4GP8*0x
-zyw;EYW49Xozz<Rt@ek1mic(N32r8oZ0U9lcR8a)~s33wLV8yCftLK~DJJWb)8w-j;
-z=J?H<nfK<+n>TOX?48xuwV5_`Zb)3w)w?dSc1`nTL|NF_SMw&<<)v%g#!cH2otrzi
-zb*<mneJMSLdC1iK_7#v-6w7R}+t1&W8P4wBo*&F!lcNn?)F-EqWZV#oQEb%`x-4^5
-zW@sogOik1`n9Wc#r82|0A!=-0LD!FFGrMwG+CDg($q(js(#Y`8?s79ubEJD@ba#I6
-znjO0++P#czvh8NBR?)iQUA%txNPhHO>Kq!PUMaJadUHE-`5SWCb4_6i;5Aj(6hQGK
-zcq^2uUt5sS5YSMiL+CJcs0#cVOdTN|K@D>?tkF=dqenwjM^Z-^K2z~&z+xRs!o^Jx
-zkUGd?>QtXw8V(I09OiMb0DZy>`=tO^#BCssw{}bkOnj=#Ic!~!6!J*{`jbEv5O4)-
-zg-UBlIa$c9Pg4C;0_-wq3t+dbZfn1wBi@zhNnWx()w{Vb-G8OC_m*478gTrX3U*a1
-zHr@y<Lcbct?Wzy^)OH+FC$S`8V@n`{QN~@2dxJU-1ucBe_>rOO78dFPXES1q3mHj9
-zFXKwa)r^}Mw=nKzJjj?}>}NdBc$G29IK=pr@de`u;}}D$5~yYbw&Hlf=OF0X?I=Y$
-z$D`mgy>}U$hl}G6m&PmXveHnY5DenC!g~=E3i?HIrEpyk>_(-IsVtEqUEoqxrDFdq
-zrYwhOv0o^NgW$OKN}=$7Z-w5*Vuv?T3~uuFGwP92?Qr8n0iQp=u*7rep9Q8dW#?ZI
-zFly1ww^^l*+YC6t16l_{g}tVVpVZ0fDk%5+`|+*688vr-<Lw_SRc^+avHI{BCpdYb
-z70yLEI0-45%t;z||GKzov+|VFW6hab&NAG9FD+h6sBu$cX`r0eJ%T`kvK4+(wT`0=
-z$fxKG+om?Ge1-EhbNc*Xjy1opKZSaiv-EL~GvOa&&bx~z##3W;F2{b=<HQ4!<1CFk
-z17i)$X+`=C=0udOPOx3$IjzopqwQzLr*jT4C)(jmj2>uYP8$M=#caX6OWA1Ez395U
-z%x<yAs)6-Ascr5<x*>CIZibyRlE~I0-ianVaz~q|EMlL7hc1U5w?}Kekws6fyy@`e
-z4NdX%L#2`A#c_N4ftGmuwbDo=incwf=WnBJk6)fYz%6Cmy>HwK$Y|iP`Y7sgjDPhQ
-zR|wv367k}1g)-G@kXq(X;{Bjt998b9{cpD9zGhOQ5%$4OSMtc2(<dx@0O}7_G+$WF
-zLYyaPtFT6d*e&Q$VLd0r%Yr@=*7rjEDyT7JwT8sSA<BiU8$)7mh@K2tFNMULA^I|8
-z{Sp#>gO(fCMTS^w(6xrO#}IcK^sHgMZis^heP>uIf6|z=%Cy#)Vxvjdo7U~7*k{rU
-zruB{~J}~KL(+X9Kxz*-5M>NNGSaIfXi19({d4mrk?K50@R0%Wn*PP9d(MMIzI2~RX
-z)(4h&8(YL@UyKJ*)4o${n5ZGd(hDf+)cv8sSBxWen|f*u<-sgt(u+U-bkd}Tj+5@9
-zJosfSdvPo8zGnluemJg=E7A{=N<Rc#KYYEg?^p`+_?~aU(kEmFus{DshA~iA(onLY
-zvIfpBJt;KWP4n8&`n1##c($WnDo|=?rlHBz&}36&HPWwp8op_i8c-**(TSd{Y{SZ?
-z_=^K$27e+q;^vRNU3~a=cd;V{%O=iuo*&xwXyg19${Ap0yO@a|N-<e^7iIClF{vUn
-z&4$y_V7MA)=E=%7n63u!J9FY$RK8hXHDE%%Lx$ZgX902-<9r|4lkx>QwFch>PUO1w
-z=6JffnB-kQ)VLb>sSZdDrI@U2!?HLA9Mlek!*k>;&jx<)xfnBiY^I6DRt*l*`n8ly
-zu!h)b?sRV1==Nf*Cw9&&i7n^9Nts>wk>adaY&E5OdW*A?iI}v+E6GGlsR<+#%jpl^
-zGz<Q^vpj>qhDjj3zr60Bgh=l{NzJp$x#fCR%*8!ZR?fC&JuvHmSr5#5VAcb(9+>sO
-IzvhA80TAzedH?_b
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c
-new file mode 100644
-index 0000000000..b0c4638858
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c
-@@ -0,0 +1,17 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+			| COMB_LPC_EN | COMA_LPC_EN);
-+	mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c
-new file mode 100644
-index 0000000000..61f01816c4
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c
-@@ -0,0 +1,190 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_NATIVE,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_NATIVE,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_NATIVE,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_GPIO,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_GPIO,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio16 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_INPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+	.gpio30 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio30 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_GPIO,
-+	.gpio46 = GPIO_MODE_NATIVE,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_GPIO,
-+	.gpio50 = GPIO_MODE_NATIVE,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_NATIVE,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_NATIVE,
-+	.gpio56 = GPIO_MODE_NATIVE,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_INPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio45 = GPIO_DIR_OUTPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio49 = GPIO_DIR_OUTPUT,
-+	.gpio51 = GPIO_DIR_INPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio34 = GPIO_LEVEL_HIGH,
-+	.gpio45 = GPIO_LEVEL_LOW,
-+	.gpio49 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_GPIO,
-+	.gpio69 = GPIO_MODE_GPIO,
-+	.gpio70 = GPIO_MODE_GPIO,
-+	.gpio71 = GPIO_MODE_GPIO,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_NATIVE,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio68 = GPIO_DIR_INPUT,
-+	.gpio69 = GPIO_DIR_INPUT,
-+	.gpio70 = GPIO_DIR_INPUT,
-+	.gpio71 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c
-new file mode 100644
-index 0000000000..2e3f7fa697
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
-+	0x10280492,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x10280492),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+	0x80862805,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb
-new file mode 100644
-index 0000000000..3bfe6b57ed
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb
-@@ -0,0 +1,35 @@
-+## SPDX-License-Identifier: GPL-2.0-or-later
-+
-+chip northbridge/intel/sandybridge
-+	device domain 0 on
-+		subsystemid 0x1028 0x0492 inherit
-+
-+		device ref igd on
-+			register "gpu_cpu_backlight" = "0x00000622"
-+			register "gpu_pch_backlight" = "0x13121312"
-+		end
-+
-+		chip southbridge/intel/bd82x6x
-+			register "usb_port_config" = "{
-+				{ 1, 1, 0 },
-+				{ 1, 0, 0 },
-+				{ 1, 1, 1 },
-+				{ 1, 0, 1 },
-+				{ 1, 1, 2 },
-+				{ 1, 1, 2 },
-+				{ 1, 1, 3 },
-+				{ 1, 1, 3 },
-+				{ 1, 0, 5 },
-+				{ 1, 0, 5 },
-+				{ 1, 1, 7 },
-+				{ 1, 1, 6 },
-+				{ 1, 0, 6 },
-+				{ 1, 0, 7 },
-+			}"
-+
-+			device ref sata1 on
-+				register "sata_port_map" = "0x3b"
-+			end
-+		end
-+	end
-+end
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0015-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch b/config/coreboot/default/patches/0015-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch
deleted file mode 100644
index e2be42c9..00000000
--- a/config/coreboot/default/patches/0015-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch
+++ /dev/null
@@ -1,438 +0,0 @@
-From a32431d5f7574ffa6391221c7740f1739203eaa7 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Fri, 8 Mar 2024 09:27:36 -0700
-Subject: [PATCH 15/51] mb/dell: Add Latitude E6220 (Sandy Bridge)
-
-Mainboard is codenamed Vida. I do not physically have this system;
-someone with physical access to one sent me the output of autoport which
-I then modified to produce this port. The VBT was obtained using
-intelvbttool while running version A14 (latest available version) of the
-vendor firmware.
-
-Tested and found to boot as part of a libreboot build based on upstream
-coreboot commit b7341da191 with additional patches, though these do not
-appear to affect SNB/IVB. The base E6430 patch was tested against
-coreboot main.
-
-The EC is the SMSC MEC5055, which seems to be compatible with the
-existing MEC5035 code. As with the other Dell systems with this EC, this
-board is assumed to be internally flashable using an EC command that
-tells it to pull the FDO pin low on the next boot, which also tells the
-vendor firmware to disable all write protections to the flash [1].
-
-[1] https://gitlab.com/nic3-14159/dell-flash-unlock
-
-Change-Id: I570023b0837521b75aac6d5652c74030c06b8a4c
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/snb_ivb_latitude/Kconfig   |   9 +
- .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
- .../snb_ivb_latitude/variants/e6220/data.vbt  | Bin 0 -> 3985 bytes
- .../variants/e6220/early_init.c               |  14 ++
- .../snb_ivb_latitude/variants/e6220/gpio.c    | 192 ++++++++++++++++++
- .../variants/e6220/hda_verb.c                 |  32 +++
- .../variants/e6220/overridetree.cb            |  37 ++++
- 7 files changed, 287 insertions(+)
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/data.vbt
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-index 84ffe1d33a..baa83baa41 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-@@ -27,6 +27,12 @@ config BOARD_DELL_LATITUDE_E5520
- 	select BOARD_ROMSIZE_KB_6144
- 	select SOUTHBRIDGE_INTEL_BD82X6X
- 
-+config BOARD_DELL_LATITUDE_E6220
-+	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
-+	select BOARD_ROMSIZE_KB_10240
-+	select MAINBOARD_USES_IFD_GBE_REGION
-+	select SOUTHBRIDGE_INTEL_BD82X6X
-+
- config BOARD_DELL_LATITUDE_E6320
- 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
- 	select BOARD_ROMSIZE_KB_10240
-@@ -73,6 +79,7 @@ config MAINBOARD_DIR
- config MAINBOARD_PART_NUMBER
- 	default "Latitude E5420" if BOARD_DELL_LATITUDE_E5420
- 	default "Latitude E5520" if BOARD_DELL_LATITUDE_E5520
-+	default "Latitude E6220" if BOARD_DELL_LATITUDE_E6220
- 	default "Latitude E6320" if BOARD_DELL_LATITUDE_E6320
- 	default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
- 	default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
-@@ -89,6 +96,7 @@ config USBDEBUG_HCD_INDEX
- config VARIANT_DIR
- 	default "e5420" if BOARD_DELL_LATITUDE_E5420
- 	default "e5520" if BOARD_DELL_LATITUDE_E5520
-+	default "e6220" if BOARD_DELL_LATITUDE_E6220
- 	default "e6320" if BOARD_DELL_LATITUDE_E6320
- 	default "e6420" if BOARD_DELL_LATITUDE_E6420
- 	default "e6520" if BOARD_DELL_LATITUDE_E6520
-@@ -102,6 +110,7 @@ config VGA_BIOS_ID
- 	default "8086,0166" if BOARD_DELL_LATITUDE_E5530
- 	default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \
- 		|| BOARD_DELL_LATITUDE_E5520 \
-+		|| BOARD_DELL_LATITUDE_E6220 \
- 		|| BOARD_DELL_LATITUDE_E6320
- 	default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
- 		|| BOARD_DELL_LATITUDE_E6530
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-index ef6a1329a9..349ee7f79e 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-@@ -6,6 +6,9 @@ config BOARD_DELL_LATITUDE_E5420
- config BOARD_DELL_LATITUDE_E5520
- 	bool "Latitude E5520"
- 
-+config BOARD_DELL_LATITUDE_E6220
-+	bool "Latitude E6220"
-+
- config BOARD_DELL_LATITUDE_E6320
- 	bool "Latitude E6320"
- 
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..548075a74500b5d159108089ee29cff802d07db7
-GIT binary patch
-literal 3985
-zcmdT{eP|p-6#wn*-rZ(yH@R-odPzTgZQ6LXjonL|7&YQ0xu#d`$C=h}21|4GP8*0x
-zyjE@hv0Dv(P?c0g{G(_DMJZ@22r8oZ0U9lcR8a)~s33wOSg|T<^?b8?XBzL?#)6`A
-z{N~Nfd-LYan>TOv7WZ{+rcIq264!S1u1&02-MpSC3mf}u-r~BvbgkXEX=|c$bLZBs
-zbsM{{q9-s1nVR3f2C|A`nJsqvC7UwC+1=angV`H%w4sao<P?&OTVpYbtz1OwGuLN^
-zhBCv{M16zV3^h|KGn^Zu#@6L@%V;*UGnb`pgTtBpU~UJE3=i!tH{%>fx<^KL=Lc`x
-zzLTQeOW7vdZsuwwtsUOU>vxajM=zqzp&{y(GCQa@w<DLoHJ81}6s7=PS9MJR6hDG@
-zLaF+#1qlrS4OKdX4nv2kz^}p75z-OVFk8cF4b?h&G(>eIb%fzF6`uwy)UhaB+ynus
-zBRr-~^|__t=m5fD9tR81r@XLV3UEc-2I6>o`;@@MXS$rj)&)r+pA?|K2vh+9SHM=N
-zw3d{Uh1~iK)juV`E`v4?cFU@^_DehBU5TFLmFrTyoBPuJ*ExIdxO1!lC!eceSG8i}
-z&A<Zmt5Mvo`mkSZ$5C|>ivl*T2}Cf;*vEJvsN-nR!WWDm8M<y^zAkV9BgVLlk!18T
-zu4CN5*u}VmaUbIm#suRa;|0cRj7i2(#%GK#8OIsFFtjRxYDQoSP8NI)g09_;Qlzsy
-z3O>^Zmcltu96wMRudvHXLxn;xh~EqEM^Gr}m&=vHbwRKjl{%)fM2d8tOI4MM{l!dK
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-zqML8CN*#9@aDs=m4ulGOO%*?>lhsvF9`g6&TYocZ_JQN=A1hUE#+kAD@E9jJd7%}~
-zMLIYMDVoel8h1}$+_YJF%DJ&-O)X~`ZoroouO-yDsj)OrPU{{+ph4LJKdD;Bi3a3T
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-z*kjeex}MZl_aWVoxhXfp&Ur~>>k;onlO4II%~KY!FT|r)!;agdwcf~rXIAVwc6CEj
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-z3BN(h4C``3tTE^&!`fqrdks2dSZ^5Oh(X^Omdc+rCapBB)uz~J(k-TSw<-3U^rC6K
-zYl;s|`q{KX)nazFdEs%*@f}l~SsY?~kb2(WgGl=fm!43<O#L+%@MH9Gl`~Gq=7;rx
-zMc&31@YxsRfz-6`>>4I&2(k1$iaK?FYVZ}~h~1{1T|;>=%b4`yk3XF>siEVHyC@HS
-z8OvVW%DeB`K&~H7>f?&^gQU_A0oM<l8+N5oZ4)iV>;p0b*k61j!x*S5X(-unS`9rZ
-zG}=vb+R*x})DSq-Q7;uJwKLPuG`Ej6G}#nch4dSqhHo0B2Gq%HbgCyS+pwZ3{?fph
-z!Jo*Dxcw7v7a#rIU2IRmVn4KE$x~88+a7J4zd|_!%xo9z$+P;Q6qA*AQ5FvzlPW^f
-zY&aJUhO1#_o~&$x>1qJKGpC+K<(u_&1197<WZ2zu79e*q&i9c$DPNGYYw%s_L~d?x
-zj;EW8N#6BCjjMs5>VVWxipk10ERAEpLG3^|JWI~<Y~c5vi!sB;W|~-R<=`-_TSLhN
-zYlyAlPUkfn-CnHq)Xv2vv1R->DYG*_Qk)fwt)g^KZ*f*K5tEj9C7Ea`HGyPe8U4wd
-nX2Iz@%Q6UTm;}-X%j^D0i1fiT)I6)4TdrsMY}`L(<y7krryzQ}
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c
-new file mode 100644
-index 0000000000..ff83db095b
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c
-@@ -0,0 +1,14 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+			| COMB_LPC_EN | COMA_LPC_EN);
-+	mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c
-new file mode 100644
-index 0000000000..2306e4cf0a
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c
-@@ -0,0 +1,192 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_GPIO,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_NATIVE,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_NATIVE,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_GPIO,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_GPIO,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio1 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio16 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_INPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+	.gpio30 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio30 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio1 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_GPIO,
-+	.gpio46 = GPIO_MODE_NATIVE,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_GPIO,
-+	.gpio50 = GPIO_MODE_NATIVE,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_NATIVE,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_NATIVE,
-+	.gpio56 = GPIO_MODE_NATIVE,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_INPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio45 = GPIO_DIR_OUTPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio49 = GPIO_DIR_OUTPUT,
-+	.gpio51 = GPIO_DIR_INPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio34 = GPIO_LEVEL_HIGH,
-+	.gpio45 = GPIO_LEVEL_LOW,
-+	.gpio49 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_GPIO,
-+	.gpio69 = GPIO_MODE_GPIO,
-+	.gpio70 = GPIO_MODE_GPIO,
-+	.gpio71 = GPIO_MODE_GPIO,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_NATIVE,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio68 = GPIO_DIR_INPUT,
-+	.gpio69 = GPIO_DIR_INPUT,
-+	.gpio70 = GPIO_DIR_INPUT,
-+	.gpio71 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c
-new file mode 100644
-index 0000000000..0c69f0bd0e
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76e7,	/* Codec Vendor / Device ID: IDT */
-+	0x102804a9,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x102804a9),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+	0x80862805,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb
-new file mode 100644
-index 0000000000..9faf27e27b
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb
-@@ -0,0 +1,37 @@
-+## SPDX-License-Identifier: GPL-2.0-or-later
-+
-+chip northbridge/intel/sandybridge
-+	device domain 0 on
-+		subsystemid 0x1028 0x04a9 inherit
-+
-+		device ref igd on
-+			register "gpu_cpu_backlight" = "0x0000046a"
-+			register "gpu_pch_backlight" = "0x13121312"
-+		end
-+
-+		chip southbridge/intel/bd82x6x
-+			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
-+			register "usb_port_config" = "{
-+				{ 1, 1, 0 },
-+				{ 1, 0, 0 },
-+				{ 1, 1, 1 },
-+				{ 1, 0, 1 },
-+				{ 1, 1, 2 },
-+				{ 1, 1, 2 },
-+				{ 1, 1, 3 },
-+				{ 1, 1, 3 },
-+				{ 1, 0, 5 },
-+				{ 1, 0, 5 },
-+				{ 1, 1, 7 },
-+				{ 1, 1, 6 },
-+				{ 1, 0, 6 },
-+				{ 1, 0, 7 },
-+			}"
-+
-+			device ref pcie_rp4 off end
-+			device ref sata1 on
-+				register "sata_port_map" = "0x3b"
-+			end
-+		end
-+	end
-+end
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0026-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch b/config/coreboot/default/patches/0015-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
similarity index 93%
rename from config/coreboot/default/patches/0026-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
rename to config/coreboot/default/patches/0015-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
index fe9034b0..7bc6b3a1 100644
--- a/config/coreboot/default/patches/0026-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
+++ b/config/coreboot/default/patches/0015-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
@@ -1,7 +1,7 @@
-From ce7d65790b9b8656ebbaa0ca715adff6a9c25588 Mon Sep 17 00:00:00 2001
+From 961814da316a7bd760cd4aa3acd8e176a9ff2cf1 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 4 May 2024 02:00:53 +0100
-Subject: [PATCH 26/51] nb/haswell: lock policy regs when disabling IOMMU
+Subject: [PATCH 15/24] nb/haswell: lock policy regs when disabling IOMMU
 
 Angel Pons told me I should do it. See comments here:
 https://review.coreboot.org/c/coreboot/+/81016
diff --git a/config/coreboot/default/patches/0016-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch b/config/coreboot/default/patches/0016-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch
deleted file mode 100644
index 7d2133ef..00000000
--- a/config/coreboot/default/patches/0016-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch
+++ /dev/null
@@ -1,436 +0,0 @@
-From 0889cc6b6f62cba616feff5ae8558be31f298069 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Fri, 8 Mar 2024 09:33:03 -0700
-Subject: [PATCH 16/51] mb/dell: Add Latitude E6330 (Ivy Bridge)
-
-Mainboard is QAL70/LA-7741P. I do not physically have this system;
-someone with physical access to one sent me the output of autoport which
-I then modified to produce this port. I was also sent the VBT binary,
-which was obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running
-version A21 of the vendor firmware. This port has not been tested.
-
-The EC is the SMSC MEC5055, which seems to be compatible with the
-existing MEC5035 code. As with the other Dell systems with this EC, this
-board is assumed to be internally flashable using an EC command that
-tells it to pull the FDO pin low on the next boot, which also tells the
-vendor firmware to disable all write protections to the flash [1].
-
-[1] https://gitlab.com/nic3-14159/dell-flash-unlock
-
-Change-Id: I827826e9ff8a9a534c50250458b399104478e06c
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/snb_ivb_latitude/Kconfig   |  11 +-
- .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
- .../snb_ivb_latitude/variants/e6330/data.vbt  | Bin 0 -> 6144 bytes
- .../variants/e6330/early_init.c               |  14 ++
- .../snb_ivb_latitude/variants/e6330/gpio.c    | 192 ++++++++++++++++++
- .../variants/e6330/hda_verb.c                 |  32 +++
- .../variants/e6330/overridetree.cb            |  37 ++++
- 7 files changed, 288 insertions(+), 1 deletion(-)
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/data.vbt
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-index baa83baa41..49bf225fe2 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-@@ -56,6 +56,12 @@ config BOARD_DELL_LATITUDE_E5530
- 	select BOARD_ROMSIZE_KB_12288
- 	select SOUTHBRIDGE_INTEL_C216
- 
-+config BOARD_DELL_LATITUDE_E6330
-+	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
-+	select BOARD_ROMSIZE_KB_12288
-+	select MAINBOARD_USES_IFD_GBE_REGION
-+	select SOUTHBRIDGE_INTEL_C216
-+
- config BOARD_DELL_LATITUDE_E6430
- 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
- 	select BOARD_ROMSIZE_KB_12288
-@@ -84,6 +90,7 @@ config MAINBOARD_PART_NUMBER
- 	default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
- 	default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
- 	default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
-+	default "Latitude E6330" if BOARD_DELL_LATITUDE_E6330
- 	default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
- 	default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
- 
-@@ -101,13 +108,15 @@ config VARIANT_DIR
- 	default "e6420" if BOARD_DELL_LATITUDE_E6420
- 	default "e6520" if BOARD_DELL_LATITUDE_E6520
- 	default "e5530" if BOARD_DELL_LATITUDE_E5530
-+	default "e6330" if BOARD_DELL_LATITUDE_E6330
- 	default "e6430" if BOARD_DELL_LATITUDE_E6430
- 	default "e6530" if BOARD_DELL_LATITUDE_E6530
- 
- config VGA_BIOS_ID
- 	default "8086,0116" if BOARD_DELL_LATITUDE_E6520 \
- 		|| BOARD_DELL_LATITUDE_E5420
--	default "8086,0166" if BOARD_DELL_LATITUDE_E5530
-+	default "8086,0166" if BOARD_DELL_LATITUDE_E5530 \
-+		|| BOARD_DELL_LATITUDE_E6330
- 	default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \
- 		|| BOARD_DELL_LATITUDE_E5520 \
- 		|| BOARD_DELL_LATITUDE_E6220 \
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-index 349ee7f79e..d6fc8eb224 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-@@ -21,6 +21,9 @@ config BOARD_DELL_LATITUDE_E6520
- config BOARD_DELL_LATITUDE_E5530
- 	bool "Latitude E5530"
- 
-+config BOARD_DELL_LATITUDE_E6330
-+	bool "Latitude E6330"
-+
- config BOARD_DELL_LATITUDE_E6430
- 	bool "Latitude E6430"
- 
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..18856746656058651c571ecbb3708e0543b19d62
-GIT binary patch
-literal 6144
-zcmeHKU2GiH75-*tc6WAmW_LYygMSkDB*E^Q*zv5f7dLg)@$NQV2a{}!yImnfyvQ4D
-z;n-$v0!RpNi<_o@ktI-@2a590stC0zRi%iRR%stvi&hAs3R<K}X~hFddB_6@s8W`5
-zXJ!q~E{TOme<a`8@BW;7?l<?GIp@yo&H2<M-FZ0GKbBAR-Ekx}HvVOrhK1*2?{QsU
-zQe#K%JeC=q96gpAKa#$keu^D99ee*0FfB=@F_0J<9-Ch-&BZ5r1T6`{$;1%Fm+qfk
-zTr5pfAz@KB*NGlFzEGx2aqh%IxkQOuX*`{wy~+KQo+-}XSE7aaxko77OBtFgoh;4K
-z(#-7f<x+WxmKSK)vQFgtt^L+?s+Z<V57E7|^TqOPX{mn0n<VLl#Yf7s_suL*Jl#VB
-zmSyz~ScwEVTc-3vd2v6D&dt$;&{?91(o(5>vNXNl&<qW@AghW5NPYw#ha~-b0Dc7_
-z6}t(eHgpwn6<HNi1Vcp^p-07-iXve~MTs!0A_ku!`4nKciajxJYXsOYuuT4N%smA!
-zPazgl&bNRSrvAz|_6r3+B;r1=!7D;RUUw8Ke+vNt7E3`(BA-woPvJFBK^3Gzfh4Nk
-zOX!J0PJNB)Mk&Z_i?S2ez+iItz=)m79LydX&rM9`3wPaJ`T92=Uv0;g-!<4*M6z%+
-z*omwb#VI+CU&%iFS{_DGS;sE}7G4juqRMCww!+k6=+abJj4v>Dsr*z_6HAP5GJeST
-znX2JD;{xLa#;c6KGychVn-L6YXkv6Qx)}Y8&ok1DI~ZSM6dCt39%QUAzRh@o@gqjy
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-z*H2<VyY>2;juB|7F+k?y(_2~3@STqQ@f^sqD2c8g3x>ciM%siMq~;pKwfE57kw2K@
-z!-ZN0QTVOP@aA5@fEGKjy2+D`t?2KzpPyRQ`JcmHJoc(<#h<UT;@W$t_d{|;S>vyF
-zewtgef*II~y;k>*B!+(8*blXsY-~kcJa9zG2yfcMCt+|-0ex$pY`h1<*#rEv=~*<+
-ztV``Um!q33-Aap9fUshX^N~GS2@X3^U9+MwgYQ74^?~6&yU^#oY#cvC9R_}P2d<wN
-zJvOE)Xr7A2n#3x14}2_g(YN^0+oYDbb#|V{ze3pzGb9FiF#6Ra&L}bT(ZOvswS7RY
-zxLjWFRwWXHR5&={t;%K+Vkd6NX2iF<SF)LXv@y472OmG!_W%Ni*ZDuev-S0%b!dfW
-wz4{IL!+uT9t2XI4@_L@?Ri*bc_<n8A+wHaowmq=zfo%_LdtloGpN<DU00~N<ApigX
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c
-new file mode 100644
-index 0000000000..ff83db095b
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c
-@@ -0,0 +1,14 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+			| KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+			| COMB_LPC_EN | COMA_LPC_EN);
-+	mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c
-new file mode 100644
-index 0000000000..777570765a
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c
-@@ -0,0 +1,192 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_GPIO,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_GPIO,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_NATIVE,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_GPIO,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_NATIVE,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio1 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio3 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio16 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_INPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_OUTPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio28 = GPIO_LEVEL_LOW,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+	.gpio30 = GPIO_RESET_RSMRST,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio13 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_GPIO,
-+	.gpio46 = GPIO_MODE_NATIVE,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_GPIO,
-+	.gpio50 = GPIO_MODE_NATIVE,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_NATIVE,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_NATIVE,
-+	.gpio56 = GPIO_MODE_NATIVE,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_INPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio45 = GPIO_DIR_OUTPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio49 = GPIO_DIR_INPUT,
-+	.gpio51 = GPIO_DIR_INPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio34 = GPIO_LEVEL_HIGH,
-+	.gpio45 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_GPIO,
-+	.gpio69 = GPIO_MODE_GPIO,
-+	.gpio70 = GPIO_MODE_GPIO,
-+	.gpio71 = GPIO_MODE_GPIO,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_NATIVE,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio68 = GPIO_DIR_INPUT,
-+	.gpio69 = GPIO_DIR_INPUT,
-+	.gpio70 = GPIO_DIR_INPUT,
-+	.gpio71 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c
-new file mode 100644
-index 0000000000..804733b172
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76df,	/* Codec Vendor / Device ID: IDT */
-+	0x10280533,	/* Subsystem ID */
-+	11,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x10280533),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+	0x80862806,	/* Codec Vendor / Device ID: Intel */
-+	0x80860101,	/* Subsystem ID */
-+	4,		/* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb
-new file mode 100644
-index 0000000000..4125159367
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb
-@@ -0,0 +1,37 @@
-+## SPDX-License-Identifier: GPL-2.0-or-later
-+
-+chip northbridge/intel/sandybridge
-+	device domain 0 on
-+		subsystemid 0x1028 0x0533 inherit
-+
-+		device ref igd on
-+			register "gpu_cpu_backlight" = "0x00001312"
-+			register "gpu_pch_backlight" = "0x13121312"
-+		end
-+
-+		chip southbridge/intel/bd82x6x
-+			register "usb_port_config" = "{
-+				{ 1, 2, 0 },
-+				{ 1, 0, 0 },
-+				{ 1, 0, 1 },
-+				{ 1, 1, 1 },
-+				{ 1, 1, 2 },
-+				{ 1, 1, 2 },
-+				{ 1, 2, 3 },
-+				{ 1, 2, 3 },
-+				{ 1, 2, 4 },
-+				{ 1, 1, 4 },
-+				{ 1, 1, 5 },
-+				{ 1, 1, 5 },
-+				{ 1, 2, 6 },
-+				{ 1, 0, 6 },
-+			}"
-+
-+			device ref xhci on
-+				register "superspeed_capable_ports" = "0x0000000f"
-+				register "xhci_overcurrent_mapping" = "0x00000c03"
-+				register "xhci_switchable_ports" = "0x0000000f"
-+			end
-+		end
-+	end
-+end
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch b/config/coreboot/default/patches/0016-nb-intel-gm45-Make-DDR2-raminit-work.patch
similarity index 98%
rename from config/coreboot/default/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch
rename to config/coreboot/default/patches/0016-nb-intel-gm45-Make-DDR2-raminit-work.patch
index 28fc679f..d024045f 100644
--- a/config/coreboot/default/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch
+++ b/config/coreboot/default/patches/0016-nb-intel-gm45-Make-DDR2-raminit-work.patch
@@ -1,7 +1,7 @@
-From c6181fe0c8b58cb5a4523d5763fc5fcdf61b3f10 Mon Sep 17 00:00:00 2001
+From 24e8c088fbe14b598e588383d331f06f21d87190 Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Mon, 10 May 2021 22:40:59 +0200
-Subject: [PATCH 27/51] nb/intel/gm45: Make DDR2 raminit work
+Subject: [PATCH 16/24] nb/intel/gm45: Make DDR2 raminit work
 
 List of changes:
  - Update some timing and ODT values
diff --git a/config/coreboot/default/patches/0017-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch b/config/coreboot/default/patches/0017-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch
deleted file mode 100644
index 412b8471..00000000
--- a/config/coreboot/default/patches/0017-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch
+++ /dev/null
@@ -1,440 +0,0 @@
-From 84d7f3201eb4492acd7d290a02d19c4850c85791 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Thu, 26 Oct 2017 21:26:43 +0800
-Subject: [PATCH 17/51] mb/dell: Add Latitude E6230 (Ivy Bridge)
-
-This was adapted from CB:22693 from Iru Cai, which was based on
-autoport. I do not physically have this system. Someone with physical
-access to an E6230 running version A11 of the vendor firmware sent me
-the VBT after running the command `intelvbttool --inlegacy --outvbt
-data.vbt`. This new version of the port has not yet been tested.
-
-The EC is the SMSC MEC5055, which seems to be compatible with the
-existing MEC5035 code. As with the other Dell systems with this EC, this
-board is assumed to be internally flashable using an EC command that
-tells it to pull the FDO pin low on the next boot, which also tells the
-vendor firmware to disable all write protections to the flash [1].
-
-[1] https://gitlab.com/nic3-14159/dell-flash-unlock
-
-Original-Change-Id: I8cdc01e902e670310628809416290045c2102340
-Change-Id: I32927beea7c29b96a851ab77ed15b0160f16d369
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/snb_ivb_latitude/Kconfig   |  11 +-
- .../dell/snb_ivb_latitude/Kconfig.name        |   3 +
- .../snb_ivb_latitude/variants/e6230/data.vbt  | Bin 0 -> 4280 bytes
- .../variants/e6230/early_init.c               |  12 ++
- .../snb_ivb_latitude/variants/e6230/gpio.c    | 193 ++++++++++++++++++
- .../variants/e6230/hda_verb.c                 |  32 +++
- .../variants/e6230/overridetree.cb            |  40 ++++
- 7 files changed, 290 insertions(+), 1 deletion(-)
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/data.vbt
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c
- create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-index 49bf225fe2..f6e097930b 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
-@@ -56,6 +56,12 @@ config BOARD_DELL_LATITUDE_E5530
- 	select BOARD_ROMSIZE_KB_12288
- 	select SOUTHBRIDGE_INTEL_C216
- 
-+config BOARD_DELL_LATITUDE_E6230
-+	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
-+	select BOARD_ROMSIZE_KB_12288
-+	select MAINBOARD_USES_IFD_GBE_REGION
-+	select SOUTHBRIDGE_INTEL_C216
-+
- config BOARD_DELL_LATITUDE_E6330
- 	select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
- 	select BOARD_ROMSIZE_KB_12288
-@@ -90,6 +96,7 @@ config MAINBOARD_PART_NUMBER
- 	default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
- 	default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
- 	default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
-+	default "Latitude E6230" if BOARD_DELL_LATITUDE_E6230
- 	default "Latitude E6330" if BOARD_DELL_LATITUDE_E6330
- 	default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
- 	default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
-@@ -108,6 +115,7 @@ config VARIANT_DIR
- 	default "e6420" if BOARD_DELL_LATITUDE_E6420
- 	default "e6520" if BOARD_DELL_LATITUDE_E6520
- 	default "e5530" if BOARD_DELL_LATITUDE_E5530
-+	default "e6230" if BOARD_DELL_LATITUDE_E6230
- 	default "e6330" if BOARD_DELL_LATITUDE_E6330
- 	default "e6430" if BOARD_DELL_LATITUDE_E6430
- 	default "e6530" if BOARD_DELL_LATITUDE_E6530
-@@ -121,7 +129,8 @@ config VGA_BIOS_ID
- 		|| BOARD_DELL_LATITUDE_E5520 \
- 		|| BOARD_DELL_LATITUDE_E6220 \
- 		|| BOARD_DELL_LATITUDE_E6320
--	default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
-+	default "8086,0166" if BOARD_DELL_LATITUDE_E6230 \
-+		|| BOARD_DELL_LATITUDE_E6430 \
- 		|| BOARD_DELL_LATITUDE_E6530
- 
- endif
-diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-index d6fc8eb224..cb7bbd5cdb 100644
---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
-@@ -21,6 +21,9 @@ config BOARD_DELL_LATITUDE_E6520
- config BOARD_DELL_LATITUDE_E5530
- 	bool "Latitude E5530"
- 
-+config BOARD_DELL_LATITUDE_E6230
-+	bool "Latitude E6230"
-+
- config BOARD_DELL_LATITUDE_E6330
- 	bool "Latitude E6330"
- 
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..45ce8f435eea647a0bddaab3fd1e9282c87afc66
-GIT binary patch
-literal 4280
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-zt*M!5u?i4YtZ+WECo6$LJF06|G-mMZskGiV*lQJf-ItB+hltI<?{5E<^P=0rL<P+g
-z(P)!c<?MlvMK0O~UwZ4*;x|ms(&&#Vn_-4{KM#g~a=;$N2QD7mSX0{t<cf>sId@e&
-z-cN<SWA3VKCN6g3lx#+PySpWu*+pw}>vr(fgI)K*zkikg6TDJi?^}ghc*U*%A%EGg
-Y$$8Z}9a~<{Q@y10T!W`-d%n2+Kj)*Kg#Z8m
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c
-new file mode 100644
-index 0000000000..24c1b32467
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+	pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN);
-+	mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c
-new file mode 100644
-index 0000000000..c07e4b1c56
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c
-@@ -0,0 +1,193 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+	.gpio0 = GPIO_MODE_GPIO,
-+	.gpio1 = GPIO_MODE_GPIO,
-+	.gpio2 = GPIO_MODE_GPIO,
-+	.gpio3 = GPIO_MODE_GPIO,
-+	.gpio4 = GPIO_MODE_GPIO,
-+	.gpio5 = GPIO_MODE_NATIVE,
-+	.gpio6 = GPIO_MODE_GPIO,
-+	.gpio7 = GPIO_MODE_GPIO,
-+	.gpio8 = GPIO_MODE_GPIO,
-+	.gpio9 = GPIO_MODE_NATIVE,
-+	.gpio10 = GPIO_MODE_NATIVE,
-+	.gpio11 = GPIO_MODE_NATIVE,
-+	.gpio12 = GPIO_MODE_NATIVE,
-+	.gpio13 = GPIO_MODE_GPIO,
-+	.gpio14 = GPIO_MODE_GPIO,
-+	.gpio15 = GPIO_MODE_GPIO,
-+	.gpio16 = GPIO_MODE_GPIO,
-+	.gpio17 = GPIO_MODE_GPIO,
-+	.gpio18 = GPIO_MODE_NATIVE,
-+	.gpio19 = GPIO_MODE_GPIO,
-+	.gpio20 = GPIO_MODE_NATIVE,
-+	.gpio21 = GPIO_MODE_GPIO,
-+	.gpio22 = GPIO_MODE_GPIO,
-+	.gpio23 = GPIO_MODE_NATIVE,
-+	.gpio24 = GPIO_MODE_GPIO,
-+	.gpio25 = GPIO_MODE_NATIVE,
-+	.gpio26 = GPIO_MODE_NATIVE,
-+	.gpio27 = GPIO_MODE_GPIO,
-+	.gpio28 = GPIO_MODE_GPIO,
-+	.gpio29 = GPIO_MODE_GPIO,
-+	.gpio30 = GPIO_MODE_NATIVE,
-+	.gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+	.gpio0 = GPIO_DIR_INPUT,
-+	.gpio1 = GPIO_DIR_INPUT,
-+	.gpio2 = GPIO_DIR_INPUT,
-+	.gpio3 = GPIO_DIR_INPUT,
-+	.gpio4 = GPIO_DIR_INPUT,
-+	.gpio6 = GPIO_DIR_INPUT,
-+	.gpio7 = GPIO_DIR_INPUT,
-+	.gpio8 = GPIO_DIR_INPUT,
-+	.gpio13 = GPIO_DIR_INPUT,
-+	.gpio14 = GPIO_DIR_INPUT,
-+	.gpio15 = GPIO_DIR_INPUT,
-+	.gpio16 = GPIO_DIR_INPUT,
-+	.gpio17 = GPIO_DIR_OUTPUT,
-+	.gpio19 = GPIO_DIR_INPUT,
-+	.gpio21 = GPIO_DIR_INPUT,
-+	.gpio22 = GPIO_DIR_INPUT,
-+	.gpio24 = GPIO_DIR_INPUT,
-+	.gpio27 = GPIO_DIR_INPUT,
-+	.gpio28 = GPIO_DIR_OUTPUT,
-+	.gpio29 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+	.gpio17 = GPIO_LEVEL_HIGH,
-+	.gpio28 = GPIO_LEVEL_LOW,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+	.gpio30 = GPIO_RESET_RSMRST,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+	.gpio0 = GPIO_INVERT,
-+	.gpio8 = GPIO_INVERT,
-+	.gpio13 = GPIO_INVERT,
-+	.gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+	.gpio32 = GPIO_MODE_NATIVE,
-+	.gpio33 = GPIO_MODE_GPIO,
-+	.gpio34 = GPIO_MODE_GPIO,
-+	.gpio35 = GPIO_MODE_GPIO,
-+	.gpio36 = GPIO_MODE_GPIO,
-+	.gpio37 = GPIO_MODE_GPIO,
-+	.gpio38 = GPIO_MODE_GPIO,
-+	.gpio39 = GPIO_MODE_GPIO,
-+	.gpio40 = GPIO_MODE_NATIVE,
-+	.gpio41 = GPIO_MODE_NATIVE,
-+	.gpio42 = GPIO_MODE_NATIVE,
-+	.gpio43 = GPIO_MODE_NATIVE,
-+	.gpio44 = GPIO_MODE_NATIVE,
-+	.gpio45 = GPIO_MODE_GPIO,
-+	.gpio46 = GPIO_MODE_NATIVE,
-+	.gpio47 = GPIO_MODE_NATIVE,
-+	.gpio48 = GPIO_MODE_GPIO,
-+	.gpio49 = GPIO_MODE_GPIO,
-+	.gpio50 = GPIO_MODE_NATIVE,
-+	.gpio51 = GPIO_MODE_GPIO,
-+	.gpio52 = GPIO_MODE_GPIO,
-+	.gpio53 = GPIO_MODE_NATIVE,
-+	.gpio54 = GPIO_MODE_GPIO,
-+	.gpio55 = GPIO_MODE_NATIVE,
-+	.gpio56 = GPIO_MODE_NATIVE,
-+	.gpio57 = GPIO_MODE_GPIO,
-+	.gpio58 = GPIO_MODE_NATIVE,
-+	.gpio59 = GPIO_MODE_NATIVE,
-+	.gpio60 = GPIO_MODE_GPIO,
-+	.gpio61 = GPIO_MODE_NATIVE,
-+	.gpio62 = GPIO_MODE_NATIVE,
-+	.gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+	.gpio33 = GPIO_DIR_INPUT,
-+	.gpio34 = GPIO_DIR_OUTPUT,
-+	.gpio35 = GPIO_DIR_INPUT,
-+	.gpio36 = GPIO_DIR_INPUT,
-+	.gpio37 = GPIO_DIR_INPUT,
-+	.gpio38 = GPIO_DIR_INPUT,
-+	.gpio39 = GPIO_DIR_INPUT,
-+	.gpio45 = GPIO_DIR_OUTPUT,
-+	.gpio48 = GPIO_DIR_INPUT,
-+	.gpio49 = GPIO_DIR_INPUT,
-+	.gpio51 = GPIO_DIR_INPUT,
-+	.gpio52 = GPIO_DIR_INPUT,
-+	.gpio54 = GPIO_DIR_INPUT,
-+	.gpio57 = GPIO_DIR_INPUT,
-+	.gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+	.gpio34 = GPIO_LEVEL_HIGH,
-+	.gpio45 = GPIO_LEVEL_LOW,
-+	.gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+	.gpio64 = GPIO_MODE_NATIVE,
-+	.gpio65 = GPIO_MODE_NATIVE,
-+	.gpio66 = GPIO_MODE_NATIVE,
-+	.gpio67 = GPIO_MODE_NATIVE,
-+	.gpio68 = GPIO_MODE_GPIO,
-+	.gpio69 = GPIO_MODE_GPIO,
-+	.gpio70 = GPIO_MODE_GPIO,
-+	.gpio71 = GPIO_MODE_GPIO,
-+	.gpio72 = GPIO_MODE_NATIVE,
-+	.gpio73 = GPIO_MODE_NATIVE,
-+	.gpio74 = GPIO_MODE_NATIVE,
-+	.gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+	.gpio68 = GPIO_DIR_INPUT,
-+	.gpio69 = GPIO_DIR_INPUT,
-+	.gpio70 = GPIO_DIR_INPUT,
-+	.gpio71 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+	.set1 = {
-+		.mode		= &pch_gpio_set1_mode,
-+		.direction	= &pch_gpio_set1_direction,
-+		.level		= &pch_gpio_set1_level,
-+		.blink		= &pch_gpio_set1_blink,
-+		.invert		= &pch_gpio_set1_invert,
-+		.reset		= &pch_gpio_set1_reset,
-+	},
-+	.set2 = {
-+		.mode		= &pch_gpio_set2_mode,
-+		.direction	= &pch_gpio_set2_direction,
-+		.level		= &pch_gpio_set2_level,
-+		.reset		= &pch_gpio_set2_reset,
-+	},
-+	.set3 = {
-+		.mode		= &pch_gpio_set3_mode,
-+		.direction	= &pch_gpio_set3_direction,
-+		.level		= &pch_gpio_set3_level,
-+		.reset		= &pch_gpio_set3_reset,
-+	},
-+};
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c
-new file mode 100644
-index 0000000000..f6876f9e09
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+	0x111d76df, /* Codec Vendor / Device ID: IDT */
-+	0x10280532, /* Subsystem ID */
-+	11, /* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(0, 0x10280532),
-+	AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
-+	AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
-+	AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+	AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+	AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+	AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+	AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
-+	AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+	AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+	0x80862806, /* Codec Vendor / Device ID: Intel */
-+	0x80860101, /* Subsystem ID */
-+	4, /* Number of 4 dword sets */
-+	AZALIA_SUBVENDOR(3, 0x80860101),
-+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb
-new file mode 100644
-index 0000000000..3a0fa720da
---- /dev/null
-+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb
-@@ -0,0 +1,40 @@
-+## SPDX-License-Identifier: GPL-2.0-or-later
-+
-+chip northbridge/intel/sandybridge
-+	device domain 0 on
-+		subsystemid 0x1028 0x0532 inherit
-+
-+		device ref igd on
-+			register "gpu_cpu_backlight" = "0x000009e9"
-+			register "gpu_pch_backlight" = "0x13121312"
-+		end
-+
-+		chip southbridge/intel/bd82x6x
-+			register "usb_port_config" = "{
-+				{ 1, 1, 0 },
-+				{ 1, 1, 0 },
-+				{ 1, 0, 1 },
-+				{ 1, 2, 1 },
-+				{ 1, 0, 2 },
-+				{ 1, 0, 2 },
-+				{ 1, 0, 3 },
-+				{ 1, 1, 3 },
-+				{ 1, 2, 4 },
-+				{ 1, 1, 4 },
-+				{ 1, 1, 5 },
-+				{ 1, 1, 5 },
-+				{ 1, 2, 6 },
-+				{ 1, 0, 6 },
-+			}"
-+
-+			device ref xhci on
-+				register "superspeed_capable_ports" = "0x0000000f"
-+				register "xhci_overcurrent_mapping" = "0x00000c03"
-+				register "xhci_switchable_ports" = "0x0000000f"
-+			end
-+			device ref sata1 on
-+				register "sata_port_map" = "0x31"
-+			end
-+		end
-+	end
-+end
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0028-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch b/config/coreboot/default/patches/0017-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
similarity index 98%
rename from config/coreboot/default/patches/0028-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
rename to config/coreboot/default/patches/0017-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
index 92e59129..8b85564d 100644
--- a/config/coreboot/default/patches/0028-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
+++ b/config/coreboot/default/patches/0017-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
@@ -1,7 +1,7 @@
-From b6f75374fa38e0b097c9eadb4916112707cb6747 Mon Sep 17 00:00:00 2001
+From b0ff2cc0470a44078e87bff6226d34b7ac652508 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Tue, 6 Aug 2024 00:50:24 +0100
-Subject: [PATCH 28/51] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
+Subject: [PATCH 17/24] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
 
 We add this patch:
 
diff --git a/config/coreboot/default/patches/0029-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch b/config/coreboot/default/patches/0018-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
similarity index 90%
rename from config/coreboot/default/patches/0029-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
rename to config/coreboot/default/patches/0018-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
index e31cb64c..2ef3bd9d 100644
--- a/config/coreboot/default/patches/0029-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
+++ b/config/coreboot/default/patches/0018-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
@@ -1,7 +1,7 @@
-From d3045b3dcebd94b78df2129cd81a20adf215e46a Mon Sep 17 00:00:00 2001
+From 8926fcba34f6d6ea59bcddbbebf1830df38106d2 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 20 May 2024 10:24:16 -0600
-Subject: [PATCH 29/51] mb/dell/e6400: Use 100 MHz reference clock for display
+Subject: [PATCH 18/24] mb/dell/e6400: Use 100 MHz reference clock for display
 
 The E6400 uses a 100 MHz reference clock for spread spectrum support on
 LVDS, whereas libgfxinit previously assumed a 96 MHz input clock. For
@@ -33,7 +33,7 @@ index 417d95fd5d..6fe1b1c456 100644
  	default "dell/e6400"
  
 diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
-index 8059e7ee80..5df5a93296 100644
+index fef0d735b3..fc5df8b11a 100644
 --- a/src/northbridge/intel/gm45/Kconfig
 +++ b/src/northbridge/intel/gm45/Kconfig
 @@ -14,6 +14,10 @@ config NORTHBRIDGE_INTEL_GM45
diff --git a/config/coreboot/default/patches/0047-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch b/config/coreboot/default/patches/0019-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
similarity index 89%
rename from config/coreboot/default/patches/0047-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
rename to config/coreboot/default/patches/0019-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
index 988ae4e6..63a7487a 100644
--- a/config/coreboot/default/patches/0047-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
+++ b/config/coreboot/default/patches/0019-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
@@ -1,7 +1,7 @@
-From 53f2d47ee6ebaa8d47b076a6c2a1514c91247b95 Mon Sep 17 00:00:00 2001
+From a80e71ba4cd7dc7c131c9649de1424899fddddb1 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Mon, 12 Aug 2024 02:15:24 +0100
-Subject: [PATCH 47/51] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
+Subject: [PATCH 19/24] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
 
 set it to 96MHz. fixes the following build error when
 building for x4x boards e.g. gigabyte ga-g41m-es2l:
@@ -33,7 +33,7 @@ Signed-off-by: Leah Rowe <info@minifree.org>
  1 file changed, 4 insertions(+)
 
 diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
-index 9af063819b..93ba575b95 100644
+index 097e11126c..6430319f6a 100644
 --- a/src/northbridge/intel/x4x/Kconfig
 +++ b/src/northbridge/intel/x4x/Kconfig
 @@ -14,6 +14,10 @@ config NORTHBRIDGE_INTEL_X4X
diff --git a/config/coreboot/default/patches/0048-mb-dell-Convert-E6400-into-a-variant.patch b/config/coreboot/default/patches/0020-mb-dell-Convert-E6400-into-a-variant.patch
similarity index 98%
rename from config/coreboot/default/patches/0048-mb-dell-Convert-E6400-into-a-variant.patch
rename to config/coreboot/default/patches/0020-mb-dell-Convert-E6400-into-a-variant.patch
index 156d5c8d..f187c108 100644
--- a/config/coreboot/default/patches/0048-mb-dell-Convert-E6400-into-a-variant.patch
+++ b/config/coreboot/default/patches/0020-mb-dell-Convert-E6400-into-a-variant.patch
@@ -1,7 +1,7 @@
-From 92556743e92cc02524296b653de5241160876218 Mon Sep 17 00:00:00 2001
+From 1d62741f0f069241c2d1497c7faf0b31249e706d Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Thu, 26 Sep 2024 19:48:26 -0600
-Subject: [PATCH 48/51] mb/dell: Convert E6400 into a variant
+Subject: [PATCH 20/24] mb/dell: Convert E6400 into a variant
 
 All the GM45 Dell Latitudes should be nearly identical, so convert the
 E6400 port into a variant so that future ports for the other systems can
diff --git a/config/coreboot/default/patches/0049-mb-dell-gm45_latitudes-Add-E4300-variant.patch b/config/coreboot/default/patches/0021-mb-dell-gm45_latitudes-Add-E4300-variant.patch
similarity index 98%
rename from config/coreboot/default/patches/0049-mb-dell-gm45_latitudes-Add-E4300-variant.patch
rename to config/coreboot/default/patches/0021-mb-dell-gm45_latitudes-Add-E4300-variant.patch
index 2cdcd499..17fa6aff 100644
--- a/config/coreboot/default/patches/0049-mb-dell-gm45_latitudes-Add-E4300-variant.patch
+++ b/config/coreboot/default/patches/0021-mb-dell-gm45_latitudes-Add-E4300-variant.patch
@@ -1,7 +1,7 @@
-From ac8ac2543e3ebbc05f79f37d1460cde532a7ee1c Mon Sep 17 00:00:00 2001
+From 031aca7160b8258bd16d5c5a3481c6ee900111e1 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Thu, 26 Sep 2024 19:51:25 -0600
-Subject: [PATCH 49/51] mb/dell/gm45_latitudes: Add E4300 variant
+Subject: [PATCH 21/24] mb/dell/gm45_latitudes: Add E4300 variant
 
 Change-Id: I0f2059501b11be103187e3ce1a7c04ab85ae63d2
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
diff --git a/config/coreboot/default/patches/0050-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch b/config/coreboot/default/patches/0022-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
similarity index 94%
rename from config/coreboot/default/patches/0050-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
rename to config/coreboot/default/patches/0022-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
index 71cc67c1..ddcaadb3 100644
--- a/config/coreboot/default/patches/0050-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
+++ b/config/coreboot/default/patches/0022-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
@@ -1,7 +1,7 @@
-From 5e8b899654c31fe771e4b1e96c74c93d4509c3b2 Mon Sep 17 00:00:00 2001
+From e6a153dbaf95b034f75dd6717c6d250d1cc21635 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 3 May 2024 16:31:12 -0600
-Subject: [PATCH 50/51] mb/dell: Add S3 SMI handler for Dell Latitudes
+Subject: [PATCH 22/24] mb/dell: Add S3 SMI handler for Dell Latitudes
 
 Integrate the previously added mec5035_smi_sleep() function into
 mainboard code to fix S3 suspend on the SNB/IVB Latitudes and the E7240.
diff --git a/config/coreboot/default/patches/0051-ec-dell-mec5035-Route-power-button-event-to-host.patch b/config/coreboot/default/patches/0023-ec-dell-mec5035-Route-power-button-event-to-host.patch
similarity index 96%
rename from config/coreboot/default/patches/0051-ec-dell-mec5035-Route-power-button-event-to-host.patch
rename to config/coreboot/default/patches/0023-ec-dell-mec5035-Route-power-button-event-to-host.patch
index 65f90e2c..0351d503 100644
--- a/config/coreboot/default/patches/0051-ec-dell-mec5035-Route-power-button-event-to-host.patch
+++ b/config/coreboot/default/patches/0023-ec-dell-mec5035-Route-power-button-event-to-host.patch
@@ -1,7 +1,7 @@
-From 1a342c20b8705bbea02d27a73e383ee2808f2558 Mon Sep 17 00:00:00 2001
+From 41fab69e70eb78b93e1998396bf85a5afbaa61ef Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Tue, 18 Jun 2024 21:31:08 -0600
-Subject: [PATCH 51/51] ec/dell/mec5035: Route power button event to host
+Subject: [PATCH 23/24] ec/dell/mec5035: Route power button event to host
 
 If command 0x3e with an argument of 1 isn't sent to the EC, pressing the
 power button results in the EC powering off the system without letting
diff --git a/config/coreboot/default/patches/0052-Disable-compression-on-refcode-insertion.patch b/config/coreboot/default/patches/0024-Disable-compression-on-refcode-insertion.patch
similarity index 81%
rename from config/coreboot/default/patches/0052-Disable-compression-on-refcode-insertion.patch
rename to config/coreboot/default/patches/0024-Disable-compression-on-refcode-insertion.patch
index 1c089279..51928bd6 100644
--- a/config/coreboot/default/patches/0052-Disable-compression-on-refcode-insertion.patch
+++ b/config/coreboot/default/patches/0024-Disable-compression-on-refcode-insertion.patch
@@ -1,7 +1,7 @@
-From 1e72e6df7f5d71fd41350e34d0a8bd5230349235 Mon Sep 17 00:00:00 2001
+From 1380f0f6f3c73bbd994228acdbcbbc06da7c6cb2 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Tue, 31 Dec 2024 14:42:24 +0000
-Subject: [PATCH 1/1] Disable compression on refcode insertion
+Subject: [PATCH 24/24] Disable compression on refcode insertion
 
 Compression is not reliably reproducible. In an lbmk release
 context, this means we cannot rely on vendorfile insertion.
@@ -14,10 +14,10 @@ Signed-off-by: Leah Rowe <info@minifree.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/Makefile.mk b/Makefile.mk
-index e9ad2ccbb2..6a96d45a83 100644
+index 3969bfbd05..15346569f8 100644
 --- a/Makefile.mk
 +++ b/Makefile.mk
-@@ -1364,7 +1364,7 @@ endif
+@@ -1392,7 +1392,7 @@ endif
  cbfs-files-$(CONFIG_HAVE_REFCODE_BLOB) += $(CONFIG_CBFS_PREFIX)/refcode
  $(CONFIG_CBFS_PREFIX)/refcode-file := $(REFCODE_BLOB)
  $(CONFIG_CBFS_PREFIX)/refcode-type := stage
diff --git a/config/coreboot/default/patches/0024-ec-dell-mec5035-Replace-defines-with-enums.patch b/config/coreboot/default/patches/0024-ec-dell-mec5035-Replace-defines-with-enums.patch
deleted file mode 100644
index 6c1118bb..00000000
--- a/config/coreboot/default/patches/0024-ec-dell-mec5035-Replace-defines-with-enums.patch
+++ /dev/null
@@ -1,91 +0,0 @@
-From a1566875789469ebd91e472301be4b359aac0a4c Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Tue, 28 May 2024 17:23:21 -0600
-Subject: [PATCH 24/51] ec/dell/mec5035: Replace defines with enums
-
-Instead of using defines for command IDs and argument values, use enums
-to provide more type safety. This also has the effect of moving the
-command IDs to a more central location instead of defines spread out
-throughout the header.
-
-Change-Id: I788531e8b70e79541213853f177326d217235ef2
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
-Reviewed-on: https://review.coreboot.org/c/coreboot/+/82998
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
----
- src/ec/dell/mec5035/mec5035.c | 10 +++++-----
- src/ec/dell/mec5035/mec5035.h | 20 ++++++++++++--------
- 2 files changed, 17 insertions(+), 13 deletions(-)
-
-diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
-index 68b6b2f7fb..dffbb7960c 100644
---- a/src/ec/dell/mec5035/mec5035.c
-+++ b/src/ec/dell/mec5035/mec5035.c
-@@ -66,17 +66,17 @@ static enum cb_err write_mailbox_regs(const u8 *data, u8 start, u8 count)
- 	return CB_SUCCESS;
- }
- 
--static void ec_command(u8 cmd)
-+static void ec_command(enum mec5035_cmd cmd)
- {
- 	outb(0, MAILBOX_INDEX);
--	outb(cmd, MAILBOX_DATA);
-+	outb((u8)cmd, MAILBOX_DATA);
- 	wait_ec();
- }
- 
--u8 mec5035_mouse_touchpad(u8 setting)
-+u8 mec5035_mouse_touchpad(enum ec_mouse_setting setting)
- {
--	u8 buf[15] = {0};
--	write_mailbox_regs(&setting, 2, 1);
-+	u8 buf[15] = {(u8)setting};
-+	write_mailbox_regs(buf, 2, 1);
- 	ec_command(CMD_MOUSE_TP);
- 	/* The vendor firmware reads 15 bytes starting at index 1, presumably
- 	   to get some sort of return code. Though I don't know for sure if
-diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
-index fa15a9d621..32f791cb01 100644
---- a/src/ec/dell/mec5035/mec5035.h
-+++ b/src/ec/dell/mec5035/mec5035.h
-@@ -7,16 +7,20 @@
- 
- #define NUM_REGISTERS	32
- 
-+enum mec5035_cmd {
-+	CMD_MOUSE_TP = 0x1a,
-+	CMD_RADIO_CTRL = 0x2b,
-+	CMD_CPU_OK = 0xc2,
-+};
-+
- /* Touchpad (TP) and mouse related. The EC seems to
-    default to 0 which results in the TP not working. */
--#define CMD_MOUSE_TP	0x1a
--#define SERIAL_MOUSE	0 /* Disable TP, force use of a serial mouse */
--#define PS2_MOUSE	1 /* Disable TP when using a PS/2 mouse */
--#define TP_PS2_MOUSE	2 /* Leave TP enabled when using a PS/2 mouse */
--
--#define CMD_CPU_OK	0xc2
-+enum ec_mouse_setting {
-+	SERIAL_MOUSE = 0, /* Disable TP, force use of a serial mouse */
-+	PS2_MOUSE, /* Disable TP when using a PS/2 mouse */
-+	TP_PS2_MOUSE /* Leave TP enabled when using a PS/2 mouse */
-+};
- 
--#define CMD_RADIO_CTRL 0x2b
- #define RADIO_CTRL_NUM_ARGS 3
- enum ec_radio_dev {
- 	RADIO_WLAN = 0,
-@@ -29,7 +33,7 @@ enum ec_radio_state {
- 	RADIO_ON
- };
- 
--u8 mec5035_mouse_touchpad(u8 setting);
-+u8 mec5035_mouse_touchpad(enum ec_mouse_setting setting);
- void mec5035_cpu_ok(void);
- void mec5035_early_init(void);
- void mec5035_control_radio(enum ec_radio_dev device, enum ec_radio_state state);
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0025-nb-intel-Disable-stack-overflow-debug-options.patch b/config/coreboot/default/patches/0025-nb-intel-Disable-stack-overflow-debug-options.patch
new file mode 100644
index 00000000..c9e243f4
--- /dev/null
+++ b/config/coreboot/default/patches/0025-nb-intel-Disable-stack-overflow-debug-options.patch
@@ -0,0 +1,187 @@
+From 3400b3e7c31e45506bb060db0164fa9390366d27 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 21 Apr 2025 02:58:47 +0100
+Subject: [PATCH 1/1] nb/intel/*: Disable stack overflow debug options
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/northbridge/intel/e7505/Kconfig       |  9 +++++++++
+ src/northbridge/intel/gm45/Kconfig        |  9 +++++++++
+ src/northbridge/intel/haswell/Kconfig     |  9 +++++++++
+ src/northbridge/intel/i440bx/Kconfig      | 13 +++++++++++++
+ src/northbridge/intel/i945/Kconfig        |  9 +++++++++
+ src/northbridge/intel/ironlake/Kconfig    |  9 +++++++++
+ src/northbridge/intel/pineview/Kconfig    |  9 +++++++++
+ src/northbridge/intel/sandybridge/Kconfig |  9 +++++++++
+ src/northbridge/intel/x4x/Kconfig         |  9 +++++++++
+ 9 files changed, 85 insertions(+)
+
+diff --git a/src/northbridge/intel/e7505/Kconfig b/src/northbridge/intel/e7505/Kconfig
+index 039a7396f8..ddcb986f10 100644
+--- a/src/northbridge/intel/e7505/Kconfig
++++ b/src/northbridge/intel/e7505/Kconfig
+@@ -7,3 +7,12 @@ config NORTHBRIDGE_INTEL_E7505
+ 	select NO_CBFS_MCACHE
+ 	select SMM_TSEG
+ 	select NEED_SMALL_2MB_PAGE_TABLES
++
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
+diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
+index fc5df8b11a..95e3644b73 100644
+--- a/src/northbridge/intel/gm45/Kconfig
++++ b/src/northbridge/intel/gm45/Kconfig
+@@ -58,4 +58,13 @@ config FIXED_DMIBAR_MMIO_BASE
+ config FIXED_EPBAR_MMIO_BASE
+ 	default 0xfed19000
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
++
+ endif
+diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
+index 6191cb6ccf..0f5b5c7241 100644
+--- a/src/northbridge/intel/haswell/Kconfig
++++ b/src/northbridge/intel/haswell/Kconfig
+@@ -10,6 +10,15 @@ config NORTHBRIDGE_INTEL_HASWELL
+ 
+ if NORTHBRIDGE_INTEL_HASWELL
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
++
+ config USE_NATIVE_RAMINIT
+ 	bool "[NOT COMPLETE] Use native raminit"
+ 	default n
+diff --git a/src/northbridge/intel/i440bx/Kconfig b/src/northbridge/intel/i440bx/Kconfig
+index dbb2d7436b..5e9418b6a9 100644
+--- a/src/northbridge/intel/i440bx/Kconfig
++++ b/src/northbridge/intel/i440bx/Kconfig
+@@ -19,3 +19,16 @@ config SDRAMPWR_4DIMM
+ 	  If your board has 4 DIMM slots, you must use select this option, in
+ 	  your Kconfig file of the board. On boards with 3 DIMM slots,
+ 	  do _not_ select this option.
++
++if NORTHBRIDGE_INTEL_I440BX
++
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
++
++endif
+diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig
+index 32eff1a611..9479d75c07 100644
+--- a/src/northbridge/intel/i945/Kconfig
++++ b/src/northbridge/intel/i945/Kconfig
+@@ -89,4 +89,13 @@ config FIXED_DMIBAR_MMIO_BASE
+ config FIXED_EPBAR_MMIO_BASE
+ 	default 0xfed19000
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
++
+ endif
+diff --git a/src/northbridge/intel/ironlake/Kconfig b/src/northbridge/intel/ironlake/Kconfig
+index 2bafebf92e..16b81705bb 100644
+--- a/src/northbridge/intel/ironlake/Kconfig
++++ b/src/northbridge/intel/ironlake/Kconfig
+@@ -63,4 +63,13 @@ config FIXED_DMIBAR_MMIO_BASE
+ config FIXED_EPBAR_MMIO_BASE
+ 	default 0xfed19000
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
++
+ endif
+diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig
+index 59cfcd5e0a..a3ad8d3425 100644
+--- a/src/northbridge/intel/pineview/Kconfig
++++ b/src/northbridge/intel/pineview/Kconfig
+@@ -42,4 +42,13 @@ config FIXED_EPBAR_MMIO_BASE
+ config DOMAIN_RESOURCE_32BIT_LIMIT
+ 	default 0xfec00000
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
++
+ endif
+diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig
+index 973eed8bbd..6387cf926d 100644
+--- a/src/northbridge/intel/sandybridge/Kconfig
++++ b/src/northbridge/intel/sandybridge/Kconfig
+@@ -208,4 +208,13 @@ config IGD_DEFAULT_UMA_INDEX
+ 	default 2 if IGD_DEFAULT_UMA_SIZE_96MB
+ 	default 3 if IGD_DEFAULT_UMA_SIZE_128MB
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
++
+ endif
+diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
+index 6430319f6a..1803ef5733 100644
+--- a/src/northbridge/intel/x4x/Kconfig
++++ b/src/northbridge/intel/x4x/Kconfig
+@@ -53,4 +53,13 @@ config FIXED_DMIBAR_MMIO_BASE
+ config FIXED_EPBAR_MMIO_BASE
+ 	default 0xfed19000
+ 
++# Override DEBUG Kconfig to avoid false alarm about stack overflow.
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS
++      bool
++      default n
++
++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
++      bool
++      default n
++
+ endif
+-- 
+2.39.5
+
diff --git a/config/coreboot/default/patches/0030-haswell-NRI-Initialise-MPLL.patch b/config/coreboot/default/patches/0030-haswell-NRI-Initialise-MPLL.patch
deleted file mode 100644
index a1cf9b75..00000000
--- a/config/coreboot/default/patches/0030-haswell-NRI-Initialise-MPLL.patch
+++ /dev/null
@@ -1,348 +0,0 @@
-From 0966980e52286985fcd0fac6325bdd99f35ebcb8 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Thu, 11 Apr 2024 17:25:07 +0200
-Subject: [PATCH 30/51] haswell NRI: Initialise MPLL
-
-Add code to initialise the MPLL (Memory PLL). The procedure is similar
-to the one for Sandy/Ivy Bridge, but it is not worth factoring out.
-
-Change-Id: I978c352de68f6d8cecc76f4ae3c12daaf4be9ed6
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/Makefile.mk  |   2 +
- .../intel/haswell/native_raminit/init_mpll.c  | 210 ++++++++++++++++++
- .../haswell/native_raminit/io_comp_control.c  |  22 ++
- .../haswell/native_raminit/raminit_main.c     |   3 +-
- .../haswell/native_raminit/raminit_native.h   |  11 +
- .../intel/haswell/registers/mchbar.h          |   3 +
- 6 files changed, 250 insertions(+), 1 deletion(-)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/init_mpll.c
- create mode 100644 src/northbridge/intel/haswell/native_raminit/io_comp_control.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-index ebf7abc6ec..c125d84f0b 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-@@ -1,5 +1,7 @@
- ## SPDX-License-Identifier: GPL-2.0-or-later
- 
-+romstage-y += init_mpll.c
-+romstage-y += io_comp_control.c
- romstage-y += raminit_main.c
- romstage-y += raminit_native.c
- romstage-y += spd_bitmunching.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/init_mpll.c b/src/northbridge/intel/haswell/native_raminit/init_mpll.c
-new file mode 100644
-index 0000000000..1f3f2c29a9
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/init_mpll.c
-@@ -0,0 +1,210 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <commonlib/bsd/clamp.h>
-+#include <console/console.h>
-+#include <delay.h>
-+#include <device/pci_ops.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+
-+static uint32_t get_mem_multiplier(const struct sysinfo *ctrl)
-+{
-+	const uint32_t mult = NS2MHZ_DIV256 / (ctrl->tCK * ctrl->base_freq);
-+
-+	if (ctrl->base_freq == 100)
-+		return clamp_u32(7, mult, 12);
-+
-+	if (ctrl->base_freq == 133)
-+		return clamp_u32(3, mult, 10);
-+
-+	die("Unsupported base frequency\n");
-+}
-+
-+static void normalize_tck(struct sysinfo *ctrl, const bool pll_ref100)
-+{
-+	/** TODO: Haswell supports up to DDR3-2600 **/
-+	if (ctrl->tCK <= TCK_1200MHZ) {
-+		ctrl->tCK = TCK_1200MHZ;
-+		ctrl->base_freq = 133;
-+		ctrl->mem_clock_mhz = 1200;
-+
-+	} else if (ctrl->tCK <= TCK_1100MHZ) {
-+		ctrl->tCK = TCK_1100MHZ;
-+		ctrl->base_freq = 100;
-+		ctrl->mem_clock_mhz = 1100;
-+
-+	} else if (ctrl->tCK <= TCK_1066MHZ) {
-+		ctrl->tCK = TCK_1066MHZ;
-+		ctrl->base_freq = 133;
-+		ctrl->mem_clock_mhz = 1066;
-+
-+	} else if (ctrl->tCK <= TCK_1000MHZ) {
-+		ctrl->tCK = TCK_1000MHZ;
-+		ctrl->base_freq = 100;
-+		ctrl->mem_clock_mhz = 1000;
-+
-+	} else if (ctrl->tCK <= TCK_933MHZ) {
-+		ctrl->tCK = TCK_933MHZ;
-+		ctrl->base_freq = 133;
-+		ctrl->mem_clock_mhz = 933;
-+
-+	} else if (ctrl->tCK <= TCK_900MHZ) {
-+		ctrl->tCK = TCK_900MHZ;
-+		ctrl->base_freq = 100;
-+		ctrl->mem_clock_mhz = 900;
-+
-+	} else if (ctrl->tCK <= TCK_800MHZ) {
-+		ctrl->tCK = TCK_800MHZ;
-+		ctrl->base_freq = 133;
-+		ctrl->mem_clock_mhz = 800;
-+
-+	} else if (ctrl->tCK <= TCK_700MHZ) {
-+		ctrl->tCK = TCK_700MHZ;
-+		ctrl->base_freq = 100;
-+		ctrl->mem_clock_mhz = 700;
-+
-+	} else if (ctrl->tCK <= TCK_666MHZ) {
-+		ctrl->tCK = TCK_666MHZ;
-+		ctrl->base_freq = 133;
-+		ctrl->mem_clock_mhz = 666;
-+
-+	} else if (ctrl->tCK <= TCK_533MHZ) {
-+		ctrl->tCK = TCK_533MHZ;
-+		ctrl->base_freq = 133;
-+		ctrl->mem_clock_mhz = 533;
-+
-+	} else if (ctrl->tCK <= TCK_400MHZ) {
-+		ctrl->tCK = TCK_400MHZ;
-+		ctrl->base_freq = 133;
-+		ctrl->mem_clock_mhz = 400;
-+
-+	} else {
-+		ctrl->tCK = 0;
-+		ctrl->base_freq = 1;
-+		ctrl->mem_clock_mhz = 0;
-+		return;
-+	}
-+	if (!pll_ref100 && ctrl->base_freq == 100) {
-+		/* Skip unsupported frequency */
-+		ctrl->tCK++;
-+		normalize_tck(ctrl, pll_ref100);
-+	}
-+}
-+
-+#define MIN_CAS	4
-+#define MAX_CAS	24
-+
-+static uint8_t find_compatible_cas(struct sysinfo *ctrl)
-+{
-+	printk(RAM_DEBUG, "With tCK %u, try CAS: ", ctrl->tCK);
-+	const uint8_t cas_lower = MAX(MIN_CAS, DIV_ROUND_UP(ctrl->tAA, ctrl->tCK));
-+	const uint8_t cas_upper = MIN(MAX_CAS, 19); /* JEDEC MR0 limit */
-+
-+	if (!(ctrl->cas_supported >> (cas_lower - MIN_CAS))) {
-+		printk(RAM_DEBUG, "DIMMs do not support CAS >= %u\n", cas_lower);
-+		ctrl->tCK++;
-+		return 0;
-+	}
-+	for (uint8_t cas = cas_lower; cas <= cas_upper; cas++) {
-+		printk(RAM_DEBUG, "%u ", cas);
-+		if (ctrl->cas_supported & BIT(cas - MIN_CAS)) {
-+			printk(RAM_DEBUG, "OK\n");
-+			return cas;
-+		}
-+	}
-+	return 0;
-+}
-+
-+static enum raminit_status find_cas_tck(struct sysinfo *ctrl)
-+{
-+	/** TODO: Honor all possible PLL_REF100_CFG values **/
-+	uint8_t pll_ref100 = (pci_read_config32(HOST_BRIDGE, CAPID0_B) >> 21) & 0x7;
-+	printk(RAM_DEBUG, "PLL_REF100_CFG value: 0x%x\n", pll_ref100);
-+	printk(RAM_DEBUG, "100MHz reference clock support: %s\n", pll_ref100 ? "yes" : "no");
-+
-+	uint8_t selected_cas;
-+	while (true) {
-+		/* Round tCK up so that it is a multiple of either 133 or 100 MHz */
-+		normalize_tck(ctrl, pll_ref100);
-+		if (!ctrl->tCK) {
-+			printk(BIOS_ERR, "Couldn't find compatible clock / CAS settings\n");
-+			return RAMINIT_STATUS_MPLL_INIT_FAILURE;
-+		}
-+		selected_cas = find_compatible_cas(ctrl);
-+		if (selected_cas)
-+			break;
-+
-+		ctrl->tCK++;
-+	}
-+	printk(BIOS_DEBUG, "Found compatible clock / CAS settings\n");
-+	printk(BIOS_DEBUG, "Selected DRAM frequency: %u MHz\n", NS2MHZ_DIV256 / ctrl->tCK);
-+	printk(BIOS_DEBUG, "Selected CAS latency   : %uT\n", selected_cas);
-+	ctrl->multiplier = get_mem_multiplier(ctrl);
-+	return RAMINIT_STATUS_SUCCESS;
-+}
-+
-+enum raminit_status initialise_mpll(struct sysinfo *ctrl)
-+{
-+	if (ctrl->tCK > TCK_400MHZ) {
-+		printk(BIOS_ERR, "tCK is too slow. Increasing to 400 MHz as last resort\n");
-+		ctrl->tCK = TCK_400MHZ;
-+	}
-+	while (true) {
-+		if (!ctrl->qclkps) {
-+			const enum raminit_status status = find_cas_tck(ctrl);
-+			if (status)
-+				return status;
-+		}
-+
-+		/*
-+		 * Unlike previous generations, Haswell's MPLL won't shut down if the
-+		 * requested frequency isn't supported. But we cannot reinitialize it.
-+		 * Another different thing: MPLL registers are 4-bit instead of 8-bit.
-+		 */
-+
-+		/** FIXME: Obtain current clock frequency if we want to skip this **/
-+		//if (mchbar_read32(MC_BIOS_DATA) != 0)
-+		//	break;
-+
-+		uint32_t mc_bios_req = ctrl->multiplier;
-+		if (ctrl->base_freq == 100) {
-+			/* Use 100 MHz reference clock */
-+			mc_bios_req |= BIT(4);
-+		}
-+		mc_bios_req |= BIT(31);
-+		printk(RAM_DEBUG, "MC_BIOS_REQ = 0x%08x\n", mc_bios_req);
-+		printk(BIOS_DEBUG, "MPLL busy... ");
-+		mchbar_write32(MC_BIOS_REQ, mc_bios_req);
-+
-+		for (unsigned int i = 0; i <= 5000; i++) {
-+			if (!(mchbar_read32(MC_BIOS_REQ) & BIT(31))) {
-+				printk(BIOS_DEBUG, "done in %u us\n", i);
-+				break;
-+			}
-+			udelay(1);
-+		}
-+		if (mchbar_read32(MC_BIOS_REQ) & BIT(31))
-+			printk(BIOS_DEBUG, "did not lock\n");
-+
-+		/* Verify locked frequency */
-+		const uint32_t mc_bios_data = mchbar_read32(MC_BIOS_DATA);
-+		printk(RAM_DEBUG, "MC_BIOS_DATA = 0x%08x\n", mc_bios_data);
-+		if ((mc_bios_data & 0xf) >= ctrl->multiplier)
-+			break;
-+
-+		printk(BIOS_DEBUG, "Retrying at a lower frequency\n\n");
-+		ctrl->tCK++;
-+	}
-+	if (!ctrl->mem_clock_mhz) {
-+		printk(BIOS_ERR, "Could not program MPLL frequency\n");
-+		return RAMINIT_STATUS_MPLL_INIT_FAILURE;
-+	}
-+	printk(BIOS_DEBUG, "MPLL frequency is set to: %u MHz ", ctrl->mem_clock_mhz);
-+	ctrl->mem_clock_fs = 1000000000 / ctrl->mem_clock_mhz;
-+	printk(BIOS_DEBUG, "(period: %u femtoseconds)\n", ctrl->mem_clock_fs);
-+	ctrl->qclkps = ctrl->mem_clock_fs / 2000;
-+	printk(BIOS_DEBUG, "Quadrature clock period: %u picoseconds\n", ctrl->qclkps);
-+	return wait_for_first_rcomp();
-+}
-diff --git a/src/northbridge/intel/haswell/native_raminit/io_comp_control.c b/src/northbridge/intel/haswell/native_raminit/io_comp_control.c
-new file mode 100644
-index 0000000000..d45b608dd3
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/io_comp_control.c
-@@ -0,0 +1,22 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <commonlib/bsd/clamp.h>
-+#include <console/console.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <timer.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+
-+enum raminit_status wait_for_first_rcomp(void)
-+{
-+	struct stopwatch timer;
-+	stopwatch_init_msecs_expire(&timer, 2000);
-+	do {
-+		if (mchbar_read32(RCOMP_TIMER) & BIT(16))
-+			return RAMINIT_STATUS_SUCCESS;
-+
-+	} while (!stopwatch_expired(&timer));
-+	printk(BIOS_ERR, "Timed out waiting for RCOMP to complete\n");
-+	return RAMINIT_STATUS_POLL_TIMEOUT;
-+}
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 19ec5859ac..bf745e943f 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -19,7 +19,8 @@ struct task_entry {
- };
- 
- static const struct task_entry cold_boot[] = {
--	{ collect_spd_info,           true, "PROCSPD",    },
-+	{ collect_spd_info,                                       true, "PROCSPD",    },
-+	{ initialise_mpll,                                        true, "INITMPLL",   },
- };
- 
- /* Return a generic stepping value to make stepping checks simpler */
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 8078c9c386..15a1550424 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -24,6 +24,8 @@ enum raminit_status {
- 	RAMINIT_STATUS_SUCCESS = 0,
- 	RAMINIT_STATUS_NO_MEMORY_INSTALLED,
- 	RAMINIT_STATUS_UNSUPPORTED_MEMORY,
-+	RAMINIT_STATUS_MPLL_INIT_FAILURE,
-+	RAMINIT_STATUS_POLL_TIMEOUT,
- 	RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
- };
- 
-@@ -83,10 +85,19 @@ struct sysinfo {
- 	uint8_t rankmap[NUM_CHANNELS];
- 	uint8_t rank_mirrored[NUM_CHANNELS];
- 	uint32_t channel_size_mb[NUM_CHANNELS];
-+
-+	uint8_t base_freq;		/* Memory base frequency, either 100 or 133 MHz */
-+	uint32_t multiplier;
-+	uint32_t mem_clock_mhz;
-+	uint32_t mem_clock_fs;		/* Memory clock period in femtoseconds */
-+	uint32_t qclkps;		/* Quadrature clock period in picoseconds */
- };
- 
- void raminit_main(enum raminit_boot_mode bootmode);
- 
- enum raminit_status collect_spd_info(struct sysinfo *ctrl);
-+enum raminit_status initialise_mpll(struct sysinfo *ctrl);
-+
-+enum raminit_status wait_for_first_rcomp(void);
- 
- #endif
-diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h
-index 5610e7089a..45f8174995 100644
---- a/src/northbridge/intel/haswell/registers/mchbar.h
-+++ b/src/northbridge/intel/haswell/registers/mchbar.h
-@@ -13,6 +13,8 @@
- #define MC_INIT_STATE_G		0x5030
- #define MRC_REVISION		0x5034 /* MRC Revision */
- 
-+#define RCOMP_TIMER		0x5084
-+
- #define MC_LOCK			0x50fc /* Memory Controller Lock register */
- 
- #define GFXVTBAR		0x5400 /* Base address for IGD */
-@@ -61,6 +63,7 @@
- 
- #define BIOS_RESET_CPL		0x5da8 /* 8-bit */
- 
-+#define MC_BIOS_REQ		0x5e00 /* Memory frequency request register */
- #define MC_BIOS_DATA		0x5e04 /* Miscellaneous information for BIOS */
- #define SAPMCTL			0x5f00
- 
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0031-haswell-NRI-Post-process-selected-timings.patch b/config/coreboot/default/patches/0031-haswell-NRI-Post-process-selected-timings.patch
deleted file mode 100644
index 426cef35..00000000
--- a/config/coreboot/default/patches/0031-haswell-NRI-Post-process-selected-timings.patch
+++ /dev/null
@@ -1,249 +0,0 @@
-From 1dc22174b9b28b9ea9af59183ffd5d86d19a2721 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sat, 7 May 2022 16:29:55 +0200
-Subject: [PATCH 31/51] haswell NRI: Post-process selected timings
-
-Once the MPLL has been initialised, convert the timings from the SPD to
-be in DCLKs, which is what the hardware expects. In addition, calculate
-the values for tREFI and tXP.
-
-Change-Id: Id02caf858f75b9e08016762b3aefda282b274386
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/Makefile.mk  |   1 +
- .../haswell/native_raminit/lookup_timings.c   |  62 +++++++++++
- .../haswell/native_raminit/raminit_main.c     |   1 +
- .../haswell/native_raminit/raminit_native.h   |   8 ++
- .../haswell/native_raminit/spd_bitmunching.c  | 100 ++++++++++++++++++
- 5 files changed, 172 insertions(+)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/lookup_timings.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-index c125d84f0b..2769e0bbb4 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-@@ -1,5 +1,6 @@
- ## SPDX-License-Identifier: GPL-2.0-or-later
- 
-+romstage-y += lookup_timings.c
- romstage-y += init_mpll.c
- romstage-y += io_comp_control.c
- romstage-y += raminit_main.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/lookup_timings.c b/src/northbridge/intel/haswell/native_raminit/lookup_timings.c
-new file mode 100644
-index 0000000000..8b81c7c341
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/lookup_timings.c
-@@ -0,0 +1,62 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <commonlib/bsd/clamp.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+
-+struct timing_lookup {
-+	uint32_t clock;
-+	uint32_t value;
-+};
-+
-+static uint32_t lookup_timing(
-+	const uint32_t mem_clock_mhz,
-+	const struct timing_lookup *const lookup,
-+	const size_t length)
-+{
-+	/* Fall back to the last index */
-+	size_t i;
-+	for (i = 0; i < length - 1; i++) {
-+		/* Account for imprecise frequency values */
-+		if ((mem_clock_mhz - 5) <= lookup[i].clock)
-+			break;
-+	}
-+	return lookup[i].value;
-+}
-+
-+static const uint32_t fmax = UINT32_MAX;
-+
-+uint8_t get_tCWL(const uint32_t mem_clock_mhz)
-+{
-+	const struct timing_lookup lut[] = {
-+		{  400,  5 },
-+		{  533,  6 },
-+		{  666,  7 },
-+		{  800,  8 },
-+		{  933,  9 },
-+		{ 1066, 10 },
-+		{ 1200, 11 },
-+		{ fmax, 12 },
-+	};
-+	return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut));
-+}
-+
-+/* tREFI = 7800 ns * DDR MHz */
-+uint32_t get_tREFI(const uint32_t mem_clock_mhz)
-+{
-+	return (mem_clock_mhz * 7800) / 1000;
-+}
-+
-+uint32_t get_tXP(const uint32_t mem_clock_mhz)
-+{
-+	const struct timing_lookup lut[] = {
-+		{  400,  3 },
-+		{  666,  4 },
-+		{  800,  5 },
-+		{  933,  6 },
-+		{ 1066,  7 },
-+		{ fmax,  8 },
-+	};
-+	return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut));
-+}
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index bf745e943f..2fea658415 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -21,6 +21,7 @@ struct task_entry {
- static const struct task_entry cold_boot[] = {
- 	{ collect_spd_info,                                       true, "PROCSPD",    },
- 	{ initialise_mpll,                                        true, "INITMPLL",   },
-+	{ convert_timings,                                        true, "CONVTIM",    },
- };
- 
- /* Return a generic stepping value to make stepping checks simpler */
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 15a1550424..e0ebd3a2a7 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -79,6 +79,9 @@ struct sysinfo {
- 	uint32_t tCWL;
- 	uint32_t tCMD;
- 
-+	uint32_t tREFI;
-+	uint32_t tXP;
-+
- 	uint8_t lanes;			/* 8 or 9 */
- 	uint8_t chanmap;
- 	uint8_t dpc[NUM_CHANNELS];	/* DIMMs per channel */
-@@ -97,7 +100,12 @@ void raminit_main(enum raminit_boot_mode bootmode);
- 
- enum raminit_status collect_spd_info(struct sysinfo *ctrl);
- enum raminit_status initialise_mpll(struct sysinfo *ctrl);
-+enum raminit_status convert_timings(struct sysinfo *ctrl);
- 
- enum raminit_status wait_for_first_rcomp(void);
- 
-+uint8_t get_tCWL(uint32_t mem_clock_mhz);
-+uint32_t get_tREFI(uint32_t mem_clock_mhz);
-+uint32_t get_tXP(uint32_t mem_clock_mhz);
-+
- #endif
-diff --git a/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c b/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c
-index eff993800b..4f7fe46494 100644
---- a/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c
-+++ b/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c
-@@ -204,3 +204,103 @@ enum raminit_status collect_spd_info(struct sysinfo *ctrl)
- 	get_spd_data(ctrl);
- 	return find_common_spd_parameters(ctrl);
- }
-+
-+#define MIN_CWL		5
-+#define MAX_CWL		12
-+
-+/* Except for tCK, hardware expects all timing values in DCLKs, not nanoseconds */
-+enum raminit_status convert_timings(struct sysinfo *ctrl)
-+{
-+	/*
-+	 * Obtain all required timing values, in DCLKs.
-+	 */
-+
-+	/* Convert primary timings from nanoseconds to DCLKs */
-+	ctrl->tAA  = DIV_ROUND_UP(ctrl->tAA,  ctrl->tCK);
-+	ctrl->tWR  = DIV_ROUND_UP(ctrl->tWR,  ctrl->tCK);
-+	ctrl->tRCD = DIV_ROUND_UP(ctrl->tRCD, ctrl->tCK);
-+	ctrl->tRRD = DIV_ROUND_UP(ctrl->tRRD, ctrl->tCK);
-+	ctrl->tRP  = DIV_ROUND_UP(ctrl->tRP,  ctrl->tCK);
-+	ctrl->tRAS = DIV_ROUND_UP(ctrl->tRAS, ctrl->tCK);
-+	ctrl->tRC  = DIV_ROUND_UP(ctrl->tRC,  ctrl->tCK);
-+	ctrl->tRFC = DIV_ROUND_UP(ctrl->tRFC, ctrl->tCK);
-+	ctrl->tWTR = DIV_ROUND_UP(ctrl->tWTR, ctrl->tCK);
-+	ctrl->tRTP = DIV_ROUND_UP(ctrl->tRTP, ctrl->tCK);
-+	ctrl->tFAW = DIV_ROUND_UP(ctrl->tFAW, ctrl->tCK);
-+	ctrl->tCWL = DIV_ROUND_UP(ctrl->tCWL, ctrl->tCK);
-+	ctrl->tCMD = DIV_ROUND_UP(ctrl->tCMD, ctrl->tCK);
-+
-+	/* Constrain primary timings to hardware limits */
-+	/** TODO: complain when clamping? **/
-+	ctrl->tAA  = clamp_u32(4,  ctrl->tAA,  24);
-+	ctrl->tWR  = clamp_u32(5,  ctrl->tWR,  16);
-+	ctrl->tRCD = clamp_u32(4,  ctrl->tRCD, 20);
-+	ctrl->tRRD = clamp_u32(4,  ctrl->tRRD, 65535);
-+	ctrl->tRP  = clamp_u32(4,  ctrl->tRP,  15);
-+	ctrl->tRAS = clamp_u32(10, ctrl->tRAS, 40);
-+	ctrl->tRC  = clamp_u32(1,  ctrl->tRC,  4095);
-+	ctrl->tRFC = clamp_u32(1,  ctrl->tRFC, 511);
-+	ctrl->tWTR = clamp_u32(4,  ctrl->tWTR, 10);
-+	ctrl->tRTP = clamp_u32(4,  ctrl->tRTP, 15);
-+	ctrl->tFAW = clamp_u32(10, ctrl->tFAW, 54);
-+
-+	/** TODO: Honor tREFI from XMP **/
-+	ctrl->tREFI = get_tREFI(ctrl->mem_clock_mhz);
-+	ctrl->tXP   =   get_tXP(ctrl->mem_clock_mhz);
-+
-+	/*
-+	 * Check some values, and adjust them if necessary.
-+	 */
-+
-+	/* If tWR cannot be written into DDR3 MR0, adjust it */
-+	switch (ctrl->tWR) {
-+	case  9:
-+	case 11:
-+	case 13:
-+	case 15:
-+		ctrl->tWR++;
-+	}
-+
-+	/* If tCWL is not supported or unspecified, look up a reasonable default */
-+	if (ctrl->tCWL < MIN_CWL || ctrl->tCWL > MAX_CWL)
-+		ctrl->tCWL = get_tCWL(ctrl->mem_clock_mhz);
-+
-+	/* This is needed to support ODT properly on 2DPC */
-+	if (ctrl->tAA - ctrl->tCWL > 4)
-+		ctrl->tCWL = ctrl->tAA - 4;
-+
-+	/* If tCMD is invalid, use a guesstimate default */
-+	if (!ctrl->tCMD) {
-+		ctrl->tCMD = MAX(ctrl->dpc[0], ctrl->dpc[1]);
-+		printk(RAM_DEBUG, "tCMD was zero, picking a guesstimate value\n");
-+	}
-+	ctrl->tCMD = clamp_u32(1, ctrl->tCMD, 3);
-+
-+	/*
-+	 * Print final timings.
-+	 */
-+
-+	/* tCK is special */
-+	printk(BIOS_DEBUG, "Selected tCK          : %u ps\n", ctrl->tCK * 1000 / 256);
-+
-+	/* Primary timings */
-+	printk(BIOS_DEBUG, "Selected tAA          : %uT\n", ctrl->tAA);
-+	printk(BIOS_DEBUG, "Selected tWR          : %uT\n", ctrl->tWR);
-+	printk(BIOS_DEBUG, "Selected tRCD         : %uT\n", ctrl->tRCD);
-+	printk(BIOS_DEBUG, "Selected tRRD         : %uT\n", ctrl->tRRD);
-+	printk(BIOS_DEBUG, "Selected tRP          : %uT\n", ctrl->tRP);
-+	printk(BIOS_DEBUG, "Selected tRAS         : %uT\n", ctrl->tRAS);
-+	printk(BIOS_DEBUG, "Selected tRC          : %uT\n", ctrl->tRC);
-+	printk(BIOS_DEBUG, "Selected tRFC         : %uT\n", ctrl->tRFC);
-+	printk(BIOS_DEBUG, "Selected tWTR         : %uT\n", ctrl->tWTR);
-+	printk(BIOS_DEBUG, "Selected tRTP         : %uT\n", ctrl->tRTP);
-+	printk(BIOS_DEBUG, "Selected tFAW         : %uT\n", ctrl->tFAW);
-+	printk(BIOS_DEBUG, "Selected tCWL         : %uT\n", ctrl->tCWL);
-+	printk(BIOS_DEBUG, "Selected tCMD         : %uT\n", ctrl->tCMD);
-+
-+	/* Derived timings */
-+	printk(BIOS_DEBUG, "Selected tREFI        : %uT\n", ctrl->tREFI);
-+	printk(BIOS_DEBUG, "Selected tXP          : %uT\n", ctrl->tXP);
-+
-+	return RAMINIT_STATUS_SUCCESS;
-+}
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0032-haswell-NRI-Configure-initial-MC-settings.patch b/config/coreboot/default/patches/0032-haswell-NRI-Configure-initial-MC-settings.patch
deleted file mode 100644
index e16f4e3d..00000000
--- a/config/coreboot/default/patches/0032-haswell-NRI-Configure-initial-MC-settings.patch
+++ /dev/null
@@ -1,1594 +0,0 @@
-From a4f5deb78c2d4132bf857c57ffd53684f942ba62 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sat, 7 May 2022 17:22:07 +0200
-Subject: [PATCH 32/51] haswell NRI: Configure initial MC settings
-
-Program initial memory controller settings. Many of these values will be
-adjusted later during training.
-
-Change-Id: If33846b51cb1bab5d0458fe626e13afb1bdc900e
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/Makefile.mk  |   2 +
- .../haswell/native_raminit/configure_mc.c     | 822 ++++++++++++++++++
- .../haswell/native_raminit/raminit_main.c     |   2 +
- .../haswell/native_raminit/raminit_native.h   | 101 +++
- .../haswell/native_raminit/reg_structs.h      | 405 +++++++++
- .../haswell/native_raminit/timings_refresh.c  |  13 +
- .../intel/haswell/registers/mchbar.h          |  94 ++
- 7 files changed, 1439 insertions(+)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/configure_mc.c
- create mode 100644 src/northbridge/intel/haswell/native_raminit/reg_structs.h
- create mode 100644 src/northbridge/intel/haswell/native_raminit/timings_refresh.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-index 2769e0bbb4..fc55277a65 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-@@ -1,8 +1,10 @@
- ## SPDX-License-Identifier: GPL-2.0-or-later
- 
-+romstage-y += configure_mc.c
- romstage-y += lookup_timings.c
- romstage-y += init_mpll.c
- romstage-y += io_comp_control.c
- romstage-y += raminit_main.c
- romstage-y += raminit_native.c
- romstage-y += spd_bitmunching.c
-+romstage-y += timings_refresh.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/configure_mc.c b/src/northbridge/intel/haswell/native_raminit/configure_mc.c
-new file mode 100644
-index 0000000000..88249725a7
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/configure_mc.c
-@@ -0,0 +1,822 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <assert.h>
-+#include <commonlib/bsd/clamp.h>
-+#include <console/console.h>
-+#include <delay.h>
-+#include <lib.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <string.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+
-+static void program_misc_control(struct sysinfo *ctrl)
-+{
-+	if (!is_hsw_ult())
-+		return;
-+
-+	const union ddr_scram_misc_control_reg ddr_scram_misc_ctrl = {
-+		.ddr_no_ch_interleave = !ctrl->dq_pins_interleaved,
-+		.lpddr_mode           = ctrl->lpddr,
-+		.cke_mapping_ch0      = ctrl->lpddr ? ctrl->lpddr_cke_rank_map[0] : 0,
-+		.cke_mapping_ch1      = ctrl->lpddr ? ctrl->lpddr_cke_rank_map[1] : 0,
-+	};
-+	mchbar_write32(DDR_SCRAM_MISC_CONTROL, ddr_scram_misc_ctrl.raw);
-+}
-+
-+static void program_mrc_revision(void)
-+{
-+	mchbar_write32(MRC_REVISION, 0x01090000);	/* MRC 1.9.0 Build 0 */
-+}
-+
-+static void program_ranks_used(struct sysinfo *ctrl)
-+{
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		mchbar_write8(MC_INIT_STATE_ch(channel), ctrl->rankmap[channel]);
-+		if (!does_ch_exist(ctrl, channel)) {
-+			mchbar_write32(DDR_CLK_ch_RANKS_USED(channel), 0);
-+			mchbar_write32(DDR_CTL_ch_CTL_RANKS_USED(channel), 0);
-+			mchbar_write32(DDR_CKE_ch_CTL_RANKS_USED(channel), 0);
-+			continue;
-+		}
-+		uint32_t clk_ranks_used = ctrl->rankmap[channel];
-+		if (ctrl->lpddr) {
-+			/* With LPDDR, the clock usage goes by group instead */
-+			clk_ranks_used = 0;
-+			for (uint8_t group = 0; group < NUM_GROUPS; group++) {
-+				if (ctrl->dq_byte_map[channel][CT_ITERATION_CLOCK][group])
-+					clk_ranks_used |= BIT(group);
-+			}
-+		}
-+		mchbar_write32(DDR_CLK_ch_RANKS_USED(channel), clk_ranks_used);
-+
-+		uint32_t ctl_ranks_used = ctrl->rankmap[channel];
-+		if (is_hsw_ult()) {
-+			/* Set ODT disable bits */
-+			/** TODO: May need to do this after JEDEC reset/init **/
-+			if (ctrl->lpddr && ctrl->lpddr_dram_odt)
-+				ctl_ranks_used |= 2 << 4;	/* ODT is used on rank 0 */
-+			else
-+				ctl_ranks_used |= 3 << 4;
-+		}
-+		mchbar_write32(DDR_CTL_ch_CTL_RANKS_USED(channel), ctl_ranks_used);
-+
-+		uint32_t cke_ranks_used = ctrl->rankmap[channel];
-+		if (ctrl->lpddr) {
-+			/* Use CKE-to-rank mapping for LPDDR */
-+			const uint8_t cke_rank_map = ctrl->lpddr_cke_rank_map[channel];
-+			cke_ranks_used = 0;
-+			for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+				/* ULT only has 2 ranks per channel */
-+				if (rank >= 2)
-+					break;
-+
-+				if (!rank_in_ch(ctrl, rank, channel))
-+					continue;
-+
-+				for (uint8_t cke = 0; cke < 4; cke++) {
-+					if (rank == ((cke_rank_map >> cke) & 1))
-+						cke_ranks_used |= BIT(cke);
-+				}
-+			}
-+		}
-+		mchbar_write32(DDR_CKE_ch_CTL_RANKS_USED(channel), cke_ranks_used);
-+	}
-+}
-+
-+static const uint8_t rxb_trad[2][5][4] = {
-+	{	/* Vdd low */
-+		/* 1067 MT/s,    1333 MT/s,    1600 MT/s,    1867 MT/s,    2133 MT/s, */
-+		{4, 3, 3, 2}, {4, 4, 3, 2}, {5, 4, 3, 3}, {5, 4, 4, 3}, {5, 4, 4, 3},
-+	},
-+	{	/* Vdd hi */
-+		/* 1067 MT/s,    1333 MT/s,    1600 MT/s,    1867 MT/s,    2133 MT/s, */
-+		{4, 3, 3, 2}, {4, 4, 3, 2}, {5, 4, 3, 3}, {5, 4, 4, 3}, {4, 4, 3, 3},
-+	},
-+};
-+
-+static const uint8_t rxb_ultx[2][3][4] = {
-+	{	/* Vdd low */
-+		/* 1067 MT/s,    1333 MT/s,    1600 MT/s, */
-+		{5, 6, 6, 5}, {5, 6, 6, 5}, {4, 6, 6, 6},
-+	},
-+	{	/* Vdd hi */
-+		/* 1067 MT/s,    1333 MT/s,    1600 MT/s, */
-+		{7, 6, 6, 5}, {7, 6, 6, 5}, {7, 6, 6, 6},
-+	},
-+};
-+
-+uint8_t get_rx_bias(const struct sysinfo *ctrl)
-+{
-+	const bool is_ult = is_hsw_ult();
-+	const bool vddhi  = ctrl->vdd_mv > 1350;
-+	const uint8_t max_rxf = is_ult ? ARRAY_SIZE(rxb_ultx[0]) : ARRAY_SIZE(rxb_trad[0]);
-+	const uint8_t ref_clk = ctrl->base_freq == 133 ? 4 : 6;
-+	const uint8_t rx_f    = clamp_s8(0, ctrl->multiplier - ref_clk, max_rxf - 1);
-+	const uint8_t rx_cb   = mchbar_read32(DDR_CLK_CB_STATUS) & 0x3;
-+	if (is_ult)
-+		return rxb_ultx[vddhi][rx_f][rx_cb];
-+	else
-+		return rxb_trad[vddhi][rx_f][rx_cb];
-+}
-+
-+static void program_ddr_data(struct sysinfo *ctrl, const bool dis_odt_static, const bool vddhi)
-+{
-+	const bool is_ult = is_hsw_ult();
-+
-+	for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+		if (!does_rank_exist(ctrl, rank))
-+			continue;
-+
-+		const union ddr_data_rx_train_rank_reg rx_train = {
-+			.rcven = 64,
-+			.dqs_p = 32,
-+			.dqs_n = 32,
-+		};
-+		mchbar_write32(DDR_DATA_RX_TRAIN_RANK(rank), rx_train.raw);
-+		mchbar_write32(DDR_DATA_RX_PER_BIT_RANK(rank), 0x88888888);
-+
-+		const union ddr_data_tx_train_rank_reg tx_train = {
-+			.tx_eq     = TXEQFULLDRV | 11,
-+			.dq_delay  = 96,
-+			.dqs_delay = 64,
-+		};
-+		mchbar_write32(DDR_DATA_TX_TRAIN_RANK(rank), tx_train.raw);
-+		mchbar_write32(DDR_DATA_TX_PER_BIT_RANK(rank), 0x88888888);
-+
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+				ctrl->tx_dq[channel][rank][byte] = tx_train.dq_delay;
-+				ctrl->txdqs[channel][rank][byte] = tx_train.dqs_delay;
-+				ctrl->tx_eq[channel][rank][byte] = tx_train.tx_eq;
-+
-+				ctrl->rcven[channel][rank][byte]  = rx_train.rcven;
-+				ctrl->rxdqsp[channel][rank][byte] = rx_train.dqs_p;
-+				ctrl->rxdqsn[channel][rank][byte] = rx_train.dqs_n;
-+				ctrl->rx_eq[channel][rank][byte]  = rx_train.rx_eq;
-+			}
-+		}
-+	}
-+	mchbar_write32(DDR_DATA_TX_XTALK, 0);
-+	mchbar_write32(DDR_DATA_RX_OFFSET_VDQ, 0x88888888);
-+	mchbar_write32(DDR_DATA_OFFSET_TRAIN, 0);
-+	mchbar_write32(DDR_DATA_OFFSET_COMP, 0);
-+
-+	const union ddr_data_control_0_reg data_control_0 = {
-+		.internal_clocks_on = !is_ult,
-+		.data_vccddq_hi     = vddhi,
-+		.disable_odt_static = dis_odt_static,
-+		.lpddr_mode         = ctrl->lpddr,
-+		.odt_samp_extend_en = ctrl->lpddr,
-+		.early_rleak_en     = ctrl->lpddr && ctrl->stepping >= STEPPING_C0,
-+	};
-+	mchbar_write32(DDR_DATA_CONTROL_0, data_control_0.raw);
-+
-+	const union ddr_data_control_1_reg data_control_1 = {
-+		.dll_mask             = 1,
-+		.rx_bias_ctl          = get_rx_bias(ctrl),
-+		.odt_delay            = -2,
-+		.odt_duration         = 7,
-+		.sense_amp_delay      = -2,
-+		.sense_amp_duration   = 7,
-+	};
-+	mchbar_write32(DDR_DATA_CONTROL_1, data_control_1.raw);
-+
-+	clear_data_offset_train_all(ctrl);
-+
-+	/* Stagger byte turn-on to reduce dI/dT */
-+	const uint8_t byte_stagger[] = { 0, 4, 1, 5, 2, 6, 3, 7, 8 };
-+	const uint8_t latency = 2 * ctrl->tAA - 6;
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		union ddr_data_control_2_reg data_control_2 = {
-+			.raw = 0,
-+		};
-+		if (is_ult) {
-+			data_control_2.rx_dqs_amp_offset = 8;
-+			data_control_2.rx_clk_stg_num    = 0x1f;
-+			data_control_2.leaker_comp       = ctrl->lpddr ? 3 : 0;
-+		}
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+			const uint8_t stg = latency * byte_stagger[byte] / ctrl->lanes;
-+			data_control_2.rx_stagger_ctl = stg & 0x1f;
-+			mchbar_write32(DQ_CONTROL_2(channel, byte), data_control_2.raw);
-+			ctrl->data_offset_comp[channel][byte] = 0;
-+			ctrl->dq_control_1[channel][byte] = data_control_1.raw;
-+			ctrl->dq_control_2[channel][byte] = data_control_2.raw;
-+		}
-+		ctrl->dq_control_0[channel] = data_control_0.raw;
-+	}
-+}
-+
-+static void program_vsshi_control(struct sysinfo *ctrl, const uint16_t vsshi_mv)
-+{
-+	const uint32_t vsshi_control_reg = is_hsw_ult() ? 0x366c : 0x306c;
-+	const union ddr_comp_vsshi_control_reg ddr_vsshi_control = {
-+		.vsshi_target    = (vsshi_mv * 192) / ctrl->vdd_mv - 20,
-+		.hi_bw_divider   = 1,
-+		.lo_bw_divider   = 1,
-+		.bw_error        = 2,
-+		.panic_driver_en = 1,
-+		.panic_voltage   = 24 / 8, /* Voltage in 8mV steps */
-+		.gain_boost      = 1,
-+	};
-+	mchbar_write32(vsshi_control_reg, ddr_vsshi_control.raw);
-+	mchbar_write32(DDR_COMP_VSSHI_CONTROL, ddr_vsshi_control.raw);
-+}
-+
-+static void calc_vt_slope_code(const uint16_t slope, uint8_t *best_a, uint8_t *best_b)
-+{
-+	const int16_t coding[] = {0, -125, -62, -31, 250, 125, 62, 31};
-+	*best_a = 0;
-+	*best_b = 0;
-+	int16_t best_err = slope;
-+	for (uint8_t b = 0; b < ARRAY_SIZE(coding); b++) {
-+		for (uint8_t a = b; a < ARRAY_SIZE(coding); a++) {
-+			int16_t	error = slope - (coding[a] + coding[b]);
-+			if (error < 0)
-+				error = -error;
-+
-+			if (error < best_err) {
-+				best_err = error;
-+				*best_a = a;
-+				*best_b = b;
-+			}
-+		}
-+	}
-+}
-+
-+static void program_dimm_vref(struct sysinfo *ctrl, const uint16_t vccio_mv, const bool vddhi)
-+{
-+	const bool is_ult = is_hsw_ult();
-+
-+	/* Static values for ULT */
-+	uint8_t vt_slope_a = 4;
-+	uint8_t vt_slope_b = 0;
-+	if (!is_ult) {
-+		/* On non-ULT, compute best slope code */
-+		const uint16_t vt_slope = 1500 * vccio_mv / ctrl->vdd_mv - 1000;
-+		calc_vt_slope_code(vt_slope, &vt_slope_a, &vt_slope_b);
-+	}
-+	const union ddr_data_vref_control_reg ddr_vref_control = {
-+		.hi_bw_divider  = is_ult ? 0 : 3,
-+		.lo_bw_divider  = 3,
-+		.sample_divider = is_ult ? 1 : 3,
-+		.slow_bw_error  = 1,
-+		.hi_bw_enable   = 1,
-+		.vt_slope_b     = vt_slope_b,
-+		.vt_slope_a     = vt_slope_a,
-+		.vt_offset      = 0,
-+	};
-+	mchbar_write32(is_ult ? 0xf68 : 0xf6c, ddr_vref_control.raw); /* Use CH1 byte 7 */
-+
-+	const union ddr_data_vref_adjust_reg ddr_vref_adjust = {
-+		.en_dimm_vref_ca  = 1,
-+		.en_dimm_vref_ch0 = 1,
-+		.en_dimm_vref_ch1 = 1,
-+		.vccddq_hi_qnnn_h = vddhi,
-+		.hi_z_timer_ctrl  = 3,
-+	};
-+	ctrl->dimm_vref = ddr_vref_adjust;
-+	mchbar_write32(DDR_DATA_VREF_ADJUST, ddr_vref_adjust.raw);
-+}
-+
-+static uint32_t pi_code(const uint32_t code)
-+{
-+	return code << 21 | code << 14 | code << 7 | code << 0;
-+}
-+
-+static void program_ddr_ca(struct sysinfo *ctrl, const bool vddhi)
-+{
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		const union ddr_clk_controls_reg ddr_clk_controls = {
-+			.dll_mask   = 1,
-+			.vccddq_hi  = vddhi,
-+			.lpddr_mode = ctrl->lpddr,
-+		};
-+		mchbar_write32(DDR_CLK_ch_CONTROLS(channel), ddr_clk_controls.raw);
-+
-+		const union ddr_cmd_controls_reg ddr_cmd_controls = {
-+			.dll_mask         = 1,
-+			.vccddq_hi        = vddhi,
-+			.lpddr_mode       = ctrl->lpddr,
-+			.early_weak_drive = 3,
-+			.cmd_tx_eq        = 1,
-+		};
-+		mchbar_write32(DDR_CMD_ch_CONTROLS(channel), ddr_cmd_controls.raw);
-+
-+		const union ddr_cke_ctl_controls_reg ddr_cke_controls = {
-+			.dll_mask         = 1,
-+			.vccddq_hi        = vddhi,
-+			.lpddr_mode       = ctrl->lpddr,
-+			.early_weak_drive = 3,
-+			.cmd_tx_eq        = 1,
-+			.ctl_tx_eq        = 1,
-+			.ctl_sr_drv       = 2,
-+		};
-+		mchbar_write32(DDR_CKE_ch_CTL_CONTROLS(channel), ddr_cke_controls.raw);
-+
-+		const union ddr_cke_ctl_controls_reg ddr_ctl_controls = {
-+			.dll_mask       = 1,
-+			.vccddq_hi      = vddhi,
-+			.lpddr_mode     = ctrl->lpddr,
-+			.ctl_tx_eq      = 1,
-+			.ctl_sr_drv     = 2,
-+			.la_drv_en_ovrd = 1,	/* Must be set on ULT */
-+		};
-+		mchbar_write32(DDR_CTL_ch_CTL_CONTROLS(channel), ddr_ctl_controls.raw);
-+
-+		const uint8_t cmd_pi = ctrl->lpddr ? 96 : 64;
-+		mchbar_write32(DDR_CMD_ch_PI_CODING(channel), pi_code(cmd_pi));
-+		mchbar_write32(DDR_CKE_ch_CMD_PI_CODING(channel), pi_code(cmd_pi));
-+		mchbar_write32(DDR_CKE_CTL_ch_CTL_PI_CODING(channel), pi_code(64));
-+		mchbar_write32(DDR_CLK_ch_PI_CODING(channel), pi_code(64));
-+
-+		mchbar_write32(DDR_CMD_ch_COMP_OFFSET(channel), 0);
-+		mchbar_write32(DDR_CLK_ch_COMP_OFFSET(channel), 0);
-+		mchbar_write32(DDR_CKE_CTL_ch_CTL_COMP_OFFSET(channel), 0);
-+
-+		for (uint8_t group = 0; group < NUM_GROUPS; group++) {
-+			ctrl->cke_cmd_pi_code[channel][group] = cmd_pi;
-+			ctrl->cmd_north_pi_code[channel][group] = cmd_pi;
-+			ctrl->cmd_south_pi_code[channel][group] = cmd_pi;
-+		}
-+		for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+			ctrl->clk_pi_code[channel][rank] = 64;
-+			ctrl->ctl_pi_code[channel][rank] = 64;
-+		}
-+	}
-+}
-+
-+enum {
-+	RCOMP_RD_ODT = 0,
-+	RCOMP_WR_DS_DQ,
-+	RCOMP_WR_DS_CMD,
-+	RCOMP_WR_DS_CTL,
-+	RCOMP_WR_DS_CLK,
-+	RCOMP_MAX_CODES,
-+};
-+
-+struct rcomp_info {
-+	uint8_t resistor;
-+	uint8_t sz_steps;
-+	uint8_t target_r;
-+	int8_t result;
-+};
-+
-+static void program_rcomp_vref(struct sysinfo *ctrl, const bool dis_odt_static)
-+{
-+	const bool is_ult = is_hsw_ult();
-+	/*
-+	 * +-------------------------------+
-+	 * | Rcomp resistor values in ohms |
-+	 * +-----------+------+------+-----+
-+	 * | Ball name | Trad | ULTX | Use |
-+	 * +-----------+------+------+-----+
-+	 * | SM_RCOMP0 | 100  | 200  | CMD |
-+	 * | SM_RCOMP1 |  75  | 120  | DQ  |
-+	 * | SM_RCOMP2 | 100  | 100  | ODT |
-+	 * +-----------+------+------+-----+
-+	 */
-+	struct rcomp_info rcomp_cfg[RCOMP_MAX_CODES] = {
-+		[RCOMP_RD_ODT] = {
-+			.resistor = 50,
-+			.sz_steps = 96,
-+			.target_r = 50,
-+		},
-+		[RCOMP_WR_DS_DQ] = {
-+			.resistor = 25,
-+			.sz_steps = 64,
-+			.target_r = 33,
-+		},
-+		[RCOMP_WR_DS_CMD] = {
-+			.resistor = 20,
-+			.sz_steps = 64,
-+			.target_r = 20,
-+		},
-+		[RCOMP_WR_DS_CTL] = {
-+			.resistor = 20,
-+			.sz_steps = 64,
-+			.target_r = 20,
-+		},
-+		[RCOMP_WR_DS_CLK] = {
-+			.resistor = 25,
-+			.sz_steps = 64,
-+			.target_r = 29,
-+		},
-+	};
-+	if (is_ult) {
-+		rcomp_cfg[RCOMP_WR_DS_DQ].resistor = 40;
-+		rcomp_cfg[RCOMP_WR_DS_DQ].target_r = 40;
-+		rcomp_cfg[RCOMP_WR_DS_CLK].resistor = 40;
-+	} else if (ctrl->dpc[0] == 2 || ctrl->dpc[1] == 2) {
-+		rcomp_cfg[RCOMP_RD_ODT].target_r = 60;
-+	}
-+	for (uint8_t i = 0; i < RCOMP_MAX_CODES; i++) {
-+		struct rcomp_info *const r = &rcomp_cfg[i];
-+		const int32_t div = 2 * (r->resistor + r->target_r);
-+		assert(div);
-+		const int32_t vref = (r->sz_steps * (r->resistor - r->target_r)) / div;
-+
-+		/* DqOdt is 5 bits wide, the other Rcomp targets are 4 bits wide */
-+		const int8_t comp_limit = i == RCOMP_RD_ODT ? 16 : 8;
-+		r->result = clamp_s32(-comp_limit, vref, comp_limit - 1);
-+	}
-+	const union ddr_comp_ctl_0_reg ddr_comp_ctl_0 = {
-+		.disable_odt_static = dis_odt_static,
-+		.dq_drv_vref        = rcomp_cfg[RCOMP_WR_DS_DQ].result,
-+		.dq_odt_vref        = rcomp_cfg[RCOMP_RD_ODT].result,
-+		.cmd_drv_vref       = rcomp_cfg[RCOMP_WR_DS_CMD].result,
-+		.ctl_drv_vref       = rcomp_cfg[RCOMP_WR_DS_CTL].result,
-+		.clk_drv_vref       = rcomp_cfg[RCOMP_WR_DS_CLK].result,
-+	};
-+	ctrl->comp_ctl_0 = ddr_comp_ctl_0;
-+	mchbar_write32(DDR_COMP_CTL_0, ctrl->comp_ctl_0.raw);
-+}
-+
-+enum {
-+	SCOMP_DQ = 0,
-+	SCOMP_CMD,
-+	SCOMP_CTL,
-+	SCOMP_CLK,
-+	SCOMP_MAX_CODES,
-+};
-+
-+static void program_slew_rates(struct sysinfo *ctrl, const bool vddhi)
-+{
-+	const uint8_t min_cycle_delay[SCOMP_MAX_CODES] = { 46, 70, 70, 46 };
-+	uint8_t buffer_stage_delay_ps[SCOMP_MAX_CODES] = { 59, 53, 53, 53 };
-+	uint16_t comp_slew_rate_codes[SCOMP_MAX_CODES];
-+
-+	/* CMD Slew Rate = 1.8 for 2N */
-+	if (ctrl->tCMD == 2)
-+		buffer_stage_delay_ps[SCOMP_CMD] = 89;
-+
-+	/* CMD Slew Rate = 4 V/ns for double-pumped CMD bus */
-+	if (ctrl->lpddr)
-+		buffer_stage_delay_ps[SCOMP_CMD] = 63;
-+
-+	for (uint8_t i = 0; i < SCOMP_MAX_CODES; i++) {
-+		uint16_t stages = DIV_ROUND_CLOSEST(ctrl->qclkps, buffer_stage_delay_ps[i]);
-+		if (stages < 5)
-+			stages = 5;
-+
-+		bool dll_pc = buffer_stage_delay_ps[i] < min_cycle_delay[i] || stages > 16;
-+
-+		/* Lock DLL... */
-+		if (dll_pc)
-+			comp_slew_rate_codes[i] = stages / 2 - 1;        /* to a phase */
-+		else
-+			comp_slew_rate_codes[i] = (stages - 1) | BIT(4); /* to a cycle */
-+	}
-+	union ddr_comp_ctl_1_reg ddr_comp_ctl_1 = {
-+		.dq_scomp       = comp_slew_rate_codes[SCOMP_DQ],
-+		.cmd_scomp      = comp_slew_rate_codes[SCOMP_CMD],
-+		.ctl_scomp      = comp_slew_rate_codes[SCOMP_CTL],
-+		.clk_scomp      = comp_slew_rate_codes[SCOMP_CLK],
-+		.vccddq_hi      = vddhi,
-+	};
-+	ctrl->comp_ctl_1 = ddr_comp_ctl_1;
-+	mchbar_write32(DDR_COMP_CTL_1, ctrl->comp_ctl_1.raw);
-+}
-+
-+static uint32_t ln_x100(const uint32_t input_x100)
-+{
-+	uint32_t val = input_x100;
-+	uint32_t ret = 0;
-+	while (val > 271) {
-+		val = (val * 1000) / 2718;
-+		ret += 100;
-+	}
-+	return ret + (-16 * val * val + 11578 * val - 978860) / 10000;
-+}
-+
-+static uint32_t compute_vsshi_vref(struct sysinfo *ctrl, const uint32_t vsshi_tgt, bool up)
-+{
-+	const uint32_t delta = 15;
-+	const uint32_t c_die_vsshi = 2000;
-+	const uint32_t r_cmd_ref = 100 * 10;
-+	const uint32_t offset = up ? 64 : 0;
-+	const uint32_t ln_vsshi = ln_x100((100 * vsshi_tgt) / (vsshi_tgt - delta));
-+	const uint32_t r_target = (ctrl->qclkps * 2000) / (c_die_vsshi * ln_vsshi);
-+	const uint32_t r_dividend = 128 * (up ? r_cmd_ref : r_target);
-+	return r_dividend / (r_cmd_ref + r_target) - offset;
-+}
-+
-+static void program_vsshi(struct sysinfo *ctrl, const uint16_t vccio_mv, const uint16_t vsshi)
-+{
-+	const uint16_t vsshi_down = vsshi + 24; /* Panic threshold of 24 mV */
-+	const uint16_t vsshi_up = vccio_mv - vsshi_down;
-+	const union ddr_comp_vsshi_reg ddr_comp_vsshi = {
-+		.panic_drv_down_vref = compute_vsshi_vref(ctrl, vsshi_down, false),
-+		.panic_drv_up_vref   = compute_vsshi_vref(ctrl, vsshi_up, true),
-+		.vt_offset           = 128 * 450 / vccio_mv / 2,
-+		.vt_slope_a          = 4,
-+	};
-+	mchbar_write32(DDR_COMP_VSSHI, ddr_comp_vsshi.raw);
-+}
-+
-+static void program_misc(struct sysinfo *ctrl)
-+{
-+	ctrl->misc_control_0.raw = mchbar_read32(DDR_SCRAM_MISC_CONTROL);
-+	ctrl->misc_control_0.weaklock_latency = 12;
-+	ctrl->misc_control_0.wl_sleep_cycles  =  5;
-+	ctrl->misc_control_0.wl_wake_cycles   =  2;
-+	mchbar_write32(DDR_SCRAM_MISC_CONTROL, ctrl->misc_control_0.raw);
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		/* Keep scrambling disabled for training */
-+		mchbar_write32(DDR_SCRAMBLE_ch(channel), 0);
-+	}
-+}
-+
-+/* Very weird, application-specific function */
-+static void override_comp(uint32_t value, uint32_t width, uint32_t shift, uint32_t offset)
-+{
-+	const uint32_t mask = (1 << width) - 1;
-+	uint32_t reg32 = mchbar_read32(offset);
-+	reg32 &= ~(mask << shift);
-+	reg32 |= (value << shift);
-+	mchbar_write32(offset, reg32);
-+}
-+
-+static void program_ls_comp(struct sysinfo *ctrl)
-+{
-+	/* Disable periodic COMP */
-+	const union pcu_comp_reg m_comp = {
-+		.comp_disable  = 1,
-+		.comp_interval = COMP_INT,
-+		.comp_force    = 1,
-+	};
-+	mchbar_write32(M_COMP, m_comp.raw);
-+	udelay(10);
-+
-+	/* Override level shifter compensation */
-+	const uint32_t ls_comp = 2;
-+	override_comp(ls_comp, 3, 28, DDR_DATA_RCOMP_DATA_1);
-+	override_comp(ls_comp, 3, 24, DDR_CMD_COMP);
-+	override_comp(ls_comp, 3, 24, DDR_CKE_CTL_COMP);
-+	override_comp(ls_comp, 3, 23, DDR_CLK_COMP);
-+	override_comp(ls_comp, 3, 28, DDR_COMP_DATA_COMP_1);
-+	override_comp(ls_comp, 3, 24, DDR_COMP_CMD_COMP);
-+	override_comp(ls_comp, 4, 24, DDR_COMP_CTL_COMP);
-+	override_comp(ls_comp, 4, 23, DDR_COMP_CLK_COMP);
-+	override_comp(ls_comp, 3, 24, DDR_COMP_OVERRIDE);
-+
-+	/* Manually update the COMP values */
-+	union ddr_scram_misc_control_reg ddr_scram_misc_ctrl = ctrl->misc_control_0;
-+	ddr_scram_misc_ctrl.force_comp_update = 1;
-+	mchbar_write32(DDR_SCRAM_MISC_CONTROL, ddr_scram_misc_ctrl.raw);
-+
-+	/* Use a fixed offset between ODT Up/Dn */
-+	const union ddr_comp_data_comp_1_reg data_comp_1 = {
-+		.raw = mchbar_read32(DDR_COMP_DATA_COMP_1),
-+	};
-+	const uint32_t odt_offset = data_comp_1.rcomp_odt_down - data_comp_1.rcomp_odt_up;
-+	ctrl->comp_ctl_0.odt_up_down_off  = odt_offset;
-+	ctrl->comp_ctl_0.fixed_odt_offset = 1;
-+	mchbar_write32(DDR_COMP_CTL_0, ctrl->comp_ctl_0.raw);
-+}
-+
-+/** TODO: Deduplicate PCODE stuff, it's already implemented in CPU code **/
-+static bool pcode_ready(void)
-+{
-+	const unsigned int delay_step = 10;
-+	for (unsigned int i = 0; i < 1000; i += delay_step) {
-+		if (!(mchbar_read32(BIOS_MAILBOX_INTERFACE) & MAILBOX_RUN_BUSY))
-+			return true;
-+
-+		udelay(delay_step);
-+	};
-+	return false;
-+}
-+
-+static uint32_t pcode_mailbox_read(const uint32_t command)
-+{
-+	if (!pcode_ready()) {
-+		printk(BIOS_ERR, "PCODE: mailbox timeout on wait ready\n");
-+		return 0;
-+	}
-+	mchbar_write32(BIOS_MAILBOX_INTERFACE, command | MAILBOX_RUN_BUSY);
-+	if (!pcode_ready()) {
-+		printk(BIOS_ERR, "PCODE: mailbox timeout on completion\n");
-+		return 0;
-+	}
-+	return mchbar_read32(BIOS_MAILBOX_DATA);
-+}
-+
-+static int pcode_mailbox_write(const uint32_t command, const uint32_t data)
-+{
-+	if (!pcode_ready()) {
-+		printk(BIOS_ERR, "PCODE: mailbox timeout on wait ready\n");
-+		return -1;
-+	}
-+	mchbar_write32(BIOS_MAILBOX_DATA, data);
-+	mchbar_write32(BIOS_MAILBOX_INTERFACE, command | MAILBOX_RUN_BUSY);
-+	if (!pcode_ready()) {
-+		printk(BIOS_ERR, "PCODE: mailbox timeout on completion\n");
-+		return -1;
-+	}
-+	return 0;
-+}
-+
-+static void enable_2x_refresh(struct sysinfo *ctrl)
-+{
-+	if (!CONFIG(ENABLE_DDR_2X_REFRESH))
-+		return;
-+
-+	printk(BIOS_DEBUG, "Enabling 2x Refresh\n");
-+	const bool asr = ctrl->flags.asr;
-+	const bool lpddr = ctrl->lpddr;
-+
-+	/* Mutually exclusive */
-+	assert(!asr || !lpddr);
-+	if (!asr) {
-+		uint32_t reg32 = pcode_mailbox_read(MAILBOX_BIOS_CMD_READ_DDR_2X_REFRESH);
-+		if (!(reg32 & BIT(31))) {	/** TODO: What to do if this is locked? **/
-+			reg32 |= BIT(0);	/* Enable 2x refresh */
-+			reg32 |= BIT(31);	/* Lock */
-+
-+			if (lpddr)
-+				reg32 |= 4 << 1;	/* LPDDR MR4 1/2 tREFI */
-+
-+			if (pcode_mailbox_write(MAILBOX_BIOS_CMD_WRITE_DDR_2X_REFRESH, reg32))
-+				printk(BIOS_ERR, "Could not enable Mailbox 2x Refresh\n");
-+		}
-+		if (!lpddr)
-+			return;
-+	}
-+	assert(asr || lpddr);
-+	uint16_t refi_reduction = 50;
-+	if (lpddr) {
-+		refi_reduction = 97;
-+		mchbar_clrbits32(PCU_DDR_PTM_CTL, 1 << 7); /* DISABLE_DRAM_TS */
-+	}
-+	/** TODO: Remember why this is only done on cold boots **/
-+	if (ctrl->bootmode == BOOTMODE_COLD) {
-+		ctrl->tREFI *= refi_reduction;
-+		ctrl->tREFI /= 100;
-+	}
-+}
-+
-+static void set_pcu_ddr_voltage(const uint16_t vdd_mv)
-+{
-+	/** TODO: Handle other voltages? **/
-+	uint32_t pcu_ddr_voltage;
-+	switch (vdd_mv) {
-+	case 1200:
-+		pcu_ddr_voltage = 3;
-+		break;
-+	case 1350:
-+		pcu_ddr_voltage = 1;
-+		break;
-+	default:
-+	case 1500:
-+		pcu_ddr_voltage = 0;
-+		break;
-+	}
-+	/* Set bits 0..2 */
-+	mchbar_write32(PCU_DDR_VOLTAGE, pcu_ddr_voltage);
-+}
-+
-+static void program_scheduler(struct sysinfo *ctrl)
-+{
-+	/*
-+	 * ZQ calibration needs to be serialized for LPDDR3. Otherwise,
-+	 * the processor issues LPDDR3 ZQ calibration in parallel when
-+	 * exiting Package C7 or deeper. This causes problems for dual
-+	 * and quad die packages since all ranks share the same ZQ pin.
-+	 *
-+	 * Erratum HSM94: LPDDR3 ZQ Calibration Following Deep Package
-+	 * C-state Exit May Lead to Unpredictable System Behavior
-+	 */
-+	const union mcscheds_cbit_reg mcscheds_cbit = {
-+		.dis_write_gap = 1,
-+		.dis_odt       = is_hsw_ult() && !(ctrl->lpddr && ctrl->lpddr_dram_odt),
-+		.serialize_zq  = ctrl->lpddr,
-+	};
-+	mchbar_write32(MCSCHEDS_CBIT, mcscheds_cbit.raw);
-+	mchbar_write32(MCMNTS_SC_WDBWM, 0x553c3038);
-+	if (ctrl->lpddr) {
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!does_ch_exist(ctrl, channel))
-+				continue;
-+
-+			union mcmain_command_rate_limit_reg cmd_rate_limit = {
-+				.raw = mchbar_read32(COMMAND_RATE_LIMIT_ch(channel)),
-+			};
-+			cmd_rate_limit.enable_cmd_limit = 1;
-+			cmd_rate_limit.cmd_rate_limit   = 3;
-+			mchbar_write32(COMMAND_RATE_LIMIT_ch(channel), cmd_rate_limit.raw);
-+		}
-+	}
-+}
-+
-+static uint8_t biggest_channel(const struct sysinfo *const ctrl)
-+{
-+	_Static_assert(NUM_CHANNELS == 2, "Code assumes exactly two channels");
-+	return !!(ctrl->channel_size_mb[0] < ctrl->channel_size_mb[1]);
-+}
-+
-+static void dram_zones(struct sysinfo *ctrl)
-+{
-+	/** TODO: Activate channel hash here, if enabled **/
-+	const uint8_t biggest = biggest_channel(ctrl);
-+	const uint8_t smaller = !biggest;
-+
-+	/** TODO: Use stacked mode if Memory Trace is enabled **/
-+	const union mad_chnl_reg mad_channel = {
-+		.ch_a       = biggest,
-+		.ch_b       = smaller,
-+		.ch_c       = 2,
-+		.lpddr_mode = ctrl->lpddr,
-+	};
-+	mchbar_write32(MAD_CHNL, mad_channel.raw);
-+
-+	const uint8_t channel_b_zone_size = ctrl->channel_size_mb[smaller] / 256;
-+	const union mad_zr_reg mad_zr = {
-+		.ch_b_double = channel_b_zone_size * 2,
-+		.ch_b_single = channel_b_zone_size,
-+	};
-+	mchbar_write32(MAD_ZR, mad_zr.raw);
-+}
-+
-+static uint8_t biggest_dimm(const struct raminit_dimm_info *dimms)
-+{
-+	_Static_assert(NUM_SLOTS <= 2, "Code assumes at most two DIMMs per channel.");
-+	if (NUM_SLOTS == 1)
-+		return 0;
-+
-+	return !!(dimms[0].data.size_mb < dimms[1].data.size_mb);
-+}
-+
-+static void dram_dimm_mapping(struct sysinfo *ctrl)
-+{
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel)) {
-+			const union mad_dimm_reg mad_dimm = {
-+				.rank_interleave = 1,
-+				.enh_interleave  = 1,
-+			};
-+			mchbar_write32(MAD_DIMM(channel), mad_dimm.raw);
-+			continue;
-+		}
-+		const uint8_t biggest = biggest_dimm(ctrl->dimms[channel]);
-+		const uint8_t smaller = !biggest;
-+		const struct dimm_attr_ddr3_st *dimm_a = &ctrl->dimms[channel][biggest].data;
-+		const struct dimm_attr_ddr3_st *dimm_b = &ctrl->dimms[channel][smaller].data;
-+		union mad_dimm_reg mad_dimm = {
-+			.dimm_a_size     = dimm_a->size_mb / 256,
-+			.dimm_b_size     = dimm_b->size_mb / 256,
-+			.dimm_a_sel      = biggest,
-+			.dimm_a_ranks    = dimm_a->ranks == 2,
-+			.dimm_b_ranks    = dimm_b->ranks == 2,
-+			.dimm_a_width    = dimm_a->width == 16,
-+			.dimm_b_width    = dimm_b->width == 16,
-+			.rank_interleave = 1,
-+			.enh_interleave  = 1,
-+			.ecc_mode        = 0,	/* Do not enable ECC yet */
-+		};
-+		if (is_hsw_ult())
-+			mad_dimm.dimm_b_width = mad_dimm.dimm_a_width;
-+
-+		mchbar_write32(MAD_DIMM(channel), mad_dimm.raw);
-+		if (ctrl->lpddr)
-+			die("%s: Missing LPDDR support (LPDDR_MR_PARAMS)\n", __func__);
-+	}
-+}
-+
-+enum raminit_status configure_mc(struct sysinfo *ctrl)
-+{
-+	const uint16_t vccio_mv = 1000;
-+	const uint16_t vsshi_mv = ctrl->vdd_mv - 950;
-+	const bool dis_odt_static = is_hsw_ult(); /* Disable static ODT legs on ULT */
-+	const bool vddhi = ctrl->vdd_mv > 1350;
-+
-+	program_misc_control(ctrl);
-+	program_mrc_revision();
-+	program_ranks_used(ctrl);
-+	program_ddr_data(ctrl, dis_odt_static, vddhi);
-+	program_vsshi_control(ctrl, vsshi_mv);
-+	program_dimm_vref(ctrl, vccio_mv, vddhi);
-+	program_ddr_ca(ctrl, vddhi);
-+	program_rcomp_vref(ctrl, dis_odt_static);
-+	program_slew_rates(ctrl, vddhi);
-+	program_vsshi(ctrl, vccio_mv, vsshi_mv);
-+	program_misc(ctrl);
-+	program_ls_comp(ctrl);
-+	enable_2x_refresh(ctrl);
-+	set_pcu_ddr_voltage(ctrl->vdd_mv);
-+	configure_timings(ctrl);
-+	configure_refresh(ctrl);
-+	program_scheduler(ctrl);
-+	dram_zones(ctrl);
-+	dram_dimm_mapping(ctrl);
-+
-+	return RAMINIT_STATUS_SUCCESS;
-+}
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 2fea658415..fcc981ad04 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -22,6 +22,7 @@ static const struct task_entry cold_boot[] = {
- 	{ collect_spd_info,                                       true, "PROCSPD",    },
- 	{ initialise_mpll,                                        true, "INITMPLL",   },
- 	{ convert_timings,                                        true, "CONVTIM",    },
-+	{ configure_mc,                                           true, "CONFMC",     },
- };
- 
- /* Return a generic stepping value to make stepping checks simpler */
-@@ -53,6 +54,7 @@ static void initialize_ctrl(struct sysinfo *ctrl)
- 
- 	ctrl->cpu = cpu_get_cpuid();
- 	ctrl->stepping = get_stepping(ctrl->cpu);
-+	ctrl->vdd_mv = is_hsw_ult() ? 1350 : 1500; /** FIXME: Hardcoded, does it matter? **/
- 	ctrl->dq_pins_interleaved = cfg->dq_pins_interleaved;
- 	ctrl->bootmode = bootmode;
- }
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index e0ebd3a2a7..fffa6d5450 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -3,16 +3,41 @@
- #ifndef HASWELL_RAMINIT_NATIVE_H
- #define HASWELL_RAMINIT_NATIVE_H
- 
-+#include <assert.h>
- #include <device/dram/ddr3.h>
- #include <northbridge/intel/haswell/haswell.h>
-+#include <string.h>
-+#include <types.h>
-+
-+#include "reg_structs.h"
- 
- /** TODO (Angel): Remove this after in-review patches are submitted **/
- #define SPD_LEN SPD_SIZE_MAX_DDR3
- 
-+/* Each channel has 4 ranks, spread across 2 slots */
-+#define NUM_SLOTRANKS		4
-+
-+#define NUM_GROUPS		2
-+
- /* 8 data lanes + 1 ECC lane */
- #define NUM_LANES		9
- #define NUM_LANES_NO_ECC	8
- 
-+#define COMP_INT		10
-+
-+/* Always use 12 legs for emphasis (not trained) */
-+#define TXEQFULLDRV		(3 << 4)
-+
-+enum command_training_iteration {
-+	CT_ITERATION_CLOCK = 0,
-+	CT_ITERATION_CMD_NORTH,
-+	CT_ITERATION_CMD_SOUTH,
-+	CT_ITERATION_CKE,
-+	CT_ITERATION_CTL,
-+	CT_ITERATION_CMD_VREF,
-+	MAX_CT_ITERATION,
-+};
-+
- enum raminit_boot_mode {
- 	BOOTMODE_COLD,
- 	BOOTMODE_WARM,
-@@ -58,6 +83,9 @@ struct sysinfo {
- 	 * LPDDR-specific functions have stubs which will halt upon execution.
- 	 */
- 	bool lpddr;
-+	bool lpddr_dram_odt;
-+	uint8_t lpddr_cke_rank_map[NUM_CHANNELS];
-+	uint8_t dq_byte_map[NUM_CHANNELS][MAX_CT_ITERATION][2];
- 
- 	struct raminit_dimm_info dimms[NUM_CHANNELS][NUM_SLOTS];
- 	union dimm_flags_ddr3_st flags;
-@@ -94,16 +122,89 @@ struct sysinfo {
- 	uint32_t mem_clock_mhz;
- 	uint32_t mem_clock_fs;		/* Memory clock period in femtoseconds */
- 	uint32_t qclkps;		/* Quadrature clock period in picoseconds */
-+
-+	uint16_t vdd_mv;
-+
-+	union ddr_scram_misc_control_reg misc_control_0;
-+
-+	union ddr_comp_ctl_0_reg comp_ctl_0;
-+	union ddr_comp_ctl_1_reg comp_ctl_1;
-+
-+	union ddr_data_vref_adjust_reg dimm_vref;
-+
-+	uint32_t data_offset_train[NUM_CHANNELS][NUM_LANES];
-+	uint32_t data_offset_comp[NUM_CHANNELS][NUM_LANES];
-+
-+	uint32_t dq_control_0[NUM_CHANNELS];
-+	uint32_t dq_control_1[NUM_CHANNELS][NUM_LANES];
-+	uint32_t dq_control_2[NUM_CHANNELS][NUM_LANES];
-+
-+	uint16_t tx_dq[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES];
-+	uint16_t txdqs[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES];
-+	uint8_t  tx_eq[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES];
-+
-+	uint16_t rcven[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES];
-+	uint8_t  rx_eq[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES];
-+	uint8_t rxdqsp[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES];
-+	uint8_t rxdqsn[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES];
-+	int8_t  rxvref[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES];
-+
-+	uint8_t clk_pi_code[NUM_CHANNELS][NUM_SLOTRANKS];
-+	uint8_t ctl_pi_code[NUM_CHANNELS][NUM_SLOTRANKS];
-+	uint8_t cke_pi_code[NUM_CHANNELS][NUM_SLOTRANKS];
-+
-+	uint8_t cke_cmd_pi_code[NUM_CHANNELS][NUM_GROUPS];
-+	uint8_t cmd_north_pi_code[NUM_CHANNELS][NUM_GROUPS];
-+	uint8_t cmd_south_pi_code[NUM_CHANNELS][NUM_GROUPS];
- };
- 
-+static inline bool is_hsw_ult(void)
-+{
-+	return CONFIG(INTEL_LYNXPOINT_LP);
-+}
-+
-+static inline bool rank_in_mask(uint8_t rank, uint8_t rankmask)
-+{
-+	assert(rank < NUM_SLOTRANKS);
-+	return !!(BIT(rank) & rankmask);
-+}
-+
-+static inline bool does_ch_exist(const struct sysinfo *ctrl, uint8_t channel)
-+{
-+	return !!ctrl->dpc[channel];
-+}
-+
-+static inline bool does_rank_exist(const struct sysinfo *ctrl, uint8_t rank)
-+{
-+	return rank_in_mask(rank, ctrl->rankmap[0] | ctrl->rankmap[1]);
-+}
-+
-+static inline bool rank_in_ch(const struct sysinfo *ctrl, uint8_t rank, uint8_t channel)
-+{
-+	assert(channel < NUM_CHANNELS);
-+	return rank_in_mask(rank, ctrl->rankmap[channel]);
-+}
-+
-+/** TODO: Handling of data_offset_train could be improved, also coupled with reg updates **/
-+static inline void clear_data_offset_train_all(struct sysinfo *ctrl)
-+{
-+	memset(ctrl->data_offset_train, 0, sizeof(ctrl->data_offset_train));
-+}
-+
- void raminit_main(enum raminit_boot_mode bootmode);
- 
- enum raminit_status collect_spd_info(struct sysinfo *ctrl);
- enum raminit_status initialise_mpll(struct sysinfo *ctrl);
- enum raminit_status convert_timings(struct sysinfo *ctrl);
-+enum raminit_status configure_mc(struct sysinfo *ctrl);
-+
-+void configure_timings(struct sysinfo *ctrl);
-+void configure_refresh(struct sysinfo *ctrl);
- 
- enum raminit_status wait_for_first_rcomp(void);
- 
-+uint8_t get_rx_bias(const struct sysinfo *ctrl);
-+
- uint8_t get_tCWL(uint32_t mem_clock_mhz);
- uint32_t get_tREFI(uint32_t mem_clock_mhz);
- uint32_t get_tXP(uint32_t mem_clock_mhz);
-diff --git a/src/northbridge/intel/haswell/native_raminit/reg_structs.h b/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-new file mode 100644
-index 0000000000..d11cda4b3d
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-@@ -0,0 +1,405 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#ifndef HASWELL_RAMINIT_REG_STRUCTS_H
-+#define HASWELL_RAMINIT_REG_STRUCTS_H
-+
-+union ddr_data_rx_train_rank_reg {
-+	struct __packed {
-+		uint32_t rcven : 9; // Bits  8:0
-+		uint32_t dqs_p : 6; // Bits 14:9
-+		uint32_t rx_eq : 5; // Bits 19:15
-+		uint32_t dqs_n : 6; // Bits 25:20
-+		int32_t  vref  : 6; // Bits 31:26
-+	};
-+	uint32_t raw;
-+};
-+
-+union ddr_data_tx_train_rank_reg {
-+	struct __packed {
-+		uint32_t dq_delay  : 9; // Bits  8:0
-+		uint32_t dqs_delay : 9; // Bits 17:9
-+		uint32_t           : 2; // Bits 19:18
-+		uint32_t tx_eq     : 6; // Bits 25:20
-+		uint32_t           : 6; // Bits 31:26
-+	};
-+	uint32_t raw;
-+};
-+
-+union ddr_data_control_0_reg {
-+	struct __packed {
-+		uint32_t rx_training_mode      : 1; // Bits  0:0
-+		uint32_t wl_training_mode      : 1; // Bits  1:1
-+		uint32_t rl_training_mode      : 1; // Bits  2:2
-+		uint32_t samp_train_mode       : 1; // Bits  3:3
-+		uint32_t tx_on                 : 1; // Bits  4:4
-+		uint32_t rf_on                 : 1; // Bits  5:5
-+		uint32_t rx_pi_on              : 1; // Bits  6:6
-+		uint32_t tx_pi_on              : 1; // Bits  7:7
-+		uint32_t internal_clocks_on    : 1; // Bits  8:8
-+		uint32_t repeater_clocks_on    : 1; // Bits  9:9
-+		uint32_t tx_disable            : 1; // Bits 10:10
-+		uint32_t rx_disable            : 1; // Bits 11:11
-+		uint32_t tx_long               : 1; // Bits 12:12
-+		uint32_t rx_dqs_ctle           : 2; // Bits 14:13
-+		uint32_t rx_read_pointer       : 3; // Bits 17:15
-+		uint32_t driver_segment_enable : 1; // Bits 18:18
-+		uint32_t data_vccddq_hi        : 1; // Bits 19:19
-+		uint32_t read_rf_rd            : 1; // Bits 20:20
-+		uint32_t read_rf_wr            : 1; // Bits 21:21
-+		uint32_t read_rf_rank          : 2; // Bits 23:22
-+		uint32_t force_odt_on          : 1; // Bits 24:24
-+		uint32_t odt_samp_off          : 1; // Bits 25:25
-+		uint32_t disable_odt_static    : 1; // Bits 26:26
-+		uint32_t ddr_cr_force_odt_on   : 1; // Bits 27:27
-+		uint32_t lpddr_mode            : 1; // Bits 28:28
-+		uint32_t en_read_preamble      : 1; // Bits 29:29
-+		uint32_t odt_samp_extend_en    : 1; // Bits 30:30
-+		uint32_t early_rleak_en        : 1; // Bits 31:31
-+	};
-+	uint32_t raw;
-+};
-+
-+union ddr_data_control_1_reg {
-+	struct __packed {
-+		int32_t  ref_pi               : 4; // Bits 3:0
-+		uint32_t dll_mask             : 2; // Bits 5:4
-+		uint32_t dll_weaklock         : 1; // Bits 6:6
-+		uint32_t sdll_segment_disable : 3; // Bits 9:7
-+		uint32_t rx_bias_ctl          : 3; // Bits 12:10
-+		int32_t  odt_delay            : 4; // Bits 16:13
-+		uint32_t odt_duration         : 3; // Bits 19:17
-+		int32_t  sense_amp_delay      : 4; // Bits 23:20
-+		uint32_t sense_amp_duration   : 3; // Bits 26:24
-+		uint32_t burst_end_odt_delay  : 3; // Bits 29:27   *** TODO: Check Broadwell ***
-+		uint32_t lpddr_long_odt_en    : 1; // Bits 30:30
-+		uint32_t                      : 1; // Bits 31:31
-+	};
-+	uint32_t raw;
-+};
-+
-+/* NOTE: Bits 31:19 are only valid for Broadwell onwards */
-+union ddr_data_control_2_reg {
-+	struct __packed {
-+		uint32_t rx_stagger_ctl    : 5; // Bits  4:0
-+		uint32_t force_bias_on     : 1; // Bits  5:5
-+		uint32_t force_rx_on       : 1; // Bits  6:6
-+		uint32_t leaker_comp       : 2; // Bits  8:7
-+		uint32_t rx_dqs_amp_offset : 4; // Bits 12:9
-+		uint32_t rx_clk_stg_num    : 5; // Bits 17:13
-+		uint32_t wl_long_delay     : 1; // Bits 18:18
-+		uint32_t enable_vref_pwrdn : 1; // Bits 19:19
-+		uint32_t ddr4_mode         : 1; // Bits 20:20
-+		uint32_t en_vddq_odt       : 1; // Bits 21:21
-+		uint32_t en_vtt_odt        : 1; // Bits 22:22
-+		uint32_t en_const_z_eq_tx  : 1; // Bits 23:23
-+		uint32_t tx_eq_dis         : 1; // Bits 24:24
-+		uint32_t rx_vref_prog_mfc  : 1; // Bits 25:25
-+		uint32_t cben              : 3; // Bits 28:26
-+		uint32_t tx_deskew_disable : 1; // Bits 29:29
-+		uint32_t rx_deskew_disable : 1; // Bits 30:30
-+		uint32_t dq_slew_dly_byp   : 1; // Bits 31:31
-+	};
-+	uint32_t raw;
-+};
-+
-+union ddr_comp_data_comp_1_reg {
-+	struct __packed {
-+		uint32_t rcomp_odt_up   : 6; // Bits  5:0
-+		uint32_t                : 3; // Bits  8:6
-+		uint32_t rcomp_odt_down : 6; // Bits 14:9
-+		uint32_t                : 1; // Bits 15:15
-+		uint32_t panic_drv_down : 6; // Bits 21:16
-+		uint32_t panic_drv_up   : 6; // Bits 27:22
-+		uint32_t ls_comp        : 3; // Bits 30:28
-+		uint32_t                : 1; // Bits 31:31
-+	};
-+	uint32_t raw;
-+};
-+
-+union ddr_comp_ctl_0_reg {
-+	struct __packed {
-+		uint32_t                    : 3; // Bits  2:0
-+		uint32_t disable_odt_static : 1; // Bits  3:3
-+		uint32_t odt_up_down_off    : 6; // Bits  9:4
-+		uint32_t fixed_odt_offset   : 1; // Bits 10:10
-+		int32_t  dq_drv_vref        : 4; // Bits 14:11
-+		int32_t  dq_odt_vref        : 5; // Bits 19:15
-+		int32_t  cmd_drv_vref       : 4; // Bits 23:20
-+		int32_t  ctl_drv_vref       : 4; // Bits 27:24
-+		int32_t  clk_drv_vref       : 4; // Bits 31:28
-+	};
-+	uint32_t raw;
-+};
-+
-+union ddr_comp_ctl_1_reg {
-+	struct __packed {
-+		uint32_t dq_scomp       : 5; // Bits  4:0
-+		uint32_t cmd_scomp      : 5; // Bits  9:5
-+		uint32_t ctl_scomp      : 5; // Bits 14:10
-+		uint32_t clk_scomp      : 5; // Bits 19:15
-+		uint32_t tco_cmd_offset : 4; // Bits 23:20
-+		uint32_t comp_clk_on    : 1; // Bits 24:24
-+		uint32_t vccddq_hi      : 1; // Bits 25:25
-+		uint32_t                : 3; // Bits 28:26
-+		uint32_t dis_quick_comp : 1; // Bits 29:29
-+		uint32_t sin_step       : 1; // Bits 30:30
-+		uint32_t sin_step_adv   : 1; // Bits 31:31
-+	};
-+	uint32_t raw;
-+};
-+
-+union ddr_data_vref_adjust_reg {
-+	struct __packed {
-+		int32_t  ca_vref_ctrl     : 7;// Bits  6:0
-+		int32_t  ch1_vref_ctrl    : 7;// Bits 13:7
-+		int32_t  ch0_vref_ctrl    : 7;// Bits 20:14
-+		uint32_t en_dimm_vref_ca  : 1;// Bits 21:21
-+		uint32_t en_dimm_vref_ch1 : 1;// Bits 22:22
-+		uint32_t en_dimm_vref_ch0 : 1;// Bits 23:23
-+		uint32_t hi_z_timer_ctrl  : 2;// Bits 25:24
-+		uint32_t vccddq_hi_qnnn_h : 1;// Bits 26:26
-+		uint32_t                  : 2;// Bits 28:27
-+		uint32_t ca_slow_bw       : 1;// Bits 29:29
-+		uint32_t ch0_slow_bw      : 1;// Bits 30:30
-+		uint32_t ch1_slow_bw      : 1;// Bits 31:31
-+	};
-+	uint32_t raw;
-+};
-+
-+union ddr_data_vref_control_reg {
-+	struct __packed {
-+		uint32_t hi_bw_divider   : 2; // Bits  1:0
-+		uint32_t lo_bw_divider   : 2; // Bits  3:2
-+		uint32_t sample_divider  : 3; // Bits  6:4
-+		uint32_t open_loop       : 1; // Bits  7:7
-+		uint32_t slow_bw_error   : 2; // Bits  9:8
-+		uint32_t hi_bw_enable    : 1; // Bits 10:10
-+		uint32_t                 : 1; // Bits 11:11
-+		uint32_t vt_slope_b      : 3; // Bits 14:12
-+		uint32_t vt_slope_a      : 3; // Bits 17:15
-+		uint32_t vt_offset       : 3; // Bits 20:18
-+		uint32_t sel_code        : 3; // Bits 23:21
-+		uint32_t output_code     : 8; // Bits 31:24
-+	};
-+	uint32_t raw;
-+};
-+
-+union ddr_comp_vsshi_reg {
-+	struct __packed {
-+		uint32_t panic_drv_down_vref : 6; // Bits  5:0
-+		uint32_t panic_drv_up_vref   : 6; // Bits 11:6
-+		uint32_t vt_offset           : 5; // Bits 16:12
-+		uint32_t vt_slope_a          : 3; // Bits 19:17
-+		uint32_t vt_slope_b          : 3; // Bits 22:20
-+		uint32_t                     : 9; // Bits 31:23
-+	};
-+	uint32_t raw;
-+};
-+
-+union ddr_comp_vsshi_control_reg {
-+	struct __packed {
-+		uint32_t vsshi_target    : 6; // Bits  5:0
-+		uint32_t hi_bw_divider   : 2; // Bits  7:6
-+		uint32_t lo_bw_divider   : 2; // Bits  9:8
-+		uint32_t sample_divider  : 3; // Bits 12:10
-+		uint32_t open_loop       : 1; // Bits 13:13
-+		uint32_t bw_error        : 2; // Bits 15:14
-+		uint32_t panic_driver_en : 1; // Bits 16:16
-+		uint32_t                 : 1; // Bits 17:17
-+		uint32_t panic_voltage   : 4; // Bits 21:18
-+		uint32_t gain_boost      : 1; // Bits 22:22
-+		uint32_t sel_code        : 1; // Bits 23:23
-+		uint32_t output_code     : 8; // Bits 31:24
-+	};
-+	uint32_t raw;
-+};
-+
-+union ddr_clk_controls_reg {
-+	struct __packed {
-+		uint32_t ref_pi             : 4; // Bits  3:0
-+		uint32_t dll_mask           : 2; // Bits  5:4
-+		uint32_t                    : 1; // Bits  6:6
-+		uint32_t tx_on              : 1; // Bits  7:7
-+		uint32_t internal_clocks_on : 1; // Bits  8:8
-+		uint32_t repeater_clocks_on : 1; // Bits  9:9
-+		uint32_t io_lb_ctl          : 2; // Bits 11:10
-+		uint32_t odt_mode           : 1; // Bits 12:12
-+		uint32_t                    : 8; // Bits 20:13
-+		uint32_t rx_vref            : 6; // Bits 26:21
-+		uint32_t vccddq_hi          : 1; // Bits 27:27
-+		uint32_t dll_weaklock       : 1; // Bits 28:28
-+		uint32_t lpddr_mode         : 1; // Bits 29:29
-+		uint32_t                    : 2; // Bits 31:30
-+	};
-+	uint32_t raw;
-+};
-+
-+union ddr_cmd_controls_reg {
-+	struct __packed {
-+		int32_t  ref_pi             : 4; // Bits  3:0
-+		uint32_t dll_mask           : 2; // Bits  5:4
-+		uint32_t                    : 1; // Bits  6:6
-+		uint32_t tx_on              : 1; // Bits  7:7
-+		uint32_t internal_clocks_on : 1; // Bits  8:8
-+		uint32_t repeater_clocks_on : 1; // Bits  9:9
-+		uint32_t io_lb_ctl          : 2; // Bits 11:10
-+		uint32_t odt_mode           : 1; // Bits 12:12
-+		uint32_t cmd_tx_eq          : 2; // Bits 14:13
-+		uint32_t early_weak_drive   : 2; // Bits 16:15
-+		uint32_t                    : 4; // Bits 20:17
-+		int32_t  rx_vref            : 6; // Bits 26:21
-+		uint32_t vccddq_hi          : 1; // Bits 27:27
-+		uint32_t dll_weaklock       : 1; // Bits 28:28
-+		uint32_t lpddr_mode         : 1; // Bits 29:29
-+		uint32_t lpddr_ca_a_dis     : 1; // Bits 30:30
-+		uint32_t lpddr_ca_b_dis     : 1; // Bits 31:31
-+	};
-+	uint32_t raw;
-+};
-+
-+/* Same register definition for CKE and CTL fubs */
-+union ddr_cke_ctl_controls_reg {
-+	struct __packed {
-+		int32_t  ref_pi             : 4; // Bits  3:0
-+		uint32_t dll_mask           : 2; // Bits  5:4
-+		uint32_t                    : 1; // Bits  6:6
-+		uint32_t tx_on              : 1; // Bits  7:7
-+		uint32_t internal_clocks_on : 1; // Bits  8:8
-+		uint32_t repeater_clocks_on : 1; // Bits  9:9
-+		uint32_t io_lb_ctl          : 2; // Bits 11:10
-+		uint32_t odt_mode           : 1; // Bits 12:12
-+		uint32_t cmd_tx_eq          : 2; // Bits 14:13
-+		uint32_t early_weak_drive   : 2; // Bits 16:15
-+		uint32_t ctl_tx_eq          : 2; // Bits 18:17
-+		uint32_t ctl_sr_drv         : 2; // Bits 20:19
-+		int32_t  rx_vref            : 6; // Bits 26:21
-+		uint32_t vccddq_hi          : 1; // Bits 27:27
-+		uint32_t dll_weaklock       : 1; // Bits 28:28
-+		uint32_t lpddr_mode         : 1; // Bits 29:29
-+		uint32_t la_drv_en_ovrd     : 1; // Bits 30:30
-+		uint32_t lpddr_ca_a_dis     : 1; // Bits 31:31
-+	};
-+	uint32_t raw;
-+};
-+
-+union ddr_scram_misc_control_reg {
-+	struct __packed {
-+		uint32_t wl_wake_cycles       :  2; // Bits  1:0
-+		uint32_t wl_sleep_cycles      :  3; // Bits  4:2
-+		uint32_t force_comp_update    :  1; // Bits  5:5
-+		uint32_t weaklock_latency     :  4; // Bits  9:6
-+		uint32_t ddr_no_ch_interleave :  1; // Bits 10:10
-+		uint32_t lpddr_mode           :  1; // Bits 11:11
-+		uint32_t cke_mapping_ch0      :  4; // Bits 15:12
-+		uint32_t cke_mapping_ch1      :  4; // Bits 19:16
-+		uint32_t                      : 12; // Bits 31:20
-+	};
-+	uint32_t raw;
-+};
-+
-+union mcscheds_cbit_reg {
-+	struct __packed {
-+		uint32_t dis_opp_cas    : 1; // Bits  0:0
-+		uint32_t dis_opp_is_cas : 1; // Bits  1:1
-+		uint32_t dis_opp_ras    : 1; // Bits  2:2
-+		uint32_t dis_opp_is_ras : 1; // Bits  3:3
-+		uint32_t dis_1c_byp     : 1; // Bits  4:4
-+		uint32_t dis_2c_byp     : 1; // Bits  5:5
-+		uint32_t dis_deprd_opt  : 1; // Bits  6:6
-+		uint32_t dis_pt_it      : 1; // Bits  7:7
-+		uint32_t dis_prcnt_ring : 1; // Bits  8:8
-+		uint32_t dis_prcnt_sa   : 1; // Bits  9:9
-+		uint32_t dis_blkr_ph    : 1; // Bits 10:10
-+		uint32_t dis_blkr_pe    : 1; // Bits 11:11
-+		uint32_t dis_blkr_pm    : 1; // Bits 12:12
-+		uint32_t dis_odt        : 1; // Bits 13:13
-+		uint32_t oe_always_off  : 1; // Bits 14:14
-+		uint32_t                : 1; // Bits 15:15
-+		uint32_t dis_aom        : 1; // Bits 16:16
-+		uint32_t block_rpq      : 1; // Bits 17:17
-+		uint32_t block_wpq      : 1; // Bits 18:18
-+		uint32_t invert_align   : 1; // Bits 19:19
-+		uint32_t dis_write_gap  : 1; // Bits 20:20
-+		uint32_t dis_zq         : 1; // Bits 21:21
-+		uint32_t dis_tt         : 1; // Bits 22:22
-+		uint32_t dis_opp_ref    : 1; // Bits 23:23
-+		uint32_t long_zq        : 1; // Bits 24:24
-+		uint32_t dis_srx_zq     : 1; // Bits 25:25
-+		uint32_t serialize_zq   : 1; // Bits 26:26
-+		uint32_t zq_fast_exec   : 1; // Bits 27:27
-+		uint32_t dis_drive_nop  : 1; // Bits 28:28
-+		uint32_t pres_wdb_ent   : 1; // Bits 29:29
-+		uint32_t dis_clk_gate   : 1; // Bits 30:30
-+		uint32_t                : 1; // Bits 31:31
-+	};
-+	uint32_t raw;
-+};
-+
-+union mcmain_command_rate_limit_reg {
-+	struct __packed {
-+		uint32_t enable_cmd_limit :  1; // Bits  0:0
-+		uint32_t cmd_rate_limit   :  3; // Bits  3:1
-+		uint32_t reset_on_command :  4; // Bits  7:4
-+		uint32_t reset_delay      :  4; // Bits 11:8
-+		uint32_t ck_to_cke_delay  :  2; // Bits 13:12
-+		uint32_t                  : 17; // Bits 30:14
-+		uint32_t init_mrw_2n_cs   :  1; // Bits 31:31
-+	};
-+	uint32_t raw;
-+};
-+
-+union mad_chnl_reg {
-+	struct __packed {
-+		uint32_t ch_a           :  2; // Bits  1:0
-+		uint32_t ch_b           :  2; // Bits  3:2
-+		uint32_t ch_c           :  2; // Bits  5:4
-+		uint32_t stacked_mode   :  1; // Bits  6:6
-+		uint32_t stkd_mode_bits :  3; // Bits  9:7
-+		uint32_t lpddr_mode     :  1; // Bits 10:10
-+		uint32_t                : 21; // Bits 31:11
-+	};
-+	uint32_t raw;
-+};
-+
-+union mad_dimm_reg {
-+	struct __packed {
-+		uint32_t dimm_a_size     :  8;  // Bits  7:0
-+		uint32_t dimm_b_size     :  8;  // Bits 15:8
-+		uint32_t dimm_a_sel      :  1;  // Bits 16:16
-+		uint32_t dimm_a_ranks    :  1;  // Bits 17:17
-+		uint32_t dimm_b_ranks    :  1;  // Bits 18:18
-+		uint32_t dimm_a_width    :  1;  // Bits 19:19
-+		uint32_t dimm_b_width    :  1;  // Bits 20:20
-+		uint32_t rank_interleave :  1;  // Bits 21:21
-+		uint32_t enh_interleave  :  1;  // Bits 22:22
-+		uint32_t                 :  1;  // Bits 23:23
-+		uint32_t ecc_mode        :  2;  // Bits 25:24
-+		uint32_t hori_mode       :  1;  // Bits 26:26
-+		uint32_t hori_address    :  3;  // Bits 29:27
-+		uint32_t                 :  2;  // Bits 31:30
-+	};
-+	uint32_t raw;
-+};
-+
-+union mad_zr_reg {
-+	struct __packed {
-+		uint32_t             : 16; // Bits 15:0
-+		uint32_t ch_b_double :  8; // Bits 23:16
-+		uint32_t ch_b_single :  8; // Bits 31:24
-+	};
-+	uint32_t raw;
-+};
-+
-+/* Same definition for P_COMP, M_COMP, D_COMP */
-+union pcu_comp_reg {
-+	struct __packed {
-+		uint32_t comp_disable  :  1; // Bits  0:0
-+		uint32_t comp_interval :  4; // Bits  4:1
-+		uint32_t               :  3; // Bits  7:5
-+		uint32_t comp_force    :  1; // Bits  8:8
-+		uint32_t               : 23; // Bits 31:9
-+	};
-+	uint32_t raw;
-+};
-+
-+#endif
-diff --git a/src/northbridge/intel/haswell/native_raminit/timings_refresh.c b/src/northbridge/intel/haswell/native_raminit/timings_refresh.c
-new file mode 100644
-index 0000000000..a9d960f31b
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/timings_refresh.c
-@@ -0,0 +1,13 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include "raminit_native.h"
-+
-+void configure_timings(struct sysinfo *ctrl)
-+{
-+	/** TODO: Stub **/
-+}
-+
-+void configure_refresh(struct sysinfo *ctrl)
-+{
-+	/** TODO: Stub **/
-+}
-diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h
-index 45f8174995..4c3f399b5d 100644
---- a/src/northbridge/intel/haswell/registers/mchbar.h
-+++ b/src/northbridge/intel/haswell/registers/mchbar.h
-@@ -7,9 +7,98 @@
- #define NUM_CHANNELS	2
- #define NUM_SLOTS	2
- 
-+/* Indexed register helper macros */
-+#define _DDRIO_C_R_B(r, ch, rank, byte)	((r) + 0x100 * (ch) + 0x4 * (rank) + 0x200 * (byte))
-+#define _MCMAIN_C_X(r, ch, x)		((r) + 0x400 * (ch) + 0x4 * (x))
-+#define _MCMAIN_C(r, ch)		((r) + 0x400 * (ch))
-+
- /* Register definitions */
-+
-+/* DDR DATA per-channel per-bytelane */
-+#define DQ_CONTROL_2(ch, byte)			_DDRIO_C_R_B(0x0064, ch, 0, byte)
-+
-+/* DDR CKE per-channel */
-+#define DDR_CKE_ch_CMD_COMP_OFFSET(ch)		_DDRIO_C_R_B(0x1204, ch, 0, 0)
-+#define DDR_CKE_ch_CMD_PI_CODING(ch)		_DDRIO_C_R_B(0x1208, ch, 0, 0)
-+
-+#define DDR_CKE_ch_CTL_CONTROLS(ch)		_DDRIO_C_R_B(0x121c, ch, 0, 0)
-+#define DDR_CKE_ch_CTL_RANKS_USED(ch)		_DDRIO_C_R_B(0x1220, ch, 0, 0)
-+
-+/* DDR CTL per-channel */
-+#define DDR_CTL_ch_CTL_CONTROLS(ch)		_DDRIO_C_R_B(0x1c1c, ch, 0, 0)
-+#define DDR_CTL_ch_CTL_RANKS_USED(ch)		_DDRIO_C_R_B(0x1c20, ch, 0, 0)
-+
-+/* DDR CLK per-channel */
-+#define DDR_CLK_ch_RANKS_USED(ch)		_DDRIO_C_R_B(0x1800, ch, 0, 0)
-+#define DDR_CLK_ch_COMP_OFFSET(ch)		_DDRIO_C_R_B(0x1808, ch, 0, 0)
-+#define DDR_CLK_ch_PI_CODING(ch)		_DDRIO_C_R_B(0x180c, ch, 0, 0)
-+#define DDR_CLK_ch_CONTROLS(ch)			_DDRIO_C_R_B(0x1810, ch, 0, 0)
-+
-+/* DDR Scrambler */
-+#define DDR_SCRAMBLE_ch(ch)			(0x2000 + 4 * (ch))
-+#define DDR_SCRAM_MISC_CONTROL			0x2008
-+
-+/* DDR CMDN/CMDS per-channel (writes go to both CMDN and CMDS fubs) */
-+#define DDR_CMD_ch_COMP_OFFSET(ch)		_DDRIO_C_R_B(0x3204, ch, 0, 0)
-+#define DDR_CMD_ch_PI_CODING(ch)		_DDRIO_C_R_B(0x3208, ch, 0, 0)
-+#define DDR_CMD_ch_CONTROLS(ch)			_DDRIO_C_R_B(0x320c, ch, 0, 0)
-+
-+/* DDR CKE/CTL per-channel (writes go to both CKE and CTL fubs) */
-+#define DDR_CKE_CTL_ch_CTL_COMP_OFFSET(ch)	_DDRIO_C_R_B(0x3414, ch, 0, 0)
-+#define DDR_CKE_CTL_ch_CTL_PI_CODING(ch)	_DDRIO_C_R_B(0x3418, ch, 0, 0)
-+
-+/* DDR DATA broadcast */
-+#define DDR_DATA_RX_TRAIN_RANK(rank)		_DDRIO_C_R_B(0x3600, 0, rank, 0)
-+#define DDR_DATA_RX_PER_BIT_RANK(rank)		_DDRIO_C_R_B(0x3610, 0, rank, 0)
-+#define DDR_DATA_TX_TRAIN_RANK(rank)		_DDRIO_C_R_B(0x3620, 0, rank, 0)
-+#define DDR_DATA_TX_PER_BIT_RANK(rank)		_DDRIO_C_R_B(0x3630, 0, rank, 0)
-+
-+#define DDR_DATA_RCOMP_DATA_1			0x3644
-+#define DDR_DATA_TX_XTALK			0x3648
-+#define DDR_DATA_RX_OFFSET_VDQ			0x364c
-+#define DDR_DATA_OFFSET_COMP			0x365c
-+#define DDR_DATA_CONTROL_1			0x3660
-+
-+#define DDR_DATA_OFFSET_TRAIN			0x3670
-+#define DDR_DATA_CONTROL_0			0x3674
-+#define DDR_DATA_VREF_ADJUST			0x3678
-+
-+/* DDR CMD broadcast */
-+#define DDR_CMD_COMP				0x3700
-+
-+/* DDR CKE/CTL broadcast */
-+#define DDR_CKE_CTL_COMP			0x3810
-+
-+/* DDR CLK broadcast */
-+#define DDR_CLK_COMP				0x3904
-+#define DDR_CLK_CONTROLS			0x3910
-+#define DDR_CLK_CB_STATUS			0x3918
-+
-+/* DDR COMP (global) */
-+#define DDR_COMP_DATA_COMP_1			0x3a04
-+#define DDR_COMP_CMD_COMP			0x3a08
-+#define DDR_COMP_CTL_COMP			0x3a0c
-+#define DDR_COMP_CLK_COMP			0x3a10
-+#define DDR_COMP_CTL_0				0x3a14
-+#define DDR_COMP_CTL_1				0x3a18
-+#define DDR_COMP_VSSHI				0x3a1c
-+#define DDR_COMP_OVERRIDE			0x3a20
-+#define DDR_COMP_VSSHI_CONTROL			0x3a24
-+
-+/* MCMAIN per-channel */
-+#define COMMAND_RATE_LIMIT_ch(ch)		_MCMAIN_C(0x4010, ch)
-+
-+#define MC_INIT_STATE_ch(ch)			_MCMAIN_C(0x42a0, ch)
-+
-+/* MCMAIN broadcast */
-+#define MCSCHEDS_CBIT		0x4c20
-+
-+#define MCMNTS_SC_WDBWM		0x4f8c
-+
-+/* MCDECS */
- #define MAD_CHNL		0x5000 /* Address Decoder Channel Configuration */
- #define MAD_DIMM(ch)		(0x5004 + (ch) * 4)
-+#define MAD_ZR			0x5014
- #define MC_INIT_STATE_G		0x5030
- #define MRC_REVISION		0x5034 /* MRC Revision */
- 
-@@ -28,6 +117,8 @@
- 
- #define PCU_DDR_PTM_CTL		0x5880
- 
-+#define PCU_DDR_VOLTAGE		0x58a4
-+
- /* Some power MSRs are also represented in MCHBAR */
- #define MCH_PKG_POWER_LIMIT_LO	0x59a0
- #define MCH_PKG_POWER_LIMIT_HI	0x59a4
-@@ -48,6 +139,8 @@
- #define  MAILBOX_BIOS_CMD_FSM_MEASURE_INTVL	0x909
- #define  MAILBOX_BIOS_CMD_READ_PCH_POWER	0xa
- #define  MAILBOX_BIOS_CMD_READ_PCH_POWER_EXT	0xb
-+#define  MAILBOX_BIOS_CMD_READ_DDR_2X_REFRESH	0x17
-+#define  MAILBOX_BIOS_CMD_WRITE_DDR_2X_REFRESH	0x18
- #define  MAILBOX_BIOS_CMD_READ_C9C10_VOLTAGE	0x26
- #define  MAILBOX_BIOS_CMD_WRITE_C9C10_VOLTAGE	0x27
- 
-@@ -66,6 +159,7 @@
- #define MC_BIOS_REQ		0x5e00 /* Memory frequency request register */
- #define MC_BIOS_DATA		0x5e04 /* Miscellaneous information for BIOS */
- #define SAPMCTL			0x5f00
-+#define M_COMP			0x5f08
- 
- #define HDAUDRID		0x6008
- #define UMAGFXCTL		0x6020
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0033-haswell-NRI-Add-timings-refresh-programming.patch b/config/coreboot/default/patches/0033-haswell-NRI-Add-timings-refresh-programming.patch
deleted file mode 100644
index 3ec3b57b..00000000
--- a/config/coreboot/default/patches/0033-haswell-NRI-Add-timings-refresh-programming.patch
+++ /dev/null
@@ -1,541 +0,0 @@
-From 8f94c0428eea2145a97de943b093dee29001c4f9 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sat, 7 May 2022 20:59:58 +0200
-Subject: [PATCH 33/51] haswell NRI: Add timings/refresh programming
-
-Program the registers with timing and refresh parameters.
-
-Change-Id: Id2ea339d2c9ea8b56c71d6e88ec76949653ff5c2
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../haswell/native_raminit/lookup_timings.c   | 102 ++++++++
- .../haswell/native_raminit/raminit_native.h   |  14 ++
- .../haswell/native_raminit/reg_structs.h      |  93 +++++++
- .../haswell/native_raminit/timings_refresh.c  | 233 +++++++++++++++++-
- .../intel/haswell/registers/mchbar.h          |  12 +
- 5 files changed, 452 insertions(+), 2 deletions(-)
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/lookup_timings.c b/src/northbridge/intel/haswell/native_raminit/lookup_timings.c
-index 8b81c7c341..b8d6c1ef40 100644
---- a/src/northbridge/intel/haswell/native_raminit/lookup_timings.c
-+++ b/src/northbridge/intel/haswell/native_raminit/lookup_timings.c
-@@ -60,3 +60,105 @@ uint32_t get_tXP(const uint32_t mem_clock_mhz)
- 	};
- 	return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut));
- }
-+
-+static uint32_t get_lpddr_tCKE(const uint32_t mem_clock_mhz)
-+{
-+	const struct timing_lookup lut[] = {
-+		{  533,  4 },
-+		{  666,  5 },
-+		{ fmax,  6 },
-+	};
-+	return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut));
-+}
-+
-+static uint32_t get_ddr_tCKE(const uint32_t mem_clock_mhz)
-+{
-+	const struct timing_lookup lut[] = {
-+		{  533,  3 },
-+		{  800,  4 },
-+		{  933,  5 },
-+		{ 1200,  6 },
-+		{ fmax,  7 },
-+	};
-+	return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut));
-+}
-+
-+uint32_t get_tCKE(const uint32_t mem_clock_mhz, const bool lpddr)
-+{
-+	return lpddr ? get_lpddr_tCKE(mem_clock_mhz) : get_ddr_tCKE(mem_clock_mhz);
-+}
-+
-+uint32_t get_tXPDLL(const uint32_t mem_clock_mhz)
-+{
-+	const struct timing_lookup lut[] = {
-+		{  400, 10 },
-+		{  533, 13 },
-+		{  666, 16 },
-+		{  800, 20 },
-+		{  933, 23 },
-+		{ 1066, 26 },
-+		{ 1200, 29 },
-+		{ fmax, 32 },
-+	};
-+	return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut));
-+}
-+
-+uint32_t get_tAONPD(const uint32_t mem_clock_mhz)
-+{
-+	const struct timing_lookup lut[] = {
-+		{  400,  4 },
-+		{  533,  5 },
-+		{  666,  6 },
-+		{  800,  7 }, /* SNB had 8 */
-+		{  933,  8 },
-+		{ 1066, 10 },
-+		{ 1200, 11 },
-+		{ fmax, 12 },
-+	};
-+	return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut));
-+}
-+
-+uint32_t get_tMOD(const uint32_t mem_clock_mhz)
-+{
-+	const struct timing_lookup lut[] = {
-+		{  800, 12 },
-+		{  933, 14 },
-+		{ 1066, 16 },
-+		{ 1200, 18 },
-+		{ fmax, 20 },
-+	};
-+	return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut));
-+}
-+
-+uint32_t get_tXS_offset(const uint32_t mem_clock_mhz)
-+{
-+	return DIV_ROUND_UP(mem_clock_mhz, 100);
-+}
-+
-+static uint32_t get_lpddr_tZQOPER(const uint32_t mem_clock_mhz)
-+{
-+	return (mem_clock_mhz * 360) / 1000;
-+}
-+
-+static uint32_t get_ddr_tZQOPER(const uint32_t mem_clock_mhz)
-+{
-+	const struct timing_lookup lut[] = {
-+		{  800, 256 },
-+		{  933, 299 },
-+		{ 1066, 342 },
-+		{ 1200, 384 },
-+		{ fmax, 427 },
-+	};
-+	return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut));
-+}
-+
-+/* tZQOPER defines the period required for ZQCL after SR exit */
-+uint32_t get_tZQOPER(const uint32_t mem_clock_mhz, const bool lpddr)
-+{
-+	return lpddr ? get_lpddr_tZQOPER(mem_clock_mhz) : get_ddr_tZQOPER(mem_clock_mhz);
-+}
-+
-+uint32_t get_tZQCS(const uint32_t mem_clock_mhz, const bool lpddr)
-+{
-+	return DIV_ROUND_UP(get_tZQOPER(mem_clock_mhz, lpddr), 4);
-+}
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index fffa6d5450..5915a2bab0 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -156,6 +156,12 @@ struct sysinfo {
- 	uint8_t cke_cmd_pi_code[NUM_CHANNELS][NUM_GROUPS];
- 	uint8_t cmd_north_pi_code[NUM_CHANNELS][NUM_GROUPS];
- 	uint8_t cmd_south_pi_code[NUM_CHANNELS][NUM_GROUPS];
-+
-+	union tc_bank_reg tc_bank[NUM_CHANNELS];
-+	union tc_bank_rank_a_reg tc_bankrank_a[NUM_CHANNELS];
-+	union tc_bank_rank_b_reg tc_bankrank_b[NUM_CHANNELS];
-+	union tc_bank_rank_c_reg tc_bankrank_c[NUM_CHANNELS];
-+	union tc_bank_rank_d_reg tc_bankrank_d[NUM_CHANNELS];
- };
- 
- static inline bool is_hsw_ult(void)
-@@ -201,6 +207,14 @@ enum raminit_status configure_mc(struct sysinfo *ctrl);
- void configure_timings(struct sysinfo *ctrl);
- void configure_refresh(struct sysinfo *ctrl);
- 
-+uint32_t get_tCKE(uint32_t mem_clock_mhz, bool lpddr);
-+uint32_t get_tXPDLL(uint32_t mem_clock_mhz);
-+uint32_t get_tAONPD(uint32_t mem_clock_mhz);
-+uint32_t get_tMOD(uint32_t mem_clock_mhz);
-+uint32_t get_tXS_offset(uint32_t mem_clock_mhz);
-+uint32_t get_tZQOPER(uint32_t mem_clock_mhz, bool lpddr);
-+uint32_t get_tZQCS(uint32_t mem_clock_mhz, bool lpddr);
-+
- enum raminit_status wait_for_first_rcomp(void);
- 
- uint8_t get_rx_bias(const struct sysinfo *ctrl);
-diff --git a/src/northbridge/intel/haswell/native_raminit/reg_structs.h b/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-index d11cda4b3d..70487e1640 100644
---- a/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-+++ b/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-@@ -335,6 +335,99 @@ union mcscheds_cbit_reg {
- 	uint32_t raw;
- };
- 
-+union tc_bank_reg {
-+	struct __packed {
-+		uint32_t tRCD      : 5; // Bits  4:0
-+		uint32_t tRP       : 5; // Bits  9:5
-+		uint32_t tRAS      : 6; // Bits 15:10
-+		uint32_t tRDPRE    : 4; // Bits 19:16
-+		uint32_t tWRPRE    : 6; // Bits 25:20
-+		uint32_t tRRD      : 4; // Bits 29:26
-+		uint32_t tRPab_ext : 2; // Bits 31:30
-+	};
-+	uint32_t raw;
-+};
-+
-+union tc_bank_rank_a_reg {
-+	struct __packed {
-+		uint32_t tCKE        : 4; // Bits  3:0
-+		uint32_t tFAW        : 8; // Bits 11:4
-+		uint32_t tRDRD_sr    : 3; // Bits 14:12
-+		uint32_t tRDRD_dr    : 4; // Bits 18:15
-+		uint32_t tRDRD_dd    : 4; // Bits 22:19
-+		uint32_t tRDPDEN     : 5; // Bits 27:23
-+		uint32_t             : 1; // Bits 28:28
-+		uint32_t cmd_3st_dis : 1; // Bits 29:29
-+		uint32_t cmd_stretch : 2; // Bits 31:30
-+	};
-+	uint32_t raw;
-+};
-+
-+union tc_bank_rank_b_reg {
-+	struct __packed {
-+		uint32_t tWRRD_sr : 6; // Bits  5:0
-+		uint32_t tWRRD_dr : 4; // Bits  9:6
-+		uint32_t tWRRD_dd : 4; // Bits 13:10
-+		uint32_t tWRWR_sr : 3; // Bits 16:14
-+		uint32_t tWRWR_dr : 4; // Bits 20:17
-+		uint32_t tWRWR_dd : 4; // Bits 24:21
-+		uint32_t tWRPDEN  : 6; // Bits 30:25
-+		uint32_t dec_wrd  : 1; // Bits 31:31
-+	};
-+	uint32_t raw;
-+};
-+
-+union tc_bank_rank_c_reg {
-+	struct __packed {
-+		uint32_t tXPDLL   : 6; // Bits  5:0
-+		uint32_t tXP      : 4; // Bits  9:6
-+		uint32_t tAONPD   : 4; // Bits 13:10
-+		uint32_t tRDWR_sr : 5; // Bits 18:14
-+		uint32_t tRDWR_dr : 5; // Bits 23:19
-+		uint32_t tRDWR_dd : 5; // Bits 28:24
-+		uint32_t          : 3; // Bits 31:29
-+	};
-+	uint32_t raw;
-+};
-+
-+/* NOTE: Non-ULT only implements the lower 21 bits (odt_write_delay is 2 bits) */
-+union tc_bank_rank_d_reg {
-+	struct __packed {
-+		uint32_t tAA                : 5; // Bits  4:0
-+		uint32_t tCWL               : 5; // Bits  9:5
-+		uint32_t tCPDED             : 2; // Bits 11:10
-+		uint32_t tPRPDEN            : 2; // Bits 13:12
-+		uint32_t odt_read_delay     : 3; // Bits 16:14
-+		uint32_t odt_read_duration  : 2; // Bits 18:17
-+		uint32_t odt_write_duration : 3; // Bits 21:19
-+		uint32_t odt_write_delay    : 3; // Bits 24:22
-+		uint32_t odt_always_rank_0  : 1; // Bits 25:25
-+		uint32_t cmd_delay          : 2; // Bits 27:26
-+		uint32_t                    : 4; // Bits 31:28
-+	};
-+	uint32_t raw;
-+};
-+
-+union tc_rftp_reg {
-+	struct __packed {
-+		uint32_t tREFI   : 16; // Bits 15:0
-+		uint32_t tRFC    :  9; // Bits 24:16
-+		uint32_t tREFIx9 :  7; // Bits 31:25
-+	};
-+	uint32_t raw;
-+};
-+
-+union tc_srftp_reg {
-+	struct __packed {
-+		uint32_t tXSDLL     : 12; // Bits 11:0
-+		uint32_t tXS_offset :  4; // Bits 15:12
-+		uint32_t tZQOPER    : 10; // Bits 25:16
-+		uint32_t            :  2; // Bits 27:26
-+		uint32_t tMOD       :  4; // Bits 31:28
-+	};
-+	uint32_t raw;
-+};
-+
- union mcmain_command_rate_limit_reg {
- 	struct __packed {
- 		uint32_t enable_cmd_limit :  1; // Bits  0:0
-diff --git a/src/northbridge/intel/haswell/native_raminit/timings_refresh.c b/src/northbridge/intel/haswell/native_raminit/timings_refresh.c
-index a9d960f31b..54fee0121d 100644
---- a/src/northbridge/intel/haswell/native_raminit/timings_refresh.c
-+++ b/src/northbridge/intel/haswell/native_raminit/timings_refresh.c
-@@ -1,13 +1,242 @@
- /* SPDX-License-Identifier: GPL-2.0-or-later */
- 
-+#include <assert.h>
-+#include <commonlib/bsd/clamp.h>
-+#include <console/console.h>
-+#include <delay.h>
-+#include <device/pci_ops.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+
- #include "raminit_native.h"
- 
-+#define BL		8	/* Burst length */
-+#define tCCD		4
-+#define tRPRE		1
-+#define tWPRE		1
-+#define tDLLK		512
-+
-+static bool is_sodimm(const enum spd_dimm_type_ddr3 type)
-+{
-+	return type == SPD_DDR3_DIMM_TYPE_SO_DIMM || type == SPD_DDR3_DIMM_TYPE_72B_SO_UDIMM;
-+}
-+
-+static uint8_t get_odt_stretch(const struct sysinfo *const ctrl)
-+{
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		/* Only stretch with 2 DIMMs per channel */
-+		if (ctrl->dpc[channel] != 2)
-+			continue;
-+
-+		const struct raminit_dimm_info *dimms = ctrl->dimms[channel];
-+
-+		/* Only stretch when using SO-DIMMs */
-+		if (!is_sodimm(dimms[0].data.dimm_type) || !is_sodimm(dimms[1].data.dimm_type))
-+			continue;
-+
-+		/* Only stretch with mismatched card types */
-+		if (dimms[0].data.reference_card == dimms[1].data.reference_card)
-+			continue;
-+
-+		/* Stretch if one SO-DIMM is card F */
-+		for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) {
-+			if (dimms[slot].data.reference_card == 5)
-+				return 1;
-+		}
-+	}
-+	return 0;
-+}
-+
-+static union tc_bank_reg make_tc_bank(struct sysinfo *const ctrl)
-+{
-+	return (union tc_bank_reg) {
-+		.tRCD      = ctrl->tRCD,
-+		.tRP       = ctrl->tRP,
-+		.tRAS      = ctrl->tRAS,
-+		.tRDPRE    = ctrl->tRTP,
-+		.tWRPRE    = 4 + ctrl->tCWL + ctrl->tWR,
-+		.tRRD      = ctrl->tRRD,
-+		.tRPab_ext = 0,	/** TODO: For LPDDR, this is ctrl->tRPab - ctrl->tRP **/
-+	};
-+}
-+
-+static union tc_bank_rank_a_reg make_tc_bankrank_a(struct sysinfo *ctrl, uint8_t odt_stretch)
-+{
-+	/* Use 3N mode for DDR during training, but always use 1N mode for LPDDR */
-+	const uint32_t tCMD = ctrl->lpddr ? 0 : 3;
-+	const uint32_t tRDRD_drdd = BL / 2 + 1 + tRPRE + odt_stretch + !!ctrl->lpddr;
-+
-+	return (union tc_bank_rank_a_reg) {
-+		.tCKE        = get_tCKE(ctrl->mem_clock_mhz, ctrl->lpddr),
-+		.tFAW        = ctrl->tFAW,
-+		.tRDRD_sr    = tCCD,
-+		.tRDRD_dr    = tRDRD_drdd,
-+		.tRDRD_dd    = tRDRD_drdd,
-+		.tRDPDEN     = ctrl->tAA + BL / 2 + 1,
-+		.cmd_3st_dis = 1,	/* Disable command tri-state before training */
-+		.cmd_stretch = tCMD,
-+	};
-+}
-+
-+static union tc_bank_rank_b_reg make_tc_bankrank_b(struct sysinfo *const ctrl)
-+{
-+	const uint8_t tWRRD_drdd = ctrl->tCWL - ctrl->tAA + BL / 2 + 2 + tRPRE;
-+	const uint8_t tWRWR_drdd = BL / 2 + 2 + tWPRE;
-+
-+	return (union tc_bank_rank_b_reg) {
-+		.tWRRD_sr = tCCD + ctrl->tCWL + ctrl->tWTR + 2,
-+		.tWRRD_dr = ctrl->lpddr ? 8 : tWRRD_drdd,
-+		.tWRRD_dd = ctrl->lpddr ? 8 : tWRRD_drdd,
-+		.tWRWR_sr = tCCD,
-+		.tWRWR_dr = tWRWR_drdd,
-+		.tWRWR_dd = tWRWR_drdd,
-+		.tWRPDEN  = ctrl->tWR + ctrl->tCWL + BL / 2,
-+		.dec_wrd  = ctrl->tCWL >= 6,
-+	};
-+}
-+
-+static uint32_t get_tRDWR_sr(const struct sysinfo *ctrl)
-+{
-+	if (ctrl->lpddr) {
-+		const uint32_t tdqsck_max = DIV_ROUND_UP(5500, ctrl->qclkps * 2);
-+		return ctrl->tAA - ctrl->tCWL + tCCD + tWPRE + tdqsck_max + 1;
-+	} else {
-+		const bool fast_clock = ctrl->mem_clock_mhz > 666;
-+		return ctrl->tAA - ctrl->tCWL + tCCD + tWPRE + 2 + fast_clock;
-+	}
-+}
-+
-+static union tc_bank_rank_c_reg make_tc_bankrank_c(struct sysinfo *ctrl, uint8_t odt_stretch)
-+{
-+	const uint32_t tRDWR_sr = get_tRDWR_sr(ctrl);
-+	const uint32_t tRDWR_drdd = tRDWR_sr + odt_stretch;
-+
-+	return (union tc_bank_rank_c_reg) {
-+		.tXPDLL   = get_tXPDLL(ctrl->mem_clock_mhz),
-+		.tXP      = MAX(ctrl->tXP, 7),	/* Use a higher tXP for training */
-+		.tAONPD   = get_tAONPD(ctrl->mem_clock_mhz),
-+		.tRDWR_sr = tRDWR_sr,
-+		.tRDWR_dr = tRDWR_drdd,
-+		.tRDWR_dd = tRDWR_drdd,
-+	};
-+}
-+
-+static union tc_bank_rank_d_reg make_tc_bankrank_d(struct sysinfo *ctrl, uint8_t odt_stretch)
-+{
-+	const uint32_t odt_rd_delay = ctrl->tAA - ctrl->tCWL;
-+	if (!ctrl->lpddr) {
-+		return (union tc_bank_rank_d_reg) {
-+			.tAA               = ctrl->tAA,
-+			.tCWL              = ctrl->tCWL,
-+			.tCPDED            = 1,
-+			.tPRPDEN           = 1,
-+			.odt_read_delay    = odt_rd_delay,
-+			.odt_read_duration = odt_stretch,
-+		};
-+	}
-+
-+	/* tCWL has 1 extra clock because of tDQSS, subtract it here */
-+	const uint32_t tCWL_lpddr = ctrl->tCWL - 1;
-+	const uint32_t odt_wr_delay = tCWL_lpddr + DIV_ROUND_UP(3500, ctrl->qclkps * 2);
-+	const uint32_t odt_wr_duration = DIV_ROUND_UP(3500 - 1750, ctrl->qclkps * 2) + 1;
-+
-+	return (union tc_bank_rank_d_reg) {
-+		.tAA                = ctrl->tAA,
-+		.tCWL               = tCWL_lpddr,
-+		.tCPDED             = 2,	/* Required by JEDEC LPDDR3 spec */
-+		.tPRPDEN            = 1,
-+		.odt_read_delay     = odt_rd_delay,
-+		.odt_read_duration  = odt_stretch,
-+		.odt_write_delay    = odt_wr_delay,
-+		.odt_write_duration = odt_wr_duration,
-+		.odt_always_rank_0  = ctrl->lpddr_dram_odt
-+	};
-+}
-+
-+/* ZQCS period values, in (tREFI * 128) units */
-+#define ZQCS_PERIOD_DDR3	128	/* tREFI * 128 = 7.8 us * 128 = 1ms */
-+#define ZQCS_PERIOD_LPDDR3	256	/* tREFI * 128 = 3.9 us * 128 = 0.5ms */
-+
-+static uint32_t make_tc_zqcal(const struct sysinfo *const ctrl)
-+{
-+	const uint32_t zqcs_period = ctrl->lpddr ? ZQCS_PERIOD_LPDDR3 : ZQCS_PERIOD_DDR3;
-+	const uint32_t tZQCS = get_tZQCS(ctrl->mem_clock_mhz, ctrl->lpddr);
-+	return tZQCS << (is_hsw_ult() ? 10 : 8) | zqcs_period;
-+}
-+
-+static union tc_rftp_reg make_tc_rftp(const struct sysinfo *const ctrl)
-+{
-+	/*
-+	 * The tREFIx9 field should be programmed to minimum of 8.9 * tREFI (to allow
-+	 * for possible delays from ZQ or isoc) and tRASmax (70us) divided by 1024.
-+	 */
-+	return (union tc_rftp_reg) {
-+		.tREFI   = ctrl->tREFI,
-+		.tRFC    = ctrl->tRFC,
-+		.tREFIx9 = ctrl->tREFI * 89 / 10240,
-+	};
-+}
-+
-+static union tc_srftp_reg make_tc_srftp(const struct sysinfo *const ctrl)
-+{
-+	return (union tc_srftp_reg) {
-+		.tXSDLL     = tDLLK,
-+		.tXS_offset = get_tXS_offset(ctrl->mem_clock_mhz),
-+		.tZQOPER    = get_tZQOPER(ctrl->mem_clock_mhz, ctrl->lpddr),
-+		.tMOD       = get_tMOD(ctrl->mem_clock_mhz) - 8,
-+	};
-+}
-+
- void configure_timings(struct sysinfo *ctrl)
- {
--	/** TODO: Stub **/
-+	if (ctrl->lpddr)
-+		die("%s: Missing support for LPDDR\n", __func__);
-+
-+	const uint8_t odt_stretch = get_odt_stretch(ctrl);
-+	const union tc_bank_reg tc_bank = make_tc_bank(ctrl);
-+	const union tc_bank_rank_a_reg tc_bank_rank_a = make_tc_bankrank_a(ctrl, odt_stretch);
-+	const union tc_bank_rank_b_reg tc_bank_rank_b = make_tc_bankrank_b(ctrl);
-+	const union tc_bank_rank_c_reg tc_bank_rank_c = make_tc_bankrank_c(ctrl, odt_stretch);
-+	const union tc_bank_rank_d_reg tc_bank_rank_d = make_tc_bankrank_d(ctrl, odt_stretch);
-+
-+	const uint8_t wr_delay = tc_bank_rank_b.dec_wrd + 1;
-+	uint8_t sc_wr_add_delay = 0;
-+	sc_wr_add_delay |= wr_delay << 0;
-+	sc_wr_add_delay |= wr_delay << 2;
-+	sc_wr_add_delay |= wr_delay << 4;
-+	sc_wr_add_delay |= wr_delay << 6;
-+
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		ctrl->tc_bank[channel] = tc_bank;
-+		ctrl->tc_bankrank_a[channel] = tc_bank_rank_a;
-+		ctrl->tc_bankrank_b[channel] = tc_bank_rank_b;
-+		ctrl->tc_bankrank_c[channel] = tc_bank_rank_c;
-+		ctrl->tc_bankrank_d[channel] = tc_bank_rank_d;
-+
-+		mchbar_write32(TC_BANK_ch(channel), ctrl->tc_bank[channel].raw);
-+		mchbar_write32(TC_BANK_RANK_A_ch(channel), ctrl->tc_bankrank_a[channel].raw);
-+		mchbar_write32(TC_BANK_RANK_B_ch(channel), ctrl->tc_bankrank_b[channel].raw);
-+		mchbar_write32(TC_BANK_RANK_C_ch(channel), ctrl->tc_bankrank_c[channel].raw);
-+		mchbar_write32(TC_BANK_RANK_D_ch(channel), ctrl->tc_bankrank_d[channel].raw);
-+		mchbar_write8(SC_WR_ADD_DELAY_ch(channel), sc_wr_add_delay);
-+	}
- }
- 
- void configure_refresh(struct sysinfo *ctrl)
- {
--	/** TODO: Stub **/
-+	const union tc_srftp_reg tc_srftp = make_tc_srftp(ctrl);
-+	const union tc_rftp_reg  tc_rftp  = make_tc_rftp(ctrl);
-+	const uint32_t tc_zqcal = make_tc_zqcal(ctrl);
-+
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		mchbar_setbits32(TC_RFP_ch(channel), 0xff);
-+		mchbar_write32(TC_RFTP_ch(channel),  tc_rftp.raw);
-+		mchbar_write32(TC_SRFTP_ch(channel), tc_srftp.raw);
-+		mchbar_write32(TC_ZQCAL_ch(channel), tc_zqcal);
-+	}
- }
-diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h
-index 4c3f399b5d..2acc5cbbc8 100644
---- a/src/northbridge/intel/haswell/registers/mchbar.h
-+++ b/src/northbridge/intel/haswell/registers/mchbar.h
-@@ -86,9 +86,21 @@
- #define DDR_COMP_VSSHI_CONTROL			0x3a24
- 
- /* MCMAIN per-channel */
-+#define TC_BANK_ch(ch)				_MCMAIN_C(0x4000, ch)
-+#define TC_BANK_RANK_A_ch(ch)			_MCMAIN_C(0x4004, ch)
-+#define TC_BANK_RANK_B_ch(ch)			_MCMAIN_C(0x4008, ch)
-+#define TC_BANK_RANK_C_ch(ch)			_MCMAIN_C(0x400c, ch)
- #define COMMAND_RATE_LIMIT_ch(ch)		_MCMAIN_C(0x4010, ch)
-+#define TC_BANK_RANK_D_ch(ch)			_MCMAIN_C(0x4014, ch)
-+#define SC_ROUNDT_LAT_ch(ch)			_MCMAIN_C(0x4024, ch)
- 
-+#define SC_WR_ADD_DELAY_ch(ch)			_MCMAIN_C(0x40d0, ch)
-+
-+#define TC_ZQCAL_ch(ch)				_MCMAIN_C(0x4290, ch)
-+#define TC_RFP_ch(ch)				_MCMAIN_C(0x4294, ch)
-+#define TC_RFTP_ch(ch)				_MCMAIN_C(0x4298, ch)
- #define MC_INIT_STATE_ch(ch)			_MCMAIN_C(0x42a0, ch)
-+#define TC_SRFTP_ch(ch)				_MCMAIN_C(0x42a4, ch)
- 
- /* MCMAIN broadcast */
- #define MCSCHEDS_CBIT		0x4c20
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0034-haswell-NRI-Program-memory-map.patch b/config/coreboot/default/patches/0034-haswell-NRI-Program-memory-map.patch
deleted file mode 100644
index bb3ed03d..00000000
--- a/config/coreboot/default/patches/0034-haswell-NRI-Program-memory-map.patch
+++ /dev/null
@@ -1,263 +0,0 @@
-From ded914f236f76715aa43cb439a3de7df9a3dfa11 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sat, 7 May 2022 21:24:50 +0200
-Subject: [PATCH 34/51] haswell NRI: Program memory map
-
-This is very similar to Sandy/Ivy Bridge, except that there's several
-registers to program in GDXCBAR. One of these GDXCBAR registers has a
-lock bit that must be set in order for the memory controller to allow
-normal access to DRAM. And it took me four months to realize this one
-bit was the only reason why native raminit did not work.
-
-Change-Id: I3af73a018a7ba948701a542e661e7fefd57591fe
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/Makefile.mk  |   1 +
- .../intel/haswell/native_raminit/memory_map.c | 183 ++++++++++++++++++
- .../haswell/native_raminit/raminit_main.c     |   1 +
- .../haswell/native_raminit/raminit_native.h   |   1 +
- .../intel/haswell/registers/host_bridge.h     |   2 +
- 5 files changed, 188 insertions(+)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/memory_map.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-index fc55277a65..37d527e972 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-@@ -4,6 +4,7 @@ romstage-y += configure_mc.c
- romstage-y += lookup_timings.c
- romstage-y += init_mpll.c
- romstage-y += io_comp_control.c
-+romstage-y += memory_map.c
- romstage-y += raminit_main.c
- romstage-y += raminit_native.c
- romstage-y += spd_bitmunching.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/memory_map.c b/src/northbridge/intel/haswell/native_raminit/memory_map.c
-new file mode 100644
-index 0000000000..e3aded2b37
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/memory_map.c
-@@ -0,0 +1,183 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <device/pci_ops.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <southbridge/intel/lynxpoint/me.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+
-+/* GDXCBAR */
-+#define MPCOHTRK_GDXC_MOT_ADDRESS_LO		0x10
-+#define MPCOHTRK_GDXC_MOT_ADDRESS_HI		0x14
-+#define MPCOHTRK_GDXC_MOT_REGION		0x18
-+
-+#define MPCOHTRK_GDXC_OCLA_ADDRESS_LO		0x20
-+#define MPCOHTRK_GDXC_OCLA_ADDRESS_HI		0x24
-+#define MPCOHTRK_GDXC_OCLA_REGION		0x28
-+
-+/* This lock bit made me lose what little sanity I had left. - Angel Pons */
-+#define MPCOHTRK_GDXC_OCLA_ADDRESS_HI_LOCK	BIT(2)
-+
-+static inline uint32_t gdxcbar_read32(const uintptr_t offset)
-+{
-+	return read32p((mchbar_read32(GDXCBAR) & ~1) + offset);
-+}
-+
-+static inline void gdxcbar_write32(const uintptr_t offset, const uint32_t value)
-+{
-+	write32p((mchbar_read32(GDXCBAR) & ~1) + offset, value);
-+}
-+
-+static inline void gdxcbar_clrsetbits32(const uintptr_t offset, uint32_t clear, uint32_t set)
-+{
-+	const uintptr_t address = (mchbar_read32(GDXCBAR) & ~1) + offset;
-+	clrsetbits32((void *)address, clear, set);
-+}
-+
-+#define gdxcbar_setbits32(offset, set)		gdxcbar_clrsetbits32(offset, 0, set)
-+#define gdxcbar_clrbits32(offset, clear)	gdxcbar_clrsetbits32(offset, clear, 0)
-+
-+/* All values stored in here (except the bool) are specified in MiB */
-+struct memory_map_data {
-+	uint32_t dpr_size;
-+	uint32_t tseg_size;
-+	uint32_t gtt_size;
-+	uint32_t gms_size;
-+	uint32_t me_stolen_size;
-+	uint32_t mmio_size;
-+	uint32_t touud;
-+	uint32_t remaplimit;
-+	uint32_t remapbase;
-+	uint32_t tom;
-+	uint32_t tom_minus_me;
-+	uint32_t tolud;
-+	uint32_t bdsm_base;
-+	uint32_t gtt_base;
-+	uint32_t tseg_base;
-+	bool reclaim_possible;
-+};
-+
-+static void compute_memory_map(struct memory_map_data *map)
-+{
-+	map->tom_minus_me = map->tom - map->me_stolen_size;
-+
-+	/*
-+	 * MMIO size will actually be slightly smaller than computed,
-+	 * but matches what MRC does and is more MTRR-friendly given
-+	 * that TSEG is treated as WB, but SMRR makes TSEG UC anyway.
-+	 */
-+	const uint32_t mmio_size = MIN(map->tom_minus_me, 4096) / 2;
-+	map->gtt_base = ALIGN_DOWN(mmio_size, map->tseg_size);
-+	map->tseg_base = map->gtt_base - map->tseg_size;
-+	map->bdsm_base = map->gtt_base + map->gtt_size;
-+	map->tolud = map->bdsm_base + map->gms_size;
-+	map->reclaim_possible = map->tom_minus_me > map->tolud;
-+
-+	if (map->reclaim_possible) {
-+		map->remapbase  = MAX(4096, map->tom_minus_me);
-+		map->touud      = MIN(4096, map->tom_minus_me) + map->remapbase - map->tolud;
-+		map->remaplimit = map->touud - 1;
-+	} else {
-+		map->remapbase  = 0;
-+		map->remaplimit = 0;
-+		map->touud = map->tom_minus_me;
-+	}
-+}
-+
-+static void display_memory_map(const struct memory_map_data *map)
-+{
-+	if (!CONFIG(DEBUG_RAM_SETUP))
-+		return;
-+
-+	printk(BIOS_DEBUG, "============ MEMORY MAP ============\n");
-+	printk(BIOS_DEBUG, "\n");
-+	printk(BIOS_DEBUG, "dpr_size       = %u MiB\n", map->dpr_size);
-+	printk(BIOS_DEBUG, "tseg_size      = %u MiB\n", map->tseg_size);
-+	printk(BIOS_DEBUG, "gtt_size       = %u MiB\n", map->gtt_size);
-+	printk(BIOS_DEBUG, "gms_size       = %u MiB\n", map->gms_size);
-+	printk(BIOS_DEBUG, "me_stolen_size = %u MiB\n", map->me_stolen_size);
-+	printk(BIOS_DEBUG, "\n");
-+	printk(BIOS_DEBUG, "touud          = %u MiB\n", map->touud);
-+	printk(BIOS_DEBUG, "remaplimit     = %u MiB\n", map->remaplimit);
-+	printk(BIOS_DEBUG, "remapbase      = %u MiB\n", map->remapbase);
-+	printk(BIOS_DEBUG, "tom            = %u MiB\n", map->tom);
-+	printk(BIOS_DEBUG, "tom_minus_me   = %u MiB\n", map->tom_minus_me);
-+	printk(BIOS_DEBUG, "tolud          = %u MiB\n", map->tolud);
-+	printk(BIOS_DEBUG, "bdsm_base      = %u MiB\n", map->bdsm_base);
-+	printk(BIOS_DEBUG, "gtt_base       = %u MiB\n", map->gtt_base);
-+	printk(BIOS_DEBUG, "tseg_base      = %u MiB\n", map->tseg_base);
-+	printk(BIOS_DEBUG, "\n");
-+	printk(BIOS_DEBUG, "reclaim_possible = %s\n", map->reclaim_possible ? "Yes" : "No");
-+}
-+
-+static void map_write_reg64(const uint16_t reg, const uint64_t size)
-+{
-+	const uint64_t value = size << 20;
-+	pci_write_config32(HOST_BRIDGE, reg + 4, value >> 32);
-+	pci_write_config32(HOST_BRIDGE, reg + 0, value >>  0);
-+}
-+
-+static void map_write_reg32(const uint16_t reg, const uint32_t size)
-+{
-+	const uint32_t value = size << 20;
-+	pci_write_config32(HOST_BRIDGE, reg, value);
-+}
-+
-+static void program_memory_map(const struct memory_map_data *map)
-+{
-+	map_write_reg64(TOUUD, map->touud);
-+	map_write_reg64(TOM,   map->tom);
-+	if (map->reclaim_possible) {
-+		map_write_reg64(REMAPBASE,  map->remapbase);
-+		map_write_reg64(REMAPLIMIT, map->remaplimit);
-+	}
-+	if (map->me_stolen_size) {
-+		map_write_reg64(MESEG_LIMIT, 0x80000 - map->me_stolen_size);
-+		map_write_reg64(MESEG_BASE, map->tom_minus_me);
-+		pci_or_config32(HOST_BRIDGE, MESEG_LIMIT, ME_STLEN_EN);
-+	}
-+	map_write_reg32(TOLUD, map->tolud);
-+	map_write_reg32(BDSM,  map->bdsm_base);
-+	map_write_reg32(BGSM,  map->gtt_base);
-+	map_write_reg32(TSEG,  map->tseg_base);
-+
-+	const uint32_t dpr_reg = map->tseg_base << 20 | map->dpr_size << 4;
-+	pci_write_config32(HOST_BRIDGE, DPR, dpr_reg);
-+
-+	const uint16_t gfx_stolen_size = GGC_IGD_MEM_IN_32MB_UNITS(map->gms_size / 32);
-+	const uint16_t ggc = map->gtt_size << 8 | gfx_stolen_size;
-+	pci_write_config16(HOST_BRIDGE, GGC, ggc);
-+
-+	/** TODO: Do not hardcode these? GDXC has weird alignment requirements, though. **/
-+	gdxcbar_write32(MPCOHTRK_GDXC_MOT_ADDRESS_LO, 0);
-+	gdxcbar_write32(MPCOHTRK_GDXC_MOT_ADDRESS_HI, 0);
-+	gdxcbar_write32(MPCOHTRK_GDXC_MOT_REGION, 0);
-+
-+	gdxcbar_write32(MPCOHTRK_GDXC_OCLA_ADDRESS_LO, 0);
-+	gdxcbar_write32(MPCOHTRK_GDXC_OCLA_ADDRESS_HI, 0);
-+	gdxcbar_write32(MPCOHTRK_GDXC_OCLA_REGION, 0);
-+
-+	gdxcbar_setbits32(MPCOHTRK_GDXC_OCLA_ADDRESS_HI, MPCOHTRK_GDXC_OCLA_ADDRESS_HI_LOCK);
-+}
-+
-+enum raminit_status configure_memory_map(struct sysinfo *ctrl)
-+{
-+	struct memory_map_data memory_map = {
-+		.tom            = ctrl->channel_size_mb[0] + ctrl->channel_size_mb[1],
-+		.dpr_size       = CONFIG_INTEL_TXT_DPR_SIZE,
-+		.tseg_size      = CONFIG_SMM_TSEG_SIZE >> 20,
-+		.me_stolen_size = intel_early_me_uma_size(),
-+	};
-+	/** FIXME: MRC hardcodes iGPU parameters, but we should not **/
-+	const bool igpu_on = pci_read_config32(HOST_BRIDGE, DEVEN) & DEVEN_D2EN;
-+	if (CONFIG(ONBOARD_VGA_IS_PRIMARY) || igpu_on) {
-+		memory_map.gtt_size = 2;
-+		memory_map.gms_size = 64;
-+		pci_or_config32(HOST_BRIDGE, DEVEN, DEVEN_D2EN);
-+	}
-+	compute_memory_map(&memory_map);
-+	display_memory_map(&memory_map);
-+	program_memory_map(&memory_map);
-+	return 0;
-+}
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index fcc981ad04..559dfc3a4e 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -23,6 +23,7 @@ static const struct task_entry cold_boot[] = {
- 	{ initialise_mpll,                                        true, "INITMPLL",   },
- 	{ convert_timings,                                        true, "CONVTIM",    },
- 	{ configure_mc,                                           true, "CONFMC",     },
-+	{ configure_memory_map,                                   true, "MEMMAP",     },
- };
- 
- /* Return a generic stepping value to make stepping checks simpler */
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 5915a2bab0..8f937c4ccd 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -203,6 +203,7 @@ enum raminit_status collect_spd_info(struct sysinfo *ctrl);
- enum raminit_status initialise_mpll(struct sysinfo *ctrl);
- enum raminit_status convert_timings(struct sysinfo *ctrl);
- enum raminit_status configure_mc(struct sysinfo *ctrl);
-+enum raminit_status configure_memory_map(struct sysinfo *ctrl);
- 
- void configure_timings(struct sysinfo *ctrl);
- void configure_refresh(struct sysinfo *ctrl);
-diff --git a/src/northbridge/intel/haswell/registers/host_bridge.h b/src/northbridge/intel/haswell/registers/host_bridge.h
-index 1ee0ab2890..0228cf6bb9 100644
---- a/src/northbridge/intel/haswell/registers/host_bridge.h
-+++ b/src/northbridge/intel/haswell/registers/host_bridge.h
-@@ -34,6 +34,8 @@
- 
- #define MESEG_BASE	0x70	/* Management Engine Base */
- #define MESEG_LIMIT	0x78	/* Management Engine Limit */
-+#define  MELCK		(1 << 10)	/* ME Range Lock */
-+#define  ME_STLEN_EN	(1 << 11)	/* ME Stolen Memory Enable */
- 
- #define PAM0		0x80
- #define PAM1		0x81
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0035-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch b/config/coreboot/default/patches/0035-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
deleted file mode 100644
index 29bdec9f..00000000
--- a/config/coreboot/default/patches/0035-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
+++ /dev/null
@@ -1,1036 +0,0 @@
-From db2b383a8ee5a4fc45c9ce0003ae45f25ed51f86 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sat, 7 May 2022 21:49:40 +0200
-Subject: [PATCH 35/51] haswell NRI: Add DDR3 JEDEC reset and init
-
-Implement JEDEC reset and init sequence for DDR3. The MRS commands are
-issued through the REUT (Robust Electrical Unified Testing) hardware.
-
-Change-Id: I2a0c066537021b587599228086727cb1e041bff5
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/Makefile.mk  |   3 +
- .../intel/haswell/native_raminit/ddr3.c       | 217 ++++++++++++++++++
- .../haswell/native_raminit/io_comp_control.c  |  19 ++
- .../haswell/native_raminit/jedec_reset.c      | 120 ++++++++++
- .../haswell/native_raminit/raminit_main.c     |   2 +
- .../haswell/native_raminit/raminit_native.h   |  99 ++++++++
- .../haswell/native_raminit/reg_structs.h      | 154 +++++++++++++
- .../intel/haswell/native_raminit/reut.c       | 196 ++++++++++++++++
- .../intel/haswell/registers/mchbar.h          |  21 ++
- src/southbridge/intel/lynxpoint/pch.h         |   2 +
- 10 files changed, 833 insertions(+)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/ddr3.c
- create mode 100644 src/northbridge/intel/haswell/native_raminit/jedec_reset.c
- create mode 100644 src/northbridge/intel/haswell/native_raminit/reut.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-index 37d527e972..e9212df9e6 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-@@ -1,11 +1,14 @@
- ## SPDX-License-Identifier: GPL-2.0-or-later
- 
- romstage-y += configure_mc.c
-+romstage-y += ddr3.c
-+romstage-y += jedec_reset.c
- romstage-y += lookup_timings.c
- romstage-y += init_mpll.c
- romstage-y += io_comp_control.c
- romstage-y += memory_map.c
- romstage-y += raminit_main.c
- romstage-y += raminit_native.c
-+romstage-y += reut.c
- romstage-y += spd_bitmunching.c
- romstage-y += timings_refresh.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/ddr3.c b/src/northbridge/intel/haswell/native_raminit/ddr3.c
-new file mode 100644
-index 0000000000..6ddb11488b
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/ddr3.c
-@@ -0,0 +1,217 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <assert.h>
-+#include <console/console.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+
-+#define DDR3_RTTNOM(a, b, c) (((a) << 9) | ((b) << 6) | ((c) << 2))
-+
-+uint16_t encode_ddr3_rttnom(const uint32_t rttnom)
-+{
-+	switch (rttnom) {
-+	case 0:		return DDR3_RTTNOM(0, 0, 0);	/* RttNom is disabled */
-+	case 20:	return DDR3_RTTNOM(1, 0, 0);	/* RZQ/12 */
-+	case 30:	return DDR3_RTTNOM(1, 0, 1);	/* RZQ/8 */
-+	case 40:	return DDR3_RTTNOM(0, 1, 1);	/* RZQ/6 */
-+	case 60:	return DDR3_RTTNOM(0, 0, 1);	/* RZQ/4 */
-+	case 120:	return DDR3_RTTNOM(0, 1, 0);	/* RZQ/2 */
-+	}
-+	printk(BIOS_ERR, "%s: Invalid rtt_nom value %u\n", __func__, rttnom);
-+	return 0;
-+}
-+
-+static const uint8_t jedec_wr_t[12] = { 1, 2, 3, 4, 5, 5, 6, 6, 7, 7, 0, 0 };
-+
-+static void ddr3_program_mr0(struct sysinfo *ctrl, const uint8_t dll_reset)
-+{
-+	assert(ctrl->tWR >= 5 && ctrl->tWR <= 16);
-+	assert(ctrl->tAA >= 4);
-+	const uint8_t jedec_cas = ctrl->tAA - 4;
-+	const union {
-+		struct __packed {
-+			uint16_t burst_length     : 2; // Bits  1:0
-+			uint16_t cas_latency_msb  : 1; // Bits  2:2
-+			uint16_t read_burst_type  : 1; // Bits  3:3
-+			uint16_t cas_latency_low  : 3; // Bits  6:4
-+			uint16_t test_mode        : 1; // Bits  7:7
-+			uint16_t dll_reset        : 1; // Bits  8:8
-+			uint16_t write_recovery   : 3; // Bits 11:9
-+			uint16_t precharge_pd_dll : 1; // Bits 12:12
-+			uint16_t                  : 3; // Bits 15:13
-+		};
-+		uint16_t raw;
-+	} mr0reg = {
-+		.burst_length     = 0,
-+		.cas_latency_msb  = !!(jedec_cas & BIT(3)),
-+		.read_burst_type  = 0,
-+		.cas_latency_low  = jedec_cas & 0x7,
-+		.dll_reset        = 1,
-+		.write_recovery   = jedec_wr_t[ctrl->tWR - 5],
-+		.precharge_pd_dll = 0,
-+	};
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) {
-+			if (!rank_in_ch(ctrl, slot + slot, channel))
-+				continue;
-+
-+			if (!ctrl->restore_mrs)
-+				ctrl->mr0[channel][slot] = mr0reg.raw;
-+		}
-+		reut_issue_mrs_all(ctrl, channel, 0, ctrl->mr0[channel]);
-+	}
-+}
-+
-+void ddr3_program_mr1(struct sysinfo *ctrl, const uint8_t wl_mode, const uint8_t q_off)
-+{
-+	/*
-+	 * JESD79-3F (JEDEC DDR3 spec) refers to bit 0 of MR1 as 'DLL Enable'.
-+	 * However, its encoding is weird, and 'DLL Disable' makes more sense.
-+	 *
-+	 * Moreover, bit 5 is part of ODIC (Output Driver Impedance Control),
-+	 * but all encodings where MR1 bit 5 is 1 are reserved. Thus, omit it.
-+	 */
-+	union {
-+		struct __packed {
-+			uint16_t dll_disable      : 1; // Bits  0:0
-+			uint16_t od_impedance_ctl : 1; // Bits  1:1
-+			uint16_t odt_rtt_nom_low  : 1; // Bits  2:2
-+			uint16_t additive_latency : 2; // Bits  4:3
-+			uint16_t                  : 1; // Bits  5:5
-+			uint16_t odt_rtt_nom_mid  : 1; // Bits  6:6
-+			uint16_t write_level_mode : 1; // Bits  7:7
-+			uint16_t                  : 1; // Bits  8:8
-+			uint16_t odt_rtt_nom_high : 1; // Bits  9:9
-+			uint16_t                  : 1; // Bits 10:10
-+			uint16_t t_dqs            : 1; // Bits 11:11
-+			uint16_t q_off            : 1; // Bits 12:12
-+			uint16_t                  : 3; // Bits 15:13
-+		};
-+		uint16_t raw;
-+	} mr1reg = {
-+		.dll_disable      = 0,
-+		.od_impedance_ctl = 1,	/* RZQ/7 */
-+		.additive_latency = 0,
-+		.write_level_mode = wl_mode,
-+		.t_dqs            = 0,
-+		.q_off            = q_off,
-+	};
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		mr1reg.raw &= ~RTTNOM_MASK;
-+		mr1reg.raw |= encode_ddr3_rttnom(ctrl->dpc[channel] == 2 ? 60 : 0);
-+		for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) {
-+			if (!rank_in_ch(ctrl, slot + slot, channel))
-+				continue;
-+
-+			if (!ctrl->restore_mrs)
-+				ctrl->mr1[channel][slot] = mr1reg.raw;
-+		}
-+		reut_issue_mrs_all(ctrl, channel, 1, ctrl->mr1[channel]);
-+	}
-+}
-+
-+enum {
-+	RTT_WR_OFF = 0,
-+	RTT_WR_60  = 1,
-+	RTT_WR_120 = 2,
-+};
-+
-+static void ddr3_program_mr2(struct sysinfo *ctrl)
-+{
-+	assert(ctrl->tCWL >= 5);
-+	const bool dimm_srt = ctrl->flags.ext_temp_refresh && !ctrl->flags.asr;
-+
-+	const union {
-+		struct __packed {
-+			uint16_t partial_array_sr  : 3; // Bits  0:2
-+			uint16_t cas_write_latency : 3; // Bits  5:3
-+			uint16_t auto_self_refresh : 1; // Bits  6:6
-+			uint16_t self_refresh_temp : 1; // Bits  7:7
-+			uint16_t                   : 1; // Bits  8:8
-+			uint16_t odt_rtt_wr        : 2; // Bits 10:9
-+			uint16_t                   : 5; // Bits 15:11
-+		};
-+		uint16_t raw;
-+	} mr2reg = {
-+		.partial_array_sr  = 0,
-+		.cas_write_latency = ctrl->tCWL - 5,
-+		.auto_self_refresh = ctrl->flags.asr,
-+		.self_refresh_temp = dimm_srt,
-+		.odt_rtt_wr        = is_hsw_ult() ? RTT_WR_120 : RTT_WR_60,
-+	};
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) {
-+			if (!rank_in_ch(ctrl, slot + slot, channel))
-+				continue;
-+
-+			if (!ctrl->restore_mrs)
-+				ctrl->mr2[channel][slot] = mr2reg.raw;
-+		}
-+		/* MR2 shadow register is similar but not identical to MR2 */
-+		if (!ctrl->restore_mrs) {
-+			union tc_mr2_shadow_reg tc_mr2_shadow = {
-+				.raw = mr2reg.raw & 0x073f,
-+			};
-+			for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) {
-+				if (!rank_in_ch(ctrl, slot + slot, channel))
-+					continue;
-+
-+				if (dimm_srt)
-+					tc_mr2_shadow.srt_available |= BIT(slot);
-+
-+				if (ctrl->rank_mirrored[channel] & BIT(slot + slot + 1))
-+					tc_mr2_shadow.addr_bit_swizzle |= BIT(slot);
-+			}
-+			mchbar_write32(TC_MR2_SHADOW_ch(channel), tc_mr2_shadow.raw);
-+		}
-+		reut_issue_mrs_all(ctrl, channel, 2, ctrl->mr2[channel]);
-+	}
-+}
-+
-+static void ddr3_program_mr3(struct sysinfo *ctrl, const uint8_t mpr_mode)
-+{
-+	const union {
-+		struct __packed {
-+			uint16_t mpr_loc  :  2; // Bits  1:0
-+			uint16_t mpr_mode :  1; // Bits  2:2
-+			uint16_t          : 13; // Bits 15:3
-+		};
-+		uint16_t raw;
-+	} mr3reg = {
-+		.mpr_loc  = 0,
-+		.mpr_mode = mpr_mode,
-+	};
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) {
-+			if (!rank_in_ch(ctrl, slot + slot, channel))
-+				continue;
-+
-+			if (!ctrl->restore_mrs)
-+				ctrl->mr3[channel][slot] = mr3reg.raw;
-+		}
-+		reut_issue_mrs_all(ctrl, channel, 3, ctrl->mr3[channel]);
-+	}
-+}
-+
-+enum raminit_status ddr3_jedec_init(struct sysinfo *ctrl)
-+{
-+	ddr3_program_mr2(ctrl);
-+	ddr3_program_mr3(ctrl, 0);
-+	ddr3_program_mr1(ctrl, 0, 0);
-+	ddr3_program_mr0(ctrl, 1);
-+	return reut_issue_zq(ctrl, ctrl->chanmap, ZQ_INIT);
-+}
-diff --git a/src/northbridge/intel/haswell/native_raminit/io_comp_control.c b/src/northbridge/intel/haswell/native_raminit/io_comp_control.c
-index d45b608dd3..8a55fd81b2 100644
---- a/src/northbridge/intel/haswell/native_raminit/io_comp_control.c
-+++ b/src/northbridge/intel/haswell/native_raminit/io_comp_control.c
-@@ -8,6 +8,25 @@
- 
- #include "raminit_native.h"
- 
-+enum raminit_status io_reset(void)
-+{
-+	union mc_init_state_g_reg mc_init_state_g = {
-+		.raw = mchbar_read32(MC_INIT_STATE_G),
-+	};
-+	mc_init_state_g.reset_io = 1;
-+	mchbar_write32(MC_INIT_STATE_G, mc_init_state_g.raw);
-+	struct stopwatch timer;
-+	stopwatch_init_msecs_expire(&timer, 2000);
-+	do {
-+		mc_init_state_g.raw = mchbar_read32(MC_INIT_STATE_G);
-+		if (mc_init_state_g.reset_io == 0)
-+			return RAMINIT_STATUS_SUCCESS;
-+
-+	} while (!stopwatch_expired(&timer));
-+	printk(BIOS_ERR, "Timed out waiting for DDR I/O reset to complete\n");
-+	return RAMINIT_STATUS_POLL_TIMEOUT;
-+}
-+
- enum raminit_status wait_for_first_rcomp(void)
- {
- 	struct stopwatch timer;
-diff --git a/src/northbridge/intel/haswell/native_raminit/jedec_reset.c b/src/northbridge/intel/haswell/native_raminit/jedec_reset.c
-new file mode 100644
-index 0000000000..de0f676758
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/jedec_reset.c
-@@ -0,0 +1,120 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <console/console.h>
-+#include <delay.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <southbridge/intel/lynxpoint/pch.h>
-+#include <types.h>
-+#include <timer.h>
-+
-+#include "raminit_native.h"
-+
-+static void assert_reset(const bool do_reset)
-+{
-+	if (is_hsw_ult()) {
-+		uint32_t pm_cfg2 = RCBA32(PM_CFG2);
-+		if (do_reset)
-+			pm_cfg2 &= ~PM_CFG2_DRAM_RESET_CTL;
-+		else
-+			pm_cfg2 |= PM_CFG2_DRAM_RESET_CTL;
-+		RCBA32(PM_CFG2) = pm_cfg2;
-+	} else {
-+		union mc_init_state_g_reg mc_init_state_g = {
-+			.raw = mchbar_read32(MC_INIT_STATE_G),
-+		};
-+		mc_init_state_g.ddr_not_reset = !do_reset;
-+		mchbar_write32(MC_INIT_STATE_G, mc_init_state_g.raw);
-+	}
-+}
-+
-+/*
-+ * Perform JEDEC reset.
-+ *
-+ * If RTT_NOM is to be enabled in MR1, the ODT input signal must be
-+ * statically held low in our system since RTT_NOM is always enabled.
-+ */
-+static void jedec_reset(struct sysinfo *ctrl)
-+{
-+	if (is_hsw_ult())
-+		assert_reset(false);
-+
-+	union mc_init_state_g_reg mc_init_state_g = {
-+		.ddr_not_reset     = 1,
-+		.safe_self_refresh = 1,
-+	};
-+	mchbar_write32(MC_INIT_STATE_G, mc_init_state_g.raw);
-+
-+	union reut_misc_cke_ctrl_reg reut_misc_cke_ctrl = {
-+		.cke_override = 0xf,
-+		.cke_on       = 0,
-+	};
-+	mchbar_write32(REUT_MISC_CKE_CTRL, reut_misc_cke_ctrl.raw);
-+
-+	assert_reset(true);
-+
-+	/** TODO: check and switch DDR3 voltage here (mainboard-specific) **/
-+
-+	udelay(200);
-+
-+	assert_reset(false);
-+
-+	udelay(500);
-+
-+	mc_init_state_g.dclk_enable = 1;
-+	mchbar_write32(MC_INIT_STATE_G, mc_init_state_g.raw);
-+
-+	/* Delay at least 20 nanoseconds for tCKSRX */
-+	tick_delay(1);
-+
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		reut_misc_cke_ctrl.cke_on = ctrl->rankmap[channel];
-+		mchbar_write32(REUT_ch_MISC_CKE_CTRL(channel), reut_misc_cke_ctrl.raw);
-+	}
-+
-+	/*
-+	 * Wait minimum of reset CKE exit time, tXPR.
-+	 * Spec says MAX(tXS, 5 tCK). 5 tCK is 10 ns.
-+	 */
-+	tick_delay(1);
-+}
-+
-+enum raminit_status do_jedec_init(struct sysinfo *ctrl)
-+{
-+	/* Never do a JEDEC reset in S3 resume */
-+	if (ctrl->bootmode == BOOTMODE_S3)
-+		return RAMINIT_STATUS_SUCCESS;
-+
-+	enum raminit_status status = io_reset();
-+	if (status)
-+		return status;
-+
-+	status = wait_for_first_rcomp();
-+	if (status)
-+		return status;
-+
-+	/* Force ODT low (JEDEC spec) */
-+	const union reut_misc_odt_ctrl_reg reut_misc_odt_ctrl = {
-+		.odt_override = 0xf,
-+		.odt_on       = 0,
-+	};
-+	mchbar_write32(REUT_MISC_ODT_CTRL, reut_misc_odt_ctrl.raw);
-+
-+	/*
-+	 * Note: Haswell MRC does not clear ODT override for LPDDR3. However,
-+	 * Broadwell MRC does. Hell suspects this difference is important, as
-+	 * there is an erratum in the specification update for Broadwell:
-+	 *
-+	 * Erratum BDM74: LPDDR3 Memory Training May Cause Platform Boot Failure
-+	 */
-+	if (ctrl->lpddr)
-+		die("%s: LPDDR-specific JEDEC init not implemented\n", __func__);
-+
-+	jedec_reset(ctrl);
-+	status = ddr3_jedec_init(ctrl);
-+	if (!status)
-+		ctrl->restore_mrs = true;
-+
-+	/* Release ODT override */
-+	mchbar_write32(REUT_MISC_ODT_CTRL, 0);
-+	return status;
-+}
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 559dfc3a4e..94b268468c 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -24,6 +24,7 @@ static const struct task_entry cold_boot[] = {
- 	{ convert_timings,                                        true, "CONVTIM",    },
- 	{ configure_mc,                                           true, "CONFMC",     },
- 	{ configure_memory_map,                                   true, "MEMMAP",     },
-+	{ do_jedec_init,                                          true, "JEDECINIT",  },
- };
- 
- /* Return a generic stepping value to make stepping checks simpler */
-@@ -57,6 +58,7 @@ static void initialize_ctrl(struct sysinfo *ctrl)
- 	ctrl->stepping = get_stepping(ctrl->cpu);
- 	ctrl->vdd_mv = is_hsw_ult() ? 1350 : 1500; /** FIXME: Hardcoded, does it matter? **/
- 	ctrl->dq_pins_interleaved = cfg->dq_pins_interleaved;
-+	ctrl->restore_mrs = false;
- 	ctrl->bootmode = bootmode;
- }
- 
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 8f937c4ccd..759d755d6d 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -28,6 +28,30 @@
- /* Always use 12 legs for emphasis (not trained) */
- #define TXEQFULLDRV		(3 << 4)
- 
-+/* DDR3 mode register bits */
-+#define MR0_DLL_RESET		BIT(8)
-+
-+#define MR1_WL_ENABLE		BIT(7)
-+#define MR1_QOFF_ENABLE		BIT(12) /* If set, output buffers disabled */
-+
-+#define RTTNOM_MASK		(BIT(9) | BIT(6) | BIT(2))
-+
-+/* ZQ calibration types */
-+enum {
-+	ZQ_INIT,	/* DDR3: ZQCL with tZQinit, LPDDR3: ZQ Init  with tZQinit  */
-+	ZQ_LONG,	/* DDR3: ZQCL with tZQoper, LPDDR3: ZQ Long  with tZQCL    */
-+	ZQ_SHORT,	/* DDR3: ZQCS with tZQCS,   LPDDR3: ZQ Short with tZQCS    */
-+	ZQ_RESET,	/* DDR3: not used,          LPDDR3: ZQ Reset with tZQreset */
-+};
-+
-+/* REUT initialisation modes */
-+enum {
-+	REUT_MODE_IDLE = 0,
-+	REUT_MODE_TEST = 1,
-+	REUT_MODE_MRS  = 2,
-+	REUT_MODE_NOP  = 3, /* Normal operation mode */
-+};
-+
- enum command_training_iteration {
- 	CT_ITERATION_CLOCK = 0,
- 	CT_ITERATION_CMD_NORTH,
-@@ -51,6 +75,7 @@ enum raminit_status {
- 	RAMINIT_STATUS_UNSUPPORTED_MEMORY,
- 	RAMINIT_STATUS_MPLL_INIT_FAILURE,
- 	RAMINIT_STATUS_POLL_TIMEOUT,
-+	RAMINIT_STATUS_REUT_ERROR,
- 	RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
- };
- 
-@@ -73,6 +98,7 @@ struct sysinfo {
- 	uint32_t cpu;		/* CPUID value */
- 
- 	bool dq_pins_interleaved;
-+	bool restore_mrs;
- 
- 	/** TODO: ECC support untested **/
- 	bool is_ecc;
-@@ -162,6 +188,11 @@ struct sysinfo {
- 	union tc_bank_rank_b_reg tc_bankrank_b[NUM_CHANNELS];
- 	union tc_bank_rank_c_reg tc_bankrank_c[NUM_CHANNELS];
- 	union tc_bank_rank_d_reg tc_bankrank_d[NUM_CHANNELS];
-+
-+	uint16_t mr0[NUM_CHANNELS][NUM_SLOTS];
-+	uint16_t mr1[NUM_CHANNELS][NUM_SLOTS];
-+	uint16_t mr2[NUM_CHANNELS][NUM_SLOTS];
-+	uint16_t mr3[NUM_CHANNELS][NUM_SLOTS];
- };
- 
- static inline bool is_hsw_ult(void)
-@@ -197,6 +228,53 @@ static inline void clear_data_offset_train_all(struct sysinfo *ctrl)
- 	memset(ctrl->data_offset_train, 0, sizeof(ctrl->data_offset_train));
- }
- 
-+/* Number of ticks to wait in units of 69.841279 ns (citation needed) */
-+static inline void tick_delay(const uint32_t delay)
-+{
-+	/* Just perform reads to a random register */
-+	for (uint32_t start = 0; start <= delay; start++)
-+		mchbar_read32(REUT_ERR_DATA_STATUS);
-+}
-+
-+/*
-+ * 64-bit MCHBAR registers need to be accessed atomically. If one uses
-+ * two 32-bit ops instead, there will be problems with the REUT's CADB
-+ * (Command Address Data Buffer): hardware automatically advances the
-+ * pointer into the register file after a write to the input register.
-+ */
-+static inline uint64_t mchbar_read64(const uintptr_t x)
-+{
-+	const uint64_t *offset = (uint64_t *)(CONFIG_FIXED_MCHBAR_MMIO_BASE + x);
-+	uint64_t mmxsave, v;
-+	asm volatile (
-+		"\n\t movq %%mm0, %0"
-+		"\n\t movq %2, %%mm0"
-+		"\n\t movq %%mm0, %1"
-+		"\n\t movq %3, %%mm0"
-+		"\n\t emms"
-+		: "=m"(mmxsave),
-+		  "=m"(v)
-+		: "m"(offset[0]),
-+		  "m"(mmxsave));
-+	return v;
-+}
-+
-+static inline void mchbar_write64(const uintptr_t x, const uint64_t v)
-+{
-+	const uint64_t *offset = (uint64_t *)(CONFIG_FIXED_MCHBAR_MMIO_BASE + x);
-+	uint64_t mmxsave;
-+	asm volatile (
-+		"\n\t movq %%mm0, %0"
-+		"\n\t movq %2, %%mm0"
-+		"\n\t movq %%mm0, %1"
-+		"\n\t movq %3, %%mm0"
-+		"\n\t emms"
-+		: "=m"(mmxsave)
-+		: "m"(offset[0]),
-+		  "m"(v),
-+		  "m"(mmxsave));
-+}
-+
- void raminit_main(enum raminit_boot_mode bootmode);
- 
- enum raminit_status collect_spd_info(struct sysinfo *ctrl);
-@@ -204,6 +282,7 @@ enum raminit_status initialise_mpll(struct sysinfo *ctrl);
- enum raminit_status convert_timings(struct sysinfo *ctrl);
- enum raminit_status configure_mc(struct sysinfo *ctrl);
- enum raminit_status configure_memory_map(struct sysinfo *ctrl);
-+enum raminit_status do_jedec_init(struct sysinfo *ctrl);
- 
- void configure_timings(struct sysinfo *ctrl);
- void configure_refresh(struct sysinfo *ctrl);
-@@ -216,8 +295,28 @@ uint32_t get_tXS_offset(uint32_t mem_clock_mhz);
- uint32_t get_tZQOPER(uint32_t mem_clock_mhz, bool lpddr);
- uint32_t get_tZQCS(uint32_t mem_clock_mhz, bool lpddr);
- 
-+enum raminit_status io_reset(void);
- enum raminit_status wait_for_first_rcomp(void);
- 
-+uint16_t encode_ddr3_rttnom(uint32_t rttnom);
-+void ddr3_program_mr1(struct sysinfo *ctrl, uint8_t wl_mode, uint8_t q_off);
-+enum raminit_status ddr3_jedec_init(struct sysinfo *ctrl);
-+
-+void reut_issue_mrs(
-+	struct sysinfo *ctrl,
-+	uint8_t channel,
-+	uint8_t rankmask,
-+	uint8_t mr,
-+	uint16_t val);
-+
-+void reut_issue_mrs_all(
-+	struct sysinfo *ctrl,
-+	uint8_t channel,
-+	uint8_t mr,
-+	const uint16_t val[NUM_SLOTS]);
-+
-+enum raminit_status reut_issue_zq(struct sysinfo *ctrl, uint8_t chanmask, uint8_t zq_type);
-+
- uint8_t get_rx_bias(const struct sysinfo *ctrl);
- 
- uint8_t get_tCWL(uint32_t mem_clock_mhz);
-diff --git a/src/northbridge/intel/haswell/native_raminit/reg_structs.h b/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-index 70487e1640..9929f617fe 100644
---- a/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-+++ b/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-@@ -335,6 +335,127 @@ union mcscheds_cbit_reg {
- 	uint32_t raw;
- };
- 
-+union reut_pat_cadb_prog_reg {
-+	struct __packed {
-+		uint32_t addr : 16; // Bits 15:0
-+		uint32_t      :  8; // Bits 23:16
-+		uint32_t bank :  3; // Bits 26:24
-+		uint32_t      :  5; // Bits 31:27
-+		uint32_t cs   :  4; // Bits 35:32
-+		uint32_t      :  4; // Bits 39:36
-+		uint32_t cmd  :  3; // Bits 42:40
-+		uint32_t      :  5; // Bits 47:43
-+		uint32_t odt  :  4; // Bits 51:48
-+		uint32_t      :  4; // Bits 55:52
-+		uint32_t cke  :  4; // Bits 59:56
-+		uint32_t      :  4; // Bits 63:60
-+	};
-+	uint64_t raw;
-+	uint32_t raw32[2];
-+};
-+
-+union reut_pat_cadb_mrs_reg {
-+	struct __packed {
-+		uint32_t delay_gap : 3; // Bits  2:0
-+		uint32_t           : 5; // Bits  7:3
-+		uint32_t start_ptr : 3; // Bits 10:8
-+		uint32_t           : 5; // Bits 15:11
-+		uint32_t end_ptr   : 3; // Bits 18:16
-+		uint32_t           : 5; // Bits 23:19
-+		uint32_t curr_ptr  : 3; // Bits 26:24
-+		uint32_t           : 5; // Bits 31:27
-+	};
-+	uint32_t raw;
-+};
-+
-+union reut_seq_cfg_reg {
-+	struct __packed {
-+		uint32_t                               :  3; // Bits  2:0
-+		uint32_t stop_base_seq_on_wrap_trigger :  1; // Bits  3:3
-+		uint32_t                               :  1; // Bits  4:4
-+		uint32_t address_update_rate_mode      :  1; // Bits  5:5
-+		uint32_t                               :  1; // Bits  6:6
-+		uint32_t enable_dummy_reads            :  1; // Bits  7:7
-+		uint32_t                               :  2; // Bits  9:8
-+		uint32_t enable_constant_write_strobe  :  1; // Bits 10:10
-+		uint32_t global_control                :  1; // Bits 11:11
-+		uint32_t initialization_mode           :  2; // Bits 13:12
-+		uint32_t                               :  2; // Bits 15:14
-+		uint32_t early_steppings_loop_count    :  5; // Bits 20:16   *** Not on C0 ***
-+		uint32_t                               :  3; // Bits 23:21
-+		uint32_t subsequence_start_pointer     :  3; // Bits 26:24
-+		uint32_t                               :  1; // Bits 27:27
-+		uint32_t subsequence_end_pointer       :  3; // Bits 30:28
-+		uint32_t                               :  1; // Bits 31:31
-+		uint32_t start_test_delay              : 10; // Bits 41:32
-+		uint32_t                               : 22; // Bits 63:42
-+	};
-+	uint64_t raw;
-+	uint32_t raw32[2];
-+};
-+
-+union reut_seq_ctl_reg {
-+	struct __packed {
-+		uint32_t start_test    :  1; // Bits  0:0
-+		uint32_t stop_test     :  1; // Bits  1:1
-+		uint32_t clear_errors  :  1; // Bits  2:2
-+		uint32_t               :  1; // Bits  3:3
-+		uint32_t stop_on_error :  1; // Bits  4:4
-+		uint32_t               : 27; // Bits 31:5
-+	};
-+	uint32_t raw;
-+};
-+
-+union reut_global_err_reg {
-+	struct __packed {
-+		uint32_t ch_error     :  2; // Bits  1:0
-+		uint32_t              : 14; // Bits 15:2
-+		uint32_t ch_test_done :  2; // Bits 17:16
-+		uint32_t              : 14; // Bits 31:18
-+	};
-+	uint32_t raw;
-+};
-+
-+union reut_misc_cke_ctrl_reg {
-+	struct __packed {
-+		uint32_t cke_override           :  4; // Bits  3:0
-+		uint32_t                        :  4; // Bits  7:4
-+		uint32_t cke_en_start_test_sync :  1; // Bits  8:8
-+		uint32_t                        :  7; // Bits 15:9
-+		uint32_t cke_on                 :  4; // Bits 19:16
-+		uint32_t                        : 12; // Bits 31:20
-+	};
-+	uint32_t raw;
-+};
-+
-+union reut_misc_odt_ctrl_reg {
-+	struct __packed {
-+		uint32_t odt_override     :  4; // Bits  3:0
-+		uint32_t                  : 12; // Bits 15:4
-+		uint32_t odt_on           :  4; // Bits 19:16
-+		uint32_t                  : 11; // Bits 30:20
-+		uint32_t mpr_train_ddr_on :  1; // Bits 31:31
-+	};
-+	uint32_t raw;
-+};
-+
-+union mcscheds_dft_misc_reg {
-+	struct __packed {
-+		uint32_t wdar                 :  1; // Bits  0:0
-+		uint32_t safe_mask_sel        :  3; // Bits  3:1
-+		uint32_t force_rcv_en         :  1; // Bits  4:4
-+		uint32_t                      :  3; // Bits  7:5
-+		uint32_t ddr_qualifier        :  2; // Bits  9:8
-+		uint32_t qualifier_length     :  2; // Bits 11:10
-+		uint32_t wdb_block_en         :  1; // Bits 12:12
-+		uint32_t rt_dft_read_ptr      :  4; // Bits 16:13
-+		uint32_t rt_dft_read_enable   :  1; // Bits 17:17
-+		uint32_t rt_dft_read_sel_addr :  1; // Bits 18:18
-+		uint32_t                      : 13; // Bits 31:19
-+	};
-+	uint32_t raw;
-+};
-+
- union tc_bank_reg {
- 	struct __packed {
- 		uint32_t tRCD      : 5; // Bits  4:0
-@@ -428,6 +549,18 @@ union tc_srftp_reg {
- 	uint32_t raw;
- };
- 
-+union tc_mr2_shadow_reg {
-+	struct __packed {
-+		uint32_t mr2_shadow_low   :  6; // Bits  5:0
-+		uint32_t srt_available    :  2; // Bits  7:6
-+		uint32_t mr2_shadow_high  :  3; // Bits 10:8
-+		uint32_t                  :  3; // Bits 13:11
-+		uint32_t addr_bit_swizzle :  2; // Bits 15:14
-+		uint32_t                  : 16; // Bits 31:16
-+	};
-+	uint32_t raw;
-+};
-+
- union mcmain_command_rate_limit_reg {
- 	struct __packed {
- 		uint32_t enable_cmd_limit :  1; // Bits  0:0
-@@ -483,6 +616,27 @@ union mad_zr_reg {
- 	uint32_t raw;
- };
- 
-+union mc_init_state_g_reg {
-+	struct __packed {
-+		uint32_t pu_mrc_done        :  1; // Bits  0:0
-+		uint32_t ddr_not_reset      :  1; // Bits  1:1
-+		uint32_t                    :  1; // Bits  2:2
-+		uint32_t refresh_enable     :  1; // Bits  3:3
-+		uint32_t                    :  1; // Bits  4:4
-+		uint32_t mc_init_done_ack   :  1; // Bits  5:5
-+		uint32_t                    :  1; // Bits  6:6
-+		uint32_t mrc_done           :  1; // Bits  7:7
-+		uint32_t safe_self_refresh  :  1; // Bits  8:8
-+		uint32_t                    :  1; // Bits  9:9
-+		uint32_t hvm_gate_ddr_reset :  1; // Bits 10:10
-+		uint32_t                    : 11; // Bits 21:11
-+		uint32_t dclk_enable        :  1; // Bits 22:22
-+		uint32_t reset_io           :  1; // Bits 23:23
-+		uint32_t                    :  8; // Bits 31:24
-+	};
-+	uint32_t raw;
-+};
-+
- /* Same definition for P_COMP, M_COMP, D_COMP */
- union pcu_comp_reg {
- 	struct __packed {
-diff --git a/src/northbridge/intel/haswell/native_raminit/reut.c b/src/northbridge/intel/haswell/native_raminit/reut.c
-new file mode 100644
-index 0000000000..31019f74a1
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/reut.c
-@@ -0,0 +1,196 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <console/console.h>
-+#include <delay.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <timer.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+
-+enum {
-+	CADB_CMD_MRS = 0,
-+	CADB_CMD_REF = 1,
-+	CADB_CMD_PRE = 2,
-+	CADB_CMD_ACT = 3,
-+	CADB_CMD_WR  = 4,
-+	CADB_CMD_RD  = 5,
-+	CADB_CMD_ZQ  = 6,
-+	CADB_CMD_NOP = 7,
-+};
-+
-+/*
-+ * DDR3 rank mirror swaps the following pins: A3<->A4, A5<->A6, A7<->A8, BA0<->BA1
-+ *
-+ * Note that the swapped bits are contiguous. We can use some XOR magic to swap the bits.
-+ * Address lanes are at bits 0..15 and bank selects are at bits 24..26 on the REUT register.
-+ */
-+#define MIRROR_BITS	(BIT(24) | BIT(7) | BIT(5) | BIT(3))
-+static uint64_t cadb_prog_rank_mirror(const uint64_t cadb_prog)
-+{
-+	/* First XOR: find which pairs of bits are different (need swapping) */
-+	const uint64_t tmp64 = (cadb_prog ^ (cadb_prog >> 1)) & MIRROR_BITS;
-+
-+	/* Second XOR: invert the pairs of bits that have different values */
-+	return cadb_prog ^ (tmp64 | tmp64 << 1);
-+}
-+
-+static enum raminit_status reut_write_cadb_cmd(
-+	struct sysinfo *ctrl,
-+	const uint8_t channel,
-+	const uint8_t rankmask,
-+	const uint8_t cmd,
-+	const uint8_t bank,
-+	const uint16_t valarr[NUM_SLOTRANKS],
-+	const uint8_t delay)
-+{
-+	union mcscheds_dft_misc_reg dft_misc = {
-+		.raw = mchbar_read32(MCSCHEDS_DFT_MISC),
-+	};
-+	dft_misc.ddr_qualifier = 0;
-+	mchbar_write32(MCSCHEDS_DFT_MISC, dft_misc.raw);
-+
-+	/* Pointer will be dynamically incremented after a write to CADB_PROG register */
-+	mchbar_write8(REUT_ch_PAT_CADB_WRITE_PTR(channel), 0);
-+
-+	uint8_t count = 0;
-+	for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+		if (!(ctrl->rankmap[channel] & BIT(rank) & rankmask))
-+			continue;
-+
-+		union reut_pat_cadb_prog_reg reut_cadb_prog = {
-+			.addr = valarr[rank],
-+			.bank = bank,
-+			.cs   = ~BIT(rank), /* CS is active low */
-+			.cmd  = cmd,
-+			.cke  = 0xf,
-+		};
-+		if (ctrl->rank_mirrored[channel] & BIT(rank))
-+			reut_cadb_prog.raw = cadb_prog_rank_mirror(reut_cadb_prog.raw);
-+
-+		mchbar_write64(REUT_ch_PAT_CADB_PROG(channel), reut_cadb_prog.raw);
-+		count++;
-+	}
-+	if (!count) {
-+		printk(BIOS_ERR, "%s: rankmask is invalid\n", __func__);
-+		return RAMINIT_STATUS_UNSPECIFIED_ERROR;	/** FIXME: Is this needed? **/
-+	}
-+	const union reut_pat_cadb_mrs_reg reut_cadb_mrs = {
-+		.delay_gap = delay ? delay : 3,
-+		.end_ptr   = count - 1,
-+	};
-+	mchbar_write32(REUT_ch_PAT_CADB_MRS(channel), reut_cadb_mrs.raw);
-+
-+	const uint32_t reut_seq_cfg_save = mchbar_read32(REUT_ch_SEQ_CFG(channel));
-+	union reut_seq_cfg_reg reut_seq_cfg = {
-+		.raw = reut_seq_cfg_save,
-+	};
-+	reut_seq_cfg.global_control = 0;
-+	reut_seq_cfg.initialization_mode = REUT_MODE_MRS;
-+	mchbar_write32(REUT_ch_SEQ_CFG(channel), reut_seq_cfg.raw);
-+	mchbar_write32(REUT_ch_SEQ_CTL(channel), (union reut_seq_ctl_reg) {
-+		.start_test   = 1,
-+		.clear_errors = 1,
-+	}.raw);
-+	enum raminit_status status = RAMINIT_STATUS_SUCCESS;
-+	union reut_global_err_reg reut_global_err;
-+	struct stopwatch timer;
-+	stopwatch_init_msecs_expire(&timer, 100);
-+	do {
-+		reut_global_err.raw = mchbar_read32(REUT_GLOBAL_ERR);
-+		if (reut_global_err.ch_error & BIT(channel)) {
-+			printk(BIOS_ERR, "Unexpected REUT error for channel %u\n", channel);
-+			status = RAMINIT_STATUS_REUT_ERROR;
-+			break;
-+		}
-+		if (stopwatch_expired(&timer)) {
-+			printk(BIOS_ERR, "%s: REUT timed out!\n", __func__);
-+			status = RAMINIT_STATUS_POLL_TIMEOUT;
-+			break;
-+		}
-+	} while (!(reut_global_err.ch_test_done & BIT(channel)));
-+	mchbar_write32(REUT_ch_SEQ_CTL(channel), (union reut_seq_ctl_reg) {
-+		.clear_errors = 1,
-+	}.raw);
-+	mchbar_write32(REUT_ch_SEQ_CFG(channel), reut_seq_cfg_save);
-+	return status;
-+}
-+
-+static enum raminit_status reut_write_cadb_cmd_all(
-+	struct sysinfo *ctrl,
-+	const uint8_t channel,
-+	const uint8_t rankmask,
-+	const uint8_t cmd,
-+	const uint8_t bank,
-+	const uint16_t val,
-+	const uint8_t delay)
-+{
-+	const uint16_t valarr[NUM_SLOTRANKS] = { val, val, val, val };
-+	return reut_write_cadb_cmd(ctrl, channel, rankmask, cmd, bank, valarr, delay);
-+}
-+
-+void reut_issue_mrs(
-+	struct sysinfo *ctrl,
-+	const uint8_t channel,
-+	const uint8_t rankmask,
-+	const uint8_t mr,
-+	const uint16_t val)
-+{
-+	reut_write_cadb_cmd_all(ctrl, channel, rankmask, CADB_CMD_MRS, mr, val, 0);
-+}
-+
-+void reut_issue_mrs_all(
-+	struct sysinfo *ctrl,
-+	const uint8_t channel,
-+	const uint8_t mr,
-+	const uint16_t val[NUM_SLOTS])
-+{
-+	const uint16_t valarr[NUM_SLOTRANKS] = { val[0], val[0], val[1], val[1] };
-+	reut_write_cadb_cmd(ctrl, channel, 0xf, CADB_CMD_MRS, mr, valarr, 0);
-+}
-+
-+enum raminit_status reut_issue_zq(struct sysinfo *ctrl, uint8_t chanmask, uint8_t zq_type)
-+{
-+	/** TODO: Issuing ZQ commands differs for LPDDR **/
-+	if (ctrl->lpddr)
-+		die("%s: LPDDR not yet supported in ZQ calibration\n", __func__);
-+
-+	__maybe_unused uint8_t opcode; /* NOTE: Only used for LPDDR */
-+	uint16_t zq = 0;
-+	switch (zq_type) {
-+	case ZQ_INIT:
-+		zq = BIT(10);
-+		opcode = 0xff;
-+		break;
-+	case ZQ_LONG:
-+		zq = BIT(10);
-+		opcode = 0xab;
-+		break;
-+	case ZQ_SHORT:
-+		opcode = 0x56;
-+		break;
-+	case ZQ_RESET:
-+		opcode = 0xc3;
-+		break;
-+	default:
-+		die("%s: ZQ type %u is invalid\n", __func__, zq_type);
-+	}
-+
-+	/* ZQCS on single-channel needs a longer delay */
-+	const uint8_t delay = zq_type == ZQ_SHORT && (!ctrl->dpc[0] || !ctrl->dpc[1]) ? 7 : 1;
-+	enum raminit_status status = RAMINIT_STATUS_SUCCESS;
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!(BIT(channel) & chanmask) || !does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		status = reut_write_cadb_cmd_all(ctrl, channel, 0xf, CADB_CMD_ZQ, 0, zq, delay);
-+		if (status)
-+			break;
-+	}
-+
-+	/* Wait a bit after ZQ INIT and ZQCL commands */
-+	if (zq)
-+		udelay(1);
-+
-+	return status;
-+}
-diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h
-index 2acc5cbbc8..4fc78a7f43 100644
---- a/src/northbridge/intel/haswell/registers/mchbar.h
-+++ b/src/northbridge/intel/haswell/registers/mchbar.h
-@@ -96,15 +96,36 @@
- 
- #define SC_WR_ADD_DELAY_ch(ch)			_MCMAIN_C(0x40d0, ch)
- 
-+#define REUT_ch_MISC_CKE_CTRL(ch)		_MCMAIN_C(0x4190, ch)
-+
-+#define REUT_ch_PAT_CADB_MRS(ch)		_MCMAIN_C(0x419c, ch)
-+
-+#define REUT_ch_PAT_CADB_WRITE_PTR(ch)		_MCMAIN_C(0x41bc, ch)
-+#define REUT_ch_PAT_CADB_PROG(ch)		_MCMAIN_C(0x41c0, ch)
-+
- #define TC_ZQCAL_ch(ch)				_MCMAIN_C(0x4290, ch)
- #define TC_RFP_ch(ch)				_MCMAIN_C(0x4294, ch)
- #define TC_RFTP_ch(ch)				_MCMAIN_C(0x4298, ch)
-+#define TC_MR2_SHADOW_ch(ch)			_MCMAIN_C(0x429c, ch)
- #define MC_INIT_STATE_ch(ch)			_MCMAIN_C(0x42a0, ch)
- #define TC_SRFTP_ch(ch)				_MCMAIN_C(0x42a4, ch)
- 
-+#define REUT_GLOBAL_ERR				0x4804
-+
-+#define REUT_ch_SEQ_CFG(ch)			(0x48a8 + 8 * (ch))
-+
-+#define REUT_ch_SEQ_CTL(ch)			(0x48b8 + 4 * (ch))
-+
- /* MCMAIN broadcast */
- #define MCSCHEDS_CBIT		0x4c20
- 
-+#define MCSCHEDS_DFT_MISC	0x4c30
-+
-+#define REUT_ERR_DATA_STATUS	0x4ce0
-+
-+#define REUT_MISC_CKE_CTRL	0x4d90
-+#define REUT_MISC_ODT_CTRL	0x4d94
-+
- #define MCMNTS_SC_WDBWM		0x4f8c
- 
- /* MCDECS */
-diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h
-index 07f4b9dc16..5b3696347c 100644
---- a/src/southbridge/intel/lynxpoint/pch.h
-+++ b/src/southbridge/intel/lynxpoint/pch.h
-@@ -586,6 +586,8 @@ void mainboard_config_rcba(void);
- #define ACPIIRQEN	0x31e0	/* 32bit */
- #define OIC		0x31fe	/* 16bit */
- #define PRSTS		0x3310	/* 32bit */
-+#define PM_CFG2		0x333c	/* 32bit */
-+#define  PM_CFG2_DRAM_RESET_CTL	(1 << 26)	/* ULT only */
- #define PMSYNC_CONFIG	0x33c4	/* 32bit */
- #define PMSYNC_CONFIG2	0x33cc	/* 32bit */
- #define SOFT_RESET_CTRL 0x38f4
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0036-haswell-NRI-Add-pre-training-steps.patch b/config/coreboot/default/patches/0036-haswell-NRI-Add-pre-training-steps.patch
deleted file mode 100644
index 1b58a1f1..00000000
--- a/config/coreboot/default/patches/0036-haswell-NRI-Add-pre-training-steps.patch
+++ /dev/null
@@ -1,392 +0,0 @@
-From 19bc8d27c8f52b205df218d5917ae67ac4646024 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sat, 7 May 2022 23:12:18 +0200
-Subject: [PATCH 36/51] haswell NRI: Add pre-training steps
-
-Implement pre-training steps, which consist of enabling ECC I/O and
-filling the WDB (Write Data Buffer, stores test patterns) through a
-magic LDAT port.
-
-Change-Id: Ie2e09e3b218c4569ed8de5c5e1b05d491032e0f1
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/Makefile.mk  |   1 +
- .../haswell/native_raminit/raminit_main.c     |  35 ++++
- .../haswell/native_raminit/raminit_native.h   |  24 +++
- .../haswell/native_raminit/reg_structs.h      |  45 +++++
- .../intel/haswell/native_raminit/setup_wdb.c  | 159 ++++++++++++++++++
- .../intel/haswell/registers/mchbar.h          |   9 +
- 6 files changed, 273 insertions(+)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/setup_wdb.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-index e9212df9e6..8d7d4e4db0 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-@@ -10,5 +10,6 @@ romstage-y += memory_map.c
- romstage-y += raminit_main.c
- romstage-y += raminit_native.c
- romstage-y += reut.c
-+romstage-y += setup_wdb.c
- romstage-y += spd_bitmunching.c
- romstage-y += timings_refresh.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 94b268468c..5e4674957d 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -3,6 +3,7 @@
- #include <assert.h>
- #include <console/console.h>
- #include <cpu/intel/haswell/haswell.h>
-+#include <delay.h>
- #include <device/pci_ops.h>
- #include <northbridge/intel/haswell/chip.h>
- #include <northbridge/intel/haswell/haswell.h>
-@@ -12,6 +13,39 @@
- 
- #include "raminit_native.h"
- 
-+static enum raminit_status pre_training(struct sysinfo *ctrl)
-+{
-+	/* Skip on S3 resume */
-+	if (ctrl->bootmode == BOOTMODE_S3)
-+		return RAMINIT_STATUS_SUCCESS;
-+
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) {
-+			if (!rank_in_ch(ctrl, slot + slot, channel))
-+				continue;
-+
-+			printk(RAM_DEBUG, "C%uS%u:\n", channel, slot);
-+			printk(RAM_DEBUG, "\tMR0: 0x%04x\n", ctrl->mr0[channel][slot]);
-+			printk(RAM_DEBUG, "\tMR1: 0x%04x\n", ctrl->mr1[channel][slot]);
-+			printk(RAM_DEBUG, "\tMR2: 0x%04x\n", ctrl->mr2[channel][slot]);
-+			printk(RAM_DEBUG, "\tMR3: 0x%04x\n", ctrl->mr3[channel][slot]);
-+			printk(RAM_DEBUG, "\n");
-+		}
-+		if (ctrl->is_ecc) {
-+			union mad_dimm_reg mad_dimm = {
-+				.raw = mchbar_read32(MAD_DIMM(channel)),
-+			};
-+			/* Enable ECC I/O */
-+			mad_dimm.ecc_mode = 1;
-+			mchbar_write32(MAD_DIMM(channel), mad_dimm.raw);
-+			/* Wait 4 usec after enabling the ECC I/O, needed by HW */
-+			udelay(4);
-+		}
-+	}
-+	setup_wdb(ctrl);
-+	return RAMINIT_STATUS_SUCCESS;
-+}
-+
- struct task_entry {
- 	enum raminit_status (*task)(struct sysinfo *);
- 	bool is_enabled;
-@@ -25,6 +59,7 @@ static const struct task_entry cold_boot[] = {
- 	{ configure_mc,                                           true, "CONFMC",     },
- 	{ configure_memory_map,                                   true, "MEMMAP",     },
- 	{ do_jedec_init,                                          true, "JEDECINIT",  },
-+	{ pre_training,                                           true, "PRETRAIN",   },
- };
- 
- /* Return a generic stepping value to make stepping checks simpler */
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 759d755d6d..4d9487d79c 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -36,6 +36,13 @@
- 
- #define RTTNOM_MASK		(BIT(9) | BIT(6) | BIT(2))
- 
-+#define BASIC_VA_PAT_SPREAD_8	0x01010101
-+
-+#define WDB_CACHE_LINE_SIZE	8
-+
-+#define NUM_WDB_CL_MUX_SEEDS	3
-+#define NUM_CADB_MUX_SEEDS	3
-+
- /* ZQ calibration types */
- enum {
- 	ZQ_INIT,	/* DDR3: ZQCL with tZQinit, LPDDR3: ZQ Init  with tZQinit  */
-@@ -317,6 +324,23 @@ void reut_issue_mrs_all(
- 
- enum raminit_status reut_issue_zq(struct sysinfo *ctrl, uint8_t chanmask, uint8_t zq_type);
- 
-+void write_wdb_fixed_pat(
-+	const struct sysinfo *ctrl,
-+	const uint8_t patterns[],
-+	const uint8_t pat_mask[],
-+	uint8_t spread,
-+	uint16_t start);
-+
-+void write_wdb_va_pat(
-+	const struct sysinfo *ctrl,
-+	uint32_t agg_mask,
-+	uint32_t vic_mask,
-+	uint8_t vic_rot,
-+	uint16_t start);
-+
-+void program_wdb_lfsr(const struct sysinfo *ctrl, bool cleanup);
-+void setup_wdb(const struct sysinfo *ctrl);
-+
- uint8_t get_rx_bias(const struct sysinfo *ctrl);
- 
- uint8_t get_tCWL(uint32_t mem_clock_mhz);
-diff --git a/src/northbridge/intel/haswell/native_raminit/reg_structs.h b/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-index 9929f617fe..7aa8d8c8b2 100644
---- a/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-+++ b/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-@@ -335,6 +335,18 @@ union mcscheds_cbit_reg {
- 	uint32_t raw;
- };
- 
-+union reut_pat_cl_mux_lmn_reg {
-+	struct __packed {
-+		uint32_t l_data_select : 1; // Bits  0:0
-+		uint32_t en_sweep_freq : 1; // Bits  1:1
-+		uint32_t               : 6; // Bits  7:2
-+		uint32_t l_counter     : 8; // Bits 15:8
-+		uint32_t m_counter     : 8; // Bits 23:16
-+		uint32_t n_counter     : 8; // Bits 31:24
-+	};
-+	uint32_t raw;
-+};
-+
- union reut_pat_cadb_prog_reg {
- 	struct __packed {
- 		uint32_t addr : 16; // Bits 15:0
-@@ -439,6 +451,39 @@ union reut_misc_odt_ctrl_reg {
- 	uint32_t raw;
- };
- 
-+union ldat_pdat_reg {
-+	struct __packed {
-+		uint32_t fast_addr : 12; // Bits 11:0
-+		uint32_t           :  4; // Bits 15:12
-+		uint32_t addr_en   :  1; // Bits 16:16
-+		uint32_t seq_en    :  1; // Bits 17:17
-+		uint32_t pol_0     :  1; // Bits 18:18
-+		uint32_t pol_1     :  1; // Bits 19:19
-+		uint32_t cmd_a     :  4; // Bits 23:20
-+		uint32_t cmd_b     :  4; // Bits 27:24
-+		uint32_t cmd_c     :  4; // Bits 31:28
-+	};
-+	uint32_t raw;
-+};
-+
-+union ldat_sdat_reg {
-+	struct __packed {
-+		uint32_t bank_sel   : 4; // Bits  3:0
-+		uint32_t            : 1; // Bits  4:4
-+		uint32_t array_sel  : 5; // Bits  9:5
-+		uint32_t cmp        : 1; // Bits 10:10
-+		uint32_t replicate  : 1; // Bits 11:11
-+		uint32_t dword      : 4; // Bits 15:12
-+		uint32_t mode       : 2; // Bits 17:16
-+		uint32_t mpmap      : 6; // Bits 23:18
-+		uint32_t mpb_offset : 4; // Bits 27:24
-+		uint32_t stage_en   : 1; // Bits 28:28
-+		uint32_t shadow     : 2; // Bits 30:29
-+		uint32_t            : 1; // Bits 31:31
-+	};
-+	uint32_t raw;
-+};
-+
- union mcscheds_dft_misc_reg {
- 	struct __packed {
- 		uint32_t wdar                 :  1; // Bits  0:0
-diff --git a/src/northbridge/intel/haswell/native_raminit/setup_wdb.c b/src/northbridge/intel/haswell/native_raminit/setup_wdb.c
-new file mode 100644
-index 0000000000..ec37c48415
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/setup_wdb.c
-@@ -0,0 +1,159 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+
-+static void ldat_write_cacheline(
-+	const struct sysinfo *const ctrl,
-+	const uint8_t chunk,
-+	const uint16_t start,
-+	const uint64_t data)
-+{
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		/*
-+		 * Do not do a 64-bit write here. The register is not aligned
-+		 * to a 64-bit boundary, which could potentially cause issues.
-+		 */
-+		mchbar_write32(QCLK_ch_LDAT_DATA_IN_x(channel, 0), data & UINT32_MAX);
-+		mchbar_write32(QCLK_ch_LDAT_DATA_IN_x(channel, 1), data >> 32);
-+		/*
-+		 * Set REPLICATE = 0 as you don't want to replicate the data.
-+		 * Set BANK_SEL to the chunk you want to write the 64 bits to.
-+		 * Set ARRAY_SEL = 0 (the MC WDB) and MODE = 1.
-+		 */
-+		const union ldat_sdat_reg ldat_sdat = {
-+			.bank_sel = chunk,
-+			.mode     = 1,
-+		};
-+		mchbar_write32(QCLK_ch_LDAT_SDAT(channel), ldat_sdat.raw);
-+		/*
-+		 * Finally, write the PDAT register indicating which cacheline
-+		 * of the WDB you want to write to by setting FAST_ADDR field
-+		 * to one of the 64 cache lines. Also set CMD_B in the PDAT
-+		 * register to 4'b1000, indicating that this is a LDAT write.
-+		 */
-+		const union ldat_pdat_reg ldat_pdat = {
-+			.fast_addr = MIN(start, 0xfff),
-+			.cmd_b     = 8,
-+		};
-+		mchbar_write32(QCLK_ch_LDAT_PDAT(channel), ldat_pdat.raw);
-+	}
-+}
-+
-+static void clear_ldat_mode(const struct sysinfo *const ctrl)
-+{
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++)
-+		mchbar_write32(QCLK_ch_LDAT_SDAT(channel), 0);
-+}
-+
-+void write_wdb_fixed_pat(
-+	const struct sysinfo *const ctrl,
-+	const uint8_t patterns[],
-+	const uint8_t pat_mask[],
-+	const uint8_t spread,
-+	const uint16_t start)
-+{
-+	for (uint8_t chunk = 0; chunk < WDB_CACHE_LINE_SIZE; chunk++) {
-+		uint64_t data = 0;
-+		for (uint8_t b = 0; b < 64; b++) {
-+			const uint8_t beff  = b % spread;
-+			const uint8_t burst = patterns[pat_mask[beff]];
-+			if (burst & BIT(chunk))
-+				data |= 1ULL << b;
-+		}
-+		ldat_write_cacheline(ctrl, chunk, start, data);
-+	}
-+	clear_ldat_mode(ctrl);
-+}
-+
-+static inline uint32_t rol_u32(const uint32_t val)
-+{
-+	return (val << 1) | ((val >> 31) & 1);
-+}
-+
-+void write_wdb_va_pat(
-+	const struct sysinfo *const ctrl,
-+	const uint32_t agg_mask,
-+	const uint32_t vic_mask,
-+	const uint8_t vic_rot,
-+	const uint16_t start)
-+{
-+	static const uint8_t va_mask_to_compressed[4] = {0xaa, 0xc0, 0xcc, 0xf0};
-+	uint32_t v_mask = vic_mask;
-+	uint32_t a_mask = agg_mask;
-+	for (uint8_t v = 0; v < vic_rot; v++) {
-+		uint8_t compressed[32] = {0};
-+		/* Iterate through all 32 bits and create a compressed version of cacheline */
-+		for (uint8_t b = 0; b < ARRAY_SIZE(compressed); b++) {
-+			const uint8_t vic = !!(v_mask & BIT(b));
-+			const uint8_t agg = !!(a_mask & BIT(b));
-+			const uint8_t index = !vic << 1 | agg << 0;
-+			compressed[b] = va_mask_to_compressed[index];
-+		}
-+		for (uint8_t chunk = 0; chunk < WDB_CACHE_LINE_SIZE; chunk++) {
-+			uint32_t data = 0;
-+			for (uint8_t b = 0; b < ARRAY_SIZE(compressed); b++)
-+				data |= !!(compressed[b] & BIT(chunk)) << b;
-+
-+			const uint64_t data64 = (uint64_t)data << 32 | data;
-+			ldat_write_cacheline(ctrl, chunk, start + v, data64);
-+		}
-+		v_mask = rol_u32(v_mask);
-+		a_mask = rol_u32(a_mask);
-+	}
-+	clear_ldat_mode(ctrl);
-+}
-+
-+void program_wdb_lfsr(const struct sysinfo *ctrl, const bool cleanup)
-+{
-+	/* Cleanup LFSR seeds are sequential */
-+	const uint32_t cleanup_seeds[NUM_WDB_CL_MUX_SEEDS] = { 0xaaaaaa, 0xcccccc, 0xf0f0f0 };
-+	const uint32_t regular_seeds[NUM_WDB_CL_MUX_SEEDS] = { 0xa10ca1, 0xef0d08, 0xad0a1e };
-+	const uint32_t *seeds = cleanup ? cleanup_seeds : regular_seeds;
-+
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		for (uint8_t i = 0; i < NUM_WDB_CL_MUX_SEEDS; i++) {
-+			mchbar_write32(REUT_ch_PAT_WDB_CL_MUX_RD_x(channel, i), seeds[i]);
-+			mchbar_write32(REUT_ch_PAT_WDB_CL_MUX_WR_x(channel, i), seeds[i]);
-+		}
-+	}
-+}
-+
-+void setup_wdb(const struct sysinfo *ctrl)
-+{
-+	const uint32_t amask[9] = {
-+		0x86186186, 0x18618618, 0x30c30c30,
-+		0xa28a28a2, 0x8a28a28a, 0x14514514,
-+		0x28a28a28, 0x92492492, 0x24924924,
-+	};
-+	const uint32_t vmask = 0x41041041;
-+
-+	/* Fill first 8 entries with simple 2-LFSR VA pattern */
-+	write_wdb_va_pat(ctrl, 0, BASIC_VA_PAT_SPREAD_8, 8, 0);
-+
-+	/* Fill next 54 entries with 3-LFSR VA pattern */
-+	for (uint8_t a = 0; a < ARRAY_SIZE(amask); a++)
-+		write_wdb_va_pat(ctrl, amask[a], vmask, 6, 8 + a * 6);
-+
-+	program_wdb_lfsr(ctrl, false);
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		const union reut_pat_cl_mux_lmn_reg wdb_cl_mux_lmn = {
-+			.en_sweep_freq = 1,
-+			.l_counter     = 1,
-+			.m_counter     = 1,
-+			.n_counter     = 10,
-+		};
-+		mchbar_write32(REUT_ch_PAT_WDB_CL_MUX_LMN(channel), wdb_cl_mux_lmn.raw);
-+	}
-+}
-diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h
-index 4fc78a7f43..f8408e51a0 100644
---- a/src/northbridge/intel/haswell/registers/mchbar.h
-+++ b/src/northbridge/intel/haswell/registers/mchbar.h
-@@ -94,6 +94,11 @@
- #define TC_BANK_RANK_D_ch(ch)			_MCMAIN_C(0x4014, ch)
- #define SC_ROUNDT_LAT_ch(ch)			_MCMAIN_C(0x4024, ch)
- 
-+#define REUT_ch_PAT_WDB_CL_MUX_WR_x(ch, x)	_MCMAIN_C_X(0x4048, ch, x) /* x in 0 .. 2 */
-+#define REUT_ch_PAT_WDB_CL_MUX_RD_x(ch, x)	_MCMAIN_C_X(0x4054, ch, x) /* x in 0 .. 2 */
-+
-+#define REUT_ch_PAT_WDB_CL_MUX_LMN(ch)		_MCMAIN_C(0x4078, ch)
-+
- #define SC_WR_ADD_DELAY_ch(ch)			_MCMAIN_C(0x40d0, ch)
- 
- #define REUT_ch_MISC_CKE_CTRL(ch)		_MCMAIN_C(0x4190, ch)
-@@ -110,6 +115,10 @@
- #define MC_INIT_STATE_ch(ch)			_MCMAIN_C(0x42a0, ch)
- #define TC_SRFTP_ch(ch)				_MCMAIN_C(0x42a4, ch)
- 
-+#define QCLK_ch_LDAT_PDAT(ch)			_MCMAIN_C(0x42d0, ch)
-+#define QCLK_ch_LDAT_SDAT(ch)			_MCMAIN_C(0x42d4, ch)
-+#define QCLK_ch_LDAT_DATA_IN_x(ch, x)		_MCMAIN_C_X(0x42dc, ch, x) /* x in 0 .. 1 */
-+
- #define REUT_GLOBAL_ERR				0x4804
- 
- #define REUT_ch_SEQ_CFG(ch)			(0x48a8 + 8 * (ch))
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0037-haswell-NRI-Add-REUT-I-O-test-library.patch b/config/coreboot/default/patches/0037-haswell-NRI-Add-REUT-I-O-test-library.patch
deleted file mode 100644
index eaafcde3..00000000
--- a/config/coreboot/default/patches/0037-haswell-NRI-Add-REUT-I-O-test-library.patch
+++ /dev/null
@@ -1,1130 +0,0 @@
-From 460a092b22c9800c5ee9d8c4198e8b241664693f Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sun, 8 May 2022 00:11:29 +0200
-Subject: [PATCH 37/51] haswell NRI: Add REUT I/O test library
-
-Implement a library to run I/O tests using the REUT hardware.
-
-Change-Id: Id7b207cd0a3989ddd23c88c6b1f0cfa79d2c861f
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/Makefile.mk  |   1 +
- .../haswell/native_raminit/raminit_native.h   | 110 +++
- .../haswell/native_raminit/reg_structs.h      | 121 +++
- .../intel/haswell/native_raminit/testing_io.c | 744 ++++++++++++++++++
- .../intel/haswell/registers/mchbar.h          |  30 +
- 5 files changed, 1006 insertions(+)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/testing_io.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-index 8d7d4e4db0..6e1b365602 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-@@ -12,4 +12,5 @@ romstage-y += raminit_native.c
- romstage-y += reut.c
- romstage-y += setup_wdb.c
- romstage-y += spd_bitmunching.c
-+romstage-y += testing_io.c
- romstage-y += timings_refresh.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 4d9487d79c..f029e7f076 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -59,6 +59,88 @@ enum {
- 	REUT_MODE_NOP  = 3, /* Normal operation mode */
- };
- 
-+/* REUT error counter control */
-+enum {
-+	COUNT_ERRORS_PER_CHANNEL	= 0,
-+	COUNT_ERRORS_PER_LANE		= 1,
-+	COUNT_ERRORS_PER_BYTE_GROUP	= 2,
-+	COUNT_ERRORS_PER_CHUNK		= 3,
-+};
-+
-+enum wdb_dq_pattern {
-+	BASIC_VA = 0,
-+	SEGMENT_WDB,
-+	CADB,
-+	TURN_AROUND,
-+	LMN_VA,
-+	TURN_AROUND_WR,
-+	TURN_AROUND_ODT,
-+	RD_RD_TA,
-+	RD_RD_TA_ALL,
-+};
-+
-+enum reut_cmd_pat {
-+	PAT_WR_RD,
-+	PAT_WR,
-+	PAT_RD,
-+	PAT_RD_WR_TA,
-+	PAT_WR_RD_TA,
-+	PAT_ODT_TA,
-+};
-+
-+/* REUT subsequence types (B = Base, O = Offset) */
-+enum {
-+	SUBSEQ_B_RD	= 0 << 22,
-+	SUBSEQ_B_WR	= 1 << 22,
-+	SUBSEQ_B_RD_WR	= 2 << 22,
-+	SUBSEQ_B_WR_RD	= 3 << 22,
-+	SUBSEQ_O_RD	= 4 << 22,
-+	SUBSEQ_O_WR	= 5 << 22,
-+};
-+
-+/* REUT mux control */
-+enum {
-+	REUT_MUX_LMN      = 0,
-+	REUT_MUX_BTBUFFER = 1,
-+	REUT_MUX_LFSR     = 2,
-+};
-+
-+/* Increment scale */
-+enum {
-+	SCALE_LOGARITHM	= 0,
-+	SCALE_LINEAR	= 1,
-+};
-+
-+enum test_stop {
-+	NSOE   = 0,	/* Never stop on error */
-+	NTHSOE = 1,	/* Stop on the nth error (we use n = 1) */
-+	ABGSOE = 2,	/* Stop on all byte groups error */
-+	ALSOE  = 3,	/* Stop on all lanes error */
-+};
-+
-+struct wdb_pat {
-+	uint32_t start_ptr;	/* Starting pointer in WDB */
-+	uint32_t stop_ptr;	/* Stopping pointer in WDB */
-+	uint16_t inc_rate;	/* How quickly the WDB walks through cachelines */
-+	uint8_t  dq_pattern;	/* DQ pattern to use (see enum wdb_dq_pattern above) */
-+};
-+
-+struct reut_pole {
-+	uint16_t start;
-+	uint16_t stop;
-+	uint16_t order;
-+	uint32_t inc_rate;
-+	uint16_t inc_val;
-+	bool wrap_trigger;
-+};
-+
-+struct reut_box {
-+	struct reut_pole rank;
-+	struct reut_pole bank;
-+	struct reut_pole row;
-+	struct reut_pole col;
-+};
-+
- enum command_training_iteration {
- 	CT_ITERATION_CLOCK = 0,
- 	CT_ITERATION_CMD_NORTH,
-@@ -200,6 +282,10 @@ struct sysinfo {
- 	uint16_t mr1[NUM_CHANNELS][NUM_SLOTS];
- 	uint16_t mr2[NUM_CHANNELS][NUM_SLOTS];
- 	uint16_t mr3[NUM_CHANNELS][NUM_SLOTS];
-+
-+	uint8_t dq_pat;
-+
-+	uint8_t dq_pat_lc;
- };
- 
- static inline bool is_hsw_ult(void)
-@@ -341,6 +427,30 @@ void write_wdb_va_pat(
- void program_wdb_lfsr(const struct sysinfo *ctrl, bool cleanup);
- void setup_wdb(const struct sysinfo *ctrl);
- 
-+void program_seq_addr(uint8_t channel, const struct reut_box *reut_addr, bool log_seq_addr);
-+void program_loop_count(const struct sysinfo *ctrl, uint8_t channel, uint8_t lc_exp);
-+
-+void setup_io_test(
-+	struct sysinfo *ctrl,
-+	uint8_t chanmask,
-+	enum reut_cmd_pat cmd_pat,
-+	uint16_t num_cl,
-+	uint8_t lc,
-+	const struct reut_box *reut_addr,
-+	enum test_stop soe,
-+	const struct wdb_pat *pat,
-+	uint8_t en_cadb,
-+	uint8_t subseq_wait);
-+
-+void setup_io_test_cadb(struct sysinfo *ctrl, uint8_t chanmask, uint8_t lc, enum test_stop soe);
-+void setup_io_test_basic_va(struct sysinfo *ctrl, uint8_t chm, uint8_t lc, enum test_stop soe);
-+void setup_io_test_mpr(struct sysinfo *ctrl, uint8_t chanmask, uint8_t lc, enum test_stop soe);
-+
-+uint8_t select_reut_ranks(struct sysinfo *ctrl, uint8_t channel, uint8_t rankmask);
-+
-+void run_mpr_io_test(bool clear_errors);
-+uint8_t run_io_test(struct sysinfo *ctrl, uint8_t chanmask, uint8_t dq_pat, bool clear_errors);
-+
- uint8_t get_rx_bias(const struct sysinfo *ctrl);
- 
- uint8_t get_tCWL(uint32_t mem_clock_mhz);
-diff --git a/src/northbridge/intel/haswell/native_raminit/reg_structs.h b/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-index 7aa8d8c8b2..b943259b91 100644
---- a/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-+++ b/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-@@ -347,6 +347,54 @@ union reut_pat_cl_mux_lmn_reg {
- 	uint32_t raw;
- };
- 
-+union reut_err_ctl_reg {
-+	struct __packed {
-+		uint32_t stop_on_nth_error              : 6; // Bits  5:0
-+		uint32_t                                : 6; // Bits 11:6
-+		uint32_t stop_on_error_control          : 2; // Bits 13:12
-+		uint32_t                                : 2; // Bits 15:14
-+		uint32_t selective_err_enable_chunk     : 8; // Bits 23:16
-+		uint32_t selective_err_enable_cacheline : 8; // Bits 31:24
-+	};
-+	uint32_t raw;
-+};
-+
-+union reut_pat_cadb_mux_ctrl_reg {
-+	struct __packed {
-+		uint32_t mux_0_ctrl     : 2; // Bits  1:0
-+		uint32_t                : 2; // Bits  3:2
-+		uint32_t mux_1_ctrl     : 2; // Bits  5:4
-+		uint32_t                : 2; // Bits  7:6
-+		uint32_t mux_2_ctrl     : 2; // Bits  9:8
-+		uint32_t                : 6; // Bits 15:10
-+		uint32_t sel_mux_0_ctrl : 2; // Bits 17:16
-+		uint32_t                : 2; // Bits 19:18
-+		uint32_t sel_mux_1_ctrl : 2; // Bits 21:20
-+		uint32_t                : 2; // Bits 23:22
-+		uint32_t sel_mux_2_ctrl : 2; // Bits 25:24
-+		uint32_t                : 6; // Bits 31:26
-+	};
-+	uint32_t raw;
-+};
-+
-+union reut_pat_wdb_cl_mux_cfg_reg {
-+	struct __packed {
-+		uint32_t mux_0_control         : 2; // Bits  1:0
-+		uint32_t                       : 1; // Bits  2:2
-+		uint32_t mux_1_control         : 2; // Bits  4:3
-+		uint32_t                       : 1; // Bits  5:5
-+		uint32_t mux_2_control         : 2; // Bits  7:6
-+		uint32_t                       : 6; // Bits 13:8
-+		uint32_t ecc_replace_byte_ctl  : 1; // Bits 14:14
-+		uint32_t ecc_data_source_sel   : 1; // Bits 15:15
-+		uint32_t save_lfsr_seed_rate   : 6; // Bits 21:16
-+		uint32_t                       : 2; // Bits 23:22
-+		uint32_t reload_lfsr_seed_rate : 3; // Bits 26:24
-+		uint32_t                       : 5; // Bits 31:27
-+	};
-+	uint32_t raw;
-+};
-+
- union reut_pat_cadb_prog_reg {
- 	struct __packed {
- 		uint32_t addr : 16; // Bits 15:0
-@@ -366,6 +414,19 @@ union reut_pat_cadb_prog_reg {
- 	uint32_t raw32[2];
- };
- 
-+union reut_pat_wdb_cl_ctrl_reg {
-+	struct __packed {
-+		uint32_t inc_rate  :  5; // Bits 4:0
-+		uint32_t inc_scale :  1; // Bits 5:5
-+		uint32_t           :  2; // Bits 7:6
-+		uint32_t start_ptr :  6; // Bits 13:8
-+		uint32_t           :  2; // Bits 15:14
-+		uint32_t end_ptr   :  6; // Bits 21:16
-+		uint32_t           : 10; // Bits 31:22
-+	};
-+	uint32_t raw;
-+};
-+
- union reut_pat_cadb_mrs_reg {
- 	struct __packed {
- 		uint32_t delay_gap : 3; // Bits  2:0
-@@ -406,6 +467,66 @@ union reut_seq_cfg_reg {
- 	uint32_t raw32[2];
- };
- 
-+union reut_seq_base_addr_reg {
-+	struct __packed {
-+		uint32_t           :  3; // Bits  2:0
-+		uint32_t col_addr  :  8; // Bits 10:3
-+		uint32_t           : 13; // Bits 23:11
-+		uint32_t row_addr  : 16; // Bits 39:24
-+		uint32_t           :  8; // Bits 47:40
-+		uint32_t bank_addr :  3; // Bits 50:48
-+		uint32_t           :  5; // Bits 55:51
-+		uint32_t rank_addr :  3; // Bits 58:56
-+		uint32_t           :  5; // Bits 63:59
-+	};
-+	uint32_t raw32[2];
-+	uint64_t raw;
-+};
-+
-+union reut_seq_misc_ctl_reg {
-+	struct __packed {
-+		uint32_t col_addr_order       : 2; // Bits  1:0
-+		uint32_t row_addr_order       : 2; // Bits  3:2
-+		uint32_t bank_addr_order      : 2; // Bits  5:4
-+		uint32_t rank_addr_order      : 2; // Bits  7:6
-+		uint32_t                      : 5; // Bits 12:8
-+		uint32_t addr_invert_rate     : 3; // Bits 15:13
-+		uint32_t                      : 4; // Bits 19:16
-+		uint32_t col_addr_invert_en   : 1; // Bits 20:20
-+		uint32_t row_addr_invert_en   : 1; // Bits 21:21
-+		uint32_t bank_addr_invert_en  : 1; // Bits 22:22
-+		uint32_t rank_addr_invert_en  : 1; // Bits 23:23
-+		uint32_t col_wrap_trigger_en  : 1; // Bits 24:24
-+		uint32_t row_wrap_trigger_en  : 1; // Bits 25:25
-+		uint32_t bank_wrap_trigger_en : 1; // Bits 26:26
-+		uint32_t rank_wrap_trigger_en : 1; // Bits 27:27
-+		uint32_t col_wrap_carry_en    : 1; // Bits 28:28
-+		uint32_t row_wrap_carry_en    : 1; // Bits 29:29
-+		uint32_t bank_wrap_carry_en   : 1; // Bits 30:30
-+		uint32_t rank_wrap_carry_en   : 1; // Bits 31:31
-+	};
-+	uint32_t raw;
-+};
-+
-+union reut_seq_addr_inc_ctl_reg {
-+	struct __packed {
-+		uint32_t                     :  3; // Bits  2:0
-+		uint32_t col_addr_increment  :  8; // Bits 10:3
-+		uint32_t                     :  1; // Bits 11:11
-+		uint32_t col_addr_update     :  8; // Bits 19:12
-+		uint32_t row_addr_increment  : 12; // Bits 31:20
-+		uint32_t row_addr_update     :  6; // Bits 37:32
-+		uint32_t bank_addr_increment :  3; // Bits 40:38
-+		uint32_t                     :  3; // Bits 43:41
-+		uint32_t bank_addr_update    :  8; // Bits 53:44
-+		uint32_t rank_addr_increment :  3; // Bits 54:52
-+		uint32_t                     :  1; // Bits 55:55
-+		uint32_t rank_addr_update    :  8; // Bits 63:56
-+	};
-+	uint64_t raw;
-+	uint32_t raw32[2];
-+};
-+
- union reut_seq_ctl_reg {
- 	struct __packed {
- 		uint32_t start_test    :  1; // Bits  0:0
-diff --git a/src/northbridge/intel/haswell/native_raminit/testing_io.c b/src/northbridge/intel/haswell/native_raminit/testing_io.c
-new file mode 100644
-index 0000000000..2632c238f8
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/testing_io.c
-@@ -0,0 +1,744 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <console/console.h>
-+#include <delay.h>
-+#include <lib.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <timer.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+
-+static void set_cadb_patterns(const uint8_t channel, const uint16_t seeds[NUM_CADB_MUX_SEEDS])
-+{
-+	for (uint8_t i = 0; i < NUM_CADB_MUX_SEEDS; i++)
-+		mchbar_write32(REUT_ch_PAT_CADB_MUX_x(channel, i), seeds[i]);
-+}
-+
-+static void setup_cadb(
-+	struct sysinfo *ctrl,
-+	const uint8_t channel,
-+	const uint8_t vic_spread,
-+	const uint8_t vic_bit)
-+{
-+	const bool lmn_en = false;
-+
-+	/*
-+	 * Currently, always start writing at CADB row 0.
-+	 * Could add a start point parameter in the future.
-+	 */
-+	mchbar_write8(REUT_ch_PAT_CADB_WRITE_PTR(channel), 0);
-+	const uint8_t num_cadb_rows = 8;
-+	for (uint8_t row = 0; row < num_cadb_rows; row++) {
-+		const uint8_t lfsr0 = (row >> 0) & 1;
-+		const uint8_t lfsr1 = (row >> 1) & 1;
-+		uint64_t reg64 = 0;
-+		for (uint8_t bit = 0; bit < 22; bit++) {
-+			uint8_t bremap;
-+			if (bit >= 19) {
-+				/* (bremap in 40 .. 42) => CADB data control */
-+				bremap = bit + 21;
-+			} else if (bit >= 16) {
-+				/* (bremap in 24 .. 26) => CADB data bank */
-+				bremap = bit + 8;
-+			} else {
-+				/* (bremap in  0 .. 15) => CADB data address */
-+				bremap = bit;
-+			}
-+			const uint8_t fine = bit % vic_spread;
-+			reg64 |= ((uint64_t)(fine == vic_bit ? lfsr0 : lfsr1)) << bremap;
-+		}
-+		/*
-+		 * Write row. CADB pointer is auto incremented after every write. This must be
-+		 * a single 64-bit write, otherwise the CADB pointer will auto-increment twice.
-+		 */
-+		mchbar_write64(REUT_ch_PAT_CADB_PROG(channel), reg64);
-+	}
-+	const union reut_pat_cadb_mux_ctrl_reg cadb_mux_ctrl = {
-+		.mux_0_ctrl = lmn_en ? REUT_MUX_LMN : REUT_MUX_LFSR,
-+		.mux_1_ctrl = REUT_MUX_LFSR,
-+		.mux_2_ctrl = REUT_MUX_LFSR,
-+	};
-+	mchbar_write32(REUT_ch_PAT_CADB_MUX_CTRL(channel), cadb_mux_ctrl.raw);
-+	const union reut_pat_cl_mux_lmn_reg cadb_cl_mux_lmn = {
-+		.en_sweep_freq = 1,
-+		.l_counter     = 1,
-+		.m_counter     = 1,
-+		.n_counter     = 6,
-+	};
-+	mchbar_write32(REUT_ch_PAT_CADB_CL_MUX_LMN(channel), cadb_cl_mux_lmn.raw);
-+	const uint16_t cadb_mux_seeds[NUM_CADB_MUX_SEEDS] = { 0x0ea1, 0xbeef, 0xdead };
-+	set_cadb_patterns(channel, cadb_mux_seeds);
-+}
-+
-+static uint32_t calc_rate(const uint32_t rate, const uint32_t lim, const uint8_t scale_bit)
-+{
-+	return rate > lim ? log2_ceil(rate - 1) : BIT(scale_bit) | rate;
-+}
-+
-+void program_seq_addr(
-+	const uint8_t channel,
-+	const struct reut_box *reut_addr,
-+	const bool log_seq_addr)
-+{
-+	const int loglevel = log_seq_addr ? BIOS_ERR : BIOS_NEVER;
-+	const uint32_t div = 8;
-+	union reut_seq_base_addr_reg reut_seq_addr_start = {
-+		.col_addr  = reut_addr->col.start / div,
-+		.row_addr  = reut_addr->row.start,
-+		.bank_addr = reut_addr->bank.start,
-+		.rank_addr = reut_addr->rank.start,
-+	};
-+	mchbar_write64(REUT_ch_SEQ_ADDR_START(channel), reut_seq_addr_start.raw);
-+	reut_seq_addr_start.raw = mchbar_read64(REUT_ch_SEQ_ADDR_START(channel));
-+	printk(loglevel, "\tStart column:     %u\n", reut_seq_addr_start.col_addr);
-+	printk(loglevel, "\tStart row:        %u\n", reut_seq_addr_start.row_addr);
-+	printk(loglevel, "\tStart bank:       %u\n", reut_seq_addr_start.bank_addr);
-+	printk(loglevel, "\tStart rank:       %u\n", reut_seq_addr_start.rank_addr);
-+	printk(loglevel, "\n");
-+
-+	union reut_seq_base_addr_reg reut_seq_addr_stop = {
-+		.col_addr  = reut_addr->col.stop / div,
-+		.row_addr  = reut_addr->row.stop,
-+		.bank_addr = reut_addr->bank.stop,
-+		.rank_addr = reut_addr->rank.stop,
-+	};
-+	mchbar_write64(REUT_ch_SEQ_ADDR_WRAP(channel), reut_seq_addr_stop.raw);
-+	reut_seq_addr_stop.raw = mchbar_read64(REUT_ch_SEQ_ADDR_WRAP(channel));
-+	printk(loglevel, "\tStop column:      %u\n", reut_seq_addr_stop.col_addr);
-+	printk(loglevel, "\tStop row:         %u\n", reut_seq_addr_stop.row_addr);
-+	printk(loglevel, "\tStop bank:        %u\n", reut_seq_addr_stop.bank_addr);
-+	printk(loglevel, "\tStop rank:        %u\n", reut_seq_addr_stop.rank_addr);
-+	printk(loglevel, "\n");
-+
-+	union reut_seq_misc_ctl_reg reut_seq_misc_ctl = {
-+		.col_wrap_trigger_en  = reut_addr->col.wrap_trigger,
-+		.row_wrap_trigger_en  = reut_addr->row.wrap_trigger,
-+		.bank_wrap_trigger_en = reut_addr->bank.wrap_trigger,
-+		.rank_wrap_trigger_en = reut_addr->rank.wrap_trigger,
-+	};
-+	mchbar_write32(REUT_ch_SEQ_MISC_CTL(channel), reut_seq_misc_ctl.raw);
-+	printk(loglevel, "\tWrap column:      %u\n", reut_addr->col.wrap_trigger);
-+	printk(loglevel, "\tWrap row:         %u\n", reut_addr->row.wrap_trigger);
-+	printk(loglevel, "\tWrap bank:        %u\n", reut_addr->bank.wrap_trigger);
-+	printk(loglevel, "\tWrap rank:        %u\n", reut_addr->rank.wrap_trigger);
-+	printk(loglevel, "\n");
-+
-+	union reut_seq_addr_inc_ctl_reg reut_seq_addr_inc_ctl = {
-+		.col_addr_update  = calc_rate(reut_addr->col.inc_rate,  31, 7),
-+		.row_addr_update  = calc_rate(reut_addr->row.inc_rate,  15, 5),
-+		.bank_addr_update = calc_rate(reut_addr->bank.inc_rate, 31, 7),
-+		.rank_addr_update = calc_rate(reut_addr->rank.inc_rate, 31, 7),
-+		.col_addr_increment  = reut_addr->col.inc_val,
-+		.row_addr_increment  = reut_addr->row.inc_val,
-+		.bank_addr_increment = reut_addr->bank.inc_val,
-+		.rank_addr_increment = reut_addr->rank.inc_val,
-+	};
-+	printk(loglevel, "\tUpdRate column:   %u\n", reut_addr->col.inc_rate);
-+	printk(loglevel, "\tUpdRate row:      %u\n", reut_addr->row.inc_rate);
-+	printk(loglevel, "\tUpdRate bank:     %u\n", reut_addr->bank.inc_rate);
-+	printk(loglevel, "\tUpdRate rank:     %u\n", reut_addr->rank.inc_rate);
-+	printk(loglevel, "\n");
-+	printk(loglevel, "\tUpdRateCR column: %u\n", reut_seq_addr_inc_ctl.col_addr_update);
-+	printk(loglevel, "\tUpdRateCR row:    %u\n", reut_seq_addr_inc_ctl.row_addr_update);
-+	printk(loglevel, "\tUpdRateCR bank:   %u\n", reut_seq_addr_inc_ctl.bank_addr_update);
-+	printk(loglevel, "\tUpdRateCR rank:   %u\n", reut_seq_addr_inc_ctl.rank_addr_update);
-+	printk(loglevel, "\n");
-+	printk(loglevel, "\tUpdInc column:    %u\n", reut_seq_addr_inc_ctl.col_addr_increment);
-+	printk(loglevel, "\tUpdInc row:       %u\n", reut_seq_addr_inc_ctl.row_addr_increment);
-+	printk(loglevel, "\tUpdInc bank:      %u\n", reut_seq_addr_inc_ctl.bank_addr_increment);
-+	printk(loglevel, "\tUpdInc rank:      %u\n", reut_seq_addr_inc_ctl.rank_addr_increment);
-+	printk(loglevel, "\n");
-+	mchbar_write64(REUT_ch_SEQ_ADDR_INC_CTL(channel), reut_seq_addr_inc_ctl.raw);
-+}
-+
-+/*
-+ * Early steppings take exponential (base 2) loopcount values,
-+ * but later steppings take linear loopcount values elsewhere.
-+ * Address the differences in register offset and format here.
-+ */
-+void program_loop_count(const struct sysinfo *ctrl, const uint8_t channel, const uint8_t lc_exp)
-+{
-+	if (ctrl->stepping >= STEPPING_C0) {
-+		const uint32_t loopcount = lc_exp >= 32 ? 0 : BIT(lc_exp);
-+		mchbar_write32(HSW_REUT_ch_SEQ_LOOP_COUNT(channel), loopcount);
-+	} else {
-+		const uint8_t loopcount = lc_exp >= 32 ? 0 : lc_exp + 1;
-+		union reut_seq_cfg_reg reut_seq_cfg = {
-+			.raw = mchbar_read64(REUT_ch_SEQ_CFG(channel)),
-+		};
-+		reut_seq_cfg.early_steppings_loop_count = loopcount;
-+		mchbar_write64(REUT_ch_SEQ_CFG(channel), reut_seq_cfg.raw);
-+	}
-+}
-+
-+static inline void write_subseq(const uint8_t channel, const uint8_t idx, const uint32_t ssq)
-+{
-+	mchbar_write32(REUT_ch_SUBSEQ_x_CTL(channel, idx), ssq);
-+}
-+
-+static void program_subseq(
-+	struct sysinfo *const ctrl,
-+	const uint8_t channel,
-+	const enum reut_cmd_pat cmd_pat,
-+	const uint32_t ss_a,
-+	const uint32_t ss_b)
-+{
-+	switch (cmd_pat) {
-+	case PAT_WR_RD_TA:
-+		write_subseq(channel, 0, ss_a | SUBSEQ_B_WR);
-+		for (uint8_t i = 1; i < 7; i++)
-+			write_subseq(channel, i, ss_b | SUBSEQ_B_RD_WR);
-+
-+		write_subseq(channel, 7, ss_a | SUBSEQ_B_RD);
-+		break;
-+	case PAT_RD_WR_TA:
-+		write_subseq(channel, 0, ss_b | SUBSEQ_B_WR_RD);
-+		break;
-+	case PAT_ODT_TA:
-+		write_subseq(channel, 0, ss_a | SUBSEQ_B_WR);
-+		write_subseq(channel, 1, ss_b | SUBSEQ_B_RD_WR);
-+		write_subseq(channel, 2, ss_a | SUBSEQ_B_RD);
-+		write_subseq(channel, 3, ss_b | SUBSEQ_B_WR_RD);
-+		break;
-+	default:
-+		write_subseq(channel, 0, ss_a | SUBSEQ_B_WR);
-+		write_subseq(channel, 1, ss_a | SUBSEQ_B_RD);
-+		break;
-+	}
-+}
-+
-+void setup_io_test(
-+	struct sysinfo *ctrl,
-+	const uint8_t chanmask,
-+	const enum reut_cmd_pat cmd_pat,
-+	const uint16_t num_cl,
-+	const uint8_t lc,
-+	const struct reut_box *const reut_addr,
-+	const enum test_stop soe,
-+	const struct wdb_pat *const pat,
-+	const uint8_t en_cadb,
-+	const uint8_t subseq_wait)
-+{
-+	if (!chanmask) {
-+		printk(BIOS_ERR, "\n%s: chanmask is invalid\n", __func__);
-+		return;
-+	}
-+
-+	/*
-+	 * Prepare variables needed for both channels.
-+	 * Check for the cases where this MUST be 1: when
-+	 * we manually walk through subseq ODT and TA Wr.
-+	 */
-+	uint8_t lc_exp = MAX(lc - log2_ceil(num_cl), 0);
-+	if (cmd_pat == PAT_WR_RD_TA || cmd_pat == PAT_ODT_TA)
-+		lc_exp = 0;
-+
-+	uint8_t num_clcr;
-+	if (num_cl > 127) {
-+		/* Assume exponential number */
-+		num_clcr = log2_ceil(num_cl);
-+	} else {
-+		/* Set number of cache lines as linear number */
-+		num_clcr = num_cl | BIT(7);
-+	}
-+
-+	const uint16_t num_cl2 = 2 * num_cl;
-+	uint8_t num_cl2cr;
-+	if (num_cl2 > 127) {
-+		/* Assume exponential number */
-+		num_cl2cr = log2_ceil(num_cl2);
-+	} else {
-+		/* Set number of cache lines as linear number */
-+		num_cl2cr = num_cl2 | BIT(7);
-+	}
-+
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!(chanmask & BIT(channel))) {
-+			union reut_seq_cfg_reg reut_seq_cfg = {
-+				.raw = mchbar_read64(REUT_ch_SEQ_CFG(channel)),
-+			};
-+			reut_seq_cfg.global_control = 0;
-+			mchbar_write64(REUT_ch_SEQ_CFG(channel), reut_seq_cfg.raw);
-+			continue;
-+		}
-+
-+		/*
-+		 * Program CADB
-+		 */
-+		mchbar_write8(REUT_ch_MISC_PAT_CADB_CTRL(channel), !!en_cadb);
-+		if (en_cadb)
-+			setup_cadb(ctrl, channel, 7, 8);
-+
-+		/*
-+		 * Program sequence
-+		 */
-+		uint8_t subseq_start = 0;
-+		uint8_t subseq_end   = 0;
-+		switch (cmd_pat) {
-+		case PAT_WR_RD:
-+			subseq_end = 1;
-+			break;
-+		case PAT_WR:
-+			break;
-+		case PAT_RD:
-+			subseq_start = 1;
-+			subseq_end   = 1;
-+			break;
-+		case PAT_RD_WR_TA:
-+			break;
-+		case PAT_WR_RD_TA:
-+			subseq_end = 7;
-+			break;
-+		case PAT_ODT_TA:
-+			subseq_end = 3;
-+			break;
-+		default:
-+			die("\n%s: Pattern type %u is invalid\n", __func__, cmd_pat);
-+		}
-+		const union reut_seq_cfg_reg reut_seq_cfg = {
-+			.global_control            = 1,
-+			.initialization_mode       = REUT_MODE_TEST,
-+			.subsequence_start_pointer = subseq_start,
-+			.subsequence_end_pointer   = subseq_end,
-+			.start_test_delay          = 2,
-+		};
-+		mchbar_write64(REUT_ch_SEQ_CFG(channel), reut_seq_cfg.raw);
-+		program_loop_count(ctrl, channel, lc_exp);
-+		mchbar_write32(REUT_ch_SEQ_CTL(channel), (union reut_seq_ctl_reg) {
-+			.clear_errors = 1,
-+		}.raw);
-+
-+		/*
-+		 * Program subsequences
-+		 */
-+		uint32_t subseq_a = 0;
-+
-+		/* Number of cachelines and scale */
-+		subseq_a |= (num_clcr    & 0x00ff) << 0;
-+		subseq_a |= (subseq_wait & 0x3fff) << 8;
-+
-+		/* Reset current base address to start */
-+		subseq_a |= BIT(27);
-+
-+		uint32_t subseq_b = 0;
-+
-+		/* Number of cachelines and scale */
-+		subseq_b |= (num_cl2cr   & 0x00ff) << 0;
-+		subseq_b |= (subseq_wait & 0x3fff) << 8;
-+
-+		/* Reset current base address to start */
-+		subseq_b |= BIT(27);
-+
-+		program_subseq(ctrl, channel, cmd_pat, subseq_a, subseq_b);
-+
-+		/* Program sequence address */
-+		program_seq_addr(channel, reut_addr, false);
-+
-+		/* Program WDB */
-+		const bool is_linear = pat->inc_rate < 32;
-+		mchbar_write32(REUT_ch_WDB_CL_CTRL(channel), (union reut_pat_wdb_cl_ctrl_reg) {
-+			.start_ptr = pat->start_ptr,
-+			.end_ptr   = pat->stop_ptr,
-+			.inc_rate  = is_linear ? pat->inc_rate : log2_ceil(pat->inc_rate),
-+			.inc_scale = is_linear,
-+		}.raw);
-+
-+		/* Enable LMN in LMN or CADB modes, used to create lots of supply noise */
-+		const bool use_lmn = pat->dq_pattern == LMN_VA || pat->dq_pattern == CADB;
-+		union reut_pat_wdb_cl_mux_cfg_reg pat_wdb_cl_mux_cfg = {
-+			.mux_0_control = use_lmn ? REUT_MUX_LMN : REUT_MUX_LFSR,
-+			.mux_1_control = REUT_MUX_LFSR,
-+			.mux_2_control = REUT_MUX_LFSR,
-+			.ecc_data_source_sel = 1,
-+		};
-+
-+		/* Program LFSR save/restore, too complex unless everything is power of 2 */
-+		if (cmd_pat == PAT_ODT_TA || cmd_pat == PAT_WR_RD_TA) {
-+			pat_wdb_cl_mux_cfg.reload_lfsr_seed_rate = log2_ceil(num_cl) + 1;
-+			pat_wdb_cl_mux_cfg.save_lfsr_seed_rate   = 1;
-+		}
-+		mchbar_write32(REUT_ch_PAT_WDB_CL_MUX_CFG(channel), pat_wdb_cl_mux_cfg.raw);
-+
-+		/* Inversion mask is not used */
-+		mchbar_write32(REUT_ch_PAT_WDB_INV(channel), 0);
-+
-+		/* Program error checking */
-+		const union reut_err_ctl_reg reut_err_ctl = {
-+			.selective_err_enable_cacheline = 0xff,
-+			.selective_err_enable_chunk     = 0xff,
-+			.stop_on_error_control          = soe,
-+			.stop_on_nth_error              = 1,
-+		};
-+		mchbar_write32(REUT_ch_ERR_CONTROL(channel), reut_err_ctl.raw);
-+		mchbar_write64(REUT_ch_ERR_DATA_MASK(channel), 0);
-+		mchbar_write8(REUT_ch_ERR_ECC_MASK(channel), 0);
-+	}
-+
-+	/* Always do a ZQ short before the beginning of a test */
-+	reut_issue_zq(ctrl, chanmask, ZQ_SHORT);
-+}
-+
-+void setup_io_test_cadb(
-+	struct sysinfo *ctrl,
-+	const uint8_t chanmask,
-+	const uint8_t lc,
-+	const enum test_stop soe)
-+{
-+	const struct reut_box reut_addr = {
-+		.rank = {
-+			.start    = 0,
-+			.stop     = 0,
-+			.inc_rate = 32,
-+			.inc_val  = 1,
-+		},
-+		.bank = {
-+			.start    = 0,
-+			.stop     = 7,
-+			.inc_rate = 3,
-+			.inc_val  = 1,
-+		},
-+		.row = {
-+			.start    = 0,
-+			.stop     = 2047,
-+			.inc_rate = 3,
-+			.inc_val  = 73,
-+		},
-+		.col = {
-+			.start    = 0,
-+			.stop     = 1023,
-+			.inc_rate = 0,
-+			.inc_val  = 53,
-+		},
-+	};
-+	const struct wdb_pat pattern = {
-+		.start_ptr  = 0,
-+		.stop_ptr   = 9,
-+		.inc_rate   = 4,
-+		.dq_pattern = CADB,
-+	};
-+	setup_io_test(
-+		ctrl,
-+		chanmask,
-+		PAT_WR_RD,
-+		128,
-+		lc,
-+		&reut_addr,
-+		soe,
-+		&pattern,
-+		1,
-+		0);
-+
-+	ctrl->dq_pat_lc = MAX(lc - 2 - 3, 0) + 1;
-+	ctrl->dq_pat = CADB;
-+}
-+
-+void setup_io_test_basic_va(
-+	struct sysinfo *ctrl,
-+	const uint8_t chanmask,
-+	const uint8_t lc,
-+	const enum test_stop soe)
-+{
-+	const uint32_t spread = 8;
-+	const struct reut_box reut_addr = {
-+		.rank = {
-+			.start    = 0,
-+			.stop     = 0,
-+			.inc_rate = 32,
-+			.inc_val  = 1,
-+		},
-+		.col = {
-+			.start    = 0,
-+			.stop     = 1023,
-+			.inc_rate = 0,
-+			.inc_val  = 1,
-+		},
-+	};
-+	const struct wdb_pat pattern = {
-+		.start_ptr  = 0,
-+		.stop_ptr   = spread - 1,
-+		.inc_rate   = 4,
-+		.dq_pattern = BASIC_VA,
-+	};
-+	setup_io_test(
-+		ctrl,
-+		chanmask,
-+		PAT_WR_RD,
-+		128,
-+		lc,
-+		&reut_addr,
-+		soe,
-+		&pattern,
-+		0,
-+		0);
-+
-+	ctrl->dq_pat_lc = MAX(lc - 8, 0) + 1;
-+	ctrl->dq_pat = BASIC_VA;
-+}
-+
-+void setup_io_test_mpr(
-+	struct sysinfo *ctrl,
-+	const uint8_t chanmask,
-+	const uint8_t lc,
-+	const enum test_stop soe)
-+{
-+	const struct reut_box reut_addr_ddr = {
-+		.rank = {
-+			.start    = 0,
-+			.stop     = 0,
-+			.inc_rate = 32,
-+			.inc_val  = 1,
-+		},
-+		.col = {
-+			.start    = 0,
-+			.stop     = 1023,
-+			.inc_rate = 0,
-+			.inc_val  = 1,
-+		},
-+	};
-+	const struct reut_box reut_addr_lpddr = {
-+		.bank = {
-+			.start    = 4,
-+			.stop     = 4,
-+			.inc_rate = 0,
-+			.inc_val  = 0,
-+		},
-+	};
-+	const struct wdb_pat pattern = {
-+		.start_ptr  = 0,
-+		.stop_ptr   = 9,
-+		.inc_rate   = 4,
-+		.dq_pattern = BASIC_VA,
-+	};
-+	setup_io_test(
-+		ctrl,
-+		chanmask,
-+		PAT_RD,
-+		128,
-+		lc,
-+		ctrl->lpddr ? &reut_addr_lpddr : &reut_addr_ddr,
-+		soe,
-+		&pattern,
-+		0,
-+		0);
-+
-+	ctrl->dq_pat_lc = 1;
-+	ctrl->dq_pat = BASIC_VA;
-+}
-+
-+uint8_t select_reut_ranks(struct sysinfo *ctrl, const uint8_t channel, uint8_t rankmask)
-+{
-+	rankmask &= ctrl->rankmap[channel];
-+
-+	uint8_t rank_count = 0;
-+	uint32_t rank_log_to_phys = 0;
-+	for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+		if (!rank_in_mask(rank, rankmask))
-+			continue;
-+
-+		rank_log_to_phys |= rank << (4 * rank_count);
-+		rank_count++;
-+	}
-+	mchbar_write32(REUT_ch_RANK_LOG_TO_PHYS(channel), rank_log_to_phys);
-+
-+	union reut_seq_cfg_reg reut_seq_cfg = {
-+		.raw = mchbar_read64(REUT_ch_SEQ_CFG(channel)),
-+	};
-+	if (!rank_count) {
-+		reut_seq_cfg.global_control = 0;
-+		mchbar_write64(REUT_ch_SEQ_CFG(channel), reut_seq_cfg.raw);
-+		return 0;
-+	}
-+	union reut_seq_base_addr_reg reut_seq_addr_stop = {
-+		.raw = mchbar_read64(REUT_ch_SEQ_ADDR_WRAP(channel)),
-+	};
-+	reut_seq_addr_stop.rank_addr = rank_count - 1;
-+	mchbar_write64(REUT_ch_SEQ_ADDR_WRAP(channel), reut_seq_addr_stop.raw);
-+
-+	reut_seq_cfg.global_control = 1;
-+	mchbar_write64(REUT_ch_SEQ_CFG(channel), reut_seq_cfg.raw);
-+	return BIT(channel);
-+}
-+
-+void run_mpr_io_test(const bool clear_errors)
-+{
-+	io_reset();
-+	mchbar_write32(REUT_GLOBAL_CTL, (union reut_seq_ctl_reg) {
-+		.start_test   = 1,
-+		.clear_errors = clear_errors,
-+	}.raw);
-+	tick_delay(2);
-+	io_reset();
-+	tick_delay(2);
-+	mchbar_write32(REUT_GLOBAL_CTL, (union reut_seq_ctl_reg) {
-+		.stop_test = 1,
-+	}.raw);
-+}
-+
-+static uint8_t get_num_tests(const uint8_t dq_pat)
-+{
-+	switch (dq_pat) {
-+	case SEGMENT_WDB:	return 4;
-+	case CADB:		return 7;
-+	case TURN_AROUND_WR:	return 8;
-+	case TURN_AROUND_ODT:	return 4;
-+	case RD_RD_TA:		return 2;
-+	case RD_RD_TA_ALL:	return 8;
-+	default:		return 1;
-+	}
-+}
-+
-+uint8_t run_io_test(
-+	struct sysinfo *const ctrl,
-+	const uint8_t chanmask,
-+	const uint8_t dq_pat,
-+	const bool clear_errors)
-+{
-+	/* SEGMENT_WDB only runs 4 tests */
-+	const uint8_t segment_wdb_lc[4] = { 0, 0, 4, 2 };
-+	const union reut_pat_wdb_cl_ctrl_reg pat_wdb_cl[4] = {
-+		[0] = {
-+			.start_ptr =  0,
-+			.end_ptr   =  9,
-+			.inc_rate  = 25,
-+			.inc_scale = SCALE_LINEAR,
-+		},
-+		[1] = {
-+			.start_ptr =  0,
-+			.end_ptr   =  9,
-+			.inc_rate  = 25,
-+			.inc_scale = SCALE_LINEAR,
-+		},
-+		[2] = {
-+			.start_ptr = 10,
-+			.end_ptr   = 63,
-+			.inc_rate  = 19,
-+			.inc_scale = SCALE_LINEAR,
-+		},
-+		[3] = {
-+			.start_ptr = 10,
-+			.end_ptr   = 63,
-+			.inc_rate  = 10,
-+			.inc_scale = SCALE_LINEAR,
-+		},
-+	};
-+	const bool is_turnaround = dq_pat == RD_RD_TA || dq_pat == RD_RD_TA_ALL;
-+	const uint8_t num_tests = get_num_tests(dq_pat);
-+	union tc_bank_rank_a_reg tc_bank_rank_a[NUM_CHANNELS] = { 0 };
-+	if (is_turnaround) {
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!(chanmask & BIT(channel)))
-+				continue;
-+
-+			tc_bank_rank_a[channel].raw = ctrl->tc_bankrank_a[channel].raw;
-+		}
-+	}
-+	for (uint8_t t = 0; t < num_tests; t++) {
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!(chanmask & BIT(channel)))
-+				continue;
-+
-+			if (dq_pat == SEGMENT_WDB) {
-+				mchbar_write32(REUT_ch_WDB_CL_CTRL(channel), pat_wdb_cl[t].raw);
-+				/*
-+				 * Skip programming LFSR save/restore. Too complex
-+				 * unless power of 2. Program desired loopcount.
-+				 */
-+				const uint8_t pat_lc = ctrl->dq_pat_lc + segment_wdb_lc[t];
-+				program_loop_count(ctrl, channel, pat_lc);
-+			} else if (dq_pat == CADB) {
-+				setup_cadb(ctrl, channel, num_tests, t);
-+			} else if (dq_pat == TURN_AROUND_WR || dq_pat == TURN_AROUND_ODT) {
-+				union reut_seq_cfg_reg reut_seq_cfg = {
-+					.raw = mchbar_read64(REUT_ch_SEQ_CFG(channel)),
-+				};
-+				reut_seq_cfg.subsequence_start_pointer = t;
-+				reut_seq_cfg.subsequence_end_pointer   = t;
-+				mchbar_write64(REUT_ch_SEQ_CFG(channel), reut_seq_cfg.raw);
-+				union reut_seq_addr_inc_ctl_reg addr_inc_ctl = {
-+					.raw = mchbar_read64(REUT_ch_SEQ_ADDR_INC_CTL(channel)),
-+				};
-+				uint8_t ta_inc_rate = 1;
-+				if (dq_pat == TURN_AROUND_WR && (t == 0 || t == 7))
-+					ta_inc_rate = 0;
-+				else if (dq_pat == TURN_AROUND_ODT && (t == 0 || t == 2))
-+					ta_inc_rate = 0;
-+
-+				/* Program increment rate as linear value */
-+				addr_inc_ctl.rank_addr_update = BIT(7) | ta_inc_rate;
-+				addr_inc_ctl.col_addr_update  = BIT(7) | ta_inc_rate;
-+				mchbar_write64(REUT_ch_SEQ_ADDR_INC_CTL(channel),
-+						addr_inc_ctl.raw);
-+			} else if (dq_pat == RD_RD_TA) {
-+				tc_bank_rank_a[channel].tRDRD_sr = (t == 0) ? 4 : 5;
-+				mchbar_write32(TC_BANK_RANK_A_ch(channel),
-+						tc_bank_rank_a[channel].raw);
-+			} else if (dq_pat == RD_RD_TA_ALL) {
-+				/*
-+				 * Program tRDRD for SR and DR. Run 8 tests, covering
-+				 * tRDRD_sr = 4, 5, 6, 7 and tRDRD_dr = min, +1, +2, +3
-+				 */
-+				const uint32_t tRDRD_dr = ctrl->tc_bankrank_a[channel].tRDRD_dr;
-+				tc_bank_rank_a[channel].tRDRD_sr = (t % 4) + 4;
-+				tc_bank_rank_a[channel].tRDRD_dr = (t % 4) + tRDRD_dr;
-+				mchbar_write32(TC_BANK_RANK_A_ch(channel),
-+						tc_bank_rank_a[channel].raw);
-+
-+				/* Program linear rank increment rate */
-+				union reut_seq_addr_inc_ctl_reg addr_inc_ctl = {
-+					.raw = mchbar_read64(REUT_ch_SEQ_ADDR_INC_CTL(channel)),
-+				};
-+				addr_inc_ctl.rank_addr_update = BIT(7) | (t / 4) ? 0 : 31;
-+				mchbar_write64(REUT_ch_SEQ_ADDR_INC_CTL(channel),
-+						addr_inc_ctl.raw);
-+			}
-+		}
-+		bool test_soe = false;
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!(chanmask & BIT(channel)))
-+				continue;
-+
-+			const union reut_err_ctl_reg reut_err_ctl = {
-+				.raw = mchbar_read32(REUT_ch_ERR_CONTROL(channel)),
-+			};
-+			const uint8_t soe = reut_err_ctl.stop_on_error_control;
-+			if (soe != NSOE) {
-+				test_soe = true;
-+				break;
-+			}
-+		}
-+		io_reset();
-+		mchbar_write32(REUT_GLOBAL_CTL, (union reut_seq_ctl_reg) {
-+			.start_test   = 1,
-+			.clear_errors = clear_errors && t == 0,
-+		}.raw);
-+		struct mono_time prev, curr;
-+		timer_monotonic_get(&prev);
-+		union reut_global_err_reg global_err;
-+		do {
-+			global_err.raw = mchbar_read32(REUT_GLOBAL_ERR);
-+			/** TODO: Clean up this mess **/
-+			timer_monotonic_get(&curr);
-+			if (mono_time_diff_microseconds(&prev, &curr) > 1000 * 1000) {
-+				mchbar_write32(REUT_GLOBAL_CTL, (union reut_seq_ctl_reg) {
-+					.stop_test = 1,
-+				}.raw);
-+				printk(BIOS_ERR, "REUT timed out, ch_done: %x\n",
-+					global_err.ch_test_done);
-+				break;
-+			}
-+		} while ((global_err.ch_test_done & chanmask) != chanmask);
-+		if (test_soe && global_err.ch_error & chanmask)
-+			break;
-+	}
-+	if (is_turnaround) {
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!(chanmask & BIT(channel)))
-+				continue;
-+
-+			mchbar_write32(TC_BANK_RANK_A_ch(channel),
-+				ctrl->tc_bankrank_a[channel].raw);
-+		}
-+	}
-+	return ((union reut_global_err_reg)mchbar_read32(REUT_GLOBAL_ERR)).ch_error;
-+}
-diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h
-index f8408e51a0..817a9f8bf8 100644
---- a/src/northbridge/intel/haswell/registers/mchbar.h
-+++ b/src/northbridge/intel/haswell/registers/mchbar.h
-@@ -94,20 +94,35 @@
- #define TC_BANK_RANK_D_ch(ch)			_MCMAIN_C(0x4014, ch)
- #define SC_ROUNDT_LAT_ch(ch)			_MCMAIN_C(0x4024, ch)
- 
-+#define REUT_ch_PAT_WDB_CL_MUX_CFG(ch)		_MCMAIN_C(0x4040, ch)
-+
- #define REUT_ch_PAT_WDB_CL_MUX_WR_x(ch, x)	_MCMAIN_C_X(0x4048, ch, x) /* x in 0 .. 2 */
- #define REUT_ch_PAT_WDB_CL_MUX_RD_x(ch, x)	_MCMAIN_C_X(0x4054, ch, x) /* x in 0 .. 2 */
- 
- #define REUT_ch_PAT_WDB_CL_MUX_LMN(ch)		_MCMAIN_C(0x4078, ch)
- 
-+#define REUT_ch_PAT_WDB_INV(ch)			_MCMAIN_C(0x4084, ch)
-+
-+#define REUT_ch_ERR_CONTROL(ch)			_MCMAIN_C(0x4098, ch)
-+#define REUT_ch_ERR_ECC_MASK(ch)		_MCMAIN_C(0x409c, ch)
-+
- #define SC_WR_ADD_DELAY_ch(ch)			_MCMAIN_C(0x40d0, ch)
- 
-+#define REUT_ch_ERR_DATA_MASK(ch)		_MCMAIN_C(0x40d8, ch)
-+
- #define REUT_ch_MISC_CKE_CTRL(ch)		_MCMAIN_C(0x4190, ch)
- 
-+#define REUT_ch_MISC_PAT_CADB_CTRL(ch)		_MCMAIN_C(0x4198, ch)
- #define REUT_ch_PAT_CADB_MRS(ch)		_MCMAIN_C(0x419c, ch)
-+#define REUT_ch_PAT_CADB_MUX_CTRL(ch)		_MCMAIN_C(0x41a0, ch)
-+#define REUT_ch_PAT_CADB_MUX_x(ch, x)		_MCMAIN_C_X(0x41a4, ch, x) /* x in 0 .. 2 */
- 
-+#define REUT_ch_PAT_CADB_CL_MUX_LMN(ch)		_MCMAIN_C(0x41b0, ch)
- #define REUT_ch_PAT_CADB_WRITE_PTR(ch)		_MCMAIN_C(0x41bc, ch)
- #define REUT_ch_PAT_CADB_PROG(ch)		_MCMAIN_C(0x41c0, ch)
- 
-+#define REUT_ch_WDB_CL_CTRL(ch)			_MCMAIN_C(0x4200, ch)
-+
- #define TC_ZQCAL_ch(ch)				_MCMAIN_C(0x4290, ch)
- #define TC_RFP_ch(ch)				_MCMAIN_C(0x4294, ch)
- #define TC_RFTP_ch(ch)				_MCMAIN_C(0x4298, ch)
-@@ -119,12 +134,27 @@
- #define QCLK_ch_LDAT_SDAT(ch)			_MCMAIN_C(0x42d4, ch)
- #define QCLK_ch_LDAT_DATA_IN_x(ch, x)		_MCMAIN_C_X(0x42dc, ch, x) /* x in 0 .. 1 */
- 
-+#define REUT_GLOBAL_CTL				0x4800
- #define REUT_GLOBAL_ERR				0x4804
- 
-+#define REUT_ch_SUBSEQ_x_CTL(ch, x)		(0x4808 + 40 * (ch) + 4 * (x))
-+
- #define REUT_ch_SEQ_CFG(ch)			(0x48a8 + 8 * (ch))
- 
- #define REUT_ch_SEQ_CTL(ch)			(0x48b8 + 4 * (ch))
- 
-+#define REUT_ch_SEQ_ADDR_START(ch)		(0x48d8 + 8 * (ch))
-+
-+#define REUT_ch_SEQ_ADDR_WRAP(ch)		(0x48e8 + 8 * (ch))
-+
-+#define REUT_ch_SEQ_MISC_CTL(ch)		(0x4908 + 4 * (ch))
-+
-+#define REUT_ch_SEQ_ADDR_INC_CTL(ch)		(0x4910 + 8 * (ch))
-+
-+#define REUT_ch_RANK_LOG_TO_PHYS(ch)		(0x4930 + 4 * (ch)) /* 4 bits per rank */
-+
-+#define HSW_REUT_ch_SEQ_LOOP_COUNT(ch)		(0x4980 + 4 * (ch)) /* *** only on C0 *** */
-+
- /* MCMAIN broadcast */
- #define MCSCHEDS_CBIT		0x4c20
- 
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0038-haswell-NRI-Add-range-tracking-library.patch b/config/coreboot/default/patches/0038-haswell-NRI-Add-range-tracking-library.patch
deleted file mode 100644
index 45fdc951..00000000
--- a/config/coreboot/default/patches/0038-haswell-NRI-Add-range-tracking-library.patch
+++ /dev/null
@@ -1,222 +0,0 @@
-From 36b206a88281796458e6ebc30fe34a7c51c86548 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sun, 8 May 2022 00:56:00 +0200
-Subject: [PATCH 38/51] haswell NRI: Add range tracking library
-
-Implement a small library used to keep track of passing ranges. This
-will be used by 1D training algorithms when margining some parameter.
-
-Change-Id: I8718e85165160afd7c0c8e730b5ce6c9c00f8a60
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/Makefile.mk  |   1 +
- .../intel/haswell/native_raminit/ranges.c     | 109 ++++++++++++++++++
- .../intel/haswell/native_raminit/ranges.h     |  68 +++++++++++
- 3 files changed, 178 insertions(+)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/ranges.c
- create mode 100644 src/northbridge/intel/haswell/native_raminit/ranges.h
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-index 6e1b365602..2da950771d 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-@@ -9,6 +9,7 @@ romstage-y += io_comp_control.c
- romstage-y += memory_map.c
- romstage-y += raminit_main.c
- romstage-y += raminit_native.c
-+romstage-y += ranges.c
- romstage-y += reut.c
- romstage-y += setup_wdb.c
- romstage-y += spd_bitmunching.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/ranges.c b/src/northbridge/intel/haswell/native_raminit/ranges.c
-new file mode 100644
-index 0000000000..cdebc1fa66
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/ranges.c
-@@ -0,0 +1,109 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <types.h>
-+
-+#include "ranges.h"
-+
-+void linear_record_pass(
-+	struct linear_train_data *const data,
-+	const bool pass,
-+	const int32_t value,
-+	const int32_t start,
-+	const int32_t step)
-+{
-+	/* If this is the first time, initialize all values */
-+	if (value == start) {
-+		/*
-+		 * If value passed, create a zero-length region for the current value,
-+		 * which may be extended as long as the successive values are passing.
-+		 *
-+		 * Otherwise, create a zero-length range for the preceding value. This
-+		 * range cannot be extended by other passing values, which is desired.
-+		 */
-+		data->current.start = start - (pass ? 0 : step);
-+		data->current.end   = data->current.start;
-+		data->largest       = data->current;
-+	} else if (pass) {
-+		/* If this pass is not contiguous, it belongs to a new region */
-+		if (data->current.end != (value - step))
-+			data->current.start = value;
-+
-+		/* Update end of current region */
-+		data->current.end = value;
-+
-+		/* Update largest region */
-+		if (range_width(data->current) > range_width(data->largest))
-+			data->largest = data->current;
-+	}
-+}
-+
-+void phase_record_pass(
-+	struct phase_train_data *const data,
-+	const bool pass,
-+	const int32_t value,
-+	const int32_t start,
-+	const int32_t step)
-+{
-+	/* If this is the first time, initialize all values */
-+	if (value == start) {
-+		/*
-+		 * If value passed, create a zero-length region for the current value,
-+		 * which may be extended as long as the successive values are passing.
-+		 *
-+		 * Otherwise, create a zero-length range for the preceding value. This
-+		 * range cannot be extended by other passing values, which is desired.
-+		 */
-+		data->current.start = start - (pass ? 0 : step);
-+		data->current.end   = data->current.start;
-+		data->largest       = data->current;
-+		data->initial       = data->current;
-+		return;
-+	}
-+	if (!pass)
-+		return;
-+
-+	/* Update initial region */
-+	if (data->initial.end == (value - step))
-+		data->initial.end = value;
-+
-+	/* If this pass is not contiguous, it belongs to a new region */
-+	if (data->current.end != (value - step))
-+		data->current.start = value;
-+
-+	/* Update end of current region */
-+	data->current.end = value;
-+
-+	/* Update largest region */
-+	if (range_width(data->current) > range_width(data->largest))
-+		data->largest = data->current;
-+}
-+
-+void phase_append_initial_to_current(
-+	struct phase_train_data *const data,
-+	const int32_t start,
-+	const int32_t step)
-+{
-+	/* If initial region is valid and does not overlap, append it */
-+	if (data->initial.start == start && data->initial.end != data->current.end)
-+		data->current.end += step + range_width(data->initial);
-+
-+	/* Update largest region */
-+	if (range_width(data->current) > range_width(data->largest))
-+		data->largest = data->current;
-+}
-+
-+void phase_append_current_to_initial(
-+	struct phase_train_data *const data,
-+	const int32_t start,
-+	const int32_t step)
-+{
-+	/* If initial region is valid and does not overlap, append it */
-+	if (data->initial.start == start && data->initial.end != data->current.end) {
-+		data->initial.start -= (step + range_width(data->current));
-+		data->current = data->initial;
-+	}
-+
-+	/* Update largest region */
-+	if (range_width(data->current) > range_width(data->largest))
-+		data->largest = data->current;
-+}
-diff --git a/src/northbridge/intel/haswell/native_raminit/ranges.h b/src/northbridge/intel/haswell/native_raminit/ranges.h
-new file mode 100644
-index 0000000000..235392df96
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/ranges.h
-@@ -0,0 +1,68 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#ifndef HASWELL_RAMINIT_RANGES_H
-+#define HASWELL_RAMINIT_RANGES_H
-+
-+#include <types.h>
-+
-+/*
-+ * Many algorithms shmoo some parameter to determine the largest passing
-+ * range. Provide a common implementation to avoid redundant boilerplate.
-+ */
-+struct passing_range {
-+	int32_t start;
-+	int32_t end;
-+};
-+
-+/* Structure for linear parameters, such as roundtrip delays */
-+struct linear_train_data {
-+	struct passing_range current;
-+	struct passing_range largest;
-+};
-+
-+/*
-+ * Phase ranges are "circular": the first and last indices are contiguous.
-+ * To correctly determine the largest passing range, one has to combine
-+ * the initial range and the current range when processing the last index.
-+ */
-+struct phase_train_data {
-+	struct passing_range initial;
-+	struct passing_range current;
-+	struct passing_range largest;
-+};
-+
-+static inline int32_t range_width(const struct passing_range range)
-+{
-+	return range.end - range.start;
-+}
-+
-+static inline int32_t range_center(const struct passing_range range)
-+{
-+	return range.start + range_width(range) / 2;
-+}
-+
-+void linear_record_pass(
-+	struct linear_train_data *data,
-+	bool pass,
-+	int32_t value,
-+	int32_t start,
-+	int32_t step);
-+
-+void phase_record_pass(
-+	struct phase_train_data *data,
-+	bool pass,
-+	int32_t value,
-+	int32_t start,
-+	int32_t step);
-+
-+void phase_append_initial_to_current(
-+	struct phase_train_data *data,
-+	int32_t start,
-+	int32_t step);
-+
-+void phase_append_current_to_initial(
-+	struct phase_train_data *data,
-+	int32_t start,
-+	int32_t step);
-+
-+#endif
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0039-haswell-NRI-Add-library-to-change-margins.patch b/config/coreboot/default/patches/0039-haswell-NRI-Add-library-to-change-margins.patch
deleted file mode 100644
index 401433ac..00000000
--- a/config/coreboot/default/patches/0039-haswell-NRI-Add-library-to-change-margins.patch
+++ /dev/null
@@ -1,294 +0,0 @@
-From 926b1af1033c26ad231587fd3a4506efb4b0d8a3 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sun, 8 May 2022 01:11:03 +0200
-Subject: [PATCH 39/51] haswell NRI: Add library to change margins
-
-Implement a library to change Rx/Tx margins. It will be expanded later.
-
-Change-Id: I0b55aba428d8b4d4e16d2fbdec57235ce3ce8adf
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/Makefile.mk  |   1 +
- .../haswell/native_raminit/change_margin.c    | 154 ++++++++++++++++++
- .../haswell/native_raminit/raminit_native.h   |  50 ++++++
- .../intel/haswell/registers/mchbar.h          |   9 +
- 4 files changed, 214 insertions(+)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/change_margin.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-index 2da950771d..ebe9e9b762 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-@@ -1,5 +1,6 @@
- ## SPDX-License-Identifier: GPL-2.0-or-later
- 
-+romstage-y += change_margin.c
- romstage-y += configure_mc.c
- romstage-y += ddr3.c
- romstage-y += jedec_reset.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/change_margin.c b/src/northbridge/intel/haswell/native_raminit/change_margin.c
-new file mode 100644
-index 0000000000..055c666eee
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/change_margin.c
-@@ -0,0 +1,154 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <commonlib/bsd/clamp.h>
-+#include <console/console.h>
-+#include <delay.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <timer.h>
-+
-+#include "raminit_native.h"
-+
-+void update_rxt(
-+	struct sysinfo *ctrl,
-+	const uint8_t channel,
-+	const uint8_t rank,
-+	const uint8_t byte,
-+	const enum rxt_subfield subfield,
-+	const int32_t value)
-+{
-+	union ddr_data_rx_train_rank_reg rxt = {
-+		.rcven =  ctrl->rcven[channel][rank][byte],
-+		.dqs_p = ctrl->rxdqsp[channel][rank][byte],
-+		.rx_eq =  ctrl->rx_eq[channel][rank][byte],
-+		.dqs_n = ctrl->rxdqsn[channel][rank][byte],
-+		.vref  = ctrl->rxvref[channel][rank][byte],
-+	};
-+	int32_t new_value;
-+	switch (subfield) {
-+	case RXT_RCVEN:
-+		new_value = clamp_s32(0, value, 511);
-+		rxt.rcven = new_value;
-+		break;
-+	case RXT_RXDQS_P:
-+		new_value = clamp_s32(0, value, 63);
-+		rxt.dqs_p = new_value;
-+		break;
-+	case RXT_RX_EQ:
-+		new_value = clamp_s32(0, value, 31);
-+		rxt.rx_eq = new_value;
-+		break;
-+	case RXT_RXDQS_N:
-+		new_value = clamp_s32(0, value, 63);
-+		rxt.dqs_n = new_value;
-+		break;
-+	case RXT_RX_VREF:
-+		new_value = clamp_s32(-32, value, 31);
-+		rxt.vref = new_value;
-+		break;
-+	case RXT_RXDQS_BOTH:
-+		new_value = clamp_s32(0, value, 63);
-+		rxt.dqs_p = new_value;
-+		rxt.dqs_n = new_value;
-+		break;
-+	case RXT_RESTORE:
-+		new_value = value;
-+		break;
-+	default:
-+		die("%s: Unhandled subfield index %u\n", __func__, subfield);
-+	}
-+
-+	if (new_value != value) {
-+		printk(BIOS_ERR, "%s: Overflow for subfield %u: %d ---> %d\n",
-+			__func__, subfield, value, new_value);
-+	}
-+	mchbar_write32(RX_TRAIN_ch_r_b(channel, rank, byte), rxt.raw);
-+	download_regfile(ctrl, channel, false, rank, REG_FILE_USE_RANK, byte, true, false);
-+}
-+
-+void update_txt(
-+	struct sysinfo *ctrl,
-+	const uint8_t channel,
-+	const uint8_t rank,
-+	const uint8_t byte,
-+	const enum txt_subfield subfield,
-+	const int32_t value)
-+{
-+	union ddr_data_tx_train_rank_reg txt = {
-+		.dq_delay  = ctrl->tx_dq[channel][rank][byte],
-+		.dqs_delay = ctrl->txdqs[channel][rank][byte],
-+		.tx_eq     = ctrl->tx_eq[channel][rank][byte],
-+	};
-+	int32_t new_value;
-+	switch (subfield) {
-+	case TXT_TX_DQ:
-+		new_value = clamp_s32(0, value, 511);
-+		txt.dq_delay = new_value;
-+		break;
-+	case TXT_TXDQS:
-+		new_value = clamp_s32(0, value, 511);
-+		txt.dqs_delay = new_value;
-+		break;
-+	case TXT_TX_EQ:
-+		new_value = clamp_s32(0, value, 63);
-+		txt.tx_eq = new_value;
-+		break;
-+	case TXT_DQDQS_OFF:
-+		new_value = value;
-+		txt.dqs_delay += new_value;
-+		txt.dq_delay  += new_value;
-+		break;
-+	case TXT_RESTORE:
-+		new_value = value;
-+		break;
-+	default:
-+		die("%s: Unhandled subfield index %u\n", __func__, subfield);
-+	}
-+	if (new_value != value) {
-+		printk(BIOS_ERR, "%s: Overflow for subfield %u: %d ---> %d\n",
-+			__func__, subfield, value, new_value);
-+	}
-+	mchbar_write32(TX_TRAIN_ch_r_b(channel, rank, byte), txt.raw);
-+	download_regfile(ctrl, channel, false, rank, REG_FILE_USE_RANK, byte, false, true);
-+}
-+
-+void download_regfile(
-+	struct sysinfo *ctrl,
-+	const uint8_t channel,
-+	const bool multicast,
-+	const uint8_t rank,
-+	const enum regfile_mode regfile,
-+	const uint8_t byte,
-+	const bool read_rf_rd,
-+	const bool read_rf_wr)
-+{
-+	union reut_seq_base_addr_reg reut_seq_base_addr;
-+	switch (regfile) {
-+	case REG_FILE_USE_START:
-+		reut_seq_base_addr.raw = mchbar_read64(REUT_ch_SEQ_ADDR_START(channel));
-+		break;
-+	case REG_FILE_USE_CURRENT:
-+		reut_seq_base_addr.raw = mchbar_read64(REUT_ch_SEQ_ADDR_CURRENT(channel));
-+		break;
-+	case REG_FILE_USE_RANK:
-+		reut_seq_base_addr.raw = 0;
-+		if (rank >= NUM_SLOTRANKS)
-+			die("%s: bad rank %u\n", __func__, rank);
-+		break;
-+	default:
-+		die("%s: Invalid regfile param %u\n", __func__, regfile);
-+	}
-+	uint8_t phys_rank = rank;
-+	if (reut_seq_base_addr.raw != 0) {
-+		/* Map REUT logical rank to physical rank */
-+		const uint32_t log_to_phys = mchbar_read32(REUT_ch_RANK_LOG_TO_PHYS(channel));
-+		phys_rank = log_to_phys >> (reut_seq_base_addr.rank_addr * 4) & 0x3;
-+	}
-+	uint32_t reg = multicast ? DDR_DATA_ch_CONTROL_0(channel) : DQ_CONTROL_0(channel, byte);
-+	union ddr_data_control_0_reg ddr_data_control_0 = {
-+		.raw = mchbar_read32(reg),
-+	};
-+	ddr_data_control_0.read_rf_rd   = read_rf_rd;
-+	ddr_data_control_0.read_rf_wr   = read_rf_wr;
-+	ddr_data_control_0.read_rf_rank = phys_rank;
-+	mchbar_write32(reg, ddr_data_control_0.raw);
-+}
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index f029e7f076..8707257b27 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -118,6 +118,30 @@ enum test_stop {
- 	ALSOE  = 3,	/* Stop on all lanes error */
- };
- 
-+enum rxt_subfield {
-+	RXT_RCVEN	= 0,
-+	RXT_RXDQS_P	= 1,
-+	RXT_RX_EQ	= 2,
-+	RXT_RXDQS_N	= 3,
-+	RXT_RX_VREF	= 4,
-+	RXT_RXDQS_BOTH	= 5,
-+	RXT_RESTORE	= 255,
-+};
-+
-+enum txt_subfield {
-+	TXT_TX_DQ	= 0,
-+	TXT_TXDQS	= 1,
-+	TXT_TX_EQ	= 2,
-+	TXT_DQDQS_OFF	= 3,
-+	TXT_RESTORE	= 255,
-+};
-+
-+enum regfile_mode {
-+	REG_FILE_USE_RANK,	/* Used when changing parameters for each rank */
-+	REG_FILE_USE_START,	/* Used when changing parameters before the test */
-+	REG_FILE_USE_CURRENT,	/* Used when changing parameters after the test */
-+};
-+
- struct wdb_pat {
- 	uint32_t start_ptr;	/* Starting pointer in WDB */
- 	uint32_t stop_ptr;	/* Stopping pointer in WDB */
-@@ -451,6 +475,32 @@ uint8_t select_reut_ranks(struct sysinfo *ctrl, uint8_t channel, uint8_t rankmas
- void run_mpr_io_test(bool clear_errors);
- uint8_t run_io_test(struct sysinfo *ctrl, uint8_t chanmask, uint8_t dq_pat, bool clear_errors);
- 
-+void update_rxt(
-+	struct sysinfo *ctrl,
-+	uint8_t channel,
-+	uint8_t rank,
-+	uint8_t byte,
-+	enum rxt_subfield subfield,
-+	int32_t value);
-+
-+void update_txt(
-+	struct sysinfo *ctrl,
-+	uint8_t channel,
-+	uint8_t rank,
-+	uint8_t byte,
-+	enum txt_subfield subfield,
-+	int32_t value);
-+
-+void download_regfile(
-+	struct sysinfo *ctrl,
-+	uint8_t channel,
-+	bool multicast,
-+	uint8_t rank,
-+	enum regfile_mode regfile,
-+	uint8_t byte,
-+	bool read_rf_rd,
-+	bool read_rf_wr);
-+
- uint8_t get_rx_bias(const struct sysinfo *ctrl);
- 
- uint8_t get_tCWL(uint32_t mem_clock_mhz);
-diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h
-index 817a9f8bf8..a81559bb1e 100644
---- a/src/northbridge/intel/haswell/registers/mchbar.h
-+++ b/src/northbridge/intel/haswell/registers/mchbar.h
-@@ -15,7 +15,11 @@
- /* Register definitions */
- 
- /* DDR DATA per-channel per-bytelane */
-+#define RX_TRAIN_ch_r_b(ch, rank, byte)		_DDRIO_C_R_B(0x0000, ch, rank, byte)
-+#define TX_TRAIN_ch_r_b(ch, rank, byte)		_DDRIO_C_R_B(0x0020, ch, rank, byte)
-+
- #define DQ_CONTROL_2(ch, byte)			_DDRIO_C_R_B(0x0064, ch, 0, byte)
-+#define DQ_CONTROL_0(ch, byte)			_DDRIO_C_R_B(0x0074, ch, 0, byte)
- 
- /* DDR CKE per-channel */
- #define DDR_CKE_ch_CMD_COMP_OFFSET(ch)		_DDRIO_C_R_B(0x1204, ch, 0, 0)
-@@ -38,6 +42,9 @@
- #define DDR_SCRAMBLE_ch(ch)			(0x2000 + 4 * (ch))
- #define DDR_SCRAM_MISC_CONTROL			0x2008
- 
-+/* DDR DATA per-channel multicast */
-+#define DDR_DATA_ch_CONTROL_0(ch)		_DDRIO_C_R_B(0x3074, ch, 0, 0)
-+
- /* DDR CMDN/CMDS per-channel (writes go to both CMDN and CMDS fubs) */
- #define DDR_CMD_ch_COMP_OFFSET(ch)		_DDRIO_C_R_B(0x3204, ch, 0, 0)
- #define DDR_CMD_ch_PI_CODING(ch)		_DDRIO_C_R_B(0x3208, ch, 0, 0)
-@@ -147,6 +154,8 @@
- 
- #define REUT_ch_SEQ_ADDR_WRAP(ch)		(0x48e8 + 8 * (ch))
- 
-+#define REUT_ch_SEQ_ADDR_CURRENT(ch)		(0x48f8 + 8 * (ch))
-+
- #define REUT_ch_SEQ_MISC_CTL(ch)		(0x4908 + 4 * (ch))
- 
- #define REUT_ch_SEQ_ADDR_INC_CTL(ch)		(0x4910 + 8 * (ch))
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0040-haswell-NRI-Add-RcvEn-training.patch b/config/coreboot/default/patches/0040-haswell-NRI-Add-RcvEn-training.patch
deleted file mode 100644
index a40ffa69..00000000
--- a/config/coreboot/default/patches/0040-haswell-NRI-Add-RcvEn-training.patch
+++ /dev/null
@@ -1,708 +0,0 @@
-From 61435822eb1d65b919bec45076737ce4ea91e1b1 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sun, 8 May 2022 00:05:41 +0200
-Subject: [PATCH 40/51] haswell NRI: Add RcvEn training
-
-Implement the RcvEn (Receive Enable) calibration procedure.
-
-Change-Id: Ifbfa520f3e0486c56d0988ce67af2ddb9cf29888
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/Makefile.mk  |   1 +
- .../haswell/native_raminit/raminit_main.c     |   1 +
- .../haswell/native_raminit/raminit_native.h   |  14 +
- .../haswell/native_raminit/reg_structs.h      |  13 +
- .../native_raminit/train_receive_enable.c     | 561 ++++++++++++++++++
- .../intel/haswell/registers/mchbar.h          |   3 +
- 6 files changed, 593 insertions(+)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/train_receive_enable.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-index ebe9e9b762..e2fbfb4211 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-@@ -16,3 +16,4 @@ romstage-y += setup_wdb.c
- romstage-y += spd_bitmunching.c
- romstage-y += testing_io.c
- romstage-y += timings_refresh.c
-+romstage-y += train_receive_enable.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 5e4674957d..7d444659c3 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -60,6 +60,7 @@ static const struct task_entry cold_boot[] = {
- 	{ configure_memory_map,                                   true, "MEMMAP",     },
- 	{ do_jedec_init,                                          true, "JEDECINIT",  },
- 	{ pre_training,                                           true, "PRETRAIN",   },
-+	{ train_receive_enable,                                   true, "RCVET",      },
- };
- 
- /* Return a generic stepping value to make stepping checks simpler */
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 8707257b27..eaaaedad1e 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -43,6 +43,9 @@
- #define NUM_WDB_CL_MUX_SEEDS	3
- #define NUM_CADB_MUX_SEEDS	3
- 
-+/* Specified in PI ticks. 64 PI ticks == 1 qclk */
-+#define tDQSCK_DRIFT		64
-+
- /* ZQ calibration types */
- enum {
- 	ZQ_INIT,	/* DDR3: ZQCL with tZQinit, LPDDR3: ZQ Init  with tZQinit  */
-@@ -189,6 +192,7 @@ enum raminit_status {
- 	RAMINIT_STATUS_MPLL_INIT_FAILURE,
- 	RAMINIT_STATUS_POLL_TIMEOUT,
- 	RAMINIT_STATUS_REUT_ERROR,
-+	RAMINIT_STATUS_RCVEN_FAILURE,
- 	RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
- };
- 
-@@ -271,6 +275,10 @@ struct sysinfo {
- 
- 	union ddr_data_vref_adjust_reg dimm_vref;
- 
-+	uint8_t io_latency[NUM_CHANNELS][NUM_SLOTRANKS];
-+	uint8_t rt_latency[NUM_CHANNELS][NUM_SLOTRANKS];
-+	uint32_t rt_io_comp[NUM_CHANNELS];
-+
- 	uint32_t data_offset_train[NUM_CHANNELS][NUM_LANES];
- 	uint32_t data_offset_comp[NUM_CHANNELS][NUM_LANES];
- 
-@@ -345,6 +353,11 @@ static inline void clear_data_offset_train_all(struct sysinfo *ctrl)
- 	memset(ctrl->data_offset_train, 0, sizeof(ctrl->data_offset_train));
- }
- 
-+static inline uint32_t get_data_train_feedback(const uint8_t channel, const uint8_t byte)
-+{
-+	return mchbar_read32(DDR_DATA_TRAIN_FEEDBACK(channel, byte));
-+}
-+
- /* Number of ticks to wait in units of 69.841279 ns (citation needed) */
- static inline void tick_delay(const uint32_t delay)
- {
-@@ -400,6 +413,7 @@ enum raminit_status convert_timings(struct sysinfo *ctrl);
- enum raminit_status configure_mc(struct sysinfo *ctrl);
- enum raminit_status configure_memory_map(struct sysinfo *ctrl);
- enum raminit_status do_jedec_init(struct sysinfo *ctrl);
-+enum raminit_status train_receive_enable(struct sysinfo *ctrl);
- 
- void configure_timings(struct sysinfo *ctrl);
- void configure_refresh(struct sysinfo *ctrl);
-diff --git a/src/northbridge/intel/haswell/native_raminit/reg_structs.h b/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-index b943259b91..b099f4bb82 100644
---- a/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-+++ b/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-@@ -297,6 +297,19 @@ union ddr_scram_misc_control_reg {
- 	uint32_t raw;
- };
- 
-+union sc_io_latency_reg {
-+	struct __packed {
-+		uint32_t iolat_rank0     : 4; // Bits  3:0
-+		uint32_t iolat_rank1     : 4; // Bits  7:4
-+		uint32_t iolat_rank2     : 4; // Bits 11:8
-+		uint32_t iolat_rank3     : 4; // Bits 15:12
-+		uint32_t rt_iocomp       : 6; // Bits 21:16
-+		uint32_t                 : 9; // Bits 30:22
-+		uint32_t dis_rt_clk_gate : 1; // Bits 31:31
-+	};
-+	uint32_t raw;
-+};
-+
- union mcscheds_cbit_reg {
- 	struct __packed {
- 		uint32_t dis_opp_cas    : 1; // Bits  0:0
-diff --git a/src/northbridge/intel/haswell/native_raminit/train_receive_enable.c b/src/northbridge/intel/haswell/native_raminit/train_receive_enable.c
-new file mode 100644
-index 0000000000..576c6bc21e
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/train_receive_enable.c
-@@ -0,0 +1,561 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <console/console.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+#include "ranges.h"
-+
-+#define RCVEN_PLOT	RAM_DEBUG
-+
-+static enum raminit_status change_rcven_timing(struct sysinfo *ctrl, const uint8_t channel)
-+{
-+	int16_t max_rcven = -4096;
-+	int16_t min_rcven = 4096;
-+	int16_t max_rcven_rank[NUM_SLOTRANKS];
-+	int16_t min_rcven_rank[NUM_SLOTRANKS];
-+	for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+		max_rcven_rank[rank] = max_rcven;
-+		min_rcven_rank[rank] = min_rcven;
-+	}
-+	for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+		if (!rank_in_ch(ctrl, rank, channel))
-+			continue;
-+
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+			int16_t new_rcven = ctrl->rcven[channel][rank][byte];
-+			new_rcven -= ctrl->io_latency[channel][rank] * 64;
-+			if (max_rcven_rank[rank] < new_rcven)
-+				max_rcven_rank[rank] = new_rcven;
-+
-+			if (min_rcven_rank[rank] > new_rcven)
-+				min_rcven_rank[rank] = new_rcven;
-+		}
-+		if (max_rcven < max_rcven_rank[rank])
-+			max_rcven = max_rcven_rank[rank];
-+
-+		if (min_rcven > min_rcven_rank[rank])
-+			min_rcven = min_rcven_rank[rank];
-+	}
-+
-+	/*
-+	 * Determine how far we are from the ideal center point for RcvEn timing.
-+	 * (PiIdeal - AveRcvEn) / 64 is the ideal number of cycles we should have
-+	 * for IO latency. command training will reduce this by 64, so plan for
-+	 * that now in the ideal value. Round to closest integer.
-+	 */
-+	const int16_t rre_pi_ideal = 256 + 64;
-+	const int16_t pi_reserve = 64;
-+	const int16_t rcven_center = (max_rcven + min_rcven) / 2;
-+	const int8_t iolat_target = DIV_ROUND_CLOSEST(rre_pi_ideal - rcven_center, 64);
-+
-+	int8_t io_g_offset = 0;
-+	int8_t io_lat[NUM_SLOTRANKS] = { 0 };
-+	for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+		if (!rank_in_ch(ctrl, rank, channel))
-+			continue;
-+
-+		io_lat[rank] = iolat_target;
-+
-+		/* Check for RcvEn underflow/overflow */
-+		const int16_t rcven_lower = 64 * io_lat[rank] + min_rcven_rank[rank];
-+		if (rcven_lower < pi_reserve)
-+			io_lat[rank] += DIV_ROUND_UP(pi_reserve - rcven_lower, 64);
-+
-+		const int16_t rcven_upper = 64 * io_lat[rank] + max_rcven_rank[rank];
-+		if (rcven_upper > 511 - pi_reserve)
-+			io_lat[rank] -= DIV_ROUND_UP(rcven_upper - (511 - pi_reserve), 64);
-+
-+		/* Check for IO latency over/underflow */
-+		if (io_lat[rank] - io_g_offset > 14)
-+			io_g_offset = io_lat[rank] - 14;
-+
-+		if (io_lat[rank] - io_g_offset < 1)
-+			io_g_offset = io_lat[rank] - 1;
-+
-+		const int8_t cycle_offset = io_lat[rank] - ctrl->io_latency[channel][rank];
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+			ctrl->rcven[channel][rank][byte] += 64 * cycle_offset;
-+			update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0);
-+		}
-+	}
-+
-+	/* Calculate new IO comp latency */
-+	union sc_io_latency_reg sc_io_lat = {
-+		.raw = mchbar_read32(SC_IO_LATENCY_ch(channel)),
-+	};
-+
-+	/* Check if we are underflowing or overflowing this field */
-+	if (io_g_offset < 0 && sc_io_lat.rt_iocomp < -io_g_offset) {
-+		printk(BIOS_ERR, "%s: IO COMP underflow\n", __func__);
-+		printk(BIOS_ERR, "io_g_offset: %d\n", io_g_offset);
-+		printk(BIOS_ERR, "rt_iocomp: %u\n", sc_io_lat.rt_iocomp);
-+		return RAMINIT_STATUS_RCVEN_FAILURE;
-+	}
-+	if (io_g_offset > 0 && io_g_offset > 0x3f - sc_io_lat.rt_iocomp) {
-+		printk(BIOS_ERR, "%s: IO COMP overflow\n", __func__);
-+		printk(BIOS_ERR, "io_g_offset: %d\n", io_g_offset);
-+		printk(BIOS_ERR, "rt_iocomp: %u\n", sc_io_lat.rt_iocomp);
-+		return RAMINIT_STATUS_RCVEN_FAILURE;
-+	}
-+	sc_io_lat.rt_iocomp += io_g_offset;
-+	ctrl->rt_io_comp[channel] = sc_io_lat.rt_iocomp;
-+	for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+		if (ctrl->rankmap[channel] & BIT(rank))
-+			ctrl->io_latency[channel][rank] = io_lat[rank] - io_g_offset;
-+
-+		const uint8_t shift = rank * 4;
-+		sc_io_lat.raw &= ~(0xf << shift);
-+		sc_io_lat.raw |= ctrl->io_latency[channel][rank] << shift;
-+	}
-+	mchbar_write32(SC_IO_LATENCY_ch(channel), sc_io_lat.raw);
-+	return RAMINIT_STATUS_SUCCESS;
-+}
-+
-+#define RL_START (256 + 24)
-+#define RL_STOP  (384 + 24)
-+#define RL_STEP  8
-+
-+#define RE_NUM_SAMPLES	6
-+
-+static enum raminit_status verify_high_region(const int32_t center, const int32_t lwidth)
-+{
-+	if (center > RL_STOP) {
-+		/* Check if center of high was found where it should be */
-+		printk(BIOS_ERR, "RcvEn: Center of high (%d) higher than expected\n", center);
-+		return RAMINIT_STATUS_RCVEN_FAILURE;
-+	}
-+	if (lwidth <= 32) {
-+		/* Check if width is large enough */
-+		printk(BIOS_ERR, "RcvEn: Width of high region (%d) too small\n", lwidth);
-+		return RAMINIT_STATUS_RCVEN_FAILURE;
-+	}
-+	if (lwidth >= 96) {
-+		/* Since we're calibrating a phase, a too large region is a problem */
-+		printk(BIOS_ERR, "RcvEn: Width of high region (%d) too large\n", lwidth);
-+		return RAMINIT_STATUS_RCVEN_FAILURE;
-+	}
-+	return RAMINIT_STATUS_SUCCESS;
-+}
-+
-+static void program_io_latency(struct sysinfo *ctrl, const uint8_t channel, const uint8_t rank)
-+{
-+	const uint8_t shift = rank * 4;
-+	const uint8_t iolat = ctrl->io_latency[channel][rank];
-+	mchbar_clrsetbits32(SC_IO_LATENCY_ch(channel), 0xf << shift, iolat << shift);
-+}
-+
-+static void program_rl_delays(struct sysinfo *ctrl, const uint8_t rank, const uint16_t rl_delay)
-+{
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!rank_in_ch(ctrl, rank, channel))
-+			continue;
-+
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+			update_rxt(ctrl, channel, rank, byte, RXT_RCVEN, rl_delay);
-+	}
-+}
-+
-+static bool sample_dqs(const uint8_t channel, const uint8_t byte)
-+{
-+	return (get_data_train_feedback(channel, byte) & 0x1ff) >= BIT(RE_NUM_SAMPLES - 1);
-+}
-+
-+enum raminit_status train_receive_enable(struct sysinfo *ctrl)
-+{
-+	const struct reut_box reut_addr = {
-+		.col = {
-+			.start    = 0,
-+			.stop     = 1023,
-+			.inc_rate = 0,
-+			.inc_val  = 1,
-+		},
-+	};
-+	const struct wdb_pat wdb_pattern = {
-+		.start_ptr  = 0,
-+		.stop_ptr   = 9,
-+		.inc_rate   = 32,
-+		.dq_pattern = BASIC_VA,
-+	};
-+
-+	const uint16_t bytemask = BIT(ctrl->lanes) - 1;
-+	const uint8_t fine_step = 1;
-+
-+	const uint8_t rt_delta = is_hsw_ult() ? 4 : 2;
-+	const uint8_t rt_io_comp = 21 + rt_delta;
-+	const uint8_t rt_latency = 16 + rt_delta;
-+	setup_io_test(
-+		ctrl,
-+		ctrl->chanmap,
-+		PAT_RD,
-+		2,
-+		RE_NUM_SAMPLES + 1,
-+		&reut_addr,
-+		0,
-+		&wdb_pattern,
-+		0,
-+		8);
-+
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+			union ddr_data_control_2_reg data_control_2 = {
-+				.raw = ctrl->dq_control_2[channel][byte],
-+			};
-+			data_control_2.force_rx_on = 1;
-+			mchbar_write32(DQ_CONTROL_2(channel, byte), data_control_2.raw);
-+		}
-+		union ddr_data_control_0_reg data_control_0 = {
-+			.raw = ctrl->dq_control_0[channel],
-+		};
-+		if (ctrl->lpddr) {
-+			/**
-+			 * W/A for b4618574 - @todo: remove for HSW ULT C0
-+			 * Can't have force_odt_on together with leaker, disable LPDDR
-+			 * mode during this training step. lpddr_mode is restored
-+			 * at the end of this function from the host structure.
-+			 */
-+			data_control_0.lpddr_mode = 0;
-+			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
-+		}
-+		data_control_0.force_odt_on     = 1;
-+		data_control_0.rl_training_mode = 1;
-+		mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
-+		mchbar_write32(SC_IO_LATENCY_ch(channel), (union sc_io_latency_reg) {
-+			.rt_iocomp = rt_io_comp,
-+		}.raw);
-+	}
-+	enum raminit_status status = RAMINIT_STATUS_SUCCESS;
-+	for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+		if (!does_rank_exist(ctrl, rank))
-+			continue;
-+
-+		/*
-+		 * Set initial roundtrip latency values. Assume -4 QCLK for worst board
-+		 * layout. This is calculated as HW_ROUNDT_LAT_DEFAULT_VALUE plus:
-+		 *
-+		 *   DDR3: Default + (2 * tAA) + 4 QCLK + PI_CLK + N-mode value * 2
-+		 * LPDDR3: Default + (2 * tAA) + 4 QCLK + PI_CLK + tDQSCK_max
-+		 *
-+		 * N-mode is 3 during training mode. Both channels use the same timings.
-+		 */
-+		/** TODO: differs for LPDDR **/
-+		const uint32_t tmp = MAX(ctrl->multiplier, 4) + 5 + 2 * ctrl->tAA;
-+		const uint32_t initial_rt_latency = MIN(rt_latency + tmp, 0x3f);
-+
-+		uint8_t chanmask = 0;
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			chanmask |= select_reut_ranks(ctrl, channel, BIT(rank));
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			ctrl->io_latency[channel][rank] = 0;
-+			mchbar_write8(SC_ROUNDT_LAT_ch(channel) + rank, initial_rt_latency);
-+			ctrl->rt_latency[channel][rank] = initial_rt_latency;
-+		}
-+
-+		printk(BIOS_DEBUG, "Rank %u\n", rank);
-+		printk(BIOS_DEBUG, "Steps 1 and 2: Find middle of high region\n");
-+		printk(RCVEN_PLOT, "Byte");
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			printk(RCVEN_PLOT, "\t");
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+				printk(RCVEN_PLOT, "%u ", byte);
-+		}
-+		printk(RCVEN_PLOT, "\nRcvEn\n");
-+		struct phase_train_data region_data[NUM_CHANNELS][NUM_LANES] = { 0 };
-+		for (uint16_t rl_delay = RL_START; rl_delay < RL_STOP; rl_delay += RL_STEP) {
-+			printk(RCVEN_PLOT, " % 3d", rl_delay);
-+			program_rl_delays(ctrl, rank, rl_delay);
-+			run_io_test(ctrl, chanmask, BASIC_VA, true);
-+			for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+				if (!rank_in_ch(ctrl, rank, channel))
-+					continue;
-+
-+				printk(RCVEN_PLOT, "\t");
-+				for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+					const bool high = sample_dqs(channel, byte);
-+					printk(RCVEN_PLOT, high ? ". " : "# ");
-+					phase_record_pass(
-+						&region_data[channel][byte],
-+						high,
-+						rl_delay,
-+						RL_START,
-+						RL_STEP);
-+				}
-+			}
-+			printk(RCVEN_PLOT, "\n");
-+		}
-+		printk(RCVEN_PLOT, "\n");
-+		printk(BIOS_DEBUG, "Update RcvEn timing to be in the center of high region\n");
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			printk(BIOS_DEBUG, "C%u.R%u: \tLeft\tRight\tWidth\tCenter\n",
-+				channel, rank);
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+				struct phase_train_data *const curr_data =
-+						&region_data[channel][byte];
-+				phase_append_current_to_initial(curr_data, RL_START, RL_STEP);
-+				const int32_t lwidth = range_width(curr_data->largest);
-+				const int32_t center = range_center(curr_data->largest);
-+				printk(BIOS_DEBUG, "   B%u: \t%d\t%d\t%d\t%d\n",
-+					byte,
-+					curr_data->largest.start,
-+					curr_data->largest.end,
-+					lwidth,
-+					center);
-+
-+				status = verify_high_region(center, lwidth);
-+				if (status) {
-+					printk(BIOS_ERR,
-+						"RcvEn problems on channel %u, byte %u\n",
-+						channel, byte);
-+					goto clean_up;
-+				}
-+				ctrl->rcven[channel][rank][byte] = center;
-+				update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0);
-+			}
-+			printk(BIOS_DEBUG, "\n");
-+		}
-+
-+		printk(BIOS_DEBUG, "Step 3: Quarter preamble - Walk backwards\n");
-+		printk(RCVEN_PLOT, "Byte");
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			printk(RCVEN_PLOT, "\t");
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+				printk(RCVEN_PLOT, "%u ", byte);
-+		}
-+		printk(RCVEN_PLOT, "\nIOLAT\n");
-+		bool done = false;
-+		while (!done) {
-+			run_io_test(ctrl, chanmask, BASIC_VA, true);
-+			done = true;
-+			for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+				if (!rank_in_ch(ctrl, rank, channel))
-+					continue;
-+
-+				printk(RCVEN_PLOT, "  %2u\t", ctrl->io_latency[channel][rank]);
-+				uint16_t highs = 0;
-+				for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+					const bool high = sample_dqs(channel, byte);
-+					printk(RCVEN_PLOT, high ? "H " : "L ");
-+					if (high)
-+						highs |= BIT(byte);
-+				}
-+				if (!highs)
-+					continue;
-+
-+				done = false;
-+
-+				/* If all bytes sample high, adjust timing globally */
-+				if (highs == bytemask && ctrl->io_latency[channel][rank] < 14) {
-+					ctrl->io_latency[channel][rank] += 2;
-+					ctrl->io_latency[channel][rank] %= 16;
-+					program_io_latency(ctrl, channel, rank);
-+					continue;
-+				}
-+
-+				/* Otherwise, adjust individual bytes */
-+				for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+					if (!(highs & BIT(byte)))
-+						continue;
-+
-+					if (ctrl->rcven[channel][rank][byte] < 128) {
-+						printk(BIOS_ERR,
-+							"RcvEn underflow: walking backwards\n");
-+						printk(BIOS_ERR,
-+							"For channel %u, rank %u, byte %u\n",
-+							channel, rank, byte);
-+						status = RAMINIT_STATUS_RCVEN_FAILURE;
-+						goto clean_up;
-+					}
-+					ctrl->rcven[channel][rank][byte] -= 128;
-+					update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0);
-+				}
-+			}
-+			printk(RCVEN_PLOT, "\n");
-+		}
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			printk(BIOS_DEBUG, "\nC%u:  Preamble\n", channel);
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+				printk(BIOS_DEBUG,
-+					" B%u: %u\n", byte, ctrl->rcven[channel][rank][byte]);
-+			}
-+		}
-+		printk(BIOS_DEBUG, "\n");
-+
-+		printk(BIOS_DEBUG, "Step 4: Add 1 qclk\n");
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+				ctrl->rcven[channel][rank][byte] += 64;
-+				update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0);
-+			}
-+		}
-+		printk(BIOS_DEBUG, "\n");
-+
-+		printk(BIOS_DEBUG, "Step 5: Walk forward to find rising edge\n");
-+		printk(RCVEN_PLOT, "Byte");
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			printk(RCVEN_PLOT, "\t");
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+				printk(RCVEN_PLOT, "%u ", byte);
-+		}
-+		printk(RCVEN_PLOT, "\n inc\n");
-+		uint16_t ch_result[NUM_CHANNELS] = { 0 };
-+		uint8_t inc_preamble[NUM_CHANNELS][NUM_LANES] = { 0 };
-+		for (uint8_t inc = 0; inc < 64; inc += fine_step) {
-+			printk(RCVEN_PLOT, " %2u\t", inc);
-+			run_io_test(ctrl, chanmask, BASIC_VA, true);
-+			done = true;
-+			for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+				if (!rank_in_ch(ctrl, rank, channel))
-+					continue;
-+
-+				for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+					if (ch_result[channel] & BIT(byte)) {
-+						/* Skip bytes that are already done */
-+						printk(RCVEN_PLOT, ". ");
-+						continue;
-+					}
-+					const bool pass = sample_dqs(channel, byte);
-+					printk(RCVEN_PLOT, pass ? ". " : "# ");
-+					if (pass) {
-+						ch_result[channel] |= BIT(byte);
-+						continue;
-+					}
-+					ctrl->rcven[channel][rank][byte] += fine_step;
-+					update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0);
-+					inc_preamble[channel][byte] = inc;
-+				}
-+				printk(RCVEN_PLOT, "\t");
-+				if (ch_result[channel] != bytemask)
-+					done = false;
-+			}
-+			printk(RCVEN_PLOT, "\n");
-+			if (done)
-+				break;
-+		}
-+		printk(BIOS_DEBUG, "\n");
-+		if (!done) {
-+			printk(BIOS_ERR, "Error: Preamble edge not found for all bytes\n");
-+			printk(BIOS_ERR, "The final RcvEn results are as follows:\n");
-+			for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+				if (!rank_in_ch(ctrl, rank, channel))
-+					continue;
-+
-+				printk(BIOS_ERR, "Channel %u Rank %u:  preamble\n",
-+					channel, rank);
-+				for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+					printk(BIOS_ERR, " Byte %u: %u%s\n", byte,
-+						ctrl->rcven[channel][rank][byte],
-+						(ch_result[channel] ^ bytemask) & BIT(byte)
-+							? ""
-+							: " *** Check this byte! ***");
-+				}
-+			}
-+			status = RAMINIT_STATUS_RCVEN_FAILURE;
-+			goto clean_up;
-+		}
-+
-+		printk(BIOS_DEBUG, "Step 6: center on preamble and clean up rank\n");
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			printk(BIOS_DEBUG, "C%u:  Preamble increment\n", channel);
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+				/*
-+				 * For Traditional, pull in RcvEn by 64. For ULT, take the DQS
-+				 * drift into account to the specified guardband: tDQSCK_DRIFT.
-+				 */
-+				ctrl->rcven[channel][rank][byte] -= tDQSCK_DRIFT;
-+				update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0);
-+				printk(BIOS_DEBUG, " B%u: %u      %u\n", byte,
-+					ctrl->rcven[channel][rank][byte],
-+					inc_preamble[channel][byte]);
-+			}
-+			printk(BIOS_DEBUG, "\n");
-+		}
-+		printk(BIOS_DEBUG, "\n");
-+	}
-+
-+clean_up:
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		if (ctrl->lpddr) {
-+			/**
-+			 * W/A for b4618574 - @todo: remove for HSW ULT C0
-+			 * Can't have force_odt_on together with leaker, disable LPDDR mode for
-+			 * this training step. This write will disable force_odt_on while still
-+			 * keeping LPDDR mode disabled. Second write will restore LPDDR mode.
-+			 */
-+			union ddr_data_control_0_reg data_control_0 = {
-+				.raw = ctrl->dq_control_0[channel],
-+			};
-+			data_control_0.lpddr_mode = 0;
-+			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
-+		}
-+		mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), ctrl->dq_control_0[channel]);
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+			mchbar_write32(DQ_CONTROL_2(channel, byte),
-+					ctrl->dq_control_2[channel][byte]);
-+		}
-+	}
-+	io_reset();
-+	if (status)
-+		return status;
-+
-+	printk(BIOS_DEBUG, "Step 7: Sync IO latency across all ranks\n");
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		status = change_rcven_timing(ctrl, channel);
-+		if (status)
-+			return status;
-+	}
-+	printk(BIOS_DEBUG, "\nFinal Receive Enable and IO latency settings:\n");
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			const union sc_io_latency_reg sc_io_latency = {
-+				.raw = mchbar_read32(SC_IO_LATENCY_ch(channel)),
-+			};
-+			printk(BIOS_DEBUG, "  C%u.R%u: IOLAT = %u  rt_iocomp = %u\n", channel,
-+				rank, ctrl->io_latency[channel][rank], sc_io_latency.rt_iocomp);
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+				printk(BIOS_DEBUG, "   B%u:   %u\n", byte,
-+					ctrl->rcven[channel][rank][byte]);
-+			}
-+			printk(BIOS_DEBUG, "\n");
-+		}
-+	}
-+	return status;
-+}
-diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h
-index a81559bb1e..9172d4f2b0 100644
---- a/src/northbridge/intel/haswell/registers/mchbar.h
-+++ b/src/northbridge/intel/haswell/registers/mchbar.h
-@@ -18,6 +18,8 @@
- #define RX_TRAIN_ch_r_b(ch, rank, byte)		_DDRIO_C_R_B(0x0000, ch, rank, byte)
- #define TX_TRAIN_ch_r_b(ch, rank, byte)		_DDRIO_C_R_B(0x0020, ch, rank, byte)
- 
-+#define DDR_DATA_TRAIN_FEEDBACK(ch, byte)	_DDRIO_C_R_B(0x0054, ch, 0, byte)
-+
- #define DQ_CONTROL_2(ch, byte)			_DDRIO_C_R_B(0x0064, ch, 0, byte)
- #define DQ_CONTROL_0(ch, byte)			_DDRIO_C_R_B(0x0074, ch, 0, byte)
- 
-@@ -100,6 +102,7 @@
- #define COMMAND_RATE_LIMIT_ch(ch)		_MCMAIN_C(0x4010, ch)
- #define TC_BANK_RANK_D_ch(ch)			_MCMAIN_C(0x4014, ch)
- #define SC_ROUNDT_LAT_ch(ch)			_MCMAIN_C(0x4024, ch)
-+#define SC_IO_LATENCY_ch(ch)			_MCMAIN_C(0x4028, ch)
- 
- #define REUT_ch_PAT_WDB_CL_MUX_CFG(ch)		_MCMAIN_C(0x4040, ch)
- 
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0041-haswell-NRI-Add-function-to-change-margins.patch b/config/coreboot/default/patches/0041-haswell-NRI-Add-function-to-change-margins.patch
deleted file mode 100644
index 296dbed6..00000000
--- a/config/coreboot/default/patches/0041-haswell-NRI-Add-function-to-change-margins.patch
+++ /dev/null
@@ -1,272 +0,0 @@
-From fc6c3edf561dd11eeb2ebe7f4cb93542e664935a Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sun, 8 May 2022 11:58:59 +0200
-Subject: [PATCH 41/51] haswell NRI: Add function to change margins
-
-Implement a function to change margin parameters. Haswell provides a
-register to apply an offset to margin parameters during training, so
-make use of it. There are other margin parameters that have not been
-implemented yet, as they are not needed for now and special handling
-is needed to provide offset training functionality.
-
-Change-Id: I5392380e13de3c44e77b7bc9f3b819e2661d1e2d
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../haswell/native_raminit/change_margin.c    | 136 ++++++++++++++++++
- .../haswell/native_raminit/raminit_native.h   |  39 +++++
- .../haswell/native_raminit/reg_structs.h      |  12 ++
- .../intel/haswell/registers/mchbar.h          |   1 +
- 4 files changed, 188 insertions(+)
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/change_margin.c b/src/northbridge/intel/haswell/native_raminit/change_margin.c
-index 055c666eee..299c44a6b0 100644
---- a/src/northbridge/intel/haswell/native_raminit/change_margin.c
-+++ b/src/northbridge/intel/haswell/native_raminit/change_margin.c
-@@ -1,5 +1,6 @@
- /* SPDX-License-Identifier: GPL-2.0-or-later */
- 
-+#include <assert.h>
- #include <commonlib/bsd/clamp.h>
- #include <console/console.h>
- #include <delay.h>
-@@ -152,3 +153,138 @@ void download_regfile(
- 	ddr_data_control_0.read_rf_rank = phys_rank;
- 	mchbar_write32(reg, ddr_data_control_0.raw);
- }
-+
-+static void update_data_offset_train(
-+	struct sysinfo *ctrl,
-+	const uint8_t param,
-+	const uint8_t en_multicast,
-+	const uint8_t channel_in,
-+	const uint8_t rank,
-+	const uint8_t byte_in,
-+	const bool update_ctrl,
-+	const enum regfile_mode regfile,
-+	const uint32_t value)
-+{
-+	bool is_rd = false;
-+	bool is_wr = false;
-+	switch (param) {
-+	case RdT:
-+	case RdV:
-+	case RcvEna:
-+		is_rd = true;
-+		break;
-+	case WrT:
-+	case WrDqsT:
-+		is_wr = true;
-+		break;
-+	default:
-+		die("%s: Invalid margin parameter %u\n", __func__, param);
-+	}
-+	if (en_multicast) {
-+		mchbar_write32(DDR_DATA_OFFSET_TRAIN, value);
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!does_ch_exist(ctrl, channel))
-+				continue;
-+
-+			download_regfile(ctrl, channel, true, rank, regfile, 0, is_rd, is_wr);
-+			if (update_ctrl) {
-+				for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+					ctrl->data_offset_train[channel][byte] = value;
-+			}
-+		}
-+	} else {
-+		mchbar_write32(DDR_DATA_OFFSET_TRAIN_ch_b(channel_in, byte_in), value);
-+		download_regfile(ctrl, channel_in, false, rank, regfile, byte_in, is_rd, is_wr);
-+		if (update_ctrl)
-+			ctrl->data_offset_train[channel_in][byte_in] = value;
-+	}
-+}
-+
-+static uint32_t get_max_margin(const enum margin_parameter param)
-+{
-+	switch (param) {
-+	case RcvEna:
-+	case RdT:
-+	case WrT:
-+	case WrDqsT:
-+		return MAX_POSSIBLE_TIME;
-+	case RdV:
-+		return MAX_POSSIBLE_VREF;
-+	default:
-+		die("%s: Invalid margin parameter %u\n", __func__, param);
-+	}
-+}
-+
-+void change_margin(
-+	struct sysinfo *ctrl,
-+	const enum margin_parameter param,
-+	const int32_t value0,
-+	const bool en_multicast,
-+	const uint8_t channel,
-+	const uint8_t rank,
-+	const uint8_t byte,
-+	const bool update_ctrl,
-+	const enum regfile_mode regfile)
-+{
-+	/** FIXME: Remove this **/
-+	if (rank == 0xff)
-+		die("%s: rank is 0xff\n", __func__);
-+
-+	if (!en_multicast && !does_ch_exist(ctrl, channel))
-+		die("%s: Tried to change margin of empty channel %u\n", __func__, channel);
-+
-+	const uint32_t max_value = get_max_margin(param);
-+	const int32_t v0 = clamp_s32(-max_value, value0, max_value);
-+
-+	union ddr_data_offset_train_reg ddr_data_offset_train = {
-+		.raw = en_multicast ? 0 : ctrl->data_offset_train[channel][byte],
-+	};
-+	bool update_offset_train = false;
-+	switch (param) {
-+	case RcvEna:
-+		ddr_data_offset_train.rcven = v0;
-+		update_offset_train = true;
-+		break;
-+	case RdT:
-+		ddr_data_offset_train.rx_dqs = v0;
-+		update_offset_train = true;
-+		break;
-+	case WrT:
-+		ddr_data_offset_train.tx_dq = v0;
-+		update_offset_train = true;
-+		break;
-+	case WrDqsT:
-+		ddr_data_offset_train.tx_dqs = v0;
-+		update_offset_train = true;
-+		break;
-+	case RdV:
-+		ddr_data_offset_train.vref = v0;
-+		update_offset_train = true;
-+		break;
-+	default:
-+		die("%s: Invalid margin parameter %u\n", __func__, param);
-+	}
-+	if (update_offset_train) {
-+		update_data_offset_train(
-+			ctrl,
-+			param,
-+			en_multicast,
-+			channel,
-+			rank,
-+			byte,
-+			update_ctrl,
-+			regfile,
-+			ddr_data_offset_train.raw);
-+	}
-+}
-+
-+void change_1d_margin_multicast(
-+	struct sysinfo *ctrl,
-+	const enum margin_parameter param,
-+	const int32_t value0,
-+	const uint8_t rank,
-+	const bool update_ctrl,
-+	const enum regfile_mode regfile)
-+{
-+	change_margin(ctrl, param, value0, true, 0, rank, 0, update_ctrl, regfile);
-+}
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index eaaaedad1e..1c8473056b 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -36,6 +36,18 @@
- 
- #define RTTNOM_MASK		(BIT(9) | BIT(6) | BIT(2))
- 
-+/* Margin parameter limits */
-+#define MAX_POSSIBLE_TIME	31
-+#define MAX_POSSIBLE_VREF	54
-+
-+#define MAX_POSSIBLE_BOTH	MAX_POSSIBLE_VREF
-+
-+#define MIN_TIME		(-MAX_POSSIBLE_TIME)
-+#define MAX_TIME		(MAX_POSSIBLE_TIME)
-+
-+#define MIN_VREF		(-MAX_POSSIBLE_VREF)
-+#define MAX_VREF		(MAX_POSSIBLE_VREF)
-+
- #define BASIC_VA_PAT_SPREAD_8	0x01010101
- 
- #define WDB_CACHE_LINE_SIZE	8
-@@ -46,6 +58,14 @@
- /* Specified in PI ticks. 64 PI ticks == 1 qclk */
- #define tDQSCK_DRIFT		64
- 
-+enum margin_parameter {
-+	RcvEna,
-+	RdT,
-+	WrT,
-+	WrDqsT,
-+	RdV,
-+};
-+
- /* ZQ calibration types */
- enum {
- 	ZQ_INIT,	/* DDR3: ZQCL with tZQinit, LPDDR3: ZQ Init  with tZQinit  */
-@@ -515,6 +535,25 @@ void download_regfile(
- 	bool read_rf_rd,
- 	bool read_rf_wr);
- 
-+void change_margin(
-+	struct sysinfo *ctrl,
-+	const enum margin_parameter param,
-+	const int32_t value0,
-+	const bool en_multicast,
-+	const uint8_t channel,
-+	const uint8_t rank,
-+	const uint8_t byte,
-+	const bool update_ctrl,
-+	const enum regfile_mode regfile);
-+
-+void change_1d_margin_multicast(
-+	struct sysinfo *ctrl,
-+	const enum margin_parameter param,
-+	const int32_t value0,
-+	const uint8_t rank,
-+	const bool update_ctrl,
-+	const enum regfile_mode regfile);
-+
- uint8_t get_rx_bias(const struct sysinfo *ctrl);
- 
- uint8_t get_tCWL(uint32_t mem_clock_mhz);
-diff --git a/src/northbridge/intel/haswell/native_raminit/reg_structs.h b/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-index b099f4bb82..a0e36ed082 100644
---- a/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-+++ b/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-@@ -25,6 +25,18 @@ union ddr_data_tx_train_rank_reg {
- 	uint32_t raw;
- };
- 
-+union ddr_data_offset_train_reg {
-+	struct __packed {
-+		int32_t rcven  : 6; // Bits  5:0
-+		int32_t rx_dqs : 6; // Bits 11:6
-+		int32_t tx_dq  : 6; // Bits 17:12
-+		int32_t tx_dqs : 6; // Bits 23:18
-+		int32_t vref   : 7; // Bits 30:24
-+		int32_t        : 1; // Bits 31:31
-+	};
-+	uint32_t raw;
-+};
-+
- union ddr_data_control_0_reg {
- 	struct __packed {
- 		uint32_t rx_training_mode      : 1; // Bits  0:0
-diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h
-index 9172d4f2b0..0acafbc826 100644
---- a/src/northbridge/intel/haswell/registers/mchbar.h
-+++ b/src/northbridge/intel/haswell/registers/mchbar.h
-@@ -21,6 +21,7 @@
- #define DDR_DATA_TRAIN_FEEDBACK(ch, byte)	_DDRIO_C_R_B(0x0054, ch, 0, byte)
- 
- #define DQ_CONTROL_2(ch, byte)			_DDRIO_C_R_B(0x0064, ch, 0, byte)
-+#define DDR_DATA_OFFSET_TRAIN_ch_b(ch, byte)	_DDRIO_C_R_B(0x0070, ch, 0, byte)
- #define DQ_CONTROL_0(ch, byte)			_DDRIO_C_R_B(0x0074, ch, 0, byte)
- 
- /* DDR CKE per-channel */
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0042-haswell-NRI-Add-read-MPR-training.patch b/config/coreboot/default/patches/0042-haswell-NRI-Add-read-MPR-training.patch
deleted file mode 100644
index f2ccb7ad..00000000
--- a/config/coreboot/default/patches/0042-haswell-NRI-Add-read-MPR-training.patch
+++ /dev/null
@@ -1,332 +0,0 @@
-From 8f07ea076572dd3371dca7b3dbd5ff9c9b332c55 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sun, 8 May 2022 11:35:49 +0200
-Subject: [PATCH 42/51] haswell NRI: Add read MPR training
-
-Implement read training using DDR3 MPR (Multi-Purpose Register).
-
-Change-Id: Id17cb2c4c399ac9bcc937b595b58f863c152461b
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/Makefile.mk  |   1 +
- .../haswell/native_raminit/raminit_main.c     |   1 +
- .../haswell/native_raminit/raminit_native.h   |   4 +
- .../haswell/native_raminit/train_read_mpr.c   | 241 ++++++++++++++++++
- .../intel/haswell/registers/mchbar.h          |   2 +-
- 5 files changed, 248 insertions(+), 1 deletion(-)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/train_read_mpr.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-index e2fbfb4211..c442be0728 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-@@ -16,4 +16,5 @@ romstage-y += setup_wdb.c
- romstage-y += spd_bitmunching.c
- romstage-y += testing_io.c
- romstage-y += timings_refresh.c
-+romstage-y += train_read_mpr.c
- romstage-y += train_receive_enable.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 7d444659c3..264d1468f5 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -61,6 +61,7 @@ static const struct task_entry cold_boot[] = {
- 	{ do_jedec_init,                                          true, "JEDECINIT",  },
- 	{ pre_training,                                           true, "PRETRAIN",   },
- 	{ train_receive_enable,                                   true, "RCVET",      },
-+	{ train_read_mpr,                                         true, "RDMPRT",     },
- };
- 
- /* Return a generic stepping value to make stepping checks simpler */
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 1c8473056b..7a486479ea 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -28,6 +28,8 @@
- /* Always use 12 legs for emphasis (not trained) */
- #define TXEQFULLDRV		(3 << 4)
- 
-+#define LOOPCOUNT_INFINITE	0xff
-+
- /* DDR3 mode register bits */
- #define MR0_DLL_RESET		BIT(8)
- 
-@@ -213,6 +215,7 @@ enum raminit_status {
- 	RAMINIT_STATUS_POLL_TIMEOUT,
- 	RAMINIT_STATUS_REUT_ERROR,
- 	RAMINIT_STATUS_RCVEN_FAILURE,
-+	RAMINIT_STATUS_RMPR_FAILURE,
- 	RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
- };
- 
-@@ -434,6 +437,7 @@ enum raminit_status configure_mc(struct sysinfo *ctrl);
- enum raminit_status configure_memory_map(struct sysinfo *ctrl);
- enum raminit_status do_jedec_init(struct sysinfo *ctrl);
- enum raminit_status train_receive_enable(struct sysinfo *ctrl);
-+enum raminit_status train_read_mpr(struct sysinfo *ctrl);
- 
- void configure_timings(struct sysinfo *ctrl);
- void configure_refresh(struct sysinfo *ctrl);
-diff --git a/src/northbridge/intel/haswell/native_raminit/train_read_mpr.c b/src/northbridge/intel/haswell/native_raminit/train_read_mpr.c
-new file mode 100644
-index 0000000000..ade1e36148
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/train_read_mpr.c
-@@ -0,0 +1,241 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <commonlib/bsd/clamp.h>
-+#include <console/console.h>
-+#include <delay.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+#include "ranges.h"
-+
-+#define RMPR_START	(-32)
-+#define RMPR_STOP	(32)
-+#define RMPR_STEP	1
-+
-+#define RMPR_MIN_WIDTH	12
-+
-+#define RMPR_PLOT	RAM_DEBUG
-+
-+/*
-+ * Clear rx_training_mode. For LPDDR, we first need to disable odt_samp_extend_en,
-+ * then disable rx_training_mode, and finally re-enable odt_samp_extend_en.
-+ */
-+static void clear_rx_training_mode(struct sysinfo *ctrl, const uint8_t channel)
-+{
-+	for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+		mchbar_write32(DQ_CONTROL_2(channel, byte), ctrl->dq_control_2[channel][byte]);
-+
-+	if (ctrl->lpddr) {
-+		union ddr_data_control_0_reg data_control_0 = {
-+			.raw = mchbar_read32(DDR_DATA_ch_CONTROL_0(channel)),
-+		};
-+		data_control_0.odt_samp_extend_en = 0;
-+		mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
-+		tick_delay(1);
-+		data_control_0.rx_training_mode = 0;
-+		mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
-+		tick_delay(1);
-+	}
-+	mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), ctrl->dq_control_0[channel]);
-+}
-+
-+static void set_rxdqs_edges_to_midpoint(struct sysinfo *ctrl)
-+{
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+				update_rxt(ctrl, channel, rank, byte, RXT_RXDQS_BOTH, 32);
-+		}
-+	}
-+}
-+
-+static void enter_mpr_train_ddr_mode(struct sysinfo *ctrl, const uint8_t rank)
-+{
-+	/* Program MR3 and mask RAS/WE to prevent scheduler from issuing non-read commands */
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!rank_in_ch(ctrl, rank, channel))
-+			continue;
-+
-+		if (!ctrl->lpddr)
-+			reut_issue_mrs(ctrl, channel, BIT(rank), 3, 1 << 2);
-+
-+		union reut_misc_odt_ctrl_reg reut_misc_odt_ctrl = {
-+			.raw = mchbar_read32(REUT_ch_MISC_ODT_CTRL(channel)),
-+		};
-+		reut_misc_odt_ctrl.mpr_train_ddr_on = 1;
-+		mchbar_write32(REUT_ch_MISC_ODT_CTRL(channel), reut_misc_odt_ctrl.raw);
-+	}
-+}
-+
-+static void leave_mpr_train_ddr_mode(struct sysinfo *ctrl, const uint8_t rank)
-+{
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!rank_in_ch(ctrl, rank, channel))
-+			continue;
-+
-+		/*
-+		 * The mpr_train_ddr_on bit will force a special command.
-+		 * Therefore, clear it before issuing the MRS command.
-+		 */
-+		union reut_misc_odt_ctrl_reg reut_misc_odt_ctrl = {
-+			.raw = mchbar_read32(REUT_ch_MISC_ODT_CTRL(channel)),
-+		};
-+		reut_misc_odt_ctrl.mpr_train_ddr_on = 0;
-+		mchbar_write32(REUT_ch_MISC_ODT_CTRL(channel), reut_misc_odt_ctrl.raw);
-+		if (!ctrl->lpddr)
-+			reut_issue_mrs(ctrl, channel, BIT(rank), 3, 0 << 2);
-+	}
-+}
-+
-+enum raminit_status train_read_mpr(struct sysinfo *ctrl)
-+{
-+	set_rxdqs_edges_to_midpoint(ctrl);
-+	clear_data_offset_train_all(ctrl);
-+	setup_io_test_mpr(ctrl, ctrl->chanmap, LOOPCOUNT_INFINITE, NSOE);
-+	enum raminit_status status = RAMINIT_STATUS_SUCCESS;
-+	for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+		if (!does_rank_exist(ctrl, rank))
-+			continue;
-+
-+		printk(BIOS_DEBUG, "Rank %u\n", rank);
-+		printk(RMPR_PLOT, "Channel");
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			printk(RMPR_PLOT, "\t%u\t\t", channel);
-+		}
-+		printk(RMPR_PLOT, "\nByte");
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			printk(RMPR_PLOT, "\t");
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+				printk(RMPR_PLOT, "%u ", byte);
-+		}
-+		enter_mpr_train_ddr_mode(ctrl, rank);
-+		struct linear_train_data region_data[NUM_CHANNELS][NUM_LANES] = { 0 };
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++)
-+			select_reut_ranks(ctrl, channel, BIT(rank));
-+
-+		printk(RMPR_PLOT, "\nDqsDelay\n");
-+		int8_t dqs_delay;
-+		for (dqs_delay = RMPR_START; dqs_delay < RMPR_STOP; dqs_delay += RMPR_STEP) {
-+			printk(RMPR_PLOT, "% 5d", dqs_delay);
-+			const enum regfile_mode regfile = REG_FILE_USE_START;
-+			/* Looks like MRC uses rank 0 here, but it feels wrong */
-+			change_1d_margin_multicast(ctrl, RdT, dqs_delay, rank, false, regfile);
-+			for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+				if (!rank_in_ch(ctrl, rank, channel))
-+					continue;
-+
-+				for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+					union ddr_data_control_2_reg data_control_2 = {
-+						.raw = ctrl->dq_control_2[channel][byte],
-+					};
-+					data_control_2.force_bias_on = 1;
-+					data_control_2.force_rx_on   = 1;
-+					data_control_2.leaker_comp   = 0;
-+					mchbar_write32(DQ_CONTROL_2(channel, byte),
-+						data_control_2.raw);
-+				}
-+				union ddr_data_control_0_reg data_control_0 = {
-+					.raw = ctrl->dq_control_0[channel],
-+				};
-+				data_control_0.rx_training_mode   = 1;
-+				data_control_0.force_odt_on       = !ctrl->lpddr;
-+				data_control_0.en_read_preamble   = 0;
-+				data_control_0.odt_samp_extend_en = ctrl->lpddr;
-+				const uint32_t reg_offset = DDR_DATA_ch_CONTROL_0(channel);
-+				mchbar_write32(reg_offset, data_control_0.raw);
-+			}
-+			run_mpr_io_test(false);
-+			for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+				if (!rank_in_ch(ctrl, rank, channel))
-+					continue;
-+
-+				printk(RMPR_PLOT, "\t");
-+				for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+					uint32_t fb = get_data_train_feedback(channel, byte);
-+					const bool pass = fb == 1;
-+					printk(RMPR_PLOT, pass ? ". " : "# ");
-+					linear_record_pass(
-+						&region_data[channel][byte],
-+						pass,
-+						dqs_delay,
-+						RMPR_START,
-+						RMPR_STEP);
-+				}
-+			}
-+			printk(RMPR_PLOT, "\n");
-+			for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+				if (!rank_in_ch(ctrl, rank, channel))
-+					continue;
-+
-+				clear_rx_training_mode(ctrl, channel);
-+			}
-+			io_reset();
-+		}
-+		printk(RMPR_PLOT, "\n");
-+		leave_mpr_train_ddr_mode(ctrl, rank);
-+		clear_data_offset_train_all(ctrl);
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			printk(BIOS_DEBUG, "C%u.R%u: \tLeft\tRight\tWidth\tCenter\tRxDqsPN\n",
-+				channel, rank);
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+				struct linear_train_data *data = &region_data[channel][byte];
-+				const int32_t lwidth = range_width(data->largest);
-+				if (lwidth <= RMPR_MIN_WIDTH) {
-+					printk(BIOS_ERR,
-+						"Bad eye (lwidth %d <= min %d) for byte %u\n",
-+						lwidth, RMPR_MIN_WIDTH, byte);
-+					status = RAMINIT_STATUS_RMPR_FAILURE;
-+				}
-+				/*
-+				 * The MPR center may not be ideal on certain platforms for
-+				 * unknown reasons. If so, adjust it with a magical number.
-+				 * For Haswell, the magical number is zero. Hell knows why.
-+				 */
-+				const int32_t center = range_center(data->largest);
-+				ctrl->rxdqsp[channel][rank][byte] = center - RMPR_START;
-+				ctrl->rxdqsn[channel][rank][byte] = center - RMPR_START;
-+				printk(BIOS_DEBUG, "  B%u: \t%d\t%d\t%d\t%d\t%u\n", byte,
-+					data->largest.start, data->largest.end, lwidth,
-+					center, ctrl->rxdqsp[channel][rank][byte]);
-+			}
-+			printk(BIOS_DEBUG, "\n");
-+		}
-+	}
-+
-+	/*
-+	 * Now program the DQS center values on populated ranks. data is taken from
-+	 * the host struct. We need to do it after all ranks are trained, because we
-+	 * need to keep the same DQS value on all ranks during the training procedure.
-+	 */
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+				update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0);
-+		}
-+	}
-+	change_1d_margin_multicast(ctrl, RdT, 0, 0, false, REG_FILE_USE_CURRENT);
-+	io_reset();
-+	return status;
-+}
-diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h
-index 0acafbc826..6a31d3a32c 100644
---- a/src/northbridge/intel/haswell/registers/mchbar.h
-+++ b/src/northbridge/intel/haswell/registers/mchbar.h
-@@ -122,7 +122,7 @@
- #define REUT_ch_ERR_DATA_MASK(ch)		_MCMAIN_C(0x40d8, ch)
- 
- #define REUT_ch_MISC_CKE_CTRL(ch)		_MCMAIN_C(0x4190, ch)
--
-+#define REUT_ch_MISC_ODT_CTRL(ch)		_MCMAIN_C(0x4194, ch)
- #define REUT_ch_MISC_PAT_CADB_CTRL(ch)		_MCMAIN_C(0x4198, ch)
- #define REUT_ch_PAT_CADB_MRS(ch)		_MCMAIN_C(0x419c, ch)
- #define REUT_ch_PAT_CADB_MUX_CTRL(ch)		_MCMAIN_C(0x41a0, ch)
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0043-haswell-NRI-Add-write-leveling.patch b/config/coreboot/default/patches/0043-haswell-NRI-Add-write-leveling.patch
deleted file mode 100644
index 0202ed1b..00000000
--- a/config/coreboot/default/patches/0043-haswell-NRI-Add-write-leveling.patch
+++ /dev/null
@@ -1,689 +0,0 @@
-From 6df4b7eb0512c24a5f53bc92e81ad6cf42cd28a7 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sun, 8 May 2022 12:56:04 +0200
-Subject: [PATCH 43/51] haswell NRI: Add write leveling
-
-Implement JEDEC write leveling, which is done in two steps. The first
-step uses the JEDEC procedure to do "fine" write leveling, i.e. align
-the DQS phase to the clock signal. The second step performs a regular
-read-write test to correct "coarse" cycle errors.
-
-Change-Id: I27678523fe22c38173a688e2a4751c259a20f009
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/Makefile.mk  |   1 +
- .../haswell/native_raminit/raminit_main.c     |   1 +
- .../haswell/native_raminit/raminit_native.h   |  10 +
- .../train_jedec_write_leveling.c              | 581 ++++++++++++++++++
- .../intel/haswell/registers/mchbar.h          |   2 +
- 5 files changed, 595 insertions(+)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/train_jedec_write_leveling.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-index c442be0728..40c2f5e014 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-@@ -16,5 +16,6 @@ romstage-y += setup_wdb.c
- romstage-y += spd_bitmunching.c
- romstage-y += testing_io.c
- romstage-y += timings_refresh.c
-+romstage-y += train_jedec_write_leveling.c
- romstage-y += train_read_mpr.c
- romstage-y += train_receive_enable.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 264d1468f5..1ff23be615 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -62,6 +62,7 @@ static const struct task_entry cold_boot[] = {
- 	{ pre_training,                                           true, "PRETRAIN",   },
- 	{ train_receive_enable,                                   true, "RCVET",      },
- 	{ train_read_mpr,                                         true, "RDMPRT",     },
-+	{ train_jedec_write_leveling,                             true, "JWRL",       },
- };
- 
- /* Return a generic stepping value to make stepping checks simpler */
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 7a486479ea..d6b11b9d3c 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -60,6 +60,9 @@
- /* Specified in PI ticks. 64 PI ticks == 1 qclk */
- #define tDQSCK_DRIFT		64
- 
-+/* Maximum additional latency */
-+#define MAX_ADD_DELAY		2
-+
- enum margin_parameter {
- 	RcvEna,
- 	RdT,
-@@ -216,6 +219,7 @@ enum raminit_status {
- 	RAMINIT_STATUS_REUT_ERROR,
- 	RAMINIT_STATUS_RCVEN_FAILURE,
- 	RAMINIT_STATUS_RMPR_FAILURE,
-+	RAMINIT_STATUS_JWRL_FAILURE,
- 	RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
- };
- 
-@@ -381,6 +385,11 @@ static inline uint32_t get_data_train_feedback(const uint8_t channel, const uint
- 	return mchbar_read32(DDR_DATA_TRAIN_FEEDBACK(channel, byte));
- }
- 
-+static inline uint16_t get_byte_group_errors(const uint8_t channel)
-+{
-+	return mchbar_read32(4 + REUT_ch_ERR_MISC_STATUS(channel)) & 0x1ff;
-+}
-+
- /* Number of ticks to wait in units of 69.841279 ns (citation needed) */
- static inline void tick_delay(const uint32_t delay)
- {
-@@ -438,6 +447,7 @@ enum raminit_status configure_memory_map(struct sysinfo *ctrl);
- enum raminit_status do_jedec_init(struct sysinfo *ctrl);
- enum raminit_status train_receive_enable(struct sysinfo *ctrl);
- enum raminit_status train_read_mpr(struct sysinfo *ctrl);
-+enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl);
- 
- void configure_timings(struct sysinfo *ctrl);
- void configure_refresh(struct sysinfo *ctrl);
-diff --git a/src/northbridge/intel/haswell/native_raminit/train_jedec_write_leveling.c b/src/northbridge/intel/haswell/native_raminit/train_jedec_write_leveling.c
-new file mode 100644
-index 0000000000..ef6483e2bd
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/train_jedec_write_leveling.c
-@@ -0,0 +1,581 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <assert.h>
-+#include <console/console.h>
-+#include <delay.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+#include "ranges.h"
-+
-+#define JWLC_PLOT	RAM_DEBUG
-+#define JWRL_PLOT	RAM_DEBUG
-+
-+static void reset_dram_dll(struct sysinfo *ctrl, const uint8_t channel, const uint8_t rank)
-+{
-+	const uint16_t mr0reg = ctrl->mr0[channel][rank / 2];
-+	reut_issue_mrs(ctrl, channel, BIT(rank), 0, mr0reg | MR0_DLL_RESET);
-+}
-+
-+static void program_wdb_pattern(struct sysinfo *ctrl, const bool invert)
-+{
-+	/* Pattern to keep DQ-DQS simple but detect any failures. Same as NHM/WSM. */
-+	const uint8_t pat[4][2] = {
-+		{ 0x00, 0xff },
-+		{ 0xff, 0x00 },
-+		{ 0xc3, 0x3c },
-+		{ 0x3c, 0xc3 },
-+	};
-+	const uint8_t pmask[2][8] = {
-+		{ 0, 0, 1, 1, 1, 1, 0, 0 },
-+		{ 1, 1, 0, 0, 0, 0, 1, 1 },
-+	};
-+	for (uint8_t s = 0; s < ARRAY_SIZE(pat); s++)
-+		write_wdb_fixed_pat(ctrl, pat[s], pmask[invert], ARRAY_SIZE(pmask[invert]), s);
-+}
-+
-+static int16_t set_add_delay(uint32_t *add_delay, uint8_t rank, int8_t target_off)
-+{
-+	const uint8_t shift = rank * 2;
-+	if (target_off > MAX_ADD_DELAY) {
-+		*add_delay &= ~(3 << shift);
-+		*add_delay |= MAX_ADD_DELAY << shift;
-+		return 128 * (target_off - MAX_ADD_DELAY);
-+	} else if (target_off < 0) {
-+		*add_delay &= ~(3 << shift);
-+		*add_delay |= 0 << shift;
-+		return 128 * target_off;
-+	} else {
-+		*add_delay &= ~(3 << shift);
-+		*add_delay |= target_off << shift;
-+		return 0;
-+	}
-+}
-+
-+static enum raminit_status train_jedec_write_leveling_cleanup(struct sysinfo *ctrl)
-+{
-+	const struct reut_box reut_addr = {
-+		.col = {
-+			.start   = 0,
-+			.stop    = 1023,
-+			.inc_val = 1,
-+		},
-+	};
-+	const struct wdb_pat wdb_pattern = {
-+		.start_ptr  = 0,
-+		.stop_ptr   = 3,
-+		.inc_rate   = 1,
-+		.dq_pattern = BASIC_VA,
-+	};
-+	const int8_t offsets[] = { 0, 1, -1, 2, 3 };
-+	const int8_t dq_offsets[] = { 0, -10, 10, -5, 5, -15, 15 };
-+	const uint8_t dq_offset_max = ARRAY_SIZE(dq_offsets);
-+
-+	/* Set LFSR seeds to be sequential */
-+	program_wdb_lfsr(ctrl, true);
-+	setup_io_test(
-+		ctrl,
-+		ctrl->chanmap,
-+		PAT_WR_RD,
-+		2,
-+		4,
-+		&reut_addr,
-+		NSOE,
-+		&wdb_pattern,
-+		0,
-+		0);
-+
-+	const union reut_pat_wdb_cl_mux_cfg_reg reut_wdb_cl_mux_cfg = {
-+		.mux_0_control       = REUT_MUX_BTBUFFER,
-+		.mux_1_control       = REUT_MUX_BTBUFFER,
-+		.mux_2_control       = REUT_MUX_BTBUFFER,
-+		.ecc_data_source_sel = 1,
-+	};
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		mchbar_write32(REUT_ch_PAT_WDB_CL_MUX_CFG(channel), reut_wdb_cl_mux_cfg.raw);
-+	}
-+
-+	int8_t byte_off[NUM_CHANNELS][NUM_LANES] = { 0 };
-+	uint32_t add_delay[NUM_CHANNELS] = { 0 };
-+	enum raminit_status status = RAMINIT_STATUS_SUCCESS;
-+	bool invert = false;
-+	const uint16_t valid_byte_mask = BIT(ctrl->lanes) - 1;
-+	for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+		uint8_t chanmask = 0;
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++)
-+			chanmask |= select_reut_ranks(ctrl, channel, BIT(rank));
-+
-+		if (!chanmask)
-+			continue;
-+
-+		printk(BIOS_DEBUG, "Rank %u\n", rank);
-+		printk(JWLC_PLOT, "Channel");
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			printk(JWLC_PLOT, "\t\t%u\t", channel);
-+		}
-+		printk(JWLC_PLOT, "\nByte\t");
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			printk(JWLC_PLOT, "\t");
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+				printk(JWLC_PLOT, "%u ", byte);
-+		}
-+		printk(JWLC_PLOT, "\nDelay DqOffset");
-+		bool done = false;
-+		int8_t byte_sum[NUM_CHANNELS] = { 0 };
-+		uint16_t byte_pass[NUM_CHANNELS] = { 0 };
-+		for (uint8_t off = 0; off < ARRAY_SIZE(offsets); off++) {
-+			for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+				if (!rank_in_ch(ctrl, rank, channel))
-+					continue;
-+
-+				const int16_t global_byte_off =
-+					set_add_delay(&add_delay[channel], rank, offsets[off]);
-+				for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+					update_txt(ctrl, channel, rank, byte, TXT_DQDQS_OFF,
-+						global_byte_off);
-+				}
-+				mchbar_write32(SC_WR_ADD_DELAY_ch(channel),
-+						add_delay[channel]);
-+			}
-+			/* Reset FIFOs and DRAM DLL (Micron workaround) */
-+			if (!ctrl->lpddr) {
-+				io_reset();
-+				for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+					if (!rank_in_ch(ctrl, rank, channel))
-+						continue;
-+
-+					reset_dram_dll(ctrl, channel, rank);
-+				}
-+				udelay(1);
-+			}
-+			for (uint8_t dq_offset = 0; dq_offset < dq_offset_max; dq_offset++) {
-+				printk(JWLC_PLOT, "\n% 3d\t% 3d",
-+					offsets[off], dq_offsets[dq_offset]);
-+				change_1d_margin_multicast(
-+					ctrl,
-+					WrT,
-+					dq_offsets[dq_offset],
-+					rank,
-+					false,
-+					REG_FILE_USE_RANK);
-+
-+				/*
-+				 * Re-program the WDB pattern. Change the pattern
-+				 * for the next test to avoid false pass issues.
-+				 */
-+				program_wdb_pattern(ctrl, invert);
-+				invert = !invert;
-+				run_io_test(ctrl, chanmask, BASIC_VA, true);
-+				done = true;
-+				for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+					if (!rank_in_ch(ctrl, rank, channel))
-+						continue;
-+
-+					printk(JWLC_PLOT, "\t");
-+					uint16_t result = get_byte_group_errors(channel);
-+					result &= valid_byte_mask;
-+
-+					/* Skip bytes that have failed or already passed */
-+					const uint16_t skip_me = result | byte_pass[channel];
-+					for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+						const bool pass = result & BIT(byte);
-+						printk(JWLC_PLOT, pass ? "# " : ". ");
-+						if (skip_me & BIT(byte))
-+							continue;
-+
-+						byte_pass[channel] |= BIT(byte);
-+						byte_off[channel][byte] = offsets[off];
-+						byte_sum[channel] += offsets[off];
-+					}
-+					if (byte_pass[channel] != valid_byte_mask)
-+						done = false;
-+				}
-+				if (done)
-+					break;
-+			}
-+			if (done)
-+				break;
-+		}
-+		printk(BIOS_DEBUG, "\n\n");
-+		if (!done) {
-+			printk(BIOS_ERR, "JWLC: Could not find a pass for all bytes\n");
-+			for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+				if (!rank_in_ch(ctrl, rank, channel))
-+					continue;
-+
-+				printk(BIOS_ERR, "Channel %u, rank %u fail:", channel, rank);
-+				const uint16_t passing_mask = byte_pass[channel];
-+				for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+					if (BIT(byte) & passing_mask)
-+						continue;
-+
-+					printk(BIOS_ERR, " %u", byte);
-+				}
-+				printk(BIOS_ERR, "\n");
-+			}
-+			status = RAMINIT_STATUS_JWRL_FAILURE;
-+			break;
-+		}
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			/* Refine target offset to make sure it works for all bytes */
-+			int8_t target_off = DIV_ROUND_CLOSEST(byte_sum[channel], ctrl->lanes);
-+			int16_t global_byte_off = 0;
-+			uint8_t all_good_loops = 0;
-+			bool all_good = 0;
-+			while (!all_good) {
-+				global_byte_off =
-+					set_add_delay(&add_delay[channel], rank, target_off);
-+				all_good = true;
-+				for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+					int16_t local_offset;
-+					local_offset = byte_off[channel][byte] - target_off;
-+					local_offset = local_offset * 128 + global_byte_off;
-+					const uint16_t tx_dq = ctrl->tx_dq[channel][rank][byte];
-+					if (tx_dq + local_offset >= (512 - 64)) {
-+						all_good = false;
-+						all_good_loops++;
-+						target_off++;
-+						break;
-+					}
-+					const uint16_t txdqs = ctrl->tx_dq[channel][rank][byte];
-+					if (txdqs + local_offset < 96) {
-+						all_good = false;
-+						all_good_loops++;
-+						target_off--;
-+						break;
-+					}
-+				}
-+				/* Avoid an infinite loop */
-+				if (all_good_loops > 3)
-+					break;
-+			}
-+			if (!all_good) {
-+				printk(BIOS_ERR, "JWLC: Target offset refining failed\n");
-+				status = RAMINIT_STATUS_JWRL_FAILURE;
-+				break;
-+			}
-+			printk(BIOS_DEBUG, "C%u.R%u:  Offset\tFinalEdge\n", channel, rank);
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+				int16_t local_offset;
-+				local_offset = byte_off[channel][byte] - target_off;
-+				local_offset = local_offset * 128 + global_byte_off;
-+				ctrl->tx_dq[channel][rank][byte] += local_offset;
-+				ctrl->txdqs[channel][rank][byte] += local_offset;
-+				update_txt(ctrl, channel, rank, byte, TXT_RESTORE, 0);
-+				printk(BIOS_DEBUG, "  B%u:   %d\t%d\n", byte, local_offset,
-+					ctrl->txdqs[channel][rank][byte]);
-+			}
-+			mchbar_write32(SC_WR_ADD_DELAY_ch(channel), add_delay[channel]);
-+			if (!ctrl->lpddr) {
-+				reset_dram_dll(ctrl, channel, rank);
-+				udelay(1);
-+			}
-+			printk(BIOS_DEBUG, "\n");
-+		}
-+		printk(BIOS_DEBUG, "\n");
-+	}
-+
-+	/* Restore WDB after test */
-+	write_wdb_va_pat(ctrl, 0, BASIC_VA_PAT_SPREAD_8, 8, 0);
-+	program_wdb_lfsr(ctrl, false);
-+	mchbar_write32(DDR_DATA_OFFSET_TRAIN, 0);
-+
-+	/** TODO: Do full JEDEC init instead? **/
-+	io_reset();
-+	return status;
-+}
-+
-+static enum raminit_status verify_wl_width(const int32_t lwidth)
-+{
-+	if (lwidth <= 32) {
-+		/* Check if width is valid */
-+		printk(BIOS_ERR, "WrLevel: Width region (%d) too small\n", lwidth);
-+		return RAMINIT_STATUS_JWRL_FAILURE;
-+	}
-+	if (lwidth >= 96) {
-+		/* Since we're calibrating a phase, a too large region is a problem */
-+		printk(BIOS_ERR, "WrLevel: Width region (%d) too large\n", lwidth);
-+		return RAMINIT_STATUS_JWRL_FAILURE;
-+	}
-+	return 0;
-+}
-+
-+enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl)
-+{
-+	/*
-+	 * Enabling WL mode causes DQS to toggle for 1024 QCLK.
-+	 * Wait for this to stop. Round up to nearest microsecond.
-+	 */
-+	const bool wl_long_delay = ctrl->lpddr;
-+	const uint32_t dqs_toggle_time = wl_long_delay ? 2048 : 1024;
-+	const uint32_t wait_time_us = DIV_ROUND_UP(ctrl->qclkps * dqs_toggle_time, 1000 * 1000);
-+
-+	const uint16_t wl_start = 192;
-+	const uint16_t wl_stop  = 192 + 128;
-+	const uint16_t wl_step  = 2;
-+
-+	/* Do not use cached MR values */
-+	const bool save_restore_mrs = ctrl->restore_mrs;
-+	ctrl->restore_mrs = 0;
-+
-+	/* Propagate delay values (without a write command) */
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		/* Propagate delay values from rank 0 to prevent assertion failures in RTL */
-+		union ddr_data_control_0_reg data_control_0 = {
-+			.raw = ctrl->dq_control_0[channel],
-+		};
-+		data_control_0.read_rf_rd   = 0;
-+		data_control_0.read_rf_wr   = 1;
-+		data_control_0.read_rf_rank = 0;
-+		mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+			union ddr_data_control_2_reg data_control_2 = {
-+				.raw = ctrl->dq_control_2[channel][byte],
-+			};
-+			data_control_2.force_bias_on = 1;
-+			data_control_2.force_rx_on   = 0;
-+			data_control_2.wl_long_delay = wl_long_delay;
-+			mchbar_write32(DQ_CONTROL_2(channel, byte), data_control_2.raw);
-+		}
-+	}
-+
-+	if (ctrl->lpddr)
-+		die("%s: Missing LPDDR support\n", __func__);
-+
-+	if (!ctrl->lpddr)
-+		ddr3_program_mr1(ctrl, 0, 1);
-+
-+	enum raminit_status status = RAMINIT_STATUS_SUCCESS;
-+	struct phase_train_data region_data[NUM_CHANNELS][NUM_LANES] = { 0 };
-+	for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+		if (!does_rank_exist(ctrl, rank))
-+			continue;
-+
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			/** TODO: Differs for LPDDR **/
-+			uint16_t mr1reg = ctrl->mr1[channel][rank / 2];
-+			mr1reg &= ~MR1_QOFF_ENABLE;
-+			mr1reg |= MR1_WL_ENABLE;
-+			if (is_hsw_ult()) {
-+				mr1reg &= ~RTTNOM_MASK;
-+				mr1reg |= encode_ddr3_rttnom(120);
-+			} else if (ctrl->dpc[channel] == 2) {
-+				mr1reg &= ~RTTNOM_MASK;
-+				mr1reg |= encode_ddr3_rttnom(60);
-+			}
-+			reut_issue_mrs(ctrl, channel, BIT(rank), 1, mr1reg);
-+
-+			/* Assert ODT for myself */
-+			uint8_t odt_matrix = BIT(rank);
-+			if (ctrl->dpc[channel] == 2) {
-+				/* Assert ODT for non-target DIMM */
-+				const uint8_t other_dimm = ((rank + 2) / 2) & 1;
-+				odt_matrix |= BIT(2 * other_dimm);
-+			}
-+
-+			union reut_misc_odt_ctrl_reg reut_misc_odt_ctrl = {
-+				.raw = 0,
-+			};
-+			if (ctrl->lpddr) {
-+				/* Only one ODT pin for ULT */
-+				reut_misc_odt_ctrl.odt_on       = 1;
-+				reut_misc_odt_ctrl.odt_override = 1;
-+			} else if (!is_hsw_ult()) {
-+				reut_misc_odt_ctrl.odt_on       = odt_matrix;
-+				reut_misc_odt_ctrl.odt_override = 0xf;
-+			}
-+			mchbar_write32(REUT_ch_MISC_ODT_CTRL(channel), reut_misc_odt_ctrl.raw);
-+		}
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			/*
-+			 * Enable write leveling mode in DDR and propagate delay
-+			 * values (without a write command). Stay in WL mode.
-+			 */
-+			union ddr_data_control_0_reg data_control_0 = {
-+				.raw = ctrl->dq_control_0[channel],
-+			};
-+			data_control_0.wl_training_mode = 1;
-+			data_control_0.tx_pi_on         = 1;
-+			data_control_0.read_rf_rd       = 0;
-+			data_control_0.read_rf_wr       = 1;
-+			data_control_0.read_rf_rank     = rank;
-+			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
-+		}
-+		printk(BIOS_DEBUG, "\nRank %u\n", rank);
-+		printk(JWRL_PLOT, "Channel\t");
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			printk(JWRL_PLOT, "%u", channel);
-+			if (channel > 0)
-+				continue;
-+
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+				printk(JWRL_PLOT, "\t");
-+		}
-+		printk(JWRL_PLOT, "\nByte");
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+				printk(JWRL_PLOT, "\t%u", byte);
-+		}
-+		printk(JWRL_PLOT, "\nWlDelay");
-+		for (uint16_t wl_delay = wl_start; wl_delay < wl_stop; wl_delay += wl_step) {
-+			printk(JWRL_PLOT, "\n %3u:", wl_delay);
-+			for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+				if (!rank_in_ch(ctrl, rank, channel))
-+					continue;
-+
-+				for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+					update_txt(ctrl, channel, rank, byte, TXT_TXDQS,
-+						wl_delay);
-+				}
-+			}
-+			/* Wait for the first burst to finish */
-+			if (wl_delay == wl_start)
-+				udelay(wait_time_us);
-+
-+			io_reset();
-+			udelay(wait_time_us);
-+			for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+				if (!rank_in_ch(ctrl, rank, channel))
-+					continue;
-+
-+				for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+					const uint32_t feedback =
-+						get_data_train_feedback(channel, byte);
-+					const bool pass = (feedback & 0x1ff) >= 16;
-+					printk(JWRL_PLOT, "\t%c%u", pass ? '.' : '#', feedback);
-+					phase_record_pass(
-+						&region_data[channel][byte],
-+						pass,
-+						wl_delay,
-+						wl_start,
-+						wl_step);
-+				}
-+			}
-+		}
-+		printk(JWRL_PLOT, "\n");
-+		printk(BIOS_DEBUG, "\n\tInitSt\tInitEn\tCurrSt\tCurrEn\tLargSt\tLargEn\n");
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			printk(BIOS_DEBUG, "C%u\n", channel);
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+				struct phase_train_data *data = &region_data[channel][byte];
-+
-+				phase_append_initial_to_current(data, wl_start, wl_step);
-+				printk(BIOS_DEBUG, "   B%u:\t%d\t%d\t%d\t%d\t%d\t%d\n",
-+					byte,
-+					data->initial.start,
-+					data->initial.end,
-+					data->current.start,
-+					data->current.end,
-+					data->largest.start,
-+					data->largest.end);
-+			}
-+		}
-+
-+		/*
-+		 * Clean up after test. Very coarsely adjust for
-+		 * any cycle errors. Program values for TxDQS.
-+		 */
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			/* Clear ODT before MRS (JEDEC spec) */
-+			mchbar_write32(REUT_ch_MISC_ODT_CTRL(channel), 0);
-+
-+			/** TODO: Differs for LPDDR **/
-+			const uint16_t mr1reg = ctrl->mr1[channel][rank / 2] | MR1_QOFF_ENABLE;
-+			reut_issue_mrs(ctrl, channel, BIT(rank), 1, mr1reg);
-+
-+			printk(BIOS_DEBUG, "\nC%u.R%u:  LftEdge Width\n", channel, rank);
-+			const bool rank_x16 = ctrl->dimms[channel][rank / 2].data.width == 16;
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+				struct phase_train_data *data = &region_data[channel][byte];
-+				const int32_t lwidth = range_width(data->largest);
-+				int32_t tx_start = data->largest.start;
-+				printk(BIOS_DEBUG, "  B%u:   %d\t%d\n", byte, tx_start, lwidth);
-+				status = verify_wl_width(lwidth);
-+				if (status) {
-+					printk(BIOS_ERR,
-+						"WrLevel problems on channel %u, byte %u\n",
-+						channel, byte);
-+					goto clean_up;
-+				}
-+
-+				/* Align byte pairs if DIMM is x16 */
-+				if (rank_x16 && (byte & 1)) {
-+					const struct phase_train_data *const ref_data =
-+							&region_data[channel][byte - 1];
-+
-+					if (tx_start > ref_data->largest.start + 64)
-+						tx_start -= 128;
-+
-+					if (tx_start < ref_data->largest.start - 64)
-+						tx_start += 128;
-+				}
-+
-+				/* Fix for b4618067 - need to add 1 QCLK to DQS PI */
-+				if (is_hsw_ult())
-+					tx_start += 64;
-+
-+				assert(tx_start >= 0);
-+				ctrl->txdqs[channel][rank][byte] = tx_start;
-+				ctrl->tx_dq[channel][rank][byte] = tx_start + 32;
-+				update_txt(ctrl, channel, rank, byte, TXT_RESTORE, 0);
-+			}
-+		}
-+		printk(BIOS_DEBUG, "\n");
-+	}
-+
-+clean_up:
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), ctrl->dq_control_0[channel]);
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+			mchbar_write32(DQ_CONTROL_2(channel, byte),
-+				ctrl->dq_control_2[channel][byte]);
-+		}
-+	}
-+	if (!ctrl->lpddr)
-+		ddr3_program_mr1(ctrl, 0, 0);
-+
-+	ctrl->restore_mrs = save_restore_mrs;
-+
-+	if (status)
-+		return status;
-+
-+	/** TODO: If this step fails and dec_wrd is set, clear it and try again **/
-+	return train_jedec_write_leveling_cleanup(ctrl);
-+}
-diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h
-index 6a31d3a32c..7c0b5a49de 100644
---- a/src/northbridge/intel/haswell/registers/mchbar.h
-+++ b/src/northbridge/intel/haswell/registers/mchbar.h
-@@ -121,6 +121,8 @@
- 
- #define REUT_ch_ERR_DATA_MASK(ch)		_MCMAIN_C(0x40d8, ch)
- 
-+#define REUT_ch_ERR_MISC_STATUS(ch)		_MCMAIN_C(0x40e8, ch)
-+
- #define REUT_ch_MISC_CKE_CTRL(ch)		_MCMAIN_C(0x4190, ch)
- #define REUT_ch_MISC_ODT_CTRL(ch)		_MCMAIN_C(0x4194, ch)
- #define REUT_ch_MISC_PAT_CADB_CTRL(ch)		_MCMAIN_C(0x4198, ch)
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0044-haswell-NRI-Add-final-raminit-steps.patch b/config/coreboot/default/patches/0044-haswell-NRI-Add-final-raminit-steps.patch
deleted file mode 100644
index 62cae936..00000000
--- a/config/coreboot/default/patches/0044-haswell-NRI-Add-final-raminit-steps.patch
+++ /dev/null
@@ -1,570 +0,0 @@
-From 9d1b945702006db5678c5dc81699699bf6e6741a Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sun, 8 May 2022 14:29:05 +0200
-Subject: [PATCH 44/51] haswell NRI: Add final raminit steps
-
-Implement the remaining raminit steps. Although many training steps are
-missing, this is enough to boot on the Asrock B85M Pro4.
-
-Change-Id: I94f3b65f0218d4da4fda4d84592dfd91f77f8f21
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- src/northbridge/intel/haswell/Kconfig         |   4 +-
- .../intel/haswell/native_raminit/Makefile.mk  |   1 +
- .../haswell/native_raminit/activate_mc.c      | 388 ++++++++++++++++++
- .../haswell/native_raminit/raminit_main.c     |   5 +-
- .../haswell/native_raminit/raminit_native.c   |   5 +-
- .../haswell/native_raminit/raminit_native.h   |   2 +
- .../haswell/native_raminit/reg_structs.h      |  12 +
- .../intel/haswell/registers/mchbar.h          |   7 +
- 8 files changed, 416 insertions(+), 8 deletions(-)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/activate_mc.c
-
-diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
-index 4b83a25bc1..c6ab27184e 100644
---- a/src/northbridge/intel/haswell/Kconfig
-+++ b/src/northbridge/intel/haswell/Kconfig
-@@ -11,12 +11,12 @@ config NORTHBRIDGE_INTEL_HASWELL
- if NORTHBRIDGE_INTEL_HASWELL
- 
- config USE_NATIVE_RAMINIT
--	bool "[NOT WORKING] Use native raminit"
-+	bool "[NOT COMPLETE] Use native raminit"
- 	default n
- 	select HAVE_DEBUG_RAM_SETUP
- 	help
- 	  Select if you want to use coreboot implementation of raminit rather than
--	  MRC.bin. Currently incomplete and does not boot.
-+	  MRC.bin. Currently incomplete and does not support S3 resume.
- 
- config HASWELL_VBOOT_IN_BOOTBLOCK
- 	depends on VBOOT
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-index 40c2f5e014..d97da72890 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-@@ -1,5 +1,6 @@
- ## SPDX-License-Identifier: GPL-2.0-or-later
- 
-+romstage-y += activate_mc.c
- romstage-y += change_margin.c
- romstage-y += configure_mc.c
- romstage-y += ddr3.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/activate_mc.c b/src/northbridge/intel/haswell/native_raminit/activate_mc.c
-new file mode 100644
-index 0000000000..78a7ad27ef
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/activate_mc.c
-@@ -0,0 +1,388 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <console/console.h>
-+#include <delay.h>
-+#include <device/pci_ops.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <timer.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+
-+static void update_internal_clocks_on(struct sysinfo *ctrl)
-+{
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		bool clocks_on = false;
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+			const union ddr_data_control_1_reg data_control_1 = {
-+				.raw = ctrl->dq_control_1[channel][byte],
-+			};
-+			const int8_t o_on = data_control_1.odt_delay;
-+			const int8_t s_on = data_control_1.sense_amp_delay;
-+			const int8_t o_off = data_control_1.odt_duration;
-+			const int8_t s_off = data_control_1.sense_amp_duration;
-+			if (o_on + o_off >= 7 || s_on + s_off >= 7) {
-+				clocks_on = true;
-+				break;
-+			}
-+		}
-+		union ddr_data_control_0_reg data_control_0 = {
-+			.raw = ctrl->dq_control_0[channel],
-+		};
-+		data_control_0.internal_clocks_on = clocks_on;
-+		ctrl->dq_control_0[channel] = data_control_0.raw;
-+		mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
-+	}
-+}
-+
-+/* Switch off unused segments of the SDLL to save power */
-+static void update_sdll_length(struct sysinfo *ctrl)
-+{
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+			uint8_t max_pi = 0;
-+			for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+				if (!rank_in_ch(ctrl, rank, channel))
-+					continue;
-+
-+				const uint8_t rx_dqs_p = ctrl->rxdqsp[channel][rank][byte];
-+				const uint8_t rx_dqs_n = ctrl->rxdqsn[channel][rank][byte];
-+				max_pi = MAX(max_pi, MAX(rx_dqs_p, rx_dqs_n));
-+			}
-+			/* Update SDLL length for power savings */
-+			union ddr_data_control_1_reg data_control_1 = {
-+				.raw = ctrl->dq_control_1[channel][byte],
-+			};
-+			/* Calculate which segments to turn off */
-+			data_control_1.sdll_segment_disable = (7 - (max_pi >> 3)) & ~1;
-+			ctrl->dq_control_1[channel][byte] = data_control_1.raw;
-+			mchbar_write32(DQ_CONTROL_1(channel, byte), data_control_1.raw);
-+		}
-+	}
-+}
-+
-+static void set_rx_clk_stg_num(struct sysinfo *ctrl, const uint8_t channel)
-+{
-+	const uint8_t rcven_drift = ctrl->lpddr ? DIV_ROUND_UP(tDQSCK_DRIFT, ctrl->qclkps) : 1;
-+	uint8_t max_rcven = 0;
-+	for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+		if (!rank_in_ch(ctrl, rank, channel))
-+			continue;
-+
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+			max_rcven = MAX(max_rcven, ctrl->rcven[channel][rank][byte] / 64);
-+	}
-+	const union ddr_data_control_1_reg ddr_data_control_1 = {
-+		.raw = ctrl->dq_control_1[channel][0],
-+	};
-+	const bool lpddr_long_odt = ddr_data_control_1.lpddr_long_odt_en;
-+	const uint8_t rcven_turnoff = max_rcven + 18 + 2 * rcven_drift + lpddr_long_odt;
-+	const union ddr_data_control_0_reg ddr_data_control_0 = {
-+		.raw = ctrl->dq_control_0[channel],
-+	};
-+	for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+		union ddr_data_control_2_reg ddr_data_control_2 = {
-+			.raw = ctrl->dq_control_2[channel][byte],
-+		};
-+		if (ddr_data_control_0.odt_samp_extend_en) {
-+			if (ddr_data_control_2.rx_clk_stg_num < rcven_turnoff)
-+				ddr_data_control_2.rx_clk_stg_num = rcven_turnoff;
-+		} else {
-+			const int8_t o_on = ddr_data_control_1.odt_delay;
-+			const int8_t o_off = ddr_data_control_1.odt_duration;
-+			ddr_data_control_2.rx_clk_stg_num = MAX(17, o_on + o_off + 14);
-+		}
-+		ctrl->dq_control_2[channel][byte] = ddr_data_control_2.raw;
-+		mchbar_write32(DQ_CONTROL_2(channel, byte), ddr_data_control_2.raw);
-+	}
-+}
-+
-+#define SELF_REFRESH_IDLE_COUNT 0x200
-+
-+static void enter_sr(void)
-+{
-+	mchbar_write32(PM_SREF_CONFIG, SELF_REFRESH_IDLE_COUNT | BIT(16));
-+	udelay(1);
-+}
-+
-+enum power_down_mode {
-+	PDM_NO_PD	= 0,
-+	PDM_APD		= 1,
-+	PDM_PPD		= 2,
-+	PDM_PPD_DLL_OFF	= 6,
-+};
-+
-+static void power_down_config(struct sysinfo *ctrl)
-+{
-+	const enum power_down_mode pd_mode = ctrl->lpddr ? PDM_PPD : PDM_PPD_DLL_OFF;
-+	mchbar_write32(PM_PDWN_CONFIG, pd_mode << 12 | 0x40);
-+}
-+
-+static void train_power_modes_post(struct sysinfo *ctrl)
-+{
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		/* Adjust tCPDED and tPRPDEN */
-+		if (ctrl->mem_clock_mhz >= 933)
-+			ctrl->tc_bankrank_d[channel].tCPDED = 2;
-+
-+		if (ctrl->mem_clock_mhz >= 1066)
-+			ctrl->tc_bankrank_d[channel].tPRPDEN = 2;
-+
-+		mchbar_write32(TC_BANK_RANK_D_ch(channel), ctrl->tc_bankrank_d[channel].raw);
-+	}
-+	power_down_config(ctrl);
-+	mchbar_write32(MCDECS_CBIT, BIT(30));	/* dis_msg_clk_gate */
-+}
-+
-+static uint8_t compute_burst_end_odt_delay(const struct sysinfo *const ctrl)
-+{
-+	/* Must be disabled for LPDDR */
-+	if (ctrl->lpddr)
-+		return 0;
-+
-+	const uint8_t beod = MIN(7, DIV_ROUND_CLOSEST(14300 * 20 / 100, ctrl->qclkps));
-+	if (beod < 3)
-+		return 0;
-+
-+	if (beod < 4)
-+		return 4;
-+
-+	return beod;
-+}
-+
-+static void program_burst_end_odt_delay(struct sysinfo *ctrl)
-+{
-+	/* Program burst_end_odt_delay - it should be zero during training steps */
-+	const uint8_t beod = compute_burst_end_odt_delay(ctrl);
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+			union ddr_data_control_1_reg ddr_data_control_1 = {
-+				.raw = ctrl->dq_control_1[channel][byte],
-+			};
-+			ddr_data_control_1.burst_end_odt_delay = beod;
-+			ctrl->dq_control_1[channel][byte] = ddr_data_control_1.raw;
-+			mchbar_write32(DQ_CONTROL_1(channel, byte), ddr_data_control_1.raw);
-+		}
-+	}
-+}
-+
-+/*
-+ * Return a random value to use for scrambler seeds. Try to use RDRAND
-+ * first and fall back to hardcoded values if RDRAND does not succeed.
-+ */
-+static uint16_t get_random_number(const uint8_t channel)
-+{
-+	/* The RDRAND instruction is only available 100k cycles after reset */
-+	for (size_t i = 0; i < 100000; i++) {
-+		uint32_t status;
-+		uint32_t random;
-+		/** TODO: Clean up asm **/
-+		__asm__ __volatile__(
-+			"\n\t .byte 0x0F, 0xC7, 0xF0"
-+			"\n\t movl %%eax, %0"
-+			"\n\t pushf"
-+			"\n\t pop %%eax"
-+			"\n\t movl %%eax, %1"
-+			: "=m"(random),
-+			  "=m"(status)
-+			: /* No inputs */
-+			: "eax", "cc");
-+
-+		/* Only consider non-zero random values as valid */
-+		if (status & 1 && random)
-+			return random;
-+	}
-+
-+	/* https://xkcd.com/221 */
-+	if (channel)
-+		return 0x28f4;
-+	else
-+		return 0x893e;
-+}
-+
-+/* Work around "error: 'typeof' applied to a bit-field" */
-+static inline uint32_t max(const uint32_t a, const uint32_t b)
-+{
-+	return MAX(a, b);
-+}
-+
-+enum raminit_status activate_mc(struct sysinfo *ctrl)
-+{
-+	const bool enable_scrambling = true;
-+	const bool enable_cmd_tristate = true;
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		if (enable_scrambling && ctrl->stepping < STEPPING_C0) {
-+			/* Make sure tRDRD_(sr, dr, dd) are at least 6 for scrambler W/A */
-+			union tc_bank_rank_a_reg tc_bank_rank_a = {
-+				.raw = mchbar_read32(TC_BANK_RANK_A_ch(channel)),
-+			};
-+			tc_bank_rank_a.tRDRD_sr = max(tc_bank_rank_a.tRDRD_sr, 6);
-+			tc_bank_rank_a.tRDRD_dr = max(tc_bank_rank_a.tRDRD_dr, 6);
-+			tc_bank_rank_a.tRDRD_dd = max(tc_bank_rank_a.tRDRD_dd, 6);
-+			mchbar_write32(TC_BANK_RANK_A_ch(channel), tc_bank_rank_a.raw);
-+		}
-+		if (enable_scrambling) {
-+			const union ddr_scramble_reg ddr_scramble = {
-+				.scram_key = get_random_number(channel),
-+				.scram_en  = 1,
-+			};
-+			mchbar_write32(DDR_SCRAMBLE_ch(channel), ddr_scramble.raw);
-+		}
-+		if (ctrl->tCMD == 1) {
-+			/* If we are in 1N mode, enable and set command rate limit to 3 */
-+			union mcmain_command_rate_limit_reg cmd_rate_limit = {
-+				.raw = mchbar_read32(COMMAND_RATE_LIMIT_ch(channel)),
-+			};
-+			cmd_rate_limit.enable_cmd_limit = 1;
-+			cmd_rate_limit.cmd_rate_limit   = 3;
-+			mchbar_write32(COMMAND_RATE_LIMIT_ch(channel), cmd_rate_limit.raw);
-+		}
-+		if (enable_cmd_tristate) {
-+			/* Enable command tri-state at the end of training */
-+			union tc_bank_rank_a_reg tc_bank_rank_a = {
-+				.raw = mchbar_read32(TC_BANK_RANK_A_ch(channel)),
-+			};
-+			tc_bank_rank_a.cmd_3st_dis = 0;
-+			mchbar_write32(TC_BANK_RANK_A_ch(channel), tc_bank_rank_a.raw);
-+		}
-+		/* Set MC to normal mode and clean the ODT and CKE */
-+		mchbar_write32(REUT_ch_SEQ_CFG(channel), REUT_MODE_NOP << 12);
-+		/* Set again the rank occupancy */
-+		mchbar_write8(MC_INIT_STATE_ch(channel), ctrl->rankmap[channel]);
-+		if (ctrl->is_ecc) {
-+			/* Enable ECC I/O and logic */
-+			union mad_dimm_reg mad_dimm = {
-+				.raw = mchbar_read32(MAD_DIMM(channel)),
-+			};
-+			mad_dimm.ecc_mode = 3;
-+			mchbar_write32(MAD_DIMM(channel), mad_dimm.raw);
-+		}
-+	}
-+
-+	if (!is_hsw_ult())
-+		update_internal_clocks_on(ctrl);
-+
-+	update_sdll_length(ctrl);
-+
-+	program_burst_end_odt_delay(ctrl);
-+
-+	if (is_hsw_ult()) {
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!does_ch_exist(ctrl, channel))
-+				continue;
-+
-+			set_rx_clk_stg_num(ctrl, channel);
-+		}
-+		/** TODO: Program DDRPL_CR_DDR_TX_DELAY if Memory Trace is enabled **/
-+	}
-+
-+	/* Enable periodic COMP */
-+	mchbar_write32(M_COMP, (union pcu_comp_reg) {
-+		.comp_interval = COMP_INT,
-+	}.raw);
-+
-+	/* Enable the power mode before PCU starts working */
-+	train_power_modes_post(ctrl);
-+
-+	/* Set idle timer and self refresh enable bits */
-+	enter_sr();
-+
-+	/** FIXME: Do not hardcode power weights and RAPL settings **/
-+	mchbar_write32(0x5888, 0x00000d0d);
-+	mchbar_write32(0x5884, 0x00000004);	/* 58.2 pJ */
-+
-+	mchbar_write32(0x58e0, 0);
-+	mchbar_write32(0x58e4, 0);
-+
-+	mchbar_write32(0x5890, 0xffff);
-+	mchbar_write32(0x5894, 0xffff);
-+	mchbar_write32(0x5898, 0xffff);
-+	mchbar_write32(0x589c, 0xffff);
-+	mchbar_write32(0x58d0, 0xffff);
-+	mchbar_write32(0x58d4, 0xffff);
-+	mchbar_write32(0x58d8, 0xffff);
-+	mchbar_write32(0x58dc, 0xffff);
-+
-+	/* Overwrite thermal parameters */
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		mchbar_write32(_MCMAIN_C(0x42ec, channel), 0x0000000f);
-+		mchbar_write32(_MCMAIN_C(0x42f0, channel), 0x00000009);
-+		mchbar_write32(_MCMAIN_C(0x42f4, channel), 0x00000093);
-+		mchbar_write32(_MCMAIN_C(0x42f8, channel), 0x00000087);
-+		mchbar_write32(_MCMAIN_C(0x42fc, channel), 0x000000de);
-+
-+		/** TODO: Differs for LPDDR **/
-+		mchbar_write32(PM_THRT_CKE_MIN_ch(channel), 0x30);
-+	}
-+	mchbar_write32(PCU_DDR_PTM_CTL, 0x40);
-+	return RAMINIT_STATUS_SUCCESS;
-+}
-+
-+static void mc_lockdown(void)
-+{
-+	/* Lock memory controller registers */
-+	mchbar_write32(MC_LOCK, 0x8f);
-+
-+	/* MPCOHTRK_GDXC_OCLA_ADDRESS_HI_LOCK is set when programming the memory map */
-+
-+	/* Lock memory map registers */
-+	pci_or_config16(HOST_BRIDGE, GGC,         1 <<  0);
-+	pci_or_config32(HOST_BRIDGE, DPR,         1 <<  0);
-+	pci_or_config32(HOST_BRIDGE, MESEG_LIMIT, 1 << 10);
-+	pci_or_config32(HOST_BRIDGE, REMAPBASE,   1 <<  0);
-+	pci_or_config32(HOST_BRIDGE, REMAPLIMIT,  1 <<  0);
-+	pci_or_config32(HOST_BRIDGE, TOM,         1 <<  0);
-+	pci_or_config32(HOST_BRIDGE, TOUUD,       1 <<  0);
-+	pci_or_config32(HOST_BRIDGE, BDSM,        1 <<  0);
-+	pci_or_config32(HOST_BRIDGE, BGSM,        1 <<  0);
-+	pci_or_config32(HOST_BRIDGE, TOLUD,       1 <<  0);
-+}
-+
-+enum raminit_status raminit_done(struct sysinfo *ctrl)
-+{
-+	union mc_init_state_g_reg mc_init_state_g = {
-+		.raw = mchbar_read32(MC_INIT_STATE_G),
-+	};
-+	mc_init_state_g.refresh_enable = 1;
-+	mc_init_state_g.pu_mrc_done    = 1;
-+	mc_init_state_g.mrc_done       = 1;
-+	mchbar_write32(MC_INIT_STATE_G, mc_init_state_g.raw);
-+
-+	/* Lock the memory controller to enable normal operation */
-+	mc_lockdown();
-+
-+	/* Poll for mc_init_done_ack to make sure memory initialization is complete */
-+	printk(BIOS_DEBUG, "Waiting for mc_init_done acknowledgement... ");
-+
-+	struct stopwatch timer;
-+	stopwatch_init_msecs_expire(&timer, 2000);
-+	do {
-+		mc_init_state_g.raw = mchbar_read32(MC_INIT_STATE_G);
-+
-+		/* DRAM will NOT work without the acknowledgement. There is no hope. */
-+		if (stopwatch_expired(&timer))
-+			die("\nTimed out waiting for mc_init_done acknowledgement\n");
-+
-+	} while (mc_init_state_g.mc_init_done_ack == 0);
-+	printk(BIOS_DEBUG, "DONE!\n");
-+
-+	/* Provide some data for the graphics driver. Yes, it's hardcoded. */
-+	mchbar_write32(SSKPD + 0, 0x05a2404f);
-+	mchbar_write32(SSKPD + 4, 0x140000a0);
-+	return RAMINIT_STATUS_SUCCESS;
-+}
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 1ff23be615..3a65fb01fb 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -63,6 +63,8 @@ static const struct task_entry cold_boot[] = {
- 	{ train_receive_enable,                                   true, "RCVET",      },
- 	{ train_read_mpr,                                         true, "RDMPRT",     },
- 	{ train_jedec_write_leveling,                             true, "JWRL",       },
-+	{ activate_mc,                                            true, "ACTIVATE",   },
-+	{ raminit_done,                                           true, "RAMINITEND", },
- };
- 
- /* Return a generic stepping value to make stepping checks simpler */
-@@ -143,7 +145,4 @@ void raminit_main(const enum raminit_boot_mode bootmode)
- 
- 	if (status != RAMINIT_STATUS_SUCCESS)
- 		die("Memory initialization was met with utmost failure and misery\n");
--
--	/** TODO: Implement the required magic **/
--	die("NATIVE RAMINIT: More Magic (tm) required.\n");
- }
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-index 2fed93de5b..5f7ceec222 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-@@ -199,8 +199,6 @@ void perform_raminit(const int s3resume)
- 		else
- 			me_status = ME_INIT_STATUS_SUCCESS;
- 
--		/** TODO: Remove this once raminit is implemented **/
--		me_status = ME_INIT_STATUS_ERROR;
- 		intel_early_me_init_done(me_status);
- 	}
- 
-@@ -214,7 +212,8 @@ void perform_raminit(const int s3resume)
- 	}
- 
- 	/* Save training data on non-S3 resumes */
--	if (!s3resume)
-+	/** TODO: Enable this once training data is populated **/
-+	if (0 && !s3resume)
- 		save_mrc_data(&md);
- 
- 	/** TODO: setup_sdram_meminfo **/
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index d6b11b9d3c..a0a913f926 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -448,6 +448,8 @@ enum raminit_status do_jedec_init(struct sysinfo *ctrl);
- enum raminit_status train_receive_enable(struct sysinfo *ctrl);
- enum raminit_status train_read_mpr(struct sysinfo *ctrl);
- enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl);
-+enum raminit_status activate_mc(struct sysinfo *ctrl);
-+enum raminit_status raminit_done(struct sysinfo *ctrl);
- 
- void configure_timings(struct sysinfo *ctrl);
- void configure_refresh(struct sysinfo *ctrl);
-diff --git a/src/northbridge/intel/haswell/native_raminit/reg_structs.h b/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-index a0e36ed082..0d9aaa1f7c 100644
---- a/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-+++ b/src/northbridge/intel/haswell/native_raminit/reg_structs.h
-@@ -294,6 +294,18 @@ union ddr_cke_ctl_controls_reg {
- 	uint32_t raw;
- };
- 
-+union ddr_scramble_reg {
-+	struct __packed {
-+		uint32_t scram_en    :  1; // Bits  0:0
-+		uint32_t scram_key   : 16; // Bits 16:1
-+		uint32_t clk_gate_ab :  2; // Bits 18:17
-+		uint32_t clk_gate_c  :  2; // Bits 20:19
-+		uint32_t en_dbi_ab   :  1; // Bits 21:21
-+		uint32_t             : 10; // Bits 31:17
-+	};
-+	uint32_t raw;
-+};
-+
- union ddr_scram_misc_control_reg {
- 	struct __packed {
- 		uint32_t wl_wake_cycles       :  2; // Bits  1:0
-diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h
-index 7c0b5a49de..49a215aa71 100644
---- a/src/northbridge/intel/haswell/registers/mchbar.h
-+++ b/src/northbridge/intel/haswell/registers/mchbar.h
-@@ -20,6 +20,7 @@
- 
- #define DDR_DATA_TRAIN_FEEDBACK(ch, byte)	_DDRIO_C_R_B(0x0054, ch, 0, byte)
- 
-+#define DQ_CONTROL_1(ch, byte)			_DDRIO_C_R_B(0x0060, ch, 0, byte)
- #define DQ_CONTROL_2(ch, byte)			_DDRIO_C_R_B(0x0064, ch, 0, byte)
- #define DDR_DATA_OFFSET_TRAIN_ch_b(ch, byte)	_DDRIO_C_R_B(0x0070, ch, 0, byte)
- #define DQ_CONTROL_0(ch, byte)			_DDRIO_C_R_B(0x0074, ch, 0, byte)
-@@ -147,6 +148,8 @@
- #define QCLK_ch_LDAT_SDAT(ch)			_MCMAIN_C(0x42d4, ch)
- #define QCLK_ch_LDAT_DATA_IN_x(ch, x)		_MCMAIN_C_X(0x42dc, ch, x) /* x in 0 .. 1 */
- 
-+#define PM_THRT_CKE_MIN_ch(ch)			_MCMAIN_C(0x4328, ch)
-+
- #define REUT_GLOBAL_CTL				0x4800
- #define REUT_GLOBAL_ERR				0x4804
- 
-@@ -175,6 +178,8 @@
- 
- #define MCSCHEDS_DFT_MISC	0x4c30
- 
-+#define PM_PDWN_CONFIG		0x4cb0
-+
- #define REUT_ERR_DATA_STATUS	0x4ce0
- 
- #define REUT_MISC_CKE_CTRL	0x4d90
-@@ -186,8 +191,10 @@
- #define MAD_CHNL		0x5000 /* Address Decoder Channel Configuration */
- #define MAD_DIMM(ch)		(0x5004 + (ch) * 4)
- #define MAD_ZR			0x5014
-+#define MCDECS_CBIT		0x501c
- #define MC_INIT_STATE_G		0x5030
- #define MRC_REVISION		0x5034 /* MRC Revision */
-+#define PM_SREF_CONFIG		0x5060
- 
- #define RCOMP_TIMER		0x5084
- 
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0045-Haswell-NRI-Implement-fast-boot-path.patch b/config/coreboot/default/patches/0045-Haswell-NRI-Implement-fast-boot-path.patch
deleted file mode 100644
index af614a5f..00000000
--- a/config/coreboot/default/patches/0045-Haswell-NRI-Implement-fast-boot-path.patch
+++ /dev/null
@@ -1,722 +0,0 @@
-From b6b89013630d535b68a005cede9e2540f273f4e7 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sat, 13 Apr 2024 01:16:30 +0200
-Subject: [PATCH 45/51] Haswell NRI: Implement fast boot path
-
-When the memory configuration hasn't changed, there is no need to do
-full memory training. Instead, boot firmware can use saved training
-data to reinitialise the memory controller and memory.
-
-Unlike native RAM init for other platforms, Haswell does not save the
-main structure (the "mighty ctrl" struct) to flash. Instead, separate
-structures define the data to be saved, which can be smaller than the
-main structure.
-
-This makes S3 suspend and resume work: RAM contents MUST be preserved
-for a S3 resume to succeed, but RAM training destroys RAM contents.
-
-Change-Id: I06f6cd39ceecdca104fae89159f28e85cf7ff4e6
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/Makefile.mk  |   1 +
- .../haswell/native_raminit/activate_mc.c      |  17 +
- .../intel/haswell/native_raminit/ddr3.c       |  41 ++
- .../haswell/native_raminit/raminit_main.c     |  34 +-
- .../haswell/native_raminit/raminit_native.c   |  30 +-
- .../haswell/native_raminit/raminit_native.h   |  18 +
- .../haswell/native_raminit/save_restore.c     | 387 ++++++++++++++++++
- 7 files changed, 504 insertions(+), 24 deletions(-)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/save_restore.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-index d97da72890..8fdd17c542 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-@@ -13,6 +13,7 @@ romstage-y += raminit_main.c
- romstage-y += raminit_native.c
- romstage-y += ranges.c
- romstage-y += reut.c
-+romstage-y += save_restore.c
- romstage-y += setup_wdb.c
- romstage-y += spd_bitmunching.c
- romstage-y += testing_io.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/activate_mc.c b/src/northbridge/intel/haswell/native_raminit/activate_mc.c
-index 78a7ad27ef..0b3eb917da 100644
---- a/src/northbridge/intel/haswell/native_raminit/activate_mc.c
-+++ b/src/northbridge/intel/haswell/native_raminit/activate_mc.c
-@@ -333,6 +333,23 @@ enum raminit_status activate_mc(struct sysinfo *ctrl)
- 	return RAMINIT_STATUS_SUCCESS;
- }
- 
-+enum raminit_status normal_state(struct sysinfo *ctrl)
-+{
-+	/* Enable periodic COMP */
-+	mchbar_write32(M_COMP, (union pcu_comp_reg) {
-+		.comp_interval = COMP_INT,
-+	}.raw);
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		/* Set MC to normal mode and clean the ODT and CKE */
-+		mchbar_write32(REUT_ch_SEQ_CFG(channel), REUT_MODE_NOP << 12);
-+	}
-+	power_down_config(ctrl);
-+	return RAMINIT_STATUS_SUCCESS;
-+}
-+
- static void mc_lockdown(void)
- {
- 	/* Lock memory controller registers */
-diff --git a/src/northbridge/intel/haswell/native_raminit/ddr3.c b/src/northbridge/intel/haswell/native_raminit/ddr3.c
-index 6ddb11488b..9b6368edb1 100644
---- a/src/northbridge/intel/haswell/native_raminit/ddr3.c
-+++ b/src/northbridge/intel/haswell/native_raminit/ddr3.c
-@@ -2,6 +2,7 @@
- 
- #include <assert.h>
- #include <console/console.h>
-+#include <delay.h>
- #include <northbridge/intel/haswell/haswell.h>
- #include <types.h>
- 
-@@ -215,3 +216,43 @@ enum raminit_status ddr3_jedec_init(struct sysinfo *ctrl)
- 	ddr3_program_mr0(ctrl, 1);
- 	return reut_issue_zq(ctrl, ctrl->chanmap, ZQ_INIT);
- }
-+
-+enum raminit_status exit_selfrefresh(struct sysinfo *ctrl)
-+{
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		/* Fields in ctrl aren't populated on a warm boot */
-+		union ddr_data_control_0_reg data_control_0 = {
-+			.raw = mchbar_read32(DQ_CONTROL_0(channel, 0)),
-+		};
-+		data_control_0.read_rf_rd = 1;
-+		for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+			if (!rank_in_ch(ctrl, rank, channel))
-+				continue;
-+
-+			data_control_0.read_rf_rank = rank;
-+			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
-+		}
-+	}
-+
-+	/* Time needed to stabilize the DCLK (~6 us) */
-+	udelay(6);
-+
-+	/* Pull the DIMMs out of self refresh by asserting CKE high */
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		const union reut_misc_cke_ctrl_reg reut_misc_cke_ctrl = {
-+			.cke_on = ctrl->rankmap[channel],
-+		};
-+		mchbar_write32(REUT_ch_MISC_CKE_CTRL(channel), reut_misc_cke_ctrl.raw);
-+	}
-+	mchbar_write32(REUT_MISC_ODT_CTRL, 0);
-+
-+	const enum raminit_status status = reut_issue_zq(ctrl, ctrl->chanmap, ZQ_LONG);
-+	if (status) {
-+		/* ZQCL errors don't seem to be a fatal problem here */
-+		printk(BIOS_ERR, "ZQ Long failed during S3 resume or warm reset flow\n");
-+	}
-+	return RAMINIT_STATUS_SUCCESS;
-+}
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 3a65fb01fb..056dde1adc 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -64,6 +64,22 @@ static const struct task_entry cold_boot[] = {
- 	{ train_read_mpr,                                         true, "RDMPRT",     },
- 	{ train_jedec_write_leveling,                             true, "JWRL",       },
- 	{ activate_mc,                                            true, "ACTIVATE",   },
-+	{ save_training_values,                                   true, "SAVE_TRAIN", },
-+	{ save_non_training,                                      true, "SAVE_NONT",  },
-+	{ raminit_done,                                           true, "RAMINITEND", },
-+};
-+
-+static const struct task_entry fast_boot[] = {
-+	{ collect_spd_info,                                       true, "PROCSPD",    },
-+	{ restore_non_training,                                   true, "RST_NONT",   },
-+	{ initialise_mpll,                                        true, "INITMPLL",   },
-+	{ configure_mc,                                           true, "CONFMC",     },
-+	{ configure_memory_map,                                   true, "MEMMAP",     },
-+	{ do_jedec_init,                                          true, "JEDECINIT",  },
-+	{ pre_training,                                           true, "PRETRAIN",   },
-+	{ restore_training_values,                                true, "RST_TRAIN",  },
-+	{ exit_selfrefresh,                                       true, "EXIT_SR",    },
-+	{ normal_state,                                           true, "NORMALMODE", },
- 	{ raminit_done,                                           true, "RAMINITEND", },
- };
- 
-@@ -102,11 +118,11 @@ static void initialize_ctrl(struct sysinfo *ctrl)
- 	ctrl->bootmode = bootmode;
- }
- 
--static enum raminit_status try_raminit(struct sysinfo *ctrl)
-+static enum raminit_status try_raminit(
-+	struct sysinfo *ctrl,
-+	const struct task_entry *const schedule,
-+	const size_t length)
- {
--	const struct task_entry *const schedule = cold_boot;
--	const size_t length = ARRAY_SIZE(cold_boot);
--
- 	enum raminit_status status = RAMINIT_STATUS_UNSPECIFIED_ERROR;
- 
- 	for (size_t i = 0; i < length; i++) {
-@@ -140,8 +156,16 @@ void raminit_main(const enum raminit_boot_mode bootmode)
- 	mighty_ctrl.bootmode = bootmode;
- 	initialize_ctrl(&mighty_ctrl);
- 
-+	enum raminit_status status = RAMINIT_STATUS_UNSPECIFIED_ERROR;
-+
-+	if (bootmode != BOOTMODE_COLD) {
-+		status = try_raminit(&mighty_ctrl, fast_boot, ARRAY_SIZE(fast_boot));
-+		if (status == RAMINIT_STATUS_SUCCESS)
-+			return;
-+	}
-+
- 	/** TODO: Try more than once **/
--	enum raminit_status status = try_raminit(&mighty_ctrl);
-+	status = try_raminit(&mighty_ctrl, cold_boot, ARRAY_SIZE(cold_boot));
- 
- 	if (status != RAMINIT_STATUS_SUCCESS)
- 		die("Memory initialization was met with utmost failure and misery\n");
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-index 5f7ceec222..3ad8ce29e7 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-@@ -54,23 +54,17 @@ static bool early_init_native(enum raminit_boot_mode bootmode)
- 	return cpu_replaced;
- }
- 
--#define MRC_CACHE_VERSION 1
--
--struct mrc_data {
--	const void *buffer;
--	size_t buffer_len;
--};
--
--static void save_mrc_data(struct mrc_data *md)
-+static void save_mrc_data(void)
- {
--	mrc_cache_stash_data(MRC_TRAINING_DATA, MRC_CACHE_VERSION, md->buffer, md->buffer_len);
-+	mrc_cache_stash_data(MRC_TRAINING_DATA, reg_frame_rev(),
-+			     reg_frame_ptr(), reg_frame_size());
- }
- 
- static struct mrc_data prepare_mrc_cache(void)
- {
- 	struct mrc_data md = {0};
- 	md.buffer = mrc_cache_current_mmap_leak(MRC_TRAINING_DATA,
--						MRC_CACHE_VERSION,
-+						reg_frame_rev(),
- 						&md.buffer_len);
- 	return md;
- }
-@@ -94,14 +88,15 @@ static void raminit_reset(void)
- }
- 
- static enum raminit_boot_mode do_actual_raminit(
--	struct mrc_data *md,
- 	const bool s3resume,
- 	const bool cpu_replaced,
- 	const enum raminit_boot_mode orig_bootmode)
- {
-+	struct mrc_data md = prepare_mrc_cache();
-+
- 	enum raminit_boot_mode bootmode = orig_bootmode;
- 
--	bool save_data_valid = md->buffer && md->buffer_len == USHRT_MAX; /** TODO: sizeof() **/
-+	bool save_data_valid = md.buffer && md.buffer_len == reg_frame_size();
- 
- 	if (s3resume) {
- 		if (bootmode == BOOTMODE_COLD) {
-@@ -154,7 +149,7 @@ static enum raminit_boot_mode do_actual_raminit(
- 	assert(save_data_valid != (bootmode == BOOTMODE_COLD));
- 	if (save_data_valid) {
- 		printk(BIOS_INFO, "Using cached memory parameters\n");
--		die("RAMINIT: Fast boot is not yet implemented\n");
-+		memcpy(reg_frame_ptr(), md.buffer, reg_frame_size());
- 	}
- 	printk(RAM_DEBUG, "Initial bootmode: %s\n", bm_names[orig_bootmode]);
- 	printk(RAM_DEBUG, "Current bootmode: %s\n", bm_names[bootmode]);
-@@ -181,10 +176,8 @@ void perform_raminit(const int s3resume)
- 	wait_txt_clear();
- 	wrmsr(0x2e6, (msr_t) {.lo = 0, .hi = 0});
- 
--	struct mrc_data md = prepare_mrc_cache();
--
- 	const enum raminit_boot_mode bootmode =
--			do_actual_raminit(&md, s3resume, cpu_replaced, orig_bootmode);
-+			do_actual_raminit(s3resume, cpu_replaced, orig_bootmode);
- 
- 	/** TODO: report_memory_config **/
- 
-@@ -212,9 +205,8 @@ void perform_raminit(const int s3resume)
- 	}
- 
- 	/* Save training data on non-S3 resumes */
--	/** TODO: Enable this once training data is populated **/
--	if (0 && !s3resume)
--		save_mrc_data(&md);
-+	if (!s3resume)
-+		save_mrc_data();
- 
- 	/** TODO: setup_sdram_meminfo **/
- }
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index a0a913f926..2ac16eaad3 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -170,6 +170,8 @@ enum regfile_mode {
- 	REG_FILE_USE_CURRENT,	/* Used when changing parameters after the test */
- };
- 
-+struct register_save_frame;
-+
- struct wdb_pat {
- 	uint32_t start_ptr;	/* Starting pointer in WDB */
- 	uint32_t stop_ptr;	/* Stopping pointer in WDB */
-@@ -220,6 +222,7 @@ enum raminit_status {
- 	RAMINIT_STATUS_RCVEN_FAILURE,
- 	RAMINIT_STATUS_RMPR_FAILURE,
- 	RAMINIT_STATUS_JWRL_FAILURE,
-+	RAMINIT_STATUS_INVALID_CACHE,
- 	RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
- };
- 
-@@ -229,6 +232,11 @@ enum generic_stepping {
- 	STEPPING_C0 = 3,
- };
- 
-+struct mrc_data {
-+	const void *buffer;
-+	size_t buffer_len;
-+};
-+
- struct raminit_dimm_info {
- 	spd_ddr3_raw_data raw_spd;
- 	struct dimm_attr_ddr3_st data;
-@@ -448,12 +456,22 @@ enum raminit_status do_jedec_init(struct sysinfo *ctrl);
- enum raminit_status train_receive_enable(struct sysinfo *ctrl);
- enum raminit_status train_read_mpr(struct sysinfo *ctrl);
- enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl);
-+enum raminit_status save_training_values(struct sysinfo *ctrl);
-+enum raminit_status restore_training_values(struct sysinfo *ctrl);
-+enum raminit_status save_non_training(struct sysinfo *ctrl);
-+enum raminit_status restore_non_training(struct sysinfo *ctrl);
-+enum raminit_status exit_selfrefresh(struct sysinfo *ctrl);
-+enum raminit_status normal_state(struct sysinfo *ctrl);
- enum raminit_status activate_mc(struct sysinfo *ctrl);
- enum raminit_status raminit_done(struct sysinfo *ctrl);
- 
- void configure_timings(struct sysinfo *ctrl);
- void configure_refresh(struct sysinfo *ctrl);
- 
-+struct register_save_frame *reg_frame_ptr(void);
-+size_t reg_frame_size(void);
-+uint32_t reg_frame_rev(void);
-+
- uint32_t get_tCKE(uint32_t mem_clock_mhz, bool lpddr);
- uint32_t get_tXPDLL(uint32_t mem_clock_mhz);
- uint32_t get_tAONPD(uint32_t mem_clock_mhz);
-diff --git a/src/northbridge/intel/haswell/native_raminit/save_restore.c b/src/northbridge/intel/haswell/native_raminit/save_restore.c
-new file mode 100644
-index 0000000000..f1f50e3ff8
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/save_restore.c
-@@ -0,0 +1,387 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <assert.h>
-+#include <console/console.h>
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+
-+uint32_t reg_frame_rev(void)
-+{
-+	/*
-+	 * Equivalent to MRC_CACHE_REVISION, but hidden via abstraction.
-+	 * The structures that get saved to flash are contained within
-+	 * this translation unit, so changes outside this file shouldn't
-+	 * require invalidating the cache.
-+	 */
-+	return 1;
-+}
-+
-+struct register_save {
-+	uint16_t lower;
-+	uint16_t upper;
-+};
-+
-+/** TODO: Haswell DDRIO aliases writes: 0x80 .. 0xff => 0x00 .. 0x7f **/
-+static const struct register_save ddrio_per_byte_list[] = {
-+	{0x0000, 0x003c}, /* 16 registers */
-+//	{0x0048, 0x0084}, /* 16 registers */	/** TODO: BDW support **/
-+	{0x0048, 0x004c}, /*  2 registers */
-+	{0x005c, 0x0078}, /*  8 registers */
-+};
-+#define DDRIO_PER_BYTE_REGISTER_COUNT	(16 + 2 + 8)
-+
-+static const struct register_save ddrio_per_ch_list[] = {
-+	/* CKE */
-+	{0x1204, 0x1208}, /* 2 registers */
-+	{0x1214, 0x121c}, /* 3 registers */
-+	/* CMD North */
-+	{0x1404, 0x140c}, /* 3 registers */
-+	/* CLK */
-+	{0x1808, 0x1810}, /* 3 registers */
-+	/* CMD South */
-+	{0x1a04, 0x1a0c}, /* 3 registers */
-+	/* CTL */
-+	{0x1c14, 0x1c1c}, /* 3 registers */
-+};
-+#define DDRIO_PER_CH_REGISTER_COUNT	(2 + 3 * 5)
-+
-+static const struct register_save ddrio_common_list[] = {
-+	{0x2000, 0x2008}, /* 3 registers */
-+	{0x3a14, 0x3a1c}, /* 3 registers */
-+	{0x3a24, 0x3a24}, /* 1 registers */
-+};
-+
-+#define DDRIO_COMMON_REGISTER_COUNT	(3 + 3 + 1)
-+
-+static const struct register_save mcmain_per_ch_list[] = {
-+	{0x4000, 0x4014}, /* 6 registers */
-+	{0x4024, 0x4028}, /* 2 registers */
-+	{0x40d0, 0x40d0}, /* 1 registers */
-+	{0x4220, 0x4224}, /* 2 registers */
-+	{0x4294, 0x4294}, /* 1 registers */
-+	{0x429c, 0x42a0}, /* 2 registers */
-+	{0x42ec, 0x42fc}, /* 5 registers */
-+	{0x4328, 0x4328}, /* 1 registers */
-+	{0x438c, 0x4390}, /* 2 registers */
-+};
-+#define MCMAIN_PER_CH_REGISTER_COUNT	(6 + 2 + 1 + 2 + 1 + 2 + 5 + 1 + 2)
-+
-+static const struct register_save misc_common_list[] = {
-+	{0x5884, 0x5888}, /*  2 registers */
-+	{0x5890, 0x589c}, /*  4 registers */
-+	{0x58a4, 0x58a4}, /*  1 registers */
-+	{0x58d0, 0x58e4}, /*  6 registers */
-+	{0x5880, 0x5880}, /*  1 registers */
-+	{0x5000, 0x50dc}, /* 56 registers */
-+	{0x59b8, 0x59b8}  /*  1 registers */
-+};
-+#define MISC_COMMON_REGISTER_COUNT	(2 + 4 + 1 + 6 + 1 + 56 + 1)
-+
-+struct save_params {
-+	bool is_initialised;
-+
-+	/* Memory base frequency, either 100 or 133 MHz */
-+	uint8_t base_freq;
-+
-+	/* Multiplier */
-+	uint32_t multiplier;
-+
-+	/* Memory clock in MHz */
-+	uint32_t mem_clock_mhz;
-+
-+	/* Memory clock in femtoseconds */
-+	uint32_t mem_clock_fs;
-+
-+	/* Quadrature clock in picoseconds */
-+	uint16_t qclkps;
-+
-+	/* Bitfield of supported CAS latencies */
-+	uint16_t cas_supported;
-+
-+	/* CPUID value */
-+	uint32_t cpu;
-+
-+	/* Cached CPU stepping value */
-+	uint8_t stepping;
-+
-+	uint16_t vdd_mv;
-+
-+	union dimm_flags_ddr3_st flags;
-+
-+	/* Except for tCK, everything is stored in DCLKs */
-+	uint32_t tCK;
-+	uint32_t tAA;
-+	uint32_t tWR;
-+	uint32_t tRCD;
-+	uint32_t tRRD;
-+	uint32_t tRP;
-+	uint32_t tRAS;
-+	uint32_t tRC;
-+	uint32_t tRFC;
-+	uint32_t tWTR;
-+	uint32_t tRTP;
-+	uint32_t tFAW;
-+	uint32_t tCWL;
-+	uint32_t tCMD;
-+
-+	uint32_t tREFI;
-+	uint32_t tXP;
-+
-+	uint8_t lpddr_cke_rank_map[NUM_CHANNELS];
-+
-+	struct raminit_dimm_info dimms[NUM_CHANNELS][NUM_SLOTS];
-+
-+	uint8_t chanmap;
-+
-+	uint32_t channel_size_mb[NUM_CHANNELS];
-+
-+	/* DIMMs per channel */
-+	uint8_t dpc[NUM_CHANNELS];
-+
-+	uint8_t rankmap[NUM_CHANNELS];
-+
-+	/* Whether a rank is mirrored or not (only rank 1 of each DIMM can be) */
-+	uint8_t rank_mirrored[NUM_CHANNELS];
-+
-+	/*
-+	 * FIXME: LPDDR support is incomplete. The largest chunks are missing,
-+	 * but some LPDDR-specific variations in algorithms have been handled.
-+	 * LPDDR-specific functions have stubs which will halt upon execution.
-+	 */
-+	bool lpddr;
-+
-+	uint8_t lanes;
-+
-+	/* FIXME: ECC support missing */
-+	bool is_ecc;
-+};
-+
-+struct register_save_frame {
-+	uint32_t ddrio_per_byte[NUM_CHANNELS][NUM_LANES][DDRIO_PER_BYTE_REGISTER_COUNT];
-+	uint32_t ddrio_per_ch[NUM_CHANNELS][DDRIO_PER_CH_REGISTER_COUNT];
-+	uint32_t ddrio_common[DDRIO_COMMON_REGISTER_COUNT];
-+	uint32_t mcmain_per_ch[NUM_CHANNELS][MCMAIN_PER_CH_REGISTER_COUNT];
-+	uint32_t misc_common[MISC_COMMON_REGISTER_COUNT];
-+	struct save_params params;
-+};
-+
-+struct register_save_frame *reg_frame_ptr(void)
-+{
-+	/* The chonky register save frame struct, used for fast boot and S3 resume */
-+	static struct register_save_frame register_frame = { 0 };
-+	return &register_frame;
-+}
-+
-+size_t reg_frame_size(void)
-+{
-+	return sizeof(struct register_save_frame);
-+}
-+
-+typedef void (*reg_func_t)(const uint16_t offset, uint32_t *const value);
-+
-+static void save_value(const uint16_t offset, uint32_t *const value)
-+{
-+	*value = mchbar_read32(offset);
-+}
-+
-+static void restore_value(const uint16_t offset, uint32_t *const value)
-+{
-+	mchbar_write32(offset, *value);
-+}
-+
-+static void save_restore(
-+	uint32_t *reg_frame,
-+	const uint16_t g_offset,
-+	const struct register_save *reg_save_list,
-+	const size_t reg_save_length,
-+	reg_func_t handle_reg)
-+{
-+	for (size_t i = 0; i < reg_save_length; i++) {
-+		const struct register_save *entry = &reg_save_list[i];
-+		for (uint16_t offset = entry->lower; offset <= entry->upper; offset += 4) {
-+			handle_reg(offset + g_offset, reg_frame++);
-+		}
-+	}
-+}
-+
-+static void save_restore_all(struct register_save_frame *reg_frame, reg_func_t handle_reg)
-+{
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		for (uint8_t byte = 0; byte < NUM_LANES; byte++) {
-+			const uint16_t g_offset = _DDRIO_C_R_B(0, channel, 0, byte);
-+			save_restore(
-+				reg_frame->ddrio_per_byte[channel][byte],
-+				g_offset,
-+				ddrio_per_byte_list,
-+				ARRAY_SIZE(ddrio_per_byte_list),
-+				handle_reg);
-+		}
-+	}
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		const uint16_t g_offset = _DDRIO_C_R_B(0, channel, 0, 0);
-+		save_restore(
-+			reg_frame->ddrio_per_ch[channel],
-+			g_offset,
-+			ddrio_per_ch_list,
-+			ARRAY_SIZE(ddrio_per_ch_list),
-+			handle_reg);
-+	}
-+	save_restore(
-+		reg_frame->ddrio_common,
-+		0,
-+		ddrio_common_list,
-+		ARRAY_SIZE(ddrio_common_list),
-+		handle_reg);
-+
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		const uint16_t g_offset = _MCMAIN_C(0, channel);
-+		save_restore(
-+			reg_frame->mcmain_per_ch[channel],
-+			g_offset,
-+			mcmain_per_ch_list,
-+			ARRAY_SIZE(mcmain_per_ch_list),
-+			handle_reg);
-+	}
-+	save_restore(
-+		reg_frame->misc_common,
-+		0,
-+		misc_common_list,
-+		ARRAY_SIZE(misc_common_list),
-+		handle_reg);
-+}
-+
-+enum raminit_status save_training_values(struct sysinfo *ctrl)
-+{
-+	save_restore_all(reg_frame_ptr(), save_value);
-+	return RAMINIT_STATUS_SUCCESS;
-+}
-+
-+enum raminit_status restore_training_values(struct sysinfo *ctrl)
-+{
-+	save_restore_all(reg_frame_ptr(), restore_value);
-+	return RAMINIT_STATUS_SUCCESS;
-+}
-+
-+enum raminit_status save_non_training(struct sysinfo *ctrl)
-+{
-+	struct register_save_frame *reg_frame = reg_frame_ptr();
-+	struct save_params *params = &reg_frame->params;
-+
-+	params->is_initialised = true;
-+
-+	params->base_freq     = ctrl->base_freq;
-+	params->multiplier    = ctrl->multiplier;
-+	params->mem_clock_mhz = ctrl->mem_clock_mhz;
-+	params->mem_clock_fs  = ctrl->mem_clock_fs;
-+	params->qclkps        = ctrl->qclkps;
-+	params->cas_supported = ctrl->cas_supported;
-+	params->cpu           = ctrl->cpu;
-+	params->stepping      = ctrl->stepping;
-+	params->vdd_mv        = ctrl->vdd_mv;
-+	params->flags         = ctrl->flags;
-+
-+	params->tCK       = ctrl->tCK;
-+	params->tAA       = ctrl->tAA;
-+	params->tWR       = ctrl->tWR;
-+	params->tRCD      = ctrl->tRCD;
-+	params->tRRD      = ctrl->tRRD;
-+	params->tRP       = ctrl->tRP;
-+	params->tRAS      = ctrl->tRAS;
-+	params->tRC       = ctrl->tRC;
-+	params->tRFC      = ctrl->tRFC;
-+	params->tWTR      = ctrl->tWTR;
-+	params->tRTP      = ctrl->tRTP;
-+	params->tFAW      = ctrl->tFAW;
-+	params->tCWL      = ctrl->tCWL;
-+	params->tCMD      = ctrl->tCMD;
-+	params->tREFI     = ctrl->tREFI;
-+	params->tXP       = ctrl->tXP;
-+
-+	params->chanmap = ctrl->chanmap;
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		params->lpddr_cke_rank_map[channel] = ctrl->lpddr_cke_rank_map[channel];
-+		for (uint8_t slot = 0; slot < NUM_SLOTS; slot++)
-+			params->dimms[channel][slot] = ctrl->dimms[channel][slot];
-+	}
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		params->dpc[channel] = ctrl->dpc[channel];
-+		params->rankmap[channel] = ctrl->rankmap[channel];
-+		params->rank_mirrored[channel] = ctrl->rank_mirrored[channel];
-+		params->channel_size_mb[channel] = ctrl->channel_size_mb[channel];
-+	}
-+	params->lpddr = ctrl->lpddr;
-+	params->lanes = ctrl->lanes;
-+	params->is_ecc = ctrl->is_ecc;
-+	return RAMINIT_STATUS_SUCCESS;
-+}
-+
-+#define RAMINIT_COMPARE(_s1, _s2) \
-+	((sizeof(_s1) == sizeof(_s2)) && !memcmp(_s1, _s2, sizeof(_s1)))
-+
-+enum raminit_status restore_non_training(struct sysinfo *ctrl)
-+{
-+	struct register_save_frame *reg_frame = reg_frame_ptr();
-+	struct save_params *params = &reg_frame->params;
-+
-+	if (!params->is_initialised) {
-+		printk(BIOS_WARNING, "Cannot fast boot: saved data is invalid\n");
-+		return RAMINIT_STATUS_INVALID_CACHE;
-+	}
-+
-+	if (!RAMINIT_COMPARE(ctrl->dimms, params->dimms)) {
-+		printk(BIOS_WARNING, "Cannot fast boot: DIMMs have changed\n");
-+		return RAMINIT_STATUS_INVALID_CACHE;
-+	}
-+
-+	if (ctrl->cpu != params->cpu) {
-+		printk(BIOS_WARNING, "Cannot fast boot: CPU has changed\n");
-+		return RAMINIT_STATUS_INVALID_CACHE;
-+	}
-+
-+	ctrl->base_freq     = params->base_freq;
-+	ctrl->multiplier    = params->multiplier;
-+	ctrl->mem_clock_mhz = params->mem_clock_mhz;
-+	ctrl->mem_clock_fs  = params->mem_clock_fs;
-+	ctrl->qclkps        = params->qclkps;
-+	ctrl->cas_supported = params->cas_supported;
-+	ctrl->cpu           = params->cpu;
-+	ctrl->stepping      = params->stepping;
-+	ctrl->vdd_mv        = params->vdd_mv;
-+	ctrl->flags         = params->flags;
-+
-+	ctrl->tCK       = params->tCK;
-+	ctrl->tAA       = params->tAA;
-+	ctrl->tWR       = params->tWR;
-+	ctrl->tRCD      = params->tRCD;
-+	ctrl->tRRD      = params->tRRD;
-+	ctrl->tRP       = params->tRP;
-+	ctrl->tRAS      = params->tRAS;
-+	ctrl->tRC       = params->tRC;
-+	ctrl->tRFC      = params->tRFC;
-+	ctrl->tWTR      = params->tWTR;
-+	ctrl->tRTP      = params->tRTP;
-+	ctrl->tFAW      = params->tFAW;
-+	ctrl->tCWL      = params->tCWL;
-+	ctrl->tCMD      = params->tCMD;
-+	ctrl->tREFI     = params->tREFI;
-+	ctrl->tXP       = params->tXP;
-+
-+	ctrl->chanmap = params->chanmap;
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		ctrl->lpddr_cke_rank_map[channel] = params->lpddr_cke_rank_map[channel];
-+		for (uint8_t slot = 0; slot < NUM_SLOTS; slot++)
-+			ctrl->dimms[channel][slot] = params->dimms[channel][slot];
-+	}
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		ctrl->dpc[channel] = params->dpc[channel];
-+		ctrl->rankmap[channel] = params->rankmap[channel];
-+		ctrl->rank_mirrored[channel] = params->rank_mirrored[channel];
-+		ctrl->channel_size_mb[channel] = params->channel_size_mb[channel];
-+	}
-+	ctrl->lpddr = params->lpddr;
-+	ctrl->lanes = params->lanes;
-+	ctrl->is_ecc = params->is_ecc;
-+	return RAMINIT_STATUS_SUCCESS;
-+}
--- 
-2.39.5
-
diff --git a/config/coreboot/default/patches/0046-haswell-NRI-Do-sense-amplifier-offset-training.patch b/config/coreboot/default/patches/0046-haswell-NRI-Do-sense-amplifier-offset-training.patch
deleted file mode 100644
index c0945df9..00000000
--- a/config/coreboot/default/patches/0046-haswell-NRI-Do-sense-amplifier-offset-training.patch
+++ /dev/null
@@ -1,476 +0,0 @@
-From 02aa0c5612388e35f5dd1ff9c5f7a7b5b48fb9c0 Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Wed, 17 Apr 2024 13:20:32 +0200
-Subject: [PATCH 46/51] haswell NRI: Do sense amplifier offset training
-
-Quoting Wikipedia:
-
-  A sense amplifier is a circuit that is used to amplify and detect
-  small signals in electronic systems. It is commonly used in memory
-  circuits, such as dynamic random access memory (DRAM), to read and
-  amplify the weak signals stored in memory cells.
-
-In this case, we're calibrating the sense amplifiers in the memory
-controller. This training procedure uses a magic "sense amp offset
-cancel" mode of the DDRIO to observe the sampled logic levels, and
-sweeps Vref to find the low-high transition for each bit lane. The
-procedure consists of two stages: the first stage centers per-byte
-Vref (to ensure per-bit Vref offsets are as small as possible) and
-the second stage centers per-bit Vref.
-
-Because this procedure uses the "sense amp offset cancel" mode, it
-does not rely on DRAM being trained. It is assumed that the memory
-controller simply makes sense amp output levels observable via the
-`DDR_DATA_TRAIN_FEEDBACK` register and that the memory bus is idle
-during this training step (so the lane voltage is Vdd / 2).
-
-Note: This procedure will need to be adapted for Broadwell because
-it has per-rank per-bit RxVref registers, whereas Haswell only has
-a single per-bit RxVref register for all ranks.
-
-Change-Id: Ia07db68763f90e9701c8a376e01279ada8dbbe07
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/Makefile.mk  |   1 +
- .../haswell/native_raminit/raminit_main.c     |   1 +
- .../haswell/native_raminit/raminit_native.h   |  12 +
- .../native_raminit/train_sense_amp_offset.c   | 341 ++++++++++++++++++
- .../intel/haswell/registers/mchbar.h          |   2 +
- 5 files changed, 357 insertions(+)
- create mode 100644 src/northbridge/intel/haswell/native_raminit/train_sense_amp_offset.c
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-index 8fdd17c542..4bd668a2d6 100644
---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk
-@@ -21,3 +21,4 @@ romstage-y += timings_refresh.c
- romstage-y += train_jedec_write_leveling.c
- romstage-y += train_read_mpr.c
- romstage-y += train_receive_enable.c
-+romstage-y += train_sense_amp_offset.c
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-index 056dde1adc..ce637e2d03 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c
-@@ -60,6 +60,7 @@ static const struct task_entry cold_boot[] = {
- 	{ configure_memory_map,                                   true, "MEMMAP",     },
- 	{ do_jedec_init,                                          true, "JEDECINIT",  },
- 	{ pre_training,                                           true, "PRETRAIN",   },
-+	{ train_sense_amp_offset,                                 true, "SOT",        },
- 	{ train_receive_enable,                                   true, "RCVET",      },
- 	{ train_read_mpr,                                         true, "RDMPRT",     },
- 	{ train_jedec_write_leveling,                             true, "JWRL",       },
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 2ac16eaad3..07eea98831 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -23,6 +23,8 @@
- #define NUM_LANES		9
- #define NUM_LANES_NO_ECC	8
- 
-+#define NUM_BITS		8
-+
- #define COMP_INT		10
- 
- /* Always use 12 legs for emphasis (not trained) */
-@@ -219,6 +221,7 @@ enum raminit_status {
- 	RAMINIT_STATUS_MPLL_INIT_FAILURE,
- 	RAMINIT_STATUS_POLL_TIMEOUT,
- 	RAMINIT_STATUS_REUT_ERROR,
-+	RAMINIT_STATUS_SAMP_OFFSET_FAILURE,
- 	RAMINIT_STATUS_RCVEN_FAILURE,
- 	RAMINIT_STATUS_RMPR_FAILURE,
- 	RAMINIT_STATUS_JWRL_FAILURE,
-@@ -244,6 +247,12 @@ struct raminit_dimm_info {
- 	bool valid;
- };
- 
-+struct vref_margin {
-+	uint8_t low;
-+	uint8_t center;
-+	uint8_t high;
-+};
-+
- struct sysinfo {
- 	enum raminit_boot_mode bootmode;
- 	enum generic_stepping stepping;
-@@ -331,6 +340,8 @@ struct sysinfo {
- 	uint8_t rxdqsn[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES];
- 	int8_t  rxvref[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES];
- 
-+	struct vref_margin rxdqvrefpb[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES][NUM_BITS];
-+
- 	uint8_t clk_pi_code[NUM_CHANNELS][NUM_SLOTRANKS];
- 	uint8_t ctl_pi_code[NUM_CHANNELS][NUM_SLOTRANKS];
- 	uint8_t cke_pi_code[NUM_CHANNELS][NUM_SLOTRANKS];
-@@ -453,6 +464,7 @@ enum raminit_status convert_timings(struct sysinfo *ctrl);
- enum raminit_status configure_mc(struct sysinfo *ctrl);
- enum raminit_status configure_memory_map(struct sysinfo *ctrl);
- enum raminit_status do_jedec_init(struct sysinfo *ctrl);
-+enum raminit_status train_sense_amp_offset(struct sysinfo *ctrl);
- enum raminit_status train_receive_enable(struct sysinfo *ctrl);
- enum raminit_status train_read_mpr(struct sysinfo *ctrl);
- enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl);
-diff --git a/src/northbridge/intel/haswell/native_raminit/train_sense_amp_offset.c b/src/northbridge/intel/haswell/native_raminit/train_sense_amp_offset.c
-new file mode 100644
-index 0000000000..d4f199fefb
---- /dev/null
-+++ b/src/northbridge/intel/haswell/native_raminit/train_sense_amp_offset.c
-@@ -0,0 +1,341 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <assert.h>
-+#include <commonlib/bsd/clamp.h>
-+#include <console/console.h>
-+#include <delay.h>
-+#include <lib.h>
-+#include <types.h>
-+
-+#include "raminit_native.h"
-+
-+#define VREF_OFFSET_PLOT	RAM_DEBUG
-+#define SAMP_OFFSET_PLOT	RAM_DEBUG
-+
-+struct vref_train_data {
-+	int8_t best_sum;
-+	int8_t best_vref;
-+	int8_t sum_bits;
-+	uint8_t high_mask;
-+	uint8_t low_mask;
-+};
-+
-+static enum raminit_status train_vref_offset(struct sysinfo *ctrl)
-+{
-+	const int8_t vref_start = -15;
-+	const int8_t vref_stop  = 15;
-+	const struct vref_train_data initial_vref_values = {
-+		.best_sum  = -NUM_LANES,
-+		.best_vref = 0,
-+		.high_mask = 0,
-+		.low_mask  = 0xff,
-+	};
-+	struct vref_train_data vref_data[NUM_CHANNELS][NUM_LANES];
-+
-+	printk(VREF_OFFSET_PLOT, "Plot of sum_bits across Vref settings\nChannel");
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		printk(VREF_OFFSET_PLOT, "\t%u\t\t", channel);
-+	}
-+
-+	printk(VREF_OFFSET_PLOT, "\nByte");
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		printk(VREF_OFFSET_PLOT, "\t");
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+			printk(VREF_OFFSET_PLOT, "%u ", byte);
-+			vref_data[channel][byte] = initial_vref_values;
-+			union ddr_data_control_2_reg data_control_2 = {
-+				.raw = ctrl->dq_control_2[channel][byte],
-+			};
-+			data_control_2.force_bias_on = 1;
-+			data_control_2.force_rx_on   = 1;
-+			mchbar_write32(DQ_CONTROL_2(channel, byte), data_control_2.raw);
-+		}
-+	}
-+
-+	/* Sweep through Vref settings and find point SampOffset of +/- 7 passes */
-+	printk(VREF_OFFSET_PLOT, "\n1/2 Vref");
-+	for (int8_t vref = vref_start; vref <= vref_stop; vref++) {
-+		printk(VREF_OFFSET_PLOT, "\n% 3d", vref);
-+
-+		/*
-+		 * To perform this test, enable offset cancel mode and enable ODT.
-+		 * Check results and update variables. Ideal result is all zeroes.
-+		 * Clear offset cancel mode at end of test to write RX_OFFSET_VDQ.
-+		 */
-+		change_1d_margin_multicast(ctrl, RdV, vref, 0, false, REG_FILE_USE_RANK);
-+
-+		/* Program settings for Vref and SampOffset = 7 (8 + 7) */
-+		mchbar_write32(DDR_DATA_RX_OFFSET_VDQ, 0xffffffff);
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!does_ch_exist(ctrl, channel))
-+				continue;
-+
-+			/* Propagate delay values (without a read command) */
-+			union ddr_data_control_0_reg data_control_0 = {
-+				.raw = ctrl->dq_control_0[channel],
-+			};
-+			data_control_0.read_rf_rd      = 1;
-+			data_control_0.read_rf_wr      = 0;
-+			data_control_0.read_rf_rank    = 0;
-+			data_control_0.force_odt_on    = 1;
-+			data_control_0.samp_train_mode = 1;
-+			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
-+			udelay(1);
-+			data_control_0.samp_train_mode = 0;
-+			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+				const uint8_t feedback = get_data_train_feedback(channel, byte);
-+				struct vref_train_data *curr_data = &vref_data[channel][byte];
-+				curr_data->low_mask &= feedback;
-+				curr_data->sum_bits = -popcnt(feedback);
-+			}
-+		}
-+
-+		/* Program settings for Vref and SampOffset = -7 (8 - 7) */
-+		mchbar_write32(DDR_DATA_RX_OFFSET_VDQ, 0x11111111);
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!does_ch_exist(ctrl, channel))
-+				continue;
-+
-+			/* Propagate delay values (without a read command) */
-+			union ddr_data_control_0_reg data_control_0 = {
-+				.raw = ctrl->dq_control_0[channel],
-+			};
-+			data_control_0.read_rf_rd      = 1;
-+			data_control_0.read_rf_wr      = 0;
-+			data_control_0.read_rf_rank    = 0;
-+			data_control_0.force_odt_on    = 1;
-+			data_control_0.samp_train_mode = 1;
-+			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
-+			udelay(1);
-+			data_control_0.samp_train_mode = 0;
-+			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
-+			printk(VREF_OFFSET_PLOT, "\t");
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+				const uint8_t feedback = get_data_train_feedback(channel, byte);
-+				struct vref_train_data *curr_data = &vref_data[channel][byte];
-+				curr_data->high_mask |= feedback;
-+				curr_data->sum_bits += popcnt(feedback);
-+				printk(VREF_OFFSET_PLOT, "%d ", curr_data->sum_bits);
-+				if (curr_data->sum_bits > curr_data->best_sum) {
-+					curr_data->best_sum  = curr_data->sum_bits;
-+					curr_data->best_vref = vref;
-+					ctrl->rxvref[channel][0][byte] = vref;
-+				} else if (curr_data->sum_bits == curr_data->best_sum) {
-+					curr_data->best_vref = vref;
-+				}
-+			}
-+		}
-+	}
-+	printk(BIOS_DEBUG, "\n\nHi-Lo (XOR):");
-+	enum raminit_status status = RAMINIT_STATUS_SUCCESS;
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		printk(BIOS_DEBUG, "\n  C%u:", channel);
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+			struct vref_train_data *const curr_data = &vref_data[channel][byte];
-+			const uint8_t bit_xor = curr_data->high_mask ^ curr_data->low_mask;
-+			printk(BIOS_DEBUG, "\t0x%02x", bit_xor);
-+			if (bit_xor == 0xff)
-+				continue;
-+
-+			/* Report an error if any bit did not change */
-+			status = RAMINIT_STATUS_SAMP_OFFSET_FAILURE;
-+		}
-+	}
-+	if (status)
-+		printk(BIOS_ERR, "\nUnexpected bit error in Vref offset training\n");
-+
-+	printk(BIOS_DEBUG, "\n\nRdVref:");
-+	change_1d_margin_multicast(ctrl, RdV, 0, 0, false, REG_FILE_USE_RANK);
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		printk(BIOS_DEBUG, "\n  C%u:", channel);
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+			struct vref_train_data *const curr_data = &vref_data[channel][byte];
-+			const int8_t vref_width =
-+				curr_data->best_vref - ctrl->rxvref[channel][0][byte];
-+
-+			/*
-+			 * Step size for Rx Vref in DATA_OFFSET_TRAIN is about 3.9 mV
-+			 * whereas Rx Vref step size in RX_TRAIN_RANK is about 7.8 mV
-+			 */
-+			int8_t vref = ctrl->rxvref[channel][0][byte] + vref_width / 2;
-+			if (vref < 0)
-+				vref--;
-+			else
-+				vref++;
-+
-+			for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) {
-+				if (!rank_in_ch(ctrl, rank, channel))
-+					continue;
-+
-+				ctrl->rxvref[channel][rank][byte] = vref / 2;
-+				update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0);
-+			}
-+			printk(BIOS_DEBUG, "\t% 4d", ctrl->rxvref[channel][0][byte]);
-+		}
-+	}
-+	printk(BIOS_DEBUG, "\n\n");
-+	return status;
-+}
-+
-+/**
-+ * LPDDR has an additional bit for DQS per each byte.
-+ *
-+ * TODO: The DQS value must be written into Data Control 2.
-+ */
-+#define NUM_OFFSET_TRAIN_BITS	(NUM_BITS + 1)
-+
-+#define PLOT_CH_SPACE		"  "
-+
-+struct samp_train_data {
-+	uint8_t first_zero;
-+	uint8_t last_one;
-+};
-+
-+static void train_samp_offset(struct sysinfo *ctrl)
-+{
-+	const uint8_t max_train_bits = ctrl->lpddr ? NUM_OFFSET_TRAIN_BITS : NUM_BITS;
-+
-+	struct samp_train_data samp_data[NUM_CHANNELS][NUM_LANES][NUM_OFFSET_TRAIN_BITS] = {0};
-+
-+	printk(BIOS_DEBUG, "Channel ");
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		printk(BIOS_DEBUG, "%u ", channel); /* Same length as PLOT_CH_SPACE */
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+			printk(BIOS_DEBUG, "        %s ", ctrl->lpddr ? " " : "");
-+	}
-+	printk(BIOS_DEBUG, "\nByte    ");
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+			printk(BIOS_DEBUG, "%u       %s ", byte, ctrl->lpddr ? " " : "");
-+
-+		printk(BIOS_DEBUG, PLOT_CH_SPACE);
-+	}
-+	printk(SAMP_OFFSET_PLOT, "\nBits    ");
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+			printk(SAMP_OFFSET_PLOT, "01234567%s ", ctrl->lpddr ? "S" : "");
-+
-+		printk(SAMP_OFFSET_PLOT, PLOT_CH_SPACE);
-+	}
-+	printk(SAMP_OFFSET_PLOT, "\n SAmp\n");
-+	for (uint8_t samp_offset = 1; samp_offset <= 15; samp_offset++) {
-+		printk(SAMP_OFFSET_PLOT, "% 5d\t", samp_offset);
-+
-+		uint32_t rx_offset_vdq = 0;
-+		for (uint8_t bit = 0; bit < NUM_BITS; bit++) {
-+			rx_offset_vdq += samp_offset << (4 * bit);
-+		}
-+		mchbar_write32(DDR_DATA_RX_OFFSET_VDQ, rx_offset_vdq);
-+		for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+			if (!does_ch_exist(ctrl, channel))
-+				continue;
-+
-+			/* Propagate delay values (without a read command) */
-+			union ddr_data_control_0_reg data_control_0 = {
-+				.raw = ctrl->dq_control_0[channel],
-+			};
-+			data_control_0.read_rf_rd      = 1;
-+			data_control_0.read_rf_wr      = 0;
-+			data_control_0.read_rf_rank    = 0;
-+			data_control_0.force_odt_on    = 1;
-+			data_control_0.samp_train_mode = 1;
-+			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
-+			udelay(1);
-+			for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+				const uint32_t feedback =
-+					get_data_train_feedback(channel, byte);
-+
-+				for (uint8_t bit = 0; bit < max_train_bits; bit++) {
-+					struct samp_train_data *const curr_data =
-+							&samp_data[channel][byte][bit];
-+					const bool result = feedback & BIT(bit);
-+					if (result) {
-+						curr_data->last_one = samp_offset;
-+					} else if (curr_data->first_zero == 0) {
-+						curr_data->first_zero = samp_offset;
-+					}
-+					printk(SAMP_OFFSET_PLOT, result ? "." : "#");
-+				}
-+				printk(SAMP_OFFSET_PLOT, " ");
-+			}
-+			printk(SAMP_OFFSET_PLOT, PLOT_CH_SPACE);
-+			data_control_0.samp_train_mode = 0;
-+			mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw);
-+		}
-+		printk(SAMP_OFFSET_PLOT, "\n");
-+	}
-+	printk(BIOS_DEBUG, "\nBitSAmp ");
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++) {
-+			uint32_t rx_offset_vdq = 0;
-+			for (uint8_t bit = 0; bit < max_train_bits; bit++) {
-+				struct samp_train_data *const curr_data =
-+						&samp_data[channel][byte][bit];
-+
-+				uint8_t vref = curr_data->first_zero + curr_data->last_one;
-+				vref = clamp_u8(0, vref / 2, 15);
-+				/*
-+				 * Check for saturation conditions to make sure
-+				 * we are as close as possible to Vdd/2 (750 mV).
-+				 */
-+				if (curr_data->first_zero == 0)
-+					vref = 15;
-+				if (curr_data->last_one == 0)
-+					vref = 0;
-+
-+				ctrl->rxdqvrefpb[channel][0][byte][bit].center = vref;
-+				rx_offset_vdq += vref & 0xf << (4 * bit);
-+				printk(BIOS_DEBUG, "%x", vref);
-+			}
-+			mchbar_write32(RX_OFFSET_VDQ(channel, byte), rx_offset_vdq);
-+			printk(BIOS_DEBUG, " ");
-+			download_regfile(ctrl, channel, 1, 0, REG_FILE_USE_RANK, 0, 1, 0);
-+		}
-+		printk(BIOS_DEBUG, PLOT_CH_SPACE);
-+	}
-+	printk(BIOS_DEBUG, "\n");
-+}
-+
-+enum raminit_status train_sense_amp_offset(struct sysinfo *ctrl)
-+{
-+	printk(BIOS_DEBUG, "Stage 1: Vref offset training\n");
-+	const enum raminit_status status = train_vref_offset(ctrl);
-+
-+	printk(BIOS_DEBUG, "Stage 2: Samp offset training\n");
-+	train_samp_offset(ctrl);
-+
-+	/* Clean up after test */
-+	for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) {
-+		if (!does_ch_exist(ctrl, channel))
-+			continue;
-+
-+		mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), ctrl->dq_control_0[channel]);
-+		for (uint8_t byte = 0; byte < ctrl->lanes; byte++)
-+			mchbar_write32(DQ_CONTROL_2(channel, byte),
-+				ctrl->dq_control_2[channel][byte]);
-+	}
-+	io_reset();
-+	return status;
-+}
-diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h
-index 49a215aa71..1a168a3fc8 100644
---- a/src/northbridge/intel/haswell/registers/mchbar.h
-+++ b/src/northbridge/intel/haswell/registers/mchbar.h
-@@ -18,6 +18,8 @@
- #define RX_TRAIN_ch_r_b(ch, rank, byte)		_DDRIO_C_R_B(0x0000, ch, rank, byte)
- #define TX_TRAIN_ch_r_b(ch, rank, byte)		_DDRIO_C_R_B(0x0020, ch, rank, byte)
- 
-+#define RX_OFFSET_VDQ(ch, byte)			_DDRIO_C_R_B(0x004c, ch, 0, byte)
-+
- #define DDR_DATA_TRAIN_FEEDBACK(ch, byte)	_DDRIO_C_R_B(0x0054, ch, 0, byte)
- 
- #define DQ_CONTROL_1(ch, byte)			_DDRIO_C_R_B(0x0060, ch, 0, byte)
--- 
-2.39.5
-
diff --git a/config/coreboot/default/target.cfg b/config/coreboot/default/target.cfg
index 9de01b28..2494c0b6 100644
--- a/config/coreboot/default/target.cfg
+++ b/config/coreboot/default/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="default"
-rev="97bc693abc482139774a656212935387d43df8e2"
+rev="c247f62749b967143e58c33aa0e5e234711a628f"
diff --git a/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode b/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
index 6364bc56..5e7573af 100644
--- a/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 9010"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_workstations"
@@ -121,28 +130,34 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="variants/baseboard/devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="optiplex_9010_sff"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="variants/baseboard/devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Precision T1650"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -162,9 +177,6 @@ CONFIG_BOARD_DELL_OPTIPLEX_9010=y
 CONFIG_BOARD_DELL_SNB_IVB_WORKSTATIONS=y
 CONFIG_INCLUDE_SMSC_SCH5545_EC_FW=y
 CONFIG_SMSC_SCH5545_EC_FW_FILE="../../../vendorfiles/t1650/sch5545ec.bin"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -179,12 +191,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/t1650/12_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/t1650/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/t1650/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Precision T1650"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -245,7 +255,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -262,6 +272,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -286,6 +297,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -309,6 +321,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -364,6 +381,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -387,6 +406,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -405,6 +427,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -439,6 +462,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -460,6 +484,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -515,7 +540,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -641,7 +665,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -663,6 +686,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
index 8d8c5c20..b3903660 100644
--- a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 CONFIG_UTIL_GENPARSER=y
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -76,15 +79,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -105,7 +112,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -125,25 +134,31 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -160,9 +175,6 @@ CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xff7c0000
 CONFIG_DCACHE_RAM_SIZE=0x40000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -179,12 +191,10 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
@@ -241,7 +251,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,6 +270,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -284,6 +295,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -354,6 +366,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -376,6 +390,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -396,6 +413,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -427,6 +445,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -449,6 +468,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -504,7 +524,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -632,7 +651,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -654,6 +672,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
index 231d6e94..b53be562 100644
--- a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 CONFIG_UTIL_GENPARSER=y
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -76,15 +79,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -105,7 +112,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -123,25 +132,31 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -158,9 +173,6 @@ CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xff7c0000
 CONFIG_DCACHE_RAM_SIZE=0x40000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -177,12 +189,10 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
@@ -239,7 +249,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,6 +268,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -282,6 +293,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -352,6 +364,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -374,6 +388,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -392,6 +409,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -423,6 +441,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -445,6 +464,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -501,7 +521,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -629,7 +648,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -651,6 +669,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
index 8d5ecd79..84cc0995 100644
--- a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -76,15 +79,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -105,7 +112,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 SFF"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -125,25 +134,31 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -160,9 +175,6 @@ CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xff7c0000
 CONFIG_DCACHE_RAM_SIZE=0x40000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -179,12 +191,10 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
@@ -241,7 +251,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,6 +270,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -284,6 +295,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -354,6 +366,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -376,6 +390,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -396,6 +413,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -427,6 +445,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -449,6 +468,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -504,7 +524,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -632,7 +651,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -654,6 +672,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
index 272c35d5..2ccc0c05 100644
--- a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -76,15 +79,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -105,7 +112,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 SFF"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -123,25 +132,31 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -158,9 +173,6 @@ CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xff7c0000
 CONFIG_DCACHE_RAM_SIZE=0x40000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -177,12 +189,10 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
@@ -239,7 +249,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,6 +268,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -282,6 +293,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -352,6 +364,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -374,6 +388,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -392,6 +409,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -423,6 +441,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -445,6 +464,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -501,7 +521,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -629,7 +648,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -651,6 +669,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb b/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb
index 67021be8..cf8a9ff6 100644
--- a/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E4300"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/gm45_latitude"
@@ -121,26 +130,32 @@ CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e4300"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_E4300=y
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -159,9 +174,6 @@ CONFIG_BOARD_DELL_E4300=y
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -174,12 +186,10 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -237,7 +247,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -252,6 +262,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -279,6 +290,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -342,6 +354,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -366,6 +380,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -386,6 +403,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -419,6 +437,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -437,6 +456,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -593,7 +613,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -614,6 +633,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e4300_4mb/config/libgfxinit_txtmode b/config/coreboot/e4300_4mb/config/libgfxinit_txtmode
index e6309b47..64f08c43 100644
--- a/config/coreboot/e4300_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e4300_4mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E4300"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/gm45_latitude"
@@ -119,26 +128,32 @@ CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e4300"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 CONFIG_BOARD_DELL_E4300=y
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -157,9 +172,6 @@ CONFIG_BOARD_DELL_E4300=y
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -172,12 +184,10 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -235,7 +245,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -250,6 +260,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -277,6 +288,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -340,6 +352,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -364,6 +378,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -382,6 +399,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -415,6 +433,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -433,6 +452,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -589,7 +609,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -610,6 +629,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
index 3367bc2b..6ff94706 100644
--- a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E5420"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -121,27 +130,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e5420"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5420"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 CONFIG_BOARD_DELL_LATITUDE_E5420=y
@@ -159,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E5420=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -175,12 +187,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5420"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -240,7 +250,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -257,6 +267,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -281,6 +292,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -304,6 +316,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -358,6 +375,8 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -381,6 +400,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -401,6 +423,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -435,6 +458,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -453,6 +477,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -607,7 +632,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -629,6 +653,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
index 331dda80..7c942e24 100644
--- a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E5420"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -119,27 +128,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e5420"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5420"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 CONFIG_BOARD_DELL_LATITUDE_E5420=y
@@ -157,9 +172,6 @@ CONFIG_BOARD_DELL_LATITUDE_E5420=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -173,12 +185,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5420"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -238,7 +248,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -255,6 +265,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -279,6 +290,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -302,6 +314,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -356,6 +373,8 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -379,6 +398,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -397,6 +419,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -431,6 +454,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -449,6 +473,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -604,7 +629,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -626,6 +650,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
index f6113581..f453a822 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E5520"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -121,27 +130,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e5520"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5520"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -159,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E5520=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -175,12 +187,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5520"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -240,7 +250,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -257,6 +267,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -281,6 +292,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -304,6 +316,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -358,6 +375,8 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -381,6 +400,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -401,6 +423,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -435,6 +458,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -453,6 +477,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -607,7 +632,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -629,6 +653,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
index 96bd21fc..7a0e9de0 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E5520"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -119,27 +128,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e5520"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5520"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -157,9 +172,6 @@ CONFIG_BOARD_DELL_LATITUDE_E5520=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -173,12 +185,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5520"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -238,7 +248,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -255,6 +265,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -279,6 +290,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -302,6 +314,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -356,6 +373,8 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -379,6 +398,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -397,6 +419,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -431,6 +454,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -449,6 +473,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -604,7 +629,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -626,6 +650,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
index 7702f7bd..4e1c06a2 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E5530"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -121,27 +130,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e5530"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5530"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -159,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E5530=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -175,12 +187,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd_nogbe"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5530"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -240,7 +250,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -257,6 +267,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -281,6 +292,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -304,6 +316,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -358,6 +375,8 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -381,6 +400,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -401,6 +423,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -435,6 +458,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -453,6 +477,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -607,7 +632,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -629,6 +653,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
index fa950439..858c289d 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E5530"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -119,27 +128,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e5530"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5530"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -157,9 +172,6 @@ CONFIG_BOARD_DELL_LATITUDE_E5530=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -173,12 +185,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd_nogbe"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5530"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -238,7 +248,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -255,6 +265,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -279,6 +290,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -302,6 +314,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -356,6 +373,8 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -379,6 +398,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -397,6 +419,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -431,6 +454,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -449,6 +473,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -604,7 +629,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -626,6 +650,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
index 25c27fdb..5829d48e 100644
--- a/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6220"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -121,27 +130,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6220"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6220"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -159,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6220=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -176,12 +188,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6220"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -241,7 +251,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,6 +268,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -282,6 +293,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -305,6 +317,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -361,6 +378,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -384,6 +403,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -404,6 +426,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -438,6 +461,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -456,6 +480,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -610,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -632,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6220_10mb/config/libgfxinit_txtmode b/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
index 3a79e7e3..9d5977f5 100644
--- a/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6220"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -119,27 +128,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6220"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6220"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -157,9 +172,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6220=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -174,12 +186,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6220"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -239,7 +249,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,6 +266,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -280,6 +291,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -303,6 +315,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -359,6 +376,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -382,6 +401,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -400,6 +422,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -434,6 +457,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -452,6 +476,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -607,7 +632,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -629,6 +653,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
index 7bc76f82..5bb09f07 100644
--- a/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6230"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -121,27 +130,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6230"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -159,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6230=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -176,12 +188,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6230"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -241,7 +251,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,6 +268,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -282,6 +293,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -305,6 +317,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -361,6 +378,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -384,6 +403,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -404,6 +426,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -438,6 +461,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -456,6 +480,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -610,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -632,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6230_12mb/config/libgfxinit_txtmode b/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
index 2d578a57..78932097 100644
--- a/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6230"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -119,27 +128,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6230"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -157,9 +172,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6230=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -174,12 +186,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6230"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -239,7 +249,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,6 +266,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -280,6 +291,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -303,6 +315,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -359,6 +376,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -382,6 +401,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -400,6 +422,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -434,6 +457,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -452,6 +476,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -607,7 +632,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -629,6 +653,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
index e6867cd1..0ca7faea 100644
--- a/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6320"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -121,27 +130,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6320"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6320"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -159,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6320=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -176,12 +188,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6320"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -241,7 +251,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,6 +268,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -282,6 +293,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -305,6 +317,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -361,6 +378,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -384,6 +403,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -404,6 +426,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -438,6 +461,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -456,6 +480,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -610,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -632,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6320_10mb/config/libgfxinit_txtmode b/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
index ca030f32..94267151 100644
--- a/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6320"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -119,27 +128,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6320"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6320"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -157,9 +172,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6320=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -174,12 +186,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6320"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -239,7 +249,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,6 +266,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -280,6 +291,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -303,6 +315,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -359,6 +376,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -382,6 +401,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -400,6 +422,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -434,6 +457,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -452,6 +476,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -607,7 +632,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -629,6 +653,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
index bd93e3bf..aa13e2ff 100644
--- a/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6330"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -121,27 +130,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6330"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6330"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -159,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6330=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -176,12 +188,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6330"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -241,7 +251,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,6 +268,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -282,6 +293,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -305,6 +317,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -361,6 +378,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -384,6 +403,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -404,6 +426,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -438,6 +461,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -456,6 +480,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -610,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -632,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6330_12mb/config/libgfxinit_txtmode b/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
index ee4686da..ad461af2 100644
--- a/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6330"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -119,27 +128,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6330"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6330"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -157,9 +172,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6330=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -174,12 +186,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6330"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -239,7 +249,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,6 +266,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -280,6 +291,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -303,6 +315,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -359,6 +376,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -382,6 +401,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -400,6 +422,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -434,6 +457,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -452,6 +476,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -607,7 +632,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -629,6 +653,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
index 84809847..e2f2763a 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/gm45_latitude"
@@ -121,26 +130,32 @@ CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 CONFIG_VGA_BIOS=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 CONFIG_BOARD_DELL_E6400=y
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -159,9 +174,6 @@ CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -174,13 +186,11 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_VGA_BIOS_FILE="../../../pciroms/pci10de,06eb.rom"
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -239,7 +249,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 # CONFIG_VGA_BIOS_SECOND is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -254,6 +264,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -281,6 +292,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -344,6 +356,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -368,6 +382,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -389,6 +406,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -423,6 +441,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -441,6 +460,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -597,7 +617,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -618,6 +637,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
index 4b53f9a9..c6541c0a 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/gm45_latitude"
@@ -119,26 +128,32 @@ CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 CONFIG_VGA_BIOS=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 CONFIG_BOARD_DELL_E6400=y
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -157,9 +172,6 @@ CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -172,13 +184,11 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_VGA_BIOS_FILE="../../../pciroms/pci10de,06eb.rom"
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -237,7 +247,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 # CONFIG_VGA_BIOS_SECOND is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -252,6 +262,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -279,6 +290,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -342,6 +354,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -366,6 +380,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -385,6 +402,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -419,6 +437,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -437,6 +456,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -593,7 +613,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -614,6 +633,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6400nvidia_4mb/config/normal b/config/coreboot/e6400nvidia_4mb/config/normal
index 79c3790a..c0e7ed44 100644
--- a/config/coreboot/e6400nvidia_4mb/config/normal
+++ b/config/coreboot/e6400nvidia_4mb/config/normal
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/gm45_latitude"
@@ -119,25 +128,31 @@ CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 CONFIG_VGA_BIOS=y
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 CONFIG_BOARD_DELL_E6400=y
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -156,9 +171,6 @@ CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -171,13 +183,11 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_VGA_BIOS_FILE="../../../pciroms/pci10de,06eb.rom"
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -235,7 +245,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 # CONFIG_VGA_BIOS_SECOND is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -250,6 +260,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -277,6 +288,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -340,6 +352,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -364,6 +378,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -407,6 +424,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -425,6 +443,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -571,7 +590,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -587,6 +605,13 @@ CONFIG_HAVE_EM100_SUPPORT=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
index f558eefd..6ae0c751 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6420"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -121,27 +130,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6420"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6420"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -159,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6420=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -176,12 +188,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6420"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -241,7 +251,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,6 +268,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -282,6 +293,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -305,6 +317,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -361,6 +378,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -384,6 +403,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -404,6 +426,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -438,6 +461,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -456,6 +480,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -610,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -632,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
index 2158736b..68a70d8c 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6420"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -119,27 +128,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6420"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6420"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -157,9 +172,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6420=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -174,12 +186,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6420"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -239,7 +249,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,6 +266,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -280,6 +291,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -303,6 +315,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -359,6 +376,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -382,6 +401,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -400,6 +422,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -434,6 +457,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -452,6 +476,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -607,7 +632,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -629,6 +653,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 593d294c..6a22b520 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6430"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -121,27 +130,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6430"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6430"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -159,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6430=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -176,12 +188,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6430"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -241,7 +251,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,6 +268,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -282,6 +293,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -305,6 +317,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -361,6 +378,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -384,6 +403,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -404,6 +426,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -438,6 +461,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -456,6 +480,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -610,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -632,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index e9211864..97a26378 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6430"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -119,27 +128,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6430"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6430"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -157,9 +172,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6430=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -174,12 +186,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6430"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -239,7 +249,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,6 +266,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -280,6 +291,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -303,6 +315,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -359,6 +376,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -382,6 +401,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -400,6 +422,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -434,6 +457,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -452,6 +476,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -607,7 +632,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -629,6 +653,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
index 381b7207..90b857a6 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6520"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -121,27 +130,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6520"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6520"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -159,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6520=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -176,12 +188,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6520"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -241,7 +251,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,6 +268,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -282,6 +293,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -305,6 +317,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -361,6 +378,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -384,6 +403,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -404,6 +426,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -438,6 +461,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -456,6 +480,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -610,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -632,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
index 92d54b1b..c670179e 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6520"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -119,27 +128,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6520"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6520"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -157,9 +172,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6520=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -174,12 +186,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6520"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -239,7 +249,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,6 +266,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -280,6 +291,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -303,6 +315,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -359,6 +376,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -382,6 +401,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -400,6 +422,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -434,6 +457,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -452,6 +476,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -607,7 +632,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -629,6 +653,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index 4345d838..f83ae61e 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6530"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -121,27 +130,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6530"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6530"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -159,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6530=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -176,12 +188,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6530"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -241,7 +251,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,6 +268,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -282,6 +293,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -305,6 +317,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -361,6 +378,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -384,6 +403,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -404,6 +426,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -438,6 +461,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -456,6 +480,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -610,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -632,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index d5a2b25b..aa54a59c 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Latitude E6530"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
@@ -119,27 +128,33 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="e6530"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6530"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -157,9 +172,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6530=y
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
 CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -174,12 +186,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6530"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -239,7 +249,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -256,6 +266,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -280,6 +291,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -303,6 +315,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -359,6 +376,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -382,6 +401,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -400,6 +422,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -434,6 +457,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -452,6 +476,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -607,7 +632,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -629,6 +653,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/g43t_am3/config/libgfxinit_txtmode b/config/coreboot/g43t_am3/config/libgfxinit_txtmode
index cca1ebda..039c3bbb 100644
--- a/config/coreboot/g43t_am3/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t_am3/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_VENDOR_ACER=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_VENDOR_ACER=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_ACER=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_ACER=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="G43T-AM3"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -117,30 +126,34 @@ CONFIG_FMDFILE=""
 CONFIG_MAINBOARD_VENDOR="Acer"
 # CONFIG_BOARD_ACER_VN7_572G is not set
 CONFIG_BOARD_ACER_G43T_AM3=y
+# CONFIG_BOARD_ACER_Q45T_AM is not set
 CONFIG_CBFS_SIZE=0x200000
 CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_VARIANT_DIR="g43t-am3"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Acer"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=256
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfeff8000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -152,12 +165,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3"
 # CONFIG_HAVE_IFD_BIN is not set
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -214,7 +225,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -229,6 +240,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -258,6 +270,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -321,6 +334,8 @@ CONFIG_SUPERIO_ITE_IT8720F=y
 # Intel Firmware
 #
 CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -346,6 +361,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -364,6 +382,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -400,6 +419,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
 CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -418,6 +438,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -570,7 +591,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -589,6 +609,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
index 563a47c7..34d2fef6 100644
--- a/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_VENDOR_ACER=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_VENDOR_ACER=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_ACER=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_ACER=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="G43T-AM3"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -117,30 +126,34 @@ CONFIG_FMDFILE=""
 CONFIG_MAINBOARD_VENDOR="Acer"
 # CONFIG_BOARD_ACER_VN7_572G is not set
 CONFIG_BOARD_ACER_G43T_AM3=y
+# CONFIG_BOARD_ACER_Q45T_AM is not set
 CONFIG_CBFS_SIZE=0x1000000
 CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_VARIANT_DIR="g43t-am3"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Acer"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=256
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfeff8000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -152,12 +165,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3"
 # CONFIG_HAVE_IFD_BIN is not set
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -214,7 +225,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -229,6 +240,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -258,6 +270,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -321,6 +334,8 @@ CONFIG_SUPERIO_ITE_IT8720F=y
 # Intel Firmware
 #
 CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -346,6 +361,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -364,6 +382,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -400,6 +419,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
 CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -418,6 +438,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -570,7 +591,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -589,6 +609,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode b/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode
index ade6b308..3df9fa65 100644
--- a/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode
+++ b/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 CONFIG_VENDOR_GIGABYTE=y
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_GIGABYTE=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="GA-G41M-ES2L"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -120,25 +129,27 @@ CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="GIGABYTE"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="GA-G41M-ES2L"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=256
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfeff8000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -160,13 +171,12 @@ CONFIG_BOARD_GIGABYTE_GA_G41M_ES2L=y
 # CONFIG_BOARD_GIGABYTE_GA_H61M_DS2V is not set
 # CONFIG_BOARD_GIGABYTE_GA_H61MA_D3V is not set
 # CONFIG_BOARD_GIGABYTE_GA_H61M_S2P_R3 is not set
+# CONFIG_BOARD_GIGABYTE_GA_H77M_D3H is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="GA-G41M-ES2L"
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -222,7 +232,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -237,6 +247,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -269,6 +280,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -328,6 +340,8 @@ CONFIG_SUPERIO_ITE_IT8718F=y
 #
 # Embedded Controllers
 #
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -353,6 +367,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -371,6 +388,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -409,6 +427,7 @@ CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_STASH_TO_CBMEM=y
 CONFIG_REALTEK_8168_RESET=y
 CONFIG_REALTEK_8168_MACADDRESS="00:e0:4c:00:c0:b0"
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -426,6 +445,7 @@ CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -578,7 +598,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -597,6 +616,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/gru_bob/config/libgfxinit_corebootfb b/config/coreboot/gru_bob/config/libgfxinit_corebootfb
index 24935ea3..fe3976b4 100644
--- a/config/coreboot/gru_bob/config/libgfxinit_corebootfb
+++ b/config/coreboot/gru_bob/config/libgfxinit_corebootfb
@@ -9,13 +9,15 @@
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
-# CONFIG_ALLOW_EXPERIMENTAL_CLANG is not set
+# CONFIG_COMPILER_LLVM_CLANG is not set
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_COMPRESS_PRERAM_STAGES=y
@@ -52,6 +54,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -63,6 +66,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -70,15 +74,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 CONFIG_VENDOR_GOOGLE=y
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -99,7 +107,9 @@ CONFIG_VENDOR_GOOGLE=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Bob"
 CONFIG_MAINBOARD_DIR="google/gru"
@@ -113,17 +123,18 @@ CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=1
 CONFIG_POST_DEVICE=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 # CONFIG_CHROMEOS is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_ARM64_CURRENT_EL=3
+CONFIG_MEMLAYOUT_LD_FILE="src/soc/rockchip/rk3399/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_CONSOLE_POST is not set
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=1
 CONFIG_CONSOLE_SERIAL_UART_ADDRESS=0xFF1A0000
-# CONFIG_CONSOLE_POST is not set
-CONFIG_MEMLAYOUT_LD_FILE="src/soc/rockchip/rk3399/memlayout.ld"
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_ARM64_CURRENT_EL=3
 CONFIG_SPI_FLASH_WINBOND=y
 
 #
@@ -157,8 +168,10 @@ CONFIG_SPI_FLASH_WINBOND=y
 #
 # CONFIG_BOARD_GOOGLE_BROX is not set
 # CONFIG_BOARD_GOOGLE_BROX_EC_ISH is not set
-# CONFIG_BOARD_GOOGLE_LOTSO is not set
+# CONFIG_BOARD_GOOGLE_BROX_TI_PDC is not set
 # CONFIG_BOARD_GOOGLE_GREENBAYUPOC is not set
+# CONFIG_BOARD_GOOGLE_JUBILANT is not set
+# CONFIG_BOARD_GOOGLE_LOTSO is not set
 
 #
 # Brya
@@ -175,6 +188,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_CRAASKOV is not set
 # CONFIG_BOARD_GOOGLE_CONSTITUTION is not set
 # CONFIG_BOARD_GOOGLE_CROTA is not set
+# CONFIG_BOARD_GOOGLE_DIRKS is not set
 # CONFIG_BOARD_GOOGLE_DOCHI is not set
 # CONFIG_BOARD_GOOGLE_DOMIKA is not set
 # CONFIG_BOARD_GOOGLE_FELWINTER is not set
@@ -184,6 +198,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_GLADIOS is not set
 # CONFIG_BOARD_GOOGLE_GLASSWAY is not set
 # CONFIG_BOARD_GOOGLE_GOTHRAX is not set
+# CONFIG_BOARD_GOOGLE_GUREN is not set
 # CONFIG_BOARD_GOOGLE_HADES is not set
 # CONFIG_BOARD_GOOGLE_KANO is not set
 # CONFIG_BOARD_GOOGLE_KINOX is not set
@@ -193,6 +208,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_MARASOV is not set
 # CONFIG_BOARD_GOOGLE_MITHRAX is not set
 # CONFIG_BOARD_GOOGLE_MOLI is not set
+# CONFIG_BOARD_GOOGLE_MOXIE is not set
 # CONFIG_BOARD_GOOGLE_NIVVIKS is not set
 # CONFIG_BOARD_GOOGLE_NEREID is not set
 # CONFIG_BOARD_GOOGLE_NOKRIS is not set
@@ -201,19 +217,24 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_PIRRHA is not set
 # CONFIG_BOARD_GOOGLE_PRIMUS is not set
 # CONFIG_BOARD_GOOGLE_PUJJO is not set
+# CONFIG_BOARD_GOOGLE_PUJJONIRU is not set
 # CONFIG_BOARD_GOOGLE_QUANDISO is not set
+# CONFIG_BOARD_GOOGLE_QUANDISO2 is not set
 # CONFIG_BOARD_GOOGLE_REDRIX is not set
 # CONFIG_BOARD_GOOGLE_REDRIX4ES is not set
 # CONFIG_BOARD_GOOGLE_RIVEN is not set
+# CONFIG_BOARD_GOOGLE_RULL is not set
 # CONFIG_BOARD_GOOGLE_SKOLAS is not set
 # CONFIG_BOARD_GOOGLE_SKOLAS4ES is not set
 # CONFIG_BOARD_GOOGLE_TAEKO is not set
 # CONFIG_BOARD_GOOGLE_TAEKO4ES is not set
 # CONFIG_BOARD_GOOGLE_TANIKS is not set
+# CONFIG_BOARD_GOOGLE_TELIKS is not set
 # CONFIG_BOARD_GOOGLE_TEREID is not set
 # CONFIG_BOARD_GOOGLE_TIVVIKS is not set
 # CONFIG_BOARD_GOOGLE_TRULO is not set
 # CONFIG_BOARD_GOOGLE_ULDREN is not set
+# CONFIG_BOARD_GOOGLE_ULDRENITE is not set
 # CONFIG_BOARD_GOOGLE_VELL is not set
 # CONFIG_BOARD_GOOGLE_VOLMAR is not set
 # CONFIG_BOARD_GOOGLE_XIVU is not set
@@ -226,7 +247,10 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_YAVISTA is not set
 # CONFIG_BOARD_GOOGLE_SUNDANCE is not set
 # CONFIG_BOARD_GOOGLE_PUJJOGA is not set
+# CONFIG_BOARD_GOOGLE_PUJJOGATWIN is not set
 # CONFIG_BOARD_GOOGLE_ORISA is not set
+# CONFIG_BOARD_GOOGLE_TELITH is not set
+# CONFIG_BOARD_GOOGLE_MELIKS is not set
 
 #
 # Butterfly
@@ -265,6 +289,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 #
 # CONFIG_BOARD_GOOGLE_STARMIE is not set
 # CONFIG_BOARD_GOOGLE_WUGTRIO is not set
+# CONFIG_BOARD_GOOGLE_WYRDEER is not set
 
 #
 # Cyan
@@ -336,6 +361,12 @@ CONFIG_SPI_FLASH_WINBOND=y
 # Fatcat
 #
 # CONFIG_BOARD_GOOGLE_FATCAT is not set
+# CONFIG_BOARD_GOOGLE_FATCATISH is not set
+# CONFIG_BOARD_GOOGLE_FATCATITE is not set
+# CONFIG_BOARD_GOOGLE_FATCATNUVO is not set
+# CONFIG_BOARD_GOOGLE_FELINO is not set
+# CONFIG_BOARD_GOOGLE_FRANCKA is not set
+# CONFIG_BOARD_GOOGLE_KINMEN is not set
 
 #
 # Fizz
@@ -499,6 +530,11 @@ CONFIG_BOARD_GOOGLE_BOB=y
 # CONFIG_BOARD_GOOGLE_ELM is not set
 # CONFIG_BOARD_GOOGLE_HANA is not set
 
+#
+# Ocelot
+#
+# CONFIG_BOARD_GOOGLE_OCELOT is not set
+
 #
 # Octopus
 #
@@ -578,6 +614,8 @@ CONFIG_BOARD_GOOGLE_BOB=y
 #
 # Rauru
 #
+# CONFIG_BOARD_GOOGLE_HYLIA is not set
+# CONFIG_BOARD_GOOGLE_NAVI is not set
 # CONFIG_BOARD_GOOGLE_RAURU is not set
 
 #
@@ -605,6 +643,7 @@ CONFIG_BOARD_GOOGLE_BOB=y
 # CONFIG_BOARD_GOOGLE_REX64 is not set
 # CONFIG_BOARD_GOOGLE_SCREEBO is not set
 # CONFIG_BOARD_GOOGLE_SCREEBO4ES is not set
+# CONFIG_BOARD_GOOGLE_KANIX is not set
 
 #
 # Sarien
@@ -621,6 +660,11 @@ CONFIG_BOARD_GOOGLE_BOB=y
 # CONFIG_BOARD_GOOGLE_SKYRIM is not set
 # CONFIG_BOARD_GOOGLE_WINTERHOLD is not set
 
+#
+# Skywalker
+#
+# CONFIG_BOARD_GOOGLE_SKYWALKER is not set
+
 #
 # Slippy
 #
@@ -719,7 +763,6 @@ CONFIG_BOARD_GOOGLE_BOB=y
 CONFIG_DRIVER_TPM_SPI_BUS=0x0
 CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS=0x5
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_DRIVER_TPM_I2C_BUS=0x0
 CONFIG_DRIVER_TPM_I2C_ADDR=0x20
 CONFIG_PMIC_BUS=-1
@@ -810,6 +853,7 @@ CONFIG_EC_GOOGLE_CHROMEEC_SPI_CHIP=0x0
 CONFIG_EC_GOOGLE_CHROMEEC_RTC=y
 # CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL is not set
 # CONFIG_EC_GOOGLE_CHROMEEC_AUTO_FAN_CTRL is not set
+CONFIG_EC_GOOGLE_CHROMEEC_READ_BATTERY_LONG_STRING=y
 CONFIG_MAINBOARD_HAS_CHROMEOS=y
 
 #
@@ -817,6 +861,8 @@ CONFIG_MAINBOARD_HAS_CHROMEOS=y
 #
 # end of ChromeOS
 
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_ARM64=y
 CONFIG_ARCH_BOOTBLOCK_ARM64=y
 CONFIG_ARCH_VERSTAGE_ARM64=y
@@ -845,6 +891,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 # CONFIG_SOFTWARE_I2C is not set
@@ -857,6 +904,7 @@ CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 CONFIG_COMMON_CBFS_SPI_WRAPPER=y
 CONFIG_SPI_FLASH=y
 # CONFIG_SPI_FLASH_NO_FAST_READ is not set
@@ -866,6 +914,7 @@ CONFIG_UART_OVERRIDE_REFCLK=y
 CONFIG_DRIVERS_UART_8250MEM=y
 CONFIG_DRIVERS_UART_8250MEM_32=y
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -978,6 +1027,7 @@ CONFIG_HAVE_MONOTONIC_TIMER=y
 # Payload
 #
 CONFIG_PAYLOAD_NONE=y
+# CONFIG_PAYLOAD_FIT_SUPPORT is not set
 # end of Payload
 
 #
@@ -1000,7 +1050,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 # CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
@@ -1010,6 +1059,14 @@ CONFIG_PAYLOAD_NONE=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_HAVE_EARLY_POWEROFF_SUPPORT=y
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_NO_XIP_EARLY_STAGES=y
diff --git a/config/coreboot/gru_kevin/config/libgfxinit_corebootfb b/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
index be585271..74b656a6 100644
--- a/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
+++ b/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
@@ -9,13 +9,15 @@
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
-# CONFIG_ALLOW_EXPERIMENTAL_CLANG is not set
+# CONFIG_COMPILER_LLVM_CLANG is not set
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_COMPRESS_PRERAM_STAGES=y
@@ -52,6 +54,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -63,6 +66,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -70,15 +74,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 CONFIG_VENDOR_GOOGLE=y
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -99,7 +107,9 @@ CONFIG_VENDOR_GOOGLE=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Kevin"
 CONFIG_MAINBOARD_DIR="google/gru"
@@ -113,17 +123,18 @@ CONFIG_CONSOLE_SERIAL=y
 CONFIG_MAX_CPUS=1
 CONFIG_POST_DEVICE=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 # CONFIG_CHROMEOS is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_ARM64_CURRENT_EL=3
+CONFIG_MEMLAYOUT_LD_FILE="src/soc/rockchip/rk3399/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_CONSOLE_POST is not set
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=1
 CONFIG_CONSOLE_SERIAL_UART_ADDRESS=0xFF1A0000
-# CONFIG_CONSOLE_POST is not set
-CONFIG_MEMLAYOUT_LD_FILE="src/soc/rockchip/rk3399/memlayout.ld"
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_ARM64_CURRENT_EL=3
 CONFIG_SPI_FLASH_WINBOND=y
 
 #
@@ -157,8 +168,10 @@ CONFIG_SPI_FLASH_WINBOND=y
 #
 # CONFIG_BOARD_GOOGLE_BROX is not set
 # CONFIG_BOARD_GOOGLE_BROX_EC_ISH is not set
-# CONFIG_BOARD_GOOGLE_LOTSO is not set
+# CONFIG_BOARD_GOOGLE_BROX_TI_PDC is not set
 # CONFIG_BOARD_GOOGLE_GREENBAYUPOC is not set
+# CONFIG_BOARD_GOOGLE_JUBILANT is not set
+# CONFIG_BOARD_GOOGLE_LOTSO is not set
 
 #
 # Brya
@@ -175,6 +188,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_CRAASKOV is not set
 # CONFIG_BOARD_GOOGLE_CONSTITUTION is not set
 # CONFIG_BOARD_GOOGLE_CROTA is not set
+# CONFIG_BOARD_GOOGLE_DIRKS is not set
 # CONFIG_BOARD_GOOGLE_DOCHI is not set
 # CONFIG_BOARD_GOOGLE_DOMIKA is not set
 # CONFIG_BOARD_GOOGLE_FELWINTER is not set
@@ -184,6 +198,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_GLADIOS is not set
 # CONFIG_BOARD_GOOGLE_GLASSWAY is not set
 # CONFIG_BOARD_GOOGLE_GOTHRAX is not set
+# CONFIG_BOARD_GOOGLE_GUREN is not set
 # CONFIG_BOARD_GOOGLE_HADES is not set
 # CONFIG_BOARD_GOOGLE_KANO is not set
 # CONFIG_BOARD_GOOGLE_KINOX is not set
@@ -193,6 +208,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_MARASOV is not set
 # CONFIG_BOARD_GOOGLE_MITHRAX is not set
 # CONFIG_BOARD_GOOGLE_MOLI is not set
+# CONFIG_BOARD_GOOGLE_MOXIE is not set
 # CONFIG_BOARD_GOOGLE_NIVVIKS is not set
 # CONFIG_BOARD_GOOGLE_NEREID is not set
 # CONFIG_BOARD_GOOGLE_NOKRIS is not set
@@ -201,19 +217,24 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_PIRRHA is not set
 # CONFIG_BOARD_GOOGLE_PRIMUS is not set
 # CONFIG_BOARD_GOOGLE_PUJJO is not set
+# CONFIG_BOARD_GOOGLE_PUJJONIRU is not set
 # CONFIG_BOARD_GOOGLE_QUANDISO is not set
+# CONFIG_BOARD_GOOGLE_QUANDISO2 is not set
 # CONFIG_BOARD_GOOGLE_REDRIX is not set
 # CONFIG_BOARD_GOOGLE_REDRIX4ES is not set
 # CONFIG_BOARD_GOOGLE_RIVEN is not set
+# CONFIG_BOARD_GOOGLE_RULL is not set
 # CONFIG_BOARD_GOOGLE_SKOLAS is not set
 # CONFIG_BOARD_GOOGLE_SKOLAS4ES is not set
 # CONFIG_BOARD_GOOGLE_TAEKO is not set
 # CONFIG_BOARD_GOOGLE_TAEKO4ES is not set
 # CONFIG_BOARD_GOOGLE_TANIKS is not set
+# CONFIG_BOARD_GOOGLE_TELIKS is not set
 # CONFIG_BOARD_GOOGLE_TEREID is not set
 # CONFIG_BOARD_GOOGLE_TIVVIKS is not set
 # CONFIG_BOARD_GOOGLE_TRULO is not set
 # CONFIG_BOARD_GOOGLE_ULDREN is not set
+# CONFIG_BOARD_GOOGLE_ULDRENITE is not set
 # CONFIG_BOARD_GOOGLE_VELL is not set
 # CONFIG_BOARD_GOOGLE_VOLMAR is not set
 # CONFIG_BOARD_GOOGLE_XIVU is not set
@@ -226,7 +247,10 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_BOARD_GOOGLE_YAVISTA is not set
 # CONFIG_BOARD_GOOGLE_SUNDANCE is not set
 # CONFIG_BOARD_GOOGLE_PUJJOGA is not set
+# CONFIG_BOARD_GOOGLE_PUJJOGATWIN is not set
 # CONFIG_BOARD_GOOGLE_ORISA is not set
+# CONFIG_BOARD_GOOGLE_TELITH is not set
+# CONFIG_BOARD_GOOGLE_MELIKS is not set
 
 #
 # Butterfly
@@ -265,6 +289,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 #
 # CONFIG_BOARD_GOOGLE_STARMIE is not set
 # CONFIG_BOARD_GOOGLE_WUGTRIO is not set
+# CONFIG_BOARD_GOOGLE_WYRDEER is not set
 
 #
 # Cyan
@@ -336,6 +361,12 @@ CONFIG_SPI_FLASH_WINBOND=y
 # Fatcat
 #
 # CONFIG_BOARD_GOOGLE_FATCAT is not set
+# CONFIG_BOARD_GOOGLE_FATCATISH is not set
+# CONFIG_BOARD_GOOGLE_FATCATITE is not set
+# CONFIG_BOARD_GOOGLE_FATCATNUVO is not set
+# CONFIG_BOARD_GOOGLE_FELINO is not set
+# CONFIG_BOARD_GOOGLE_FRANCKA is not set
+# CONFIG_BOARD_GOOGLE_KINMEN is not set
 
 #
 # Fizz
@@ -499,6 +530,11 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
 # CONFIG_BOARD_GOOGLE_ELM is not set
 # CONFIG_BOARD_GOOGLE_HANA is not set
 
+#
+# Ocelot
+#
+# CONFIG_BOARD_GOOGLE_OCELOT is not set
+
 #
 # Octopus
 #
@@ -578,6 +614,8 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
 #
 # Rauru
 #
+# CONFIG_BOARD_GOOGLE_HYLIA is not set
+# CONFIG_BOARD_GOOGLE_NAVI is not set
 # CONFIG_BOARD_GOOGLE_RAURU is not set
 
 #
@@ -605,6 +643,7 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
 # CONFIG_BOARD_GOOGLE_REX64 is not set
 # CONFIG_BOARD_GOOGLE_SCREEBO is not set
 # CONFIG_BOARD_GOOGLE_SCREEBO4ES is not set
+# CONFIG_BOARD_GOOGLE_KANIX is not set
 
 #
 # Sarien
@@ -621,6 +660,11 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
 # CONFIG_BOARD_GOOGLE_SKYRIM is not set
 # CONFIG_BOARD_GOOGLE_WINTERHOLD is not set
 
+#
+# Skywalker
+#
+# CONFIG_BOARD_GOOGLE_SKYWALKER is not set
+
 #
 # Slippy
 #
@@ -719,7 +763,6 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
 CONFIG_DRIVER_TPM_SPI_BUS=0x0
 CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS=0x5
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_DRIVER_TPM_I2C_BUS=0x0
 CONFIG_DRIVER_TPM_I2C_ADDR=0x20
 CONFIG_PMIC_BUS=-1
@@ -816,6 +859,8 @@ CONFIG_MAINBOARD_HAS_CHROMEOS=y
 #
 # end of ChromeOS
 
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_ARM64=y
 CONFIG_ARCH_BOOTBLOCK_ARM64=y
 CONFIG_ARCH_VERSTAGE_ARM64=y
@@ -844,6 +889,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 # CONFIG_SOFTWARE_I2C is not set
@@ -856,6 +902,7 @@ CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 CONFIG_COMMON_CBFS_SPI_WRAPPER=y
 CONFIG_SPI_FLASH=y
 # CONFIG_SPI_FLASH_NO_FAST_READ is not set
@@ -865,6 +912,7 @@ CONFIG_UART_OVERRIDE_REFCLK=y
 CONFIG_DRIVERS_UART_8250MEM=y
 CONFIG_DRIVERS_UART_8250MEM_32=y
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -975,6 +1023,7 @@ CONFIG_HAVE_MONOTONIC_TIMER=y
 # Payload
 #
 CONFIG_PAYLOAD_NONE=y
+# CONFIG_PAYLOAD_FIT_SUPPORT is not set
 # end of Payload
 
 #
@@ -997,7 +1046,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 # CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
@@ -1007,6 +1055,14 @@ CONFIG_PAYLOAD_NONE=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_HAVE_EARLY_POWEROFF_SUPPORT=y
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_NO_XIP_EARLY_STAGES=y
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
index d51bf0f8..c22c42ee 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="EliteBook 2170p"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
@@ -123,28 +132,30 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="2170p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=0
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2170p"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -159,17 +170,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_BOARD_HP_2170P=y
@@ -187,7 +200,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2170p"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -249,7 +261,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -266,6 +278,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -290,6 +303,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -313,6 +327,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -381,6 +400,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -404,6 +425,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -424,6 +448,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -458,6 +483,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -479,6 +505,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -534,7 +561,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -660,7 +686,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -682,6 +707,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
index 8983c8d1..885ac431 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="EliteBook 2170p"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
@@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="2170p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=0
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2170p"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -157,17 +168,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 CONFIG_BOARD_HP_2170P=y
@@ -185,7 +198,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2170p"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -247,7 +259,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -264,6 +276,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -288,6 +301,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -311,6 +325,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -379,6 +398,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -402,6 +423,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -420,6 +444,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -454,6 +479,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -475,6 +501,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -531,7 +558,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -657,7 +683,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -679,6 +704,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
index b238d1b0..e3cd7fe5 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="EliteBook 2560p"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
@@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="2560p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2560p"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -157,17 +168,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -185,7 +198,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2560p"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -246,7 +258,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -263,6 +275,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -287,6 +300,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -310,6 +324,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -377,6 +396,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -400,6 +421,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -420,6 +444,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -454,6 +479,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -474,6 +500,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -529,7 +556,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -637,7 +663,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -659,6 +684,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
index 8a65a765..b6b4872e 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="EliteBook 2560p"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
@@ -119,28 +128,30 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="2560p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2560p"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -155,17 +166,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -183,7 +196,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2560p"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -244,7 +256,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,6 +273,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -285,6 +298,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -308,6 +322,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -375,6 +394,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -398,6 +419,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -416,6 +440,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -450,6 +475,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -470,6 +496,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -526,7 +553,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -634,7 +660,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -656,6 +681,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
index 7cb7ec72..fe6c5f1f 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="EliteBook 2570p"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
@@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="2570p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2570p"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -156,17 +167,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -184,7 +197,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2570p"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -245,7 +257,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -262,6 +274,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -286,6 +299,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -309,6 +323,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -376,6 +395,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -399,6 +420,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -419,6 +443,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -452,6 +477,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -472,6 +498,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -523,7 +550,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -631,7 +657,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -653,6 +678,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
index 1ba19c1d..6c8c3d66 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="EliteBook 2570p"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
@@ -119,27 +128,29 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="2570p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2570p"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -154,17 +165,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -182,7 +195,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2570p"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -243,7 +255,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,6 +272,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -284,6 +297,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -307,6 +321,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -374,6 +393,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -397,6 +418,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -415,6 +439,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -448,6 +473,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -468,6 +494,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -520,7 +547,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -628,7 +654,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -650,6 +675,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
index 81ca81de..50f1a616 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,11 +111,12 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="HP Compaq 8200 Elite SFF PC"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="hp/compaq_8200_elite_sff"
+CONFIG_MAINBOARD_DIR="hp/snb_ivb_desktops"
 CONFIG_VGA_BIOS_ID="8086,0106"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -124,27 +132,30 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="compaq_8200_elite_sff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -159,17 +170,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd_4mb"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -183,8 +196,8 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
+CONFIG_BOARD_HP_SNB_IVB_DESKTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -245,7 +258,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -262,6 +275,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -286,6 +300,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -309,6 +324,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -365,6 +385,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -388,6 +410,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -408,6 +433,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -442,6 +468,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -463,6 +490,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -517,7 +545,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -643,7 +670,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -665,6 +691,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
index cacd0278..d9eddf1f 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,11 +111,12 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="HP Compaq 8200 Elite SFF PC"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="hp/compaq_8200_elite_sff"
+CONFIG_MAINBOARD_DIR="hp/snb_ivb_desktops"
 CONFIG_VGA_BIOS_ID="8086,0106"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -122,27 +130,30 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="compaq_8200_elite_sff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -157,17 +168,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd_4mb"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -181,8 +194,8 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
+CONFIG_BOARD_HP_SNB_IVB_DESKTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -243,7 +256,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,6 +273,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -284,6 +298,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -307,6 +322,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -363,6 +383,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -386,6 +408,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -404,6 +429,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -438,6 +464,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -459,6 +486,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -514,7 +542,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -640,7 +667,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -662,6 +688,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
index 44097f5c..f6de97b6 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,11 +111,12 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="HP Compaq 8200 Elite SFF PC"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="hp/compaq_8200_elite_sff"
+CONFIG_MAINBOARD_DIR="hp/snb_ivb_desktops"
 CONFIG_VGA_BIOS_ID="8086,0106"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -124,27 +132,30 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="compaq_8200_elite_sff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -159,17 +170,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -183,8 +196,8 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
+CONFIG_BOARD_HP_SNB_IVB_DESKTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -245,7 +258,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -262,6 +275,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -286,6 +300,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -309,6 +324,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -365,6 +385,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -388,6 +410,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -408,6 +433,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -442,6 +468,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -463,6 +490,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -517,7 +545,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -643,7 +670,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -665,6 +691,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
index c5fb624b..4086601c 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,11 +111,12 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="HP Compaq 8200 Elite SFF PC"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="hp/compaq_8200_elite_sff"
+CONFIG_MAINBOARD_DIR="hp/snb_ivb_desktops"
 CONFIG_VGA_BIOS_ID="8086,0106"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
@@ -122,27 +130,30 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="compaq_8200_elite_sff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -157,17 +168,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -181,8 +194,8 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
+CONFIG_BOARD_HP_SNB_IVB_DESKTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -243,7 +256,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,6 +273,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -284,6 +298,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -307,6 +322,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -363,6 +383,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -386,6 +408,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -404,6 +429,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -438,6 +464,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -459,6 +486,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -514,7 +542,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -640,7 +667,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -662,6 +688,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb b/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
index 16bf95e9..2e3ab0af 100644
--- a/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
@@ -10,13 +10,14 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -56,6 +57,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -67,6 +69,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -74,15 +77,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -103,7 +110,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="EliteBook 820 G2"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -123,23 +132,25 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_MAX_SOCKET=1
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
 CONFIG_DCACHE_RAM_BASE=0xff7c0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -155,17 +166,19 @@ CONFIG_ME_BIN_PATH="../../../vendorfiles/hp820g2/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp820g2/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_PCIEXP_AER=y
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -181,7 +194,6 @@ CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
 CONFIG_EC_HP_KBC1126_GPE=0x6
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
@@ -265,6 +277,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -289,6 +302,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -346,6 +360,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -367,6 +383,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -387,6 +406,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -417,6 +437,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -438,6 +459,7 @@ CONFIG_DRIVERS_UART=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -491,7 +513,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -617,7 +638,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
@@ -637,6 +657,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_REG_SCRIPT=y
 CONFIG_MAX_REBOOT_CNT=3
diff --git a/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode b/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
index ae46144c..cdcee013 100644
--- a/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
@@ -10,13 +10,14 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -56,6 +57,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -67,6 +69,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -74,15 +77,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -103,7 +110,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="EliteBook 820 G2"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -121,23 +130,25 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-CONFIG_MAX_SOCKET=1
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_TPM_PIRQ=0x0
 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
 CONFIG_DCACHE_RAM_BASE=0xff7c0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -153,17 +164,19 @@ CONFIG_ME_BIN_PATH="../../../vendorfiles/hp820g2/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp820g2/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_PCIEXP_AER=y
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -179,7 +192,6 @@ CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
 CONFIG_EC_HP_KBC1126_GPE=0x6
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
@@ -263,6 +275,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -287,6 +300,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -344,6 +358,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -365,6 +381,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -383,6 +402,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -413,6 +433,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -434,6 +455,7 @@ CONFIG_DRIVERS_UART=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -488,7 +510,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -614,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SMBUS is not set
@@ -634,6 +654,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_REG_SCRIPT=y
 CONFIG_MAX_REBOOT_CNT=3
diff --git a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
index 12d0aefd..8b5e7254 100644
--- a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -56,6 +57,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -67,6 +69,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -74,15 +77,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -103,7 +110,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="HP Compaq Elite 8300 CMT"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -123,26 +132,28 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 CMT"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -157,17 +168,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -182,7 +195,6 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 CMT"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -243,7 +255,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,6 +272,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -284,6 +297,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -307,6 +321,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -363,6 +382,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -386,6 +407,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -406,6 +430,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -440,6 +465,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -461,6 +487,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -511,7 +538,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -637,7 +663,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -659,6 +684,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
index cf23e745..2c2e3cc7 100644
--- a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -56,6 +57,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -67,6 +69,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -74,15 +77,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -103,7 +110,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="HP Compaq Elite 8300 CMT"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -121,26 +130,28 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 CMT"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -155,17 +166,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -180,7 +193,6 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 CMT"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -241,7 +253,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,6 +270,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -282,6 +295,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -305,6 +319,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -361,6 +380,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -384,6 +405,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -402,6 +426,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -436,6 +461,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -457,6 +483,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -508,7 +535,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -634,7 +660,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -656,6 +681,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
index c931923e..309d8364 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -56,6 +57,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -67,6 +69,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -74,15 +77,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -103,12 +110,13 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="HP Compaq Elite 8300 USDT"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="hp/compaq_elite_8300_usdt"
-CONFIG_VGA_BIOS_ID="8086,0152"
+CONFIG_MAINBOARD_DIR="hp/snb_ivb_desktops"
+CONFIG_VGA_BIOS_ID="8086,0106"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
@@ -123,26 +131,30 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="compaq_elite_8300_usdt"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 USDT"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -157,17 +169,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -181,8 +195,8 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
+CONFIG_BOARD_HP_SNB_IVB_DESKTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 USDT"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -243,7 +257,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -260,6 +274,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -284,6 +299,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -307,6 +323,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -363,6 +384,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -386,6 +409,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -406,6 +432,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -440,6 +467,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -461,6 +489,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -511,7 +540,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -637,7 +665,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -659,6 +686,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
index 6f639aa3..c099a2f0 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -56,6 +57,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -67,6 +69,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -74,15 +77,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -103,12 +110,13 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="HP Compaq Elite 8300 USDT"
 CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="hp/compaq_elite_8300_usdt"
-CONFIG_VGA_BIOS_ID="8086,0152"
+CONFIG_MAINBOARD_DIR="hp/snb_ivb_desktops"
+CONFIG_VGA_BIOS_ID="8086,0106"
 CONFIG_DIMM_MAX=4
 CONFIG_DIMM_SPD_SIZE=256
 CONFIG_FMDFILE=""
@@ -121,26 +129,30 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="compaq_elite_8300_usdt"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 USDT"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -155,17 +167,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -179,8 +193,8 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
 # CONFIG_BOARD_HP_FOLIO_9470M is not set
 # CONFIG_BOARD_HP_PROBOOK_6360B is not set
 # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
+CONFIG_BOARD_HP_SNB_IVB_DESKTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 USDT"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -241,7 +255,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -258,6 +272,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -282,6 +297,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -305,6 +321,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -361,6 +382,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -384,6 +407,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -402,6 +428,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -436,6 +463,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -457,6 +485,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -508,7 +537,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -634,7 +662,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -656,6 +683,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
index eacdf0c2..e3f48f7b 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="EliteBook 8460p"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
@@ -123,28 +132,30 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="8460p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8460p"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -159,17 +170,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -187,7 +200,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8460p"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -249,7 +261,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -266,6 +278,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -290,6 +303,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -313,6 +327,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -381,6 +400,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -404,6 +425,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -424,6 +448,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -458,6 +483,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -479,6 +505,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -534,7 +561,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -660,7 +686,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -682,6 +707,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
index d4ad6fd6..8433054e 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="EliteBook 8460p"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
@@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="8460p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8460p"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -157,17 +168,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -185,7 +198,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8460p"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -247,7 +259,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -264,6 +276,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -288,6 +301,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -311,6 +325,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -379,6 +398,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -402,6 +423,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -420,6 +444,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -454,6 +479,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -475,6 +501,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -531,7 +558,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -657,7 +683,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -679,6 +704,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
index f4c3c3eb..3ba1a3e4 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="EliteBook 8470p"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
@@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="8470p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8470p"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -158,17 +169,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -186,7 +199,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8470p"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -248,7 +260,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -265,6 +277,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -289,6 +302,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -312,6 +326,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -380,6 +399,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -403,6 +424,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -423,6 +447,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -456,6 +481,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -477,6 +503,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -528,7 +555,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -654,7 +680,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -676,6 +701,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
index 959016ae..eb1318b3 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="EliteBook 8470p"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
@@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="8470p"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8470p"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -156,17 +167,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -184,7 +197,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8470p"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -246,7 +258,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -263,6 +275,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -287,6 +300,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -310,6 +324,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -378,6 +397,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -401,6 +422,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -419,6 +443,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -452,6 +477,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -473,6 +499,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -525,7 +552,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -651,7 +677,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -673,6 +698,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp8560w_8mb/config/normal b/config/coreboot/hp8560w_8mb/config/normal
index c332d78e..577487c4 100644
--- a/config/coreboot/hp8560w_8mb/config/normal
+++ b/config/coreboot/hp8560w_8mb/config/normal
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -56,6 +57,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -67,6 +69,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -74,15 +77,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -103,7 +110,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="EliteBook 8560w"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
@@ -120,27 +129,29 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="8560w"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=1
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8560w"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -155,17 +166,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -183,7 +196,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8560w"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -244,7 +256,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,6 +273,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -285,6 +298,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -308,6 +322,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -376,6 +395,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -399,6 +420,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -438,6 +462,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -459,6 +484,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -502,7 +528,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -628,7 +653,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -645,6 +669,13 @@ CONFIG_HAVE_EM100_SUPPORT=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
index 43003291..06d1ad6f 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="EliteBook Folio 9470m"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
@@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="folio_9470m"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=0
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook Folio 9470m"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -157,17 +168,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -185,7 +198,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook Folio 9470m"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -246,7 +258,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -263,6 +275,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -287,6 +300,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -310,6 +324,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -377,6 +396,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -400,6 +421,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -420,6 +444,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -454,6 +479,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -474,6 +500,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -529,7 +556,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -637,7 +663,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -659,6 +684,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
index 42c7eeba..e345c0ea 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="EliteBook Folio 9470m"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
@@ -119,28 +128,30 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="folio_9470m"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=0
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook Folio 9470m"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -155,17 +166,19 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_BOARD_HP_280_G2 is not set
-# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
 # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
-# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
 # CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3400_SERIES is not set
 # CONFIG_BOARD_HP_PRO_3500_SERIES is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set
+# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set
+# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
 # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
 # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
 # CONFIG_BOARD_HP_2170P is not set
@@ -183,7 +196,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
 CONFIG_EC_HP_KBC1126_GPE=0x16
 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook Folio 9470m"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -244,7 +256,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -261,6 +273,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -285,6 +298,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -308,6 +322,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -375,6 +394,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -398,6 +419,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -416,6 +440,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -450,6 +475,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -470,6 +496,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -526,7 +553,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -634,7 +660,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -656,6 +681,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/macbook11/config/libgfxinit_corebootfb b/config/coreboot/macbook11/config/libgfxinit_corebootfb
index ca0b9853..05adff10 100644
--- a/config/coreboot/macbook11/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 CONFIG_VENDOR_APPLE=y
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Macbook1,1"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -120,9 +129,9 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
@@ -132,15 +141,17 @@ CONFIG_BOARD_APPLE_MACBOOK11=y
 # CONFIG_BOARD_APPLE_IMAC52 is not set
 # CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -150,12 +161,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -211,7 +220,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -226,6 +235,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -256,6 +266,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -311,6 +322,8 @@ CONFIG_RCBA_LENGTH=0x4000
 # Embedded Controllers
 #
 CONFIG_EC_ACPI=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -334,6 +347,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -354,6 +370,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -385,6 +402,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -402,6 +420,7 @@ CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -550,7 +569,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -564,6 +582,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/macbook11/config/libgfxinit_txtmode b/config/coreboot/macbook11/config/libgfxinit_txtmode
index 26d073be..eeeec636 100644
--- a/config/coreboot/macbook11/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 CONFIG_VENDOR_APPLE=y
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Macbook1,1"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -120,9 +129,9 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
@@ -132,15 +141,17 @@ CONFIG_BOARD_APPLE_MACBOOK11=y
 # CONFIG_BOARD_APPLE_IMAC52 is not set
 # CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -150,12 +161,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -211,7 +220,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -226,6 +235,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -256,6 +266,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -311,6 +322,8 @@ CONFIG_RCBA_LENGTH=0x4000
 # Embedded Controllers
 #
 CONFIG_EC_ACPI=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -334,6 +347,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -352,6 +368,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -383,6 +400,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -400,6 +418,7 @@ CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -548,7 +567,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -562,6 +580,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
index 0cc0a9ec..fb59ec23 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -56,6 +57,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 CONFIG_VENDOR_APPLE=y
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -67,6 +69,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -74,15 +77,19 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -103,7 +110,9 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Macbook1,1"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -119,9 +128,9 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
@@ -131,15 +140,17 @@ CONFIG_BOARD_APPLE_MACBOOK11=y
 # CONFIG_BOARD_APPLE_IMAC52 is not set
 # CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -149,12 +160,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -210,7 +219,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -225,6 +234,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -255,6 +265,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -310,6 +321,8 @@ CONFIG_RCBA_LENGTH=0x4000
 # Embedded Controllers
 #
 CONFIG_EC_ACPI=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -333,6 +346,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -353,6 +369,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -384,6 +401,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -401,6 +419,7 @@ CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -549,7 +568,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -564,6 +582,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
index 735a7be0..85bf19a5 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -56,6 +57,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 CONFIG_VENDOR_APPLE=y
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -67,6 +69,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -74,15 +77,19 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -103,7 +110,9 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="Macbook1,1"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -119,9 +128,9 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
@@ -131,15 +140,17 @@ CONFIG_BOARD_APPLE_MACBOOK11=y
 # CONFIG_BOARD_APPLE_IMAC52 is not set
 # CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -149,12 +160,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -210,7 +219,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -225,6 +234,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -255,6 +265,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -310,6 +321,8 @@ CONFIG_RCBA_LENGTH=0x4000
 # Embedded Controllers
 #
 CONFIG_EC_ACPI=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -333,6 +346,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -351,6 +367,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -382,6 +399,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -399,6 +417,7 @@ CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -547,7 +566,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -562,6 +580,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/macbook21/config/libgfxinit_corebootfb b/config/coreboot/macbook21/config/libgfxinit_corebootfb
index 9dc95583..b0c91265 100644
--- a/config/coreboot/macbook21/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 CONFIG_VENDOR_APPLE=y
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="MacBook2,1"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -120,9 +129,9 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
@@ -132,15 +141,17 @@ CONFIG_BOARD_APPLE_MACBOOK21=y
 # CONFIG_BOARD_APPLE_IMAC52 is not set
 # CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -150,12 +161,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -211,7 +220,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -226,6 +235,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -256,6 +266,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -311,6 +322,8 @@ CONFIG_RCBA_LENGTH=0x4000
 # Embedded Controllers
 #
 CONFIG_EC_ACPI=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -334,6 +347,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -354,6 +370,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -385,6 +402,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -402,6 +420,7 @@ CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -550,7 +569,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -564,6 +582,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/macbook21/config/libgfxinit_txtmode b/config/coreboot/macbook21/config/libgfxinit_txtmode
index e73ddf4e..b3394b50 100644
--- a/config/coreboot/macbook21/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 CONFIG_VENDOR_APPLE=y
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="MacBook2,1"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -120,9 +129,9 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
@@ -132,15 +141,17 @@ CONFIG_BOARD_APPLE_MACBOOK21=y
 # CONFIG_BOARD_APPLE_IMAC52 is not set
 # CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -150,12 +161,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -211,7 +220,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -226,6 +235,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -256,6 +266,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -311,6 +322,8 @@ CONFIG_RCBA_LENGTH=0x4000
 # Embedded Controllers
 #
 CONFIG_EC_ACPI=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -334,6 +347,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -352,6 +368,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -383,6 +400,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -400,6 +418,7 @@ CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -548,7 +567,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -562,6 +580,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
index d760ec5e..ba14e7cc 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -56,6 +57,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 CONFIG_VENDOR_APPLE=y
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -67,6 +69,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -74,15 +77,19 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -103,7 +110,9 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="MacBook2,1"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -119,9 +128,9 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
@@ -131,15 +140,17 @@ CONFIG_BOARD_APPLE_MACBOOK21=y
 # CONFIG_BOARD_APPLE_IMAC52 is not set
 # CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -149,12 +160,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -210,7 +219,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -225,6 +234,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -255,6 +265,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -310,6 +321,8 @@ CONFIG_RCBA_LENGTH=0x4000
 # Embedded Controllers
 #
 CONFIG_EC_ACPI=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -333,6 +346,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -353,6 +369,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -384,6 +401,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -401,6 +419,7 @@ CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -549,7 +568,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -564,6 +582,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
index 1533d3c6..e2036017 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -56,6 +57,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 CONFIG_VENDOR_APPLE=y
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -67,6 +69,7 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -74,15 +77,19 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -103,7 +110,9 @@ CONFIG_VENDOR_APPLE=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="MacBook2,1"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -119,9 +128,9 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
@@ -131,15 +140,17 @@ CONFIG_BOARD_APPLE_MACBOOK21=y
 # CONFIG_BOARD_APPLE_IMAC52 is not set
 # CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -149,12 +160,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -210,7 +219,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -225,6 +234,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -255,6 +265,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -310,6 +321,8 @@ CONFIG_RCBA_LENGTH=0x4000
 # Embedded Controllers
 #
 CONFIG_EC_ACPI=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -333,6 +346,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -351,6 +367,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -382,6 +399,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -399,6 +417,7 @@ CONFIG_SPI_FLASH_ISSI=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -547,7 +566,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -562,6 +580,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
index 909ab29e..2a1f9f08 100644
--- a/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
@@ -9,13 +9,15 @@
 CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
-# CONFIG_ALLOW_EXPERIMENTAL_CLANG is not set
+# CONFIG_COMPILER_LLVM_CLANG is not set
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_COMPRESS_PRERAM_STAGES=y
@@ -53,6 +55,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -64,6 +67,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 CONFIG_VENDOR_EMULATION=y
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -71,15 +75,19 @@ CONFIG_VENDOR_EMULATION=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -100,7 +108,9 @@ CONFIG_VENDOR_EMULATION=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="QEMU AArch64"
 CONFIG_MAINBOARD_DIR="emulation/qemu-aarch64"
@@ -115,15 +125,20 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
-CONFIG_MAX_SOCKET=1
+CONFIG_ARM64_CURRENT_EL=3
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0x4010000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/mainboard/emulation/qemu-aarch64/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_DRAM_SIZE_MB=261120
 # CONFIG_CONSOLE_POST is not set
+CONFIG_MAX_SOCKET=1
 CONFIG_BOARD_EMULATION_QEMU_AARCH64=y
 # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
 # CONFIG_BOARD_EMULATION_QEMU_X86_I440FX is not set
@@ -134,15 +149,9 @@ CONFIG_BOARD_EMULATION_QEMU_AARCH64=y
 # CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set
 # CONFIG_BOARD_EMULATION_QEMU_SBSA is not set
 # CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0x4010000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=256
-CONFIG_PCI_IOBASE=0x3eff0000
-CONFIG_MEMLAYOUT_LD_FILE="src/mainboard/emulation/qemu-aarch64/memlayout.ld"
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
-CONFIG_ARM64_CURRENT_EL=3
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
@@ -216,6 +225,8 @@ CONFIG_RCBA_LENGTH=0x4000
 #
 # Embedded Controllers
 #
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_ARM64=y
 CONFIG_ARCH_BOOTBLOCK_ARM64=y
 CONFIG_ARCH_VERSTAGE_ARM64=y
@@ -245,6 +256,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -269,11 +281,13 @@ CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_OPTION_CFR is not set
 CONFIG_DRIVERS_UART=y
 CONFIG_HAVE_UART_SPECIAL=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 CONFIG_DRIVERS_UART_PL011=y
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -375,6 +389,7 @@ CONFIG_HAVE_MONOTONIC_TIMER=y
 # Payload
 #
 CONFIG_PAYLOAD_NONE=y
+# CONFIG_PAYLOAD_FIT_SUPPORT is not set
 # end of Payload
 
 #
@@ -397,7 +412,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 # CONFIG_DEBUG_MALLOC is not set
 # CONFIG_DEBUG_CONSOLE_INIT is not set
@@ -406,8 +420,16 @@ CONFIG_PAYLOAD_NONE=y
 # end of Debugging
 
 CONFIG_MISSING_BOARD_RESET=y
+CONFIG_FLATTENED_DEVICE_TREE=y
 CONFIG_DECOMPRESS_OFAST=y
 CONFIG_PROBE_RAM=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_NO_XIP_EARLY_STAGES=y
diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
index 951bd326..c13b2214 100644
--- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 CONFIG_VENDOR_EMULATION=y
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -76,15 +79,19 @@ CONFIG_VENDOR_EMULATION=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -105,7 +112,9 @@ CONFIG_VENDOR_EMULATION=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="QEMU x86 i440fx/piix4"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -122,20 +131,23 @@ CONFIG_MAX_CPUS=4
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VBOOT_VBNV_OFFSET=0x2c
 CONFIG_IRQ_SLOT_COUNT=6
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="QEMU"
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set
 # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
 CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
@@ -146,7 +158,6 @@ CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
 # CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set
 # CONFIG_BOARD_EMULATION_QEMU_SBSA is not set
 # CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0x10000
 CONFIG_DCACHE_RAM_SIZE=0x90000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
@@ -154,9 +165,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -213,6 +222,7 @@ CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -230,6 +240,7 @@ CONFIG_UNKNOWN_TSC_RATE=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_NO_SMM=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
@@ -256,6 +267,8 @@ CONFIG_RCBA_LENGTH=0x4000
 #
 # Embedded Controllers
 #
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -273,11 +286,17 @@ CONFIG_POSTCAR_STAGE=y
 CONFIG_BOOTBLOCK_SIMPLE=y
 # CONFIG_BOOTBLOCK_NORMAL is not set
 CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_IDT_IN_EVERY_STAGE=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -297,6 +316,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -322,6 +342,8 @@ CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
@@ -329,6 +351,7 @@ CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y
 CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y
 CONFIG_DRIVERS_EMULATION_QEMU_XRES=800
 CONFIG_DRIVERS_EMULATION_QEMU_YRES=600
+CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG=y
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -392,6 +415,7 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 
 #
 # Console
@@ -484,7 +508,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 # CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
@@ -497,6 +520,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 
 CONFIG_DECOMPRESS_OFAST=y
 CONFIG_PROBE_RAM=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
index 64afd0a0..e09b9ca6 100644
--- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 CONFIG_VENDOR_EMULATION=y
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -76,15 +79,19 @@ CONFIG_VENDOR_EMULATION=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -105,7 +112,9 @@ CONFIG_VENDOR_EMULATION=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="QEMU x86 i440fx/piix4"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -122,20 +131,23 @@ CONFIG_MAX_CPUS=4
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VBOOT_VBNV_OFFSET=0x2c
 CONFIG_IRQ_SLOT_COUNT=6
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="QEMU"
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set
 # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
 CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
@@ -146,7 +158,6 @@ CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
 # CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set
 # CONFIG_BOARD_EMULATION_QEMU_SBSA is not set
 # CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0x10000
 CONFIG_DCACHE_RAM_SIZE=0x90000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
@@ -154,9 +165,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -213,6 +222,7 @@ CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -230,6 +240,7 @@ CONFIG_UNKNOWN_TSC_RATE=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_NO_SMM=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
@@ -256,6 +267,8 @@ CONFIG_RCBA_LENGTH=0x4000
 #
 # Embedded Controllers
 #
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -273,11 +286,17 @@ CONFIG_POSTCAR_STAGE=y
 CONFIG_BOOTBLOCK_SIMPLE=y
 # CONFIG_BOOTBLOCK_NORMAL is not set
 CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_IDT_IN_EVERY_STAGE=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -295,6 +314,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -320,11 +340,14 @@ CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
 CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y
 CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y
+CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG=y
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -388,6 +411,7 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 
 #
 # Console
@@ -480,7 +504,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 # CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
@@ -493,6 +516,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 
 CONFIG_DECOMPRESS_OFAST=y
 CONFIG_PROBE_RAM=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_corebootfb
index 951bd326..c13b2214 100644
--- a/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 CONFIG_VENDOR_EMULATION=y
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -76,15 +79,19 @@ CONFIG_VENDOR_EMULATION=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -105,7 +112,9 @@ CONFIG_VENDOR_EMULATION=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="QEMU x86 i440fx/piix4"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -122,20 +131,23 @@ CONFIG_MAX_CPUS=4
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VBOOT_VBNV_OFFSET=0x2c
 CONFIG_IRQ_SLOT_COUNT=6
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="QEMU"
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set
 # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
 CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
@@ -146,7 +158,6 @@ CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
 # CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set
 # CONFIG_BOARD_EMULATION_QEMU_SBSA is not set
 # CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0x10000
 CONFIG_DCACHE_RAM_SIZE=0x90000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
@@ -154,9 +165,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -213,6 +222,7 @@ CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -230,6 +240,7 @@ CONFIG_UNKNOWN_TSC_RATE=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_NO_SMM=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
@@ -256,6 +267,8 @@ CONFIG_RCBA_LENGTH=0x4000
 #
 # Embedded Controllers
 #
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -273,11 +286,17 @@ CONFIG_POSTCAR_STAGE=y
 CONFIG_BOOTBLOCK_SIMPLE=y
 # CONFIG_BOOTBLOCK_NORMAL is not set
 CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_IDT_IN_EVERY_STAGE=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -297,6 +316,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -322,6 +342,8 @@ CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
@@ -329,6 +351,7 @@ CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y
 CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y
 CONFIG_DRIVERS_EMULATION_QEMU_XRES=800
 CONFIG_DRIVERS_EMULATION_QEMU_YRES=600
+CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG=y
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -392,6 +415,7 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 
 #
 # Console
@@ -484,7 +508,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 # CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
@@ -497,6 +520,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 
 CONFIG_DECOMPRESS_OFAST=y
 CONFIG_PROBE_RAM=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_txtmode b/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_txtmode
index 64afd0a0..e09b9ca6 100644
--- a/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 CONFIG_VENDOR_EMULATION=y
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -76,15 +79,19 @@ CONFIG_VENDOR_EMULATION=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -105,7 +112,9 @@ CONFIG_VENDOR_EMULATION=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_PART_NUMBER="QEMU x86 i440fx/piix4"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -122,20 +131,23 @@ CONFIG_MAX_CPUS=4
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_VBOOT_VBNV_OFFSET=0x2c
 CONFIG_IRQ_SLOT_COUNT=6
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="QEMU"
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
-# CONFIG_CONSOLE_POST is not set
 # CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set
 # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
 CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
@@ -146,7 +158,6 @@ CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
 # CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set
 # CONFIG_BOARD_EMULATION_QEMU_SBSA is not set
 # CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0x10000
 CONFIG_DCACHE_RAM_SIZE=0x90000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
@@ -154,9 +165,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -213,6 +222,7 @@ CONFIG_INTEL_GMA_BCLM_WIDTH=16
 CONFIG_BOOTBLOCK_IN_CBFS=y
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -230,6 +240,7 @@ CONFIG_UNKNOWN_TSC_RATE=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_NO_SMM=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
 CONFIG_SMP=y
@@ -256,6 +267,8 @@ CONFIG_RCBA_LENGTH=0x4000
 #
 # Embedded Controllers
 #
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -273,11 +286,17 @@ CONFIG_POSTCAR_STAGE=y
 CONFIG_BOOTBLOCK_SIMPLE=y
 # CONFIG_BOOTBLOCK_NORMAL is not set
 CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_IDT_IN_EVERY_STAGE=y
 CONFIG_HAVE_CF9_RESET=y
 CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -295,6 +314,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -320,11 +340,14 @@ CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # Generic Drivers
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
 CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y
 CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y
+CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG=y
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -388,6 +411,7 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y
 CONFIG_HAVE_ACPI_TABLES=y
 CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
 
 #
 # Console
@@ -480,7 +504,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 # CONFIG_DEBUG_PIRQ is not set
 CONFIG_HAVE_DEBUG_SMBUS=y
@@ -493,6 +516,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 
 CONFIG_DECOMPRESS_OFAST=y
 CONFIG_PROBE_RAM=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
index 9a1af842..cdc695c2 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad R400"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad R400"
@@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -263,7 +273,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -278,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -377,6 +389,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -401,6 +415,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -421,6 +438,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -454,6 +472,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -473,11 +492,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -649,7 +670,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -671,6 +691,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_txtmode b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
index d2bd1d3c..91ba135b 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad R400"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad R400"
@@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -261,7 +271,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -276,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -303,6 +314,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -375,6 +387,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -399,6 +413,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -417,6 +434,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -450,6 +468,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -469,11 +488,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -645,7 +666,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -667,6 +687,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
index 93499bad..0a4c166c 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad R400"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad R400"
@@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -263,7 +273,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -278,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -377,6 +389,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -401,6 +415,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -421,6 +438,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -454,6 +472,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -473,11 +492,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -649,7 +670,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -671,6 +691,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_txtmode b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
index 3bbf7aaa..97470cd1 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad R400"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad R400"
@@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -261,7 +271,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -276,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -303,6 +314,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -375,6 +387,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -399,6 +413,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -417,6 +434,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -450,6 +468,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -469,11 +488,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -645,7 +666,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -667,6 +687,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
index 4faef26a..c545969e 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad R400"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad R400"
@@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -263,7 +273,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -278,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -377,6 +389,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -401,6 +415,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -421,6 +438,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -454,6 +472,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -473,11 +492,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -649,7 +670,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -671,6 +691,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_txtmode b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
index 21b32616..f34e0708 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad R400"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad R400"
@@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_R400=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -261,7 +271,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -276,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -303,6 +314,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -375,6 +387,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -399,6 +413,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -417,6 +434,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -450,6 +468,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -469,11 +488,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -645,7 +666,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -667,6 +687,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
index 2d7e0b54..b728673f 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad R500"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad R500"
@@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="r500"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R500"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -158,12 +169,10 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd_nogbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R500"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -171,7 +180,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -206,7 +217,6 @@ CONFIG_BOARD_LENOVO_R500=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -262,7 +272,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -277,6 +287,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -304,6 +315,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -374,6 +386,8 @@ CONFIG_EC_LENOVO_PMH7=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -398,6 +412,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -418,6 +435,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -451,6 +469,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -470,11 +489,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -646,7 +667,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -668,6 +688,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_txtmode b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
index 8d437bd5..938de455 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad R500"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad R500"
@@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="r500"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R500"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -156,12 +167,10 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd_nogbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R500"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -169,7 +178,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -204,7 +215,6 @@ CONFIG_BOARD_LENOVO_R500=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -260,7 +270,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -275,6 +285,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -302,6 +313,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,6 +384,8 @@ CONFIG_EC_LENOVO_PMH7=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -396,6 +410,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -414,6 +431,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -447,6 +465,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -466,11 +485,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -642,7 +663,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -664,6 +684,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index e7358991..12d52087 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 # CONFIG_VENDOR_LENOVO is not set
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_PART_NUMBER="Precision T1650"
 CONFIG_MAINBOARD_VERSION="1.0"
 CONFIG_MAINBOARD_DIR="dell/snb_ivb_workstations"
@@ -121,28 +130,34 @@ CONFIG_MAX_CPUS=8
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="variants/baseboard/devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="precision_t1650"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="variants/baseboard/devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
 CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Precision T1650"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
@@ -162,9 +177,6 @@ CONFIG_BOARD_DELL_PRECISION_T1650=y
 CONFIG_BOARD_DELL_SNB_IVB_WORKSTATIONS=y
 CONFIG_INCLUDE_SMSC_SCH5545_EC_FW=y
 CONFIG_SMSC_SCH5545_EC_FW_FILE="../../../vendorfiles/t1650/sch5545ec.bin"
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -179,12 +191,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/t1650/12_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/t1650/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/t1650/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Precision T1650"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -245,7 +255,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -262,6 +272,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -286,6 +297,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -309,6 +321,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -364,6 +381,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -387,6 +406,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -405,6 +427,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -439,6 +462,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -460,6 +484,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -515,7 +540,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -641,7 +665,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -663,6 +686,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
index bda47e12..7e85c093 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T400"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T400"
@@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -263,7 +273,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -278,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -377,6 +389,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -401,6 +415,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -421,6 +438,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -454,6 +472,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -473,11 +492,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -649,7 +670,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -671,6 +691,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_txtmode b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
index 92866ae0..ba52b0fa 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T400"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T400"
@@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -261,7 +271,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -276,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -303,6 +314,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -375,6 +387,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -399,6 +413,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -417,6 +434,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -450,6 +468,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -469,11 +488,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -645,7 +666,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -667,6 +687,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
index c25f6b21..1b4db730 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T400"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T400"
@@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -263,7 +273,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -278,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -377,6 +389,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -401,6 +415,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -421,6 +438,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -454,6 +472,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -473,11 +492,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -649,7 +670,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -671,6 +691,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_txtmode b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
index 3eb566f6..392f8112 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T400"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T400"
@@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -261,7 +271,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -276,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -303,6 +314,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -375,6 +387,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -399,6 +413,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -417,6 +434,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -450,6 +468,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -469,11 +488,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -645,7 +666,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -667,6 +687,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
index a23aa0d7..624dac6c 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T400"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T400"
@@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -263,7 +273,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -278,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -377,6 +389,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -401,6 +415,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -421,6 +438,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -454,6 +472,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -473,11 +492,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -649,7 +670,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -671,6 +691,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_txtmode b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
index da7785f7..734e4af7 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T400"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T400"
@@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -261,7 +271,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -276,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -303,6 +314,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -375,6 +387,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -399,6 +413,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -417,6 +434,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -450,6 +468,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -469,11 +488,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -645,7 +666,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -667,6 +687,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
index 31a79444..13ca5ecd 100644
--- a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T420"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T420"
@@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T420"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
@@ -159,12 +170,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T420"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_T420=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -265,7 +275,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -282,6 +292,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -306,6 +317,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -329,6 +341,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -391,6 +408,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -414,6 +433,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -434,6 +456,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -468,6 +491,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -489,11 +513,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -546,7 +572,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -655,7 +680,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -676,6 +700,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
index 21d4a5ff..3c54ea8e 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T420s"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T420s"
@@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T420s"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
@@ -159,12 +170,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T420s"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_T420S=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -265,7 +275,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -282,6 +292,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -306,6 +317,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -329,6 +341,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -391,6 +408,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -414,6 +433,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -434,6 +456,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -468,6 +491,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -489,11 +513,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -545,7 +571,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -654,7 +679,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -676,6 +700,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
index 6f060940..70cbc037 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T420s"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T420s"
@@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T420s"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
@@ -157,12 +168,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T420s"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_T420S=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -263,7 +273,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -280,6 +290,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -304,6 +315,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -327,6 +339,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -389,6 +406,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -412,6 +431,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -430,6 +452,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -464,6 +487,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -485,11 +509,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -542,7 +568,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -651,7 +676,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -673,6 +697,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
index 62fbf932..14e33fe5 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T430"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T430"
@@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T430"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -158,12 +169,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T430"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -171,7 +180,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -265,7 +275,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -282,6 +292,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -306,6 +317,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -329,6 +341,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -391,6 +408,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -414,6 +433,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -434,6 +456,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -468,6 +491,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -489,11 +513,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -546,7 +572,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -655,7 +680,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -676,6 +700,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_txtmode b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
index 5610ea5e..1bfd6823 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T430"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T430"
@@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T430"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -156,12 +167,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T430"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -169,7 +178,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -263,7 +273,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -280,6 +290,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -304,6 +315,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -327,6 +339,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -389,6 +406,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -412,6 +431,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -430,6 +452,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -464,6 +487,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -485,11 +509,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -543,7 +569,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -652,7 +677,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -673,6 +697,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
index 19816005..44f4dda1 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -76,15 +79,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -105,7 +112,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_FAMILY="ThinkPad T440p"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T440p"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t440p"
 CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xff7c0000
 CONFIG_DCACHE_RAM_SIZE=0x40000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -160,17 +171,17 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -264,7 +275,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -283,6 +294,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -307,6 +319,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -386,6 +399,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -408,6 +423,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -428,6 +446,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -459,6 +478,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -481,6 +501,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -536,7 +557,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -646,7 +666,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -668,6 +687,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
index d9627c4e..d2d02c77 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -76,15 +79,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -105,7 +112,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_FAMILY="ThinkPad T440p"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T440p"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t440p"
 CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xff7c0000
 CONFIG_DCACHE_RAM_SIZE=0x40000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -158,17 +169,17 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -262,7 +273,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -281,6 +292,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +317,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -384,6 +397,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -406,6 +421,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -424,6 +442,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -455,6 +474,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -477,6 +497,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -533,7 +554,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -643,7 +663,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -665,6 +684,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
index 951668c7..57d15b49 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T500"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T500"
@@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -263,7 +273,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -278,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -377,6 +389,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -401,6 +415,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -421,6 +438,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -454,6 +472,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -473,11 +492,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -649,7 +670,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -671,6 +691,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_txtmode b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
index c1ed36e9..13769f7e 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T500"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T500"
@@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -261,7 +271,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -276,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -303,6 +314,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -375,6 +387,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -399,6 +413,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -417,6 +434,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -450,6 +468,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -469,11 +488,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -645,7 +666,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -667,6 +687,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
index e090a1cc..532741dd 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T500"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T500"
@@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -263,7 +273,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -278,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -377,6 +389,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -401,6 +415,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -421,6 +438,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -454,6 +472,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -473,11 +492,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -649,7 +670,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -671,6 +691,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_txtmode b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
index 4d6a6fa9..257c908e 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T500"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T500"
@@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -261,7 +271,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -276,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -303,6 +314,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -375,6 +387,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -399,6 +413,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -417,6 +434,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -450,6 +468,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -469,11 +488,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -645,7 +666,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -667,6 +687,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
index 2020124c..ff076154 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T500"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T500"
@@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -263,7 +273,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -278,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -377,6 +389,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -401,6 +415,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -421,6 +438,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -454,6 +472,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -473,11 +492,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -649,7 +670,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -671,6 +691,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_txtmode b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
index 80830324..08c9236b 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T500"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T500"
@@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -261,7 +271,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -276,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -303,6 +314,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -375,6 +387,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -399,6 +413,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -417,6 +434,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -450,6 +468,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -469,11 +488,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -645,7 +666,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -667,6 +687,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
index c83c43ba..483bd813 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_FAMILY="ThinkPad T520"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T520"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -122,28 +131,30 @@ CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t520"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T520"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
@@ -159,12 +170,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T520"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_T520=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -266,7 +276,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -283,6 +293,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -307,6 +318,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -330,6 +342,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -392,6 +409,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -415,6 +434,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -435,6 +457,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -469,6 +492,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -490,11 +514,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -546,7 +572,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -655,7 +680,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -676,6 +700,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_txtmode b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
index de062a35..af2d7b88 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_FAMILY="ThinkPad T520"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T520"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -120,28 +129,30 @@ CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t520"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T520"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
@@ -157,12 +168,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T520"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_T520=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -264,7 +274,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -281,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -328,6 +340,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -390,6 +407,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -413,6 +432,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -431,6 +453,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -465,6 +488,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -486,11 +510,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -543,7 +569,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -652,7 +677,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -673,6 +697,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
index 2558ee17..3319154f 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_FAMILY="ThinkPad T530"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T530"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -122,28 +131,30 @@ CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t530"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T530"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -158,12 +169,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T530"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -171,7 +180,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_T530=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0071"
 CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -266,7 +276,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -283,6 +293,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -307,6 +318,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -330,6 +342,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -392,6 +409,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -415,6 +434,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -435,6 +457,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -469,6 +492,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -490,11 +514,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -546,7 +572,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -655,7 +680,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -676,6 +700,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_txtmode b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
index 999b6632..9e967473 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_FAMILY="ThinkPad T530"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T530"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -120,28 +129,30 @@ CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t530"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T530"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -156,12 +167,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T530"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -169,7 +178,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_T530=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0071"
 CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -264,7 +274,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -281,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -328,6 +340,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -390,6 +407,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -413,6 +432,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -431,6 +453,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -465,6 +488,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -486,11 +510,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -543,7 +569,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -652,7 +677,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -673,6 +697,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
index 2568061d..28f13fd7 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T60"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T60"
@@ -123,25 +132,27 @@ CONFIG_MAX_CPUS=2
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t60"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -151,19 +162,19 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -198,7 +209,6 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -253,7 +263,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -268,6 +278,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -298,6 +309,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -362,6 +374,8 @@ CONFIG_EC_LENOVO_H8=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -385,6 +399,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -405,6 +422,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -437,6 +455,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -455,11 +474,13 @@ CONFIG_DRIVERS_UART=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_DRIVERS_I2C_CK505=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
@@ -626,7 +647,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -641,6 +661,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
index 0092e5fd..4f937d8f 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T60"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T60"
@@ -123,25 +132,27 @@ CONFIG_MAX_CPUS=2
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t60"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -151,19 +162,19 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -198,7 +209,6 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -253,7 +263,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -268,6 +278,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -298,6 +309,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -362,6 +374,8 @@ CONFIG_EC_LENOVO_H8=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -385,6 +399,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -403,6 +420,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -435,6 +453,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -453,11 +472,13 @@ CONFIG_DRIVERS_UART=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_DRIVERS_I2C_CK505=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
@@ -624,7 +645,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -639,6 +659,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
index b1cc51c6..46f8756c 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T60"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T60"
@@ -123,25 +132,27 @@ CONFIG_MAX_CPUS=2
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t60"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -151,19 +162,19 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -198,7 +209,6 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -253,7 +263,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -268,6 +278,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -298,6 +309,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -362,6 +374,8 @@ CONFIG_EC_LENOVO_H8=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -385,6 +399,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -405,6 +422,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -437,6 +455,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -455,11 +474,13 @@ CONFIG_DRIVERS_UART=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_DRIVERS_I2C_CK505=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
@@ -626,7 +647,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -641,6 +661,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
index 1b4b4202..023ab331 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad T60"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T60"
@@ -123,25 +132,27 @@ CONFIG_MAX_CPUS=2
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t60"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -151,19 +162,19 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -198,7 +209,6 @@ CONFIG_BOARD_LENOVO_T60=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM0057"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -253,7 +263,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -268,6 +278,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -298,6 +309,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -362,6 +374,8 @@ CONFIG_EC_LENOVO_H8=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -385,6 +399,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -403,6 +420,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -435,6 +453,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -453,11 +472,13 @@ CONFIG_DRIVERS_UART=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_DRIVERS_I2C_CK505=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
@@ -624,7 +645,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -639,6 +659,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
index d8642c08..2fe11eda 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad W500"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W500"
@@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -263,7 +273,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -278,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -377,6 +389,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -401,6 +415,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -421,6 +438,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -454,6 +472,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -473,11 +492,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -649,7 +670,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -671,6 +691,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_txtmode b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
index 6e094553..9fd9d795 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad W500"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W500"
@@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -261,7 +271,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -276,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -303,6 +314,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -375,6 +387,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -399,6 +413,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -417,6 +434,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -450,6 +468,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -469,11 +488,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -645,7 +666,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -667,6 +687,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
index 0e2b4963..8f570ea6 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad W500"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W500"
@@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -263,7 +273,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -278,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -377,6 +389,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -401,6 +415,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -421,6 +438,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -454,6 +472,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -473,11 +492,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -649,7 +670,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -671,6 +691,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_txtmode b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
index bc35cd23..65133cc3 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad W500"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W500"
@@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -261,7 +271,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -276,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -303,6 +314,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -375,6 +387,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -399,6 +413,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -417,6 +434,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -450,6 +468,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -469,11 +488,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -645,7 +666,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -667,6 +687,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
index ed2cd9ef..52537b8a 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad W500"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W500"
@@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -263,7 +273,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -278,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -377,6 +389,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -401,6 +415,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -421,6 +438,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -454,6 +472,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -473,11 +492,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -649,7 +670,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -671,6 +691,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_txtmode b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
index e998c77b..17b11b03 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad W500"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W500"
@@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="t400"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_W500=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -261,7 +271,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -276,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -303,6 +314,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -375,6 +387,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -399,6 +413,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -417,6 +434,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -450,6 +468,7 @@ CONFIG_USE_DDR2=y
 #
 CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -469,11 +488,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -645,7 +666,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -667,6 +687,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
index 869e0a4b..32c477b7 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_FAMILY="ThinkPad W530"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W530"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -122,28 +131,30 @@ CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="w530"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W530"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -158,12 +169,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W530"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -171,7 +180,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -207,7 +218,6 @@ CONFIG_BOARD_LENOVO_W530=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0071"
 CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -266,7 +276,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -283,6 +293,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -307,6 +318,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -330,6 +342,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -392,6 +409,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -415,6 +434,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -435,6 +457,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -469,6 +492,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -490,11 +514,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -547,7 +573,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -656,7 +681,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -677,6 +701,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_txtmode b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
index 3d247345..5dfb39f4 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_FAMILY="ThinkPad W530"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W530"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -120,28 +129,30 @@ CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="w530"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W530"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -156,12 +167,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W530"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -169,7 +178,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_W530=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0071"
 CONFIG_PS2M_EISAID="LEN0015"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -264,7 +274,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -281,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -328,6 +340,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -390,6 +407,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -413,6 +432,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -431,6 +453,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -465,6 +488,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -486,11 +510,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -544,7 +570,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -653,7 +678,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -674,6 +698,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
index 944e3b3d..8ef1f09a 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -76,15 +79,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -105,7 +112,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_FAMILY="ThinkPad W541"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W541"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="w541"
 CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xff7c0000
 CONFIG_DCACHE_RAM_SIZE=0x40000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -160,17 +171,17 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541"
 CONFIG_HAVE_IFD_BIN=y
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 CONFIG_BOARD_LENOVO_THINKPAD_W541=y
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -264,7 +275,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -283,6 +294,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -307,6 +319,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -386,6 +399,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -408,6 +423,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -428,6 +446,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -459,6 +478,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -481,6 +501,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -535,7 +556,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -645,7 +665,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -667,6 +686,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_txtmode b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
index e07e8867..b552bef0 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -76,15 +79,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -105,7 +112,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_MAINBOARD_FAMILY="ThinkPad W541"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W541"
 CONFIG_MAINBOARD_VERSION="1.0"
@@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=8
 CONFIG_ONBOARD_VGA_IS_PRIMARY=y
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="w541"
 CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 CONFIG_PCIEXP_L1_SUB_STATE=y
 CONFIG_PCIEXP_CLK_PM=y
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xff7c0000
 CONFIG_DCACHE_RAM_SIZE=0x40000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -158,17 +169,17 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 # CONFIG_ENABLE_DDR_2X_REFRESH is not set
 CONFIG_PCIEXP_AER=y
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541"
 CONFIG_HAVE_IFD_BIN=y
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 CONFIG_BOARD_LENOVO_THINKPAD_W541=y
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -262,7 +273,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xe8000000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -281,6 +292,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_DISABLE_ME_PCI=y
 CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +317,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -384,6 +397,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -406,6 +421,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -424,6 +442,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -455,6 +474,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -477,6 +497,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -532,7 +553,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -642,7 +662,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -664,6 +683,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
index 646aa044..27d40621 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X200"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X200"
@@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x200"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -260,7 +270,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -275,6 +285,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -301,6 +312,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,6 +384,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -395,6 +409,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -415,6 +432,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -452,6 +470,7 @@ CONFIG_DRIVERS_LENOVO_WACOM=y
 CONFIG_DIGITIZER_AUTODETECT=y
 # CONFIG_DIGITIZER_PRESENT is not set
 # CONFIG_DIGITIZER_ABSENT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -471,11 +490,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -628,7 +649,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -650,6 +670,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_txtmode b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
index dd4c7e97..cbb78671 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X200"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X200"
@@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x200"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -155,12 +166,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -168,7 +177,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -203,7 +214,6 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -258,7 +268,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -273,6 +283,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -299,6 +310,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,6 +382,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -393,6 +407,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -411,6 +428,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -448,6 +466,7 @@ CONFIG_DRIVERS_LENOVO_WACOM=y
 CONFIG_DIGITIZER_AUTODETECT=y
 # CONFIG_DIGITIZER_PRESENT is not set
 # CONFIG_DIGITIZER_ABSENT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -467,11 +486,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -624,7 +645,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -646,6 +666,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
index 0a7710f4..19cf5e16 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X200"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X200"
@@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x200"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -260,7 +270,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -275,6 +285,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -301,6 +312,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,6 +384,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -395,6 +409,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -415,6 +432,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -452,6 +470,7 @@ CONFIG_DRIVERS_LENOVO_WACOM=y
 CONFIG_DIGITIZER_AUTODETECT=y
 # CONFIG_DIGITIZER_PRESENT is not set
 # CONFIG_DIGITIZER_ABSENT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -471,11 +490,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -628,7 +649,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -650,6 +670,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_txtmode b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
index 68f067fa..f417738c 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X200"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X200"
@@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x200"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -155,12 +166,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -168,7 +177,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -203,7 +214,6 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -258,7 +268,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -273,6 +283,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -299,6 +310,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,6 +382,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -393,6 +407,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -411,6 +428,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -448,6 +466,7 @@ CONFIG_DRIVERS_LENOVO_WACOM=y
 CONFIG_DIGITIZER_AUTODETECT=y
 # CONFIG_DIGITIZER_PRESENT is not set
 # CONFIG_DIGITIZER_ABSENT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -467,11 +486,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -624,7 +645,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -646,6 +666,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
index 15b698e4..42ea44a9 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X200"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X200"
@@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x200"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -260,7 +270,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -275,6 +285,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -301,6 +312,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,6 +384,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -395,6 +409,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -415,6 +432,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -452,6 +470,7 @@ CONFIG_DRIVERS_LENOVO_WACOM=y
 CONFIG_DIGITIZER_AUTODETECT=y
 # CONFIG_DIGITIZER_PRESENT is not set
 # CONFIG_DIGITIZER_ABSENT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -471,11 +490,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -628,7 +649,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -650,6 +670,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_txtmode b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
index 2d2f81f2..31ee78b8 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X200"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X200"
@@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x200"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -155,12 +166,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -168,7 +177,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -203,7 +214,6 @@ CONFIG_BOARD_LENOVO_X200=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="LEN0010"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -258,7 +268,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -273,6 +283,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -299,6 +310,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,6 +382,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -393,6 +407,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -411,6 +428,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -448,6 +466,7 @@ CONFIG_DRIVERS_LENOVO_WACOM=y
 CONFIG_DIGITIZER_AUTODETECT=y
 # CONFIG_DIGITIZER_PRESENT is not set
 # CONFIG_DIGITIZER_ABSENT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -467,11 +486,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -624,7 +645,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -646,6 +666,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
index 9661ff3c..ec0a07f2 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X220"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X220"
@@ -123,28 +132,30 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x220"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X220"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
@@ -160,12 +171,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X220"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -173,7 +182,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -208,7 +219,6 @@ CONFIG_BOARD_LENOVO_X220=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -266,7 +276,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -283,6 +293,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -307,6 +318,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -330,6 +342,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -392,6 +409,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -415,6 +434,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -435,6 +457,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -469,6 +492,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -490,11 +514,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -546,7 +572,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -655,7 +680,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -677,6 +701,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_txtmode b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
index 089c3e0b..81bf09b2 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X220"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X220"
@@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x220"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X220"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
@@ -158,12 +169,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X220"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -171,7 +180,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -206,7 +217,6 @@ CONFIG_BOARD_LENOVO_X220=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -264,7 +274,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -281,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -328,6 +340,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -390,6 +407,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -413,6 +432,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -431,6 +453,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -465,6 +488,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -486,11 +510,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -543,7 +569,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -652,7 +677,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -674,6 +698,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
index b2efa38a..30a6b715 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X230"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230"
@@ -123,28 +132,30 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -159,12 +170,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -208,7 +219,6 @@ CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -266,7 +276,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -283,6 +293,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -307,6 +318,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -330,6 +342,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -392,6 +409,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -415,6 +434,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -435,6 +457,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -469,6 +492,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -490,11 +514,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -546,7 +572,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -655,7 +680,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -676,6 +700,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_txtmode b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
index f92b4ace..38f7d458 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X230"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230"
@@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -157,12 +168,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -206,7 +217,6 @@ CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -264,7 +274,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -281,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -328,6 +340,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -390,6 +407,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -413,6 +432,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -431,6 +453,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -465,6 +488,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -486,11 +510,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -543,7 +569,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -652,7 +677,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -673,6 +697,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
index 1bd1259b..ebf4d378 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X230"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230"
@@ -123,28 +132,30 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -159,12 +170,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -208,7 +219,6 @@ CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -266,7 +276,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -283,6 +293,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -307,6 +318,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -330,6 +342,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -392,6 +409,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -415,6 +434,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -435,6 +457,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -469,6 +492,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -490,11 +514,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -546,7 +572,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -655,7 +680,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -676,6 +700,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_txtmode b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
index 93511360..2cd56418 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X230"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230"
@@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -157,12 +168,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -206,7 +217,6 @@ CONFIG_BOARD_LENOVO_X230=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -264,7 +274,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -281,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -328,6 +340,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -390,6 +407,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -413,6 +432,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -431,6 +453,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -465,6 +488,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -486,11 +510,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -543,7 +569,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -652,7 +677,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -673,6 +697,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
index 94bc6d0b..6e8e3a74 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X230t"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230t"
@@ -123,28 +132,30 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -159,12 +170,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -208,7 +219,6 @@ CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -266,7 +276,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -283,6 +293,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -307,6 +318,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -330,6 +342,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -392,6 +409,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -415,6 +434,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -435,6 +457,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -469,6 +492,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -490,11 +514,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -546,7 +572,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -655,7 +680,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -676,6 +700,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
index 98a489a6..ab92025e 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X230t"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230t"
@@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -157,12 +168,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -206,7 +217,6 @@ CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -264,7 +274,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -281,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -328,6 +340,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -390,6 +407,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -413,6 +432,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -431,6 +453,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -465,6 +488,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -486,11 +510,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -543,7 +569,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -652,7 +677,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -673,6 +697,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
index 94a44d3a..a80d0c38 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X230t"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230t"
@@ -123,28 +132,30 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -159,12 +170,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -172,7 +181,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -208,7 +219,6 @@ CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -266,7 +276,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -283,6 +293,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -307,6 +318,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -330,6 +342,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -392,6 +409,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -415,6 +434,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -435,6 +457,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -469,6 +492,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -490,11 +514,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -546,7 +572,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -655,7 +680,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -676,6 +700,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
index 6cf264f6..f5f25b9c 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X230t"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230t"
@@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x230"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 CONFIG_PCIEXP_ASPM=y
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
 CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_TPM_PIRQ=0x0
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_DCACHE_RAM_BASE=0xfefe0000
 CONFIG_DCACHE_RAM_SIZE=0x20000
 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
@@ -157,12 +168,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd"
 CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -206,7 +217,6 @@ CONFIG_BOARD_LENOVO_X230T=y
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
 CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="LEN0020"
 CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
@@ -264,7 +274,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_SERIRQ_CONTINUOUS_MODE=y
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -281,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 CONFIG_PCIEXP_COMMON_CLOCK=y
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -305,6 +316,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -328,6 +340,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
 # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
 # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
 CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
 
 #
 # Southbridge
@@ -390,6 +407,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -413,6 +432,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -431,6 +453,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -465,6 +488,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
 # CONFIG_ELOG is not set
 CONFIG_CACHE_MRC_SETTINGS=y
 # CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -486,11 +510,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
@@ -543,7 +569,6 @@ CONFIG_TPM=y
 CONFIG_MAINBOARD_HAS_TPM1=y
 # CONFIG_TPM_DEACTIVATE is not set
 # CONFIG_DEBUG_TPM is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
 CONFIG_PCR_BOOT_MODE=1
 CONFIG_PCR_HWID=1
 CONFIG_PCR_SRTM=2
@@ -652,7 +677,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -673,6 +697,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
index 6120c2a8..e9929406 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X301"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X301"
@@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x301"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -260,7 +270,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -275,6 +285,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -301,6 +312,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,6 +384,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -395,6 +409,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -415,6 +432,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -452,6 +470,7 @@ CONFIG_DRIVERS_LENOVO_WACOM=y
 CONFIG_DIGITIZER_AUTODETECT=y
 # CONFIG_DIGITIZER_PRESENT is not set
 # CONFIG_DIGITIZER_ABSENT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -471,11 +490,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -628,7 +649,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -650,6 +670,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_txtmode b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
index 96911b1e..c9c37759 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X301"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X301"
@@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x301"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -155,12 +166,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -168,7 +177,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -203,7 +214,6 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -258,7 +268,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -273,6 +283,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -299,6 +310,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,6 +382,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -393,6 +407,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -411,6 +428,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -448,6 +466,7 @@ CONFIG_DRIVERS_LENOVO_WACOM=y
 CONFIG_DIGITIZER_AUTODETECT=y
 # CONFIG_DIGITIZER_PRESENT is not set
 # CONFIG_DIGITIZER_ABSENT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -467,11 +486,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -624,7 +645,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -646,6 +666,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
index 1600d752..42d5107c 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X301"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X301"
@@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x301"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -260,7 +270,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -275,6 +285,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -301,6 +312,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,6 +384,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -395,6 +409,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -415,6 +432,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -452,6 +470,7 @@ CONFIG_DRIVERS_LENOVO_WACOM=y
 CONFIG_DIGITIZER_AUTODETECT=y
 # CONFIG_DIGITIZER_PRESENT is not set
 # CONFIG_DIGITIZER_ABSENT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -471,11 +490,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -628,7 +649,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -650,6 +670,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_txtmode b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
index 6931179e..988e838a 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X301"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X301"
@@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x301"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -155,12 +166,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -168,7 +177,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -203,7 +214,6 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -258,7 +268,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -273,6 +283,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -299,6 +310,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,6 +382,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -393,6 +407,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -411,6 +428,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -448,6 +466,7 @@ CONFIG_DRIVERS_LENOVO_WACOM=y
 CONFIG_DIGITIZER_AUTODETECT=y
 # CONFIG_DIGITIZER_PRESENT is not set
 # CONFIG_DIGITIZER_ABSENT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -467,11 +486,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -624,7 +645,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -646,6 +666,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
index c4aa7b1d..ce92cd2d 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X301"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X301"
@@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x301"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -170,7 +179,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -205,7 +216,6 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -260,7 +270,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -275,6 +285,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -301,6 +312,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,6 +384,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -395,6 +409,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -415,6 +432,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -452,6 +470,7 @@ CONFIG_DRIVERS_LENOVO_WACOM=y
 CONFIG_DIGITIZER_AUTODETECT=y
 # CONFIG_DIGITIZER_PRESENT is not set
 # CONFIG_DIGITIZER_ABSENT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -471,11 +490,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -628,7 +649,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -650,6 +670,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_txtmode b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
index 7385ce0a..b2164483 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X301"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X301"
@@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=2
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
-CONFIG_DEVICETREE="devicetree.cb"
-# CONFIG_VBOOT is not set
 CONFIG_VARIANT_DIR="x301"
 CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
 CONFIG_INTEL_GMA_VBT_FILE=""
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
 CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x10000
@@ -155,12 +166,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
 CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
 CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -168,7 +177,9 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -203,7 +214,6 @@ CONFIG_BOARD_LENOVO_X301=y
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 # CONFIG_BOARD_LENOVO_X60 is not set
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="PNP0F13"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -258,7 +268,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 # CONFIG_USE_X86_64_SUPPORT is not set
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -273,6 +283,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -299,6 +310,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,6 +382,8 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -393,6 +407,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -411,6 +428,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -448,6 +466,7 @@ CONFIG_DRIVERS_LENOVO_WACOM=y
 CONFIG_DIGITIZER_AUTODETECT=y
 # CONFIG_DIGITIZER_PRESENT is not set
 # CONFIG_DIGITIZER_ABSENT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -467,11 +486,13 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
 CONFIG_INTEL_INT15=y
@@ -624,7 +645,6 @@ CONFIG_PAYLOAD_NONE=y
 #
 # General Debug Settings
 #
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -646,6 +666,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x60/config/libgfxinit_corebootfb b/config/coreboot/x60/config/libgfxinit_corebootfb
index 243333dd..6f5902ea 100644
--- a/config/coreboot/x60/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X60"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X60"
@@ -123,25 +132,27 @@ CONFIG_MAX_CPUS=2
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_IRQ_SLOT_COUNT=18
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -152,19 +163,19 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -199,7 +210,6 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 CONFIG_BOARD_LENOVO_X60=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -254,7 +264,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -269,6 +279,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -299,6 +310,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -364,6 +376,8 @@ CONFIG_EC_LENOVO_H8=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -387,6 +401,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -407,6 +424,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -443,6 +461,7 @@ CONFIG_DRIVERS_LENOVO_WACOM=y
 CONFIG_DIGITIZER_AUTODETECT=y
 # CONFIG_DIGITIZER_PRESENT is not set
 # CONFIG_DIGITIZER_ABSENT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -461,11 +480,13 @@ CONFIG_DRIVERS_UART=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_DRIVERS_I2C_CK505=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
@@ -634,7 +655,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -650,6 +670,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x60/config/libgfxinit_txtmode b/config/coreboot/x60/config/libgfxinit_txtmode
index a984779c..b5c2f343 100644
--- a/config/coreboot/x60/config/libgfxinit_txtmode
+++ b/config/coreboot/x60/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X60"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X60"
@@ -123,25 +132,27 @@ CONFIG_MAX_CPUS=2
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_IRQ_SLOT_COUNT=18
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -152,19 +163,19 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -199,7 +210,6 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 CONFIG_BOARD_LENOVO_X60=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -254,7 +264,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -269,6 +279,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -299,6 +310,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -364,6 +376,8 @@ CONFIG_EC_LENOVO_H8=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -387,6 +401,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -405,6 +422,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -441,6 +459,7 @@ CONFIG_DRIVERS_LENOVO_WACOM=y
 CONFIG_DIGITIZER_AUTODETECT=y
 # CONFIG_DIGITIZER_PRESENT is not set
 # CONFIG_DIGITIZER_ABSENT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -459,11 +478,13 @@ CONFIG_DRIVERS_UART=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_DRIVERS_I2C_CK505=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
@@ -632,7 +653,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -648,6 +668,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
index 617e05b2..1f005c11 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X60"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X60"
@@ -123,25 +132,27 @@ CONFIG_MAX_CPUS=2
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_IRQ_SLOT_COUNT=18
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -152,19 +163,19 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -199,7 +210,6 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 CONFIG_BOARD_LENOVO_X60=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -254,7 +264,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -269,6 +279,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -299,6 +310,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -364,6 +376,8 @@ CONFIG_EC_LENOVO_H8=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -387,6 +401,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -407,6 +424,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
 CONFIG_LINEAR_FRAMEBUFFER=y
 # CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -443,6 +461,7 @@ CONFIG_DRIVERS_LENOVO_WACOM=y
 CONFIG_DIGITIZER_AUTODETECT=y
 # CONFIG_DIGITIZER_PRESENT is not set
 # CONFIG_DIGITIZER_ABSENT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -461,11 +480,13 @@ CONFIG_DRIVERS_UART=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_DRIVERS_I2C_CK505=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
@@ -634,7 +655,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -650,6 +670,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_txtmode b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
index f9063d40..c4017c1d 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
@@ -10,14 +10,15 @@ CONFIG_LOCALVERSION=""
 CONFIG_CBFS_PREFIX="fallback"
 CONFIG_COMPILER_GCC=y
 # CONFIG_COMPILER_LLVM_CLANG is not set
-CONFIG_ARCH_SUPPORTS_CLANG=y
 # CONFIG_ANY_TOOLCHAIN is not set
 # CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
 # CONFIG_IWYU is not set
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_AOOSTAR is not set
 # CONFIG_VENDOR_AOPEN is not set
 # CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
 # CONFIG_VENDOR_ASROCK is not set
 # CONFIG_VENDOR_ASUS is not set
 # CONFIG_VENDOR_BIOSTAR is not set
@@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_CWWK is not set
 # CONFIG_VENDOR_DELL is not set
 # CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
 # CONFIG_VENDOR_EXAMPLE is not set
 # CONFIG_VENDOR_FACEBOOK is not set
 # CONFIG_VENDOR_FOXCONN is not set
@@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y
 # CONFIG_VENDOR_GETAC is not set
 # CONFIG_VENDOR_GIGABYTE is not set
 # CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
 # CONFIG_VENDOR_HP is not set
 # CONFIG_VENDOR_IBASE is not set
 # CONFIG_VENDOR_IBM is not set
 # CONFIG_VENDOR_INTEL is not set
 # CONFIG_VENDOR_INVENTEC is not set
 # CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
 CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_SUPERMICRO is not set
 # CONFIG_VENDOR_SYSTEM76 is not set
 # CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
 # CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
 CONFIG_BOARD_SPECIFIC_OPTIONS=y
 CONFIG_MAINBOARD_FAMILY="ThinkPad X60"
 CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X60"
@@ -123,25 +132,27 @@ CONFIG_MAX_CPUS=2
 CONFIG_POST_DEVICE=y
 CONFIG_POST_IO=y
 CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
 CONFIG_DEVICETREE="devicetree.cb"
 # CONFIG_VBOOT is not set
 CONFIG_IRQ_SLOT_COUNT=18
-CONFIG_OVERRIDE_DEVICETREE=""
 # CONFIG_VGA_BIOS is not set
 # CONFIG_PCIEXP_ASPM is not set
 # CONFIG_PCIEXP_L1_SUB_STATE is not set
 # CONFIG_PCIEXP_CLK_PM is not set
 CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
+# CONFIG_CONSOLE_POST is not set
 CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_CONSOLE_POST is not set
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
-CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 CONFIG_VBOOT_SLOTS_RW_A=y
 CONFIG_DCACHE_RAM_BASE=0xfefc0000
 CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -152,19 +163,19 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
 CONFIG_PCIEXP_HOTPLUG_BUSES=8
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
@@ -199,7 +210,6 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_X230S is not set
 # CONFIG_BOARD_LENOVO_X230_EDP is not set
 CONFIG_BOARD_LENOVO_X60=y
-CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_PS2K_EISAID="PNP0303"
 CONFIG_PS2M_EISAID="IBM3780"
 CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
@@ -254,7 +264,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
 CONFIG_SMM_RESERVED_SIZE=0x100000
 CONFIG_SMM_MODULE_STACK_SIZE=0x400
 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
 CONFIG_EHCI_BAR=0xfef00000
 CONFIG_ACPI_CPU_STRING="CP%02X"
 CONFIG_STACK_SIZE=0x2000
@@ -269,6 +279,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 CONFIG_INTEL_HAS_TOP_SWAP=y
@@ -299,6 +310,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -364,6 +376,8 @@ CONFIG_EC_LENOVO_H8=y
 # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
 # CONFIG_H8_FN_CTRL_SWAP is not set
 CONFIG_EC_LENOVO_PMH7=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -387,6 +401,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y
 CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
 # CONFIG_DUMP_SMBIOS_TYPE17 is not set
 CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
 # end of Chipset
 
 #
@@ -405,6 +422,7 @@ CONFIG_NO_EARLY_GFX_INIT=y
 #
 CONFIG_VGA_TEXT_FRAMEBUFFER=y
 # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
 # end of Display
 
 CONFIG_PCI=y
@@ -441,6 +459,7 @@ CONFIG_DRIVERS_LENOVO_WACOM=y
 CONFIG_DIGITIZER_AUTODETECT=y
 # CONFIG_DIGITIZER_PRESENT is not set
 # CONFIG_DIGITIZER_ABSENT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
 # CONFIG_SMMSTORE is not set
 CONFIG_SPI_FLASH=y
 CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
@@ -459,11 +478,13 @@ CONFIG_DRIVERS_UART=y
 CONFIG_HAVE_USBDEBUG=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
 CONFIG_DRIVERS_I2C_CK505=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_EDID=y
@@ -632,7 +653,6 @@ CONFIG_PAYLOAD_NONE=y
 # General Debug Settings
 #
 # CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
 # CONFIG_DEBUG_CBFS is not set
 CONFIG_HAVE_DEBUG_RAM_SETUP=y
 # CONFIG_DEBUG_RAM_SETUP is not set
@@ -648,6 +668,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # end of Debugging
 
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/data/coreboot/0 b/config/data/coreboot/0
deleted file mode 100644
index f76dd238ade08917e6712764a16a22005a50573d..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 1
IcmZPo000310RR91

diff --git a/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg b/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg
deleted file mode 100644
index aec8ffba..00000000
--- a/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20230628.tar.gz"
-subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20230628.tar.gz"
-subhash="d726e69ebd8b8110690e3aff8d1919b43b0a2185efdeb9131ea8d89d321ca3a318a89c721ea740ae366f31ed3d1c11c2906f8807ee8a190e6f67fe5b2023cea4"
diff --git a/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
index ef9a598f..911f3fa9 100644
--- a/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
+++ b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
@@ -2,4 +2,4 @@
 
 subrepo="https://review.coreboot.org/arm-trusted-firmware.git"
 subrepo_bkup="https://github.com/coreboot/arm-trusted-firmware"
-subhash="c5b8de86c8838d08d5d8c9d67c7a432817ee62b8"
+subhash="57ac3f74b34a3303f03deee264a1f2247c68008d"
diff --git a/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg b/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg
deleted file mode 100644
index 3473c884..00000000
--- a/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.42.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.42.tar.xz"
-subhash="155f3ba14cd220102f4f29a4f1e5cfee3c48aa03b74603460d05afb73c70d6657a9d87eee6eb88bf13203fe6f31177a5c9addc04384e956e7da8069c8ecd20a6"
diff --git a/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg
deleted file mode 100644
index 20942b4b..00000000
--- a/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.1.0/gcc-14.1.0.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.1.0/gcc-14.1.0.tar.xz"
-subhash="e9e224f2b26646fcf038d28dfa08b94c623bc57941f99894a321d01c600f7c68aff6b8837fd25e73e540de1f8de5606e98694a62cdcdfb525ce768b3ef6879ea"
diff --git a/config/submodule/coreboot/default/intel-microcode/module.cfg b/config/submodule/coreboot/default/intel-microcode/module.cfg
index f7d6d283..0ae50bd0 100644
--- a/config/submodule/coreboot/default/intel-microcode/module.cfg
+++ b/config/submodule/coreboot/default/intel-microcode/module.cfg
@@ -2,4 +2,4 @@
 
 subrepo="https://review.coreboot.org/intel-microcode.git"
 subrepo_bkup="https://github.com/coreboot/intel-microcode"
-subhash="5278dfcf98e89098326b3eb8a85d07120a8730f8"
+subhash="8a62de41c011615d749f8e72bb906dddc72e56a8"
diff --git a/config/submodule/coreboot/default/module.list b/config/submodule/coreboot/default/module.list
index 6f17b546..5f77de0c 100644
--- a/config/submodule/coreboot/default/module.list
+++ b/config/submodule/coreboot/default/module.list
@@ -3,10 +3,10 @@
 3rdparty/libgfxinit
 3rdparty/libhwbase
 3rdparty/vboot
-util/crossgcc/tarballs/binutils-2.42.tar.xz
-util/crossgcc/tarballs/gcc-14.1.0.tar.xz
+util/crossgcc/tarballs/binutils-2.43.1.tar.xz
+util/crossgcc/tarballs/gcc-14.2.0.tar.xz
 util/crossgcc/tarballs/gmp-6.3.0.tar.xz
 util/crossgcc/tarballs/mpc-1.3.1.tar.gz
 util/crossgcc/tarballs/mpfr-4.2.1.tar.xz
 util/crossgcc/tarballs/nasm-2.16.03.tar.bz2
-util/crossgcc/tarballs/acpica-unix-20230628.tar.gz
+util/crossgcc/tarballs/acpica-unix-20241212.tar.gz
diff --git a/config/submodule/coreboot/default/vboot/module.cfg b/config/submodule/coreboot/default/vboot/module.cfg
index 32a10913..d13a1b29 100644
--- a/config/submodule/coreboot/default/vboot/module.cfg
+++ b/config/submodule/coreboot/default/vboot/module.cfg
@@ -2,4 +2,4 @@
 
 subrepo="https://review.coreboot.org/vboot.git"
 subrepo_bkup="https://github.com/coreboot/vboot"
-subhash="4b12d392e5b12de29c582df4e717b1228e9f1594"
+subhash="3f94e2c7ed58c4e67d6e7dc6052ec615dbbb9bb4"

From c7569a67145a9534b14f477e088bb60e4330f9be Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 21 Apr 2025 05:03:07 +0100
Subject: [PATCH 1202/1549] coreboot/next: merge with coreboot/default

I also cherry-picked a patch from Heads, that fixes build
issues caused by the hacks in the T480 port; several changes
made by Mate are now ifdef'd based on whether a KabyLake
ThinkPad is specified in defconfig.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...d-c3-and-clockgen-to-apple-macbook21.patch |   4 +-
 ...02-lenovo-t400-Enable-all-SATA-ports.patch |   4 +-
 ...et-me_state-Disabled-in-cmos.default.patch |   4 +-
 ...e-Disabled-on-all-cmos.default-files.patch |   4 +-
 ...ool-add-nuke-flag-all-0xFF-on-region.patch |   4 +-
 ...able-01.0-device-in-devicetree-for-d.patch |   4 +-
 ...or-coreboot-images-built-without-a-p.patch |   4 +-
 ...sable-coreboot-related-BL31-features.patch |   4 +-
 ...-e6430-use-ME-Soft-Temporary-Disable.patch |   4 +-
 ...mb-hp-Add-Compaq-Elite-8300-CMT-port.patch |   4 +-
 ...-haswell-make-IOMMU-a-runtime-option.patch |   4 +-
 ...tiplex_9020-Disable-IOMMU-by-default.patch |   4 +-
 ...Fully-disable-iGPU-when-dGPU-is-used.patch |   4 +-
 ...l-mec5035-Add-S3-suspend-SMI-handler.patch |   4 +-
 ...ock-policy-regs-when-disabling-IOMMU.patch |   4 +-
 ...nb-intel-gm45-Make-DDR2-raminit-work.patch |   4 +-
 ...ngel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch |   4 +-
 ...e-100-MHz-reference-clock-for-displa.patch |   4 +-
 ...b-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch |   4 +-
 ...mb-dell-Convert-E6400-into-a-variant.patch |   4 +-
 ...ell-gm45_latitudes-Add-E4300-variant.patch |   4 +-
 ...dd-S3-SMI-handler-for-Dell-Latitudes.patch |   4 +-
 ...035-Route-power-button-event-to-host.patch |   4 +-
 ...ble-compression-on-refcode-insertion.patch |   4 +-
 ...Disable-stack-overflow-debug-options.patch |   4 +-
 ...oc-intel-skylake-configure-usb-acpi.patch} |   6 +-
 ...-Enable-4E-4F-PNP-I-O-ports-in-boot.patch} |   4 +-
 ...dd-ThinkPad-T480-and-ThinkPad-T480s.patch} |  17 +-
 ...-dell-Add-Optiplex-780-MT-x4x-ICH10.patch} |   4 +-
 ...-dell-optiplex_780-Add-USFF-variant.patch} |   4 +-
 ...dell-3050micro-disable-nvme-hotplug.patch} |   8 +-
 ...onfig-option-CONFIG_LENOVO_TBFW_BIN.patch} |   4 +-
 ...-intel-skylake-Don-t-compress-FSP-S.patch} |   6 +-
 ...Hardcoded-poweroff-after-power-fail.patch} |   8 +-
 ...-Disable-stack-overflow-debug-optio.patch} |   8 +-
 ...el-x4x-Disable-stack-overflow-debug.patch} |   8 +-
 ...ditional-TBFW-setting-for-T480-T480S.patch |  37 ++++
 ...lding-other-thinkpads-with-the-hacks.patch | 153 +++++++++++++
 .../config/libgfxinit_corebootfb              |  23 +-
 .../config/libgfxinit_txtmode                 |  23 +-
 .../dell3050micro_vfsp_16mb/target.cfg        |   2 +-
 .../config/libgfxinit_txtmode                 |   2 +
 .../config/libgfxinit_corebootfb              |  17 +-
 .../dell780mt_8mb/config/libgfxinit_txtmode   |  17 +-
 config/coreboot/dell780mt_8mb/target.cfg      |   2 +-
 .../config/libgfxinit_corebootfb              |  17 +-
 .../config/libgfxinit_txtmode                 |  17 +-
 .../dell780mt_truncate_8mb/target.cfg         |   2 +-
 .../config/libgfxinit_corebootfb              |  17 +-
 .../dell780usff_8mb/config/libgfxinit_txtmode |  17 +-
 config/coreboot/dell780usff_8mb/target.cfg    |   2 +-
 .../config/libgfxinit_corebootfb              |  17 +-
 .../config/libgfxinit_txtmode                 |  17 +-
 .../dell780usff_truncate_8mb/target.cfg       |   2 +-
 .../config/libgfxinit_corebootfb              |   2 +
 .../config/libgfxinit_txtmode                 |   2 +
 .../config/libgfxinit_corebootfb              |   2 +
 .../config/libgfxinit_txtmode                 |   2 +
 .../e4300_4mb/config/libgfxinit_corebootfb    |   2 +
 .../e4300_4mb/config/libgfxinit_txtmode       |   2 +
 .../e5420_6mb/config/libgfxinit_corebootfb    |   2 +
 .../e5420_6mb/config/libgfxinit_txtmode       |   2 +
 .../e5520_6mb/config/libgfxinit_corebootfb    |   2 +
 .../e5520_6mb/config/libgfxinit_txtmode       |   2 +
 .../e5530_12mb/config/libgfxinit_corebootfb   |   2 +
 .../e5530_12mb/config/libgfxinit_txtmode      |   2 +
 .../e6220_10mb/config/libgfxinit_corebootfb   |   2 +
 .../e6220_10mb/config/libgfxinit_txtmode      |   2 +
 .../e6230_12mb/config/libgfxinit_corebootfb   |   2 +
 .../e6230_12mb/config/libgfxinit_txtmode      |   2 +
 .../e6320_10mb/config/libgfxinit_corebootfb   |   2 +
 .../e6320_10mb/config/libgfxinit_txtmode      |   2 +
 .../e6330_12mb/config/libgfxinit_corebootfb   |   2 +
 .../e6330_12mb/config/libgfxinit_txtmode      |   2 +
 .../e6400_4mb/config/libgfxinit_corebootfb    |   2 +
 .../e6400_4mb/config/libgfxinit_txtmode       |   2 +
 config/coreboot/e6400nvidia_4mb/config/normal |   2 +
 .../e6420_10mb/config/libgfxinit_corebootfb   |   2 +
 .../e6420_10mb/config/libgfxinit_txtmode      |   2 +
 .../e6430_12mb/config/libgfxinit_corebootfb   |   2 +
 .../e6430_12mb/config/libgfxinit_txtmode      |   2 +
 .../e6520_10mb/config/libgfxinit_corebootfb   |   2 +
 .../e6520_10mb/config/libgfxinit_txtmode      |   2 +
 .../e6530_12mb/config/libgfxinit_corebootfb   |   2 +
 .../e6530_12mb/config/libgfxinit_txtmode      |   2 +
 ...ool-add-nuke-flag-all-0xFF-on-region.patch | 205 ------------------
 ...or-coreboot-images-built-without-a-p.patch |  39 ----
 ...aro-Comment-EC_DASHARO_EC_FLASH_SIZE.patch |  32 ---
 config/coreboot/next/target.cfg               |   4 -
 .../r400_16mb/config/libgfxinit_corebootfb    |   2 +
 .../r400_16mb/config/libgfxinit_txtmode       |   2 +
 .../r400_4mb/config/libgfxinit_corebootfb     |   2 +
 .../r400_4mb/config/libgfxinit_txtmode        |   2 +
 .../r400_8mb/config/libgfxinit_corebootfb     |   2 +
 .../r400_8mb/config/libgfxinit_txtmode        |   2 +
 .../r500_4mb/config/libgfxinit_corebootfb     |   2 +
 .../r500_4mb/config/libgfxinit_txtmode        |   2 +
 .../t1650_12mb/config/libgfxinit_txtmode      |   2 +
 .../t400_16mb/config/libgfxinit_corebootfb    |   2 +
 .../t400_16mb/config/libgfxinit_txtmode       |   2 +
 .../t400_4mb/config/libgfxinit_corebootfb     |   2 +
 .../t400_4mb/config/libgfxinit_txtmode        |   2 +
 .../t400_8mb/config/libgfxinit_corebootfb     |   2 +
 .../t400_8mb/config/libgfxinit_txtmode        |   2 +
 .../t420_8mb/config/libgfxinit_corebootfb     |   2 +
 .../t420s_8mb/config/libgfxinit_corebootfb    |   2 +
 .../t420s_8mb/config/libgfxinit_txtmode       |   2 +
 .../t430_12mb/config/libgfxinit_corebootfb    |   2 +
 .../t430_12mb/config/libgfxinit_txtmode       |   2 +
 .../config/libgfxinit_corebootfb              |   2 +
 .../config/libgfxinit_txtmode                 |   2 +
 .../config/libgfxinit_corebootfb              |  21 +-
 .../t480_vfsp_16mb/config/libgfxinit_txtmode  |  21 +-
 config/coreboot/t480_vfsp_16mb/target.cfg     |   2 +-
 .../config/libgfxinit_corebootfb              |  21 +-
 .../t480s_vfsp_16mb/config/libgfxinit_txtmode |  21 +-
 config/coreboot/t480s_vfsp_16mb/target.cfg    |   2 +-
 .../t500_16mb/config/libgfxinit_corebootfb    |   2 +
 .../t500_16mb/config/libgfxinit_txtmode       |   2 +
 .../t500_4mb/config/libgfxinit_corebootfb     |   2 +
 .../t500_4mb/config/libgfxinit_txtmode        |   2 +
 .../t500_8mb/config/libgfxinit_corebootfb     |   2 +
 .../t500_8mb/config/libgfxinit_txtmode        |   2 +
 .../t520_8mb/config/libgfxinit_corebootfb     |   2 +
 .../t520_8mb/config/libgfxinit_txtmode        |   2 +
 .../t530_12mb/config/libgfxinit_corebootfb    |   2 +
 .../t530_12mb/config/libgfxinit_txtmode       |   2 +
 .../config/libgfxinit_corebootfb              |   2 +
 .../config/libgfxinit_txtmode                 |   2 +
 .../t60_intelgpu/config/libgfxinit_corebootfb |   2 +
 .../t60_intelgpu/config/libgfxinit_txtmode    |   2 +
 .../w500_16mb/config/libgfxinit_corebootfb    |   2 +
 .../w500_16mb/config/libgfxinit_txtmode       |   2 +
 .../w500_4mb/config/libgfxinit_corebootfb     |   2 +
 .../w500_4mb/config/libgfxinit_txtmode        |   2 +
 .../w500_8mb/config/libgfxinit_corebootfb     |   2 +
 .../w500_8mb/config/libgfxinit_txtmode        |   2 +
 .../w530_12mb/config/libgfxinit_corebootfb    |   2 +
 .../w530_12mb/config/libgfxinit_txtmode       |   2 +
 .../w541_12mb/config/libgfxinit_corebootfb    |   2 +
 .../w541_12mb/config/libgfxinit_txtmode       |   2 +
 .../x200_16mb/config/libgfxinit_corebootfb    |   2 +
 .../x200_16mb/config/libgfxinit_txtmode       |   2 +
 .../x200_4mb/config/libgfxinit_corebootfb     |   2 +
 .../x200_4mb/config/libgfxinit_txtmode        |   2 +
 .../x200_8mb/config/libgfxinit_corebootfb     |   2 +
 .../x200_8mb/config/libgfxinit_txtmode        |   2 +
 .../x220_8mb/config/libgfxinit_corebootfb     |   2 +
 .../x220_8mb/config/libgfxinit_txtmode        |   2 +
 .../x230_12mb/config/libgfxinit_corebootfb    |   2 +
 .../x230_12mb/config/libgfxinit_txtmode       |   2 +
 .../x230_16mb/config/libgfxinit_corebootfb    |   2 +
 .../x230_16mb/config/libgfxinit_txtmode       |   2 +
 .../x230t_12mb/config/libgfxinit_corebootfb   |   2 +
 .../x230t_12mb/config/libgfxinit_txtmode      |   2 +
 .../x230t_16mb/config/libgfxinit_corebootfb   |   2 +
 .../x230t_16mb/config/libgfxinit_txtmode      |   2 +
 .../x301_16mb/config/libgfxinit_corebootfb    |   2 +
 .../x301_16mb/config/libgfxinit_txtmode       |   2 +
 .../x301_4mb/config/libgfxinit_corebootfb     |   2 +
 .../x301_4mb/config/libgfxinit_txtmode        |   2 +
 .../x301_8mb/config/libgfxinit_corebootfb     |   2 +
 .../x301_8mb/config/libgfxinit_txtmode        |   2 +
 .../coreboot/x60/config/libgfxinit_corebootfb |   2 +
 config/coreboot/x60/config/libgfxinit_txtmode |   2 +
 .../x60_16mb/config/libgfxinit_corebootfb     |   2 +
 .../x60_16mb/config/libgfxinit_txtmode        |   2 +
 .../coreboot/{next => default}/fsp/module.cfg |   2 +-
 config/submodule/coreboot/default/module.list |   1 +
 .../acpica-unix-20241212.tar.gz/module.cfg    |   5 -
 .../next/binutils-2.43.1.tar.xz/module.cfg    |   5 -
 .../next/gcc-14.2.0.tar.xz/module.cfg         |   5 -
 .../coreboot/next/gmp-6.3.0.tar.xz/module.cfg |   5 -
 .../coreboot/next/intel-microcode/module.cfg  |   5 -
 .../coreboot/next/libgfxinit/module.cfg       |   5 -
 .../coreboot/next/libhwbase/module.cfg        |   5 -
 config/submodule/coreboot/next/module.list    |  12 -
 .../coreboot/next/mpc-1.3.1.tar.gz/module.cfg |   5 -
 .../next/mpfr-4.2.1.tar.xz/module.cfg         |   5 -
 .../next/nasm-2.16.03.tar.bz2/module.cfg      |   5 -
 .../submodule/coreboot/next/vboot/module.cfg  |   5 -
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch | 178 ---------------
 182 files changed, 713 insertions(+), 670 deletions(-)
 rename config/coreboot/{next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch => default/patches/0026-soc-intel-skylake-configure-usb-acpi.patch} (95%)
 rename config/coreboot/{next/patches/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch => default/patches/0027-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch} (87%)
 rename config/coreboot/{next/patches/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch => default/patches/0028-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch} (99%)
 rename config/coreboot/{next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch => default/patches/0029-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch} (99%)
 rename config/coreboot/{next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch => default/patches/0030-mb-dell-optiplex_780-Add-USFF-variant.patch} (98%)
 rename config/coreboot/{next/patches/0008-dell-3050micro-disable-nvme-hotplug.patch => default/patches/0031-dell-3050micro-disable-nvme-hotplug.patch} (88%)
 rename config/coreboot/{next/patches/0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch => default/patches/0032-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch} (96%)
 rename config/coreboot/{next/patches/0010-soc-intel-skylake-Don-t-compress-FSP-S.patch => default/patches/0033-soc-intel-skylake-Don-t-compress-FSP-S.patch} (86%)
 rename config/coreboot/{next/patches/0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch => default/patches/0034-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch} (92%)
 rename config/coreboot/{next/patches/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch => default/patches/0035-src-intel-skylake-Disable-stack-overflow-debug-optio.patch} (88%)
 rename config/coreboot/{next/patches/0014-src-intel-x4x-Disable-stack-overflow-debug.patch => default/patches/0036-src-intel-x4x-Disable-stack-overflow-debug.patch} (77%)
 create mode 100644 config/coreboot/default/patches/0037-Conditional-TBFW-setting-for-T480-T480S.patch
 create mode 100644 config/coreboot/default/patches/0038-do-not-break-building-other-thinkpads-with-the-hacks.patch
 delete mode 100644 config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
 delete mode 100644 config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch
 delete mode 100644 config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch
 delete mode 100644 config/coreboot/next/target.cfg
 rename config/submodule/coreboot/{next => default}/fsp/module.cfg (73%)
 delete mode 100644 config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg
 delete mode 100644 config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/next/intel-microcode/module.cfg
 delete mode 100644 config/submodule/coreboot/next/libgfxinit/module.cfg
 delete mode 100644 config/submodule/coreboot/next/libhwbase/module.cfg
 delete mode 100644 config/submodule/coreboot/next/module.list
 delete mode 100644 config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg
 delete mode 100644 config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg
 delete mode 100644 config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg
 delete mode 100644 config/submodule/coreboot/next/vboot/module.cfg
 delete mode 100644 config/submodule/coreboot/next/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch

diff --git a/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch b/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch
index c908a185..31c1bb30 100644
--- a/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch
+++ b/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch
@@ -1,7 +1,7 @@
-From 857f80c0f41908c2672bd71e161b421676c1f22b Mon Sep 17 00:00:00 2001
+From bd959c38f6ee21db1ff8f4fbb0675e38bfbe1147 Mon Sep 17 00:00:00 2001
 From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
 Date: Wed, 27 Oct 2021 13:36:01 +0200
-Subject: [PATCH 01/24] add c3 and clockgen to apple/macbook21
+Subject: [PATCH 01/37] add c3 and clockgen to apple/macbook21
 
 ---
  src/mainboard/apple/macbook21/Kconfig       |  1 +
diff --git a/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch b/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch
index e48d1d77..0c2b080f 100644
--- a/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch
+++ b/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch
@@ -1,7 +1,7 @@
-From 055da4d70c9857b6e301a1fca61e7bf39b8ed788 Mon Sep 17 00:00:00 2001
+From e5eab4c8043b89a325b4a28bf7da456d68475144 Mon Sep 17 00:00:00 2001
 From: persmule <persmule@gmail.com>
 Date: Sun, 31 Oct 2021 23:33:26 +0000
-Subject: [PATCH 02/24] lenovo/t400: Enable all SATA ports
+Subject: [PATCH 02/37] lenovo/t400: Enable all SATA ports
 
 There are 2 SATA ports on the chassis of t400(s), but at least one dock for
 t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
diff --git a/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch b/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
index 3a4916ba..4ccde9a6 100644
--- a/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
+++ b/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
@@ -1,7 +1,7 @@
-From c0246706b784309729194a8e7dd12e130eb74130 Mon Sep 17 00:00:00 2001
+From fd398cc10600cccce3dd4931651a5294ffebde9a Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 3 Jan 2022 19:06:22 +0000
-Subject: [PATCH 03/24] lenovo/x230: set me_state=Disabled in cmos.default
+Subject: [PATCH 03/37] lenovo/x230: set me_state=Disabled in cmos.default
 
 I only recently found out about this. It's possible to use me_cleaner to
 do the same thing, but some people might just flash coreboot and not do
diff --git a/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch b/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch
index d3eaa5a8..39319d58 100644
--- a/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch
+++ b/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch
@@ -1,7 +1,7 @@
-From b84b1d40d5fef3278d9ea218e92576c095d8814c Mon Sep 17 00:00:00 2001
+From 74230d8123cb7c31afd084658720084b1a5ac5d9 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Wed, 2 Mar 2022 21:50:01 +0000
-Subject: [PATCH 04/24] set me_state=Disabled on all cmos.default files!
+Subject: [PATCH 04/37] set me_state=Disabled on all cmos.default files!
 
 yeah. why the hell isn't this the default
 
diff --git a/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
index 0938b9f2..9c00ab79 100644
--- a/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ b/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -1,7 +1,7 @@
-From f6593dd2146657ee39e2ac3f4b4bac5e7569df67 Mon Sep 17 00:00:00 2001
+From f592ac32892d7f99fa2e68504bb147e5d06184ca Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 05/24] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 05/37] util/ifdtool: add --nuke flag (all 0xFF on region)
 
 When this option is used, the region's contents are overwritten
 with all ones (0xFF).
diff --git a/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch b/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
index b6f44a1a..ee60c3c8 100644
--- a/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
+++ b/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
@@ -1,7 +1,7 @@
-From c730bc21c276376baa36956548af1e8412325a9e Mon Sep 17 00:00:00 2001
+From 18069af7c0c6beedfadb615cca9127e82a0d8007 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Sat, 6 May 2023 15:53:41 -0600
-Subject: [PATCH 06/24] mb/dell/e6400: Enable 01.0 device in devicetree for
+Subject: [PATCH 06/37] mb/dell/e6400: Enable 01.0 device in devicetree for
  dGPU models
 
 Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
diff --git a/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
index 793abd91..525bd366 100644
--- a/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ b/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -1,7 +1,7 @@
-From b109338522d997dd1b1f705891f000c2f8bfe457 Mon Sep 17 00:00:00 2001
+From 9563c107a4b40e66b610d7205a21590c7c181c78 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 07/24] Remove warning for coreboot images built without a
+Subject: [PATCH 07/37] Remove warning for coreboot images built without a
  payload
 
 I added this in upstream to prevent people from accidentally flashing
diff --git a/config/coreboot/default/patches/0008-HACK-Disable-coreboot-related-BL31-features.patch b/config/coreboot/default/patches/0008-HACK-Disable-coreboot-related-BL31-features.patch
index e4fc4f35..bd2c56bd 100644
--- a/config/coreboot/default/patches/0008-HACK-Disable-coreboot-related-BL31-features.patch
+++ b/config/coreboot/default/patches/0008-HACK-Disable-coreboot-related-BL31-features.patch
@@ -1,7 +1,7 @@
-From 243d3b1892d33b4eccc9c48333fbc137c4294a73 Mon Sep 17 00:00:00 2001
+From 7f650a19d30fe6157b150c5248d6086007323d72 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Thu, 22 Jun 2023 16:44:27 +0300
-Subject: [PATCH 08/24] HACK: Disable coreboot related BL31 features
+Subject: [PATCH 08/37] HACK: Disable coreboot related BL31 features
 
 I don't know why, but removing this BL31 make argument lets gru-kevin
 power off properly when shut down from Linux. Needs investigation.
diff --git a/config/coreboot/default/patches/0009-dell-e6430-use-ME-Soft-Temporary-Disable.patch b/config/coreboot/default/patches/0009-dell-e6430-use-ME-Soft-Temporary-Disable.patch
index afada4b5..ca3b6264 100644
--- a/config/coreboot/default/patches/0009-dell-e6430-use-ME-Soft-Temporary-Disable.patch
+++ b/config/coreboot/default/patches/0009-dell-e6430-use-ME-Soft-Temporary-Disable.patch
@@ -1,7 +1,7 @@
-From ef4f92299f18c5f28bfe8392cbc0e27d48c03415 Mon Sep 17 00:00:00 2001
+From 3f6f65ed6a435fe49534c8a0b5cb98c3eac71150 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Sun, 5 Nov 2023 11:41:41 +0000
-Subject: [PATCH 09/24] dell/e6430: use ME Soft Temporary Disable
+Subject: [PATCH 09/37] dell/e6430: use ME Soft Temporary Disable
 
 i overlooked this. it's set on other boards.
 
diff --git a/config/coreboot/default/patches/0010-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch b/config/coreboot/default/patches/0010-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
index 96a1881c..2a7d5c17 100644
--- a/config/coreboot/default/patches/0010-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
+++ b/config/coreboot/default/patches/0010-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
@@ -1,7 +1,7 @@
-From 0cf8b5be9187a6d54e100483943c72f550bc2690 Mon Sep 17 00:00:00 2001
+From b4d48233a8d829d7285501f662d999aad898be21 Mon Sep 17 00:00:00 2001
 From: Riku Viitanen <riku.viitanen@protonmail.com>
 Date: Sat, 23 Dec 2023 19:02:10 +0200
-Subject: [PATCH 10/24] mb/hp: Add Compaq Elite 8300 CMT port
+Subject: [PATCH 10/37] mb/hp: Add Compaq Elite 8300 CMT port
 
 Based on autoport and Z220 SuperIO code.
 
diff --git a/config/coreboot/default/patches/0011-nb-intel-haswell-make-IOMMU-a-runtime-option.patch b/config/coreboot/default/patches/0011-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
index 564cb74c..f8c56155 100644
--- a/config/coreboot/default/patches/0011-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
+++ b/config/coreboot/default/patches/0011-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
@@ -1,7 +1,7 @@
-From a4ffe8da011550fdeacae85ebf642ff57ffb08cc Mon Sep 17 00:00:00 2001
+From a16ff494adb1f706d402a2e167d0d53c775d0897 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 2 Mar 2024 22:51:09 +0000
-Subject: [PATCH 11/24] nb/intel/haswell: make IOMMU a runtime option
+Subject: [PATCH 11/37] nb/intel/haswell: make IOMMU a runtime option
 
 When I tested graphics cards on a coreboot port for Dell
 OptiPlex 9020 SFF, I could not use a graphics card unless
diff --git a/config/coreboot/default/patches/0012-dell-optiplex_9020-Disable-IOMMU-by-default.patch b/config/coreboot/default/patches/0012-dell-optiplex_9020-Disable-IOMMU-by-default.patch
index 06316010..e578d22a 100644
--- a/config/coreboot/default/patches/0012-dell-optiplex_9020-Disable-IOMMU-by-default.patch
+++ b/config/coreboot/default/patches/0012-dell-optiplex_9020-Disable-IOMMU-by-default.patch
@@ -1,7 +1,7 @@
-From bcb2017f4c583742bc60179e6f7c7381e1fa0a39 Mon Sep 17 00:00:00 2001
+From 4b0536ce7cd55eedc52d13497bea59d91e8924d8 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 2 Mar 2024 23:00:09 +0000
-Subject: [PATCH 12/24] dell/optiplex_9020: Disable IOMMU by default
+Subject: [PATCH 12/37] dell/optiplex_9020: Disable IOMMU by default
 
 Needed to make graphics cards work. Turning it on is
 recommended if only using iGPU, otherwise leave it off
diff --git a/config/coreboot/default/patches/0013-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch b/config/coreboot/default/patches/0013-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
index 1b4f7327..89584d95 100644
--- a/config/coreboot/default/patches/0013-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
+++ b/config/coreboot/default/patches/0013-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
@@ -1,7 +1,7 @@
-From 1515f6f416a75ecf6de0615f30fc1c5c6696e4d8 Mon Sep 17 00:00:00 2001
+From c8329f84b2d06581dcbeecedc38b7c4715a9cba7 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 6 Apr 2024 01:22:47 +0100
-Subject: [PATCH 13/24] nb/haswell: Fully disable iGPU when dGPU is used
+Subject: [PATCH 13/37] nb/haswell: Fully disable iGPU when dGPU is used
 
 My earlier patch disabled decode *and* disabled the iGPU itself, but
 a subsequent revision disabled only VGA decode. Upon revisiting, I
diff --git a/config/coreboot/default/patches/0014-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch b/config/coreboot/default/patches/0014-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
index fe9c4731..70556090 100644
--- a/config/coreboot/default/patches/0014-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
+++ b/config/coreboot/default/patches/0014-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
@@ -1,7 +1,7 @@
-From 7eb31625fc82a8f697a2f7972b24a4dd19effe5b Mon Sep 17 00:00:00 2001
+From 73dbf291631fdbae2d8e8a761c147523c8d9e65c Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 3 May 2024 11:03:32 -0600
-Subject: [PATCH 14/24] ec/dell/mec5035: Add S3 suspend SMI handler
+Subject: [PATCH 14/37] ec/dell/mec5035: Add S3 suspend SMI handler
 
 This is necessary for S3 resume to work on SNB and newer Dell Latitude
 laptops. If a command isn't sent, the EC cuts power to the DIMMs,
diff --git a/config/coreboot/default/patches/0015-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch b/config/coreboot/default/patches/0015-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
index 7bc6b3a1..9525b8ce 100644
--- a/config/coreboot/default/patches/0015-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
+++ b/config/coreboot/default/patches/0015-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
@@ -1,7 +1,7 @@
-From 961814da316a7bd760cd4aa3acd8e176a9ff2cf1 Mon Sep 17 00:00:00 2001
+From a507fe609a2e99c95218ec430916eaf4c3cb61d9 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Sat, 4 May 2024 02:00:53 +0100
-Subject: [PATCH 15/24] nb/haswell: lock policy regs when disabling IOMMU
+Subject: [PATCH 15/37] nb/haswell: lock policy regs when disabling IOMMU
 
 Angel Pons told me I should do it. See comments here:
 https://review.coreboot.org/c/coreboot/+/81016
diff --git a/config/coreboot/default/patches/0016-nb-intel-gm45-Make-DDR2-raminit-work.patch b/config/coreboot/default/patches/0016-nb-intel-gm45-Make-DDR2-raminit-work.patch
index d024045f..091a15c4 100644
--- a/config/coreboot/default/patches/0016-nb-intel-gm45-Make-DDR2-raminit-work.patch
+++ b/config/coreboot/default/patches/0016-nb-intel-gm45-Make-DDR2-raminit-work.patch
@@ -1,7 +1,7 @@
-From 24e8c088fbe14b598e588383d331f06f21d87190 Mon Sep 17 00:00:00 2001
+From 9e0a6aa376db81f9409eda92b6783a8262c1fedb Mon Sep 17 00:00:00 2001
 From: Angel Pons <th3fanbus@gmail.com>
 Date: Mon, 10 May 2021 22:40:59 +0200
-Subject: [PATCH 16/24] nb/intel/gm45: Make DDR2 raminit work
+Subject: [PATCH 16/37] nb/intel/gm45: Make DDR2 raminit work
 
 List of changes:
  - Update some timing and ODT values
diff --git a/config/coreboot/default/patches/0017-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch b/config/coreboot/default/patches/0017-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
index 8b85564d..4ba74757 100644
--- a/config/coreboot/default/patches/0017-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
+++ b/config/coreboot/default/patches/0017-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
@@ -1,7 +1,7 @@
-From b0ff2cc0470a44078e87bff6226d34b7ac652508 Mon Sep 17 00:00:00 2001
+From 6acc310c1d695d47c148296da9da189de21d58be Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Tue, 6 Aug 2024 00:50:24 +0100
-Subject: [PATCH 17/24] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
+Subject: [PATCH 17/37] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
 
 We add this patch:
 
diff --git a/config/coreboot/default/patches/0018-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch b/config/coreboot/default/patches/0018-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
index 2ef3bd9d..1cf7c0ac 100644
--- a/config/coreboot/default/patches/0018-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
+++ b/config/coreboot/default/patches/0018-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
@@ -1,7 +1,7 @@
-From 8926fcba34f6d6ea59bcddbbebf1830df38106d2 Mon Sep 17 00:00:00 2001
+From 7461210ecc7c8e41f3f941bd5ce7943e5f66c711 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 20 May 2024 10:24:16 -0600
-Subject: [PATCH 18/24] mb/dell/e6400: Use 100 MHz reference clock for display
+Subject: [PATCH 18/37] mb/dell/e6400: Use 100 MHz reference clock for display
 
 The E6400 uses a 100 MHz reference clock for spread spectrum support on
 LVDS, whereas libgfxinit previously assumed a 96 MHz input clock. For
diff --git a/config/coreboot/default/patches/0019-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch b/config/coreboot/default/patches/0019-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
index 63a7487a..2edfaae3 100644
--- a/config/coreboot/default/patches/0019-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
+++ b/config/coreboot/default/patches/0019-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
@@ -1,7 +1,7 @@
-From a80e71ba4cd7dc7c131c9649de1424899fddddb1 Mon Sep 17 00:00:00 2001
+From a683dffd774dbbe25cc77c0f7d3853232c17c2bf Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Mon, 12 Aug 2024 02:15:24 +0100
-Subject: [PATCH 19/24] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
+Subject: [PATCH 19/37] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
 
 set it to 96MHz. fixes the following build error when
 building for x4x boards e.g. gigabyte ga-g41m-es2l:
diff --git a/config/coreboot/default/patches/0020-mb-dell-Convert-E6400-into-a-variant.patch b/config/coreboot/default/patches/0020-mb-dell-Convert-E6400-into-a-variant.patch
index f187c108..a0068142 100644
--- a/config/coreboot/default/patches/0020-mb-dell-Convert-E6400-into-a-variant.patch
+++ b/config/coreboot/default/patches/0020-mb-dell-Convert-E6400-into-a-variant.patch
@@ -1,7 +1,7 @@
-From 1d62741f0f069241c2d1497c7faf0b31249e706d Mon Sep 17 00:00:00 2001
+From a48ba23bb4a24730fa49b5a10b56c9de873dea8a Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Thu, 26 Sep 2024 19:48:26 -0600
-Subject: [PATCH 20/24] mb/dell: Convert E6400 into a variant
+Subject: [PATCH 20/37] mb/dell: Convert E6400 into a variant
 
 All the GM45 Dell Latitudes should be nearly identical, so convert the
 E6400 port into a variant so that future ports for the other systems can
diff --git a/config/coreboot/default/patches/0021-mb-dell-gm45_latitudes-Add-E4300-variant.patch b/config/coreboot/default/patches/0021-mb-dell-gm45_latitudes-Add-E4300-variant.patch
index 17fa6aff..af893982 100644
--- a/config/coreboot/default/patches/0021-mb-dell-gm45_latitudes-Add-E4300-variant.patch
+++ b/config/coreboot/default/patches/0021-mb-dell-gm45_latitudes-Add-E4300-variant.patch
@@ -1,7 +1,7 @@
-From 031aca7160b8258bd16d5c5a3481c6ee900111e1 Mon Sep 17 00:00:00 2001
+From b87e6774f0407ea48610c83ea54ab6a4b4a78a24 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Thu, 26 Sep 2024 19:51:25 -0600
-Subject: [PATCH 21/24] mb/dell/gm45_latitudes: Add E4300 variant
+Subject: [PATCH 21/37] mb/dell/gm45_latitudes: Add E4300 variant
 
 Change-Id: I0f2059501b11be103187e3ce1a7c04ab85ae63d2
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
diff --git a/config/coreboot/default/patches/0022-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch b/config/coreboot/default/patches/0022-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
index ddcaadb3..bbdce358 100644
--- a/config/coreboot/default/patches/0022-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
+++ b/config/coreboot/default/patches/0022-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
@@ -1,7 +1,7 @@
-From e6a153dbaf95b034f75dd6717c6d250d1cc21635 Mon Sep 17 00:00:00 2001
+From 0bc9ca409793836dcdb386db97b7a9464d92a973 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Fri, 3 May 2024 16:31:12 -0600
-Subject: [PATCH 22/24] mb/dell: Add S3 SMI handler for Dell Latitudes
+Subject: [PATCH 22/37] mb/dell: Add S3 SMI handler for Dell Latitudes
 
 Integrate the previously added mec5035_smi_sleep() function into
 mainboard code to fix S3 suspend on the SNB/IVB Latitudes and the E7240.
diff --git a/config/coreboot/default/patches/0023-ec-dell-mec5035-Route-power-button-event-to-host.patch b/config/coreboot/default/patches/0023-ec-dell-mec5035-Route-power-button-event-to-host.patch
index 0351d503..ab01c935 100644
--- a/config/coreboot/default/patches/0023-ec-dell-mec5035-Route-power-button-event-to-host.patch
+++ b/config/coreboot/default/patches/0023-ec-dell-mec5035-Route-power-button-event-to-host.patch
@@ -1,7 +1,7 @@
-From 41fab69e70eb78b93e1998396bf85a5afbaa61ef Mon Sep 17 00:00:00 2001
+From d91dc168d6b8eca5e78aef9e48571d6edb156d45 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Tue, 18 Jun 2024 21:31:08 -0600
-Subject: [PATCH 23/24] ec/dell/mec5035: Route power button event to host
+Subject: [PATCH 23/37] ec/dell/mec5035: Route power button event to host
 
 If command 0x3e with an argument of 1 isn't sent to the EC, pressing the
 power button results in the EC powering off the system without letting
diff --git a/config/coreboot/default/patches/0024-Disable-compression-on-refcode-insertion.patch b/config/coreboot/default/patches/0024-Disable-compression-on-refcode-insertion.patch
index 51928bd6..c557e9d7 100644
--- a/config/coreboot/default/patches/0024-Disable-compression-on-refcode-insertion.patch
+++ b/config/coreboot/default/patches/0024-Disable-compression-on-refcode-insertion.patch
@@ -1,7 +1,7 @@
-From 1380f0f6f3c73bbd994228acdbcbbc06da7c6cb2 Mon Sep 17 00:00:00 2001
+From b6bd33b0430f72c2fce16a3b1e41927ef540923b Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Tue, 31 Dec 2024 14:42:24 +0000
-Subject: [PATCH 24/24] Disable compression on refcode insertion
+Subject: [PATCH 24/37] Disable compression on refcode insertion
 
 Compression is not reliably reproducible. In an lbmk release
 context, this means we cannot rely on vendorfile insertion.
diff --git a/config/coreboot/default/patches/0025-nb-intel-Disable-stack-overflow-debug-options.patch b/config/coreboot/default/patches/0025-nb-intel-Disable-stack-overflow-debug-options.patch
index c9e243f4..696be518 100644
--- a/config/coreboot/default/patches/0025-nb-intel-Disable-stack-overflow-debug-options.patch
+++ b/config/coreboot/default/patches/0025-nb-intel-Disable-stack-overflow-debug-options.patch
@@ -1,7 +1,7 @@
-From 3400b3e7c31e45506bb060db0164fa9390366d27 Mon Sep 17 00:00:00 2001
+From fc4c65f3bb807b9fc766745a70f92729b0b8d99e Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 21 Apr 2025 02:58:47 +0100
-Subject: [PATCH 1/1] nb/intel/*: Disable stack overflow debug options
+Subject: [PATCH 25/37] nb/intel/*: Disable stack overflow debug options
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
diff --git a/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch b/config/coreboot/default/patches/0026-soc-intel-skylake-configure-usb-acpi.patch
similarity index 95%
rename from config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch
rename to config/coreboot/default/patches/0026-soc-intel-skylake-configure-usb-acpi.patch
index 215a4e6d..c411c18b 100644
--- a/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch
+++ b/config/coreboot/default/patches/0026-soc-intel-skylake-configure-usb-acpi.patch
@@ -1,7 +1,7 @@
-From 0a28ea805e3dddfaa89e6c4255506a390bc7ce04 Mon Sep 17 00:00:00 2001
+From 14002b2575d73d3edbc72584502a463e6802cba6 Mon Sep 17 00:00:00 2001
 From: Felix Singer <felixsinger@posteo.net>
 Date: Wed, 26 Jun 2024 04:24:31 +0200
-Subject: [PATCH 01/11] soc/intel/skylake: configure usb acpi
+Subject: [PATCH 26/37] soc/intel/skylake: configure usb acpi
 
 Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d
 Signed-off-by: Felix Singer <felixsinger@posteo.net>
@@ -11,7 +11,7 @@ Signed-off-by: Felix Singer <felixsinger@posteo.net>
  2 files changed, 56 insertions(+), 1 deletion(-)
 
 diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
-index 22017c848b..c24df2ef75 100644
+index 4ad33496b2..9191ed0ff8 100644
 --- a/src/soc/intel/skylake/Kconfig
 +++ b/src/soc/intel/skylake/Kconfig
 @@ -10,6 +10,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
diff --git a/config/coreboot/next/patches/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch b/config/coreboot/default/patches/0027-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
similarity index 87%
rename from config/coreboot/next/patches/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
rename to config/coreboot/default/patches/0027-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
index f60aa74a..9d75cec6 100644
--- a/config/coreboot/next/patches/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
+++ b/config/coreboot/default/patches/0027-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
@@ -1,7 +1,7 @@
-From aa6dd7aa4693bd9ce1fe7f35b9532e5411fc1098 Mon Sep 17 00:00:00 2001
+From 3bb65b7f2a02ecb93e15ae037da38ad8f812747b Mon Sep 17 00:00:00 2001
 From: Mate Kukri <km@mkukri.xyz>
 Date: Fri, 22 Nov 2024 21:26:48 +0000
-Subject: [PATCH 02/11] soc/intel/skylake: Enable 4E/4F PNP I/O ports in
+Subject: [PATCH 27/37] soc/intel/skylake: Enable 4E/4F PNP I/O ports in
  bootblock
 
 Change-Id: I57c9d8a9513a268e2ca6a0abd1306cd038598173
diff --git a/config/coreboot/next/patches/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch b/config/coreboot/default/patches/0028-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch
similarity index 99%
rename from config/coreboot/next/patches/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch
rename to config/coreboot/default/patches/0028-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch
index 108f688d..df71dc47 100644
--- a/config/coreboot/next/patches/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch
+++ b/config/coreboot/default/patches/0028-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch
@@ -1,7 +1,7 @@
-From 1652c22825d3001e77159aa539dfa49d2389c775 Mon Sep 17 00:00:00 2001
+From b515ba5b0cd02dc1771f27eaa716582b0827a638 Mon Sep 17 00:00:00 2001
 From: Mate Kukri <km@mkukri.xyz>
 Date: Tue, 31 Dec 2024 22:49:15 +0000
-Subject: [PATCH 03/11] mb/lenovo: Add ThinkPad T480 and ThinkPad T480s
+Subject: [PATCH 28/37] mb/lenovo: Add ThinkPad T480 and ThinkPad T480s
 
 These machine have BootGuard fused and requires deguard to
 boot coreboot.
@@ -117,11 +117,11 @@ Change-Id: I19d421412c771c1f242f6ff39453f824fa866163
  create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_9.bin
 
 diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
-index d60720eb49..cc6b9b068a 100644
+index dc41ef14ce..bba98d9dea 100644
 --- a/src/device/pci_rom.c
 +++ b/src/device/pci_rom.c
-@@ -304,11 +304,13 @@ void pci_rom_ssdt(const struct device *device)
- 		return;
+@@ -396,14 +396,16 @@ void pci_rom_ssdt(const struct device *device)
+ 		rom = cbrom;
  	}
  
 +#if 0
@@ -132,15 +132,10 @@ index d60720eb49..cc6b9b068a 100644
  	}
 +#endif
  
- 	/* Supports up to four devices. */
- 	if ((CBMEM_ID_ROM0 + ngfx) > CBMEM_ID_ROM3) {
-@@ -336,7 +338,7 @@ void pci_rom_ssdt(const struct device *device)
- 	memcpy(cbrom, rom, cbrom_length);
- 
  	/* write _ROM method */
 -	acpigen_write_scope(scope);
 +	acpigen_write_scope("\\_SB.PCI0.RP01.PEGP");
- 	acpigen_write_rom(cbrom, cbrom_length);
+ 	acpigen_write_rom((void *)rom, rom->size * 512);
  	acpigen_pop_len(); /* pop scope */
  }
 diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl
diff --git a/config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch b/config/coreboot/default/patches/0029-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
similarity index 99%
rename from config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
rename to config/coreboot/default/patches/0029-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
index 77513b77..eb9263b9 100644
--- a/config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
+++ b/config/coreboot/default/patches/0029-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
@@ -1,7 +1,7 @@
-From 2527c4a5131d7b33e43bbc03a94921e7e59b4b02 Mon Sep 17 00:00:00 2001
+From 75cc0ea09234064318046624845b0afc5afb0ce5 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Mon, 30 Sep 2024 20:44:38 -0400
-Subject: [PATCH 04/11] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
+Subject: [PATCH 29/37] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
 
 Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
diff --git a/config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch b/config/coreboot/default/patches/0030-mb-dell-optiplex_780-Add-USFF-variant.patch
similarity index 98%
rename from config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch
rename to config/coreboot/default/patches/0030-mb-dell-optiplex_780-Add-USFF-variant.patch
index 637b7266..8ce7471b 100644
--- a/config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch
+++ b/config/coreboot/default/patches/0030-mb-dell-optiplex_780-Add-USFF-variant.patch
@@ -1,7 +1,7 @@
-From 41b93b8786ba14830648cd166f86b6317d655359 Mon Sep 17 00:00:00 2001
+From 6725ec0bb976c61cbe87e61bf0e8b02e38d14de9 Mon Sep 17 00:00:00 2001
 From: Nicholas Chin <nic.c3.14@gmail.com>
 Date: Wed, 30 Oct 2024 20:55:25 -0600
-Subject: [PATCH 07/11] mb/dell/optiplex_780: Add USFF variant
+Subject: [PATCH 30/37] mb/dell/optiplex_780: Add USFF variant
 
 Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
diff --git a/config/coreboot/next/patches/0008-dell-3050micro-disable-nvme-hotplug.patch b/config/coreboot/default/patches/0031-dell-3050micro-disable-nvme-hotplug.patch
similarity index 88%
rename from config/coreboot/next/patches/0008-dell-3050micro-disable-nvme-hotplug.patch
rename to config/coreboot/default/patches/0031-dell-3050micro-disable-nvme-hotplug.patch
index daeb0fa1..c154a9a1 100644
--- a/config/coreboot/next/patches/0008-dell-3050micro-disable-nvme-hotplug.patch
+++ b/config/coreboot/default/patches/0031-dell-3050micro-disable-nvme-hotplug.patch
@@ -1,7 +1,7 @@
-From c8192c52b2bfa93aeb6c6639476ca217e33c4313 Mon Sep 17 00:00:00 2001
+From 4ffaddc37d30d39f25faeaef73046a6e2ce525e8 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Wed, 11 Dec 2024 01:06:01 +0000
-Subject: [PATCH 08/11] dell/3050micro: disable nvme hotplug
+Subject: [PATCH 31/37] dell/3050micro: disable nvme hotplug
 
 in my testing, when running my 3050micro for a few days,
 the nvme would sometimes randomly rename.
@@ -30,12 +30,12 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 3 insertions(+), 1 deletion(-)
 
 diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb
-index 039709aa4a..0678ed1765 100644
+index da11085ab6..2a97306c5d 100644
 --- a/src/mainboard/dell/optiplex_3050/devicetree.cb
 +++ b/src/mainboard/dell/optiplex_3050/devicetree.cb
 @@ -45,7 +45,9 @@ chip soc/intel/skylake
  			register "PcieRpAdvancedErrorReporting[20]"     = "1"
- 			register "PcieRpLtrEnable[20]"                  = "1"
+ 			register "PcieRpLtrEnable[20]"                  = "true"
  			register "PcieRpClkSrcNumber[20]"               = "3"
 -			register "PcieRpHotPlug[20]"                    = "1"
 +# disable hotplug on nvme to prevent renaming e.g. nvme0n1 rename to nvme0n2,
diff --git a/config/coreboot/next/patches/0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch b/config/coreboot/default/patches/0032-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch
similarity index 96%
rename from config/coreboot/next/patches/0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch
rename to config/coreboot/default/patches/0032-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch
index cd6cdb02..e60c102f 100644
--- a/config/coreboot/next/patches/0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch
+++ b/config/coreboot/default/patches/0032-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch
@@ -1,7 +1,7 @@
-From 35295d97b08ee659b6770ce39003732a4bdfb6a0 Mon Sep 17 00:00:00 2001
+From 5d8930edfa1d9537ba80e24c0cf8f0c9e4e9ec72 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Wed, 18 Dec 2024 02:06:18 +0000
-Subject: [PATCH 09/11] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN
+Subject: [PATCH 32/37] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN
 
 This is used by lbmk to know where a tb.bin file goes,
 when extracting and padding TBT.bin from Lenovo ThunderBolt
diff --git a/config/coreboot/next/patches/0010-soc-intel-skylake-Don-t-compress-FSP-S.patch b/config/coreboot/default/patches/0033-soc-intel-skylake-Don-t-compress-FSP-S.patch
similarity index 86%
rename from config/coreboot/next/patches/0010-soc-intel-skylake-Don-t-compress-FSP-S.patch
rename to config/coreboot/default/patches/0033-soc-intel-skylake-Don-t-compress-FSP-S.patch
index 228170eb..a7ab5a96 100644
--- a/config/coreboot/next/patches/0010-soc-intel-skylake-Don-t-compress-FSP-S.patch
+++ b/config/coreboot/default/patches/0033-soc-intel-skylake-Don-t-compress-FSP-S.patch
@@ -1,7 +1,7 @@
-From f08dbaacf747eb198bbc8f83e0220ca803f19116 Mon Sep 17 00:00:00 2001
+From 49cee334bc7fe9a78b9355b5256a37984bac385a Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Thu, 26 Dec 2024 19:45:20 +0000
-Subject: [PATCH 10/11] soc/intel/skylake: Don't compress FSP-S
+Subject: [PATCH 33/37] soc/intel/skylake: Don't compress FSP-S
 
 Build systems like lbmk need to reproducibly insert
 certain vendor files on release images.
@@ -19,7 +19,7 @@ Signed-off-by: Leah Rowe <info@minifree.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
-index c24df2ef75..8e25f796ed 100644
+index 9191ed0ff8..d51ffaef7b 100644
 --- a/src/soc/intel/skylake/Kconfig
 +++ b/src/soc/intel/skylake/Kconfig
 @@ -12,7 +12,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
diff --git a/config/coreboot/next/patches/0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch b/config/coreboot/default/patches/0034-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch
similarity index 92%
rename from config/coreboot/next/patches/0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch
rename to config/coreboot/default/patches/0034-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch
index 7dae2d6a..ceee75c4 100644
--- a/config/coreboot/next/patches/0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch
+++ b/config/coreboot/default/patches/0034-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch
@@ -1,7 +1,7 @@
-From 12ff6e798d1cefc5b888e6035e52bf6d70c9ca47 Mon Sep 17 00:00:00 2001
+From 09740dc9d43a8dc24b7416b70476796515af6581 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <info@minifree.org>
 Date: Tue, 31 Dec 2024 01:40:42 +0000
-Subject: [PATCH 11/11] soc/intel/pmc: Hardcoded poweroff after power fail
+Subject: [PATCH 34/37] soc/intel/pmc: Hardcoded poweroff after power fail
 
 Coreboot can set the power state for power on after previous
 power failure, based on the option table. On the ThinkPad T480,
@@ -31,10 +31,10 @@ Signed-off-by: Leah Rowe <info@minifree.org>
  1 file changed, 4 insertions(+), 32 deletions(-)
 
 diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
-index 0fadd6e409..843581b285 100644
+index 64b9bb997c..7823775bcb 100644
 --- a/src/soc/intel/common/block/pmc/pmclib.c
 +++ b/src/soc/intel/common/block/pmc/pmclib.c
-@@ -760,38 +760,10 @@ void pmc_clear_pmcon_sts(void)
+@@ -776,38 +776,10 @@ void pmc_clear_pmcon_sts(void)
  
  void pmc_set_power_failure_state(const bool target_on)
  {
diff --git a/config/coreboot/next/patches/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch b/config/coreboot/default/patches/0035-src-intel-skylake-Disable-stack-overflow-debug-optio.patch
similarity index 88%
rename from config/coreboot/next/patches/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch
rename to config/coreboot/default/patches/0035-src-intel-skylake-Disable-stack-overflow-debug-optio.patch
index 84370089..eb5f0028 100644
--- a/config/coreboot/next/patches/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch
+++ b/config/coreboot/default/patches/0035-src-intel-skylake-Disable-stack-overflow-debug-optio.patch
@@ -1,7 +1,7 @@
-From 00b6459a9b360b16529036d9b1e10c977228a7ff Mon Sep 17 00:00:00 2001
+From 18f4e970ebda43dd538f74398aea463a67040dd3 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 6 Jan 2025 01:36:23 +0000
-Subject: [PATCH 1/1] src/intel/skylake: Disable stack overflow debug options
+Subject: [PATCH 35/37] src/intel/skylake: Disable stack overflow debug options
 
 The option was appearing in T480/3050micro configs of lbmk,
 after updating on the coreboot/next uprev for 20241206 rev8:
@@ -37,10 +37,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 9 insertions(+)
 
 diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
-index 8e25f796ed..7d324e15ea 100644
+index d51ffaef7b..42af82a5d8 100644
 --- a/src/soc/intel/skylake/Kconfig
 +++ b/src/soc/intel/skylake/Kconfig
-@@ -130,6 +130,15 @@ config DCACHE_RAM_SIZE
+@@ -129,6 +129,15 @@ config DCACHE_RAM_SIZE
  	  The size of the cache-as-ram region required during bootblock
  	  and/or romstage.
  
diff --git a/config/coreboot/next/patches/0014-src-intel-x4x-Disable-stack-overflow-debug.patch b/config/coreboot/default/patches/0036-src-intel-x4x-Disable-stack-overflow-debug.patch
similarity index 77%
rename from config/coreboot/next/patches/0014-src-intel-x4x-Disable-stack-overflow-debug.patch
rename to config/coreboot/default/patches/0036-src-intel-x4x-Disable-stack-overflow-debug.patch
index e2eae2a9..2e06ad79 100644
--- a/config/coreboot/next/patches/0014-src-intel-x4x-Disable-stack-overflow-debug.patch
+++ b/config/coreboot/default/patches/0036-src-intel-x4x-Disable-stack-overflow-debug.patch
@@ -1,7 +1,7 @@
-From 5671d54d347b110ffade5b8b6e2d052612a8716c Mon Sep 17 00:00:00 2001
+From 8dcd86c34d92b9b17bcfe4c7c61793042dc97268 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 6 Jan 2025 01:53:53 +0000
-Subject: [PATCH 1/1] src/intel/x4x: Disable stack overflow debug
+Subject: [PATCH 36/37] src/intel/x4x: Disable stack overflow debug
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -9,10 +9,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 9 insertions(+)
 
 diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
-index 097e11126c..7e4e14cf94 100644
+index 1803ef5733..7129aabf72 100644
 --- a/src/northbridge/intel/x4x/Kconfig
 +++ b/src/northbridge/intel/x4x/Kconfig
-@@ -28,6 +28,15 @@ config ECAM_MMCONF_BUS_NUMBER
+@@ -32,6 +32,15 @@ config ECAM_MMCONF_BUS_NUMBER
  	int
  	default 256
  
diff --git a/config/coreboot/default/patches/0037-Conditional-TBFW-setting-for-T480-T480S.patch b/config/coreboot/default/patches/0037-Conditional-TBFW-setting-for-T480-T480S.patch
new file mode 100644
index 00000000..7bca06a7
--- /dev/null
+++ b/config/coreboot/default/patches/0037-Conditional-TBFW-setting-for-T480-T480S.patch
@@ -0,0 +1,37 @@
+From 9b547c2029611793f895117a807fa2d2c22a5332 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 21 Apr 2025 05:14:45 +0100
+Subject: [PATCH 37/37] Conditional TBFW setting for T480/T480S
+
+Otherwise, other boards will define it, which
+might trigger the vendor download script, and
+lead to a non-zero exit.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/mainboard/lenovo/Kconfig | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/src/mainboard/lenovo/Kconfig b/src/mainboard/lenovo/Kconfig
+index 512b326381..3d3490b35d 100644
+--- a/src/mainboard/lenovo/Kconfig
++++ b/src/mainboard/lenovo/Kconfig
+@@ -18,6 +18,8 @@ config MAINBOARD_FAMILY
+ 	string
+ 	default MAINBOARD_PART_NUMBER
+ 
++if BOARD_LENOVO_T480 || BOARD_LENOVO_T480S
++
+ config LENOVO_TBFW_BIN
+ 	string "Lenovo ThunderBolt firmware bin file"
+ 	default ""
+@@ -44,4 +46,6 @@ config LENOVO_TBFW_BIN
+ 	  Just leave this blank if you don't care about this option. It's not
+ 	  useful for every ThinkPad, only certain models.
+ 
++endif # BOARD LENOVO_T480 || BOARD_LENOVO_T480S
++
+ endif # VENDOR_LENOVO
+-- 
+2.39.5
+
diff --git a/config/coreboot/default/patches/0038-do-not-break-building-other-thinkpads-with-the-hacks.patch b/config/coreboot/default/patches/0038-do-not-break-building-other-thinkpads-with-the-hacks.patch
new file mode 100644
index 00000000..87cde056
--- /dev/null
+++ b/config/coreboot/default/patches/0038-do-not-break-building-other-thinkpads-with-the-hacks.patch
@@ -0,0 +1,153 @@
+From 49204919e885dca2be45ffbaf2f5af62109ec3a7 Mon Sep 17 00:00:00 2001
+From: gaspar-ilom <gasparilom@riseup.net>
+Date: Thu, 6 Mar 2025 23:00:00 +0000
+Subject: [PATCH 1/1] do not break building other thinkpads with the hacks for
+ the t480/s made Mate Kukri
+
+still not fixing things properly but at least it should now be possible to build older thinkpads without regressions.
+prior, some code was just commented or unreachable. now we make this explicit with preprocessor directives.
+heads should build all boards on this coreboot version from the same coreboot tree.
+
+Signed-off-by: gaspar-ilom <gasparilom@riseup.net>
+---
+ src/device/pci_rom.c         |  9 ++++++---
+ src/ec/lenovo/h8/acpi/ec.asl |  4 +++-
+ src/ec/lenovo/h8/bluetooth.c | 14 ++++++++++----
+ src/ec/lenovo/h8/wwan.c      | 14 ++++++++++----
+ 4 files changed, 29 insertions(+), 12 deletions(-)
+
+diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c
+index bba98d9dea..db3dbbe2ce 100644
+--- a/src/device/pci_rom.c
++++ b/src/device/pci_rom.c
+@@ -396,16 +396,19 @@ void pci_rom_ssdt(const struct device *device)
+ 		rom = cbrom;
+ 	}
+ 
+-#if 0
++
++	#if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
++	const char *scope = "\\_SB.PCI0.RP01.PEGP";
++	#else
+ 	const char *scope = acpi_device_path(device);
++	#endif
+ 	if (!scope) {
+ 		printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device));
+ 		return;
+ 	}
+-#endif
+ 
+ 	/* write _ROM method */
+-	acpigen_write_scope("\\_SB.PCI0.RP01.PEGP");
++	acpigen_write_scope(scope);
+ 	acpigen_write_rom((void *)rom, rom->size * 512);
+ 	acpigen_pop_len(); /* pop scope */
+ }
+diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl
+index 8f4a8e1986..f80c15106c 100644
+--- a/src/ec/lenovo/h8/acpi/ec.asl
++++ b/src/ec/lenovo/h8/acpi/ec.asl
+@@ -331,7 +331,9 @@ Device(EC)
+ #include "sleepbutton.asl"
+ #include "lid.asl"
+ #include "beep.asl"
+-//#include "thermal.asl"
++#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
++#include "thermal.asl"
++#endif
+ #include "systemstatus.asl"
+ #include "thinkpad.asl"
+ }
+diff --git a/src/ec/lenovo/h8/bluetooth.c b/src/ec/lenovo/h8/bluetooth.c
+index be71a24ced..e60b6c088c 100644
+--- a/src/ec/lenovo/h8/bluetooth.c
++++ b/src/ec/lenovo/h8/bluetooth.c
+@@ -1,6 +1,8 @@
+ /* SPDX-License-Identifier: GPL-2.0-only */
+ 
+-// #include <southbridge/intel/common/gpio.h>
++#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
++#include <southbridge/intel/common/gpio.h>
++#endif
+ #include <console/console.h>
+ #include <device/device.h>
+ #include <ec/acpi/ec.h>
+@@ -26,23 +28,27 @@ void h8_bluetooth_enable(int on)
+  */
+ bool h8_has_bdc(const struct device *dev)
+ {
++	#if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
++	printk(BIOS_INFO, "H8: BDC detection not implemented. "
++			  "Assuming BDC installed\n");
++	return true;
++	#else
+ 	struct ec_lenovo_h8_config *conf = dev->chip_info;
+ 
+-	if (1 || !conf->has_bdc_detection) {
++	if (!conf->has_bdc_detection) {
+ 		printk(BIOS_INFO, "H8: BDC detection not implemented. "
+ 				  "Assuming BDC installed\n");
+ 		return true;
+ 	}
+ 
+-#if 0
+ 	if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) {
+ 		printk(BIOS_INFO, "H8: BDC installed\n");
+ 		return true;
+ 	}
+-#endif
+ 
+ 	printk(BIOS_INFO, "H8: BDC not installed\n");
+ 	return false;
++	#endif
+ }
+ 
+ /*
+diff --git a/src/ec/lenovo/h8/wwan.c b/src/ec/lenovo/h8/wwan.c
+index 5cdcf77406..b4f5787e01 100644
+--- a/src/ec/lenovo/h8/wwan.c
++++ b/src/ec/lenovo/h8/wwan.c
+@@ -1,6 +1,8 @@
+ /* SPDX-License-Identifier: GPL-2.0-only */
+ 
+-// #include <southbridge/intel/common/gpio.h>
++#if !CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
++#include <southbridge/intel/common/gpio.h>
++#endif
+ #include <console/console.h>
+ #include <device/device.h>
+ #include <ec/acpi/ec.h>
+@@ -24,23 +26,27 @@ void h8_wwan_enable(int on)
+  */
+ bool h8_has_wwan(const struct device *dev)
+ {
++	#if CONFIG(BOARD_LENOVO_SKLKBL_THINKPAD_COMMON)
++	printk(BIOS_INFO, "H8: WWAN detection not implemented. "
++			  "Assuming WWAN installed\n");
++	return true;
++	#else
+ 	struct ec_lenovo_h8_config *conf = dev->chip_info;
+ 
+-	if (1 || !conf->has_wwan_detection) {
++	if (!conf->has_wwan_detection) {
+ 		printk(BIOS_INFO, "H8: WWAN detection not implemented. "
+ 				  "Assuming WWAN installed\n");
+ 		return true;
+ 	}
+ 
+-#if 0
+ 	if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) {
+ 		printk(BIOS_INFO, "H8: WWAN installed\n");
+ 		return true;
+ 	}
+-#endif
+ 
+ 	printk(BIOS_INFO, "H8: WWAN not installed\n");
+ 	return false;
++	#endif
+ }
+ 
+ /*
+-- 
+2.39.5
+
diff --git a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb
index 87918a5f..5bb79c84 100644
--- a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -88,6 +89,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LIBRETREND is not set
 # CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -152,8 +154,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_USE_PM_ACPI_TIMER=y
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_3050=y
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -179,7 +182,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_USE_LEGACY_8254_TIMER=y
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
@@ -188,6 +190,7 @@ CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+CONFIG_USE_LEGACY_8254_TIMER=y
 # CONFIG_DEBUG_SMI is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
 CONFIG_HAVE_IFD_BIN=y
@@ -289,6 +292,7 @@ CONFIG_SOC_INTEL_KABYLAKE=y
 CONFIG_SKYLAKE_SOC_PCH_H=y
 CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
 CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FSP_T_LOCATION=0xfffe0000
 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
 CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
@@ -330,10 +334,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
 CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
-CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
-CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
 CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
-CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
 CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
 CONFIG_SOC_INTEL_CSE_RW_FILE=""
 CONFIG_SOC_INTEL_CSE_RW_VERSION=""
@@ -433,6 +434,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -482,6 +484,7 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_UDK_BASE=y
 CONFIG_UDK_2017_BINDING=y
 CONFIG_UDK_2013_VERSION=2013
@@ -584,6 +587,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -594,7 +598,6 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y
 # CONFIG_FSP_USE_REPO is not set
 # CONFIG_DISPLAY_HOBS is not set
 # CONFIG_DISPLAY_UPD_DATA is not set
-# CONFIG_BMP_LOGO is not set
 CONFIG_PLATFORM_USES_FSP2_0=y
 CONFIG_PLATFORM_USES_FSP2_X86_32=y
 CONFIG_HAVE_INTEL_FSP_REPO=y
@@ -604,7 +607,6 @@ CONFIG_FSP_M_CBFS="fspm.bin"
 # CONFIG_FSP_FULL_FD is not set
 CONFIG_FSP_T_RESERVED_SIZE=0x0
 CONFIG_FSP_M_XIP=y
-CONFIG_HAVE_FSP_LOGO_SUPPORT=y
 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
 CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
 CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
@@ -807,6 +809,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode
index b55261a4..570c6466 100644
--- a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
 # CONFIG_USE_OPTION_TABLE is not set
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -88,6 +89,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LIBRETREND is not set
 # CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -150,8 +152,9 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_USE_PM_ACPI_TIMER=y
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_3050=y
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -177,7 +180,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_USE_LEGACY_8254_TIMER=y
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
@@ -186,6 +188,7 @@ CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+CONFIG_USE_LEGACY_8254_TIMER=y
 # CONFIG_DEBUG_SMI is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
 CONFIG_HAVE_IFD_BIN=y
@@ -287,6 +290,7 @@ CONFIG_SOC_INTEL_KABYLAKE=y
 CONFIG_SKYLAKE_SOC_PCH_H=y
 CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
 CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FSP_T_LOCATION=0xfffe0000
 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
 CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
@@ -328,10 +332,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
 CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
-CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
-CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
 CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
-CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
 CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
 CONFIG_SOC_INTEL_CSE_RW_FILE=""
 CONFIG_SOC_INTEL_CSE_RW_VERSION=""
@@ -431,6 +432,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -480,6 +482,7 @@ CONFIG_HAVE_ME_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_UDK_BASE=y
 CONFIG_UDK_2017_BINDING=y
 CONFIG_UDK_2013_VERSION=2013
@@ -576,6 +579,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -586,7 +590,6 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y
 # CONFIG_FSP_USE_REPO is not set
 # CONFIG_DISPLAY_HOBS is not set
 # CONFIG_DISPLAY_UPD_DATA is not set
-# CONFIG_BMP_LOGO is not set
 CONFIG_PLATFORM_USES_FSP2_0=y
 CONFIG_PLATFORM_USES_FSP2_X86_32=y
 CONFIG_HAVE_INTEL_FSP_REPO=y
@@ -596,7 +599,6 @@ CONFIG_FSP_M_CBFS="fspm.bin"
 # CONFIG_FSP_FULL_FD is not set
 CONFIG_FSP_T_RESERVED_SIZE=0x0
 CONFIG_FSP_M_XIP=y
-CONFIG_HAVE_FSP_LOGO_SUPPORT=y
 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
 CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
 CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
@@ -800,6 +802,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/dell3050micro_vfsp_16mb/target.cfg b/config/coreboot/dell3050micro_vfsp_16mb/target.cfg
index d08c4eb5..f86065a1 100644
--- a/config/coreboot/dell3050micro_vfsp_16mb/target.cfg
+++ b/config/coreboot/dell3050micro_vfsp_16mb/target.cfg
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-tree="next"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode b/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
index 5e7573af..da15914b 100644
--- a/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
@@ -158,6 +158,8 @@ CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
index 8d9cb74b..d3c7bbeb 100644
--- a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LIBRETREND is not set
 # CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -151,8 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -172,6 +175,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
 CONFIG_DCACHE_RAM_BASE=0xfeff8000
 CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -262,6 +266,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -291,6 +296,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -354,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -459,6 +466,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -650,6 +658,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
index 48210da8..320f5b4f 100644
--- a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LIBRETREND is not set
 # CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -149,8 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -170,6 +173,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
 CONFIG_DCACHE_RAM_BASE=0xfeff8000
 CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -260,6 +264,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -289,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -352,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -455,6 +462,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -646,6 +654,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/dell780mt_8mb/target.cfg b/config/coreboot/dell780mt_8mb/target.cfg
index e2f4d8a3..45b8ea0b 100644
--- a/config/coreboot/dell780mt_8mb/target.cfg
+++ b/config/coreboot/dell780mt_8mb/target.cfg
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-tree="next"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
index cf288873..0d63f8f0 100644
--- a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LIBRETREND is not set
 # CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -151,8 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -172,6 +175,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
 CONFIG_DCACHE_RAM_BASE=0xfeff8000
 CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -262,6 +266,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -291,6 +296,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -354,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -459,6 +466,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -650,6 +658,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
index 39650339..eb3ba63e 100644
--- a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LIBRETREND is not set
 # CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -149,8 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
@@ -170,6 +173,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
 CONFIG_DCACHE_RAM_BASE=0xfeff8000
 CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -260,6 +264,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -289,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -352,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -455,6 +462,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -646,6 +654,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/dell780mt_truncate_8mb/target.cfg b/config/coreboot/dell780mt_truncate_8mb/target.cfg
index e2f4d8a3..45b8ea0b 100644
--- a/config/coreboot/dell780mt_truncate_8mb/target.cfg
+++ b/config/coreboot/dell780mt_truncate_8mb/target.cfg
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-tree="next"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
index 93a87b24..0c4ce4c0 100644
--- a/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LIBRETREND is not set
 # CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -151,8 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
@@ -172,6 +175,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
 CONFIG_DCACHE_RAM_BASE=0xfeff8000
 CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -262,6 +266,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -291,6 +296,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -354,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -459,6 +466,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -650,6 +658,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
index e92c5b5b..06340123 100644
--- a/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LIBRETREND is not set
 # CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -149,8 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
@@ -170,6 +173,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
 CONFIG_DCACHE_RAM_BASE=0xfeff8000
 CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -260,6 +264,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -289,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -352,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -455,6 +462,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -646,6 +654,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/dell780usff_8mb/target.cfg b/config/coreboot/dell780usff_8mb/target.cfg
index e2f4d8a3..45b8ea0b 100644
--- a/config/coreboot/dell780usff_8mb/target.cfg
+++ b/config/coreboot/dell780usff_8mb/target.cfg
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-tree="next"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
index 80f35e59..8b4727e0 100644
--- a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LIBRETREND is not set
 # CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -151,8 +153,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
@@ -172,6 +175,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
 CONFIG_DCACHE_RAM_BASE=0xfeff8000
 CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -262,6 +266,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -291,6 +296,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -354,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -459,6 +466,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -650,6 +658,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
index 3550d507..c80b5666 100644
--- a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
@@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_UTIL_GENPARSER is not set
 # CONFIG_OPTION_BACKEND_NONE is not set
 CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_STATIC_OPTION_TABLE=y
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
@@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y
 # CONFIG_VENDOR_LIBRETREND is not set
 # CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -149,8 +151,9 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
 CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
 CONFIG_MAX_SOCKET=1
 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
 CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
@@ -170,6 +173,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
 # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
 # CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
 CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
 CONFIG_DCACHE_RAM_BASE=0xfeff8000
 CONFIG_DCACHE_RAM_SIZE=0x8000
@@ -260,6 +264,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
 # CONFIG_PCIEXP_COMMON_CLOCK is not set
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FIXED_SMBUS_IO_BASE=0x400
 CONFIG_CBFS_CACHE_ALIGN=8
 
@@ -289,6 +294,7 @@ CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_SETUP_XIP_CACHE=y
 CONFIG_HAVE_SMI_HANDLER=y
 CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -352,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
 CONFIG_ARCH_BOOTBLOCK_X86_32=y
 CONFIG_ARCH_VERSTAGE_X86_32=y
@@ -455,6 +462,7 @@ CONFIG_HAVE_USBDEBUG=y
 CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_USBDEBUG is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -646,6 +654,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/dell780usff_truncate_8mb/target.cfg b/config/coreboot/dell780usff_truncate_8mb/target.cfg
index e2f4d8a3..45b8ea0b 100644
--- a/config/coreboot/dell780usff_truncate_8mb/target.cfg
+++ b/config/coreboot/dell780usff_truncate_8mb/target.cfg
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-tree="next"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
index b3903660..5f84d437 100644
--- a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
@@ -159,6 +159,8 @@ CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
index b53be562..99420aed 100644
--- a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
@@ -157,6 +157,8 @@ CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
index 84cc0995..5215e58f 100644
--- a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
@@ -159,6 +159,8 @@ CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
index 2ccc0c05..84108028 100644
--- a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
@@ -157,6 +157,8 @@ CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb b/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb
index cf8a9ff6..2c27a53a 100644
--- a/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb
@@ -156,6 +156,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_BOARD_DELL_E4300=y
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e4300_4mb/config/libgfxinit_txtmode b/config/coreboot/e4300_4mb/config/libgfxinit_txtmode
index 64f08c43..e46177c9 100644
--- a/config/coreboot/e4300_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e4300_4mb/config/libgfxinit_txtmode
@@ -154,6 +154,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 CONFIG_BOARD_DELL_E4300=y
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
index 6ff94706..54bb6cec 100644
--- a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 CONFIG_BOARD_DELL_LATITUDE_E5420=y
diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
index 7c942e24..083f7bd0 100644
--- a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 CONFIG_BOARD_DELL_LATITUDE_E5420=y
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
index f453a822..d1d6d22a 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
index 7a0e9de0..c2281c47 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
index 4e1c06a2..a0809203 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
index 858c289d..4a102574 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
index 5829d48e..e1d50696 100644
--- a/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6220_10mb/config/libgfxinit_txtmode b/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
index 9d5977f5..bb0a8fdb 100644
--- a/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
index 5bb09f07..67d11a0a 100644
--- a/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6230_12mb/config/libgfxinit_txtmode b/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
index 78932097..e9846595 100644
--- a/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
index 0ca7faea..2c86c696 100644
--- a/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6320_10mb/config/libgfxinit_txtmode b/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
index 94267151..be05cd84 100644
--- a/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
index aa13e2ff..71f592d3 100644
--- a/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6330_12mb/config/libgfxinit_txtmode b/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
index ad461af2..be7e52e0 100644
--- a/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
index e2f2763a..1fe90706 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
@@ -156,6 +156,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
index c6541c0a..59999383 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
@@ -154,6 +154,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6400nvidia_4mb/config/normal b/config/coreboot/e6400nvidia_4mb/config/normal
index c0e7ed44..6c5d2cc9 100644
--- a/config/coreboot/e6400nvidia_4mb/config/normal
+++ b/config/coreboot/e6400nvidia_4mb/config/normal
@@ -153,6 +153,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 CONFIG_BOARD_DELL_E6400=y
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
index 6ae0c751..b4116efb 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
index 68a70d8c..91560f0c 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 6a22b520..ddeb46b4 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index 97a26378..0a4f7610 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
index 90b857a6..83805e50 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
index c670179e..3eafffd6 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index f83ae61e..be2460d3 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -157,6 +157,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index aa54a59c..d06fe80f 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -155,6 +155,8 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
deleted file mode 100644
index d5896fdc..00000000
--- a/config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ /dev/null
@@ -1,205 +0,0 @@
-From 27b2f2bc24e5e860b87119c963e534fb0d3e55f2 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 05/11] util/ifdtool: add --nuke flag (all 0xFF on region)
-
-When this option is used, the region's contents are overwritten
-with all ones (0xFF).
-
-Example:
-
-./ifdtool --nuke gbe coreboot.rom
-./ifdtool --nuke bios coreboot.com
-./ifdtool --nuke me coreboot.com
-
-Rebased since the last revision update in lbmk.
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
- 1 file changed, 83 insertions(+), 31 deletions(-)
-
-diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index 94105efe52..0706496af2 100644
---- a/util/ifdtool/ifdtool.c
-+++ b/util/ifdtool/ifdtool.c
-@@ -2230,6 +2230,7 @@ static void print_usage(const char *name)
- 	       "                                         tgl    - Tiger Lake\n"
- 	       "                                         wbg    - Wellsburg\n"
- 	       "   -S | --setpchstrap                    Write a PCH strap\n"
-+	       "   -N | --nuke <region>                  Overwrite the specified region with 0xFF (all ones)\n"
- 	       "   -V | --newvalue                       The new value to write into PCH strap specified by -S\n"
- 	       "   -v | --version:                       print the version\n"
- 	       "   -h | --help:                          print this help\n\n"
-@@ -2238,6 +2239,60 @@ static void print_usage(const char *name)
- 	       "\n");
- }
- 
-+static int
-+get_region_type_string(const char *region_type_string)
-+{
-+       if (!strcasecmp("Descriptor", region_type_string))
-+               return 0;
-+       else if (!strcasecmp("BIOS", region_type_string))
-+               return 1;
-+       else if (!strcasecmp("ME", region_type_string))
-+               return 2;
-+       else if (!strcasecmp("GbE", region_type_string))
-+               return 3;
-+       else if (!strcasecmp("Platform Data", region_type_string))
-+               return 4;
-+       else if (!strcasecmp("Device Exp1", region_type_string))
-+               return 5;
-+       else if (!strcasecmp("Secondary BIOS", region_type_string))
-+               return 6;
-+       else if (!strcasecmp("Reserved", region_type_string))
-+               return 7;
-+       else if (!strcasecmp("EC", region_type_string))
-+               return 8;
-+       else if (!strcasecmp("Device Exp2", region_type_string))
-+               return 9;
-+       else if (!strcasecmp("IE", region_type_string))
-+               return 10;
-+       else if (!strcasecmp("10GbE_0", region_type_string))
-+               return 11;
-+       else if (!strcasecmp("10GbE_1", region_type_string))
-+               return 12;
-+       else if (!strcasecmp("PTT", region_type_string))
-+               return 15;
-+       return -1;
-+}
-+
-+static void
-+nuke(const char *filename, char *image, int size, int region_type)
-+{
-+       int i;
-+       struct region region;
-+       const struct frba *frba = find_frba(image, size);
-+       if (!frba)
-+               exit(EXIT_FAILURE);
-+
-+       region = get_region(frba, region_type);
-+       if (region.size > 0) {
-+               for (i = region.base; i <= region.limit; i++) {
-+                       if ((i + 1) > (size))
-+                               break;
-+                       image[i] = 0xFF;
-+               }
-+               write_image(filename, image, size);
-+       }
-+}
-+
- int main(int argc, char *argv[])
- {
- 	int opt, option_index = 0;
-@@ -2245,6 +2300,7 @@ int main(int argc, char *argv[])
- 	int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
- 	int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
- 	int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
-+	int mode_nuke = 0;
- 	int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
- 	char *region_type_string = NULL, *region_fname = NULL, *layout_fname = NULL;
- 	char *new_filename = NULL;
-@@ -2279,6 +2335,7 @@ int main(int argc, char *argv[])
- 		{"validate", 0, NULL, 't'},
- 		{"setpchstrap", 1, NULL, 'S'},
- 		{"newvalue", 1, NULL, 'V'},
-+		{"nuke", 1, NULL, 'N'},
- 		{0, 0, 0, 0}
- 	};
- 
-@@ -2328,35 +2385,8 @@ int main(int argc, char *argv[])
- 			region_fname++;
- 			// Descriptor, BIOS, ME, GbE, Platform
- 			// valid type?
--			if (!strcasecmp("Descriptor", region_type_string))
--				region_type = 0;
--			else if (!strcasecmp("BIOS", region_type_string))
--				region_type = 1;
--			else if (!strcasecmp("ME", region_type_string))
--				region_type = 2;
--			else if (!strcasecmp("GbE", region_type_string))
--				region_type = 3;
--			else if (!strcasecmp("Platform Data", region_type_string))
--				region_type = 4;
--			else if (!strcasecmp("Device Exp1", region_type_string))
--				region_type = 5;
--			else if (!strcasecmp("Secondary BIOS", region_type_string))
--				region_type = 6;
--			else if (!strcasecmp("Reserved", region_type_string))
--				region_type = 7;
--			else if (!strcasecmp("EC", region_type_string))
--				region_type = 8;
--			else if (!strcasecmp("Device Exp2", region_type_string))
--				region_type = 9;
--			else if (!strcasecmp("IE", region_type_string))
--				region_type = 10;
--			else if (!strcasecmp("10GbE_0", region_type_string))
--				region_type = 11;
--			else if (!strcasecmp("10GbE_1", region_type_string))
--				region_type = 12;
--			else if (!strcasecmp("PTT", region_type_string))
--				region_type = 15;
--			if (region_type == -1) {
-+			if ((region_type =
-+			    get_region_type_string(region_type_string)) == -1) {
- 				fprintf(stderr, "No such region type: '%s'\n\n",
- 					region_type_string);
- 				fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
-@@ -2533,6 +2563,22 @@ int main(int argc, char *argv[])
- 		case 't':
- 			mode_validate = 1;
- 			break;
-+               case 'N':
-+                       region_type_string = strdup(optarg);
-+                       if (!region_type_string) {
-+                               fprintf(stderr, "No region specified\n");
-+                               print_usage(argv[0]);
-+                               exit(EXIT_FAILURE);
-+                       }
-+                       if ((region_type =
-+                           get_region_type_string(region_type_string)) == -1) {
-+                               fprintf(stderr, "No such region type: '%s'\n\n",
-+                                       region_type_string);
-+                               print_usage(argv[0]);
-+                               exit(EXIT_FAILURE);
-+                       }
-+                       mode_nuke = 1;
-+                       break;
- 		case 'v':
- 			print_version();
- 			exit(EXIT_SUCCESS);
-@@ -2552,7 +2598,8 @@ int main(int argc, char *argv[])
- 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
- 			mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
- 			mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
--			(mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) > 1) {
-+			(mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
-+			mode_nuke) > 1) {
- 		fprintf(stderr, "You may not specify more than one mode.\n\n");
- 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
- 		exit(EXIT_FAILURE);
-@@ -2561,7 +2608,8 @@ int main(int argc, char *argv[])
- 	if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
- 			mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
- 			mode_locked + mode_unlocked + mode_density + mode_altmedisable +
--			mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) == 0) {
-+			mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
-+			mode_nuke) == 0) {
- 		fprintf(stderr, "You need to specify a mode.\n\n");
- 		fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
- 		exit(EXIT_FAILURE);
-@@ -2674,6 +2722,10 @@ int main(int argc, char *argv[])
- 		write_image(new_filename, image, size);
- 	}
- 
-+	if (mode_nuke) {
-+		nuke(new_filename, image, size, region_type);
-+	}
-+
- 	if (mode_altmedisable) {
- 		struct fpsba *fpsba = find_fpsba(image, size);
- 		struct fmsba *fmsba = find_fmsba(image, size);
--- 
-2.39.5
-
diff --git a/config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch
deleted file mode 100644
index 3ff12724..00000000
--- a/config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 8230acfb9e1f692202b306ffb10fe89f783ab4e8 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 06/11] Remove warning for coreboot images built without a
- payload
-
-I added this in upstream to prevent people from accidentally flashing
-roms without a payload resulting in a no boot situation, but in
-libreboot lbmk handles the payload and thus this warning always comes
-up. This has caused confusion and concern so just patch it out.
----
- payloads/Makefile.mk | 13 +------------
- 1 file changed, 1 insertion(+), 12 deletions(-)
-
-diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
-index 5f988dac1b..516133880f 100644
---- a/payloads/Makefile.mk
-+++ b/payloads/Makefile.mk
-@@ -50,16 +50,5 @@ distclean-payloads:
- print-repo-info-payloads:
- 	-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
- 
--ifeq ($(CONFIG_PAYLOAD_NONE),y)
--show_notices:: warn_no_payload
--endif
--
--warn_no_payload:
--	printf "\n\t** WARNING **\n"
--	printf "coreboot has been built without a payload. Writing\n"
--	printf "a coreboot image without a payload to your board's\n"
--	printf "flash chip will result in a non-booting system. You\n"
--	printf "can use cbfstool to add a payload to the image.\n\n"
--
- .PHONY: force-payload coreinfo nvramcui
--.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
-+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
--- 
-2.39.5
-
diff --git a/config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch b/config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch
deleted file mode 100644
index 5e4e6edb..00000000
--- a/config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From 916c7b027faba625b922e74e45e50f9ceab64a64 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Mon, 6 Jan 2025 01:16:01 +0000
-Subject: [PATCH 1/1] ec/dasharo: Comment EC_DASHARO_EC_FLASH_SIZE
-
-We don't use anything dasharo in Libreboot.
-
-This patch prevents the following config item appearing
-in T480 and 3050 Micro configs:
-
-CONFIG_EC_DASHARO_EC_FLASH_SIZE=0x20000
-
-Otherwise, make-oldconfig adds it automatically.
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- src/ec/dasharo/ec/Kconfig | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/ec/dasharo/ec/Kconfig b/src/ec/dasharo/ec/Kconfig
-index 901d3ce514..071e37f95e 100644
---- a/src/ec/dasharo/ec/Kconfig
-+++ b/src/ec/dasharo/ec/Kconfig
-@@ -28,4 +28,4 @@ config EC_DASHARO_EC_UPDATE_FILE
- 
- config EC_DASHARO_EC_FLASH_SIZE
- 	hex
--	default 0x20000
-+	# default 0x20000
--- 
-2.39.5
-
diff --git a/config/coreboot/next/target.cfg b/config/coreboot/next/target.cfg
deleted file mode 100644
index 1d01e623..00000000
--- a/config/coreboot/next/target.cfg
+++ /dev/null
@@ -1,4 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-tree="next"
-rev="2f1e4e5e8515dd350cc9d68b48d32a5b6b02ae6a"
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
index cdc695c2..a144c477 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 CONFIG_BOARD_LENOVO_R400=y
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_txtmode b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
index 91ba135b..5c7163ad 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 CONFIG_BOARD_LENOVO_R400=y
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
index 0a4c166c..6ace7143 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 CONFIG_BOARD_LENOVO_R400=y
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_txtmode b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
index 97470cd1..f69d4999 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 CONFIG_BOARD_LENOVO_R400=y
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
index c545969e..2885b89a 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 CONFIG_BOARD_LENOVO_R400=y
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_txtmode b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
index f34e0708..ed35d89d 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 CONFIG_BOARD_LENOVO_R400=y
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
index b728673f..275e67b9 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
@@ -184,6 +184,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_txtmode b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
index 938de455..ff6c5236 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
@@ -182,6 +182,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index 12d52087..f4b4b092 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -158,6 +158,8 @@ CONFIG_TPM_PIRQ=0x0
 # CONFIG_BOARD_DELL_E4300 is not set
 # CONFIG_BOARD_DELL_E6400 is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
 # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
 # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
index 7e85c093..1ba29ce7 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_txtmode b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
index ba52b0fa..613433c3 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
index 1b4db730..5155dbd9 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_txtmode b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
index 392f8112..34ae080a 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
index 624dac6c..95159c9d 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_txtmode b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
index 734e4af7..f486a603 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 CONFIG_BOARD_LENOVO_T400=y
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
index 13ca5ecd..7283edb3 100644
--- a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
index 3c54ea8e..78df42f3 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
index 70cbc037..428a1f91 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
index 14e33fe5..0336b2cc 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
@@ -184,6 +184,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_txtmode b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
index 1bfd6823..7c7bbca1 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
@@ -182,6 +182,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
index 44f4dda1..39a9a3e7 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
@@ -183,6 +183,8 @@ CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
index d2d02c77..d3f1588d 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
@@ -181,6 +181,8 @@ CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb
index 5dea5962..7f3db415 100644
--- a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb
@@ -17,6 +17,7 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -87,6 +88,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
 # CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -159,7 +161,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_USE_LEGACY_8254_TIMER=y
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16"
@@ -169,12 +170,14 @@ CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+CONFIG_USE_LEGACY_8254_TIMER=y
 # CONFIG_DEBUG_SMI is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
 CONFIG_HAVE_IFD_BIN=y
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
@@ -313,6 +316,7 @@ CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
 CONFIG_SOC_INTEL_KABYLAKE=y
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FSP_T_LOCATION=0xfffe0000
 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
 CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
@@ -354,10 +358,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
 CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
-CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
-CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
 CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
-CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
 CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
 CONFIG_SOC_INTEL_CSE_RW_FILE=""
 CONFIG_SOC_INTEL_CSE_RW_VERSION=""
@@ -456,6 +457,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -516,6 +518,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_UDK_BASE=y
 CONFIG_UDK_2017_BINDING=y
 CONFIG_UDK_2013_VERSION=2013
@@ -617,6 +620,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -627,7 +631,6 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y
 # CONFIG_FSP_USE_REPO is not set
 # CONFIG_DISPLAY_HOBS is not set
 # CONFIG_DISPLAY_UPD_DATA is not set
-# CONFIG_BMP_LOGO is not set
 CONFIG_PLATFORM_USES_FSP2_0=y
 CONFIG_PLATFORM_USES_FSP2_X86_32=y
 CONFIG_HAVE_INTEL_FSP_REPO=y
@@ -637,7 +640,6 @@ CONFIG_FSP_M_CBFS="fspm.bin"
 # CONFIG_FSP_FULL_FD is not set
 CONFIG_FSP_T_RESERVED_SIZE=0x0
 CONFIG_FSP_M_XIP=y
-CONFIG_HAVE_FSP_LOGO_SUPPORT=y
 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
 CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
 CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
@@ -846,6 +848,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode
index 1aedc109..6e6dc2c7 100644
--- a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode
@@ -17,6 +17,7 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -87,6 +88,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
 # CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -157,7 +159,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_USE_LEGACY_8254_TIMER=y
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16"
@@ -167,12 +168,14 @@ CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+CONFIG_USE_LEGACY_8254_TIMER=y
 # CONFIG_DEBUG_SMI is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
 CONFIG_HAVE_IFD_BIN=y
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
@@ -311,6 +314,7 @@ CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
 CONFIG_SOC_INTEL_KABYLAKE=y
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FSP_T_LOCATION=0xfffe0000
 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
 CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
@@ -352,10 +356,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
 CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
-CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
-CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
 CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
-CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
 CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
 CONFIG_SOC_INTEL_CSE_RW_FILE=""
 CONFIG_SOC_INTEL_CSE_RW_VERSION=""
@@ -454,6 +455,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -514,6 +516,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_UDK_BASE=y
 CONFIG_UDK_2017_BINDING=y
 CONFIG_UDK_2013_VERSION=2013
@@ -609,6 +612,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -619,7 +623,6 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y
 # CONFIG_FSP_USE_REPO is not set
 # CONFIG_DISPLAY_HOBS is not set
 # CONFIG_DISPLAY_UPD_DATA is not set
-# CONFIG_BMP_LOGO is not set
 CONFIG_PLATFORM_USES_FSP2_0=y
 CONFIG_PLATFORM_USES_FSP2_X86_32=y
 CONFIG_HAVE_INTEL_FSP_REPO=y
@@ -629,7 +632,6 @@ CONFIG_FSP_M_CBFS="fspm.bin"
 # CONFIG_FSP_FULL_FD is not set
 CONFIG_FSP_T_RESERVED_SIZE=0x0
 CONFIG_FSP_M_XIP=y
-CONFIG_HAVE_FSP_LOGO_SUPPORT=y
 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
 CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
 CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
@@ -839,6 +841,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t480_vfsp_16mb/target.cfg b/config/coreboot/t480_vfsp_16mb/target.cfg
index 9ac608b7..6ba1e1cd 100644
--- a/config/coreboot/t480_vfsp_16mb/target.cfg
+++ b/config/coreboot/t480_vfsp_16mb/target.cfg
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-tree="next"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb
index ee006e59..6bf08b2d 100644
--- a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb
@@ -17,6 +17,7 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -87,6 +88,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
 # CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -159,7 +161,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_USE_LEGACY_8254_TIMER=y
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/t480s/ifd_16"
@@ -169,12 +170,14 @@ CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+CONFIG_USE_LEGACY_8254_TIMER=y
 # CONFIG_DEBUG_SMI is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
 CONFIG_HAVE_IFD_BIN=y
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
@@ -313,6 +316,7 @@ CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
 CONFIG_SOC_INTEL_KABYLAKE=y
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FSP_T_LOCATION=0xfffe0000
 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
 CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
@@ -354,10 +358,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
 CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
-CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
-CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
 CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
-CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
 CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
 CONFIG_SOC_INTEL_CSE_RW_FILE=""
 CONFIG_SOC_INTEL_CSE_RW_VERSION=""
@@ -456,6 +457,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -516,6 +518,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_UDK_BASE=y
 CONFIG_UDK_2017_BINDING=y
 CONFIG_UDK_2013_VERSION=2013
@@ -617,6 +620,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -627,7 +631,6 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y
 # CONFIG_FSP_USE_REPO is not set
 # CONFIG_DISPLAY_HOBS is not set
 # CONFIG_DISPLAY_UPD_DATA is not set
-# CONFIG_BMP_LOGO is not set
 CONFIG_PLATFORM_USES_FSP2_0=y
 CONFIG_PLATFORM_USES_FSP2_X86_32=y
 CONFIG_HAVE_INTEL_FSP_REPO=y
@@ -637,7 +640,6 @@ CONFIG_FSP_M_CBFS="fspm.bin"
 # CONFIG_FSP_FULL_FD is not set
 CONFIG_FSP_T_RESERVED_SIZE=0x0
 CONFIG_FSP_M_XIP=y
-CONFIG_HAVE_FSP_LOGO_SUPPORT=y
 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
 CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
 CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
@@ -846,6 +848,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode
index 30a69e6a..aa5f8188 100644
--- a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode
@@ -17,6 +17,7 @@ CONFIG_COMPILER_GCC=y
 # CONFIG_FMD_GENPARSER is not set
 # CONFIG_UTIL_GENPARSER is not set
 CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
 CONFIG_COMPRESS_RAMSTAGE_LZMA=y
 # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
 CONFIG_SEPARATE_ROMSTAGE=y
@@ -87,6 +88,7 @@ CONFIG_VENDOR_LENOVO=y
 # CONFIG_VENDOR_LIBRETREND is not set
 # CONFIG_VENDOR_MITAC_COMPUTING is not set
 # CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
 # CONFIG_VENDOR_OCP is not set
 # CONFIG_VENDOR_OPENCELLULAR is not set
 # CONFIG_VENDOR_PACKARDBELL is not set
@@ -157,7 +159,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
 CONFIG_HAVE_INTEL_FIRMWARE=y
-CONFIG_USE_LEGACY_8254_TIMER=y
 CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_DRIVERS_INTEL_WIFI=y
 CONFIG_IFD_BIN_PATH="../../../config/ifd/t480s/ifd_16"
@@ -167,12 +168,14 @@ CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+CONFIG_USE_LEGACY_8254_TIMER=y
 # CONFIG_DEBUG_SMI is not set
 # CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
 CONFIG_HAVE_IFD_BIN=y
 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
 # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
 # CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
@@ -311,6 +314,7 @@ CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
 CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
 CONFIG_SOC_INTEL_KABYLAKE=y
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
 CONFIG_FSP_T_LOCATION=0xfffe0000
 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
 CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
@@ -352,10 +356,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
 CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
 CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
-CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
-CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
 CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
-CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
 CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
 CONFIG_SOC_INTEL_CSE_RW_FILE=""
 CONFIG_SOC_INTEL_CSE_RW_VERSION=""
@@ -454,6 +455,7 @@ CONFIG_UDELAY_TSC=y
 CONFIG_TSC_MONOTONIC_TIMER=y
 CONFIG_TSC_SYNC_MFENCE=y
 CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
 CONFIG_SMM_TSEG=y
 CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
 CONFIG_AP_STACK_SIZE=0x800
@@ -514,6 +516,7 @@ CONFIG_HAVE_GBE_BIN=y
 # CONFIG_LOCK_MANAGEMENT_ENGINE is not set
 CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_UDK_BASE=y
 CONFIG_UDK_2017_BINDING=y
 CONFIG_UDK_2013_VERSION=2013
@@ -609,6 +612,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
 CONFIG_DRIVERS_UART=y
 # CONFIG_DRIVERS_UART_OXPCIE is not set
 # CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
 # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
 # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -619,7 +623,6 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y
 # CONFIG_FSP_USE_REPO is not set
 # CONFIG_DISPLAY_HOBS is not set
 # CONFIG_DISPLAY_UPD_DATA is not set
-# CONFIG_BMP_LOGO is not set
 CONFIG_PLATFORM_USES_FSP2_0=y
 CONFIG_PLATFORM_USES_FSP2_X86_32=y
 CONFIG_HAVE_INTEL_FSP_REPO=y
@@ -629,7 +632,6 @@ CONFIG_FSP_M_CBFS="fspm.bin"
 # CONFIG_FSP_FULL_FD is not set
 CONFIG_FSP_T_RESERVED_SIZE=0x0
 CONFIG_FSP_M_XIP=y
-CONFIG_HAVE_FSP_LOGO_SUPPORT=y
 CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
 CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
 CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
@@ -839,6 +841,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
 CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
 CONFIG_HWBASE_DIRECT_PCIDEV=y
 CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
 CONFIG_WARNINGS_ARE_ERRORS=y
 CONFIG_MAX_REBOOT_CNT=3
 CONFIG_RELOCATABLE_MODULES=y
diff --git a/config/coreboot/t480s_vfsp_16mb/target.cfg b/config/coreboot/t480s_vfsp_16mb/target.cfg
index a7d63ae1..6dd3a6f8 100644
--- a/config/coreboot/t480s_vfsp_16mb/target.cfg
+++ b/config/coreboot/t480s_vfsp_16mb/target.cfg
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-tree="next"
+tree="default"
 xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
index 57d15b49..bc68dd6a 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_txtmode b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
index 13769f7e..efa62fa0 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
index 532741dd..2a8efe6f 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_txtmode b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
index 257c908e..9c073ea9 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
index ff076154..22de6c8d 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_txtmode b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
index 08c9236b..03a48de1 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 CONFIG_BOARD_LENOVO_T500=y
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
index 483bd813..5e1da555 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_txtmode b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
index af2d7b88..e26767d4 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
index 3319154f..ee27ad35 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
@@ -184,6 +184,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_txtmode b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
index 9e967473..a7b82145 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
@@ -182,6 +182,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
index 28f13fd7..86a2b3a5 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
@@ -176,6 +176,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
index 4f937d8f..2f92e2d5 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
@@ -176,6 +176,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
index 46f8756c..09bcf7c5 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
@@ -176,6 +176,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
index 023ab331..f4d06fb5 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
@@ -176,6 +176,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
index 2fe11eda..680e52eb 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_txtmode b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
index 9fd9d795..22dfc054 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
index 8f570ea6..5c4ab85d 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_txtmode b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
index 65133cc3..1d2c74e8 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
index 52537b8a..1103130e 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_txtmode b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
index 17b11b03..3df6264b 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
index 32c477b7..b5c2ca56 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
@@ -184,6 +184,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_txtmode b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
index 5dfb39f4..18794ac6 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
@@ -182,6 +182,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
index 8ef1f09a..6be3c77b 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
@@ -183,6 +183,8 @@ CONFIG_BOARD_LENOVO_THINKPAD_W541=y
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_txtmode b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
index b552bef0..9be8bf6a 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
@@ -181,6 +181,8 @@ CONFIG_BOARD_LENOVO_THINKPAD_W541=y
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
index 27d40621..792f23b5 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_txtmode b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
index cbb78671..b35d4ffa 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
@@ -181,6 +181,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
index 19cf5e16..f7a679d4 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_txtmode b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
index f417738c..a7ded559 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
@@ -181,6 +181,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
index 42ea44a9..749efb36 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_txtmode b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
index 31ee78b8..036f799b 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
@@ -181,6 +181,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
index ec0a07f2..678cca8d 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
@@ -186,6 +186,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_txtmode b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
index 81bf09b2..17dc8ebe 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
@@ -184,6 +184,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
index 30a6b715..56929239 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_txtmode b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
index 38f7d458..f43cc332 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
index ebf4d378..1d4e9f37 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_txtmode b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
index 2cd56418..a1dbc601 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
index 6e8e3a74..dd6de6d4 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
index ab92025e..7133d30e 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
index a80d0c38..84d1ee76 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
@@ -185,6 +185,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
index f5f25b9c..ac1d0190 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
index e9929406..96df38ac 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_txtmode b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
index c9c37759..e88d3c1a 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
@@ -181,6 +181,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
index 42d5107c..e33fa425 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_txtmode b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
index 988e838a..c14ced63 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
@@ -181,6 +181,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
index ce92cd2d..bdc10d75 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
@@ -183,6 +183,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_txtmode b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
index b2164483..84f914cf 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
@@ -181,6 +181,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x60/config/libgfxinit_corebootfb b/config/coreboot/x60/config/libgfxinit_corebootfb
index 6f5902ea..dcef9476 100644
--- a/config/coreboot/x60/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60/config/libgfxinit_corebootfb
@@ -177,6 +177,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x60/config/libgfxinit_txtmode b/config/coreboot/x60/config/libgfxinit_txtmode
index b5c2f343..9ba1af3d 100644
--- a/config/coreboot/x60/config/libgfxinit_txtmode
+++ b/config/coreboot/x60/config/libgfxinit_txtmode
@@ -177,6 +177,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
index 1f005c11..8f2ca894 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
@@ -177,6 +177,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_txtmode b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
index c4017c1d..0ef10de1 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
@@ -177,6 +177,8 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
 # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
 # CONFIG_BOARD_LENOVO_M920Q is not set
 # CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
 # CONFIG_BOARD_LENOVO_T400 is not set
 # CONFIG_BOARD_LENOVO_T500 is not set
 # CONFIG_BOARD_LENOVO_R400 is not set
diff --git a/config/submodule/coreboot/next/fsp/module.cfg b/config/submodule/coreboot/default/fsp/module.cfg
similarity index 73%
rename from config/submodule/coreboot/next/fsp/module.cfg
rename to config/submodule/coreboot/default/fsp/module.cfg
index a380ddda..2b39812b 100644
--- a/config/submodule/coreboot/next/fsp/module.cfg
+++ b/config/submodule/coreboot/default/fsp/module.cfg
@@ -2,4 +2,4 @@
 
 subrepo="https://review.coreboot.org/fsp.git"
 subrepo_bkup="https://github.com/coreboot/fsp"
-subhash="909cf43ad6ccebb6adee482bc0a4f098c32c9a6d"
+subhash="86c9111639d357e0f369c14248097b119112a71c"
diff --git a/config/submodule/coreboot/default/module.list b/config/submodule/coreboot/default/module.list
index 5f77de0c..8c7f3d20 100644
--- a/config/submodule/coreboot/default/module.list
+++ b/config/submodule/coreboot/default/module.list
@@ -1,4 +1,5 @@
 3rdparty/arm-trusted-firmware
+3rdparty/fsp
 3rdparty/intel-microcode
 3rdparty/libgfxinit
 3rdparty/libhwbase
diff --git a/config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg b/config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg
deleted file mode 100644
index 30baf001..00000000
--- a/config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20241212.tar.gz"
-subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20241212.tar.gz"
-subhash="daa4243f927451ac18c337cf17c27849e68329b3f7eb25b8c3379fda9c6a484201b73d4ffccab89a0ae22cc5e432f141ba149015a003834b0515bdb3d4efe0a8"
diff --git a/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg b/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg
deleted file mode 100644
index 2117a540..00000000
--- a/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subfile="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.43.1.tar.xz"
-subfile_bkup="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.43.1.tar.xz"
-subhash="20977ad17729141a2c26d358628f44a0944b84dcfefdec2ba029c2d02f40dfc41cc91c0631044560d2bd6f9a51e1f15846b4b311befbe14f1239f14ff7d57824"
diff --git a/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg b/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg
deleted file mode 100644
index 4ef88d1d..00000000
--- a/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
-subhash="932bdef0cda94bacedf452ab17f103c0cb511ff2cec55e9112fc0328cbf1d803b42595728ea7b200e0a057c03e85626f937012e49a7515bc5dd256b2bf4bc396"
diff --git a/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg
deleted file mode 100644
index 46b55c01..00000000
--- a/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz"
-subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2"
diff --git a/config/submodule/coreboot/next/intel-microcode/module.cfg b/config/submodule/coreboot/next/intel-microcode/module.cfg
deleted file mode 100644
index ef649800..00000000
--- a/config/submodule/coreboot/next/intel-microcode/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subrepo="https://review.coreboot.org/intel-microcode.git"
-subrepo_bkup="https://github.com/coreboot/intel-microcode"
-subhash="8ac9378a84879e81c503e09f344560b3dd7f72df"
diff --git a/config/submodule/coreboot/next/libgfxinit/module.cfg b/config/submodule/coreboot/next/libgfxinit/module.cfg
deleted file mode 100644
index 93383129..00000000
--- a/config/submodule/coreboot/next/libgfxinit/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subrepo="https://review.coreboot.org/libgfxinit.git"
-subrepo_bkup="https://github.com/coreboot/libgfxinit"
-subhash="17cfc92f402493979783585b6581efbd98c0cf07"
diff --git a/config/submodule/coreboot/next/libhwbase/module.cfg b/config/submodule/coreboot/next/libhwbase/module.cfg
deleted file mode 100644
index 4995e70f..00000000
--- a/config/submodule/coreboot/next/libhwbase/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subrepo="https://review.coreboot.org/libhwbase.git"
-subrepo_bkup="https://github.com/coreboot/libhwbase"
-subhash="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/next/module.list b/config/submodule/coreboot/next/module.list
deleted file mode 100644
index 36f05dbe..00000000
--- a/config/submodule/coreboot/next/module.list
+++ /dev/null
@@ -1,12 +0,0 @@
-3rdparty/fsp
-3rdparty/intel-microcode
-3rdparty/libgfxinit
-3rdparty/libhwbase
-3rdparty/vboot
-util/crossgcc/tarballs/binutils-2.43.1.tar.xz
-util/crossgcc/tarballs/gcc-14.2.0.tar.xz
-util/crossgcc/tarballs/gmp-6.3.0.tar.xz
-util/crossgcc/tarballs/mpc-1.3.1.tar.gz
-util/crossgcc/tarballs/mpfr-4.2.1.tar.xz
-util/crossgcc/tarballs/nasm-2.16.03.tar.bz2
-util/crossgcc/tarballs/acpica-unix-20241212.tar.gz
diff --git a/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg
deleted file mode 100644
index 9b6cc57a..00000000
--- a/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
-subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97"
diff --git a/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg
deleted file mode 100644
index 93cc1a05..00000000
--- a/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz"
-subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475"
diff --git a/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg
deleted file mode 100644
index 3895e2ef..00000000
--- a/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2"
-subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2"
-subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172"
diff --git a/config/submodule/coreboot/next/vboot/module.cfg b/config/submodule/coreboot/next/vboot/module.cfg
deleted file mode 100644
index d13a1b29..00000000
--- a/config/submodule/coreboot/next/vboot/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subrepo="https://review.coreboot.org/vboot.git"
-subrepo_bkup="https://github.com/coreboot/vboot"
-subhash="3f94e2c7ed58c4e67d6e7dc6052ec615dbbb9bb4"
diff --git a/config/submodule/coreboot/next/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/next/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
deleted file mode 100644
index 1ac41de6..00000000
--- a/config/submodule/coreboot/next/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
+++ /dev/null
@@ -1,178 +0,0 @@
-From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
-From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
-Date: Thu, 30 May 2024 14:08:33 -0600
-Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
- vmlinuz_header_{offset,size}
-
-The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
-wrong:
-
-	if (!vmlinuz_header_size ||
-	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
-	    kpart_data) {
-		return 1;
-	}
-
-`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
-unless something has overflowed!  And `vmlinuz_header_offset` hasn't even
-been set yet (besides being initialized to zero)!
-
-GCC will deduce that if the check didn't cause the function to bail, then
-vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
-[2GiB,4GiB).
-
-On platforms where size_t is 32-bits, this is *especially* broken.
-memcpy's size argument must be in the range [0,2GiB).  Because GCC has
-proved that vmlinuz_header_size is higher than that, it will fail to
-compile:
-
-	host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
-
-So, fix the check.
-
-I can now say that what I suspect the original author meant to write would
-be the following patch, if `vmlinuz_header_offset` were already set:
-
-	-kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
-	+now        + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
-
-This hypothesis is supported by `now` not getting incremented by
-`kblob_size` the way it is for the keyblock and preamble sizes.
-
-However, we can also see that even this "corrected" bounds check is
-insufficient: it does not detect the vmlinuz_header overflowing into
-kblob_data.
-
-OK, so let's describe the fix:
-
-Have a `*vmlinuz_header` pointer instead of a
-`uint64_t vmlinuz_header_offset`, to be more similar to all the other
-regions.  With this change, the correct check becomes a simple
-
-      vmlinuz_header + vmlinuz_header_size > kblob_data
-
-While we're at it, make some changes that could have helped avoid this in
-the first place:
-
- - Add comments.
- - Calculate the vmlinuz_header offset right away, instead of waiting.
- - Go ahead and increment `now` by `kblob_size`, to increase regularity.
-
-Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
----
- host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
- 1 file changed, 51 insertions(+), 21 deletions(-)
-
-diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
-index 4ccfcf33..d2c09443 100644
---- a/host/lib/extract_vmlinuz.c
-+++ b/host/lib/extract_vmlinuz.c
-@@ -15,16 +15,44 @@
- 
- int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
- 		   void **vmlinuz_out, size_t *vmlinuz_size) {
-+	// We're going to be extracting `vmlinuz_header` and
-+	// `kblob_data`, and returning the concatenation of them.
-+	//
-+	// kpart_data = +-[kpart_size]------------------------------------+
-+	//              |                                                 |
-+	//  keyblock  = | +-[keyblock->keyblock_size]-------------------+ |
-+	//              | | struct vb2_keyblock          keyblock       | |
-+	//              | | char []                      ...data...     | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//  preamble  = | +-[preamble->preamble_size]-------------------+ |
-+	//              | | struct vb2_kernel_preamble   preamble       | |
-+	//              | | char []                       ...data...    | |
-+	//              | | char []                      vmlinuz_header | |
-+	//              | | char []                       ...data...    | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//  kblob_data= | +-[preamble->body_signature.data_size]--------+ |
-+	//              | | char []                       ...data...    | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//              +-------------------------------------------------+
-+
- 	size_t now = 0;
-+	// The 3 sections of kpart_data.
-+	struct vb2_keyblock *keyblock = NULL;
- 	struct vb2_kernel_preamble *preamble = NULL;
- 	uint8_t *kblob_data = NULL;
- 	uint32_t kblob_size = 0;
-+	// vmlinuz_header
-+	uint8_t *vmlinuz_header = NULL;
- 	uint32_t vmlinuz_header_size = 0;
--	uint64_t vmlinuz_header_address = 0;
--	uint64_t vmlinuz_header_offset = 0;
-+	// The concatenated result.
- 	void *vmlinuz = NULL;
- 
--	struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
-+	// Isolate the 3 sections of kpart_data.
-+
-+	keyblock = (struct vb2_keyblock *)kpart_data;
- 	now += keyblock->keyblock_size;
- 	if (now > kpart_size)
- 		return 1;
-@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
- 
- 	kblob_data = kpart_data + now;
- 	kblob_size = preamble->body_signature.data_size;
--
--	if (!kblob_data || (now + kblob_size) > kpart_size)
-+	now += kblob_size;
-+	if (now > kpart_size)
- 		return 1;
- 
-+	// Find `vmlinuz_header` within `preamble`.
-+
- 	if (preamble->header_version_minor > 0) {
--		vmlinuz_header_address = preamble->vmlinuz_header_address;
-+		// calculate the vmlinuz_header offset from
-+		// the beginning of the kpart_data.  The kblob doesn't
-+		// include the body_load_offset, but does include
-+		// the keyblock and preamble sections.
-+		size_t vmlinuz_header_offset =
-+			preamble->vmlinuz_header_address -
-+			preamble->body_load_address +
-+			keyblock->keyblock_size +
-+			preamble->preamble_size;
-+
-+		vmlinuz_header = kpart_data + vmlinuz_header_offset;
- 		vmlinuz_header_size = preamble->vmlinuz_header_size;
- 	}
- 
--	if (!vmlinuz_header_size ||
--	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
--	    kpart_data) {
-+	if (!vmlinuz_header ||
-+	    !vmlinuz_header_size ||
-+	    vmlinuz_header + vmlinuz_header_size > kblob_data) {
- 		return 1;
- 	}
- 
--	// calculate the vmlinuz_header offset from
--	// the beginning of the kpart_data.  The kblob doesn't
--	// include the body_load_offset, but does include
--	// the keyblock and preamble sections.
--	vmlinuz_header_offset = vmlinuz_header_address -
--		preamble->body_load_address +
--		keyblock->keyblock_size +
--		preamble->preamble_size;
-+	// Concatenate and return.
- 
- 	vmlinuz = malloc(vmlinuz_header_size + kblob_size);
- 	if (vmlinuz == NULL)
- 		return 1;
--
--	memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
--	       vmlinuz_header_size);
--
-+	memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
- 	memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
- 
- 	*vmlinuz_out = vmlinuz;
--- 
-2.45.1
-

From a18d287a81ec2a0fc018cf61cfa150308ccdeb4d Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Mon, 21 Apr 2025 13:01:37 +0300
Subject: [PATCH 1203/1549] lib.sh: Fix python3 detection when 'python' is
 python2

Properly set $pyver to "3" when we detect we can use python3. In the
following version checks, use the $python we detected instead of a
'python' from PATH because the latter might be a python2 while still
co-existing with a python3.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 include/lib.sh | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 21066ecc..47b16100 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -99,13 +99,17 @@ done
 
 pyver="2"
 python="python3"
-command -v python3 1>/dev/null || python="python"
+if command -v python3 1>/dev/null; then
+	pyver="3"
+else
+	python="python"
+fi
 command -v $python 1>/dev/null || pyver=""
 [ -z "$pyver" ] || \
-	python -c 'import sys; print(sys.version_info[:])' 1>/dev/null \
+	$python -c 'import sys; print(sys.version_info[:])' 1>/dev/null \
 	    2>/dev/null || $err "Cannot determine which Python version."
 [ -n "$pyver" ] && \
-	pyver="`python -c 'import sys; print(sys.version_info[:])' | \
+	pyver="`$python -c 'import sys; print(sys.version_info[:])' | \
 	    awk '{print $1}'`" && \
 	pyver="${pyver#(}" && pyver="${pyver%,}"
 if [ "${pyver%%.*}" != "3" ]; then

From 21020fa319a32b146d489530adf9b0f043ba4dfa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 21 Apr 2025 21:24:53 +0100
Subject: [PATCH 1204/1549] add missing config/data/coreboot/0

this is a file containing one byte, of value zero

i meant to add it in previous commits, for the resizing
and shrinking of tarballs when inserting or deleting
vendor files

used by include/vendor.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/coreboot/0 | Bin 0 -> 1 bytes
 1 file changed, 0 insertions(+), 0 deletions(-)
 create mode 100644 config/data/coreboot/0

diff --git a/config/data/coreboot/0 b/config/data/coreboot/0
new file mode 100644
index 0000000000000000000000000000000000000000..f76dd238ade08917e6712764a16a22005a50573d
GIT binary patch
literal 1
IcmZPo000310RR91

literal 0
HcmV?d00001


From f59c24f12aa01174eef2d2ffd148aa43983985fa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 22 Apr 2025 00:06:29 +0100
Subject: [PATCH 1205/1549] coreboot/g43t_am3: fix data.vbt path

this board became a variant, in the new coreboot revision that
lbmk recently updated to. fix the data.vbt path to prevent error.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/g43t_am3/config/libgfxinit_txtmode      | 2 +-
 config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/coreboot/g43t_am3/config/libgfxinit_txtmode b/config/coreboot/g43t_am3/config/libgfxinit_txtmode
index 039c3bbb..6cb5f3be 100644
--- a/config/coreboot/g43t_am3/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t_am3/config/libgfxinit_txtmode
@@ -145,7 +145,7 @@ CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3"
 # CONFIG_CONSOLE_POST is not set
diff --git a/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
index 34d2fef6..89964024 100644
--- a/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
@@ -145,7 +145,7 @@ CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_ECAM_MMCONF_BUS_NUMBER=256
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3"
 # CONFIG_CONSOLE_POST is not set

From d114e0a765cba9762f830140399fd00592e6e1f0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 22 Apr 2025 00:09:27 +0100
Subject: [PATCH 1206/1549] mk: don't print confirmation of git pkg.cfg

otherwise, the "list" commands include such text,
where they should not.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/mk b/mk
index a8e4e617..c07e4895 100755
--- a/mk
+++ b/mk
@@ -163,7 +163,8 @@ trees()
 		return 1
 	fi
 
-	x_ e "config/git/$project/pkg.cfg" f
+	[ -f "config/git/$project/pkg.cfg" ] || \
+	    $err "config/git/$project/pkg.cfg missing"
 
 	for d in "elf" "config/data" "config" "src"; do
 		eval "${d#*/}dir=\"$d/$project\""

From a10d81399c7b354f930f9b1f2b0a909ef0628a7c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 22 Apr 2025 00:16:08 +0100
Subject: [PATCH 1207/1549] NEW MAINBOARD: Acer Q45T-AM (G43T-AM3 variant)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../q45t_am/config/libgfxinit_txtmode         | 624 ++++++++++++++++++
 config/coreboot/q45t_am/target.cfg            |   9 +
 2 files changed, 633 insertions(+)
 create mode 100644 config/coreboot/q45t_am/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/q45t_am/target.cfg

diff --git a/config/coreboot/q45t_am/config/libgfxinit_txtmode b/config/coreboot/q45t_am/config/libgfxinit_txtmode
new file mode 100644
index 00000000..3e5705fa
--- /dev/null
+++ b/config/coreboot/q45t_am/config/libgfxinit_txtmode
@@ -0,0 +1,624 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+CONFIG_VENDOR_ACER=y
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Q45T-AM"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="acer/g43t-am3"
+CONFIG_VGA_BIOS_ID="8086,2e12"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Acer"
+# CONFIG_BOARD_ACER_VN7_572G is not set
+# CONFIG_BOARD_ACER_G43T_AM3 is not set
+CONFIG_BOARD_ACER_Q45T_AM=y
+CONFIG_CBFS_SIZE=0x200000
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_VARIANT_DIR="q45t-am"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Acer"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Q45T-AM"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_HAVE_IFD_BIN is not set
+CONFIG_PCIEXP_HOTPLUG_BUSES=32
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_2048=y
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=2048
+CONFIG_ROM_SIZE=0x00200000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_ITE_COMMON_PRE_RAM=y
+CONFIG_SUPERIO_ITE_COMMON_GPIO_PRE_RAM=y
+CONFIG_SUPERIO_ITE_COMMON_NUM_GPIO_SETS=8
+CONFIG_SUPERIO_ITE_ENV_CTRL=y
+CONFIG_SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG=y
+CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2=y
+CONFIG_SUPERIO_ITE_IT8720F=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_NULL=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/q45t_am/target.cfg b/config/coreboot/q45t_am/target.cfg
new file mode 100644
index 00000000..3379b716
--- /dev/null
+++ b/config/coreboot/q45t_am/target.cfg
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_memtest="y"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"

From 3b2d933842ac974caad3faf2ff4271b387d6502f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 22 Apr 2025 01:59:05 +0100
Subject: [PATCH 1208/1549] coreboot/default: add missing submodules

due to a rule in .gitignore, these were ignored, because it
ignores .tar.xz entries in git status

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../coreboot/default/acpica-unix-20241212.tar.gz/module.cfg  | 5 +++++
 .../coreboot/default/binutils-2.43.1.tar.xz/module.cfg       | 5 +++++
 .../submodule/coreboot/default/gcc-14.2.0.tar.xz/module.cfg  | 5 +++++
 3 files changed, 15 insertions(+)
 create mode 100644 config/submodule/coreboot/default/acpica-unix-20241212.tar.gz/module.cfg
 create mode 100644 config/submodule/coreboot/default/binutils-2.43.1.tar.xz/module.cfg
 create mode 100644 config/submodule/coreboot/default/gcc-14.2.0.tar.xz/module.cfg

diff --git a/config/submodule/coreboot/default/acpica-unix-20241212.tar.gz/module.cfg b/config/submodule/coreboot/default/acpica-unix-20241212.tar.gz/module.cfg
new file mode 100644
index 00000000..30baf001
--- /dev/null
+++ b/config/submodule/coreboot/default/acpica-unix-20241212.tar.gz/module.cfg
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20241212.tar.gz"
+subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20241212.tar.gz"
+subhash="daa4243f927451ac18c337cf17c27849e68329b3f7eb25b8c3379fda9c6a484201b73d4ffccab89a0ae22cc5e432f141ba149015a003834b0515bdb3d4efe0a8"
diff --git a/config/submodule/coreboot/default/binutils-2.43.1.tar.xz/module.cfg b/config/submodule/coreboot/default/binutils-2.43.1.tar.xz/module.cfg
new file mode 100644
index 00000000..1e16b92a
--- /dev/null
+++ b/config/submodule/coreboot/default/binutils-2.43.1.tar.xz/module.cfg
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.43.1.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.43.1.tar.xz"
+subhash="20977ad17729141a2c26d358628f44a0944b84dcfefdec2ba029c2d02f40dfc41cc91c0631044560d2bd6f9a51e1f15846b4b311befbe14f1239f14ff7d57824"
diff --git a/config/submodule/coreboot/default/gcc-14.2.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gcc-14.2.0.tar.xz/module.cfg
new file mode 100644
index 00000000..4ef88d1d
--- /dev/null
+++ b/config/submodule/coreboot/default/gcc-14.2.0.tar.xz/module.cfg
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
+subhash="932bdef0cda94bacedf452ab17f103c0cb511ff2cec55e9112fc0328cbf1d803b42595728ea7b200e0a057c03e85626f937012e49a7515bc5dd256b2bf4bc396"

From 0ddd19637519d95ab02a29d2b3ec5d16de3cbdf3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 22 Apr 2025 02:43:27 +0100
Subject: [PATCH 1209/1549] coreboot/q45t_am3: use ifd-based setup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../q45t_am/config/libgfxinit_txtmode         |  22 +++++++++++++-----
 config/ifd/q45t_am/gbe                        | Bin 0 -> 16384 bytes
 config/ifd/q45t_am/ifd                        | Bin 0 -> 8192 bytes
 3 files changed, 16 insertions(+), 6 deletions(-)
 create mode 100644 config/ifd/q45t_am/gbe
 create mode 100644 config/ifd/q45t_am/ifd

diff --git a/config/coreboot/q45t_am/config/libgfxinit_txtmode b/config/coreboot/q45t_am/config/libgfxinit_txtmode
index 3e5705fa..9f29191a 100644
--- a/config/coreboot/q45t_am/config/libgfxinit_txtmode
+++ b/config/coreboot/q45t_am/config/libgfxinit_txtmode
@@ -127,7 +127,7 @@ CONFIG_MAINBOARD_VENDOR="Acer"
 # CONFIG_BOARD_ACER_VN7_572G is not set
 # CONFIG_BOARD_ACER_G43T_AM3 is not set
 CONFIG_BOARD_ACER_Q45T_AM=y
-CONFIG_CBFS_SIZE=0x200000
+CONFIG_CBFS_SIZE=0x3FA000
 CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
@@ -164,12 +164,14 @@ CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_IFD_BIN_PATH="../../../config/ifd/q45t_am/ifd"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/q45t_am/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-# CONFIG_HAVE_IFD_BIN is not set
+CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -189,8 +191,8 @@ CONFIG_BOARD_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_2048=y
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
@@ -200,8 +202,8 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=2048
-CONFIG_ROM_SIZE=0x00200000
+CONFIG_COREBOOT_ROMSIZE_KB=4096
+CONFIG_ROM_SIZE=0x00400000
 CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
 CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
 CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
@@ -333,7 +335,13 @@ CONFIG_SUPERIO_ITE_IT8720F=y
 #
 # Intel Firmware
 #
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
 CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 # CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
@@ -600,6 +608,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
 # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
diff --git a/config/ifd/q45t_am/gbe b/config/ifd/q45t_am/gbe
new file mode 100644
index 0000000000000000000000000000000000000000..296622a24d5e618d7a33e20ee84bb2aaa21459e7
GIT binary patch
literal 16384
zcmeI%!3n}J7>41mf>!hrE7W?B7C{iaI6|Qd)D4`W6ZGWG0i3{txPVue@X|Vj1H=|v
zp*Vr?{(*cXBq2QHmhAF+q;n0eO=O$8o1L>Vr8(qks(+5Q8cFVPJcu_*ES2VZE6ua&
zKdoK)laAuG=f>^X-Aw&xAF8LRlrLoEYk3MZiDoK_Kwg#gycB-#*4@tt0R#|0009IL
zKmY**5I_I{1Q0*~0R#|0009ILKmY**5I_I{1Zshd|9>6=0tg_000IagfB*srAb<b@
b2q1s}0tg_000IagfB*srAb<b@e=qO`U9##`

literal 0
HcmV?d00001

diff --git a/config/ifd/q45t_am/ifd b/config/ifd/q45t_am/ifd
new file mode 100644
index 0000000000000000000000000000000000000000..20d98959ccc543eec9ab96b501525acc032eb1e4
GIT binary patch
literal 8192
zcmeI#Jqp4w7{>7@sR<3JEePVrlEuAO@EUFo4h|m6bBG>Dy+Lddp`%MnhX1>~A&@*T
zzf3t?-<8qCdRrIKNDDRkRr;eOBd=7XO0sh5djFWT-AJ?P%9dq+KbLiwuj>{-m-FeE
z%S>a=ac>`c%sjFXKmY**5I_I{1Q0*~fuRIm%~CG9_=w+r+wB!%h+W>(^Y<CboqG{L
W009ILKmY**5I_I{1Q0+VAAt`zAc#8v

literal 0
HcmV?d00001


From 564155277ea9d4ffab7287702bdd4868c0df0bdc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 22 Apr 2025 03:24:38 +0100
Subject: [PATCH 1210/1549] coreboot/g43t_am3: use ifd-based setup

no-ME setup. with a gbe file. we previously made this
a descriptorless setup.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../g43t_am3/config/libgfxinit_txtmode        |  22 +++++++++++++-----
 .../g43t_am3_16mb/config/libgfxinit_txtmode   |  14 +++++++++--
 config/ifd/g43t_am3/gbe                       | Bin 0 -> 16384 bytes
 config/ifd/g43t_am3/ifd                       | Bin 0 -> 8192 bytes
 config/ifd/g43t_am3/ifd_16                    | Bin 0 -> 8192 bytes
 5 files changed, 28 insertions(+), 8 deletions(-)
 create mode 100644 config/ifd/g43t_am3/gbe
 create mode 100644 config/ifd/g43t_am3/ifd
 create mode 100644 config/ifd/g43t_am3/ifd_16

diff --git a/config/coreboot/g43t_am3/config/libgfxinit_txtmode b/config/coreboot/g43t_am3/config/libgfxinit_txtmode
index 6cb5f3be..dd12a433 100644
--- a/config/coreboot/g43t_am3/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t_am3/config/libgfxinit_txtmode
@@ -127,7 +127,7 @@ CONFIG_MAINBOARD_VENDOR="Acer"
 # CONFIG_BOARD_ACER_VN7_572G is not set
 CONFIG_BOARD_ACER_G43T_AM3=y
 # CONFIG_BOARD_ACER_Q45T_AM is not set
-CONFIG_CBFS_SIZE=0x200000
+CONFIG_CBFS_SIZE=0x3FA000
 CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
@@ -164,12 +164,14 @@ CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_IFD_BIN_PATH="../../../config/ifd/g43t_am3/ifd"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/g43t_am3/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-# CONFIG_HAVE_IFD_BIN is not set
+CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -189,8 +191,8 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_2048=y
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_4096=y
 # CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
@@ -200,8 +202,8 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
 # CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
 # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=2048
-CONFIG_ROM_SIZE=0x00200000
+CONFIG_COREBOOT_ROMSIZE_KB=4096
+CONFIG_ROM_SIZE=0x00400000
 CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
 CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
 CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
@@ -333,7 +335,13 @@ CONFIG_SUPERIO_ITE_IT8720F=y
 #
 # Intel Firmware
 #
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
 CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 # CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
@@ -600,6 +608,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
 # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
diff --git a/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
index 89964024..7c74ea57 100644
--- a/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
@@ -127,7 +127,7 @@ CONFIG_MAINBOARD_VENDOR="Acer"
 # CONFIG_BOARD_ACER_VN7_572G is not set
 CONFIG_BOARD_ACER_G43T_AM3=y
 # CONFIG_BOARD_ACER_Q45T_AM is not set
-CONFIG_CBFS_SIZE=0x1000000
+CONFIG_CBFS_SIZE=0xFFA000
 CONFIG_MAX_CPUS=4
 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
 CONFIG_POST_DEVICE=y
@@ -164,12 +164,14 @@ CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_IFD_BIN_PATH="../../../config/ifd/g43t_am3/ifd_16"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/g43t_am3/gbe"
 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
 CONFIG_CARDBUS_PLUGIN_SUPPORT=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_DEBUG_SMI is not set
-# CONFIG_HAVE_IFD_BIN is not set
+CONFIG_HAVE_IFD_BIN=y
 CONFIG_PCIEXP_HOTPLUG_BUSES=32
 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@@ -333,7 +335,13 @@ CONFIG_SUPERIO_ITE_IT8720F=y
 #
 # Intel Firmware
 #
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
 CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
 CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
 # CONFIG_GOOGLE_PVMFW_CBMEM is not set
 CONFIG_ARCH_X86=y
@@ -600,6 +608,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
 # CONFIG_DEBUG_SPI_FLASH is not set
 # CONFIG_DEBUG_BOOT_STATE is not set
 # CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
 # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
 # end of Debugging
 
diff --git a/config/ifd/g43t_am3/gbe b/config/ifd/g43t_am3/gbe
new file mode 100644
index 0000000000000000000000000000000000000000..bad66aeae3fe50ef5c7760f32f95525084ce4f81
GIT binary patch
literal 16384
zcmeI%F$%&k6vpwdf>snET2L2hQCxKK2nBE82|R|Qi*Bw357E)3t842G3T_@Frl8P*
z7ZCm*gqJ*CGW^ygx7FhCQrFs(v7g+{&Rd$ooR5+>kW2d<ZPb(eOTQDZx2}_$G|Syg
znmyb~vuf&RJjK1hkH2p>Yw?Wsp;`*0<4jg#&974pqlwCLs*$TzUkcT{#|Z%h5I_I{
z1Q0*~0R#|0009ILKmY**5I_I{1Q0*~0R#|0009K*0tx^Bbq@9jAb<b@2q1s}0tg_0
e00IagfB*srAb<b@2q1s}0tg_000Id7rNA4lhw4=T

literal 0
HcmV?d00001

diff --git a/config/ifd/g43t_am3/ifd b/config/ifd/g43t_am3/ifd
new file mode 100644
index 0000000000000000000000000000000000000000..79f92194cb61adf401ec0d49b5cb6933ef7e5aa2
GIT binary patch
literal 8192
zcmeI#K?;K~5QX8FsS$S;3gR+H@I0=2nI6Fd^dh}OuhDvgXb>UYb)$&<17RkCFvFKs
z`sY|X6;|5Sf|G9Qv_||RB&SmG5^Krim2!S9?b2$ks`B%r)Q|h18Q^E;qs+F)9PjzD
z_vk|p1Q0*~0R#|0009ILKwxWuZ`a5NA6{X}dB0D=-zWE=MgRc>5I_I{1Q0*~0R#|0
I0D*G~Op*$gApigX

literal 0
HcmV?d00001

diff --git a/config/ifd/g43t_am3/ifd_16 b/config/ifd/g43t_am3/ifd_16
new file mode 100644
index 0000000000000000000000000000000000000000..d41cfc8c485d674257b1e61fb2c00962ef6a0518
GIT binary patch
literal 8192
zcmeI#K?;K~5QX8F!HByQgyJ$s@H}06nI54B=tX*mUPF6>7?DD{b5jxd2SR27VTLcO
z+@7D{R9S5oi%x3Q>l<l9NKUm<NI^3BoJr-irCL^JO;es9CBF|3Wq_ZVk22dHbG-9o
z@6m@I2q1s}0tg_000IagfWW^6rv54)eSF1rFZ+!Zf1lEW903FnKmY**5I_I{1Q0*~
J0R+w|Far+MmMs7P

literal 0
HcmV?d00001


From 4b7ab403c6549f22e8436ecdee89c48effba2279 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 22 Apr 2025 03:25:51 +0100
Subject: [PATCH 1211/1549] ifd/q45t_am: unlock regions by default

i used ifdtool --unlock to do this

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/ifd/q45t_am/ifd | Bin 8192 -> 8192 bytes
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/config/ifd/q45t_am/ifd b/config/ifd/q45t_am/ifd
index 20d98959ccc543eec9ab96b501525acc032eb1e4..4fda48b88c096ac2b9c8a0e62e8c57a898858ad6 100644
GIT binary patch
delta 24
gcmZp0XmFU2#P$C_1H=FS5=<N%lLZ;4EMk-g0C|H5o&W#<

delta 24
fcmZp0XmFU2#3e1oz`)BR!NkEaS&(tcB1U-tL}3K*


From 2bee87cfc26743aa2d9bf2e0509f6ee6e9f4958e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 22 Apr 2025 04:01:31 +0100
Subject: [PATCH 1212/1549] lib.sh: add missing copyright year

alper made a fix to this file a few hours ago, but
forgot to update the copyright header

i'm doing it for alper, as a courtesy

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/lib.sh b/include/lib.sh
index 47b16100..d72f0378 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -2,6 +2,7 @@
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 # Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
 # Copyright (c) 2020-2025 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2025 Alper Nebi Yasak <alpernebiyasak@gmail.com>
 
 export LC_COLLATE=C
 export LC_ALL=C

From cb52fc4ba82f41ca149bcb03dd4c596b25bebc37 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 22 Apr 2025 07:51:49 +0100
Subject: [PATCH 1213/1549] Fix VBT path on HP Elite desktops

Also: hp8300cmt_16mb did not specify a data.vbt path, even
though it is indeed available in the coreboot tree. This
has been corrected.

The previous lack of VBT on hp8300cmt_16mb wasn't really a
big problem, since coreboot handles initialisation anyway,
and it's basically optional on Linux. Coreboot doesn't parse
VBT at all.

This patch should fix build errors, that were caused on the
recent revision update, where several of the HP desktops
have now been turned into variants.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb | 2 +-
 config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode    | 2 +-
 config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb | 2 +-
 config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode    | 2 +-
 .../coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb   | 7 ++++++-
 config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode   | 7 ++++++-
 6 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
index 50f1a616..d93c4641 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
@@ -147,7 +147,7 @@ CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC"
 # CONFIG_CONSOLE_POST is not set
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
index d9eddf1f..b4badd1d 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
@@ -145,7 +145,7 @@ CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC"
 # CONFIG_CONSOLE_POST is not set
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
index f6de97b6..9dfa0452 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
@@ -147,7 +147,7 @@ CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC"
 # CONFIG_CONSOLE_POST is not set
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
index 4086601c..2ebfd145 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
@@ -145,7 +145,7 @@ CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC"
 # CONFIG_CONSOLE_POST is not set
diff --git a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
index 8b5e7254..61881e32 100644
--- a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
@@ -146,6 +146,7 @@ CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 CMT"
 # CONFIG_CONSOLE_POST is not set
@@ -451,7 +452,7 @@ CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
@@ -496,6 +497,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Ironlake"
diff --git a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
index 2c2e3cc7..471a76b6 100644
--- a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
@@ -144,6 +144,7 @@ CONFIG_ECAM_MMCONF_BUS_NUMBER=64
 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
 # CONFIG_FATAL_ASSERTS is not set
 CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 CMT"
 # CONFIG_CONSOLE_POST is not set
@@ -447,7 +448,7 @@ CONFIG_PCIEXP_HOTPLUG_IO=0x2000
 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
 CONFIG_INTEL_GMA_HAVE_VBT=y
-# CONFIG_INTEL_GMA_ADD_VBT is not set
+CONFIG_INTEL_GMA_ADD_VBT=y
 # CONFIG_SOFTWARE_I2C is not set
 CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
@@ -492,6 +493,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
 # CONFIG_DRIVERS_I2C_MAX98396 is not set
 CONFIG_INTEL_INT15=y
 CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
 CONFIG_GFX_GMA=y
 CONFIG_GFX_GMA_DYN_CPU=y
 CONFIG_GFX_GMA_GENERATION="Ironlake"

From d0581914c74d89513abc888a19267307071b5fff Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 22 Apr 2025 10:25:08 +0100
Subject: [PATCH 1214/1549] coreboot/hp8300cmt: purge xhci_overcurrent_mapping

This prevents a build error, as the variable is no longer
used at all by coreboot (EHCI mapping is used as reference
instead).

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...0cmt-remove-xhci_overcurrent_mapping.patch | 42 +++++++++++++++++++
 1 file changed, 42 insertions(+)
 create mode 100644 config/coreboot/default/patches/0039-hp-8300cmt-remove-xhci_overcurrent_mapping.patch

diff --git a/config/coreboot/default/patches/0039-hp-8300cmt-remove-xhci_overcurrent_mapping.patch b/config/coreboot/default/patches/0039-hp-8300cmt-remove-xhci_overcurrent_mapping.patch
new file mode 100644
index 00000000..c80f3341
--- /dev/null
+++ b/config/coreboot/default/patches/0039-hp-8300cmt-remove-xhci_overcurrent_mapping.patch
@@ -0,0 +1,42 @@
+From b313c1d4bae17fc6eb3a8217c503187d1cd5453d Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 22 Apr 2025 10:21:59 +0100
+Subject: [PATCH 1/1] hp/8300cmt: remove xhci_overcurrent_mapping
+
+No longer needed, as per the following commit:
+
+commit a3d1e6c4806e6c0e2e744be3a03fce12f21778d1
+Author: Keith Hui <buurin@gmail.com>
+Date:   Tue Dec 31 18:19:31 2024 -0500
+
+    sb/intel/bd82x6x: Apply EHCI mapping to xhci_overcurrent_mapping
+
+Removing this from the devicetree also allows the
+board to compile, otherwise an error is thrown:
+
+build/mainboard/hp/compaq_elite_8300_cmt/static.c:147:10: error: 'const struct southbridge_intel_bd82x6x_config' has no member named 'xhci_overcurrent_mapping'
+  147 |         .xhci_overcurrent_mapping = 0x00000c03,
+      |          ^~~~~~~~~~~~~~~~~~~~~~~~
+build/mainboard/hp/compaq_elite_8300_cmt/static.c:147:37: error: excess elements in struct initializer [-Werror]
+  147 |         .xhci_overcurrent_mapping = 0x00000c03,
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
+index 3d21739b72..3a0b6d5c59 100644
+--- a/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
+@@ -25,7 +25,6 @@ chip northbridge/intel/sandybridge
+ 			register "spi_lvscc" = "0x2005"
+ 			register "spi_uvscc" = "0x2005"
+ 			register "superspeed_capable_ports" = "0x0000000f"
+-			register "xhci_overcurrent_mapping" = "0x00000c03"
+ 			register "xhci_switchable_ports" = "0x0000000f"
+ 			register "usb_port_config" = "{
+ 				{ 1, 0, 0 },
+-- 
+2.39.5
+

From 4cf64e59ed09f4fd98a35043c63705990884eee2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 23 Apr 2025 03:49:22 +0100
Subject: [PATCH 1215/1549] mk: simplify handling of trees()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/mk b/mk
index c07e4895..1cdd2fd6 100755
--- a/mk
+++ b/mk
@@ -489,7 +489,6 @@ copy_elf()
 	x_ make clean -C "$srcdir" $cleanargs
 }
 
-if trees "$@"; then
-	. "$mkhelpercfg"
-	$cmd
-fi
+trees "$@" || exit 0
+. "$mkhelpercfg"
+$cmd

From b1ea4165754f04660d3c7282274c4b12355f88a0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 23 Apr 2025 03:54:08 +0100
Subject: [PATCH 1216/1549] mk: remove mkhelp() and use x_() instead

x_ and mkhelp pretty much do the same thing

in fact, there is no functional difference

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 11 +++--------
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/mk b/mk
index 1cdd2fd6..75a91f63 100755
--- a/mk
+++ b/mk
@@ -213,7 +213,7 @@ build_targets()
 		printf "'make %s', '%s', '%s'\n" "$mode" "$project" "$target"
 		x_ handle_defconfig
 
-		mkhelp "$postmake"
+		x_ $postmake
 	done; :
 }
 
@@ -440,14 +440,14 @@ handle_makefile()
 
 run_make_command()
 {
-	mkhelp "$premake"
+	x_ $premake
 
 	$dry check_cmake "$srcdir" && [ -z "$mode" ] && \
 	    $dry check_autoconf "$srcdir"
 	$dry check_makefile "$srcdir" || return 1
 
 	$dry x_ make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs
-	mkhelp "$mkhelper"
+	x_ $mkhelper
 
 	[ "$mode" != "clean" ] || \
 	    $dry make -C "$srcdir" $cleanargs distclean || :; :
@@ -476,11 +476,6 @@ check_makefile()
 	    [ -f "$1/GNUmakefile" ] || return 1; :
 }
 
-mkhelp()
-{
-	[ -z "$1" ] || [ -n "$mode" ] || eval "$1" || $err "mkhelp: !$1"; :
-}
-
 copy_elf()
 {
 	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do

From 13ad839691d3f306f880e70f98e90af01de2fda0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 23 Apr 2025 04:04:03 +0100
Subject: [PATCH 1217/1549] lib.sh: simplify the python check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index d72f0378..6667b505 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -113,10 +113,8 @@ command -v $python 1>/dev/null || pyver=""
 	pyver="`$python -c 'import sys; print(sys.version_info[:])' | \
 	    awk '{print $1}'`" && \
 	pyver="${pyver#(}" && pyver="${pyver%,}"
-if [ "${pyver%%.*}" != "3" ]; then
-	printf "Wrong python version, or python missing. Must be v 3.x.\n" 1>&2
-	exit 1
-fi
+[ "${pyver%%.*}" = "3" ] || \
+	$err "Wrong python version, or python missing. Must be v 3.x."
 
 # XBMK_CACHE is a directory, for caching downloads and git repositories
 [ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$xbmkpwd/cache"

From 83022b6ba83d73a8539016b810e3926afc1eba7e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 23 Apr 2025 04:07:16 +0100
Subject: [PATCH 1218/1549] lib.sh: simplify cbfs()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 17 ++++-------------
 1 file changed, 4 insertions(+), 13 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 6667b505..86f03cc2 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -276,23 +276,14 @@ vendor_checksum()
 
 cbfs()
 {
-	fRom="$1" # image to operate on
-	fAdd="$2" # file to add
-	fName="$3" # filename when added in CBFS
-
 	ccmd="add-payload" && [ $# -gt 3 ] && [ $# -lt 5 ] && ccmd="add"
 	lzma="-c lzma" && [ $# -gt 3 ] && [ $# -lt 5 ] && lzma="-t $4"
 
-	# hack. TODO: do it better. this whole function is cursed
-	if [ $# -gt 4 ]; then
-		# add flat binary for U-Boot (u-boot.bin) on x86
-		if [ "$5" = "0x1110000" ]; then
-			ccmd="add-flat-binary"
-			lzma="-c lzma -l 0x1110000 -e 0x1110000"
-		fi
-	fi
+	[ $# -gt 4 ] && [ "$5" = "0x1110000" ] && \
+	    ccmd="add-flat-binary" && \
+	    lzma="-c lzma -l 0x1110000 -e 0x1110000"
 
-	x_ "$cbfstool" "$fRom" $ccmd -f "$fAdd" -n "$fName" $lzma
+	x_ "$cbfstool" "$1" $ccmd -f "$2" -n "$3" $lzma
 }
 
 mk()

From 0c5c5ffc873f7818930115a37b8b2a592a6e37a2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 23 Apr 2025 04:12:53 +0100
Subject: [PATCH 1219/1549] lib.sh: simplify mk()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 86f03cc2..739823a9 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -290,6 +290,6 @@ mk()
 {
 	mk_flag="$1" || $err "No argument given"
 	shift 1 && for mk_arg in "$@"; do
-		./mk $mk_flag $mk_arg || $err "./mk $mk_flag $mk_arg"; :
+		x_ ./mk $mk_flag $mk_arg
 	done; :
 }

From 9baabed7186c319d6dff6c295c96b26f3832ba1d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 23 Apr 2025 04:27:03 +0100
Subject: [PATCH 1220/1549] lib.sh: condense the python check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 739823a9..45eb2b3d 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -111,10 +111,8 @@ command -v $python 1>/dev/null || pyver=""
 	    2>/dev/null || $err "Cannot determine which Python version."
 [ -n "$pyver" ] && \
 	pyver="`$python -c 'import sys; print(sys.version_info[:])' | \
-	    awk '{print $1}'`" && \
-	pyver="${pyver#(}" && pyver="${pyver%,}"
-[ "${pyver%%.*}" = "3" ] || \
-	$err "Wrong python version, or python missing. Must be v 3.x."
+	    awk '{print $1}'`" && pyver="${pyver#(}" && pyver="${pyver%,}"
+[ "${pyver%%.*}" = "3" ] || $err "Wrong python version (must be v 3.x)"
 
 # XBMK_CACHE is a directory, for caching downloads and git repositories
 [ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$xbmkpwd/cache"

From 9543a325acbed4ad58294fe97556ef2acc9e961b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 23 Apr 2025 04:31:40 +0100
Subject: [PATCH 1221/1549] lib.sh: further simplify the python check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 45eb2b3d..eda338a0 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -98,13 +98,9 @@ for fv in version versiondate; do
 	eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
 done
 
-pyver="2"
 python="python3"
-if command -v python3 1>/dev/null; then
-	pyver="3"
-else
-	python="python"
-fi
+command -v python3 1>/dev/null || python="python"
+pyver="2" && [ "$python" = "python3" ] && pyver="3"
 command -v $python 1>/dev/null || pyver=""
 [ -z "$pyver" ] || \
 	$python -c 'import sys; print(sys.version_info[:])' 1>/dev/null \

From b1b964fa5c393cb4651861b14fb4e861ee7c6737 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 23 Apr 2025 04:35:18 +0100
Subject: [PATCH 1222/1549] lib.sh: further condense the python check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index eda338a0..cd3e14ae 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -102,9 +102,8 @@ python="python3"
 command -v python3 1>/dev/null || python="python"
 pyver="2" && [ "$python" = "python3" ] && pyver="3"
 command -v $python 1>/dev/null || pyver=""
-[ -z "$pyver" ] || \
-	$python -c 'import sys; print(sys.version_info[:])' 1>/dev/null \
-	    2>/dev/null || $err "Cannot determine which Python version."
+[ -z "$pyver" ] || $python -c 'import sys; print(sys.version_info[:])' \
+    1>/dev/null 2>/dev/null || $err "Cannot detect host Python version."
 [ -n "$pyver" ] && \
 	pyver="`$python -c 'import sys; print(sys.version_info[:])' | \
 	    awk '{print $1}'`" && pyver="${pyver#(}" && pyver="${pyver%,}"

From 8edea026c58f06fa7af0ec9b20450641acccbefe Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 24 Apr 2025 13:24:45 +0100
Subject: [PATCH 1223/1549] lib.sh: Force use of System Python to prevent hang

If the user has a virtual environment, the current logic
will cause lbmk to hang. A useful workaround is to force
use of the direct path to the system binary of python.

This works by detecting a virtual environment first, and
deferring to the old behaviour if no venv is found. If one
is found, then it will not rely on PATH, but instead only
search the standard locations /usr/local/bin and /usr/bin.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 42 ++++++++++++++++++++++++++++++++++--------
 1 file changed, 34 insertions(+), 8 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index cd3e14ae..3ae51b3f 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -98,15 +98,41 @@ for fv in version versiondate; do
 	eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
 done
 
+# Use direct path, to prevent a hang if Python is using a virtual environment,
+# not command -v, to prevent a hang when checking python's version
+# See: https://docs.python.org/3/library/venv.html#how-venvs-work
+pybin()
+{
+	py="import sys; quit(1) if sys.prefix == sys.base_prefix else quit(0)"
+
+	venv=1
+	command -v "$1" 1>/dev/null 2>/dev/null || venv=0
+	[ $venv -lt 1 ] || "$1" -c "$py" 1>/dev/null 2>/dev/null || venv=0
+
+	[ $venv -gt 0 ] && for pypath in "/usr/local/bin" "/usr/bin"; do
+		[ -e "$pypath/$1" ] && [ ! -d "$pypath/$1" ] && \
+		    [ -x "$pypath/$1" ] && printf "%s/%s\n" "$pypath" "$1" && \
+		    return 0
+	done
+	[ $venv -gt 0 ] && return 1
+
+	# Defer to normal command -v if not a venv
+	command -v "$1" 2>/dev/null || return 1
+}
+
 python="python3"
-command -v python3 1>/dev/null || python="python"
+pybin python3 1>/dev/null || python="python"
 pyver="2" && [ "$python" = "python3" ] && pyver="3"
-command -v $python 1>/dev/null || pyver=""
-[ -z "$pyver" ] || $python -c 'import sys; print(sys.version_info[:])' \
-    1>/dev/null 2>/dev/null || $err "Cannot detect host Python version."
-[ -n "$pyver" ] && \
-	pyver="`$python -c 'import sys; print(sys.version_info[:])' | \
-	    awk '{print $1}'`" && pyver="${pyver#(}" && pyver="${pyver%,}"
+pybin "$python" 1>/dev/null || pyver=""
+[ -z "$pyver" ] || "`pybin "$python"`" -c \
+    'import sys; print(sys.version_info[:])' 1>/dev/null 2>/dev/null || \
+    $err "Cannot detect host Python version."
+if [ -n "$pyver" ]; then
+	pyver="$("$(pybin "$python")" -c \
+	    'import sys; print(sys.version_info[:])' | awk '{print $1}')"
+	pyver="${pyver#(}"
+	pyver="${pyver%,}"
+fi
 [ "${pyver%%.*}" = "3" ] || $err "Wrong python version (must be v 3.x)"
 
 # XBMK_CACHE is a directory, for caching downloads and git repositories
@@ -133,7 +159,7 @@ if [ -z "${TMPDIR+x}" ]; then
 	# set up python v3.x in PATH, in case it's not set up correctly.
 	# see code above that detected the correct python3 command.
 	cd "$XBMK_CACHE/xbmkpath" || $err "can't cd $XBMK_CACHE/xbmkpath"
-	x_ ln -s "`command -v "$python"`" python
+	x_ ln -s "`pybin "$python"`" python
 	) || $err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"
 
 	xbmk_rval=0

From 0ab7c6ff9cf1eda98d005381fd99ce794be166c2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 06:38:38 +0100
Subject: [PATCH 1224/1549] lib.sh: use realpath to get sys python on venv

In the previous revision, I make hardcoded use of
/usr/local/bin and /usr/bin as search locations, instead
of relying on PATH, when the user has a python venv, because
in those cases, we cannot rely on PATH so we use a python
command to detect the venv and then force use of the
normal system path for python.

However, there's no guarantee that the real Python will
indeed live at these locations. For example, some distros
like Nix or Guix will use many locations for different
versions of a given package, and it's for the birds as to
what given package version the user might be running.

Therefore, this patch retains that current hardcoded
assumption of /usr/local/bin and /usr/bin but *only* as
a fallback solution, instead checking realpath first.

The "realpath" command isn't technically POSIX standard,
but in practise it is available on GNU coreutils, Busybox,
and the various BSD userlands.

I could perhaps *import* a realpath utility, and use that,
but this should be fine.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/include/lib.sh b/include/lib.sh
index 3ae51b3f..9450bb9b 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -109,6 +109,17 @@ pybin()
 	command -v "$1" 1>/dev/null 2>/dev/null || venv=0
 	[ $venv -lt 1 ] || "$1" -c "$py" 1>/dev/null 2>/dev/null || venv=0
 
+	# ideally, don't rely on PATH or hardcoded paths if python venv.
+	# use the *real*, direct executable linked to by the venv symlink
+	if [ $venv -gt 0 ] && [ -L "`command -v "$1" 2>/dev/null`" ]; then
+		# realpath isn't posix, but available mostly universally
+		pypath="$(realpath \
+		    "$(command -v "$1" 2>/dev/null)" 2>/dev/null || :)"
+		[ -e "$pypath" ] && [ ! -d "$pypath" ] && \
+		    [ -x "$pypath" ] && printf "%s\n" "$pypath" && return 0; :
+	fi
+
+	# if python venv: fall back to common PATH directories for checking
 	[ $venv -gt 0 ] && for pypath in "/usr/local/bin" "/usr/bin"; do
 		[ -e "$pypath/$1" ] && [ ! -d "$pypath/$1" ] && \
 		    [ -x "$pypath/$1" ] && printf "%s/%s\n" "$pypath" "$1" && \

From aba5b3a353222ac2dfee450181157c5750efe7fa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 10:56:47 +0100
Subject: [PATCH 1225/1549] mk: simplify main()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh    |  2 +-
 include/lib.sh    |  2 +-
 include/vendor.sh | 30 +++++++++++++++---------------
 mk                | 15 +++++----------
 4 files changed, 22 insertions(+), 27 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 4fa904ba..cac0ceac 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -90,7 +90,7 @@ fetch_submodule()
 	[ -z "$st" ] && return 0 # subrepo/subfile not defined
 	chkvars "sub${st}" "sub${st}_bkup" "subhash"
 
-	[ "$st" = "file" ] && download "$subfile" "$subfile_bkup" \
+	[ "$st" = "file" ] && xbmkget "$subfile" "$subfile_bkup" \
 	    "$tmpgit/$1" "$subhash" && return 0
 	rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
 	tmpclone "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subhash" \
diff --git a/include/lib.sh b/include/lib.sh
index 9450bb9b..f4e96c90 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -265,7 +265,7 @@ singletree()
 
 # can grab from the internet, or copy locally.
 # if copying locally, it can only copy a file.
-download()
+xbmkget()
 {
 	_dlop="curl" && [ $# -gt 4 ] && _dlop="$5"
 	cached="$XBMK_CACHE/file/$4"
diff --git a/include/vendor.sh b/include/vendor.sh
index c4e57069..4ee593ea 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -38,7 +38,7 @@ eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     TBFW_hash TBFW_size hashfile xromsize xchanged EC_url_bkup need_files \
     vfile cbcfg $cv`"
 
-vendor_download()
+download()
 {
 	[ $# -gt 0 ] || $err "No argument given"
 	export PATH="$PATH:/sbin"
@@ -118,7 +118,7 @@ fetch()
 	fi
 
 	dlop="curl" && [ $# -gt 5 ] && dlop="$6"
-	download "$dl" "$dl_bkup" "$_dl" "$dlsum" "$dlop"
+	xbmkget "$dl" "$dl_bkup" "$_dl" "$dlsum" "$dlop"
 
 	rm -Rf "${_dl}_extracted" || $err "!rm ${_ul}_extracted. $dontflash"
 	e "$_dest" f && return 0
@@ -318,7 +318,7 @@ fail_inject()
 	err_ "$1"
 }
 
-vendor_inject()
+inject()
 {
 	need_files="n"
 	err="fail_inject"
@@ -503,31 +503,31 @@ patch_rom()
 		return 1
 	fi
 
-	[ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && inject "fallback/refcode" \
+	[ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && insert "fallback/refcode" \
 	    "$CONFIG_REFCODE_BLOB_FILE" "stage"
-	[ "$CONFIG_HAVE_MRC" = "y" ] && inject "mrc.bin" "$CONFIG_MRC_FILE" \
+	[ "$CONFIG_HAVE_MRC" = "y" ] && insert "mrc.bin" "$CONFIG_MRC_FILE" \
 	    "mrc" "0xfffa0000"
-	[ "$CONFIG_HAVE_ME_BIN" = "y" ] && inject IFD "$CONFIG_ME_BIN_PATH" me
-	[ "$CONFIG_KBC1126_FIRMWARE" = "y" ] && inject ecfw1.bin \
-	    "$CONFIG_KBC1126_FW1" raw "$CONFIG_KBC1126_FW1_OFFSET" && inject \
+	[ "$CONFIG_HAVE_ME_BIN" = "y" ] && insert IFD "$CONFIG_ME_BIN_PATH" me
+	[ "$CONFIG_KBC1126_FIRMWARE" = "y" ] && insert ecfw1.bin \
+	    "$CONFIG_KBC1126_FW1" raw "$CONFIG_KBC1126_FW1_OFFSET" && insert \
 	    ecfw2.bin "$CONFIG_KBC1126_FW2" raw "$CONFIG_KBC1126_FW2_OFFSET"
 	[ -n "$CONFIG_VGA_BIOS_FILE" ] && [ -n "$CONFIG_VGA_BIOS_ID" ] && \
-	  inject "pci$CONFIG_VGA_BIOS_ID.rom" "$CONFIG_VGA_BIOS_FILE" optionrom
+	  insert "pci$CONFIG_VGA_BIOS_ID.rom" "$CONFIG_VGA_BIOS_FILE" optionrom
 	[ "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" = "y" ] && \
 	    [ -n "$CONFIG_SMSC_SCH5545_EC_FW_FILE" ] && \
-		inject sch5545_ecfw.bin "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
+		insert sch5545_ecfw.bin "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
 	[ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \
 	   [ -n "$CONFIG_FSP_M_FILE" ] && \
-		inject "$CONFIG_FSP_M_CBFS" "$CONFIG_FSP_M_FILE" fsp --xip
+		insert "$CONFIG_FSP_M_CBFS" "$CONFIG_FSP_M_FILE" fsp --xip
 	[ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \
 	   [ -n "$CONFIG_FSP_S_FILE" ] && \
-		inject "$CONFIG_FSP_S_CBFS" "$CONFIG_FSP_S_FILE" fsp
+		insert "$CONFIG_FSP_S_CBFS" "$CONFIG_FSP_S_FILE" fsp
 
 	printf "ROM image successfully patched: %s\n" "$rom"
 	xchanged="y"
 }
 
-inject()
+insert()
 {
 	[ "$2" = "/dev/null" ] && return 0
 
@@ -541,7 +541,7 @@ inject()
 		[ $# -gt 3 ] && _offset="$4"
 	else
 		[ $# -gt 3 ] && _offset="-b $4" && [ -z "$4" ] && \
-		    $err "inject $*, $rom: offset given but empty (undefined)"
+		    $err "insert $*, $rom: offset given but empty (undefined)"
 	fi
 
 	[ "$nukemode" = "nuke" ] || x_ e "$_dest" f
@@ -549,7 +549,7 @@ inject()
 	if [ "$cbfsname" = "IFD" ]; then
 		[ "$nukemode" = "nuke" ] || "$ifdtool" $ifdprefix -i \
 		    $_t:$_dest "$rom" -O "$rom" || \
-		    $err "failed: inject '$_t' '$_dest' on '$rom'"
+		    $err "failed: insert '$_t' '$_dest' on '$rom'"
 		[ "$nukemode" != "nuke" ] || "$ifdtool" $ifdprefix --nuke $_t \
 		    "$rom" -O "$rom" || $err "$rom: !nuke IFD/$_t"
 	elif [ "$nukemode" = "nuke" ]; then
diff --git a/mk b/mk
index 75a91f63..3a66e1a2 100755
--- a/mk
+++ b/mk
@@ -20,25 +20,20 @@ eval "`setvars "" vdir src_dirname srcdir mode xp ser`"
 
 main()
 {
-	[ $# -lt 1 ] && $err "bad command"
-	rval=0
+	cmd="" && [ $# -gt 0 ] && cmd="$1" && shift 1
 
 	for g in "command -v git" "git config --global user.name" \
 	    "git config --global user.email" "git_init"; do
 		eval "$g 1>/dev/null 2>/dev/null || $err \"Unconfigured: $g\""
 	done
 
-	case "$1" in
+	case "$cmd" in
 	version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
-	release|download|inject)
-		cmd="vendor_$1" && [ "$1" = "release" ] && cmd="mkrelease"
-		shift 1
-		$cmd "$@" ;;
-	-*) rval=1 ;;
+	release|download|inject) $cmd "$@" ;;
+	-*) return 1 ;;
 	*) $err "bad command" ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
-	return $rval
 }
 
 git_init()
@@ -54,7 +49,7 @@ git_init()
 	git tag -a "$version" -m "$projectname $version" || return 1
 }
 
-mkrelease()
+release()
 {
 	export XBMK_RELEASE="y"
 

From 4624c6e536c594dde8961474659266f0ed5ff589 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 11:44:33 +0100
Subject: [PATCH 1226/1549] mk: remove unused variables (ser/xp)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mk b/mk
index 3a66e1a2..d678859d 100755
--- a/mk
+++ b/mk
@@ -16,7 +16,7 @@ fi
 . "include/vendor.sh"
 . "include/mrc.sh"
 
-eval "`setvars "" vdir src_dirname srcdir mode xp ser`"
+eval "`setvars "" vdir src_dirname srcdir mode`"
 
 main()
 {

From 9b8179c0e5d15bf6fb7729cd069d176ba9a8dabe Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 11:55:51 +0100
Subject: [PATCH 1227/1549] git.sh: remove unused xgcc linking feature

the "xtree" variable is used by projects such as u-boot,
to export a CROSS_COMPILE variable specifying prefix for
gnu compilers, and for building the named coreboot tree.
for example, xtree can be "default", which is then the
coreboot tree downloaded, for use of crossgcc.

however, it is also used to symlink identical versions
of crossgcc between coreboot trees. this latter feature
was only needed for fam15h boards which were previously
split between two mostly identical coreboot trees, that
were later merged into a single tree, and this feature
is therefore no longer used.

remove this dead code, to reduce bloat in the build system.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index cac0ceac..9712ed37 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -61,12 +61,6 @@ git_prep()
 		done < "$mdir/module.list"; :
 	fi
 
-	if [ "$project" = "coreboot" ] && [ -n "$xtree" ] && [ $# -gt 2 ] && \
-	    [ "$xtree" != "$tree" ]; then (
-		x_ cd "$tmpgit/util" && x_ rm -Rf crossgcc
-		x_ ln -s "../../$xtree/util/crossgcc" crossgcc
-	) || $err "$_loc: !xgcc link"; fi
-
 	[ "$_loc" != "$XBMK_CACHE/repo/$project" ] && \
 	    [ "$XBMK_RELEASE" = "y" ] && rmgit "$tmpgit"
 

From 15b64cfebe87a4b3c02628ebce049983f6fec2e5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 12:02:55 +0100
Subject: [PATCH 1228/1549] mk/git.sh: remove tree_depend variable

this was used alongside the xgcc linking, so that coreboot
trees could specify that another tree was to be downloaded.

since this variable will no longer be used, it should be
removed, to avoid dead code bloat.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 +---
 mk             | 8 ++++----
 2 files changed, 5 insertions(+), 7 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 9712ed37..272a1af3 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -9,8 +9,6 @@ tmpgit="$xbmkpwd/tmp/gitclone"
 
 fetch_targets()
 {
-	[ -n "$tree_depend" ] && [ "$tree_depend" != "$tree" ] && \
-		x_ ./mk -f "$project" "$tree_depend"
 	e "src/$project/$tree" d && return 0
 
 	printf "Creating %s tree %s\n" "$project" "$tree"
@@ -21,7 +19,7 @@ fetch_targets()
 
 fetch_project()
 {
-	eval "`setvars "" xtree tree_depend`"
+	eval "`setvars "" xtree`"
 	eval "`setcfg "config/git/$project/pkg.cfg"`"
 
 	chkvars url
diff --git a/mk b/mk
index d678859d..c6dbb9ae 100755
--- a/mk
+++ b/mk
@@ -116,9 +116,9 @@ main "$@" && exit 0
 
 eval "`setvars "" xarch srcdir premake gnatdir xlang mode makeargs elfdir cmd \
     project target target_dir targets xtree _f release bootstrapargs mkhelper \
-    autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
+    autoconfargs listfile autogenargs btype rev build_depend gccdir cmakedir \
     defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs gccver gccfull \
-    gnatver gnatfull gccdir cmakedir do_make badhash`"
+    gnatver gnatfull do_make badhash tree`"
 
 trees()
 {
@@ -241,8 +241,8 @@ handle_defconfig()
 configure_project()
 {
 	eval "`setvars "" cleanargs build_depend autoconfargs xtree postmake \
-	    tree_depend makeargs btype mkhelper bootstrapargs premake release \
-	    xarch xlang badhash`"
+	    makeargs btype mkhelper bootstrapargs premake release xlang xarch \
+	    badhash`"
 	_tcfg="$1/target.cfg"
 	[ -f "$_tcfg" ] || btype="auto"
 	e "$datadir/mkhelper.cfg" f && eval "`setcfg "$datadir/mkhelper.cfg"`"

From ce4381169fa8b49e1dcc729c15b2a0a46d9a0906 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 18:35:41 +0100
Subject: [PATCH 1229/1549] lib.sh: introduce more top-down function order

a lot of init code was handled outside of any function. the
coding style used in the rest of the build system has now
been introduced, with xbmk_init being the main function.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 304 +++++++++++++++++++++++++++----------------------
 1 file changed, 167 insertions(+), 137 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index f4e96c90..ef32ae6c 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -22,15 +22,6 @@ rmodtool="elf/cbfstool/default/rmodtool"
 grubdata="config/data/grub"
 err="err_"
 
-err_()
-{
-	printf "ERROR %s: %s\n" "$0" "$1" 1>&2
-	exit 1
-}
-x_() {
-	[ $# -lt 1 ] || "$@" || $err "Unhandled error for: $(echo "$@")"; :
-}
-
 setvars()
 {
 	_setvars="" && [ $# -lt 2 ] && $err "setvars: too few arguments"
@@ -39,6 +30,166 @@ setvars()
 	done
 	printf "%s\n" "${_setvars% }"
 }
+
+err_()
+{
+	printf "ERROR %s: %s\n" "$0" "$1" 1>&2
+	exit 1
+}
+
+eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
+    datadir version xbmkpwd relname xbmkpwd xbmktmp python pyver`"
+
+xbmk_init()
+{
+	xbmkpwd="`pwd`" || $err "Cannot generate PWD"
+	export PWD="$xbmkpwd"
+
+	if [ $# -gt 0 ] && [ "$1" = "dependencies" ]; then
+		install_packages "$@" || exit 1
+		exit 0
+	fi
+
+	id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
+	[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
+
+	for fv in version versiondate; do
+		eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
+	done
+
+	for xbmk_cmd in x_python x_cache x_vars x_setver x_run_child; do
+		$xbmk_cmd "$@"
+	done
+}
+
+x_python()
+{
+	pyv="import sys; print(sys.version_info[:])"
+	python="python3"
+	pybin python3 1>/dev/null || python="python"
+	pyver="2" && [ "$python" = "python3" ] && pyver="3"
+	pybin "$python" 1>/dev/null || pyver=""
+	[ -z "$pyver" ] || "`pybin "$python"`" -c "$pyv" 1>/dev/null \
+	    2>/dev/null || $err "Cannot detect host Python version."
+	if [ -n "$pyver" ]; then
+		pyver="$("$(pybin "$python")" -c "$pyv" | awk '{print $1}')"
+		pyver="${pyver#(}"
+		pyver="${pyver%,}"
+	fi
+	[ "${pyver%%.*}" = "3" ] || $err "Bad python version (must by 3.x)"; :
+}
+
+# Use direct path, to prevent a hang if Python is using a virtual environment,
+# not command -v, to prevent a hang when checking python's version
+# See: https://docs.python.org/3/library/venv.html#how-venvs-work
+pybin()
+{
+	py="import sys; quit(1) if sys.prefix == sys.base_prefix else quit(0)"
+
+	venv=1
+	command -v "$1" 1>/dev/null 2>/dev/null || venv=0
+	[ $venv -lt 1 ] || "$1" -c "$py" 1>/dev/null 2>/dev/null || venv=0
+
+	# ideally, don't rely on PATH or hardcoded paths if python venv.
+	# use the *real*, direct executable linked to by the venv symlink
+	if [ $venv -gt 0 ] && [ -L "`command -v "$1" 2>/dev/null`" ]; then
+		# realpath isn't posix, but available mostly universally
+		pypath="$(realpath \
+		    "$(command -v "$1" 2>/dev/null)" 2>/dev/null || :)"
+		[ -e "$pypath" ] && [ ! -d "$pypath" ] && \
+		    [ -x "$pypath" ] && printf "%s\n" "$pypath" && return 0; :
+	fi
+
+	# if python venv: fall back to common PATH directories for checking
+	[ $venv -gt 0 ] && for pypath in "/usr/local/bin" "/usr/bin"; do
+		[ -e "$pypath/$1" ] && [ ! -d "$pypath/$1" ] && \
+		    [ -x "$pypath/$1" ] && printf "%s/%s\n" "$pypath" "$1" && \
+		    return 0
+	done
+	[ $venv -gt 0 ] && return 1
+
+	# Defer to normal command -v if not a venv
+	command -v "$1" 2>/dev/null || return 1
+}
+
+x_cache()
+{
+	# XBMK_CACHE is a directory, for caching downloads and git repon
+	[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$xbmkpwd/cache"
+	[ -z "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
+	[ -L "$XBMK_CACHE" ] && [ "$XBMK_CACHE" = "$xbmkpwd/cache" ] && \
+	    $err "cachedir '$xbmkpwd/cache' is a symlink"
+	[ -L "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
+	[ -f "$XBMK_CACHE" ] && $err "cachedir '$XBMK_CACHE' is a file"; :
+}
+
+x_vars()
+{
+	# if "y": a coreboot target won't be built if target.cfg says release="n"
+	# (this is used to exclude certain build targets from releases)
+	[ -z "${XBMK_RELEASE+x}" ] && export XBMK_RELEASE="n"
+	[ "$XBMK_RELEASE" = "y" ] || export XBMK_RELEASE="n"
+
+	[ -z "${XBMK_THREADS+x}" ] && export XBMK_THREADS=1
+	expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
+	    1>/dev/null 2>/dev/null || export XBMK_THREADS=1
+
+	[ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > .version \
+	    || $err "Cannot generate unknown .version file"
+	[ -e ".git" ] || [ -f ".versiondate" ] || printf "1716415872\n" > \
+	    .versiondate || $err "Cannot generate unknown .versiondate file"
+}
+
+x_setver()
+{
+	version_="$version"
+	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
+	    version="git-$(git rev-parse HEAD 2>&1)" || version="$version_"
+	versiondate_="$versiondate"
+	[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
+	    --pretty='%ct' HEAD)" || versiondate="$versiondate_"
+
+	chkvars version versiondate
+	printf "%s\n" "$version" > .version || $err "can't save version"
+	printf "%s\n" "$versiondate" > .versiondate || $err "can't save date"
+
+	relname="$projectname-$version"
+	export LOCALVERSION="-$projectname-${version%%-*}"
+}
+
+# if this instance is the main parent, re-run as a child process and exit.
+x_run_child()
+{
+	# unify all temporary files/directories in a single TMPDIR
+	[ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || \
+	    unset TMPDIR
+	[ -n "${TMPDIR+x}" ] && export TMPDIR="$TMPDIR" && xbmktmp="$TMPDIR"
+	[ -z "${TMPDIR+x}" ] || return 0 # this is a child instance, so return
+
+	# parent instance of xbmk, so don't return. set up TMPDIR
+	# and re-run as a child instance:
+	[ -f "lock" ] && $err "$xbmkpwd/lock exists. Is a build running?"
+	export TMPDIR="/tmp"
+	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
+	xbmktmp="$TMPDIR"
+	touch lock || $err "cannot create 'lock' file"
+	x_ rm -Rf "$XBMK_CACHE/xbmkpath" "$XBMK_CACHE/gnupath"
+	x_ mkdir -p "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
+	export PATH="$XBMK_CACHE/xbmkpath:$XBMK_CACHE/gnupath:$PATH"
+	(
+	# set up python v3.x in PATH, in case it's not set up correctly.
+	# see code above that detected the correct python3 command.
+	cd "$XBMK_CACHE/xbmkpath" || $err "can't cd $XBMK_CACHE/xbmkpath"
+	x_ ln -s "`pybin "$python"`" python
+	) || $err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"
+
+	xbmk_rval=0
+	./mk "$@" || xbmk_rval=1
+	rm -Rf "$xbmktmp" || xbmk_rval=1
+	rm -f lock || xbmk_rval=1
+	exit $xbmk_rval
+}
+
 chkvars()
 {
 	for var in "$@"; do
@@ -80,134 +231,6 @@ install_packages()
 	    printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; :
 }
 
-eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
-    datadir version relname xbmktmp`"
-
-if [ $# -gt 0 ] && [ "$1" = "dependencies" ]; then
-	install_packages "$@" || exit 1
-	exit 0
-fi
-
-id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
-[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
-
-xbmkpwd="`pwd`" || $err "Cannot generate PWD"
-export PWD="$xbmkpwd"
-
-for fv in version versiondate; do
-	eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
-done
-
-# Use direct path, to prevent a hang if Python is using a virtual environment,
-# not command -v, to prevent a hang when checking python's version
-# See: https://docs.python.org/3/library/venv.html#how-venvs-work
-pybin()
-{
-	py="import sys; quit(1) if sys.prefix == sys.base_prefix else quit(0)"
-
-	venv=1
-	command -v "$1" 1>/dev/null 2>/dev/null || venv=0
-	[ $venv -lt 1 ] || "$1" -c "$py" 1>/dev/null 2>/dev/null || venv=0
-
-	# ideally, don't rely on PATH or hardcoded paths if python venv.
-	# use the *real*, direct executable linked to by the venv symlink
-	if [ $venv -gt 0 ] && [ -L "`command -v "$1" 2>/dev/null`" ]; then
-		# realpath isn't posix, but available mostly universally
-		pypath="$(realpath \
-		    "$(command -v "$1" 2>/dev/null)" 2>/dev/null || :)"
-		[ -e "$pypath" ] && [ ! -d "$pypath" ] && \
-		    [ -x "$pypath" ] && printf "%s\n" "$pypath" && return 0; :
-	fi
-
-	# if python venv: fall back to common PATH directories for checking
-	[ $venv -gt 0 ] && for pypath in "/usr/local/bin" "/usr/bin"; do
-		[ -e "$pypath/$1" ] && [ ! -d "$pypath/$1" ] && \
-		    [ -x "$pypath/$1" ] && printf "%s/%s\n" "$pypath" "$1" && \
-		    return 0
-	done
-	[ $venv -gt 0 ] && return 1
-
-	# Defer to normal command -v if not a venv
-	command -v "$1" 2>/dev/null || return 1
-}
-
-python="python3"
-pybin python3 1>/dev/null || python="python"
-pyver="2" && [ "$python" = "python3" ] && pyver="3"
-pybin "$python" 1>/dev/null || pyver=""
-[ -z "$pyver" ] || "`pybin "$python"`" -c \
-    'import sys; print(sys.version_info[:])' 1>/dev/null 2>/dev/null || \
-    $err "Cannot detect host Python version."
-if [ -n "$pyver" ]; then
-	pyver="$("$(pybin "$python")" -c \
-	    'import sys; print(sys.version_info[:])' | awk '{print $1}')"
-	pyver="${pyver#(}"
-	pyver="${pyver%,}"
-fi
-[ "${pyver%%.*}" = "3" ] || $err "Wrong python version (must be v 3.x)"
-
-# XBMK_CACHE is a directory, for caching downloads and git repositories
-[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$xbmkpwd/cache"
-[ -z "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
-[ -L "$XBMK_CACHE" ] && [ "$XBMK_CACHE" = "$xbmkpwd/cache" ] && \
-    $err "cachedir is default, $xbmkpwd/cache, but it exists and is a symlink"
-[ -L "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
-[ -f "$XBMK_CACHE" ] && $err "cachedir '$XBMK_CACHE' exists but it's a file"
-
-# unify all temporary files/directories in a single TMPDIR
-[ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || unset TMPDIR
-[ -n "${TMPDIR+x}" ] && export TMPDIR="$TMPDIR"
-if [ -z "${TMPDIR+x}" ]; then
-	[ -f "lock" ] && $err "$xbmkpwd/lock exists. Is a build running?"
-	export TMPDIR="/tmp"
-	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
-	xbmktmp="$TMPDIR"
-	touch lock || $err "cannot create 'lock' file"
-	x_ rm -Rf "$XBMK_CACHE/xbmkpath" "$XBMK_CACHE/gnupath"
-	x_ mkdir -p "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
-	export PATH="$XBMK_CACHE/xbmkpath:$XBMK_CACHE/gnupath:$PATH"
-	(
-	# set up python v3.x in PATH, in case it's not set up correctly.
-	# see code above that detected the correct python3 command.
-	cd "$XBMK_CACHE/xbmkpath" || $err "can't cd $XBMK_CACHE/xbmkpath"
-	x_ ln -s "`pybin "$python"`" python
-	) || $err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"
-
-	xbmk_rval=0
-	./mk "$@" || xbmk_rval=1
-	rm -Rf "$xbmktmp" || xbmk_rval=1
-	rm -f lock || xbmk_rval=1
-	exit $xbmk_rval
-fi
-xbmktmp="$TMPDIR"
-
-# if "y": a coreboot target won't be built if target.cfg says release="n"
-# (this is used to exclude certain build targets from releases)
-[ -z "${XBMK_RELEASE+x}" ] && export XBMK_RELEASE="n"
-[ "$XBMK_RELEASE" = "y" ] || export XBMK_RELEASE="n"
-
-[ -z "${XBMK_THREADS+x}" ] && export XBMK_THREADS=1
-expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
-    1>/dev/null 2>/dev/null || export XBMK_THREADS=1 # user gave a non-integer
-
-[ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > .version || \
-    $err "Cannot generate unknown .version file"
-[ -e ".git" ] || [ -f ".versiondate" ] || printf "1716415872\n" > \
-    .versiondate || $err "Cannot generate unknown .versiondate file"
-
-version_="$version"
-[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
-    version="git-$(git rev-parse HEAD 2>&1)" || version="$version_"
-versiondate_="$versiondate"
-[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
-    --pretty='%ct' HEAD)" || versiondate="$versiondate_"
-for p in version versiondate; do
-	chkvars "$p"
-	eval "printf \"%s\\n\" \"\$$p\" > .$p || $err \"can't save $p\""
-done
-relname="$projectname-$version"
-export LOCALVERSION="-$projectname-${version%%-*}"
-
 check_defconfig()
 {
 	[ -d "$1" ] || $err "Target '$1' not defined."
@@ -323,3 +346,10 @@ mk()
 		x_ ./mk $mk_flag $mk_arg
 	done; :
 }
+
+x_()
+{
+	[ $# -lt 1 ] || "$@" || $err "Unhandled error for: $(echo "$@")"; :
+}
+
+xbmk_init "$@"

From 8ecb62c6628b459e299cba0cda65430018a07b36 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 18:39:46 +0100
Subject: [PATCH 1230/1549] rename include/lib.sh to init.sh

this is in prep for the next change, where non-init
functions will be moved to another file, again named
include/lib.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/{lib.sh => init.sh} | 131 ++++++++++++++++++------------------
 mk                          |   2 +-
 2 files changed, 65 insertions(+), 68 deletions(-)
 rename include/{lib.sh => init.sh} (98%)

diff --git a/include/lib.sh b/include/init.sh
similarity index 98%
rename from include/lib.sh
rename to include/init.sh
index ef32ae6c..55708b0f 100644
--- a/include/lib.sh
+++ b/include/init.sh
@@ -57,12 +57,42 @@ xbmk_init()
 		eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
 	done
 
-	for xbmk_cmd in x_python x_cache x_vars x_setver x_run_child; do
+	for xbmk_cmd in setpyver init_vars init_ver xbmk_child_init; do
 		$xbmk_cmd "$@"
 	done
 }
 
-x_python()
+install_packages()
+{
+	[ $# -lt 2 ] && $err "fewer than two arguments"
+	[ $# -gt 2 ] && reinstall="$3"
+
+	eval "`setcfg "config/dependencies/$2"`"
+
+	chkvars pkg_add pkglist
+	$pkg_add $pkglist || $err "Cannot install packages"
+
+	[ -n "$aur_notice" ] && \
+	    printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; :
+}
+
+setcfg()
+{
+	[ $# -gt 1 ] && printf "e \"%s\" f missing && return %s;\n" "$1" "$2"
+	[ $# -gt 1 ] || \
+		printf "e \"%s\" f not && %s \"Missing config\";\n" "$1" "$err"
+	printf ". \"%s\" || %s \"Could not read config\";\n" "$1" "$err"
+}
+
+chkvars()
+{
+	for var in "$@"; do
+		eval "[ -n \"\${$var+x}\" ] || \$err \"$var unset\""
+		eval "[ -n \"\$$var\" ] || \$err \"$var unset\""
+	done; :
+}
+
+setpyver()
 {
 	pyv="import sys; print(sys.version_info[:])"
 	python="python3"
@@ -112,7 +142,7 @@ pybin()
 	command -v "$1" 2>/dev/null || return 1
 }
 
-x_cache()
+init_vars()
 {
 	# XBMK_CACHE is a directory, for caching downloads and git repon
 	[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$xbmkpwd/cache"
@@ -121,10 +151,7 @@ x_cache()
 	    $err "cachedir '$xbmkpwd/cache' is a symlink"
 	[ -L "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
 	[ -f "$XBMK_CACHE" ] && $err "cachedir '$XBMK_CACHE' is a file"; :
-}
 
-x_vars()
-{
 	# if "y": a coreboot target won't be built if target.cfg says release="n"
 	# (this is used to exclude certain build targets from releases)
 	[ -z "${XBMK_RELEASE+x}" ] && export XBMK_RELEASE="n"
@@ -140,7 +167,7 @@ x_vars()
 	    .versiondate || $err "Cannot generate unknown .versiondate file"
 }
 
-x_setver()
+init_ver()
 {
 	version_="$version"
 	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
@@ -158,7 +185,7 @@ x_setver()
 }
 
 # if this instance is the main parent, re-run as a child process and exit.
-x_run_child()
+xbmk_child_init()
 {
 	# unify all temporary files/directories in a single TMPDIR
 	[ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || \
@@ -190,53 +217,9 @@ x_run_child()
 	exit $xbmk_rval
 }
 
-chkvars()
+x_()
 {
-	for var in "$@"; do
-		eval "[ -n \"\${$var+x}\" ] || \$err \"$var unset\""
-		eval "[ -n \"\$$var\" ] || \$err \"$var unset\""
-	done; :
-}
-
-setcfg()
-{
-	[ $# -gt 1 ] && printf "e \"%s\" f missing && return %s;\n" "$1" "$2"
-	[ $# -gt 1 ] || \
-		printf "e \"%s\" f not && %s \"Missing config\";\n" "$1" "$err"
-	printf ". \"%s\" || %s \"Could not read config\";\n" "$1" "$err"
-}
-
-e()
-{
-	es_t="e" && [ $# -gt 1 ] && es_t="$2"
-	es2="already exists"
-	estr="[ -$es_t \"\$1\" ] || return 1"
-	[ $# -gt 2 ] && estr="[ -$es_t \"\$1\" ] && return 1" && es2="missing"
-
-	eval "$estr"
-	printf "%s %s\n" "$1" "$es2" 1>&2
-}
-
-install_packages()
-{
-	[ $# -lt 2 ] && $err "fewer than two arguments"
-	[ $# -gt 2 ] && reinstall="$3"
-
-	eval "`setcfg "config/dependencies/$2"`"
-
-	chkvars pkg_add pkglist
-	$pkg_add $pkglist || $err "Cannot install packages"
-
-	[ -n "$aur_notice" ] && \
-	    printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; :
-}
-
-check_defconfig()
-{
-	[ -d "$1" ] || $err "Target '$1' not defined."
-	for x in "$1"/config/*; do
-		[ -f "$x" ] && printf "%s\n" "$x" && return 1
-	done; :
+	[ $# -lt 1 ] || "$@" || $err "Unhandled error for: $(echo "$@")"; :
 }
 
 remkdir()
@@ -327,6 +310,33 @@ vendor_checksum()
 	printf "Bad checksum for file: %s\n" "$2" 1>&2; rm -f "$2" || :; :
 }
 
+e()
+{
+	es_t="e" && [ $# -gt 1 ] && es_t="$2"
+	es2="already exists"
+	estr="[ -$es_t \"\$1\" ] || return 1"
+	[ $# -gt 2 ] && estr="[ -$es_t \"\$1\" ] && return 1" && es2="missing"
+
+	eval "$estr"
+	printf "%s %s\n" "$1" "$es2" 1>&2
+}
+
+mk()
+{
+	mk_flag="$1" || $err "No argument given"
+	shift 1 && for mk_arg in "$@"; do
+		x_ ./mk $mk_flag $mk_arg
+	done; :
+}
+
+check_defconfig()
+{
+	[ -d "$1" ] || $err "Target '$1' not defined."
+	for x in "$1"/config/*; do
+		[ -f "$x" ] && printf "%s\n" "$x" && return 1
+	done; :
+}
+
 cbfs()
 {
 	ccmd="add-payload" && [ $# -gt 3 ] && [ $# -lt 5 ] && ccmd="add"
@@ -339,17 +349,4 @@ cbfs()
 	x_ "$cbfstool" "$1" $ccmd -f "$2" -n "$3" $lzma
 }
 
-mk()
-{
-	mk_flag="$1" || $err "No argument given"
-	shift 1 && for mk_arg in "$@"; do
-		x_ ./mk $mk_flag $mk_arg
-	done; :
-}
-
-x_()
-{
-	[ $# -lt 1 ] || "$@" || $err "Unhandled error for: $(echo "$@")"; :
-}
-
 xbmk_init "$@"
diff --git a/mk b/mk
index c6dbb9ae..c83c75fd 100755
--- a/mk
+++ b/mk
@@ -12,7 +12,7 @@ if [ "./${0##*/}" != "${0}" ] || [ ! -f "mk" ] || [ -L "mk" ]; then
 	exit 1
 fi
 
-. "include/lib.sh"
+. "include/init.sh"
 . "include/vendor.sh"
 . "include/mrc.sh"
 

From b57952e90d2ec3515a1287bfa1129dbcbcef08c0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 19:05:57 +0100
Subject: [PATCH 1231/1549] re-split include/init.sh to lib.sh

move non-init functions to lib.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 127 ----------------------------------------------
 include/lib.sh  | 132 ++++++++++++++++++++++++++++++++++++++++++++++++
 mk              |   1 +
 3 files changed, 133 insertions(+), 127 deletions(-)
 create mode 100644 include/lib.sh

diff --git a/include/init.sh b/include/init.sh
index 55708b0f..b8c3cb35 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -222,131 +222,4 @@ x_()
 	[ $# -lt 1 ] || "$@" || $err "Unhandled error for: $(echo "$@")"; :
 }
 
-remkdir()
-{
-	rm -Rf "$1" || $err "remkdir: !rm -Rf \"$1\""
-	mkdir -p "$1" || $err "remkdir: !mkdir -p \"$1\""
-}
-
-mkrom_tarball()
-{
-	printf "%s\n" "$version" > "$1/.version" || $err "$1 !version"
-	printf "%s\n" "$versiondate" > "$1/.versiondate" || $err "$1 !vdate"
-
-	mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz"
-	x_ rm -Rf "$1"
-}
-
-mktarball()
-{
-	[ "${2%/*}" = "$2" ] || x_ mkdir -p "${2%/*}"
-	x_ tar -c "$1" | xz -T$XBMK_THREADS -9e > "$2" || $err "mktarball2, $1"
-}
-
-mksha512sum()
-{
-	(
-	[ "${1%/*}" != "$1" ] && x_ cd "${1%/*}"
-	sha512sum ./"${1##*/}" >> "$2" || $err "!sha512sum \"$1\" > \"$2\""
-	) || $err "failed to create tarball checksum"
-}
-
-rmgit()
-{
-	(
-	cd "$1" || $err "!cd gitrepo $1"
-	find . -name ".git" -exec rm -Rf {} + || $err "!rm .git $1"
-	find . -name ".gitmodules" -exec rm -Rf {} + || $err "!rm .gitmod $1"
-	) || $err "Cannot remove .git/.gitmodules in $1"
-}
-
-# return 0 if project is single-tree, otherwise 1
-# e.g. coreboot is multi-tree, so 1
-singletree()
-{
-	for targetfile in "config/${1}/"*/target.cfg; do
-		[ -e "$targetfile" ] && [ -f "$targetfile" ] && return 1; :
-	done; :
-}
-
-# can grab from the internet, or copy locally.
-# if copying locally, it can only copy a file.
-xbmkget()
-{
-	_dlop="curl" && [ $# -gt 4 ] && _dlop="$5"
-	cached="$XBMK_CACHE/file/$4"
-	dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum
-	vendor_checksum "$4" "$cached" 2>/dev/null && dl_fail="y"
-	[ "$dl_fail" = "n" ] && e "$3" f && return 0
-	x_ mkdir -p "${3%/*}" "$XBMK_CACHE/file"
-	for url in "$1" "$2"; do
-		[ "$dl_fail" = "n" ] && break
-		[ -z "$url" ] && continue
-		rm -f "$cached" || $err "!rm -f '$cached'"
-		if [ "$_dlop" = "curl" ]; then
-			curl --location --retry 3 -A "$_ua" "$url" \
-			    -o "$cached" || wget --tries 3 -U "$_ua" "$url" \
-			    -O "$cached" || continue
-		elif [ "$_dlop" = "copy" ]; then
-			[ -L "$url" ] && \
-				printf "dl %s %s %s %s: '%s' is a symlink\n" \
-				    "$1" "$2" "$3" "$4" "$url" 1>&2 && continue
-			[ ! -f "$url" ] && \
-				printf "dl %s %s %s %s: '%s' not a file\n" \
-				    "$1" "$2" "$3" "$4" "$url" 1>&2 && continue
-			cp "$url" "$cached" || continue
-		else
-			$err "$1 $2 $3 $4: Unsupported dlop type: '$_dlop'"
-		fi
-		vendor_checksum "$4" "$cached" || dl_fail="n"
-	done
-	[ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: not downloaded"
-	[ "$cached" = "$3" ] || x_ cp "$cached" "$3"; :
-}
-
-vendor_checksum()
-{
-	[ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] || return 1
-	printf "Bad checksum for file: %s\n" "$2" 1>&2; rm -f "$2" || :; :
-}
-
-e()
-{
-	es_t="e" && [ $# -gt 1 ] && es_t="$2"
-	es2="already exists"
-	estr="[ -$es_t \"\$1\" ] || return 1"
-	[ $# -gt 2 ] && estr="[ -$es_t \"\$1\" ] && return 1" && es2="missing"
-
-	eval "$estr"
-	printf "%s %s\n" "$1" "$es2" 1>&2
-}
-
-mk()
-{
-	mk_flag="$1" || $err "No argument given"
-	shift 1 && for mk_arg in "$@"; do
-		x_ ./mk $mk_flag $mk_arg
-	done; :
-}
-
-check_defconfig()
-{
-	[ -d "$1" ] || $err "Target '$1' not defined."
-	for x in "$1"/config/*; do
-		[ -f "$x" ] && printf "%s\n" "$x" && return 1
-	done; :
-}
-
-cbfs()
-{
-	ccmd="add-payload" && [ $# -gt 3 ] && [ $# -lt 5 ] && ccmd="add"
-	lzma="-c lzma" && [ $# -gt 3 ] && [ $# -lt 5 ] && lzma="-t $4"
-
-	[ $# -gt 4 ] && [ "$5" = "0x1110000" ] && \
-	    ccmd="add-flat-binary" && \
-	    lzma="-c lzma -l 0x1110000 -e 0x1110000"
-
-	x_ "$cbfstool" "$1" $ccmd -f "$2" -n "$3" $lzma
-}
-
 xbmk_init "$@"
diff --git a/include/lib.sh b/include/lib.sh
new file mode 100644
index 00000000..34d8b8b9
--- /dev/null
+++ b/include/lib.sh
@@ -0,0 +1,132 @@
+# SPDX-License-Identifier: GPL-3.0-only
+# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
+# Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
+# Copyright (c) 2020-2025 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2025 Alper Nebi Yasak <alpernebiyasak@gmail.com>
+
+remkdir()
+{
+	rm -Rf "$1" || $err "remkdir: !rm -Rf \"$1\""
+	mkdir -p "$1" || $err "remkdir: !mkdir -p \"$1\""
+}
+
+mkrom_tarball()
+{
+	printf "%s\n" "$version" > "$1/.version" || $err "$1 !version"
+	printf "%s\n" "$versiondate" > "$1/.versiondate" || $err "$1 !vdate"
+
+	mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz"
+	x_ rm -Rf "$1"
+}
+
+mktarball()
+{
+	[ "${2%/*}" = "$2" ] || x_ mkdir -p "${2%/*}"
+	x_ tar -c "$1" | xz -T$XBMK_THREADS -9e > "$2" || $err "mktarball2, $1"
+}
+
+mksha512sum()
+{
+	(
+	[ "${1%/*}" != "$1" ] && x_ cd "${1%/*}"
+	sha512sum ./"${1##*/}" >> "$2" || $err "!sha512sum \"$1\" > \"$2\""
+	) || $err "failed to create tarball checksum"
+}
+
+rmgit()
+{
+	(
+	cd "$1" || $err "!cd gitrepo $1"
+	find . -name ".git" -exec rm -Rf {} + || $err "!rm .git $1"
+	find . -name ".gitmodules" -exec rm -Rf {} + || $err "!rm .gitmod $1"
+	) || $err "Cannot remove .git/.gitmodules in $1"
+}
+
+# return 0 if project is single-tree, otherwise 1
+# e.g. coreboot is multi-tree, so 1
+singletree()
+{
+	for targetfile in "config/${1}/"*/target.cfg; do
+		[ -e "$targetfile" ] && [ -f "$targetfile" ] && return 1; :
+	done; :
+}
+
+# can grab from the internet, or copy locally.
+# if copying locally, it can only copy a file.
+xbmkget()
+{
+	_dlop="curl" && [ $# -gt 4 ] && _dlop="$5"
+	cached="$XBMK_CACHE/file/$4"
+	dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum
+	vendor_checksum "$4" "$cached" 2>/dev/null && dl_fail="y"
+	[ "$dl_fail" = "n" ] && e "$3" f && return 0
+	x_ mkdir -p "${3%/*}" "$XBMK_CACHE/file"
+	for url in "$1" "$2"; do
+		[ "$dl_fail" = "n" ] && break
+		[ -z "$url" ] && continue
+		rm -f "$cached" || $err "!rm -f '$cached'"
+		if [ "$_dlop" = "curl" ]; then
+			curl --location --retry 3 -A "$_ua" "$url" \
+			    -o "$cached" || wget --tries 3 -U "$_ua" "$url" \
+			    -O "$cached" || continue
+		elif [ "$_dlop" = "copy" ]; then
+			[ -L "$url" ] && \
+				printf "dl %s %s %s %s: '%s' is a symlink\n" \
+				    "$1" "$2" "$3" "$4" "$url" 1>&2 && continue
+			[ ! -f "$url" ] && \
+				printf "dl %s %s %s %s: '%s' not a file\n" \
+				    "$1" "$2" "$3" "$4" "$url" 1>&2 && continue
+			cp "$url" "$cached" || continue
+		else
+			$err "$1 $2 $3 $4: Unsupported dlop type: '$_dlop'"
+		fi
+		vendor_checksum "$4" "$cached" || dl_fail="n"
+	done
+	[ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: not downloaded"
+	[ "$cached" = "$3" ] || x_ cp "$cached" "$3"; :
+}
+
+vendor_checksum()
+{
+	[ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] || return 1
+	printf "Bad checksum for file: %s\n" "$2" 1>&2; rm -f "$2" || :; :
+}
+
+e()
+{
+	es_t="e" && [ $# -gt 1 ] && es_t="$2"
+	es2="already exists"
+	estr="[ -$es_t \"\$1\" ] || return 1"
+	[ $# -gt 2 ] && estr="[ -$es_t \"\$1\" ] && return 1" && es2="missing"
+
+	eval "$estr"
+	printf "%s %s\n" "$1" "$es2" 1>&2
+}
+
+mk()
+{
+	mk_flag="$1" || $err "No argument given"
+	shift 1 && for mk_arg in "$@"; do
+		x_ ./mk $mk_flag $mk_arg
+	done; :
+}
+
+check_defconfig()
+{
+	[ -d "$1" ] || $err "Target '$1' not defined."
+	for x in "$1"/config/*; do
+		[ -f "$x" ] && printf "%s\n" "$x" && return 1
+	done; :
+}
+
+cbfs()
+{
+	ccmd="add-payload" && [ $# -gt 3 ] && [ $# -lt 5 ] && ccmd="add"
+	lzma="-c lzma" && [ $# -gt 3 ] && [ $# -lt 5 ] && lzma="-t $4"
+
+	[ $# -gt 4 ] && [ "$5" = "0x1110000" ] && \
+	    ccmd="add-flat-binary" && \
+	    lzma="-c lzma -l 0x1110000 -e 0x1110000"
+
+	x_ "$cbfstool" "$1" $ccmd -f "$2" -n "$3" $lzma
+}
diff --git a/mk b/mk
index c83c75fd..44704b4b 100755
--- a/mk
+++ b/mk
@@ -13,6 +13,7 @@ if [ "./${0##*/}" != "${0}" ] || [ ! -f "mk" ] || [ -L "mk" ]; then
 fi
 
 . "include/init.sh"
+. "include/lib.sh"
 . "include/vendor.sh"
 . "include/mrc.sh"
 

From 703fe444312ad9087cddd322c00d15e5a2c9700f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 19:16:40 +0100
Subject: [PATCH 1232/1549] lib.sh: move cbfs() to rom.sh

it is only ever used there, so move it there

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 12 ------------
 include/rom.sh | 12 ++++++++++++
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 34d8b8b9..dea015e0 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -118,15 +118,3 @@ check_defconfig()
 		[ -f "$x" ] && printf "%s\n" "$x" && return 1
 	done; :
 }
-
-cbfs()
-{
-	ccmd="add-payload" && [ $# -gt 3 ] && [ $# -lt 5 ] && ccmd="add"
-	lzma="-c lzma" && [ $# -gt 3 ] && [ $# -lt 5 ] && lzma="-t $4"
-
-	[ $# -gt 4 ] && [ "$5" = "0x1110000" ] && \
-	    ccmd="add-flat-binary" && \
-	    lzma="-c lzma -l 0x1110000 -e 0x1110000"
-
-	x_ "$cbfstool" "$1" $ccmd -f "$2" -n "$3" $lzma
-}
diff --git a/include/rom.sh b/include/rom.sh
index 710df853..b1698ee1 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -277,6 +277,18 @@ cprom()
 	    cbfs "$newrom" "config/data/grub/bootorder_uboot" bootorder raw; :
 }
 
+cbfs()
+{
+	ccmd="add-payload" && [ $# -gt 3 ] && [ $# -lt 5 ] && ccmd="add"
+	lzma="-c lzma" && [ $# -gt 3 ] && [ $# -lt 5 ] && lzma="-t $4"
+
+	[ $# -gt 4 ] && [ "$5" = "0x1110000" ] && \
+	    ccmd="add-flat-binary" && \
+	    lzma="-c lzma -l 0x1110000 -e 0x1110000"
+
+	x_ "$cbfstool" "$1" $ccmd -f "$2" -n "$3" $lzma
+}
+
 mkcoreboottar()
 {
 	[ "$target" = "$tree" ] && return 0

From 1de77c6558c915723ccb40529357916f2aafbace Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 19:19:36 +0100
Subject: [PATCH 1233/1549] lib.sh: move singletree() to git.sh

it is primarily used there, and then in mk,
but only after git.sh is sourced.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 9 +++++++++
 include/lib.sh | 9 ---------
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 272a1af3..9be79527 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -66,6 +66,15 @@ git_prep()
 	mv "$tmpgit" "$_loc" || $err "git_prep: !mv $tmpgit $_loc"
 }
 
+# return 0 if project is single-tree, otherwise 1
+# e.g. coreboot is multi-tree, so 1
+singletree()
+{
+	for targetfile in "config/${1}/"*/target.cfg; do
+		[ -e "$targetfile" ] && [ -f "$targetfile" ] && return 1; :
+	done; :
+}
+
 fetch_submodule()
 {
 	mcfgdir="$mdir/${1##*/}"; eval \
diff --git a/include/lib.sh b/include/lib.sh
index dea015e0..f7d3e3b0 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -42,15 +42,6 @@ rmgit()
 	) || $err "Cannot remove .git/.gitmodules in $1"
 }
 
-# return 0 if project is single-tree, otherwise 1
-# e.g. coreboot is multi-tree, so 1
-singletree()
-{
-	for targetfile in "config/${1}/"*/target.cfg; do
-		[ -e "$targetfile" ] && [ -f "$targetfile" ] && return 1; :
-	done; :
-}
-
 # can grab from the internet, or copy locally.
 # if copying locally, it can only copy a file.
 xbmkget()

From 848159fa0eb9502b0403073c74b27bc98c7d3001 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 19:21:22 +0100
Subject: [PATCH 1234/1549] lib.sh: rename vendor_checksum

rename it to bad_checksum, so that its use makes more sense

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index f7d3e3b0..740edcfd 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -49,7 +49,7 @@ xbmkget()
 	_dlop="curl" && [ $# -gt 4 ] && _dlop="$5"
 	cached="$XBMK_CACHE/file/$4"
 	dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum
-	vendor_checksum "$4" "$cached" 2>/dev/null && dl_fail="y"
+	bad_checksum "$4" "$cached" 2>/dev/null && dl_fail="y"
 	[ "$dl_fail" = "n" ] && e "$3" f && return 0
 	x_ mkdir -p "${3%/*}" "$XBMK_CACHE/file"
 	for url in "$1" "$2"; do
@@ -71,13 +71,13 @@ xbmkget()
 		else
 			$err "$1 $2 $3 $4: Unsupported dlop type: '$_dlop'"
 		fi
-		vendor_checksum "$4" "$cached" || dl_fail="n"
+		bad_checksum "$4" "$cached" || dl_fail="n"
 	done
 	[ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: not downloaded"
 	[ "$cached" = "$3" ] || x_ cp "$cached" "$3"; :
 }
 
-vendor_checksum()
+bad_checksum()
 {
 	[ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] || return 1
 	printf "Bad checksum for file: %s\n" "$2" 1>&2; rm -f "$2" || :; :

From 6779d3f9915bc4a080683c460c5988e8e2c50405 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 19:28:49 +0100
Subject: [PATCH 1235/1549] move variables out of init.sh to others

move them where they are used, or if they are used
in many places, move them to lib.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh   | 6 ------
 include/lib.sh    | 5 +++++
 include/rom.sh    | 2 ++
 include/vendor.sh | 1 +
 4 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index b8c3cb35..2e60883d 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -14,12 +14,6 @@ projectsite="https://libreboot.org/"
     export PATH="/usr/local/bin:/usr/bin:/bin:/usr/local/games:/usr/games"
 xbmkpath="$PATH"
 
-_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
-
-ifdtool="elf/ifdtool/default/ifdtool"
-cbfstool="elf/cbfstool/default/cbfstool"
-rmodtool="elf/cbfstool/default/rmodtool"
-grubdata="config/data/grub"
 err="err_"
 
 setvars()
diff --git a/include/lib.sh b/include/lib.sh
index 740edcfd..01a78495 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -4,6 +4,11 @@
 # Copyright (c) 2020-2025 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2025 Alper Nebi Yasak <alpernebiyasak@gmail.com>
 
+_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
+
+cbfstool="elf/cbfstool/default/cbfstool"
+rmodtool="elf/cbfstool/default/rmodtool"
+
 remkdir()
 {
 	rm -Rf "$1" || $err "remkdir: !rm -Rf \"$1\""
diff --git a/include/rom.sh b/include/rom.sh
index b1698ee1..68c61936 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -5,6 +5,8 @@
 # Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
 # Copyright (c) 2023-2024 Riku Viitanen <riku.viitanen@protonmail.com>
 
+grubdata="config/data/grub"
+
 mkserprog()
 {
 	[ $# -lt 1 ] && $err "mkserprog: no arguments provided"
diff --git a/include/vendor.sh b/include/vendor.sh
index 4ee593ea..6b316729 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -16,6 +16,7 @@ vfix="DO_NOT_FLASH_YET._FIRST,_INJECT_FILES_VIA_INSTRUCTIONS_ON_LIBREBOOT.ORG_"
 vguide="https://libreboot.org/docs/install/ivy_has_common.html"
 tmpromdel="$xbmkpwd/tmp/DO_NOT_FLASH"
 nvm="util/nvmutil/nvm"
+ifdtool="elf/ifdtool/default/ifdtool"
 
 cvchk="CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
 	CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \

From 24e488aae56a97ca8a96fa7177351478b9596001 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 19:30:38 +0100
Subject: [PATCH 1236/1549] lib.sh: move _ua to the xbmkget function

don't declare it globally, because it's only used here

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 01a78495..5e88fa54 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -4,8 +4,6 @@
 # Copyright (c) 2020-2025 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2025 Alper Nebi Yasak <alpernebiyasak@gmail.com>
 
-_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
-
 cbfstool="elf/cbfstool/default/cbfstool"
 rmodtool="elf/cbfstool/default/rmodtool"
 
@@ -51,6 +49,8 @@ rmgit()
 # if copying locally, it can only copy a file.
 xbmkget()
 {
+	_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
+
 	_dlop="curl" && [ $# -gt 4 ] && _dlop="$5"
 	cached="$XBMK_CACHE/file/$4"
 	dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum

From c698972130fb0d1ee07ae0dee609a0cbec38dddf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 19:58:29 +0100
Subject: [PATCH 1237/1549] rename include/vendor.sh to inject.sh

this matches cbmk, where inject.sh is the file name

this will make future cherry-picks of lbmk->cbmk easier

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/{vendor.sh => inject.sh} | 0
 mk                               | 2 +-
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename include/{vendor.sh => inject.sh} (100%)

diff --git a/include/vendor.sh b/include/inject.sh
similarity index 100%
rename from include/vendor.sh
rename to include/inject.sh
diff --git a/mk b/mk
index 44704b4b..c0184384 100755
--- a/mk
+++ b/mk
@@ -14,7 +14,7 @@ fi
 
 . "include/init.sh"
 . "include/lib.sh"
-. "include/vendor.sh"
+. "include/inject.sh"
 . "include/mrc.sh"
 
 eval "`setvars "" vdir src_dirname srcdir mode`"

From a8f0623efbb4d0ac9514f7a76af485a759b502fa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 20:30:22 +0100
Subject: [PATCH 1238/1549] update uefitool to rev a072527, 26 Apr 2025

This fixes a problem, in that CMake 4.0 dropped compatibility
with CMake version 3.5; UEFIExtract/CMakeLists.txt had the line:

CMAKE_MINIMUM_REQUIRED(VERSION 3.1.0 FATAL_ERROR)

This is lower than 3.5.

The new version has this:

CMAKE_MINIMUM_REQUIRED(VERSION 3.22)

Which is higher than 3.5, in terms of version number.

This brings in the following upstream changes:

* a072527 Convert other uses of 0xABCD back to ABCDh
* a19aead Revert "Update hexadecimal numbers output format from ABCDh to 0xABCD" due to breaking downstream tools
* 7752279 Improve region access settings info for Intel v2 descriptor
* 6f6debb Add volume header info on NumBlocks and Length used to calcualte alternative size of it
* f64ba09 Minor fix for embedded QHexView on Windows
* 2b23bbd Implement Apple developer signing for macOS builds
* 9cc9518 Update hexadecimal numbers output format from ABCDh to 0xABCD
* 73d07cd Add Kaitai-based parser for Dell DVAR store
* c8b7151 Fix minor bug while presenting the EOF elemement of AppleSysF store
* 892111a Add new fields into Intel Microcode header
* 7cea8ee Remove outdated definition of FLASH_PARAMETERS
* c38ed92 Add missing header comments to goto*dialog.h
* 22bb757 Remove PATH_MAX from realpath
* d61d759 Make sure to wrap all uses of kaitai::kstream into try-catch blocks
* 7ef3719 Add initial support for Insyde H2O FlashDeviceMap rev4
* 97a85f9 Add Microsoft LZMA section GUID
* a077743 Bump version numbers
* 07742a5 Update GUID database
* a12be6b Address review comments
* 9719b0c Update copyright and authors in About UEFITool window
* fbf6afd Expand Type column of the report to fit new FlashDeviceMap store and entry types
* 3cb5dc0 Add SLIC pubkey and marker parsers
* fd0faea Add Phoenix CMDB parser
* 01e2e08 Add FFS volume parser for non-AMI NVRAM areas
* 4e2a8f6 Add Intel uCode parser
* 58366f4 Add Insyde Flash Device Map parser
* b98edf6 Add Phoenix EVSA parser
* f989fdf Add Phoenix FlashMap parser
* 4e600eb Add Apple SysF/Diag parser
* 2d6eaa9 Add EDK2 FTW parser
* ca7d4ca Add Insyde FDC parser
* 34904bd Add KaitaiStruct parsing of Phoenix VSS2
* 489b85f Rewrite VSS and VSS2 NVRAM variable parsers in KaitaiStruct
* 2661b8f Remove manual NVRAM parsing, add EDK2 VSS parser written in KaitaiStruct
* d91115f Also sign UEFIFind and UEFIExtract for macOS
* 0fae05c Add adhoc signature to UEFITool on macOS
* 5e6a1c7 Fix CFBundleIdentifier in UEFITool Info.plist
* 8d7e01c Make sure to initialize counterUncData
* b1ad055 Bump version numbers
* 7dd9014 Update GUID database
* 4e3fa58 Update QHexView, build it as a library for Qt6 builds
* 369f101 Enable building ffsparser_fuzzer during CI/CD, improve readUnaligned to silence Clang UBSAN
* ff42cec UEFIExtract: add support for extracting uncompressedData for tree items that have it
* c94f78a Add missing common/LZMA/SDK/C/7zWindows.h
* b5756f9 Revert old patch from common/LZMA/SDK/C/CpuArch.c
* 65fb4a8 Update LZMA SDK to 24.09
* e66bc7d Apply a small patch to common/zlib/gzguts.h to fix a build issue in macOS
* dcf21fa Update built-in zlib to 1.3.1
* 0af36bd Fix an issue with kaitai_regenerate.sh creating backup files on modern macOS
* fd76e89 Update README.md
* 427d8ec Update README.md
* a824260 Add MX77L12850F
* a777f1f Update main.yml
* 5f23377 Update main.yml
* 932120c Use x64 macos-13 runner for FreeBSD in main.yml
* a8c008c Update macos-12 to macos-latest in main.yml
* 6b853f8 Fix SonarCube Scan action version
* 66565a5 Try using new SonarCube scan action
* 371448d Enable long file paths for UEFIFind
* b0cd7fe Update upload-artifacts action to v4
* 4b868bb Remove CodeQL and PVS-Studio from main.yml
* 214b356 Add AMIC A25LQ64 to internal JEDEC ID database
* 0030ea9 Fix findPattern logic when pattern is at the end of the data
* 3441255 fix: add qt version limit to setDesktopFileName
* 941ee6c Set desktop file name to fix the missing icon when running under Wayland
* c550853 Defined ACCESSPERMS for musl
* bf93a5e Bump version numbers
* d03a8f2 Fixing FreeBSD action
* 0a88da1 Update guids.csv
* 6f9a4c0 Fix off-by-one error in parsing IFWI partition table
* e0b1e02 Update main.yml
* 161c697 Update main.yml
* 573452e Update main.yml
* 166c797 add Micron XM25RH128C
* 0e11189 fix a few misspellings
* daf5851 Update README.md
* 1cba371 Update guids.csv
* 4992474 Fix CPD Extension offset (reverts 29915ca)
* 29915ca Fix CPD Manifest's partition offset

The ACCESSPERMS patch has been removed, because upstream
already dealt with this. Libreboot had made the same fix
independently, without realising that upstream also did.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/uefitool/pkg.cfg                   |  2 +-
 ...stem-define-ACCESSPERMS-if-undefined.patch | 56 -------------------
 2 files changed, 1 insertion(+), 57 deletions(-)
 delete mode 100644 config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch

diff --git a/config/git/uefitool/pkg.cfg b/config/git/uefitool/pkg.cfg
index 8b269666..f972acb2 100644
--- a/config/git/uefitool/pkg.cfg
+++ b/config/git/uefitool/pkg.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-rev="4a41c33596e9bc3ae812e763965d91ac57553e02"
+rev="a072527138637a0e2808ad1544a02d187ab1ed79"
 url="https://codeberg.org/libreboot/UEFITool"
 bkup_url="https://github.com/LongSoft/UEFITool"
diff --git a/config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch b/config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch
deleted file mode 100644
index 8241cebe..00000000
--- a/config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 75437e2253fc70f4e3368c9d030415ce4ae52fa6 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sun, 28 Jul 2024 16:04:30 +0100
-Subject: [PATCH 1/1] common/filesystem: define ACCESSPERMS if undefined
-
-Normally defined in sys/stat.h on various libc implementations,
-but musl libc doesn't seem to have it, leading to this build
-issue:
-
-common/filesystem.cpp:86:38: error: 'ACCESSPERMS' was not declared in this scope
-   86 |     return (mkdir(dir.toLocal8Bit(), ACCESSPERMS) == 0);
-
-ACCESSPERMS is typically defined as the result of bitwise OR:
-S_IRWXU | S_IRWXG | S_IRWXO
-
-This creates the chmod permission 0777, used on the mkdir() call.
-
-ACCESSPERMS is supported on GNU C Library, for compatibility with
-BSD libc implementations; the latter also implements ALLPERMS
-and DEFFILEMODE, which don't seem to be used by uefitool regardless.
-
-Do not define it on the Windows builds; only do it for the others,
-such as Linux.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- common/filesystem.cpp | 8 +++++++-
- 1 file changed, 7 insertions(+), 1 deletion(-)
-
-diff --git a/common/filesystem.cpp b/common/filesystem.cpp
-index b2b8d65..af5e537 100644
---- a/common/filesystem.cpp
-+++ b/common/filesystem.cpp
-@@ -75,6 +75,12 @@ UString getAbsPath(const UString & path)
- #else
- #include <unistd.h>
- #include <stdlib.h>
-+
-+/* musl libc does not define ACCESSPERMS */
-+#ifndef ACCESSPERMS
-+#define ACCESSPERMS (S_IRWXU | S_IRWXG | S_IRWXO) /* chmod permission: 0777 */
-+#endif
-+
- bool isExistOnFs(const UString & path) 
- {
-     struct stat buf;
-@@ -103,4 +109,4 @@ UString getAbsPath(const UString & path) {
-         return UString(abs);
-     return path;
- }
--#endif
-\ No newline at end of file
-+#endif
--- 
-2.39.2
-

From a0e1d42ff74ab3191b88818c6ad8220ebbc1afc4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 21:17:23 +0100
Subject: [PATCH 1239/1549] init.sh: Provide more complete error info

On initialisation of the child instance, ./mk is
executed, but an error from it won't reveal what
command was actually executed.

This change makes that the case, since x_ does
print the command that caused an error.

This is useful for debugging. However, we don't
want x_ to cause a real exit, because we still
need to handle the lock file from the parent
instance.

Therefore, the first child instance is executed
inside a subshell, and xbmk_rval is set if that
subshell returns non-zero.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/init.sh b/include/init.sh
index 2e60883d..c9be7e0c 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -205,7 +205,7 @@ xbmk_child_init()
 	) || $err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"
 
 	xbmk_rval=0
-	./mk "$@" || xbmk_rval=1
+	( x_ ./mk "$@" ) || xbmk_rval=1
 	rm -Rf "$xbmktmp" || xbmk_rval=1
 	rm -f lock || xbmk_rval=1
 	exit $xbmk_rval

From 0280cd4c0e74a6d11e5f2a5d07d914532dfb7983 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 21:28:13 +0100
Subject: [PATCH 1240/1549] init.sh: move parent fork to new function

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/init.sh b/include/init.sh
index c9be7e0c..dbe6bcd9 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -204,6 +204,11 @@ xbmk_child_init()
 	x_ ln -s "`pybin "$python"`" python
 	) || $err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"
 
+	xbmk_child_exec "$@"
+}
+
+xbmk_child_exec()
+{
 	xbmk_rval=0
 	( x_ ./mk "$@" ) || xbmk_rval=1
 	rm -Rf "$xbmktmp" || xbmk_rval=1

From 15268202478290b645e5d7c824a0c6f63e06373f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 21:47:28 +0100
Subject: [PATCH 1241/1549] init.sh: split xbmk_child_init into functions

one function, for one task. skeleton functions for
performing multiple tasks. that is the basic coding
style guideline for lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 27 +++++++++++++++++++--------
 1 file changed, 19 insertions(+), 8 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index dbe6bcd9..1518f358 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -178,22 +178,35 @@ init_ver()
 	export LOCALVERSION="-$projectname-${version%%-*}"
 }
 
-# if this instance is the main parent, re-run as a child process and exit.
 xbmk_child_init()
+{
+	for init_cmd in create_tmpdir lock create_pathdirs child_exec; do
+		xbmk_$init_cmd "$@" || return 0; :
+	done
+}
+
+xbmk_create_tmpdir()
 {
 	# unify all temporary files/directories in a single TMPDIR
 	[ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || \
 	    unset TMPDIR
 	[ -n "${TMPDIR+x}" ] && export TMPDIR="$TMPDIR" && xbmktmp="$TMPDIR"
-	[ -z "${TMPDIR+x}" ] || return 0 # this is a child instance, so return
+	[ -z "${TMPDIR+x}" ] || return 1 # child instance, so return
 
 	# parent instance of xbmk, so don't return. set up TMPDIR
-	# and re-run as a child instance:
-	[ -f "lock" ] && $err "$xbmkpwd/lock exists. Is a build running?"
 	export TMPDIR="/tmp"
 	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
 	xbmktmp="$TMPDIR"
-	touch lock || $err "cannot create 'lock' file"
+}
+
+xbmk_lock()
+{
+	[ -f "lock" ] && $err "$xbmkpwd/lock exists. Is a build running?"
+	touch lock || $err "cannot create 'lock' file"; :
+}
+
+xbmk_create_pathdirs()
+{
 	x_ rm -Rf "$XBMK_CACHE/xbmkpath" "$XBMK_CACHE/gnupath"
 	x_ mkdir -p "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
 	export PATH="$XBMK_CACHE/xbmkpath:$XBMK_CACHE/gnupath:$PATH"
@@ -202,9 +215,7 @@ xbmk_child_init()
 	# see code above that detected the correct python3 command.
 	cd "$XBMK_CACHE/xbmkpath" || $err "can't cd $XBMK_CACHE/xbmkpath"
 	x_ ln -s "`pybin "$python"`" python
-	) || $err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"
-
-	xbmk_child_exec "$@"
+	) || $err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"; :
 }
 
 xbmk_child_exec()

From 18ad654a1f71dd8734bf45d6c9f7062b80bdd144 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 22:02:26 +0100
Subject: [PATCH 1242/1549] init.sh: merge xbmk_child_init with xbmk_init

the for loop at the end of xbmk_init does essentially
the same thing. adapt accordingly, and merge.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 20 +++++++-------------
 1 file changed, 7 insertions(+), 13 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 1518f358..1a383bd7 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -51,8 +51,9 @@ xbmk_init()
 		eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
 	done
 
-	for xbmk_cmd in setpyver init_vars init_ver xbmk_child_init; do
-		$xbmk_cmd "$@"
+	for init_cmd in set_pyver init_vars init_ver create_tmpdir lock \
+	    create_pathdirs child_exec; do
+		xbmk_$init_cmd "$@" || break
 	done
 }
 
@@ -86,7 +87,7 @@ chkvars()
 	done; :
 }
 
-setpyver()
+xbmk_set_pyver()
 {
 	pyv="import sys; print(sys.version_info[:])"
 	python="python3"
@@ -136,7 +137,7 @@ pybin()
 	command -v "$1" 2>/dev/null || return 1
 }
 
-init_vars()
+xbmk_init_vars()
 {
 	# XBMK_CACHE is a directory, for caching downloads and git repon
 	[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$xbmkpwd/cache"
@@ -158,10 +159,10 @@ init_vars()
 	[ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > .version \
 	    || $err "Cannot generate unknown .version file"
 	[ -e ".git" ] || [ -f ".versiondate" ] || printf "1716415872\n" > \
-	    .versiondate || $err "Cannot generate unknown .versiondate file"
+	    .versiondate || $err "Cannot generate unknown .versiondate file"; :
 }
 
-init_ver()
+xbmk_init_ver()
 {
 	version_="$version"
 	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
@@ -178,13 +179,6 @@ init_ver()
 	export LOCALVERSION="-$projectname-${version%%-*}"
 }
 
-xbmk_child_init()
-{
-	for init_cmd in create_tmpdir lock create_pathdirs child_exec; do
-		xbmk_$init_cmd "$@" || return 0; :
-	done
-}
-
 xbmk_create_tmpdir()
 {
 	# unify all temporary files/directories in a single TMPDIR

From 9ec721534083fae3ac23af36f0417db867fd0ded Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 22:07:52 +0100
Subject: [PATCH 1243/1549] init.sh setvars: make err a printf for eval

setvars is always invoked with eval, so make the error
condition a message for eval, to ensure that it is reliably
handled, in case of error condition.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/include/init.sh b/include/init.sh
index 1a383bd7..88d70b8c 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -18,7 +18,11 @@ err="err_"
 
 setvars()
 {
-	_setvars="" && [ $# -lt 2 ] && $err "setvars: too few arguments"
+	_setvars=""
+	if [ $# -lt 2 ]; then
+		printf "\$err \"setvars: too few args\""
+		return 0
+	fi
 	val="$1" && shift 1 && for var in "$@"; do
 		_setvars="$var=\"$val\"; $_setvars"
 	done

From e009f09e7fafec2e0ed1d3f729f19d9a5c91a4ff Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 22:09:14 +0100
Subject: [PATCH 1244/1549] init.sh: clean up setvars

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 88d70b8c..5b158e0e 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -20,10 +20,12 @@ setvars()
 {
 	_setvars=""
 	if [ $# -lt 2 ]; then
-		printf "\$err \"setvars: too few args\""
+		printf "\$err \"setvars: too few args\\n\""
 		return 0
 	fi
-	val="$1" && shift 1 && for var in "$@"; do
+	val="$1"
+	shift 1
+	for var in "$@"; do
 		_setvars="$var=\"$val\"; $_setvars"
 	done
 	printf "%s\n" "${_setvars% }"

From ec1c92238ccaceab59102dbf0ede8f63bc0ef433 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 22:23:37 +0100
Subject: [PATCH 1245/1549] init.sh: minor cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 5b158e0e..973eee6f 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -57,7 +57,7 @@ xbmk_init()
 		eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
 	done
 
-	for init_cmd in set_pyver init_vars init_ver create_tmpdir lock \
+	for init_cmd in set_pyver set_env set_version create_tmpdir lock \
 	    create_pathdirs child_exec; do
 		xbmk_$init_cmd "$@" || break
 	done
@@ -143,7 +143,7 @@ pybin()
 	command -v "$1" 2>/dev/null || return 1
 }
 
-xbmk_init_vars()
+xbmk_set_env()
 {
 	# XBMK_CACHE is a directory, for caching downloads and git repon
 	[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$xbmkpwd/cache"
@@ -160,16 +160,16 @@ xbmk_init_vars()
 
 	[ -z "${XBMK_THREADS+x}" ] && export XBMK_THREADS=1
 	expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
-	    1>/dev/null 2>/dev/null || export XBMK_THREADS=1
+	    1>/dev/null 2>/dev/null || export XBMK_THREADS=1; :
+}
 
+xbmk_set_version()
+{
 	[ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > .version \
 	    || $err "Cannot generate unknown .version file"
 	[ -e ".git" ] || [ -f ".versiondate" ] || printf "1716415872\n" > \
 	    .versiondate || $err "Cannot generate unknown .versiondate file"; :
-}
 
-xbmk_init_ver()
-{
 	version_="$version"
 	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
 	    version="git-$(git rev-parse HEAD 2>&1)" || version="$version_"

From f6c5c8d396d3e5b317f19e66ca23049a06949969 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 22:29:17 +0100
Subject: [PATCH 1246/1549] mk: move git_init to init.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 18 ++++++++++++++++--
 mk              | 15 +--------------
 2 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 973eee6f..b7f79936 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -57,8 +57,8 @@ xbmk_init()
 		eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
 	done
 
-	for init_cmd in set_pyver set_env set_version create_tmpdir lock \
-	    create_pathdirs child_exec; do
+	for init_cmd in set_pyver set_env set_version git_init create_tmpdir \
+	    lock create_pathdirs child_exec; do
 		xbmk_$init_cmd "$@" || break
 	done
 }
@@ -185,6 +185,20 @@ xbmk_set_version()
 	export LOCALVERSION="-$projectname-${version%%-*}"
 }
 
+xbmk_git_init()
+{
+	[ -L ".git" ] && return 1
+	[ -e ".git" ] && return 0
+	eval "`setvars "$(date -Rud @$versiondate)" cdate _nogit`"
+
+	x_ git init 1>/dev/null 2>/dev/null
+	x_ git add -A . 1>/dev/null 2>/dev/null
+	x_ git commit -m "$projectname $version" --date "$cdate" \
+	    --author="xbmk <xbmk@example.com>" 1>/dev/null 2>/dev/null
+	x_ git tag -a "$version" -m "$projectname $version" 1>/dev/null \
+	    2>/dev/null; :
+}
+
 xbmk_create_tmpdir()
 {
 	# unify all temporary files/directories in a single TMPDIR
diff --git a/mk b/mk
index c0184384..7e5525e4 100755
--- a/mk
+++ b/mk
@@ -24,7 +24,7 @@ main()
 	cmd="" && [ $# -gt 0 ] && cmd="$1" && shift 1
 
 	for g in "command -v git" "git config --global user.name" \
-	    "git config --global user.email" "git_init"; do
+	    "git config --global user.email"; do
 		eval "$g 1>/dev/null 2>/dev/null || $err \"Unconfigured: $g\""
 	done
 
@@ -37,19 +37,6 @@ main()
 	set -u -e # some commands disable them. turn them on!
 }
 
-git_init()
-{
-	[ -L ".git" ] && return 1
-	[ -e ".git" ] && return 0
-	eval "`setvars "$(date -Rud @$versiondate)" cdate _nogit`"
-
-	git init || return 1
-	git add -A . || return 1
-	git commit -m "$projectname $version" --date "$cdate" \
-	    --author="xbmk <xbmk@example.com>" || return 1
-	git tag -a "$version" -m "$projectname $version" || return 1
-}
-
 release()
 {
 	export XBMK_RELEASE="y"

From 11cd952060d0e8c915b5d9ce456029ae3cd98125 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 22:41:05 +0100
Subject: [PATCH 1247/1549] init.sh: tidy up xbmk_init()

more version-related code moved to xbmk_set_version

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index b7f79936..c6956086 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -53,10 +53,6 @@ xbmk_init()
 	id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
 	[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
 
-	for fv in version versiondate; do
-		eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
-	done
-
 	for init_cmd in set_pyver set_env set_version git_init create_tmpdir \
 	    lock create_pathdirs child_exec; do
 		xbmk_$init_cmd "$@" || break
@@ -165,6 +161,10 @@ xbmk_set_env()
 
 xbmk_set_version()
 {
+	for fv in version versiondate; do
+		eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
+	done
+
 	[ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > .version \
 	    || $err "Cannot generate unknown .version file"
 	[ -e ".git" ] || [ -f ".versiondate" ] || printf "1716415872\n" > \

From 97a5e3d15edac08c36b889743c85b3ee0bad4064 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 22:44:11 +0100
Subject: [PATCH 1248/1549] mk: move git check to init.sh xbmk_set_version

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 5 +++++
 mk              | 5 -----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index c6956086..eb20830b 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -165,6 +165,11 @@ xbmk_set_version()
 		eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
 	done
 
+	for g in "command -v git" "git config --global user.name" \
+	    "git config --global user.email"; do
+		eval "$g 1>/dev/null 2>/dev/null || $err \"Unconfigured: $g\""
+	done
+
 	[ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > .version \
 	    || $err "Cannot generate unknown .version file"
 	[ -e ".git" ] || [ -f ".versiondate" ] || printf "1716415872\n" > \
diff --git a/mk b/mk
index 7e5525e4..bc816229 100755
--- a/mk
+++ b/mk
@@ -23,11 +23,6 @@ main()
 {
 	cmd="" && [ $# -gt 0 ] && cmd="$1" && shift 1
 
-	for g in "command -v git" "git config --global user.name" \
-	    "git config --global user.email"; do
-		eval "$g 1>/dev/null 2>/dev/null || $err \"Unconfigured: $g\""
-	done
-
 	case "$cmd" in
 	version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
 	release|download|inject) $cmd "$@" ;;

From 3292bded692a0f004e8d7bedb246ba87557649e2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 22:46:30 +0100
Subject: [PATCH 1249/1549] mk: make main() more readable

now that main is so small, some of the condensed
lines can be loosened up.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/mk b/mk
index bc816229..103c632b 100755
--- a/mk
+++ b/mk
@@ -21,13 +21,21 @@ eval "`setvars "" vdir src_dirname srcdir mode`"
 
 main()
 {
-	cmd="" && [ $# -gt 0 ] && cmd="$1" && shift 1
+	cmd=""
+	if [ $# -gt 0 ]; then
+		cmd="$1"
+		shift 1
+	fi
 
 	case "$cmd" in
-	version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
-	release|download|inject) $cmd "$@" ;;
-	-*) return 1 ;;
-	*) $err "bad command" ;;
+	version)
+		printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
+	release|download|inject)
+		$cmd "$@" ;;
+	-*)
+		return 1 ;;
+	*)
+		$err "bad command" ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
 }

From ea081adc4ca6ac9c8ce2c9f87b6c991f0ad3d2d5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 22:51:56 +0100
Subject: [PATCH 1250/1549] init.sh: tidy up the git name/email check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index eb20830b..abf812dc 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -165,10 +165,9 @@ xbmk_set_version()
 		eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
 	done
 
-	for g in "command -v git" "git config --global user.name" \
-	    "git config --global user.email"; do
-		eval "$g 1>/dev/null 2>/dev/null || $err \"Unconfigured: $g\""
-	done
+	x_ command -v git
+	x_ git config --global user.name
+	x_ git config --global user.email
 
 	[ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > .version \
 	    || $err "Cannot generate unknown .version file"

From 9cebda333d50b369541963342e655bdaa3677e90 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 22:54:43 +0100
Subject: [PATCH 1251/1549] init.sh: move git name/mail check to xbmk_git_init

the command -v check has been removed, since this function
already calls git immediately, which would accomplish the
same thing since that causes an error if git isn't there.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index abf812dc..6a5bd2fc 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -165,10 +165,6 @@ xbmk_set_version()
 		eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
 	done
 
-	x_ command -v git
-	x_ git config --global user.name
-	x_ git config --global user.email
-
 	[ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > .version \
 	    || $err "Cannot generate unknown .version file"
 	[ -e ".git" ] || [ -f ".versiondate" ] || printf "1716415872\n" > \
@@ -200,7 +196,10 @@ xbmk_git_init()
 	x_ git commit -m "$projectname $version" --date "$cdate" \
 	    --author="xbmk <xbmk@example.com>" 1>/dev/null 2>/dev/null
 	x_ git tag -a "$version" -m "$projectname $version" 1>/dev/null \
-	    2>/dev/null; :
+	    2>/dev/null
+
+	x_ git config --global user.name
+	x_ git config --global user.email
 }
 
 xbmk_create_tmpdir()

From f3882b9bf2174900d7f8280392a547cb28f1c1b0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 23:02:04 +0100
Subject: [PATCH 1252/1549] init.sh: make git name/email error more useful

instruct the user what to do in these conditions

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 6a5bd2fc..a88bd13f 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -198,8 +198,10 @@ xbmk_git_init()
 	x_ git tag -a "$version" -m "$projectname $version" 1>/dev/null \
 	    2>/dev/null
 
-	x_ git config --global user.name
-	x_ git config --global user.email
+	for gitarg in "--global user.name" "--global user.email"; do
+		gitcmd="git config $gitarg"; $gitcmd || $err \
+		    "Please run this first: $gitcmd \"your ${gitcmd##*.}\""
+	done
 }
 
 xbmk_create_tmpdir()

From 71a58a38ab4eca90894c65dbfd188a62380637cc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 26 Apr 2025 23:07:25 +0100
Subject: [PATCH 1253/1549] mk: condense main() again

i prefer it this way. this reverses the change that
i made a few revisions ago

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 18 +++++-------------
 1 file changed, 5 insertions(+), 13 deletions(-)

diff --git a/mk b/mk
index 103c632b..bc816229 100755
--- a/mk
+++ b/mk
@@ -21,21 +21,13 @@ eval "`setvars "" vdir src_dirname srcdir mode`"
 
 main()
 {
-	cmd=""
-	if [ $# -gt 0 ]; then
-		cmd="$1"
-		shift 1
-	fi
+	cmd="" && [ $# -gt 0 ] && cmd="$1" && shift 1
 
 	case "$cmd" in
-	version)
-		printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
-	release|download|inject)
-		$cmd "$@" ;;
-	-*)
-		return 1 ;;
-	*)
-		$err "bad command" ;;
+	version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
+	release|download|inject) $cmd "$@" ;;
+	-*) return 1 ;;
+	*) $err "bad command" ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
 }

From da108d1c045582af0b81ca05c758125071155f03 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 29 Apr 2025 11:16:30 +0100
Subject: [PATCH 1254/1549] mk: Don't run mkhelpers if mode is set

If the mode string is empty, then it's a build command.

See commit:

commit b1ea4165754f04660d3c7282274c4b12355f88a0
Author: Leah Rowe <leah@libreboot.org>
Date:   Wed Apr 23 03:54:08 2025 +0100

    mk: remove mkhelp() and use x_() instead

This commit removed the following check:

If mode isn't set, run an mkhelper, otherwise don't.

Because this simplification removed that behaviour,
running e.g. "./mk -m coreboot x200_8mb" would result
in the mkcorebootbin function being executed, which is
normally putting the coreboot rom together.

Since it wasn't built in this case, an error is thrown.
This change therefore restores the previous behaviour,
fixing the bug.

First reported in this error report:
https://codeberg.org/libreboot/lbmk/issues/306

This commit fixes the issue.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/mk b/mk
index bc816229..7b4d69ae 100755
--- a/mk
+++ b/mk
@@ -191,7 +191,7 @@ build_targets()
 		printf "'make %s', '%s', '%s'\n" "$mode" "$project" "$target"
 		x_ handle_defconfig
 
-		x_ $postmake
+		[ -n "$mode" ] || x_ $postmake
 	done; :
 }
 
@@ -418,14 +418,14 @@ handle_makefile()
 
 run_make_command()
 {
-	x_ $premake
+	[ -n "$mode" ] || x_ $premake
 
 	$dry check_cmake "$srcdir" && [ -z "$mode" ] && \
 	    $dry check_autoconf "$srcdir"
 	$dry check_makefile "$srcdir" || return 1
 
 	$dry x_ make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs
-	x_ $mkhelper
+	[ -n "$mode" ] || x_ $mkhelper
 
 	[ "$mode" != "clean" ] || \
 	    $dry make -C "$srcdir" $cleanargs distclean || :; :

From 3045079947be1f88c76badcfa0df99e96097fb44 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 29 Apr 2025 11:48:39 +0100
Subject: [PATCH 1255/1549] init.sh: use backslash for dotfiles in eval

see:

commit f0c629dcc6c3f2242a735567cdd6855fa108d1a5
Author: Leah Rowe <leah@libreboot.org>
Date:   Sat Apr 12 13:51:49 2025 +0100

    lib.sh: write version/versiondate to dotfiles

and this bug report:

https://codeberg.org/libreboot/lbmk/issues/284

The report indicates that the above commit broke bash,
when sh (on the user's system) is bash.

I know sometimes when using bash, I need to use the
back slash when dealing with dots, e.g. when grepping
something.

Also double quote references to dotfiles, e.g. when
directing the output of printf.

I never noticed the issue myself, since I use dash.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index a88bd13f..b515cebc 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -162,10 +162,10 @@ xbmk_set_env()
 xbmk_set_version()
 {
 	for fv in version versiondate; do
-		eval "[ ! -f \".$fv\" ] || read -r $fv < \".$fv\" || :"
+		eval "[ ! -f \"\.$fv\" ] || read -r $fv < \"\.$fv\" || :"
 	done
 
-	[ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > .version \
+	[ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > ".version" \
 	    || $err "Cannot generate unknown .version file"
 	[ -e ".git" ] || [ -f ".versiondate" ] || printf "1716415872\n" > \
 	    .versiondate || $err "Cannot generate unknown .versiondate file"; :
@@ -178,8 +178,8 @@ xbmk_set_version()
 	    --pretty='%ct' HEAD)" || versiondate="$versiondate_"
 
 	chkvars version versiondate
-	printf "%s\n" "$version" > .version || $err "can't save version"
-	printf "%s\n" "$versiondate" > .versiondate || $err "can't save date"
+	printf "%s\n" "$version" > ".version" || $err "can't save version"
+	printf "%s\n" "$versiondate" > ".versiondate" || $err "can't save date"
 
 	relname="$projectname-$version"
 	export LOCALVERSION="-$projectname-${version%%-*}"

From 093a86d9c09295e79a7e8f271c9f05dd91a85e4b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 29 Apr 2025 12:01:13 +0100
Subject: [PATCH 1256/1549] init.sh: don't use eval to read version files

it's not necessary, and was the cause of a recent issue,
which i mitigated, but why mitigate it?

prevent bugs. don't use eval unless absolutely necessary.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index b515cebc..09b3223b 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -161,9 +161,8 @@ xbmk_set_env()
 
 xbmk_set_version()
 {
-	for fv in version versiondate; do
-		eval "[ ! -f \"\.$fv\" ] || read -r $fv < \"\.$fv\" || :"
-	done
+	[ ! -f ".version" ] || read -r version < ".version" || :; :
+	[ ! -f ".versiondate" ] || read -r versiondate < ".versiondate" || :; :
 
 	[ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > ".version" \
 	    || $err "Cannot generate unknown .version file"

From 418570a6172dd4dfc0455d36a622c30ed207f2c4 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Wed, 23 Apr 2025 14:25:06 +0300
Subject: [PATCH 1257/1549] u-boot: arm64: Turn configs into defconfigs

Run `./mk -s u-boot` to convert our configs into defconfigs, so we can
keep our changes to the old upstream defconfigs and re-apply them to the
new upstream defconfigs.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 config/u-boot/gru_bob/config/default         | 2294 ------------------
 config/u-boot/gru_kevin/config/default       | 2291 -----------------
 config/u-boot/qemu_arm64_12mb/config/default | 1748 -------------
 3 files changed, 6333 deletions(-)

diff --git a/config/u-boot/gru_bob/config/default b/config/u-boot/gru_bob/config/default
index bdd3ee98..7d22f18f 100644
--- a/config/u-boot/gru_bob/config/default
+++ b/config/u-boot/gru_bob/config/default
@@ -1,2426 +1,132 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# U-Boot 2024.10 Configuration
-#
-
-#
-# Compiler: gcc (Debian 12.2.0-14) 12.2.0
-#
-CONFIG_CREATE_ARCH_SYMLINK=y
-CONFIG_SUPPORT_LITTLE_ENDIAN=y
-CONFIG_SYS_CACHE_SHIFT_6=y
-CONFIG_64BIT=y
-CONFIG_SYS_CACHELINE_SIZE=64
-CONFIG_LINKER_LIST_ALIGN=8
-# CONFIG_ARC is not set
 CONFIG_ARM=y
-# CONFIG_M68K is not set
-# CONFIG_MICROBLAZE is not set
-# CONFIG_MIPS is not set
-# CONFIG_NIOS2 is not set
-# CONFIG_PPC is not set
-# CONFIG_RISCV is not set
-# CONFIG_SANDBOX is not set
-# CONFIG_SH is not set
-# CONFIG_X86 is not set
-# CONFIG_XTENSA is not set
-CONFIG_SYS_ARCH="arm"
-CONFIG_SYS_CPU="armv8"
-CONFIG_SYS_SOC="rk3399"
-CONFIG_SYS_VENDOR="google"
-CONFIG_SYS_BOARD="gru"
-CONFIG_SYS_CONFIG_NAME="gru"
-
-#
-# Skipping low level initialization functions
-#
 CONFIG_SKIP_LOWLEVEL_INIT=y
-# CONFIG_SPL_SKIP_LOWLEVEL_INIT is not set
-# CONFIG_TPL_SKIP_LOWLEVEL_INIT is not set
-# CONFIG_SKIP_LOWLEVEL_INIT_ONLY is not set
-# CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY is not set
-# CONFIG_SYS_ICACHE_OFF is not set
-# CONFIG_SPL_SYS_ICACHE_OFF is not set
-# CONFIG_SYS_DCACHE_OFF is not set
 CONFIG_SPL_SYS_DCACHE_OFF=y
-
-#
-# ARM architecture
-#
-CONFIG_ARM64=y
-CONFIG_ARM64_CRC32=y
 CONFIG_COUNTER_FREQUENCY=24000000
 CONFIG_POSITION_INDEPENDENT=y
-CONFIG_INIT_SP_RELATIVE=y
-CONFIG_SYS_INIT_SP_BSS_OFFSET=524288
-CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE=0x18000000
-# CONFIG_GIC_V3_ITS is not set
-# CONFIG_GICV3_SUPPORT_GIC600 is not set
-CONFIG_STATIC_RELA=y
-CONFIG_DMA_ADDR_T_64BIT=y
-CONFIG_ARM_ASM_UNIFIED=y
-# CONFIG_SYS_ARM_CACHE_CP15 is not set
-# CONFIG_SYS_ARM_MMU is not set
-# CONFIG_SYS_ARM_MPU is not set
-CONFIG_SYS_ARM_ARCH=8
-CONFIG_SYS_ARM_CACHE_WRITEBACK=y
-# CONFIG_SYS_ARM_CACHE_WRITETHROUGH is not set
-# CONFIG_SYS_ARM_CACHE_WRITEALLOC is not set
-# CONFIG_ARCH_CPU_INIT is not set
-CONFIG_SYS_ARCH_TIMER=y
-CONFIG_ARM_SMCCC=y
-# CONFIG_SYS_L2_PL310 is not set
-# CONFIG_SPL_SYS_L2_PL310 is not set
-# CONFIG_SYS_L2CACHE_OFF is not set
-CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
-# CONFIG_USE_ARCH_MEMCPY is not set
-# CONFIG_SPL_USE_ARCH_MEMCPY is not set
-# CONFIG_USE_ARCH_MEMSET is not set
-# CONFIG_SPL_USE_ARCH_MEMSET is not set
-CONFIG_ARM64_SUPPORT_AARCH32=y
-# CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_DAVINCI is not set
-# CONFIG_ARCH_HISTB is not set
-# CONFIG_ARCH_KIRKWOOD is not set
-# CONFIG_ARCH_MVEBU is not set
-# CONFIG_ARCH_ORION5X is not set
-# CONFIG_ARCH_BCM283X is not set
-# CONFIG_ARCH_BCMSTB is not set
-# CONFIG_ARCH_BCMBCA is not set
-# CONFIG_TARGET_VEXPRESS_CA9X4 is not set
-# CONFIG_TARGET_BCMNS is not set
-# CONFIG_TARGET_BCMNS3 is not set
-# CONFIG_ARCH_EXYNOS is not set
-# CONFIG_ARCH_S5PC1XX is not set
-# CONFIG_ARCH_HIGHBANK is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_IPQ40XX is not set
-# CONFIG_ARCH_KEYSTONE is not set
-# CONFIG_ARCH_K3 is not set
-# CONFIG_ARCH_OMAP2PLUS is not set
-# CONFIG_ARCH_MESON is not set
-# CONFIG_ARCH_MEDIATEK is not set
-# CONFIG_ARCH_LPC32XX is not set
-# CONFIG_ARCH_IMX8 is not set
-# CONFIG_ARCH_IMX8M is not set
-# CONFIG_ARCH_IMX8ULP is not set
-# CONFIG_ARCH_IMX9 is not set
-# CONFIG_ARCH_IMXRT is not set
-# CONFIG_ARCH_MX23 is not set
-# CONFIG_ARCH_MX28 is not set
-# CONFIG_ARCH_MX31 is not set
-# CONFIG_ARCH_MX7ULP is not set
-# CONFIG_ARCH_MX7 is not set
-# CONFIG_ARCH_MX6 is not set
-# CONFIG_ARCH_MX5 is not set
-# CONFIG_ARCH_NEXELL is not set
-# CONFIG_ARCH_NPCM is not set
-# CONFIG_ARCH_APPLE is not set
-# CONFIG_ARCH_OWL is not set
-# CONFIG_ARCH_QEMU is not set
-# CONFIG_ARCH_RENESAS is not set
-# CONFIG_ARCH_SNAPDRAGON is not set
-# CONFIG_ARCH_SOCFPGA is not set
-# CONFIG_ARCH_SUNXI is not set
-# CONFIG_ARCH_U8500 is not set
-# CONFIG_ARCH_VERSAL is not set
-# CONFIG_ARCH_VERSAL2 is not set
-# CONFIG_ARCH_VERSAL_NET is not set
-# CONFIG_ARCH_VF610 is not set
-# CONFIG_ARCH_ZYNQ is not set
-# CONFIG_ARCH_ZYNQMP_R5 is not set
-# CONFIG_ARCH_ZYNQMP is not set
-# CONFIG_ARCH_TEGRA is not set
-# CONFIG_ARCH_VEXPRESS64 is not set
-# CONFIG_TARGET_CORSTONE1000 is not set
-# CONFIG_TARGET_TOTAL_COMPUTE is not set
-# CONFIG_TARGET_LS2080A_EMU is not set
-# CONFIG_TARGET_LS1088AQDS is not set
-# CONFIG_TARGET_LS2080AQDS is not set
-# CONFIG_TARGET_LS2080ARDB is not set
-# CONFIG_TARGET_LS2081ARDB is not set
-# CONFIG_TARGET_LX2160ARDB is not set
-# CONFIG_TARGET_LX2160AQDS is not set
-# CONFIG_TARGET_LX2162AQDS is not set
-# CONFIG_TARGET_HIKEY is not set
-# CONFIG_TARGET_HIKEY960 is not set
-# CONFIG_TARGET_POPLAR is not set
-# CONFIG_TARGET_LS1012AQDS is not set
-# CONFIG_TARGET_LS1012ARDB is not set
-# CONFIG_TARGET_LS1012A2G5RDB is not set
-# CONFIG_TARGET_LS1012AFRWY is not set
-# CONFIG_TARGET_LS1012AFRDM is not set
-# CONFIG_TARGET_LS1028AQDS is not set
-# CONFIG_TARGET_LS1028ARDB is not set
-# CONFIG_TARGET_LS1088ARDB is not set
-# CONFIG_TARGET_LS1021AQDS is not set
-# CONFIG_TARGET_LS1021ATWR is not set
-# CONFIG_TARGET_PG_WCOM_SELI8 is not set
-# CONFIG_TARGET_PG_WCOM_EXPU1 is not set
-# CONFIG_TARGET_LS1021ATSN is not set
-# CONFIG_TARGET_LS1021AIOT is not set
-# CONFIG_TARGET_LS1043AQDS is not set
-# CONFIG_TARGET_LS1043ARDB is not set
-# CONFIG_TARGET_LS1046AQDS is not set
-# CONFIG_TARGET_LS1046ARDB is not set
-# CONFIG_TARGET_LS1046AFRWY is not set
-# CONFIG_ARCH_SC5XX is not set
-# CONFIG_TARGET_SL28 is not set
-# CONFIG_TARGET_TEN64 is not set
-# CONFIG_ARCH_UNIPHIER is not set
-# CONFIG_ARCH_SYNQUACER is not set
-# CONFIG_ARCH_STM32 is not set
-# CONFIG_ARCH_STI is not set
-# CONFIG_ARCH_STM32MP is not set
 CONFIG_ARCH_ROCKCHIP=y
-# CONFIG_ARCH_OCTEONTX is not set
-# CONFIG_ARCH_OCTEONTX2 is not set
-# CONFIG_TARGET_THUNDERX_88XX is not set
-# CONFIG_ARCH_ASPEED is not set
-# CONFIG_TARGET_DURIAN is not set
-# CONFIG_TARGET_POMELO is not set
-# CONFIG_TARGET_PE2201 is not set
-# CONFIG_TARGET_PRESIDIO_ASIC is not set
-# CONFIG_TARGET_XENGUEST_ARM64 is not set
-# CONFIG_ARCH_GXP is not set
-# CONFIG_STATIC_MACH_TYPE is not set
 CONFIG_TEXT_BASE=0x18000000
-CONFIG_SYS_MALLOC_LEN=0x2000000
-CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_SPL_GPIO=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
-CONFIG_SPL_LDSCRIPT="arch/arm/cpu/armv8/u-boot-spl.lds"
-CONFIG_ENV_SOURCE_FILE=""
 CONFIG_SF_DEFAULT_SPEED=20000000
-CONFIG_SF_DEFAULT_MODE=0x0
-CONFIG_ENV_SIZE=0x1f000
-CONFIG_DM_GPIO=y
-CONFIG_SPL_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-bob"
 CONFIG_SPL_TEXT_BASE=0xff8c2000
-CONFIG_OF_LIBFDT_OVERLAY=y
-CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
 CONFIG_DM_RESET=y
-CONFIG_SYS_MONITOR_LEN=0
-# CONFIG_ROCKCHIP_PX30 is not set
-# CONFIG_ROCKCHIP_RK3036 is not set
-# CONFIG_ROCKCHIP_RK3066 is not set
-# CONFIG_ROCKCHIP_RK3128 is not set
-# CONFIG_ROCKCHIP_RK3188 is not set
-# CONFIG_ROCKCHIP_RK322X is not set
-# CONFIG_ROCKCHIP_RK3288 is not set
-# CONFIG_ROCKCHIP_RK3308 is not set
-# CONFIG_ROCKCHIP_RK3328 is not set
-# CONFIG_ROCKCHIP_RK3368 is not set
 CONFIG_ROCKCHIP_RK3399=y
-# CONFIG_ROCKCHIP_RK3568 is not set
-# CONFIG_ROCKCHIP_RK3588 is not set
-# CONFIG_ROCKCHIP_RV1108 is not set
-# CONFIG_ROCKCHIP_RV1126 is not set
-# CONFIG_ROCKCHIP_USB_UART is not set
-# CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
-CONFIG_ROCKCHIP_COMMON_BOARD=y
-CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
-# CONFIG_ROCKCHIP_EXTERNAL_TPL is not set
 CONFIG_ROCKCHIP_BOOT_MODE_REG=0
-# CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON is not set
-CONFIG_ROCKCHIP_STIMER=y
-CONFIG_ROCKCHIP_STIMER_BASE=0xff8680a0
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
-# CONFIG_SPL_ROCKCHIP_EARLYRETURN_TO_BROM is not set
-CONFIG_ROCKCHIP_DISABLE_FORCE_JTAG=y
 # CONFIG_SPL_MMC is not set
-CONFIG_ROCKCHIP_SPI_IMAGE=y
-CONFIG_ROCKCHIP_COMMON_STACK_ADDR=y
-CONFIG_SPL_SERIAL=y
-CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
-CONFIG_TPL_TEXT_BASE=0xff8c2000
-CONFIG_TPL_STACK=0xff8effff
-# CONFIG_SPL_DRIVERS_MISC is not set
-CONFIG_SPL_STACK_R_ADDR=0x04000000
-CONFIG_TARGET_CHROMEBOOK_BOB=y
-# CONFIG_TARGET_CHROMEBOOK_KEVIN is not set
-# CONFIG_TARGET_EVB_RK3399 is not set
-# CONFIG_TARGET_PINEBOOK_PRO_RK3399 is not set
-# CONFIG_TARGET_PINEPHONE_PRO_RK3399 is not set
-# CONFIG_TARGET_PUMA_RK3399 is not set
-# CONFIG_TARGET_ROCK960_RK3399 is not set
-# CONFIG_TARGET_ROCKPI4_RK3399 is not set
-# CONFIG_TARGET_ROCKPRO64_RK3399 is not set
-# CONFIG_TARGET_ROC_PC_RK3399 is not set
 CONFIG_SPL_STACK=0xff8effff
-CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
 CONFIG_SPL_BSS_START_ADDR=0xff8e0000
 CONFIG_SPL_BSS_MAX_SIZE=0x10000
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
-CONFIG_SPL_SYS_MALLOC_F=y
-CONFIG_ERR_PTR_OFFSET=0x0
-CONFIG_SPL_SIZE_LIMIT=0x0
-CONFIG_SPL=y
-CONFIG_PRE_CON_BUF_ADDR=0x0f200000
-CONFIG_PRE_CON_BUF_SZ=4096
 CONFIG_DEBUG_UART_BASE=0xff1a0000
 CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART_BOARD_INIT=y
-CONFIG_IDENT_STRING=""
-CONFIG_SYS_CLK_FREQ=0
-# CONFIG_CHIP_DIP_SCAN is not set
-# CONFIG_SPL_FS_FAT is not set
-# CONFIG_SPL_LIBDISK_SUPPORT is not set
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
-# CONFIG_CMO_BY_VA_ONLY is not set
-# CONFIG_ARMV8_SPL_EXCEPTION_VECTORS is not set
-# CONFIG_ARMV8_MULTIENTRY is not set
-CONFIG_ARMV8_SET_SMPEN=y
-# CONFIG_ARMV8_SWITCH_TO_EL1 is not set
-
-#
-# ARMv8 secure monitor firmware
-#
-# CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT is not set
-# CONFIG_SPL_ARMV8_SEC_FIRMWARE_SUPPORT is not set
-# CONFIG_SPL_RECOVER_DATA_SECTION is not set
-CONFIG_PSCI_RESET=y
-# CONFIG_ARMV8_PSCI is not set
-# CONFIG_ARMV8_EA_EL3_FIRST is not set
-# CONFIG_ARMV8_UDELAY_EVENT_STREAM is not set
-CONFIG_ARMV8_CRYPTO=y
-CONFIG_ARMV8_CE_SHA1=y
-CONFIG_ARMV8_CE_SHA256=y
-# CONFIG_CMD_DEKBLOB is not set
-# CONFIG_IMX_CAAM_DEK_ENCAP is not set
-# CONFIG_IMX_OPTEE_DEK_ENCAP is not set
-# CONFIG_IMX_SECO_DEK_ENCAP is not set
-# CONFIG_IMX_ELE_DEK_ENCAP is not set
-# CONFIG_CMD_HDMIDETECT is not set
-CONFIG_IMX_DCD_ADDR=0x00910000
-CONFIG_SYS_MEM_TOP_HIDE=0x0
 CONFIG_SYS_LOAD_ADDR=0x800800
-
-#
-# ARM debug
-#
-CONFIG_SPL_PAYLOAD="u-boot.bin"
-CONFIG_BUILD_TARGET=""
-# CONFIG_PCI is not set
-CONFIG_FWU_NUM_BANKS=2
-CONFIG_FWU_NUM_IMAGES_PER_BANK=2
 CONFIG_DEBUG_UART=y
-# CONFIG_AHCI is not set
-# CONFIG_OF_BOARD_FIXUP is not set
-
-#
-# Functionality shared between NXP SoCs
-#
-# CONFIG_NXP_ESBC is not set
-CONFIG_SYS_LITTLE_ENDIAN=y
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=120200
-CONFIG_CLANG_VERSION=0
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-# CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
-# CONFIG_CC_OPTIMIZE_FOR_DEBUG is not set
-# CONFIG_OPTIMIZE_INLINING is not set
-# CONFIG_SPL_OPTIMIZE_INLINING is not set
-CONFIG_ARCH_SUPPORTS_LTO=y
-# CONFIG_LTO is not set
-CONFIG_CC_HAS_ASM_INLINE=y
-# CONFIG_XEN is not set
-CONFIG_ENV_VARS_UBOOT_CONFIG=y
-# CONFIG_SYS_BOOT_GET_CMDLINE is not set
-# CONFIG_SYS_BOOT_GET_KBD is not set
-CONFIG_SYS_MALLOC_F=y
-# CONFIG_VALGRIND is not set
-CONFIG_EXPERT=y
-CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y
-CONFIG_SPL_SYS_MALLOC_CLEAR_ON_INIT=y
-# CONFIG_SYS_MALLOC_DEFAULT_TO_INIT is not set
-# CONFIG_TOOLS_DEBUG is not set
-CONFIG_PHYS_64BIT=y
-CONFIG_FDT_64BIT=y
-CONFIG_HAS_ROM=y
-CONFIG_SPL_IMAGE="spl/u-boot-spl.bin"
 CONFIG_REMAKE_ELF=y
-# CONFIG_HAS_BOARD_SIZE_LIMIT is not set
-# CONFIG_SYS_CUSTOM_LDSCRIPT is not set
-CONFIG_PLATFORM_ELFENTRY="_start"
-CONFIG_STACK_SIZE=0x1000000
-CONFIG_SYS_SRAM_BASE=0x0
-CONFIG_SYS_SRAM_SIZE=0x0
-# CONFIG_MP is not set
-CONFIG_HAVE_TEXT_BASE=y
-# CONFIG_HAVE_SYS_UBOOT_START is not set
-CONFIG_SYS_UBOOT_START=0x18000000
-# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
-# CONFIG_API is not set
-
-#
-# Boot options
-#
-
-#
-# Boot images
-#
-# CONFIG_ANDROID_BOOT_IMAGE is not set
-# CONFIG_TIMESTAMP is not set
-CONFIG_FIT=y
-CONFIG_FIT_EXTERNAL_OFFSET=0x0
-CONFIG_FIT_FULL_CHECK=y
-# CONFIG_FIT_SIGNATURE is not set
-# CONFIG_FIT_CIPHER is not set
-# CONFIG_FIT_VERBOSE is not set
-# CONFIG_FIT_BEST_MATCH is not set
-CONFIG_FIT_PRINT=y
-CONFIG_SPL_FIT=y
-# CONFIG_SPL_FIT_PRINT is not set
-# CONFIG_SPL_FIT_FULL_CHECK is not set
 # CONFIG_SPL_FIT_SIGNATURE is not set
-CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_LOAD_FIT_ADDRESS=0x0
-# CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY is not set
-# CONFIG_SPL_LOAD_FIT_FULL is not set
-# CONFIG_SPL_FIT_IMAGE_POST_PROCESS is not set
-CONFIG_SPL_FIT_SOURCE=""
-# CONFIG_USE_SPL_FIT_GENERATOR is not set
-CONFIG_PXE_UTILS=y
-CONFIG_BOOT_DEFAULTS_FEATURES=y
-CONFIG_BOOT_DEFAULTS_CMDS=y
-CONFIG_BOOT_DEFAULTS=y
-CONFIG_BOOTSTD=y
-# CONFIG_SPL_BOOTSTD is not set
-CONFIG_BOOTSTD_FULL=y
-CONFIG_BOOTSTD_DEFAULTS=y
-CONFIG_BOOTSTD_BOOTCOMMAND=y
-CONFIG_BOOTMETH_GLOBAL=y
-# CONFIG_BOOTMETH_ANDROID is not set
-# CONFIG_BOOTMETH_CROS is not set
-CONFIG_BOOTMETH_EXTLINUX=y
-CONFIG_BOOTMETH_EXTLINUX_PXE=y
-CONFIG_BOOTMETH_EFILOADER=y
-CONFIG_BOOTMETH_EFI_BOOTMGR=y
-CONFIG_BOOTMETH_VBE=y
-CONFIG_BOOTMETH_DISTRO=y
-# CONFIG_SPL_BOOTMETH_VBE is not set
-CONFIG_BOOTMETH_VBE_REQUEST=y
-# CONFIG_SPL_BOOTMETH_VBE_REQUEST is not set
-CONFIG_BOOTMETH_VBE_SIMPLE=y
-CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
-# CONFIG_SPL_BOOTMETH_VBE_SIMPLE is not set
-CONFIG_EXPO=y
-CONFIG_BOOTMETH_SCRIPT=y
-CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
-CONFIG_SUPPORT_RAW_INITRD=y
-# CONFIG_CHROMEOS is not set
-# CONFIG_CHROMEOS_VBOOT is not set
-# CONFIG_RAMBOOT_PBL is not set
-CONFIG_SYS_BOOT_RAMDISK_HIGH=y
-# CONFIG_DISTRO_DEFAULTS is not set
-
-#
-# Boot timing
-#
-# CONFIG_BOOTSTAGE is not set
-# CONFIG_SHOW_BOOT_PROGRESS is not set
-# CONFIG_SPL_SHOW_BOOT_PROGRESS is not set
-
-#
-# Boot media
-#
-# CONFIG_NAND_BOOT is not set
-# CONFIG_ONENAND_BOOT is not set
-# CONFIG_QSPI_BOOT is not set
-# CONFIG_SATA_BOOT is not set
-# CONFIG_SD_BOOT is not set
-# CONFIG_SD_BOOT_QSPI is not set
-# CONFIG_SPI_BOOT is not set
-
-#
-# Autoboot options
-#
-CONFIG_AUTOBOOT=y
-CONFIG_BOOTDELAY=2
-# CONFIG_AUTOBOOT_KEYED is not set
-# CONFIG_AUTOBOOT_USE_MENUKEY is not set
-# CONFIG_AUTOBOOT_MENU_SHOW is not set
-# CONFIG_BOOT_RETRY is not set
-
-#
-# Image support
-#
-# CONFIG_IMAGE_PRE_LOAD is not set
-
-#
-# Devicetree fixup
-#
-# CONFIG_OF_ENV_SETUP is not set
-# CONFIG_OF_BOARD_SETUP is not set
-# CONFIG_OF_SYSTEM_SETUP is not set
-# CONFIG_OF_STDOUT_VIA_ALIAS is not set
-# CONFIG_FDT_FIXUP_PARTITIONS is not set
-# CONFIG_FDT_SIMPLEFB is not set
-CONFIG_ARCH_FIXUP_FDT_MEMORY=y
-# CONFIG_USE_BOOTARGS is not set
-# CONFIG_BOOTARGS_SUBST is not set
-CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
 CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
-CONFIG_PREBOOT_DEFINED=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
-# CONFIG_SAVE_PREV_BL_FDT_ADDR is not set
-# CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR is not set
-
-#
-# Configuration editor
-#
-# CONFIG_CEDIT is not set
-
-#
-# Console
-#
-CONFIG_MENU=y
-# CONFIG_CONSOLE_RECORD is not set
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1044
-# CONFIG_DISABLE_CONSOLE is not set
-CONFIG_LOGLEVEL=4
-CONFIG_SPL_LOGLEVEL=4
-# CONFIG_SILENT_CONSOLE is not set
-# CONFIG_SPL_SILENT_CONSOLE is not set
-# CONFIG_TPL_SILENT_CONSOLE is not set
-CONFIG_PRE_CONSOLE_BUFFER=y
-CONFIG_CONSOLE_FLUSH_SUPPORT=y
-# CONFIG_CONSOLE_FLUSH_ON_NEWLINE is not set
-CONFIG_CONSOLE_MUX=y
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
-# CONFIG_SYS_CONSOLE_ENV_OVERWRITE is not set
-# CONFIG_SYS_CONSOLE_INFO_QUIET is not set
-CONFIG_SYS_STDIO_DEREGISTER=y
-# CONFIG_SPL_SYS_STDIO_DEREGISTER is not set
-CONFIG_SYS_DEVICE_NULLDEV=y
-
-#
-# Logging
-#
-CONFIG_LOG=y
-CONFIG_LOG_MAX_LEVEL=6
-CONFIG_LOG_DEFAULT_LEVEL=6
-CONFIG_LOG_CONSOLE=y
-# CONFIG_LOGF_FILE is not set
-# CONFIG_LOGF_LINE is not set
-# CONFIG_LOGF_FUNC is not set
-CONFIG_LOGF_FUNC_PAD=20
-# CONFIG_LOG_SYSLOG is not set
-# CONFIG_SPL_LOG is not set
-# CONFIG_LOG_ERROR_RETURN is not set
-
-#
-# Init options
-#
-# CONFIG_BOARD_TYPES is not set
 # CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
-
-#
-# Start-up hooks
-#
-CONFIG_CYCLIC=y
-# CONFIG_SPL_CYCLIC is not set
-CONFIG_CYCLIC_MAX_CPU_TIME_US=5000
-CONFIG_EVENT=y
-CONFIG_EVENT_DYNAMIC=y
-# CONFIG_EVENT_DEBUG is not set
-# CONFIG_ARCH_MISC_INIT is not set
-# CONFIG_BOARD_EARLY_INIT_F is not set
 CONFIG_BOARD_EARLY_INIT_R=y
-# CONFIG_BOARD_POSTCLK_INIT is not set
-CONFIG_BOARD_LATE_INIT=y
-# CONFIG_CLOCKS is not set
-# CONFIG_HWCONFIG is not set
-CONFIG_LAST_STAGE_INIT=y
-CONFIG_MISC_INIT_R=y
-# CONFIG_SYS_MALLOC_BOOTPARAMS is not set
-# CONFIG_ID_EEPROM is not set
-# CONFIG_RESET_PHY_R is not set
-
-#
-# Security support
-#
-CONFIG_HASH=y
-CONFIG_SPL_HASH=y
-# CONFIG_STACKPROTECTOR is not set
-# CONFIG_BOARD_RNG_SEED is not set
-
-#
-# Update support
-#
-# CONFIG_UPDATE_TFTP is not set
-# CONFIG_ANDROID_AB is not set
-
-#
-# Blob list
-#
 CONFIG_BLOBLIST=y
-CONFIG_SPL_BLOBLIST=y
-CONFIG_BLOBLIST_FIXED=y
-# CONFIG_BLOBLIST_ALLOC is not set
 CONFIG_BLOBLIST_ADDR=0x100000
 CONFIG_BLOBLIST_SIZE=0x1000
-CONFIG_BLOBLIST_SIZE_RELOC=0x1000
-CONFIG_SPL_BLOBLIST_FIXED=y
-# CONFIG_SPL_BLOBLIST_ALLOC is not set
-CONFIG_SUPPORT_SPL=y
-CONFIG_SUPPORT_TPL=y
-
-#
-# SPL configuration options
-#
-CONFIG_SPL_FRAMEWORK=y
-# CONFIG_SPL_FRAMEWORK_BOARD_INIT_F is not set
 CONFIG_SPL_MAX_SIZE=0x1e000
 CONFIG_SPL_PAD_TO=0x7f8000
-# CONFIG_SPL_NO_BSS_LIMIT is not set
-CONFIG_SPL_BSS_LIMIT=y
-# CONFIG_SPL_FOOTPRINT_LIMIT is not set
-CONFIG_SPL_SYS_STACK_F_CHECK_BYTE=0xaa
-# CONFIG_SPL_SYS_REPORT_STACK_F_USAGE is not set
-# CONFIG_SPL_SHOW_ERRORS is not set
-CONFIG_SPL_BINMAN_SYMBOLS=y
-CONFIG_SPL_BINMAN_UBOOT_SYMBOLS=y
 CONFIG_HANDOFF=y
-CONFIG_SPL_HANDOFF=y
-# CONFIG_SPL_SOC_INIT is not set
-CONFIG_SPL_BOARD_INIT=y
-# CONFIG_SPL_BOOTROM_SUPPORT is not set
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
-# CONFIG_SPL_LOAD_IMX_CONTAINER is not set
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_SEPARATE_BSS=y
-# CONFIG_SPL_SYS_MALLOC is not set
-CONFIG_SPL_BANNER_PRINT=y
-# CONFIG_SPL_DISPLAY_PRINT is not set
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x0
-# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set
-# CONFIG_SPL_FIT_IMAGE_TINY is not set
-# CONFIG_SPL_CACHE is not set
-# CONFIG_SPL_CPU is not set
-# CONFIG_SPL_CRYPTO is not set
-# CONFIG_SPL_DMA is not set
-# CONFIG_SPL_ENV_SUPPORT is not set
-# CONFIG_SPL_FS_EXT4 is not set
-# CONFIG_SPL_FS_SQUASHFS is not set
-# CONFIG_SPL_FAT_WRITE is not set
-# CONFIG_SPL_FPGA is not set
-# CONFIG_SPL_I2C is not set
-# CONFIG_SPL_DM_MAILBOX is not set
-# CONFIG_SPL_MEMORY is not set
-# CONFIG_SPL_MPC8XXX_INIT_DDR is not set
-# CONFIG_SPL_MTD is not set
-# CONFIG_SPL_MUSB_NEW is not set
-# CONFIG_SPL_NAND_SUPPORT is not set
-# CONFIG_SPL_NAND_DRIVERS is not set
-# CONFIG_SPL_NAND_ECC is not set
-# CONFIG_SPL_NAND_SIMPLE is not set
-# CONFIG_SPL_UBI is not set
-CONFIG_SPL_DM_SPI_FLASH=y
-# CONFIG_SPL_NET is not set
-# CONFIG_SPL_NOR_SUPPORT is not set
-# CONFIG_SPL_XIP_SUPPORT is not set
-# CONFIG_SPL_ONENAND_SUPPORT is not set
-# CONFIG_SPL_OS_BOOT is not set
-# CONFIG_SPL_PCI is not set
-# CONFIG_SPL_PCH is not set
-# CONFIG_SPL_POST_MEM_SUPPORT is not set
-# CONFIG_SPL_DM_RESET is not set
-# CONFIG_SPL_POWER is not set
-# CONFIG_SPL_POWER_DOMAIN is not set
-# CONFIG_SPL_RAM_SUPPORT is not set
-# CONFIG_SPL_REMOTEPROC is not set
-# CONFIG_SPL_RTC is not set
-# CONFIG_SPL_SATA is not set
-# CONFIG_SPL_NVME is not set
-CONFIG_SPL_SPI_FLASH_TINY=y
-# CONFIG_SPL_SPI_FLASH_MTD is not set
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
-# CONFIG_SPL_THERMAL is not set
-# CONFIG_SPL_WATCHDOG is not set
-# CONFIG_SPL_YMODEM_SUPPORT is not set
-CONFIG_SPL_ATF=y
-# CONFIG_SPL_ATF_LOAD_IMAGE_V2 is not set
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
-# CONFIG_SPL_OPTEE_IMAGE is not set
-CONFIG_SPL_TARGET=""
-# CONFIG_TPL is not set
-# CONFIG_VPL is not set
-CONFIG_CMDLINE=y
-CONFIG_HUSH_PARSER=y
-
-#
-# Hush flavor to use
-#
-CONFIG_HUSH_OLD_PARSER=y
-# CONFIG_HUSH_MODERN_PARSER is not set
-CONFIG_CMDLINE_EDITING=y
-# CONFIG_CMDLINE_PS_SUPPORT is not set
-CONFIG_AUTO_COMPLETE=y
-CONFIG_SYS_LONGHELP=y
-CONFIG_SYS_PROMPT="=> "
-CONFIG_SYS_PROMPT_HUSH_PS2="> "
-CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_XTRACE=y
-
-#
-# Commands
-#
-
-#
-# Info commands
-#
-CONFIG_CMD_BDI=y
-# CONFIG_CMD_BDINFO_EXTRA is not set
-# CONFIG_CMD_CONFIG is not set
-CONFIG_CMD_CONSOLE=y
-# CONFIG_CMD_HISTORY is not set
-# CONFIG_CMD_LICENSE is not set
-# CONFIG_CMD_PMC is not set
-# CONFIG_CMD_SMBIOS is not set
-
-#
-# Boot commands
-#
-CONFIG_CMD_BOOTD=y
-CONFIG_CMD_BOOTM=y
-CONFIG_CMD_BOOTDEV=y
-CONFIG_CMD_BOOTFLOW=y
-CONFIG_CMD_BOOTFLOW_FULL=y
-CONFIG_CMD_BOOTFLOW_BOOTDELAY=8
-CONFIG_CMD_BOOTMETH=y
-CONFIG_BOOTM_EFI=y
-CONFIG_BOOTM_ELF=y
 CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_BOOTI=y
-CONFIG_BOOTM_LINUX=y
-CONFIG_BOOTM_NETBSD=y
-# CONFIG_BOOTM_OPENRTOS is not set
-# CONFIG_BOOTM_OSE is not set
-CONFIG_BOOTM_PLAN9=y
-CONFIG_BOOTM_RTEMS=y
-CONFIG_CMD_VBE=y
-CONFIG_BOOTM_VXWORKS=y
-CONFIG_CMD_BOOTEFI=y
-CONFIG_CMD_BOOTEFI_BINARY=y
-CONFIG_CMD_BOOTEFI_BOOTMGR=y
-CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
-CONFIG_CMD_BOOTEFI_HELLO=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 CONFIG_CMD_BOOTMENU=y
-# CONFIG_CMD_ADTIMG is not set
-CONFIG_CMD_ELF=y
-# CONFIG_CMD_ELF_FDT_SETUP is not set
-CONFIG_CMD_FDT=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_RUN=y
-CONFIG_CMD_IMI=y
-CONFIG_CMD_XIMG=y
-CONFIG_SYS_XIMG_LEN=0x800000
-# CONFIG_CMD_SPL is not set
-
-#
-# Environment commands
-#
-# CONFIG_CMD_ASKENV is not set
-CONFIG_CMD_EXPORTENV=y
-CONFIG_CMD_IMPORTENV=y
-CONFIG_CMD_EDITENV=y
-# CONFIG_CMD_GREPENV is not set
-CONFIG_CMD_SAVEENV=y
-# CONFIG_CMD_ERASEENV is not set
-CONFIG_CMD_ENV_EXISTS=y
-# CONFIG_CMD_ENV_CALLBACK is not set
-# CONFIG_CMD_ENV_FLAGS is not set
 CONFIG_CMD_NVEDIT_EFI=y
-# CONFIG_CMD_NVEDIT_INDIRECT is not set
-# CONFIG_CMD_NVEDIT_INFO is not set
-# CONFIG_CMD_NVEDIT_LOAD is not set
-# CONFIG_CMD_NVEDIT_SELECT is not set
-
-#
-# Memory commands
-#
-# CONFIG_CMD_BINOP is not set
-CONFIG_CMD_BLOBLIST=y
-CONFIG_CMD_CRC32=y
-# CONFIG_CRC32_VERIFY is not set
-# CONFIG_CMD_EEPROM is not set
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=0
-# CONFIG_LOOPW is not set
-# CONFIG_CMD_MD5SUM is not set
-# CONFIG_CMD_MEMINFO is not set
-CONFIG_CMD_MEMORY=y
-# CONFIG_CMD_MEM_SEARCH is not set
-# CONFIG_CMD_MX_CYCLIC is not set
-CONFIG_CMD_RANDOM=y
-# CONFIG_CMD_MEMTEST is not set
-# CONFIG_CMD_SHA1SUM is not set
-# CONFIG_CMD_STRINGS is not set
-
-#
-# Compression commands
-#
-CONFIG_CMD_LZMADEC=y
-CONFIG_CMD_UNLZ4=y
-CONFIG_CMD_UNZIP=y
-# CONFIG_CMD_ZIP is not set
-
-#
-# Device access commands
-#
-# CONFIG_CMD_ADC is not set
-# CONFIG_CMD_BCB is not set
-# CONFIG_CMD_BIND is not set
-# CONFIG_CMD_CLK is not set
-# CONFIG_CMD_DEMO is not set
-# CONFIG_CMD_DFU is not set
-CONFIG_CMD_DM=y
-# CONFIG_CMD_FUSE is not set
 CONFIG_CMD_GPIO=y
-# CONFIG_CMD_GPIO_READ is not set
-# CONFIG_CMD_PWM is not set
 CONFIG_CMD_GPT=y
-# CONFIG_CMD_GPT_RENAME is not set
-# CONFIG_CMD_IDE is not set
-# CONFIG_CMD_IO is not set
-# CONFIG_CMD_IOTRACE is not set
 CONFIG_CMD_I2C=y
-CONFIG_CMD_LOADB=y
-# CONFIG_CMD_LOADM is not set
-CONFIG_CMD_LOADS=y
-# CONFIG_LOADS_ECHO is not set
-# CONFIG_CMD_SAVES is not set
-# CONFIG_SYS_LOADS_BAUD_CHANGE is not set
-CONFIG_CMD_LOADXY_TIMEOUT=90
-# CONFIG_CMD_LSBLK is not set
-# CONFIG_CMD_MBR is not set
-# CONFIG_CMD_MISC is not set
 CONFIG_CMD_MMC=y
-# CONFIG_CMD_BKOPS_ENABLE is not set
-# CONFIG_CMD_MMC_REG is not set
-# CONFIG_CMD_MMC_SWRITE is not set
-# CONFIG_CMD_CLONE is not set
-# CONFIG_CMD_MTD is not set
-# CONFIG_CMD_ONENAND is not set
-# CONFIG_CMD_OSD is not set
-CONFIG_CMD_PART=y
-# CONFIG_CMD_PCI is not set
-CONFIG_CMD_PINMUX=y
-CONFIG_CMD_POWEROFF=y
-# CONFIG_CMD_READ is not set
-# CONFIG_CMD_SATA is not set
-# CONFIG_CMD_SDRAM is not set
-CONFIG_CMD_SF=y
 CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SPI=y
-CONFIG_DEFAULT_SPI_BUS=0
-CONFIG_DEFAULT_SPI_MODE=0x0
 CONFIG_CMD_USB=y
-# CONFIG_CMD_USB_SDP is not set
-# CONFIG_CMD_RKMTD is not set
-# CONFIG_CMD_WRITE is not set
-
-#
-# Shell scripting commands
-#
-# CONFIG_CMD_CAT is not set
-CONFIG_CMD_ECHO=y
-CONFIG_CMD_ITEST=y
-CONFIG_CMD_SOURCE=y
 # CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_XXD is not set
-
-#
-# Android support commands
-#
-CONFIG_CMD_NET=y
-CONFIG_CMD_BOOTP=y
-CONFIG_CMD_DHCP=y
-# CONFIG_BOOTP_MAY_FAIL is not set
-CONFIG_BOOTP_BOOTPATH=y
-# CONFIG_BOOTP_VENDOREX is not set
-# CONFIG_BOOTP_BOOTFILESIZE is not set
-CONFIG_BOOTP_DNS=y
-# CONFIG_BOOTP_DNS2 is not set
-CONFIG_BOOTP_GATEWAY=y
-CONFIG_BOOTP_HOSTNAME=y
-# CONFIG_BOOTP_PREFER_SERVERIP is not set
-CONFIG_BOOTP_SUBNETMASK=y
-# CONFIG_BOOTP_NISDOMAIN is not set
-# CONFIG_BOOTP_NTPSERVER is not set
-# CONFIG_CMD_PCAP is not set
-CONFIG_BOOTP_PXE=y
-CONFIG_BOOTP_PXE_CLIENTARCH=0x16
-# CONFIG_BOOTP_PXE_DHCP_OPTION is not set
-CONFIG_BOOTP_VCI_STRING="U-Boot.armv8"
-CONFIG_CMD_TFTPBOOT=y
-# CONFIG_CMD_TFTPPUT is not set
-# CONFIG_CMD_TFTPSRV is not set
-CONFIG_NET_TFTP_VARS=y
-# CONFIG_CMD_RARP is not set
-# CONFIG_CMD_NFS is not set
-# CONFIG_SYS_DISABLE_AUTOLOAD is not set
-# CONFIG_CMD_WGET is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_MDIO=y
-CONFIG_CMD_PING=y
-# CONFIG_CMD_CDP is not set
-# CONFIG_CMD_SNTP is not set
-# CONFIG_CMD_DNS is not set
-# CONFIG_CMD_LINK_LOCAL is not set
-# CONFIG_CMD_ETHSW is not set
-CONFIG_CMD_PXE=y
-# CONFIG_CMD_WOL is not set
-
-#
-# Misc commands
-#
-# CONFIG_CMD_2048 is not set
-# CONFIG_CMD_BMP is not set
-# CONFIG_CMD_BSP is not set
-CONFIG_CMD_BLOCK_CACHE=y
-# CONFIG_CMD_CACHE is not set
-# CONFIG_CMD_CONITRACE is not set
-CONFIG_CMD_CLS=y
 CONFIG_CMD_EFIDEBUG=y
-CONFIG_CMD_EFICONFIG=y
-# CONFIG_CMD_EXCEPTION is not set
-# CONFIG_CMD_INI is not set
-# CONFIG_CMD_DATE is not set
 CONFIG_CMD_TIME=y
-# CONFIG_CMD_GETTIME is not set
-# CONFIG_CMD_PAUSE is not set
-# CONFIG_CMD_RNG is not set
-# CONFIG_CMD_KASLRSEED is not set
-CONFIG_CMD_SLEEP=y
-# CONFIG_CMD_TIMER is not set
-# CONFIG_CMD_SYSBOOT is not set
-# CONFIG_CMD_QFW is not set
-# CONFIG_CMD_PSTORE is not set
-# CONFIG_CMD_TERMINAL is not set
-# CONFIG_CMD_UUID is not set
-CONFIG_CMD_VIDCONSOLE=y
-# CONFIG_CMD_SELECT_FONT is not set
-
-#
-# TI specific command line interface
-#
-
-#
-# Power commands
-#
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
-
-#
-# Security commands
-#
-# CONFIG_CMD_AES is not set
-# CONFIG_CMD_BLOB is not set
-# CONFIG_CMD_HASH is not set
-# CONFIG_CMD_HVC is not set
-# CONFIG_CMD_SMC is not set
-
-#
-# Firmware commands
-#
-CONFIG_CMD_CROS_EC=y
-
-#
-# Filesystem commands
-#
-# CONFIG_CMD_BTRFS is not set
-# CONFIG_CMD_EROFS is not set
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-# CONFIG_CMD_EXT4_WRITE is not set
-CONFIG_CMD_FAT=y
-# CONFIG_CMD_SQUASHFS is not set
-CONFIG_CMD_FS_GENERIC=y
-# CONFIG_CMD_FS_UUID is not set
-# CONFIG_CMD_JFFS2 is not set
-# CONFIG_CMD_MTDPARTS is not set
-CONFIG_MTDIDS_DEFAULT=""
-CONFIG_MTDPARTS_DEFAULT=""
-# CONFIG_CMD_ZFS is not set
-
-#
-# Debug commands
-#
-CONFIG_CMD_CYCLIC=y
-# CONFIG_CMD_DIAG is not set
-# CONFIG_CMD_EVENT is not set
 CONFIG_CMD_LOG=y
-# CONFIG_CMD_UBI is not set
 CONFIG_MMC_SPEED_MODE_SET=y
-
-#
-# Partition Types
-#
-CONFIG_PARTITIONS=y
-CONFIG_SPL_PARTITIONS=y
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_SPL_MAC_PARTITION is not set
-CONFIG_DOS_PARTITION=y
-CONFIG_SPL_DOS_PARTITION=y
-CONFIG_ISO_PARTITION=y
-# CONFIG_SPL_ISO_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_SPL_AMIGA_PARTITION is not set
-CONFIG_EFI_PARTITION=y
-CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=128
-CONFIG_EFI_PARTITION_ENTRIES_OFF=0
-CONFIG_SPL_EFI_PARTITION=y
-CONFIG_PARTITION_UUIDS=y
-CONFIG_SPL_PARTITION_UUIDS=y
-CONFIG_PARTITION_TYPE_GUID=y
-# CONFIG_SPL_PARTITION_TYPE_GUID is not set
-CONFIG_SUPPORT_OF_CONTROL=y
-CONFIG_PYLIBFDT=y
-CONFIG_DTOC=y
-CONFIG_BINMAN=y
-
-#
-# Device Tree Control
-#
-CONFIG_OF_CONTROL=y
-CONFIG_OF_REAL=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_LIVE=y
-CONFIG_OF_UPSTREAM=y
-# CONFIG_OF_UPSTREAM_BUILD_VENDOR is not set
-CONFIG_OF_SEPARATE=y
-# CONFIG_OF_EMBED is not set
-# CONFIG_OF_INITIAL_DTB_READONLY is not set
-# CONFIG_OF_BOARD is not set
-# CONFIG_OF_OMIT_DTB is not set
-CONFIG_DEVICE_TREE_INCLUDES=""
-CONFIG_OF_LIST="rockchip/rk3399-gru-bob"
-# CONFIG_MULTI_DTB_FIT is not set
-# CONFIG_SPL_MULTI_DTB_FIT is not set
-CONFIG_SPL_OF_LIST="rockchip/rk3399-gru-bob"
-CONFIG_OF_TAG_MIGRATE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-# CONFIG_OF_DTB_PROPS_REMOVE is not set
-# CONFIG_SPL_OF_PLATDATA is not set
-CONFIG_SPL_OF_REAL=y
-
-#
-# Environment
-#
-CONFIG_ENV_SUPPORT=y
-CONFIG_SAVEENV=y
-# CONFIG_ENV_OVERWRITE is not set
-# CONFIG_OVERWRITE_ETHADDR_ONCE is not set
-CONFIG_ENV_MIN_ENTRIES=64
-CONFIG_ENV_MAX_ENTRIES=512
-CONFIG_ENV_IS_DEFAULT=y
-CONFIG_ENV_IS_NOWHERE=y
-# CONFIG_ENV_IS_IN_EEPROM is not set
-# CONFIG_ENV_IS_IN_FAT is not set
-# CONFIG_ENV_IS_IN_EXT4 is not set
-# CONFIG_ENV_IS_IN_FLASH is not set
-# CONFIG_ENV_IS_IN_MMC is not set
-# CONFIG_ENV_IS_IN_NAND is not set
-# CONFIG_ENV_IS_IN_NVRAM is not set
-# CONFIG_ENV_IS_IN_REMOTE is not set
-# CONFIG_ENV_IS_IN_SPI_FLASH is not set
-# CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-# CONFIG_USE_DEFAULT_ENV_FILE is not set
-# CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set
-# CONFIG_ENV_IMPORT_FDT is not set
-# CONFIG_ENV_APPEND is not set
-# CONFIG_ENV_WRITEABLE_LIST is not set
-# CONFIG_ENV_ACCESS_IGNORE_FORCE is not set
-# CONFIG_USE_BOOTFILE is not set
-# CONFIG_USE_ETHPRIME is not set
-# CONFIG_USE_HOSTNAME is not set
-# CONFIG_VERSION_VARIABLE is not set
-CONFIG_NET=y
-CONFIG_ARP_TIMEOUT=5000
-CONFIG_NET_RETRY_COUNT=5
-# CONFIG_PROT_UDP is not set
-CONFIG_BOOTDEV_ETH=y
-# CONFIG_BOOTP_SEND_HOSTNAME is not set
-# CONFIG_NET_RANDOM_ETHADDR is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_IP_DEFRAG is not set
-# CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set
-CONFIG_TFTP_BLOCKSIZE=1468
-# CONFIG_TFTP_PORT is not set
-CONFIG_TFTP_WINDOWSIZE=1
-# CONFIG_TFTP_TSIZE is not set
-# CONFIG_SERVERIP_FROM_PROXYDHCP is not set
-CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS=100
-# CONFIG_KEEP_SERVERADDR is not set
-# CONFIG_UDP_CHECKSUM is not set
-# CONFIG_BOOTP_SERVERIP is not set
-CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64
-# CONFIG_USE_GATEWAYIP is not set
-# CONFIG_USE_IPADDR is not set
-# CONFIG_USE_NETMASK is not set
-# CONFIG_USE_ROOTPATH is not set
-# CONFIG_USE_SERVERIP is not set
-# CONFIG_PROT_TCP is not set
-# CONFIG_IPV6 is not set
-CONFIG_SYS_RX_ETH_BUFFER=4
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_DM=y
-CONFIG_SPL_DM=y
-# CONFIG_DM_WARN is not set
-# CONFIG_SPL_DM_WARN is not set
-# CONFIG_DM_DEBUG is not set
-# CONFIG_DM_STATS is not set
-# CONFIG_SPL_DM_STATS is not set
-CONFIG_DM_DEVICE_REMOVE=y
-CONFIG_DM_EVENT=y
-# CONFIG_SPL_DM_DEVICE_REMOVE is not set
-CONFIG_DM_STDIO=y
-CONFIG_DM_SEQ_ALIAS=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_SPL_DM_INLINE_OFNODE=y
-# CONFIG_DM_DMA is not set
-CONFIG_REGMAP=y
-CONFIG_SPL_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_SPL_SYSCON=y
-# CONFIG_DEVRES is not set
-CONFIG_SIMPLE_BUS=y
-CONFIG_SPL_SIMPLE_BUS=y
-# CONFIG_SIMPLE_BUS_CORRECT_RANGE is not set
-CONFIG_OF_TRANSLATE=y
-# CONFIG_SPL_OF_TRANSLATE is not set
-# CONFIG_TRANSLATION_OFFSET is not set
-CONFIG_OFNODE_MULTI_TREE=y
-CONFIG_OFNODE_MULTI_TREE_MAX=4
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_ADC=y
-# CONFIG_SPL_ADC is not set
-# CONFIG_ADC_EXYNOS is not set
-# CONFIG_ADC_SANDBOX is not set
-# CONFIG_SARADC_MESON is not set
-CONFIG_SARADC_ROCKCHIP=y
-# CONFIG_ADC_IMX93 is not set
-# CONFIG_SATA is not set
-# CONFIG_SCSI_AHCI is not set
-
-#
-# SATA/SCSI device support
-#
-# CONFIG_AXI is not set
-
-#
-# Bus devices
-#
-CONFIG_BLK=y
-CONFIG_SPL_BLK=y
-CONFIG_BLOCK_CACHE=y
-# CONFIG_BLKMAP is not set
-# CONFIG_SPL_BLOCK_CACHE is not set
-# CONFIG_EFI_MEDIA is not set
-# CONFIG_SPL_BLK_FS is not set
-# CONFIG_IDE is not set
-# CONFIG_LBA48 is not set
-# CONFIG_SYS_64BIT_LBA is not set
-# CONFIG_RKMTD is not set
-# CONFIG_BOOTCOUNT_LIMIT is not set
-
-#
-# Button Support
-#
-# CONFIG_BUTTON is not set
-
-#
-# Cache Controller drivers
-#
-# CONFIG_CACHE is not set
-# CONFIG_L2X0_CACHE is not set
-# CONFIG_ANDES_L2_CACHE is not set
-# CONFIG_NCORE_CACHE is not set
-# CONFIG_SIFIVE_CCACHE is not set
-# CONFIG_SIFIVE_PL2 is not set
-
-#
-# Clock
-#
-CONFIG_CLK=y
-CONFIG_SPL_CLK=y
-# CONFIG_SPL_CLK_CCF is not set
-# CONFIG_CLK_CCF is not set
-# CONFIG_CLK_GPIO is not set
-# CONFIG_SPL_CLK_GPIO is not set
-# CONFIG_CLK_CDCE9XX is not set
-# CONFIG_CLK_ICS8N3QV01 is not set
-# CONFIG_CLK_K210 is not set
-# CONFIG_CLK_MPC83XX is not set
-# CONFIG_CLK_XLNX_CLKWZRD is not set
-# CONFIG_COMMON_CLK_ADI_SHARED is not set
-# CONFIG_CLK_AT91 is not set
-# CONFIG_CLK_RCAR is not set
-# CONFIG_CLK_RCAR_CPG_LIB is not set
-# CONFIG_CLK_SIFIVE is not set
-# CONFIG_CLK_TI_AM3_DPLL is not set
-# CONFIG_CLK_TI_CTRL is not set
-# CONFIG_CLK_TI_GATE is not set
-# CONFIG_CLK_K3 is not set
-# CONFIG_SPL_CLK_K3 is not set
-# CONFIG_CPU is not set
-
-#
-# Hardware crypto devices
-#
-# CONFIG_DM_HASH is not set
-# CONFIG_FSL_CAAM is not set
-CONFIG_CAAM_64BIT=y
-# CONFIG_SYS_FSL_SEC_BE is not set
-# CONFIG_SYS_FSL_SEC_LE is not set
-# CONFIG_FSL_DCP_RNG is not set
-# CONFIG_NPCM_AES is not set
-# CONFIG_NPCM_SHA is not set
-# CONFIG_DDR_SPD is not set
-# CONFIG_IMX_SNPS_DDR_PHY is not set
-
-#
-# Demo for driver model
-#
-# CONFIG_DM_DEMO is not set
-
-#
-# DFU support
-#
-
-#
-# DMA Support
-#
-# CONFIG_DMA is not set
-# CONFIG_DMA_LPC32XX is not set
-# CONFIG_TI_EDMA3 is not set
-# CONFIG_DMA_LEGACY is not set
-
-#
-# Extcon Support
-#
-# CONFIG_EXTCON is not set
-
-#
-# Fastboot support
-#
-# CONFIG_UDP_FUNCTION_FASTBOOT is not set
-# CONFIG_TCP_FUNCTION_FASTBOOT is not set
-CONFIG_FIRMWARE=y
-# CONFIG_SPL_FIRMWARE is not set
-CONFIG_ARM_PSCI_FW=y
-# CONFIG_ZYNQMP_FIRMWARE is not set
-# CONFIG_ARM_SMCCC_FEATURES is not set
-# CONFIG_ARM_FFA_TRANSPORT is not set
-# CONFIG_SCMI_FIRMWARE is not set
-# CONFIG_DM_FUZZING_ENGINE is not set
-
-#
-# FPGA support
-#
-# CONFIG_FPGA_ALTERA is not set
-# CONFIG_FPGA_SOCFPGA is not set
-# CONFIG_FPGA_LATTICE is not set
-# CONFIG_FPGA_XILINX is not set
-# CONFIG_DM_FPGA is not set
-# CONFIG_FWU_MDATA is not set
-CONFIG_GPIO=y
-CONFIG_SPL_DM_GPIO=y
-# CONFIG_GPIO_HOG is not set
-# CONFIG_SPL_GPIO_HOG is not set
-# CONFIG_DM_GPIO_LOOKUP_LABEL is not set
-# CONFIG_SPL_DM_GPIO_LOOKUP_LABEL is not set
-# CONFIG_ALTERA_PIO is not set
-# CONFIG_BCM2835_GPIO is not set
-# CONFIG_DWAPB_GPIO is not set
-# CONFIG_AT91_GPIO is not set
-# CONFIG_ATMEL_PIO4 is not set
-# CONFIG_ASPEED_GPIO is not set
-# CONFIG_DA8XX_GPIO is not set
-# CONFIG_FXL6408_GPIO is not set
-# CONFIG_HIKEY_GPIO is not set
-# CONFIG_INTEL_BROADWELL_GPIO is not set
-# CONFIG_INTEL_GPIO is not set
-# CONFIG_INTEL_ICH6_GPIO is not set
-# CONFIG_IMX_RGPIO2P is not set
-# CONFIG_IPROC_GPIO is not set
-# CONFIG_HSDK_CREG_GPIO is not set
-# CONFIG_KIRKWOOD_GPIO is not set
-# CONFIG_LPC32XX_GPIO is not set
-# CONFIG_MAX7320_GPIO is not set
-# CONFIG_MCP230XX_GPIO is not set
-# CONFIG_MSM_GPIO is not set
-# CONFIG_MXC_GPIO is not set
-# CONFIG_MXS_GPIO is not set
-# CONFIG_NPCM_GPIO is not set
-# CONFIG_CMD_PCA953X is not set
-# CONFIG_PCF8575_GPIO is not set
 CONFIG_ROCKCHIP_GPIO=y
-# CONFIG_XILINX_GPIO is not set
-# CONFIG_TCA642X is not set
-# CONFIG_TEGRA_GPIO is not set
-# CONFIG_TEGRA186_GPIO is not set
-# CONFIG_VYBRID_GPIO is not set
-# CONFIG_SIFIVE_GPIO is not set
-# CONFIG_ZYNQ_GPIO is not set
-# CONFIG_DM_74X164 is not set
-# CONFIG_DM_PCA953X is not set
-# CONFIG_SPL_DM_PCA953X is not set
-# CONFIG_PCA953X is not set
-# CONFIG_MPC8XXX_GPIO is not set
-# CONFIG_MPC8XX_GPIO is not set
-# CONFIG_NX_GPIO is not set
-# CONFIG_NOMADIK_GPIO is not set
-# CONFIG_SLG7XL45106_I2C_GPO is not set
-# CONFIG_FTGPIO010 is not set
-# CONFIG_ADP5585_GPIO is not set
-
-#
-# Hardware Spinlock Support
-#
-# CONFIG_DM_HWSPINLOCK is not set
-CONFIG_I2C=y
-CONFIG_DM_I2C=y
-CONFIG_SPL_DM_I2C=y
 CONFIG_I2C_CROS_EC_TUNNEL=y
-# CONFIG_I2C_CROS_EC_LDO is not set
-# CONFIG_I2C_SET_DEFAULT_BUS_NUM is not set
-# CONFIG_DM_I2C_GPIO is not set
-# CONFIG_SYS_I2C_IPROC is not set
-# CONFIG_SYS_I2C_FSL is not set
-# CONFIG_SYS_I2C_CADENCE is not set
-# CONFIG_SYS_I2C_DW is not set
-# CONFIG_SYS_I2C_INTEL is not set
-# CONFIG_SYS_I2C_IMX_LPI2C is not set
-# CONFIG_SYS_I2C_MTK is not set
-# CONFIG_SYS_I2C_MICROCHIP is not set
-# CONFIG_SYS_I2C_MXC is not set
-# CONFIG_SYS_I2C_NEXELL is not set
-# CONFIG_SYS_I2C_NPCM is not set
-# CONFIG_SYS_I2C_OCORES is not set
 CONFIG_SYS_I2C_ROCKCHIP=y
-# CONFIG_SYS_I2C_SOFT is not set
-# CONFIG_SYS_I2C_S3C24X0 is not set
-# CONFIG_SYS_I2C_MV is not set
-# CONFIG_SYS_I2C_MVTWSI is not set
-# CONFIG_SYS_I2C_XILINX_XIIC is not set
-# CONFIG_SYS_I2C_IHS is not set
 CONFIG_I2C_MUX=y
-# CONFIG_SPL_I2C_MUX is not set
-# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set
-# CONFIG_I2C_MUX_PCA954x is not set
-# CONFIG_I2C_MUX_GPIO is not set
-CONFIG_INPUT=y
-# CONFIG_SPL_INPUT is not set
-CONFIG_DM_KEYBOARD=y
-# CONFIG_SPL_DM_KEYBOARD is not set
-# CONFIG_APPLE_SPI_KEYB is not set
-# CONFIG_BUTTON_KEYBOARD is not set
 CONFIG_CROS_EC_KEYB=y
-# CONFIG_I8042_KEYB is not set
-# CONFIG_TEGRA_KEYBOARD is not set
-# CONFIG_TWL4030_INPUT is not set
-
-#
-# IOMMU device drivers
-#
-# CONFIG_IOMMU is not set
-
-#
-# LED Support
-#
-# CONFIG_LED is not set
-# CONFIG_SPL_LED is not set
-# CONFIG_LED_STATUS is not set
-
-#
-# Mailbox Controller Support
-#
-# CONFIG_DM_MAILBOX is not set
-
-#
-# Memory Controller drivers
-#
-# CONFIG_MEMORY is not set
-# CONFIG_ATMEL_EBI is not set
-# CONFIG_MFD_ATMEL_SMC is not set
-
-#
-# Multifunction device drivers
-#
-CONFIG_MISC=y
-CONFIG_SPL_MISC=y
-# CONFIG_NVMEM is not set
-# CONFIG_SPL_NVMEM is not set
-# CONFIG_ALTERA_SYSID is not set
-# CONFIG_ATSHA204A is not set
-# CONFIG_GATEWORKS_SC is not set
-CONFIG_ROCKCHIP_EFUSE=y
-# CONFIG_ROCKCHIP_OTP is not set
 CONFIG_ROCKCHIP_IODOMAIN=y
-# CONFIG_SIFIVE_OTP is not set
-# CONFIG_SMSC_LPC47M is not set
-# CONFIG_SMSC_SIO1007 is not set
-# CONFIG_VEXPRESS_CONFIG is not set
 CONFIG_CROS_EC=y
-# CONFIG_SPL_CROS_EC is not set
-# CONFIG_CROS_EC_I2C is not set
-# CONFIG_CROS_EC_LPC is not set
-# CONFIG_SPL_CROS_EC_LPC is not set
 CONFIG_CROS_EC_SPI=y
-# CONFIG_DS4510 is not set
-# CONFIG_FSL_SEC_MON is not set
-# CONFIG_IRQ is not set
-# CONFIG_NPCM_HOST is not set
-# CONFIG_NUVOTON_NCT6102D is not set
 CONFIG_PWRSEQ=y
-# CONFIG_SPL_PWRSEQ is not set
-# CONFIG_PCA9551_LED is not set
-# CONFIG_TEST_DRV is not set
-# CONFIG_TURRIS_OMNIA_MCU is not set
-# CONFIG_USB_HUB_USB251XB is not set
-# CONFIG_TWL4030_LED is not set
-# CONFIG_WINBOND_W83627 is not set
-# CONFIG_I2C_EEPROM is not set
-# CONFIG_SPL_I2C_EEPROM is not set
-# CONFIG_GDSYS_RXAUI_CTRL is not set
-# CONFIG_GDSYS_IOEP is not set
-# CONFIG_MPC83XX_SERDES is not set
-# CONFIG_FS_LOADER is not set
-# CONFIG_SPL_FS_LOADER is not set
-# CONFIG_GDSYS_SOC is not set
-# CONFIG_IHS_FPGA is not set
-# CONFIG_MICROCHIP_FLEXCOM is not set
-# CONFIG_ESM_PMIC is not set
-# CONFIG_SL28CPLD is not set
-# CONFIG_SPL_SOCFPGA_DT_REG is not set
-
-#
-# MMC Host controller Support
-#
-CONFIG_MMC=y
-CONFIG_MMC_WRITE=y
 CONFIG_MMC_PWRSEQ=y
-# CONFIG_MMC_BROKEN_CD is not set
-CONFIG_DM_MMC=y
-CONFIG_SPL_DM_MMC=y
-# CONFIG_MMC_SPI is not set
-# CONFIG_ARM_PL180_MMCI is not set
-CONFIG_MMC_QUIRKS=y
-CONFIG_SYS_MMC_MAX_BLK_COUNT=65535
-CONFIG_MMC_HW_PARTITIONING=y
-# CONFIG_SUPPORT_EMMC_RPMB is not set
-# CONFIG_SUPPORT_EMMC_BOOT is not set
 CONFIG_MMC_IO_VOLTAGE=y
-CONFIG_MMC_SUPPORTS_TUNING=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_MMC_HS200_SUPPORT=y
-CONFIG_MMC_VERBOSE=y
-# CONFIG_MMC_TRACE is not set
 CONFIG_MMC_DW=y
-# CONFIG_MMC_DW_CORTINA is not set
-# CONFIG_MMC_DW_K3 is not set
 CONFIG_MMC_DW_ROCKCHIP=y
-# CONFIG_MMC_DW_SNPS is not set
-# CONFIG_MMC_MXC is not set
-# CONFIG_MMC_PCI is not set
-# CONFIG_MMC_OMAP_HS is not set
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
-# CONFIG_MMC_SDHCI_ADMA is not set
-# CONFIG_MMC_SDHCI_ADMA_FORCE_32BIT is not set
-CONFIG_MMC_SDHCI_ADMA_64BIT=y
-# CONFIG_MMC_SDHCI_BCMSTB is not set
-# CONFIG_MMC_SDHCI_CADENCE is not set
-# CONFIG_MMC_SDHCI_CV1800B is not set
-# CONFIG_MMC_SDHCI_IPROC is not set
-# CONFIG_MMC_SDHCI_F_SDH30 is not set
-# CONFIG_MMC_SDHCI_KONA is not set
-# CONFIG_MMC_SDHCI_MSM is not set
-# CONFIG_MMC_SDHCI_NPCM is not set
 CONFIG_MMC_SDHCI_ROCKCHIP=y
-# CONFIG_MMC_SDHCI_S5P is not set
-# CONFIG_MMC_SDHCI_STI is not set
-# CONFIG_MMC_SDHCI_XENON is not set
-# CONFIG_MMC_SDHCI_TANGIER is not set
-# CONFIG_MMC_SDHCI_ZYNQ is not set
-# CONFIG_MMC_PITON is not set
-# CONFIG_STM32_SDMMC2 is not set
-# CONFIG_FTSDC010 is not set
-# CONFIG_FSL_ESDHC is not set
-# CONFIG_FSL_ESDHC_IMX is not set
-
-#
-# MTD Support
-#
-CONFIG_MTD=y
-# CONFIG_DM_MTD is not set
-# CONFIG_MTD_NOR_FLASH is not set
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_BLOCK is not set
-# CONFIG_SYS_MTDPARTS_RUNTIME is not set
-# CONFIG_FLASH_CFI_DRIVER is not set
-# CONFIG_HBMC_AM654 is not set
-# CONFIG_SAMSUNG_ONENAND is not set
-# CONFIG_USE_SYS_MAX_FLASH_BANKS is not set
-# CONFIG_MTD_RAW_NAND is not set
-
-#
-# SPI Flash Support
-#
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
-CONFIG_SF_DEFAULT_CS=0
-# CONFIG_BOOTDEV_SPI_FLASH is not set
-# CONFIG_SPI_FLASH_SFDP_SUPPORT is not set
-CONFIG_SPI_FLASH_SMART_HWCAPS=y
-# CONFIG_SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT is not set
-# CONFIG_SPI_FLASH_SOFT_RESET is not set
-# CONFIG_SPI_FLASH_BAR is not set
-CONFIG_SPI_FLASH_LOCK=y
-CONFIG_SPI_FLASH_UNLOCK_ALL=y
-# CONFIG_SPI_FLASH_ATMEL is not set
-# CONFIG_SPI_FLASH_EON is not set
 CONFIG_SPI_FLASH_GIGADEVICE=y
-# CONFIG_SPI_FLASH_ISSI is not set
-# CONFIG_SPI_FLASH_MACRONIX is not set
-# CONFIG_SPI_FLASH_SILICONKAISER is not set
-# CONFIG_SPI_FLASH_SPANSION is not set
-# CONFIG_SPI_FLASH_STMICRO is not set
-# CONFIG_SPI_FLASH_SST is not set
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_SPI_FLASH_XMC is not set
-# CONFIG_SPI_FLASH_XTX is not set
-# CONFIG_SPI_FLASH_ZBIT is not set
-CONFIG_SPI_FLASH_USE_4K_SECTORS=y
-# CONFIG_SPI_FLASH_DATAFLASH is not set
-# CONFIG_SPI_FLASH_MTD is not set
-
-#
-# UBI support
-#
-# CONFIG_UBI_SILENCE_MSG is not set
-# CONFIG_MTD_UBI is not set
-# CONFIG_NVMXIP is not set
-# CONFIG_NVMXIP_QSPI is not set
-
-#
-# Multiplexer drivers
-#
-# CONFIG_MULTIPLEXER is not set
-# CONFIG_BITBANGMII is not set
-# CONFIG_MV88E6352_SWITCH is not set
-CONFIG_PHYLIB=y
-# CONFIG_PHY_ADDR_ENABLE is not set
-CONFIG_PHY_ANEG_TIMEOUT=4000
-# CONFIG_B53_SWITCH is not set
-# CONFIG_MV88E61XX_SWITCH is not set
-# CONFIG_PHYLIB_10G is not set
-# CONFIG_PHY_ADIN is not set
-# CONFIG_PHY_AQUANTIA is not set
-# CONFIG_PHY_ATHEROS is not set
-# CONFIG_SPL_PHY_ATHEROS is not set
-# CONFIG_PHY_BROADCOM is not set
-# CONFIG_PHY_CORTINA is not set
-# CONFIG_PHY_DAVICOM is not set
-# CONFIG_PHY_ET1011C is not set
-# CONFIG_PHY_LXT is not set
-# CONFIG_PHY_MARVELL is not set
-# CONFIG_PHY_MARVELL_10G is not set
-# CONFIG_PHY_MESON_GXL is not set
-# CONFIG_PHY_MICREL is not set
-# CONFIG_PHY_MOTORCOMM is not set
-# CONFIG_PHY_MSCC is not set
-# CONFIG_PHY_NATSEMI is not set
-# CONFIG_PHY_NXP_C45_TJA11XX is not set
-# CONFIG_PHY_NXP_TJA11XX is not set
-# CONFIG_PHY_REALTEK is not set
-# CONFIG_PHY_SMSC is not set
-# CONFIG_PHY_TERANETICS is not set
-# CONFIG_PHY_TI is not set
-# CONFIG_PHY_TI_DP83867 is not set
-# CONFIG_PHY_TI_DP83869 is not set
-# CONFIG_PHY_TI_GENERIC is not set
-# CONFIG_PHY_VITESSE is not set
-# CONFIG_PHY_XILINX is not set
-# CONFIG_PHY_XILINX_GMII2RGMII is not set
-# CONFIG_PHY_XWAY is not set
-# CONFIG_PHY_ETHERNET_ID is not set
-# CONFIG_PHY_FIXED is not set
-# CONFIG_PHY_NCSI is not set
-# CONFIG_FSL_MEMAC is not set
-CONFIG_PHY_RESET_DELAY=0
-# CONFIG_FSL_PFE is not set
-CONFIG_ETH=y
-CONFIG_DM_ETH=y
-# CONFIG_DM_MDIO is not set
-# CONFIG_DM_ETH_PHY is not set
-CONFIG_NETDEVICES=y
-CONFIG_PHY_GIGE=y
-# CONFIG_ALTERA_TSE is not set
-# CONFIG_BCM_SF2_ETH is not set
-# CONFIG_BCMGENET is not set
-# CONFIG_BNXT_ETH is not set
-# CONFIG_CALXEDA_XGMAC is not set
-# CONFIG_DWC_ETH_XGMAC is not set
-# CONFIG_DRIVER_DM9000 is not set
-# CONFIG_DWC_ETH_QOS is not set
-# CONFIG_EEPRO100 is not set
 CONFIG_ETH_DESIGNWARE=y
-# CONFIG_ETH_DESIGNWARE_MESON8B is not set
-# CONFIG_ETH_DESIGNWARE_SOCFPGA is not set
-# CONFIG_ETH_DESIGNWARE_S700 is not set
-# CONFIG_DW_ALTDESCRIPTOR is not set
-# CONFIG_ETHOC is not set
-# CONFIG_FMAN_ENET is not set
-# CONFIG_FTMAC100 is not set
-# CONFIG_FTGMAC100 is not set
-# CONFIG_MCFFEC is not set
-# CONFIG_KS8851_MLL is not set
-# CONFIG_LITEETH is not set
-# CONFIG_MACB is not set
-# CONFIG_NET_NPCM750 is not set
-# CONFIG_PCH_GBE is not set
-# CONFIG_RGMII is not set
-# CONFIG_MII is not set
-# CONFIG_RMII is not set
-# CONFIG_PCNET is not set
-# CONFIG_QE_UEC is not set
-# CONFIG_RTL8139 is not set
-# CONFIG_SMC911X is not set
-# CONFIG_SUN7I_GMAC is not set
-# CONFIG_SUN4I_EMAC is not set
-# CONFIG_SUN8I_EMAC is not set
-# CONFIG_SH_ETHER is not set
-# CONFIG_DRIVER_TI_CPSW is not set
-# CONFIG_DRIVER_TI_EMAC is not set
-# CONFIG_DRIVER_TI_KEYSTONE_NET is not set
-# CONFIG_TULIP is not set
-# CONFIG_XILINX_AXIEMAC is not set
-# CONFIG_VSC7385_ENET is not set
-# CONFIG_XILINX_EMACLITE is not set
-# CONFIG_ZYNQ_GEM is not set
 CONFIG_GMAC_ROCKCHIP=y
-# CONFIG_SYS_DPAA_QBMAN is not set
-# CONFIG_TSEC_ENET is not set
-# CONFIG_MEDIATEK_ETH is not set
-# CONFIG_HIFEMAC_ETH is not set
-# CONFIG_HIGMACV300_ETH is not set
-# CONFIG_NVME is not set
-# CONFIG_NVME_APPLE is not set
-
-#
-# PCI Endpoint
-#
-# CONFIG_PCI_ENDPOINT is not set
-# CONFIG_X86_PCH7 is not set
-# CONFIG_X86_PCH9 is not set
-
-#
-# PHY Subsystem
-#
-CONFIG_PHY=y
-# CONFIG_SPL_PHY is not set
-# CONFIG_NOP_PHY is not set
-# CONFIG_MIPI_DPHY_HELPERS is not set
-# CONFIG_BCM_SR_PCIE_PHY is not set
-# CONFIG_OMAP_USB2_PHY is not set
-
-#
-# Rockchip PHY driver
-#
-# CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set
-# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-# CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY is not set
-# CONFIG_PHY_ROCKCHIP_PCIE is not set
-# CONFIG_PHY_ROCKCHIP_SNPS_PCIE3 is not set
-# CONFIG_PHY_ROCKCHIP_USBDP is not set
 CONFIG_PHY_ROCKCHIP_TYPEC=y
-# CONFIG_PHY_CADENCE_SIERRA is not set
-# CONFIG_PHY_CADENCE_TORRENT is not set
-# CONFIG_MSM8916_USB_PHY is not set
-# CONFIG_MVEBU_COMPHY_SUPPORT is not set
-
-#
-# Pin controllers
-#
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_FULL=y
-CONFIG_PINCTRL_GENERIC=y
-CONFIG_PINMUX=y
-# CONFIG_PINCONF is not set
-CONFIG_PINCONF_RECURSIVE=y
-CONFIG_SPL_PINCTRL=y
-CONFIG_SPL_PINCTRL_FULL=y
-CONFIG_SPL_PINCTRL_GENERIC=y
-CONFIG_SPL_PINMUX=y
-# CONFIG_SPL_PINCONF is not set
-CONFIG_SPL_PINCONF_RECURSIVE=y
-# CONFIG_PINCTRL_AT91 is not set
-# CONFIG_PINCTRL_AT91PIO4 is not set
-# CONFIG_PINCTRL_INTEL is not set
-# CONFIG_PINCTRL_QE is not set
-# CONFIG_PINCTRL_ROCKCHIP_RV1108 is not set
-# CONFIG_PINCTRL_SINGLE is not set
-# CONFIG_PINCTRL_STM32 is not set
-# CONFIG_PINCTRL_STMFX is not set
-# CONFIG_SPL_PINCTRL_STMFX is not set
-# CONFIG_PINCTRL_K210 is not set
-CONFIG_PINCTRL_ROCKCHIP=y
-CONFIG_SPL_PINCTRL_ROCKCHIP=y
-# CONFIG_PINCTRL_TEGRA is not set
-# CONFIG_SPL_PINCTRL_TEGRA is not set
-CONFIG_POWER=y
-# CONFIG_POWER_LEGACY is not set
-# CONFIG_ACPI_PMC is not set
-# CONFIG_SPL_ACPI_PMC is not set
-
-#
-# Power Domain Support
-#
-# CONFIG_POWER_DOMAIN is not set
-CONFIG_DM_PMIC=y
-CONFIG_SPL_DM_PMIC=y
-CONFIG_PMIC_CHILDREN=y
-CONFIG_SPL_PMIC_CHILDREN=y
-# CONFIG_PMIC_AB8500 is not set
-# CONFIG_PMIC_ACT8846 is not set
-# CONFIG_PMIC_AXP is not set
-# CONFIG_SPL_PMIC_AXP is not set
-# CONFIG_DM_PMIC_DA9063 is not set
-# CONFIG_SPL_DM_PMIC_DA9063 is not set
-# CONFIG_PMIC_AS3722 is not set
-# CONFIG_DM_PMIC_BD71837 is not set
-# CONFIG_SPL_DM_PMIC_BD71837 is not set
-# CONFIG_DM_PMIC_FAN53555 is not set
-# CONFIG_DM_PMIC_MP5416 is not set
-# CONFIG_SPL_DM_PMIC_MP5416 is not set
-# CONFIG_DM_PMIC_PCA9450 is not set
-# CONFIG_SPL_DM_PMIC_PCA9450 is not set
-# CONFIG_DM_PMIC_PFUZE100 is not set
-# CONFIG_SPL_DM_PMIC_PFUZE100 is not set
-# CONFIG_DM_PMIC_MAX77663 is not set
-# CONFIG_DM_PMIC_MAX77686 is not set
-# CONFIG_DM_PMIC_MAX8998 is not set
-# CONFIG_DM_PMIC_MC34708 is not set
-# CONFIG_PMIC_MAX8997 is not set
-# CONFIG_PMIC_QCOM is not set
 CONFIG_PMIC_RK8XX=y
-# CONFIG_SPL_PMIC_RK8XX is not set
-# CONFIG_PMIC_S2MPS11 is not set
-# CONFIG_DM_PMIC_SANDBOX is not set
-# CONFIG_PMIC_S5M8767 is not set
-# CONFIG_PMIC_RN5T567 is not set
-# CONFIG_SPL_PMIC_RN5T567 is not set
-# CONFIG_PMIC_TPS65090 is not set
-# CONFIG_PMIC_PALMAS is not set
-# CONFIG_PMIC_LP873X is not set
-# CONFIG_PMIC_LP87565 is not set
-# CONFIG_DM_PMIC_TPS65910 is not set
-# CONFIG_DM_PMIC_TPS80031 is not set
-# CONFIG_PMIC_STPMIC1 is not set
-# CONFIG_SPL_PMIC_PALMAS is not set
-# CONFIG_SPL_PMIC_LP873X is not set
-# CONFIG_SPL_PMIC_LP87565 is not set
-# CONFIG_PMIC_TPS65941 is not set
-# CONFIG_PMIC_TPS65219 is not set
-# CONFIG_PMIC_RAA215300 is not set
-# CONFIG_PMIC_TPS65217 is not set
-# CONFIG_POWER_TPS65218 is not set
-# CONFIG_POWER_TPS62362 is not set
-# CONFIG_SPL_POWER_TPS62362 is not set
-# CONFIG_SPL_POWER_TPS65910 is not set
-CONFIG_DM_REGULATOR=y
 CONFIG_REGULATOR_PWM=y
-# CONFIG_SPL_REGULATOR_PWM is not set
-CONFIG_DM_REGULATOR_COMMON=y
-CONFIG_DM_REGULATOR_FIXED=y
-# CONFIG_SPL_DM_REGULATOR_FIXED is not set
 CONFIG_DM_REGULATOR_GPIO=y
-# CONFIG_SPL_DM_REGULATOR_GPIO is not set
 CONFIG_REGULATOR_RK8XX=y
-# CONFIG_DM_REGULATOR_PBIAS is not set
-# CONFIG_DM_REGULATOR_TPS62360 is not set
-# CONFIG_DM_REGULATOR_ANATOP is not set
-# CONFIG_DM_REGULATOR_SCMI is not set
-# CONFIG_TPS6586X_POWER is not set
-# CONFIG_POWER_MT6323 is not set
-CONFIG_DM_PWM=y
-# CONFIG_PWM_ASPEED is not set
-# CONFIG_PWM_CADENCE_TTC is not set
 CONFIG_PWM_CROS_EC=y
-# CONFIG_PWM_EXYNOS is not set
-# CONFIG_PWM_IMX is not set
-# CONFIG_PWM_MESON is not set
-# CONFIG_PWM_MTK is not set
 CONFIG_PWM_ROCKCHIP=y
-# CONFIG_PWM_SANDBOX is not set
-# CONFIG_PWM_SIFIVE is not set
-# CONFIG_PWM_TEGRA is not set
-# CONFIG_PWM_SUNXI is not set
-# CONFIG_U_QE is not set
-CONFIG_RAM=y
-CONFIG_SPL_RAM=y
-# CONFIG_STM32_SDRAM is not set
-# CONFIG_MPC83XX_SDRAM is not set
-# CONFIG_K3_DDRSS is not set
-# CONFIG_IMXRT_SDRAM is not set
-# CONFIG_CADENCE_DDR_CTRL is not set
-CONFIG_RAM_ROCKCHIP=y
-CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_RAM_ROCKCHIP_DEBUG=y
-# CONFIG_RAM_ROCKCHIP_DDR4 is not set
-# CONFIG_RAM_ROCKCHIP_LPDDR2 is not set
-# CONFIG_RAM_ROCKCHIP_LPDDR3 is not set
-# CONFIG_RAM_ROCKCHIP_LPDDR4 is not set
-
-#
-# Reboot Mode Support
-#
-# CONFIG_DM_REBOOT_MODE is not set
-
-#
-# Remote Processor drivers
-#
-CONFIG_REMOTEPROC_MAX_FW_SIZE=0x10000
-
-#
-# Reset Controller Support
-#
-# CONFIG_RESET_AST2500 is not set
-# CONFIG_RESET_AST2600 is not set
-CONFIG_RESET_ROCKCHIP=y
-# CONFIG_RESET_HISILICON is not set
-# CONFIG_RESET_SYSCON is not set
-# CONFIG_RESET_SCMI is not set
-# CONFIG_RESET_DRA7 is not set
-CONFIG_DM_RNG=y
-# CONFIG_SPL_DM_RNG is not set
-# CONFIG_RNG_MSM is not set
-# CONFIG_RNG_NPCM is not set
-CONFIG_RNG_ROCKCHIP=y
-# CONFIG_RNG_IPROC200 is not set
-# CONFIG_RNG_SMCCC_TRNG is not set
-# CONFIG_RNG_ARM_RNDR is not set
-# CONFIG_RNG_EXYNOS is not set
-
-#
-# Real Time Clock
-#
-# CONFIG_DM_RTC is not set
-# CONFIG_SPL_DM_RTC is not set
-# CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set
-# CONFIG_RTC_DS1337 is not set
-# CONFIG_RTC_DS1338 is not set
-# CONFIG_RTC_DS1374 is not set
-# CONFIG_RTC_DS3231 is not set
-# CONFIG_RTC_PCF8563 is not set
-# CONFIG_RTC_PT7C4338 is not set
-# CONFIG_RTC_PL031 is not set
-# CONFIG_RTC_S35392A is not set
-# CONFIG_RTC_MC13XXX is not set
-# CONFIG_RTC_MC146818 is not set
-# CONFIG_RTC_M41T62 is not set
-# CONFIG_SCSI is not set
-CONFIG_SERIAL=y
-CONFIG_BAUDRATE=115200
-# CONFIG_DEFAULT_ENV_IS_RW is not set
-CONFIG_REQUIRE_SERIAL_CONSOLE=y
-# CONFIG_SPECIFY_CONSOLE_INDEX is not set
-CONFIG_SERIAL_PRESENT=y
-CONFIG_SPL_SERIAL_PRESENT=y
-CONFIG_DM_SERIAL=y
-# CONFIG_SERIAL_RX_BUFFER is not set
-# CONFIG_SERIAL_PUTS is not set
-# CONFIG_SERIAL_SEARCH_ALL is not set
-# CONFIG_SERIAL_PROBE_ALL is not set
-CONFIG_SPL_DM_SERIAL=y
-# CONFIG_VPL_DM_SERIAL is not set
-CONFIG_DEBUG_UART_NS16550=y
-CONFIG_SPL_DEBUG_UART_BASE=0xff1a0000
 CONFIG_DEBUG_UART_SHIFT=2
-# CONFIG_DEBUG_UART_ANNOUNCE is not set
-# CONFIG_DEBUG_UART_SKIP_INIT is not set
-# CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED is not set
-# CONFIG_ALTERA_JTAG_UART is not set
-# CONFIG_ALTERA_UART is not set
-# CONFIG_ARC_SERIAL is not set
-# CONFIG_ARM_DCC is not set
-# CONFIG_ATMEL_USART is not set
-# CONFIG_BCM6345_SERIAL is not set
-# CONFIG_COREBOOT_SERIAL is not set
-# CONFIG_CORTINA_UART is not set
-# CONFIG_FSL_LINFLEXUART is not set
-# CONFIG_FSL_LPUART is not set
-# CONFIG_MVEBU_A3700_UART is not set
-# CONFIG_MCFUART is not set
-# CONFIG_NULLDEV_SERIAL is not set
-CONFIG_SYS_NS16550=y
-# CONFIG_NS16550_DYNAMIC is not set
 CONFIG_SYS_NS16550_MEM32=y
-# CONFIG_SYS_NS16550_PORT_MAPPED is not set
-# CONFIG_PL01X_SERIAL is not set
-# CONFIG_ROCKCHIP_SERIAL is not set
-# CONFIG_XILINX_UARTLITE is not set
-# CONFIG_MSM_SERIAL is not set
-# CONFIG_MSM_GENI_SERIAL is not set
-# CONFIG_MXS_AUART_SERIAL is not set
-# CONFIG_OMAP_SERIAL is not set
-# CONFIG_HTIF_CONSOLE is not set
-# CONFIG_SIFIVE_SERIAL is not set
-# CONFIG_ZYNQ_SERIAL is not set
-# CONFIG_MTK_SERIAL is not set
-# CONFIG_MT7620_SERIAL is not set
-# CONFIG_NPCM_SERIAL is not set
-# CONFIG_SM is not set
-# CONFIG_MESON_SM is not set
-# CONFIG_SMEM is not set
-
-#
-# Sound support
-#
-# CONFIG_SOUND is not set
-
-#
-# SOC (System On Chip) specific Drivers
-#
-# CONFIG_SOC_DEVICE is not set
-# CONFIG_SOC_QCOM is not set
-# CONFIG_SOC_SAMSUNG is not set
-# CONFIG_SOC_TI is not set
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_SPI_MEM=y
-# CONFIG_SPI_DIRMAP is not set
-# CONFIG_ALTERA_SPI is not set
-# CONFIG_APPLE_SPI is not set
-# CONFIG_ATCSPI200_SPI is not set
-# CONFIG_ATMEL_SPI is not set
-# CONFIG_BCMSTB_SPI is not set
-# CONFIG_CORTINA_SFLASH is not set
-# CONFIG_CADENCE_QSPI is not set
-# CONFIG_CF_SPI is not set
-# CONFIG_CV1800B_SPIF is not set
-# CONFIG_DESIGNWARE_SPI is not set
-# CONFIG_EXYNOS_SPI is not set
-# CONFIG_FSL_DSPI is not set
-# CONFIG_FSL_QSPI is not set
-# CONFIG_GXP_SPI is not set
-# CONFIG_ICH_SPI is not set
-# CONFIG_IPROC_QSPI is not set
-# CONFIG_KIRKWOOD_SPI is not set
-# CONFIG_MICROCHIP_COREQSPI is not set
-# CONFIG_MPC8XXX_SPI is not set
-# CONFIG_MTK_SNOR is not set
-# CONFIG_MTK_SNFI_SPI is not set
-# CONFIG_MTK_SPIM is not set
-# CONFIG_MVEBU_A3700_SPI is not set
-# CONFIG_MXS_SPI is not set
-# CONFIG_SPI_MXIC is not set
-# CONFIG_NPCM_FIU_SPI is not set
-# CONFIG_NPCM_PSPI is not set
-# CONFIG_NXP_FSPI is not set
-# CONFIG_OMAP3_SPI is not set
-# CONFIG_PL022_SPI is not set
-# CONFIG_ROCKCHIP_SFC is not set
 CONFIG_ROCKCHIP_SPI=y
-# CONFIG_SPI_ASPEED_SMC is not set
-# CONFIG_SPI_SIFIVE is not set
-# CONFIG_SOFT_SPI is not set
-# CONFIG_SPI_SN_F_OSPI is not set
-# CONFIG_SPI_SUNXI is not set
-# CONFIG_TEGRA114_SPI is not set
-# CONFIG_TEGRA20_SFLASH is not set
-# CONFIG_TEGRA20_SLINK is not set
-# CONFIG_TEGRA210_QSPI is not set
-# CONFIG_TI_QSPI is not set
-# CONFIG_XILINX_SPI is not set
-# CONFIG_ZYNQ_SPI is not set
-# CONFIG_ZYNQ_QSPI is not set
-# CONFIG_ZYNQMP_GQSPI is not set
-# CONFIG_SH_QSPI is not set
-# CONFIG_MXC_SPI is not set
-
-#
-# SPMI support
-#
-# CONFIG_SPMI is not set
-# CONFIG_SYSINFO is not set
-
-#
-# System reset device drivers
-#
 CONFIG_SYSRESET=y
-CONFIG_SPL_SYSRESET=y
-CONFIG_SYSRESET_CMD_RESET=y
-CONFIG_SYSRESET_CMD_POWEROFF=y
-# CONFIG_SYSRESET_CV1800B is not set
-# CONFIG_POWEROFF_GPIO is not set
-# CONFIG_SYSRESET_GPIO is not set
-# CONFIG_SYSRESET_PSCI is not set
-# CONFIG_SYSRESET_SYSCON is not set
-# CONFIG_SYSRESET_WATCHDOG is not set
-# CONFIG_SYSRESET_RESETCTL is not set
-# CONFIG_SYSRESET_MPC83XX is not set
-# CONFIG_TEE is not set
-# CONFIG_DM_THERMAL is not set
-
-#
-# Timer Support
-#
-# CONFIG_TIMER is not set
-
-#
-# TPM support
-#
 CONFIG_USB=y
-CONFIG_DM_USB=y
-CONFIG_SPL_DM_USB=y
-# CONFIG_DM_USB_GADGET is not set
-# CONFIG_SPL_DM_USB_GADGET is not set
-
-#
-# USB Host Controller Drivers
-#
-CONFIG_USB_HOST=y
-# CONFIG_SPL_USB_HOST is not set
 CONFIG_USB_XHCI_HCD=y
-# CONFIG_USB_XHCI_DWC3 is not set
-# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
-# CONFIG_USB_XHCI_FSL is not set
-# CONFIG_USB_XHCI_BRCM is not set
 CONFIG_USB_EHCI_HCD=y
-# CONFIG_USB_EHCI_MSM is not set
-# CONFIG_USB_EHCI_PCI is not set
-# CONFIG_USB_EHCI_ZYNQ is not set
 CONFIG_USB_EHCI_GENERIC=y
-# CONFIG_USB_EHCI_FSL is not set
-CONFIG_USB_OHCI_NEW=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
-# CONFIG_USB_OHCI_DA8XX is not set
-# CONFIG_SYS_OHCI_SWAP_REG_ACCESS is not set
-# CONFIG_USB_UHCI_HCD is not set
-# CONFIG_USB_DWC2 is not set
-# CONFIG_USB_R8A66597_HCD is not set
-# CONFIG_USB_ISP1760 is not set
-# CONFIG_USB_CDNS3 is not set
 CONFIG_USB_DWC3=y
-
-#
-# Platform Glue Driver Support
-#
-# CONFIG_USB_DWC3_OMAP is not set
 CONFIG_USB_DWC3_GENERIC=y
-# CONFIG_SPL_USB_DWC3_GENERIC is not set
-# CONFIG_USB_DWC3_AM62 is not set
-# CONFIG_USB_DWC3_LAYERSCAPE is not set
-
-#
-# PHY Subsystem
-#
-# CONFIG_USB_DWC3_PHY_OMAP is not set
-# CONFIG_USB_DWC3_PHY_SAMSUNG is not set
-
-#
-# Legacy MUSB Support
-#
-# CONFIG_USB_MUSB_HCD is not set
-# CONFIG_USB_MUSB_UDC is not set
-
-#
-# MUSB Controller Driver
-#
-# CONFIG_USB_MUSB_HOST is not set
-# CONFIG_USB_MUSB_PIO_ONLY is not set
-
-#
-# USB Phy
-#
-# CONFIG_TWL4030_USB is not set
-# CONFIG_ROCKCHIP_USB2_PHY is not set
-
-#
-# ULPI drivers
-#
-
-#
-# USB peripherals
-#
-CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-# CONFIG_USB_ONBOARD_HUB is not set
-CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=1000
-CONFIG_USB_KEYBOARD_FN_KEYS=y
-CONFIG_SYS_USB_EVENT_POLL=y
-# CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE is not set
-# CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is not set
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
-# CONFIG_USB_ETHER_LAN75XX is not set
-# CONFIG_USB_ETHER_LAN78XX is not set
 CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
-# CONFIG_USB_GADGET is not set
-# CONFIG_SPL_USB_GADGET is not set
-
-#
-# UFS Host Controller Support
-#
-# CONFIG_TI_J721E_UFS is not set
-
-#
-# Graphics support
-#
 CONFIG_VIDEO=y
-# CONFIG_VIDEO_FONT_4X6 is not set
-CONFIG_VIDEO_FONT_8X16=y
-# CONFIG_VIDEO_FONT_SUN12X22 is not set
-# CONFIG_VIDEO_FONT_16X32 is not set
-CONFIG_VIDEO_LOGO=y
-CONFIG_BACKLIGHT=y
-CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x0
-# CONFIG_VIDEO_COPY is not set
-CONFIG_VIDEO_DAMAGE=y
-CONFIG_BACKLIGHT_PWM=y
-# CONFIG_BACKLIGHT_GPIO is not set
-CONFIG_VIDEO_BPP8=y
-CONFIG_VIDEO_BPP16=y
-CONFIG_VIDEO_BPP32=y
-CONFIG_VIDEO_ANSI=y
-# CONFIG_VIDEO_MIPI_DSI is not set
-CONFIG_CONSOLE_NORMAL=y
-# CONFIG_CONSOLE_ROTATION is not set
-# CONFIG_CONSOLE_TRUETYPE is not set
-CONFIG_SYS_WHITE_ON_BLACK=y
-# CONFIG_NO_FB_CLEAR is not set
-CONFIG_VIDEO_SYNC_MS=100
-CONFIG_VIDEO_SYNC_CYCLIC_MS=10
-CONFIG_PANEL=y
-CONFIG_SIMPLE_PANEL=y
-# CONFIG_PANEL_HX8238D is not set
-
-#
-# TrueType Fonts
-#
-# CONFIG_VIDCONSOLE_AS_LCD is not set
-# CONFIG_VIDEO_BOCHS is not set
-# CONFIG_VIDEO_VESA is not set
-# CONFIG_VIDEO_LCD_ANX9804 is not set
-# CONFIG_ATMEL_LCD_BGR555 is not set
-# CONFIG_VIDEO_BCM2835 is not set
-# CONFIG_VIDEO_LCD_ENDEAVORU is not set
-# CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
-# CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
-# CONFIG_VIDEO_LCD_LG_LD070WX3 is not set
-# CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
-# CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
-# CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
-# CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set
-# CONFIG_VIDEO_LCD_SSD2828 is not set
-# CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
-# CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
-# CONFIG_VIDEO_MESON is not set
-# CONFIG_VIDEO_MVEBU is not set
-CONFIG_I2C_EDID=y
 CONFIG_DISPLAY=y
-# CONFIG_NXP_TDA19988 is not set
-# CONFIG_ATMEL_HLCD is not set
-# CONFIG_BACKLIGHT_LM3533 is not set
-# CONFIG_AM335X_LCD is not set
-# CONFIG_VIDEO_EXYNOS is not set
-# CONFIG_LOGICORE_DP_TX is not set
 CONFIG_VIDEO_ROCKCHIP=y
 CONFIG_VIDEO_ROCKCHIP_MAX_XRES=1280
 CONFIG_VIDEO_ROCKCHIP_MAX_YRES=800
 CONFIG_DISPLAY_ROCKCHIP_EDP=y
-# CONFIG_DISPLAY_ROCKCHIP_LVDS is not set
-# CONFIG_DISPLAY_ROCKCHIP_HDMI is not set
-# CONFIG_DISPLAY_ROCKCHIP_MIPI is not set
-# CONFIG_DISPLAY_ROCKCHIP_DW_MIPI is not set
-# CONFIG_VIDEO_ARM_MALIDP is not set
-# CONFIG_VIDEO_STM32 is not set
-# CONFIG_VIDEO_TIDSS is not set
-# CONFIG_VIDEO_TEGRA124 is not set
-# CONFIG_VIDEO_BRIDGE is not set
-# CONFIG_VIDEO_BRIDGE_PARADE_DP501 is not set
-# CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825 is not set
-# CONFIG_VIDEO_BRIDGE_TOSHIBA_TC358768 is not set
-# CONFIG_VIDEO_TEGRA20 is not set
-# CONFIG_VIDEO_DSI_TEGRA30 is not set
-# CONFIG_TEGRA_BACKLIGHT_PWM is not set
-# CONFIG_VIDEO_MXS is not set
-# CONFIG_VIDEO_SEPS525 is not set
-CONFIG_CONSOLE_SCROLL_LINES=1
-# CONFIG_VIDEO_SIMPLE is not set
-# CONFIG_VIDEO_DT_SIMPLEFB is not set
-# CONFIG_VIDEO_MCDE_SIMPLE is not set
-# CONFIG_OSD is not set
-# CONFIG_VIDEO_REMOVE is not set
-# CONFIG_SPLASH_SCREEN is not set
-# CONFIG_BMP is not set
-CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
-CONFIG_VIDEO_BMP_RLE8=y
-# CONFIG_BMP_16BPP is not set
-# CONFIG_BMP_24BPP is not set
-# CONFIG_BMP_32BPP is not set
-# CONFIG_SPL_VIDEO is not set
-
-#
-# VirtIO Drivers
-#
-# CONFIG_VIRTIO_MMIO is not set
-
-#
-# 1-Wire support
-#
-# CONFIG_W1 is not set
-
-#
-# 1-wire EEPROM support
-#
-# CONFIG_W1_EEPROM is not set
-
-#
-# Watchdog Timer Support
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_IMX_WATCHDOG is not set
-# CONFIG_ULP_WATCHDOG is not set
-# CONFIG_WDT is not set
-# CONFIG_SPL_WDT is not set
-# CONFIG_PHYS_TO_BUS is not set
-
-#
-# File systems
-#
-# CONFIG_FS_BTRFS is not set
-# CONFIG_FS_CBFS is not set
-# CONFIG_SPL_FS_CBFS is not set
-CONFIG_FS_EXT4=y
-# CONFIG_EXT4_WRITE is not set
-CONFIG_FS_FAT=y
-CONFIG_FAT_WRITE=y
-CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
-# CONFIG_FS_JFFS2 is not set
-# CONFIG_UBIFS_SILENCE_MSG is not set
-# CONFIG_UBIFS_SILENCE_DEBUG_DUMP is not set
-# CONFIG_FS_CRAMFS is not set
-# CONFIG_YAFFS2 is not set
-# CONFIG_FS_SQUASHFS is not set
-# CONFIG_FS_EROFS is not set
-
-#
-# Library routines
-#
-# CONFIG_ADDR_MAP is not set
-# CONFIG_SYS_TIMER_COUNTS_DOWN is not set
-# CONFIG_PHYSMEM is not set
-# CONFIG_BCH is not set
 # CONFIG_BINMAN_FDT is not set
-# CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set
-CONFIG_CHARSET=y
-# CONFIG_DYNAMIC_CRC_TABLE is not set
-CONFIG_LIB_UUID=y
-CONFIG_RANDOM_UUID=y
-CONFIG_SPL_LIB_UUID=y
-# CONFIG_SEMIHOSTING is not set
-# CONFIG_SPL_SEMIHOSTING is not set
-CONFIG_PRINTF=y
-CONFIG_SPL_PRINTF=y
-CONFIG_SPRINTF=y
-CONFIG_SPL_SPRINTF=y
-CONFIG_STRTO=y
-CONFIG_SPL_STRTO=y
-CONFIG_SYS_HZ=1000
-CONFIG_SPL_USE_TINY_PRINTF=y
 CONFIG_PANIC_HANG=y
-CONFIG_REGEX=y
-CONFIG_LIB_RAND=y
-# CONFIG_LIB_HW_RAND is not set
-CONFIG_SUPPORT_ACPI=y
-# CONFIG_ACPI is not set
-# CONFIG_SPL_ACPI is not set
-# CONFIG_SPL_TINY_MEMSET is not set
-# CONFIG_BITREVERSE is not set
-# CONFIG_TRACE is not set
-# CONFIG_CIRCBUF is not set
 CONFIG_CMD_DHRYSTONE=y
-
-#
-# Security support
-#
-# CONFIG_AES is not set
-# CONFIG_ECDSA is not set
-# CONFIG_RSA is not set
-# CONFIG_TPM is not set
-# CONFIG_SPL_TPM is not set
-
-#
-# Android Verified Boot
-#
-
-#
-# Hashing Support
-#
-# CONFIG_BLAKE2 is not set
-CONFIG_SHA1=y
-CONFIG_SHA256=y
-# CONFIG_SHA512 is not set
-# CONFIG_SHA384 is not set
-# CONFIG_SHA_HW_ACCEL is not set
-CONFIG_SPL_CRC32=y
-CONFIG_SPL_SHA1=y
-CONFIG_SPL_SHA256=y
-# CONFIG_SPL_SHA512 is not set
-# CONFIG_SPL_SHA384 is not set
-# CONFIG_SPL_SHA_HW_ACCEL is not set
-CONFIG_MD5=y
-# CONFIG_SPL_MD5 is not set
-CONFIG_CRC8=y
-# CONFIG_SPL_CRC8 is not set
-# CONFIG_SPL_CRC16 is not set
-CONFIG_CRC32=y
-
-#
-# Compression Support
-#
-CONFIG_LZ4=y
-CONFIG_LZMA=y
-# CONFIG_LZO is not set
-CONFIG_GZIP=y
-# CONFIG_ZLIB_UNCOMPRESS is not set
-# CONFIG_BZIP2 is not set
-CONFIG_ZLIB=y
-# CONFIG_ZSTD is not set
-# CONFIG_SPL_BZIP2 is not set
-# CONFIG_SPL_LZ4 is not set
-# CONFIG_SPL_LZMA is not set
-CONFIG_VPL_LZMA=y
-# CONFIG_SPL_LZO is not set
-# CONFIG_SPL_GZIP is not set
-# CONFIG_SPL_ZSTD is not set
 CONFIG_ERRNO_STR=y
 # CONFIG_HEXDUMP is not set
-CONFIG_GETOPT=y
-CONFIG_OF_LIBFDT=y
-CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
-CONFIG_SYS_FDT_PAD=0x3000
-CONFIG_SPL_OF_LIBFDT=y
-CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLE=y
-# CONFIG_LIB_RATIONAL is not set
-# CONFIG_SPL_LIB_RATIONAL is not set
-CONFIG_SMBIOS=y
-# CONFIG_SMBIOS_PARSER is not set
-CONFIG_EFI_LOADER=y
-CONFIG_EFI_BINARY_EXEC=y
-CONFIG_EFI_BOOTMGR=y
-# CONFIG_EFI_VARIABLE_FILE_STORE is not set
 CONFIG_EFI_VARIABLE_NO_STORE=y
-# CONFIG_EFI_VARIABLES_PRESEED is not set
-CONFIG_EFI_VAR_BUF_SIZE=131072
-# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
-# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
-# CONFIG_EFI_CAPSULE_ON_DISK is not set
-CONFIG_EFI_CAPSULE_MAX=15
-CONFIG_EFI_DEVICE_PATH_TO_TEXT=y
-CONFIG_EFI_DEVICE_PATH_UTIL=y
-CONFIG_EFI_DT_FIXUP=y
-CONFIG_EFI_LOADER_HII=y
-CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y
-CONFIG_EFI_UNICODE_CAPITALIZATION=y
-# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set
-CONFIG_EFI_PLATFORM_LANG_CODES="en-US"
-CONFIG_EFI_HAVE_RUNTIME_RESET=y
-CONFIG_EFI_RNG_PROTOCOL=y
-CONFIG_EFI_LOAD_FILE2_INITRD=y
-CONFIG_EFI_ECPT=y
-CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
-# CONFIG_EFI_HTTP_BOOT is not set
-# CONFIG_OPTEE_LIB is not set
-# CONFIG_OPTEE_IMAGE is not set
-# CONFIG_BOOTM_OPTEE is not set
-# CONFIG_TEST_FDTDEC is not set
-CONFIG_LIB_ELF=y
-CONFIG_LMB=y
-CONFIG_LMB_USE_MAX_REGIONS=y
-CONFIG_LMB_MAX_REGIONS=16
-# CONFIG_PHANDLE_CHECK_SEQ is not set
-
-#
-# Testing
-#
-# CONFIG_UNIT_TEST is not set
-# CONFIG_SPL_UNIT_TEST is not set
-# CONFIG_POST is not set
-
-#
-# Tools options
-#
-CONFIG_MKIMAGE_DTC_PATH="dtc"
-CONFIG_TOOLS_CRC32=y
-CONFIG_TOOLS_LIBCRYPTO=y
-CONFIG_TOOLS_KWBIMAGE=y
-CONFIG_TOOLS_FIT=y
-CONFIG_TOOLS_FIT_FULL_CHECK=y
-CONFIG_TOOLS_FIT_PRINT=y
-CONFIG_TOOLS_FIT_RSASSA_PSS=y
-CONFIG_TOOLS_FIT_SIGNATURE=y
-CONFIG_TOOLS_FIT_SIGNATURE_MAX_SIZE=0x10000000
-CONFIG_TOOLS_FIT_VERBOSE=y
-CONFIG_TOOLS_MD5=y
-CONFIG_TOOLS_OF_LIBFDT=y
-CONFIG_TOOLS_SHA1=y
-CONFIG_TOOLS_SHA256=y
-CONFIG_TOOLS_SHA384=y
-CONFIG_TOOLS_SHA512=y
-CONFIG_TOOLS_MKEFICAPSULE=y
-# CONFIG_FSPI_CONF_HEADER is not set
-# CONFIG_TOOLS_MKFWUMDATA is not set
diff --git a/config/u-boot/gru_kevin/config/default b/config/u-boot/gru_kevin/config/default
index 2a15b9bf..91db362c 100644
--- a/config/u-boot/gru_kevin/config/default
+++ b/config/u-boot/gru_kevin/config/default
@@ -1,2426 +1,135 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# U-Boot 2024.10 Configuration
-#
-
-#
-# Compiler: gcc (Debian 12.2.0-14) 12.2.0
-#
-CONFIG_CREATE_ARCH_SYMLINK=y
-CONFIG_SUPPORT_LITTLE_ENDIAN=y
-CONFIG_SYS_CACHE_SHIFT_6=y
-CONFIG_64BIT=y
-CONFIG_SYS_CACHELINE_SIZE=64
-CONFIG_LINKER_LIST_ALIGN=8
-# CONFIG_ARC is not set
 CONFIG_ARM=y
-# CONFIG_M68K is not set
-# CONFIG_MICROBLAZE is not set
-# CONFIG_MIPS is not set
-# CONFIG_NIOS2 is not set
-# CONFIG_PPC is not set
-# CONFIG_RISCV is not set
-# CONFIG_SANDBOX is not set
-# CONFIG_SH is not set
-# CONFIG_X86 is not set
-# CONFIG_XTENSA is not set
-CONFIG_SYS_ARCH="arm"
-CONFIG_SYS_CPU="armv8"
-CONFIG_SYS_SOC="rk3399"
-CONFIG_SYS_VENDOR="google"
-CONFIG_SYS_BOARD="gru"
-CONFIG_SYS_CONFIG_NAME="gru"
-
-#
-# Skipping low level initialization functions
-#
 CONFIG_SKIP_LOWLEVEL_INIT=y
-# CONFIG_SPL_SKIP_LOWLEVEL_INIT is not set
-# CONFIG_TPL_SKIP_LOWLEVEL_INIT is not set
-# CONFIG_SKIP_LOWLEVEL_INIT_ONLY is not set
-# CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY is not set
-# CONFIG_SYS_ICACHE_OFF is not set
-# CONFIG_SPL_SYS_ICACHE_OFF is not set
-# CONFIG_SYS_DCACHE_OFF is not set
 CONFIG_SPL_SYS_DCACHE_OFF=y
-
-#
-# ARM architecture
-#
-CONFIG_ARM64=y
-CONFIG_ARM64_CRC32=y
 CONFIG_COUNTER_FREQUENCY=24000000
 CONFIG_POSITION_INDEPENDENT=y
-CONFIG_INIT_SP_RELATIVE=y
-CONFIG_SYS_INIT_SP_BSS_OFFSET=524288
-CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE=0x18000000
-# CONFIG_GIC_V3_ITS is not set
-# CONFIG_GICV3_SUPPORT_GIC600 is not set
-CONFIG_STATIC_RELA=y
-CONFIG_DMA_ADDR_T_64BIT=y
-CONFIG_ARM_ASM_UNIFIED=y
-# CONFIG_SYS_ARM_CACHE_CP15 is not set
-# CONFIG_SYS_ARM_MMU is not set
-# CONFIG_SYS_ARM_MPU is not set
-CONFIG_SYS_ARM_ARCH=8
-CONFIG_SYS_ARM_CACHE_WRITEBACK=y
-# CONFIG_SYS_ARM_CACHE_WRITETHROUGH is not set
-# CONFIG_SYS_ARM_CACHE_WRITEALLOC is not set
-# CONFIG_ARCH_CPU_INIT is not set
-CONFIG_SYS_ARCH_TIMER=y
-CONFIG_ARM_SMCCC=y
-# CONFIG_SYS_L2_PL310 is not set
-# CONFIG_SPL_SYS_L2_PL310 is not set
-# CONFIG_SYS_L2CACHE_OFF is not set
-CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
-# CONFIG_USE_ARCH_MEMCPY is not set
-# CONFIG_SPL_USE_ARCH_MEMCPY is not set
-# CONFIG_USE_ARCH_MEMSET is not set
-# CONFIG_SPL_USE_ARCH_MEMSET is not set
-CONFIG_ARM64_SUPPORT_AARCH32=y
-# CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_DAVINCI is not set
-# CONFIG_ARCH_HISTB is not set
-# CONFIG_ARCH_KIRKWOOD is not set
-# CONFIG_ARCH_MVEBU is not set
-# CONFIG_ARCH_ORION5X is not set
-# CONFIG_ARCH_BCM283X is not set
-# CONFIG_ARCH_BCMSTB is not set
-# CONFIG_ARCH_BCMBCA is not set
-# CONFIG_TARGET_VEXPRESS_CA9X4 is not set
-# CONFIG_TARGET_BCMNS is not set
-# CONFIG_TARGET_BCMNS3 is not set
-# CONFIG_ARCH_EXYNOS is not set
-# CONFIG_ARCH_S5PC1XX is not set
-# CONFIG_ARCH_HIGHBANK is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_IPQ40XX is not set
-# CONFIG_ARCH_KEYSTONE is not set
-# CONFIG_ARCH_K3 is not set
-# CONFIG_ARCH_OMAP2PLUS is not set
-# CONFIG_ARCH_MESON is not set
-# CONFIG_ARCH_MEDIATEK is not set
-# CONFIG_ARCH_LPC32XX is not set
-# CONFIG_ARCH_IMX8 is not set
-# CONFIG_ARCH_IMX8M is not set
-# CONFIG_ARCH_IMX8ULP is not set
-# CONFIG_ARCH_IMX9 is not set
-# CONFIG_ARCH_IMXRT is not set
-# CONFIG_ARCH_MX23 is not set
-# CONFIG_ARCH_MX28 is not set
-# CONFIG_ARCH_MX31 is not set
-# CONFIG_ARCH_MX7ULP is not set
-# CONFIG_ARCH_MX7 is not set
-# CONFIG_ARCH_MX6 is not set
-# CONFIG_ARCH_MX5 is not set
-# CONFIG_ARCH_NEXELL is not set
-# CONFIG_ARCH_NPCM is not set
-# CONFIG_ARCH_APPLE is not set
-# CONFIG_ARCH_OWL is not set
-# CONFIG_ARCH_QEMU is not set
-# CONFIG_ARCH_RENESAS is not set
-# CONFIG_ARCH_SNAPDRAGON is not set
-# CONFIG_ARCH_SOCFPGA is not set
-# CONFIG_ARCH_SUNXI is not set
-# CONFIG_ARCH_U8500 is not set
-# CONFIG_ARCH_VERSAL is not set
-# CONFIG_ARCH_VERSAL2 is not set
-# CONFIG_ARCH_VERSAL_NET is not set
-# CONFIG_ARCH_VF610 is not set
-# CONFIG_ARCH_ZYNQ is not set
-# CONFIG_ARCH_ZYNQMP_R5 is not set
-# CONFIG_ARCH_ZYNQMP is not set
-# CONFIG_ARCH_TEGRA is not set
-# CONFIG_ARCH_VEXPRESS64 is not set
-# CONFIG_TARGET_CORSTONE1000 is not set
-# CONFIG_TARGET_TOTAL_COMPUTE is not set
-# CONFIG_TARGET_LS2080A_EMU is not set
-# CONFIG_TARGET_LS1088AQDS is not set
-# CONFIG_TARGET_LS2080AQDS is not set
-# CONFIG_TARGET_LS2080ARDB is not set
-# CONFIG_TARGET_LS2081ARDB is not set
-# CONFIG_TARGET_LX2160ARDB is not set
-# CONFIG_TARGET_LX2160AQDS is not set
-# CONFIG_TARGET_LX2162AQDS is not set
-# CONFIG_TARGET_HIKEY is not set
-# CONFIG_TARGET_HIKEY960 is not set
-# CONFIG_TARGET_POPLAR is not set
-# CONFIG_TARGET_LS1012AQDS is not set
-# CONFIG_TARGET_LS1012ARDB is not set
-# CONFIG_TARGET_LS1012A2G5RDB is not set
-# CONFIG_TARGET_LS1012AFRWY is not set
-# CONFIG_TARGET_LS1012AFRDM is not set
-# CONFIG_TARGET_LS1028AQDS is not set
-# CONFIG_TARGET_LS1028ARDB is not set
-# CONFIG_TARGET_LS1088ARDB is not set
-# CONFIG_TARGET_LS1021AQDS is not set
-# CONFIG_TARGET_LS1021ATWR is not set
-# CONFIG_TARGET_PG_WCOM_SELI8 is not set
-# CONFIG_TARGET_PG_WCOM_EXPU1 is not set
-# CONFIG_TARGET_LS1021ATSN is not set
-# CONFIG_TARGET_LS1021AIOT is not set
-# CONFIG_TARGET_LS1043AQDS is not set
-# CONFIG_TARGET_LS1043ARDB is not set
-# CONFIG_TARGET_LS1046AQDS is not set
-# CONFIG_TARGET_LS1046ARDB is not set
-# CONFIG_TARGET_LS1046AFRWY is not set
-# CONFIG_ARCH_SC5XX is not set
-# CONFIG_TARGET_SL28 is not set
-# CONFIG_TARGET_TEN64 is not set
-# CONFIG_ARCH_UNIPHIER is not set
-# CONFIG_ARCH_SYNQUACER is not set
-# CONFIG_ARCH_STM32 is not set
-# CONFIG_ARCH_STI is not set
-# CONFIG_ARCH_STM32MP is not set
 CONFIG_ARCH_ROCKCHIP=y
-# CONFIG_ARCH_OCTEONTX is not set
-# CONFIG_ARCH_OCTEONTX2 is not set
-# CONFIG_TARGET_THUNDERX_88XX is not set
-# CONFIG_ARCH_ASPEED is not set
-# CONFIG_TARGET_DURIAN is not set
-# CONFIG_TARGET_POMELO is not set
-# CONFIG_TARGET_PE2201 is not set
-# CONFIG_TARGET_PRESIDIO_ASIC is not set
-# CONFIG_TARGET_XENGUEST_ARM64 is not set
-# CONFIG_ARCH_GXP is not set
-# CONFIG_STATIC_MACH_TYPE is not set
 CONFIG_TEXT_BASE=0x18000000
-CONFIG_SYS_MALLOC_LEN=0x2000000
-CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_SPL_GPIO=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
-CONFIG_SPL_LDSCRIPT="arch/arm/cpu/armv8/u-boot-spl.lds"
-CONFIG_ENV_SOURCE_FILE=""
 CONFIG_SF_DEFAULT_SPEED=20000000
-CONFIG_SF_DEFAULT_MODE=0x0
-CONFIG_ENV_SIZE=0x1f000
-CONFIG_DM_GPIO=y
-CONFIG_SPL_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-kevin"
 CONFIG_SPL_TEXT_BASE=0xff8c2000
-CONFIG_OF_LIBFDT_OVERLAY=y
-CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
 CONFIG_DM_RESET=y
-CONFIG_SYS_MONITOR_LEN=0
-# CONFIG_ROCKCHIP_PX30 is not set
-# CONFIG_ROCKCHIP_RK3036 is not set
-# CONFIG_ROCKCHIP_RK3066 is not set
-# CONFIG_ROCKCHIP_RK3128 is not set
-# CONFIG_ROCKCHIP_RK3188 is not set
-# CONFIG_ROCKCHIP_RK322X is not set
-# CONFIG_ROCKCHIP_RK3288 is not set
-# CONFIG_ROCKCHIP_RK3308 is not set
-# CONFIG_ROCKCHIP_RK3328 is not set
-# CONFIG_ROCKCHIP_RK3368 is not set
 CONFIG_ROCKCHIP_RK3399=y
-# CONFIG_ROCKCHIP_RK3568 is not set
-# CONFIG_ROCKCHIP_RK3588 is not set
-# CONFIG_ROCKCHIP_RV1108 is not set
-# CONFIG_ROCKCHIP_RV1126 is not set
-# CONFIG_ROCKCHIP_USB_UART is not set
-# CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
-CONFIG_ROCKCHIP_COMMON_BOARD=y
-CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
-# CONFIG_ROCKCHIP_EXTERNAL_TPL is not set
 CONFIG_ROCKCHIP_BOOT_MODE_REG=0
-# CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON is not set
-CONFIG_ROCKCHIP_STIMER=y
-CONFIG_ROCKCHIP_STIMER_BASE=0xff8680a0
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
-# CONFIG_SPL_ROCKCHIP_EARLYRETURN_TO_BROM is not set
-CONFIG_ROCKCHIP_DISABLE_FORCE_JTAG=y
 # CONFIG_SPL_MMC is not set
-CONFIG_ROCKCHIP_SPI_IMAGE=y
-CONFIG_ROCKCHIP_COMMON_STACK_ADDR=y
-CONFIG_SPL_SERIAL=y
-CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
-CONFIG_TPL_TEXT_BASE=0xff8c2000
-CONFIG_TPL_STACK=0xff8effff
-# CONFIG_SPL_DRIVERS_MISC is not set
-CONFIG_SPL_STACK_R_ADDR=0x04000000
-# CONFIG_TARGET_CHROMEBOOK_BOB is not set
 CONFIG_TARGET_CHROMEBOOK_KEVIN=y
-# CONFIG_TARGET_EVB_RK3399 is not set
-# CONFIG_TARGET_PINEBOOK_PRO_RK3399 is not set
-# CONFIG_TARGET_PINEPHONE_PRO_RK3399 is not set
-# CONFIG_TARGET_PUMA_RK3399 is not set
-# CONFIG_TARGET_ROCK960_RK3399 is not set
-# CONFIG_TARGET_ROCKPI4_RK3399 is not set
-# CONFIG_TARGET_ROCKPRO64_RK3399 is not set
-# CONFIG_TARGET_ROC_PC_RK3399 is not set
 CONFIG_SPL_STACK=0xff8effff
-CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
 CONFIG_SPL_BSS_START_ADDR=0xff8e0000
 CONFIG_SPL_BSS_MAX_SIZE=0x10000
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
-CONFIG_SPL_SYS_MALLOC_F=y
-CONFIG_ERR_PTR_OFFSET=0x0
-CONFIG_SPL_SIZE_LIMIT=0x0
-CONFIG_SPL=y
-CONFIG_PRE_CON_BUF_ADDR=0x0f200000
-CONFIG_PRE_CON_BUF_SZ=4096
 CONFIG_DEBUG_UART_BASE=0xff1a0000
 CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART_BOARD_INIT=y
-CONFIG_IDENT_STRING=""
-CONFIG_SYS_CLK_FREQ=0
-# CONFIG_CHIP_DIP_SCAN is not set
-# CONFIG_SPL_FS_FAT is not set
-# CONFIG_SPL_LIBDISK_SUPPORT is not set
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
-# CONFIG_CMO_BY_VA_ONLY is not set
-# CONFIG_ARMV8_SPL_EXCEPTION_VECTORS is not set
-# CONFIG_ARMV8_MULTIENTRY is not set
-CONFIG_ARMV8_SET_SMPEN=y
-# CONFIG_ARMV8_SWITCH_TO_EL1 is not set
-
-#
-# ARMv8 secure monitor firmware
-#
-# CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT is not set
-# CONFIG_SPL_ARMV8_SEC_FIRMWARE_SUPPORT is not set
-# CONFIG_SPL_RECOVER_DATA_SECTION is not set
-CONFIG_PSCI_RESET=y
-# CONFIG_ARMV8_PSCI is not set
-# CONFIG_ARMV8_EA_EL3_FIRST is not set
-# CONFIG_ARMV8_UDELAY_EVENT_STREAM is not set
-CONFIG_ARMV8_CRYPTO=y
-CONFIG_ARMV8_CE_SHA1=y
-CONFIG_ARMV8_CE_SHA256=y
-# CONFIG_CMD_DEKBLOB is not set
-# CONFIG_IMX_CAAM_DEK_ENCAP is not set
-# CONFIG_IMX_OPTEE_DEK_ENCAP is not set
-# CONFIG_IMX_SECO_DEK_ENCAP is not set
-# CONFIG_IMX_ELE_DEK_ENCAP is not set
-# CONFIG_CMD_HDMIDETECT is not set
-CONFIG_IMX_DCD_ADDR=0x00910000
-CONFIG_SYS_MEM_TOP_HIDE=0x0
 CONFIG_SYS_LOAD_ADDR=0x800800
-
-#
-# ARM debug
-#
-CONFIG_SPL_PAYLOAD="u-boot.bin"
-CONFIG_BUILD_TARGET=""
-# CONFIG_PCI is not set
-CONFIG_FWU_NUM_BANKS=2
-CONFIG_FWU_NUM_IMAGES_PER_BANK=2
 CONFIG_DEBUG_UART=y
-# CONFIG_AHCI is not set
-# CONFIG_OF_BOARD_FIXUP is not set
-
-#
-# Functionality shared between NXP SoCs
-#
-# CONFIG_NXP_ESBC is not set
-CONFIG_SYS_LITTLE_ENDIAN=y
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=120200
-CONFIG_CLANG_VERSION=0
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-# CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
-# CONFIG_CC_OPTIMIZE_FOR_DEBUG is not set
-# CONFIG_OPTIMIZE_INLINING is not set
-# CONFIG_SPL_OPTIMIZE_INLINING is not set
-CONFIG_ARCH_SUPPORTS_LTO=y
-# CONFIG_LTO is not set
-CONFIG_CC_HAS_ASM_INLINE=y
-# CONFIG_XEN is not set
-CONFIG_ENV_VARS_UBOOT_CONFIG=y
-# CONFIG_SYS_BOOT_GET_CMDLINE is not set
-# CONFIG_SYS_BOOT_GET_KBD is not set
-CONFIG_SYS_MALLOC_F=y
-# CONFIG_VALGRIND is not set
-CONFIG_EXPERT=y
-CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y
-CONFIG_SPL_SYS_MALLOC_CLEAR_ON_INIT=y
-# CONFIG_SYS_MALLOC_DEFAULT_TO_INIT is not set
-# CONFIG_TOOLS_DEBUG is not set
-CONFIG_PHYS_64BIT=y
-CONFIG_FDT_64BIT=y
-CONFIG_HAS_ROM=y
-CONFIG_SPL_IMAGE="spl/u-boot-spl.bin"
 CONFIG_REMAKE_ELF=y
-# CONFIG_HAS_BOARD_SIZE_LIMIT is not set
-# CONFIG_SYS_CUSTOM_LDSCRIPT is not set
-CONFIG_PLATFORM_ELFENTRY="_start"
-CONFIG_STACK_SIZE=0x1000000
-CONFIG_SYS_SRAM_BASE=0x0
-CONFIG_SYS_SRAM_SIZE=0x0
-# CONFIG_MP is not set
-CONFIG_HAVE_TEXT_BASE=y
-# CONFIG_HAVE_SYS_UBOOT_START is not set
-CONFIG_SYS_UBOOT_START=0x18000000
-# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
-# CONFIG_API is not set
-
-#
-# Boot options
-#
-
-#
-# Boot images
-#
-# CONFIG_ANDROID_BOOT_IMAGE is not set
-# CONFIG_TIMESTAMP is not set
-CONFIG_FIT=y
-CONFIG_FIT_EXTERNAL_OFFSET=0x0
-CONFIG_FIT_FULL_CHECK=y
-# CONFIG_FIT_SIGNATURE is not set
-# CONFIG_FIT_CIPHER is not set
-# CONFIG_FIT_VERBOSE is not set
-# CONFIG_FIT_BEST_MATCH is not set
-CONFIG_FIT_PRINT=y
-CONFIG_SPL_FIT=y
-# CONFIG_SPL_FIT_PRINT is not set
-# CONFIG_SPL_FIT_FULL_CHECK is not set
 # CONFIG_SPL_FIT_SIGNATURE is not set
-CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_LOAD_FIT_ADDRESS=0x0
-# CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY is not set
-# CONFIG_SPL_LOAD_FIT_FULL is not set
-# CONFIG_SPL_FIT_IMAGE_POST_PROCESS is not set
-CONFIG_SPL_FIT_SOURCE=""
-# CONFIG_USE_SPL_FIT_GENERATOR is not set
-CONFIG_PXE_UTILS=y
-CONFIG_BOOT_DEFAULTS_FEATURES=y
-CONFIG_BOOT_DEFAULTS_CMDS=y
-CONFIG_BOOT_DEFAULTS=y
-CONFIG_BOOTSTD=y
-# CONFIG_SPL_BOOTSTD is not set
-CONFIG_BOOTSTD_FULL=y
-CONFIG_BOOTSTD_DEFAULTS=y
-CONFIG_BOOTSTD_BOOTCOMMAND=y
-CONFIG_BOOTMETH_GLOBAL=y
-# CONFIG_BOOTMETH_ANDROID is not set
-# CONFIG_BOOTMETH_CROS is not set
-CONFIG_BOOTMETH_EXTLINUX=y
-CONFIG_BOOTMETH_EXTLINUX_PXE=y
-CONFIG_BOOTMETH_EFILOADER=y
-CONFIG_BOOTMETH_EFI_BOOTMGR=y
-CONFIG_BOOTMETH_VBE=y
-CONFIG_BOOTMETH_DISTRO=y
-# CONFIG_SPL_BOOTMETH_VBE is not set
-CONFIG_BOOTMETH_VBE_REQUEST=y
-# CONFIG_SPL_BOOTMETH_VBE_REQUEST is not set
-CONFIG_BOOTMETH_VBE_SIMPLE=y
-CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
-# CONFIG_SPL_BOOTMETH_VBE_SIMPLE is not set
-CONFIG_EXPO=y
-CONFIG_BOOTMETH_SCRIPT=y
-CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
-CONFIG_SUPPORT_RAW_INITRD=y
-# CONFIG_CHROMEOS is not set
-# CONFIG_CHROMEOS_VBOOT is not set
-# CONFIG_RAMBOOT_PBL is not set
-CONFIG_SYS_BOOT_RAMDISK_HIGH=y
-# CONFIG_DISTRO_DEFAULTS is not set
-
-#
-# Boot timing
-#
-# CONFIG_BOOTSTAGE is not set
-# CONFIG_SHOW_BOOT_PROGRESS is not set
-# CONFIG_SPL_SHOW_BOOT_PROGRESS is not set
-
-#
-# Boot media
-#
-# CONFIG_NAND_BOOT is not set
-# CONFIG_ONENAND_BOOT is not set
-# CONFIG_QSPI_BOOT is not set
-# CONFIG_SATA_BOOT is not set
-# CONFIG_SD_BOOT is not set
-# CONFIG_SD_BOOT_QSPI is not set
-# CONFIG_SPI_BOOT is not set
-
-#
-# Autoboot options
-#
-CONFIG_AUTOBOOT=y
-CONFIG_BOOTDELAY=2
-# CONFIG_AUTOBOOT_KEYED is not set
-# CONFIG_AUTOBOOT_USE_MENUKEY is not set
-# CONFIG_AUTOBOOT_MENU_SHOW is not set
-# CONFIG_BOOT_RETRY is not set
-
-#
-# Image support
-#
-# CONFIG_IMAGE_PRE_LOAD is not set
-
-#
-# Devicetree fixup
-#
-# CONFIG_OF_ENV_SETUP is not set
-# CONFIG_OF_BOARD_SETUP is not set
-# CONFIG_OF_SYSTEM_SETUP is not set
-# CONFIG_OF_STDOUT_VIA_ALIAS is not set
-# CONFIG_FDT_FIXUP_PARTITIONS is not set
-# CONFIG_FDT_SIMPLEFB is not set
-CONFIG_ARCH_FIXUP_FDT_MEMORY=y
-# CONFIG_USE_BOOTARGS is not set
-# CONFIG_BOOTARGS_SUBST is not set
-CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
 CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
-CONFIG_PREBOOT_DEFINED=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb"
-# CONFIG_SAVE_PREV_BL_FDT_ADDR is not set
-# CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR is not set
-
-#
-# Configuration editor
-#
-# CONFIG_CEDIT is not set
-
-#
-# Console
-#
-CONFIG_MENU=y
-# CONFIG_CONSOLE_RECORD is not set
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1044
-# CONFIG_DISABLE_CONSOLE is not set
-CONFIG_LOGLEVEL=4
-CONFIG_SPL_LOGLEVEL=4
-# CONFIG_SILENT_CONSOLE is not set
-# CONFIG_SPL_SILENT_CONSOLE is not set
-# CONFIG_TPL_SILENT_CONSOLE is not set
-CONFIG_PRE_CONSOLE_BUFFER=y
-CONFIG_CONSOLE_FLUSH_SUPPORT=y
-# CONFIG_CONSOLE_FLUSH_ON_NEWLINE is not set
-CONFIG_CONSOLE_MUX=y
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
-# CONFIG_SYS_CONSOLE_ENV_OVERWRITE is not set
-# CONFIG_SYS_CONSOLE_INFO_QUIET is not set
-CONFIG_SYS_STDIO_DEREGISTER=y
-# CONFIG_SPL_SYS_STDIO_DEREGISTER is not set
-CONFIG_SYS_DEVICE_NULLDEV=y
-
-#
-# Logging
-#
-CONFIG_LOG=y
-CONFIG_LOG_MAX_LEVEL=6
-CONFIG_LOG_DEFAULT_LEVEL=6
-CONFIG_LOG_CONSOLE=y
-# CONFIG_LOGF_FILE is not set
-# CONFIG_LOGF_LINE is not set
-# CONFIG_LOGF_FUNC is not set
-CONFIG_LOGF_FUNC_PAD=20
-# CONFIG_LOG_SYSLOG is not set
-# CONFIG_SPL_LOG is not set
-# CONFIG_LOG_ERROR_RETURN is not set
-
-#
-# Init options
-#
-# CONFIG_BOARD_TYPES is not set
 # CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
-
-#
-# Start-up hooks
-#
-CONFIG_CYCLIC=y
-# CONFIG_SPL_CYCLIC is not set
-CONFIG_CYCLIC_MAX_CPU_TIME_US=5000
-CONFIG_EVENT=y
-CONFIG_EVENT_DYNAMIC=y
-# CONFIG_EVENT_DEBUG is not set
-# CONFIG_ARCH_MISC_INIT is not set
-# CONFIG_BOARD_EARLY_INIT_F is not set
 CONFIG_BOARD_EARLY_INIT_R=y
-# CONFIG_BOARD_POSTCLK_INIT is not set
-CONFIG_BOARD_LATE_INIT=y
-# CONFIG_CLOCKS is not set
-# CONFIG_HWCONFIG is not set
-CONFIG_LAST_STAGE_INIT=y
-CONFIG_MISC_INIT_R=y
-# CONFIG_SYS_MALLOC_BOOTPARAMS is not set
-# CONFIG_ID_EEPROM is not set
-# CONFIG_RESET_PHY_R is not set
-
-#
-# Security support
-#
-CONFIG_HASH=y
-CONFIG_SPL_HASH=y
-# CONFIG_STACKPROTECTOR is not set
-# CONFIG_BOARD_RNG_SEED is not set
-
-#
-# Update support
-#
-# CONFIG_UPDATE_TFTP is not set
-# CONFIG_ANDROID_AB is not set
-
-#
-# Blob list
-#
 CONFIG_BLOBLIST=y
-CONFIG_SPL_BLOBLIST=y
-CONFIG_BLOBLIST_FIXED=y
-# CONFIG_BLOBLIST_ALLOC is not set
 CONFIG_BLOBLIST_ADDR=0x100000
 CONFIG_BLOBLIST_SIZE=0x1000
-CONFIG_BLOBLIST_SIZE_RELOC=0x1000
-CONFIG_SPL_BLOBLIST_FIXED=y
-# CONFIG_SPL_BLOBLIST_ALLOC is not set
-CONFIG_SUPPORT_SPL=y
-CONFIG_SUPPORT_TPL=y
-
-#
-# SPL configuration options
-#
-CONFIG_SPL_FRAMEWORK=y
-# CONFIG_SPL_FRAMEWORK_BOARD_INIT_F is not set
 CONFIG_SPL_MAX_SIZE=0x1e000
 CONFIG_SPL_PAD_TO=0x7f8000
-# CONFIG_SPL_NO_BSS_LIMIT is not set
-CONFIG_SPL_BSS_LIMIT=y
-# CONFIG_SPL_FOOTPRINT_LIMIT is not set
-CONFIG_SPL_SYS_STACK_F_CHECK_BYTE=0xaa
-# CONFIG_SPL_SYS_REPORT_STACK_F_USAGE is not set
-# CONFIG_SPL_SHOW_ERRORS is not set
-CONFIG_SPL_BINMAN_SYMBOLS=y
-CONFIG_SPL_BINMAN_UBOOT_SYMBOLS=y
 CONFIG_HANDOFF=y
-CONFIG_SPL_HANDOFF=y
-# CONFIG_SPL_SOC_INIT is not set
-CONFIG_SPL_BOARD_INIT=y
-# CONFIG_SPL_BOOTROM_SUPPORT is not set
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
-# CONFIG_SPL_LOAD_IMX_CONTAINER is not set
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_SEPARATE_BSS=y
-# CONFIG_SPL_SYS_MALLOC is not set
-CONFIG_SPL_BANNER_PRINT=y
-# CONFIG_SPL_DISPLAY_PRINT is not set
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x0
-# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set
-# CONFIG_SPL_FIT_IMAGE_TINY is not set
-# CONFIG_SPL_CACHE is not set
-# CONFIG_SPL_CPU is not set
-# CONFIG_SPL_CRYPTO is not set
-# CONFIG_SPL_DMA is not set
-# CONFIG_SPL_ENV_SUPPORT is not set
-# CONFIG_SPL_FS_EXT4 is not set
-# CONFIG_SPL_FS_SQUASHFS is not set
-# CONFIG_SPL_FAT_WRITE is not set
-# CONFIG_SPL_FPGA is not set
-# CONFIG_SPL_I2C is not set
-# CONFIG_SPL_DM_MAILBOX is not set
-# CONFIG_SPL_MEMORY is not set
-# CONFIG_SPL_MPC8XXX_INIT_DDR is not set
-# CONFIG_SPL_MTD is not set
-# CONFIG_SPL_MUSB_NEW is not set
-# CONFIG_SPL_NAND_SUPPORT is not set
-# CONFIG_SPL_NAND_DRIVERS is not set
-# CONFIG_SPL_NAND_ECC is not set
-# CONFIG_SPL_NAND_SIMPLE is not set
-# CONFIG_SPL_UBI is not set
-CONFIG_SPL_DM_SPI_FLASH=y
-# CONFIG_SPL_NET is not set
-# CONFIG_SPL_NOR_SUPPORT is not set
-# CONFIG_SPL_XIP_SUPPORT is not set
-# CONFIG_SPL_ONENAND_SUPPORT is not set
-# CONFIG_SPL_OS_BOOT is not set
-# CONFIG_SPL_PCI is not set
-# CONFIG_SPL_PCH is not set
-# CONFIG_SPL_POST_MEM_SUPPORT is not set
-# CONFIG_SPL_DM_RESET is not set
-# CONFIG_SPL_POWER is not set
-# CONFIG_SPL_POWER_DOMAIN is not set
-# CONFIG_SPL_RAM_SUPPORT is not set
-# CONFIG_SPL_REMOTEPROC is not set
-# CONFIG_SPL_RTC is not set
-# CONFIG_SPL_SATA is not set
-# CONFIG_SPL_NVME is not set
-CONFIG_SPL_SPI_FLASH_TINY=y
-# CONFIG_SPL_SPI_FLASH_MTD is not set
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
-# CONFIG_SPL_THERMAL is not set
-# CONFIG_SPL_WATCHDOG is not set
-# CONFIG_SPL_YMODEM_SUPPORT is not set
-CONFIG_SPL_ATF=y
-# CONFIG_SPL_ATF_LOAD_IMAGE_V2 is not set
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
-# CONFIG_SPL_OPTEE_IMAGE is not set
-CONFIG_SPL_TARGET=""
-# CONFIG_TPL is not set
-# CONFIG_VPL is not set
-CONFIG_CMDLINE=y
-CONFIG_HUSH_PARSER=y
-
-#
-# Hush flavor to use
-#
-CONFIG_HUSH_OLD_PARSER=y
-# CONFIG_HUSH_MODERN_PARSER is not set
-CONFIG_CMDLINE_EDITING=y
-# CONFIG_CMDLINE_PS_SUPPORT is not set
-CONFIG_AUTO_COMPLETE=y
-CONFIG_SYS_LONGHELP=y
-CONFIG_SYS_PROMPT="=> "
-CONFIG_SYS_PROMPT_HUSH_PS2="> "
-CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_XTRACE=y
-
-#
-# Commands
-#
-
-#
-# Info commands
-#
-CONFIG_CMD_BDI=y
-# CONFIG_CMD_BDINFO_EXTRA is not set
-# CONFIG_CMD_CONFIG is not set
-CONFIG_CMD_CONSOLE=y
-# CONFIG_CMD_HISTORY is not set
-# CONFIG_CMD_LICENSE is not set
-# CONFIG_CMD_PMC is not set
-# CONFIG_CMD_SMBIOS is not set
-
-#
-# Boot commands
-#
-CONFIG_CMD_BOOTD=y
-CONFIG_CMD_BOOTM=y
-CONFIG_CMD_BOOTDEV=y
-CONFIG_CMD_BOOTFLOW=y
-CONFIG_CMD_BOOTFLOW_FULL=y
-CONFIG_CMD_BOOTFLOW_BOOTDELAY=8
-CONFIG_CMD_BOOTMETH=y
-CONFIG_BOOTM_EFI=y
-CONFIG_BOOTM_ELF=y
 CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_BOOTI=y
-CONFIG_BOOTM_LINUX=y
-CONFIG_BOOTM_NETBSD=y
-# CONFIG_BOOTM_OPENRTOS is not set
-# CONFIG_BOOTM_OSE is not set
-CONFIG_BOOTM_PLAN9=y
-CONFIG_BOOTM_RTEMS=y
-CONFIG_CMD_VBE=y
-CONFIG_BOOTM_VXWORKS=y
-CONFIG_CMD_BOOTEFI=y
-CONFIG_CMD_BOOTEFI_BINARY=y
-CONFIG_CMD_BOOTEFI_BOOTMGR=y
-CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
-CONFIG_CMD_BOOTEFI_HELLO=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 CONFIG_CMD_BOOTMENU=y
-# CONFIG_CMD_ADTIMG is not set
-CONFIG_CMD_ELF=y
-# CONFIG_CMD_ELF_FDT_SETUP is not set
-CONFIG_CMD_FDT=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_RUN=y
-CONFIG_CMD_IMI=y
-CONFIG_CMD_XIMG=y
-CONFIG_SYS_XIMG_LEN=0x800000
-# CONFIG_CMD_SPL is not set
-
-#
-# Environment commands
-#
-# CONFIG_CMD_ASKENV is not set
-CONFIG_CMD_EXPORTENV=y
-CONFIG_CMD_IMPORTENV=y
-CONFIG_CMD_EDITENV=y
-# CONFIG_CMD_GREPENV is not set
-CONFIG_CMD_SAVEENV=y
-# CONFIG_CMD_ERASEENV is not set
-CONFIG_CMD_ENV_EXISTS=y
-# CONFIG_CMD_ENV_CALLBACK is not set
-# CONFIG_CMD_ENV_FLAGS is not set
 CONFIG_CMD_NVEDIT_EFI=y
-# CONFIG_CMD_NVEDIT_INDIRECT is not set
-# CONFIG_CMD_NVEDIT_INFO is not set
-# CONFIG_CMD_NVEDIT_LOAD is not set
-# CONFIG_CMD_NVEDIT_SELECT is not set
-
-#
-# Memory commands
-#
-# CONFIG_CMD_BINOP is not set
-CONFIG_CMD_BLOBLIST=y
-CONFIG_CMD_CRC32=y
-# CONFIG_CRC32_VERIFY is not set
-# CONFIG_CMD_EEPROM is not set
-CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=0
-# CONFIG_LOOPW is not set
-# CONFIG_CMD_MD5SUM is not set
-# CONFIG_CMD_MEMINFO is not set
-CONFIG_CMD_MEMORY=y
-# CONFIG_CMD_MEM_SEARCH is not set
-# CONFIG_CMD_MX_CYCLIC is not set
-CONFIG_CMD_RANDOM=y
-# CONFIG_CMD_MEMTEST is not set
-# CONFIG_CMD_SHA1SUM is not set
-# CONFIG_CMD_STRINGS is not set
-
-#
-# Compression commands
-#
-CONFIG_CMD_LZMADEC=y
-CONFIG_CMD_UNLZ4=y
-CONFIG_CMD_UNZIP=y
-# CONFIG_CMD_ZIP is not set
-
-#
-# Device access commands
-#
-# CONFIG_CMD_ADC is not set
-# CONFIG_CMD_BCB is not set
-# CONFIG_CMD_BIND is not set
-# CONFIG_CMD_CLK is not set
-# CONFIG_CMD_DEMO is not set
-# CONFIG_CMD_DFU is not set
-CONFIG_CMD_DM=y
-# CONFIG_CMD_FUSE is not set
 CONFIG_CMD_GPIO=y
-# CONFIG_CMD_GPIO_READ is not set
-# CONFIG_CMD_PWM is not set
 CONFIG_CMD_GPT=y
-# CONFIG_CMD_GPT_RENAME is not set
-# CONFIG_CMD_IDE is not set
-# CONFIG_CMD_IO is not set
-# CONFIG_CMD_IOTRACE is not set
 CONFIG_CMD_I2C=y
-CONFIG_CMD_LOADB=y
-# CONFIG_CMD_LOADM is not set
-CONFIG_CMD_LOADS=y
-# CONFIG_LOADS_ECHO is not set
-# CONFIG_CMD_SAVES is not set
-# CONFIG_SYS_LOADS_BAUD_CHANGE is not set
-CONFIG_CMD_LOADXY_TIMEOUT=90
-# CONFIG_CMD_LSBLK is not set
-# CONFIG_CMD_MBR is not set
-# CONFIG_CMD_MISC is not set
 CONFIG_CMD_MMC=y
-# CONFIG_CMD_BKOPS_ENABLE is not set
-# CONFIG_CMD_MMC_REG is not set
-# CONFIG_CMD_MMC_SWRITE is not set
-# CONFIG_CMD_CLONE is not set
-# CONFIG_CMD_MTD is not set
-# CONFIG_CMD_ONENAND is not set
-# CONFIG_CMD_OSD is not set
-CONFIG_CMD_PART=y
-# CONFIG_CMD_PCI is not set
-CONFIG_CMD_PINMUX=y
-CONFIG_CMD_POWEROFF=y
-# CONFIG_CMD_READ is not set
-# CONFIG_CMD_SATA is not set
-# CONFIG_CMD_SDRAM is not set
-CONFIG_CMD_SF=y
 CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SPI=y
-CONFIG_DEFAULT_SPI_BUS=0
-CONFIG_DEFAULT_SPI_MODE=0x0
 CONFIG_CMD_USB=y
-# CONFIG_CMD_USB_SDP is not set
-# CONFIG_CMD_RKMTD is not set
-# CONFIG_CMD_WRITE is not set
-
-#
-# Shell scripting commands
-#
-# CONFIG_CMD_CAT is not set
-CONFIG_CMD_ECHO=y
-CONFIG_CMD_ITEST=y
-CONFIG_CMD_SOURCE=y
 # CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_XXD is not set
-
-#
-# Android support commands
-#
-CONFIG_CMD_NET=y
-CONFIG_CMD_BOOTP=y
-CONFIG_CMD_DHCP=y
-# CONFIG_BOOTP_MAY_FAIL is not set
-CONFIG_BOOTP_BOOTPATH=y
-# CONFIG_BOOTP_VENDOREX is not set
-# CONFIG_BOOTP_BOOTFILESIZE is not set
-CONFIG_BOOTP_DNS=y
-# CONFIG_BOOTP_DNS2 is not set
-CONFIG_BOOTP_GATEWAY=y
-CONFIG_BOOTP_HOSTNAME=y
-# CONFIG_BOOTP_PREFER_SERVERIP is not set
-CONFIG_BOOTP_SUBNETMASK=y
-# CONFIG_BOOTP_NISDOMAIN is not set
-# CONFIG_BOOTP_NTPSERVER is not set
-# CONFIG_CMD_PCAP is not set
-CONFIG_BOOTP_PXE=y
-CONFIG_BOOTP_PXE_CLIENTARCH=0x16
-# CONFIG_BOOTP_PXE_DHCP_OPTION is not set
-CONFIG_BOOTP_VCI_STRING="U-Boot.armv8"
-CONFIG_CMD_TFTPBOOT=y
-# CONFIG_CMD_TFTPPUT is not set
-# CONFIG_CMD_TFTPSRV is not set
-CONFIG_NET_TFTP_VARS=y
-# CONFIG_CMD_RARP is not set
-# CONFIG_CMD_NFS is not set
-# CONFIG_SYS_DISABLE_AUTOLOAD is not set
-# CONFIG_CMD_WGET is not set
-CONFIG_CMD_MII=y
-CONFIG_CMD_MDIO=y
-CONFIG_CMD_PING=y
-# CONFIG_CMD_CDP is not set
-# CONFIG_CMD_SNTP is not set
-# CONFIG_CMD_DNS is not set
-# CONFIG_CMD_LINK_LOCAL is not set
-# CONFIG_CMD_ETHSW is not set
-CONFIG_CMD_PXE=y
-# CONFIG_CMD_WOL is not set
-
-#
-# Misc commands
-#
-# CONFIG_CMD_2048 is not set
-# CONFIG_CMD_BMP is not set
-# CONFIG_CMD_BSP is not set
-CONFIG_CMD_BLOCK_CACHE=y
-# CONFIG_CMD_CACHE is not set
-# CONFIG_CMD_CONITRACE is not set
-CONFIG_CMD_CLS=y
 CONFIG_CMD_EFIDEBUG=y
-CONFIG_CMD_EFICONFIG=y
-# CONFIG_CMD_EXCEPTION is not set
-# CONFIG_CMD_INI is not set
-# CONFIG_CMD_DATE is not set
 CONFIG_CMD_TIME=y
-# CONFIG_CMD_GETTIME is not set
-# CONFIG_CMD_PAUSE is not set
-# CONFIG_CMD_RNG is not set
-# CONFIG_CMD_KASLRSEED is not set
-CONFIG_CMD_SLEEP=y
-# CONFIG_CMD_TIMER is not set
-# CONFIG_CMD_SYSBOOT is not set
-# CONFIG_CMD_QFW is not set
-# CONFIG_CMD_PSTORE is not set
-# CONFIG_CMD_TERMINAL is not set
-# CONFIG_CMD_UUID is not set
-CONFIG_CMD_VIDCONSOLE=y
-# CONFIG_CMD_SELECT_FONT is not set
-
-#
-# TI specific command line interface
-#
-
-#
-# Power commands
-#
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
-
-#
-# Security commands
-#
-# CONFIG_CMD_AES is not set
-# CONFIG_CMD_BLOB is not set
-# CONFIG_CMD_HASH is not set
-# CONFIG_CMD_HVC is not set
-# CONFIG_CMD_SMC is not set
-
-#
-# Firmware commands
-#
-CONFIG_CMD_CROS_EC=y
-
-#
-# Filesystem commands
-#
-# CONFIG_CMD_BTRFS is not set
-# CONFIG_CMD_EROFS is not set
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-# CONFIG_CMD_EXT4_WRITE is not set
-CONFIG_CMD_FAT=y
-# CONFIG_CMD_SQUASHFS is not set
-CONFIG_CMD_FS_GENERIC=y
-# CONFIG_CMD_FS_UUID is not set
-# CONFIG_CMD_JFFS2 is not set
-# CONFIG_CMD_MTDPARTS is not set
-CONFIG_MTDIDS_DEFAULT=""
-CONFIG_MTDPARTS_DEFAULT=""
-# CONFIG_CMD_ZFS is not set
-
-#
-# Debug commands
-#
-CONFIG_CMD_CYCLIC=y
-# CONFIG_CMD_DIAG is not set
-# CONFIG_CMD_EVENT is not set
 CONFIG_CMD_LOG=y
-# CONFIG_CMD_UBI is not set
 CONFIG_MMC_SPEED_MODE_SET=y
-
-#
-# Partition Types
-#
-CONFIG_PARTITIONS=y
-CONFIG_SPL_PARTITIONS=y
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_SPL_MAC_PARTITION is not set
-CONFIG_DOS_PARTITION=y
-CONFIG_SPL_DOS_PARTITION=y
-CONFIG_ISO_PARTITION=y
-# CONFIG_SPL_ISO_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_SPL_AMIGA_PARTITION is not set
-CONFIG_EFI_PARTITION=y
-CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=128
-CONFIG_EFI_PARTITION_ENTRIES_OFF=0
-CONFIG_SPL_EFI_PARTITION=y
-CONFIG_PARTITION_UUIDS=y
-CONFIG_SPL_PARTITION_UUIDS=y
-CONFIG_PARTITION_TYPE_GUID=y
-# CONFIG_SPL_PARTITION_TYPE_GUID is not set
-CONFIG_SUPPORT_OF_CONTROL=y
-CONFIG_PYLIBFDT=y
-CONFIG_DTOC=y
-CONFIG_BINMAN=y
-
-#
-# Device Tree Control
-#
-CONFIG_OF_CONTROL=y
-CONFIG_OF_REAL=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_LIVE=y
-CONFIG_OF_UPSTREAM=y
-# CONFIG_OF_UPSTREAM_BUILD_VENDOR is not set
-CONFIG_OF_SEPARATE=y
-# CONFIG_OF_EMBED is not set
-# CONFIG_OF_INITIAL_DTB_READONLY is not set
-# CONFIG_OF_BOARD is not set
-# CONFIG_OF_OMIT_DTB is not set
-CONFIG_DEVICE_TREE_INCLUDES=""
-CONFIG_OF_LIST="rockchip/rk3399-gru-kevin"
-# CONFIG_MULTI_DTB_FIT is not set
-# CONFIG_SPL_MULTI_DTB_FIT is not set
-CONFIG_SPL_OF_LIST="rockchip/rk3399-gru-kevin"
-CONFIG_OF_TAG_MIGRATE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-# CONFIG_OF_DTB_PROPS_REMOVE is not set
-# CONFIG_SPL_OF_PLATDATA is not set
-CONFIG_SPL_OF_REAL=y
-
-#
-# Environment
-#
-CONFIG_ENV_SUPPORT=y
-CONFIG_SAVEENV=y
-# CONFIG_ENV_OVERWRITE is not set
-# CONFIG_OVERWRITE_ETHADDR_ONCE is not set
-CONFIG_ENV_MIN_ENTRIES=64
-CONFIG_ENV_MAX_ENTRIES=512
-CONFIG_ENV_IS_DEFAULT=y
-CONFIG_ENV_IS_NOWHERE=y
-# CONFIG_ENV_IS_IN_EEPROM is not set
-# CONFIG_ENV_IS_IN_FAT is not set
-# CONFIG_ENV_IS_IN_EXT4 is not set
-# CONFIG_ENV_IS_IN_FLASH is not set
-# CONFIG_ENV_IS_IN_MMC is not set
-# CONFIG_ENV_IS_IN_NAND is not set
-# CONFIG_ENV_IS_IN_NVRAM is not set
-# CONFIG_ENV_IS_IN_REMOTE is not set
-# CONFIG_ENV_IS_IN_SPI_FLASH is not set
-# CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-# CONFIG_USE_DEFAULT_ENV_FILE is not set
-# CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set
-# CONFIG_ENV_IMPORT_FDT is not set
-# CONFIG_ENV_APPEND is not set
-# CONFIG_ENV_WRITEABLE_LIST is not set
-# CONFIG_ENV_ACCESS_IGNORE_FORCE is not set
-# CONFIG_USE_BOOTFILE is not set
-# CONFIG_USE_ETHPRIME is not set
-# CONFIG_USE_HOSTNAME is not set
-# CONFIG_VERSION_VARIABLE is not set
-CONFIG_NET=y
-CONFIG_ARP_TIMEOUT=5000
-CONFIG_NET_RETRY_COUNT=5
-# CONFIG_PROT_UDP is not set
-CONFIG_BOOTDEV_ETH=y
-# CONFIG_BOOTP_SEND_HOSTNAME is not set
-# CONFIG_NET_RANDOM_ETHADDR is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_IP_DEFRAG is not set
-# CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set
-CONFIG_TFTP_BLOCKSIZE=1468
-# CONFIG_TFTP_PORT is not set
-CONFIG_TFTP_WINDOWSIZE=1
-# CONFIG_TFTP_TSIZE is not set
-# CONFIG_SERVERIP_FROM_PROXYDHCP is not set
-CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS=100
-# CONFIG_KEEP_SERVERADDR is not set
-# CONFIG_UDP_CHECKSUM is not set
-# CONFIG_BOOTP_SERVERIP is not set
-CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64
-# CONFIG_USE_GATEWAYIP is not set
-# CONFIG_USE_IPADDR is not set
-# CONFIG_USE_NETMASK is not set
-# CONFIG_USE_ROOTPATH is not set
-# CONFIG_USE_SERVERIP is not set
-# CONFIG_PROT_TCP is not set
-# CONFIG_IPV6 is not set
-CONFIG_SYS_RX_ETH_BUFFER=4
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_DM=y
-CONFIG_SPL_DM=y
-# CONFIG_DM_WARN is not set
-# CONFIG_SPL_DM_WARN is not set
-# CONFIG_DM_DEBUG is not set
-# CONFIG_DM_STATS is not set
-# CONFIG_SPL_DM_STATS is not set
-CONFIG_DM_DEVICE_REMOVE=y
-CONFIG_DM_EVENT=y
-# CONFIG_SPL_DM_DEVICE_REMOVE is not set
-CONFIG_DM_STDIO=y
-CONFIG_DM_SEQ_ALIAS=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_SPL_DM_INLINE_OFNODE=y
-# CONFIG_DM_DMA is not set
-CONFIG_REGMAP=y
-CONFIG_SPL_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_SPL_SYSCON=y
-# CONFIG_DEVRES is not set
-CONFIG_SIMPLE_BUS=y
-CONFIG_SPL_SIMPLE_BUS=y
-# CONFIG_SIMPLE_BUS_CORRECT_RANGE is not set
-CONFIG_OF_TRANSLATE=y
-# CONFIG_SPL_OF_TRANSLATE is not set
-# CONFIG_TRANSLATION_OFFSET is not set
-CONFIG_OFNODE_MULTI_TREE=y
-CONFIG_OFNODE_MULTI_TREE_MAX=4
-CONFIG_BOUNCE_BUFFER=y
-CONFIG_ADC=y
-# CONFIG_SPL_ADC is not set
-# CONFIG_ADC_EXYNOS is not set
-# CONFIG_ADC_SANDBOX is not set
-# CONFIG_SARADC_MESON is not set
-CONFIG_SARADC_ROCKCHIP=y
-# CONFIG_ADC_IMX93 is not set
-# CONFIG_SATA is not set
-# CONFIG_SCSI_AHCI is not set
-
-#
-# SATA/SCSI device support
-#
-# CONFIG_AXI is not set
-
-#
-# Bus devices
-#
-CONFIG_BLK=y
-CONFIG_SPL_BLK=y
-CONFIG_BLOCK_CACHE=y
-# CONFIG_BLKMAP is not set
-# CONFIG_SPL_BLOCK_CACHE is not set
-# CONFIG_EFI_MEDIA is not set
-# CONFIG_SPL_BLK_FS is not set
-# CONFIG_IDE is not set
-# CONFIG_LBA48 is not set
-# CONFIG_SYS_64BIT_LBA is not set
-# CONFIG_RKMTD is not set
-# CONFIG_BOOTCOUNT_LIMIT is not set
-
-#
-# Button Support
-#
-# CONFIG_BUTTON is not set
-
-#
-# Cache Controller drivers
-#
-# CONFIG_CACHE is not set
-# CONFIG_L2X0_CACHE is not set
-# CONFIG_ANDES_L2_CACHE is not set
-# CONFIG_NCORE_CACHE is not set
-# CONFIG_SIFIVE_CCACHE is not set
-# CONFIG_SIFIVE_PL2 is not set
-
-#
-# Clock
-#
-CONFIG_CLK=y
-CONFIG_SPL_CLK=y
-# CONFIG_SPL_CLK_CCF is not set
-# CONFIG_CLK_CCF is not set
-# CONFIG_CLK_GPIO is not set
-# CONFIG_SPL_CLK_GPIO is not set
-# CONFIG_CLK_CDCE9XX is not set
-# CONFIG_CLK_ICS8N3QV01 is not set
-# CONFIG_CLK_K210 is not set
-# CONFIG_CLK_MPC83XX is not set
-# CONFIG_CLK_XLNX_CLKWZRD is not set
-# CONFIG_COMMON_CLK_ADI_SHARED is not set
-# CONFIG_CLK_AT91 is not set
-# CONFIG_CLK_RCAR is not set
-# CONFIG_CLK_RCAR_CPG_LIB is not set
-# CONFIG_CLK_SIFIVE is not set
-# CONFIG_CLK_TI_AM3_DPLL is not set
-# CONFIG_CLK_TI_CTRL is not set
-# CONFIG_CLK_TI_GATE is not set
-# CONFIG_CLK_K3 is not set
-# CONFIG_SPL_CLK_K3 is not set
-# CONFIG_CPU is not set
-
-#
-# Hardware crypto devices
-#
-# CONFIG_DM_HASH is not set
-# CONFIG_FSL_CAAM is not set
-CONFIG_CAAM_64BIT=y
-# CONFIG_SYS_FSL_SEC_BE is not set
-# CONFIG_SYS_FSL_SEC_LE is not set
-# CONFIG_FSL_DCP_RNG is not set
-# CONFIG_NPCM_AES is not set
-# CONFIG_NPCM_SHA is not set
-# CONFIG_DDR_SPD is not set
-# CONFIG_IMX_SNPS_DDR_PHY is not set
-
-#
-# Demo for driver model
-#
-# CONFIG_DM_DEMO is not set
-
-#
-# DFU support
-#
-
-#
-# DMA Support
-#
-# CONFIG_DMA is not set
-# CONFIG_DMA_LPC32XX is not set
-# CONFIG_TI_EDMA3 is not set
-# CONFIG_DMA_LEGACY is not set
-
-#
-# Extcon Support
-#
-# CONFIG_EXTCON is not set
-
-#
-# Fastboot support
-#
-# CONFIG_UDP_FUNCTION_FASTBOOT is not set
-# CONFIG_TCP_FUNCTION_FASTBOOT is not set
-CONFIG_FIRMWARE=y
-# CONFIG_SPL_FIRMWARE is not set
-CONFIG_ARM_PSCI_FW=y
-# CONFIG_ZYNQMP_FIRMWARE is not set
-# CONFIG_ARM_SMCCC_FEATURES is not set
-# CONFIG_ARM_FFA_TRANSPORT is not set
-# CONFIG_SCMI_FIRMWARE is not set
-# CONFIG_DM_FUZZING_ENGINE is not set
-
-#
-# FPGA support
-#
-# CONFIG_FPGA_ALTERA is not set
-# CONFIG_FPGA_SOCFPGA is not set
-# CONFIG_FPGA_LATTICE is not set
-# CONFIG_FPGA_XILINX is not set
-# CONFIG_DM_FPGA is not set
-# CONFIG_FWU_MDATA is not set
-CONFIG_GPIO=y
-CONFIG_SPL_DM_GPIO=y
-# CONFIG_GPIO_HOG is not set
-# CONFIG_SPL_GPIO_HOG is not set
-# CONFIG_DM_GPIO_LOOKUP_LABEL is not set
-# CONFIG_SPL_DM_GPIO_LOOKUP_LABEL is not set
-# CONFIG_ALTERA_PIO is not set
-# CONFIG_BCM2835_GPIO is not set
-# CONFIG_DWAPB_GPIO is not set
-# CONFIG_AT91_GPIO is not set
-# CONFIG_ATMEL_PIO4 is not set
-# CONFIG_ASPEED_GPIO is not set
-# CONFIG_DA8XX_GPIO is not set
-# CONFIG_FXL6408_GPIO is not set
-# CONFIG_HIKEY_GPIO is not set
-# CONFIG_INTEL_BROADWELL_GPIO is not set
-# CONFIG_INTEL_GPIO is not set
-# CONFIG_INTEL_ICH6_GPIO is not set
-# CONFIG_IMX_RGPIO2P is not set
-# CONFIG_IPROC_GPIO is not set
-# CONFIG_HSDK_CREG_GPIO is not set
-# CONFIG_KIRKWOOD_GPIO is not set
-# CONFIG_LPC32XX_GPIO is not set
-# CONFIG_MAX7320_GPIO is not set
-# CONFIG_MCP230XX_GPIO is not set
-# CONFIG_MSM_GPIO is not set
-# CONFIG_MXC_GPIO is not set
-# CONFIG_MXS_GPIO is not set
-# CONFIG_NPCM_GPIO is not set
-# CONFIG_CMD_PCA953X is not set
-# CONFIG_PCF8575_GPIO is not set
 CONFIG_ROCKCHIP_GPIO=y
-# CONFIG_XILINX_GPIO is not set
-# CONFIG_TCA642X is not set
-# CONFIG_TEGRA_GPIO is not set
-# CONFIG_TEGRA186_GPIO is not set
-# CONFIG_VYBRID_GPIO is not set
-# CONFIG_SIFIVE_GPIO is not set
-# CONFIG_ZYNQ_GPIO is not set
-# CONFIG_DM_74X164 is not set
-# CONFIG_DM_PCA953X is not set
-# CONFIG_SPL_DM_PCA953X is not set
-# CONFIG_PCA953X is not set
-# CONFIG_MPC8XXX_GPIO is not set
-# CONFIG_MPC8XX_GPIO is not set
-# CONFIG_NX_GPIO is not set
-# CONFIG_NOMADIK_GPIO is not set
-# CONFIG_SLG7XL45106_I2C_GPO is not set
-# CONFIG_FTGPIO010 is not set
-# CONFIG_ADP5585_GPIO is not set
-
-#
-# Hardware Spinlock Support
-#
-# CONFIG_DM_HWSPINLOCK is not set
-CONFIG_I2C=y
-CONFIG_DM_I2C=y
-CONFIG_SPL_DM_I2C=y
 CONFIG_I2C_CROS_EC_TUNNEL=y
-# CONFIG_I2C_CROS_EC_LDO is not set
-# CONFIG_I2C_SET_DEFAULT_BUS_NUM is not set
-# CONFIG_DM_I2C_GPIO is not set
-# CONFIG_SYS_I2C_IPROC is not set
-# CONFIG_SYS_I2C_FSL is not set
-# CONFIG_SYS_I2C_CADENCE is not set
-# CONFIG_SYS_I2C_DW is not set
-# CONFIG_SYS_I2C_INTEL is not set
-# CONFIG_SYS_I2C_IMX_LPI2C is not set
-# CONFIG_SYS_I2C_MTK is not set
-# CONFIG_SYS_I2C_MICROCHIP is not set
-# CONFIG_SYS_I2C_MXC is not set
-# CONFIG_SYS_I2C_NEXELL is not set
-# CONFIG_SYS_I2C_NPCM is not set
-# CONFIG_SYS_I2C_OCORES is not set
 CONFIG_SYS_I2C_ROCKCHIP=y
-# CONFIG_SYS_I2C_SOFT is not set
-# CONFIG_SYS_I2C_S3C24X0 is not set
-# CONFIG_SYS_I2C_MV is not set
-# CONFIG_SYS_I2C_MVTWSI is not set
-# CONFIG_SYS_I2C_XILINX_XIIC is not set
-# CONFIG_SYS_I2C_IHS is not set
 CONFIG_I2C_MUX=y
-# CONFIG_SPL_I2C_MUX is not set
-# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set
-# CONFIG_I2C_MUX_PCA954x is not set
-# CONFIG_I2C_MUX_GPIO is not set
-CONFIG_INPUT=y
-# CONFIG_SPL_INPUT is not set
-CONFIG_DM_KEYBOARD=y
-# CONFIG_SPL_DM_KEYBOARD is not set
-# CONFIG_APPLE_SPI_KEYB is not set
-# CONFIG_BUTTON_KEYBOARD is not set
 CONFIG_CROS_EC_KEYB=y
-# CONFIG_I8042_KEYB is not set
-# CONFIG_TEGRA_KEYBOARD is not set
-# CONFIG_TWL4030_INPUT is not set
-
-#
-# IOMMU device drivers
-#
-# CONFIG_IOMMU is not set
-
-#
-# LED Support
-#
-# CONFIG_LED is not set
-# CONFIG_SPL_LED is not set
-# CONFIG_LED_STATUS is not set
-
-#
-# Mailbox Controller Support
-#
-# CONFIG_DM_MAILBOX is not set
-
-#
-# Memory Controller drivers
-#
-# CONFIG_MEMORY is not set
-# CONFIG_ATMEL_EBI is not set
-# CONFIG_MFD_ATMEL_SMC is not set
-
-#
-# Multifunction device drivers
-#
-CONFIG_MISC=y
-CONFIG_SPL_MISC=y
-# CONFIG_NVMEM is not set
-# CONFIG_SPL_NVMEM is not set
-# CONFIG_ALTERA_SYSID is not set
-# CONFIG_ATSHA204A is not set
-# CONFIG_GATEWORKS_SC is not set
-CONFIG_ROCKCHIP_EFUSE=y
-# CONFIG_ROCKCHIP_OTP is not set
 CONFIG_ROCKCHIP_IODOMAIN=y
-# CONFIG_SIFIVE_OTP is not set
-# CONFIG_SMSC_LPC47M is not set
-# CONFIG_SMSC_SIO1007 is not set
-# CONFIG_VEXPRESS_CONFIG is not set
 CONFIG_CROS_EC=y
-# CONFIG_SPL_CROS_EC is not set
-# CONFIG_CROS_EC_I2C is not set
-# CONFIG_CROS_EC_LPC is not set
-# CONFIG_SPL_CROS_EC_LPC is not set
 CONFIG_CROS_EC_SPI=y
-# CONFIG_DS4510 is not set
-# CONFIG_FSL_SEC_MON is not set
-# CONFIG_IRQ is not set
-# CONFIG_NPCM_HOST is not set
-# CONFIG_NUVOTON_NCT6102D is not set
 CONFIG_PWRSEQ=y
-# CONFIG_SPL_PWRSEQ is not set
-# CONFIG_PCA9551_LED is not set
-# CONFIG_TEST_DRV is not set
-# CONFIG_TURRIS_OMNIA_MCU is not set
-# CONFIG_USB_HUB_USB251XB is not set
-# CONFIG_TWL4030_LED is not set
-# CONFIG_WINBOND_W83627 is not set
-# CONFIG_I2C_EEPROM is not set
-# CONFIG_SPL_I2C_EEPROM is not set
-# CONFIG_GDSYS_RXAUI_CTRL is not set
-# CONFIG_GDSYS_IOEP is not set
-# CONFIG_MPC83XX_SERDES is not set
-# CONFIG_FS_LOADER is not set
-# CONFIG_SPL_FS_LOADER is not set
-# CONFIG_GDSYS_SOC is not set
-# CONFIG_IHS_FPGA is not set
-# CONFIG_MICROCHIP_FLEXCOM is not set
-# CONFIG_ESM_PMIC is not set
-# CONFIG_SL28CPLD is not set
-# CONFIG_SPL_SOCFPGA_DT_REG is not set
-
-#
-# MMC Host controller Support
-#
-CONFIG_MMC=y
-CONFIG_MMC_WRITE=y
 CONFIG_MMC_PWRSEQ=y
-# CONFIG_MMC_BROKEN_CD is not set
-CONFIG_DM_MMC=y
-CONFIG_SPL_DM_MMC=y
-# CONFIG_MMC_SPI is not set
-# CONFIG_ARM_PL180_MMCI is not set
-CONFIG_MMC_QUIRKS=y
-CONFIG_SYS_MMC_MAX_BLK_COUNT=65535
-CONFIG_MMC_HW_PARTITIONING=y
-# CONFIG_SUPPORT_EMMC_RPMB is not set
-# CONFIG_SUPPORT_EMMC_BOOT is not set
 CONFIG_MMC_IO_VOLTAGE=y
-CONFIG_MMC_SUPPORTS_TUNING=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_MMC_HS200_SUPPORT=y
-CONFIG_MMC_VERBOSE=y
-# CONFIG_MMC_TRACE is not set
 CONFIG_MMC_DW=y
-# CONFIG_MMC_DW_CORTINA is not set
-# CONFIG_MMC_DW_K3 is not set
 CONFIG_MMC_DW_ROCKCHIP=y
-# CONFIG_MMC_DW_SNPS is not set
-# CONFIG_MMC_MXC is not set
-# CONFIG_MMC_PCI is not set
-# CONFIG_MMC_OMAP_HS is not set
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
-# CONFIG_MMC_SDHCI_ADMA is not set
-# CONFIG_MMC_SDHCI_ADMA_FORCE_32BIT is not set
-CONFIG_MMC_SDHCI_ADMA_64BIT=y
-# CONFIG_MMC_SDHCI_BCMSTB is not set
-# CONFIG_MMC_SDHCI_CADENCE is not set
-# CONFIG_MMC_SDHCI_CV1800B is not set
-# CONFIG_MMC_SDHCI_IPROC is not set
-# CONFIG_MMC_SDHCI_F_SDH30 is not set
-# CONFIG_MMC_SDHCI_KONA is not set
-# CONFIG_MMC_SDHCI_MSM is not set
-# CONFIG_MMC_SDHCI_NPCM is not set
 CONFIG_MMC_SDHCI_ROCKCHIP=y
-# CONFIG_MMC_SDHCI_S5P is not set
-# CONFIG_MMC_SDHCI_STI is not set
-# CONFIG_MMC_SDHCI_XENON is not set
-# CONFIG_MMC_SDHCI_TANGIER is not set
-# CONFIG_MMC_SDHCI_ZYNQ is not set
-# CONFIG_MMC_PITON is not set
-# CONFIG_STM32_SDMMC2 is not set
-# CONFIG_FTSDC010 is not set
-# CONFIG_FSL_ESDHC is not set
-# CONFIG_FSL_ESDHC_IMX is not set
-
-#
-# MTD Support
-#
-CONFIG_MTD=y
-# CONFIG_DM_MTD is not set
-# CONFIG_MTD_NOR_FLASH is not set
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_BLOCK is not set
-# CONFIG_SYS_MTDPARTS_RUNTIME is not set
-# CONFIG_FLASH_CFI_DRIVER is not set
-# CONFIG_HBMC_AM654 is not set
-# CONFIG_SAMSUNG_ONENAND is not set
-# CONFIG_USE_SYS_MAX_FLASH_BANKS is not set
-# CONFIG_MTD_RAW_NAND is not set
-
-#
-# SPI Flash Support
-#
-CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
-CONFIG_SF_DEFAULT_CS=0
-# CONFIG_BOOTDEV_SPI_FLASH is not set
-# CONFIG_SPI_FLASH_SFDP_SUPPORT is not set
-CONFIG_SPI_FLASH_SMART_HWCAPS=y
-# CONFIG_SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT is not set
-# CONFIG_SPI_FLASH_SOFT_RESET is not set
-# CONFIG_SPI_FLASH_BAR is not set
-CONFIG_SPI_FLASH_LOCK=y
-CONFIG_SPI_FLASH_UNLOCK_ALL=y
-# CONFIG_SPI_FLASH_ATMEL is not set
-# CONFIG_SPI_FLASH_EON is not set
 CONFIG_SPI_FLASH_GIGADEVICE=y
-# CONFIG_SPI_FLASH_ISSI is not set
-# CONFIG_SPI_FLASH_MACRONIX is not set
-# CONFIG_SPI_FLASH_SILICONKAISER is not set
-# CONFIG_SPI_FLASH_SPANSION is not set
-# CONFIG_SPI_FLASH_STMICRO is not set
-# CONFIG_SPI_FLASH_SST is not set
 CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_SPI_FLASH_XMC is not set
-# CONFIG_SPI_FLASH_XTX is not set
-# CONFIG_SPI_FLASH_ZBIT is not set
-CONFIG_SPI_FLASH_USE_4K_SECTORS=y
-# CONFIG_SPI_FLASH_DATAFLASH is not set
-# CONFIG_SPI_FLASH_MTD is not set
-
-#
-# UBI support
-#
-# CONFIG_UBI_SILENCE_MSG is not set
-# CONFIG_MTD_UBI is not set
-# CONFIG_NVMXIP is not set
-# CONFIG_NVMXIP_QSPI is not set
-
-#
-# Multiplexer drivers
-#
-# CONFIG_MULTIPLEXER is not set
-# CONFIG_BITBANGMII is not set
-# CONFIG_MV88E6352_SWITCH is not set
-CONFIG_PHYLIB=y
-# CONFIG_PHY_ADDR_ENABLE is not set
-CONFIG_PHY_ANEG_TIMEOUT=4000
-# CONFIG_B53_SWITCH is not set
-# CONFIG_MV88E61XX_SWITCH is not set
-# CONFIG_PHYLIB_10G is not set
-# CONFIG_PHY_ADIN is not set
-# CONFIG_PHY_AQUANTIA is not set
-# CONFIG_PHY_ATHEROS is not set
-# CONFIG_SPL_PHY_ATHEROS is not set
-# CONFIG_PHY_BROADCOM is not set
-# CONFIG_PHY_CORTINA is not set
-# CONFIG_PHY_DAVICOM is not set
-# CONFIG_PHY_ET1011C is not set
-# CONFIG_PHY_LXT is not set
-# CONFIG_PHY_MARVELL is not set
-# CONFIG_PHY_MARVELL_10G is not set
-# CONFIG_PHY_MESON_GXL is not set
-# CONFIG_PHY_MICREL is not set
-# CONFIG_PHY_MOTORCOMM is not set
-# CONFIG_PHY_MSCC is not set
-# CONFIG_PHY_NATSEMI is not set
-# CONFIG_PHY_NXP_C45_TJA11XX is not set
-# CONFIG_PHY_NXP_TJA11XX is not set
-# CONFIG_PHY_REALTEK is not set
-# CONFIG_PHY_SMSC is not set
-# CONFIG_PHY_TERANETICS is not set
-# CONFIG_PHY_TI is not set
-# CONFIG_PHY_TI_DP83867 is not set
-# CONFIG_PHY_TI_DP83869 is not set
-# CONFIG_PHY_TI_GENERIC is not set
-# CONFIG_PHY_VITESSE is not set
-# CONFIG_PHY_XILINX is not set
-# CONFIG_PHY_XILINX_GMII2RGMII is not set
-# CONFIG_PHY_XWAY is not set
-# CONFIG_PHY_ETHERNET_ID is not set
-# CONFIG_PHY_FIXED is not set
-# CONFIG_PHY_NCSI is not set
-# CONFIG_FSL_MEMAC is not set
-CONFIG_PHY_RESET_DELAY=0
-# CONFIG_FSL_PFE is not set
-CONFIG_ETH=y
-CONFIG_DM_ETH=y
-# CONFIG_DM_MDIO is not set
-# CONFIG_DM_ETH_PHY is not set
-CONFIG_NETDEVICES=y
-CONFIG_PHY_GIGE=y
-# CONFIG_ALTERA_TSE is not set
-# CONFIG_BCM_SF2_ETH is not set
-# CONFIG_BCMGENET is not set
-# CONFIG_BNXT_ETH is not set
-# CONFIG_CALXEDA_XGMAC is not set
-# CONFIG_DWC_ETH_XGMAC is not set
-# CONFIG_DRIVER_DM9000 is not set
-# CONFIG_DWC_ETH_QOS is not set
-# CONFIG_EEPRO100 is not set
 CONFIG_ETH_DESIGNWARE=y
-# CONFIG_ETH_DESIGNWARE_MESON8B is not set
-# CONFIG_ETH_DESIGNWARE_SOCFPGA is not set
-# CONFIG_ETH_DESIGNWARE_S700 is not set
-# CONFIG_DW_ALTDESCRIPTOR is not set
-# CONFIG_ETHOC is not set
-# CONFIG_FMAN_ENET is not set
-# CONFIG_FTMAC100 is not set
-# CONFIG_FTGMAC100 is not set
-# CONFIG_MCFFEC is not set
-# CONFIG_KS8851_MLL is not set
-# CONFIG_LITEETH is not set
-# CONFIG_MACB is not set
-# CONFIG_NET_NPCM750 is not set
-# CONFIG_PCH_GBE is not set
-# CONFIG_RGMII is not set
-# CONFIG_MII is not set
-# CONFIG_RMII is not set
-# CONFIG_PCNET is not set
-# CONFIG_QE_UEC is not set
-# CONFIG_RTL8139 is not set
-# CONFIG_SMC911X is not set
-# CONFIG_SUN7I_GMAC is not set
-# CONFIG_SUN4I_EMAC is not set
-# CONFIG_SUN8I_EMAC is not set
-# CONFIG_SH_ETHER is not set
-# CONFIG_DRIVER_TI_CPSW is not set
-# CONFIG_DRIVER_TI_EMAC is not set
-# CONFIG_DRIVER_TI_KEYSTONE_NET is not set
-# CONFIG_TULIP is not set
-# CONFIG_XILINX_AXIEMAC is not set
-# CONFIG_VSC7385_ENET is not set
-# CONFIG_XILINX_EMACLITE is not set
-# CONFIG_ZYNQ_GEM is not set
 CONFIG_GMAC_ROCKCHIP=y
-# CONFIG_SYS_DPAA_QBMAN is not set
-# CONFIG_TSEC_ENET is not set
-# CONFIG_MEDIATEK_ETH is not set
-# CONFIG_HIFEMAC_ETH is not set
-# CONFIG_HIGMACV300_ETH is not set
-# CONFIG_NVME is not set
-# CONFIG_NVME_APPLE is not set
-
-#
-# PCI Endpoint
-#
-# CONFIG_PCI_ENDPOINT is not set
-# CONFIG_X86_PCH7 is not set
-# CONFIG_X86_PCH9 is not set
-
-#
-# PHY Subsystem
-#
-CONFIG_PHY=y
-# CONFIG_SPL_PHY is not set
-# CONFIG_NOP_PHY is not set
-# CONFIG_MIPI_DPHY_HELPERS is not set
-# CONFIG_BCM_SR_PCIE_PHY is not set
-# CONFIG_OMAP_USB2_PHY is not set
-
-#
-# Rockchip PHY driver
-#
-# CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set
-# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-# CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY is not set
-# CONFIG_PHY_ROCKCHIP_PCIE is not set
-# CONFIG_PHY_ROCKCHIP_SNPS_PCIE3 is not set
-# CONFIG_PHY_ROCKCHIP_USBDP is not set
 CONFIG_PHY_ROCKCHIP_TYPEC=y
-# CONFIG_PHY_CADENCE_SIERRA is not set
-# CONFIG_PHY_CADENCE_TORRENT is not set
-# CONFIG_MSM8916_USB_PHY is not set
-# CONFIG_MVEBU_COMPHY_SUPPORT is not set
-
-#
-# Pin controllers
-#
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_FULL=y
-CONFIG_PINCTRL_GENERIC=y
-CONFIG_PINMUX=y
-# CONFIG_PINCONF is not set
-CONFIG_PINCONF_RECURSIVE=y
-CONFIG_SPL_PINCTRL=y
-CONFIG_SPL_PINCTRL_FULL=y
-CONFIG_SPL_PINCTRL_GENERIC=y
-CONFIG_SPL_PINMUX=y
-# CONFIG_SPL_PINCONF is not set
-CONFIG_SPL_PINCONF_RECURSIVE=y
-# CONFIG_PINCTRL_AT91 is not set
-# CONFIG_PINCTRL_AT91PIO4 is not set
-# CONFIG_PINCTRL_INTEL is not set
-# CONFIG_PINCTRL_QE is not set
-# CONFIG_PINCTRL_ROCKCHIP_RV1108 is not set
-# CONFIG_PINCTRL_SINGLE is not set
-# CONFIG_PINCTRL_STM32 is not set
-# CONFIG_PINCTRL_STMFX is not set
-# CONFIG_SPL_PINCTRL_STMFX is not set
-# CONFIG_PINCTRL_K210 is not set
-CONFIG_PINCTRL_ROCKCHIP=y
-CONFIG_SPL_PINCTRL_ROCKCHIP=y
-# CONFIG_PINCTRL_TEGRA is not set
-# CONFIG_SPL_PINCTRL_TEGRA is not set
-CONFIG_POWER=y
-# CONFIG_POWER_LEGACY is not set
-# CONFIG_ACPI_PMC is not set
-# CONFIG_SPL_ACPI_PMC is not set
-
-#
-# Power Domain Support
-#
-# CONFIG_POWER_DOMAIN is not set
-CONFIG_DM_PMIC=y
-CONFIG_SPL_DM_PMIC=y
-CONFIG_PMIC_CHILDREN=y
-CONFIG_SPL_PMIC_CHILDREN=y
-# CONFIG_PMIC_AB8500 is not set
-# CONFIG_PMIC_ACT8846 is not set
-# CONFIG_PMIC_AXP is not set
-# CONFIG_SPL_PMIC_AXP is not set
-# CONFIG_DM_PMIC_DA9063 is not set
-# CONFIG_SPL_DM_PMIC_DA9063 is not set
-# CONFIG_PMIC_AS3722 is not set
-# CONFIG_DM_PMIC_BD71837 is not set
-# CONFIG_SPL_DM_PMIC_BD71837 is not set
-# CONFIG_DM_PMIC_FAN53555 is not set
-# CONFIG_DM_PMIC_MP5416 is not set
-# CONFIG_SPL_DM_PMIC_MP5416 is not set
-# CONFIG_DM_PMIC_PCA9450 is not set
-# CONFIG_SPL_DM_PMIC_PCA9450 is not set
-# CONFIG_DM_PMIC_PFUZE100 is not set
-# CONFIG_SPL_DM_PMIC_PFUZE100 is not set
-# CONFIG_DM_PMIC_MAX77663 is not set
-# CONFIG_DM_PMIC_MAX77686 is not set
-# CONFIG_DM_PMIC_MAX8998 is not set
-# CONFIG_DM_PMIC_MC34708 is not set
-# CONFIG_PMIC_MAX8997 is not set
-# CONFIG_PMIC_QCOM is not set
 CONFIG_PMIC_RK8XX=y
-# CONFIG_SPL_PMIC_RK8XX is not set
-# CONFIG_PMIC_S2MPS11 is not set
-# CONFIG_DM_PMIC_SANDBOX is not set
-# CONFIG_PMIC_S5M8767 is not set
-# CONFIG_PMIC_RN5T567 is not set
-# CONFIG_SPL_PMIC_RN5T567 is not set
-# CONFIG_PMIC_TPS65090 is not set
-# CONFIG_PMIC_PALMAS is not set
-# CONFIG_PMIC_LP873X is not set
-# CONFIG_PMIC_LP87565 is not set
-# CONFIG_DM_PMIC_TPS65910 is not set
-# CONFIG_DM_PMIC_TPS80031 is not set
-# CONFIG_PMIC_STPMIC1 is not set
-# CONFIG_SPL_PMIC_PALMAS is not set
-# CONFIG_SPL_PMIC_LP873X is not set
-# CONFIG_SPL_PMIC_LP87565 is not set
-# CONFIG_PMIC_TPS65941 is not set
-# CONFIG_PMIC_TPS65219 is not set
-# CONFIG_PMIC_RAA215300 is not set
-# CONFIG_PMIC_TPS65217 is not set
-# CONFIG_POWER_TPS65218 is not set
-# CONFIG_POWER_TPS62362 is not set
-# CONFIG_SPL_POWER_TPS62362 is not set
-# CONFIG_SPL_POWER_TPS65910 is not set
-CONFIG_DM_REGULATOR=y
 CONFIG_REGULATOR_PWM=y
-# CONFIG_SPL_REGULATOR_PWM is not set
-CONFIG_DM_REGULATOR_COMMON=y
-CONFIG_DM_REGULATOR_FIXED=y
-# CONFIG_SPL_DM_REGULATOR_FIXED is not set
 CONFIG_DM_REGULATOR_GPIO=y
-# CONFIG_SPL_DM_REGULATOR_GPIO is not set
 CONFIG_REGULATOR_RK8XX=y
-# CONFIG_DM_REGULATOR_PBIAS is not set
-# CONFIG_DM_REGULATOR_TPS62360 is not set
-# CONFIG_DM_REGULATOR_ANATOP is not set
-# CONFIG_DM_REGULATOR_SCMI is not set
-# CONFIG_TPS6586X_POWER is not set
-# CONFIG_POWER_MT6323 is not set
-CONFIG_DM_PWM=y
-# CONFIG_PWM_ASPEED is not set
-# CONFIG_PWM_CADENCE_TTC is not set
 CONFIG_PWM_CROS_EC=y
-# CONFIG_PWM_EXYNOS is not set
-# CONFIG_PWM_IMX is not set
-# CONFIG_PWM_MESON is not set
-# CONFIG_PWM_MTK is not set
 CONFIG_PWM_ROCKCHIP=y
-# CONFIG_PWM_SANDBOX is not set
-# CONFIG_PWM_SIFIVE is not set
-# CONFIG_PWM_TEGRA is not set
-# CONFIG_PWM_SUNXI is not set
-# CONFIG_U_QE is not set
-CONFIG_RAM=y
-CONFIG_SPL_RAM=y
-# CONFIG_STM32_SDRAM is not set
-# CONFIG_MPC83XX_SDRAM is not set
-# CONFIG_K3_DDRSS is not set
-# CONFIG_IMXRT_SDRAM is not set
-# CONFIG_CADENCE_DDR_CTRL is not set
-CONFIG_RAM_ROCKCHIP=y
-CONFIG_ROCKCHIP_SDRAM_COMMON=y
-CONFIG_RAM_ROCKCHIP_DEBUG=y
-# CONFIG_RAM_ROCKCHIP_DDR4 is not set
-# CONFIG_RAM_ROCKCHIP_LPDDR2 is not set
-# CONFIG_RAM_ROCKCHIP_LPDDR3 is not set
-# CONFIG_RAM_ROCKCHIP_LPDDR4 is not set
-
-#
-# Reboot Mode Support
-#
-# CONFIG_DM_REBOOT_MODE is not set
-
-#
-# Remote Processor drivers
-#
-CONFIG_REMOTEPROC_MAX_FW_SIZE=0x10000
-
-#
-# Reset Controller Support
-#
-# CONFIG_RESET_AST2500 is not set
-# CONFIG_RESET_AST2600 is not set
-CONFIG_RESET_ROCKCHIP=y
-# CONFIG_RESET_HISILICON is not set
-# CONFIG_RESET_SYSCON is not set
-# CONFIG_RESET_SCMI is not set
-# CONFIG_RESET_DRA7 is not set
-CONFIG_DM_RNG=y
-# CONFIG_SPL_DM_RNG is not set
-# CONFIG_RNG_MSM is not set
-# CONFIG_RNG_NPCM is not set
-CONFIG_RNG_ROCKCHIP=y
-# CONFIG_RNG_IPROC200 is not set
-# CONFIG_RNG_SMCCC_TRNG is not set
-# CONFIG_RNG_ARM_RNDR is not set
-# CONFIG_RNG_EXYNOS is not set
-
-#
-# Real Time Clock
-#
-# CONFIG_DM_RTC is not set
-# CONFIG_SPL_DM_RTC is not set
-# CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set
-# CONFIG_RTC_DS1337 is not set
-# CONFIG_RTC_DS1338 is not set
-# CONFIG_RTC_DS1374 is not set
-# CONFIG_RTC_DS3231 is not set
-# CONFIG_RTC_PCF8563 is not set
-# CONFIG_RTC_PT7C4338 is not set
-# CONFIG_RTC_PL031 is not set
-# CONFIG_RTC_S35392A is not set
-# CONFIG_RTC_MC13XXX is not set
-# CONFIG_RTC_MC146818 is not set
-# CONFIG_RTC_M41T62 is not set
-# CONFIG_SCSI is not set
-CONFIG_SERIAL=y
-CONFIG_BAUDRATE=115200
-# CONFIG_DEFAULT_ENV_IS_RW is not set
-CONFIG_REQUIRE_SERIAL_CONSOLE=y
-# CONFIG_SPECIFY_CONSOLE_INDEX is not set
-CONFIG_SERIAL_PRESENT=y
-CONFIG_SPL_SERIAL_PRESENT=y
-CONFIG_DM_SERIAL=y
-# CONFIG_SERIAL_RX_BUFFER is not set
-# CONFIG_SERIAL_PUTS is not set
-# CONFIG_SERIAL_SEARCH_ALL is not set
-# CONFIG_SERIAL_PROBE_ALL is not set
-CONFIG_SPL_DM_SERIAL=y
-# CONFIG_VPL_DM_SERIAL is not set
-CONFIG_DEBUG_UART_NS16550=y
-CONFIG_SPL_DEBUG_UART_BASE=0xff1a0000
 CONFIG_DEBUG_UART_SHIFT=2
-# CONFIG_DEBUG_UART_ANNOUNCE is not set
-# CONFIG_DEBUG_UART_SKIP_INIT is not set
-# CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED is not set
-# CONFIG_ALTERA_JTAG_UART is not set
-# CONFIG_ALTERA_UART is not set
-# CONFIG_ARC_SERIAL is not set
-# CONFIG_ARM_DCC is not set
-# CONFIG_ATMEL_USART is not set
-# CONFIG_BCM6345_SERIAL is not set
-# CONFIG_COREBOOT_SERIAL is not set
-# CONFIG_CORTINA_UART is not set
-# CONFIG_FSL_LINFLEXUART is not set
-# CONFIG_FSL_LPUART is not set
-# CONFIG_MVEBU_A3700_UART is not set
-# CONFIG_MCFUART is not set
-# CONFIG_NULLDEV_SERIAL is not set
-CONFIG_SYS_NS16550=y
-# CONFIG_NS16550_DYNAMIC is not set
 CONFIG_SYS_NS16550_MEM32=y
-# CONFIG_SYS_NS16550_PORT_MAPPED is not set
-# CONFIG_PL01X_SERIAL is not set
-# CONFIG_ROCKCHIP_SERIAL is not set
-# CONFIG_XILINX_UARTLITE is not set
-# CONFIG_MSM_SERIAL is not set
-# CONFIG_MSM_GENI_SERIAL is not set
-# CONFIG_MXS_AUART_SERIAL is not set
-# CONFIG_OMAP_SERIAL is not set
-# CONFIG_HTIF_CONSOLE is not set
-# CONFIG_SIFIVE_SERIAL is not set
-# CONFIG_ZYNQ_SERIAL is not set
-# CONFIG_MTK_SERIAL is not set
-# CONFIG_MT7620_SERIAL is not set
-# CONFIG_NPCM_SERIAL is not set
-# CONFIG_SM is not set
-# CONFIG_MESON_SM is not set
-# CONFIG_SMEM is not set
-
-#
-# Sound support
-#
-# CONFIG_SOUND is not set
-
-#
-# SOC (System On Chip) specific Drivers
-#
-# CONFIG_SOC_DEVICE is not set
-# CONFIG_SOC_QCOM is not set
-# CONFIG_SOC_SAMSUNG is not set
-# CONFIG_SOC_TI is not set
-CONFIG_SPI=y
-CONFIG_DM_SPI=y
-CONFIG_SPI_MEM=y
-# CONFIG_SPI_DIRMAP is not set
-# CONFIG_ALTERA_SPI is not set
-# CONFIG_APPLE_SPI is not set
-# CONFIG_ATCSPI200_SPI is not set
-# CONFIG_ATMEL_SPI is not set
-# CONFIG_BCMSTB_SPI is not set
-# CONFIG_CORTINA_SFLASH is not set
-# CONFIG_CADENCE_QSPI is not set
-# CONFIG_CF_SPI is not set
-# CONFIG_CV1800B_SPIF is not set
-# CONFIG_DESIGNWARE_SPI is not set
-# CONFIG_EXYNOS_SPI is not set
-# CONFIG_FSL_DSPI is not set
-# CONFIG_FSL_QSPI is not set
-# CONFIG_GXP_SPI is not set
-# CONFIG_ICH_SPI is not set
-# CONFIG_IPROC_QSPI is not set
-# CONFIG_KIRKWOOD_SPI is not set
-# CONFIG_MICROCHIP_COREQSPI is not set
-# CONFIG_MPC8XXX_SPI is not set
-# CONFIG_MTK_SNOR is not set
-# CONFIG_MTK_SNFI_SPI is not set
-# CONFIG_MTK_SPIM is not set
-# CONFIG_MVEBU_A3700_SPI is not set
-# CONFIG_MXS_SPI is not set
-# CONFIG_SPI_MXIC is not set
-# CONFIG_NPCM_FIU_SPI is not set
-# CONFIG_NPCM_PSPI is not set
-# CONFIG_NXP_FSPI is not set
-# CONFIG_OMAP3_SPI is not set
-# CONFIG_PL022_SPI is not set
-# CONFIG_ROCKCHIP_SFC is not set
 CONFIG_ROCKCHIP_SPI=y
-# CONFIG_SPI_ASPEED_SMC is not set
-# CONFIG_SPI_SIFIVE is not set
-# CONFIG_SOFT_SPI is not set
-# CONFIG_SPI_SN_F_OSPI is not set
-# CONFIG_SPI_SUNXI is not set
-# CONFIG_TEGRA114_SPI is not set
-# CONFIG_TEGRA20_SFLASH is not set
-# CONFIG_TEGRA20_SLINK is not set
-# CONFIG_TEGRA210_QSPI is not set
-# CONFIG_TI_QSPI is not set
-# CONFIG_XILINX_SPI is not set
-# CONFIG_ZYNQ_SPI is not set
-# CONFIG_ZYNQ_QSPI is not set
-# CONFIG_ZYNQMP_GQSPI is not set
-# CONFIG_SH_QSPI is not set
-# CONFIG_MXC_SPI is not set
-
-#
-# SPMI support
-#
-# CONFIG_SPMI is not set
-# CONFIG_SYSINFO is not set
-
-#
-# System reset device drivers
-#
 CONFIG_SYSRESET=y
-CONFIG_SPL_SYSRESET=y
-CONFIG_SYSRESET_CMD_RESET=y
-CONFIG_SYSRESET_CMD_POWEROFF=y
-# CONFIG_SYSRESET_CV1800B is not set
-# CONFIG_POWEROFF_GPIO is not set
-# CONFIG_SYSRESET_GPIO is not set
-# CONFIG_SYSRESET_PSCI is not set
-# CONFIG_SYSRESET_SYSCON is not set
-# CONFIG_SYSRESET_WATCHDOG is not set
-# CONFIG_SYSRESET_RESETCTL is not set
-# CONFIG_SYSRESET_MPC83XX is not set
-# CONFIG_TEE is not set
-# CONFIG_DM_THERMAL is not set
-
-#
-# Timer Support
-#
-# CONFIG_TIMER is not set
-
-#
-# TPM support
-#
 CONFIG_USB=y
-CONFIG_DM_USB=y
-CONFIG_SPL_DM_USB=y
-# CONFIG_DM_USB_GADGET is not set
-# CONFIG_SPL_DM_USB_GADGET is not set
-
-#
-# USB Host Controller Drivers
-#
-CONFIG_USB_HOST=y
-# CONFIG_SPL_USB_HOST is not set
 CONFIG_USB_XHCI_HCD=y
-# CONFIG_USB_XHCI_DWC3 is not set
-# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
-# CONFIG_USB_XHCI_FSL is not set
-# CONFIG_USB_XHCI_BRCM is not set
 CONFIG_USB_EHCI_HCD=y
-# CONFIG_USB_EHCI_MSM is not set
-# CONFIG_USB_EHCI_PCI is not set
-# CONFIG_USB_EHCI_ZYNQ is not set
 CONFIG_USB_EHCI_GENERIC=y
-# CONFIG_USB_EHCI_FSL is not set
-CONFIG_USB_OHCI_NEW=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
-# CONFIG_USB_OHCI_DA8XX is not set
-# CONFIG_SYS_OHCI_SWAP_REG_ACCESS is not set
-# CONFIG_USB_UHCI_HCD is not set
-# CONFIG_USB_DWC2 is not set
-# CONFIG_USB_R8A66597_HCD is not set
-# CONFIG_USB_ISP1760 is not set
-# CONFIG_USB_CDNS3 is not set
 CONFIG_USB_DWC3=y
-
-#
-# Platform Glue Driver Support
-#
-# CONFIG_USB_DWC3_OMAP is not set
 CONFIG_USB_DWC3_GENERIC=y
-# CONFIG_SPL_USB_DWC3_GENERIC is not set
-# CONFIG_USB_DWC3_AM62 is not set
-# CONFIG_USB_DWC3_LAYERSCAPE is not set
-
-#
-# PHY Subsystem
-#
-# CONFIG_USB_DWC3_PHY_OMAP is not set
-# CONFIG_USB_DWC3_PHY_SAMSUNG is not set
-
-#
-# Legacy MUSB Support
-#
-# CONFIG_USB_MUSB_HCD is not set
-# CONFIG_USB_MUSB_UDC is not set
-
-#
-# MUSB Controller Driver
-#
-# CONFIG_USB_MUSB_HOST is not set
-# CONFIG_USB_MUSB_PIO_ONLY is not set
-
-#
-# USB Phy
-#
-# CONFIG_TWL4030_USB is not set
-# CONFIG_ROCKCHIP_USB2_PHY is not set
-
-#
-# ULPI drivers
-#
-
-#
-# USB peripherals
-#
-CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
-# CONFIG_USB_ONBOARD_HUB is not set
-CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=1000
-CONFIG_USB_KEYBOARD_FN_KEYS=y
-CONFIG_SYS_USB_EVENT_POLL=y
-# CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE is not set
-# CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is not set
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
-# CONFIG_USB_ETHER_LAN75XX is not set
-# CONFIG_USB_ETHER_LAN78XX is not set
 CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
-# CONFIG_USB_GADGET is not set
-# CONFIG_SPL_USB_GADGET is not set
-
-#
-# UFS Host Controller Support
-#
-# CONFIG_TI_J721E_UFS is not set
-
-#
-# Graphics support
-#
 CONFIG_VIDEO=y
-# CONFIG_VIDEO_FONT_4X6 is not set
 # CONFIG_VIDEO_FONT_8X16 is not set
-# CONFIG_VIDEO_FONT_SUN12X22 is not set
 CONFIG_VIDEO_FONT_16X32=y
-CONFIG_VIDEO_LOGO=y
-CONFIG_BACKLIGHT=y
-CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x0
-# CONFIG_VIDEO_COPY is not set
-CONFIG_VIDEO_DAMAGE=y
-CONFIG_BACKLIGHT_PWM=y
-# CONFIG_BACKLIGHT_GPIO is not set
-CONFIG_VIDEO_BPP8=y
-CONFIG_VIDEO_BPP16=y
-CONFIG_VIDEO_BPP32=y
-CONFIG_VIDEO_ANSI=y
-# CONFIG_VIDEO_MIPI_DSI is not set
-CONFIG_CONSOLE_NORMAL=y
-# CONFIG_CONSOLE_ROTATION is not set
-# CONFIG_CONSOLE_TRUETYPE is not set
-CONFIG_SYS_WHITE_ON_BLACK=y
-# CONFIG_NO_FB_CLEAR is not set
-CONFIG_VIDEO_SYNC_MS=100
-CONFIG_VIDEO_SYNC_CYCLIC_MS=10
-CONFIG_PANEL=y
-CONFIG_SIMPLE_PANEL=y
-# CONFIG_PANEL_HX8238D is not set
-
-#
-# TrueType Fonts
-#
-# CONFIG_VIDCONSOLE_AS_LCD is not set
-# CONFIG_VIDEO_BOCHS is not set
-# CONFIG_VIDEO_VESA is not set
-# CONFIG_VIDEO_LCD_ANX9804 is not set
-# CONFIG_ATMEL_LCD_BGR555 is not set
-# CONFIG_VIDEO_BCM2835 is not set
-# CONFIG_VIDEO_LCD_ENDEAVORU is not set
-# CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
-# CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
-# CONFIG_VIDEO_LCD_LG_LD070WX3 is not set
-# CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
-# CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
-# CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
-# CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set
-# CONFIG_VIDEO_LCD_SSD2828 is not set
-# CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
-# CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
-# CONFIG_VIDEO_MESON is not set
-# CONFIG_VIDEO_MVEBU is not set
-CONFIG_I2C_EDID=y
 CONFIG_DISPLAY=y
-# CONFIG_NXP_TDA19988 is not set
-# CONFIG_ATMEL_HLCD is not set
-# CONFIG_BACKLIGHT_LM3533 is not set
-# CONFIG_AM335X_LCD is not set
-# CONFIG_VIDEO_EXYNOS is not set
-# CONFIG_LOGICORE_DP_TX is not set
 CONFIG_VIDEO_ROCKCHIP=y
 CONFIG_VIDEO_ROCKCHIP_MAX_XRES=2400
 CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1600
 CONFIG_DISPLAY_ROCKCHIP_EDP=y
-# CONFIG_DISPLAY_ROCKCHIP_LVDS is not set
-# CONFIG_DISPLAY_ROCKCHIP_HDMI is not set
-# CONFIG_DISPLAY_ROCKCHIP_MIPI is not set
-# CONFIG_DISPLAY_ROCKCHIP_DW_MIPI is not set
-# CONFIG_VIDEO_ARM_MALIDP is not set
-# CONFIG_VIDEO_STM32 is not set
-# CONFIG_VIDEO_TIDSS is not set
-# CONFIG_VIDEO_TEGRA124 is not set
-# CONFIG_VIDEO_BRIDGE is not set
-# CONFIG_VIDEO_BRIDGE_PARADE_DP501 is not set
-# CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825 is not set
-# CONFIG_VIDEO_BRIDGE_TOSHIBA_TC358768 is not set
-# CONFIG_VIDEO_TEGRA20 is not set
-# CONFIG_VIDEO_DSI_TEGRA30 is not set
-# CONFIG_TEGRA_BACKLIGHT_PWM is not set
-# CONFIG_VIDEO_MXS is not set
-# CONFIG_VIDEO_SEPS525 is not set
-CONFIG_CONSOLE_SCROLL_LINES=1
-# CONFIG_VIDEO_SIMPLE is not set
-# CONFIG_VIDEO_DT_SIMPLEFB is not set
-# CONFIG_VIDEO_MCDE_SIMPLE is not set
-# CONFIG_OSD is not set
-# CONFIG_VIDEO_REMOVE is not set
-# CONFIG_SPLASH_SCREEN is not set
-# CONFIG_BMP is not set
-CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
-CONFIG_VIDEO_BMP_RLE8=y
-# CONFIG_BMP_16BPP is not set
-# CONFIG_BMP_24BPP is not set
-# CONFIG_BMP_32BPP is not set
-# CONFIG_SPL_VIDEO is not set
-
-#
-# VirtIO Drivers
-#
-# CONFIG_VIRTIO_MMIO is not set
-
-#
-# 1-Wire support
-#
-# CONFIG_W1 is not set
-
-#
-# 1-wire EEPROM support
-#
-# CONFIG_W1_EEPROM is not set
-
-#
-# Watchdog Timer Support
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_IMX_WATCHDOG is not set
-# CONFIG_ULP_WATCHDOG is not set
-# CONFIG_WDT is not set
-# CONFIG_SPL_WDT is not set
-# CONFIG_PHYS_TO_BUS is not set
-
-#
-# File systems
-#
-# CONFIG_FS_BTRFS is not set
-# CONFIG_FS_CBFS is not set
-# CONFIG_SPL_FS_CBFS is not set
-CONFIG_FS_EXT4=y
-# CONFIG_EXT4_WRITE is not set
-CONFIG_FS_FAT=y
-CONFIG_FAT_WRITE=y
-CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
-# CONFIG_FS_JFFS2 is not set
-# CONFIG_UBIFS_SILENCE_MSG is not set
-# CONFIG_UBIFS_SILENCE_DEBUG_DUMP is not set
-# CONFIG_FS_CRAMFS is not set
-# CONFIG_YAFFS2 is not set
-# CONFIG_FS_SQUASHFS is not set
-# CONFIG_FS_EROFS is not set
-
-#
-# Library routines
-#
-# CONFIG_ADDR_MAP is not set
-# CONFIG_SYS_TIMER_COUNTS_DOWN is not set
-# CONFIG_PHYSMEM is not set
-# CONFIG_BCH is not set
 # CONFIG_BINMAN_FDT is not set
-# CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set
-CONFIG_CHARSET=y
-# CONFIG_DYNAMIC_CRC_TABLE is not set
-CONFIG_LIB_UUID=y
-CONFIG_RANDOM_UUID=y
-CONFIG_SPL_LIB_UUID=y
-# CONFIG_SEMIHOSTING is not set
-# CONFIG_SPL_SEMIHOSTING is not set
-CONFIG_PRINTF=y
-CONFIG_SPL_PRINTF=y
-CONFIG_SPRINTF=y
-CONFIG_SPL_SPRINTF=y
-CONFIG_STRTO=y
-CONFIG_SPL_STRTO=y
-CONFIG_SYS_HZ=1000
-CONFIG_SPL_USE_TINY_PRINTF=y
 CONFIG_PANIC_HANG=y
-CONFIG_REGEX=y
-CONFIG_LIB_RAND=y
-# CONFIG_LIB_HW_RAND is not set
-CONFIG_SUPPORT_ACPI=y
-# CONFIG_ACPI is not set
-# CONFIG_SPL_ACPI is not set
-# CONFIG_SPL_TINY_MEMSET is not set
-# CONFIG_BITREVERSE is not set
-# CONFIG_TRACE is not set
-# CONFIG_CIRCBUF is not set
 CONFIG_CMD_DHRYSTONE=y
-
-#
-# Security support
-#
-# CONFIG_AES is not set
-# CONFIG_ECDSA is not set
-# CONFIG_RSA is not set
-# CONFIG_TPM is not set
-# CONFIG_SPL_TPM is not set
-
-#
-# Android Verified Boot
-#
-
-#
-# Hashing Support
-#
-# CONFIG_BLAKE2 is not set
-CONFIG_SHA1=y
-CONFIG_SHA256=y
-# CONFIG_SHA512 is not set
-# CONFIG_SHA384 is not set
-# CONFIG_SHA_HW_ACCEL is not set
-CONFIG_SPL_CRC32=y
-CONFIG_SPL_SHA1=y
-CONFIG_SPL_SHA256=y
-# CONFIG_SPL_SHA512 is not set
-# CONFIG_SPL_SHA384 is not set
-# CONFIG_SPL_SHA_HW_ACCEL is not set
-CONFIG_MD5=y
-# CONFIG_SPL_MD5 is not set
-CONFIG_CRC8=y
-# CONFIG_SPL_CRC8 is not set
-# CONFIG_SPL_CRC16 is not set
-CONFIG_CRC32=y
-
-#
-# Compression Support
-#
-CONFIG_LZ4=y
-CONFIG_LZMA=y
-# CONFIG_LZO is not set
-CONFIG_GZIP=y
-# CONFIG_ZLIB_UNCOMPRESS is not set
-# CONFIG_BZIP2 is not set
-CONFIG_ZLIB=y
-# CONFIG_ZSTD is not set
-# CONFIG_SPL_BZIP2 is not set
-# CONFIG_SPL_LZ4 is not set
-# CONFIG_SPL_LZMA is not set
-CONFIG_VPL_LZMA=y
-# CONFIG_SPL_LZO is not set
-# CONFIG_SPL_GZIP is not set
-# CONFIG_SPL_ZSTD is not set
 CONFIG_ERRNO_STR=y
 # CONFIG_HEXDUMP is not set
-CONFIG_GETOPT=y
-CONFIG_OF_LIBFDT=y
-CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
-CONFIG_SYS_FDT_PAD=0x3000
-CONFIG_SPL_OF_LIBFDT=y
-CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLE=y
-# CONFIG_LIB_RATIONAL is not set
-# CONFIG_SPL_LIB_RATIONAL is not set
-CONFIG_SMBIOS=y
-# CONFIG_SMBIOS_PARSER is not set
-CONFIG_EFI_LOADER=y
-CONFIG_EFI_BINARY_EXEC=y
-CONFIG_EFI_BOOTMGR=y
-# CONFIG_EFI_VARIABLE_FILE_STORE is not set
 CONFIG_EFI_VARIABLE_NO_STORE=y
-# CONFIG_EFI_VARIABLES_PRESEED is not set
-CONFIG_EFI_VAR_BUF_SIZE=131072
-# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
-# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
-# CONFIG_EFI_CAPSULE_ON_DISK is not set
-CONFIG_EFI_CAPSULE_MAX=15
-CONFIG_EFI_DEVICE_PATH_TO_TEXT=y
-CONFIG_EFI_DEVICE_PATH_UTIL=y
-CONFIG_EFI_DT_FIXUP=y
-CONFIG_EFI_LOADER_HII=y
-CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y
-CONFIG_EFI_UNICODE_CAPITALIZATION=y
-# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set
-CONFIG_EFI_PLATFORM_LANG_CODES="en-US"
-CONFIG_EFI_HAVE_RUNTIME_RESET=y
-CONFIG_EFI_RNG_PROTOCOL=y
-CONFIG_EFI_LOAD_FILE2_INITRD=y
-CONFIG_EFI_ECPT=y
-CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
-# CONFIG_EFI_HTTP_BOOT is not set
-# CONFIG_OPTEE_LIB is not set
-# CONFIG_OPTEE_IMAGE is not set
-# CONFIG_BOOTM_OPTEE is not set
-# CONFIG_TEST_FDTDEC is not set
-CONFIG_LIB_ELF=y
-CONFIG_LMB=y
-CONFIG_LMB_USE_MAX_REGIONS=y
-CONFIG_LMB_MAX_REGIONS=16
-# CONFIG_PHANDLE_CHECK_SEQ is not set
-
-#
-# Testing
-#
-# CONFIG_UNIT_TEST is not set
-# CONFIG_SPL_UNIT_TEST is not set
-# CONFIG_POST is not set
-
-#
-# Tools options
-#
-CONFIG_MKIMAGE_DTC_PATH="dtc"
-CONFIG_TOOLS_CRC32=y
-CONFIG_TOOLS_LIBCRYPTO=y
-CONFIG_TOOLS_KWBIMAGE=y
-CONFIG_TOOLS_FIT=y
-CONFIG_TOOLS_FIT_FULL_CHECK=y
-CONFIG_TOOLS_FIT_PRINT=y
-CONFIG_TOOLS_FIT_RSASSA_PSS=y
-CONFIG_TOOLS_FIT_SIGNATURE=y
-CONFIG_TOOLS_FIT_SIGNATURE_MAX_SIZE=0x10000000
-CONFIG_TOOLS_FIT_VERBOSE=y
-CONFIG_TOOLS_MD5=y
-CONFIG_TOOLS_OF_LIBFDT=y
-CONFIG_TOOLS_SHA1=y
-CONFIG_TOOLS_SHA256=y
-CONFIG_TOOLS_SHA384=y
-CONFIG_TOOLS_SHA512=y
-CONFIG_TOOLS_MKEFICAPSULE=y
-# CONFIG_FSPI_CONF_HEADER is not set
-# CONFIG_TOOLS_MKFWUMDATA is not set
diff --git a/config/u-boot/qemu_arm64_12mb/config/default b/config/u-boot/qemu_arm64_12mb/config/default
index 4824cc79..73411226 100644
--- a/config/u-boot/qemu_arm64_12mb/config/default
+++ b/config/u-boot/qemu_arm64_12mb/config/default
@@ -1,1819 +1,71 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# U-Boot 2024.10 Configuration
-#
-
-#
-# Compiler: gcc (Debian 12.2.0-14) 12.2.0
-#
-CONFIG_CREATE_ARCH_SYMLINK=y
-CONFIG_SUPPORT_LITTLE_ENDIAN=y
-CONFIG_SYS_CACHE_SHIFT_6=y
-CONFIG_64BIT=y
-CONFIG_SYS_CACHELINE_SIZE=64
-CONFIG_LINKER_LIST_ALIGN=8
-# CONFIG_ARC is not set
 CONFIG_ARM=y
-# CONFIG_M68K is not set
-# CONFIG_MICROBLAZE is not set
-# CONFIG_MIPS is not set
-# CONFIG_NIOS2 is not set
-# CONFIG_PPC is not set
-# CONFIG_RISCV is not set
-# CONFIG_SANDBOX is not set
-# CONFIG_SH is not set
-# CONFIG_X86 is not set
-# CONFIG_XTENSA is not set
-CONFIG_SYS_ARCH="arm"
-CONFIG_SYS_CPU="armv8"
-CONFIG_SYS_VENDOR="emulation"
-CONFIG_SYS_BOARD="qemu-arm"
-CONFIG_SYS_CONFIG_NAME="qemu-arm"
-
-#
-# Skipping low level initialization functions
-#
-# CONFIG_SKIP_LOWLEVEL_INIT is not set
-# CONFIG_SKIP_LOWLEVEL_INIT_ONLY is not set
-# CONFIG_SYS_ICACHE_OFF is not set
-# CONFIG_SYS_DCACHE_OFF is not set
-
-#
-# ARM architecture
-#
-CONFIG_ARM64=y
-CONFIG_ARM64_CRC32=y
-CONFIG_COUNTER_FREQUENCY=0
 CONFIG_POSITION_INDEPENDENT=y
-# CONFIG_INIT_SP_RELATIVE is not set
-# CONFIG_GIC_V3_ITS is not set
-# CONFIG_GICV3_SUPPORT_GIC600 is not set
-CONFIG_STATIC_RELA=y
-CONFIG_DMA_ADDR_T_64BIT=y
-CONFIG_ARM_ASM_UNIFIED=y
-# CONFIG_SYS_ARM_CACHE_CP15 is not set
-# CONFIG_SYS_ARM_MMU is not set
-# CONFIG_SYS_ARM_MPU is not set
-CONFIG_SYS_ARM_ARCH=8
-CONFIG_SYS_ARM_CACHE_WRITEBACK=y
-# CONFIG_SYS_ARM_CACHE_WRITETHROUGH is not set
-# CONFIG_SYS_ARM_CACHE_WRITEALLOC is not set
-# CONFIG_ARCH_CPU_INIT is not set
-CONFIG_SYS_ARCH_TIMER=y
-CONFIG_ARM_SMCCC=y
-# CONFIG_SYS_L2_PL310 is not set
-# CONFIG_SPL_SYS_L2_PL310 is not set
-# CONFIG_SYS_L2CACHE_OFF is not set
-# CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK is not set
-# CONFIG_USE_ARCH_MEMCPY is not set
-# CONFIG_USE_ARCH_MEMSET is not set
-CONFIG_ARM64_SUPPORT_AARCH32=y
-# CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_DAVINCI is not set
-# CONFIG_ARCH_HISTB is not set
-# CONFIG_ARCH_KIRKWOOD is not set
-# CONFIG_ARCH_MVEBU is not set
-# CONFIG_ARCH_ORION5X is not set
-# CONFIG_ARCH_BCM283X is not set
-# CONFIG_ARCH_BCMSTB is not set
-# CONFIG_ARCH_BCMBCA is not set
-# CONFIG_TARGET_VEXPRESS_CA9X4 is not set
-# CONFIG_TARGET_BCMNS is not set
-# CONFIG_TARGET_BCMNS3 is not set
-# CONFIG_ARCH_EXYNOS is not set
-# CONFIG_ARCH_S5PC1XX is not set
-# CONFIG_ARCH_HIGHBANK is not set
-# CONFIG_ARCH_INTEGRATOR is not set
-# CONFIG_ARCH_IPQ40XX is not set
-# CONFIG_ARCH_KEYSTONE is not set
-# CONFIG_ARCH_K3 is not set
-# CONFIG_ARCH_OMAP2PLUS is not set
-# CONFIG_ARCH_MESON is not set
-# CONFIG_ARCH_MEDIATEK is not set
-# CONFIG_ARCH_LPC32XX is not set
-# CONFIG_ARCH_IMX8 is not set
-# CONFIG_ARCH_IMX8M is not set
-# CONFIG_ARCH_IMX8ULP is not set
-# CONFIG_ARCH_IMX9 is not set
-# CONFIG_ARCH_IMXRT is not set
-# CONFIG_ARCH_MX23 is not set
-# CONFIG_ARCH_MX28 is not set
-# CONFIG_ARCH_MX31 is not set
-# CONFIG_ARCH_MX7ULP is not set
-# CONFIG_ARCH_MX7 is not set
-# CONFIG_ARCH_MX6 is not set
-# CONFIG_ARCH_MX5 is not set
-# CONFIG_ARCH_NEXELL is not set
-# CONFIG_ARCH_NPCM is not set
-# CONFIG_ARCH_APPLE is not set
-# CONFIG_ARCH_OWL is not set
 CONFIG_ARCH_QEMU=y
-# CONFIG_ARCH_RENESAS is not set
-# CONFIG_ARCH_SNAPDRAGON is not set
-# CONFIG_ARCH_SOCFPGA is not set
-# CONFIG_ARCH_SUNXI is not set
-# CONFIG_ARCH_U8500 is not set
-# CONFIG_ARCH_VERSAL is not set
-# CONFIG_ARCH_VERSAL2 is not set
-# CONFIG_ARCH_VERSAL_NET is not set
-# CONFIG_ARCH_VF610 is not set
-# CONFIG_ARCH_ZYNQ is not set
-# CONFIG_ARCH_ZYNQMP_R5 is not set
-# CONFIG_ARCH_ZYNQMP is not set
-# CONFIG_ARCH_TEGRA is not set
-# CONFIG_ARCH_VEXPRESS64 is not set
-# CONFIG_TARGET_CORSTONE1000 is not set
-# CONFIG_TARGET_TOTAL_COMPUTE is not set
-# CONFIG_TARGET_LS2080A_EMU is not set
-# CONFIG_TARGET_LS1088AQDS is not set
-# CONFIG_TARGET_LS2080AQDS is not set
-# CONFIG_TARGET_LS2080ARDB is not set
-# CONFIG_TARGET_LS2081ARDB is not set
-# CONFIG_TARGET_LX2160ARDB is not set
-# CONFIG_TARGET_LX2160AQDS is not set
-# CONFIG_TARGET_LX2162AQDS is not set
-# CONFIG_TARGET_HIKEY is not set
-# CONFIG_TARGET_HIKEY960 is not set
-# CONFIG_TARGET_POPLAR is not set
-# CONFIG_TARGET_LS1012AQDS is not set
-# CONFIG_TARGET_LS1012ARDB is not set
-# CONFIG_TARGET_LS1012A2G5RDB is not set
-# CONFIG_TARGET_LS1012AFRWY is not set
-# CONFIG_TARGET_LS1012AFRDM is not set
-# CONFIG_TARGET_LS1028AQDS is not set
-# CONFIG_TARGET_LS1028ARDB is not set
-# CONFIG_TARGET_LS1088ARDB is not set
-# CONFIG_TARGET_LS1021AQDS is not set
-# CONFIG_TARGET_LS1021ATWR is not set
-# CONFIG_TARGET_PG_WCOM_SELI8 is not set
-# CONFIG_TARGET_PG_WCOM_EXPU1 is not set
-# CONFIG_TARGET_LS1021ATSN is not set
-# CONFIG_TARGET_LS1021AIOT is not set
-# CONFIG_TARGET_LS1043AQDS is not set
-# CONFIG_TARGET_LS1043ARDB is not set
-# CONFIG_TARGET_LS1046AQDS is not set
-# CONFIG_TARGET_LS1046ARDB is not set
-# CONFIG_TARGET_LS1046AFRWY is not set
-# CONFIG_ARCH_SC5XX is not set
-# CONFIG_TARGET_SL28 is not set
-# CONFIG_TARGET_TEN64 is not set
-# CONFIG_ARCH_UNIPHIER is not set
-# CONFIG_ARCH_SYNQUACER is not set
-# CONFIG_ARCH_STM32 is not set
-# CONFIG_ARCH_STI is not set
-# CONFIG_ARCH_STM32MP is not set
-# CONFIG_ARCH_ROCKCHIP is not set
-# CONFIG_ARCH_OCTEONTX is not set
-# CONFIG_ARCH_OCTEONTX2 is not set
-# CONFIG_TARGET_THUNDERX_88XX is not set
-# CONFIG_ARCH_ASPEED is not set
-# CONFIG_TARGET_DURIAN is not set
-# CONFIG_TARGET_POMELO is not set
-# CONFIG_TARGET_PE2201 is not set
-# CONFIG_TARGET_PRESIDIO_ASIC is not set
-# CONFIG_TARGET_XENGUEST_ARM64 is not set
-# CONFIG_ARCH_GXP is not set
-# CONFIG_STATIC_MACH_TYPE is not set
 CONFIG_TEXT_BASE=0x50000000
 CONFIG_SYS_MALLOC_LEN=0x1000000
-CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_NR_DRAM_BANKS=1
-CONFIG_ENV_SOURCE_FILE=""
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000
 CONFIG_ENV_SIZE=0x40000
-# CONFIG_DM_GPIO is not set
 CONFIG_DEFAULT_DEVICE_TREE="qemu-arm64"
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-# CONFIG_OF_LIBFDT_OVERLAY is not set
-CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
-# CONFIG_DM_RESET is not set
-CONFIG_SYS_MONITOR_LEN=0
-# CONFIG_TARGET_QEMU_ARM_32BIT is not set
-CONFIG_TARGET_QEMU_ARM_64BIT=y
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
-CONFIG_ERR_PTR_OFFSET=0x0
-CONFIG_PRE_CON_BUF_ADDR=0x40100000
-CONFIG_PRE_CON_BUF_SZ=4096
 CONFIG_DEBUG_UART_BASE=0x9000000
 CONFIG_DEBUG_UART_CLOCK=0
-# CONFIG_DEBUG_UART_BOARD_INIT is not set
-CONFIG_IDENT_STRING=""
-CONFIG_SYS_CLK_FREQ=0
-# CONFIG_CHIP_DIP_SCAN is not set
-# CONFIG_CMO_BY_VA_ONLY is not set
-# CONFIG_ARMV8_MULTIENTRY is not set
-# CONFIG_ARMV8_SET_SMPEN is not set
-# CONFIG_ARMV8_SWITCH_TO_EL1 is not set
-
-#
-# ARMv8 secure monitor firmware
-#
-# CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT is not set
-CONFIG_PSCI_RESET=y
-# CONFIG_ARMV8_PSCI is not set
-# CONFIG_ARMV8_EA_EL3_FIRST is not set
-# CONFIG_ARMV8_UDELAY_EVENT_STREAM is not set
 CONFIG_ARMV8_CRYPTO=y
-CONFIG_ARMV8_CE_SHA1=y
-CONFIG_ARMV8_CE_SHA256=y
-# CONFIG_CMD_DEKBLOB is not set
-# CONFIG_IMX_CAAM_DEK_ENCAP is not set
-# CONFIG_IMX_OPTEE_DEK_ENCAP is not set
-# CONFIG_IMX_SECO_DEK_ENCAP is not set
-# CONFIG_IMX_ELE_DEK_ENCAP is not set
-# CONFIG_CMD_HDMIDETECT is not set
-CONFIG_IMX_DCD_ADDR=0x00910000
-CONFIG_SYS_MEM_TOP_HIDE=0x0
 CONFIG_SYS_LOAD_ADDR=0x40200000
-CONFIG_MTDPARTS_NOR0="64m(u-boot)"
-CONFIG_MTDPARTS_NOR1="64m(u-boot-env)"
-
-#
-# ARM debug
-#
-CONFIG_BUILD_TARGET=""
-# CONFIG_SYS_PCI_64BIT is not set
 CONFIG_PCI=y
-CONFIG_FWU_NUM_BANKS=2
-CONFIG_FWU_NUM_IMAGES_PER_BANK=2
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
-# CONFIG_OF_BOARD_FIXUP is not set
-
-#
-# Functionality shared between NXP SoCs
-#
-# CONFIG_NXP_ESBC is not set
-CONFIG_SYS_LITTLE_ENDIAN=y
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=120200
-CONFIG_CLANG_VERSION=0
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-# CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
-# CONFIG_CC_OPTIMIZE_FOR_DEBUG is not set
-# CONFIG_OPTIMIZE_INLINING is not set
-CONFIG_ARCH_SUPPORTS_LTO=y
-# CONFIG_LTO is not set
-CONFIG_CC_HAS_ASM_INLINE=y
-# CONFIG_XEN is not set
-CONFIG_ENV_VARS_UBOOT_CONFIG=y
-# CONFIG_SYS_BOOT_GET_CMDLINE is not set
-# CONFIG_SYS_BOOT_GET_KBD is not set
-CONFIG_SYS_MALLOC_F=y
-# CONFIG_VALGRIND is not set
-CONFIG_EXPERT=y
-CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y
-# CONFIG_SYS_MALLOC_DEFAULT_TO_INIT is not set
-# CONFIG_TOOLS_DEBUG is not set
-CONFIG_PHYS_64BIT=y
-CONFIG_FDT_64BIT=y
-# CONFIG_REMAKE_ELF is not set
-# CONFIG_HAS_BOARD_SIZE_LIMIT is not set
-# CONFIG_SYS_CUSTOM_LDSCRIPT is not set
-CONFIG_PLATFORM_ELFENTRY="_start"
-CONFIG_STACK_SIZE=0x1000000
-CONFIG_SYS_SRAM_BASE=0x0
-CONFIG_SYS_SRAM_SIZE=0x0
-# CONFIG_MP is not set
-CONFIG_HAVE_TEXT_BASE=y
-# CONFIG_HAVE_SYS_UBOOT_START is not set
-CONFIG_SYS_UBOOT_START=0x50000000
-CONFIG_HAVE_SYS_MONITOR_BASE=y
-CONFIG_SYS_MONITOR_BASE=0x50000000
-# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
-# CONFIG_API is not set
-
-#
-# Boot options
-#
-
-#
-# Boot images
-#
-# CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_TIMESTAMP=y
 CONFIG_FIT=y
-CONFIG_FIT_EXTERNAL_OFFSET=0x0
-CONFIG_FIT_FULL_CHECK=y
 CONFIG_FIT_SIGNATURE=y
-CONFIG_FIT_SIGNATURE_MAX_SIZE=0x10000000
-# CONFIG_FIT_RSASSA_PSS is not set
-# CONFIG_FIT_CIPHER is not set
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_BEST_MATCH=y
-CONFIG_FIT_PRINT=y
-# CONFIG_SPL_LOAD_FIT_FULL is not set
-CONFIG_PXE_UTILS=y
-CONFIG_BOOT_DEFAULTS_FEATURES=y
-CONFIG_BOOT_DEFAULTS_CMDS=y
-CONFIG_BOOT_DEFAULTS=y
-CONFIG_BOOTSTD=y
 CONFIG_BOOTSTD_FULL=y
-CONFIG_BOOTSTD_DEFAULTS=y
-CONFIG_BOOTSTD_BOOTCOMMAND=y
-CONFIG_BOOTMETH_GLOBAL=y
-# CONFIG_BOOTMETH_ANDROID is not set
-# CONFIG_BOOTMETH_CROS is not set
-CONFIG_BOOTMETH_EXTLINUX=y
-CONFIG_BOOTMETH_EXTLINUX_PXE=y
-CONFIG_BOOTMETH_EFILOADER=y
-CONFIG_BOOTMETH_EFI_BOOTMGR=y
-CONFIG_BOOTMETH_QFW=y
-CONFIG_BOOTMETH_VBE=y
-CONFIG_BOOTMETH_DISTRO=y
-CONFIG_BOOTMETH_VBE_REQUEST=y
-CONFIG_BOOTMETH_VBE_SIMPLE=y
-CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
-CONFIG_EXPO=y
-CONFIG_BOOTMETH_SCRIPT=y
 CONFIG_LEGACY_IMAGE_FORMAT=y
-# CONFIG_MEASURED_BOOT is not set
-CONFIG_SYS_BOOTM_LEN=0x4000000
-CONFIG_SUPPORT_RAW_INITRD=y
-# CONFIG_CHROMEOS is not set
-# CONFIG_CHROMEOS_VBOOT is not set
-# CONFIG_RAMBOOT_PBL is not set
-CONFIG_SYS_BOOT_RAMDISK_HIGH=y
-# CONFIG_DISTRO_DEFAULTS is not set
-
-#
-# Boot timing
-#
-# CONFIG_BOOTSTAGE is not set
-# CONFIG_SHOW_BOOT_PROGRESS is not set
-
-#
-# Boot media
-#
-# CONFIG_NAND_BOOT is not set
-# CONFIG_ONENAND_BOOT is not set
-# CONFIG_QSPI_BOOT is not set
-# CONFIG_SATA_BOOT is not set
-# CONFIG_SD_BOOT is not set
-# CONFIG_SD_BOOT_QSPI is not set
-# CONFIG_SPI_BOOT is not set
-
-#
-# Autoboot options
-#
-CONFIG_AUTOBOOT=y
-CONFIG_BOOTDELAY=2
-# CONFIG_AUTOBOOT_KEYED is not set
-# CONFIG_AUTOBOOT_USE_MENUKEY is not set
-# CONFIG_BOOT_RETRY is not set
-
-#
-# Image support
-#
-# CONFIG_IMAGE_PRE_LOAD is not set
-
-#
-# Devicetree fixup
-#
-# CONFIG_OF_ENV_SETUP is not set
-# CONFIG_OF_BOARD_SETUP is not set
-# CONFIG_OF_SYSTEM_SETUP is not set
-# CONFIG_OF_STDOUT_VIA_ALIAS is not set
-# CONFIG_FDT_FIXUP_PARTITIONS is not set
-# CONFIG_FDT_SIMPLEFB is not set
-CONFIG_ARCH_FIXUP_FDT_MEMORY=y
-# CONFIG_USE_BOOTARGS is not set
-# CONFIG_BOOTARGS_SUBST is not set
-CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
 CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="usb start"
-CONFIG_PREBOOT_DEFINED=y
-CONFIG_DEFAULT_FDT_FILE=""
-# CONFIG_SAVE_PREV_BL_FDT_ADDR is not set
-# CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR is not set
-
-#
-# Configuration editor
-#
-# CONFIG_CEDIT is not set
-
-#
-# Console
-#
-CONFIG_MENU=y
-# CONFIG_CONSOLE_RECORD is not set
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1044
-# CONFIG_DISABLE_CONSOLE is not set
-CONFIG_LOGLEVEL=4
-# CONFIG_SILENT_CONSOLE is not set
-# CONFIG_SPL_SILENT_CONSOLE is not set
-# CONFIG_TPL_SILENT_CONSOLE is not set
-CONFIG_PRE_CONSOLE_BUFFER=y
-CONFIG_CONSOLE_FLUSH_SUPPORT=y
-# CONFIG_CONSOLE_FLUSH_ON_NEWLINE is not set
-CONFIG_CONSOLE_MUX=y
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
-# CONFIG_SYS_CONSOLE_ENV_OVERWRITE is not set
-# CONFIG_SYS_CONSOLE_INFO_QUIET is not set
-CONFIG_SYS_STDIO_DEREGISTER=y
-# CONFIG_SPL_SYS_STDIO_DEREGISTER is not set
-CONFIG_SYS_DEVICE_NULLDEV=y
-
-#
-# Logging
-#
-# CONFIG_LOG is not set
-
-#
-# Init options
-#
-# CONFIG_BOARD_TYPES is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
-# CONFIG_DISPLAY_BOARDINFO_LATE is not set
-
-#
-# Start-up hooks
-#
-CONFIG_CYCLIC=y
-# CONFIG_SPL_CYCLIC is not set
-CONFIG_CYCLIC_MAX_CPU_TIME_US=5000
-CONFIG_EVENT=y
-CONFIG_EVENT_DYNAMIC=y
-# CONFIG_EVENT_DEBUG is not set
-# CONFIG_ARCH_MISC_INIT is not set
-# CONFIG_BOARD_EARLY_INIT_F is not set
-# CONFIG_BOARD_EARLY_INIT_R is not set
-# CONFIG_BOARD_POSTCLK_INIT is not set
-CONFIG_BOARD_LATE_INIT=y
-# CONFIG_CLOCKS is not set
-# CONFIG_HWCONFIG is not set
-CONFIG_LAST_STAGE_INIT=y
-# CONFIG_MISC_INIT_R is not set
-# CONFIG_SYS_MALLOC_BOOTPARAMS is not set
-# CONFIG_ID_EEPROM is not set
 CONFIG_PCI_INIT_R=y
-# CONFIG_RESET_PHY_R is not set
-
-#
-# Security support
-#
-CONFIG_HASH=y
-# CONFIG_STACKPROTECTOR is not set
-# CONFIG_BOARD_RNG_SEED is not set
-
-#
-# Update support
-#
-CONFIG_UPDATE_COMMON=y
-CONFIG_UPDATE_TFTP_CNT_MAX=0
-CONFIG_UPDATE_TFTP_MSEC_MAX=100
-CONFIG_UPDATE_LOAD_ADDR=0x100000
-# CONFIG_UPDATE_FIT is not set
-# CONFIG_ANDROID_AB is not set
-
-#
-# Blob list
-#
-# CONFIG_BLOBLIST is not set
-CONFIG_IMAGE_SIGN_INFO=y
-CONFIG_CMDLINE=y
-CONFIG_HUSH_PARSER=y
-
-#
-# Hush flavor to use
-#
-CONFIG_HUSH_OLD_PARSER=y
-# CONFIG_HUSH_MODERN_PARSER is not set
-CONFIG_CMDLINE_EDITING=y
-# CONFIG_CMDLINE_PS_SUPPORT is not set
-CONFIG_AUTO_COMPLETE=y
-CONFIG_SYS_LONGHELP=y
-CONFIG_SYS_PROMPT="=> "
-CONFIG_SYS_PROMPT_HUSH_PS2="> "
-CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_XTRACE=y
-
-#
-# Commands
-#
-
-#
-# Info commands
-#
-CONFIG_CMD_BDI=y
-# CONFIG_CMD_BDINFO_EXTRA is not set
-# CONFIG_CMD_CONFIG is not set
-CONFIG_CMD_CONSOLE=y
-# CONFIG_CMD_HISTORY is not set
-# CONFIG_CMD_LICENSE is not set
-# CONFIG_CMD_PMC is not set
 CONFIG_CMD_SMBIOS=y
-
-#
-# Boot commands
-#
-CONFIG_CMD_BOOTD=y
-CONFIG_CMD_BOOTM=y
-CONFIG_CMD_BOOTDEV=y
-CONFIG_CMD_BOOTFLOW=y
-CONFIG_CMD_BOOTFLOW_FULL=y
-CONFIG_CMD_BOOTFLOW_BOOTDELAY=8
-CONFIG_CMD_BOOTMETH=y
-CONFIG_BOOTM_EFI=y
-CONFIG_BOOTM_ELF=y
 CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_BOOTI=y
-CONFIG_BOOTM_LINUX=y
-CONFIG_BOOTM_NETBSD=y
-# CONFIG_BOOTM_OPENRTOS is not set
-# CONFIG_BOOTM_OSE is not set
-CONFIG_BOOTM_PLAN9=y
-CONFIG_BOOTM_RTEMS=y
-CONFIG_CMD_VBE=y
-CONFIG_BOOTM_VXWORKS=y
-CONFIG_CMD_BOOTEFI=y
-CONFIG_CMD_BOOTEFI_BINARY=y
-CONFIG_CMD_BOOTEFI_BOOTMGR=y
-CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
-CONFIG_CMD_BOOTEFI_HELLO=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
-# CONFIG_CMD_BOOTMENU is not set
-# CONFIG_CMD_ADTIMG is not set
-CONFIG_CMD_ELF=y
-# CONFIG_CMD_ELF_FDT_SETUP is not set
-CONFIG_CMD_FDT=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_RUN=y
-CONFIG_CMD_IMI=y
-# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_XIMG=y
-CONFIG_SYS_XIMG_LEN=0x800000
-
-#
-# Environment commands
-#
-# CONFIG_CMD_ASKENV is not set
-CONFIG_CMD_EXPORTENV=y
-CONFIG_CMD_IMPORTENV=y
-CONFIG_CMD_EDITENV=y
-# CONFIG_CMD_GREPENV is not set
-CONFIG_CMD_SAVEENV=y
-# CONFIG_CMD_ERASEENV is not set
-CONFIG_CMD_ENV_EXISTS=y
-# CONFIG_CMD_ENV_CALLBACK is not set
-# CONFIG_CMD_ENV_FLAGS is not set
 CONFIG_CMD_NVEDIT_EFI=y
-# CONFIG_CMD_NVEDIT_INDIRECT is not set
-# CONFIG_CMD_NVEDIT_INFO is not set
-# CONFIG_CMD_NVEDIT_LOAD is not set
-# CONFIG_CMD_NVEDIT_SELECT is not set
-
-#
-# Memory commands
-#
-# CONFIG_CMD_BINOP is not set
-CONFIG_CMD_CRC32=y
-# CONFIG_CRC32_VERIFY is not set
-# CONFIG_LOOPW is not set
-# CONFIG_CMD_MD5SUM is not set
-# CONFIG_CMD_MEMINFO is not set
-CONFIG_CMD_MEMORY=y
-# CONFIG_CMD_MEM_SEARCH is not set
-# CONFIG_CMD_MX_CYCLIC is not set
-CONFIG_CMD_RANDOM=y
-# CONFIG_CMD_MEMTEST is not set
-# CONFIG_CMD_SHA1SUM is not set
-# CONFIG_CMD_STRINGS is not set
-
-#
-# Compression commands
-#
-CONFIG_CMD_LZMADEC=y
-CONFIG_CMD_UNLZ4=y
-CONFIG_CMD_UNZIP=y
-# CONFIG_CMD_ZIP is not set
-
-#
-# Device access commands
-#
-# CONFIG_CMD_ARMFLASH is not set
-# CONFIG_CMD_BCB is not set
-# CONFIG_CMD_BIND is not set
-# CONFIG_CMD_CLK is not set
-# CONFIG_CMD_DEMO is not set
 CONFIG_CMD_DFU=y
-CONFIG_CMD_DM=y
-CONFIG_CMD_FLASH=y
-# CONFIG_CMD_FUSE is not set
-# CONFIG_CMD_GPIO is not set
-# CONFIG_CMD_GPT is not set
-# CONFIG_CMD_IDE is not set
-# CONFIG_CMD_IO is not set
-# CONFIG_CMD_IOTRACE is not set
-# CONFIG_CMD_I2C is not set
-CONFIG_CMD_LOADB=y
-# CONFIG_CMD_LOADM is not set
-CONFIG_CMD_LOADS=y
-# CONFIG_LOADS_ECHO is not set
-# CONFIG_CMD_SAVES is not set
-# CONFIG_SYS_LOADS_BAUD_CHANGE is not set
-CONFIG_CMD_LOADXY_TIMEOUT=90
-# CONFIG_CMD_LSBLK is not set
-# CONFIG_CMD_MBR is not set
-# CONFIG_CMD_CLONE is not set
 CONFIG_CMD_MTD=y
-# CONFIG_CMD_MTD_OTP is not set
-CONFIG_CMD_NVME=y
-# CONFIG_CMD_ONENAND is not set
-# CONFIG_CMD_OSD is not set
-CONFIG_CMD_PART=y
 CONFIG_CMD_PCI=y
-# CONFIG_CMD_PCI_MPS is not set
-CONFIG_CMD_POWEROFF=y
-# CONFIG_CMD_READ is not set
-# CONFIG_CMD_SATA is not set
-CONFIG_CMD_SCSI=y
-# CONFIG_CMD_SDRAM is not set
-CONFIG_CMD_USB=y
-# CONFIG_CMD_USB_SDP is not set
-# CONFIG_CMD_RKMTD is not set
-CONFIG_CMD_VIRTIO=y
-# CONFIG_CMD_WRITE is not set
-
-#
-# Shell scripting commands
-#
-# CONFIG_CMD_CAT is not set
-CONFIG_CMD_ECHO=y
-CONFIG_CMD_ITEST=y
-CONFIG_CMD_SOURCE=y
-CONFIG_CMD_SETEXPR=y
-# CONFIG_CMD_SETEXPR_FMT is not set
-# CONFIG_CMD_XXD is not set
-
-#
-# Android support commands
-#
-CONFIG_CMD_NET=y
-CONFIG_CMD_BOOTP=y
-CONFIG_CMD_DHCP=y
-# CONFIG_BOOTP_MAY_FAIL is not set
-CONFIG_BOOTP_BOOTPATH=y
-# CONFIG_BOOTP_VENDOREX is not set
-# CONFIG_BOOTP_BOOTFILESIZE is not set
-CONFIG_BOOTP_DNS=y
-# CONFIG_BOOTP_DNS2 is not set
-CONFIG_BOOTP_GATEWAY=y
-CONFIG_BOOTP_HOSTNAME=y
-# CONFIG_BOOTP_PREFER_SERVERIP is not set
-CONFIG_BOOTP_SUBNETMASK=y
-# CONFIG_BOOTP_NISDOMAIN is not set
-# CONFIG_BOOTP_NTPSERVER is not set
-# CONFIG_CMD_PCAP is not set
-CONFIG_BOOTP_PXE=y
-CONFIG_BOOTP_PXE_CLIENTARCH=0x16
-# CONFIG_BOOTP_PXE_DHCP_OPTION is not set
-CONFIG_BOOTP_VCI_STRING="U-Boot.armv8"
-CONFIG_CMD_TFTPBOOT=y
-# CONFIG_CMD_TFTPPUT is not set
-# CONFIG_CMD_TFTPSRV is not set
-CONFIG_NET_TFTP_VARS=y
-# CONFIG_CMD_RARP is not set
-# CONFIG_CMD_NFS is not set
-# CONFIG_SYS_DISABLE_AUTOLOAD is not set
-CONFIG_CMD_WGET=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-# CONFIG_CMD_CDP is not set
-# CONFIG_CMD_SNTP is not set
-CONFIG_CMD_DNS=y
-# CONFIG_CMD_LINK_LOCAL is not set
-# CONFIG_CMD_ETHSW is not set
-CONFIG_CMD_PXE=y
-# CONFIG_CMD_WOL is not set
-
-#
-# Misc commands
-#
-# CONFIG_CMD_2048 is not set
-# CONFIG_CMD_BMP is not set
-# CONFIG_CMD_BSP is not set
-CONFIG_CMD_BLOCK_CACHE=y
-CONFIG_CMD_BLKMAP=y
-# CONFIG_CMD_CACHE is not set
-# CONFIG_CMD_CONITRACE is not set
-CONFIG_CMD_CLS=y
 CONFIG_CMD_EFIDEBUG=y
-CONFIG_CMD_EFICONFIG=y
-# CONFIG_CMD_EXCEPTION is not set
-# CONFIG_CMD_INI is not set
-CONFIG_CMD_DATE=y
-# CONFIG_CMD_RTC is not set
-# CONFIG_CMD_TIME is not set
-# CONFIG_CMD_GETTIME is not set
-# CONFIG_CMD_PAUSE is not set
-# CONFIG_CMD_RNG is not set
-# CONFIG_CMD_KASLRSEED is not set
-CONFIG_CMD_SLEEP=y
-# CONFIG_CMD_TIMER is not set
-# CONFIG_CMD_SYSBOOT is not set
-CONFIG_CMD_QFW=y
-# CONFIG_CMD_PSTORE is not set
-# CONFIG_CMD_TERMINAL is not set
-# CONFIG_CMD_UUID is not set
-CONFIG_CMD_VIDCONSOLE=y
-# CONFIG_CMD_SELECT_FONT is not set
-
-#
-# TI specific command line interface
-#
-
-#
-# Power commands
-#
-
-#
-# Security commands
-#
-# CONFIG_CMD_AES is not set
-# CONFIG_CMD_BLOB is not set
-# CONFIG_CMD_HASH is not set
-# CONFIG_CMD_HVC is not set
-# CONFIG_CMD_SMC is not set
-CONFIG_CMD_TPM_V1=y
-CONFIG_CMD_TPM_V2=y
 CONFIG_CMD_TPM=y
-# CONFIG_CMD_TPM_TEST is not set
-
-#
-# Firmware commands
-#
-
-#
-# Filesystem commands
-#
-# CONFIG_CMD_BTRFS is not set
-# CONFIG_CMD_EROFS is not set
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-# CONFIG_CMD_EXT4_WRITE is not set
-CONFIG_CMD_FAT=y
-# CONFIG_CMD_SQUASHFS is not set
-CONFIG_CMD_FS_GENERIC=y
-# CONFIG_CMD_FS_UUID is not set
-# CONFIG_CMD_JFFS2 is not set
 CONFIG_CMD_MTDPARTS=y
-# CONFIG_CMD_MTDPARTS_SPREAD is not set
-# CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES is not set
-# CONFIG_CMD_ZFS is not set
-
-#
-# Debug commands
-#
-CONFIG_CMD_CYCLIC=y
-# CONFIG_CMD_DIAG is not set
-# CONFIG_CMD_EVENT is not set
-# CONFIG_CMD_LOG is not set
-# CONFIG_CMD_UBI is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITIONS=y
-# CONFIG_MAC_PARTITION is not set
-CONFIG_DOS_PARTITION=y
-CONFIG_ISO_PARTITION=y
-# CONFIG_AMIGA_PARTITION is not set
-CONFIG_EFI_PARTITION=y
-CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=128
-CONFIG_EFI_PARTITION_ENTRIES_OFF=0
-CONFIG_PARTITION_UUIDS=y
-# CONFIG_PARTITION_TYPE_GUID is not set
-CONFIG_SUPPORT_OF_CONTROL=y
-
-#
-# Device Tree Control
-#
-CONFIG_OF_CONTROL=y
-CONFIG_OF_REAL=y
-# CONFIG_OF_LIVE is not set
-# CONFIG_OF_UPSTREAM is not set
-CONFIG_OF_SEPARATE=y
-# CONFIG_OF_EMBED is not set
-# CONFIG_OF_INITIAL_DTB_READONLY is not set
-CONFIG_OF_BOARD=y
-CONFIG_OF_HAS_PRIOR_STAGE=y
-CONFIG_OF_OMIT_DTB=y
-CONFIG_DEVICE_TREE_INCLUDES=""
-CONFIG_OF_LIST="qemu-arm64"
-# CONFIG_MULTI_DTB_FIT is not set
-CONFIG_OF_TAG_MIGRATE=y
-# CONFIG_OF_DTB_PROPS_REMOVE is not set
-
-#
-# Environment
-#
-CONFIG_ENV_SUPPORT=y
-CONFIG_SAVEENV=y
-# CONFIG_ENV_OVERWRITE is not set
-# CONFIG_OVERWRITE_ETHADDR_ONCE is not set
-CONFIG_ENV_MIN_ENTRIES=64
-CONFIG_ENV_MAX_ENTRIES=512
-CONFIG_ENV_IS_DEFAULT=y
-CONFIG_ENV_IS_NOWHERE=y
-# CONFIG_ENV_IS_IN_EEPROM is not set
-# CONFIG_ENV_IS_IN_FAT is not set
-# CONFIG_ENV_IS_IN_EXT4 is not set
-# CONFIG_ENV_IS_IN_FLASH is not set
-# CONFIG_ENV_IS_IN_NAND is not set
-# CONFIG_ENV_IS_IN_NVRAM is not set
-# CONFIG_ENV_IS_IN_REMOTE is not set
-# CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set
-# CONFIG_SYS_RELOC_GD_ENV_ADDR is not set
-# CONFIG_USE_DEFAULT_ENV_FILE is not set
-# CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set
-# CONFIG_ENV_IMPORT_FDT is not set
-# CONFIG_ENV_APPEND is not set
-# CONFIG_ENV_WRITEABLE_LIST is not set
-# CONFIG_ENV_ACCESS_IGNORE_FORCE is not set
-# CONFIG_USE_BOOTFILE is not set
-# CONFIG_USE_ETHPRIME is not set
-# CONFIG_USE_HOSTNAME is not set
-# CONFIG_VERSION_VARIABLE is not set
-CONFIG_NET=y
-CONFIG_ARP_TIMEOUT=5000
-CONFIG_NET_RETRY_COUNT=5
-# CONFIG_PROT_UDP is not set
-CONFIG_BOOTDEV_ETH=y
-# CONFIG_BOOTP_SEND_HOSTNAME is not set
-# CONFIG_NET_RANDOM_ETHADDR is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_IP_DEFRAG is not set
-# CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set
-CONFIG_TFTP_BLOCKSIZE=1468
-# CONFIG_TFTP_PORT is not set
-CONFIG_TFTP_WINDOWSIZE=1
-# CONFIG_TFTP_TSIZE is not set
-# CONFIG_SERVERIP_FROM_PROXYDHCP is not set
-CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS=100
-# CONFIG_KEEP_SERVERADDR is not set
-# CONFIG_UDP_CHECKSUM is not set
-# CONFIG_BOOTP_SERVERIP is not set
-CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64
-# CONFIG_USE_GATEWAYIP is not set
-# CONFIG_USE_IPADDR is not set
-# CONFIG_USE_NETMASK is not set
-# CONFIG_USE_ROOTPATH is not set
-# CONFIG_USE_SERVERIP is not set
-CONFIG_PROT_TCP=y
-# CONFIG_PROT_TCP_SACK is not set
-# CONFIG_IPV6 is not set
-CONFIG_SYS_RX_ETH_BUFFER=4
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_DM=y
-# CONFIG_DM_WARN is not set
-# CONFIG_DM_DEBUG is not set
-# CONFIG_DM_STATS is not set
-CONFIG_DM_DEVICE_REMOVE=y
-CONFIG_DM_EVENT=y
-CONFIG_DM_STDIO=y
-CONFIG_DM_SEQ_ALIAS=y
-# CONFIG_DM_DMA is not set
-# CONFIG_REGMAP is not set
-# CONFIG_DEVRES is not set
-CONFIG_SIMPLE_BUS=y
-# CONFIG_SIMPLE_BUS_CORRECT_RANGE is not set
-CONFIG_OF_TRANSLATE=y
-# CONFIG_TRANSLATION_OFFSET is not set
-CONFIG_DM_DEV_READ_INLINE=y
-# CONFIG_OFNODE_MULTI_TREE is not set
-# CONFIG_BOUNCE_BUFFER is not set
-# CONFIG_ADC is not set
-# CONFIG_SATA is not set
-CONFIG_LIBATA=y
 CONFIG_SCSI_AHCI=y
-
-#
-# SATA/SCSI device support
-#
 CONFIG_AHCI_PCI=y
-# CONFIG_DWC_AHCI is not set
-# CONFIG_DWC_AHSATA is not set
-# CONFIG_MTK_AHCI is not set
-# CONFIG_SUNXI_AHCI is not set
-# CONFIG_AXI is not set
-
-#
-# Bus devices
-#
-CONFIG_BLK=y
-CONFIG_BLOCK_CACHE=y
-CONFIG_BLKMAP=y
-# CONFIG_EFI_MEDIA is not set
-# CONFIG_IDE is not set
-# CONFIG_LBA48 is not set
-# CONFIG_SYS_64BIT_LBA is not set
-# CONFIG_RKMTD is not set
-# CONFIG_BOOTCOUNT_LIMIT is not set
-
-#
-# Button Support
-#
-# CONFIG_BUTTON is not set
-
-#
-# Cache Controller drivers
-#
-# CONFIG_CACHE is not set
-# CONFIG_L2X0_CACHE is not set
-# CONFIG_ANDES_L2_CACHE is not set
-# CONFIG_NCORE_CACHE is not set
-# CONFIG_SIFIVE_CCACHE is not set
-# CONFIG_SIFIVE_PL2 is not set
-
-#
-# Clock
-#
-# CONFIG_CLK is not set
-# CONFIG_CLK_CCF is not set
-# CONFIG_COMMON_CLK_ADI_SHARED is not set
-# CONFIG_CLK_RCAR is not set
-# CONFIG_CLK_RCAR_CPG_LIB is not set
-# CONFIG_CPU is not set
-
-#
-# Hardware crypto devices
-#
-# CONFIG_DM_HASH is not set
-# CONFIG_FSL_CAAM is not set
-CONFIG_CAAM_64BIT=y
-# CONFIG_SYS_FSL_SEC_BE is not set
-# CONFIG_SYS_FSL_SEC_LE is not set
-# CONFIG_FSL_DCP_RNG is not set
-# CONFIG_NPCM_AES is not set
-# CONFIG_NPCM_SHA is not set
-# CONFIG_DDR_SPD is not set
-# CONFIG_IMX_SNPS_DDR_PHY is not set
-
-#
-# Demo for driver model
-#
-# CONFIG_DM_DEMO is not set
-
-#
-# DFU support
-#
-CONFIG_DFU=y
-CONFIG_DFU_OVER_TFTP=y
-CONFIG_DFU_WRITE_ALT=y
 CONFIG_DFU_TFTP=y
-# CONFIG_DFU_TIMEOUT is not set
 CONFIG_DFU_MTD=y
 CONFIG_DFU_RAM=y
-# CONFIG_DFU_VIRT is not set
-CONFIG_SET_DFU_ALT_INFO=y
-CONFIG_SYS_DFU_DATA_BUF_SIZE=0x800000
-CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000
-CONFIG_DFU_NAME_MAX_SIZE=32
-
-#
-# DMA Support
-#
-# CONFIG_DMA is not set
-# CONFIG_DMA_LPC32XX is not set
-# CONFIG_TI_EDMA3 is not set
-# CONFIG_DMA_LEGACY is not set
-
-#
-# Extcon Support
-#
-# CONFIG_EXTCON is not set
-
-#
-# Fastboot support
-#
-# CONFIG_UDP_FUNCTION_FASTBOOT is not set
-# CONFIG_TCP_FUNCTION_FASTBOOT is not set
-CONFIG_FIRMWARE=y
-CONFIG_ARM_PSCI_FW=y
-# CONFIG_ZYNQMP_FIRMWARE is not set
-# CONFIG_ARM_SMCCC_FEATURES is not set
-# CONFIG_ARM_FFA_TRANSPORT is not set
-# CONFIG_SCMI_FIRMWARE is not set
-# CONFIG_DM_FUZZING_ENGINE is not set
-
-#
-# FPGA support
-#
-# CONFIG_FPGA_ALTERA is not set
-# CONFIG_FPGA_SOCFPGA is not set
-# CONFIG_FPGA_LATTICE is not set
-# CONFIG_FPGA_XILINX is not set
-# CONFIG_DM_FPGA is not set
-# CONFIG_FWU_MDATA is not set
-CONFIG_GPIO=y
-# CONFIG_AT91_GPIO is not set
-# CONFIG_ASPEED_GPIO is not set
-# CONFIG_DA8XX_GPIO is not set
-# CONFIG_INTEL_BROADWELL_GPIO is not set
-# CONFIG_IMX_RGPIO2P is not set
-# CONFIG_IPROC_GPIO is not set
-# CONFIG_KIRKWOOD_GPIO is not set
-# CONFIG_LPC32XX_GPIO is not set
-# CONFIG_MCP230XX_GPIO is not set
-# CONFIG_MXC_GPIO is not set
-# CONFIG_MXS_GPIO is not set
-# CONFIG_CMD_PCA953X is not set
-# CONFIG_TCA642X is not set
-# CONFIG_VYBRID_GPIO is not set
-# CONFIG_PCA953X is not set
-
-#
-# Hardware Spinlock Support
-#
-# CONFIG_DM_HWSPINLOCK is not set
-CONFIG_I2C=y
-# CONFIG_DM_I2C is not set
-# CONFIG_SYS_I2C_LEGACY is not set
-# CONFIG_SYS_I2C_FSL is not set
-# CONFIG_SYS_I2C_DW is not set
-# CONFIG_SYS_I2C_IMX_LPI2C is not set
-# CONFIG_SYS_I2C_MTK is not set
-# CONFIG_SYS_I2C_MICROCHIP is not set
-# CONFIG_SYS_I2C_MXC is not set
-# CONFIG_SYS_I2C_NPCM is not set
-# CONFIG_SYS_I2C_SOFT is not set
-# CONFIG_SYS_I2C_MV is not set
-# CONFIG_SYS_I2C_MVTWSI is not set
-CONFIG_INPUT=y
-CONFIG_DM_KEYBOARD=y
-# CONFIG_BUTTON_KEYBOARD is not set
-# CONFIG_CROS_EC_KEYB is not set
-# CONFIG_I8042_KEYB is not set
-# CONFIG_TEGRA_KEYBOARD is not set
-# CONFIG_TWL4030_INPUT is not set
-
-#
-# IOMMU device drivers
-#
-# CONFIG_IOMMU is not set
-
-#
-# LED Support
-#
-# CONFIG_LED is not set
-# CONFIG_LED_STATUS is not set
-
-#
-# Mailbox Controller Support
-#
-# CONFIG_DM_MAILBOX is not set
-
-#
-# Memory Controller drivers
-#
-# CONFIG_MEMORY is not set
-# CONFIG_ATMEL_EBI is not set
-# CONFIG_MFD_ATMEL_SMC is not set
-
-#
-# Multifunction device drivers
-#
-# CONFIG_MISC is not set
-# CONFIG_NVMEM is not set
-# CONFIG_SPL_NVMEM is not set
-# CONFIG_SMSC_LPC47M is not set
-# CONFIG_SMSC_SIO1007 is not set
-# CONFIG_CROS_EC is not set
-# CONFIG_DS4510 is not set
-# CONFIG_FSL_SEC_MON is not set
-# CONFIG_IRQ is not set
-# CONFIG_NUVOTON_NCT6102D is not set
-# CONFIG_PWRSEQ is not set
-# CONFIG_PCA9551_LED is not set
-# CONFIG_TEST_DRV is not set
-# CONFIG_USB_HUB_USB251XB is not set
-# CONFIG_TWL4030_LED is not set
-# CONFIG_WINBOND_W83627 is not set
-CONFIG_QFW=y
-CONFIG_QFW_MMIO=y
-CONFIG_QFW_SMBIOS=y
-# CONFIG_FS_LOADER is not set
-
-#
-# MMC Host controller Support
-#
 # CONFIG_MMC is not set
-# CONFIG_MMC_BROKEN_CD is not set
-# CONFIG_DM_MMC is not set
-# CONFIG_FSL_ESDHC is not set
-# CONFIG_FSL_ESDHC_IMX is not set
-
-#
-# MTD Support
-#
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_BLOCK is not set
-CONFIG_SYS_MTDPARTS_RUNTIME=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_SYS_FLASH_CFI_WIDTH_8BIT=y
-# CONFIG_SYS_FLASH_CFI_WIDTH_16BIT is not set
-# CONFIG_SYS_FLASH_CFI_WIDTH_32BIT is not set
-# CONFIG_SYS_FLASH_CFI_WIDTH_64BIT is not set
-CONFIG_SYS_FLASH_CFI_WIDTH=0x1
 CONFIG_FLASH_SHOW_PROGRESS=0
 CONFIG_CFI_FLASH=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
-# CONFIG_SYS_CFI_FLASH_STATUS_POLL is not set
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
-# CONFIG_SYS_FLASH_EMPTY_INFO is not set
-# CONFIG_FLASH_SPANSION_S29WS_N is not set
 CONFIG_FLASH_CFI_MTD=y
-# CONFIG_SYS_FLASH_PROTECTION is not set
 CONFIG_SYS_FLASH_CFI=y
-# CONFIG_SYS_FLASH_QUIET_TEST is not set
-# CONFIG_SYS_FLASH_CHECKSUM is not set
-# CONFIG_FLASH_VERIFY is not set
-# CONFIG_ALTERA_QSPI is not set
 CONFIG_SYS_MAX_FLASH_SECT=256
-# CONFIG_SAMSUNG_ONENAND is not set
-CONFIG_USE_SYS_MAX_FLASH_BANKS=y
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
-# CONFIG_MTD_RAW_NAND is not set
-
-#
-# SPI Flash Support
-#
-# CONFIG_SPI_FLASH is not set
-
-#
-# UBI support
-#
-# CONFIG_UBI_SILENCE_MSG is not set
-# CONFIG_MTD_UBI is not set
-# CONFIG_NVMXIP is not set
-# CONFIG_NVMXIP_QSPI is not set
-
-#
-# Multiplexer drivers
-#
-# CONFIG_MULTIPLEXER is not set
-# CONFIG_BITBANGMII is not set
-# CONFIG_MV88E6352_SWITCH is not set
-# CONFIG_PHYLIB is not set
-# CONFIG_FSL_MEMAC is not set
-CONFIG_PHY_RESET_DELAY=0
-# CONFIG_FSL_PFE is not set
-CONFIG_ETH=y
-CONFIG_DM_ETH=y
-# CONFIG_DM_ETH_PHY is not set
-CONFIG_NETDEVICES=y
-# CONFIG_PHY_GIGE is not set
-# CONFIG_ALTERA_TSE is not set
-# CONFIG_BCM_SF2_ETH is not set
-# CONFIG_BCMGENET is not set
-# CONFIG_BNXT_ETH is not set
-# CONFIG_CALXEDA_XGMAC is not set
-# CONFIG_DWC_ETH_XGMAC is not set
-# CONFIG_DRIVER_DM9000 is not set
-# CONFIG_DWC_ETH_QOS is not set
 CONFIG_E1000=y
-# CONFIG_E1000_NO_NVM is not set
-# CONFIG_E1000_SPI_GENERIC is not set
-# CONFIG_E1000_SPI is not set
-# CONFIG_CMD_E1000 is not set
-# CONFIG_EEPRO100 is not set
-# CONFIG_ETH_DESIGNWARE is not set
-# CONFIG_ETH_DESIGNWARE_MESON8B is not set
-# CONFIG_ETHOC is not set
-# CONFIG_FMAN_ENET is not set
-# CONFIG_FTMAC100 is not set
-# CONFIG_FTGMAC100 is not set
-# CONFIG_MCFFEC is not set
-# CONFIG_KS8851_MLL is not set
-# CONFIG_LITEETH is not set
-# CONFIG_MACB is not set
-# CONFIG_NET_NPCM750 is not set
-# CONFIG_PCH_GBE is not set
-# CONFIG_RGMII is not set
-# CONFIG_MII is not set
-# CONFIG_RMII is not set
-# CONFIG_PCNET is not set
-# CONFIG_QE_UEC is not set
-# CONFIG_RTL8139 is not set
-# CONFIG_RTL8169 is not set
-# CONFIG_SMC911X is not set
-# CONFIG_SUN7I_GMAC is not set
-# CONFIG_SUN4I_EMAC is not set
-# CONFIG_SUN8I_EMAC is not set
-# CONFIG_SH_ETHER is not set
-# CONFIG_DRIVER_TI_CPSW is not set
-# CONFIG_DRIVER_TI_EMAC is not set
-# CONFIG_DRIVER_TI_KEYSTONE_NET is not set
-# CONFIG_TULIP is not set
-# CONFIG_XILINX_AXIEMAC is not set
-# CONFIG_VSC7385_ENET is not set
-# CONFIG_XILINX_EMACLITE is not set
-# CONFIG_ZYNQ_GEM is not set
-# CONFIG_SYS_DPAA_QBMAN is not set
-# CONFIG_TSEC_ENET is not set
-# CONFIG_MEDIATEK_ETH is not set
-# CONFIG_HIFEMAC_ETH is not set
-# CONFIG_HIGMACV300_ETH is not set
-CONFIG_NVME=y
-# CONFIG_NVME_APPLE is not set
 CONFIG_NVME_PCI=y
-# CONFIG_DM_PCI_COMPAT is not set
-CONFIG_PCI_PNP=y
-# CONFIG_PCI_REGION_MULTI_ENTRY is not set
-# CONFIG_PCI_CONFIG_HOST_BRIDGE is not set
-# CONFIG_PCI_SRIOV is not set
-CONFIG_PCI_ENHANCED_ALLOCATION=y
-# CONFIG_PCI_ARID is not set
 CONFIG_PCIE_ECAM_GENERIC=y
-# CONFIG_PCIE_ECAM_SYNQUACER is not set
-# CONFIG_PCI_FTPCI100 is not set
-# CONFIG_PCI_PHYTIUM is not set
-# CONFIG_PCIE_FSL is not set
-# CONFIG_PCI_MPC85XX is not set
-# CONFIG_PCI_XILINX is not set
-# CONFIG_PCIE_LAYERSCAPE_RC is not set
-# CONFIG_PCIE_LAYERSCAPE_EP is not set
-# CONFIG_PCIE_LAYERSCAPE_GEN4 is not set
-# CONFIG_PCIE_INTEL_FPGA is not set
-# CONFIG_PCIE_IPROC is not set
-# CONFIG_PCI_KEYSTONE is not set
-# CONFIG_PCIE_STARFIVE_JH7110 is not set
-
-#
-# PCI Endpoint
-#
-# CONFIG_PCI_ENDPOINT is not set
-# CONFIG_X86_PCH7 is not set
-# CONFIG_X86_PCH9 is not set
-
-#
-# PHY Subsystem
-#
-# CONFIG_PHY is not set
-# CONFIG_MIPI_DPHY_HELPERS is not set
-
-#
-# Rockchip PHY driver
-#
-# CONFIG_MVEBU_COMPHY_SUPPORT is not set
-
-#
-# Pin controllers
-#
-# CONFIG_PINCTRL is not set
-# CONFIG_PINCTRL_TEGRA is not set
-CONFIG_POWER=y
-# CONFIG_POWER_LEGACY is not set
-# CONFIG_ACPI_PMC is not set
-
-#
-# Power Domain Support
-#
-# CONFIG_POWER_DOMAIN is not set
-# CONFIG_DM_PMIC is not set
-# CONFIG_PMIC_TPS65217 is not set
-# CONFIG_POWER_TPS65218 is not set
-# CONFIG_POWER_TPS62362 is not set
-# CONFIG_DM_REGULATOR is not set
-# CONFIG_TPS6586X_POWER is not set
-# CONFIG_POWER_MT6323 is not set
-# CONFIG_DM_PWM is not set
-# CONFIG_PWM_IMX is not set
-# CONFIG_PWM_SANDBOX is not set
-# CONFIG_U_QE is not set
-# CONFIG_RAM is not set
-
-#
-# Reboot Mode Support
-#
-# CONFIG_DM_REBOOT_MODE is not set
-
-#
-# Remote Processor drivers
-#
-CONFIG_REMOTEPROC_MAX_FW_SIZE=0x10000
-
-#
-# Reset Controller Support
-#
-# CONFIG_RESET_SCMI is not set
-CONFIG_DM_RNG=y
-# CONFIG_RNG_MSM is not set
-# CONFIG_RNG_NPCM is not set
-# CONFIG_RNG_IPROC200 is not set
-# CONFIG_RNG_SMCCC_TRNG is not set
-# CONFIG_RNG_ARM_RNDR is not set
-CONFIG_TPM_RNG=y
-# CONFIG_RNG_EXYNOS is not set
-
-#
-# Real Time Clock
-#
-CONFIG_DM_RTC=y
-# CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set
-# CONFIG_RTC_PCF2127 is not set
-# CONFIG_RTC_DS1307 is not set
-# CONFIG_RTC_DS1337 is not set
-# CONFIG_RTC_DS1338 is not set
-# CONFIG_RTC_DS3231 is not set
-# CONFIG_RTC_EMULATION is not set
-# CONFIG_RTC_GOLDFISH is not set
-# CONFIG_RTC_ISL1208 is not set
-# CONFIG_RTC_PCF8563 is not set
-# CONFIG_RTC_PT7C4338 is not set
-# CONFIG_RTC_RV3028 is not set
-# CONFIG_RTC_RV3029 is not set
-# CONFIG_RTC_RV8803 is not set
-# CONFIG_RTC_RX8010SJ is not set
-# CONFIG_RTC_RX8025 is not set
-CONFIG_RTC_PL031=y
-# CONFIG_RTC_MV is not set
-# CONFIG_RTC_S35392A is not set
-# CONFIG_RTC_MC146818 is not set
-# CONFIG_RTC_M41T62 is not set
-# CONFIG_RTC_STM32 is not set
-# CONFIG_RTC_ABX80X is not set
 CONFIG_SCSI=y
-CONFIG_SERIAL=y
-CONFIG_BAUDRATE=115200
-# CONFIG_DEFAULT_ENV_IS_RW is not set
-CONFIG_REQUIRE_SERIAL_CONSOLE=y
-# CONFIG_SPECIFY_CONSOLE_INDEX is not set
-CONFIG_SERIAL_PRESENT=y
-CONFIG_DM_SERIAL=y
-# CONFIG_SERIAL_RX_BUFFER is not set
-# CONFIG_SERIAL_PUTS is not set
-# CONFIG_SERIAL_SEARCH_ALL is not set
-# CONFIG_SERIAL_PROBE_ALL is not set
-# CONFIG_VPL_DM_SERIAL is not set
-# CONFIG_DEBUG_UART_PL010 is not set
 CONFIG_DEBUG_UART_PL011=y
 CONFIG_DEBUG_UART_SHIFT=2
-# CONFIG_DEBUG_UART_ANNOUNCE is not set
-# CONFIG_DEBUG_UART_SKIP_INIT is not set
-# CONFIG_ALTERA_JTAG_UART is not set
-# CONFIG_ALTERA_UART is not set
-# CONFIG_ARC_SERIAL is not set
-# CONFIG_ARM_DCC is not set
-# CONFIG_ATMEL_USART is not set
-# CONFIG_BCM6345_SERIAL is not set
-# CONFIG_COREBOOT_SERIAL is not set
-# CONFIG_CORTINA_UART is not set
-# CONFIG_FSL_LINFLEXUART is not set
-# CONFIG_FSL_LPUART is not set
-# CONFIG_MVEBU_A3700_UART is not set
-# CONFIG_MCFUART is not set
-# CONFIG_NULLDEV_SERIAL is not set
-# CONFIG_SYS_NS16550 is not set
-CONFIG_PL01X_SERIAL=y
-# CONFIG_ROCKCHIP_SERIAL is not set
-# CONFIG_SEMIHOSTING_SERIAL is not set
-# CONFIG_XILINX_UARTLITE is not set
-# CONFIG_MSM_SERIAL is not set
-# CONFIG_MSM_GENI_SERIAL is not set
-# CONFIG_MXS_AUART_SERIAL is not set
-# CONFIG_OMAP_SERIAL is not set
-# CONFIG_HTIF_CONSOLE is not set
-# CONFIG_SIFIVE_SERIAL is not set
-# CONFIG_ZYNQ_SERIAL is not set
-# CONFIG_MTK_SERIAL is not set
-# CONFIG_MT7620_SERIAL is not set
-# CONFIG_NPCM_SERIAL is not set
-# CONFIG_SM is not set
-# CONFIG_MESON_SM is not set
-# CONFIG_SMEM is not set
-
-#
-# Sound support
-#
-# CONFIG_SOUND is not set
-# CONFIG_SOUND_MAX98357A is not set
-
-#
-# SOC (System On Chip) specific Drivers
-#
-# CONFIG_SOC_DEVICE is not set
-# CONFIG_SOC_QCOM is not set
-# CONFIG_SOC_SAMSUNG is not set
-# CONFIG_SOC_TI is not set
-# CONFIG_SPI is not set
-
-#
-# SPMI support
-#
-# CONFIG_SPMI is not set
-# CONFIG_SYSINFO is not set
-
-#
-# System reset device drivers
-#
 CONFIG_SYSRESET=y
-CONFIG_SYSRESET_CMD_RESET=y
 CONFIG_SYSRESET_CMD_POWEROFF=y
-# CONFIG_SYSRESET_CV1800B is not set
 CONFIG_SYSRESET_PSCI=y
-# CONFIG_SYSRESET_SYSCON is not set
-# CONFIG_SYSRESET_WATCHDOG is not set
-# CONFIG_SYSRESET_RESETCTL is not set
-# CONFIG_SYSRESET_MPC83XX is not set
-# CONFIG_TEE is not set
-# CONFIG_DM_THERMAL is not set
-
-#
-# Timer Support
-#
-# CONFIG_TIMER is not set
-
-#
-# TPM support
-#
-CONFIG_TPM_V1=y
-# CONFIG_TPM_ATMEL_TWI is not set
-# CONFIG_TPM_AUTH_SESSIONS is not set
-# CONFIG_TPM_FLUSH_RESOURCES is not set
-# CONFIG_TPM_LOAD_KEY_BY_SHA1 is not set
-# CONFIG_TPM_LIST_RESOURCES is not set
-CONFIG_TPM_V2=y
 CONFIG_TPM2_MMIO=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
-# CONFIG_DM_USB_GADGET is not set
-
-#
-# USB Host Controller Drivers
-#
-CONFIG_USB_HOST=y
-CONFIG_USB_XHCI_HCD=y
-# CONFIG_USB_XHCI_DWC3 is not set
-# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
-CONFIG_USB_XHCI_PCI=y
-# CONFIG_USB_XHCI_FSL is not set
-# CONFIG_USB_XHCI_BRCM is not set
 CONFIG_USB_EHCI_HCD=y
-# CONFIG_USB_EHCI_MSM is not set
 CONFIG_USB_EHCI_PCI=y
-# CONFIG_USB_EHCI_ZYNQ is not set
-# CONFIG_USB_EHCI_GENERIC is not set
-# CONFIG_USB_EHCI_FSL is not set
-# CONFIG_USB_OHCI_HCD is not set
-# CONFIG_USB_UHCI_HCD is not set
-# CONFIG_USB_DWC2 is not set
-# CONFIG_USB_R8A66597_HCD is not set
-# CONFIG_USB_ISP1760 is not set
-# CONFIG_USB_CDNS3 is not set
-# CONFIG_USB_DWC3 is not set
-
-#
-# Legacy MUSB Support
-#
-# CONFIG_USB_MUSB_HCD is not set
-# CONFIG_USB_MUSB_UDC is not set
-
-#
-# MUSB Controller Driver
-#
-# CONFIG_USB_MUSB_HOST is not set
-# CONFIG_USB_MUSB_PIO_ONLY is not set
-
-#
-# USB Phy
-#
-# CONFIG_TWL4030_USB is not set
-# CONFIG_ROCKCHIP_USB2_PHY is not set
-
-#
-# ULPI drivers
-#
-
-#
-# USB peripherals
-#
-CONFIG_USB_STORAGE=y
-CONFIG_USB_KEYBOARD=y
-# CONFIG_USB_ONBOARD_HUB is not set
-CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=1000
-CONFIG_USB_KEYBOARD_FN_KEYS=y
-CONFIG_SYS_USB_EVENT_POLL=y
-# CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE is not set
-# CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is not set
-# CONFIG_USB_HOST_ETHER is not set
-# CONFIG_USB_GADGET is not set
-# CONFIG_SPL_USB_GADGET is not set
-
-#
-# UFS Host Controller Support
-#
-# CONFIG_UFS is not set
-# CONFIG_TI_J721E_UFS is not set
-
-#
-# Graphics support
-#
-CONFIG_VIDEO=y
-# CONFIG_VIDEO_FONT_4X6 is not set
-CONFIG_VIDEO_FONT_8X16=y
-# CONFIG_VIDEO_FONT_SUN12X22 is not set
-# CONFIG_VIDEO_FONT_16X32 is not set
-CONFIG_VIDEO_LOGO=y
-CONFIG_BACKLIGHT=y
-CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x800000
-# CONFIG_VIDEO_COPY is not set
-# CONFIG_VIDEO_DAMAGE is not set
-# CONFIG_BACKLIGHT_GPIO is not set
-CONFIG_VIDEO_BPP8=y
-CONFIG_VIDEO_BPP16=y
-CONFIG_VIDEO_BPP32=y
-CONFIG_VIDEO_ANSI=y
-# CONFIG_VIDEO_MIPI_DSI is not set
-CONFIG_CONSOLE_NORMAL=y
-# CONFIG_CONSOLE_ROTATION is not set
-# CONFIG_CONSOLE_TRUETYPE is not set
-CONFIG_SYS_WHITE_ON_BLACK=y
-# CONFIG_NO_FB_CLEAR is not set
-CONFIG_VIDEO_SYNC_MS=100
-CONFIG_VIDEO_SYNC_CYCLIC_MS=10
-CONFIG_PANEL=y
-# CONFIG_PANEL_HX8238D is not set
-
-#
-# TrueType Fonts
-#
-# CONFIG_VIDCONSOLE_AS_LCD is not set
-CONFIG_VIDEO_BOCHS=y
-CONFIG_VIDEO_BOCHS_SIZE_X=1280
-CONFIG_VIDEO_BOCHS_SIZE_Y=1024
-# CONFIG_VIDEO_VESA is not set
-# CONFIG_VIDEO_LCD_ANX9804 is not set
-# CONFIG_ATMEL_LCD_BGR555 is not set
-# CONFIG_VIDEO_BCM2835 is not set
-# CONFIG_VIDEO_LCD_ENDEAVORU is not set
-# CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
-# CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
-# CONFIG_VIDEO_LCD_LG_LD070WX3 is not set
-# CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
-# CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
-# CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
-# CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set
-# CONFIG_VIDEO_LCD_SSD2828 is not set
-# CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
-# CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
-# CONFIG_VIDEO_MESON is not set
-# CONFIG_VIDEO_MVEBU is not set
-# CONFIG_I2C_EDID is not set
-# CONFIG_DISPLAY is not set
-# CONFIG_ATMEL_HLCD is not set
-# CONFIG_BACKLIGHT_LM3533 is not set
-# CONFIG_AM335X_LCD is not set
-# CONFIG_VIDEO_EXYNOS is not set
-# CONFIG_VIDEO_ROCKCHIP is not set
-# CONFIG_VIDEO_ARM_MALIDP is not set
-# CONFIG_VIDEO_STM32 is not set
-# CONFIG_VIDEO_TIDSS is not set
-# CONFIG_VIDEO_TEGRA124 is not set
-# CONFIG_VIDEO_BRIDGE is not set
-# CONFIG_VIDEO_TEGRA20 is not set
-# CONFIG_TEGRA_BACKLIGHT_PWM is not set
-# CONFIG_VIDEO_MXS is not set
-CONFIG_CONSOLE_SCROLL_LINES=1
-# CONFIG_VIDEO_SIMPLE is not set
-# CONFIG_VIDEO_DT_SIMPLEFB is not set
-# CONFIG_VIDEO_MCDE_SIMPLE is not set
-# CONFIG_OSD is not set
-# CONFIG_VIDEO_REMOVE is not set
-# CONFIG_SPLASH_SCREEN is not set
-# CONFIG_BMP is not set
-CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
-CONFIG_VIDEO_BMP_RLE8=y
-# CONFIG_BMP_16BPP is not set
-# CONFIG_BMP_24BPP is not set
-# CONFIG_BMP_32BPP is not set
-
-#
-# VirtIO Drivers
-#
-CONFIG_VIRTIO=y
-CONFIG_VIRTIO_MMIO=y
-CONFIG_VIRTIO_PCI=y
-CONFIG_VIRTIO_PCI_LEGACY=y
-CONFIG_VIRTIO_NET=y
-CONFIG_VIRTIO_BLK=y
-CONFIG_VIRTIO_RNG=y
-
-#
-# 1-Wire support
-#
-# CONFIG_W1 is not set
-
-#
-# 1-wire EEPROM support
-#
-# CONFIG_W1_EEPROM is not set
-
-#
-# Watchdog Timer Support
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_IMX_WATCHDOG is not set
-# CONFIG_ULP_WATCHDOG is not set
-# CONFIG_WDT is not set
-# CONFIG_PHYS_TO_BUS is not set
-
-#
-# File systems
-#
-# CONFIG_FS_BTRFS is not set
-# CONFIG_FS_CBFS is not set
-CONFIG_FS_EXT4=y
-# CONFIG_EXT4_WRITE is not set
-CONFIG_FS_FAT=y
-CONFIG_FAT_WRITE=y
-CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
-# CONFIG_FS_JFFS2 is not set
-# CONFIG_UBIFS_SILENCE_MSG is not set
-# CONFIG_UBIFS_SILENCE_DEBUG_DUMP is not set
-# CONFIG_FS_CRAMFS is not set
-# CONFIG_YAFFS2 is not set
-# CONFIG_FS_SQUASHFS is not set
-# CONFIG_FS_EROFS is not set
-
-#
-# Library routines
-#
-# CONFIG_ADDR_MAP is not set
-# CONFIG_SYS_TIMER_COUNTS_DOWN is not set
-# CONFIG_PHYSMEM is not set
-# CONFIG_BCH is not set
-# CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set
-CONFIG_CHARSET=y
-# CONFIG_DYNAMIC_CRC_TABLE is not set
-CONFIG_LIB_UUID=y
-# CONFIG_RANDOM_UUID is not set
 CONFIG_SEMIHOSTING=y
-CONFIG_SEMIHOSTING_FALLBACK=y
-CONFIG_PRINTF=y
-CONFIG_SPRINTF=y
-CONFIG_STRTO=y
-CONFIG_SYS_HZ=1000
-# CONFIG_PANIC_HANG is not set
-CONFIG_REGEX=y
-CONFIG_LIB_RAND=y
-# CONFIG_LIB_HW_RAND is not set
-CONFIG_SUPPORT_ACPI=y
-# CONFIG_ACPI is not set
-# CONFIG_BITREVERSE is not set
-# CONFIG_TRACE is not set
-# CONFIG_CIRCBUF is not set
-# CONFIG_CMD_DHRYSTONE is not set
-
-#
-# Security support
-#
-# CONFIG_AES is not set
-# CONFIG_ECDSA is not set
-CONFIG_RSA=y
-CONFIG_RSA_VERIFY=y
-# CONFIG_RSA_VERIFY_WITH_PKEY is not set
-CONFIG_RSA_SOFTWARE_EXP=y
-# CONFIG_ASYMMETRIC_KEY_TYPE is not set
 CONFIG_TPM=y
-
-#
-# Android Verified Boot
-#
-
-#
-# Hashing Support
-#
-# CONFIG_BLAKE2 is not set
-CONFIG_SHA1=y
-CONFIG_SHA256=y
-CONFIG_SHA512=y
-CONFIG_SHA384=y
-# CONFIG_SHA_HW_ACCEL is not set
-CONFIG_MD5=y
-CONFIG_CRC8=y
-CONFIG_CRC32=y
-
-#
-# Compression Support
-#
-CONFIG_LZ4=y
-CONFIG_LZMA=y
-# CONFIG_LZO is not set
-CONFIG_GZIP=y
-# CONFIG_ZLIB_UNCOMPRESS is not set
-# CONFIG_BZIP2 is not set
-CONFIG_ZLIB=y
-# CONFIG_ZSTD is not set
-CONFIG_VPL_LZMA=y
-# CONFIG_SPL_GZIP is not set
-# CONFIG_ERRNO_STR is not set
-CONFIG_HEXDUMP=y
-# CONFIG_GETOPT is not set
-CONFIG_OF_LIBFDT=y
-CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
-CONFIG_SYS_FDT_PAD=0x3000
-
-#
-# System tables
-#
-CONFIG_GENERATE_SMBIOS_TABLE=y
-# CONFIG_LIB_RATIONAL is not set
-CONFIG_SMBIOS=y
-CONFIG_SMBIOS_PARSER=y
-CONFIG_EFI_LOADER=y
-CONFIG_EFI_BINARY_EXEC=y
-CONFIG_EFI_BOOTMGR=y
-CONFIG_EFI_VARIABLE_FILE_STORE=y
-# CONFIG_EFI_RT_VOLATILE_STORE is not set
-# CONFIG_EFI_VARIABLE_NO_STORE is not set
-# CONFIG_EFI_VARIABLES_PRESEED is not set
-CONFIG_EFI_VAR_BUF_SIZE=131072
-CONFIG_EFI_GET_TIME=y
-CONFIG_EFI_SET_TIME=y
-# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
-# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
-# CONFIG_EFI_CAPSULE_ON_DISK is not set
-CONFIG_EFI_CAPSULE_MAX=15
-CONFIG_EFI_DEVICE_PATH_TO_TEXT=y
-CONFIG_EFI_DEVICE_PATH_UTIL=y
-CONFIG_EFI_DT_FIXUP=y
-CONFIG_EFI_LOADER_HII=y
-CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y
-CONFIG_EFI_UNICODE_CAPITALIZATION=y
-# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set
-CONFIG_EFI_PLATFORM_LANG_CODES="en-US"
-CONFIG_EFI_HAVE_RUNTIME_RESET=y
-CONFIG_EFI_RNG_PROTOCOL=y
-CONFIG_EFI_TCG2_PROTOCOL=y
-CONFIG_EFI_TCG2_PROTOCOL_EVENTLOG_SIZE=65536
-# CONFIG_EFI_TCG2_PROTOCOL_MEASURE_DTB is not set
-CONFIG_EFI_LOAD_FILE2_INITRD=y
-# CONFIG_EFI_SECURE_BOOT is not set
-CONFIG_EFI_ECPT=y
-CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
 CONFIG_EFI_HTTP_BOOT=y
-# CONFIG_OPTEE_LIB is not set
-# CONFIG_OPTEE_IMAGE is not set
-# CONFIG_BOOTM_OPTEE is not set
-# CONFIG_TEST_FDTDEC is not set
-CONFIG_LIB_DATE=y
-CONFIG_LIB_ELF=y
-CONFIG_LMB=y
-CONFIG_LMB_USE_MAX_REGIONS=y
-CONFIG_LMB_MAX_REGIONS=16
-# CONFIG_PHANDLE_CHECK_SEQ is not set
-
-#
-# Testing
-#
-# CONFIG_UNIT_TEST is not set
-# CONFIG_POST is not set
-
-#
-# Tools options
-#
-CONFIG_MKIMAGE_DTC_PATH="dtc"
-CONFIG_TOOLS_CRC32=y
-CONFIG_TOOLS_LIBCRYPTO=y
-CONFIG_TOOLS_KWBIMAGE=y
-CONFIG_TOOLS_FIT=y
-CONFIG_TOOLS_FIT_FULL_CHECK=y
-CONFIG_TOOLS_FIT_PRINT=y
-CONFIG_TOOLS_FIT_RSASSA_PSS=y
-CONFIG_TOOLS_FIT_SIGNATURE=y
-CONFIG_TOOLS_FIT_SIGNATURE_MAX_SIZE=0x10000000
-CONFIG_TOOLS_FIT_VERBOSE=y
-CONFIG_TOOLS_MD5=y
-CONFIG_TOOLS_OF_LIBFDT=y
-CONFIG_TOOLS_SHA1=y
-CONFIG_TOOLS_SHA256=y
-CONFIG_TOOLS_SHA384=y
-CONFIG_TOOLS_SHA512=y
-CONFIG_TOOLS_MKEFICAPSULE=y
-# CONFIG_FSPI_CONF_HEADER is not set
-# CONFIG_TOOLS_MKFWUMDATA is not set

From 976fc6890aee8929e4e1d8d51c620bd826bb610a Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Wed, 23 Apr 2025 14:44:45 +0300
Subject: [PATCH 1258/1549] u-boot: arm64: Save our modifications to the
 upstream defconfigs

Run diffconfig from Linux to track our modifications to the old upstream
defconfigs, so we can apply them to the new ones. Restore the original
defconfigs to highlight our changes here, and upstream changes in the
next commit. Done manually, but something like:

  do_diff() {
      ours="$1"
      theirs="$2"
      tree="$3"

      diffconfig \
          src/u-boot/${tree}/configs/${theirs}_defconfig \
          config/u-boot/${ours}/config/default \
          >config/u-boot/${ours}/config/diffconfig

      cp src/u-boot/${tree}/configs/${theirs}_defconfig \
          config/u-boot/${ours}/config/default
  }

  do_diff amd64coreboot    coreboot64        x86_64
  do_diff i386coreboot     coreboot          x86
  do_diff gru_bob          chromebook_bob    default
  do_diff gru_kevin        chromebook_kevin  default
  do_diff qemu_arm64_12mb  qemu_arm64        default

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 config/u-boot/gru_bob/config/default          | 24 ++++-------------
 config/u-boot/gru_bob/config/diffconfig       | 23 ++++++++++++++++
 config/u-boot/gru_kevin/config/default        | 26 ++++---------------
 config/u-boot/gru_kevin/config/diffconfig     | 25 ++++++++++++++++++
 config/u-boot/qemu_arm64_12mb/config/default  |  5 ++--
 .../u-boot/qemu_arm64_12mb/config/diffconfig  |  5 ++++
 6 files changed, 66 insertions(+), 42 deletions(-)
 create mode 100644 config/u-boot/gru_bob/config/diffconfig
 create mode 100644 config/u-boot/gru_kevin/config/diffconfig
 create mode 100644 config/u-boot/qemu_arm64_12mb/config/diffconfig

diff --git a/config/u-boot/gru_bob/config/default b/config/u-boot/gru_bob/config/default
index 7d22f18f..b2ecfa60 100644
--- a/config/u-boot/gru_bob/config/default
+++ b/config/u-boot/gru_bob/config/default
@@ -2,12 +2,14 @@ CONFIG_ARM=y
 CONFIG_SKIP_LOWLEVEL_INIT=y
 CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_COUNTER_FREQUENCY=24000000
-CONFIG_POSITION_INDEPENDENT=y
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_TEXT_BASE=0x18000000
+CONFIG_TEXT_BASE=0x00200000
 CONFIG_SPL_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
 CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_ENV_OFFSET=0x3F8000
 CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-bob"
 CONFIG_SPL_TEXT_BASE=0xff8c2000
 CONFIG_DM_RESET=y
@@ -27,10 +29,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_SYS_LOAD_ADDR=0x800800
 CONFIG_DEBUG_UART=y
-CONFIG_REMAKE_ELF=y
 # CONFIG_SPL_FIT_SIGNATURE is not set
-CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
-CONFIG_USE_PREBOOT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -47,9 +46,6 @@ CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_BOOTEFI_SELFTEST=y
-CONFIG_CMD_BOOTMENU=y
-CONFIG_CMD_NVEDIT_EFI=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -58,14 +54,13 @@ CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_EFIDEBUG=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_LOG=y
-CONFIG_MMC_SPEED_MODE_SET=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_I2C_CROS_EC_TUNNEL=y
@@ -77,14 +72,9 @@ CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
 CONFIG_MMC_PWRSEQ=y
-CONFIG_MMC_IO_VOLTAGE=y
-CONFIG_MMC_UHS_SUPPORT=y
-CONFIG_MMC_HS400_ES_SUPPORT=y
-CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -124,9 +114,5 @@ CONFIG_VIDEO_ROCKCHIP=y
 CONFIG_VIDEO_ROCKCHIP_MAX_XRES=1280
 CONFIG_VIDEO_ROCKCHIP_MAX_YRES=800
 CONFIG_DISPLAY_ROCKCHIP_EDP=y
-# CONFIG_BINMAN_FDT is not set
-CONFIG_PANIC_HANG=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
-# CONFIG_HEXDUMP is not set
-CONFIG_EFI_VARIABLE_NO_STORE=y
diff --git a/config/u-boot/gru_bob/config/diffconfig b/config/u-boot/gru_bob/config/diffconfig
new file mode 100644
index 00000000..660856dd
--- /dev/null
+++ b/config/u-boot/gru_bob/config/diffconfig
@@ -0,0 +1,23 @@
+-CUSTOM_SYS_INIT_SP_ADDR 0x300000
+-ENV_IS_IN_MMC y
+-ENV_OFFSET 0x3F8000
+-HAS_CUSTOM_SYS_INIT_SP_ADDR y
+ TEXT_BASE 0x00200000 -> 0x18000000
++BINMAN_FDT n
++BOOTCOMMAND "bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
++CMD_BOOTEFI_SELFTEST y
++CMD_BOOTMENU y
++CMD_EFIDEBUG y
++CMD_NVEDIT_EFI y
++EFI_VARIABLE_NO_STORE y
++HEXDUMP n
++MMC_HS400_ES_SUPPORT y
++MMC_HS400_SUPPORT y
++MMC_IO_VOLTAGE y
++MMC_SDHCI_SDMA y
++MMC_SPEED_MODE_SET y
++MMC_UHS_SUPPORT y
++PANIC_HANG y
++POSITION_INDEPENDENT y
++REMAKE_ELF y
++USE_PREBOOT y
diff --git a/config/u-boot/gru_kevin/config/default b/config/u-boot/gru_kevin/config/default
index 91db362c..0fba5912 100644
--- a/config/u-boot/gru_kevin/config/default
+++ b/config/u-boot/gru_kevin/config/default
@@ -2,12 +2,14 @@ CONFIG_ARM=y
 CONFIG_SKIP_LOWLEVEL_INIT=y
 CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_COUNTER_FREQUENCY=24000000
-CONFIG_POSITION_INDEPENDENT=y
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_TEXT_BASE=0x18000000
+CONFIG_TEXT_BASE=0x00200000
 CONFIG_SPL_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
 CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_ENV_OFFSET=0x3F8000
 CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-kevin"
 CONFIG_SPL_TEXT_BASE=0xff8c2000
 CONFIG_DM_RESET=y
@@ -28,10 +30,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_SYS_LOAD_ADDR=0x800800
 CONFIG_DEBUG_UART=y
-CONFIG_REMAKE_ELF=y
 # CONFIG_SPL_FIT_SIGNATURE is not set
-CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
-CONFIG_USE_PREBOOT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -48,9 +47,6 @@ CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_BOOTEFI_SELFTEST=y
-CONFIG_CMD_BOOTMENU=y
-CONFIG_CMD_NVEDIT_EFI=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -59,14 +55,13 @@ CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_EFIDEBUG=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_LOG=y
-CONFIG_MMC_SPEED_MODE_SET=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_I2C_CROS_EC_TUNNEL=y
@@ -78,14 +73,9 @@ CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
 CONFIG_MMC_PWRSEQ=y
-CONFIG_MMC_IO_VOLTAGE=y
-CONFIG_MMC_UHS_SUPPORT=y
-CONFIG_MMC_HS400_ES_SUPPORT=y
-CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -120,16 +110,10 @@ CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_VIDEO=y
-# CONFIG_VIDEO_FONT_8X16 is not set
-CONFIG_VIDEO_FONT_16X32=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
 CONFIG_VIDEO_ROCKCHIP_MAX_XRES=2400
 CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1600
 CONFIG_DISPLAY_ROCKCHIP_EDP=y
-# CONFIG_BINMAN_FDT is not set
-CONFIG_PANIC_HANG=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
-# CONFIG_HEXDUMP is not set
-CONFIG_EFI_VARIABLE_NO_STORE=y
diff --git a/config/u-boot/gru_kevin/config/diffconfig b/config/u-boot/gru_kevin/config/diffconfig
new file mode 100644
index 00000000..ee3ca1a3
--- /dev/null
+++ b/config/u-boot/gru_kevin/config/diffconfig
@@ -0,0 +1,25 @@
+-CUSTOM_SYS_INIT_SP_ADDR 0x300000
+-ENV_IS_IN_MMC y
+-ENV_OFFSET 0x3F8000
+-HAS_CUSTOM_SYS_INIT_SP_ADDR y
+ TEXT_BASE 0x00200000 -> 0x18000000
++BINMAN_FDT n
++BOOTCOMMAND "bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
++CMD_BOOTEFI_SELFTEST y
++CMD_BOOTMENU y
++CMD_EFIDEBUG y
++CMD_NVEDIT_EFI y
++EFI_VARIABLE_NO_STORE y
++HEXDUMP n
++MMC_HS400_ES_SUPPORT y
++MMC_HS400_SUPPORT y
++MMC_IO_VOLTAGE y
++MMC_SDHCI_SDMA y
++MMC_SPEED_MODE_SET y
++MMC_UHS_SUPPORT y
++PANIC_HANG y
++POSITION_INDEPENDENT y
++REMAKE_ELF y
++USE_PREBOOT y
++VIDEO_FONT_16X32 y
++VIDEO_FONT_8X16 n
diff --git a/config/u-boot/qemu_arm64_12mb/config/default b/config/u-boot/qemu_arm64_12mb/config/default
index 73411226..088ba39f 100644
--- a/config/u-boot/qemu_arm64_12mb/config/default
+++ b/config/u-boot/qemu_arm64_12mb/config/default
@@ -1,17 +1,18 @@
 CONFIG_ARM=y
 CONFIG_POSITION_INDEPENDENT=y
 CONFIG_ARCH_QEMU=y
-CONFIG_TEXT_BASE=0x50000000
 CONFIG_SYS_MALLOC_LEN=0x1000000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000
 CONFIG_ENV_SIZE=0x40000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DEFAULT_DEVICE_TREE="qemu-arm64"
 CONFIG_DEBUG_UART_BASE=0x9000000
 CONFIG_DEBUG_UART_CLOCK=0
 CONFIG_ARMV8_CRYPTO=y
 CONFIG_SYS_LOAD_ADDR=0x40200000
+CONFIG_ENV_ADDR=0x4000000
 CONFIG_PCI=y
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
@@ -21,7 +22,6 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_BEST_MATCH=y
 CONFIG_BOOTSTD_FULL=y
 CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
 CONFIG_USE_PREBOOT=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
@@ -36,6 +36,7 @@ CONFIG_CMD_PCI=y
 CONFIG_CMD_EFIDEBUG=y
 CONFIG_CMD_TPM=y
 CONFIG_CMD_MTDPARTS=y
+CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_SCSI_AHCI=y
 CONFIG_AHCI_PCI=y
 CONFIG_DFU_TFTP=y
diff --git a/config/u-boot/qemu_arm64_12mb/config/diffconfig b/config/u-boot/qemu_arm64_12mb/config/diffconfig
new file mode 100644
index 00000000..447a5ad6
--- /dev/null
+++ b/config/u-boot/qemu_arm64_12mb/config/diffconfig
@@ -0,0 +1,5 @@
+-ENV_ADDR 0x4000000
+-ENV_IS_IN_FLASH y
+-ENV_SECT_SIZE 0x40000
++BOOTCOMMAND "bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
++TEXT_BASE 0x50000000

From b1fa44858cb8b1ebb979722560245b5a36020f82 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Wed, 23 Apr 2025 15:23:03 +0300
Subject: [PATCH 1259/1549] u-boot: arm64: Rebase to v2025.04

Set the U-Boot revision to the commit hash for v2025.04, and rebase the
patches for the default U-Boot tree to accommodate for upstream changes:

 - The SPL/TPL/VPL phases are being unified under the xPL name, so
   there's a config rename.
 - Some test macros were renamed, for the video-related patches.
 - Add some missing hunks for video damage series.
 - Upstream Makefile adds another argument to the binman call.
 - The SWIG related patch is merged upstream, drop it.

I'm not sure if src/u-boot/* directories are regenerated on new builds,
so it may be necessary to remove them manually after applying this.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 ...399-Set-hardcoded-clock-rates-same-a.patch |   8 +-
 ...-improve-UEFI-experience-on-DM_VIDEO.patch |  30 +--
 .../0003-Add-video-damage-tracking.patch      | 198 ++++++++++--------
 ...gnore-missing-input-files-for-binman.patch |  18 +-
 ...Remove-assigned-clock-dt-properties-.patch |   8 +-
 ...bfdt-libfdt.i_shipped-Use-SWIG_Appen.patch |  61 ------
 config/u-boot/default/target.cfg              |   2 +-
 7 files changed, 141 insertions(+), 184 deletions(-)
 delete mode 100644 config/u-boot/default/patches/0009-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch

diff --git a/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch b/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch
index 32647ed0..8227b076 100644
--- a/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch
+++ b/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch
@@ -1,4 +1,4 @@
-From bc5204d0d28bb431186fd106f9a79f69bfad005d Mon Sep 17 00:00:00 2001
+From ee94f55d37fc8c133faa5055184f75f99830cfdc Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Fri, 8 Oct 2021 17:33:22 +0300
 Subject: [PATCH] clk: rockchip: rk3399: Set hardcoded clock rates same as
@@ -60,7 +60,7 @@ index d941a129f3e5..54035c0df1f3 100644
  #define PWM_CLOCK_HZ    PMU_PCLK_HZ
  
 diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
-index 24cefebd1b2a..6f874bd347e0 100644
+index 6e87db18be07..1b8ffe9e794e 100644
 --- a/drivers/clk/rockchip/clk_rk3399.c
 +++ b/drivers/clk/rockchip/clk_rk3399.c
 @@ -53,10 +53,11 @@ struct pll_div {
@@ -72,7 +72,7 @@ index 24cefebd1b2a..6f874bd347e0 100644
 +static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 4, 1);
 +static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 3, 1);
 +static const struct pll_div npll_init_cfg = PLL_DIVISORS(NPLL_HZ, 1, 3, 1);
- #if !defined(CONFIG_SPL_BUILD)
+ #if !defined(CONFIG_XPL_BUILD)
 -static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1);
 +static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 3, 2, 1);
  #endif
@@ -96,5 +96,5 @@ index 24cefebd1b2a..6f874bd347e0 100644
  	/* configure perihp aclk, hclk, pclk */
  	aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
 -- 
-2.45.2
+2.49.0
 
diff --git a/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch b/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch
index bb264b00..e2de311c 100644
--- a/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch
+++ b/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch
@@ -1,4 +1,4 @@
-From 03750188cbe305cd8383178a1ee476de2aa5953e Mon Sep 17 00:00:00 2001
+From 780d8ffe985441824a242e5b853721dfe14435dd Mon Sep 17 00:00:00 2001
 From: Andre Przywara <andre.przywara@arm.com>
 Date: Mon, 10 Jan 2022 00:56:31 +0000
 Subject: [PATCH 1/3] video: Add cursor support for video consoles
@@ -36,7 +36,7 @@ index 939363653f6c..6b531718276f 100644
  	vc_priv->y_charsize = fontdata->height;
  	if (vid_priv->rot % 2) {
 diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c
-index 80e7adf6a1a4..8b2ef51f1b3b 100644
+index ebe96bf0c2f3..8613c464040f 100644
 --- a/drivers/video/vidconsole-uclass.c
 +++ b/drivers/video/vidconsole-uclass.c
 @@ -57,6 +57,26 @@ int vidconsole_entry_start(struct udevice *dev)
@@ -84,7 +84,7 @@ index 80e7adf6a1a4..8b2ef51f1b3b 100644
  	priv->xcur_frac = priv->xstart_frac;
  	priv->ycur += priv->y_charsize;
  
-@@ -284,6 +308,14 @@ static void vidconsole_escape_char(struct udevice *dev, char ch)
+@@ -286,6 +310,14 @@ static void vidconsole_escape_char(struct udevice *dev, char ch)
  
  		break;
  	}
@@ -99,7 +99,7 @@ index 80e7adf6a1a4..8b2ef51f1b3b 100644
  	case 'J': {
  		int mode;
  
-@@ -458,6 +490,11 @@ int vidconsole_put_char(struct udevice *dev, char ch)
+@@ -460,6 +492,11 @@ int vidconsole_put_char(struct udevice *dev, char ch)
  	struct vidconsole_priv *priv = dev_get_uclass_priv(dev);
  	int cp, ret;
  
@@ -111,7 +111,7 @@ index 80e7adf6a1a4..8b2ef51f1b3b 100644
  	if (priv->escape) {
  		vidconsole_escape_char(dev, ch);
  		return 0;
-@@ -472,6 +509,7 @@ int vidconsole_put_char(struct udevice *dev, char ch)
+@@ -474,6 +511,7 @@ int vidconsole_put_char(struct udevice *dev, char ch)
  		/* beep */
  		break;
  	case '\r':
@@ -119,7 +119,7 @@ index 80e7adf6a1a4..8b2ef51f1b3b 100644
  		priv->xcur_frac = priv->xstart_frac;
  		break;
  	case '\n':
-@@ -479,6 +517,7 @@ int vidconsole_put_char(struct udevice *dev, char ch)
+@@ -481,6 +519,7 @@ int vidconsole_put_char(struct udevice *dev, char ch)
  		vidconsole_entry_start(dev);
  		break;
  	case '\t':	/* Tab (8 chars alignment) */
@@ -127,7 +127,7 @@ index 80e7adf6a1a4..8b2ef51f1b3b 100644
  		priv->xcur_frac = ((priv->xcur_frac / priv->tab_width_frac)
  				+ 1) * priv->tab_width_frac;
  
-@@ -503,6 +542,8 @@ int vidconsole_put_char(struct udevice *dev, char ch)
+@@ -505,6 +544,8 @@ int vidconsole_put_char(struct udevice *dev, char ch)
  		break;
  	}
  
@@ -136,7 +136,7 @@ index 80e7adf6a1a4..8b2ef51f1b3b 100644
  	return 0;
  }
  
-@@ -723,6 +764,7 @@ static int vidconsole_pre_probe(struct udevice *dev)
+@@ -725,6 +766,7 @@ static int vidconsole_pre_probe(struct udevice *dev)
  	struct video_priv *vid_priv = dev_get_uclass_priv(vid);
  
  	priv->xsize_frac = VID_TO_POS(vid_priv->xsize);
@@ -145,10 +145,10 @@ index 80e7adf6a1a4..8b2ef51f1b3b 100644
  	return 0;
  }
 diff --git a/include/video_console.h b/include/video_console.h
-index 8b5928dc5ebb..00c5ecb664b9 100644
+index 723d2315606d..17a9aa3f9295 100644
 --- a/include/video_console.h
 +++ b/include/video_console.h
-@@ -66,6 +66,7 @@ struct vidconsole_priv {
+@@ -74,6 +74,7 @@ struct vidconsole_priv {
  	int escape_len;
  	int row_saved;
  	int col_saved;
@@ -157,10 +157,10 @@ index 8b5928dc5ebb..00c5ecb664b9 100644
  	char utf8_buf[5];
  };
 -- 
-2.45.2
+2.49.0
 
 
-From f63a54996fdaac7ff995e26fd4318a09a9c14dff Mon Sep 17 00:00:00 2001
+From b2b921d7bc69b505562cf02d1b4c6f6d4325c7d5 Mon Sep 17 00:00:00 2001
 From: Andre Przywara <andre.przywara@arm.com>
 Date: Mon, 10 Jan 2022 00:56:36 +0000
 Subject: [PATCH 2/3] efi-selftest: Add international characters test
@@ -196,10 +196,10 @@ index a3023c82567c..2f8d8d323c2b 100644
  	ret = con_out->output_string(con_out, text);
  	if (ret != EFI_ST_SUCCESS) {
 -- 
-2.45.2
+2.49.0
 
 
-From cc05aa26c43c35e9155d958400532005ae7eeede Mon Sep 17 00:00:00 2001
+From 082422499a5f2689e715df68bfd025a5cc15cc64 Mon Sep 17 00:00:00 2001
 From: Andre Przywara <andre.przywara@arm.com>
 Date: Mon, 10 Jan 2022 00:56:37 +0000
 Subject: [PATCH 3/3] efi_selftest: Add box drawing character selftest
@@ -242,5 +242,5 @@ index 2f8d8d323c2b..02209a5bf224 100644
  	ret = con_out->output_string(con_out, text);
  	if (ret != EFI_ST_SUCCESS) {
 -- 
-2.45.2
+2.49.0
 
diff --git a/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch b/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch
index 07a5fe8c..18c93ab8 100644
--- a/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch
+++ b/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch
@@ -1,4 +1,4 @@
-From c3ae7d7f7af47e747f85f06662e26f434c25c891 Mon Sep 17 00:00:00 2001
+From dae1f9cafd3d2061336f5d230ebc1f236423fa0e Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Fri, 18 Aug 2023 13:31:36 +0300
 Subject: [PATCH 01/13] video: test: Split copy frame buffer check into a
@@ -19,10 +19,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-2-alpernebiyasak@gma
  1 file changed, 58 insertions(+), 11 deletions(-)
 
 diff --git a/test/dm/video.c b/test/dm/video.c
-index 7dfbeb9555d1..14e6af5181f1 100644
+index e347c1403fda..01fa9e1b2415 100644
 --- a/test/dm/video.c
 +++ b/test/dm/video.c
-@@ -54,9 +54,6 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+@@ -54,9 +54,6 @@ DM_TEST(dm_test_video_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
   * size of the compressed data. This provides a pretty good level of
   * certainty and the resulting tests need only check a single value.
   *
@@ -301,10 +301,10 @@ index 7dfbeb9555d1..14e6af5181f1 100644
  	return 0;
  }
 -- 
-2.45.2
+2.49.0
 
 
-From 575ebe8b5d9ae9c9818b4deb708f8a69f9f9a9b1 Mon Sep 17 00:00:00 2001
+From 3c4f71fb10a827db53d6ed637e39afb5cc19a871 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Sun, 20 Aug 2023 17:46:46 +0300
 Subject: [PATCH 02/13] video: test: Support checking copy frame buffer
@@ -328,10 +328,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-3-alpernebiyasak@gma
  1 file changed, 41 insertions(+), 35 deletions(-)
 
 diff --git a/test/dm/video.c b/test/dm/video.c
-index 14e6af5181f1..50374cafc009 100644
+index 01fa9e1b2415..edb1b4ede8c9 100644
 --- a/test/dm/video.c
 +++ b/test/dm/video.c
-@@ -56,22 +56,28 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+@@ -56,22 +56,28 @@ DM_TEST(dm_test_video_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
   *
   * @uts:	Test state
   * @dev:	Video device
@@ -614,10 +614,10 @@ index 14e6af5181f1..50374cafc009 100644
  
  	return 0;
 -- 
-2.45.2
+2.49.0
 
 
-From d1fddc8cbe64a5532ddc43d0b1413ff7cc1bf618 Mon Sep 17 00:00:00 2001
+From ecd9200f2068ab8bbeda5c7b8ddc4b8d7ca6b038 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Fri, 18 Aug 2023 17:31:27 +0300
 Subject: [PATCH 03/13] video: test: Test partial updates of hardware frame
@@ -637,13 +637,13 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-4-alpernebiyasak@gma
  1 file changed, 54 insertions(+)
 
 diff --git a/test/dm/video.c b/test/dm/video.c
-index 50374cafc009..4798f2205a99 100644
+index edb1b4ede8c9..80e65d66dbaf 100644
 --- a/test/dm/video.c
 +++ b/test/dm/video.c
 @@ -656,3 +656,57 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts)
  	return 0;
  }
- DM_TEST(dm_test_video_truetype_bs, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ DM_TEST(dm_test_video_truetype_bs, UTF_SCAN_PDATA | UTF_SCAN_FDT);
 +
 +/* Test partial rendering onto hardware frame buffer */
 +static int dm_test_video_copy(struct unit_test_state *uts)
@@ -697,12 +697,12 @@ index 50374cafc009..4798f2205a99 100644
 +
 +	return 0;
 +}
-+DM_TEST(dm_test_video_copy, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
++DM_TEST(dm_test_video_copy, UTF_SCAN_PDATA | UTF_SCAN_FDT);
 -- 
-2.45.2
+2.49.0
 
 
-From 700a7cdc62fa08f425c05db2061f06c56d96d5b6 Mon Sep 17 00:00:00 2001
+From 6ecfb63749d955fc28e6312583865c902ffb1175 Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:15 +0200
 Subject: [PATCH 04/13] dm: video: Add damage tracking API
@@ -728,7 +728,7 @@ Reviewed-by: Simon Glass <sjg@chromium.org>
  3 files changed, 86 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
-index 6e79694fd192..d7da655cea62 100644
+index 3c3cebaacd02..5d67067891be 100644
 --- a/drivers/video/Kconfig
 +++ b/drivers/video/Kconfig
 @@ -98,6 +98,19 @@ config VIDEO_COPY
@@ -752,10 +752,10 @@ index 6e79694fd192..d7da655cea62 100644
  	bool "Generic PWM based Backlight Driver"
  	depends on BACKLIGHT && DM_PWM
 diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index a5aa8dd52954..b95f2dbc7703 100644
+index ff4f21995859..da035e5c92b7 100644
 --- a/drivers/video/video-uclass.c
 +++ b/drivers/video/video-uclass.c
-@@ -352,6 +352,34 @@ void video_set_default_colors(struct udevice *dev, bool invert)
+@@ -367,6 +367,34 @@ void video_set_default_colors(struct udevice *dev, bool invert)
  	priv->colour_bg = video_index_to_colour(priv, back);
  }
  
@@ -790,7 +790,7 @@ index a5aa8dd52954..b95f2dbc7703 100644
  /* Flush video activity to the caches */
  int video_sync(struct udevice *vid, bool force)
  {
-@@ -385,6 +413,13 @@ int video_sync(struct udevice *vid, bool force)
+@@ -400,6 +428,13 @@ int video_sync(struct udevice *vid, bool force)
  #endif
  	priv->last_sync = get_timer(0);
  
@@ -805,10 +805,10 @@ index a5aa8dd52954..b95f2dbc7703 100644
  }
  
 diff --git a/include/video.h b/include/video.h
-index 4013a949983f..835d7734cb75 100644
+index a1f7fd7e839c..7eed112e00c4 100644
 --- a/include/video.h
 +++ b/include/video.h
-@@ -88,6 +88,11 @@ enum video_format {
+@@ -85,6 +85,11 @@ enum video_format {
   * @fb_size:	Frame buffer size
   * @copy_fb:	Copy of the frame buffer to keep up to date; see struct
   *		video_uc_plat
@@ -820,7 +820,7 @@ index 4013a949983f..835d7734cb75 100644
   * @line_length:	Length of each frame buffer line, in bytes. This can be
   *		set by the driver, but if not, the uclass will set it after
   *		probing
-@@ -116,6 +121,12 @@ struct video_priv {
+@@ -113,6 +118,12 @@ struct video_priv {
  	void *fb;
  	int fb_size;
  	void *copy_fb;
@@ -877,10 +877,10 @@ index 4013a949983f..835d7734cb75 100644
   * video_is_active() - Test if one video device it active
   *
 -- 
-2.45.2
+2.49.0
 
 
-From b84ee524454fbfebd71532532bf2e28ad97ef676 Mon Sep 17 00:00:00 2001
+From c23d99983901910dadf43f2b4d0b833a0a6d6c92 Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:16 +0200
 Subject: [PATCH 05/13] dm: video: Add damage notification on display fills
@@ -899,10 +899,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-6-alpernebiyasak@gma
  1 file changed, 4 insertions(+)
 
 diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index b95f2dbc7703..6906b2b83623 100644
+index da035e5c92b7..1c07613539f2 100644
 --- a/drivers/video/video-uclass.c
 +++ b/drivers/video/video-uclass.c
-@@ -201,6 +201,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+@@ -214,6 +214,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
  	if (ret)
  		return ret;
  
@@ -911,7 +911,7 @@ index b95f2dbc7703..6906b2b83623 100644
  	return 0;
  }
  
-@@ -250,6 +252,8 @@ int video_fill(struct udevice *dev, u32 colour)
+@@ -262,6 +264,8 @@ int video_fill(struct udevice *dev, u32 colour)
  	if (ret)
  		return ret;
  
@@ -921,10 +921,10 @@ index b95f2dbc7703..6906b2b83623 100644
  }
  
 -- 
-2.45.2
+2.49.0
 
 
-From b18a1ef92e2a003771a4a846c592302c1e92bd83 Mon Sep 17 00:00:00 2001
+From bc55519e74270926ee3680002c58fdeb21cd41ce Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:17 +0200
 Subject: [PATCH 06/13] vidconsole: Add damage notifications to all vidconsole
@@ -1112,7 +1112,7 @@ index a3f8c6352f83..f11dc3a0b075 100644
  }
  
 diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c
-index c435162d3f94..6a17f732fc26 100644
+index 17a29817664f..073ddcfb6950 100644
 --- a/drivers/video/console_truetype.c
 +++ b/drivers/video/console_truetype.c
 @@ -190,6 +190,7 @@ struct console_tt_store {
@@ -1172,10 +1172,10 @@ index c435162d3f94..6a17f732fc26 100644
  	if (ret)
  		return ret;
 -- 
-2.45.2
+2.49.0
 
 
-From 991d7e646de88fd019059679f659761072412e15 Mon Sep 17 00:00:00 2001
+From e759e3ab52f4373d4f2487d857118b3f0b5998b2 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Fri, 18 Aug 2023 17:55:08 +0300
 Subject: [PATCH 07/13] video: test: Test video damage tracking via vidconsole
@@ -1194,10 +1194,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-8-alpernebiyasak@gma
  2 files changed, 57 insertions(+)
 
 diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
-index dc5fcdbd1c9e..5e5ad60ee057 100644
+index 861a1f4cd90e..8bf36ff325d8 100644
 --- a/configs/sandbox_defconfig
 +++ b/configs/sandbox_defconfig
-@@ -319,6 +319,7 @@ CONFIG_USB_ETH_CDC=y
+@@ -328,6 +328,7 @@ CONFIG_USB_ETH_CDC=y
  CONFIG_VIDEO=y
  CONFIG_VIDEO_FONT_SUN12X22=y
  CONFIG_VIDEO_COPY=y
@@ -1206,13 +1206,13 @@ index dc5fcdbd1c9e..5e5ad60ee057 100644
  CONFIG_CONSOLE_TRUETYPE=y
  CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
 diff --git a/test/dm/video.c b/test/dm/video.c
-index 4798f2205a99..119c43153165 100644
+index 80e65d66dbaf..e76fa986d359 100644
 --- a/test/dm/video.c
 +++ b/test/dm/video.c
 @@ -710,3 +710,59 @@ static int dm_test_video_copy(struct unit_test_state *uts)
  	return 0;
  }
- DM_TEST(dm_test_video_copy, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+ DM_TEST(dm_test_video_copy, UTF_SCAN_PDATA | UTF_SCAN_FDT);
 +
 +/* Test video damage tracking */
 +static int dm_test_video_damage(struct unit_test_state *uts)
@@ -1268,12 +1268,12 @@ index 4798f2205a99..119c43153165 100644
 +
 +	return 0;
 +}
-+DM_TEST(dm_test_video_damage, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
++DM_TEST(dm_test_video_damage, UTF_SCAN_PDATA | UTF_SCAN_FDT);
 -- 
-2.45.2
+2.49.0
 
 
-From f74688b9828f83306dea8553eafe61b5d81fbbe0 Mon Sep 17 00:00:00 2001
+From aa9d791d839b1004809b4a6cba38cd0bfd3dafa9 Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:18 +0200
 Subject: [PATCH 08/13] video: Add damage notification on bmp display
@@ -1303,10 +1303,10 @@ index ad512d99a1b9..78de95607924 100644
  	fb = (uchar *)(priv->fb + y * priv->line_length + x * bpix / 8);
  	ret = video_sync_copy(dev, start, fb);
 -- 
-2.45.2
+2.49.0
 
 
-From 791b0accde45ada93fdf61773f8c7e69b934e55e Mon Sep 17 00:00:00 2001
+From 68262daa712e3202149aa0249bcff233234b6dfa Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:19 +0200
 Subject: [PATCH 09/13] efi_loader: GOP: Add damage notification on BLT
@@ -1326,10 +1326,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-10-alpernebiyasak@gm
  1 file changed, 7 insertions(+)
 
 diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c
-index 41e12fa72460..1694e23dcc62 100644
+index 4593975be5af..3abb47d610e6 100644
 --- a/lib/efi_loader/efi_gop.c
 +++ b/lib/efi_loader/efi_gop.c
-@@ -24,6 +24,7 @@ static const efi_guid_t efi_gop_guid = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID;
+@@ -26,6 +26,7 @@ static const efi_guid_t efi_gop_guid = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID;
   * @ops:	graphical output protocol interface
   * @info:	graphical output mode information
   * @mode:	graphical output mode
@@ -1337,7 +1337,7 @@ index 41e12fa72460..1694e23dcc62 100644
   * @bpix:	bits per pixel
   * @fb:		frame buffer
   */
-@@ -32,6 +33,7 @@ struct efi_gop_obj {
+@@ -34,6 +35,7 @@ struct efi_gop_obj {
  	struct efi_gop ops;
  	struct efi_gop_mode_info info;
  	struct efi_gop_mode mode;
@@ -1345,7 +1345,7 @@ index 41e12fa72460..1694e23dcc62 100644
  	/* Fields we only have access to during init */
  	u32 bpix;
  	void *fb;
-@@ -120,6 +122,7 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this,
+@@ -122,6 +124,7 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this,
  	u32 *fb32 = gopobj->fb;
  	u16 *fb16 = gopobj->fb;
  	struct efi_gop_pixel *buffer = __builtin_assume_aligned(bufferp, 4);
@@ -1353,7 +1353,7 @@ index 41e12fa72460..1694e23dcc62 100644
  
  	if (delta) {
  		/* Check for 4 byte alignment */
-@@ -243,6 +246,9 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this,
+@@ -245,6 +248,9 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this,
  		dlineoff += dwidth;
  	}
  
@@ -1363,7 +1363,7 @@ index 41e12fa72460..1694e23dcc62 100644
  	return EFI_SUCCESS;
  }
  
-@@ -549,6 +555,7 @@ efi_status_t efi_gop_register(void)
+@@ -551,6 +557,7 @@ efi_status_t efi_gop_register(void)
  	gopobj->info.pixels_per_scanline = col;
  	gopobj->bpix = bpix;
  	gopobj->fb = map_sysmem(fb_base, fb_size);
@@ -1372,10 +1372,10 @@ index 41e12fa72460..1694e23dcc62 100644
  	return EFI_SUCCESS;
  }
 -- 
-2.45.2
+2.49.0
 
 
-From 1b0905d54711c6c170de575a36e66006b8a6583a Mon Sep 17 00:00:00 2001
+From b9d38bb68233d917a84c589b098699bd9ef08d70 Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:20 +0200
 Subject: [PATCH 10/13] video: Only dcache flush damaged lines
@@ -1396,10 +1396,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-11-alpernebiyasak@gm
  1 file changed, 38 insertions(+), 5 deletions(-)
 
 diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index 6906b2b83623..3f6572a124ea 100644
+index 1c07613539f2..2dffcc229f6f 100644
 --- a/drivers/video/video-uclass.c
 +++ b/drivers/video/video-uclass.c
-@@ -384,6 +384,40 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height)
+@@ -399,6 +399,40 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height)
  }
  #endif
  
@@ -1440,7 +1440,7 @@ index 6906b2b83623..3f6572a124ea 100644
  /* Flush video activity to the caches */
  int video_sync(struct udevice *vid, bool force)
  {
-@@ -407,11 +441,10 @@ int video_sync(struct udevice *vid, bool force)
+@@ -422,11 +456,10 @@ int video_sync(struct udevice *vid, bool force)
  	 * out whether it exists? For now, ARM is safe.
  	 */
  #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
@@ -1457,10 +1457,10 @@ index 6906b2b83623..3f6572a124ea 100644
  	sandbox_sdl_sync(priv->fb);
  #endif
 -- 
-2.45.2
+2.49.0
 
 
-From 4c02e522cb00b84cfa61004c32b4e5ae28457c58 Mon Sep 17 00:00:00 2001
+From bcb0061c373dca651760928ec6f8e13842b26e55 Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Fri, 10 Jun 2022 00:59:21 +0200
 Subject: [PATCH 11/13] video: Use VIDEO_DAMAGE for VIDEO_COPY
@@ -1493,20 +1493,20 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-12-alpernebiyasak@gm
  drivers/video/Kconfig             |  5 ++
  drivers/video/console_normal.c    | 13 +----
  drivers/video/console_rotate.c    | 44 +++-----------
- drivers/video/console_truetype.c  | 16 +-----
+ drivers/video/console_truetype.c  | 20 +------
  drivers/video/vidconsole-uclass.c | 16 ------
  drivers/video/video-uclass.c      | 96 ++++++++-----------------------
  drivers/video/video_bmp.c         |  7 ---
  include/video.h                   | 37 ------------
  include/video_console.h           | 52 -----------------
  test/dm/video.c                   |  3 +-
- 11 files changed, 43 insertions(+), 247 deletions(-)
+ 11 files changed, 43 insertions(+), 251 deletions(-)
 
 diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
-index 5e5ad60ee057..dc5fcdbd1c9e 100644
+index 8bf36ff325d8..861a1f4cd90e 100644
 --- a/configs/sandbox_defconfig
 +++ b/configs/sandbox_defconfig
-@@ -319,7 +319,6 @@ CONFIG_USB_ETH_CDC=y
+@@ -328,7 +328,6 @@ CONFIG_USB_ETH_CDC=y
  CONFIG_VIDEO=y
  CONFIG_VIDEO_FONT_SUN12X22=y
  CONFIG_VIDEO_COPY=y
@@ -1515,7 +1515,7 @@ index 5e5ad60ee057..dc5fcdbd1c9e 100644
  CONFIG_CONSOLE_TRUETYPE=y
  CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
 diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
-index d7da655cea62..d6497819ea73 100644
+index 5d67067891be..964174b01acc 100644
 --- a/drivers/video/Kconfig
 +++ b/drivers/video/Kconfig
 @@ -89,11 +89,14 @@ config VIDEO_PCI_DEFAULT_FB_SIZE
@@ -1729,7 +1729,7 @@ index f11dc3a0b075..886b25dcfafc 100644
  		return ret;
  
 diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c
-index 6a17f732fc26..58dcd8e050c3 100644
+index 073ddcfb6950..56c3af3d5aad 100644
 --- a/drivers/video/console_truetype.c
 +++ b/drivers/video/console_truetype.c
 @@ -194,7 +194,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr)
@@ -1786,11 +1786,29 @@ index 6a17f732fc26..58dcd8e050c3 100644
  	free(data);
  
  	return width_frac;
+@@ -872,7 +862,6 @@ static int truetype_set_cursor_visible(struct udevice *dev, bool visible,
+ 	uint row, width, height, xoff;
+ 	void *start, *line;
+ 	uint out, val;
+-	int ret;
+ 
+ 	if (xpl_phase() <= PHASE_SPL)
+ 		return -ENOSYS;
+@@ -962,9 +951,6 @@ static int truetype_set_cursor_visible(struct udevice *dev, bool visible,
+ 
+ 		line += vid_priv->line_length;
+ 	}
+-	ret = vidconsole_sync_copy(dev, start, line);
+-	if (ret)
+-		return ret;
+ 
+ 	return video_sync(vid, true);
+ }
 diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c
-index 8b2ef51f1b3b..bcc46a08cbbd 100644
+index 8613c464040f..ce6c8bb70cb7 100644
 --- a/drivers/video/vidconsole-uclass.c
 +++ b/drivers/video/vidconsole-uclass.c
-@@ -801,22 +801,6 @@ UCLASS_DRIVER(vidconsole) = {
+@@ -803,22 +803,6 @@ UCLASS_DRIVER(vidconsole) = {
  	.per_device_auto	= sizeof(struct vidconsole_priv),
  };
  
@@ -1814,10 +1832,10 @@ index 8b2ef51f1b3b..bcc46a08cbbd 100644
  {
  	int ret;
 diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index 3f6572a124ea..845db1c9b6d3 100644
+index 2dffcc229f6f..eeee5d960838 100644
 --- a/drivers/video/video-uclass.c
 +++ b/drivers/video/video-uclass.c
-@@ -158,7 +158,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+@@ -171,7 +171,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
  	struct video_priv *priv = dev_get_uclass_priv(dev);
  	void *start, *line;
  	int pixels = xend - xstart;
@@ -1826,7 +1844,7 @@ index 3f6572a124ea..845db1c9b6d3 100644
  
  	start = priv->fb + ystart * priv->line_length;
  	start += xstart * VNBYTES(priv->bpix);
-@@ -197,9 +197,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+@@ -210,9 +210,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
  		}
  		line += priv->line_length;
  	}
@@ -1836,7 +1854,7 @@ index 3f6572a124ea..845db1c9b6d3 100644
  
  	video_damage(dev, xstart, ystart, xend - xstart, yend - ystart);
  
-@@ -223,7 +220,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho)
+@@ -235,7 +232,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho)
  int video_fill(struct udevice *dev, u32 colour)
  {
  	struct video_priv *priv = dev_get_uclass_priv(dev);
@@ -1844,7 +1862,7 @@ index 3f6572a124ea..845db1c9b6d3 100644
  
  	switch (priv->bpix) {
  	case VIDEO_BPP16:
-@@ -248,9 +244,6 @@ int video_fill(struct udevice *dev, u32 colour)
+@@ -260,9 +256,6 @@ int video_fill(struct udevice *dev, u32 colour)
  		memset(priv->fb, colour, priv->fb_size);
  		break;
  	}
@@ -1854,7 +1872,7 @@ index 3f6572a124ea..845db1c9b6d3 100644
  
  	video_damage(dev, 0, 0, priv->xsize, priv->ysize);
  
-@@ -418,6 +411,27 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy)
+@@ -433,6 +426,27 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy)
  }
  #endif
  
@@ -1882,7 +1900,7 @@ index 3f6572a124ea..845db1c9b6d3 100644
  /* Flush video activity to the caches */
  int video_sync(struct udevice *vid, bool force)
  {
-@@ -425,6 +439,9 @@ int video_sync(struct udevice *vid, bool force)
+@@ -440,6 +454,9 @@ int video_sync(struct udevice *vid, bool force)
  	struct video_ops *ops = video_get_ops(vid);
  	int ret;
  
@@ -1892,7 +1910,7 @@ index 3f6572a124ea..845db1c9b6d3 100644
  	if (ops && ops->video_sync) {
  		ret = ops->video_sync(vid);
  		if (ret)
-@@ -508,69 +525,6 @@ int video_get_ysize(struct udevice *dev)
+@@ -523,69 +540,6 @@ int video_get_ysize(struct udevice *dev)
  	return priv->ysize;
  }
  
@@ -1987,7 +2005,7 @@ index 78de95607924..1f267d45812c 100644
  	return video_sync(dev, false);
  }
 diff --git a/include/video.h b/include/video.h
-index 835d7734cb75..705076facfb5 100644
+index 7eed112e00c4..2fe2f73a865b 100644
 --- a/include/video.h
 +++ b/include/video.h
 @@ -355,43 +355,6 @@ void video_set_default_colors(struct udevice *dev, bool invert);
@@ -2035,10 +2053,10 @@ index 835d7734cb75..705076facfb5 100644
  /**
   * video_damage() - Notify the video subsystem about screen updates.
 diff --git a/include/video_console.h b/include/video_console.h
-index 00c5ecb664b9..ead0e05e4003 100644
+index 17a9aa3f9295..b228c725fd80 100644
 --- a/include/video_console.h
 +++ b/include/video_console.h
-@@ -530,56 +530,4 @@ void vidconsole_list_fonts(struct udevice *dev);
+@@ -538,56 +538,4 @@ void vidconsole_list_fonts(struct udevice *dev);
   */
  int vidconsole_get_font_size(struct udevice *dev, const char **name, uint *sizep);
  
@@ -2096,7 +2114,7 @@ index 00c5ecb664b9..ead0e05e4003 100644
 -
  #endif
 diff --git a/test/dm/video.c b/test/dm/video.c
-index 119c43153165..9b7bb51a3dd9 100644
+index e76fa986d359..021f4b3fa733 100644
 --- a/test/dm/video.c
 +++ b/test/dm/video.c
 @@ -105,6 +105,7 @@ static int check_copy_frame_buffer(struct unit_test_state *uts,
@@ -2117,10 +2135,10 @@ index 119c43153165..9b7bb51a3dd9 100644
  	return 0;
  }
 -- 
-2.45.2
+2.49.0
 
 
-From 174b8b118c02e7cadf9ad56462b481c91f4a3343 Mon Sep 17 00:00:00 2001
+From 631692ed7090a8cfd0b2a3b3f23c295644f1393e Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Tue, 3 Jan 2023 22:50:03 +0100
 Subject: [PATCH 12/13] video: Always compile cache flushing code
@@ -2145,10 +2163,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-13-alpernebiyasak@gm
  1 file changed, 5 insertions(+), 7 deletions(-)
 
 diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index 845db1c9b6d3..5416e0d9030b 100644
+index eeee5d960838..6c5a86d85dbc 100644
 --- a/drivers/video/video-uclass.c
 +++ b/drivers/video/video-uclass.c
-@@ -383,6 +383,9 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy)
+@@ -398,6 +398,9 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy)
  	struct video_priv *priv = dev_get_uclass_priv(vid);
  	ulong fb = use_copy ? (ulong)priv->copy_fb : (ulong)priv->fb;
  
@@ -2158,7 +2176,7 @@ index 845db1c9b6d3..5416e0d9030b 100644
  	if (!priv->flush_dcache)
  		return;
  
-@@ -452,17 +455,12 @@ int video_sync(struct udevice *vid, bool force)
+@@ -467,17 +470,12 @@ int video_sync(struct udevice *vid, bool force)
  	    get_timer(priv->last_sync) < CONFIG_VIDEO_SYNC_MS)
  		return 0;
  
@@ -2179,10 +2197,10 @@ index 845db1c9b6d3..5416e0d9030b 100644
  #endif
  	priv->last_sync = get_timer(0);
 -- 
-2.45.2
+2.49.0
 
 
-From 2a1af00665464023c38903eeb75a0c89099892fb Mon Sep 17 00:00:00 2001
+From 08f3add44c202053f5ba882cb2f440e8e470229c Mon Sep 17 00:00:00 2001
 From: Alexander Graf <agraf@csgraf.de>
 Date: Tue, 3 Jan 2023 22:50:04 +0100
 Subject: [PATCH 13/13] video: Enable VIDEO_DAMAGE for drivers that need it
@@ -2214,10 +2232,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-14-alpernebiyasak@gm
  9 files changed, 16 insertions(+)
 
 diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
-index 17666814c52e..1ba0d2c1c8d7 100644
+index ba1b15414379..bb1ea961704e 100644
 --- a/arch/arm/mach-sunxi/Kconfig
 +++ b/arch/arm/mach-sunxi/Kconfig
-@@ -863,6 +863,7 @@ config VIDEO_SUNXI
+@@ -882,6 +882,7 @@ config VIDEO_SUNXI
  	depends on !SUNXI_GEN_NCAT2
  	select VIDEO
  	select DISPLAY
@@ -2226,7 +2244,7 @@ index 17666814c52e..1ba0d2c1c8d7 100644
  	default y
  	---help---
 diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
-index d6497819ea73..8fb69e0b16c2 100644
+index 964174b01acc..6e1577ae6871 100644
 --- a/drivers/video/Kconfig
 +++ b/drivers/video/Kconfig
 @@ -534,6 +534,7 @@ config VIDEO_LCD_ANX9804
@@ -2245,7 +2263,7 @@ index d6497819ea73..8fb69e0b16c2 100644
  	help
  	  The graphics processor already sets up the display so this driver
  	  simply checks the resolution and then sets up the frame buffer with
-@@ -706,6 +708,7 @@ source "drivers/video/meson/Kconfig"
+@@ -715,6 +717,7 @@ source "drivers/video/meson/Kconfig"
  
  config VIDEO_MVEBU
  	bool "Armada XP LCD controller"
@@ -2253,7 +2271,7 @@ index d6497819ea73..8fb69e0b16c2 100644
  	---help---
  	Support for the LCD controller integrated in the Marvell
  	Armada XP SoC.
-@@ -740,6 +743,7 @@ config NXP_TDA19988
+@@ -749,6 +752,7 @@ config NXP_TDA19988
  
  config ATMEL_HLCD
  	bool "Enable ATMEL video support using HLCDC"
@@ -2261,7 +2279,7 @@ index d6497819ea73..8fb69e0b16c2 100644
  	help
  	   HLCDC supports video output to an attached LCD panel.
  
-@@ -816,6 +820,7 @@ source "drivers/video/tidss/Kconfig"
+@@ -825,6 +829,7 @@ source "drivers/video/tidss/Kconfig"
  
  config VIDEO_TEGRA124
  	bool "Enable video support on Tegra124"
@@ -2269,7 +2287,7 @@ index d6497819ea73..8fb69e0b16c2 100644
  	help
  	   Tegra124 supports many video output options including eDP and
  	   HDMI. At present only eDP is supported by U-Boot. This option
-@@ -830,6 +835,7 @@ source "drivers/video/imx/Kconfig"
+@@ -839,6 +844,7 @@ source "drivers/video/imx/Kconfig"
  
  config VIDEO_MXS
  	bool "Enable video support on i.MX28/i.MX6UL/i.MX7 SoCs"
@@ -2277,7 +2295,7 @@ index d6497819ea73..8fb69e0b16c2 100644
  	help
  	  Enable framebuffer driver for i.MX28/i.MX6UL/i.MX7 processors
  
-@@ -892,6 +898,7 @@ config VIDEO_DW_MIPI_DSI
+@@ -901,6 +907,7 @@ config VIDEO_DW_MIPI_DSI
  
  config VIDEO_SIMPLE
  	bool "Simple display driver for preconfigured display"
@@ -2285,7 +2303,7 @@ index d6497819ea73..8fb69e0b16c2 100644
  	help
  	  Enables a simple generic display driver which utilizes the
  	  simple-framebuffer devicetree bindings.
-@@ -910,6 +917,7 @@ config VIDEO_DT_SIMPLEFB
+@@ -919,6 +926,7 @@ config VIDEO_DT_SIMPLEFB
  
  config VIDEO_MCDE_SIMPLE
  	bool "Simple driver for ST-Ericsson MCDE with preconfigured display"
@@ -2377,5 +2395,5 @@ index 95086f3a5d66..3291b3ceb8d5 100644
  	  TIDSS supports  video output options LVDS and
  	  DPI . This option enables these supports which can be used on
 -- 
-2.45.2
+2.49.0
 
diff --git a/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch b/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch
index fc3dea4d..5307f378 100644
--- a/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch
+++ b/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch
@@ -1,4 +1,4 @@
-From ec8f5b8e949995eb34b7e54b9f06894eb38d02b4 Mon Sep 17 00:00:00 2001
+From faa87ed4d2ff07e9e8cc98cd08cbb34c905c1ac6 Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Wed, 10 Jul 2024 17:37:56 +0300
 Subject: [PATCH] HACK: Makefile: Ignore missing input files for binman images
@@ -17,18 +17,18 @@ Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/Makefile b/Makefile
-index 34dd029d0cda..d5d89bd2e35c 100644
+index a7593e8a1680..30deb760bf8f 100644
 --- a/Makefile
 +++ b/Makefile
-@@ -1375,7 +1375,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \
-                 --toolpath $(objtree)/tools \
+@@ -1410,7 +1410,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \
  		$(if $(BINMAN_VERBOSE),-v$(BINMAN_VERBOSE)) \
- 		build -u -d u-boot.dtb -O . -m \
--		--allow-missing $(if $(BINMAN_ALLOW_MISSING),--ignore-missing) \
-+		--allow-missing --ignore-missing \
+ 		build -u -d $(binman_dtb) -O . -m \
+ 		--allow-missing --fake-ext-blobs \
+-		$(if $(BINMAN_ALLOW_MISSING),--ignore-missing) \
++		--ignore-missing \
  		-I . -I $(srctree) -I $(srctree)/board/$(BOARDDIR) \
- 		-I $(dt_dir) -a of-list=$(CONFIG_OF_LIST) \
+ 		$(foreach f,$(of_list_dirs),-I $(f)) -a of-list=$(of_list) \
  		$(foreach f,$(BINMAN_INDIRS),-I $(f)) \
 -- 
-2.45.2
+2.49.0
 
diff --git a/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch b/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch
index 45a6ab4a..018da338 100644
--- a/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch
+++ b/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch
@@ -1,4 +1,4 @@
-From 9685041c19bcc61ca847a59e93c716d23df51898 Mon Sep 17 00:00:00 2001
+From d02163324baeb817ed55df41fac863cab4be038c Mon Sep 17 00:00:00 2001
 From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
 Date: Wed, 10 Jul 2024 14:32:19 +0300
 Subject: [PATCH] HACK: rk3399: gru: Remove assigned clock dt properties for
@@ -18,7 +18,7 @@ Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
  1 file changed, 3 insertions(+)
 
 diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi
-index 6bdc892bd913..f4457c1b9b48 100644
+index 5517176aa4a0..9f40cf1e0208 100644
 --- a/arch/arm/dts/rk3399-gru-u-boot.dtsi
 +++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi
 @@ -27,6 +27,9 @@ &cros_ec {
@@ -30,7 +30,7 @@ index 6bdc892bd913..f4457c1b9b48 100644
 +	/delete-property/ assigned-clock-rates;
  };
  
- &pp1800_audio {
+ &emmc_phy {
 -- 
-2.45.2
+2.49.0
 
diff --git a/config/u-boot/default/patches/0009-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch b/config/u-boot/default/patches/0009-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch
deleted file mode 100644
index 905b311c..00000000
--- a/config/u-boot/default/patches/0009-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 3c61a3257ad5799202cac64020d3b4af21b72de3 Mon Sep 17 00:00:00 2001
-From: Markus Volk <f_l_k@t-online.de>
-Date: Wed, 30 Oct 2024 06:07:16 +0100
-Subject: [PATCH 1/1] scripts/dtc/pylibfdt/libfdt.i_shipped: Use
- SWIG_AppendOutput
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Swig has changed language specific AppendOutput functions. The helper
-macro SWIG_AppendOutput remains unchanged. Use that instead
-of SWIG_Python_AppendOutput, which would require an extra parameter
-since swig 4.3.0.
-
-/home/flk/poky/build-test/tmp/work/qemux86_64-poky-linux/u-boot/2024.10/git/arch/x86/cpu/u-boot-64.lds
-| scripts/dtc/pylibfdt/libfdt_wrap.c: In function ‘_wrap_fdt_next_node’:
-| scripts/dtc/pylibfdt/libfdt_wrap.c:5581:17: error: too few arguments to function ‘SWIG_Python_AppendOutput’
-|  5581 |     resultobj = SWIG_Python_AppendOutput(resultobj, val);
-|       |                 ^~~~~~~~~~~~~~~~~~~~~~~~
-
-Signed-off-by: Markus Volk <f_l_k@t-online.de>
-Reported-by: Rudi Heitbaum <rudi@heitbaum.com>
-Link: https://github.com/dgibson/dtc/pull/154
----
- scripts/dtc/pylibfdt/libfdt.i_shipped | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
-diff --git a/scripts/dtc/pylibfdt/libfdt.i_shipped b/scripts/dtc/pylibfdt/libfdt.i_shipped
-index 56cc5d48f4..e4659489a9 100644
---- a/scripts/dtc/pylibfdt/libfdt.i_shipped
-+++ b/scripts/dtc/pylibfdt/libfdt.i_shipped
-@@ -1037,7 +1037,7 @@ typedef uint32_t fdt32_t;
- 			fdt_string(fdt1, fdt32_to_cpu($1->nameoff)));
- 		buff = PyByteArray_FromStringAndSize(
- 			(const char *)($1 + 1), fdt32_to_cpu($1->len));
--		resultobj = SWIG_Python_AppendOutput(resultobj, buff);
-+		resultobj = SWIG_AppendOutput(resultobj, buff);
- 	}
- }
- 
-@@ -1076,7 +1076,7 @@ typedef uint32_t fdt32_t;
- 
- %typemap(argout) int *depth {
-         PyObject *val = Py_BuildValue("i", *arg$argnum);
--        resultobj = SWIG_Python_AppendOutput(resultobj, val);
-+        resultobj = SWIG_AppendOutput(resultobj, val);
- }
- 
- %apply int *depth { int *depth };
-@@ -1092,7 +1092,7 @@ typedef uint32_t fdt32_t;
-            if (PyTuple_GET_SIZE(resultobj) == 0)
-               resultobj = val;
-            else
--              resultobj = SWIG_Python_AppendOutput(resultobj, val);
-+              resultobj = SWIG_AppendOutput(resultobj, val);
-         }
- }
- 
--- 
-2.39.5
-
diff --git a/config/u-boot/default/target.cfg b/config/u-boot/default/target.cfg
index c0fb6209..f3c856d4 100644
--- a/config/u-boot/default/target.cfg
+++ b/config/u-boot/default/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="default"
-rev="f919c3a889f0ec7d63a48b5d0ed064386b0980bd" # v2024.10
+rev="34820924edbc4ec7803eb89d9852f4b870fa760a" # v2025.04

From ed9ddd7415fddaabb60554b858b08f292084b92c Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Wed, 23 Apr 2025 22:04:06 +0300
Subject: [PATCH 1260/1549] u-boot: arm64: Add new upstream defconfigs

Copy over the new upstream defconfigs from the refreshed U-Boot trees,
so we can fold our modifications into them. Manually done, but like:

    do_defconfig() {
        ours="$1"
        theirs="$2"
        tree="$3"

        cp src/u-boot/${tree}/configs/${theirs}_defconfig \
           config/u-boot/${ours}/config/default
    }

    do_defconfig  amd64coreboot   coreboot64        x86_64
    do_defconfig  i386coreboot    coreboot          x86
    do_defconfig  gru_bob         chromebook_bob    default
    do_defconfig  gru_kevin       chromebook_kevin  default
    do_defconfig  qemu_arm_12mb   qemu_arm64        default

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 config/u-boot/gru_bob/config/default         | 30 +++++++-------------
 config/u-boot/gru_kevin/config/default       | 30 +++++++-------------
 config/u-boot/qemu_arm64_12mb/config/default | 12 ++++++--
 3 files changed, 31 insertions(+), 41 deletions(-)

diff --git a/config/u-boot/gru_bob/config/default b/config/u-boot/gru_bob/config/default
index b2ecfa60..5b8c0d35 100644
--- a/config/u-boot/gru_bob/config/default
+++ b/config/u-boot/gru_bob/config/default
@@ -1,50 +1,41 @@
 CONFIG_ARM=y
 CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_COUNTER_FREQUENCY=24000000
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_TEXT_BASE=0x00200000
 CONFIG_SPL_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_ENV_OFFSET=0x3F8000
 CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-bob"
-CONFIG_SPL_TEXT_BASE=0xff8c2000
 CONFIG_DM_RESET=y
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_BOOT_MODE_REG=0
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
 # CONFIG_SPL_MMC is not set
-CONFIG_SPL_STACK=0xff8effff
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xff8e0000
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_DEBUG_UART_BASE=0xff1a0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
-CONFIG_SYS_LOAD_ADDR=0x800800
 CONFIG_DEBUG_UART=y
-# CONFIG_SPL_FIT_SIGNATURE is not set
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_BLOBLIST=y
+# CONFIG_TPL_BLOBLIST is not set
+CONFIG_BLOBLIST_FIXED=y
 CONFIG_BLOBLIST_ADDR=0x100000
 CONFIG_BLOBLIST_SIZE=0x1000
-CONFIG_SPL_MAX_SIZE=0x1e000
+CONFIG_SPL_MAX_SIZE=0x40000
 CONFIG_SPL_PAD_TO=0x7f8000
 CONFIG_HANDOFF=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_TPL=y
+CONFIG_TPL_GPIO=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
@@ -59,7 +50,7 @@ CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_LOG=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ROCKCHIP_GPIO=y
@@ -75,8 +66,8 @@ CONFIG_MMC_PWRSEQ=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
-CONFIG_SF_DEFAULT_BUS=1
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_ETH_DESIGNWARE=y
@@ -85,6 +76,7 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PHY_ROCKCHIP_TYPEC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_CROS_EC=y
diff --git a/config/u-boot/gru_kevin/config/default b/config/u-boot/gru_kevin/config/default
index 0fba5912..a29a04aa 100644
--- a/config/u-boot/gru_kevin/config/default
+++ b/config/u-boot/gru_kevin/config/default
@@ -1,51 +1,42 @@
 CONFIG_ARM=y
 CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_COUNTER_FREQUENCY=24000000
 CONFIG_ARCH_ROCKCHIP=y
-CONFIG_TEXT_BASE=0x00200000
 CONFIG_SPL_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_ENV_OFFSET=0x3F8000
 CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-kevin"
-CONFIG_SPL_TEXT_BASE=0xff8c2000
 CONFIG_DM_RESET=y
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_BOOT_MODE_REG=0
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
 # CONFIG_SPL_MMC is not set
 CONFIG_TARGET_CHROMEBOOK_KEVIN=y
-CONFIG_SPL_STACK=0xff8effff
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xff8e0000
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_SF_DEFAULT_BUS=1
 CONFIG_DEBUG_UART_BASE=0xff1a0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
-CONFIG_SYS_LOAD_ADDR=0x800800
 CONFIG_DEBUG_UART=y
-# CONFIG_SPL_FIT_SIGNATURE is not set
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_BLOBLIST=y
+# CONFIG_TPL_BLOBLIST is not set
+CONFIG_BLOBLIST_FIXED=y
 CONFIG_BLOBLIST_ADDR=0x100000
 CONFIG_BLOBLIST_SIZE=0x1000
-CONFIG_SPL_MAX_SIZE=0x1e000
+CONFIG_SPL_MAX_SIZE=0x40000
 CONFIG_SPL_PAD_TO=0x7f8000
 CONFIG_HANDOFF=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_TPL=y
+CONFIG_TPL_GPIO=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
@@ -60,7 +51,7 @@ CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_LOG=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ROCKCHIP_GPIO=y
@@ -76,8 +67,8 @@ CONFIG_MMC_PWRSEQ=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
-CONFIG_SF_DEFAULT_BUS=1
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_ETH_DESIGNWARE=y
@@ -86,6 +77,7 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PHY_ROCKCHIP_TYPEC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_CROS_EC=y
diff --git a/config/u-boot/qemu_arm64_12mb/config/default b/config/u-boot/qemu_arm64_12mb/config/default
index 088ba39f..03028c76 100644
--- a/config/u-boot/qemu_arm64_12mb/config/default
+++ b/config/u-boot/qemu_arm64_12mb/config/default
@@ -2,20 +2,21 @@ CONFIG_ARM=y
 CONFIG_POSITION_INDEPENDENT=y
 CONFIG_ARCH_QEMU=y
 CONFIG_SYS_MALLOC_LEN=0x1000000
+CONFIG_BLOBLIST_SIZE_RELOC=0x2000
 CONFIG_NR_DRAM_BANKS=1
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000
 CONFIG_ENV_SIZE=0x40000
 CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DEFAULT_DEVICE_TREE="qemu-arm64"
+CONFIG_SYS_LOAD_ADDR=0x40200000
 CONFIG_DEBUG_UART_BASE=0x9000000
 CONFIG_DEBUG_UART_CLOCK=0
 CONFIG_ARMV8_CRYPTO=y
-CONFIG_SYS_LOAD_ADDR=0x40200000
 CONFIG_ENV_ADDR=0x4000000
 CONFIG_PCI=y
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
+CONFIG_EFI_HTTP_BOOT=y
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
@@ -26,6 +27,7 @@ CONFIG_USE_PREBOOT=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_PCI_INIT_R=y
+CONFIG_BLOBLIST=y
 CONFIG_CMD_SMBIOS=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
@@ -61,6 +63,8 @@ CONFIG_PCIE_ECAM_GENERIC=y
 CONFIG_SCSI=y
 CONFIG_DEBUG_UART_PL011=y
 CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSINFO=y
+CONFIG_SYSINFO_SMBIOS=y
 CONFIG_SYSRESET=y
 CONFIG_SYSRESET_CMD_POWEROFF=y
 CONFIG_SYSRESET_PSCI=y
@@ -68,5 +72,7 @@ CONFIG_TPM2_MMIO=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_PCI=y
 CONFIG_SEMIHOSTING=y
+CONFIG_MBEDTLS_LIB=y
 CONFIG_TPM=y
-CONFIG_EFI_HTTP_BOOT=y
+CONFIG_TPM_PCR_ALLOCATE=y
+CONFIG_GENERATE_SMBIOS_TABLE_VERBOSE=y

From fd56d8ada13b2f73337edd05751467b7e1eb4cc5 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Wed, 23 Apr 2025 22:13:36 +0300
Subject: [PATCH 1261/1549] u-boot: arm64: Merge our modifications into new
 defconfigs

Apply our preserved changes to the new U-Boot defconfigs. Upstream
rearranged memory layouts for Rockchip boards to a unified layout, which
got rid of CUSTOM_SYS_INIT_SP_ADDR and HAS_CUSTOM_SYS_INIT_SP_ADDR, and
will need a change to a related INIT_SP_RELATIVE later.

Normalize the positions of each line in the config by regenerating the
defconfig by `./mk -l u-boot` and then `./mk -s u-boot`, so that the
diff looks all green when we actually expand it to the full config.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 config/u-boot/gru_bob/config/default          | 20 +++++++++++++--
 config/u-boot/gru_bob/config/diffconfig       | 23 -----------------
 config/u-boot/gru_kevin/config/default        | 22 ++++++++++++++--
 config/u-boot/gru_kevin/config/diffconfig     | 25 -------------------
 config/u-boot/qemu_arm64_12mb/config/default  |  5 ++--
 .../u-boot/qemu_arm64_12mb/config/diffconfig  |  5 ----
 6 files changed, 40 insertions(+), 60 deletions(-)
 delete mode 100644 config/u-boot/gru_bob/config/diffconfig
 delete mode 100644 config/u-boot/gru_kevin/config/diffconfig
 delete mode 100644 config/u-boot/qemu_arm64_12mb/config/diffconfig

diff --git a/config/u-boot/gru_bob/config/default b/config/u-boot/gru_bob/config/default
index 5b8c0d35..2979d634 100644
--- a/config/u-boot/gru_bob/config/default
+++ b/config/u-boot/gru_bob/config/default
@@ -1,11 +1,12 @@
 CONFIG_ARM=y
 CONFIG_SKIP_LOWLEVEL_INIT=y
 CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_POSITION_INDEPENDENT=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x18000000
 CONFIG_SPL_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SF_DEFAULT_SPEED=20000000
-CONFIG_ENV_OFFSET=0x3F8000
 CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-bob"
 CONFIG_DM_RESET=y
 CONFIG_ROCKCHIP_RK3399=y
@@ -18,6 +19,10 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_DEBUG_UART=y
+CONFIG_REMAKE_ELF=y
+CONFIG_EFI_VARIABLE_NO_STORE=y
+CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
+CONFIG_USE_PREBOOT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -37,21 +42,25 @@ CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL=y
 CONFIG_TPL_GPIO=y
 CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_BOOTEFI_SELFTEST=y
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_NVEDIT_EFI=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_MMC_SPEED_MODE_SET=y
 CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_EFIDEBUG=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_LOG=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_I2C_CROS_EC_TUNNEL=y
@@ -63,6 +72,10 @@ CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
 CONFIG_MMC_PWRSEQ=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
@@ -106,5 +119,8 @@ CONFIG_VIDEO_ROCKCHIP=y
 CONFIG_VIDEO_ROCKCHIP_MAX_XRES=1280
 CONFIG_VIDEO_ROCKCHIP_MAX_YRES=800
 CONFIG_DISPLAY_ROCKCHIP_EDP=y
+# CONFIG_BINMAN_FDT is not set
+CONFIG_PANIC_HANG=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+# CONFIG_HEXDUMP is not set
diff --git a/config/u-boot/gru_bob/config/diffconfig b/config/u-boot/gru_bob/config/diffconfig
deleted file mode 100644
index 660856dd..00000000
--- a/config/u-boot/gru_bob/config/diffconfig
+++ /dev/null
@@ -1,23 +0,0 @@
--CUSTOM_SYS_INIT_SP_ADDR 0x300000
--ENV_IS_IN_MMC y
--ENV_OFFSET 0x3F8000
--HAS_CUSTOM_SYS_INIT_SP_ADDR y
- TEXT_BASE 0x00200000 -> 0x18000000
-+BINMAN_FDT n
-+BOOTCOMMAND "bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
-+CMD_BOOTEFI_SELFTEST y
-+CMD_BOOTMENU y
-+CMD_EFIDEBUG y
-+CMD_NVEDIT_EFI y
-+EFI_VARIABLE_NO_STORE y
-+HEXDUMP n
-+MMC_HS400_ES_SUPPORT y
-+MMC_HS400_SUPPORT y
-+MMC_IO_VOLTAGE y
-+MMC_SDHCI_SDMA y
-+MMC_SPEED_MODE_SET y
-+MMC_UHS_SUPPORT y
-+PANIC_HANG y
-+POSITION_INDEPENDENT y
-+REMAKE_ELF y
-+USE_PREBOOT y
diff --git a/config/u-boot/gru_kevin/config/default b/config/u-boot/gru_kevin/config/default
index a29a04aa..df3a0747 100644
--- a/config/u-boot/gru_kevin/config/default
+++ b/config/u-boot/gru_kevin/config/default
@@ -1,11 +1,12 @@
 CONFIG_ARM=y
 CONFIG_SKIP_LOWLEVEL_INIT=y
 CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_POSITION_INDEPENDENT=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x18000000
 CONFIG_SPL_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SF_DEFAULT_SPEED=20000000
-CONFIG_ENV_OFFSET=0x3F8000
 CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-kevin"
 CONFIG_DM_RESET=y
 CONFIG_ROCKCHIP_RK3399=y
@@ -19,6 +20,10 @@ CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_DEBUG_UART=y
+CONFIG_REMAKE_ELF=y
+CONFIG_EFI_VARIABLE_NO_STORE=y
+CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
+CONFIG_USE_PREBOOT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -38,21 +43,25 @@ CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_TPL=y
 CONFIG_TPL_GPIO=y
 CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_BOOTEFI_SELFTEST=y
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_NVEDIT_EFI=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_MMC_SPEED_MODE_SET=y
 CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_EFIDEBUG=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_LOG=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_I2C_CROS_EC_TUNNEL=y
@@ -64,6 +73,10 @@ CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
 CONFIG_MMC_PWRSEQ=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
@@ -102,10 +115,15 @@ CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_VIDEO=y
+# CONFIG_VIDEO_FONT_8X16 is not set
+CONFIG_VIDEO_FONT_16X32=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
 CONFIG_VIDEO_ROCKCHIP_MAX_XRES=2400
 CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1600
 CONFIG_DISPLAY_ROCKCHIP_EDP=y
+# CONFIG_BINMAN_FDT is not set
+CONFIG_PANIC_HANG=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
+# CONFIG_HEXDUMP is not set
diff --git a/config/u-boot/gru_kevin/config/diffconfig b/config/u-boot/gru_kevin/config/diffconfig
deleted file mode 100644
index ee3ca1a3..00000000
--- a/config/u-boot/gru_kevin/config/diffconfig
+++ /dev/null
@@ -1,25 +0,0 @@
--CUSTOM_SYS_INIT_SP_ADDR 0x300000
--ENV_IS_IN_MMC y
--ENV_OFFSET 0x3F8000
--HAS_CUSTOM_SYS_INIT_SP_ADDR y
- TEXT_BASE 0x00200000 -> 0x18000000
-+BINMAN_FDT n
-+BOOTCOMMAND "bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
-+CMD_BOOTEFI_SELFTEST y
-+CMD_BOOTMENU y
-+CMD_EFIDEBUG y
-+CMD_NVEDIT_EFI y
-+EFI_VARIABLE_NO_STORE y
-+HEXDUMP n
-+MMC_HS400_ES_SUPPORT y
-+MMC_HS400_SUPPORT y
-+MMC_IO_VOLTAGE y
-+MMC_SDHCI_SDMA y
-+MMC_SPEED_MODE_SET y
-+MMC_UHS_SUPPORT y
-+PANIC_HANG y
-+POSITION_INDEPENDENT y
-+REMAKE_ELF y
-+USE_PREBOOT y
-+VIDEO_FONT_16X32 y
-+VIDEO_FONT_8X16 n
diff --git a/config/u-boot/qemu_arm64_12mb/config/default b/config/u-boot/qemu_arm64_12mb/config/default
index 03028c76..972651b3 100644
--- a/config/u-boot/qemu_arm64_12mb/config/default
+++ b/config/u-boot/qemu_arm64_12mb/config/default
@@ -1,18 +1,17 @@
 CONFIG_ARM=y
 CONFIG_POSITION_INDEPENDENT=y
 CONFIG_ARCH_QEMU=y
+CONFIG_TEXT_BASE=0x50000000
 CONFIG_SYS_MALLOC_LEN=0x1000000
 CONFIG_BLOBLIST_SIZE_RELOC=0x2000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000
 CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DEFAULT_DEVICE_TREE="qemu-arm64"
 CONFIG_SYS_LOAD_ADDR=0x40200000
 CONFIG_DEBUG_UART_BASE=0x9000000
 CONFIG_DEBUG_UART_CLOCK=0
 CONFIG_ARMV8_CRYPTO=y
-CONFIG_ENV_ADDR=0x4000000
 CONFIG_PCI=y
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
@@ -23,6 +22,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_BEST_MATCH=y
 CONFIG_BOOTSTD_FULL=y
 CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
 CONFIG_USE_PREBOOT=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
@@ -38,7 +38,6 @@ CONFIG_CMD_PCI=y
 CONFIG_CMD_EFIDEBUG=y
 CONFIG_CMD_TPM=y
 CONFIG_CMD_MTDPARTS=y
-CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_SCSI_AHCI=y
 CONFIG_AHCI_PCI=y
 CONFIG_DFU_TFTP=y
diff --git a/config/u-boot/qemu_arm64_12mb/config/diffconfig b/config/u-boot/qemu_arm64_12mb/config/diffconfig
deleted file mode 100644
index 447a5ad6..00000000
--- a/config/u-boot/qemu_arm64_12mb/config/diffconfig
+++ /dev/null
@@ -1,5 +0,0 @@
--ENV_ADDR 0x4000000
--ENV_IS_IN_FLASH y
--ENV_SECT_SIZE 0x40000
-+BOOTCOMMAND "bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
-+TEXT_BASE 0x50000000

From 5bea1fade9a1560c603e6f778989ae76c6ee2099 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Wed, 23 Apr 2025 22:17:41 +0300
Subject: [PATCH 1262/1549] u-boot: arm64: Expand our modified defconfigs to
 full configs

Run `./mk -l u-boot` to regenerate full configs from our new defconfigs.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 config/u-boot/gru_bob/config/default         | 2468 ++++++++++++++++++
 config/u-boot/gru_kevin/config/default       | 2465 +++++++++++++++++
 config/u-boot/qemu_arm64_12mb/config/default | 1817 +++++++++++++
 3 files changed, 6750 insertions(+)

diff --git a/config/u-boot/gru_bob/config/default b/config/u-boot/gru_bob/config/default
index 2979d634..552d0542 100644
--- a/config/u-boot/gru_bob/config/default
+++ b/config/u-boot/gru_bob/config/default
@@ -1,126 +1,2594 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# U-Boot 2025.04 Configuration
+#
+
+#
+# Compiler: gcc (Debian 14.2.0-19) 14.2.0
+#
+CONFIG_CREATE_ARCH_SYMLINK=y
+CONFIG_HAVE_SETJMP=y
+CONFIG_SUPPORT_LITTLE_ENDIAN=y
+CONFIG_SYS_CACHE_SHIFT_6=y
+CONFIG_64BIT=y
+CONFIG_SPL_64BIT=y
+CONFIG_SYS_CACHELINE_SIZE=64
+CONFIG_LINKER_LIST_ALIGN=8
+# CONFIG_ARC is not set
 CONFIG_ARM=y
+# CONFIG_M68K is not set
+# CONFIG_MICROBLAZE is not set
+# CONFIG_MIPS is not set
+# CONFIG_NIOS2 is not set
+# CONFIG_PPC is not set
+# CONFIG_RISCV is not set
+# CONFIG_SANDBOX is not set
+# CONFIG_SH is not set
+# CONFIG_X86 is not set
+# CONFIG_XTENSA is not set
+CONFIG_SYS_ARCH="arm"
+CONFIG_SYS_CPU="armv8"
+CONFIG_SYS_SOC="rk3399"
+CONFIG_SYS_VENDOR="google"
+CONFIG_SYS_BOARD="gru"
+CONFIG_SYS_CONFIG_NAME="gru"
+
+#
+# Skipping low level initialization functions
+#
 CONFIG_SKIP_LOWLEVEL_INIT=y
+# CONFIG_SPL_SKIP_LOWLEVEL_INIT is not set
+# CONFIG_TPL_SKIP_LOWLEVEL_INIT is not set
+# CONFIG_SKIP_LOWLEVEL_INIT_ONLY is not set
+# CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY is not set
+# CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY is not set
+# CONFIG_SYS_ICACHE_OFF is not set
+# CONFIG_SPL_SYS_ICACHE_OFF is not set
+# CONFIG_SYS_DCACHE_OFF is not set
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
+
+#
+# ARM architecture
+#
+CONFIG_ARM64=y
+CONFIG_ARM64_CRC32=y
 CONFIG_COUNTER_FREQUENCY=24000000
 CONFIG_POSITION_INDEPENDENT=y
+CONFIG_INIT_SP_RELATIVE=y
+CONFIG_SYS_INIT_SP_BSS_OFFSET=524288
+CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE=0x18000000
+# CONFIG_DRIVER_GICV2 is not set
+# CONFIG_GIC_V3_ITS is not set
+# CONFIG_GICV3_SUPPORT_GIC600 is not set
+CONFIG_STATIC_RELA=y
+CONFIG_DMA_ADDR_T_64BIT=y
+CONFIG_ARM_ASM_UNIFIED=y
+# CONFIG_SYS_ARM_CACHE_CP15 is not set
+# CONFIG_SYS_ARM_MMU is not set
+# CONFIG_SYS_ARM_MPU is not set
+CONFIG_SYS_ARM_ARCH=8
+CONFIG_SYS_ARM_CACHE_WRITEBACK=y
+# CONFIG_SYS_ARM_CACHE_WRITETHROUGH is not set
+# CONFIG_SYS_ARM_CACHE_WRITEALLOC is not set
+# CONFIG_ARCH_CPU_INIT is not set
+CONFIG_SYS_ARCH_TIMER=y
+CONFIG_ARM_SMCCC=y
+# CONFIG_SYS_L2_PL310 is not set
+# CONFIG_SPL_SYS_L2_PL310 is not set
+# CONFIG_SYS_L2CACHE_OFF is not set
+CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+# CONFIG_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_TPL_USE_ARCH_MEMCPY is not set
+# CONFIG_USE_ARCH_MEMSET is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
+# CONFIG_TPL_USE_ARCH_MEMSET is not set
+CONFIG_ARM64_SUPPORT_AARCH32=y
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_HISTB is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_MVEBU is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_BCM283X is not set
+# CONFIG_ARCH_BCMSTB is not set
+# CONFIG_ARCH_BCMBCA is not set
+# CONFIG_TARGET_VEXPRESS_CA9X4 is not set
+# CONFIG_TARGET_BCMNS is not set
+# CONFIG_TARGET_BCMNS3 is not set
+# CONFIG_ARCH_EXYNOS is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_HIGHBANK is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_IPQ40XX is not set
+# CONFIG_ARCH_KEYSTONE is not set
+# CONFIG_ARCH_K3 is not set
+# CONFIG_ARCH_OMAP2PLUS is not set
+# CONFIG_ARCH_MESON is not set
+# CONFIG_ARCH_MEDIATEK is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_LPC32XX is not set
+# CONFIG_ARCH_IMX8 is not set
+# CONFIG_ARCH_IMX8M is not set
+# CONFIG_ARCH_IMX8ULP is not set
+# CONFIG_ARCH_IMX9 is not set
+# CONFIG_ARCH_IMXRT is not set
+# CONFIG_ARCH_MX23 is not set
+# CONFIG_ARCH_MX28 is not set
+# CONFIG_ARCH_MX31 is not set
+# CONFIG_ARCH_MX7ULP is not set
+# CONFIG_ARCH_MX7 is not set
+# CONFIG_ARCH_MX6 is not set
+# CONFIG_ARCH_MX5 is not set
+# CONFIG_ARCH_NEXELL is not set
+# CONFIG_ARCH_NPCM is not set
+# CONFIG_ARCH_APPLE is not set
+# CONFIG_ARCH_OWL is not set
+# CONFIG_ARCH_QEMU is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_SNAPDRAGON is not set
+# CONFIG_ARCH_SOCFPGA is not set
+# CONFIG_ARCH_SUNXI is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_VERSAL is not set
+# CONFIG_ARCH_VERSAL2 is not set
+# CONFIG_ARCH_VERSAL_NET is not set
+# CONFIG_ARCH_VF610 is not set
+# CONFIG_ARCH_ZYNQ is not set
+# CONFIG_ARCH_ZYNQMP_R5 is not set
+# CONFIG_ARCH_ZYNQMP is not set
+# CONFIG_ARCH_TEGRA is not set
+# CONFIG_ARCH_VEXPRESS64 is not set
+# CONFIG_TARGET_CORSTONE1000 is not set
+# CONFIG_TARGET_TOTAL_COMPUTE is not set
+# CONFIG_TARGET_LS2080A_EMU is not set
+# CONFIG_TARGET_LS1088AQDS is not set
+# CONFIG_TARGET_LS2080AQDS is not set
+# CONFIG_TARGET_LS2080ARDB is not set
+# CONFIG_TARGET_LS2081ARDB is not set
+# CONFIG_TARGET_LX2160ARDB is not set
+# CONFIG_TARGET_LX2160AQDS is not set
+# CONFIG_TARGET_LX2162AQDS is not set
+# CONFIG_TARGET_HIKEY is not set
+# CONFIG_TARGET_HIKEY960 is not set
+# CONFIG_TARGET_POPLAR is not set
+# CONFIG_TARGET_LS1012AQDS is not set
+# CONFIG_TARGET_LS1012ARDB is not set
+# CONFIG_TARGET_LS1012A2G5RDB is not set
+# CONFIG_TARGET_LS1012AFRWY is not set
+# CONFIG_TARGET_LS1012AFRDM is not set
+# CONFIG_TARGET_LS1028AQDS is not set
+# CONFIG_TARGET_LS1028ARDB is not set
+# CONFIG_TARGET_LS1088ARDB is not set
+# CONFIG_TARGET_LS1021AQDS is not set
+# CONFIG_TARGET_LS1021ATWR is not set
+# CONFIG_TARGET_PG_WCOM_SELI8 is not set
+# CONFIG_TARGET_PG_WCOM_EXPU1 is not set
+# CONFIG_TARGET_LS1021ATSN is not set
+# CONFIG_TARGET_LS1021AIOT is not set
+# CONFIG_TARGET_LS1043AQDS is not set
+# CONFIG_TARGET_LS1043ARDB is not set
+# CONFIG_TARGET_LS1046AQDS is not set
+# CONFIG_TARGET_LS1046ARDB is not set
+# CONFIG_TARGET_LS1046AFRWY is not set
+# CONFIG_ARCH_SC5XX is not set
+# CONFIG_TARGET_SL28 is not set
+# CONFIG_TARGET_TEN64 is not set
+# CONFIG_ARCH_UNIPHIER is not set
+# CONFIG_ARCH_SYNQUACER is not set
+# CONFIG_ARCH_STM32 is not set
+# CONFIG_ARCH_STI is not set
+# CONFIG_ARCH_STM32MP is not set
 CONFIG_ARCH_ROCKCHIP=y
+# CONFIG_ARCH_OCTEONTX is not set
+# CONFIG_ARCH_OCTEONTX2 is not set
+# CONFIG_TARGET_THUNDERX_88XX is not set
+# CONFIG_ARCH_ASPEED is not set
+# CONFIG_TARGET_DURIAN is not set
+# CONFIG_TARGET_POMELO is not set
+# CONFIG_TARGET_PE2201 is not set
+# CONFIG_TARGET_PRESIDIO_ASIC is not set
+# CONFIG_TARGET_XENGUEST_ARM64 is not set
+# CONFIG_ARCH_GXP is not set
 CONFIG_TEXT_BASE=0x18000000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x10000
+CONFIG_BLOBLIST_SIZE_RELOC=0x1000
 CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL_LDSCRIPT="arch/arm/cpu/armv8/u-boot-spl.lds"
+CONFIG_ENV_SOURCE_FILE=""
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x3f00000
 CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_SF_DEFAULT_MODE=0x0
+CONFIG_ENV_SIZE=0x1f000
+CONFIG_DM_GPIO=y
+CONFIG_SPL_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-bob"
+CONFIG_DDR_SI_TEST=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
 CONFIG_DM_RESET=y
+CONFIG_SYS_MONITOR_LEN=0
+# CONFIG_ROCKCHIP_PX30 is not set
+# CONFIG_ROCKCHIP_RK3036 is not set
+# CONFIG_ROCKCHIP_RK3066 is not set
+# CONFIG_ROCKCHIP_RK3128 is not set
+# CONFIG_ROCKCHIP_RK3188 is not set
+# CONFIG_ROCKCHIP_RK322X is not set
+# CONFIG_ROCKCHIP_RK3288 is not set
+# CONFIG_ROCKCHIP_RK3308 is not set
+# CONFIG_ROCKCHIP_RK3328 is not set
+# CONFIG_ROCKCHIP_RK3368 is not set
 CONFIG_ROCKCHIP_RK3399=y
+# CONFIG_ROCKCHIP_RK3568 is not set
+# CONFIG_ROCKCHIP_RK3588 is not set
+# CONFIG_ROCKCHIP_RV1108 is not set
+# CONFIG_ROCKCHIP_RV1126 is not set
+# CONFIG_ROCKCHIP_USB_UART is not set
+# CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
+# CONFIG_ROCKCHIP_EXTERNAL_TPL is not set
 CONFIG_ROCKCHIP_BOOT_MODE_REG=0
+# CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON is not set
+CONFIG_ROCKCHIP_STIMER=y
+CONFIG_ROCKCHIP_STIMER_BASE=0xff8680a0
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_BROM_HELPER=y
+# CONFIG_SPL_ROCKCHIP_EARLYRETURN_TO_BROM is not set
+CONFIG_ROCKCHIP_DISABLE_FORCE_JTAG=y
+# CONFIG_TPL_ROCKCHIP_EARLYRETURN_TO_BROM is not set
 # CONFIG_SPL_MMC is not set
+CONFIG_ROCKCHIP_SPI_IMAGE=y
+CONFIG_ROCKCHIP_COMMON_STACK_ADDR=y
+CONFIG_SPL_SERIAL=y
+CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
+CONFIG_TPL_TEXT_BASE=0xff8c2000
+CONFIG_TPL_STACK=0xff8effff
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x4000
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL=y
+# CONFIG_SPL_DRIVERS_MISC is not set
+CONFIG_SPL_STACK_R_ADDR=0x3e00000
+CONFIG_TARGET_CHROMEBOOK_BOB=y
+# CONFIG_TARGET_CHROMEBOOK_KEVIN is not set
+# CONFIG_TARGET_EVB_RK3399 is not set
+# CONFIG_TARGET_PINEBOOK_PRO_RK3399 is not set
+# CONFIG_TARGET_PINEPHONE_PRO_RK3399 is not set
+# CONFIG_TARGET_PUMA_RK3399 is not set
+# CONFIG_TARGET_ROCK960_RK3399 is not set
+# CONFIG_TARGET_ROCKPI4_RK3399 is not set
+# CONFIG_TARGET_ROCKPRO64_RK3399 is not set
+# CONFIG_TARGET_ROC_PC_RK3399 is not set
+CONFIG_TPL_SYS_MALLOC_F=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL_TEXT_BASE=0x0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x3f80000
+CONFIG_SPL_BSS_MAX_SIZE=0x8000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
+CONFIG_SYS_BOOTM_LEN=0x4000000
 CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
+CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff
 CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SF_DEFAULT_CS=0
+CONFIG_SPL_SYS_MALLOC_F=y
+CONFIG_ERR_PTR_OFFSET=0x0
+CONFIG_SPL_SIZE_LIMIT=0x0
+CONFIG_SPL=y
+CONFIG_PRE_CON_BUF_ADDR=0x0f200000
+CONFIG_PRE_CON_BUF_SZ=4096
 CONFIG_DEBUG_UART_BASE=0xff1a0000
 CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_IDENT_STRING=""
+CONFIG_SYS_CLK_FREQ=0
+# CONFIG_CHIP_DIP_SCAN is not set
+# CONFIG_SPL_FS_FAT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
+# CONFIG_CMO_BY_VA_ONLY is not set
+# CONFIG_ARMV8_SPL_EXCEPTION_VECTORS is not set
+# CONFIG_ARMV8_MULTIENTRY is not set
+CONFIG_ARMV8_SET_SMPEN=y
+# CONFIG_ARMV8_SWITCH_TO_EL1 is not set
+
+#
+# ARMv8 secure monitor firmware
+#
+# CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT is not set
+# CONFIG_SPL_ARMV8_SEC_FIRMWARE_SUPPORT is not set
+# CONFIG_SPL_RECOVER_DATA_SECTION is not set
+CONFIG_PSCI_RESET=y
+# CONFIG_ARMV8_PSCI is not set
+# CONFIG_ARMV8_EA_EL3_FIRST is not set
+# CONFIG_ARMV8_UDELAY_EVENT_STREAM is not set
+CONFIG_ARMV8_CRYPTO=y
+CONFIG_ARMV8_CE_SHA1=y
+CONFIG_ARMV8_CE_SHA256=y
+CONFIG_SYS_MEM_TOP_HIDE=0x0
+
+#
+# ARM debug
+#
+CONFIG_TPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAYLOAD="tpl/u-boot-with-tpl.bin"
+CONFIG_BUILD_TARGET=""
+# CONFIG_PCI is not set
+CONFIG_FWU_NUM_BANKS=2
+CONFIG_FWU_NUM_IMAGES_PER_BANK=2
+CONFIG_TPL_SIZE_LIMIT=0x0
 CONFIG_DEBUG_UART=y
+# CONFIG_AHCI is not set
+# CONFIG_OF_BOARD_FIXUP is not set
+
+#
+# Functionality shared between NXP SoCs
+#
+# CONFIG_NXP_ESBC is not set
+CONFIG_SYS_LITTLE_ENDIAN=y
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_CC_IS_GCC=y
+CONFIG_GCC_VERSION=140200
+CONFIG_CLANG_VERSION=0
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+# CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
+# CONFIG_CC_OPTIMIZE_FOR_DEBUG is not set
+# CONFIG_OPTIMIZE_INLINING is not set
+# CONFIG_SPL_OPTIMIZE_INLINING is not set
+CONFIG_ARCH_SUPPORTS_LTO=y
+# CONFIG_LTO is not set
+# CONFIG_TPL_OPTIMIZE_INLINING is not set
+CONFIG_CC_HAS_ASM_INLINE=y
+# CONFIG_XEN is not set
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+# CONFIG_SYS_BOOT_GET_CMDLINE is not set
+# CONFIG_SYS_BOOT_GET_KBD is not set
+CONFIG_SYS_MALLOC_F=y
+# CONFIG_VALGRIND is not set
+CONFIG_EXPERT=y
+CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y
+CONFIG_SPL_SYS_MALLOC_CLEAR_ON_INIT=y
+# CONFIG_SYS_MALLOC_DEFAULT_TO_INIT is not set
+# CONFIG_TOOLS_DEBUG is not set
+CONFIG_PHYS_64BIT=y
+CONFIG_FDT_64BIT=y
+CONFIG_HAS_ROM=y
+CONFIG_SPL_IMAGE="spl/u-boot-spl.bin"
 CONFIG_REMAKE_ELF=y
+# CONFIG_HAS_BOARD_SIZE_LIMIT is not set
+# CONFIG_SYS_CUSTOM_LDSCRIPT is not set
+CONFIG_PLATFORM_ELFENTRY="_start"
+CONFIG_STACK_SIZE=0x1000000
+# CONFIG_MP is not set
+CONFIG_HAVE_TEXT_BASE=y
+# CONFIG_HAVE_SYS_UBOOT_START is not set
+CONFIG_SYS_UBOOT_START=0x18000000
+# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
+# CONFIG_API is not set
+
+#
+# Boot options
+#
+
+#
+# UEFI Support
+#
+CONFIG_EFI_LOADER=y
+CONFIG_EFI_BINARY_EXEC=y
+# CONFIG_EFI_SECURE_BOOT is not set
+
+#
+# UEFI services
+#
+CONFIG_EFI_HAVE_RUNTIME_RESET=y
+
+#
+# UEFI Variables
+#
+# CONFIG_EFI_VARIABLE_FILE_STORE is not set
 CONFIG_EFI_VARIABLE_NO_STORE=y
+# CONFIG_EFI_VARIABLES_PRESEED is not set
+CONFIG_EFI_VAR_BUF_SIZE=131072
+CONFIG_EFI_PLATFORM_LANG_CODES="en-US"
+
+#
+# Capsule support
+#
+# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
+# CONFIG_EFI_CAPSULE_ON_DISK is not set
+CONFIG_EFI_CAPSULE_MAX=15
+
+#
+# UEFI protocol support
+#
+CONFIG_EFI_DEVICE_PATH_TO_TEXT=y
+CONFIG_EFI_DEVICE_PATH_UTIL=y
+CONFIG_EFI_DT_FIXUP=y
+CONFIG_EFI_LOADER_HII=y
+CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y
+CONFIG_EFI_UNICODE_CAPITALIZATION=y
+CONFIG_EFI_RNG_PROTOCOL=y
+CONFIG_EFI_LOAD_FILE2_INITRD=y
+# CONFIG_EFI_IP4_CONFIG2_PROTOCOL is not set
+
+#
+# Misc options
+#
+# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set
+CONFIG_EFI_ECPT=y
+CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
+# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
+
+#
+# EFI bootmanager
+#
+CONFIG_EFI_BOOTMGR=y
+# CONFIG_EFI_HTTP_BOOT is not set
+CONFIG_BOOTEFI_HELLO_COMPILE=y
+CONFIG_BOOTEFI_TESTAPP_COMPILE=y
+
+#
+# Boot images
+#
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+# CONFIG_TIMESTAMP is not set
+CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x0
+CONFIG_FIT_FULL_CHECK=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_SIGNATURE_MAX_SIZE=0x10000000
+# CONFIG_FIT_RSASSA_PSS is not set
+# CONFIG_FIT_CIPHER is not set
+# CONFIG_FIT_VERBOSE is not set
+# CONFIG_FIT_BEST_MATCH is not set
+CONFIG_FIT_PRINT=y
+CONFIG_SPL_FIT=y
+# CONFIG_TPL_FIT is not set
+# CONFIG_SPL_FIT_PRINT is not set
+CONFIG_SPL_FIT_FULL_CHECK=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_FIT_SIGNATURE_MAX_SIZE=0x10000000
+# CONFIG_SPL_FIT_RSASSA_PSS is not set
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x0
+# CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY is not set
+# CONFIG_SPL_LOAD_FIT_FULL is not set
+# CONFIG_TPL_LOAD_FIT is not set
+# CONFIG_SPL_FIT_IMAGE_POST_PROCESS is not set
+CONFIG_PXE_UTILS=y
+CONFIG_BOOT_DEFAULTS_FEATURES=y
+CONFIG_BOOT_DEFAULTS_CMDS=y
+CONFIG_BOOT_DEFAULTS=y
+CONFIG_BOOTSTD=y
+# CONFIG_SPL_BOOTSTD is not set
+CONFIG_BOOTSTD_FULL=y
+CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_BOOTSTD_BOOTCOMMAND=y
+CONFIG_BOOTSTD_MENU=y
+CONFIG_BOOTMETH_GLOBAL=y
+# CONFIG_BOOTMETH_ANDROID is not set
+# CONFIG_BOOTMETH_CROS is not set
+CONFIG_BOOTMETH_EXTLINUX=y
+CONFIG_BOOTMETH_EXTLINUX_PXE=y
+CONFIG_BOOTMETH_EFILOADER=y
+CONFIG_BOOTMETH_EFI_BOOTMGR=y
+CONFIG_BOOTMETH_VBE=y
+CONFIG_BOOTMETH_DISTRO=y
+# CONFIG_SPL_BOOTMETH_VBE is not set
+CONFIG_TPL_BOOTMETH_VBE=y
+CONFIG_BOOTMETH_VBE_REQUEST=y
+# CONFIG_SPL_BOOTMETH_VBE_REQUEST is not set
+CONFIG_BOOTMETH_VBE_SIMPLE=y
+# CONFIG_BOOTMETH_VBE_ABREC is not set
+CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
+# CONFIG_SPL_BOOTMETH_VBE_SIMPLE is not set
+CONFIG_EXPO=y
+CONFIG_BOOTMETH_SCRIPT=y
+# CONFIG_UPL is not set
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_SUPPORT_RAW_INITRD=y
+# CONFIG_CHROMEOS is not set
+# CONFIG_CHROMEOS_VBOOT is not set
+# CONFIG_RAMBOOT_PBL is not set
+CONFIG_SYS_BOOT_RAMDISK_HIGH=y
+# CONFIG_DISTRO_DEFAULTS is not set
+
+#
+# Boot timing
+#
+# CONFIG_BOOTSTAGE is not set
+# CONFIG_SHOW_BOOT_PROGRESS is not set
+# CONFIG_SPL_SHOW_BOOT_PROGRESS is not set
+
+#
+# Boot media
+#
+# CONFIG_NAND_BOOT is not set
+# CONFIG_ONENAND_BOOT is not set
+# CONFIG_QSPI_BOOT is not set
+# CONFIG_SATA_BOOT is not set
+# CONFIG_SD_BOOT is not set
+# CONFIG_SD_BOOT_QSPI is not set
+# CONFIG_SPI_BOOT is not set
+
+#
+# Autoboot options
+#
+CONFIG_AUTOBOOT=y
+CONFIG_BOOTDELAY=2
+# CONFIG_AUTOBOOT_KEYED is not set
+# CONFIG_AUTOBOOT_USE_MENUKEY is not set
+# CONFIG_AUTOBOOT_MENU_SHOW is not set
+# CONFIG_BOOT_RETRY is not set
+
+#
+# Image support
+#
+# CONFIG_IMAGE_PRE_LOAD is not set
+
+#
+# Devicetree fixup
+#
+# CONFIG_OF_ENV_SETUP is not set
+# CONFIG_OF_BOARD_SETUP is not set
+# CONFIG_OF_SYSTEM_SETUP is not set
+# CONFIG_OF_STDOUT_VIA_ALIAS is not set
+# CONFIG_FDT_FIXUP_PARTITIONS is not set
+# CONFIG_FDT_SIMPLEFB is not set
+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
+# CONFIG_USE_BOOTARGS is not set
+# CONFIG_BOOTARGS_SUBST is not set
+CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
 CONFIG_USE_PREBOOT=y
+CONFIG_PREBOOT="usb start"
+CONFIG_PREBOOT_DEFINED=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
+# CONFIG_SAVE_PREV_BL_FDT_ADDR is not set
+# CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR is not set
+
+#
+# Configuration editor
+#
+# CONFIG_CEDIT is not set
+
+#
+# Console
+#
+CONFIG_MENU=y
+# CONFIG_CONSOLE_RECORD is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1044
+# CONFIG_DISABLE_CONSOLE is not set
+CONFIG_LOGLEVEL=4
+CONFIG_SPL_LOGLEVEL=4
+CONFIG_TPL_LOGLEVEL=4
+# CONFIG_SILENT_CONSOLE is not set
+# CONFIG_SPL_SILENT_CONSOLE is not set
+# CONFIG_TPL_SILENT_CONSOLE is not set
+CONFIG_PRE_CONSOLE_BUFFER=y
+CONFIG_CONSOLE_FLUSH_SUPPORT=y
+# CONFIG_CONSOLE_FLUSH_ON_NEWLINE is not set
+CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
+# CONFIG_SYS_CONSOLE_ENV_OVERWRITE is not set
+# CONFIG_SYS_CONSOLE_INFO_QUIET is not set
+CONFIG_SYS_STDIO_DEREGISTER=y
+# CONFIG_SPL_SYS_STDIO_DEREGISTER is not set
+CONFIG_SYS_DEVICE_NULLDEV=y
+
+#
+# Logging
+#
+CONFIG_LOG=y
+CONFIG_LOG_MAX_LEVEL=6
+CONFIG_LOG_DEFAULT_LEVEL=6
+CONFIG_LOG_CONSOLE=y
+# CONFIG_LOGF_FILE is not set
+# CONFIG_LOGF_LINE is not set
+# CONFIG_LOGF_FUNC is not set
+CONFIG_LOGF_FUNC_PAD=20
+# CONFIG_LOG_SYSLOG is not set
+# CONFIG_SPL_LOG is not set
+# CONFIG_TPL_LOG is not set
+# CONFIG_LOG_ERROR_RETURN is not set
+
+#
+# Init options
+#
+# CONFIG_BOARD_TYPES is not set
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
+
+#
+# Start-up hooks
+#
+CONFIG_CYCLIC=y
+# CONFIG_SPL_CYCLIC is not set
+CONFIG_CYCLIC_MAX_CPU_TIME_US=5000
+CONFIG_EVENT=y
+CONFIG_EVENT_DYNAMIC=y
+# CONFIG_EVENT_DEBUG is not set
+# CONFIG_ARCH_MISC_INIT is not set
+# CONFIG_BOARD_EARLY_INIT_F is not set
 CONFIG_BOARD_EARLY_INIT_R=y
+# CONFIG_BOARD_POSTCLK_INIT is not set
+CONFIG_BOARD_LATE_INIT=y
+# CONFIG_CLOCKS is not set
+# CONFIG_HWCONFIG is not set
+CONFIG_LAST_STAGE_INIT=y
+CONFIG_MISC_INIT_R=y
+# CONFIG_SYS_MALLOC_BOOTPARAMS is not set
+# CONFIG_ID_EEPROM is not set
+# CONFIG_RESET_PHY_R is not set
+
+#
+# Security support
+#
+CONFIG_HASH=y
+# CONFIG_HASH_CRC8 is not set
+CONFIG_SPL_HASH=y
+# CONFIG_STACKPROTECTOR is not set
+# CONFIG_BOARD_RNG_SEED is not set
+
+#
+# Update support
+#
+# CONFIG_UPDATE_TFTP is not set
+# CONFIG_ANDROID_AB is not set
+
+#
+# Blob list
+#
 CONFIG_BLOBLIST=y
+CONFIG_SPL_BLOBLIST=y
 # CONFIG_TPL_BLOBLIST is not set
 CONFIG_BLOBLIST_FIXED=y
+# CONFIG_BLOBLIST_ALLOC is not set
 CONFIG_BLOBLIST_ADDR=0x100000
 CONFIG_BLOBLIST_SIZE=0x1000
+CONFIG_SPL_BLOBLIST_FIXED=y
+# CONFIG_SPL_BLOBLIST_ALLOC is not set
+CONFIG_SUPPORT_SPL=y
+CONFIG_SUPPORT_TPL=y
+
+#
+# SPL configuration options
+#
+CONFIG_SPL_FRAMEWORK=y
+# CONFIG_SPL_FRAMEWORK_BOARD_INIT_F is not set
 CONFIG_SPL_MAX_SIZE=0x40000
 CONFIG_SPL_PAD_TO=0x7f8000
+# CONFIG_SPL_NO_BSS_LIMIT is not set
+CONFIG_SPL_BSS_LIMIT=y
+# CONFIG_SPL_FOOTPRINT_LIMIT is not set
+CONFIG_SPL_SYS_STACK_F_CHECK_BYTE=0xaa
+# CONFIG_SPL_SYS_REPORT_STACK_F_USAGE is not set
+# CONFIG_SPL_SHOW_ERRORS is not set
+CONFIG_SPL_BINMAN_SYMBOLS=y
+CONFIG_SPL_BINMAN_UBOOT_SYMBOLS=y
 CONFIG_HANDOFF=y
+CONFIG_SPL_HANDOFF=y
+# CONFIG_SPL_SOC_INIT is not set
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_LOAD_BLOCK=y
+# CONFIG_SPL_BOOTROM_SUPPORT is not set
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
+# CONFIG_SPL_LOAD_IMX_CONTAINER is not set
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_SHARES_INIT_SP_ADDR=y
+CONFIG_SPL_SEPARATE_BSS=y
+# CONFIG_SPL_SYS_MALLOC is not set
+CONFIG_SPL_BANNER_PRINT=y
+# CONFIG_SPL_DISPLAY_PRINT is not set
+CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE is not set
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x0
+# CONFIG_SPL_FIT_IMAGE_TINY is not set
+# CONFIG_SPL_CACHE is not set
+# CONFIG_SPL_CPU is not set
+CONFIG_SPL_CRYPTO=y
+# CONFIG_SPL_DMA is not set
+# CONFIG_SPL_ENV_SUPPORT is not set
+# CONFIG_SPL_FS_EXT4 is not set
+# CONFIG_SPL_FS_SQUASHFS is not set
+# CONFIG_SPL_FAT_WRITE is not set
+# CONFIG_SPL_FPGA is not set
+# CONFIG_SPL_I2C is not set
+# CONFIG_SPL_DM_MAILBOX is not set
+# CONFIG_SPL_MEMORY is not set
+# CONFIG_SPL_MPC8XXX_INIT_DDR is not set
+# CONFIG_SPL_MTD is not set
+# CONFIG_SPL_MUSB_NEW is not set
+# CONFIG_SPL_NAND_SUPPORT is not set
+# CONFIG_SPL_NAND_DRIVERS is not set
+# CONFIG_SPL_NAND_ECC is not set
+# CONFIG_SPL_NAND_SIMPLE is not set
+# CONFIG_SPL_RELOC_LOADER is not set
+# CONFIG_SPL_UBI is not set
+CONFIG_SPL_DM_SPI_FLASH=y
+# CONFIG_SPL_NET is not set
+# CONFIG_SPL_NOR_SUPPORT is not set
+# CONFIG_SPL_XIP_SUPPORT is not set
+# CONFIG_SPL_ONENAND_SUPPORT is not set
+# CONFIG_SPL_OS_BOOT is not set
+# CONFIG_SPL_PCI is not set
+# CONFIG_SPL_PCH is not set
+# CONFIG_SPL_POST_MEM_SUPPORT is not set
+# CONFIG_SPL_DM_RESET is not set
+# CONFIG_SPL_POWER is not set
+# CONFIG_SPL_POWER_DOMAIN is not set
+# CONFIG_SPL_RAM_DEVICE is not set
+# CONFIG_SPL_REMOTEPROC is not set
+# CONFIG_SPL_RTC is not set
+# CONFIG_SPL_SATA is not set
+# CONFIG_SPL_NVME is not set
+CONFIG_SPL_SPI_FLASH_TINY=y
+# CONFIG_SPL_SPI_FLASH_MTD is not set
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000
+# CONFIG_SPL_THERMAL is not set
+# CONFIG_SPL_WATCHDOG is not set
+# CONFIG_SPL_YMODEM_SUPPORT is not set
+CONFIG_SPL_ATF=y
+# CONFIG_SPL_ATF_LOAD_IMAGE_V2 is not set
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+# CONFIG_SPL_OPTEE_IMAGE is not set
+CONFIG_SPL_TARGET=""
 CONFIG_TPL=y
+
+#
+# TPL configuration options
+#
+CONFIG_TPL_BINMAN_SYMBOLS=y
+CONFIG_TPL_BINMAN_UBOOT_SYMBOLS=y
+CONFIG_TPL_FRAMEWORK=y
+CONFIG_TPL_BANNER_PRINT=y
+# CONFIG_TPL_BOARD_INIT is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_TPL_SEPARATE_BSS=y
+CONFIG_TPL_NEEDS_SEPARATE_STACK=y
+# CONFIG_TPL_POWER is not set
+CONFIG_TPL_BOOTROM_SUPPORT=y
+# CONFIG_TPL_CRC32 is not set
+# CONFIG_TPL_DRIVERS_MISC is not set
+# CONFIG_TPL_ENV_SUPPORT is not set
 CONFIG_TPL_GPIO=y
+# CONFIG_TPL_I2C is not set
+# CONFIG_TPL_MPC8XXX_INIT_DDR is not set
+# CONFIG_TPL_MMC is not set
+# CONFIG_TPL_NAND_SUPPORT is not set
+# CONFIG_TPL_PCI is not set
+# CONFIG_TPL_PCH is not set
+# CONFIG_TPL_RAM_SUPPORT is not set
+# CONFIG_TPL_RELOC_LOADER is not set
+# CONFIG_TPL_RTC is not set
+# CONFIG_TPL_SPI_FLASH_SUPPORT is not set
+# CONFIG_TPL_SPI is not set
+# CONFIG_TPL_DM_SPI is not set
+# CONFIG_TPL_DM_SPI_FLASH is not set
+# CONFIG_TPL_YMODEM_SUPPORT is not set
+# CONFIG_VPL is not set
+CONFIG_IMAGE_SIGN_INFO=y
+CONFIG_SPL_IMAGE_SIGN_INFO=y
+CONFIG_CMDLINE=y
+CONFIG_HUSH_PARSER=y
+
+#
+# Hush flavor to use
+#
+CONFIG_HUSH_OLD_PARSER=y
+# CONFIG_HUSH_MODERN_PARSER is not set
+CONFIG_CMDLINE_EDITING=y
+# CONFIG_CMDLINE_PS_SUPPORT is not set
+CONFIG_AUTO_COMPLETE=y
+CONFIG_SYS_LONGHELP=y
+CONFIG_SYS_PROMPT="=> "
+CONFIG_SYS_PROMPT_HUSH_PS2="> "
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_XTRACE=y
+
+#
+# Commands
+#
+
+#
+# Info commands
+#
+CONFIG_CMD_BDI=y
+# CONFIG_CMD_BDINFO_EXTRA is not set
+# CONFIG_CMD_CONFIG is not set
+CONFIG_CMD_CONSOLE=y
+# CONFIG_CMD_UFETCH is not set
+# CONFIG_CMD_HISTORY is not set
+# CONFIG_CMD_LICENSE is not set
+# CONFIG_CMD_PMC is not set
+# CONFIG_CMD_SMBIOS is not set
+
+#
+# Boot commands
+#
+CONFIG_CMD_BOOTD=y
+CONFIG_CMD_BOOTM=y
+CONFIG_CMD_BOOTDEV=y
+CONFIG_CMD_BOOTFLOW=y
+CONFIG_CMD_BOOTFLOW_FULL=y
+CONFIG_CMD_BOOTFLOW_BOOTDELAY=30
+CONFIG_CMD_BOOTMETH=y
+CONFIG_CMD_BOOTSTD=y
+CONFIG_BOOTM_EFI=y
+CONFIG_BOOTM_ELF=y
 CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_BOOTI=y
+CONFIG_BOOTM_LINUX=y
+CONFIG_BOOTM_NETBSD=y
+# CONFIG_BOOTM_OPENRTOS is not set
+# CONFIG_BOOTM_OSE is not set
+CONFIG_BOOTM_PLAN9=y
+CONFIG_BOOTM_RTEMS=y
+# CONFIG_CMD_UPL is not set
+CONFIG_CMD_VBE=y
+CONFIG_BOOTM_VXWORKS=y
+CONFIG_CMD_BOOTEFI=y
+CONFIG_CMD_BOOTEFI_BINARY=y
+CONFIG_CMD_BOOTEFI_BOOTMGR=y
+CONFIG_CMD_BOOTEFI_HELLO=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 CONFIG_CMD_BOOTMENU=y
+# CONFIG_CMD_ADTIMG is not set
+CONFIG_CMD_ELF=y
+CONFIG_CMD_ELF_BOOTVX=y
+# CONFIG_CMD_ELF_FDT_SETUP is not set
+CONFIG_CMD_FDT=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RUN=y
+CONFIG_CMD_IMI=y
+CONFIG_CMD_XIMG=y
+CONFIG_SYS_XIMG_LEN=0x800000
+# CONFIG_CMD_SPL is not set
+
+#
+# Environment commands
+#
+# CONFIG_CMD_ASKENV is not set
+CONFIG_CMD_EXPORTENV=y
+CONFIG_CMD_IMPORTENV=y
+CONFIG_CMD_EDITENV=y
+# CONFIG_CMD_GREPENV is not set
+CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_ERASEENV is not set
+CONFIG_CMD_ENV_EXISTS=y
+# CONFIG_CMD_ENV_CALLBACK is not set
+# CONFIG_CMD_ENV_FLAGS is not set
 CONFIG_CMD_NVEDIT_EFI=y
+# CONFIG_CMD_NVEDIT_INDIRECT is not set
+# CONFIG_CMD_NVEDIT_INFO is not set
+# CONFIG_CMD_NVEDIT_LOAD is not set
+# CONFIG_CMD_NVEDIT_SELECT is not set
+
+#
+# Memory commands
+#
+# CONFIG_CMD_BINOP is not set
+CONFIG_CMD_BLOBLIST=y
+CONFIG_CMD_CRC32=y
+# CONFIG_CRC32_VERIFY is not set
+# CONFIG_CMD_EEPROM is not set
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=0
+# CONFIG_LOOPW is not set
+# CONFIG_CMD_MD5SUM is not set
+# CONFIG_CMD_MEMINFO is not set
+CONFIG_CMD_MEMORY=y
+# CONFIG_CMD_MEM_SEARCH is not set
+# CONFIG_CMD_MX_CYCLIC is not set
+CONFIG_CMD_RANDOM=y
+# CONFIG_CMD_MEMTEST is not set
+# CONFIG_CMD_SHA1SUM is not set
+# CONFIG_CMD_STRINGS is not set
+
+#
+# Compression commands
+#
+CONFIG_CMD_LZMADEC=y
+CONFIG_CMD_UNLZ4=y
+CONFIG_CMD_UNZIP=y
+# CONFIG_CMD_ZIP is not set
+
+#
+# Device access commands
+#
+# CONFIG_CMD_ADC is not set
+# CONFIG_CMD_BCB is not set
+# CONFIG_CMD_BIND is not set
+# CONFIG_CMD_CLK is not set
+# CONFIG_CMD_DEMO is not set
+# CONFIG_CMD_DFU is not set
+CONFIG_CMD_DM=y
+# CONFIG_CMD_FUSE is not set
 CONFIG_CMD_GPIO=y
+# CONFIG_CMD_GPIO_READ is not set
+# CONFIG_CMD_PWM is not set
 CONFIG_CMD_GPT=y
+# CONFIG_CMD_GPT_RENAME is not set
+# CONFIG_CMD_IDE is not set
+# CONFIG_CMD_IO is not set
+# CONFIG_CMD_IOTRACE is not set
 CONFIG_CMD_I2C=y
+CONFIG_CMD_LOADB=y
+# CONFIG_CMD_LOADM is not set
+CONFIG_CMD_LOADS=y
+# CONFIG_LOADS_ECHO is not set
+# CONFIG_CMD_SAVES is not set
+# CONFIG_SYS_LOADS_BAUD_CHANGE is not set
+CONFIG_CMD_LOADXY_TIMEOUT=90
+# CONFIG_CMD_LSBLK is not set
+# CONFIG_CMD_MBR is not set
+# CONFIG_CMD_MISC is not set
 CONFIG_CMD_MMC=y
+# CONFIG_CMD_BKOPS_ENABLE is not set
+# CONFIG_CMD_MMC_REG is not set
+# CONFIG_CMD_MMC_SWRITE is not set
 CONFIG_MMC_SPEED_MODE_SET=y
+# CONFIG_CMD_CLONE is not set
+# CONFIG_CMD_MTD is not set
+# CONFIG_CMD_ONENAND is not set
+CONFIG_CMD_PART=y
+# CONFIG_CMD_PCI is not set
+CONFIG_CMD_PINMUX=y
+CONFIG_CMD_POWEROFF=y
+# CONFIG_CMD_READ is not set
+# CONFIG_CMD_SATA is not set
+# CONFIG_CMD_SDRAM is not set
+CONFIG_CMD_SF=y
 CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SPI=y
+CONFIG_DEFAULT_SPI_BUS=0
+CONFIG_DEFAULT_SPI_MODE=0x0
 CONFIG_CMD_USB=y
+# CONFIG_CMD_RKMTD is not set
+# CONFIG_CMD_WRITE is not set
+
+#
+# Shell scripting commands
+#
+# CONFIG_CMD_CAT is not set
+CONFIG_CMD_ECHO=y
+CONFIG_CMD_ITEST=y
+CONFIG_CMD_SOURCE=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_XXD is not set
+CONFIG_CMD_NET=y
+CONFIG_CMD_BOOTP=y
+# CONFIG_BOOTP_MAY_FAIL is not set
+CONFIG_BOOTP_BOOTPATH=y
+# CONFIG_BOOTP_VENDOREX is not set
+# CONFIG_BOOTP_BOOTFILESIZE is not set
+CONFIG_BOOTP_DNS=y
+# CONFIG_BOOTP_DNS2 is not set
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
+# CONFIG_BOOTP_PREFER_SERVERIP is not set
+CONFIG_BOOTP_SUBNETMASK=y
+# CONFIG_BOOTP_NISDOMAIN is not set
+# CONFIG_BOOTP_NTPSERVER is not set
+# CONFIG_CMD_PCAP is not set
+CONFIG_BOOTP_PXE=y
+CONFIG_BOOTP_PXE_CLIENTARCH=0x16
+# CONFIG_BOOTP_PXE_DHCP_OPTION is not set
+CONFIG_BOOTP_VCI_STRING="U-Boot.armv8"
+# CONFIG_CMD_TFTPPUT is not set
+# CONFIG_CMD_TFTPSRV is not set
+CONFIG_NET_TFTP_VARS=y
+# CONFIG_CMD_RARP is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_SYS_DISABLE_AUTOLOAD is not set
+# CONFIG_CMD_CDP is not set
+# CONFIG_CMD_SNTP is not set
+# CONFIG_CMD_LINK_LOCAL is not set
+# CONFIG_CMD_ETHSW is not set
+# CONFIG_CMD_WOL is not set
+CONFIG_CMD_DHCP=y
+# CONFIG_CMD_DNS is not set
+CONFIG_CMD_MII=y
+CONFIG_CMD_MDIO=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTPBOOT=y
+# CONFIG_CMD_WGET is not set
+CONFIG_CMD_PXE=y
+
+#
+# Misc commands
+#
+# CONFIG_CMD_2048 is not set
+# CONFIG_CMD_BMP is not set
+# CONFIG_CMD_BSP is not set
+CONFIG_CMD_BLOCK_CACHE=y
+# CONFIG_CMD_CACHE is not set
+# CONFIG_CMD_CONITRACE is not set
+CONFIG_CMD_CLS=y
 CONFIG_CMD_EFIDEBUG=y
+CONFIG_CMD_EFICONFIG=y
+# CONFIG_CMD_EXCEPTION is not set
+# CONFIG_CMD_INI is not set
+# CONFIG_CMD_DATE is not set
 CONFIG_CMD_TIME=y
+# CONFIG_CMD_GETTIME is not set
+# CONFIG_CMD_PAUSE is not set
+# CONFIG_CMD_RNG is not set
+# CONFIG_CMD_KASLRSEED is not set
+CONFIG_CMD_SLEEP=y
+# CONFIG_CMD_TIMER is not set
+# CONFIG_CMD_SYSBOOT is not set
+# CONFIG_CMD_QFW is not set
+# CONFIG_CMD_PSTORE is not set
+# CONFIG_CMD_TERMINAL is not set
+# CONFIG_CMD_UUID is not set
+CONFIG_CMD_VIDCONSOLE=y
+# CONFIG_CMD_SELECT_FONT is not set
+
+#
+# TI specific command line interface
+#
+
+#
+# Power commands
+#
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
+
+#
+# Security commands
+#
+# CONFIG_CMD_AES is not set
+# CONFIG_CMD_BLOB is not set
+# CONFIG_CMD_HASH is not set
+# CONFIG_CMD_HVC is not set
+# CONFIG_CMD_SMC is not set
+
+#
+# Firmware commands
+#
+CONFIG_CMD_CROS_EC=y
+
+#
+# Filesystem commands
+#
+# CONFIG_CMD_BTRFS is not set
+# CONFIG_CMD_EROFS is not set
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+# CONFIG_CMD_EXT4_WRITE is not set
+CONFIG_CMD_FAT=y
+# CONFIG_CMD_SQUASHFS is not set
+CONFIG_CMD_FS_GENERIC=y
+# CONFIG_CMD_FS_UUID is not set
+# CONFIG_CMD_JFFS2 is not set
+# CONFIG_CMD_MTDPARTS is not set
+CONFIG_MTDIDS_DEFAULT=""
+CONFIG_MTDPARTS_DEFAULT=""
+# CONFIG_CMD_ZFS is not set
+
+#
+# Debug commands
+#
+CONFIG_CMD_CYCLIC=y
+# CONFIG_CMD_DIAG is not set
+# CONFIG_CMD_EVENT is not set
 CONFIG_CMD_LOG=y
+# CONFIG_CMD_UBI is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITIONS=y
+CONFIG_SPL_PARTITIONS=y
+# CONFIG_MAC_PARTITION is not set
+# CONFIG_SPL_MAC_PARTITION is not set
+# CONFIG_TEGRA_PARTITION is not set
+CONFIG_DOS_PARTITION=y
+CONFIG_SPL_DOS_PARTITION=y
+CONFIG_ISO_PARTITION=y
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_SPL_AMIGA_PARTITION is not set
+CONFIG_EFI_PARTITION=y
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=128
+CONFIG_EFI_PARTITION_ENTRIES_OFF=0
+CONFIG_SPL_EFI_PARTITION=y
+CONFIG_PARTITION_UUIDS=y
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_PARTITION_TYPE_GUID=y
+# CONFIG_SPL_PARTITION_TYPE_GUID is not set
+CONFIG_SUPPORT_OF_CONTROL=y
+CONFIG_PYLIBFDT=y
+CONFIG_DTOC=y
+CONFIG_BINMAN=y
+
+#
+# Device Tree Control
+#
+CONFIG_OF_CONTROL=y
+CONFIG_OF_REAL=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_UPSTREAM=y
+# CONFIG_OF_UPSTREAM_BUILD_VENDOR is not set
+# CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS is not set
+CONFIG_OF_SEPARATE=y
+# CONFIG_OF_EMBED is not set
+# CONFIG_OF_INITIAL_DTB_READONLY is not set
+# CONFIG_OF_BOARD is not set
+# CONFIG_OF_OMIT_DTB is not set
+CONFIG_DEVICE_TREE_INCLUDES=""
+CONFIG_OF_LIST="rockchip/rk3399-gru-bob"
+CONFIG_OF_OVERLAY_LIST=""
+# CONFIG_MULTI_DTB_FIT is not set
+# CONFIG_SPL_MULTI_DTB_FIT is not set
+CONFIG_SPL_OF_LIST="rockchip/rk3399-gru-bob"
+CONFIG_OF_TAG_MIGRATE=y
 CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+# CONFIG_OF_DTB_PROPS_REMOVE is not set
+# CONFIG_SPL_OF_PLATDATA is not set
+CONFIG_SPL_OF_REAL=y
+CONFIG_TPL_OF_REAL=y
+# CONFIG_TPL_OF_PLATDATA is not set
+
+#
+# Environment
+#
+CONFIG_ENV_SUPPORT=y
+CONFIG_ENV_CALLBACK_LIST_STATIC=""
+CONFIG_SAVEENV=y
+# CONFIG_ENV_OVERWRITE is not set
+# CONFIG_OVERWRITE_ETHADDR_ONCE is not set
+CONFIG_ENV_MIN_ENTRIES=64
+CONFIG_ENV_MAX_ENTRIES=512
+CONFIG_ENV_IS_DEFAULT=y
+CONFIG_ENV_IS_NOWHERE=y
+# CONFIG_ENV_IS_IN_EEPROM is not set
+# CONFIG_ENV_IS_IN_FAT is not set
+# CONFIG_ENV_IS_IN_EXT4 is not set
+# CONFIG_ENV_IS_IN_FLASH is not set
+# CONFIG_ENV_IS_IN_MMC is not set
+# CONFIG_ENV_IS_IN_NAND is not set
+# CONFIG_ENV_IS_IN_NVRAM is not set
+# CONFIG_ENV_IS_IN_REMOTE is not set
+# CONFIG_ENV_IS_IN_SPI_FLASH is not set
+# CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_USE_DEFAULT_ENV_FILE is not set
+# CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set
+# CONFIG_ENV_IMPORT_FDT is not set
+# CONFIG_ENV_APPEND is not set
+# CONFIG_ENV_WRITEABLE_LIST is not set
+# CONFIG_ENV_ACCESS_IGNORE_FORCE is not set
+# CONFIG_USE_BOOTFILE is not set
+# CONFIG_USE_ETHPRIME is not set
+# CONFIG_USE_HOSTNAME is not set
+# CONFIG_VERSION_VARIABLE is not set
+
+#
+# Networking
+#
+# CONFIG_NO_NET is not set
+CONFIG_NET=y
+# CONFIG_NET_LWIP is not set
+CONFIG_ARP_TIMEOUT=5000
+CONFIG_NET_RETRY_COUNT=5
+# CONFIG_PROT_UDP is not set
+# CONFIG_BOOTP_SEND_HOSTNAME is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_IP_DEFRAG is not set
+# CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set
+# CONFIG_TFTP_PORT is not set
+CONFIG_TFTP_WINDOWSIZE=1
+# CONFIG_TFTP_TSIZE is not set
+# CONFIG_SERVERIP_FROM_PROXYDHCP is not set
+CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS=100
+# CONFIG_KEEP_SERVERADDR is not set
+# CONFIG_UDP_CHECKSUM is not set
+# CONFIG_BOOTP_SERVERIP is not set
+CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64
+# CONFIG_USE_GATEWAYIP is not set
+# CONFIG_USE_IPADDR is not set
+# CONFIG_USE_NETMASK is not set
+# CONFIG_USE_ROOTPATH is not set
+# CONFIG_USE_SERVERIP is not set
+# CONFIG_PROT_TCP is not set
+# CONFIG_IPV6 is not set
+CONFIG_BOOTDEV_ETH=y
+# CONFIG_NET_RANDOM_ETHADDR is not set
+# CONFIG_WGET is not set
+CONFIG_TFTP_BLOCKSIZE=1468
+CONFIG_SYS_RX_ETH_BUFFER=4
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_TPL_DM=y
+# CONFIG_DM_WARN is not set
+# CONFIG_SPL_DM_WARN is not set
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_STATS is not set
+# CONFIG_SPL_DM_STATS is not set
+CONFIG_DM_DEVICE_REMOVE=y
+CONFIG_DM_EVENT=y
+# CONFIG_SPL_DM_DEVICE_REMOVE is not set
+CONFIG_DM_STDIO=y
+CONFIG_DM_SEQ_ALIAS=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+# CONFIG_TPL_DM_SEQ_ALIAS is not set
+CONFIG_SPL_DM_INLINE_OFNODE=y
+CONFIG_TPL_DM_INLINE_OFNODE=y
+# CONFIG_DM_DMA is not set
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+# CONFIG_DEVRES is not set
+CONFIG_SIMPLE_BUS=y
+CONFIG_SPL_SIMPLE_BUS=y
+# CONFIG_TPL_SIMPLE_BUS is not set
+# CONFIG_SIMPLE_BUS_CORRECT_RANGE is not set
+CONFIG_OF_TRANSLATE=y
+# CONFIG_SPL_OF_TRANSLATE is not set
+# CONFIG_TPL_OF_TRANSLATE is not set
+# CONFIG_TRANSLATION_OFFSET is not set
+CONFIG_OFNODE_MULTI_TREE=y
+CONFIG_OFNODE_MULTI_TREE_MAX=4
+CONFIG_BOUNCE_BUFFER=y
+CONFIG_ADC=y
+# CONFIG_SPL_ADC is not set
+# CONFIG_ADC_EXYNOS is not set
+# CONFIG_ADC_SANDBOX is not set
+# CONFIG_SARADC_MESON is not set
+CONFIG_SARADC_ROCKCHIP=y
+# CONFIG_ADC_IMX93 is not set
+# CONFIG_SATA is not set
+# CONFIG_SCSI_AHCI is not set
+
+#
+# SATA/SCSI device support
+#
+# CONFIG_AXI is not set
+
+#
+# Bus devices
+#
+CONFIG_BLK=y
+CONFIG_SPL_BLK=y
+# CONFIG_TPL_BLK is not set
+CONFIG_BLOCK_CACHE=y
+# CONFIG_BLKMAP is not set
+# CONFIG_SPL_BLOCK_CACHE is not set
+# CONFIG_EFI_MEDIA is not set
+# CONFIG_IDE is not set
+# CONFIG_LBA48 is not set
+# CONFIG_SYS_64BIT_LBA is not set
+# CONFIG_RKMTD is not set
+# CONFIG_BOOTCOUNT_LIMIT is not set
+
+#
+# Button Support
+#
+# CONFIG_BUTTON is not set
+
+#
+# Cache Controller drivers
+#
+# CONFIG_CACHE is not set
+# CONFIG_L2X0_CACHE is not set
+# CONFIG_ANDES_L2_CACHE is not set
+# CONFIG_NCORE_CACHE is not set
+# CONFIG_SIFIVE_CCACHE is not set
+# CONFIG_SIFIVE_PL2 is not set
+
+#
+# Clock
+#
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
+# CONFIG_SPL_CLK_CCF is not set
+# CONFIG_CLK_CCF is not set
+# CONFIG_CLK_GPIO is not set
+# CONFIG_SPL_CLK_GPIO is not set
+# CONFIG_CLK_STUB is not set
+# CONFIG_CLK_CDCE9XX is not set
+# CONFIG_CLK_ICS8N3QV01 is not set
+# CONFIG_CLK_K210 is not set
+# CONFIG_CLK_MPC83XX is not set
+# CONFIG_CLK_XLNX_CLKWZRD is not set
+# CONFIG_COMMON_CLK_ADI_SHARED is not set
+# CONFIG_CLK_AT91 is not set
+# CONFIG_CLK_RCAR is not set
+# CONFIG_CLK_RCAR_CPG_LIB is not set
+# CONFIG_CLK_SOPHGO_CV1800B is not set
+# CONFIG_CLK_SIFIVE is not set
+# CONFIG_CLK_TI_AM3_DPLL is not set
+# CONFIG_CLK_TI_CTRL is not set
+# CONFIG_CLK_TI_GATE is not set
+# CONFIG_CLK_K3 is not set
+# CONFIG_SPL_CLK_K3 is not set
+# CONFIG_CPU is not set
+
+#
+# Hardware crypto devices
+#
+# CONFIG_DM_HASH is not set
+# CONFIG_FSL_CAAM is not set
+CONFIG_CAAM_64BIT=y
+# CONFIG_SYS_FSL_SEC_BE is not set
+# CONFIG_SYS_FSL_SEC_LE is not set
+# CONFIG_FSL_DCP_RNG is not set
+# CONFIG_NPCM_AES is not set
+# CONFIG_NPCM_SHA is not set
+# CONFIG_DDR_SPD is not set
+# CONFIG_IMX_SNPS_DDR_PHY is not set
+
+#
+# Demo for driver model
+#
+# CONFIG_DM_DEMO is not set
+
+#
+# DFU support
+#
+
+#
+# DMA Support
+#
+# CONFIG_DMA is not set
+# CONFIG_DMA_LPC32XX is not set
+# CONFIG_TI_EDMA3 is not set
+# CONFIG_DMA_LEGACY is not set
+
+#
+# Extcon Support
+#
+# CONFIG_EXTCON is not set
+
+#
+# Fastboot support
+#
+# CONFIG_UDP_FUNCTION_FASTBOOT is not set
+# CONFIG_TCP_FUNCTION_FASTBOOT is not set
+CONFIG_FIRMWARE=y
+# CONFIG_SPL_FIRMWARE is not set
+CONFIG_ARM_PSCI_FW=y
+# CONFIG_ZYNQMP_FIRMWARE is not set
+# CONFIG_ARM_SMCCC_FEATURES is not set
+# CONFIG_ARM_FFA_TRANSPORT is not set
+# CONFIG_SCMI_FIRMWARE is not set
+# CONFIG_DM_FUZZING_ENGINE is not set
+
+#
+# FPGA support
+#
+# CONFIG_FPGA_ALTERA is not set
+# CONFIG_FPGA_SOCFPGA is not set
+# CONFIG_FPGA_LATTICE is not set
+# CONFIG_FPGA_XILINX is not set
+# CONFIG_DM_FPGA is not set
+# CONFIG_FWU_MDATA is not set
+CONFIG_GPIO=y
+CONFIG_SPL_DM_GPIO=y
+CONFIG_TPL_DM_GPIO=y
+# CONFIG_GPIO_HOG is not set
+# CONFIG_SPL_GPIO_HOG is not set
+# CONFIG_DM_GPIO_LOOKUP_LABEL is not set
+# CONFIG_SPL_DM_GPIO_LOOKUP_LABEL is not set
+# CONFIG_ALTERA_PIO is not set
+# CONFIG_BCM2835_GPIO is not set
+# CONFIG_DWAPB_GPIO is not set
+# CONFIG_AT91_GPIO is not set
+# CONFIG_ATMEL_PIO4 is not set
+# CONFIG_ASPEED_GPIO is not set
+# CONFIG_ASPEED_SGPIO is not set
+# CONFIG_ASPEED_G7_GPIO is not set
+# CONFIG_DA8XX_GPIO is not set
+# CONFIG_FXL6408_GPIO is not set
+# CONFIG_HIKEY_GPIO is not set
+# CONFIG_INTEL_BROADWELL_GPIO is not set
+# CONFIG_INTEL_GPIO is not set
+# CONFIG_INTEL_ICH6_GPIO is not set
+# CONFIG_IMX_RGPIO2P is not set
+# CONFIG_IPROC_GPIO is not set
+# CONFIG_HSDK_CREG_GPIO is not set
+# CONFIG_KIRKWOOD_GPIO is not set
+# CONFIG_LPC32XX_GPIO is not set
+# CONFIG_MAX7320_GPIO is not set
+# CONFIG_MCP230XX_GPIO is not set
+# CONFIG_MSM_GPIO is not set
+# CONFIG_MXC_GPIO is not set
+# CONFIG_MXS_GPIO is not set
+# CONFIG_NPCM_GPIO is not set
+# CONFIG_NPCM_SGPIO is not set
+# CONFIG_CMD_PCA953X is not set
+# CONFIG_PCF8575_GPIO is not set
 CONFIG_ROCKCHIP_GPIO=y
+# CONFIG_XILINX_GPIO is not set
+# CONFIG_TCA642X is not set
+# CONFIG_TEGRA_GPIO is not set
+# CONFIG_TEGRA186_GPIO is not set
+# CONFIG_VYBRID_GPIO is not set
+# CONFIG_SIFIVE_GPIO is not set
+# CONFIG_ZYNQ_GPIO is not set
+# CONFIG_DM_74X164 is not set
+# CONFIG_DM_PCA953X is not set
+# CONFIG_SPL_DM_PCA953X is not set
+# CONFIG_PCA953X is not set
+# CONFIG_MPC8XXX_GPIO is not set
+# CONFIG_MPC8XX_GPIO is not set
+# CONFIG_NX_GPIO is not set
+# CONFIG_NOMADIK_GPIO is not set
+# CONFIG_SLG7XL45106_I2C_GPO is not set
+# CONFIG_FTGPIO010 is not set
+# CONFIG_ADP5585_GPIO is not set
+
+#
+# Hardware Spinlock Support
+#
+# CONFIG_DM_HWSPINLOCK is not set
+CONFIG_I2C=y
+CONFIG_DM_I2C=y
+CONFIG_SPL_DM_I2C=y
+# CONFIG_TPL_DM_I2C is not set
 CONFIG_I2C_CROS_EC_TUNNEL=y
+# CONFIG_I2C_CROS_EC_LDO is not set
+# CONFIG_I2C_SET_DEFAULT_BUS_NUM is not set
+# CONFIG_DM_I2C_GPIO is not set
+# CONFIG_SYS_I2C_IPROC is not set
+# CONFIG_SYS_I2C_FSL is not set
+# CONFIG_SYS_I2C_CADENCE is not set
+# CONFIG_SYS_I2C_DW is not set
+# CONFIG_SYS_I2C_INTEL is not set
+# CONFIG_SYS_I2C_IMX_LPI2C is not set
+# CONFIG_SYS_I2C_MTK is not set
+# CONFIG_SYS_I2C_MICROCHIP is not set
+# CONFIG_SYS_I2C_MXC is not set
+# CONFIG_SYS_I2C_NEXELL is not set
+# CONFIG_SYS_I2C_NPCM is not set
+# CONFIG_SYS_I2C_OCORES is not set
 CONFIG_SYS_I2C_ROCKCHIP=y
+# CONFIG_SYS_I2C_SOFT is not set
+# CONFIG_SYS_I2C_S3C24X0 is not set
+# CONFIG_SYS_I2C_MV is not set
+# CONFIG_SYS_I2C_MVTWSI is not set
+# CONFIG_SYS_I2C_XILINX_XIIC is not set
+# CONFIG_SYS_I2C_IHS is not set
 CONFIG_I2C_MUX=y
+# CONFIG_SPL_I2C_MUX is not set
+# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set
+# CONFIG_I2C_MUX_PCA954x is not set
+# CONFIG_I2C_MUX_GPIO is not set
+CONFIG_INPUT=y
+# CONFIG_SPL_INPUT is not set
+# CONFIG_TPL_INPUT is not set
+CONFIG_DM_KEYBOARD=y
+# CONFIG_SPL_DM_KEYBOARD is not set
+# CONFIG_TPL_DM_KEYBOARD is not set
+# CONFIG_APPLE_SPI_KEYB is not set
+# CONFIG_BUTTON_KEYBOARD is not set
 CONFIG_CROS_EC_KEYB=y
+# CONFIG_I8042_KEYB is not set
+# CONFIG_TEGRA_KEYBOARD is not set
+# CONFIG_TWL4030_INPUT is not set
+
+#
+# IOMMU device drivers
+#
+# CONFIG_IOMMU is not set
+
+#
+# LED Support
+#
+# CONFIG_LED is not set
+# CONFIG_LED_BOOT is not set
+# CONFIG_LED_ACTIVITY is not set
+# CONFIG_SPL_LED is not set
+# CONFIG_LED_STATUS is not set
+
+#
+# Mailbox Controller Support
+#
+# CONFIG_DM_MAILBOX is not set
+
+#
+# Memory Controller drivers
+#
+# CONFIG_MEMORY is not set
+# CONFIG_ATMEL_EBI is not set
+# CONFIG_MFD_ATMEL_SMC is not set
+
+#
+# Multifunction device drivers
+#
+CONFIG_MISC=y
+CONFIG_SPL_MISC=y
+CONFIG_TPL_MISC=y
+# CONFIG_NVMEM is not set
+# CONFIG_SPL_NVMEM is not set
+# CONFIG_ALTERA_SYSID is not set
+# CONFIG_ATSHA204A is not set
+# CONFIG_GATEWORKS_SC is not set
+CONFIG_ROCKCHIP_EFUSE=y
+# CONFIG_ROCKCHIP_OTP is not set
 CONFIG_ROCKCHIP_IODOMAIN=y
+# CONFIG_SIFIVE_OTP is not set
+# CONFIG_SMSC_LPC47M is not set
+# CONFIG_SMSC_SIO1007 is not set
+# CONFIG_VEXPRESS_CONFIG is not set
 CONFIG_CROS_EC=y
+# CONFIG_SPL_CROS_EC is not set
+# CONFIG_TPL_CROS_EC is not set
+# CONFIG_CROS_EC_I2C is not set
+# CONFIG_CROS_EC_LPC is not set
+# CONFIG_SPL_CROS_EC_LPC is not set
+# CONFIG_TPL_CROS_EC_LPC is not set
 CONFIG_CROS_EC_SPI=y
+# CONFIG_DS4510 is not set
+# CONFIG_FSL_SEC_MON is not set
+# CONFIG_IRQ is not set
+# CONFIG_NPCM_HOST is not set
+# CONFIG_NUVOTON_NCT6102D is not set
 CONFIG_PWRSEQ=y
+# CONFIG_SPL_PWRSEQ is not set
+# CONFIG_PCA9551_LED is not set
+# CONFIG_TEST_DRV is not set
+# CONFIG_TURRIS_OMNIA_MCU is not set
+# CONFIG_USB_HUB_USB251XB is not set
+# CONFIG_TWL4030_LED is not set
+# CONFIG_WINBOND_W83627 is not set
+# CONFIG_I2C_EEPROM is not set
+# CONFIG_SPL_I2C_EEPROM is not set
+# CONFIG_GDSYS_RXAUI_CTRL is not set
+# CONFIG_GDSYS_IOEP is not set
+# CONFIG_MPC83XX_SERDES is not set
+# CONFIG_FS_LOADER is not set
+# CONFIG_SPL_FS_LOADER is not set
+# CONFIG_GDSYS_SOC is not set
+# CONFIG_IHS_FPGA is not set
+# CONFIG_MICROCHIP_FLEXCOM is not set
+# CONFIG_ESM_PMIC is not set
+# CONFIG_SL28CPLD is not set
+# CONFIG_SPL_SOCFPGA_DT_REG is not set
+
+#
+# MMC Host controller Support
+#
+CONFIG_MMC=y
+CONFIG_MMC_WRITE=y
 CONFIG_MMC_PWRSEQ=y
+# CONFIG_MMC_BROKEN_CD is not set
+CONFIG_DM_MMC=y
+CONFIG_SPL_DM_MMC=y
+# CONFIG_TPL_DM_MMC is not set
+# CONFIG_MMC_SPI is not set
+# CONFIG_ARM_PL180_MMCI is not set
+CONFIG_MMC_QUIRKS=y
+CONFIG_SYS_MMC_MAX_BLK_COUNT=65535
+CONFIG_MMC_HW_PARTITIONING=y
+# CONFIG_SUPPORT_EMMC_RPMB is not set
+# CONFIG_SUPPORT_EMMC_BOOT is not set
 CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_SUPPORTS_TUNING=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_MMC_VERBOSE=y
+# CONFIG_MMC_TRACE is not set
 CONFIG_MMC_DW=y
+# CONFIG_MMC_DW_CORTINA is not set
+# CONFIG_MMC_DW_K3 is not set
 CONFIG_MMC_DW_ROCKCHIP=y
+# CONFIG_MMC_DW_SNPS is not set
+# CONFIG_MMC_MXC is not set
+# CONFIG_MMC_PCI is not set
+# CONFIG_MMC_OMAP_HS is not set
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
+# CONFIG_MMC_SDHCI_ADMA is not set
+# CONFIG_MMC_SDHCI_ADMA_FORCE_32BIT is not set
+CONFIG_MMC_SDHCI_ADMA_64BIT=y
+# CONFIG_MMC_SDHCI_BCMSTB is not set
+# CONFIG_MMC_SDHCI_CADENCE is not set
+# CONFIG_MMC_SDHCI_CV1800B is not set
+# CONFIG_MMC_SDHCI_IPROC is not set
+# CONFIG_MMC_SDHCI_F_SDH30 is not set
+# CONFIG_MMC_SDHCI_KONA is not set
+# CONFIG_MMC_SDHCI_MSM is not set
+# CONFIG_MMC_SDHCI_NPCM is not set
 CONFIG_MMC_SDHCI_ROCKCHIP=y
+# CONFIG_MMC_SDHCI_S5P is not set
+# CONFIG_MMC_SDHCI_SNPS is not set
+# CONFIG_MMC_SDHCI_STI is not set
+# CONFIG_MMC_SDHCI_XENON is not set
+# CONFIG_MMC_SDHCI_TANGIER is not set
+# CONFIG_MMC_SDHCI_ZYNQ is not set
+# CONFIG_MMC_PITON is not set
+# CONFIG_STM32_SDMMC2 is not set
+# CONFIG_FTSDC010 is not set
+# CONFIG_FSL_ESDHC is not set
+# CONFIG_FSL_ESDHC_IMX is not set
+
+#
+# MTD Support
+#
+CONFIG_MTD=y
+# CONFIG_DM_MTD is not set
+# CONFIG_MTD_NOR_FLASH is not set
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_SYS_MTDPARTS_RUNTIME is not set
+# CONFIG_FLASH_CFI_DRIVER is not set
+# CONFIG_SAMSUNG_ONENAND is not set
+# CONFIG_USE_SYS_MAX_FLASH_BANKS is not set
+# CONFIG_MTD_RAW_NAND is not set
+
+#
+# SPI Flash Support
+#
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+# CONFIG_BOOTDEV_SPI_FLASH is not set
+# CONFIG_SPI_FLASH_SFDP_SUPPORT is not set
+CONFIG_SPI_FLASH_SMART_HWCAPS=y
+# CONFIG_SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT is not set
+# CONFIG_SPI_FLASH_SOFT_RESET is not set
+# CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_LOCK=y
+CONFIG_SPI_FLASH_UNLOCK_ALL=y
+# CONFIG_SPI_FLASH_ATMEL is not set
+# CONFIG_SPI_FLASH_EON is not set
 CONFIG_SPI_FLASH_GIGADEVICE=y
+# CONFIG_SPI_FLASH_ISSI is not set
+# CONFIG_SPI_FLASH_MACRONIX is not set
+# CONFIG_SPI_FLASH_PUYA is not set
+# CONFIG_SPI_FLASH_SILICONKAISER is not set
+# CONFIG_SPI_FLASH_SPANSION is not set
+# CONFIG_SPI_FLASH_STMICRO is not set
+# CONFIG_SPI_FLASH_SST is not set
 CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_XMC is not set
+# CONFIG_SPI_FLASH_XTX is not set
+# CONFIG_SPI_FLASH_ZBIT is not set
+CONFIG_SPI_FLASH_USE_4K_SECTORS=y
+# CONFIG_SPI_FLASH_DATAFLASH is not set
+# CONFIG_SPI_FLASH_MTD is not set
+
+#
+# UBI support
+#
+# CONFIG_UBI_SILENCE_MSG is not set
+# CONFIG_MTD_UBI is not set
+# CONFIG_NVMXIP is not set
+# CONFIG_NVMXIP_QSPI is not set
+
+#
+# Multiplexer drivers
+#
+# CONFIG_MULTIPLEXER is not set
+# CONFIG_BITBANGMII is not set
+# CONFIG_MV88E6352_SWITCH is not set
+CONFIG_PHYLIB=y
+# CONFIG_PHY_ADDR_ENABLE is not set
+CONFIG_PHY_ANEG_TIMEOUT=4000
+# CONFIG_B53_SWITCH is not set
+# CONFIG_MV88E61XX_SWITCH is not set
+# CONFIG_PHYLIB_10G is not set
+# CONFIG_PHY_ADIN is not set
+# CONFIG_PHY_AQUANTIA is not set
+# CONFIG_PHY_ATHEROS is not set
+# CONFIG_SPL_PHY_ATHEROS is not set
+# CONFIG_PHY_BROADCOM is not set
+# CONFIG_PHY_CORTINA is not set
+# CONFIG_PHY_DAVICOM is not set
+# CONFIG_PHY_ET1011C is not set
+# CONFIG_PHY_LXT is not set
+# CONFIG_PHY_MARVELL is not set
+# CONFIG_PHY_MARVELL_10G is not set
+# CONFIG_PHY_MESON_GXL is not set
+# CONFIG_PHY_MICREL is not set
+# CONFIG_PHY_MOTORCOMM is not set
+# CONFIG_PHY_MSCC is not set
+# CONFIG_PHY_NATSEMI is not set
+# CONFIG_PHY_NXP_C45_TJA11XX is not set
+# CONFIG_PHY_NXP_TJA11XX is not set
+# CONFIG_PHY_REALTEK is not set
+# CONFIG_PHY_SMSC is not set
+# CONFIG_PHY_TERANETICS is not set
+# CONFIG_PHY_TI is not set
+# CONFIG_PHY_TI_DP83867 is not set
+# CONFIG_PHY_TI_DP83869 is not set
+# CONFIG_PHY_TI_GENERIC is not set
+# CONFIG_PHY_VITESSE is not set
+# CONFIG_PHY_XILINX is not set
+# CONFIG_PHY_XILINX_GMII2RGMII is not set
+# CONFIG_PHY_XWAY is not set
+# CONFIG_PHY_ETHERNET_ID is not set
+# CONFIG_PHY_FIXED is not set
+# CONFIG_PHY_NCSI is not set
+# CONFIG_FSL_MEMAC is not set
+CONFIG_PHY_RESET_DELAY=0
+# CONFIG_FSL_PFE is not set
+CONFIG_ETH=y
+CONFIG_DM_ETH=y
+# CONFIG_DM_MDIO is not set
+# CONFIG_DM_ETH_PHY is not set
+CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
+# CONFIG_ALTERA_TSE is not set
+# CONFIG_BCM_SF2_ETH is not set
+# CONFIG_BCMGENET is not set
+# CONFIG_BNXT_ETH is not set
+# CONFIG_CALXEDA_XGMAC is not set
+# CONFIG_DWC_ETH_XGMAC is not set
+# CONFIG_DRIVER_DM9000 is not set
+# CONFIG_DWC_ETH_QOS is not set
+# CONFIG_EEPRO100 is not set
 CONFIG_ETH_DESIGNWARE=y
+# CONFIG_ETH_DESIGNWARE_MESON8B is not set
+# CONFIG_ETH_DESIGNWARE_SOCFPGA is not set
+# CONFIG_ETH_DESIGNWARE_S700 is not set
+# CONFIG_DW_ALTDESCRIPTOR is not set
+# CONFIG_ETHOC is not set
+# CONFIG_FMAN_ENET is not set
+# CONFIG_FTMAC100 is not set
+# CONFIG_FTGMAC100 is not set
+# CONFIG_MCFFEC is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_LITEETH is not set
+# CONFIG_MACB is not set
+# CONFIG_NET_NPCM750 is not set
+# CONFIG_PCH_GBE is not set
+# CONFIG_RGMII is not set
+# CONFIG_MII is not set
+# CONFIG_RMII is not set
+# CONFIG_PCNET is not set
+# CONFIG_QE_UEC is not set
+# CONFIG_RTL8139 is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SUN7I_GMAC is not set
+# CONFIG_SUN4I_EMAC is not set
+# CONFIG_SUN8I_EMAC is not set
+# CONFIG_SH_ETHER is not set
+# CONFIG_DRIVER_TI_CPSW is not set
+# CONFIG_DRIVER_TI_EMAC is not set
+# CONFIG_DRIVER_TI_KEYSTONE_NET is not set
+# CONFIG_TULIP is not set
+# CONFIG_XILINX_AXIEMAC is not set
+# CONFIG_VSC7385_ENET is not set
+# CONFIG_XILINX_EMACLITE is not set
+# CONFIG_ZYNQ_GEM is not set
 CONFIG_GMAC_ROCKCHIP=y
+# CONFIG_SYS_DPAA_QBMAN is not set
+# CONFIG_TSEC_ENET is not set
+# CONFIG_MEDIATEK_ETH is not set
+# CONFIG_HIFEMAC_ETH is not set
+# CONFIG_HIGMACV300_ETH is not set
+# CONFIG_NVME is not set
+# CONFIG_NVME_APPLE is not set
+
+#
+# PCI Endpoint
+#
+# CONFIG_PCI_ENDPOINT is not set
+# CONFIG_X86_PCH7 is not set
+# CONFIG_X86_PCH9 is not set
+
+#
+# PHY Subsystem
+#
+CONFIG_PHY=y
+# CONFIG_SPL_PHY is not set
+# CONFIG_NOP_PHY is not set
+# CONFIG_MIPI_DPHY_HELPERS is not set
+# CONFIG_BCM_SR_PCIE_PHY is not set
+# CONFIG_OMAP_USB2_PHY is not set
+
+#
+# Rockchip PHY driver
+#
+# CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set
+# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+# CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY is not set
+# CONFIG_PHY_ROCKCHIP_PCIE is not set
+# CONFIG_PHY_ROCKCHIP_SNPS_PCIE3 is not set
+# CONFIG_PHY_ROCKCHIP_USBDP is not set
 CONFIG_PHY_ROCKCHIP_TYPEC=y
+# CONFIG_PHY_CADENCE_SIERRA is not set
+# CONFIG_PHY_CADENCE_TORRENT is not set
+# CONFIG_MSM8916_USB_PHY is not set
+# CONFIG_MVEBU_COMPHY_SUPPORT is not set
+
+#
+# Pin controllers
+#
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_FULL=y
+CONFIG_PINCTRL_GENERIC=y
+CONFIG_PINMUX=y
+# CONFIG_PINCONF is not set
+CONFIG_PINCONF_RECURSIVE=y
+CONFIG_SPL_PINCTRL=y
+# CONFIG_TPL_PINCTRL is not set
+CONFIG_SPL_PINCTRL_FULL=y
+CONFIG_SPL_PINCTRL_GENERIC=y
+CONFIG_SPL_PINMUX=y
+# CONFIG_SPL_PINCONF is not set
+CONFIG_SPL_PINCONF_RECURSIVE=y
+# CONFIG_PINCTRL_AT91 is not set
+# CONFIG_PINCTRL_AT91PIO4 is not set
+# CONFIG_PINCTRL_INTEL is not set
+# CONFIG_PINCTRL_QE is not set
+# CONFIG_PINCTRL_ROCKCHIP_RV1108 is not set
+# CONFIG_PINCTRL_SINGLE is not set
+# CONFIG_PINCTRL_STM32 is not set
+# CONFIG_PINCTRL_STMFX is not set
+# CONFIG_SPL_PINCTRL_STMFX is not set
+# CONFIG_PINCTRL_K210 is not set
+CONFIG_PINCTRL_ROCKCHIP=y
+CONFIG_SPL_PINCTRL_ROCKCHIP=y
+# CONFIG_PINCTRL_TEGRA is not set
+# CONFIG_SPL_PINCTRL_TEGRA is not set
+CONFIG_POWER=y
+# CONFIG_POWER_LEGACY is not set
+# CONFIG_ACPI_PMC is not set
+# CONFIG_SPL_ACPI_PMC is not set
+# CONFIG_TPL_ACPI_PMC is not set
+
+#
+# Power Domain Support
+#
+# CONFIG_POWER_DOMAIN is not set
+CONFIG_DM_PMIC=y
+CONFIG_SPL_DM_PMIC=y
+CONFIG_PMIC_CHILDREN=y
+CONFIG_SPL_PMIC_CHILDREN=y
+# CONFIG_PMIC_AB8500 is not set
+# CONFIG_PMIC_ACT8846 is not set
+# CONFIG_PMIC_AXP is not set
+# CONFIG_SPL_PMIC_AXP is not set
+# CONFIG_DM_PMIC_DA9063 is not set
+# CONFIG_SPL_DM_PMIC_DA9063 is not set
+# CONFIG_PMIC_AS3722 is not set
+# CONFIG_DM_PMIC_BD71837 is not set
+# CONFIG_SPL_DM_PMIC_BD71837 is not set
+# CONFIG_DM_PMIC_FAN53555 is not set
+# CONFIG_DM_PMIC_MP5416 is not set
+# CONFIG_SPL_DM_PMIC_MP5416 is not set
+# CONFIG_DM_PMIC_PCA9450 is not set
+# CONFIG_SPL_DM_PMIC_PCA9450 is not set
+# CONFIG_DM_PMIC_PFUZE100 is not set
+# CONFIG_SPL_DM_PMIC_PFUZE100 is not set
+# CONFIG_DM_PMIC_MAX77663 is not set
+# CONFIG_DM_PMIC_MAX77686 is not set
+# CONFIG_DM_PMIC_MAX8998 is not set
+# CONFIG_DM_PMIC_MC34708 is not set
+# CONFIG_PMIC_MAX8997 is not set
+# CONFIG_PMIC_QCOM is not set
 CONFIG_PMIC_RK8XX=y
+# CONFIG_SPL_PMIC_RK8XX is not set
+# CONFIG_PMIC_S2MPS11 is not set
+# CONFIG_DM_PMIC_SANDBOX is not set
+# CONFIG_PMIC_S5M8767 is not set
+# CONFIG_PMIC_RN5T567 is not set
+# CONFIG_SPL_PMIC_RN5T567 is not set
+# CONFIG_PMIC_TPS65090 is not set
+# CONFIG_PMIC_PALMAS is not set
+# CONFIG_PMIC_LP873X is not set
+# CONFIG_PMIC_LP87565 is not set
+# CONFIG_DM_PMIC_TPS65910 is not set
+# CONFIG_DM_PMIC_TPS80031 is not set
+# CONFIG_PMIC_STPMIC1 is not set
+# CONFIG_SPL_PMIC_PALMAS is not set
+# CONFIG_SPL_PMIC_LP873X is not set
+# CONFIG_SPL_PMIC_LP87565 is not set
+# CONFIG_PMIC_TPS65941 is not set
+# CONFIG_PMIC_TPS65219 is not set
+# CONFIG_PMIC_RAA215300 is not set
+# CONFIG_PMIC_TPS65217 is not set
+# CONFIG_POWER_TPS65218 is not set
+# CONFIG_POWER_TPS62362 is not set
+# CONFIG_SPL_POWER_TPS62362 is not set
+# CONFIG_SPL_POWER_TPS65910 is not set
+CONFIG_DM_REGULATOR=y
 CONFIG_REGULATOR_PWM=y
+# CONFIG_SPL_REGULATOR_PWM is not set
+CONFIG_DM_REGULATOR_COMMON=y
+CONFIG_SPL_DM_REGULATOR_COMMON=y
+CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_SPL_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+# CONFIG_SPL_DM_REGULATOR_GPIO is not set
 CONFIG_REGULATOR_RK8XX=y
+# CONFIG_DM_REGULATOR_PBIAS is not set
+# CONFIG_DM_REGULATOR_TPS62360 is not set
+# CONFIG_DM_REGULATOR_TPS6287X is not set
+# CONFIG_DM_REGULATOR_ANATOP is not set
+# CONFIG_DM_REGULATOR_SCMI is not set
+# CONFIG_TPS6586X_POWER is not set
+# CONFIG_POWER_MT6323 is not set
+CONFIG_DM_PWM=y
+# CONFIG_PWM_ASPEED is not set
+# CONFIG_PWM_CADENCE_TTC is not set
 CONFIG_PWM_CROS_EC=y
+# CONFIG_PWM_EXYNOS is not set
+# CONFIG_PWM_IMX is not set
+# CONFIG_PWM_MESON is not set
+# CONFIG_PWM_MTK is not set
 CONFIG_PWM_ROCKCHIP=y
+# CONFIG_PWM_SANDBOX is not set
+# CONFIG_PWM_SIFIVE is not set
+# CONFIG_PWM_TEGRA is not set
+# CONFIG_PWM_SUNXI is not set
+# CONFIG_U_QE is not set
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+# CONFIG_STM32_SDRAM is not set
+# CONFIG_MPC83XX_SDRAM is not set
+# CONFIG_K3_DDRSS is not set
+# CONFIG_IMXRT_SDRAM is not set
+# CONFIG_CADENCE_DDR_CTRL is not set
+CONFIG_RAM_ROCKCHIP=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_RAM_ROCKCHIP_DEBUG=y
+# CONFIG_RAM_ROCKCHIP_DDR4 is not set
+# CONFIG_RAM_ROCKCHIP_LPDDR2 is not set
+# CONFIG_RAM_ROCKCHIP_LPDDR3 is not set
+# CONFIG_RAM_ROCKCHIP_LPDDR4 is not set
+
+#
+# Reboot Mode Support
+#
+# CONFIG_DM_REBOOT_MODE is not set
+
+#
+# Remote Processor drivers
+#
+CONFIG_REMOTEPROC_MAX_FW_SIZE=0x10000
+
+#
+# Reset Controller Support
+#
+# CONFIG_RESET_AST2500 is not set
+# CONFIG_RESET_AST2600 is not set
+CONFIG_RESET_ROCKCHIP=y
+# CONFIG_RESET_HISILICON is not set
+# CONFIG_RESET_SYSCON is not set
+# CONFIG_RESET_SCMI is not set
+# CONFIG_RESET_DRA7 is not set
+CONFIG_DM_RNG=y
+# CONFIG_SPL_DM_RNG is not set
+# CONFIG_RNG_MSM is not set
+# CONFIG_RNG_NPCM is not set
+CONFIG_RNG_ROCKCHIP=y
+# CONFIG_RNG_IPROC200 is not set
+# CONFIG_RNG_SMCCC_TRNG is not set
+# CONFIG_RNG_ARM_RNDR is not set
+# CONFIG_RNG_EXYNOS is not set
+
+#
+# Real Time Clock
+#
+# CONFIG_DM_RTC is not set
+# CONFIG_SPL_DM_RTC is not set
+# CONFIG_TPL_DM_RTC is not set
+# CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set
+# CONFIG_RTC_DS1337 is not set
+# CONFIG_RTC_DS1338 is not set
+# CONFIG_RTC_DS1374 is not set
+# CONFIG_RTC_DS3231 is not set
+# CONFIG_RTC_PCF8563 is not set
+# CONFIG_RTC_PT7C4338 is not set
+# CONFIG_RTC_S35392A is not set
+# CONFIG_RTC_MC13XXX is not set
+# CONFIG_RTC_MC146818 is not set
+# CONFIG_RTC_M41T62 is not set
+# CONFIG_SCSI is not set
+CONFIG_SERIAL=y
+CONFIG_BAUDRATE=115200
+# CONFIG_DEFAULT_ENV_IS_RW is not set
+CONFIG_REQUIRE_SERIAL_CONSOLE=y
+# CONFIG_SPECIFY_CONSOLE_INDEX is not set
+CONFIG_SERIAL_PRESENT=y
+CONFIG_SPL_SERIAL_PRESENT=y
+CONFIG_TPL_SERIAL_PRESENT=y
+CONFIG_DM_SERIAL=y
+# CONFIG_SERIAL_RX_BUFFER is not set
+# CONFIG_SERIAL_PUTS is not set
+# CONFIG_SERIAL_SEARCH_ALL is not set
+# CONFIG_SERIAL_PROBE_ALL is not set
+CONFIG_SPL_DM_SERIAL=y
+CONFIG_TPL_DM_SERIAL=y
+# CONFIG_VPL_DM_SERIAL is not set
+CONFIG_DEBUG_UART_NS16550=y
+CONFIG_SPL_DEBUG_UART_BASE=0xff1a0000
+CONFIG_TPL_DEBUG_UART_BASE=0xff1a0000
 CONFIG_DEBUG_UART_SHIFT=2
+# CONFIG_DEBUG_UART_ANNOUNCE is not set
+# CONFIG_DEBUG_UART_SKIP_INIT is not set
+# CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED is not set
+# CONFIG_ALTERA_JTAG_UART is not set
+# CONFIG_ALTERA_UART is not set
+# CONFIG_ARC_SERIAL is not set
+# CONFIG_ARM_DCC is not set
+# CONFIG_ATMEL_USART is not set
+# CONFIG_BCM6345_SERIAL is not set
+# CONFIG_COREBOOT_SERIAL is not set
+# CONFIG_CORTINA_UART is not set
+# CONFIG_FSL_LINFLEXUART is not set
+# CONFIG_FSL_LPUART is not set
+# CONFIG_MVEBU_A3700_UART is not set
+# CONFIG_MCFUART is not set
+# CONFIG_NULLDEV_SERIAL is not set
+CONFIG_SYS_NS16550=y
+# CONFIG_NS16550_DYNAMIC is not set
 CONFIG_SYS_NS16550_MEM32=y
+# CONFIG_SYS_NS16550_PORT_MAPPED is not set
+# CONFIG_PL01X_SERIAL is not set
+# CONFIG_ROCKCHIP_SERIAL is not set
+# CONFIG_XILINX_UARTLITE is not set
+# CONFIG_MSM_SERIAL is not set
+# CONFIG_MSM_GENI_SERIAL is not set
+# CONFIG_MXS_AUART_SERIAL is not set
+# CONFIG_OMAP_SERIAL is not set
+# CONFIG_HTIF_CONSOLE is not set
+# CONFIG_SIFIVE_SERIAL is not set
+# CONFIG_ZYNQ_SERIAL is not set
+# CONFIG_MTK_SERIAL is not set
+# CONFIG_MT7620_SERIAL is not set
+# CONFIG_NPCM_SERIAL is not set
+# CONFIG_SM is not set
+# CONFIG_MESON_SM is not set
+# CONFIG_SMEM is not set
+
+#
+# Sound support
+#
+# CONFIG_SOUND is not set
+
+#
+# SOC (System On Chip) specific Drivers
+#
+# CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_QCOM is not set
+# CONFIG_SOC_SAMSUNG is not set
+# CONFIG_SOC_TI is not set
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_SPI_MEM=y
+# CONFIG_SPI_DIRMAP is not set
+# CONFIG_ALTERA_SPI is not set
+# CONFIG_APPLE_SPI is not set
+# CONFIG_ATCSPI200_SPI is not set
+# CONFIG_CORTINA_SFLASH is not set
+# CONFIG_CADENCE_QSPI is not set
+# CONFIG_CV1800B_SPIF is not set
+# CONFIG_DESIGNWARE_SPI is not set
+# CONFIG_FSL_QSPI is not set
+# CONFIG_GXP_SPI is not set
+# CONFIG_IPROC_QSPI is not set
+# CONFIG_MICROCHIP_COREQSPI is not set
+# CONFIG_MTK_SNOR is not set
+# CONFIG_MTK_SNFI_SPI is not set
+# CONFIG_MTK_SPIM is not set
+# CONFIG_MVEBU_A3700_SPI is not set
+# CONFIG_SPI_MXIC is not set
+# CONFIG_NPCM_FIU_SPI is not set
+# CONFIG_NPCM_PSPI is not set
+# CONFIG_NXP_FSPI is not set
+# CONFIG_OMAP3_SPI is not set
+# CONFIG_PL022_SPI is not set
+# CONFIG_ROCKCHIP_SFC is not set
 CONFIG_ROCKCHIP_SPI=y
+# CONFIG_SPI_ASPEED_SMC is not set
+# CONFIG_SPI_SIFIVE is not set
+# CONFIG_SOFT_SPI is not set
+# CONFIG_SPI_SN_F_OSPI is not set
+# CONFIG_SPI_SUNXI is not set
+# CONFIG_XILINX_SPI is not set
+# CONFIG_ZYNQ_SPI is not set
+# CONFIG_ZYNQ_QSPI is not set
+# CONFIG_ZYNQMP_GQSPI is not set
+# CONFIG_SPI_STACKED_PARALLEL is not set
+
+#
+# SPMI support
+#
+# CONFIG_SPMI is not set
+# CONFIG_SYSINFO is not set
+
+#
+# System reset device drivers
+#
 CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_TPL_SYSRESET=y
+CONFIG_SYSRESET_CMD_RESET=y
+CONFIG_SYSRESET_CMD_POWEROFF=y
+# CONFIG_SYSRESET_CV1800B is not set
+# CONFIG_POWEROFF_GPIO is not set
+# CONFIG_SYSRESET_GPIO is not set
+# CONFIG_SYSRESET_PSCI is not set
+# CONFIG_SYSRESET_SYSCON is not set
+# CONFIG_SYSRESET_WATCHDOG is not set
+# CONFIG_SYSRESET_RESETCTL is not set
+# CONFIG_SYSRESET_MPC83XX is not set
+# CONFIG_TEE is not set
+# CONFIG_DM_THERMAL is not set
+
+#
+# Timer Support
+#
+# CONFIG_TIMER is not set
+
+#
+# TPM support
+#
 CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_SPL_DM_USB=y
+# CONFIG_DM_USB_GADGET is not set
+# CONFIG_SPL_DM_USB_GADGET is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_HOST=y
+# CONFIG_SPL_USB_HOST is not set
 CONFIG_USB_XHCI_HCD=y
+# CONFIG_USB_XHCI_DWC3 is not set
+# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
+# CONFIG_USB_XHCI_GENERIC is not set
+# CONFIG_USB_XHCI_FSL is not set
+# CONFIG_USB_XHCI_BRCM is not set
 CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_MSM is not set
+# CONFIG_USB_EHCI_PCI is not set
+# CONFIG_USB_EHCI_ZYNQ is not set
 CONFIG_USB_EHCI_GENERIC=y
+# CONFIG_USB_EHCI_FSL is not set
+CONFIG_USB_OHCI_NEW=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
+# CONFIG_USB_OHCI_DA8XX is not set
+# CONFIG_SYS_OHCI_SWAP_REG_ACCESS is not set
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_DWC2 is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_ISP1760 is not set
+# CONFIG_USB_CDNS3 is not set
 CONFIG_USB_DWC3=y
+
+#
+# Platform Glue Driver Support
+#
+# CONFIG_USB_DWC3_OMAP is not set
 CONFIG_USB_DWC3_GENERIC=y
+# CONFIG_SPL_USB_DWC3_GENERIC is not set
+# CONFIG_USB_DWC3_AM62 is not set
+# CONFIG_USB_DWC3_LAYERSCAPE is not set
+# CONFIG_USB_DWC3_STI is not set
+
+#
+# PHY Subsystem
+#
+# CONFIG_USB_DWC3_PHY_OMAP is not set
+# CONFIG_USB_DWC3_PHY_SAMSUNG is not set
+
+#
+# Legacy MUSB Support
+#
+# CONFIG_USB_MUSB_HCD is not set
+# CONFIG_USB_MUSB_UDC is not set
+
+#
+# MUSB Controller Driver
+#
+# CONFIG_USB_MUSB_HOST is not set
+# CONFIG_USB_MUSB_PIO_ONLY is not set
+
+#
+# USB Phy
+#
+# CONFIG_TWL4030_USB is not set
+# CONFIG_ROCKCHIP_USB2_PHY is not set
+# CONFIG_TYPEC_TCPM is not set
+
+#
+# ULPI drivers
+#
+
+#
+# USB peripherals
+#
+CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
+# CONFIG_USB_ONBOARD_HUB is not set
+CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=1000
+CONFIG_USB_KEYBOARD_FN_KEYS=y
+CONFIG_SYS_USB_EVENT_POLL=y
+# CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE is not set
+# CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is not set
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
+# CONFIG_USB_ETHER_LAN75XX is not set
+# CONFIG_USB_ETHER_LAN78XX is not set
 CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
+# CONFIG_USB_GADGET is not set
+# CONFIG_SPL_USB_GADGET is not set
+
+#
+# UFS Host Controller Support
+#
+# CONFIG_TI_J721E_UFS is not set
+
+#
+# Graphics support
+#
 CONFIG_VIDEO=y
+# CONFIG_VIDEO_FONT_4X6 is not set
+CONFIG_VIDEO_FONT_8X16=y
+# CONFIG_VIDEO_FONT_SUN12X22 is not set
+# CONFIG_VIDEO_FONT_16X32 is not set
+CONFIG_VIDEO_LOGO=y
+CONFIG_BACKLIGHT=y
+CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x0
+# CONFIG_VIDEO_COPY is not set
+CONFIG_VIDEO_DAMAGE=y
+CONFIG_BACKLIGHT_PWM=y
+# CONFIG_BACKLIGHT_GPIO is not set
+CONFIG_VIDEO_BPP8=y
+CONFIG_VIDEO_BPP16=y
+CONFIG_VIDEO_BPP32=y
+CONFIG_VIDEO_ANSI=y
+# CONFIG_VIDEO_MIPI_DSI is not set
+CONFIG_CONSOLE_NORMAL=y
+# CONFIG_CONSOLE_ROTATION is not set
+# CONFIG_CONSOLE_TRUETYPE is not set
+CONFIG_SYS_WHITE_ON_BLACK=y
+# CONFIG_NO_FB_CLEAR is not set
+CONFIG_VIDEO_SYNC_MS=100
+CONFIG_VIDEO_SYNC_CYCLIC_MS=10
+CONFIG_PANEL=y
+CONFIG_SIMPLE_PANEL=y
+# CONFIG_PANEL_HX8238D is not set
+
+#
+# TrueType Fonts
+#
+# CONFIG_VIDCONSOLE_AS_LCD is not set
+# CONFIG_VIDEO_BOCHS is not set
+# CONFIG_VIDEO_VESA is not set
+# CONFIG_VIDEO_LCD_ANX9804 is not set
+# CONFIG_ATMEL_LCD_BGR555 is not set
+# CONFIG_VIDEO_BCM2835 is not set
+# CONFIG_VIDEO_LCD_ENDEAVORU is not set
+# CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
+# CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
+# CONFIG_VIDEO_LCD_LG_LD070WX3 is not set
+# CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
+# CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
+# CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
+# CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set
+# CONFIG_VIDEO_LCD_SHARP_LQ101R1SX01 is not set
+# CONFIG_VIDEO_LCD_SSD2828 is not set
+# CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
+# CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
+# CONFIG_VIDEO_MESON is not set
+# CONFIG_VIDEO_MVEBU is not set
+CONFIG_I2C_EDID=y
 CONFIG_DISPLAY=y
+# CONFIG_NXP_TDA19988 is not set
+# CONFIG_ATMEL_HLCD is not set
+# CONFIG_BACKLIGHT_LM3533 is not set
+# CONFIG_AM335X_LCD is not set
+# CONFIG_VIDEO_EXYNOS is not set
+# CONFIG_LOGICORE_DP_TX is not set
 CONFIG_VIDEO_ROCKCHIP=y
 CONFIG_VIDEO_ROCKCHIP_MAX_XRES=1280
 CONFIG_VIDEO_ROCKCHIP_MAX_YRES=800
 CONFIG_DISPLAY_ROCKCHIP_EDP=y
+# CONFIG_DISPLAY_ROCKCHIP_LVDS is not set
+# CONFIG_DISPLAY_ROCKCHIP_HDMI is not set
+# CONFIG_DISPLAY_ROCKCHIP_MIPI is not set
+# CONFIG_DISPLAY_ROCKCHIP_DW_MIPI is not set
+# CONFIG_VIDEO_ARM_MALIDP is not set
+# CONFIG_VIDEO_STM32 is not set
+# CONFIG_VIDEO_TIDSS is not set
+# CONFIG_VIDEO_TEGRA124 is not set
+# CONFIG_VIDEO_BRIDGE is not set
+# CONFIG_VIDEO_BRIDGE_PARADE_DP501 is not set
+# CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825 is not set
+# CONFIG_VIDEO_BRIDGE_TOSHIBA_TC358768 is not set
+# CONFIG_VIDEO_TEGRA20 is not set
+# CONFIG_VIDEO_DSI_TEGRA30 is not set
+# CONFIG_TEGRA_BACKLIGHT_PWM is not set
+# CONFIG_VIDEO_MXS is not set
+# CONFIG_VIDEO_SEPS525 is not set
+CONFIG_CONSOLE_SCROLL_LINES=1
+# CONFIG_VIDEO_SIMPLE is not set
+# CONFIG_VIDEO_DT_SIMPLEFB is not set
+# CONFIG_VIDEO_MCDE_SIMPLE is not set
+# CONFIG_OSD is not set
+# CONFIG_VIDEO_REMOVE is not set
+# CONFIG_SPLASH_SCREEN is not set
+# CONFIG_BMP is not set
+CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
+CONFIG_VIDEO_BMP_RLE8=y
+# CONFIG_BMP_16BPP is not set
+# CONFIG_BMP_24BPP is not set
+# CONFIG_BMP_32BPP is not set
+# CONFIG_SPL_VIDEO is not set
+
+#
+# VirtIO Drivers
+#
+# CONFIG_VIRTIO_MMIO is not set
+
+#
+# 1-Wire support
+#
+# CONFIG_W1 is not set
+
+#
+# 1-wire EEPROM support
+#
+# CONFIG_W1_EEPROM is not set
+
+#
+# Watchdog Timer Support
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_IMX_WATCHDOG is not set
+# CONFIG_ULP_WATCHDOG is not set
+# CONFIG_WDT is not set
+# CONFIG_SPL_WDT is not set
+# CONFIG_PHYS_TO_BUS is not set
+
+#
+# File systems
+#
+# CONFIG_FS_BTRFS is not set
+# CONFIG_FS_CBFS is not set
+# CONFIG_SPL_FS_CBFS is not set
+CONFIG_FS_EXT4=y
+# CONFIG_EXT4_WRITE is not set
+CONFIG_FS_FAT=y
+CONFIG_FAT_WRITE=y
+CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
+# CONFIG_FS_JFFS2 is not set
+# CONFIG_UBIFS_SILENCE_MSG is not set
+# CONFIG_UBIFS_SILENCE_DEBUG_DUMP is not set
+# CONFIG_FS_CRAMFS is not set
+# CONFIG_FS_SQUASHFS is not set
+# CONFIG_FS_EROFS is not set
+
+#
+# Library routines
+#
+# CONFIG_ADDR_MAP is not set
+# CONFIG_SYS_TIMER_COUNTS_DOWN is not set
+# CONFIG_PHYSMEM is not set
+# CONFIG_BCH is not set
 # CONFIG_BINMAN_FDT is not set
+CONFIG_BINMAN_DTB=""
+# CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set
+CONFIG_CHARSET=y
+# CONFIG_DYNAMIC_CRC_TABLE is not set
+CONFIG_LIB_UUID=y
+CONFIG_RANDOM_UUID=y
+CONFIG_SPL_LIB_UUID=y
+# CONFIG_SEMIHOSTING is not set
+# CONFIG_SPL_SEMIHOSTING is not set
+CONFIG_PRINTF=y
+CONFIG_SPL_PRINTF=y
+CONFIG_TPL_PRINTF=y
+CONFIG_SPRINTF=y
+CONFIG_SPL_SPRINTF=y
+CONFIG_TPL_SPRINTF=y
+CONFIG_STRTO=y
+CONFIG_SPL_STRTO=y
+CONFIG_TPL_STRTO=y
+CONFIG_SYS_HZ=1000
+CONFIG_SPL_USE_TINY_PRINTF=y
+CONFIG_TPL_USE_TINY_PRINTF=y
 CONFIG_PANIC_HANG=y
+CONFIG_REGEX=y
+CONFIG_LIB_RAND=y
+# CONFIG_LIB_HW_RAND is not set
+CONFIG_SUPPORT_ACPI=y
+# CONFIG_ACPI is not set
+# CONFIG_SPL_ACPI is not set
+# CONFIG_SPL_TINY_MEMSET is not set
+CONFIG_TPL_TINY_MEMSET=y
+# CONFIG_BITREVERSE is not set
+# CONFIG_TRACE is not set
+# CONFIG_CIRCBUF is not set
 CONFIG_CMD_DHRYSTONE=y
+
+#
+# Alternative crypto libraries
+#
+CONFIG_LEGACY_HASHING_AND_CRYPTO=y
+# CONFIG_MBEDTLS_LIB is not set
+CONFIG_LEGACY_HASHING=y
+CONFIG_SHA1_LEGACY=y
+CONFIG_SHA256_LEGACY=y
+CONFIG_MD5_LEGACY=y
+CONFIG_LEGACY_CRYPTO=y
+CONFIG_SPL_LEGACY_HASHING_AND_CRYPTO=y
+# CONFIG_SPL_MBEDTLS_LIB is not set
+CONFIG_SPL_LEGACY_HASHING=y
+CONFIG_SPL_SHA1_LEGACY=y
+CONFIG_SPL_SHA256_LEGACY=y
+CONFIG_SPL_LEGACY_CRYPTO=y
+CONFIG_TPL_LEGACY_HASHING_AND_CRYPTO=y
+# CONFIG_TPL_MBEDTLS_LIB is not set
+CONFIG_TPL_LEGACY_HASHING=y
+
+#
+# Security support
+#
+# CONFIG_AES is not set
+# CONFIG_ECDSA is not set
+CONFIG_RSA=y
+CONFIG_SPL_RSA=y
+CONFIG_SPL_RSA_VERIFY=y
+CONFIG_RSA_VERIFY=y
+# CONFIG_RSA_VERIFY_WITH_PKEY is not set
+# CONFIG_SPL_RSA_VERIFY_WITH_PKEY is not set
+CONFIG_RSA_SOFTWARE_EXP=y
+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
+# CONFIG_TPM is not set
+# CONFIG_SPL_TPM is not set
+# CONFIG_TPL_TPM is not set
+
+#
+# Android Verified Boot
+#
+
+#
+# Hashing Support
+#
+# CONFIG_BLAKE2 is not set
+CONFIG_SHA1=y
+CONFIG_SHA256=y
+# CONFIG_SHA512 is not set
+# CONFIG_SHA384 is not set
+# CONFIG_SHA_HW_ACCEL is not set
+CONFIG_SPL_CRC32=y
+CONFIG_SPL_SHA1=y
+CONFIG_SPL_SHA256=y
+# CONFIG_SPL_SHA512 is not set
+# CONFIG_SPL_SHA384 is not set
+# CONFIG_SPL_SHA_HW_ACCEL is not set
+CONFIG_MD5=y
+# CONFIG_SPL_MD5 is not set
+CONFIG_CRC8=y
+CONFIG_SPL_CRC8=y
+# CONFIG_TPL_CRC8 is not set
+CONFIG_CRC16=y
+# CONFIG_SPL_CRC16 is not set
+CONFIG_CRC32=y
+
+#
+# Compression Support
+#
+CONFIG_LZ4=y
+CONFIG_LZMA=y
+# CONFIG_LZO is not set
+CONFIG_GZIP=y
+# CONFIG_ZLIB_UNCOMPRESS is not set
+# CONFIG_BZIP2 is not set
+CONFIG_ZLIB=y
+# CONFIG_ZSTD is not set
+# CONFIG_SPL_BZIP2 is not set
+# CONFIG_SPL_LZ4 is not set
+# CONFIG_TPL_LZ4 is not set
+# CONFIG_SPL_LZMA is not set
+# CONFIG_TPL_LZMA is not set
+CONFIG_VPL_LZMA=y
+# CONFIG_SPL_LZO is not set
+# CONFIG_SPL_GZIP is not set
+# CONFIG_TPL_GZIP is not set
+# CONFIG_SPL_ZSTD is not set
 CONFIG_ERRNO_STR=y
 # CONFIG_HEXDUMP is not set
+CONFIG_GETOPT=y
+CONFIG_OF_LIBFDT=y
+CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
+CONFIG_SYS_FDT_PAD=0x3000
+CONFIG_SPL_OF_LIBFDT=y
+CONFIG_TPL_OF_LIBFDT=y
+CONFIG_TPL_OF_LIBFDT_ASSUME_MASK=0xff
+
+#
+# System tables
+#
+# CONFIG_BLOBLIST_TABLES is not set
+CONFIG_GENERATE_SMBIOS_TABLE=y
+# CONFIG_GENERATE_SMBIOS_TABLE_VERBOSE is not set
+# CONFIG_LIB_RATIONAL is not set
+# CONFIG_SPL_LIB_RATIONAL is not set
+CONFIG_SMBIOS=y
+# CONFIG_SMBIOS_PARSER is not set
+# CONFIG_OPTEE_LIB is not set
+# CONFIG_OPTEE_IMAGE is not set
+# CONFIG_BOOTM_OPTEE is not set
+# CONFIG_TEST_FDTDEC is not set
+CONFIG_LIB_ELF=y
+CONFIG_LMB=y
+# CONFIG_LMB_ARCH_MEM_MAP is not set
+# CONFIG_PHANDLE_CHECK_SEQ is not set
+
+#
+# Testing
+#
+# CONFIG_UNIT_TEST is not set
+# CONFIG_SPL_UNIT_TEST is not set
+# CONFIG_POST is not set
+
+#
+# Tools options
+#
+CONFIG_MKIMAGE_DTC_PATH="dtc"
+CONFIG_TOOLS_CRC16=y
+CONFIG_TOOLS_CRC32=y
+CONFIG_TOOLS_LIBCRYPTO=y
+CONFIG_TOOLS_KWBIMAGE=y
+CONFIG_TOOLS_FIT=y
+CONFIG_TOOLS_FIT_FULL_CHECK=y
+CONFIG_TOOLS_FIT_PRINT=y
+CONFIG_TOOLS_FIT_RSASSA_PSS=y
+CONFIG_TOOLS_FIT_SIGNATURE=y
+CONFIG_TOOLS_FIT_SIGNATURE_MAX_SIZE=0x10000000
+CONFIG_TOOLS_FIT_VERBOSE=y
+CONFIG_TOOLS_MD5=y
+CONFIG_TOOLS_OF_LIBFDT=y
+CONFIG_TOOLS_SHA1=y
+CONFIG_TOOLS_SHA256=y
+CONFIG_TOOLS_SHA384=y
+CONFIG_TOOLS_SHA512=y
+CONFIG_TOOLS_MKEFICAPSULE=y
+# CONFIG_FSPI_CONF_HEADER is not set
+# CONFIG_TOOLS_MKFWUMDATA is not set
diff --git a/config/u-boot/gru_kevin/config/default b/config/u-boot/gru_kevin/config/default
index df3a0747..978e6760 100644
--- a/config/u-boot/gru_kevin/config/default
+++ b/config/u-boot/gru_kevin/config/default
@@ -1,129 +1,2594 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# U-Boot 2025.04 Configuration
+#
+
+#
+# Compiler: gcc (Debian 14.2.0-19) 14.2.0
+#
+CONFIG_CREATE_ARCH_SYMLINK=y
+CONFIG_HAVE_SETJMP=y
+CONFIG_SUPPORT_LITTLE_ENDIAN=y
+CONFIG_SYS_CACHE_SHIFT_6=y
+CONFIG_64BIT=y
+CONFIG_SPL_64BIT=y
+CONFIG_SYS_CACHELINE_SIZE=64
+CONFIG_LINKER_LIST_ALIGN=8
+# CONFIG_ARC is not set
 CONFIG_ARM=y
+# CONFIG_M68K is not set
+# CONFIG_MICROBLAZE is not set
+# CONFIG_MIPS is not set
+# CONFIG_NIOS2 is not set
+# CONFIG_PPC is not set
+# CONFIG_RISCV is not set
+# CONFIG_SANDBOX is not set
+# CONFIG_SH is not set
+# CONFIG_X86 is not set
+# CONFIG_XTENSA is not set
+CONFIG_SYS_ARCH="arm"
+CONFIG_SYS_CPU="armv8"
+CONFIG_SYS_SOC="rk3399"
+CONFIG_SYS_VENDOR="google"
+CONFIG_SYS_BOARD="gru"
+CONFIG_SYS_CONFIG_NAME="gru"
+
+#
+# Skipping low level initialization functions
+#
 CONFIG_SKIP_LOWLEVEL_INIT=y
+# CONFIG_SPL_SKIP_LOWLEVEL_INIT is not set
+# CONFIG_TPL_SKIP_LOWLEVEL_INIT is not set
+# CONFIG_SKIP_LOWLEVEL_INIT_ONLY is not set
+# CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY is not set
+# CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY is not set
+# CONFIG_SYS_ICACHE_OFF is not set
+# CONFIG_SPL_SYS_ICACHE_OFF is not set
+# CONFIG_SYS_DCACHE_OFF is not set
+# CONFIG_SPL_SYS_DCACHE_OFF is not set
+
+#
+# ARM architecture
+#
+CONFIG_ARM64=y
+CONFIG_ARM64_CRC32=y
 CONFIG_COUNTER_FREQUENCY=24000000
 CONFIG_POSITION_INDEPENDENT=y
+CONFIG_INIT_SP_RELATIVE=y
+CONFIG_SYS_INIT_SP_BSS_OFFSET=524288
+CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE=0x18000000
+# CONFIG_DRIVER_GICV2 is not set
+# CONFIG_GIC_V3_ITS is not set
+# CONFIG_GICV3_SUPPORT_GIC600 is not set
+CONFIG_STATIC_RELA=y
+CONFIG_DMA_ADDR_T_64BIT=y
+CONFIG_ARM_ASM_UNIFIED=y
+# CONFIG_SYS_ARM_CACHE_CP15 is not set
+# CONFIG_SYS_ARM_MMU is not set
+# CONFIG_SYS_ARM_MPU is not set
+CONFIG_SYS_ARM_ARCH=8
+CONFIG_SYS_ARM_CACHE_WRITEBACK=y
+# CONFIG_SYS_ARM_CACHE_WRITETHROUGH is not set
+# CONFIG_SYS_ARM_CACHE_WRITEALLOC is not set
+# CONFIG_ARCH_CPU_INIT is not set
+CONFIG_SYS_ARCH_TIMER=y
+CONFIG_ARM_SMCCC=y
+# CONFIG_SYS_L2_PL310 is not set
+# CONFIG_SPL_SYS_L2_PL310 is not set
+# CONFIG_SYS_L2CACHE_OFF is not set
+CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+# CONFIG_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_TPL_USE_ARCH_MEMCPY is not set
+# CONFIG_USE_ARCH_MEMSET is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
+# CONFIG_TPL_USE_ARCH_MEMSET is not set
+CONFIG_ARM64_SUPPORT_AARCH32=y
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_HISTB is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_MVEBU is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_BCM283X is not set
+# CONFIG_ARCH_BCMSTB is not set
+# CONFIG_ARCH_BCMBCA is not set
+# CONFIG_TARGET_VEXPRESS_CA9X4 is not set
+# CONFIG_TARGET_BCMNS is not set
+# CONFIG_TARGET_BCMNS3 is not set
+# CONFIG_ARCH_EXYNOS is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_HIGHBANK is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_IPQ40XX is not set
+# CONFIG_ARCH_KEYSTONE is not set
+# CONFIG_ARCH_K3 is not set
+# CONFIG_ARCH_OMAP2PLUS is not set
+# CONFIG_ARCH_MESON is not set
+# CONFIG_ARCH_MEDIATEK is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_LPC32XX is not set
+# CONFIG_ARCH_IMX8 is not set
+# CONFIG_ARCH_IMX8M is not set
+# CONFIG_ARCH_IMX8ULP is not set
+# CONFIG_ARCH_IMX9 is not set
+# CONFIG_ARCH_IMXRT is not set
+# CONFIG_ARCH_MX23 is not set
+# CONFIG_ARCH_MX28 is not set
+# CONFIG_ARCH_MX31 is not set
+# CONFIG_ARCH_MX7ULP is not set
+# CONFIG_ARCH_MX7 is not set
+# CONFIG_ARCH_MX6 is not set
+# CONFIG_ARCH_MX5 is not set
+# CONFIG_ARCH_NEXELL is not set
+# CONFIG_ARCH_NPCM is not set
+# CONFIG_ARCH_APPLE is not set
+# CONFIG_ARCH_OWL is not set
+# CONFIG_ARCH_QEMU is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_SNAPDRAGON is not set
+# CONFIG_ARCH_SOCFPGA is not set
+# CONFIG_ARCH_SUNXI is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_VERSAL is not set
+# CONFIG_ARCH_VERSAL2 is not set
+# CONFIG_ARCH_VERSAL_NET is not set
+# CONFIG_ARCH_VF610 is not set
+# CONFIG_ARCH_ZYNQ is not set
+# CONFIG_ARCH_ZYNQMP_R5 is not set
+# CONFIG_ARCH_ZYNQMP is not set
+# CONFIG_ARCH_TEGRA is not set
+# CONFIG_ARCH_VEXPRESS64 is not set
+# CONFIG_TARGET_CORSTONE1000 is not set
+# CONFIG_TARGET_TOTAL_COMPUTE is not set
+# CONFIG_TARGET_LS2080A_EMU is not set
+# CONFIG_TARGET_LS1088AQDS is not set
+# CONFIG_TARGET_LS2080AQDS is not set
+# CONFIG_TARGET_LS2080ARDB is not set
+# CONFIG_TARGET_LS2081ARDB is not set
+# CONFIG_TARGET_LX2160ARDB is not set
+# CONFIG_TARGET_LX2160AQDS is not set
+# CONFIG_TARGET_LX2162AQDS is not set
+# CONFIG_TARGET_HIKEY is not set
+# CONFIG_TARGET_HIKEY960 is not set
+# CONFIG_TARGET_POPLAR is not set
+# CONFIG_TARGET_LS1012AQDS is not set
+# CONFIG_TARGET_LS1012ARDB is not set
+# CONFIG_TARGET_LS1012A2G5RDB is not set
+# CONFIG_TARGET_LS1012AFRWY is not set
+# CONFIG_TARGET_LS1012AFRDM is not set
+# CONFIG_TARGET_LS1028AQDS is not set
+# CONFIG_TARGET_LS1028ARDB is not set
+# CONFIG_TARGET_LS1088ARDB is not set
+# CONFIG_TARGET_LS1021AQDS is not set
+# CONFIG_TARGET_LS1021ATWR is not set
+# CONFIG_TARGET_PG_WCOM_SELI8 is not set
+# CONFIG_TARGET_PG_WCOM_EXPU1 is not set
+# CONFIG_TARGET_LS1021ATSN is not set
+# CONFIG_TARGET_LS1021AIOT is not set
+# CONFIG_TARGET_LS1043AQDS is not set
+# CONFIG_TARGET_LS1043ARDB is not set
+# CONFIG_TARGET_LS1046AQDS is not set
+# CONFIG_TARGET_LS1046ARDB is not set
+# CONFIG_TARGET_LS1046AFRWY is not set
+# CONFIG_ARCH_SC5XX is not set
+# CONFIG_TARGET_SL28 is not set
+# CONFIG_TARGET_TEN64 is not set
+# CONFIG_ARCH_UNIPHIER is not set
+# CONFIG_ARCH_SYNQUACER is not set
+# CONFIG_ARCH_STM32 is not set
+# CONFIG_ARCH_STI is not set
+# CONFIG_ARCH_STM32MP is not set
 CONFIG_ARCH_ROCKCHIP=y
+# CONFIG_ARCH_OCTEONTX is not set
+# CONFIG_ARCH_OCTEONTX2 is not set
+# CONFIG_TARGET_THUNDERX_88XX is not set
+# CONFIG_ARCH_ASPEED is not set
+# CONFIG_TARGET_DURIAN is not set
+# CONFIG_TARGET_POMELO is not set
+# CONFIG_TARGET_PE2201 is not set
+# CONFIG_TARGET_PRESIDIO_ASIC is not set
+# CONFIG_TARGET_XENGUEST_ARM64 is not set
+# CONFIG_ARCH_GXP is not set
 CONFIG_TEXT_BASE=0x18000000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x10000
+CONFIG_BLOBLIST_SIZE_RELOC=0x1000
 CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL_LDSCRIPT="arch/arm/cpu/armv8/u-boot-spl.lds"
+CONFIG_ENV_SOURCE_FILE=""
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x3f00000
 CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_SF_DEFAULT_MODE=0x0
+CONFIG_ENV_SIZE=0x1f000
+CONFIG_DM_GPIO=y
+CONFIG_SPL_DM_SPI=y
 CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-kevin"
+CONFIG_DDR_SI_TEST=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
 CONFIG_DM_RESET=y
+CONFIG_SYS_MONITOR_LEN=0
+# CONFIG_ROCKCHIP_PX30 is not set
+# CONFIG_ROCKCHIP_RK3036 is not set
+# CONFIG_ROCKCHIP_RK3066 is not set
+# CONFIG_ROCKCHIP_RK3128 is not set
+# CONFIG_ROCKCHIP_RK3188 is not set
+# CONFIG_ROCKCHIP_RK322X is not set
+# CONFIG_ROCKCHIP_RK3288 is not set
+# CONFIG_ROCKCHIP_RK3308 is not set
+# CONFIG_ROCKCHIP_RK3328 is not set
+# CONFIG_ROCKCHIP_RK3368 is not set
 CONFIG_ROCKCHIP_RK3399=y
+# CONFIG_ROCKCHIP_RK3568 is not set
+# CONFIG_ROCKCHIP_RK3588 is not set
+# CONFIG_ROCKCHIP_RV1108 is not set
+# CONFIG_ROCKCHIP_RV1126 is not set
+# CONFIG_ROCKCHIP_USB_UART is not set
+# CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set
+CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y
+CONFIG_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
+# CONFIG_ROCKCHIP_EXTERNAL_TPL is not set
 CONFIG_ROCKCHIP_BOOT_MODE_REG=0
+# CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON is not set
+CONFIG_ROCKCHIP_STIMER=y
+CONFIG_ROCKCHIP_STIMER_BASE=0xff8680a0
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
+CONFIG_ROCKCHIP_BROM_HELPER=y
+# CONFIG_SPL_ROCKCHIP_EARLYRETURN_TO_BROM is not set
+CONFIG_ROCKCHIP_DISABLE_FORCE_JTAG=y
+# CONFIG_TPL_ROCKCHIP_EARLYRETURN_TO_BROM is not set
 # CONFIG_SPL_MMC is not set
+CONFIG_ROCKCHIP_SPI_IMAGE=y
+CONFIG_ROCKCHIP_COMMON_STACK_ADDR=y
+CONFIG_SPL_SERIAL=y
+CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
+CONFIG_TPL_TEXT_BASE=0xff8c2000
+CONFIG_TPL_STACK=0xff8effff
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x4000
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_TPL_SERIAL=y
+# CONFIG_SPL_DRIVERS_MISC is not set
+CONFIG_SPL_STACK_R_ADDR=0x3e00000
+# CONFIG_TARGET_CHROMEBOOK_BOB is not set
 CONFIG_TARGET_CHROMEBOOK_KEVIN=y
+# CONFIG_TARGET_EVB_RK3399 is not set
+# CONFIG_TARGET_PINEBOOK_PRO_RK3399 is not set
+# CONFIG_TARGET_PINEPHONE_PRO_RK3399 is not set
+# CONFIG_TARGET_PUMA_RK3399 is not set
+# CONFIG_TARGET_ROCK960_RK3399 is not set
+# CONFIG_TARGET_ROCKPI4_RK3399 is not set
+# CONFIG_TARGET_ROCKPRO64_RK3399 is not set
+# CONFIG_TARGET_ROC_PC_RK3399 is not set
+CONFIG_TPL_SYS_MALLOC_F=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL_TEXT_BASE=0x0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x3f80000
+CONFIG_SPL_BSS_MAX_SIZE=0x8000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000
+CONFIG_SYS_BOOTM_LEN=0x4000000
 CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
+CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff
 CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SF_DEFAULT_CS=0
+CONFIG_SPL_SYS_MALLOC_F=y
+CONFIG_ERR_PTR_OFFSET=0x0
+CONFIG_SPL_SIZE_LIMIT=0x0
+CONFIG_SPL=y
+CONFIG_PRE_CON_BUF_ADDR=0x0f200000
+CONFIG_PRE_CON_BUF_SZ=4096
 CONFIG_DEBUG_UART_BASE=0xff1a0000
 CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_BOARD_INIT=y
+CONFIG_IDENT_STRING=""
+CONFIG_SYS_CLK_FREQ=0
+# CONFIG_CHIP_DIP_SCAN is not set
+# CONFIG_SPL_FS_FAT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
+# CONFIG_CMO_BY_VA_ONLY is not set
+# CONFIG_ARMV8_SPL_EXCEPTION_VECTORS is not set
+# CONFIG_ARMV8_MULTIENTRY is not set
+CONFIG_ARMV8_SET_SMPEN=y
+# CONFIG_ARMV8_SWITCH_TO_EL1 is not set
+
+#
+# ARMv8 secure monitor firmware
+#
+# CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT is not set
+# CONFIG_SPL_ARMV8_SEC_FIRMWARE_SUPPORT is not set
+# CONFIG_SPL_RECOVER_DATA_SECTION is not set
+CONFIG_PSCI_RESET=y
+# CONFIG_ARMV8_PSCI is not set
+# CONFIG_ARMV8_EA_EL3_FIRST is not set
+# CONFIG_ARMV8_UDELAY_EVENT_STREAM is not set
+CONFIG_ARMV8_CRYPTO=y
+CONFIG_ARMV8_CE_SHA1=y
+CONFIG_ARMV8_CE_SHA256=y
+CONFIG_SYS_MEM_TOP_HIDE=0x0
+
+#
+# ARM debug
+#
+CONFIG_TPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAYLOAD="tpl/u-boot-with-tpl.bin"
+CONFIG_BUILD_TARGET=""
+# CONFIG_PCI is not set
+CONFIG_FWU_NUM_BANKS=2
+CONFIG_FWU_NUM_IMAGES_PER_BANK=2
+CONFIG_TPL_SIZE_LIMIT=0x0
 CONFIG_DEBUG_UART=y
+# CONFIG_AHCI is not set
+# CONFIG_OF_BOARD_FIXUP is not set
+
+#
+# Functionality shared between NXP SoCs
+#
+# CONFIG_NXP_ESBC is not set
+CONFIG_SYS_LITTLE_ENDIAN=y
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_CC_IS_GCC=y
+CONFIG_GCC_VERSION=140200
+CONFIG_CLANG_VERSION=0
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+# CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
+# CONFIG_CC_OPTIMIZE_FOR_DEBUG is not set
+# CONFIG_OPTIMIZE_INLINING is not set
+# CONFIG_SPL_OPTIMIZE_INLINING is not set
+CONFIG_ARCH_SUPPORTS_LTO=y
+# CONFIG_LTO is not set
+# CONFIG_TPL_OPTIMIZE_INLINING is not set
+CONFIG_CC_HAS_ASM_INLINE=y
+# CONFIG_XEN is not set
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+# CONFIG_SYS_BOOT_GET_CMDLINE is not set
+# CONFIG_SYS_BOOT_GET_KBD is not set
+CONFIG_SYS_MALLOC_F=y
+# CONFIG_VALGRIND is not set
+CONFIG_EXPERT=y
+CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y
+CONFIG_SPL_SYS_MALLOC_CLEAR_ON_INIT=y
+# CONFIG_SYS_MALLOC_DEFAULT_TO_INIT is not set
+# CONFIG_TOOLS_DEBUG is not set
+CONFIG_PHYS_64BIT=y
+CONFIG_FDT_64BIT=y
+CONFIG_HAS_ROM=y
+CONFIG_SPL_IMAGE="spl/u-boot-spl.bin"
 CONFIG_REMAKE_ELF=y
+# CONFIG_HAS_BOARD_SIZE_LIMIT is not set
+# CONFIG_SYS_CUSTOM_LDSCRIPT is not set
+CONFIG_PLATFORM_ELFENTRY="_start"
+CONFIG_STACK_SIZE=0x1000000
+# CONFIG_MP is not set
+CONFIG_HAVE_TEXT_BASE=y
+# CONFIG_HAVE_SYS_UBOOT_START is not set
+CONFIG_SYS_UBOOT_START=0x18000000
+# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
+# CONFIG_API is not set
+
+#
+# Boot options
+#
+
+#
+# UEFI Support
+#
+CONFIG_EFI_LOADER=y
+CONFIG_EFI_BINARY_EXEC=y
+# CONFIG_EFI_SECURE_BOOT is not set
+
+#
+# UEFI services
+#
+CONFIG_EFI_HAVE_RUNTIME_RESET=y
+
+#
+# UEFI Variables
+#
+# CONFIG_EFI_VARIABLE_FILE_STORE is not set
 CONFIG_EFI_VARIABLE_NO_STORE=y
+# CONFIG_EFI_VARIABLES_PRESEED is not set
+CONFIG_EFI_VAR_BUF_SIZE=131072
+CONFIG_EFI_PLATFORM_LANG_CODES="en-US"
+
+#
+# Capsule support
+#
+# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
+# CONFIG_EFI_CAPSULE_ON_DISK is not set
+CONFIG_EFI_CAPSULE_MAX=15
+
+#
+# UEFI protocol support
+#
+CONFIG_EFI_DEVICE_PATH_TO_TEXT=y
+CONFIG_EFI_DEVICE_PATH_UTIL=y
+CONFIG_EFI_DT_FIXUP=y
+CONFIG_EFI_LOADER_HII=y
+CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y
+CONFIG_EFI_UNICODE_CAPITALIZATION=y
+CONFIG_EFI_RNG_PROTOCOL=y
+CONFIG_EFI_LOAD_FILE2_INITRD=y
+# CONFIG_EFI_IP4_CONFIG2_PROTOCOL is not set
+
+#
+# Misc options
+#
+# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set
+CONFIG_EFI_ECPT=y
+CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
+# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
+
+#
+# EFI bootmanager
+#
+CONFIG_EFI_BOOTMGR=y
+# CONFIG_EFI_HTTP_BOOT is not set
+CONFIG_BOOTEFI_HELLO_COMPILE=y
+CONFIG_BOOTEFI_TESTAPP_COMPILE=y
+
+#
+# Boot images
+#
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+# CONFIG_TIMESTAMP is not set
+CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x0
+CONFIG_FIT_FULL_CHECK=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_SIGNATURE_MAX_SIZE=0x10000000
+# CONFIG_FIT_RSASSA_PSS is not set
+# CONFIG_FIT_CIPHER is not set
+# CONFIG_FIT_VERBOSE is not set
+# CONFIG_FIT_BEST_MATCH is not set
+CONFIG_FIT_PRINT=y
+CONFIG_SPL_FIT=y
+# CONFIG_TPL_FIT is not set
+# CONFIG_SPL_FIT_PRINT is not set
+CONFIG_SPL_FIT_FULL_CHECK=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_FIT_SIGNATURE_MAX_SIZE=0x10000000
+# CONFIG_SPL_FIT_RSASSA_PSS is not set
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x0
+# CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY is not set
+# CONFIG_SPL_LOAD_FIT_FULL is not set
+# CONFIG_TPL_LOAD_FIT is not set
+# CONFIG_SPL_FIT_IMAGE_POST_PROCESS is not set
+CONFIG_PXE_UTILS=y
+CONFIG_BOOT_DEFAULTS_FEATURES=y
+CONFIG_BOOT_DEFAULTS_CMDS=y
+CONFIG_BOOT_DEFAULTS=y
+CONFIG_BOOTSTD=y
+# CONFIG_SPL_BOOTSTD is not set
+CONFIG_BOOTSTD_FULL=y
+CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_BOOTSTD_BOOTCOMMAND=y
+CONFIG_BOOTSTD_MENU=y
+CONFIG_BOOTMETH_GLOBAL=y
+# CONFIG_BOOTMETH_ANDROID is not set
+# CONFIG_BOOTMETH_CROS is not set
+CONFIG_BOOTMETH_EXTLINUX=y
+CONFIG_BOOTMETH_EXTLINUX_PXE=y
+CONFIG_BOOTMETH_EFILOADER=y
+CONFIG_BOOTMETH_EFI_BOOTMGR=y
+CONFIG_BOOTMETH_VBE=y
+CONFIG_BOOTMETH_DISTRO=y
+# CONFIG_SPL_BOOTMETH_VBE is not set
+CONFIG_TPL_BOOTMETH_VBE=y
+CONFIG_BOOTMETH_VBE_REQUEST=y
+# CONFIG_SPL_BOOTMETH_VBE_REQUEST is not set
+CONFIG_BOOTMETH_VBE_SIMPLE=y
+# CONFIG_BOOTMETH_VBE_ABREC is not set
+CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
+# CONFIG_SPL_BOOTMETH_VBE_SIMPLE is not set
+CONFIG_EXPO=y
+CONFIG_BOOTMETH_SCRIPT=y
+# CONFIG_UPL is not set
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_SUPPORT_RAW_INITRD=y
+# CONFIG_CHROMEOS is not set
+# CONFIG_CHROMEOS_VBOOT is not set
+# CONFIG_RAMBOOT_PBL is not set
+CONFIG_SYS_BOOT_RAMDISK_HIGH=y
+# CONFIG_DISTRO_DEFAULTS is not set
+
+#
+# Boot timing
+#
+# CONFIG_BOOTSTAGE is not set
+# CONFIG_SHOW_BOOT_PROGRESS is not set
+# CONFIG_SPL_SHOW_BOOT_PROGRESS is not set
+
+#
+# Boot media
+#
+# CONFIG_NAND_BOOT is not set
+# CONFIG_ONENAND_BOOT is not set
+# CONFIG_QSPI_BOOT is not set
+# CONFIG_SATA_BOOT is not set
+# CONFIG_SD_BOOT is not set
+# CONFIG_SD_BOOT_QSPI is not set
+# CONFIG_SPI_BOOT is not set
+
+#
+# Autoboot options
+#
+CONFIG_AUTOBOOT=y
+CONFIG_BOOTDELAY=2
+# CONFIG_AUTOBOOT_KEYED is not set
+# CONFIG_AUTOBOOT_USE_MENUKEY is not set
+# CONFIG_AUTOBOOT_MENU_SHOW is not set
+# CONFIG_BOOT_RETRY is not set
+
+#
+# Image support
+#
+# CONFIG_IMAGE_PRE_LOAD is not set
+
+#
+# Devicetree fixup
+#
+# CONFIG_OF_ENV_SETUP is not set
+# CONFIG_OF_BOARD_SETUP is not set
+# CONFIG_OF_SYSTEM_SETUP is not set
+# CONFIG_OF_STDOUT_VIA_ALIAS is not set
+# CONFIG_FDT_FIXUP_PARTITIONS is not set
+# CONFIG_FDT_SIMPLEFB is not set
+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
+# CONFIG_USE_BOOTARGS is not set
+# CONFIG_BOOTARGS_SUBST is not set
+CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
 CONFIG_USE_PREBOOT=y
+CONFIG_PREBOOT="usb start"
+CONFIG_PREBOOT_DEFINED=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb"
+# CONFIG_SAVE_PREV_BL_FDT_ADDR is not set
+# CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR is not set
+
+#
+# Configuration editor
+#
+# CONFIG_CEDIT is not set
+
+#
+# Console
+#
+CONFIG_MENU=y
+# CONFIG_CONSOLE_RECORD is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1044
+# CONFIG_DISABLE_CONSOLE is not set
+CONFIG_LOGLEVEL=4
+CONFIG_SPL_LOGLEVEL=4
+CONFIG_TPL_LOGLEVEL=4
+# CONFIG_SILENT_CONSOLE is not set
+# CONFIG_SPL_SILENT_CONSOLE is not set
+# CONFIG_TPL_SILENT_CONSOLE is not set
+CONFIG_PRE_CONSOLE_BUFFER=y
+CONFIG_CONSOLE_FLUSH_SUPPORT=y
+# CONFIG_CONSOLE_FLUSH_ON_NEWLINE is not set
+CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
+# CONFIG_SYS_CONSOLE_ENV_OVERWRITE is not set
+# CONFIG_SYS_CONSOLE_INFO_QUIET is not set
+CONFIG_SYS_STDIO_DEREGISTER=y
+# CONFIG_SPL_SYS_STDIO_DEREGISTER is not set
+CONFIG_SYS_DEVICE_NULLDEV=y
+
+#
+# Logging
+#
+CONFIG_LOG=y
+CONFIG_LOG_MAX_LEVEL=6
+CONFIG_LOG_DEFAULT_LEVEL=6
+CONFIG_LOG_CONSOLE=y
+# CONFIG_LOGF_FILE is not set
+# CONFIG_LOGF_LINE is not set
+# CONFIG_LOGF_FUNC is not set
+CONFIG_LOGF_FUNC_PAD=20
+# CONFIG_LOG_SYSLOG is not set
+# CONFIG_SPL_LOG is not set
+# CONFIG_TPL_LOG is not set
+# CONFIG_LOG_ERROR_RETURN is not set
+
+#
+# Init options
+#
+# CONFIG_BOARD_TYPES is not set
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
+
+#
+# Start-up hooks
+#
+CONFIG_CYCLIC=y
+# CONFIG_SPL_CYCLIC is not set
+CONFIG_CYCLIC_MAX_CPU_TIME_US=5000
+CONFIG_EVENT=y
+CONFIG_EVENT_DYNAMIC=y
+# CONFIG_EVENT_DEBUG is not set
+# CONFIG_ARCH_MISC_INIT is not set
+# CONFIG_BOARD_EARLY_INIT_F is not set
 CONFIG_BOARD_EARLY_INIT_R=y
+# CONFIG_BOARD_POSTCLK_INIT is not set
+CONFIG_BOARD_LATE_INIT=y
+# CONFIG_CLOCKS is not set
+# CONFIG_HWCONFIG is not set
+CONFIG_LAST_STAGE_INIT=y
+CONFIG_MISC_INIT_R=y
+# CONFIG_SYS_MALLOC_BOOTPARAMS is not set
+# CONFIG_ID_EEPROM is not set
+# CONFIG_RESET_PHY_R is not set
+
+#
+# Security support
+#
+CONFIG_HASH=y
+# CONFIG_HASH_CRC8 is not set
+CONFIG_SPL_HASH=y
+# CONFIG_STACKPROTECTOR is not set
+# CONFIG_BOARD_RNG_SEED is not set
+
+#
+# Update support
+#
+# CONFIG_UPDATE_TFTP is not set
+# CONFIG_ANDROID_AB is not set
+
+#
+# Blob list
+#
 CONFIG_BLOBLIST=y
+CONFIG_SPL_BLOBLIST=y
 # CONFIG_TPL_BLOBLIST is not set
 CONFIG_BLOBLIST_FIXED=y
+# CONFIG_BLOBLIST_ALLOC is not set
 CONFIG_BLOBLIST_ADDR=0x100000
 CONFIG_BLOBLIST_SIZE=0x1000
+CONFIG_SPL_BLOBLIST_FIXED=y
+# CONFIG_SPL_BLOBLIST_ALLOC is not set
+CONFIG_SUPPORT_SPL=y
+CONFIG_SUPPORT_TPL=y
+
+#
+# SPL configuration options
+#
+CONFIG_SPL_FRAMEWORK=y
+# CONFIG_SPL_FRAMEWORK_BOARD_INIT_F is not set
 CONFIG_SPL_MAX_SIZE=0x40000
 CONFIG_SPL_PAD_TO=0x7f8000
+# CONFIG_SPL_NO_BSS_LIMIT is not set
+CONFIG_SPL_BSS_LIMIT=y
+# CONFIG_SPL_FOOTPRINT_LIMIT is not set
+CONFIG_SPL_SYS_STACK_F_CHECK_BYTE=0xaa
+# CONFIG_SPL_SYS_REPORT_STACK_F_USAGE is not set
+# CONFIG_SPL_SHOW_ERRORS is not set
+CONFIG_SPL_BINMAN_SYMBOLS=y
+CONFIG_SPL_BINMAN_UBOOT_SYMBOLS=y
 CONFIG_HANDOFF=y
+CONFIG_SPL_HANDOFF=y
+# CONFIG_SPL_SOC_INIT is not set
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_LOAD_BLOCK=y
+# CONFIG_SPL_BOOTROM_SUPPORT is not set
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
+# CONFIG_SPL_LOAD_IMX_CONTAINER is not set
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_SHARES_INIT_SP_ADDR=y
+CONFIG_SPL_SEPARATE_BSS=y
+# CONFIG_SPL_SYS_MALLOC is not set
+CONFIG_SPL_BANNER_PRINT=y
+# CONFIG_SPL_DISPLAY_PRINT is not set
+CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set
+# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE is not set
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x0
+# CONFIG_SPL_FIT_IMAGE_TINY is not set
+# CONFIG_SPL_CACHE is not set
+# CONFIG_SPL_CPU is not set
+CONFIG_SPL_CRYPTO=y
+# CONFIG_SPL_DMA is not set
+# CONFIG_SPL_ENV_SUPPORT is not set
+# CONFIG_SPL_FS_EXT4 is not set
+# CONFIG_SPL_FS_SQUASHFS is not set
+# CONFIG_SPL_FAT_WRITE is not set
+# CONFIG_SPL_FPGA is not set
+# CONFIG_SPL_I2C is not set
+# CONFIG_SPL_DM_MAILBOX is not set
+# CONFIG_SPL_MEMORY is not set
+# CONFIG_SPL_MPC8XXX_INIT_DDR is not set
+# CONFIG_SPL_MTD is not set
+# CONFIG_SPL_MUSB_NEW is not set
+# CONFIG_SPL_NAND_SUPPORT is not set
+# CONFIG_SPL_NAND_DRIVERS is not set
+# CONFIG_SPL_NAND_ECC is not set
+# CONFIG_SPL_NAND_SIMPLE is not set
+# CONFIG_SPL_RELOC_LOADER is not set
+# CONFIG_SPL_UBI is not set
+CONFIG_SPL_DM_SPI_FLASH=y
+# CONFIG_SPL_NET is not set
+# CONFIG_SPL_NOR_SUPPORT is not set
+# CONFIG_SPL_XIP_SUPPORT is not set
+# CONFIG_SPL_ONENAND_SUPPORT is not set
+# CONFIG_SPL_OS_BOOT is not set
+# CONFIG_SPL_PCI is not set
+# CONFIG_SPL_PCH is not set
+# CONFIG_SPL_POST_MEM_SUPPORT is not set
+# CONFIG_SPL_DM_RESET is not set
+# CONFIG_SPL_POWER is not set
+# CONFIG_SPL_POWER_DOMAIN is not set
+# CONFIG_SPL_RAM_DEVICE is not set
+# CONFIG_SPL_REMOTEPROC is not set
+# CONFIG_SPL_RTC is not set
+# CONFIG_SPL_SATA is not set
+# CONFIG_SPL_NVME is not set
+CONFIG_SPL_SPI_FLASH_TINY=y
+# CONFIG_SPL_SPI_FLASH_MTD is not set
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000
+# CONFIG_SPL_THERMAL is not set
+# CONFIG_SPL_WATCHDOG is not set
+# CONFIG_SPL_YMODEM_SUPPORT is not set
+CONFIG_SPL_ATF=y
+# CONFIG_SPL_ATF_LOAD_IMAGE_V2 is not set
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+# CONFIG_SPL_OPTEE_IMAGE is not set
+CONFIG_SPL_TARGET=""
 CONFIG_TPL=y
+
+#
+# TPL configuration options
+#
+CONFIG_TPL_BINMAN_SYMBOLS=y
+CONFIG_TPL_BINMAN_UBOOT_SYMBOLS=y
+CONFIG_TPL_FRAMEWORK=y
+CONFIG_TPL_BANNER_PRINT=y
+# CONFIG_TPL_BOARD_INIT is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_TPL_SEPARATE_BSS=y
+CONFIG_TPL_NEEDS_SEPARATE_STACK=y
+# CONFIG_TPL_POWER is not set
+CONFIG_TPL_BOOTROM_SUPPORT=y
+# CONFIG_TPL_CRC32 is not set
+# CONFIG_TPL_DRIVERS_MISC is not set
+# CONFIG_TPL_ENV_SUPPORT is not set
 CONFIG_TPL_GPIO=y
+# CONFIG_TPL_I2C is not set
+# CONFIG_TPL_MPC8XXX_INIT_DDR is not set
+# CONFIG_TPL_MMC is not set
+# CONFIG_TPL_NAND_SUPPORT is not set
+# CONFIG_TPL_PCI is not set
+# CONFIG_TPL_PCH is not set
+# CONFIG_TPL_RAM_SUPPORT is not set
+# CONFIG_TPL_RELOC_LOADER is not set
+# CONFIG_TPL_RTC is not set
+# CONFIG_TPL_SPI_FLASH_SUPPORT is not set
+# CONFIG_TPL_SPI is not set
+# CONFIG_TPL_DM_SPI is not set
+# CONFIG_TPL_DM_SPI_FLASH is not set
+# CONFIG_TPL_YMODEM_SUPPORT is not set
+# CONFIG_VPL is not set
+CONFIG_IMAGE_SIGN_INFO=y
+CONFIG_SPL_IMAGE_SIGN_INFO=y
+CONFIG_CMDLINE=y
+CONFIG_HUSH_PARSER=y
+
+#
+# Hush flavor to use
+#
+CONFIG_HUSH_OLD_PARSER=y
+# CONFIG_HUSH_MODERN_PARSER is not set
+CONFIG_CMDLINE_EDITING=y
+# CONFIG_CMDLINE_PS_SUPPORT is not set
+CONFIG_AUTO_COMPLETE=y
+CONFIG_SYS_LONGHELP=y
+CONFIG_SYS_PROMPT="=> "
+CONFIG_SYS_PROMPT_HUSH_PS2="> "
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_XTRACE=y
+
+#
+# Commands
+#
+
+#
+# Info commands
+#
+CONFIG_CMD_BDI=y
+# CONFIG_CMD_BDINFO_EXTRA is not set
+# CONFIG_CMD_CONFIG is not set
+CONFIG_CMD_CONSOLE=y
+# CONFIG_CMD_UFETCH is not set
+# CONFIG_CMD_HISTORY is not set
+# CONFIG_CMD_LICENSE is not set
+# CONFIG_CMD_PMC is not set
+# CONFIG_CMD_SMBIOS is not set
+
+#
+# Boot commands
+#
+CONFIG_CMD_BOOTD=y
+CONFIG_CMD_BOOTM=y
+CONFIG_CMD_BOOTDEV=y
+CONFIG_CMD_BOOTFLOW=y
+CONFIG_CMD_BOOTFLOW_FULL=y
+CONFIG_CMD_BOOTFLOW_BOOTDELAY=30
+CONFIG_CMD_BOOTMETH=y
+CONFIG_CMD_BOOTSTD=y
+CONFIG_BOOTM_EFI=y
+CONFIG_BOOTM_ELF=y
 CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_BOOTI=y
+CONFIG_BOOTM_LINUX=y
+CONFIG_BOOTM_NETBSD=y
+# CONFIG_BOOTM_OPENRTOS is not set
+# CONFIG_BOOTM_OSE is not set
+CONFIG_BOOTM_PLAN9=y
+CONFIG_BOOTM_RTEMS=y
+# CONFIG_CMD_UPL is not set
+CONFIG_CMD_VBE=y
+CONFIG_BOOTM_VXWORKS=y
+CONFIG_CMD_BOOTEFI=y
+CONFIG_CMD_BOOTEFI_BINARY=y
+CONFIG_CMD_BOOTEFI_BOOTMGR=y
+CONFIG_CMD_BOOTEFI_HELLO=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 CONFIG_CMD_BOOTMENU=y
+# CONFIG_CMD_ADTIMG is not set
+CONFIG_CMD_ELF=y
+CONFIG_CMD_ELF_BOOTVX=y
+# CONFIG_CMD_ELF_FDT_SETUP is not set
+CONFIG_CMD_FDT=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RUN=y
+CONFIG_CMD_IMI=y
+CONFIG_CMD_XIMG=y
+CONFIG_SYS_XIMG_LEN=0x800000
+# CONFIG_CMD_SPL is not set
+
+#
+# Environment commands
+#
+# CONFIG_CMD_ASKENV is not set
+CONFIG_CMD_EXPORTENV=y
+CONFIG_CMD_IMPORTENV=y
+CONFIG_CMD_EDITENV=y
+# CONFIG_CMD_GREPENV is not set
+CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_ERASEENV is not set
+CONFIG_CMD_ENV_EXISTS=y
+# CONFIG_CMD_ENV_CALLBACK is not set
+# CONFIG_CMD_ENV_FLAGS is not set
 CONFIG_CMD_NVEDIT_EFI=y
+# CONFIG_CMD_NVEDIT_INDIRECT is not set
+# CONFIG_CMD_NVEDIT_INFO is not set
+# CONFIG_CMD_NVEDIT_LOAD is not set
+# CONFIG_CMD_NVEDIT_SELECT is not set
+
+#
+# Memory commands
+#
+# CONFIG_CMD_BINOP is not set
+CONFIG_CMD_BLOBLIST=y
+CONFIG_CMD_CRC32=y
+# CONFIG_CRC32_VERIFY is not set
+# CONFIG_CMD_EEPROM is not set
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=0
+# CONFIG_LOOPW is not set
+# CONFIG_CMD_MD5SUM is not set
+# CONFIG_CMD_MEMINFO is not set
+CONFIG_CMD_MEMORY=y
+# CONFIG_CMD_MEM_SEARCH is not set
+# CONFIG_CMD_MX_CYCLIC is not set
+CONFIG_CMD_RANDOM=y
+# CONFIG_CMD_MEMTEST is not set
+# CONFIG_CMD_SHA1SUM is not set
+# CONFIG_CMD_STRINGS is not set
+
+#
+# Compression commands
+#
+CONFIG_CMD_LZMADEC=y
+CONFIG_CMD_UNLZ4=y
+CONFIG_CMD_UNZIP=y
+# CONFIG_CMD_ZIP is not set
+
+#
+# Device access commands
+#
+# CONFIG_CMD_ADC is not set
+# CONFIG_CMD_BCB is not set
+# CONFIG_CMD_BIND is not set
+# CONFIG_CMD_CLK is not set
+# CONFIG_CMD_DEMO is not set
+# CONFIG_CMD_DFU is not set
+CONFIG_CMD_DM=y
+# CONFIG_CMD_FUSE is not set
 CONFIG_CMD_GPIO=y
+# CONFIG_CMD_GPIO_READ is not set
+# CONFIG_CMD_PWM is not set
 CONFIG_CMD_GPT=y
+# CONFIG_CMD_GPT_RENAME is not set
+# CONFIG_CMD_IDE is not set
+# CONFIG_CMD_IO is not set
+# CONFIG_CMD_IOTRACE is not set
 CONFIG_CMD_I2C=y
+CONFIG_CMD_LOADB=y
+# CONFIG_CMD_LOADM is not set
+CONFIG_CMD_LOADS=y
+# CONFIG_LOADS_ECHO is not set
+# CONFIG_CMD_SAVES is not set
+# CONFIG_SYS_LOADS_BAUD_CHANGE is not set
+CONFIG_CMD_LOADXY_TIMEOUT=90
+# CONFIG_CMD_LSBLK is not set
+# CONFIG_CMD_MBR is not set
+# CONFIG_CMD_MISC is not set
 CONFIG_CMD_MMC=y
+# CONFIG_CMD_BKOPS_ENABLE is not set
+# CONFIG_CMD_MMC_REG is not set
+# CONFIG_CMD_MMC_SWRITE is not set
 CONFIG_MMC_SPEED_MODE_SET=y
+# CONFIG_CMD_CLONE is not set
+# CONFIG_CMD_MTD is not set
+# CONFIG_CMD_ONENAND is not set
+CONFIG_CMD_PART=y
+# CONFIG_CMD_PCI is not set
+CONFIG_CMD_PINMUX=y
+CONFIG_CMD_POWEROFF=y
+# CONFIG_CMD_READ is not set
+# CONFIG_CMD_SATA is not set
+# CONFIG_CMD_SDRAM is not set
+CONFIG_CMD_SF=y
 CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SPI=y
+CONFIG_DEFAULT_SPI_BUS=0
+CONFIG_DEFAULT_SPI_MODE=0x0
 CONFIG_CMD_USB=y
+# CONFIG_CMD_RKMTD is not set
+# CONFIG_CMD_WRITE is not set
+
+#
+# Shell scripting commands
+#
+# CONFIG_CMD_CAT is not set
+CONFIG_CMD_ECHO=y
+CONFIG_CMD_ITEST=y
+CONFIG_CMD_SOURCE=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_XXD is not set
+CONFIG_CMD_NET=y
+CONFIG_CMD_BOOTP=y
+# CONFIG_BOOTP_MAY_FAIL is not set
+CONFIG_BOOTP_BOOTPATH=y
+# CONFIG_BOOTP_VENDOREX is not set
+# CONFIG_BOOTP_BOOTFILESIZE is not set
+CONFIG_BOOTP_DNS=y
+# CONFIG_BOOTP_DNS2 is not set
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
+# CONFIG_BOOTP_PREFER_SERVERIP is not set
+CONFIG_BOOTP_SUBNETMASK=y
+# CONFIG_BOOTP_NISDOMAIN is not set
+# CONFIG_BOOTP_NTPSERVER is not set
+# CONFIG_CMD_PCAP is not set
+CONFIG_BOOTP_PXE=y
+CONFIG_BOOTP_PXE_CLIENTARCH=0x16
+# CONFIG_BOOTP_PXE_DHCP_OPTION is not set
+CONFIG_BOOTP_VCI_STRING="U-Boot.armv8"
+# CONFIG_CMD_TFTPPUT is not set
+# CONFIG_CMD_TFTPSRV is not set
+CONFIG_NET_TFTP_VARS=y
+# CONFIG_CMD_RARP is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_SYS_DISABLE_AUTOLOAD is not set
+# CONFIG_CMD_CDP is not set
+# CONFIG_CMD_SNTP is not set
+# CONFIG_CMD_LINK_LOCAL is not set
+# CONFIG_CMD_ETHSW is not set
+# CONFIG_CMD_WOL is not set
+CONFIG_CMD_DHCP=y
+# CONFIG_CMD_DNS is not set
+CONFIG_CMD_MII=y
+CONFIG_CMD_MDIO=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTPBOOT=y
+# CONFIG_CMD_WGET is not set
+CONFIG_CMD_PXE=y
+
+#
+# Misc commands
+#
+# CONFIG_CMD_2048 is not set
+# CONFIG_CMD_BMP is not set
+# CONFIG_CMD_BSP is not set
+CONFIG_CMD_BLOCK_CACHE=y
+# CONFIG_CMD_CACHE is not set
+# CONFIG_CMD_CONITRACE is not set
+CONFIG_CMD_CLS=y
 CONFIG_CMD_EFIDEBUG=y
+CONFIG_CMD_EFICONFIG=y
+# CONFIG_CMD_EXCEPTION is not set
+# CONFIG_CMD_INI is not set
+# CONFIG_CMD_DATE is not set
 CONFIG_CMD_TIME=y
+# CONFIG_CMD_GETTIME is not set
+# CONFIG_CMD_PAUSE is not set
+# CONFIG_CMD_RNG is not set
+# CONFIG_CMD_KASLRSEED is not set
+CONFIG_CMD_SLEEP=y
+# CONFIG_CMD_TIMER is not set
+# CONFIG_CMD_SYSBOOT is not set
+# CONFIG_CMD_QFW is not set
+# CONFIG_CMD_PSTORE is not set
+# CONFIG_CMD_TERMINAL is not set
+# CONFIG_CMD_UUID is not set
+CONFIG_CMD_VIDCONSOLE=y
+# CONFIG_CMD_SELECT_FONT is not set
+
+#
+# TI specific command line interface
+#
+
+#
+# Power commands
+#
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
+
+#
+# Security commands
+#
+# CONFIG_CMD_AES is not set
+# CONFIG_CMD_BLOB is not set
+# CONFIG_CMD_HASH is not set
+# CONFIG_CMD_HVC is not set
+# CONFIG_CMD_SMC is not set
+
+#
+# Firmware commands
+#
+CONFIG_CMD_CROS_EC=y
+
+#
+# Filesystem commands
+#
+# CONFIG_CMD_BTRFS is not set
+# CONFIG_CMD_EROFS is not set
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+# CONFIG_CMD_EXT4_WRITE is not set
+CONFIG_CMD_FAT=y
+# CONFIG_CMD_SQUASHFS is not set
+CONFIG_CMD_FS_GENERIC=y
+# CONFIG_CMD_FS_UUID is not set
+# CONFIG_CMD_JFFS2 is not set
+# CONFIG_CMD_MTDPARTS is not set
+CONFIG_MTDIDS_DEFAULT=""
+CONFIG_MTDPARTS_DEFAULT=""
+# CONFIG_CMD_ZFS is not set
+
+#
+# Debug commands
+#
+CONFIG_CMD_CYCLIC=y
+# CONFIG_CMD_DIAG is not set
+# CONFIG_CMD_EVENT is not set
 CONFIG_CMD_LOG=y
+# CONFIG_CMD_UBI is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITIONS=y
+CONFIG_SPL_PARTITIONS=y
+# CONFIG_MAC_PARTITION is not set
+# CONFIG_SPL_MAC_PARTITION is not set
+# CONFIG_TEGRA_PARTITION is not set
+CONFIG_DOS_PARTITION=y
+CONFIG_SPL_DOS_PARTITION=y
+CONFIG_ISO_PARTITION=y
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_SPL_AMIGA_PARTITION is not set
+CONFIG_EFI_PARTITION=y
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=128
+CONFIG_EFI_PARTITION_ENTRIES_OFF=0
+CONFIG_SPL_EFI_PARTITION=y
+CONFIG_PARTITION_UUIDS=y
+CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_PARTITION_TYPE_GUID=y
+# CONFIG_SPL_PARTITION_TYPE_GUID is not set
+CONFIG_SUPPORT_OF_CONTROL=y
+CONFIG_PYLIBFDT=y
+CONFIG_DTOC=y
+CONFIG_BINMAN=y
+
+#
+# Device Tree Control
+#
+CONFIG_OF_CONTROL=y
+CONFIG_OF_REAL=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_UPSTREAM=y
+# CONFIG_OF_UPSTREAM_BUILD_VENDOR is not set
+# CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS is not set
+CONFIG_OF_SEPARATE=y
+# CONFIG_OF_EMBED is not set
+# CONFIG_OF_INITIAL_DTB_READONLY is not set
+# CONFIG_OF_BOARD is not set
+# CONFIG_OF_OMIT_DTB is not set
+CONFIG_DEVICE_TREE_INCLUDES=""
+CONFIG_OF_LIST="rockchip/rk3399-gru-kevin"
+CONFIG_OF_OVERLAY_LIST=""
+# CONFIG_MULTI_DTB_FIT is not set
+# CONFIG_SPL_MULTI_DTB_FIT is not set
+CONFIG_SPL_OF_LIST="rockchip/rk3399-gru-kevin"
+CONFIG_OF_TAG_MIGRATE=y
 CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+# CONFIG_OF_DTB_PROPS_REMOVE is not set
+# CONFIG_SPL_OF_PLATDATA is not set
+CONFIG_SPL_OF_REAL=y
+CONFIG_TPL_OF_REAL=y
+# CONFIG_TPL_OF_PLATDATA is not set
+
+#
+# Environment
+#
+CONFIG_ENV_SUPPORT=y
+CONFIG_ENV_CALLBACK_LIST_STATIC=""
+CONFIG_SAVEENV=y
+# CONFIG_ENV_OVERWRITE is not set
+# CONFIG_OVERWRITE_ETHADDR_ONCE is not set
+CONFIG_ENV_MIN_ENTRIES=64
+CONFIG_ENV_MAX_ENTRIES=512
+CONFIG_ENV_IS_DEFAULT=y
+CONFIG_ENV_IS_NOWHERE=y
+# CONFIG_ENV_IS_IN_EEPROM is not set
+# CONFIG_ENV_IS_IN_FAT is not set
+# CONFIG_ENV_IS_IN_EXT4 is not set
+# CONFIG_ENV_IS_IN_FLASH is not set
+# CONFIG_ENV_IS_IN_MMC is not set
+# CONFIG_ENV_IS_IN_NAND is not set
+# CONFIG_ENV_IS_IN_NVRAM is not set
+# CONFIG_ENV_IS_IN_REMOTE is not set
+# CONFIG_ENV_IS_IN_SPI_FLASH is not set
+# CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+# CONFIG_USE_DEFAULT_ENV_FILE is not set
+# CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set
+# CONFIG_ENV_IMPORT_FDT is not set
+# CONFIG_ENV_APPEND is not set
+# CONFIG_ENV_WRITEABLE_LIST is not set
+# CONFIG_ENV_ACCESS_IGNORE_FORCE is not set
+# CONFIG_USE_BOOTFILE is not set
+# CONFIG_USE_ETHPRIME is not set
+# CONFIG_USE_HOSTNAME is not set
+# CONFIG_VERSION_VARIABLE is not set
+
+#
+# Networking
+#
+# CONFIG_NO_NET is not set
+CONFIG_NET=y
+# CONFIG_NET_LWIP is not set
+CONFIG_ARP_TIMEOUT=5000
+CONFIG_NET_RETRY_COUNT=5
+# CONFIG_PROT_UDP is not set
+# CONFIG_BOOTP_SEND_HOSTNAME is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_IP_DEFRAG is not set
+# CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set
+# CONFIG_TFTP_PORT is not set
+CONFIG_TFTP_WINDOWSIZE=1
+# CONFIG_TFTP_TSIZE is not set
+# CONFIG_SERVERIP_FROM_PROXYDHCP is not set
+CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS=100
+# CONFIG_KEEP_SERVERADDR is not set
+# CONFIG_UDP_CHECKSUM is not set
+# CONFIG_BOOTP_SERVERIP is not set
+CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64
+# CONFIG_USE_GATEWAYIP is not set
+# CONFIG_USE_IPADDR is not set
+# CONFIG_USE_NETMASK is not set
+# CONFIG_USE_ROOTPATH is not set
+# CONFIG_USE_SERVERIP is not set
+# CONFIG_PROT_TCP is not set
+# CONFIG_IPV6 is not set
+CONFIG_BOOTDEV_ETH=y
+# CONFIG_NET_RANDOM_ETHADDR is not set
+# CONFIG_WGET is not set
+CONFIG_TFTP_BLOCKSIZE=1468
+CONFIG_SYS_RX_ETH_BUFFER=4
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_TPL_DM=y
+# CONFIG_DM_WARN is not set
+# CONFIG_SPL_DM_WARN is not set
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_STATS is not set
+# CONFIG_SPL_DM_STATS is not set
+CONFIG_DM_DEVICE_REMOVE=y
+CONFIG_DM_EVENT=y
+# CONFIG_SPL_DM_DEVICE_REMOVE is not set
+CONFIG_DM_STDIO=y
+CONFIG_DM_SEQ_ALIAS=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+# CONFIG_TPL_DM_SEQ_ALIAS is not set
+CONFIG_SPL_DM_INLINE_OFNODE=y
+CONFIG_TPL_DM_INLINE_OFNODE=y
+# CONFIG_DM_DMA is not set
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+# CONFIG_DEVRES is not set
+CONFIG_SIMPLE_BUS=y
+CONFIG_SPL_SIMPLE_BUS=y
+# CONFIG_TPL_SIMPLE_BUS is not set
+# CONFIG_SIMPLE_BUS_CORRECT_RANGE is not set
+CONFIG_OF_TRANSLATE=y
+# CONFIG_SPL_OF_TRANSLATE is not set
+# CONFIG_TPL_OF_TRANSLATE is not set
+# CONFIG_TRANSLATION_OFFSET is not set
+CONFIG_OFNODE_MULTI_TREE=y
+CONFIG_OFNODE_MULTI_TREE_MAX=4
+CONFIG_BOUNCE_BUFFER=y
+CONFIG_ADC=y
+# CONFIG_SPL_ADC is not set
+# CONFIG_ADC_EXYNOS is not set
+# CONFIG_ADC_SANDBOX is not set
+# CONFIG_SARADC_MESON is not set
+CONFIG_SARADC_ROCKCHIP=y
+# CONFIG_ADC_IMX93 is not set
+# CONFIG_SATA is not set
+# CONFIG_SCSI_AHCI is not set
+
+#
+# SATA/SCSI device support
+#
+# CONFIG_AXI is not set
+
+#
+# Bus devices
+#
+CONFIG_BLK=y
+CONFIG_SPL_BLK=y
+# CONFIG_TPL_BLK is not set
+CONFIG_BLOCK_CACHE=y
+# CONFIG_BLKMAP is not set
+# CONFIG_SPL_BLOCK_CACHE is not set
+# CONFIG_EFI_MEDIA is not set
+# CONFIG_IDE is not set
+# CONFIG_LBA48 is not set
+# CONFIG_SYS_64BIT_LBA is not set
+# CONFIG_RKMTD is not set
+# CONFIG_BOOTCOUNT_LIMIT is not set
+
+#
+# Button Support
+#
+# CONFIG_BUTTON is not set
+
+#
+# Cache Controller drivers
+#
+# CONFIG_CACHE is not set
+# CONFIG_L2X0_CACHE is not set
+# CONFIG_ANDES_L2_CACHE is not set
+# CONFIG_NCORE_CACHE is not set
+# CONFIG_SIFIVE_CCACHE is not set
+# CONFIG_SIFIVE_PL2 is not set
+
+#
+# Clock
+#
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_TPL_CLK=y
+# CONFIG_SPL_CLK_CCF is not set
+# CONFIG_CLK_CCF is not set
+# CONFIG_CLK_GPIO is not set
+# CONFIG_SPL_CLK_GPIO is not set
+# CONFIG_CLK_STUB is not set
+# CONFIG_CLK_CDCE9XX is not set
+# CONFIG_CLK_ICS8N3QV01 is not set
+# CONFIG_CLK_K210 is not set
+# CONFIG_CLK_MPC83XX is not set
+# CONFIG_CLK_XLNX_CLKWZRD is not set
+# CONFIG_COMMON_CLK_ADI_SHARED is not set
+# CONFIG_CLK_AT91 is not set
+# CONFIG_CLK_RCAR is not set
+# CONFIG_CLK_RCAR_CPG_LIB is not set
+# CONFIG_CLK_SOPHGO_CV1800B is not set
+# CONFIG_CLK_SIFIVE is not set
+# CONFIG_CLK_TI_AM3_DPLL is not set
+# CONFIG_CLK_TI_CTRL is not set
+# CONFIG_CLK_TI_GATE is not set
+# CONFIG_CLK_K3 is not set
+# CONFIG_SPL_CLK_K3 is not set
+# CONFIG_CPU is not set
+
+#
+# Hardware crypto devices
+#
+# CONFIG_DM_HASH is not set
+# CONFIG_FSL_CAAM is not set
+CONFIG_CAAM_64BIT=y
+# CONFIG_SYS_FSL_SEC_BE is not set
+# CONFIG_SYS_FSL_SEC_LE is not set
+# CONFIG_FSL_DCP_RNG is not set
+# CONFIG_NPCM_AES is not set
+# CONFIG_NPCM_SHA is not set
+# CONFIG_DDR_SPD is not set
+# CONFIG_IMX_SNPS_DDR_PHY is not set
+
+#
+# Demo for driver model
+#
+# CONFIG_DM_DEMO is not set
+
+#
+# DFU support
+#
+
+#
+# DMA Support
+#
+# CONFIG_DMA is not set
+# CONFIG_DMA_LPC32XX is not set
+# CONFIG_TI_EDMA3 is not set
+# CONFIG_DMA_LEGACY is not set
+
+#
+# Extcon Support
+#
+# CONFIG_EXTCON is not set
+
+#
+# Fastboot support
+#
+# CONFIG_UDP_FUNCTION_FASTBOOT is not set
+# CONFIG_TCP_FUNCTION_FASTBOOT is not set
+CONFIG_FIRMWARE=y
+# CONFIG_SPL_FIRMWARE is not set
+CONFIG_ARM_PSCI_FW=y
+# CONFIG_ZYNQMP_FIRMWARE is not set
+# CONFIG_ARM_SMCCC_FEATURES is not set
+# CONFIG_ARM_FFA_TRANSPORT is not set
+# CONFIG_SCMI_FIRMWARE is not set
+# CONFIG_DM_FUZZING_ENGINE is not set
+
+#
+# FPGA support
+#
+# CONFIG_FPGA_ALTERA is not set
+# CONFIG_FPGA_SOCFPGA is not set
+# CONFIG_FPGA_LATTICE is not set
+# CONFIG_FPGA_XILINX is not set
+# CONFIG_DM_FPGA is not set
+# CONFIG_FWU_MDATA is not set
+CONFIG_GPIO=y
+CONFIG_SPL_DM_GPIO=y
+CONFIG_TPL_DM_GPIO=y
+# CONFIG_GPIO_HOG is not set
+# CONFIG_SPL_GPIO_HOG is not set
+# CONFIG_DM_GPIO_LOOKUP_LABEL is not set
+# CONFIG_SPL_DM_GPIO_LOOKUP_LABEL is not set
+# CONFIG_ALTERA_PIO is not set
+# CONFIG_BCM2835_GPIO is not set
+# CONFIG_DWAPB_GPIO is not set
+# CONFIG_AT91_GPIO is not set
+# CONFIG_ATMEL_PIO4 is not set
+# CONFIG_ASPEED_GPIO is not set
+# CONFIG_ASPEED_SGPIO is not set
+# CONFIG_ASPEED_G7_GPIO is not set
+# CONFIG_DA8XX_GPIO is not set
+# CONFIG_FXL6408_GPIO is not set
+# CONFIG_HIKEY_GPIO is not set
+# CONFIG_INTEL_BROADWELL_GPIO is not set
+# CONFIG_INTEL_GPIO is not set
+# CONFIG_INTEL_ICH6_GPIO is not set
+# CONFIG_IMX_RGPIO2P is not set
+# CONFIG_IPROC_GPIO is not set
+# CONFIG_HSDK_CREG_GPIO is not set
+# CONFIG_KIRKWOOD_GPIO is not set
+# CONFIG_LPC32XX_GPIO is not set
+# CONFIG_MAX7320_GPIO is not set
+# CONFIG_MCP230XX_GPIO is not set
+# CONFIG_MSM_GPIO is not set
+# CONFIG_MXC_GPIO is not set
+# CONFIG_MXS_GPIO is not set
+# CONFIG_NPCM_GPIO is not set
+# CONFIG_NPCM_SGPIO is not set
+# CONFIG_CMD_PCA953X is not set
+# CONFIG_PCF8575_GPIO is not set
 CONFIG_ROCKCHIP_GPIO=y
+# CONFIG_XILINX_GPIO is not set
+# CONFIG_TCA642X is not set
+# CONFIG_TEGRA_GPIO is not set
+# CONFIG_TEGRA186_GPIO is not set
+# CONFIG_VYBRID_GPIO is not set
+# CONFIG_SIFIVE_GPIO is not set
+# CONFIG_ZYNQ_GPIO is not set
+# CONFIG_DM_74X164 is not set
+# CONFIG_DM_PCA953X is not set
+# CONFIG_SPL_DM_PCA953X is not set
+# CONFIG_PCA953X is not set
+# CONFIG_MPC8XXX_GPIO is not set
+# CONFIG_MPC8XX_GPIO is not set
+# CONFIG_NX_GPIO is not set
+# CONFIG_NOMADIK_GPIO is not set
+# CONFIG_SLG7XL45106_I2C_GPO is not set
+# CONFIG_FTGPIO010 is not set
+# CONFIG_ADP5585_GPIO is not set
+
+#
+# Hardware Spinlock Support
+#
+# CONFIG_DM_HWSPINLOCK is not set
+CONFIG_I2C=y
+CONFIG_DM_I2C=y
+CONFIG_SPL_DM_I2C=y
+# CONFIG_TPL_DM_I2C is not set
 CONFIG_I2C_CROS_EC_TUNNEL=y
+# CONFIG_I2C_CROS_EC_LDO is not set
+# CONFIG_I2C_SET_DEFAULT_BUS_NUM is not set
+# CONFIG_DM_I2C_GPIO is not set
+# CONFIG_SYS_I2C_IPROC is not set
+# CONFIG_SYS_I2C_FSL is not set
+# CONFIG_SYS_I2C_CADENCE is not set
+# CONFIG_SYS_I2C_DW is not set
+# CONFIG_SYS_I2C_INTEL is not set
+# CONFIG_SYS_I2C_IMX_LPI2C is not set
+# CONFIG_SYS_I2C_MTK is not set
+# CONFIG_SYS_I2C_MICROCHIP is not set
+# CONFIG_SYS_I2C_MXC is not set
+# CONFIG_SYS_I2C_NEXELL is not set
+# CONFIG_SYS_I2C_NPCM is not set
+# CONFIG_SYS_I2C_OCORES is not set
 CONFIG_SYS_I2C_ROCKCHIP=y
+# CONFIG_SYS_I2C_SOFT is not set
+# CONFIG_SYS_I2C_S3C24X0 is not set
+# CONFIG_SYS_I2C_MV is not set
+# CONFIG_SYS_I2C_MVTWSI is not set
+# CONFIG_SYS_I2C_XILINX_XIIC is not set
+# CONFIG_SYS_I2C_IHS is not set
 CONFIG_I2C_MUX=y
+# CONFIG_SPL_I2C_MUX is not set
+# CONFIG_I2C_ARB_GPIO_CHALLENGE is not set
+# CONFIG_I2C_MUX_PCA954x is not set
+# CONFIG_I2C_MUX_GPIO is not set
+CONFIG_INPUT=y
+# CONFIG_SPL_INPUT is not set
+# CONFIG_TPL_INPUT is not set
+CONFIG_DM_KEYBOARD=y
+# CONFIG_SPL_DM_KEYBOARD is not set
+# CONFIG_TPL_DM_KEYBOARD is not set
+# CONFIG_APPLE_SPI_KEYB is not set
+# CONFIG_BUTTON_KEYBOARD is not set
 CONFIG_CROS_EC_KEYB=y
+# CONFIG_I8042_KEYB is not set
+# CONFIG_TEGRA_KEYBOARD is not set
+# CONFIG_TWL4030_INPUT is not set
+
+#
+# IOMMU device drivers
+#
+# CONFIG_IOMMU is not set
+
+#
+# LED Support
+#
+# CONFIG_LED is not set
+# CONFIG_LED_BOOT is not set
+# CONFIG_LED_ACTIVITY is not set
+# CONFIG_SPL_LED is not set
+# CONFIG_LED_STATUS is not set
+
+#
+# Mailbox Controller Support
+#
+# CONFIG_DM_MAILBOX is not set
+
+#
+# Memory Controller drivers
+#
+# CONFIG_MEMORY is not set
+# CONFIG_ATMEL_EBI is not set
+# CONFIG_MFD_ATMEL_SMC is not set
+
+#
+# Multifunction device drivers
+#
+CONFIG_MISC=y
+CONFIG_SPL_MISC=y
+CONFIG_TPL_MISC=y
+# CONFIG_NVMEM is not set
+# CONFIG_SPL_NVMEM is not set
+# CONFIG_ALTERA_SYSID is not set
+# CONFIG_ATSHA204A is not set
+# CONFIG_GATEWORKS_SC is not set
+CONFIG_ROCKCHIP_EFUSE=y
+# CONFIG_ROCKCHIP_OTP is not set
 CONFIG_ROCKCHIP_IODOMAIN=y
+# CONFIG_SIFIVE_OTP is not set
+# CONFIG_SMSC_LPC47M is not set
+# CONFIG_SMSC_SIO1007 is not set
+# CONFIG_VEXPRESS_CONFIG is not set
 CONFIG_CROS_EC=y
+# CONFIG_SPL_CROS_EC is not set
+# CONFIG_TPL_CROS_EC is not set
+# CONFIG_CROS_EC_I2C is not set
+# CONFIG_CROS_EC_LPC is not set
+# CONFIG_SPL_CROS_EC_LPC is not set
+# CONFIG_TPL_CROS_EC_LPC is not set
 CONFIG_CROS_EC_SPI=y
+# CONFIG_DS4510 is not set
+# CONFIG_FSL_SEC_MON is not set
+# CONFIG_IRQ is not set
+# CONFIG_NPCM_HOST is not set
+# CONFIG_NUVOTON_NCT6102D is not set
 CONFIG_PWRSEQ=y
+# CONFIG_SPL_PWRSEQ is not set
+# CONFIG_PCA9551_LED is not set
+# CONFIG_TEST_DRV is not set
+# CONFIG_TURRIS_OMNIA_MCU is not set
+# CONFIG_USB_HUB_USB251XB is not set
+# CONFIG_TWL4030_LED is not set
+# CONFIG_WINBOND_W83627 is not set
+# CONFIG_I2C_EEPROM is not set
+# CONFIG_SPL_I2C_EEPROM is not set
+# CONFIG_GDSYS_RXAUI_CTRL is not set
+# CONFIG_GDSYS_IOEP is not set
+# CONFIG_MPC83XX_SERDES is not set
+# CONFIG_FS_LOADER is not set
+# CONFIG_SPL_FS_LOADER is not set
+# CONFIG_GDSYS_SOC is not set
+# CONFIG_IHS_FPGA is not set
+# CONFIG_MICROCHIP_FLEXCOM is not set
+# CONFIG_ESM_PMIC is not set
+# CONFIG_SL28CPLD is not set
+# CONFIG_SPL_SOCFPGA_DT_REG is not set
+
+#
+# MMC Host controller Support
+#
+CONFIG_MMC=y
+CONFIG_MMC_WRITE=y
 CONFIG_MMC_PWRSEQ=y
+# CONFIG_MMC_BROKEN_CD is not set
+CONFIG_DM_MMC=y
+CONFIG_SPL_DM_MMC=y
+# CONFIG_TPL_DM_MMC is not set
+# CONFIG_MMC_SPI is not set
+# CONFIG_ARM_PL180_MMCI is not set
+CONFIG_MMC_QUIRKS=y
+CONFIG_SYS_MMC_MAX_BLK_COUNT=65535
+CONFIG_MMC_HW_PARTITIONING=y
+# CONFIG_SUPPORT_EMMC_RPMB is not set
+# CONFIG_SUPPORT_EMMC_BOOT is not set
 CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_SUPPORTS_TUNING=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_ES_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_MMC_VERBOSE=y
+# CONFIG_MMC_TRACE is not set
 CONFIG_MMC_DW=y
+# CONFIG_MMC_DW_CORTINA is not set
+# CONFIG_MMC_DW_K3 is not set
 CONFIG_MMC_DW_ROCKCHIP=y
+# CONFIG_MMC_DW_SNPS is not set
+# CONFIG_MMC_MXC is not set
+# CONFIG_MMC_PCI is not set
+# CONFIG_MMC_OMAP_HS is not set
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
+# CONFIG_MMC_SDHCI_ADMA is not set
+# CONFIG_MMC_SDHCI_ADMA_FORCE_32BIT is not set
+CONFIG_MMC_SDHCI_ADMA_64BIT=y
+# CONFIG_MMC_SDHCI_BCMSTB is not set
+# CONFIG_MMC_SDHCI_CADENCE is not set
+# CONFIG_MMC_SDHCI_CV1800B is not set
+# CONFIG_MMC_SDHCI_IPROC is not set
+# CONFIG_MMC_SDHCI_F_SDH30 is not set
+# CONFIG_MMC_SDHCI_KONA is not set
+# CONFIG_MMC_SDHCI_MSM is not set
+# CONFIG_MMC_SDHCI_NPCM is not set
 CONFIG_MMC_SDHCI_ROCKCHIP=y
+# CONFIG_MMC_SDHCI_S5P is not set
+# CONFIG_MMC_SDHCI_SNPS is not set
+# CONFIG_MMC_SDHCI_STI is not set
+# CONFIG_MMC_SDHCI_XENON is not set
+# CONFIG_MMC_SDHCI_TANGIER is not set
+# CONFIG_MMC_SDHCI_ZYNQ is not set
+# CONFIG_MMC_PITON is not set
+# CONFIG_STM32_SDMMC2 is not set
+# CONFIG_FTSDC010 is not set
+# CONFIG_FSL_ESDHC is not set
+# CONFIG_FSL_ESDHC_IMX is not set
+
+#
+# MTD Support
+#
+CONFIG_MTD=y
+# CONFIG_DM_MTD is not set
+# CONFIG_MTD_NOR_FLASH is not set
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_SYS_MTDPARTS_RUNTIME is not set
+# CONFIG_FLASH_CFI_DRIVER is not set
+# CONFIG_SAMSUNG_ONENAND is not set
+# CONFIG_USE_SYS_MAX_FLASH_BANKS is not set
+# CONFIG_MTD_RAW_NAND is not set
+
+#
+# SPI Flash Support
+#
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+# CONFIG_BOOTDEV_SPI_FLASH is not set
+# CONFIG_SPI_FLASH_SFDP_SUPPORT is not set
+CONFIG_SPI_FLASH_SMART_HWCAPS=y
+# CONFIG_SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT is not set
+# CONFIG_SPI_FLASH_SOFT_RESET is not set
+# CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_LOCK=y
+CONFIG_SPI_FLASH_UNLOCK_ALL=y
+# CONFIG_SPI_FLASH_ATMEL is not set
+# CONFIG_SPI_FLASH_EON is not set
 CONFIG_SPI_FLASH_GIGADEVICE=y
+# CONFIG_SPI_FLASH_ISSI is not set
+# CONFIG_SPI_FLASH_MACRONIX is not set
+# CONFIG_SPI_FLASH_PUYA is not set
+# CONFIG_SPI_FLASH_SILICONKAISER is not set
+# CONFIG_SPI_FLASH_SPANSION is not set
+# CONFIG_SPI_FLASH_STMICRO is not set
+# CONFIG_SPI_FLASH_SST is not set
 CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_XMC is not set
+# CONFIG_SPI_FLASH_XTX is not set
+# CONFIG_SPI_FLASH_ZBIT is not set
+CONFIG_SPI_FLASH_USE_4K_SECTORS=y
+# CONFIG_SPI_FLASH_DATAFLASH is not set
+# CONFIG_SPI_FLASH_MTD is not set
+
+#
+# UBI support
+#
+# CONFIG_UBI_SILENCE_MSG is not set
+# CONFIG_MTD_UBI is not set
+# CONFIG_NVMXIP is not set
+# CONFIG_NVMXIP_QSPI is not set
+
+#
+# Multiplexer drivers
+#
+# CONFIG_MULTIPLEXER is not set
+# CONFIG_BITBANGMII is not set
+# CONFIG_MV88E6352_SWITCH is not set
+CONFIG_PHYLIB=y
+# CONFIG_PHY_ADDR_ENABLE is not set
+CONFIG_PHY_ANEG_TIMEOUT=4000
+# CONFIG_B53_SWITCH is not set
+# CONFIG_MV88E61XX_SWITCH is not set
+# CONFIG_PHYLIB_10G is not set
+# CONFIG_PHY_ADIN is not set
+# CONFIG_PHY_AQUANTIA is not set
+# CONFIG_PHY_ATHEROS is not set
+# CONFIG_SPL_PHY_ATHEROS is not set
+# CONFIG_PHY_BROADCOM is not set
+# CONFIG_PHY_CORTINA is not set
+# CONFIG_PHY_DAVICOM is not set
+# CONFIG_PHY_ET1011C is not set
+# CONFIG_PHY_LXT is not set
+# CONFIG_PHY_MARVELL is not set
+# CONFIG_PHY_MARVELL_10G is not set
+# CONFIG_PHY_MESON_GXL is not set
+# CONFIG_PHY_MICREL is not set
+# CONFIG_PHY_MOTORCOMM is not set
+# CONFIG_PHY_MSCC is not set
+# CONFIG_PHY_NATSEMI is not set
+# CONFIG_PHY_NXP_C45_TJA11XX is not set
+# CONFIG_PHY_NXP_TJA11XX is not set
+# CONFIG_PHY_REALTEK is not set
+# CONFIG_PHY_SMSC is not set
+# CONFIG_PHY_TERANETICS is not set
+# CONFIG_PHY_TI is not set
+# CONFIG_PHY_TI_DP83867 is not set
+# CONFIG_PHY_TI_DP83869 is not set
+# CONFIG_PHY_TI_GENERIC is not set
+# CONFIG_PHY_VITESSE is not set
+# CONFIG_PHY_XILINX is not set
+# CONFIG_PHY_XILINX_GMII2RGMII is not set
+# CONFIG_PHY_XWAY is not set
+# CONFIG_PHY_ETHERNET_ID is not set
+# CONFIG_PHY_FIXED is not set
+# CONFIG_PHY_NCSI is not set
+# CONFIG_FSL_MEMAC is not set
+CONFIG_PHY_RESET_DELAY=0
+# CONFIG_FSL_PFE is not set
+CONFIG_ETH=y
+CONFIG_DM_ETH=y
+# CONFIG_DM_MDIO is not set
+# CONFIG_DM_ETH_PHY is not set
+CONFIG_NETDEVICES=y
+CONFIG_PHY_GIGE=y
+# CONFIG_ALTERA_TSE is not set
+# CONFIG_BCM_SF2_ETH is not set
+# CONFIG_BCMGENET is not set
+# CONFIG_BNXT_ETH is not set
+# CONFIG_CALXEDA_XGMAC is not set
+# CONFIG_DWC_ETH_XGMAC is not set
+# CONFIG_DRIVER_DM9000 is not set
+# CONFIG_DWC_ETH_QOS is not set
+# CONFIG_EEPRO100 is not set
 CONFIG_ETH_DESIGNWARE=y
+# CONFIG_ETH_DESIGNWARE_MESON8B is not set
+# CONFIG_ETH_DESIGNWARE_SOCFPGA is not set
+# CONFIG_ETH_DESIGNWARE_S700 is not set
+# CONFIG_DW_ALTDESCRIPTOR is not set
+# CONFIG_ETHOC is not set
+# CONFIG_FMAN_ENET is not set
+# CONFIG_FTMAC100 is not set
+# CONFIG_FTGMAC100 is not set
+# CONFIG_MCFFEC is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_LITEETH is not set
+# CONFIG_MACB is not set
+# CONFIG_NET_NPCM750 is not set
+# CONFIG_PCH_GBE is not set
+# CONFIG_RGMII is not set
+# CONFIG_MII is not set
+# CONFIG_RMII is not set
+# CONFIG_PCNET is not set
+# CONFIG_QE_UEC is not set
+# CONFIG_RTL8139 is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SUN7I_GMAC is not set
+# CONFIG_SUN4I_EMAC is not set
+# CONFIG_SUN8I_EMAC is not set
+# CONFIG_SH_ETHER is not set
+# CONFIG_DRIVER_TI_CPSW is not set
+# CONFIG_DRIVER_TI_EMAC is not set
+# CONFIG_DRIVER_TI_KEYSTONE_NET is not set
+# CONFIG_TULIP is not set
+# CONFIG_XILINX_AXIEMAC is not set
+# CONFIG_VSC7385_ENET is not set
+# CONFIG_XILINX_EMACLITE is not set
+# CONFIG_ZYNQ_GEM is not set
 CONFIG_GMAC_ROCKCHIP=y
+# CONFIG_SYS_DPAA_QBMAN is not set
+# CONFIG_TSEC_ENET is not set
+# CONFIG_MEDIATEK_ETH is not set
+# CONFIG_HIFEMAC_ETH is not set
+# CONFIG_HIGMACV300_ETH is not set
+# CONFIG_NVME is not set
+# CONFIG_NVME_APPLE is not set
+
+#
+# PCI Endpoint
+#
+# CONFIG_PCI_ENDPOINT is not set
+# CONFIG_X86_PCH7 is not set
+# CONFIG_X86_PCH9 is not set
+
+#
+# PHY Subsystem
+#
+CONFIG_PHY=y
+# CONFIG_SPL_PHY is not set
+# CONFIG_NOP_PHY is not set
+# CONFIG_MIPI_DPHY_HELPERS is not set
+# CONFIG_BCM_SR_PCIE_PHY is not set
+# CONFIG_OMAP_USB2_PHY is not set
+
+#
+# Rockchip PHY driver
+#
+# CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set
+# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+# CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY is not set
+# CONFIG_PHY_ROCKCHIP_PCIE is not set
+# CONFIG_PHY_ROCKCHIP_SNPS_PCIE3 is not set
+# CONFIG_PHY_ROCKCHIP_USBDP is not set
 CONFIG_PHY_ROCKCHIP_TYPEC=y
+# CONFIG_PHY_CADENCE_SIERRA is not set
+# CONFIG_PHY_CADENCE_TORRENT is not set
+# CONFIG_MSM8916_USB_PHY is not set
+# CONFIG_MVEBU_COMPHY_SUPPORT is not set
+
+#
+# Pin controllers
+#
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_FULL=y
+CONFIG_PINCTRL_GENERIC=y
+CONFIG_PINMUX=y
+# CONFIG_PINCONF is not set
+CONFIG_PINCONF_RECURSIVE=y
+CONFIG_SPL_PINCTRL=y
+# CONFIG_TPL_PINCTRL is not set
+CONFIG_SPL_PINCTRL_FULL=y
+CONFIG_SPL_PINCTRL_GENERIC=y
+CONFIG_SPL_PINMUX=y
+# CONFIG_SPL_PINCONF is not set
+CONFIG_SPL_PINCONF_RECURSIVE=y
+# CONFIG_PINCTRL_AT91 is not set
+# CONFIG_PINCTRL_AT91PIO4 is not set
+# CONFIG_PINCTRL_INTEL is not set
+# CONFIG_PINCTRL_QE is not set
+# CONFIG_PINCTRL_ROCKCHIP_RV1108 is not set
+# CONFIG_PINCTRL_SINGLE is not set
+# CONFIG_PINCTRL_STM32 is not set
+# CONFIG_PINCTRL_STMFX is not set
+# CONFIG_SPL_PINCTRL_STMFX is not set
+# CONFIG_PINCTRL_K210 is not set
+CONFIG_PINCTRL_ROCKCHIP=y
+CONFIG_SPL_PINCTRL_ROCKCHIP=y
+# CONFIG_PINCTRL_TEGRA is not set
+# CONFIG_SPL_PINCTRL_TEGRA is not set
+CONFIG_POWER=y
+# CONFIG_POWER_LEGACY is not set
+# CONFIG_ACPI_PMC is not set
+# CONFIG_SPL_ACPI_PMC is not set
+# CONFIG_TPL_ACPI_PMC is not set
+
+#
+# Power Domain Support
+#
+# CONFIG_POWER_DOMAIN is not set
+CONFIG_DM_PMIC=y
+CONFIG_SPL_DM_PMIC=y
+CONFIG_PMIC_CHILDREN=y
+CONFIG_SPL_PMIC_CHILDREN=y
+# CONFIG_PMIC_AB8500 is not set
+# CONFIG_PMIC_ACT8846 is not set
+# CONFIG_PMIC_AXP is not set
+# CONFIG_SPL_PMIC_AXP is not set
+# CONFIG_DM_PMIC_DA9063 is not set
+# CONFIG_SPL_DM_PMIC_DA9063 is not set
+# CONFIG_PMIC_AS3722 is not set
+# CONFIG_DM_PMIC_BD71837 is not set
+# CONFIG_SPL_DM_PMIC_BD71837 is not set
+# CONFIG_DM_PMIC_FAN53555 is not set
+# CONFIG_DM_PMIC_MP5416 is not set
+# CONFIG_SPL_DM_PMIC_MP5416 is not set
+# CONFIG_DM_PMIC_PCA9450 is not set
+# CONFIG_SPL_DM_PMIC_PCA9450 is not set
+# CONFIG_DM_PMIC_PFUZE100 is not set
+# CONFIG_SPL_DM_PMIC_PFUZE100 is not set
+# CONFIG_DM_PMIC_MAX77663 is not set
+# CONFIG_DM_PMIC_MAX77686 is not set
+# CONFIG_DM_PMIC_MAX8998 is not set
+# CONFIG_DM_PMIC_MC34708 is not set
+# CONFIG_PMIC_MAX8997 is not set
+# CONFIG_PMIC_QCOM is not set
 CONFIG_PMIC_RK8XX=y
+# CONFIG_SPL_PMIC_RK8XX is not set
+# CONFIG_PMIC_S2MPS11 is not set
+# CONFIG_DM_PMIC_SANDBOX is not set
+# CONFIG_PMIC_S5M8767 is not set
+# CONFIG_PMIC_RN5T567 is not set
+# CONFIG_SPL_PMIC_RN5T567 is not set
+# CONFIG_PMIC_TPS65090 is not set
+# CONFIG_PMIC_PALMAS is not set
+# CONFIG_PMIC_LP873X is not set
+# CONFIG_PMIC_LP87565 is not set
+# CONFIG_DM_PMIC_TPS65910 is not set
+# CONFIG_DM_PMIC_TPS80031 is not set
+# CONFIG_PMIC_STPMIC1 is not set
+# CONFIG_SPL_PMIC_PALMAS is not set
+# CONFIG_SPL_PMIC_LP873X is not set
+# CONFIG_SPL_PMIC_LP87565 is not set
+# CONFIG_PMIC_TPS65941 is not set
+# CONFIG_PMIC_TPS65219 is not set
+# CONFIG_PMIC_RAA215300 is not set
+# CONFIG_PMIC_TPS65217 is not set
+# CONFIG_POWER_TPS65218 is not set
+# CONFIG_POWER_TPS62362 is not set
+# CONFIG_SPL_POWER_TPS62362 is not set
+# CONFIG_SPL_POWER_TPS65910 is not set
+CONFIG_DM_REGULATOR=y
 CONFIG_REGULATOR_PWM=y
+# CONFIG_SPL_REGULATOR_PWM is not set
+CONFIG_DM_REGULATOR_COMMON=y
+CONFIG_SPL_DM_REGULATOR_COMMON=y
+CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_SPL_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+# CONFIG_SPL_DM_REGULATOR_GPIO is not set
 CONFIG_REGULATOR_RK8XX=y
+# CONFIG_DM_REGULATOR_PBIAS is not set
+# CONFIG_DM_REGULATOR_TPS62360 is not set
+# CONFIG_DM_REGULATOR_TPS6287X is not set
+# CONFIG_DM_REGULATOR_ANATOP is not set
+# CONFIG_DM_REGULATOR_SCMI is not set
+# CONFIG_TPS6586X_POWER is not set
+# CONFIG_POWER_MT6323 is not set
+CONFIG_DM_PWM=y
+# CONFIG_PWM_ASPEED is not set
+# CONFIG_PWM_CADENCE_TTC is not set
 CONFIG_PWM_CROS_EC=y
+# CONFIG_PWM_EXYNOS is not set
+# CONFIG_PWM_IMX is not set
+# CONFIG_PWM_MESON is not set
+# CONFIG_PWM_MTK is not set
 CONFIG_PWM_ROCKCHIP=y
+# CONFIG_PWM_SANDBOX is not set
+# CONFIG_PWM_SIFIVE is not set
+# CONFIG_PWM_TEGRA is not set
+# CONFIG_PWM_SUNXI is not set
+# CONFIG_U_QE is not set
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+# CONFIG_STM32_SDRAM is not set
+# CONFIG_MPC83XX_SDRAM is not set
+# CONFIG_K3_DDRSS is not set
+# CONFIG_IMXRT_SDRAM is not set
+# CONFIG_CADENCE_DDR_CTRL is not set
+CONFIG_RAM_ROCKCHIP=y
+CONFIG_ROCKCHIP_SDRAM_COMMON=y
+CONFIG_RAM_ROCKCHIP_DEBUG=y
+# CONFIG_RAM_ROCKCHIP_DDR4 is not set
+# CONFIG_RAM_ROCKCHIP_LPDDR2 is not set
+# CONFIG_RAM_ROCKCHIP_LPDDR3 is not set
+# CONFIG_RAM_ROCKCHIP_LPDDR4 is not set
+
+#
+# Reboot Mode Support
+#
+# CONFIG_DM_REBOOT_MODE is not set
+
+#
+# Remote Processor drivers
+#
+CONFIG_REMOTEPROC_MAX_FW_SIZE=0x10000
+
+#
+# Reset Controller Support
+#
+# CONFIG_RESET_AST2500 is not set
+# CONFIG_RESET_AST2600 is not set
+CONFIG_RESET_ROCKCHIP=y
+# CONFIG_RESET_HISILICON is not set
+# CONFIG_RESET_SYSCON is not set
+# CONFIG_RESET_SCMI is not set
+# CONFIG_RESET_DRA7 is not set
+CONFIG_DM_RNG=y
+# CONFIG_SPL_DM_RNG is not set
+# CONFIG_RNG_MSM is not set
+# CONFIG_RNG_NPCM is not set
+CONFIG_RNG_ROCKCHIP=y
+# CONFIG_RNG_IPROC200 is not set
+# CONFIG_RNG_SMCCC_TRNG is not set
+# CONFIG_RNG_ARM_RNDR is not set
+# CONFIG_RNG_EXYNOS is not set
+
+#
+# Real Time Clock
+#
+# CONFIG_DM_RTC is not set
+# CONFIG_SPL_DM_RTC is not set
+# CONFIG_TPL_DM_RTC is not set
+# CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set
+# CONFIG_RTC_DS1337 is not set
+# CONFIG_RTC_DS1338 is not set
+# CONFIG_RTC_DS1374 is not set
+# CONFIG_RTC_DS3231 is not set
+# CONFIG_RTC_PCF8563 is not set
+# CONFIG_RTC_PT7C4338 is not set
+# CONFIG_RTC_S35392A is not set
+# CONFIG_RTC_MC13XXX is not set
+# CONFIG_RTC_MC146818 is not set
+# CONFIG_RTC_M41T62 is not set
+# CONFIG_SCSI is not set
+CONFIG_SERIAL=y
+CONFIG_BAUDRATE=115200
+# CONFIG_DEFAULT_ENV_IS_RW is not set
+CONFIG_REQUIRE_SERIAL_CONSOLE=y
+# CONFIG_SPECIFY_CONSOLE_INDEX is not set
+CONFIG_SERIAL_PRESENT=y
+CONFIG_SPL_SERIAL_PRESENT=y
+CONFIG_TPL_SERIAL_PRESENT=y
+CONFIG_DM_SERIAL=y
+# CONFIG_SERIAL_RX_BUFFER is not set
+# CONFIG_SERIAL_PUTS is not set
+# CONFIG_SERIAL_SEARCH_ALL is not set
+# CONFIG_SERIAL_PROBE_ALL is not set
+CONFIG_SPL_DM_SERIAL=y
+CONFIG_TPL_DM_SERIAL=y
+# CONFIG_VPL_DM_SERIAL is not set
+CONFIG_DEBUG_UART_NS16550=y
+CONFIG_SPL_DEBUG_UART_BASE=0xff1a0000
+CONFIG_TPL_DEBUG_UART_BASE=0xff1a0000
 CONFIG_DEBUG_UART_SHIFT=2
+# CONFIG_DEBUG_UART_ANNOUNCE is not set
+# CONFIG_DEBUG_UART_SKIP_INIT is not set
+# CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED is not set
+# CONFIG_ALTERA_JTAG_UART is not set
+# CONFIG_ALTERA_UART is not set
+# CONFIG_ARC_SERIAL is not set
+# CONFIG_ARM_DCC is not set
+# CONFIG_ATMEL_USART is not set
+# CONFIG_BCM6345_SERIAL is not set
+# CONFIG_COREBOOT_SERIAL is not set
+# CONFIG_CORTINA_UART is not set
+# CONFIG_FSL_LINFLEXUART is not set
+# CONFIG_FSL_LPUART is not set
+# CONFIG_MVEBU_A3700_UART is not set
+# CONFIG_MCFUART is not set
+# CONFIG_NULLDEV_SERIAL is not set
+CONFIG_SYS_NS16550=y
+# CONFIG_NS16550_DYNAMIC is not set
 CONFIG_SYS_NS16550_MEM32=y
+# CONFIG_SYS_NS16550_PORT_MAPPED is not set
+# CONFIG_PL01X_SERIAL is not set
+# CONFIG_ROCKCHIP_SERIAL is not set
+# CONFIG_XILINX_UARTLITE is not set
+# CONFIG_MSM_SERIAL is not set
+# CONFIG_MSM_GENI_SERIAL is not set
+# CONFIG_MXS_AUART_SERIAL is not set
+# CONFIG_OMAP_SERIAL is not set
+# CONFIG_HTIF_CONSOLE is not set
+# CONFIG_SIFIVE_SERIAL is not set
+# CONFIG_ZYNQ_SERIAL is not set
+# CONFIG_MTK_SERIAL is not set
+# CONFIG_MT7620_SERIAL is not set
+# CONFIG_NPCM_SERIAL is not set
+# CONFIG_SM is not set
+# CONFIG_MESON_SM is not set
+# CONFIG_SMEM is not set
+
+#
+# Sound support
+#
+# CONFIG_SOUND is not set
+
+#
+# SOC (System On Chip) specific Drivers
+#
+# CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_QCOM is not set
+# CONFIG_SOC_SAMSUNG is not set
+# CONFIG_SOC_TI is not set
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_SPI_MEM=y
+# CONFIG_SPI_DIRMAP is not set
+# CONFIG_ALTERA_SPI is not set
+# CONFIG_APPLE_SPI is not set
+# CONFIG_ATCSPI200_SPI is not set
+# CONFIG_CORTINA_SFLASH is not set
+# CONFIG_CADENCE_QSPI is not set
+# CONFIG_CV1800B_SPIF is not set
+# CONFIG_DESIGNWARE_SPI is not set
+# CONFIG_FSL_QSPI is not set
+# CONFIG_GXP_SPI is not set
+# CONFIG_IPROC_QSPI is not set
+# CONFIG_MICROCHIP_COREQSPI is not set
+# CONFIG_MTK_SNOR is not set
+# CONFIG_MTK_SNFI_SPI is not set
+# CONFIG_MTK_SPIM is not set
+# CONFIG_MVEBU_A3700_SPI is not set
+# CONFIG_SPI_MXIC is not set
+# CONFIG_NPCM_FIU_SPI is not set
+# CONFIG_NPCM_PSPI is not set
+# CONFIG_NXP_FSPI is not set
+# CONFIG_OMAP3_SPI is not set
+# CONFIG_PL022_SPI is not set
+# CONFIG_ROCKCHIP_SFC is not set
 CONFIG_ROCKCHIP_SPI=y
+# CONFIG_SPI_ASPEED_SMC is not set
+# CONFIG_SPI_SIFIVE is not set
+# CONFIG_SOFT_SPI is not set
+# CONFIG_SPI_SN_F_OSPI is not set
+# CONFIG_SPI_SUNXI is not set
+# CONFIG_XILINX_SPI is not set
+# CONFIG_ZYNQ_SPI is not set
+# CONFIG_ZYNQ_QSPI is not set
+# CONFIG_ZYNQMP_GQSPI is not set
+# CONFIG_SPI_STACKED_PARALLEL is not set
+
+#
+# SPMI support
+#
+# CONFIG_SPMI is not set
+# CONFIG_SYSINFO is not set
+
+#
+# System reset device drivers
+#
 CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_TPL_SYSRESET=y
+CONFIG_SYSRESET_CMD_RESET=y
+CONFIG_SYSRESET_CMD_POWEROFF=y
+# CONFIG_SYSRESET_CV1800B is not set
+# CONFIG_POWEROFF_GPIO is not set
+# CONFIG_SYSRESET_GPIO is not set
+# CONFIG_SYSRESET_PSCI is not set
+# CONFIG_SYSRESET_SYSCON is not set
+# CONFIG_SYSRESET_WATCHDOG is not set
+# CONFIG_SYSRESET_RESETCTL is not set
+# CONFIG_SYSRESET_MPC83XX is not set
+# CONFIG_TEE is not set
+# CONFIG_DM_THERMAL is not set
+
+#
+# Timer Support
+#
+# CONFIG_TIMER is not set
+
+#
+# TPM support
+#
 CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_SPL_DM_USB=y
+# CONFIG_DM_USB_GADGET is not set
+# CONFIG_SPL_DM_USB_GADGET is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_HOST=y
+# CONFIG_SPL_USB_HOST is not set
 CONFIG_USB_XHCI_HCD=y
+# CONFIG_USB_XHCI_DWC3 is not set
+# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
+# CONFIG_USB_XHCI_GENERIC is not set
+# CONFIG_USB_XHCI_FSL is not set
+# CONFIG_USB_XHCI_BRCM is not set
 CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_MSM is not set
+# CONFIG_USB_EHCI_PCI is not set
+# CONFIG_USB_EHCI_ZYNQ is not set
 CONFIG_USB_EHCI_GENERIC=y
+# CONFIG_USB_EHCI_FSL is not set
+CONFIG_USB_OHCI_NEW=y
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_OHCI_GENERIC=y
+# CONFIG_USB_OHCI_DA8XX is not set
+# CONFIG_SYS_OHCI_SWAP_REG_ACCESS is not set
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_DWC2 is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_ISP1760 is not set
+# CONFIG_USB_CDNS3 is not set
 CONFIG_USB_DWC3=y
+
+#
+# Platform Glue Driver Support
+#
+# CONFIG_USB_DWC3_OMAP is not set
 CONFIG_USB_DWC3_GENERIC=y
+# CONFIG_SPL_USB_DWC3_GENERIC is not set
+# CONFIG_USB_DWC3_AM62 is not set
+# CONFIG_USB_DWC3_LAYERSCAPE is not set
+# CONFIG_USB_DWC3_STI is not set
+
+#
+# PHY Subsystem
+#
+# CONFIG_USB_DWC3_PHY_OMAP is not set
+# CONFIG_USB_DWC3_PHY_SAMSUNG is not set
+
+#
+# Legacy MUSB Support
+#
+# CONFIG_USB_MUSB_HCD is not set
+# CONFIG_USB_MUSB_UDC is not set
+
+#
+# MUSB Controller Driver
+#
+# CONFIG_USB_MUSB_HOST is not set
+# CONFIG_USB_MUSB_PIO_ONLY is not set
+
+#
+# USB Phy
+#
+# CONFIG_TWL4030_USB is not set
+# CONFIG_ROCKCHIP_USB2_PHY is not set
+# CONFIG_TYPEC_TCPM is not set
+
+#
+# ULPI drivers
+#
+
+#
+# USB peripherals
+#
+CONFIG_USB_STORAGE=y
 CONFIG_USB_KEYBOARD=y
+# CONFIG_USB_ONBOARD_HUB is not set
+CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=1000
+CONFIG_USB_KEYBOARD_FN_KEYS=y
+CONFIG_SYS_USB_EVENT_POLL=y
+# CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE is not set
+# CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is not set
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
+# CONFIG_USB_ETHER_LAN75XX is not set
+# CONFIG_USB_ETHER_LAN78XX is not set
 CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
+# CONFIG_USB_GADGET is not set
+# CONFIG_SPL_USB_GADGET is not set
+
+#
+# UFS Host Controller Support
+#
+# CONFIG_TI_J721E_UFS is not set
+
+#
+# Graphics support
+#
 CONFIG_VIDEO=y
+# CONFIG_VIDEO_FONT_4X6 is not set
 # CONFIG_VIDEO_FONT_8X16 is not set
+# CONFIG_VIDEO_FONT_SUN12X22 is not set
 CONFIG_VIDEO_FONT_16X32=y
+CONFIG_VIDEO_LOGO=y
+CONFIG_BACKLIGHT=y
+CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x0
+# CONFIG_VIDEO_COPY is not set
+CONFIG_VIDEO_DAMAGE=y
+CONFIG_BACKLIGHT_PWM=y
+# CONFIG_BACKLIGHT_GPIO is not set
+CONFIG_VIDEO_BPP8=y
+CONFIG_VIDEO_BPP16=y
+CONFIG_VIDEO_BPP32=y
+CONFIG_VIDEO_ANSI=y
+# CONFIG_VIDEO_MIPI_DSI is not set
+CONFIG_CONSOLE_NORMAL=y
+# CONFIG_CONSOLE_ROTATION is not set
+# CONFIG_CONSOLE_TRUETYPE is not set
+CONFIG_SYS_WHITE_ON_BLACK=y
+# CONFIG_NO_FB_CLEAR is not set
+CONFIG_VIDEO_SYNC_MS=100
+CONFIG_VIDEO_SYNC_CYCLIC_MS=10
+CONFIG_PANEL=y
+CONFIG_SIMPLE_PANEL=y
+# CONFIG_PANEL_HX8238D is not set
+
+#
+# TrueType Fonts
+#
+# CONFIG_VIDCONSOLE_AS_LCD is not set
+# CONFIG_VIDEO_BOCHS is not set
+# CONFIG_VIDEO_VESA is not set
+# CONFIG_VIDEO_LCD_ANX9804 is not set
+# CONFIG_ATMEL_LCD_BGR555 is not set
+# CONFIG_VIDEO_BCM2835 is not set
+# CONFIG_VIDEO_LCD_ENDEAVORU is not set
+# CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
+# CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
+# CONFIG_VIDEO_LCD_LG_LD070WX3 is not set
+# CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
+# CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
+# CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
+# CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set
+# CONFIG_VIDEO_LCD_SHARP_LQ101R1SX01 is not set
+# CONFIG_VIDEO_LCD_SSD2828 is not set
+# CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
+# CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
+# CONFIG_VIDEO_MESON is not set
+# CONFIG_VIDEO_MVEBU is not set
+CONFIG_I2C_EDID=y
 CONFIG_DISPLAY=y
+# CONFIG_NXP_TDA19988 is not set
+# CONFIG_ATMEL_HLCD is not set
+# CONFIG_BACKLIGHT_LM3533 is not set
+# CONFIG_AM335X_LCD is not set
+# CONFIG_VIDEO_EXYNOS is not set
+# CONFIG_LOGICORE_DP_TX is not set
 CONFIG_VIDEO_ROCKCHIP=y
 CONFIG_VIDEO_ROCKCHIP_MAX_XRES=2400
 CONFIG_VIDEO_ROCKCHIP_MAX_YRES=1600
 CONFIG_DISPLAY_ROCKCHIP_EDP=y
+# CONFIG_DISPLAY_ROCKCHIP_LVDS is not set
+# CONFIG_DISPLAY_ROCKCHIP_HDMI is not set
+# CONFIG_DISPLAY_ROCKCHIP_MIPI is not set
+# CONFIG_DISPLAY_ROCKCHIP_DW_MIPI is not set
+# CONFIG_VIDEO_ARM_MALIDP is not set
+# CONFIG_VIDEO_STM32 is not set
+# CONFIG_VIDEO_TIDSS is not set
+# CONFIG_VIDEO_TEGRA124 is not set
+# CONFIG_VIDEO_BRIDGE is not set
+# CONFIG_VIDEO_BRIDGE_PARADE_DP501 is not set
+# CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825 is not set
+# CONFIG_VIDEO_BRIDGE_TOSHIBA_TC358768 is not set
+# CONFIG_VIDEO_TEGRA20 is not set
+# CONFIG_VIDEO_DSI_TEGRA30 is not set
+# CONFIG_TEGRA_BACKLIGHT_PWM is not set
+# CONFIG_VIDEO_MXS is not set
+# CONFIG_VIDEO_SEPS525 is not set
+CONFIG_CONSOLE_SCROLL_LINES=1
+# CONFIG_VIDEO_SIMPLE is not set
+# CONFIG_VIDEO_DT_SIMPLEFB is not set
+# CONFIG_VIDEO_MCDE_SIMPLE is not set
+# CONFIG_OSD is not set
+# CONFIG_VIDEO_REMOVE is not set
+# CONFIG_SPLASH_SCREEN is not set
+# CONFIG_BMP is not set
+CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
+CONFIG_VIDEO_BMP_RLE8=y
+# CONFIG_BMP_16BPP is not set
+# CONFIG_BMP_24BPP is not set
+# CONFIG_BMP_32BPP is not set
+# CONFIG_SPL_VIDEO is not set
+
+#
+# VirtIO Drivers
+#
+# CONFIG_VIRTIO_MMIO is not set
+
+#
+# 1-Wire support
+#
+# CONFIG_W1 is not set
+
+#
+# 1-wire EEPROM support
+#
+# CONFIG_W1_EEPROM is not set
+
+#
+# Watchdog Timer Support
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_IMX_WATCHDOG is not set
+# CONFIG_ULP_WATCHDOG is not set
+# CONFIG_WDT is not set
+# CONFIG_SPL_WDT is not set
+# CONFIG_PHYS_TO_BUS is not set
+
+#
+# File systems
+#
+# CONFIG_FS_BTRFS is not set
+# CONFIG_FS_CBFS is not set
+# CONFIG_SPL_FS_CBFS is not set
+CONFIG_FS_EXT4=y
+# CONFIG_EXT4_WRITE is not set
+CONFIG_FS_FAT=y
+CONFIG_FAT_WRITE=y
+CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
+# CONFIG_FS_JFFS2 is not set
+# CONFIG_UBIFS_SILENCE_MSG is not set
+# CONFIG_UBIFS_SILENCE_DEBUG_DUMP is not set
+# CONFIG_FS_CRAMFS is not set
+# CONFIG_FS_SQUASHFS is not set
+# CONFIG_FS_EROFS is not set
+
+#
+# Library routines
+#
+# CONFIG_ADDR_MAP is not set
+# CONFIG_SYS_TIMER_COUNTS_DOWN is not set
+# CONFIG_PHYSMEM is not set
+# CONFIG_BCH is not set
 # CONFIG_BINMAN_FDT is not set
+CONFIG_BINMAN_DTB=""
+# CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set
+CONFIG_CHARSET=y
+# CONFIG_DYNAMIC_CRC_TABLE is not set
+CONFIG_LIB_UUID=y
+CONFIG_RANDOM_UUID=y
+CONFIG_SPL_LIB_UUID=y
+# CONFIG_SEMIHOSTING is not set
+# CONFIG_SPL_SEMIHOSTING is not set
+CONFIG_PRINTF=y
+CONFIG_SPL_PRINTF=y
+CONFIG_TPL_PRINTF=y
+CONFIG_SPRINTF=y
+CONFIG_SPL_SPRINTF=y
+CONFIG_TPL_SPRINTF=y
+CONFIG_STRTO=y
+CONFIG_SPL_STRTO=y
+CONFIG_TPL_STRTO=y
+CONFIG_SYS_HZ=1000
+CONFIG_SPL_USE_TINY_PRINTF=y
+CONFIG_TPL_USE_TINY_PRINTF=y
 CONFIG_PANIC_HANG=y
+CONFIG_REGEX=y
+CONFIG_LIB_RAND=y
+# CONFIG_LIB_HW_RAND is not set
+CONFIG_SUPPORT_ACPI=y
+# CONFIG_ACPI is not set
+# CONFIG_SPL_ACPI is not set
+# CONFIG_SPL_TINY_MEMSET is not set
+CONFIG_TPL_TINY_MEMSET=y
+# CONFIG_BITREVERSE is not set
+# CONFIG_TRACE is not set
+# CONFIG_CIRCBUF is not set
 CONFIG_CMD_DHRYSTONE=y
+
+#
+# Alternative crypto libraries
+#
+CONFIG_LEGACY_HASHING_AND_CRYPTO=y
+# CONFIG_MBEDTLS_LIB is not set
+CONFIG_LEGACY_HASHING=y
+CONFIG_SHA1_LEGACY=y
+CONFIG_SHA256_LEGACY=y
+CONFIG_MD5_LEGACY=y
+CONFIG_LEGACY_CRYPTO=y
+CONFIG_SPL_LEGACY_HASHING_AND_CRYPTO=y
+# CONFIG_SPL_MBEDTLS_LIB is not set
+CONFIG_SPL_LEGACY_HASHING=y
+CONFIG_SPL_SHA1_LEGACY=y
+CONFIG_SPL_SHA256_LEGACY=y
+CONFIG_SPL_LEGACY_CRYPTO=y
+CONFIG_TPL_LEGACY_HASHING_AND_CRYPTO=y
+# CONFIG_TPL_MBEDTLS_LIB is not set
+CONFIG_TPL_LEGACY_HASHING=y
+
+#
+# Security support
+#
+# CONFIG_AES is not set
+# CONFIG_ECDSA is not set
+CONFIG_RSA=y
+CONFIG_SPL_RSA=y
+CONFIG_SPL_RSA_VERIFY=y
+CONFIG_RSA_VERIFY=y
+# CONFIG_RSA_VERIFY_WITH_PKEY is not set
+# CONFIG_SPL_RSA_VERIFY_WITH_PKEY is not set
+CONFIG_RSA_SOFTWARE_EXP=y
+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
+# CONFIG_TPM is not set
+# CONFIG_SPL_TPM is not set
+# CONFIG_TPL_TPM is not set
+
+#
+# Android Verified Boot
+#
+
+#
+# Hashing Support
+#
+# CONFIG_BLAKE2 is not set
+CONFIG_SHA1=y
+CONFIG_SHA256=y
+# CONFIG_SHA512 is not set
+# CONFIG_SHA384 is not set
+# CONFIG_SHA_HW_ACCEL is not set
+CONFIG_SPL_CRC32=y
+CONFIG_SPL_SHA1=y
+CONFIG_SPL_SHA256=y
+# CONFIG_SPL_SHA512 is not set
+# CONFIG_SPL_SHA384 is not set
+# CONFIG_SPL_SHA_HW_ACCEL is not set
+CONFIG_MD5=y
+# CONFIG_SPL_MD5 is not set
+CONFIG_CRC8=y
+CONFIG_SPL_CRC8=y
+# CONFIG_TPL_CRC8 is not set
+CONFIG_CRC16=y
+# CONFIG_SPL_CRC16 is not set
+CONFIG_CRC32=y
+
+#
+# Compression Support
+#
+CONFIG_LZ4=y
+CONFIG_LZMA=y
+# CONFIG_LZO is not set
+CONFIG_GZIP=y
+# CONFIG_ZLIB_UNCOMPRESS is not set
+# CONFIG_BZIP2 is not set
+CONFIG_ZLIB=y
+# CONFIG_ZSTD is not set
+# CONFIG_SPL_BZIP2 is not set
+# CONFIG_SPL_LZ4 is not set
+# CONFIG_TPL_LZ4 is not set
+# CONFIG_SPL_LZMA is not set
+# CONFIG_TPL_LZMA is not set
+CONFIG_VPL_LZMA=y
+# CONFIG_SPL_LZO is not set
+# CONFIG_SPL_GZIP is not set
+# CONFIG_TPL_GZIP is not set
+# CONFIG_SPL_ZSTD is not set
 CONFIG_ERRNO_STR=y
 # CONFIG_HEXDUMP is not set
+CONFIG_GETOPT=y
+CONFIG_OF_LIBFDT=y
+CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
+CONFIG_SYS_FDT_PAD=0x3000
+CONFIG_SPL_OF_LIBFDT=y
+CONFIG_TPL_OF_LIBFDT=y
+CONFIG_TPL_OF_LIBFDT_ASSUME_MASK=0xff
+
+#
+# System tables
+#
+# CONFIG_BLOBLIST_TABLES is not set
+CONFIG_GENERATE_SMBIOS_TABLE=y
+# CONFIG_GENERATE_SMBIOS_TABLE_VERBOSE is not set
+# CONFIG_LIB_RATIONAL is not set
+# CONFIG_SPL_LIB_RATIONAL is not set
+CONFIG_SMBIOS=y
+# CONFIG_SMBIOS_PARSER is not set
+# CONFIG_OPTEE_LIB is not set
+# CONFIG_OPTEE_IMAGE is not set
+# CONFIG_BOOTM_OPTEE is not set
+# CONFIG_TEST_FDTDEC is not set
+CONFIG_LIB_ELF=y
+CONFIG_LMB=y
+# CONFIG_LMB_ARCH_MEM_MAP is not set
+# CONFIG_PHANDLE_CHECK_SEQ is not set
+
+#
+# Testing
+#
+# CONFIG_UNIT_TEST is not set
+# CONFIG_SPL_UNIT_TEST is not set
+# CONFIG_POST is not set
+
+#
+# Tools options
+#
+CONFIG_MKIMAGE_DTC_PATH="dtc"
+CONFIG_TOOLS_CRC16=y
+CONFIG_TOOLS_CRC32=y
+CONFIG_TOOLS_LIBCRYPTO=y
+CONFIG_TOOLS_KWBIMAGE=y
+CONFIG_TOOLS_FIT=y
+CONFIG_TOOLS_FIT_FULL_CHECK=y
+CONFIG_TOOLS_FIT_PRINT=y
+CONFIG_TOOLS_FIT_RSASSA_PSS=y
+CONFIG_TOOLS_FIT_SIGNATURE=y
+CONFIG_TOOLS_FIT_SIGNATURE_MAX_SIZE=0x10000000
+CONFIG_TOOLS_FIT_VERBOSE=y
+CONFIG_TOOLS_MD5=y
+CONFIG_TOOLS_OF_LIBFDT=y
+CONFIG_TOOLS_SHA1=y
+CONFIG_TOOLS_SHA256=y
+CONFIG_TOOLS_SHA384=y
+CONFIG_TOOLS_SHA512=y
+CONFIG_TOOLS_MKEFICAPSULE=y
+# CONFIG_FSPI_CONF_HEADER is not set
+# CONFIG_TOOLS_MKFWUMDATA is not set
diff --git a/config/u-boot/qemu_arm64_12mb/config/default b/config/u-boot/qemu_arm64_12mb/config/default
index 972651b3..2cd0b94c 100644
--- a/config/u-boot/qemu_arm64_12mb/config/default
+++ b/config/u-boot/qemu_arm64_12mb/config/default
@@ -1,77 +1,1894 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# U-Boot 2025.04 Configuration
+#
+
+#
+# Compiler: gcc (Debian 14.2.0-19) 14.2.0
+#
+CONFIG_CREATE_ARCH_SYMLINK=y
+CONFIG_HAVE_SETJMP=y
+CONFIG_SUPPORT_LITTLE_ENDIAN=y
+CONFIG_SYS_CACHE_SHIFT_6=y
+CONFIG_64BIT=y
+CONFIG_SYS_CACHELINE_SIZE=64
+CONFIG_LINKER_LIST_ALIGN=8
+# CONFIG_ARC is not set
 CONFIG_ARM=y
+# CONFIG_M68K is not set
+# CONFIG_MICROBLAZE is not set
+# CONFIG_MIPS is not set
+# CONFIG_NIOS2 is not set
+# CONFIG_PPC is not set
+# CONFIG_RISCV is not set
+# CONFIG_SANDBOX is not set
+# CONFIG_SH is not set
+# CONFIG_X86 is not set
+# CONFIG_XTENSA is not set
+CONFIG_SYS_ARCH="arm"
+CONFIG_SYS_CPU="armv8"
+CONFIG_SYS_VENDOR="emulation"
+CONFIG_SYS_BOARD="qemu-arm"
+CONFIG_SYS_CONFIG_NAME="qemu-arm"
+
+#
+# Skipping low level initialization functions
+#
+# CONFIG_SKIP_LOWLEVEL_INIT is not set
+# CONFIG_SKIP_LOWLEVEL_INIT_ONLY is not set
+# CONFIG_SYS_ICACHE_OFF is not set
+# CONFIG_SYS_DCACHE_OFF is not set
+
+#
+# ARM architecture
+#
+CONFIG_ARM64=y
+CONFIG_ARM64_CRC32=y
+CONFIG_COUNTER_FREQUENCY=0
 CONFIG_POSITION_INDEPENDENT=y
+# CONFIG_INIT_SP_RELATIVE is not set
+# CONFIG_DRIVER_GICV2 is not set
+# CONFIG_GIC_V3_ITS is not set
+# CONFIG_GICV3_SUPPORT_GIC600 is not set
+CONFIG_STATIC_RELA=y
+CONFIG_DMA_ADDR_T_64BIT=y
+CONFIG_ARM_ASM_UNIFIED=y
+# CONFIG_SYS_ARM_CACHE_CP15 is not set
+# CONFIG_SYS_ARM_MMU is not set
+# CONFIG_SYS_ARM_MPU is not set
+CONFIG_SYS_ARM_ARCH=8
+CONFIG_SYS_ARM_CACHE_WRITEBACK=y
+# CONFIG_SYS_ARM_CACHE_WRITETHROUGH is not set
+# CONFIG_SYS_ARM_CACHE_WRITEALLOC is not set
+# CONFIG_ARCH_CPU_INIT is not set
+CONFIG_SYS_ARCH_TIMER=y
+CONFIG_ARM_SMCCC=y
+# CONFIG_SYS_L2_PL310 is not set
+# CONFIG_SPL_SYS_L2_PL310 is not set
+# CONFIG_SYS_L2CACHE_OFF is not set
+# CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK is not set
+# CONFIG_USE_ARCH_MEMCPY is not set
+# CONFIG_USE_ARCH_MEMSET is not set
+CONFIG_ARM64_SUPPORT_AARCH32=y
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_HISTB is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_MVEBU is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_BCM283X is not set
+# CONFIG_ARCH_BCMSTB is not set
+# CONFIG_ARCH_BCMBCA is not set
+# CONFIG_TARGET_VEXPRESS_CA9X4 is not set
+# CONFIG_TARGET_BCMNS is not set
+# CONFIG_TARGET_BCMNS3 is not set
+# CONFIG_ARCH_EXYNOS is not set
+# CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_HIGHBANK is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_IPQ40XX is not set
+# CONFIG_ARCH_KEYSTONE is not set
+# CONFIG_ARCH_K3 is not set
+# CONFIG_ARCH_OMAP2PLUS is not set
+# CONFIG_ARCH_MESON is not set
+# CONFIG_ARCH_MEDIATEK is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_LPC32XX is not set
+# CONFIG_ARCH_IMX8 is not set
+# CONFIG_ARCH_IMX8M is not set
+# CONFIG_ARCH_IMX8ULP is not set
+# CONFIG_ARCH_IMX9 is not set
+# CONFIG_ARCH_IMXRT is not set
+# CONFIG_ARCH_MX23 is not set
+# CONFIG_ARCH_MX28 is not set
+# CONFIG_ARCH_MX31 is not set
+# CONFIG_ARCH_MX7ULP is not set
+# CONFIG_ARCH_MX7 is not set
+# CONFIG_ARCH_MX6 is not set
+# CONFIG_ARCH_MX5 is not set
+# CONFIG_ARCH_NEXELL is not set
+# CONFIG_ARCH_NPCM is not set
+# CONFIG_ARCH_APPLE is not set
+# CONFIG_ARCH_OWL is not set
 CONFIG_ARCH_QEMU=y
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_SNAPDRAGON is not set
+# CONFIG_ARCH_SOCFPGA is not set
+# CONFIG_ARCH_SUNXI is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_VERSAL is not set
+# CONFIG_ARCH_VERSAL2 is not set
+# CONFIG_ARCH_VERSAL_NET is not set
+# CONFIG_ARCH_VF610 is not set
+# CONFIG_ARCH_ZYNQ is not set
+# CONFIG_ARCH_ZYNQMP_R5 is not set
+# CONFIG_ARCH_ZYNQMP is not set
+# CONFIG_ARCH_TEGRA is not set
+# CONFIG_ARCH_VEXPRESS64 is not set
+# CONFIG_TARGET_CORSTONE1000 is not set
+# CONFIG_TARGET_TOTAL_COMPUTE is not set
+# CONFIG_TARGET_LS2080A_EMU is not set
+# CONFIG_TARGET_LS1088AQDS is not set
+# CONFIG_TARGET_LS2080AQDS is not set
+# CONFIG_TARGET_LS2080ARDB is not set
+# CONFIG_TARGET_LS2081ARDB is not set
+# CONFIG_TARGET_LX2160ARDB is not set
+# CONFIG_TARGET_LX2160AQDS is not set
+# CONFIG_TARGET_LX2162AQDS is not set
+# CONFIG_TARGET_HIKEY is not set
+# CONFIG_TARGET_HIKEY960 is not set
+# CONFIG_TARGET_POPLAR is not set
+# CONFIG_TARGET_LS1012AQDS is not set
+# CONFIG_TARGET_LS1012ARDB is not set
+# CONFIG_TARGET_LS1012A2G5RDB is not set
+# CONFIG_TARGET_LS1012AFRWY is not set
+# CONFIG_TARGET_LS1012AFRDM is not set
+# CONFIG_TARGET_LS1028AQDS is not set
+# CONFIG_TARGET_LS1028ARDB is not set
+# CONFIG_TARGET_LS1088ARDB is not set
+# CONFIG_TARGET_LS1021AQDS is not set
+# CONFIG_TARGET_LS1021ATWR is not set
+# CONFIG_TARGET_PG_WCOM_SELI8 is not set
+# CONFIG_TARGET_PG_WCOM_EXPU1 is not set
+# CONFIG_TARGET_LS1021ATSN is not set
+# CONFIG_TARGET_LS1021AIOT is not set
+# CONFIG_TARGET_LS1043AQDS is not set
+# CONFIG_TARGET_LS1043ARDB is not set
+# CONFIG_TARGET_LS1046AQDS is not set
+# CONFIG_TARGET_LS1046ARDB is not set
+# CONFIG_TARGET_LS1046AFRWY is not set
+# CONFIG_ARCH_SC5XX is not set
+# CONFIG_TARGET_SL28 is not set
+# CONFIG_TARGET_TEN64 is not set
+# CONFIG_ARCH_UNIPHIER is not set
+# CONFIG_ARCH_SYNQUACER is not set
+# CONFIG_ARCH_STM32 is not set
+# CONFIG_ARCH_STI is not set
+# CONFIG_ARCH_STM32MP is not set
+# CONFIG_ARCH_ROCKCHIP is not set
+# CONFIG_ARCH_OCTEONTX is not set
+# CONFIG_ARCH_OCTEONTX2 is not set
+# CONFIG_TARGET_THUNDERX_88XX is not set
+# CONFIG_ARCH_ASPEED is not set
+# CONFIG_TARGET_DURIAN is not set
+# CONFIG_TARGET_POMELO is not set
+# CONFIG_TARGET_PE2201 is not set
+# CONFIG_TARGET_PRESIDIO_ASIC is not set
+# CONFIG_TARGET_XENGUEST_ARM64 is not set
+# CONFIG_ARCH_GXP is not set
 CONFIG_TEXT_BASE=0x50000000
 CONFIG_SYS_MALLOC_LEN=0x1000000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_BLOBLIST_SIZE_RELOC=0x2000
 CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SOURCE_FILE=""
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000
 CONFIG_ENV_SIZE=0x40000
+# CONFIG_DM_GPIO is not set
 CONFIG_DEFAULT_DEVICE_TREE="qemu-arm64"
+CONFIG_DDR_SI_TEST=y
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+# CONFIG_OF_LIBFDT_OVERLAY is not set
+CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
+# CONFIG_DM_RESET is not set
+CONFIG_SYS_MONITOR_LEN=0
+# CONFIG_TARGET_QEMU_ARM_32BIT is not set
+CONFIG_TARGET_QEMU_ARM_64BIT=y
+# CONFIG_TARGET_QEMU_ARM_SBSA is not set
+CONFIG_SYS_BOOTM_LEN=0x4000000
 CONFIG_SYS_LOAD_ADDR=0x40200000
+CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
+CONFIG_ERR_PTR_OFFSET=0x0
+CONFIG_PRE_CON_BUF_ADDR=0x40100000
+CONFIG_PRE_CON_BUF_SZ=4096
 CONFIG_DEBUG_UART_BASE=0x9000000
 CONFIG_DEBUG_UART_CLOCK=0
+# CONFIG_DEBUG_UART_BOARD_INIT is not set
+CONFIG_IDENT_STRING=""
+CONFIG_SYS_CLK_FREQ=0
+# CONFIG_CHIP_DIP_SCAN is not set
+# CONFIG_CMO_BY_VA_ONLY is not set
+# CONFIG_ARMV8_MULTIENTRY is not set
+# CONFIG_ARMV8_SET_SMPEN is not set
+# CONFIG_ARMV8_SWITCH_TO_EL1 is not set
+
+#
+# ARMv8 secure monitor firmware
+#
+# CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT is not set
+CONFIG_PSCI_RESET=y
+# CONFIG_ARMV8_PSCI is not set
+# CONFIG_ARMV8_EA_EL3_FIRST is not set
+# CONFIG_ARMV8_UDELAY_EVENT_STREAM is not set
 CONFIG_ARMV8_CRYPTO=y
+CONFIG_ARMV8_CE_SHA1=y
+CONFIG_ARMV8_CE_SHA256=y
+CONFIG_SYS_MEM_TOP_HIDE=0x0
+CONFIG_MTDPARTS_NOR0="64m(u-boot)"
+CONFIG_MTDPARTS_NOR1="64m(u-boot-env)"
+
+#
+# ARM debug
+#
+CONFIG_BUILD_TARGET=""
+# CONFIG_SYS_PCI_64BIT is not set
 CONFIG_PCI=y
+CONFIG_FWU_NUM_BANKS=2
+CONFIG_FWU_NUM_IMAGES_PER_BANK=2
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
+# CONFIG_OF_BOARD_FIXUP is not set
+
+#
+# Functionality shared between NXP SoCs
+#
+# CONFIG_NXP_ESBC is not set
+CONFIG_SYS_LITTLE_ENDIAN=y
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_CC_IS_GCC=y
+CONFIG_GCC_VERSION=140200
+CONFIG_CLANG_VERSION=0
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+# CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
+# CONFIG_CC_OPTIMIZE_FOR_DEBUG is not set
+# CONFIG_OPTIMIZE_INLINING is not set
+CONFIG_ARCH_SUPPORTS_LTO=y
+# CONFIG_LTO is not set
+CONFIG_CC_HAS_ASM_INLINE=y
+# CONFIG_XEN is not set
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+# CONFIG_SYS_BOOT_GET_CMDLINE is not set
+# CONFIG_SYS_BOOT_GET_KBD is not set
+CONFIG_SYS_MALLOC_F=y
+# CONFIG_VALGRIND is not set
+CONFIG_EXPERT=y
+CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y
+# CONFIG_SYS_MALLOC_DEFAULT_TO_INIT is not set
+# CONFIG_TOOLS_DEBUG is not set
+CONFIG_PHYS_64BIT=y
+CONFIG_FDT_64BIT=y
+# CONFIG_REMAKE_ELF is not set
+# CONFIG_HAS_BOARD_SIZE_LIMIT is not set
+# CONFIG_SYS_CUSTOM_LDSCRIPT is not set
+CONFIG_PLATFORM_ELFENTRY="_start"
+CONFIG_STACK_SIZE=0x1000000
+# CONFIG_MP is not set
+CONFIG_HAVE_TEXT_BASE=y
+# CONFIG_HAVE_SYS_UBOOT_START is not set
+CONFIG_SYS_UBOOT_START=0x50000000
+CONFIG_HAVE_SYS_MONITOR_BASE=y
+CONFIG_SYS_MONITOR_BASE=0x50000000
+# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
+# CONFIG_API is not set
+
+#
+# Boot options
+#
+
+#
+# UEFI Support
+#
+CONFIG_EFI_LOADER=y
+CONFIG_EFI_BINARY_EXEC=y
+# CONFIG_EFI_SECURE_BOOT is not set
+
+#
+# UEFI services
+#
+CONFIG_EFI_GET_TIME=y
+CONFIG_EFI_SET_TIME=y
+CONFIG_EFI_HAVE_RUNTIME_RESET=y
+
+#
+# UEFI Variables
+#
+CONFIG_EFI_VARIABLE_FILE_STORE=y
+# CONFIG_EFI_RT_VOLATILE_STORE is not set
+# CONFIG_EFI_VARIABLE_NO_STORE is not set
+# CONFIG_EFI_VARIABLES_PRESEED is not set
+CONFIG_EFI_VAR_BUF_SIZE=131072
+CONFIG_EFI_PLATFORM_LANG_CODES="en-US"
+
+#
+# Capsule support
+#
+# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
+# CONFIG_EFI_CAPSULE_ON_DISK is not set
+CONFIG_EFI_CAPSULE_MAX=15
+
+#
+# UEFI protocol support
+#
+CONFIG_EFI_DEVICE_PATH_TO_TEXT=y
+CONFIG_EFI_DEVICE_PATH_UTIL=y
+CONFIG_EFI_DT_FIXUP=y
+CONFIG_EFI_LOADER_HII=y
+CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y
+CONFIG_EFI_UNICODE_CAPITALIZATION=y
+CONFIG_EFI_RNG_PROTOCOL=y
+CONFIG_EFI_TCG2_PROTOCOL=y
+# CONFIG_EFI_TCG2_PROTOCOL_MEASURE_DTB is not set
+CONFIG_EFI_LOAD_FILE2_INITRD=y
+CONFIG_EFI_IP4_CONFIG2_PROTOCOL=y
+CONFIG_EFI_HTTP_PROTOCOL=y
+
+#
+# Misc options
+#
+# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set
+CONFIG_EFI_ECPT=y
+CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
+# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
+
+#
+# EFI bootmanager
+#
+CONFIG_EFI_BOOTMGR=y
 CONFIG_EFI_HTTP_BOOT=y
+CONFIG_BOOTEFI_HELLO_COMPILE=y
+CONFIG_BOOTEFI_TESTAPP_COMPILE=y
+
+#
+# Boot images
+#
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_TIMESTAMP=y
 CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x0
+CONFIG_FIT_FULL_CHECK=y
 CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_SIGNATURE_MAX_SIZE=0x10000000
+# CONFIG_FIT_RSASSA_PSS is not set
+# CONFIG_FIT_CIPHER is not set
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_BEST_MATCH=y
+CONFIG_FIT_PRINT=y
+# CONFIG_SPL_LOAD_FIT_FULL is not set
+CONFIG_PXE_UTILS=y
+CONFIG_BOOT_DEFAULTS_FEATURES=y
+CONFIG_BOOT_DEFAULTS_CMDS=y
+CONFIG_BOOT_DEFAULTS=y
+CONFIG_BOOTSTD=y
 CONFIG_BOOTSTD_FULL=y
+CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_BOOTSTD_BOOTCOMMAND=y
+CONFIG_BOOTSTD_MENU=y
+CONFIG_BOOTMETH_GLOBAL=y
+# CONFIG_BOOTMETH_ANDROID is not set
+# CONFIG_BOOTMETH_CROS is not set
+CONFIG_BOOTMETH_EXTLINUX=y
+CONFIG_BOOTMETH_EXTLINUX_PXE=y
+CONFIG_BOOTMETH_EFILOADER=y
+CONFIG_BOOTMETH_EFI_BOOTMGR=y
+CONFIG_BOOTMETH_QFW=y
+CONFIG_BOOTMETH_VBE=y
+CONFIG_BOOTMETH_DISTRO=y
+CONFIG_BOOTMETH_VBE_REQUEST=y
+CONFIG_BOOTMETH_VBE_SIMPLE=y
+# CONFIG_BOOTMETH_VBE_ABREC is not set
+CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
+CONFIG_EXPO=y
+CONFIG_BOOTMETH_SCRIPT=y
+# CONFIG_UPL is not set
 CONFIG_LEGACY_IMAGE_FORMAT=y
+# CONFIG_MEASURED_BOOT is not set
+CONFIG_SUPPORT_RAW_INITRD=y
+# CONFIG_CHROMEOS is not set
+# CONFIG_CHROMEOS_VBOOT is not set
+# CONFIG_RAMBOOT_PBL is not set
+CONFIG_SYS_BOOT_RAMDISK_HIGH=y
+# CONFIG_DISTRO_DEFAULTS is not set
+
+#
+# Boot timing
+#
+# CONFIG_BOOTSTAGE is not set
+# CONFIG_SHOW_BOOT_PROGRESS is not set
+
+#
+# Boot media
+#
+# CONFIG_NAND_BOOT is not set
+# CONFIG_ONENAND_BOOT is not set
+# CONFIG_QSPI_BOOT is not set
+# CONFIG_SATA_BOOT is not set
+# CONFIG_SD_BOOT is not set
+# CONFIG_SD_BOOT_QSPI is not set
+# CONFIG_SPI_BOOT is not set
+
+#
+# Autoboot options
+#
+CONFIG_AUTOBOOT=y
+CONFIG_BOOTDELAY=2
+# CONFIG_AUTOBOOT_KEYED is not set
+# CONFIG_AUTOBOOT_USE_MENUKEY is not set
+# CONFIG_BOOT_RETRY is not set
+
+#
+# Image support
+#
+# CONFIG_IMAGE_PRE_LOAD is not set
+
+#
+# Devicetree fixup
+#
+# CONFIG_OF_ENV_SETUP is not set
+# CONFIG_OF_BOARD_SETUP is not set
+# CONFIG_OF_SYSTEM_SETUP is not set
+# CONFIG_OF_STDOUT_VIA_ALIAS is not set
+# CONFIG_FDT_FIXUP_PARTITIONS is not set
+# CONFIG_FDT_SIMPLEFB is not set
+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
+# CONFIG_USE_BOOTARGS is not set
+# CONFIG_BOOTARGS_SUBST is not set
+CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi"
 CONFIG_USE_PREBOOT=y
+CONFIG_PREBOOT="usb start"
+CONFIG_PREBOOT_DEFINED=y
+CONFIG_DEFAULT_FDT_FILE=""
+# CONFIG_SAVE_PREV_BL_FDT_ADDR is not set
+# CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR is not set
+
+#
+# Configuration editor
+#
+# CONFIG_CEDIT is not set
+
+#
+# Console
+#
+CONFIG_MENU=y
+# CONFIG_CONSOLE_RECORD is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1044
+# CONFIG_DISABLE_CONSOLE is not set
+CONFIG_LOGLEVEL=4
+# CONFIG_SILENT_CONSOLE is not set
+# CONFIG_SPL_SILENT_CONSOLE is not set
+# CONFIG_TPL_SILENT_CONSOLE is not set
+CONFIG_PRE_CONSOLE_BUFFER=y
+CONFIG_CONSOLE_FLUSH_SUPPORT=y
+# CONFIG_CONSOLE_FLUSH_ON_NEWLINE is not set
+CONFIG_CONSOLE_MUX=y
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
+# CONFIG_SYS_CONSOLE_ENV_OVERWRITE is not set
+# CONFIG_SYS_CONSOLE_INFO_QUIET is not set
+CONFIG_SYS_STDIO_DEREGISTER=y
+# CONFIG_SPL_SYS_STDIO_DEREGISTER is not set
+CONFIG_SYS_DEVICE_NULLDEV=y
+
+#
+# Logging
+#
+# CONFIG_LOG is not set
+
+#
+# Init options
+#
+# CONFIG_BOARD_TYPES is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
+# CONFIG_DISPLAY_BOARDINFO_LATE is not set
+
+#
+# Start-up hooks
+#
+CONFIG_CYCLIC=y
+# CONFIG_SPL_CYCLIC is not set
+CONFIG_CYCLIC_MAX_CPU_TIME_US=5000
+CONFIG_EVENT=y
+CONFIG_EVENT_DYNAMIC=y
+# CONFIG_EVENT_DEBUG is not set
+# CONFIG_ARCH_MISC_INIT is not set
+# CONFIG_BOARD_EARLY_INIT_F is not set
+# CONFIG_BOARD_EARLY_INIT_R is not set
+# CONFIG_BOARD_POSTCLK_INIT is not set
+CONFIG_BOARD_LATE_INIT=y
+# CONFIG_CLOCKS is not set
+# CONFIG_HWCONFIG is not set
+CONFIG_LAST_STAGE_INIT=y
+# CONFIG_MISC_INIT_R is not set
+# CONFIG_SYS_MALLOC_BOOTPARAMS is not set
+# CONFIG_ID_EEPROM is not set
 CONFIG_PCI_INIT_R=y
+# CONFIG_RESET_PHY_R is not set
+
+#
+# Security support
+#
+CONFIG_HASH=y
+# CONFIG_HASH_CRC8 is not set
+# CONFIG_STACKPROTECTOR is not set
+# CONFIG_BOARD_RNG_SEED is not set
+
+#
+# Update support
+#
+CONFIG_UPDATE_COMMON=y
+CONFIG_UPDATE_TFTP_CNT_MAX=0
+CONFIG_UPDATE_TFTP_MSEC_MAX=100
+CONFIG_UPDATE_LOAD_ADDR=0x100000
+# CONFIG_UPDATE_FIT is not set
+# CONFIG_ANDROID_AB is not set
+
+#
+# Blob list
+#
 CONFIG_BLOBLIST=y
+# CONFIG_BLOBLIST_FIXED is not set
+CONFIG_BLOBLIST_ALLOC=y
+CONFIG_BLOBLIST_SIZE=0x400
+CONFIG_IMAGE_SIGN_INFO=y
+CONFIG_CMDLINE=y
+CONFIG_HUSH_PARSER=y
+
+#
+# Hush flavor to use
+#
+CONFIG_HUSH_OLD_PARSER=y
+# CONFIG_HUSH_MODERN_PARSER is not set
+CONFIG_CMDLINE_EDITING=y
+# CONFIG_CMDLINE_PS_SUPPORT is not set
+CONFIG_AUTO_COMPLETE=y
+CONFIG_SYS_LONGHELP=y
+CONFIG_SYS_PROMPT="=> "
+CONFIG_SYS_PROMPT_HUSH_PS2="> "
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_XTRACE=y
+
+#
+# Commands
+#
+
+#
+# Info commands
+#
+CONFIG_CMD_BDI=y
+# CONFIG_CMD_BDINFO_EXTRA is not set
+# CONFIG_CMD_CONFIG is not set
+CONFIG_CMD_CONSOLE=y
+# CONFIG_CMD_UFETCH is not set
+# CONFIG_CMD_HISTORY is not set
+# CONFIG_CMD_LICENSE is not set
+# CONFIG_CMD_PMC is not set
 CONFIG_CMD_SMBIOS=y
+
+#
+# Boot commands
+#
+CONFIG_CMD_BOOTD=y
+CONFIG_CMD_BOOTM=y
+CONFIG_CMD_BOOTDEV=y
+CONFIG_CMD_BOOTFLOW=y
+CONFIG_CMD_BOOTFLOW_FULL=y
+CONFIG_CMD_BOOTFLOW_BOOTDELAY=30
+CONFIG_CMD_BOOTMETH=y
+CONFIG_CMD_BOOTSTD=y
+CONFIG_BOOTM_EFI=y
+CONFIG_BOOTM_ELF=y
 CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_BOOTI=y
+CONFIG_BOOTM_LINUX=y
+CONFIG_BOOTM_NETBSD=y
+# CONFIG_BOOTM_OPENRTOS is not set
+# CONFIG_BOOTM_OSE is not set
+CONFIG_BOOTM_PLAN9=y
+CONFIG_BOOTM_RTEMS=y
+# CONFIG_CMD_UPL is not set
+CONFIG_CMD_VBE=y
+CONFIG_BOOTM_VXWORKS=y
+CONFIG_CMD_BOOTEFI=y
+CONFIG_CMD_BOOTEFI_BINARY=y
+CONFIG_CMD_BOOTEFI_BOOTMGR=y
+CONFIG_CMD_BOOTEFI_HELLO=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
+# CONFIG_CMD_BOOTMENU is not set
+# CONFIG_CMD_ADTIMG is not set
+CONFIG_CMD_ELF=y
+CONFIG_CMD_ELF_BOOTVX=y
+# CONFIG_CMD_ELF_FDT_SETUP is not set
+CONFIG_CMD_FDT=y
+CONFIG_CMD_GO=y
+CONFIG_CMD_RUN=y
+CONFIG_CMD_IMI=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_XIMG=y
+CONFIG_SYS_XIMG_LEN=0x800000
+
+#
+# Environment commands
+#
+# CONFIG_CMD_ASKENV is not set
+CONFIG_CMD_EXPORTENV=y
+CONFIG_CMD_IMPORTENV=y
+CONFIG_CMD_EDITENV=y
+# CONFIG_CMD_GREPENV is not set
+CONFIG_CMD_SAVEENV=y
+# CONFIG_CMD_ERASEENV is not set
+CONFIG_CMD_ENV_EXISTS=y
+# CONFIG_CMD_ENV_CALLBACK is not set
+# CONFIG_CMD_ENV_FLAGS is not set
 CONFIG_CMD_NVEDIT_EFI=y
+# CONFIG_CMD_NVEDIT_INDIRECT is not set
+# CONFIG_CMD_NVEDIT_INFO is not set
+# CONFIG_CMD_NVEDIT_LOAD is not set
+# CONFIG_CMD_NVEDIT_SELECT is not set
+
+#
+# Memory commands
+#
+# CONFIG_CMD_BINOP is not set
+CONFIG_CMD_BLOBLIST=y
+CONFIG_CMD_CRC32=y
+# CONFIG_CRC32_VERIFY is not set
+# CONFIG_LOOPW is not set
+# CONFIG_CMD_MD5SUM is not set
+# CONFIG_CMD_MEMINFO is not set
+CONFIG_CMD_MEMORY=y
+# CONFIG_CMD_MEM_SEARCH is not set
+# CONFIG_CMD_MX_CYCLIC is not set
+CONFIG_CMD_RANDOM=y
+# CONFIG_CMD_MEMTEST is not set
+# CONFIG_CMD_SHA1SUM is not set
+# CONFIG_CMD_STRINGS is not set
+
+#
+# Compression commands
+#
+CONFIG_CMD_LZMADEC=y
+CONFIG_CMD_UNLZ4=y
+CONFIG_CMD_UNZIP=y
+# CONFIG_CMD_ZIP is not set
+
+#
+# Device access commands
+#
+# CONFIG_CMD_ARMFLASH is not set
+# CONFIG_CMD_BCB is not set
+# CONFIG_CMD_BIND is not set
+# CONFIG_CMD_DEMO is not set
 CONFIG_CMD_DFU=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_FLASH=y
+# CONFIG_CMD_FUSE is not set
+# CONFIG_CMD_GPIO is not set
+# CONFIG_CMD_GPT is not set
+# CONFIG_CMD_IDE is not set
+# CONFIG_CMD_IO is not set
+# CONFIG_CMD_IOTRACE is not set
+# CONFIG_CMD_I2C is not set
+CONFIG_CMD_LOADB=y
+# CONFIG_CMD_LOADM is not set
+CONFIG_CMD_LOADS=y
+# CONFIG_LOADS_ECHO is not set
+# CONFIG_CMD_SAVES is not set
+# CONFIG_SYS_LOADS_BAUD_CHANGE is not set
+CONFIG_CMD_LOADXY_TIMEOUT=90
+# CONFIG_CMD_LSBLK is not set
+# CONFIG_CMD_MBR is not set
+# CONFIG_CMD_CLONE is not set
 CONFIG_CMD_MTD=y
+# CONFIG_CMD_MTD_OTP is not set
+CONFIG_CMD_NVME=y
+# CONFIG_CMD_ONENAND is not set
+CONFIG_CMD_PART=y
 CONFIG_CMD_PCI=y
+# CONFIG_CMD_PCI_MPS is not set
+CONFIG_CMD_POWEROFF=y
+# CONFIG_CMD_READ is not set
+# CONFIG_CMD_SATA is not set
+CONFIG_CMD_SCSI=y
+# CONFIG_CMD_SDRAM is not set
+CONFIG_CMD_USB=y
+# CONFIG_CMD_RKMTD is not set
+CONFIG_CMD_VIRTIO=y
+# CONFIG_CMD_WRITE is not set
+
+#
+# Shell scripting commands
+#
+# CONFIG_CMD_CAT is not set
+CONFIG_CMD_ECHO=y
+CONFIG_CMD_ITEST=y
+CONFIG_CMD_SOURCE=y
+CONFIG_CMD_SETEXPR=y
+# CONFIG_CMD_SETEXPR_FMT is not set
+# CONFIG_CMD_XXD is not set
+CONFIG_CMD_NET=y
+CONFIG_CMD_BOOTP=y
+# CONFIG_BOOTP_MAY_FAIL is not set
+CONFIG_BOOTP_BOOTPATH=y
+# CONFIG_BOOTP_VENDOREX is not set
+# CONFIG_BOOTP_BOOTFILESIZE is not set
+CONFIG_BOOTP_DNS=y
+# CONFIG_BOOTP_DNS2 is not set
+CONFIG_BOOTP_GATEWAY=y
+CONFIG_BOOTP_HOSTNAME=y
+# CONFIG_BOOTP_PREFER_SERVERIP is not set
+CONFIG_BOOTP_SUBNETMASK=y
+# CONFIG_BOOTP_NISDOMAIN is not set
+# CONFIG_BOOTP_NTPSERVER is not set
+# CONFIG_CMD_PCAP is not set
+CONFIG_BOOTP_PXE=y
+CONFIG_BOOTP_PXE_CLIENTARCH=0x16
+# CONFIG_BOOTP_PXE_DHCP_OPTION is not set
+CONFIG_BOOTP_VCI_STRING="U-Boot.armv8"
+# CONFIG_CMD_TFTPPUT is not set
+# CONFIG_CMD_TFTPSRV is not set
+CONFIG_NET_TFTP_VARS=y
+# CONFIG_CMD_RARP is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_SYS_DISABLE_AUTOLOAD is not set
+# CONFIG_CMD_CDP is not set
+# CONFIG_CMD_SNTP is not set
+# CONFIG_CMD_LINK_LOCAL is not set
+# CONFIG_CMD_ETHSW is not set
+# CONFIG_CMD_WOL is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_TFTPBOOT=y
+CONFIG_CMD_WGET=y
+CONFIG_CMD_PXE=y
+
+#
+# Misc commands
+#
+# CONFIG_CMD_2048 is not set
+# CONFIG_CMD_BMP is not set
+# CONFIG_CMD_BSP is not set
+CONFIG_CMD_BLOCK_CACHE=y
+CONFIG_CMD_BLKMAP=y
+# CONFIG_CMD_CACHE is not set
+# CONFIG_CMD_CONITRACE is not set
+CONFIG_CMD_CLS=y
 CONFIG_CMD_EFIDEBUG=y
+CONFIG_CMD_EFICONFIG=y
+# CONFIG_CMD_EXCEPTION is not set
+# CONFIG_CMD_INI is not set
+CONFIG_CMD_DATE=y
+# CONFIG_CMD_RTC is not set
+# CONFIG_CMD_TIME is not set
+# CONFIG_CMD_GETTIME is not set
+# CONFIG_CMD_PAUSE is not set
+# CONFIG_CMD_RNG is not set
+# CONFIG_CMD_KASLRSEED is not set
+CONFIG_CMD_SLEEP=y
+# CONFIG_CMD_TIMER is not set
+# CONFIG_CMD_SYSBOOT is not set
+CONFIG_CMD_QFW=y
+# CONFIG_CMD_PSTORE is not set
+# CONFIG_CMD_TERMINAL is not set
+# CONFIG_CMD_UUID is not set
+CONFIG_CMD_VIDCONSOLE=y
+# CONFIG_CMD_SELECT_FONT is not set
+
+#
+# TI specific command line interface
+#
+
+#
+# Power commands
+#
+
+#
+# Security commands
+#
+# CONFIG_CMD_AES is not set
+# CONFIG_CMD_BLOB is not set
+# CONFIG_CMD_HASH is not set
+# CONFIG_CMD_HVC is not set
+# CONFIG_CMD_SMC is not set
+CONFIG_CMD_TPM_V1=y
+CONFIG_CMD_TPM_V2=y
 CONFIG_CMD_TPM=y
+# CONFIG_CMD_TPM_TEST is not set
+
+#
+# Firmware commands
+#
+
+#
+# Filesystem commands
+#
+# CONFIG_CMD_BTRFS is not set
+# CONFIG_CMD_EROFS is not set
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+# CONFIG_CMD_EXT4_WRITE is not set
+CONFIG_CMD_FAT=y
+# CONFIG_CMD_SQUASHFS is not set
+CONFIG_CMD_FS_GENERIC=y
+# CONFIG_CMD_FS_UUID is not set
+# CONFIG_CMD_JFFS2 is not set
 CONFIG_CMD_MTDPARTS=y
+# CONFIG_CMD_MTDPARTS_SPREAD is not set
+# CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES is not set
+# CONFIG_CMD_ZFS is not set
+
+#
+# Debug commands
+#
+CONFIG_CMD_CYCLIC=y
+# CONFIG_CMD_DIAG is not set
+# CONFIG_CMD_EVENT is not set
+# CONFIG_CMD_LOG is not set
+# CONFIG_CMD_UBI is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITIONS=y
+# CONFIG_MAC_PARTITION is not set
+# CONFIG_TEGRA_PARTITION is not set
+CONFIG_DOS_PARTITION=y
+CONFIG_ISO_PARTITION=y
+# CONFIG_AMIGA_PARTITION is not set
+CONFIG_EFI_PARTITION=y
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=128
+CONFIG_EFI_PARTITION_ENTRIES_OFF=0
+CONFIG_PARTITION_UUIDS=y
+# CONFIG_PARTITION_TYPE_GUID is not set
+CONFIG_SUPPORT_OF_CONTROL=y
+
+#
+# Device Tree Control
+#
+CONFIG_OF_CONTROL=y
+CONFIG_OF_REAL=y
+# CONFIG_OF_LIVE is not set
+# CONFIG_OF_UPSTREAM is not set
+CONFIG_OF_SEPARATE=y
+# CONFIG_OF_EMBED is not set
+# CONFIG_OF_INITIAL_DTB_READONLY is not set
+CONFIG_OF_BOARD=y
+CONFIG_OF_HAS_PRIOR_STAGE=y
+CONFIG_OF_OMIT_DTB=y
+CONFIG_DEVICE_TREE_INCLUDES=""
+CONFIG_OF_LIST="qemu-arm64"
+CONFIG_OF_OVERLAY_LIST=""
+# CONFIG_MULTI_DTB_FIT is not set
+CONFIG_OF_TAG_MIGRATE=y
+# CONFIG_OF_DTB_PROPS_REMOVE is not set
+
+#
+# Environment
+#
+CONFIG_ENV_SUPPORT=y
+CONFIG_ENV_CALLBACK_LIST_STATIC=""
+CONFIG_SAVEENV=y
+# CONFIG_ENV_OVERWRITE is not set
+# CONFIG_OVERWRITE_ETHADDR_ONCE is not set
+CONFIG_ENV_MIN_ENTRIES=64
+CONFIG_ENV_MAX_ENTRIES=512
+CONFIG_ENV_IS_DEFAULT=y
+CONFIG_ENV_IS_NOWHERE=y
+# CONFIG_ENV_IS_IN_EEPROM is not set
+# CONFIG_ENV_IS_IN_FAT is not set
+# CONFIG_ENV_IS_IN_EXT4 is not set
+# CONFIG_ENV_IS_IN_FLASH is not set
+# CONFIG_ENV_IS_IN_NAND is not set
+# CONFIG_ENV_IS_IN_NVRAM is not set
+# CONFIG_ENV_IS_IN_REMOTE is not set
+# CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set
+# CONFIG_SYS_RELOC_GD_ENV_ADDR is not set
+# CONFIG_USE_DEFAULT_ENV_FILE is not set
+# CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set
+# CONFIG_ENV_IMPORT_FDT is not set
+# CONFIG_ENV_APPEND is not set
+# CONFIG_ENV_WRITEABLE_LIST is not set
+# CONFIG_ENV_ACCESS_IGNORE_FORCE is not set
+# CONFIG_USE_BOOTFILE is not set
+# CONFIG_USE_ETHPRIME is not set
+# CONFIG_USE_HOSTNAME is not set
+# CONFIG_VERSION_VARIABLE is not set
+
+#
+# Networking
+#
+# CONFIG_NO_NET is not set
+CONFIG_NET=y
+# CONFIG_NET_LWIP is not set
+CONFIG_ARP_TIMEOUT=5000
+CONFIG_NET_RETRY_COUNT=5
+# CONFIG_PROT_UDP is not set
+# CONFIG_BOOTP_SEND_HOSTNAME is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_IP_DEFRAG is not set
+# CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set
+# CONFIG_TFTP_PORT is not set
+CONFIG_TFTP_WINDOWSIZE=1
+# CONFIG_TFTP_TSIZE is not set
+# CONFIG_SERVERIP_FROM_PROXYDHCP is not set
+CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS=100
+# CONFIG_KEEP_SERVERADDR is not set
+# CONFIG_UDP_CHECKSUM is not set
+# CONFIG_BOOTP_SERVERIP is not set
+CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64
+# CONFIG_USE_GATEWAYIP is not set
+# CONFIG_USE_IPADDR is not set
+# CONFIG_USE_NETMASK is not set
+# CONFIG_USE_ROOTPATH is not set
+# CONFIG_USE_SERVERIP is not set
+CONFIG_PROT_TCP=y
+# CONFIG_PROT_TCP_SACK is not set
+# CONFIG_IPV6 is not set
+CONFIG_BOOTDEV_ETH=y
+# CONFIG_NET_RANDOM_ETHADDR is not set
+CONFIG_WGET=y
+CONFIG_TFTP_BLOCKSIZE=1468
+CONFIG_SYS_RX_ETH_BUFFER=4
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_DM=y
+# CONFIG_DM_WARN is not set
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_STATS is not set
+CONFIG_DM_DEVICE_REMOVE=y
+CONFIG_DM_EVENT=y
+CONFIG_DM_STDIO=y
+CONFIG_DM_SEQ_ALIAS=y
+# CONFIG_DM_DMA is not set
+# CONFIG_REGMAP is not set
+# CONFIG_DEVRES is not set
+CONFIG_SIMPLE_BUS=y
+# CONFIG_SIMPLE_BUS_CORRECT_RANGE is not set
+CONFIG_OF_TRANSLATE=y
+# CONFIG_TRANSLATION_OFFSET is not set
+CONFIG_DM_DEV_READ_INLINE=y
+# CONFIG_OFNODE_MULTI_TREE is not set
+# CONFIG_BOUNCE_BUFFER is not set
+# CONFIG_ADC is not set
+# CONFIG_SATA is not set
+CONFIG_LIBATA=y
 CONFIG_SCSI_AHCI=y
+
+#
+# SATA/SCSI device support
+#
 CONFIG_AHCI_PCI=y
+# CONFIG_DWC_AHCI is not set
+# CONFIG_DWC_AHSATA is not set
+# CONFIG_MTK_AHCI is not set
+# CONFIG_AHCI_GENERIC is not set
+# CONFIG_SUNXI_AHCI is not set
+# CONFIG_AXI is not set
+
+#
+# Bus devices
+#
+CONFIG_BLK=y
+CONFIG_BLOCK_CACHE=y
+CONFIG_BLKMAP=y
+# CONFIG_EFI_MEDIA is not set
+# CONFIG_IDE is not set
+# CONFIG_LBA48 is not set
+# CONFIG_SYS_64BIT_LBA is not set
+# CONFIG_RKMTD is not set
+# CONFIG_BOOTCOUNT_LIMIT is not set
+
+#
+# Button Support
+#
+# CONFIG_BUTTON is not set
+
+#
+# Cache Controller drivers
+#
+# CONFIG_CACHE is not set
+# CONFIG_L2X0_CACHE is not set
+# CONFIG_ANDES_L2_CACHE is not set
+# CONFIG_NCORE_CACHE is not set
+# CONFIG_SIFIVE_CCACHE is not set
+# CONFIG_SIFIVE_PL2 is not set
+
+#
+# Clock
+#
+# CONFIG_CLK is not set
+# CONFIG_CLK_CCF is not set
+# CONFIG_COMMON_CLK_ADI_SHARED is not set
+# CONFIG_CLK_RCAR is not set
+# CONFIG_CLK_RCAR_CPG_LIB is not set
+# CONFIG_CPU is not set
+
+#
+# Hardware crypto devices
+#
+# CONFIG_DM_HASH is not set
+# CONFIG_FSL_CAAM is not set
+CONFIG_CAAM_64BIT=y
+# CONFIG_SYS_FSL_SEC_BE is not set
+# CONFIG_SYS_FSL_SEC_LE is not set
+# CONFIG_FSL_DCP_RNG is not set
+# CONFIG_NPCM_AES is not set
+# CONFIG_NPCM_SHA is not set
+# CONFIG_DDR_SPD is not set
+# CONFIG_IMX_SNPS_DDR_PHY is not set
+
+#
+# Demo for driver model
+#
+# CONFIG_DM_DEMO is not set
+
+#
+# DFU support
+#
+CONFIG_DFU=y
+CONFIG_DFU_OVER_TFTP=y
+CONFIG_DFU_WRITE_ALT=y
 CONFIG_DFU_TFTP=y
+# CONFIG_DFU_TIMEOUT is not set
 CONFIG_DFU_MTD=y
 CONFIG_DFU_RAM=y
+# CONFIG_DFU_VIRT is not set
+# CONFIG_DFU_SCSI is not set
+CONFIG_SET_DFU_ALT_INFO=y
+CONFIG_SYS_DFU_DATA_BUF_SIZE=0x800000
+CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000
+CONFIG_DFU_NAME_MAX_SIZE=32
+
+#
+# DMA Support
+#
+# CONFIG_DMA is not set
+# CONFIG_DMA_LPC32XX is not set
+# CONFIG_TI_EDMA3 is not set
+# CONFIG_DMA_LEGACY is not set
+
+#
+# Extcon Support
+#
+# CONFIG_EXTCON is not set
+
+#
+# Fastboot support
+#
+# CONFIG_UDP_FUNCTION_FASTBOOT is not set
+# CONFIG_TCP_FUNCTION_FASTBOOT is not set
+CONFIG_FIRMWARE=y
+CONFIG_ARM_PSCI_FW=y
+# CONFIG_ZYNQMP_FIRMWARE is not set
+# CONFIG_ARM_SMCCC_FEATURES is not set
+# CONFIG_ARM_FFA_TRANSPORT is not set
+# CONFIG_SCMI_FIRMWARE is not set
+# CONFIG_DM_FUZZING_ENGINE is not set
+
+#
+# FPGA support
+#
+# CONFIG_FPGA_ALTERA is not set
+# CONFIG_FPGA_SOCFPGA is not set
+# CONFIG_FPGA_LATTICE is not set
+# CONFIG_FPGA_XILINX is not set
+# CONFIG_DM_FPGA is not set
+# CONFIG_FWU_MDATA is not set
+CONFIG_GPIO=y
+# CONFIG_AT91_GPIO is not set
+# CONFIG_ASPEED_GPIO is not set
+# CONFIG_ASPEED_SGPIO is not set
+# CONFIG_ASPEED_G7_GPIO is not set
+# CONFIG_DA8XX_GPIO is not set
+# CONFIG_INTEL_BROADWELL_GPIO is not set
+# CONFIG_IMX_RGPIO2P is not set
+# CONFIG_IPROC_GPIO is not set
+# CONFIG_KIRKWOOD_GPIO is not set
+# CONFIG_LPC32XX_GPIO is not set
+# CONFIG_MCP230XX_GPIO is not set
+# CONFIG_MXC_GPIO is not set
+# CONFIG_MXS_GPIO is not set
+# CONFIG_CMD_PCA953X is not set
+# CONFIG_TCA642X is not set
+# CONFIG_VYBRID_GPIO is not set
+# CONFIG_PCA953X is not set
+
+#
+# Hardware Spinlock Support
+#
+# CONFIG_DM_HWSPINLOCK is not set
+CONFIG_I2C=y
+# CONFIG_DM_I2C is not set
+# CONFIG_SYS_I2C_LEGACY is not set
+# CONFIG_SYS_I2C_FSL is not set
+# CONFIG_SYS_I2C_DW is not set
+# CONFIG_SYS_I2C_IMX_LPI2C is not set
+# CONFIG_SYS_I2C_MTK is not set
+# CONFIG_SYS_I2C_MICROCHIP is not set
+# CONFIG_SYS_I2C_MXC is not set
+# CONFIG_SYS_I2C_NPCM is not set
+# CONFIG_SYS_I2C_SOFT is not set
+# CONFIG_SYS_I2C_MV is not set
+# CONFIG_SYS_I2C_MVTWSI is not set
+CONFIG_INPUT=y
+CONFIG_DM_KEYBOARD=y
+# CONFIG_BUTTON_KEYBOARD is not set
+# CONFIG_CROS_EC_KEYB is not set
+# CONFIG_I8042_KEYB is not set
+# CONFIG_TEGRA_KEYBOARD is not set
+# CONFIG_TWL4030_INPUT is not set
+
+#
+# IOMMU device drivers
+#
+# CONFIG_IOMMU is not set
+
+#
+# LED Support
+#
+# CONFIG_LED is not set
+# CONFIG_LED_BOOT is not set
+# CONFIG_LED_ACTIVITY is not set
+# CONFIG_LED_STATUS is not set
+
+#
+# Mailbox Controller Support
+#
+# CONFIG_DM_MAILBOX is not set
+
+#
+# Memory Controller drivers
+#
+# CONFIG_MEMORY is not set
+# CONFIG_ATMEL_EBI is not set
+# CONFIG_MFD_ATMEL_SMC is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MISC is not set
+# CONFIG_NVMEM is not set
+# CONFIG_SPL_NVMEM is not set
+# CONFIG_SMSC_LPC47M is not set
+# CONFIG_SMSC_SIO1007 is not set
+# CONFIG_CROS_EC is not set
+# CONFIG_DS4510 is not set
+# CONFIG_FSL_SEC_MON is not set
+# CONFIG_IRQ is not set
+# CONFIG_NUVOTON_NCT6102D is not set
+# CONFIG_PWRSEQ is not set
+# CONFIG_PCA9551_LED is not set
+# CONFIG_TEST_DRV is not set
+# CONFIG_USB_HUB_USB251XB is not set
+# CONFIG_TWL4030_LED is not set
+# CONFIG_WINBOND_W83627 is not set
+CONFIG_QFW=y
+CONFIG_QFW_MMIO=y
+# CONFIG_FS_LOADER is not set
+
+#
+# MMC Host controller Support
+#
 # CONFIG_MMC is not set
+# CONFIG_MMC_BROKEN_CD is not set
+# CONFIG_FSL_ESDHC is not set
+# CONFIG_FSL_ESDHC_IMX is not set
+
+#
+# MTD Support
+#
+CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_NOR_FLASH=y
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_BLOCK is not set
+CONFIG_SYS_MTDPARTS_RUNTIME=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_CFI_WIDTH_8BIT=y
+# CONFIG_SYS_FLASH_CFI_WIDTH_16BIT is not set
+# CONFIG_SYS_FLASH_CFI_WIDTH_32BIT is not set
+# CONFIG_SYS_FLASH_CFI_WIDTH_64BIT is not set
+CONFIG_SYS_FLASH_CFI_WIDTH=0x1
 CONFIG_FLASH_SHOW_PROGRESS=0
 CONFIG_CFI_FLASH=y
 CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y
+# CONFIG_SYS_CFI_FLASH_STATUS_POLL is not set
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+# CONFIG_SYS_FLASH_EMPTY_INFO is not set
+# CONFIG_FLASH_SPANSION_S29WS_N is not set
 CONFIG_FLASH_CFI_MTD=y
+# CONFIG_SYS_FLASH_PROTECTION is not set
 CONFIG_SYS_FLASH_CFI=y
+# CONFIG_SYS_FLASH_QUIET_TEST is not set
+# CONFIG_SYS_FLASH_CHECKSUM is not set
+# CONFIG_FLASH_VERIFY is not set
+# CONFIG_ALTERA_QSPI is not set
 CONFIG_SYS_MAX_FLASH_SECT=256
+# CONFIG_SAMSUNG_ONENAND is not set
+CONFIG_USE_SYS_MAX_FLASH_BANKS=y
 CONFIG_SYS_MAX_FLASH_BANKS=2
 CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
+# CONFIG_MTD_RAW_NAND is not set
+
+#
+# SPI Flash Support
+#
+# CONFIG_SPI_FLASH is not set
+
+#
+# UBI support
+#
+# CONFIG_UBI_SILENCE_MSG is not set
+# CONFIG_MTD_UBI is not set
+# CONFIG_NVMXIP is not set
+# CONFIG_NVMXIP_QSPI is not set
+
+#
+# Multiplexer drivers
+#
+# CONFIG_MULTIPLEXER is not set
+# CONFIG_BITBANGMII is not set
+# CONFIG_MV88E6352_SWITCH is not set
+# CONFIG_PHYLIB is not set
+# CONFIG_FSL_MEMAC is not set
+CONFIG_PHY_RESET_DELAY=0
+# CONFIG_FSL_PFE is not set
+CONFIG_ETH=y
+CONFIG_DM_ETH=y
+# CONFIG_DM_ETH_PHY is not set
+CONFIG_NETDEVICES=y
+# CONFIG_PHY_GIGE is not set
+# CONFIG_ALTERA_TSE is not set
+# CONFIG_BCM_SF2_ETH is not set
+# CONFIG_BCMGENET is not set
+# CONFIG_BNXT_ETH is not set
+# CONFIG_CALXEDA_XGMAC is not set
+# CONFIG_DWC_ETH_XGMAC is not set
+# CONFIG_DRIVER_DM9000 is not set
+# CONFIG_DWC_ETH_QOS is not set
 CONFIG_E1000=y
+# CONFIG_E1000_NO_NVM is not set
+# CONFIG_E1000_SPI_GENERIC is not set
+# CONFIG_E1000_SPI is not set
+# CONFIG_CMD_E1000 is not set
+# CONFIG_EEPRO100 is not set
+# CONFIG_ETH_DESIGNWARE is not set
+# CONFIG_ETH_DESIGNWARE_MESON8B is not set
+# CONFIG_ETHOC is not set
+# CONFIG_FMAN_ENET is not set
+# CONFIG_FTMAC100 is not set
+# CONFIG_FTGMAC100 is not set
+# CONFIG_MCFFEC is not set
+# CONFIG_KS8851_MLL is not set
+# CONFIG_LITEETH is not set
+# CONFIG_MACB is not set
+# CONFIG_NET_NPCM750 is not set
+# CONFIG_PCH_GBE is not set
+# CONFIG_RGMII is not set
+# CONFIG_MII is not set
+# CONFIG_RMII is not set
+# CONFIG_PCNET is not set
+# CONFIG_QE_UEC is not set
+# CONFIG_RTL8139 is not set
+# CONFIG_RTL8169 is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SUN7I_GMAC is not set
+# CONFIG_SUN4I_EMAC is not set
+# CONFIG_SUN8I_EMAC is not set
+# CONFIG_SH_ETHER is not set
+# CONFIG_DRIVER_TI_CPSW is not set
+# CONFIG_DRIVER_TI_EMAC is not set
+# CONFIG_DRIVER_TI_KEYSTONE_NET is not set
+# CONFIG_TULIP is not set
+# CONFIG_XILINX_AXIEMAC is not set
+# CONFIG_VSC7385_ENET is not set
+# CONFIG_XILINX_EMACLITE is not set
+# CONFIG_ZYNQ_GEM is not set
+# CONFIG_SYS_DPAA_QBMAN is not set
+# CONFIG_TSEC_ENET is not set
+# CONFIG_MEDIATEK_ETH is not set
+# CONFIG_HIFEMAC_ETH is not set
+# CONFIG_HIGMACV300_ETH is not set
+CONFIG_NVME=y
+# CONFIG_NVME_APPLE is not set
 CONFIG_NVME_PCI=y
+# CONFIG_DM_PCI_COMPAT is not set
+CONFIG_PCI_PNP=y
+# CONFIG_PCI_REGION_MULTI_ENTRY is not set
+# CONFIG_PCI_CONFIG_HOST_BRIDGE is not set
+# CONFIG_PCI_SRIOV is not set
+CONFIG_PCI_ENHANCED_ALLOCATION=y
+# CONFIG_PCI_ARID is not set
 CONFIG_PCIE_ECAM_GENERIC=y
+# CONFIG_PCIE_ECAM_SYNQUACER is not set
+# CONFIG_PCI_FTPCI100 is not set
+# CONFIG_PCIE_CDNS_TI is not set
+# CONFIG_PCI_PHYTIUM is not set
+# CONFIG_PCIE_FSL is not set
+# CONFIG_PCI_MPC85XX is not set
+# CONFIG_PCI_XILINX is not set
+# CONFIG_PCIE_LAYERSCAPE_RC is not set
+# CONFIG_PCIE_LAYERSCAPE_EP is not set
+# CONFIG_PCIE_LAYERSCAPE_GEN4 is not set
+# CONFIG_PCIE_INTEL_FPGA is not set
+# CONFIG_PCIE_IPROC is not set
+# CONFIG_PCI_KEYSTONE is not set
+# CONFIG_PCIE_STARFIVE_JH7110 is not set
+
+#
+# PCI Endpoint
+#
+# CONFIG_PCI_ENDPOINT is not set
+# CONFIG_X86_PCH7 is not set
+# CONFIG_X86_PCH9 is not set
+
+#
+# PHY Subsystem
+#
+# CONFIG_PHY is not set
+# CONFIG_MIPI_DPHY_HELPERS is not set
+
+#
+# Rockchip PHY driver
+#
+# CONFIG_MVEBU_COMPHY_SUPPORT is not set
+
+#
+# Pin controllers
+#
+# CONFIG_PINCTRL is not set
+# CONFIG_PINCTRL_TEGRA is not set
+CONFIG_POWER=y
+# CONFIG_POWER_LEGACY is not set
+# CONFIG_ACPI_PMC is not set
+
+#
+# Power Domain Support
+#
+# CONFIG_POWER_DOMAIN is not set
+# CONFIG_DM_PMIC is not set
+# CONFIG_PMIC_TPS65217 is not set
+# CONFIG_POWER_TPS65218 is not set
+# CONFIG_POWER_TPS62362 is not set
+# CONFIG_DM_REGULATOR is not set
+# CONFIG_TPS6586X_POWER is not set
+# CONFIG_POWER_MT6323 is not set
+# CONFIG_DM_PWM is not set
+# CONFIG_PWM_IMX is not set
+# CONFIG_PWM_SANDBOX is not set
+# CONFIG_U_QE is not set
+# CONFIG_RAM is not set
+
+#
+# Reboot Mode Support
+#
+# CONFIG_DM_REBOOT_MODE is not set
+
+#
+# Remote Processor drivers
+#
+CONFIG_REMOTEPROC_MAX_FW_SIZE=0x10000
+
+#
+# Reset Controller Support
+#
+# CONFIG_RESET_SCMI is not set
+CONFIG_DM_RNG=y
+# CONFIG_RNG_MSM is not set
+# CONFIG_RNG_NPCM is not set
+# CONFIG_RNG_IPROC200 is not set
+# CONFIG_RNG_SMCCC_TRNG is not set
+# CONFIG_RNG_ARM_RNDR is not set
+CONFIG_TPM_RNG=y
+# CONFIG_RNG_EXYNOS is not set
+
+#
+# Real Time Clock
+#
+CONFIG_DM_RTC=y
+# CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set
+# CONFIG_RTC_PCF2127 is not set
+# CONFIG_RTC_DS1307 is not set
+# CONFIG_RTC_DS1337 is not set
+# CONFIG_RTC_DS1338 is not set
+# CONFIG_RTC_DS3231 is not set
+# CONFIG_RTC_EMULATION is not set
+# CONFIG_RTC_GOLDFISH is not set
+# CONFIG_RTC_ISL1208 is not set
+# CONFIG_RTC_PCF8563 is not set
+# CONFIG_RTC_PT7C4338 is not set
+# CONFIG_RTC_RV3028 is not set
+# CONFIG_RTC_RV3029 is not set
+# CONFIG_RTC_RV8803 is not set
+# CONFIG_RTC_RX8010SJ is not set
+# CONFIG_RTC_RX8025 is not set
+CONFIG_RTC_PL031=y
+# CONFIG_RTC_MV is not set
+# CONFIG_RTC_S35392A is not set
+# CONFIG_RTC_MC146818 is not set
+# CONFIG_RTC_M41T62 is not set
+# CONFIG_RTC_STM32 is not set
+# CONFIG_RTC_ABX80X is not set
 CONFIG_SCSI=y
+CONFIG_SERIAL=y
+CONFIG_BAUDRATE=115200
+# CONFIG_DEFAULT_ENV_IS_RW is not set
+CONFIG_REQUIRE_SERIAL_CONSOLE=y
+# CONFIG_SPECIFY_CONSOLE_INDEX is not set
+CONFIG_SERIAL_PRESENT=y
+CONFIG_DM_SERIAL=y
+# CONFIG_SERIAL_RX_BUFFER is not set
+# CONFIG_SERIAL_PUTS is not set
+# CONFIG_SERIAL_SEARCH_ALL is not set
+# CONFIG_SERIAL_PROBE_ALL is not set
+# CONFIG_VPL_DM_SERIAL is not set
+# CONFIG_DEBUG_UART_PL010 is not set
 CONFIG_DEBUG_UART_PL011=y
 CONFIG_DEBUG_UART_SHIFT=2
+# CONFIG_DEBUG_UART_ANNOUNCE is not set
+# CONFIG_DEBUG_UART_SKIP_INIT is not set
+# CONFIG_ALTERA_JTAG_UART is not set
+# CONFIG_ALTERA_UART is not set
+# CONFIG_ARC_SERIAL is not set
+# CONFIG_ARM_DCC is not set
+# CONFIG_ATMEL_USART is not set
+# CONFIG_BCM6345_SERIAL is not set
+# CONFIG_COREBOOT_SERIAL is not set
+# CONFIG_CORTINA_UART is not set
+# CONFIG_FSL_LINFLEXUART is not set
+# CONFIG_FSL_LPUART is not set
+# CONFIG_MVEBU_A3700_UART is not set
+# CONFIG_MCFUART is not set
+# CONFIG_NULLDEV_SERIAL is not set
+# CONFIG_SYS_NS16550 is not set
+CONFIG_PL01X_SERIAL=y
+# CONFIG_ROCKCHIP_SERIAL is not set
+# CONFIG_SEMIHOSTING_SERIAL is not set
+# CONFIG_XILINX_UARTLITE is not set
+# CONFIG_MSM_SERIAL is not set
+# CONFIG_MSM_GENI_SERIAL is not set
+# CONFIG_MXS_AUART_SERIAL is not set
+# CONFIG_OMAP_SERIAL is not set
+# CONFIG_HTIF_CONSOLE is not set
+# CONFIG_SIFIVE_SERIAL is not set
+# CONFIG_ZYNQ_SERIAL is not set
+# CONFIG_MTK_SERIAL is not set
+# CONFIG_MT7620_SERIAL is not set
+# CONFIG_NPCM_SERIAL is not set
+# CONFIG_SM is not set
+# CONFIG_MESON_SM is not set
+# CONFIG_SMEM is not set
+
+#
+# Sound support
+#
+# CONFIG_SOUND is not set
+# CONFIG_SOUND_MAX98357A is not set
+
+#
+# SOC (System On Chip) specific Drivers
+#
+# CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_QCOM is not set
+# CONFIG_SOC_SAMSUNG is not set
+# CONFIG_SOC_TI is not set
+# CONFIG_SPI is not set
+
+#
+# SPMI support
+#
+# CONFIG_SPMI is not set
 CONFIG_SYSINFO=y
+# CONFIG_SYSINFO_EXTRA is not set
+# CONFIG_SYSINFO_GAZERBEAM is not set
+# CONFIG_SYSINFO_SANDBOX is not set
 CONFIG_SYSINFO_SMBIOS=y
+# CONFIG_SYSINFO_GPIO is not set
+
+#
+# System reset device drivers
+#
 CONFIG_SYSRESET=y
+CONFIG_SYSRESET_CMD_RESET=y
 CONFIG_SYSRESET_CMD_POWEROFF=y
+# CONFIG_SYSRESET_CV1800B is not set
 CONFIG_SYSRESET_PSCI=y
+# CONFIG_SYSRESET_SYSCON is not set
+# CONFIG_SYSRESET_WATCHDOG is not set
+# CONFIG_SYSRESET_RESETCTL is not set
+# CONFIG_SYSRESET_MPC83XX is not set
+# CONFIG_TEE is not set
+# CONFIG_DM_THERMAL is not set
+
+#
+# Timer Support
+#
+# CONFIG_TIMER is not set
+
+#
+# TPM support
+#
+CONFIG_TPM_V1=y
+# CONFIG_TPM_ATMEL_TWI is not set
+# CONFIG_TPM_AUTH_SESSIONS is not set
+# CONFIG_TPM_FLUSH_RESOURCES is not set
+# CONFIG_TPM_LOAD_KEY_BY_SHA1 is not set
+# CONFIG_TPM_LIST_RESOURCES is not set
+CONFIG_TPM_V2=y
 CONFIG_TPM2_MMIO=y
+CONFIG_TPM2_EVENT_LOG_SIZE=65536
+CONFIG_USB=y
+CONFIG_DM_USB=y
+# CONFIG_DM_USB_GADGET is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_HOST=y
+CONFIG_USB_XHCI_HCD=y
+# CONFIG_USB_XHCI_DWC3 is not set
+# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
+# CONFIG_USB_XHCI_GENERIC is not set
+CONFIG_USB_XHCI_PCI=y
+# CONFIG_USB_XHCI_FSL is not set
+# CONFIG_USB_XHCI_BRCM is not set
 CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_MSM is not set
 CONFIG_USB_EHCI_PCI=y
+# CONFIG_USB_EHCI_ZYNQ is not set
+# CONFIG_USB_EHCI_GENERIC is not set
+# CONFIG_USB_EHCI_FSL is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_DWC2 is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_ISP1760 is not set
+# CONFIG_USB_CDNS3 is not set
+# CONFIG_USB_DWC3 is not set
+
+#
+# Legacy MUSB Support
+#
+# CONFIG_USB_MUSB_HCD is not set
+# CONFIG_USB_MUSB_UDC is not set
+
+#
+# MUSB Controller Driver
+#
+# CONFIG_USB_MUSB_HOST is not set
+# CONFIG_USB_MUSB_PIO_ONLY is not set
+
+#
+# USB Phy
+#
+# CONFIG_TWL4030_USB is not set
+# CONFIG_ROCKCHIP_USB2_PHY is not set
+# CONFIG_TYPEC_TCPM is not set
+
+#
+# ULPI drivers
+#
+
+#
+# USB peripherals
+#
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
+# CONFIG_USB_ONBOARD_HUB is not set
+CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=1000
+CONFIG_USB_KEYBOARD_FN_KEYS=y
+CONFIG_SYS_USB_EVENT_POLL=y
+# CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE is not set
+# CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is not set
+# CONFIG_USB_HOST_ETHER is not set
+# CONFIG_USB_GADGET is not set
+# CONFIG_SPL_USB_GADGET is not set
+
+#
+# UFS Host Controller Support
+#
+# CONFIG_UFS is not set
+# CONFIG_TI_J721E_UFS is not set
+
+#
+# Graphics support
+#
+CONFIG_VIDEO=y
+# CONFIG_VIDEO_FONT_4X6 is not set
+CONFIG_VIDEO_FONT_8X16=y
+# CONFIG_VIDEO_FONT_SUN12X22 is not set
+# CONFIG_VIDEO_FONT_16X32 is not set
+CONFIG_VIDEO_LOGO=y
+CONFIG_BACKLIGHT=y
+CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x800000
+# CONFIG_VIDEO_COPY is not set
+# CONFIG_VIDEO_DAMAGE is not set
+# CONFIG_BACKLIGHT_GPIO is not set
+CONFIG_VIDEO_BPP8=y
+CONFIG_VIDEO_BPP16=y
+CONFIG_VIDEO_BPP32=y
+CONFIG_VIDEO_ANSI=y
+# CONFIG_VIDEO_MIPI_DSI is not set
+CONFIG_CONSOLE_NORMAL=y
+# CONFIG_CONSOLE_ROTATION is not set
+# CONFIG_CONSOLE_TRUETYPE is not set
+CONFIG_SYS_WHITE_ON_BLACK=y
+# CONFIG_NO_FB_CLEAR is not set
+CONFIG_VIDEO_SYNC_MS=100
+CONFIG_VIDEO_SYNC_CYCLIC_MS=10
+CONFIG_PANEL=y
+# CONFIG_PANEL_HX8238D is not set
+
+#
+# TrueType Fonts
+#
+# CONFIG_VIDCONSOLE_AS_LCD is not set
+CONFIG_VIDEO_BOCHS=y
+CONFIG_VIDEO_BOCHS_SIZE_X=1280
+CONFIG_VIDEO_BOCHS_SIZE_Y=1024
+# CONFIG_VIDEO_VESA is not set
+# CONFIG_VIDEO_LCD_ANX9804 is not set
+# CONFIG_ATMEL_LCD_BGR555 is not set
+# CONFIG_VIDEO_BCM2835 is not set
+# CONFIG_VIDEO_LCD_ENDEAVORU is not set
+# CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
+# CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
+# CONFIG_VIDEO_LCD_LG_LD070WX3 is not set
+# CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
+# CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
+# CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
+# CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set
+# CONFIG_VIDEO_LCD_SHARP_LQ101R1SX01 is not set
+# CONFIG_VIDEO_LCD_SSD2828 is not set
+# CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
+# CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
+# CONFIG_VIDEO_MESON is not set
+# CONFIG_VIDEO_MVEBU is not set
+# CONFIG_I2C_EDID is not set
+# CONFIG_DISPLAY is not set
+# CONFIG_ATMEL_HLCD is not set
+# CONFIG_BACKLIGHT_LM3533 is not set
+# CONFIG_AM335X_LCD is not set
+# CONFIG_VIDEO_EXYNOS is not set
+# CONFIG_VIDEO_ROCKCHIP is not set
+# CONFIG_VIDEO_ARM_MALIDP is not set
+# CONFIG_VIDEO_STM32 is not set
+# CONFIG_VIDEO_TIDSS is not set
+# CONFIG_VIDEO_TEGRA124 is not set
+# CONFIG_VIDEO_BRIDGE is not set
+# CONFIG_VIDEO_TEGRA20 is not set
+# CONFIG_TEGRA_BACKLIGHT_PWM is not set
+# CONFIG_VIDEO_MXS is not set
+CONFIG_CONSOLE_SCROLL_LINES=1
+# CONFIG_VIDEO_SIMPLE is not set
+# CONFIG_VIDEO_DT_SIMPLEFB is not set
+# CONFIG_VIDEO_MCDE_SIMPLE is not set
+# CONFIG_OSD is not set
+# CONFIG_VIDEO_REMOVE is not set
+# CONFIG_SPLASH_SCREEN is not set
+# CONFIG_BMP is not set
+CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
+CONFIG_VIDEO_BMP_RLE8=y
+# CONFIG_BMP_16BPP is not set
+# CONFIG_BMP_24BPP is not set
+# CONFIG_BMP_32BPP is not set
+
+#
+# VirtIO Drivers
+#
+CONFIG_VIRTIO=y
+CONFIG_VIRTIO_MMIO=y
+CONFIG_VIRTIO_PCI=y
+CONFIG_VIRTIO_PCI_LEGACY=y
+CONFIG_VIRTIO_NET=y
+CONFIG_VIRTIO_BLK=y
+CONFIG_VIRTIO_RNG=y
+
+#
+# 1-Wire support
+#
+# CONFIG_W1 is not set
+
+#
+# 1-wire EEPROM support
+#
+# CONFIG_W1_EEPROM is not set
+
+#
+# Watchdog Timer Support
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_IMX_WATCHDOG is not set
+# CONFIG_ULP_WATCHDOG is not set
+# CONFIG_WDT is not set
+# CONFIG_PHYS_TO_BUS is not set
+
+#
+# File systems
+#
+# CONFIG_FS_BTRFS is not set
+# CONFIG_FS_CBFS is not set
+CONFIG_FS_EXT4=y
+# CONFIG_EXT4_WRITE is not set
+CONFIG_FS_FAT=y
+CONFIG_FAT_WRITE=y
+CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
+# CONFIG_FS_JFFS2 is not set
+# CONFIG_UBIFS_SILENCE_MSG is not set
+# CONFIG_UBIFS_SILENCE_DEBUG_DUMP is not set
+# CONFIG_FS_CRAMFS is not set
+# CONFIG_FS_SQUASHFS is not set
+# CONFIG_FS_EROFS is not set
+
+#
+# Library routines
+#
+# CONFIG_ADDR_MAP is not set
+# CONFIG_SYS_TIMER_COUNTS_DOWN is not set
+# CONFIG_PHYSMEM is not set
+# CONFIG_BCH is not set
+# CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set
+CONFIG_CHARSET=y
+# CONFIG_DYNAMIC_CRC_TABLE is not set
+CONFIG_LIB_UUID=y
+# CONFIG_RANDOM_UUID is not set
 CONFIG_SEMIHOSTING=y
+CONFIG_SEMIHOSTING_FALLBACK=y
+CONFIG_PRINTF=y
+CONFIG_SPRINTF=y
+CONFIG_STRTO=y
+CONFIG_SYS_HZ=1000
+# CONFIG_PANIC_HANG is not set
+CONFIG_REGEX=y
+CONFIG_LIB_RAND=y
+# CONFIG_LIB_HW_RAND is not set
+CONFIG_SUPPORT_ACPI=y
+# CONFIG_ACPI is not set
+# CONFIG_BITREVERSE is not set
+# CONFIG_TRACE is not set
+# CONFIG_CIRCBUF is not set
+# CONFIG_CMD_DHRYSTONE is not set
+
+#
+# Alternative crypto libraries
+#
+# CONFIG_LEGACY_HASHING_AND_CRYPTO is not set
 CONFIG_MBEDTLS_LIB=y
+CONFIG_MBEDTLS_LIB_CRYPTO=y
+CONFIG_SHA1_MBEDTLS=y
+CONFIG_SHA256_MBEDTLS=y
+CONFIG_SHA256_SMALLER=y
+CONFIG_SHA512_MBEDTLS=y
+CONFIG_SHA512_SMALLER=y
+CONFIG_SHA384_MBEDTLS=y
+CONFIG_MD5_MBEDTLS=y
+# CONFIG_HKDF_MBEDTLS is not set
+CONFIG_MBEDTLS_LIB_X509=y
+
+#
+# Security support
+#
+# CONFIG_AES is not set
+# CONFIG_ECDSA is not set
+CONFIG_RSA=y
+CONFIG_RSA_VERIFY=y
+# CONFIG_RSA_VERIFY_WITH_PKEY is not set
+CONFIG_RSA_SOFTWARE_EXP=y
+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
 CONFIG_TPM=y
 CONFIG_TPM_PCR_ALLOCATE=y
+
+#
+# Android Verified Boot
+#
+
+#
+# Hashing Support
+#
+# CONFIG_BLAKE2 is not set
+CONFIG_SHA1=y
+CONFIG_SHA256=y
+CONFIG_SHA512=y
+CONFIG_SHA384=y
+# CONFIG_SHA_HW_ACCEL is not set
+CONFIG_MD5=y
+CONFIG_CRC8=y
+CONFIG_CRC16=y
+CONFIG_CRC32=y
+
+#
+# Compression Support
+#
+CONFIG_LZ4=y
+CONFIG_LZMA=y
+# CONFIG_LZO is not set
+CONFIG_GZIP=y
+# CONFIG_ZLIB_UNCOMPRESS is not set
+# CONFIG_BZIP2 is not set
+CONFIG_ZLIB=y
+# CONFIG_ZSTD is not set
+CONFIG_VPL_LZMA=y
+# CONFIG_SPL_GZIP is not set
+# CONFIG_TPL_GZIP is not set
+# CONFIG_ERRNO_STR is not set
+CONFIG_HEXDUMP=y
+# CONFIG_GETOPT is not set
+CONFIG_OF_LIBFDT=y
+CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
+CONFIG_SYS_FDT_PAD=0x3000
+
+#
+# System tables
+#
+# CONFIG_BLOBLIST_TABLES is not set
+CONFIG_GENERATE_SMBIOS_TABLE=y
 CONFIG_GENERATE_SMBIOS_TABLE_VERBOSE=y
+# CONFIG_LIB_RATIONAL is not set
+CONFIG_SMBIOS=y
+CONFIG_SMBIOS_PARSER=y
+# CONFIG_OPTEE_LIB is not set
+# CONFIG_OPTEE_IMAGE is not set
+# CONFIG_BOOTM_OPTEE is not set
+# CONFIG_TEST_FDTDEC is not set
+CONFIG_LIB_DATE=y
+CONFIG_LIB_ELF=y
+CONFIG_LMB=y
+# CONFIG_LMB_ARCH_MEM_MAP is not set
+# CONFIG_PHANDLE_CHECK_SEQ is not set
+
+#
+# Testing
+#
+# CONFIG_UNIT_TEST is not set
+# CONFIG_POST is not set
+
+#
+# Tools options
+#
+CONFIG_MKIMAGE_DTC_PATH="dtc"
+CONFIG_TOOLS_CRC16=y
+CONFIG_TOOLS_CRC32=y
+CONFIG_TOOLS_LIBCRYPTO=y
+CONFIG_TOOLS_KWBIMAGE=y
+CONFIG_TOOLS_FIT=y
+CONFIG_TOOLS_FIT_FULL_CHECK=y
+CONFIG_TOOLS_FIT_PRINT=y
+CONFIG_TOOLS_FIT_RSASSA_PSS=y
+CONFIG_TOOLS_FIT_SIGNATURE=y
+CONFIG_TOOLS_FIT_SIGNATURE_MAX_SIZE=0x10000000
+CONFIG_TOOLS_FIT_VERBOSE=y
+CONFIG_TOOLS_MD5=y
+CONFIG_TOOLS_OF_LIBFDT=y
+CONFIG_TOOLS_SHA1=y
+CONFIG_TOOLS_SHA256=y
+CONFIG_TOOLS_SHA384=y
+CONFIG_TOOLS_SHA512=y
+CONFIG_TOOLS_MKEFICAPSULE=y
+# CONFIG_FSPI_CONF_HEADER is not set
+# CONFIG_TOOLS_MKFWUMDATA is not set

From 1265927ca38f2f189769775a0d680820e619d565 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Wed, 23 Apr 2025 22:20:16 +0300
Subject: [PATCH 1263/1549] u-boot: gru: Disable INIT_SP_RELATIVE

Recently, gru boards were migrated to use common stack addresses with
U-Boot commit 5e7cd8a11995 ("rockchip: Use common bss and stack
addresses on RK3399") and commit 49f8131e5594 ("rockchip: rk3399-gru:
Use TPL with common bss and stack addresses"). This is done with the
ROCKCHIP_COMMON_STACK_ADDR config.

With POSITION_INDEPENDENT, INIT_SP_RELATIVE defaults to enabled as well.
However, ROCKCHIP_COMMON_STACK_ADDR selects HAS_CUSTOM_SYS_INIT_SP_ADDR,
which depends on INIT_SP_RELATIVE being disabled. So this results in a
configuration warning:

  WARNING: unmet direct dependencies detected for HAS_CUSTOM_SYS_INIT_SP_ADDR
    Depends on [n]: ARM [=y] && ARCH_KIRKWOOD [=n] || ARC [=n] || ARM [=y] && !INIT_SP_RELATIVE [=y] || MIPS [=n] || PPC [=n] || RISCV [=n]
    Selected by [y]:
    - ROCKCHIP_COMMON_STACK_ADDR [=y] && ARM [=y] && ARCH_ROCKCHIP [=y] && SPL_SHARES_INIT_SP_ADDR [=y]

I'm not sure if adhering to the Rockchip values means we can't be
position-independent. Disabling INIT_SP_RELATIVE still appears to keep
my kevin board working, so let's do that for now.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 config/u-boot/gru_bob/config/default   | 3 +--
 config/u-boot/gru_kevin/config/default | 3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/config/u-boot/gru_bob/config/default b/config/u-boot/gru_bob/config/default
index 552d0542..cc93540c 100644
--- a/config/u-boot/gru_bob/config/default
+++ b/config/u-boot/gru_bob/config/default
@@ -54,8 +54,7 @@ CONFIG_ARM64=y
 CONFIG_ARM64_CRC32=y
 CONFIG_COUNTER_FREQUENCY=24000000
 CONFIG_POSITION_INDEPENDENT=y
-CONFIG_INIT_SP_RELATIVE=y
-CONFIG_SYS_INIT_SP_BSS_OFFSET=524288
+# CONFIG_INIT_SP_RELATIVE is not set
 CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE=0x18000000
 # CONFIG_DRIVER_GICV2 is not set
 # CONFIG_GIC_V3_ITS is not set
diff --git a/config/u-boot/gru_kevin/config/default b/config/u-boot/gru_kevin/config/default
index 978e6760..310fcb6f 100644
--- a/config/u-boot/gru_kevin/config/default
+++ b/config/u-boot/gru_kevin/config/default
@@ -54,8 +54,7 @@ CONFIG_ARM64=y
 CONFIG_ARM64_CRC32=y
 CONFIG_COUNTER_FREQUENCY=24000000
 CONFIG_POSITION_INDEPENDENT=y
-CONFIG_INIT_SP_RELATIVE=y
-CONFIG_SYS_INIT_SP_BSS_OFFSET=524288
+# CONFIG_INIT_SP_RELATIVE is not set
 CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE=0x18000000
 # CONFIG_DRIVER_GICV2 is not set
 # CONFIG_GIC_V3_ITS is not set

From d8b0e7499833099b36df751d87726cb737ac5dc8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 29 Apr 2025 14:11:56 +0100
Subject: [PATCH 1264/1549] init.sh: fix yet another double quote for dotfiles

i missed this one, in another recent revision

double-quote because of the dot, for bash users

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/init.sh b/include/init.sh
index 09b3223b..1b8432ce 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -167,7 +167,7 @@ xbmk_set_version()
 	[ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > ".version" \
 	    || $err "Cannot generate unknown .version file"
 	[ -e ".git" ] || [ -f ".versiondate" ] || printf "1716415872\n" > \
-	    .versiondate || $err "Cannot generate unknown .versiondate file"; :
+	    ".versiondate" || $err "Can't generate unknown versiondate file"; :
 
 	version_="$version"
 	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \

From 35c853f8b33aea4d257a348e01a181a0a52e816f Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Tue, 29 Apr 2025 16:31:53 +0300
Subject: [PATCH 1265/1549] seabios: Fix malloc_fn function pointer in romfile
 patch

One of our SeaBIOS patches causes build errors with GCC 15:

  src/romfile.c: In function 'romfile_loadfile_g':
  src/romfile.c:65:18: error: too many arguments to function 'malloc_fn'; expected 0, have 1
     65 |     char *data = malloc_fn(filesize+add_len);
        |                  ^~~~~~~~~ ~~~~~~~~~~~~~~~~
  src/romfile.c: In function 'romfile_loadfile':
  src/romfile.c:88:50: error: passing argument 3 of 'romfile_loadfile_g' from incompatible pointer type [-Wincompatible-pointer-types]
     88 |     char *data = romfile_loadfile_g(name, psize, &malloc_tmphigh, 1);
        |                                                  ^~~~~~~~~~~~~~~
        |                                                  |
        |                                                  void * (*)(u32) {aka void * (*)(unsigned int)}
  src/romfile.c:55:28: note: expected 'void * (*)(void)' but argument is of type 'void * (*)(u32)' {aka 'void * (*)(unsigned int)'}
     55 |                    void *(*malloc_fn)(), int add_len)
        |                    ~~~~~~~~^~~~~~~~~~~~
  In file included from src/romfile.c:8:
  src/malloc.h:42:21: note: 'malloc_tmphigh' declared here
     42 | static inline void *malloc_tmphigh(u32 size) {
        |                     ^~~~~~~~~~~~~~
  make: *** [Makefile:142: out/src/romfile.o] Error 1
  make: *** Waiting for unfinished jobs....
  src/optionroms.c: In function 'vgarom_setup':
  src/optionroms.c:468:60: error: passing argument 3 of 'romfile_loadfile_g' from incompatible pointer type [-Wincompatible-pointer-types]
    468 |     void *mxm_sis = romfile_loadfile_g("mxm-30-sis", NULL, &malloc_low, 0);
        |                                                            ^~~~~~~~~~~
        |                                                            |
        |                                                            void * (*)(u32) {aka void * (*)(unsigned int)}
  In file included from src/optionroms.c:18:
  src/romfile.h:17:34: note: expected 'void * (*)(void)' but argument is of type 'void * (*)(u32)' {aka 'void * (*)(unsigned int)'}
     17 |                          void *(*malloc_fn)(), int add_len);
        |                          ~~~~~~~~^~~~~~~~~~~~
  In file included from src/optionroms.c:16:
  src/malloc.h:30:21: note: 'malloc_low' declared here
     30 | static inline void *malloc_low(u32 size) {
        |                     ^~~~~~~~~~
  make: *** [Makefile:141: out/src/optionroms.o] Error 1
  make: Leaving directory '/tmp/lbmk/src/seabios/default'

This is because the function pointer defined as `void *(*malloc_fn)()`
refers to a function that takes no arguments, unlike `malloc_tmphigh`
which takes an unsigned int. Add the missing argument type.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 .../patches/0001-romfile-implement-a-generic-loader.patch | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch b/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
index f0682c11..2c042776 100644
--- a/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
+++ b/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
@@ -18,7 +18,7 @@ Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
  2 files changed, 22 insertions(+), 5 deletions(-)
 
 diff --git a/src/romfile.c b/src/romfile.c
-index b598274e..8bf95713 100644
+index b598274edc09..8ccf5139ece8 100644
 --- a/src/romfile.c
 +++ b/src/romfile.c
 @@ -47,10 +47,12 @@ romfile_find(const char *name)
@@ -33,7 +33,7 @@ index b598274e..8bf95713 100644
  void *
 -romfile_loadfile(const char *name, int *psize)
 +romfile_loadfile_g(const char *name, int *psize,
-+                   void *(*malloc_fn)(), int add_len)
++                   void *(*malloc_fn)(u32), int add_len)
  {
      struct romfile_s *file = romfile_find(name);
      if (!file)
@@ -69,7 +69,7 @@ index b598274e..8bf95713 100644
  }
  
 diff --git a/src/romfile.h b/src/romfile.h
-index 3e0f8200..a320a5bc 100644
+index 3e0f820047dd..1b967d86551f 100644
 --- a/src/romfile.h
 +++ b/src/romfile.h
 @@ -13,6 +13,8 @@ struct romfile_s {
@@ -77,7 +77,7 @@ index 3e0f8200..a320a5bc 100644
  struct romfile_s *romfile_findprefix(const char *prefix, struct romfile_s *prev);
  struct romfile_s *romfile_find(const char *name);
 +void *romfile_loadfile_g(const char *name, int *psize,
-+                         void *(*malloc_fn)(), int add_len);
++                         void *(*malloc_fn)(u32), int add_len);
  void *romfile_loadfile(const char *name, int *psize);
  u64 romfile_loadint(const char *name, u64 defval);
  

From 6f120f01588a9e7040c7da9aee520152c853d45c Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Tue, 29 Apr 2025 16:46:24 +0300
Subject: [PATCH 1266/1549] dependencies/debian: Fix libusb package name

The Debian package for libusb is "libusb-1.0-0". Fix the typo in the
list which is missing the suffix. While we're here, also fix a line
continuation.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 config/dependencies/debian | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/dependencies/debian b/config/dependencies/debian
index 00ccfc1a..992fb690 100755
--- a/config/dependencies/debian
+++ b/config/dependencies/debian
@@ -7,9 +7,9 @@ binutils-arm-none-eabi bison build-essential cmake curl device-tree-compiler \
 doxygen e2fsprogs efitools flex fonts-unifont gawk gcc-arm-linux-gnueabi \
 gcc-arm-none-eabi gdb gettext git gnat help2man innoextract libdevmapper-dev \
 libfdt-dev libfont-freetype-perl libfreetype-dev libftdi-dev libftdi1-dev libfuse-dev \
-libjaylink-dev libgnutls28-dev libgpiod-dev lz4 liblz4-dev liblzma-dev libncurses5-dev
+libjaylink-dev libgnutls28-dev libgpiod-dev lz4 liblz4-dev liblzma-dev libncurses5-dev \
 libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev libpython3-dev \
-libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0 libusb-1.0-0-dev \
+libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 libusb-1.0-0-dev \
 libusb-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted pciutils \
 perl pkg-config python3 python3-distutils-extra python3-pkg-resources python3-pycryptodome \
 python3-pyelftools python3-setuptools python-is-python3 sharutils swig unar \

From 5ad1de3931a68fb3d83f9658682c37093ae130d4 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Tue, 29 Apr 2025 17:40:18 +0300
Subject: [PATCH 1267/1549] coreboot: Add patch to fix build with GCC 15 as
 host compiler

Building coreboot host tools with GCC 15 results in build errors:

  In file included from .../lbmk/src/coreboot/default/util/cbfstool/console/console.h:7,
                   from .../lbmk/src/coreboot/default/src/commonlib/fsp_relocate.c:3:
  .../lbmk/src/coreboot/default/src/commonlib/include/commonlib/loglevel.h:170:26: error: initializer-string for array of 'char' truncates NUL terminator but destination lacks 'nonstring' attribute (6 chars into 5 available) [-Werror=unterminated-string-initialization]
    170 |         [BIOS_EMERG]   = "EMERG",
        |                          ^~~~~~~
  .../lbmk/src/coreboot/default/src/commonlib/include/commonlib/loglevel.h:171:26: error: initializer-string for array of 'char' truncates NUL terminator but destination lacks 'nonstring' attribute (6 chars into 5 available) [-Werror=unterminated-string-initialization]
    171 |         [BIOS_ALERT]   = "ALERT",
        |                          ^~~~~~~
  [...]
  ../cbfstool/common.c: In function 'bintohex':
  ../cbfstool/common.c:195:43: error: initializer-string for array of 'char' truncates NUL terminator but destination lacks 'nonstring' attribute (17 chars into 16 available) [-Werror=unterminated-string-initialization]
    195 |         static const char translate[16] = "0123456789abcdef";
        |                                           ^~~~~~~~~~~~~~~~~~

Add a patch that marks the latter with the "nonstring" attribute, and
disable the warning for the former because I couldn't figure out how to
add that attribute there.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 ...x-build-with-GCC-15-as-host-compiler.patch | 62 +++++++++++++++++++
 1 file changed, 62 insertions(+)
 create mode 100644 config/coreboot/default/patches/0040-Fix-build-with-GCC-15-as-host-compiler.patch

diff --git a/config/coreboot/default/patches/0040-Fix-build-with-GCC-15-as-host-compiler.patch b/config/coreboot/default/patches/0040-Fix-build-with-GCC-15-as-host-compiler.patch
new file mode 100644
index 00000000..a7b28f2e
--- /dev/null
+++ b/config/coreboot/default/patches/0040-Fix-build-with-GCC-15-as-host-compiler.patch
@@ -0,0 +1,62 @@
+From 281151d85240bd8a60545b6415e0f44ce6a2af33 Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Tue, 29 Apr 2025 17:31:13 +0300
+Subject: [PATCH] WIP: Fix build with GCC 15 as host compiler
+
+GCC 15 now considers the unterminated-string-initialization warning as
+part of -Werror by default. Coreboot compiles host utilities with the
+system compiler, which results in getting this error in some files.
+
+Mark a hexadecimal translation table in cbfstool code as "nonstring" to
+avoid the warning-turned-error.
+
+The bios log prefixes are non-null-terminated as well, but I couldn't
+figure out how to mark them as non-strings. Temporarily disable the
+warning with a pragma to avoid the error. That pragma causes an error on
+GCC 14, so disable pragma warnings along with it to avoid that as well.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+ src/commonlib/include/commonlib/loglevel.h | 4 ++++
+ util/cbfstool/common.c                     | 2 +-
+ 2 files changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/src/commonlib/include/commonlib/loglevel.h b/src/commonlib/include/commonlib/loglevel.h
+index 79fbcfc6d92b..31438c945ff5 100644
+--- a/src/commonlib/include/commonlib/loglevel.h
++++ b/src/commonlib/include/commonlib/loglevel.h
+@@ -163,6 +163,9 @@
+  * When printing logs, lines should be printed with the following prefixes in
+  * front of them according to the BIOS_LOG_PREFIX_PATTERN printf() pattern.
+  */
++#pragma GCC diagnostic push
++#pragma GCC diagnostic ignored "-Wpragmas"
++#pragma GCC diagnostic ignored "-Wunterminated-string-initialization"
+ #define BIOS_LOG_PREFIX_PATTERN "[%.5s]  "
+ #define BIOS_LOG_PREFIX_MAX_LEVEL BIOS_SPEW
+ static const char bios_log_prefix[BIOS_LOG_PREFIX_MAX_LEVEL + 1][5] = {
+@@ -177,6 +180,7 @@ static const char bios_log_prefix[BIOS_LOG_PREFIX_MAX_LEVEL + 1][5] = {
+ 	[BIOS_DEBUG]   = "DEBUG",
+ 	[BIOS_SPEW]    = "SPEW ",
+ };
++#pragma GCC diagnostic pop
+ 
+ /*
+  * When printing to terminals supporting ANSI escape sequences, the following
+diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
+index 7154bc9d5425..cb08c9e8ec11 100644
+--- a/util/cbfstool/common.c
++++ b/util/cbfstool/common.c
+@@ -192,7 +192,7 @@ uint64_t intfiletype(const char *name)
+ 
+ char *bintohex(uint8_t *data, size_t len)
+ {
+-	static const char translate[16] = "0123456789abcdef";
++	static const char translate[16] __attribute__((__nonstring__)) = "0123456789abcdef";
+ 
+ 	char *result = malloc(len * 2 + 1);
+ 	if (result == NULL)
+
+-- 
+2.49.0
+

From 685685ab0e4f86927fbd9b1c332a7c39c457846c Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Tue, 29 Apr 2025 19:50:04 +0300
Subject: [PATCH 1268/1549] coreboot: fam15h: Add patches to fix build with GCC
 15 as host compiler

Building the fam15h tree results in one of the same nonstring errors
we also had when building the default tree. Copy the relevant patch from
the default tree, while dropping a hunk that we don't need in this old
version.

Another build error is about bool being a reserved keyword now:

  .../lbmk/src/coreboot/fam15h/util/romcc/romcc.c:7140:13: error: 'bool' cannot be used here
   7140 | static void bool(struct compile_state *state, struct triple *def)
        |             ^~~~
  .../lbmk/src/coreboot/fam15h/util/romcc/romcc.c:7140:13: note: 'bool' is a keyword with '-std=c23' onwards
  .../lbmk/src/coreboot/fam15h/util/romcc/romcc.c:7140:18: error: expected identifier or '(' before 'struct'
   7140 | static void bool(struct compile_state *state, struct triple *def)
        |                  ^~~~~~
  .../lbmk/src/coreboot/fam15h/util/romcc/romcc.c: In function 'mkcond_expr':
  .../lbmk/src/coreboot/fam15h/util/romcc/romcc.c:7708:19: error: expected ')' before ',' token
   7708 |         bool(state, test);
        |                   ^
        |                   )
  [...]

Fix that by adding a patch that renames the function to bool_().

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 ...x-build-with-GCC-15-as-host-compiler.patch |  39 ++++++
 ...014-util-romcc-Fix-build-with-GCC-15.patch | 119 ++++++++++++++++++
 2 files changed, 158 insertions(+)
 create mode 100644 config/coreboot/fam15h/patches/0013-Fix-build-with-GCC-15-as-host-compiler.patch
 create mode 100644 config/coreboot/fam15h/patches/0014-util-romcc-Fix-build-with-GCC-15.patch

diff --git a/config/coreboot/fam15h/patches/0013-Fix-build-with-GCC-15-as-host-compiler.patch b/config/coreboot/fam15h/patches/0013-Fix-build-with-GCC-15-as-host-compiler.patch
new file mode 100644
index 00000000..b08c9edf
--- /dev/null
+++ b/config/coreboot/fam15h/patches/0013-Fix-build-with-GCC-15-as-host-compiler.patch
@@ -0,0 +1,39 @@
+From 281151d85240bd8a60545b6415e0f44ce6a2af33 Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Tue, 29 Apr 2025 17:31:13 +0300
+Subject: [PATCH] WIP: Fix build with GCC 15 as host compiler
+
+GCC 15 now considers the unterminated-string-initialization warning as
+part of -Werror by default. Coreboot compiles host utilities with the
+system compiler, which results in getting this error in some files.
+
+Mark a hexadecimal translation table in cbfstool code as "nonstring" to
+avoid the warning-turned-error.
+
+The bios log prefixes are non-null-terminated as well, but I couldn't
+figure out how to mark them as non-strings. Temporarily disable the
+warning with a pragma to avoid the error. That pragma causes an error on
+GCC 14, so disable pragma warnings along with it to avoid that as well.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+ util/cbfstool/common.c                     | 2 +-
+ 1 files changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
+index 7154bc9d5425..cb08c9e8ec11 100644
+--- a/util/cbfstool/common.c
++++ b/util/cbfstool/common.c
+@@ -192,7 +192,7 @@ uint64_t intfiletype(const char *name)
+ 
+ char *bintohex(uint8_t *data, size_t len)
+ {
+-	static const char translate[16] = "0123456789abcdef";
++	static const char translate[16] __attribute__((__nonstring__)) = "0123456789abcdef";
+ 
+ 	char *result = malloc(len * 2 + 1);
+ 	if (result == NULL)
+
+-- 
+2.49.0
+
diff --git a/config/coreboot/fam15h/patches/0014-util-romcc-Fix-build-with-GCC-15.patch b/config/coreboot/fam15h/patches/0014-util-romcc-Fix-build-with-GCC-15.patch
new file mode 100644
index 00000000..d9de94c6
--- /dev/null
+++ b/config/coreboot/fam15h/patches/0014-util-romcc-Fix-build-with-GCC-15.patch
@@ -0,0 +1,119 @@
+From 74dc3c0a4603bc635c8bc5e95490cdf168af5f41 Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Tue, 29 Apr 2025 19:46:14 +0300
+Subject: [PATCH] util/romcc: Fix build with GCC 15
+
+With GCC 15, we get build errors complaining bool is a reserved keyword,
+so cannot be used as a function name. Rename our bool() to bool_().
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+ util/romcc/romcc.c | 24 ++++++++++++------------
+ 1 file changed, 12 insertions(+), 12 deletions(-)
+
+diff --git a/util/romcc/romcc.c b/util/romcc/romcc.c
+index 378bfc50f290..b375e0fc83cb 100644
+--- a/util/romcc/romcc.c
++++ b/util/romcc/romcc.c
+@@ -7137,7 +7137,7 @@ static void integral(struct compile_state *state, struct triple *def)
+ }
+ 
+ 
+-static void bool(struct compile_state *state, struct triple *def)
++static void bool_(struct compile_state *state, struct triple *def)
+ {
+ 	if (!TYPE_ARITHMETIC(def->type->type) &&
+ 		((def->type->type & TYPE_MASK) != TYPE_POINTER)) {
+@@ -7705,7 +7705,7 @@ static struct triple *mkcond_expr(
+ 	struct triple *def, *val, *var, *jmp1, *jmp2, *top, *mid, *end;
+ 	struct type *result_type;
+ 	unsigned int left_type, right_type;
+-	bool(state, test);
++	bool_(state, test);
+ 	left_type = left->type->type;
+ 	right_type = right->type->type;
+ 	result_type = 0;
+@@ -11036,7 +11036,7 @@ static struct triple *unary_expr(struct compile_state *state)
+ 	case TOK_BANG:
+ 		eat(state, TOK_BANG);
+ 		right = read_expr(state, cast_expr(state));
+-		bool(state, right);
++		bool_(state, right);
+ 		def = lfalse_expr(state, right);
+ 		break;
+ 	case TOK_SIZEOF:
+@@ -11363,10 +11363,10 @@ static struct triple *land_expr(struct compile_state *state)
+ 	while(peek(state) == TOK_LOGAND) {
+ 		struct triple *left, *right;
+ 		left = read_expr(state, def);
+-		bool(state, left);
++		bool_(state, left);
+ 		eat(state, TOK_LOGAND);
+ 		right = read_expr(state, or_expr(state));
+-		bool(state, right);
++		bool_(state, right);
+ 
+ 		def = mkland_expr(state,
+ 			ltrue_expr(state, left),
+@@ -11382,10 +11382,10 @@ static struct triple *lor_expr(struct compile_state *state)
+ 	while(peek(state) == TOK_LOGOR) {
+ 		struct triple *left, *right;
+ 		left = read_expr(state, def);
+-		bool(state, left);
++		bool_(state, left);
+ 		eat(state, TOK_LOGOR);
+ 		right = read_expr(state, land_expr(state));
+-		bool(state, right);
++		bool_(state, right);
+ 
+ 		def = mklor_expr(state,
+ 			ltrue_expr(state, left),
+@@ -11400,7 +11400,7 @@ static struct triple *conditional_expr(struct compile_state *state)
+ 	def = lor_expr(state);
+ 	if (peek(state) == TOK_QUEST) {
+ 		struct triple *test, *left, *right;
+-		bool(state, def);
++		bool_(state, def);
+ 		test = ltrue_expr(state, read_expr(state, def));
+ 		eat(state, TOK_QUEST);
+ 		left = read_expr(state, expr(state));
+@@ -11676,7 +11676,7 @@ static void if_statement(struct compile_state *state, struct triple *first)
+ 	eat(state, TOK_IF);
+ 	eat(state, TOK_LPAREN);
+ 	test = expr(state);
+-	bool(state, test);
++	bool_(state, test);
+ 	/* Cleanup and invert the test */
+ 	test = lfalse_expr(state, read_expr(state, test));
+ 	eat(state, TOK_RPAREN);
+@@ -11719,7 +11719,7 @@ static void for_statement(struct compile_state *state, struct triple *first)
+ 	eat(state, TOK_SEMI);
+ 	if (peek(state) != TOK_SEMI) {
+ 		test = expr(state);
+-		bool(state, test);
++		bool_(state, test);
+ 		test = ltrue_expr(state, read_expr(state, test));
+ 	}
+ 	eat(state, TOK_SEMI);
+@@ -11767,7 +11767,7 @@ static void while_statement(struct compile_state *state, struct triple *first)
+ 	eat(state, TOK_WHILE);
+ 	eat(state, TOK_LPAREN);
+ 	test = expr(state);
+-	bool(state, test);
++	bool_(state, test);
+ 	test = ltrue_expr(state, read_expr(state, test));
+ 	eat(state, TOK_RPAREN);
+ 	/* Generate the needed pieces */
+@@ -11818,7 +11818,7 @@ static void do_statement(struct compile_state *state, struct triple *first)
+ 	eat(state, TOK_WHILE);
+ 	eat(state, TOK_LPAREN);
+ 	test = read_expr(state, expr(state));
+-	bool(state, test);
++	bool_(state, test);
+ 	eat(state, TOK_RPAREN);
+ 	eat(state, TOK_SEMI);
+ 	/* Thread the pieces together */
+
+-- 
+2.49.0
+

From 80007223c853d9a4e07e983cad7ad61b42637542 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 29 Apr 2025 19:51:15 +0100
Subject: [PATCH 1269/1549] lib.sh: Provide printf for mktarball

Just to let the user know lbmk hasn't died.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/lib.sh b/include/lib.sh
index 5e88fa54..7a5f2621 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -24,6 +24,7 @@ mkrom_tarball()
 
 mktarball()
 {
+	printf "Creating tar archive '%s' from directory '%s'\n" "$2" "$1"
 	[ "${2%/*}" = "$2" ] || x_ mkdir -p "${2%/*}"
 	x_ tar -c "$1" | xz -T$XBMK_THREADS -9e > "$2" || $err "mktarball2, $1"
 }

From 9a9cd26b2d54aa0f58ebe91d57cbfb645d2c545a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 29 Apr 2025 21:18:06 +0100
Subject: [PATCH 1270/1549] coreboot/default and fam15h: gmp fix, gcc15 hostcc

gcc 15 defaults to -std=c23, but the older gcc was
using -std=c17. The new c23 breaks GMP, so let's add
a patch from upstream (GMP project) to fix it.

this has been done to both coreboot trees.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...sgcc-gmp-Add-upstream-fix-for-GCC-15.patch | 71 +++++++++++++++++++
 .../fam15h/patches/0015-gmp-gcc15-patch.patch | 65 +++++++++++++++++
 2 files changed, 136 insertions(+)
 create mode 100644 config/coreboot/default/patches/0041-crossgcc-gmp-Add-upstream-fix-for-GCC-15.patch
 create mode 100644 config/coreboot/fam15h/patches/0015-gmp-gcc15-patch.patch

diff --git a/config/coreboot/default/patches/0041-crossgcc-gmp-Add-upstream-fix-for-GCC-15.patch b/config/coreboot/default/patches/0041-crossgcc-gmp-Add-upstream-fix-for-GCC-15.patch
new file mode 100644
index 00000000..1d0b6072
--- /dev/null
+++ b/config/coreboot/default/patches/0041-crossgcc-gmp-Add-upstream-fix-for-GCC-15.patch
@@ -0,0 +1,71 @@
+From ee3925486f3567b9fe45cb98a88b9acc64991127 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 29 Apr 2025 21:15:22 +0100
+Subject: [PATCH 1/1] crossgcc/gmp: Add upstream fix for GCC 15
+
+See:
+https://gmplib.org/list-archives/gmp-devel/2025-January/006279.html
+
+by default, upstream GCC-15 now defaults to -std=c23, instead
+of -std=c17, which can cause some build issues.
+
+GMP has this patch on their mailing list for GCC-15 (see link).
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ .../gmp-6.3.0_acinclude-m4-fix-std-c23.patch  | 43 +++++++++++++++++++
+ 1 file changed, 43 insertions(+)
+ create mode 100644 util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch
+
+diff --git a/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch
+new file mode 100644
+index 0000000000..b884b62df7
+--- /dev/null
++++ b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch
+@@ -0,0 +1,43 @@
++From b1b61bc8ab19659f0fb8c0f87edcd79ae1bfef7e Mon Sep 17 00:00:00 2001
++From: Rudi Heitbaum <rudi@heitbaum.com>
++Date: Wed, 22 Jan 2025 02:34:09 +0100
++Subject: [PATCH 1/1] acinclude.m4: fix -std=c23 build failure
++
++Add prototype to configure test function as c23 removes unprototyped
++functions.
++
++gcc-15 switched to -std=c23 by default:
++
++    https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=55e3bd376b2214e200fa76d12b67ff259b06c212
++
++As a result `configure` fails with:
++    conftest.c: In function 'f':
++    conftest.c:12:48: error: too many arguments to function 'g'; expected 0, have 6
++       12 | for(i=0;i<1;i++){if(e(got,got,9,d[i].n)==0)h();g(i,d[i].src,d[i].n,got,d[i].want,9);if(d[i].n)h();}}
++          |                                                ^ ~
++    conftest.c:7:6: note: declared here
++        7 | void g(){}
++          |      ^
++
++Link: https://gmplib.org/list-archives/gmp-bugs/2024-November/005550.html
++Signed-off-by: Rudi Heitbaum <rudi@heitbaum.com>
++---
++ acinclude.m4 | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++diff --git a/acinclude.m4 b/acinclude.m4
++index 9cf9483..1eed843 100644
++--- a/acinclude.m4
+++++ b/acinclude.m4
++@@ -609,7 +609,7 @@ GMP_PROG_CC_WORKS_PART([$1], [long long reliability test 1],
++ 
++ #if defined (__GNUC__) && ! defined (__cplusplus)
++ typedef unsigned long long t1;typedef t1*t2;
++-void g(){}
+++void g(int,const t1 *,t1,t1 *,const t1 *,int){}
++ void h(){}
++ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0)
++ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;}
++-- 
++2.39.5
++
+-- 
+2.39.5
+
diff --git a/config/coreboot/fam15h/patches/0015-gmp-gcc15-patch.patch b/config/coreboot/fam15h/patches/0015-gmp-gcc15-patch.patch
new file mode 100644
index 00000000..40ea7c14
--- /dev/null
+++ b/config/coreboot/fam15h/patches/0015-gmp-gcc15-patch.patch
@@ -0,0 +1,65 @@
+From 8663b2a75d69aa241f86dd6e813232343a05b609 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 29 Apr 2025 21:26:25 +0100
+Subject: [PATCH 1/1] gmp gcc15 patch
+
+https://gmplib.org/list-archives/gmp-devel/2025-January/006279.html
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ ...include.m4-fix-std-c23-build-failure.patch | 43 +++++++++++++++++++
+ 1 file changed, 43 insertions(+)
+ create mode 100644 util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure.patch
+
+diff --git a/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure.patch b/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure.patch
+new file mode 100644
+index 0000000000..adb66c6043
+--- /dev/null
++++ b/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure.patch
+@@ -0,0 +1,43 @@
++From 7d4aa08224b53054754b8ee6fd61a4297ac47119 Mon Sep 17 00:00:00 2001
++From: Rudi Heitbaum <rudi@heitbaum.com>
++Date: Wed, 22 Jan 2025 02:34:09 +0100
++Subject: [PATCH 1/1] acinclude.m4: fix -std=c23 build failure
++
++Add prototype to configure test function as c23 removes unprototyped
++functions.
++
++gcc-15 switched to -std=c23 by default:
++
++    https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=55e3bd376b2214e200fa76d12b67ff259b06c212
++
++As a result `configure` fails with:
++    conftest.c: In function 'f':
++    conftest.c:12:48: error: too many arguments to function 'g'; expected 0, have 6
++       12 | for(i=0;i<1;i++){if(e(got,got,9,d[i].n)==0)h();g(i,d[i].src,d[i].n,got,d[i].want,9);if(d[i].n)h();}}
++          |                                                ^ ~
++    conftest.c:7:6: note: declared here
++        7 | void g(){}
++          |      ^
++
++Link: https://gmplib.org/list-archives/gmp-bugs/2024-November/005550.html
++Signed-off-by: Rudi Heitbaum <rudi@heitbaum.com>
++---
++ acinclude.m4 | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++diff --git a/acinclude.m4 b/acinclude.m4
++index 3c3ecf5..3a226fd 100644
++--- a/acinclude.m4
+++++ b/acinclude.m4
++@@ -609,7 +609,7 @@ GMP_PROG_CC_WORKS_PART([$1], [long long reliability test 1],
++ 
++ #if defined (__GNUC__) && ! defined (__cplusplus)
++ typedef unsigned long long t1;typedef t1*t2;
++-void g(){}
+++void g(int,const t1 *,t1,t1 *,const t1 *,int){}
++ void h(){}
++ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0)
++ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;}
++-- 
++2.39.5
++
+-- 
+2.39.5
+

From 5e96db5a2b4907d782e8bc06f0a9ad70699ff806 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 29 Apr 2025 23:14:53 +0100
Subject: [PATCH 1271/1549] further gcc-15 fix for gmp on -std=23

the fix in the previous revision wasn't being applied
properly, because the build system of gmp generates
a conftest.c file, and the entry being made for it was
actually coming from this place in the configure file.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...further-gcc-15-fix-for-compiling-gmp.patch | 54 ++++++++++++++++++
 ...-for-std-c23-on-gmp-with-host-gcc-15.patch | 55 +++++++++++++++++++
 2 files changed, 109 insertions(+)
 create mode 100644 config/coreboot/default/patches/0042-further-gcc-15-fix-for-compiling-gmp.patch
 create mode 100644 config/coreboot/fam15h/patches/0016-further-fix-for-std-c23-on-gmp-with-host-gcc-15.patch

diff --git a/config/coreboot/default/patches/0042-further-gcc-15-fix-for-compiling-gmp.patch b/config/coreboot/default/patches/0042-further-gcc-15-fix-for-compiling-gmp.patch
new file mode 100644
index 00000000..a2f5c982
--- /dev/null
+++ b/config/coreboot/default/patches/0042-further-gcc-15-fix-for-compiling-gmp.patch
@@ -0,0 +1,54 @@
+From 983835d1470dde4559d9ee58c60e65c0bb3873c2 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 29 Apr 2025 23:13:42 +0100
+Subject: [PATCH 1/1] further gcc-15 fix for compiling gmp
+
+same as the previous fix, but we needed to apply
+the exact same change to the configure file, in
+the appropriate place.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ ...6.3.0_acinclude-m4-fix-std-c23-extra.patch | 30 +++++++++++++++++++
+ 1 file changed, 30 insertions(+)
+ create mode 100644 util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch
+
+diff --git a/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch
+new file mode 100644
+index 0000000000..bee0159abf
+--- /dev/null
++++ b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch
+@@ -0,0 +1,30 @@
++From f1da82325f91ccf8f3a251c0f94388acf091c1fe Mon Sep 17 00:00:00 2001
++From: Leah Rowe <leah@libreboot.org>
++Date: Tue, 29 Apr 2025 23:11:25 +0100
++Subject: [PATCH 1/1] further gcc-15 -std=23 mitigation
++
++the same fix as in the previous revision, also needs
++to be applied here. this make the coreboot build process
++pass, when compiling gmp.
++
++Signed-off-by: Leah Rowe <leah@libreboot.org>
++---
++ configure | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++diff --git a/configure b/configure
++index 7910aa0..bd4342d 100755
++--- a/configure
+++++ b/configure
++@@ -6568,7 +6568,7 @@ if test "$gmp_prog_cc_works" = yes; then
++ 
++ #if defined (__GNUC__) && ! defined (__cplusplus)
++ typedef unsigned long long t1;typedef t1*t2;
++-void g(){}
+++void g(int,const t1 *,t1,t1 *,const t1 *,int){}
++ void h(){}
++ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0)
++ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;}
++-- 
++2.39.5
++
+-- 
+2.39.5
+
diff --git a/config/coreboot/fam15h/patches/0016-further-fix-for-std-c23-on-gmp-with-host-gcc-15.patch b/config/coreboot/fam15h/patches/0016-further-fix-for-std-c23-on-gmp-with-host-gcc-15.patch
new file mode 100644
index 00000000..1287a02d
--- /dev/null
+++ b/config/coreboot/fam15h/patches/0016-further-fix-for-std-c23-on-gmp-with-host-gcc-15.patch
@@ -0,0 +1,55 @@
+From 8c3a1163eb24a608ad14747cd40169fb5a41d4f9 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 29 Apr 2025 23:18:56 +0100
+Subject: [PATCH 1/1] further fix for std=c23 on gmp with host gcc-15
+
+the fix had to be applied in the configure file, so that
+the correct function call is generated in conftest.c
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ ...e.m4-fix-std-c23-build-failure-extra.patch | 32 +++++++++++++++++++
+ 1 file changed, 32 insertions(+)
+ create mode 100644 util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure-extra.patch
+
+diff --git a/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure-extra.patch b/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure-extra.patch
+new file mode 100644
+index 0000000000..40569b27d8
+--- /dev/null
++++ b/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure-extra.patch
+@@ -0,0 +1,32 @@
++From 6316016cfe6834b6d3242e7e088b7d2af91ada22 Mon Sep 17 00:00:00 2001
++From: Leah Rowe <leah@libreboot.org>
++Date: Tue, 29 Apr 2025 23:16:51 +0100
++Subject: [PATCH 1/1] further -std=23 gcc-15 fix for gmp
++
++the previously merged revision was correct, but
++applied in the wrong place. the conftest.c file
++was being generated by configure, in this place.
++
++this should fix build errors now, on gcc-15.
++
++Signed-off-by: Leah Rowe <leah@libreboot.org>
++---
++ configure | 2 +-
++ 1 file changed, 1 insertion(+), 1 deletion(-)
++
++diff --git a/configure b/configure
++index 12ddffd..8b07818 100755
++--- a/configure
+++++ b/configure
++@@ -6458,7 +6458,7 @@ if test "$gmp_prog_cc_works" = yes; then
++ 
++ #if defined (__GNUC__) && ! defined (__cplusplus)
++ typedef unsigned long long t1;typedef t1*t2;
++-void g(){}
+++void g(int,const t1 *,t1,t1 *,const t1 *,int){}
++ void h(){}
++ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0)
++ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;}
++-- 
++2.39.5
++
+-- 
+2.39.5
+

From 628ae867c9ac61ddb7345c51307c44080047dc44 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 30 Apr 2025 00:43:45 +0100
Subject: [PATCH 1272/1549] flashprog: bump to rev e060018 (1 March 2025)

This brings in the following upstream changes:

* e060018 flashchips: Explicitly zero-initialize in .qpi_read_params
* ff9526b dediprog: Use dual-i/o default only for SF600Plus-G2
* 5a72cfb flashchips: Fix block-protection bits for 4BA Puya chips
* 284d55b flashchips: Add WPS bit description for GD25Q128C
* 37e07a8 flashchips: Add missing QE bit descriptions
* 3646b18 flashchips: Add GigaDevice GD25LF128E 166MHz, 1.8V part
* d4eb532 flashchips: Add GigaDevice GD25LF80E..GD25LF64E 166MHz, 1.8V parts
* 38d037f flashchips: Add GigaDevice GD25LB512MF..GD55LB02GF 1.8V parts
* 1da0293 flashchips: Add GigaDevice GD25LB512ME..GD55LB02GE 1.8V parts
* 6d728e6 flashchips: Add GigaDevice GD25B512MF..GD55B02GF 3.3V parts
* 493a4e0 flashchips: Update and split GD25Q256D entry
* 648dfdc spi25: Fix cosmetic debug-print error due to unitialized buffer
* cfd607d layout: Show a warning if no region is included
* ec287e2 ich_descriptors_tool: Change region name EC/BMC -> EC_BMC
* 39a4f7d sb600spi: Request more `lspci` details
* 404529d memory_bus.c: Add missing copyright notice
* fbea0fe udev rules: Restore mode/group configuration
* c90d6c4 flashchips: Add some 25LC series EEPROMs
* ee8cf1c Provide no-op probe function, always returning 1
* 4e6155a spi25: Add SPI25_EEPROM enum and handle < 3-byte addresses
* 9512c9c Add missing copyright notices to recently created files
* 06fbccc flashchips: Add GigaDevice GD25LB256E 1.8V part
* bc001da flashchips: Add some GigaDevice GD25L*256 1.8V parts
* 7d0f556 flashchips: Update GigaDevice 1.8V family up to GD25LQ128
* 7f8c12d flashchips: Add GigaDevice GD25LQ20, update family up to GD25LQ16
* 565471c flashchips: Add GigaDevice GD25B512ME..GD55B02GE 3.3V parts
* 6ee2f89 flashchips: Update GigaDevice GD25Q/B/R 128Mbit, 3.3V parts
* c230c69 flashchips: Add remaining Puya PY25Q..H 3.3V parts
* 06e0264 flashchips: Add Puya PY25Q..H family up to PY25Q128H
* fe21b43 flashchips: Add remaining P25Q..H family 3.3V chips
* 1c5d829 flashchips: Add Puya P25Q40SH, P25Q80SH, P25Q16SH 3.3V parts
* b0cae5e flashchips: Add Puya P25Q06H, P25Q11H, P25Q21H 3.3V parts
* b09136b flashchips: Add Puya P25Q05..16H 3.3V parts
* ed8b82c flashchips: Add Fudan FM25Q128 3.3V part
* 4a35134 flashchips: Add Fudan FM25Q08A 3.3V part
* 7f7bffa flashchips: Add Fudan FM25Q64, update FM25Q08..Q32
* c591518 flashchips: Add Fudan FM25Q02/Q04 3.3V parts
* fea6e16 flashchips: Add Winbond W25Q16JV_M (DTR version)
* 56d727e flashchips: Add newer gen. XTX Tech. XT25F..F 3.3V parts
* c64a803 flashchips: Add XTX Tech. XT25F..B 3.3V family
* 46e4209 flashchips: Add XTX Tech. XT25F02E/04D/08B 3.3V parts
* 6bc88e7 flashchips: Add Boya/BoHong BY25Q32/64/128 3.3V variants
* 3cddff4 flashchips: Complete Boya/BoHong BY25D family
* 34e3de6 flashchips: Add Zetta Device ZD25LQ64/128 1.8V parts
* f050370 selfcheck: Check dummy-cycle settings when QPI is advertised
* d40037a selfcheck: Check for WP functions when BP bits are given
* 2a1036b flashchips: Fix up GD25Q128C write-protect support
* d4e41d3 flashchips: Add SST26VF080A
* 04c1cf7 Add .envrc

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/flashprog/pkg.cfg | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/git/flashprog/pkg.cfg b/config/git/flashprog/pkg.cfg
index 6cfbdb38..16231efe 100644
--- a/config/git/flashprog/pkg.cfg
+++ b/config/git/flashprog/pkg.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-rev="eb2c04185f8f471c768b742d66e4c552effdd9cb"
+rev="e060018655f802896dc226832d25e223102889c8"
 url="https://review.sourcearcade.org/flashprog"
 bkup_url="https://github.com/SourceArcade/flashprog.git"

From b0a6d4711a34542ca3f7358c655042f5d81c90fb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 30 Apr 2025 00:59:39 +0100
Subject: [PATCH 1273/1549] coreboot413: add alper's fix to cbfstool for gcc15

otherwise, it won't compile on gcc 15 (pragma fix from
earlier on, used on the other coreboot trees)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...-build-error-on-GCC-15-host-compiler.patch | 33 +++++++++++++++++++
 1 file changed, 33 insertions(+)
 create mode 100644 config/coreboot/coreboot413/patches/0002-Fix-cbfstool-build-error-on-GCC-15-host-compiler.patch

diff --git a/config/coreboot/coreboot413/patches/0002-Fix-cbfstool-build-error-on-GCC-15-host-compiler.patch b/config/coreboot/coreboot413/patches/0002-Fix-cbfstool-build-error-on-GCC-15-host-compiler.patch
new file mode 100644
index 00000000..9b7b8c5b
--- /dev/null
+++ b/config/coreboot/coreboot413/patches/0002-Fix-cbfstool-build-error-on-GCC-15-host-compiler.patch
@@ -0,0 +1,33 @@
+From 06e8d7a9db4efe1dc2b7e5865b801a5518b38fbd Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Tue, 29 Apr 2025 17:31:13 +0300
+Subject: [PATCH 1/1] Fix cbfstool build error on GCC 15 host compiler
+
+GCC 15 now considers the unterminated-string-initialization warning as
+part of -Werror by default. Coreboot compiles host utilities with the
+system compiler, which results in getting this error in some files.
+
+Mark a hexadecimal translation table in cbfstool code as "nonstring" to
+avoid the warning-turned-error.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+ util/cbfstool/common.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
+index 539d0baccf..f6fe647503 100644
+--- a/util/cbfstool/common.c
++++ b/util/cbfstool/common.c
+@@ -188,7 +188,7 @@ uint64_t intfiletype(const char *name)
+ 
+ char *bintohex(uint8_t *data, size_t len)
+ {
+-	static const char translate[16] = "0123456789abcdef";
++	static const char translate[16] __attribute__((__nonstring__)) = "0123456789abcdef";
+ 
+ 	char *result = malloc(len * 2 + 1);
+ 	if (result == NULL)
+-- 
+2.39.5
+

From 342eca6f3d1ffc1fac0b20cc519dbfded74931fc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 30 Apr 2025 01:26:34 +0100
Subject: [PATCH 1274/1549] update untitled

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/git/docs/pkg.cfg                   | 6 +++---
 config/submodule/docs/module.list         | 1 -
 config/submodule/docs/untitled/module.cfg | 5 -----
 3 files changed, 3 insertions(+), 9 deletions(-)
 delete mode 100644 config/submodule/docs/untitled/module.cfg

diff --git a/config/git/docs/pkg.cfg b/config/git/docs/pkg.cfg
index 144292fd..83820858 100644
--- a/config/git/docs/pkg.cfg
+++ b/config/git/docs/pkg.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-rev="e72d055915c3a9ffe739982946e101b146b2483c"
-url="https://codeberg.org/vimuser/untitled"
-bkup_url="https://notabug.org/untitled/untitled"
+rev="e4abe735ae13cf43e5da1d79fe63726ab01ac907"
+url="https://codeberg.org/libreboot/lbssg"
+bkup_url="https://notabug.org/libreboot/lbssg"
diff --git a/config/submodule/docs/module.list b/config/submodule/docs/module.list
index 1ad2aecb..e2570aac 100644
--- a/config/submodule/docs/module.list
+++ b/config/submodule/docs/module.list
@@ -1,3 +1,2 @@
-www/untitled
 www/html
 www/html/site/img
diff --git a/config/submodule/docs/untitled/module.cfg b/config/submodule/docs/untitled/module.cfg
deleted file mode 100644
index 3c14f225..00000000
--- a/config/submodule/docs/untitled/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subhash="d8e2043c1512eb1171c274559ce82e8093ef393f"
-subrepo="https://codeberg.org/vimuser/untitled-website"
-subrepo_bkup="https://notabug.org/untitled/untitled-website"

From a08b8d94fc58fa195adb0261539509d8ddaf4799 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 30 Apr 2025 01:51:45 +0100
Subject: [PATCH 1275/1549] seabios: bump to rev 9029a010, 4 March 2025

This brings in the following improvements from upstream:

* 9029a010 kconfig: fix the check-lxdialog.sh to work with gcc 14+
* 8863cbbd ahci: add controller reset
* df9dd418 update pci_pad_mem64 handling
* a4fc1845 add romfile_loadbool()
* a2725e28 drop acpi tables and hex includes
* 35aa9a72 drop obsolete acpi table code
* 1b598a1d usb-hid: Support multiple USB HID devices by storing them in a linked list

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../0001-romfile-implement-a-generic-loader.patch    | 12 ++++++------
 ...oks-optionroms-implement-mxm-3.0-interrupts.patch |  6 +++---
 ...t-the-Libreboot-version-in-the-SeaBIOS-menu.patch |  6 +++---
 config/seabios/default/target.cfg                    |  2 +-
 4 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch b/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
index 2c042776..f074a5c5 100644
--- a/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
+++ b/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
@@ -1,7 +1,7 @@
-From 2aff8adc1dcd1315877fdb4ac4ef5e649c5b7d11 Mon Sep 17 00:00:00 2001
+From 9509e5a959d884879015ca2388a1cee4d32662f2 Mon Sep 17 00:00:00 2001
 From: Riku Viitanen <riku.viitanen@protonmail.com>
 Date: Sat, 10 Feb 2024 21:23:33 +0200
-Subject: [PATCH 1/2] romfile: implement a generic loader
+Subject: [PATCH 1/3] romfile: implement a generic loader
 
 romfile_loadfile_g:
 Based on romfile_loadfile but more flexible. User has to supply pointer
@@ -18,7 +18,7 @@ Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
  2 files changed, 22 insertions(+), 5 deletions(-)
 
 diff --git a/src/romfile.c b/src/romfile.c
-index b598274edc09..8ccf5139ece8 100644
+index 8072a915..f4d5f82d 100644
 --- a/src/romfile.c
 +++ b/src/romfile.c
 @@ -47,10 +47,12 @@ romfile_find(const char *name)
@@ -69,7 +69,7 @@ index b598274edc09..8ccf5139ece8 100644
  }
  
 diff --git a/src/romfile.h b/src/romfile.h
-index 3e0f820047dd..1b967d86551f 100644
+index ae2f4ac7..f62b2fee 100644
 --- a/src/romfile.h
 +++ b/src/romfile.h
 @@ -13,6 +13,8 @@ struct romfile_s {
@@ -80,7 +80,7 @@ index 3e0f820047dd..1b967d86551f 100644
 +                         void *(*malloc_fn)(u32), int add_len);
  void *romfile_loadfile(const char *name, int *psize);
  u64 romfile_loadint(const char *name, u64 defval);
- 
+ u32 romfile_loadbool(const char *name, u32 defval);
 -- 
-2.43.0
+2.39.5
 
diff --git a/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch b/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch
index f05a34c2..41800d29 100644
--- a/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch
+++ b/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch
@@ -1,7 +1,7 @@
-From 1e7c443d069ef817c4e699bd6675efff4ebddb86 Mon Sep 17 00:00:00 2001
+From fd328d2eedadd43f6ceecc05c2d750a91a0e1200 Mon Sep 17 00:00:00 2001
 From: Riku Viitanen <riku.viitanen@protonmail.com>
 Date: Sat, 10 Feb 2024 21:38:17 +0200
-Subject: [PATCH 2/2] vgahooks, optionroms: implement mxm 3.0 interrupts
+Subject: [PATCH 2/3] vgahooks, optionroms: implement mxm 3.0 interrupts
 
 VGAROMs on MXM graphics cards need certain int15h functions present.
 
@@ -184,5 +184,5 @@ index 00000000..f0c203af
 +
 +#endif // vgahooks.h
 -- 
-2.43.0
+2.39.5
 
diff --git a/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
index 5cf60763..e36b5d2c 100644
--- a/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
+++ b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
@@ -1,7 +1,7 @@
-From ebd8293eb1af20c204beb3aa1394865185e2f3f0 Mon Sep 17 00:00:00 2001
+From 55344b6c79b4c3a89558d1338169c920d1d49d18 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 6 Jan 2025 18:49:58 +0000
-Subject: [PATCH 1/1] Print the Libreboot version in the SeaBIOS menu
+Subject: [PATCH 3/3] Print the Libreboot version in the SeaBIOS menu
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/src/bootsplash.c b/src/bootsplash.c
-index 538b316d..8746098c 100644
+index 538b316d..f18d41c7 100644
 --- a/src/bootsplash.c
 +++ b/src/bootsplash.c
 @@ -48,7 +48,7 @@ enable_vga_console(void)
diff --git a/config/seabios/default/target.cfg b/config/seabios/default/target.cfg
index 9ff1db3e..92b906f2 100644
--- a/config/seabios/default/target.cfg
+++ b/config/seabios/default/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="default"
-rev="1602647f1be24fe63d11138d802e735c8e674e63"
+rev="9029a010ec413e6c3c0eb52c29c252a5b9a9f774"

From 2009c26f0aa1e11c0f9c52e4c971afe2e10609b9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 30 Apr 2025 02:27:47 +0100
Subject: [PATCH 1276/1549] serprog: Remove pico2 support for the time being

Many users report bugs, so I'm reverting lbmk back to only
supporting the rp2040 dongles for the time being. The
documentation will be updated to reflect this.

Pico2 support will be re-added at a later date, once more
testing has been done, and fixes made if necessary.
---
 config/data/pico-serprog/mkhelper.cfg |  1 -
 config/git/pico-sdk/pkg.cfg           |  2 +-
 config/git/pico-serprog/pkg.cfg       |  2 +-
 config/git/picotool/pkg.cfg           |  5 -----
 include/rom.sh                        | 25 +------------------------
 5 files changed, 3 insertions(+), 32 deletions(-)
 delete mode 100644 config/git/picotool/pkg.cfg

diff --git a/config/data/pico-serprog/mkhelper.cfg b/config/data/pico-serprog/mkhelper.cfg
index c913767c..ccfdc0df 100644
--- a/config/data/pico-serprog/mkhelper.cfg
+++ b/config/data/pico-serprog/mkhelper.cfg
@@ -7,4 +7,3 @@ serx="$sersrc/build/pico_serprog.uf2"
 picosdk="src/pico-sdk"
 serdir="$picosdk/src/boards/include/boards"
 premake="mkserprog pico"
-picotool="$xbmkpwd/src/picotool/xbmkbin"
diff --git a/config/git/pico-sdk/pkg.cfg b/config/git/pico-sdk/pkg.cfg
index 8af13d09..284ee057 100644
--- a/config/git/pico-sdk/pkg.cfg
+++ b/config/git/pico-sdk/pkg.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-rev="95ea6acad131124694cda1c162c52cd30e0aece0"
+rev="6a7db34ff63345a7badec79ebea3aaef1712f374"
 url="https://codeberg.org/libreboot/pico-sdk"
 bkup_url="https://github.com/raspberrypi/pico-sdk"
diff --git a/config/git/pico-serprog/pkg.cfg b/config/git/pico-serprog/pkg.cfg
index 3d3e0f19..03b45a1b 100644
--- a/config/git/pico-serprog/pkg.cfg
+++ b/config/git/pico-serprog/pkg.cfg
@@ -3,4 +3,4 @@
 rev="3ea792664ed29ca1ff3e2e78d1d16099684781bd"
 url="https://codeberg.org/libreboot/pico-serprog"
 bkup_url="https://git.disroot.org/libreboot/pico-serprog"
-depend="pico-sdk picotool"
+depend="pico-sdk"
diff --git a/config/git/picotool/pkg.cfg b/config/git/picotool/pkg.cfg
deleted file mode 100644
index 3711ce04..00000000
--- a/config/git/picotool/pkg.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-rev="df21059f7ca6f1babc7f1f3b92122cacffc85951"
-url="https://github.com/raspberrypi/picotool"
-bkup_url="https://codeberg.org/libreboot/picotool"
diff --git a/include/rom.sh b/include/rom.sh
index 68c61936..f74912af 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -9,25 +9,13 @@ grubdata="config/data/grub"
 
 mkserprog()
 {
-	[ $# -lt 1 ] && $err "mkserprog: no arguments provided"
 	[ "$_f" = "-d" ] && return 0 # dry run
-
-	[ "$1" = "pico" ] && mkpicotool
-
 	basename -as .h "$serdir/"*.h > "$xbmktmp/ser" || \
 	    $err "!mk $1 $xbmktmp"
 
 	while read -r sertarget; do
-		[ "$1" = "pico" ] &&
-		    x_ rm -rf "$sersrc/build" \
-		    && (pt=$(x_ grep "pico_cmake_set" \
-		          "$picosdk/src/boards/include/boards/$sertarget.h" \
-		        | grep "PICO_PLATFORM" | cut -d= -f2 | tr -d [:blank:])
-		        mkdir -p "$sersrc/build_$pt"
-			ln -srf "$sersrc/build_$pt/" "$sersrc/build") \
-		    && x_ cmake -DPICO_BOARD="$sertarget" \
+		[ "$1" = "pico" ] && x_ cmake -DPICO_BOARD="$sertarget" \
 		    -DPICO_SDK_PATH="$picosdk" -B "$sersrc/build" "$sersrc" \
-		    -Dpicotool_DIR="$picotool/picotool" \
 		    && x_ cmake --build "$sersrc/build"
 		[ "$1" = "stm32" ] && x_ make -C "$sersrc" \
 		    libopencm3-just-make BOARD=$sertarget && x_ make -C \
@@ -39,17 +27,6 @@ mkserprog()
 	[ "$XBMK_RELEASE" = "y" ] && mkrom_tarball "bin/serprog_$1"; :
 }
 
-mkpicotool()
-{
-	rm -Rf "$picotool" || $err "Can't remove picotool builddir"
-	(
-	x_ cd src/picotool
-	x_ cmake -DCMAKE_INSTALL_PREFIX=xbmkbin -DPICOTOOL_FLAT_INSTALL=1 \
-	    -DPICO_SDK_PATH=../pico-sdk
-	x_ make install
-	) || $err "Can't build picotool"; :
-}
-
 copyps1bios()
 {
 	x_ rm -Rf bin/playstation

From 0f2202554ab14a0b8b7ec5eb2c45df6d9436eec3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 30 Apr 2025 03:00:26 +0100
Subject: [PATCH 1277/1549] coreboot/fam15h: update nasm to 2.16.03

this fixed kgpe-d16 build errors on gcc 15 when tested
on debian sid (with gcc-15 installed from experimental)

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../0017-xgcc-update-nasm-to-2.16.03.patch    | 44 +++++++++++++++++++
 1 file changed, 44 insertions(+)
 create mode 100644 config/coreboot/fam15h/patches/0017-xgcc-update-nasm-to-2.16.03.patch

diff --git a/config/coreboot/fam15h/patches/0017-xgcc-update-nasm-to-2.16.03.patch b/config/coreboot/fam15h/patches/0017-xgcc-update-nasm-to-2.16.03.patch
new file mode 100644
index 00000000..8dc52ac9
--- /dev/null
+++ b/config/coreboot/fam15h/patches/0017-xgcc-update-nasm-to-2.16.03.patch
@@ -0,0 +1,44 @@
+From 0d639c485bdf136e4c5ac7af81fc12da3f21bc46 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Wed, 30 Apr 2025 04:07:31 +0100
+Subject: [PATCH 1/1] xgcc: update nasm to 2.16.03
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ util/crossgcc/buildgcc                       | 2 +-
+ util/crossgcc/sum/nasm-2.14.02.tar.bz2.cksum | 1 -
+ util/crossgcc/sum/nasm-2.16.03.tar.bz2.cksum | 1 +
+ 3 files changed, 2 insertions(+), 2 deletions(-)
+ delete mode 100644 util/crossgcc/sum/nasm-2.14.02.tar.bz2.cksum
+ create mode 100644 util/crossgcc/sum/nasm-2.16.03.tar.bz2.cksum
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index 0ad1980104..2d48ff038e 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -61,7 +61,7 @@ EXPAT_VERSION=2.2.7
+ CLANG_VERSION=8.0.0
+ MAKE_VERSION=4.2.1
+ CMAKE_VERSION=3.15.3
+-NASM_VERSION=2.14.02
++NASM_VERSION=2.16.03
+ 
+ # GCC toolchain archive locations
+ # These are sanitized by the jenkins toolchain test builder, so if
+diff --git a/util/crossgcc/sum/nasm-2.14.02.tar.bz2.cksum b/util/crossgcc/sum/nasm-2.14.02.tar.bz2.cksum
+deleted file mode 100644
+index f3b9de9d29..0000000000
+--- a/util/crossgcc/sum/nasm-2.14.02.tar.bz2.cksum
++++ /dev/null
+@@ -1 +0,0 @@
+-fe098ee4dc9c4c983696c4948e64b23e4098b92b  tarballs/nasm-2.14.02.tar.bz2
+diff --git a/util/crossgcc/sum/nasm-2.16.03.tar.bz2.cksum b/util/crossgcc/sum/nasm-2.16.03.tar.bz2.cksum
+new file mode 100644
+index 0000000000..9ca23fb0c4
+--- /dev/null
++++ b/util/crossgcc/sum/nasm-2.16.03.tar.bz2.cksum
+@@ -0,0 +1 @@
++c63080347a5c1c8904456fe6c680b722558383b4  tarballs/nasm-2.16.03.tar.bz2
+-- 
+2.39.5
+

From 4f77125066d4675f60cee01c0670fba20ced94c5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 30 Apr 2025 04:36:43 +0100
Subject: [PATCH 1278/1549] coreboot/fam15h: update submodule for nasm

i forgot to in the last commit, but it didn't matter because
it just meant that coreboot.git's own download logic kicked
in as a fallback. however, it's better to rely on libreboot's
build system for this, since it has redundancy.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/submodule/coreboot/fam15h/module.list                 | 2 +-
 .../coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg          | 5 -----
 .../coreboot/fam15h/nasm-2.16.03.tar.bz2/module.cfg          | 5 +++++
 3 files changed, 6 insertions(+), 6 deletions(-)
 delete mode 100644 config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg
 create mode 100644 config/submodule/coreboot/fam15h/nasm-2.16.03.tar.bz2/module.cfg

diff --git a/config/submodule/coreboot/fam15h/module.list b/config/submodule/coreboot/fam15h/module.list
index 64f09aea..00befad9 100644
--- a/config/submodule/coreboot/fam15h/module.list
+++ b/config/submodule/coreboot/fam15h/module.list
@@ -6,4 +6,4 @@ util/crossgcc/tarballs/gcc-8.3.0.tar.xz
 util/crossgcc/tarballs/gmp-6.1.2.tar.xz
 util/crossgcc/tarballs/mpc-1.1.0.tar.gz
 util/crossgcc/tarballs/mpfr-4.0.2.tar.xz
-util/crossgcc/tarballs/nasm-2.14.02.tar.bz2
+util/crossgcc/tarballs/nasm-2.16.03.tar.bz2
diff --git a/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg b/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg
deleted file mode 100644
index 4c91ec05..00000000
--- a/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.14.02/nasm-2.14.02.tar.bz2"
-subfile_bkup="https://coreboot.org/releases/crossgcc-sources/nasm-2.14.02.tar.bz2"
-subhash="71e3d44736493b1a56d4230bc2e5519e858aaadde5d89a692f1472fad6755084460e36b42852707f4c862eff75d3f2c232aedcc4e61e9d9ffcc8c9ca6498292b"
diff --git a/config/submodule/coreboot/fam15h/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/fam15h/nasm-2.16.03.tar.bz2/module.cfg
new file mode 100644
index 00000000..3895e2ef
--- /dev/null
+++ b/config/submodule/coreboot/fam15h/nasm-2.16.03.tar.bz2/module.cfg
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2"
+subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2"
+subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172"

From bb5f5cd576321bf7d486277886722189064227ac Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 30 Apr 2025 11:11:03 +0100
Subject: [PATCH 1279/1549] add pico-sdk backport patch fixing gcc 14.x

src/rp2_common/boot_stage2/boot2_w25x10cl.S:142: Error: junk at end of line, first unrecognized character is `0'
src/rp2_common/boot_stage2/boot2_w25x10cl.S:145: Error: garbage following instruction -- `beq 00b'

This should also fix it on Debian sid Experimental, where I'm testing
with GCC 15 and other bleeding edge dependencies.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ....1-compile-error-in-w25x10cls.S-2000.patch | 37 +++++++++++++++++++
 1 file changed, 37 insertions(+)
 create mode 100644 config/pico-sdk/patches/0001-Fix-GCC14.1-compile-error-in-w25x10cls.S-2000.patch

diff --git a/config/pico-sdk/patches/0001-Fix-GCC14.1-compile-error-in-w25x10cls.S-2000.patch b/config/pico-sdk/patches/0001-Fix-GCC14.1-compile-error-in-w25x10cls.S-2000.patch
new file mode 100644
index 00000000..c52e701d
--- /dev/null
+++ b/config/pico-sdk/patches/0001-Fix-GCC14.1-compile-error-in-w25x10cls.S-2000.patch
@@ -0,0 +1,37 @@
+From 5c1f16cd723de3c2e0b57f1a34e2317cdabef294 Mon Sep 17 00:00:00 2001
+From: "Earle F. Philhower, III" <earlephilhower@yahoo.com>
+Date: Tue, 5 Nov 2024 12:06:04 -0800
+Subject: [PATCH 1/1] Fix GCC14.1 compile error in w25x10cls.S (#2000)
+
+GCC14 doesn't like the 2-character temporary label "00" and throws an error
+.../pico-sdk/src/rp2040/boot_stage2/boot2_w25x10cl.S: Assembler messages:
+.../pico-sdk/src/rp2040/boot_stage2/boot2_w25x10cl.S:147: Error: junk at end of line, first unrecognized character is `0'
+.../pico/rp2040/pico-sdk/src/rp2040/boot_stage2/boot2_w25x10cl.S:150: Error: garbage following instruction -- `beq 00b'
+
+Convert it to a single number, "1", like in other boot2xxx.S files
+
+Fixes #1999
+---
+ src/rp2_common/boot_stage2/boot2_w25x10cl.S | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/src/rp2_common/boot_stage2/boot2_w25x10cl.S b/src/rp2_common/boot_stage2/boot2_w25x10cl.S
+index 89d2cd1..1bf7e10 100644
+--- a/src/rp2_common/boot_stage2/boot2_w25x10cl.S
++++ b/src/rp2_common/boot_stage2/boot2_w25x10cl.S
+@@ -139,10 +139,10 @@ regular_func _stage2_boot
+ // status register and checking for the "RX FIFO Not Empty" flag to assert.
+ 
+     movs r1, #SSI_SR_RFNE_BITS
+-00:
++1:
+     ldr r0, [r3, #SSI_SR_OFFSET]    // Read status register
+     tst r0, r1                      // RFNE status flag set?
+-    beq 00b                         // If not then wait
++    beq 1b                         // If not then wait
+ 
+ // At this point CN# will be deasserted and the SPI clock will not be running.
+ // The Winbond WX25X10CL device will be in continuous read, dual I/O mode and
+-- 
+2.39.5
+

From f21749da8b150b783d34f98775c19b021aeeb07c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 30 Apr 2025 12:28:46 +0100
Subject: [PATCH 1280/1549] Libreboot 25.04 Corny Calamity

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../patches/0002-say-the-name-libreboot-in-the-grub-menu.patch  | 2 +-
 .../patches/0002-say-the-name-libreboot-in-the-grub-menu.patch  | 2 +-
 .../patches/0002-say-the-name-libreboot-in-the-grub-menu.patch  | 2 +-
 .../0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch  | 2 +-
 config/submodule/docs/html/module.cfg                           | 2 +-
 config/submodule/docs/img/module.cfg                            | 2 +-
 .../0007-Libreboot-branding-version-on-the-bootflow-menu.patch  | 2 +-
 .../0005-Libreboot-branding-version-on-the-bootflow-menu.patch  | 2 +-
 .../0005-Libreboot-branding-version-on-the-bootflow-menu.patch  | 2 +-
 9 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 933e7dfa..e32ba2ce 100644
--- a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index 04d058f55..b1cc8f236 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20241206, 8th revision (GRUB menu): https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 25.04 Corny Calamity (GRUB menu): https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 8a1203d7..f49c8340 100644
--- a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index 04d058f55..b1cc8f236 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20241206, 8th revision (GRUB menu): https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 25.04 Corny Calamity (GRUB menu): https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 14163ab0..5818c2ed 100644
--- a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index 04d058f55..b1cc8f236 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 20241206, 8th revision (GRUB menu): https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 25.04 Corny Calamity (GRUB menu): https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
index e36b5d2c..edc4315f 100644
--- a/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
+++ b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
@@ -17,7 +17,7 @@ index 538b316d..f18d41c7 100644
  
      // Write to screen.
 -    printf("SeaBIOS (version %s)\n", VERSION);
-+    printf("Libreboot 20241206, 8th revision (SeaBIOS menu): https://libreboot.org/\n");
++    printf("Libreboot 25.04 Corny Calamity (SeaBIOS menu): https://libreboot.org/\n");
      display_uuid();
  }
  
diff --git a/config/submodule/docs/html/module.cfg b/config/submodule/docs/html/module.cfg
index c9ff5c75..6c6dab9a 100644
--- a/config/submodule/docs/html/module.cfg
+++ b/config/submodule/docs/html/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subhash="090e58d4f84125bdcf035efcadd1cd5c13a03c77"
+subhash="47c993cba483ff23a4c7b866c6cedcc905e9a2bd"
 subrepo="https://codeberg.org/libreboot/lbwww"
 subrepo_bkup="https://git.disroot.org/libreboot/lbwww"
diff --git a/config/submodule/docs/img/module.cfg b/config/submodule/docs/img/module.cfg
index 034de191..32317ff9 100644
--- a/config/submodule/docs/img/module.cfg
+++ b/config/submodule/docs/img/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subhash="2bf719e6542c3ffa6df0bdcb77ef1619cb2dce01"
+subhash="68863fd7491f1358fb920d8ad558de35fcfec769"
 subrepo="https://codeberg.org/libreboot/lbwww-img"
 subrepo_bkup="https://git.disroot.org/libreboot/lbwww-img"
diff --git a/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch
index 2f903cd7..754e2162 100644
--- a/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch
+++ b/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch
@@ -18,7 +18,7 @@ index 84831915a2..8e26ec2aef 100644
  	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
  	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
 -			     "U-Boot - Boot Menu", NULL);
-+	    "Libreboot 20241206, 8th revision (U-Boot menu): https://libreboot.org/", NULL);
++	    "Libreboot 25.04 Corny Calamity (U-Boot menu): https://libreboot.org/", NULL);
  	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
  
  	logo = video_get_u_boot_logo();
diff --git a/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
index 2f903cd7..754e2162 100644
--- a/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
+++ b/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
@@ -18,7 +18,7 @@ index 84831915a2..8e26ec2aef 100644
  	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
  	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
 -			     "U-Boot - Boot Menu", NULL);
-+	    "Libreboot 20241206, 8th revision (U-Boot menu): https://libreboot.org/", NULL);
++	    "Libreboot 25.04 Corny Calamity (U-Boot menu): https://libreboot.org/", NULL);
  	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
  
  	logo = video_get_u_boot_logo();
diff --git a/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
index 2f903cd7..754e2162 100644
--- a/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
+++ b/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
@@ -18,7 +18,7 @@ index 84831915a2..8e26ec2aef 100644
  	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
  	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
 -			     "U-Boot - Boot Menu", NULL);
-+	    "Libreboot 20241206, 8th revision (U-Boot menu): https://libreboot.org/", NULL);
++	    "Libreboot 25.04 Corny Calamity (U-Boot menu): https://libreboot.org/", NULL);
  	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
  
  	logo = video_get_u_boot_logo();

From 4c50157234dee42369a65812def22d843aab4e79 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 1 May 2025 14:29:22 +0100
Subject: [PATCH 1281/1549] coreboot/t420_8mb: add missing txtmode config

Reported by irys on #libreboot irc

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../t420_8mb/config/libgfxinit_txtmode        | 714 ++++++++++++++++++
 1 file changed, 714 insertions(+)
 create mode 100644 config/coreboot/t420_8mb/config/libgfxinit_txtmode

diff --git a/config/coreboot/t420_8mb/config/libgfxinit_txtmode b/config/coreboot/t420_8mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..b12fa03e
--- /dev/null
+++ b/config/coreboot/t420_8mb/config/libgfxinit_txtmode
@@ -0,0 +1,714 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+CONFIG_VENDOR_LENOVO=y
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_FAMILY="ThinkPad T420"
+CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T420"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="lenovo/t420"
+CONFIG_VGA_BIOS_ID="8086,0126"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="LENOVO"
+CONFIG_CBFS_SIZE=0x7E0000
+CONFIG_MAX_CPUS=8
+CONFIG_ONBOARD_VGA_IS_PRIMARY=y
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T420"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+CONFIG_VBOOT_SLOTS_RW_A=y
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
+# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_M900 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
+# CONFIG_BOARD_LENOVO_M920Q is not set
+# CONFIG_BOARD_LENOVO_S230U is not set
+# CONFIG_BOARD_LENOVO_T480 is not set
+# CONFIG_BOARD_LENOVO_T480S is not set
+# CONFIG_BOARD_LENOVO_T400 is not set
+# CONFIG_BOARD_LENOVO_T500 is not set
+# CONFIG_BOARD_LENOVO_R400 is not set
+# CONFIG_BOARD_LENOVO_R500 is not set
+# CONFIG_BOARD_LENOVO_W500 is not set
+# CONFIG_BOARD_LENOVO_T410 is not set
+CONFIG_BOARD_LENOVO_T420=y
+# CONFIG_BOARD_LENOVO_T420S is not set
+# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
+# CONFIG_BOARD_LENOVO_T430S is not set
+# CONFIG_BOARD_LENOVO_T431S is not set
+# CONFIG_BOARD_LENOVO_T520 is not set
+# CONFIG_BOARD_LENOVO_W520 is not set
+# CONFIG_BOARD_LENOVO_T530 is not set
+# CONFIG_BOARD_LENOVO_W530 is not set
+# CONFIG_BOARD_LENOVO_T60 is not set
+# CONFIG_BOARD_LENOVO_Z61T is not set
+# CONFIG_BOARD_LENOVO_R60 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
+# CONFIG_BOARD_LENOVO_X131E is not set
+# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
+# CONFIG_BOARD_LENOVO_X200 is not set
+# CONFIG_BOARD_LENOVO_X301 is not set
+# CONFIG_BOARD_LENOVO_X201 is not set
+# CONFIG_BOARD_LENOVO_X220 is not set
+# CONFIG_BOARD_LENOVO_X220I is not set
+# CONFIG_BOARD_LENOVO_X1 is not set
+# CONFIG_BOARD_LENOVO_X230 is not set
+# CONFIG_BOARD_LENOVO_X230T is not set
+# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
+# CONFIG_BOARD_LENOVO_X60 is not set
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
+CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_CPU_PT_ROM_MAP_GB=4
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y
+# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set
+# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set
+CONFIG_IGD_DEFAULT_UMA_INDEX=0
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+CONFIG_HIDE_MEI_ON_ERROR=y
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_LENOVO_H8=y
+# CONFIG_H8_BEEP_ON_DEATH is not set
+# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set
+# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
+# CONFIG_H8_FN_CTRL_SWAP is not set
+CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
+CONFIG_EC_LENOVO_PMH7=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_NO_UART_ON_SUPERIO=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVER_LENOVO_SERIALS=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS=y
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+CONFIG_DRIVERS_RICOH_RCE822=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_NULL=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y

From 8245f0b3211812ac818adadd6526b0b39c63f3f0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 1 May 2025 14:30:14 +0100
Subject: [PATCH 1282/1549] Revert "seabios: bump to rev 9029a010, 4 March
 2025"

This reverts commit a08b8d94fc58fa195adb0261539509d8ddaf4799.

From #libreboot IRC today:

07:02 <irys> ooh this is fun. seabios commit 8863cbbd15a73b03153553c562f5b1fb939ad4d7 (ahci: add controller reset) breaks ahci entirely on t420
07:05 <irys> cbmem console on that seabios commit has a timeout then "AHCI/0: device not ready"
07:07 <irys> AHCI works fine if i change config/seabios/default/target.cfg to use the immediate previous seabios commit (df9dd418b3b0e586cb208125094620fc7f90f23d)
07:07 <irys> works in grub payload either way though
07:31 <irys> here, `cbmem -c` after booting the broken rev: https://0x0.st/84oQ.log
07:31 <irys> compared to the working one https://0x0.st/84o1.log
07:33 <irys> i can't report to upstream myself *right now* but i figure you might want to know about this leah

I have downloaded those logs locally for reference, so that an upstream
report can be made to SeaBIOS. For the purposes of this Libreboot commit,
the diff of the logs is as follows (diff -u broken.log working.log):

Taking each diff line out of the log, the relevant entries
seem to be:

Searching bootorder for: /pci@i0cf8/*@1f,2/drive@0/disk@0
+AHCI/0: Set transfer mode to UDMA-6
+Searching bios-geometry for: /pci@i0cf8/*@1f,2/drive@0/disk@0
+AHCI/0: registering: "AHCI/0: Netac SSD 128GB ATA-11 Hard-Disk (119 GiBytes)"

-WARNING - Timeout at ahci_port_setup:477!
-AHCI/0: device not ready (tf 0x80)
-All threads complete.

-2. Payload [memtest]
+2. AHCI/0: Netac SSD 128GB ATA-11 Hard-Disk (119 GiBytes)
+3. Payload [memtest]

-Space available for UMB: c7000-eb800, f5880-f5ff0
-Returned 16777216 bytes of ZoneHigh
+drive 0x000f5fa0: PCHS=16383/16/63 translation=lba LCHS=1024/255/63 s=250069680
+Space available for UMB: c7000-eb800, f5880-f5fa0
+Returned 16773120 bytes of ZoneHigh

Therefore, the revision will be reverted back for now. It was
only about 8 additional patches imported in the update anyway.
---
 .../0001-romfile-implement-a-generic-loader.patch    | 12 ++++++------
 ...oks-optionroms-implement-mxm-3.0-interrupts.patch |  6 +++---
 ...t-the-Libreboot-version-in-the-SeaBIOS-menu.patch |  6 +++---
 config/seabios/default/target.cfg                    |  2 +-
 4 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch b/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
index f074a5c5..2c042776 100644
--- a/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
+++ b/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
@@ -1,7 +1,7 @@
-From 9509e5a959d884879015ca2388a1cee4d32662f2 Mon Sep 17 00:00:00 2001
+From 2aff8adc1dcd1315877fdb4ac4ef5e649c5b7d11 Mon Sep 17 00:00:00 2001
 From: Riku Viitanen <riku.viitanen@protonmail.com>
 Date: Sat, 10 Feb 2024 21:23:33 +0200
-Subject: [PATCH 1/3] romfile: implement a generic loader
+Subject: [PATCH 1/2] romfile: implement a generic loader
 
 romfile_loadfile_g:
 Based on romfile_loadfile but more flexible. User has to supply pointer
@@ -18,7 +18,7 @@ Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
  2 files changed, 22 insertions(+), 5 deletions(-)
 
 diff --git a/src/romfile.c b/src/romfile.c
-index 8072a915..f4d5f82d 100644
+index b598274edc09..8ccf5139ece8 100644
 --- a/src/romfile.c
 +++ b/src/romfile.c
 @@ -47,10 +47,12 @@ romfile_find(const char *name)
@@ -69,7 +69,7 @@ index 8072a915..f4d5f82d 100644
  }
  
 diff --git a/src/romfile.h b/src/romfile.h
-index ae2f4ac7..f62b2fee 100644
+index 3e0f820047dd..1b967d86551f 100644
 --- a/src/romfile.h
 +++ b/src/romfile.h
 @@ -13,6 +13,8 @@ struct romfile_s {
@@ -80,7 +80,7 @@ index ae2f4ac7..f62b2fee 100644
 +                         void *(*malloc_fn)(u32), int add_len);
  void *romfile_loadfile(const char *name, int *psize);
  u64 romfile_loadint(const char *name, u64 defval);
- u32 romfile_loadbool(const char *name, u32 defval);
+ 
 -- 
-2.39.5
+2.43.0
 
diff --git a/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch b/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch
index 41800d29..f05a34c2 100644
--- a/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch
+++ b/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch
@@ -1,7 +1,7 @@
-From fd328d2eedadd43f6ceecc05c2d750a91a0e1200 Mon Sep 17 00:00:00 2001
+From 1e7c443d069ef817c4e699bd6675efff4ebddb86 Mon Sep 17 00:00:00 2001
 From: Riku Viitanen <riku.viitanen@protonmail.com>
 Date: Sat, 10 Feb 2024 21:38:17 +0200
-Subject: [PATCH 2/3] vgahooks, optionroms: implement mxm 3.0 interrupts
+Subject: [PATCH 2/2] vgahooks, optionroms: implement mxm 3.0 interrupts
 
 VGAROMs on MXM graphics cards need certain int15h functions present.
 
@@ -184,5 +184,5 @@ index 00000000..f0c203af
 +
 +#endif // vgahooks.h
 -- 
-2.39.5
+2.43.0
 
diff --git a/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
index edc4315f..bff93e9d 100644
--- a/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
+++ b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
@@ -1,7 +1,7 @@
-From 55344b6c79b4c3a89558d1338169c920d1d49d18 Mon Sep 17 00:00:00 2001
+From ebd8293eb1af20c204beb3aa1394865185e2f3f0 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 6 Jan 2025 18:49:58 +0000
-Subject: [PATCH 3/3] Print the Libreboot version in the SeaBIOS menu
+Subject: [PATCH 1/1] Print the Libreboot version in the SeaBIOS menu
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/src/bootsplash.c b/src/bootsplash.c
-index 538b316d..f18d41c7 100644
+index 538b316d..8746098c 100644
 --- a/src/bootsplash.c
 +++ b/src/bootsplash.c
 @@ -48,7 +48,7 @@ enable_vga_console(void)
diff --git a/config/seabios/default/target.cfg b/config/seabios/default/target.cfg
index 92b906f2..9ff1db3e 100644
--- a/config/seabios/default/target.cfg
+++ b/config/seabios/default/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="default"
-rev="9029a010ec413e6c3c0eb52c29c252a5b9a9f774"
+rev="1602647f1be24fe63d11138d802e735c8e674e63"

From c073ee9d4fc4a631c16ff681bb62c29b952878ba Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 2 May 2025 02:18:19 +0100
Subject: [PATCH 1283/1549] Restore SeaBIOS 9029a010 update, but with AHCI fix

I fixed the AHCI bug, with a patch that I wrote. It works by
restoring the old SeaBIOS AHCI initialisation behaviour, whereby
the AHCI controller is enabled from its current state; the patch
that broke AHCI in coreboot (tested on ThinkPad T420), changed
AHCI initialisation behaviour so that the controller's state is
first reset, prior to enablement.

However, my patch also retains the new AHCI initialisation
behaviour, when a CSM is in use. The AHCI reset patch was done,
by the author, specifically for SeaBIOS in CSM mode, so it makes
sense to only change the behaviour conditionally according to that.

This reverts commit 8245f0b3211812ac818adadd6526b0b39c63f3f0.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...1-romfile-implement-a-generic-loader.patch | 12 ++--
 ...ionroms-implement-mxm-3.0-interrupts.patch |  6 +-
 ...ibreboot-version-in-the-SeaBIOS-menu.patch |  6 +-
 ...04-ahci-Only-reset-controller-on-CSM.patch | 63 +++++++++++++++++++
 config/seabios/default/target.cfg             |  2 +-
 5 files changed, 76 insertions(+), 13 deletions(-)
 create mode 100644 config/seabios/default/patches/0004-ahci-Only-reset-controller-on-CSM.patch

diff --git a/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch b/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
index 2c042776..dc1464bb 100644
--- a/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
+++ b/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
@@ -1,7 +1,7 @@
-From 2aff8adc1dcd1315877fdb4ac4ef5e649c5b7d11 Mon Sep 17 00:00:00 2001
+From 04e972e14191f3a480e569e972c195ba8eb53a30 Mon Sep 17 00:00:00 2001
 From: Riku Viitanen <riku.viitanen@protonmail.com>
 Date: Sat, 10 Feb 2024 21:23:33 +0200
-Subject: [PATCH 1/2] romfile: implement a generic loader
+Subject: [PATCH 1/4] romfile: implement a generic loader
 
 romfile_loadfile_g:
 Based on romfile_loadfile but more flexible. User has to supply pointer
@@ -18,7 +18,7 @@ Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
  2 files changed, 22 insertions(+), 5 deletions(-)
 
 diff --git a/src/romfile.c b/src/romfile.c
-index b598274edc09..8ccf5139ece8 100644
+index 8072a915..f4d5f82d 100644
 --- a/src/romfile.c
 +++ b/src/romfile.c
 @@ -47,10 +47,12 @@ romfile_find(const char *name)
@@ -69,7 +69,7 @@ index b598274edc09..8ccf5139ece8 100644
  }
  
 diff --git a/src/romfile.h b/src/romfile.h
-index 3e0f820047dd..1b967d86551f 100644
+index ae2f4ac7..f62b2fee 100644
 --- a/src/romfile.h
 +++ b/src/romfile.h
 @@ -13,6 +13,8 @@ struct romfile_s {
@@ -80,7 +80,7 @@ index 3e0f820047dd..1b967d86551f 100644
 +                         void *(*malloc_fn)(u32), int add_len);
  void *romfile_loadfile(const char *name, int *psize);
  u64 romfile_loadint(const char *name, u64 defval);
- 
+ u32 romfile_loadbool(const char *name, u32 defval);
 -- 
-2.43.0
+2.39.5
 
diff --git a/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch b/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch
index f05a34c2..5224d768 100644
--- a/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch
+++ b/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch
@@ -1,7 +1,7 @@
-From 1e7c443d069ef817c4e699bd6675efff4ebddb86 Mon Sep 17 00:00:00 2001
+From 270ac30b862c58c69455dbdace716044d29b20e2 Mon Sep 17 00:00:00 2001
 From: Riku Viitanen <riku.viitanen@protonmail.com>
 Date: Sat, 10 Feb 2024 21:38:17 +0200
-Subject: [PATCH 2/2] vgahooks, optionroms: implement mxm 3.0 interrupts
+Subject: [PATCH 2/4] vgahooks, optionroms: implement mxm 3.0 interrupts
 
 VGAROMs on MXM graphics cards need certain int15h functions present.
 
@@ -184,5 +184,5 @@ index 00000000..f0c203af
 +
 +#endif // vgahooks.h
 -- 
-2.43.0
+2.39.5
 
diff --git a/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
index bff93e9d..acde7f20 100644
--- a/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
+++ b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
@@ -1,7 +1,7 @@
-From ebd8293eb1af20c204beb3aa1394865185e2f3f0 Mon Sep 17 00:00:00 2001
+From cc6b13ddea9086586d34621d0b82d820af5ae785 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Mon, 6 Jan 2025 18:49:58 +0000
-Subject: [PATCH 1/1] Print the Libreboot version in the SeaBIOS menu
+Subject: [PATCH 3/4] Print the Libreboot version in the SeaBIOS menu
 
 Signed-off-by: Leah Rowe <leah@libreboot.org>
 ---
@@ -9,7 +9,7 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/src/bootsplash.c b/src/bootsplash.c
-index 538b316d..8746098c 100644
+index 538b316d..9eed0b12 100644
 --- a/src/bootsplash.c
 +++ b/src/bootsplash.c
 @@ -48,7 +48,7 @@ enable_vga_console(void)
diff --git a/config/seabios/default/patches/0004-ahci-Only-reset-controller-on-CSM.patch b/config/seabios/default/patches/0004-ahci-Only-reset-controller-on-CSM.patch
new file mode 100644
index 00000000..43f2b8a9
--- /dev/null
+++ b/config/seabios/default/patches/0004-ahci-Only-reset-controller-on-CSM.patch
@@ -0,0 +1,63 @@
+From 5fe2215bc5196d836b54e1e5fb00b63fa096fda7 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Thu, 1 May 2025 15:46:54 +0100
+Subject: [PATCH 4/4] ahci: Only reset controller on CSM
+
+Please refer to this commit:
+
+commit 8863cbbd15a73b03153553c562f5b1fb939ad4d7
+Author: Gerd Hoffmann <kraxel@redhat.com>
+Date:   Thu Feb 6 12:10:21 2025 +0100
+
+    ahci: add controller reset
+
+This commit broke AHCI init on the Lenovo ThinkPad T420,
+when tested with SeaBIOS as a coreboot payload.
+
+Since the above commit was made with CSMs in mind, to make
+the AHCI driver work there, that change has been re-worked
+so as to only apply when a CSM is in use.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/hw/ahci.c | 17 ++++++++++++++---
+ 1 file changed, 14 insertions(+), 3 deletions(-)
+
+diff --git a/src/hw/ahci.c b/src/hw/ahci.c
+index 2285d33d..b09b198a 100644
+--- a/src/hw/ahci.c
++++ b/src/hw/ahci.c
+@@ -637,7 +637,7 @@ static void
+ ahci_controller_setup(struct pci_device *pci)
+ {
+     struct ahci_port_s *port;
+-    u32 pnr, max;
++    u32 val, pnr, max;
+ 
+     if (create_bounce_buf() < 0)
+         return;
+@@ -660,8 +660,19 @@ ahci_controller_setup(struct pci_device *pci)
+ 
+     pci_enable_busmaster(pci);
+ 
+-    ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_RESET);
+-    ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_AHCI_EN);
++    /* AHCI controller reset, but only for CSM. Commit 8863cbbd
++       introduced this universally, to make AHCI drivers work in
++       CSM mode, but it broke AHCI setup on the ThinkPad T420 when
++       SeaBIOS is used as a coreboot payload, hence the else clause: */
++    if (CONFIG_CSM) {
++        /* Enable AHCI controller after resetting its state */
++        ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_RESET);
++        ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_AHCI_EN);
++    } else {
++        /* Enable AHCI controller from its current state */
++        val = ahci_ctrl_readl(ctrl, HOST_CTL);
++        ahci_ctrl_writel(ctrl, HOST_CTL, val | HOST_CTL_AHCI_EN);
++    }
+ 
+     ctrl->caps = ahci_ctrl_readl(ctrl, HOST_CAP);
+     ctrl->ports = ahci_ctrl_readl(ctrl, HOST_PORTS_IMPL);
+-- 
+2.39.5
+
diff --git a/config/seabios/default/target.cfg b/config/seabios/default/target.cfg
index 9ff1db3e..92b906f2 100644
--- a/config/seabios/default/target.cfg
+++ b/config/seabios/default/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="default"
-rev="1602647f1be24fe63d11138d802e735c8e674e63"
+rev="9029a010ec413e6c3c0eb52c29c252a5b9a9f774"

From 2ae565ba93a84add3dd891e31e894d61cd4be42b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 2 May 2025 05:54:36 +0100
Subject: [PATCH 1284/1549] init.sh: move setvars/err_ to lib.sh

these functions make more sense in lib.sh

i made mk link lib.sh first, so that the
functions on init.sh can still use them.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 21 ---------------------
 include/lib.sh  | 21 +++++++++++++++++++++
 mk              |  3 ++-
 3 files changed, 23 insertions(+), 22 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 1b8432ce..c06d937a 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -16,27 +16,6 @@ xbmkpath="$PATH"
 
 err="err_"
 
-setvars()
-{
-	_setvars=""
-	if [ $# -lt 2 ]; then
-		printf "\$err \"setvars: too few args\\n\""
-		return 0
-	fi
-	val="$1"
-	shift 1
-	for var in "$@"; do
-		_setvars="$var=\"$val\"; $_setvars"
-	done
-	printf "%s\n" "${_setvars% }"
-}
-
-err_()
-{
-	printf "ERROR %s: %s\n" "$0" "$1" 1>&2
-	exit 1
-}
-
 eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
     datadir version xbmkpwd relname xbmkpwd xbmktmp python pyver`"
 
diff --git a/include/lib.sh b/include/lib.sh
index 7a5f2621..853ad654 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -115,3 +115,24 @@ check_defconfig()
 		[ -f "$x" ] && printf "%s\n" "$x" && return 1
 	done; :
 }
+
+setvars()
+{
+	_setvars=""
+	if [ $# -lt 2 ]; then
+		printf "\$err \"setvars: too few args\\n\""
+		return 0
+	fi
+	val="$1"
+	shift 1
+	for var in "$@"; do
+		_setvars="$var=\"$val\"; $_setvars"
+	done
+	printf "%s\n" "${_setvars% }"
+}
+
+err_()
+{
+	printf "ERROR %s: %s\n" "$0" "$1" 1>&2
+	exit 1
+}
diff --git a/mk b/mk
index 7b4d69ae..0ae35b6d 100755
--- a/mk
+++ b/mk
@@ -12,8 +12,9 @@ if [ "./${0##*/}" != "${0}" ] || [ ! -f "mk" ] || [ -L "mk" ]; then
 	exit 1
 fi
 
-. "include/init.sh"
 . "include/lib.sh"
+
+. "include/init.sh"
 . "include/inject.sh"
 . "include/mrc.sh"
 

From 6c4d88f2686558ef910bed2ebcc024d0347076fd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 2 May 2025 07:24:11 +0100
Subject: [PATCH 1285/1549] move x_() to lib.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 5 -----
 include/lib.sh  | 5 +++++
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index c06d937a..b8839921 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -224,9 +224,4 @@ xbmk_child_exec()
 	exit $xbmk_rval
 }
 
-x_()
-{
-	[ $# -lt 1 ] || "$@" || $err "Unhandled error for: $(echo "$@")"; :
-}
-
 xbmk_init "$@"
diff --git a/include/lib.sh b/include/lib.sh
index 853ad654..f5007c7d 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -131,6 +131,11 @@ setvars()
 	printf "%s\n" "${_setvars% }"
 }
 
+x_()
+{
+	[ $# -lt 1 ] || "$@" || $err "Unhandled error for: $(echo "$@")"; :
+}
+
 err_()
 {
 	printf "ERROR %s: %s\n" "$0" "$1" 1>&2

From f3ae3dbbbe4f9c0ef6a1d68ed1faf7e9ca19f391 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 2 May 2025 07:26:17 +0100
Subject: [PATCH 1286/1549] lib.sh: simplify remkdir()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index f5007c7d..59676150 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -9,8 +9,8 @@ rmodtool="elf/cbfstool/default/rmodtool"
 
 remkdir()
 {
-	rm -Rf "$1" || $err "remkdir: !rm -Rf \"$1\""
-	mkdir -p "$1" || $err "remkdir: !mkdir -p \"$1\""
+	x_ rm -Rf "$1"
+	x_ mkdir -p "$1"
 }
 
 mkrom_tarball()

From 15b76bc202f91156b3cc8234ffac1d3901763309 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 2 May 2025 07:26:39 +0100
Subject: [PATCH 1287/1549] lib.sh: support multiple arguments in remkdir()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 59676150..87061f2b 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -9,8 +9,8 @@ rmodtool="elf/cbfstool/default/rmodtool"
 
 remkdir()
 {
-	x_ rm -Rf "$1"
-	x_ mkdir -p "$1"
+	x_ rm -Rf "$@"
+	x_ mkdir -p "$@"
 }
 
 mkrom_tarball()

From acb0ea202f2629c13edc278126f09b043037c8bc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 2 May 2025 10:52:38 +0100
Subject: [PATCH 1288/1549] lib.sh: Simplify rmgit()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 87061f2b..bef2a16f 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -39,11 +39,8 @@ mksha512sum()
 
 rmgit()
 {
-	(
-	cd "$1" || $err "!cd gitrepo $1"
-	find . -name ".git" -exec rm -Rf {} + || $err "!rm .git $1"
-	find . -name ".gitmodules" -exec rm -Rf {} + || $err "!rm .gitmod $1"
-	) || $err "Cannot remove .git/.gitmodules in $1"
+	x_ find "$1" -name ".git" -exec rm -Rf {} +
+	x_ find "$1" -name ".gitmodules" -exec rm -Rf {} +
 }
 
 # can grab from the internet, or copy locally.

From 1f7e4b35cb2e95c7bbf1e3d39b10189b26f8d6ed Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 2 May 2025 10:56:14 +0100
Subject: [PATCH 1289/1549] mk: Download vendorfiles before building release

Do it just after creating the src archive. This way,
everything is downloaded all at once.

Otherwise, a momentary lapse of internet uptime will
cause a release build to fail later on, and one of
lbmk's flaws is that this would then mean you must
re-build from scratch.

If we assume that the internet is working within a
short period of time, then this change would mitigate
that possibility. If something did happen during tar
archive creation, that's a much shorter amount of time
that is "wasted".

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 1 +
 1 file changed, 1 insertion(+)

diff --git a/mk b/mk
index 0ae35b6d..ec42d097 100755
--- a/mk
+++ b/mk
@@ -85,6 +85,7 @@ build_release()
 	touch "$srcdir/lock" || $err "can't make lock file in $srcdir/"
 	(
 	cd "$srcdir" || $err "$vdir: 2 !cd \"$srcdir\""
+	x_ ./mk -d coreboot
 	mk -b coreboot pico-serprog stm32-vserprog pcsx-redux
 	x_ mv bin ../roms
 	) || $err "can't build rom images"

From 9b11e93686c6b8298a1b4be912da339ac60ba65f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 2 May 2025 11:20:55 +0100
Subject: [PATCH 1290/1549] mk: include rom.sh directly

remove it from mkhelper files, because rom.sh doesn't
initialise any variables globally, except one that
never changes.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/coreboot/mkhelper.cfg       | 2 --
 config/data/grub/mkhelper.cfg           | 2 --
 config/data/pcsx-redux/mkhelper.cfg     | 2 --
 config/data/pico-serprog/mkhelper.cfg   | 2 --
 config/data/stm32-vserprog/mkhelper.cfg | 2 --
 mk                                      | 1 +
 6 files changed, 1 insertion(+), 10 deletions(-)

diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index 624d4ec2..c993fbd4 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -1,7 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-. "include/rom.sh"
-
 makeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 build_depend="seabios/default grub/default memtest86plus u-boot/amd64coreboot"
 
diff --git a/config/data/grub/mkhelper.cfg b/config/data/grub/mkhelper.cfg
index 5d66f42f..8c250f6b 100644
--- a/config/data/grub/mkhelper.cfg
+++ b/config/data/grub/mkhelper.cfg
@@ -1,7 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-. "include/rom.sh"
-
 bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
 autoconfargs="--with-platform=coreboot --disable-werror"
 makeargs="FS_PAYLOAD_MODULES=\"\""
diff --git a/config/data/pcsx-redux/mkhelper.cfg b/config/data/pcsx-redux/mkhelper.cfg
index af744685..6ad20de5 100644
--- a/config/data/pcsx-redux/mkhelper.cfg
+++ b/config/data/pcsx-redux/mkhelper.cfg
@@ -1,5 +1,3 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-. "include/rom.sh"
-
 postmake="copyps1bios"
diff --git a/config/data/pico-serprog/mkhelper.cfg b/config/data/pico-serprog/mkhelper.cfg
index ccfdc0df..8e902bda 100644
--- a/config/data/pico-serprog/mkhelper.cfg
+++ b/config/data/pico-serprog/mkhelper.cfg
@@ -1,7 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-. "include/rom.sh"
-
 sersrc="src/pico-serprog"
 serx="$sersrc/build/pico_serprog.uf2"
 picosdk="src/pico-sdk"
diff --git a/config/data/stm32-vserprog/mkhelper.cfg b/config/data/stm32-vserprog/mkhelper.cfg
index 54b05caf..907e890f 100644
--- a/config/data/stm32-vserprog/mkhelper.cfg
+++ b/config/data/stm32-vserprog/mkhelper.cfg
@@ -1,7 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-. "include/rom.sh"
-
 sersrc="src/stm32-vserprog"
 serx="$sersrc/stm32-vserprog.hex"
 serdir="$sersrc/boards"
diff --git a/mk b/mk
index ec42d097..6a46f93c 100755
--- a/mk
+++ b/mk
@@ -17,6 +17,7 @@ fi
 . "include/init.sh"
 . "include/inject.sh"
 . "include/mrc.sh"
+. "include/rom.sh"
 
 eval "`setvars "" vdir src_dirname srcdir mode`"
 

From 773d2deaca05cdee754ef4ec79bae9ddd1f3383c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 2 May 2025 17:05:56 +0100
Subject: [PATCH 1291/1549] NEW MAINBOARD: Dell Precision T1700 SFF and MT

This is similar to the 9020SFF, but this board has ECC support.
However, the native raminit isn't used here, even though it is
otherwise compatible, because the native init doesn't do ECC yet.

The broadwell mrc.bin has ECC support, which is also used on the
HP EliteBook 820 G2. The MRC for broadwell can be used on haswell
boards such as the T1700.

Add both the SFF and MT variants. Since these are identical to the
9020 variants, except for slightly different PCH enabling ECC, we
can just re-use the 9020 port without issue.

We *could* add a variant to coreboot, for T1700, but there is not
really any pressing need. It is simply the 9020sff/mt with mrc.bin

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../config/libgfxinit_corebootfb              | 691 ++++++++++++++++++
 .../config/libgfxinit_txtmode                 | 688 +++++++++++++++++
 config/coreboot/t1700mt_bmrc_12mb/target.cfg  |  12 +
 .../config/libgfxinit_corebootfb              | 691 ++++++++++++++++++
 .../config/libgfxinit_txtmode                 | 688 +++++++++++++++++
 config/coreboot/t1700sff_bmrc_12mb/target.cfg |  12 +
 config/vendor/t1700/pkg.cfg                   |   9 +
 include/inject.sh                             |   2 +
 include/mrc.sh                                |  57 +-
 9 files changed, 2825 insertions(+), 25 deletions(-)
 create mode 100644 config/coreboot/t1700mt_bmrc_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/t1700mt_bmrc_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/t1700mt_bmrc_12mb/target.cfg
 create mode 100644 config/coreboot/t1700sff_bmrc_12mb/config/libgfxinit_corebootfb
 create mode 100644 config/coreboot/t1700sff_bmrc_12mb/config/libgfxinit_txtmode
 create mode 100644 config/coreboot/t1700sff_bmrc_12mb/target.cfg
 create mode 100644 config/vendor/t1700/pkg.cfg

diff --git a/config/coreboot/t1700mt_bmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t1700mt_bmrc_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..969d2c0e
--- /dev/null
+++ b/config/coreboot/t1700mt_bmrc_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,691 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Precision T1700 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
+CONFIG_EHCI_BAR=0xd8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+CONFIG_USE_BROADWELL_MRC=y
+# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t1700mt_bmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t1700mt_bmrc_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..d16adf1e
--- /dev/null
+++ b/config/coreboot/t1700mt_bmrc_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,688 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Precision T1700 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
+CONFIG_EHCI_BAR=0xd8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+CONFIG_USE_BROADWELL_MRC=y
+# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t1700mt_bmrc_12mb/target.cfg b/config/coreboot/t1700mt_bmrc_12mb/target.cfg
new file mode 100644
index 00000000..06de408c
--- /dev/null
+++ b/config/coreboot/t1700mt_bmrc_12mb/target.cfg
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="t1700"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
diff --git a/config/coreboot/t1700sff_bmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t1700sff_bmrc_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..56f97e4c
--- /dev/null
+++ b/config/coreboot/t1700sff_bmrc_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,691 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Precision T1700 SFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
+CONFIG_EHCI_BAR=0xd8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+CONFIG_USE_BROADWELL_MRC=y
+# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t1700sff_bmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t1700sff_bmrc_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..84f97bde
--- /dev/null
+++ b/config/coreboot/t1700sff_bmrc_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,688 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MITAC_COMPUTING is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_NOVACUSTOM is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_TOPTON is not set
+# CONFIG_VENDOR_UP is not set
+# CONFIG_VENDOR_VIA is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="Precision T1700 SFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_9020"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x800000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF"
+# CONFIG_CONSOLE_POST is not set
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_DCACHE_RAM_BASE=0xff7c0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_ENABLE_DDR_2X_REFRESH is not set
+CONFIG_PCIEXP_AER=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000
+CONFIG_EHCI_BAR=0xd8000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_MRC=y
+CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_DISABLE_ME_PCI=y
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_HASWELL=y
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_CPU_PT_ROM_MAP_GB=512
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
+# CONFIG_USE_NATIVE_RAMINIT is not set
+CONFIG_USE_BROADWELL_MRC=y
+# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
+CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+# CONFIG_GOOGLE_PVMFW_CBMEM is not set
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_DRIVERS_OPTION_CFR is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_DDI=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Haswell"
+CONFIG_GFX_GMA_PCH="Lynx_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_EM100PRO_SPI_CONSOLE is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+
+#
+# Boot Logo Configuration
+#
+# CONFIG_BMP_LOGO is not set
+# end of Boot Logo Configuration
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/t1700sff_bmrc_12mb/target.cfg b/config/coreboot/t1700sff_bmrc_12mb/target.cfg
new file mode 100644
index 00000000..06de408c
--- /dev/null
+++ b/config/coreboot/t1700sff_bmrc_12mb/target.cfg
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="t1700"
+build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
+payload_uboot_amd64="y"
diff --git a/config/vendor/t1700/pkg.cfg b/config/vendor/t1700/pkg.cfg
new file mode 100644
index 00000000..cc100683
--- /dev/null
+++ b/config/vendor/t1700/pkg.cfg
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+
+DL_hash="f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe"
+DL_url_bkup="https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe"
+MRC_url="https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip"
+MRC_url_bkup="https://web.archive.org/web/20220310155922/https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip"
+MRC_hash="3ff1599c52539f0707a07a8664a84ce51cd3fed1569df4bb7aa6722fc8dec0af1754250333b6ca1a9794d970a4de7b29a5cf2499f5b61e4c3eab64d1314aaea9"
+MRC_board="samus"
diff --git a/include/inject.sh b/include/inject.sh
index 6b316729..e5282861 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -86,6 +86,8 @@ getfiles()
 	  "$E6400_VGA_DL_url_bkup" "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
 	[ -z "$CONFIG_HAVE_MRC" ] || fetch "mrc" "$MRC_url" "$MRC_url_bkup" \
 	    "$MRC_hash" "$CONFIG_MRC_FILE"
+	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && fetch "refcode" "$MRC_url" \
+	    "$MRC_url_bkup" "$MRC_hash" "$CONFIG_REFCODE_BLOB_FILE"
 	[ -z "$CONFIG_LENOVO_TBFW_BIN" ] || fetch "tbfw" "$TBFW_url" \
 	    "$TBFW_url_bkup" "$TBFW_hash" "$CONFIG_LENOVO_TBFW_BIN"
 	#
diff --git a/include/mrc.sh b/include/mrc.sh
index 6e00292b..eaf39dcb 100644
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -7,6 +7,37 @@
 eval "`setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL`"
 
 extract_mrc()
+{
+	extract_shellball
+
+	"$cbfstool" "$appdir/"bios.bin extract -n mrc.bin \
+	    -f "$_dest" -r RO_SECTION || $err "extract_mrc: !$cbfstool $_dest"
+
+	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && extract_refcode extra; :
+}
+
+extract_refcode()
+{
+	_refdest="${CONFIG_REFCODE_BLOB_FILE##*../}"
+	e "$_refdest" f && return 0
+
+	[ $# -lt 1 ] && extract_shellball
+
+	# cbfstool changed the attributes scheme for stage files,
+	# incompatible with older versions before coreboot 4.14,
+	# so we need coreboot 4.13 cbfstool for certain refcode files
+	chkvars cbfstoolref
+	mkdir -p "${_refdest%/*}" || $err "ref: !mkdir -p ${_refdest%/*}"
+
+	x_ "$cbfstoolref" "$appdir/bios.bin" extract \
+	    -m x86 -n fallback/refcode -f "$_refdest" -r RO_SECTION
+
+	# enable the Intel GbE device, if told by offset MRC_refcode_gbe
+	[ -z "$MRC_refcode_gbe" ] || x_ dd if="config/ifd/hp820g2/1.bin" \
+	    of="$_refdest" bs=1 seek=$MRC_refcode_gbe count=1 conv=notrunc; :
+}
+
+extract_shellball()
 {
 	chkvars "MRC_board" "CONFIG_MRC_FILE"
 	SHELLBALL="chromeos-firmwareupdate-$MRC_board"
@@ -15,12 +46,7 @@ extract_mrc()
 	x_ cd "$appdir"
 	extract_partition "${MRC_url##*/}"
 	extract_archive "$SHELLBALL" .
-	) || $err "mrc download/extract failure"
-
-	"$cbfstool" "$appdir/"bios.bin extract -n mrc.bin \
-	    -f "$_dest" -r RO_SECTION || $err "extract_mrc: !$cbfstool $_dest"
-
-	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && extract_refcode; :
+	) || $err "mrc download/extract failure"; :
 }
 
 extract_partition()
@@ -38,22 +64,3 @@ extract_partition()
 	printf "cd /usr/sbin\ndump chromeos-firmwareupdate %s\nquit" \
 	    "$SHELLBALL" | debugfs "root-a.ext2" || $err "!extract shellball"
 }
-
-extract_refcode()
-{
-	_refdest="${CONFIG_REFCODE_BLOB_FILE##*../}"
-	e "$_refdest" f && return 0
-
-	# cbfstool changed the attributes scheme for stage files,
-	# incompatible with older versions before coreboot 4.14,
-	# so we need coreboot 4.13 cbfstool for certain refcode files
-	chkvars cbfstoolref
-	mkdir -p "${_refdest%/*}" || $err "ref: !mkdir -p ${_refdest%/*}"
-
-	x_ "$cbfstoolref" "$appdir/bios.bin" extract \
-	    -m x86 -n fallback/refcode -f "$_refdest" -r RO_SECTION
-
-	# enable the Intel GbE device, if told by offset MRC_refcode_gbe
-	[ -z "$MRC_refcode_gbe" ] || x_ dd if="config/ifd/hp820g2/1.bin" \
-	    of="$_refdest" bs=1 seek=$MRC_refcode_gbe count=1 conv=notrunc; :
-}

From d18d1c2cae2c1c43c56d5c10adb469266d1eb08b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 04:16:10 +0100
Subject: [PATCH 1292/1549] lbmk: unified execution on find commands

We have a lot of places in lbmk where the output of find is
used, and then some function is executed on the result.

This is messy, and bloats several of these functions.

Now this is unified, into a new function: fx_

What fx_ does is execute a given function, for each result
found, with the arguments for a find command appended.

For example:

find -name ".git"

If you wanted to do: foo "$arg"

Where "arg" is a search result from find, and you wanted
to execute "foo" on each one, you would do:

fx_ foo -name ".git"

The find utility does have an -exec feature, but I've found
that it only works for executables, not functions.

fx_ does not return errors, so "foo" in this example
would have to do its own error handling.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 43 ++++++++++++++++++-------------------------
 include/lib.sh    | 11 +++++++++++
 mk                | 23 +++++++++--------------
 3 files changed, 38 insertions(+), 39 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index e5282861..0886adc8 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -282,19 +282,18 @@ extract_tbfw()
 {
 	chkvars TBFW_size # size in bytes, matching TBFW's flash IC
 	x_ mkdir -p tmp
-	x_ rm -f tmp/tb.bin
-	find "$appdir" -type f -name "TBT.bin" > "tmp/tb.txt" || \
-	    $err "extract_tbfw $_dest: Can't extract TBT.bin - $dontflash"
-	while read -r f; do
-		[ -f "$f" ] || continue
-		[ -L "$f" ] && continue
-		x_ cp "$f" "tmp/tb.bin"
-		break
-	done < "tmp/tb.txt"
+
+	x_ rm -f tmp/tb.bin && fx_ copy_tbfw "$appdir" -type f -name "TBT.bin"
+
 	x_ dd if=/dev/null of=tmp/tb.bin bs=1 seek=$TBFW_size
 	x_ cp "tmp/tb.bin" "$_dest"
 }
 
+copy_tbfw()
+{
+	[ -f "$1" ] && [ ! -L "$1" ] && x_ cp "$1" "tmp/tb.bin" && return 1; :
+}
+
 extract_fspm()
 {
 	copy_fsp M; :
@@ -419,16 +418,10 @@ patch_release_roms()
 		    hashfile="$_hashes" && break; :
 	done
 
-	x_ mkdir -p "tmp" && [ -L "tmp/rom.list" ] && \
-	    $err "'$archive' -> tmp/rom.list is a symlink - $dontflash"
-
-	find "$tmpromdir" -maxdepth 1 -type f -name "*.rom" > "tmp/rom.list" \
-	    || $err "'$archive' -> Can't make tmp/rom.list - $dontflash"
+	x_ mkdir -p "tmp"
 
 	if readkconfig; then
-		while read -r _xrom ; do
-			process_release_rom "$_xrom" || break
-		done < "tmp/rom.list"
+		fx_ prep_rom "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 		[ "$nukemode" != "nuke" ] || \
 			printf "Make sure you inserted vendor files: %s\n" \
 			    "$vguide" > "$tmpromdir/README.md" || :
@@ -462,7 +455,7 @@ patch_release_roms()
 	    "$archive" || $err "'$archive' -> Can't overwrite - $dontflash"; :
 }
 
-process_release_rom()
+prep_rom()
 {
 	_xrom="$1"
 	_xromname="${1##*/}"
@@ -578,13 +571,7 @@ modify_mac()
 	[ "$new_mac" != "restore" ] && x_ make -C util/nvmutil && \
 	    x_ "$nvm" tmp/gbe setmac "$new_mac"
 
-	find "$tmpromdir" -maxdepth 1 -type f -name "*.rom" > "tmp/rom.list" \
-	    || $err "'$archive' -> Can't make tmp/rom.list - $dontflash"
-
-	while read -r _xrom; do
-		e "$_xrom" f && xchanged="y" && x_ \
-		    "$ifdtool" $ifdprefix -i GbE:tmp/gbe "$_xrom" -O "$_xrom"
-	done < "tmp/rom.list"
+	fx_ newmac "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 
 	printf "\nGbE NVM written to '%s':\n" "$archive"
 	x_ "$nvm" tmp/gbe dump | grep -v "bytes read from file" || :
@@ -593,3 +580,9 @@ modify_mac()
 		printf "\nDefault GbE file '%s' written, unmodified.\n" \
 		    "${CONFIG_GBE_BIN_PATH##*../}"; :
 }
+
+newmac()
+{
+	e "$1" f && xchanged="y" && x_ \
+	    "$ifdtool" $ifdprefix -i GbE:tmp/gbe "$1" -O "$1"; :
+}
diff --git a/include/lib.sh b/include/lib.sh
index bef2a16f..507a37c1 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -128,6 +128,17 @@ setvars()
 	printf "%s\n" "${_setvars% }"
 }
 
+fx_()
+{
+	fd="`mktemp`"
+	xx="$1" && shift 1
+	find "$@" | sort > "$fd" || $err "!find $(echo "$@") > \"$fd\""
+	while read -r fx; do
+		"$xx" "$fx" || break; :
+	done < "$fd"
+	x_ rm -f "$fd"
+}
+
 x_()
 {
 	[ $# -lt 1 ] || "$@" || $err "Unhandled error for: $(echo "$@")"; :
diff --git a/mk b/mk
index 6a46f93c..8884d61e 100755
--- a/mk
+++ b/mk
@@ -278,20 +278,9 @@ check_project_hashes()
 	[ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
 	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
 
-	x_ rm -f "$xbmktmp/project.list" "$xbmktmp/project.hash" \
-	    "$xbmktmp/project.tmp"
-	x_ touch "$xbmktmp/project.tmp" "$xbmktmp/project.hash"
-
-	for rmchk in "$datadir" "$configdir/$tree" "$mdir"; do
-		[ ! -d "$rmchk" ] || find "$rmchk" -type f -not -path \
-		    "*/.git*/*" >> "$xbmktmp/project.tmp" || $err "!fh $rmchk"
-	done
-	sort "$xbmktmp/project.tmp" > "$xbmktmp/project.list" || $err "!pj srt"
-
-	while read -r rmchk; do
-		[ ! -f "$rmchk" ] || x_ sha512sum "$rmchk" | awk \
-		    '{print $1}' >> "$xbmktmp/project.hash" || $err "!h $rmchk"
-	done < "$xbmktmp/project.list"
+	x_ rm -f "$xbmktmp/project.hash"
+	fx_ create_project_hash "$datadir" "$configdir/$tree" "$mdir" \
+	    -type f -not -path "*/.git*/*"
 
 	pjhash="$(sha512sum "$xbmktmp/project.hash" | awk '{print $1}')" || :
 	[ "$pjhash" != "$old_pjhash" ] && badhash="y"
@@ -304,6 +293,12 @@ check_project_hashes()
 	    "elf/$project/$tree" "elf/$project/$target"; :
 }
 
+create_project_hash()
+{
+	[ ! -f "$1" ] || x_ sha512sum "$1" | awk \
+	    '{print $1}' >> "$xbmktmp/project.hash" || $err "!h $1"; :
+}
+
 check_cross_compiler()
 {
 	xgccargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"

From 47762c84ad0f5e2a6fbe5ceec0bff623239e1e9a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 05:25:11 +0100
Subject: [PATCH 1293/1549] lib.sh: add fe_ which is fx_ but err on find

In the mk script, we need fx_ to not return errors on the
find command, since it's searching a bunch of directories
where some of them may not exist.

All other instances where fx_ is used, must return an error
if the directory being searched doesn't exist.

For this, fe_() is introduced, which does the same as fx_
but with this much stricter check.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh |  6 +++---
 include/lib.sh    | 13 ++++++++++++-
 2 files changed, 15 insertions(+), 4 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 0886adc8..2e821d86 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -283,7 +283,7 @@ extract_tbfw()
 	chkvars TBFW_size # size in bytes, matching TBFW's flash IC
 	x_ mkdir -p tmp
 
-	x_ rm -f tmp/tb.bin && fx_ copy_tbfw "$appdir" -type f -name "TBT.bin"
+	x_ rm -f tmp/tb.bin && fe_ copy_tbfw "$appdir" -type f -name "TBT.bin"
 
 	x_ dd if=/dev/null of=tmp/tb.bin bs=1 seek=$TBFW_size
 	x_ cp "tmp/tb.bin" "$_dest"
@@ -421,7 +421,7 @@ patch_release_roms()
 	x_ mkdir -p "tmp"
 
 	if readkconfig; then
-		fx_ prep_rom "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
+		fe_ prep_rom "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 		[ "$nukemode" != "nuke" ] || \
 			printf "Make sure you inserted vendor files: %s\n" \
 			    "$vguide" > "$tmpromdir/README.md" || :
@@ -571,7 +571,7 @@ modify_mac()
 	[ "$new_mac" != "restore" ] && x_ make -C util/nvmutil && \
 	    x_ "$nvm" tmp/gbe setmac "$new_mac"
 
-	fx_ newmac "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
+	fe_ newmac "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 
 	printf "\nGbE NVM written to '%s':\n" "$archive"
 	x_ "$nvm" tmp/gbe dump | grep -v "bytes read from file" || :
diff --git a/include/lib.sh b/include/lib.sh
index 507a37c1..3f5e5d37 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -128,11 +128,22 @@ setvars()
 	printf "%s\n" "${_setvars% }"
 }
 
+fe_()
+{
+	find_ex "x_" "$@"
+}
+
 fx_()
 {
+	find_ex "" "$@"
+}
+
+find_ex()
+{
+	errx="$1" && shift 1
 	fd="`mktemp`"
 	xx="$1" && shift 1
-	find "$@" | sort > "$fd" || $err "!find $(echo "$@") > \"$fd\""
+	$errx find "$@" | sort > "$fd" || $err "!find $(echo "$@") > \"$fd\""
 	while read -r fx; do
 		"$xx" "$fx" || break; :
 	done < "$fd"

From fcc52b986e7612d8bb53e9b51f305c62f611a35b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 05:32:01 +0100
Subject: [PATCH 1294/1549] init.sh: unified handling of ./tmp

not to be confused with /tmp

we use ./tmp inside the lbmk work directory, for large files,
because /tmp might not be very big, or might be a tmpfs

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh   | 6 +++++-
 include/inject.sh | 8 +-------
 2 files changed, 6 insertions(+), 8 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index b8839921..9e0e3a37 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -194,6 +194,10 @@ xbmk_create_tmpdir()
 	export TMPDIR="/tmp"
 	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
 	xbmktmp="$TMPDIR"
+
+	# /tmp might be a tmpfs, so for large files we use ./tmp,
+	# not to be confused with xbmktmp (xbmktmp points to /tmp)
+	x_ mkdir -p tmp
 }
 
 xbmk_lock()
@@ -219,7 +223,7 @@ xbmk_child_exec()
 {
 	xbmk_rval=0
 	( x_ ./mk "$@" ) || xbmk_rval=1
-	rm -Rf "$xbmktmp" || xbmk_rval=1
+	rm -Rf tmp "$xbmktmp" || xbmk_rval=1
 	rm -f lock || xbmk_rval=1
 	exit $xbmk_rval
 }
diff --git a/include/inject.sh b/include/inject.sh
index 2e821d86..26bcd02f 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -148,8 +148,6 @@ extract_intel_me()
 	    chkvars ME11delta ME11version ME11sku ME11pch
 	[ "$ME11bootguard" = "y" ] && x_ ./mk -f deguard
 
-	x_ mkdir -p tmp
-
 	extract_intel_me_bruteforce
 	if [ "$ME11bootguard" = "y" ]; then
 		apply_me11_deguard_mod
@@ -281,7 +279,6 @@ extract_sch5545ec()
 extract_tbfw()
 {
 	chkvars TBFW_size # size in bytes, matching TBFW's flash IC
-	x_ mkdir -p tmp
 
 	x_ rm -f tmp/tb.bin && fe_ copy_tbfw "$appdir" -type f -name "TBT.bin"
 
@@ -418,8 +415,6 @@ patch_release_roms()
 		    hashfile="$_hashes" && break; :
 	done
 
-	x_ mkdir -p "tmp"
-
 	if readkconfig; then
 		fe_ prep_rom "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 		[ "$nukemode" != "nuke" ] || \
@@ -551,7 +546,6 @@ insert()
 	elif [ "$nukemode" = "nuke" ]; then
 		x_ "$cbfstool" "$rom" remove -n "$cbfsname"
 	elif [ "$_t" = "stage" ]; then # the only stage we handle is refcode
-		x_ mkdir -p tmp
 		x_ rm -f "tmp/refcode"
 		"$rmodtool" -i "$_dest" -o "tmp/refcode" || "!reloc refcode"
 		"$cbfstool" "$rom" add-stage -f "tmp/refcode" -n "$cbfsname" \
@@ -567,7 +561,7 @@ modify_mac()
 {
 	[ -n "$CONFIG_GBE_BIN_PATH" ] || return 1
 
-	x_ mkdir -p tmp && x_ cp "${CONFIG_GBE_BIN_PATH##*../}" tmp/gbe
+	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" tmp/gbe
 	[ "$new_mac" != "restore" ] && x_ make -C util/nvmutil && \
 	    x_ "$nvm" tmp/gbe setmac "$new_mac"
 

From 0ffaf5c7331ae0fac9db8cf8a2b670e156fad7e9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 05:33:02 +0100
Subject: [PATCH 1295/1549] init.sh: Explicitly create the xbmktmp directory

mktemp would normally do it, but we must not rely on that

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/init.sh b/include/init.sh
index 9e0e3a37..c40894a1 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -197,7 +197,7 @@ xbmk_create_tmpdir()
 
 	# /tmp might be a tmpfs, so for large files we use ./tmp,
 	# not to be confused with xbmktmp (xbmktmp points to /tmp)
-	x_ mkdir -p tmp
+	x_ mkdir -p "$xbmktmp" tmp
 }
 
 xbmk_lock()

From a17875c34593cf966e61aacb9285f324723bb245 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 05:57:39 +0100
Subject: [PATCH 1296/1549] lib.sh find_ex: explicitly create the tmp file

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 3f5e5d37..8bad16ce 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -141,7 +141,7 @@ fx_()
 find_ex()
 {
 	errx="$1" && shift 1
-	fd="`mktemp`"
+	fd="`mktemp`" && x_ rm -f "$fd" && x_ touch rm -f "$fd"
 	xx="$1" && shift 1
 	$errx find "$@" | sort > "$fd" || $err "!find $(echo "$@") > \"$fd\""
 	while read -r fx; do

From 44a1cc9ef85626a0d45c7b838a3637ec9f316540 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 06:23:10 +0100
Subject: [PATCH 1297/1549] util/nvmutil:  use x, not ?, for random characters

A user reported that '?' causes an error on zsh. See:

https://codeberg.org/libreboot/lbmk/issues/261

For example:

./mk inject libreboot-XXXXXX.tar.xz setmac ??:??:??:??:??:??

The user got:

 zsh: no matches found: ??:??:??:??:??:??

The mitigation here is to double-quote, e.g.:

./mk inject libreboot-XXXXXX.tar.xz setmac "??:??:??:??:??:??"

However, a lot of people won't do that. Therefore, I will
retain the current behaviour but support x/X for randomness.

Now lbmk uses x by default, instead. I will now update the
documentation, accordingly.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh      |  2 +-
 util/nvmutil/nvmutil.c | 12 +++++++++---
 2 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 26bcd02f..beaebf4d 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -328,7 +328,7 @@ inject()
 	eval "`setvars "" nukemode new_mac xchanged`"
 
 	archive="$1";
-	new_mac="??:??:??:??:??:??"
+	new_mac="xx:xx:xx:xx:xx:xx"
 
 	[ $# -gt 1 ] && case "$2" in
 	nuke)
diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c
index 12aabe4d..05459bb7 100644
--- a/util/nvmutil/nvmutil.c
+++ b/util/nvmutil/nvmutil.c
@@ -40,7 +40,7 @@ size_t partsize, gbe[2];
 uint8_t nvmPartChanged[2] = {0, 0}, do_read[2] = {1, 1};
 int flags, rfd, fd, part;
 
-const char *strMac = NULL, *strRMac = "??:??:??:??:??:??", *filename = NULL;
+const char *strMac = NULL, *strRMac = "xx:xx:xx:xx:xx:xx", *filename = NULL;
 
 typedef struct op {
 	char *str;
@@ -278,8 +278,11 @@ parseMacString(const char *strMac, uint16_t *mac)
 				err(errno = EINVAL, "Invalid character '%c'",
 				    strMac[i + nib]);
 
+			/* If random, ensure that local/unicast bits are set */
 			if ((byte == 0) && (nib == 1))
-				if (strMac[i + nib] == '?') /* ?=random */
+				if ((strMac[i + nib] == '?') ||
+				    (strMac[i + nib] == 'x') ||
+				    (strMac[i + nib] == 'X')) /* random */
 					h = (h & 0xE) | 2; /* local, unicast */
 
 			mac[byte >> 1] |= ((uint16_t ) h)
@@ -302,7 +305,10 @@ hextonum(char ch)
 		return ch - 'A' + 10;
 	else if ((ch >= 'a') && (ch <= 'f'))
 		return ch - 'a' + 10;
-	return (ch == '?') ? rhex() : 16;
+	else if ((ch == '?') || (ch == 'x') || (ch == 'X'))
+		return rhex(); /* random hex value */
+	else
+		return 16; /* error: invalid character */
 }
 
 uint8_t

From 308df9ca4061e66ca1bdfb4c5c23cc4153d3ce31 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 06:28:14 +0100
Subject: [PATCH 1298/1549] inject.sh: always re-build nvmutil

it's not a lot of code, and takes less than a second.

the previous change uses x instead of ?, but this would
cause an error if the nvmutil was already built, because
the makefile might cause a build to be skipped.

therefore, force a re-build to mitigate the error.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/inject.sh b/include/inject.sh
index beaebf4d..8fb0a34e 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -562,7 +562,8 @@ modify_mac()
 	[ -n "$CONFIG_GBE_BIN_PATH" ] || return 1
 
 	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" tmp/gbe
-	[ "$new_mac" != "restore" ] && x_ make -C util/nvmutil && \
+	[ "$new_mac" != "restore" ] && x_ make -C util/nvmutil clean && \
+	    x_ make -C util/nvmutil && \
 	    x_ "$nvm" tmp/gbe setmac "$new_mac"
 
 	fe_ newmac "$tmpromdir" -maxdepth 1 -type f -name "*.rom"

From 0b09d970732cb396f1868c41ee9842b4a96f0c36 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 06:35:48 +0100
Subject: [PATCH 1299/1549] inject.sh: Only build nvmutil once

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 8fb0a34e..0aefc210 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -341,6 +341,11 @@ inject()
 	esac
 	[ "$new_mac" = "keep" ] && new_mac=""
 
+	if [ -n "$new_mac" ] && [ "$new_mac" != "restore" ]; then
+		x_ make -C util/nvmutil clean
+		x_ make -C util/nvmutil
+	fi
+
 	check_release "$archive" || $err "'$archive' is not a release archive"
 
 	readcfg && need_files="y"
@@ -562,8 +567,7 @@ modify_mac()
 	[ -n "$CONFIG_GBE_BIN_PATH" ] || return 1
 
 	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" tmp/gbe
-	[ "$new_mac" != "restore" ] && x_ make -C util/nvmutil clean && \
-	    x_ make -C util/nvmutil && \
+	[ -n "$new_mac" ] && [ "$new_mac" != "restore" ] && \
 	    x_ "$nvm" tmp/gbe setmac "$new_mac"
 
 	fe_ newmac "$tmpromdir" -maxdepth 1 -type f -name "*.rom"

From 7fadb17fd9ed7e916f62849132d73648ea9a099d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 06:36:43 +0100
Subject: [PATCH 1300/1549] lib.sh: Fix bad touch command

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 8bad16ce..3c603bae 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -141,7 +141,7 @@ fx_()
 find_ex()
 {
 	errx="$1" && shift 1
-	fd="`mktemp`" && x_ rm -f "$fd" && x_ touch rm -f "$fd"
+	fd="`mktemp`" && x_ rm -f "$fd" && x_ touch "$fd"
 	xx="$1" && shift 1
 	$errx find "$@" | sort > "$fd" || $err "!find $(echo "$@") > \"$fd\""
 	while read -r fx; do

From 0f7b3691abafdbb46ea8e7bc95332da9d4be80d2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 06:41:20 +0100
Subject: [PATCH 1301/1549] lib.sh: redirect find errors to /dev/null

this silences confusing error messages that the user
sees on the screen, that are actually benign, and it
will thus reduce the number of people who ask questions
on #libreboot irc

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 3c603bae..d58716c3 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -143,7 +143,8 @@ find_ex()
 	errx="$1" && shift 1
 	fd="`mktemp`" && x_ rm -f "$fd" && x_ touch "$fd"
 	xx="$1" && shift 1
-	$errx find "$@" | sort > "$fd" || $err "!find $(echo "$@") > \"$fd\""
+	$errx find "$@" 2>/dev/null | sort > "$fd" || \
+	    $err "!find $(echo "$@") > \"$fd\""
 	while read -r fx; do
 		"$xx" "$fx" || break; :
 	done < "$fd"

From 00d22f20829251f55cd2e859d6fae9a61220c072 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 06:53:25 +0100
Subject: [PATCH 1302/1549] lbmk: Unified local ./tmp handling

Make it an absolute directory, relative to xbmktmp.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh    |  2 +-
 include/init.sh   |  8 +++++---
 include/inject.sh | 32 +++++++++++++++++---------------
 mk                |  1 -
 4 files changed, 23 insertions(+), 20 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 9be79527..37f5bbae 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -5,7 +5,7 @@
 eval "`setvars "" loc url bkup_url subfile subhash subrepo subrepo_bkup \
     depend subfile_bkup repofail`"
 
-tmpgit="$xbmkpwd/tmp/gitclone"
+tmpgit="$xbmklocal/gitclone"
 
 fetch_targets()
 {
diff --git a/include/init.sh b/include/init.sh
index c40894a1..a5180d07 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -17,11 +17,13 @@ xbmkpath="$PATH"
 err="err_"
 
 eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
-    datadir version xbmkpwd relname xbmkpwd xbmktmp python pyver`"
+    datadir version xbmkpwd relname xbmkpwd xbmktmp python pyver xbmklocal`"
 
 xbmk_init()
 {
 	xbmkpwd="`pwd`" || $err "Cannot generate PWD"
+	xbmklocal="$xbmkpwd/tmp"
+
 	export PWD="$xbmkpwd"
 
 	if [ $# -gt 0 ] && [ "$1" = "dependencies" ]; then
@@ -197,7 +199,7 @@ xbmk_create_tmpdir()
 
 	# /tmp might be a tmpfs, so for large files we use ./tmp,
 	# not to be confused with xbmktmp (xbmktmp points to /tmp)
-	x_ mkdir -p "$xbmktmp" tmp
+	x_ mkdir -p "$xbmktmp" "$xbmklocal"
 }
 
 xbmk_lock()
@@ -223,7 +225,7 @@ xbmk_child_exec()
 {
 	xbmk_rval=0
 	( x_ ./mk "$@" ) || xbmk_rval=1
-	rm -Rf tmp "$xbmktmp" || xbmk_rval=1
+	rm -Rf "$xbmklocal" "$xbmktmp" || xbmk_rval=1
 	rm -f lock || xbmk_rval=1
 	exit $xbmk_rval
 }
diff --git a/include/inject.sh b/include/inject.sh
index 0aefc210..805415ef 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -14,7 +14,7 @@ hashfiles="vendorhashes blobhashes" # blobhashes for backwards compatibility
 dontflash="!!! AN ERROR OCCURED! Please DO NOT flash if injection failed. !!!"
 vfix="DO_NOT_FLASH_YET._FIRST,_INJECT_FILES_VIA_INSTRUCTIONS_ON_LIBREBOOT.ORG_"
 vguide="https://libreboot.org/docs/install/ivy_has_common.html"
-tmpromdel="$xbmkpwd/tmp/DO_NOT_FLASH"
+tmpromdel="$xbmklocal/DO_NOT_FLASH"
 nvm="util/nvmutil/nvm"
 ifdtool="elf/ifdtool/default/ifdtool"
 
@@ -142,7 +142,7 @@ extract_intel_me()
 
 	cdir="$xbmkpwd/$appdir"
 	_me="$xbmkpwd/$_dest"
-	_metmp="$xbmkpwd/tmp/me.bin"
+	_metmp="$xbmklocal/me.bin"
 
 	mfs="" && [ "$ME11bootguard" = "y" ] && mfs="--whitelist MFS" && \
 	    chkvars ME11delta ME11version ME11sku ME11pch
@@ -280,15 +280,17 @@ extract_tbfw()
 {
 	chkvars TBFW_size # size in bytes, matching TBFW's flash IC
 
-	x_ rm -f tmp/tb.bin && fe_ copy_tbfw "$appdir" -type f -name "TBT.bin"
+	tbtmp="$xbmklocal/tb.bin"
+	x_ rm -f "$tbtmp" && fe_ copy_tbfw "$appdir" -type f -name "TBT.bin"
 
-	x_ dd if=/dev/null of=tmp/tb.bin bs=1 seek=$TBFW_size
-	x_ cp "tmp/tb.bin" "$_dest"
+	x_ dd if=/dev/null of="$tbtmp" bs=1 seek=$TBFW_size
+	x_ cp "$tbtmp" "$_dest"
 }
 
 copy_tbfw()
 {
-	[ -f "$1" ] && [ ! -L "$1" ] && x_ cp "$1" "tmp/tb.bin" && return 1; :
+	[ -f "$1" ] && [ ! -L "$1" ] && x_ cp "$1" "$xbmklocal/tb.bin" && \
+	    return 1; :
 }
 
 extract_fspm()
@@ -409,7 +411,7 @@ readcfg()
 patch_release_roms()
 {
 	has_hashes="n"
-	tmpromdir="tmp/DO_NOT_FLASH/bin/$board"
+	tmpromdir="$xbmklocal/DO_NOT_FLASH/bin/$board"
 
 	remkdir "${tmpromdir%"/bin/$board"}"
 	x_ tar -xf "$archive" -C "${tmpromdir%"/bin/$board"}"
@@ -551,10 +553,10 @@ insert()
 	elif [ "$nukemode" = "nuke" ]; then
 		x_ "$cbfstool" "$rom" remove -n "$cbfsname"
 	elif [ "$_t" = "stage" ]; then # the only stage we handle is refcode
-		x_ rm -f "tmp/refcode"
-		"$rmodtool" -i "$_dest" -o "tmp/refcode" || "!reloc refcode"
-		"$cbfstool" "$rom" add-stage -f "tmp/refcode" -n "$cbfsname" \
-		    -t stage || $err "$rom: !add ref"
+		x_ rm -f "$xbmklocal/refcode"
+		"$rmodtool" -i "$_dest" -o "$xbmklocal/refcode" || "!reloc ref"
+		"$cbfstool" "$rom" add-stage -f "$xbmklocal/refcode" \
+		    -n "$cbfsname" -t stage || $err "$rom: !add ref"
 	else
 		"$cbfstool" "$rom" add -f "$_dest" -n "$cbfsname" \
 		    -t $_t $_offset || $err "$rom !add $_t ($_dest)"
@@ -566,14 +568,14 @@ modify_mac()
 {
 	[ -n "$CONFIG_GBE_BIN_PATH" ] || return 1
 
-	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" tmp/gbe
+	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "$xbmklocal/gbe"
 	[ -n "$new_mac" ] && [ "$new_mac" != "restore" ] && \
-	    x_ "$nvm" tmp/gbe setmac "$new_mac"
+	    x_ "$nvm" "$xbmklocal/gbe" setmac "$new_mac"
 
 	fe_ newmac "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 
 	printf "\nGbE NVM written to '%s':\n" "$archive"
-	x_ "$nvm" tmp/gbe dump | grep -v "bytes read from file" || :
+	x_ "$nvm" "$xbmklocal/gbe" dump | grep -v "bytes read from file" || :
 
 	[ "$new_mac" = "restore" ] && \
 		printf "\nDefault GbE file '%s' written, unmodified.\n" \
@@ -583,5 +585,5 @@ modify_mac()
 newmac()
 {
 	e "$1" f && xchanged="y" && x_ \
-	    "$ifdtool" $ifdprefix -i GbE:tmp/gbe "$1" -O "$1"; :
+	    "$ifdtool" $ifdprefix -i GbE:"$xbmklocal/gbe" "$1" -O "$1"; :
 }
diff --git a/mk b/mk
index 8884d61e..312ffce3 100755
--- a/mk
+++ b/mk
@@ -68,7 +68,6 @@ build_release()
 	cd "$srcdir" || $err "$vdir: !cd \"$srcdir\""
 
 	./mk -f
-	x_ rm -Rf tmp
 	rmgit .
 	x_ mv src/docs docs
 	) || $err "can't create release files"

From 498f5a26cc82db8063c37876058091e1b1279d45 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 07:04:34 +0100
Subject: [PATCH 1303/1549] init.sh: Always create xbmklocal

If we're in a release work directory, TMPDIR is already
set, so the local ./tmp won't be created, which would
lead to an error.

Fix it by creating xbmklocal before checking TMPDIR.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/init.sh b/include/init.sh
index a5180d07..c4650576 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -186,6 +186,8 @@ xbmk_git_init()
 
 xbmk_create_tmpdir()
 {
+	x_ mkdir -p "$xbmklocal"
+
 	# unify all temporary files/directories in a single TMPDIR
 	[ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || \
 	    unset TMPDIR

From 530e4109a2b4ad2d26c3e29eda652e2ab180cf84 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 07:05:38 +0100
Subject: [PATCH 1304/1549] init.sh: *Re-create* tmpdirs on parent instance

To make sure any old files are removed, always re-create.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/init.sh b/include/init.sh
index c4650576..3f813ea7 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -201,7 +201,7 @@ xbmk_create_tmpdir()
 
 	# /tmp might be a tmpfs, so for large files we use ./tmp,
 	# not to be confused with xbmktmp (xbmktmp points to /tmp)
-	x_ mkdir -p "$xbmktmp" "$xbmklocal"
+	remkdir "$xbmktmp" "$xbmklocal"
 }
 
 xbmk_lock()

From 8de0ed811fb9bc48659f95918a36317f24be3d8e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 07:17:21 +0100
Subject: [PATCH 1305/1549] inject.sh: Stricter TBFW handling

Don't copy it until it has been padded properly.

Otherwise, erroneous padding would result in an error,
and who knows what would be left in vendorfiles/ ?

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 22 +++++++++++++---------
 1 file changed, 13 insertions(+), 9 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 805415ef..c5e41f6d 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -278,19 +278,23 @@ extract_sch5545ec()
 # https://pcsupport.lenovo.com/us/en/products/laptops-and-netbooks/thinkpad-t-series-laptops/thinkpad-t480-type-20l5-20l6/20l5/solutions/ht508988
 extract_tbfw()
 {
-	chkvars TBFW_size # size in bytes, matching TBFW's flash IC
-
-	tbtmp="$xbmklocal/tb.bin"
-	x_ rm -f "$tbtmp" && fe_ copy_tbfw "$appdir" -type f -name "TBT.bin"
-
-	x_ dd if=/dev/null of="$tbtmp" bs=1 seek=$TBFW_size
-	x_ cp "$tbtmp" "$_dest"
+	chkvars TBFW_size
+	fe_ copy_tbfw "$appdir" -type f -name "TBT.bin"
+	[ -f "$_dest" ] || $err "$board: Could not extract tbfw"; :
 }
 
 copy_tbfw()
 {
-	[ -f "$1" ] && [ ! -L "$1" ] && x_ cp "$1" "$xbmklocal/tb.bin" && \
-	    return 1; :
+	[ -f "$1" ] || return 0
+	[ -L "$1" ] && return 0
+
+	tbtmp="$xbmklocal/tb.bin"
+	x_ rm -f "$tbtmp"
+
+	x_ dd if=/dev/null of="$1" bs=1 seek=$TBFW_size
+	x_ mv "$1" "$_dest"
+
+	return 1
 }
 
 extract_fspm()

From bf569d2b4dcbf8efc648da1a87803eefd4b892dc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 07:20:48 +0100
Subject: [PATCH 1306/1549] inject.sh: Remove redundant code in copy_tbfw

We don't use the tbtmp variable anymore, in this function.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index c5e41f6d..b0f3f502 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -288,9 +288,6 @@ copy_tbfw()
 	[ -f "$1" ] || return 0
 	[ -L "$1" ] && return 0
 
-	tbtmp="$xbmklocal/tb.bin"
-	x_ rm -f "$tbtmp"
-
 	x_ dd if=/dev/null of="$1" bs=1 seek=$TBFW_size
 	x_ mv "$1" "$_dest"
 

From 72f4412a52df60bd2d3f01a4c8dc138334ffe434 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 13:15:40 +0100
Subject: [PATCH 1307/1549] inject.sh: simplified fsp extraction

we know that _dest is always what's set in the coreboot config,
without the ../../../ in it, so just copy both files in a single
function, and call the function twice.

if both files are done on the first call, the second call will
be skipped. if only the first file was done on the  first call,
running the download script again will skip the  first one, and
grab the second one.

this also avoids having to run the decat function twice, in most
cases, so it's a tiny optimisation.

this optimisation only works if both fsp files (s and m) are to
be extracted into the same directory, which is the case anyway,
and this will always be the case.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 51 ++++++++++++-----------------------------------
 1 file changed, 13 insertions(+), 38 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index b0f3f502..a9d1350a 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -95,9 +95,9 @@ getfiles()
 	# therefore, handle them separately, in case one of them is libre; if
 	# one of them was, the path wouldn't be set.
 	#
-	[ -z "$CONFIG_FSP_M_FILE" ] || fetch "fspm" "$CONFIG_FSP_FD_PATH" \
+	[ -z "$CONFIG_FSP_M_FILE" ] || fetch "fsp" "$CONFIG_FSP_FD_PATH" \
 	    "$CONFIG_FSP_FD_PATH" "$FSPFD_hash" "$CONFIG_FSP_M_FILE" copy
-	[ -z "$CONFIG_FSP_S_FILE" ] || fetch "fsps" "$CONFIG_FSP_FD_PATH" \
+	[ -z "$CONFIG_FSP_S_FILE" ] || fetch "fsp" "$CONFIG_FSP_FD_PATH" \
 	    "$CONFIG_FSP_FD_PATH" "$FSPFD_hash" "$CONFIG_FSP_S_FILE" copy; :
 }
 
@@ -111,14 +111,12 @@ fetch()
 
 	[ "$5" = "/dev/null" ] && return 0
 	_dl="$XBMK_CACHE/file/$dlsum"
-	if [ "$dl_type" = "fspm" ] || [ "$dl_type" = "fsps" ]; then
-		# HACK: if grabbing fsp from coreboot, fix the path for lbmk
-		for _cdl in dl dl_bkup; do
-			eval "$_cdl=\"\${$_cdl##*../}\"; _cdp=\"\$$_cdl\""
-			[ -f "$_cdp" ] || _cdp="$cbdir/$_cdp"
-			[ -f "$_cdp" ] && eval "$_cdl=\"$_cdp\""
-		done
-	fi
+	# HACK: if grabbing fsp from coreboot, fix the path for lbmk
+	[ "$dl_type" = "fsp" ] && for _cdl in dl dl_bkup; do
+		eval "$_cdl=\"\${$_cdl##*../}\"; _cdp=\"\$$_cdl\""
+		[ -f "$_cdp" ] || _cdp="$cbdir/$_cdp"
+		[ -f "$_cdp" ] && eval "$_cdl=\"$_cdp\""
+	done; :
 
 	dlop="curl" && [ $# -gt 5 ] && dlop="$6"
 	xbmkget "$dl" "$dl_bkup" "$_dl" "$dlsum" "$dlop"
@@ -205,12 +203,9 @@ apply_me11_deguard_mod()
 
 extract_archive()
 {
-	if [ $# -gt 2 ]; then
-		if [ "$3" = "fspm" ] || [ "$3" = "fsps" ]; then
-			decat_fspfd "$1" "$2"
-			return 0
-		fi
-	fi
+	[ $# -gt 2 ] && [ "$3" = "fsp" ] && x_ python \
+	    "$cbdir/3rdparty/fsp/Tools/SplitFspBin.py" split -f "$1" -o "$2" \
+	    -n "Fsp.fd" && return 0
 
 	innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
 	    "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
@@ -219,15 +214,6 @@ extract_archive()
 	    $err "!mv '${_dl}_extracted' '$2' - $dontflash"; :
 }
 
-decat_fspfd()
-{
-	_fspfd="$1"
-	_fspdir="$2"
-	_fspsplit="$cbdir/3rdparty/fsp/Tools/SplitFspBin.py"
-
-	x_ $python "$_fspsplit" split -f "$_fspfd" -o "$_fspdir" -n "Fsp.fd"
-}
-
 extract_kbc1126ec()
 {
 	x_ e "$kbc1126_ec_dump" f
@@ -294,20 +280,9 @@ copy_tbfw()
 	return 1
 }
 
-extract_fspm()
+extract_fsp()
 {
-	copy_fsp M; :
-}
-
-extract_fsps()
-{
-	copy_fsp S; :
-}
-
-# this copies the fsp s/m; re-base is handled by ./mk inject
-copy_fsp()
-{
-	x_ cp "$appdir/Fsp_$1.fd" "$_dest"
+	x_ cp "$appdir/"Fsp_*.fd "${_dest%/*}"
 }
 
 fail_inject()

From 5499ae66bd8e7c36fd6f298b68365d39672a2cfa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 13:35:28 +0100
Subject: [PATCH 1308/1549] inject.sh: simplify extract_archive()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index a9d1350a..a200981f 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -210,8 +210,7 @@ extract_archive()
 	innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
 	    "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
 
-	[ ! -d "${_dl}_extracted" ] || cp -R "${_dl}_extracted" "$2" || \
-	    $err "!mv '${_dl}_extracted' '$2' - $dontflash"; :
+	[ ! -d "${_dl}_extracted" ] || x_ cp -R "${_dl}_extracted" "$2"; :
 }
 
 extract_kbc1126ec()

From 46b968a6e859ca7a0406c1c446ff1a53d74ad887 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 13:49:49 +0100
Subject: [PATCH 1309/1549] inject.sh: minor code cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 23 +++++++----------------
 1 file changed, 7 insertions(+), 16 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index a200981f..9bfda2db 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -228,9 +228,7 @@ extract_kbc1126ec()
 	) || $err "$board: can't extract kbc1126 ec firmware - $dontflash"
 
 	x_ e "$appdir/ec.bin.fw1" f && x_ e "$appdir/ec.bin.fw2" f
-
-	cp "$appdir/"ec.bin.fw* "${_dest%/*}/" || \
-	    $err "!cp 1126ec $_dest - $dontflash"; :
+	x_ cp "$appdir/"ec.bin.fw* "${_dest%/*}/"
 }
 
 extract_e6400vga()
@@ -318,10 +316,8 @@ inject()
 	esac
 	[ "$new_mac" = "keep" ] && new_mac=""
 
-	if [ -n "$new_mac" ] && [ "$new_mac" != "restore" ]; then
-		x_ make -C util/nvmutil clean
-		x_ make -C util/nvmutil
-	fi
+	[ -n "$new_mac" ] && [ "$new_mac" != "restore" ] && \
+		x_ make -C util/nvmutil clean && x_ make -C util/nvmutil
 
 	check_release "$archive" || $err "'$archive' is not a release archive"
 
@@ -510,11 +506,10 @@ insert()
 
 	_offset=""
 
-	if [ "$_t" = "fsp" ]; then
-		[ $# -gt 3 ] && _offset="$4"
-	else
-		[ $# -gt 3 ] && _offset="-b $4" && [ -z "$4" ] && \
-		    $err "insert $*, $rom: offset given but empty (undefined)"
+	if [ "$_t" = "fsp" ] && [ $# -gt 3 ]; then
+		_offset="$4"
+	elif [ $# -gt 3 ] && _offset="-b $4" && [ -z "$4" ]; then
+		$err "insert $*, $rom: offset given but empty (undefined)"
 	fi
 
 	[ "$nukemode" = "nuke" ] || x_ e "$_dest" f
@@ -551,10 +546,6 @@ modify_mac()
 
 	printf "\nGbE NVM written to '%s':\n" "$archive"
 	x_ "$nvm" "$xbmklocal/gbe" dump | grep -v "bytes read from file" || :
-
-	[ "$new_mac" = "restore" ] && \
-		printf "\nDefault GbE file '%s' written, unmodified.\n" \
-		    "${CONFIG_GBE_BIN_PATH##*../}"; :
 }
 
 newmac()

From 7a2f33264d713919bee5a6a4422f3664474b3420 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 18:04:47 +0100
Subject: [PATCH 1310/1549] mk: simplify check_gnu_path()

the initial checks are unnecessary, since i always know
what arguments are being provided.

the -f check in the for loop is now an -x instead, more
efficient and complete.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 20 +++++---------------
 1 file changed, 5 insertions(+), 15 deletions(-)

diff --git a/mk b/mk
index 312ffce3..06a77522 100755
--- a/mk
+++ b/mk
@@ -332,35 +332,25 @@ check_cross_compiler()
 # gnat in PATH never resolves to gnat-14, because gnat-14 was "experimental"
 check_gnu_path()
 {
-	[ $# -lt 2 ] && $err "check_gnu_path: Too few arguments"
-	[ "$1" = "$2" ] && $err "check_gnu_path: Both arguments identical"
-	for _gnuarg in 1 2; do
-		eval "[ \"\$$_gnuarg\" = \"gcc\" ] && continue"
-		eval "[ \"\$$_gnuarg\" = \"gnat\" ] && continue"
-		$err "check_gnu_path: Invalid argument \"$_gnuarg\""
-	done
 	command -v "$1" 1>/dev/null || $err "Host '$1' unavailable"
 
 	eval "`setvars "" gccver gccfull gnatver gnatfull gccdir gnatdir`"
-	gnu_setver "$1" "$1" || $err "Command '$1' unavailable."
-	gnu_setver "$2" "$2" || :
+	x_ gnu_setver "$1" "$1" && gnu_setver "$2" "$2" || :
 
 	eval "[ -z \"\$$1ver\" ] && $err \"Cannot detect host '$1' version\""
 	[ "$gnatfull" = "$gccfull" ] && return 0
 
 	eval "$1dir=\"$(dirname "$(command -v "$1")")\""
 	eval "_gnudir=\"\$$1dir\"; _gnuver=\"\$$1ver\""
-	for _gnubin in "$_gnudir/$2-"*; do
-		[ -f "$_gnubin" ] || continue
-		[ "${_gnubin#"$_gnudir/$2-"}" = "$_gnuver" ] || continue
-		_gnuver="${_gnubin#"$_gnudir/$2-"}"; break
+	for _bin in "$_gnudir/$2-"*; do
+		[ "${_bin#"$_gnudir/$2-"}" = "$_gnuver" ] && [ -x "$_bin" ] \
+		    && _gnuver="${_bin#"$_gnudir/$2-"}" && break; :
 	done
 	gnu_setver "$2" "$_gnudir/$2-$_gnuver" || return 1
 	[ "$gnatfull" = "$gccfull" ] || return 1
 
 	(
-	rm -f "$XBMK_CACHE/gnupath/"* || $err "Cannot clear gnupath/"
-	cd "$XBMK_CACHE/gnupath" || $err "Can't cd to gnupath/"
+	remkdir "$XBMK_CACHE/gnupath" && x_ cd "$XBMK_CACHE/gnupath"
 	for _gnubin in "$_gnudir/$2"*"-$_gnuver"; do
 		_gnuutil="${_gnubin##*/}" && [ -e "$_gnubin" ] && \
 		    x_ ln -s "$_gnubin" "${_gnuutil%"-$_gnuver"}"

From 8f828e6cd35d82b0a0fa20b202d49ab092161fa3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 18:14:59 +0100
Subject: [PATCH 1311/1549] mk: tidy up check_project_hashes() sha512sum check

the extra function isn't needed at all. awk can just
handle every line all at once.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 12 +++---------
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/mk b/mk
index 06a77522..2020115b 100755
--- a/mk
+++ b/mk
@@ -277,9 +277,9 @@ check_project_hashes()
 	[ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
 	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
 
-	x_ rm -f "$xbmktmp/project.hash"
-	fx_ create_project_hash "$datadir" "$configdir/$tree" "$mdir" \
-	    -type f -not -path "*/.git*/*"
+	fx_ sha512sum "$datadir" "$configdir/$tree" "$mdir" \
+	    -type f -not -path "*/.git*/*" | awk '{print $1}' > \
+	    "$xbmktmp/project.hash" || $err "!h $project $tree"
 
 	pjhash="$(sha512sum "$xbmktmp/project.hash" | awk '{print $1}')" || :
 	[ "$pjhash" != "$old_pjhash" ] && badhash="y"
@@ -292,12 +292,6 @@ check_project_hashes()
 	    "elf/$project/$tree" "elf/$project/$target"; :
 }
 
-create_project_hash()
-{
-	[ ! -f "$1" ] || x_ sha512sum "$1" | awk \
-	    '{print $1}' >> "$xbmktmp/project.hash" || $err "!h $1"; :
-}
-
 check_cross_compiler()
 {
 	xgccargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"

From aa4083443b14335c8ada088034434b584aacc789 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 3 May 2025 18:30:37 +0100
Subject: [PATCH 1312/1549] mk: Allow use of x_ on prefix functions

Use this for the sha512sum command, on the main mk
script at the function check_project_hashes().

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 mk             | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index d58716c3..50813352 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -146,7 +146,7 @@ find_ex()
 	$errx find "$@" 2>/dev/null | sort > "$fd" || \
 	    $err "!find $(echo "$@") > \"$fd\""
 	while read -r fx; do
-		"$xx" "$fx" || break; :
+		$xx "$fx" || break; :
 	done < "$fd"
 	x_ rm -f "$fd"
 }
diff --git a/mk b/mk
index 2020115b..28a4cb0c 100755
--- a/mk
+++ b/mk
@@ -277,7 +277,7 @@ check_project_hashes()
 	[ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
 	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
 
-	fx_ sha512sum "$datadir" "$configdir/$tree" "$mdir" \
+	fx_ "x_ sha512sum" "$datadir" "$configdir/$tree" "$mdir" \
 	    -type f -not -path "*/.git*/*" | awk '{print $1}' > \
 	    "$xbmktmp/project.hash" || $err "!h $project $tree"
 

From c33467df1e6119e07608e4e35193815bd2050b1c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 08:02:14 +0100
Subject: [PATCH 1313/1549] mk: reduce indentation in check_cross_compiler()

we only call it in one place. the resulting code is still
quite clear.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 37 +++++++++++++++++++------------------
 1 file changed, 19 insertions(+), 18 deletions(-)

diff --git a/mk b/mk
index 28a4cb0c..765772b4 100755
--- a/mk
+++ b/mk
@@ -211,7 +211,9 @@ handle_defconfig()
 	if [ "$mode" = "distclean" ] || [ "$mode" = "crossgcc-clean" ]; then
 		[ -d "$srcdir" ] || return 0
 	fi
-	[ -z "$mode" ] && $dry check_cross_compiler
+	[ -z "$mode" ] && for _xarch in $xarch; do
+		$dry check_cross_compiler "$_xarch"
+	done; :
 
 	for y in "$target_dir/config"/*; do
 		[ "$_f" = "-d" ] || [ -f "$y" ] || continue
@@ -295,29 +297,28 @@ check_project_hashes()
 check_cross_compiler()
 {
 	xgccargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
-	for _xarch in $xarch; do
-		cbdir="src/coreboot/$tree"
-		[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
-		[ -n "$xtree" ] && cbdir="src/coreboot/$xtree"
 
-		x_ ./mk -f coreboot "${cbdir#src/coreboot/}"
+	cbdir="src/coreboot/$tree"
+	[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
+	[ -n "$xtree" ] && cbdir="src/coreboot/$xtree"
 
-		export PATH="$xbmkpwd/$cbdir/util/crossgcc/xgcc/bin:$PATH"
-		export CROSS_COMPILE="${xarch% *}-"
-		[ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
+	x_ ./mk -f coreboot "${cbdir#src/coreboot/}"
 
-		xfix="${_xarch%-*}" && [ "$xfix" = "x86_64" ] && xfix="x64"
+	export PATH="$xbmkpwd/$cbdir/util/crossgcc/xgcc/bin:$PATH"
+	export CROSS_COMPILE="${xarch% *}-"
+	[ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
 
-		# match gnat-X to gcc
-		check_gnu_path gcc gnat || x_ check_gnu_path gnat gcc
+	xfix="${1%-*}" && [ "$xfix" = "x86_64" ] && xfix="x64"
 
-		# sometimes buildgcc fails for like no reason. try twice.
-		make -C "$cbdir" crossgcc-$xfix $xgccargs || \
-		    x_ make -C "$cbdir" crossgcc-$xfix $xgccargs
+	# match gnat-X to gcc
+	check_gnu_path gcc gnat || x_ check_gnu_path gnat gcc
 
-		# we only want to mess with hostcc to build xgcc
-		rm -f "$XBMK_CACHE/gnupath/"* || $err "Can't clear gnupath/"; :
-	done; :
+	# sometimes buildgcc fails for like no reason. try twice.
+	make -C "$cbdir" crossgcc-$xfix $xgccargs || \
+	    x_ make -C "$cbdir" crossgcc-$xfix $xgccargs
+
+	# we only want to mess with hostcc to build xgcc
+	rm -f "$XBMK_CACHE/gnupath/"* || $err "Can't clear gnupath/"; :
 }
 
 # fix mismatching gcc/gnat versions on debian trixie/sid. as of december 2024,

From 488d52e784f4520f679e5823ff2c48057037cbd8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 08:04:36 +0100
Subject: [PATCH 1314/1549] mk: re-make gnupath/ for each cross compiler

it could be that some were left over before, for some
reason. that isn't currently the case, but this will
avoid the possibility in future.

therefore, this is a preemptive bug fix.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 1 +
 1 file changed, 1 insertion(+)

diff --git a/mk b/mk
index 765772b4..4d7cf116 100755
--- a/mk
+++ b/mk
@@ -296,6 +296,7 @@ check_project_hashes()
 
 check_cross_compiler()
 {
+	remkdir "$XBMK_CACHE/gnupath"
 	xgccargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 
 	cbdir="src/coreboot/$tree"

From 1b7a9fd637d2ca98d1da5ded0e2090bd311b4b8c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 08:07:06 +0100
Subject: [PATCH 1315/1549] mk: tidy up check_cross_compiler

only initialise variables at the point they're needed.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/mk b/mk
index 4d7cf116..2dd9379b 100755
--- a/mk
+++ b/mk
@@ -297,7 +297,6 @@ check_project_hashes()
 check_cross_compiler()
 {
 	remkdir "$XBMK_CACHE/gnupath"
-	xgccargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 
 	cbdir="src/coreboot/$tree"
 	[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
@@ -309,12 +308,11 @@ check_cross_compiler()
 	export CROSS_COMPILE="${xarch% *}-"
 	[ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
 
-	xfix="${1%-*}" && [ "$xfix" = "x86_64" ] && xfix="x64"
-
 	# match gnat-X to gcc
 	check_gnu_path gcc gnat || x_ check_gnu_path gnat gcc
 
-	# sometimes buildgcc fails for like no reason. try twice.
+	xfix="${1%-*}" && [ "$xfix" = "x86_64" ] && xfix="x64"
+	xgccargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
 	make -C "$cbdir" crossgcc-$xfix $xgccargs || \
 	    x_ make -C "$cbdir" crossgcc-$xfix $xgccargs
 

From f5b2bdb88681bd16f2a32c8fb3f51cfc65da9448 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 08:07:53 +0100
Subject: [PATCH 1316/1549] mk: re-make gnupath/ after handling crossgcc

instead of deleting every file within

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mk b/mk
index 2dd9379b..c87acfe7 100755
--- a/mk
+++ b/mk
@@ -317,7 +317,7 @@ check_cross_compiler()
 	    x_ make -C "$cbdir" crossgcc-$xfix $xgccargs
 
 	# we only want to mess with hostcc to build xgcc
-	rm -f "$XBMK_CACHE/gnupath/"* || $err "Can't clear gnupath/"; :
+	remkdir "$XBMK_CACHE/gnupath"
 }
 
 # fix mismatching gcc/gnat versions on debian trixie/sid. as of december 2024,

From b6a2dc4ea3ca18bff174014d1724aebd5dc28b84 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 08:10:36 +0100
Subject: [PATCH 1317/1549] init.sh: tidy up pathdir creation

we can use remkdir here. it does the same thing.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 3f813ea7..7026594a 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -212,8 +212,7 @@ xbmk_lock()
 
 xbmk_create_pathdirs()
 {
-	x_ rm -Rf "$XBMK_CACHE/xbmkpath" "$XBMK_CACHE/gnupath"
-	x_ mkdir -p "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
+	remkdir "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
 	export PATH="$XBMK_CACHE/xbmkpath:$XBMK_CACHE/gnupath:$PATH"
 	(
 	# set up python v3.x in PATH, in case it's not set up correctly.

From 184871bc17cdc5716d8d8bcfff03b0f7412b7a1a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 08:10:59 +0100
Subject: [PATCH 1318/1549] mk: remove useless code

this was added a few commits ago, but the previous commit
made me realise it's not needed at all.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 2 --
 1 file changed, 2 deletions(-)

diff --git a/mk b/mk
index c87acfe7..49cebaf1 100755
--- a/mk
+++ b/mk
@@ -296,8 +296,6 @@ check_project_hashes()
 
 check_cross_compiler()
 {
-	remkdir "$XBMK_CACHE/gnupath"
-
 	cbdir="src/coreboot/$tree"
 	[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
 	[ -n "$xtree" ] && cbdir="src/coreboot/$xtree"

From fc71e52fdfc559d207ea54059a86edb81e928e33 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 08:14:44 +0100
Subject: [PATCH 1319/1549] mk: tidy up xgccargs handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/mk b/mk
index 49cebaf1..5a4afadf 100755
--- a/mk
+++ b/mk
@@ -310,9 +310,8 @@ check_cross_compiler()
 	check_gnu_path gcc gnat || x_ check_gnu_path gnat gcc
 
 	xfix="${1%-*}" && [ "$xfix" = "x86_64" ] && xfix="x64"
-	xgccargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
-	make -C "$cbdir" crossgcc-$xfix $xgccargs || \
-	    x_ make -C "$cbdir" crossgcc-$xfix $xgccargs
+	xgccargs="crossgcc-$xfix UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
+	make -C "$cbdir" $xgccargs || x_ make -C "$cbdir" $xgccargs
 
 	# we only want to mess with hostcc to build xgcc
 	remkdir "$XBMK_CACHE/gnupath"

From 93ba36ae456cad1e0766c1020ac2dfdb013b6411 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 08:19:17 +0100
Subject: [PATCH 1320/1549] rom.sh: tidy up copyps1bios()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index f74912af..ec464d85 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -29,8 +29,7 @@ mkserprog()
 
 copyps1bios()
 {
-	x_ rm -Rf bin/playstation
-	x_ mkdir -p bin/playstation
+	remkdir "bin/playstation"
 	x_ cp src/pcsx-redux/src/mips/openbios/openbios.bin bin/playstation
 
 	printf "MIT License\n\nCopyright (c) 2019-2024 PCSX-Redux authors\n\n" \

From 7acec7a3a1d40a38b88b56e9c56087da263f30d1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 08:29:19 +0100
Subject: [PATCH 1321/1549] init.sh: simplify dependencies handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 7026594a..fc321605 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -26,10 +26,7 @@ xbmk_init()
 
 	export PWD="$xbmkpwd"
 
-	if [ $# -gt 0 ] && [ "$1" = "dependencies" ]; then
-		install_packages "$@" || exit 1
-		exit 0
-	fi
+	[ $# -gt 0 ] && [ "$1" = "dependencies" ] && x_ xbmkpkg "$@" && exit 0
 
 	id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
 	[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
@@ -40,7 +37,7 @@ xbmk_init()
 	done
 }
 
-install_packages()
+xbmkpkg()
 {
 	[ $# -lt 2 ] && $err "fewer than two arguments"
 	[ $# -gt 2 ] && reinstall="$3"

From 7392f6fc8ecbff10661be6ae66306afd89f1a3e3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 08:33:17 +0100
Subject: [PATCH 1322/1549] init.sh: move non-init functions to lib.sh

these were missed in a previous cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 16 ----------------
 include/lib.sh  | 16 ++++++++++++++++
 2 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index fc321605..4807e1cf 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -51,22 +51,6 @@ xbmkpkg()
 	    printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; :
 }
 
-setcfg()
-{
-	[ $# -gt 1 ] && printf "e \"%s\" f missing && return %s;\n" "$1" "$2"
-	[ $# -gt 1 ] || \
-		printf "e \"%s\" f not && %s \"Missing config\";\n" "$1" "$err"
-	printf ". \"%s\" || %s \"Could not read config\";\n" "$1" "$err"
-}
-
-chkvars()
-{
-	for var in "$@"; do
-		eval "[ -n \"\${$var+x}\" ] || \$err \"$var unset\""
-		eval "[ -n \"\$$var\" ] || \$err \"$var unset\""
-	done; :
-}
-
 xbmk_set_pyver()
 {
 	pyv="import sys; print(sys.version_info[:])"
diff --git a/include/lib.sh b/include/lib.sh
index 50813352..93680cee 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -128,6 +128,22 @@ setvars()
 	printf "%s\n" "${_setvars% }"
 }
 
+setcfg()
+{
+	[ $# -gt 1 ] && printf "e \"%s\" f missing && return %s;\n" "$1" "$2"
+	[ $# -gt 1 ] || \
+		printf "e \"%s\" f not && %s \"Missing config\";\n" "$1" "$err"
+	printf ". \"%s\" || %s \"Could not read config\";\n" "$1" "$err"
+}
+
+chkvars()
+{
+	for var in "$@"; do
+		eval "[ -n \"\${$var+x}\" ] || \$err \"$var unset\""
+		eval "[ -n \"\$$var\" ] || \$err \"$var unset\""
+	done; :
+}
+
 fe_()
 {
 	find_ex "x_" "$@"

From 6e447876cca283434163328ce08b6e9d0b5a1d24 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 08:47:12 +0100
Subject: [PATCH 1323/1549] init.sh: tidy up the python version check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 4807e1cf..9f6e7162 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -60,11 +60,9 @@ xbmk_set_pyver()
 	pybin "$python" 1>/dev/null || pyver=""
 	[ -z "$pyver" ] || "`pybin "$python"`" -c "$pyv" 1>/dev/null \
 	    2>/dev/null || $err "Cannot detect host Python version."
-	if [ -n "$pyver" ]; then
-		pyver="$("$(pybin "$python")" -c "$pyv" | awk '{print $1}')"
-		pyver="${pyver#(}"
-		pyver="${pyver%,}"
-	fi
+	[ -n "$pyver" ] && \
+	    pyver="$("$(pybin "$python")" -c "$pyv" | awk '{print $1}')" && \
+	    pyver="${pyver#(}" && pyver="${pyver%,}"
 	[ "${pyver%%.*}" = "3" ] || $err "Bad python version (must by 3.x)"; :
 }
 
@@ -94,8 +92,7 @@ pybin()
 		[ -e "$pypath/$1" ] && [ ! -d "$pypath/$1" ] && \
 		    [ -x "$pypath/$1" ] && printf "%s/%s\n" "$pypath" "$1" && \
 		    return 0
-	done
-	[ $venv -gt 0 ] && return 1
+	done && return 1
 
 	# Defer to normal command -v if not a venv
 	command -v "$1" 2>/dev/null || return 1

From 439020fbda5ca7862bf2eaf4d59ab68aae230c33 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 08:47:56 +0100
Subject: [PATCH 1324/1549] inject.sh: remove useless comment block

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 9bfda2db..d956cdd1 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -90,11 +90,6 @@ getfiles()
 	    "$MRC_url_bkup" "$MRC_hash" "$CONFIG_REFCODE_BLOB_FILE"
 	[ -z "$CONFIG_LENOVO_TBFW_BIN" ] || fetch "tbfw" "$TBFW_url" \
 	    "$TBFW_url_bkup" "$TBFW_hash" "$CONFIG_LENOVO_TBFW_BIN"
-	#
-	# in the future, we might have libre fsp-s and then fsp-m.
-	# therefore, handle them separately, in case one of them is libre; if
-	# one of them was, the path wouldn't be set.
-	#
 	[ -z "$CONFIG_FSP_M_FILE" ] || fetch "fsp" "$CONFIG_FSP_FD_PATH" \
 	    "$CONFIG_FSP_FD_PATH" "$FSPFD_hash" "$CONFIG_FSP_M_FILE" copy
 	[ -z "$CONFIG_FSP_S_FILE" ] || fetch "fsp" "$CONFIG_FSP_FD_PATH" \

From b19c4f8f674b04fdaa0b07b2c43766a76545ed09 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 08:50:23 +0100
Subject: [PATCH 1325/1549] inject.sh: tidy up TBFW handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 12 +++---------
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index d956cdd1..837f34c1 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -256,20 +256,14 @@ extract_sch5545ec()
 # https://pcsupport.lenovo.com/us/en/products/laptops-and-netbooks/thinkpad-t-series-laptops/thinkpad-t480-type-20l5-20l6/20l5/solutions/ht508988
 extract_tbfw()
 {
-	chkvars TBFW_size
-	fe_ copy_tbfw "$appdir" -type f -name "TBT.bin"
+	chkvars TBFW_size && fe_ copy_tbfw "$appdir" -type f -name "TBT.bin"
 	[ -f "$_dest" ] || $err "$board: Could not extract tbfw"; :
 }
 
 copy_tbfw()
 {
-	[ -f "$1" ] || return 0
-	[ -L "$1" ] && return 0
-
-	x_ dd if=/dev/null of="$1" bs=1 seek=$TBFW_size
-	x_ mv "$1" "$_dest"
-
-	return 1
+	[ -f "$1" ] && [ ! -L "$1" ] && x_ dd if=/dev/null of="$1" bs=1 \
+	    seek=$TBFW_size && x_ mv "$1" "$_dest" && return 1; :
 }
 
 extract_fsp()

From 91bb6cbede0405f764c3f2a686fbba5c7aa9f2fb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 09:10:24 +0100
Subject: [PATCH 1326/1549] lib.sh: Make err_ always exit no matter what

Always certainly redundant, since if -u -e isn't
set, it'll continue to exit anyway.

However, we want to be pedantic about this, since
the safety of lbmk relies entirely on this function
NOT misbehaving.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 93680cee..c5790bf7 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -174,6 +174,6 @@ x_()
 
 err_()
 {
-	printf "ERROR %s: %s\n" "$0" "$1" 1>&2
+	[ $# -lt 1 ] || printf "ERROR %s: %s\n" "$0" "$1" 1>&2 || :
 	exit 1
 }

From 59c94664e3e3382375e79ee478fc68d3802d794a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 09:14:09 +0100
Subject: [PATCH 1327/1549] lib.sh: Make x_ err if first arg is empty

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/lib.sh b/include/lib.sh
index c5790bf7..abf4de3b 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -169,6 +169,7 @@ find_ex()
 
 x_()
 {
+	[ $# -lt 1 ] || [ -n "$1" ] || $err "Empty first arg: x_ $(echo "$@")"
 	[ $# -lt 1 ] || "$@" || $err "Unhandled error for: $(echo "$@")"; :
 }
 

From 3f7dc2a55f5b2273e73e17e4cec75faffe65740f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 09:17:23 +0100
Subject: [PATCH 1328/1549] lib.sh: rename errx to xmsg

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index abf4de3b..b2888fb6 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -156,10 +156,10 @@ fx_()
 
 find_ex()
 {
-	errx="$1" && shift 1
+	xmsg="$1" && shift 1
 	fd="`mktemp`" && x_ rm -f "$fd" && x_ touch "$fd"
 	xx="$1" && shift 1
-	$errx find "$@" 2>/dev/null | sort > "$fd" || \
+	$xmsg find "$@" 2>/dev/null | sort > "$fd" || \
 	    $err "!find $(echo "$@") > \"$fd\""
 	while read -r fx; do
 		$xx "$fx" || break; :

From 54291ebb7209c314bb52f507bc6a1ecf2a28fbc9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 09:56:21 +0100
Subject: [PATCH 1329/1549] lbmk: MUCH safer err function

Don't directly call a variable. Call a function that
checks the variable instead.

The new err function also checks whether an exit was
actually done, and exits 1 if not.

If an exit was done by the given function, but the exit
was zero, this is also corrected to perform an exit 1.

This fixes a longstanding design flaw of lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh    | 24 +++++++--------
 include/init.sh   | 38 +++++++++++------------
 include/inject.sh | 78 +++++++++++++++++++++++------------------------
 include/lib.sh    | 63 +++++++++++++++++++++++++++-----------
 include/mrc.sh    | 10 +++---
 include/rom.sh    | 18 +++++------
 mk                | 68 ++++++++++++++++++++---------------------
 7 files changed, 163 insertions(+), 136 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 37f5bbae..ded12625 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -63,7 +63,7 @@ git_prep()
 	    [ "$XBMK_RELEASE" = "y" ] && rmgit "$tmpgit"
 
 	[ "$_loc" = "${_loc%/*}" ] || x_ mkdir -p "${_loc%/*}"
-	mv "$tmpgit" "$_loc" || $err "git_prep: !mv $tmpgit $_loc"
+	mv "$tmpgit" "$_loc" || err "git_prep: !mv $tmpgit $_loc"
 }
 
 # return 0 if project is single-tree, otherwise 1
@@ -80,20 +80,20 @@ fetch_submodule()
 	mcfgdir="$mdir/${1##*/}"; eval \
 	    "`setvars "" subhash subrepo subrepo_bkup subfile subfile_bkup st`"
 	[ ! -f "$mcfgdir/module.cfg" ] || . "$mcfgdir/module.cfg" || \
-	    $err "! . $mcfgdir/module.cfg"
+	    err "! . $mcfgdir/module.cfg"
 
 	for xt in repo file; do
 		_seval="if [ -n \"\$sub$xt\" ] || [ -n \"\$sub${xt}_bkup\" ]"
 		eval "$_seval; then st=\"\$st \$xt\"; fi"
 	done
-	st="${st# }" && [ "$st" = "repo file" ] && $err "$mdir: repo+file"
+	st="${st# }" && [ "$st" = "repo file" ] && err "$mdir: repo+file"
 
 	[ -z "$st" ] && return 0 # subrepo/subfile not defined
 	chkvars "sub${st}" "sub${st}_bkup" "subhash"
 
 	[ "$st" = "file" ] && xbmkget "$subfile" "$subfile_bkup" \
 	    "$tmpgit/$1" "$subhash" && return 0
-	rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
+	rm -Rf "$tmpgit/$1" || err "!rm '$mdir' '$1'"
 	tmpclone "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subhash" \
 	    "$mdir/${1##*/}/patches"
 }
@@ -105,25 +105,25 @@ tmpclone()
 
 	repofail="n"
 
-	[ $# -lt 6 ] || rm -Rf "$3" || $err "git retry: !rm $3 ($1)"
+	[ $# -lt 6 ] || rm -Rf "$3" || err "git retry: !rm $3 ($1)"
 	repodir="$XBMK_CACHE/repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"
-	mkdir -p "$XBMK_CACHE/repo" || $err "!rmdir $XBMK_CACHE/repo"
+	mkdir -p "$XBMK_CACHE/repo" || err "!rmdir $XBMK_CACHE/repo"
 
 	if [ "$livepull" = "y" ] && [ ! -d "$repodir" ]; then
 		git clone "$1" "$repodir" || git clone $2 "$repodir" || \
-		    $err "!clone $1 $2 $repodir $4 $5" #
+		    err "!clone $1 $2 $repodir $4 $5" #
 	elif [ -d "$repodir" ] && [ $# -lt 6 ]; then
 		git -C "$repodir" pull || sleep 3 || git -C "$repodir" pull \
 		    || sleep 3 || git -C "$repodir" pull || :
 	fi
 	(
-	[ $# -gt 5 ] || git clone "$repodir" "$3" || $err "!clone $repodir $3"
-	git -C "$3" reset --hard "$4" || $err "!reset $1 $2 $3 $4 $5"
+	[ $# -gt 5 ] || git clone "$repodir" "$3" || err "!clone $repodir $3"
+	git -C "$3" reset --hard "$4" || err "!reset $1 $2 $3 $4 $5"
 	git_am_patches "$3" "$5"
 	) || repofail="y"
 
 	[ "$repofail" = "y" ] && [ $# -lt 6 ] && tmpclone "$@" retry
-	[ "$repofail" = "y" ] && $err "!clone $1 $2 $3 $4 $5"; :
+	[ "$repofail" = "y" ] && err "!clone $1 $2 $3 $4 $5"; :
 }
 
 git_am_patches()
@@ -132,7 +132,7 @@ git_am_patches()
 		[ -L "$p" ] && continue
 		[ -e "$p" ] || continue
 		[ -d "$p" ] && git_am_patches "$1" "$p" && continue
-		[ ! -f "$p" ] || git -C "$1" am "$p" || $err "$1 $2: !am $p"
+		[ ! -f "$p" ] || git -C "$1" am "$p" || err "$1 $2: !am $p"
 	done; :
 }
 
@@ -140,6 +140,6 @@ nuke()
 {
 	e "config/${1%/}/nuke.list" f missing || while read -r nukefile; do
 		rmf="src/${2%/}/$nukefile" && [ -L "$rmf" ] && continue
-		e "$rmf" e missing || rm -Rf "$rmf" || $err "!rm $rmf, ${2%/}"
+		e "$rmf" e missing || rm -Rf "$rmf" || err "!rm $rmf, ${2%/}"
 	done < "config/${1%/}/nuke.list"; :
 }
diff --git a/include/init.sh b/include/init.sh
index 9f6e7162..ce9cf9a9 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -14,22 +14,22 @@ projectsite="https://libreboot.org/"
     export PATH="/usr/local/bin:/usr/bin:/bin:/usr/local/games:/usr/games"
 xbmkpath="$PATH"
 
-err="err_"
+xbmk_err="err_"
 
 eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
     datadir version xbmkpwd relname xbmkpwd xbmktmp python pyver xbmklocal`"
 
 xbmk_init()
 {
-	xbmkpwd="`pwd`" || $err "Cannot generate PWD"
+	xbmkpwd="`pwd`" || err "Cannot generate PWD"
 	xbmklocal="$xbmkpwd/tmp"
 
 	export PWD="$xbmkpwd"
 
 	[ $# -gt 0 ] && [ "$1" = "dependencies" ] && x_ xbmkpkg "$@" && exit 0
 
-	id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
-	[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
+	id -u 1>/dev/null 2>/dev/null || err "suid check failed (id -u)"
+	[ "$(id -u)" != "0" ] || err "this command as root is not permitted"
 
 	for init_cmd in set_pyver set_env set_version git_init create_tmpdir \
 	    lock create_pathdirs child_exec; do
@@ -39,13 +39,13 @@ xbmk_init()
 
 xbmkpkg()
 {
-	[ $# -lt 2 ] && $err "fewer than two arguments"
+	[ $# -lt 2 ] && err "fewer than two arguments"
 	[ $# -gt 2 ] && reinstall="$3"
 
 	eval "`setcfg "config/dependencies/$2"`"
 
 	chkvars pkg_add pkglist
-	$pkg_add $pkglist || $err "Cannot install packages"
+	$pkg_add $pkglist || err "Cannot install packages"
 
 	[ -n "$aur_notice" ] && \
 	    printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; :
@@ -59,11 +59,11 @@ xbmk_set_pyver()
 	pyver="2" && [ "$python" = "python3" ] && pyver="3"
 	pybin "$python" 1>/dev/null || pyver=""
 	[ -z "$pyver" ] || "`pybin "$python"`" -c "$pyv" 1>/dev/null \
-	    2>/dev/null || $err "Cannot detect host Python version."
+	    2>/dev/null || err "Cannot detect host Python version."
 	[ -n "$pyver" ] && \
 	    pyver="$("$(pybin "$python")" -c "$pyv" | awk '{print $1}')" && \
 	    pyver="${pyver#(}" && pyver="${pyver%,}"
-	[ "${pyver%%.*}" = "3" ] || $err "Bad python version (must by 3.x)"; :
+	[ "${pyver%%.*}" = "3" ] || err "Bad python version (must by 3.x)"; :
 }
 
 # Use direct path, to prevent a hang if Python is using a virtual environment,
@@ -104,9 +104,9 @@ xbmk_set_env()
 	[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$xbmkpwd/cache"
 	[ -z "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
 	[ -L "$XBMK_CACHE" ] && [ "$XBMK_CACHE" = "$xbmkpwd/cache" ] && \
-	    $err "cachedir '$xbmkpwd/cache' is a symlink"
+	    err "cachedir '$xbmkpwd/cache' is a symlink"
 	[ -L "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
-	[ -f "$XBMK_CACHE" ] && $err "cachedir '$XBMK_CACHE' is a file"; :
+	[ -f "$XBMK_CACHE" ] && err "cachedir '$XBMK_CACHE' is a file"; :
 
 	# if "y": a coreboot target won't be built if target.cfg says release="n"
 	# (this is used to exclude certain build targets from releases)
@@ -124,9 +124,9 @@ xbmk_set_version()
 	[ ! -f ".versiondate" ] || read -r versiondate < ".versiondate" || :; :
 
 	[ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > ".version" \
-	    || $err "Cannot generate unknown .version file"
+	    || err "Cannot generate unknown .version file"
 	[ -e ".git" ] || [ -f ".versiondate" ] || printf "1716415872\n" > \
-	    ".versiondate" || $err "Can't generate unknown versiondate file"; :
+	    ".versiondate" || err "Can't generate unknown versiondate file"; :
 
 	version_="$version"
 	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
@@ -136,8 +136,8 @@ xbmk_set_version()
 	    --pretty='%ct' HEAD)" || versiondate="$versiondate_"
 
 	chkvars version versiondate
-	printf "%s\n" "$version" > ".version" || $err "can't save version"
-	printf "%s\n" "$versiondate" > ".versiondate" || $err "can't save date"
+	printf "%s\n" "$version" > ".version" || err "can't save version"
+	printf "%s\n" "$versiondate" > ".versiondate" || err "can't save date"
 
 	relname="$projectname-$version"
 	export LOCALVERSION="-$projectname-${version%%-*}"
@@ -157,7 +157,7 @@ xbmk_git_init()
 	    2>/dev/null
 
 	for gitarg in "--global user.name" "--global user.email"; do
-		gitcmd="git config $gitarg"; $gitcmd || $err \
+		gitcmd="git config $gitarg"; $gitcmd || err \
 		    "Please run this first: $gitcmd \"your ${gitcmd##*.}\""
 	done
 }
@@ -184,8 +184,8 @@ xbmk_create_tmpdir()
 
 xbmk_lock()
 {
-	[ -f "lock" ] && $err "$xbmkpwd/lock exists. Is a build running?"
-	touch lock || $err "cannot create 'lock' file"; :
+	[ -f "lock" ] && err "$xbmkpwd/lock exists. Is a build running?"
+	touch lock || err "cannot create 'lock' file"; :
 }
 
 xbmk_create_pathdirs()
@@ -195,9 +195,9 @@ xbmk_create_pathdirs()
 	(
 	# set up python v3.x in PATH, in case it's not set up correctly.
 	# see code above that detected the correct python3 command.
-	cd "$XBMK_CACHE/xbmkpath" || $err "can't cd $XBMK_CACHE/xbmkpath"
+	cd "$XBMK_CACHE/xbmkpath" || err "can't cd $XBMK_CACHE/xbmkpath"
 	x_ ln -s "`pybin "$python"`" python
-	) || $err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"; :
+	) || err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"; :
 }
 
 xbmk_child_exec()
diff --git a/include/inject.sh b/include/inject.sh
index 837f34c1..e2987aad 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -41,7 +41,7 @@ eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
 
 download()
 {
-	[ $# -gt 0 ] || $err "No argument given"
+	[ $# -gt 0 ] || err "No argument given"
 	export PATH="$PATH:/sbin"
 	board="$1" && readcfg && readkconfig && bootstrap && getfiles; :
 }
@@ -116,22 +116,22 @@ fetch()
 	dlop="curl" && [ $# -gt 5 ] && dlop="$6"
 	xbmkget "$dl" "$dl_bkup" "$_dl" "$dlsum" "$dlop"
 
-	rm -Rf "${_dl}_extracted" || $err "!rm ${_ul}_extracted. $dontflash"
+	rm -Rf "${_dl}_extracted" || err "!rm ${_ul}_extracted. $dontflash"
 	e "$_dest" f && return 0
 
 	x_ mkdir -p "${_dest%/*}"
 	remkdir "$appdir"
 	extract_archive "$_dl" "$appdir" "$dl_type" || \
-	    [ "$dl_type" = "e6400vga" ] || $err "$_dest $dl_type: !extract"
+	    [ "$dl_type" = "e6400vga" ] || err "$_dest $dl_type: !extract"
 
 	eval "extract_$dl_type"
 	set -u -e
-	e "$_dest" f missing && $err "!extract_$dl_type. $dontflash"; :
+	e "$_dest" f missing && err "!extract_$dl_type. $dontflash"; :
 }
 
 extract_intel_me()
 {
-	e "$mecleaner" f not && $err "$cbdir: me_cleaner missing. $dontflash"
+	e "$mecleaner" f not && err "$cbdir: me_cleaner missing. $dontflash"
 
 	cdir="$xbmkpwd/$appdir"
 	_me="$xbmkpwd/$_dest"
@@ -145,7 +145,7 @@ extract_intel_me()
 	if [ "$ME11bootguard" = "y" ]; then
 		apply_me11_deguard_mod
 	else
-		mv "$_metmp" "$_me" || $err "!mv $_metmp $_me - $dontflash"
+		mv "$_metmp" "$_me" || err "!mv $_metmp $_me - $dontflash"
 	fi
 }
 
@@ -160,7 +160,7 @@ extract_intel_me_bruteforce()
 	set +u +e
 	(
 	[ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
-	cd "$cdir" || $err "extract_intel_me: !cd \"$cdir\" - $dontflash"
+	cd "$cdir" || err "extract_intel_me: !cd \"$cdir\" - $dontflash"
 	for i in *; do
 		e "$_metmp" f && break
 		[ -L "$i" ] && continue
@@ -182,7 +182,7 @@ extract_intel_me_bruteforce()
 		cd "$cdir" || :
 	done
 	) || :
-	rm -Rf "$sdir" || $err "extract_intel_me: !rm -Rf $sdir - $dontflash"
+	rm -Rf "$sdir" || err "extract_intel_me: !rm -Rf $sdir - $dontflash"
 }
 
 apply_me11_deguard_mod()
@@ -193,7 +193,7 @@ apply_me11_deguard_mod()
 	    --version "$ME11version" \
 	    --pch "$ME11pch" --sku "$ME11sku" --fake-fpfs data/fpfs/zero \
 	    --input "$_metmp" --output "$_me"
-	) || $err "Error running deguard for $_me - $dontflash"
+	) || err "Error running deguard for $_me - $dontflash"
 }
 
 extract_archive()
@@ -216,11 +216,11 @@ extract_kbc1126ec()
 	mv Rompaq/68*.BIN ec.bin || :
 	if [ ! -f "ec.bin" ]; then
 		unar -D ROM.CAB Rom.bin || unar -D Rom.CAB Rom.bin || \
-		    unar -D 68*.CAB Rom.bin || $err "kbc1126 unar failed"
+		    unar -D 68*.CAB Rom.bin || err "kbc1126 unar failed"
 		x_ mv Rom.bin ec.bin
 	fi
 	x_ e ec.bin f && x_ "$kbc1126_ec_dump" ec.bin
-	) || $err "$board: can't extract kbc1126 ec firmware - $dontflash"
+	) || err "$board: can't extract kbc1126 ec firmware - $dontflash"
 
 	x_ e "$appdir/ec.bin.fw1" f && x_ e "$appdir/ec.bin.fw2" f
 	x_ cp "$appdir/"ec.bin.fw* "${_dest%/*}/"
@@ -235,7 +235,7 @@ extract_e6400vga()
 	x_ cd "$appdir"
 	x_ e "bios.bin" f
 	"$e6400_unpack" bios.bin || printf "TODO: fix dell extract util\n"
-	) || $err "can't extract e6400 vga rom - $dontflosh"
+	) || err "can't extract e6400 vga rom - $dontflosh"
 	x_ cp "$appdir/$E6400_VGA_romname" "$_dest"
 }
 
@@ -248,7 +248,7 @@ extract_sch5545ec()
 	_sch5545ec_fw="$_sch5545ec_fw/54 D386BEB8-4B54-4E69-94F5-06091F67E0D3"
 	_sch5545ec_fw="$_sch5545ec_fw/0 Raw section/body.bin" # <-- this!
 
-	"$uefiextract" "$_bios" || $err "sch5545 !extract - $dontflash"
+	"$uefiextract" "$_bios" || err "sch5545 !extract - $dontflash"
 	x_ cp "$_sch5545ec_fw" "$_dest"
 }
 
@@ -257,7 +257,7 @@ extract_sch5545ec()
 extract_tbfw()
 {
 	chkvars TBFW_size && fe_ copy_tbfw "$appdir" -type f -name "TBT.bin"
-	[ -f "$_dest" ] || $err "$board: Could not extract tbfw"; :
+	[ -f "$_dest" ] || err "$board: Could not extract tbfw"; :
 }
 
 copy_tbfw()
@@ -284,11 +284,11 @@ fail_inject()
 inject()
 {
 	need_files="n"
-	err="fail_inject"
+	xbmk_err="fail_inject"
 	remkdir "$tmpromdel"
 
 	set +u +e
-	[ $# -lt 1 ] && $err "No options specified. - $dontflash"
+	[ $# -lt 1 ] && err "No options specified. - $dontflash"
 	eval "`setvars "" nukemode new_mac xchanged`"
 
 	archive="$1";
@@ -300,15 +300,15 @@ inject()
 		nukemode="nuke" ;;
 	setmac)
 		[ $# -gt 2 ] && new_mac="$3" && \
-		    [ -z "$new_mac" ] && $err "Empty MAC address specified" ;;
-	*) $err "Unrecognised inject mode: '$2'"
+		    [ -z "$new_mac" ] && err "Empty MAC address specified" ;;
+	*) err "Unrecognised inject mode: '$2'"
 	esac
 	[ "$new_mac" = "keep" ] && new_mac=""
 
 	[ -n "$new_mac" ] && [ "$new_mac" != "restore" ] && \
 		x_ make -C util/nvmutil clean && x_ make -C util/nvmutil
 
-	check_release "$archive" || $err "'$archive' is not a release archive"
+	check_release "$archive" || err "'$archive' is not a release archive"
 
 	readcfg && need_files="y"
 	if [ "$need_files" = "y" ] || [ -n "$new_mac" ]; then
@@ -324,20 +324,20 @@ inject()
 
 check_release()
 {
-	[ -L "$archive" ] && $err "'$archive' is a symlink. $dontflash"
+	[ -L "$archive" ] && err "'$archive' is a symlink. $dontflash"
 	e "$archive" f missing && return 1
 
 	archivename="`basename "$archive"`"
-	[ -z "$archivename" ] && $err "Can't determine archive name. $dontflash"
+	[ -z "$archivename" ] && err "Can't determine archive name. $dontflash"
 
 	case "$archivename" in
 	*_src.tar.xz)
-		$err "'$archive' is a src archive, silly!" ;;
+		err "'$archive' is a src archive, silly!" ;;
 	grub_*|seagrub_*|custom_*|seauboot_*|seabios_withgrub_*)
 		return 1 ;;
 	*.tar.xz) _stripped_prefix="${archivename#*_}"
 		board="${_stripped_prefix%.tar.xz}" ;;
-	*) $err "'$archive': could not detect board type - $dontflash"
+	*) err "'$archive': could not detect board type - $dontflash"
 	esac; :
 }
 
@@ -355,8 +355,8 @@ readcfg()
 	[ -z "$vcfg" ] && return 1
 
 	vfile="config/vendor/$vcfg/pkg.cfg"
-	[ -L "$vfile" ] && $err "'$archive', '$board': $vfile is a symlink"
-	[ -f "$vfile" ] || $err "'$archive', '$board': $vfile doesn't exist"
+	[ -L "$vfile" ] && err "'$archive', '$board': $vfile is a symlink"
+	[ -f "$vfile" ] || err "'$archive', '$board': $vfile doesn't exist"
 
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
@@ -394,14 +394,14 @@ patch_release_roms()
 
 	(
 	[ "$need_files" = "y" ] || exit 0
-	cd "$tmpromdir" || $err "patch '$archive': can't cd $tmpromdir"
+	cd "$tmpromdir" || err "patch '$archive': can't cd $tmpromdir"
 	# NOTE: For compatibility with older rom releases, defer to sha1
 	if [ "$has_hashes" = "y" ] && [ "$nukemode" != "nuke" ]; then
 		sha512sum --status -c "$hashfile" || \
 		    x_ sha1sum --status -c "$hashfile"
 		x_ rm -f "$hashfile"
 	fi
-	) || $err "'$archive' -> Can't verify vendor hashes. $dontflash"
+	) || err "'$archive' -> Can't verify vendor hashes. $dontflash"
 
 	[ -z "$new_mac" ] || modify_mac || printf "\nGbE not defined\n" 1>&2
 
@@ -411,10 +411,10 @@ patch_release_roms()
 	(
 	x_ cd "${tmpromdir%"/bin/$board"}"
 	mkrom_tarball "bin/$board"
-	) || $err "Cannot re-generate '$archive' - $dontflash"
+	) || err "Cannot re-generate '$archive' - $dontflash"
 
 	mv "${tmpromdir%"/bin/$board"}/bin/${relname}_${board}.tar.xz" \
-	    "$archive" || $err "'$archive' -> Can't overwrite - $dontflash"; :
+	    "$archive" || err "'$archive' -> Can't overwrite - $dontflash"; :
 }
 
 prep_rom()
@@ -425,16 +425,16 @@ prep_rom()
 	[ "$nukemode" = "nuke" ] && _xromnew="${_xrom%/*}/$vfix${_xrom##*/}"
 
 	e "$_xrom" f missing && return 0
-	[ -z "${_xromname#"$vfix"}" ] && $err "$_xromname / $vfix: name match"
+	[ -z "${_xromname#"$vfix"}" ] && err "$_xromname / $vfix: name match"
 
 	# Remove the prefix and 1-byte pad
 	if [ "$nukemode" != "nuke" ] && \
 	    [ "${_xromname#"$vfix"}" != "$_xromname" ]; then
-		xromsize="$(expr $(stat -c '%s' "$_xrom") - 1)" || $err "!int"
-		[ $xromsize -lt 524288 ] && $err "too small, $xromsize: $_xrom"
+		xromsize="$(expr $(stat -c '%s' "$_xrom") - 1)" || err "!int"
+		[ $xromsize -lt 524288 ] && err "too small, $xromsize: $_xrom"
 
 		x_ dd if="$_xrom" of="$_xromnew" bs=$xromsize count=1
-		rm -f "$_xrom" || $err "Can't rm $_xrom - $dontflash"
+		rm -f "$_xrom" || err "Can't rm $_xrom - $dontflash"
 
 		_xrom="$_xromnew"
 	fi
@@ -445,7 +445,7 @@ prep_rom()
 	[ "$nukemode" != "nuke" ] && return 0
 
 	# Rename the file, prefixing a warning saying not to flash
-	cat "$_xrom" config/data/coreboot/0 > "$_xromnew" || $err "!pad $_xrom"
+	cat "$_xrom" config/data/coreboot/0 > "$_xromnew" || err "!pad $_xrom"
 	x_ rm -f "$_xrom"
 }
 
@@ -498,7 +498,7 @@ insert()
 	if [ "$_t" = "fsp" ] && [ $# -gt 3 ]; then
 		_offset="$4"
 	elif [ $# -gt 3 ] && _offset="-b $4" && [ -z "$4" ]; then
-		$err "insert $*, $rom: offset given but empty (undefined)"
+		err "insert $*, $rom: offset given but empty (undefined)"
 	fi
 
 	[ "$nukemode" = "nuke" ] || x_ e "$_dest" f
@@ -506,19 +506,19 @@ insert()
 	if [ "$cbfsname" = "IFD" ]; then
 		[ "$nukemode" = "nuke" ] || "$ifdtool" $ifdprefix -i \
 		    $_t:$_dest "$rom" -O "$rom" || \
-		    $err "failed: insert '$_t' '$_dest' on '$rom'"
+		    err "failed: insert '$_t' '$_dest' on '$rom'"
 		[ "$nukemode" != "nuke" ] || "$ifdtool" $ifdprefix --nuke $_t \
-		    "$rom" -O "$rom" || $err "$rom: !nuke IFD/$_t"
+		    "$rom" -O "$rom" || err "$rom: !nuke IFD/$_t"
 	elif [ "$nukemode" = "nuke" ]; then
 		x_ "$cbfstool" "$rom" remove -n "$cbfsname"
 	elif [ "$_t" = "stage" ]; then # the only stage we handle is refcode
 		x_ rm -f "$xbmklocal/refcode"
 		"$rmodtool" -i "$_dest" -o "$xbmklocal/refcode" || "!reloc ref"
 		"$cbfstool" "$rom" add-stage -f "$xbmklocal/refcode" \
-		    -n "$cbfsname" -t stage || $err "$rom: !add ref"
+		    -n "$cbfsname" -t stage || err "$rom: !add ref"
 	else
 		"$cbfstool" "$rom" add -f "$_dest" -n "$cbfsname" \
-		    -t $_t $_offset || $err "$rom !add $_t ($_dest)"
+		    -t $_t $_offset || err "$rom !add $_t ($_dest)"
 	fi
 	xchanged="y"; :
 }
diff --git a/include/lib.sh b/include/lib.sh
index b2888fb6..eb4cddca 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -15,8 +15,8 @@ remkdir()
 
 mkrom_tarball()
 {
-	printf "%s\n" "$version" > "$1/.version" || $err "$1 !version"
-	printf "%s\n" "$versiondate" > "$1/.versiondate" || $err "$1 !vdate"
+	printf "%s\n" "$version" > "$1/.version" || err "$1 !version"
+	printf "%s\n" "$versiondate" > "$1/.versiondate" || err "$1 !vdate"
 
 	mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz"
 	x_ rm -Rf "$1"
@@ -26,15 +26,15 @@ mktarball()
 {
 	printf "Creating tar archive '%s' from directory '%s'\n" "$2" "$1"
 	[ "${2%/*}" = "$2" ] || x_ mkdir -p "${2%/*}"
-	x_ tar -c "$1" | xz -T$XBMK_THREADS -9e > "$2" || $err "mktarball2, $1"
+	x_ tar -c "$1" | xz -T$XBMK_THREADS -9e > "$2" || err "mktarball2, $1"
 }
 
 mksha512sum()
 {
 	(
 	[ "${1%/*}" != "$1" ] && x_ cd "${1%/*}"
-	sha512sum ./"${1##*/}" >> "$2" || $err "!sha512sum \"$1\" > \"$2\""
-	) || $err "failed to create tarball checksum"
+	sha512sum ./"${1##*/}" >> "$2" || err "!sha512sum \"$1\" > \"$2\""
+	) || err "failed to create tarball checksum"
 }
 
 rmgit()
@@ -58,7 +58,7 @@ xbmkget()
 	for url in "$1" "$2"; do
 		[ "$dl_fail" = "n" ] && break
 		[ -z "$url" ] && continue
-		rm -f "$cached" || $err "!rm -f '$cached'"
+		rm -f "$cached" || err "!rm -f '$cached'"
 		if [ "$_dlop" = "curl" ]; then
 			curl --location --retry 3 -A "$_ua" "$url" \
 			    -o "$cached" || wget --tries 3 -U "$_ua" "$url" \
@@ -72,11 +72,11 @@ xbmkget()
 				    "$1" "$2" "$3" "$4" "$url" 1>&2 && continue
 			cp "$url" "$cached" || continue
 		else
-			$err "$1 $2 $3 $4: Unsupported dlop type: '$_dlop'"
+			err "$1 $2 $3 $4: Unsupported dlop type: '$_dlop'"
 		fi
 		bad_checksum "$4" "$cached" || dl_fail="n"
 	done
-	[ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: not downloaded"
+	[ "$dl_fail" = "y" ] && err "$1 $2 $3 $4: not downloaded"
 	[ "$cached" = "$3" ] || x_ cp "$cached" "$3"; :
 }
 
@@ -99,7 +99,7 @@ e()
 
 mk()
 {
-	mk_flag="$1" || $err "No argument given"
+	mk_flag="$1" || err "No argument given"
 	shift 1 && for mk_arg in "$@"; do
 		x_ ./mk $mk_flag $mk_arg
 	done; :
@@ -107,7 +107,7 @@ mk()
 
 check_defconfig()
 {
-	[ -d "$1" ] || $err "Target '$1' not defined."
+	[ -d "$1" ] || err "Target '$1' not defined."
 	for x in "$1"/config/*; do
 		[ -f "$x" ] && printf "%s\n" "$x" && return 1
 	done; :
@@ -117,7 +117,7 @@ setvars()
 {
 	_setvars=""
 	if [ $# -lt 2 ]; then
-		printf "\$err \"setvars: too few args\\n\""
+		printf "err \"setvars: too few args\\n\""
 		return 0
 	fi
 	val="$1"
@@ -132,15 +132,15 @@ setcfg()
 {
 	[ $# -gt 1 ] && printf "e \"%s\" f missing && return %s;\n" "$1" "$2"
 	[ $# -gt 1 ] || \
-		printf "e \"%s\" f not && %s \"Missing config\";\n" "$1" "$err"
-	printf ". \"%s\" || %s \"Could not read config\";\n" "$1" "$err"
+		printf "e \"%s\" f not && err \"Missing config\";\n" "$1"
+	printf ". \"%s\" || err \"Could not read config\";\n" "$1"
 }
 
 chkvars()
 {
 	for var in "$@"; do
-		eval "[ -n \"\${$var+x}\" ] || \$err \"$var unset\""
-		eval "[ -n \"\$$var\" ] || \$err \"$var unset\""
+		eval "[ -n \"\${$var+x}\" ] || err \"$var unset\""
+		eval "[ -n \"\$$var\" ] || err \"$var unset\""
 	done; :
 }
 
@@ -160,7 +160,7 @@ find_ex()
 	fd="`mktemp`" && x_ rm -f "$fd" && x_ touch "$fd"
 	xx="$1" && shift 1
 	$xmsg find "$@" 2>/dev/null | sort > "$fd" || \
-	    $err "!find $(echo "$@") > \"$fd\""
+	    err "!find $(echo "$@") > \"$fd\""
 	while read -r fx; do
 		$xx "$fx" || break; :
 	done < "$fd"
@@ -169,8 +169,35 @@ find_ex()
 
 x_()
 {
-	[ $# -lt 1 ] || [ -n "$1" ] || $err "Empty first arg: x_ $(echo "$@")"
-	[ $# -lt 1 ] || "$@" || $err "Unhandled error for: $(echo "$@")"; :
+	[ $# -lt 1 ] || [ -n "$1" ] || err "Empty first arg: x_ $(echo "$@")"
+	[ $# -lt 1 ] || "$@" || err "Unhandled error for: $(echo "$@")"; :
+}
+
+err()
+{
+	xbmk_err_val=0
+
+	real_err="$xbmk_err"
+	if [ -z "$xbmk_err" ]; then
+		printf "WARNING: err not set. Args: %s\n" "$(echo "$@")" 1>&2
+		printf "REMARK: Setting err to default 'err_' value\n" 1>&2
+		real_err="err_"
+	fi
+
+	(
+	$real_err "$@" || printf \
+	    "WARNING: Err function '%s' *returned* 1. Will exit 1 anyway\n" \
+	    "$real_err"
+	printf "WARNING: Err function '%s' didn't exit. Will exit 1 anyway\n" \
+	    "$real_err" 1>&2
+	exit 1
+	) || xbmk_err_val=1 # otherwise, it wrongly did exit 0, not exit 1
+
+	[ $xbmk_err_val -eq 0 ] && printf \
+	    "WARNING: Err function '%s' did exit 0. Will exit 1 anyway.\n" \
+	    "$real_err" 1>&2
+
+	exit 1
 }
 
 err_()
diff --git a/include/mrc.sh b/include/mrc.sh
index eaf39dcb..a1dcb140 100644
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -11,7 +11,7 @@ extract_mrc()
 	extract_shellball
 
 	"$cbfstool" "$appdir/"bios.bin extract -n mrc.bin \
-	    -f "$_dest" -r RO_SECTION || $err "extract_mrc: !$cbfstool $_dest"
+	    -f "$_dest" -r RO_SECTION || err "extract_mrc: !$cbfstool $_dest"
 
 	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && extract_refcode extra; :
 }
@@ -27,7 +27,7 @@ extract_refcode()
 	# incompatible with older versions before coreboot 4.14,
 	# so we need coreboot 4.13 cbfstool for certain refcode files
 	chkvars cbfstoolref
-	mkdir -p "${_refdest%/*}" || $err "ref: !mkdir -p ${_refdest%/*}"
+	mkdir -p "${_refdest%/*}" || err "ref: !mkdir -p ${_refdest%/*}"
 
 	x_ "$cbfstoolref" "$appdir/bios.bin" extract \
 	    -m x86 -n fallback/refcode -f "$_refdest" -r RO_SECTION
@@ -46,7 +46,7 @@ extract_shellball()
 	x_ cd "$appdir"
 	extract_partition "${MRC_url##*/}"
 	extract_archive "$SHELLBALL" .
-	) || $err "mrc download/extract failure"; :
+	) || err "mrc download/extract failure"; :
 }
 
 extract_partition()
@@ -59,8 +59,8 @@ extract_partition()
 	SIZE=$(( $( echo $ROOTP | cut -f4 -d\ | tr -d "B" ) ))
 
 	dd if="${1%.zip}" of="root-a.ext2" bs=1024 skip=$(( $START / 1024 )) \
-	    count=$(( $SIZE / 1024 )) || $err "ex dd ${1%.zip}, root-a.ext2"
+	    count=$(( $SIZE / 1024 )) || err "ex dd ${1%.zip}, root-a.ext2"
 
 	printf "cd /usr/sbin\ndump chromeos-firmwareupdate %s\nquit" \
-	    "$SHELLBALL" | debugfs "root-a.ext2" || $err "!extract shellball"
+	    "$SHELLBALL" | debugfs "root-a.ext2" || err "!extract shellball"
 }
diff --git a/include/rom.sh b/include/rom.sh
index ec464d85..af739d92 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -11,7 +11,7 @@ mkserprog()
 {
 	[ "$_f" = "-d" ] && return 0 # dry run
 	basename -as .h "$serdir/"*.h > "$xbmktmp/ser" || \
-	    $err "!mk $1 $xbmktmp"
+	    err "!mk $1 $xbmktmp"
 
 	while read -r sertarget; do
 		[ "$1" = "pico" ] && x_ cmake -DPICO_BOARD="$sertarget" \
@@ -33,8 +33,8 @@ copyps1bios()
 	x_ cp src/pcsx-redux/src/mips/openbios/openbios.bin bin/playstation
 
 	printf "MIT License\n\nCopyright (c) 2019-2024 PCSX-Redux authors\n\n" \
-	    > bin/playstation/COPYING.txt || $err "!pcsx-redux copyright"
-	cat config/snippet/mit >>bin/playstation/COPYING.txt || $err "!pcsx MIT"
+	    > bin/playstation/COPYING.txt || err "!pcsx-redux copyright"
+	cat config/snippet/mit >>bin/playstation/COPYING.txt || err "!pcsx MIT"
 }
 
 mkpayload_grub()
@@ -55,7 +55,7 @@ mkvendorfiles()
 	[ -z "$mode" ] && $dry cook_coreboot_config
 	check_coreboot_utils "$tree"
 	printf "%s\n" "${version%%-*}" > "$srcdir/.coreboot-version" || \
-	    $err "!mk $srcdir .coreboot-version"
+	    err "!mk $srcdir .coreboot-version"
 	[ -z "$mode" ] && [ "$target" != "$tree" ] && \
 	    x_ ./mk download "$target"; :
 }
@@ -64,8 +64,8 @@ cook_coreboot_config()
 {
 	[ -f "$srcdir/.config" ] || return 0
 	printf "CONFIG_CCACHE=y\n" >> "$srcdir/.config" || \
-	    $err "$srcdir/.config: Could not enable ccache"
-	make -C "$srcdir" oldconfig || $err "Could not cook $srcdir/.config"; :
+	    err "$srcdir/.config: Could not enable ccache"
+	make -C "$srcdir" oldconfig || err "Could not cook $srcdir/.config"; :
 }
 
 check_coreboot_utils()
@@ -105,7 +105,7 @@ mkcorebootbin()
 
 	[ "$payload_uboot_i386" = "y" ] && \
 	    [ "$payload_uboot_amd64" = "y" ] && \
-		$err "'$target' enables 32- and 64-bit x86 U-Boot"
+		err "'$target' enables 32- and 64-bit x86 U-Boot"
 
 	if [ "$payload_uboot_i386" = "y" ] || \
 	    [ "$payload_uboot_amd64" = "y" ]; then
@@ -118,7 +118,7 @@ mkcorebootbin()
 	[ "$payload_uboot" = "y" ] || payload_seabios="y"
 	[ "$payload_grub" = "y" ] && payload_seabios="y"
 	[ "$payload_seabios" = "y" ] && [ "$payload_uboot" = "y" ] && \
-	    $dry $err "$target: U-Boot(arm64) and SeaBIOS/GRUB both enabled."
+	    $dry err "$target: U-Boot(arm64) and SeaBIOS/GRUB both enabled."
 
 	[ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata"
 
@@ -180,7 +180,7 @@ add_grub()
 	    _grubname="fallback/payload"
 	cbfs "$tmprom" "$grubelf" "$_grubname"
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
-	    > "$xbmktmp/tmpcfg" || $err "$target: !insert scandisk"
+	    > "$xbmktmp/tmpcfg" || err "$target: !insert scandisk"
 	cbfs "$tmprom" "$xbmktmp/tmpcfg" scan.cfg raw
 	[ "$initmode" != "normal" ] && [ "$displaymode" != "txtmode" ] && \
 	    cbfs "$tmprom" "$grubdata/background/background1280x800.png" \
diff --git a/mk b/mk
index 5a4afadf..55f67a92 100755
--- a/mk
+++ b/mk
@@ -29,7 +29,7 @@ main()
 	version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
 	release|download|inject) $cmd "$@" ;;
 	-*) return 1 ;;
-	*) $err "bad command" ;;
+	*) err "bad command" ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
 }
@@ -40,11 +40,11 @@ release()
 
 	vdir="release"
 	while getopts d:m: option; do
-		[ -z "$OPTARG" ] && $err "empty argument not allowed"
+		[ -z "$OPTARG" ] && err "empty argument not allowed"
 		case "$option" in
 		d) vdir="$OPTARG" ;;
 		m) mode="$OPTARG" ;;
-		*) $err "invalid option '-$option'" ;;
+		*) err "invalid option '-$option'" ;;
 		esac
 	done
 
@@ -52,10 +52,10 @@ release()
 	src_dirname="${relname}_src"
 	srcdir="$vdir/$src_dirname"
 
-	[ -e "$vdir" ] && $err "already exists: \"$vdir\""
-	mkdir -p "$vdir" || $err "mkvdir: !mkdir -p \"$vdir\""
-	git clone . "$srcdir" || $err "mkdir: !gitclone \"$srcdir\""
-	touch "$srcdir/lock" || $err "can't make lock file in $srcdir/"
+	[ -e "$vdir" ] && err "already exists: \"$vdir\""
+	mkdir -p "$vdir" || err "mkvdir: !mkdir -p \"$vdir\""
+	git clone . "$srcdir" || err "mkdir: !gitclone \"$srcdir\""
+	touch "$srcdir/lock" || err "can't make lock file in $srcdir/"
 
 	build_release
 
@@ -65,32 +65,32 @@ release()
 build_release()
 {
 	(
-	cd "$srcdir" || $err "$vdir: !cd \"$srcdir\""
+	cd "$srcdir" || err "$vdir: !cd \"$srcdir\""
 
 	./mk -f
 	rmgit .
 	x_ mv src/docs docs
-	) || $err "can't create release files"
+	) || err "can't create release files"
 
 	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
-	    --abbrev-commit > "$srcdir/CHANGELOG" || $err "!gitlog $srcdir"
-	rm -f "$srcdir/lock" || $err "can't remove lock file in $srcdir"
+	    --abbrev-commit > "$srcdir/CHANGELOG" || err "!gitlog $srcdir"
+	rm -f "$srcdir/lock" || err "can't remove lock file in $srcdir"
 
 	(
-	cd "${srcdir%/*}" || $err "$vdir: mktarball \"$srcdir\""
-	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || $err "$vdir: mksrc"
-	) || $err "can't create src tarball"
+	cd "${srcdir%/*}" || err "$vdir: mktarball \"$srcdir\""
+	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || err "$vdir: mksrc"
+	) || err "can't create src tarball"
 	[ "$mode" = "src" ] && return 0
 
-	touch "$srcdir/lock" || $err "can't make lock file in $srcdir/"
+	touch "$srcdir/lock" || err "can't make lock file in $srcdir/"
 	(
-	cd "$srcdir" || $err "$vdir: 2 !cd \"$srcdir\""
+	cd "$srcdir" || err "$vdir: 2 !cd \"$srcdir\""
 	x_ ./mk -d coreboot
 	mk -b coreboot pico-serprog stm32-vserprog pcsx-redux
 	x_ mv bin ../roms
-	) || $err "can't build rom images"
+	) || err "can't build rom images"
 
-	rm -Rf "$srcdir" || $err "!rm -Rf $srcdir"
+	rm -Rf "$srcdir" || err "!rm -Rf $srcdir"
 }
 
 main "$@" && exit 0
@@ -110,7 +110,7 @@ trees()
 	flags="f:b:m:u:c:x:s:l:n:d:"
 
 	while getopts $flags option; do
-		[ -n "$_f" ] && $err "only one flag is permitted"
+		[ -n "$_f" ] && err "only one flag is permitted"
 		_f="$1"
 
 		case "$_f" in
@@ -126,7 +126,7 @@ trees()
 		-s) mode="savedefconfig" ;;
 		-l) mode="olddefconfig" ;;
 		-n) mode="nconfig" ;;
-		*) $err "invalid option '-$option'" ;;
+		*) err "invalid option '-$option'" ;;
 		esac
 
 		if [ -z "${OPTARG+x}" ]; then
@@ -137,14 +137,14 @@ trees()
 		project="${OPTARG#src/}"
 		shift 2
 	done
-	[ -z "$_f" ] && $err "missing flag ($flags)"
+	[ -z "$_f" ] && err "missing flag ($flags)"
 	if [ -z "$project" ]; then
 		mk $_f $(ls -1 config/git)
 		return 1
 	fi
 
 	[ -f "config/git/$project/pkg.cfg" ] || \
-	    $err "config/git/$project/pkg.cfg missing"
+	    err "config/git/$project/pkg.cfg missing"
 
 	for d in "elf" "config/data" "config" "src"; do
 		eval "${d#*/}dir=\"$d/$project\""
@@ -180,8 +180,8 @@ build_project()
 
 build_targets()
 {
-	[ -d "$configdir" ] || $err "directory, $configdir, does not exist"
-	[ $# -gt 0 ] || targets="$(ls -1 "$configdir")" || $err "!o $configdir"
+	[ -d "$configdir" ] || err "directory, $configdir, does not exist"
+	[ $# -gt 0 ] || targets="$(ls -1 "$configdir")" || err "!o $configdir"
 
 	for x in $targets; do
 		unset CROSS_COMPILE
@@ -267,7 +267,7 @@ build_dependencies()
 	for bd in $build_depend; do
 		bd_p="${bd%%/*}"
 		bd_t="${bd##*/}"
-		[ -z "$bd_p" ] && $dry $err "$project/$tree: !bd '$bd'"
+		[ -z "$bd_p" ] && $dry err "$project/$tree: !bd '$bd'"
 		[ "${bd##*/}" = "$bd" ] && bd_t=""
 		[ -z "$bd_p" ] || $dry x_ ./mk -b $bd_p $bd_t; :
 	done; :
@@ -281,14 +281,14 @@ check_project_hashes()
 
 	fx_ "x_ sha512sum" "$datadir" "$configdir/$tree" "$mdir" \
 	    -type f -not -path "*/.git*/*" | awk '{print $1}' > \
-	    "$xbmktmp/project.hash" || $err "!h $project $tree"
+	    "$xbmktmp/project.hash" || err "!h $project $tree"
 
 	pjhash="$(sha512sum "$xbmktmp/project.hash" | awk '{print $1}')" || :
 	[ "$pjhash" != "$old_pjhash" ] && badhash="y"
 	[ -f "$XBMK_CACHE/hash/$project$tree" ] || badhash="y"
 
 	printf "%s\n" "$pjhash" > "$XBMK_CACHE/hash/$project$tree" || \
-	    $err "!mk $XBMK_CACHE/hash/$project$tree"
+	    err "!mk $XBMK_CACHE/hash/$project$tree"
 
 	[ "$badhash" != "y" ] || x_ rm -Rf "src/$project/$tree" \
 	    "elf/$project/$tree" "elf/$project/$target"; :
@@ -323,12 +323,12 @@ check_cross_compiler()
 # gnat in PATH never resolves to gnat-14, because gnat-14 was "experimental"
 check_gnu_path()
 {
-	command -v "$1" 1>/dev/null || $err "Host '$1' unavailable"
+	command -v "$1" 1>/dev/null || err "Host '$1' unavailable"
 
 	eval "`setvars "" gccver gccfull gnatver gnatfull gccdir gnatdir`"
 	x_ gnu_setver "$1" "$1" && gnu_setver "$2" "$2" || :
 
-	eval "[ -z \"\$$1ver\" ] && $err \"Cannot detect host '$1' version\""
+	eval "[ -z \"\$$1ver\" ] && err \"Cannot detect host '$1' version\""
 	[ "$gnatfull" = "$gccfull" ] && return 0
 
 	eval "$1dir=\"$(dirname "$(command -v "$1")")\""
@@ -346,7 +346,7 @@ check_gnu_path()
 		_gnuutil="${_gnubin##*/}" && [ -e "$_gnubin" ] && \
 		    x_ ln -s "$_gnubin" "${_gnuutil%"-$_gnuver"}"
 	done
-	) || $err "Cannot create $2-$_gnuver link in $_gnudir"; :
+	) || err "Cannot create $2-$_gnuver link in $_gnudir"; :
 }
 
 gnu_setver()
@@ -360,7 +360,7 @@ gnu_setver()
 
 check_defconfig()
 {
-	[ -f "$defconfig" ] || $dry $err "$project/$target: missing defconfig"
+	[ -f "$defconfig" ] || $dry err "$project/$target: missing defconfig"
 	dest_dir="$elfdir/$target/${defconfig#"$target_dir/config/"}"
 
 	$dry elfcheck || return 1 # skip build if a previous one exists
@@ -383,7 +383,7 @@ handle_makefile()
 	[ -n "$mode" ] || [ -n "$btype" ] || $dry make -C \
 	    "$srcdir" silentoldconfig || make -C "$srcdir" oldconfig || :
 
-	run_make_command || $err "handle_makefile $srcdir: no makefile!"
+	run_make_command || err "handle_makefile $srcdir: no makefile!"
 
 	_copy=".config" && [ "$mode" = "savedefconfig" ] && _copy="defconfig"
 	[ "${mode%config}" = "$mode" ] || \
@@ -419,11 +419,11 @@ check_cmake()
 check_autoconf()
 {
 	(
-	cd "$1" || $err "!cd $1"
+	cd "$1" || err "!cd $1"
 	[ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs
 	[ -f "autogen.sh" ] && x_ ./autogen.sh $autogenargs
 	[ -f "configure" ] && x_ ./configure $autoconfargs; :
-	) || $err "can't bootstrap project: $1"; :
+	) || err "can't bootstrap project: $1"; :
 }
 
 check_makefile()

From 37ca0c90e1cc8dc3f85b9cdd96c9cd6faea0862a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 10:18:33 +0100
Subject: [PATCH 1330/1549] lib.sh err: add missing redirect to stderr

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index eb4cddca..1bfe2060 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -187,7 +187,7 @@ err()
 	(
 	$real_err "$@" || printf \
 	    "WARNING: Err function '%s' *returned* 1. Will exit 1 anyway\n" \
-	    "$real_err"
+	    "$real_err" 1>&2
 	printf "WARNING: Err function '%s' didn't exit. Will exit 1 anyway\n" \
 	    "$real_err" 1>&2
 	exit 1

From 9611c19e7ed1be42c8da8228235d9626eb853acf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 16:03:34 +0100
Subject: [PATCH 1331/1549] init.sh: tidy up xbmk_child_exec()

make the command style more consistent, for example
relying on x_ inside a subshell to print the command
and arguments if a command failed.

this is a good style, and i'll probably use it in other
places on lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index ce9cf9a9..e8ff6b63 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -204,8 +204,8 @@ xbmk_child_exec()
 {
 	xbmk_rval=0
 	( x_ ./mk "$@" ) || xbmk_rval=1
-	rm -Rf "$xbmklocal" "$xbmktmp" || xbmk_rval=1
-	rm -f lock || xbmk_rval=1
+	( x_ rm -Rf "$xbmklocal" "$xbmktmp" ) || xbmk_rval=1
+	( x_ rm -f lock ) || xbmk_rval=1
 	exit $xbmk_rval
 }
 

From 8b7bd992f66d554c50495fb87426bf3b8580dcb9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 16:12:23 +0100
Subject: [PATCH 1332/1549] init.sh: define lock file in a variable instead

don't hardcode it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index e8ff6b63..9e05d503 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -17,12 +17,14 @@ xbmkpath="$PATH"
 xbmk_err="err_"
 
 eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
-    datadir version xbmkpwd relname xbmkpwd xbmktmp python pyver xbmklocal`"
+    datadir version xbmkpwd relname xbmkpwd xbmktmp python pyver xbmklocal \
+    xbmklock`"
 
 xbmk_init()
 {
 	xbmkpwd="`pwd`" || err "Cannot generate PWD"
 	xbmklocal="$xbmkpwd/tmp"
+	xbmklock="$xbmkpwd/lock"
 
 	export PWD="$xbmkpwd"
 
@@ -184,8 +186,8 @@ xbmk_create_tmpdir()
 
 xbmk_lock()
 {
-	[ -f "lock" ] && err "$xbmkpwd/lock exists. Is a build running?"
-	touch lock || err "cannot create 'lock' file"; :
+	[ -f "$xbmklock" ] && err "$xbmklock exists. Is a build running?"
+	touch "$xbmklock" || err "cannot create '$xbmklock'"; :
 }
 
 xbmk_create_pathdirs()
@@ -205,7 +207,7 @@ xbmk_child_exec()
 	xbmk_rval=0
 	( x_ ./mk "$@" ) || xbmk_rval=1
 	( x_ rm -Rf "$xbmklocal" "$xbmktmp" ) || xbmk_rval=1
-	( x_ rm -f lock ) || xbmk_rval=1
+	( x_ rm -f "$xbmklock" ) || xbmk_rval=1
 	exit $xbmk_rval
 }
 

From b51846da6dead8f138858dcdb3da0b78d713e580 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 16:14:50 +0100
Subject: [PATCH 1333/1549] init.sh: single-quote xbmklock in xbmk_lock()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/init.sh b/include/init.sh
index 9e05d503..349d40ed 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -186,7 +186,7 @@ xbmk_create_tmpdir()
 
 xbmk_lock()
 {
-	[ -f "$xbmklock" ] && err "$xbmklock exists. Is a build running?"
+	[ -f "$xbmklock" ] && err "'$xbmklock' exists. Is a build running?"
 	touch "$xbmklock" || err "cannot create '$xbmklock'"; :
 }
 

From 4020fb432805cfc7ebd243b0873574f25182ba40 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 16:23:11 +0100
Subject: [PATCH 1334/1549] lib.sh: simplify err()

Rely once again on err_, but still explicitly add an exit
just below, in case I made a mistake one day.

err() is essentially a trap that triggers in case I mess
up an error function, so that it doesn't reliably exit.

So, the idea is that everything calls err(), and err() is
almost never modified, or modified very carefully.

If error exits were ever broken, the result could be quite
unpredictable, so lbmk has very strict error handling, and
great care is taken to ensure that it does reliably exit.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 16 +++++-----------
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 1bfe2060..e7b5bd3d 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -185,19 +185,13 @@ err()
 	fi
 
 	(
-	$real_err "$@" || printf \
-	    "WARNING: Err function '%s' *returned* 1. Will exit 1 anyway\n" \
-	    "$real_err" 1>&2
-	printf "WARNING: Err function '%s' didn't exit. Will exit 1 anyway\n" \
-	    "$real_err" 1>&2
-	exit 1
+	$real_err "$@" || err_ "Error function '$real_err' *returned* 1"
+	err_ "Error function '$real_err' didn't exit"
+	exit 1 # just in case!
 	) || xbmk_err_val=1 # otherwise, it wrongly did exit 0, not exit 1
 
-	[ $xbmk_err_val -eq 0 ] && printf \
-	    "WARNING: Err function '%s' did exit 0. Will exit 1 anyway.\n" \
-	    "$real_err" 1>&2
-
-	exit 1
+	[ $xbmk_err_val -eq 0 ] && err_ "Error function '$real_err' did exit 0"
+	exit 1 # just in case!
 }
 
 err_()

From 61e5fd1a0b2791b2819a5d0e58fa76208a4e8774 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 16:28:22 +0100
Subject: [PATCH 1335/1549] lib.sh: Add warning if x_ is called without args

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/lib.sh b/include/lib.sh
index e7b5bd3d..fbbb92da 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -169,6 +169,7 @@ find_ex()
 
 x_()
 {
+	[ $# -lt 1 ] && printf "WARNING: x_ called without arguments\n" 1>&2
 	[ $# -lt 1 ] || [ -n "$1" ] || err "Empty first arg: x_ $(echo "$@")"
 	[ $# -lt 1 ] || "$@" || err "Unhandled error for: $(echo "$@")"; :
 }

From 51b2a1159d0d915c080565ba8d2f41203cef6f80 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 16:30:45 +0100
Subject: [PATCH 1336/1549] lib.sh: simplify err-not-set handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index fbbb92da..e54fd6b4 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -180,8 +180,7 @@ err()
 
 	real_err="$xbmk_err"
 	if [ -z "$xbmk_err" ]; then
-		printf "WARNING: err not set. Args: %s\n" "$(echo "$@")" 1>&2
-		printf "REMARK: Setting err to default 'err_' value\n" 1>&2
+		printf "WARNING: err not set. Defaulting to 'err_'\n" 1>&2
 		real_err="err_"
 	fi
 

From a3b5626f53db69ed22dc395221ba515d3f74b728 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 16:32:03 +0100
Subject: [PATCH 1337/1549] lib.sh: stricter xbmk_err check in err()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index e54fd6b4..c9be740a 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -177,9 +177,9 @@ x_()
 err()
 {
 	xbmk_err_val=0
+	real_err="" && [ -n "${xbmk_err+x}" ] && real_err="$xbmk_err"
 
-	real_err="$xbmk_err"
-	if [ -z "$xbmk_err" ]; then
+	if [ -z "$real_err" ]; then
 		printf "WARNING: err not set. Defaulting to 'err_'\n" 1>&2
 		real_err="err_"
 	fi

From 5e3aaa1eb8b6f0198723ca67cda07b0990744132 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 16:49:30 +0100
Subject: [PATCH 1338/1549] init.sh: Run git name/email check before init

Otherwise, it returns if init is already done, which
later leads to build errors in coreboot.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 349d40ed..b9df34bb 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -147,6 +147,11 @@ xbmk_set_version()
 
 xbmk_git_init()
 {
+	for gitarg in "--global user.name" "--global user.email"; do
+		gitcmd="git config $gitarg"; $gitcmd || err \
+		    "Please run this first: $gitcmd \"your ${gitcmd##*.}\""
+	done
+
 	[ -L ".git" ] && return 1
 	[ -e ".git" ] && return 0
 	eval "`setvars "$(date -Rud @$versiondate)" cdate _nogit`"
@@ -156,12 +161,7 @@ xbmk_git_init()
 	x_ git commit -m "$projectname $version" --date "$cdate" \
 	    --author="xbmk <xbmk@example.com>" 1>/dev/null 2>/dev/null
 	x_ git tag -a "$version" -m "$projectname $version" 1>/dev/null \
-	    2>/dev/null
-
-	for gitarg in "--global user.name" "--global user.email"; do
-		gitcmd="git config $gitarg"; $gitcmd || err \
-		    "Please run this first: $gitcmd \"your ${gitcmd##*.}\""
-	done
+	    2>/dev/null; :
 }
 
 xbmk_create_tmpdir()

From 35265731c5b1bfef4bd4e94722c67be8284c7d64 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 16:50:50 +0100
Subject: [PATCH 1339/1549] init.sh: Silence the output of git config --global

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index b9df34bb..8f5ab059 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -148,8 +148,8 @@ xbmk_set_version()
 xbmk_git_init()
 {
 	for gitarg in "--global user.name" "--global user.email"; do
-		gitcmd="git config $gitarg"; $gitcmd || err \
-		    "Please run this first: $gitcmd \"your ${gitcmd##*.}\""
+		gitcmd="git config $gitarg"; $gitcmd 1>/dev/null 2>/dev/null \
+		    || err "Run this first: $gitcmd \"your ${gitcmd##*.}\""
 	done
 
 	[ -L ".git" ] && return 1

From 20c873085874c277ce0e10ec7792bbee94d1c63f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 4 May 2025 16:53:02 +0100
Subject: [PATCH 1340/1549] lib.sh: Provide error message where none is given

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/lib.sh b/include/lib.sh
index c9be740a..71183874 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -196,6 +196,7 @@ err()
 
 err_()
 {
+	[ $# -lt 1 ] && printf "ERROR (but no error message provided)\n" 1>&2
 	[ $# -lt 1 ] || printf "ERROR %s: %s\n" "$0" "$1" 1>&2 || :
 	exit 1
 }

From 428c46ca2b1fee04625d37bec65c30f0baf87530 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 05:20:47 +0100
Subject: [PATCH 1341/1549] lib.sh: set -u -e in err()

Some parts of lbmk set +u +e, to be reset later on
under normal conditions upon exit. We must ensure
such level of integrity in err() as well.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/lib.sh b/include/lib.sh
index 71183874..43b1a318 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -176,6 +176,8 @@ x_()
 
 err()
 {
+	set -u -e
+
 	xbmk_err_val=0
 	real_err="" && [ -n "${xbmk_err+x}" ] && real_err="$xbmk_err"
 

From 153dd76a82e98a7260424cf37d5a139fff39d2ab Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 05:41:21 +0100
Subject: [PATCH 1342/1549] inject.sh: tidy up the deguard command

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index e2987aad..0e81c63f 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -189,10 +189,9 @@ apply_me11_deguard_mod()
 {
 	(
 	x_ cd src/deguard/
-	x_ ./finalimage.py --delta "data/delta/$ME11delta" \
-	    --version "$ME11version" \
-	    --pch "$ME11pch" --sku "$ME11sku" --fake-fpfs data/fpfs/zero \
-	    --input "$_metmp" --output "$_me"
+	x_ ./finalimage.py --delta "data/delta/$ME11delta" --version \
+	    "$ME11version" --pch "$ME11pch" --sku "$ME11sku" --fake-fpfs \
+	    data/fpfs/zero --input "$_metmp" --output "$_me"
 	) || err "Error running deguard for $_me - $dontflash"
 }
 

From eb882de94cbe78e575b97ced611a06553f94dbc7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 05:43:38 +0100
Subject: [PATCH 1343/1549] inject.sh: tidy up intel me handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 18 ++++++------------
 1 file changed, 6 insertions(+), 12 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 0e81c63f..c6c8c2d2 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -142,8 +142,12 @@ extract_intel_me()
 	[ "$ME11bootguard" = "y" ] && x_ ./mk -f deguard
 
 	extract_intel_me_bruteforce
-	if [ "$ME11bootguard" = "y" ]; then
-		apply_me11_deguard_mod
+	if [ "$ME11bootguard" = "y" ]; then (
+		x_ cd src/deguard/
+		x_ ./finalimage.py --delta "data/delta/$ME11delta" --version \
+		    "$ME11version" --pch "$ME11pch" --sku "$ME11sku" \
+		    --fake-fpfs data/fpfs/zero --input "$_metmp" --output "$_me"
+		) || err "Error running deguard for $_me - $dontflash"
 	else
 		mv "$_metmp" "$_me" || err "!mv $_metmp $_me - $dontflash"
 	fi
@@ -185,16 +189,6 @@ extract_intel_me_bruteforce()
 	rm -Rf "$sdir" || err "extract_intel_me: !rm -Rf $sdir - $dontflash"
 }
 
-apply_me11_deguard_mod()
-{
-	(
-	x_ cd src/deguard/
-	x_ ./finalimage.py --delta "data/delta/$ME11delta" --version \
-	    "$ME11version" --pch "$ME11pch" --sku "$ME11sku" --fake-fpfs \
-	    data/fpfs/zero --input "$_metmp" --output "$_me"
-	) || err "Error running deguard for $_me - $dontflash"
-}
-
 extract_archive()
 {
 	[ $# -gt 2 ] && [ "$3" = "fsp" ] && x_ python \

From b7ca59debe6e9895485c9c54e820161cb572aebc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 06:00:23 +0100
Subject: [PATCH 1344/1549] inject.sh: Move FSP extraction only to extract_fsp

Don't do FSP-specific extraction in extract_archive, as
that is not what the latter is for.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index c6c8c2d2..80a691f2 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -121,10 +121,10 @@ fetch()
 
 	x_ mkdir -p "${_dest%/*}"
 	remkdir "$appdir"
-	extract_archive "$_dl" "$appdir" "$dl_type" || \
+	[ "$dl_type" = "fsp" ] || extract_archive "$_dl" "$appdir" || \
 	    [ "$dl_type" = "e6400vga" ] || err "$_dest $dl_type: !extract"
 
-	eval "extract_$dl_type"
+	x_ extract_$dl_type "$_dl" "$appdir"
 	set -u -e
 	e "$_dest" f missing && err "!extract_$dl_type. $dontflash"; :
 }
@@ -191,10 +191,6 @@ extract_intel_me_bruteforce()
 
 extract_archive()
 {
-	[ $# -gt 2 ] && [ "$3" = "fsp" ] && x_ python \
-	    "$cbdir/3rdparty/fsp/Tools/SplitFspBin.py" split -f "$1" -o "$2" \
-	    -n "Fsp.fd" && return 0
-
 	innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
 	    "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
 
@@ -261,7 +257,8 @@ copy_tbfw()
 
 extract_fsp()
 {
-	x_ cp "$appdir/"Fsp_*.fd "${_dest%/*}"
+	x_ python "$cbdir/3rdparty/fsp/Tools/SplitFspBin.py" split -f "$1" \
+	    -o "$2" -n "Fsp.fd" && x_ cp "$appdir/"Fsp_*.fd "${_dest%/*}"
 }
 
 fail_inject()

From f4057d7daab0eb22954d376372a4dad9578f7ba0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 06:11:47 +0100
Subject: [PATCH 1345/1549] inject.sh extract_intel_me(): reduce indentation

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 80a691f2..9726c57e 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -142,15 +142,14 @@ extract_intel_me()
 	[ "$ME11bootguard" = "y" ] && x_ ./mk -f deguard
 
 	extract_intel_me_bruteforce
-	if [ "$ME11bootguard" = "y" ]; then (
-		x_ cd src/deguard/
-		x_ ./finalimage.py --delta "data/delta/$ME11delta" --version \
-		    "$ME11version" --pch "$ME11pch" --sku "$ME11sku" \
-		    --fake-fpfs data/fpfs/zero --input "$_metmp" --output "$_me"
-		) || err "Error running deguard for $_me - $dontflash"
-	else
-		mv "$_metmp" "$_me" || err "!mv $_metmp $_me - $dontflash"
-	fi
+	[ "$ME11bootguard" != "y" ] && x_ mv "$_metmp" "$_me" && return 0
+
+	(
+	x_ cd src/deguard/
+	x_ ./finalimage.py --delta "data/delta/$ME11delta" --version \
+	    "$ME11version" --pch "$ME11pch" --sku "$ME11sku" \
+	    --fake-fpfs data/fpfs/zero --input "$_metmp" --output "$_me"
+	) || err "Error running deguard for $_me - $dontflash"; :
 }
 
 extract_intel_me_bruteforce()

From e4edc2194d3aaaf8319fe681475caae5562b351e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 06:21:04 +0100
Subject: [PATCH 1346/1549] inject.sh: Remove unnecessary check

_dest is already checked in the calling function fetch(),
after extract_tbfw() has been called.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/inject.sh b/include/inject.sh
index 9726c57e..667a03f8 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -245,7 +245,6 @@ extract_sch5545ec()
 extract_tbfw()
 {
 	chkvars TBFW_size && fe_ copy_tbfw "$appdir" -type f -name "TBT.bin"
-	[ -f "$_dest" ] || err "$board: Could not extract tbfw"; :
 }
 
 copy_tbfw()

From 61ec396ef6dbf3ce325f63791d634a78f45531a6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 06:26:38 +0100
Subject: [PATCH 1347/1549] inject.sh: simplify extract_intel_me_bruteforce()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 667a03f8..6aceb52c 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -165,9 +165,11 @@ extract_intel_me_bruteforce()
 	[ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
 	cd "$cdir" || err "extract_intel_me: !cd \"$cdir\" - $dontflash"
 	for i in *; do
-		e "$_metmp" f && break
+		c=0 && e "$_metmp" f && break
 		[ -L "$i" ] && continue
-		if [ -f "$i" ]; then
+		[ -e "$i" ] || continue
+		[ -d "$i" ] && extract_intel_me_bruteforce "$cdir/$i" && c=1
+		if [ $c -eq 0 ] && [ -f "$i" ]; then
 			_r="-r" && [ -n "$mfs" ] && _r=""
 			"$mecleaner" $mfs $_r -t -O "$sdir/vendorfile" \
 			    -M "$_metmp" "$i" && break
@@ -176,10 +178,6 @@ extract_intel_me_bruteforce()
 			_7ztest="${_7ztest}a"
 			extract_archive "$i" "$_7ztest" || continue
 			extract_intel_me_bruteforce "$cdir/$_7ztest"
-		elif [ -d "$i" ]; then
-			extract_intel_me_bruteforce "$cdir/$i"
-		else
-			continue
 		fi
 		cdir="$1"; [ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
 		cd "$cdir" || :

From ee8bb28ba2158a003f7fbf3afb6b1bdb71c8a5cf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 07:14:38 +0100
Subject: [PATCH 1348/1549] GRUB: Mark E820 reserved on coreboot memory

See, coreboot bug report:

https://ticket.coreboot.org/issues/590

We hadn't noticed this for quite a while, since we always
just booted with iomem=relaxed when needing to run cbmem,
since in practise it was always combined with other tasks
that require access to lower memory.

GRUB currently matches coreboot's own mmap for cbmem, but
for example SeaBIOS marks cbmem as E820 reserved. Therefore,
this change replicates the SeaBIOS behaviour.

Without this patch, Linux needs to boot with iomem=relaxed
for cbmem access, for example when running ./cbmem -1

With this patch, cbmem is now accessible regardless. This
patch also prevents Linux from overwriting parts of CBMEM.

Thanks go to Paul Menzel, who wrote this GRUB patch.

Thanks also go to Nicholas Chin, who provided testing, all
the way from Coreboot 25.03 back to Coreboot 4.20. It seems
that this is just something the payloads have to handle.

This means that both SeaBIOS and GRUB no longer have this
bug, in Libreboot; now what remains is to replicate the
test with our U-Boot payload.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...4-kern-coreboot-mmap-Map-to-reserved.patch | 37 +++++++++++++++++++
 ...5-kern-coreboot-mmap-Map-to-reserved.patch | 37 +++++++++++++++++++
 ...6-kern-coreboot-mmap-Map-to-reserved.patch | 37 +++++++++++++++++++
 3 files changed, 111 insertions(+)
 create mode 100644 config/grub/default/patches/0014-kern-coreboot-mmap-Map-to-reserved.patch
 create mode 100644 config/grub/nvme/patches/0015-kern-coreboot-mmap-Map-to-reserved.patch
 create mode 100644 config/grub/xhci/patches/0026-kern-coreboot-mmap-Map-to-reserved.patch

diff --git a/config/grub/default/patches/0014-kern-coreboot-mmap-Map-to-reserved.patch b/config/grub/default/patches/0014-kern-coreboot-mmap-Map-to-reserved.patch
new file mode 100644
index 00000000..5d93ac1d
--- /dev/null
+++ b/config/grub/default/patches/0014-kern-coreboot-mmap-Map-to-reserved.patch
@@ -0,0 +1,37 @@
+From d675307bfcac2f9e05ed119c5b5af3de48e56fb9 Mon Sep 17 00:00:00 2001
+From: Paul Menzel <pmenzel@molgen.mpg.de>
+Date: Mon, 17 May 2021 10:24:36 +0200
+Subject: [PATCH] kern/coreboot/mmap: Map to reserved
+
+https://git.savannah.gnu.org/cgit/grub.git/commit/?id=6de9ee86bf9ae50967413e6a73b5dfd13e5ffb50
+
+Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
+---
+ grub-core/kern/coreboot/mmap.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/grub-core/kern/coreboot/mmap.c b/grub-core/kern/coreboot/mmap.c
+index caf8f7cef..2fc316e8d 100644
+--- a/grub-core/kern/coreboot/mmap.c
++++ b/grub-core/kern/coreboot/mmap.c
+@@ -59,7 +59,7 @@ iterate_linuxbios_table (grub_linuxbios_table_item_t table_item, void *data)
+ 			    /* Multiboot mmaps match with the coreboot mmap
+ 			       definition.  Therefore, we can just pass type
+ 			       through.  */
+-			    mem_region->type,
++			    (mem_region->type >= 13) ? 2 : mem_region->type,
+ 			    ctx->hook_data))
+ 	    return 1;
+ 	  if (start < 0xa0000)
+@@ -81,7 +81,7 @@ iterate_linuxbios_table (grub_linuxbios_table_item_t table_item, void *data)
+ 		     /* Multiboot mmaps match with the coreboot mmap
+ 		        definition.  Therefore, we can just pass type
+ 		        through.  */
+-		     mem_region->type,
++		     (mem_region->type >= 13) ? 2 : mem_region->type,
+ 		     ctx->hook_data))
+ 	return 1;
+     }
+-- 
+2.31.1
+
diff --git a/config/grub/nvme/patches/0015-kern-coreboot-mmap-Map-to-reserved.patch b/config/grub/nvme/patches/0015-kern-coreboot-mmap-Map-to-reserved.patch
new file mode 100644
index 00000000..5d93ac1d
--- /dev/null
+++ b/config/grub/nvme/patches/0015-kern-coreboot-mmap-Map-to-reserved.patch
@@ -0,0 +1,37 @@
+From d675307bfcac2f9e05ed119c5b5af3de48e56fb9 Mon Sep 17 00:00:00 2001
+From: Paul Menzel <pmenzel@molgen.mpg.de>
+Date: Mon, 17 May 2021 10:24:36 +0200
+Subject: [PATCH] kern/coreboot/mmap: Map to reserved
+
+https://git.savannah.gnu.org/cgit/grub.git/commit/?id=6de9ee86bf9ae50967413e6a73b5dfd13e5ffb50
+
+Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
+---
+ grub-core/kern/coreboot/mmap.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/grub-core/kern/coreboot/mmap.c b/grub-core/kern/coreboot/mmap.c
+index caf8f7cef..2fc316e8d 100644
+--- a/grub-core/kern/coreboot/mmap.c
++++ b/grub-core/kern/coreboot/mmap.c
+@@ -59,7 +59,7 @@ iterate_linuxbios_table (grub_linuxbios_table_item_t table_item, void *data)
+ 			    /* Multiboot mmaps match with the coreboot mmap
+ 			       definition.  Therefore, we can just pass type
+ 			       through.  */
+-			    mem_region->type,
++			    (mem_region->type >= 13) ? 2 : mem_region->type,
+ 			    ctx->hook_data))
+ 	    return 1;
+ 	  if (start < 0xa0000)
+@@ -81,7 +81,7 @@ iterate_linuxbios_table (grub_linuxbios_table_item_t table_item, void *data)
+ 		     /* Multiboot mmaps match with the coreboot mmap
+ 		        definition.  Therefore, we can just pass type
+ 		        through.  */
+-		     mem_region->type,
++		     (mem_region->type >= 13) ? 2 : mem_region->type,
+ 		     ctx->hook_data))
+ 	return 1;
+     }
+-- 
+2.31.1
+
diff --git a/config/grub/xhci/patches/0026-kern-coreboot-mmap-Map-to-reserved.patch b/config/grub/xhci/patches/0026-kern-coreboot-mmap-Map-to-reserved.patch
new file mode 100644
index 00000000..5d93ac1d
--- /dev/null
+++ b/config/grub/xhci/patches/0026-kern-coreboot-mmap-Map-to-reserved.patch
@@ -0,0 +1,37 @@
+From d675307bfcac2f9e05ed119c5b5af3de48e56fb9 Mon Sep 17 00:00:00 2001
+From: Paul Menzel <pmenzel@molgen.mpg.de>
+Date: Mon, 17 May 2021 10:24:36 +0200
+Subject: [PATCH] kern/coreboot/mmap: Map to reserved
+
+https://git.savannah.gnu.org/cgit/grub.git/commit/?id=6de9ee86bf9ae50967413e6a73b5dfd13e5ffb50
+
+Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
+---
+ grub-core/kern/coreboot/mmap.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/grub-core/kern/coreboot/mmap.c b/grub-core/kern/coreboot/mmap.c
+index caf8f7cef..2fc316e8d 100644
+--- a/grub-core/kern/coreboot/mmap.c
++++ b/grub-core/kern/coreboot/mmap.c
+@@ -59,7 +59,7 @@ iterate_linuxbios_table (grub_linuxbios_table_item_t table_item, void *data)
+ 			    /* Multiboot mmaps match with the coreboot mmap
+ 			       definition.  Therefore, we can just pass type
+ 			       through.  */
+-			    mem_region->type,
++			    (mem_region->type >= 13) ? 2 : mem_region->type,
+ 			    ctx->hook_data))
+ 	    return 1;
+ 	  if (start < 0xa0000)
+@@ -81,7 +81,7 @@ iterate_linuxbios_table (grub_linuxbios_table_item_t table_item, void *data)
+ 		     /* Multiboot mmaps match with the coreboot mmap
+ 		        definition.  Therefore, we can just pass type
+ 		        through.  */
+-		     mem_region->type,
++		     (mem_region->type >= 13) ? 2 : mem_region->type,
+ 		     ctx->hook_data))
+ 	return 1;
+     }
+-- 
+2.31.1
+

From 6b247c93e25f7283524edb6b6e19ca3296c78006 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 11:54:23 +0100
Subject: [PATCH 1349/1549] mk: Fix bad error handling for gnu_setver

I mixed logical OR and AND by mistake. Oops!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/mk b/mk
index 55f67a92..dcf135a1 100755
--- a/mk
+++ b/mk
@@ -326,7 +326,8 @@ check_gnu_path()
 	command -v "$1" 1>/dev/null || err "Host '$1' unavailable"
 
 	eval "`setvars "" gccver gccfull gnatver gnatfull gccdir gnatdir`"
-	x_ gnu_setver "$1" "$1" && gnu_setver "$2" "$2" || :
+	x_ gnu_setver "$1" "$1" || err "Command '$1' unavailable."
+	gnu_setver "$2" "$2" || :
 
 	eval "[ -z \"\$$1ver\" ] && err \"Cannot detect host '$1' version\""
 	[ "$gnatfull" = "$gccfull" ] && return 0

From 62ec3dac07584d6ab8e7f86587e730b3d159e8ef Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 15:31:33 +0100
Subject: [PATCH 1350/1549] git.sh: move singletree() to lib.sh

it's also used by mk, to determine which build function
to use (build_project or build_targets).

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 9 ---------
 include/lib.sh | 9 +++++++++
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index ded12625..7995df06 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -66,15 +66,6 @@ git_prep()
 	mv "$tmpgit" "$_loc" || err "git_prep: !mv $tmpgit $_loc"
 }
 
-# return 0 if project is single-tree, otherwise 1
-# e.g. coreboot is multi-tree, so 1
-singletree()
-{
-	for targetfile in "config/${1}/"*/target.cfg; do
-		[ -e "$targetfile" ] && [ -f "$targetfile" ] && return 1; :
-	done; :
-}
-
 fetch_submodule()
 {
 	mcfgdir="$mdir/${1##*/}"; eval \
diff --git a/include/lib.sh b/include/lib.sh
index 43b1a318..1830356e 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -144,6 +144,15 @@ chkvars()
 	done; :
 }
 
+# return 0 if project is single-tree, otherwise 1
+# e.g. coreboot is multi-tree, so 1
+singletree()
+{
+	for targetfile in "config/${1}/"*/target.cfg; do
+		[ -e "$targetfile" ] && [ -f "$targetfile" ] && return 1; :
+	done; :
+}
+
 fe_()
 {
 	find_ex "x_" "$@"

From 437ac2454c1a6a77c40894379f5073b4412d0c8d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 15:40:08 +0100
Subject: [PATCH 1351/1549] lib.sh: simplify singletree()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 1830356e..b8f99674 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -148,9 +148,7 @@ chkvars()
 # e.g. coreboot is multi-tree, so 1
 singletree()
 {
-	for targetfile in "config/${1}/"*/target.cfg; do
-		[ -e "$targetfile" ] && [ -f "$targetfile" ] && return 1; :
-	done; :
+	( fe_ "exit 1" "config/$1/"*/ -type f -name "target.cfg" ) || return 1
 }
 
 fe_()

From c2182d821939a7d3c3e8ff2b6ff96e9e44ff96fa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 15:51:04 +0100
Subject: [PATCH 1352/1549] mk: simplify elfcheck()

fe_() called inside subshell, ftw

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/mk b/mk
index dcf135a1..08ac22a2 100755
--- a/mk
+++ b/mk
@@ -370,10 +370,8 @@ check_defconfig()
 
 elfcheck()
 {
-	# TODO: very hacky check. do it properly (based on build.list)
-	for elftest in "$dest_dir"/*; do
-		[ -e "$elftest" ] && e "$elftest" f && return 1
-	done; :
+	# TODO: *STILL* very hacky check. do it properly (based on build.list)
+	( fe_ "exit 1" "$dest_dir" -type f ) || return 1; :
 }
 
 handle_makefile()

From 89a8cd4936a7dd24eb4c2db8a484b858ed20dd88 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 17:41:10 +0100
Subject: [PATCH 1353/1549] rom.sh: simplify mkseagrub()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 16 +++++++---------
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index af739d92..8f605e3a 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -192,9 +192,7 @@ mkseagrub()
 	[ "$payload_grubsea" = "y" ] && pname="grub"
 	[ "$payload_grubsea" = "y" ] || \
 	    cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
-	for keymap in config/data/grub/keymap/*.gkb; do
-		[ -f "$keymap" ] && cprom "${keymap##*/}"; :
-	done; :
+	fe_ "cprom" "$grubdata/keymap" -type f -name "*.gkb"
 }
 
 add_uboot()
@@ -243,16 +241,16 @@ add_uboot()
 
 cprom()
 {
-	newrom="bin/$target/${pname}_${target}_$initmode.rom"
+	tmpnew=""; newrom="bin/$target/${pname}_${target}_$initmode.rom"
 	[ -n "$displaymode" ] && newrom="${newrom%.rom}_$displaymode.rom"
-	[ $# -gt 0 ] && [ "$1" != "seauboot" ] && \
-	    newrom="${newrom%.rom}_${1%.gkb}.rom"
+	[ $# -gt 0 ] && [ "$1" != "seauboot" ] && tmpnew="${1##*/}" && \
+	    newrom="${newrom%.rom}_${tmpnew%.gkb}.rom"
 
 	x_ mkdir -p "bin/$target"
-	x_ cp "$tmprom" "$newrom" && [ $# -gt 0 ] && [ "$1" != "seauboot" ] && \
-	    cbfs "$newrom" "config/data/grub/keymap/$1" keymap.gkb raw
+	x_ cp "$tmprom" "$newrom" && [ $# -gt 0 ] && [ "$1" != "seauboot" ] \
+	    && cbfs "$newrom" "$grubdata/keymap/$tmpnew" keymap.gkb raw
 	[ $# -gt 0 ] && [ "$1" = "seauboot" ] && \
-	    cbfs "$newrom" "config/data/grub/bootorder_uboot" bootorder raw; :
+	    cbfs "$newrom" "$grubdata/bootorder_uboot" bootorder raw; :
 }
 
 cbfs()

From 2be8d1c7982a37cb4e8e57b302c4039be4bc5bad Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 17:53:02 +0100
Subject: [PATCH 1354/1549] rom.sh: specifically check keymaps in cprom()

"not seauboot" is a valid check at present, but if
i start supporting other arguments in the future,
this code would have to change.

therefore, i change it in advance, on that theory.

this new check is more technically correct. these
lines are triggered when inserting grub keymaps.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index 8f605e3a..a92348bf 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -243,11 +243,11 @@ cprom()
 {
 	tmpnew=""; newrom="bin/$target/${pname}_${target}_$initmode.rom"
 	[ -n "$displaymode" ] && newrom="${newrom%.rom}_$displaymode.rom"
-	[ $# -gt 0 ] && [ "$1" != "seauboot" ] && tmpnew="${1##*/}" && \
+	[ $# -gt 0 ] && [ "${1%.gkb}" != "$1" ] && tmpnew="${1##*/}" && \
 	    newrom="${newrom%.rom}_${tmpnew%.gkb}.rom"
 
 	x_ mkdir -p "bin/$target"
-	x_ cp "$tmprom" "$newrom" && [ $# -gt 0 ] && [ "$1" != "seauboot" ] \
+	x_ cp "$tmprom" "$newrom" && [ $# -gt 0 ] && [ "${1%.gkb}" != "$1" ] \
 	    && cbfs "$newrom" "$grubdata/keymap/$tmpnew" keymap.gkb raw
 	[ $# -gt 0 ] && [ "$1" = "seauboot" ] && \
 	    cbfs "$newrom" "$grubdata/bootorder_uboot" bootorder raw; :

From dc9fe517cb04c1903ce7974267821c51640e0e60 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 18:08:55 +0100
Subject: [PATCH 1355/1549] rom.sh: Safer cprom()

Don't insert special files like GRUB keymaps after
copying to the final destination.

Instead, copy the tmprom to /tmp and operate on that,
in these instances.

This is less efficient, depending on the user's
configuration; if /tmp is on the same file system as
the user's xbmkpwd, it should be fine. However, the
actual performance hit isn't that bad in practise,
on most setups.

If the user's /tmp is a tmpfs, then that means using
tmpfs, but it's one image at a time. It should be OK.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index a92348bf..98b94926 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -241,16 +241,24 @@ add_uboot()
 
 cprom()
 {
+	cpcmd="cp"
+
 	tmpnew=""; newrom="bin/$target/${pname}_${target}_$initmode.rom"
 	[ -n "$displaymode" ] && newrom="${newrom%.rom}_$displaymode.rom"
 	[ $# -gt 0 ] && [ "${1%.gkb}" != "$1" ] && tmpnew="${1##*/}" && \
 	    newrom="${newrom%.rom}_${tmpnew%.gkb}.rom"
 
-	x_ mkdir -p "bin/$target"
-	x_ cp "$tmprom" "$newrom" && [ $# -gt 0 ] && [ "${1%.gkb}" != "$1" ] \
-	    && cbfs "$newrom" "$grubdata/keymap/$tmpnew" keymap.gkb raw
+	irom="$tmprom"
+	[ $# -lt 1 ] || irom="`mktemp`" || err "!mk irom, $(echo "$@")"
+	[ $# -gt 0 ] && x_ cp "$tmprom" "$irom" && cpcmd="mv"
+
+	[ $# -gt 0 ] && [ "${1%.gkb}" != "$1" ] && \
+	    cbfs "$irom" "$grubdata/keymap/$tmpnew" keymap.gkb raw
 	[ $# -gt 0 ] && [ "$1" = "seauboot" ] && \
-	    cbfs "$newrom" "$grubdata/bootorder_uboot" bootorder raw; :
+	    cbfs "$irom" "$grubdata/bootorder_uboot" bootorder raw; :
+
+	x_ mkdir -p "bin/$target"
+	x_ $cpcmd "$irom" "$newrom"
 }
 
 cbfs()

From 8ca06463ebc42142ca7618ee6a07950059cf4820 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 18:14:44 +0100
Subject: [PATCH 1356/1549] rom.sh: Print the rom image path being generated

This message used to exist, and it's a nice feedback
for the user, to confirm that the build went OK.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/rom.sh b/include/rom.sh
index 98b94926..0eebdabb 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -257,6 +257,7 @@ cprom()
 	[ $# -gt 0 ] && [ "$1" = "seauboot" ] && \
 	    cbfs "$irom" "$grubdata/bootorder_uboot" bootorder raw; :
 
+	printf "Creating new %s image: '%s'\n" "$projectname" "$newrom"
 	x_ mkdir -p "bin/$target"
 	x_ $cpcmd "$irom" "$newrom"
 }

From f98e34a24dd21ebafbfac2e019d3a4bc1cf500cb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 20:33:02 +0100
Subject: [PATCH 1357/1549] singletree/elfcheck: use fx_, not fe_

fe_ returns an error on the find command, but we rely
on the only error ever being our intentional exit, upon
discovering files.

in singletree, the directory being checked was already
checked first, so we know it's safe not to err on find;
and find not reporting an error if no files are found is
ok.

on elfcheck, it's very much the same thing. In fact, we
very much want it to return 0 if the directory doesn't
exist, or if files don't exist within it.

Therefore, use fx_ which is designed for this use-case.

Quick re-cap: fx and fe execute a given function name with
each line outputting by find as an argument, each time. It
is somewhat similar in scope to find's -exec command.

We use fe_ as shorthand in several places all over lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 mk             | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index b8f99674..2c28b112 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -148,7 +148,7 @@ chkvars()
 # e.g. coreboot is multi-tree, so 1
 singletree()
 {
-	( fe_ "exit 1" "config/$1/"*/ -type f -name "target.cfg" ) || return 1
+	( fx_ "exit 1" "config/$1/"*/ -type f -name "target.cfg" ) || return 1
 }
 
 fe_()
diff --git a/mk b/mk
index 08ac22a2..a438d653 100755
--- a/mk
+++ b/mk
@@ -371,7 +371,7 @@ check_defconfig()
 elfcheck()
 {
 	# TODO: *STILL* very hacky check. do it properly (based on build.list)
-	( fe_ "exit 1" "$dest_dir" -type f ) || return 1; :
+	( fx_ "exit 1" "$dest_dir" -type f ) || return 1; :
 }
 
 handle_makefile()

From 17d826d3a9614fea2bc87d8203b7f07fe4b7fb54 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 20:38:19 +0100
Subject: [PATCH 1358/1549] lbmk: Replace err with much simpler implementation

The current implementation is insanely over-engineered,
and completely unnecessary.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh   |  2 --
 include/inject.sh |  1 -
 include/lib.sh    | 22 ----------------------
 3 files changed, 25 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 8f5ab059..1be860ea 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -14,8 +14,6 @@ projectsite="https://libreboot.org/"
     export PATH="/usr/local/bin:/usr/bin:/bin:/usr/local/games:/usr/games"
 xbmkpath="$PATH"
 
-xbmk_err="err_"
-
 eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
     datadir version xbmkpwd relname xbmkpwd xbmktmp python pyver xbmklocal \
     xbmklock`"
diff --git a/include/inject.sh b/include/inject.sh
index 6aceb52c..6caf8500 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -270,7 +270,6 @@ fail_inject()
 inject()
 {
 	need_files="n"
-	xbmk_err="fail_inject"
 	remkdir "$tmpromdel"
 
 	set +u +e
diff --git a/include/lib.sh b/include/lib.sh
index 2c28b112..e83170ee 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -184,28 +184,6 @@ x_()
 err()
 {
 	set -u -e
-
-	xbmk_err_val=0
-	real_err="" && [ -n "${xbmk_err+x}" ] && real_err="$xbmk_err"
-
-	if [ -z "$real_err" ]; then
-		printf "WARNING: err not set. Defaulting to 'err_'\n" 1>&2
-		real_err="err_"
-	fi
-
-	(
-	$real_err "$@" || err_ "Error function '$real_err' *returned* 1"
-	err_ "Error function '$real_err' didn't exit"
-	exit 1 # just in case!
-	) || xbmk_err_val=1 # otherwise, it wrongly did exit 0, not exit 1
-
-	[ $xbmk_err_val -eq 0 ] && err_ "Error function '$real_err' did exit 0"
-	exit 1 # just in case!
-}
-
-err_()
-{
-	[ $# -lt 1 ] && printf "ERROR (but no error message provided)\n" 1>&2
 	[ $# -lt 1 ] || printf "ERROR %s: %s\n" "$0" "$1" 1>&2 || :
 	exit 1
 }

From c275f35e7e26c878011e8033680c11b75637390a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 20:41:48 +0100
Subject: [PATCH 1359/1549] lib.sh x_(): Remove warning of empty args

It's completely unnecessary, and I forsee this
check breaking the build system at some point,
since some commands rely on the output of other
commands. Therefore, I've removed this check.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index e83170ee..6de1010e 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -176,7 +176,6 @@ find_ex()
 
 x_()
 {
-	[ $# -lt 1 ] && printf "WARNING: x_ called without arguments\n" 1>&2
 	[ $# -lt 1 ] || [ -n "$1" ] || err "Empty first arg: x_ $(echo "$@")"
 	[ $# -lt 1 ] || "$@" || err "Unhandled error for: $(echo "$@")"; :
 }

From ef38333f8b0dae8f7f7b271128e2805de9669be3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 20:45:31 +0100
Subject: [PATCH 1360/1549] lib.sh find_ex: Write sort errors to /dev/null

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 6de1010e..e6fa7e75 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -166,7 +166,7 @@ find_ex()
 	xmsg="$1" && shift 1
 	fd="`mktemp`" && x_ rm -f "$fd" && x_ touch "$fd"
 	xx="$1" && shift 1
-	$xmsg find "$@" 2>/dev/null | sort > "$fd" || \
+	$xmsg find "$@" 2>/dev/null | sort 1>"$fd" 2>/dev/null || \
 	    err "!find $(echo "$@") > \"$fd\""
 	while read -r fx; do
 		$xx "$fx" || break; :

From 7585336b914d5d43ab85ba2f75fc5215be7782fb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 21:05:45 +0100
Subject: [PATCH 1361/1549] inject.sh: simplify kconfig scanning

Use fe_ with a new function, scankconfig, to do the
same thing. Not only is this simpler, it now also
operates on all coreboot configs for a given target,
whereas it previously only operated on the first one.

This is useful for cases where one config might use a
file that the other one does not; in practise, we don't
do this yet, but it's a theoretical possibility

Also: don't use the function check_defconfig, which is
now redundant and has been removed.

That function also conflicted with another function by
the same name in mk, but fortunately didn't cause an
issue in practise, due to how sh works; when vendor.sh
was used, it was without running the tree commands,
except under a separate lbmk instance.

So this is a simplification, a feature enhancement and
even a bug fix, all wrapped into one!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 12 +++++++++---
 include/lib.sh    |  8 --------
 2 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 6caf8500..fa6ac095 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -49,9 +49,8 @@ download()
 readkconfig()
 {
 	x_ rm -f "$xbmktmp/cbcfg"
-	cbcfg="`check_defconfig "$boarddir"`" || for cbc in $cv; do
-		grep "$cbc" "$cbcfg" 1>>"$xbmktmp/cbcfg" 2>/dev/null || :
-	done
+	fe_ scankconfig "$boarddir/config" -type f
+
 	eval "`setcfg "$xbmktmp/cbcfg" 1`"
 
 	for c in $cvchk; do
@@ -63,6 +62,13 @@ readkconfig()
 	return 1
 }
 
+scankconfig()
+{
+	for cbc in $cv; do
+		grep "$cbc" "$1" 1>>"$xbmktmp/cbcfg" 2>/dev/null || :
+	done
+}
+
 bootstrap()
 {
 	x_ ./mk -f coreboot ${cbdir##*/}
diff --git a/include/lib.sh b/include/lib.sh
index e6fa7e75..530ea170 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -105,14 +105,6 @@ mk()
 	done; :
 }
 
-check_defconfig()
-{
-	[ -d "$1" ] || err "Target '$1' not defined."
-	for x in "$1"/config/*; do
-		[ -f "$x" ] && printf "%s\n" "$x" && return 1
-	done; :
-}
-
 setvars()
 {
 	_setvars=""

From 73074dedee33bfa66edfc9a19dd9625598911518 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 21:13:28 +0100
Subject: [PATCH 1362/1549] inject.sh: Further simplified FSP extraction

We don't need the copy command at all, since the files
it copies are the only ones that the Python script does
anyway, so now we just make that script output to the
directory, directly, where these files must go.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/inject.sh b/include/inject.sh
index fa6ac095..5c5e1e1c 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -260,7 +260,7 @@ copy_tbfw()
 extract_fsp()
 {
 	x_ python "$cbdir/3rdparty/fsp/Tools/SplitFspBin.py" split -f "$1" \
-	    -o "$2" -n "Fsp.fd" && x_ cp "$appdir/"Fsp_*.fd "${_dest%/*}"
+	    -o "${_dest%/*}" -n "Fsp.fd"
 }
 
 fail_inject()

From 282b939d9dae58f2ef128b3a866ba8640f87739b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 5 May 2025 21:33:29 +0100
Subject: [PATCH 1363/1549] init.sh: New function dx_ to execute path files

Generated by find, this is a wrapper in place of using
for loops everywhere. This simplification temporarily
increases the amount of code, because we don't do this
a lot, but this will reduce the growth of the build
system code size in future changes.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh |  4 +---
 include/lib.sh | 11 ++++++++---
 2 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 7995df06..535c7d6e 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -54,9 +54,7 @@ git_prep()
 	chkvars rev
 	tmpclone "$1" "$2" "$tmpgit" "$rev" "$_patchdir"
 	if singletree "$project" || [ $# -gt 4 ]; then
-		[ -f "$mdir/module.list" ] && while read -r msrcdir; do
-			fetch_submodule "$msrcdir"
-		done < "$mdir/module.list"; :
+		dx_ fetch_submodule "$mdir/module.list"
 	fi
 
 	[ "$_loc" != "$XBMK_CACHE/repo/$project" ] && \
diff --git a/include/lib.sh b/include/lib.sh
index 530ea170..572fcf68 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -160,12 +160,17 @@ find_ex()
 	xx="$1" && shift 1
 	$xmsg find "$@" 2>/dev/null | sort 1>"$fd" 2>/dev/null || \
 	    err "!find $(echo "$@") > \"$fd\""
-	while read -r fx; do
-		$xx "$fx" || break; :
-	done < "$fd"
+	dx_ "$xx" "$fd"
 	x_ rm -f "$fd"
 }
 
+dx_()
+{
+	[ -f "$2" ] && while read -r fx; do
+		$1 "$fx"
+	done < "$2"; :
+}
+
 x_()
 {
 	[ $# -lt 1 ] || [ -n "$1" ] || err "Empty first arg: x_ $(echo "$@")"

From 4c1de1ad1267f74ed28cdb0a7c2cc06d52949dda Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 6 May 2025 04:49:56 +0100
Subject: [PATCH 1364/1549] inject.sh: remove unused function

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 5c5e1e1c..3cfe891c 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -263,16 +263,6 @@ extract_fsp()
 	    -o "${_dest%/*}" -n "Fsp.fd"
 }
 
-fail_inject()
-{
-	[ -L "$tmpromdel" ] || [ ! -d "$tmpromdel" ] || \
-	    rm -Rf "$tmpromdel" || :
-	printf "\n\n%s\n\n" "$dontflash" 1>&2
-	printf "WARNING: File '%s' was NOT modified.\n\n" "$archive" 1>&2
-	printf "Please MAKE SURE vendor files are inserted before flashing\n\n"
-	err_ "$1"
-}
-
 inject()
 {
 	need_files="n"

From e8be3fd1d41c3c0a81c2cfecb3fa68271ad794ca Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 6 May 2025 11:09:39 +0100
Subject: [PATCH 1365/1549] git.sh: Simplify git am handling

fx_ and fe_ really are the best shell functions ever.

really. they're the best.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 12 +-----------
 1 file changed, 1 insertion(+), 11 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 535c7d6e..0a05b5ab 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -108,23 +108,13 @@ tmpclone()
 	(
 	[ $# -gt 5 ] || git clone "$repodir" "$3" || err "!clone $repodir $3"
 	git -C "$3" reset --hard "$4" || err "!reset $1 $2 $3 $4 $5"
-	git_am_patches "$3" "$5"
+	fx_ "eval x_ git -C \"$3\" am" "$5" -type f
 	) || repofail="y"
 
 	[ "$repofail" = "y" ] && [ $# -lt 6 ] && tmpclone "$@" retry
 	[ "$repofail" = "y" ] && err "!clone $1 $2 $3 $4 $5"; :
 }
 
-git_am_patches()
-{
-	for p in "$2/"*; do
-		[ -L "$p" ] && continue
-		[ -e "$p" ] || continue
-		[ -d "$p" ] && git_am_patches "$1" "$p" && continue
-		[ ! -f "$p" ] || git -C "$1" am "$p" || err "$1 $2: !am $p"
-	done; :
-}
-
 nuke()
 {
 	e "config/${1%/}/nuke.list" f missing || while read -r nukefile; do

From 5686f35e0f1522d45361f042adc135b5782eae32 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 6 May 2025 18:32:28 +0100
Subject: [PATCH 1366/1549] inject.sh: insanely optimise the me bruteforce

use fe_

fe_ ftw

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 49 +++++++++++++++++------------------------------
 1 file changed, 18 insertions(+), 31 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 3cfe891c..f3f75bf3 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -35,7 +35,7 @@ eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl SCH5545EC_DL_url \
     archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref FSPFD_hash \
     _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch tmpromdir \
-    IFD_platform ifdprefix cdir sdir _me _metmp mfs TBFW_url_bkup TBFW_url \
+    IFD_platform ifdprefix _me _metmp mfs TBFW_url_bkup TBFW_url \
     TBFW_hash TBFW_size hashfile xromsize xchanged EC_url_bkup need_files \
     vfile cbcfg $cv`"
 
@@ -139,15 +139,19 @@ extract_intel_me()
 {
 	e "$mecleaner" f not && err "$cbdir: me_cleaner missing. $dontflash"
 
-	cdir="$xbmkpwd/$appdir"
+	_7ztest="$xbmklocal/metmp/a"
 	_me="$xbmkpwd/$_dest"
 	_metmp="$xbmklocal/me.bin"
+	x_ rm -f "$_metmp"
 
 	mfs="" && [ "$ME11bootguard" = "y" ] && mfs="--whitelist MFS" && \
 	    chkvars ME11delta ME11version ME11sku ME11pch
 	[ "$ME11bootguard" = "y" ] && x_ ./mk -f deguard
 
-	extract_intel_me_bruteforce
+	set +u +e
+	( fe_ extract_intel_me_bruteforce "$xbmkpwd/$appdir" -type f ) || :
+	x_ rm -Rf "$xbmklocal/metmp"
+
 	[ "$ME11bootguard" != "y" ] && x_ mv "$_metmp" "$_me" && return 0
 
 	(
@@ -160,36 +164,19 @@ extract_intel_me()
 
 extract_intel_me_bruteforce()
 {
-	[ $# -gt 0 ] && cdir="$1"
-	e "$_metmp" f && return 0
+	[ -L "$1" ] && return 0
+	e "$_metmp" f && x_ && exit 1
 
-	[ -z "$sdir" ] && sdir="$(mktemp -d)"
-	x_ mkdir -p "$sdir"
+	_r="-r" && [ -n "$mfs" ] && _r=""
+	
+	"$mecleaner" $mfs $_r -t -O "$xbmklocal/a" -M "$_metmp" "$1" && exit 1
+	"$mecleaner" $mfs $_r -t -O "$_metmp" "$1" && exit 1
+	"$me7updateparser" -O "$_metmp" "$1" && exit 1
 
-	set +u +e
-	(
-	[ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
-	cd "$cdir" || err "extract_intel_me: !cd \"$cdir\" - $dontflash"
-	for i in *; do
-		c=0 && e "$_metmp" f && break
-		[ -L "$i" ] && continue
-		[ -e "$i" ] || continue
-		[ -d "$i" ] && extract_intel_me_bruteforce "$cdir/$i" && c=1
-		if [ $c -eq 0 ] && [ -f "$i" ]; then
-			_r="-r" && [ -n "$mfs" ] && _r=""
-			"$mecleaner" $mfs $_r -t -O "$sdir/vendorfile" \
-			    -M "$_metmp" "$i" && break
-			"$mecleaner" $mfs $_r -t -O "$_metmp" "$i" && break
-			"$me7updateparser" -O "$_metmp" "$i" && break
-			_7ztest="${_7ztest}a"
-			extract_archive "$i" "$_7ztest" || continue
-			extract_intel_me_bruteforce "$cdir/$_7ztest"
-		fi
-		cdir="$1"; [ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
-		cd "$cdir" || :
-	done
-	) || :
-	rm -Rf "$sdir" || err "extract_intel_me: !rm -Rf $sdir - $dontflash"
+	_7ztest="${_7ztest}a"
+	extract_archive "$i" "$_7ztest" || return 0
+
+	( fe_ extract_intel_me_bruteforce "$_7ztest" -type f ) || exit 1; :
 }
 
 extract_archive()

From 5657cc1afb326b5b902dc8eb7fd584a15a38ca37 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 6 May 2025 19:30:55 +0100
Subject: [PATCH 1367/1549] inject.sh: don't use subshell for me bruteforce

i needed it on the old version, which used cd

this one stays in the same directory at all times

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index f3f75bf3..0fcd6977 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -149,7 +149,7 @@ extract_intel_me()
 	[ "$ME11bootguard" = "y" ] && x_ ./mk -f deguard
 
 	set +u +e
-	( fe_ extract_intel_me_bruteforce "$xbmkpwd/$appdir" -type f ) || :
+	fe_ extract_intel_me_bruteforce "$xbmkpwd/$appdir" -type f || :
 	x_ rm -Rf "$xbmklocal/metmp"
 
 	[ "$ME11bootguard" != "y" ] && x_ mv "$_metmp" "$_me" && return 0
@@ -165,18 +165,19 @@ extract_intel_me()
 extract_intel_me_bruteforce()
 {
 	[ -L "$1" ] && return 0
-	e "$_metmp" f && x_ && exit 1
+	e "$_metmp" f && x_ && return 1
 
 	_r="-r" && [ -n "$mfs" ] && _r=""
 	
-	"$mecleaner" $mfs $_r -t -O "$xbmklocal/a" -M "$_metmp" "$1" && exit 1
-	"$mecleaner" $mfs $_r -t -O "$_metmp" "$1" && exit 1
-	"$me7updateparser" -O "$_metmp" "$1" && exit 1
+	"$mecleaner" $mfs $_r -t -O "$xbmklocal/a" -M "$_metmp" "$1" && \
+	    return 1
+	"$mecleaner" $mfs $_r -t -O "$_metmp" "$1" && return 1
+	"$me7updateparser" -O "$_metmp" "$1" && return 1
 
 	_7ztest="${_7ztest}a"
 	extract_archive "$i" "$_7ztest" || return 0
 
-	( fe_ extract_intel_me_bruteforce "$_7ztest" -type f ) || exit 1; :
+	fe_ extract_intel_me_bruteforce "$_7ztest" -type f || return 1; :
 }
 
 extract_archive()

From cf78583a6d8b4fe744c0872c82e7cca011899188 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 6 May 2025 19:32:18 +0100
Subject: [PATCH 1368/1549] inject.sh: remove unnecessary check

the call stack already falls through with  a bunch of return
1s after a successful run of me_cleaner, so it's really not
necessary.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/inject.sh b/include/inject.sh
index 0fcd6977..347d2d3b 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -165,7 +165,6 @@ extract_intel_me()
 extract_intel_me_bruteforce()
 {
 	[ -L "$1" ] && return 0
-	e "$_metmp" f && x_ && return 1
 
 	_r="-r" && [ -n "$mfs" ] && _r=""
 	

From 4781dbd2a050e7c98ae14e0eead7fb6f3ec0f92c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 6 May 2025 19:43:44 +0100
Subject: [PATCH 1369/1549] inject.sh: fix oversight in me bruteforce

i used i instead of 1, in the variable when running
the extract_archive function.

this didn't trigger since +u was set, and +e was set.

in practise, then, it seems that because of this, and
because my ME extract/insert test was a success, that
none of the archives we use actually have a ME inside
of a file inside of a given downloaded archive.

still, this is technically incorrect, so fix it!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/inject.sh b/include/inject.sh
index 347d2d3b..b31964e6 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -174,7 +174,7 @@ extract_intel_me_bruteforce()
 	"$me7updateparser" -O "$_metmp" "$1" && return 1
 
 	_7ztest="${_7ztest}a"
-	extract_archive "$i" "$_7ztest" || return 0
+	extract_archive "$1" "$_7ztest" || return 0
 
 	fe_ extract_intel_me_bruteforce "$_7ztest" -type f || return 1; :
 }

From 03300766d1418cb2670c120dab8b20acdbb63f3d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 6 May 2025 19:47:08 +0100
Subject: [PATCH 1370/1549] inject.sh: tidy up extract_intel_me_bruteforce

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index b31964e6..845208ba 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -165,9 +165,8 @@ extract_intel_me()
 extract_intel_me_bruteforce()
 {
 	[ -L "$1" ] && return 0
-
 	_r="-r" && [ -n "$mfs" ] && _r=""
-	
+
 	"$mecleaner" $mfs $_r -t -O "$xbmklocal/a" -M "$_metmp" "$1" && \
 	    return 1
 	"$mecleaner" $mfs $_r -t -O "$_metmp" "$1" && return 1

From fac99aa2d4478268453bdbe36f9397c15328201e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 6 May 2025 20:24:32 +0100
Subject: [PATCH 1371/1549] lib.sh: re-add missing break in fe/fx_

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 572fcf68..a125181b 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -160,14 +160,14 @@ find_ex()
 	xx="$1" && shift 1
 	$xmsg find "$@" 2>/dev/null | sort 1>"$fd" 2>/dev/null || \
 	    err "!find $(echo "$@") > \"$fd\""
-	dx_ "$xx" "$fd"
+	dx_ "$xx" "$fd" || break
 	x_ rm -f "$fd"
 }
 
 dx_()
 {
 	[ -f "$2" ] && while read -r fx; do
-		$1 "$fx"
+		$1 "$fx" || return 1
 	done < "$2"; :
 }
 

From 485d785d3313fb5c27b0822f8c8e25d631efb3d6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 6 May 2025 21:16:06 +0100
Subject: [PATCH 1372/1549] inject.sh: clean up tmp me file before extract

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/inject.sh b/include/inject.sh
index 845208ba..a26668b5 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -142,7 +142,7 @@ extract_intel_me()
 	_7ztest="$xbmklocal/metmp/a"
 	_me="$xbmkpwd/$_dest"
 	_metmp="$xbmklocal/me.bin"
-	x_ rm -f "$_metmp"
+	x_ rm -f "$_metmp" "$xbmklocal/a"
 
 	mfs="" && [ "$ME11bootguard" = "y" ] && mfs="--whitelist MFS" && \
 	    chkvars ME11delta ME11version ME11sku ME11pch

From 2b7f6b7d7cedfcc7661f02b8092707fde09460a0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 10:20:59 +0100
Subject: [PATCH 1373/1549] inject.sh: Simplify extract_intel_me_bruteforce()

This is probably about as small as it's going to get.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 20 +++++++-------------
 1 file changed, 7 insertions(+), 13 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index a26668b5..c1e8131c 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -148,14 +148,10 @@ extract_intel_me()
 	    chkvars ME11delta ME11version ME11sku ME11pch
 	[ "$ME11bootguard" = "y" ] && x_ ./mk -f deguard
 
-	set +u +e
-	fe_ extract_intel_me_bruteforce "$xbmkpwd/$appdir" -type f || :
-	x_ rm -Rf "$xbmklocal/metmp"
-
+	set +u +e && fe_ extract_intel_me_bruteforce "$xbmkpwd/$appdir" -type f
 	[ "$ME11bootguard" != "y" ] && x_ mv "$_metmp" "$_me" && return 0
 
-	(
-	x_ cd src/deguard/
+	( x_ cd src/deguard/
 	x_ ./finalimage.py --delta "data/delta/$ME11delta" --version \
 	    "$ME11version" --pch "$ME11pch" --sku "$ME11sku" \
 	    --fake-fpfs data/fpfs/zero --input "$_metmp" --output "$_me"
@@ -164,16 +160,14 @@ extract_intel_me()
 
 extract_intel_me_bruteforce()
 {
+	e "$_metmp" f && x_ rm -Rf "$xbmklocal/metmp" && return 1
 	[ -L "$1" ] && return 0
-	_r="-r" && [ -n "$mfs" ] && _r=""
 
-	"$mecleaner" $mfs $_r -t -O "$xbmklocal/a" -M "$_metmp" "$1" && \
-	    return 1
-	"$mecleaner" $mfs $_r -t -O "$_metmp" "$1" && return 1
-	"$me7updateparser" -O "$_metmp" "$1" && return 1
+	_7ztest="${_7ztest}a" && _r="-r" && [ -n "$mfs" ] && _r=""
 
-	_7ztest="${_7ztest}a"
-	extract_archive "$1" "$_7ztest" || return 0
+	"$mecleaner" $mfs $_r -t -O "$xbmklocal/a" -M "$_metmp" "$1" || \
+	    "$mecleaner" $mfs $_r -t -O "$_metmp" "$1" || "$me7updateparser" \
+	    -O "$_metmp" "$1" || extract_archive "$1" "$_7ztest" || return 0
 
 	fe_ extract_intel_me_bruteforce "$_7ztest" -type f || return 1; :
 }

From 0faef899469818410e5e6d481f1e6c4fa5ad3d3d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 13:27:25 +0100
Subject: [PATCH 1374/1549] lib.sh: support any command on find_exec()

right now, we assume "find", but it adds any number of
arguments next to that.

change it instead to support any command, where the
assumption is that it would generate a list of files
and directories.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh    |  2 +-
 include/inject.sh | 16 ++++++++--------
 include/lib.sh    |  5 +++--
 include/rom.sh    |  2 +-
 mk                |  4 ++--
 5 files changed, 15 insertions(+), 14 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 0a05b5ab..81c75806 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -108,7 +108,7 @@ tmpclone()
 	(
 	[ $# -gt 5 ] || git clone "$repodir" "$3" || err "!clone $repodir $3"
 	git -C "$3" reset --hard "$4" || err "!reset $1 $2 $3 $4 $5"
-	fx_ "eval x_ git -C \"$3\" am" "$5" -type f
+	fx_ "eval x_ git -C \"$3\" am" find "$5" -type f
 	) || repofail="y"
 
 	[ "$repofail" = "y" ] && [ $# -lt 6 ] && tmpclone "$@" retry
diff --git a/include/inject.sh b/include/inject.sh
index c1e8131c..f1e29fd6 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -49,7 +49,7 @@ download()
 readkconfig()
 {
 	x_ rm -f "$xbmktmp/cbcfg"
-	fe_ scankconfig "$boarddir/config" -type f
+	fe_ scankconfig find "$boarddir/config" -type f
 
 	eval "`setcfg "$xbmktmp/cbcfg" 1`"
 
@@ -148,7 +148,7 @@ extract_intel_me()
 	    chkvars ME11delta ME11version ME11sku ME11pch
 	[ "$ME11bootguard" = "y" ] && x_ ./mk -f deguard
 
-	set +u +e && fe_ extract_intel_me_bruteforce "$xbmkpwd/$appdir" -type f
+	set +u +e && fe_ find_me find "$xbmkpwd/$appdir" -type f
 	[ "$ME11bootguard" != "y" ] && x_ mv "$_metmp" "$_me" && return 0
 
 	( x_ cd src/deguard/
@@ -158,7 +158,7 @@ extract_intel_me()
 	) || err "Error running deguard for $_me - $dontflash"; :
 }
 
-extract_intel_me_bruteforce()
+find_me()
 {
 	e "$_metmp" f && x_ rm -Rf "$xbmklocal/metmp" && return 1
 	[ -L "$1" ] && return 0
@@ -169,7 +169,7 @@ extract_intel_me_bruteforce()
 	    "$mecleaner" $mfs $_r -t -O "$_metmp" "$1" || "$me7updateparser" \
 	    -O "$_metmp" "$1" || extract_archive "$1" "$_7ztest" || return 0
 
-	fe_ extract_intel_me_bruteforce "$_7ztest" -type f || return 1; :
+	fe_ find_me find "$_7ztest" -type f || return 1; :
 }
 
 extract_archive()
@@ -228,7 +228,7 @@ extract_sch5545ec()
 # https://pcsupport.lenovo.com/us/en/products/laptops-and-netbooks/thinkpad-t-series-laptops/thinkpad-t480-type-20l5-20l6/20l5/solutions/ht508988
 extract_tbfw()
 {
-	chkvars TBFW_size && fe_ copy_tbfw "$appdir" -type f -name "TBT.bin"
+	chkvars TBFW_size; fe_ copy_tbfw find "$appdir" -type f -name "TBT.bin"
 }
 
 copy_tbfw()
@@ -344,7 +344,7 @@ patch_release_roms()
 	done
 
 	if readkconfig; then
-		fe_ prep_rom "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
+		fe_ preprom find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 		[ "$nukemode" != "nuke" ] || \
 			printf "Make sure you inserted vendor files: %s\n" \
 			    "$vguide" > "$tmpromdir/README.md" || :
@@ -378,7 +378,7 @@ patch_release_roms()
 	    "$archive" || err "'$archive' -> Can't overwrite - $dontflash"; :
 }
 
-prep_rom()
+preprom()
 {
 	_xrom="$1"
 	_xromname="${1##*/}"
@@ -492,7 +492,7 @@ modify_mac()
 	[ -n "$new_mac" ] && [ "$new_mac" != "restore" ] && \
 	    x_ "$nvm" "$xbmklocal/gbe" setmac "$new_mac"
 
-	fe_ newmac "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
+	fe_ newmac find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 
 	printf "\nGbE NVM written to '%s':\n" "$archive"
 	x_ "$nvm" "$xbmklocal/gbe" dump | grep -v "bytes read from file" || :
diff --git a/include/lib.sh b/include/lib.sh
index a125181b..f20b17e9 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -140,7 +140,8 @@ chkvars()
 # e.g. coreboot is multi-tree, so 1
 singletree()
 {
-	( fx_ "exit 1" "config/$1/"*/ -type f -name "target.cfg" ) || return 1
+	( fx_ "exit 1" find "config/$1/"*/ -type f -name "target.cfg" ) || \
+	    return 1
 }
 
 fe_()
@@ -158,7 +159,7 @@ find_ex()
 	xmsg="$1" && shift 1
 	fd="`mktemp`" && x_ rm -f "$fd" && x_ touch "$fd"
 	xx="$1" && shift 1
-	$xmsg find "$@" 2>/dev/null | sort 1>"$fd" 2>/dev/null || \
+	$xmsg "$@" 2>/dev/null | sort 1>"$fd" 2>/dev/null || \
 	    err "!find $(echo "$@") > \"$fd\""
 	dx_ "$xx" "$fd" || break
 	x_ rm -f "$fd"
diff --git a/include/rom.sh b/include/rom.sh
index 0eebdabb..09270829 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -192,7 +192,7 @@ mkseagrub()
 	[ "$payload_grubsea" = "y" ] && pname="grub"
 	[ "$payload_grubsea" = "y" ] || \
 	    cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
-	fe_ "cprom" "$grubdata/keymap" -type f -name "*.gkb"
+	fe_ cprom find "$grubdata/keymap" -type f -name "*.gkb"
 }
 
 add_uboot()
diff --git a/mk b/mk
index a438d653..61d5d694 100755
--- a/mk
+++ b/mk
@@ -279,7 +279,7 @@ check_project_hashes()
 	[ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
 	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
 
-	fx_ "x_ sha512sum" "$datadir" "$configdir/$tree" "$mdir" \
+	fx_ "x_ sha512sum" find "$datadir" "$configdir/$tree" "$mdir" \
 	    -type f -not -path "*/.git*/*" | awk '{print $1}' > \
 	    "$xbmktmp/project.hash" || err "!h $project $tree"
 
@@ -371,7 +371,7 @@ check_defconfig()
 elfcheck()
 {
 	# TODO: *STILL* very hacky check. do it properly (based on build.list)
-	( fx_ "exit 1" "$dest_dir" -type f ) || return 1; :
+	( fx_ "exit 1" find "$dest_dir" -type f ) || return 1; :
 }
 
 handle_makefile()

From d2e6f989d7ef1250bedac1ad5c93e8f6220a5fd0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 13:44:05 +0100
Subject: [PATCH 1375/1549] rom.sh: build serprog images with fe_

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 27 ++++++++++++---------------
 1 file changed, 12 insertions(+), 15 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index 09270829..182282b1 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -9,22 +9,19 @@ grubdata="config/data/grub"
 
 mkserprog()
 {
-	[ "$_f" = "-d" ] && return 0 # dry run
-	basename -as .h "$serdir/"*.h > "$xbmktmp/ser" || \
-	    err "!mk $1 $xbmktmp"
+	$dry fe_ "eval buildser \"$1\"" basename -as .h "$serdir/"*.h
+	[ "$XBMK_RELEASE" = "y" ] && $dry mkrom_tarball "bin/serprog_$1"; :
+}
 
-	while read -r sertarget; do
-		[ "$1" = "pico" ] && x_ cmake -DPICO_BOARD="$sertarget" \
-		    -DPICO_SDK_PATH="$picosdk" -B "$sersrc/build" "$sersrc" \
-		    && x_ cmake --build "$sersrc/build"
-		[ "$1" = "stm32" ] && x_ make -C "$sersrc" \
-		    libopencm3-just-make BOARD=$sertarget && x_ make -C \
-		    "$sersrc" BOARD=$sertarget
-		x_ mkdir -p "bin/serprog_$1"
-		x_ mv "$serx" "bin/serprog_$1/serprog_$sertarget.${serx##*.}"
-	done < "$xbmktmp/ser"
-
-	[ "$XBMK_RELEASE" = "y" ] && mkrom_tarball "bin/serprog_$1"; :
+buildser()
+{
+	[ "$1" = "pico" ] && x_ cmake -DPICO_BOARD="$2" \
+	    -DPICO_SDK_PATH="$picosdk" -B "$sersrc/build" "$sersrc" && \
+	    x_ cmake --build "$sersrc/build"
+	[ "$1" = "stm32" ] && x_ make -C "$sersrc" libopencm3-just-make \
+	    BOARD=$2 && x_ make -C "$sersrc" BOARD=$2
+	x_ mkdir -p "bin/serprog_$1"
+	x_ mv "$serx" "bin/serprog_$1/serprog_$2.${serx##*.}"
 }
 
 copyps1bios()

From 0ef77e65832e1ebf75a4fbfde977a55b7251d5c0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 14:01:50 +0100
Subject: [PATCH 1376/1549] build serprog using fe_ *defined inside mkhelper*

sh macros ftw

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/pico-serprog/mkhelper.cfg   | 2 +-
 config/data/stm32-vserprog/mkhelper.cfg | 2 +-
 include/rom.sh                          | 6 ------
 3 files changed, 2 insertions(+), 8 deletions(-)

diff --git a/config/data/pico-serprog/mkhelper.cfg b/config/data/pico-serprog/mkhelper.cfg
index 8e902bda..de3f6aa5 100644
--- a/config/data/pico-serprog/mkhelper.cfg
+++ b/config/data/pico-serprog/mkhelper.cfg
@@ -4,4 +4,4 @@ sersrc="src/pico-serprog"
 serx="$sersrc/build/pico_serprog.uf2"
 picosdk="src/pico-sdk"
 serdir="$picosdk/src/boards/include/boards"
-premake="mkserprog pico"
+premake="$dry eval fe_ \"buildser pico\" basename -as .h \"\$serdir/\"*.h"
diff --git a/config/data/stm32-vserprog/mkhelper.cfg b/config/data/stm32-vserprog/mkhelper.cfg
index 907e890f..344dde81 100644
--- a/config/data/stm32-vserprog/mkhelper.cfg
+++ b/config/data/stm32-vserprog/mkhelper.cfg
@@ -3,4 +3,4 @@
 sersrc="src/stm32-vserprog"
 serx="$sersrc/stm32-vserprog.hex"
 serdir="$sersrc/boards"
-mkhelper="mkserprog stm32"
+mkhelper="$dry eval fe_ \"buildser stm32\" basename -as .h \"\$serdir/\"*.h"
diff --git a/include/rom.sh b/include/rom.sh
index 182282b1..cb3c1298 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -7,12 +7,6 @@
 
 grubdata="config/data/grub"
 
-mkserprog()
-{
-	$dry fe_ "eval buildser \"$1\"" basename -as .h "$serdir/"*.h
-	[ "$XBMK_RELEASE" = "y" ] && $dry mkrom_tarball "bin/serprog_$1"; :
-}
-
 buildser()
 {
 	[ "$1" = "pico" ] && x_ cmake -DPICO_BOARD="$2" \

From 1390f7f800767dcba394ebbc4f7996508940639e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 14:19:15 +0100
Subject: [PATCH 1377/1549] mk: Create serprog tarballs here instead

i simplified rom.sh to use mkhelper for actual image
building.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/mk b/mk
index 61d5d694..06e73ddc 100755
--- a/mk
+++ b/mk
@@ -87,6 +87,8 @@ build_release()
 	cd "$srcdir" || err "$vdir: 2 !cd \"$srcdir\""
 	x_ ./mk -d coreboot
 	mk -b coreboot pico-serprog stm32-vserprog pcsx-redux
+
+	fe_ mkrom_tarball find bin -maxdepth 1 -type d -name "serprog_*"
 	x_ mv bin ../roms
 	) || err "can't build rom images"
 

From ec5c954337b2e1ea50b0ace0f1086e48f20e7774 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 15:12:10 +0100
Subject: [PATCH 1378/1549] lib.sh: Simplified fx_() and removed fe_()

Instead of calling fe_, prefix x_ as indicated.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/pico-serprog/mkhelper.cfg   |  2 +-
 config/data/stm32-vserprog/mkhelper.cfg |  2 +-
 include/inject.sh                       | 14 ++++++++------
 include/lib.sh                          | 14 +-------------
 include/rom.sh                          |  2 +-
 mk                                      |  2 +-
 6 files changed, 13 insertions(+), 23 deletions(-)

diff --git a/config/data/pico-serprog/mkhelper.cfg b/config/data/pico-serprog/mkhelper.cfg
index de3f6aa5..982c365b 100644
--- a/config/data/pico-serprog/mkhelper.cfg
+++ b/config/data/pico-serprog/mkhelper.cfg
@@ -4,4 +4,4 @@ sersrc="src/pico-serprog"
 serx="$sersrc/build/pico_serprog.uf2"
 picosdk="src/pico-sdk"
 serdir="$picosdk/src/boards/include/boards"
-premake="$dry eval fe_ \"buildser pico\" basename -as .h \"\$serdir/\"*.h"
+premake="$dry eval fx_ \"buildser pico\" x_ basename -as .h \"\$serdir/\"*.h"
diff --git a/config/data/stm32-vserprog/mkhelper.cfg b/config/data/stm32-vserprog/mkhelper.cfg
index 344dde81..bb2189a6 100644
--- a/config/data/stm32-vserprog/mkhelper.cfg
+++ b/config/data/stm32-vserprog/mkhelper.cfg
@@ -3,4 +3,4 @@
 sersrc="src/stm32-vserprog"
 serx="$sersrc/stm32-vserprog.hex"
 serdir="$sersrc/boards"
-mkhelper="$dry eval fe_ \"buildser stm32\" basename -as .h \"\$serdir/\"*.h"
+mkhelper="$dry eval fx_ \"buildser stm32\" x_ basename -as .h \"\$serdir/\"*.h"
diff --git a/include/inject.sh b/include/inject.sh
index f1e29fd6..dc4868ed 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -49,7 +49,7 @@ download()
 readkconfig()
 {
 	x_ rm -f "$xbmktmp/cbcfg"
-	fe_ scankconfig find "$boarddir/config" -type f
+	fx_ scankconfig x_ find "$boarddir/config" -type f
 
 	eval "`setcfg "$xbmktmp/cbcfg" 1`"
 
@@ -148,7 +148,7 @@ extract_intel_me()
 	    chkvars ME11delta ME11version ME11sku ME11pch
 	[ "$ME11bootguard" = "y" ] && x_ ./mk -f deguard
 
-	set +u +e && fe_ find_me find "$xbmkpwd/$appdir" -type f
+	set +u +e && fx_ find_me x_ find "$xbmkpwd/$appdir" -type f
 	[ "$ME11bootguard" != "y" ] && x_ mv "$_metmp" "$_me" && return 0
 
 	( x_ cd src/deguard/
@@ -169,7 +169,7 @@ find_me()
 	    "$mecleaner" $mfs $_r -t -O "$_metmp" "$1" || "$me7updateparser" \
 	    -O "$_metmp" "$1" || extract_archive "$1" "$_7ztest" || return 0
 
-	fe_ find_me find "$_7ztest" -type f || return 1; :
+	fx_ find_me x_ find "$_7ztest" -type f || return 1; :
 }
 
 extract_archive()
@@ -228,7 +228,8 @@ extract_sch5545ec()
 # https://pcsupport.lenovo.com/us/en/products/laptops-and-netbooks/thinkpad-t-series-laptops/thinkpad-t480-type-20l5-20l6/20l5/solutions/ht508988
 extract_tbfw()
 {
-	chkvars TBFW_size; fe_ copy_tbfw find "$appdir" -type f -name "TBT.bin"
+	chkvars TBFW_size
+	fx_ copy_tbfw x_ find "$appdir" -type f -name "TBT.bin"
 }
 
 copy_tbfw()
@@ -344,7 +345,8 @@ patch_release_roms()
 	done
 
 	if readkconfig; then
-		fe_ preprom find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
+		fx_ preprom x_ find "$tmpromdir" -maxdepth 1 -type f \
+		    -name "*.rom"
 		[ "$nukemode" != "nuke" ] || \
 			printf "Make sure you inserted vendor files: %s\n" \
 			    "$vguide" > "$tmpromdir/README.md" || :
@@ -492,7 +494,7 @@ modify_mac()
 	[ -n "$new_mac" ] && [ "$new_mac" != "restore" ] && \
 	    x_ "$nvm" "$xbmklocal/gbe" setmac "$new_mac"
 
-	fe_ newmac find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
+	fx_ newmac x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 
 	printf "\nGbE NVM written to '%s':\n" "$archive"
 	x_ "$nvm" "$xbmklocal/gbe" dump | grep -v "bytes read from file" || :
diff --git a/include/lib.sh b/include/lib.sh
index f20b17e9..274daf69 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -144,23 +144,11 @@ singletree()
 	    return 1
 }
 
-fe_()
-{
-	find_ex "x_" "$@"
-}
-
 fx_()
 {
-	find_ex "" "$@"
-}
-
-find_ex()
-{
-	xmsg="$1" && shift 1
 	fd="`mktemp`" && x_ rm -f "$fd" && x_ touch "$fd"
 	xx="$1" && shift 1
-	$xmsg "$@" 2>/dev/null | sort 1>"$fd" 2>/dev/null || \
-	    err "!find $(echo "$@") > \"$fd\""
+	"$@" 2>/dev/null | sort 1>"$fd" 2>/dev/null || err "FATAL: !sort fx_"
 	dx_ "$xx" "$fd" || break
 	x_ rm -f "$fd"
 }
diff --git a/include/rom.sh b/include/rom.sh
index cb3c1298..fdd0787f 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -183,7 +183,7 @@ mkseagrub()
 	[ "$payload_grubsea" = "y" ] && pname="grub"
 	[ "$payload_grubsea" = "y" ] || \
 	    cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
-	fe_ cprom find "$grubdata/keymap" -type f -name "*.gkb"
+	fx_ cprom x_ find "$grubdata/keymap" -type f -name "*.gkb"
 }
 
 add_uboot()
diff --git a/mk b/mk
index 06e73ddc..0c156523 100755
--- a/mk
+++ b/mk
@@ -88,7 +88,7 @@ build_release()
 	x_ ./mk -d coreboot
 	mk -b coreboot pico-serprog stm32-vserprog pcsx-redux
 
-	fe_ mkrom_tarball find bin -maxdepth 1 -type d -name "serprog_*"
+	fx_ mkrom_tarball x_ find bin -maxdepth 1 -type d -name "serprog_*"
 	x_ mv bin ../roms
 	) || err "can't build rom images"
 

From 394b4ea7a59e4392d39c6e8154b21ae91b26492e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 15:17:45 +0100
Subject: [PATCH 1379/1549] inject.sh: rename copytb and preprom functions

make them shorter so they go on one line again

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index dc4868ed..fe52e986 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -228,11 +228,10 @@ extract_sch5545ec()
 # https://pcsupport.lenovo.com/us/en/products/laptops-and-netbooks/thinkpad-t-series-laptops/thinkpad-t480-type-20l5-20l6/20l5/solutions/ht508988
 extract_tbfw()
 {
-	chkvars TBFW_size
-	fx_ copy_tbfw x_ find "$appdir" -type f -name "TBT.bin"
+	chkvars TBFW_size; fx_ copytb x_ find "$appdir" -type f -name "TBT.bin"
 }
 
-copy_tbfw()
+copytb()
 {
 	[ -f "$1" ] && [ ! -L "$1" ] && x_ dd if=/dev/null of="$1" bs=1 \
 	    seek=$TBFW_size && x_ mv "$1" "$_dest" && return 1; :
@@ -345,8 +344,7 @@ patch_release_roms()
 	done
 
 	if readkconfig; then
-		fx_ preprom x_ find "$tmpromdir" -maxdepth 1 -type f \
-		    -name "*.rom"
+		fx_ prep x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 		[ "$nukemode" != "nuke" ] || \
 			printf "Make sure you inserted vendor files: %s\n" \
 			    "$vguide" > "$tmpromdir/README.md" || :
@@ -380,7 +378,7 @@ patch_release_roms()
 	    "$archive" || err "'$archive' -> Can't overwrite - $dontflash"; :
 }
 
-preprom()
+prep()
 {
 	_xrom="$1"
 	_xromname="${1##*/}"

From 7f71328f0e214db25f5dcccea0dab32ea834fb13 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 16:23:12 +0100
Subject: [PATCH 1380/1549] lib.sh: Remove useless command in err()

We don't need this, since we're exiting anyway.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/lib.sh b/include/lib.sh
index 274daf69..950a07c8 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -168,7 +168,6 @@ x_()
 
 err()
 {
-	set -u -e
 	[ $# -lt 1 ] || printf "ERROR %s: %s\n" "$0" "$1" 1>&2 || :
 	exit 1
 }

From d530e68594d39076831d7a232ea17c8b42d73b4f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 16:53:57 +0100
Subject: [PATCH 1381/1549] inject.sh: Simplify patch_release_roms()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 18 ++++--------------
 1 file changed, 4 insertions(+), 14 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index fe52e986..7bcd5bc7 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -13,7 +13,6 @@ cbcfgsdir="config/coreboot"
 hashfiles="vendorhashes blobhashes" # blobhashes for backwards compatibility
 dontflash="!!! AN ERROR OCCURED! Please DO NOT flash if injection failed. !!!"
 vfix="DO_NOT_FLASH_YET._FIRST,_INJECT_FILES_VIA_INSTRUCTIONS_ON_LIBREBOOT.ORG_"
-vguide="https://libreboot.org/docs/install/ivy_has_common.html"
 tmpromdel="$xbmklocal/DO_NOT_FLASH"
 nvm="util/nvmutil/nvm"
 ifdtool="elf/ifdtool/default/ifdtool"
@@ -338,23 +337,14 @@ patch_release_roms()
 	x_ tar -xf "$archive" -C "${tmpromdir%"/bin/$board"}"
 
 	for _hashes in $hashfiles; do
-		[ "$need_files" = "y" ] || break
-		e "$tmpromdir/$_hashes" f && has_hashes="y" && \
-		    hashfile="$_hashes" && break; :
+		[ "$need_files" = "y" ] && e "$tmpromdir/$_hashes" f && \
+		    has_hashes="y" && hashfile="$_hashes" && break; :
 	done
 
-	if readkconfig; then
-		fx_ prep x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
-		[ "$nukemode" != "nuke" ] || \
-			printf "Make sure you inserted vendor files: %s\n" \
-			    "$vguide" > "$tmpromdir/README.md" || :
-	else
-		printf "Skipping vendorfiles on '%s'\n" "$archive" 1>&2
-		need_files="n"
-	fi
+	readkconfig || exit 0; [ "$need_files" = "n" ] || \
+	    fx_ prep x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 
 	(
-	[ "$need_files" = "y" ] || exit 0
 	cd "$tmpromdir" || err "patch '$archive': can't cd $tmpromdir"
 	# NOTE: For compatibility with older rom releases, defer to sha1
 	if [ "$has_hashes" = "y" ] && [ "$nukemode" != "nuke" ]; then

From e3098c61f43575650628fc4e6f7e1693c44ac337 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 17:00:41 +0100
Subject: [PATCH 1382/1549] inject.sh: simplified MAC address handling

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 7bcd5bc7..e64c304e 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -354,7 +354,7 @@ patch_release_roms()
 	fi
 	) || err "'$archive' -> Can't verify vendor hashes. $dontflash"
 
-	[ -z "$new_mac" ] || modify_mac || printf "\nGbE not defined\n" 1>&2
+	[ -z "$new_mac" ] || [ -z "$CONFIG_GBE_BIN_PATH" ] || modify_mac
 
 	[ "$xchanged" = "y" ] || rm -Rf "$tmpromdel" || :
 	[ "$xchanged" = "y" ] || return 0
@@ -476,16 +476,11 @@ insert()
 
 modify_mac()
 {
-	[ -n "$CONFIG_GBE_BIN_PATH" ] || return 1
-
 	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "$xbmklocal/gbe"
 	[ -n "$new_mac" ] && [ "$new_mac" != "restore" ] && \
 	    x_ "$nvm" "$xbmklocal/gbe" setmac "$new_mac"
 
 	fx_ newmac x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
-
-	printf "\nGbE NVM written to '%s':\n" "$archive"
-	x_ "$nvm" "$xbmklocal/gbe" dump | grep -v "bytes read from file" || :
 }
 
 newmac()

From a94bd3c0939fac05a902af2cce2cf862ecdf9200 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 17:08:42 +0100
Subject: [PATCH 1383/1549] inject.sh: simplify extract_kbc1126ec()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index e64c304e..c0b4409f 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -150,7 +150,8 @@ extract_intel_me()
 	set +u +e && fx_ find_me x_ find "$xbmkpwd/$appdir" -type f
 	[ "$ME11bootguard" != "y" ] && x_ mv "$_metmp" "$_me" && return 0
 
-	( x_ cd src/deguard/
+	(
+	x_ cd src/deguard/
 	x_ ./finalimage.py --delta "data/delta/$ME11delta" --version \
 	    "$ME11version" --pch "$ME11pch" --sku "$ME11sku" \
 	    --fake-fpfs data/fpfs/zero --input "$_metmp" --output "$_me"
@@ -181,15 +182,11 @@ extract_archive()
 
 extract_kbc1126ec()
 {
-	x_ e "$kbc1126_ec_dump" f
 	(
 	x_ cd "$appdir/"
-	mv Rompaq/68*.BIN ec.bin || :
-	if [ ! -f "ec.bin" ]; then
-		unar -D ROM.CAB Rom.bin || unar -D Rom.CAB Rom.bin || \
-		    unar -D 68*.CAB Rom.bin || err "kbc1126 unar failed"
-		x_ mv Rom.bin ec.bin
-	fi
+	mv Rompaq/68*.BIN ec.bin || unar -D ROM.CAB Rom.bin || unar -D \
+	    Rom.CAB Rom.bin || unar -D 68*.CAB Rom.bin || err "!kbc1126 unar"
+	[ -f "ec.bin" ] || x_ mv Rom.bin ec.bin
 	x_ e ec.bin f && x_ "$kbc1126_ec_dump" ec.bin
 	) || err "$board: can't extract kbc1126 ec firmware - $dontflash"
 

From cba04aa74b816cbd5f1266a73962f6dd48ee2892 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 19:00:13 +0100
Subject: [PATCH 1384/1549] init.sh: Use readlink in pybin()

Use realpath only as a fallback.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh |  3 +--
 include/lib.sh  | 12 ++++++++++++
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 1be860ea..5032d734 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -80,8 +80,7 @@ pybin()
 	# ideally, don't rely on PATH or hardcoded paths if python venv.
 	# use the *real*, direct executable linked to by the venv symlink
 	if [ $venv -gt 0 ] && [ -L "`command -v "$1" 2>/dev/null`" ]; then
-		# realpath isn't posix, but available mostly universally
-		pypath="$(realpath \
+		pypath="$(findpath \
 		    "$(command -v "$1" 2>/dev/null)" 2>/dev/null || :)"
 		[ -e "$pypath" ] && [ ! -d "$pypath" ] && \
 		    [ -x "$pypath" ] && printf "%s\n" "$pypath" && return 0; :
diff --git a/include/lib.sh b/include/lib.sh
index 950a07c8..99e59a1a 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -144,6 +144,18 @@ singletree()
 	    return 1
 }
 
+findpath()
+{
+	[ $# -gt 0 ] || err "findpath: No arguments provided"
+	while [ $# -gt 0 ]; do
+		found="`readlink -f "$1" 2>/dev/null`" || return 1; :
+		[ -n "$found" ] || found="`realpath "$1" 2>/dev/null`" || \
+		    return 1; :
+		printf "%s\n" "$found"
+		shift 1
+	done
+}
+
 fx_()
 {
 	fd="`mktemp`" && x_ rm -f "$fd" && x_ touch "$fd"

From 40a944118f2af08ab37719c07cf7e826267a0eef Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 19:03:51 +0100
Subject: [PATCH 1385/1549] init.sh: run set_version before set_env

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 42 +++++++++++++++++++++---------------------
 1 file changed, 21 insertions(+), 21 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 5032d734..6ccdf13f 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -31,7 +31,7 @@ xbmk_init()
 	id -u 1>/dev/null 2>/dev/null || err "suid check failed (id -u)"
 	[ "$(id -u)" != "0" ] || err "this command as root is not permitted"
 
-	for init_cmd in set_pyver set_env set_version git_init create_tmpdir \
+	for init_cmd in set_pyver set_version set_env git_init create_tmpdir \
 	    lock create_pathdirs child_exec; do
 		xbmk_$init_cmd "$@" || break
 	done
@@ -97,26 +97,6 @@ pybin()
 	command -v "$1" 2>/dev/null || return 1
 }
 
-xbmk_set_env()
-{
-	# XBMK_CACHE is a directory, for caching downloads and git repon
-	[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$xbmkpwd/cache"
-	[ -z "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
-	[ -L "$XBMK_CACHE" ] && [ "$XBMK_CACHE" = "$xbmkpwd/cache" ] && \
-	    err "cachedir '$xbmkpwd/cache' is a symlink"
-	[ -L "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
-	[ -f "$XBMK_CACHE" ] && err "cachedir '$XBMK_CACHE' is a file"; :
-
-	# if "y": a coreboot target won't be built if target.cfg says release="n"
-	# (this is used to exclude certain build targets from releases)
-	[ -z "${XBMK_RELEASE+x}" ] && export XBMK_RELEASE="n"
-	[ "$XBMK_RELEASE" = "y" ] || export XBMK_RELEASE="n"
-
-	[ -z "${XBMK_THREADS+x}" ] && export XBMK_THREADS=1
-	expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
-	    1>/dev/null 2>/dev/null || export XBMK_THREADS=1; :
-}
-
 xbmk_set_version()
 {
 	[ ! -f ".version" ] || read -r version < ".version" || :; :
@@ -142,6 +122,26 @@ xbmk_set_version()
 	export LOCALVERSION="-$projectname-${version%%-*}"
 }
 
+xbmk_set_env()
+{
+	# XBMK_CACHE is a directory, for caching downloads and git repon
+	[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$xbmkpwd/cache"
+	[ -z "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
+	[ -L "$XBMK_CACHE" ] && [ "$XBMK_CACHE" = "$xbmkpwd/cache" ] && \
+	    err "cachedir '$xbmkpwd/cache' is a symlink"
+	[ -L "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
+	[ -f "$XBMK_CACHE" ] && err "cachedir '$XBMK_CACHE' is a file"; :
+
+	# if "y": a coreboot target won't be built if target.cfg says release="n"
+	# (this is used to exclude certain build targets from releases)
+	[ -z "${XBMK_RELEASE+x}" ] && export XBMK_RELEASE="n"
+	[ "$XBMK_RELEASE" = "y" ] || export XBMK_RELEASE="n"
+
+	[ -z "${XBMK_THREADS+x}" ] && export XBMK_THREADS=1
+	expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
+	    1>/dev/null 2>/dev/null || export XBMK_THREADS=1; :
+}
+
 xbmk_git_init()
 {
 	for gitarg in "--global user.name" "--global user.email"; do

From e1628ad8f3e63428888b42d0c49c3fe6b3c9d006 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 19:04:52 +0100
Subject: [PATCH 1386/1549] init.sh: export LOCALVERSION in set_env

Don't do it in set_version

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/init.sh b/include/init.sh
index 6ccdf13f..1bf52eef 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -119,11 +119,12 @@ xbmk_set_version()
 	printf "%s\n" "$versiondate" > ".versiondate" || err "can't save date"
 
 	relname="$projectname-$version"
-	export LOCALVERSION="-$projectname-${version%%-*}"
 }
 
 xbmk_set_env()
 {
+	export LOCALVERSION="-$projectname-${version%%-*}"
+
 	# XBMK_CACHE is a directory, for caching downloads and git repon
 	[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$xbmkpwd/cache"
 	[ -z "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"

From e1af1055ed11b25df42c8a7a32c250da346b08b7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 19:09:29 +0100
Subject: [PATCH 1387/1549] init.sh: check XBMK_CACHE is a directory instead

it doesn't matter if it's not a file. that's the wrong check.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/init.sh b/include/init.sh
index 1bf52eef..1a01de45 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -131,7 +131,7 @@ xbmk_set_env()
 	[ -L "$XBMK_CACHE" ] && [ "$XBMK_CACHE" = "$xbmkpwd/cache" ] && \
 	    err "cachedir '$xbmkpwd/cache' is a symlink"
 	[ -L "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
-	[ -f "$XBMK_CACHE" ] && err "cachedir '$XBMK_CACHE' is a file"; :
+	[ -d "$XBMK_CACHE" ] || err "cachedir '$XBMK_CACHE' is a file"; :
 
 	# if "y": a coreboot target won't be built if target.cfg says release="n"
 	# (this is used to exclude certain build targets from releases)

From 570f1417a80224cf73a57febf126bd80e908b32e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 19:12:51 +0100
Subject: [PATCH 1388/1549] init.sh: Resolve XBMK_CACHE via readlink

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/init.sh b/include/init.sh
index 1a01de45..a322370b 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -131,6 +131,9 @@ xbmk_set_env()
 	[ -L "$XBMK_CACHE" ] && [ "$XBMK_CACHE" = "$xbmkpwd/cache" ] && \
 	    err "cachedir '$xbmkpwd/cache' is a symlink"
 	[ -L "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
+	xbmkcache="`findpath "$XBMK_CACHE"`" || \
+	    err "Can't resolve cachedir: '$XBMK_CACHE'"
+	export XBMK_CACHE="$xbmkcache"
 	[ -d "$XBMK_CACHE" ] || err "cachedir '$XBMK_CACHE' is a file"; :
 
 	# if "y": a coreboot target won't be built if target.cfg says release="n"

From 1b0afdcea226ebc4e5f46c50fc21aa835b52ada9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 19:23:32 +0100
Subject: [PATCH 1389/1549] init.sh: also allow XBMK_RELEASE=Y or N

as opposed to =n or =y

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/init.sh b/include/init.sh
index a322370b..e5e3f564 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -139,6 +139,8 @@ xbmk_set_env()
 	# if "y": a coreboot target won't be built if target.cfg says release="n"
 	# (this is used to exclude certain build targets from releases)
 	[ -z "${XBMK_RELEASE+x}" ] && export XBMK_RELEASE="n"
+	[ "$XBMK_RELEASE" = "N" ] && export XBMK_RELEASE="n"
+	[ "$XBMK_RELEASE" = "Y" ] && export XBMK_RELEASE="y"
 	[ "$XBMK_RELEASE" = "y" ] || export XBMK_RELEASE="n"
 
 	[ -z "${XBMK_THREADS+x}" ] && export XBMK_THREADS=1

From 2cea8517f3b6c7f72cdecbcd3e6745db29284852 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 7 May 2025 21:16:50 +0100
Subject: [PATCH 1390/1549] init.sh: remove useless export

we already reset to n if not y, afterward

just rely on that

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/init.sh b/include/init.sh
index e5e3f564..d2db0236 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -139,7 +139,6 @@ xbmk_set_env()
 	# if "y": a coreboot target won't be built if target.cfg says release="n"
 	# (this is used to exclude certain build targets from releases)
 	[ -z "${XBMK_RELEASE+x}" ] && export XBMK_RELEASE="n"
-	[ "$XBMK_RELEASE" = "N" ] && export XBMK_RELEASE="n"
 	[ "$XBMK_RELEASE" = "Y" ] && export XBMK_RELEASE="y"
 	[ "$XBMK_RELEASE" = "y" ] || export XBMK_RELEASE="n"
 

From e084b06dc767af37870b05139598b56a41872d1f Mon Sep 17 00:00:00 2001
From: cqst <not@important>
Date: Thu, 8 May 2025 02:28:14 -0700
Subject: [PATCH 1391/1549] fix trying to boot all logical volumes after
 unlocking an encrypted volume

---
 config/grub/default/config/payload | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/grub/default/config/payload b/config/grub/default/config/payload
index 3f134f1d..3d84413e 100644
--- a/config/grub/default/config/payload
+++ b/config/grub/default/config/payload
@@ -184,7 +184,7 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 	# using * is slow on some machines, but we use it here,
 	# just once. in so doing, we find every lvm volume
 	for vol in (*); do
-		if regexp ^lvm/ $vol; then
+		if regexp ^\\(lvm/ $vol; then
 			lvmvol="${lvmvol} ${vol}"
 			try_bootcfg "${vol}"
 		fi

From fe926052441151722886edb5693a961342b3aa9e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 8 May 2025 11:12:34 +0100
Subject: [PATCH 1392/1549] also fix the other grub trees

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/nvme/config/payload | 2 +-
 config/grub/xhci/config/payload | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/grub/nvme/config/payload b/config/grub/nvme/config/payload
index 22dd8fe1..4f3de36e 100644
--- a/config/grub/nvme/config/payload
+++ b/config/grub/nvme/config/payload
@@ -196,7 +196,7 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 	# using * is slow on some machines, but we use it here,
 	# just once. in so doing, we find every lvm volume
 	for vol in (*); do
-		if regexp ^lvm/ $vol; then
+		if regexp ^\\(lvm/ $vol; then
 			lvmvol="${lvmvol} ${vol}"
 			try_bootcfg "${vol}"
 		fi
diff --git a/config/grub/xhci/config/payload b/config/grub/xhci/config/payload
index d1f81fd3..9db22fe2 100644
--- a/config/grub/xhci/config/payload
+++ b/config/grub/xhci/config/payload
@@ -197,7 +197,7 @@ menuentry 'Load Operating System (incl. fully encrypted disks)  [o]' --hotkey='o
 	# using * is slow on some machines, but we use it here,
 	# just once. in so doing, we find every lvm volume
 	for vol in (*); do
-		if regexp ^lvm/ $vol; then
+		if regexp ^\\(lvm/ $vol; then
 			lvmvol="${lvmvol} ${vol}"
 			try_bootcfg "${vol}"
 		fi

From 021e7615c84ddf91edcd13a6385fe1bd6ca51ebb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 8 May 2025 20:27:42 +0100
Subject: [PATCH 1393/1549] HP 820 G2: Use fam15h cbfstool tree for refcode

We used cbfstool from coreboot 4.13, because it was the
last version to work with the particular format used
for stage files, before the CBFS standard changed in newer
releases of cbfstool.

When I added this board to Libreboot, it was source-only at
first so it didn't matter. I didn't want to do a standalone
cbfstool binary, in case some people decided to use that one
on newer boards, which would cause all sorts of issues.

So I bodged it and just included an import of coreboot 4.13.

Well, the cbfstool from coreboot 4.11, as used for FAM15H
AMD boards, is compatible. I checked the code diff between
the two, and there is no meaningful difference.

I've tested this, and it works, since the last release or
two now includes 820 G2 images, so I  was able to use those
with ./mk inject, to verify whether the refcode file is
still grabbed properly. We need the refcode to handle MRC
on Broadwell platform, but we extract it from an old Google
Chromebook image, that uses the old CBFS stage file layout.

This change solves my problem: the problem was that releases
are bloated further, due to including this extra coreboot
version. This should reduce the size of the next release
considerably, especially after decompressing the tarball.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...ake-use-of-spurious-null-termination.patch |  56 ------
 ...-build-error-on-GCC-15-host-compiler.patch |  33 ----
 config/coreboot/coreboot413/target.cfg        |   4 -
 .../coreboot/coreboot413/module.list          |   1 -
 .../coreboot/coreboot413/vboot/module.cfg     |   5 -
 ...c-Fix-the-bounds-check-on-vmlinuz_he.patch | 178 ------------------
 config/vendor/hp820g2/pkg.cfg                 |   2 +-
 7 files changed, 1 insertion(+), 278 deletions(-)
 delete mode 100644 config/coreboot/coreboot413/patches/0001-cbfstool-Make-use-of-spurious-null-termination.patch
 delete mode 100644 config/coreboot/coreboot413/patches/0002-Fix-cbfstool-build-error-on-GCC-15-host-compiler.patch
 delete mode 100644 config/coreboot/coreboot413/target.cfg
 delete mode 100644 config/submodule/coreboot/coreboot413/module.list
 delete mode 100644 config/submodule/coreboot/coreboot413/vboot/module.cfg
 delete mode 100644 config/submodule/coreboot/coreboot413/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch

diff --git a/config/coreboot/coreboot413/patches/0001-cbfstool-Make-use-of-spurious-null-termination.patch b/config/coreboot/coreboot413/patches/0001-cbfstool-Make-use-of-spurious-null-termination.patch
deleted file mode 100644
index dfc684e1..00000000
--- a/config/coreboot/coreboot413/patches/0001-cbfstool-Make-use-of-spurious-null-termination.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From f22f408956bf02609a96b7d72fb3321da159bfc6 Mon Sep 17 00:00:00 2001
-From: Nico Huber <nico.huber@secunet.com>
-Date: Tue, 22 Jun 2021 13:49:44 +0000
-Subject: [PATCH 1/1] cbfstool: Make use of spurious null-termination
-
-The null-termination of `filetypes` was added after the code was
-written, obviously resulting in NULL dereferences. As some more
-code has grown around the termination, it's hard to revert the
-regression, so let's update the code that still used the array
-length.
-
-This fixes commit 7f5f9331d1 (util/cbfstool: fix buffer over-read)
-which actually did fix something, but only one path while it broke
-two others. We should be careful with fixes, they can always break
-something else. Especially when a dumb tool triggered the patching
-it seems likely that fewer people looked into related code.
-
-Change-Id: If2ece1f5ad62952ed2e57769702e318ba5468f0c
-Signed-off-by: Nico Huber <nico.huber@secunet.com>
-Reviewed-on: https://review.coreboot.org/c/coreboot/+/55763
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-Reviewed-by: Julius Werner <jwerner@chromium.org>
----
- util/cbfstool/common.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
-index e2ed38ffc4..539d0baccf 100644
---- a/util/cbfstool/common.c
-+++ b/util/cbfstool/common.c
-@@ -168,10 +168,10 @@ void print_supported_architectures(void)
- 
- void print_supported_filetypes(void)
- {
--	int i, number = ARRAY_SIZE(filetypes);
-+	int i;
- 
--	for (i=0; i<number; i++) {
--		printf(" %s%c", filetypes[i].name, (i==(number-1))?'\n':',');
-+	for (i=0; filetypes[i].name; i++) {
-+		printf(" %s%c", filetypes[i].name, filetypes[i + 1].name ? ',' : '\n');
- 		if ((i%8) == 7)
- 			printf("\n");
- 	}
-@@ -180,7 +180,7 @@ void print_supported_filetypes(void)
- uint64_t intfiletype(const char *name)
- {
- 	size_t i;
--	for (i = 0; i < (sizeof(filetypes) / sizeof(struct typedesc_t)); i++)
-+	for (i = 0; filetypes[i].name; i++)
- 		if (strcmp(filetypes[i].name, name) == 0)
- 			return filetypes[i].type;
- 	return -1;
--- 
-2.39.2
-
diff --git a/config/coreboot/coreboot413/patches/0002-Fix-cbfstool-build-error-on-GCC-15-host-compiler.patch b/config/coreboot/coreboot413/patches/0002-Fix-cbfstool-build-error-on-GCC-15-host-compiler.patch
deleted file mode 100644
index 9b7b8c5b..00000000
--- a/config/coreboot/coreboot413/patches/0002-Fix-cbfstool-build-error-on-GCC-15-host-compiler.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From 06e8d7a9db4efe1dc2b7e5865b801a5518b38fbd Mon Sep 17 00:00:00 2001
-From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Date: Tue, 29 Apr 2025 17:31:13 +0300
-Subject: [PATCH 1/1] Fix cbfstool build error on GCC 15 host compiler
-
-GCC 15 now considers the unterminated-string-initialization warning as
-part of -Werror by default. Coreboot compiles host utilities with the
-system compiler, which results in getting this error in some files.
-
-Mark a hexadecimal translation table in cbfstool code as "nonstring" to
-avoid the warning-turned-error.
-
-Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
----
- util/cbfstool/common.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
-index 539d0baccf..f6fe647503 100644
---- a/util/cbfstool/common.c
-+++ b/util/cbfstool/common.c
-@@ -188,7 +188,7 @@ uint64_t intfiletype(const char *name)
- 
- char *bintohex(uint8_t *data, size_t len)
- {
--	static const char translate[16] = "0123456789abcdef";
-+	static const char translate[16] __attribute__((__nonstring__)) = "0123456789abcdef";
- 
- 	char *result = malloc(len * 2 + 1);
- 	if (result == NULL)
--- 
-2.39.5
-
diff --git a/config/coreboot/coreboot413/target.cfg b/config/coreboot/coreboot413/target.cfg
deleted file mode 100644
index a0aae341..00000000
--- a/config/coreboot/coreboot413/target.cfg
+++ /dev/null
@@ -1,4 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-tree="coreboot413"
-rev="5c186c6777c9438ff4681929c9c25c98dee28bef"
diff --git a/config/submodule/coreboot/coreboot413/module.list b/config/submodule/coreboot/coreboot413/module.list
deleted file mode 100644
index 08e76de0..00000000
--- a/config/submodule/coreboot/coreboot413/module.list
+++ /dev/null
@@ -1 +0,0 @@
-3rdparty/vboot
diff --git a/config/submodule/coreboot/coreboot413/vboot/module.cfg b/config/submodule/coreboot/coreboot413/vboot/module.cfg
deleted file mode 100644
index 79c98870..00000000
--- a/config/submodule/coreboot/coreboot413/vboot/module.cfg
+++ /dev/null
@@ -1,5 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-or-later
-
-subrepo="https://review.coreboot.org/vboot.git"
-subrepo_bkup="https://github.com/coreboot/vboot"
-subhash="4c523ed10f25de872ac0513ebd6ca53d3970b9de"
diff --git a/config/submodule/coreboot/coreboot413/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/coreboot413/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
deleted file mode 100644
index 1ac41de6..00000000
--- a/config/submodule/coreboot/coreboot413/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
+++ /dev/null
@@ -1,178 +0,0 @@
-From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
-From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
-Date: Thu, 30 May 2024 14:08:33 -0600
-Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
- vmlinuz_header_{offset,size}
-
-The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
-wrong:
-
-	if (!vmlinuz_header_size ||
-	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
-	    kpart_data) {
-		return 1;
-	}
-
-`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
-unless something has overflowed!  And `vmlinuz_header_offset` hasn't even
-been set yet (besides being initialized to zero)!
-
-GCC will deduce that if the check didn't cause the function to bail, then
-vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
-[2GiB,4GiB).
-
-On platforms where size_t is 32-bits, this is *especially* broken.
-memcpy's size argument must be in the range [0,2GiB).  Because GCC has
-proved that vmlinuz_header_size is higher than that, it will fail to
-compile:
-
-	host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
-
-So, fix the check.
-
-I can now say that what I suspect the original author meant to write would
-be the following patch, if `vmlinuz_header_offset` were already set:
-
-	-kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
-	+now        + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
-
-This hypothesis is supported by `now` not getting incremented by
-`kblob_size` the way it is for the keyblock and preamble sizes.
-
-However, we can also see that even this "corrected" bounds check is
-insufficient: it does not detect the vmlinuz_header overflowing into
-kblob_data.
-
-OK, so let's describe the fix:
-
-Have a `*vmlinuz_header` pointer instead of a
-`uint64_t vmlinuz_header_offset`, to be more similar to all the other
-regions.  With this change, the correct check becomes a simple
-
-      vmlinuz_header + vmlinuz_header_size > kblob_data
-
-While we're at it, make some changes that could have helped avoid this in
-the first place:
-
- - Add comments.
- - Calculate the vmlinuz_header offset right away, instead of waiting.
- - Go ahead and increment `now` by `kblob_size`, to increase regularity.
-
-Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
----
- host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
- 1 file changed, 51 insertions(+), 21 deletions(-)
-
-diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
-index 4ccfcf33..d2c09443 100644
---- a/host/lib/extract_vmlinuz.c
-+++ b/host/lib/extract_vmlinuz.c
-@@ -15,16 +15,44 @@
- 
- int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
- 		   void **vmlinuz_out, size_t *vmlinuz_size) {
-+	// We're going to be extracting `vmlinuz_header` and
-+	// `kblob_data`, and returning the concatenation of them.
-+	//
-+	// kpart_data = +-[kpart_size]------------------------------------+
-+	//              |                                                 |
-+	//  keyblock  = | +-[keyblock->keyblock_size]-------------------+ |
-+	//              | | struct vb2_keyblock          keyblock       | |
-+	//              | | char []                      ...data...     | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//  preamble  = | +-[preamble->preamble_size]-------------------+ |
-+	//              | | struct vb2_kernel_preamble   preamble       | |
-+	//              | | char []                       ...data...    | |
-+	//              | | char []                      vmlinuz_header | |
-+	//              | | char []                       ...data...    | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//  kblob_data= | +-[preamble->body_signature.data_size]--------+ |
-+	//              | | char []                       ...data...    | |
-+	//              | +---------------------------------------------+ |
-+	//              |                                                 |
-+	//              +-------------------------------------------------+
-+
- 	size_t now = 0;
-+	// The 3 sections of kpart_data.
-+	struct vb2_keyblock *keyblock = NULL;
- 	struct vb2_kernel_preamble *preamble = NULL;
- 	uint8_t *kblob_data = NULL;
- 	uint32_t kblob_size = 0;
-+	// vmlinuz_header
-+	uint8_t *vmlinuz_header = NULL;
- 	uint32_t vmlinuz_header_size = 0;
--	uint64_t vmlinuz_header_address = 0;
--	uint64_t vmlinuz_header_offset = 0;
-+	// The concatenated result.
- 	void *vmlinuz = NULL;
- 
--	struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
-+	// Isolate the 3 sections of kpart_data.
-+
-+	keyblock = (struct vb2_keyblock *)kpart_data;
- 	now += keyblock->keyblock_size;
- 	if (now > kpart_size)
- 		return 1;
-@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
- 
- 	kblob_data = kpart_data + now;
- 	kblob_size = preamble->body_signature.data_size;
--
--	if (!kblob_data || (now + kblob_size) > kpart_size)
-+	now += kblob_size;
-+	if (now > kpart_size)
- 		return 1;
- 
-+	// Find `vmlinuz_header` within `preamble`.
-+
- 	if (preamble->header_version_minor > 0) {
--		vmlinuz_header_address = preamble->vmlinuz_header_address;
-+		// calculate the vmlinuz_header offset from
-+		// the beginning of the kpart_data.  The kblob doesn't
-+		// include the body_load_offset, but does include
-+		// the keyblock and preamble sections.
-+		size_t vmlinuz_header_offset =
-+			preamble->vmlinuz_header_address -
-+			preamble->body_load_address +
-+			keyblock->keyblock_size +
-+			preamble->preamble_size;
-+
-+		vmlinuz_header = kpart_data + vmlinuz_header_offset;
- 		vmlinuz_header_size = preamble->vmlinuz_header_size;
- 	}
- 
--	if (!vmlinuz_header_size ||
--	    kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
--	    kpart_data) {
-+	if (!vmlinuz_header ||
-+	    !vmlinuz_header_size ||
-+	    vmlinuz_header + vmlinuz_header_size > kblob_data) {
- 		return 1;
- 	}
- 
--	// calculate the vmlinuz_header offset from
--	// the beginning of the kpart_data.  The kblob doesn't
--	// include the body_load_offset, but does include
--	// the keyblock and preamble sections.
--	vmlinuz_header_offset = vmlinuz_header_address -
--		preamble->body_load_address +
--		keyblock->keyblock_size +
--		preamble->preamble_size;
-+	// Concatenate and return.
- 
- 	vmlinuz = malloc(vmlinuz_header_size + kblob_size);
- 	if (vmlinuz == NULL)
- 		return 1;
--
--	memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
--	       vmlinuz_header_size);
--
-+	memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
- 	memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
- 
- 	*vmlinuz_out = vmlinuz;
--- 
-2.45.1
-
diff --git a/config/vendor/hp820g2/pkg.cfg b/config/vendor/hp820g2/pkg.cfg
index 89303ad3..308148c5 100644
--- a/config/vendor/hp820g2/pkg.cfg
+++ b/config/vendor/hp820g2/pkg.cfg
@@ -7,5 +7,5 @@ MRC_url="https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_s
 MRC_url_bkup="https://web.archive.org/web/20220310155922/https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip"
 MRC_hash="3ff1599c52539f0707a07a8664a84ce51cd3fed1569df4bb7aa6722fc8dec0af1754250333b6ca1a9794d970a4de7b29a5cf2499f5b61e4c3eab64d1314aaea9"
 MRC_board="samus"
-MRC_refcode_cbtree="coreboot413"
+MRC_refcode_cbtree="fam15h"
 MRC_refcode_gbe="131253"

From a3ba8acface32900a524cf0ab429cadcd99577bc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 8 May 2025 20:49:49 +0100
Subject: [PATCH 1394/1549] init.sh: Only check XBMK_CACHE if it exists

Otherwise, if it doesn't exist, the current check will
wrongly exit with error status, preventing you from
running the build system at all!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/init.sh b/include/init.sh
index d2db0236..b9cb81b1 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -134,7 +134,8 @@ xbmk_set_env()
 	xbmkcache="`findpath "$XBMK_CACHE"`" || \
 	    err "Can't resolve cachedir: '$XBMK_CACHE'"
 	export XBMK_CACHE="$xbmkcache"
-	[ -d "$XBMK_CACHE" ] || err "cachedir '$XBMK_CACHE' is a file"; :
+	[ ! -e "$XBMK_CACHE" ] || \
+	    [ -d "$XBMK_CACHE" ] || err "cachedir '$XBMK_CACHE' is a file"; :
 
 	# if "y": a coreboot target won't be built if target.cfg says release="n"
 	# (this is used to exclude certain build targets from releases)

From 93d4eca04ae9b7eabb4fa72d96784b9ba714d384 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 8 May 2025 21:33:17 +0100
Subject: [PATCH 1395/1549] git.sh: Hard fail if reset fails

We allow a re-try when cloning fails, to account
for redundancy, but resetfail currently doesn't
cause any error exit at all.

This patch mitigates that bug.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/include/git.sh b/include/git.sh
index 81c75806..3e885c1b 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -92,6 +92,7 @@ tmpclone()
 	livepull="n" && [ "$repofail" = "y" ] && \
 	    printf "Cached clone failed; trying online.\n" 1>&2 && livepull="y"
 
+	resetfail="n"
 	repofail="n"
 
 	[ $# -lt 6 ] || rm -Rf "$3" || err "git retry: !rm $3 ($1)"
@@ -107,10 +108,13 @@ tmpclone()
 	fi
 	(
 	[ $# -gt 5 ] || git clone "$repodir" "$3" || err "!clone $repodir $3"
-	git -C "$3" reset --hard "$4" || err "!reset $1 $2 $3 $4 $5"
+	git -C "$3" reset --hard "$4" || resetfail="y"
+	[ "$resetfail" = "y" ] && err "'$3': Cannot reset to rev '$4'"
 	fx_ "eval x_ git -C \"$3\" am" find "$5" -type f
 	) || repofail="y"
 
+	[ "$resetfail" = "y" ] && err "Cannot reset revisions"
+
 	[ "$repofail" = "y" ] && [ $# -lt 6 ] && tmpclone "$@" retry
 	[ "$repofail" = "y" ] && err "!clone $1 $2 $3 $4 $5"; :
 }

From 6bdb15fd329e1ffb22ff37c7e9a296cca633f836 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 8 May 2025 21:36:37 +0100
Subject: [PATCH 1396/1549] git.sh: hard fail if git am fails

similar to the last patch, we must ensure that the
inability to patch will cause a hard exit, regardless
of any redundancy we have for cloning.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 3e885c1b..afcfee93 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -94,6 +94,7 @@ tmpclone()
 
 	resetfail="n"
 	repofail="n"
+	amfail="n"
 
 	[ $# -lt 6 ] || rm -Rf "$3" || err "git retry: !rm $3 ($1)"
 	repodir="$XBMK_CACHE/repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"
@@ -109,11 +110,12 @@ tmpclone()
 	(
 	[ $# -gt 5 ] || git clone "$repodir" "$3" || err "!clone $repodir $3"
 	git -C "$3" reset --hard "$4" || resetfail="y"
-	[ "$resetfail" = "y" ] && err "'$3': Cannot reset to rev '$4'"
-	fx_ "eval x_ git -C \"$3\" am" find "$5" -type f
+	[ "$resetfail" = "y" ] || ( fx_ "eval x_ git -C \"$3\" am" find "$5" \
+	    -type f ) || amfail="y"
 	) || repofail="y"
 
 	[ "$resetfail" = "y" ] && err "Cannot reset revisions"
+	[ "$amfail" = "y" ] && err "Cannot apply patches"
 
 	[ "$repofail" = "y" ] && [ $# -lt 6 ] && tmpclone "$@" retry
 	[ "$repofail" = "y" ] && err "!clone $1 $2 $3 $4 $5"; :

From 454f11bdd7bf7409276b2e0fc301a061b258e8d9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 8 May 2025 21:38:07 +0100
Subject: [PATCH 1397/1549] git.sh: use setvars for fail variables

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index afcfee93..14def209 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -92,9 +92,7 @@ tmpclone()
 	livepull="n" && [ "$repofail" = "y" ] && \
 	    printf "Cached clone failed; trying online.\n" 1>&2 && livepull="y"
 
-	resetfail="n"
-	repofail="n"
-	amfail="n"
+	eval "`setvars "n" resetfail repofail amfail`"
 
 	[ $# -lt 6 ] || rm -Rf "$3" || err "git retry: !rm $3 ($1)"
 	repodir="$XBMK_CACHE/repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"

From 0d876622fcb715eb8cfc03a1bf9bb138fd845731 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 8 May 2025 22:05:28 +0100
Subject: [PATCH 1398/1549] git.sh: re-write tmpclone without caching

remove caching for now. it's buggy as hell.

will re-write the caching feature next.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 34 ++++++----------------------------
 1 file changed, 6 insertions(+), 28 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 14def209..9440b1af 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -89,34 +89,12 @@ fetch_submodule()
 
 tmpclone()
 {
-	livepull="n" && [ "$repofail" = "y" ] && \
-	    printf "Cached clone failed; trying online.\n" 1>&2 && livepull="y"
-
-	eval "`setvars "n" resetfail repofail amfail`"
-
-	[ $# -lt 6 ] || rm -Rf "$3" || err "git retry: !rm $3 ($1)"
-	repodir="$XBMK_CACHE/repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"
-	mkdir -p "$XBMK_CACHE/repo" || err "!rmdir $XBMK_CACHE/repo"
-
-	if [ "$livepull" = "y" ] && [ ! -d "$repodir" ]; then
-		git clone "$1" "$repodir" || git clone $2 "$repodir" || \
-		    err "!clone $1 $2 $repodir $4 $5" #
-	elif [ -d "$repodir" ] && [ $# -lt 6 ]; then
-		git -C "$repodir" pull || sleep 3 || git -C "$repodir" pull \
-		    || sleep 3 || git -C "$repodir" pull || :
-	fi
-	(
-	[ $# -gt 5 ] || git clone "$repodir" "$3" || err "!clone $repodir $3"
-	git -C "$3" reset --hard "$4" || resetfail="y"
-	[ "$resetfail" = "y" ] || ( fx_ "eval x_ git -C \"$3\" am" find "$5" \
-	    -type f ) || amfail="y"
-	) || repofail="y"
-
-	[ "$resetfail" = "y" ] && err "Cannot reset revisions"
-	[ "$amfail" = "y" ] && err "Cannot apply patches"
-
-	[ "$repofail" = "y" ] && [ $# -lt 6 ] && tmpclone "$@" retry
-	[ "$repofail" = "y" ] && err "!clone $1 $2 $3 $4 $5"; :
+	[ -d "$3" ] && return 0
+	printf "Creating git clone '%s' from '%s', '%s'\n" "$3" "$1" "$2"
+	git clone "$1" "$3" || x_ rm -Rf "$3"
+	[ -d "$3" ] || x_ git clone "$2" "$3"
+	x_ git -C "$3" reset --hard "$4"
+	fx_ "eval x_ git -C \"$3\" am" find "$5" -type f
 }
 
 nuke()

From 1ce3e7a3d39cced1749b909fba9228b877c77339 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 8 May 2025 22:17:35 +0100
Subject: [PATCH 1399/1549] mk: add missing error handli for mk -f

on the release command, that is

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/mk b/mk
index 0c156523..aa89710a 100755
--- a/mk
+++ b/mk
@@ -67,7 +67,7 @@ build_release()
 	(
 	cd "$srcdir" || err "$vdir: !cd \"$srcdir\""
 
-	./mk -f
+	x_ ./mk -f
 	rmgit .
 	x_ mv src/docs docs
 	) || err "can't create release files"

From 50ce1ac9b225d717cc26727f4f2330795e84f05a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 8 May 2025 23:28:06 +0100
Subject: [PATCH 1400/1549] mk: move release functions to idnclude/release.sh

The idea with mk is that it's meant to basically be a
stub for running everything else, while mainly having
the trees logic within it (what was once script/trees).

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 65 ++++++++++++++++++++++++++++++++++++++++++++++
 mk                 | 64 +--------------------------------------------
 2 files changed, 66 insertions(+), 63 deletions(-)
 create mode 100644 include/release.sh

diff --git a/include/release.sh b/include/release.sh
new file mode 100644
index 00000000..2f9f2b86
--- /dev/null
+++ b/include/release.sh
@@ -0,0 +1,65 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+# Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org>
+
+eval "`setvars "" vdir src_dirname relsrcdir relmode`"
+
+release()
+{
+	export XBMK_RELEASE="y"
+
+	vdir="release"
+	while getopts d:m: option; do
+		[ -z "$OPTARG" ] && err "empty argument not allowed"
+		case "$option" in
+		d) vdir="$OPTARG" ;;
+		m) relmode="$OPTARG" ;;
+		*) err "invalid option '-$option'" ;;
+		esac
+	done
+
+	vdir="$vdir/$version"
+	src_dirname="${relname}_src"
+	relsrcdir="$vdir/$src_dirname"
+
+	[ -e "$vdir" ] && err "already exists: \"$vdir\""
+	mkdir -p "$vdir" || err "mkvdir: !mkdir -p \"$vdir\""
+	git clone . "$relsrcdir" || err "mkdir: !gitclone \"$relsrcdir\""
+	touch "$relsrcdir/lock" || err "can't make lock file in $relsrcdir/"
+
+	build_release
+
+	printf "\n\nDONE! Check release files under %s\n" "$vdir"
+}
+
+build_release()
+{
+	(
+	cd "$relsrcdir" || err "$vdir: !cd \"$relsrcdir\""
+
+	x_ ./mk -f
+	rmgit .
+	x_ mv src/docs docs
+	) || err "can't create release files"
+
+	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
+	    --abbrev-commit > "$relsrcdir/CHANGELOG" || err "!log $relsrcdir"
+	rm -f "$relsrcdir/lock" || err "can't remove lock file in $relsrcdir"
+
+	(
+	cd "${relsrcdir%/*}" || err "$vdir: mktarball \"$relsrcdir\""
+	x_ mktarball "${relsrcdir##*/}" "${relsrcdir##*/}.tar.xz"
+	) || err "can't create src tarball"
+	[ "$relmode" = "src" ] && return 0
+
+	touch "$relsrcdir/lock" || err "can't make lock file in $relsrcdir/"
+	(
+	cd "$relsrcdir" || err "$vdir: 2 !cd \"$relsrcdir\""
+	x_ ./mk -d coreboot
+	mk -b coreboot pico-serprog stm32-vserprog pcsx-redux
+
+	fx_ mkrom_tarball x_ find bin -maxdepth 1 -type d -name "serprog_*"
+	x_ mv bin ../roms
+	) || err "can't build rom images"
+
+	rm -Rf "$relsrcdir" || err "!rm -Rf $relsrcdir"
+}
diff --git a/mk b/mk
index aa89710a..324e56cc 100755
--- a/mk
+++ b/mk
@@ -18,8 +18,7 @@ fi
 . "include/inject.sh"
 . "include/mrc.sh"
 . "include/rom.sh"
-
-eval "`setvars "" vdir src_dirname srcdir mode`"
+. "include/release.sh"
 
 main()
 {
@@ -34,67 +33,6 @@ main()
 	set -u -e # some commands disable them. turn them on!
 }
 
-release()
-{
-	export XBMK_RELEASE="y"
-
-	vdir="release"
-	while getopts d:m: option; do
-		[ -z "$OPTARG" ] && err "empty argument not allowed"
-		case "$option" in
-		d) vdir="$OPTARG" ;;
-		m) mode="$OPTARG" ;;
-		*) err "invalid option '-$option'" ;;
-		esac
-	done
-
-	vdir="$vdir/$version"
-	src_dirname="${relname}_src"
-	srcdir="$vdir/$src_dirname"
-
-	[ -e "$vdir" ] && err "already exists: \"$vdir\""
-	mkdir -p "$vdir" || err "mkvdir: !mkdir -p \"$vdir\""
-	git clone . "$srcdir" || err "mkdir: !gitclone \"$srcdir\""
-	touch "$srcdir/lock" || err "can't make lock file in $srcdir/"
-
-	build_release
-
-	printf "\n\nDONE! Check release files under %s\n" "$vdir"
-}
-
-build_release()
-{
-	(
-	cd "$srcdir" || err "$vdir: !cd \"$srcdir\""
-
-	x_ ./mk -f
-	rmgit .
-	x_ mv src/docs docs
-	) || err "can't create release files"
-
-	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
-	    --abbrev-commit > "$srcdir/CHANGELOG" || err "!gitlog $srcdir"
-	rm -f "$srcdir/lock" || err "can't remove lock file in $srcdir"
-
-	(
-	cd "${srcdir%/*}" || err "$vdir: mktarball \"$srcdir\""
-	mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || err "$vdir: mksrc"
-	) || err "can't create src tarball"
-	[ "$mode" = "src" ] && return 0
-
-	touch "$srcdir/lock" || err "can't make lock file in $srcdir/"
-	(
-	cd "$srcdir" || err "$vdir: 2 !cd \"$srcdir\""
-	x_ ./mk -d coreboot
-	mk -b coreboot pico-serprog stm32-vserprog pcsx-redux
-
-	fx_ mkrom_tarball x_ find bin -maxdepth 1 -type d -name "serprog_*"
-	x_ mv bin ../roms
-	) || err "can't build rom images"
-
-	rm -Rf "$srcdir" || err "!rm -Rf $srcdir"
-}
-
 main "$@" && exit 0
 
 # what follows was formerly script/trees, whose main() is now trees()

From 7012c00ed1102160dd612b79fd9c5c913119b6c4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 8 May 2025 23:33:49 +0100
Subject: [PATCH 1401/1549] mk: re-split tree logic to include/tree.sh

I really think mk should just be a small stub.

Better to keep everything separate.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/tree.sh | 344 ++++++++++++++++++++++++++++++++++++++++++++++++
 mk              | 343 +----------------------------------------------
 2 files changed, 345 insertions(+), 342 deletions(-)
 create mode 100644 include/tree.sh

diff --git a/include/tree.sh b/include/tree.sh
new file mode 100644
index 00000000..4d0c533d
--- /dev/null
+++ b/include/tree.sh
@@ -0,0 +1,344 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+# Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
+# Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
+# Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org>
+
+eval "`setvars "" xarch srcdir premake gnatdir xlang mode makeargs elfdir cmd \
+    project target target_dir targets xtree _f release bootstrapargs mkhelper \
+    autoconfargs listfile autogenargs btype rev build_depend gccdir cmakedir \
+    defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs gccver gccfull \
+    gnatver gnatfull do_make badhash tree`"
+
+trees()
+{
+	flags="f:b:m:u:c:x:s:l:n:d:"
+
+	while getopts $flags option; do
+		[ -n "$_f" ] && err "only one flag is permitted"
+		_f="$1"
+
+		case "$_f" in
+		-d) dry=":" ;;
+		-b) : ;;
+		-u) mode="oldconfig" ;;
+		-m) mode="menuconfig" ;;
+		-c) mode="distclean" ;;
+		-x) mode="crossgcc-clean" ;;
+		-f)
+			do_make="n"
+			dry=":" ;;
+		-s) mode="savedefconfig" ;;
+		-l) mode="olddefconfig" ;;
+		-n) mode="nconfig" ;;
+		*) err "invalid option '-$option'" ;;
+		esac
+
+		if [ -z "${OPTARG+x}" ]; then
+			shift 1
+			break
+		fi
+
+		project="${OPTARG#src/}"
+		shift 2
+	done
+	[ -z "$_f" ] && err "missing flag ($flags)"
+	if [ -z "$project" ]; then
+		mk $_f $(ls -1 config/git)
+		return 1
+	fi
+
+	[ -f "config/git/$project/pkg.cfg" ] || \
+	    err "config/git/$project/pkg.cfg missing"
+
+	for d in "elf" "config/data" "config" "src"; do
+		eval "${d#*/}dir=\"$d/$project\""
+	done
+	dest_dir="$elfdir"
+
+	listfile="$datadir/build.list"
+	[ -f "$listfile" ] || listfile="" # optional on all projects
+
+	mkhelpercfg="$datadir/mkhelper.cfg"
+	if e "$mkhelpercfg" f missing; then
+		mkhelpercfg="$xbmktmp/mkhelper.cfg"
+		x_ touch "$mkhelpercfg"
+	fi
+
+	targets="$*"
+	cmd="build_targets $targets"
+	singletree "$project" && cmd="build_project"
+
+	remkdir "${tmpgit%/*}"
+}
+
+build_project()
+{
+	configure_project "$configdir" || return 0
+	[ ! -f "$listfile" ] || $dry elfcheck || return 0
+
+	[ "$mode" = "distclean" ] && mode="clean"
+	run_make_command || return 0
+
+	[ -n "$mode" ] || $dry copy_elf; :
+}
+
+build_targets()
+{
+	[ -d "$configdir" ] || err "directory, $configdir, does not exist"
+	[ $# -gt 0 ] || targets="$(ls -1 "$configdir")" || err "!o $configdir"
+
+	for x in $targets; do
+		unset CROSS_COMPILE
+		export PATH="$xbmkpath"
+		[ "$x" = "list" ] && x_ ls -1 "config/$project" && \
+		    listfile="" && break
+
+		target="$x"
+		printf "'make %s', '%s', '%s'\n" "$mode" "$project" "$target"
+		x_ handle_defconfig
+
+		[ -n "$mode" ] || x_ $postmake
+	done; :
+}
+
+handle_defconfig()
+{
+	target_dir="$configdir/$target"
+
+	[ -f "CHANGELOG" ] || fetch_project "$project"
+	configure_project "$target_dir" || return 0
+	x_ mkdir -p "$elfdir/$target"
+
+	chkvars tree
+	srcdir="src/$project/$tree"
+
+	if [ "$mode" = "distclean" ] || [ "$mode" = "crossgcc-clean" ]; then
+		[ -d "$srcdir" ] || return 0
+	fi
+	[ -z "$mode" ] && for _xarch in $xarch; do
+		$dry check_cross_compiler "$_xarch"
+	done; :
+
+	for y in "$target_dir/config"/*; do
+		[ "$_f" = "-d" ] || [ -f "$y" ] || continue
+		[ "$_f" = "-d" ] || defconfig="$y"
+
+		[ -n "$mode" ] || check_defconfig || continue
+		handle_makefile
+		[ -n "$mode" ] || $dry copy_elf
+	done; :
+}
+
+configure_project()
+{
+	eval "`setvars "" cleanargs build_depend autoconfargs xtree postmake \
+	    makeargs btype mkhelper bootstrapargs premake release xlang xarch \
+	    badhash`"
+	_tcfg="$1/target.cfg"
+	[ -f "$_tcfg" ] || btype="auto"
+	e "$datadir/mkhelper.cfg" f && eval "`setcfg "$datadir/mkhelper.cfg"`"
+
+	while e "$_tcfg" f || [ "$cmd" != "build_project" ]; do
+		eval "`setvars "" rev tree`"
+		eval "`setcfg "$_tcfg"`"
+		printf "Loading %s config: %s\n" "$project" "$_tcfg"
+
+		[ "$_f" = "-d" ] && build_depend="" # dry run
+		[ "$cmd" = "build_project" ] && break
+		[ "$do_make" != "n" ] && break
+
+		[ "${_tcfg%/*/target.cfg}" = "${_tcfg%"/$tree/target.cfg"}" ] \
+		    && break
+		_tcfg="${_tcfg%/*/target.cfg}/$tree/target.cfg"
+	done
+	[ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1
+	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
+	[ -z "$mode" ] && $dry build_dependencies
+
+	mdir="$xbmkpwd/config/submodule/$project"
+	[ -n "$tree" ] && mdir="$mdir/$tree"
+	[ -f "CHANGELOG" ] || check_project_hashes
+
+	if [ "$do_make" = "n" ]; then
+		[ -f "CHANGELOG" ] || fetch_${cmd#build_}
+		return 1
+	fi
+	x_ ./mk -f "$project" "$target"
+}
+
+build_dependencies()
+{
+	for bd in $build_depend; do
+		bd_p="${bd%%/*}"
+		bd_t="${bd##*/}"
+		[ -z "$bd_p" ] && $dry err "$project/$tree: !bd '$bd'"
+		[ "${bd##*/}" = "$bd" ] && bd_t=""
+		[ -z "$bd_p" ] || $dry x_ ./mk -b $bd_p $bd_t; :
+	done; :
+}
+
+check_project_hashes()
+{
+	old_pjhash="" && x_ mkdir -p "$XBMK_CACHE/hash"
+	[ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
+	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
+
+	fx_ "x_ sha512sum" find "$datadir" "$configdir/$tree" "$mdir" \
+	    -type f -not -path "*/.git*/*" | awk '{print $1}' > \
+	    "$xbmktmp/project.hash" || err "!h $project $tree"
+
+	pjhash="$(sha512sum "$xbmktmp/project.hash" | awk '{print $1}')" || :
+	[ "$pjhash" != "$old_pjhash" ] && badhash="y"
+	[ -f "$XBMK_CACHE/hash/$project$tree" ] || badhash="y"
+
+	printf "%s\n" "$pjhash" > "$XBMK_CACHE/hash/$project$tree" || \
+	    err "!mk $XBMK_CACHE/hash/$project$tree"
+
+	[ "$badhash" != "y" ] || x_ rm -Rf "src/$project/$tree" \
+	    "elf/$project/$tree" "elf/$project/$target"; :
+}
+
+check_cross_compiler()
+{
+	cbdir="src/coreboot/$tree"
+	[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
+	[ -n "$xtree" ] && cbdir="src/coreboot/$xtree"
+
+	x_ ./mk -f coreboot "${cbdir#src/coreboot/}"
+
+	export PATH="$xbmkpwd/$cbdir/util/crossgcc/xgcc/bin:$PATH"
+	export CROSS_COMPILE="${xarch% *}-"
+	[ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
+
+	# match gnat-X to gcc
+	check_gnu_path gcc gnat || x_ check_gnu_path gnat gcc
+
+	xfix="${1%-*}" && [ "$xfix" = "x86_64" ] && xfix="x64"
+	xgccargs="crossgcc-$xfix UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
+	make -C "$cbdir" $xgccargs || x_ make -C "$cbdir" $xgccargs
+
+	# we only want to mess with hostcc to build xgcc
+	remkdir "$XBMK_CACHE/gnupath"
+}
+
+# fix mismatching gcc/gnat versions on debian trixie/sid. as of december 2024,
+# trixie/sid had gnat-13 as gnat and gcc-14 as gcc, but has gnat-14 in apt. in
+# some cases, gcc 13+14 and gnat-13 are present; or gnat-14 and gcc-14, but
+# gnat in PATH never resolves to gnat-14, because gnat-14 was "experimental"
+check_gnu_path()
+{
+	command -v "$1" 1>/dev/null || err "Host '$1' unavailable"
+
+	eval "`setvars "" gccver gccfull gnatver gnatfull gccdir gnatdir`"
+	x_ gnu_setver "$1" "$1" || err "Command '$1' unavailable."
+	gnu_setver "$2" "$2" || :
+
+	eval "[ -z \"\$$1ver\" ] && err \"Cannot detect host '$1' version\""
+	[ "$gnatfull" = "$gccfull" ] && return 0
+
+	eval "$1dir=\"$(dirname "$(command -v "$1")")\""
+	eval "_gnudir=\"\$$1dir\"; _gnuver=\"\$$1ver\""
+	for _bin in "$_gnudir/$2-"*; do
+		[ "${_bin#"$_gnudir/$2-"}" = "$_gnuver" ] && [ -x "$_bin" ] \
+		    && _gnuver="${_bin#"$_gnudir/$2-"}" && break; :
+	done
+	gnu_setver "$2" "$_gnudir/$2-$_gnuver" || return 1
+	[ "$gnatfull" = "$gccfull" ] || return 1
+
+	(
+	remkdir "$XBMK_CACHE/gnupath" && x_ cd "$XBMK_CACHE/gnupath"
+	for _gnubin in "$_gnudir/$2"*"-$_gnuver"; do
+		_gnuutil="${_gnubin##*/}" && [ -e "$_gnubin" ] && \
+		    x_ ln -s "$_gnubin" "${_gnuutil%"-$_gnuver"}"
+	done
+	) || err "Cannot create $2-$_gnuver link in $_gnudir"; :
+}
+
+gnu_setver()
+{
+	eval "$2 --version 1>/dev/null 2>/dev/null || return 1"
+	eval "$1ver=\"`"$2" --version 2>/dev/null | head -n1`\""
+	eval "$1ver=\"\${$1ver##* }\""
+	eval "$1full=\"\$$1ver\""
+	eval "$1ver=\"\${$1ver%%.*}\""; :
+}
+
+check_defconfig()
+{
+	[ -f "$defconfig" ] || $dry err "$project/$target: missing defconfig"
+	dest_dir="$elfdir/$target/${defconfig#"$target_dir/config/"}"
+
+	$dry elfcheck || return 1 # skip build if a previous one exists
+	$dry x_ mkdir -p "$dest_dir"
+}
+
+elfcheck()
+{
+	# TODO: *STILL* very hacky check. do it properly (based on build.list)
+	( fx_ "exit 1" find "$dest_dir" -type f ) || return 1; :
+}
+
+handle_makefile()
+{
+	$dry check_makefile "$srcdir" && x_ make -C "$srcdir" $cleanargs clean
+
+	[ -f "$defconfig" ] && x_ cp "$defconfig" "$srcdir/.config"
+	[ -n "$mode" ] || [ -n "$btype" ] || $dry make -C \
+	    "$srcdir" silentoldconfig || make -C "$srcdir" oldconfig || :
+
+	run_make_command || err "handle_makefile $srcdir: no makefile!"
+
+	_copy=".config" && [ "$mode" = "savedefconfig" ] && _copy="defconfig"
+	[ "${mode%config}" = "$mode" ] || \
+	    $dry x_ cp "$srcdir/$_copy" "$defconfig"
+
+	[ -e "$srcdir/.git" ] && [ "$project" = "u-boot" ] && \
+	    [ "$mode" = "distclean" ] && \
+		$dry x_ git -C "$srcdir" $cleanargs clean -fdx; :
+}
+
+run_make_command()
+{
+	[ -n "$mode" ] || x_ $premake
+
+	$dry check_cmake "$srcdir" && [ -z "$mode" ] && \
+	    $dry check_autoconf "$srcdir"
+	$dry check_makefile "$srcdir" || return 1
+
+	$dry x_ make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs
+	[ -n "$mode" ] || x_ $mkhelper
+
+	[ "$mode" != "clean" ] || \
+	    $dry make -C "$srcdir" $cleanargs distclean || :; :
+}
+
+check_cmake()
+{
+	[ -z "$cmakedir" ] || $dry check_makefile "$1" || cmake -B "$1" \
+	    "$1/$cmakedir" || $dry x_ check_makefile "$1"
+	[ -z "$cmakedir" ] || $dry x_ check_makefile "$1"; :
+}
+
+check_autoconf()
+{
+	(
+	cd "$1" || err "!cd $1"
+	[ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs
+	[ -f "autogen.sh" ] && x_ ./autogen.sh $autogenargs
+	[ -f "configure" ] && x_ ./configure $autoconfargs; :
+	) || err "can't bootstrap project: $1"; :
+}
+
+check_makefile()
+{
+	[ -f "$1/Makefile" ] || [ -f "$1/makefile" ] || \
+	    [ -f "$1/GNUmakefile" ] || return 1; :
+}
+
+copy_elf()
+{
+	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do
+		[ -f "$srcdir/$f" ] && x_ cp "$srcdir/$f" "$dest_dir"
+	done < "$listfile"
+	x_ make clean -C "$srcdir" $cleanargs
+}
diff --git a/mk b/mk
index 324e56cc..2b1191bb 100755
--- a/mk
+++ b/mk
@@ -2,8 +2,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 # Copyright (c) 2020-2025 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
-# Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
 
 set -u -e
 
@@ -38,346 +36,7 @@ main "$@" && exit 0
 # what follows was formerly script/trees, whose main() is now trees()
 
 . "include/git.sh"
-
-eval "`setvars "" xarch srcdir premake gnatdir xlang mode makeargs elfdir cmd \
-    project target target_dir targets xtree _f release bootstrapargs mkhelper \
-    autoconfargs listfile autogenargs btype rev build_depend gccdir cmakedir \
-    defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs gccver gccfull \
-    gnatver gnatfull do_make badhash tree`"
-
-trees()
-{
-	flags="f:b:m:u:c:x:s:l:n:d:"
-
-	while getopts $flags option; do
-		[ -n "$_f" ] && err "only one flag is permitted"
-		_f="$1"
-
-		case "$_f" in
-		-d) dry=":" ;;
-		-b) : ;;
-		-u) mode="oldconfig" ;;
-		-m) mode="menuconfig" ;;
-		-c) mode="distclean" ;;
-		-x) mode="crossgcc-clean" ;;
-		-f)
-			do_make="n"
-			dry=":" ;;
-		-s) mode="savedefconfig" ;;
-		-l) mode="olddefconfig" ;;
-		-n) mode="nconfig" ;;
-		*) err "invalid option '-$option'" ;;
-		esac
-
-		if [ -z "${OPTARG+x}" ]; then
-			shift 1
-			break
-		fi
-
-		project="${OPTARG#src/}"
-		shift 2
-	done
-	[ -z "$_f" ] && err "missing flag ($flags)"
-	if [ -z "$project" ]; then
-		mk $_f $(ls -1 config/git)
-		return 1
-	fi
-
-	[ -f "config/git/$project/pkg.cfg" ] || \
-	    err "config/git/$project/pkg.cfg missing"
-
-	for d in "elf" "config/data" "config" "src"; do
-		eval "${d#*/}dir=\"$d/$project\""
-	done
-	dest_dir="$elfdir"
-
-	listfile="$datadir/build.list"
-	[ -f "$listfile" ] || listfile="" # optional on all projects
-
-	mkhelpercfg="$datadir/mkhelper.cfg"
-	if e "$mkhelpercfg" f missing; then
-		mkhelpercfg="$xbmktmp/mkhelper.cfg"
-		x_ touch "$mkhelpercfg"
-	fi
-
-	targets="$*"
-	cmd="build_targets $targets"
-	singletree "$project" && cmd="build_project"
-
-	remkdir "${tmpgit%/*}"
-}
-
-build_project()
-{
-	configure_project "$configdir" || return 0
-	[ ! -f "$listfile" ] || $dry elfcheck || return 0
-
-	[ "$mode" = "distclean" ] && mode="clean"
-	run_make_command || return 0
-
-	[ -n "$mode" ] || $dry copy_elf; :
-}
-
-build_targets()
-{
-	[ -d "$configdir" ] || err "directory, $configdir, does not exist"
-	[ $# -gt 0 ] || targets="$(ls -1 "$configdir")" || err "!o $configdir"
-
-	for x in $targets; do
-		unset CROSS_COMPILE
-		export PATH="$xbmkpath"
-		[ "$x" = "list" ] && x_ ls -1 "config/$project" && \
-		    listfile="" && break
-
-		target="$x"
-		printf "'make %s', '%s', '%s'\n" "$mode" "$project" "$target"
-		x_ handle_defconfig
-
-		[ -n "$mode" ] || x_ $postmake
-	done; :
-}
-
-handle_defconfig()
-{
-	target_dir="$configdir/$target"
-
-	[ -f "CHANGELOG" ] || fetch_project "$project"
-	configure_project "$target_dir" || return 0
-	x_ mkdir -p "$elfdir/$target"
-
-	chkvars tree
-	srcdir="src/$project/$tree"
-
-	if [ "$mode" = "distclean" ] || [ "$mode" = "crossgcc-clean" ]; then
-		[ -d "$srcdir" ] || return 0
-	fi
-	[ -z "$mode" ] && for _xarch in $xarch; do
-		$dry check_cross_compiler "$_xarch"
-	done; :
-
-	for y in "$target_dir/config"/*; do
-		[ "$_f" = "-d" ] || [ -f "$y" ] || continue
-		[ "$_f" = "-d" ] || defconfig="$y"
-
-		[ -n "$mode" ] || check_defconfig || continue
-		handle_makefile
-		[ -n "$mode" ] || $dry copy_elf
-	done; :
-}
-
-configure_project()
-{
-	eval "`setvars "" cleanargs build_depend autoconfargs xtree postmake \
-	    makeargs btype mkhelper bootstrapargs premake release xlang xarch \
-	    badhash`"
-	_tcfg="$1/target.cfg"
-	[ -f "$_tcfg" ] || btype="auto"
-	e "$datadir/mkhelper.cfg" f && eval "`setcfg "$datadir/mkhelper.cfg"`"
-
-	while e "$_tcfg" f || [ "$cmd" != "build_project" ]; do
-		eval "`setvars "" rev tree`"
-		eval "`setcfg "$_tcfg"`"
-		printf "Loading %s config: %s\n" "$project" "$_tcfg"
-
-		[ "$_f" = "-d" ] && build_depend="" # dry run
-		[ "$cmd" = "build_project" ] && break
-		[ "$do_make" != "n" ] && break
-
-		[ "${_tcfg%/*/target.cfg}" = "${_tcfg%"/$tree/target.cfg"}" ] \
-		    && break
-		_tcfg="${_tcfg%/*/target.cfg}/$tree/target.cfg"
-	done
-	[ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1
-	[ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
-	[ -z "$mode" ] && $dry build_dependencies
-
-	mdir="$xbmkpwd/config/submodule/$project"
-	[ -n "$tree" ] && mdir="$mdir/$tree"
-	[ -f "CHANGELOG" ] || check_project_hashes
-
-	if [ "$do_make" = "n" ]; then
-		[ -f "CHANGELOG" ] || fetch_${cmd#build_}
-		return 1
-	fi
-	x_ ./mk -f "$project" "$target"
-}
-
-build_dependencies()
-{
-	for bd in $build_depend; do
-		bd_p="${bd%%/*}"
-		bd_t="${bd##*/}"
-		[ -z "$bd_p" ] && $dry err "$project/$tree: !bd '$bd'"
-		[ "${bd##*/}" = "$bd" ] && bd_t=""
-		[ -z "$bd_p" ] || $dry x_ ./mk -b $bd_p $bd_t; :
-	done; :
-}
-
-check_project_hashes()
-{
-	old_pjhash="" && x_ mkdir -p "$XBMK_CACHE/hash"
-	[ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
-	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
-
-	fx_ "x_ sha512sum" find "$datadir" "$configdir/$tree" "$mdir" \
-	    -type f -not -path "*/.git*/*" | awk '{print $1}' > \
-	    "$xbmktmp/project.hash" || err "!h $project $tree"
-
-	pjhash="$(sha512sum "$xbmktmp/project.hash" | awk '{print $1}')" || :
-	[ "$pjhash" != "$old_pjhash" ] && badhash="y"
-	[ -f "$XBMK_CACHE/hash/$project$tree" ] || badhash="y"
-
-	printf "%s\n" "$pjhash" > "$XBMK_CACHE/hash/$project$tree" || \
-	    err "!mk $XBMK_CACHE/hash/$project$tree"
-
-	[ "$badhash" != "y" ] || x_ rm -Rf "src/$project/$tree" \
-	    "elf/$project/$tree" "elf/$project/$target"; :
-}
-
-check_cross_compiler()
-{
-	cbdir="src/coreboot/$tree"
-	[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
-	[ -n "$xtree" ] && cbdir="src/coreboot/$xtree"
-
-	x_ ./mk -f coreboot "${cbdir#src/coreboot/}"
-
-	export PATH="$xbmkpwd/$cbdir/util/crossgcc/xgcc/bin:$PATH"
-	export CROSS_COMPILE="${xarch% *}-"
-	[ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
-
-	# match gnat-X to gcc
-	check_gnu_path gcc gnat || x_ check_gnu_path gnat gcc
-
-	xfix="${1%-*}" && [ "$xfix" = "x86_64" ] && xfix="x64"
-	xgccargs="crossgcc-$xfix UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
-	make -C "$cbdir" $xgccargs || x_ make -C "$cbdir" $xgccargs
-
-	# we only want to mess with hostcc to build xgcc
-	remkdir "$XBMK_CACHE/gnupath"
-}
-
-# fix mismatching gcc/gnat versions on debian trixie/sid. as of december 2024,
-# trixie/sid had gnat-13 as gnat and gcc-14 as gcc, but has gnat-14 in apt. in
-# some cases, gcc 13+14 and gnat-13 are present; or gnat-14 and gcc-14, but
-# gnat in PATH never resolves to gnat-14, because gnat-14 was "experimental"
-check_gnu_path()
-{
-	command -v "$1" 1>/dev/null || err "Host '$1' unavailable"
-
-	eval "`setvars "" gccver gccfull gnatver gnatfull gccdir gnatdir`"
-	x_ gnu_setver "$1" "$1" || err "Command '$1' unavailable."
-	gnu_setver "$2" "$2" || :
-
-	eval "[ -z \"\$$1ver\" ] && err \"Cannot detect host '$1' version\""
-	[ "$gnatfull" = "$gccfull" ] && return 0
-
-	eval "$1dir=\"$(dirname "$(command -v "$1")")\""
-	eval "_gnudir=\"\$$1dir\"; _gnuver=\"\$$1ver\""
-	for _bin in "$_gnudir/$2-"*; do
-		[ "${_bin#"$_gnudir/$2-"}" = "$_gnuver" ] && [ -x "$_bin" ] \
-		    && _gnuver="${_bin#"$_gnudir/$2-"}" && break; :
-	done
-	gnu_setver "$2" "$_gnudir/$2-$_gnuver" || return 1
-	[ "$gnatfull" = "$gccfull" ] || return 1
-
-	(
-	remkdir "$XBMK_CACHE/gnupath" && x_ cd "$XBMK_CACHE/gnupath"
-	for _gnubin in "$_gnudir/$2"*"-$_gnuver"; do
-		_gnuutil="${_gnubin##*/}" && [ -e "$_gnubin" ] && \
-		    x_ ln -s "$_gnubin" "${_gnuutil%"-$_gnuver"}"
-	done
-	) || err "Cannot create $2-$_gnuver link in $_gnudir"; :
-}
-
-gnu_setver()
-{
-	eval "$2 --version 1>/dev/null 2>/dev/null || return 1"
-	eval "$1ver=\"`"$2" --version 2>/dev/null | head -n1`\""
-	eval "$1ver=\"\${$1ver##* }\""
-	eval "$1full=\"\$$1ver\""
-	eval "$1ver=\"\${$1ver%%.*}\""; :
-}
-
-check_defconfig()
-{
-	[ -f "$defconfig" ] || $dry err "$project/$target: missing defconfig"
-	dest_dir="$elfdir/$target/${defconfig#"$target_dir/config/"}"
-
-	$dry elfcheck || return 1 # skip build if a previous one exists
-	$dry x_ mkdir -p "$dest_dir"
-}
-
-elfcheck()
-{
-	# TODO: *STILL* very hacky check. do it properly (based on build.list)
-	( fx_ "exit 1" find "$dest_dir" -type f ) || return 1; :
-}
-
-handle_makefile()
-{
-	$dry check_makefile "$srcdir" && x_ make -C "$srcdir" $cleanargs clean
-
-	[ -f "$defconfig" ] && x_ cp "$defconfig" "$srcdir/.config"
-	[ -n "$mode" ] || [ -n "$btype" ] || $dry make -C \
-	    "$srcdir" silentoldconfig || make -C "$srcdir" oldconfig || :
-
-	run_make_command || err "handle_makefile $srcdir: no makefile!"
-
-	_copy=".config" && [ "$mode" = "savedefconfig" ] && _copy="defconfig"
-	[ "${mode%config}" = "$mode" ] || \
-	    $dry x_ cp "$srcdir/$_copy" "$defconfig"
-
-	[ -e "$srcdir/.git" ] && [ "$project" = "u-boot" ] && \
-	    [ "$mode" = "distclean" ] && \
-		$dry x_ git -C "$srcdir" $cleanargs clean -fdx; :
-}
-
-run_make_command()
-{
-	[ -n "$mode" ] || x_ $premake
-
-	$dry check_cmake "$srcdir" && [ -z "$mode" ] && \
-	    $dry check_autoconf "$srcdir"
-	$dry check_makefile "$srcdir" || return 1
-
-	$dry x_ make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs
-	[ -n "$mode" ] || x_ $mkhelper
-
-	[ "$mode" != "clean" ] || \
-	    $dry make -C "$srcdir" $cleanargs distclean || :; :
-}
-
-check_cmake()
-{
-	[ -z "$cmakedir" ] || $dry check_makefile "$1" || cmake -B "$1" \
-	    "$1/$cmakedir" || $dry x_ check_makefile "$1"
-	[ -z "$cmakedir" ] || $dry x_ check_makefile "$1"; :
-}
-
-check_autoconf()
-{
-	(
-	cd "$1" || err "!cd $1"
-	[ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs
-	[ -f "autogen.sh" ] && x_ ./autogen.sh $autogenargs
-	[ -f "configure" ] && x_ ./configure $autoconfargs; :
-	) || err "can't bootstrap project: $1"; :
-}
-
-check_makefile()
-{
-	[ -f "$1/Makefile" ] || [ -f "$1/makefile" ] || \
-	    [ -f "$1/GNUmakefile" ] || return 1; :
-}
-
-copy_elf()
-{
-	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do
-		[ -f "$srcdir/$f" ] && x_ cp "$srcdir/$f" "$dest_dir"
-	done < "$listfile"
-	x_ make clean -C "$srcdir" $cleanargs
-}
+. "include/tree.sh"
 
 trees "$@" || exit 0
 . "$mkhelpercfg"

From 066402b7e7a3c0a6fbe1f5f1e362c3c7bfb9d25f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 8 May 2025 23:35:40 +0100
Subject: [PATCH 1402/1549] mk: remove unnecessary line break

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 1 -
 1 file changed, 1 deletion(-)

diff --git a/mk b/mk
index 2b1191bb..0bd18bee 100755
--- a/mk
+++ b/mk
@@ -11,7 +11,6 @@ if [ "./${0##*/}" != "${0}" ] || [ ! -f "mk" ] || [ -L "mk" ]; then
 fi
 
 . "include/lib.sh"
-
 . "include/init.sh"
 . "include/inject.sh"
 . "include/mrc.sh"

From c2b627dc6d0e6fe10d899fdf301fee6b806ecd50 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 8 May 2025 23:36:44 +0100
Subject: [PATCH 1403/1549] remove useless comment

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 2 --
 1 file changed, 2 deletions(-)

diff --git a/mk b/mk
index 0bd18bee..1a7b896f 100755
--- a/mk
+++ b/mk
@@ -32,8 +32,6 @@ main()
 
 main "$@" && exit 0
 
-# what follows was formerly script/trees, whose main() is now trees()
-
 . "include/git.sh"
 . "include/tree.sh"
 

From ff33ec3352babab4c827121099192f014a960c43 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 8 May 2025 23:41:24 +0100
Subject: [PATCH 1404/1549] mk: use zero exit instead, to run trees

that way, with set -u -e, we aren't risking some
buggy sh implementations from causing an error exit
where it shouldn't.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/mk b/mk
index 1a7b896f..af29f1e2 100755
--- a/mk
+++ b/mk
@@ -24,13 +24,14 @@ main()
 	case "$cmd" in
 	version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
 	release|download|inject) $cmd "$@" ;;
-	-*) return 1 ;;
+	-*) return 0 ;;
 	*) err "bad command" ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
+	return 1
 }
 
-main "$@" && exit 0
+main "$@" || exit 0
 
 . "include/git.sh"
 . "include/tree.sh"

From 91220ce1833e4980097cff9674e2481cb2b24e07 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 9 May 2025 00:20:33 +0100
Subject: [PATCH 1405/1549] inject.sh: use subshell to speed up find_me()

the current test allows a further extraction after
running mecleaner, even if me.bin was found.

further, any recursive calls that exit non-ze
don't lot the loop acthually stop, unless we
subshell that too, otherwise fx_ is returned to
return 0 when a given command it runs returns 1,
or more specifically: the for loop in x_ breaks.

this is by design, and there's not much that can
be done, but this patch should pseed up extraction
a little bit, when dealing with intel me files.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index c0b4409f..135df0c2 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -147,7 +147,9 @@ extract_intel_me()
 	    chkvars ME11delta ME11version ME11sku ME11pch
 	[ "$ME11bootguard" = "y" ] && x_ ./mk -f deguard
 
-	set +u +e && fx_ find_me x_ find "$xbmkpwd/$appdir" -type f
+	set +u +e
+	x_ rm -Rf "$xbmkpwd/metmp"
+	( fx_ find_me x_ find "$xbmkpwd/$appdir" -type f ) || :
 	[ "$ME11bootguard" != "y" ] && x_ mv "$_metmp" "$_me" && return 0
 
 	(
@@ -160,7 +162,7 @@ extract_intel_me()
 
 find_me()
 {
-	e "$_metmp" f && x_ rm -Rf "$xbmklocal/metmp" && return 1
+	e "$_metmp" f && exit 1
 	[ -L "$1" ] && return 0
 
 	_7ztest="${_7ztest}a" && _r="-r" && [ -n "$mfs" ] && _r=""
@@ -169,7 +171,8 @@ find_me()
 	    "$mecleaner" $mfs $_r -t -O "$_metmp" "$1" || "$me7updateparser" \
 	    -O "$_metmp" "$1" || extract_archive "$1" "$_7ztest" || return 0
 
-	fx_ find_me x_ find "$_7ztest" -type f || return 1; :
+	e "$_metmp" f && exit 1
+	( fx_ find_me x_ find "$_7ztest" -type f ) || exit 1; :
 }
 
 extract_archive()

From 23486abef3abafbe36b34ebac880f993804356f3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 9 May 2025 00:26:33 +0100
Subject: [PATCH 1406/1549] inject.sh: use direct comparison for metmp

use of the e function would slow down execution,
and it's mostly unnecessary in this case.

the e function is only needed if we want to confirm
via user message that a file exists. that is not
needed here.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 135df0c2..8485d7e8 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -162,7 +162,7 @@ extract_intel_me()
 
 find_me()
 {
-	e "$_metmp" f && exit 1
+	[ -f "$_metmp" ] && exit 1
 	[ -L "$1" ] && return 0
 
 	_7ztest="${_7ztest}a" && _r="-r" && [ -n "$mfs" ] && _r=""
@@ -171,7 +171,7 @@ find_me()
 	    "$mecleaner" $mfs $_r -t -O "$_metmp" "$1" || "$me7updateparser" \
 	    -O "$_metmp" "$1" || extract_archive "$1" "$_7ztest" || return 0
 
-	e "$_metmp" f && exit 1
+	[ -f "$_metmp" ] && exit 1
 	( fx_ find_me x_ find "$_7ztest" -type f ) || exit 1; :
 }
 

From 6e521c2e1ea975133894ce7fc27702feed080547 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 9 May 2025 20:21:58 +0100
Subject: [PATCH 1407/1549] mrc.sh: fix outdated info in the comment

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/mrc.sh | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/mrc.sh b/include/mrc.sh
index a1dcb140..00fb8626 100644
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -23,9 +23,9 @@ extract_refcode()
 
 	[ $# -lt 1 ] && extract_shellball
 
-	# cbfstool changed the attributes scheme for stage files,
-	# incompatible with older versions before coreboot 4.14,
-	# so we need coreboot 4.13 cbfstool for certain refcode files
+	# cbfstool after coreboot 4.13 changed the stage file attribute scheme,
+	# and refcode is extracted from an image using the old scheme. we use
+	# cbfstool from coreboot 4.11_branch, the tree used by ASUS KGPE-D16
 	chkvars cbfstoolref
 	mkdir -p "${_refdest%/*}" || err "ref: !mkdir -p ${_refdest%/*}"
 

From 14d46abceda7a7ad6081b6ab321fb0efb4bc3325 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 9 May 2025 20:31:00 +0100
Subject: [PATCH 1408/1549] mrc.sh: operate on refcode in tmp area first

that way, the Intel GbE device can be enabled there,
and only then would the refcode file be copied.

otherwise, the current behaviour would leave buggy
refcode in place, if the dd command failed.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/mrc.sh | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/include/mrc.sh b/include/mrc.sh
index 00fb8626..edd35414 100644
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -30,11 +30,13 @@ extract_refcode()
 	mkdir -p "${_refdest%/*}" || err "ref: !mkdir -p ${_refdest%/*}"
 
 	x_ "$cbfstoolref" "$appdir/bios.bin" extract \
-	    -m x86 -n fallback/refcode -f "$_refdest" -r RO_SECTION
+	    -m x86 -n fallback/refcode -f "$appdir/ref" -r RO_SECTION
 
 	# enable the Intel GbE device, if told by offset MRC_refcode_gbe
 	[ -z "$MRC_refcode_gbe" ] || x_ dd if="config/ifd/hp820g2/1.bin" \
-	    of="$_refdest" bs=1 seek=$MRC_refcode_gbe count=1 conv=notrunc; :
+	    of="$appdir/ref" bs=1 seek=$MRC_refcode_gbe count=1 conv=notrunc; :
+
+	x_ mv "$appdir/ref" "$_refdest"
 }
 
 extract_shellball()

From 81dbde7e09f06c7f227fd0d78498df6e1c269f84 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 9 May 2025 20:54:23 +0100
Subject: [PATCH 1409/1549] lbmk: use x_ instead of err, where appropriate

many places in lbmk used err, because older versions
of x_ did not handle globbing properly.

however, use of x_ is preferable on trivial commands.

the only time err() should be called is what it has
to be, when x_ can't work, or when a more useful error
message is needed, for context.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh     |  6 +++---
 include/init.sh    |  4 ++--
 include/inject.sh  | 27 +++++++++++++--------------
 include/lib.sh     |  2 +-
 include/mrc.sh     | 10 +++++-----
 include/release.sh | 18 +++++++++---------
 include/tree.sh    |  2 +-
 7 files changed, 34 insertions(+), 35 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 9440b1af..bbc5140e 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -61,7 +61,7 @@ git_prep()
 	    [ "$XBMK_RELEASE" = "y" ] && rmgit "$tmpgit"
 
 	[ "$_loc" = "${_loc%/*}" ] || x_ mkdir -p "${_loc%/*}"
-	mv "$tmpgit" "$_loc" || err "git_prep: !mv $tmpgit $_loc"
+	x_ mv "$tmpgit" "$_loc"
 }
 
 fetch_submodule()
@@ -82,7 +82,7 @@ fetch_submodule()
 
 	[ "$st" = "file" ] && xbmkget "$subfile" "$subfile_bkup" \
 	    "$tmpgit/$1" "$subhash" && return 0
-	rm -Rf "$tmpgit/$1" || err "!rm '$mdir' '$1'"
+	x_ rm -Rf "$tmpgit/$1"
 	tmpclone "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subhash" \
 	    "$mdir/${1##*/}/patches"
 }
@@ -101,6 +101,6 @@ nuke()
 {
 	e "config/${1%/}/nuke.list" f missing || while read -r nukefile; do
 		rmf="src/${2%/}/$nukefile" && [ -L "$rmf" ] && continue
-		e "$rmf" e missing || rm -Rf "$rmf" || err "!rm $rmf, ${2%/}"
+		e "$rmf" e missing || x_ rm -Rf "$rmf"
 	done < "config/${1%/}/nuke.list"; :
 }
diff --git a/include/init.sh b/include/init.sh
index b9cb81b1..2eea04c0 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -45,7 +45,7 @@ xbmkpkg()
 	eval "`setcfg "config/dependencies/$2"`"
 
 	chkvars pkg_add pkglist
-	$pkg_add $pkglist || err "Cannot install packages"
+	x_ $pkg_add $pkglist
 
 	[ -n "$aur_notice" ] && \
 	    printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; :
@@ -200,7 +200,7 @@ xbmk_create_pathdirs()
 	(
 	# set up python v3.x in PATH, in case it's not set up correctly.
 	# see code above that detected the correct python3 command.
-	cd "$XBMK_CACHE/xbmkpath" || err "can't cd $XBMK_CACHE/xbmkpath"
+	x_ cd "$XBMK_CACHE/xbmkpath"
 	x_ ln -s "`pybin "$python"`" python
 	) || err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"; :
 }
diff --git a/include/inject.sh b/include/inject.sh
index 8485d7e8..476b7eb0 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -121,7 +121,7 @@ fetch()
 	dlop="curl" && [ $# -gt 5 ] && dlop="$6"
 	xbmkget "$dl" "$dl_bkup" "$_dl" "$dlsum" "$dlop"
 
-	rm -Rf "${_dl}_extracted" || err "!rm ${_ul}_extracted. $dontflash"
+	x_ rm -Rf "${_dl}_extracted"
 	e "$_dest" f && return 0
 
 	x_ mkdir -p "${_dest%/*}"
@@ -219,7 +219,7 @@ extract_sch5545ec()
 	_sch5545ec_fw="$_sch5545ec_fw/54 D386BEB8-4B54-4E69-94F5-06091F67E0D3"
 	_sch5545ec_fw="$_sch5545ec_fw/0 Raw section/body.bin" # <-- this!
 
-	"$uefiextract" "$_bios" || err "sch5545 !extract - $dontflash"
+	x_ "$uefiextract" "$_bios"
 	x_ cp "$_sch5545ec_fw" "$_dest"
 }
 
@@ -345,7 +345,7 @@ patch_release_roms()
 	    fx_ prep x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 
 	(
-	cd "$tmpromdir" || err "patch '$archive': can't cd $tmpromdir"
+	x_ cd "$tmpromdir"
 	# NOTE: For compatibility with older rom releases, defer to sha1
 	if [ "$has_hashes" = "y" ] && [ "$nukemode" != "nuke" ]; then
 		sha512sum --status -c "$hashfile" || \
@@ -385,7 +385,7 @@ prep()
 		[ $xromsize -lt 524288 ] && err "too small, $xromsize: $_xrom"
 
 		x_ dd if="$_xrom" of="$_xromnew" bs=$xromsize count=1
-		rm -f "$_xrom" || err "Can't rm $_xrom - $dontflash"
+		x_ rm -f "$_xrom"
 
 		_xrom="$_xromnew"
 	fi
@@ -455,21 +455,20 @@ insert()
 	[ "$nukemode" = "nuke" ] || x_ e "$_dest" f
 
 	if [ "$cbfsname" = "IFD" ]; then
-		[ "$nukemode" = "nuke" ] || "$ifdtool" $ifdprefix -i \
-		    $_t:$_dest "$rom" -O "$rom" || \
-		    err "failed: insert '$_t' '$_dest' on '$rom'"
-		[ "$nukemode" != "nuke" ] || "$ifdtool" $ifdprefix --nuke $_t \
-		    "$rom" -O "$rom" || err "$rom: !nuke IFD/$_t"
+		[ "$nukemode" = "nuke" ] || x_ "$ifdtool" $ifdprefix -i \
+		    $_t:$_dest "$rom" -O "$rom"
+		[ "$nukemode" != "nuke" ] || x_ "$ifdtool" $ifdprefix --nuke \
+		    $_t "$rom" -O "$rom"
 	elif [ "$nukemode" = "nuke" ]; then
 		x_ "$cbfstool" "$rom" remove -n "$cbfsname"
 	elif [ "$_t" = "stage" ]; then # the only stage we handle is refcode
 		x_ rm -f "$xbmklocal/refcode"
-		"$rmodtool" -i "$_dest" -o "$xbmklocal/refcode" || "!reloc ref"
-		"$cbfstool" "$rom" add-stage -f "$xbmklocal/refcode" \
-		    -n "$cbfsname" -t stage || err "$rom: !add ref"
+		x_ "$rmodtool" -i "$_dest" -o "$xbmklocal/refcode"
+		x_ "$cbfstool" "$rom" add-stage -f "$xbmklocal/refcode" \
+		    -n "$cbfsname" -t stage
 	else
-		"$cbfstool" "$rom" add -f "$_dest" -n "$cbfsname" \
-		    -t $_t $_offset || err "$rom !add $_t ($_dest)"
+		x_ "$cbfstool" "$rom" add -f "$_dest" -n "$cbfsname" \
+		    -t $_t $_offset
 	fi
 	xchanged="y"; :
 }
diff --git a/include/lib.sh b/include/lib.sh
index 99e59a1a..2f87e8b1 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -58,7 +58,7 @@ xbmkget()
 	for url in "$1" "$2"; do
 		[ "$dl_fail" = "n" ] && break
 		[ -z "$url" ] && continue
-		rm -f "$cached" || err "!rm -f '$cached'"
+		x_ rm -f "$cached"
 		if [ "$_dlop" = "curl" ]; then
 			curl --location --retry 3 -A "$_ua" "$url" \
 			    -o "$cached" || wget --tries 3 -U "$_ua" "$url" \
diff --git a/include/mrc.sh b/include/mrc.sh
index edd35414..3b3089fc 100644
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -10,8 +10,8 @@ extract_mrc()
 {
 	extract_shellball
 
-	"$cbfstool" "$appdir/"bios.bin extract -n mrc.bin \
-	    -f "$_dest" -r RO_SECTION || err "extract_mrc: !$cbfstool $_dest"
+	x_ "$cbfstool" "$appdir/"bios.bin extract -n mrc.bin \
+	    -f "$_dest" -r RO_SECTION
 
 	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && extract_refcode extra; :
 }
@@ -27,7 +27,7 @@ extract_refcode()
 	# and refcode is extracted from an image using the old scheme. we use
 	# cbfstool from coreboot 4.11_branch, the tree used by ASUS KGPE-D16
 	chkvars cbfstoolref
-	mkdir -p "${_refdest%/*}" || err "ref: !mkdir -p ${_refdest%/*}"
+	x_ mkdir -p "${_refdest%/*}"
 
 	x_ "$cbfstoolref" "$appdir/bios.bin" extract \
 	    -m x86 -n fallback/refcode -f "$appdir/ref" -r RO_SECTION
@@ -60,8 +60,8 @@ extract_partition()
 	START=$(( $( echo $ROOTP | cut -f2 -d\ | tr -d "B" ) ))
 	SIZE=$(( $( echo $ROOTP | cut -f4 -d\ | tr -d "B" ) ))
 
-	dd if="${1%.zip}" of="root-a.ext2" bs=1024 skip=$(( $START / 1024 )) \
-	    count=$(( $SIZE / 1024 )) || err "ex dd ${1%.zip}, root-a.ext2"
+	x_ dd if="${1%.zip}" of="root-a.ext2" bs=1024 skip=$(( $START / 1024 )) \
+	    count=$(( $SIZE / 1024 ))
 
 	printf "cd /usr/sbin\ndump chromeos-firmwareupdate %s\nquit" \
 	    "$SHELLBALL" | debugfs "root-a.ext2" || err "!extract shellball"
diff --git a/include/release.sh b/include/release.sh
index 2f9f2b86..4741b44a 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -22,9 +22,9 @@ release()
 	relsrcdir="$vdir/$src_dirname"
 
 	[ -e "$vdir" ] && err "already exists: \"$vdir\""
-	mkdir -p "$vdir" || err "mkvdir: !mkdir -p \"$vdir\""
-	git clone . "$relsrcdir" || err "mkdir: !gitclone \"$relsrcdir\""
-	touch "$relsrcdir/lock" || err "can't make lock file in $relsrcdir/"
+	x_ mkdir -p "$vdir"
+	x_ git clone . "$relsrcdir"
+	x_ touch "$relsrcdir/lock"
 
 	build_release
 
@@ -34,7 +34,7 @@ release()
 build_release()
 {
 	(
-	cd "$relsrcdir" || err "$vdir: !cd \"$relsrcdir\""
+	x_ cd "$relsrcdir"
 
 	x_ ./mk -f
 	rmgit .
@@ -43,17 +43,17 @@ build_release()
 
 	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
 	    --abbrev-commit > "$relsrcdir/CHANGELOG" || err "!log $relsrcdir"
-	rm -f "$relsrcdir/lock" || err "can't remove lock file in $relsrcdir"
+	x_ rm -f "$relsrcdir/lock"
 
 	(
-	cd "${relsrcdir%/*}" || err "$vdir: mktarball \"$relsrcdir\""
+	x_ cd "${relsrcdir%/*}"
 	x_ mktarball "${relsrcdir##*/}" "${relsrcdir##*/}.tar.xz"
 	) || err "can't create src tarball"
 	[ "$relmode" = "src" ] && return 0
 
-	touch "$relsrcdir/lock" || err "can't make lock file in $relsrcdir/"
+	x_ touch "$relsrcdir/lock"
 	(
-	cd "$relsrcdir" || err "$vdir: 2 !cd \"$relsrcdir\""
+	x_ cd "$relsrcdir"
 	x_ ./mk -d coreboot
 	mk -b coreboot pico-serprog stm32-vserprog pcsx-redux
 
@@ -61,5 +61,5 @@ build_release()
 	x_ mv bin ../roms
 	) || err "can't build rom images"
 
-	rm -Rf "$relsrcdir" || err "!rm -Rf $relsrcdir"
+	x_ rm -Rf "$relsrcdir"
 }
diff --git a/include/tree.sh b/include/tree.sh
index 4d0c533d..47f65d10 100644
--- a/include/tree.sh
+++ b/include/tree.sh
@@ -322,7 +322,7 @@ check_cmake()
 check_autoconf()
 {
 	(
-	cd "$1" || err "!cd $1"
+	x_ cd "$1"
 	[ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs
 	[ -f "autogen.sh" ] && x_ ./autogen.sh $autogenargs
 	[ -f "configure" ] && x_ ./configure $autoconfargs; :

From 3554b5aad9c0076c3180715b9830eb6069b03b7c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 10 May 2025 10:24:16 +0100
Subject: [PATCH 1410/1549] inject.sh: split up the inject functions

generally go for a more linear function order, and
split up any functions.

the objective is to have functions only suitable to
libreboot be separate. more splitting will be done,
and eventually the vendor-download functions will be
split into a new file, as will several other functions.

this is being done as part of an effort to bring the
libreboot and canoeboot versions of inject.sh in sync,
so that from now on, cherry picking between the two
projects will produce fewer merge conflicts and require
a lesser amount of post-merge maintenance.

some other minor cleanup has also been done; for example,
the "need_files" variable is redundant and was removed.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 159 +++++++++++++++++++++++-----------------------
 1 file changed, 80 insertions(+), 79 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 476b7eb0..7ec4e42b 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -34,38 +34,14 @@ eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl SCH5545EC_DL_url \
     archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref FSPFD_hash \
     _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch tmpromdir \
-    IFD_platform ifdprefix _me _metmp mfs TBFW_url_bkup TBFW_url \
-    TBFW_hash TBFW_size hashfile xromsize xchanged EC_url_bkup need_files \
-    vfile cbcfg $cv`"
+    IFD_platform ifdprefix _me _metmp mfs TBFW_url_bkup TBFW_url TBFW_hash \
+    TBFW_size hashfile xromsize xchanged EC_url_bkup vfile cbcfg $cv`"
 
 download()
 {
 	[ $# -gt 0 ] || err "No argument given"
 	export PATH="$PATH:/sbin"
-	board="$1" && readcfg && readkconfig && bootstrap && getfiles; :
-}
-
-readkconfig()
-{
-	x_ rm -f "$xbmktmp/cbcfg"
-	fx_ scankconfig x_ find "$boarddir/config" -type f
-
-	eval "`setcfg "$xbmktmp/cbcfg" 1`"
-
-	for c in $cvchk; do
-		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
-		eval "[ -z \"\${$c}\" ] && continue"
-		eval "`setcfg "$vfile"`"
-		return 0
-	done
-	return 1
-}
-
-scankconfig()
-{
-	for cbc in $cv; do
-		grep "$cbc" "$1" 1>>"$xbmktmp/cbcfg" 2>/dev/null || :
-	done
+	board="$1" && readvcfg && readkconfig && bootstrap && getfiles; :
 }
 
 bootstrap()
@@ -244,7 +220,6 @@ extract_fsp()
 
 inject()
 {
-	need_files="n"
 	remkdir "$tmpromdel"
 
 	set +u +e
@@ -261,47 +236,46 @@ inject()
 	setmac)
 		[ $# -gt 2 ] && new_mac="$3" && \
 		    [ -z "$new_mac" ] && err "Empty MAC address specified" ;;
-	*) err "Unrecognised inject mode: '$2'"
+	*)
+		err "Unrecognised inject mode: '$2'"
 	esac
 	[ "$new_mac" = "keep" ] && new_mac=""
 
 	[ -n "$new_mac" ] && [ "$new_mac" != "restore" ] && \
 		x_ make -C util/nvmutil clean && x_ make -C util/nvmutil
 
-	check_release "$archive" || err "'$archive' is not a release archive"
+	check_release
+	readvcfg && patch_release
 
-	readcfg && need_files="y"
-	if [ "$need_files" = "y" ] || [ -n "$new_mac" ]; then
-		[ "$nukemode" != "nuke" ] && [ "$need_files" = "y" ] && \
-		    x_ ./mk download "$board"
-		patch_release_roms
-	fi
+	[ "$xchanged" = "y" ] && remktar
 
-	xtype="patched" && [ "$nukemode" = "nuke" ] && xtype="nuked"
-	[ "$xchanged" != "y" ] && printf "\n'%s' *NOT* modified.\n" "$archive"
-	[ "$xchanged" = "y" ] && printf "\n'%s' %s.\n" "$archive" "$xtype"; :
+	xnot=" NOT" && [ "$xchanged" = "y" ] && xnot=""
+	printf "\n'%s' was%s modified\n" "$archive" "$xnot" 1>&2
+
+	x_ rm -Rf "$tmpromdel"
 }
 
 check_release()
 {
 	[ -L "$archive" ] && err "'$archive' is a symlink. $dontflash"
-	e "$archive" f missing && return 1
+	e "$archive" f missing && err "'$archive' missing"
 
-	archivename="`basename "$archive"`"
+	archivename="`basename "$archive"`" || err "Can't get '$archive' name"
 	[ -z "$archivename" ] && err "Can't determine archive name. $dontflash"
 
 	case "$archivename" in
 	*_src.tar.xz)
 		err "'$archive' is a src archive, silly!" ;;
 	grub_*|seagrub_*|custom_*|seauboot_*|seabios_withgrub_*)
-		return 1 ;;
+		err "'$archive' is a ROM image (it must be a tarball)" ;;
 	*.tar.xz) _stripped_prefix="${archivename#*_}"
 		board="${_stripped_prefix%.tar.xz}" ;;
-	*) err "'$archive': could not detect board type - $dontflash"
+	*)
+		err "'$archive': could not detect board type - $dontflash"
 	esac; :
 }
 
-readcfg()
+readvcfg()
 {
 	if [ "$board" = "serprog_rp2040" ] || [ "$board" = "serprog_stm32" ] \
 	    || [ "$board" = "serprog_pico" ]; then
@@ -328,8 +302,10 @@ readcfg()
 	[ -n "$IFD_platform" ] && ifdprefix="-p $IFD_platform"; :
 }
 
-patch_release_roms()
+patch_release()
 {
+	[ "$nukemode" = "nuke" ] || x_ ./mk download "$board"
+
 	has_hashes="n"
 	tmpromdir="$xbmklocal/DO_NOT_FLASH/bin/$board"
 
@@ -337,35 +313,41 @@ patch_release_roms()
 	x_ tar -xf "$archive" -C "${tmpromdir%"/bin/$board"}"
 
 	for _hashes in $hashfiles; do
-		[ "$need_files" = "y" ] && e "$tmpromdir/$_hashes" f && \
+		e "$tmpromdir/$_hashes" f && \
 		    has_hashes="y" && hashfile="$_hashes" && break; :
 	done
 
-	readkconfig || exit 0; [ "$need_files" = "n" ] || \
-	    fx_ prep x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
+	readkconfig || exit 0
+	fx_ prep x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 
-	(
-	x_ cd "$tmpromdir"
-	# NOTE: For compatibility with older rom releases, defer to sha1
-	if [ "$has_hashes" = "y" ] && [ "$nukemode" != "nuke" ]; then
-		sha512sum --status -c "$hashfile" || \
-		    x_ sha1sum --status -c "$hashfile"
-		x_ rm -f "$hashfile"
-	fi
-	) || err "'$archive' -> Can't verify vendor hashes. $dontflash"
+	( check_vendor_hashes ) || err "Can't verify hashes for '$archive'"; :
 
-	[ -z "$new_mac" ] || [ -z "$CONFIG_GBE_BIN_PATH" ] || modify_mac
+	[ -n "$new_mac" ] && [ -n "$CONFIG_GBE_BIN_PATH" ] && modify_mac; :
+}
 
-	[ "$xchanged" = "y" ] || rm -Rf "$tmpromdel" || :
-	[ "$xchanged" = "y" ] || return 0
+readkconfig()
+{
+	x_ rm -f "$xbmktmp/cbcfg"
+	fx_ scankconfig x_ find "$boarddir/config" -type f
+	eval "`setcfg "$xbmktmp/cbcfg" 1`"
+	setvfile_kconfig && return 1; :
+}
 
-	(
-	x_ cd "${tmpromdir%"/bin/$board"}"
-	mkrom_tarball "bin/$board"
-	) || err "Cannot re-generate '$archive' - $dontflash"
+setvfile_kconfig()
+{
+	for c in $cvchk; do
+		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
+		eval "[ -z \"\${$c}\" ] && continue"
+		eval "`setcfg "$vfile"`"
+		return 1
+	done
+}
 
-	mv "${tmpromdir%"/bin/$board"}/bin/${relname}_${board}.tar.xz" \
-	    "$archive" || err "'$archive' -> Can't overwrite - $dontflash"; :
+scankconfig()
+{
+	for cbc in $cv; do
+		grep "$cbc" "$1" 1>>"$xbmktmp/cbcfg" 2>/dev/null || :
+	done
 }
 
 prep()
@@ -392,7 +374,7 @@ prep()
 
 	[ "$nukemode" = "nuke" ] && mksha512sum "$_xrom" "vendorhashes"
 
-	patch_rom "$_xrom" || return 1 # if break return, can still change MAC
+	add_vfiles "$_xrom" || return 1 # if break return, can still change MAC
 	[ "$nukemode" != "nuke" ] && return 0
 
 	# Rename the file, prefixing a warning saying not to flash
@@ -400,7 +382,7 @@ prep()
 	x_ rm -f "$_xrom"
 }
 
-patch_rom()
+add_vfiles()
 {
 	rom="$1"
 
@@ -412,31 +394,31 @@ patch_rom()
 		return 1
 	fi
 
-	[ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && insert "fallback/refcode" \
+	[ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && vfile "fallback/refcode" \
 	    "$CONFIG_REFCODE_BLOB_FILE" "stage"
-	[ "$CONFIG_HAVE_MRC" = "y" ] && insert "mrc.bin" "$CONFIG_MRC_FILE" \
+	[ "$CONFIG_HAVE_MRC" = "y" ] && vfile "mrc.bin" "$CONFIG_MRC_FILE" \
 	    "mrc" "0xfffa0000"
-	[ "$CONFIG_HAVE_ME_BIN" = "y" ] && insert IFD "$CONFIG_ME_BIN_PATH" me
-	[ "$CONFIG_KBC1126_FIRMWARE" = "y" ] && insert ecfw1.bin \
-	    "$CONFIG_KBC1126_FW1" raw "$CONFIG_KBC1126_FW1_OFFSET" && insert \
+	[ "$CONFIG_HAVE_ME_BIN" = "y" ] && vfile IFD "$CONFIG_ME_BIN_PATH" me
+	[ "$CONFIG_KBC1126_FIRMWARE" = "y" ] && vfile ecfw1.bin \
+	    "$CONFIG_KBC1126_FW1" raw "$CONFIG_KBC1126_FW1_OFFSET" && vfile \
 	    ecfw2.bin "$CONFIG_KBC1126_FW2" raw "$CONFIG_KBC1126_FW2_OFFSET"
 	[ -n "$CONFIG_VGA_BIOS_FILE" ] && [ -n "$CONFIG_VGA_BIOS_ID" ] && \
-	  insert "pci$CONFIG_VGA_BIOS_ID.rom" "$CONFIG_VGA_BIOS_FILE" optionrom
+	  vfile "pci$CONFIG_VGA_BIOS_ID.rom" "$CONFIG_VGA_BIOS_FILE" optionrom
 	[ "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" = "y" ] && \
 	    [ -n "$CONFIG_SMSC_SCH5545_EC_FW_FILE" ] && \
-		insert sch5545_ecfw.bin "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
+		vfile sch5545_ecfw.bin "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
 	[ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \
 	   [ -n "$CONFIG_FSP_M_FILE" ] && \
-		insert "$CONFIG_FSP_M_CBFS" "$CONFIG_FSP_M_FILE" fsp --xip
+		vfile "$CONFIG_FSP_M_CBFS" "$CONFIG_FSP_M_FILE" fsp --xip
 	[ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \
 	   [ -n "$CONFIG_FSP_S_FILE" ] && \
-		insert "$CONFIG_FSP_S_CBFS" "$CONFIG_FSP_S_FILE" fsp
+		vfile "$CONFIG_FSP_S_CBFS" "$CONFIG_FSP_S_FILE" fsp
 
 	printf "ROM image successfully patched: %s\n" "$rom"
 	xchanged="y"
 }
 
-insert()
+vfile()
 {
 	[ "$2" = "/dev/null" ] && return 0
 
@@ -449,7 +431,7 @@ insert()
 	if [ "$_t" = "fsp" ] && [ $# -gt 3 ]; then
 		_offset="$4"
 	elif [ $# -gt 3 ] && _offset="-b $4" && [ -z "$4" ]; then
-		err "insert $*, $rom: offset given but empty (undefined)"
+		err "vfile $*, $rom: offset given but empty (undefined)"
 	fi
 
 	[ "$nukemode" = "nuke" ] || x_ e "$_dest" f
@@ -473,6 +455,14 @@ insert()
 	xchanged="y"; :
 }
 
+check_vendor_hashes()
+{
+	x_ cd "$tmpromdir"
+	[ "$has_hashes" = "n" ] || [ "$nukemode" = "nuke" ] || sha512sum \
+	    --status -c "$hashfile" || x_ sha1sum --status -c "$hashfile"
+	x_ rm -f "$hashfile"
+}
+
 modify_mac()
 {
 	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "$xbmklocal/gbe"
@@ -487,3 +477,14 @@ newmac()
 	e "$1" f && xchanged="y" && x_ \
 	    "$ifdtool" $ifdprefix -i GbE:"$xbmklocal/gbe" "$1" -O "$1"; :
 }
+
+remktar()
+{
+	(
+	x_ cd "${tmpromdir%"/bin/$board"}"
+	mkrom_tarball "bin/$board"
+	) || err "Cannot re-generate '$archive' - $dontflash"
+
+	mv "${tmpromdir%"/bin/$board"}/bin/${relname}_${board}.tar.xz" \
+	    "$archive" || err "'$archive' -> Can't overwrite"; :
+}

From 0f931b508a8eb34e70b2ed3628ac4fe74f22b8e8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 10 May 2025 12:32:05 +0100
Subject: [PATCH 1411/1549] inject.sh: split to vendor.sh the download parts

to the extent feasible, keep lbmk-specific parts on
inject.sh to a minimum. this will later be used to
re-sync cbmk's inject.sh with lbmk's, because cbmk's
one doesn't handle vendor files.

the way this is designed now, with this patch, will
make cherry-picking lbmk to cbmk easier in the future,
when keeping this part of cbmk in sync with lbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh   |   2 +-
 include/inject.sh | 347 ++-------------------------------------------
 include/vendor.sh | 354 ++++++++++++++++++++++++++++++++++++++++++++++
 mk                |   1 +
 4 files changed, 366 insertions(+), 338 deletions(-)
 create mode 100644 include/vendor.sh

diff --git a/include/init.sh b/include/init.sh
index 2eea04c0..2dd9e88f 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -16,7 +16,7 @@ xbmkpath="$PATH"
 
 eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
     datadir version xbmkpwd relname xbmkpwd xbmktmp python pyver xbmklocal \
-    xbmklock`"
+    xbmklock cvxbmk cvchk`"
 
 xbmk_init()
 {
diff --git a/include/inject.sh b/include/inject.sh
index 7ec4e42b..ce61350a 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -3,12 +3,6 @@
 # Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
 # Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org>
 
-e6400_unpack="$xbmkpwd/src/bios_extract/dell_inspiron_1100_unpacker.py"
-me7updateparser="$xbmkpwd/util/me7_update_parser/me7_update_parser.py"
-pfs_extract="$xbmkpwd/src/biosutilities/Dell_PFS_Extract.py"
-uefiextract="$xbmkpwd/elf/uefitool/uefiextract"
-vendir="vendorfiles"
-appdir="$vendir/app"
 cbcfgsdir="config/coreboot"
 hashfiles="vendorhashes blobhashes" # blobhashes for backwards compatibility
 dontflash="!!! AN ERROR OCCURED! Please DO NOT flash if injection failed. !!!"
@@ -17,206 +11,12 @@ tmpromdel="$xbmklocal/DO_NOT_FLASH"
 nvm="util/nvmutil/nvm"
 ifdtool="elf/ifdtool/default/ifdtool"
 
-cvchk="CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
-	CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \
-	CONFIG_LENOVO_TBFW_BIN CONFIG_FSP_M_FILE CONFIG_FSP_S_FILE"
+cv="CONFIG_GBE_BIN_PATH"
+[ -n "$cvxbmk" ] && cv="$cv $cvxbmk"
+[ -n "$cvchk" ] && cv="$cv $cvchk"
 
-cv="CONFIG_ME_BIN_PATH CONFIG_SMSC_SCH5545_EC_FW_FILE CONFIG_KBC1126_FW1 \
-    CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2_OFFSET \
-    CONFIG_VGA_BIOS_ID CONFIG_BOARD_DELL_E6400 CONFIG_FSP_S_CBFS \
-    CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE CONFIG_GBE_BIN_PATH \
-    CONFIG_IFD_BIN_PATH CONFIG_FSP_FD_PATH CONFIG_MRC_FILE CONFIG_FSP_M_CBFS \
-    CONFIG_FSP_USE_REPO CONFIG_FSP_FULL_FD $cvchk"
-
-eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
-    E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
-    E6400_VGA_romname SCH5545EC_DL_url_bkup SCH5545EC_DL_hash _dest tree \
-    mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl SCH5545EC_DL_url \
-    archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref FSPFD_hash \
-    _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch tmpromdir \
-    IFD_platform ifdprefix _me _metmp mfs TBFW_url_bkup TBFW_url TBFW_hash \
-    TBFW_size hashfile xromsize xchanged EC_url_bkup vfile cbcfg $cv`"
-
-download()
-{
-	[ $# -gt 0 ] || err "No argument given"
-	export PATH="$PATH:/sbin"
-	board="$1" && readvcfg && readkconfig && bootstrap && getfiles; :
-}
-
-bootstrap()
-{
-	x_ ./mk -f coreboot ${cbdir##*/}
-	mk -b uefitool biosutilities bios_extract
-	[ -d "${kbc1126_ec_dump%/*}" ] && x_ make -C "$cbdir/util/kbc1126"
-	[ -n "$MRC_refcode_cbtree" ] && \
-	    cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
-	    x_ ./mk -d coreboot "$MRC_refcode_cbtree"; :
-}
-
-getfiles()
-{
-	[ -z "$CONFIG_HAVE_ME_BIN" ] || fetch intel_me "$DL_url" \
-	    "$DL_url_bkup" "$DL_hash" "$CONFIG_ME_BIN_PATH"
-	[ -z "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" ] || fetch sch5545ec \
-	    "$SCH5545EC_DL_url" "$SCH5545EC_DL_url_bkup" "$SCH5545EC_DL_hash" \
-	    "$CONFIG_SMSC_SCH5545_EC_FW_FILE"
-	[ -z "$CONFIG_KBC1126_FIRMWARE" ] || fetch kbc1126ec "$EC_url" \
-	    "$EC_url_bkup" "$EC_hash" "$CONFIG_KBC1126_FW1"
-	[ -z "$CONFIG_VGA_BIOS_FILE" ] || fetch e6400vga "$E6400_VGA_DL_url" \
-	  "$E6400_VGA_DL_url_bkup" "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
-	[ -z "$CONFIG_HAVE_MRC" ] || fetch "mrc" "$MRC_url" "$MRC_url_bkup" \
-	    "$MRC_hash" "$CONFIG_MRC_FILE"
-	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && fetch "refcode" "$MRC_url" \
-	    "$MRC_url_bkup" "$MRC_hash" "$CONFIG_REFCODE_BLOB_FILE"
-	[ -z "$CONFIG_LENOVO_TBFW_BIN" ] || fetch "tbfw" "$TBFW_url" \
-	    "$TBFW_url_bkup" "$TBFW_hash" "$CONFIG_LENOVO_TBFW_BIN"
-	[ -z "$CONFIG_FSP_M_FILE" ] || fetch "fsp" "$CONFIG_FSP_FD_PATH" \
-	    "$CONFIG_FSP_FD_PATH" "$FSPFD_hash" "$CONFIG_FSP_M_FILE" copy
-	[ -z "$CONFIG_FSP_S_FILE" ] || fetch "fsp" "$CONFIG_FSP_FD_PATH" \
-	    "$CONFIG_FSP_FD_PATH" "$FSPFD_hash" "$CONFIG_FSP_S_FILE" copy; :
-}
-
-fetch()
-{
-	dl_type="$1"
-	dl="$2"
-	dl_bkup="$3"
-	dlsum="$4"
-	_dest="${5##*../}"
-
-	[ "$5" = "/dev/null" ] && return 0
-	_dl="$XBMK_CACHE/file/$dlsum"
-	# HACK: if grabbing fsp from coreboot, fix the path for lbmk
-	[ "$dl_type" = "fsp" ] && for _cdl in dl dl_bkup; do
-		eval "$_cdl=\"\${$_cdl##*../}\"; _cdp=\"\$$_cdl\""
-		[ -f "$_cdp" ] || _cdp="$cbdir/$_cdp"
-		[ -f "$_cdp" ] && eval "$_cdl=\"$_cdp\""
-	done; :
-
-	dlop="curl" && [ $# -gt 5 ] && dlop="$6"
-	xbmkget "$dl" "$dl_bkup" "$_dl" "$dlsum" "$dlop"
-
-	x_ rm -Rf "${_dl}_extracted"
-	e "$_dest" f && return 0
-
-	x_ mkdir -p "${_dest%/*}"
-	remkdir "$appdir"
-	[ "$dl_type" = "fsp" ] || extract_archive "$_dl" "$appdir" || \
-	    [ "$dl_type" = "e6400vga" ] || err "$_dest $dl_type: !extract"
-
-	x_ extract_$dl_type "$_dl" "$appdir"
-	set -u -e
-	e "$_dest" f missing && err "!extract_$dl_type. $dontflash"; :
-}
-
-extract_intel_me()
-{
-	e "$mecleaner" f not && err "$cbdir: me_cleaner missing. $dontflash"
-
-	_7ztest="$xbmklocal/metmp/a"
-	_me="$xbmkpwd/$_dest"
-	_metmp="$xbmklocal/me.bin"
-	x_ rm -f "$_metmp" "$xbmklocal/a"
-
-	mfs="" && [ "$ME11bootguard" = "y" ] && mfs="--whitelist MFS" && \
-	    chkvars ME11delta ME11version ME11sku ME11pch
-	[ "$ME11bootguard" = "y" ] && x_ ./mk -f deguard
-
-	set +u +e
-	x_ rm -Rf "$xbmkpwd/metmp"
-	( fx_ find_me x_ find "$xbmkpwd/$appdir" -type f ) || :
-	[ "$ME11bootguard" != "y" ] && x_ mv "$_metmp" "$_me" && return 0
-
-	(
-	x_ cd src/deguard/
-	x_ ./finalimage.py --delta "data/delta/$ME11delta" --version \
-	    "$ME11version" --pch "$ME11pch" --sku "$ME11sku" \
-	    --fake-fpfs data/fpfs/zero --input "$_metmp" --output "$_me"
-	) || err "Error running deguard for $_me - $dontflash"; :
-}
-
-find_me()
-{
-	[ -f "$_metmp" ] && exit 1
-	[ -L "$1" ] && return 0
-
-	_7ztest="${_7ztest}a" && _r="-r" && [ -n "$mfs" ] && _r=""
-
-	"$mecleaner" $mfs $_r -t -O "$xbmklocal/a" -M "$_metmp" "$1" || \
-	    "$mecleaner" $mfs $_r -t -O "$_metmp" "$1" || "$me7updateparser" \
-	    -O "$_metmp" "$1" || extract_archive "$1" "$_7ztest" || return 0
-
-	[ -f "$_metmp" ] && exit 1
-	( fx_ find_me x_ find "$_7ztest" -type f ) || exit 1; :
-}
-
-extract_archive()
-{
-	innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
-	    "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
-
-	[ ! -d "${_dl}_extracted" ] || x_ cp -R "${_dl}_extracted" "$2"; :
-}
-
-extract_kbc1126ec()
-{
-	(
-	x_ cd "$appdir/"
-	mv Rompaq/68*.BIN ec.bin || unar -D ROM.CAB Rom.bin || unar -D \
-	    Rom.CAB Rom.bin || unar -D 68*.CAB Rom.bin || err "!kbc1126 unar"
-	[ -f "ec.bin" ] || x_ mv Rom.bin ec.bin
-	x_ e ec.bin f && x_ "$kbc1126_ec_dump" ec.bin
-	) || err "$board: can't extract kbc1126 ec firmware - $dontflash"
-
-	x_ e "$appdir/ec.bin.fw1" f && x_ e "$appdir/ec.bin.fw2" f
-	x_ cp "$appdir/"ec.bin.fw* "${_dest%/*}/"
-}
-
-extract_e6400vga()
-{
-	set +u +e
-	chkvars E6400_VGA_offset E6400_VGA_romname
-	tail -c +$E6400_VGA_offset "$_dl" | gunzip > "$appdir/bios.bin" || :
-	(
-	x_ cd "$appdir"
-	x_ e "bios.bin" f
-	"$e6400_unpack" bios.bin || printf "TODO: fix dell extract util\n"
-	) || err "can't extract e6400 vga rom - $dontflosh"
-	x_ cp "$appdir/$E6400_VGA_romname" "$_dest"
-}
-
-extract_sch5545ec()
-{
-	# full system ROM (UEFI), to extract with UEFIExtract:
-	_bios="${_dl}_extracted/Firmware/1 $dlsum -- 1 System BIOS vA.28.bin"
-	# this is the SCH5545 firmware, inside of the extracted UEFI ROM:
-	_sch5545ec_fw="$_bios.dump/4 7A9354D9-0468-444A-81CE-0BF617D890DF"
-	_sch5545ec_fw="$_sch5545ec_fw/54 D386BEB8-4B54-4E69-94F5-06091F67E0D3"
-	_sch5545ec_fw="$_sch5545ec_fw/0 Raw section/body.bin" # <-- this!
-
-	x_ "$uefiextract" "$_bios"
-	x_ cp "$_sch5545ec_fw" "$_dest"
-}
-
-# Lenovo ThunderBolt firmware updates:
-# https://pcsupport.lenovo.com/us/en/products/laptops-and-netbooks/thinkpad-t-series-laptops/thinkpad-t480-type-20l5-20l6/20l5/solutions/ht508988
-extract_tbfw()
-{
-	chkvars TBFW_size; fx_ copytb x_ find "$appdir" -type f -name "TBT.bin"
-}
-
-copytb()
-{
-	[ -f "$1" ] && [ ! -L "$1" ] && x_ dd if=/dev/null of="$1" bs=1 \
-	    seek=$TBFW_size && x_ mv "$1" "$_dest" && return 1; :
-}
-
-extract_fsp()
-{
-	x_ python "$cbdir/3rdparty/fsp/Tools/SplitFspBin.py" split -f "$1" \
-	    -o "${_dest%/*}" -n "Fsp.fd"
-}
+eval "`setvars "" archive boarddir cbdir IFD_platform ifdprefix tree new_mac \
+    tmpromdir $cv`"
 
 inject()
 {
@@ -245,7 +45,7 @@ inject()
 		x_ make -C util/nvmutil clean && x_ make -C util/nvmutil
 
 	check_release
-	readvcfg && patch_release
+	check_target && patch_release
 
 	[ "$xchanged" = "y" ] && remktar
 
@@ -275,7 +75,7 @@ check_release()
 	esac; :
 }
 
-readvcfg()
+check_target()
 {
 	if [ "$board" = "serprog_rp2040" ] || [ "$board" = "serprog_stm32" ] \
 	    || [ "$board" = "serprog_pico" ]; then
@@ -286,11 +86,7 @@ readvcfg()
 	eval "`setcfg "$boarddir/target.cfg"`"
 	chkvars tree && x_ ./mk -d coreboot "$tree"
 
-	[ -z "$vcfg" ] && return 1
-
-	vfile="config/vendor/$vcfg/pkg.cfg"
-	[ -L "$vfile" ] && err "'$archive', '$board': $vfile is a symlink"
-	[ -f "$vfile" ] || err "'$archive', '$board': $vfile doesn't exist"
+	[ -n "$vcfg" ] && check_vcfg
 
 	cbdir="src/coreboot/$tree"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
@@ -318,8 +114,8 @@ patch_release()
 	done
 
 	readkconfig || exit 0
-	fx_ prep x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 
+	fx_ prep x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 	( check_vendor_hashes ) || err "Can't verify hashes for '$archive'"; :
 
 	[ -n "$new_mac" ] && [ -n "$CONFIG_GBE_BIN_PATH" ] && modify_mac; :
@@ -330,17 +126,7 @@ readkconfig()
 	x_ rm -f "$xbmktmp/cbcfg"
 	fx_ scankconfig x_ find "$boarddir/config" -type f
 	eval "`setcfg "$xbmktmp/cbcfg" 1`"
-	setvfile_kconfig && return 1; :
-}
-
-setvfile_kconfig()
-{
-	for c in $cvchk; do
-		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
-		eval "[ -z \"\${$c}\" ] && continue"
-		eval "`setcfg "$vfile"`"
-		return 1
-	done
+	setvfile && return 1; :
 }
 
 scankconfig()
@@ -350,119 +136,6 @@ scankconfig()
 	done
 }
 
-prep()
-{
-	_xrom="$1"
-	_xromname="${1##*/}"
-	_xromnew="${_xrom%/*}/${_xromname#"$vfix"}"
-	[ "$nukemode" = "nuke" ] && _xromnew="${_xrom%/*}/$vfix${_xrom##*/}"
-
-	e "$_xrom" f missing && return 0
-	[ -z "${_xromname#"$vfix"}" ] && err "$_xromname / $vfix: name match"
-
-	# Remove the prefix and 1-byte pad
-	if [ "$nukemode" != "nuke" ] && \
-	    [ "${_xromname#"$vfix"}" != "$_xromname" ]; then
-		xromsize="$(expr $(stat -c '%s' "$_xrom") - 1)" || err "!int"
-		[ $xromsize -lt 524288 ] && err "too small, $xromsize: $_xrom"
-
-		x_ dd if="$_xrom" of="$_xromnew" bs=$xromsize count=1
-		x_ rm -f "$_xrom"
-
-		_xrom="$_xromnew"
-	fi
-
-	[ "$nukemode" = "nuke" ] && mksha512sum "$_xrom" "vendorhashes"
-
-	add_vfiles "$_xrom" || return 1 # if break return, can still change MAC
-	[ "$nukemode" != "nuke" ] && return 0
-
-	# Rename the file, prefixing a warning saying not to flash
-	cat "$_xrom" config/data/coreboot/0 > "$_xromnew" || err "!pad $_xrom"
-	x_ rm -f "$_xrom"
-}
-
-add_vfiles()
-{
-	rom="$1"
-
-	if [ "$has_hashes" != "y" ] && [ "$nukemode" != "nuke" ]; then
-		printf "'%s' has no hash file. Skipping.\n" "$archive" 1>&2
-		return 1
-	elif [ "$has_hashes" = "y" ] && [ "$nukemode" = "nuke" ]; then
-		printf "'%s' has a hash file. Skipping nuke.\n" "$archive" 1>&2
-		return 1
-	fi
-
-	[ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && vfile "fallback/refcode" \
-	    "$CONFIG_REFCODE_BLOB_FILE" "stage"
-	[ "$CONFIG_HAVE_MRC" = "y" ] && vfile "mrc.bin" "$CONFIG_MRC_FILE" \
-	    "mrc" "0xfffa0000"
-	[ "$CONFIG_HAVE_ME_BIN" = "y" ] && vfile IFD "$CONFIG_ME_BIN_PATH" me
-	[ "$CONFIG_KBC1126_FIRMWARE" = "y" ] && vfile ecfw1.bin \
-	    "$CONFIG_KBC1126_FW1" raw "$CONFIG_KBC1126_FW1_OFFSET" && vfile \
-	    ecfw2.bin "$CONFIG_KBC1126_FW2" raw "$CONFIG_KBC1126_FW2_OFFSET"
-	[ -n "$CONFIG_VGA_BIOS_FILE" ] && [ -n "$CONFIG_VGA_BIOS_ID" ] && \
-	  vfile "pci$CONFIG_VGA_BIOS_ID.rom" "$CONFIG_VGA_BIOS_FILE" optionrom
-	[ "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" = "y" ] && \
-	    [ -n "$CONFIG_SMSC_SCH5545_EC_FW_FILE" ] && \
-		vfile sch5545_ecfw.bin "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
-	[ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \
-	   [ -n "$CONFIG_FSP_M_FILE" ] && \
-		vfile "$CONFIG_FSP_M_CBFS" "$CONFIG_FSP_M_FILE" fsp --xip
-	[ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \
-	   [ -n "$CONFIG_FSP_S_FILE" ] && \
-		vfile "$CONFIG_FSP_S_CBFS" "$CONFIG_FSP_S_FILE" fsp
-
-	printf "ROM image successfully patched: %s\n" "$rom"
-	xchanged="y"
-}
-
-vfile()
-{
-	[ "$2" = "/dev/null" ] && return 0
-
-	cbfsname="$1"
-	_dest="${2##*../}"
-	_t="$3"
-
-	_offset=""
-
-	if [ "$_t" = "fsp" ] && [ $# -gt 3 ]; then
-		_offset="$4"
-	elif [ $# -gt 3 ] && _offset="-b $4" && [ -z "$4" ]; then
-		err "vfile $*, $rom: offset given but empty (undefined)"
-	fi
-
-	[ "$nukemode" = "nuke" ] || x_ e "$_dest" f
-
-	if [ "$cbfsname" = "IFD" ]; then
-		[ "$nukemode" = "nuke" ] || x_ "$ifdtool" $ifdprefix -i \
-		    $_t:$_dest "$rom" -O "$rom"
-		[ "$nukemode" != "nuke" ] || x_ "$ifdtool" $ifdprefix --nuke \
-		    $_t "$rom" -O "$rom"
-	elif [ "$nukemode" = "nuke" ]; then
-		x_ "$cbfstool" "$rom" remove -n "$cbfsname"
-	elif [ "$_t" = "stage" ]; then # the only stage we handle is refcode
-		x_ rm -f "$xbmklocal/refcode"
-		x_ "$rmodtool" -i "$_dest" -o "$xbmklocal/refcode"
-		x_ "$cbfstool" "$rom" add-stage -f "$xbmklocal/refcode" \
-		    -n "$cbfsname" -t stage
-	else
-		x_ "$cbfstool" "$rom" add -f "$_dest" -n "$cbfsname" \
-		    -t $_t $_offset
-	fi
-	xchanged="y"; :
-}
-
-check_vendor_hashes()
-{
-	x_ cd "$tmpromdir"
-	[ "$has_hashes" = "n" ] || [ "$nukemode" = "nuke" ] || sha512sum \
-	    --status -c "$hashfile" || x_ sha1sum --status -c "$hashfile"
-	x_ rm -f "$hashfile"
-}
-
 modify_mac()
 {
 	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "$xbmklocal/gbe"
diff --git a/include/vendor.sh b/include/vendor.sh
new file mode 100644
index 00000000..bc329398
--- /dev/null
+++ b/include/vendor.sh
@@ -0,0 +1,354 @@
+# SPDX-License-Identifier: GPL-3.0-only
+# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
+# Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
+# Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org>
+
+# These are variables and functions, extending the functionality of
+# inject.sh, to be used with lbmk; they are kept separate here, so that
+# the main inject.sh can be as similar as possible between lbmk and cbmk,
+# so that cherry-picking lbmk patches into cbmk yields fewer merge conflicts.
+
+# When reading this file, you should imagine that it is part of inject.sh,
+# with inject.sh concatenated onto vendor.sh; they are inexorably intertwined.
+# The main "mk" script sources vendor.sh first, and then inject.sh, in lbmk.
+
+e6400_unpack="$xbmkpwd/src/bios_extract/dell_inspiron_1100_unpacker.py"
+me7updateparser="$xbmkpwd/util/me7_update_parser/me7_update_parser.py"
+pfs_extract="$xbmkpwd/src/biosutilities/Dell_PFS_Extract.py"
+uefiextract="$xbmkpwd/elf/uefitool/uefiextract"
+vendir="vendorfiles"
+appdir="$vendir/app"
+
+# lbmk-specific extension to the "cv" variable (not suitable for cbmk)
+cvchk="CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
+    CONFIG_KBC1126_FIRMWARE CONFIG_LENOVO_TBFW_BIN CONFIG_VGA_BIOS_FILE \
+    CONFIG_FSP_M_FILE CONFIG_FSP_S_FILE"
+
+# lbmk-specific extensions to the "cv" variable (not suitable for cbmk)
+cvxbmk="CONFIG_ME_BIN_PATH CONFIG_SMSC_SCH5545_EC_FW_FILE CONFIG_KBC1126_FW1 \
+    CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2_OFFSET \
+    CONFIG_VGA_BIOS_ID CONFIG_BOARD_DELL_E6400 CONFIG_FSP_S_CBFS \
+    CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE CONFIG_FSP_FD_PATH \
+    CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_FSP_M_CBFS"
+
+# lbmk-specific extensions; mostly used for downloading vendor files
+eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
+    E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
+    E6400_VGA_romname SCH5545EC_DL_url_bkup SCH5545EC_DL_hash _dest \
+    mecleaner kbc1126_ec_dump MRC_refcode_cbtree _dl SCH5545EC_DL_url \
+    EC_url rom DL_url nukemode cbfstoolref FSPFD_hash \
+    _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch \
+    _me _metmp mfs TBFW_url_bkup TBFW_url TBFW_hash \
+    TBFW_size hashfile xromsize xchanged EC_url_bkup vfile \
+    CONFIG_FSP_USE_REPO CONFIG_FSP_FULL_FD`"
+
+download()
+{
+	[ $# -gt 0 ] || err "No argument given"
+	export PATH="$PATH:/sbin"
+	board="$1" && check_target && readkconfig && bootstrap && getfiles; :
+}
+
+bootstrap()
+{
+	x_ ./mk -f coreboot ${cbdir##*/}
+	mk -b uefitool biosutilities bios_extract
+	[ -d "${kbc1126_ec_dump%/*}" ] && x_ make -C "$cbdir/util/kbc1126"
+	[ -n "$MRC_refcode_cbtree" ] && \
+	    cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
+	    x_ ./mk -d coreboot "$MRC_refcode_cbtree"; :
+}
+
+getfiles()
+{
+	[ -z "$CONFIG_HAVE_ME_BIN" ] || fetch intel_me "$DL_url" \
+	    "$DL_url_bkup" "$DL_hash" "$CONFIG_ME_BIN_PATH"
+	[ -z "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" ] || fetch sch5545ec \
+	    "$SCH5545EC_DL_url" "$SCH5545EC_DL_url_bkup" "$SCH5545EC_DL_hash" \
+	    "$CONFIG_SMSC_SCH5545_EC_FW_FILE"
+	[ -z "$CONFIG_KBC1126_FIRMWARE" ] || fetch kbc1126ec "$EC_url" \
+	    "$EC_url_bkup" "$EC_hash" "$CONFIG_KBC1126_FW1"
+	[ -z "$CONFIG_VGA_BIOS_FILE" ] || fetch e6400vga "$E6400_VGA_DL_url" \
+	  "$E6400_VGA_DL_url_bkup" "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
+	[ -z "$CONFIG_HAVE_MRC" ] || fetch "mrc" "$MRC_url" "$MRC_url_bkup" \
+	    "$MRC_hash" "$CONFIG_MRC_FILE"
+	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && fetch "refcode" "$MRC_url" \
+	    "$MRC_url_bkup" "$MRC_hash" "$CONFIG_REFCODE_BLOB_FILE"
+	[ -z "$CONFIG_LENOVO_TBFW_BIN" ] || fetch "tbfw" "$TBFW_url" \
+	    "$TBFW_url_bkup" "$TBFW_hash" "$CONFIG_LENOVO_TBFW_BIN"
+	[ -z "$CONFIG_FSP_M_FILE" ] || fetch "fsp" "$CONFIG_FSP_FD_PATH" \
+	    "$CONFIG_FSP_FD_PATH" "$FSPFD_hash" "$CONFIG_FSP_M_FILE" copy
+	[ -z "$CONFIG_FSP_S_FILE" ] || fetch "fsp" "$CONFIG_FSP_FD_PATH" \
+	    "$CONFIG_FSP_FD_PATH" "$FSPFD_hash" "$CONFIG_FSP_S_FILE" copy; :
+}
+
+fetch()
+{
+	dl_type="$1"
+	dl="$2"
+	dl_bkup="$3"
+	dlsum="$4"
+	_dest="${5##*../}"
+
+	[ "$5" = "/dev/null" ] && return 0
+	_dl="$XBMK_CACHE/file/$dlsum"
+	# HACK: if grabbing fsp from coreboot, fix the path for lbmk
+	[ "$dl_type" = "fsp" ] && for _cdl in dl dl_bkup; do
+		eval "$_cdl=\"\${$_cdl##*../}\"; _cdp=\"\$$_cdl\""
+		[ -f "$_cdp" ] || _cdp="$cbdir/$_cdp"
+		[ -f "$_cdp" ] && eval "$_cdl=\"$_cdp\""
+	done; :
+
+	dlop="curl" && [ $# -gt 5 ] && dlop="$6"
+	xbmkget "$dl" "$dl_bkup" "$_dl" "$dlsum" "$dlop"
+
+	x_ rm -Rf "${_dl}_extracted"
+	e "$_dest" f && return 0
+
+	x_ mkdir -p "${_dest%/*}"
+	remkdir "$appdir"
+	[ "$dl_type" = "fsp" ] || extract_archive "$_dl" "$appdir" || \
+	    [ "$dl_type" = "e6400vga" ] || err "$_dest $dl_type: !extract"
+
+	x_ extract_$dl_type "$_dl" "$appdir"
+	set -u -e
+	e "$_dest" f missing && err "!extract_$dl_type. $dontflash"; :
+}
+
+extract_intel_me()
+{
+	e "$mecleaner" f not && err "$cbdir: me_cleaner missing. $dontflash"
+
+	_7ztest="$xbmklocal/metmp/a"
+	_me="$xbmkpwd/$_dest"
+	_metmp="$xbmklocal/me.bin"
+	x_ rm -f "$_metmp" "$xbmklocal/a"
+
+	mfs="" && [ "$ME11bootguard" = "y" ] && mfs="--whitelist MFS" && \
+	    chkvars ME11delta ME11version ME11sku ME11pch
+	[ "$ME11bootguard" = "y" ] && x_ ./mk -f deguard
+
+	set +u +e
+	x_ rm -Rf "$xbmkpwd/metmp"
+	( fx_ find_me x_ find "$xbmkpwd/$appdir" -type f ) || :
+	[ "$ME11bootguard" != "y" ] && x_ mv "$_metmp" "$_me" && return 0
+
+	(
+	x_ cd src/deguard/
+	x_ ./finalimage.py --delta "data/delta/$ME11delta" --version \
+	    "$ME11version" --pch "$ME11pch" --sku "$ME11sku" \
+	    --fake-fpfs data/fpfs/zero --input "$_metmp" --output "$_me"
+	) || err "Error running deguard for $_me - $dontflash"; :
+}
+
+find_me()
+{
+	[ -f "$_metmp" ] && exit 1
+	[ -L "$1" ] && return 0
+
+	_7ztest="${_7ztest}a" && _r="-r" && [ -n "$mfs" ] && _r=""
+
+	"$mecleaner" $mfs $_r -t -O "$xbmklocal/a" -M "$_metmp" "$1" || \
+	    "$mecleaner" $mfs $_r -t -O "$_metmp" "$1" || "$me7updateparser" \
+	    -O "$_metmp" "$1" || extract_archive "$1" "$_7ztest" || return 0
+
+	[ -f "$_metmp" ] && exit 1
+	( fx_ find_me x_ find "$_7ztest" -type f ) || exit 1; :
+}
+
+extract_archive()
+{
+	innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
+	    "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
+
+	[ ! -d "${_dl}_extracted" ] || x_ cp -R "${_dl}_extracted" "$2"; :
+}
+
+extract_kbc1126ec()
+{
+	(
+	x_ cd "$appdir/"
+	mv Rompaq/68*.BIN ec.bin || unar -D ROM.CAB Rom.bin || unar -D \
+	    Rom.CAB Rom.bin || unar -D 68*.CAB Rom.bin || err "!kbc1126 unar"
+	[ -f "ec.bin" ] || x_ mv Rom.bin ec.bin
+	x_ e ec.bin f && x_ "$kbc1126_ec_dump" ec.bin
+	) || err "$board: can't extract kbc1126 ec firmware - $dontflash"
+
+	x_ e "$appdir/ec.bin.fw1" f && x_ e "$appdir/ec.bin.fw2" f
+	x_ cp "$appdir/"ec.bin.fw* "${_dest%/*}/"
+}
+
+extract_e6400vga()
+{
+	set +u +e
+	chkvars E6400_VGA_offset E6400_VGA_romname
+	tail -c +$E6400_VGA_offset "$_dl" | gunzip > "$appdir/bios.bin" || :
+	(
+	x_ cd "$appdir"
+	x_ e "bios.bin" f
+	"$e6400_unpack" bios.bin || printf "TODO: fix dell extract util\n"
+	) || err "can't extract e6400 vga rom - $dontflosh"
+	x_ cp "$appdir/$E6400_VGA_romname" "$_dest"
+}
+
+extract_sch5545ec()
+{
+	# full system ROM (UEFI), to extract with UEFIExtract:
+	_bios="${_dl}_extracted/Firmware/1 $dlsum -- 1 System BIOS vA.28.bin"
+	# this is the SCH5545 firmware, inside of the extracted UEFI ROM:
+	_sch5545ec_fw="$_bios.dump/4 7A9354D9-0468-444A-81CE-0BF617D890DF"
+	_sch5545ec_fw="$_sch5545ec_fw/54 D386BEB8-4B54-4E69-94F5-06091F67E0D3"
+	_sch5545ec_fw="$_sch5545ec_fw/0 Raw section/body.bin" # <-- this!
+
+	x_ "$uefiextract" "$_bios"
+	x_ cp "$_sch5545ec_fw" "$_dest"
+}
+
+# Lenovo ThunderBolt firmware updates:
+# https://pcsupport.lenovo.com/us/en/products/laptops-and-netbooks/thinkpad-t-series-laptops/thinkpad-t480-type-20l5-20l6/20l5/solutions/ht508988
+extract_tbfw()
+{
+	chkvars TBFW_size; fx_ copytb x_ find "$appdir" -type f -name "TBT.bin"
+}
+
+copytb()
+{
+	[ -f "$1" ] && [ ! -L "$1" ] && x_ dd if=/dev/null of="$1" bs=1 \
+	    seek=$TBFW_size && x_ mv "$1" "$_dest" && return 1; :
+}
+
+extract_fsp()
+{
+	x_ python "$cbdir/3rdparty/fsp/Tools/SplitFspBin.py" split -f "$1" \
+	    -o "${_dest%/*}" -n "Fsp.fd"
+}
+
+check_vcfg()
+{
+	vfile="config/vendor/$vcfg/pkg.cfg"
+	[ -L "$vfile" ] && err "'$archive', '$board': $vfile is a symlink"; :
+	[ -f "$vfile" ] || err "'$archive', '$board': $vfile missing"; :
+}
+
+setvfile()
+{
+	[ -n "$vfile" ] && for c in $cvchk; do
+		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
+		eval "[ -z \"\${$c}\" ] && continue"
+		eval "`setcfg "$vfile"`"
+		return 1
+	done && return 0; return 1
+}
+
+prep()
+{
+	_xrom="$1"
+	_xromname="${1##*/}"
+	_xromnew="${_xrom%/*}/${_xromname#"$vfix"}"
+	[ "$nukemode" = "nuke" ] && _xromnew="${_xrom%/*}/$vfix${_xrom##*/}"
+
+	e "$_xrom" f missing && return 0
+	[ -z "${_xromname#"$vfix"}" ] && err "$_xromname / $vfix: name match"
+
+	# Remove the prefix and 1-byte pad
+	if [ "$nukemode" != "nuke" ] && \
+	    [ "${_xromname#"$vfix"}" != "$_xromname" ]; then
+		xromsize="$(expr $(stat -c '%s' "$_xrom") - 1)" || err "!int"
+		[ $xromsize -lt 524288 ] && err "too small, $xromsize: $_xrom"
+
+		x_ dd if="$_xrom" of="$_xromnew" bs=$xromsize count=1
+		x_ rm -f "$_xrom"
+
+		_xrom="$_xromnew"
+	fi
+
+	[ "$nukemode" = "nuke" ] && mksha512sum "$_xrom" "vendorhashes"
+
+	add_vfiles "$_xrom" || return 1 # if break return, can still change MAC
+	[ "$nukemode" != "nuke" ] && return 0
+
+	# Rename the file, prefixing a warning saying not to flash
+	cat "$_xrom" config/data/coreboot/0 > "$_xromnew" || err "!pad $_xrom"
+	x_ rm -f "$_xrom"
+}
+
+add_vfiles()
+{
+	rom="$1"
+
+	if [ "$has_hashes" != "y" ] && [ "$nukemode" != "nuke" ]; then
+		printf "'%s' has no hash file. Skipping.\n" "$archive" 1>&2
+		return 1
+	elif [ "$has_hashes" = "y" ] && [ "$nukemode" = "nuke" ]; then
+		printf "'%s' has a hash file. Skipping nuke.\n" "$archive" 1>&2
+		return 1
+	fi
+
+	[ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && vfile "fallback/refcode" \
+	    "$CONFIG_REFCODE_BLOB_FILE" "stage"
+	[ "$CONFIG_HAVE_MRC" = "y" ] && vfile "mrc.bin" "$CONFIG_MRC_FILE" \
+	    "mrc" "0xfffa0000"
+	[ "$CONFIG_HAVE_ME_BIN" = "y" ] && vfile IFD "$CONFIG_ME_BIN_PATH" me
+	[ "$CONFIG_KBC1126_FIRMWARE" = "y" ] && vfile ecfw1.bin \
+	    "$CONFIG_KBC1126_FW1" raw "$CONFIG_KBC1126_FW1_OFFSET" && vfile \
+	    ecfw2.bin "$CONFIG_KBC1126_FW2" raw "$CONFIG_KBC1126_FW2_OFFSET"
+	[ -n "$CONFIG_VGA_BIOS_FILE" ] && [ -n "$CONFIG_VGA_BIOS_ID" ] && \
+	  vfile "pci$CONFIG_VGA_BIOS_ID.rom" "$CONFIG_VGA_BIOS_FILE" optionrom
+	[ "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" = "y" ] && \
+	    [ -n "$CONFIG_SMSC_SCH5545_EC_FW_FILE" ] && \
+		vfile sch5545_ecfw.bin "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
+	[ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \
+	   [ -n "$CONFIG_FSP_M_FILE" ] && \
+		vfile "$CONFIG_FSP_M_CBFS" "$CONFIG_FSP_M_FILE" fsp --xip
+	[ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \
+	   [ -n "$CONFIG_FSP_S_FILE" ] && \
+		vfile "$CONFIG_FSP_S_CBFS" "$CONFIG_FSP_S_FILE" fsp
+
+	printf "ROM image successfully patched: %s\n" "$rom"
+	xchanged="y"
+}
+
+vfile()
+{
+	[ "$2" = "/dev/null" ] && return 0
+
+	cbfsname="$1"
+	_dest="${2##*../}"
+	_t="$3"
+
+	_offset=""
+
+	if [ "$_t" = "fsp" ] && [ $# -gt 3 ]; then
+		_offset="$4"
+	elif [ $# -gt 3 ] && _offset="-b $4" && [ -z "$4" ]; then
+		err "vfile $*, $rom: offset given but empty (undefined)"
+	fi
+
+	[ "$nukemode" = "nuke" ] || x_ e "$_dest" f
+
+	if [ "$cbfsname" = "IFD" ]; then
+		[ "$nukemode" = "nuke" ] || x_ "$ifdtool" $ifdprefix -i \
+		    $_t:$_dest "$rom" -O "$rom"
+		[ "$nukemode" != "nuke" ] || x_ "$ifdtool" $ifdprefix --nuke \
+		    $_t "$rom" -O "$rom"
+	elif [ "$nukemode" = "nuke" ]; then
+		x_ "$cbfstool" "$rom" remove -n "$cbfsname"
+	elif [ "$_t" = "stage" ]; then # the only stage we handle is refcode
+		x_ rm -f "$xbmklocal/refcode"
+		x_ "$rmodtool" -i "$_dest" -o "$xbmklocal/refcode"
+		x_ "$cbfstool" "$rom" add-stage -f "$xbmklocal/refcode" \
+		    -n "$cbfsname" -t stage
+	else
+		x_ "$cbfstool" "$rom" add -f "$_dest" -n "$cbfsname" \
+		    -t $_t $_offset
+	fi
+	xchanged="y"; :
+}
+
+check_vendor_hashes()
+{
+	x_ cd "$tmpromdir"
+	[ "$has_hashes" = "n" ] || [ "$nukemode" = "nuke" ] || sha512sum \
+	    --status -c "$hashfile" || x_ sha1sum --status -c "$hashfile"
+	x_ rm -f "$hashfile"
+}
diff --git a/mk b/mk
index af29f1e2..b56b7444 100755
--- a/mk
+++ b/mk
@@ -12,6 +12,7 @@ fi
 
 . "include/lib.sh"
 . "include/init.sh"
+. "include/vendor.sh"
 . "include/inject.sh"
 . "include/mrc.sh"
 . "include/rom.sh"

From a8e374020c0bea6cc849ffdf424b382fe535fee9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 10 May 2025 17:19:00 +0100
Subject: [PATCH 1412/1549] tree.sh: simplified srcdir check on make-clean

this is the check that ksips a given target if the tree
directory does not exist, on the clean command.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/tree.sh | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/tree.sh b/include/tree.sh
index 47f65d10..1d5dd071 100644
--- a/include/tree.sh
+++ b/include/tree.sh
@@ -112,9 +112,8 @@ handle_defconfig()
 	chkvars tree
 	srcdir="src/$project/$tree"
 
-	if [ "$mode" = "distclean" ] || [ "$mode" = "crossgcc-clean" ]; then
-		[ -d "$srcdir" ] || return 0
-	fi
+	[ "$mode" = "${mode%clean}" ] && [ ! -d "$srcdir" ] && return 0
+
 	[ -z "$mode" ] && for _xarch in $xarch; do
 		$dry check_cross_compiler "$_xarch"
 	done; :

From 0aa99f4bf8b52ea6060f0cd72263b9d4b4e99699 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 10 May 2025 17:58:22 +0100
Subject: [PATCH 1413/1549] tree.sh: only create elfdir in copy_elf()

otherwise, we create empty directories where build.list
doesn't exist, like on coreboot.

we already create a directory when needed, when actually
copying elf files, so let's just leave it at that.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/tree.sh | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/include/tree.sh b/include/tree.sh
index 1d5dd071..d4585b92 100644
--- a/include/tree.sh
+++ b/include/tree.sh
@@ -107,7 +107,6 @@ handle_defconfig()
 
 	[ -f "CHANGELOG" ] || fetch_project "$project"
 	configure_project "$target_dir" || return 0
-	x_ mkdir -p "$elfdir/$target"
 
 	chkvars tree
 	srcdir="src/$project/$tree"
@@ -267,8 +266,7 @@ check_defconfig()
 	[ -f "$defconfig" ] || $dry err "$project/$target: missing defconfig"
 	dest_dir="$elfdir/$target/${defconfig#"$target_dir/config/"}"
 
-	$dry elfcheck || return 1 # skip build if a previous one exists
-	$dry x_ mkdir -p "$dest_dir"
+	$dry elfcheck || return 1; : # skip build if a previous one exists
 }
 
 elfcheck()

From e5af201060ef920b9155b4324bc4d2a832752bff Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 10 May 2025 19:03:15 +0100
Subject: [PATCH 1414/1549] inject.sh: further cleanup for vendor.sh

i moved out more code to vendor.sh, to reduce the
amount of lbmk-only code on inject.sh

this should reduce the number of merge conflicts
even further, when cherry picking from lbmk to cbmk.

in particular, vendor file insertion is now handled
entirely through the "setvfile" function, instead
of from inject.sh, which seems counterintuitive,
but remember that inject.sh also does MAC addresses.

therefore, the inject.sh script is now primarily for
inserting MAC addresses, and handles vendor downloads
in a slightly more convoluted way, but still easy
enough to understand if you read it a bit.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 33 +++++++-----------------
 include/vendor.sh | 66 ++++++++++++++++++++++++++++++-----------------
 2 files changed, 52 insertions(+), 47 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index ce61350a..50ade80f 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -5,9 +5,7 @@
 
 cbcfgsdir="config/coreboot"
 hashfiles="vendorhashes blobhashes" # blobhashes for backwards compatibility
-dontflash="!!! AN ERROR OCCURED! Please DO NOT flash if injection failed. !!!"
-vfix="DO_NOT_FLASH_YET._FIRST,_INJECT_FILES_VIA_INSTRUCTIONS_ON_LIBREBOOT.ORG_"
-tmpromdel="$xbmklocal/DO_NOT_FLASH"
+tmpromdel="$XBMK_CACHE/DO_NOT_FLASH"
 nvm="util/nvmutil/nvm"
 ifdtool="elf/ifdtool/default/ifdtool"
 
@@ -15,15 +13,15 @@ cv="CONFIG_GBE_BIN_PATH"
 [ -n "$cvxbmk" ] && cv="$cv $cvxbmk"
 [ -n "$cvchk" ] && cv="$cv $cvchk"
 
-eval "`setvars "" archive boarddir cbdir IFD_platform ifdprefix tree new_mac \
-    tmpromdir $cv`"
+eval "`setvars "" archive boarddir IFD_platform ifdprefix tree new_mac \
+    tmpromdir board $cv`"
 
 inject()
 {
 	remkdir "$tmpromdel"
 
 	set +u +e
-	[ $# -lt 1 ] && err "No options specified. - $dontflash"
+	[ $# -lt 1 ] && err "No options specified"
 	eval "`setvars "" nukemode new_mac xchanged`"
 
 	archive="$1";
@@ -57,11 +55,11 @@ inject()
 
 check_release()
 {
-	[ -L "$archive" ] && err "'$archive' is a symlink. $dontflash"
+	[ -L "$archive" ] && err "'$archive' is a symlink"
 	e "$archive" f missing && err "'$archive' missing"
 
 	archivename="`basename "$archive"`" || err "Can't get '$archive' name"
-	[ -z "$archivename" ] && err "Can't determine archive name. $dontflash"
+	[ -z "$archivename" ] && err "Can't determine archive name"
 
 	case "$archivename" in
 	*_src.tar.xz)
@@ -71,7 +69,7 @@ check_release()
 	*.tar.xz) _stripped_prefix="${archivename#*_}"
 		board="${_stripped_prefix%.tar.xz}" ;;
 	*)
-		err "'$archive': could not detect board type - $dontflash"
+		err "'$archive': could not detect board type"
 	esac; :
 }
 
@@ -86,14 +84,6 @@ check_target()
 	eval "`setcfg "$boarddir/target.cfg"`"
 	chkvars tree && x_ ./mk -d coreboot "$tree"
 
-	[ -n "$vcfg" ] && check_vcfg
-
-	cbdir="src/coreboot/$tree"
-	cbfstool="elf/cbfstool/$tree/cbfstool"
-	rmodtool="elf/cbfstool/$tree/rmodtool"
-	mecleaner="$xbmkpwd/$cbdir/util/me_cleaner/me_cleaner.py"
-	kbc1126_ec_dump="$xbmkpwd/$cbdir/util/kbc1126/kbc1126_ec_dump"
-	cbfstool="elf/cbfstool/$tree/cbfstool"
 	ifdtool="elf/ifdtool/$tree/ifdtool"
 	[ -n "$IFD_platform" ] && ifdprefix="-p $IFD_platform"; :
 }
@@ -103,7 +93,7 @@ patch_release()
 	[ "$nukemode" = "nuke" ] || x_ ./mk download "$board"
 
 	has_hashes="n"
-	tmpromdir="$xbmklocal/DO_NOT_FLASH/bin/$board"
+	tmpromdir="$tmpromdel/bin/$board"
 
 	remkdir "${tmpromdir%"/bin/$board"}"
 	x_ tar -xf "$archive" -C "${tmpromdir%"/bin/$board"}"
@@ -115,9 +105,6 @@ patch_release()
 
 	readkconfig || exit 0
 
-	fx_ prep x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
-	( check_vendor_hashes ) || err "Can't verify hashes for '$archive'"; :
-
 	[ -n "$new_mac" ] && [ -n "$CONFIG_GBE_BIN_PATH" ] && modify_mac; :
 }
 
@@ -126,7 +113,7 @@ readkconfig()
 	x_ rm -f "$xbmktmp/cbcfg"
 	fx_ scankconfig x_ find "$boarddir/config" -type f
 	eval "`setcfg "$xbmktmp/cbcfg" 1`"
-	setvfile && return 1; :
+	setvfile "$@" && return 1; :
 }
 
 scankconfig()
@@ -156,7 +143,7 @@ remktar()
 	(
 	x_ cd "${tmpromdir%"/bin/$board"}"
 	mkrom_tarball "bin/$board"
-	) || err "Cannot re-generate '$archive' - $dontflash"
+	) || err "Cannot re-generate '$archive'"
 
 	mv "${tmpromdir%"/bin/$board"}/bin/${relname}_${board}.tar.xz" \
 	    "$archive" || err "'$archive' -> Can't overwrite"; :
diff --git a/include/vendor.sh b/include/vendor.sh
index bc329398..1c553300 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -18,6 +18,7 @@ pfs_extract="$xbmkpwd/src/biosutilities/Dell_PFS_Extract.py"
 uefiextract="$xbmkpwd/elf/uefitool/uefiextract"
 vendir="vendorfiles"
 appdir="$vendir/app"
+vfix="DO_NOT_FLASH_YET._FIRST,_INJECT_FILES_VIA_INSTRUCTIONS_ON_LIBREBOOT.ORG_"
 
 # lbmk-specific extension to the "cv" variable (not suitable for cbmk)
 cvchk="CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
@@ -40,23 +41,13 @@ eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch \
     _me _metmp mfs TBFW_url_bkup TBFW_url TBFW_hash \
     TBFW_size hashfile xromsize xchanged EC_url_bkup vfile \
-    CONFIG_FSP_USE_REPO CONFIG_FSP_FULL_FD`"
+    CONFIG_FSP_USE_REPO CONFIG_FSP_FULL_FD cbdir`"
 
 download()
 {
 	[ $# -gt 0 ] || err "No argument given"
 	export PATH="$PATH:/sbin"
-	board="$1" && check_target && readkconfig && bootstrap && getfiles; :
-}
-
-bootstrap()
-{
-	x_ ./mk -f coreboot ${cbdir##*/}
-	mk -b uefitool biosutilities bios_extract
-	[ -d "${kbc1126_ec_dump%/*}" ] && x_ make -C "$cbdir/util/kbc1126"
-	[ -n "$MRC_refcode_cbtree" ] && \
-	    cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
-	    x_ ./mk -d coreboot "$MRC_refcode_cbtree"; :
+	board="$1" && check_target && readkconfig download
 }
 
 getfiles()
@@ -112,12 +103,12 @@ fetch()
 
 	x_ extract_$dl_type "$_dl" "$appdir"
 	set -u -e
-	e "$_dest" f missing && err "!extract_$dl_type. $dontflash"; :
+	e "$_dest" f missing && err "!extract_$dl_type"; :
 }
 
 extract_intel_me()
 {
-	e "$mecleaner" f not && err "$cbdir: me_cleaner missing. $dontflash"
+	e "$mecleaner" f not && err "$cbdir: me_cleaner missing"
 
 	_7ztest="$xbmklocal/metmp/a"
 	_me="$xbmkpwd/$_dest"
@@ -138,7 +129,7 @@ extract_intel_me()
 	x_ ./finalimage.py --delta "data/delta/$ME11delta" --version \
 	    "$ME11version" --pch "$ME11pch" --sku "$ME11sku" \
 	    --fake-fpfs data/fpfs/zero --input "$_metmp" --output "$_me"
-	) || err "Error running deguard for $_me - $dontflash"; :
+	) || err "Error running deguard for $_me"; :
 }
 
 find_me()
@@ -172,7 +163,7 @@ extract_kbc1126ec()
 	    Rom.CAB Rom.bin || unar -D 68*.CAB Rom.bin || err "!kbc1126 unar"
 	[ -f "ec.bin" ] || x_ mv Rom.bin ec.bin
 	x_ e ec.bin f && x_ "$kbc1126_ec_dump" ec.bin
-	) || err "$board: can't extract kbc1126 ec firmware - $dontflash"
+	) || err "$board: can't extract kbc1126 ec firmware"
 
 	x_ e "$appdir/ec.bin.fw1" f && x_ e "$appdir/ec.bin.fw2" f
 	x_ cp "$appdir/"ec.bin.fw* "${_dest%/*}/"
@@ -187,7 +178,7 @@ extract_e6400vga()
 	x_ cd "$appdir"
 	x_ e "bios.bin" f
 	"$e6400_unpack" bios.bin || printf "TODO: fix dell extract util\n"
-	) || err "can't extract e6400 vga rom - $dontflosh"
+	) || err "can't extract e6400 vga rom"
 	x_ cp "$appdir/$E6400_VGA_romname" "$_dest"
 }
 
@@ -223,6 +214,27 @@ extract_fsp()
 	    -o "${_dest%/*}" -n "Fsp.fd"
 }
 
+setvfile()
+{
+	[ -n "$vcfg" ] && check_vcfg && for c in $cvchk; do
+		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
+		eval "[ -z \"\${$c}\" ] && continue"
+
+		# valid vcfg. proceed to download files
+		eval "`setcfg "$vfile"`"
+
+		bootstrap
+
+		[ $# -gt 0 ] && getfiles
+		[ $# -gt 0 ] && return 1 # download
+
+		fx_ prep x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
+		( check_vendor_hashes ) || err "$archive: Can't verify hashes"
+
+		return 1
+	done && return 0; return 1
+}
+
 check_vcfg()
 {
 	vfile="config/vendor/$vcfg/pkg.cfg"
@@ -230,14 +242,20 @@ check_vcfg()
 	[ -f "$vfile" ] || err "'$archive', '$board': $vfile missing"; :
 }
 
-setvfile()
+bootstrap()
 {
-	[ -n "$vfile" ] && for c in $cvchk; do
-		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
-		eval "[ -z \"\${$c}\" ] && continue"
-		eval "`setcfg "$vfile"`"
-		return 1
-	done && return 0; return 1
+	cbdir="src/coreboot/$tree"
+	mecleaner="$xbmkpwd/$cbdir/util/me_cleaner/me_cleaner.py"
+	kbc1126_ec_dump="$xbmkpwd/$cbdir/util/kbc1126/kbc1126_ec_dump"
+	cbfstool="elf/cbfstool/$tree/cbfstool"
+	rmodtool="elf/cbfstool/$tree/rmodtool"
+
+	x_ ./mk -f coreboot "${cbdir##*/}"
+	mk -b uefitool biosutilities bios_extract
+	[ -d "${kbc1126_ec_dump%/*}" ] && x_ make -C "$cbdir/util/kbc1126"
+	[ -n "$MRC_refcode_cbtree" ] && \
+	    cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
+	    x_ ./mk -d coreboot "$MRC_refcode_cbtree"; :
 }
 
 prep()

From dcfd3e632e279480a2b6e0f6172c8fd595548c13 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 10 May 2025 20:23:46 +0100
Subject: [PATCH 1415/1549] inject.sh: re-add mac address confirmation

it just makes the script more user-friendly

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/inject.sh b/include/inject.sh
index 50ade80f..6e8fa320 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -130,6 +130,9 @@ modify_mac()
 	    x_ "$nvm" "$xbmklocal/gbe" setmac "$new_mac"
 
 	fx_ newmac x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
+
+	printf "\nGbE NVM written to '%s':\n" "$archive"
+	x_ "$nvm" "$xbmklocal/gbe" dump | grep -v "bytes read from file" || :
 }
 
 newmac()

From a0c436ad4bae62bf6d237bd093b2bd2dcfdb8efb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 10 May 2025 20:48:38 +0100
Subject: [PATCH 1416/1549] inject.sh: Remove confusing path on tar creation

The path is wrong. The correct path is printed afterward.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/inject.sh b/include/inject.sh
index 6e8fa320..ae6fcc58 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -145,7 +145,8 @@ remktar()
 {
 	(
 	x_ cd "${tmpromdir%"/bin/$board"}"
-	mkrom_tarball "bin/$board"
+	printf "Re-building tar archive (please wait)\n"
+	mkrom_tarball "bin/$board" 1>/dev/null
 	) || err "Cannot re-generate '$archive'"
 
 	mv "${tmpromdir%"/bin/$board"}/bin/${relname}_${board}.tar.xz" \

From 7d90d43425251f94adced76512310a59f2fac4dd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 10 May 2025 20:51:38 +0100
Subject: [PATCH 1417/1549] remove another confusing message

the current message says the file name, and implies that
the given file has already been updated.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/inject.sh b/include/inject.sh
index ae6fcc58..6d910b7c 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -131,7 +131,7 @@ modify_mac()
 
 	fx_ newmac x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 
-	printf "\nGbE NVM written to '%s':\n" "$archive"
+	printf "\nThe following GbE NVM data will be written:\n"
 	x_ "$nvm" "$xbmklocal/gbe" dump | grep -v "bytes read from file" || :
 }
 

From 0cc816167bb7f95c1722a640066933bfdf38dd60 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 11 May 2025 00:34:53 +0100
Subject: [PATCH 1418/1549] vendor.sh: split up setvfile()

split the actual bootstrapping to getvfile()

setvfile only sets the config, but then it will
call getvfile() to act on that config.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh |  2 +-
 include/vendor.sh | 30 ++++++++++++++++--------------
 2 files changed, 17 insertions(+), 15 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 6d910b7c..d3ea78f7 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -113,7 +113,7 @@ readkconfig()
 	x_ rm -f "$xbmktmp/cbcfg"
 	fx_ scankconfig x_ find "$boarddir/config" -type f
 	eval "`setcfg "$xbmktmp/cbcfg" 1`"
-	setvfile "$@" && return 1; :
+	setvfile "$@" || return 1; :
 }
 
 scankconfig()
diff --git a/include/vendor.sh b/include/vendor.sh
index 1c553300..e914f08d 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -219,20 +219,8 @@ setvfile()
 	[ -n "$vcfg" ] && check_vcfg && for c in $cvchk; do
 		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
 		eval "[ -z \"\${$c}\" ] && continue"
-
-		# valid vcfg. proceed to download files
-		eval "`setcfg "$vfile"`"
-
-		bootstrap
-
-		[ $# -gt 0 ] && getfiles
-		[ $# -gt 0 ] && return 1 # download
-
-		fx_ prep x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
-		( check_vendor_hashes ) || err "$archive: Can't verify hashes"
-
-		return 1
-	done && return 0; return 1
+		getvfile "$@" && return 0
+	done && return 1; :
 }
 
 check_vcfg()
@@ -242,6 +230,20 @@ check_vcfg()
 	[ -f "$vfile" ] || err "'$archive', '$board': $vfile missing"; :
 }
 
+getvfile()
+{
+	# valid vcfg. proceed to download files
+	eval "`setcfg "$vfile"`"
+
+	bootstrap
+
+	[ $# -gt 0 ] && getfiles
+	[ $# -gt 0 ] && return 0 # download
+
+	fx_ prep x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
+	( check_vendor_hashes ) || err "$archive: Can't verify hashes"; :
+}
+
 bootstrap()
 {
 	cbdir="src/coreboot/$tree"

From 9c27b7437cf2f902389cbc5965c8dada0b867cba Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 11 May 2025 00:43:34 +0100
Subject: [PATCH 1419/1549] vendor.sh: tidy up variables

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index e914f08d..89e352a7 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -30,18 +30,17 @@ cvxbmk="CONFIG_ME_BIN_PATH CONFIG_SMSC_SCH5545_EC_FW_FILE CONFIG_KBC1126_FW1 \
     CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2_OFFSET \
     CONFIG_VGA_BIOS_ID CONFIG_BOARD_DELL_E6400 CONFIG_FSP_S_CBFS \
     CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE CONFIG_FSP_FD_PATH \
-    CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_FSP_M_CBFS"
+    CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_FSP_M_CBFS \
+    CONFIG_FSP_USE_REPO CONFIG_FSP_FULL_FD"
 
 # lbmk-specific extensions; mostly used for downloading vendor files
 eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
-    E6400_VGA_romname SCH5545EC_DL_url_bkup SCH5545EC_DL_hash _dest \
-    mecleaner kbc1126_ec_dump MRC_refcode_cbtree _dl SCH5545EC_DL_url \
-    EC_url rom DL_url nukemode cbfstoolref FSPFD_hash \
-    _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch \
-    _me _metmp mfs TBFW_url_bkup TBFW_url TBFW_hash \
-    TBFW_size hashfile xromsize xchanged EC_url_bkup vfile \
-    CONFIG_FSP_USE_REPO CONFIG_FSP_FULL_FD cbdir`"
+    E6400_VGA_romname SCH5545EC_DL_url_bkup SCH5545EC_DL_hash _dest mecleaner \
+    kbc1126_ec_dump MRC_refcode_cbtree _dl SCH5545EC_DL_url EC_url rom DL_url \
+    nukemode cbfstoolref FSPFD_hash _7ztest ME11bootguard ME11delta xromsize \
+    ME11version ME11sku ME11pch _me _metmp mfs TBFW_url_bkup TBFW_url vfile \
+    TBFW_hash TBFW_size hashfile xchanged EC_url_bkup cbdir`"
 
 download()
 {

From 2bbf2ae80b79ec6c6376d4606b48b0e4100d772b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 11 May 2025 00:52:47 +0100
Subject: [PATCH 1420/1549] inject.sh: simplified serprog check

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index d3ea78f7..9963150f 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -75,10 +75,7 @@ check_release()
 
 check_target()
 {
-	if [ "$board" = "serprog_rp2040" ] || [ "$board" = "serprog_stm32" ] \
-	    || [ "$board" = "serprog_pico" ]; then
-		return 1
-	fi
+	[ "$board" = "${board#serprog_}" ] || return 1
 	boarddir="$cbcfgsdir/$board"
 
 	eval "`setcfg "$boarddir/target.cfg"`"

From a449afb287f34e23e98a74011dd655357dc4a085 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 11 May 2025 00:56:28 +0100
Subject: [PATCH 1421/1549] inject.sh: only compile nvmutil if needed

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 9963150f..890ac275 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -39,9 +39,6 @@ inject()
 	esac
 	[ "$new_mac" = "keep" ] && new_mac=""
 
-	[ -n "$new_mac" ] && [ "$new_mac" != "restore" ] && \
-		x_ make -C util/nvmutil clean && x_ make -C util/nvmutil
-
 	check_release
 	check_target && patch_release
 
@@ -124,6 +121,7 @@ modify_mac()
 {
 	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "$xbmklocal/gbe"
 	[ -n "$new_mac" ] && [ "$new_mac" != "restore" ] && \
+	    x_ make -C util/nvmutil clean && x_ make -C util/nvmutil && \
 	    x_ "$nvm" "$xbmklocal/gbe" setmac "$new_mac"
 
 	fx_ newmac x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"

From 0911a5a5aed9232f8f9d1685e0a12378f21e41fe Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 13:13:13 +0100
Subject: [PATCH 1422/1549] lib.sh: split up xbmkget()

it was too complicated. most of the logic has been moved
to a new function, try_file()

the for loop is handled by xbmkget(), whereas each try
is now handled in try_file()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 52 +++++++++++++++++++++++++-------------------------
 1 file changed, 26 insertions(+), 26 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 2f87e8b1..c69825e8 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -50,34 +50,34 @@ xbmkget()
 	_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
 
 	_dlop="curl" && [ $# -gt 4 ] && _dlop="$5"
-	cached="$XBMK_CACHE/file/$4"
-	dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum
-	bad_checksum "$4" "$cached" 2>/dev/null && dl_fail="y"
-	[ "$dl_fail" = "n" ] && e "$3" f && return 0
 	x_ mkdir -p "${3%/*}" "$XBMK_CACHE/file"
 	for url in "$1" "$2"; do
-		[ "$dl_fail" = "n" ] && break
-		[ -z "$url" ] && continue
-		x_ rm -f "$cached"
-		if [ "$_dlop" = "curl" ]; then
-			curl --location --retry 3 -A "$_ua" "$url" \
-			    -o "$cached" || wget --tries 3 -U "$_ua" "$url" \
-			    -O "$cached" || continue
-		elif [ "$_dlop" = "copy" ]; then
-			[ -L "$url" ] && \
-				printf "dl %s %s %s %s: '%s' is a symlink\n" \
-				    "$1" "$2" "$3" "$4" "$url" 1>&2 && continue
-			[ ! -f "$url" ] && \
-				printf "dl %s %s %s %s: '%s' not a file\n" \
-				    "$1" "$2" "$3" "$4" "$url" 1>&2 && continue
-			cp "$url" "$cached" || continue
-		else
-			err "$1 $2 $3 $4: Unsupported dlop type: '$_dlop'"
-		fi
-		bad_checksum "$4" "$cached" || dl_fail="n"
-	done
-	[ "$dl_fail" = "y" ] && err "$1 $2 $3 $4: not downloaded"
-	[ "$cached" = "$3" ] || x_ cp "$cached" "$3"; :
+		[ -n "$url" ] && try_file "$url" "$_dlop" "$@" && return 0
+	done && err "$1 $2 $3 $4: not downloaded"; :
+}
+
+try_file()
+{
+	cached="$XBMK_CACHE/file/$6"
+	dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum
+	bad_checksum "$6" "$cached" 2>/dev/null && dl_fail="y"
+	[ "$dl_fail" = "n" ] && e "$5" f && return 0
+
+	x_ rm -f "$cached"
+	if [ "$2" = "curl" ]; then
+		curl --location --retry 3 -A "$_ua" "$1" -o "$cached" || \
+		    wget --tries 3 -U "$_ua" "$1" -O "$cached" || return 1
+	elif [ "$2" = "copy" ]; then
+		[ -L "$1" ] && printf "dl %s %s %s %s: '%s' is a symlink\n" \
+		    "$3" "$4" "$5" "$6" "$1" 1>&2 && return 1
+		[ ! -f "$1" ] && printf "dl %s %s %s %s: '%s' not a file\n" \
+		    "$3" "$4" "$5" "$6" "$1" 1>&2 && return 1
+		cp "$1" "$cached" || return 1
+	else
+		err "$3 $4 $5 $6: Unsupported dlop type: '$2'"
+	fi
+	bad_checksum "$6" "$cached" && return 1
+	[ "$cached" = "$5" ] || x_ cp "$cached" "$5"; :
 }
 
 bad_checksum()

From 3879f6c4d8ff89b390ff64afbcec66ea17f41123 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 13:21:59 +0100
Subject: [PATCH 1423/1549] lib.sh: use fx_ in rmgit()

with fx_, i have more much granular control over
how errors are handled.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index c69825e8..c0adc7a6 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -39,8 +39,8 @@ mksha512sum()
 
 rmgit()
 {
-	x_ find "$1" -name ".git" -exec rm -Rf {} +
-	x_ find "$1" -name ".gitmodules" -exec rm -Rf {} +
+	fx_ "x_ rm -Rf" x_ find "$1" -name ".git"
+	fx_ "x_ rm -Rf" x_ find "$1" -name ".gitmodules"
 }
 
 # can grab from the internet, or copy locally.

From 57f896ac016f50db3f3af1ba4be48b4c256deacd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 14:23:32 +0100
Subject: [PATCH 1424/1549] vendor.sh: simplify setvfile()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 89e352a7..bca51496 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -216,9 +216,8 @@ extract_fsp()
 setvfile()
 {
 	[ -n "$vcfg" ] && check_vcfg && for c in $cvchk; do
-		eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
-		eval "[ -z \"\${$c}\" ] && continue"
-		getvfile "$@" && return 0
+		vcmd="[ \"\${$c}\" != \"/dev/null\" ] && [ -n \"\${$c}\" ]"
+		eval "$vcmd && getvfile \"\$@\" && return 0"
 	done && return 1; :
 }
 

From 97d4d020d97eb8f9fde598c768d1bc19a847bc34 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 14:30:27 +0100
Subject: [PATCH 1425/1549] vendor.sh: simplify getvfile()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index bca51496..cd3a10d5 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -230,14 +230,8 @@ check_vcfg()
 
 getvfile()
 {
-	# valid vcfg. proceed to download files
 	eval "`setcfg "$vfile"`"
-
-	bootstrap
-
-	[ $# -gt 0 ] && getfiles
-	[ $# -gt 0 ] && return 0 # download
-
+	bootstrap && [ $# -gt 0 ] && getfiles && return 0 # download
 	fx_ prep x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 	( check_vendor_hashes ) || err "$archive: Can't verify hashes"; :
 }

From 76f81697e6e9a6f8ec7cb121cb6bc58f41bdf443 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 14:47:43 +0100
Subject: [PATCH 1426/1549] vendor.sh: remove check_vcfg()

We don't need it. The vfile variable is only used in
one place, and only once, for use with setcfg.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 15 ++++-----------
 1 file changed, 4 insertions(+), 11 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index cd3a10d5..259a25ba 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -39,8 +39,8 @@ eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     E6400_VGA_romname SCH5545EC_DL_url_bkup SCH5545EC_DL_hash _dest mecleaner \
     kbc1126_ec_dump MRC_refcode_cbtree _dl SCH5545EC_DL_url EC_url rom DL_url \
     nukemode cbfstoolref FSPFD_hash _7ztest ME11bootguard ME11delta xromsize \
-    ME11version ME11sku ME11pch _me _metmp mfs TBFW_url_bkup TBFW_url vfile \
-    TBFW_hash TBFW_size hashfile xchanged EC_url_bkup cbdir`"
+    ME11version ME11sku ME11pch _me _metmp mfs TBFW_url_bkup TBFW_url cbdir \
+    TBFW_hash TBFW_size hashfile xchanged EC_url_bkup`"
 
 download()
 {
@@ -215,22 +215,15 @@ extract_fsp()
 
 setvfile()
 {
-	[ -n "$vcfg" ] && check_vcfg && for c in $cvchk; do
+	[ -n "$vcfg" ] && for c in $cvchk; do
 		vcmd="[ \"\${$c}\" != \"/dev/null\" ] && [ -n \"\${$c}\" ]"
 		eval "$vcmd && getvfile \"\$@\" && return 0"
 	done && return 1; :
 }
 
-check_vcfg()
-{
-	vfile="config/vendor/$vcfg/pkg.cfg"
-	[ -L "$vfile" ] && err "'$archive', '$board': $vfile is a symlink"; :
-	[ -f "$vfile" ] || err "'$archive', '$board': $vfile missing"; :
-}
-
 getvfile()
 {
-	eval "`setcfg "$vfile"`"
+	eval "`setcfg "config/vendor/$vcfg/pkg.cfg" 1`"
 	bootstrap && [ $# -gt 0 ] && getfiles && return 0 # download
 	fx_ prep x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 	( check_vendor_hashes ) || err "$archive: Can't verify hashes"; :

From 311ae2f8df28e69ffbf26ff63f7bf70070c225b5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 14:49:14 +0100
Subject: [PATCH 1427/1549] inject.sh: define xchanged here instead

this is used here, and also needed in cbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 2 +-
 include/vendor.sh | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index 890ac275..a17ed19c 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -14,7 +14,7 @@ cv="CONFIG_GBE_BIN_PATH"
 [ -n "$cvchk" ] && cv="$cv $cvchk"
 
 eval "`setvars "" archive boarddir IFD_platform ifdprefix tree new_mac \
-    tmpromdir board $cv`"
+    tmpromdir board xchanged $cv`"
 
 inject()
 {
diff --git a/include/vendor.sh b/include/vendor.sh
index 259a25ba..4374277a 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -40,7 +40,7 @@ eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     kbc1126_ec_dump MRC_refcode_cbtree _dl SCH5545EC_DL_url EC_url rom DL_url \
     nukemode cbfstoolref FSPFD_hash _7ztest ME11bootguard ME11delta xromsize \
     ME11version ME11sku ME11pch _me _metmp mfs TBFW_url_bkup TBFW_url cbdir \
-    TBFW_hash TBFW_size hashfile xchanged EC_url_bkup`"
+    TBFW_hash TBFW_size hashfile EC_url_bkup`"
 
 download()
 {

From ef800b652c8fe1e69e8faa338489638c08d30de5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 14:52:27 +0100
Subject: [PATCH 1428/1549] inject.sh: remove the hashfiles variable

we only use it once, and it's a trivial string

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index a17ed19c..d4d20568 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -4,7 +4,6 @@
 # Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org>
 
 cbcfgsdir="config/coreboot"
-hashfiles="vendorhashes blobhashes" # blobhashes for backwards compatibility
 tmpromdel="$XBMK_CACHE/DO_NOT_FLASH"
 nvm="util/nvmutil/nvm"
 ifdtool="elf/ifdtool/default/ifdtool"
@@ -92,7 +91,7 @@ patch_release()
 	remkdir "${tmpromdir%"/bin/$board"}"
 	x_ tar -xf "$archive" -C "${tmpromdir%"/bin/$board"}"
 
-	for _hashes in $hashfiles; do
+	for _hashes in "vendorhashes" "blobhashes"; do
 		e "$tmpromdir/$_hashes" f && \
 		    has_hashes="y" && hashfile="$_hashes" && break; :
 	done

From 40163dcfa4e29d9ce15f5537d03a2ae3b657cdf8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 15:05:21 +0100
Subject: [PATCH 1429/1549] mrc.sh: update copyright year to include 2025

I've made several modifications to the file, this year.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/mrc.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/mrc.sh b/include/mrc.sh
index 3b3089fc..55cc6a76 100644
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 # Logic based on util/chromeos/crosfirmware.sh in coreboot cfc26ce278.
-# Modifications in this version are Copyright 2021, 2023 and 2024 Leah Rowe.
+# Modifications in this version are Copyright 2021,2023-2025 Leah Rowe.
 # Original copyright detailed in repo: https://review.coreboot.org/coreboot/
 
 eval "`setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL`"

From 308a9ab1e17e3c3fd5acbbe95d7f2c598344870b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 15:06:25 +0100
Subject: [PATCH 1430/1549] mrc.sh: minor cleanup

group the cbfs command to the extract command, since they
are related. this makes it clearer that the following
command to extract refcode is unrelated.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/mrc.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/mrc.sh b/include/mrc.sh
index 55cc6a76..70c3bd3c 100644
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -9,7 +9,6 @@ eval "`setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL`"
 extract_mrc()
 {
 	extract_shellball
-
 	x_ "$cbfstool" "$appdir/"bios.bin extract -n mrc.bin \
 	    -f "$_dest" -r RO_SECTION
 

From 89cd828e87c8a98e37f689adafa32d0f2d404c39 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 15:32:50 +0100
Subject: [PATCH 1431/1549] lib.sh: move _ua to try_file()

it's only used there

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index c0adc7a6..32f81cd0 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -47,8 +47,6 @@ rmgit()
 # if copying locally, it can only copy a file.
 xbmkget()
 {
-	_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
-
 	_dlop="curl" && [ $# -gt 4 ] && _dlop="$5"
 	x_ mkdir -p "${3%/*}" "$XBMK_CACHE/file"
 	for url in "$1" "$2"; do
@@ -58,6 +56,8 @@ xbmkget()
 
 try_file()
 {
+	_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
+
 	cached="$XBMK_CACHE/file/$6"
 	dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum
 	bad_checksum "$6" "$cached" 2>/dev/null && dl_fail="y"

From 80f0562e8d1d0de4715bdcbdab52440302fd1c44 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 15:44:31 +0100
Subject: [PATCH 1432/1549] lib.sh: split up try_file()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 35 +++++++++++++++++++++--------------
 1 file changed, 21 insertions(+), 14 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 32f81cd0..fc26c733 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -56,30 +56,37 @@ xbmkget()
 
 try_file()
 {
-	_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
-
 	cached="$XBMK_CACHE/file/$6"
 	dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum
 	bad_checksum "$6" "$cached" 2>/dev/null && dl_fail="y"
 	[ "$dl_fail" = "n" ] && e "$5" f && return 0
 
 	x_ rm -f "$cached"
-	if [ "$2" = "curl" ]; then
-		curl --location --retry 3 -A "$_ua" "$1" -o "$cached" || \
-		    wget --tries 3 -U "$_ua" "$1" -O "$cached" || return 1
-	elif [ "$2" = "copy" ]; then
-		[ -L "$1" ] && printf "dl %s %s %s %s: '%s' is a symlink\n" \
-		    "$3" "$4" "$5" "$6" "$1" 1>&2 && return 1
-		[ ! -f "$1" ] && printf "dl %s %s %s %s: '%s' not a file\n" \
-		    "$3" "$4" "$5" "$6" "$1" 1>&2 && return 1
-		cp "$1" "$cached" || return 1
-	else
-		err "$3 $4 $5 $6: Unsupported dlop type: '$2'"
-	fi
+	[ "$2" = "curl" ] || [ "$2" = "copy" ] || \
+	    err "$3 $4 $5 $6: Unsupported dlop type: '$2'"
+
+	try_$2 "$cached" "$@" || return 1
+
 	bad_checksum "$6" "$cached" && return 1
 	[ "$cached" = "$5" ] || x_ cp "$cached" "$5"; :
 }
 
+try_curl()
+{
+	_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
+	curl --location --retry 3 -A "$_ua" "$2" -o "$1" || \
+	    wget --tries 3 -U "$_ua" "$2" -O "$1" || return 1; :
+}
+
+try_copy()
+{
+	[ -L "$2" ] && printf "dl %s %s %s %s: '%s' is a symlink\n" \
+	    "$4" "$5" "$6" "$7" "$2" 1>&2 && return 1
+	[ ! -f "$2" ] && printf "dl %s %s %s %s: '%s' not a file\n" \
+	    "$4" "$5" "$6" "$7" "$2" 1>&2 && return 1
+	cp "$2" "$1" || return 1; :
+}
+
 bad_checksum()
 {
 	[ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] || return 1

From 23913bb8d2aa80452c381086b7513587badcd1e4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 16:20:34 +0100
Subject: [PATCH 1433/1549] lib.sh: move mksha512sum() to vendor.sh

this is unused in cbmk.

it's only used from vendor.sh.

therefore, lbmk shall have it in vendor.sh.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh    | 8 --------
 include/vendor.sh | 8 ++++++++
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index fc26c733..d5607c61 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -29,14 +29,6 @@ mktarball()
 	x_ tar -c "$1" | xz -T$XBMK_THREADS -9e > "$2" || err "mktarball2, $1"
 }
 
-mksha512sum()
-{
-	(
-	[ "${1%/*}" != "$1" ] && x_ cd "${1%/*}"
-	sha512sum ./"${1##*/}" >> "$2" || err "!sha512sum \"$1\" > \"$2\""
-	) || err "failed to create tarball checksum"
-}
-
 rmgit()
 {
 	fx_ "x_ rm -Rf" x_ find "$1" -name ".git"
diff --git a/include/vendor.sh b/include/vendor.sh
index 4374277a..73f2592c 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -277,6 +277,14 @@ prep()
 	x_ rm -f "$_xrom"
 }
 
+mksha512sum()
+{
+	(
+	[ "${1%/*}" != "$1" ] && x_ cd "${1%/*}"
+	sha512sum ./"${1##*/}" >> "$2" || err "!sha512sum \"$1\" > \"$2\""
+	) || err "failed to create tarball checksum"
+}
+
 add_vfiles()
 {
 	rom="$1"

From c9696e233389f1f896dc70076cfc03f14f8a940a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 16:30:05 +0100
Subject: [PATCH 1434/1549] lib.sh: move xbmkget() to git.sh

in cbmk, it's only used from there.

in lbmk, it's also used from vendor.sh.

however, i plan to further expand git.sh at
some point, tidying it up so that git cloning
is also done from xbmkget, with dlop=git and
git.sh would then be renamed to get.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++
 include/lib.sh | 50 --------------------------------------------------
 mk             |  2 +-
 3 files changed, 51 insertions(+), 51 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index bbc5140e..b65bd196 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -87,6 +87,56 @@ fetch_submodule()
 	    "$mdir/${1##*/}/patches"
 }
 
+# can grab from the internet, or copy locally.
+# if copying locally, it can only copy a file.
+xbmkget()
+{
+	_dlop="curl" && [ $# -gt 4 ] && _dlop="$5"
+	x_ mkdir -p "${3%/*}" "$XBMK_CACHE/file"
+	for url in "$1" "$2"; do
+		[ -n "$url" ] && try_file "$url" "$_dlop" "$@" && return 0
+	done && err "$1 $2 $3 $4: not downloaded"; :
+}
+
+try_file()
+{
+	cached="$XBMK_CACHE/file/$6"
+	dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum
+	bad_checksum "$6" "$cached" 2>/dev/null && dl_fail="y"
+	[ "$dl_fail" = "n" ] && e "$5" f && return 0
+
+	x_ rm -f "$cached"
+	[ "$2" = "curl" ] || [ "$2" = "copy" ] || \
+	    err "$3 $4 $5 $6: Unsupported dlop type: '$2'"
+
+	try_$2 "$cached" "$@" || return 1
+
+	bad_checksum "$6" "$cached" && return 1
+	[ "$cached" = "$5" ] || x_ cp "$cached" "$5"; :
+}
+
+try_curl()
+{
+	_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
+	curl --location --retry 3 -A "$_ua" "$2" -o "$1" || \
+	    wget --tries 3 -U "$_ua" "$2" -O "$1" || return 1; :
+}
+
+try_copy()
+{
+	[ -L "$2" ] && printf "dl %s %s %s %s: '%s' is a symlink\n" \
+	    "$4" "$5" "$6" "$7" "$2" 1>&2 && return 1
+	[ ! -f "$2" ] && printf "dl %s %s %s %s: '%s' not a file\n" \
+	    "$4" "$5" "$6" "$7" "$2" 1>&2 && return 1
+	cp "$2" "$1" || return 1; :
+}
+
+bad_checksum()
+{
+	[ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] || return 1
+	printf "Bad checksum for file: %s\n" "$2" 1>&2; rm -f "$2" || :; :
+}
+
 tmpclone()
 {
 	[ -d "$3" ] && return 0
diff --git a/include/lib.sh b/include/lib.sh
index d5607c61..ba7d5d8c 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -35,56 +35,6 @@ rmgit()
 	fx_ "x_ rm -Rf" x_ find "$1" -name ".gitmodules"
 }
 
-# can grab from the internet, or copy locally.
-# if copying locally, it can only copy a file.
-xbmkget()
-{
-	_dlop="curl" && [ $# -gt 4 ] && _dlop="$5"
-	x_ mkdir -p "${3%/*}" "$XBMK_CACHE/file"
-	for url in "$1" "$2"; do
-		[ -n "$url" ] && try_file "$url" "$_dlop" "$@" && return 0
-	done && err "$1 $2 $3 $4: not downloaded"; :
-}
-
-try_file()
-{
-	cached="$XBMK_CACHE/file/$6"
-	dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum
-	bad_checksum "$6" "$cached" 2>/dev/null && dl_fail="y"
-	[ "$dl_fail" = "n" ] && e "$5" f && return 0
-
-	x_ rm -f "$cached"
-	[ "$2" = "curl" ] || [ "$2" = "copy" ] || \
-	    err "$3 $4 $5 $6: Unsupported dlop type: '$2'"
-
-	try_$2 "$cached" "$@" || return 1
-
-	bad_checksum "$6" "$cached" && return 1
-	[ "$cached" = "$5" ] || x_ cp "$cached" "$5"; :
-}
-
-try_curl()
-{
-	_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
-	curl --location --retry 3 -A "$_ua" "$2" -o "$1" || \
-	    wget --tries 3 -U "$_ua" "$2" -O "$1" || return 1; :
-}
-
-try_copy()
-{
-	[ -L "$2" ] && printf "dl %s %s %s %s: '%s' is a symlink\n" \
-	    "$4" "$5" "$6" "$7" "$2" 1>&2 && return 1
-	[ ! -f "$2" ] && printf "dl %s %s %s %s: '%s' not a file\n" \
-	    "$4" "$5" "$6" "$7" "$2" 1>&2 && return 1
-	cp "$2" "$1" || return 1; :
-}
-
-bad_checksum()
-{
-	[ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] || return 1
-	printf "Bad checksum for file: %s\n" "$2" 1>&2; rm -f "$2" || :; :
-}
-
 e()
 {
 	es_t="e" && [ $# -gt 1 ] && es_t="$2"
diff --git a/mk b/mk
index b56b7444..f22d3b09 100755
--- a/mk
+++ b/mk
@@ -17,6 +17,7 @@ fi
 . "include/mrc.sh"
 . "include/rom.sh"
 . "include/release.sh"
+. "include/git.sh"
 
 main()
 {
@@ -34,7 +35,6 @@ main()
 
 main "$@" || exit 0
 
-. "include/git.sh"
 . "include/tree.sh"
 
 trees "$@" || exit 0

From 05b5914b35492ddb4076873e0b6519396dfe92de Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 18:01:53 +0100
Subject: [PATCH 1435/1549] lib.sh: remove mk()

i don't need it. i can use fx_ instead, on functions
that previously called mk().

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh     | 8 --------
 include/release.sh | 3 ++-
 include/tree.sh    | 6 ++----
 include/vendor.sh  | 2 +-
 4 files changed, 5 insertions(+), 14 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index ba7d5d8c..cb3ba6cc 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -46,14 +46,6 @@ e()
 	printf "%s %s\n" "$1" "$es2" 1>&2
 }
 
-mk()
-{
-	mk_flag="$1" || err "No argument given"
-	shift 1 && for mk_arg in "$@"; do
-		x_ ./mk $mk_flag $mk_arg
-	done; :
-}
-
 setvars()
 {
 	_setvars=""
diff --git a/include/release.sh b/include/release.sh
index 4741b44a..0afb777f 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -55,7 +55,8 @@ build_release()
 	(
 	x_ cd "$relsrcdir"
 	x_ ./mk -d coreboot
-	mk -b coreboot pico-serprog stm32-vserprog pcsx-redux
+	fx_ "x_ ./mk -b" printf \
+	    "coreboot\npico-serprog\nstm32-vserprog\npcsx-redux\n"
 
 	fx_ mkrom_tarball x_ find bin -maxdepth 1 -type d -name "serprog_*"
 	x_ mv bin ../roms
diff --git a/include/tree.sh b/include/tree.sh
index d4585b92..f44b39cc 100644
--- a/include/tree.sh
+++ b/include/tree.sh
@@ -39,13 +39,11 @@ trees()
 		fi
 
 		project="${OPTARG#src/}"
+		project="${project#config/git/}"
 		shift 2
 	done
 	[ -z "$_f" ] && err "missing flag ($flags)"
-	if [ -z "$project" ]; then
-		mk $_f $(ls -1 config/git)
-		return 1
-	fi
+	[ -z "$project" ] && fx_ "x_ ./mk $_f" x_ ls -1 config/git && return 1
 
 	[ -f "config/git/$project/pkg.cfg" ] || \
 	    err "config/git/$project/pkg.cfg missing"
diff --git a/include/vendor.sh b/include/vendor.sh
index 73f2592c..fb49cca5 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -238,7 +238,7 @@ bootstrap()
 	rmodtool="elf/cbfstool/$tree/rmodtool"
 
 	x_ ./mk -f coreboot "${cbdir##*/}"
-	mk -b uefitool biosutilities bios_extract
+	fx_ "x_ ./mk -b" printf "uefitool\nbiosutilities\nbios_extract\n"
 	[ -d "${kbc1126_ec_dump%/*}" ] && x_ make -C "$cbdir/util/kbc1126"
 	[ -n "$MRC_refcode_cbtree" ] && \
 	    cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \

From 92954eeb38f69ebc0cfef7b9629e96a1599667be Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 19:20:50 +0100
Subject: [PATCH 1436/1549] lib.sh: remove rmgit()

We don't need to call it from git.sh, because it's
only being done when building a release anyway,
and we already run rmgit when doing a release.

The function itself is only two simple fx_ calls,
so we can just do that from build_release().

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh     | 3 ---
 include/lib.sh     | 6 ------
 include/release.sh | 3 ++-
 3 files changed, 2 insertions(+), 10 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index b65bd196..0091c832 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -57,9 +57,6 @@ git_prep()
 		dx_ fetch_submodule "$mdir/module.list"
 	fi
 
-	[ "$_loc" != "$XBMK_CACHE/repo/$project" ] && \
-	    [ "$XBMK_RELEASE" = "y" ] && rmgit "$tmpgit"
-
 	[ "$_loc" = "${_loc%/*}" ] || x_ mkdir -p "${_loc%/*}"
 	x_ mv "$tmpgit" "$_loc"
 }
diff --git a/include/lib.sh b/include/lib.sh
index cb3ba6cc..cf4305a1 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -29,12 +29,6 @@ mktarball()
 	x_ tar -c "$1" | xz -T$XBMK_THREADS -9e > "$2" || err "mktarball2, $1"
 }
 
-rmgit()
-{
-	fx_ "x_ rm -Rf" x_ find "$1" -name ".git"
-	fx_ "x_ rm -Rf" x_ find "$1" -name ".gitmodules"
-}
-
 e()
 {
 	es_t="e" && [ $# -gt 1 ] && es_t="$2"
diff --git a/include/release.sh b/include/release.sh
index 0afb777f..be221d19 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -37,7 +37,8 @@ build_release()
 	x_ cd "$relsrcdir"
 
 	x_ ./mk -f
-	rmgit .
+	fx_ "x_ rm -Rf" x_ find . -name ".git"
+	fx_ "x_ rm -Rf" x_ find . -name ".gitmodules"
 	x_ mv src/docs docs
 	) || err "can't create release files"
 

From c85aff5c54e8a2b0b649882b555e704bded268a9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 19:29:58 +0100
Subject: [PATCH 1437/1549] release.sh: delete tmp/cache from the tarball

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/release.sh b/include/release.sh
index be221d19..ecff57b3 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -45,6 +45,7 @@ build_release()
 	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
 	    --abbrev-commit > "$relsrcdir/CHANGELOG" || err "!log $relsrcdir"
 	x_ rm -f "$relsrcdir/lock"
+	x_ rm -Rf "$relsrcdir/cache" "$relsrcdir/tmp"
 
 	(
 	x_ cd "${relsrcdir%/*}"

From f4871da9bca612fc2bcafaedc6b023863c411829 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 19:49:50 +0100
Subject: [PATCH 1438/1549] release.sh: split up build_release()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 31 ++++++++++++++++++-------------
 1 file changed, 18 insertions(+), 13 deletions(-)

diff --git a/include/release.sh b/include/release.sh
index ecff57b3..05e872d5 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -24,45 +24,50 @@ release()
 	[ -e "$vdir" ] && err "already exists: \"$vdir\""
 	x_ mkdir -p "$vdir"
 	x_ git clone . "$relsrcdir"
-	x_ touch "$relsrcdir/lock"
 
-	build_release
+	prep_release src
+	prep_release_tarball
+	[ "$relmode" = "src" ] || prep_release bin
+	x_ rm -Rf "$relsrcdir"
 
 	printf "\n\nDONE! Check release files under %s\n" "$vdir"
 }
 
-build_release()
+prep_release()
 {
+	x_ touch "$relsrcdir/lock"
 	(
 	x_ cd "$relsrcdir"
+	prep_release_$1
+	) || err "can't prep release $1"
+}
 
+prep_release_src()
+{
 	x_ ./mk -f
 	fx_ "x_ rm -Rf" x_ find . -name ".git"
 	fx_ "x_ rm -Rf" x_ find . -name ".gitmodules"
 	x_ mv src/docs docs
-	) || err "can't create release files"
+}
 
+prep_release_tarball()
+{
 	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
 	    --abbrev-commit > "$relsrcdir/CHANGELOG" || err "!log $relsrcdir"
 	x_ rm -f "$relsrcdir/lock"
 	x_ rm -Rf "$relsrcdir/cache" "$relsrcdir/tmp"
-
 	(
 	x_ cd "${relsrcdir%/*}"
 	x_ mktarball "${relsrcdir##*/}" "${relsrcdir##*/}.tar.xz"
-	) || err "can't create src tarball"
-	[ "$relmode" = "src" ] && return 0
+	) || err "can't create src tarball"; :
+}
 
-	x_ touch "$relsrcdir/lock"
-	(
-	x_ cd "$relsrcdir"
+prep_release_bin()
+{
 	x_ ./mk -d coreboot
 	fx_ "x_ ./mk -b" printf \
 	    "coreboot\npico-serprog\nstm32-vserprog\npcsx-redux\n"
 
 	fx_ mkrom_tarball x_ find bin -maxdepth 1 -type d -name "serprog_*"
 	x_ mv bin ../roms
-	) || err "can't build rom images"
-
-	x_ rm -Rf "$relsrcdir"
 }

From a0105e1ab44f9021d8a89f9932ea3a53e4a02eeb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 20:07:50 +0100
Subject: [PATCH 1439/1549] release.sh: remove unnecessary mkdir command

the following git clone command creates that directory

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/release.sh b/include/release.sh
index 05e872d5..640391f8 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -22,7 +22,7 @@ release()
 	relsrcdir="$vdir/$src_dirname"
 
 	[ -e "$vdir" ] && err "already exists: \"$vdir\""
-	x_ mkdir -p "$vdir"
+
 	x_ git clone . "$relsrcdir"
 
 	prep_release src

From 6d3a6347c3ee93f674f129ffe1b9120741b34b00 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 20:23:41 +0100
Subject: [PATCH 1440/1549] release.sh: build in tmp directory first

don't move to the real directory until the work
is done.

that way, a re-try can be done, while analysing
the old files. it is created based on the tmpdir,
under XBMK_CACHE/

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 21 ++++++++++++++-------
 1 file changed, 14 insertions(+), 7 deletions(-)

diff --git a/include/release.sh b/include/release.sh
index 640391f8..eb0d58d8 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -1,28 +1,32 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 # Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org>
 
-eval "`setvars "" vdir src_dirname relsrcdir relmode`"
+eval "`setvars "" reldir reldest vdir src_dirname relsrcdir relmode`"
 
 release()
 {
 	export XBMK_RELEASE="y"
 
-	vdir="release"
+	reldir="release"
+
 	while getopts d:m: option; do
 		[ -z "$OPTARG" ] && err "empty argument not allowed"
 		case "$option" in
-		d) vdir="$OPTARG" ;;
+		d) reldir="$OPTARG" ;;
 		m) relmode="$OPTARG" ;;
 		*) err "invalid option '-$option'" ;;
 		esac
 	done
 
-	vdir="$vdir/$version"
+	reldest="$reldir/$version"
+	[ -e "$reldest" ] && \
+	    err "already exists: \"$reldest\""
+
+	vdir="$XBMK_CACHE/relpwd/${xbmktmp##*/}/$version"
 	src_dirname="${relname}_src"
 	relsrcdir="$vdir/$src_dirname"
 
-	[ -e "$vdir" ] && err "already exists: \"$vdir\""
-
+	remkdir "$vdir"
 	x_ git clone . "$relsrcdir"
 
 	prep_release src
@@ -30,7 +34,10 @@ release()
 	[ "$relmode" = "src" ] || prep_release bin
 	x_ rm -Rf "$relsrcdir"
 
-	printf "\n\nDONE! Check release files under %s\n" "$vdir"
+	x_ mkdir -p "$reldir"
+	x_ mv "$vdir" "$reldir"
+
+	printf "\n\nDONE! Check release files under %s\n" "$reldest"
 }
 
 prep_release()

From d4c0479093ab33a3909d4408ad17ca740e0436a5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 20:25:03 +0100
Subject: [PATCH 1441/1549] release.sh: remove src_dirname variable

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/release.sh b/include/release.sh
index eb0d58d8..f34eb6df 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 # Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org>
 
-eval "`setvars "" reldir reldest vdir src_dirname relsrcdir relmode`"
+eval "`setvars "" reldir reldest vdir relsrcdir relmode`"
 
 release()
 {
@@ -23,8 +23,7 @@ release()
 	    err "already exists: \"$reldest\""
 
 	vdir="$XBMK_CACHE/relpwd/${xbmktmp##*/}/$version"
-	src_dirname="${relname}_src"
-	relsrcdir="$vdir/$src_dirname"
+	relsrcdir="$vdir/${relname}_src"
 
 	remkdir "$vdir"
 	x_ git clone . "$relsrcdir"

From 66f7ecdb2d7ef03c56bf50171911a66c92b8238a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 21:04:48 +0100
Subject: [PATCH 1442/1549] release.sh: clean up the vdir after release

do this after moving the version directory within it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/release.sh b/include/release.sh
index f34eb6df..9046acbf 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -35,6 +35,7 @@ release()
 
 	x_ mkdir -p "$reldir"
 	x_ mv "$vdir" "$reldir"
+	x_ rm -Rf "${vdir%"/$version"}"
 
 	printf "\n\nDONE! Check release files under %s\n" "$reldest"
 }

From 6bf24221e60cfcc21bef445274973570ace436c5 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 21:11:34 +0100
Subject: [PATCH 1443/1549] release.sh: simplify release()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/include/release.sh b/include/release.sh
index 9046acbf..fbcc5621 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -28,9 +28,7 @@ release()
 	remkdir "$vdir"
 	x_ git clone . "$relsrcdir"
 
-	prep_release src
-	prep_release_tarball
-	[ "$relmode" = "src" ] || prep_release bin
+	fx_ prep_release printf "src\ntarball\nbin\n"
 	x_ rm -Rf "$relsrcdir"
 
 	x_ mkdir -p "$reldir"
@@ -44,7 +42,7 @@ prep_release()
 {
 	x_ touch "$relsrcdir/lock"
 	(
-	x_ cd "$relsrcdir"
+	[ "$1" = "tarball" ] || x_ cd "$relsrcdir"
 	prep_release_$1
 	) || err "can't prep release $1"
 }
@@ -71,6 +69,7 @@ prep_release_tarball()
 
 prep_release_bin()
 {
+	[ "$relmode" = "src" ] && return 0
 	x_ ./mk -d coreboot
 	fx_ "x_ ./mk -b" printf \
 	    "coreboot\npico-serprog\nstm32-vserprog\npcsx-redux\n"

From e38805a9448af8445370d4f5fbdbbb185dcbe6e8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 12 May 2025 21:29:38 +0100
Subject: [PATCH 1444/1549] rom.sh: reduce indendation in check_coreboot_utils

call it via fx_, instead of using a for loop

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 34 ++++++++++++++++------------------
 1 file changed, 16 insertions(+), 18 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index fdd0787f..65900a01 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -44,7 +44,7 @@ mkpayload_grub()
 mkvendorfiles()
 {
 	[ -z "$mode" ] && $dry cook_coreboot_config
-	check_coreboot_utils "$tree"
+	fx_ check_coreboot_util printf "cbfstool\nifdtool\n"
 	printf "%s\n" "${version%%-*}" > "$srcdir/.coreboot-version" || \
 	    err "!mk $srcdir .coreboot-version"
 	[ -z "$mode" ] && [ "$target" != "$tree" ] && \
@@ -59,26 +59,24 @@ cook_coreboot_config()
 	make -C "$srcdir" oldconfig || err "Could not cook $srcdir/.config"; :
 }
 
-check_coreboot_utils()
+check_coreboot_util()
 {
-	for util in cbfstool ifdtool; do
-		[ "$badhash" = "y" ] && x_ rm -f "elf/$util/$1/$util"
-		e "elf/$util/$1/$util" f && continue
+	[ "$badhash" = "y" ] && x_ rm -f "elf/$1/$tree/$1"
+	e "elf/$1/$tree/$1" f && return 0
 
-		utilelfdir="elf/$util/$1"
-		utilsrcdir="src/coreboot/$1/util/$util"
+	utilelfdir="elf/$1/$tree"
+	utilsrcdir="src/coreboot/$tree/util/$1"
 
-		utilmode="" && [ -n "$mode" ] && utilmode="clean"
-		x_ make -C "$utilsrcdir" $utilmode -j$XBMK_THREADS $makeargs
-		if [ -z "$mode" ] && [ ! -f "$utilelfdir/$util" ]; then
-			x_ mkdir -p "$utilelfdir"
-			x_ cp "$utilsrcdir/$util" "$utilelfdir"
-			[ "$util" = "cbfstool" ] || continue
-			x_ cp "$utilsrcdir/rmodtool" "$utilelfdir"
-		elif [ -n "$mode" ]; then
-			x_ rm -Rf "$utilelfdir"
-		fi; :
-	done; :
+	utilmode="" && [ -n "$mode" ] && utilmode="clean"
+	x_ make -C "$utilsrcdir" $utilmode -j$XBMK_THREADS $makeargs
+	[ -n "$mode" ] && x_ rm -Rf "$utilelfdir" && return 0
+	[ -z "$mode" ] || return 0
+	[ -f "$utilelfdir/$1" ] && return 0
+
+	x_ mkdir -p "$utilelfdir"
+	x_ cp "$utilsrcdir/$1" "$utilelfdir"
+	[ "$1" = "cbfstool" ] || return 0
+	x_ cp "$utilsrcdir/rmodtool" "$utilelfdir"
 }
 
 mkcorebootbin()

From 1ca26c5d238d2acb85e491f949ff7cc369959bd9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 13 May 2025 18:41:48 +0100
Subject: [PATCH 1445/1549] git.sh: Re-implement redundant git downloads

And this time it works.

I'm now calling xbmkget() which in turn calls tmpclone(),
instead of me calling tmpclone() directly.

The git-pull is done on both remotes, regardless of whether
the first succeeds. This way, if I forgot to update a mirror,
downloads would probably still work.

This also fixes an issue people were having, for example where
the gnulib repository of GRUB was always being downloaded
every time.

I'm using a new directory, XBMK_CACHE/clone, instead
of XBMK_CACHE/repo (which I used before), in case people
still have the old caches from before.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 56 +++++++++++++++++++++++++++++++++-----------------
 1 file changed, 37 insertions(+), 19 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index 0091c832..af0e8f2a 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -12,7 +12,7 @@ fetch_targets()
 	e "src/$project/$tree" d && return 0
 
 	printf "Creating %s tree %s\n" "$project" "$tree"
-	git_prep "$loc" "$loc" "$xbmkpwd/$configdir/$tree/patches" \
+	git_prep "$url" "$bkup_url" "$xbmkpwd/$configdir/$tree/patches" \
 	    "src/$project/$tree" with_submodules
 	nuke "$project/$tree" "$project/$tree"
 }
@@ -42,6 +42,7 @@ clone_project()
 	    loc="src/$project"
 	printf "Downloading project '%s' to '%s'\n" "$project" "$loc"
 
+	singletree "$project" || x_ rm -Rf "$loc"
 	e "$loc" d missing && remkdir "${tmpgit%/*}" && git_prep \
 	    "$url" "$bkup_url" "$xbmkpwd/config/$project/patches" "$loc"; :
 }
@@ -52,7 +53,7 @@ git_prep()
 	_loc="$4" # $1 and $2 are gitrepo and gitrepo_backup
 
 	chkvars rev
-	tmpclone "$1" "$2" "$tmpgit" "$rev" "$_patchdir"
+	xbmkget "$1" "$2" "$tmpgit" "$rev" git "$_patchdir"
 	if singletree "$project" || [ $# -gt 4 ]; then
 		dx_ fetch_submodule "$mdir/module.list"
 	fi
@@ -80,7 +81,7 @@ fetch_submodule()
 	[ "$st" = "file" ] && xbmkget "$subfile" "$subfile_bkup" \
 	    "$tmpgit/$1" "$subhash" && return 0
 	x_ rm -Rf "$tmpgit/$1"
-	tmpclone "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subhash" \
+	xbmkget "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subhash" git \
 	    "$mdir/${1##*/}/patches"
 }
 
@@ -89,7 +90,9 @@ fetch_submodule()
 xbmkget()
 {
 	_dlop="curl" && [ $# -gt 4 ] && _dlop="$5"
-	x_ mkdir -p "${3%/*}" "$XBMK_CACHE/file"
+	[ "$_dlop" = "curl" ] || [ "$_dlop" = "copy" ] || \
+	    [ "$_dlop" = "git" ] || err "$1 $2 $3 $4: Bad dlop type: '$_dlop'"
+
 	for url in "$1" "$2"; do
 		[ -n "$url" ] && try_file "$url" "$_dlop" "$@" && return 0
 	done && err "$1 $2 $3 $4: not downloaded"; :
@@ -97,19 +100,25 @@ xbmkget()
 
 try_file()
 {
-	cached="$XBMK_CACHE/file/$6"
-	dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum
-	bad_checksum "$6" "$cached" 2>/dev/null && dl_fail="y"
-	[ "$dl_fail" = "n" ] && e "$5" f && return 0
+	cached="file/$6" && [ "$2" = "git" ] && cached="clone/${3##*/}" && \
+	    cached="${cached%.git}"
+	cached="$XBMK_CACHE/$cached"
+	x_ mkdir -p "${5%/*}" "${cached%/*}"
 
-	x_ rm -f "$cached"
-	[ "$2" = "curl" ] || [ "$2" = "copy" ] || \
-	    err "$3 $4 $5 $6: Unsupported dlop type: '$2'"
+	echk="d" && dl_fail="n" && [ "$2" != "git" ] && echk="f" && \
+	    bad_checksum "$6" "$cached" 2>/dev/null && dl_fail="y"
+	[ "$dl_fail" = "n" ] && e "$5" $echk && return 0
+
+	[ "$2" != "git" ] && x_ rm -f "$cached"
 
 	try_$2 "$cached" "$@" || return 1
 
-	bad_checksum "$6" "$cached" && return 1
-	[ "$cached" = "$5" ] || x_ cp "$cached" "$5"; :
+	if [ "$2" = "git" ]; then
+		tmpclone "$cached" "$5" "$6" "$8" || return 1
+	else
+		bad_checksum "$6" "$cached" && return 1
+		[ "$cached" != "$5" ] && x_ cp "$cached" "$5"
+	fi
 }
 
 try_curl()
@@ -128,6 +137,16 @@ try_copy()
 	cp "$2" "$1" || return 1; :
 }
 
+try_git()
+{
+	[ -d "$1" ] || git clone "$2" "$1" || return 1
+	git -C "$1" remote add main "$4" 2>/dev/null || :
+	git -C "$1" remote add backup "$5" 2>/dev/null || :
+	git -C "$1" fetch --all || :
+	git -C "$1" pull --all || :
+	git -C "$1" pull --all || :
+}
+
 bad_checksum()
 {
 	[ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] || return 1
@@ -136,12 +155,11 @@ bad_checksum()
 
 tmpclone()
 {
-	[ -d "$3" ] && return 0
-	printf "Creating git clone '%s' from '%s', '%s'\n" "$3" "$1" "$2"
-	git clone "$1" "$3" || x_ rm -Rf "$3"
-	[ -d "$3" ] || x_ git clone "$2" "$3"
-	x_ git -C "$3" reset --hard "$4"
-	fx_ "eval x_ git -C \"$3\" am" find "$5" -type f
+	[ -d "$2" ] && return 0
+	printf "Creating git clone '%s' from '%s'\n" "$2" "$1"
+	( x_ git clone "$1" "$2" ) || return 1
+	( x_ git -C "$2" reset --hard "$3" ) || return 1
+	( fx_ "eval x_ git -C \"$2\" am" find "$4" -type f ) || return 1; :
 }
 
 nuke()

From ed8a33d6fb1c380e70fec881e6a0308cea99333e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 13 May 2025 20:47:41 +0100
Subject: [PATCH 1446/1549] git.sh: cleanup

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index af0e8f2a..cc9c2f2a 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -38,11 +38,10 @@ fetch_project()
 
 clone_project()
 {
-	loc="$XBMK_CACHE/repo/$project" && singletree "$project" && \
+	loc="$XBMK_CACHE/clone/$project" && singletree "$project" && \
 	    loc="src/$project"
 	printf "Downloading project '%s' to '%s'\n" "$project" "$loc"
 
-	singletree "$project" || x_ rm -Rf "$loc"
 	e "$loc" d missing && remkdir "${tmpgit%/*}" && git_prep \
 	    "$url" "$bkup_url" "$xbmkpwd/config/$project/patches" "$loc"; :
 }
@@ -144,7 +143,6 @@ try_git()
 	git -C "$1" remote add backup "$5" 2>/dev/null || :
 	git -C "$1" fetch --all || :
 	git -C "$1" pull --all || :
-	git -C "$1" pull --all || :
 }
 
 bad_checksum()

From 3c23ff4fa1873e9170326141e31eb588d71a7d3a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 13 May 2025 21:57:34 +0100
Subject: [PATCH 1447/1549] git.sh: Only create destination repo on success

Don't leave a broken cache laying around, which would
otherwise break lbmk for the user.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/git.sh | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/include/git.sh b/include/git.sh
index cc9c2f2a..9405828e 100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -6,6 +6,7 @@ eval "`setvars "" loc url bkup_url subfile subhash subrepo subrepo_bkup \
     depend subfile_bkup repofail`"
 
 tmpgit="$xbmklocal/gitclone"
+tmpgitcache="$XBMK_CACHE/tmpgit"
 
 fetch_targets()
 {
@@ -138,11 +139,17 @@ try_copy()
 
 try_git()
 {
-	[ -d "$1" ] || git clone "$2" "$1" || return 1
-	git -C "$1" remote add main "$4" 2>/dev/null || :
-	git -C "$1" remote add backup "$5" 2>/dev/null || :
-	git -C "$1" fetch --all || :
-	git -C "$1" pull --all || :
+	gitdest="`findpath "$1"`" || err "Can't get readpath for '$1'"
+	x_ rm -Rf "$tmpgitcache"
+
+	[ -d "$gitdest" ] || git clone "$2" "$tmpgitcache" || return 1
+	[ -d "$gitdest" ] || x_ mkdir -p "${gitdest##*/}"
+	[ -d "$gitdest" ] || x_ mv "$tmpgitcache" "$gitdest"
+
+	git -C "$gitdest" remote add main "$4" 2>/dev/null || :
+	git -C "$gitdest" remote add backup "$5" 2>/dev/null || :
+	git -C "$gitdest" fetch --all || :
+	git -C "$gitdest" pull --all || :
 }
 
 bad_checksum()

From b04c86e5740f92cbea708f52a444df3aa1a2061f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 13 May 2025 22:00:28 +0100
Subject: [PATCH 1448/1549] git.sh: rename to get.sh

it now handles more than just git, and i forsee
it handling even more in the future, e.g. rsync,
ftp, bittorrent.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/{git.sh => get.sh} | 0
 mk                         | 2 +-
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename include/{git.sh => get.sh} (100%)

diff --git a/include/git.sh b/include/get.sh
similarity index 100%
rename from include/git.sh
rename to include/get.sh
diff --git a/mk b/mk
index f22d3b09..f358bc3a 100755
--- a/mk
+++ b/mk
@@ -17,7 +17,7 @@ fi
 . "include/mrc.sh"
 . "include/rom.sh"
 . "include/release.sh"
-. "include/git.sh"
+. "include/get.sh"
 
 main()
 {

From 6089716f07caf6b4690df1e1c2f2089a27a0b514 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 13 May 2025 22:17:37 +0100
Subject: [PATCH 1449/1549] release.sh: Don't run prep_release with fx_

The result of the printf statement is sorted, making
it do binaries first, which results in a lot of junk
files then being present inside the source archive.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/release.sh b/include/release.sh
index fbcc5621..f0799f17 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -28,7 +28,9 @@ release()
 	remkdir "$vdir"
 	x_ git clone . "$relsrcdir"
 
-	fx_ prep_release printf "src\ntarball\nbin\n"
+	prep_release src
+	prep_release tarball
+	prep_release bin
 	x_ rm -Rf "$relsrcdir"
 
 	x_ mkdir -p "$reldir"

From e9fe5a74a2e66906721fe2ca1beb1f14784cf675 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 14 May 2025 16:28:29 +0100
Subject: [PATCH 1450/1549] get.sh: fix caching of crossgcc tarballs

they were always re-downloading every time.

i've basically re-written most of xbmkget.

there was some erroneous conditions under which
it wrongly deleted the cached file, resulting in
it being downloaded again.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh    | 44 +++++++++++++++++++++++---------------------
 include/vendor.sh |  2 +-
 2 files changed, 24 insertions(+), 22 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index 9405828e..fbb41cd3 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -53,7 +53,7 @@ git_prep()
 	_loc="$4" # $1 and $2 are gitrepo and gitrepo_backup
 
 	chkvars rev
-	xbmkget "$1" "$2" "$tmpgit" "$rev" git "$_patchdir"
+	xbmkget git "$1" "$2" "$tmpgit" "$rev" "$_patchdir"
 	if singletree "$project" || [ $# -gt 4 ]; then
 		dx_ fetch_submodule "$mdir/module.list"
 	fi
@@ -78,46 +78,46 @@ fetch_submodule()
 	[ -z "$st" ] && return 0 # subrepo/subfile not defined
 	chkvars "sub${st}" "sub${st}_bkup" "subhash"
 
-	[ "$st" = "file" ] && xbmkget "$subfile" "$subfile_bkup" \
+	[ "$st" = "file" ] && xbmkget curl "$subfile" "$subfile_bkup" \
 	    "$tmpgit/$1" "$subhash" && return 0
 	x_ rm -Rf "$tmpgit/$1"
-	xbmkget "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subhash" git \
+	xbmkget git "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subhash" \
 	    "$mdir/${1##*/}/patches"
 }
 
-# can grab from the internet, or copy locally.
-# if copying locally, it can only copy a file.
 xbmkget()
 {
-	_dlop="curl" && [ $# -gt 4 ] && _dlop="$5"
-	[ "$_dlop" = "curl" ] || [ "$_dlop" = "copy" ] || \
-	    [ "$_dlop" = "git" ] || err "$1 $2 $3 $4: Bad dlop type: '$_dlop'"
+	[ "$1" = "curl" ] || [ "$1" = "copy" ] || [ "$1" = "git" ] || \
+	    err "Bad dlop (arg 1): xbmkget $*"
 
-	for url in "$1" "$2"; do
-		[ -n "$url" ] && try_file "$url" "$_dlop" "$@" && return 0
+	for url in "$2" "$3"; do
+		[ -n "$url" ] && try_file "$url" "$@" && return 0
 	done && err "$1 $2 $3 $4: not downloaded"; :
 }
 
 try_file()
 {
 	cached="file/$6" && [ "$2" = "git" ] && cached="clone/${3##*/}" && \
-	    cached="${cached%.git}"
+	    cached="${cached%.git}" # always the main repo as basis for naming,
+					# in case the backup has another name
 	cached="$XBMK_CACHE/$cached"
 	x_ mkdir -p "${5%/*}" "${cached%/*}"
 
-	echk="d" && dl_fail="n" && [ "$2" != "git" ] && echk="f" && \
-	    bad_checksum "$6" "$cached" 2>/dev/null && dl_fail="y"
-	[ "$dl_fail" = "n" ] && e "$5" $echk && return 0
+	echk="d" && [ "$2" != "git" ] && echk="f" && \
+	    bad_checksum "$6" "$cached" 2>/dev/null && x_ rm -f "$cached"
 
-	[ "$2" != "git" ] && x_ rm -f "$cached"
-
-	try_$2 "$cached" "$@" || return 1
+	e "$cached" $echk || try_$2 "$cached" "$@" || return 1
+	if e "$5" $echk && [ "$2" != "git" ]; then
+		bad_checksum "$6" "$5" 2>/dev/null && x_ cp "$cached" "$5"
+	fi
+	e "$cached" $echk missing && return 1
 
 	if [ "$2" = "git" ]; then
-		tmpclone "$cached" "$5" "$6" "$8" || return 1
+		tmpclone "$cached" "$5" "$6" "$7" || return 1
 	else
-		bad_checksum "$6" "$cached" && return 1
+		bad_checksum "$6" "$cached" && x_ rm -f "$cached" && return 1
 		[ "$cached" != "$5" ] && x_ cp "$cached" "$5"
+		bad_checksum "$6" "$5" && x_ rm -rf "$5" && return 1; :
 	fi
 }
 
@@ -154,8 +154,10 @@ try_git()
 
 bad_checksum()
 {
-	[ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] || return 1
-	printf "Bad checksum for file: %s\n" "$2" 1>&2; rm -f "$2" || :; :
+	[ ! -f "$2" ] || [ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] \
+	    || return 1
+	printf "Bad checksum for file: %s\n" "$2" 1>&2
+	x_ rm -f "$2"
 }
 
 tmpclone()
diff --git a/include/vendor.sh b/include/vendor.sh
index fb49cca5..823ba74f 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -90,7 +90,7 @@ fetch()
 	done; :
 
 	dlop="curl" && [ $# -gt 5 ] && dlop="$6"
-	xbmkget "$dl" "$dl_bkup" "$_dl" "$dlsum" "$dlop"
+	xbmkget "$dlop" "$dl" "$dl_bkup" "$_dl" "$dlsum"
 
 	x_ rm -Rf "${_dl}_extracted"
 	e "$_dest" f && return 0

From 21867b7d80562ce822525fca63688908f1ca59b8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 14 May 2025 16:38:10 +0100
Subject: [PATCH 1451/1549] get.sh: simplify fetch_submodules()

We are calling xbmkget in the same way, whether it's
a subfile or subrepo.

Rename these variables to subcurl and subgit, so that we
can call xbmkget unconditionally.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../acpica-unix-20241212.tar.gz/module.cfg    |  4 ++--
 .../default/arm-trusted-firmware/module.cfg   |  4 ++--
 .../default/binutils-2.43.1.tar.xz/module.cfg |  4 ++--
 .../submodule/coreboot/default/fsp/module.cfg |  4 ++--
 .../default/gcc-14.2.0.tar.xz/module.cfg      |  4 ++--
 .../default/gmp-6.3.0.tar.xz/module.cfg       |  4 ++--
 .../default/intel-microcode/module.cfg        |  4 ++--
 .../coreboot/default/libgfxinit/module.cfg    |  4 ++--
 .../coreboot/default/libhwbase/module.cfg     |  4 ++--
 .../default/mpc-1.3.1.tar.gz/module.cfg       |  4 ++--
 .../default/mpfr-4.2.1.tar.xz/module.cfg      |  4 ++--
 .../default/nasm-2.16.03.tar.bz2/module.cfg   |  4 ++--
 .../coreboot/default/vboot/module.cfg         |  4 ++--
 .../acpica-unix2-20190703.tar.gz/module.cfg   |  4 ++--
 .../fam15h/binutils-2.32.tar.xz/module.cfg    |  4 ++--
 .../coreboot/fam15h/blobs/module.cfg          |  4 ++--
 .../fam15h/gcc-8.3.0.tar.xz/module.cfg        |  4 ++--
 .../fam15h/gmp-6.1.2.tar.xz/module.cfg        |  4 ++--
 .../fam15h/mpc-1.1.0.tar.gz/module.cfg        |  4 ++--
 .../fam15h/mpfr-4.0.2.tar.xz/module.cfg       |  4 ++--
 .../fam15h/nasm-2.16.03.tar.bz2/module.cfg    |  4 ++--
 .../coreboot/fam15h/vboot/module.cfg          |  4 ++--
 config/submodule/docs/html/module.cfg         |  4 ++--
 config/submodule/docs/img/module.cfg          |  4 ++--
 .../submodule/grub/default/gnulib/module.cfg  |  4 ++--
 config/submodule/grub/nvme/gnulib/module.cfg  |  4 ++--
 config/submodule/grub/xhci/gnulib/module.cfg  |  4 ++--
 config/submodule/pcsx-redux/uC-sdk/module.cfg |  4 ++--
 config/submodule/pico-sdk/tinyusb/module.cfg  |  4 ++--
 .../stm32-vserprog/libopencm3/module.cfg      |  4 ++--
 include/get.sh                                | 20 +++++++++----------
 31 files changed, 69 insertions(+), 71 deletions(-)

diff --git a/config/submodule/coreboot/default/acpica-unix-20241212.tar.gz/module.cfg b/config/submodule/coreboot/default/acpica-unix-20241212.tar.gz/module.cfg
index 30baf001..27508216 100644
--- a/config/submodule/coreboot/default/acpica-unix-20241212.tar.gz/module.cfg
+++ b/config/submodule/coreboot/default/acpica-unix-20241212.tar.gz/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20241212.tar.gz"
-subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20241212.tar.gz"
+subcurl="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20241212.tar.gz"
+subcurl_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20241212.tar.gz"
 subhash="daa4243f927451ac18c337cf17c27849e68329b3f7eb25b8c3379fda9c6a484201b73d4ffccab89a0ae22cc5e432f141ba149015a003834b0515bdb3d4efe0a8"
diff --git a/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
index 911f3fa9..953997c7 100644
--- a/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
+++ b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subrepo="https://review.coreboot.org/arm-trusted-firmware.git"
-subrepo_bkup="https://github.com/coreboot/arm-trusted-firmware"
+subgit="https://review.coreboot.org/arm-trusted-firmware.git"
+subgit_bkup="https://github.com/coreboot/arm-trusted-firmware"
 subhash="57ac3f74b34a3303f03deee264a1f2247c68008d"
diff --git a/config/submodule/coreboot/default/binutils-2.43.1.tar.xz/module.cfg b/config/submodule/coreboot/default/binutils-2.43.1.tar.xz/module.cfg
index 1e16b92a..de0d349c 100644
--- a/config/submodule/coreboot/default/binutils-2.43.1.tar.xz/module.cfg
+++ b/config/submodule/coreboot/default/binutils-2.43.1.tar.xz/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.43.1.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.43.1.tar.xz"
+subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.43.1.tar.xz"
+subcurl_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.43.1.tar.xz"
 subhash="20977ad17729141a2c26d358628f44a0944b84dcfefdec2ba029c2d02f40dfc41cc91c0631044560d2bd6f9a51e1f15846b4b311befbe14f1239f14ff7d57824"
diff --git a/config/submodule/coreboot/default/fsp/module.cfg b/config/submodule/coreboot/default/fsp/module.cfg
index 2b39812b..98e57efe 100644
--- a/config/submodule/coreboot/default/fsp/module.cfg
+++ b/config/submodule/coreboot/default/fsp/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subrepo="https://review.coreboot.org/fsp.git"
-subrepo_bkup="https://github.com/coreboot/fsp"
+subgit="https://review.coreboot.org/fsp.git"
+subgit_bkup="https://github.com/coreboot/fsp"
 subhash="86c9111639d357e0f369c14248097b119112a71c"
diff --git a/config/submodule/coreboot/default/gcc-14.2.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gcc-14.2.0.tar.xz/module.cfg
index 4ef88d1d..e637ba03 100644
--- a/config/submodule/coreboot/default/gcc-14.2.0.tar.xz/module.cfg
+++ b/config/submodule/coreboot/default/gcc-14.2.0.tar.xz/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
+subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
+subcurl_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
 subhash="932bdef0cda94bacedf452ab17f103c0cb511ff2cec55e9112fc0328cbf1d803b42595728ea7b200e0a057c03e85626f937012e49a7515bc5dd256b2bf4bc396"
diff --git a/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg
index 46b55c01..90466fed 100644
--- a/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg
+++ b/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz"
+subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz"
+subcurl_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz"
 subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2"
diff --git a/config/submodule/coreboot/default/intel-microcode/module.cfg b/config/submodule/coreboot/default/intel-microcode/module.cfg
index 0ae50bd0..2af752fa 100644
--- a/config/submodule/coreboot/default/intel-microcode/module.cfg
+++ b/config/submodule/coreboot/default/intel-microcode/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subrepo="https://review.coreboot.org/intel-microcode.git"
-subrepo_bkup="https://github.com/coreboot/intel-microcode"
+subgit="https://review.coreboot.org/intel-microcode.git"
+subgit_bkup="https://github.com/coreboot/intel-microcode"
 subhash="8a62de41c011615d749f8e72bb906dddc72e56a8"
diff --git a/config/submodule/coreboot/default/libgfxinit/module.cfg b/config/submodule/coreboot/default/libgfxinit/module.cfg
index 93383129..87589128 100644
--- a/config/submodule/coreboot/default/libgfxinit/module.cfg
+++ b/config/submodule/coreboot/default/libgfxinit/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subrepo="https://review.coreboot.org/libgfxinit.git"
-subrepo_bkup="https://github.com/coreboot/libgfxinit"
+subgit="https://review.coreboot.org/libgfxinit.git"
+subgit_bkup="https://github.com/coreboot/libgfxinit"
 subhash="17cfc92f402493979783585b6581efbd98c0cf07"
diff --git a/config/submodule/coreboot/default/libhwbase/module.cfg b/config/submodule/coreboot/default/libhwbase/module.cfg
index 4995e70f..f09b123f 100644
--- a/config/submodule/coreboot/default/libhwbase/module.cfg
+++ b/config/submodule/coreboot/default/libhwbase/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subrepo="https://review.coreboot.org/libhwbase.git"
-subrepo_bkup="https://github.com/coreboot/libhwbase"
+subgit="https://review.coreboot.org/libhwbase.git"
+subgit_bkup="https://github.com/coreboot/libhwbase"
 subhash="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg
index 9b6cc57a..9a1ec4cb 100644
--- a/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg
+++ b/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
+subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
+subcurl_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
 subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97"
diff --git a/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg
index 93cc1a05..4ff30620 100644
--- a/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg
+++ b/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subcurl_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz"
 subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475"
diff --git a/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg
index 3895e2ef..bc486e80 100644
--- a/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg
+++ b/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2"
-subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2"
+subcurl="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2"
+subcurl_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2"
 subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172"
diff --git a/config/submodule/coreboot/default/vboot/module.cfg b/config/submodule/coreboot/default/vboot/module.cfg
index d13a1b29..8b4e15de 100644
--- a/config/submodule/coreboot/default/vboot/module.cfg
+++ b/config/submodule/coreboot/default/vboot/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subrepo="https://review.coreboot.org/vboot.git"
-subrepo_bkup="https://github.com/coreboot/vboot"
+subgit="https://review.coreboot.org/vboot.git"
+subgit_bkup="https://github.com/coreboot/vboot"
 subhash="3f94e2c7ed58c4e67d6e7dc6052ec615dbbb9bb4"
diff --git a/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg b/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg
index 50e6989e..b8365f7c 100644
--- a/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg
+++ b/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-20190703.tar.gz"
-subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix2-20190703.tar.gz"
+subcurl="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-20190703.tar.gz"
+subcurl_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix2-20190703.tar.gz"
 subhash="8445a6d354ce3bcbfb5159f4ec0312b1e910c0b1b2033a2300f892e4ac580abab4e3f5b4ded379f0036299359d307330511ab7053678cfd9031d7df4c365f555"
diff --git a/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg
index 6e86543f..3f03f64e 100644
--- a/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg
+++ b/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.32.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.32.tar.xz"
+subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.32.tar.xz"
+subcurl_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.32.tar.xz"
 subhash="d326408f12a03d9a61a9de56584c2af12f81c2e50d2d7e835d51565df8314df01575724afa1e43bd0db45cfc9916b41519b67dfce03232aa4978704492a6994a"
diff --git a/config/submodule/coreboot/fam15h/blobs/module.cfg b/config/submodule/coreboot/fam15h/blobs/module.cfg
index f649cab2..3c34302c 100644
--- a/config/submodule/coreboot/fam15h/blobs/module.cfg
+++ b/config/submodule/coreboot/fam15h/blobs/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subrepo="https://review.coreboot.org/blobs.git"
-subrepo_bkup="https://github.com/coreboot/blobs"
+subgit="https://review.coreboot.org/blobs.git"
+subgit_bkup="https://github.com/coreboot/blobs"
 subhash="034b27818450428f70aa9316c8bd0d65bacd8ee8"
diff --git a/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg
index 1a111581..ce21c98b 100644
--- a/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg
+++ b/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-8.3.0/gcc-8.3.0.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-8.3.0/gcc-8.3.0.tar.xz"
+subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-8.3.0/gcc-8.3.0.tar.xz"
+subcurl_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-8.3.0/gcc-8.3.0.tar.xz"
 subhash="1811337ae3add9680cec64968a2509d085b6dc5b6783fc1e8c295e3e47416196fd1a3ad8dfe7e10be2276b4f62c357659ce2902f239f60a8648548231b4b5802"
diff --git a/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg
index 08926b6a..a46b9b7c 100644
--- a/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg
+++ b/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.1.2.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.1.2.tar.xz"
+subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.1.2.tar.xz"
+subcurl_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.1.2.tar.xz"
 subhash="9f098281c0593b76ee174b722936952671fab1dae353ce3ed436a31fe2bc9d542eca752353f6645b7077c1f395ab4fdd355c58e08e2a801368f1375690eee2c6"
diff --git a/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg b/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg
index 89cfabc7..13a66a87 100644
--- a/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg
+++ b/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.1.0.tar.gz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.1.0.tar.gz"
+subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.1.0.tar.gz"
+subcurl_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.1.0.tar.gz"
 subhash="72d657958b07c7812dc9c7cbae093118ce0e454c68a585bfb0e2fa559f1bf7c5f49b93906f580ab3f1073e5b595d23c6494d4d76b765d16dde857a18dd239628"
diff --git a/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg
index c6ebf4de..f2a4f0fe 100644
--- a/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg
+++ b/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.0.2.tar.xz"
-subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.0.2.tar.xz"
+subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.0.2.tar.xz"
+subcurl_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.0.2.tar.xz"
 subhash="d583555d08863bf36c89b289ae26bae353d9a31f08ee3894520992d2c26e5683c4c9c193d7ad139632f71c0a476d85ea76182702a98bf08dde7b6f65a54f8b88"
diff --git a/config/submodule/coreboot/fam15h/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/fam15h/nasm-2.16.03.tar.bz2/module.cfg
index 3895e2ef..bc486e80 100644
--- a/config/submodule/coreboot/fam15h/nasm-2.16.03.tar.bz2/module.cfg
+++ b/config/submodule/coreboot/fam15h/nasm-2.16.03.tar.bz2/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2"
-subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2"
+subcurl="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2"
+subcurl_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2"
 subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172"
diff --git a/config/submodule/coreboot/fam15h/vboot/module.cfg b/config/submodule/coreboot/fam15h/vboot/module.cfg
index b0897e4f..a3a8f21b 100644
--- a/config/submodule/coreboot/fam15h/vboot/module.cfg
+++ b/config/submodule/coreboot/fam15h/vboot/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subrepo="https://review.coreboot.org/vboot.git"
-subrepo_bkup="https://github.com/coreboot/vboot"
+subgit="https://review.coreboot.org/vboot.git"
+subgit_bkup="https://github.com/coreboot/vboot"
 subhash="ecdca931ae0637d1a9498f64862939bd5bb99e0b"
diff --git a/config/submodule/docs/html/module.cfg b/config/submodule/docs/html/module.cfg
index 6c6dab9a..58bec732 100644
--- a/config/submodule/docs/html/module.cfg
+++ b/config/submodule/docs/html/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 subhash="47c993cba483ff23a4c7b866c6cedcc905e9a2bd"
-subrepo="https://codeberg.org/libreboot/lbwww"
-subrepo_bkup="https://git.disroot.org/libreboot/lbwww"
+subgit="https://codeberg.org/libreboot/lbwww"
+subgit_bkup="https://git.disroot.org/libreboot/lbwww"
diff --git a/config/submodule/docs/img/module.cfg b/config/submodule/docs/img/module.cfg
index 32317ff9..8a176668 100644
--- a/config/submodule/docs/img/module.cfg
+++ b/config/submodule/docs/img/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 subhash="68863fd7491f1358fb920d8ad558de35fcfec769"
-subrepo="https://codeberg.org/libreboot/lbwww-img"
-subrepo_bkup="https://git.disroot.org/libreboot/lbwww-img"
+subgit="https://codeberg.org/libreboot/lbwww-img"
+subgit_bkup="https://git.disroot.org/libreboot/lbwww-img"
diff --git a/config/submodule/grub/default/gnulib/module.cfg b/config/submodule/grub/default/gnulib/module.cfg
index eaf40b24..eb5aa2b6 100644
--- a/config/submodule/grub/default/gnulib/module.cfg
+++ b/config/submodule/grub/default/gnulib/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subrepo="https://codeberg.org/libreboot/gnulib"
-subrepo_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup!
+subgit="https://codeberg.org/libreboot/gnulib"
+subgit_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup!
 subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
diff --git a/config/submodule/grub/nvme/gnulib/module.cfg b/config/submodule/grub/nvme/gnulib/module.cfg
index eaf40b24..eb5aa2b6 100644
--- a/config/submodule/grub/nvme/gnulib/module.cfg
+++ b/config/submodule/grub/nvme/gnulib/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subrepo="https://codeberg.org/libreboot/gnulib"
-subrepo_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup!
+subgit="https://codeberg.org/libreboot/gnulib"
+subgit_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup!
 subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
diff --git a/config/submodule/grub/xhci/gnulib/module.cfg b/config/submodule/grub/xhci/gnulib/module.cfg
index eaf40b24..eb5aa2b6 100644
--- a/config/submodule/grub/xhci/gnulib/module.cfg
+++ b/config/submodule/grub/xhci/gnulib/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subrepo="https://codeberg.org/libreboot/gnulib"
-subrepo_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup!
+subgit="https://codeberg.org/libreboot/gnulib"
+subgit_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup!
 subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
diff --git a/config/submodule/pcsx-redux/uC-sdk/module.cfg b/config/submodule/pcsx-redux/uC-sdk/module.cfg
index f8f44850..75f68204 100644
--- a/config/submodule/pcsx-redux/uC-sdk/module.cfg
+++ b/config/submodule/pcsx-redux/uC-sdk/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 subhash="7c6f1973a16893cf1f0868af6f8e60a028b933ad"
-subrepo="https://github.com/grumpycoders/uC-sdk.git"
-subrepo_bkup="https://codeberg.org/vimuser/uC-sdk"
+subgit="https://github.com/grumpycoders/uC-sdk.git"
+subgit_bkup="https://codeberg.org/vimuser/uC-sdk"
diff --git a/config/submodule/pico-sdk/tinyusb/module.cfg b/config/submodule/pico-sdk/tinyusb/module.cfg
index 988d68ba..981e5305 100644
--- a/config/submodule/pico-sdk/tinyusb/module.cfg
+++ b/config/submodule/pico-sdk/tinyusb/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 subhash="86c416d4c0fb38432460b3e11b08b9de76941bf5"
-subrepo="https://codeberg.org/libreboot/tinyusb"
-subrepo_bkup="https://github.com/hathach/tinyusb.git"
+subgit="https://codeberg.org/libreboot/tinyusb"
+subgit_bkup="https://github.com/hathach/tinyusb.git"
diff --git a/config/submodule/stm32-vserprog/libopencm3/module.cfg b/config/submodule/stm32-vserprog/libopencm3/module.cfg
index 069020cc..3ac90162 100644
--- a/config/submodule/stm32-vserprog/libopencm3/module.cfg
+++ b/config/submodule/stm32-vserprog/libopencm3/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 subhash="458250dc6147dc807eec9e4d5a6caf38a699ecb1"
-subrepo="https://codeberg.org/libreboot/libopencm3"
-subrepo_bkup="https://github.com/libopencm3/libopencm3"
+subgit="https://codeberg.org/libreboot/libopencm3"
+subgit_bkup="https://github.com/libopencm3/libopencm3"
diff --git a/include/get.sh b/include/get.sh
index fbb41cd3..e582fdd8 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -2,8 +2,8 @@
 # Copyright (c) 2020-2021,2023-2025 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
 
-eval "`setvars "" loc url bkup_url subfile subhash subrepo subrepo_bkup \
-    depend subfile_bkup repofail`"
+eval "`setvars "" loc url bkup_url subcurl subhash subgit subgit_bkup \
+    depend subcurl_bkup repofail`"
 
 tmpgit="$xbmklocal/gitclone"
 tmpgitcache="$XBMK_CACHE/tmpgit"
@@ -65,24 +65,22 @@ git_prep()
 fetch_submodule()
 {
 	mcfgdir="$mdir/${1##*/}"; eval \
-	    "`setvars "" subhash subrepo subrepo_bkup subfile subfile_bkup st`"
+	    "`setvars "" subhash subgit subgit_bkup subcurl subcurl_bkup st`"
 	[ ! -f "$mcfgdir/module.cfg" ] || . "$mcfgdir/module.cfg" || \
 	    err "! . $mcfgdir/module.cfg"
 
-	for xt in repo file; do
+	for xt in git curl; do
 		_seval="if [ -n \"\$sub$xt\" ] || [ -n \"\$sub${xt}_bkup\" ]"
 		eval "$_seval; then st=\"\$st \$xt\"; fi"
 	done
-	st="${st# }" && [ "$st" = "repo file" ] && err "$mdir: repo+file"
 
-	[ -z "$st" ] && return 0 # subrepo/subfile not defined
+	st="${st# }" && [ "$st" = "git curl" ] && err "$mdir: git+curl defined"
+	[ -z "$st" ] && return 0 # subgit/subcurl not defined
 	chkvars "sub${st}" "sub${st}_bkup" "subhash"
 
-	[ "$st" = "file" ] && xbmkget curl "$subfile" "$subfile_bkup" \
-	    "$tmpgit/$1" "$subhash" && return 0
-	x_ rm -Rf "$tmpgit/$1"
-	xbmkget git "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subhash" \
-	    "$mdir/${1##*/}/patches"
+	[ "$st" = "git" ] && x_ rm -Rf "$tmpgit/$1"
+	eval xbmkget "$st" "\$sub$st" "\$sub${st}_bkup" "$tmpgit/$1" \
+	    "$subhash" "$mdir/${1##*/}/patches"
 }
 
 xbmkget()

From 8d5475ed5b55b01290d09ff06a29ae3c6da119fa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 14 May 2025 16:48:25 +0100
Subject: [PATCH 1452/1549] get.sh: simplify fetch_submodules() config check

We already do what the old code does in setcfg, by
virtue of the fact that the st variable is later
checked, after loading this config conditionally,
where the st variable is otherwise blank.

We can avoid the unnecessary work after loading
the config, by returning if the config is absent.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index e582fdd8..120d4264 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -66,8 +66,7 @@ fetch_submodule()
 {
 	mcfgdir="$mdir/${1##*/}"; eval \
 	    "`setvars "" subhash subgit subgit_bkup subcurl subcurl_bkup st`"
-	[ ! -f "$mcfgdir/module.cfg" ] || . "$mcfgdir/module.cfg" || \
-	    err "! . $mcfgdir/module.cfg"
+	eval "`setcfg "$mcfgdir/module.cfg" 0`"
 
 	for xt in git curl; do
 		_seval="if [ -n \"\$sub$xt\" ] || [ -n \"\$sub${xt}_bkup\" ]"

From d9ed03f9ea595f8e376021f5560625908b4069d9 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 14 May 2025 16:52:33 +0100
Subject: [PATCH 1453/1549] get.sh submodules: Don't delete files recursively

I overlooked this in a previous patch. It doesn't really
matter, since we're operating on a file anyway, but it's
not correct.

Files should have rm -f on them, not rm -Rf, for deletion.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/get.sh b/include/get.sh
index 120d4264..b3d17d7e 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -114,7 +114,7 @@ try_file()
 	else
 		bad_checksum "$6" "$cached" && x_ rm -f "$cached" && return 1
 		[ "$cached" != "$5" ] && x_ cp "$cached" "$5"
-		bad_checksum "$6" "$5" && x_ rm -rf "$5" && return 1; :
+		bad_checksum "$6" "$5" && x_ rm -f "$5" && return 1; :
 	fi
 }
 

From e62886dedae26f49822350daeb7cfe83bb9a3931 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 14 May 2025 16:59:59 +0100
Subject: [PATCH 1454/1549] get.sh: simplify try_copy()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index b3d17d7e..69cc1a4a 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -127,10 +127,8 @@ try_curl()
 
 try_copy()
 {
-	[ -L "$2" ] && printf "dl %s %s %s %s: '%s' is a symlink\n" \
-	    "$4" "$5" "$6" "$7" "$2" 1>&2 && return 1
-	[ ! -f "$2" ] && printf "dl %s %s %s %s: '%s' not a file\n" \
-	    "$4" "$5" "$6" "$7" "$2" 1>&2 && return 1
+	[ -L "$2" ] && printf "symlink %s (try_cp %s)\n" "$2" "$*" && return 1
+	[ ! -f "$2" ] && "no such file %s (try_cp %s)\n" "$2" "$*" && return 1
 	cp "$2" "$1" || return 1; :
 }
 

From f29aa9c8d5983f39166d00997364a47f126ae401 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 14 May 2025 17:03:32 +0100
Subject: [PATCH 1455/1549] get.sh: use subshells on try_ functions

This way, we can use x_ which will then print the command
that failed, if we need to debug future errors.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index 69cc1a4a..e2aaf70b 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -121,15 +121,15 @@ try_file()
 try_curl()
 {
 	_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
-	curl --location --retry 3 -A "$_ua" "$2" -o "$1" || \
-	    wget --tries 3 -U "$_ua" "$2" -O "$1" || return 1; :
+	( x_ curl --location --retry 3 -A "$_ua" "$2" -o "$1" ) || \
+	    ( x_ wget --tries 3 -U "$_ua" "$2" -O "$1" ) || return 1; :
 }
 
 try_copy()
 {
 	[ -L "$2" ] && printf "symlink %s (try_cp %s)\n" "$2" "$*" && return 1
 	[ ! -f "$2" ] && "no such file %s (try_cp %s)\n" "$2" "$*" && return 1
-	cp "$2" "$1" || return 1; :
+	( x_ cp "$2" "$1" ) || return 1; :
 }
 
 try_git()
@@ -137,14 +137,14 @@ try_git()
 	gitdest="`findpath "$1"`" || err "Can't get readpath for '$1'"
 	x_ rm -Rf "$tmpgitcache"
 
-	[ -d "$gitdest" ] || git clone "$2" "$tmpgitcache" || return 1
+	[ -d "$gitdest" ] || ( x_ git clone "$2" "$tmpgitcache" ) || return 1
 	[ -d "$gitdest" ] || x_ mkdir -p "${gitdest##*/}"
 	[ -d "$gitdest" ] || x_ mv "$tmpgitcache" "$gitdest"
 
-	git -C "$gitdest" remote add main "$4" 2>/dev/null || :
-	git -C "$gitdest" remote add backup "$5" 2>/dev/null || :
-	git -C "$gitdest" fetch --all || :
-	git -C "$gitdest" pull --all || :
+	( x_ git -C "$gitdest" remote add main "$4" 2>/dev/null ) || :
+	( x_ git -C "$gitdest" remote add backup "$5" 2>/dev/null ) || :
+	( x_ git -C "$gitdest" fetch --all ) || :
+	( x_ git -C "$gitdest" pull --all ) || :; :
 }
 
 bad_checksum()

From 46f42291d3c1e9a3e5b34b6bd727f94cd512bc64 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 14 May 2025 18:06:29 +0100
Subject: [PATCH 1456/1549] get.sh: fix broken printf statement

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index e2aaf70b..7d728796 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -127,8 +127,8 @@ try_curl()
 
 try_copy()
 {
-	[ -L "$2" ] && printf "symlink %s (try_cp %s)\n" "$2" "$*" && return 1
-	[ ! -f "$2" ] && "no such file %s (try_cp %s)\n" "$2" "$*" && return 1
+	[ -L "$2" ] && printf "symlink %s (trycp %s)\n" "$2" "$*" && return 1
+	[ ! -f "$2" ] && printf "%s missing (trycp %s)\n" "$2" "$*" && return 1
 	( x_ cp "$2" "$1" ) || return 1; :
 }
 

From 208dfc89bd583f4d8b757ca34e6f6a85538d5e48 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 15 May 2025 01:03:14 +0100
Subject: [PATCH 1457/1549] get.sh: simplify nuke()

more specifically, re-write it so that it can be called with fx_

this means that the single-tree check for nuke.list can be made
much simpler

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 14 +++++---------
 1 file changed, 5 insertions(+), 9 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index 7d728796..156d2b87 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -15,7 +15,7 @@ fetch_targets()
 	printf "Creating %s tree %s\n" "$project" "$tree"
 	git_prep "$url" "$bkup_url" "$xbmkpwd/$configdir/$tree/patches" \
 	    "src/$project/$tree" with_submodules
-	nuke "$project/$tree" "$project/$tree"
+	( fx_ nuke find "$xbmkpwd/config" -type f -name "nuke.list" ) || exit 1
 }
 
 fetch_project()
@@ -31,10 +31,7 @@ fetch_project()
 		x_ ./mk -f $d
 	done
 	clone_project
-
-	for x in config/git/*; do
-		[ -d "$x" ] && nuke "${x##*/}" "src/${x##*/}" 2>/dev/null; :
-	done; :
+	( fx_ nuke find "$xbmkpwd/config" -type f -name "nuke.list" ) || exit 1
 }
 
 clone_project()
@@ -166,8 +163,7 @@ tmpclone()
 
 nuke()
 {
-	e "config/${1%/}/nuke.list" f missing || while read -r nukefile; do
-		rmf="src/${2%/}/$nukefile" && [ -L "$rmf" ] && continue
-		e "$rmf" e missing || x_ rm -Rf "$rmf"
-	done < "config/${1%/}/nuke.list"; :
+	rdir="${1#"$xbmkpwd/config/"}" && [ -d "$xbmkpwd/src/${rdir%/*}" ] && \
+	    x_ cd "$xbmkpwd/src/${rdir%/*}" && \
+	    dx_ "[ -L \"\$fx\" ] || x_ rm -Rf" "$1"; :
 }

From c8813c9a144b14a78f7328ce7b886270e1b676f3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 15 May 2025 02:20:55 +0100
Subject: [PATCH 1458/1549] properly exit 1 when calling fx_

in a few places, we use the presence of a file found
by fx_ to cause an exit, but the command that runs
looks something like:

exit 1 "string"

this yields an error, and a non-zero exit, because of
too many arguments to "exit", but we wanted a non-zero
exit anyway.

nevertheless, this is incorrect.

to fix it, eval is used instead. if the never-going-to-exist
condition one day exists where exit 1 actually returns, not,
you know, exits, we will use err instead, with the string
as argument.

this should be fine. it's a bit hacky, but so is fx_, and
it works. fx_ is used in several places to keep the sloccount
down, providing a common way to perform while loops on the
output of a command; that is its only purpose..

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh  | 4 ++--
 include/tree.sh | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index cf4305a1..75de7512 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -75,8 +75,8 @@ chkvars()
 # e.g. coreboot is multi-tree, so 1
 singletree()
 {
-	( fx_ "exit 1" find "config/$1/"*/ -type f -name "target.cfg" ) || \
-	    return 1
+	( fx_ "eval exit 1 && err" find "config/$1/"*/ -type f \
+	    -name "target.cfg" ) || return 1; :
 }
 
 findpath()
diff --git a/include/tree.sh b/include/tree.sh
index f44b39cc..25d4732c 100644
--- a/include/tree.sh
+++ b/include/tree.sh
@@ -270,7 +270,7 @@ check_defconfig()
 elfcheck()
 {
 	# TODO: *STILL* very hacky check. do it properly (based on build.list)
-	( fx_ "exit 1" find "$dest_dir" -type f ) || return 1; :
+	( fx_ "eval exit 1 && err" find "$dest_dir" -type f ) || return 1; :
 }
 
 handle_makefile()

From a191d22bd6dad8b5d9cb37e952904ff1a0030259 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 15 May 2025 02:38:54 +0100
Subject: [PATCH 1459/1549] get.sh: add missing eval to dx_ in nuke()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/get.sh b/include/get.sh
index 156d2b87..74adb6be 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -165,5 +165,5 @@ nuke()
 {
 	rdir="${1#"$xbmkpwd/config/"}" && [ -d "$xbmkpwd/src/${rdir%/*}" ] && \
 	    x_ cd "$xbmkpwd/src/${rdir%/*}" && \
-	    dx_ "[ -L \"\$fx\" ] || x_ rm -Rf" "$1"; :
+	    dx_ "eval [ -L \"\$fx\" ] || x_ rm -Rf" "$1"; :
 }

From d668f3a35296f0bc7884b18d49f523d7bb331c30 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 15 May 2025 21:51:36 +0100
Subject: [PATCH 1460/1549] vendor.sh: Properly verify SHA512SUM on extraction

I currently check the downloaded files e.g. .exe file, but
then I don't check - or even define - sha512sums for the
files extracted from them e.g. me.bin

This patch fixes that. It also caches the hashed files, so
that extraction is faster on a re-run - this makes release
builds go faster, when running ./mk release

If a checksum is not defined, i.e. blank, then a warning is
given, telling you to check a specific directory. This way,
when adding new vendor files, you can add it first without
specifying the checksum, e.g. me.bin checksum. Then you can
manually inspect the files that were extracted, and define it,
then test again.

In a given pkg.cfg for config/vendor, the following variables
are now available for use:

FSPM_bin_hash for fsp m module
FSPS_bin_hash for fsp s module
EC_FW1_hash for KBC1126 EC firmware (1st file)
EC_FW2_hash for KBC1126 EC firmware (2nd file)
ME_bin_hash for me.bin
MRC_bin_hash for mrc.bin (broadwell boards)
REF_bin_hash for refcode (broadwell boards)
SCH5545EC_bin_hash for sch5545 firmware (Dell Precision T1650)
TBFW_bin_hash for Lenovo ThunderBolt firmware (e.g. T480/T480s)
E6400_VGA_bin_hash for Dell E6400 Nvidia VGA ROM

In practise, most people use release archives, and the
inject script, so I knew those were reliable, because the ROM
images were hashed prior to removing files. This patch benefits
people using lbmk.git directly, without using release files,
because now they know they have a valid file e.g. me.bin

Previously, only the download was checked, not the extracted
files, which meant that the only thing preventing a brick was
the code not being buggy. Any number of bugs could pop up in
the future, so this new level of integrity will protect against
such a scenario, and provide early warning prompting bug fixes.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/vendor/3050micro/pkg.cfg    |   3 +
 config/vendor/e6400/pkg.cfg        |   1 +
 config/vendor/haswell/pkg.cfg      |   1 +
 config/vendor/hp2170p/pkg.cfg      |   3 +
 config/vendor/hp2560p/pkg.cfg      |   3 +
 config/vendor/hp2570p/pkg.cfg      |   3 +
 config/vendor/hp8200sff/pkg.cfg    |   1 +
 config/vendor/hp820g2/pkg.cfg      |   3 +
 config/vendor/hp8460pintel/pkg.cfg |   3 +
 config/vendor/hp8470pintel/pkg.cfg |   3 +
 config/vendor/hp8560w/pkg.cfg      |   3 +
 config/vendor/hp9470m/pkg.cfg      |   3 +
 config/vendor/ivybridge/pkg.cfg    |   1 +
 config/vendor/sandybridge/pkg.cfg  |   1 +
 config/vendor/t1650/pkg.cfg        |   2 +
 config/vendor/t1700/pkg.cfg        |   2 +
 config/vendor/t480/pkg.cfg         |   4 ++
 config/vendor/t480s/pkg.cfg        |   5 ++
 include/get.sh                     |  26 ++++---
 include/mrc.sh                     |  13 ++--
 include/vendor.sh                  | 108 ++++++++++++++++++++---------
 21 files changed, 142 insertions(+), 50 deletions(-)

diff --git a/config/vendor/3050micro/pkg.cfg b/config/vendor/3050micro/pkg.cfg
index 497a27a6..45ba55d1 100644
--- a/config/vendor/3050micro/pkg.cfg
+++ b/config/vendor/3050micro/pkg.cfg
@@ -3,6 +3,7 @@
 DL_hash="976bbb1e625f64df276d8343757d910c88b8a781f953bc2c41a7dd15184ec70d55f8081de2a0aaa83cddb8e73bdc2df6288fde6e0897e4928c48ca4bb30bea2d"
 DL_url="https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip"
 DL_url_bkup="https://web.archive.org/web/20230822134231/https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip"
+ME_bin_hash="3231ddb79be81f0a631926fc0e533ee7bce2d10032d7d45e56ae8a9894bcf9b4ca0b4f6fd3bc4daa185a464e771e0bf3d1b771a3180739b6896cec911758145b"
 
 # for Fsp.fd, we don't rely on a download. Instead,
 # we copy from coreboot.git. The file is defined
@@ -10,6 +11,8 @@ DL_url_bkup="https://web.archive.org/web/20230822134231/https://download.asrock.
 # and inserted to CBFS with names CONFIG_FSP_S_CBFS and CONFIG_FSP_M_CBFS
 #
 FSPFD_hash="c500166a8553a80ba8db8b8185a896e0ae1562ea3c139e07acd9e7937baf8110ba743cc79b69db09a5f39c076d1d22bc45045223975f46aea2034ba82a6b0360"
+FSPM_bin_hash="b15712a53f4d16f36b384beb6dbb716c0b0924751d6ca1e229cd4b8c03aef9eda025c235af247e53dac94d94b79559623974d0d21c7f97e125d8ecc2c86bf03f"
+FSPS_bin_hash="64ac9f93e43efddc35931e168d6594c2b39fb5a0da863d22f2d000d7eacc0692b07ce89389cbb1c5b95ff9b2bba508c538e37d0e644fcab7b2cada773da65ce6"
 
 # We will use deguard to disable the Intel Boot Guard:
 ME11bootguard="y"
diff --git a/config/vendor/e6400/pkg.cfg b/config/vendor/e6400/pkg.cfg
index c5962480..21d1e69d 100644
--- a/config/vendor/e6400/pkg.cfg
+++ b/config/vendor/e6400/pkg.cfg
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 E6400_VGA_DL_hash="6217d5fce2291d15bb0649fd2faaeb78e4c48962b07a2bea6af60466bfdc5f233af0d077c2c6e71dd96047bdbb1f612324cef0a5e728ba9a9ec5c69a4022cd8d"
+E6400_VGA_bin_hash="24fb3d934afca13bd2b43ec958aa2f69654e0f8ee2dd6ca910350a738dea22cfd7f69626093e047566b27c0dd9f3595beeacaad7812fc7f6a13970e49e7b60f3"
 E6400_VGA_DL_url="https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe"
 E6400_VGA_DL_url_bkup="https://web.archive.org/web/20230506014903/https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe"
 E6400_VGA_offset="274451"
diff --git a/config/vendor/haswell/pkg.cfg b/config/vendor/haswell/pkg.cfg
index e9722a11..401736b5 100644
--- a/config/vendor/haswell/pkg.cfg
+++ b/config/vendor/haswell/pkg.cfg
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 DL_hash="f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998"
+ME_bin_hash="8629caded7efd2aa234cc378b7118f0d300402537b8aff6aa3d9b895c6b14590a79cb02d1db7a91de36d36f5612386fc99ddcb57c9d78b1e75b5864e68763de1"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe"
 DL_url_bkup="https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe"
diff --git a/config/vendor/hp2170p/pkg.cfg b/config/vendor/hp2170p/pkg.cfg
index 77cbd08b..192bcf41 100644
--- a/config/vendor/hp2170p/pkg.cfg
+++ b/config/vendor/hp2170p/pkg.cfg
@@ -1,8 +1,11 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+ME_bin_hash="672240d231a723ea7fac112262fdc28884c43a5be9b231dfae838c7a1edc86140da38983079d23ab5ac8e6c74611b65da4872ecbab3ec979c680d3f526eb91ed"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 EC_hash="940e533b6a276c13a6e46a93795ca84b19877b05e82c0c1795b7fea9cbea63c28e606ef994352fc77c4fdfb2e0c31c5edeefa98b989e1990364dfc6417b25460"
 EC_url="https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96088.exe"
 EC_url_bkup="https://web.archive.org/web/20230909164345/https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96088.exe"
+EC_FW1_hash="44a27359e8e2ecfae910a754617d5ee947d6bba976f2eb53114a97c71b64813da7ab4223749706c9bbcaf1e752c190834ee3b41c297c191b3cac200814e02938"
+EC_FW2_hash="09c5b8bab6f258a0303ac502b4900cd4277bd6c43bfd2ef0030df6e918ef3300d04d2979373f8b05f77d1eae1c27ebd01856426b8eed6f215e1fcaed68e0977e"
diff --git a/config/vendor/hp2560p/pkg.cfg b/config/vendor/hp2560p/pkg.cfg
index f7c7cd14..52b9394d 100644
--- a/config/vendor/hp2560p/pkg.cfg
+++ b/config/vendor/hp2560p/pkg.cfg
@@ -1,8 +1,11 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3"
+ME_bin_hash="6a7eb169a01581682a2ecf4b284c1689eb7746cc80aa16ea1ce35d1a1c47a92664b5240defd62535e9707c3f3d42abfb62da3254b97e569de178099f7683c858"
 DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
 DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
 EC_hash="a602cc7627c569bc423a5857cf506fbc3bcd68cb6b43a7c1b99d12a569b4107c412748cf49605ef4d5b930eb14b6815c4d1b1dc20145fe9d707e445fc201cea2"
 EC_url="https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85526.exe"
 EC_url_bkup="https://web.archive.org/web/20230416125725/https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85526.exe"
+EC_FW1_hash="44a27359e8e2ecfae910a754617d5ee947d6bba976f2eb53114a97c71b64813da7ab4223749706c9bbcaf1e752c190834ee3b41c297c191b3cac200814e02938"
+EC_FW2_hash="a05c1eb5433f43e035327d0ae74e9dbd09ecb45f00be656e477ebd5b505ca21bae820e90c29483c4c641591fdd2aebb6b6ea0ecfb879b506bc1a657c01a21bd2"
diff --git a/config/vendor/hp2570p/pkg.cfg b/config/vendor/hp2570p/pkg.cfg
index 9f1a85aa..1df49d73 100644
--- a/config/vendor/hp2570p/pkg.cfg
+++ b/config/vendor/hp2570p/pkg.cfg
@@ -1,8 +1,11 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+ME_bin_hash="672240d231a723ea7fac112262fdc28884c43a5be9b231dfae838c7a1edc86140da38983079d23ab5ac8e6c74611b65da4872ecbab3ec979c680d3f526eb91ed"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 EC_hash="61ed284bdf938c5f36ad3267263fb3963a6608339425bc41aaef3ab0cd98f07c998d816b0233735ca35dc6cb771257da3f09a40d5cfc96bb6388b4366348275e"
 EC_url="https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96085.exe"
 EC_url_bkup="https://web.archive.org/web/20230610174558/https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96085.exe"
+EC_FW1_hash="44a27359e8e2ecfae910a754617d5ee947d6bba976f2eb53114a97c71b64813da7ab4223749706c9bbcaf1e752c190834ee3b41c297c191b3cac200814e02938"
+EC_FW2_hash="d4afcad4960253af674f1dcd3a5a044444b7fcfbaa2a993f976997966b579a80d8a1c58b0ed0a47d862312ad81e433834bb1992c79f69d858d8c00e8cd62e1fb"
diff --git a/config/vendor/hp8200sff/pkg.cfg b/config/vendor/hp8200sff/pkg.cfg
index 9d0a34de..dba0b354 100644
--- a/config/vendor/hp8200sff/pkg.cfg
+++ b/config/vendor/hp8200sff/pkg.cfg
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 DL_hash="8fcb691bf84dc1feefc3c84f7cc59eadaabb200477bb3ecba1b050f23f133b0a8c2539015a523f676544c2dff64599bcba7e844e8c31757b90d70bb4485b5664"
+ME_bin_hash="732954bd288a7d7de3b779032476e2bd5a6f64b6971ff3053434d49ab55fd514db9f224e83883215646e50eecf4ecbdb69a65d5957d241e1146424053dd3ba91"
 DL_url="https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe"
 DL_url_bkup="https://web.archive.org/web/20220708171920/https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe"
diff --git a/config/vendor/hp820g2/pkg.cfg b/config/vendor/hp820g2/pkg.cfg
index 308148c5..4a2fdbb3 100644
--- a/config/vendor/hp820g2/pkg.cfg
+++ b/config/vendor/hp820g2/pkg.cfg
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 DL_hash="1ac05a3e4f46426eeb77f89c4aca25ed1ad64479d8fcba6a3ab63a944512bacbc5d148cc7b9c4ff4b8c90a1fb1de4776e46f14aca8021900e0df37246aa0b717"
+ME_bin_hash="ca754e2fd09eb48bc14b2d1b19d3fa3ed1df2297cff2b7d9b68e9002812e745a59a8ca921f26834ae84c0076c64d8dfab75ce113b50e4badafbfb8ab6c14ad2b"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe"
 DL_url_bkup="https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe"
 MRC_url="https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip"
@@ -9,3 +10,5 @@ MRC_hash="3ff1599c52539f0707a07a8664a84ce51cd3fed1569df4bb7aa6722fc8dec0af175425
 MRC_board="samus"
 MRC_refcode_cbtree="fam15h"
 MRC_refcode_gbe="131253"
+MRC_bin_hash="cade33e8664fb92ebb6ce0c92b572f587f047b2832babb6bd30eb221dba76b08d578e189ba1f89cdb4c956aecd092ebd7443adbc30cf3800452b906967cedc11"
+REF_bin_hash="7efa3bdc48d548924b4c57bbadc99a7add91ac8c5eb7f8f98874c2f8583ca0e71e99997186aaf2714c8ca56593e12c80c1aa9e727a462ef9d2c36963042e7d56"
diff --git a/config/vendor/hp8460pintel/pkg.cfg b/config/vendor/hp8460pintel/pkg.cfg
index 1e1da34e..1140e5c9 100644
--- a/config/vendor/hp8460pintel/pkg.cfg
+++ b/config/vendor/hp8460pintel/pkg.cfg
@@ -1,8 +1,11 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3"
+ME_bin_hash="6a7eb169a01581682a2ecf4b284c1689eb7746cc80aa16ea1ce35d1a1c47a92664b5240defd62535e9707c3f3d42abfb62da3254b97e569de178099f7683c858"
 DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
 DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
 EC_hash="9be5511d7ba07a376583cbd0b7fa4d7dff87ebc94b78d489fd62a14cb7f61eac99670e6a10ce374fe8e3c4bdafabbd1edce7774c3a482c15c2d4207b74ea49ed"
 EC_url="https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85528.exe"
 EC_url_bkup="https://web.archive.org/web/20211231004901/https://ftp.ext.hp.com/pub/softpaq/sp85501-86000/sp85528.exe"
+EC_FW1_hash="44a27359e8e2ecfae910a754617d5ee947d6bba976f2eb53114a97c71b64813da7ab4223749706c9bbcaf1e752c190834ee3b41c297c191b3cac200814e02938"
+EC_FW2_hash="8eba6e0087e42a2f552de3367639b376501d31e8ae1629846496c3eb46ed7d2f9b46531dc245cc2ce5f4a91047fe84a37b350864cdc37530148f456818c0133e"
diff --git a/config/vendor/hp8470pintel/pkg.cfg b/config/vendor/hp8470pintel/pkg.cfg
index 1170f56b..db0b6e69 100644
--- a/config/vendor/hp8470pintel/pkg.cfg
+++ b/config/vendor/hp8470pintel/pkg.cfg
@@ -1,8 +1,11 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+ME_bin_hash="672240d231a723ea7fac112262fdc28884c43a5be9b231dfae838c7a1edc86140da38983079d23ab5ac8e6c74611b65da4872ecbab3ec979c680d3f526eb91ed"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 EC_hash="b95c9cf909ed537fb448e2be69eddcb57459efbaf0a979a73cd2bce90a7014b110f4dbbeecfd596c072636396b8f20c229c59ffe34e45500ce9edb000c6ccaf9"
 EC_url="https://ftp.hp.com/pub/softpaq/sp77501-78000/sp77818.exe"
 EC_url_bkup="https://web.archive.org/web/20230909173821/https://ftp.hp.com/pub/softpaq/sp77501-78000/sp77818.exe"
+EC_FW1_hash="44a27359e8e2ecfae910a754617d5ee947d6bba976f2eb53114a97c71b64813da7ab4223749706c9bbcaf1e752c190834ee3b41c297c191b3cac200814e02938"
+EC_FW2_hash="d7a44b682b1dae7f3cbcc34646b3dd80895a7e2132ab0292b3d42ccf54a9fa447773f7e8e914b0c427adaaad8aa54224e7e146dc72280cf04093956727f41a03"
diff --git a/config/vendor/hp8560w/pkg.cfg b/config/vendor/hp8560w/pkg.cfg
index 629d96d1..224b448c 100644
--- a/config/vendor/hp8560w/pkg.cfg
+++ b/config/vendor/hp8560w/pkg.cfg
@@ -1,8 +1,11 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3"
+ME_bin_hash="6a7eb169a01581682a2ecf4b284c1689eb7746cc80aa16ea1ce35d1a1c47a92664b5240defd62535e9707c3f3d42abfb62da3254b97e569de178099f7683c858"
 DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
 DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
 EC_hash="8e2bc5dca1a1cf0cfc1ac9df74eb6fda333f8ae560019f8182a49d3a716d72938f6cde4aa5ee56942def08207d3ef95706653bd238768fd029da43e9a4fbcc67"
 EC_url="https://ftp.hp.com/pub/softpaq/sp78001-78500/sp78085.exe"
 EC_url_bkup="https://web.archive.org/web/20230402085323/https://ftp.hp.com/pub/softpaq/sp78001-78500/sp78085.exe"
+EC_FW1_hash="44a27359e8e2ecfae910a754617d5ee947d6bba976f2eb53114a97c71b64813da7ab4223749706c9bbcaf1e752c190834ee3b41c297c191b3cac200814e02938"
+EC_FW2_hash="82882406167e7df8ff90d2ea8d93adee59c3e8eb034b6dfcd0ff70cadf8ab3e5acee7262dd344560e118d00b010ed13c18539b042dae0b4b4e6a2c09402aadc4"
diff --git a/config/vendor/hp9470m/pkg.cfg b/config/vendor/hp9470m/pkg.cfg
index 9cdb8143..46f1349b 100644
--- a/config/vendor/hp9470m/pkg.cfg
+++ b/config/vendor/hp9470m/pkg.cfg
@@ -1,8 +1,11 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+ME_bin_hash="672240d231a723ea7fac112262fdc28884c43a5be9b231dfae838c7a1edc86140da38983079d23ab5ac8e6c74611b65da4872ecbab3ec979c680d3f526eb91ed"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 EC_hash="563422bf5420da18b89439f28a38ea28a175f0ad3588f0f5ea39b08dfdd14c8d513cbf11c2125ec3869fc3b7222c7dc3d111415185ea9b73f41410b1b57f13bd"
 EC_url="https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96090.exe"
 EC_url_bkup="http://web.archive.org/web/20220504072602/https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96090.exe"
+EC_FW1_hash="44a27359e8e2ecfae910a754617d5ee947d6bba976f2eb53114a97c71b64813da7ab4223749706c9bbcaf1e752c190834ee3b41c297c191b3cac200814e02938"
+EC_FW2_hash="0d7b446fda5e5cde9570b6df15e4c0ad6b9fad6b425f498669d91bccb4a4bb9a8d22d20f4adb9f116e38df6db3519aae14a6d8fd8cb3075c93ce7c5ae0d8eacb"
diff --git a/config/vendor/ivybridge/pkg.cfg b/config/vendor/ivybridge/pkg.cfg
index d9b2200b..3b3d1091 100644
--- a/config/vendor/ivybridge/pkg.cfg
+++ b/config/vendor/ivybridge/pkg.cfg
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+ME_bin_hash="672240d231a723ea7fac112262fdc28884c43a5be9b231dfae838c7a1edc86140da38983079d23ab5ac8e6c74611b65da4872ecbab3ec979c680d3f526eb91ed"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
diff --git a/config/vendor/sandybridge/pkg.cfg b/config/vendor/sandybridge/pkg.cfg
index bb022043..c243413f 100644
--- a/config/vendor/sandybridge/pkg.cfg
+++ b/config/vendor/sandybridge/pkg.cfg
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3"
+ME_bin_hash="6a7eb169a01581682a2ecf4b284c1689eb7746cc80aa16ea1ce35d1a1c47a92664b5240defd62535e9707c3f3d42abfb62da3254b97e569de178099f7683c858"
 DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
 DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
diff --git a/config/vendor/t1650/pkg.cfg b/config/vendor/t1650/pkg.cfg
index f994b942..47303884 100644
--- a/config/vendor/t1650/pkg.cfg
+++ b/config/vendor/t1650/pkg.cfg
@@ -1,8 +1,10 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+ME_bin_hash="672240d231a723ea7fac112262fdc28884c43a5be9b231dfae838c7a1edc86140da38983079d23ab5ac8e6c74611b65da4872ecbab3ec979c680d3f526eb91ed"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
 SCH5545EC_DL_url="https://dl.dell.com/FOLDER05065992M/1/T1650A28.exe"
 SCH5545EC_DL_url_bkup="https://web.archive.org/web/20230811151654/https://dl.dell.com/FOLDER05065992M/1/T1650A28.exe"
 SCH5545EC_DL_hash="18261d0f7f27e9de3b0b5a25019b9a934ef1a61cd3f0140e34f38553695e91e671e227a8fa962774edceab5c7804d13ed9fe1c518c5643c7c8f15632f903a6c4"
+SCH5545EC_bin_hash="51d9540f73c60ba5e245a8a98c2215d477d3bad9759f1dae94a4fe63652421d8552406817c2482dd6ee3bb55d942bbc0315eab54095544d7956e73112e2d8483"
diff --git a/config/vendor/t1700/pkg.cfg b/config/vendor/t1700/pkg.cfg
index cc100683..979dd7bf 100644
--- a/config/vendor/t1700/pkg.cfg
+++ b/config/vendor/t1700/pkg.cfg
@@ -1,9 +1,11 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 DL_hash="f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998"
+ME_bin_hash="8629caded7efd2aa234cc378b7118f0d300402537b8aff6aa3d9b895c6b14590a79cb02d1db7a91de36d36f5612386fc99ddcb57c9d78b1e75b5864e68763de1"
 DL_url="https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe"
 DL_url_bkup="https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe"
 MRC_url="https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip"
 MRC_url_bkup="https://web.archive.org/web/20220310155922/https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip"
 MRC_hash="3ff1599c52539f0707a07a8664a84ce51cd3fed1569df4bb7aa6722fc8dec0af1754250333b6ca1a9794d970a4de7b29a5cf2499f5b61e4c3eab64d1314aaea9"
+MRC_bin_hash="cade33e8664fb92ebb6ce0c92b572f587f047b2832babb6bd30eb221dba76b08d578e189ba1f89cdb4c956aecd092ebd7443adbc30cf3800452b906967cedc11"
 MRC_board="samus"
diff --git a/config/vendor/t480/pkg.cfg b/config/vendor/t480/pkg.cfg
index 3071f83d..90c31b75 100644
--- a/config/vendor/t480/pkg.cfg
+++ b/config/vendor/t480/pkg.cfg
@@ -2,6 +2,7 @@
 
 # ME firmware (deguard will be used)
 DL_hash="df735a24242792bf4150f30bf0bd4fdbdc0fb6bf0f897ea533df32567be8e084006d692fb6351677f8cc976878c5018667901dbd407b0a77805754f7c101497c"
+ME_bin_hash="fad8bcd2ea2ae9d1a2a1e223f499f15ada0787feb600eab3201669f82b7ade0741194fa86448eff57d7f68c8ebbfc1bf266b4d68aca509ee48db258902a805e7"
 DL_url="https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
 DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
 
@@ -11,6 +12,8 @@ DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLD
 # and inserted to CBFS with names CONFIG_FSP_S_CBFS and CONFIG_FSP_M_CBFS
 #
 FSPFD_hash="c500166a8553a80ba8db8b8185a896e0ae1562ea3c139e07acd9e7937baf8110ba743cc79b69db09a5f39c076d1d22bc45045223975f46aea2034ba82a6b0360"
+FSPM_bin_hash="b15712a53f4d16f36b384beb6dbb716c0b0924751d6ca1e229cd4b8c03aef9eda025c235af247e53dac94d94b79559623974d0d21c7f97e125d8ecc2c86bf03f"
+FSPS_bin_hash="64ac9f93e43efddc35931e168d6594c2b39fb5a0da863d22f2d000d7eacc0692b07ce89389cbb1c5b95ff9b2bba508c538e37d0e644fcab7b2cada773da65ce6"
 
 # We will use deguard to disable the Intel Boot Guard:
 ME11bootguard="y"
@@ -27,3 +30,4 @@ TBFW_url="https://download.lenovo.com/pccbbs/mobiles/n24th13w.exe"
 TBFW_url_bkup="https://web.archive.org/web/20241004165955/https://download.lenovo.com/pccbbs/mobiles/n24th13w.exe"
 TBFW_hash="906d916e8ae77e6d146c67c3113cd904e735a7f28cb2fc37e2284758ead5cda8dd4025c1c741fac9162b1eb01cff08fc39a0d4e79c5cec0515f1d3e6447d1323"
 TBFW_size=1048576 # size in bytes, when padding, matching TBFW's flash IC
+TBFW_bin_hash="15aea269e79d92fe651fe613e30febee5459786169f647e5f321b7382892cf2b8fc61aa1afb8a04d0369b71579de54763272ba144673fbfadfefeb384d45c293"
diff --git a/config/vendor/t480s/pkg.cfg b/config/vendor/t480s/pkg.cfg
index a9e3e48b..4c1eeaf1 100644
--- a/config/vendor/t480s/pkg.cfg
+++ b/config/vendor/t480s/pkg.cfg
@@ -1,6 +1,8 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
+# ME firmware (deguard will be used)
 DL_hash="df735a24242792bf4150f30bf0bd4fdbdc0fb6bf0f897ea533df32567be8e084006d692fb6351677f8cc976878c5018667901dbd407b0a77805754f7c101497c"
+ME_bin_hash="1c77371187ef64e719debc75f606c78fc063b8a84f2704f3fa45e9e4d8a9bccec50420d262bbfbc0dd1695e038698b10113a1bc532a33b943321cd0811e40786"
 DL_url="https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
 DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe"
 
@@ -10,6 +12,8 @@ DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLD
 # and inserted to CBFS with names CONFIG_FSP_S_CBFS and CONFIG_FSP_M_CBFS
 #
 FSPFD_hash="c500166a8553a80ba8db8b8185a896e0ae1562ea3c139e07acd9e7937baf8110ba743cc79b69db09a5f39c076d1d22bc45045223975f46aea2034ba82a6b0360"
+FSPM_bin_hash="b15712a53f4d16f36b384beb6dbb716c0b0924751d6ca1e229cd4b8c03aef9eda025c235af247e53dac94d94b79559623974d0d21c7f97e125d8ecc2c86bf03f"
+FSPS_bin_hash="64ac9f93e43efddc35931e168d6594c2b39fb5a0da863d22f2d000d7eacc0692b07ce89389cbb1c5b95ff9b2bba508c538e37d0e644fcab7b2cada773da65ce6"
 
 # We will use deguard to disable the Intel Boot Guard:
 ME11bootguard="y"
@@ -26,3 +30,4 @@ TBFW_url="https://download.lenovo.com/pccbbs/mobiles/n22th11w.exe"
 TBFW_url_bkup="https://web.archive.org/web/20230319003752/https://download.lenovo.com/pccbbs/mobiles/n22th11w.exe"
 TBFW_hash="ef8ec0a41d7faaa0ce514cfb6f8e7e10669c878eff69fbe1b821443b6218f5b31e1b910c8abceecf38d4b11a6e552d90f277c96c7a9c512d605c8b8aea9c1c0c"
 TBFW_size=1048576 # size in bytes, when padding, matching TBFW's flash IC
+TBFW_bin_hash="41672f3ccdbf7a39ffd7d94c5cfb16efd2911be7b980feaa88b0f33777bd679eafdb97019a9c7b1d32cf76297ba0cb81d5b36072f6be96cec2834011249984db"
diff --git a/include/get.sh b/include/get.sh
index 74adb6be..4bcccceb 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -84,8 +84,11 @@ xbmkget()
 	[ "$1" = "curl" ] || [ "$1" = "copy" ] || [ "$1" = "git" ] || \
 	    err "Bad dlop (arg 1): xbmkget $*"
 
+	echk="f" && [ "$1" = "git" ] && echk="d"
+
 	for url in "$2" "$3"; do
-		[ -n "$url" ] && try_file "$url" "$@" && return 0
+		[ -n "$url" ] && try_file "$url" "$@" && \
+		    eval "[ -$echk \"$4\" ] && return 0"
 	done && err "$1 $2 $3 $4: not downloaded"; :
 }
 
@@ -100,11 +103,10 @@ try_file()
 	echk="d" && [ "$2" != "git" ] && echk="f" && \
 	    bad_checksum "$6" "$cached" 2>/dev/null && x_ rm -f "$cached"
 
-	e "$cached" $echk || try_$2 "$cached" "$@" || return 1
-	if e "$5" $echk && [ "$2" != "git" ]; then
-		bad_checksum "$6" "$5" 2>/dev/null && x_ cp "$cached" "$5"
-	fi
-	e "$cached" $echk missing && return 1
+	eval "[ -$echk \"$cached\" ] || try_$2 \"\$cached\" \"\$@\" || return 1"
+	[ "$2" != "git" ] && [ -f "$5" ] && \
+	    bad_checksum "$6" "$5" 2>/dev/null && x_ cp "$cached" "$5"
+	eval "[ -$echk \"$cached\" ] || return 1"
 
 	if [ "$2" = "git" ]; then
 		tmpclone "$cached" "$5" "$6" "$7" || return 1
@@ -113,6 +115,8 @@ try_file()
 		[ "$cached" != "$5" ] && x_ cp "$cached" "$5"
 		bad_checksum "$6" "$5" && x_ rm -f "$5" && return 1; :
 	fi
+
+	eval "[ -$echk \"$5\" ] || return 1"
 }
 
 try_curl()
@@ -146,9 +150,13 @@ try_git()
 
 bad_checksum()
 {
-	[ ! -f "$2" ] || [ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] \
-	    || return 1
-	printf "Bad checksum for file: %s\n" "$2" 1>&2
+	[ ! -f "$2" ] && printf "File '%s' missing (sha512sum '%s')\n" \
+	    "$2" "$1" 1>&2 && return 0
+	fchksum="$(x_ sha512sum "$2" | awk '{print $1}')" || \
+	    err "Can't get sha512sum on '$2' (checking for sha512sum '$1')"
+	[ "$fchksum" != "$1" ] || return 1
+	printf "WARNING: BAD checksum for '%s' - expected '%s', got '%s'\n" \
+	    "$2" "$1" "$fchksum" 1>&2
 	x_ rm -f "$2"
 }
 
diff --git a/include/mrc.sh b/include/mrc.sh
index 70c3bd3c..a132f574 100644
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -10,23 +10,18 @@ extract_mrc()
 {
 	extract_shellball
 	x_ "$cbfstool" "$appdir/"bios.bin extract -n mrc.bin \
-	    -f "$_dest" -r RO_SECTION
-
-	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && extract_refcode extra; :
+	    -f "$_pre_dest" -r RO_SECTION
 }
 
 extract_refcode()
 {
-	_refdest="${CONFIG_REFCODE_BLOB_FILE##*../}"
-	e "$_refdest" f && return 0
-
-	[ $# -lt 1 ] && extract_shellball
+	extract_shellball
 
 	# cbfstool after coreboot 4.13 changed the stage file attribute scheme,
 	# and refcode is extracted from an image using the old scheme. we use
 	# cbfstool from coreboot 4.11_branch, the tree used by ASUS KGPE-D16
 	chkvars cbfstoolref
-	x_ mkdir -p "${_refdest%/*}"
+	x_ mkdir -p "${_pre_dest%/*}"
 
 	x_ "$cbfstoolref" "$appdir/bios.bin" extract \
 	    -m x86 -n fallback/refcode -f "$appdir/ref" -r RO_SECTION
@@ -35,7 +30,7 @@ extract_refcode()
 	[ -z "$MRC_refcode_gbe" ] || x_ dd if="config/ifd/hp820g2/1.bin" \
 	    of="$appdir/ref" bs=1 seek=$MRC_refcode_gbe count=1 conv=notrunc; :
 
-	x_ mv "$appdir/ref" "$_refdest"
+	x_ mv "$appdir/ref" "$_pre_dest"
 }
 
 extract_shellball()
diff --git a/include/vendor.sh b/include/vendor.sh
index 823ba74f..8a71ad5b 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -22,12 +22,12 @@ vfix="DO_NOT_FLASH_YET._FIRST,_INJECT_FILES_VIA_INSTRUCTIONS_ON_LIBREBOOT.ORG_"
 
 # lbmk-specific extension to the "cv" variable (not suitable for cbmk)
 cvchk="CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
-    CONFIG_KBC1126_FIRMWARE CONFIG_LENOVO_TBFW_BIN CONFIG_VGA_BIOS_FILE \
-    CONFIG_FSP_M_FILE CONFIG_FSP_S_FILE"
+    CONFIG_LENOVO_TBFW_BIN CONFIG_VGA_BIOS_FILE CONFIG_FSP_M_FILE \
+    CONFIG_FSP_S_FILE CONFIG_KBC1126_FW1 CONFIG_KBC1126_FW2"
 
 # lbmk-specific extensions to the "cv" variable (not suitable for cbmk)
-cvxbmk="CONFIG_ME_BIN_PATH CONFIG_SMSC_SCH5545_EC_FW_FILE CONFIG_KBC1126_FW1 \
-    CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2_OFFSET \
+cvxbmk="CONFIG_ME_BIN_PATH CONFIG_SMSC_SCH5545_EC_FW_FILE \
+    CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2_OFFSET \
     CONFIG_VGA_BIOS_ID CONFIG_BOARD_DELL_E6400 CONFIG_FSP_S_CBFS \
     CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE CONFIG_FSP_FD_PATH \
     CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_FSP_M_CBFS \
@@ -40,7 +40,9 @@ eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     kbc1126_ec_dump MRC_refcode_cbtree _dl SCH5545EC_DL_url EC_url rom DL_url \
     nukemode cbfstoolref FSPFD_hash _7ztest ME11bootguard ME11delta xromsize \
     ME11version ME11sku ME11pch _me _metmp mfs TBFW_url_bkup TBFW_url cbdir \
-    TBFW_hash TBFW_size hashfile EC_url_bkup`"
+    TBFW_hash TBFW_size hashfile EC_url_bkup FSPM_bin_hash FSPS_bin_hash \
+    EC_FW1_hash EC_FW2_hash ME_bin_hash MRC_bin_hash REF_bin_hash _dl_bin \
+    SCH5545EC_bin_hash TBFW_bin_hash E6400_VGA_bin_hash _pre_dest`"
 
 download()
 {
@@ -52,24 +54,34 @@ download()
 getfiles()
 {
 	[ -z "$CONFIG_HAVE_ME_BIN" ] || fetch intel_me "$DL_url" \
-	    "$DL_url_bkup" "$DL_hash" "$CONFIG_ME_BIN_PATH"
+	    "$DL_url_bkup" "$DL_hash" "$CONFIG_ME_BIN_PATH" "curl" \
+	    "$ME_bin_hash"
 	[ -z "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" ] || fetch sch5545ec \
 	    "$SCH5545EC_DL_url" "$SCH5545EC_DL_url_bkup" "$SCH5545EC_DL_hash" \
-	    "$CONFIG_SMSC_SCH5545_EC_FW_FILE"
-	[ -z "$CONFIG_KBC1126_FIRMWARE" ] || fetch kbc1126ec "$EC_url" \
-	    "$EC_url_bkup" "$EC_hash" "$CONFIG_KBC1126_FW1"
+	    "$CONFIG_SMSC_SCH5545_EC_FW_FILE" "curl" "$SCH5545EC_bin_hash"
+	[ -z "$CONFIG_KBC1126_FW1" ] || fetch kbc1126ec "$EC_url" \
+	    "$EC_url_bkup" "$EC_hash" "$CONFIG_KBC1126_FW1" "curl" \
+	    "$EC_FW1_hash"
+	[ -z "$CONFIG_KBC1126_FW2" ] || fetch kbc1126ec "$EC_url" \
+	    "$EC_url_bkup" "$EC_hash" "$CONFIG_KBC1126_FW2" "curl" \
+	    "$EC_FW2_hash"
 	[ -z "$CONFIG_VGA_BIOS_FILE" ] || fetch e6400vga "$E6400_VGA_DL_url" \
-	  "$E6400_VGA_DL_url_bkup" "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
+	    "$E6400_VGA_DL_url_bkup" "$E6400_VGA_DL_hash" \
+	    "$CONFIG_VGA_BIOS_FILE" "curl" "$E6400_VGA_bin_hash"
 	[ -z "$CONFIG_HAVE_MRC" ] || fetch "mrc" "$MRC_url" "$MRC_url_bkup" \
-	    "$MRC_hash" "$CONFIG_MRC_FILE"
-	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && fetch "refcode" "$MRC_url" \
-	    "$MRC_url_bkup" "$MRC_hash" "$CONFIG_REFCODE_BLOB_FILE"
+	    "$MRC_hash" "$CONFIG_MRC_FILE" "curl" "$MRC_bin_hash"
+	[ -z "$CONFIG_REFCODE_BLOB_FILE" ] || fetch "refcode" "$MRC_url" \
+	    "$MRC_url_bkup" "$MRC_hash" "$CONFIG_REFCODE_BLOB_FILE" "curl" \
+	    "$REF_bin_hash"
 	[ -z "$CONFIG_LENOVO_TBFW_BIN" ] || fetch "tbfw" "$TBFW_url" \
-	    "$TBFW_url_bkup" "$TBFW_hash" "$CONFIG_LENOVO_TBFW_BIN"
+	    "$TBFW_url_bkup" "$TBFW_hash" "$CONFIG_LENOVO_TBFW_BIN" "curl" \
+	    "$TBFW_bin_hash"
 	[ -z "$CONFIG_FSP_M_FILE" ] || fetch "fsp" "$CONFIG_FSP_FD_PATH" \
-	    "$CONFIG_FSP_FD_PATH" "$FSPFD_hash" "$CONFIG_FSP_M_FILE" copy
+	    "$CONFIG_FSP_FD_PATH" "$FSPFD_hash" "$CONFIG_FSP_M_FILE" "copy" \
+	    "$FSPM_bin_hash"
 	[ -z "$CONFIG_FSP_S_FILE" ] || fetch "fsp" "$CONFIG_FSP_FD_PATH" \
-	    "$CONFIG_FSP_FD_PATH" "$FSPFD_hash" "$CONFIG_FSP_S_FILE" copy; :
+	    "$CONFIG_FSP_FD_PATH" "$FSPFD_hash" "$CONFIG_FSP_S_FILE" "copy" \
+	    "$FSPS_bin_hash"; :
 }
 
 fetch()
@@ -79,9 +91,18 @@ fetch()
 	dl_bkup="$3"
 	dlsum="$4"
 	_dest="${5##*../}"
+	_pre_dest="$XBMK_CACHE/tmpdl/check" || err "!fetch, mktemp, $*"
+	dlop="$6"
+	binsum="$7"
 
 	[ "$5" = "/dev/null" ] && return 0
-	_dl="$XBMK_CACHE/file/$dlsum"
+	_dl="$XBMK_CACHE/file/$dlsum" # internet file to extract from e.g. .exe
+	_dl_bin="$XBMK_CACHE/file/$binsum" # extracted file e.g. me.bin
+
+	# an extracted vendor file will be placed in pre_dest first, for
+	# verifying its checksum. if it matches, it is later moved to _dest
+	remkdir "${_pre_dest%/*}" "$appdir"
+
 	# HACK: if grabbing fsp from coreboot, fix the path for lbmk
 	[ "$dl_type" = "fsp" ] && for _cdl in dl dl_bkup; do
 		eval "$_cdl=\"\${$_cdl##*../}\"; _cdp=\"\$$_cdl\""
@@ -89,20 +110,43 @@ fetch()
 		[ -f "$_cdp" ] && eval "$_cdl=\"$_cdp\""
 	done; :
 
-	dlop="curl" && [ $# -gt 5 ] && dlop="$6"
+	# download the file (from the internet) to extract from
 	xbmkget "$dlop" "$dl" "$dl_bkup" "$_dl" "$dlsum"
-
 	x_ rm -Rf "${_dl}_extracted"
-	e "$_dest" f && return 0
+
+	# skip extraction if a cached extracted file exists
+	( xbmkget copy "$_dl_bin" "$_dl_bin" "$_dest" "$binsum" 2>/dev/null ) \
+	    || :
+	[ -f "$_dest" ] && return 0
 
 	x_ mkdir -p "${_dest%/*}"
-	remkdir "$appdir"
 	[ "$dl_type" = "fsp" ] || extract_archive "$_dl" "$appdir" || \
 	    [ "$dl_type" = "e6400vga" ] || err "$_dest $dl_type: !extract"
 
 	x_ extract_$dl_type "$_dl" "$appdir"
 	set -u -e
-	e "$_dest" f missing && err "!extract_$dl_type"; :
+
+	# some functions don't output directly to the given file, _pre_dest.
+	# instead, they put multiple files there, but we need the one matching
+	# the given hashsum. So, search for a matching file via bruteforce:
+	( fx_ "eval mkdst \"$binsum\"" x_ find "${_pre_dest%/*}" -type f ) || :
+
+	[ -f "$_dest" ] && return 0
+	[ -z "$binsum" ] && \
+	    printf "'%s', '%s': checksum undefined. Check files in '%s'\n" \
+	    "$board" "$_dest" "${_pre_dest%/*}" 1>&2
+	e "$_dest" f not && err "missing file '$_dest', !extract_$dl_type"; :
+	e "$_dest" f && printf "WARNING: '%s' exists but has bad checksum" \
+	    "$_dest"
+	err "Could not safely extract '$_dest', for board '$board'"
+}
+
+mkdst()
+{
+	bad_checksum "$1" "$2" && x_ rm -f "$2" && return 0
+	x_ mv "$2" "$_dl_bin"
+	x_ cp "$_dl_bin" "$_dest"
+	exit 1
 }
 
 extract_intel_me()
@@ -110,7 +154,6 @@ extract_intel_me()
 	e "$mecleaner" f not && err "$cbdir: me_cleaner missing"
 
 	_7ztest="$xbmklocal/metmp/a"
-	_me="$xbmkpwd/$_dest"
 	_metmp="$xbmklocal/me.bin"
 	x_ rm -f "$_metmp" "$xbmklocal/a"
 
@@ -121,14 +164,14 @@ extract_intel_me()
 	set +u +e
 	x_ rm -Rf "$xbmkpwd/metmp"
 	( fx_ find_me x_ find "$xbmkpwd/$appdir" -type f ) || :
-	[ "$ME11bootguard" != "y" ] && x_ mv "$_metmp" "$_me" && return 0
+	[ "$ME11bootguard" != "y" ] && x_ mv "$_metmp" "$_pre_dest" && return 0
 
 	(
 	x_ cd src/deguard/
 	x_ ./finalimage.py --delta "data/delta/$ME11delta" --version \
 	    "$ME11version" --pch "$ME11pch" --sku "$ME11sku" \
-	    --fake-fpfs data/fpfs/zero --input "$_metmp" --output "$_me"
-	) || err "Error running deguard for $_me"; :
+	    --fake-fpfs data/fpfs/zero --input "$_metmp" --output "$_pre_dest"
+	) || err "Error running deguard for $_dest"; :
 }
 
 find_me()
@@ -165,7 +208,7 @@ extract_kbc1126ec()
 	) || err "$board: can't extract kbc1126 ec firmware"
 
 	x_ e "$appdir/ec.bin.fw1" f && x_ e "$appdir/ec.bin.fw2" f
-	x_ cp "$appdir/"ec.bin.fw* "${_dest%/*}/"
+	x_ cp "$appdir/"ec.bin.fw* "${_pre_dest%/*}/"
 }
 
 extract_e6400vga()
@@ -178,7 +221,7 @@ extract_e6400vga()
 	x_ e "bios.bin" f
 	"$e6400_unpack" bios.bin || printf "TODO: fix dell extract util\n"
 	) || err "can't extract e6400 vga rom"
-	x_ cp "$appdir/$E6400_VGA_romname" "$_dest"
+	x_ cp "$appdir/$E6400_VGA_romname" "$_pre_dest"
 }
 
 extract_sch5545ec()
@@ -191,26 +234,27 @@ extract_sch5545ec()
 	_sch5545ec_fw="$_sch5545ec_fw/0 Raw section/body.bin" # <-- this!
 
 	x_ "$uefiextract" "$_bios"
-	x_ cp "$_sch5545ec_fw" "$_dest"
+	x_ cp "$_sch5545ec_fw" "$_pre_dest"
 }
 
 # Lenovo ThunderBolt firmware updates:
 # https://pcsupport.lenovo.com/us/en/products/laptops-and-netbooks/thinkpad-t-series-laptops/thinkpad-t480-type-20l5-20l6/20l5/solutions/ht508988
 extract_tbfw()
 {
-	chkvars TBFW_size; fx_ copytb x_ find "$appdir" -type f -name "TBT.bin"
+	chkvars TBFW_size
+	fx_ copytb x_ find "$appdir" -type f -name "TBT.bin"
 }
 
 copytb()
 {
 	[ -f "$1" ] && [ ! -L "$1" ] && x_ dd if=/dev/null of="$1" bs=1 \
-	    seek=$TBFW_size && x_ mv "$1" "$_dest" && return 1; :
+	    seek=$TBFW_size && x_ mv "$1" "$_pre_dest" && return 1; :
 }
 
 extract_fsp()
 {
 	x_ python "$cbdir/3rdparty/fsp/Tools/SplitFspBin.py" split -f "$1" \
-	    -o "${_dest%/*}" -n "Fsp.fd"
+	    -o "${_pre_dest%/*}" -n "Fsp.fd"
 }
 
 setvfile()

From 4313b474a593c5b2e57278c590b7cfb56dec5114 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 16 May 2025 07:03:08 +0100
Subject: [PATCH 1461/1549] vendor.sh: additional safety check

the exit from mkdst can also be non-zero if mv or cp
failed, but there's no way to handle that reliably.

therefore, the checksum verification should be done
one final time, to compensate.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 8a71ad5b..7dcf9757 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -131,7 +131,7 @@ fetch()
 	# the given hashsum. So, search for a matching file via bruteforce:
 	( fx_ "eval mkdst \"$binsum\"" x_ find "${_pre_dest%/*}" -type f ) || :
 
-	[ -f "$_dest" ] && return 0
+	bad_checksum "$binsum" "$_dest" || [ ! -f "$_dest" ] || return 0
 	[ -z "$binsum" ] && \
 	    printf "'%s', '%s': checksum undefined. Check files in '%s'\n" \
 	    "$board" "$_dest" "${_pre_dest%/*}" 1>&2

From 6a2ed9428b7528da5c3953a89797d9bfb6d8f7f3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 16 May 2025 08:20:17 +0100
Subject: [PATCH 1462/1549] vendor.sh: Fix broken KBC1126 insertion

On release archives, I overlooked the previous change to
downloads, during the recent implementation of extra safety
checks. I previously checked there whether the variable named
CONFIG_KBC1126_FIRMWARE was defined, and grabbed both; now I
check CONFIG_KBC1126_FW1 and CONFIG_KBC1126_FW2 separately,
grabbing each file separately.

This patch replicates that change for insertions. Otherwise,
hash verification on ROM images will fail, when running the
inject script on release images.

Downloading was being done, reliably, and the extracted files
were correct, so there was no danger if the user was building
from source and flashing that way.

However, checksum verification on full images failed when
inserting into archives. This is not because the files were
wrong; they were *correct*. However, the EC firmware was not
being inserted *at all* on HP EliteBooks, because of this
oversight. The check is now based on whether the paths to
the files themselves are defined, not whether EC firmware
is enabled in the coreboot config; the latter is implied.

With this patch, vendor file insertion once again works
perfectly, without error, on every board. There was no real
danger for users, just a minor inconvenience. Sorry!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 7dcf9757..5d7ea82b 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -346,9 +346,10 @@ add_vfiles()
 	[ "$CONFIG_HAVE_MRC" = "y" ] && vfile "mrc.bin" "$CONFIG_MRC_FILE" \
 	    "mrc" "0xfffa0000"
 	[ "$CONFIG_HAVE_ME_BIN" = "y" ] && vfile IFD "$CONFIG_ME_BIN_PATH" me
-	[ "$CONFIG_KBC1126_FIRMWARE" = "y" ] && vfile ecfw1.bin \
-	    "$CONFIG_KBC1126_FW1" raw "$CONFIG_KBC1126_FW1_OFFSET" && vfile \
-	    ecfw2.bin "$CONFIG_KBC1126_FW2" raw "$CONFIG_KBC1126_FW2_OFFSET"
+	[ -n "$CONFIG_KBC1126_FW1" ] && vfile ecfw1.bin \
+	    "$CONFIG_KBC1126_FW1" raw "$CONFIG_KBC1126_FW1_OFFSET"
+	[ -n "$CONFIG_KBC1126_FW2" ] && vfile ecfw2.bin \
+	    "$CONFIG_KBC1126_FW2" raw "$CONFIG_KBC1126_FW2_OFFSET"
 	[ -n "$CONFIG_VGA_BIOS_FILE" ] && [ -n "$CONFIG_VGA_BIOS_ID" ] && \
 	  vfile "pci$CONFIG_VGA_BIOS_ID.rom" "$CONFIG_VGA_BIOS_FILE" optionrom
 	[ "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" = "y" ] && \

From 6dea381614d01abb58a3534cc62c2346ba654beb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 17 May 2025 09:46:54 +0100
Subject: [PATCH 1463/1549] get.sh: fix bad mkdir command

this is the mkdir call that createsn the directory where
a cached git repository is moved to, during creation.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/get.sh b/include/get.sh
index 4bcccceb..c9bf840d 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -139,7 +139,7 @@ try_git()
 	x_ rm -Rf "$tmpgitcache"
 
 	[ -d "$gitdest" ] || ( x_ git clone "$2" "$tmpgitcache" ) || return 1
-	[ -d "$gitdest" ] || x_ mkdir -p "${gitdest##*/}"
+	[ -d "$gitdest" ] || x_ mkdir -p "${gitdest%/*}"
 	[ -d "$gitdest" ] || x_ mv "$tmpgitcache" "$gitdest"
 
 	( x_ git -C "$gitdest" remote add main "$4" 2>/dev/null ) || :

From d2564fd9457c1fd7533c02341769483e81e9667f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 17 May 2025 11:08:06 +0100
Subject: [PATCH 1464/1549] get.sh: simplify tmpclone()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index c9bf840d..c6c6b75b 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -109,7 +109,7 @@ try_file()
 	eval "[ -$echk \"$cached\" ] || return 1"
 
 	if [ "$2" = "git" ]; then
-		tmpclone "$cached" "$5" "$6" "$7" || return 1
+		[ -d "$5" ] || tmpclone "$cached" "$5" "$6" "$7" || return 1
 	else
 		bad_checksum "$6" "$cached" && x_ rm -f "$cached" && return 1
 		[ "$cached" != "$5" ] && x_ cp "$cached" "$5"
@@ -162,7 +162,6 @@ bad_checksum()
 
 tmpclone()
 {
-	[ -d "$2" ] && return 0
 	printf "Creating git clone '%s' from '%s'\n" "$2" "$1"
 	( x_ git clone "$1" "$2" ) || return 1
 	( x_ git -C "$2" reset --hard "$3" ) || return 1

From 840d6a1d2770e765db63c4e1114f2b8adaa2029e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 17 May 2025 11:54:14 +0100
Subject: [PATCH 1465/1549] get.sh: FURTHER simplify nuke()

this is getting almost comical now

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index c6c6b75b..3448a668 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -15,7 +15,7 @@ fetch_targets()
 	printf "Creating %s tree %s\n" "$project" "$tree"
 	git_prep "$url" "$bkup_url" "$xbmkpwd/$configdir/$tree/patches" \
 	    "src/$project/$tree" with_submodules
-	( fx_ nuke find "$xbmkpwd/config" -type f -name "nuke.list" ) || exit 1
+	( fx_ nuke find config -type f -name "nuke.list" ) || err; :
 }
 
 fetch_project()
@@ -31,7 +31,7 @@ fetch_project()
 		x_ ./mk -f $d
 	done
 	clone_project
-	( fx_ nuke find "$xbmkpwd/config" -type f -name "nuke.list" ) || exit 1
+	( fx_ nuke find config -type f -name "nuke.list" ) || err; :
 }
 
 clone_project()
@@ -170,7 +170,6 @@ tmpclone()
 
 nuke()
 {
-	rdir="${1#"$xbmkpwd/config/"}" && [ -d "$xbmkpwd/src/${rdir%/*}" ] && \
-	    x_ cd "$xbmkpwd/src/${rdir%/*}" && \
-	    dx_ "eval [ -L \"\$fx\" ] || x_ rm -Rf" "$1"; :
+	r="${1#config/}" && r="$xbmkpwd/src/${r%/*}" && [ -d "$r" ] && x_ cd \
+	    "$r" && dx_ "eval [ -L \"\$fx\" ] || x_ rm -Rf" "$xbmkpwd/$1"; :
 }

From dbe109d7b541af4c218620dee7c3523bad6ed1fc Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 17 May 2025 12:43:25 +0100
Subject: [PATCH 1466/1549] release.sh: don't move src/docs/

otherwise, ./mk -b (without argument) will fail, on release
archives. also, perhaps i should add an mkhelper to build it?

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/release.sh b/include/release.sh
index f0799f17..7a7b96fd 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -54,7 +54,6 @@ prep_release_src()
 	x_ ./mk -f
 	fx_ "x_ rm -Rf" x_ find . -name ".git"
 	fx_ "x_ rm -Rf" x_ find . -name ".gitmodules"
-	x_ mv src/docs docs
 }
 
 prep_release_tarball()

From 136bd66c2809dcdb1b9475687101332f2d91d4cb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 17 May 2025 13:00:17 +0100
Subject: [PATCH 1467/1549] mrc.sh: merge extract_mrc with extract_shellball

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/mrc.sh | 16 ++++++----------
 1 file changed, 6 insertions(+), 10 deletions(-)

diff --git a/include/mrc.sh b/include/mrc.sh
index a132f574..775831f8 100644
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -6,16 +6,9 @@
 
 eval "`setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL`"
 
-extract_mrc()
-{
-	extract_shellball
-	x_ "$cbfstool" "$appdir/"bios.bin extract -n mrc.bin \
-	    -f "$_pre_dest" -r RO_SECTION
-}
-
 extract_refcode()
 {
-	extract_shellball
+	extract_mrc
 
 	# cbfstool after coreboot 4.13 changed the stage file attribute scheme,
 	# and refcode is extracted from an image using the old scheme. we use
@@ -33,7 +26,7 @@ extract_refcode()
 	x_ mv "$appdir/ref" "$_pre_dest"
 }
 
-extract_shellball()
+extract_mrc()
 {
 	chkvars "MRC_board" "CONFIG_MRC_FILE"
 	SHELLBALL="chromeos-firmwareupdate-$MRC_board"
@@ -42,7 +35,10 @@ extract_shellball()
 	x_ cd "$appdir"
 	extract_partition "${MRC_url##*/}"
 	extract_archive "$SHELLBALL" .
-	) || err "mrc download/extract failure"; :
+	) || err "mrc download/extract failure"
+
+	x_ "$cbfstool" "$appdir/"bios.bin extract -n mrc.bin \
+	    -f "${_pre_dest%/*}/mrc.bin" -r RO_SECTION
 }
 
 extract_partition()

From 587d245cafa630ff252a45297760371ef07a7f15 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 17 May 2025 13:17:09 +0100
Subject: [PATCH 1468/1549] release.sh: simplify prep_release_bin()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/release.sh b/include/release.sh
index 7a7b96fd..618ad633 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -30,7 +30,7 @@ release()
 
 	prep_release src
 	prep_release tarball
-	prep_release bin
+	[ "$relmode" = "src" ] || prep_release bin
 	x_ rm -Rf "$relsrcdir"
 
 	x_ mkdir -p "$reldir"
@@ -70,7 +70,6 @@ prep_release_tarball()
 
 prep_release_bin()
 {
-	[ "$relmode" = "src" ] && return 0
 	x_ ./mk -d coreboot
 	fx_ "x_ ./mk -b" printf \
 	    "coreboot\npico-serprog\nstm32-vserprog\npcsx-redux\n"

From 05c07f7401bf79e6eeb34e12a19ce6d2cabab2ab Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 17 May 2025 15:20:02 +0100
Subject: [PATCH 1469/1549] get.sh: move nuke() to release.sh

we really only need it there, because the context is
for release archives. normal use of the git repository
doesn't matter in the context of deletions, because that
will not be distributed. only the result of ./mk release
will be distributed.

the builds produced will not change as a result of this,
for people using the normal git repository, because the
files in question are never used anyway, in our configs.

this is being done to make working on local repos easier.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh     |  8 --------
 include/release.sh | 29 ++++++++++++++++++-----------
 2 files changed, 18 insertions(+), 19 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index 3448a668..244eb1bb 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -15,7 +15,6 @@ fetch_targets()
 	printf "Creating %s tree %s\n" "$project" "$tree"
 	git_prep "$url" "$bkup_url" "$xbmkpwd/$configdir/$tree/patches" \
 	    "src/$project/$tree" with_submodules
-	( fx_ nuke find config -type f -name "nuke.list" ) || err; :
 }
 
 fetch_project()
@@ -31,7 +30,6 @@ fetch_project()
 		x_ ./mk -f $d
 	done
 	clone_project
-	( fx_ nuke find config -type f -name "nuke.list" ) || err; :
 }
 
 clone_project()
@@ -167,9 +165,3 @@ tmpclone()
 	( x_ git -C "$2" reset --hard "$3" ) || return 1
 	( fx_ "eval x_ git -C \"$2\" am" find "$4" -type f ) || return 1; :
 }
-
-nuke()
-{
-	r="${1#config/}" && r="$xbmkpwd/src/${r%/*}" && [ -d "$r" ] && x_ cd \
-	    "$r" && dx_ "eval [ -L \"\$fx\" ] || x_ rm -Rf" "$xbmkpwd/$1"; :
-}
diff --git a/include/release.sh b/include/release.sh
index 618ad633..1eec8fa9 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 # Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org>
 
-eval "`setvars "" reldir reldest vdir relsrcdir relmode`"
+eval "`setvars "" reldir reldest vdir relsrc relmode`"
 
 release()
 {
@@ -23,15 +23,15 @@ release()
 	    err "already exists: \"$reldest\""
 
 	vdir="$XBMK_CACHE/relpwd/${xbmktmp##*/}/$version"
-	relsrcdir="$vdir/${relname}_src"
+	relsrc="$vdir/${relname}_src"
 
 	remkdir "$vdir"
-	x_ git clone . "$relsrcdir"
+	x_ git clone . "$relsrc"
 
 	prep_release src
 	prep_release tarball
 	[ "$relmode" = "src" ] || prep_release bin
-	x_ rm -Rf "$relsrcdir"
+	x_ rm -Rf "$relsrc"
 
 	x_ mkdir -p "$reldir"
 	x_ mv "$vdir" "$reldir"
@@ -42,9 +42,9 @@ release()
 
 prep_release()
 {
-	x_ touch "$relsrcdir/lock"
+	x_ touch "$relsrc/lock"
 	(
-	[ "$1" = "tarball" ] || x_ cd "$relsrcdir"
+	[ "$1" = "tarball" ] || x_ cd "$relsrc"
 	prep_release_$1
 	) || err "can't prep release $1"
 }
@@ -54,17 +54,24 @@ prep_release_src()
 	x_ ./mk -f
 	fx_ "x_ rm -Rf" x_ find . -name ".git"
 	fx_ "x_ rm -Rf" x_ find . -name ".gitmodules"
+	( fx_ nuke find config -type f -name "nuke.list" ) || err; :
+}
+
+nuke()
+{
+	r="${1#config/}" && r="$relsrc/src/${r%/*}" && [ -d "$r" ] && x_ cd \
+	    "$r" && dx_ "eval [ -L \"\$fx\" ] || x_ rm -Rf" "$relsrc/$1"; :
 }
 
 prep_release_tarball()
 {
 	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
-	    --abbrev-commit > "$relsrcdir/CHANGELOG" || err "!log $relsrcdir"
-	x_ rm -f "$relsrcdir/lock"
-	x_ rm -Rf "$relsrcdir/cache" "$relsrcdir/tmp"
+	    --abbrev-commit > "$relsrc/CHANGELOG" || err "!log $relsrc"
+	x_ rm -f "$relsrc/lock"
+	x_ rm -Rf "$relsrc/cache" "$relsrc/tmp"
 	(
-	x_ cd "${relsrcdir%/*}"
-	x_ mktarball "${relsrcdir##*/}" "${relsrcdir##*/}.tar.xz"
+	x_ cd "${relsrc%/*}"
+	x_ mktarball "${relsrc##*/}" "${relsrc##*/}.tar.xz"
 	) || err "can't create src tarball"; :
 }
 

From 6dc71cc02468a0fce6d5edbc9c9077c09808acf0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 17 May 2025 15:38:20 +0100
Subject: [PATCH 1470/1549] release.sh: simplify nuke() EVEN MORE

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/release.sh b/include/release.sh
index 1eec8fa9..729ae4e6 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -59,8 +59,8 @@ prep_release_src()
 
 nuke()
 {
-	r="${1#config/}" && r="$relsrc/src/${r%/*}" && [ -d "$r" ] && x_ cd \
-	    "$r" && dx_ "eval [ -L \"\$fx\" ] || x_ rm -Rf" "$relsrc/$1"; :
+	r="${1#config/}"; r="$relsrc/src/${r%/*}"; [ -d "$r" ] && x_ cd "$r" \
+	    && dx_ "eval [ -L \"\$fx\" ] || x_ rm -Rf" "$relsrc/$1"; :
 }
 
 prep_release_tarball()

From 47a3982bbeabd46623e7874ab9e139eb59474388 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 17 May 2025 15:49:24 +0100
Subject: [PATCH 1471/1549] release.sh: use x_ on find command for nuke()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/release.sh b/include/release.sh
index 729ae4e6..528156b7 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -54,7 +54,7 @@ prep_release_src()
 	x_ ./mk -f
 	fx_ "x_ rm -Rf" x_ find . -name ".git"
 	fx_ "x_ rm -Rf" x_ find . -name ".gitmodules"
-	( fx_ nuke find config -type f -name "nuke.list" ) || err; :
+	( fx_ nuke x_ find config -type f -name "nuke.list" ) || err; :
 }
 
 nuke()

From 4ca57943d7031c4a38d9dbd565fd58adf2a7c2c2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 17 May 2025 16:03:08 +0100
Subject: [PATCH 1472/1549] release.sh: simplify nuke() EVEN MORE, yet again

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/release.sh b/include/release.sh
index 528156b7..de8551d6 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -59,8 +59,8 @@ prep_release_src()
 
 nuke()
 {
-	r="${1#config/}"; r="$relsrc/src/${r%/*}"; [ -d "$r" ] && x_ cd "$r" \
-	    && dx_ "eval [ -L \"\$fx\" ] || x_ rm -Rf" "$relsrc/$1"; :
+	r="$relsrc/src/${1#config/}"; [ -d "${r%/*}" ] && x_ cd "${r%/*}" && \
+	    dx_ "eval [ -L \"\$fx\" ] || x_ rm -Rf" "$relsrc/$1"; :
 }
 
 prep_release_tarball()

From 01a0217c1e39ef8f665b5499e210fac7d0221416 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 17 May 2025 16:51:12 +0100
Subject: [PATCH 1473/1549] get.sh: simplify bad_checksum()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index 244eb1bb..b83449b7 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -148,14 +148,10 @@ try_git()
 
 bad_checksum()
 {
-	[ ! -f "$2" ] && printf "File '%s' missing (sha512sum '%s')\n" \
-	    "$2" "$1" 1>&2 && return 0
-	fchksum="$(x_ sha512sum "$2" | awk '{print $1}')" || \
-	    err "Can't get sha512sum on '$2' (checking for sha512sum '$1')"
-	[ "$fchksum" != "$1" ] || return 1
-	printf "WARNING: BAD checksum for '%s' - expected '%s', got '%s'\n" \
-	    "$2" "$1" "$fchksum" 1>&2
-	x_ rm -f "$2"
+	[ ! -f "$2" ] && printf "'%s' missing, %s\n" "$2" "$1" 1>&2 && return 0
+	csum="$(x_ sha512sum "$2" | awk '{print $1}')" || err "!sha512 '$2' $1"
+	[ "$csum" != "$1" ] && printf "BAD SHA512, '%s'; need '%s', got %s\n" \
+	    "$2" "$1" "$csum" 1>&2 && x_ rm -f "$2" && return 0; return 1
 }
 
 tmpclone()

From 3c58181f69ee28c954a8844613dee9d4d576ea2c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 17 May 2025 16:52:32 +0100
Subject: [PATCH 1474/1549] get.sh: remove useless message

the user doesn't care where the temporary git repo is

git shows that information anyway, in the git clone command

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/get.sh b/include/get.sh
index b83449b7..667ab398 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -156,7 +156,6 @@ bad_checksum()
 
 tmpclone()
 {
-	printf "Creating git clone '%s' from '%s'\n" "$2" "$1"
 	( x_ git clone "$1" "$2" ) || return 1
 	( x_ git -C "$2" reset --hard "$3" ) || return 1
 	( fx_ "eval x_ git -C \"$2\" am" find "$4" -type f ) || return 1; :

From 44df3b2bff864e7eb42e370d7ac9182799a59fdf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 10:33:23 +0100
Subject: [PATCH 1475/1549] release.sh: tidy up nuke()

i wasn't ok having that variable initialisation and
then the commands on the same line. it looks messy.

having the commands on a separate line makes the code nice
to read, so let's separate them.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/include/release.sh b/include/release.sh
index de8551d6..77281009 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -59,8 +59,9 @@ prep_release_src()
 
 nuke()
 {
-	r="$relsrc/src/${1#config/}"; [ -d "${r%/*}" ] && x_ cd "${r%/*}" && \
-	    dx_ "eval [ -L \"\$fx\" ] || x_ rm -Rf" "$relsrc/$1"; :
+	r="$relsrc/src/${1#config/}"
+	[ -d "${r%/*}" ] && x_ cd "${r%/*}" && \
+	    dx_ "eval [ -L \"\$fx\" ] || x_ rm -Rf" "$relsrc/$1"
 }
 
 prep_release_tarball()

From a3e1ed9823d4750d8e7c5610eecc811e841a35d4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 10:51:03 +0100
Subject: [PATCH 1476/1549] release.sh: rename relsrc to rsrc

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 26 +++++++++++++-------------
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/include/release.sh b/include/release.sh
index 77281009..5d6da466 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 # Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org>
 
-eval "`setvars "" reldir reldest vdir relsrc relmode`"
+eval "`setvars "" reldir reldest vdir rsrc relmode`"
 
 release()
 {
@@ -23,15 +23,15 @@ release()
 	    err "already exists: \"$reldest\""
 
 	vdir="$XBMK_CACHE/relpwd/${xbmktmp##*/}/$version"
-	relsrc="$vdir/${relname}_src"
+	rsrc="$vdir/${relname}_src"
 
 	remkdir "$vdir"
-	x_ git clone . "$relsrc"
+	x_ git clone . "$rsrc"
 
 	prep_release src
 	prep_release tarball
 	[ "$relmode" = "src" ] || prep_release bin
-	x_ rm -Rf "$relsrc"
+	x_ rm -Rf "$rsrc"
 
 	x_ mkdir -p "$reldir"
 	x_ mv "$vdir" "$reldir"
@@ -42,9 +42,9 @@ release()
 
 prep_release()
 {
-	x_ touch "$relsrc/lock"
+	x_ touch "$rsrc/lock"
 	(
-	[ "$1" = "tarball" ] || x_ cd "$relsrc"
+	[ "$1" = "tarball" ] || x_ cd "$rsrc"
 	prep_release_$1
 	) || err "can't prep release $1"
 }
@@ -59,20 +59,20 @@ prep_release_src()
 
 nuke()
 {
-	r="$relsrc/src/${1#config/}"
+	r="$rsrc/src/${1#config/}"
 	[ -d "${r%/*}" ] && x_ cd "${r%/*}" && \
-	    dx_ "eval [ -L \"\$fx\" ] || x_ rm -Rf" "$relsrc/$1"
+	    dx_ "eval [ -L \"\$fx\" ] || x_ rm -Rf" "$rsrc/$1"; :
 }
 
 prep_release_tarball()
 {
 	git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
-	    --abbrev-commit > "$relsrc/CHANGELOG" || err "!log $relsrc"
-	x_ rm -f "$relsrc/lock"
-	x_ rm -Rf "$relsrc/cache" "$relsrc/tmp"
+	    --abbrev-commit > "$rsrc/CHANGELOG" || err "!log $rsrc"
+	x_ rm -f "$rsrc/lock"
+	x_ rm -Rf "$rsrc/cache" "$rsrc/tmp"
 	(
-	x_ cd "${relsrc%/*}"
-	x_ mktarball "${relsrc##*/}" "${relsrc##*/}.tar.xz"
+	x_ cd "${rsrc%/*}"
+	x_ mktarball "${rsrc##*/}" "${rsrc##*/}.tar.xz"
 	) || err "can't create src tarball"; :
 }
 

From ac609d5aae4907f15dcfe21a2d49d9fefe73946f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 10:59:16 +0100
Subject: [PATCH 1477/1549] vendor.sh: Remove _dest if it's bad

Also, provide more ample warning to the user

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 5d7ea82b..add5b052 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -136,8 +136,11 @@ fetch()
 	    printf "'%s', '%s': checksum undefined. Check files in '%s'\n" \
 	    "$board" "$_dest" "${_pre_dest%/*}" 1>&2
 	e "$_dest" f not && err "missing file '$_dest', !extract_$dl_type"; :
-	e "$_dest" f && printf "WARNING: '%s' exists but has bad checksum" \
-	    "$_dest"
+	e "$_dest" f && printf "WARNING: '%s' made with bad hash (will rm)\n" \
+	    "$_dest" 1>&2
+	[ -L "$_dest" ] && printf "WARNING: '%s' is a link. Please delete!\n" \
+	    "$_dest" 1>&2
+	[ -L "$_dest" ] || x_ rm -f "$_dest"
 	err "Could not safely extract '$_dest', for board '$board'"
 }
 

From b48eb161e49d0e40c50c9885072fdb00204230c3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 11:10:57 +0100
Subject: [PATCH 1478/1549] vendor.sh: simplify mksha512sum()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index add5b052..12ae68c0 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -314,7 +314,7 @@ prep()
 		_xrom="$_xromnew"
 	fi
 
-	[ "$nukemode" = "nuke" ] && mksha512sum "$_xrom" "vendorhashes"
+	[ "$nukemode" != "nuke" ] || ( mksha512 "$_xrom" "vendorhashes" ) || err
 
 	add_vfiles "$_xrom" || return 1 # if break return, can still change MAC
 	[ "$nukemode" != "nuke" ] && return 0
@@ -324,12 +324,10 @@ prep()
 	x_ rm -f "$_xrom"
 }
 
-mksha512sum()
+mksha512()
 {
-	(
 	[ "${1%/*}" != "$1" ] && x_ cd "${1%/*}"
 	sha512sum ./"${1##*/}" >> "$2" || err "!sha512sum \"$1\" > \"$2\""
-	) || err "failed to create tarball checksum"
 }
 
 add_vfiles()

From 7ec9ee42283f3722a5c3bfd0050dd32b00a32973 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 11:12:20 +0100
Subject: [PATCH 1479/1549] inject.sh: shorten the nukemode variable name

just call it "nuke". this is what tells whether to remove
vendor files from an archive.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh |  6 +++---
 include/vendor.sh | 24 ++++++++++++------------
 2 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index d4d20568..74f688a1 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -21,7 +21,7 @@ inject()
 
 	set +u +e
 	[ $# -lt 1 ] && err "No options specified"
-	eval "`setvars "" nukemode new_mac xchanged`"
+	eval "`setvars "" nuke new_mac xchanged`"
 
 	archive="$1";
 	new_mac="xx:xx:xx:xx:xx:xx"
@@ -29,7 +29,7 @@ inject()
 	[ $# -gt 1 ] && case "$2" in
 	nuke)
 		new_mac=""
-		nukemode="nuke" ;;
+		nuke="nuke" ;;
 	setmac)
 		[ $# -gt 2 ] && new_mac="$3" && \
 		    [ -z "$new_mac" ] && err "Empty MAC address specified" ;;
@@ -83,7 +83,7 @@ check_target()
 
 patch_release()
 {
-	[ "$nukemode" = "nuke" ] || x_ ./mk download "$board"
+	[ "$nuke" = "nuke" ] || x_ ./mk download "$board"
 
 	has_hashes="n"
 	tmpromdir="$tmpromdel/bin/$board"
diff --git a/include/vendor.sh b/include/vendor.sh
index 12ae68c0..2732eade 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -38,7 +38,7 @@ eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
     E6400_VGA_romname SCH5545EC_DL_url_bkup SCH5545EC_DL_hash _dest mecleaner \
     kbc1126_ec_dump MRC_refcode_cbtree _dl SCH5545EC_DL_url EC_url rom DL_url \
-    nukemode cbfstoolref FSPFD_hash _7ztest ME11bootguard ME11delta xromsize \
+    nuke cbfstoolref FSPFD_hash _7ztest ME11bootguard ME11delta xromsize \
     ME11version ME11sku ME11pch _me _metmp mfs TBFW_url_bkup TBFW_url cbdir \
     TBFW_hash TBFW_size hashfile EC_url_bkup FSPM_bin_hash FSPS_bin_hash \
     EC_FW1_hash EC_FW2_hash ME_bin_hash MRC_bin_hash REF_bin_hash _dl_bin \
@@ -297,13 +297,13 @@ prep()
 	_xrom="$1"
 	_xromname="${1##*/}"
 	_xromnew="${_xrom%/*}/${_xromname#"$vfix"}"
-	[ "$nukemode" = "nuke" ] && _xromnew="${_xrom%/*}/$vfix${_xrom##*/}"
+	[ "$nuke" = "nuke" ] && _xromnew="${_xrom%/*}/$vfix${_xrom##*/}"
 
 	e "$_xrom" f missing && return 0
 	[ -z "${_xromname#"$vfix"}" ] && err "$_xromname / $vfix: name match"
 
 	# Remove the prefix and 1-byte pad
-	if [ "$nukemode" != "nuke" ] && \
+	if [ "$nuke" != "nuke" ] && \
 	    [ "${_xromname#"$vfix"}" != "$_xromname" ]; then
 		xromsize="$(expr $(stat -c '%s' "$_xrom") - 1)" || err "!int"
 		[ $xromsize -lt 524288 ] && err "too small, $xromsize: $_xrom"
@@ -314,10 +314,10 @@ prep()
 		_xrom="$_xromnew"
 	fi
 
-	[ "$nukemode" != "nuke" ] || ( mksha512 "$_xrom" "vendorhashes" ) || err
+	[ "$nuke" != "nuke" ] || ( mksha512 "$_xrom" "vendorhashes" ) || err
 
 	add_vfiles "$_xrom" || return 1 # if break return, can still change MAC
-	[ "$nukemode" != "nuke" ] && return 0
+	[ "$nuke" != "nuke" ] && return 0
 
 	# Rename the file, prefixing a warning saying not to flash
 	cat "$_xrom" config/data/coreboot/0 > "$_xromnew" || err "!pad $_xrom"
@@ -334,10 +334,10 @@ add_vfiles()
 {
 	rom="$1"
 
-	if [ "$has_hashes" != "y" ] && [ "$nukemode" != "nuke" ]; then
+	if [ "$has_hashes" != "y" ] && [ "$nuke" != "nuke" ]; then
 		printf "'%s' has no hash file. Skipping.\n" "$archive" 1>&2
 		return 1
-	elif [ "$has_hashes" = "y" ] && [ "$nukemode" = "nuke" ]; then
+	elif [ "$has_hashes" = "y" ] && [ "$nuke" = "nuke" ]; then
 		printf "'%s' has a hash file. Skipping nuke.\n" "$archive" 1>&2
 		return 1
 	fi
@@ -383,14 +383,14 @@ vfile()
 		err "vfile $*, $rom: offset given but empty (undefined)"
 	fi
 
-	[ "$nukemode" = "nuke" ] || x_ e "$_dest" f
+	[ "$nuke" = "nuke" ] || x_ e "$_dest" f
 
 	if [ "$cbfsname" = "IFD" ]; then
-		[ "$nukemode" = "nuke" ] || x_ "$ifdtool" $ifdprefix -i \
+		[ "$nuke" = "nuke" ] || x_ "$ifdtool" $ifdprefix -i \
 		    $_t:$_dest "$rom" -O "$rom"
-		[ "$nukemode" != "nuke" ] || x_ "$ifdtool" $ifdprefix --nuke \
+		[ "$nuke" != "nuke" ] || x_ "$ifdtool" $ifdprefix --nuke \
 		    $_t "$rom" -O "$rom"
-	elif [ "$nukemode" = "nuke" ]; then
+	elif [ "$nuke" = "nuke" ]; then
 		x_ "$cbfstool" "$rom" remove -n "$cbfsname"
 	elif [ "$_t" = "stage" ]; then # the only stage we handle is refcode
 		x_ rm -f "$xbmklocal/refcode"
@@ -407,7 +407,7 @@ vfile()
 check_vendor_hashes()
 {
 	x_ cd "$tmpromdir"
-	[ "$has_hashes" = "n" ] || [ "$nukemode" = "nuke" ] || sha512sum \
+	[ "$has_hashes" = "n" ] || [ "$nuke" = "nuke" ] || sha512sum \
 	    --status -c "$hashfile" || x_ sha1sum --status -c "$hashfile"
 	x_ rm -f "$hashfile"
 }

From cde3b7051e4c9276a35f608e7709e3a7e480b01e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 11:18:45 +0100
Subject: [PATCH 1480/1549] init.sh: return from child in set_env instead

This is earlier than the current check, thus preventing
the initialisation of a git repository and/or the recreation
of xbmktmp and xbmklocal by erroneous parent executions of lbmk
while another parent is running - the latter of which could have
caused a massively unpredictable build failure, so this is also
a pre-emptive bug fix, fixing all kinds of weird bugs.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 2dd9e88f..60dd3dd9 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -146,6 +146,17 @@ xbmk_set_env()
 	[ -z "${XBMK_THREADS+x}" ] && export XBMK_THREADS=1
 	expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
 	    1>/dev/null 2>/dev/null || export XBMK_THREADS=1; :
+
+	# unify all temporary files/directories in a single TMPDIR
+	[ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || \
+	    unset TMPDIR
+	[ -n "${TMPDIR+x}" ] && export TMPDIR="$TMPDIR" && xbmktmp="$TMPDIR"
+	[ -z "${TMPDIR+x}" ] || return 1 # child instance, so return
+
+	# parent instance of xbmk, so don't return. set up TMPDIR
+	export TMPDIR="/tmp"
+	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
+	xbmktmp="$TMPDIR"
 }
 
 xbmk_git_init()
@@ -171,17 +182,6 @@ xbmk_create_tmpdir()
 {
 	x_ mkdir -p "$xbmklocal"
 
-	# unify all temporary files/directories in a single TMPDIR
-	[ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || \
-	    unset TMPDIR
-	[ -n "${TMPDIR+x}" ] && export TMPDIR="$TMPDIR" && xbmktmp="$TMPDIR"
-	[ -z "${TMPDIR+x}" ] || return 1 # child instance, so return
-
-	# parent instance of xbmk, so don't return. set up TMPDIR
-	export TMPDIR="/tmp"
-	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
-	xbmktmp="$TMPDIR"
-
 	# /tmp might be a tmpfs, so for large files we use ./tmp,
 	# not to be confused with xbmktmp (xbmktmp points to /tmp)
 	remkdir "$xbmktmp" "$xbmklocal"

From e05a18d35131acd2007afc56aa07a321f6f2dfdb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 11:21:30 +0100
Subject: [PATCH 1481/1549] init.sh: check the lock file BEFORE git init

this way, initialisation will not be performed erroneously
while another parent instance of lbmk is running.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 60dd3dd9..807174a8 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -31,8 +31,8 @@ xbmk_init()
 	id -u 1>/dev/null 2>/dev/null || err "suid check failed (id -u)"
 	[ "$(id -u)" != "0" ] || err "this command as root is not permitted"
 
-	for init_cmd in set_pyver set_version set_env git_init create_tmpdir \
-	    lock create_pathdirs child_exec; do
+	for init_cmd in set_pyver set_version set_env lock git_init \
+	    create_tmpdir create_pathdirs child_exec; do
 		xbmk_$init_cmd "$@" || break
 	done
 }
@@ -159,6 +159,12 @@ xbmk_set_env()
 	xbmktmp="$TMPDIR"
 }
 
+xbmk_lock()
+{
+	[ -f "$xbmklock" ] && err "'$xbmklock' exists. Is a build running?"
+	touch "$xbmklock" || err "cannot create '$xbmklock'"; :
+}
+
 xbmk_git_init()
 {
 	for gitarg in "--global user.name" "--global user.email"; do
@@ -187,12 +193,6 @@ xbmk_create_tmpdir()
 	remkdir "$xbmktmp" "$xbmklocal"
 }
 
-xbmk_lock()
-{
-	[ -f "$xbmklock" ] && err "'$xbmklock' exists. Is a build running?"
-	touch "$xbmklock" || err "cannot create '$xbmklock'"; :
-}
-
 xbmk_create_pathdirs()
 {
 	remkdir "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"

From 253aa81a3f991b8951c964e62859573b7a971440 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 11:25:35 +0100
Subject: [PATCH 1482/1549] init.sh: move PATH init to set_env

we must only set this in the parent instance, not
child instances. this prevents the variable from
being over-populated with repeated entries.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 807174a8..2c65d0b6 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -12,11 +12,10 @@ projectsite="https://libreboot.org/"
 
 [ -z "${PATH+x}" ] && \
     export PATH="/usr/local/bin:/usr/bin:/bin:/usr/local/games:/usr/games"
-xbmkpath="$PATH"
 
 eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
     datadir version xbmkpwd relname xbmkpwd xbmktmp python pyver xbmklocal \
-    xbmklock cvxbmk cvchk`"
+    xbmklock cvxbmk cvchk xbmkpath`"
 
 xbmk_init()
 {
@@ -123,6 +122,7 @@ xbmk_set_version()
 
 xbmk_set_env()
 {
+	xbmkpath="$PATH"
 	export LOCALVERSION="-$projectname-${version%%-*}"
 
 	# XBMK_CACHE is a directory, for caching downloads and git repon
@@ -157,6 +157,9 @@ xbmk_set_env()
 	export TMPDIR="/tmp"
 	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
 	xbmktmp="$TMPDIR"
+
+	export PATH="$XBMK_CACHE/xbmkpath:$XBMK_CACHE/gnupath:$PATH"
+	xbmkpath="$PATH"
 }
 
 xbmk_lock()
@@ -196,7 +199,6 @@ xbmk_create_tmpdir()
 xbmk_create_pathdirs()
 {
 	remkdir "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
-	export PATH="$XBMK_CACHE/xbmkpath:$XBMK_CACHE/gnupath:$PATH"
 	(
 	# set up python v3.x in PATH, in case it's not set up correctly.
 	# see code above that detected the correct python3 command.

From c75bc0449d01a3a1495e75998b27fbc2a624a2ce Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 11:28:15 +0100
Subject: [PATCH 1483/1549] init.sh: move gnupath creation to create_tmpdir

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/init.sh b/include/init.sh
index 2c65d0b6..ed11dfd3 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -194,11 +194,11 @@ xbmk_create_tmpdir()
 	# /tmp might be a tmpfs, so for large files we use ./tmp,
 	# not to be confused with xbmktmp (xbmktmp points to /tmp)
 	remkdir "$xbmktmp" "$xbmklocal"
+	remkdir "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
 }
 
 xbmk_create_pathdirs()
 {
-	remkdir "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
 	(
 	# set up python v3.x in PATH, in case it's not set up correctly.
 	# see code above that detected the correct python3 command.

From 0343081d9050ca62d188face7d6fb401f43ac883 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 11:28:57 +0100
Subject: [PATCH 1484/1549] init.sh: xbmk_create_tmpdir to xbmk_mkdirs

this function now simply creates directories that lbmk
will use, rather than creating specific directories.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index ed11dfd3..a49879d9 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -31,7 +31,7 @@ xbmk_init()
 	[ "$(id -u)" != "0" ] || err "this command as root is not permitted"
 
 	for init_cmd in set_pyver set_version set_env lock git_init \
-	    create_tmpdir create_pathdirs child_exec; do
+	    mkdirs create_pathdirs child_exec; do
 		xbmk_$init_cmd "$@" || break
 	done
 }
@@ -187,7 +187,7 @@ xbmk_git_init()
 	    2>/dev/null; :
 }
 
-xbmk_create_tmpdir()
+xbmk_mkdirs()
 {
 	x_ mkdir -p "$xbmklocal"
 

From 36ffe6ef501e170d52a54f70713dba8bf88ba5d2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 11:29:54 +0100
Subject: [PATCH 1485/1549] init.sh: remove useless comment

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index a49879d9..b41ca872 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -191,8 +191,6 @@ xbmk_mkdirs()
 {
 	x_ mkdir -p "$xbmklocal"
 
-	# /tmp might be a tmpfs, so for large files we use ./tmp,
-	# not to be confused with xbmktmp (xbmktmp points to /tmp)
 	remkdir "$xbmktmp" "$xbmklocal"
 	remkdir "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
 }

From 4aa69a7d1f02733d3776e7c18ec081ff8182a75e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 11:30:11 +0100
Subject: [PATCH 1486/1549] init.sh: remove useless command

we mkdir -p xbmklocal, only to remkdir it immediately
afterward, which is the intended behaviour; on parent
instances, xbmklocal is to be re-created fresh.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index b41ca872..ccbad2b5 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -189,8 +189,6 @@ xbmk_git_init()
 
 xbmk_mkdirs()
 {
-	x_ mkdir -p "$xbmklocal"
-
 	remkdir "$xbmktmp" "$xbmklocal"
 	remkdir "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
 }

From d0bee6b4ebba914b0ac2f16689bc23c5f6cbf866 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 11:38:11 +0100
Subject: [PATCH 1487/1549] init.sh: Set python version only on parent

Do it after the creation of xbmkpath.

This avoids performing an unnecessary check, since
PATH will have already been corrected for child
instances; Python will already be correct there.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 96 ++++++++++++++++++++++++-------------------------
 1 file changed, 48 insertions(+), 48 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index ccbad2b5..6c45b44d 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -30,8 +30,8 @@ xbmk_init()
 	id -u 1>/dev/null 2>/dev/null || err "suid check failed (id -u)"
 	[ "$(id -u)" != "0" ] || err "this command as root is not permitted"
 
-	for init_cmd in set_pyver set_version set_env lock git_init \
-	    mkdirs create_pathdirs child_exec; do
+	for init_cmd in set_version set_env lock git_init \
+	    mkdirs set_pyver create_pathdirs child_exec; do
 		xbmk_$init_cmd "$@" || break
 	done
 }
@@ -50,52 +50,6 @@ xbmkpkg()
 	    printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; :
 }
 
-xbmk_set_pyver()
-{
-	pyv="import sys; print(sys.version_info[:])"
-	python="python3"
-	pybin python3 1>/dev/null || python="python"
-	pyver="2" && [ "$python" = "python3" ] && pyver="3"
-	pybin "$python" 1>/dev/null || pyver=""
-	[ -z "$pyver" ] || "`pybin "$python"`" -c "$pyv" 1>/dev/null \
-	    2>/dev/null || err "Cannot detect host Python version."
-	[ -n "$pyver" ] && \
-	    pyver="$("$(pybin "$python")" -c "$pyv" | awk '{print $1}')" && \
-	    pyver="${pyver#(}" && pyver="${pyver%,}"
-	[ "${pyver%%.*}" = "3" ] || err "Bad python version (must by 3.x)"; :
-}
-
-# Use direct path, to prevent a hang if Python is using a virtual environment,
-# not command -v, to prevent a hang when checking python's version
-# See: https://docs.python.org/3/library/venv.html#how-venvs-work
-pybin()
-{
-	py="import sys; quit(1) if sys.prefix == sys.base_prefix else quit(0)"
-
-	venv=1
-	command -v "$1" 1>/dev/null 2>/dev/null || venv=0
-	[ $venv -lt 1 ] || "$1" -c "$py" 1>/dev/null 2>/dev/null || venv=0
-
-	# ideally, don't rely on PATH or hardcoded paths if python venv.
-	# use the *real*, direct executable linked to by the venv symlink
-	if [ $venv -gt 0 ] && [ -L "`command -v "$1" 2>/dev/null`" ]; then
-		pypath="$(findpath \
-		    "$(command -v "$1" 2>/dev/null)" 2>/dev/null || :)"
-		[ -e "$pypath" ] && [ ! -d "$pypath" ] && \
-		    [ -x "$pypath" ] && printf "%s\n" "$pypath" && return 0; :
-	fi
-
-	# if python venv: fall back to common PATH directories for checking
-	[ $venv -gt 0 ] && for pypath in "/usr/local/bin" "/usr/bin"; do
-		[ -e "$pypath/$1" ] && [ ! -d "$pypath/$1" ] && \
-		    [ -x "$pypath/$1" ] && printf "%s/%s\n" "$pypath" "$1" && \
-		    return 0
-	done && return 1
-
-	# Defer to normal command -v if not a venv
-	command -v "$1" 2>/dev/null || return 1
-}
-
 xbmk_set_version()
 {
 	[ ! -f ".version" ] || read -r version < ".version" || :; :
@@ -193,6 +147,52 @@ xbmk_mkdirs()
 	remkdir "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
 }
 
+xbmk_set_pyver()
+{
+	pyv="import sys; print(sys.version_info[:])"
+	python="python3"
+	pybin python3 1>/dev/null || python="python"
+	pyver="2" && [ "$python" = "python3" ] && pyver="3"
+	pybin "$python" 1>/dev/null || pyver=""
+	[ -z "$pyver" ] || "`pybin "$python"`" -c "$pyv" 1>/dev/null \
+	    2>/dev/null || err "Cannot detect host Python version."
+	[ -n "$pyver" ] && \
+	    pyver="$("$(pybin "$python")" -c "$pyv" | awk '{print $1}')" && \
+	    pyver="${pyver#(}" && pyver="${pyver%,}"
+	[ "${pyver%%.*}" = "3" ] || err "Bad python version (must by 3.x)"; :
+}
+
+# Use direct path, to prevent a hang if Python is using a virtual environment,
+# not command -v, to prevent a hang when checking python's version
+# See: https://docs.python.org/3/library/venv.html#how-venvs-work
+pybin()
+{
+	py="import sys; quit(1) if sys.prefix == sys.base_prefix else quit(0)"
+
+	venv=1
+	command -v "$1" 1>/dev/null 2>/dev/null || venv=0
+	[ $venv -lt 1 ] || "$1" -c "$py" 1>/dev/null 2>/dev/null || venv=0
+
+	# ideally, don't rely on PATH or hardcoded paths if python venv.
+	# use the *real*, direct executable linked to by the venv symlink
+	if [ $venv -gt 0 ] && [ -L "`command -v "$1" 2>/dev/null`" ]; then
+		pypath="$(findpath \
+		    "$(command -v "$1" 2>/dev/null)" 2>/dev/null || :)"
+		[ -e "$pypath" ] && [ ! -d "$pypath" ] && \
+		    [ -x "$pypath" ] && printf "%s\n" "$pypath" && return 0; :
+	fi
+
+	# if python venv: fall back to common PATH directories for checking
+	[ $venv -gt 0 ] && for pypath in "/usr/local/bin" "/usr/bin"; do
+		[ -e "$pypath/$1" ] && [ ! -d "$pypath/$1" ] && \
+		    [ -x "$pypath/$1" ] && printf "%s/%s\n" "$pypath" "$1" && \
+		    return 0
+	done && return 1
+
+	# Defer to normal command -v if not a venv
+	command -v "$1" 2>/dev/null || return 1
+}
+
 xbmk_create_pathdirs()
 {
 	(

From 484afcb91969b9325c448a6a77ad97a4813f7bfb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 11:40:28 +0100
Subject: [PATCH 1488/1549] init.sh: merge create_pathdirs with set_pyver

all this function does now is create the python symlink,
based on work that was already performed in set_pyver

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 21 +++++++++------------
 1 file changed, 9 insertions(+), 12 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 6c45b44d..13592d83 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -31,7 +31,7 @@ xbmk_init()
 	[ "$(id -u)" != "0" ] || err "this command as root is not permitted"
 
 	for init_cmd in set_version set_env lock git_init \
-	    mkdirs set_pyver create_pathdirs child_exec; do
+	    mkdirs set_pyver child_exec; do
 		xbmk_$init_cmd "$@" || break
 	done
 }
@@ -159,7 +159,14 @@ xbmk_set_pyver()
 	[ -n "$pyver" ] && \
 	    pyver="$("$(pybin "$python")" -c "$pyv" | awk '{print $1}')" && \
 	    pyver="${pyver#(}" && pyver="${pyver%,}"
-	[ "${pyver%%.*}" = "3" ] || err "Bad python version (must by 3.x)"; :
+	[ "${pyver%%.*}" = "3" ] || err "Bad python version (must by 3.x)"
+
+	(
+	# set up python v3.x in PATH, in case it's not set up correctly.
+	# see code above that detected the correct python3 command.
+	x_ cd "$XBMK_CACHE/xbmkpath"
+	x_ ln -s "`pybin "$python"`" python
+	) || err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"; :
 }
 
 # Use direct path, to prevent a hang if Python is using a virtual environment,
@@ -193,16 +200,6 @@ pybin()
 	command -v "$1" 2>/dev/null || return 1
 }
 
-xbmk_create_pathdirs()
-{
-	(
-	# set up python v3.x in PATH, in case it's not set up correctly.
-	# see code above that detected the correct python3 command.
-	x_ cd "$XBMK_CACHE/xbmkpath"
-	x_ ln -s "`pybin "$python"`" python
-	) || err "Can't set up python symlink in $XBMK_CACHE/xbmkpath"; :
-}
-
 xbmk_child_exec()
 {
 	xbmk_rval=0

From ac36ea7f950a88e56be82e046004c9780c9e0803 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 11:54:51 +0100
Subject: [PATCH 1489/1549] init.sh: initialise variables AFTER path

That way, unnecessary work is avoided on child instances.

Of course, the current check assumes that TMPDIR wasn't
already set by a wily user before running lbmk, but then
those sorts of users probably know what they're doing.

If they don't know, they will soon find out. Therefore, I
have added additional checks on child instances, preventing
the build system from running if XBMK_CACHE is not set; if
it isn't, then that could very easy lead to certain system
files being overwritten.

The user must never know what happens if XBMK_CACHE is unset.
We simply will not allow it.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 37 +++++++++++++++++++++++--------------
 1 file changed, 23 insertions(+), 14 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 13592d83..363f0b18 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -76,9 +76,29 @@ xbmk_set_version()
 
 xbmk_set_env()
 {
+	is_child="n"
+
 	xbmkpath="$PATH"
 	export LOCALVERSION="-$projectname-${version%%-*}"
 
+	# unify all temporary files/directories in a single TMPDIR
+	[ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || \
+	    unset TMPDIR
+	[ -n "${TMPDIR+x}" ] && export TMPDIR="$TMPDIR" && xbmktmp="$TMPDIR"
+	[ -z "${TMPDIR+x}" ] || is_child="y" # child instance, so return
+
+	if [ "$is_child" = "y" ]; then
+		[ -z "${XBMK_CACHE+x}" ] && err "XBMK_CACHE unset on child"
+		[ -z "${XBMK_THREADS+x}" ] && err "XBMK_THREADS unset on child"
+		e "lock" f missing && err "lock file absent on child"
+		return 1
+	fi
+
+	# parent instance of xbmk, so don't return. set up TMPDIR
+	export TMPDIR="/tmp"
+	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
+	xbmktmp="$TMPDIR"
+
 	# XBMK_CACHE is a directory, for caching downloads and git repon
 	[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$xbmkpwd/cache"
 	[ -z "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
@@ -91,6 +111,9 @@ xbmk_set_env()
 	[ ! -e "$XBMK_CACHE" ] || \
 	    [ -d "$XBMK_CACHE" ] || err "cachedir '$XBMK_CACHE' is a file"; :
 
+	export PATH="$XBMK_CACHE/xbmkpath:$XBMK_CACHE/gnupath:$PATH"
+	xbmkpath="$PATH"
+
 	# if "y": a coreboot target won't be built if target.cfg says release="n"
 	# (this is used to exclude certain build targets from releases)
 	[ -z "${XBMK_RELEASE+x}" ] && export XBMK_RELEASE="n"
@@ -100,20 +123,6 @@ xbmk_set_env()
 	[ -z "${XBMK_THREADS+x}" ] && export XBMK_THREADS=1
 	expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
 	    1>/dev/null 2>/dev/null || export XBMK_THREADS=1; :
-
-	# unify all temporary files/directories in a single TMPDIR
-	[ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || \
-	    unset TMPDIR
-	[ -n "${TMPDIR+x}" ] && export TMPDIR="$TMPDIR" && xbmktmp="$TMPDIR"
-	[ -z "${TMPDIR+x}" ] || return 1 # child instance, so return
-
-	# parent instance of xbmk, so don't return. set up TMPDIR
-	export TMPDIR="/tmp"
-	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
-	xbmktmp="$TMPDIR"
-
-	export PATH="$XBMK_CACHE/xbmkpath:$XBMK_CACHE/gnupath:$PATH"
-	xbmkpath="$PATH"
 }
 
 xbmk_lock()

From 6b603b9fbf45f6f391f84ecc8ced7896722f6b02 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 12:07:10 +0100
Subject: [PATCH 1490/1549] init.sh: only set xbmk version on parent instance

On child instances, we need only read.

Apply the principle of least privilege.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 363f0b18..e94157f0 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -30,7 +30,7 @@ xbmk_init()
 	id -u 1>/dev/null 2>/dev/null || err "suid check failed (id -u)"
 	[ "$(id -u)" != "0" ] || err "this command as root is not permitted"
 
-	for init_cmd in set_version set_env lock git_init \
+	for init_cmd in get_version set_env lock set_version git_init \
 	    mkdirs set_pyver child_exec; do
 		xbmk_$init_cmd "$@" || break
 	done
@@ -50,7 +50,7 @@ xbmkpkg()
 	    printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; :
 }
 
-xbmk_set_version()
+xbmk_get_version()
 {
 	[ ! -f ".version" ] || read -r version < ".version" || :; :
 	[ ! -f ".versiondate" ] || read -r versiondate < ".versiondate" || :; :
@@ -68,9 +68,6 @@ xbmk_set_version()
 	    --pretty='%ct' HEAD)" || versiondate="$versiondate_"
 
 	chkvars version versiondate
-	printf "%s\n" "$version" > ".version" || err "can't save version"
-	printf "%s\n" "$versiondate" > ".versiondate" || err "can't save date"
-
 	relname="$projectname-$version"
 }
 
@@ -131,6 +128,12 @@ xbmk_lock()
 	touch "$xbmklock" || err "cannot create '$xbmklock'"; :
 }
 
+xbmk_set_version()
+{
+	printf "%s\n" "$version" > ".version" || err "can't save version"
+	printf "%s\n" "$versiondate" > ".versiondate" || err "can't save date"
+}
+
 xbmk_git_init()
 {
 	for gitarg in "--global user.name" "--global user.email"; do

From 94437278dc7c3635e760f8781e9e151575845cad Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 12:51:56 +0100
Subject: [PATCH 1491/1549] init.sh: simplify unknown version creation

we don't need to read or write a file at all, in that case.
we only then need to generate one if running ./mk release.

the scenario in which no .git and no version files exist
is when someone grabs the build system from a snapshot
generated by e.g. forgejo instances. it's ill advised, so
we advise against it, but it is mitigated in code.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index e94157f0..20d63068 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -55,10 +55,8 @@ xbmk_get_version()
 	[ ! -f ".version" ] || read -r version < ".version" || :; :
 	[ ! -f ".versiondate" ] || read -r versiondate < ".versiondate" || :; :
 
-	[ -e ".git" ] || [ -f ".version" ] || printf "unknown\n" > ".version" \
-	    || err "Cannot generate unknown .version file"
-	[ -e ".git" ] || [ -f ".versiondate" ] || printf "1716415872\n" > \
-	    ".versiondate" || err "Can't generate unknown versiondate file"; :
+	[ ! -e ".git" ] && [ ! -f ".version" ] && version="unknown"
+	[ ! -e ".git" ] && [ ! -f ".versiondate" ] && versiondate="1716415872"
 
 	version_="$version"
 	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \

From 99f09f25ef34c6836f0d13cae2ad071504715ddf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 12:58:42 +0100
Subject: [PATCH 1492/1549] init.sh: only update version files on parent

don't update them on child instances, since it's a waste
of time; the lock file prevents further execution, so we
are just wasting time writing to disk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 31 +++++++++++++++++--------------
 include/lib.sh  | 10 +++++++---
 2 files changed, 24 insertions(+), 17 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 20d63068..cd290ebe 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -30,7 +30,7 @@ xbmk_init()
 	id -u 1>/dev/null 2>/dev/null || err "suid check failed (id -u)"
 	[ "$(id -u)" != "0" ] || err "this command as root is not permitted"
 
-	for init_cmd in get_version set_env lock set_version git_init \
+	for init_cmd in get_version set_env lock git_init \
 	    mkdirs set_pyver child_exec; do
 		xbmk_$init_cmd "$@" || break
 	done
@@ -58,15 +58,7 @@ xbmk_get_version()
 	[ ! -e ".git" ] && [ ! -f ".version" ] && version="unknown"
 	[ ! -e ".git" ] && [ ! -f ".versiondate" ] && versiondate="1716415872"
 
-	version_="$version"
-	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
-	    version="git-$(git rev-parse HEAD 2>&1)" || version="$version_"
-	versiondate_="$versiondate"
-	[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
-	    --pretty='%ct' HEAD)" || versiondate="$versiondate_"
-
-	chkvars version versiondate
-	relname="$projectname-$version"
+	[ -n "$version" ] && relname="$projectname-$version"; :
 }
 
 xbmk_set_env()
@@ -74,7 +66,6 @@ xbmk_set_env()
 	is_child="n"
 
 	xbmkpath="$PATH"
-	export LOCALVERSION="-$projectname-${version%%-*}"
 
 	# unify all temporary files/directories in a single TMPDIR
 	[ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || \
@@ -117,7 +108,10 @@ xbmk_set_env()
 
 	[ -z "${XBMK_THREADS+x}" ] && export XBMK_THREADS=1
 	expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
-	    1>/dev/null 2>/dev/null || export XBMK_THREADS=1; :
+	    1>/dev/null 2>/dev/null || export XBMK_THREADS=1
+
+	xbmk_set_version
+	export LOCALVERSION="-$projectname-${version%%-*}"
 }
 
 xbmk_lock()
@@ -128,8 +122,17 @@ xbmk_lock()
 
 xbmk_set_version()
 {
-	printf "%s\n" "$version" > ".version" || err "can't save version"
-	printf "%s\n" "$versiondate" > ".versiondate" || err "can't save date"
+	version_="$version"
+	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
+	    version="git-$(git rev-parse HEAD 2>&1)" || version="$version_"
+	versiondate_="$versiondate"
+	[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
+	    --pretty='%ct' HEAD)" || versiondate="$versiondate_"
+
+	chkvars version versiondate
+	update_xbmkver "."
+
+	relname="$projectname-$version"
 }
 
 xbmk_git_init()
diff --git a/include/lib.sh b/include/lib.sh
index 75de7512..6c831795 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -15,13 +15,17 @@ remkdir()
 
 mkrom_tarball()
 {
-	printf "%s\n" "$version" > "$1/.version" || err "$1 !version"
-	printf "%s\n" "$versiondate" > "$1/.versiondate" || err "$1 !vdate"
-
+	update_xbmkver "$1"
 	mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz"
 	x_ rm -Rf "$1"
 }
 
+update_xbmkver()
+{
+	printf "%s\n" "$version" > "$1/.version" || err "$1 !version"; :
+	printf "%s\n" "$versiondate" > "$1/.versiondate" || err "$1 !vdate"; :
+}
+
 mktarball()
 {
 	printf "Creating tar archive '%s' from directory '%s'\n" "$2" "$1"

From 485a60e2f6ab0c4eb7b08fd07a2e7be5d0c40402 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 13:08:49 +0100
Subject: [PATCH 1493/1549] init.sh: error if version not read

we no longer rely on the .git version being
read by child instances, so we MUST ensure
that it is being read.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index cd290ebe..117a1818 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -52,8 +52,8 @@ xbmkpkg()
 
 xbmk_get_version()
 {
-	[ ! -f ".version" ] || read -r version < ".version" || :; :
-	[ ! -f ".versiondate" ] || read -r versiondate < ".versiondate" || :; :
+	[ ! -f ".version" ] || read -r version < ".version" || err
+	[ ! -f ".versiondate" ] || read -r versiondate < ".versiondate" || err
 
 	[ ! -e ".git" ] && [ ! -f ".version" ] && version="unknown"
 	[ ! -e ".git" ] && [ ! -f ".versiondate" ] && versiondate="1716415872"

From 5f022acbf47724adead781136d866e8220a83e6d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 13:10:22 +0100
Subject: [PATCH 1494/1549] init.sh: check version/versiondate once read

once again, we are being stricter in child instances.

we must ensure that these variables are set by xbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/init.sh b/include/init.sh
index 117a1818..ac145f56 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -54,6 +54,8 @@ xbmk_get_version()
 {
 	[ ! -f ".version" ] || read -r version < ".version" || err
 	[ ! -f ".versiondate" ] || read -r versiondate < ".versiondate" || err
+	[ ! -f ".version" ] || chkvars version
+	[ ! -f ".versiondate" ] || chkvars versiondate
 
 	[ ! -e ".git" ] && [ ! -f ".version" ] && version="unknown"
 	[ ! -e ".git" ] && [ ! -f ".versiondate" ] && versiondate="1716415872"

From 158c56072c075231eec3422b653f01ddaa451ab6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 13:25:37 +0100
Subject: [PATCH 1495/1549] init.sh: merge xbmk_mkdirs with set_env

it's just two lines, and they relate.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index ac145f56..1791ef78 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -30,8 +30,8 @@ xbmk_init()
 	id -u 1>/dev/null 2>/dev/null || err "suid check failed (id -u)"
 	[ "$(id -u)" != "0" ] || err "this command as root is not permitted"
 
-	for init_cmd in get_version set_env lock git_init \
-	    mkdirs set_pyver child_exec; do
+	for init_cmd in get_version set_env lock git_init set_pyver child_exec
+	do
 		xbmk_$init_cmd "$@" || break
 	done
 }
@@ -114,6 +114,9 @@ xbmk_set_env()
 
 	xbmk_set_version
 	export LOCALVERSION="-$projectname-${version%%-*}"
+
+	remkdir "$xbmktmp" "$xbmklocal"
+	remkdir "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
 }
 
 xbmk_lock()
@@ -156,12 +159,6 @@ xbmk_git_init()
 	    2>/dev/null; :
 }
 
-xbmk_mkdirs()
-{
-	remkdir "$xbmktmp" "$xbmklocal"
-	remkdir "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
-}
-
 xbmk_set_pyver()
 {
 	pyv="import sys; print(sys.version_info[:])"

From 962902a1c4a0b3b9ce942980f42311528d4a4398 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 13:28:31 +0100
Subject: [PATCH 1496/1549] init.sh: set pyver from set_env

it's related to this function, no point calling from main

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 82 +++++++++++++++++++++++++------------------------
 1 file changed, 42 insertions(+), 40 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 1791ef78..49193f0f 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -30,7 +30,7 @@ xbmk_init()
 	id -u 1>/dev/null 2>/dev/null || err "suid check failed (id -u)"
 	[ "$(id -u)" != "0" ] || err "this command as root is not permitted"
 
-	for init_cmd in get_version set_env lock git_init set_pyver child_exec
+	for init_cmd in get_version set_env lock git_init child_exec
 	do
 		xbmk_$init_cmd "$@" || break
 	done
@@ -117,46 +117,8 @@ xbmk_set_env()
 
 	remkdir "$xbmktmp" "$xbmklocal"
 	remkdir "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
-}
 
-xbmk_lock()
-{
-	[ -f "$xbmklock" ] && err "'$xbmklock' exists. Is a build running?"
-	touch "$xbmklock" || err "cannot create '$xbmklock'"; :
-}
-
-xbmk_set_version()
-{
-	version_="$version"
-	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
-	    version="git-$(git rev-parse HEAD 2>&1)" || version="$version_"
-	versiondate_="$versiondate"
-	[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
-	    --pretty='%ct' HEAD)" || versiondate="$versiondate_"
-
-	chkvars version versiondate
-	update_xbmkver "."
-
-	relname="$projectname-$version"
-}
-
-xbmk_git_init()
-{
-	for gitarg in "--global user.name" "--global user.email"; do
-		gitcmd="git config $gitarg"; $gitcmd 1>/dev/null 2>/dev/null \
-		    || err "Run this first: $gitcmd \"your ${gitcmd##*.}\""
-	done
-
-	[ -L ".git" ] && return 1
-	[ -e ".git" ] && return 0
-	eval "`setvars "$(date -Rud @$versiondate)" cdate _nogit`"
-
-	x_ git init 1>/dev/null 2>/dev/null
-	x_ git add -A . 1>/dev/null 2>/dev/null
-	x_ git commit -m "$projectname $version" --date "$cdate" \
-	    --author="xbmk <xbmk@example.com>" 1>/dev/null 2>/dev/null
-	x_ git tag -a "$version" -m "$projectname $version" 1>/dev/null \
-	    2>/dev/null; :
+	xbmk_set_pyver
 }
 
 xbmk_set_pyver()
@@ -212,6 +174,46 @@ pybin()
 	command -v "$1" 2>/dev/null || return 1
 }
 
+xbmk_lock()
+{
+	[ -f "$xbmklock" ] && err "'$xbmklock' exists. Is a build running?"
+	touch "$xbmklock" || err "cannot create '$xbmklock'"; :
+}
+
+xbmk_set_version()
+{
+	version_="$version"
+	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
+	    version="git-$(git rev-parse HEAD 2>&1)" || version="$version_"
+	versiondate_="$versiondate"
+	[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
+	    --pretty='%ct' HEAD)" || versiondate="$versiondate_"
+
+	chkvars version versiondate
+	update_xbmkver "."
+
+	relname="$projectname-$version"
+}
+
+xbmk_git_init()
+{
+	for gitarg in "--global user.name" "--global user.email"; do
+		gitcmd="git config $gitarg"; $gitcmd 1>/dev/null 2>/dev/null \
+		    || err "Run this first: $gitcmd \"your ${gitcmd##*.}\""
+	done
+
+	[ -L ".git" ] && return 1
+	[ -e ".git" ] && return 0
+	eval "`setvars "$(date -Rud @$versiondate)" cdate _nogit`"
+
+	x_ git init 1>/dev/null 2>/dev/null
+	x_ git add -A . 1>/dev/null 2>/dev/null
+	x_ git commit -m "$projectname $version" --date "$cdate" \
+	    --author="xbmk <xbmk@example.com>" 1>/dev/null 2>/dev/null
+	x_ git tag -a "$version" -m "$projectname $version" 1>/dev/null \
+	    2>/dev/null; :
+}
+
 xbmk_child_exec()
 {
 	xbmk_rval=0

From fc4006ce877231f63a941eca903c0af9416e8ab8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 13:29:51 +0100
Subject: [PATCH 1497/1549] init.sh: move xbmk_set_version

it's called before set_pyver, so move it above that

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 49193f0f..35512469 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -121,6 +121,21 @@ xbmk_set_env()
 	xbmk_set_pyver
 }
 
+xbmk_set_version()
+{
+	version_="$version"
+	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
+	    version="git-$(git rev-parse HEAD 2>&1)" || version="$version_"
+	versiondate_="$versiondate"
+	[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
+	    --pretty='%ct' HEAD)" || versiondate="$versiondate_"
+
+	chkvars version versiondate
+	update_xbmkver "."
+
+	relname="$projectname-$version"
+}
+
 xbmk_set_pyver()
 {
 	pyv="import sys; print(sys.version_info[:])"
@@ -180,21 +195,6 @@ xbmk_lock()
 	touch "$xbmklock" || err "cannot create '$xbmklock'"; :
 }
 
-xbmk_set_version()
-{
-	version_="$version"
-	[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
-	    version="git-$(git rev-parse HEAD 2>&1)" || version="$version_"
-	versiondate_="$versiondate"
-	[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
-	    --pretty='%ct' HEAD)" || versiondate="$versiondate_"
-
-	chkvars version versiondate
-	update_xbmkver "."
-
-	relname="$projectname-$version"
-}
-
 xbmk_git_init()
 {
 	for gitarg in "--global user.name" "--global user.email"; do

From 2702a43a86d51aba2123d620ce2f383d8fc41311 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 18 May 2025 13:32:24 +0100
Subject: [PATCH 1498/1549] init.sh: merge xbmk_lock() with xbmk_set_env()

it's just two lines, and we want much more granular
control of where the lock is enforced. it should be
JUST after confirming that the instance is a parent.

it is at this moment that we should bail if a lock
file exists, because this signals that another instance
of xbmk is running.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 35512469..ee19c398 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -30,8 +30,7 @@ xbmk_init()
 	id -u 1>/dev/null 2>/dev/null || err "suid check failed (id -u)"
 	[ "$(id -u)" != "0" ] || err "this command as root is not permitted"
 
-	for init_cmd in get_version set_env lock git_init child_exec
-	do
+	for init_cmd in get_version set_env git_init child_exec; do
 		xbmk_$init_cmd "$@" || break
 	done
 }
@@ -82,6 +81,9 @@ xbmk_set_env()
 		return 1
 	fi
 
+	[ -f "$xbmklock" ] && err "'$xbmklock' exists. Is a build running?"
+	touch "$xbmklock" || err "cannot create '$xbmklock'"; :
+
 	# parent instance of xbmk, so don't return. set up TMPDIR
 	export TMPDIR="/tmp"
 	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
@@ -189,12 +191,6 @@ pybin()
 	command -v "$1" 2>/dev/null || return 1
 }
 
-xbmk_lock()
-{
-	[ -f "$xbmklock" ] && err "'$xbmklock' exists. Is a build running?"
-	touch "$xbmklock" || err "cannot create '$xbmklock'"; :
-}
-
 xbmk_git_init()
 {
 	for gitarg in "--global user.name" "--global user.email"; do

From 265ec0b7673d3df608dfb9e1cbec39b3bb68cdd6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 19 May 2025 17:40:44 +0100
Subject: [PATCH 1499/1549] dependencies/debian: add libx86

already present on a few other config files, e.g. arch

i noticed on debian-experimental that i needed to explicitly
install it, whereas it was implicitly installed on debian 12

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/dependencies/debian | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/config/dependencies/debian b/config/dependencies/debian
index 992fb690..d4c26ee0 100755
--- a/config/dependencies/debian
+++ b/config/dependencies/debian
@@ -14,5 +14,5 @@ libusb-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted pciutils
 perl pkg-config python3 python3-distutils-extra python3-pkg-resources python3-pycryptodome \
 python3-pyelftools python3-setuptools python-is-python3 sharutils swig unar \
 unifont unifont-bin unzip uuid-dev wget xfonts-unifont zlib1g-dev ccache \
-g++-mipsel-linux-gnu make genisoimage mtools \
+g++-mipsel-linux-gnu make genisoimage mtools libx86-1 libx86-dev \
 "

From 769a97aed5a712c80141fee8da60868c437fbf36 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 19 May 2025 18:50:06 +0100
Subject: [PATCH 1500/1549] init.sh: Hardcode XBMK_CACHE for integrity

I never really intended for this to be configurable,
but the cache directory is also used during release
builds.

There's too much that can go wrong, letting the user
decide where their cache is. Simplify it by hardcoding.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index ee19c398..cd4acf43 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -89,15 +89,9 @@ xbmk_set_env()
 	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
 	xbmktmp="$TMPDIR"
 
-	# XBMK_CACHE is a directory, for caching downloads and git repon
-	[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$xbmkpwd/cache"
-	[ -z "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
+	export XBMK_CACHE="$xbmkpwd/cache"
 	[ -L "$XBMK_CACHE" ] && [ "$XBMK_CACHE" = "$xbmkpwd/cache" ] && \
 	    err "cachedir '$xbmkpwd/cache' is a symlink"
-	[ -L "$XBMK_CACHE" ] && export XBMK_CACHE="$xbmkpwd/cache"
-	xbmkcache="`findpath "$XBMK_CACHE"`" || \
-	    err "Can't resolve cachedir: '$XBMK_CACHE'"
-	export XBMK_CACHE="$xbmkcache"
 	[ ! -e "$XBMK_CACHE" ] || \
 	    [ -d "$XBMK_CACHE" ] || err "cachedir '$XBMK_CACHE' is a file"; :
 

From b25a4876434d371dc4278d71365574158c77d47d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 19 May 2025 18:53:22 +0100
Subject: [PATCH 1501/1549] init.sh: looser XBMK_THREADS validation

on child processes, we can simply correct it.

we currently provide an error message, but this is silly.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index cd4acf43..38eb1c81 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -30,7 +30,7 @@ xbmk_init()
 	id -u 1>/dev/null 2>/dev/null || err "suid check failed (id -u)"
 	[ "$(id -u)" != "0" ] || err "this command as root is not permitted"
 
-	for init_cmd in get_version set_env git_init child_exec; do
+	for init_cmd in get_version set_env set_threads git_init child_exec; do
 		xbmk_$init_cmd "$@" || break
 	done
 }
@@ -76,7 +76,7 @@ xbmk_set_env()
 
 	if [ "$is_child" = "y" ]; then
 		[ -z "${XBMK_CACHE+x}" ] && err "XBMK_CACHE unset on child"
-		[ -z "${XBMK_THREADS+x}" ] && err "XBMK_THREADS unset on child"
+		[ -z "${XBMK_THREADS+x}" ] && xbmk_set_threads
 		e "lock" f missing && err "lock file absent on child"
 		return 1
 	fi
@@ -104,10 +104,6 @@ xbmk_set_env()
 	[ "$XBMK_RELEASE" = "Y" ] && export XBMK_RELEASE="y"
 	[ "$XBMK_RELEASE" = "y" ] || export XBMK_RELEASE="n"
 
-	[ -z "${XBMK_THREADS+x}" ] && export XBMK_THREADS=1
-	expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
-	    1>/dev/null 2>/dev/null || export XBMK_THREADS=1
-
 	xbmk_set_version
 	export LOCALVERSION="-$projectname-${version%%-*}"
 
@@ -117,6 +113,13 @@ xbmk_set_env()
 	xbmk_set_pyver
 }
 
+xbmk_set_threads()
+{
+	[ -z "${XBMK_THREADS+x}" ] && export XBMK_THREADS=1
+	expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
+	    1>/dev/null 2>/dev/null || export XBMK_THREADS=1
+}
+
 xbmk_set_version()
 {
 	version_="$version"

From d9c64b267540a7c0a62f219c1c27c790234fd11c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 19 May 2025 19:24:43 +0100
Subject: [PATCH 1502/1549] xbmk: stricter handling of files on while loops

i overlooked these!

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh  | 4 ++--
 include/tree.sh | 5 +++--
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 6c831795..025db88a 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -106,9 +106,9 @@ fx_()
 
 dx_()
 {
-	[ -f "$2" ] && while read -r fx; do
+	[ ! -f "$2" ] || while read -r fx; do
 		$1 "$fx" || return 1
-	done < "$2"; :
+	done < "$2" || err "dx_ $*: cannot read '$2'"; :
 }
 
 x_()
diff --git a/include/tree.sh b/include/tree.sh
index 25d4732c..9dccf857 100644
--- a/include/tree.sh
+++ b/include/tree.sh
@@ -332,8 +332,9 @@ check_makefile()
 
 copy_elf()
 {
-	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do
+	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir"
+	[ ! -f "$listfile" ] || while read -r f; do
 		[ -f "$srcdir/$f" ] && x_ cp "$srcdir/$f" "$dest_dir"
-	done < "$listfile"
+	done < "$listfile" || err "copy_elf $*: cannot read '$listfile'"
 	x_ make clean -C "$srcdir" $cleanargs
 }

From 8aaf404ddea8a8d6c21f0a1f83f1675a8b0895aa Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 19 May 2025 19:29:59 +0100
Subject: [PATCH 1503/1549] lib.sh: Use while, not for, to process arguments

This is more reliable against globbing, in context of for.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 025db88a..184d0491 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -53,8 +53,10 @@ setvars()
 	fi
 	val="$1"
 	shift 1
-	for var in "$@"; do
-		_setvars="$var=\"$val\"; $_setvars"
+	while true; do
+		[ $# -lt 1 ] && break
+		_setvars="$1=\"$val\"; $_setvars"
+		shift 1
 	done
 	printf "%s\n" "${_setvars% }"
 }
@@ -69,9 +71,11 @@ setcfg()
 
 chkvars()
 {
-	for var in "$@"; do
-		eval "[ -n \"\${$var+x}\" ] || err \"$var unset\""
-		eval "[ -n \"\$$var\" ] || err \"$var unset\""
+	while true; do
+		[ $# -lt 1 ] && break
+		eval "[ -n \"\${$1+x}\" ] || err \"$1 unset\""
+		eval "[ -n \"\$$1\" ] || err \"$1 unset\""
+		shift 1
 	done; :
 }
 

From 900da04efa929a9373d5a6f3f56f8b8ac8f193df Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 19 May 2025 19:57:06 +0100
Subject: [PATCH 1504/1549] tree.sh: fix up copy_elf(), bad for loop

Because of how sh works, having just the [] line causes
sh to exit, annoyingly without an error message, but it
does cause a non-zero exit.

This bug will have already been triggering, before I added
the recent error handling on files for this for loop.

also do it to the other loop in lib.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh  | 2 +-
 include/tree.sh | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 184d0491..7c4d71ea 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -111,7 +111,7 @@ fx_()
 dx_()
 {
 	[ ! -f "$2" ] || while read -r fx; do
-		$1 "$fx" || return 1
+		$1 "$fx" || return 1; :
 	done < "$2" || err "dx_ $*: cannot read '$2'"; :
 }
 
diff --git a/include/tree.sh b/include/tree.sh
index 9dccf857..8d787d4c 100644
--- a/include/tree.sh
+++ b/include/tree.sh
@@ -334,7 +334,7 @@ copy_elf()
 {
 	[ -f "$listfile" ] && x_ mkdir -p "$dest_dir"
 	[ ! -f "$listfile" ] || while read -r f; do
-		[ -f "$srcdir/$f" ] && x_ cp "$srcdir/$f" "$dest_dir"
-	done < "$listfile" || err "copy_elf $*: cannot read '$listfile'"
+		[ -f "$srcdir/$f" ] && x_ cp "$srcdir/$f" "$dest_dir"; :
+	done < "$listfile" || err "copy_elf $*: cannot read '$listfile'"; :
 	x_ make clean -C "$srcdir" $cleanargs
 }

From 620c1dd6fae0f0f83212e9f6b6fb27c1faf67b83 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 19 May 2025 22:59:20 +0100
Subject: [PATCH 1505/1549] get.sh: Make xbmkget err on exiting the loop check

The idea in this function is that if a file or repo is
successfully handled, a return will be performed from the
loop.

If the loop exits for any reason, an error is thrown. The
current code is probably fine, but I can forsee future
modifications possibly causing bugs here.

Make it unambiguous, by always throwing an error if execution
reaches the end of the function.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/get.sh b/include/get.sh
index 667ab398..ab6ff401 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -87,7 +87,8 @@ xbmkget()
 	for url in "$2" "$3"; do
 		[ -n "$url" ] && try_file "$url" "$@" && \
 		    eval "[ -$echk \"$4\" ] && return 0"
-	done && err "$1 $2 $3 $4: not downloaded"; :
+	done
+	err "$1 $2 $3 $4: not downloaded"; :
 }
 
 try_file()

From cdc0fb49e1c47a013ea99117acbf62e96ec5c652 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 19 May 2025 23:07:01 +0100
Subject: [PATCH 1506/1549] get.sh: make xbmkget() easier to understand

the intent once again is that this for loop shall
return, with zero status, if success is observed.

otherwise, the loop breaks and an error is thrown.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index ab6ff401..89859454 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -85,8 +85,10 @@ xbmkget()
 	echk="f" && [ "$1" = "git" ] && echk="d"
 
 	for url in "$2" "$3"; do
-		[ -n "$url" ] && try_file "$url" "$@" && \
-		    eval "[ -$echk \"$4\" ] && return 0"
+		[ -n "$url" ] || continue
+		try_file "$url" "$@" || continue
+		eval "[ -$echk \"$4\" ] || continue"
+		return 0 # successful download/copy
 	done
 	err "$1 $2 $3 $4: not downloaded"; :
 }

From f15bb8153a3f2fce6e0aea28ce029c889a2e7c76 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 19 May 2025 23:09:37 +0100
Subject: [PATCH 1507/1549] get.sh: stricter URL check in xbmkget()

don't skip if the URL is empty. throw an error instead.

i decree that all links must be properly initialised, because
that is the design of lbmk. where only one link is provided,
such as in a local copy operation, the second would succeed no
better than the first so two identical paths are given.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/get.sh b/include/get.sh
index 89859454..8280d96b 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -85,7 +85,7 @@ xbmkget()
 	echk="f" && [ "$1" = "git" ] && echk="d"
 
 	for url in "$2" "$3"; do
-		[ -n "$url" ] || continue
+		[ -n "$url" ] || err "empty URL given in: xbmkget $*"
 		try_file "$url" "$@" || continue
 		eval "[ -$echk \"$4\" ] || continue"
 		return 0 # successful download/copy

From 903f78bf080ee8ad9176022005b81a3d3ac530b3 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 19 May 2025 23:13:29 +0100
Subject: [PATCH 1508/1549] get.sh: add missing check in fetch_project()

we check the main url, but not backup urls.

this patch fixes that oversight.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/get.sh b/include/get.sh
index 8280d96b..ae2c5a35 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -22,7 +22,7 @@ fetch_project()
 	eval "`setvars "" xtree`"
 	eval "`setcfg "config/git/$project/pkg.cfg"`"
 
-	chkvars url
+	chkvars url bkup_url
 
 	[ -n "$xtree" ] && x_ ./mk -f coreboot "$xtree"
 	[ -z "$depend" ] || for d in $depend ; do

From fb7aaa78bb080a473bdf0edf449bf08045e8366c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 20 May 2025 02:58:33 +0100
Subject: [PATCH 1509/1549] vendor.sh: optimise find_me()

i'm adding characters to 7ztest, which isn't being passed
on through because everything runs in subshells; the next
pass would default back to the original string, so a given
file may be checked multiple times.

fix this by mitigation; use the random string from mktemp
as a suffix instead.

in practice, this has not affected performance much, but it
will nevertheless avoid unnecessary work by xbmk.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh   |  2 +-
 include/vendor.sh | 16 ++++++++++------
 2 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 38eb1c81..39d48948 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -181,7 +181,7 @@ pybin()
 	[ $venv -gt 0 ] && for pypath in "/usr/local/bin" "/usr/bin"; do
 		[ -e "$pypath/$1" ] && [ ! -d "$pypath/$1" ] && \
 		    [ -x "$pypath/$1" ] && printf "%s/%s\n" "$pypath" "$1" && \
-		    return 0
+		    return 0; :
 	done && return 1
 
 	# Defer to normal command -v if not a venv
diff --git a/include/vendor.sh b/include/vendor.sh
index 2732eade..88c3fa04 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -38,7 +38,7 @@ eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
     E6400_VGA_romname SCH5545EC_DL_url_bkup SCH5545EC_DL_hash _dest mecleaner \
     kbc1126_ec_dump MRC_refcode_cbtree _dl SCH5545EC_DL_url EC_url rom DL_url \
-    nuke cbfstoolref FSPFD_hash _7ztest ME11bootguard ME11delta xromsize \
+    nuke cbfstoolref FSPFD_hash ME11bootguard ME11delta xromsize \
     ME11version ME11sku ME11pch _me _metmp mfs TBFW_url_bkup TBFW_url cbdir \
     TBFW_hash TBFW_size hashfile EC_url_bkup FSPM_bin_hash FSPS_bin_hash \
     EC_FW1_hash EC_FW2_hash ME_bin_hash MRC_bin_hash REF_bin_hash _dl_bin \
@@ -156,7 +156,6 @@ extract_intel_me()
 {
 	e "$mecleaner" f not && err "$cbdir: me_cleaner missing"
 
-	_7ztest="$xbmklocal/metmp/a"
 	_metmp="$xbmklocal/me.bin"
 	x_ rm -f "$_metmp" "$xbmklocal/a"
 
@@ -165,7 +164,7 @@ extract_intel_me()
 	[ "$ME11bootguard" = "y" ] && x_ ./mk -f deguard
 
 	set +u +e
-	x_ rm -Rf "$xbmkpwd/metmp"
+	x_ rm -Rf "$xbmklocal/metmp"
 	( fx_ find_me x_ find "$xbmkpwd/$appdir" -type f ) || :
 	[ "$ME11bootguard" != "y" ] && x_ mv "$_metmp" "$_pre_dest" && return 0
 
@@ -182,14 +181,19 @@ find_me()
 	[ -f "$_metmp" ] && exit 1
 	[ -L "$1" ] && return 0
 
-	_7ztest="${_7ztest}a" && _r="-r" && [ -n "$mfs" ] && _r=""
+	_7x="`mktemp`" || err "find_me: can't make tmp file"
+	x_ rm -f "$_7x"
+	_7x="$xbmklocal/metmp/${_7x##*/}"
+
+	_r="-r"
+	[ -n "$mfs" ] && _r=""
 
 	"$mecleaner" $mfs $_r -t -O "$xbmklocal/a" -M "$_metmp" "$1" || \
 	    "$mecleaner" $mfs $_r -t -O "$_metmp" "$1" || "$me7updateparser" \
-	    -O "$_metmp" "$1" || extract_archive "$1" "$_7ztest" || return 0
+	    -O "$_metmp" "$1" || extract_archive "$1" "$_7x" || return 0
 
 	[ -f "$_metmp" ] && exit 1
-	( fx_ find_me x_ find "$_7ztest" -type f ) || exit 1; :
+	( fx_ find_me x_ find "$_7x" -type f ) || exit 1; :
 }
 
 extract_archive()

From f6b77822835fcd775a845c825a4e6a78abaa742a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 20 May 2025 20:14:09 +0100
Subject: [PATCH 1510/1549] Revert "vendor.sh: optimise find_me()"

This reverts commit fb7aaa78bb080a473bdf0edf449bf08045e8366c.

it caused a few issues. will re-do later

the old code isn't really broken, just inefficient, because
several files are scanned twice, but in practise the overhead
isn't that great

The error occurs sometimes, when bruteforcing me.bin:

ERROR ./mk: Unhandled error for: mv /home/user/lbmk/tmp/me.bin /home/user/lbmk/cache/tmpdl/check

This revert should fix the issue, for now.
---
 include/init.sh   |  2 +-
 include/vendor.sh | 16 ++++++----------
 2 files changed, 7 insertions(+), 11 deletions(-)

diff --git a/include/init.sh b/include/init.sh
index 39d48948..38eb1c81 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -181,7 +181,7 @@ pybin()
 	[ $venv -gt 0 ] && for pypath in "/usr/local/bin" "/usr/bin"; do
 		[ -e "$pypath/$1" ] && [ ! -d "$pypath/$1" ] && \
 		    [ -x "$pypath/$1" ] && printf "%s/%s\n" "$pypath" "$1" && \
-		    return 0; :
+		    return 0
 	done && return 1
 
 	# Defer to normal command -v if not a venv
diff --git a/include/vendor.sh b/include/vendor.sh
index 88c3fa04..2732eade 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -38,7 +38,7 @@ eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
     E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
     E6400_VGA_romname SCH5545EC_DL_url_bkup SCH5545EC_DL_hash _dest mecleaner \
     kbc1126_ec_dump MRC_refcode_cbtree _dl SCH5545EC_DL_url EC_url rom DL_url \
-    nuke cbfstoolref FSPFD_hash ME11bootguard ME11delta xromsize \
+    nuke cbfstoolref FSPFD_hash _7ztest ME11bootguard ME11delta xromsize \
     ME11version ME11sku ME11pch _me _metmp mfs TBFW_url_bkup TBFW_url cbdir \
     TBFW_hash TBFW_size hashfile EC_url_bkup FSPM_bin_hash FSPS_bin_hash \
     EC_FW1_hash EC_FW2_hash ME_bin_hash MRC_bin_hash REF_bin_hash _dl_bin \
@@ -156,6 +156,7 @@ extract_intel_me()
 {
 	e "$mecleaner" f not && err "$cbdir: me_cleaner missing"
 
+	_7ztest="$xbmklocal/metmp/a"
 	_metmp="$xbmklocal/me.bin"
 	x_ rm -f "$_metmp" "$xbmklocal/a"
 
@@ -164,7 +165,7 @@ extract_intel_me()
 	[ "$ME11bootguard" = "y" ] && x_ ./mk -f deguard
 
 	set +u +e
-	x_ rm -Rf "$xbmklocal/metmp"
+	x_ rm -Rf "$xbmkpwd/metmp"
 	( fx_ find_me x_ find "$xbmkpwd/$appdir" -type f ) || :
 	[ "$ME11bootguard" != "y" ] && x_ mv "$_metmp" "$_pre_dest" && return 0
 
@@ -181,19 +182,14 @@ find_me()
 	[ -f "$_metmp" ] && exit 1
 	[ -L "$1" ] && return 0
 
-	_7x="`mktemp`" || err "find_me: can't make tmp file"
-	x_ rm -f "$_7x"
-	_7x="$xbmklocal/metmp/${_7x##*/}"
-
-	_r="-r"
-	[ -n "$mfs" ] && _r=""
+	_7ztest="${_7ztest}a" && _r="-r" && [ -n "$mfs" ] && _r=""
 
 	"$mecleaner" $mfs $_r -t -O "$xbmklocal/a" -M "$_metmp" "$1" || \
 	    "$mecleaner" $mfs $_r -t -O "$_metmp" "$1" || "$me7updateparser" \
-	    -O "$_metmp" "$1" || extract_archive "$1" "$_7x" || return 0
+	    -O "$_metmp" "$1" || extract_archive "$1" "$_7ztest" || return 0
 
 	[ -f "$_metmp" ] && exit 1
-	( fx_ find_me x_ find "$_7x" -type f ) || exit 1; :
+	( fx_ find_me x_ find "$_7ztest" -type f ) || exit 1; :
 }
 
 extract_archive()

From 24b8e633e0348d60dc7d64a919605e69f6ef0379 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 21 May 2025 13:34:18 +0100
Subject: [PATCH 1511/1549] GRUB: Update to revision 73d1c959e (14 March 2025)

This brings in several changes from upstream:

* 73d1c959e cryptocheck: Add --quiet option
* dbc0eb5bd disk/cryptodisk: Wipe the passphrase from memory
* 301b4ef25 disk/cryptodisk: Add the "erase secrets" function
* 23ec4535f docs: Document available crypto disks checks
* 10d778c4b commands/search: Add the diskfilter support
* 7a584fbde disk/diskfilter: Introduce the "cryptocheck" command
* ed691c0e0 commands/search: Introduce the --cryptodisk-only argument
* c448f511e kern/rescue_reader: Block the rescue mode until the CLI authentication
* 4abac0ad5 fs/xfs: Fix large extent counters incompat feature support

This commit is of particular interest:

* dbc0eb5bd disk/cryptodisk: Wipe the passphrase from memory

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/grub/default/target.cfg | 2 +-
 config/grub/nvme/target.cfg    | 2 +-
 config/grub/xhci/target.cfg    | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/config/grub/default/target.cfg b/config/grub/default/target.cfg
index a9dab736..f5cc85f1 100644
--- a/config/grub/default/target.cfg
+++ b/config/grub/default/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="default"
-rev="a4da71dafeea519b034beb159dfe80c486c2107c"
+rev="73d1c959ea3417e9309ba8c6102d7d6dc7c94259"
diff --git a/config/grub/nvme/target.cfg b/config/grub/nvme/target.cfg
index aa86509f..7e473f19 100644
--- a/config/grub/nvme/target.cfg
+++ b/config/grub/nvme/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="nvme"
-rev="a4da71dafeea519b034beb159dfe80c486c2107c"
+rev="73d1c959ea3417e9309ba8c6102d7d6dc7c94259"
diff --git a/config/grub/xhci/target.cfg b/config/grub/xhci/target.cfg
index 5727e70b..0b90065b 100644
--- a/config/grub/xhci/target.cfg
+++ b/config/grub/xhci/target.cfg
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
 tree="xhci"
-rev="a4da71dafeea519b034beb159dfe80c486c2107c"
+rev="73d1c959ea3417e9309ba8c6102d7d6dc7c94259"

From a3250d144744e77b6a0d0f7cf011ecc6800edaaf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 22 May 2025 01:17:27 +0100
Subject: [PATCH 1512/1549] tree.sh: Don't run make-clean on dry runs

Otherwise, ./mk -d (without arguments) fails for GRUB,
which first requires running autoconf to get a Makefile.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/tree.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/tree.sh b/include/tree.sh
index 8d787d4c..83887864 100644
--- a/include/tree.sh
+++ b/include/tree.sh
@@ -275,7 +275,8 @@ elfcheck()
 
 handle_makefile()
 {
-	$dry check_makefile "$srcdir" && x_ make -C "$srcdir" $cleanargs clean
+	$dry check_makefile "$srcdir" && \
+	    $dry x_ make -C "$srcdir" $cleanargs clean
 
 	[ -f "$defconfig" ] && x_ cp "$defconfig" "$srcdir/.config"
 	[ -n "$mode" ] || [ -n "$btype" ] || $dry make -C \

From 8e0c6059d155052c30a2b765b91c580e93ebdb7f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 22 May 2025 01:47:02 +0100
Subject: [PATCH 1513/1549] rom.sh: skip copyps1bios on dry builds

otherwise, ./mk -d (without arguments) will fail.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/rom.sh b/include/rom.sh
index 65900a01..1c39979d 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -20,6 +20,8 @@ buildser()
 
 copyps1bios()
 {
+	[ "$dry" = ":" ] && return 0; :
+
 	remkdir "bin/playstation"
 	x_ cp src/pcsx-redux/src/mips/openbios/openbios.bin bin/playstation
 

From f9266601b8c73daf36518c71db5e5c36080f3ddf Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 22 May 2025 11:27:22 +0100
Subject: [PATCH 1514/1549] vendor.sh: add colon at the end of a for loop

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 2732eade..99fc7467 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -107,7 +107,7 @@ fetch()
 	[ "$dl_type" = "fsp" ] && for _cdl in dl dl_bkup; do
 		eval "$_cdl=\"\${$_cdl##*../}\"; _cdp=\"\$$_cdl\""
 		[ -f "$_cdp" ] || _cdp="$cbdir/$_cdp"
-		[ -f "$_cdp" ] && eval "$_cdl=\"$_cdp\""
+		[ -f "$_cdp" ] && eval "$_cdl=\"$_cdp\""; :
 	done; :
 
 	# download the file (from the internet) to extract from

From fc0720184d954690071dcbf1c9322a2006701a94 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 22 May 2025 11:34:28 +0100
Subject: [PATCH 1515/1549] xbmk: add fake config makefile args to flashprog

also pcsx-redux

this way, commands like "./mk -u" without argument
will not fail. these fake makefile commands do nothing.

otherwise, an error errors because their makefiles
do not define these options.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 ...bmk-hack-add-config-Makefile-options.patch | 48 +++++++++++++++++++
 ...-hack-add-no-ops-for-config-commands.patch | 43 +++++++++++++++++
 2 files changed, 91 insertions(+)
 create mode 100644 config/flashprog/patches/0002-lbmk-hack-add-config-Makefile-options.patch
 create mode 100644 config/pcsx-redux/patches/0002-lbmk-hack-add-no-ops-for-config-commands.patch

diff --git a/config/flashprog/patches/0002-lbmk-hack-add-config-Makefile-options.patch b/config/flashprog/patches/0002-lbmk-hack-add-config-Makefile-options.patch
new file mode 100644
index 00000000..d2702d23
--- /dev/null
+++ b/config/flashprog/patches/0002-lbmk-hack-add-config-Makefile-options.patch
@@ -0,0 +1,48 @@
+From b7a4d2907d3358173510aa6e31af08afe4969b38 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Thu, 22 May 2025 11:25:42 +0100
+Subject: [PATCH 1/1] lbmk hack: add config Makefile options
+
+this prevents a build error when running the
+-u, -m, -s, -l and -n options in lbmk without
+argument.
+
+this makes no functional changes to flashprog.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ Makefile | 18 +++++++++++++++++-
+ 1 file changed, 17 insertions(+), 1 deletion(-)
+
+diff --git a/Makefile b/Makefile
+index 12adf61..701f842 100644
+--- a/Makefile
++++ b/Makefile
+@@ -1113,7 +1113,23 @@ libpayload: clean
+ gitconfig:
+ 	./util/getrevision.sh -c 2>/dev/null && ./util/git-hooks/install.sh
+ 
+-.PHONY: all install clean distclean config branch tag versioninfo _export export tarball libpayload gitconfig
++oldconfig:
++	:
++
++menuconfig:
++	:
++
++savedefconfig:
++	:
++
++olddefconfig:
++	:
++
++nconfig:
++	:
++
++
++.PHONY: all install clean distclean config branch tag versioninfo _export export tarball libpayload gitconfig oldconfig menuconfig savedefconfig olddefconfig nconfig
+ 
+ # Disable implicit suffixes and built-in rules (for performance and profit)
+ .SUFFIXES:
+-- 
+2.39.5
+
diff --git a/config/pcsx-redux/patches/0002-lbmk-hack-add-no-ops-for-config-commands.patch b/config/pcsx-redux/patches/0002-lbmk-hack-add-no-ops-for-config-commands.patch
new file mode 100644
index 00000000..1a495d60
--- /dev/null
+++ b/config/pcsx-redux/patches/0002-lbmk-hack-add-no-ops-for-config-commands.patch
@@ -0,0 +1,43 @@
+From e4cd98fb5e3baf8260a3692cab745dea925b0764 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Thu, 22 May 2025 11:29:37 +0100
+Subject: [PATCH 1/1] lbmk hack: add no-ops for config commands
+
+./mk -u, -m, -s, -l and -n cause errors without
+arguments, because pcsx-redux's makefile doesn't
+have them. additionally, i use my own makefile here,
+so that only the openbios is compiled.
+
+add these so that lbmk doesn't crash during tests.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ lbmkbofhmakefile | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+diff --git a/lbmkbofhmakefile b/lbmkbofhmakefile
+index fe2e36d2..e0e2a11e 100644
+--- a/lbmkbofhmakefile
++++ b/lbmkbofhmakefile
+@@ -14,3 +14,18 @@ clean:
+ 
+ distclean:
+ 	make -C src/mips/openbios clean
++
++oldconfig:
++	:
++
++menuconfig:
++	:
++
++savedefconfig:
++	:
++
++olddefconfig:
++	:
++
++nconfig:
++	:
+-- 
+2.39.5
+

From 231b320e63bb452208b3d01e5df6844ead4b76db Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 22 May 2025 11:51:31 +0100
Subject: [PATCH 1516/1549] release.sh: copy version files to rsrc

Otherwise, an "unknown" version number is created.

This regression was caused by the recent optimisation
that reduces the amount of extra work done by init.sh
on child instances of xbmk.

As a result of those changes, now release.sh has to
do some minor initialisation of its own, such as this.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/release.sh b/include/release.sh
index 5d6da466..f23ed541 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -27,6 +27,8 @@ release()
 
 	remkdir "$vdir"
 	x_ git clone . "$rsrc"
+	x_ cp ".version" "$rsrc/.version"
+	x_ cp ".versiondate" "$rsrc/.versiondate"
 
 	prep_release src
 	prep_release tarball

From 419733d3073cbfc9f8f67e835b385b2b41e6f045 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 22 May 2025 12:22:07 +0100
Subject: [PATCH 1517/1549] get.sh: re-generate remotes every time

that way, when a remote changes in config/, it
will be updated automatically, without user
intervention.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index ae2c5a35..08a561d9 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -143,8 +143,10 @@ try_git()
 	[ -d "$gitdest" ] || x_ mkdir -p "${gitdest%/*}"
 	[ -d "$gitdest" ] || x_ mv "$tmpgitcache" "$gitdest"
 
-	( x_ git -C "$gitdest" remote add main "$4" 2>/dev/null ) || :
-	( x_ git -C "$gitdest" remote add backup "$5" 2>/dev/null ) || :
+	( x_ git -C "$gitdest" remote remove main ) || :
+	( x_ git -C "$gitdest" remote remove backup ) || :
+	x_ git -C "$gitdest" remote add main "$4"
+	x_ git -C "$gitdest" remote add backup "$5"
 	( x_ git -C "$gitdest" fetch --all ) || :
 	( x_ git -C "$gitdest" pull --all ) || :; :
 }

From 0216a3104a50ebf01405f6e04e44d0349567b85e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 22 May 2025 12:43:34 +0100
Subject: [PATCH 1518/1549] get.sh: Always update git remotes

Right now, if cache/clone/PROJECT/ already exists,
the logic for pulling new changes doesn't execute,
and neither does the logic for updating remotes.

This is bad when updating revisions, because then
manual updating is required, defeating the purpose
of xbmk's own automation in this regard.

Fix it by only checking the cached download on files,
not Git repositories; the try_git function itself will
already perform this check, before updating remotes
and pulling in new commits from upstream.

The updating only happens when a given target directory
doesn't exist, e.g. src/flashprog/ or src/grub/default/,
so this won't slow down release builds for example.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/get.sh b/include/get.sh
index 08a561d9..6f1b5f1d 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -104,7 +104,8 @@ try_file()
 	echk="d" && [ "$2" != "git" ] && echk="f" && \
 	    bad_checksum "$6" "$cached" 2>/dev/null && x_ rm -f "$cached"
 
-	eval "[ -$echk \"$cached\" ] || try_$2 \"\$cached\" \"\$@\" || return 1"
+	evalchk="[ -$echk \"$cached\" ] || " && [ "$2" = "git" ] && evalchk=""
+	eval "${evalchk}try_$2 \"\$cached\" \"\$@\" || return 1"
 	[ "$2" != "git" ] && [ -f "$5" ] && \
 	    bad_checksum "$6" "$5" 2>/dev/null && x_ cp "$cached" "$5"
 	eval "[ -$echk \"$cached\" ] || return 1"

From 64cc91bca33d3a5356a805155d229b574e954f1c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 22 May 2025 13:48:20 +0100
Subject: [PATCH 1519/1549] coreboot/default: Remove unneeded FSP modules

We only need the Kabylake version. We can safely
remove the other ones, thereby significantly
reducing the size of the lbmk release archive.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/default/nuke.list | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 config/coreboot/default/nuke.list

diff --git a/config/coreboot/default/nuke.list b/config/coreboot/default/nuke.list
new file mode 100644
index 00000000..c811f95d
--- /dev/null
+++ b/config/coreboot/default/nuke.list
@@ -0,0 +1,18 @@
+3rdparty/fsp/EagleStreamFspBinPkg
+3rdparty/fsp/AlderLakeFspBinPkg
+3rdparty/fsp/MeteorLakeFspBinPkg
+3rdparty/fsp/IceLakeFspBinPkg
+3rdparty/fsp/AmberLakeFspBinPkg
+3rdparty/fsp/DenvertonNSFspBinPkg
+3rdparty/fsp/TigerLakeFspBinPkg
+3rdparty/fsp/CedarIslandFspBinPkg
+3rdparty/fsp/ElkhartLakeFspBinPkg
+3rdparty/fsp/CometLakeFspBinPkg
+3rdparty/fsp/WhitleyFspBinPkg
+3rdparty/fsp/ArrowLakeFspBinPkg
+3rdparty/fsp/IdavilleFspBinPkg
+3rdparty/fsp/BraswellFspBinPkg
+3rdparty/fsp/CoffeeLakeFspBinPkg
+3rdparty/fsp/RaptorLakeFspBinPkg
+3rdparty/fsp/ApolloLakeFspBinPkg
+3rdparty/fsp/SkylakeFspBinPkg

From 452aeb6001a5fc2b08da72536e6ed0d6fe2b6a9d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Thu, 22 May 2025 14:13:11 +0100
Subject: [PATCH 1520/1549] coreboot: Remove unused vboot tests

Futility tests enlarge the src tarballs, without much utility.

Uttterly futile.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/coreboot/default/nuke.list | 1 +
 config/coreboot/fam15h/nuke.list  | 1 +
 2 files changed, 2 insertions(+)
 create mode 100644 config/coreboot/fam15h/nuke.list

diff --git a/config/coreboot/default/nuke.list b/config/coreboot/default/nuke.list
index c811f95d..7e5ba3b5 100644
--- a/config/coreboot/default/nuke.list
+++ b/config/coreboot/default/nuke.list
@@ -16,3 +16,4 @@
 3rdparty/fsp/RaptorLakeFspBinPkg
 3rdparty/fsp/ApolloLakeFspBinPkg
 3rdparty/fsp/SkylakeFspBinPkg
+3rdparty/vboot/tests
diff --git a/config/coreboot/fam15h/nuke.list b/config/coreboot/fam15h/nuke.list
new file mode 100644
index 00000000..8ca7a4cf
--- /dev/null
+++ b/config/coreboot/fam15h/nuke.list
@@ -0,0 +1 @@
+3rdparty/vboot/tests

From 3e28873532b13a750df04d8dad8ffacb159cc7da Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 23 May 2025 04:52:36 +0100
Subject: [PATCH 1521/1549] ifd/hp8300usdt: set the HAP bit by default

In practise, coreboot can set this bit at build time.
We also use ME Soft Temporary Disable by default, on
this platform.

We also use me_cleaner by default, so the me.bin file
added to flash only contains the code that would run
with HAP set anyway.

Therefore, this change is of little practical consequence,
but as a friend put it to me, this change is most technically
correct.

And I'm all about technical correctness.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/ifd/hp8300usdt/ifd | Bin 4096 -> 4096 bytes
 1 file changed, 0 insertions(+), 0 deletions(-)

diff --git a/config/ifd/hp8300usdt/ifd b/config/ifd/hp8300usdt/ifd
index 3b81b7046a120162504ae6bd4a93ed9be0459cd0..282a8abba2b7e208b51c691aa6f972a1509739f2 100644
GIT binary patch
delta 14
VcmZorXi(Uo!N}OKS(EWP9{?do1YH0C

delta 14
VcmZorXi(Uo!N|z4S(EWP9{?Ul1Kj`s


From 8c3f10ba402e7535529decf008cfd3dbd39d9d7e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 25 May 2025 03:09:29 +0100
Subject: [PATCH 1522/1549] rom.sh: simplify u-boot payload handling

define it with a single variable, rather than several.

this allows several checks to be greatly simplified.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../dell3050micro_vfsp_16mb/target.cfg        |  2 +-
 config/coreboot/dell7010sff_12mb/target.cfg   |  2 +-
 config/coreboot/dell780mt_8mb/target.cfg      |  2 +-
 .../dell780mt_truncate_8mb/target.cfg         |  2 +-
 config/coreboot/dell780usff_8mb/target.cfg    |  2 +-
 .../dell780usff_truncate_8mb/target.cfg       |  2 +-
 .../coreboot/dell9020mt_nri_12mb/target.cfg   |  2 +-
 .../coreboot/dell9020sff_nri_12mb/target.cfg  |  2 +-
 config/coreboot/e4300_4mb/target.cfg          |  2 +-
 config/coreboot/e5420_6mb/target.cfg          |  2 +-
 config/coreboot/e5520_6mb/target.cfg          |  2 +-
 config/coreboot/e5530_12mb/target.cfg         |  2 +-
 config/coreboot/e6220_10mb/target.cfg         |  2 +-
 config/coreboot/e6230_12mb/target.cfg         |  4 +-
 config/coreboot/e6320_10mb/target.cfg         |  2 +-
 config/coreboot/e6330_12mb/target.cfg         |  2 +-
 config/coreboot/e6400_4mb/target.cfg          |  2 +-
 config/coreboot/e6420_10mb/target.cfg         |  2 +-
 config/coreboot/e6430_12mb/target.cfg         |  2 +-
 config/coreboot/e6520_10mb/target.cfg         |  2 +-
 config/coreboot/e6530_12mb/target.cfg         |  2 +-
 config/coreboot/g43t_am3/target.cfg           |  2 +-
 config/coreboot/g43t_am3_16mb/target.cfg      |  2 +-
 config/coreboot/gru_bob/target.cfg            |  2 +-
 config/coreboot/gru_kevin/target.cfg          |  2 +-
 config/coreboot/hp2170p_16mb/target.cfg       |  2 +-
 config/coreboot/hp2560p_8mb/target.cfg        |  2 +-
 config/coreboot/hp2570p_16mb/target.cfg       |  2 +-
 config/coreboot/hp8200sff_4mb/target.cfg      |  2 +-
 config/coreboot/hp8200sff_8mb/target.cfg      |  2 +-
 config/coreboot/hp820g2_12mb/target.cfg       |  2 +-
 config/coreboot/hp8300cmt_16mb/target.cfg     |  2 +-
 config/coreboot/hp8300usdt_16mb/target.cfg    |  2 +-
 config/coreboot/hp8460pintel_8mb/target.cfg   |  2 +-
 config/coreboot/hp8470pintel_16mb/target.cfg  |  2 +-
 config/coreboot/hp9470m_16mb/target.cfg       |  2 +-
 config/coreboot/kcma_d8_16mb/target.cfg       |  2 +-
 config/coreboot/kcma_d8_2mb/target.cfg        |  2 +-
 config/coreboot/kfsn4_dre_1mb/target.cfg      |  2 +-
 config/coreboot/kfsn4_dre_2mb/target.cfg      |  2 +-
 config/coreboot/kgpe_d16_16mb/target.cfg      |  2 +-
 config/coreboot/kgpe_d16_2mb/target.cfg       |  2 +-
 config/coreboot/macbook11/target.cfg          |  2 +-
 config/coreboot/macbook11_16mb/target.cfg     |  2 +-
 config/coreboot/macbook21/target.cfg          |  2 +-
 config/coreboot/macbook21_16mb/target.cfg     |  2 +-
 config/coreboot/q45t_am/target.cfg            |  2 +-
 config/coreboot/qemu_arm64_12mb/target.cfg    |  2 +-
 config/coreboot/qemu_x86_12mb/target.cfg      |  2 +-
 config/coreboot/qemu_x86_64_12mb/target.cfg   |  2 +-
 config/coreboot/r400_16mb/target.cfg          |  2 +-
 config/coreboot/r400_4mb/target.cfg           |  2 +-
 config/coreboot/r400_8mb/target.cfg           |  2 +-
 config/coreboot/r500_4mb/target.cfg           |  2 +-
 config/coreboot/t1650_12mb/target.cfg         |  2 +-
 config/coreboot/t1700mt_bmrc_12mb/target.cfg  |  2 +-
 config/coreboot/t1700sff_bmrc_12mb/target.cfg |  2 +-
 config/coreboot/t400_16mb/target.cfg          |  2 +-
 config/coreboot/t400_4mb/target.cfg           |  2 +-
 config/coreboot/t400_8mb/target.cfg           |  2 +-
 config/coreboot/t420_8mb/target.cfg           |  2 +-
 config/coreboot/t420s_8mb/target.cfg          |  2 +-
 config/coreboot/t430_12mb/target.cfg          |  2 +-
 config/coreboot/t440plibremrc_12mb/target.cfg |  2 +-
 config/coreboot/t500_16mb/target.cfg          |  2 +-
 config/coreboot/t500_4mb/target.cfg           |  2 +-
 config/coreboot/t500_8mb/target.cfg           |  2 +-
 config/coreboot/t520_8mb/target.cfg           |  2 +-
 config/coreboot/t530_12mb/target.cfg          |  2 +-
 config/coreboot/t60_16mb_intelgpu/target.cfg  |  2 +-
 config/coreboot/t60_intelgpu/target.cfg       |  2 +-
 config/coreboot/w500_16mb/target.cfg          |  2 +-
 config/coreboot/w500_4mb/target.cfg           |  2 +-
 config/coreboot/w500_8mb/target.cfg           |  2 +-
 config/coreboot/w530_12mb/target.cfg          |  2 +-
 config/coreboot/w541_12mb/target.cfg          |  2 +-
 config/coreboot/x200_16mb/target.cfg          |  2 +-
 config/coreboot/x200_4mb/target.cfg           |  2 +-
 config/coreboot/x200_8mb/target.cfg           |  2 +-
 config/coreboot/x220_8mb/target.cfg           |  2 +-
 config/coreboot/x230_12mb/target.cfg          |  2 +-
 config/coreboot/x230_16mb/target.cfg          |  2 +-
 config/coreboot/x230t_12mb/target.cfg         |  2 +-
 config/coreboot/x230t_16mb/target.cfg         |  2 +-
 config/coreboot/x301_16mb/target.cfg          |  2 +-
 config/coreboot/x301_4mb/target.cfg           |  2 +-
 config/coreboot/x301_8mb/target.cfg           |  2 +-
 config/coreboot/x60/target.cfg                |  2 +-
 config/coreboot/x60_16mb/target.cfg           |  2 +-
 config/data/coreboot/mkhelper.cfg             |  5 +--
 include/rom.sh                                | 37 ++++++++-----------
 91 files changed, 107 insertions(+), 115 deletions(-)

diff --git a/config/coreboot/dell3050micro_vfsp_16mb/target.cfg b/config/coreboot/dell3050micro_vfsp_16mb/target.cfg
index f86065a1..e100fbed 100644
--- a/config/coreboot/dell3050micro_vfsp_16mb/target.cfg
+++ b/config/coreboot/dell3050micro_vfsp_16mb/target.cfg
@@ -10,4 +10,4 @@ grubtree="xhci"
 vcfg="3050micro"
 build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
 IFD_platform="sklkbl"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/dell7010sff_12mb/target.cfg b/config/coreboot/dell7010sff_12mb/target.cfg
index de6a8af8..34865f86 100644
--- a/config/coreboot/dell7010sff_12mb/target.cfg
+++ b/config/coreboot/dell7010sff_12mb/target.cfg
@@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="t1650"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/dell780mt_8mb/target.cfg b/config/coreboot/dell780mt_8mb/target.cfg
index 45b8ea0b..a58de7bd 100644
--- a/config/coreboot/dell780mt_8mb/target.cfg
+++ b/config/coreboot/dell780mt_8mb/target.cfg
@@ -8,4 +8,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/dell780mt_truncate_8mb/target.cfg b/config/coreboot/dell780mt_truncate_8mb/target.cfg
index 45b8ea0b..a58de7bd 100644
--- a/config/coreboot/dell780mt_truncate_8mb/target.cfg
+++ b/config/coreboot/dell780mt_truncate_8mb/target.cfg
@@ -8,4 +8,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/dell780usff_8mb/target.cfg b/config/coreboot/dell780usff_8mb/target.cfg
index 45b8ea0b..a58de7bd 100644
--- a/config/coreboot/dell780usff_8mb/target.cfg
+++ b/config/coreboot/dell780usff_8mb/target.cfg
@@ -8,4 +8,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/dell780usff_truncate_8mb/target.cfg b/config/coreboot/dell780usff_truncate_8mb/target.cfg
index 45b8ea0b..a58de7bd 100644
--- a/config/coreboot/dell780usff_truncate_8mb/target.cfg
+++ b/config/coreboot/dell780usff_truncate_8mb/target.cfg
@@ -8,4 +8,4 @@ payload_memtest="y"
 grub_scan_disk="nvme ahci ata"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/dell9020mt_nri_12mb/target.cfg b/config/coreboot/dell9020mt_nri_12mb/target.cfg
index 96fbb9e3..7c26ae5e 100644
--- a/config/coreboot/dell9020mt_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020mt_nri_12mb/target.cfg
@@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
 build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/dell9020sff_nri_12mb/target.cfg b/config/coreboot/dell9020sff_nri_12mb/target.cfg
index 96fbb9e3..7c26ae5e 100644
--- a/config/coreboot/dell9020sff_nri_12mb/target.cfg
+++ b/config/coreboot/dell9020sff_nri_12mb/target.cfg
@@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
 build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/e4300_4mb/target.cfg b/config/coreboot/e4300_4mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/e4300_4mb/target.cfg
+++ b/config/coreboot/e4300_4mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index 333030ce..d7510b96 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index 333030ce..d7510b96 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index 6cbab731..595ad782 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/e6220_10mb/target.cfg b/config/coreboot/e6220_10mb/target.cfg
index 333030ce..d7510b96 100644
--- a/config/coreboot/e6220_10mb/target.cfg
+++ b/config/coreboot/e6220_10mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/e6230_12mb/target.cfg b/config/coreboot/e6230_12mb/target.cfg
index b491fdc8..42eca05e 100644
--- a/config/coreboot/e6230_12mb/target.cfg
+++ b/config/coreboot/e6230_12mb/target.cfg
@@ -7,5 +7,5 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
+payload_uboot="amd64"
diff --git a/config/coreboot/e6320_10mb/target.cfg b/config/coreboot/e6320_10mb/target.cfg
index 333030ce..d7510b96 100644
--- a/config/coreboot/e6320_10mb/target.cfg
+++ b/config/coreboot/e6320_10mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/e6330_12mb/target.cfg b/config/coreboot/e6330_12mb/target.cfg
index 6cbab731..595ad782 100644
--- a/config/coreboot/e6330_12mb/target.cfg
+++ b/config/coreboot/e6330_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index b999b10c..f7500e97 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="e6400"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index 333030ce..d7510b96 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index 6cbab731..595ad782 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index 333030ce..d7510b96 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index 6cbab731..595ad782 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/g43t_am3/target.cfg b/config/coreboot/g43t_am3/target.cfg
index 3379b716..357eee9a 100644
--- a/config/coreboot/g43t_am3/target.cfg
+++ b/config/coreboot/g43t_am3/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/g43t_am3_16mb/target.cfg b/config/coreboot/g43t_am3_16mb/target.cfg
index f2f0a52d..a097a3e8 100644
--- a/config/coreboot/g43t_am3_16mb/target.cfg
+++ b/config/coreboot/g43t_am3_16mb/target.cfg
@@ -7,4 +7,4 @@ payload_memtest="y"
 release="n"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/gru_bob/target.cfg b/config/coreboot/gru_bob/target.cfg
index e5866cb7..dda11b5f 100644
--- a/config/coreboot/gru_bob/target.cfg
+++ b/config/coreboot/gru_bob/target.cfg
@@ -2,5 +2,5 @@
 
 tree="default"
 xarch="aarch64-elf arm-eabi"
-payload_uboot="y"
+payload_uboot="arm64"
 build_depend="u-boot/gru_bob"
diff --git a/config/coreboot/gru_kevin/target.cfg b/config/coreboot/gru_kevin/target.cfg
index 81a93f27..26fd442b 100644
--- a/config/coreboot/gru_kevin/target.cfg
+++ b/config/coreboot/gru_kevin/target.cfg
@@ -2,5 +2,5 @@
 
 tree="default"
 xarch="aarch64-elf arm-eabi"
-payload_uboot="y"
+payload_uboot="arm64"
 build_depend="u-boot/gru_kevin"
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index e1cffa41..d6868831 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2170p"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index 5715390e..fce385d9 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2560p"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index fb5d41e1..26c80f5f 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp2570p"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 521ba0ec..76effd9f 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="hp8200sff"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 521ba0ec..76effd9f 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="hp8200sff"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index 7fe45119..66d0433e 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="hp820g2"
 build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index 5bd323c9..f3fb43a7 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="ivybridge"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index 6cbab731..595ad782 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index d6179420..255bfac7 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8460pintel"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index 65828b25..01b2ed5b 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp8470pintel"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index e4dbdc93..6ebd81c5 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="hp9470m"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/kcma_d8_16mb/target.cfg b/config/coreboot/kcma_d8_16mb/target.cfg
index 112c101f..75955f7e 100644
--- a/config/coreboot/kcma_d8_16mb/target.cfg
+++ b/config/coreboot/kcma_d8_16mb/target.cfg
@@ -9,4 +9,4 @@ xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/kcma_d8_2mb/target.cfg b/config/coreboot/kcma_d8_2mb/target.cfg
index 112c101f..75955f7e 100644
--- a/config/coreboot/kcma_d8_2mb/target.cfg
+++ b/config/coreboot/kcma_d8_2mb/target.cfg
@@ -9,4 +9,4 @@ xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/kfsn4_dre_1mb/target.cfg b/config/coreboot/kfsn4_dre_1mb/target.cfg
index a87ac1ad..c4536856 100644
--- a/config/coreboot/kfsn4_dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_1mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 xlang="c"
 build_depend="seabios/default memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/kfsn4_dre_2mb/target.cfg b/config/coreboot/kfsn4_dre_2mb/target.cfg
index 17021b47..f942604b 100644
--- a/config/coreboot/kfsn4_dre_2mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_2mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 xlang="c"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/kgpe_d16_16mb/target.cfg b/config/coreboot/kgpe_d16_16mb/target.cfg
index 112c101f..75955f7e 100644
--- a/config/coreboot/kgpe_d16_16mb/target.cfg
+++ b/config/coreboot/kgpe_d16_16mb/target.cfg
@@ -9,4 +9,4 @@ xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/kgpe_d16_2mb/target.cfg b/config/coreboot/kgpe_d16_2mb/target.cfg
index 112c101f..75955f7e 100644
--- a/config/coreboot/kgpe_d16_2mb/target.cfg
+++ b/config/coreboot/kgpe_d16_2mb/target.cfg
@@ -9,4 +9,4 @@ xlang="c"
 grub_scan_disk="nvme ahci"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index c1e3a3c6..f41e3fe9 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
 build_depend="seabios/default grub/default u-boot/i386coreboot"
-payload_uboot_i386="y"
+payload_uboot="i386"
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index e0d1afbf..ff2498eb 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 scan_scan_disk="ahci"
 build_depend="seabios/default grub/default u-boot/i386coreboot"
-payload_uboot_i386="y"
+payload_uboot="i386"
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/q45t_am/target.cfg b/config/coreboot/q45t_am/target.cfg
index 3379b716..357eee9a 100644
--- a/config/coreboot/q45t_am/target.cfg
+++ b/config/coreboot/q45t_am/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_memtest="y"
 grubtree="nvme"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/qemu_arm64_12mb/target.cfg b/config/coreboot/qemu_arm64_12mb/target.cfg
index 5d8f0db2..2ea9482f 100644
--- a/config/coreboot/qemu_arm64_12mb/target.cfg
+++ b/config/coreboot/qemu_arm64_12mb/target.cfg
@@ -2,5 +2,5 @@
 
 tree="default"
 xarch="aarch64-elf arm-eabi"
-payload_uboot="y"
+payload_uboot="arm64"
 build_depend="u-boot/qemu_arm64_12mb"
diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg
index 2074beca..476a98cb 100644
--- a/config/coreboot/qemu_x86_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_12mb/target.cfg
@@ -6,4 +6,4 @@ payload_grub="y"
 payload_seabios="y"
 payload_memtest="y"
 build_depend="seabios/default grub/default memtest86plus u-boot/i386coreboot"
-payload_uboot_i386="y"
+payload_uboot="i386"
diff --git a/config/coreboot/qemu_x86_64_12mb/target.cfg b/config/coreboot/qemu_x86_64_12mb/target.cfg
index 7855bd6f..61ae6299 100644
--- a/config/coreboot/qemu_x86_64_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_64_12mb/target.cfg
@@ -5,4 +5,4 @@ xarch="i386-elf"
 payload_grub="y"
 payload_seabios="y"
 payload_memtest="y"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index ef878ea1..23bfb335 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -5,4 +5,4 @@ xarch="i386-elf"
 payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index de6a8af8..34865f86 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="nvme"
 vcfg="t1650"
 build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/t1700mt_bmrc_12mb/target.cfg b/config/coreboot/t1700mt_bmrc_12mb/target.cfg
index 06de408c..5fd0d500 100644
--- a/config/coreboot/t1700mt_bmrc_12mb/target.cfg
+++ b/config/coreboot/t1700mt_bmrc_12mb/target.cfg
@@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="t1700"
 build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/t1700sff_bmrc_12mb/target.cfg b/config/coreboot/t1700sff_bmrc_12mb/target.cfg
index 06de408c..5fd0d500 100644
--- a/config/coreboot/t1700sff_bmrc_12mb/target.cfg
+++ b/config/coreboot/t1700sff_bmrc_12mb/target.cfg
@@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="t1700"
 build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index 333030ce..d7510b96 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index 333030ce..d7510b96 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index 6cbab731..595ad782 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index 96fbb9e3..7c26ae5e 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
 build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index 333030ce..d7510b96 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index 6cbab731..595ad782 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index c1e3a3c6..f41e3fe9 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
 build_depend="seabios/default grub/default u-boot/i386coreboot"
-payload_uboot_i386="y"
+payload_uboot="i386"
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index c1e3a3c6..f41e3fe9 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
 build_depend="seabios/default grub/default u-boot/i386coreboot"
-payload_uboot_i386="y"
+payload_uboot="i386"
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index 6cbab731..595ad782 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index 96fbb9e3..7c26ae5e 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci"
 grubtree="xhci"
 vcfg="haswell"
 build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index 53a597b6..f4d81d19 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index 333030ce..d7510b96 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="sandybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg
index 6cbab731..595ad782 100644
--- a/config/coreboot/x230_12mb/target.cfg
+++ b/config/coreboot/x230_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index 6cbab731..595ad782 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg
index 6cbab731..595ad782 100644
--- a/config/coreboot/x230t_12mb/target.cfg
+++ b/config/coreboot/x230t_12mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index 6cbab731..595ad782 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 grub_scan_disk="ahci"
 vcfg="ivybridge"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index 4d4a4c25..31e9f759 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index 4d4a4c25..31e9f759 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index 4d4a4c25..31e9f759 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -7,4 +7,4 @@ payload_grub="y"
 payload_memtest="y"
 release="n"
 grub_scan_disk="ahci"
-payload_uboot_amd64="y"
+payload_uboot="amd64"
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index c1e3a3c6..f41e3fe9 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
 build_depend="seabios/default grub/default u-boot/i386coreboot"
-payload_uboot_i386="y"
+payload_uboot="i386"
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index c1e3a3c6..f41e3fe9 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -6,4 +6,4 @@ payload_seabios="y"
 payload_grub="y"
 grub_scan_disk="ahci"
 build_depend="seabios/default grub/default u-boot/i386coreboot"
-payload_uboot_i386="y"
+payload_uboot="i386"
diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index c993fbd4..630654a0 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -5,10 +5,9 @@ build_depend="seabios/default grub/default memtest86plus u-boot/amd64coreboot"
 
 seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
 
-pv="payload_uboot payload_seabios payload_memtest payload_grub"
-pv="$pv payload_uboot_i386 payload_uboot_amd64 payload_grubsea"
+pv="payload_seabios payload_memtest payload_grub payload_grubsea"
 v="initmode ubootelf grub_scan_disk uboot_config grubtree grubelf pname"
-v="$v displaymode tmprom newrom"
+v="$v displaymode tmprom newrom payload_uboot"
 eval `setvars "n" $pv`
 eval `setvars "" $v`
 
diff --git a/include/rom.sh b/include/rom.sh
index 1c39979d..eedd05d3 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -94,21 +94,16 @@ mkcorebootbin()
 	initmode="${initmode%%_*}"
 	cbfstool="elf/cbfstool/$tree/cbfstool"
 
-	[ "$payload_uboot_i386" = "y" ] && \
-	    [ "$payload_uboot_amd64" = "y" ] && \
-		err "'$target' enables 32- and 64-bit x86 U-Boot"
+	[ -z "$payload_uboot" ] || [ "$payload_uboot" = "amd64" ] || \
+	    [ "$payload_uboot" = "i386" ] || [ "$payload_uboot" = "arm64" ] \
+		|| err "'$target' defines bad u-boot type '$payload_uboot'"
 
-	if [ "$payload_uboot_i386" = "y" ] || \
-	    [ "$payload_uboot_amd64" = "y" ]; then
-		printf "'%s' has x86 U-Boot; assuming SeaBIOS=y\n" \
-		    "$target" 1>&2
+	[ -z "$payload_uboot" ] || [ "$payload_uboot" = "arm64" ] || \
 		payload_seabios="y"
-	fi
 
 	[ -n "$uboot_config" ] || uboot_config="default"
-	[ "$payload_uboot" = "y" ] || payload_seabios="y"
 	[ "$payload_grub" = "y" ] && payload_seabios="y"
-	[ "$payload_seabios" = "y" ] && [ "$payload_uboot" = "y" ] && \
+	[ "$payload_seabios" = "y" ] && [ "$payload_uboot" = "arm64" ] && \
 	    $dry err "$target: U-Boot(arm64) and SeaBIOS/GRUB both enabled."
 
 	[ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata"
@@ -126,7 +121,8 @@ mkcorebootbin()
 	if $dry grep "CONFIG_PAYLOAD_NONE=y" "$defconfig"; then
 		[ "$payload_seabios" = "y" ] && pname="seabios" && \
 		    $dry add_seabios
-		[ "$payload_uboot" = "y" ] && pname="uboot" && $dry add_uboot
+		[ "$payload_uboot" = "arm64" ] && pname="uboot" && \
+		    $dry add_uboot; :
 	else
 		pname="custom"
 		$dry cprom
@@ -135,10 +131,8 @@ mkcorebootbin()
 
 add_seabios()
 {
-	if [ "$payload_uboot_i386" = "y" ] || \
-	    [ "$payload_uboot_amd64" = "y" ]; then
-		$dry add_uboot
-	fi
+	[ -z "$payload_uboot" ] || [ "$payload_uboot" = "arm64" ] || \
+	    $dry add_uboot
 
 	_seabioself="elf/seabios/default/$initmode/bios.bin.elf"
 	_seaname="fallback/payload" && [ "$payload_grubsea" = "y" ] && \
@@ -159,7 +153,7 @@ add_seabios()
 	[ "$payload_grub" = "y" ] && add_grub
 
 	[ "$payload_grubsea" != "y" ] && cprom
-	[ "$payload_uboot_amd64" = "y" ] && [ "$displaymode" != "txtmode" ] && \
+	[ "$payload_uboot" = "amd64" ] && [ "$displaymode" != "txtmode" ] && \
 	    [ "$initmode" != "normal" ] && [ "$payload_grubsea" != "y" ] && \
 	    pname="seauboot" && cprom "seauboot"
 	[ "$payload_grub" = "y" ] && pname="seagrub" && mkseagrub; :
@@ -206,14 +200,13 @@ add_uboot()
 	ubpath="fallback/payload"
 	ubtarget="$target"
 	# override for x86/x86_64 targets:
-	if [ "$payload_uboot_i386" = "y" ] || \
-	    [ "$payload_uboot_amd64" = "y" ]; then
+	if [ -n "$payload_uboot" ] && [ "$payload_uboot" != "arm64" ]; then
 		ubcbfsargs="-l 0x1110000 -e 0x1110000" # 64-bit and 32-bit
 			# on 64-bit, 0x1120000 is the SPL, and stub before that
 		ubpath="img/u-boot" # 64-bit
 		ubtarget="amd64coreboot"
-		[ "$payload_uboot_i386" = "y" ] && ubpath="u-boot" # 32-bit
-		[ "$payload_uboot_i386" = "y" ] && ubtarget="i386coreboot"; :
+		[ "$payload_uboot" = "i386" ] && ubpath="u-boot" # 32-bit
+		[ "$payload_uboot" = "i386" ] && ubtarget="i386coreboot"; :
 	fi
 
 	ubdir="elf/u-boot/$ubtarget/$uboot_config"
@@ -222,8 +215,8 @@ add_uboot()
 	ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \
 	    ubootelf="$ubdir/u-boot"
 	# override for x86/x86_64 targets:
-	[ "$payload_uboot_i386" = "y" ] && ubootelf="$ubdir/u-boot-dtb.bin"
-	[ "$payload_uboot_amd64" = "y" ] && \
+	[ "$payload_uboot" = "i386" ] && ubootelf="$ubdir/u-boot-dtb.bin"
+	[ "$payload_uboot" = "amd64" ] && \
 	    ubootelf="$ubdir/u-boot-x86-with-spl.bin" # EFI-compatible
 
 	cbfs "$tmprom" "$ubootelf" "$ubpath" $ubcbfsargs

From d2e148fdd9d3f341940c22c241d219a0372f8f57 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 25 May 2025 04:40:30 +0100
Subject: [PATCH 1523/1549] rom.sh: simplify ccache handling for coreboot

we simply do not need to run the make-oldconfig command
at all, and after removing it, the "cook" function seemed
quite redundant so i merged it with mkvendorfiles()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 11 ++---------
 1 file changed, 2 insertions(+), 9 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index eedd05d3..4a3503f4 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -45,7 +45,8 @@ mkpayload_grub()
 
 mkvendorfiles()
 {
-	[ -z "$mode" ] && $dry cook_coreboot_config
+	[ -n "$mode" ] || [ ! -f "$srcdir/.config" ] || $dry printf \
+	    "CONFIG_CCACHE=y\n" >> "$srcdir/.config" || err "$srcdir: !cook"; :
 	fx_ check_coreboot_util printf "cbfstool\nifdtool\n"
 	printf "%s\n" "${version%%-*}" > "$srcdir/.coreboot-version" || \
 	    err "!mk $srcdir .coreboot-version"
@@ -53,14 +54,6 @@ mkvendorfiles()
 	    x_ ./mk download "$target"; :
 }
 
-cook_coreboot_config()
-{
-	[ -f "$srcdir/.config" ] || return 0
-	printf "CONFIG_CCACHE=y\n" >> "$srcdir/.config" || \
-	    err "$srcdir/.config: Could not enable ccache"
-	make -C "$srcdir" oldconfig || err "Could not cook $srcdir/.config"; :
-}
-
 check_coreboot_util()
 {
 	[ "$badhash" = "y" ] && x_ rm -f "elf/$1/$tree/$1"

From a47e98117235682e9d1744ddbf1d16523532d96a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 25 May 2025 04:45:23 +0100
Subject: [PATCH 1524/1549] rom.sh: rename mkvendorfiles

it mainly does general tasks, like handling utils
and enabling ccache. the vfiles are a small part.

rename the function accordingly. it is called by
premake, so let's call it corebootpremake.

this change will also make sense when cherry-picked
into cbmk, which does not handle vfiles at all.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 config/data/coreboot/mkhelper.cfg | 2 +-
 include/rom.sh                    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
index 630654a0..da9015f1 100644
--- a/config/data/coreboot/mkhelper.cfg
+++ b/config/data/coreboot/mkhelper.cfg
@@ -11,6 +11,6 @@ v="$v displaymode tmprom newrom payload_uboot"
 eval `setvars "n" $pv`
 eval `setvars "" $v`
 
-premake="mkvendorfiles"
+premake="corebootpremake"
 mkhelper="mkcorebootbin"
 postmake="mkcoreboottar"
diff --git a/include/rom.sh b/include/rom.sh
index 4a3503f4..632ecca3 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -43,7 +43,7 @@ mkpayload_grub()
 	    "/boot/grub/grub.cfg=$grubdata/memdisk.cfg"; :
 }
 
-mkvendorfiles()
+corebootpremake()
 {
 	[ -n "$mode" ] || [ ! -f "$srcdir/.config" ] || $dry printf \
 	    "CONFIG_CCACHE=y\n" >> "$srcdir/.config" || err "$srcdir: !cook"; :

From 97ce531c341f36b1496729e4a0f882b4ad9621b7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 25 May 2025 05:03:03 +0100
Subject: [PATCH 1525/1549] rom.sh: simplify mkcoreboottar()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/rom.sh | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/include/rom.sh b/include/rom.sh
index 632ecca3..4ac4c5de 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -253,10 +253,7 @@ cbfs()
 
 mkcoreboottar()
 {
-	[ "$target" = "$tree" ] && return 0
-	[ "$XBMK_RELEASE" = "y" ] || return 0
-	[ "$release" != "n" ] || return 0
-
-	$dry mkrom_tarball "bin/$target"
-	$dry x_ ./mk inject "bin/${relname}_${target}.tar.xz" nuke; :
+	[ "$target" != "$tree" ] && [ "$XBMK_RELEASE" = "y" ] && \
+	    [ "$release" != "n" ] && $dry mkrom_tarball "bin/$target" && \
+	    $dry x_ ./mk inject "bin/${relname}_${target}.tar.xz" nuke; :
 }

From ad333ae24810dcb762d5561d0b7d7dabec7c0eac Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 25 May 2025 14:35:02 +0100
Subject: [PATCH 1526/1549] tree.sh: Don't auto-run make-oldconfig

This code was introduced to provide fault tolerance,
so that if I forgot to manually update the configs
myself, builds would still succeed, e.g. coreboot
builds.

However, there have been cases in the past where this
introduces settings we don't want, and in general we
do want to know when there is an error in the configs.

The policy should always be: fail early, fail hard.

This also mitigates bugs in U-Boot's build system; for
example, when I last attempted to update the U-Boot
tree for x86, make-oldconfig introduced a lot of junk
settings unrelated, which then introduced code that
would brick the board if you tried it on one, e.g.
it broke booting most Linux kernels via bootflow.

With this change, U-Boot will be easier to handle,
which normally requires manual configuration; the
automated make-oldconfig reconfiguration feature
breaks U-Boot. This will no longer occur, since we
no longer run it manually.

On the other hand, this feature has also prevented
other disastrous bugs in the past, such as when I
forgot to properly set the SPD size on T480; it was
set to 256 bytes, not 512 as is correct. Therefore,
this new design change means I must also be more
vigilant about config changes in project trees.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/tree.sh | 2 --
 1 file changed, 2 deletions(-)

diff --git a/include/tree.sh b/include/tree.sh
index 83887864..8aaadd57 100644
--- a/include/tree.sh
+++ b/include/tree.sh
@@ -279,8 +279,6 @@ handle_makefile()
 	    $dry x_ make -C "$srcdir" $cleanargs clean
 
 	[ -f "$defconfig" ] && x_ cp "$defconfig" "$srcdir/.config"
-	[ -n "$mode" ] || [ -n "$btype" ] || $dry make -C \
-	    "$srcdir" silentoldconfig || make -C "$srcdir" oldconfig || :
 
 	run_make_command || err "handle_makefile $srcdir: no makefile!"
 

From 2493203ee53befbf46de0ff7908214b5e64033a8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 25 May 2025 14:46:33 +0100
Subject: [PATCH 1527/1549] get.sh: Properly error out if tmpclone fails

We rely on a non-zero exit on other try_ commands, which
works fine there because we then check the file afterward
and error out accordingly.

For git repositories, we assume that both mirrors are
identical and therefore once we get to the first clone
attempt, we assume that it must succeed.

Therefore, if it does not succeed, we must fail. This fixes
a regression I found in testing, where sometimes a failed
patching attempt would not result in an error exit, and
would therefore result in broken sources being present.

In practise, I always very closely watch the terminal when
testing xbmk, especially when updating project patches, so
we probably didn't introduce any broken sources in practice.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/get.sh b/include/get.sh
index 6f1b5f1d..3d06eb4a 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -111,7 +111,8 @@ try_file()
 	eval "[ -$echk \"$cached\" ] || return 1"
 
 	if [ "$2" = "git" ]; then
-		[ -d "$5" ] || tmpclone "$cached" "$5" "$6" "$7" || return 1
+		[ -d "$5" ] || tmpclone "$cached" "$5" "$6" "$7" || \
+		    err "Can't clone final repo in command: try_file $*"; :
 	else
 		bad_checksum "$6" "$cached" && x_ rm -f "$cached" && return 1
 		[ "$cached" != "$5" ] && x_ cp "$cached" "$5"

From 30bc3732c39cbb14faa8f7caf0c9206f6a401008 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 25 May 2025 17:01:10 +0100
Subject: [PATCH 1528/1549] init.sh: error out if .git/ is a symlink

the current behaviour is a relic from the older lbmk
design, before recent auditing.

the current logic would cause xbmk to continue execution,
going into a child process with .git/ being a symlink.

The .git/ directory should never be a symlink, because
it is extremely error-prone.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/init.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/init.sh b/include/init.sh
index 38eb1c81..9265bf45 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -195,7 +195,7 @@ xbmk_git_init()
 		    || err "Run this first: $gitcmd \"your ${gitcmd##*.}\""
 	done
 
-	[ -L ".git" ] && return 1
+	[ -L ".git" ] && err "'$xbmkpwd/.git' is a symlink"
 	[ -e ".git" ] && return 0
 	eval "`setvars "$(date -Rud @$versiondate)" cdate _nogit`"
 

From ba7c49c090b7b41564ec5e9c69e60a022c2ace6e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 26 May 2025 00:33:36 +0100
Subject: [PATCH 1529/1549] vendor.sh: simplify fetch()

the checks at the end of the function are mostly
superfluous, because bad_checksum() is immediately
called just beforehand, and performs the same checks.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 99fc7467..0111f90f 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -132,14 +132,8 @@ fetch()
 	( fx_ "eval mkdst \"$binsum\"" x_ find "${_pre_dest%/*}" -type f ) || :
 
 	bad_checksum "$binsum" "$_dest" || [ ! -f "$_dest" ] || return 0
-	[ -z "$binsum" ] && \
-	    printf "'%s', '%s': checksum undefined. Check files in '%s'\n" \
-	    "$board" "$_dest" "${_pre_dest%/*}" 1>&2
-	e "$_dest" f not && err "missing file '$_dest', !extract_$dl_type"; :
-	e "$_dest" f && printf "WARNING: '%s' made with bad hash (will rm)\n" \
-	    "$_dest" 1>&2
-	[ -L "$_dest" ] && printf "WARNING: '%s' is a link. Please delete!\n" \
-	    "$_dest" 1>&2
+	[ -z "$binsum" ] && printf "'%s': checksum undefined\n" "$_dest" 1>&2
+	[ -L "$_dest" ] && printf "WARNING: '%s' is a link!\n" "$_dest" 1>&2
 	[ -L "$_dest" ] || x_ rm -f "$_dest"
 	err "Could not safely extract '$_dest', for board '$board'"
 }

From ffe387ac6b98d99f82660410f23bb931e04beed8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 26 May 2025 00:35:38 +0100
Subject: [PATCH 1530/1549] get.sh: remove superfluous command in try_git()

A git-pull is performed immediately after git-fetch.
Git-pull already performs git-fetch as a prerequisite.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/get.sh b/include/get.sh
index 3d06eb4a..4105b93f 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -149,7 +149,6 @@ try_git()
 	( x_ git -C "$gitdest" remote remove backup ) || :
 	x_ git -C "$gitdest" remote add main "$4"
 	x_ git -C "$gitdest" remote add backup "$5"
-	( x_ git -C "$gitdest" fetch --all ) || :
 	( x_ git -C "$gitdest" pull --all ) || :; :
 }
 

From afc36754b13de41bfbea5ebf5202bdb01cb4aeeb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 26 May 2025 00:44:57 +0100
Subject: [PATCH 1531/1549] get.sh: remove redundant printf in fetch_project

The following execution will result in another printf
that says exactly what is being downloaded.

There is no need to inform the user twice about
what is being downloaded.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/get.sh b/include/get.sh
index 4105b93f..639d101d 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -26,7 +26,6 @@ fetch_project()
 
 	[ -n "$xtree" ] && x_ ./mk -f coreboot "$xtree"
 	[ -z "$depend" ] || for d in $depend ; do
-		printf "'%s' needs '%s'; grabbing '%s'\n" "$project" "$d" "$d"
 		x_ ./mk -f $d
 	done
 	clone_project

From e981132c829dea9dd958ea174e35e15e122451d7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 26 May 2025 00:50:06 +0100
Subject: [PATCH 1532/1549] get.sh: consolidate printf statements

stick it in git_prep, which both single- and multi-tree
projects will use, when downloading git repositories.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index 639d101d..a60e8c36 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -11,8 +11,6 @@ tmpgitcache="$XBMK_CACHE/tmpgit"
 fetch_targets()
 {
 	e "src/$project/$tree" d && return 0
-
-	printf "Creating %s tree %s\n" "$project" "$tree"
 	git_prep "$url" "$bkup_url" "$xbmkpwd/$configdir/$tree/patches" \
 	    "src/$project/$tree" with_submodules
 }
@@ -35,7 +33,6 @@ clone_project()
 {
 	loc="$XBMK_CACHE/clone/$project" && singletree "$project" && \
 	    loc="src/$project"
-	printf "Downloading project '%s' to '%s'\n" "$project" "$loc"
 
 	e "$loc" d missing && remkdir "${tmpgit%/*}" && git_prep \
 	    "$url" "$bkup_url" "$xbmkpwd/config/$project/patches" "$loc"; :
@@ -43,6 +40,8 @@ clone_project()
 
 git_prep()
 {
+	printf "Creating code directory, src/%s/%s\n" "$project" "$tree"
+
 	_patchdir="$3"
 	_loc="$4" # $1 and $2 are gitrepo and gitrepo_backup
 

From 18dacd4c22b1dfe6ab985d76712dd8261f173ce4 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 26 May 2025 00:57:50 +0100
Subject: [PATCH 1533/1549] xbmk: rename xbmklocal/xbmktmp variables

shorten them

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh     |  2 +-
 include/init.sh    | 13 ++++++-------
 include/inject.sh  | 14 +++++++-------
 include/release.sh |  2 +-
 include/rom.sh     |  6 +++---
 include/tree.sh    |  6 +++---
 include/vendor.sh  | 14 +++++++-------
 7 files changed, 28 insertions(+), 29 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index a60e8c36..ebaaaff1 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -5,7 +5,7 @@
 eval "`setvars "" loc url bkup_url subcurl subhash subgit subgit_bkup \
     depend subcurl_bkup repofail`"
 
-tmpgit="$xbmklocal/gitclone"
+tmpgit="$xbloc/gitclone"
 tmpgitcache="$XBMK_CACHE/tmpgit"
 
 fetch_targets()
diff --git a/include/init.sh b/include/init.sh
index 9265bf45..bc5a62b6 100644
--- a/include/init.sh
+++ b/include/init.sh
@@ -14,13 +14,13 @@ projectsite="https://libreboot.org/"
     export PATH="/usr/local/bin:/usr/bin:/bin:/usr/local/games:/usr/games"
 
 eval "`setvars "" _nogit board reinstall versiondate aur_notice configdir \
-    datadir version xbmkpwd relname xbmkpwd xbmktmp python pyver xbmklocal \
+    datadir version xbmkpwd relname xbmkpwd xbtmp python pyver xbloc \
     xbmklock cvxbmk cvchk xbmkpath`"
 
 xbmk_init()
 {
 	xbmkpwd="`pwd`" || err "Cannot generate PWD"
-	xbmklocal="$xbmkpwd/tmp"
+	xbloc="$xbmkpwd/tmp"
 	xbmklock="$xbmkpwd/lock"
 
 	export PWD="$xbmkpwd"
@@ -71,7 +71,7 @@ xbmk_set_env()
 	# unify all temporary files/directories in a single TMPDIR
 	[ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || \
 	    unset TMPDIR
-	[ -n "${TMPDIR+x}" ] && export TMPDIR="$TMPDIR" && xbmktmp="$TMPDIR"
+	[ -n "${TMPDIR+x}" ] && export TMPDIR="$TMPDIR" && xbtmp="$TMPDIR"
 	[ -z "${TMPDIR+x}" ] || is_child="y" # child instance, so return
 
 	if [ "$is_child" = "y" ]; then
@@ -87,7 +87,7 @@ xbmk_set_env()
 	# parent instance of xbmk, so don't return. set up TMPDIR
 	export TMPDIR="/tmp"
 	export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
-	xbmktmp="$TMPDIR"
+	xbtmp="$TMPDIR"
 
 	export XBMK_CACHE="$xbmkpwd/cache"
 	[ -L "$XBMK_CACHE" ] && [ "$XBMK_CACHE" = "$xbmkpwd/cache" ] && \
@@ -107,8 +107,7 @@ xbmk_set_env()
 	xbmk_set_version
 	export LOCALVERSION="-$projectname-${version%%-*}"
 
-	remkdir "$xbmktmp" "$xbmklocal"
-	remkdir "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
+	remkdir "$xbtmp" "$xbloc" "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath"
 
 	xbmk_set_pyver
 }
@@ -211,7 +210,7 @@ xbmk_child_exec()
 {
 	xbmk_rval=0
 	( x_ ./mk "$@" ) || xbmk_rval=1
-	( x_ rm -Rf "$xbmklocal" "$xbmktmp" ) || xbmk_rval=1
+	( x_ rm -Rf "$xbloc" "$xbtmp" ) || xbmk_rval=1
 	( x_ rm -f "$xbmklock" ) || xbmk_rval=1
 	exit $xbmk_rval
 }
diff --git a/include/inject.sh b/include/inject.sh
index 74f688a1..d2808301 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -103,36 +103,36 @@ patch_release()
 
 readkconfig()
 {
-	x_ rm -f "$xbmktmp/cbcfg"
+	x_ rm -f "$xbtmp/cbcfg"
 	fx_ scankconfig x_ find "$boarddir/config" -type f
-	eval "`setcfg "$xbmktmp/cbcfg" 1`"
+	eval "`setcfg "$xbtmp/cbcfg" 1`"
 	setvfile "$@" || return 1; :
 }
 
 scankconfig()
 {
 	for cbc in $cv; do
-		grep "$cbc" "$1" 1>>"$xbmktmp/cbcfg" 2>/dev/null || :
+		grep "$cbc" "$1" 1>>"$xbtmp/cbcfg" 2>/dev/null || :
 	done
 }
 
 modify_mac()
 {
-	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "$xbmklocal/gbe"
+	x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "$xbloc/gbe"
 	[ -n "$new_mac" ] && [ "$new_mac" != "restore" ] && \
 	    x_ make -C util/nvmutil clean && x_ make -C util/nvmutil && \
-	    x_ "$nvm" "$xbmklocal/gbe" setmac "$new_mac"
+	    x_ "$nvm" "$xbloc/gbe" setmac "$new_mac"
 
 	fx_ newmac x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom"
 
 	printf "\nThe following GbE NVM data will be written:\n"
-	x_ "$nvm" "$xbmklocal/gbe" dump | grep -v "bytes read from file" || :
+	x_ "$nvm" "$xbloc/gbe" dump | grep -v "bytes read from file" || :
 }
 
 newmac()
 {
 	e "$1" f && xchanged="y" && x_ \
-	    "$ifdtool" $ifdprefix -i GbE:"$xbmklocal/gbe" "$1" -O "$1"; :
+	    "$ifdtool" $ifdprefix -i GbE:"$xbloc/gbe" "$1" -O "$1"; :
 }
 
 remktar()
diff --git a/include/release.sh b/include/release.sh
index f23ed541..5b822c7b 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -22,7 +22,7 @@ release()
 	[ -e "$reldest" ] && \
 	    err "already exists: \"$reldest\""
 
-	vdir="$XBMK_CACHE/relpwd/${xbmktmp##*/}/$version"
+	vdir="$XBMK_CACHE/relpwd/${xbtmp##*/}/$version"
 	rsrc="$vdir/${relname}_src"
 
 	remkdir "$vdir"
diff --git a/include/rom.sh b/include/rom.sh
index 4ac4c5de..e8caf024 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -78,7 +78,7 @@ mkcorebootbin()
 {
 	[ "$target" = "$tree" ] && return 0
 
-	tmprom="$xbmktmp/coreboot.rom"
+	tmprom="$xbtmp/coreboot.rom"
 	$dry x_ cp "$srcdir/build/coreboot.rom" "$tmprom"
 
 	initmode="${defconfig##*/}"
@@ -158,8 +158,8 @@ add_grub()
 	    _grubname="fallback/payload"
 	cbfs "$tmprom" "$grubelf" "$_grubname"
 	printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
-	    > "$xbmktmp/tmpcfg" || err "$target: !insert scandisk"
-	cbfs "$tmprom" "$xbmktmp/tmpcfg" scan.cfg raw
+	    > "$xbtmp/tmpcfg" || err "$target: !insert scandisk"
+	cbfs "$tmprom" "$xbtmp/tmpcfg" scan.cfg raw
 	[ "$initmode" != "normal" ] && [ "$displaymode" != "txtmode" ] && \
 	    cbfs "$tmprom" "$grubdata/background/background1280x800.png" \
 	    "background.png" raw; :
diff --git a/include/tree.sh b/include/tree.sh
index 8aaadd57..11607eed 100644
--- a/include/tree.sh
+++ b/include/tree.sh
@@ -58,7 +58,7 @@ trees()
 
 	mkhelpercfg="$datadir/mkhelper.cfg"
 	if e "$mkhelpercfg" f missing; then
-		mkhelpercfg="$xbmktmp/mkhelper.cfg"
+		mkhelpercfg="$xbtmp/mkhelper.cfg"
 		x_ touch "$mkhelpercfg"
 	fi
 
@@ -181,9 +181,9 @@ check_project_hashes()
 
 	fx_ "x_ sha512sum" find "$datadir" "$configdir/$tree" "$mdir" \
 	    -type f -not -path "*/.git*/*" | awk '{print $1}' > \
-	    "$xbmktmp/project.hash" || err "!h $project $tree"
+	    "$xbtmp/project.hash" || err "!h $project $tree"
 
-	pjhash="$(sha512sum "$xbmktmp/project.hash" | awk '{print $1}')" || :
+	pjhash="$(sha512sum "$xbtmp/project.hash" | awk '{print $1}')" || :
 	[ "$pjhash" != "$old_pjhash" ] && badhash="y"
 	[ -f "$XBMK_CACHE/hash/$project$tree" ] || badhash="y"
 
diff --git a/include/vendor.sh b/include/vendor.sh
index 0111f90f..6702f5fd 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -150,9 +150,9 @@ extract_intel_me()
 {
 	e "$mecleaner" f not && err "$cbdir: me_cleaner missing"
 
-	_7ztest="$xbmklocal/metmp/a"
-	_metmp="$xbmklocal/me.bin"
-	x_ rm -f "$_metmp" "$xbmklocal/a"
+	_7ztest="$xbloc/metmp/a"
+	_metmp="$xbloc/me.bin"
+	x_ rm -f "$_metmp" "$xbloc/a"
 
 	mfs="" && [ "$ME11bootguard" = "y" ] && mfs="--whitelist MFS" && \
 	    chkvars ME11delta ME11version ME11sku ME11pch
@@ -178,7 +178,7 @@ find_me()
 
 	_7ztest="${_7ztest}a" && _r="-r" && [ -n "$mfs" ] && _r=""
 
-	"$mecleaner" $mfs $_r -t -O "$xbmklocal/a" -M "$_metmp" "$1" || \
+	"$mecleaner" $mfs $_r -t -O "$xbloc/a" -M "$_metmp" "$1" || \
 	    "$mecleaner" $mfs $_r -t -O "$_metmp" "$1" || "$me7updateparser" \
 	    -O "$_metmp" "$1" || extract_archive "$1" "$_7ztest" || return 0
 
@@ -387,9 +387,9 @@ vfile()
 	elif [ "$nuke" = "nuke" ]; then
 		x_ "$cbfstool" "$rom" remove -n "$cbfsname"
 	elif [ "$_t" = "stage" ]; then # the only stage we handle is refcode
-		x_ rm -f "$xbmklocal/refcode"
-		x_ "$rmodtool" -i "$_dest" -o "$xbmklocal/refcode"
-		x_ "$cbfstool" "$rom" add-stage -f "$xbmklocal/refcode" \
+		x_ rm -f "$xbloc/refcode"
+		x_ "$rmodtool" -i "$_dest" -o "$xbloc/refcode"
+		x_ "$cbfstool" "$rom" add-stage -f "$xbloc/refcode" \
 		    -n "$cbfsname" -t stage
 	else
 		x_ "$cbfstool" "$rom" add -f "$_dest" -n "$cbfsname" \

From 09b6e91803d4112ae22d31313a5fdbe8afe79707 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 26 May 2025 01:30:33 +0100
Subject: [PATCH 1534/1549] general cleanup in get.sh and vendor.sh

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh    | 10 +++++-----
 include/vendor.sh | 21 ++++++++-------------
 2 files changed, 13 insertions(+), 18 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index ebaaaff1..00768f0b 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -46,7 +46,7 @@ git_prep()
 	_loc="$4" # $1 and $2 are gitrepo and gitrepo_backup
 
 	chkvars rev
-	xbmkget git "$1" "$2" "$tmpgit" "$rev" "$_patchdir"
+	xbget git "$1" "$2" "$tmpgit" "$rev" "$_patchdir"
 	if singletree "$project" || [ $# -gt 4 ]; then
 		dx_ fetch_submodule "$mdir/module.list"
 	fi
@@ -71,19 +71,19 @@ fetch_submodule()
 	chkvars "sub${st}" "sub${st}_bkup" "subhash"
 
 	[ "$st" = "git" ] && x_ rm -Rf "$tmpgit/$1"
-	eval xbmkget "$st" "\$sub$st" "\$sub${st}_bkup" "$tmpgit/$1" \
+	eval xbget "$st" "\$sub$st" "\$sub${st}_bkup" "$tmpgit/$1" \
 	    "$subhash" "$mdir/${1##*/}/patches"
 }
 
-xbmkget()
+xbget()
 {
 	[ "$1" = "curl" ] || [ "$1" = "copy" ] || [ "$1" = "git" ] || \
-	    err "Bad dlop (arg 1): xbmkget $*"
+	    err "Bad dlop (arg 1): xbget $*"
 
 	echk="f" && [ "$1" = "git" ] && echk="d"
 
 	for url in "$2" "$3"; do
-		[ -n "$url" ] || err "empty URL given in: xbmkget $*"
+		[ -n "$url" ] || err "empty URL given in: xbget $*"
 		try_file "$url" "$@" || continue
 		eval "[ -$echk \"$4\" ] || continue"
 		return 0 # successful download/copy
diff --git a/include/vendor.sh b/include/vendor.sh
index 6702f5fd..4d8d1184 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -26,12 +26,11 @@ cvchk="CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
     CONFIG_FSP_S_FILE CONFIG_KBC1126_FW1 CONFIG_KBC1126_FW2"
 
 # lbmk-specific extensions to the "cv" variable (not suitable for cbmk)
-cvxbmk="CONFIG_ME_BIN_PATH CONFIG_SMSC_SCH5545_EC_FW_FILE \
-    CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2_OFFSET \
+cvxbmk="CONFIG_ME_BIN_PATH CONFIG_SMSC_SCH5545_EC_FW_FILE CONFIG_FSP_FULL_FD \
+    CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2_OFFSET CONFIG_FSP_USE_REPO \
     CONFIG_VGA_BIOS_ID CONFIG_BOARD_DELL_E6400 CONFIG_FSP_S_CBFS \
     CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE CONFIG_FSP_FD_PATH \
-    CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_FSP_M_CBFS \
-    CONFIG_FSP_USE_REPO CONFIG_FSP_FULL_FD"
+    CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_FSP_M_CBFS"
 
 # lbmk-specific extensions; mostly used for downloading vendor files
 eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
@@ -54,17 +53,14 @@ download()
 getfiles()
 {
 	[ -z "$CONFIG_HAVE_ME_BIN" ] || fetch intel_me "$DL_url" \
-	    "$DL_url_bkup" "$DL_hash" "$CONFIG_ME_BIN_PATH" "curl" \
-	    "$ME_bin_hash"
+	    "$DL_url_bkup" "$DL_hash" "$CONFIG_ME_BIN_PATH" curl "$ME_bin_hash"
 	[ -z "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" ] || fetch sch5545ec \
 	    "$SCH5545EC_DL_url" "$SCH5545EC_DL_url_bkup" "$SCH5545EC_DL_hash" \
 	    "$CONFIG_SMSC_SCH5545_EC_FW_FILE" "curl" "$SCH5545EC_bin_hash"
 	[ -z "$CONFIG_KBC1126_FW1" ] || fetch kbc1126ec "$EC_url" \
-	    "$EC_url_bkup" "$EC_hash" "$CONFIG_KBC1126_FW1" "curl" \
-	    "$EC_FW1_hash"
+	    "$EC_url_bkup" "$EC_hash" "$CONFIG_KBC1126_FW1" curl "$EC_FW1_hash"
 	[ -z "$CONFIG_KBC1126_FW2" ] || fetch kbc1126ec "$EC_url" \
-	    "$EC_url_bkup" "$EC_hash" "$CONFIG_KBC1126_FW2" "curl" \
-	    "$EC_FW2_hash"
+	    "$EC_url_bkup" "$EC_hash" "$CONFIG_KBC1126_FW2" curl "$EC_FW2_hash"
 	[ -z "$CONFIG_VGA_BIOS_FILE" ] || fetch e6400vga "$E6400_VGA_DL_url" \
 	    "$E6400_VGA_DL_url_bkup" "$E6400_VGA_DL_hash" \
 	    "$CONFIG_VGA_BIOS_FILE" "curl" "$E6400_VGA_bin_hash"
@@ -111,12 +107,11 @@ fetch()
 	done; :
 
 	# download the file (from the internet) to extract from
-	xbmkget "$dlop" "$dl" "$dl_bkup" "$_dl" "$dlsum"
+	xbget "$dlop" "$dl" "$dl_bkup" "$_dl" "$dlsum"
 	x_ rm -Rf "${_dl}_extracted"
 
 	# skip extraction if a cached extracted file exists
-	( xbmkget copy "$_dl_bin" "$_dl_bin" "$_dest" "$binsum" 2>/dev/null ) \
-	    || :
+	( xbget copy "$_dl_bin" "$_dl_bin" "$_dest" "$binsum" 2>/dev/null ) || :
 	[ -f "$_dest" ] && return 0
 
 	x_ mkdir -p "${_dest%/*}"

From 671e3aa27b402f04543cf016565421021d97c27d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 26 May 2025 13:11:20 +0100
Subject: [PATCH 1535/1549] get.sh: simplify fetch_targets()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index 00768f0b..d32452ff 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -10,9 +10,8 @@ tmpgitcache="$XBMK_CACHE/tmpgit"
 
 fetch_targets()
 {
-	e "src/$project/$tree" d && return 0
-	git_prep "$url" "$bkup_url" "$xbmkpwd/$configdir/$tree/patches" \
-	    "src/$project/$tree" with_submodules
+	[ -d "src/$project/$tree" ] || git_prep "$url" "$bkup_url" \
+	    "$xbmkpwd/$configdir/$tree/patches" "src/$project/$tree" submod; :
 }
 
 fetch_project()

From 495098d6a71bc3a67a80d39a5d4fdf2d2207c782 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 26 May 2025 13:19:06 +0100
Subject: [PATCH 1536/1549] get.sh: tidy up bad_checksum()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index d32452ff..6aed0a8d 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -151,10 +151,10 @@ try_git()
 
 bad_checksum()
 {
-	[ ! -f "$2" ] && printf "'%s' missing, %s\n" "$2" "$1" 1>&2 && return 0
+	e "$2" f missing && return 0
 	csum="$(x_ sha512sum "$2" | awk '{print $1}')" || err "!sha512 '$2' $1"
-	[ "$csum" != "$1" ] && printf "BAD SHA512, '%s'; need '%s', got %s\n" \
-	    "$2" "$1" "$csum" 1>&2 && x_ rm -f "$2" && return 0; return 1
+	[ "$csum" = "$1" ] && return 1; x_ rm -f "$2"
+	printf "BAD SHA512 %s, '%s'; need '%s'\n" "$csum" "$2" "$1" 1>&2
 }
 
 tmpclone()

From b5867be214d3f899ae1777bfe1d0b2c1d69ba6cd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 26 May 2025 13:23:06 +0100
Subject: [PATCH 1537/1549] get.sh: simplify try_copy()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index 6aed0a8d..b842d768 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -128,8 +128,7 @@ try_curl()
 
 try_copy()
 {
-	[ -L "$2" ] && printf "symlink %s (trycp %s)\n" "$2" "$*" && return 1
-	[ ! -f "$2" ] && printf "%s missing (trycp %s)\n" "$2" "$*" && return 1
+	e "$2" f missing && return 1; :
 	( x_ cp "$2" "$1" ) || return 1; :
 }
 

From 41308ee924445cad61e599aebf15557a0351522b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 26 May 2025 13:26:34 +0100
Subject: [PATCH 1538/1549] get.sh: simplify fetch_project()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/get.sh | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/include/get.sh b/include/get.sh
index b842d768..a3328454 100644
--- a/include/get.sh
+++ b/include/get.sh
@@ -19,9 +19,7 @@ fetch_project()
 	eval "`setvars "" xtree`"
 	eval "`setcfg "config/git/$project/pkg.cfg"`"
 
-	chkvars url bkup_url
-
-	[ -n "$xtree" ] && x_ ./mk -f coreboot "$xtree"
+	chkvars url bkup_url && [ -n "$xtree" ] && x_ ./mk -f coreboot "$xtree"
 	[ -z "$depend" ] || for d in $depend ; do
 		x_ ./mk -f $d
 	done

From 5036a0bc501b5b26d429701a8e9dd71339ec18a0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 26 May 2025 13:33:56 +0100
Subject: [PATCH 1539/1549] mk: simplify main()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 mk | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/mk b/mk
index f358bc3a..8da15f5b 100755
--- a/mk
+++ b/mk
@@ -26,14 +26,13 @@ main()
 	case "$cmd" in
 	version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
 	release|download|inject) $cmd "$@" ;;
-	-*) return 0 ;;
+	-*) return 1 ;;
 	*) err "bad command" ;;
 	esac
 	set -u -e # some commands disable them. turn them on!
-	return 1
 }
 
-main "$@" || exit 0
+main "$@" && exit 0
 
 . "include/tree.sh"
 

From 79ded40f3d0f123ce2dbddba524aaae76764c699 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 26 May 2025 13:45:12 +0100
Subject: [PATCH 1540/1549] lib.sh: simplify chkvars()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 7c4d71ea..822f1abc 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -71,11 +71,9 @@ setcfg()
 
 chkvars()
 {
-	while true; do
-		[ $# -lt 1 ] && break
+	while [ $# -gt 0 ]; do
 		eval "[ -n \"\${$1+x}\" ] || err \"$1 unset\""
-		eval "[ -n \"\$$1\" ] || err \"$1 unset\""
-		shift 1
+		eval "[ -n \"\$$1\" ] || err \"$1 unset\"; shift 1; :"
 	done; :
 }
 

From dee6997d0cc13e95b9a911efef0687b0ac582edd Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 26 May 2025 13:49:55 +0100
Subject: [PATCH 1541/1549] lib.sh: simplify setvars()

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/lib.sh | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/include/lib.sh b/include/lib.sh
index 822f1abc..86c0df26 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -53,12 +53,10 @@ setvars()
 	fi
 	val="$1"
 	shift 1
-	while true; do
-		[ $# -lt 1 ] && break
-		_setvars="$1=\"$val\"; $_setvars"
+	while [ $# -gt 0 ]; do
+		printf "%s=\"%s\"\n" "$1" "$val"
 		shift 1
 	done
-	printf "%s\n" "${_setvars% }"
 }
 
 setcfg()

From b77154640de6442b4180cb65e3851d1ae9f78918 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 26 May 2025 18:46:58 +0100
Subject: [PATCH 1542/1549] release.sh: use printf to create version files

Don't copy the files directly, because we might be doing
this from a work directory that has no files; in this case,
generic "unknown" variables are used, without generating
any files, so the current logic would produce an error.

However, we do need to create those dot files, because
we then rely on them for building release binaries.

The new logic maintains current behaviour, while fixing
this technical edge-case scenario via mitigation.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/release.sh | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/release.sh b/include/release.sh
index 5b822c7b..912687dc 100644
--- a/include/release.sh
+++ b/include/release.sh
@@ -27,8 +27,7 @@ release()
 
 	remkdir "$vdir"
 	x_ git clone . "$rsrc"
-	x_ cp ".version" "$rsrc/.version"
-	x_ cp ".versiondate" "$rsrc/.versiondate"
+	update_xbmkver "$rsrc"
 
 	prep_release src
 	prep_release tarball

From dc6996252a0f516add85e0cbcf1693bfa80f8c99 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 27 May 2025 10:11:42 +0100
Subject: [PATCH 1543/1549] put coreboot utils in elf/coreboot/TREE

not elf/UTIL/TREE

This way, they are automatically deleted when a tree
has to be re-built.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 4 ++--
 include/lib.sh    | 4 ++--
 include/rom.sh    | 8 ++++----
 include/vendor.sh | 4 ++--
 4 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/include/inject.sh b/include/inject.sh
index d2808301..a58acc81 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -6,7 +6,7 @@
 cbcfgsdir="config/coreboot"
 tmpromdel="$XBMK_CACHE/DO_NOT_FLASH"
 nvm="util/nvmutil/nvm"
-ifdtool="elf/ifdtool/default/ifdtool"
+ifdtool="elf/coreboot/default/ifdtool"
 
 cv="CONFIG_GBE_BIN_PATH"
 [ -n "$cvxbmk" ] && cv="$cv $cvxbmk"
@@ -77,7 +77,7 @@ check_target()
 	eval "`setcfg "$boarddir/target.cfg"`"
 	chkvars tree && x_ ./mk -d coreboot "$tree"
 
-	ifdtool="elf/ifdtool/$tree/ifdtool"
+	ifdtool="elf/coreboot/$tree/ifdtool"
 	[ -n "$IFD_platform" ] && ifdprefix="-p $IFD_platform"; :
 }
 
diff --git a/include/lib.sh b/include/lib.sh
index 86c0df26..b40772fa 100644
--- a/include/lib.sh
+++ b/include/lib.sh
@@ -4,8 +4,8 @@
 # Copyright (c) 2020-2025 Leah Rowe <leah@libreboot.org>
 # Copyright (c) 2025 Alper Nebi Yasak <alpernebiyasak@gmail.com>
 
-cbfstool="elf/cbfstool/default/cbfstool"
-rmodtool="elf/cbfstool/default/rmodtool"
+cbfstool="elf/coreboot/default/cbfstool"
+rmodtool="elf/coreboot/default/rmodtool"
 
 remkdir()
 {
diff --git a/include/rom.sh b/include/rom.sh
index e8caf024..c1b78c75 100644
--- a/include/rom.sh
+++ b/include/rom.sh
@@ -56,10 +56,10 @@ corebootpremake()
 
 check_coreboot_util()
 {
-	[ "$badhash" = "y" ] && x_ rm -f "elf/$1/$tree/$1"
-	e "elf/$1/$tree/$1" f && return 0
+	[ "$badhash" = "y" ] && x_ rm -f "elf/coreboot/$tree/$1"
+	e "elf/coreboot/$tree/$1" f && return 0
 
-	utilelfdir="elf/$1/$tree"
+	utilelfdir="elf/coreboot/$tree"
 	utilsrcdir="src/coreboot/$tree/util/$1"
 
 	utilmode="" && [ -n "$mode" ] && utilmode="clean"
@@ -85,7 +85,7 @@ mkcorebootbin()
 	displaymode="${initmode##*_}"
 	[ "$displaymode" = "$initmode" ] && displaymode="" # "normal" config
 	initmode="${initmode%%_*}"
-	cbfstool="elf/cbfstool/$tree/cbfstool"
+	cbfstool="elf/coreboot/$tree/cbfstool"
 
 	[ -z "$payload_uboot" ] || [ "$payload_uboot" = "amd64" ] || \
 	    [ "$payload_uboot" = "i386" ] || [ "$payload_uboot" = "arm64" ] \
diff --git a/include/vendor.sh b/include/vendor.sh
index 4d8d1184..3f287899 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -270,8 +270,8 @@ bootstrap()
 	cbdir="src/coreboot/$tree"
 	mecleaner="$xbmkpwd/$cbdir/util/me_cleaner/me_cleaner.py"
 	kbc1126_ec_dump="$xbmkpwd/$cbdir/util/kbc1126/kbc1126_ec_dump"
-	cbfstool="elf/cbfstool/$tree/cbfstool"
-	rmodtool="elf/cbfstool/$tree/rmodtool"
+	cbfstool="elf/coreboot/$tree/cbfstool"
+	rmodtool="elf/coreboot/$tree/rmodtool"
 
 	x_ ./mk -f coreboot "${cbdir##*/}"
 	fx_ "x_ ./mk -b" printf "uefitool\nbiosutilities\nbios_extract\n"

From 974bdbb38159d90b90eeff68220c7464b418866d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 27 May 2025 11:18:18 +0100
Subject: [PATCH 1544/1549] vendor.sh: fix bad cbfstool path

i overlooked this one in the previous commit

there is always one.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/vendor.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/vendor.sh b/include/vendor.sh
index 3f287899..55373913 100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -277,7 +277,7 @@ bootstrap()
 	fx_ "x_ ./mk -b" printf "uefitool\nbiosutilities\nbios_extract\n"
 	[ -d "${kbc1126_ec_dump%/*}" ] && x_ make -C "$cbdir/util/kbc1126"
 	[ -n "$MRC_refcode_cbtree" ] && \
-	    cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
+	    cbfstoolref="elf/coreboot/$MRC_refcode_cbtree/cbfstool" && \
 	    x_ ./mk -d coreboot "$MRC_refcode_cbtree"; :
 }
 

From 267d4c903413c4eccc4271b00f872a7dd3d1a165 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 27 May 2025 11:29:04 +0100
Subject: [PATCH 1545/1549] inject.sh: add missing semicolons

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/inject.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/inject.sh b/include/inject.sh
index a58acc81..795b2c70 100644
--- a/include/inject.sh
+++ b/include/inject.sh
@@ -65,7 +65,7 @@ check_release()
 	*.tar.xz) _stripped_prefix="${archivename#*_}"
 		board="${_stripped_prefix%.tar.xz}" ;;
 	*)
-		err "'$archive': could not detect board type"
+		err "'$archive': could not detect board type" ;;
 	esac; :
 }
 

From 677dfc4d103f01b2d6c3b9d9b92011523e248308 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 27 May 2025 12:59:42 +0100
Subject: [PATCH 1546/1549] tree.sh: more reliable clean in run_make_command

Don't do no-op if it fails; fall back to "clean" instead,
and fail if that fails.

The no-op was there was not all projects have distclean,
but we do intend for them all to be cleaned.

We mitigate further error by only running make-clean if
a makefile exists.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/tree.sh | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/tree.sh b/include/tree.sh
index 11607eed..df03333f 100644
--- a/include/tree.sh
+++ b/include/tree.sh
@@ -302,8 +302,10 @@ run_make_command()
 	$dry x_ make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs
 	[ -n "$mode" ] || x_ $mkhelper
 
+	check_makefile "$srcdir" || return 0
 	[ "$mode" != "clean" ] || \
-	    $dry make -C "$srcdir" $cleanargs distclean || :; :
+	    $dry make -C "$srcdir" $cleanargs distclean || \
+	    $dry x_ make -C "$srcdir" $cleanargs clean; :
 }
 
 check_cmake()

From 04bee3834d031b1b9209f53112367a46d0c7606f Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 28 May 2025 18:38:23 +0100
Subject: [PATCH 1547/1549] tree.sh: add error check in check_project_hashes()

when reading old_pjhash, we need to error out where a read
error occurs. such an error is unlikely, but could occur under
certain edge cases.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/tree.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/tree.sh b/include/tree.sh
index df03333f..6afba6f4 100644
--- a/include/tree.sh
+++ b/include/tree.sh
@@ -177,7 +177,8 @@ check_project_hashes()
 {
 	old_pjhash="" && x_ mkdir -p "$XBMK_CACHE/hash"
 	[ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
-	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
+	    read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree" || \
+	    err "old_pjhash: Can't read '$XBMK_CACHE/hash/$project$tree'"
 
 	fx_ "x_ sha512sum" find "$datadir" "$configdir/$tree" "$mdir" \
 	    -type f -not -path "*/.git*/*" | awk '{print $1}' > \

From b1ef562b7677f7238636dcbc76fa53999efdcfbb Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 28 May 2025 18:43:44 +0100
Subject: [PATCH 1548/1549] tree.sh: add sha512 error for check_project_hashes

handle errors on sha512sum - also handle awk errors inside
the mini subshell, and provide overall error handling.

we know that the project.hash file should always exist, and
always be read no matter what; technically, the find command
that proceeds it might not yield any results, but an empty
file would then be produced.

the edge case of an empty file would have lead to an error
beforehand, when configuring the project in function,
configure_project(), so we've already got that covered.

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 include/tree.sh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/tree.sh b/include/tree.sh
index 6afba6f4..85f97101 100644
--- a/include/tree.sh
+++ b/include/tree.sh
@@ -184,7 +184,8 @@ check_project_hashes()
 	    -type f -not -path "*/.git*/*" | awk '{print $1}' > \
 	    "$xbtmp/project.hash" || err "!h $project $tree"
 
-	pjhash="$(sha512sum "$xbtmp/project.hash" | awk '{print $1}')" || :
+	pjhash="$(x_ sha512sum "$xbtmp/project.hash" | awk '{print $1}' || \
+	    err)" || err "pjhash: Can't read sha512 of '$xbtmp/project.hash'"
 	[ "$pjhash" != "$old_pjhash" ] && badhash="y"
 	[ -f "$XBMK_CACHE/hash/$project$tree" ] || badhash="y"
 

From c46a71138c77556b103a4a5c85917d5bb5cc915a Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Jun 2025 14:08:48 +0100
Subject: [PATCH 1549/1549] Libreboot 25.06 release

Signed-off-by: Leah Rowe <leah@libreboot.org>
---
 .../patches/0002-say-the-name-libreboot-in-the-grub-menu.patch  | 2 +-
 .../patches/0002-say-the-name-libreboot-in-the-grub-menu.patch  | 2 +-
 .../patches/0002-say-the-name-libreboot-in-the-grub-menu.patch  | 2 +-
 .../0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch  | 2 +-
 config/submodule/docs/html/module.cfg                           | 2 +-
 .../0007-Libreboot-branding-version-on-the-bootflow-menu.patch  | 2 +-
 .../0005-Libreboot-branding-version-on-the-bootflow-menu.patch  | 2 +-
 .../0005-Libreboot-branding-version-on-the-bootflow-menu.patch  | 2 +-
 8 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index e32ba2ce..2e7e3fa1 100644
--- a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index 04d058f55..b1cc8f236 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 25.04 Corny Calamity (GRUB menu): https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 25.06 Luminous Lemon (GRUB menu): https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index f49c8340..6afb2002 100644
--- a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index 04d058f55..b1cc8f236 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 25.04 Corny Calamity (GRUB menu): https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 25.06 Luminous Lemon (GRUB menu): https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 5818c2ed..608eef01 100644
--- a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -16,7 +16,7 @@ index 04d058f55..b1cc8f236 100644
    grub_term_cls (term);
  
 -  msg_formatted = grub_xasprintf (_("GNU GRUB  version %s"), PACKAGE_VERSION);
-+  msg_formatted = grub_xasprintf (_("Libreboot 25.04 Corny Calamity (GRUB menu): https://libreboot.org/"));
++  msg_formatted = grub_xasprintf (_("Libreboot 25.06 Luminous Lemon (GRUB menu): https://libreboot.org/"));
    if (!msg_formatted)
      return;
  
diff --git a/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
index acde7f20..c78d6660 100644
--- a/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
+++ b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
@@ -17,7 +17,7 @@ index 538b316d..9eed0b12 100644
  
      // Write to screen.
 -    printf("SeaBIOS (version %s)\n", VERSION);
-+    printf("Libreboot 25.04 Corny Calamity (SeaBIOS menu): https://libreboot.org/\n");
++    printf("Libreboot 25.06 Luminous Lemon (SeaBIOS menu): https://libreboot.org/\n");
      display_uuid();
  }
  
diff --git a/config/submodule/docs/html/module.cfg b/config/submodule/docs/html/module.cfg
index 58bec732..e18b2fe4 100644
--- a/config/submodule/docs/html/module.cfg
+++ b/config/submodule/docs/html/module.cfg
@@ -1,5 +1,5 @@
 # SPDX-License-Identifier: GPL-3.0-or-later
 
-subhash="47c993cba483ff23a4c7b866c6cedcc905e9a2bd"
+subhash="2fc8efd375aef58d6c5d6b8e4ffe87b3bd2ff3d4"
 subgit="https://codeberg.org/libreboot/lbwww"
 subgit_bkup="https://git.disroot.org/libreboot/lbwww"
diff --git a/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch
index 754e2162..8a09fa7d 100644
--- a/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch
+++ b/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch
@@ -18,7 +18,7 @@ index 84831915a2..8e26ec2aef 100644
  	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
  	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
 -			     "U-Boot - Boot Menu", NULL);
-+	    "Libreboot 25.04 Corny Calamity (U-Boot menu): https://libreboot.org/", NULL);
++	    "Libreboot 25.06 Luminous Lemon (U-Boot menu): https://libreboot.org/", NULL);
  	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
  
  	logo = video_get_u_boot_logo();
diff --git a/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
index 754e2162..8a09fa7d 100644
--- a/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
+++ b/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
@@ -18,7 +18,7 @@ index 84831915a2..8e26ec2aef 100644
  	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
  	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
 -			     "U-Boot - Boot Menu", NULL);
-+	    "Libreboot 25.04 Corny Calamity (U-Boot menu): https://libreboot.org/", NULL);
++	    "Libreboot 25.06 Luminous Lemon (U-Boot menu): https://libreboot.org/", NULL);
  	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
  
  	logo = video_get_u_boot_logo();
diff --git a/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
index 754e2162..8a09fa7d 100644
--- a/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
+++ b/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch
@@ -18,7 +18,7 @@ index 84831915a2..8e26ec2aef 100644
  	ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100);
  	ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE,
 -			     "U-Boot - Boot Menu", NULL);
-+	    "Libreboot 25.04 Corny Calamity (U-Boot menu): https://libreboot.org/", NULL);
++	    "Libreboot 25.06 Luminous Lemon (U-Boot menu): https://libreboot.org/", NULL);
  	ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT);
  
  	logo = video_get_u_boot_logo();